From nicholas at mxc.ca  Mon May 25 00:30:01 2009
From: nicholas at mxc.ca (Nick Lewycky)
Date: Mon, 25 May 2009 05:30:01 -0000
Subject: [llvm-commits] [llvm] r72377 -
	/llvm/trunk/tools/bugpoint/CrashDebugger.cpp
Message-ID: <200905250530.n4P5U1Je017300@zion.cs.uiuc.edu>

Author: nicholas
Date: Mon May 25 00:30:00 2009
New Revision: 72377

URL: http://llvm.org/viewvc/llvm-project?rev=72377&view=rev
Log:
Add a bisection step on the list of instructions before doing the linear
simplification. It's not clear to me whether this can replace the first of the
linear instruction simplification stages or not, so I left it in.

Modified:
    llvm/trunk/tools/bugpoint/CrashDebugger.cpp

Modified: llvm/trunk/tools/bugpoint/CrashDebugger.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/CrashDebugger.cpp?rev=72377&r1=72376&r2=72377&view=diff

==============================================================================
--- llvm/trunk/tools/bugpoint/CrashDebugger.cpp (original)
+++ llvm/trunk/tools/bugpoint/CrashDebugger.cpp Mon May 25 00:30:00 2009
@@ -342,6 +342,82 @@
   return false;
 }
 
+namespace {
+  /// ReduceCrashingInstructions reducer - This works by removing the specified
+  /// non-terminator instructions and replacing them with undef.
+  ///
+  class ReduceCrashingInstructions : public ListReducer<const Instruction*> {
+    BugDriver &BD;
+    bool (*TestFn)(BugDriver &, Module *);
+  public:
+    ReduceCrashingInstructions(BugDriver &bd, bool (*testFn)(BugDriver &,
+                                                             Module *))
+      : BD(bd), TestFn(testFn) {}
+
+    virtual TestResult doTest(std::vector<const Instruction*> &Prefix,
+                              std::vector<const Instruction*> &Kept) {
+      if (!Kept.empty() && TestInsts(Kept))
+        return KeepSuffix;
+      if (!Prefix.empty() && TestInsts(Prefix))
+        return KeepPrefix;
+      return NoFailure;
+    }
+
+    bool TestInsts(std::vector<const Instruction*> &Prefix);
+  };
+}
+
+bool ReduceCrashingInstructions::TestInsts(std::vector<const Instruction*>
+                                           &Insts) {
+  // Clone the program to try hacking it apart...
+  DenseMap<const Value*, Value*> ValueMap;
+  Module *M = CloneModule(BD.getProgram(), ValueMap);
+
+  // Convert list to set for fast lookup...
+  SmallPtrSet<Instruction*, 64> Instructions;
+  for (unsigned i = 0, e = Insts.size(); i != e; ++i) {
+    assert(!isa<TerminatorInst>(Insts[i]));
+    Instructions.insert(cast<Instruction>(ValueMap[Insts[i]]));
+  }
+
+  std::cout << "Checking for crash with only " << Instructions.size();
+  if (Instructions.size() == 1)
+    std::cout << " instruction: ";
+  else
+    std::cout << " instructions: ";
+
+  for (Module::iterator MI = M->begin(), ME = M->end(); MI != ME; ++MI)
+    for (Function::iterator FI = MI->begin(), FE = MI->end(); FI != FE; ++FI)
+      for (BasicBlock::iterator I = FI->begin(), E = FI->end(); I != E;) {
+        Instruction *Inst = I++;
+        if (!Instructions.count(Inst) && !isa<TerminatorInst>(Inst)) {
+          if (Inst->getType() != Type::VoidTy)
+            Inst->replaceAllUsesWith(UndefValue::get(Inst->getType()));
+          Inst->eraseFromParent();
+        }
+      }
+
+  // Verify that this is still valid.
+  PassManager Passes;
+  Passes.add(createVerifierPass());
+  Passes.run(*M);
+
+  // Try running on the hacked up program...
+  if (TestFn(BD, M)) {
+    BD.setNewProgram(M);      // It crashed, keep the trimmed version...
+
+    // Make sure to use instruction pointers that point into the now-current
+    // module, and that they don't include any deleted blocks.
+    Insts.clear();
+    for (SmallPtrSet<Instruction*, 64>::const_iterator I = Instructions.begin(),
+             E = Instructions.end(); I != E; ++I)
+      Insts.push_back(*I);
+    return true;
+  }
+  delete M;  // It didn't crash, try something else.
+  return false;
+}
+
 /// DebugACrash - Given a predicate that determines whether a component crashes
 /// on a program, try to destructively reduce the program while still keeping
 /// the predicate true.
@@ -432,6 +508,22 @@
       BD.EmitProgressBitcode("reduced-blocks");
   }
 
+  // Attempt to delete instructions using bisection. This should help out nasty
+  // cases with large basic blocks where the problem is at one end.
+  if (!BugpointIsInterrupted) {
+    std::vector<const Instruction*> Insts;
+    for (Module::const_iterator MI = BD.getProgram()->begin(),
+           ME = BD.getProgram()->end(); MI != ME; ++MI)
+      for (Function::const_iterator FI = MI->begin(), FE = MI->end(); FI != FE;
+           ++FI)
+        for (BasicBlock::const_iterator I = FI->begin(), E = FI->end();
+             I != E; ++I)
+          if (!isa<TerminatorInst>(I))
+            Insts.push_back(I);
+
+    ReduceCrashingInstructions(BD, TestFn).reduceList(Insts);
+  }
+
   // FIXME: This should use the list reducer to converge faster by deleting
   // larger chunks of instructions at a time!
   unsigned Simplification = 2;




From eli.friedman at gmail.com  Mon May 25 00:30:50 2009
From: eli.friedman at gmail.com (Eli Friedman)
Date: Sun, 24 May 2009 22:30:50 -0700
Subject: [llvm-commits] patch: CXAGuardElimination pass.
In-Reply-To: <4A1A1FBE.5090902@mxc.ca>
References: <4A1A1FBE.5090902@mxc.ca>
Message-ID: <f5aa3e9b0905242230t8d0c1e6uc6230340ad01459f@mail.gmail.com>

On Sun, May 24, 2009 at 9:34 PM, Nick Lewycky <nicholas at mxc.ca> wrote:
> This pass eliminates dead calls to __cxa_guard_acquire and
> __cxa_guard_release. Those two functions are defined by the Itanium ABI as
> part of the thread-safe one-time construction ABI for static variables in
> functions.
>
> For example, this program:
>
> ?struct X {
> ? ?X(int) {}
> ?};
>
> ?void foo() {
> ? ?static X x(10);
> ?}
>
> would have calls to cxa_guard_* in foo, and this pass detects that there is
> no real work being done between the guards and therefore it is safe to
> eliminate them.

This isn't completely a question about your patch, but why are we
loading and storing an i8 from an i64 global?

-Eli



From eli.friedman at gmail.com  Mon May 25 00:45:27 2009
From: eli.friedman at gmail.com (Eli Friedman)
Date: Sun, 24 May 2009 22:45:27 -0700
Subject: [llvm-commits] patch: CXAGuardElimination pass.
In-Reply-To: <f5aa3e9b0905242230t8d0c1e6uc6230340ad01459f@mail.gmail.com>
References: <4A1A1FBE.5090902@mxc.ca>
	<f5aa3e9b0905242230t8d0c1e6uc6230340ad01459f@mail.gmail.com>
Message-ID: <f5aa3e9b0905242245l6fb247e5j45faf7fd05f22273@mail.gmail.com>

On Sun, May 24, 2009 at 10:30 PM, Eli Friedman <eli.friedman at gmail.com> wrote:
> This isn't completely a question about your patch, but why are we
> loading and storing an i8 from an i64 global?

Never mind; I didn't read the patch carefully enough.

-Eli


From nicholas at mxc.ca  Mon May 25 00:46:26 2009
From: nicholas at mxc.ca (Nick Lewycky)
Date: Sun, 24 May 2009 22:46:26 -0700
Subject: [llvm-commits] patch: CXAGuardElimination pass.
In-Reply-To: <f5aa3e9b0905242230t8d0c1e6uc6230340ad01459f@mail.gmail.com>
References: <4A1A1FBE.5090902@mxc.ca>
	<f5aa3e9b0905242230t8d0c1e6uc6230340ad01459f@mail.gmail.com>
Message-ID: <4A1A30B2.4080207@mxc.ca>

Eli Friedman wrote:
> On Sun, May 24, 2009 at 9:34 PM, Nick Lewycky <nicholas at mxc.ca> wrote:
>> This pass eliminates dead calls to __cxa_guard_acquire and
>> __cxa_guard_release. Those two functions are defined by the Itanium ABI as
>> part of the thread-safe one-time construction ABI for static variables in
>> functions.
>>
>> For example, this program:
>>
>>  struct X {
>>    X(int) {}
>>  };
>>
>>  void foo() {
>>    static X x(10);
>>  }
>>
>> would have calls to cxa_guard_* in foo, and this pass detects that there is
>> no real work being done between the guards and therefore it is safe to
>> eliminate them.
> 
> This isn't completely a question about your patch, but why are we
> loading and storing an i8 from an i64 global?

Because the ABI says so.

1. "The size of the guard variable is 64 bits. The first byte (i.e. the 
byte at the address of the full variable) shall contain the value 0 
prior to initialization of the associated variable, and 1 after 
initialization is complete. Usage of the other bytes of the guard 
variable is implementation-defined."

  -- http://www.codesourcery.com/public/cxx-abi/abi.html#guards

2. "extern "C" void __cxa_guard_release ( __int64_t *guard_object );

      "Sets the first byte of the guard object to a non-zero value. ..."

  -- http://www.codesourcery.com/public/cxx-abi/abi.html#once-ctor

Nick


From eli.friedman at gmail.com  Mon May 25 01:15:29 2009
From: eli.friedman at gmail.com (Eli Friedman)
Date: Sun, 24 May 2009 23:15:29 -0700
Subject: [llvm-commits] patch: CXAGuardElimination pass.
In-Reply-To: <4A1A1FBE.5090902@mxc.ca>
References: <4A1A1FBE.5090902@mxc.ca>
Message-ID: <f5aa3e9b0905242315o502181c5s73022ac119e856a0@mail.gmail.com>

On Sun, May 24, 2009 at 9:34 PM, Nick Lewycky <nicholas at mxc.ca> wrote:
> However, it doesn't simplify it down all the way. See llvm.org/PR4261 for an
> example of what happens after this optimization is applied on the above
> program. We may decide that PR4261 is too hard to fix in general and just
> add some extra logic to this pass, but I'd rather have this committed for a
> start.

Couldn't you just change AcquireRet from a constant 1 to a constant 0?
 If it's safe to remove the guard, I don't see how the chosen path
could make a difference.

-Eli


From nicholas at mxc.ca  Mon May 25 01:25:10 2009
From: nicholas at mxc.ca (Nick Lewycky)
Date: Sun, 24 May 2009 23:25:10 -0700
Subject: [llvm-commits] patch: CXAGuardElimination pass.
In-Reply-To: <f5aa3e9b0905242315o502181c5s73022ac119e856a0@mail.gmail.com>
References: <4A1A1FBE.5090902@mxc.ca>
	<f5aa3e9b0905242315o502181c5s73022ac119e856a0@mail.gmail.com>
Message-ID: <4A1A39C6.8080302@mxc.ca>

Eli Friedman wrote:
> On Sun, May 24, 2009 at 9:34 PM, Nick Lewycky <nicholas at mxc.ca> wrote:
>> However, it doesn't simplify it down all the way. See llvm.org/PR4261 for an
>> example of what happens after this optimization is applied on the above
>> program. We may decide that PR4261 is too hard to fix in general and just
>> add some extra logic to this pass, but I'd rather have this committed for a
>> start.
> 
> Couldn't you just change AcquireRet from a constant 1 to a constant 0?
>  If it's safe to remove the guard, I don't see how the chosen path
> could make a difference.

Release has to run. It has the visible effect of changing the guard 
variable to a 1. Nowhere in this pass do we prove those two calls are 
the only places looking at the guard variable.

Visible to who? Well, I'm not sure. There is a "__cxa_guard_abort" that 
could be used. I'm not sure what C++ input you would need to create in 
order to make it depend on this and be broken by the change, but I'm 
opting for the relatively safe transform.

ALSO, AcquireRet is used twice, once when we've decided to delete the 
guards but also earlier when following the flow from acquire() to 
release(). If we used the wrong value there we would flow directly into 
the "ret void" even if there were interesting code being guarded. (Note 
that currently "ret void" means that we didn't find the release() call 
and therefore wouldn't eliminate it anyways.)

Nick


From nicholas at mxc.ca  Mon May 25 01:29:57 2009
From: nicholas at mxc.ca (Nick Lewycky)
Date: Mon, 25 May 2009 06:29:57 -0000
Subject: [llvm-commits] [llvm] r72378 -
	/llvm/trunk/tools/bugpoint/CrashDebugger.cpp
Message-ID: <200905250629.n4P6Tvk7020317@zion.cs.uiuc.edu>

Author: nicholas
Date: Mon May 25 01:29:56 2009
New Revision: 72378

URL: http://llvm.org/viewvc/llvm-project?rev=72378&view=rev
Log:
Fix the crash debugger to actually bisect globals once it's determined that it
can't just eliminate all global initializers.

Modified:
    llvm/trunk/tools/bugpoint/CrashDebugger.cpp

Modified: llvm/trunk/tools/bugpoint/CrashDebugger.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/CrashDebugger.cpp?rev=72378&r1=72377&r2=72378&view=diff

==============================================================================
--- llvm/trunk/tools/bugpoint/CrashDebugger.cpp (original)
+++ llvm/trunk/tools/bugpoint/CrashDebugger.cpp Mon May 25 01:29:56 2009
@@ -150,7 +150,7 @@
   // playing with...
   for (Module::global_iterator I = M->global_begin(), E = M->global_end();
        I != E; ++I)
-    if (I->hasInitializer()) {
+    if (I->hasInitializer() && !GVSet.count(I)) {
       I->setInitializer(0);
       I->setLinkage(GlobalValue::ExternalLinkage);
     }




From eli.friedman at gmail.com  Mon May 25 01:54:04 2009
From: eli.friedman at gmail.com (Eli Friedman)
Date: Sun, 24 May 2009 23:54:04 -0700
Subject: [llvm-commits] patch: CXAGuardElimination pass.
In-Reply-To: <4A1A39C6.8080302@mxc.ca>
References: <4A1A1FBE.5090902@mxc.ca>
	<f5aa3e9b0905242315o502181c5s73022ac119e856a0@mail.gmail.com>
	<4A1A39C6.8080302@mxc.ca>
Message-ID: <f5aa3e9b0905242354y4d4fb03bxd371761314ebae87@mail.gmail.com>

On Sun, May 24, 2009 at 11:25 PM, Nick Lewycky <nicholas at mxc.ca> wrote:
> Eli Friedman wrote:
>> On Sun, May 24, 2009 at 9:34 PM, Nick Lewycky <nicholas at mxc.ca> wrote:
>>> However, it doesn't simplify it down all the way. See llvm.org/PR4261 for an
>>> example of what happens after this optimization is applied on the above
>>> program. We may decide that PR4261 is too hard to fix in general and just
>>> add some extra logic to this pass, but I'd rather have this committed for a
>>> start.
>>
>> Couldn't you just change AcquireRet from a constant 1 to a constant 0?
>> ?If it's safe to remove the guard, I don't see how the chosen path
>> could make a difference.
>
> Release has to run. It has the visible effect of changing the guard
> variable to a 1. Nowhere in this pass do we prove those two calls are
> the only places looking at the guard variable.

Assuming it's actually a guard, nothing besides the guard should care
whether the guard variable initialized or not in the current call. The
pass as written already makes assumptions that agree with that: for
example, it doesn't bother to check for instructions with side-effects
after the call to __cxa_guard_release.

> Visible to who? Well, I'm not sure. There is a "__cxa_guard_abort" that
> could be used. I'm not sure what C++ input you would need to create in
> order to make it depend on this and be broken by the change, but I'm
> opting for the relatively safe transform.

__cxa_guard_abort only gets triggered if the constructor throws an
exception, which shouldn't be possible here.

> ALSO, AcquireRet is used twice, once when we've decided to delete the
> guards but also earlier when following the flow from acquire() to
> release(). If we used the wrong value there we would flow directly into
> the "ret void" even if there were interesting code being guarded. (Note
> that currently "ret void" means that we didn't find the release() call
> and therefore wouldn't eliminate it anyways.)

Ah, oops, I wasn't suggesting to change that use.

-Eli



From nicholas at mxc.ca  Mon May 25 02:15:02 2009
From: nicholas at mxc.ca (Nick Lewycky)
Date: Mon, 25 May 2009 00:15:02 -0700
Subject: [llvm-commits] patch: CXAGuardElimination pass.
In-Reply-To: <f5aa3e9b0905242354y4d4fb03bxd371761314ebae87@mail.gmail.com>
References: <4A1A1FBE.5090902@mxc.ca>	<f5aa3e9b0905242315o502181c5s73022ac119e856a0@mail.gmail.com>	<4A1A39C6.8080302@mxc.ca>
	<f5aa3e9b0905242354y4d4fb03bxd371761314ebae87@mail.gmail.com>
Message-ID: <4A1A4576.4010204@mxc.ca>

Eli Friedman wrote:
> On Sun, May 24, 2009 at 11:25 PM, Nick Lewycky <nicholas at mxc.ca> wrote:
>> Eli Friedman wrote:
>>> On Sun, May 24, 2009 at 9:34 PM, Nick Lewycky <nicholas at mxc.ca> wrote:
>>>> However, it doesn't simplify it down all the way. See llvm.org/PR4261 for an
>>>> example of what happens after this optimization is applied on the above
>>>> program. We may decide that PR4261 is too hard to fix in general and just
>>>> add some extra logic to this pass, but I'd rather have this committed for a
>>>> start.
>>> Couldn't you just change AcquireRet from a constant 1 to a constant 0?
>>>  If it's safe to remove the guard, I don't see how the chosen path
>>> could make a difference.
>> Release has to run. It has the visible effect of changing the guard
>> variable to a 1. Nowhere in this pass do we prove those two calls are
>> the only places looking at the guard variable.
> 
> Assuming it's actually a guard, nothing besides the guard should care
> whether the guard variable initialized or not in the current call. The
> pass as written already makes assumptions that agree with that: for
> example, it doesn't bother to check for instructions with side-effects
> after the call to __cxa_guard_release.
> 
>> Visible to who? Well, I'm not sure. There is a "__cxa_guard_abort" that
>> could be used. I'm not sure what C++ input you would need to create in
>> order to make it depend on this and be broken by the change, but I'm
>> opting for the relatively safe transform.
> 
> __cxa_guard_abort only gets triggered if the constructor throws an
> exception, which shouldn't be possible here.

Okay then! I'm not going to bother reattaching a new patch, the only 
change is this new implementation:

void CXAGuardElimination::removeGuardPair(CallInst *A, CallInst *R) {
   A->replaceAllUsesWith(AcquireRet);
   A->eraseFromParent();
   R->eraseFromParent();
}

It still replaces the call to acquire with 1 but because there's no 
store on the release the whole function does in fact melt away.

Which brings me to my next point: this patch needs some testing. This 
transform doesn't trigger on llvm-test but does pass an llvm-gcc 
bootstrap. I'd appreciate it if people who have code that uses this 
would try it out.

Nick

>> ALSO, AcquireRet is used twice, once when we've decided to delete the
>> guards but also earlier when following the flow from acquire() to
>> release(). If we used the wrong value there we would flow directly into
>> the "ret void" even if there were interesting code being guarded. (Note
>> that currently "ret void" means that we didn't find the release() call
>> and therefore wouldn't eliminate it anyways.)
> 
> Ah, oops, I wasn't suggesting to change that use.
> 
> -Eli
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
> 



From baldrick at free.fr  Mon May 25 02:15:13 2009
From: baldrick at free.fr (Duncan Sands)
Date: Mon, 25 May 2009 09:15:13 +0200
Subject: [llvm-commits] [llvm] r72361
	-	/llvm/trunk/tools/bugpoint/CrashDebugger.cpp
In-Reply-To: <200905240931.n4O9VZZi016732@zion.cs.uiuc.edu>
References: <200905240931.n4O9VZZi016732@zion.cs.uiuc.edu>
Message-ID: <4A1A4581.8070105@free.fr>

Hi Edwin,

> Add -disable-global-remove option to bugpoint.
> Sometimes when bugpointing a crash the bugpoint-reduced-simplified.bc reproduces
> a totally different bug than the original one ("GV doesn't have initializer").
> Although its useful to report that bug too, I need a way to reduce the original
> bug, hence I introduced -disable-global-remove.

it sounds like a bug in bugpoint.  Wouldn't it be better to fix bugpoint
instead?

Ciao,

Duncan.


From edwintorok at gmail.com  Mon May 25 02:18:50 2009
From: edwintorok at gmail.com (=?ISO-8859-1?Q?T=F6r=F6k_Edwin?=)
Date: Mon, 25 May 2009 10:18:50 +0300
Subject: [llvm-commits] [llvm] r72361
	-	/llvm/trunk/tools/bugpoint/CrashDebugger.cpp
In-Reply-To: <4A1A4581.8070105@free.fr>
References: <200905240931.n4O9VZZi016732@zion.cs.uiuc.edu>
	<4A1A4581.8070105@free.fr>
Message-ID: <4A1A465A.1050300@gmail.com>

On 2009-05-25 10:15, Duncan Sands wrote:
> Hi Edwin,
>
>   
>> Add -disable-global-remove option to bugpoint.
>> Sometimes when bugpointing a crash the bugpoint-reduced-simplified.bc reproduces
>> a totally different bug than the original one ("GV doesn't have initializer").
>> Although its useful to report that bug too, I need a way to reduce the original
>> bug, hence I introduced -disable-global-remove.
>>     
>
> it sounds like a bug in bugpoint.  Wouldn't it be better to fix bugpoint
> instead?
>   

Yes, I opened PR4255.
However  I don't think it is harmful to keep -disable-global-remove in
bugpoint even after the bug is fixed, there already are flags like
disable-loop-extraction, disable-simplifycfg.

Best regards,
--Edwin


From baldrick at free.fr  Mon May 25 02:22:49 2009
From: baldrick at free.fr (Duncan Sands)
Date: Mon, 25 May 2009 09:22:49 +0200
Subject: [llvm-commits] [llvm] r72325 - in
 /llvm/trunk:	include/llvm/CodeGen/SelectionDAG.h
 lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp	lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
In-Reply-To: <f5aa3e9b0905241338g5d6c4b54h8db763098f9c26f9@mail.gmail.com>
References: <200905231235.n4NCZgvT018589@zion.cs.uiuc.edu>	<4A19A74A.80801@free.fr>
	<f5aa3e9b0905241338g5d6c4b54h8db763098f9c26f9@mail.gmail.com>
Message-ID: <4A1A4749.1020903@free.fr>

Hi Eli,

>>> +  // The legalize process is inherently a bottom-up recursive process (users
>>> +  // legalize their uses before themselves).
>> can you do this non-recursively?  The type legalizer is not recursive...
> 
> Possibly; I took the current approach from the DAG legalizer.  Taking
> a quick look, the type legalizer's logic to deal with nodes being
> inserted during legalization seems complicated enough that I wouldn't
> want to duplicate it... perhaps some sort of general legalizer base
> class would be appropriate?

I think Chris wants to redesign LegalizeDAG.  Hopefully at that point
all the different legalizers will be able to share some generic
infrastructure.  I suspect the type legalizer could be simplified a lot
by using an SDAG equivalent of CallbackVH.

>> I don't understand what this routine is doing.  Got an example?
> 
> I added a comment in r72374.


Thanks.

Ciao,

Duncan.


From baldrick at free.fr  Mon May 25 02:58:35 2009
From: baldrick at free.fr (Duncan Sands)
Date: Mon, 25 May 2009 09:58:35 +0200
Subject: [llvm-commits] patch: CXAGuardElimination pass.
In-Reply-To: <4A1A1FBE.5090902@mxc.ca>
References: <4A1A1FBE.5090902@mxc.ca>
Message-ID: <4A1A4FAB.2050404@free.fr>

Hi Nick,

> +    CallInst *A = dyn_cast<CallInst>(I);
> +    if (!A) continue;
> +
> +    // TODO: __cxa_guard_acquire returns a value, then makes a conditional
> +    // branch off of it. We need to handle this.

the acquire function may be being passed as a parameter to some other
function rather than being called.

> +      if (I->mayReadFromMemory() || I->mayWriteToMemory())

Maybe you should use mayHaveSideEffects rather than mayWriteToMemory,
since a "const" function can still throw an exception.  On the other
hand, since such a function doesn't read or write memory it shouldn't
need to be wrapped in guards anyway.

> +BasicBlock *CXAGuardElimination::getUniqueSuccessor(TerminatorInst *TI,
> +                                                    CallInst *Acquire) {
> +  if (TI->getNumSuccessors() == 1)
> +    return TI->getSuccessor(0);

What about this:

bb1: acquire
      br bbr
bb2: acquire
      br bbr
bbr: release

Aren't you going to eliminate the first acquire and the release, but
not the second acquire?

> +  addPass(PM, createCXAGuardEliminationPass());  // Remove __cxa_guard_* calls.

Are you going to add this to llvm-gcc too?

> +  This pass deletes dead calls to __cxa_guard_acquire and __cxa_guard_release
> +  which are part of the Itanium C++ ABI. T hese are used to prevent a function

T hese -> These

Ciao,

Duncan.


From baldrick at free.fr  Mon May 25 04:44:12 2009
From: baldrick at free.fr (Duncan Sands)
Date: Mon, 25 May 2009 09:44:12 -0000
Subject: [llvm-commits] [klee] r72380 - /klee/trunk/include/klee/Statistic.h
Message-ID: <200905250944.n4P9iPqY007261@zion.cs.uiuc.edu>

Author: baldrick
Date: Mon May 25 04:43:40 2009
New Revision: 72380

URL: http://llvm.org/viewvc/llvm-project?rev=72380&view=rev
Log:
Add include for uint64_t, needed when building with
gcc-4.4.

Modified:
    klee/trunk/include/klee/Statistic.h

Modified: klee/trunk/include/klee/Statistic.h
URL: http://llvm.org/viewvc/llvm-project/klee/trunk/include/klee/Statistic.h?rev=72380&r1=72379&r2=72380&view=diff

==============================================================================
--- klee/trunk/include/klee/Statistic.h (original)
+++ klee/trunk/include/klee/Statistic.h Mon May 25 04:43:40 2009
@@ -10,6 +10,7 @@
 #ifndef KLEE_STATISTIC_H
 #define KLEE_STATISTIC_H
 
+#include "llvm/Support/DataTypes.h"
 #include <string>
 
 namespace klee {




From baldrick at free.fr  Mon May 25 04:51:13 2009
From: baldrick at free.fr (Duncan Sands)
Date: Mon, 25 May 2009 09:51:13 -0000
Subject: [llvm-commits] [klee] r72381 - in /klee/trunk/lib/Solver:
	STPBuilder.cpp Solver.cpp
Message-ID: <200905250951.n4P9pE1K007581@zion.cs.uiuc.edu>

Author: baldrick
Date: Mon May 25 04:50:55 2009
New Revision: 72381

URL: http://llvm.org/viewvc/llvm-project?rev=72381&view=rev
Log:
Add includes to get sprintf (STPBuilder) and
fprintf, stderr etc (Solver) when compiling
with gcc-4.4.

Modified:
    klee/trunk/lib/Solver/STPBuilder.cpp
    klee/trunk/lib/Solver/Solver.cpp

Modified: klee/trunk/lib/Solver/STPBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/klee/trunk/lib/Solver/STPBuilder.cpp?rev=72381&r1=72380&r2=72381&view=diff

==============================================================================
--- klee/trunk/lib/Solver/STPBuilder.cpp (original)
+++ klee/trunk/lib/Solver/STPBuilder.cpp Mon May 25 04:50:55 2009
@@ -18,6 +18,8 @@
 
 #include "llvm/Support/CommandLine.h"
 
+#include <cstdio>
+
 #define vc_bvBoolExtract IAMTHESPAWNOFSATAN
 // unclear return
 #define vc_bvLeftShiftExpr IAMTHESPAWNOFSATAN

Modified: klee/trunk/lib/Solver/Solver.cpp
URL: http://llvm.org/viewvc/llvm-project/klee/trunk/lib/Solver/Solver.cpp?rev=72381&r1=72380&r2=72381&view=diff

==============================================================================
--- klee/trunk/lib/Solver/Solver.cpp (original)
+++ klee/trunk/lib/Solver/Solver.cpp Mon May 25 04:50:55 2009
@@ -24,6 +24,7 @@
 #define vc_bvBoolExtract IAMTHESPAWNOFSATAN
 
 #include <cassert>
+#include <cstdio>
 #include <map>
 #include <vector>
 




From howard0su at gmail.com  Mon May 25 07:58:50 2009
From: howard0su at gmail.com (Howard Su)
Date: Mon, 25 May 2009 20:58:50 +0800
Subject: [llvm-commits] [llvm] r72366 - in /llvm/trunk:
	include/llvm/Analysis/ScalarEvolutionExpander.h
	lib/Analysis/ScalarEvolutionExpander.cpp
	test/Transforms/IndVarSimplify/addrec-gep.ll
	test/Transforms/IndVarSimplify/gep-with-mul-base.ll
In-Reply-To: <200905241806.n4OI6WdF024693@zion.cs.uiuc.edu>
References: <200905241806.n4OI6WdF024693@zion.cs.uiuc.edu>
Message-ID: <f126fae00905250558r52bbd18es1f075068682169ad@mail.gmail.com>

SCEVHandle RestArray[1] = Rest;
should change to SCEVHandle RestArray[1] = {Rest}; otherwise MSVC will
complain this.

On Mon, May 25, 2009 at 2:06 AM, Dan Gohman <gohman at apple.com> wrote:

> Author: djg
> Date: Sun May 24 13:06:31 2009
> New Revision: 72366
>
> URL: http://llvm.org/viewvc/llvm-project?rev=72366&view=rev
> Log:
> Generalize SCEVExpander::visitAddRecExpr's GEP persuit, and avoid
> sending SCEVUnknowns to expandAddToGEP. This avoids the need for
> expandAddToGEP to bend the rules and peek into SCEVUnknown
> expressions.
>
> Factor out the code for testing whether a SCEV can be factored by
> a constant for use in a GEP index. This allows it to handle
> SCEVAddRecExprs, by recursing.
>
> As a result, SCEVExpander can now put more things in GEP indices,
> so it emits fewer explicit mul instructions.
>
> Added:
>    llvm/trunk/test/Transforms/IndVarSimplify/addrec-gep.ll
> Modified:
>    llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpander.h
>    llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp
>    llvm/trunk/test/Transforms/IndVarSimplify/gep-with-mul-base.ll
>
> Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpander.h
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpander.h?rev=72366&r1=72365&r2=72366&view=diff
>
>
> ==============================================================================
> --- llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpander.h (original)
> +++ llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpander.h Sun May 24
> 13:06:31 2009
> @@ -110,8 +110,8 @@
>   private:
>     /// expandAddToGEP - Expand a SCEVAddExpr with a pointer type into a
> GEP
>     /// instead of using ptrtoint+arithmetic+inttoptr.
> -    Value *expandAddToGEP(const SCEVAddExpr *S, const PointerType *PTy,
> -                          const Type *Ty, Value *V);
> +    Value *expandAddToGEP(const SCEVHandle *op_begin, const SCEVHandle
> *op_end,
> +                          const PointerType *PTy, const Type *Ty, Value
> *V);
>
>     Value *expand(const SCEV *S);
>
>
> Modified: llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp?rev=72366&r1=72365&r2=72366&view=diff
>
>
> ==============================================================================
> --- llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp (original)
> +++ llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp Sun May 24 13:06:31
> 2009
> @@ -144,17 +144,89 @@
>   return BO;
>  }
>
> +/// FactorOutConstant - Test if S is evenly divisible by Factor, using
> signed
> +/// division. If so, update S with Factor divided out and return true.
> +/// TODO: When ScalarEvolution gets a SCEVSDivExpr, this can be made
> +/// unnecessary; in its place, just signed-divide Ops[i] by the scale and
> +/// check to see if the divide was folded.
> +static bool FactorOutConstant(SCEVHandle &S,
> +                              const APInt &Factor,
> +                              ScalarEvolution &SE) {
> +  // Everything is divisible by one.
> +  if (Factor == 1)
> +    return true;
> +
> +  // For a Constant, check for a multiple of the given factor.
> +  if (const SCEVConstant *C = dyn_cast<SCEVConstant>(S))
> +    if (!C->getValue()->getValue().srem(Factor)) {
> +      ConstantInt *CI =
> +        ConstantInt::get(C->getValue()->getValue().sdiv(Factor));
> +      SCEVHandle Div = SE.getConstant(CI);
> +      S = Div;
> +      return true;
> +    }
> +
> +  // In a Mul, check if there is a constant operand which is a multiple
> +  // of the given factor.
> +  if (const SCEVMulExpr *M = dyn_cast<SCEVMulExpr>(S))
> +    if (const SCEVConstant *C = dyn_cast<SCEVConstant>(M->getOperand(0)))
> +      if (!C->getValue()->getValue().srem(Factor)) {
> +        std::vector<SCEVHandle> NewMulOps(M->getOperands());
> +        NewMulOps[0] =
> +          SE.getConstant(C->getValue()->getValue().sdiv(Factor));
> +        S = SE.getMulExpr(NewMulOps);
> +        return true;
> +      }
> +
> +  // In an AddRec, check if both start and step are divisible.
> +  if (const SCEVAddRecExpr *A = dyn_cast<SCEVAddRecExpr>(S)) {
> +    SCEVHandle Start = A->getStart();
> +    if (!FactorOutConstant(Start, Factor, SE))
> +      return false;
> +    SCEVHandle Step = A->getStepRecurrence(SE);
> +    if (!FactorOutConstant(Step, Factor, SE))
> +      return false;
> +    S = SE.getAddRecExpr(Start, Step, A->getLoop());
> +    return true;
> +  }
> +
> +  return false;
> +}
> +
>  /// expandAddToGEP - Expand a SCEVAddExpr with a pointer type into a GEP
> -/// instead of using ptrtoint+arithmetic+inttoptr.
> -Value *SCEVExpander::expandAddToGEP(const SCEVAddExpr *S,
> +/// instead of using ptrtoint+arithmetic+inttoptr. This helps
> +/// BasicAliasAnalysis analyze the result. However, it suffers from the
> +/// underlying bug described in PR2831. Addition in LLVM currently always
> +/// has two's complement wrapping guaranteed. However, the semantics for
> +/// getelementptr overflow are ambiguous. In the common case though, this
> +/// expansion gets used when a GEP in the original code has been converted
> +/// into integer arithmetic, in which case the resulting code will be no
> +/// more undefined than it was originally.
> +///
> +/// Design note: It might seem desirable for this function to be more
> +/// loop-aware. If some of the indices are loop-invariant while others
> +/// aren't, it might seem desirable to emit multiple GEPs, keeping the
> +/// loop-invariant portions of the overall computation outside the loop.
> +/// However, there are a few reasons this is not done here. Hoisting
> simple
> +/// arithmetic is a low-level optimization that often isn't very
> +/// important until late in the optimization process. In fact, passes
> +/// like InstructionCombining will combine GEPs, even if it means
> +/// pushing loop-invariant computation down into loops, so even if the
> +/// GEPs were split here, the work would quickly be undone. The
> +/// LoopStrengthReduction pass, which is usually run quite late (and
> +/// after the last InstructionCombining pass), takes care of hoisting
> +/// loop-invariant portions of expressions, after considering what
> +/// can be folded using target addressing modes.
> +///
> +Value *SCEVExpander::expandAddToGEP(const SCEVHandle *op_begin,
> +                                    const SCEVHandle *op_end,
>                                     const PointerType *PTy,
>                                     const Type *Ty,
>                                     Value *V) {
>   const Type *ElTy = PTy->getElementType();
>   SmallVector<Value *, 4> GepIndices;
> -  std::vector<SCEVHandle> Ops = S->getOperands();
> +  std::vector<SCEVHandle> Ops(op_begin, op_end);
>   bool AnyNonZeroIndices = false;
> -  Ops.pop_back();
>
>   // Decend down the pointer's type and attempt to convert the other
>   // operands into GEP indices, at each level. The first index in a GEP
> @@ -167,45 +239,27 @@
>     std::vector<SCEVHandle> NewOps;
>     std::vector<SCEVHandle> ScaledOps;
>     for (unsigned i = 0, e = Ops.size(); i != e; ++i) {
> +      // Split AddRecs up into parts as either of the parts may be usable
> +      // without the other.
> +      if (const SCEVAddRecExpr *A = dyn_cast<SCEVAddRecExpr>(Ops[i]))
> +        if (!A->getStart()->isZero()) {
> +          SCEVHandle Start = A->getStart();
> +          Ops.push_back(SE.getAddRecExpr(SE.getIntegerSCEV(0,
> A->getType()),
> +                                         A->getStepRecurrence(SE),
> +                                         A->getLoop()));
> +          Ops[i] = Start;
> +          ++e;
> +        }
> +      // If the scale size is not 0, attempt to factor out a scale.
>       if (ElSize != 0) {
> -        // For a Constant, check for a multiple of the pointer type's
> -        // scale size.
> -        if (const SCEVConstant *C = dyn_cast<SCEVConstant>(Ops[i]))
> -          if (!C->getValue()->getValue().srem(ElSize)) {
> -            ConstantInt *CI =
> -              ConstantInt::get(C->getValue()->getValue().sdiv(ElSize));
> -            SCEVHandle Div = SE.getConstant(CI);
> -            ScaledOps.push_back(Div);
> -            continue;
> -          }
> -        // In a Mul, check if there is a constant operand which is a
> multiple
> -        // of the pointer type's scale size.
> -        if (const SCEVMulExpr *M = dyn_cast<SCEVMulExpr>(Ops[i]))
> -          if (const SCEVConstant *C =
> dyn_cast<SCEVConstant>(M->getOperand(0)))
> -            if (!C->getValue()->getValue().srem(ElSize)) {
> -              std::vector<SCEVHandle> NewMulOps(M->getOperands());
> -              NewMulOps[0] =
> -                SE.getConstant(C->getValue()->getValue().sdiv(ElSize));
> -              ScaledOps.push_back(SE.getMulExpr(NewMulOps));
> -              continue;
> -            }
> -        // In an Unknown, check if the underlying value is a Mul by a
> constant
> -        // which is equal to the pointer type's scale size.
> -        if (const SCEVUnknown *U = dyn_cast<SCEVUnknown>(Ops[i]))
> -          if (BinaryOperator *BO =
> dyn_cast<BinaryOperator>(U->getValue()))
> -            if (BO->getOpcode() == Instruction::Mul)
> -              if (ConstantInt *CI =
> dyn_cast<ConstantInt>(BO->getOperand(1)))
> -                if (CI->getValue() == ElSize) {
> -                  ScaledOps.push_back(SE.getUnknown(BO->getOperand(0)));
> -                  continue;
> -                }
> -        // If the pointer type's scale size is 1, no scaling is necessary
> -        // and any value can be used.
> -        if (ElSize == 1) {
> -          ScaledOps.push_back(Ops[i]);
> +        SCEVHandle Op = Ops[i];
> +        if (FactorOutConstant(Op, ElSize, SE)) {
> +          ScaledOps.push_back(Op); // Op now has ElSize factored out.
>           continue;
>         }
>       }
> +      // If the operand was not divisible, add it to the list of operands
> +      // we'll scan next iteration.
>       NewOps.push_back(Ops[i]);
>     }
>     Ops = NewOps;
> @@ -292,17 +346,14 @@
>   const Type *Ty = SE.getEffectiveSCEVType(S->getType());
>   Value *V = expand(S->getOperand(S->getNumOperands()-1));
>
> -  // Turn things like ptrtoint+arithmetic+inttoptr into GEP. This helps
> -  // BasicAliasAnalysis analyze the result. However, it suffers from the
> -  // underlying bug described in PR2831. Addition in LLVM currently always
> -  // has two's complement wrapping guaranteed. However, the semantics for
> -  // getelementptr overflow are ambiguous. In the common case though, this
> -  // expansion gets used when a GEP in the original code has been
> converted
> -  // into integer arithmetic, in which case the resulting code will be no
> -  // more undefined than it was originally.
> +  // Turn things like ptrtoint+arithmetic+inttoptr into GEP. See the
> +  // comments on expandAddToGEP for details.
>   if (SE.TD <http://se.td/>)
> -    if (const PointerType *PTy = dyn_cast<PointerType>(V->getType()))
> -      return expandAddToGEP(S, PTy, Ty, V);
> +    if (const PointerType *PTy = dyn_cast<PointerType>(V->getType())) {
> +      const std::vector<SCEVHandle> &Ops = S->getOperands();
> +      return expandAddToGEP(Ops.data(), Ops.data() + Ops.size() - 1,
> +                            PTy, Ty, V);
> +    }
>
>   V = InsertNoopCastOfTo(V, Ty);
>
> @@ -357,6 +408,27 @@
>   return InsertBinop(Instruction::UDiv, LHS, RHS, InsertPt);
>  }
>
> +/// Move parts of Base into Rest to leave Base with the minimal
> +/// expression that provides a pointer operand suitable for a
> +/// GEP expansion.
> +static void ExposePointerBase(SCEVHandle &Base, SCEVHandle &Rest,
> +                              ScalarEvolution &SE) {
> +  while (const SCEVAddRecExpr *A = dyn_cast<SCEVAddRecExpr>(Base)) {
> +    Base = A->getStart();
> +    Rest = SE.getAddExpr(Rest,
> +                         SE.getAddRecExpr(SE.getIntegerSCEV(0,
> A->getType()),
> +                                          A->getStepRecurrence(SE),
> +                                          A->getLoop()));
> +  }
> +  if (const SCEVAddExpr *A = dyn_cast<SCEVAddExpr>(Base)) {
> +    Base = A->getOperand(A->getNumOperands()-1);
> +    std::vector<SCEVHandle> NewAddOps(A->op_begin(), A->op_end());
> +    NewAddOps.back() = Rest;
> +    Rest = SE.getAddExpr(NewAddOps);
> +    ExposePointerBase(Base, Rest, SE);
> +  }
> +}
> +
>  Value *SCEVExpander::visitAddRecExpr(const SCEVAddRecExpr *S) {
>   const Type *Ty = SE.getEffectiveSCEVType(S->getType());
>   const Loop *L = S->getLoop();
> @@ -365,8 +437,25 @@
>   if (!S->getStart()->isZero()) {
>     std::vector<SCEVHandle> NewOps(S->getOperands());
>     NewOps[0] = SE.getIntegerSCEV(0, Ty);
> -    Value *Rest = expand(SE.getAddRecExpr(NewOps, L));
> -    return expand(SE.getAddExpr(S->getStart(), SE.getUnknown(Rest)));
> +    SCEVHandle Rest = SE.getAddRecExpr(NewOps, L);
> +
> +    // Turn things like ptrtoint+arithmetic+inttoptr into GEP. See the
> +    // comments on expandAddToGEP for details.
> +    if (SE.TD <http://se.td/>) {
> +      SCEVHandle Base = S->getStart();
> +      SCEVHandle RestArray[1] = Rest;
> +      // Dig into the expression to find the pointer base for a GEP.
> +      ExposePointerBase(Base, RestArray[0], SE);
> +      // If we found a pointer, expand the AddRec with a GEP.
> +      if (const PointerType *PTy = dyn_cast<PointerType>(Base->getType()))
> {
> +        Value *StartV = expand(Base);
> +        assert(StartV->getType() == PTy && "Pointer type mismatch for
> GEP!");
> +        return expandAddToGEP(RestArray, RestArray+1, PTy, Ty, StartV);
> +      }
> +    }
> +
> +    Value *RestV = expand(Rest);
> +    return expand(SE.getAddExpr(S->getStart(), SE.getUnknown(RestV)));
>   }
>
>   // {0,+,1} --> Insert a canonical induction variable into the loop!
>
> Added: llvm/trunk/test/Transforms/IndVarSimplify/addrec-gep.ll
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IndVarSimplify/addrec-gep.ll?rev=72366&view=auto
>
>
> ==============================================================================
> --- llvm/trunk/test/Transforms/IndVarSimplify/addrec-gep.ll (added)
> +++ llvm/trunk/test/Transforms/IndVarSimplify/addrec-gep.ll Sun May 24
> 13:06:31 2009
> @@ -0,0 +1,78 @@
> +; RUN: llvm-as < %s | opt -indvars | llvm-dis > %t
> +; RUN: grep getelementptr %t | count 1
> +; RUN: grep {mul .*, 37}  %t | count 1
> +; RUN: grep {add .*, 5203}  %t | count 1
> +; RUN: not grep cast %t
> +
> +; This test tests several things. The load and store should use the
> +; same address instead of having it computed twice, and SCEVExpander
> should
> +; be able to reconstruct the full getelementptr, despite it having a few
> +; obstacles set in its way.
> +
> +target datalayout = "e-p:64:64:64"
> +
> +define void @foo(i64 %n, i64 %m, i64 %o, i64 %q, double* nocapture %p)
> nounwind {
> +entry:
> +       %tmp = icmp sgt i64 %n, 0               ; <i1> [#uses=1]
> +       br i1 %tmp, label %bb.nph3, label %return
> +
> +bb.nph:                ; preds = %bb2.preheader
> +       %tmp1 = mul i64 %tmp16, %i.02           ; <i64> [#uses=1]
> +       %tmp2 = mul i64 %tmp19, %i.02           ; <i64> [#uses=1]
> +       br label %bb1
> +
> +bb1:           ; preds = %bb2, %bb.nph
> +       %j.01 = phi i64 [ %tmp9, %bb2 ], [ 0, %bb.nph ]         ; <i64>
> [#uses=3]
> +       %tmp3 = add i64 %j.01, %tmp1            ; <i64> [#uses=1]
> +       %tmp4 = add i64 %j.01, %tmp2            ; <i64> [#uses=1]
> +        %z0 = add i64 %tmp4, 5203
> +       %tmp5 = getelementptr double* %p, i64 %z0               ; <double*>
> [#uses=1]
> +       %tmp6 = load double* %tmp5, align 8             ; <double>
> [#uses=1]
> +       %tmp7 = fdiv double %tmp6, 2.100000e+00         ; <double>
> [#uses=1]
> +        %z1 = add i64 %tmp4, 5203
> +       %tmp8 = getelementptr double* %p, i64 %z1               ; <double*>
> [#uses=1]
> +       store double %tmp7, double* %tmp8, align 8
> +       %tmp9 = add i64 %j.01, 1                ; <i64> [#uses=2]
> +       br label %bb2
> +
> +bb2:           ; preds = %bb1
> +       %tmp10 = icmp slt i64 %tmp9, %m         ; <i1> [#uses=1]
> +       br i1 %tmp10, label %bb1, label %bb2.bb3_crit_edge
> +
> +bb2.bb3_crit_edge:             ; preds = %bb2
> +       br label %bb3
> +
> +bb3:           ; preds = %bb2.preheader, %bb2.bb3_crit_edge
> +       %tmp11 = add i64 %i.02, 1               ; <i64> [#uses=2]
> +       br label %bb4
> +
> +bb4:           ; preds = %bb3
> +       %tmp12 = icmp slt i64 %tmp11, %n                ; <i1> [#uses=1]
> +       br i1 %tmp12, label %bb2.preheader, label %bb4.return_crit_edge
> +
> +bb4.return_crit_edge:          ; preds = %bb4
> +       br label %bb4.return_crit_edge.split
> +
> +bb4.return_crit_edge.split:            ; preds = %bb.nph3,
> %bb4.return_crit_edge
> +       br label %return
> +
> +bb.nph3:               ; preds = %entry
> +       %tmp13 = icmp sgt i64 %m, 0             ; <i1> [#uses=1]
> +       %tmp14 = mul i64 %n, 37         ; <i64> [#uses=1]
> +       %tmp15 = mul i64 %tmp14, %o             ; <i64> [#uses=1]
> +       %tmp16 = mul i64 %tmp15, %q             ; <i64> [#uses=1]
> +       %tmp17 = mul i64 %n, 37         ; <i64> [#uses=1]
> +       %tmp18 = mul i64 %tmp17, %o             ; <i64> [#uses=1]
> +       %tmp19 = mul i64 %tmp18, %q             ; <i64> [#uses=1]
> +       br i1 %tmp13, label %bb.nph3.split, label
> %bb4.return_crit_edge.split
> +
> +bb.nph3.split:         ; preds = %bb.nph3
> +       br label %bb2.preheader
> +
> +bb2.preheader:         ; preds = %bb.nph3.split, %bb4
> +       %i.02 = phi i64 [ %tmp11, %bb4 ], [ 0, %bb.nph3.split ]         ;
> <i64> [#uses=3]
> +       br i1 true, label %bb.nph, label %bb3
> +
> +return:                ; preds = %bb4.return_crit_edge.split, %entry
> +       ret void
> +}
>
> Modified: llvm/trunk/test/Transforms/IndVarSimplify/gep-with-mul-base.ll
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IndVarSimplify/gep-with-mul-base.ll?rev=72366&r1=72365&r2=72366&view=diff
>
>
> ==============================================================================
> --- llvm/trunk/test/Transforms/IndVarSimplify/gep-with-mul-base.ll
> (original)
> +++ llvm/trunk/test/Transforms/IndVarSimplify/gep-with-mul-base.ll Sun May
> 24 13:06:31 2009
> @@ -1,6 +1,6 @@
>  ; RUN: llvm-as < %s | opt -indvars | llvm-dis > %t
>  ; RUN: grep add %t | count 8
> -; RUN: grep mul %t | count 9
> +; RUN: grep mul %t | count 7
>
>  define void @foo(i64 %n, i64 %m, i64 %o, double* nocapture %p) nounwind {
>  entry:
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>



-- 
-Howard
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From howard0su at gmail.com  Mon May 25 10:11:54 2009
From: howard0su at gmail.com (Howard Su)
Date: Mon, 25 May 2009 23:11:54 +0800
Subject: [llvm-commits] [Patch] Consolidate COFF definitions
Message-ID: <f126fae00905250811y53da82d5u2acded346a19cfd@mail.gmail.com>

I noticed there are two pieces of COFF definitions in the tree. not sure if
we can merge them. The patch only be tested by compiling.

-- 
-Howard
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From anton at korobeynikov.info  Mon May 25 10:20:34 2009
From: anton at korobeynikov.info (Anton Korobeynikov)
Date: Mon, 25 May 2009 19:20:34 +0400
Subject: [llvm-commits] [Patch] Consolidate COFF definitions
In-Reply-To: <f126fae00905250811y53da82d5u2acded346a19cfd@mail.gmail.com>
References: <f126fae00905250811y53da82d5u2acded346a19cfd@mail.gmail.com>
Message-ID: <b087fca00905250820g1ad0f857g8c31ba6293428b1e@mail.gmail.com>

Hello, Howard

> I noticed there are two pieces of COFF definitions in the tree. not sure if
> we can merge them. The patch only be tested by compiling.
Please use the common code style for the whole file. The second part
(machine type) is definitely formatted improperly.

-- 
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University


From howard0su at gmail.com  Mon May 25 10:25:17 2009
From: howard0su at gmail.com (Howard Su)
Date: Mon, 25 May 2009 23:25:17 +0800
Subject: [llvm-commits] [Patch] Consolidate COFF definitions
In-Reply-To: <b087fca00905250820g1ad0f857g8c31ba6293428b1e@mail.gmail.com>
References: <f126fae00905250811y53da82d5u2acded346a19cfd@mail.gmail.com>
	<b087fca00905250820g1ad0f857g8c31ba6293428b1e@mail.gmail.com>
Message-ID: <f126fae00905250825y2f5226c3k4989e5f615aa5db1@mail.gmail.com>

I will if we think this is right direction. Thank you point out.

On Mon, May 25, 2009 at 11:20 PM, Anton Korobeynikov <
anton at korobeynikov.info> wrote:

> Hello, Howard
>
> > I noticed there are two pieces of COFF definitions in the tree. not sure
> if
> > we can merge them. The patch only be tested by compiling.
> Please use the common code style for the whole file. The second part
> (machine type) is definitely formatted improperly.
>
> --
> With best regards, Anton Korobeynikov
> Faculty of Mathematics and Mechanics, Saint Petersburg State University
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>



-- 
-Howard
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From sabre at nondot.org  Mon May 25 11:34:48 2009
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 25 May 2009 16:34:48 -0000
Subject: [llvm-commits] [llvm] r72387 - /llvm/trunk/lib/Target/X86/README.txt
Message-ID: <200905251634.n4PGYnK1022383@zion.cs.uiuc.edu>

Author: lattner
Date: Mon May 25 11:34:44 2009
New Revision: 72387

URL: http://llvm.org/viewvc/llvm-project?rev=72387&view=rev
Log:
we should eventually add -march=atom and the new atom movbe instruction.

Modified:
    llvm/trunk/lib/Target/X86/README.txt

Modified: llvm/trunk/lib/Target/X86/README.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README.txt?rev=72387&r1=72386&r2=72387&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/README.txt (original)
+++ llvm/trunk/lib/Target/X86/README.txt Mon May 25 11:34:44 2009
@@ -2,6 +2,8 @@
 // Random ideas for the X86 backend.
 //===---------------------------------------------------------------------===//
 
+We should add support for the "movbe" instruction, which does a byte-swapping
+copy (3-addr bswap + memory support?)  This is available on Atom processors.
 
 //===---------------------------------------------------------------------===//
 




From evan.cheng at apple.com  Mon May 25 13:25:41 2009
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 25 May 2009 11:25:41 -0700
Subject: [llvm-commits] [llvm] r72336 - in /llvm/trunk/lib/Target/ARM:
	ARMBuildAttrs.h AsmPrinter/ARMAsmPrinter.cpp
In-Reply-To: <200905231951.n4NJpKgo001853@zion.cs.uiuc.edu>
References: <200905231951.n4NJpKgo001853@zion.cs.uiuc.edu>
Message-ID: <56CF3E38-89FD-4E34-B30E-AA6D4AA2E91D@apple.com>


On May 23, 2009, at 12:51 PM, Anton Korobeynikov wrote:

> Author: asl
> Date: Sat May 23 14:51:20 2009
> New Revision: 72336
>
> URL: http://llvm.org/viewvc/llvm-project?rev=72336&view=rev
> Log:
> Emit ARM Build Attributes
>
> Added:
>    llvm/trunk/lib/Target/ARM/ARMBuildAttrs.h
> Modified:
>    llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
>
> Added: llvm/trunk/lib/Target/ARM/ARMBuildAttrs.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBuildAttrs.h?rev=72336&view=auto
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/ARM/ARMBuildAttrs.h (added)
> +++ llvm/trunk/lib/Target/ARM/ARMBuildAttrs.h Sat May 23 14:51:20 2009
> @@ -0,0 +1,64 @@
> +//===-------- ARMBuildAttrs.h - ARM Build Attributes ------------*-  
> C++ -*-===//
> +//
> +//                     The LLVM Compiler Infrastructure
> +//
> +// This file is distributed under the University of Illinois Open  
> Source
> +// License. See LICENSE.TXT for details.
> +//
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +//
> +// This file contains enumerations amd support routines for ARM  
> build attributes

"amd"? What does it stand for?

Evan

>
> +// as defined in ARM ABI addenda document (ABI release 2.07).
> +//
> +// 
> = 
> = 
> = 
> ----------------------------------------------------------------------= 
> ==//
> +
> +#ifndef __TARGET_ARMBUILDATTRS_H__
> +#define __TARGET_ARMBUILDATTRS_H__
> +
> +namespace ARMBuildAttrs {
> +  enum {
> +    File                      = 1,
> +    Section                   = 2,
> +    Symbol                    = 3,
> +    CPU_raw_name              = 4,
> +    CPU_name                  = 5,
> +    CPU_arch                  = 6,
> +    CPU_arch_profile          = 7,
> +    ARM_ISA_use               = 8,
> +    THUMB_ISA_use             = 9,
> +    VFP_arch                  = 10,
> +    WMMX_arch                 = 11,
> +    Advanced_SIMD_arch        = 12,
> +    PCS_config                = 13,
> +    ABI_PCS_R9_use            = 14,
> +    ABI_PCS_RW_data           = 15,
> +    ABI_PCS_RO_data           = 16,
> +    ABI_PCS_GOT_use           = 17,
> +    ABI_PCS_wchar_t           = 18,
> +    ABI_FP_rounding           = 19,
> +    ABI_FP_denormal           = 20,
> +    ABI_FP_exceptions         = 21,
> +    ABI_FP_user_exceptions    = 22,
> +    ABI_FP_number_model       = 23,
> +    ABI_align8_needed         = 24,
> +    ABI_align8_preserved      = 25,
> +    ABI_enum_size             = 26,
> +    ABI_HardFP_use            = 27,
> +    ABI_VFP_args              = 28,
> +    ABI_WMMX_args             = 29,
> +    ABI_optimization_goals    = 30,
> +    ABI_FP_optimization_goals = 31,
> +    compatibility             = 32,
> +    CPU_unaligned_access      = 34,
> +    VFP_HP_extension          = 36,
> +    ABI_FP_16bit_format       = 38,
> +    nodefaults                = 64,
> +    also_compatible_with      = 65,
> +    T2EE_use                  = 66,
> +    conformance               = 67,
> +    Virtualization_use        = 68,
> +    MPextension_use           = 70
> +  };
> +}
> +
> +#endif // __TARGET_ARMBUILDATTRS_H__
>
> Modified: llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp?rev=72336&r1=72335&r2=72336&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp Sat May  
> 23 14:51:20 2009
> @@ -14,6 +14,7 @@
>
> #define DEBUG_TYPE "asm-printer"
> #include "ARM.h"
> +#include "ARMBuildAttrs.h"
> #include "ARMTargetMachine.h"
> #include "ARMAddressingModes.h"
> #include "ARMConstantPoolValue.h"
> @@ -816,6 +817,32 @@
>   if (Subtarget->isTargetDarwin())
>     Mang->setUseQuotes(true);
>
> +  // Emit ARM Build Attributes
> +  if (Subtarget->isTargetELF()) {
> +    // CPU Type
> +    O << "\t.cpu " << Subtarget->getCPUString() << '\n';
> +
> +    // FIXME: Emit FPU type
> +    if (Subtarget->hasVFP2())
> +      O << "\t.eabi_attribute " << ARMBuildAttrs::VFP_arch << ",  
> 2\n";
> +
> +    // Signal various FP modes.
> +    if (!UnsafeFPMath)
> +      O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_denormal  
> << ", 1\n"
> +        << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_exceptions  
> << ", 1\n";
> +
> +    if (FiniteOnlyFPMath())
> +      O << "\t.eabi_attribute " <<  
> ARMBuildAttrs::ABI_FP_number_model << ", 1\n";
> +    else
> +      O << "\t.eabi_attribute " <<  
> ARMBuildAttrs::ABI_FP_number_model << ", 3\n";
> +
> +    // 8-bytes alignment stuff.
> +    O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_align8_needed  
> << ", 1\n"
> +      << "\t.eabi_attribute " <<  
> ARMBuildAttrs::ABI_align8_preserved << ", 1\n";
> +
> +    // FIXME: Should we signal R9 usage?
> +  }
> +
>   return Result;
> }
>
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From anton at korobeynikov.info  Mon May 25 13:33:19 2009
From: anton at korobeynikov.info (Anton Korobeynikov)
Date: Mon, 25 May 2009 22:33:19 +0400
Subject: [llvm-commits] [llvm] r72336 - in /llvm/trunk/lib/Target/ARM:
	ARMBuildAttrs.h AsmPrinter/ARMAsmPrinter.cpp
In-Reply-To: <56CF3E38-89FD-4E34-B30E-AA6D4AA2E91D@apple.com>
References: <200905231951.n4NJpKgo001853@zion.cs.uiuc.edu>
	<56CF3E38-89FD-4E34-B30E-AA6D4AA2E91D@apple.com>
Message-ID: <b087fca00905251133x762d0602ge3798414ce17ebcb@mail.gmail.com>

> "amd"? What does it stand for?
It stands for "and" :)

-- 
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University


From sabre at nondot.org  Mon May 25 14:51:24 2009
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 25 May 2009 19:51:24 -0000
Subject: [llvm-commits] [llvm] r72395 -
	/llvm/trunk/lib/Target/ARM/ARMBuildAttrs.h
Message-ID: <200905251951.n4PJpSjM030026@zion.cs.uiuc.edu>

Author: lattner
Date: Mon May 25 14:51:07 2009
New Revision: 72395

URL: http://llvm.org/viewvc/llvm-project?rev=72395&view=rev
Log:
fix typo

Modified:
    llvm/trunk/lib/Target/ARM/ARMBuildAttrs.h

Modified: llvm/trunk/lib/Target/ARM/ARMBuildAttrs.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBuildAttrs.h?rev=72395&r1=72394&r2=72395&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBuildAttrs.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMBuildAttrs.h Mon May 25 14:51:07 2009
@@ -7,7 +7,7 @@
 //
 //===----------------------------------------------------------------------===//
 //
-// This file contains enumerations amd support routines for ARM build attributes
+// This file contains enumerations and support routines for ARM build attributes
 // as defined in ARM ABI addenda document (ABI release 2.07).
 //
 //===----------------------------------------------------------------------===//




From sabre at nondot.org  Mon May 25 15:28:45 2009
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 25 May 2009 20:28:45 -0000
Subject: [llvm-commits] [llvm] r72396 - /llvm/trunk/lib/Target/X86/README.txt
Message-ID: <200905252028.n4PKSljV031663@zion.cs.uiuc.edu>

Author: lattner
Date: Mon May 25 15:28:19 2009
New Revision: 72396

URL: http://llvm.org/viewvc/llvm-project?rev=72396&view=rev
Log:
add some late optimizations that GCC does.  It thinks these are a win
even on Core2, not just AMD processors which was a surprise to me.

Modified:
    llvm/trunk/lib/Target/X86/README.txt

Modified: llvm/trunk/lib/Target/X86/README.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README.txt?rev=72396&r1=72395&r2=72396&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/README.txt (original)
+++ llvm/trunk/lib/Target/X86/README.txt Mon May 25 15:28:19 2009
@@ -1883,3 +1883,17 @@
 fall back to lower-granularity chunks.
 
 //===---------------------------------------------------------------------===//
+
+Implement processor-specific optimizations for parity with GCC on these
+processors.  GCC does two optimizations:
+
+1. ix86_pad_returns inserts a noop before ret instructions if immediately
+   preceeded by a conditional branch or is the target of a jump.
+2. ix86_avoid_jump_misspredicts inserts noops in cases where a 16-byte block of
+   code contains more than 3 branches.
+   
+The first one is done for all AMDs, Core2, and "Generic"
+The second one is done for: Atom, Pentium Pro, all AMDs, Pentium 4, Nocona,
+  Core 2, and "Generic"
+
+//===---------------------------------------------------------------------===//




From mai4 at uiuc.edu  Mon May 25 15:57:02 2009
From: mai4 at uiuc.edu (Haohui Mai)
Date: Mon, 25 May 2009 20:57:02 -0000
Subject: [llvm-commits] [poolalloc] r72397 -
	/poolalloc/trunk/lib/DSA/Local.cpp
Message-ID: <200905252057.n4PKv2tV032713@zion.cs.uiuc.edu>

Author: mai4
Date: Mon May 25 15:57:01 2009
New Revision: 72397

URL: http://llvm.org/viewvc/llvm-project?rev=72397&view=rev
Log:
Preliminary handling of global aliases.


Modified:
    poolalloc/trunk/lib/DSA/Local.cpp

Modified: poolalloc/trunk/lib/DSA/Local.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/Local.cpp?rev=72397&r1=72396&r2=72397&view=diff

==============================================================================
--- poolalloc/trunk/lib/DSA/Local.cpp (original)
+++ poolalloc/trunk/lib/DSA/Local.cpp Mon May 25 15:57:01 2009
@@ -216,7 +216,12 @@
     } else if (isa<UndefValue>(C)) {
       G.eraseNodeForValue(V);
       return 0;
+    } else if (isa<GlobalAlias>(C)) {
+      // XXX: Need more investigation
+      NH = getValueDest(*(dynamic_cast<GlobalAlias*>(C)->getAliasee()));
+      return 0;
     } else {
+      llvm::cerr << "Unknown constant: " << *C << std::endl;
       assert(0 && "Unknown constant type!");
     }
     N = createNode(); // just create a shadow node
@@ -335,8 +340,8 @@
 }
 
 void GraphBuilder::visitIntToPtrInst(IntToPtrInst &I) {
-  std::cerr << "cast in " << I.getParent()->getParent()->getName() << "\n";
-  I.dump();
+//  std::cerr << "cast in " << I.getParent()->getParent()->getName() << "\n";
+//  I.dump();
   setDestTo(I, createNode()->setUnknownMarker()->setIntToPtrMarker()); 
 }
 




From mai4 at uiuc.edu  Mon May 25 15:58:52 2009
From: mai4 at uiuc.edu (Haohui Mai)
Date: Mon, 25 May 2009 20:58:52 -0000
Subject: [llvm-commits] [poolalloc] r72398 - in /poolalloc/trunk:
 include/dsa/DataStructure.h lib/DSA/Basic.cpp
Message-ID: <200905252058.n4PKwqmv000332@zion.cs.uiuc.edu>

Author: mai4
Date: Mon May 25 15:58:52 2009
New Revision: 72398

URL: http://llvm.org/viewvc/llvm-project?rev=72398&view=rev
Log:
Add a basic version of DSA which assumes all pointers points to every possible
objects.

Added:
    poolalloc/trunk/lib/DSA/Basic.cpp
Modified:
    poolalloc/trunk/include/dsa/DataStructure.h

Modified: poolalloc/trunk/include/dsa/DataStructure.h
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/dsa/DataStructure.h?rev=72398&r1=72397&r2=72398&view=diff

==============================================================================
--- poolalloc/trunk/include/dsa/DataStructure.h (original)
+++ poolalloc/trunk/include/dsa/DataStructure.h Mon May 25 15:58:52 2009
@@ -170,6 +170,24 @@
   void copyValue(Value *From, Value *To);
 };
 
+// BasicDataStructures - The analysis is a dummy one -- all pointers can points
+// to all possible locations.
+//
+class BasicDataStructures : public DataStructures {
+public:
+  static char ID;
+  BasicDataStructures() : DataStructures((intptr_t)&ID, "basic.") {}
+  ~BasicDataStructures() { releaseMemory(); }
+
+  virtual bool runOnModule(Module &M);
+
+  /// getAnalysisUsage - This obviously provides a data structure graph.
+  ///
+  virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+    AU.addRequired<TargetData>();
+    AU.setPreservesAll();
+  }
+};
 
 // LocalDataStructures - The analysis that computes the local data structure
 // graphs for all of the functions in the program.

Added: poolalloc/trunk/lib/DSA/Basic.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/Basic.cpp?rev=72398&view=auto

==============================================================================
--- poolalloc/trunk/lib/DSA/Basic.cpp (added)
+++ poolalloc/trunk/lib/DSA/Basic.cpp Mon May 25 15:58:52 2009
@@ -0,0 +1,73 @@
+//===- Basic.cpp ----------------------------------------------------------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// Implementation of the basic data structure analysis pass. It simply assumes
+// that all pointers can points to all possible locations.
+//
+//===----------------------------------------------------------------------===//
+
+#include "dsa/DataStructure.h"
+#include "dsa/DSGraph.h"
+
+#include "llvm/Module.h"
+#include "llvm/DerivedTypes.h"
+#include "llvm/Constants.h"
+#include "llvm/Instructions.h"
+#include "llvm/Intrinsics.h"
+#include "llvm/Support/InstIterator.h"
+#include "llvm/Support/InstVisitor.h"
+#include "llvm/Support/GetElementPtrTypeIterator.h"
+
+using namespace llvm;
+
+static RegisterPass<BasicDataStructures>
+X("dsa-basic", "Basic Data Structure Analysis(No Analysis)");
+
+char BasicDataStructures::ID = 0;
+
+bool BasicDataStructures::runOnModule(Module &M) {
+  init(&getAnalysis<TargetData>());
+
+  DSNode * GVNodeInternal = new DSNode(PointerType::getUnqual(Type::Int8Ty), GlobalsGraph);
+  DSNode * GVNodeExternal = new DSNode(PointerType::getUnqual(Type::Int8Ty), GlobalsGraph);
+  for (Module::global_iterator I = M.global_begin(), E = M.global_end();
+       I != E; ++I) {
+    if (I->isDeclaration()) {
+      GlobalsGraph->getNodeForValue(&*I).mergeWith(GVNodeExternal);
+    } else {
+      GlobalsGraph->getNodeForValue(&*I).mergeWith(GVNodeInternal);
+    }
+  }
+
+  GVNodeInternal->foldNodeCompletely();
+  GVNodeInternal->maskNodeTypes(DSNode::IncompleteNode);
+
+  GVNodeExternal->foldNodeCompletely();
+
+  // Next step, iterate through the nodes in the globals graph, unioning
+  // together the globals into equivalence classes.
+  formGlobalECs();
+
+  for (Module::iterator F = M.begin(), E = M.end(); F != E; ++F) {
+    if (!F->isDeclaration()) {
+      DSGraph* G = new DSGraph(GlobalECs, getTargetData(), GlobalsGraph);
+      DSNode * Node = new DSNode(PointerType::getUnqual(Type::Int8Ty), G);
+      for (inst_iterator I = inst_begin(F), E = inst_end(F); I != E; ++I) {
+        G->getNodeForValue(&*I).mergeWith(Node);
+      }
+
+      Node->foldNodeCompletely();
+      Node->maskNodeTypes(DSNode::IncompleteNode);
+
+      setDSGraph(*F, G);
+    }
+  }
+ 
+  return false;
+}




From mai4 at uiuc.edu  Mon May 25 15:59:22 2009
From: mai4 at uiuc.edu (Haohui Mai)
Date: Mon, 25 May 2009 20:59:22 -0000
Subject: [llvm-commits] [poolalloc] r72399 - in /poolalloc/trunk:
 include/poolalloc/PoolAllocate.h lib/PoolAllocate/PASimple.cpp
Message-ID: <200905252059.n4PKxMMA000362@zion.cs.uiuc.edu>

Author: mai4
Date: Mon May 25 15:59:22 2009
New Revision: 72399

URL: http://llvm.org/viewvc/llvm-project?rev=72399&view=rev
Log:
Made simple pool allocation work with basic DSA analysis.

Modified:
    poolalloc/trunk/include/poolalloc/PoolAllocate.h
    poolalloc/trunk/lib/PoolAllocate/PASimple.cpp

Modified: poolalloc/trunk/include/poolalloc/PoolAllocate.h
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/poolalloc/PoolAllocate.h?rev=72399&r1=72398&r2=72399&view=diff

==============================================================================
--- poolalloc/trunk/include/poolalloc/PoolAllocate.h (original)
+++ poolalloc/trunk/include/poolalloc/PoolAllocate.h Mon May 25 15:59:22 2009
@@ -431,9 +431,10 @@
   DSGraph * CombinedDSGraph;
   EquivalenceClasses<const GlobalValue*> GlobalECs;
   TargetData * TD;
+  bool CompleteDSA;
 public:
   static char ID;
-  PoolAllocateSimple(bool passAllArgs=false, bool SAFECode = true)
+  PoolAllocateSimple(bool passAllArgs=false, bool SAFECode = true, bool CompleteDSA = true)
     : PoolAllocate (passAllArgs, SAFECode, (intptr_t)&ID) {}
   ~PoolAllocateSimple() {return;}
   void getAnalysisUsage(AnalysisUsage &AU) const;
@@ -458,7 +459,8 @@
   virtual Value * getPool (const DSNode * N, Function & F) {
     return TheGlobalPool;
   }
-  };
+};
+
 }
 
 #endif

Modified: poolalloc/trunk/lib/PoolAllocate/PASimple.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/PoolAllocate/PASimple.cpp?rev=72399&r1=72398&r2=72399&view=diff

==============================================================================
--- poolalloc/trunk/lib/PoolAllocate/PASimple.cpp (original)
+++ poolalloc/trunk/lib/PoolAllocate/PASimple.cpp Mon May 25 15:59:22 2009
@@ -72,9 +72,14 @@
 
 void PoolAllocateSimple::getAnalysisUsage(AnalysisUsage &AU) const {
   AU.addRequired<TargetData>();
-  AU.addRequiredTransitive<EQTDDataStructures>();
-
-  AU.addPreserved<EQTDDataStructures>();
+  // Get the Target Data information and the Graphs
+  if (CompleteDSA) {
+    AU.addRequiredTransitive<EQTDDataStructures>();
+    AU.addPreserved<EQTDDataStructures>();
+  } else {
+    AU.addRequiredTransitive<BasicDataStructures>();
+    AU.addPreserved<BasicDataStructures>();
+  }
 
   AU.setPreservesAll();
 }
@@ -100,22 +105,17 @@
   if (M.begin() == M.end()) return false;
 
   // Get the Target Data information and the Graphs
-  Graphs = &getAnalysis<EQTDDataStructures>();   // folded inlined CBU graphs
-  assert (Graphs && "No ECGraphs pass available!\n");
+  if (CompleteDSA) {
+    Graphs = &getAnalysis<EQTDDataStructures>();
+  } else {
+    Graphs = &getAnalysis<BasicDataStructures>();
+  }
+  assert (Graphs && "No DSA pass available!\n");
   TargetData & TD = getAnalysis<TargetData>();
 
   // Add the pool* prototypes to the module
   AddPoolPrototypes(&M);
 
-  // Get the main function to insert the poolinit calls.
-  Function *MainFunc = (M.getFunction("main") ? M.getFunction("main")
-                                              : M.getFunction("MAIN__"));
-  if (MainFunc == 0 || MainFunc->isDeclaration()) {
-    std::cerr << "Cannot pool allocate this program: it has global "
-              << "pools but no 'main' function yet!\n";
-    return true;
-  }
-
   //
   // Merge all of the DSNodes in the DSGraphs.
   //
@@ -370,4 +370,3 @@
   ReturnInst::Create(BB);
   return GV;
 }
-




From anton at korobeynikov.info  Mon May 25 16:01:25 2009
From: anton at korobeynikov.info (Anton Korobeynikov)
Date: Tue, 26 May 2009 01:01:25 +0400
Subject: [llvm-commits] [poolalloc] r72397 -
	/poolalloc/trunk/lib/DSA/Local.cpp
In-Reply-To: <200905252057.n4PKv2tV032713@zion.cs.uiuc.edu>
References: <200905252057.n4PKv2tV032713@zion.cs.uiuc.edu>
Message-ID: <b087fca00905251401l3b77cf96q84ef1790fb249b18@mail.gmail.com>

Hello,

> + ? ?} else if (isa<GlobalAlias>(C)) {
> + ? ? ?// XXX: Need more investigation
> + ? ? ?NH = getValueDest(*(dynamic_cast<GlobalAlias*>(C)->getAliasee()));
I think you want to use cast<> here (see
http://llvm.org/docs/ProgrammersManual.html#isa)

-- 
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University



From mai4 at uiuc.edu  Mon May 25 16:19:12 2009
From: mai4 at uiuc.edu (Haohui Mai)
Date: Mon, 25 May 2009 21:19:12 -0000
Subject: [llvm-commits] [poolalloc] r72400 -
	/poolalloc/trunk/lib/DSA/Local.cpp
Message-ID: <200905252119.n4PLJCpm001839@zion.cs.uiuc.edu>

Author: mai4
Date: Mon May 25 16:19:11 2009
New Revision: 72400

URL: http://llvm.org/viewvc/llvm-project?rev=72400&view=rev
Log:
Add some comments to describle the patch more concretely.

Replace dynamic_cast<> with cast<> to match the coding convetions. Thanks to Anton Korobeynikov.


Modified:
    poolalloc/trunk/lib/DSA/Local.cpp

Modified: poolalloc/trunk/lib/DSA/Local.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/Local.cpp?rev=72400&r1=72399&r2=72400&view=diff

==============================================================================
--- poolalloc/trunk/lib/DSA/Local.cpp (original)
+++ poolalloc/trunk/lib/DSA/Local.cpp Mon May 25 16:19:11 2009
@@ -218,7 +218,10 @@
       return 0;
     } else if (isa<GlobalAlias>(C)) {
       // XXX: Need more investigation
-      NH = getValueDest(*(dynamic_cast<GlobalAlias*>(C)->getAliasee()));
+      // According to Andrew, DSA is broken on global aliasing, since it does
+      // not handle the aliases of parameters correctly. Here is only a quick
+      // fix for some special cases.
+      NH = getValueDest(*(cast<GlobalAlias>(C)->getAliasee()));
       return 0;
     } else {
       llvm::cerr << "Unknown constant: " << *C << std::endl;




From haohui.mai at gmail.com  Mon May 25 16:09:40 2009
From: haohui.mai at gmail.com (Mai, Haohui)
Date: Mon, 25 May 2009 16:09:40 -0500
Subject: [llvm-commits] [poolalloc] r72397 -
 /poolalloc/trunk/lib/DSA/Local.cpp
In-Reply-To: <b087fca00905251401l3b77cf96q84ef1790fb249b18@mail.gmail.com>
References: <200905252057.n4PKv2tV032713@zion.cs.uiuc.edu>
	<b087fca00905251401l3b77cf96q84ef1790fb249b18@mail.gmail.com>
Message-ID: <1243285780.6616.0.camel@haohui-laptop>

I think you're right.

Thanks for pointing out the issue.

Haohui

On Tue, 2009-05-26 at 01:01 +0400, Anton Korobeynikov wrote:
> Hello,
> 
> > +    } else if (isa<GlobalAlias>(C)) {
> > +      // XXX: Need more investigation
> > +      NH = getValueDest(*(dynamic_cast<GlobalAlias*>(C)->getAliasee()));
> I think you want to use cast<> here (see
> http://llvm.org/docs/ProgrammersManual.html#isa)
> 



From nicholas at mxc.ca  Mon May 25 16:28:11 2009
From: nicholas at mxc.ca (Nick Lewycky)
Date: Mon, 25 May 2009 21:28:11 -0000
Subject: [llvm-commits] [llvm] r72402 - /llvm/trunk/lib/VMCore/Type.cpp
Message-ID: <200905252128.n4PLSBQQ002224@zion.cs.uiuc.edu>

Author: nicholas
Date: Mon May 25 16:28:11 2009
New Revision: 72402

URL: http://llvm.org/viewvc/llvm-project?rev=72402&view=rev
Log:
Audit the type constructors. Previously it was possible to create [0 x void]
or use labels as members of structures for example. Also included a couple of
whitespace fixes.

Modified:
    llvm/trunk/lib/VMCore/Type.cpp

Modified: llvm/trunk/lib/VMCore/Type.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Type.cpp?rev=72402&r1=72401&r2=72402&view=diff

==============================================================================
--- llvm/trunk/lib/VMCore/Type.cpp (original)
+++ llvm/trunk/lib/VMCore/Type.cpp Mon May 25 16:28:11 2009
@@ -322,15 +322,15 @@
   ContainedTys = reinterpret_cast<PATypeHandle*>(this+1);
   NumContainedTys = Params.size() + 1; // + 1 for result type
   assert(isValidReturnType(Result) && "invalid return type for function");
-    
-    
+
+
   bool isAbstract = Result->isAbstract();
   new (&ContainedTys[0]) PATypeHandle(Result, this);
 
   for (unsigned i = 0; i != Params.size(); ++i) {
     assert((Params[i]->isFirstClassType() || isa<OpaqueType>(Params[i])) &&
            "Function arguments must be value types!");
-    new (&ContainedTys[i+1]) PATypeHandle(Params[i],this);
+    new (&ContainedTys[i+1]) PATypeHandle(Params[i], this);
     isAbstract |= Params[i]->isAbstract();
   }
 
@@ -345,8 +345,10 @@
   setSubclassData(isPacked);
   bool isAbstract = false;
   for (unsigned i = 0; i < Types.size(); ++i) {
-    assert(Types[i] != Type::VoidTy && "Void type for structure field!!");
-     new (&ContainedTys[i]) PATypeHandle(Types[i], this);
+    assert(Types[i] && "<null> type for structure field!");
+    assert(Types[i] != Type::VoidTy && "Void type for structure field!");
+    assert(Types[i] != Type::LabelTy && "Label type for structure field!");
+    new (&ContainedTys[i]) PATypeHandle(Types[i], this);
     isAbstract |= Types[i]->isAbstract();
   }
 
@@ -1038,7 +1040,9 @@
 
 
 ArrayType *ArrayType::get(const Type *ElementType, uint64_t NumElements) {
-  assert(ElementType && "Can't get array of null types!");
+  assert(ElementType && "Can't get array of <null> types!");
+  assert(ElementType != Type::VoidTy && "Array of void is not valid!");
+  assert(ElementType != Type::LabelTy && "Array of labels is not valid!");
 
   ArrayValType AVT(ElementType, NumElements);
   ArrayType *AT = ArrayTypes->get(AVT);
@@ -1082,7 +1086,7 @@
 
 
 VectorType *VectorType::get(const Type *ElementType, unsigned NumElements) {
-  assert(ElementType && "Can't get vector of null types!");
+  assert(ElementType && "Can't get vector of <null> types!");
 
   VectorValType PVT(ElementType, NumElements);
   VectorType *PT = VectorTypes->get(PVT);




From sabre at nondot.org  Mon May 25 16:28:56 2009
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 25 May 2009 21:28:56 -0000
Subject: [llvm-commits] [llvm] r72403 - in /llvm/trunk:
 lib/Analysis/MemoryDependenceAnalysis.cpp
 test/Transforms/GVN/load-constant-mem.ll
Message-ID: <200905252128.n4PLSuO0002261@zion.cs.uiuc.edu>

Author: lattner
Date: Mon May 25 16:28:56 2009
New Revision: 72403

URL: http://llvm.org/viewvc/llvm-project?rev=72403&view=rev
Log:
make memdep use the getModRefInfo method for stores instead of the
low-level alias() method, allowing it to reason more aggressively
about pointers into constant memory.  PR4189

Added:
    llvm/trunk/test/Transforms/GVN/load-constant-mem.ll
Modified:
    llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp

Modified: llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp?rev=72403&r1=72402&r2=72403&view=diff

==============================================================================
--- llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp Mon May 25 16:28:56 2009
@@ -202,9 +202,17 @@
     }
     
     if (StoreInst *SI = dyn_cast<StoreInst>(Inst)) {
+      // If alias analysis can tell that this store is guaranteed to not modify
+      // the query pointer, ignore it.  Use getModRefInfo to handle cases where
+      // the query pointer points to constant memory etc.
+      if (AA->getModRefInfo(SI, MemPtr, MemSize) == AliasAnalysis::NoModRef)
+        continue;
+
+      // Ok, this store might clobber the query pointer.  Check to see if it is
+      // a must alias: in this case, we want to return this as a def.
       Value *Pointer = SI->getPointerOperand();
       uint64_t PointerSize = TD->getTypeStoreSize(SI->getOperand(0)->getType());
-
+      
       // If we found a pointer, check if it could be the same as our pointer.
       AliasAnalysis::AliasResult R =
         AA->alias(Pointer, PointerSize, MemPtr, MemSize);

Added: llvm/trunk/test/Transforms/GVN/load-constant-mem.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/load-constant-mem.ll?rev=72403&view=auto

==============================================================================
--- llvm/trunk/test/Transforms/GVN/load-constant-mem.ll (added)
+++ llvm/trunk/test/Transforms/GVN/load-constant-mem.ll Mon May 25 16:28:56 2009
@@ -0,0 +1,13 @@
+; RUN: llvm-as < %s | opt -gvn -instcombine | llvm-dis | grep {ret i32 0}
+; PR4189
+ at G = external constant [4 x i32]
+
+define i32 @test(i8* %p, i32 %i) nounwind {
+entry:
+	%P = getelementptr [4 x i32]* @G, i32 0, i32 %i
+	%A = load i32* %P
+	store i8 4, i8* %p
+	%B = load i32* %P
+	%C = sub i32 %A, %B
+	ret i32 %C
+}




From nicholas at mxc.ca  Mon May 25 17:33:34 2009
From: nicholas at mxc.ca (Nick Lewycky)
Date: Mon, 25 May 2009 15:33:34 -0700
Subject: [llvm-commits] patch: CXAGuardElimination pass.
In-Reply-To: <4A1A4FAB.2050404@free.fr>
References: <4A1A1FBE.5090902@mxc.ca> <4A1A4FAB.2050404@free.fr>
Message-ID: <4A1B1CBE.2030804@mxc.ca>

Duncan Sands wrote:
> Hi Nick,
> 
>> +    CallInst *A = dyn_cast<CallInst>(I);
>> +    if (!A) continue;
>> +
>> +    // TODO: __cxa_guard_acquire returns a value, then makes a conditional
>> +    // branch off of it. We need to handle this.
> 
> the acquire function may be being passed as a parameter to some other
> function rather than being called.

Right. Well, that should never happen in a real program so if it ever 
does then how about we abort the transform across the whole module.

>> +      if (I->mayReadFromMemory() || I->mayWriteToMemory())
> 
> Maybe you should use mayHaveSideEffects rather than mayWriteToMemory,
> since a "const" function can still throw an exception.  On the other
> hand, since such a function doesn't read or write memory it shouldn't
> need to be wrapped in guards anyway.

Good idea. Done.

>> +BasicBlock *CXAGuardElimination::getUniqueSuccessor(TerminatorInst *TI,
>> +                                                    CallInst *Acquire) {
>> +  if (TI->getNumSuccessors() == 1)
>> +    return TI->getSuccessor(0);
> 
> What about this:
> 
> bb1: acquire
>       br bbr
> bb2: acquire
>       br bbr
> bbr: release
> 
> Aren't you going to eliminate the first acquire and the release, but
> not the second acquire?

No, it'll eliminate the second acquire and the release, but not the 
first acquire. Note that there's code to detect this case in 
deadGuardElim (see the comments).

As far as I can tell that's valid behaviour for this transform so long 
as we don't mind removing infinite loops (note that these infinite loops 
can't be deliberately constructed by the user code, the calls to 
__cxa_guard are always emitted by the compiler...).

>> +  addPass(PM, createCXAGuardEliminationPass());  // Remove __cxa_guard_* calls.
> 
> Are you going to add this to llvm-gcc too?

Yes.

>> +  This pass deletes dead calls to __cxa_guard_acquire and __cxa_guard_release
>> +  which are part of the Itanium C++ ABI. T hese are used to prevent a function
> 
> T hese -> These

That line is gone.

Updated patch attached. Thanks for the review!

Nick
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From clattner at apple.com  Mon May 25 17:44:49 2009
From: clattner at apple.com (Chris Lattner)
Date: Mon, 25 May 2009 15:44:49 -0700
Subject: [llvm-commits] [llvm] r72329 -
	/llvm/trunk/lib/ExecutionEngine/JIT/Intercept.cpp
In-Reply-To: <200905231624.n4NGO6o0027749@zion.cs.uiuc.edu>
References: <200905231624.n4NGO6o0027749@zion.cs.uiuc.edu>
Message-ID: <5E69C061-20B9-4F73-90C9-F89585D06B79@apple.com>


On May 23, 2009, at 9:24 AM, Torok Edwin wrote:

> Author: edwin
> Date: Sat May 23 11:23:59 2009
> New Revision: 72329
>
> URL: http://llvm.org/viewvc/llvm-project?rev=72329&view=rev
> Log:
> stat64/open64/lseek64 for the interpreter

stat64 was already listed.  Maybe the \1 isn't being stripped correctly?

-Chris

>
>
> Modified:
>    llvm/trunk/lib/ExecutionEngine/JIT/Intercept.cpp
>
> Modified: llvm/trunk/lib/ExecutionEngine/JIT/Intercept.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/JIT/Intercept.cpp?rev=72329&r1=72328&r2=72329&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/ExecutionEngine/JIT/Intercept.cpp (original)
> +++ llvm/trunk/lib/ExecutionEngine/JIT/Intercept.cpp Sat May 23  
> 11:23:59 2009
> @@ -51,7 +51,7 @@
> #if defined(HAVE_SYS_STAT_H)
> #include <sys/stat.h>
> #endif
> -
> +#include <fcntl.h>
> /* stat functions are redirecting to __xstat with a version number.   
> On x86-64
>  * linking with libc_nonshared.a and -Wl,--export-dynamic doesn't  
> make 'stat'
>  * available as an exported symbol, so we have to add it explicitly.
> @@ -63,6 +63,9 @@
>     sys::DynamicLibrary::AddSymbol("fstat", (void*)(intptr_t)fstat);
>     sys::DynamicLibrary::AddSymbol("lstat", (void*)(intptr_t)lstat);
>     sys::DynamicLibrary::AddSymbol("stat64", (void*)(intptr_t)stat64);
> +    sys::DynamicLibrary::AddSymbol("\x1stat64", (void*) 
> (intptr_t)stat64);
> +    sys::DynamicLibrary::AddSymbol("\x1open64", (void*) 
> (intptr_t)open64);
> +    sys::DynamicLibrary::AddSymbol("\x1lseek64", (void*) 
> (intptr_t)lseek64);
>     sys::DynamicLibrary::AddSymbol("fstat64", (void*) 
> (intptr_t)fstat64);
>     sys::DynamicLibrary::AddSymbol("lstat64", (void*) 
> (intptr_t)lstat64);
>     sys::DynamicLibrary::AddSymbol("atexit", (void*)(intptr_t)atexit);
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From nicholas at mxc.ca  Mon May 25 17:59:37 2009
From: nicholas at mxc.ca (Nick Lewycky)
Date: Mon, 25 May 2009 15:59:37 -0700
Subject: [llvm-commits] patch: CXAGuardElimination pass.
In-Reply-To: <f5aa3e9b0905242354y4d4fb03bxd371761314ebae87@mail.gmail.com>
References: <4A1A1FBE.5090902@mxc.ca>	<f5aa3e9b0905242315o502181c5s73022ac119e856a0@mail.gmail.com>	<4A1A39C6.8080302@mxc.ca>
	<f5aa3e9b0905242354y4d4fb03bxd371761314ebae87@mail.gmail.com>
Message-ID: <4A1B22D9.6000607@mxc.ca>

Eli Friedman wrote:
> On Sun, May 24, 2009 at 11:25 PM, Nick Lewycky <nicholas at mxc.ca> wrote:
>> Eli Friedman wrote:
>>> On Sun, May 24, 2009 at 9:34 PM, Nick Lewycky <nicholas at mxc.ca> wrote:
>>>> However, it doesn't simplify it down all the way. See llvm.org/PR4261 for an
>>>> example of what happens after this optimization is applied on the above
>>>> program. We may decide that PR4261 is too hard to fix in general and just
>>>> add some extra logic to this pass, but I'd rather have this committed for a
>>>> start.
>>> Couldn't you just change AcquireRet from a constant 1 to a constant 0?
>>>  If it's safe to remove the guard, I don't see how the chosen path
>>> could make a difference.
>> Release has to run. It has the visible effect of changing the guard
>> variable to a 1. Nowhere in this pass do we prove those two calls are
>> the only places looking at the guard variable.
> 
> Assuming it's actually a guard, nothing besides the guard should care
> whether the guard variable initialized or not in the current call. The
> pass as written already makes assumptions that agree with that: for
> example, it doesn't bother to check for instructions with side-effects
> after the call to __cxa_guard_release.

I'm going to change my mind on this one. That's not safe. Here's my example.

We have a function that calls __cxa_guard_acquire/release on a single 
guard variable. Then we decide to clone it as part of partial 
specialization.

The initialization being guarded depends on some global variable -- if 
it's zero it does nothing, else it prints "foo". When cloneA is run we 
know that the global is always 0 so the initialization does nothing and 
we eliminate the guards. In cloneB the global is always non-zero, so it 
always prints "foo" to the screen and we keep the guards.

When cloneA runs it needs to mark the guard variable as being "already 
initialized" or else when cloneB runs it will go ahead and print "foo" 
and it's not supposed to. You've changed the behaviour of the program.

I'm going to put removeGuardPair back the way it was before.

Nick

>> Visible to who? Well, I'm not sure. There is a "__cxa_guard_abort" that
>> could be used. I'm not sure what C++ input you would need to create in
>> order to make it depend on this and be broken by the change, but I'm
>> opting for the relatively safe transform.
> 
> __cxa_guard_abort only gets triggered if the constructor throws an
> exception, which shouldn't be possible here.
> 
>> ALSO, AcquireRet is used twice, once when we've decided to delete the
>> guards but also earlier when following the flow from acquire() to
>> release(). If we used the wrong value there we would flow directly into
>> the "ret void" even if there were interesting code being guarded. (Note
>> that currently "ret void" means that we didn't find the release() call
>> and therefore wouldn't eliminate it anyways.)
> 
> Ah, oops, I wasn't suggesting to change that use.
> 
> -Eli
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
> 



From clattner at apple.com  Mon May 25 18:12:10 2009
From: clattner at apple.com (Chris Lattner)
Date: Mon, 25 May 2009 16:12:10 -0700
Subject: [llvm-commits] [llvm] r72325 - in /llvm/trunk:
	include/llvm/CodeGen/SelectionDAG.h
	lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
	lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
In-Reply-To: <200905231235.n4NCZgvT018589@zion.cs.uiuc.edu>
References: <200905231235.n4NCZgvT018589@zion.cs.uiuc.edu>
Message-ID: <2E4DA060-7225-419D-AB83-0E5FF6FAA7DE@apple.com>

On May 23, 2009, at 5:35 AM, Eli Friedman wrote:
> URL: http://llvm.org/viewvc/llvm-project?rev=72325&view=rev
> Log:
> Add a new step to legalization to legalize vector math operations.   
> This
> will allow simplifying LegalizeDAG to eliminate type legalization.  (I
> have a patch to do that, but it's not quite finished; I'll commit it
> once it's finished and I've fixed any review comments for this patch.)
> See the comment at the beginning of
> lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp for more details on the
> motivation for this patch.

Hi Eli,

I initially really didn't like the idea of adding a new legalize pass,  
but I agree that this is currently needed and it does seem like the  
right short-term approach.

As Duncan said, please convert this from recursive to iterative.  One  
known-problem with the existing legalizedag stuff is that the  
recursive parts quickly run out of stack space when run on a thread  
(which often has a smaller stack than the main process), it would be  
nice to keep improving this: legalizetypes is iterative.

In any case, allowing the type legalization code to finally be ripped  
out of legalize dag is awesome!

> +  /// This returns true if it made any changes; in that case,  
> LegalizeTypes
> +  /// is called again before Legalize.
> +  ///
> +  /// Note that this is an involved process that may invalidate  
> pointers into
> +  /// the graph.
> +  bool LegalizeVectors();

Would it make sense to change this to only return true when an illegal  
type is created?
>
> +// This file implements the SelectionDAG::LegalizeVectors method.
> +//
> +// The vector legalizer looks for vector operations which might  
> need to be
> +// unrolled and legalizes them.

s/unroll/scalarize/g?  This should never do any "splitting" of  
vectors, right?


>> Possibly; I took the current approach from the DAG legalizer.  Taking
>> a quick look, the type legalizer's logic to deal with nodes being
>> inserted during legalization seems complicated enough that I wouldn't
>> want to duplicate it... perhaps some sort of general legalizer base
>> class would be appropriate?
>
> I think Chris wants to redesign LegalizeDAG.  Hopefully at that point
> all the different legalizers will be able to share some generic
> infrastructure.  I suspect the type legalizer could be simplified a  
> lot
> by using an SDAG equivalent of CallbackVH.

Now that you disabled the type legalization code from LegalizeDAG,  
there are several steps I think we should take:

1. Finish ripping the dead code out of LegalizeDAG.
2. The remaining pieces of LegalizeDAG should be rewritten, both to  
make it iterative, and also to simplify it.  There is a ton of  
duplicated code that happens for each operation.  Making it iterative  
would allow us to simplify a bunch of this away I think.
3. Duncan is right: something like CallbackVH/AssertingVH would be a  
huge boon to legalize.  Adding it should not be too hard (just use the  
same approach as CallbackVH) and would dramatically simplify  
legalizetypes.
4. Once that is done, I think we might be able to end up full circle  
back to a single unified LegalizeDAG pass.  Basically, we could have a  
*single* top-down iterative walk that inspects each node once, and  
hands it off to the various appropriate routines: first, if it has any  
illegal types, call legalize types.  If all types are legal, call into  
the operation legalization stuff, etc.  The end result of this is that  
we have high efficiency (look at a #nodes visted = number of nodes +  
number of changes) but really being able to pull this off means that  
we need to get rid of most of the "reverse" temporary data structures  
that legalizetypes is holding onto.

Does this seem like a sane plan?

-Chris


From eli.friedman at gmail.com  Mon May 25 18:46:38 2009
From: eli.friedman at gmail.com (Eli Friedman)
Date: Mon, 25 May 2009 16:46:38 -0700
Subject: [llvm-commits] patch: CXAGuardElimination pass.
In-Reply-To: <4A1B22D9.6000607@mxc.ca>
References: <4A1A1FBE.5090902@mxc.ca>
	<f5aa3e9b0905242315o502181c5s73022ac119e856a0@mail.gmail.com>
	<4A1A39C6.8080302@mxc.ca>
	<f5aa3e9b0905242354y4d4fb03bxd371761314ebae87@mail.gmail.com>
	<4A1B22D9.6000607@mxc.ca>
Message-ID: <f5aa3e9b0905251646o98c266fla67c071f40101a21@mail.gmail.com>

On Mon, May 25, 2009 at 3:59 PM, Nick Lewycky <nicholas at mxc.ca> wrote:
> Eli Friedman wrote:
>> On Sun, May 24, 2009 at 11:25 PM, Nick Lewycky <nicholas at mxc.ca> wrote:
>>> Eli Friedman wrote:
>>>> On Sun, May 24, 2009 at 9:34 PM, Nick Lewycky <nicholas at mxc.ca> wrote:
>>>>> However, it doesn't simplify it down all the way. See llvm.org/PR4261 for an
>>>>> example of what happens after this optimization is applied on the above
>>>>> program. We may decide that PR4261 is too hard to fix in general and just
>>>>> add some extra logic to this pass, but I'd rather have this committed for a
>>>>> start.
>>>> Couldn't you just change AcquireRet from a constant 1 to a constant 0?
>>>> ?If it's safe to remove the guard, I don't see how the chosen path
>>>> could make a difference.
>>> Release has to run. It has the visible effect of changing the guard
>>> variable to a 1. Nowhere in this pass do we prove those two calls are
>>> the only places looking at the guard variable.
>>
>> Assuming it's actually a guard, nothing besides the guard should care
>> whether the guard variable initialized or not in the current call. The
>> pass as written already makes assumptions that agree with that: for
>> example, it doesn't bother to check for instructions with side-effects
>> after the call to __cxa_guard_release.
>
> I'm going to change my mind on this one. That's not safe. Here's my example.
>
> We have a function that calls __cxa_guard_acquire/release on a single
> guard variable. Then we decide to clone it as part of partial
> specialization.
>
> The initialization being guarded depends on some global variable -- if
> it's zero it does nothing, else it prints "foo". When cloneA is run we
> know that the global is always 0 so the initialization does nothing and
> we eliminate the guards. In cloneB the global is always non-zero, so it
> always prints "foo" to the screen and we keep the guards.
>
> When cloneA runs it needs to mark the guard variable as being "already
> initialized" or else when cloneB runs it will go ahead and print "foo"
> and it's not supposed to. You've changed the behaviour of the program.

Ooh, that's right.  Actually, it gets nastier than that: suppose
something like the following:

static int gval1 = 1;
int gval2 = 1;
struct A { A() { if (gval1) { printf("%d\n", gval2); } };
void a() { static A x(); gval2 = 0;}
void b() { a(); }
void c() { gval1 = 0; a(); }

Then suppose b() and c() are called at the same time on separate
threads, and we've inlined/optimized everything; if the guard is
removed from c(), we can end up printing out "0", which shouldn't be
possible because setting gval2 to zero only happens after the
constructor for A finishes.

-Eli



From nicholas at mxc.ca  Mon May 25 19:17:49 2009
From: nicholas at mxc.ca (Nick Lewycky)
Date: Mon, 25 May 2009 17:17:49 -0700
Subject: [llvm-commits] patch: CXAGuardElimination pass.
In-Reply-To: <f5aa3e9b0905251646o98c266fla67c071f40101a21@mail.gmail.com>
References: <4A1A1FBE.5090902@mxc.ca>	<f5aa3e9b0905242315o502181c5s73022ac119e856a0@mail.gmail.com>	<4A1A39C6.8080302@mxc.ca>	<f5aa3e9b0905242354y4d4fb03bxd371761314ebae87@mail.gmail.com>	<4A1B22D9.6000607@mxc.ca>
	<f5aa3e9b0905251646o98c266fla67c071f40101a21@mail.gmail.com>
Message-ID: <4A1B352D.9050208@mxc.ca>

Eli Friedman wrote:
> On Mon, May 25, 2009 at 3:59 PM, Nick Lewycky <nicholas at mxc.ca> wrote:
>> Eli Friedman wrote:
>>> On Sun, May 24, 2009 at 11:25 PM, Nick Lewycky <nicholas at mxc.ca> wrote:
>>>> Eli Friedman wrote:
>>>>> On Sun, May 24, 2009 at 9:34 PM, Nick Lewycky <nicholas at mxc.ca> wrote:
>>>>>> However, it doesn't simplify it down all the way. See llvm.org/PR4261 for an
>>>>>> example of what happens after this optimization is applied on the above
>>>>>> program. We may decide that PR4261 is too hard to fix in general and just
>>>>>> add some extra logic to this pass, but I'd rather have this committed for a
>>>>>> start.
>>>>> Couldn't you just change AcquireRet from a constant 1 to a constant 0?
>>>>>  If it's safe to remove the guard, I don't see how the chosen path
>>>>> could make a difference.
>>>> Release has to run. It has the visible effect of changing the guard
>>>> variable to a 1. Nowhere in this pass do we prove those two calls are
>>>> the only places looking at the guard variable.
>>> Assuming it's actually a guard, nothing besides the guard should care
>>> whether the guard variable initialized or not in the current call. The
>>> pass as written already makes assumptions that agree with that: for
>>> example, it doesn't bother to check for instructions with side-effects
>>> after the call to __cxa_guard_release.
>> I'm going to change my mind on this one. That's not safe. Here's my example.
>>
>> We have a function that calls __cxa_guard_acquire/release on a single
>> guard variable. Then we decide to clone it as part of partial
>> specialization.
>>
>> The initialization being guarded depends on some global variable -- if
>> it's zero it does nothing, else it prints "foo". When cloneA is run we
>> know that the global is always 0 so the initialization does nothing and
>> we eliminate the guards. In cloneB the global is always non-zero, so it
>> always prints "foo" to the screen and we keep the guards.
>>
>> When cloneA runs it needs to mark the guard variable as being "already
>> initialized" or else when cloneB runs it will go ahead and print "foo"
>> and it's not supposed to. You've changed the behaviour of the program.
> 
> Ooh, that's right.  Actually, it gets nastier than that: suppose
> something like the following:
> 
> static int gval1 = 1;
> int gval2 = 1;
> struct A { A() { if (gval1) { printf("%d\n", gval2); } };
> void a() { static A x(); gval2 = 0;}
> void b() { a(); }
> void c() { gval1 = 0; a(); }
> 
> Then suppose b() and c() are called at the same time on separate
> threads, and we've inlined/optimized everything; if the guard is
> removed from c(), we can end up printing out "0", which shouldn't be
> possible because setting gval2 to zero only happens after the
> constructor for A finishes.

Right. deadGuardElim checks for memory *reads* as well as writes and 
unwinds in order to prevent this sort of thing from happening. In the 
example I gave above it only works because the "partial specialization" 
step also eliminated the dead read of that 'some global variable'.

I'm still not sure what to do about the case where someone uses the 
result from the Acquire to do more than just perform initialization 
inside the release. You brought this up in an earlier email, something like:

   if (x = acquire()) {
     release();
     return 1;
   }
   return 0;

would break us because we see that there is nothing between acquire() 
and release() but we can't just eliminate it. We still need to return 1 
the first time and 0 on subsequent calls.

Nick



From eli.friedman at gmail.com  Mon May 25 19:49:04 2009
From: eli.friedman at gmail.com (Eli Friedman)
Date: Mon, 25 May 2009 17:49:04 -0700
Subject: [llvm-commits] [llvm] r72325 - in /llvm/trunk:
	include/llvm/CodeGen/SelectionDAG.h
	lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
	lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
In-Reply-To: <2E4DA060-7225-419D-AB83-0E5FF6FAA7DE@apple.com>
References: <200905231235.n4NCZgvT018589@zion.cs.uiuc.edu>
	<2E4DA060-7225-419D-AB83-0E5FF6FAA7DE@apple.com>
Message-ID: <f5aa3e9b0905251749q258d03f6r7d8aa8da6dd9298a@mail.gmail.com>

On Mon, May 25, 2009 at 4:12 PM, Chris Lattner <clattner at apple.com> wrote:
> As Duncan said, please convert this from recursive to iterative. ?One
> known-problem with the existing legalizedag stuff is that the
> recursive parts quickly run out of stack space when run on a thread
> (which often has a smaller stack than the main process), it would be
> nice to keep improving this: legalizetypes is iterative.

I don't really want to copy 500 lines of LegalizeTypes code into
LegalizeVectorOps.cpp... do you have some other suggestion?

>> + ?/// This returns true if it made any changes; in that case,
>> LegalizeTypes
>> + ?/// is called again before Legalize.
>> + ?///
>> + ?/// Note that this is an involved process that may invalidate
>> pointers into
>> + ?/// the graph.
>> + ?bool LegalizeVectors();
>
> Would it make sense to change this to only return true when an illegal
> type is created?

Maybe; the downside is that we lose the extra DAGCombiner run.  This
significantly improves code generation for
test/CodeGen/X86/widen_cast-4.ll, for example.

>> +// This file implements the SelectionDAG::LegalizeVectors method.
>> +//
>> +// The vector legalizer looks for vector operations which might
>> need to be
>> +// unrolled and legalizes them.
>
> s/unroll/scalarize/g? ?This should never do any "splitting" of
> vectors, right?

Sure, I'll change that.

>>> Possibly; I took the current approach from the DAG legalizer. ?Taking
>>> a quick look, the type legalizer's logic to deal with nodes being
>>> inserted during legalization seems complicated enough that I wouldn't
>>> want to duplicate it... perhaps some sort of general legalizer base
>>> class would be appropriate?
>>
>> I think Chris wants to redesign LegalizeDAG. ?Hopefully at that point
>> all the different legalizers will be able to share some generic
>> infrastructure. ?I suspect the type legalizer could be simplified a
>> lot
>> by using an SDAG equivalent of CallbackVH.
>
> Now that you disabled the type legalization code from LegalizeDAG,
> there are several steps I think we should take:
>
> 1. Finish ripping the dead code out of LegalizeDAG.

Of course :)

> 2. The remaining pieces of LegalizeDAG should be rewritten, both to
> make it iterative, and also to simplify it. ?There is a ton of
> duplicated code that happens for each operation. ?Making it iterative
> would allow us to simplify a bunch of this away I think.

Yeah; there are also issues at the moment with inconsistently
legalizing the operands of various operations.

-Eli



From eli.friedman at gmail.com  Mon May 25 19:51:29 2009
From: eli.friedman at gmail.com (Eli Friedman)
Date: Mon, 25 May 2009 17:51:29 -0700
Subject: [llvm-commits] patch: CXAGuardElimination pass.
In-Reply-To: <4A1B352D.9050208@mxc.ca>
References: <4A1A1FBE.5090902@mxc.ca>
	<f5aa3e9b0905242315o502181c5s73022ac119e856a0@mail.gmail.com>
	<4A1A39C6.8080302@mxc.ca>
	<f5aa3e9b0905242354y4d4fb03bxd371761314ebae87@mail.gmail.com>
	<4A1B22D9.6000607@mxc.ca>
	<f5aa3e9b0905251646o98c266fla67c071f40101a21@mail.gmail.com>
	<4A1B352D.9050208@mxc.ca>
Message-ID: <f5aa3e9b0905251751j5cb2030ejc6ce216b9a038bc0@mail.gmail.com>

On Mon, May 25, 2009 at 5:17 PM, Nick Lewycky <nicholas at mxc.ca> wrote:
> Eli Friedman wrote:
>> On Mon, May 25, 2009 at 3:59 PM, Nick Lewycky <nicholas at mxc.ca> wrote:
>>> Eli Friedman wrote:
>>>> On Sun, May 24, 2009 at 11:25 PM, Nick Lewycky <nicholas at mxc.ca> wrote:
>>>>> Eli Friedman wrote:
>>>>>> On Sun, May 24, 2009 at 9:34 PM, Nick Lewycky <nicholas at mxc.ca> wrote:
>>>>>>> However, it doesn't simplify it down all the way. See llvm.org/PR4261 for an
>>>>>>> example of what happens after this optimization is applied on the above
>>>>>>> program. We may decide that PR4261 is too hard to fix in general and just
>>>>>>> add some extra logic to this pass, but I'd rather have this committed for a
>>>>>>> start.
>>>>>> Couldn't you just change AcquireRet from a constant 1 to a constant 0?
>>>>>> ?If it's safe to remove the guard, I don't see how the chosen path
>>>>>> could make a difference.
>>>>> Release has to run. It has the visible effect of changing the guard
>>>>> variable to a 1. Nowhere in this pass do we prove those two calls are
>>>>> the only places looking at the guard variable.
>>>> Assuming it's actually a guard, nothing besides the guard should care
>>>> whether the guard variable initialized or not in the current call. The
>>>> pass as written already makes assumptions that agree with that: for
>>>> example, it doesn't bother to check for instructions with side-effects
>>>> after the call to __cxa_guard_release.
>>> I'm going to change my mind on this one. That's not safe. Here's my example.
>>>
>>> We have a function that calls __cxa_guard_acquire/release on a single
>>> guard variable. Then we decide to clone it as part of partial
>>> specialization.
>>>
>>> The initialization being guarded depends on some global variable -- if
>>> it's zero it does nothing, else it prints "foo". When cloneA is run we
>>> know that the global is always 0 so the initialization does nothing and
>>> we eliminate the guards. In cloneB the global is always non-zero, so it
>>> always prints "foo" to the screen and we keep the guards.
>>>
>>> When cloneA runs it needs to mark the guard variable as being "already
>>> initialized" or else when cloneB runs it will go ahead and print "foo"
>>> and it's not supposed to. You've changed the behaviour of the program.
>>
>> Ooh, that's right. ?Actually, it gets nastier than that: suppose
>> something like the following:
>>
>> static int gval1 = 1;
>> int gval2 = 1;
>> struct A { A() { if (gval1) { printf("%d\n", gval2); } };
>> void a() { static A x(); gval2 = 0;}
>> void b() { a(); }
>> void c() { gval1 = 0; a(); }
>>
>> Then suppose b() and c() are called at the same time on separate
>> threads, and we've inlined/optimized everything; if the guard is
>> removed from c(), we can end up printing out "0", which shouldn't be
>> possible because setting gval2 to zero only happens after the
>> constructor for A finishes.
>
> Right. deadGuardElim checks for memory *reads* as well as writes and
> unwinds in order to prevent this sort of thing from happening.

If a() gets inlined into c(), the load inside A() of gval1 can be
eliminated; I'm not sure if we do that particular optimization at the
moment, though.

-Eli



From sabre at nondot.org  Mon May 25 20:05:22 2009
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 25 May 2009 20:05:22 -0500
Subject: [llvm-commits] CVS: llvm-www/pubs/2009-05-21-Thesis-Barrett-3c.html
Message-ID: <200905260105.n4Q15MOd010152@zion.cs.uiuc.edu>



Changes in directory llvm-www/pubs:

2009-05-21-Thesis-Barrett-3c.html updated: 1.1 -> 1.2
---
Log message:

fix buttons at the bottom.


---
Diffs of the changes:  (+4 -2)

 2009-05-21-Thesis-Barrett-3c.html |    6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)


Index: llvm-www/pubs/2009-05-21-Thesis-Barrett-3c.html
diff -u llvm-www/pubs/2009-05-21-Thesis-Barrett-3c.html:1.1 llvm-www/pubs/2009-05-21-Thesis-Barrett-3c.html:1.2
--- llvm-www/pubs/2009-05-21-Thesis-Barrett-3c.html:1.1	Mon May 25 20:03:36 2009
+++ llvm-www/pubs/2009-05-21-Thesis-Barrett-3c.html	Mon May 25 20:04:57 2009
@@ -41,7 +41,9 @@
 
 <!-- *********************************************************************** -->
 <hr>
-  <a href="http://jigsaw.w3.org/css-validator/check/referer"><img src="index_files/vcss" alt="Valid CSS!"></a>
-  <a href="http://validator.w3.org/check/referer"><img src="index_files/valid-html401" alt="Valid HTML 4.01!"></a>
+  <a href="http://jigsaw.w3.org/css-validator/check/referer"><img
+  src="http://jigsaw.w3.org/css-validator/images/vcss" alt="Valid CSS!"></a>
+  <a href="http://validator.w3.org/check/referer"><img
+  src="http://www.w3.org/Icons/valid-html401" alt="Valid HTML 4.01!" /></a>
 
 </body></html>





From sabre at nondot.org  Mon May 25 20:05:24 2009
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 25 May 2009 20:05:24 -0500
Subject: [llvm-commits] CVS: llvm-www/pubs/2009-05-21-Thesis-Barrett-3c.html
	2009-05-21-Thesis-Barrett-3c.pdf
Message-ID: <200905260105.n4Q15OKX010163@zion.cs.uiuc.edu>



Changes in directory llvm-www/pubs:

2009-05-21-Thesis-Barrett-3c.html added (r1.1)
2009-05-21-Thesis-Barrett-3c.pdf added (r1.1)
---
Log message:

Add Edd Barrett's thesis.


---
Diffs of the changes:  (+15435 -0)

 2009-05-21-Thesis-Barrett-3c.html |   47 
 2009-05-21-Thesis-Barrett-3c.pdf  |15388 ++++++++++++++++++++++++++++++++++++++
 2 files changed, 15435 insertions(+)


Index: llvm-www/pubs/2009-05-21-Thesis-Barrett-3c.html
diff -c /dev/null llvm-www/pubs/2009-05-21-Thesis-Barrett-3c.html:1.1
*** /dev/null	Mon May 25 20:03:46 2009
--- llvm-www/pubs/2009-05-21-Thesis-Barrett-3c.html	Mon May 25 20:03:36 2009
***************
*** 0 ****
--- 1,47 ----
+ <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
+ <html><head>
+ 
+   <meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
+   <link rel="stylesheet" href="index_files/llvm.css" type="text/css" media="screen">
+   <title>3c: A JIT Compiler with LLVM</title>
+ </head><body>
+ 
+ <div class="pub_title">
+ 3c: A JIT Compiler with LLVM
+ </div>
+ <div class="pub_author">
+   Edd Barrett
+ </div>
+ 
+ <h2>Abstract:</h2>
+ <blockquote>
+ In the past, implementing virtual machines has either been a custom process or an endeavour into interfacing an existing virtual machine using (relatively) low level programming languages like C. Recently there has been a boom in high level scripting languages, which claim to make a programmer more productive, yet the field of compiler design is still rooted firmly with low level languages. It remains to be seen why language processors are not implemented in high level scripting languages.
+ </blockquote>
+ 
+ <blockquote>
+ The following report presents an investigation into designing and implementing com puter languages using a modern compiler construction tool-kit called the "Low Level Virtual Machine" (LLVM), in combination with a modern scripting language. The report covers in detail traditional approaches to compiler construction, parsing and virtual machine theory. Comparisons are made between traditional approaches and the modern approach offered by LLVM, via an experimental object oriented language called 3c, developed using LLVM, the Aperiot parser, Python and an incremental de velopment methodology.
+ </blockquote>
+ 
+ <h2>BibTeX:</h2>
+ <pre>
+ @techreport{EBARRETT:3C,
+ 	author = "Edward Barrett",
+ 	institution = "Bournemouth University",
+ 	year = 2009,
+ 	title = "3c - A {JIT} Compiler with {LLVM}",
+ 	url = "http://llvm.org/pubs/2009-05-21-Thesis-Barrett-3c.html"
+ }
+ </pre>
+ 
+ <h2>Download:</h2>
+ <h3>Paper:</h3>
+ <ul>
+   <li><a href="http://llvm.org/pubs/2009-05-21-Thesis-Barrett-3c.pdf">3c - A JIT Compiler with LLVM</a> (PDF)</li>
+ </ul>
+ 
+ <!-- *********************************************************************** -->
+ <hr>
+   <a href="http://jigsaw.w3.org/css-validator/check/referer"><img src="index_files/vcss" alt="Valid CSS!"></a>
+   <a href="http://validator.w3.org/check/referer"><img src="index_files/valid-html401" alt="Valid HTML 4.01!"></a>
+ 
+ </body></html>


Index: llvm-www/pubs/2009-05-21-Thesis-Barrett-3c.pdf
diff -c /dev/null llvm-www/pubs/2009-05-21-Thesis-Barrett-3c.pdf:1.1
*** /dev/null	Mon May 25 20:05:14 2009
--- llvm-www/pubs/2009-05-21-Thesis-Barrett-3c.pdf	Mon May 25 20:03:36 2009
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+ /Names [(lstnumber.4.2.1) 1149 0 R (lstnumber.4.2.2) 1150 0 R (lstnumber.4.2.3) 1151 0 R (lstnumber.4.2.4) 1152 0 R (lstnumber.4.2.5) 1153 0 R (lstnumber.4.3.1) 1155 0 R]
+ /Limits [(lstnumber.4.2.1) (lstnumber.4.3.1)]
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+ /Names [(lstnumber.4.3.10) 1164 0 R (lstnumber.4.3.2) 1156 0 R (lstnumber.4.3.3) 1157 0 R (lstnumber.4.3.4) 1158 0 R (lstnumber.4.3.5) 1159 0 R (lstnumber.4.3.6) 1160 0 R]
+ /Limits [(lstnumber.4.3.10) (lstnumber.4.3.6)]
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+ /Names [(lstnumber.4.3.7) 1161 0 R (lstnumber.4.3.8) 1162 0 R (lstnumber.4.3.9) 1163 0 R (lstnumber.4.4.1) 1171 0 R (lstnumber.4.4.10) 1180 0 R (lstnumber.4.4.11) 1181 0 R]
+ /Limits [(lstnumber.4.3.7) (lstnumber.4.4.11)]
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+ /Names [(lstnumber.4.4.12) 1182 0 R (lstnumber.4.4.13) 1183 0 R (lstnumber.4.4.14) 1184 0 R (lstnumber.4.4.15) 1185 0 R (lstnumber.4.4.16) 1186 0 R (lstnumber.4.4.17) 1187 0 R]
+ /Limits [(lstnumber.4.4.12) (lstnumber.4.4.17)]
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+ /Names [(lstnumber.4.4.2) 1172 0 R (lstnumber.4.4.3) 1173 0 R (lstnumber.4.4.4) 1174 0 R (lstnumber.4.4.5) 1175 0 R (lstnumber.4.4.6) 1176 0 R (lstnumber.4.4.7) 1177 0 R]
+ /Limits [(lstnumber.4.4.2) (lstnumber.4.4.7)]
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+ /Names [(lstnumber.4.4.8) 1178 0 R (lstnumber.4.4.9) 1179 0 R (lstnumber.4.5.1) 1189 0 R (lstnumber.4.5.2) 1190 0 R (lstnumber.4.5.3) 1191 0 R (lstnumber.4.5.4) 1203 0 R]
+ /Limits [(lstnumber.4.4.8) (lstnumber.4.5.4)]
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+ /Names [(lstnumber.4.6.1) 1205 0 R (lstnumber.4.6.2) 1206 0 R (lstnumber.4.7.1) 1238 0 R (lstnumber.4.7.10) 1247 0 R (lstnumber.4.7.11) 1248 0 R (lstnumber.4.7.12) 1249 0 R]
+ /Limits [(lstnumber.4.6.1) (lstnumber.4.7.12)]
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+ /Names [(lstnumber.4.7.13) 1250 0 R (lstnumber.4.7.14) 1251 0 R (lstnumber.4.7.15) 1252 0 R (lstnumber.4.7.16) 1253 0 R (lstnumber.4.7.17) 1254 0 R (lstnumber.4.7.18) 1255 0 R]
+ /Limits [(lstnumber.4.7.13) (lstnumber.4.7.18)]
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+ /Names [(lstnumber.4.7.19) 1256 0 R (lstnumber.4.7.2) 1239 0 R (lstnumber.4.7.20) 1257 0 R (lstnumber.4.7.21) 1258 0 R (lstnumber.4.7.22) 1259 0 R (lstnumber.4.7.23) 1260 0 R]
+ /Limits [(lstnumber.4.7.19) (lstnumber.4.7.23)]
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+ /Names [(lstnumber.4.7.24) 1261 0 R (lstnumber.4.7.25) 1262 0 R (lstnumber.4.7.26) 1263 0 R (lstnumber.4.7.3) 1240 0 R (lstnumber.4.7.4) 1241 0 R (lstnumber.4.7.5) 1242 0 R]
+ /Limits [(lstnumber.4.7.24) (lstnumber.4.7.5)]
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+ /Names [(lstnumber.4.7.6) 1243 0 R (lstnumber.4.7.7) 1244 0 R (lstnumber.4.7.8) 1245 0 R (lstnumber.4.7.9) 1246 0 R (lstnumber.4.8.1) 1273 0 R (lstnumber.4.8.2) 1274 0 R]
+ /Limits [(lstnumber.4.7.6) (lstnumber.4.8.2)]
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+ /Names [(lstnumber.5.1.1) 1320 0 R (lstnumber.5.1.10) 1346 0 R (lstnumber.5.1.11) 1347 0 R (lstnumber.5.1.12) 1348 0 R (lstnumber.5.1.13) 1349 0 R (lstnumber.5.1.2) 1321 0 R]
+ /Limits [(lstnumber.5.1.1) (lstnumber.5.1.2)]
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+ /Names [(lstnumber.5.1.3) 1322 0 R (lstnumber.5.1.4) 1323 0 R (lstnumber.5.1.5) 1324 0 R (lstnumber.5.1.6) 1325 0 R (lstnumber.5.1.7) 1343 0 R (lstnumber.5.1.8) 1344 0 R]
+ /Limits [(lstnumber.5.1.3) (lstnumber.5.1.8)]
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+ /Names [(lstnumber.5.1.9) 1345 0 R (lstnumber.5.2.1) 1383 0 R (lstnumber.5.2.10) 1397 0 R (lstnumber.5.2.11) 1398 0 R (lstnumber.5.2.12) 1399 0 R (lstnumber.5.2.13) 1400 0 R]
+ /Limits [(lstnumber.5.1.9) (lstnumber.5.2.13)]
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+ /Names [(lstnumber.5.2.14) 1401 0 R (lstnumber.5.2.15) 1402 0 R (lstnumber.5.2.16) 1403 0 R (lstnumber.5.2.17) 1404 0 R (lstnumber.5.2.18) 1405 0 R (lstnumber.5.2.19) 1406 0 R]
+ /Limits [(lstnumber.5.2.14) (lstnumber.5.2.19)]
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+ /Names [(lstnumber.5.2.2) 1384 0 R (lstnumber.5.2.20) 1407 0 R (lstnumber.5.2.21) 1408 0 R (lstnumber.5.2.22) 1409 0 R (lstnumber.5.2.23) 1410 0 R (lstnumber.5.2.24) 1411 0 R]
+ /Limits [(lstnumber.5.2.2) (lstnumber.5.2.24)]
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+ /Names [(lstnumber.5.2.25) 1412 0 R (lstnumber.5.2.26) 1413 0 R (lstnumber.5.2.27) 1414 0 R (lstnumber.5.2.28) 1415 0 R (lstnumber.5.2.3) 1385 0 R (lstnumber.5.2.4) 1386 0 R]
+ /Limits [(lstnumber.5.2.25) (lstnumber.5.2.4)]
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+ /Names [(lstnumber.5.2.5) 1387 0 R (lstnumber.5.2.6) 1388 0 R (lstnumber.5.2.7) 1389 0 R (lstnumber.5.2.8) 1395 0 R (lstnumber.5.2.9) 1396 0 R (lstnumber.5.3.1) 1416 0 R]
+ /Limits [(lstnumber.5.2.5) (lstnumber.5.3.1)]
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+ /Names [(lstnumber.5.3.10) 1425 0 R (lstnumber.5.3.11) 1426 0 R (lstnumber.5.3.12) 1427 0 R (lstnumber.5.3.13) 1428 0 R (lstnumber.5.3.14) 1429 0 R (lstnumber.5.3.15) 1430 0 R]
+ /Limits [(lstnumber.5.3.10) (lstnumber.5.3.15)]
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+ /Names [(lstnumber.5.3.16) 1431 0 R (lstnumber.5.3.17) 1432 0 R (lstnumber.5.3.18) 1433 0 R (lstnumber.5.3.2) 1417 0 R (lstnumber.5.3.3) 1418 0 R (lstnumber.5.3.4) 1419 0 R]
+ /Limits [(lstnumber.5.3.16) (lstnumber.5.3.4)]
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+ /Names [(lstnumber.5.3.5) 1420 0 R (lstnumber.5.3.6) 1421 0 R (lstnumber.5.3.7) 1422 0 R (lstnumber.5.3.8) 1423 0 R (lstnumber.5.3.9) 1424 0 R (lstnumber.5.4.1) 1444 0 R]
+ /Limits [(lstnumber.5.3.5) (lstnumber.5.4.1)]
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+ /Names [(lstnumber.5.4.2) 1445 0 R (lstnumber.5.4.3) 1446 0 R (lstnumber.5.4.4) 1447 0 R (lstnumber.5.4.5) 1448 0 R (lstnumber.5.4.6) 1449 0 R (lstnumber.5.4.7) 1450 0 R]
+ /Limits [(lstnumber.5.4.2) (lstnumber.5.4.7)]
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+ /Names [(lstnumber.5.4.8) 1451 0 R (lstnumber.5.5.1) 1480 0 R (lstnumber.5.5.2) 1481 0 R (lstnumber.5.5.3) 1482 0 R (lstnumber.5.6.1) 1484 0 R (lstnumber.5.6.10) 1509 0 R]
+ /Limits [(lstnumber.5.4.8) (lstnumber.5.6.10)]
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+ /Names [(lstnumber.5.6.11) 1510 0 R (lstnumber.5.6.12) 1511 0 R (lstnumber.5.6.13) 1512 0 R (lstnumber.5.6.14) 1513 0 R (lstnumber.5.6.15) 1514 0 R (lstnumber.5.6.16) 1515 0 R]
+ /Limits [(lstnumber.5.6.11) (lstnumber.5.6.16)]
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+ /Names [(lstnumber.5.6.17) 1516 0 R (lstnumber.5.6.18) 1517 0 R (lstnumber.5.6.19) 1518 0 R (lstnumber.5.6.2) 1485 0 R (lstnumber.5.6.3) 1486 0 R (lstnumber.5.6.4) 1487 0 R]
+ /Limits [(lstnumber.5.6.17) (lstnumber.5.6.4)]
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+ /Names [(lstnumber.5.6.5) 1488 0 R (lstnumber.5.6.6) 1489 0 R (lstnumber.5.6.7) 1490 0 R (lstnumber.5.6.8) 1491 0 R (lstnumber.5.6.9) 1492 0 R (lstnumber.C.1.1) 1675 0 R]
+ /Limits [(lstnumber.5.6.5) (lstnumber.C.1.1)]
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+ /Names [(lstnumber.C.1.10) 1684 0 R (lstnumber.C.1.100) 1782 0 R (lstnumber.C.1.101) 1783 0 R (lstnumber.C.1.102) 1784 0 R (lstnumber.C.1.103) 1785 0 R (lstnumber.C.1.104) 1786 0 R]
+ /Limits [(lstnumber.C.1.10) (lstnumber.C.1.104)]
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+ /Names [(lstnumber.C.1.105) 1787 0 R (lstnumber.C.1.106) 1788 0 R (lstnumber.C.1.107) 1789 0 R (lstnumber.C.1.108) 1790 0 R (lstnumber.C.1.109) 1791 0 R (lstnumber.C.1.11) 1685 0 R]
+ /Limits [(lstnumber.C.1.105) (lstnumber.C.1.11)]
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+ /Names [(lstnumber.C.1.110) 1792 0 R (lstnumber.C.1.111) 1797 0 R (lstnumber.C.1.112) 1798 0 R (lstnumber.C.1.113) 1799 0 R (lstnumber.C.1.114) 1800 0 R (lstnumber.C.1.115) 1801 0 R]
+ /Limits [(lstnumber.C.1.110) (lstnumber.C.1.115)]
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+ /Names [(lstnumber.C.1.116) 1802 0 R (lstnumber.C.1.117) 1803 0 R (lstnumber.C.1.118) 1804 0 R (lstnumber.C.1.119) 1805 0 R (lstnumber.C.1.12) 1686 0 R (lstnumber.C.1.120) 1806 0 R]
+ /Limits [(lstnumber.C.1.116) (lstnumber.C.1.120)]
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+ /Names [(lstnumber.C.1.121) 1807 0 R (lstnumber.C.1.122) 1808 0 R (lstnumber.C.1.123) 1809 0 R (lstnumber.C.1.124) 1810 0 R (lstnumber.C.1.125) 1811 0 R (lstnumber.C.1.126) 1812 0 R]
+ /Limits [(lstnumber.C.1.121) (lstnumber.C.1.126)]
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+ /Names [(lstnumber.C.1.127) 1813 0 R (lstnumber.C.1.128) 1814 0 R (lstnumber.C.1.129) 1815 0 R (lstnumber.C.1.13) 1687 0 R (lstnumber.C.1.130) 1816 0 R (lstnumber.C.1.131) 1817 0 R]
+ /Limits [(lstnumber.C.1.127) (lstnumber.C.1.131)]
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+ /Limits [(lstnumber.C.1.14) (lstnumber.C.1.19)]
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+ /Names [(lstnumber.C.1.2) 1676 0 R (lstnumber.C.1.20) 1694 0 R (lstnumber.C.1.21) 1695 0 R (lstnumber.C.1.22) 1696 0 R (lstnumber.C.1.23) 1697 0 R (lstnumber.C.1.24) 1698 0 R]
+ /Limits [(lstnumber.C.1.2) (lstnumber.C.1.24)]
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+ /Limits [(lstnumber.C.1.25) (lstnumber.C.1.3)]
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+ /Limits [(lstnumber.C.1.30) (lstnumber.C.1.35)]
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+ /Names [(lstnumber.C.1.36) 1714 0 R (lstnumber.C.1.37) 1715 0 R (lstnumber.C.1.38) 1716 0 R (lstnumber.C.1.39) 1717 0 R (lstnumber.C.1.4) 1678 0 R (lstnumber.C.1.40) 1718 0 R]
+ /Limits [(lstnumber.C.1.36) (lstnumber.C.1.40)]
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+ /Limits [(lstnumber.C.1.41) (lstnumber.C.1.46)]
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+ /Limits [(lstnumber.C.1.47) (lstnumber.C.1.51)]
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+ /Names [(lstnumber.C.1.52) 1730 0 R (lstnumber.C.1.53) 1731 0 R (lstnumber.C.1.54) 1732 0 R (lstnumber.C.1.55) 1733 0 R (lstnumber.C.1.56) 1734 0 R (lstnumber.C.1.57) 1735 0 R]
+ /Limits [(lstnumber.C.1.52) (lstnumber.C.1.57)]
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+ /Names [(lstnumber.C.1.58) 1736 0 R (lstnumber.C.1.59) 1737 0 R (lstnumber.C.1.6) 1680 0 R (lstnumber.C.1.60) 1738 0 R (lstnumber.C.1.61) 1739 0 R (lstnumber.C.1.62) 1740 0 R]
+ /Limits [(lstnumber.C.1.58) (lstnumber.C.1.62)]
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+ /Names [(lstnumber.C.1.63) 1741 0 R (lstnumber.C.1.64) 1742 0 R (lstnumber.C.1.65) 1743 0 R (lstnumber.C.1.66) 1744 0 R (lstnumber.C.1.67) 1745 0 R (lstnumber.C.1.68) 1746 0 R]
+ /Limits [(lstnumber.C.1.63) (lstnumber.C.1.68)]
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+ /Limits [(lstnumber.C.1.69) (lstnumber.C.1.73)]
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+ /Limits [(lstnumber.C.1.74) (lstnumber.C.1.79)]
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+ /Limits [(lstnumber.C.1.8) (lstnumber.C.1.84)]
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+ /Limits [(lstnumber.C.1.85) (lstnumber.C.1.9)]
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+ /Names [(lstnumber.C.1.90) 1772 0 R (lstnumber.C.1.91) 1773 0 R (lstnumber.C.1.92) 1774 0 R (lstnumber.C.1.93) 1775 0 R (lstnumber.C.1.94) 1776 0 R (lstnumber.C.1.95) 1777 0 R]
+ /Limits [(lstnumber.C.1.90) (lstnumber.C.1.95)]
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+ /Names [(lstnumber.C.1.96) 1778 0 R (lstnumber.C.1.97) 1779 0 R (lstnumber.C.1.98) 1780 0 R (lstnumber.C.1.99) 1781 0 R (lstnumber.C.2.1) 1995 0 R (lstnumber.C.2.10) 2008 0 R]
+ /Limits [(lstnumber.C.1.96) (lstnumber.C.2.10)]
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+ /Names [(lstnumber.C.2.11) 2009 0 R (lstnumber.C.2.12) 2010 0 R (lstnumber.C.2.13) 2011 0 R (lstnumber.C.2.14) 2012 0 R (lstnumber.C.2.15) 2013 0 R (lstnumber.C.2.16) 2014 0 R]
+ /Limits [(lstnumber.C.2.11) (lstnumber.C.2.16)]
+ >> endobj
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+ /Names [(lstnumber.C.2.17) 2015 0 R (lstnumber.C.2.18) 2016 0 R (lstnumber.C.2.19) 2017 0 R (lstnumber.C.2.2) 1996 0 R (lstnumber.C.2.20) 2018 0 R (lstnumber.C.2.21) 2019 0 R]
+ /Limits [(lstnumber.C.2.17) (lstnumber.C.2.21)]
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+ /Names [(lstnumber.C.2.22) 2020 0 R (lstnumber.C.2.23) 2021 0 R (lstnumber.C.2.24) 2022 0 R (lstnumber.C.2.25) 2023 0 R (lstnumber.C.2.26) 2024 0 R (lstnumber.C.2.27) 2025 0 R]
+ /Limits [(lstnumber.C.2.22) (lstnumber.C.2.27)]
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+ /Names [(lstnumber.C.2.28) 2026 0 R (lstnumber.C.2.3) 1997 0 R (lstnumber.C.2.4) 1998 0 R (lstnumber.C.2.5) 1999 0 R (lstnumber.C.2.6) 2000 0 R (lstnumber.C.2.7) 2005 0 R]
+ /Limits [(lstnumber.C.2.28) (lstnumber.C.2.7)]
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+ /Names [(lstnumber.C.2.8) 2006 0 R (lstnumber.C.2.9) 2007 0 R (lstnumber.C.3.1) 2027 0 R (lstnumber.C.3.10) 2036 0 R (lstnumber.C.3.11) 2037 0 R (lstnumber.C.3.12) 2038 0 R]
+ /Limits [(lstnumber.C.2.8) (lstnumber.C.3.12)]
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+ /Names [(lstnumber.C.3.13) 2039 0 R (lstnumber.C.3.14) 2040 0 R (lstnumber.C.3.15) 2041 0 R (lstnumber.C.3.16) 2042 0 R (lstnumber.C.3.17) 2043 0 R (lstnumber.C.3.18) 2044 0 R]
+ /Limits [(lstnumber.C.3.13) (lstnumber.C.3.18)]
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+ /Names [(lstnumber.C.3.19) 2045 0 R (lstnumber.C.3.2) 2028 0 R (lstnumber.C.3.20) 2046 0 R (lstnumber.C.3.21) 2047 0 R (lstnumber.C.3.22) 2052 0 R (lstnumber.C.3.23) 2053 0 R]
+ /Limits [(lstnumber.C.3.19) (lstnumber.C.3.23)]
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+ /Names [(lstnumber.C.3.24) 2054 0 R (lstnumber.C.3.25) 2055 0 R (lstnumber.C.3.3) 2029 0 R (lstnumber.C.3.4) 2030 0 R (lstnumber.C.3.5) 2031 0 R (lstnumber.C.3.6) 2032 0 R]
+ /Limits [(lstnumber.C.3.24) (lstnumber.C.3.6)]
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+ /Names [(lstnumber.C.3.7) 2033 0 R (lstnumber.C.3.8) 2034 0 R (lstnumber.C.3.9) 2035 0 R (lstnumber.C.4.1) 2056 0 R (lstnumber.C.4.10) 2065 0 R (lstnumber.C.4.11) 2066 0 R]
+ /Limits [(lstnumber.C.3.7) (lstnumber.C.4.11)]
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+ /Names [(lstnumber.C.4.12) 2067 0 R (lstnumber.C.4.13) 2068 0 R (lstnumber.C.4.14) 2069 0 R (lstnumber.C.4.15) 2070 0 R (lstnumber.C.4.2) 2057 0 R (lstnumber.C.4.3) 2058 0 R]
+ /Limits [(lstnumber.C.4.12) (lstnumber.C.4.3)]
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+ /Names [(lstnumber.C.4.4) 2059 0 R (lstnumber.C.4.5) 2060 0 R (lstnumber.C.4.6) 2061 0 R (lstnumber.C.4.7) 2062 0 R (lstnumber.C.4.8) 2063 0 R (lstnumber.C.4.9) 2064 0 R]
+ /Limits [(lstnumber.C.4.4) (lstnumber.C.4.9)]
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+ /Names [(lstnumber.C.5.1) 2121 0 R (lstnumber.C.5.10) 2130 0 R (lstnumber.C.5.11) 2131 0 R (lstnumber.C.5.12) 2132 0 R (lstnumber.C.5.13) 2133 0 R (lstnumber.C.5.14) 2134 0 R]
+ /Limits [(lstnumber.C.5.1) (lstnumber.C.5.14)]
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+ /Names [(lstnumber.C.5.15) 2135 0 R (lstnumber.C.5.16) 2136 0 R (lstnumber.C.5.17) 2137 0 R (lstnumber.C.5.18) 2138 0 R (lstnumber.C.5.19) 2139 0 R (lstnumber.C.5.2) 2122 0 R]
+ /Limits [(lstnumber.C.5.15) (lstnumber.C.5.2)]
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+ /Names [(lstnumber.C.5.20) 2140 0 R (lstnumber.C.5.21) 2141 0 R (lstnumber.C.5.22) 2142 0 R (lstnumber.C.5.23) 2143 0 R (lstnumber.C.5.24) 2144 0 R (lstnumber.C.5.25) 2145 0 R]
+ /Limits [(lstnumber.C.5.20) (lstnumber.C.5.25)]
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+ /Names [(lstnumber.C.5.26) 2146 0 R (lstnumber.C.5.27) 2147 0 R (lstnumber.C.5.28) 2148 0 R (lstnumber.C.5.29) 2149 0 R (lstnumber.C.5.3) 2123 0 R (lstnumber.C.5.30) 2150 0 R]
+ /Limits [(lstnumber.C.5.26) (lstnumber.C.5.30)]
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+ trailer
+ << /Size 2576
+ /Root 2574 0 R
+ /Info 2575 0 R
+ /ID [<1F58060ADB31985F36039F54627C6E21> <1F58060ADB31985F36039F54627C6E21>] >>
+ startxref
+ 1039477
+ %%EOF





From sabre at nondot.org  Mon May 25 20:05:56 2009
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 25 May 2009 20:05:56 -0500
Subject: [llvm-commits] CVS: llvm-www/pubs/2009-05-21-Thesis-Barrett-3c.html
Message-ID: <200905260105.n4Q15uP6010231@zion.cs.uiuc.edu>



Changes in directory llvm-www/pubs:

2009-05-21-Thesis-Barrett-3c.html updated: 1.2 -> 1.3
---
Log message:

fix css reference


---
Diffs of the changes:  (+1 -1)

 2009-05-21-Thesis-Barrett-3c.html |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm-www/pubs/2009-05-21-Thesis-Barrett-3c.html
diff -u llvm-www/pubs/2009-05-21-Thesis-Barrett-3c.html:1.2 llvm-www/pubs/2009-05-21-Thesis-Barrett-3c.html:1.3
--- llvm-www/pubs/2009-05-21-Thesis-Barrett-3c.html:1.2	Mon May 25 20:04:57 2009
+++ llvm-www/pubs/2009-05-21-Thesis-Barrett-3c.html	Mon May 25 20:05:36 2009
@@ -2,7 +2,7 @@
 <html><head>
 
   <meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
-  <link rel="stylesheet" href="index_files/llvm.css" type="text/css" media="screen">
+  <link rel="stylesheet" href="../llvm.css" type="text/css" media="screen">
   <title>3c: A JIT Compiler with LLVM</title>
 </head><body>
 





From sabre at nondot.org  Mon May 25 20:08:37 2009
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 25 May 2009 20:08:37 -0500
Subject: [llvm-commits] CVS: llvm-www/pubs/pubs.js
Message-ID: <200905260108.n4Q18bum010350@zion.cs.uiuc.edu>



Changes in directory llvm-www/pubs:

pubs.js updated: 1.13 -> 1.14
---
Log message:

add edd's project.


---
Diffs of the changes:  (+8 -0)

 pubs.js |    8 ++++++++
 1 files changed, 8 insertions(+)


Index: llvm-www/pubs/pubs.js
diff -u llvm-www/pubs/pubs.js:1.13 llvm-www/pubs/pubs.js:1.14
--- llvm-www/pubs/pubs.js:1.13	Fri May  8 11:23:05 2009
+++ llvm-www/pubs/pubs.js	Mon May 25 20:08:17 2009
@@ -1,6 +1,14 @@
 // The array should be sorted reverse-chronologically, and will be displayed on
 // the page in the order listed.
 var PUBS = [
+  {url: '2009-05-21-Thesis-Barrett-3c.html',
+   title: '3c: A JIT Compiler with LLVM',
+   author: 'Edd Barrett',
+   published: "Final Year Project, Bournemouth University",
+   location: "United Kingdom",
+   month: 5,
+   year: 2009},
+
   {url: '2009-05-EnsuringCorrectnessOfCompiledCode.html',
    title: 'Ensuring Correctness of Compiled Code',
    author: 'Ganna Zaks',





From evan.cheng at apple.com  Mon May 25 21:26:11 2009
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 25 May 2009 19:26:11 -0700
Subject: [llvm-commits] Avoid O(#registers*#basicblocks) memory use in
	LiveVariables
In-Reply-To: <bb55930e0905230924u6c7ee324l5a112874d4cc9cf@mail.gmail.com>
References: <bb55930e0905221541y51948ebaq3ab3e95e7385ec13@mail.gmail.com>
	<C9BE72BF-4E69-4D8F-8962-73F9FD600D33@apple.com>
	<bb55930e0905221637s5ee120bs2c255adb448a3bc0@mail.gmail.com>
	<8FEB6CFA-7992-46CD-BE02-789B1344DF90@apple.com>
	<bb55930e0905230924u6c7ee324l5a112874d4cc9cf@mail.gmail.com>
Message-ID: <5C0EABE9-BB47-4DCA-B7C5-939FA7F37E7A@apple.com>


On May 23, 2009, at 9:24 AM, Jeffrey Yasskin wrote:

> On Fri, May 22, 2009 at 5:10 PM, Evan Cheng <evan.cheng at apple.com>  
> wrote:
>>
>> On May 22, 2009, at 4:37 PM, Jeffrey Yasskin wrote:
>>
>>> I just wanted to double-check that you're not worried about the  
>>> extra
>>> memory use for small functions, and the potential for quadratic time
>>> with a higher constant, before I commit this.
>>
>> I can see the potential for both of those issues. Perhaps you can
>> specialize SparseBitVector with a smaller element size to reduce
>> memory usage? As for compile time cost, can you measure it by return
>> through the llvm test suite?
>
> I've attached the results of `make TEST=nightly report.html
> ENABLE_OPTIMIZED=1 DISABLE_ASSERTIONS=1` from before and after my
> patch. I'm not sure how to read it though. Is there documentation for
> what the columns mean? Do these results say whether the extra memory
> use is a problem or just whether the worse random access is a problem?

You can use TEST=llc. It will report compile time spent each pass.  
Unfortunately it doesn't report memory use.


>
>
> I haven't yet reduced the template argument to SparseBitVector. What's
> the largest common number of basic blocks in a function that variables
> tend to be used or alive through? I'd want to set the argument to

There isn't a "right" answer for this. I'd say we should just choose a  
reasonable number. Perhaps 8?

Evan

>
> that, since the size of an extra SparseBitVectorElement is higher than
> anything we could save by reducing the size of an Element.
>
> Thanks,
> Jeffrey
> < 
> report 
> .nightly 
> .trunk 
> .html 
> > 
> < 
> report 
> .nightly 
> .smaller_livevars.html>_______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From evan.cheng at apple.com  Mon May 25 21:27:31 2009
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 25 May 2009 19:27:31 -0700
Subject: [llvm-commits] Avoid O(#registers*#basicblocks) memory use in
	LiveVariables
In-Reply-To: <bb55930e0905231704w5e5179e9j9c37965222f49e35@mail.gmail.com>
References: <bb55930e0905221541y51948ebaq3ab3e95e7385ec13@mail.gmail.com>
	<C9BE72BF-4E69-4D8F-8962-73F9FD600D33@apple.com>
	<bb55930e0905221637s5ee120bs2c255adb448a3bc0@mail.gmail.com>
	<8FEB6CFA-7992-46CD-BE02-789B1344DF90@apple.com>
	<bb55930e0905230924u6c7ee324l5a112874d4cc9cf@mail.gmail.com>
	<bb55930e0905231704w5e5179e9j9c37965222f49e35@mail.gmail.com>
Message-ID: <0EE5EEB1-8370-4F11-A044-F52F5D99D3E7@apple.com>


On May 23, 2009, at 5:04 PM, Jeffrey Yasskin wrote:

> On Sat, May 23, 2009 at 9:24 AM, Jeffrey Yasskin  
> <jyasskin at google.com> wrote:
>> On Fri, May 22, 2009 at 5:10 PM, Evan Cheng <evan.cheng at apple.com>  
>> wrote:
>>> I can see the potential for both of those issues. Perhaps you can
>>> specialize SparseBitVector with a smaller element size to reduce
>>> memory usage? As for compile time cost, can you measure it by return
>>> through the llvm test suite?
>>
>> I've attached the results of `make TEST=nightly report.html
>> ENABLE_OPTIMIZED=1 DISABLE_ASSERTIONS=1` from before and after my
>> patch.
>
> Here are new versions of the nightly report. The LLC compile time was
> broken until Nick fixed it, and, of course, it's the column we care
> about here.

Compile time looks fine to me, it seems to have improved slightly.

Evan


>
> < 
> report 
> .nightly 
> .smaller_livevars 
> .html 
> > 
> < 
> report 
> .nightly.trunk.html>_______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From evan.cheng at apple.com  Mon May 25 21:30:55 2009
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 25 May 2009 19:30:55 -0700
Subject: [llvm-commits] Avoid O(#registers*#basicblocks) memory use in
	LiveVariables
In-Reply-To: <fa28b9250905222107n7fd1db88s36509f5666e35bdf@mail.gmail.com>
References: <bb55930e0905221541y51948ebaq3ab3e95e7385ec13@mail.gmail.com>
	<C9BE72BF-4E69-4D8F-8962-73F9FD600D33@apple.com>
	<bb55930e0905221637s5ee120bs2c255adb448a3bc0@mail.gmail.com>
	<8FEB6CFA-7992-46CD-BE02-789B1344DF90@apple.com>
	<fa28b9250905222107n7fd1db88s36509f5666e35bdf@mail.gmail.com>
Message-ID: <363EF47E-1FBE-4A8B-873C-B6B667B26388@apple.com>


On May 22, 2009, at 9:07 PM, me22 wrote:

> 2009/5/22 Evan Cheng <evan.cheng at apple.com>:
>>
>> I can see the potential for both of those issues. Perhaps you can
>> specialize SparseBitVector with a smaller element size to reduce
>> memory usage? As for compile time cost, can you measure it by return
>> through the llvm test suite?
>>
>
> I'd be wary of decreasing the element size any more.
>
> I wrote up a quick test (attached) that suggests that on 64-bit linux
> only a third of the node is actually holding data right now. (The
> overhead from sparsity and linked list pointers is the other
> two-thirds.)  And on whatever platform codepad.org runs (I think VC++
> Win32), only a quarter of the memory is actually holding bits, and
> ElementSize could actually be increased to 160 without changing the
> amount of memory that new actually allocates per node.  32-bit linux
> seems to have the best ratio, with half of it useful.
>
> I don't know the pattern of sparsity in LiveVariables, but I'd
> actually argue for trying increasing it.
>
> Also, you might try using unsigned int for the BitWord in the
> SparseBitVectorElement (instead of unsigned long), as on 64-bit it
> would keep you from wasting the padding after the ElementIndex.  It
> should just involve changing the typedef, but could also slow things
> down a bit since Elements would no longer be a power of two.  No idea
> whether that'd be noticable over the pointer-following overhead,
> though.
>
> Or I suppose, depending on the way the numbering it implemented, it
> might be even better to have some kind of range container instead...

Thanks for doing the analysis. I think it all point to just leaving  
ElementSize along is probably fine.

Evan

>
>
> ~ Scott
> < 
> sbve_size_experiment 
> .cxx>_______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From nicholas at mxc.ca  Mon May 25 21:37:02 2009
From: nicholas at mxc.ca (Nick Lewycky)
Date: Mon, 25 May 2009 19:37:02 -0700
Subject: [llvm-commits] patch: CXAGuardElimination pass.
In-Reply-To: <f5aa3e9b0905251751j5cb2030ejc6ce216b9a038bc0@mail.gmail.com>
References: <4A1A1FBE.5090902@mxc.ca>	<f5aa3e9b0905242315o502181c5s73022ac119e856a0@mail.gmail.com>	<4A1A39C6.8080302@mxc.ca>	<f5aa3e9b0905242354y4d4fb03bxd371761314ebae87@mail.gmail.com>	<4A1B22D9.6000607@mxc.ca>	<f5aa3e9b0905251646o98c266fla67c071f40101a21@mail.gmail.com>	<4A1B352D.9050208@mxc.ca>
	<f5aa3e9b0905251751j5cb2030ejc6ce216b9a038bc0@mail.gmail.com>
Message-ID: <4A1B55CE.10207@mxc.ca>

Eli Friedman wrote:
> On Mon, May 25, 2009 at 5:17 PM, Nick Lewycky <nicholas at mxc.ca> wrote:
>> Eli Friedman wrote:
>>> On Mon, May 25, 2009 at 3:59 PM, Nick Lewycky <nicholas at mxc.ca> wrote:
>>>> Eli Friedman wrote:
>>>>> On Sun, May 24, 2009 at 11:25 PM, Nick Lewycky <nicholas at mxc.ca> wrote:
>>>>>> Eli Friedman wrote:
>>>>>>> On Sun, May 24, 2009 at 9:34 PM, Nick Lewycky <nicholas at mxc.ca> wrote:
>>>>>>>> However, it doesn't simplify it down all the way. See llvm.org/PR4261 for an
>>>>>>>> example of what happens after this optimization is applied on the above
>>>>>>>> program. We may decide that PR4261 is too hard to fix in general and just
>>>>>>>> add some extra logic to this pass, but I'd rather have this committed for a
>>>>>>>> start.
>>>>>>> Couldn't you just change AcquireRet from a constant 1 to a constant 0?
>>>>>>>  If it's safe to remove the guard, I don't see how the chosen path
>>>>>>> could make a difference.
>>>>>> Release has to run. It has the visible effect of changing the guard
>>>>>> variable to a 1. Nowhere in this pass do we prove those two calls are
>>>>>> the only places looking at the guard variable.
>>>>> Assuming it's actually a guard, nothing besides the guard should care
>>>>> whether the guard variable initialized or not in the current call. The
>>>>> pass as written already makes assumptions that agree with that: for
>>>>> example, it doesn't bother to check for instructions with side-effects
>>>>> after the call to __cxa_guard_release.
>>>> I'm going to change my mind on this one. That's not safe. Here's my example.
>>>>
>>>> We have a function that calls __cxa_guard_acquire/release on a single
>>>> guard variable. Then we decide to clone it as part of partial
>>>> specialization.
>>>>
>>>> The initialization being guarded depends on some global variable -- if
>>>> it's zero it does nothing, else it prints "foo". When cloneA is run we
>>>> know that the global is always 0 so the initialization does nothing and
>>>> we eliminate the guards. In cloneB the global is always non-zero, so it
>>>> always prints "foo" to the screen and we keep the guards.
>>>>
>>>> When cloneA runs it needs to mark the guard variable as being "already
>>>> initialized" or else when cloneB runs it will go ahead and print "foo"
>>>> and it's not supposed to. You've changed the behaviour of the program.
>>> Ooh, that's right.  Actually, it gets nastier than that: suppose
>>> something like the following:
>>>
>>> static int gval1 = 1;
>>> int gval2 = 1;
>>> struct A { A() { if (gval1) { printf("%d\n", gval2); } };
>>> void a() { static A x(); gval2 = 0;}
>>> void b() { a(); }
>>> void c() { gval1 = 0; a(); }
>>>
>>> Then suppose b() and c() are called at the same time on separate
>>> threads, and we've inlined/optimized everything; if the guard is
>>> removed from c(), we can end up printing out "0", which shouldn't be
>>> possible because setting gval2 to zero only happens after the
>>> constructor for A finishes.
>> Right. deadGuardElim checks for memory *reads* as well as writes and
>> unwinds in order to prevent this sort of thing from happening.
> 
> If a() gets inlined into c(), the load inside A() of gval1 can be
> eliminated; I'm not sure if we do that particular optimization at the
> moment, though.

Boo. We'll continue to have problems so long as we try to eliminate one 
pair at a time, we need to either prove them all dead for a given guard 
variable or not.

Excellent review, by the way!

Nick


From clattner at apple.com  Mon May 25 23:13:09 2009
From: clattner at apple.com (Chris Lattner)
Date: Mon, 25 May 2009 21:13:09 -0700
Subject: [llvm-commits] [llvm] r72325 - in /llvm/trunk:
	include/llvm/CodeGen/SelectionDAG.h
	lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
	lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
In-Reply-To: <f5aa3e9b0905251749q258d03f6r7d8aa8da6dd9298a@mail.gmail.com>
References: <200905231235.n4NCZgvT018589@zion.cs.uiuc.edu>
	<2E4DA060-7225-419D-AB83-0E5FF6FAA7DE@apple.com>
	<f5aa3e9b0905251749q258d03f6r7d8aa8da6dd9298a@mail.gmail.com>
Message-ID: <19EF2DDB-27D8-4D9B-BC55-108698E8FF97@apple.com>


On May 25, 2009, at 5:49 PM, Eli Friedman wrote:

> On Mon, May 25, 2009 at 4:12 PM, Chris Lattner <clattner at apple.com>  
> wrote:
>> As Duncan said, please convert this from recursive to iterative.  One
>> known-problem with the existing legalizedag stuff is that the
>> recursive parts quickly run out of stack space when run on a thread
>> (which often has a smaller stack than the main process), it would be
>> nice to keep improving this: legalizetypes is iterative.
>
> I don't really want to copy 500 lines of LegalizeTypes code into
> LegalizeVectorOps.cpp... do you have some other suggestion?

What 500 lines would you need?

>>> +  /// This returns true if it made any changes; in that case,
>>> LegalizeTypes
>>> +  /// is called again before Legalize.
>>> +  ///
>>> +  /// Note that this is an involved process that may invalidate
>>> pointers into
>>> +  /// the graph.
>>> +  bool LegalizeVectors();
>>
>> Would it make sense to change this to only return true when an  
>> illegal
>> type is created?
>
> Maybe; the downside is that we lose the extra DAGCombiner run.

Yes, that's true.  I'd also like to get the dag combiner to be more  
incremental at some point.  It would be "really nice" to be possible  
to run the dag combiner on a subgraph of the dag after *every* major  
change (e.g. i64 -> i32 legalization).

> This
> significantly improves code generation for
> test/CodeGen/X86/widen_cast-4.ll, for example.

And others.  that looks like a partially reduced testcase, so the  
effects are probably bigger than in other cases, but I agree that it  
can be a significant win.

>>>> 2. The remaining pieces of LegalizeDAG should be rewritten, both to
>> make it iterative, and also to simplify it.  There is a ton of
>> duplicated code that happens for each operation.  Making it iterative
>> would allow us to simplify a bunch of this away I think.
>
> Yeah; there are also issues at the moment with inconsistently
> legalizing the operands of various operations.

Yeah, the old dag combiner used to get away with never legalizing  
certain magic operands.  I think that the use of TargetConstant, the  
changes to shufflevector etc are reducing the need for this though.

-Chris


From clattner at apple.com  Mon May 25 23:15:35 2009
From: clattner at apple.com (Chris Lattner)
Date: Mon, 25 May 2009 21:15:35 -0700
Subject: [llvm-commits] patch: CXAGuardElimination pass.
In-Reply-To: <4A1B1CBE.2030804@mxc.ca>
References: <4A1A1FBE.5090902@mxc.ca> <4A1A4FAB.2050404@free.fr>
	<4A1B1CBE.2030804@mxc.ca>
Message-ID: <BCCF6A9D-6820-407D-BC83-AA1C5AAC0951@apple.com>

On May 25, 2009, at 3:33 PM, Nick Lewycky wrote:
>>> +  This pass deletes dead calls to __cxa_guard_acquire and  
>>> __cxa_guard_release
>>> +  which are part of the Itanium C++ ABI. T hese are used to  
>>> prevent a function
>> T hese -> These
>
> That line is gone.
>
> Updated patch attached. Thanks for the review!

hi Nick,

As we discussed on IRC, I'd really like to see this get sucked into  
simplifylibcalls instead of being its own pass.  This has two  
advantages: 1) it will be a function pass, so it will interoperate  
more nicely with the inliner etc, and 2) it eliminates a special  
purpose pass with narrow goals.  I haven't look at the patch in detail  
yet, but one other minor point is that your loop to check to see if  
all uses of cxa_* are direct calls is not sufficient: other  
translation units could take their addresses etc.

-Chris


From clattner at apple.com  Mon May 25 23:33:40 2009
From: clattner at apple.com (Chris Lattner)
Date: Mon, 25 May 2009 21:33:40 -0700
Subject: [llvm-commits] Avoid O(#registers*#basicblocks) memory use in
	LiveVariables
In-Reply-To: <bb55930e0905221541y51948ebaq3ab3e95e7385ec13@mail.gmail.com>
References: <bb55930e0905221541y51948ebaq3ab3e95e7385ec13@mail.gmail.com>
Message-ID: <CE69B24E-D6D6-4CAA-9865-D83BAE0DFE01@apple.com>


On May 22, 2009, at 3:41 PM, Jeffrey Yasskin wrote:

> LiveVariables::VarInfo contains two BitVectors, AliveBlocks and
> UsedBlocks, which have as many entries as there are basic blocks in
> the function. I believe LiveVariables::getVarInfo creates a VarInfo
> struct for every register in the function, leading to quadratic space
> use. On a particular function with approximately 30k basic blocks and
> 280k instructions, which I've uploaded to
> http://jeffrey.yasskin.info/dump/big_module.bc.bz2, this took
> approximately 1.6GB of memory to codegen. The attached patch changes
> these two variables to SparseBitVectors, which makes the memory use go
> down to ~420MB (on Mac; llc on linux goes from 1.6GB->~900MB).

I don't have any specific comment on this patch, but I will raise the  
bigger issue: having a bitmap like this is insanity :).  Evan/Owen,  
what do you think the long term solution is for this? Can we eliminate  
this bitmap entirely from livevariables by using dominance based  
techniques, or build live intervals directly instead of building live  
variables?  What is the client of this info?

-Chris


From eli.friedman at gmail.com  Tue May 26 00:21:48 2009
From: eli.friedman at gmail.com (Eli Friedman)
Date: Mon, 25 May 2009 22:21:48 -0700
Subject: [llvm-commits] [llvm] r72325 - in /llvm/trunk:
	include/llvm/CodeGen/SelectionDAG.h
	lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
	lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
In-Reply-To: <19EF2DDB-27D8-4D9B-BC55-108698E8FF97@apple.com>
References: <200905231235.n4NCZgvT018589@zion.cs.uiuc.edu>
	<2E4DA060-7225-419D-AB83-0E5FF6FAA7DE@apple.com>
	<f5aa3e9b0905251749q258d03f6r7d8aa8da6dd9298a@mail.gmail.com>
	<19EF2DDB-27D8-4D9B-BC55-108698E8FF97@apple.com>
Message-ID: <f5aa3e9b0905252221j69ee950fyc8aa41c7a66b587e@mail.gmail.com>

On Mon, May 25, 2009 at 9:13 PM, Chris Lattner <clattner at apple.com> wrote:
>
> On May 25, 2009, at 5:49 PM, Eli Friedman wrote:
>
>> On Mon, May 25, 2009 at 4:12 PM, Chris Lattner <clattner at apple.com>
>> wrote:
>>> As Duncan said, please convert this from recursive to iterative. ?One
>>> known-problem with the existing legalizedag stuff is that the
>>> recursive parts quickly run out of stack space when run on a thread
>>> (which often has a smaller stack than the main process), it would be
>>> nice to keep improving this: legalizetypes is iterative.
>>
>> I don't really want to copy 500 lines of LegalizeTypes code into
>> LegalizeVectorOps.cpp... do you have some other suggestion?
>
> What 500 lines would you need?

Large parts of DAGTypeLegalizer::run and
DAGTypeLegalizer::PerformExpensiveChecks,
DAGTypeLegalizer::AnalyzeNewNode, DAGTypeLegalizer::AnalyzeNewValue,
DAGTypeLegalizer::RemapValue, a bit of DAGTypeLegalizer::ExpungeNode,
and NodeUpdateListener.  Okay, maybe not quite 500 lines, but still a
lot.

>>>>> 2. The remaining pieces of LegalizeDAG should be rewritten, both to
>>> make it iterative, and also to simplify it. ?There is a ton of
>>> duplicated code that happens for each operation. ?Making it iterative
>>> would allow us to simplify a bunch of this away I think.
>>
>> Yeah; there are also issues at the moment with inconsistently
>> legalizing the operands of various operations.
>
> Yeah, the old dag combiner used to get away with never legalizing
> certain magic operands. ?I think that the use of TargetConstant, the
> changes to shufflevector etc are reducing the need for this though.

LegalizeDAG now asserts that all the results and operands of every
node it inspects have legal type, so I think I've caught all the
issues of that sort.  But one example of something I saw is that PPC
was creating BUILD_VECTOR nodes with operands of illegal type, and the
legalizer never looked at them.

-Eli



From evan.cheng at apple.com  Tue May 26 00:59:50 2009
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 25 May 2009 22:59:50 -0700
Subject: [llvm-commits] Avoid O(#registers*#basicblocks) memory use in
	LiveVariables
In-Reply-To: <CE69B24E-D6D6-4CAA-9865-D83BAE0DFE01@apple.com>
References: <bb55930e0905221541y51948ebaq3ab3e95e7385ec13@mail.gmail.com>
	<CE69B24E-D6D6-4CAA-9865-D83BAE0DFE01@apple.com>
Message-ID: <66D0F297-77AB-49FF-B551-C0B544BC37BA@apple.com>


On May 25, 2009, at 9:33 PM, Chris Lattner wrote:

>
> On May 22, 2009, at 3:41 PM, Jeffrey Yasskin wrote:
>
>> LiveVariables::VarInfo contains two BitVectors, AliveBlocks and
>> UsedBlocks, which have as many entries as there are basic blocks in
>> the function. I believe LiveVariables::getVarInfo creates a VarInfo
>> struct for every register in the function, leading to quadratic space
>> use. On a particular function with approximately 30k basic blocks and
>> 280k instructions, which I've uploaded to
>> http://jeffrey.yasskin.info/dump/big_module.bc.bz2, this took
>> approximately 1.6GB of memory to codegen. The attached patch changes
>> these two variables to SparseBitVectors, which makes the memory use  
>> go
>> down to ~420MB (on Mac; llc on linux goes from 1.6GB->~900MB).
>
> I don't have any specific comment on this patch, but I will raise  
> the bigger issue: having a bitmap like this is insanity :).  Evan/ 
> Owen, what do you think the long term solution is for this? Can we  
> eliminate this bitmap entirely from livevariables by using dominance  
> based techniques, or build live intervals directly instead of  
> building live variables?  What is the client of this info?

Actually "UsedBlocks" can be eliminated today. It's not used any more  
as far as I can tell. As far "AliveBlocks", it's used by  
liveintervalanalysis and phi elimination. I believe LiveVariables can  
be eliminated by moving to dominance based technique. Certainly  
strongphielim does not make use of LiveVariables at all.

Evan

>
>
> -Chris



From evan.cheng at apple.com  Tue May 26 01:25:47 2009
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 26 May 2009 06:25:47 -0000
Subject: [llvm-commits] [llvm] r72411 - in /llvm/trunk:
 include/llvm/CodeGen/LiveVariables.h lib/CodeGen/LiveVariables.cpp
 lib/CodeGen/PHIElimination.cpp lib/CodeGen/TwoAddressInstructionPass.cpp
Message-ID: <200905260625.n4Q6PlM0021824@zion.cs.uiuc.edu>

Author: evancheng
Date: Tue May 26 01:25:46 2009
New Revision: 72411

URL: http://llvm.org/viewvc/llvm-project?rev=72411&view=rev
Log:
Eliminate VarInfo::UsedBlocks.

Modified:
    llvm/trunk/include/llvm/CodeGen/LiveVariables.h
    llvm/trunk/lib/CodeGen/LiveVariables.cpp
    llvm/trunk/lib/CodeGen/PHIElimination.cpp
    llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp

Modified: llvm/trunk/include/llvm/CodeGen/LiveVariables.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveVariables.h?rev=72411&r1=72410&r2=72411&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/LiveVariables.h (original)
+++ llvm/trunk/include/llvm/CodeGen/LiveVariables.h Tue May 26 01:25:46 2009
@@ -77,10 +77,6 @@
     ///
     BitVector AliveBlocks;
 
-    /// UsedBlocks - Set of blocks in which this value is actually used. This
-    /// is a bit set which uses the basic block number as an index.
-    BitVector UsedBlocks;
-
     /// NumUses - Number of uses of this register across the entire function.
     ///
     unsigned NumUses;

Modified: llvm/trunk/lib/CodeGen/LiveVariables.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveVariables.cpp?rev=72411&r1=72410&r2=72411&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/LiveVariables.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveVariables.cpp Tue May 26 01:25:46 2009
@@ -54,9 +54,6 @@
   cerr << "  Alive in blocks: ";
   for (int i = AliveBlocks.find_first(); i != -1; i = AliveBlocks.find_next(i))
     cerr << i << ", ";
-  cerr << "  Used in blocks: ";
-  for (int i = UsedBlocks.find_first(); i != -1; i = UsedBlocks.find_next(i))
-    cerr << i << ", ";
   cerr << "\n  Killed by:";
   if (Kills.empty())
     cerr << " No instructions.\n";
@@ -80,7 +77,6 @@
   }
   VarInfo &VI = VirtRegInfo[RegIdx];
   VI.AliveBlocks.resize(MF->getNumBlockIDs());
-  VI.UsedBlocks.resize(MF->getNumBlockIDs());
   return VI;
 }
 
@@ -131,7 +127,6 @@
   unsigned BBNum = MBB->getNumber();
 
   VarInfo& VRInfo = getVarInfo(reg);
-  VRInfo.UsedBlocks[BBNum] = true;
   VRInfo.NumUses++;
 
   // Check to see if this basic block is already a kill block.

Modified: llvm/trunk/lib/CodeGen/PHIElimination.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PHIElimination.cpp?rev=72411&r1=72410&r2=72411&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/PHIElimination.cpp (original)
+++ llvm/trunk/lib/CodeGen/PHIElimination.cpp Tue May 26 01:25:46 2009
@@ -249,8 +249,6 @@
       // each for each incoming block), the "def" block and instruction fields
       // for the VarInfo is not filled in.
       LV->addVirtualRegisterKilled(IncomingReg, PHICopy);
-
-      LV->getVarInfo(IncomingReg).UsedBlocks[MBB.getNumber()] = true;
     }
 
     // Since we are going to be deleting the PHI node, if it is the last use of
@@ -317,7 +315,6 @@
     // variables information so that it knows the copy source instruction kills
     // the incoming value.
     LiveVariables::VarInfo &InRegVI = LV->getVarInfo(SrcReg);
-    InRegVI.UsedBlocks[opBlock.getNumber()] = true;
 
     // Loop over all of the successors of the basic block, checking to see if
     // the value is either live in the block, or if it is killed in the block.

Modified: llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp?rev=72411&r1=72410&r2=72411&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp (original)
+++ llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp Tue May 26 01:25:46 2009
@@ -955,11 +955,6 @@
 
           // Update live variables for regB.
           if (LV) {
-            LiveVariables::VarInfo& varInfoB = LV->getVarInfo(regB);
-
-            // regB is used in this BB.
-            varInfoB.UsedBlocks[mbbi->getNumber()] = true;
-
             if (LV->removeVirtualRegisterKilled(regB,  mi))
               LV->addVirtualRegisterKilled(regB, prevMI);
 




From baldrick at free.fr  Tue May 26 03:12:53 2009
From: baldrick at free.fr (Duncan Sands)
Date: Tue, 26 May 2009 10:12:53 +0200
Subject: [llvm-commits] patch: CXAGuardElimination pass.
In-Reply-To: <4A1B1CBE.2030804@mxc.ca>
References: <4A1A1FBE.5090902@mxc.ca> <4A1A4FAB.2050404@free.fr>
	<4A1B1CBE.2030804@mxc.ca>
Message-ID: <4A1BA485.3040503@free.fr>

Hi Nick,

>> What about this:
>>
>> bb1: acquire
>>       br bbr
>> bb2: acquire
>>       br bbr
>> bbr: release
>>
>> Aren't you going to eliminate the first acquire and the release, but
>> not the second acquire?
> 
> No, it'll eliminate the second acquire and the release, but not the 
> first acquire. Note that there's code to detect this case in 
> deadGuardElim (see the comments).

note that bb1 doesn't branch to bb2, it branches to bbr.

> As far as I can tell that's valid behaviour for this transform so long 
> as we don't mind removing infinite loops (note that these infinite loops 
> can't be deliberately constructed by the user code, the calls to 
> __cxa_guard are always emitted by the compiler...).

Not sure what you are saying?  I hope you are not saying that this
transform relies on a particular style of guard usage being fed into
it...

Ciao,

Duncan.


From eli.friedman at gmail.com  Tue May 26 03:55:56 2009
From: eli.friedman at gmail.com (Eli Friedman)
Date: Tue, 26 May 2009 08:55:56 -0000
Subject: [llvm-commits] [llvm] r72414 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Message-ID: <200905260855.n4Q8tvJu006888@zion.cs.uiuc.edu>

Author: efriedma
Date: Tue May 26 03:55:52 2009
New Revision: 72414

URL: http://llvm.org/viewvc/llvm-project?rev=72414&view=rev
Log:
Delete a bunch of dead code from LegalizeDAG.


Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=72414&r1=72413&r2=72414&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Tue May 26 03:55:52 2009
@@ -69,11 +69,6 @@
   /// being legalized (which could lead to non-serialized call sequences).
   bool IsLegalizingCall;
 
-  /// IsLegalizingCallArguments - This member is used only for the purpose
-  /// of providing assert to check for LegalizeTypes because legalizing an
-  /// operation might introduce call nodes that might need type legalization.
-  bool IsLegalizingCallArgs;
-
   enum LegalizeAction {
     Legal,      // The target natively supports this operation.
     Promote,    // This operation should be executed in a larger type.
@@ -90,51 +85,12 @@
   /// allows us to avoid legalizing the same thing more than once.
   DenseMap<SDValue, SDValue> LegalizedNodes;
 
-  /// PromotedNodes - For nodes that are below legal width, and that have more
-  /// than one use, this map indicates what promoted value to use.  This allows
-  /// us to avoid promoting the same thing more than once.
-  DenseMap<SDValue, SDValue> PromotedNodes;
-
-  /// ExpandedNodes - For nodes that need to be expanded this map indicates
-  /// which operands are the expanded version of the input.  This allows
-  /// us to avoid expanding the same node more than once.
-  DenseMap<SDValue, std::pair<SDValue, SDValue> > ExpandedNodes;
-
-  /// SplitNodes - For vector nodes that need to be split, this map indicates
-  /// which operands are the split version of the input.  This allows us
-  /// to avoid splitting the same node more than once.
-  std::map<SDValue, std::pair<SDValue, SDValue> > SplitNodes;
-
-  /// ScalarizedNodes - For nodes that need to be converted from vector types to
-  /// scalar types, this contains the mapping of ones we have already
-  /// processed to the result.
-  std::map<SDValue, SDValue> ScalarizedNodes;
-
-  /// WidenNodes - For nodes that need to be widened from one vector type to
-  /// another, this contains the mapping of those that we have already widen.
-  /// This allows us to avoid widening more than once.
-  std::map<SDValue, SDValue> WidenNodes;
-
   void AddLegalizedOperand(SDValue From, SDValue To) {
     LegalizedNodes.insert(std::make_pair(From, To));
     // If someone requests legalization of the new node, return itself.
     if (From != To)
       LegalizedNodes.insert(std::make_pair(To, To));
   }
-  void AddPromotedOperand(SDValue From, SDValue To) {
-    bool isNew = PromotedNodes.insert(std::make_pair(From, To)).second;
-    assert(isNew && "Got into the map somehow?");
-    isNew = isNew;
-    // If someone requests legalization of the new node, return itself.
-    LegalizedNodes.insert(std::make_pair(To, To));
-  }
-  void AddWidenedOperand(SDValue From, SDValue To) {
-    bool isNew = WidenNodes.insert(std::make_pair(From, To)).second;
-    assert(isNew && "Got into the map somehow?");
-    isNew = isNew;
-    // If someone requests legalization of the new node, return itself.
-    LegalizedNodes.insert(std::make_pair(To, To));
-  }
 
 public:
   SelectionDAGLegalize(SelectionDAG &DAG, CodeGenOpt::Level ol);
@@ -164,12 +120,6 @@
   /// result.
   SDValue LegalizeOp(SDValue O);
 
-  /// UnrollVectorOp - We know that the given vector has a legal type, however
-  /// the operation it performs is not legal and is an operation that we have
-  /// no way of lowering.  "Unroll" the vector, splitting out the scalars and
-  /// operating on each element individually.
-  SDValue UnrollVectorOp(SDValue O);
-
   /// PerformInsertVectorEltInMemory - Some target cannot handle a variable
   /// insertion index for the INSERT_VECTOR_ELT instruction.  In this case, it
   /// is necessary to spill the vector being inserted into to memory, perform
@@ -177,94 +127,9 @@
   SDValue PerformInsertVectorEltInMemory(SDValue Vec, SDValue Val,
                                            SDValue Idx, DebugLoc dl);
 
-  /// PromoteOp - Given an operation that produces a value in an invalid type,
-  /// promote it to compute the value into a larger type.  The produced value
-  /// will have the correct bits for the low portion of the register, but no
-  /// guarantee is made about the top bits: it may be zero, sign-extended, or
-  /// garbage.
-  SDValue PromoteOp(SDValue O);
-
-  /// ExpandOp - Expand the specified SDValue into its two component pieces
-  /// Lo&Hi.  Note that the Op MUST be an expanded type.  As a result of this,
-  /// the LegalizedNodes map is filled in for any results that are not expanded,
-  /// the ExpandedNodes map is filled in for any results that are expanded, and
-  /// the Lo/Hi values are returned.   This applies to integer types and Vector
-  /// types.
-  void ExpandOp(SDValue O, SDValue &Lo, SDValue &Hi);
-
-  /// WidenVectorOp - Widen a vector operation to a wider type given by WidenVT
-  /// (e.g., v3i32 to v4i32).  The produced value will have the correct value
-  /// for the existing elements but no guarantee is made about the new elements
-  /// at the end of the vector: it may be zero, ones, or garbage. This is useful
-  /// when we have an instruction operating on an illegal vector type and we
-  /// want to widen it to do the computation on a legal wider vector type.
-  SDValue WidenVectorOp(SDValue Op, MVT WidenVT);
-
-  /// SplitVectorOp - Given an operand of vector type, break it down into
-  /// two smaller values.
-  void SplitVectorOp(SDValue O, SDValue &Lo, SDValue &Hi);
-
-  /// ScalarizeVectorOp - Given an operand of single-element vector type
-  /// (e.g. v1f32), convert it into the equivalent operation that returns a
-  /// scalar (e.g. f32) value.
-  SDValue ScalarizeVectorOp(SDValue O);
-
   /// Useful 16 element vector type that is used to pass operands for widening.
   typedef SmallVector<SDValue, 16> SDValueVector;
 
-  /// LoadWidenVectorOp - Load a vector for a wider type. Returns true if
-  /// the LdChain contains a single load and false if it contains a token
-  /// factor for multiple loads. It takes
-  ///   Result:  location to return the result
-  ///   LdChain: location to return the load chain
-  ///   Op:      load operation to widen
-  ///   NVT:     widen vector result type we want for the load
-  bool LoadWidenVectorOp(SDValue& Result, SDValue& LdChain,
-                         SDValue Op, MVT NVT);
-
-  /// Helper genWidenVectorLoads - Helper function to generate a set of
-  /// loads to load a vector with a resulting wider type. It takes
-  ///   LdChain: list of chains for the load we have generated
-  ///   Chain:   incoming chain for the ld vector
-  ///   BasePtr: base pointer to load from
-  ///   SV:      memory disambiguation source value
-  ///   SVOffset:  memory disambiugation offset
-  ///   Alignment: alignment of the memory
-  ///   isVolatile: volatile load
-  ///   LdWidth:    width of memory that we want to load
-  ///   ResType:    the wider result result type for the resulting loaded vector
-  SDValue genWidenVectorLoads(SDValueVector& LdChain, SDValue Chain,
-                                SDValue BasePtr, const Value *SV,
-                                int SVOffset, unsigned Alignment,
-                                bool isVolatile, unsigned LdWidth,
-                                MVT ResType, DebugLoc dl);
-
-  /// StoreWidenVectorOp - Stores a widen vector into non widen memory
-  /// location. It takes
-  ///     ST:      store node that we want to replace
-  ///     Chain:   incoming store chain
-  ///     BasePtr: base address of where we want to store into
-  SDValue StoreWidenVectorOp(StoreSDNode *ST, SDValue Chain,
-                               SDValue BasePtr);
-
-  /// Helper genWidenVectorStores - Helper function to generate a set of
-  /// stores to store a widen vector into non widen memory
-  // It takes
-  //   StChain: list of chains for the stores we have generated
-  //   Chain:   incoming chain for the ld vector
-  //   BasePtr: base pointer to load from
-  //   SV:      memory disambiguation source value
-  //   SVOffset:   memory disambiugation offset
-  //   Alignment:  alignment of the memory
-  //   isVolatile: volatile lod
-  //   ValOp:   value to store
-  //   StWidth: width of memory that we want to store
-  void genWidenVectorStores(SDValueVector& StChain, SDValue Chain,
-                            SDValue BasePtr, const Value *SV,
-                            int SVOffset, unsigned Alignment,
-                            bool isVolatile, SDValue ValOp,
-                            unsigned StWidth, DebugLoc dl);
-
   /// ShuffleWithNarrowerEltType - Return a vector shuffle operation which
   /// performs the same shuffe in terms of order or result bytes, but on a type
   /// whose vector element type is narrower than the original shuffle type.
@@ -288,7 +153,6 @@
 
   SDValue ExpandLibCall(RTLIB::Libcall LC, SDNode *Node, bool isSigned,
                           SDValue &Hi);
-  SDValue ExpandIntToFP(bool isSigned, MVT DestTy, SDValue Source, DebugLoc dl);
 
   SDValue EmitStackConvert(SDValue SrcOp, MVT SlotVT, MVT DestVT, DebugLoc dl);
   SDValue ExpandBUILD_VECTOR(SDNode *Node);
@@ -304,12 +168,7 @@
 
   SDValue ExpandBSWAP(SDValue Op, DebugLoc dl);
   SDValue ExpandBitCount(unsigned Opc, SDValue Op, DebugLoc dl);
-  bool ExpandShift(unsigned Opc, SDValue Op, SDValue Amt,
-                   SDValue &Lo, SDValue &Hi, DebugLoc dl);
-  void ExpandShiftParts(unsigned NodeOp, SDValue Op, SDValue Amt,
-                        SDValue &Lo, SDValue &Hi, DebugLoc dl);
 
-  SDValue ExpandEXTRACT_SUBVECTOR(SDValue Op);
   SDValue ExpandEXTRACT_VECTOR_ELT(SDValue Op);
   SDValue ExpandExtractFromVectorThroughStack(SDValue Op);
 };
@@ -359,7 +218,6 @@
 void SelectionDAGLegalize::LegalizeDAG() {
   LastCALLSEQ_END = DAG.getEntryNode();
   IsLegalizingCall = false;
-  IsLegalizingCallArgs = false;
 
   // The legalize process is inherently a bottom-up recursive process (users
   // legalize their uses before themselves).  Given infinite stack space, we
@@ -377,12 +235,7 @@
   assert(LegalizedNodes.count(OldRoot) && "Root didn't get legalized?");
   DAG.setRoot(LegalizedNodes[OldRoot]);
 
-  ExpandedNodes.clear();
   LegalizedNodes.clear();
-  PromotedNodes.clear();
-  SplitNodes.clear();
-  ScalarizedNodes.clear();
-  WidenNodes.clear();
 
   // Remove dead nodes now.
   DAG.RemoveDeadNodes();
@@ -457,17 +310,7 @@
 
   // If the first result of this node has been already legalized, then it cannot
   // reach N.
-  switch (getTypeAction(N->getValueType(0))) {
-  case Legal:
-    if (LegalizedNodes.count(SDValue(N, 0))) return false;
-    break;
-  case Promote:
-    if (PromotedNodes.count(SDValue(N, 0))) return false;
-    break;
-  case Expand:
-    if (ExpandedNodes.count(SDValue(N, 0))) return false;
-    break;
-  }
+  if (LegalizedNodes.count(SDValue(N, 0))) return false;
 
   // Okay, this node has not already been legalized.  Check and legalize all
   // operands.  If none lead to Dest, then we can legalize this node.
@@ -495,43 +338,7 @@
   MVT VT = Op.getValueType();
   // We should never see any illegal result types here.
   assert(isTypeLegal(VT) && "Illegal type introduced after type legalization?");
-  switch (getTypeAction(VT)) {
-  default: assert(0 && "Bad type action!");
-  case Legal:   (void)LegalizeOp(Op); break;
-  case Promote:
-    if (!VT.isVector()) {
-      (void)PromoteOp(Op);
-      break;
-    }
-    else  {
-      // See if we can widen otherwise use Expand to either scalarize or split
-      MVT WidenVT = TLI.getWidenVectorType(VT);
-      if (WidenVT != MVT::Other) {
-        (void) WidenVectorOp(Op, WidenVT);
-        break;
-      }
-      // else fall thru to expand since we can't widen the vector
-    }
-  case Expand:
-    if (!VT.isVector()) {
-      // If this is an illegal scalar, expand it into its two component
-      // pieces.
-      SDValue X, Y;
-      if (Op.getOpcode() == ISD::TargetConstant)
-        break;  // Allow illegal target nodes.
-      ExpandOp(Op, X, Y);
-    } else if (VT.getVectorNumElements() == 1) {
-      // If this is an illegal single element vector, convert it to a
-      // scalar operation.
-      (void)ScalarizeVectorOp(Op);
-    } else {
-      // This is an illegal multiple element vector.
-      // Split it in half and legalize both parts.
-      SDValue X, Y;
-      SplitVectorOp(Op, X, Y);
-    }
-    break;
-  }
+  (void)LegalizeOp(Op);
 }
 
 /// ExpandConstantFP - Expands the ConstantFP node to an integer constant or
@@ -582,53 +389,6 @@
                      PseudoSourceValue::getConstantPool(), 0, false, Alignment);
 }
 
-
-/// ExpandFCOPYSIGNToBitwiseOps - Expands fcopysign to a series of bitwise
-/// operations.
-static
-SDValue ExpandFCOPYSIGNToBitwiseOps(SDNode *Node, MVT NVT,
-                                    SelectionDAG &DAG,
-                                    const TargetLowering &TLI) {
-  DebugLoc dl = Node->getDebugLoc();
-  MVT VT = Node->getValueType(0);
-  MVT SrcVT = Node->getOperand(1).getValueType();
-  assert((SrcVT == MVT::f32 || SrcVT == MVT::f64) &&
-         "fcopysign expansion only supported for f32 and f64");
-  MVT SrcNVT = (SrcVT == MVT::f64) ? MVT::i64 : MVT::i32;
-
-  // First get the sign bit of second operand.
-  SDValue Mask1 = (SrcVT == MVT::f64)
-    ? DAG.getConstantFP(BitsToDouble(1ULL << 63), SrcVT)
-    : DAG.getConstantFP(BitsToFloat(1U << 31), SrcVT);
-  Mask1 = DAG.getNode(ISD::BIT_CONVERT, dl, SrcNVT, Mask1);
-  SDValue SignBit= DAG.getNode(ISD::BIT_CONVERT, dl, SrcNVT,
-                               Node->getOperand(1));
-  SignBit = DAG.getNode(ISD::AND, dl, SrcNVT, SignBit, Mask1);
-  // Shift right or sign-extend it if the two operands have different types.
-  int SizeDiff = SrcNVT.getSizeInBits() - NVT.getSizeInBits();
-  if (SizeDiff > 0) {
-    SignBit = DAG.getNode(ISD::SRL, dl, SrcNVT, SignBit,
-                          DAG.getConstant(SizeDiff, TLI.getShiftAmountTy()));
-    SignBit = DAG.getNode(ISD::TRUNCATE, dl, NVT, SignBit);
-  } else if (SizeDiff < 0) {
-    SignBit = DAG.getNode(ISD::ZERO_EXTEND, dl, NVT, SignBit);
-    SignBit = DAG.getNode(ISD::SHL, dl, NVT, SignBit,
-                          DAG.getConstant(-SizeDiff, TLI.getShiftAmountTy()));
-  }
-
-  // Clear the sign bit of first operand.
-  SDValue Mask2 = (VT == MVT::f64)
-    ? DAG.getConstantFP(BitsToDouble(~(1ULL << 63)), VT)
-    : DAG.getConstantFP(BitsToFloat(~(1U << 31)), VT);
-  Mask2 = DAG.getNode(ISD::BIT_CONVERT, dl, NVT, Mask2);
-  SDValue Result = DAG.getNode(ISD::BIT_CONVERT, dl, NVT, Node->getOperand(0));
-  Result = DAG.getNode(ISD::AND, dl, NVT, Result, Mask2);
-
-  // Or the value with the sign bit.
-  Result = DAG.getNode(ISD::OR, dl, NVT, Result, SignBit);
-  return Result;
-}
-
 /// ExpandUnalignedStore - Expands an unaligned store to 2 half-size stores.
 static
 SDValue ExpandUnalignedStore(StoreSDNode *ST, SelectionDAG &DAG,
@@ -864,58 +624,6 @@
   return DAG.getMergeValues(Ops, 2, dl);
 }
 
-/// UnrollVectorOp - We know that the given vector has a legal type, however
-/// the operation it performs is not legal and is an operation that we have
-/// no way of lowering.  "Unroll" the vector, splitting out the scalars and
-/// operating on each element individually.
-SDValue SelectionDAGLegalize::UnrollVectorOp(SDValue Op) {
-  MVT VT = Op.getValueType();
-  assert(isTypeLegal(VT) &&
-         "Caller should expand or promote operands that are not legal!");
-  assert(Op.getNode()->getNumValues() == 1 &&
-         "Can't unroll a vector with multiple results!");
-  unsigned NE = VT.getVectorNumElements();
-  MVT EltVT = VT.getVectorElementType();
-  DebugLoc dl = Op.getDebugLoc();
-
-  SmallVector<SDValue, 8> Scalars;
-  SmallVector<SDValue, 4> Operands(Op.getNumOperands());
-  for (unsigned i = 0; i != NE; ++i) {
-    for (unsigned j = 0; j != Op.getNumOperands(); ++j) {
-      SDValue Operand = Op.getOperand(j);
-      MVT OperandVT = Operand.getValueType();
-      if (OperandVT.isVector()) {
-        // A vector operand; extract a single element.
-        MVT OperandEltVT = OperandVT.getVectorElementType();
-        Operands[j] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,
-                                  OperandEltVT,
-                                  Operand,
-                                  DAG.getConstant(i, MVT::i32));
-      } else {
-        // A scalar operand; just use it as is.
-        Operands[j] = Operand;
-      }
-    }
-
-    switch (Op.getOpcode()) {
-    default:
-      Scalars.push_back(DAG.getNode(Op.getOpcode(), dl, EltVT,
-                                    &Operands[0], Operands.size()));
-      break;
-    case ISD::SHL:
-    case ISD::SRA:
-    case ISD::SRL:
-    case ISD::ROTL:
-    case ISD::ROTR:
-      Scalars.push_back(DAG.getNode(Op.getOpcode(), dl, EltVT, Operands[0],
-                                    DAG.getShiftAmountOperand(Operands[1])));
-      break;
-    }
-  }
-
-  return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Scalars[0], Scalars.size());
-}
-
 /// GetFPLibCall - Return the right libcall for the given floating point type.
 static RTLIB::Libcall GetFPLibCall(MVT VT,
                                    RTLIB::Libcall Call_F32,
@@ -1291,20 +999,13 @@
       if (Result.getNode())
         break;
     case TargetLowering::Legal: {
-      LegalizeAction Action = getTypeAction(Node->getOperand(1).getValueType());
-      if (Action == Legal && Tmp1 == Node->getOperand(0))
+      if (Tmp1 == Node->getOperand(0))
         break;
 
       SmallVector<SDValue, 8> Ops;
       Ops.push_back(Tmp1);
-      if (Action == Legal) {
-        Ops.push_back(Node->getOperand(1));  // line # must be legal.
-        Ops.push_back(Node->getOperand(2));  // col # must be legal.
-      } else {
-        // Otherwise promote them.
-        Ops.push_back(PromoteOp(Node->getOperand(1)));
-        Ops.push_back(PromoteOp(Node->getOperand(2)));
-      }
+      Ops.push_back(Node->getOperand(1));  // line # must be legal.
+      Ops.push_back(Node->getOperand(2));  // col # must be legal.
       Ops.push_back(Node->getOperand(3));  // filename must be legal.
       Ops.push_back(Node->getOperand(4));  // working dir # must be legal.
       Result = DAG.UpdateNodeOperands(Result, &Ops[0], Ops.size());
@@ -1784,13 +1485,11 @@
     // Recursively Legalize all of the inputs of the call end that do not lead
     // to this call start.  This ensures that any libcalls that need be inserted
     // are inserted *before* the CALLSEQ_START.
-    IsLegalizingCallArgs = true;
     {SmallPtrSet<SDNode*, 32> NodesLeadingTo;
     for (unsigned i = 0, e = CallEnd->getNumOperands(); i != e; ++i)
       LegalizeAllNodesNotLeadingTo(CallEnd->getOperand(i).getNode(), Node,
                                    NodesLeadingTo);
     }
-    IsLegalizingCallArgs = false;
 
     // Now that we legalized all of the inputs (which may have inserted
     // libcalls) create the new CALLSEQ_START node.
@@ -3086,10 +2785,7 @@
         break;
       }
 
-      assert(Node->getValueType(0).isVector() &&
-             "Cannot expand this binary operator!");
-      // Expand the operation into a bunch of nasty scalar code.
-      Result = LegalizeOp(UnrollVectorOp(Op));
+      assert(0 && "Cannot expand this binary operator!");
       break;
     }
     case TargetLowering::Promote: {
@@ -3336,10 +3032,7 @@
         break;
       }
 
-      assert(VT.isVector() &&
-             "Cannot expand this binary operator!");
-      // Expand the operation into a bunch of nasty scalar code.
-      Result = LegalizeOp(UnrollVectorOp(Op));
+      assert(0 && "Cannot expand this binary operator!");
       break;
     }
     }
@@ -3620,11 +3313,7 @@
       case ISD::FNEARBYINT: {
         MVT VT = Node->getValueType(0);
 
-        // Expand unsupported unary vector operators by unrolling them.
-        if (VT.isVector()) {
-          Result = LegalizeOp(UnrollVectorOp(Op));
-          break;
-        }
+        assert(!VT.isVector() && "Vector shouldn't get here!");
 
         RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
         switch(Node->getOpcode()) {
@@ -3695,10 +3384,7 @@
     MVT VT = Node->getValueType(0);
 
     // Expand unsupported unary vector operators by unrolling them.
-    if (VT.isVector()) {
-      Result = LegalizeOp(UnrollVectorOp(Op));
-      break;
-    }
+    assert(!VT.isVector() && "Vector shouldn't get here!");
 
     // We always lower FPOWI into a libcall.  No target support for it yet.
     RTLIB::Libcall LC = GetFPLibCall(VT, RTLIB::POWI_F32, RTLIB::POWI_F64,
@@ -3774,11 +3460,6 @@
         if (Tmp1.getNode()) Result = Tmp1;
       }
       break;
-    case TargetLowering::Expand:
-      assert(Result.getValueType().isVector() && "must be vector type");
-      // Unroll the truncate.  We should do better.
-      Result = LegalizeOp(UnrollVectorOp(Result));
-      break;
     }
     break;
 
@@ -4093,497 +3774,6 @@
   return Result;
 }
 
-/// PromoteOp - Given an operation that produces a value in an invalid type,
-/// promote it to compute the value into a larger type.  The produced value will
-/// have the correct bits for the low portion of the register, but no guarantee
-/// is made about the top bits: it may be zero, sign-extended, or garbage.
-SDValue SelectionDAGLegalize::PromoteOp(SDValue Op) {
-  assert(0 && "This should be dead!");
-  MVT VT = Op.getValueType();
-  MVT NVT = TLI.getTypeToTransformTo(VT);
-  assert(getTypeAction(VT) == Promote &&
-         "Caller should expand or legalize operands that are not promotable!");
-  assert(NVT.bitsGT(VT) && NVT.isInteger() == VT.isInteger() &&
-         "Cannot promote to smaller type!");
-
-  SDValue Tmp1, Tmp2, Tmp3;
-  SDValue Result;
-  SDNode *Node = Op.getNode();
-  DebugLoc dl = Node->getDebugLoc();
-
-  DenseMap<SDValue, SDValue>::iterator I = PromotedNodes.find(Op);
-  if (I != PromotedNodes.end()) return I->second;
-
-  switch (Node->getOpcode()) {
-  case ISD::CopyFromReg:
-    assert(0 && "CopyFromReg must be legal!");
-  default:
-#ifndef NDEBUG
-    cerr << "NODE: "; Node->dump(&DAG); cerr << "\n";
-#endif
-    assert(0 && "Do not know how to promote this operator!");
-    abort();
-  case ISD::UNDEF:
-    Result = DAG.getUNDEF(NVT);
-    break;
-  case ISD::Constant:
-    if (VT != MVT::i1)
-      Result = DAG.getNode(ISD::SIGN_EXTEND, dl, NVT, Op);
-    else
-      Result = DAG.getNode(ISD::ZERO_EXTEND, dl, NVT, Op);
-    assert(isa<ConstantSDNode>(Result) && "Didn't constant fold zext?");
-    break;
-  case ISD::ConstantFP:
-    Result = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Op);
-    assert(isa<ConstantFPSDNode>(Result) && "Didn't constant fold fp_extend?");
-    break;
-
-  case ISD::SETCC: {
-    MVT VT0 = Node->getOperand(0).getValueType();
-    assert(isTypeLegal(TLI.getSetCCResultType(VT0))
-           && "SetCC type is not legal??");
-    Result = DAG.getNode(ISD::SETCC, dl, TLI.getSetCCResultType(VT0),
-                         Node->getOperand(0), Node->getOperand(1),
-                         Node->getOperand(2));
-    break;
-  }
-  case ISD::TRUNCATE:
-    switch (getTypeAction(Node->getOperand(0).getValueType())) {
-    case Legal:
-      Result = LegalizeOp(Node->getOperand(0));
-      assert(Result.getValueType().bitsGE(NVT) &&
-             "This truncation doesn't make sense!");
-      if (Result.getValueType().bitsGT(NVT))    // Truncate to NVT instead of VT
-        Result = DAG.getNode(ISD::TRUNCATE, dl, NVT, Result);
-      break;
-    case Promote:
-      // The truncation is not required, because we don't guarantee anything
-      // about high bits anyway.
-      Result = PromoteOp(Node->getOperand(0));
-      break;
-    case Expand:
-      ExpandOp(Node->getOperand(0), Tmp1, Tmp2);
-      // Truncate the low part of the expanded value to the result type
-      Result = DAG.getNode(ISD::TRUNCATE, dl, NVT, Tmp1);
-    }
-    break;
-  case ISD::SIGN_EXTEND:
-  case ISD::ZERO_EXTEND:
-  case ISD::ANY_EXTEND:
-    switch (getTypeAction(Node->getOperand(0).getValueType())) {
-    case Expand: assert(0 && "BUG: Smaller reg should have been promoted!");
-    case Legal:
-      // Input is legal?  Just do extend all the way to the larger type.
-      Result = DAG.getNode(Node->getOpcode(), dl, NVT, Node->getOperand(0));
-      break;
-    case Promote:
-      // Promote the reg if it's smaller.
-      Result = PromoteOp(Node->getOperand(0));
-      // The high bits are not guaranteed to be anything.  Insert an extend.
-      if (Node->getOpcode() == ISD::SIGN_EXTEND)
-        Result = DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, NVT, Result,
-                         DAG.getValueType(Node->getOperand(0).getValueType()));
-      else if (Node->getOpcode() == ISD::ZERO_EXTEND)
-        Result = DAG.getZeroExtendInReg(Result, dl,
-                                        Node->getOperand(0).getValueType());
-      break;
-    }
-    break;
-  case ISD::CONVERT_RNDSAT: {
-    ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(Node)->getCvtCode();
-    assert ((CvtCode == ISD::CVT_SS || CvtCode == ISD::CVT_SU ||
-             CvtCode == ISD::CVT_US || CvtCode == ISD::CVT_UU ||
-             CvtCode == ISD::CVT_SF || CvtCode == ISD::CVT_UF) &&
-            "can only promote integers");
-    Result = DAG.getConvertRndSat(NVT, dl, Node->getOperand(0),
-                                  Node->getOperand(1), Node->getOperand(2),
-                                  Node->getOperand(3), Node->getOperand(4),
-                                  CvtCode);
-    break;
-
-  }
-  case ISD::BIT_CONVERT:
-    Result = EmitStackConvert(Node->getOperand(0), Node->getValueType(0),
-                              Node->getValueType(0), dl);
-    Result = PromoteOp(Result);
-    break;
-
-  case ISD::FP_EXTEND:
-    assert(0 && "Case not implemented.  Dynamically dead with 2 FP types!");
-  case ISD::FP_ROUND:
-    switch (getTypeAction(Node->getOperand(0).getValueType())) {
-    case Expand: assert(0 && "BUG: Cannot expand FP regs!");
-    case Promote:  assert(0 && "Unreachable with 2 FP types!");
-    case Legal:
-      if (Node->getConstantOperandVal(1) == 0) {
-        // Input is legal?  Do an FP_ROUND_INREG.
-        Result = DAG.getNode(ISD::FP_ROUND_INREG, dl, NVT, Node->getOperand(0),
-                             DAG.getValueType(VT));
-      } else {
-        // Just remove the truncate, it isn't affecting the value.
-        Result = DAG.getNode(ISD::FP_ROUND, dl, NVT, Node->getOperand(0),
-                             Node->getOperand(1));
-      }
-      break;
-    }
-    break;
-  case ISD::SINT_TO_FP:
-  case ISD::UINT_TO_FP:
-    switch (getTypeAction(Node->getOperand(0).getValueType())) {
-    case Legal:
-      // No extra round required here.
-      Result = DAG.getNode(Node->getOpcode(), dl, NVT, Node->getOperand(0));
-      break;
-
-    case Promote:
-      Result = PromoteOp(Node->getOperand(0));
-      if (Node->getOpcode() == ISD::SINT_TO_FP)
-        Result = DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, Result.getValueType(),
-                             Result,
-                         DAG.getValueType(Node->getOperand(0).getValueType()));
-      else
-        Result = DAG.getZeroExtendInReg(Result, dl,
-                                        Node->getOperand(0).getValueType());
-      // No extra round required here.
-      Result = DAG.getNode(Node->getOpcode(), dl, NVT, Result);
-      break;
-    case Expand:
-      Result = ExpandIntToFP(Node->getOpcode() == ISD::SINT_TO_FP, NVT,
-                             Node->getOperand(0), dl);
-      // Round if we cannot tolerate excess precision.
-      if (NoExcessFPPrecision)
-        Result = DAG.getNode(ISD::FP_ROUND_INREG, dl, NVT, Result,
-                             DAG.getValueType(VT));
-      break;
-    }
-    break;
-
-  case ISD::SIGN_EXTEND_INREG:
-    Result = PromoteOp(Node->getOperand(0));
-    Result = DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, NVT, Result,
-                         Node->getOperand(1));
-    break;
-  case ISD::FP_TO_SINT:
-  case ISD::FP_TO_UINT:
-    switch (getTypeAction(Node->getOperand(0).getValueType())) {
-    case Legal:
-    case Expand:
-      Tmp1 = Node->getOperand(0);
-      break;
-    case Promote:
-      // The input result is prerounded, so we don't have to do anything
-      // special.
-      Tmp1 = PromoteOp(Node->getOperand(0));
-      break;
-    }
-    // If we're promoting a UINT to a larger size, check to see if the new node
-    // will be legal.  If it isn't, check to see if FP_TO_SINT is legal, since
-    // we can use that instead.  This allows us to generate better code for
-    // FP_TO_UINT for small destination sizes on targets where FP_TO_UINT is not
-    // legal, such as PowerPC.
-    if (Node->getOpcode() == ISD::FP_TO_UINT &&
-        !TLI.isOperationLegalOrCustom(ISD::FP_TO_UINT, NVT) &&
-        (TLI.isOperationLegalOrCustom(ISD::FP_TO_SINT, NVT) ||
-         TLI.getOperationAction(ISD::FP_TO_SINT, NVT)==TargetLowering::Custom)){
-      Result = DAG.getNode(ISD::FP_TO_SINT, dl, NVT, Tmp1);
-    } else {
-      Result = DAG.getNode(Node->getOpcode(), dl, NVT, Tmp1);
-    }
-    break;
-
-  case ISD::FABS:
-  case ISD::FNEG:
-    Tmp1 = PromoteOp(Node->getOperand(0));
-    assert(Tmp1.getValueType() == NVT);
-    Result = DAG.getNode(Node->getOpcode(), dl, NVT, Tmp1);
-    // NOTE: we do not have to do any extra rounding here for
-    // NoExcessFPPrecision, because we know the input will have the appropriate
-    // precision, and these operations don't modify precision at all.
-    break;
-
-  case ISD::FLOG:
-  case ISD::FLOG2:
-  case ISD::FLOG10:
-  case ISD::FEXP:
-  case ISD::FEXP2:
-  case ISD::FSQRT:
-  case ISD::FSIN:
-  case ISD::FCOS:
-  case ISD::FTRUNC:
-  case ISD::FFLOOR:
-  case ISD::FCEIL:
-  case ISD::FRINT:
-  case ISD::FNEARBYINT:
-    Tmp1 = PromoteOp(Node->getOperand(0));
-    assert(Tmp1.getValueType() == NVT);
-    Result = DAG.getNode(Node->getOpcode(), dl, NVT, Tmp1);
-    if (NoExcessFPPrecision)
-      Result = DAG.getNode(ISD::FP_ROUND_INREG, dl, NVT, Result,
-                           DAG.getValueType(VT));
-    break;
-
-  case ISD::FPOW:
-  case ISD::FPOWI: {
-    // Promote f32 pow(i) to f64 pow(i).  Note that this could insert a libcall
-    // directly as well, which may be better.
-    Tmp1 = PromoteOp(Node->getOperand(0));
-    Tmp2 = Node->getOperand(1);
-    if (Node->getOpcode() == ISD::FPOW)
-      Tmp2 = PromoteOp(Tmp2);
-    assert(Tmp1.getValueType() == NVT);
-    Result = DAG.getNode(Node->getOpcode(), dl, NVT, Tmp1, Tmp2);
-    if (NoExcessFPPrecision)
-      Result = DAG.getNode(ISD::FP_ROUND_INREG, dl, NVT, Result,
-                           DAG.getValueType(VT));
-    break;
-  }
-
-  case ISD::ATOMIC_CMP_SWAP: {
-    AtomicSDNode* AtomNode = cast<AtomicSDNode>(Node);
-    Tmp2 = PromoteOp(Node->getOperand(2));
-    Tmp3 = PromoteOp(Node->getOperand(3));
-    Result = DAG.getAtomic(Node->getOpcode(), dl, AtomNode->getMemoryVT(),
-                           AtomNode->getChain(),
-                           AtomNode->getBasePtr(), Tmp2, Tmp3,
-                           AtomNode->getSrcValue(),
-                           AtomNode->getAlignment());
-    // Remember that we legalized the chain.
-    AddLegalizedOperand(Op.getValue(1), LegalizeOp(Result.getValue(1)));
-    break;
-  }
-  case ISD::ATOMIC_LOAD_ADD:
-  case ISD::ATOMIC_LOAD_SUB:
-  case ISD::ATOMIC_LOAD_AND:
-  case ISD::ATOMIC_LOAD_OR:
-  case ISD::ATOMIC_LOAD_XOR:
-  case ISD::ATOMIC_LOAD_NAND:
-  case ISD::ATOMIC_LOAD_MIN:
-  case ISD::ATOMIC_LOAD_MAX:
-  case ISD::ATOMIC_LOAD_UMIN:
-  case ISD::ATOMIC_LOAD_UMAX:
-  case ISD::ATOMIC_SWAP: {
-    AtomicSDNode* AtomNode = cast<AtomicSDNode>(Node);
-    Tmp2 = PromoteOp(Node->getOperand(2));
-    Result = DAG.getAtomic(Node->getOpcode(), dl, AtomNode->getMemoryVT(),
-                           AtomNode->getChain(),
-                           AtomNode->getBasePtr(), Tmp2,
-                           AtomNode->getSrcValue(),
-                           AtomNode->getAlignment());
-    // Remember that we legalized the chain.
-    AddLegalizedOperand(Op.getValue(1), LegalizeOp(Result.getValue(1)));
-    break;
-  }
-
-  case ISD::AND:
-  case ISD::OR:
-  case ISD::XOR:
-  case ISD::ADD:
-  case ISD::SUB:
-  case ISD::MUL:
-    // The input may have strange things in the top bits of the registers, but
-    // these operations don't care.  They may have weird bits going out, but
-    // that too is okay if they are integer operations.
-    Tmp1 = PromoteOp(Node->getOperand(0));
-    Tmp2 = PromoteOp(Node->getOperand(1));
-    assert(Tmp1.getValueType() == NVT && Tmp2.getValueType() == NVT);
-    Result = DAG.getNode(Node->getOpcode(), dl, NVT, Tmp1, Tmp2);
-    break;
-  case ISD::FADD:
-  case ISD::FSUB:
-  case ISD::FMUL:
-    Tmp1 = PromoteOp(Node->getOperand(0));
-    Tmp2 = PromoteOp(Node->getOperand(1));
-    assert(Tmp1.getValueType() == NVT && Tmp2.getValueType() == NVT);
-    Result = DAG.getNode(Node->getOpcode(), dl, NVT, Tmp1, Tmp2);
-
-    // Floating point operations will give excess precision that we may not be
-    // able to tolerate.  If we DO allow excess precision, just leave it,
-    // otherwise excise it.
-    // FIXME: Why would we need to round FP ops more than integer ones?
-    //     Is Round(Add(Add(A,B),C)) != Round(Add(Round(Add(A,B)), C))
-    if (NoExcessFPPrecision)
-      Result = DAG.getNode(ISD::FP_ROUND_INREG, dl, NVT, Result,
-                           DAG.getValueType(VT));
-    break;
-
-  case ISD::SDIV:
-  case ISD::SREM:
-    // These operators require that their input be sign extended.
-    Tmp1 = PromoteOp(Node->getOperand(0));
-    Tmp2 = PromoteOp(Node->getOperand(1));
-    if (NVT.isInteger()) {
-      Tmp1 = DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, NVT, Tmp1,
-                         DAG.getValueType(VT));
-      Tmp2 = DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, NVT, Tmp2,
-                         DAG.getValueType(VT));
-    }
-    Result = DAG.getNode(Node->getOpcode(), dl, NVT, Tmp1, Tmp2);
-
-    // Perform FP_ROUND: this is probably overly pessimistic.
-    if (NVT.isFloatingPoint() && NoExcessFPPrecision)
-      Result = DAG.getNode(ISD::FP_ROUND_INREG, dl, NVT, Result,
-                           DAG.getValueType(VT));
-    break;
-  case ISD::FDIV:
-  case ISD::FREM:
-  case ISD::FCOPYSIGN:
-    // These operators require that their input be fp extended.
-    switch (getTypeAction(Node->getOperand(0).getValueType())) {
-    case Expand: assert(0 && "not implemented");
-    case Legal:   Tmp1 = LegalizeOp(Node->getOperand(0)); break;
-    case Promote: Tmp1 = PromoteOp(Node->getOperand(0));  break;
-    }
-    switch (getTypeAction(Node->getOperand(1).getValueType())) {
-    case Expand: assert(0 && "not implemented");
-    case Legal:   Tmp2 = LegalizeOp(Node->getOperand(1)); break;
-    case Promote: Tmp2 = PromoteOp(Node->getOperand(1)); break;
-    }
-    Result = DAG.getNode(Node->getOpcode(), dl, NVT, Tmp1, Tmp2);
-
-    // Perform FP_ROUND: this is probably overly pessimistic.
-    if (NoExcessFPPrecision && Node->getOpcode() != ISD::FCOPYSIGN)
-      Result = DAG.getNode(ISD::FP_ROUND_INREG, dl, NVT, Result,
-                           DAG.getValueType(VT));
-    break;
-
-  case ISD::UDIV:
-  case ISD::UREM:
-    // These operators require that their input be zero extended.
-    Tmp1 = PromoteOp(Node->getOperand(0));
-    Tmp2 = PromoteOp(Node->getOperand(1));
-    assert(NVT.isInteger() && "Operators don't apply to FP!");
-    Tmp1 = DAG.getZeroExtendInReg(Tmp1, dl, VT);
-    Tmp2 = DAG.getZeroExtendInReg(Tmp2, dl, VT);
-    Result = DAG.getNode(Node->getOpcode(), dl, NVT, Tmp1, Tmp2);
-    break;
-
-  case ISD::SHL:
-    Tmp1 = PromoteOp(Node->getOperand(0));
-    Result = DAG.getNode(ISD::SHL, dl, NVT, Tmp1, Node->getOperand(1));
-    break;
-  case ISD::SRA:
-    // The input value must be properly sign extended.
-    Tmp1 = PromoteOp(Node->getOperand(0));
-    Tmp1 = DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, NVT, Tmp1,
-                       DAG.getValueType(VT));
-    Result = DAG.getNode(ISD::SRA, dl, NVT, Tmp1, Node->getOperand(1));
-    break;
-  case ISD::SRL:
-    // The input value must be properly zero extended.
-    Tmp1 = PromoteOp(Node->getOperand(0));
-    Tmp1 = DAG.getZeroExtendInReg(Tmp1, dl, VT);
-    Result = DAG.getNode(ISD::SRL, dl, NVT, Tmp1, Node->getOperand(1));
-    break;
-
-  case ISD::VAARG:
-    Tmp1 = Node->getOperand(0);   // Get the chain.
-    Tmp2 = Node->getOperand(1);   // Get the pointer.
-    if (TLI.getOperationAction(ISD::VAARG, VT) == TargetLowering::Custom) {
-      Tmp3 = DAG.getVAArg(VT, dl, Tmp1, Tmp2, Node->getOperand(2));
-      Result = TLI.LowerOperation(Tmp3, DAG);
-    } else {
-      const Value *V = cast<SrcValueSDNode>(Node->getOperand(2))->getValue();
-      SDValue VAList = DAG.getLoad(TLI.getPointerTy(), dl, Tmp1, Tmp2, V, 0);
-      // Increment the pointer, VAList, to the next vaarg
-      Tmp3 = DAG.getNode(ISD::ADD, dl, TLI.getPointerTy(), VAList,
-                         DAG.getConstant(VT.getSizeInBits()/8,
-                                         TLI.getPointerTy()));
-      // Store the incremented VAList to the legalized pointer
-      Tmp3 = DAG.getStore(VAList.getValue(1), dl, Tmp3, Tmp2, V, 0);
-      // Load the actual argument out of the pointer VAList
-      Result = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Tmp3, VAList, NULL, 0, VT);
-    }
-    // Remember that we legalized the chain.
-    AddLegalizedOperand(Op.getValue(1), LegalizeOp(Result.getValue(1)));
-    break;
-
-  case ISD::LOAD: {
-    LoadSDNode *LD = cast<LoadSDNode>(Node);
-    ISD::LoadExtType ExtType = ISD::isNON_EXTLoad(Node)
-      ? ISD::EXTLOAD : LD->getExtensionType();
-    Result = DAG.getExtLoad(ExtType, dl, NVT,
-                            LD->getChain(), LD->getBasePtr(),
-                            LD->getSrcValue(), LD->getSrcValueOffset(),
-                            LD->getMemoryVT(),
-                            LD->isVolatile(),
-                            LD->getAlignment());
-    // Remember that we legalized the chain.
-    AddLegalizedOperand(Op.getValue(1), LegalizeOp(Result.getValue(1)));
-    break;
-  }
-  case ISD::SELECT: {
-    Tmp2 = PromoteOp(Node->getOperand(1));   // Legalize the op0
-    Tmp3 = PromoteOp(Node->getOperand(2));   // Legalize the op1
-
-    MVT VT2 = Tmp2.getValueType();
-    assert(VT2 == Tmp3.getValueType()
-           && "PromoteOp SELECT: Operands 2 and 3 ValueTypes don't match");
-    // Ensure that the resulting node is at least the same size as the operands'
-    // value types, because we cannot assume that TLI.getSetCCValueType() is
-    // constant.
-    Result = DAG.getNode(ISD::SELECT, dl, VT2, Node->getOperand(0), Tmp2, Tmp3);
-    break;
-  }
-  case ISD::SELECT_CC:
-    Tmp2 = PromoteOp(Node->getOperand(2));   // True
-    Tmp3 = PromoteOp(Node->getOperand(3));   // False
-    Result = DAG.getNode(ISD::SELECT_CC, dl, NVT, Node->getOperand(0),
-                         Node->getOperand(1), Tmp2, Tmp3, Node->getOperand(4));
-    break;
-  case ISD::BSWAP:
-    Tmp1 = Node->getOperand(0);
-    Tmp1 = DAG.getNode(ISD::ZERO_EXTEND, dl, NVT, Tmp1);
-    Tmp1 = DAG.getNode(ISD::BSWAP, dl, NVT, Tmp1);
-    Result = DAG.getNode(ISD::SRL, dl, NVT, Tmp1,
-                         DAG.getConstant(NVT.getSizeInBits() -
-                                         VT.getSizeInBits(),
-                                         TLI.getShiftAmountTy()));
-    break;
-  case ISD::CTPOP:
-  case ISD::CTTZ:
-  case ISD::CTLZ:
-    // Zero extend the argument
-    Tmp1 = DAG.getNode(ISD::ZERO_EXTEND, dl, NVT, Node->getOperand(0));
-    // Perform the larger operation, then subtract if needed.
-    Tmp1 = DAG.getNode(Node->getOpcode(), dl, NVT, Tmp1);
-    switch(Node->getOpcode()) {
-    case ISD::CTPOP:
-      Result = Tmp1;
-      break;
-    case ISD::CTTZ:
-      // if Tmp1 == sizeinbits(NVT) then Tmp1 = sizeinbits(Old VT)
-      Tmp2 = DAG.getSetCC(dl, TLI.getSetCCResultType(Tmp1.getValueType()), Tmp1,
-                          DAG.getConstant(NVT.getSizeInBits(), NVT),
-                          ISD::SETEQ);
-      Result = DAG.getNode(ISD::SELECT, dl, NVT, Tmp2,
-                           DAG.getConstant(VT.getSizeInBits(), NVT), Tmp1);
-      break;
-    case ISD::CTLZ:
-      //Tmp1 = Tmp1 - (sizeinbits(NVT) - sizeinbits(Old VT))
-      Result = DAG.getNode(ISD::SUB, dl, NVT, Tmp1,
-                           DAG.getConstant(NVT.getSizeInBits() -
-                                           VT.getSizeInBits(), NVT));
-      break;
-    }
-    break;
-  case ISD::EXTRACT_SUBVECTOR:
-    Result = PromoteOp(ExpandEXTRACT_SUBVECTOR(Op));
-    break;
-  case ISD::EXTRACT_VECTOR_ELT:
-    Result = PromoteOp(ExpandEXTRACT_VECTOR_ELT(Op));
-    break;
-  }
-
-  assert(Result.getNode() && "Didn't set a result!");
-
-  // Make sure the result is itself legal.
-  Result = LegalizeOp(Result);
-
-  // Remember that we promoted this!
-  AddPromotedOperand(Op, Result);
-  return Result;
-}
-
 /// ExpandEXTRACT_VECTOR_ELT - Expand an EXTRACT_VECTOR_ELT operation into
 /// a legal EXTRACT_VECTOR_ELT operation, scalar code, or memory traffic,
 /// based on the vector type. The return type of this matches the element type
@@ -4654,37 +3844,6 @@
   return DAG.getLoad(Op.getValueType(), dl, Ch, StackPtr, NULL, 0);
 }
 
-/// ExpandEXTRACT_SUBVECTOR - Expand a EXTRACT_SUBVECTOR operation.  For now
-/// we assume the operation can be split if it is not already legal.
-SDValue SelectionDAGLegalize::ExpandEXTRACT_SUBVECTOR(SDValue Op) {
-  // We know that operand #0 is the Vec vector.  For now we assume the index
-  // is a constant and that the extracted result is a supported hardware type.
-  SDValue Vec = Op.getOperand(0);
-  SDValue Idx = LegalizeOp(Op.getOperand(1));
-
-  unsigned NumElems = Vec.getValueType().getVectorNumElements();
-
-  if (NumElems == Op.getValueType().getVectorNumElements()) {
-    // This must be an access of the desired vector length.  Return it.
-    return Vec;
-  }
-
-  ConstantSDNode *CIdx = cast<ConstantSDNode>(Idx);
-  SDValue Lo, Hi;
-  SplitVectorOp(Vec, Lo, Hi);
-  if (CIdx->getZExtValue() < NumElems/2) {
-    Vec = Lo;
-  } else {
-    Vec = Hi;
-    Idx = DAG.getConstant(CIdx->getZExtValue() - NumElems/2,
-                          Idx.getValueType());
-  }
-
-  // It's now an extract from the appropriate high or low part.  Recurse.
-  Op = DAG.UpdateNodeOperands(Op, Vec, Idx);
-  return ExpandEXTRACT_SUBVECTOR(Op);
-}
-
 /// LegalizeSetCCOperands - Attempts to create a legal LHS and RHS for a SETCC
 /// with condition CC on the current target.  This usually involves legalizing
 /// or promoting the arguments.  In the case where LHS and RHS must be expanded,
@@ -4695,259 +3854,8 @@
                                                  SDValue &RHS,
                                                  SDValue &CC,
                                                  DebugLoc dl) {
-  SDValue Tmp1, Tmp2, Tmp3, Result;
-
-  switch (getTypeAction(LHS.getValueType())) {
-  case Legal:
-    Tmp1 = LegalizeOp(LHS);   // LHS
-    Tmp2 = LegalizeOp(RHS);   // RHS
-    break;
-  case Promote:
-    Tmp1 = PromoteOp(LHS);   // LHS
-    Tmp2 = PromoteOp(RHS);   // RHS
-
-    // If this is an FP compare, the operands have already been extended.
-    if (LHS.getValueType().isInteger()) {
-      MVT VT = LHS.getValueType();
-      MVT NVT = TLI.getTypeToTransformTo(VT);
-
-      // Otherwise, we have to insert explicit sign or zero extends.  Note
-      // that we could insert sign extends for ALL conditions, but zero extend
-      // is cheaper on many machines (an AND instead of two shifts), so prefer
-      // it.
-      switch (cast<CondCodeSDNode>(CC)->get()) {
-      default: assert(0 && "Unknown integer comparison!");
-      case ISD::SETEQ:
-      case ISD::SETNE:
-      case ISD::SETUGE:
-      case ISD::SETUGT:
-      case ISD::SETULE:
-      case ISD::SETULT:
-        // ALL of these operations will work if we either sign or zero extend
-        // the operands (including the unsigned comparisons!).  Zero extend is
-        // usually a simpler/cheaper operation, so prefer it.
-        Tmp1 = DAG.getZeroExtendInReg(Tmp1, dl, VT);
-        Tmp2 = DAG.getZeroExtendInReg(Tmp2, dl, VT);
-        break;
-      case ISD::SETGE:
-      case ISD::SETGT:
-      case ISD::SETLT:
-      case ISD::SETLE:
-        Tmp1 = DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, NVT, Tmp1,
-                           DAG.getValueType(VT));
-        Tmp2 = DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, NVT, Tmp2,
-                           DAG.getValueType(VT));
-        Tmp1 = LegalizeOp(Tmp1); // Relegalize new nodes.
-        Tmp2 = LegalizeOp(Tmp2); // Relegalize new nodes.
-        break;
-      }
-    }
-    break;
-  case Expand: {
-    MVT VT = LHS.getValueType();
-    if (VT == MVT::f32 || VT == MVT::f64) {
-      // Expand into one or more soft-fp libcall(s).
-      RTLIB::Libcall LC1 = RTLIB::UNKNOWN_LIBCALL, LC2 = RTLIB::UNKNOWN_LIBCALL;
-      switch (cast<CondCodeSDNode>(CC)->get()) {
-      case ISD::SETEQ:
-      case ISD::SETOEQ:
-        LC1 = (VT == MVT::f32) ? RTLIB::OEQ_F32 : RTLIB::OEQ_F64;
-        break;
-      case ISD::SETNE:
-      case ISD::SETUNE:
-        LC1 = (VT == MVT::f32) ? RTLIB::UNE_F32 : RTLIB::UNE_F64;
-        break;
-      case ISD::SETGE:
-      case ISD::SETOGE:
-        LC1 = (VT == MVT::f32) ? RTLIB::OGE_F32 : RTLIB::OGE_F64;
-        break;
-      case ISD::SETLT:
-      case ISD::SETOLT:
-        LC1 = (VT == MVT::f32) ? RTLIB::OLT_F32 : RTLIB::OLT_F64;
-        break;
-      case ISD::SETLE:
-      case ISD::SETOLE:
-        LC1 = (VT == MVT::f32) ? RTLIB::OLE_F32 : RTLIB::OLE_F64;
-        break;
-      case ISD::SETGT:
-      case ISD::SETOGT:
-        LC1 = (VT == MVT::f32) ? RTLIB::OGT_F32 : RTLIB::OGT_F64;
-        break;
-      case ISD::SETUO:
-        LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 : RTLIB::UO_F64;
-        break;
-      case ISD::SETO:
-        LC1 = (VT == MVT::f32) ? RTLIB::O_F32 : RTLIB::O_F64;
-        break;
-      default:
-        LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 : RTLIB::UO_F64;
-        switch (cast<CondCodeSDNode>(CC)->get()) {
-        case ISD::SETONE:
-          // SETONE = SETOLT | SETOGT
-          LC1 = (VT == MVT::f32) ? RTLIB::OLT_F32 : RTLIB::OLT_F64;
-          // Fallthrough
-        case ISD::SETUGT:
-          LC2 = (VT == MVT::f32) ? RTLIB::OGT_F32 : RTLIB::OGT_F64;
-          break;
-        case ISD::SETUGE:
-          LC2 = (VT == MVT::f32) ? RTLIB::OGE_F32 : RTLIB::OGE_F64;
-          break;
-        case ISD::SETULT:
-          LC2 = (VT == MVT::f32) ? RTLIB::OLT_F32 : RTLIB::OLT_F64;
-          break;
-        case ISD::SETULE:
-          LC2 = (VT == MVT::f32) ? RTLIB::OLE_F32 : RTLIB::OLE_F64;
-          break;
-        case ISD::SETUEQ:
-          LC2 = (VT == MVT::f32) ? RTLIB::OEQ_F32 : RTLIB::OEQ_F64;
-          break;
-        default: assert(0 && "Unsupported FP setcc!");
-        }
-      }
-
-      SDValue Dummy;
-      SDValue Ops[2] = { LHS, RHS };
-      Tmp1 = ExpandLibCall(LC1, DAG.getMergeValues(Ops, 2, dl).getNode(),
-                           false /*sign irrelevant*/, Dummy);
-      Tmp2 = DAG.getConstant(0, MVT::i32);
-      CC = DAG.getCondCode(TLI.getCmpLibcallCC(LC1));
-      if (LC2 != RTLIB::UNKNOWN_LIBCALL) {
-        Tmp1 = DAG.getNode(ISD::SETCC, dl,
-                           TLI.getSetCCResultType(Tmp1.getValueType()),
-                           Tmp1, Tmp2, CC);
-        LHS = ExpandLibCall(LC2, DAG.getMergeValues(Ops, 2, dl).getNode(),
-                            false /*sign irrelevant*/, Dummy);
-        Tmp2 = DAG.getNode(ISD::SETCC, dl,
-                           TLI.getSetCCResultType(LHS.getValueType()), LHS,
-                           Tmp2, DAG.getCondCode(TLI.getCmpLibcallCC(LC2)));
-        Tmp1 = DAG.getNode(ISD::OR, dl, Tmp1.getValueType(), Tmp1, Tmp2);
-        Tmp2 = SDValue();
-      }
-      LHS = LegalizeOp(Tmp1);
-      RHS = Tmp2;
-      return;
-    }
-
-    SDValue LHSLo, LHSHi, RHSLo, RHSHi;
-    ExpandOp(LHS, LHSLo, LHSHi);
-    ExpandOp(RHS, RHSLo, RHSHi);
-    ISD::CondCode CCCode = cast<CondCodeSDNode>(CC)->get();
-
-    if (VT==MVT::ppcf128) {
-      // FIXME:  This generated code sucks.  We want to generate
-      //         FCMPU crN, hi1, hi2
-      //         BNE crN, L:
-      //         FCMPU crN, lo1, lo2
-      // The following can be improved, but not that much.
-      Tmp1 = DAG.getSetCC(dl, TLI.getSetCCResultType(LHSHi.getValueType()),
-                          LHSHi, RHSHi, ISD::SETOEQ);
-      Tmp2 = DAG.getSetCC(dl, TLI.getSetCCResultType(LHSLo.getValueType()),
-                          LHSLo, RHSLo, CCCode);
-      Tmp3 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2);
-      Tmp1 = DAG.getSetCC(dl, TLI.getSetCCResultType(LHSHi.getValueType()),
-                          LHSHi, RHSHi, ISD::SETUNE);
-      Tmp2 = DAG.getSetCC(dl, TLI.getSetCCResultType(LHSHi.getValueType()),
-                          LHSHi, RHSHi, CCCode);
-      Tmp1 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2);
-      Tmp1 = DAG.getNode(ISD::OR, dl, Tmp1.getValueType(), Tmp1, Tmp3);
-      Tmp2 = SDValue();
-      break;
-    }
-
-    switch (CCCode) {
-    case ISD::SETEQ:
-    case ISD::SETNE:
-      if (RHSLo == RHSHi)
-        if (ConstantSDNode *RHSCST = dyn_cast<ConstantSDNode>(RHSLo))
-          if (RHSCST->isAllOnesValue()) {
-            // Comparison to -1.
-            Tmp1 = DAG.getNode(ISD::AND, dl,LHSLo.getValueType(), LHSLo, LHSHi);
-            Tmp2 = RHSLo;
-            break;
-          }
-
-      Tmp1 = DAG.getNode(ISD::XOR, dl, LHSLo.getValueType(), LHSLo, RHSLo);
-      Tmp2 = DAG.getNode(ISD::XOR, dl, LHSLo.getValueType(), LHSHi, RHSHi);
-      Tmp1 = DAG.getNode(ISD::OR, dl, Tmp1.getValueType(), Tmp1, Tmp2);
-      Tmp2 = DAG.getConstant(0, Tmp1.getValueType());
-      break;
-    default:
-      // If this is a comparison of the sign bit, just look at the top part.
-      // X > -1,  x < 0
-      if (ConstantSDNode *CST = dyn_cast<ConstantSDNode>(RHS))
-        if ((cast<CondCodeSDNode>(CC)->get() == ISD::SETLT &&
-             CST->isNullValue()) ||               // X < 0
-            (cast<CondCodeSDNode>(CC)->get() == ISD::SETGT &&
-             CST->isAllOnesValue())) {            // X > -1
-          Tmp1 = LHSHi;
-          Tmp2 = RHSHi;
-          break;
-        }
-
-      // FIXME: This generated code sucks.
-      ISD::CondCode LowCC;
-      switch (CCCode) {
-      default: assert(0 && "Unknown integer setcc!");
-      case ISD::SETLT:
-      case ISD::SETULT: LowCC = ISD::SETULT; break;
-      case ISD::SETGT:
-      case ISD::SETUGT: LowCC = ISD::SETUGT; break;
-      case ISD::SETLE:
-      case ISD::SETULE: LowCC = ISD::SETULE; break;
-      case ISD::SETGE:
-      case ISD::SETUGE: LowCC = ISD::SETUGE; break;
-      }
-
-      // Tmp1 = lo(op1) < lo(op2)   // Always unsigned comparison
-      // Tmp2 = hi(op1) < hi(op2)   // Signedness depends on operands
-      // dest = hi(op1) == hi(op2) ? Tmp1 : Tmp2;
-
-      // NOTE: on targets without efficient SELECT of bools, we can always use
-      // this identity: (B1 ? B2 : B3) --> (B1 & B2)|(!B1&B3)
-      TargetLowering::DAGCombinerInfo DagCombineInfo(DAG, false, true, NULL);
-      Tmp1 = TLI.SimplifySetCC(TLI.getSetCCResultType(LHSLo.getValueType()),
-                               LHSLo, RHSLo, LowCC, false, DagCombineInfo, dl);
-      if (!Tmp1.getNode())
-        Tmp1 = DAG.getSetCC(dl, TLI.getSetCCResultType(LHSLo.getValueType()),
-                            LHSLo, RHSLo, LowCC);
-      Tmp2 = TLI.SimplifySetCC(TLI.getSetCCResultType(LHSHi.getValueType()),
-                               LHSHi, RHSHi, CCCode, false, DagCombineInfo, dl);
-      if (!Tmp2.getNode())
-        Tmp2 = DAG.getNode(ISD::SETCC, dl,
-                           TLI.getSetCCResultType(LHSHi.getValueType()),
-                           LHSHi, RHSHi, CC);
-
-      ConstantSDNode *Tmp1C = dyn_cast<ConstantSDNode>(Tmp1.getNode());
-      ConstantSDNode *Tmp2C = dyn_cast<ConstantSDNode>(Tmp2.getNode());
-      if ((Tmp1C && Tmp1C->isNullValue()) ||
-          (Tmp2C && Tmp2C->isNullValue() &&
-           (CCCode == ISD::SETLE || CCCode == ISD::SETGE ||
-            CCCode == ISD::SETUGE || CCCode == ISD::SETULE)) ||
-          (Tmp2C && Tmp2C->getAPIntValue() == 1 &&
-           (CCCode == ISD::SETLT || CCCode == ISD::SETGT ||
-            CCCode == ISD::SETUGT || CCCode == ISD::SETULT))) {
-        // low part is known false, returns high part.
-        // For LE / GE, if high part is known false, ignore the low part.
-        // For LT / GT, if high part is known true, ignore the low part.
-        Tmp1 = Tmp2;
-        Tmp2 = SDValue();
-      } else {
-        Result = TLI.SimplifySetCC(TLI.getSetCCResultType(LHSHi.getValueType()),
-                                   LHSHi, RHSHi, ISD::SETEQ, false,
-                                   DagCombineInfo, dl);
-        if (!Result.getNode())
-          Result=DAG.getSetCC(dl, TLI.getSetCCResultType(LHSHi.getValueType()),
-                              LHSHi, RHSHi, ISD::SETEQ);
-        Result = LegalizeOp(DAG.getNode(ISD::SELECT, dl, Tmp1.getValueType(),
-                                        Result, Tmp1, Tmp2));
-        Tmp1 = Result;
-        Tmp2 = SDValue();
-      }
-    }
-  }
-  }
-  LHS = Tmp1;
-  RHS = Tmp2;
+  LHS = LegalizeOp(LHS);
+  RHS = LegalizeOp(RHS);
 }
 
 /// LegalizeSetCCCondCode - Legalize a SETCC with given LHS and RHS and
@@ -5222,177 +4130,6 @@
   return DAG.getLoad(VT, dl, StoreChain, FIPtr, SV, 0);
 }
 
-void SelectionDAGLegalize::ExpandShiftParts(unsigned NodeOp,
-                                            SDValue Op, SDValue Amt,
-                                            SDValue &Lo, SDValue &Hi,
-                                            DebugLoc dl) {
-  // Expand the subcomponents.
-  SDValue LHSL, LHSH;
-  ExpandOp(Op, LHSL, LHSH);
-
-  SDValue Ops[] = { LHSL, LHSH, Amt };
-  MVT VT = LHSL.getValueType();
-  Lo = DAG.getNode(NodeOp, dl, DAG.getVTList(VT, VT), Ops, 3);
-  Hi = Lo.getValue(1);
-}
-
-
-/// ExpandShift - Try to find a clever way to expand this shift operation out to
-/// smaller elements.  If we can't find a way that is more efficient than a
-/// libcall on this target, return false.  Otherwise, return true with the
-/// low-parts expanded into Lo and Hi.
-bool SelectionDAGLegalize::ExpandShift(unsigned Opc, SDValue Op, SDValue Amt,
-                                       SDValue &Lo, SDValue &Hi,
-                                       DebugLoc dl) {
-  assert((Opc == ISD::SHL || Opc == ISD::SRA || Opc == ISD::SRL) &&
-         "This is not a shift!");
-
-  MVT NVT = TLI.getTypeToTransformTo(Op.getValueType());
-  SDValue ShAmt = LegalizeOp(Amt);
-  MVT ShTy = ShAmt.getValueType();
-  unsigned ShBits = ShTy.getSizeInBits();
-  unsigned VTBits = Op.getValueType().getSizeInBits();
-  unsigned NVTBits = NVT.getSizeInBits();
-
-  // Handle the case when Amt is an immediate.
-  if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Amt.getNode())) {
-    unsigned Cst = CN->getZExtValue();
-    // Expand the incoming operand to be shifted, so that we have its parts
-    SDValue InL, InH;
-    ExpandOp(Op, InL, InH);
-    switch(Opc) {
-    case ISD::SHL:
-      if (Cst > VTBits) {
-        Lo = DAG.getConstant(0, NVT);
-        Hi = DAG.getConstant(0, NVT);
-      } else if (Cst > NVTBits) {
-        Lo = DAG.getConstant(0, NVT);
-        Hi = DAG.getNode(ISD::SHL, dl,
-                         NVT, InL, DAG.getConstant(Cst-NVTBits, ShTy));
-      } else if (Cst == NVTBits) {
-        Lo = DAG.getConstant(0, NVT);
-        Hi = InL;
-      } else {
-        Lo = DAG.getNode(ISD::SHL, dl, NVT, InL, DAG.getConstant(Cst, ShTy));
-        Hi = DAG.getNode(ISD::OR, dl, NVT,
-           DAG.getNode(ISD::SHL, dl, NVT, InH, DAG.getConstant(Cst, ShTy)),
-           DAG.getNode(ISD::SRL, dl, NVT, InL,
-                       DAG.getConstant(NVTBits-Cst, ShTy)));
-      }
-      return true;
-    case ISD::SRL:
-      if (Cst > VTBits) {
-        Lo = DAG.getConstant(0, NVT);
-        Hi = DAG.getConstant(0, NVT);
-      } else if (Cst > NVTBits) {
-        Lo = DAG.getNode(ISD::SRL, dl, NVT,
-                         InH, DAG.getConstant(Cst-NVTBits, ShTy));
-        Hi = DAG.getConstant(0, NVT);
-      } else if (Cst == NVTBits) {
-        Lo = InH;
-        Hi = DAG.getConstant(0, NVT);
-      } else {
-        Lo = DAG.getNode(ISD::OR, dl, NVT,
-           DAG.getNode(ISD::SRL, dl, NVT, InL, DAG.getConstant(Cst, ShTy)),
-           DAG.getNode(ISD::SHL, dl, NVT, InH,
-                       DAG.getConstant(NVTBits-Cst, ShTy)));
-        Hi = DAG.getNode(ISD::SRL, dl, NVT, InH, DAG.getConstant(Cst, ShTy));
-      }
-      return true;
-    case ISD::SRA:
-      if (Cst > VTBits) {
-        Hi = Lo = DAG.getNode(ISD::SRA, dl, NVT, InH,
-                              DAG.getConstant(NVTBits-1, ShTy));
-      } else if (Cst > NVTBits) {
-        Lo = DAG.getNode(ISD::SRA, dl, NVT, InH,
-                           DAG.getConstant(Cst-NVTBits, ShTy));
-        Hi = DAG.getNode(ISD::SRA, dl, NVT, InH,
-                              DAG.getConstant(NVTBits-1, ShTy));
-      } else if (Cst == NVTBits) {
-        Lo = InH;
-        Hi = DAG.getNode(ISD::SRA, dl, NVT, InH,
-                              DAG.getConstant(NVTBits-1, ShTy));
-      } else {
-        Lo = DAG.getNode(ISD::OR, dl, NVT,
-           DAG.getNode(ISD::SRL, dl, NVT, InL, DAG.getConstant(Cst, ShTy)),
-           DAG.getNode(ISD::SHL, dl,
-                       NVT, InH, DAG.getConstant(NVTBits-Cst, ShTy)));
-        Hi = DAG.getNode(ISD::SRA, dl, NVT, InH, DAG.getConstant(Cst, ShTy));
-      }
-      return true;
-    }
-  }
-
-  // Okay, the shift amount isn't constant.  However, if we can tell that it is
-  // >= 32 or < 32, we can still simplify it, without knowing the actual value.
-  APInt Mask = APInt::getHighBitsSet(ShBits, ShBits - Log2_32(NVTBits));
-  APInt KnownZero, KnownOne;
-  DAG.ComputeMaskedBits(Amt, Mask, KnownZero, KnownOne);
-
-  // If we know that if any of the high bits of the shift amount are one, then
-  // we can do this as a couple of simple shifts.
-  if (KnownOne.intersects(Mask)) {
-    // Mask out the high bit, which we know is set.
-    Amt = DAG.getNode(ISD::AND, dl, Amt.getValueType(), Amt,
-                      DAG.getConstant(~Mask, Amt.getValueType()));
-
-    // Expand the incoming operand to be shifted, so that we have its parts
-    SDValue InL, InH;
-    ExpandOp(Op, InL, InH);
-    switch(Opc) {
-    case ISD::SHL:
-      Lo = DAG.getConstant(0, NVT);              // Low part is zero.
-      Hi = DAG.getNode(ISD::SHL, dl, NVT, InL, Amt); // High part from Lo part.
-      return true;
-    case ISD::SRL:
-      Hi = DAG.getConstant(0, NVT);              // Hi part is zero.
-      Lo = DAG.getNode(ISD::SRL, dl, NVT, InH, Amt); // Lo part from Hi part.
-      return true;
-    case ISD::SRA:
-      Hi = DAG.getNode(ISD::SRA, dl, NVT, InH,       // Sign extend high part.
-                       DAG.getConstant(NVTBits-1, Amt.getValueType()));
-      Lo = DAG.getNode(ISD::SRA, dl, NVT, InH, Amt); // Lo part from Hi part.
-      return true;
-    }
-  }
-
-  // If we know that the high bits of the shift amount are all zero, then we can
-  // do this as a couple of simple shifts.
-  if ((KnownZero & Mask) == Mask) {
-    // Compute 32-amt.
-    SDValue Amt2 = DAG.getNode(ISD::SUB, dl, Amt.getValueType(),
-                                 DAG.getConstant(NVTBits, Amt.getValueType()),
-                                 Amt);
-
-    // Expand the incoming operand to be shifted, so that we have its parts
-    SDValue InL, InH;
-    ExpandOp(Op, InL, InH);
-    switch(Opc) {
-    case ISD::SHL:
-      Lo = DAG.getNode(ISD::SHL, dl, NVT, InL, Amt);
-      Hi = DAG.getNode(ISD::OR, dl, NVT,
-                       DAG.getNode(ISD::SHL, dl, NVT, InH, Amt),
-                       DAG.getNode(ISD::SRL, dl, NVT, InL, Amt2));
-      return true;
-    case ISD::SRL:
-      Hi = DAG.getNode(ISD::SRL, dl, NVT, InH, Amt);
-      Lo = DAG.getNode(ISD::OR, dl, NVT,
-                       DAG.getNode(ISD::SRL, dl, NVT, InL, Amt),
-                       DAG.getNode(ISD::SHL, dl, NVT, InH, Amt2));
-      return true;
-    case ISD::SRA:
-      Hi = DAG.getNode(ISD::SRA, dl, NVT, InH, Amt);
-      Lo = DAG.getNode(ISD::OR, dl, NVT,
-                       DAG.getNode(ISD::SRL, dl, NVT, InL, Amt),
-                       DAG.getNode(ISD::SHL, dl, NVT, InH, Amt2));
-      return true;
-    }
-  }
-
-  return false;
-}
-
-
 // ExpandLibCall - Expand a node into a call to a libcall.  If the result value
 // does not fit into a register, return the lo part and set the hi part to the
 // by-reg argument.  If it does fit into a single register, return the result
@@ -5429,17 +4166,7 @@
   // the LastCALLSEQ_END to the legalized version of the CALLSEQ_END node that
   // was added by LowerCallTo (guaranteeing proper serialization of calls).
   LegalizeOp(CallInfo.second);
-  SDValue Result;
-  switch (getTypeAction(CallInfo.first.getValueType())) {
-  default: assert(0 && "Unknown thing");
-  case Legal:
-    Result = CallInfo.first;
-    break;
-  case Expand:
-    ExpandOp(CallInfo.first, Result, Hi);
-    break;
-  }
-  return Result;
+  return CallInfo.first;
 }
 
 /// LegalizeINT_TO_FP - Legalize a [US]INT_TO_FP operation.
@@ -5449,197 +4176,31 @@
                   DebugLoc dl) {
   bool isCustom = false;
   SDValue Tmp1;
-  switch (getTypeAction(Op.getValueType())) {
-  case Legal:
-    switch (TLI.getOperationAction(isSigned ? ISD::SINT_TO_FP : ISD::UINT_TO_FP,
-                                   Op.getValueType())) {
-    default: assert(0 && "Unknown operation action!");
-    case TargetLowering::Custom:
-      isCustom = true;
-      // FALLTHROUGH
-    case TargetLowering::Legal:
-      Tmp1 = LegalizeOp(Op);
-      if (Result.getNode())
-        Result = DAG.UpdateNodeOperands(Result, Tmp1);
-      else
-        Result = DAG.getNode(isSigned ? ISD::SINT_TO_FP : ISD::UINT_TO_FP, dl,
-                             DestTy, Tmp1);
-      if (isCustom) {
-        Tmp1 = TLI.LowerOperation(Result, DAG);
-        if (Tmp1.getNode()) Result = Tmp1;
-      }
-      break;
-    case TargetLowering::Expand:
-      Result = ExpandLegalINT_TO_FP(isSigned, LegalizeOp(Op), DestTy, dl);
-      break;
-    case TargetLowering::Promote:
-      Result = PromoteLegalINT_TO_FP(LegalizeOp(Op), DestTy, isSigned, dl);
-      break;
-    }
-    break;
-  case Expand:
-    Result = ExpandIntToFP(isSigned, DestTy, Op, dl) ;
-    break;
-  case Promote:
-    Tmp1 = PromoteOp(Op);
-    if (isSigned) {
-      Tmp1 = DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, Tmp1.getValueType(),
-                         Tmp1, DAG.getValueType(Op.getValueType()));
-    } else {
-      Tmp1 = DAG.getZeroExtendInReg(Tmp1, dl, Op.getValueType());
-    }
+  switch (TLI.getOperationAction(isSigned ? ISD::SINT_TO_FP : ISD::UINT_TO_FP,
+                                 Op.getValueType())) {
+  default: assert(0 && "Unknown operation action!");
+  case TargetLowering::Custom:
+    isCustom = true;
+    // FALLTHROUGH
+  case TargetLowering::Legal:
+    Tmp1 = LegalizeOp(Op);
     if (Result.getNode())
       Result = DAG.UpdateNodeOperands(Result, Tmp1);
     else
       Result = DAG.getNode(isSigned ? ISD::SINT_TO_FP : ISD::UINT_TO_FP, dl,
                            DestTy, Tmp1);
-    Result = LegalizeOp(Result);  // The 'op' is not necessarily legal!
-    break;
-  }
-  return Result;
-}
-
-/// ExpandIntToFP - Expand a [US]INT_TO_FP operation.
-///
-SDValue SelectionDAGLegalize::
-ExpandIntToFP(bool isSigned, MVT DestTy, SDValue Source, DebugLoc dl) {
-  MVT SourceVT = Source.getValueType();
-  bool ExpandSource = getTypeAction(SourceVT) == Expand;
-
-  // Expand unsupported int-to-fp vector casts by unrolling them.
-  if (DestTy.isVector()) {
-    if (!ExpandSource)
-      return LegalizeOp(UnrollVectorOp(Source));
-    MVT DestEltTy = DestTy.getVectorElementType();
-    if (DestTy.getVectorNumElements() == 1) {
-      SDValue Scalar = ScalarizeVectorOp(Source);
-      SDValue Result = LegalizeINT_TO_FP(SDValue(), isSigned,
-                                         DestEltTy, Scalar, dl);
-      return DAG.getNode(ISD::BUILD_VECTOR, dl, DestTy, Result);
-    }
-    SDValue Lo, Hi;
-    SplitVectorOp(Source, Lo, Hi);
-    MVT SplitDestTy = MVT::getVectorVT(DestEltTy,
-                                       DestTy.getVectorNumElements() / 2);
-    SDValue LoResult = LegalizeINT_TO_FP(SDValue(), isSigned, SplitDestTy,
-                                         Lo, dl);
-    SDValue HiResult = LegalizeINT_TO_FP(SDValue(), isSigned, SplitDestTy,
-                                         Hi, dl);
-    return LegalizeOp(DAG.getNode(ISD::CONCAT_VECTORS, dl, DestTy, LoResult,
-                                  HiResult));
-  }
-
-  // Special case for i32 source to take advantage of UINTTOFP_I32_F32, etc.
-  if (!isSigned && SourceVT != MVT::i32) {
-    // The integer value loaded will be incorrectly if the 'sign bit' of the
-    // incoming integer is set.  To handle this, we dynamically test to see if
-    // it is set, and, if so, add a fudge factor.
-    SDValue Hi;
-    if (ExpandSource) {
-      SDValue Lo;
-      ExpandOp(Source, Lo, Hi);
-      Source = DAG.getNode(ISD::BUILD_PAIR, dl, SourceVT, Lo, Hi);
-    } else {
-      // The comparison for the sign bit will use the entire operand.
-      Hi = Source;
-    }
-
-    // Check to see if the target has a custom way to lower this.  If so, use
-    // it.  (Note we've already expanded the operand in this case.)
-    switch (TLI.getOperationAction(ISD::UINT_TO_FP, SourceVT)) {
-    default: assert(0 && "This action not implemented for this operation!");
-    case TargetLowering::Legal:
-    case TargetLowering::Expand:
-      break;   // This case is handled below.
-    case TargetLowering::Custom: {
-      SDValue NV = TLI.LowerOperation(DAG.getNode(ISD::UINT_TO_FP, dl, DestTy,
-                                                  Source), DAG);
-      if (NV.getNode())
-        return LegalizeOp(NV);
-      break;   // The target decided this was legal after all
-    }
-    }
-
-    // If this is unsigned, and not supported, first perform the conversion to
-    // signed, then adjust the result if the sign bit is set.
-    SDValue SignedConv = ExpandIntToFP(true, DestTy, Source, dl);
-
-    SDValue SignSet = DAG.getSetCC(dl,
-                                   TLI.getSetCCResultType(Hi.getValueType()),
-                                   Hi, DAG.getConstant(0, Hi.getValueType()),
-                                   ISD::SETLT);
-    SDValue Zero = DAG.getIntPtrConstant(0), Four = DAG.getIntPtrConstant(4);
-    SDValue CstOffset = DAG.getNode(ISD::SELECT, dl, Zero.getValueType(),
-                                      SignSet, Four, Zero);
-    uint64_t FF = 0x5f800000ULL;
-    if (TLI.isLittleEndian()) FF <<= 32;
-    Constant *FudgeFactor = ConstantInt::get(Type::Int64Ty, FF);
-
-    SDValue CPIdx = DAG.getConstantPool(FudgeFactor, TLI.getPointerTy());
-    unsigned Alignment = cast<ConstantPoolSDNode>(CPIdx)->getAlignment();
-    CPIdx = DAG.getNode(ISD::ADD, dl, TLI.getPointerTy(), CPIdx, CstOffset);
-    Alignment = std::min(Alignment, 4u);
-    SDValue FudgeInReg;
-    if (DestTy == MVT::f32)
-      FudgeInReg = DAG.getLoad(MVT::f32, dl, DAG.getEntryNode(), CPIdx,
-                               PseudoSourceValue::getConstantPool(), 0,
-                               false, Alignment);
-    else if (DestTy.bitsGT(MVT::f32))
-      // FIXME: Avoid the extend by construction the right constantpool?
-      FudgeInReg = DAG.getExtLoad(ISD::EXTLOAD, dl, DestTy, DAG.getEntryNode(),
-                                  CPIdx,
-                                  PseudoSourceValue::getConstantPool(), 0,
-                                  MVT::f32, false, Alignment);
-    else
-      assert(0 && "Unexpected conversion");
-
-    MVT SCVT = SignedConv.getValueType();
-    if (SCVT != DestTy) {
-      // Destination type needs to be expanded as well. The FADD now we are
-      // constructing will be expanded into a libcall.
-      if (SCVT.getSizeInBits() != DestTy.getSizeInBits()) {
-        assert(SCVT.getSizeInBits() * 2 == DestTy.getSizeInBits());
-        SignedConv = DAG.getNode(ISD::BUILD_PAIR, dl, DestTy,
-                                 SignedConv, SignedConv.getValue(1));
-      }
-      SignedConv = DAG.getNode(ISD::BIT_CONVERT, dl, DestTy, SignedConv);
+    if (isCustom) {
+      Tmp1 = TLI.LowerOperation(Result, DAG);
+      if (Tmp1.getNode()) Result = Tmp1;
     }
-    return DAG.getNode(ISD::FADD, dl, DestTy, SignedConv, FudgeInReg);
-  }
-
-  // Check to see if the target has a custom way to lower this.  If so, use it.
-  switch (TLI.getOperationAction(ISD::SINT_TO_FP, SourceVT)) {
-  default: assert(0 && "This action not implemented for this operation!");
-  case TargetLowering::Legal:
+    break;
   case TargetLowering::Expand:
-    break;   // This case is handled below.
-  case TargetLowering::Custom: {
-    SDValue NV = TLI.LowerOperation(DAG.getNode(ISD::SINT_TO_FP, dl, DestTy,
-                                                Source), DAG);
-    if (NV.getNode())
-      return LegalizeOp(NV);
-    break;   // The target decided this was legal after all
-  }
+    Result = ExpandLegalINT_TO_FP(isSigned, LegalizeOp(Op), DestTy, dl);
+    break;
+  case TargetLowering::Promote:
+    Result = PromoteLegalINT_TO_FP(LegalizeOp(Op), DestTy, isSigned, dl);
+    break;
   }
-
-  // Expand the source, then glue it back together for the call.  We must expand
-  // the source in case it is shared (this pass of legalize must traverse it).
-  if (ExpandSource) {
-    SDValue SrcLo, SrcHi;
-    ExpandOp(Source, SrcLo, SrcHi);
-    Source = DAG.getNode(ISD::BUILD_PAIR, dl, SourceVT, SrcLo, SrcHi);
-  }
-
-  RTLIB::Libcall LC = isSigned ?
-    RTLIB::getSINTTOFP(SourceVT, DestTy) :
-    RTLIB::getUINTTOFP(SourceVT, DestTy);
-  assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unknown int value type");
-
-  Source = DAG.getNode(ISD::SINT_TO_FP, dl, DestTy, Source);
-  SDValue HiPart;
-  SDValue Result = ExpandLibCall(LC, Source.getNode(), isSigned, HiPart);
-  if (Result.getValueType() != DestTy && HiPart.getNode())
-    Result = DAG.getNode(ISD::BUILD_PAIR, dl, DestTy, Result, HiPart);
   return Result;
 }
 
@@ -5990,2205 +4551,6 @@
   }
 }
 
-/// ExpandOp - Expand the specified SDValue into its two component pieces
-/// Lo&Hi.  Note that the Op MUST be an expanded type.  As a result of this, the
-/// LegalizedNodes map is filled in for any results that are not expanded, the
-/// ExpandedNodes map is filled in for any results that are expanded, and the
-/// Lo/Hi values are returned.
-void SelectionDAGLegalize::ExpandOp(SDValue Op, SDValue &Lo, SDValue &Hi){
-  assert(0 && "This should be dead!");
-  MVT VT = Op.getValueType();
-  MVT NVT = TLI.getTypeToTransformTo(VT);
-  SDNode *Node = Op.getNode();
-  DebugLoc dl = Node->getDebugLoc();
-  assert(getTypeAction(VT) == Expand && "Not an expanded type!");
-  assert(((NVT.isInteger() && NVT.bitsLT(VT)) || VT.isFloatingPoint() ||
-         VT.isVector()) && "Cannot expand to FP value or to larger int value!");
-
-  // See if we already expanded it.
-  DenseMap<SDValue, std::pair<SDValue, SDValue> >::iterator I
-    = ExpandedNodes.find(Op);
-  if (I != ExpandedNodes.end()) {
-    Lo = I->second.first;
-    Hi = I->second.second;
-    return;
-  }
-
-  switch (Node->getOpcode()) {
-  case ISD::CopyFromReg:
-    assert(0 && "CopyFromReg must be legal!");
-  case ISD::FP_ROUND_INREG:
-    if (VT == MVT::ppcf128 &&
-        TLI.getOperationAction(ISD::FP_ROUND_INREG, VT) ==
-            TargetLowering::Custom) {
-      SDValue SrcLo, SrcHi, Src;
-      ExpandOp(Op.getOperand(0), SrcLo, SrcHi);
-      Src = DAG.getNode(ISD::BUILD_PAIR, dl, VT, SrcLo, SrcHi);
-      SDValue Result =
-        TLI.LowerOperation(DAG.getNode(ISD::FP_ROUND_INREG, dl, VT, Src,
-                                       Op.getOperand(1)), DAG);
-      assert(Result.getNode()->getOpcode() == ISD::BUILD_PAIR);
-      Lo = Result.getNode()->getOperand(0);
-      Hi = Result.getNode()->getOperand(1);
-      break;
-    }
-    // fall through
-  default:
-#ifndef NDEBUG
-    cerr << "NODE: "; Node->dump(&DAG); cerr << "\n";
-#endif
-    assert(0 && "Do not know how to expand this operator!");
-    abort();
-  case ISD::EXTRACT_ELEMENT:
-    ExpandOp(Node->getOperand(0), Lo, Hi);
-    if (cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue())
-      return ExpandOp(Hi, Lo, Hi);
-    return ExpandOp(Lo, Lo, Hi);
-  case ISD::EXTRACT_VECTOR_ELT:
-    // ExpandEXTRACT_VECTOR_ELT tolerates invalid result types.
-    Lo  = ExpandEXTRACT_VECTOR_ELT(Op);
-    return ExpandOp(Lo, Lo, Hi);
-  case ISD::UNDEF:
-    Lo = DAG.getUNDEF(NVT);
-    Hi = DAG.getUNDEF(NVT);
-    break;
-  case ISD::Constant: {
-    unsigned NVTBits = NVT.getSizeInBits();
-    const APInt &Cst = cast<ConstantSDNode>(Node)->getAPIntValue();
-    Lo = DAG.getConstant(APInt(Cst).trunc(NVTBits), NVT);
-    Hi = DAG.getConstant(Cst.lshr(NVTBits).trunc(NVTBits), NVT);
-    break;
-  }
-  case ISD::ConstantFP: {
-    ConstantFPSDNode *CFP = cast<ConstantFPSDNode>(Node);
-    if (CFP->getValueType(0) == MVT::ppcf128) {
-      APInt api = CFP->getValueAPF().bitcastToAPInt();
-      Lo = DAG.getConstantFP(APFloat(APInt(64, 1, &api.getRawData()[1])),
-                             MVT::f64);
-      Hi = DAG.getConstantFP(APFloat(APInt(64, 1, &api.getRawData()[0])),
-                             MVT::f64);
-      break;
-    }
-    Lo = ExpandConstantFP(CFP, false, DAG, TLI);
-    if (getTypeAction(Lo.getValueType()) == Expand)
-      ExpandOp(Lo, Lo, Hi);
-    break;
-  }
-  case ISD::BUILD_PAIR:
-    // Return the operands.
-    Lo = Node->getOperand(0);
-    Hi = Node->getOperand(1);
-    break;
-
-  case ISD::MERGE_VALUES:
-    if (Node->getNumValues() == 1) {
-      ExpandOp(Op.getOperand(0), Lo, Hi);
-      break;
-    }
-    // FIXME: For now only expand i64,chain = MERGE_VALUES (x, y)
-    assert(Op.getResNo() == 0 && Node->getNumValues() == 2 &&
-           Op.getValue(1).getValueType() == MVT::Other &&
-           "unhandled MERGE_VALUES");
-    ExpandOp(Op.getOperand(0), Lo, Hi);
-    // Remember that we legalized the chain.
-    AddLegalizedOperand(Op.getValue(1), LegalizeOp(Op.getOperand(1)));
-    break;
-
-  case ISD::SIGN_EXTEND_INREG:
-    ExpandOp(Node->getOperand(0), Lo, Hi);
-    // sext_inreg the low part if needed.
-    Lo = DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, NVT, Lo, Node->getOperand(1));
-
-    // The high part gets the sign extension from the lo-part.  This handles
-    // things like sextinreg V:i64 from i8.
-    Hi = DAG.getNode(ISD::SRA, dl, NVT, Lo,
-                     DAG.getConstant(NVT.getSizeInBits()-1,
-                                     TLI.getShiftAmountTy()));
-    break;
-
-  case ISD::BSWAP: {
-    ExpandOp(Node->getOperand(0), Lo, Hi);
-    SDValue TempLo = DAG.getNode(ISD::BSWAP, dl, NVT, Hi);
-    Hi = DAG.getNode(ISD::BSWAP, dl, NVT, Lo);
-    Lo = TempLo;
-    break;
-  }
-
-  case ISD::CTPOP:
-    ExpandOp(Node->getOperand(0), Lo, Hi);
-    Lo = DAG.getNode(ISD::ADD, dl, NVT,      // ctpop(HL) -> ctpop(H)+ctpop(L)
-                     DAG.getNode(ISD::CTPOP, dl, NVT, Lo),
-                     DAG.getNode(ISD::CTPOP, dl, NVT, Hi));
-    Hi = DAG.getConstant(0, NVT);
-    break;
-
-  case ISD::CTLZ: {
-    // ctlz (HL) -> ctlz(H) != 32 ? ctlz(H) : (ctlz(L)+32)
-    ExpandOp(Node->getOperand(0), Lo, Hi);
-    SDValue BitsC = DAG.getConstant(NVT.getSizeInBits(), NVT);
-    SDValue HLZ = DAG.getNode(ISD::CTLZ, dl, NVT, Hi);
-    SDValue TopNotZero = DAG.getSetCC(dl, TLI.getSetCCResultType(NVT), HLZ,
-                                      BitsC, ISD::SETNE);
-    SDValue LowPart = DAG.getNode(ISD::CTLZ, dl, NVT, Lo);
-    LowPart = DAG.getNode(ISD::ADD, dl, NVT, LowPart, BitsC);
-
-    Lo = DAG.getNode(ISD::SELECT, dl, NVT, TopNotZero, HLZ, LowPart);
-    Hi = DAG.getConstant(0, NVT);
-    break;
-  }
-
-  case ISD::CTTZ: {
-    // cttz (HL) -> cttz(L) != 32 ? cttz(L) : (cttz(H)+32)
-    ExpandOp(Node->getOperand(0), Lo, Hi);
-    SDValue BitsC = DAG.getConstant(NVT.getSizeInBits(), NVT);
-    SDValue LTZ = DAG.getNode(ISD::CTTZ, dl, NVT, Lo);
-    SDValue BotNotZero = DAG.getSetCC(dl, TLI.getSetCCResultType(NVT), LTZ,
-                                      BitsC, ISD::SETNE);
-    SDValue HiPart = DAG.getNode(ISD::CTTZ, dl, NVT, Hi);
-    HiPart = DAG.getNode(ISD::ADD, dl, NVT, HiPart, BitsC);
-
-    Lo = DAG.getNode(ISD::SELECT, dl, NVT, BotNotZero, LTZ, HiPart);
-    Hi = DAG.getConstant(0, NVT);
-    break;
-  }
-
-  case ISD::VAARG: {
-    SDValue Ch = Node->getOperand(0);   // Legalize the chain.
-    SDValue Ptr = Node->getOperand(1);  // Legalize the pointer.
-    Lo = DAG.getVAArg(NVT, dl, Ch, Ptr, Node->getOperand(2));
-    Hi = DAG.getVAArg(NVT, dl, Lo.getValue(1), Ptr, Node->getOperand(2));
-
-    // Remember that we legalized the chain.
-    Hi = LegalizeOp(Hi);
-    AddLegalizedOperand(Op.getValue(1), Hi.getValue(1));
-    if (TLI.isBigEndian())
-      std::swap(Lo, Hi);
-    break;
-  }
-
-  case ISD::LOAD: {
-    LoadSDNode *LD = cast<LoadSDNode>(Node);
-    SDValue Ch  = LD->getChain();    // Legalize the chain.
-    SDValue Ptr = LD->getBasePtr();  // Legalize the pointer.
-    ISD::LoadExtType ExtType = LD->getExtensionType();
-    const Value *SV = LD->getSrcValue();
-    int SVOffset = LD->getSrcValueOffset();
-    unsigned Alignment = LD->getAlignment();
-    bool isVolatile = LD->isVolatile();
-
-    if (ExtType == ISD::NON_EXTLOAD) {
-      Lo = DAG.getLoad(NVT, dl, Ch, Ptr, SV, SVOffset,
-                       isVolatile, Alignment);
-      if (VT == MVT::f32 || VT == MVT::f64) {
-        // f32->i32 or f64->i64 one to one expansion.
-        // Remember that we legalized the chain.
-        AddLegalizedOperand(SDValue(Node, 1), LegalizeOp(Lo.getValue(1)));
-        // Recursively expand the new load.
-        if (getTypeAction(NVT) == Expand)
-          ExpandOp(Lo, Lo, Hi);
-        break;
-      }
-
-      // Increment the pointer to the other half.
-      unsigned IncrementSize = Lo.getValueType().getSizeInBits()/8;
-      Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
-                        DAG.getIntPtrConstant(IncrementSize));
-      SVOffset += IncrementSize;
-      Alignment = MinAlign(Alignment, IncrementSize);
-      Hi = DAG.getLoad(NVT, dl, Ch, Ptr, SV, SVOffset,
-                       isVolatile, Alignment);
-
-      // Build a factor node to remember that this load is independent of the
-      // other one.
-      SDValue TF = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo.getValue(1),
-                               Hi.getValue(1));
-
-      // Remember that we legalized the chain.
-      AddLegalizedOperand(Op.getValue(1), LegalizeOp(TF));
-      if (TLI.isBigEndian())
-        std::swap(Lo, Hi);
-    } else {
-      MVT EVT = LD->getMemoryVT();
-
-      if ((VT == MVT::f64 && EVT == MVT::f32) ||
-          (VT == MVT::ppcf128 && (EVT==MVT::f64 || EVT==MVT::f32))) {
-        // f64 = EXTLOAD f32 should expand to LOAD, FP_EXTEND
-        SDValue Load = DAG.getLoad(EVT, dl, Ch, Ptr, SV,
-                                   SVOffset, isVolatile, Alignment);
-        // Remember that we legalized the chain.
-        AddLegalizedOperand(SDValue(Node, 1), LegalizeOp(Load.getValue(1)));
-        ExpandOp(DAG.getNode(ISD::FP_EXTEND, dl, VT, Load), Lo, Hi);
-        break;
-      }
-
-      if (EVT == NVT)
-        Lo = DAG.getLoad(NVT, dl, Ch, Ptr, SV,
-                         SVOffset, isVolatile, Alignment);
-      else
-        Lo = DAG.getExtLoad(ExtType, dl, NVT, Ch, Ptr, SV,
-                            SVOffset, EVT, isVolatile,
-                            Alignment);
-
-      // Remember that we legalized the chain.
-      AddLegalizedOperand(SDValue(Node, 1), LegalizeOp(Lo.getValue(1)));
-
-      if (ExtType == ISD::SEXTLOAD) {
-        // The high part is obtained by SRA'ing all but one of the bits of the
-        // lo part.
-        unsigned LoSize = Lo.getValueType().getSizeInBits();
-        Hi = DAG.getNode(ISD::SRA, dl, NVT, Lo,
-                         DAG.getConstant(LoSize-1, TLI.getShiftAmountTy()));
-      } else if (ExtType == ISD::ZEXTLOAD) {
-        // The high part is just a zero.
-        Hi = DAG.getConstant(0, NVT);
-      } else /* if (ExtType == ISD::EXTLOAD) */ {
-        // The high part is undefined.
-        Hi = DAG.getUNDEF(NVT);
-      }
-    }
-    break;
-  }
-  case ISD::AND:
-  case ISD::OR:
-  case ISD::XOR: {   // Simple logical operators -> two trivial pieces.
-    SDValue LL, LH, RL, RH;
-    ExpandOp(Node->getOperand(0), LL, LH);
-    ExpandOp(Node->getOperand(1), RL, RH);
-    Lo = DAG.getNode(Node->getOpcode(), dl, NVT, LL, RL);
-    Hi = DAG.getNode(Node->getOpcode(), dl, NVT, LH, RH);
-    break;
-  }
-  case ISD::SELECT: {
-    SDValue LL, LH, RL, RH;
-    ExpandOp(Node->getOperand(1), LL, LH);
-    ExpandOp(Node->getOperand(2), RL, RH);
-    if (getTypeAction(NVT) == Expand)
-      NVT = TLI.getTypeToExpandTo(NVT);
-    Lo = DAG.getNode(ISD::SELECT, dl, NVT, Node->getOperand(0), LL, RL);
-    if (VT != MVT::f32)
-      Hi = DAG.getNode(ISD::SELECT, dl, NVT, Node->getOperand(0), LH, RH);
-    break;
-  }
-  case ISD::SELECT_CC: {
-    SDValue TL, TH, FL, FH;
-    ExpandOp(Node->getOperand(2), TL, TH);
-    ExpandOp(Node->getOperand(3), FL, FH);
-    if (getTypeAction(NVT) == Expand)
-      NVT = TLI.getTypeToExpandTo(NVT);
-    Lo = DAG.getNode(ISD::SELECT_CC, dl, NVT, Node->getOperand(0),
-                     Node->getOperand(1), TL, FL, Node->getOperand(4));
-    if (VT != MVT::f32)
-      Hi = DAG.getNode(ISD::SELECT_CC, dl, NVT, Node->getOperand(0),
-                       Node->getOperand(1), TH, FH, Node->getOperand(4));
-    break;
-  }
-  case ISD::ANY_EXTEND:
-    // The low part is any extension of the input (which degenerates to a copy).
-    Lo = DAG.getNode(ISD::ANY_EXTEND, dl, NVT, Node->getOperand(0));
-    // The high part is undefined.
-    Hi = DAG.getUNDEF(NVT);
-    break;
-  case ISD::SIGN_EXTEND: {
-    // The low part is just a sign extension of the input (which degenerates to
-    // a copy).
-    Lo = DAG.getNode(ISD::SIGN_EXTEND, dl, NVT, Node->getOperand(0));
-
-    // The high part is obtained by SRA'ing all but one of the bits of the lo
-    // part.
-    unsigned LoSize = Lo.getValueType().getSizeInBits();
-    Hi = DAG.getNode(ISD::SRA, dl, NVT, Lo,
-                     DAG.getConstant(LoSize-1, TLI.getShiftAmountTy()));
-    break;
-  }
-  case ISD::ZERO_EXTEND:
-    // The low part is just a zero extension of the input (which degenerates to
-    // a copy).
-    Lo = DAG.getNode(ISD::ZERO_EXTEND, dl, NVT, Node->getOperand(0));
-
-    // The high part is just a zero.
-    Hi = DAG.getConstant(0, NVT);
-    break;
-
-  case ISD::TRUNCATE: {
-    // The input value must be larger than this value.  Expand *it*.
-    SDValue NewLo;
-    ExpandOp(Node->getOperand(0), NewLo, Hi);
-
-    // The low part is now either the right size, or it is closer.  If not the
-    // right size, make an illegal truncate so we recursively expand it.
-    if (NewLo.getValueType() != Node->getValueType(0))
-      NewLo = DAG.getNode(ISD::TRUNCATE, dl, Node->getValueType(0), NewLo);
-    ExpandOp(NewLo, Lo, Hi);
-    break;
-  }
-
-  case ISD::BIT_CONVERT: {
-    SDValue Tmp;
-    if (TLI.getOperationAction(ISD::BIT_CONVERT, VT) == TargetLowering::Custom){
-      // If the target wants to, allow it to lower this itself.
-      switch (getTypeAction(Node->getOperand(0).getValueType())) {
-      case Expand: assert(0 && "cannot expand FP!");
-      case Legal:   Tmp = LegalizeOp(Node->getOperand(0)); break;
-      case Promote: Tmp = PromoteOp (Node->getOperand(0)); break;
-      }
-      Tmp = TLI.LowerOperation(DAG.getNode(ISD::BIT_CONVERT, dl, VT, Tmp), DAG);
-    }
-
-    // f32 / f64 must be expanded to i32 / i64.
-    if (VT == MVT::f32 || VT == MVT::f64) {
-      Lo = DAG.getNode(ISD::BIT_CONVERT, dl, NVT, Node->getOperand(0));
-      if (getTypeAction(NVT) == Expand)
-        ExpandOp(Lo, Lo, Hi);
-      break;
-    }
-
-    // If source operand will be expanded to the same type as VT, i.e.
-    // i64 <- f64, i32 <- f32, expand the source operand instead.
-    MVT VT0 = Node->getOperand(0).getValueType();
-    if (getTypeAction(VT0) == Expand && TLI.getTypeToTransformTo(VT0) == VT) {
-      ExpandOp(Node->getOperand(0), Lo, Hi);
-      break;
-    }
-
-    // Turn this into a load/store pair by default.
-    if (Tmp.getNode() == 0)
-      Tmp = EmitStackConvert(Node->getOperand(0), VT, VT, dl);
-
-    ExpandOp(Tmp, Lo, Hi);
-    break;
-  }
-
-  case ISD::READCYCLECOUNTER: {
-    assert(TLI.getOperationAction(ISD::READCYCLECOUNTER, VT) ==
-                 TargetLowering::Custom &&
-           "Must custom expand ReadCycleCounter");
-    SDValue Tmp = TLI.LowerOperation(Op, DAG);
-    assert(Tmp.getNode() && "Node must be custom expanded!");
-    ExpandOp(Tmp.getValue(0), Lo, Hi);
-    AddLegalizedOperand(SDValue(Node, 1), // Remember we legalized the chain.
-                        LegalizeOp(Tmp.getValue(1)));
-    break;
-  }
-
-  case ISD::ATOMIC_CMP_SWAP: {
-    // This operation does not need a loop.
-    SDValue Tmp = TLI.LowerOperation(Op, DAG);
-    assert(Tmp.getNode() && "Node must be custom expanded!");
-    ExpandOp(Tmp.getValue(0), Lo, Hi);
-    AddLegalizedOperand(SDValue(Node, 1), // Remember we legalized the chain.
-                        LegalizeOp(Tmp.getValue(1)));
-    break;
-  }
-
-  case ISD::ATOMIC_LOAD_ADD:
-  case ISD::ATOMIC_LOAD_SUB:
-  case ISD::ATOMIC_LOAD_AND:
-  case ISD::ATOMIC_LOAD_OR:
-  case ISD::ATOMIC_LOAD_XOR:
-  case ISD::ATOMIC_LOAD_NAND:
-  case ISD::ATOMIC_SWAP: {
-    // These operations require a loop to be generated.  We can't do that yet,
-    // so substitute a target-dependent pseudo and expand that later.
-    SDValue In2Lo, In2Hi, In2;
-    ExpandOp(Op.getOperand(2), In2Lo, In2Hi);
-    In2 = DAG.getNode(ISD::BUILD_PAIR, dl, VT, In2Lo, In2Hi);
-    AtomicSDNode* Anode = cast<AtomicSDNode>(Node);
-    SDValue Replace =
-      DAG.getAtomic(Op.getOpcode(), dl, Anode->getMemoryVT(),
-                    Op.getOperand(0), Op.getOperand(1), In2,
-                    Anode->getSrcValue(), Anode->getAlignment());
-    SDValue Result = TLI.LowerOperation(Replace, DAG);
-    ExpandOp(Result.getValue(0), Lo, Hi);
-    // Remember that we legalized the chain.
-    AddLegalizedOperand(SDValue(Node, 1), LegalizeOp(Result.getValue(1)));
-    break;
-  }
-
-    // These operators cannot be expanded directly, emit them as calls to
-    // library functions.
-  case ISD::FP_TO_SINT: {
-    if (TLI.getOperationAction(ISD::FP_TO_SINT, VT) == TargetLowering::Custom) {
-      SDValue Op;
-      switch (getTypeAction(Node->getOperand(0).getValueType())) {
-      case Expand: assert(0 && "cannot expand FP!");
-      case Legal:   Op = LegalizeOp(Node->getOperand(0)); break;
-      case Promote: Op = PromoteOp (Node->getOperand(0)); break;
-      }
-
-      Op = TLI.LowerOperation(DAG.getNode(ISD::FP_TO_SINT, dl, VT, Op), DAG);
-
-      // Now that the custom expander is done, expand the result, which is still
-      // VT.
-      if (Op.getNode()) {
-        ExpandOp(Op, Lo, Hi);
-        break;
-      }
-    }
-
-    RTLIB::Libcall LC = RTLIB::getFPTOSINT(Node->getOperand(0).getValueType(),
-                                           VT);
-    assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unexpected uint-to-fp conversion!");
-    Lo = ExpandLibCall(LC, Node, false/*sign irrelevant*/, Hi);
-    break;
-  }
-
-  case ISD::FP_TO_UINT: {
-    if (TLI.getOperationAction(ISD::FP_TO_UINT, VT) == TargetLowering::Custom) {
-      SDValue Op;
-      switch (getTypeAction(Node->getOperand(0).getValueType())) {
-        case Expand: assert(0 && "cannot expand FP!");
-        case Legal:   Op = LegalizeOp(Node->getOperand(0)); break;
-        case Promote: Op = PromoteOp (Node->getOperand(0)); break;
-      }
-
-      Op = TLI.LowerOperation(DAG.getNode(ISD::FP_TO_UINT, dl, VT, Op), DAG);
-
-      // Now that the custom expander is done, expand the result.
-      if (Op.getNode()) {
-        ExpandOp(Op, Lo, Hi);
-        break;
-      }
-    }
-
-    RTLIB::Libcall LC = RTLIB::getFPTOUINT(Node->getOperand(0).getValueType(),
-                                           VT);
-    assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unexpected fp-to-uint conversion!");
-    Lo = ExpandLibCall(LC, Node, false/*sign irrelevant*/, Hi);
-    break;
-  }
-
-  case ISD::SHL: {
-    // If the target wants custom lowering, do so.
-    SDValue ShiftAmt = LegalizeOp(Node->getOperand(1));
-    if (TLI.getOperationAction(ISD::SHL, VT) == TargetLowering::Custom) {
-      SDValue Op = DAG.getNode(ISD::SHL, dl, VT, Node->getOperand(0), ShiftAmt);
-      Op = TLI.LowerOperation(Op, DAG);
-      if (Op.getNode()) {
-        // Now that the custom expander is done, expand the result, which is
-        // still VT.
-        ExpandOp(Op, Lo, Hi);
-        break;
-      }
-    }
-
-    // If ADDC/ADDE are supported and if the shift amount is a constant 1, emit
-    // this X << 1 as X+X.
-    if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(ShiftAmt)) {
-      if (ShAmt->getAPIntValue() == 1 &&
-          TLI.isOperationLegalOrCustom(ISD::ADDC, NVT) &&
-          TLI.isOperationLegalOrCustom(ISD::ADDE, NVT)) {
-        SDValue LoOps[2], HiOps[3];
-        ExpandOp(Node->getOperand(0), LoOps[0], HiOps[0]);
-        SDVTList VTList = DAG.getVTList(LoOps[0].getValueType(), MVT::Flag);
-        LoOps[1] = LoOps[0];
-        Lo = DAG.getNode(ISD::ADDC, dl, VTList, LoOps, 2);
-
-        HiOps[1] = HiOps[0];
-        HiOps[2] = Lo.getValue(1);
-        Hi = DAG.getNode(ISD::ADDE, dl, VTList, HiOps, 3);
-        break;
-      }
-    }
-
-    // If we can emit an efficient shift operation, do so now.
-    if (ExpandShift(ISD::SHL, Node->getOperand(0), ShiftAmt, Lo, Hi, dl))
-      break;
-
-    // If this target supports SHL_PARTS, use it.
-    TargetLowering::LegalizeAction Action =
-      TLI.getOperationAction(ISD::SHL_PARTS, NVT);
-    if ((Action == TargetLowering::Legal && TLI.isTypeLegal(NVT)) ||
-        Action == TargetLowering::Custom) {
-      ExpandShiftParts(ISD::SHL_PARTS, Node->getOperand(0),
-                       ShiftAmt, Lo, Hi, dl);
-      break;
-    }
-
-    // Otherwise, emit a libcall.
-    Lo = ExpandLibCall(RTLIB::SHL_I64, Node, false/*left shift=unsigned*/, Hi);
-    break;
-  }
-
-  case ISD::SRA: {
-    // If the target wants custom lowering, do so.
-    SDValue ShiftAmt = LegalizeOp(Node->getOperand(1));
-    if (TLI.getOperationAction(ISD::SRA, VT) == TargetLowering::Custom) {
-      SDValue Op = DAG.getNode(ISD::SRA, dl, VT, Node->getOperand(0), ShiftAmt);
-      Op = TLI.LowerOperation(Op, DAG);
-      if (Op.getNode()) {
-        // Now that the custom expander is done, expand the result, which is
-        // still VT.
-        ExpandOp(Op, Lo, Hi);
-        break;
-      }
-    }
-
-    // If we can emit an efficient shift operation, do so now.
-    if (ExpandShift(ISD::SRA,  Node->getOperand(0), ShiftAmt, Lo, Hi, dl))
-      break;
-
-    // If this target supports SRA_PARTS, use it.
-    TargetLowering::LegalizeAction Action =
-      TLI.getOperationAction(ISD::SRA_PARTS, NVT);
-    if ((Action == TargetLowering::Legal && TLI.isTypeLegal(NVT)) ||
-        Action == TargetLowering::Custom) {
-      ExpandShiftParts(ISD::SRA_PARTS, Node->getOperand(0),
-                       ShiftAmt, Lo, Hi, dl);
-      break;
-    }
-
-    // Otherwise, emit a libcall.
-    Lo = ExpandLibCall(RTLIB::SRA_I64, Node, true/*ashr is signed*/, Hi);
-    break;
-  }
-
-  case ISD::SRL: {
-    // If the target wants custom lowering, do so.
-    SDValue ShiftAmt = LegalizeOp(Node->getOperand(1));
-    if (TLI.getOperationAction(ISD::SRL, VT) == TargetLowering::Custom) {
-      SDValue Op = DAG.getNode(ISD::SRL, dl, VT, Node->getOperand(0), ShiftAmt);
-      Op = TLI.LowerOperation(Op, DAG);
-      if (Op.getNode()) {
-        // Now that the custom expander is done, expand the result, which is
-        // still VT.
-        ExpandOp(Op, Lo, Hi);
-        break;
-      }
-    }
-
-    // If we can emit an efficient shift operation, do so now.
-    if (ExpandShift(ISD::SRL, Node->getOperand(0), ShiftAmt, Lo, Hi, dl))
-      break;
-
-    // If this target supports SRL_PARTS, use it.
-    TargetLowering::LegalizeAction Action =
-      TLI.getOperationAction(ISD::SRL_PARTS, NVT);
-    if ((Action == TargetLowering::Legal && TLI.isTypeLegal(NVT)) ||
-        Action == TargetLowering::Custom) {
-      ExpandShiftParts(ISD::SRL_PARTS,
-                       Node->getOperand(0), ShiftAmt, Lo, Hi, dl);
-      break;
-    }
-
-    // Otherwise, emit a libcall.
-    Lo = ExpandLibCall(RTLIB::SRL_I64, Node, false/*lshr is unsigned*/, Hi);
-    break;
-  }
-
-  case ISD::ADD:
-  case ISD::SUB: {
-    // If the target wants to custom expand this, let them.
-    if (TLI.getOperationAction(Node->getOpcode(), VT) ==
-            TargetLowering::Custom) {
-      SDValue Result = TLI.LowerOperation(Op, DAG);
-      if (Result.getNode()) {
-        ExpandOp(Result, Lo, Hi);
-        break;
-      }
-    }
-    // Expand the subcomponents.
-    SDValue LHSL, LHSH, RHSL, RHSH;
-    ExpandOp(Node->getOperand(0), LHSL, LHSH);
-    ExpandOp(Node->getOperand(1), RHSL, RHSH);
-    SDValue LoOps[2], HiOps[3];
-    LoOps[0] = LHSL;
-    LoOps[1] = RHSL;
-    HiOps[0] = LHSH;
-    HiOps[1] = RHSH;
-
-    //cascaded check to see if any smaller size has a a carry flag.
-    unsigned OpV = Node->getOpcode() == ISD::ADD ? ISD::ADDC : ISD::SUBC;
-    bool hasCarry = false;
-    for (unsigned BitSize = NVT.getSizeInBits(); BitSize != 0; BitSize /= 2) {
-      MVT AVT = MVT::getIntegerVT(BitSize);
-      if (TLI.isOperationLegalOrCustom(OpV, AVT)) {
-        hasCarry = true;
-        break;
-      }
-    }
-
-    if(hasCarry) {
-      SDVTList VTList = DAG.getVTList(LHSL.getValueType(), MVT::Flag);
-      if (Node->getOpcode() == ISD::ADD) {
-        Lo = DAG.getNode(ISD::ADDC, dl, VTList, LoOps, 2);
-        HiOps[2] = Lo.getValue(1);
-        Hi = DAG.getNode(ISD::ADDE, dl, VTList, HiOps, 3);
-      } else {
-        Lo = DAG.getNode(ISD::SUBC, dl, VTList, LoOps, 2);
-        HiOps[2] = Lo.getValue(1);
-        Hi = DAG.getNode(ISD::SUBE, dl, VTList, HiOps, 3);
-      }
-      break;
-    } else {
-      if (Node->getOpcode() == ISD::ADD) {
-        Lo = DAG.getNode(ISD::ADD, dl, NVT, LoOps, 2);
-        Hi = DAG.getNode(ISD::ADD, dl, NVT, HiOps, 2);
-        SDValue Cmp1 = DAG.getSetCC(dl, TLI.getSetCCResultType(NVT),
-                                    Lo, LoOps[0], ISD::SETULT);
-        SDValue Carry1 = DAG.getNode(ISD::SELECT, dl, NVT, Cmp1,
-                                     DAG.getConstant(1, NVT),
-                                     DAG.getConstant(0, NVT));
-        SDValue Cmp2 = DAG.getSetCC(dl, TLI.getSetCCResultType(NVT),
-                                    Lo, LoOps[1], ISD::SETULT);
-        SDValue Carry2 = DAG.getNode(ISD::SELECT, dl, NVT, Cmp2,
-                                    DAG.getConstant(1, NVT),
-                                    Carry1);
-        Hi = DAG.getNode(ISD::ADD, dl, NVT, Hi, Carry2);
-      } else {
-        Lo = DAG.getNode(ISD::SUB, dl, NVT, LoOps, 2);
-        Hi = DAG.getNode(ISD::SUB, dl, NVT, HiOps, 2);
-        SDValue Cmp = DAG.getSetCC(dl, NVT, LoOps[0], LoOps[1], ISD::SETULT);
-        SDValue Borrow = DAG.getNode(ISD::SELECT, dl, NVT, Cmp,
-                                     DAG.getConstant(1, NVT),
-                                     DAG.getConstant(0, NVT));
-        Hi = DAG.getNode(ISD::SUB, dl, NVT, Hi, Borrow);
-      }
-      break;
-    }
-  }
-
-  case ISD::ADDC:
-  case ISD::SUBC: {
-    // Expand the subcomponents.
-    SDValue LHSL, LHSH, RHSL, RHSH;
-    ExpandOp(Node->getOperand(0), LHSL, LHSH);
-    ExpandOp(Node->getOperand(1), RHSL, RHSH);
-    SDVTList VTList = DAG.getVTList(LHSL.getValueType(), MVT::Flag);
-    SDValue LoOps[2] = { LHSL, RHSL };
-    SDValue HiOps[3] = { LHSH, RHSH };
-
-    if (Node->getOpcode() == ISD::ADDC) {
-      Lo = DAG.getNode(ISD::ADDC, dl, VTList, LoOps, 2);
-      HiOps[2] = Lo.getValue(1);
-      Hi = DAG.getNode(ISD::ADDE, dl, VTList, HiOps, 3);
-    } else {
-      Lo = DAG.getNode(ISD::SUBC, dl, VTList, LoOps, 2);
-      HiOps[2] = Lo.getValue(1);
-      Hi = DAG.getNode(ISD::SUBE, dl, VTList, HiOps, 3);
-    }
-    // Remember that we legalized the flag.
-    AddLegalizedOperand(Op.getValue(1), LegalizeOp(Hi.getValue(1)));
-    break;
-  }
-  case ISD::ADDE:
-  case ISD::SUBE: {
-    // Expand the subcomponents.
-    SDValue LHSL, LHSH, RHSL, RHSH;
-    ExpandOp(Node->getOperand(0), LHSL, LHSH);
-    ExpandOp(Node->getOperand(1), RHSL, RHSH);
-    SDVTList VTList = DAG.getVTList(LHSL.getValueType(), MVT::Flag);
-    SDValue LoOps[3] = { LHSL, RHSL, Node->getOperand(2) };
-    SDValue HiOps[3] = { LHSH, RHSH };
-
-    Lo = DAG.getNode(Node->getOpcode(), dl, VTList, LoOps, 3);
-    HiOps[2] = Lo.getValue(1);
-    Hi = DAG.getNode(Node->getOpcode(), dl, VTList, HiOps, 3);
-
-    // Remember that we legalized the flag.
-    AddLegalizedOperand(Op.getValue(1), LegalizeOp(Hi.getValue(1)));
-    break;
-  }
-  case ISD::MUL: {
-    // If the target wants to custom expand this, let them.
-    if (TLI.getOperationAction(ISD::MUL, VT) == TargetLowering::Custom) {
-      SDValue New = TLI.LowerOperation(Op, DAG);
-      if (New.getNode()) {
-        ExpandOp(New, Lo, Hi);
-        break;
-      }
-    }
-
-    bool HasMULHS = TLI.isOperationLegalOrCustom(ISD::MULHS, NVT);
-    bool HasMULHU = TLI.isOperationLegalOrCustom(ISD::MULHU, NVT);
-    bool HasSMUL_LOHI = TLI.isOperationLegalOrCustom(ISD::SMUL_LOHI, NVT);
-    bool HasUMUL_LOHI = TLI.isOperationLegalOrCustom(ISD::UMUL_LOHI, NVT);
-    if (HasMULHU || HasMULHS || HasUMUL_LOHI || HasSMUL_LOHI) {
-      SDValue LL, LH, RL, RH;
-      ExpandOp(Node->getOperand(0), LL, LH);
-      ExpandOp(Node->getOperand(1), RL, RH);
-      unsigned OuterBitSize = Op.getValueSizeInBits();
-      unsigned InnerBitSize = RH.getValueSizeInBits();
-      unsigned LHSSB = DAG.ComputeNumSignBits(Op.getOperand(0));
-      unsigned RHSSB = DAG.ComputeNumSignBits(Op.getOperand(1));
-      APInt HighMask = APInt::getHighBitsSet(OuterBitSize, InnerBitSize);
-      if (DAG.MaskedValueIsZero(Node->getOperand(0), HighMask) &&
-          DAG.MaskedValueIsZero(Node->getOperand(1), HighMask)) {
-        // The inputs are both zero-extended.
-        if (HasUMUL_LOHI) {
-          // We can emit a umul_lohi.
-          Lo = DAG.getNode(ISD::UMUL_LOHI, dl, DAG.getVTList(NVT, NVT), LL, RL);
-          Hi = SDValue(Lo.getNode(), 1);
-          break;
-        }
-        if (HasMULHU) {
-          // We can emit a mulhu+mul.
-          Lo = DAG.getNode(ISD::MUL, dl, NVT, LL, RL);
-          Hi = DAG.getNode(ISD::MULHU, dl, NVT, LL, RL);
-          break;
-        }
-      }
-      if (LHSSB > InnerBitSize && RHSSB > InnerBitSize) {
-        // The input values are both sign-extended.
-        if (HasSMUL_LOHI) {
-          // We can emit a smul_lohi.
-          Lo = DAG.getNode(ISD::SMUL_LOHI, dl, DAG.getVTList(NVT, NVT), LL, RL);
-          Hi = SDValue(Lo.getNode(), 1);
-          break;
-        }
-        if (HasMULHS) {
-          // We can emit a mulhs+mul.
-          Lo = DAG.getNode(ISD::MUL, dl, NVT, LL, RL);
-          Hi = DAG.getNode(ISD::MULHS, dl, NVT, LL, RL);
-          break;
-        }
-      }
-      if (HasUMUL_LOHI) {
-        // Lo,Hi = umul LHS, RHS.
-        SDValue UMulLOHI = DAG.getNode(ISD::UMUL_LOHI, dl,
-                                         DAG.getVTList(NVT, NVT), LL, RL);
-        Lo = UMulLOHI;
-        Hi = UMulLOHI.getValue(1);
-        RH = DAG.getNode(ISD::MUL, dl, NVT, LL, RH);
-        LH = DAG.getNode(ISD::MUL, dl, NVT, LH, RL);
-        Hi = DAG.getNode(ISD::ADD, dl, NVT, Hi, RH);
-        Hi = DAG.getNode(ISD::ADD, dl, NVT, Hi, LH);
-        break;
-      }
-      if (HasMULHU) {
-        Lo = DAG.getNode(ISD::MUL, dl, NVT, LL, RL);
-        Hi = DAG.getNode(ISD::MULHU, dl, NVT, LL, RL);
-        RH = DAG.getNode(ISD::MUL, dl, NVT, LL, RH);
-        LH = DAG.getNode(ISD::MUL, dl, NVT, LH, RL);
-        Hi = DAG.getNode(ISD::ADD, dl, NVT, Hi, RH);
-        Hi = DAG.getNode(ISD::ADD, dl, NVT, Hi, LH);
-        break;
-      }
-    }
-
-    // If nothing else, we can make a libcall.
-    Lo = ExpandLibCall(RTLIB::MUL_I64, Node, false/*sign irrelevant*/, Hi);
-    break;
-  }
-  case ISD::SDIV:
-    Lo = ExpandLibCall(RTLIB::SDIV_I64, Node, true, Hi);
-    break;
-  case ISD::UDIV:
-    Lo = ExpandLibCall(RTLIB::UDIV_I64, Node, true, Hi);
-    break;
-  case ISD::SREM:
-    Lo = ExpandLibCall(RTLIB::SREM_I64, Node, true, Hi);
-    break;
-  case ISD::UREM:
-    Lo = ExpandLibCall(RTLIB::UREM_I64, Node, true, Hi);
-    break;
-
-  case ISD::FADD:
-    Lo = ExpandLibCall(GetFPLibCall(VT, RTLIB::ADD_F32,
-                                        RTLIB::ADD_F64,
-                                        RTLIB::ADD_F80,
-                                        RTLIB::ADD_PPCF128),
-                       Node, false, Hi);
-    break;
-  case ISD::FSUB:
-    Lo = ExpandLibCall(GetFPLibCall(VT, RTLIB::SUB_F32,
-                                        RTLIB::SUB_F64,
-                                        RTLIB::SUB_F80,
-                                        RTLIB::SUB_PPCF128),
-                       Node, false, Hi);
-    break;
-  case ISD::FMUL:
-    Lo = ExpandLibCall(GetFPLibCall(VT, RTLIB::MUL_F32,
-                                        RTLIB::MUL_F64,
-                                        RTLIB::MUL_F80,
-                                        RTLIB::MUL_PPCF128),
-                       Node, false, Hi);
-    break;
-  case ISD::FDIV:
-    Lo = ExpandLibCall(GetFPLibCall(VT, RTLIB::DIV_F32,
-                                        RTLIB::DIV_F64,
-                                        RTLIB::DIV_F80,
-                                        RTLIB::DIV_PPCF128),
-                       Node, false, Hi);
-    break;
-  case ISD::FP_EXTEND: {
-    if (VT == MVT::ppcf128) {
-      assert(Node->getOperand(0).getValueType()==MVT::f32 ||
-             Node->getOperand(0).getValueType()==MVT::f64);
-      const uint64_t zero = 0;
-      if (Node->getOperand(0).getValueType()==MVT::f32)
-        Hi = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, Node->getOperand(0));
-      else
-        Hi = Node->getOperand(0);
-      Lo = DAG.getConstantFP(APFloat(APInt(64, 1, &zero)), MVT::f64);
-      break;
-    }
-    RTLIB::Libcall LC = RTLIB::getFPEXT(Node->getOperand(0).getValueType(), VT);
-    assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_EXTEND!");
-    Lo = ExpandLibCall(LC, Node, true, Hi);
-    break;
-  }
-  case ISD::FP_ROUND: {
-    RTLIB::Libcall LC = RTLIB::getFPROUND(Node->getOperand(0).getValueType(),
-                                          VT);
-    assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_ROUND!");
-    Lo = ExpandLibCall(LC, Node, true, Hi);
-    break;
-  }
-  case ISD::FSQRT:
-  case ISD::FSIN:
-  case ISD::FCOS:
-  case ISD::FLOG:
-  case ISD::FLOG2:
-  case ISD::FLOG10:
-  case ISD::FEXP:
-  case ISD::FEXP2:
-  case ISD::FTRUNC:
-  case ISD::FFLOOR:
-  case ISD::FCEIL:
-  case ISD::FRINT:
-  case ISD::FNEARBYINT:
-  case ISD::FPOW:
-  case ISD::FPOWI: {
-    RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
-    switch(Node->getOpcode()) {
-    case ISD::FSQRT:
-      LC = GetFPLibCall(VT, RTLIB::SQRT_F32, RTLIB::SQRT_F64,
-                        RTLIB::SQRT_F80, RTLIB::SQRT_PPCF128);
-      break;
-    case ISD::FSIN:
-      LC = GetFPLibCall(VT, RTLIB::SIN_F32, RTLIB::SIN_F64,
-                        RTLIB::SIN_F80, RTLIB::SIN_PPCF128);
-      break;
-    case ISD::FCOS:
-      LC = GetFPLibCall(VT, RTLIB::COS_F32, RTLIB::COS_F64,
-                        RTLIB::COS_F80, RTLIB::COS_PPCF128);
-      break;
-    case ISD::FLOG:
-      LC = GetFPLibCall(VT, RTLIB::LOG_F32, RTLIB::LOG_F64,
-                        RTLIB::LOG_F80, RTLIB::LOG_PPCF128);
-      break;
-    case ISD::FLOG2:
-      LC = GetFPLibCall(VT, RTLIB::LOG2_F32, RTLIB::LOG2_F64,
-                        RTLIB::LOG2_F80, RTLIB::LOG2_PPCF128);
-      break;
-    case ISD::FLOG10:
-      LC = GetFPLibCall(VT, RTLIB::LOG10_F32, RTLIB::LOG10_F64,
-                        RTLIB::LOG10_F80, RTLIB::LOG10_PPCF128);
-      break;
-    case ISD::FEXP:
-      LC = GetFPLibCall(VT, RTLIB::EXP_F32, RTLIB::EXP_F64,
-                        RTLIB::EXP_F80, RTLIB::EXP_PPCF128);
-      break;
-    case ISD::FEXP2:
-      LC = GetFPLibCall(VT, RTLIB::EXP2_F32, RTLIB::EXP2_F64,
-                        RTLIB::EXP2_F80, RTLIB::EXP2_PPCF128);
-      break;
-    case ISD::FTRUNC:
-      LC = GetFPLibCall(VT, RTLIB::TRUNC_F32, RTLIB::TRUNC_F64,
-                        RTLIB::TRUNC_F80, RTLIB::TRUNC_PPCF128);
-      break;
-    case ISD::FFLOOR:
-      LC = GetFPLibCall(VT, RTLIB::FLOOR_F32, RTLIB::FLOOR_F64,
-                        RTLIB::FLOOR_F80, RTLIB::FLOOR_PPCF128);
-      break;
-    case ISD::FCEIL:
-      LC = GetFPLibCall(VT, RTLIB::CEIL_F32, RTLIB::CEIL_F64,
-                        RTLIB::CEIL_F80, RTLIB::CEIL_PPCF128);
-      break;
-    case ISD::FRINT:
-      LC = GetFPLibCall(VT, RTLIB::RINT_F32, RTLIB::RINT_F64,
-                        RTLIB::RINT_F80, RTLIB::RINT_PPCF128);
-      break;
-    case ISD::FNEARBYINT:
-      LC = GetFPLibCall(VT, RTLIB::NEARBYINT_F32, RTLIB::NEARBYINT_F64,
-                        RTLIB::NEARBYINT_F80, RTLIB::NEARBYINT_PPCF128);
-      break;
-    case ISD::FPOW:
-      LC = GetFPLibCall(VT, RTLIB::POW_F32, RTLIB::POW_F64, RTLIB::POW_F80,
-                        RTLIB::POW_PPCF128);
-      break;
-    case ISD::FPOWI:
-      LC = GetFPLibCall(VT, RTLIB::POWI_F32, RTLIB::POWI_F64, RTLIB::POWI_F80,
-                        RTLIB::POWI_PPCF128);
-      break;
-    default: assert(0 && "Unreachable!");
-    }
-    Lo = ExpandLibCall(LC, Node, false, Hi);
-    break;
-  }
-  case ISD::FABS: {
-    if (VT == MVT::ppcf128) {
-      SDValue Tmp;
-      ExpandOp(Node->getOperand(0), Lo, Tmp);
-      Hi = DAG.getNode(ISD::FABS, dl, NVT, Tmp);
-      // lo = hi==fabs(hi) ? lo : -lo;
-      Lo = DAG.getNode(ISD::SELECT_CC, dl, NVT, Hi, Tmp,
-                       Lo, DAG.getNode(ISD::FNEG, dl, NVT, Lo),
-                       DAG.getCondCode(ISD::SETEQ));
-      break;
-    }
-    SDValue Mask = (VT == MVT::f64)
-      ? DAG.getConstantFP(BitsToDouble(~(1ULL << 63)), VT)
-      : DAG.getConstantFP(BitsToFloat(~(1U << 31)), VT);
-    Mask = DAG.getNode(ISD::BIT_CONVERT, dl, NVT, Mask);
-    Lo = DAG.getNode(ISD::BIT_CONVERT, dl, NVT, Node->getOperand(0));
-    Lo = DAG.getNode(ISD::AND, dl, NVT, Lo, Mask);
-    if (getTypeAction(NVT) == Expand)
-      ExpandOp(Lo, Lo, Hi);
-    break;
-  }
-  case ISD::FNEG: {
-    if (VT == MVT::ppcf128) {
-      ExpandOp(Node->getOperand(0), Lo, Hi);
-      Lo = DAG.getNode(ISD::FNEG, dl, MVT::f64, Lo);
-      Hi = DAG.getNode(ISD::FNEG, dl, MVT::f64, Hi);
-      break;
-    }
-    SDValue Mask = (VT == MVT::f64)
-      ? DAG.getConstantFP(BitsToDouble(1ULL << 63), VT)
-      : DAG.getConstantFP(BitsToFloat(1U << 31), VT);
-    Mask = DAG.getNode(ISD::BIT_CONVERT, dl, NVT, Mask);
-    Lo = DAG.getNode(ISD::BIT_CONVERT, dl, NVT, Node->getOperand(0));
-    Lo = DAG.getNode(ISD::XOR, dl, NVT, Lo, Mask);
-    if (getTypeAction(NVT) == Expand)
-      ExpandOp(Lo, Lo, Hi);
-    break;
-  }
-  case ISD::FCOPYSIGN: {
-    Lo = ExpandFCOPYSIGNToBitwiseOps(Node, NVT, DAG, TLI);
-    if (getTypeAction(NVT) == Expand)
-      ExpandOp(Lo, Lo, Hi);
-    break;
-  }
-  case ISD::SINT_TO_FP:
-  case ISD::UINT_TO_FP: {
-    bool isSigned = Node->getOpcode() == ISD::SINT_TO_FP;
-    MVT SrcVT = Node->getOperand(0).getValueType();
-
-    // Promote the operand if needed.  Do this before checking for
-    // ppcf128 so conversions of i16 and i8 work.
-    if (getTypeAction(SrcVT) == Promote) {
-      SDValue Tmp = PromoteOp(Node->getOperand(0));
-      Tmp = isSigned
-        ? DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, Tmp.getValueType(), Tmp,
-                      DAG.getValueType(SrcVT))
-        : DAG.getZeroExtendInReg(Tmp, dl, SrcVT);
-      Node = DAG.UpdateNodeOperands(Op, Tmp).getNode();
-      SrcVT = Node->getOperand(0).getValueType();
-    }
-
-    if (VT == MVT::ppcf128 && SrcVT == MVT::i32) {
-      static const uint64_t zero = 0;
-      if (isSigned) {
-        Hi = LegalizeOp(DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f64,
-                                    Node->getOperand(0)));
-        Lo = DAG.getConstantFP(APFloat(APInt(64, 1, &zero)), MVT::f64);
-      } else {
-        static const uint64_t TwoE32[] = { 0x41f0000000000000LL, 0 };
-        Hi = LegalizeOp(DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f64,
-                                    Node->getOperand(0)));
-        Lo = DAG.getConstantFP(APFloat(APInt(64, 1, &zero)), MVT::f64);
-        Hi = DAG.getNode(ISD::BUILD_PAIR, dl, VT, Lo, Hi);
-        // X>=0 ? {(f64)x, 0} : {(f64)x, 0} + 2^32
-        ExpandOp(DAG.getNode(ISD::SELECT_CC, dl,
-                             MVT::ppcf128, Node->getOperand(0),
-                             DAG.getConstant(0, MVT::i32),
-                             DAG.getNode(ISD::FADD, dl, MVT::ppcf128, Hi,
-                                         DAG.getConstantFP
-                                         (APFloat(APInt(128, 2, TwoE32)),
-                                          MVT::ppcf128)),
-                             Hi,
-                             DAG.getCondCode(ISD::SETLT)),
-                 Lo, Hi);
-      }
-      break;
-    }
-    if (VT == MVT::ppcf128 && SrcVT == MVT::i64 && !isSigned) {
-      // si64->ppcf128 done by libcall, below
-      static const uint64_t TwoE64[] = { 0x43f0000000000000LL, 0 };
-      ExpandOp(DAG.getNode(ISD::SINT_TO_FP, dl, MVT::ppcf128,
-               Node->getOperand(0)), Lo, Hi);
-      Hi = DAG.getNode(ISD::BUILD_PAIR, dl, VT, Lo, Hi);
-      // x>=0 ? (ppcf128)(i64)x : (ppcf128)(i64)x + 2^64
-      ExpandOp(DAG.getNode(ISD::SELECT_CC, dl, MVT::ppcf128,
-                           Node->getOperand(0),
-                           DAG.getConstant(0, MVT::i64),
-                           DAG.getNode(ISD::FADD, dl, MVT::ppcf128, Hi,
-                                       DAG.getConstantFP
-                                       (APFloat(APInt(128, 2, TwoE64)),
-                                        MVT::ppcf128)),
-                           Hi,
-                           DAG.getCondCode(ISD::SETLT)),
-               Lo, Hi);
-      break;
-    }
-
-    Lo = ExpandIntToFP(Node->getOpcode() == ISD::SINT_TO_FP, VT,
-                       Node->getOperand(0), dl);
-    if (getTypeAction(Lo.getValueType()) == Expand)
-      // float to i32 etc. can be 'expanded' to a single node.
-      ExpandOp(Lo, Lo, Hi);
-    break;
-  }
-  }
-
-  // Make sure the resultant values have been legalized themselves, unless this
-  // is a type that requires multi-step expansion.
-  if (getTypeAction(NVT) != Expand && NVT != MVT::isVoid) {
-    Lo = LegalizeOp(Lo);
-    if (Hi.getNode())
-      // Don't legalize the high part if it is expanded to a single node.
-      Hi = LegalizeOp(Hi);
-  }
-
-  // Remember in a map if the values will be reused later.
-  bool isNew =
-    ExpandedNodes.insert(std::make_pair(Op, std::make_pair(Lo, Hi))).second;
-  assert(isNew && "Value already expanded?!?");
-  isNew = isNew;
-}
-
-/// SplitVectorOp - Given an operand of vector type, break it down into
-/// two smaller values, still of vector type.
-void SelectionDAGLegalize::SplitVectorOp(SDValue Op, SDValue &Lo,
-                                         SDValue &Hi) {
-  assert(0 && "This should be dead!");
-  assert(Op.getValueType().isVector() && "Cannot split non-vector type!");
-  SDNode *Node = Op.getNode();
-  DebugLoc dl = Node->getDebugLoc();
-  unsigned NumElements = Op.getValueType().getVectorNumElements();
-  assert(NumElements > 1 && "Cannot split a single element vector!");
-
-  MVT NewEltVT = Op.getValueType().getVectorElementType();
-
-  unsigned NewNumElts_Lo = 1 << Log2_32(NumElements-1);
-  unsigned NewNumElts_Hi = NumElements - NewNumElts_Lo;
-
-  MVT NewVT_Lo = MVT::getVectorVT(NewEltVT, NewNumElts_Lo);
-  MVT NewVT_Hi = MVT::getVectorVT(NewEltVT, NewNumElts_Hi);
-
-  // See if we already split it.
-  std::map<SDValue, std::pair<SDValue, SDValue> >::iterator I
-    = SplitNodes.find(Op);
-  if (I != SplitNodes.end()) {
-    Lo = I->second.first;
-    Hi = I->second.second;
-    return;
-  }
-
-  switch (Node->getOpcode()) {
-  default:
-#ifndef NDEBUG
-    Node->dump(&DAG);
-#endif
-    assert(0 && "Unhandled operation in SplitVectorOp!");
-  case ISD::UNDEF:
-    Lo = DAG.getUNDEF(NewVT_Lo);
-    Hi = DAG.getUNDEF(NewVT_Hi);
-    break;
-  case ISD::BUILD_PAIR:
-    Lo = Node->getOperand(0);
-    Hi = Node->getOperand(1);
-    break;
-  case ISD::INSERT_VECTOR_ELT: {
-    if (ConstantSDNode *Idx = dyn_cast<ConstantSDNode>(Node->getOperand(2))) {
-      SplitVectorOp(Node->getOperand(0), Lo, Hi);
-      unsigned Index = Idx->getZExtValue();
-      SDValue ScalarOp = Node->getOperand(1);
-      if (Index < NewNumElts_Lo)
-        Lo = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVT_Lo, Lo, ScalarOp,
-                         DAG.getIntPtrConstant(Index));
-      else
-        Hi = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVT_Hi, Hi, ScalarOp,
-                         DAG.getIntPtrConstant(Index - NewNumElts_Lo));
-      break;
-    }
-    SDValue Tmp = PerformInsertVectorEltInMemory(Node->getOperand(0),
-                                                 Node->getOperand(1),
-                                                 Node->getOperand(2), dl);
-    SplitVectorOp(Tmp, Lo, Hi);
-    break;
-  }
-  case ISD::VECTOR_SHUFFLE: {
-    // Build the low part.
-    SDValue Mask = Node->getOperand(2);
-    SmallVector<SDValue, 8> Ops;
-    MVT PtrVT = TLI.getPointerTy();
-
-    // Insert all of the elements from the input that are needed.  We use
-    // buildvector of extractelement here because the input vectors will have
-    // to be legalized, so this makes the code simpler.
-    for (unsigned i = 0; i != NewNumElts_Lo; ++i) {
-      SDValue IdxNode = Mask.getOperand(i);
-      if (IdxNode.getOpcode() == ISD::UNDEF) {
-        Ops.push_back(DAG.getUNDEF(NewEltVT));
-        continue;
-      }
-      unsigned Idx = cast<ConstantSDNode>(IdxNode)->getZExtValue();
-      SDValue InVec = Node->getOperand(0);
-      if (Idx >= NumElements) {
-        InVec = Node->getOperand(1);
-        Idx -= NumElements;
-      }
-      Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewEltVT, InVec,
-                                DAG.getConstant(Idx, PtrVT)));
-    }
-    Lo = DAG.getNode(ISD::BUILD_VECTOR, dl, NewVT_Lo, &Ops[0], Ops.size());
-    Ops.clear();
-
-    for (unsigned i = NewNumElts_Lo; i != NumElements; ++i) {
-      SDValue IdxNode = Mask.getOperand(i);
-      if (IdxNode.getOpcode() == ISD::UNDEF) {
-        Ops.push_back(DAG.getUNDEF(NewEltVT));
-        continue;
-      }
-      unsigned Idx = cast<ConstantSDNode>(IdxNode)->getZExtValue();
-      SDValue InVec = Node->getOperand(0);
-      if (Idx >= NumElements) {
-        InVec = Node->getOperand(1);
-        Idx -= NumElements;
-      }
-      Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewEltVT, InVec,
-                                DAG.getConstant(Idx, PtrVT)));
-    }
-    Hi = DAG.getNode(ISD::BUILD_VECTOR, dl, NewVT_Hi, &Ops[0], Ops.size());
-    break;
-  }
-  case ISD::BUILD_VECTOR: {
-    SmallVector<SDValue, 8> LoOps(Node->op_begin(),
-                                  Node->op_begin()+NewNumElts_Lo);
-    Lo = DAG.getNode(ISD::BUILD_VECTOR, dl, NewVT_Lo, &LoOps[0], LoOps.size());
-
-    SmallVector<SDValue, 8> HiOps(Node->op_begin()+NewNumElts_Lo,
-                                  Node->op_end());
-    Hi = DAG.getNode(ISD::BUILD_VECTOR, dl, NewVT_Hi, &HiOps[0], HiOps.size());
-    break;
-  }
-  case ISD::CONCAT_VECTORS: {
-    // FIXME: Handle non-power-of-two vectors?
-    unsigned NewNumSubvectors = Node->getNumOperands() / 2;
-    if (NewNumSubvectors == 1) {
-      Lo = Node->getOperand(0);
-      Hi = Node->getOperand(1);
-    } else {
-      SmallVector<SDValue, 8> LoOps(Node->op_begin(),
-                                    Node->op_begin()+NewNumSubvectors);
-      Lo = DAG.getNode(ISD::CONCAT_VECTORS, dl, NewVT_Lo,
-                       &LoOps[0], LoOps.size());
-
-      SmallVector<SDValue, 8> HiOps(Node->op_begin()+NewNumSubvectors,
-                                    Node->op_end());
-      Hi = DAG.getNode(ISD::CONCAT_VECTORS, dl, NewVT_Hi,
-                       &HiOps[0], HiOps.size());
-    }
-    break;
-  }
-  case ISD::EXTRACT_SUBVECTOR: {
-    SDValue Vec = Op.getOperand(0);
-    SDValue Idx = Op.getOperand(1);
-    MVT     IdxVT = Idx.getValueType();
-
-    Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NewVT_Lo, Vec, Idx);
-    ConstantSDNode *CIdx = dyn_cast<ConstantSDNode>(Idx);
-    if (CIdx) {
-      Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NewVT_Hi, Vec,
-                       DAG.getConstant(CIdx->getZExtValue() + NewNumElts_Lo,
-                                       IdxVT));
-    } else {
-      Idx = DAG.getNode(ISD::ADD, dl, IdxVT, Idx,
-                        DAG.getConstant(NewNumElts_Lo, IdxVT));
-      Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NewVT_Hi, Vec, Idx);
-    }
-    break;
-  }
-  case ISD::SELECT: {
-    SDValue Cond = Node->getOperand(0);
-
-    SDValue LL, LH, RL, RH;
-    SplitVectorOp(Node->getOperand(1), LL, LH);
-    SplitVectorOp(Node->getOperand(2), RL, RH);
-
-    if (Cond.getValueType().isVector()) {
-      // Handle a vector merge.
-      SDValue CL, CH;
-      SplitVectorOp(Cond, CL, CH);
-      Lo = DAG.getNode(Node->getOpcode(), dl, NewVT_Lo, CL, LL, RL);
-      Hi = DAG.getNode(Node->getOpcode(), dl, NewVT_Hi, CH, LH, RH);
-    } else {
-      // Handle a simple select with vector operands.
-      Lo = DAG.getNode(Node->getOpcode(), dl, NewVT_Lo, Cond, LL, RL);
-      Hi = DAG.getNode(Node->getOpcode(), dl, NewVT_Hi, Cond, LH, RH);
-    }
-    break;
-  }
-  case ISD::SELECT_CC: {
-    SDValue CondLHS = Node->getOperand(0);
-    SDValue CondRHS = Node->getOperand(1);
-    SDValue CondCode = Node->getOperand(4);
-
-    SDValue LL, LH, RL, RH;
-    SplitVectorOp(Node->getOperand(2), LL, LH);
-    SplitVectorOp(Node->getOperand(3), RL, RH);
-
-    // Handle a simple select with vector operands.
-    Lo = DAG.getNode(ISD::SELECT_CC, dl, NewVT_Lo, CondLHS, CondRHS,
-                     LL, RL, CondCode);
-    Hi = DAG.getNode(ISD::SELECT_CC, dl, NewVT_Hi, CondLHS, CondRHS,
-                     LH, RH, CondCode);
-    break;
-  }
-  case ISD::VSETCC: {
-    SDValue LL, LH, RL, RH;
-    SplitVectorOp(Node->getOperand(0), LL, LH);
-    SplitVectorOp(Node->getOperand(1), RL, RH);
-    Lo = DAG.getNode(ISD::VSETCC, dl, NewVT_Lo, LL, RL, Node->getOperand(2));
-    Hi = DAG.getNode(ISD::VSETCC, dl, NewVT_Hi, LH, RH, Node->getOperand(2));
-    break;
-  }
-  case ISD::ADD:
-  case ISD::SUB:
-  case ISD::MUL:
-  case ISD::FADD:
-  case ISD::FSUB:
-  case ISD::FMUL:
-  case ISD::SDIV:
-  case ISD::UDIV:
-  case ISD::FDIV:
-  case ISD::FPOW:
-  case ISD::AND:
-  case ISD::OR:
-  case ISD::XOR:
-  case ISD::UREM:
-  case ISD::SREM:
-  case ISD::FREM:
-  case ISD::SHL:
-  case ISD::SRA:
-  case ISD::SRL: {
-    SDValue LL, LH, RL, RH;
-    SplitVectorOp(Node->getOperand(0), LL, LH);
-    SplitVectorOp(Node->getOperand(1), RL, RH);
-
-    Lo = DAG.getNode(Node->getOpcode(), dl, NewVT_Lo, LL, RL);
-    Hi = DAG.getNode(Node->getOpcode(), dl, NewVT_Hi, LH, RH);
-    break;
-  }
-  case ISD::FP_ROUND:
-  case ISD::FPOWI: {
-    SDValue L, H;
-    SplitVectorOp(Node->getOperand(0), L, H);
-
-    Lo = DAG.getNode(Node->getOpcode(), dl, NewVT_Lo, L, Node->getOperand(1));
-    Hi = DAG.getNode(Node->getOpcode(), dl, NewVT_Hi, H, Node->getOperand(1));
-    break;
-  }
-  case ISD::CTTZ:
-  case ISD::CTLZ:
-  case ISD::CTPOP:
-  case ISD::FNEG:
-  case ISD::FABS:
-  case ISD::FSQRT:
-  case ISD::FSIN:
-  case ISD::FCOS:
-  case ISD::FLOG:
-  case ISD::FLOG2:
-  case ISD::FLOG10:
-  case ISD::FEXP:
-  case ISD::FEXP2:
-  case ISD::FP_TO_SINT:
-  case ISD::FP_TO_UINT:
-  case ISD::SINT_TO_FP:
-  case ISD::UINT_TO_FP:
-  case ISD::TRUNCATE:
-  case ISD::ANY_EXTEND:
-  case ISD::SIGN_EXTEND:
-  case ISD::ZERO_EXTEND:
-  case ISD::FP_EXTEND: {
-    SDValue L, H;
-    SplitVectorOp(Node->getOperand(0), L, H);
-
-    Lo = DAG.getNode(Node->getOpcode(), dl, NewVT_Lo, L);
-    Hi = DAG.getNode(Node->getOpcode(), dl, NewVT_Hi, H);
-    break;
-  }
-  case ISD::CONVERT_RNDSAT: {
-    ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(Node)->getCvtCode();
-    SDValue L, H;
-    SplitVectorOp(Node->getOperand(0), L, H);
-    SDValue DTyOpL = DAG.getValueType(NewVT_Lo);
-    SDValue DTyOpH = DAG.getValueType(NewVT_Hi);
-    SDValue STyOpL = DAG.getValueType(L.getValueType());
-    SDValue STyOpH = DAG.getValueType(H.getValueType());
-
-    SDValue RndOp = Node->getOperand(3);
-    SDValue SatOp = Node->getOperand(4);
-
-    Lo = DAG.getConvertRndSat(NewVT_Lo, dl, L, DTyOpL, STyOpL,
-                              RndOp, SatOp, CvtCode);
-    Hi = DAG.getConvertRndSat(NewVT_Hi, dl, H, DTyOpH, STyOpH,
-                              RndOp, SatOp, CvtCode);
-    break;
-  }
-  case ISD::LOAD: {
-    LoadSDNode *LD = cast<LoadSDNode>(Node);
-    SDValue Ch = LD->getChain();
-    SDValue Ptr = LD->getBasePtr();
-    ISD::LoadExtType ExtType = LD->getExtensionType();
-    const Value *SV = LD->getSrcValue();
-    int SVOffset = LD->getSrcValueOffset();
-    MVT MemoryVT = LD->getMemoryVT();
-    unsigned Alignment = LD->getAlignment();
-    bool isVolatile = LD->isVolatile();
-
-    assert(LD->isUnindexed() && "Indexed vector loads are not supported yet!");
-    SDValue Offset = DAG.getUNDEF(Ptr.getValueType());
-
-    MVT MemNewEltVT = MemoryVT.getVectorElementType();
-    MVT MemNewVT_Lo = MVT::getVectorVT(MemNewEltVT, NewNumElts_Lo);
-    MVT MemNewVT_Hi = MVT::getVectorVT(MemNewEltVT, NewNumElts_Hi);
-
-    Lo = DAG.getLoad(ISD::UNINDEXED, dl, ExtType,
-                     NewVT_Lo, Ch, Ptr, Offset,
-                     SV, SVOffset, MemNewVT_Lo, isVolatile, Alignment);
-    unsigned IncrementSize = NewNumElts_Lo * MemNewEltVT.getSizeInBits()/8;
-    Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
-                      DAG.getIntPtrConstant(IncrementSize));
-    SVOffset += IncrementSize;
-    Alignment = MinAlign(Alignment, IncrementSize);
-    Hi = DAG.getLoad(ISD::UNINDEXED, dl, ExtType,
-                     NewVT_Hi, Ch, Ptr, Offset,
-                     SV, SVOffset, MemNewVT_Hi, isVolatile, Alignment);
-
-    // Build a factor node to remember that this load is independent of the
-    // other one.
-    SDValue TF = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo.getValue(1),
-                             Hi.getValue(1));
-
-    // Remember that we legalized the chain.
-    AddLegalizedOperand(Op.getValue(1), LegalizeOp(TF));
-    break;
-  }
-  case ISD::BIT_CONVERT: {
-    // We know the result is a vector.  The input may be either a vector or a
-    // scalar value.
-    SDValue InOp = Node->getOperand(0);
-    if (!InOp.getValueType().isVector() ||
-        InOp.getValueType().getVectorNumElements() == 1) {
-      // The input is a scalar or single-element vector.
-      // Lower to a store/load so that it can be split.
-      // FIXME: this could be improved probably.
-      unsigned LdAlign = TLI.getTargetData()->
-        getPrefTypeAlignment(Op.getValueType().getTypeForMVT());
-      SDValue Ptr = DAG.CreateStackTemporary(InOp.getValueType(), LdAlign);
-      int FI = cast<FrameIndexSDNode>(Ptr.getNode())->getIndex();
-
-      SDValue St = DAG.getStore(DAG.getEntryNode(), dl,
-                                InOp, Ptr,
-                                PseudoSourceValue::getFixedStack(FI), 0);
-      InOp = DAG.getLoad(Op.getValueType(), dl, St, Ptr,
-                         PseudoSourceValue::getFixedStack(FI), 0);
-    }
-    // Split the vector and convert each of the pieces now.
-    SplitVectorOp(InOp, Lo, Hi);
-    Lo = DAG.getNode(ISD::BIT_CONVERT, dl, NewVT_Lo, Lo);
-    Hi = DAG.getNode(ISD::BIT_CONVERT, dl, NewVT_Hi, Hi);
-    break;
-  }
-  }
-
-  // Remember in a map if the values will be reused later.
-  bool isNew =
-    SplitNodes.insert(std::make_pair(Op, std::make_pair(Lo, Hi))).second;
-  assert(isNew && "Value already split?!?");
-  isNew = isNew;
-}
-
-
-/// ScalarizeVectorOp - Given an operand of single-element vector type
-/// (e.g. v1f32), convert it into the equivalent operation that returns a
-/// scalar (e.g. f32) value.
-SDValue SelectionDAGLegalize::ScalarizeVectorOp(SDValue Op) {
-  assert(0 && "This should be dead!");
-  assert(Op.getValueType().isVector() && "Bad ScalarizeVectorOp invocation!");
-  SDNode *Node = Op.getNode();
-  DebugLoc dl = Node->getDebugLoc();
-  MVT NewVT = Op.getValueType().getVectorElementType();
-  assert(Op.getValueType().getVectorNumElements() == 1);
-
-  // See if we already scalarized it.
-  std::map<SDValue, SDValue>::iterator I = ScalarizedNodes.find(Op);
-  if (I != ScalarizedNodes.end()) return I->second;
-
-  SDValue Result;
-  switch (Node->getOpcode()) {
-  default:
-#ifndef NDEBUG
-    Node->dump(&DAG); cerr << "\n";
-#endif
-    assert(0 && "Unknown vector operation in ScalarizeVectorOp!");
-  case ISD::ADD:
-  case ISD::FADD:
-  case ISD::SUB:
-  case ISD::FSUB:
-  case ISD::MUL:
-  case ISD::FMUL:
-  case ISD::SDIV:
-  case ISD::UDIV:
-  case ISD::FDIV:
-  case ISD::SREM:
-  case ISD::UREM:
-  case ISD::FREM:
-  case ISD::FPOW:
-  case ISD::AND:
-  case ISD::OR:
-  case ISD::XOR:
-    Result = DAG.getNode(Node->getOpcode(), dl,
-                         NewVT,
-                         ScalarizeVectorOp(Node->getOperand(0)),
-                         ScalarizeVectorOp(Node->getOperand(1)));
-    break;
-  case ISD::FNEG:
-  case ISD::FABS:
-  case ISD::FSQRT:
-  case ISD::FSIN:
-  case ISD::FCOS:
-  case ISD::FLOG:
-  case ISD::FLOG2:
-  case ISD::FLOG10:
-  case ISD::FEXP:
-  case ISD::FEXP2:
-  case ISD::FP_TO_SINT:
-  case ISD::FP_TO_UINT:
-  case ISD::SINT_TO_FP:
-  case ISD::UINT_TO_FP:
-  case ISD::SIGN_EXTEND:
-  case ISD::ZERO_EXTEND:
-  case ISD::ANY_EXTEND:
-  case ISD::TRUNCATE:
-  case ISD::FP_EXTEND:
-    Result = DAG.getNode(Node->getOpcode(), dl,
-                         NewVT,
-                         ScalarizeVectorOp(Node->getOperand(0)));
-    break;
-  case ISD::CONVERT_RNDSAT: {
-    SDValue Op0 = ScalarizeVectorOp(Node->getOperand(0));
-    Result = DAG.getConvertRndSat(NewVT, dl, Op0,
-                                  DAG.getValueType(NewVT),
-                                  DAG.getValueType(Op0.getValueType()),
-                                  Node->getOperand(3),
-                                  Node->getOperand(4),
-                                  cast<CvtRndSatSDNode>(Node)->getCvtCode());
-    break;
-  }
-  case ISD::FPOWI:
-  case ISD::FP_ROUND:
-    Result = DAG.getNode(Node->getOpcode(), dl,
-                         NewVT,
-                         ScalarizeVectorOp(Node->getOperand(0)),
-                         Node->getOperand(1));
-    break;
-  case ISD::LOAD: {
-    LoadSDNode *LD = cast<LoadSDNode>(Node);
-    SDValue Ch = LegalizeOp(LD->getChain());     // Legalize the chain.
-    SDValue Ptr = LegalizeOp(LD->getBasePtr());  // Legalize the pointer.
-    ISD::LoadExtType ExtType = LD->getExtensionType();
-    const Value *SV = LD->getSrcValue();
-    int SVOffset = LD->getSrcValueOffset();
-    MVT MemoryVT = LD->getMemoryVT();
-    unsigned Alignment = LD->getAlignment();
-    bool isVolatile = LD->isVolatile();
-
-    assert(LD->isUnindexed() && "Indexed vector loads are not supported yet!");
-    SDValue Offset = DAG.getUNDEF(Ptr.getValueType());
-
-    Result = DAG.getLoad(ISD::UNINDEXED, dl, ExtType,
-                         NewVT, Ch, Ptr, Offset, SV, SVOffset,
-                         MemoryVT.getVectorElementType(),
-                         isVolatile, Alignment);
-
-    // Remember that we legalized the chain.
-    AddLegalizedOperand(Op.getValue(1), LegalizeOp(Result.getValue(1)));
-    break;
-  }
-  case ISD::BUILD_VECTOR:
-    Result = Node->getOperand(0);
-    break;
-  case ISD::INSERT_VECTOR_ELT:
-    // Returning the inserted scalar element.
-    Result = Node->getOperand(1);
-    break;
-  case ISD::CONCAT_VECTORS:
-    assert(Node->getOperand(0).getValueType() == NewVT &&
-           "Concat of non-legal vectors not yet supported!");
-    Result = Node->getOperand(0);
-    break;
-  case ISD::VECTOR_SHUFFLE: {
-    // Figure out if the scalar is the LHS or RHS and return it.
-    SDValue EltNum = Node->getOperand(2).getOperand(0);
-    if (cast<ConstantSDNode>(EltNum)->getZExtValue())
-      Result = ScalarizeVectorOp(Node->getOperand(1));
-    else
-      Result = ScalarizeVectorOp(Node->getOperand(0));
-    break;
-  }
-  case ISD::EXTRACT_SUBVECTOR:
-    Result = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT,
-                         Node->getOperand(0), Node->getOperand(1));
-    break;
-  case ISD::BIT_CONVERT: {
-    SDValue Op0 = Op.getOperand(0);
-    if (Op0.getValueType().isVector() &&
-        Op0.getValueType().getVectorNumElements() == 1)
-      Op0 = ScalarizeVectorOp(Op0);
-    Result = DAG.getNode(ISD::BIT_CONVERT, dl, NewVT, Op0);
-    break;
-  }
-  case ISD::SELECT:
-    Result = DAG.getNode(ISD::SELECT, dl, NewVT, Op.getOperand(0),
-                         ScalarizeVectorOp(Op.getOperand(1)),
-                         ScalarizeVectorOp(Op.getOperand(2)));
-    break;
-  case ISD::SELECT_CC:
-    Result = DAG.getNode(ISD::SELECT_CC, dl, NewVT, Node->getOperand(0),
-                         Node->getOperand(1),
-                         ScalarizeVectorOp(Op.getOperand(2)),
-                         ScalarizeVectorOp(Op.getOperand(3)),
-                         Node->getOperand(4));
-    break;
-  case ISD::VSETCC: {
-    SDValue Op0 = ScalarizeVectorOp(Op.getOperand(0));
-    SDValue Op1 = ScalarizeVectorOp(Op.getOperand(1));
-    Result = DAG.getNode(ISD::SETCC, dl,
-                         TLI.getSetCCResultType(Op0.getValueType()),
-                         Op0, Op1, Op.getOperand(2));
-    Result = DAG.getNode(ISD::SELECT, dl, NewVT, Result,
-                         DAG.getConstant(-1ULL, NewVT),
-                         DAG.getConstant(0ULL, NewVT));
-    break;
-  }
-  }
-
-  if (TLI.isTypeLegal(NewVT))
-    Result = LegalizeOp(Result);
-  bool isNew = ScalarizedNodes.insert(std::make_pair(Op, Result)).second;
-  assert(isNew && "Value already scalarized?");
-  isNew = isNew;
-  return Result;
-}
-
-
-SDValue SelectionDAGLegalize::WidenVectorOp(SDValue Op, MVT WidenVT) {
-  assert(0 && "This should be dead!");
-  std::map<SDValue, SDValue>::iterator I = WidenNodes.find(Op);
-  if (I != WidenNodes.end()) return I->second;
-
-  MVT VT = Op.getValueType();
-  assert(VT.isVector() && "Cannot widen non-vector type!");
-
-  SDValue Result;
-  SDNode *Node = Op.getNode();
-  DebugLoc dl = Node->getDebugLoc();
-  MVT EVT = VT.getVectorElementType();
-
-  unsigned NumElts = VT.getVectorNumElements();
-  unsigned NewNumElts = WidenVT.getVectorNumElements();
-  assert(NewNumElts > NumElts  && "Cannot widen to smaller type!");
-  assert(NewNumElts < 17);
-
-  // When widen is called, it is assumed that it is more efficient to use a
-  // wide type.  The default action is to widen to operation to a wider legal
-  // vector type and then do the operation if it is legal by calling LegalizeOp
-  // again.  If there is no vector equivalent, we will unroll the operation, do
-  // it, and rebuild the vector.  If most of the operations are vectorizible to
-  // the legal type, the resulting code will be more efficient.  If this is not
-  // the case, the resulting code will preform badly as we end up generating
-  // code to pack/unpack the results. It is the function that calls widen
-  // that is responsible for seeing this doesn't happen.
-  switch (Node->getOpcode()) {
-  default:
-#ifndef NDEBUG
-      Node->dump(&DAG);
-#endif
-      assert(0 && "Unexpected operation in WidenVectorOp!");
-      break;
-  case ISD::CopyFromReg:
-    assert(0 && "CopyFromReg doesn't need widening!");
-  case ISD::Constant:
-  case ISD::ConstantFP:
-    // To build a vector of these elements, clients should call BuildVector
-    // and with each element instead of creating a node with a vector type
-    assert(0 && "Unexpected operation in WidenVectorOp!");
-  case ISD::VAARG:
-    // Variable Arguments with vector types doesn't make any sense to me
-    assert(0 && "Unexpected operation in WidenVectorOp!");
-    break;
-  case ISD::UNDEF:
-    Result = DAG.getUNDEF(WidenVT);
-    break;
-  case ISD::BUILD_VECTOR: {
-    // Build a vector with undefined for the new nodes
-    SDValueVector NewOps(Node->op_begin(), Node->op_end());
-    for (unsigned i = NumElts; i < NewNumElts; ++i) {
-      NewOps.push_back(DAG.getUNDEF(EVT));
-    }
-    Result = DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT,
-                         &NewOps[0], NewOps.size());
-    break;
-  }
-  case ISD::INSERT_VECTOR_ELT: {
-    SDValue Tmp1 = WidenVectorOp(Node->getOperand(0), WidenVT);
-    Result = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, WidenVT, Tmp1,
-                         Node->getOperand(1), Node->getOperand(2));
-    break;
-  }
-  case ISD::VECTOR_SHUFFLE: {
-    SDValue Tmp1 = WidenVectorOp(Node->getOperand(0), WidenVT);
-    SDValue Tmp2 = WidenVectorOp(Node->getOperand(1), WidenVT);
-    ShuffleVectorSDNode *SVOp = cast<ShuffleVectorSDNode>(Node);
-    SmallVector<int, 8> NewMask;
-    for (unsigned i = 0; i < NumElts; ++i) {
-      int Idx = SVOp->getMaskElt(i);
-      if (Idx < (int)NumElts)
-        NewMask.push_back(Idx);
-      else
-        NewMask.push_back(Idx + NewNumElts - NumElts);
-    }
-    for (unsigned i = NumElts; i < NewNumElts; ++i)
-      NewMask.push_back(-1);
-    
-    Result = DAG.getVectorShuffle(WidenVT, dl, Tmp1, Tmp2, &NewMask[0]);
-    break;
-  }
-  case ISD::LOAD: {
-    // If the load widen returns true, we can use a single load for the
-    // vector.  Otherwise, it is returning a token factor for multiple
-    // loads.
-    SDValue TFOp;
-    if (LoadWidenVectorOp(Result, TFOp, Op, WidenVT))
-      AddLegalizedOperand(Op.getValue(1), LegalizeOp(TFOp.getValue(1)));
-    else
-      AddLegalizedOperand(Op.getValue(1), LegalizeOp(TFOp.getValue(0)));
-    break;
-  }
-
-  case ISD::BIT_CONVERT: {
-    SDValue Tmp1 = Node->getOperand(0);
-    // Converts between two different types so we need to determine
-    // the correct widen type for the input operand.
-    MVT InVT = Tmp1.getValueType();
-    unsigned WidenSize = WidenVT.getSizeInBits();
-    if (InVT.isVector()) {
-      MVT InEltVT = InVT.getVectorElementType();
-      unsigned InEltSize = InEltVT.getSizeInBits();
-      assert(WidenSize % InEltSize == 0 &&
-             "can not widen bit convert that are not multiple of element type");
-      MVT NewInWidenVT = MVT::getVectorVT(InEltVT, WidenSize / InEltSize);
-      Tmp1 = WidenVectorOp(Tmp1, NewInWidenVT);
-      assert(Tmp1.getValueType().getSizeInBits() == WidenVT.getSizeInBits());
-      Result = DAG.getNode(ISD::BIT_CONVERT, dl, WidenVT, Tmp1);
-    } else {
-      // If the result size is a multiple of the input size, widen the input
-      // and then convert.
-      unsigned InSize = InVT.getSizeInBits();
-      assert(WidenSize % InSize == 0 &&
-             "can not widen bit convert that are not multiple of element type");
-      unsigned NewNumElts = WidenSize / InSize;
-      SmallVector<SDValue, 16> Ops(NewNumElts);
-      SDValue UndefVal = DAG.getUNDEF(InVT);
-      Ops[0] = Tmp1;
-      for (unsigned i = 1; i < NewNumElts; ++i)
-        Ops[i] = UndefVal;
-
-      MVT NewInVT = MVT::getVectorVT(InVT, NewNumElts);
-      Result = DAG.getNode(ISD::BUILD_VECTOR, dl, NewInVT, &Ops[0], NewNumElts);
-      Result = DAG.getNode(ISD::BIT_CONVERT, dl, WidenVT, Result);
-    }
-    break;
-  }
-
-  case ISD::SINT_TO_FP:
-  case ISD::UINT_TO_FP:
-  case ISD::FP_TO_SINT:
-  case ISD::FP_TO_UINT:
-  case ISD::FP_ROUND: {
-    SDValue Tmp1 = Node->getOperand(0);
-    // Converts between two different types so we need to determine
-    // the correct widen type for the input operand.
-    MVT TVT = Tmp1.getValueType();
-    assert(TVT.isVector() && "can not widen non vector type");
-    MVT TEVT = TVT.getVectorElementType();
-    MVT TWidenVT =  MVT::getVectorVT(TEVT, NewNumElts);
-    Tmp1 = WidenVectorOp(Tmp1, TWidenVT);
-    assert(Tmp1.getValueType().getVectorNumElements() == NewNumElts);
-    Result = DAG.getNode(Node->getOpcode(), dl, WidenVT, Tmp1);
-    break;
-  }
-
-  case ISD::FP_EXTEND:
-    assert(0 && "Case not implemented.  Dynamically dead with 2 FP types!");
-  case ISD::TRUNCATE:
-  case ISD::SIGN_EXTEND:
-  case ISD::ZERO_EXTEND:
-  case ISD::ANY_EXTEND:
-  case ISD::SIGN_EXTEND_INREG:
-  case ISD::FABS:
-  case ISD::FNEG:
-  case ISD::FSQRT:
-  case ISD::FSIN:
-  case ISD::FCOS:
-  case ISD::CTPOP:
-  case ISD::CTTZ:
-  case ISD::CTLZ: {
-    // Unary op widening
-    SDValue Tmp1;
-    Tmp1 = WidenVectorOp(Node->getOperand(0), WidenVT);
-    assert(Tmp1.getValueType() == WidenVT);
-    Result = DAG.getNode(Node->getOpcode(), dl, WidenVT, Tmp1);
-    break;
-  }
-  case ISD::CONVERT_RNDSAT: {
-    SDValue RndOp = Node->getOperand(3);
-    SDValue SatOp = Node->getOperand(4);
-    SDValue SrcOp = Node->getOperand(0);
-
-    // Converts between two different types so we need to determine
-    // the correct widen type for the input operand.
-    MVT SVT = SrcOp.getValueType();
-    assert(SVT.isVector() && "can not widen non vector type");
-    MVT SEVT = SVT.getVectorElementType();
-    MVT SWidenVT =  MVT::getVectorVT(SEVT, NewNumElts);
-
-    SrcOp = WidenVectorOp(SrcOp, SWidenVT);
-    assert(SrcOp.getValueType() == WidenVT);
-    SDValue DTyOp = DAG.getValueType(WidenVT);
-    SDValue STyOp = DAG.getValueType(SrcOp.getValueType());
-    ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(Node)->getCvtCode();
-
-    Result = DAG.getConvertRndSat(WidenVT, dl, SrcOp, DTyOp, STyOp,
-                                  RndOp, SatOp, CvtCode);
-    break;
-  }
-  case ISD::FPOW:
-  case ISD::FPOWI:
-  case ISD::ADD:
-  case ISD::SUB:
-  case ISD::MUL:
-  case ISD::MULHS:
-  case ISD::MULHU:
-  case ISD::AND:
-  case ISD::OR:
-  case ISD::XOR:
-  case ISD::FADD:
-  case ISD::FSUB:
-  case ISD::FMUL:
-  case ISD::SDIV:
-  case ISD::SREM:
-  case ISD::FDIV:
-  case ISD::FREM:
-  case ISD::FCOPYSIGN:
-  case ISD::UDIV:
-  case ISD::UREM:
-  case ISD::BSWAP: {
-    // Binary op widening
-    SDValue Tmp1 = WidenVectorOp(Node->getOperand(0), WidenVT);
-    SDValue Tmp2 = WidenVectorOp(Node->getOperand(1), WidenVT);
-    assert(Tmp1.getValueType() == WidenVT && Tmp2.getValueType() == WidenVT);
-    Result = DAG.getNode(Node->getOpcode(), dl, WidenVT, Tmp1, Tmp2);
-    break;
-  }
-
-  case ISD::SHL:
-  case ISD::SRA:
-  case ISD::SRL: {
-    SDValue Tmp1 = WidenVectorOp(Node->getOperand(0), WidenVT);
-    assert(Tmp1.getValueType() == WidenVT);
-    SDValue ShOp = Node->getOperand(1);
-    MVT ShVT = ShOp.getValueType();
-    MVT NewShVT = MVT::getVectorVT(ShVT.getVectorElementType(),
-                                   WidenVT.getVectorNumElements());
-    ShOp = WidenVectorOp(ShOp, NewShVT);
-    assert(ShOp.getValueType() == NewShVT);
-    Result = DAG.getNode(Node->getOpcode(), dl, WidenVT, Tmp1, ShOp);
-    break;
-  }
-
-  case ISD::EXTRACT_VECTOR_ELT: {
-    SDValue Tmp1 = WidenVectorOp(Node->getOperand(0), WidenVT);
-    assert(Tmp1.getValueType() == WidenVT);
-    Result = DAG.getNode(Node->getOpcode(), dl, EVT, Tmp1, Node->getOperand(1));
-    break;
-  }
-  case ISD::CONCAT_VECTORS: {
-    // We concurrently support only widen on a multiple of the incoming vector.
-    // We could widen on a multiple of the incoming operand if necessary.
-    unsigned NumConcat = NewNumElts / NumElts;
-    assert(NewNumElts % NumElts == 0 && "Can widen only a multiple of vector");
-    SDValue UndefVal = DAG.getUNDEF(VT);
-    SmallVector<SDValue, 8> MOps;
-    MOps.push_back(Op);
-    for (unsigned i = 1; i != NumConcat; ++i) {
-      MOps.push_back(UndefVal);
-    }
-    Result = LegalizeOp(DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT,
-                                    &MOps[0], MOps.size()));
-    break;
-  }
-  case ISD::EXTRACT_SUBVECTOR: {
-    SDValue Tmp1 = Node->getOperand(0);
-    SDValue Idx = Node->getOperand(1);
-    ConstantSDNode *CIdx = dyn_cast<ConstantSDNode>(Idx);
-    if (CIdx && CIdx->getZExtValue() == 0) {
-      // Since we are access the start of the vector, the incoming
-      // vector type might be the proper.
-      MVT Tmp1VT = Tmp1.getValueType();
-      if (Tmp1VT == WidenVT)
-        return Tmp1;
-      else {
-        unsigned Tmp1VTNumElts = Tmp1VT.getVectorNumElements();
-        if (Tmp1VTNumElts < NewNumElts)
-          Result = WidenVectorOp(Tmp1, WidenVT);
-        else
-          Result = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, WidenVT, Tmp1, Idx);
-      }
-    } else if (NewNumElts % NumElts == 0) {
-      // Widen the extracted subvector.
-      unsigned NumConcat = NewNumElts / NumElts;
-      SDValue UndefVal = DAG.getUNDEF(VT);
-      SmallVector<SDValue, 8> MOps;
-      MOps.push_back(Op);
-      for (unsigned i = 1; i != NumConcat; ++i) {
-        MOps.push_back(UndefVal);
-      }
-      Result = LegalizeOp(DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT,
-                                      &MOps[0], MOps.size()));
-    } else {
-      assert(0 && "can not widen extract subvector");
-     // This could be implemented using insert and build vector but I would
-     // like to see when this happens.
-    }
-    break;
-  }
-
-  case ISD::SELECT: {
-    // Determine new condition widen type and widen
-    SDValue Cond1 = Node->getOperand(0);
-    MVT CondVT = Cond1.getValueType();
-    assert(CondVT.isVector() && "can not widen non vector type");
-    MVT CondEVT = CondVT.getVectorElementType();
-    MVT CondWidenVT =  MVT::getVectorVT(CondEVT, NewNumElts);
-    Cond1 = WidenVectorOp(Cond1, CondWidenVT);
-    assert(Cond1.getValueType() == CondWidenVT && "Condition not widen");
-
-    SDValue Tmp1 = WidenVectorOp(Node->getOperand(1), WidenVT);
-    SDValue Tmp2 = WidenVectorOp(Node->getOperand(2), WidenVT);
-    assert(Tmp1.getValueType() == WidenVT && Tmp2.getValueType() == WidenVT);
-    Result = DAG.getNode(Node->getOpcode(), dl, WidenVT, Cond1, Tmp1, Tmp2);
-    break;
-  }
-
-  case ISD::SELECT_CC: {
-    // Determine new condition widen type and widen
-    SDValue Cond1 = Node->getOperand(0);
-    SDValue Cond2 = Node->getOperand(1);
-    MVT CondVT = Cond1.getValueType();
-    assert(CondVT.isVector() && "can not widen non vector type");
-    assert(CondVT == Cond2.getValueType() && "mismatch lhs/rhs");
-    MVT CondEVT = CondVT.getVectorElementType();
-    MVT CondWidenVT =  MVT::getVectorVT(CondEVT, NewNumElts);
-    Cond1 = WidenVectorOp(Cond1, CondWidenVT);
-    Cond2 = WidenVectorOp(Cond2, CondWidenVT);
-    assert(Cond1.getValueType() == CondWidenVT &&
-           Cond2.getValueType() == CondWidenVT && "condition not widen");
-
-    SDValue Tmp1 = WidenVectorOp(Node->getOperand(2), WidenVT);
-    SDValue Tmp2 = WidenVectorOp(Node->getOperand(3), WidenVT);
-    assert(Tmp1.getValueType() == WidenVT && Tmp2.getValueType() == WidenVT &&
-           "operands not widen");
-    Result = DAG.getNode(Node->getOpcode(), dl, WidenVT, Cond1, Cond2, Tmp1,
-                         Tmp2, Node->getOperand(4));
-    break;
-  }
-  case ISD::VSETCC: {
-    // Determine widen for the operand
-    SDValue Tmp1 = Node->getOperand(0);
-    MVT TmpVT = Tmp1.getValueType();
-    assert(TmpVT.isVector() && "can not widen non vector type");
-    MVT TmpEVT = TmpVT.getVectorElementType();
-    MVT TmpWidenVT =  MVT::getVectorVT(TmpEVT, NewNumElts);
-    Tmp1 = WidenVectorOp(Tmp1, TmpWidenVT);
-    SDValue Tmp2 = WidenVectorOp(Node->getOperand(1), TmpWidenVT);
-    Result = DAG.getNode(Node->getOpcode(), dl, WidenVT, Tmp1, Tmp2,
-                         Node->getOperand(2));
-    break;
-  }
-  case ISD::ATOMIC_CMP_SWAP:
-  case ISD::ATOMIC_LOAD_ADD:
-  case ISD::ATOMIC_LOAD_SUB:
-  case ISD::ATOMIC_LOAD_AND:
-  case ISD::ATOMIC_LOAD_OR:
-  case ISD::ATOMIC_LOAD_XOR:
-  case ISD::ATOMIC_LOAD_NAND:
-  case ISD::ATOMIC_LOAD_MIN:
-  case ISD::ATOMIC_LOAD_MAX:
-  case ISD::ATOMIC_LOAD_UMIN:
-  case ISD::ATOMIC_LOAD_UMAX:
-  case ISD::ATOMIC_SWAP: {
-    // For now, we assume that using vectors for these operations don't make
-    // much sense so we just split it.  We return an empty result
-    SDValue X, Y;
-    SplitVectorOp(Op, X, Y);
-    return Result;
-    break;
-  }
-
-  } // end switch (Node->getOpcode())
-
-  assert(Result.getNode() && "Didn't set a result!");
-  if (Result != Op)
-    Result = LegalizeOp(Result);
-
-  AddWidenedOperand(Op, Result);
-  return Result;
-}
-
-// Utility function to find a legal vector type and its associated element
-// type from a preferred width and whose vector type must be the same size
-// as the VVT.
-//  TLI:   Target lowering used to determine legal types
-//  Width: Preferred width of element type
-//  VVT:   Vector value type whose size we must match.
-// Returns VecEVT and EVT - the vector type and its associated element type
-static void FindWidenVecType(const TargetLowering &TLI, unsigned Width, MVT VVT,
-                             MVT& EVT, MVT& VecEVT) {
-  // We start with the preferred width, make it a power of 2 and see if
-  // we can find a vector type of that width. If not, we reduce it by
-  // another power of 2.  If we have widen the type, a vector of bytes should
-  // always be legal.
-  assert(TLI.isTypeLegal(VVT));
-  unsigned EWidth = Width + 1;
-  do {
-    assert(EWidth > 0);
-    EWidth =  (1 << Log2_32(EWidth-1));
-    EVT = MVT::getIntegerVT(EWidth);
-    unsigned NumEVT = VVT.getSizeInBits()/EWidth;
-    VecEVT = MVT::getVectorVT(EVT, NumEVT);
-  } while (!TLI.isTypeLegal(VecEVT) ||
-           VVT.getSizeInBits() != VecEVT.getSizeInBits());
-}
-
-SDValue SelectionDAGLegalize::genWidenVectorLoads(SDValueVector& LdChain,
-                                                    SDValue   Chain,
-                                                    SDValue   BasePtr,
-                                                    const Value *SV,
-                                                    int         SVOffset,
-                                                    unsigned    Alignment,
-                                                    bool        isVolatile,
-                                                    unsigned    LdWidth,
-                                                    MVT         ResType,
-                                                    DebugLoc    dl) {
-  // We assume that we have good rules to handle loading power of two loads so
-  // we break down the operations to power of 2 loads.  The strategy is to
-  // load the largest power of 2 that we can easily transform to a legal vector
-  // and then insert into that vector, and the cast the result into the legal
-  // vector that we want.  This avoids unnecessary stack converts.
-  // TODO: If the Ldwidth is legal, alignment is the same as the LdWidth, and
-  //       the load is nonvolatile, we an use a wider load for the value.
-  // Find a vector length we can load a large chunk
-  MVT EVT, VecEVT;
-  unsigned EVTWidth;
-  FindWidenVecType(TLI, LdWidth, ResType, EVT, VecEVT);
-  EVTWidth = EVT.getSizeInBits();
-
-  SDValue LdOp = DAG.getLoad(EVT, dl, Chain, BasePtr, SV, SVOffset,
-                             isVolatile, Alignment);
-  SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VecEVT, LdOp);
-  LdChain.push_back(LdOp.getValue(1));
-
-  // Check if we can load the element with one instruction
-  if (LdWidth == EVTWidth) {
-    return DAG.getNode(ISD::BIT_CONVERT, dl, ResType, VecOp);
-  }
-
-  // The vector element order is endianness dependent.
-  unsigned Idx = 1;
-  LdWidth -= EVTWidth;
-  unsigned Offset = 0;
-
-  while (LdWidth > 0) {
-    unsigned Increment = EVTWidth / 8;
-    Offset += Increment;
-    BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
-                          DAG.getIntPtrConstant(Increment));
-
-    if (LdWidth < EVTWidth) {
-      // Our current type we are using is too large, use a smaller size by
-      // using a smaller power of 2
-      unsigned oEVTWidth = EVTWidth;
-      FindWidenVecType(TLI, LdWidth, ResType, EVT, VecEVT);
-      EVTWidth = EVT.getSizeInBits();
-      // Readjust position and vector position based on new load type
-      Idx = Idx * (oEVTWidth/EVTWidth);
-      VecOp = DAG.getNode(ISD::BIT_CONVERT, dl, VecEVT, VecOp);
-    }
-
-    SDValue LdOp = DAG.getLoad(EVT, dl, Chain, BasePtr, SV,
-                               SVOffset+Offset, isVolatile,
-                               MinAlign(Alignment, Offset));
-    LdChain.push_back(LdOp.getValue(1));
-    VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VecEVT, VecOp, LdOp,
-                        DAG.getIntPtrConstant(Idx++));
-
-    LdWidth -= EVTWidth;
-  }
-
-  return DAG.getNode(ISD::BIT_CONVERT, dl, ResType, VecOp);
-}
-
-bool SelectionDAGLegalize::LoadWidenVectorOp(SDValue& Result,
-                                             SDValue& TFOp,
-                                             SDValue Op,
-                                             MVT NVT) {
-  // TODO: Add support for ConcatVec and the ability to load many vector
-  //       types (e.g., v4i8).  This will not work when a vector register
-  //       to memory mapping is strange (e.g., vector elements are not
-  //       stored in some sequential order).
-
-  // It must be true that the widen vector type is bigger than where
-  // we need to load from.
-  LoadSDNode *LD = cast<LoadSDNode>(Op.getNode());
-  MVT LdVT = LD->getMemoryVT();
-  DebugLoc dl = LD->getDebugLoc();
-  assert(LdVT.isVector() && NVT.isVector());
-  assert(LdVT.getVectorElementType() == NVT.getVectorElementType());
-
-  // Load information
-  SDValue Chain = LD->getChain();
-  SDValue BasePtr = LD->getBasePtr();
-  int       SVOffset = LD->getSrcValueOffset();
-  unsigned  Alignment = LD->getAlignment();
-  bool      isVolatile = LD->isVolatile();
-  const Value *SV = LD->getSrcValue();
-  unsigned int LdWidth = LdVT.getSizeInBits();
-
-  // Load value as a large register
-  SDValueVector LdChain;
-  Result = genWidenVectorLoads(LdChain, Chain, BasePtr, SV, SVOffset,
-                               Alignment, isVolatile, LdWidth, NVT, dl);
-
-  if (LdChain.size() == 1) {
-    TFOp = LdChain[0];
-    return true;
-  }
-  else {
-    TFOp=DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
-                     &LdChain[0], LdChain.size());
-    return false;
-  }
-}
-
-
-void SelectionDAGLegalize::genWidenVectorStores(SDValueVector& StChain,
-                                                SDValue   Chain,
-                                                SDValue   BasePtr,
-                                                const Value *SV,
-                                                int         SVOffset,
-                                                unsigned    Alignment,
-                                                bool        isVolatile,
-                                                SDValue     ValOp,
-                                                unsigned    StWidth,
-                                                DebugLoc    dl) {
-  // Breaks the stores into a series of power of 2 width stores.  For any
-  // width, we convert the vector to the vector of element size that we
-  // want to store.  This avoids requiring a stack convert.
-
-  // Find a width of the element type we can store with
-  MVT VVT = ValOp.getValueType();
-  MVT EVT, VecEVT;
-  unsigned EVTWidth;
-  FindWidenVecType(TLI, StWidth, VVT, EVT, VecEVT);
-  EVTWidth = EVT.getSizeInBits();
-
-  SDValue VecOp = DAG.getNode(ISD::BIT_CONVERT, dl, VecEVT, ValOp);
-  SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EVT, VecOp,
-                            DAG.getIntPtrConstant(0));
-  SDValue StOp = DAG.getStore(Chain, dl, EOp, BasePtr, SV, SVOffset,
-                              isVolatile, Alignment);
-  StChain.push_back(StOp);
-
-  // Check if we are done
-  if (StWidth == EVTWidth) {
-    return;
-  }
-
-  unsigned Idx = 1;
-  StWidth -= EVTWidth;
-  unsigned Offset = 0;
-
-  while (StWidth > 0) {
-    unsigned Increment = EVTWidth / 8;
-    Offset += Increment;
-    BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
-                          DAG.getIntPtrConstant(Increment));
-
-    if (StWidth < EVTWidth) {
-      // Our current type we are using is too large, use a smaller size by
-      // using a smaller power of 2
-      unsigned oEVTWidth = EVTWidth;
-      FindWidenVecType(TLI, StWidth, VVT, EVT, VecEVT);
-      EVTWidth = EVT.getSizeInBits();
-      // Readjust position and vector position based on new load type
-      Idx = Idx * (oEVTWidth/EVTWidth);
-      VecOp = DAG.getNode(ISD::BIT_CONVERT, dl, VecEVT, VecOp);
-    }
-
-    EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EVT, VecOp,
-                      DAG.getIntPtrConstant(Idx++));
-    StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr, SV,
-                                   SVOffset + Offset, isVolatile,
-                                   MinAlign(Alignment, Offset)));
-    StWidth -= EVTWidth;
-  }
-}
-
-
-SDValue SelectionDAGLegalize::StoreWidenVectorOp(StoreSDNode *ST,
-                                                 SDValue Chain,
-                                                 SDValue BasePtr) {
-  // TODO: It might be cleaner if we can use SplitVector and have more legal
-  //        vector types that can be stored into memory (e.g., v4xi8 can
-  //        be stored as a word). This will not work when a vector register
-  //        to memory mapping is strange (e.g., vector elements are not
-  //        stored in some sequential order).
-
-  MVT StVT = ST->getMemoryVT();
-  SDValue ValOp = ST->getValue();
-  DebugLoc dl = ST->getDebugLoc();
-
-  // Check if we have widen this node with another value
-  std::map<SDValue, SDValue>::iterator I = WidenNodes.find(ValOp);
-  if (I != WidenNodes.end())
-    ValOp = I->second;
-
-  MVT VVT = ValOp.getValueType();
-
-  // It must be true that we the widen vector type is bigger than where
-  // we need to store.
-  assert(StVT.isVector() && VVT.isVector());
-  assert(StVT.bitsLT(VVT));
-  assert(StVT.getVectorElementType() == VVT.getVectorElementType());
-
-  // Store value
-  SDValueVector StChain;
-  genWidenVectorStores(StChain, Chain, BasePtr, ST->getSrcValue(),
-                       ST->getSrcValueOffset(), ST->getAlignment(),
-                       ST->isVolatile(), ValOp, StVT.getSizeInBits(), dl);
-  if (StChain.size() == 1)
-    return StChain[0];
-  else
-    return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
-                       &StChain[0], StChain.size());
-}
-
-
 // SelectionDAG::Legalize - This is the entry point for the file.
 //
 void SelectionDAG::Legalize(bool TypesNeedLegalizing,




From baldrick at free.fr  Tue May 26 04:11:32 2009
From: baldrick at free.fr (Duncan Sands)
Date: Tue, 26 May 2009 11:11:32 +0200
Subject: [llvm-commits] CVS:
 llvm-www/pubs/2009-05-21-Thesis-Barrett-3c.html
 2009-05-21-Thesis-Barrett-3c.pdf
In-Reply-To: <200905260105.n4Q15OKX010163@zion.cs.uiuc.edu>
References: <200905260105.n4Q15OKX010163@zion.cs.uiuc.edu>
Message-ID: <4A1BB244.4020605@free.fr>

Hi Chris,

> + The following report presents an investigation into designing and implementing com puter languages using a modern compiler construction tool-kit called the "Low Level Virtual Machine" (LLVM), in combination with a modern scripting language. The report covers in detail traditional approaches to compiler construction, parsing and virtual machine theory. Comparisons are made between traditional approaches and the modern approach offered by LLVM, via an experimental object oriented language called 3c, developed using LLVM, the Aperiot parser, Python and an incremental de velopment methodology.

com puter -> computer
de velopment -> development

Ciao,

Duncan.


From jay.foad at gmail.com  Tue May 26 08:54:00 2009
From: jay.foad at gmail.com (Jay Foad)
Date: Tue, 26 May 2009 14:54:00 +0100
Subject: [llvm-commits] [LLVMdev] Removing std::vector from APIs
Message-ID: <ee2e06e90905260654r323e3a87pe31707f01bee1ddf@mail.gmail.com>

2009/5/14 Chris Lattner <clattner at apple.com>:
> One minor thing is that?StructType::get(NULL, 0)?looks somewhat strange to
> me. ?How about adding a zero-argument version of "get" that returns the
> empty struct? ?That would allow code to use?StructType::get().

How about this? It adds:

FunctionType *FunctionType::get(const Type *Result, bool isVarArg);
StructType *StructType::get(bool isPacked = false);

.. although the latter isn't used much because I've preferred to use
Type::EmptyStructTy instead.

It passes "make check", cfe's "make test", and llvm-gcc still bootstraps.

Thanks,
Jay.
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From luked at cs.rochester.edu  Tue May 26 09:06:08 2009
From: luked at cs.rochester.edu (Luke Dalessandro)
Date: Tue, 26 May 2009 10:06:08 -0400
Subject: [llvm-commits] patch: CXAGuardElimination pass.
In-Reply-To: <4A1B55CE.10207@mxc.ca>
References: <4A1A1FBE.5090902@mxc.ca>	<f5aa3e9b0905242315o502181c5s73022ac119e856a0@mail.gmail.com>	<4A1A39C6.8080302@mxc.ca>	<f5aa3e9b0905242354y4d4fb03bxd371761314ebae87@mail.gmail.com>	<4A1B22D9.6000607@mxc.ca>	<f5aa3e9b0905251646o98c266fla67c071f40101a21@mail.gmail.com>	<4A1B352D.9050208@mxc.ca>	<f5aa3e9b0905251751j5cb2030ejc6ce216b9a038bc0@mail.gmail.com>
	<4A1B55CE.10207@mxc.ca>
Message-ID: <4A1BF750.4090705@cs.rochester.edu>

Nick Lewycky wrote:
> Eli Friedman wrote:
>> On Mon, May 25, 2009 at 5:17 PM, Nick Lewycky <nicholas at mxc.ca> wrote:
>>> Eli Friedman wrote:
>>>> On Mon, May 25, 2009 at 3:59 PM, Nick Lewycky <nicholas at mxc.ca> wrote:

[cut]

>>>> Ooh, that's right.  Actually, it gets nastier than that: suppose
>>>> something like the following:
>>>>
>>>> static int gval1 = 1;
>>>> int gval2 = 1;
>>>> struct A { A() { if (gval1) { printf("%d\n", gval2); } };
>>>> void a() { static A x(); gval2 = 0;}
>>>> void b() { a(); }
>>>> void c() { gval1 = 0; a(); }
>>>>
>>>> Then suppose b() and c() are called at the same time on separate
>>>> threads, and we've inlined/optimized everything; if the guard is
>>>> removed from c(), we can end up printing out "0", which shouldn't be
>>>> possible because setting gval2 to zero only happens after the
>>>> constructor for A finishes. 
>>>>
>>> Right. deadGuardElim checks for memory *reads* as well as writes and
>>> unwinds in order to prevent this sort of thing from happening. 
>>>
>> If a() gets inlined into c(), the load inside A() of gval1 can be
>> eliminated; I'm not sure if we do that particular optimization at the
>> moment, though.

This example has data races on gval1 and gval2. The LLVM VM doesn't have 
a memory model as far as I know, which basically means that all sorts of 
crazy things are allowed to happen to this code. Printing out 0 is 
probably fine. Even in something like the Java Memory Model printing out 
0 is fine, given the raciness of the code.

The main concern is if the __cxa_guard_acquire and release pair are 
supposed to have locking semantics. The Intel ABI says that they are 
"probably" implemented with locks, but doesn't really pin down any 
ordering semantics for them. It seems mandatory that any real 
implementation has to enforce some sort of synchronization to be correct 
-- even if it's nonblocking. This probably requires that you insert a 
memory fence if you remove the guards, or know the actual implementation 
of the library calls.

I don't have an example off-hand that triggers this behavior, but it's 
one of those traditional problems. The Java literature probably has some 
examples that are applicable.

> 
> Boo. We'll continue to have problems so long as we try to eliminate one 
> pair at a time, we need to either prove them all dead for a given guard 
> variable or not.
> 

You may be ok. You just need to make sure that you don't introduce a 
data race into an otherwise data-race-free program.

Luke

> Excellent review, by the way!
> 
> Nick
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From eli.friedman at gmail.com  Tue May 26 09:23:25 2009
From: eli.friedman at gmail.com (Eli Friedman)
Date: Tue, 26 May 2009 07:23:25 -0700
Subject: [llvm-commits] patch: CXAGuardElimination pass.
In-Reply-To: <4A1BF750.4090705@cs.rochester.edu>
References: <4A1A1FBE.5090902@mxc.ca>
	<f5aa3e9b0905242315o502181c5s73022ac119e856a0@mail.gmail.com>
	<4A1A39C6.8080302@mxc.ca>
	<f5aa3e9b0905242354y4d4fb03bxd371761314ebae87@mail.gmail.com>
	<4A1B22D9.6000607@mxc.ca>
	<f5aa3e9b0905251646o98c266fla67c071f40101a21@mail.gmail.com>
	<4A1B352D.9050208@mxc.ca>
	<f5aa3e9b0905251751j5cb2030ejc6ce216b9a038bc0@mail.gmail.com>
	<4A1B55CE.10207@mxc.ca> <4A1BF750.4090705@cs.rochester.edu>
Message-ID: <f5aa3e9b0905260723h615fdd66pb7792337b56a37dc@mail.gmail.com>

On Tue, May 26, 2009 at 7:06 AM, Luke Dalessandro
<luked at cs.rochester.edu> wrote:
> Nick Lewycky wrote:
>> Eli Friedman wrote:
>>> On Mon, May 25, 2009 at 5:17 PM, Nick Lewycky <nicholas at mxc.ca> wrote:
>>>> Eli Friedman wrote:
>>>>> On Mon, May 25, 2009 at 3:59 PM, Nick Lewycky <nicholas at mxc.ca> wrote:
>
> [cut]
>
>>>>> Ooh, that's right. ?Actually, it gets nastier than that: suppose
>>>>> something like the following:
>>>>>
>>>>> static int gval1 = 1;
>>>>> int gval2 = 1;
>>>>> struct A { A() { if (gval1) { printf("%d\n", gval2); } };
>>>>> void a() { static A x(); gval2 = 0;}
>>>>> void b() { a(); }
>>>>> void c() { gval1 = 0; a(); }
>>>>>
>>>>> Then suppose b() and c() are called at the same time on separate
>>>>> threads, and we've inlined/optimized everything; if the guard is
>>>>> removed from c(), we can end up printing out "0", which shouldn't be
>>>>> possible because setting gval2 to zero only happens after the
>>>>> constructor for A finishes.
>>>>>
>>>> Right. deadGuardElim checks for memory *reads* as well as writes and
>>>> unwinds in order to prevent this sort of thing from happening.
>>>>
>>> If a() gets inlined into c(), the load inside A() of gval1 can be
>>> eliminated; I'm not sure if we do that particular optimization at the
>>> moment, though.
>
> This example has data races on gval1 and gval2. The LLVM VM doesn't have
> a memory model as far as I know, which basically means that all sorts of
> crazy things are allowed to happen to this code. Printing out 0 is
> probably fine. Even in something like the Java Memory Model printing out
> 0 is fine, given the raciness of the code.

There is no race on gval2: both threads only set gval2 after "static A
x()" is fully constructed, and we don't care about the value at that
point.  The race of gval1 is irrelevant to the point; I left out
synchronization for it to simplify the example.

-Eli



From luked at cs.rochester.edu  Tue May 26 11:07:07 2009
From: luked at cs.rochester.edu (Luke Dalessandro)
Date: Tue, 26 May 2009 12:07:07 -0400
Subject: [llvm-commits] patch: CXAGuardElimination pass.
In-Reply-To: <f5aa3e9b0905260723h615fdd66pb7792337b56a37dc@mail.gmail.com>
References: <4A1A1FBE.5090902@mxc.ca>	<f5aa3e9b0905242315o502181c5s73022ac119e856a0@mail.gmail.com>	<4A1A39C6.8080302@mxc.ca>	<f5aa3e9b0905242354y4d4fb03bxd371761314ebae87@mail.gmail.com>	<4A1B22D9.6000607@mxc.ca>	<f5aa3e9b0905251646o98c266fla67c071f40101a21@mail.gmail.com>	<4A1B352D.9050208@mxc.ca>	<f5aa3e9b0905251751j5cb2030ejc6ce216b9a038bc0@mail.gmail.com>	<4A1B55CE.10207@mxc.ca>
	<4A1BF750.4090705@cs.rochester.edu>
	<f5aa3e9b0905260723h615fdd66pb7792337b56a37dc@mail.gmail.com>
Message-ID: <4A1C13AB.5090007@cs.rochester.edu>

Eli Friedman wrote:
> On Tue, May 26, 2009 at 7:06 AM, Luke Dalessandro
> <luked at cs.rochester.edu> wrote:
>> Nick Lewycky wrote:
>>> Eli Friedman wrote:
>>>> On Mon, May 25, 2009 at 5:17 PM, Nick Lewycky <nicholas at mxc.ca> wrote:
>>>>> Eli Friedman wrote:
>>>>>> On Mon, May 25, 2009 at 3:59 PM, Nick Lewycky <nicholas at mxc.ca> wrote:
>> [cut]
>>
>>>>>> Ooh, that's right.  Actually, it gets nastier than that: suppose
>>>>>> something like the following:
>>>>>>
>>>>>> static int gval1 = 1;
>>>>>> int gval2 = 1;
>>>>>> struct A { A() { if (gval1) { printf("%d\n", gval2); } };
>>>>>> void a() { static A x(); gval2 = 0;}
>>>>>> void b() { a(); }
>>>>>> void c() { gval1 = 0; a(); }
>>>>>>
>>>>>> Then suppose b() and c() are called at the same time on separate
>>>>>> threads, and we've inlined/optimized everything; if the guard is
>>>>>> removed from c(), we can end up printing out "0", which shouldn't be
>>>>>> possible because setting gval2 to zero only happens after the
>>>>>> constructor for A finishes.
>>>>>>
>>>>> Right. deadGuardElim checks for memory *reads* as well as writes and
>>>>> unwinds in order to prevent this sort of thing from happening.
>>>>>
>>>> If a() gets inlined into c(), the load inside A() of gval1 can be
>>>> eliminated; I'm not sure if we do that particular optimization at the
>>>> moment, though.
>> This example has data races on gval1 and gval2. The LLVM VM doesn't have
>> a memory model as far as I know, which basically means that all sorts of
>> crazy things are allowed to happen to this code. Printing out 0 is
>> probably fine. Even in something like the Java Memory Model printing out
>> 0 is fine, given the raciness of the code.
> 
> There is no race on gval2: both threads only set gval2 after "static A
> x()" is fully constructed, and we don't care about the value at that
> point.  The race of gval1 is irrelevant to the point; I left out
> synchronization for it to simplify the example.

Hi Eli,

I'm sorry that I wasn't clear.

I agree that if the cxa_guard routines are meant to have locking 
semantics, then there is no data race on gval2 (given a Java/C++0X-ish 
style synchronization model).

What I was trying to point out was that, if the cxa guards don't have a 
memory model synchronization component, then the transformation is fine, 
and the unexpected result is fine.

If the cxa guards to have a synchronization component, then it should be 
modeled as part of the guard call, i.e., the acquire call clobbers 
memory and serves as a compiler fence. Whatever the modeled memory 
behavior of gcc's __sync_lock_test_and_set is probably fine. This should 
suppress the optimization that eliminates the load inside of c() when 
the guarded constructor is inlined (or eliminates the load inside c() by 
hoisting the acquire over the store to gval1). I think this prevents 
guarded constructors that have side effects from becoming side effect 
free -- allowing the guard eliminator to run as coded.

I'm still pretty sure that removing guard pairs is likely to require 
leaving behind a compiler+hardware memory fence though, which will 
prevent future optimizations (and the hardware) from doing things they 
shouldn't.

Luke

> 
> -Eli
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From eli.friedman at gmail.com  Tue May 26 12:07:55 2009
From: eli.friedman at gmail.com (Eli Friedman)
Date: Tue, 26 May 2009 10:07:55 -0700
Subject: [llvm-commits] patch: CXAGuardElimination pass.
In-Reply-To: <4A1C13AB.5090007@cs.rochester.edu>
References: <4A1A1FBE.5090902@mxc.ca>
	<f5aa3e9b0905242354y4d4fb03bxd371761314ebae87@mail.gmail.com>
	<4A1B22D9.6000607@mxc.ca>
	<f5aa3e9b0905251646o98c266fla67c071f40101a21@mail.gmail.com>
	<4A1B352D.9050208@mxc.ca>
	<f5aa3e9b0905251751j5cb2030ejc6ce216b9a038bc0@mail.gmail.com>
	<4A1B55CE.10207@mxc.ca> <4A1BF750.4090705@cs.rochester.edu>
	<f5aa3e9b0905260723h615fdd66pb7792337b56a37dc@mail.gmail.com>
	<4A1C13AB.5090007@cs.rochester.edu>
Message-ID: <f5aa3e9b0905261007l34f1370eo893cb9de5a7ec93c@mail.gmail.com>

On Tue, May 26, 2009 at 9:07 AM, Luke Dalessandro
<luked at cs.rochester.edu> wrote:
> I agree that if the cxa_guard routines are meant to have locking
> semantics, then there is no data race on gval2 (given a Java/C++0X-ish
> style synchronization model).
>
> What I was trying to point out was that, if the cxa guards don't have a
> memory model synchronization component, then the transformation is fine,
> and the unexpected result is fine.

The fundamental thing that the guards guarantee is that the variable
is initialized before any of the code after the initialization is
executed.  That by itself seems like it should be enough.

> If the cxa guards to have a synchronization component, then it should be
> modeled as part of the guard call, i.e., the acquire call clobbers
> memory and serves as a compiler fence. Whatever the modeled memory
> behavior of gcc's __sync_lock_test_and_set is probably fine. This should
> suppress the optimization that eliminates the load inside of c() when
> the guarded constructor is inlined (or eliminates the load inside c() by
> hoisting the acquire over the store to gval1). I think this prevents
> guarded constructors that have side effects from becoming side effect
> free -- allowing the guard eliminator to run as coded.

The optimization in question works as follows: gval1 is an internal
variable whose address is never taken with a single store to the
variable.  The store dominates the load inside the inlined
constructor.  Therefore, the store's value can be propagated into the
constructor.  No amount of messing with the memory model changes that.

> I'm still pretty sure that removing guard pairs is likely to require
> leaving behind a compiler+hardware memory fence though, which will
> prevent future optimizations (and the hardware) from doing things they
> shouldn't.

Hmm, possibly.

-Eli


From daniel at zuster.org  Tue May 26 12:26:19 2009
From: daniel at zuster.org (Daniel Dunbar)
Date: Tue, 26 May 2009 17:26:19 -0000
Subject: [llvm-commits] [test-suite] r72421 -
 /test-suite/trunk/SingleSource/UnitTests/ObjC/parameter-passing.m
Message-ID: <200905261726.n4QHQJuX026952@zion.cs.uiuc.edu>

Author: ddunbar
Date: Tue May 26 12:26:19 2009
New Revision: 72421

URL: http://llvm.org/viewvc/llvm-project?rev=72421&view=rev
Log:
Fix format code for printing long long

Modified:
    test-suite/trunk/SingleSource/UnitTests/ObjC/parameter-passing.m

Modified: test-suite/trunk/SingleSource/UnitTests/ObjC/parameter-passing.m
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/ObjC/parameter-passing.m?rev=72421&r1=72420&r2=72421&view=diff

==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/ObjC/parameter-passing.m (original)
+++ test-suite/trunk/SingleSource/UnitTests/ObjC/parameter-passing.m Tue May 26 12:26:19 2009
@@ -92,14 +92,14 @@
 
 -(void) unary_ll: (long long) a0 {
   D(__FUNCTION__);
-  printf("\ta0: %ld\n",  a0);
+  printf("\ta0: %lld\n",  a0);
   self.ll_ivar = a0;
 }
 
 -(long long) return_ll {
   D(__FUNCTION__);
   long long rv = self.ll_ivar;
-  printf("\t  returning: %ld\n", rv);
+  printf("\t  returning: %lld\n", rv);
   return rv;
 }
 
@@ -220,7 +220,7 @@
   }
   {
     long long rv = [a return_ll];
-    printf("\tresult: %ld\n\n", rv);
+    printf("\tresult: %lld\n\n", rv);
     assert(rv == ll_test_var);
   }
   {




From gohman at apple.com  Tue May 26 12:41:16 2009
From: gohman at apple.com (Dan Gohman)
Date: Tue, 26 May 2009 17:41:16 -0000
Subject: [llvm-commits] [llvm] r72422 - in /llvm/trunk:
 lib/Analysis/ScalarEvolutionExpander.cpp
 test/Transforms/IndVarSimplify/divide-pointer.ll
Message-ID: <200905261741.n4QHfGlU027748@zion.cs.uiuc.edu>

Author: djg
Date: Tue May 26 12:41:16 2009
New Revision: 72422

URL: http://llvm.org/viewvc/llvm-project?rev=72422&view=rev
Log:
In cases where a pointer value is an operand of a multiplication or
division operation, don't attempt to use the operation's value as
the base of a getelementptr. This fixes PR4271.

Added:
    llvm/trunk/test/Transforms/IndVarSimplify/divide-pointer.ll
Modified:
    llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp

Modified: llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp?rev=72422&r1=72421&r2=72422&view=diff

==============================================================================
--- llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp (original)
+++ llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp Tue May 26 12:41:16 2009
@@ -448,9 +448,14 @@
       ExposePointerBase(Base, RestArray[0], SE);
       // If we found a pointer, expand the AddRec with a GEP.
       if (const PointerType *PTy = dyn_cast<PointerType>(Base->getType())) {
-        Value *StartV = expand(Base);
-        assert(StartV->getType() == PTy && "Pointer type mismatch for GEP!");
-        return expandAddToGEP(RestArray, RestArray+1, PTy, Ty, StartV);
+        // Make sure the Base isn't something exotic, such as a multiplied
+        // or divided pointer value. In those cases, the result type isn't
+        // actually a pointer type.
+        if (!isa<SCEVMulExpr>(Base) && !isa<SCEVUDivExpr>(Base)) {
+          Value *StartV = expand(Base);
+          assert(StartV->getType() == PTy && "Pointer type mismatch for GEP!");
+          return expandAddToGEP(RestArray, RestArray+1, PTy, Ty, StartV);
+        }
       }
     }
 

Added: llvm/trunk/test/Transforms/IndVarSimplify/divide-pointer.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IndVarSimplify/divide-pointer.ll?rev=72422&view=auto

==============================================================================
--- llvm/trunk/test/Transforms/IndVarSimplify/divide-pointer.ll (added)
+++ llvm/trunk/test/Transforms/IndVarSimplify/divide-pointer.ll Tue May 26 12:41:16 2009
@@ -0,0 +1,95 @@
+; RUN: llvm-as < %s | opt -indvars
+; PR4271
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin10.0"
+	%struct.xyz = type <{ i64, i64, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, [8 x i8], i64, i64, i32, i32, [4 x i32], i32, i32, i32, i32, i32, i32, [76 x i32], i32, [2 x %struct.uvw] }>
+	%struct.uvw = type <{ i64, i64 }>
+
+define i32 @foo(%struct.xyz* %header, i8* %p2, i8* %p3, i8* nocapture %p4) nounwind {
+entry:
+	br label %while.body.i
+
+while.body.i:		; preds = %while.body.i, %entry
+	br i1 undef, label %while.body.i, label %bcopy_internal.exit
+
+bcopy_internal.exit:		; preds = %while.body.i
+	%conv135 = ptrtoint %struct.xyz* %header to i32		; <i32> [#uses=1]
+	%shr136 = lshr i32 %conv135, 12		; <i32> [#uses=1]
+	br label %for.body
+
+for.body:		; preds = %for.body, %bcopy_internal.exit
+	%ppnum.052 = phi i32 [ %inc, %for.body ], [ %shr136, %bcopy_internal.exit ]		; <i32> [#uses=1]
+	%inc = add i32 %ppnum.052, 1		; <i32> [#uses=2]
+	%cmp = icmp ugt i32 %inc, undef		; <i1> [#uses=1]
+	br i1 %cmp, label %if.then199, label %for.body
+
+if.then199:		; preds = %if.then199, %for.body
+	br label %if.then199
+}
+
+define i32 @same_thing_but_signed(%struct.xyz* %header, i8* %p2, i8* %p3, i8* nocapture %p4) nounwind {
+entry:
+	br label %while.body.i
+
+while.body.i:		; preds = %while.body.i, %entry
+	br i1 undef, label %while.body.i, label %bcopy_internal.exit
+
+bcopy_internal.exit:		; preds = %while.body.i
+	%conv135 = ptrtoint %struct.xyz* %header to i32		; <i32> [#uses=1]
+	%shr136 = ashr i32 %conv135, 12		; <i32> [#uses=1]
+	br label %for.body
+
+for.body:		; preds = %for.body, %bcopy_internal.exit
+	%ppnum.052 = phi i32 [ %inc, %for.body ], [ %shr136, %bcopy_internal.exit ]		; <i32> [#uses=1]
+	%inc = add i32 %ppnum.052, 1		; <i32> [#uses=2]
+	%cmp = icmp ugt i32 %inc, undef		; <i1> [#uses=1]
+	br i1 %cmp, label %if.then199, label %for.body
+
+if.then199:		; preds = %if.then199, %for.body
+	br label %if.then199
+}
+
+define i32 @same_thing_but_multiplied(%struct.xyz* %header, i8* %p2, i8* %p3, i8* nocapture %p4) nounwind {
+entry:
+	br label %while.body.i
+
+while.body.i:		; preds = %while.body.i, %entry
+	br i1 undef, label %while.body.i, label %bcopy_internal.exit
+
+bcopy_internal.exit:		; preds = %while.body.i
+	%conv135 = ptrtoint %struct.xyz* %header to i32		; <i32> [#uses=1]
+	%shr136 = shl i32 %conv135, 12		; <i32> [#uses=1]
+	br label %for.body
+
+for.body:		; preds = %for.body, %bcopy_internal.exit
+	%ppnum.052 = phi i32 [ %inc, %for.body ], [ %shr136, %bcopy_internal.exit ]		; <i32> [#uses=1]
+	%inc = add i32 %ppnum.052, 1		; <i32> [#uses=2]
+	%cmp = icmp ugt i32 %inc, undef		; <i1> [#uses=1]
+	br i1 %cmp, label %if.then199, label %for.body
+
+if.then199:		; preds = %if.then199, %for.body
+	br label %if.then199
+}
+
+define i32 @same_thing_but_xored(%struct.xyz* %header, i8* %p2, i8* %p3, i8* nocapture %p4) nounwind {
+entry:
+	br label %while.body.i
+
+while.body.i:		; preds = %while.body.i, %entry
+	br i1 undef, label %while.body.i, label %bcopy_internal.exit
+
+bcopy_internal.exit:		; preds = %while.body.i
+	%conv135 = ptrtoint %struct.xyz* %header to i32		; <i32> [#uses=1]
+	%shr136 = xor i32 %conv135, 12		; <i32> [#uses=1]
+	br label %for.body
+
+for.body:		; preds = %for.body, %bcopy_internal.exit
+	%ppnum.052 = phi i32 [ %inc, %for.body ], [ %shr136, %bcopy_internal.exit ]		; <i32> [#uses=1]
+	%inc = add i32 %ppnum.052, 1		; <i32> [#uses=2]
+	%cmp = icmp ugt i32 %inc, undef		; <i1> [#uses=1]
+	br i1 %cmp, label %if.then199, label %for.body
+
+if.then199:		; preds = %if.then199, %for.body
+	br label %if.then199
+}




From gohman at apple.com  Tue May 26 12:42:33 2009
From: gohman at apple.com (Dan Gohman)
Date: Tue, 26 May 2009 17:42:33 -0000
Subject: [llvm-commits] [llvm] r72423 -
 /llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h
Message-ID: <200905261742.n4QHgXHN027828@zion.cs.uiuc.edu>

Author: djg
Date: Tue May 26 12:42:32 2009
New Revision: 72423

URL: http://llvm.org/viewvc/llvm-project?rev=72423&view=rev
Log:
Give SCEVNaryExpr a doxygen comment.

Modified:
    llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h

Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h?rev=72423&r1=72422&r2=72423&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h (original)
+++ llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpressions.h Tue May 26 12:42:32 2009
@@ -194,6 +194,10 @@
   };
 
 
+  //===--------------------------------------------------------------------===//
+  /// SCEVNAryExpr - This node is a base class providing common
+  /// functionality for n'ary operators.
+  ///
   class SCEVNAryExpr : public SCEV {
   protected:
     std::vector<SCEVHandle> Operands;




From gohman at apple.com  Tue May 26 12:44:05 2009
From: gohman at apple.com (Dan Gohman)
Date: Tue, 26 May 2009 17:44:05 -0000
Subject: [llvm-commits] [llvm] r72424 -
	/llvm/trunk/lib/Analysis/ScalarEvolution.cpp
Message-ID: <200905261744.n4QHi5TP027887@zion.cs.uiuc.edu>

Author: djg
Date: Tue May 26 12:44:05 2009
New Revision: 72424

URL: http://llvm.org/viewvc/llvm-project?rev=72424&view=rev
Log:
For the return type of SCEVUDivExpr, use the RHS' type instead of
that of the LHS. It doesn't matter for correctness, but the LHS
is more likely than the RHS to be a pointer type in exotic cases,
and it's more tidy to have it return the integer type.

Modified:
    llvm/trunk/lib/Analysis/ScalarEvolution.cpp

Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=72424&r1=72423&r2=72424&view=diff

==============================================================================
--- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original)
+++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Tue May 26 12:44:05 2009
@@ -346,7 +346,12 @@
 }
 
 const Type *SCEVUDivExpr::getType() const {
-  return LHS->getType();
+  // In most cases the types of LHS and RHS will be the same, but in some
+  // crazy cases one or the other may be a pointer. ScalarEvolution doesn't
+  // depend on the type for correctness, but handling types carefully can
+  // avoid extra casts in the SCEVExpander. The LHS is more likely to be
+  // a pointer type than the RHS, so use the RHS' type here.
+  return RHS->getType();
 }
 
 // SCEVAddRecExprs - Only allow the creation of one SCEVAddRecExpr for any




From jyasskin at google.com  Tue May 26 13:14:53 2009
From: jyasskin at google.com (Jeffrey Yasskin)
Date: Tue, 26 May 2009 11:14:53 -0700
Subject: [llvm-commits] Avoid O(#registers*#basicblocks) memory use in
	LiveVariables
In-Reply-To: <363EF47E-1FBE-4A8B-873C-B6B667B26388@apple.com>
References: <bb55930e0905221541y51948ebaq3ab3e95e7385ec13@mail.gmail.com>
	<C9BE72BF-4E69-4D8F-8962-73F9FD600D33@apple.com>
	<bb55930e0905221637s5ee120bs2c255adb448a3bc0@mail.gmail.com>
	<8FEB6CFA-7992-46CD-BE02-789B1344DF90@apple.com>
	<fa28b9250905222107n7fd1db88s36509f5666e35bdf@mail.gmail.com>
	<363EF47E-1FBE-4A8B-873C-B6B667B26388@apple.com>
Message-ID: <bb55930e0905261114t1b889e8ah2eb99f5197c350b6@mail.gmail.com>

On Mon, May 25, 2009 at 7:30 PM, Evan Cheng <evan.cheng at apple.com> wrote:
>
> On May 22, 2009, at 9:07 PM, me22 wrote:
>
>> 2009/5/22 Evan Cheng <evan.cheng at apple.com>:
>>>
>>> I can see the potential for both of those issues. Perhaps you can
>>> specialize SparseBitVector with a smaller element size to reduce
>>> memory usage? As for compile time cost, can you measure it by return
>>> through the llvm test suite?
>>>
>>
>> I'd be wary of decreasing the element size any more.
>>
>> I wrote up a quick test (attached) that suggests that on 64-bit linux
>> only a third of the node is actually holding data right now. (The
>> overhead from sparsity and linked list pointers is the other
>> two-thirds.) ?And on whatever platform codepad.org runs (I think VC++
>> Win32), only a quarter of the memory is actually holding bits, and
>> ElementSize could actually be increased to 160 without changing the
>> amount of memory that new actually allocates per node. ?32-bit linux
>> seems to have the best ratio, with half of it useful.
>>
>> I don't know the pattern of sparsity in LiveVariables, but I'd
>> actually argue for trying increasing it.
>>
>> Also, you might try using unsigned int for the BitWord in the
>> SparseBitVectorElement (instead of unsigned long), as on 64-bit it
>> would keep you from wasting the padding after the ElementIndex. ?It
>> should just involve changing the typedef, but could also slow things
>> down a bit since Elements would no longer be a power of two. ?No idea
>> whether that'd be noticable over the pointer-following overhead,
>> though.
>>
>> Or I suppose, depending on the way the numbering it implemented, it
>> might be even better to have some kind of range container instead...
>
> Thanks for doing the analysis. I think it all point to just leaving
> ElementSize along is probably fine.

Thanks! I'll submit the AliveBlocks part now then, since you've
removed UsedBlocks.

Jeffrey



From gohman at apple.com  Tue May 26 13:16:38 2009
From: gohman at apple.com (Dan Gohman)
Date: Tue, 26 May 2009 11:16:38 -0700
Subject: [llvm-commits] [llvm] r72325 - in /llvm/trunk:
	include/llvm/CodeGen/SelectionDAG.h
	lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
	lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
In-Reply-To: <2E4DA060-7225-419D-AB83-0E5FF6FAA7DE@apple.com>
References: <200905231235.n4NCZgvT018589@zion.cs.uiuc.edu>
	<2E4DA060-7225-419D-AB83-0E5FF6FAA7DE@apple.com>
Message-ID: <2E9711FA-3B6A-482E-B8BA-FFCC56BE93FB@apple.com>


On May 25, 2009, at 4:12 PM, Chris Lattner wrote:

>>
>>
>> +// This file implements the SelectionDAG::LegalizeVectors method.
>>
>> +//
>>
>> +// The vector legalizer looks for vector operations which might
>>
>> need to be
>>
>> +// unrolled and legalizes them.
>>
>
> s/unroll/scalarize/g?  This should never do any "splitting" of
> vectors, right?

No; unrolling is different than scalarizing, in Legalize jargon.
Scalarizing is turning a single-element vector with an illegal
type into a scalar. Unrolling is turning a (potentially)
multiple-element vector with a legal type into a flock of scalars
in order to perform an operation on them which is not legal on
the vector type.

Feel free to suggest a better name if you can think of one that
doesn't involve the words "split", "scalarize", or "expand". :-)

Dan



From jyasskin at google.com  Tue May 26 13:27:15 2009
From: jyasskin at google.com (Jeffrey Yasskin)
Date: Tue, 26 May 2009 18:27:15 -0000
Subject: [llvm-commits] [llvm] r72426 - in /llvm/trunk:
 include/llvm/CodeGen/LiveVariables.h lib/CodeGen/LiveIntervalAnalysis.cpp
 lib/CodeGen/LiveVariables.cpp lib/CodeGen/PHIElimination.cpp
Message-ID: <200905261827.n4QIRGr7029686@zion.cs.uiuc.edu>

Author: jyasskin
Date: Tue May 26 13:27:15 2009
New Revision: 72426

URL: http://llvm.org/viewvc/llvm-project?rev=72426&view=rev
Log:
LiveVariables::VarInfo contains an AliveBlocks BitVector, which has as many
entries as there are basic blocks in the function.  LiveVariables::getVarInfo
creates a VarInfo struct for every register in the function, leading to
quadratic space use.  This patch changes the BitVector to a SparseBitVector,
which doesn't help the worst-case memory use but does reduce the actual use in
very long functions with short-lived variables.

Modified:
    llvm/trunk/include/llvm/CodeGen/LiveVariables.h
    llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
    llvm/trunk/lib/CodeGen/LiveVariables.cpp
    llvm/trunk/lib/CodeGen/PHIElimination.cpp

Modified: llvm/trunk/include/llvm/CodeGen/LiveVariables.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveVariables.h?rev=72426&r1=72425&r2=72426&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/LiveVariables.h (original)
+++ llvm/trunk/include/llvm/CodeGen/LiveVariables.h Tue May 26 13:27:15 2009
@@ -33,6 +33,7 @@
 #include "llvm/ADT/BitVector.h"
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/SmallVector.h"
+#include "llvm/ADT/SparseBitVector.h"
 
 namespace llvm {
 
@@ -75,7 +76,7 @@
     /// through.  This is a bit set which uses the basic block number as an
     /// index.
     ///
-    BitVector AliveBlocks;
+    SparseBitVector<> AliveBlocks;
 
     /// NumUses - Number of uses of this register across the entire function.
     ///

Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=72426&r1=72425&r2=72426&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Tue May 26 13:27:15 2009
@@ -422,7 +422,7 @@
       // If the kill happens after the definition, we have an intra-block
       // live range.
       if (killIdx > defIndex) {
-        assert(vi.AliveBlocks.none() &&
+        assert(vi.AliveBlocks.empty() &&
                "Shouldn't be alive across any blocks!");
         LiveRange LR(defIndex, killIdx, ValNo);
         interval.addRange(LR);
@@ -443,10 +443,10 @@
     // Iterate over all of the blocks that the variable is completely
     // live in, adding [insrtIndex(begin), instrIndex(end)+4) to the
     // live interval.
-    for (int i = vi.AliveBlocks.find_first(); i != -1;
-         i = vi.AliveBlocks.find_next(i)) {
-      LiveRange LR(getMBBStartIdx(i),
-                   getMBBEndIdx(i)+1,  // MBB ends at -1.
+    for (SparseBitVector<>::iterator I = vi.AliveBlocks.begin(), 
+             E = vi.AliveBlocks.end(); I != E; ++I) {
+      LiveRange LR(getMBBStartIdx(*I),
+                   getMBBEndIdx(*I)+1,  // MBB ends at -1.
                    ValNo);
       interval.addRange(LR);
       DOUT << " +" << LR;

Modified: llvm/trunk/lib/CodeGen/LiveVariables.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveVariables.cpp?rev=72426&r1=72425&r2=72426&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/LiveVariables.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveVariables.cpp Tue May 26 13:27:15 2009
@@ -52,8 +52,9 @@
 
 void LiveVariables::VarInfo::dump() const {
   cerr << "  Alive in blocks: ";
-  for (int i = AliveBlocks.find_first(); i != -1; i = AliveBlocks.find_next(i))
-    cerr << i << ", ";
+  for (SparseBitVector<>::iterator I = AliveBlocks.begin(),
+           E = AliveBlocks.end(); I != E; ++I)
+    cerr << *I << ", ";
   cerr << "\n  Killed by:";
   if (Kills.empty())
     cerr << " No instructions.\n";
@@ -75,9 +76,7 @@
     else
       VirtRegInfo.resize(2*VirtRegInfo.size());
   }
-  VarInfo &VI = VirtRegInfo[RegIdx];
-  VI.AliveBlocks.resize(MF->getNumBlockIDs());
-  return VI;
+  return VirtRegInfo[RegIdx];
 }
 
 void LiveVariables::MarkVirtRegAliveInBlock(VarInfo& VRInfo,
@@ -96,11 +95,11 @@
   
   if (MBB == DefBlock) return;  // Terminate recursion
 
-  if (VRInfo.AliveBlocks[BBNum])
+  if (VRInfo.AliveBlocks.test(BBNum))
     return;  // We already know the block is live
 
   // Mark the variable known alive in this bb
-  VRInfo.AliveBlocks[BBNum] = true;
+  VRInfo.AliveBlocks.set(BBNum);
 
   for (MachineBasicBlock::const_pred_reverse_iterator PI = MBB->pred_rbegin(),
          E = MBB->pred_rend(); PI != E; ++PI)
@@ -163,7 +162,7 @@
   // Add a new kill entry for this basic block. If this virtual register is
   // already marked as alive in this basic block, that means it is alive in at
   // least one of the successor blocks, it's not a kill.
-  if (!VRInfo.AliveBlocks[BBNum])
+  if (!VRInfo.AliveBlocks.test(BBNum))
     VRInfo.Kills.push_back(MI);
 
   // Update all dominating blocks to mark them as "known live".
@@ -175,7 +174,7 @@
 void LiveVariables::HandleVirtRegDef(unsigned Reg, MachineInstr *MI) {
   VarInfo &VRInfo = getVarInfo(Reg);
 
-  if (VRInfo.AliveBlocks.none())
+  if (VRInfo.AliveBlocks.empty())
     // If vr is not alive in any block, then defaults to dead.
     VRInfo.Kills.push_back(MI);
 }

Modified: llvm/trunk/lib/CodeGen/PHIElimination.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PHIElimination.cpp?rev=72426&r1=72425&r2=72426&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/PHIElimination.cpp (original)
+++ llvm/trunk/lib/CodeGen/PHIElimination.cpp Tue May 26 13:27:15 2009
@@ -334,8 +334,7 @@
 
       // Is it alive in this successor?
       unsigned SuccIdx = SuccMBB->getNumber();
-      if (SuccIdx < InRegVI.AliveBlocks.size() &&
-          InRegVI.AliveBlocks[SuccIdx]) {
+      if (InRegVI.AliveBlocks.test(SuccIdx)) {
         ValueIsLive = true;
         break;
       }
@@ -407,8 +406,7 @@
 
       // This vreg no longer lives all of the way through opBlock.
       unsigned opBlockNum = opBlock.getNumber();
-      if (opBlockNum < InRegVI.AliveBlocks.size())
-        InRegVI.AliveBlocks[opBlockNum] = false;
+      InRegVI.AliveBlocks.reset(opBlockNum);
     }
   }
     




From daniel at zuster.org  Tue May 26 13:32:35 2009
From: daniel at zuster.org (Daniel Dunbar)
Date: Tue, 26 May 2009 18:32:35 -0000
Subject: [llvm-commits] [test-suite] r72427 -
	/test-suite/trunk/Makefile.programs
Message-ID: <200905261832.n4QIWZue029900@zion.cs.uiuc.edu>

Author: ddunbar
Date: Tue May 26 13:32:34 2009
New Revision: 72427

URL: http://llvm.org/viewvc/llvm-project?rev=72427&view=rev
Log:
Unbreak nightlytest JIT results.
 - EXTRA_LLIFLAGS needs to always be present in {LLI,JIT}_OPTS, since the
   nightlytest report Makefile expects to be able to rebind it later for forcing
   statistics output.

Modified:
    test-suite/trunk/Makefile.programs

Modified: test-suite/trunk/Makefile.programs
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Makefile.programs?rev=72427&r1=72426&r2=72427&view=diff

==============================================================================
--- test-suite/trunk/Makefile.programs (original)
+++ test-suite/trunk/Makefile.programs Tue May 26 13:32:34 2009
@@ -433,6 +433,8 @@
 # Rules to execute the program
 #
 
+# Note, these must be lazily expanded by make (for EXTRA_LLIFLAGS to work, it is
+# redefined in other Makefiles).
 LLI_OPTS = -force-interpreter=true --disable-core-files
 JIT_OPTS = -force-interpreter=false --disable-core-files
 
@@ -447,10 +449,14 @@
 LLI_OPTS += $(TARGET_LLIFLAGS)
 JIT_OPTS += $(TARGET_LLIFLAGS)
 endif
-ifdef EXTRA_LLIFLAGS
+
+# EXTRA_LLIFLAGS is used by the nighly tester to add arugments to invocations of
+# the JIT and LLI in order to get timing info and statistics.
+ifndef EXTRA_LLIFLAGS
+EXTRA_LLIFLAGS =
+endif
 LLI_OPTS += $(EXTRA_LLIFLAGS)
 JIT_OPTS += $(EXTRA_LLIFLAGS)
-endif
 
 # If the program requires exception handling support, enable (potentially
 # expensive) support for it.




From edwintorok at gmail.com  Tue May 26 14:11:47 2009
From: edwintorok at gmail.com (Torok Edwin)
Date: Tue, 26 May 2009 19:11:47 -0000
Subject: [llvm-commits] [llvm] r72430 - /llvm/trunk/Makefile.rules
Message-ID: <200905261911.n4QJBlP8031406@zion.cs.uiuc.edu>

Author: edwin
Date: Tue May 26 14:11:47 2009
New Revision: 72430

URL: http://llvm.org/viewvc/llvm-project?rev=72430&view=rev
Log:
For the new ar --plugin libLLVMgold.so to work we need libLTO linked with
pthreads, otherwise ar complains of unresolved references to pthread_mutex_*.
LTO doesn't actually use pthreads, but ManagedStatic does.

Fix this by linking in LIBS (that contains pthreads) for LTO and gold.
For now this links in more libs than needed (libffi for example), we can figure
out later how to link in those libs per-tool later.

Modified:
    llvm/trunk/Makefile.rules

Modified: llvm/trunk/Makefile.rules
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/Makefile.rules?rev=72430&r1=72429&r2=72430&view=diff

==============================================================================
--- llvm/trunk/Makefile.rules (original)
+++ llvm/trunk/Makefile.rules Tue May 26 14:11:47 2009
@@ -948,7 +948,7 @@
 	$(Echo) Linking $(BuildMode) $(SharedLibKindMessage) \
 	  $(LIBRARYNAME)$(SHLIBEXT)
 	$(Verb) $(Link) $(SharedLinkOptions) -o $@ $(ObjectsO) \
-	  $(ProjLibsOptions) $(LLVMLibsOptions)
+	  $(ProjLibsOptions) $(LLVMLibsOptions) $(LIBS)
 else
 $(LibName.SO): $(ObjectsO) $(LibDir)/.dir
 	$(Echo) Linking $(BuildMode) Shared Library $(LIBRARYNAME)$(SHLIBEXT)




From eli.friedman at gmail.com  Tue May 26 14:18:56 2009
From: eli.friedman at gmail.com (Eli Friedman)
Date: Tue, 26 May 2009 19:18:56 -0000
Subject: [llvm-commits] [llvm] r72431 - in /llvm/trunk/lib/Target:
 CellSPU/SPUISelLowering.cpp X86/X86ISelLowering.cpp
Message-ID: <200905261918.n4QJIu2w031694@zion.cs.uiuc.edu>

Author: efriedma
Date: Tue May 26 14:18:56 2009
New Revision: 72431

URL: http://llvm.org/viewvc/llvm-project?rev=72431&view=rev
Log:
Don't abuse the quirky behavior of LegalizeDAG for XINT_TO_FP and
FP_TO_XINT.  Necessary for some cleanups I'm working on. 


Modified:
    llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp?rev=72431&r1=72430&r2=72431&view=diff

==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Tue May 26 14:18:56 2009
@@ -2304,7 +2304,7 @@
     return ExpandLibCall(LC, Op, DAG, false, Dummy, TLI);
   }
 
-  return SDValue();
+  return Op;
 }
 
 //! Lower ISD::SINT_TO_FP, ISD::UINT_TO_FP for i32
@@ -2330,7 +2330,7 @@
     return ExpandLibCall(LC, Op, DAG, false, Dummy, TLI);
   }
 
-  return SDValue();
+  return Op;
 }
 
 //! Lower ISD::SETCC

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=72431&r1=72430&r2=72431&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue May 26 14:18:56 2009
@@ -4595,10 +4595,10 @@
 
   // These are really Legal; caller falls through into that case.
   if (SrcVT == MVT::i32 && isScalarFPTypeInSSEReg(Op.getValueType()))
-    return SDValue();
+    return Op;
   if (SrcVT == MVT::i64 && Op.getValueType() != MVT::f80 &&
       Subtarget->is64Bit())
-    return SDValue();
+    return Op;
 
   DebugLoc dl = Op.getDebugLoc();
   unsigned Size = SrcVT.getSizeInBits()/8;
@@ -4795,7 +4795,7 @@
   if (SrcVT == MVT::i64) {
     // We only handle SSE2 f64 target here; caller can handle the rest.
     if (Op.getValueType() != MVT::f64 || !X86ScalarSSEf64)
-      return SDValue();
+      return Op;
 
     return LowerUINT_TO_FP_i64(Op, DAG);
   } else if (SrcVT == MVT::i32 && X86ScalarSSEf64) {
@@ -4881,7 +4881,7 @@
 SDValue X86TargetLowering::LowerFP_TO_SINT(SDValue Op, SelectionDAG &DAG) {
   std::pair<SDValue,SDValue> Vals = FP_TO_INTHelper(Op, DAG, true);
   SDValue FIST = Vals.first, StackSlot = Vals.second;
-  if (FIST.getNode() == 0) return SDValue();
+  if (FIST.getNode() == 0) return Op;
 
   // Load the result.
   return DAG.getLoad(Op.getValueType(), Op.getDebugLoc(),




From stefanus.dutoit at rapidmind.com  Tue May 26 16:04:52 2009
From: stefanus.dutoit at rapidmind.com (Stefanus Du Toit)
Date: Tue, 26 May 2009 21:04:52 -0000
Subject: [llvm-commits] [llvm] r72434 - in /llvm/trunk/lib/Target/X86:
 X86.td X86Subtarget.cpp X86Subtarget.h
Message-ID: <200905262105.n4QL53fn003892@zion.cs.uiuc.edu>

Author: sdt
Date: Tue May 26 16:04:35 2009
New Revision: 72434

URL: http://llvm.org/viewvc/llvm-project?rev=72434&view=rev
Log:
Update CPU capabilities for AMD machines

- added processors k8-sse3, opteron-sse3, athlon64-sse3, amdfam10, and
barcelona with appropriate sse3/4a levels
- added FeatureSSE4A for amdfam10 processors
in X86Subtarget:
- added hasSSE4A
- updated AutoDetectSubtargetFeatures to detect SSE4A
- updated GetCurrentX86CPU to detect family 15 with sse3 as k8-sse3 and
family 10h as amdfam10

New processor names match those used by gcc.

Patch by Paul Redmond!

Modified:
    llvm/trunk/lib/Target/X86/X86.td
    llvm/trunk/lib/Target/X86/X86Subtarget.cpp
    llvm/trunk/lib/Target/X86/X86Subtarget.h

Modified: llvm/trunk/lib/Target/X86/X86.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.td?rev=72434&r1=72433&r2=72434&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86.td (original)
+++ llvm/trunk/lib/Target/X86/X86.td Tue May 26 16:04:35 2009
@@ -52,6 +52,8 @@
                                       "Support 64-bit instructions">;
 def FeatureSlowBTMem : SubtargetFeature<"slow-bt-mem", "IsBTMemSlow", "true",
                                        "Bit testing of memory is slow">;
+def FeatureSSE4A   : SubtargetFeature<"sse4a", "HasSSE4A", "true",
+                                      "Support SSE 4a instructions">;
 
 //===----------------------------------------------------------------------===//
 // X86 processors supported.
@@ -97,6 +99,16 @@
                                FeatureSlowBTMem]>;
 def : Proc<"athlon-fx",       [FeatureSSE2,   Feature3DNowA, Feature64Bit,
                                FeatureSlowBTMem]>;
+def : Proc<"k8-sse3",         [FeatureSSE3,   Feature3DNowA, Feature64Bit,
+                               FeatureSlowBTMem]>;
+def : Proc<"opteron-sse3",    [FeatureSSE3,   Feature3DNowA, Feature64Bit,
+                               FeatureSlowBTMem]>;
+def : Proc<"athlon64-sse3",   [FeatureSSE3,   Feature3DNowA, Feature64Bit,
+                               FeatureSlowBTMem]>;
+def : Proc<"amdfam10",        [FeatureSSE3,   FeatureSSE4A,
+                               Feature3DNowA, Feature64Bit, FeatureSlowBTMem]>;
+def : Proc<"barcelona",       [FeatureSSE3,   FeatureSSE4A,
+                               Feature3DNowA, Feature64Bit, FeatureSlowBTMem]>;
 
 def : Proc<"winchip-c6",      [FeatureMMX]>;
 def : Proc<"winchip2",        [FeatureMMX, Feature3DNow]>;

Modified: llvm/trunk/lib/Target/X86/X86Subtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.cpp?rev=72434&r1=72433&r2=72434&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86Subtarget.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86Subtarget.cpp Tue May 26 16:04:35 2009
@@ -216,6 +216,7 @@
 
     X86::GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
     HasX86_64 = (EDX >> 29) & 0x1;
+    HasSSE4A = IsAMD && ((ECX >> 6) & 0x1);
   }
 }
 
@@ -229,6 +230,7 @@
 
   X86::GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
   bool Em64T = (EDX >> 29) & 0x1;
+  bool HasSSE3 = (ECX & 0x1);
 
   union {
     unsigned u[3];
@@ -311,10 +313,20 @@
         default: return "athlon";
         }
       case 15:
+        if (HasSSE3) {
+          switch (Model) {
+          default: return "k8-sse3";
+          }
+        } else {
+          switch (Model) {
+          case 1:  return "opteron";
+          case 5:  return "athlon-fx"; // also opteron
+          default: return "athlon64";
+          }
+        }
+      case 16:
         switch (Model) {
-        case 1:  return "opteron";
-        case 5:  return "athlon-fx"; // also opteron
-        default: return "athlon64";
+        default: return "amdfam10";
         }
     default:
       return "generic";

Modified: llvm/trunk/lib/Target/X86/X86Subtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.h?rev=72434&r1=72433&r2=72434&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86Subtarget.h (original)
+++ llvm/trunk/lib/Target/X86/X86Subtarget.h Tue May 26 16:04:35 2009
@@ -67,6 +67,9 @@
   /// IsBTMemSlow - True if BT (bit test) of memory instructions are slow.
   bool IsBTMemSlow;
   
+  /// HasSSE4A - True if the processor supports SSE4A instructions.
+  bool HasSSE4A;
+
   /// DarwinVers - Nonzero if this is a darwin platform: the numeric
   /// version of the platform, e.g. 8 = 10.4 (Tiger), 9 = 10.5 (Leopard), etc.
   unsigned char DarwinVers; // Is any darwin-x86 platform.
@@ -127,6 +130,7 @@
   bool hasSSSE3() const { return X86SSELevel >= SSSE3; }
   bool hasSSE41() const { return X86SSELevel >= SSE41; }
   bool hasSSE42() const { return X86SSELevel >= SSE42; }
+  bool hasSSE4A() const { return HasSSE4A; }
   bool has3DNow() const { return X863DNowLevel >= ThreeDNow; }
   bool has3DNowA() const { return X863DNowLevel >= ThreeDNowA; }
 




From edwintorok at gmail.com  Tue May 26 16:14:59 2009
From: edwintorok at gmail.com (=?ISO-8859-1?Q?T=F6r=F6k_Edwin?=)
Date: Wed, 27 May 2009 00:14:59 +0300
Subject: [llvm-commits] [llvm] r72329 -
	/llvm/trunk/lib/ExecutionEngine/JIT/Intercept.cpp
In-Reply-To: <5E69C061-20B9-4F73-90C9-F89585D06B79@apple.com>
References: <200905231624.n4NGO6o0027749@zion.cs.uiuc.edu>
	<5E69C061-20B9-4F73-90C9-F89585D06B79@apple.com>
Message-ID: <4A1C5BD3.70600@gmail.com>

On 2009-05-26 01:44, Chris Lattner wrote:
> On May 23, 2009, at 9:24 AM, Torok Edwin wrote:
>
>   
>> Author: edwin
>> Date: Sat May 23 11:23:59 2009
>> New Revision: 72329
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=72329&view=rev
>> Log:
>> stat64/open64/lseek64 for the interpreter
>>     
>
> stat64 was already listed.  Maybe the \1 isn't being stripped correctly?
>   

Yes, that could be the problem. I'll look into this tomorrow if I don't
forget.

Best regards,
--Edwin


From dalej at apple.com  Tue May 26 16:25:07 2009
From: dalej at apple.com (Dale Johannesen)
Date: Tue, 26 May 2009 21:25:07 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r72435 - in /llvm-gcc-4.2/trunk/gcc:
 llvm-abi.h llvm-convert.cpp llvm-types.cpp
Message-ID: <200905262125.n4QLP9jt005027@zion.cs.uiuc.edu>

Author: johannes
Date: Tue May 26 16:25:01 2009
New Revision: 72435

URL: http://llvm.org/viewvc/llvm-project?rev=72435&view=rev
Log:
Change the names of a couple functions to be more accurate.
No functional change.


Modified:
    llvm-gcc-4.2/trunk/gcc/llvm-abi.h
    llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
    llvm-gcc-4.2/trunk/gcc/llvm-types.cpp

Modified: llvm-gcc-4.2/trunk/gcc/llvm-abi.h
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-abi.h?rev=72435&r1=72434&r2=72435&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/llvm-abi.h (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-abi.h Tue May 26 16:25:01 2009
@@ -66,17 +66,17 @@
   /// returns an aggregate value using multiple return values.
   void HandleAggregateResultAsAggregate(const Type *AggrTy) {}
 
-  /// HandleAggregateShadowArgument - This callback is invoked if the function
+  /// HandleAggregateShadowResult - This callback is invoked if the function
   /// returns an aggregate value by using a "shadow" first parameter, which is
   /// a pointer to the aggregate, of type PtrArgTy.  If RetPtr is set to true,
   /// the pointer argument itself is returned from the function.
-  void HandleAggregateShadowArgument(const PointerType *PtrArgTy, bool RetPtr){}
+  void HandleAggregateShadowResult(const PointerType *PtrArgTy, bool RetPtr){}
 
-  /// HandleScalarShadowArgument - This callback is invoked if the function
+  /// HandleScalarShadowResult - This callback is invoked if the function
   /// returns a scalar value by using a "shadow" first parameter, which is a
   /// pointer to the scalar, of type PtrArgTy.  If RetPtr is set to true,
   /// the pointer argument itself is returned from the function.
-  void HandleScalarShadowArgument(const PointerType *PtrArgTy, bool RetPtr) {}
+  void HandleScalarShadowResult(const PointerType *PtrArgTy, bool RetPtr) {}
 
 
   /// HandleScalarArgument - This is the primary callback that specifies an
@@ -382,7 +382,7 @@
       if (ScalarType)
         C.HandleAggregateResultAsScalar(ConvertType(ScalarType));
       else if (LLVM_SHOULD_RETURN_VECTOR_AS_SHADOW(type, isBuiltin))
-        C.HandleScalarShadowArgument(PointerType::getUnqual(Ty), false);
+        C.HandleScalarShadowResult(PointerType::getUnqual(Ty), false);
       else
         C.HandleScalarResult(Ty);
     } else if (Ty->isSingleValueType() || Ty == Type::VoidTy) {
@@ -414,7 +414,7 @@
 
       // FIXME: should return the hidden first argument for some targets
       // (e.g. ELF i386).
-      C.HandleAggregateShadowArgument(PointerType::getUnqual(Ty), false);
+      C.HandleAggregateShadowResult(PointerType::getUnqual(Ty), false);
     }
   }
   

Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=72435&r1=72434&r2=72435&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Tue May 26 16:25:01 2009
@@ -263,7 +263,7 @@
       LocStack.clear();
     }
     
-    void HandleAggregateShadowArgument(const PointerType *PtrArgTy, 
+    void HandleAggregateShadowResult(const PointerType *PtrArgTy, 
                                        bool RetPtr) {
       // If the function returns a structure by value, we transform the function
       // to take a pointer to the result as the first argument of the function
@@ -297,7 +297,7 @@
       ++AI;
     }
 
-    void HandleScalarShadowArgument(const PointerType *PtrArgTy, bool RetPtr) {
+    void HandleScalarShadowResult(const PointerType *PtrArgTy, bool RetPtr) {
       assert(AI != Builder.GetInsertBlock()->getParent()->arg_end() &&
              "No explicit return value?");
       AI->setName("scalar.result");
@@ -2451,11 +2451,11 @@
       isAggrRet = true;
     }
 
-    /// HandleAggrega