From evan.cheng at apple.com Mon Jun 29 02:51:05 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 29 Jun 2009 07:51:05 -0000 Subject: [llvm-commits] [llvm] r74420 - in /llvm/trunk: lib/Target/ARM/ARMAddressingModes.h lib/Target/ARM/ARMConstantIslandPass.cpp lib/Target/ARM/ARMISelDAGToDAG.cpp lib/Target/ARM/ARMInstrFormats.td lib/Target/ARM/ARMInstrInfo.h lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/ARMInstrThumb.td lib/Target/ARM/ARMInstrThumb2.td lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp lib/Target/ARM/README.txt lib/Target/ARM/ThumbRegisterInfo.cpp test/CodeGen/ARM/ldr.ll test/CodeGen/Thumb2/thumb2-ldr.ll Message-ID: <200906290751.n5T7p61C030540@zion.cs.uiuc.edu> Author: evancheng Date: Mon Jun 29 02:51:04 2009 New Revision: 74420 URL: http://llvm.org/viewvc/llvm-project?rev=74420&view=rev Log: Implement Thumb2 ldr. After much back and forth, I decided to deviate from ARM design and split LDR into 4 instructions (r + imm12, r + imm8, r + r << imm12, constantpool). The advantage of this is 1) it follows the latest ARM technical manual, and 2) makes it easier to reduce the width of the instruction later. The down side is this creates more inconsistency between the two sub-targets. We should split ARM LDR instruction in a similar fashion later. I've added a README entry for this. Added: llvm/trunk/test/CodeGen/Thumb2/thumb2-ldr.ll Modified: llvm/trunk/lib/Target/ARM/ARMAddressingModes.h llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp llvm/trunk/lib/Target/ARM/ARMInstrFormats.td llvm/trunk/lib/Target/ARM/ARMInstrInfo.h llvm/trunk/lib/Target/ARM/ARMInstrInfo.td llvm/trunk/lib/Target/ARM/ARMInstrThumb.td llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp llvm/trunk/lib/Target/ARM/README.txt llvm/trunk/lib/Target/ARM/ThumbRegisterInfo.cpp llvm/trunk/test/CodeGen/ARM/ldr.ll Modified: llvm/trunk/lib/Target/ARM/ARMAddressingModes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAddressingModes.h?rev=74420&r1=74419&r2=74420&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMAddressingModes.h (original) +++ llvm/trunk/lib/Target/ARM/ARMAddressingModes.h Mon Jun 29 02:51:04 2009 @@ -305,7 +305,7 @@ /// abcdefgh abcdefgh abcdefgh abcdefgh control = 3 /// Return -1 if none of the above apply. /// See ARM Reference Manual A6.3.2. - static inline int getT2SOImmValSplat (unsigned V) { + static inline int getT2SOImmValSplat(unsigned V) { unsigned u, Vs, Imm; // control = 0 if ((V & 0xffffff00) == 0) Modified: llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp?rev=74420&r1=74419&r2=74420&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp Mon Jun 29 02:51:04 2009 @@ -447,21 +447,24 @@ Bits = 8; Scale = 4; // +-(offset_8*4) break; - case ARMII::AddrModeT1: + case ARMII::AddrModeT1_1: Bits = 5; // +offset_5 break; - case ARMII::AddrModeT2: + case ARMII::AddrModeT1_2: Bits = 5; Scale = 2; // +(offset_5*2) break; - case ARMII::AddrModeT4: + case ARMII::AddrModeT1_4: Bits = 5; Scale = 4; // +(offset_5*4) break; - case ARMII::AddrModeTs: + case ARMII::AddrModeT1_s: Bits = 8; Scale = 4; // +(offset_8*4) break; + case ARMII::AddrModeT2_pc: + Bits = 12; // +-offset_12 + break; } // Remember that this is a user of a CP entry. Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp?rev=74420&r1=74419&r2=74420&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp Mon Jun 29 02:51:04 2009 @@ -64,6 +64,8 @@ SDNode *Select(SDValue Op); virtual void InstructionSelect(); + bool SelectShifterOperandReg(SDValue Op, SDValue N, SDValue &A, + SDValue &B, SDValue &C); bool SelectAddrMode2(SDValue Op, SDValue N, SDValue &Base, SDValue &Offset, SDValue &Opc); bool SelectAddrMode2Offset(SDValue Op, SDValue N, @@ -92,10 +94,15 @@ bool SelectThumbAddrModeSP(SDValue Op, SDValue N, SDValue &Base, SDValue &OffImm); - bool SelectShifterOperandReg(SDValue Op, SDValue N, SDValue &A, - SDValue &B, SDValue &C); bool SelectT2ShifterOperandReg(SDValue Op, SDValue N, SDValue &BaseReg, SDValue &Opc); + bool SelectT2AddrModeImm12(SDValue Op, SDValue N, SDValue &Base, + SDValue &OffImm); + bool SelectT2AddrModeImm8(SDValue Op, SDValue N, SDValue &Base, + SDValue &OffImm); + bool SelectT2AddrModeSoReg(SDValue Op, SDValue N, SDValue &Base, + SDValue &OffReg, SDValue &ShImm); + // Include the pieces autogenerated from the target description. #include "ARMGenDAGISel.inc" @@ -116,6 +123,30 @@ CurDAG->RemoveDeadNodes(); } +bool ARMDAGToDAGISel::SelectShifterOperandReg(SDValue Op, + SDValue N, + SDValue &BaseReg, + SDValue &ShReg, + SDValue &Opc) { + ARM_AM::ShiftOpc ShOpcVal = ARM_AM::getShiftOpcForNode(N); + + // Don't match base register only case. That is matched to a separate + // lower complexity pattern with explicit register operand. + if (ShOpcVal == ARM_AM::no_shift) return false; + + BaseReg = N.getOperand(0); + unsigned ShImmVal = 0; + if (ConstantSDNode *RHS = dyn_cast(N.getOperand(1))) { + ShReg = CurDAG->getRegister(0, MVT::i32); + ShImmVal = RHS->getZExtValue() & 31; + } else { + ShReg = N.getOperand(1); + } + Opc = CurDAG->getTargetConstant(ARM_AM::getSORegOpc(ShOpcVal, ShImmVal), + MVT::i32); + return true; +} + bool ARMDAGToDAGISel::SelectAddrMode2(SDValue Op, SDValue N, SDValue &Base, SDValue &Offset, SDValue &Opc) { @@ -519,30 +550,6 @@ return false; } -bool ARMDAGToDAGISel::SelectShifterOperandReg(SDValue Op, - SDValue N, - SDValue &BaseReg, - SDValue &ShReg, - SDValue &Opc) { - ARM_AM::ShiftOpc ShOpcVal = ARM_AM::getShiftOpcForNode(N); - - // Don't match base register only case. That is matched to a separate - // lower complexity pattern with explicit register operand. - if (ShOpcVal == ARM_AM::no_shift) return false; - - BaseReg = N.getOperand(0); - unsigned ShImmVal = 0; - if (ConstantSDNode *RHS = dyn_cast(N.getOperand(1))) { - ShReg = CurDAG->getRegister(0, MVT::i32); - ShImmVal = RHS->getZExtValue() & 31; - } else { - ShReg = N.getOperand(1); - } - Opc = CurDAG->getTargetConstant(ARM_AM::getSORegOpc(ShOpcVal, ShImmVal), - MVT::i32); - return true; -} - bool ARMDAGToDAGISel::SelectT2ShifterOperandReg(SDValue Op, SDValue N, SDValue &BaseReg, SDValue &Opc) { @@ -563,6 +570,106 @@ return false; } +bool ARMDAGToDAGISel::SelectT2AddrModeImm12(SDValue Op, SDValue N, + SDValue &Base, SDValue &OffImm) { + // Match simple R + imm12 operands. + if (N.getOpcode() != ISD::ADD) + return false; + + if (ConstantSDNode *RHS = dyn_cast(N.getOperand(1))) { + int RHSC = (int)RHS->getZExtValue(); + if (RHSC >= 0 && RHSC < 0x1000) { // 12 bits. + Base = N.getOperand(0); + OffImm = CurDAG->getTargetConstant(RHSC, MVT::i32); + return true; + } + } + + return false; +} + +bool ARMDAGToDAGISel::SelectT2AddrModeImm8(SDValue Op, SDValue N, + SDValue &Base, SDValue &OffImm) { + if (N.getOpcode() == ISD::ADD) { + if (ConstantSDNode *RHS = dyn_cast(N.getOperand(1))) { + int RHSC = (int)RHS->getZExtValue(); + if (RHSC < 0 && RHSC > -0x100) { // 8 bits. + Base = N.getOperand(0); + OffImm = CurDAG->getTargetConstant(RHSC, MVT::i32); + return true; + } + } + } else if (N.getOpcode() == ISD::SUB) { + if (ConstantSDNode *RHS = dyn_cast(N.getOperand(1))) { + int RHSC = (int)RHS->getZExtValue(); + if (RHSC >= 0 && RHSC < 0x100) { // 8 bits. + Base = N.getOperand(0); + OffImm = CurDAG->getTargetConstant(-RHSC, MVT::i32); + return true; + } + } + } + + return false; +} + +bool ARMDAGToDAGISel::SelectT2AddrModeSoReg(SDValue Op, SDValue N, + SDValue &Base, + SDValue &OffReg, SDValue &ShImm) { + // Base only. + if (N.getOpcode() != ISD::ADD && N.getOpcode() != ISD::SUB) { + Base = N; + if (N.getOpcode() == ISD::FrameIndex) { + int FI = cast(N)->getIndex(); + Base = CurDAG->getTargetFrameIndex(FI, TLI.getPointerTy()); + } else if (N.getOpcode() == ARMISD::Wrapper) { + Base = N.getOperand(0); + if (Base.getOpcode() == ISD::TargetConstantPool) + return false; // We want to select t2LDRpci instead. + } + OffReg = CurDAG->getRegister(0, MVT::i32); + ShImm = CurDAG->getTargetConstant(0, MVT::i32); + return true; + } + + // Look for (R + R) or (R + (R << [1,2,3])). + unsigned ShAmt = 0; + Base = N.getOperand(0); + OffReg = N.getOperand(1); + + // Swap if it is ((R << c) + R). + ARM_AM::ShiftOpc ShOpcVal = ARM_AM::getShiftOpcForNode(OffReg); + if (ShOpcVal != ARM_AM::lsl) { + ShOpcVal = ARM_AM::getShiftOpcForNode(Base); + if (ShOpcVal == ARM_AM::lsl) + std::swap(Base, OffReg); + } + + if (ShOpcVal == ARM_AM::lsl) { + // Check to see if the RHS of the shift is a constant, if not, we can't fold + // it. + if (ConstantSDNode *Sh = dyn_cast(OffReg.getOperand(1))) { + ShAmt = Sh->getZExtValue(); + if (ShAmt >= 4) { + ShAmt = 0; + ShOpcVal = ARM_AM::no_shift; + } else + OffReg = OffReg.getOperand(0); + } else { + ShOpcVal = ARM_AM::no_shift; + } + } else if (SelectT2AddrModeImm12(Op, N, Base, ShImm) || + SelectT2AddrModeImm8 (Op, N, Base, ShImm)) + // Don't match if it's possible to match to one of the r +/- imm cases. + return false; + + ShImm = CurDAG->getTargetConstant(ShAmt, MVT::i32); + + return true; +} + +//===--------------------------------------------------------------------===// + /// getAL - Returns a ARMCC::AL immediate node. static inline SDValue getAL(SelectionDAG *CurDAG) { return CurDAG->getTargetConstant((uint64_t)ARMCC::AL, MVT::i32); Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=74420&r1=74419&r2=74420&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Mon Jun 29 02:51:04 2009 @@ -59,6 +59,47 @@ class UnaryDP { bit isUnaryDataProc = 1; } //===----------------------------------------------------------------------===// +// ARM Instruction flags. These need to match ARMInstrInfo.h. +// + +// Addressing mode. +class AddrMode val> { + bits<4> Value = val; +} +def AddrModeNone : AddrMode<0>; +def AddrMode1 : AddrMode<1>; +def AddrMode2 : AddrMode<2>; +def AddrMode3 : AddrMode<3>; +def AddrMode4 : AddrMode<4>; +def AddrMode5 : AddrMode<5>; +def AddrModeT1_1 : AddrMode<6>; +def AddrModeT1_2 : AddrMode<7>; +def AddrModeT1_4 : AddrMode<8>; +def AddrModeT1_s : AddrMode<9>; +def AddrModeT2_i12: AddrMode<10>; +def AddrModeT2_i8 : AddrMode<11>; +def AddrModeT2_so : AddrMode<12>; +def AddrModeT2_pc : AddrMode<13>; + +// Instruction size. +class SizeFlagVal val> { + bits<3> Value = val; +} +def SizeInvalid : SizeFlagVal<0>; // Unset. +def SizeSpecial : SizeFlagVal<1>; // Pseudo or special. +def Size8Bytes : SizeFlagVal<2>; +def Size4Bytes : SizeFlagVal<3>; +def Size2Bytes : SizeFlagVal<4>; + +// Load / store index mode. +class IndexMode val> { + bits<2> Value = val; +} +def IndexModeNone : IndexMode<0>; +def IndexModePre : IndexMode<1>; +def IndexModePost : IndexMode<2>; + +//===----------------------------------------------------------------------===// // ARM Instruction templates. // @@ -706,7 +747,6 @@ // Thumb Instruction Format Definitions. // - // TI - Thumb instruction. class ThumbI pattern> : ThumbI; -class TI1 pattern> - : ThumbI; -class TI2 pattern> - : ThumbI; -class TI4 pattern> - : ThumbI; -class TIs pattern> - : ThumbI; - -// Two-address instructions -class TIt pattern> - : ThumbI; // BL, BLX(1) are translated by assembler into two instructions class TIx2 pattern> @@ -764,6 +792,14 @@ class T1I pattern> : Thumb1I; +class T1I1 pattern> + : Thumb1I; +class T1I2 pattern> + : Thumb1I; +class T1I4 pattern> + : Thumb1I; +class T1Is pattern> + : Thumb1I; // Two-address instructions class T1It pattern> @@ -812,6 +848,14 @@ class T2I pattern> : Thumb2I; +class T2Ii12 pattern> + : Thumb2I; +class T2Ii8 pattern> + : Thumb2I; +class T2Iso pattern> + : Thumb2I; +class T2Ipc pattern> + : Thumb2I; class T2sI pattern> : Thumb2sI; Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.h?rev=74420&r1=74419&r2=74420&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.h (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.h Mon Jun 29 02:51:04 2009 @@ -39,10 +39,14 @@ AddrMode3 = 3, AddrMode4 = 4, AddrMode5 = 5, - AddrModeT1 = 6, - AddrModeT2 = 7, - AddrModeT4 = 8, - AddrModeTs = 9, // i8 * 4 for pc and sp relative data + AddrModeT1_1 = 6, + AddrModeT1_2 = 7, + AddrModeT1_4 = 8, + AddrModeT1_s = 9, // i8 * 4 for pc and sp relative data + AddrModeT2_i12= 10, + AddrModeT2_i8 = 11, + AddrModeT2_so = 12, + AddrModeT2_pc = 13, // +/- i12 for pc relative data // Size* - Flags to keep track of the size of an instruction. SizeShift = 4, Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=74420&r1=74419&r2=74420&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Jun 29 02:51:04 2009 @@ -309,43 +309,6 @@ } //===----------------------------------------------------------------------===// -// ARM Instruction flags. These need to match ARMInstrInfo.h. -// - -// Addressing mode. -class AddrMode val> { - bits<4> Value = val; -} -def AddrModeNone : AddrMode<0>; -def AddrMode1 : AddrMode<1>; -def AddrMode2 : AddrMode<2>; -def AddrMode3 : AddrMode<3>; -def AddrMode4 : AddrMode<4>; -def AddrMode5 : AddrMode<5>; -def AddrModeT1 : AddrMode<6>; -def AddrModeT2 : AddrMode<7>; -def AddrModeT4 : AddrMode<8>; -def AddrModeTs : AddrMode<9>; - -// Instruction size. -class SizeFlagVal val> { - bits<3> Value = val; -} -def SizeInvalid : SizeFlagVal<0>; // Unset. -def SizeSpecial : SizeFlagVal<1>; // Pseudo or special. -def Size8Bytes : SizeFlagVal<2>; -def Size4Bytes : SizeFlagVal<3>; -def Size2Bytes : SizeFlagVal<4>; - -// Load / store index mode. -class IndexMode val> { - bits<2> Value = val; -} -def IndexModeNone : IndexMode<0>; -def IndexModePre : IndexMode<1>; -def IndexModePost : IndexMode<2>; - -//===----------------------------------------------------------------------===// include "ARMInstrFormats.td" Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb.td?rev=74420&r1=74419&r2=74420&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb.td Mon Jun 29 02:51:04 2009 @@ -211,68 +211,68 @@ // let canFoldAsLoad = 1 in -def tLDR : TI4<(outs tGPR:$dst), (ins t_addrmode_s4:$addr), +def tLDR : T1I4<(outs tGPR:$dst), (ins t_addrmode_s4:$addr), "ldr $dst, $addr", [(set tGPR:$dst, (load t_addrmode_s4:$addr))]>; -def tLDRB : TI1<(outs tGPR:$dst), (ins t_addrmode_s1:$addr), +def tLDRB : T1I1<(outs tGPR:$dst), (ins t_addrmode_s1:$addr), "ldrb $dst, $addr", [(set tGPR:$dst, (zextloadi8 t_addrmode_s1:$addr))]>; -def tLDRH : TI2<(outs tGPR:$dst), (ins t_addrmode_s2:$addr), +def tLDRH : T1I2<(outs tGPR:$dst), (ins t_addrmode_s2:$addr), "ldrh $dst, $addr", [(set tGPR:$dst, (zextloadi16 t_addrmode_s2:$addr))]>; -def tLDRSB : TI1<(outs tGPR:$dst), (ins t_addrmode_rr:$addr), +def tLDRSB : T1I1<(outs tGPR:$dst), (ins t_addrmode_rr:$addr), "ldrsb $dst, $addr", [(set tGPR:$dst, (sextloadi8 t_addrmode_rr:$addr))]>; -def tLDRSH : TI2<(outs tGPR:$dst), (ins t_addrmode_rr:$addr), +def tLDRSH : T1I2<(outs tGPR:$dst), (ins t_addrmode_rr:$addr), "ldrsh $dst, $addr", [(set tGPR:$dst, (sextloadi16 t_addrmode_rr:$addr))]>; let canFoldAsLoad = 1 in -def tLDRspi : TIs<(outs tGPR:$dst), (ins t_addrmode_sp:$addr), +def tLDRspi : T1Is<(outs tGPR:$dst), (ins t_addrmode_sp:$addr), "ldr $dst, $addr", [(set tGPR:$dst, (load t_addrmode_sp:$addr))]>; // Special instruction for restore. It cannot clobber condition register // when it's expanded by eliminateCallFramePseudoInstr(). let canFoldAsLoad = 1, mayLoad = 1 in -def tRestore : TIs<(outs tGPR:$dst), (ins t_addrmode_sp:$addr), +def tRestore : T1Is<(outs tGPR:$dst), (ins t_addrmode_sp:$addr), "ldr $dst, $addr", []>; // Load tconstpool let canFoldAsLoad = 1 in -def tLDRpci : TIs<(outs tGPR:$dst), (ins i32imm:$addr), +def tLDRpci : T1Is<(outs tGPR:$dst), (ins i32imm:$addr), "ldr $dst, $addr", [(set tGPR:$dst, (load (ARMWrapper tconstpool:$addr)))]>; // Special LDR for loads from non-pc-relative constpools. let canFoldAsLoad = 1, mayLoad = 1, isReMaterializable = 1 in -def tLDRcp : TIs<(outs tGPR:$dst), (ins i32imm:$addr), +def tLDRcp : T1Is<(outs tGPR:$dst), (ins i32imm:$addr), "ldr $dst, $addr", []>; -def tSTR : TI4<(outs), (ins tGPR:$src, t_addrmode_s4:$addr), +def tSTR : T1I4<(outs), (ins tGPR:$src, t_addrmode_s4:$addr), "str $src, $addr", [(store tGPR:$src, t_addrmode_s4:$addr)]>; -def tSTRB : TI1<(outs), (ins tGPR:$src, t_addrmode_s1:$addr), +def tSTRB : T1I1<(outs), (ins tGPR:$src, t_addrmode_s1:$addr), "strb $src, $addr", [(truncstorei8 tGPR:$src, t_addrmode_s1:$addr)]>; -def tSTRH : TI2<(outs), (ins tGPR:$src, t_addrmode_s2:$addr), +def tSTRH : T1I2<(outs), (ins tGPR:$src, t_addrmode_s2:$addr), "strh $src, $addr", [(truncstorei16 tGPR:$src, t_addrmode_s2:$addr)]>; -def tSTRspi : TIs<(outs), (ins tGPR:$src, t_addrmode_sp:$addr), +def tSTRspi : T1Is<(outs), (ins tGPR:$src, t_addrmode_sp:$addr), "str $src, $addr", [(store tGPR:$src, t_addrmode_sp:$addr)]>; let mayStore = 1 in { // Special instruction for spill. It cannot clobber condition register // when it's expanded by eliminateCallFramePseudoInstr(). -def tSpill : TIs<(outs), (ins tGPR:$src, t_addrmode_sp:$addr), +def tSpill : T1Is<(outs), (ins tGPR:$src, t_addrmode_sp:$addr), "str $src, $addr", []>; } Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=74420&r1=74419&r2=74420&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Mon Jun 29 02:51:04 2009 @@ -127,6 +127,30 @@ }], t2_hi16>; +// Define Thumb2 specific addressing modes. + +// t2addrmode_imm12 := reg + imm12 +def t2addrmode_imm12 : Operand, + ComplexPattern { + let PrintMethod = "printT2AddrModeImm12Operand"; + let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm); +} + +// t2addrmode_imm8 := reg - imm8 +def t2addrmode_imm8 : Operand, + ComplexPattern { + let PrintMethod = "printT2AddrModeImm8Operand"; + let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm); +} + +// t2addrmode_so_reg := reg + reg << imm2 +def t2addrmode_so_reg : Operand, + ComplexPattern { + let PrintMethod = "printT2AddrModeSoRegOperand"; + let MIOperandInfo = (ops GPR:$base, GPR:$offsreg, i32imm:$offsimm); +} + + //===----------------------------------------------------------------------===// // Multiclass helpers... // @@ -409,6 +433,26 @@ // Load / store Instructions. // +// Load +let canFoldAsLoad = 1 in { +def t2LDRi12 : T2Ii12<(outs GPR:$dst), (ins t2addrmode_imm12:$addr), + "ldr", " $dst, $addr", + [(set GPR:$dst, (load t2addrmode_imm12:$addr))]>; + +def t2LDRi8 : T2Ii8<(outs GPR:$dst), (ins t2addrmode_imm8:$addr), + "ldr", " $dst, $addr", + [(set GPR:$dst, (load t2addrmode_imm8:$addr))]>; + +def t2LDRs : T2Iso<(outs GPR:$dst), (ins t2addrmode_so_reg:$addr), + "ldr", " $dst, $addr", + [(set GPR:$dst, (load t2addrmode_so_reg:$addr))]>; + +// Load tconstpool +def t2LDRpci : T2Ipc<(outs GPR:$dst), (ins i32imm:$addr), + "ldr", " $dst, $addr", + [(set GPR:$dst, (load (ARMWrapper tconstpool:$addr)))]>; +} // canFoldAsLoad + //===----------------------------------------------------------------------===// // Move Instructions. // Modified: llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp?rev=74420&r1=74419&r2=74420&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp Mon Jun 29 02:51:04 2009 @@ -93,45 +93,48 @@ return "ARM Assembly Printer"; } - void printOperand(const MachineInstr *MI, int opNum, + void printOperand(const MachineInstr *MI, int OpNum, const char *Modifier = 0); - void printSOImmOperand(const MachineInstr *MI, int opNum); - void printSOImm2PartOperand(const MachineInstr *MI, int opNum); - void printSORegOperand(const MachineInstr *MI, int opNum); - void printAddrMode2Operand(const MachineInstr *MI, int OpNo); - void printAddrMode2OffsetOperand(const MachineInstr *MI, int OpNo); - void printAddrMode3Operand(const MachineInstr *MI, int OpNo); - void printAddrMode3OffsetOperand(const MachineInstr *MI, int OpNo); - void printAddrMode4Operand(const MachineInstr *MI, int OpNo, + void printSOImmOperand(const MachineInstr *MI, int OpNum); + void printSOImm2PartOperand(const MachineInstr *MI, int OpNum); + void printSORegOperand(const MachineInstr *MI, int OpNum); + void printAddrMode2Operand(const MachineInstr *MI, int OpNum); + void printAddrMode2OffsetOperand(const MachineInstr *MI, int OpNum); + void printAddrMode3Operand(const MachineInstr *MI, int OpNum); + void printAddrMode3OffsetOperand(const MachineInstr *MI, int OpNum); + void printAddrMode4Operand(const MachineInstr *MI, int OpNum, const char *Modifier = 0); - void printAddrMode5Operand(const MachineInstr *MI, int OpNo, + void printAddrMode5Operand(const MachineInstr *MI, int OpNum, const char *Modifier = 0); - void printAddrModePCOperand(const MachineInstr *MI, int OpNo, + void printAddrModePCOperand(const MachineInstr *MI, int OpNum, const char *Modifier = 0); - void printBitfieldInvMaskImmOperand (const MachineInstr *MI, int OpNo); + void printBitfieldInvMaskImmOperand (const MachineInstr *MI, int OpNum); - void printThumbAddrModeRROperand(const MachineInstr *MI, int OpNo); - void printThumbAddrModeRI5Operand(const MachineInstr *MI, int OpNo, + void printThumbAddrModeRROperand(const MachineInstr *MI, int OpNum); + void printThumbAddrModeRI5Operand(const MachineInstr *MI, int OpNum, unsigned Scale); - void printThumbAddrModeS1Operand(const MachineInstr *MI, int OpNo); - void printThumbAddrModeS2Operand(const MachineInstr *MI, int OpNo); - void printThumbAddrModeS4Operand(const MachineInstr *MI, int OpNo); - void printThumbAddrModeSPOperand(const MachineInstr *MI, int OpNo); + void printThumbAddrModeS1Operand(const MachineInstr *MI, int OpNum); + void printThumbAddrModeS2Operand(const MachineInstr *MI, int OpNum); + void printThumbAddrModeS4Operand(const MachineInstr *MI, int OpNum); + void printThumbAddrModeSPOperand(const MachineInstr *MI, int OpNum); - void printT2SOImmOperand(const MachineInstr *MI, int opNum); + void printT2SOImmOperand(const MachineInstr *MI, int OpNum); void printT2SOOperand(const MachineInstr *MI, int OpNum); - - void printPredicateOperand(const MachineInstr *MI, int opNum); - void printSBitModifierOperand(const MachineInstr *MI, int opNum); - void printPCLabel(const MachineInstr *MI, int opNum); - void printRegisterList(const MachineInstr *MI, int opNum); - void printCPInstOperand(const MachineInstr *MI, int opNum, + void printT2AddrModeImm12Operand(const MachineInstr *MI, int OpNum); + void printT2AddrModeImm8Operand(const MachineInstr *MI, int OpNum); + void printT2AddrModeSoRegOperand(const MachineInstr *MI, int OpNum); + + void printPredicateOperand(const MachineInstr *MI, int OpNum); + void printSBitModifierOperand(const MachineInstr *MI, int OpNum); + void printPCLabel(const MachineInstr *MI, int OpNum); + void printRegisterList(const MachineInstr *MI, int OpNum); + void printCPInstOperand(const MachineInstr *MI, int OpNum, const char *Modifier); - void printJTBlockOperand(const MachineInstr *MI, int opNum); + void printJTBlockOperand(const MachineInstr *MI, int OpNum); - virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, + virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, unsigned AsmVariant, const char *ExtraCode); - virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, + virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum, unsigned AsmVariant, const char *ExtraCode); @@ -282,9 +285,9 @@ return false; } -void ARMAsmPrinter::printOperand(const MachineInstr *MI, int opNum, +void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum, const char *Modifier) { - const MachineOperand &MO = MI->getOperand(opNum); + const MachineOperand &MO = MI->getOperand(OpNum); switch (MO.getType()) { case MachineOperand::MO_Register: { unsigned Reg = MO.getReg(); @@ -606,6 +609,8 @@ O << "#" << lsb << ", #" << width; } +//===--------------------------------------------------------------------===// + void ARMAsmPrinter::printThumbAddrModeRROperand(const MachineInstr *MI, int Op) { const MachineOperand &MO1 = MI->getOperand(Op); @@ -659,6 +664,8 @@ O << "]"; } +//===--------------------------------------------------------------------===// + /// printT2SOImmOperand - T2SOImm is: /// 1. a 4-bit splat control value and 8 bit immediate value /// 2. a 5-bit rotate amount and a non-zero 8-bit immediate value @@ -694,47 +701,99 @@ O << "#" << ARM_AM::getSORegOffset(MO2.getImm()); } +void ARMAsmPrinter::printT2AddrModeImm12Operand(const MachineInstr *MI, + int OpNum) { + const MachineOperand &MO1 = MI->getOperand(OpNum); + const MachineOperand &MO2 = MI->getOperand(OpNum+1); + + O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName; + + unsigned OffImm = MO2.getImm(); + if (OffImm) // Don't print +0. + O << ", #+" << OffImm; + O << "]"; +} + +void ARMAsmPrinter::printT2AddrModeImm8Operand(const MachineInstr *MI, + int OpNum) { + const MachineOperand &MO1 = MI->getOperand(OpNum); + const MachineOperand &MO2 = MI->getOperand(OpNum+1); + + O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName; + + int32_t OffImm = (int32_t)MO2.getImm(); + // Don't print +0. + if (OffImm < 0) + O << ", #-" << -OffImm; + else if (OffImm > 0) + O << ", #+" << OffImm; + O << "]"; +} + +void ARMAsmPrinter::printT2AddrModeSoRegOperand(const MachineInstr *MI, + int OpNum) { + const MachineOperand &MO1 = MI->getOperand(OpNum); + const MachineOperand &MO2 = MI->getOperand(OpNum+1); + const MachineOperand &MO3 = MI->getOperand(OpNum+2); + + O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName; + + if (MO2.getReg()) { + O << ", +" + << TM.getRegisterInfo()->get(MO2.getReg()).AsmName; -void ARMAsmPrinter::printPredicateOperand(const MachineInstr *MI, int opNum) { - ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(opNum).getImm(); + unsigned ShAmt = MO3.getImm(); + if (ShAmt) { + assert(ShAmt <= 3 && "Not a valid Thumb2 addressing mode!"); + O << ", lsl #" << ShAmt; + } + } + O << "]"; +} + + +//===--------------------------------------------------------------------===// + +void ARMAsmPrinter::printPredicateOperand(const MachineInstr *MI, int OpNum) { + ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm(); if (CC != ARMCC::AL) O << ARMCondCodeToString(CC); } -void ARMAsmPrinter::printSBitModifierOperand(const MachineInstr *MI, int opNum){ - unsigned Reg = MI->getOperand(opNum).getReg(); +void ARMAsmPrinter::printSBitModifierOperand(const MachineInstr *MI, int OpNum){ + unsigned Reg = MI->getOperand(OpNum).getReg(); if (Reg) { assert(Reg == ARM::CPSR && "Expect ARM CPSR register!"); O << 's'; } } -void ARMAsmPrinter::printPCLabel(const MachineInstr *MI, int opNum) { - int Id = (int)MI->getOperand(opNum).getImm(); +void ARMAsmPrinter::printPCLabel(const MachineInstr *MI, int OpNum) { + int Id = (int)MI->getOperand(OpNum).getImm(); O << TAI->getPrivateGlobalPrefix() << "PC" << Id; } -void ARMAsmPrinter::printRegisterList(const MachineInstr *MI, int opNum) { +void ARMAsmPrinter::printRegisterList(const MachineInstr *MI, int OpNum) { O << "{"; - for (unsigned i = opNum, e = MI->getNumOperands(); i != e; ++i) { + for (unsigned i = OpNum, e = MI->getNumOperands(); i != e; ++i) { printOperand(MI, i); if (i != e-1) O << ", "; } O << "}"; } -void ARMAsmPrinter::printCPInstOperand(const MachineInstr *MI, int OpNo, +void ARMAsmPrinter::printCPInstOperand(const MachineInstr *MI, int OpNum, const char *Modifier) { assert(Modifier && "This operand only works with a modifier!"); // There are two aspects to a CONSTANTPOOL_ENTRY operand, the label and the // data itself. if (!strcmp(Modifier, "label")) { - unsigned ID = MI->getOperand(OpNo).getImm(); + unsigned ID = MI->getOperand(OpNum).getImm(); O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_' << ID << ":\n"; } else { assert(!strcmp(Modifier, "cpentry") && "Unknown modifier for CPE"); - unsigned CPI = MI->getOperand(OpNo).getIndex(); + unsigned CPI = MI->getOperand(OpNum).getIndex(); const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPI]; @@ -746,9 +805,9 @@ } } -void ARMAsmPrinter::printJTBlockOperand(const MachineInstr *MI, int OpNo) { - const MachineOperand &MO1 = MI->getOperand(OpNo); - const MachineOperand &MO2 = MI->getOperand(OpNo+1); // Unique Id +void ARMAsmPrinter::printJTBlockOperand(const MachineInstr *MI, int OpNum) { + const MachineOperand &MO1 = MI->getOperand(OpNum); + const MachineOperand &MO2 = MI->getOperand(OpNum+1); // Unique Id unsigned JTI = MO1.getIndex(); O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber() << '_' << JTI << '_' << MO2.getImm() << ":\n"; @@ -787,7 +846,7 @@ } -bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, +bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, unsigned AsmVariant, const char *ExtraCode){ // Does this asm operand have a single letter operand modifier? if (ExtraCode && ExtraCode[0]) { @@ -797,10 +856,10 @@ default: return true; // Unknown modifier. case 'a': // Don't print "#" before a global var name or constant. case 'c': // Don't print "$" before a global var name or constant. - printOperand(MI, OpNo, "no_hash"); + printOperand(MI, OpNum, "no_hash"); return false; case 'P': // Print a VFP double precision register. - printOperand(MI, OpNo); + printOperand(MI, OpNum); return false; case 'Q': if (TM.getTargetData()->isLittleEndian()) @@ -812,24 +871,24 @@ // Fallthrough case 'H': // Write second word of DI / DF reference. // Verify that this operand has two consecutive registers. - if (!MI->getOperand(OpNo).isReg() || - OpNo+1 == MI->getNumOperands() || - !MI->getOperand(OpNo+1).isReg()) + if (!MI->getOperand(OpNum).isReg() || + OpNum+1 == MI->getNumOperands() || + !MI->getOperand(OpNum+1).isReg()) return true; - ++OpNo; // Return the high-part. + ++OpNum; // Return the high-part. } } - printOperand(MI, OpNo); + printOperand(MI, OpNum); return false; } bool ARMAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, - unsigned OpNo, unsigned AsmVariant, + unsigned OpNum, unsigned AsmVariant, const char *ExtraCode) { if (ExtraCode && ExtraCode[0]) return true; // Unknown modifier. - printAddrMode2Operand(MI, OpNo); + printAddrMode2Operand(MI, OpNum); return false; } Modified: llvm/trunk/lib/Target/ARM/README.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/README.txt?rev=74420&r1=74419&r2=74420&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/README.txt (original) +++ llvm/trunk/lib/Target/ARM/README.txt Mon Jun 29 02:51:04 2009 @@ -530,3 +530,10 @@ ARM::MOVCCr is commutable (by flipping the condition). But we need to implement ARMInstrInfo::commuteInstruction() to support it. + +//===---------------------------------------------------------------------===// + +Split out LDR (literal) from normal ARM LDR instruction. Also consider spliting +LDR into imm12 and so_reg forms. This allows us to clean up some code. e.g. +ARMLoadStoreOptimizer does not need to look at LDR (literal) and LDR (so_reg) +while ARMConstantIslandPass only need to worry about LDR (literal). Modified: llvm/trunk/lib/Target/ARM/ThumbRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ThumbRegisterInfo.cpp?rev=74420&r1=74419&r2=74420&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ThumbRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ThumbRegisterInfo.cpp Mon Jun 29 02:51:04 2009 @@ -444,7 +444,7 @@ unsigned NumBits = 0; unsigned Scale = 1; switch (AddrMode) { - case ARMII::AddrModeTs: { + case ARMII::AddrModeT1_s: { ImmIdx = i+1; InstrOffs = MI.getOperand(ImmIdx).getImm(); NumBits = (FrameReg == ARM::SP) ? 8 : 5; @@ -472,7 +472,7 @@ } bool isThumSpillRestore = Opcode == ARM::tRestore || Opcode == ARM::tSpill; - if (AddrMode == ARMII::AddrModeTs) { + if (AddrMode == ARMII::AddrModeT1_s) { // Thumb tLDRspi, tSTRspi. These will change to instructions that use // a different base register. NumBits = 5; @@ -480,7 +480,7 @@ } // If this is a thumb spill / restore, we will be using a constpool load to // materialize the offset. - if (AddrMode == ARMII::AddrModeTs && isThumSpillRestore) + if (AddrMode == ARMII::AddrModeT1_s && isThumSpillRestore) ImmOp.ChangeToImmediate(0); else { // Otherwise, it didn't fit. Pull in what we can to simplify the immed. Modified: llvm/trunk/test/CodeGen/ARM/ldr.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/ldr.ll?rev=74420&r1=74419&r2=74420&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/ldr.ll (original) +++ llvm/trunk/test/CodeGen/ARM/ldr.ll Mon Jun 29 02:51:04 2009 @@ -1,23 +1,59 @@ -; RUN: llvm-as < %s | llc -march=arm | \ -; RUN: grep {ldr r0} | count 3 +; RUN: llvm-as < %s | llc -march=arm | grep {ldr r0} | count 7 +; RUN: llvm-as < %s | llc -march=arm | grep mov | grep 1 +; RUN: llvm-as < %s | llc -march=arm | not grep mvn +; RUN: llvm-as < %s | llc -march=arm | grep ldr | grep lsl +; RUN: llvm-as < %s | llc -march=arm | grep ldr | grep lsr define i32 @f1(i32* %v) { entry: - %tmp = load i32* %v ; [#uses=1] + %tmp = load i32* %v ret i32 %tmp } define i32 @f2(i32* %v) { entry: - %tmp2 = getelementptr i32* %v, i32 1023 ; [#uses=1] - %tmp = load i32* %tmp2 ; [#uses=1] + %tmp2 = getelementptr i32* %v, i32 1023 + %tmp = load i32* %tmp2 ret i32 %tmp } define i32 @f3(i32* %v) { entry: - %tmp2 = getelementptr i32* %v, i32 1024 ; [#uses=1] - %tmp = load i32* %tmp2 ; [#uses=1] + %tmp2 = getelementptr i32* %v, i32 1024 + %tmp = load i32* %tmp2 ret i32 %tmp } +define i32 @f4(i32 %base) { +entry: + %tmp1 = sub i32 %base, 128 + %tmp2 = inttoptr i32 %tmp1 to i32* + %tmp3 = load i32* %tmp2 + ret i32 %tmp3 +} + +define i32 @f5(i32 %base, i32 %offset) { +entry: + %tmp1 = add i32 %base, %offset + %tmp2 = inttoptr i32 %tmp1 to i32* + %tmp3 = load i32* %tmp2 + ret i32 %tmp3 +} + +define i32 @f6(i32 %base, i32 %offset) { +entry: + %tmp1 = shl i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i32* + %tmp4 = load i32* %tmp3 + ret i32 %tmp4 +} + +define i32 @f7(i32 %base, i32 %offset) { +entry: + %tmp1 = lshr i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i32* + %tmp4 = load i32* %tmp3 + ret i32 %tmp4 +} Added: llvm/trunk/test/CodeGen/Thumb2/thumb2-ldr.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-ldr.ll?rev=74420&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-ldr.ll (added) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-ldr.ll Mon Jun 29 02:51:04 2009 @@ -0,0 +1,59 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {ldr r0} | count 7 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep mvn +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep ldr | grep lsl +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep lsr | not grep ldr + +define i32 @f1(i32* %v) { +entry: + %tmp = load i32* %v + ret i32 %tmp +} + +define i32 @f2(i32* %v) { +entry: + %tmp2 = getelementptr i32* %v, i32 1023 + %tmp = load i32* %tmp2 + ret i32 %tmp +} + +define i32 @f3(i32* %v) { +entry: + %tmp2 = getelementptr i32* %v, i32 1024 + %tmp = load i32* %tmp2 + ret i32 %tmp +} + +define i32 @f4(i32 %base) { +entry: + %tmp1 = sub i32 %base, 128 + %tmp2 = inttoptr i32 %tmp1 to i32* + %tmp3 = load i32* %tmp2 + ret i32 %tmp3 +} + +define i32 @f5(i32 %base, i32 %offset) { +entry: + %tmp1 = add i32 %base, %offset + %tmp2 = inttoptr i32 %tmp1 to i32* + %tmp3 = load i32* %tmp2 + ret i32 %tmp3 +} + +define i32 @f6(i32 %base, i32 %offset) { +entry: + %tmp1 = shl i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i32* + %tmp4 = load i32* %tmp3 + ret i32 %tmp4 +} + +define i32 @f7(i32 %base, i32 %offset) { +entry: + %tmp1 = lshr i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i32* + %tmp4 = load i32* %tmp3 + ret i32 %tmp4 +} From xerxes at zafena.se Mon Jun 29 07:47:21 2009 From: xerxes at zafena.se (=?ISO-8859-1?Q?Xerxes_R=E5nby?=) Date: Mon, 29 Jun 2009 14:47:21 +0200 Subject: [llvm-commits] [patch] cmake add ThumbRegisterInfo.cpp to llvm/lib/Target/ARM/CMakeLists.txt Message-ID: <4A48B7D9.6060605@zafena.se> problem: Scanning dependencies of target llc [ 97%] Building CXX object tools/llc/CMakeFiles/llc.dir/llc.cpp.o Linking CXX executable ../../bin/llc ../../lib/libLLVMARMCodeGen.a(ARMTargetMachine.cpp.o): In function `llvm::ThumbRegisterInfo::~ThumbRegisterInfo()': ARMTargetMachine.cpp:(.text._ZN4llvm17ThumbRegisterInfoD1Ev[llvm::ThumbRegisterInfo::~ThumbRegisterInfo()]+0x7): undefined reference to `vtable for llvm::ThumbRegisterInfo' ../../lib/libLLVMARMCodeGen.a(ThumbInstrInfo.cpp.o): In function `llvm::ThumbInstrInfo::ThumbInstrInfo(llvm::ARMSubtarget const&)': ThumbInstrInfo.cpp:(.text+0x12e7): undefined reference to `llvm::ThumbRegisterInfo::ThumbRegisterInfo(llvm::TargetInstrInfo const&, llvm::ARMSubtarget const&)' ../../lib/libLLVMARMCodeGen.a(ThumbInstrInfo.cpp.o): In function `llvm::ThumbInstrInfo::ThumbInstrInfo(llvm::ARMSubtarget const&)': ThumbInstrInfo.cpp:(.text+0x134d): undefined reference to `llvm::ThumbRegisterInfo::ThumbRegisterInfo(llvm::TargetInstrInfo const&, llvm::ARMSubtarget const&)' collect2: ld returnerade avslutningsstatus 1 make[2]: *** [bin/llc] Fel 1 make[1]: *** [tools/llc/CMakeFiles/llc.dir/all] Fel 2 make: *** [all] Fel 2 solution: Include the new file ThumbRegisterInfo.cpp to llvm/lib/Target/ARM/CMakeLists.txt to make sure ThumbRegisterInfo.cpp are compiled and linked in. Cheers Xerxes -------------- next part -------------- A non-text attachment was scrubbed... Name: 29jun_fix_arm.patch Type: text/x-patch Size: 383 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090629/7770352b/attachment.bin From baldrick at free.fr Mon Jun 29 08:11:39 2009 From: baldrick at free.fr (Duncan Sands) Date: Mon, 29 Jun 2009 13:11:39 -0000 Subject: [llvm-commits] [llvm] r74421 - /llvm/trunk/lib/Target/ARM/CMakeLists.txt Message-ID: <200906291311.n5TDBgN2016679@zion.cs.uiuc.edu> Author: baldrick Date: Mon Jun 29 08:11:32 2009 New Revision: 74421 URL: http://llvm.org/viewvc/llvm-project?rev=74421&view=rev Log: Include the new file ThumbRegisterInfo.cpp to CMakeLists.txt to make sure ThumbRegisterInfo.cpp are compiled and linked in. Patch by Xerxes. Modified: llvm/trunk/lib/Target/ARM/CMakeLists.txt Modified: llvm/trunk/lib/Target/ARM/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/CMakeLists.txt?rev=74421&r1=74420&r2=74421&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/CMakeLists.txt (original) +++ llvm/trunk/lib/Target/ARM/CMakeLists.txt Mon Jun 29 08:11:32 2009 @@ -25,4 +25,5 @@ ARMTargetAsmInfo.cpp ARMTargetMachine.cpp ThumbInstrInfo.cpp + ThumbRegisterInfo.cpp ) From xerxes at zafena.se Mon Jun 29 08:28:21 2009 From: xerxes at zafena.se (=?ISO-8859-1?Q?Xerxes_R=E5nby?=) Date: Mon, 29 Jun 2009 15:28:21 +0200 Subject: [llvm-commits] [llvm] r74284 - in /llvm/trunk: cmake/config-ix.cmake include/llvm/Config/config.h.cmake - cmake bug? In-Reply-To: <4A450A7C.6020009@zafena.se> References: <200906261435.n5QEZiEn011654@zion.cs.uiuc.edu> <4A450A7C.6020009@zafena.se> Message-ID: <4A48C175.6070005@zafena.se> Added PR4476 for this cmake issue http://llvm.org/bugs/show_bug.cgi?id=4476 Xerxes R?nby skrev: > Hi Doug. > > Im having some issues with these two test when implemented using > check_symbol_exists(), they both fail when they should not. > cd llvm > svn up > cd .. > mkdir llvm-build > cd llvm-build > cmake ../llvm > ... > -- Looking for pthread_create in pthread > -- Looking for pthread_create in pthread - found > ... > -- Looking for pthread_mutex_lock > -- Looking for pthread_mutex_lock - found > -- Looking for pthread_rwlock_init > -- Looking for pthread_rwlock_init - not found. > -- Looking for pthread_getspecific > -- Looking for pthread_getspecific - not found. > > if i change config-ix.cmake to use check_library_exists() for the > tests then they both succeed on the same machine: > > -- Looking for pthread_create in pthread > -- Looking for pthread_create in pthread - found > -- Looking for pthread_getspecific in pthread > -- Looking for pthread_getspecific in pthread - found > -- Looking for pthread_rwlock_init in pthread > -- Looking for pthread_rwlock_init in pthread - found > ... > -- Looking for pthread_mutex_lock > -- Looking for pthread_mutex_lock - found > > Im a bit puzzled why check_symbol_exists() dont seem to work for these > two tests while working to find pthread_mutex_lock. > Could this be a cmake bug? > If i grep my /usr/include/pthread.h all the the symbols are there!: > > [xranby at pusspuss llvm-build]$ grep pthread_getspecific > /usr/include/pthread.h > extern void *pthread_getspecific (pthread_key_t __key) __THROW; > > [xranby at pusspuss llvm-build]$ grep pthread_rwlock_init > /usr/include/pthread.h > extern int pthread_rwlock_init (pthread_rwlock_t *__restrict __rwlock, > > [xranby at pusspuss llvm-build]$ grep pthread_mutex_lock > /usr/include/pthread.h > extern int pthread_mutex_lock (pthread_mutex_t *__mutex) > > > The attached patch fixes this issue by using check_library_exists() > for pthread_getspecific and pthread_rwlock_init test. > > Cheers > Xerxes > > Den 2009-06-26 16:35, Douglas Gregor skrev: >> Author: dgregor >> Date: Fri Jun 26 09:35:43 2009 >> New Revision: 74284 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=74284&view=rev >> Log: >> CMake: add configure checks for pthread_rwlock_init and >> pthread_getspecific >> >> Modified: >> llvm/trunk/cmake/config-ix.cmake >> llvm/trunk/include/llvm/Config/config.h.cmake >> >> Modified: llvm/trunk/cmake/config-ix.cmake >> URL: >> http://llvm.org/viewvc/llvm-project/llvm/trunk/cmake/config-ix.cmake?rev=74284&r1=74283&r2=74284&view=diff >> >> >> ============================================================================== >> >> --- llvm/trunk/cmake/config-ix.cmake (original) >> +++ llvm/trunk/cmake/config-ix.cmake Fri Jun 26 09:35:43 2009 >> @@ -64,6 +64,8 @@ >> check_symbol_exists(malloc_zone_statistics malloc/malloc.h >> HAVE_MALLOC_ZONE_STATISTICS) >> check_symbol_exists(pthread_mutex_lock pthread.h >> HAVE_PTHREAD_MUTEX_LOCK) >> +check_symbol_exists(pthread_rwlock_init pthread.h >> HAVE_PTHREAD_RWLOCK_INIT) >> +check_symbol_exists(pthread_getspecific pthread.h >> HAVE_PTHREAD_GETSPECIFIC) >> check_symbol_exists(strtoll stdlib.h HAVE_STRTOLL) >> > > ------------------------------------------------------------------------ > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From baldrick at free.fr Mon Jun 29 08:36:37 2009 From: baldrick at free.fr (Duncan Sands) Date: Mon, 29 Jun 2009 13:36:37 -0000 Subject: [llvm-commits] [llvm] r74422 - in /llvm/trunk: include/llvm/ADT/Triple.h lib/Support/Triple.cpp Message-ID: <200906291336.n5TDaiXG017391@zion.cs.uiuc.edu> Author: baldrick Date: Mon Jun 29 08:36:13 2009 New Revision: 74422 URL: http://llvm.org/viewvc/llvm-project?rev=74422&view=rev Log: Add triple for OpenBSD. Modified: llvm/trunk/include/llvm/ADT/Triple.h llvm/trunk/lib/Support/Triple.cpp Modified: llvm/trunk/include/llvm/ADT/Triple.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/Triple.h?rev=74422&r1=74421&r2=74422&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/Triple.h (original) +++ llvm/trunk/include/llvm/ADT/Triple.h Mon Jun 29 08:36:13 2009 @@ -53,7 +53,8 @@ Darwin, DragonFly, FreeBSD, - Linux + Linux, + OpenBSD }; private: Modified: llvm/trunk/lib/Support/Triple.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Triple.cpp?rev=74422&r1=74421&r2=74422&view=diff ============================================================================== --- llvm/trunk/lib/Support/Triple.cpp (original) +++ llvm/trunk/lib/Support/Triple.cpp Mon Jun 29 08:36:13 2009 @@ -48,6 +48,7 @@ case DragonFly: return "dragonfly"; case FreeBSD: return "freebsd"; case Linux: return "linux"; + case OpenBSD: return "openbsd"; } return ""; @@ -90,6 +91,8 @@ OS = FreeBSD; else if (memcmp(&OSName[0], "linux", 5) == 0) OS = Linux; + else if (memcmp(&OSName[0], "openbsd", 7) == 0) + OS = OpenBSD; else OS = UnknownOS; From david_goodwin at apple.com Mon Jun 29 10:33:34 2009 From: david_goodwin at apple.com (David Goodwin) Date: Mon, 29 Jun 2009 15:33:34 -0000 Subject: [llvm-commits] [llvm] r74423 - in /llvm/trunk: lib/Target/ARM/ARMISelLowering.cpp lib/Target/ARM/ARMISelLowering.h lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/ARMInstrThumb.td lib/Target/ARM/ARMInstrThumb2.td test/CodeGen/Thumb2/thumb2-cmn.ll Message-ID: <200906291533.n5TFXnSX020994@zion.cs.uiuc.edu> Author: david_goodwin Date: Mon Jun 29 10:33:01 2009 New Revision: 74423 URL: http://llvm.org/viewvc/llvm-project?rev=74423&view=rev Log: Rename ARMcmpNZ to ARMcmpZ and use it to represent comparisons that set only the Z flag (i.e. eq and ne). Make ARMcmpZ commutative. Added: llvm/trunk/test/CodeGen/Thumb2/thumb2-cmn.ll Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp llvm/trunk/lib/Target/ARM/ARMISelLowering.h llvm/trunk/lib/Target/ARM/ARMInstrInfo.td llvm/trunk/lib/Target/ARM/ARMInstrThumb.td llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=74423&r1=74422&r2=74423&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Mon Jun 29 10:33:01 2009 @@ -402,7 +402,7 @@ case ARMISD::RET_FLAG: return "ARMISD::RET_FLAG"; case ARMISD::PIC_ADD: return "ARMISD::PIC_ADD"; case ARMISD::CMP: return "ARMISD::CMP"; - case ARMISD::CMPNZ: return "ARMISD::CMPNZ"; + case ARMISD::CMPZ: return "ARMISD::CMPZ"; case ARMISD::CMPFP: return "ARMISD::CMPFP"; case ARMISD::CMPFPw0: return "ARMISD::CMPFPw0"; case ARMISD::FMSTAT: return "ARMISD::FMSTAT"; @@ -1592,10 +1592,8 @@ break; case ARMCC::EQ: case ARMCC::NE: - case ARMCC::MI: - case ARMCC::PL: - // Uses only N and Z Flags - CompareType = ARMISD::CMPNZ; + // Uses only Z Flag + CompareType = ARMISD::CMPZ; break; } ARMCC = DAG.getConstant(CondCode, MVT::i32); Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.h?rev=74423&r1=74422&r2=74423&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelLowering.h (original) +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.h Mon Jun 29 10:33:01 2009 @@ -45,7 +45,7 @@ PIC_ADD, // Add with a PC operand and a PIC label. CMP, // ARM compare instructions. - CMPNZ, // ARM compare that uses only N or Z flags. + CMPZ, // ARM compare that sets only Z flag. CMPFP, // ARM VFP compare instruction, sets FPSCR. CMPFPw0, // ARM VFP compare against zero instruction, sets FPSCR. FMSTAT, // ARM fmstat instruction. Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=74423&r1=74422&r2=74423&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Jun 29 10:33:01 2009 @@ -75,8 +75,8 @@ def ARMcmp : SDNode<"ARMISD::CMP", SDT_ARMCmp, [SDNPOutFlag]>; -def ARMcmpNZ : SDNode<"ARMISD::CMPNZ", SDT_ARMCmp, - [SDNPOutFlag]>; +def ARMcmpZ : SDNode<"ARMISD::CMPZ", SDT_ARMCmp, + [SDNPOutFlag,SDNPCommutative]>; def ARMpic_add : SDNode<"ARMISD::PIC_ADD", SDT_ARMPICAdd>; @@ -1272,19 +1272,19 @@ // Note that TST/TEQ don't set all the same flags that CMP does! defm TST : AI1_cmp_irs<0b1000, "tst", - BinOpFrag<(ARMcmpNZ (and node:$LHS, node:$RHS), 0)>, 1>; + BinOpFrag<(ARMcmpZ (and node:$LHS, node:$RHS), 0)>, 1>; defm TEQ : AI1_cmp_irs<0b1001, "teq", - BinOpFrag<(ARMcmpNZ (xor node:$LHS, node:$RHS), 0)>, 1>; + BinOpFrag<(ARMcmpZ (xor node:$LHS, node:$RHS), 0)>, 1>; -defm CMPnz : AI1_cmp_irs<0b1010, "cmp", - BinOpFrag<(ARMcmpNZ node:$LHS, node:$RHS)>>; -defm CMNnz : AI1_cmp_irs<0b1011, "cmn", - BinOpFrag<(ARMcmpNZ node:$LHS,(ineg node:$RHS))>>; +defm CMPz : AI1_cmp_irs<0b1010, "cmp", + BinOpFrag<(ARMcmpZ node:$LHS, node:$RHS)>>; +defm CMNz : AI1_cmp_irs<0b1011, "cmn", + BinOpFrag<(ARMcmpZ node:$LHS,(ineg node:$RHS))>>; def : ARMPat<(ARMcmp GPR:$src, so_imm_neg:$imm), (CMNri GPR:$src, so_imm_neg:$imm)>; -def : ARMPat<(ARMcmpNZ GPR:$src, so_imm_neg:$imm), +def : ARMPat<(ARMcmpZ GPR:$src, so_imm_neg:$imm), (CMNri GPR:$src, so_imm_neg:$imm)>; Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb.td?rev=74423&r1=74422&r2=74423&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb.td Mon Jun 29 10:33:01 2009 @@ -362,9 +362,9 @@ def tCMN : T1I<(outs), (ins tGPR:$lhs, tGPR:$rhs), "cmn $lhs, $rhs", [(ARMcmp tGPR:$lhs, (ineg tGPR:$rhs))]>; -def tCMNNZ : T1I<(outs), (ins tGPR:$lhs, tGPR:$rhs), - "cmn $lhs, $rhs", - [(ARMcmpNZ tGPR:$lhs, (ineg tGPR:$rhs))]>; +def tCMNZ : T1I<(outs), (ins tGPR:$lhs, tGPR:$rhs), + "cmn $lhs, $rhs", + [(ARMcmpZ tGPR:$lhs, (ineg tGPR:$rhs))]>; } // CMP immediate @@ -372,9 +372,9 @@ def tCMPi8 : T1I<(outs), (ins tGPR:$lhs, i32imm:$rhs), "cmp $lhs, $rhs", [(ARMcmp tGPR:$lhs, imm0_255:$rhs)]>; -def tCMPNZi8 : T1I<(outs), (ins tGPR:$lhs, i32imm:$rhs), - "cmp $lhs, $rhs", - [(ARMcmpNZ tGPR:$lhs, imm0_255:$rhs)]>; +def tCMPZi8 : T1I<(outs), (ins tGPR:$lhs, i32imm:$rhs), + "cmp $lhs, $rhs", + [(ARMcmpZ tGPR:$lhs, imm0_255:$rhs)]>; } @@ -383,9 +383,9 @@ def tCMPr : T1I<(outs), (ins tGPR:$lhs, tGPR:$rhs), "cmp $lhs, $rhs", [(ARMcmp tGPR:$lhs, tGPR:$rhs)]>; -def tCMPNZr : T1I<(outs), (ins tGPR:$lhs, tGPR:$rhs), - "cmp $lhs, $rhs", - [(ARMcmpNZ tGPR:$lhs, tGPR:$rhs)]>; +def tCMPZr : T1I<(outs), (ins tGPR:$lhs, tGPR:$rhs), + "cmp $lhs, $rhs", + [(ARMcmpZ tGPR:$lhs, tGPR:$rhs)]>; } // TODO: A7-37: CMP(3) - cmp hi regs @@ -551,7 +551,7 @@ let isCommutable = 1, Defs = [CPSR] in def tTST : T1I<(outs), (ins tGPR:$lhs, tGPR:$rhs), "tst $lhs, $rhs", - [(ARMcmpNZ (and tGPR:$lhs, tGPR:$rhs), 0)]>; + [(ARMcmpZ (and tGPR:$lhs, tGPR:$rhs), 0)]>; // zero-extend byte def tUXTB : T1I<(outs tGPR:$dst), (ins tGPR:$src), Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=74423&r1=74422&r2=74423&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Mon Jun 29 10:33:01 2009 @@ -607,18 +607,18 @@ defm t2CMP : T2I_cmp_is<"cmp", BinOpFrag<(ARMcmp node:$LHS, node:$RHS)>>; -defm t2CMPnz : T2I_cmp_is<"cmp", - BinOpFrag<(ARMcmpNZ node:$LHS, node:$RHS)>>; +defm t2CMPz : T2I_cmp_is<"cmp", + BinOpFrag<(ARMcmpZ node:$LHS, node:$RHS)>>; defm t2CMN : T2I_cmp_is<"cmn", BinOpFrag<(ARMcmp node:$LHS,(ineg node:$RHS))>>; -defm t2CMNnz : T2I_cmp_is<"cmn", - BinOpFrag<(ARMcmpNZ node:$LHS,(ineg node:$RHS))>>; +defm t2CMNz : T2I_cmp_is<"cmn", + BinOpFrag<(ARMcmpZ node:$LHS,(ineg node:$RHS))>>; def : T2Pat<(ARMcmp GPR:$src, t2_so_imm_neg:$imm), (t2CMNri GPR:$src, t2_so_imm_neg:$imm)>; -def : T2Pat<(ARMcmpNZ GPR:$src, t2_so_imm_neg:$imm), +def : T2Pat<(ARMcmpZ GPR:$src, t2_so_imm_neg:$imm), (t2CMNri GPR:$src, t2_so_imm_neg:$imm)>; // FIXME: TST, TEQ, etc. Added: llvm/trunk/test/CodeGen/Thumb2/thumb2-cmn.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-cmn.ll?rev=74423&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-cmn.ll (added) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-cmn.ll Mon Jun 29 10:33:01 2009 @@ -0,0 +1,25 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmn\\W*r\[0-9\],\\W*r\[0-9\]} | count 4 + +define i1 @f1(i32 %a, i32 %b) { + %nb = sub i32 0, %b + %tmp = icmp ne i32 %a, %nb + ret i1 %tmp +} + +define i1 @f2(i32 %a, i32 %b) { + %nb = sub i32 0, %b + %tmp = icmp ne i32 %nb, %a + ret i1 %tmp +} + +define i1 @f3(i32 %a, i32 %b) { + %nb = sub i32 0, %b + %tmp = icmp eq i32 %a, %nb + ret i1 %tmp +} + +define i1 @f4(i32 %a, i32 %b) { + %nb = sub i32 0, %b + %tmp = icmp eq i32 %nb, %a + ret i1 %tmp +} From brukman at cs.uiuc.edu Mon Jun 29 10:34:08 2009 From: brukman at cs.uiuc.edu (Misha Brukman) Date: Mon, 29 Jun 2009 10:34:08 -0500 Subject: [llvm-commits] CVS: llvm-www/pubs/pubs.js Message-ID: <200906291534.n5TFY8RD021009@zion.cs.uiuc.edu> Changes in directory llvm-www/pubs: pubs.js updated: 1.45 -> 1.46 --- Log message: Fixed spacing and removed unnecessary backslash in paper title. --- Diffs of the changes: (+1 -1) pubs.js | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm-www/pubs/pubs.js diff -u llvm-www/pubs/pubs.js:1.45 llvm-www/pubs/pubs.js:1.46 --- llvm-www/pubs/pubs.js:1.45 Sun Jun 28 16:12:34 2009 +++ llvm-www/pubs/pubs.js Mon Jun 29 10:27:34 2009 @@ -12,7 +12,7 @@ {url: '2009-06-PLDI-SoftBound.html', title: 'SoftBound: Highly Compatible and Complete Spatial Memory Safety for C', author: 'Santosh Nagarakatte, Jianzhou Zhao, Milo M K Martin and Steve Zdancewic', - published: "Proc. ACM SIGPLAN 2009 Conference on Programming Language Design \and Implementation (PLDI'09)", + published: "Proc. ACM SIGPLAN 2009 Conference on Programming Language Design and Implementation (PLDI'09)", location: "Dublin, Ireland", month: 6, year: 2009}, From bob.wilson at apple.com Mon Jun 29 10:57:52 2009 From: bob.wilson at apple.com (Bob Wilson) Date: Mon, 29 Jun 2009 08:57:52 -0700 Subject: [llvm-commits] [llvm] r73919 - in /llvm/trunk: include/llvm/ lib/Target/ARM/ lib/Target/ARM/AsmPrinter/ test/CodeGen/ARM/ In-Reply-To: References: <200906222327.n5MNR6TB005894@zion.cs.uiuc.edu> <305d6f60906221715r1adfafd6rde652f7d4df0c68f@mail.gmail.com> <41A29C22-6D98-48BC-BAAC-041B79A7A7E7@apple.com> <305d6f60906261411j5ccf3677p65ee3d6dd942afee@mail.gmail.com> <305d6f60906261726m11c4350bv25b77955015e72be@mail.gmail.com> Message-ID: On Jun 27, 2009, at 4:41 AM, Anton Korobeynikov wrote: >> Trivial patch attached. > Looks ok for me. Bob? Sure, I'm glad to see it is not more complicated than that. From gohman at apple.com Mon Jun 29 11:23:10 2009 From: gohman at apple.com (Dan Gohman) Date: Mon, 29 Jun 2009 16:23:10 -0000 Subject: [llvm-commits] [test-suite] r74425 - in /test-suite/trunk/MultiSource/Benchmarks/MallocBench/gs: gscolor.c gsimage.c iscan.c std.h zarray.c zpacked.c Message-ID: <200906291623.n5TGNAFD022740@zion.cs.uiuc.edu> Author: djg Date: Mon Jun 29 11:23:09 2009 New Revision: 74425 URL: http://llvm.org/viewvc/llvm-project?rev=74425&view=rev Log: Fix several bugs in MultiSource/Benchmarks/MallocBench/gs. This is enough to get this test to execute as successfully on x86-64 as it does on x86-32. Modified: test-suite/trunk/MultiSource/Benchmarks/MallocBench/gs/gscolor.c test-suite/trunk/MultiSource/Benchmarks/MallocBench/gs/gsimage.c test-suite/trunk/MultiSource/Benchmarks/MallocBench/gs/iscan.c test-suite/trunk/MultiSource/Benchmarks/MallocBench/gs/std.h test-suite/trunk/MultiSource/Benchmarks/MallocBench/gs/zarray.c test-suite/trunk/MultiSource/Benchmarks/MallocBench/gs/zpacked.c Modified: test-suite/trunk/MultiSource/Benchmarks/MallocBench/gs/gscolor.c URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/MultiSource/Benchmarks/MallocBench/gs/gscolor.c?rev=74425&r1=74424&r2=74425&view=diff ============================================================================== --- test-suite/trunk/MultiSource/Benchmarks/MallocBench/gs/gscolor.c (original) +++ test-suite/trunk/MultiSource/Benchmarks/MallocBench/gs/gscolor.c Mon Jun 29 11:23:09 2009 @@ -173,7 +173,7 @@ /* Convert the frequency to cell width and height */ { float cell_size = 72.0 / freq; gs_point pcwh; - gs_matrix imat; + gs_matrix imat = {}; int dev_w, dev_h; gs_deviceparams(gs_currentdevice(pgs), &imat, &dev_w, &dev_h); if ( (code = gs_distance_transform(cell_size, cell_size, Modified: test-suite/trunk/MultiSource/Benchmarks/MallocBench/gs/gsimage.c URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/MultiSource/Benchmarks/MallocBench/gs/gsimage.c?rev=74425&r1=74424&r2=74425&view=diff ============================================================================== --- test-suite/trunk/MultiSource/Benchmarks/MallocBench/gs/gsimage.c (original) +++ test-suite/trunk/MultiSource/Benchmarks/MallocBench/gs/gsimage.c Mon Jun 29 11:23:09 2009 @@ -32,6 +32,7 @@ #include "gzcolor.h" /* requires gxdevice.h */ #include "gzpath.h" #include "gximage.h" +#include /* Exported size of enumerator */ int gs_image_enum_sizeof = sizeof(gs_image_enum); @@ -108,19 +109,19 @@ /* Common setup for image and imagemask. */ /* Note that the mask tables depend on the end-orientation of the CPU. */ /* We can't simply define them as byte arrays, because */ -/* they might not wind up properly long- or short-aligned. */ +/* they might not wind up properly 32-bit or 16-bit-aligned. */ #define map4tox(a,b,c,d)\ 0, a, b, a+b, c, a+c, b+c, a+b+c,\ d, a+d, b+d, a+b+d, c+d, a+c+d, b+c+d, a+b+c+d #if big_endian -private unsigned long map_4_to_32[16] = +private uint32_t map_4_to_32[16] = { map4tox(0xffL, 0xff00L, 0xff0000L, 0xff000000L) }; -private unsigned short map_4_to_16[16] = +private uint16_t map_4_to_16[16] = { map4tox(0x55, 0xaa, 0x5500, 0xaa00) }; #else /* !big_endian */ -private unsigned long map_4_to_32[16] = +private uint32_t map_4_to_32[16] = { map4tox(0xff000000L, 0xff0000L, 0xff00L, 0xffL) }; -private unsigned short map_4_to_16[16] = +private uint16_t map_4_to_16[16] = { map4tox(0x5500, 0xaa00, 0x55, 0xaa) }; #endif private int @@ -321,7 +322,7 @@ private void image_unpack_0(gs_image_enum *penum, byte *bptr, register byte *data, uint dsize) -{ register unsigned long *bufp = (unsigned long *)bptr; +{ register uint32_t *bufp = (uint32_t *)bptr; int left = dsize; while ( left-- ) { register unsigned b = *data++; @@ -351,7 +352,7 @@ private void image_unpack_1(gs_image_enum *penum, byte *bptr, register byte *data, uint dsize) -{ register unsigned short *bufp = (unsigned short *)bptr; +{ register uint16_t *bufp = (uint16_t *)bptr; int left = dsize; while ( left-- ) { register unsigned b = *data++; Modified: test-suite/trunk/MultiSource/Benchmarks/MallocBench/gs/iscan.c URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/MultiSource/Benchmarks/MallocBench/gs/iscan.c?rev=74425&r1=74424&r2=74425&view=diff ============================================================================== --- test-suite/trunk/MultiSource/Benchmarks/MallocBench/gs/iscan.c (original) +++ test-suite/trunk/MultiSource/Benchmarks/MallocBench/gs/iscan.c Mon Jun 29 11:23:09 2009 @@ -30,6 +30,7 @@ #include "store.h" #include "stream.h" #include "scanchar.h" +#include /* Array packing flag */ int array_packing; @@ -78,10 +79,10 @@ private int dynamic_grow(register dynamic_area *pda) { uint num = pda->num_elts; - uint size = num * pda->elt_size; - uint new_num; + uintptr_t size = num * pda->elt_size; + uintptr_t new_num; uint pos = pda->next - pda->base; - size = (size < 10 ? 20 : size >= (max_uint >> 1) ? max_uint : size << 1); + size = (size < 10 ? 20 : size >= (max_uint >> 1) ? UINTPTR_MAX : size << 1); new_num = size / pda->elt_size; if ( pda->is_dynamic ) { pda->base = alloc_grow(pda->base, num, new_num, pda->elt_size, "scanner"); Modified: test-suite/trunk/MultiSource/Benchmarks/MallocBench/gs/std.h URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/MultiSource/Benchmarks/MallocBench/gs/std.h?rev=74425&r1=74424&r2=74425&view=diff ============================================================================== --- test-suite/trunk/MultiSource/Benchmarks/MallocBench/gs/std.h (original) +++ test-suite/trunk/MultiSource/Benchmarks/MallocBench/gs/std.h Mon Jun 29 11:23:09 2009 @@ -73,11 +73,11 @@ typedef unsigned long ulong; /* Maximum values for the unsigned types. */ -/* The "+0" is to get around apparent bugs in the UTek compiler. */ -#define max_uchar ((uchar)0xff + (uchar)0) -#define max_ushort ((ushort)0xffff + (ushort)0) -#define max_uint ((uint)0xffffffff + (uint)0) -#define max_ulong ((ulong)0xffffffffL + (ulong)0) +#include +#define max_uchar UCHAR_MAX +#define max_ushort USHRT_MAX +#define max_uint UINT_MAX +#define max_ulong ULONG_MAX /* Define a reliable arithmetic right shift. */ #if (-2 >> 1) == -1 Modified: test-suite/trunk/MultiSource/Benchmarks/MallocBench/gs/zarray.c URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/MultiSource/Benchmarks/MallocBench/gs/zarray.c?rev=74425&r1=74424&r2=74425&view=diff ============================================================================== --- test-suite/trunk/MultiSource/Benchmarks/MallocBench/gs/zarray.c (original) +++ test-suite/trunk/MultiSource/Benchmarks/MallocBench/gs/zarray.c Mon Jun 29 11:23:09 2009 @@ -26,6 +26,7 @@ #include "oper.h" #include "store.h" #include "sstorei.h" +#include /* The generic operators (copy, get, put, getinterval, putinterval, */ /* length, and forall) are implemented in zgeneric.c. */ @@ -63,7 +64,7 @@ /* astore */ int zastore(register ref *op) -{ uint size; +{ uintptr_t size; check_type(*op, t_array); check_write(*op); size = op->size; Modified: test-suite/trunk/MultiSource/Benchmarks/MallocBench/gs/zpacked.c URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/MultiSource/Benchmarks/MallocBench/gs/zpacked.c?rev=74425&r1=74424&r2=74425&view=diff ============================================================================== --- test-suite/trunk/MultiSource/Benchmarks/MallocBench/gs/zpacked.c (original) +++ test-suite/trunk/MultiSource/Benchmarks/MallocBench/gs/zpacked.c Mon Jun 29 11:23:09 2009 @@ -23,6 +23,7 @@ #include "errors.h" #include "oper.h" #include "store.h" +#include /* Import the array packing flag */ extern int array_packing; @@ -70,7 +71,7 @@ { int code = make_array(op, t_packedarray, a_read+a_execute, "packedarray"); if ( code < 0 ) return code; { /* Fill the array from the stack. */ - uint size = op->size; + uintptr_t size = op->size; if ( size > op - osbot ) return e_stackunderflow; refcpy(op->value.refs, op - size, size); op[-size] = *op; From devang.patel at gmail.com Mon Jun 29 11:24:55 2009 From: devang.patel at gmail.com (Devang Patel) Date: Mon, 29 Jun 2009 09:24:55 -0700 Subject: [llvm-commits] [llvm] r74400 - in /llvm/trunk: include/llvm/Analysis/LoopDependenceAnalysis.h lib/Analysis/LoopDependenceAnalysis.cpp In-Reply-To: <200906280016.n5S0G81I024417@zion.cs.uiuc.edu> References: <200906280016.n5S0G81I024417@zion.cs.uiuc.edu> Message-ID: <352a1fb20906290924j2ab14facsb1d481c4ba695a77@mail.gmail.com> Andreas, Here supporting only raw_ostream from llvm/Support interface is enough, no need to support direct std::ostream interface. - Devang On Sat, Jun 27, 2009 at 5:16 PM, Andreas Bolka wrote: > Author: abolka > Date: Sat Jun 27 19:16:08 2009 > New Revision: 74400 > > URL: http://llvm.org/viewvc/llvm-project?rev=74400&view=rev > Log: > LDA analysis output scaffolding. > > Modified: > ? ?llvm/trunk/include/llvm/Analysis/LoopDependenceAnalysis.h > ? ?llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp > > Modified: llvm/trunk/include/llvm/Analysis/LoopDependenceAnalysis.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/LoopDependenceAnalysis.h?rev=74400&r1=74399&r2=74400&view=diff > > ============================================================================== > --- llvm/trunk/include/llvm/Analysis/LoopDependenceAnalysis.h (original) > +++ llvm/trunk/include/llvm/Analysis/LoopDependenceAnalysis.h Sat Jun 27 19:16:08 2009 > @@ -21,11 +21,12 @@ > ?#define LLVM_ANALYSIS_LOOP_DEPENDENCE_ANALYSIS_H > > ?#include "llvm/Analysis/LoopPass.h" > +#include "llvm/Support/raw_ostream.h" > +#include > > ?namespace llvm { > > ? class AnalysisUsage; > - ?class LoopPass; > ? class ScalarEvolution; > > ? class LoopDependenceAnalysis : public LoopPass { > @@ -39,6 +40,12 @@ > ? ? bool runOnLoop(Loop*, LPPassManager&); > > ? ? virtual void getAnalysisUsage(AnalysisUsage&) const; > + > + ? ?void print(raw_ostream&, const Module* = 0) const; > + ? ?virtual void print(std::ostream&, const Module* = 0) const; > + ? ?void print(std::ostream *OS, const Module *M = 0) const { > + ? ? ?if (OS) print(*OS, M); > + ? ?} > ? }; // class LoopDependenceAnalysis > > > > Modified: llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp?rev=74400&r1=74399&r2=74400&view=diff > > ============================================================================== > --- llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp (original) > +++ llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp Sat Jun 27 19:16:08 2009 > @@ -43,5 +43,23 @@ > > ?void LoopDependenceAnalysis::getAnalysisUsage(AnalysisUsage &AU) const { > ? AU.setPreservesAll(); > - ?AU.addRequired(); > + ?AU.addRequiredTransitive(); > +} > + > +static void PrintLoopInfo( > + ? ?raw_ostream &OS, const LoopDependenceAnalysis *LDA, const Loop *L) { > + ?if (!L->empty()) return; // ignore non-innermost loops > + > + ?OS << "Loop at depth " << L->getLoopDepth() << ", header block: "; > + ?WriteAsOperand(OS, L->getHeader(), false); > + ?OS << "\n"; > +} > + > +void LoopDependenceAnalysis::print(raw_ostream &OS, const Module*) const { > + ?PrintLoopInfo(OS, this, this->L); > +} > + > +void LoopDependenceAnalysis::print(std::ostream &OS, const Module *M) const { > + ?raw_os_ostream os(OS); > + ?print(os, M); > ?} > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > -- - Devang From devang.patel at gmail.com Mon Jun 29 11:28:29 2009 From: devang.patel at gmail.com (Devang Patel) Date: Mon, 29 Jun 2009 09:28:29 -0700 Subject: [llvm-commits] [llvm] r74401 - in /llvm/trunk: include/llvm/Analysis/LoopDependenceAnalysis.h lib/Analysis/LoopDependenceAnalysis.cpp In-Reply-To: <200906280021.n5S0LMGW024672@zion.cs.uiuc.edu> References: <200906280021.n5S0LMGW024672@zion.cs.uiuc.edu> Message-ID: <352a1fb20906290928m32b60b2at3de88f145c5b6520@mail.gmail.com> Andreas, On Sat, Jun 27, 2009 at 5:21 PM, Andreas Bolka wrote: > + > +static inline bool isMemRefInstr(const Value *I) { > + ?return isa(I) || isa(I); > +} > + Pl. use Instruction::mayWriteToMemory() and Instruction::mayReadFromMemory() to check memory reference. - Devang From edwintorok at gmail.com Mon Jun 29 11:29:14 2009 From: edwintorok at gmail.com (=?ISO-8859-1?Q?T=F6r=F6k_Edwin?=) Date: Mon, 29 Jun 2009 19:29:14 +0300 Subject: [llvm-commits] [test-suite] r74425 - in /test-suite/trunk/MultiSource/Benchmarks/MallocBench/gs: gscolor.c gsimage.c iscan.c std.h zarray.c zpacked.c In-Reply-To: <200906291623.n5TGNAFD022740@zion.cs.uiuc.edu> References: <200906291623.n5TGNAFD022740@zion.cs.uiuc.edu> Message-ID: <4A48EBDA.8040509@gmail.com> On 2009-06-29 19:23, Dan Gohman wrote: > Author: djg > Date: Mon Jun 29 11:23:09 2009 > New Revision: 74425 > > URL: http://llvm.org/viewvc/llvm-project?rev=74425&view=rev > Log: > Fix several bugs in MultiSource/Benchmarks/MallocBench/gs. This is enough > to get this test to execute as successfully on x86-64 as it does on x86-32. > Thanks Dan. Does this fix PR2913? Best regards, --Edwin From brukman at cs.uiuc.edu Mon Jun 29 11:43:45 2009 From: brukman at cs.uiuc.edu (Misha Brukman) Date: Mon, 29 Jun 2009 11:43:45 -0500 Subject: [llvm-commits] CVS: llvm-www/pubs/index.html pubs.js Message-ID: <200906291643.n5TGhjxt023422@zion.cs.uiuc.edu> Changes in directory llvm-www/pubs: index.html updated: 1.91 -> 1.92 pubs.js updated: 1.46 -> 1.47 --- Log message: Added a histogram of publications over years as a chart. --- Diffs of the changes: (+56 -3) index.html | 9 ++++++--- pubs.js | 50 ++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 56 insertions(+), 3 deletions(-) Index: llvm-www/pubs/index.html diff -u llvm-www/pubs/index.html:1.91 llvm-www/pubs/index.html:1.92 --- llvm-www/pubs/index.html:1.91 Fri Dec 26 12:43:11 2008 +++ llvm-www/pubs/index.html Mon Jun 29 11:39:50 2009 @@ -1,11 +1,14 @@
LLVM Related Publications
-
-
+ +
- + Index: llvm-www/pubs/pubs.js diff -u llvm-www/pubs/pubs.js:1.46 llvm-www/pubs/pubs.js:1.47 --- llvm-www/pubs/pubs.js:1.46 Mon Jun 29 10:27:34 2009 +++ llvm-www/pubs/pubs.js Mon Jun 29 11:39:51 2009 @@ -858,3 +858,53 @@ } } +/** + * Displays a histogram of publications by year as a chart, using Google Chart + * API. See http://code.google.com/apis/chart/ for more info. + * + * @param {string} id ID of the element that will serve as the parent of + * the chart. + */ +function displayPubsHistogram(id) { + var histogram = {}; + for (var i = 0; i < PUBS.length; ++i) { + var pub = PUBS[i]; + if (isDef(pub.year)) { + if (isDef(histogram[pub.year])) { + histogram[pub.year]++; + } else { + histogram[pub.year] = 1; + } + } + } + + // Sort the years in the histogram map to use for x-axis labels. + var sortedYears = []; + for (var year in histogram) { + sortedYears.push(year); + } + sortedYears.sort(function(a, b) { return a - b; }); + + // Get the data that corresponds to the sorted x-axis labels to be used as + // y-axis data. Also get the max count to use in chart scaling. + var countDataBySortedYear = []; + var maxCount = 0; + for (var i = 0; i < sortedYears.length; ++i) { + var count = histogram[sortedYears[i]]; + countDataBySortedYear.push(count); + maxCount = (count > maxCount) ? count : maxCount; + } + + var container = document.getElementById(id); + var image = document.createElement('img'); + image.src = 'http://www.google.com/chart?cht=bvs' + // vertical bars + '&chs=300x200' + // size + '&chtt=Histogram' + // title + '&chdl=Count' + // label in legend + '&chxt=x,y' + // axes + '&chxl=0:|' + sortedYears.join('|') + // x-axis labels + '&chxr=1,0,' + (maxCount + 5) + // y-axis range + '&chds=0,' + (maxCount + 5) + // scaling + '&chd=t:' + countDataBySortedYear.join(','); // chart data + container.appendChild(image); +} From greened at obbligato.org Mon Jun 29 11:47:30 2009 From: greened at obbligato.org (David Greene) Date: Mon, 29 Jun 2009 16:47:30 -0000 Subject: [llvm-commits] [llvm] r74427 - in /llvm/trunk: include/llvm/CodeGen/ValueTypes.h include/llvm/CodeGen/ValueTypes.td include/llvm/Intrinsics.td lib/Target/X86/X86ISelLowering.cpp lib/VMCore/ValueTypes.cpp utils/TableGen/CodeGenTarget.cpp Message-ID: <200906291647.n5TGlbGj023545@zion.cs.uiuc.edu> Author: greened Date: Mon Jun 29 11:47:10 2009 New Revision: 74427 URL: http://llvm.org/viewvc/llvm-project?rev=74427&view=rev Log: Add more vector ValueTypes for AVX and other extended vector instruction sets. Modified: llvm/trunk/include/llvm/CodeGen/ValueTypes.h llvm/trunk/include/llvm/CodeGen/ValueTypes.td llvm/trunk/include/llvm/Intrinsics.td llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/lib/VMCore/ValueTypes.cpp llvm/trunk/utils/TableGen/CodeGenTarget.cpp Modified: llvm/trunk/include/llvm/CodeGen/ValueTypes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ValueTypes.h?rev=74427&r1=74426&r2=74427&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/ValueTypes.h (original) +++ llvm/trunk/include/llvm/CodeGen/ValueTypes.h Mon Jun 29 11:47:10 2009 @@ -52,29 +52,34 @@ v2i8 = 14, // 2 x i8 v4i8 = 15, // 4 x i8 - v2i16 = 16, // 2 x i16 - v8i8 = 17, // 8 x i8 - v4i16 = 18, // 4 x i16 - v2i32 = 19, // 2 x i32 - v1i64 = 20, // 1 x i64 - v16i8 = 21, // 16 x i8 - v8i16 = 22, // 8 x i16 - v3i32 = 23, // 3 x i32 - v4i32 = 24, // 4 x i32 - v2i64 = 25, // 2 x i64 - - v2f32 = 26, // 2 x f32 - v3f32 = 27, // 3 x f32 - v4f32 = 28, // 4 x f32 - v2f64 = 29, // 2 x f64 - + v8i8 = 16, // 8 x i8 + v16i8 = 17, // 16 x i8 + v32i8 = 18, // 32 x i8 + v2i16 = 19, // 2 x i16 + v4i16 = 20, // 4 x i16 + v8i16 = 21, // 8 x i16 + v16i16 = 22, // 16 x i16 + v2i32 = 23, // 2 x i32 + v3i32 = 24, // 3 x i32 + v4i32 = 25, // 4 x i32 + v8i32 = 26, // 8 x i32 + v1i64 = 27, // 1 x i64 + v2i64 = 28, // 2 x i64 + v4i64 = 29, // 4 x i64 + + v2f32 = 30, // 2 x f32 + v3f32 = 31, // 3 x f32 + v4f32 = 32, // 4 x f32 + v8f32 = 33, // 8 x f32 + v2f64 = 34, // 2 x f64 + v4f64 = 35, // 4 x f64 + FIRST_VECTOR_VALUETYPE = v2i8, - LAST_VECTOR_VALUETYPE = v2f64, + LAST_VECTOR_VALUETYPE = v4f64, - LAST_VALUETYPE = 30, // This always remains at the end of the list. + LAST_VALUETYPE = 36, // This always remains at the end of the list. // This is the current maximum for LAST_VALUETYPE. - // Affects ValueTypeActions in TargetLowering.h. // MVT::MAX_ALLOWED_VALUETYPE is used for asserts and to size bit vectors // This value must be a multiple of 32. MAX_ALLOWED_VALUETYPE = 64, @@ -179,28 +184,34 @@ if (NumElements == 4) return v4i8; if (NumElements == 8) return v8i8; if (NumElements == 16) return v16i8; + if (NumElements == 32) return v32i8; break; case i16: if (NumElements == 2) return v2i16; if (NumElements == 4) return v4i16; if (NumElements == 8) return v8i16; + if (NumElements == 16) return v16i16; break; case i32: if (NumElements == 2) return v2i32; if (NumElements == 3) return v3i32; if (NumElements == 4) return v4i32; + if (NumElements == 8) return v8i32; break; case i64: if (NumElements == 1) return v1i64; if (NumElements == 2) return v2i64; + if (NumElements == 4) return v4i64; break; case f32: if (NumElements == 2) return v2f32; if (NumElements == 3) return v3f32; if (NumElements == 4) return v4f32; + if (NumElements == 8) return v8f32; break; case f64: if (NumElements == 2) return v2f64; + if (NumElements == 4) return v4f64; break; } return getExtendedVectorVT(VT, NumElements); @@ -235,15 +246,15 @@ /// isFloatingPoint - Return true if this is a FP, or a vector FP type. bool isFloatingPoint() const { return isSimple() ? - ((V >= f32 && V <= ppcf128) || (V >= v2f32 && V <= v2f64)) : - isExtendedFloatingPoint(); + ((V >= f32 && V <= ppcf128) || + (V >= v2f32 && V <= v4f64)) : isExtendedFloatingPoint(); } /// isInteger - Return true if this is an integer, or a vector integer type. bool isInteger() const { return isSimple() ? ((V >= FIRST_INTEGER_VALUETYPE && V <= LAST_INTEGER_VALUETYPE) || - (V >= v2i8 && V <= v2i64)) : isExtendedInteger(); + (V >= v2i8 && V <= v4i64)) : isExtendedInteger(); } /// isVector - Return true if this is a vector value type. @@ -268,6 +279,13 @@ isExtended128BitVector(); } + /// is256BitVector - Return true if this is a 256-bit vector type. + inline bool is256BitVector() const { + return isSimple() ? + (V==v8f32 || V==v4f64 || V==v32i8 || V==v16i16 || V==v8i32 || + V==v4i64) : isExtended256BitVector(); + } + /// isByteSized - Return true if the bit size is a multiple of 8. bool isByteSized() const { return (getSizeInBits() & 7) == 0; @@ -322,19 +340,25 @@ case v2i8 : case v4i8 : case v8i8 : - case v16i8: return i8; + case v16i8: + case v32i8: return i8; case v2i16: case v4i16: - case v8i16: return i16; + case v8i16: + case v16i16: return i16; case v2i32: case v3i32: - case v4i32: return i32; + case v4i32: + case v8i32: return i32; case v1i64: - case v2i64: return i64; + case v2i64: + case v4i64: return i64; case v2f32: case v3f32: - case v4f32: return f32; - case v2f64: return f64; + case v4f32: + case v8f32: return f32; + case v2f64: + case v4f64: return f64; } } @@ -345,13 +369,19 @@ switch (V) { default: return getExtendedVectorNumElements(); - case v16i8: return 16; + case v32i8: return 32; + case v16i8: + case v16i16: return 16; case v8i8 : - case v8i16: return 8; + case v8i16: + case v8i32: + case v8f32: return 8; case v4i8: case v4i16: case v4i32: - case v4f32: return 4; + case v4i64: + case v4f32: + case v4f64: return 4; case v3i32: case v3f32: return 3; case v2i8: @@ -402,6 +432,12 @@ case v2i64: case v4f32: case v2f64: return 128; + case v32i8: + case v16i16: + case v8i32: + case v4i64: + case v8f32: + case v4f64: return 256; } } @@ -478,6 +514,7 @@ bool isExtendedVector() const; bool isExtended64BitVector() const; bool isExtended128BitVector() const; + bool isExtended256BitVector() const; MVT getExtendedVectorElementType() const; unsigned getExtendedVectorNumElements() const; unsigned getExtendedSizeInBits() const; Modified: llvm/trunk/include/llvm/CodeGen/ValueTypes.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ValueTypes.td?rev=74427&r1=74426&r2=74427&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/ValueTypes.td (original) +++ llvm/trunk/include/llvm/CodeGen/ValueTypes.td Mon Jun 29 11:47:10 2009 @@ -33,25 +33,31 @@ def ppcf128: ValueType<128, 11>; // PPC 128-bit floating point value def FlagVT : ValueType<0 , 12>; // Condition code or machine flag def isVoid : ValueType<0 , 13>; // Produces no value + def v2i8 : ValueType<16 , 14>; // 2 x i8 vector value def v4i8 : ValueType<32 , 15>; // 4 x i8 vector value -def v2i16 : ValueType<32 , 16>; // 2 x i16 vector value -def v8i8 : ValueType<64 , 17>; // 8 x i8 vector value -def v4i16 : ValueType<64 , 18>; // 4 x i16 vector value -def v2i32 : ValueType<64 , 19>; // 2 x i32 vector value -def v1i64 : ValueType<64 , 20>; // 1 x i64 vector value - -def v16i8 : ValueType<128, 21>; // 16 x i8 vector value -def v8i16 : ValueType<128, 22>; // 8 x i16 vector value -def v3i32 : ValueType<96 , 23>; // 3 x i32 vector value -def v4i32 : ValueType<128, 24>; // 4 x i32 vector value -def v2i64 : ValueType<128, 25>; // 2 x i64 vector value - -def v2f32 : ValueType<64, 26>; // 2 x f32 vector value -def v3f32 : ValueType<96 , 27>; // 3 x f32 vector value -def v4f32 : ValueType<128, 28>; // 4 x f32 vector value -def v2f64 : ValueType<128, 29>; // 2 x f64 vector value - +def v8i8 : ValueType<64 , 16>; // 8 x i8 vector value +def v16i8 : ValueType<128, 17>; // 16 x i8 vector value +def v32i8 : ValueType<256, 18>; // 32 x i8 vector value +def v2i16 : ValueType<32 , 19>; // 2 x i16 vector value +def v4i16 : ValueType<64 , 20>; // 4 x i16 vector value +def v8i16 : ValueType<128, 21>; // 8 x i16 vector value +def v16i16 : ValueType<256, 22>; // 16 x i16 vector value +def v2i32 : ValueType<64 , 23>; // 2 x i32 vector value +def v3i32 : ValueType<96 , 24>; // 3 x i32 vector value +def v4i32 : ValueType<128, 25>; // 4 x i32 vector value +def v8i32 : ValueType<256, 26>; // 8 x f32 vector value +def v1i64 : ValueType<64 , 27>; // 1 x i64 vector value +def v2i64 : ValueType<128, 28>; // 2 x i64 vector value +def v4i64 : ValueType<256, 29>; // 4 x f64 vector value + +def v2f32 : ValueType<64, 30>; // 2 x f32 vector value +def v3f32 : ValueType<96 , 31>; // 3 x f32 vector value +def v4f32 : ValueType<128, 32>; // 4 x f32 vector value +def v8f32 : ValueType<256, 33>; // 8 x f32 vector value +def v2f64 : ValueType<128, 34>; // 2 x f64 vector value +def v4f64 : ValueType<256, 35>; // 4 x f64 vector value + // Pseudo valuetype mapped to the current pointer size to any address space. // Should only be used in TableGen. def iPTRAny : ValueType<0, 252>; Modified: llvm/trunk/include/llvm/Intrinsics.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Intrinsics.td?rev=74427&r1=74426&r2=74427&view=diff ============================================================================== --- llvm/trunk/include/llvm/Intrinsics.td (original) +++ llvm/trunk/include/llvm/Intrinsics.td Mon Jun 29 11:47:10 2009 @@ -110,22 +110,32 @@ def llvm_empty_ty : LLVMType; // { } def llvm_descriptor_ty : LLVMPointerType; // { }* +def llvm_v2i8_ty : LLVMType; // 2 x i8 +def llvm_v4i8_ty : LLVMType; // 4 x i8 +def llvm_v8i8_ty : LLVMType; // 8 x i8 def llvm_v16i8_ty : LLVMType; // 16 x i8 +def llvm_v32i8_ty : LLVMType; // 32 x i8 +def llvm_v2i16_ty : LLVMType; // 4 x i16 +def llvm_v4i16_ty : LLVMType; // 4 x i16 def llvm_v8i16_ty : LLVMType; // 8 x i16 -def llvm_v2i64_ty : LLVMType; // 2 x i64 +def llvm_v16i16_ty : LLVMType; // 16 x i16 def llvm_v2i32_ty : LLVMType; // 2 x i32 -def llvm_v1i64_ty : LLVMType; // 1 x i64 def llvm_v4i32_ty : LLVMType; // 4 x i32 +def llvm_v8i32_ty : LLVMType; // 8 x i32 +def llvm_v1i64_ty : LLVMType; // 1 x i64 +def llvm_v2i64_ty : LLVMType; // 2 x i64 +def llvm_v4i64_ty : LLVMType; // 4 x i64 + def llvm_v2f32_ty : LLVMType; // 2 x float +def llvm_v3f32_ty : LLVMType; // 3 x float def llvm_v4f32_ty : LLVMType; // 4 x float +def llvm_v8f32_ty : LLVMType; // 8 x float def llvm_v2f64_ty : LLVMType; // 2 x double - -// MMX Vector Types -def llvm_v8i8_ty : LLVMType; // 8 x i8 -def llvm_v4i16_ty : LLVMType; // 4 x i16 +def llvm_v4f64_ty : LLVMType; // 4 x double def llvm_vararg_ty : LLVMType; // this means vararg here + //===----------------------------------------------------------------------===// // Intrinsic Definitions. //===----------------------------------------------------------------------===// Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=74427&r1=74426&r2=74427&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Jun 29 11:47:10 2009 @@ -700,6 +700,9 @@ // Do not attempt to custom lower non-power-of-2 vectors if (!isPowerOf2_32(VT.getVectorNumElements())) continue; + // Do not attempt to custom lower non-128-bit vectors + if (!VT.is128BitVector()) + continue; setOperationAction(ISD::BUILD_VECTOR, VT, Custom); setOperationAction(ISD::VECTOR_SHUFFLE, VT, Custom); setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT, Custom); @@ -718,17 +721,23 @@ } // Promote v16i8, v8i16, v4i32 load, select, and, or, xor to v2i64. - for (unsigned VT = (unsigned)MVT::v16i8; VT != (unsigned)MVT::v2i64; VT++) { - setOperationAction(ISD::AND, (MVT::SimpleValueType)VT, Promote); - AddPromotedToType (ISD::AND, (MVT::SimpleValueType)VT, MVT::v2i64); - setOperationAction(ISD::OR, (MVT::SimpleValueType)VT, Promote); - AddPromotedToType (ISD::OR, (MVT::SimpleValueType)VT, MVT::v2i64); - setOperationAction(ISD::XOR, (MVT::SimpleValueType)VT, Promote); - AddPromotedToType (ISD::XOR, (MVT::SimpleValueType)VT, MVT::v2i64); - setOperationAction(ISD::LOAD, (MVT::SimpleValueType)VT, Promote); - AddPromotedToType (ISD::LOAD, (MVT::SimpleValueType)VT, MVT::v2i64); - setOperationAction(ISD::SELECT, (MVT::SimpleValueType)VT, Promote); - AddPromotedToType (ISD::SELECT, (MVT::SimpleValueType)VT, MVT::v2i64); + for (unsigned i = (unsigned)MVT::v16i8; i != (unsigned)MVT::v2i64; i++) { + MVT VT = (MVT::SimpleValueType)i; + + // Do not attempt to promote non-128-bit vectors + if (!VT.is128BitVector()) { + continue; + } + setOperationAction(ISD::AND, VT, Promote); + AddPromotedToType (ISD::AND, VT, MVT::v2i64); + setOperationAction(ISD::OR, VT, Promote); + AddPromotedToType (ISD::OR, VT, MVT::v2i64); + setOperationAction(ISD::XOR, VT, Promote); + AddPromotedToType (ISD::XOR, VT, MVT::v2i64); + setOperationAction(ISD::LOAD, VT, Promote); + AddPromotedToType (ISD::LOAD, VT, MVT::v2i64); + setOperationAction(ISD::SELECT, VT, Promote); + AddPromotedToType (ISD::SELECT, VT, MVT::v2i64); } setTruncStoreAction(MVT::f64, MVT::f32, Expand); @@ -775,6 +784,109 @@ setOperationAction(ISD::VSETCC, MVT::v2i64, Custom); } + if (!UseSoftFloat && Subtarget->hasAVX()) { + setOperationAction(ISD::LOAD, MVT::v8f32, Legal); + setOperationAction(ISD::LOAD, MVT::v8i32, Legal); + setOperationAction(ISD::LOAD, MVT::v4f64, Legal); + setOperationAction(ISD::LOAD, MVT::v4i64, Legal); + setOperationAction(ISD::FADD, MVT::v8f32, Legal); + setOperationAction(ISD::FSUB, MVT::v8f32, Legal); + setOperationAction(ISD::FMUL, MVT::v8f32, Legal); + setOperationAction(ISD::FDIV, MVT::v8f32, Legal); + setOperationAction(ISD::FSQRT, MVT::v8f32, Legal); + setOperationAction(ISD::FNEG, MVT::v8f32, Custom); + //setOperationAction(ISD::BUILD_VECTOR, MVT::v8f32, Custom); + //setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v8f32, Custom); + //setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v8f32, Custom); + //setOperationAction(ISD::SELECT, MVT::v8f32, Custom); + //setOperationAction(ISD::VSETCC, MVT::v8f32, Custom); + + // Operations to consider commented out -v16i16 v32i8 + //setOperationAction(ISD::ADD, MVT::v16i16, Legal); + setOperationAction(ISD::ADD, MVT::v8i32, Custom); + setOperationAction(ISD::ADD, MVT::v4i64, Custom); + //setOperationAction(ISD::SUB, MVT::v32i8, Legal); + //setOperationAction(ISD::SUB, MVT::v16i16, Legal); + setOperationAction(ISD::SUB, MVT::v8i32, Custom); + setOperationAction(ISD::SUB, MVT::v4i64, Custom); + //setOperationAction(ISD::MUL, MVT::v16i16, Legal); + setOperationAction(ISD::FADD, MVT::v4f64, Legal); + setOperationAction(ISD::FSUB, MVT::v4f64, Legal); + setOperationAction(ISD::FMUL, MVT::v4f64, Legal); + setOperationAction(ISD::FDIV, MVT::v4f64, Legal); + setOperationAction(ISD::FSQRT, MVT::v4f64, Legal); + setOperationAction(ISD::FNEG, MVT::v4f64, Custom); + + setOperationAction(ISD::VSETCC, MVT::v4f64, Custom); + // setOperationAction(ISD::VSETCC, MVT::v32i8, Custom); + // setOperationAction(ISD::VSETCC, MVT::v16i16, Custom); + setOperationAction(ISD::VSETCC, MVT::v8i32, Custom); + + // setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v32i8, Custom); + // setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v16i16, Custom); + // setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v16i16, Custom); + setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v8i32, Custom); + setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v8f32, Custom); + + setOperationAction(ISD::BUILD_VECTOR, MVT::v4f64, Custom); + setOperationAction(ISD::BUILD_VECTOR, MVT::v4i64, Custom); + setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v4f64, Custom); + setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v4i64, Custom); + setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4f64, Custom); + setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v4f64, Custom); + +#if 0 + // Not sure we want to do this since there are no 256-bit integer + // operations in AVX + + // Custom lower build_vector, vector_shuffle, and extract_vector_elt. + // This includes 256-bit vectors + for (unsigned i = (unsigned)MVT::v16i8; i != (unsigned)MVT::v4i64; ++i) { + MVT VT = (MVT::SimpleValueType)i; + + // Do not attempt to custom lower non-power-of-2 vectors + if (!isPowerOf2_32(VT.getVectorNumElements())) + continue; + + setOperationAction(ISD::BUILD_VECTOR, VT, Custom); + setOperationAction(ISD::VECTOR_SHUFFLE, VT, Custom); + setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT, Custom); + } + + if (Subtarget->is64Bit()) { + setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4i64, Custom); + setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v4i64, Custom); + } +#endif + +#if 0 + // Not sure we want to do this since there are no 256-bit integer + // operations in AVX + + // Promote v32i8, v16i16, v8i32 load, select, and, or, xor to v4i64. + // Including 256-bit vectors + for (unsigned i = (unsigned)MVT::v16i8; i != (unsigned)MVT::v4i64; i++) { + MVT VT = (MVT::SimpleValueType)i; + + if (!VT.is256BitVector()) { + continue; + } + setOperationAction(ISD::AND, VT, Promote); + AddPromotedToType (ISD::AND, VT, MVT::v4i64); + setOperationAction(ISD::OR, VT, Promote); + AddPromotedToType (ISD::OR, VT, MVT::v4i64); + setOperationAction(ISD::XOR, VT, Promote); + AddPromotedToType (ISD::XOR, VT, MVT::v4i64); + setOperationAction(ISD::LOAD, VT, Promote); + AddPromotedToType (ISD::LOAD, VT, MVT::v4i64); + setOperationAction(ISD::SELECT, VT, Promote); + AddPromotedToType (ISD::SELECT, VT, MVT::v4i64); + } + + setTruncStoreAction(MVT::f64, MVT::f32, Expand); +#endif + } + // We want to custom lower some of our intrinsics. setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom); Modified: llvm/trunk/lib/VMCore/ValueTypes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/ValueTypes.cpp?rev=74427&r1=74426&r2=74427&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/ValueTypes.cpp (original) +++ llvm/trunk/lib/VMCore/ValueTypes.cpp Mon Jun 29 11:47:10 2009 @@ -54,6 +54,10 @@ return isExtendedVector() && getSizeInBits() == 128; } +bool MVT::isExtended256BitVector() const { + return isExtendedVector() && getSizeInBits() == 256; +} + MVT MVT::getExtendedVectorElementType() const { assert(isExtended() && "Type is not extended!"); return MVT::getMVT(cast(LLVMTy)->getElementType()); @@ -101,20 +105,26 @@ case MVT::Flag: return "flag"; case MVT::v2i8: return "v2i8"; case MVT::v4i8: return "v4i8"; - case MVT::v2i16: return "v2i16"; case MVT::v8i8: return "v8i8"; - case MVT::v4i16: return "v4i16"; - case MVT::v2i32: return "v2i32"; - case MVT::v1i64: return "v1i64"; case MVT::v16i8: return "v16i8"; + case MVT::v32i8: return "v32i8"; + case MVT::v2i16: return "v2i16"; + case MVT::v4i16: return "v4i16"; case MVT::v8i16: return "v8i16"; + case MVT::v16i16: return "v16i16"; + case MVT::v2i32: return "v2i32"; + case MVT::v3i32: return "v3i32"; case MVT::v4i32: return "v4i32"; + case MVT::v8i32: return "v8i32"; + case MVT::v1i64: return "v1i64"; case MVT::v2i64: return "v2i64"; + case MVT::v4i64: return "v4i64"; case MVT::v2f32: return "v2f32"; + case MVT::v3f32: return "v3f32"; case MVT::v4f32: return "v4f32"; + case MVT::v8f32: return "v8f32"; case MVT::v2f64: return "v2f64"; - case MVT::v3i32: return "v3i32"; - case MVT::v3f32: return "v3f32"; + case MVT::v4f64: return "v4f64"; } } @@ -140,21 +150,27 @@ case MVT::ppcf128: return Type::PPC_FP128Ty; case MVT::v2i8: return VectorType::get(Type::Int8Ty, 2); case MVT::v4i8: return VectorType::get(Type::Int8Ty, 4); - case MVT::v2i16: return VectorType::get(Type::Int16Ty, 2); case MVT::v8i8: return VectorType::get(Type::Int8Ty, 8); + case MVT::v16i8: return VectorType::get(Type::Int8Ty, 16); + case MVT::v32i8: return VectorType::get(Type::Int8Ty, 32); + case MVT::v2i16: return VectorType::get(Type::Int16Ty, 2); case MVT::v4i16: return VectorType::get(Type::Int16Ty, 4); + case MVT::v8i16: return VectorType::get(Type::Int16Ty, 16); + case MVT::v16i16: return VectorType::get(Type::Int16Ty, 8); case MVT::v2i32: return VectorType::get(Type::Int32Ty, 2); - case MVT::v1i64: return VectorType::get(Type::Int64Ty, 1); - case MVT::v16i8: return VectorType::get(Type::Int8Ty, 16); - case MVT::v8i16: return VectorType::get(Type::Int16Ty, 8); + case MVT::v3i32: return VectorType::get(Type::Int32Ty, 3); case MVT::v4i32: return VectorType::get(Type::Int32Ty, 4); + case MVT::v8i32: return VectorType::get(Type::Int32Ty, 8); + case MVT::v1i64: return VectorType::get(Type::Int64Ty, 1); case MVT::v2i64: return VectorType::get(Type::Int64Ty, 2); + case MVT::v4i64: return VectorType::get(Type::Int64Ty, 4); case MVT::v2f32: return VectorType::get(Type::FloatTy, 2); + case MVT::v3f32: return VectorType::get(Type::FloatTy, 3); case MVT::v4f32: return VectorType::get(Type::FloatTy, 4); + case MVT::v8f32: return VectorType::get(Type::FloatTy, 8); case MVT::v2f64: return VectorType::get(Type::DoubleTy, 2); - case MVT::v3i32: return VectorType::get(Type::Int32Ty, 3); - case MVT::v3f32: return VectorType::get(Type::FloatTy, 3); - } + case MVT::v4f64: return VectorType::get(Type::DoubleTy, 4); + } } /// getMVT - Return the value type corresponding to the specified type. This Modified: llvm/trunk/utils/TableGen/CodeGenTarget.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenTarget.cpp?rev=74427&r1=74426&r2=74427&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/CodeGenTarget.cpp (original) +++ llvm/trunk/utils/TableGen/CodeGenTarget.cpp Mon Jun 29 11:47:10 2009 @@ -53,18 +53,24 @@ case MVT::isVoid:return "MVT::isVoid"; case MVT::v2i8: return "MVT::v2i8"; case MVT::v4i8: return "MVT::v4i8"; - case MVT::v2i16: return "MVT::v2i16"; case MVT::v8i8: return "MVT::v8i8"; - case MVT::v4i16: return "MVT::v4i16"; - case MVT::v2i32: return "MVT::v2i32"; - case MVT::v1i64: return "MVT::v1i64"; case MVT::v16i8: return "MVT::v16i8"; + case MVT::v32i8: return "MVT::v32i8"; + case MVT::v2i16: return "MVT::v2i16"; + case MVT::v4i16: return "MVT::v4i16"; case MVT::v8i16: return "MVT::v8i16"; + case MVT::v16i16: return "MVT::v16i16"; + case MVT::v2i32: return "MVT::v2i32"; case MVT::v4i32: return "MVT::v4i32"; + case MVT::v8i32: return "MVT::v8i32"; + case MVT::v1i64: return "MVT::v1i64"; case MVT::v2i64: return "MVT::v2i64"; + case MVT::v4i64: return "MVT::v4i64"; case MVT::v2f32: return "MVT::v2f32"; case MVT::v4f32: return "MVT::v4f32"; + case MVT::v8f32: return "MVT::v8f32"; case MVT::v2f64: return "MVT::v2f64"; + case MVT::v4f64: return "MVT::v4f64"; case MVT::v3i32: return "MVT::v3i32"; case MVT::v3f32: return "MVT::v3f32"; case MVT::iPTR: return "TLI.getPointerTy()"; @@ -93,18 +99,24 @@ case MVT::isVoid:return "MVT::isVoid"; case MVT::v2i8: return "MVT::v2i8"; case MVT::v4i8: return "MVT::v4i8"; - case MVT::v2i16: return "MVT::v2i16"; case MVT::v8i8: return "MVT::v8i8"; - case MVT::v4i16: return "MVT::v4i16"; - case MVT::v2i32: return "MVT::v2i32"; - case MVT::v1i64: return "MVT::v1i64"; case MVT::v16i8: return "MVT::v16i8"; + case MVT::v32i8: return "MVT::v32i8"; + case MVT::v2i16: return "MVT::v2i16"; + case MVT::v4i16: return "MVT::v4i16"; case MVT::v8i16: return "MVT::v8i16"; + case MVT::v16i16: return "MVT::v16i16"; + case MVT::v2i32: return "MVT::v2i32"; case MVT::v4i32: return "MVT::v4i32"; + case MVT::v8i32: return "MVT::v8i32"; + case MVT::v1i64: return "MVT::v1i64"; case MVT::v2i64: return "MVT::v2i64"; + case MVT::v4i64: return "MVT::v4i64"; case MVT::v2f32: return "MVT::v2f32"; case MVT::v4f32: return "MVT::v4f32"; + case MVT::v8f32: return "MVT::v8f32"; case MVT::v2f64: return "MVT::v2f64"; + case MVT::v4f64: return "MVT::v4f64"; case MVT::v3i32: return "MVT::v3i32"; case MVT::v3f32: return "MVT::v3f32"; case MVT::iPTR: return "MVT::iPTR"; From greened at obbligato.org Mon Jun 29 11:51:02 2009 From: greened at obbligato.org (David Greene) Date: Mon, 29 Jun 2009 16:51:02 -0000 Subject: [llvm-commits] [llvm] r74428 - /llvm/trunk/lib/Target/X86/X86Subtarget.h Message-ID: <200906291651.n5TGp26Q023651@zion.cs.uiuc.edu> Author: greened Date: Mon Jun 29 11:51:01 2009 New Revision: 74428 URL: http://llvm.org/viewvc/llvm-project?rev=74428&view=rev Log: Fix a subtarget feature bug. Modified: llvm/trunk/lib/Target/X86/X86Subtarget.h Modified: llvm/trunk/lib/Target/X86/X86Subtarget.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.h?rev=74428&r1=74427&r2=74428&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86Subtarget.h (original) +++ llvm/trunk/lib/Target/X86/X86Subtarget.h Mon Jun 29 11:51:01 2009 @@ -142,7 +142,7 @@ bool hasSSE4A() const { return HasSSE4A; } bool has3DNow() const { return X863DNowLevel >= ThreeDNow; } bool has3DNowA() const { return X863DNowLevel >= ThreeDNowA; } - bool hasAVX() const { return hasAVX(); } + bool hasAVX() const { return HasAVX; } bool hasFMA3() const { return HasFMA3; } bool hasFMA4() const { return HasFMA4; } From greened at obbligato.org Mon Jun 29 11:54:07 2009 From: greened at obbligato.org (David Greene) Date: Mon, 29 Jun 2009 16:54:07 -0000 Subject: [llvm-commits] [llvm] r74429 - /llvm/trunk/lib/Target/X86/X86.td Message-ID: <200906291654.n5TGs7VZ023736@zion.cs.uiuc.edu> Author: greened Date: Mon Jun 29 11:54:06 2009 New Revision: 74429 URL: http://llvm.org/viewvc/llvm-project?rev=74429&view=rev Log: Add processor descriptions for Istanbul and Shanghai. Modified: llvm/trunk/lib/Target/X86/X86.td Modified: llvm/trunk/lib/Target/X86/X86.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.td?rev=74429&r1=74428&r2=74429&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86.td (original) +++ llvm/trunk/lib/Target/X86/X86.td Mon Jun 29 11:54:06 2009 @@ -119,6 +119,10 @@ Feature3DNowA, Feature64Bit, FeatureSlowBTMem]>; def : Proc<"barcelona", [FeatureSSE3, FeatureSSE4A, Feature3DNowA, Feature64Bit, FeatureSlowBTMem]>; +def : Proc<"istanbul", [Feature3DNowA, Feature64Bit, FeatureSSE4A, + Feature3DNowA]>; +def : Proc<"shanghai", [Feature3DNowA, Feature64Bit, FeatureSSE4A, + Feature3DNowA]>; def : Proc<"winchip-c6", [FeatureMMX]>; def : Proc<"winchip2", [FeatureMMX, Feature3DNow]>; From sebastian.redl at getdesigned.at Mon Jun 29 12:12:17 2009 From: sebastian.redl at getdesigned.at (Sebastian Redl) Date: Mon, 29 Jun 2009 17:12:17 -0000 Subject: [llvm-commits] [llvm] r74430 - in /llvm/trunk/include/llvm: ADT/PointerUnion.h Bitcode/BitstreamReader.h Message-ID: <200906291712.n5THCItF024252@zion.cs.uiuc.edu> Author: cornedbee Date: Mon Jun 29 12:12:06 2009 New Revision: 74430 URL: http://llvm.org/viewvc/llvm-project?rev=74430&view=rev Log: Fix three MSVC 2008 warnings that completely clutter the build output. Modified: llvm/trunk/include/llvm/ADT/PointerUnion.h llvm/trunk/include/llvm/Bitcode/BitstreamReader.h Modified: llvm/trunk/include/llvm/ADT/PointerUnion.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/PointerUnion.h?rev=74430&r1=74429&r2=74430&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/PointerUnion.h (original) +++ llvm/trunk/include/llvm/ADT/PointerUnion.h Mon Jun 29 12:12:06 2009 @@ -89,7 +89,7 @@ int is() const { int TyNo = ::llvm::getPointerUnionTypeNum((T*)0); assert(TyNo != -1 && "Type query could never succeed on PointerUnion!"); - return Val.getInt() == TyNo; + return static_cast(Val.getInt()) == TyNo; } /// get() - Return the value of the specified pointer type. If the Modified: llvm/trunk/include/llvm/Bitcode/BitstreamReader.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Bitcode/BitstreamReader.h?rev=74430&r1=74429&r2=74430&view=diff ============================================================================== --- llvm/trunk/include/llvm/Bitcode/BitstreamReader.h (original) +++ llvm/trunk/include/llvm/Bitcode/BitstreamReader.h Mon Jun 29 12:12:06 2009 @@ -324,7 +324,7 @@ uint64_t ReadVBR64(unsigned NumBits) { uint64_t Piece = Read(NumBits); - if ((Piece & (1U << (NumBits-1))) == 0) + if ((Piece & (uint64_t(1) << (NumBits-1))) == 0) return Piece; uint64_t Result = 0; @@ -332,7 +332,7 @@ while (1) { Result |= (Piece & ((1U << (NumBits-1))-1)) << NextBit; - if ((Piece & (1U << (NumBits-1))) == 0) + if ((Piece & (uint64_t(1) << (NumBits-1))) == 0) return Result; NextBit += NumBits-1; From gohman at apple.com Mon Jun 29 12:34:24 2009 From: gohman at apple.com (Dan Gohman) Date: Mon, 29 Jun 2009 10:34:24 -0700 Subject: [llvm-commits] [test-suite] r74425 - in /test-suite/trunk/MultiSource/Benchmarks/MallocBench/gs: gscolor.c gsimage.c iscan.c std.h zarray.c zpacked.c In-Reply-To: <4A48EBDA.8040509@gmail.com> References: <200906291623.n5TGNAFD022740@zion.cs.uiuc.edu> <4A48EBDA.8040509@gmail.com> Message-ID: <6AC58880-64FD-4FCB-B6D6-71DD92F2F282@apple.com> On Jun 29, 2009, at 9:29 AM, T?r?k Edwin wrote: > On 2009-06-29 19:23, Dan Gohman wrote: > >> Author: djg >> >> Date: Mon Jun 29 11:23:09 2009 >> >> New Revision: 74425 >> >> >> >> URL: http://llvm.org/viewvc/llvm-project?rev=74425&view=rev >> >> Log: >> >> Fix several bugs in MultiSource/Benchmarks/MallocBench/gs. This is >> enough >> >> to get this test to execute as successfully on x86-64 as it does on >> x86-32. >> >> >> > > Thanks Dan. Does this fix PR2913? Yes, thanks. Dan From jyasskin at google.com Mon Jun 29 12:52:33 2009 From: jyasskin at google.com (Jeffrey Yasskin) Date: Mon, 29 Jun 2009 10:52:33 -0700 Subject: [llvm-commits] Adding a portable strerror*() wrapper, llvm::sys::StrError() Message-ID: My oprofile patch calls some functions that report errors through errno, and since strerror_r changes its behavior depending on GNU_SOURCE and other #defines, I figured it would be nice to have a portable wrapper in llvm/System/Errno.h. I included the windows version, strerror_s, even though I can't test it. This won't do quite the right thing on cmake builds--although it will run successfully--since cmake doesn't define HAVE_STRERROR*. I wasn't sure quite what to do with MakeErrStr. I'd be perfectly happy with that as the interface in Errno.h, but it does different things on Windows and Unix, and I didn't want a public function to be ambiguous like that. Tested with `make check` on Ubuntu and OS X. Jeffrey -------------- next part -------------- A non-text attachment was scrubbed... Name: errno.patch Type: text/x-patch Size: 11945 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090629/72c27ce7/attachment.bin From natebegeman at mac.com Mon Jun 29 12:56:23 2009 From: natebegeman at mac.com (Nate Begeman) Date: Mon, 29 Jun 2009 10:56:23 -0700 Subject: [llvm-commits] [llvm] r74429 - /llvm/trunk/lib/Target/X86/X86.td In-Reply-To: <200906291654.n5TGs7VZ023736@zion.cs.uiuc.edu> References: <200906291654.n5TGs7VZ023736@zion.cs.uiuc.edu> Message-ID: On Jun 29, 2009, at 9:54 AM, David Greene wrote: > Author: greened > Date: Mon Jun 29 11:54:06 2009 > New Revision: 74429 > > URL: http://llvm.org/viewvc/llvm-project?rev=74429&view=rev > Log: > > Add processor descriptions for Istanbul and Shanghai. > > Modified: > llvm/trunk/lib/Target/X86/X86.td > > Modified: llvm/trunk/lib/Target/X86/X86.td > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.td?rev=74429&r1=74428&r2=74429&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/X86/X86.td (original) > +++ llvm/trunk/lib/Target/X86/X86.td Mon Jun 29 11:54:06 2009 > @@ -119,6 +119,10 @@ > Feature3DNowA, Feature64Bit, > FeatureSlowBTMem]>; > def : Proc<"barcelona", [FeatureSSE3, FeatureSSE4A, > Feature3DNowA, Feature64Bit, > FeatureSlowBTMem]>; > +def : Proc<"istanbul", [Feature3DNowA, Feature64Bit, > FeatureSSE4A, > + Feature3DNowA]>; > +def : Proc<"shanghai", [Feature3DNowA, Feature64Bit, > FeatureSSE4A, > + Feature3DNowA]>; Is there some reason to have both, since they have the exact same feature strings? Typically we've avoided added every Intel variant that has the same features as a previous one. Nate From resistor at mac.com Mon Jun 29 13:04:54 2009 From: resistor at mac.com (Owen Anderson) Date: Mon, 29 Jun 2009 18:04:54 -0000 Subject: [llvm-commits] [llvm] r74435 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Message-ID: <200906291804.n5TI4x7T026129@zion.cs.uiuc.edu> Author: resistor Date: Mon Jun 29 13:04:45 2009 New Revision: 74435 URL: http://llvm.org/viewvc/llvm-project?rev=74435&view=rev Log: Add a target-specific DAG combine on X86 to fold the common pattern of fence-atomic-fence down to just the atomic op. This is possible thanks to X86's relatively strong memory model, which guarantees that locked instructions (which are used to implement atomics) are implicit fences. Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=74435&r1=74434&r2=74435&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Jun 29 13:04:45 2009 @@ -917,6 +917,7 @@ setTargetDAGCombine(ISD::SRA); setTargetDAGCombine(ISD::SRL); setTargetDAGCombine(ISD::STORE); + setTargetDAGCombine(ISD::MEMBARRIER); if (Subtarget->is64Bit()) setTargetDAGCombine(ISD::MUL); @@ -8566,6 +8567,58 @@ return SDValue(); } +// On X86 and X86-64, atomic operations are lowered to locked instructions. +// Locked instructions, in turn, have implicit fence semantics (all memory +// operations are flushed before issuing the locked instruction, and the +// are not buffered), so we can fold away the common pattern of +// fence-atomic-fence. +static SDValue PerformMEMBARRIERCombine(SDNode* N, SelectionDAG &DAG) { + SDValue atomic = N->getOperand(0); + switch (atomic.getOpcode()) { + case ISD::ATOMIC_CMP_SWAP: + case ISD::ATOMIC_SWAP: + case ISD::ATOMIC_LOAD_ADD: + case ISD::ATOMIC_LOAD_SUB: + case ISD::ATOMIC_LOAD_AND: + case ISD::ATOMIC_LOAD_OR: + case ISD::ATOMIC_LOAD_XOR: + case ISD::ATOMIC_LOAD_NAND: + case ISD::ATOMIC_LOAD_MIN: + case ISD::ATOMIC_LOAD_MAX: + case ISD::ATOMIC_LOAD_UMIN: + case ISD::ATOMIC_LOAD_UMAX: + break; + default: + return SDValue(); + } + + SDValue fence = atomic.getOperand(0); + if (fence.getOpcode() != ISD::MEMBARRIER) + return SDValue(); + + switch (atomic.getOpcode()) { + case ISD::ATOMIC_CMP_SWAP: + return DAG.UpdateNodeOperands(atomic, fence.getOperand(0), + atomic.getOperand(1), atomic.getOperand(2), + atomic.getOperand(3)); + case ISD::ATOMIC_SWAP: + case ISD::ATOMIC_LOAD_ADD: + case ISD::ATOMIC_LOAD_SUB: + case ISD::ATOMIC_LOAD_AND: + case ISD::ATOMIC_LOAD_OR: + case ISD::ATOMIC_LOAD_XOR: + case ISD::ATOMIC_LOAD_NAND: + case ISD::ATOMIC_LOAD_MIN: + case ISD::ATOMIC_LOAD_MAX: + case ISD::ATOMIC_LOAD_UMIN: + case ISD::ATOMIC_LOAD_UMAX: + return DAG.UpdateNodeOperands(atomic, fence.getOperand(0), + atomic.getOperand(1), atomic.getOperand(2)); + default: + return SDValue(); + } +} + SDValue X86TargetLowering::PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const { SelectionDAG &DAG = DCI.DAG; @@ -8584,6 +8637,7 @@ case X86ISD::FAND: return PerformFANDCombine(N, DAG); case X86ISD::BT: return PerformBTCombine(N, DAG, DCI); case X86ISD::VZEXT_MOVL: return PerformVZEXT_MOVLCombine(N, DAG); + case ISD::MEMBARRIER: return PerformMEMBARRIERCombine(N, DAG); } return SDValue(); From resistor at mac.com Mon Jun 29 13:07:30 2009 From: resistor at mac.com (Owen Anderson) Date: Mon, 29 Jun 2009 18:07:30 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r74436 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Message-ID: <200906291807.n5TI7UeN026227@zion.cs.uiuc.edu> Author: resistor Date: Mon Jun 29 13:07:26 2009 New Revision: 74436 URL: http://llvm.org/viewvc/llvm-project?rev=74436&view=rev Log: It's not readily clear to me whether the semantics of GCC atomics require a flush of cached memory, or of all memory, so let's err on the side of caution for now. Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=74436&r1=74435&r2=74436&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Mon Jun 29 13:07:26 2009 @@ -4468,7 +4468,7 @@ C[2] = ConstantInt::get(Type::Int1Ty, sl); C[3] = ConstantInt::get(Type::Int1Ty, ss); // We assume like gcc appears to, that this only applies to cached memory. - C[4] = ConstantInt::get(Type::Int1Ty, false); + C[4] = ConstantInt::get(Type::Int1Ty, true); Builder.CreateCall(Intrinsic::getDeclaration(TheModule, Intrinsic::memory_barrier), From resistor at mac.com Mon Jun 29 13:07:41 2009 From: resistor at mac.com (Owen Anderson) Date: Mon, 29 Jun 2009 11:07:41 -0700 Subject: [llvm-commits] [llvm] r74435 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp In-Reply-To: <200906291804.n5TI4x7T026129@zion.cs.uiuc.edu> References: <200906291804.n5TI4x7T026129@zion.cs.uiuc.edu> Message-ID: Thanks to Dan for helping me with this patch. --Owen On Jun 29, 2009, at 11:04 AM, Owen Anderson wrote: > Author: resistor > Date: Mon Jun 29 13:04:45 2009 > New Revision: 74435 > > URL: http://llvm.org/viewvc/llvm-project?rev=74435&view=rev > Log: > Add a target-specific DAG combine on X86 to fold the common pattern of > fence-atomic-fence down to just the atomic op. This is possible > thanks to > X86's relatively strong memory model, which guarantees that locked > instructions > (which are used to implement atomics) are implicit fences. > > Modified: > llvm/trunk/lib/Target/X86/X86ISelLowering.cpp > > Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=74435&r1=74434&r2=74435&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) > +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Jun 29 > 13:04:45 2009 > @@ -917,6 +917,7 @@ > setTargetDAGCombine(ISD::SRA); > setTargetDAGCombine(ISD::SRL); > setTargetDAGCombine(ISD::STORE); > + setTargetDAGCombine(ISD::MEMBARRIER); > if (Subtarget->is64Bit()) > setTargetDAGCombine(ISD::MUL); > > @@ -8566,6 +8567,58 @@ > return SDValue(); > } > > +// On X86 and X86-64, atomic operations are lowered to locked > instructions. > +// Locked instructions, in turn, have implicit fence semantics (all > memory > +// operations are flushed before issuing the locked instruction, > and the > +// are not buffered), so we can fold away the common pattern of > +// fence-atomic-fence. > +static SDValue PerformMEMBARRIERCombine(SDNode* N, SelectionDAG > &DAG) { > + SDValue atomic = N->getOperand(0); > + switch (atomic.getOpcode()) { > + case ISD::ATOMIC_CMP_SWAP: > + case ISD::ATOMIC_SWAP: > + case ISD::ATOMIC_LOAD_ADD: > + case ISD::ATOMIC_LOAD_SUB: > + case ISD::ATOMIC_LOAD_AND: > + case ISD::ATOMIC_LOAD_OR: > + case ISD::ATOMIC_LOAD_XOR: > + case ISD::ATOMIC_LOAD_NAND: > + case ISD::ATOMIC_LOAD_MIN: > + case ISD::ATOMIC_LOAD_MAX: > + case ISD::ATOMIC_LOAD_UMIN: > + case ISD::ATOMIC_LOAD_UMAX: > + break; > + default: > + return SDValue(); > + } > + > + SDValue fence = atomic.getOperand(0); > + if (fence.getOpcode() != ISD::MEMBARRIER) > + return SDValue(); > + > + switch (atomic.getOpcode()) { > + case ISD::ATOMIC_CMP_SWAP: > + return DAG.UpdateNodeOperands(atomic, fence.getOperand(0), > + atomic.getOperand(1), > atomic.getOperand(2), > + atomic.getOperand(3)); > + case ISD::ATOMIC_SWAP: > + case ISD::ATOMIC_LOAD_ADD: > + case ISD::ATOMIC_LOAD_SUB: > + case ISD::ATOMIC_LOAD_AND: > + case ISD::ATOMIC_LOAD_OR: > + case ISD::ATOMIC_LOAD_XOR: > + case ISD::ATOMIC_LOAD_NAND: > + case ISD::ATOMIC_LOAD_MIN: > + case ISD::ATOMIC_LOAD_MAX: > + case ISD::ATOMIC_LOAD_UMIN: > + case ISD::ATOMIC_LOAD_UMAX: > + return DAG.UpdateNodeOperands(atomic, fence.getOperand(0), > + atomic.getOperand(1), > atomic.getOperand(2)); > + default: > + return SDValue(); > + } > +} > + > SDValue X86TargetLowering::PerformDAGCombine(SDNode *N, > DAGCombinerInfo &DCI) > const { > SelectionDAG &DAG = DCI.DAG; > @@ -8584,6 +8637,7 @@ > case X86ISD::FAND: return PerformFANDCombine(N, DAG); > case X86ISD::BT: return PerformBTCombine(N, DAG, DCI); > case X86ISD::VZEXT_MOVL: return PerformVZEXT_MOVLCombine(N, DAG); > + case ISD::MEMBARRIER: return PerformMEMBARRIERCombine(N, DAG); > } > > return SDValue(); > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From edwintorok at gmail.com Mon Jun 29 13:09:51 2009 From: edwintorok at gmail.com (=?ISO-8859-1?Q?T=F6r=F6k_Edwin?=) Date: Mon, 29 Jun 2009 21:09:51 +0300 Subject: [llvm-commits] CVS: llvm-www/pubs/index.html pubs.js In-Reply-To: <200906291643.n5TGhjxt023422@zion.cs.uiuc.edu> References: <200906291643.n5TGhjxt023422@zion.cs.uiuc.edu> Message-ID: <4A49036F.7010308@gmail.com> On 2009-06-29 19:43, Misha Brukman wrote: > Changes in directory llvm-www/pubs: > > index.html updated: 1.91 -> 1.92 > pubs.js updated: 1.46 -> 1.47 > --- > Log message: > > Added a histogram of publications over years as a chart. > Sounds cool, where can I see the histogram? It doesn't show up in my firefox. Best regards, --Edwin From dag at cray.com Mon Jun 29 13:14:13 2009 From: dag at cray.com (David Greene) Date: Mon, 29 Jun 2009 13:14:13 -0500 Subject: [llvm-commits] [llvm] r74429 - /llvm/trunk/lib/Target/X86/X86.td In-Reply-To: References: <200906291654.n5TGs7VZ023736@zion.cs.uiuc.edu> Message-ID: <200906291314.14524.dag@cray.com> On Monday 29 June 2009 12:56, Nate Begeman wrote: > On Jun 29, 2009, at 9:54 AM, David Greene wrote: > > Author: greened > > Date: Mon Jun 29 11:54:06 2009 > > New Revision: 74429 > > > > URL: http://llvm.org/viewvc/llvm-project?rev=74429&view=rev > > Log: > > > > Add processor descriptions for Istanbul and Shanghai. > > > > Modified: > > llvm/trunk/lib/Target/X86/X86.td > > > > Modified: llvm/trunk/lib/Target/X86/X86.td > > URL: > > http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.td?rev= > >74429&r1=74428&r2=74429&view=diff > > > > = > > = > > = > > = > > = > > = > > = > > = > > ====================================================================== > > --- llvm/trunk/lib/Target/X86/X86.td (original) > > +++ llvm/trunk/lib/Target/X86/X86.td Mon Jun 29 11:54:06 2009 > > @@ -119,6 +119,10 @@ > > Feature3DNowA, Feature64Bit, > > FeatureSlowBTMem]>; > > def : Proc<"barcelona", [FeatureSSE3, FeatureSSE4A, > > Feature3DNowA, Feature64Bit, > > FeatureSlowBTMem]>; > > +def : Proc<"istanbul", [Feature3DNowA, Feature64Bit, > > FeatureSSE4A, > > + Feature3DNowA]>; > > +def : Proc<"shanghai", [Feature3DNowA, Feature64Bit, > > FeatureSSE4A, > > + Feature3DNowA]>; > > Is there some reason to have both, since they have the exact same > feature strings? Typically we've avoided added every Intel variant > that has the same features as a previous one. They have different cache characteristics and core counts. That's actually one area where LLVM could use some work. Right now we're missing a lot of architectural detail. -Dave From gohman at apple.com Mon Jun 29 13:15:49 2009 From: gohman at apple.com (Dan Gohman) Date: Mon, 29 Jun 2009 11:15:49 -0700 Subject: [llvm-commits] [PATCH] Avoid use after free in ScalarEvolution In-Reply-To: <4A476FAF.3020205@gmail.com> References: <4A16816C.7080405@gmail.com> <4AFCEFE6-6B21-4B33-998F-DACE37C5235E@apple.com> <4A369661.8050909@gmail.com> <2BDFCF40-1E6F-47E3-917D-E1148DE31CF7@apple.com> <4A374784.3030607@gmail.com> <4A476FAF.3020205@gmail.com> Message-ID: On Jun 28, 2009, at 6:27 AM, T?r?k Edwin wrote: > On 2009-06-16 10:19, T?r?k Edwin wrote: > >> On 2009-06-15 23:23, Dan Gohman wrote: >> >> >> >>> On Jun 15, 2009, at 11:43 AM, T?r?k Edwin wrote: >>> >>> >>> >>> >>> >>> >>> >>> >>> >>>> On 2009-06-15 21:15, Dan Gohman wrote: >>>> >>>> >>>> >>>> >>>> >>>> >>>> >>>>> Hi Edwin, >>>>> >>>>> >>>>> >>>>> >>>>> >>>>> >>>>> >>>>> WritingAnLLVMPass.htm's description of releaseMemory says "This >>>>> >>>>> method >>>>> >>>>> >>>>> >>>>> is >>>>> >>>>> >>>>> >>>>> called after the run* method for the class, before the next call >>>>> of >>>>> >>>>> run* >>>>> >>>>> >>>>> >>>>> in your pass." This suggests that it's a bug in the PassManager >>>>> >>>>> for not >>>>> >>>>> >>>>> >>>>> calling releaseMemory for on-the-fly analyses. >>>>> >>>>> >>>>> >>>>> >>>>> >>>>> >>>>> >>>>> >>>>> >>>>> >>>>> >>>> Would it be OK with you if I file a PR, and then try to provide a >>>> >>>> patch >>>> >>>> to do that? >>>> >>>> And also add an assertion before calling run() that checks that >>>> >>>> releaseMemory was called. >>>> >>>> >>>> >>>> >>>> >>> Sounds good to me. >>> >>> >>> >>> >>> >> >> >> I opened PR4398. >> >> >> > > I attached 2 patches to that bugreport (bugfix + testcase), please > review. > > http://llvm.org/bugs/attachment.cgi?id=3131 > http://llvm.org/bugs/attachment.cgi?id=3132 + if (!LQ.size()) // No loops, skip calling finalizers + return false; Please use LQ.empty() here instead of !LQ.size(). > +void FunctionPassManagerImpl::releaseMemoryOnTheFly() > +{ LLVM style has the brace on the same line as the function name. > + if (!wasRun) > + return; > + for (unsigned Index = 0; Index < getNumContainedManagers(); + +Index) { > + FPPassManager *FPPM = getContainedManager(Index); > + for (unsigned Index = 0; Index < FPPM->getNumContainedPasses (); ++Index) { > + FPPM->getContainedPass(Index)->releaseMemory(); > + } > + } > +} Should this set wasRun to true after freeing all the memory? + // Finalize on-the-fly passes + for (std::map::iterator + I = OnTheFlyManagers.begin(), E = OnTheFlyManagers.end(); + I != E; ++I) { + FunctionPassManagerImpl *FPP = I->second; + // We don't know when is the last time an on-the-fly pass is run, + // so we need to releaseMemory / finalize here + FPP->releaseMemoryOnTheFly(); + Changed |= FPP->doFinalization(M); + } Is it correct to call releaseMemoryOnTheFly before calling doInitialization? It seems like it should be the other way around. Dan From edwintorok at gmail.com Mon Jun 29 13:22:54 2009 From: edwintorok at gmail.com (=?ISO-8859-1?Q?T=F6r=F6k_Edwin?=) Date: Mon, 29 Jun 2009 21:22:54 +0300 Subject: [llvm-commits] [PATCH] Avoid use after free in ScalarEvolution In-Reply-To: References: <4A16816C.7080405@gmail.com> <4AFCEFE6-6B21-4B33-998F-DACE37C5235E@apple.com> <4A369661.8050909@gmail.com> <2BDFCF40-1E6F-47E3-917D-E1148DE31CF7@apple.com> <4A374784.3030607@gmail.com> <4A476FAF.3020205@gmail.com> Message-ID: <4A49067E.6070404@gmail.com> On 2009-06-29 21:15, Dan Gohman wrote: > + return false; > > Please use LQ.empty() here instead of !LQ.size(). > Fixed. > > +void FunctionPassManagerImpl::releaseMemoryOnTheFly() > > +{ > > LLVM style has the brace on the same line as the function name. > Fixed. > > + if (!wasRun) > > + return; > > + for (unsigned Index = 0; Index < getNumContainedManagers(); + > +Index) { > > + FPPassManager *FPPM = getContainedManager(Index); > > + for (unsigned Index = 0; Index < FPPM->getNumContainedPasses > (); ++Index) { > > + FPPM->getContainedPass(Index)->releaseMemory(); > > + } > > + } > > +} > > Should this set wasRun to true after freeing all the memory? > wasRun is already true, otherwise we would have returned early. wasRun only guards against calling releaseMemory() before the first run() call. > + // Finalize on-the-fly passes > + for (std::map::iterator > + I = OnTheFlyManagers.begin(), E = OnTheFlyManagers.end(); > + I != E; ++I) { > + FunctionPassManagerImpl *FPP = I->second; > + // We don't know when is the last time an on-the-fly pass is run, > + // so we need to releaseMemory / finalize here > + FPP->releaseMemoryOnTheFly(); > + Changed |= FPP->doFinalization(M); > + } > > Is it correct to call releaseMemoryOnTheFly before calling > doInitialization? It seems like it should be the other way > around. > No, you can't call it before doInitialization. releaseMemoryOnTheFly is called before doFinalization, that looks right to me. doInitialization is called above, always before releaseMemory. There is one situation where doInitialization is called, but run() isn't, then releaseMemoryOnTheFly then doFinalization. But that should be OK too, since then wasRun will be false, and releaseMemory won't be called. Best regards, --Edwin From gohman at apple.com Mon Jun 29 13:26:11 2009 From: gohman at apple.com (Dan Gohman) Date: Mon, 29 Jun 2009 18:26:11 -0000 Subject: [llvm-commits] [llvm] r74437 - /llvm/trunk/lib/Analysis/ScalarEvolution.cpp Message-ID: <200906291826.n5TIQM6G026851@zion.cs.uiuc.edu> Author: djg Date: Mon Jun 29 13:25:52 2009 New Revision: 74437 URL: http://llvm.org/viewvc/llvm-project?rev=74437&view=rev Log: Simplify this code, and avoid using APInt(). This fixes (otherwise harmless) uninitialized value warnings that Duncan found with gcc-4.4. Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=74437&r1=74436&r2=74437&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original) +++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Mon Jun 29 13:25:52 2009 @@ -1048,9 +1048,8 @@ SmallVector MulOps(Mul->op_begin()+1, Mul->op_end()); const SCEV* Key = SE.getMulExpr(MulOps); std::pair::iterator, bool> Pair = - M.insert(std::make_pair(Key, APInt())); + M.insert(std::make_pair(Key, NewScale)); if (Pair.second) { - Pair.first->second = NewScale; NewOps.push_back(Pair.first->first); } else { Pair.first->second += NewScale; @@ -1067,9 +1066,8 @@ } else { // An ordinary operand. Update the map. std::pair::iterator, bool> Pair = - M.insert(std::make_pair(Ops[i], APInt())); + M.insert(std::make_pair(Ops[i], Scale)); if (Pair.second) { - Pair.first->second = Scale; NewOps.push_back(Pair.first->first); } else { Pair.first->second += Scale; From andreas.bolka at gmx.net Mon Jun 29 13:31:49 2009 From: andreas.bolka at gmx.net (Andreas Bolka) Date: Mon, 29 Jun 2009 20:31:49 +0200 Subject: [llvm-commits] [llvm] r74401 - in /llvm/trunk: include/llvm/Analysis/LoopDependenceAnalysis.h lib/Analysis/LoopDependenceAnalysis.cpp In-Reply-To: <352a1fb20906290928m32b60b2at3de88f145c5b6520@mail.gmail.com> References: <200906280021.n5S0LMGW024672@zion.cs.uiuc.edu> <352a1fb20906290928m32b60b2at3de88f145c5b6520@mail.gmail.com> Message-ID: <1246300259-sup-5649@strider> On Mon Jun 29 18:28:29 +0200 2009, Devang Patel wrote: > On Sat, Jun 27, 2009 at 5:21 PM, Andreas Bolka wrote: > > + > > +static inline bool isMemRefInstr(const Value *I) { > > + ?return isa(I) || isa(I); > > +} > > + > > Pl. use Instruction::mayWriteToMemory() and > Instruction::mayReadFromMemory() to check memory reference. Ok. -- Andreas From andreas.bolka at gmx.net Mon Jun 29 13:34:43 2009 From: andreas.bolka at gmx.net (Andreas Bolka) Date: Mon, 29 Jun 2009 20:34:43 +0200 Subject: [llvm-commits] [llvm] r74400 - in /llvm/trunk: include/llvm/Analysis/LoopDependenceAnalysis.h lib/Analysis/LoopDependenceAnalysis.cpp In-Reply-To: <352a1fb20906290924j2ab14facsb1d481c4ba695a77@mail.gmail.com> References: <200906280016.n5S0G81I024417@zion.cs.uiuc.edu> <352a1fb20906290924j2ab14facsb1d481c4ba695a77@mail.gmail.com> Message-ID: <1246300323-sup-4843@strider> On Mon Jun 29 18:24:55 +0200 2009, Devang Patel wrote: > Here supporting only raw_ostream from llvm/Support interface is > enough, no need to support direct std::ostream interface. If I don't implement `virtual void print(std::ostream&, const Module*)`, I get a warning: lib/Analysis/LoopDependenceAnalysis.cpp:22: include/llvm/Pass.h:105: warning: ?virtual void llvm::Pass::print(std::ostream&, const llvm::Module*) const? was hidden include/llvm/Analysis/LoopDependenceAnalysis.h:49: warning: by ?void llvm::LoopDependenceAnalysis::print(llvm::raw_ostream&, const llvm::Module*) const? I'll drop the `void print(std::ostream*, const Module*)`. > On Sat, Jun 27, 2009 at 5:16 PM, Andreas Bolka wrote: > > --- llvm/trunk/include/llvm/Analysis/LoopDependenceAnalysis.h (original) > > +++ llvm/trunk/include/llvm/Analysis/LoopDependenceAnalysis.h Sat Jun 27 19:16:08 2009 > > ? class LoopDependenceAnalysis : public LoopPass { > > @@ -39,6 +40,12 @@ > > ? ? bool runOnLoop(Loop*, LPPassManager&); > > > > ? ? virtual void getAnalysisUsage(AnalysisUsage&) const; > > + > > +? ?void print(raw_ostream&, const Module* = 0) const; > > +? ?virtual void print(std::ostream&, const Module* = 0) const; > > +? ?void print(std::ostream *OS, const Module *M = 0) const { > > +? ? ?if (OS) print(*OS, M); > > +? ?} > > ? }; // class LoopDependenceAnalysis -- Andreas From edwintorok at gmail.com Mon Jun 29 13:49:22 2009 From: edwintorok at gmail.com (Torok Edwin) Date: Mon, 29 Jun 2009 18:49:22 -0000 Subject: [llvm-commits] [llvm] r74438 - in /llvm/trunk: lib/Analysis/LoopPass.cpp lib/VMCore/PassManager.cpp unittests/VMCore/Makefile unittests/VMCore/PassManagerTest.cpp Message-ID: <200906291849.n5TInWLv027569@zion.cs.uiuc.edu> Author: edwin Date: Mon Jun 29 13:49:09 2009 New Revision: 74438 URL: http://llvm.org/viewvc/llvm-project?rev=74438&view=rev Log: Call doInitialization(), releaseMemory(), and doFinalization() for on-the-fly passes as well. Also don't call finalizers for LoopPass if initialization was not called. Add a unittest that tests that these methods are called, in the proper order, and the correct number of times. Added: llvm/trunk/unittests/VMCore/PassManagerTest.cpp Modified: llvm/trunk/lib/Analysis/LoopPass.cpp llvm/trunk/lib/VMCore/PassManager.cpp llvm/trunk/unittests/VMCore/Makefile Modified: llvm/trunk/lib/Analysis/LoopPass.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/LoopPass.cpp?rev=74438&r1=74437&r2=74438&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/LoopPass.cpp (original) +++ llvm/trunk/lib/Analysis/LoopPass.cpp Mon Jun 29 13:49:09 2009 @@ -195,6 +195,9 @@ for (LoopInfo::iterator I = LI->begin(), E = LI->end(); I != E; ++I) addLoopIntoQueue(*I, LQ); + if (LQ.empty()) // No loops, skip calling finalizers + return false; + // Initialization for (std::deque::const_iterator I = LQ.begin(), E = LQ.end(); I != E; ++I) { Modified: llvm/trunk/lib/VMCore/PassManager.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/PassManager.cpp?rev=74438&r1=74437&r2=74438&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/PassManager.cpp (original) +++ llvm/trunk/lib/VMCore/PassManager.cpp Mon Jun 29 13:49:09 2009 @@ -165,11 +165,13 @@ class FunctionPassManagerImpl : public Pass, public PMDataManager, public PMTopLevelManager { +private: + bool wasRun; public: static char ID; explicit FunctionPassManagerImpl(int Depth) : Pass(&ID), PMDataManager(Depth), - PMTopLevelManager(TLM_Function) { } + PMTopLevelManager(TLM_Function), wasRun(false) { } /// add - Add a pass to the queue of passes to run. This passes ownership of /// the Pass to the PassManager. When the PassManager is destroyed, the pass @@ -179,6 +181,10 @@ schedulePass(P); } + // Prepare for running an on the fly pass, freeing memory if needed + // from a previous run. + void releaseMemoryOnTheFly(); + /// run - Execute all of the passes scheduled for execution. Keep track of /// whether any of the passes modifies the module, and if so, return true. bool run(Function &F); @@ -1290,6 +1296,17 @@ } } +void FunctionPassManagerImpl::releaseMemoryOnTheFly() { + if (!wasRun) + return; + for (unsigned Index = 0; Index < getNumContainedManagers(); ++Index) { + FPPassManager *FPPM = getContainedManager(Index); + for (unsigned Index = 0; Index < FPPM->getNumContainedPasses(); ++Index) { + FPPM->getContainedPass(Index)->releaseMemory(); + } + } +} + // Execute all the passes managed by this top level manager. // Return true if any function is modified by a pass. bool FunctionPassManagerImpl::run(Function &F) { @@ -1306,6 +1323,7 @@ for (unsigned Index = 0; Index < getNumContainedManagers(); ++Index) getContainedManager(Index)->cleanup(); + wasRun = true; return Changed; } @@ -1404,6 +1422,14 @@ MPPassManager::runOnModule(Module &M) { bool Changed = false; + // Initialize on-the-fly passes + for (std::map::iterator + I = OnTheFlyManagers.begin(), E = OnTheFlyManagers.end(); + I != E; ++I) { + FunctionPassManagerImpl *FPP = I->second; + Changed |= FPP->doInitialization(M); + } + for (unsigned Index = 0; Index < getNumContainedPasses(); ++Index) { ModulePass *MP = getContainedPass(Index); @@ -1430,6 +1456,17 @@ recordAvailableAnalysis(MP); removeDeadPasses(MP, M.getModuleIdentifier().c_str(), ON_MODULE_MSG); } + + // Finalize on-the-fly passes + for (std::map::iterator + I = OnTheFlyManagers.begin(), E = OnTheFlyManagers.end(); + I != E; ++I) { + FunctionPassManagerImpl *FPP = I->second; + // We don't know when is the last time an on-the-fly pass is run, + // so we need to releaseMemory / finalize here + FPP->releaseMemoryOnTheFly(); + Changed |= FPP->doFinalization(M); + } return Changed; } @@ -1466,6 +1503,7 @@ FunctionPassManagerImpl *FPP = OnTheFlyManagers[MP]; assert(FPP && "Unable to find on the fly pass"); + FPP->releaseMemoryOnTheFly(); FPP->run(F); return (dynamic_cast(FPP))->findAnalysisPass(PI); } Modified: llvm/trunk/unittests/VMCore/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/VMCore/Makefile?rev=74438&r1=74437&r2=74438&view=diff ============================================================================== --- llvm/trunk/unittests/VMCore/Makefile (original) +++ llvm/trunk/unittests/VMCore/Makefile Mon Jun 29 13:49:09 2009 @@ -9,7 +9,7 @@ LEVEL = ../.. TESTNAME = VMCore -LINK_COMPONENTS := core support +LINK_COMPONENTS := core support target ipa include $(LEVEL)/Makefile.config include $(LLVM_SRC_ROOT)/unittests/Makefile.unittest Added: llvm/trunk/unittests/VMCore/PassManagerTest.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/VMCore/PassManagerTest.cpp?rev=74438&view=auto ============================================================================== --- llvm/trunk/unittests/VMCore/PassManagerTest.cpp (added) +++ llvm/trunk/unittests/VMCore/PassManagerTest.cpp Mon Jun 29 13:49:09 2009 @@ -0,0 +1,526 @@ +//===- llvm/unittest/VMCore/PassManager.cpp - Constants unit tests ------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/Module.h" +#include "llvm/PassManager.h" +#include "llvm/Analysis/LoopInfo.h" +#include "llvm/Pass.h" +#include "llvm/Analysis/LoopPass.h" +#include "llvm/CallGraphSCCPass.h" +#include "llvm/Target/TargetData.h" +#include "llvm/Support/raw_ostream.h" +#include "llvm/DerivedTypes.h" +#include "llvm/Constants.h" +#include "llvm/GlobalVariable.h" +#include "llvm/Function.h" +#include "llvm/CallingConv.h" +#include "llvm/BasicBlock.h" +#include "llvm/Instructions.h" +#include "llvm/InlineAsm.h" +#include "llvm/Support/MathExtras.h" +#include "llvm/Support/raw_ostream.h" +#include "llvm/PassManager.h" +#include "llvm/ADT/SmallVector.h" +#include "llvm/Analysis/Verifier.h" +#include "llvm/Assembly/PrintModulePass.h" +#include "gtest/gtest.h" + +namespace llvm { + namespace { + // ND = no deps + // NM = no modifications + struct ModuleNDNM: public ModulePass { + public: + static char run; + static char ID; + ModuleNDNM() : ModulePass(&ID) {} + virtual bool runOnModule(Module &M) { + run++; + return false; + } + virtual void getAnalysisUsage(AnalysisUsage &AU) const { + AU.setPreservesAll(); + } + }; + char ModuleNDNM::ID=0; + char ModuleNDNM::run=0; + + struct ModuleNDM : public ModulePass { + public: + static char run; + static char ID; + ModuleNDM() : ModulePass(&ID) {} + virtual bool runOnModule(Module &M) { + run++; + return true; + } + }; + char ModuleNDM::ID=0; + char ModuleNDM::run=0; + RegisterPass X("mndm","mndm",false,false); + + struct ModuleNDM2 : public ModulePass { + public: + static char run; + static char ID; + ModuleNDM2() : ModulePass(&ID) {} + virtual bool runOnModule(Module &M) { + run++; + return true; + } + }; + char ModuleNDM2::ID=0; + char ModuleNDM2::run=0; + + struct ModuleDNM : public ModulePass { + public: + static char run; + static char ID; + ModuleDNM() : ModulePass(&ID) {} + virtual bool runOnModule(Module &M) { + EXPECT_TRUE(getAnalysisIfAvailable()); + run++; + return false; + } + virtual void getAnalysisUsage(AnalysisUsage &AU) const { + AU.addRequired(); + AU.setPreservesAll(); + } + }; + char ModuleDNM::ID=0; + char ModuleDNM::run=0; + + template + struct PassTestBase : public P { + protected: + static int runc; + static bool initialized; + static bool finalized; + int allocated; + void run() { + EXPECT_EQ(true, initialized); + EXPECT_EQ(false, finalized); + EXPECT_EQ(0, allocated); + allocated++; + runc++; + } + public: + static char ID; + static void finishedOK(int run) { + EXPECT_GT(runc, 0); + EXPECT_EQ(true, initialized); + EXPECT_EQ(true, finalized); + EXPECT_EQ(run, runc); + } + PassTestBase() : P(&ID), allocated(0) { + initialized = false; + finalized = false; + runc = 0; + } + + virtual void releaseMemory() { + EXPECT_GT(runc, 0); + EXPECT_GT(allocated, 0); + allocated--; + } + }; + template char PassTestBase

::ID; + template int PassTestBase

::runc; + template bool PassTestBase

::initialized; + template bool PassTestBase

::finalized; + + template + struct PassTest : public PassTestBase

{ + public: + virtual bool doInitialization(T &t) { + EXPECT_EQ(false, PassTestBase

::initialized); + PassTestBase

::initialized = true; + return false; + } + virtual bool doFinalization(T &t) { + EXPECT_EQ(false, PassTestBase

::finalized); + PassTestBase

::finalized = true; + EXPECT_EQ(0, PassTestBase

::allocated); + return false; + } + }; + + struct CGPass : public PassTest { + public: + virtual bool runOnSCC(const std::vector &SCMM) { + EXPECT_TRUE(getAnalysisIfAvailable()); + run(); + return false; + } + }; + RegisterPass X1("cgp","cgp"); + + struct FPass : public PassTest { + public: + virtual bool runOnFunction(Function &F) { + // FIXME: PR4112 + // EXPECT_TRUE(getAnalysisIfAvailable()); + run(); + return false; + } + }; + RegisterPass X2("fp","fp"); + + struct LPass : public PassTestBase { + private: + static int initcount; + static int fincount; + public: + LPass() { + initcount = 0; fincount=0; + EXPECT_EQ(false, initialized); + } + static void finishedOK(int run, int finalized) { + PassTestBase::finishedOK(run); + EXPECT_EQ(run, initcount); + EXPECT_EQ(finalized, fincount); + } + virtual bool doInitialization(Loop* L, LPPassManager &LPM) { + initialized = true; + initcount++; + return false; + } + virtual bool runOnLoop(Loop *L, LPPassManager &LPM) { + EXPECT_TRUE(getAnalysisIfAvailable()); + run(); + return false; + } + virtual bool doFinalization() { + fincount++; + finalized = true; + return false; + } + }; + int LPass::initcount=0; + int LPass::fincount=0; + RegisterPass X3("lp","lp"); + + struct BPass : public PassTestBase { + private: + static int inited; + static int fin; + public: + static void finishedOK(int run, int N) { + PassTestBase::finishedOK(run); + EXPECT_EQ(inited, N); + EXPECT_EQ(fin, N); + } + BPass() { + inited = 0; + fin = 0; + } + virtual bool doInitialization(Module &M) { + EXPECT_EQ(false, initialized); + initialized = true; + return false; + } + virtual bool doInitialization(Function &F) { + inited++; + return false; + } + virtual bool runOnBasicBlock(BasicBlock &BB) { + EXPECT_TRUE(getAnalysisIfAvailable()); + run(); + return false; + } + virtual bool doFinalization(Function &F) { + fin++; + return false; + } + virtual bool doFinalization(Module &M) { + EXPECT_EQ(false, finalized); + finalized = true; + EXPECT_EQ(0, allocated); + return false; + } + }; + int BPass::inited=0; + int BPass::fin=0; + RegisterPass X4("bp","bp"); + + struct OnTheFlyTest: public ModulePass { + public: + static char ID; + OnTheFlyTest() : ModulePass(&ID) {} + virtual bool runOnModule(Module &M) { + EXPECT_TRUE(getAnalysisIfAvailable()); + for (Module::iterator I=M.begin(),E=M.end(); I != E; ++I) { + Function &F = *I; + { + SCOPED_TRACE("Running on the fly function pass"); + getAnalysis(F); + } + } + return false; + } + virtual void getAnalysisUsage(AnalysisUsage &AU) const { + AU.addRequired(); + } + }; + char OnTheFlyTest::ID=0; + + TEST(PassManager, RunOnce) { + Module M("test-once"); + struct ModuleNDNM *mNDNM = new ModuleNDNM(); + struct ModuleDNM *mDNM = new ModuleDNM(); + struct ModuleNDM *mNDM = new ModuleNDM(); + struct ModuleNDM2 *mNDM2 = new ModuleNDM2(); + + mNDM->run = mNDNM->run = mDNM->run = mNDM2->run = 0; + + PassManager Passes; + Passes.add(new TargetData(&M)); + Passes.add(mNDM2); + Passes.add(mNDM); + Passes.add(mNDNM); + Passes.add(mDNM); + + Passes.run(M); + // each pass must be run exactly once, since nothing invalidates them + EXPECT_EQ(1, mNDM->run); + EXPECT_EQ(1, mNDNM->run); + EXPECT_EQ(1, mDNM->run); + EXPECT_EQ(1, mNDM2->run); + } + + TEST(PassManager, ReRun) { + Module M("test-rerun"); + struct ModuleNDNM *mNDNM = new ModuleNDNM(); + struct ModuleDNM *mDNM = new ModuleDNM(); + struct ModuleNDM *mNDM = new ModuleNDM(); + struct ModuleNDM2 *mNDM2 = new ModuleNDM2(); + + mNDM->run = mNDNM->run = mDNM->run = mNDM2->run = 0; + + PassManager Passes; + Passes.add(new TargetData(&M)); + Passes.add(mNDM); + Passes.add(mNDNM); + Passes.add(mNDM2);// invalidates mNDM needed by mDNM + Passes.add(mDNM); + + Passes.run(M); + // Some passes must be rerun because a pass that modified the + // module/function was run inbetween + EXPECT_EQ(2, mNDM->run); + EXPECT_EQ(1, mNDNM->run); + EXPECT_EQ(1, mNDM2->run); + EXPECT_EQ(1, mDNM->run); + } + + Module* makeLLVMModule(); + + template + void MemoryTestHelper(int run) { + Module *M = makeLLVMModule(); + T *P = new T(); + PassManager Passes; + Passes.add(new TargetData(M)); + Passes.add(P); + Passes.run(*M); + T::finishedOK(run); + } + + template + void MemoryTestHelper(int run, int N) { + Module *M = makeLLVMModule(); + T *P = new T(); + PassManager Passes; + Passes.add(new TargetData(M)); + Passes.add(P); + Passes.run(*M); + T::finishedOK(run, N); + delete M; + } + + TEST(PassManager, Memory) { + // SCC#1: test1->test2->test3->test1 + // SCC#2: test4 + // SCC#3: indirect call node + { + SCOPED_TRACE("Callgraph pass"); + MemoryTestHelper(3); + } + + { + SCOPED_TRACE("Function pass"); + MemoryTestHelper(4);// 4 functions + } + + { + SCOPED_TRACE("Loop pass"); + MemoryTestHelper(2, 1); //2 loops, 1 function + } + { + SCOPED_TRACE("Basic block pass"); + MemoryTestHelper(7, 4); //9 basic blocks + } + + } + + TEST(PassManager, MemoryOnTheFly) { + Module *M = makeLLVMModule(); + { + SCOPED_TRACE("Running OnTheFlyTest"); + struct OnTheFlyTest *O = new OnTheFlyTest(); + PassManager Passes; + Passes.add(new TargetData(M)); + Passes.add(O); + Passes.run(*M); + + FPass::finishedOK(4); + } + delete M; + } + + Module* makeLLVMModule() { + // Module Construction + Module* mod = new Module("test-mem"); + mod->setDataLayout("e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" + "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" + "a0:0:64-s0:64:64-f80:128:128"); + mod->setTargetTriple("x86_64-unknown-linux-gnu"); + + // Type Definitions + std::vectorFuncTy_0_args; + FunctionType* FuncTy_0 = FunctionType::get( + /*Result=*/IntegerType::get(32), + /*Params=*/FuncTy_0_args, + /*isVarArg=*/false); + + std::vectorFuncTy_2_args; + FuncTy_2_args.push_back(IntegerType::get(1)); + FunctionType* FuncTy_2 = FunctionType::get( + /*Result=*/Type::VoidTy, + /*Params=*/FuncTy_2_args, + /*isVarArg=*/false); + + + // Function Declarations + + Function* func_test1 = Function::Create( + /*Type=*/FuncTy_0, + /*Linkage=*/GlobalValue::ExternalLinkage, + /*Name=*/"test1", mod); + func_test1->setCallingConv(CallingConv::C); + AttrListPtr func_test1_PAL; + func_test1->setAttributes(func_test1_PAL); + + Function* func_test2 = Function::Create( + /*Type=*/FuncTy_0, + /*Linkage=*/GlobalValue::ExternalLinkage, + /*Name=*/"test2", mod); + func_test2->setCallingConv(CallingConv::C); + AttrListPtr func_test2_PAL; + func_test2->setAttributes(func_test2_PAL); + + Function* func_test3 = Function::Create( + /*Type=*/FuncTy_0, + /*Linkage=*/GlobalValue::ExternalLinkage, + /*Name=*/"test3", mod); + func_test3->setCallingConv(CallingConv::C); + AttrListPtr func_test3_PAL; + func_test3->setAttributes(func_test3_PAL); + + Function* func_test4 = Function::Create( + /*Type=*/FuncTy_2, + /*Linkage=*/GlobalValue::ExternalLinkage, + /*Name=*/"test4", mod); + func_test4->setCallingConv(CallingConv::C); + AttrListPtr func_test4_PAL; + func_test4->setAttributes(func_test4_PAL); + + // Global Variable Declarations + + + // Constant Definitions + + // Global Variable Definitions + + // Function Definitions + + // Function: test1 (func_test1) + { + + BasicBlock* label_entry = BasicBlock::Create("entry",func_test1,0); + + // Block entry (label_entry) + CallInst* int32_3 = CallInst::Create(func_test2, "", label_entry); + int32_3->setCallingConv(CallingConv::C); + int32_3->setTailCall(false);AttrListPtr int32_3_PAL; + int32_3->setAttributes(int32_3_PAL); + + ReturnInst::Create(int32_3, label_entry); + + } + + // Function: test2 (func_test2) + { + + BasicBlock* label_entry_5 = BasicBlock::Create("entry",func_test2,0); + + // Block entry (label_entry_5) + CallInst* int32_6 = CallInst::Create(func_test3, "", label_entry_5); + int32_6->setCallingConv(CallingConv::C); + int32_6->setTailCall(false);AttrListPtr int32_6_PAL; + int32_6->setAttributes(int32_6_PAL); + + ReturnInst::Create(int32_6, label_entry_5); + + } + + // Function: test3 (func_test3) + { + + BasicBlock* label_entry_8 = BasicBlock::Create("entry",func_test3,0); + + // Block entry (label_entry_8) + CallInst* int32_9 = CallInst::Create(func_test1, "", label_entry_8); + int32_9->setCallingConv(CallingConv::C); + int32_9->setTailCall(false);AttrListPtr int32_9_PAL; + int32_9->setAttributes(int32_9_PAL); + + ReturnInst::Create(int32_9, label_entry_8); + + } + + // Function: test4 (func_test4) + { + Function::arg_iterator args = func_test4->arg_begin(); + Value* int1_f = args++; + int1_f->setName("f"); + + BasicBlock* label_entry_11 = BasicBlock::Create("entry",func_test4,0); + BasicBlock* label_bb = BasicBlock::Create("bb",func_test4,0); + BasicBlock* label_bb1 = BasicBlock::Create("bb1",func_test4,0); + BasicBlock* label_return = BasicBlock::Create("return",func_test4,0); + + // Block entry (label_entry_11) + BranchInst::Create(label_bb, label_entry_11); + + // Block bb (label_bb) + BranchInst::Create(label_bb, label_bb1, int1_f, label_bb); + + // Block bb1 (label_bb1) + BranchInst::Create(label_bb1, label_return, int1_f, label_bb1); + + // Block return (label_return) + ReturnInst::Create(label_return); + + } + return mod; + } + + } +} From a at bolka.at Mon Jun 29 13:51:14 2009 From: a at bolka.at (Andreas Bolka) Date: Mon, 29 Jun 2009 18:51:14 -0000 Subject: [llvm-commits] [llvm] r74439 - /llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp Message-ID: <200906291851.n5TIpEkE027628@zion.cs.uiuc.edu> Author: abolka Date: Mon Jun 29 13:51:11 2009 New Revision: 74439 URL: http://llvm.org/viewvc/llvm-project?rev=74439&view=rev Log: Relax LDA memory instruction checks. Modified: llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp Modified: llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp?rev=74439&r1=74438&r2=74439&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp (original) +++ llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp Mon Jun 29 13:51:11 2009 @@ -36,8 +36,9 @@ // Utility Functions //===----------------------------------------------------------------------===// -static inline bool IsMemRefInstr(const Value *I) { - return isa(I) || isa(I); +static inline bool IsMemRefInstr(const Value *V) { + const Instruction *I = dyn_cast(V); + return I && (I->mayReadFromMemory() || I->mayWriteToMemory()); } static void GetMemRefInstrs( @@ -56,8 +57,10 @@ bool LoopDependenceAnalysis::isDependencePair(const Value *x, const Value *y) const { - return IsMemRefInstr(x) && IsMemRefInstr(y) - && (isa(x) || isa(y)); + return IsMemRefInstr(x) && + IsMemRefInstr(y) && + (cast(x)->mayWriteToMemory() || + cast(y)->mayWriteToMemory()); } bool LoopDependenceAnalysis::depends(Value *src, Value *dst) { From andrelct at dcc.ufmg.br Mon Jun 29 14:39:55 2009 From: andrelct at dcc.ufmg.br (Andre Tavares) Date: Mon, 29 Jun 2009 16:39:55 -0300 Subject: [llvm-commits] SSI patch In-Reply-To: References: <4A4374C5.7090508@dcc.ufmg.br> <4A44CE73.2030907@dcc.ufmg.br> Message-ID: <4A49188B.8060804@dcc.ufmg.br> Eli Friedman wrote: > On Fri, Jun 26, 2009 at 6:34 AM, Andre Tavares wrote: > >> Changed them all from to SmallVector, and so on. I need >> SSI::created to have a record of what variables I have transformed to >> SSI, and if another pass asks to transform it, I will be able to not do >> anything because I already know it was transformed before. Without this >> I would have to try to transform it and see that it is not possible. >> > > Is attempting to transform a variable that was already transformed > expensive? If not, I don't see the point of caching it. > > It is not that expensive. It would run for every use of that variable and return. The problem is that I'm not sure that my insertion of sigma and phi is minimal. If it is not minimal it would include lots of sigma for the variable it is asked multiple times. I have to verify that my creation of sigma and phi is minimal before this. >> If we decide to make it an utility class, should I put all content in a >> .h file and forget about the .cpp? >> > > Any functions with an implementation longer than a couple of lines > should go into a .cpp file; this reduces compile times and code size, > and keeps the header cleaner. > > ok. > -Eli > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > -- Andre Tavares Master Student in Computer Science - UFMG - Brasil http://dcc.ufmg.br/~andrelct From andrelct at dcc.ufmg.br Mon Jun 29 14:42:13 2009 From: andrelct at dcc.ufmg.br (Andre Tavares) Date: Mon, 29 Jun 2009 16:42:13 -0300 Subject: [llvm-commits] SSI patch In-Reply-To: <4A46E82C.2070306@mxc.ca> References: <4A4374C5.7090508@dcc.ufmg.br> <4A44CE73.2030907@dcc.ufmg.br> <4A46E82C.2070306@mxc.ca> Message-ID: <4A491915.9060105@dcc.ufmg.br> Nick Lewycky wrote: > Andre Tavares wrote: > >> Hey Nick, Thanks for your response, my comments are below. >> >> Nick Lewycky wrote: >> >>> I haven't looked closely at the algorithm yet. What jumped out were a >>> number of stylistic concerns, first of all. We have a number of ADTs >>> in LLVM that we like more than C++ STL ones (see >>> http://llvm.org/docs/ProgrammersManual.html for why). You should use >>> SmallVector instead of std::vector&. For example, >>> "SSI::createSSI(SmallVectorImpl value) {", or possibly >>> make it take an Instruction** and a size. Similarly, std::set is >>> horrible in general, you should make SSI::created be a >>> SmallPtrSet. (Or remove SSI::created entirely in >>> favour of making createSSI take a set and tell the caller they're not >>> allowed to call createSSI on the same value twice.) >>> >>> >> Changed them all from to SmallVector, and so on. I need >> SSI::created to have a record of what variables I have transformed to >> SSI, and if another pass asks to transform it, I will be able to not do >> anything because I already know it was transformed before. Without this >> I would have to try to transform it and see that it is not possible. >> >> >> >>> You declare some global constants which should at least also be >>> static. You shouldn't evaluate X->size() on every iteration of a loop; >>> for example the "for" statement in isUsedInTerminator should be >>> written like "for (unsigned i = 0, e = TI->getNumOperands(); i != e; >>> ++i) {". This is done in a few other places as well. >>> >>> >> Totally agree. Fixed them all. >> >> >>> Some of your comments (SSI::insertPhiFunctions) are missing a space >>> after // and before the text. Please add it where missing. >>> >>> >> Fixed. >> >>> // TODO: We do modify the programs code, but we do not know which >>> // Passes we break. >>> void SSI::getAnalysisUsage(AnalysisUsage &AU) const { >>> AU.addRequired (); >>> AU.addRequired (); >>> AU.setPreservesAll(); >>> } >>> >>> If you don't know what you preserve, don't preserve anything. I think >>> your pass preserves the CFG (you don't modify any TerminatorInsts) so >>> you can mark it AU.setPreservesCFG(). >>> >>> bool SSI::runOnFunction(Function &F) { >>> DT_ = &getAnalysis (); >>> return false; >>> } >>> >>> This runOnFunction doesn't transform anything. That means that if I >>> run "opt -ssi_and_pass" over a .bc then no transform or analysis will >>> happen. That's okay -- opt -scalar-evolution does the same thing -- >>> but if you do this you should also supply a print() method where the >>> pass dumps out what it would have done (the results of its analysis on >>> every variable, in scalar-evolutions case). You can then read it with >>> "opt -analyze -ssi_and_pass". >>> >>> /// Test if the BasicBlock BB dominates any use or definition of value. >>> /// >>> bool SSI::dominateAny(BasicBlock * BB, Instruction * value) { >>> Value::use_iterator begin = value->use_begin(); >>> Value::use_iterator end = value->use_end(); >>> for (; begin != end; ++begin) { >>> Instruction * I = dyn_cast (*begin); >>> >>> Use cast instead of dyn_cast since we know >>> in advance that it must be an Instruction. >>> >>> BasicBlock * BB_father = I->getParent(); >>> if (DT_->dominates(BB, BB_father)) { >>> return true; >>> } >>> } >>> return false; >>> } >>> >> Fixed dyn_cast. >> >>> So overall this looks like a good start. I think we may want to move >>> createSSI out of the pass and into its own >>> lib/Transforms/Utils/SSI.cpp which takes the DominatorTree* and >>> DominatorFrontier*. This method could then be called from any pass >>> without having to declare it in advance in its own analysis usage. >>> Then the SSI pass would then exist for testing purposes; it could do >>> something like either collect the sensible instructions or maybe just >>> all non-void instructions and run createSSI over them. >>> >>> >> Nick, instead of moving only createSSI out of the pass, why don't we >> move SSI Pass to lib/Transforms/Utils/, and make it an utility class >> instead of a Pass? With this, we would not need to worry about >> getAnalysisUsage. >> >> If we decide to make it an utility class, should I put all content in a >> .h file and forget about the .cpp? >> > > I'm wondering whether we need it to be a class or if it can just be a > public method in the llvm:: namespace. The question there is whether it > has state that it needs to keep between runs, and as far as I can see > the answer is no. > > The one piece of state that's currently kept is SSI::created. How bad is > it if you're asked to create SSI on a variable that already has it? Is > it computationally expensive or a recipe for miscompiles and crashes? > Any reason we couldn't just make "don't re-SSI the same variable" the > caller's concern? Don't forget that the caller is IMHO likely to already > be keeping track of which variables have had SSI run on them making > SSI::created redundant. > > I answered this on Eli's email. About "don't re-SSI the same variable", this is not possible, because different client passes could ask to transform the same variable, and one does not know which variables the other converted. > Nick > > >>> I'll try to do a more thorough review soon. >>> >>> Nick >>> >>> 2009/6/25 Andre Tavares >> > >>> >>> Hello, >>> >>> I'm submiting a patch that will be responsible to create SSI >>> representation on demand. This representation conforms with the >>> current SSA, and will not break other optimizations. It only >>> inserts some phi functions on the code. A brief description is >>> below, and the code is attached. >>> >>> // This pass converts a list of variables to the Static Single >>> Information >>> // form. This is a program representation described by Scott >>> Ananian in his >>> // Master Thesis: "The Static Single Information Form (1999)". >>> // We are building an on-demand representation, that is, we do not >>> convert >>> // every single variable in the target function to SSI form. >>> Rather, we receive >>> // a list of target variables that must be converted. We also do not >>> // completely convert a target variable to the SSI format. >>> Instead, we only >>> // change the variable in the points where new information can be >>> attached >>> // to its live range, that is, at branch points. >>> >>> -- >>> Andre Tavares >>> Master Student in Computer Science - UFMG - Brasil >>> http://dcc.ufmg.br/~andrelct >>> >>> >>> _______________________________________________ >>> llvm-commits mailing list >>> llvm-commits at cs.uiuc.edu >>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >>> >>> >>> ------------------------------------------------------------------------ >>> >>> _______________________________________________ >>> llvm-commits mailing list >>> llvm-commits at cs.uiuc.edu >>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >>> >>> > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > -- Andre Tavares Master Student in Computer Science - UFMG - Brasil http://dcc.ufmg.br/~andrelct From daniel at zuster.org Mon Jun 29 14:51:03 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Mon, 29 Jun 2009 19:51:03 -0000 Subject: [llvm-commits] [llvm] r74440 - in /llvm/trunk: include/llvm/MC/MCValue.h lib/MC/MCAsmStreamer.cpp Message-ID: <200906291951.n5TJp3Rp029364@zion.cs.uiuc.edu> Author: ddunbar Date: Mon Jun 29 14:51:00 2009 New Revision: 74440 URL: http://llvm.org/viewvc/llvm-project?rev=74440&view=rev Log: Rename MCValue::getCst to getConstant and add MCValue::isConstant. Modified: llvm/trunk/include/llvm/MC/MCValue.h llvm/trunk/lib/MC/MCAsmStreamer.cpp Modified: llvm/trunk/include/llvm/MC/MCValue.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCValue.h?rev=74440&r1=74439&r2=74440&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCValue.h (original) +++ llvm/trunk/include/llvm/MC/MCValue.h Mon Jun 29 14:51:00 2009 @@ -30,10 +30,11 @@ int64_t Cst; public: - int64_t getCst() const { return Cst; } + int64_t getConstant() const { return Cst; } MCSymbol *getSymA() const { return SymA; } MCSymbol *getSymB() const { return SymB; } - + + bool isConstant() const { return !SymA && !SymB; } static MCValue get(MCSymbol *SymA, MCSymbol *SymB = 0, int64_t Val = 0) { MCValue R; Modified: llvm/trunk/lib/MC/MCAsmStreamer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCAsmStreamer.cpp?rev=74440&r1=74439&r2=74440&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCAsmStreamer.cpp (original) +++ llvm/trunk/lib/MC/MCAsmStreamer.cpp Mon Jun 29 14:51:00 2009 @@ -66,11 +66,11 @@ os << Value.getSymA()->getName(); if (Value.getSymB()) os << " - " << Value.getSymB()->getName(); - if (Value.getCst()) - os << " + " << Value.getCst(); + if (Value.getConstant()) + os << " + " << Value.getConstant(); } else { assert(!Value.getSymB() && "Invalid machine code value!"); - os << Value.getCst(); + os << Value.getConstant(); } return os; @@ -83,7 +83,7 @@ static inline MCValue truncateToSize(const MCValue &Value, unsigned Bytes) { return MCValue::get(Value.getSymA(), Value.getSymB(), - truncateToSize(Value.getCst(), Bytes)); + truncateToSize(Value.getConstant(), Bytes)); } void MCAsmStreamer::SwitchSection(MCSection *Section) { From brukman at gmail.com Mon Jun 29 14:53:05 2009 From: brukman at gmail.com (Misha Brukman) Date: Mon, 29 Jun 2009 15:53:05 -0400 Subject: [llvm-commits] CVS: llvm-www/pubs/index.html pubs.js In-Reply-To: <4A49036F.7010308@gmail.com> References: <200906291643.n5TGhjxt023422@zion.cs.uiuc.edu> <4A49036F.7010308@gmail.com> Message-ID: 2009/6/29 T?r?k Edwin > On 2009-06-29 19:43, Misha Brukman wrote: > > Changes in directory llvm-www/pubs: > > > > index.html updated: 1.91 -> 1.92 > > pubs.js updated: 1.46 -> 1.47 > > --- > > Log message: > > > > Added a histogram of publications over years as a chart. > > > > Sounds cool, where can I see the histogram? > It doesn't show up in my firefox. http://llvm.org/pubs/ -- see top right of the page. Works for me in Firefox 3 on Linux. Or see this link for what it should look like. -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090629/fb2f423f/attachment.html From baldrick at free.fr Mon Jun 29 14:55:21 2009 From: baldrick at free.fr (Duncan Sands) Date: Mon, 29 Jun 2009 21:55:21 +0200 Subject: [llvm-commits] [llvm-gcc-4.2] r74436 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp In-Reply-To: <200906291807.n5TI7UeN026227@zion.cs.uiuc.edu> References: <200906291807.n5TI7UeN026227@zion.cs.uiuc.edu> Message-ID: <4A491C29.7010907@free.fr> Hi Owen, > // We assume like gcc appears to, that this only applies to cached memory. > - C[4] = ConstantInt::get(Type::Int1Ty, false); > + C[4] = ConstantInt::get(Type::Int1Ty, true); please update the comment! Ciao, Duncan. From daniel at zuster.org Mon Jun 29 14:57:25 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Mon, 29 Jun 2009 19:57:25 -0000 Subject: [llvm-commits] [llvm] r74441 - /llvm/trunk/unittests/MC/AsmStreamerTest.cpp Message-ID: <200906291957.n5TJvPiF029543@zion.cs.uiuc.edu> Author: ddunbar Date: Mon Jun 29 14:57:24 2009 New Revision: 74441 URL: http://llvm.org/viewvc/llvm-project?rev=74441&view=rev Log: Fix order of arguments to EXPECT_EQ Modified: llvm/trunk/unittests/MC/AsmStreamerTest.cpp Modified: llvm/trunk/unittests/MC/AsmStreamerTest.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/MC/AsmStreamerTest.cpp?rev=74441&r1=74440&r2=74441&view=diff ============================================================================== --- llvm/trunk/unittests/MC/AsmStreamerTest.cpp (original) +++ llvm/trunk/unittests/MC/AsmStreamerTest.cpp Mon Jun 29 14:57:24 2009 @@ -40,14 +40,14 @@ TEST(AsmStreamer, EmptyOutput) { StringAsmStreamer S; - EXPECT_EQ(S.getString(), ""); + EXPECT_EQ("", S.getString()); } TEST(AsmStreamer, Sections) { StringAsmStreamer S; MCSection *Sec0 = S.getContext().GetSection("foo"); S.getStreamer().SwitchSection(Sec0); - EXPECT_EQ(S.getString(), ".section foo\n"); + EXPECT_EQ(".section foo\n", S.getString()); } TEST(AsmStreamer, Values) { @@ -62,14 +62,13 @@ S.getStreamer().EmitValue(MCValue::get(A, B, 10), 2); S.getStreamer().EmitValue(MCValue::get(A, B, 10), 4); S.getStreamer().EmitValue(MCValue::get(A, B, 10), 8); - EXPECT_EQ(S.getString(), ".section foo\n\ + EXPECT_EQ(".section foo\n\ a:\n\ b:\n\ .byte a - b + 10\n\ .short a - b + 10\n\ .long a - b + 10\n\ -.quad a - b + 10\n\ -"); +.quad a - b + 10\n", S.getString()); } TEST(AsmStreamer, Align) { @@ -80,11 +79,10 @@ S.getStreamer().EmitValueToAlignment(4, /*Value=*/12, /*ValueSize=*/2); S.getStreamer().EmitValueToAlignment(8, /*Value=*/12, /*ValueSize=*/4, /*MaxBytesToEmit=*/24); - EXPECT_EQ(S.getString(), ".section foo\n\ + EXPECT_EQ(".section foo\n\ .p2align 2, 0\n\ .p2alignw 2, 12\n\ -.p2alignl 3, 12, 24\n\ -"); +.p2alignl 3, 12, 24\n", S.getString()); } TEST(AsmStreamer, Org) { @@ -94,10 +92,9 @@ MCSymbol *A = S.getContext().CreateSymbol("a"); S.getStreamer().EmitLabel(A); S.getStreamer().EmitValueToOffset(MCValue::get(A, 0, 4), 32); - EXPECT_EQ(S.getString(), ".section foo\n\ + EXPECT_EQ(".section foo\n\ a:\n\ -.org a + 4, 32\n\ -"); +.org a + 4, 32\n", S.getString()); } } From edwintorok at gmail.com Mon Jun 29 14:59:11 2009 From: edwintorok at gmail.com (Torok Edwin) Date: Mon, 29 Jun 2009 19:59:11 -0000 Subject: [llvm-commits] [llvm] r74442 - /llvm/trunk/lib/MC/MCAsmStreamer.cpp Message-ID: <200906291959.n5TJxBPe029603@zion.cs.uiuc.edu> Author: edwin Date: Mon Jun 29 14:59:10 2009 New Revision: 74442 URL: http://llvm.org/viewvc/llvm-project?rev=74442&view=rev Log: Initialize CurSection in constructor. Not doing so causes some unittests to fail, because CurSection is uninitialized. Modified: llvm/trunk/lib/MC/MCAsmStreamer.cpp Modified: llvm/trunk/lib/MC/MCAsmStreamer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCAsmStreamer.cpp?rev=74442&r1=74441&r2=74442&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCAsmStreamer.cpp (original) +++ llvm/trunk/lib/MC/MCAsmStreamer.cpp Mon Jun 29 14:59:10 2009 @@ -25,7 +25,7 @@ public: MCAsmStreamer(MCContext &Context, raw_ostream &_OS) - : MCStreamer(Context), OS(_OS) {} + : MCStreamer(Context), OS(_OS), CurSection(0) {} ~MCAsmStreamer() {} /// @name MCStreamer Interface From greened at obbligato.org Mon Jun 29 14:59:53 2009 From: greened at obbligato.org (David Greene) Date: Mon, 29 Jun 2009 19:59:53 -0000 Subject: [llvm-commits] [llvm] r74443 - /llvm/trunk/utils/TableGen/TGParser.cpp Message-ID: <200906291959.n5TJxrZL029631@zion.cs.uiuc.edu> Author: greened Date: Mon Jun 29 14:59:52 2009 New Revision: 74443 URL: http://llvm.org/viewvc/llvm-project?rev=74443&view=rev Log: Improve TableGen error reporting. Modified: llvm/trunk/utils/TableGen/TGParser.cpp Modified: llvm/trunk/utils/TableGen/TGParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/TGParser.cpp?rev=74443&r1=74442&r2=74443&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/TGParser.cpp (original) +++ llvm/trunk/utils/TableGen/TGParser.cpp Mon Jun 29 14:59:52 2009 @@ -1395,7 +1395,7 @@ std::vector TGParser::ParseValueList(Record *CurRec, Record *ArgsRec, RecTy *EltTy) { std::vector Result; RecTy *ItemType = EltTy; - int ArgN = 0; + unsigned int ArgN = 0; if (ArgsRec != 0 && EltTy == 0) { const std::vector &TArgs = ArgsRec->getTemplateArgs(); const RecordVal *RV = ArgsRec->getValue(TArgs[ArgN]); @@ -1411,6 +1411,10 @@ if (ArgsRec != 0 && EltTy == 0) { const std::vector &TArgs = ArgsRec->getTemplateArgs(); + if (ArgN >= TArgs.size()) { + TokError("too many template arguments"); + return std::vector(); + } const RecordVal *RV = ArgsRec->getValue(TArgs[ArgN]); assert(RV && "Template argument record not found??"); ItemType = RV->getType(); From greened at obbligato.org Mon Jun 29 15:05:39 2009 From: greened at obbligato.org (David Greene) Date: Mon, 29 Jun 2009 20:05:39 -0000 Subject: [llvm-commits] [llvm] r74444 - in /llvm/trunk: docs/TableGenFundamentals.html utils/TableGen/Record.cpp utils/TableGen/Record.h Message-ID: <200906292005.n5TK5gGn029811@zion.cs.uiuc.edu> Author: greened Date: Mon Jun 29 15:05:29 2009 New Revision: 74444 URL: http://llvm.org/viewvc/llvm-project?rev=74444&view=rev Log: Implement !cast. Modified: llvm/trunk/docs/TableGenFundamentals.html llvm/trunk/utils/TableGen/Record.cpp llvm/trunk/utils/TableGen/Record.h Modified: llvm/trunk/docs/TableGenFundamentals.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/TableGenFundamentals.html?rev=74444&r1=74443&r2=74444&view=diff ============================================================================== --- llvm/trunk/docs/TableGenFundamentals.html (original) +++ llvm/trunk/docs/TableGenFundamentals.html Mon Jun 29 15:05:29 2009 @@ -411,7 +411,8 @@

!cast(a)
A symbol of type type obtained by looking up the string 'a' in the symbol table. If the type of 'a' does not match type, TableGen -aborts with an error.
+aborts with an error. !cast is a special case in that the argument must +be an object defined by a 'def' construct.
!nameconcat<type>(a, b)
Shorthand for !cast(!strconcat(a, b))
!subst(a, b, c)
Modified: llvm/trunk/utils/TableGen/Record.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/Record.cpp?rev=74444&r1=74443&r2=74444&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/Record.cpp (original) +++ llvm/trunk/utils/TableGen/Record.cpp Mon Jun 29 15:05:29 2009 @@ -537,52 +537,80 @@ switch (getOpcode()) { default: assert(0 && "Unknown unop"); case CAST: { - StringInit *LHSs = dynamic_cast(LHS); - if (LHSs) { - std::string Name = LHSs->getValue(); - - // From TGParser::ParseIDValue - if (CurRec) { - if (const RecordVal *RV = CurRec->getValue(Name)) { - if (RV->getType() != getType()) { - throw "type mismatch in nameconcat"; + if (getType()->getAsString() == "string") { + StringInit *LHSs = dynamic_cast(LHS); + if (LHSs) { + return LHSs; + } + + DefInit *LHSd = dynamic_cast(LHS); + if (LHSd) { + return new StringInit(LHSd->getDef()->getName()); + } + +// VarInit *LHSv = dynamic_cast(LHS); +// if (LHSv) { +// // If this is not a template arg, cast it +// if (!CurRec->isTemplateArg(LHSv->getName()) +// && !CurMultiClass) { +// return new StringInit(LHSv->getName()); +// } +// break; +// } + +// OpInit *LHSo = dynamic_cast(LHS); +// if (!LHSo) { +// return new StringInit(LHS->getAsString()); +// } + } + else { + StringInit *LHSs = dynamic_cast(LHS); + if (LHSs) { + std::string Name = LHSs->getValue(); + + // From TGParser::ParseIDValue + if (CurRec) { + if (const RecordVal *RV = CurRec->getValue(Name)) { + if (RV->getType() != getType()) { + throw "type mismatch in nameconcat"; + } + return new VarInit(Name, RV->getType()); } - return new VarInit(Name, RV->getType()); - } - - std::string TemplateArgName = CurRec->getName()+":"+Name; - if (CurRec->isTemplateArg(TemplateArgName)) { - const RecordVal *RV = CurRec->getValue(TemplateArgName); - assert(RV && "Template arg doesn't exist??"); - if (RV->getType() != getType()) { - throw "type mismatch in nameconcat"; - } + std::string TemplateArgName = CurRec->getName()+":"+Name; + if (CurRec->isTemplateArg(TemplateArgName)) { + const RecordVal *RV = CurRec->getValue(TemplateArgName); + assert(RV && "Template arg doesn't exist??"); + + if (RV->getType() != getType()) { + throw "type mismatch in nameconcat"; + } - return new VarInit(TemplateArgName, RV->getType()); + return new VarInit(TemplateArgName, RV->getType()); + } } - } - - if (CurMultiClass) { - std::string MCName = CurMultiClass->Rec.getName()+"::"+Name; - if (CurMultiClass->Rec.isTemplateArg(MCName)) { - const RecordVal *RV = CurMultiClass->Rec.getValue(MCName); - assert(RV && "Template arg doesn't exist??"); - if (RV->getType() != getType()) { - throw "type mismatch in nameconcat"; + if (CurMultiClass) { + std::string MCName = CurMultiClass->Rec.getName()+"::"+Name; + if (CurMultiClass->Rec.isTemplateArg(MCName)) { + const RecordVal *RV = CurMultiClass->Rec.getValue(MCName); + assert(RV && "Template arg doesn't exist??"); + + if (RV->getType() != getType()) { + throw "type mismatch in nameconcat"; + } + + return new VarInit(MCName, RV->getType()); } - - return new VarInit(MCName, RV->getType()); } - } - - if (Record *D = Records.getDef(Name)) - return new DefInit(D); + + if (Record *D = Records.getDef(Name)) + return new DefInit(D); - cerr << "Variable not defined: '" + Name + "'\n"; - assert(0 && "Variable not found"); - return 0; + cerr << "Variable not defined: '" + Name + "'\n"; + assert(0 && "Variable not found"); + return 0; + } } break; } @@ -654,6 +682,23 @@ return Result + "(" + LHS->getAsString() + ")"; } +RecTy *UnOpInit::getFieldType(const std::string &FieldName) const { + switch (getOpcode()) { + default: assert(0 && "Unknown unop"); + case CAST: { + RecordRecTy *RecordType = dynamic_cast(getType()); + if (RecordType) { + RecordVal *Field = RecordType->getRecord()->getValue(FieldName); + if (Field) { + return Field->getType(); + } + } + break; + } + } + return 0; +} + Init *BinOpInit::Fold(Record *CurRec, MultiClass *CurMultiClass) { switch (getOpcode()) { default: assert(0 && "Unknown binop"); Modified: llvm/trunk/utils/TableGen/Record.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/Record.h?rev=74444&r1=74443&r2=74444&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/Record.h (original) +++ llvm/trunk/utils/TableGen/Record.h Mon Jun 29 15:05:29 2009 @@ -834,6 +834,12 @@ virtual Init *resolveReferences(Record &R, const RecordVal *RV); + /// getFieldType - This method is used to implement the FieldInit class. + /// Implementors of this method should return the type of the named field if + /// they are of record type. + /// + virtual RecTy *getFieldType(const std::string &FieldName) const; + virtual std::string getAsString() const; }; From greened at obbligato.org Mon Jun 29 15:07:18 2009 From: greened at obbligato.org (David Greene) Date: Mon, 29 Jun 2009 20:07:18 -0000 Subject: [llvm-commits] [llvm] r74445 - in /llvm/trunk/test/TableGen: ListArgs.td ListArgsSimple.td Message-ID: <200906292007.n5TK7IJu029871@zion.cs.uiuc.edu> Author: greened Date: Mon Jun 29 15:07:17 2009 New Revision: 74445 URL: http://llvm.org/viewvc/llvm-project?rev=74445&view=rev Log: Add some tests of advanced TableGen list functionality. Added: llvm/trunk/test/TableGen/ListArgs.td llvm/trunk/test/TableGen/ListArgsSimple.td Added: llvm/trunk/test/TableGen/ListArgs.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/TableGen/ListArgs.td?rev=74445&view=auto ============================================================================== --- llvm/trunk/test/TableGen/ListArgs.td (added) +++ llvm/trunk/test/TableGen/ListArgs.td Mon Jun 29 15:07:17 2009 @@ -0,0 +1,11 @@ +// RUN: tblgen %s + +class B v> { + list vals = v; +} + +class BB> vals> : B; +class BBB> vals> : BB; + +def OneB : BBB<[[1,2,3]]>; +def TwoB : BBB<[[1,2,3],[4,5,6]]>; Added: llvm/trunk/test/TableGen/ListArgsSimple.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/TableGen/ListArgsSimple.td?rev=74445&view=auto ============================================================================== --- llvm/trunk/test/TableGen/ListArgsSimple.td (added) +++ llvm/trunk/test/TableGen/ListArgsSimple.td Mon Jun 29 15:07:17 2009 @@ -0,0 +1,8 @@ +// RUN: tblgen %s + +class B { + int val = v; +} + +class BB vals> : B; +class BBB vals> : BB; From edwintorok at gmail.com Mon Jun 29 15:09:23 2009 From: edwintorok at gmail.com (=?UTF-8?B?VMO2csO2ayBFZHdpbg==?=) Date: Mon, 29 Jun 2009 23:09:23 +0300 Subject: [llvm-commits] CVS: llvm-www/pubs/index.html pubs.js In-Reply-To: References: <200906291643.n5TGhjxt023422@zion.cs.uiuc.edu> <4A49036F.7010308@gmail.com> Message-ID: <4A491F73.6040200@gmail.com> On 2009-06-29 22:53, Misha Brukman wrote: > 2009/6/29 T?r?k Edwin > > > On 2009-06-29 19:43, Misha Brukman wrote: > > Changes in directory llvm-www/pubs: > > > > index.html updated: 1.91 -> 1.92 > > pubs.js updated: 1.46 -> 1.47 > > --- > > Log message: > > > > Added a histogram of publications over years as a chart. > > > > Sounds cool, where can I see the histogram? > It doesn't show up in my firefox. > > > http://llvm.org/pubs/ -- see top right of the page. Works for me in > Firefox 3 on Linux. Firefox 3.0.11, Linux here too. Using chart.apis.google.com in the URL instead of google.com makes the image appear. I don't know why www.google.com/charts doesn't work (it does if I copy+paste the URL in a new tab). Best regards, --Edwin From rafael.espindola at gmail.com Mon Jun 29 15:30:11 2009 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Mon, 29 Jun 2009 20:30:11 -0000 Subject: [llvm-commits] [llvm] r74446 - in /llvm/trunk: lib/Target/X86/X86FloatingPoint.cpp test/CodeGen/X86/inline-asm-fpstack3.ll Message-ID: <200906292030.n5TKUEGg030491@zion.cs.uiuc.edu> Author: rafael Date: Mon Jun 29 15:29:59 2009 New Revision: 74446 URL: http://llvm.org/viewvc/llvm-project?rev=74446&view=rev Log: FIX PR 4459. Not sure I understand how the temp register gets used, but this fixes a bug and introduces no regressions. Added: llvm/trunk/test/CodeGen/X86/inline-asm-fpstack3.ll Modified: llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp Modified: llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp?rev=74446&r1=74445&r2=74446&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp (original) +++ llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp Mon Jun 29 15:29:59 2009 @@ -996,7 +996,7 @@ // it is possible for FP0 to be alive after this instruction. if (!MI->killsRegister(X86::FP0)) { // Duplicate ST0 - duplicateToTop(0, 0, I); + duplicateToTop(0, 7 /*temp register*/, I); } --StackTop; // "Forget" we have something on the top of stack! break; Added: llvm/trunk/test/CodeGen/X86/inline-asm-fpstack3.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-fpstack3.ll?rev=74446&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/inline-asm-fpstack3.ll (added) +++ llvm/trunk/test/CodeGen/X86/inline-asm-fpstack3.ll Mon Jun 29 15:29:59 2009 @@ -0,0 +1,15 @@ +; RUN: llvm-as < %s | llc -march=x86 > %t +; RUN: grep {fld %%st(0)} %t +; PR4459 + +declare x86_fp80 @ceil(x86_fp80) + +declare void @test(x86_fp80) + +define void @test2(x86_fp80 %a) { +entry: + %0 = call x86_fp80 @ceil(x86_fp80 %a) + call void asm sideeffect "fistpl $0", "{st}"( x86_fp80 %0) + call void @test(x86_fp80 %0 ) + ret void +} From andrelct at dcc.ufmg.br Mon Jun 29 15:33:27 2009 From: andrelct at dcc.ufmg.br (Andre Tavares) Date: Mon, 29 Jun 2009 17:33:27 -0300 Subject: [llvm-commits] SSI patch In-Reply-To: <4A46F76E.4070704@mxc.ca> References: <4A4374C5.7090508@dcc.ufmg.br> <4A46F76E.4070704@mxc.ca> Message-ID: <4A492517.1040808@dcc.ufmg.br> Nick Lewycky wrote: > Andre Tavares wrote: > >> Hello, >> >> I'm submiting a patch that will be responsible to create SSI >> representation on demand. This representation conforms with the current >> SSA, and will not break other optimizations. It only inserts some phi >> functions on the code. A brief description is below, and the code is >> attached. >> >> // This pass converts a list of variables to the Static Single Information >> // form. This is a program representation described by Scott Ananian in his >> // Master Thesis: "The Static Single Information Form (1999)". >> // We are building an on-demand representation, that is, we do not convert >> // every single variable in the target function to SSI form. Rather, we >> receive >> // a list of target variables that must be converted. We also do not >> // completely convert a target variable to the SSI format. Instead, we only >> // change the variable in the points where new information can be attached >> // to its live range, that is, at branch points. >> > > // Test if there is a need to transform to SSI > if (needConstruction.count() > 0) { > > Use !needConstruction.empty() . > Yep, changed to any, as you mentioned below somewhere. > void SSI::insertSigmaFunctions(std::vector & value) { > for (unsigned i = 0; i < num_values; ++i) { > if (needConstruction[i]) { > > Just put "if (!needConstruction[i]) continue;" to avoid indenting > everything another level. > ok > for (; begin != end; ++begin) { > // Test if the Use of the Value is in a comparator > CmpInst * CI; > if ((CI = dyn_cast (begin)) && isUsedInTerminator(CI)) { > > How about: > for (; begin != end; ++begin) { > CmpInst *CI = dyn_cast(begin); > if (!CI || !isUsedInTerminator(CI)) { > instead? > ok. Isn't it without !. Like if (CI || !isUsedInTerminator(CI)) { > In insertPhiFunctions: > > std::set * BB_visited = new std::set(); > while (...) { ... > free(BB_visited); > } > > How about allocating std::set BB_visited on the stack and > calling BB_visited.clear() each iteration through the loop? > > Done already, just didn't send the latest version. Thanks. > // Test if has not yet visited this node and if the > // original definition dominates this node > if (BB_visited->insert(BB_dominated).second && value_original[i] > != BB_dominated > && DT_->dominates(value_original[i], BB_dominated) > && dominateAny(BB_dominated, value[i])) { > > I think the "value_original[i] != BB_dominated && > DT_->dominates(value_original[i], BB_dominated)" part can be rewritten > as "DT_->properlyDominates(value_original[i], BB_dominated)". > > Of coarse. Missed that. > Also, please fit the operators on the end of the line. > > In SSI::rename: > // For SSI_SIG (b = PHI(a)), b is a new definition to a. So we need to > "new definition *of a"? > // Then store bin the value_stack as the new definition of a. > Not sure what the means. > I mean that b is a sigma of a, so it is a new definition of a. But I changed that part to look better. > TerminatorInst * TI = BB->getTerminator(); > for (unsigned i = 0; i < TI->getNumSuccessors(); ++i) { > BasicBlock * BB_succ = TI->getSuccessor(i); > > Perhaps you wanted: > for (succ_iterator SI = succ_begin(BI), SE = succ_end(B); SI != SE; > ++SI) { > ? You need to #include "llvm/Support/CFG.h" for that. > > ok. > // This loop calls rename on all children from this block. This time > children > // refers to a successor block in the dominance tree. > > In other words, it calls rename on all immediately dominated blocks? > > yes. > if (defined->count() > 0) { > > Use "if (defined->any()) {". Count isn't particularly expensive but > any() is cheaper. > > > ok > void SSI::substituteUse(Instruction * I) { > for (unsigned i = 0; i < I->getNumOperands(); ++i) { > Value * operand = I->getOperand(i); > for (unsigned j = 0; j < num_values; ++j) { > if (operand == value_stack[j].front() && I != > value_stack[j].back()) { > > It's not clear to me what the if-statement is actually doing, and > whether it's any different from just using "if (i != j) continue;". > There are two for here. The outside for iterates in all operands of I, and the inside in all variables I received. The first part of the if is testing if the operand of the moment is the variable of the moment. I can't use "if (i != j) continue;", because i and j are used to iterate in different things. Was clear? > if ((I_phi = dyn_cast (I)) && (vs_phi = dyn_cast ( > value_stack[j].back())) && value_stack[j].back()->getParent() > == I->getParent()) { > > This needs to be line-flowed better. Here's my suggestion: > if ((I_phi = dyn_cast(I)) && > (vs_phi = dyn_cast (value_stack[j].back())) && > value_stack[j].back()->getParent() == I->getParent()) { > which keeps each 'phrase' on one line. > Changed to PHINode * I_phi = dyn_cast (I); PHINode * vs_phi = dyn_cast (value_stack[j].back()); if (I_phi && vs_phi && value_stack[j].back()->getParent() == I->getParent()) { > /// Test if the BasicBlock BB dominates any use or definition of value. > /// > bool SSI::dominateAny(BasicBlock * BB, Instruction * value) { > > This whole method should work by a) checking whether the Instruction > itself is dominator (if so, so are all non-phi uses, so return true > fast) else just loop over the users who are PHINodes and test them only. > > Don't get what you mean here. I have to test all users of the instruction not only the PHINodes, correct? This method is testing if the value is alive in BB. As there is no LiveVariableAnalysis here I used Dominance. > Break SSI::getPosition up into getPositionPhi and getPositionSigma. All > callers put a constant value into compare anyways, and there's no way > that copying an std::map like that can be cheap. > > ok > In SSI::isUsedInTerminator, we know that the comparison field of a > BranchInst or SwitchInst is going to be field 0. Just make sure > getNumOperands() != 0 then look at field 0. No loop needed. > > great. > Overall, looks good! I like your choice of Ananian's algorithm over > Singer's because it avoids requiring reverse dominfo (yay!). I didn't > see anything wrong with the algorithm details. > > The one thing to remember is that when placing sigma's in the first > place you use a very simple flow of "is it a CmpInst which flows to a > TerminatorInst". That's probably good enough for ABCD but not for a > GCC-like VRP algorithm. You don't need to worry about that though, > whoever tried to implement a GCC-like VRP gets to worry about it. > > Nick > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > -- Andre Tavares Master Student in Computer Science - UFMG - Brasil http://dcc.ufmg.br/~andrelct From gohman at apple.com Mon Jun 29 15:34:14 2009 From: gohman at apple.com (Dan Gohman) Date: Mon, 29 Jun 2009 20:34:14 -0000 Subject: [llvm-commits] [llvm] r74447 - in /llvm/trunk: lib/Analysis/ScalarEvolution.cpp test/Transforms/IndVarSimplify/loop_evaluate9.ll Message-ID: <200906292034.n5TKYEDC030641@zion.cs.uiuc.edu> Author: djg Date: Mon Jun 29 15:34:13 2009 New Revision: 74447 URL: http://llvm.org/viewvc/llvm-project?rev=74447&view=rev Log: Don't cache PHI exit values from exhaustive evaluations, because an individual exhaustive evaluation reflects only the exit value implied by an individual exit, which may differ from the actual exit value of the loop if there are other exits. This fixes PR4477. Added: llvm/trunk/test/Transforms/IndVarSimplify/loop_evaluate9.ll Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=74447&r1=74446&r2=74447&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original) +++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Mon Jun 29 15:34:13 2009 @@ -3521,7 +3521,6 @@ if (!CondVal) return getCouldNotCompute(); if (CondVal->getValue() == uint64_t(ExitWhen)) { - ConstantEvolutionLoopExitValue[PN] = PHIVal; ++NumBruteForceTripCountsComputed; return getConstant(Type::Int32Ty, IterationNum); } Added: llvm/trunk/test/Transforms/IndVarSimplify/loop_evaluate9.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IndVarSimplify/loop_evaluate9.ll?rev=74447&view=auto ============================================================================== --- llvm/trunk/test/Transforms/IndVarSimplify/loop_evaluate9.ll (added) +++ llvm/trunk/test/Transforms/IndVarSimplify/loop_evaluate9.ll Mon Jun 29 15:34:13 2009 @@ -0,0 +1,78 @@ +; RUN: llvm-as < %s | opt -indvars | llvm-dis > %t +; RUN: grep {\[%\]tmp5.lcssa = phi i8 \\\[ 63, \[%\]cc70a02__complex_integers__Oadd.153.exit.i \\\]} %t +; RUN: grep {\[%\]tmp4.lcssa = phi i8 \\\[ -28, \[%\]cc70a02__complex_integers__Oadd.153.exit.i \\\]} %t +; PR4477 + +; Indvars should compute the exit values in loop. + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" +target triple = "i386-pc-linux-gnu" + %struct.cc70a02__complex_integers__complex_type = type { i8, i8 } + at .str = internal constant [13 x i8] c"fc70a00.adb\00\00", align 1 ; <[13 x i8]*> [#uses=1] + +define void @_ada_cc70a02() { +entry: + br label %bb1.i + +bb1.i: ; preds = %bb2.i, %entry + %indvar.i = phi i32 [ 0, %entry ], [ %indvar.next.i, %bb2.i ] ; [#uses=2] + %result.0.i = phi i16 [ 0, %entry ], [ %ins36.i, %bb2.i ] ; [#uses=2] + %tmp38.i = trunc i16 %result.0.i to i8 ; [#uses=2] + %tmp = add i8 %tmp38.i, 96 ; [#uses=1] + %tmp1 = icmp ugt i8 %tmp, -56 ; [#uses=1] + br i1 %tmp1, label %bb.i.i, label %bb1.i.i + +bb.i.i: ; preds = %bb1.i + tail call void @__gnat_rcheck_12(i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 24) noreturn + unreachable + +bb1.i.i: ; preds = %bb1.i + %tmp41.i = lshr i16 %result.0.i, 8 ; [#uses=1] + %tmp42.i = trunc i16 %tmp41.i to i8 ; [#uses=2] + %tmp2 = add i8 %tmp42.i, 109 ; [#uses=1] + %tmp3 = icmp ugt i8 %tmp2, -56 ; [#uses=1] + br i1 %tmp3, label %bb2.i.i, label %cc70a02__complex_integers__Oadd.153.exit.i + +bb2.i.i: ; preds = %bb1.i.i + tail call void @__gnat_rcheck_12(i8* getelementptr ([13 x i8]* @.str, i32 0, i32 0), i32 24) noreturn + unreachable + +cc70a02__complex_integers__Oadd.153.exit.i: ; preds = %bb1.i.i + %tmp4 = add i8 %tmp38.i, -4 ; [#uses=2] + %tmp5 = add i8 %tmp42.i, 9 ; [#uses=2] + %tmp25.i = zext i8 %tmp4 to i16 ; [#uses=1] + %tmp33.i = zext i8 %tmp5 to i16 ; [#uses=1] + %tmp34.i = shl i16 %tmp33.i, 8 ; [#uses=1] + %ins36.i = or i16 %tmp34.i, %tmp25.i ; [#uses=1] + %tmp6 = icmp eq i32 %indvar.i, 6 ; [#uses=1] + br i1 %tmp6, label %cc70a02__complex_multiplication.170.exit, label %bb2.i + +bb2.i: ; preds = %cc70a02__complex_integers__Oadd.153.exit.i + %indvar.next.i = add i32 %indvar.i, 1 ; [#uses=1] + br label %bb1.i + +cc70a02__complex_multiplication.170.exit: ; preds = %cc70a02__complex_integers__Oadd.153.exit.i + %tmp7 = icmp eq i8 %tmp4, -28 ; [#uses=1] + %tmp8 = icmp eq i8 %tmp5, 63 ; [#uses=1] + %or.cond = and i1 %tmp8, %tmp7 ; [#uses=1] + br i1 %or.cond, label %return, label %bb1 + +bb1: ; preds = %cc70a02__complex_multiplication.170.exit + tail call void @exit(i32 1) + ret void + +return: ; preds = %cc70a02__complex_multiplication.170.exit + ret void +} + +declare fastcc void @cc70a02__complex_integers__complex.164(%struct.cc70a02__complex_integers__complex_type* noalias nocapture sret, i8 signext, i8 signext) nounwind + +declare fastcc void @cc70a02__complex_integers__Osubtract.149(%struct.cc70a02__complex_integers__complex_type* noalias sret, %struct.cc70a02__complex_integers__complex_type* byval align 4) + +declare fastcc void @cc70a02__complex_integers__Oadd.153(%struct.cc70a02__complex_integers__complex_type* noalias sret, %struct.cc70a02__complex_integers__complex_type* byval align 4, %struct.cc70a02__complex_integers__complex_type* byval align 4) + +declare fastcc void @cc70a02__complex_multiplication.170(%struct.cc70a02__complex_integers__complex_type* noalias sret, %struct.cc70a02__complex_integers__complex_type* byval align 4) + +declare void @__gnat_rcheck_12(i8*, i32) noreturn + +declare void @exit(i32) From daniel at zuster.org Mon Jun 29 15:37:28 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Mon, 29 Jun 2009 20:37:28 -0000 Subject: [llvm-commits] [llvm] r74448 - in /llvm/trunk: test/MC/AsmParser/exprs.s tools/llvm-mc/AsmLexer.cpp tools/llvm-mc/AsmLexer.h tools/llvm-mc/AsmParser.cpp tools/llvm-mc/AsmParser.h tools/llvm-mc/MC-X86Specific.cpp Message-ID: <200906292037.n5TKbSQl030764@zion.cs.uiuc.edu> Author: ddunbar Date: Mon Jun 29 15:37:27 2009 New Revision: 74448 URL: http://llvm.org/viewvc/llvm-project?rev=74448&view=rev Log: MC: Improve expression parsing and implement evaluation of absolute expressions. Added: llvm/trunk/test/MC/AsmParser/exprs.s Modified: llvm/trunk/tools/llvm-mc/AsmLexer.cpp llvm/trunk/tools/llvm-mc/AsmLexer.h llvm/trunk/tools/llvm-mc/AsmParser.cpp llvm/trunk/tools/llvm-mc/AsmParser.h llvm/trunk/tools/llvm-mc/MC-X86Specific.cpp Added: llvm/trunk/test/MC/AsmParser/exprs.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AsmParser/exprs.s?rev=74448&view=auto ============================================================================== --- llvm/trunk/test/MC/AsmParser/exprs.s (added) +++ llvm/trunk/test/MC/AsmParser/exprs.s Mon Jun 29 15:37:27 2009 @@ -0,0 +1,39 @@ +# FIXME: For now this test just checks that llvm-mc works. Once we have .macro, +# .if, and .abort we can write a better test (without resorting to miles of +# greps). + +# RUN: llvm-mc %s > %t + + .byte !1 + 2 + .byte !0 + .byte ~0 + .byte -1 + .byte +1 + .byte 1 + 2 + .byte 1 & 3 + .byte 4 / 2 + .byte 4 / -2 + .byte 1 == 1 + .byte 1 == 0 + .byte 1 > 0 + .byte 1 >= 1 + .byte 1 < 2 + .byte 1 <= 1 + .byte 4 % 3 + .byte 2 * 2 + .byte 2 != 2 + .byte 2 <> 2 + .byte 1 | 2 + .byte 1 << 1 + .byte 2 >> 1 + .byte ~0 >> 1 + .byte 3 - 2 + .byte 1 ^ 3 + .byte 1 && 2 + .byte 3 && 0 + .byte 1 || 2 + .byte 0 || 0 + + .set c, 10 + .byte c + 1 + \ No newline at end of file Modified: llvm/trunk/tools/llvm-mc/AsmLexer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/AsmLexer.cpp?rev=74448&r1=74447&r2=74448&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/AsmLexer.cpp (original) +++ llvm/trunk/tools/llvm-mc/AsmLexer.cpp Mon Jun 29 15:37:27 2009 @@ -262,11 +262,23 @@ case '*': return asmtok::Star; case ',': return asmtok::Comma; case '$': return asmtok::Dollar; - case '=': return asmtok::Equal; - case '|': return asmtok::Pipe; + case '=': + if (*CurPtr == '=') + return ++CurPtr, asmtok::EqualEqual; + return asmtok::Equal; + case '|': + if (*CurPtr == '|') + return ++CurPtr, asmtok::PipePipe; + return asmtok::Pipe; case '^': return asmtok::Caret; - case '&': return asmtok::Amp; - case '!': return asmtok::Exclaim; + case '&': + if (*CurPtr == '&') + return ++CurPtr, asmtok::AmpAmp; + return asmtok::Amp; + case '!': + if (*CurPtr == '=') + return ++CurPtr, asmtok::ExclaimEqual; + return asmtok::Exclaim; case '%': return LexPercent(); case '/': return LexSlash(); case '#': return LexHash(); @@ -275,19 +287,18 @@ case '5': case '6': case '7': case '8': case '9': return LexDigit(); case '<': - if (*CurPtr == '<') { - ++CurPtr; - return asmtok::LessLess; + switch (*CurPtr) { + case '<': return ++CurPtr, asmtok::LessLess; + case '=': return ++CurPtr, asmtok::LessEqual; + case '>': return ++CurPtr, asmtok::LessGreater; + default: return asmtok::Less; } - // Don't have any use for bare '<' yet. - return ReturnError(TokStart, "invalid character in input"); case '>': - if (*CurPtr == '>') { - ++CurPtr; - return asmtok::GreaterGreater; + switch (*CurPtr) { + case '>': return ++CurPtr, asmtok::GreaterGreater; + case '=': return ++CurPtr, asmtok::GreaterEqual; + default: return asmtok::Greater; } - // Don't have any use for bare '>' yet. - return ReturnError(TokStart, "invalid character in input"); // TODO: Quoted identifiers (objc methods etc) // local labels: [0-9][:] Modified: llvm/trunk/tools/llvm-mc/AsmLexer.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/AsmLexer.h?rev=74448&r1=74447&r2=74448&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/AsmLexer.h (original) +++ llvm/trunk/tools/llvm-mc/AsmLexer.h Mon Jun 29 15:37:27 2009 @@ -42,10 +42,12 @@ Plus, Minus, Tilde, Slash, // '/' LParen, RParen, - Star, Comma, Dollar, Equal, + Star, Comma, Dollar, Equal, EqualEqual, - Pipe, Caret, Amp, Exclaim, - Percent, LessLess, GreaterGreater + Pipe, PipePipe, Caret, + Amp, AmpAmp, Exclaim, ExclaimEqual, Percent, + Less, LessEqual, LessLess, LessGreater, + Greater, GreaterEqual, GreaterGreater }; } Modified: llvm/trunk/tools/llvm-mc/AsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/AsmParser.cpp?rev=74448&r1=74447&r2=74448&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/AsmParser.cpp (original) +++ llvm/trunk/tools/llvm-mc/AsmParser.cpp Mon Jun 29 15:37:27 2009 @@ -12,6 +12,8 @@ //===----------------------------------------------------------------------===// #include "AsmParser.h" + +#include "AsmExpr.h" #include "llvm/MC/MCContext.h" #include "llvm/MC/MCInst.h" #include "llvm/MC/MCStreamer.h" @@ -57,7 +59,7 @@ /// /// parenexpr ::= expr) /// -bool AsmParser::ParseParenExpr(int64_t &Res) { +bool AsmParser::ParseParenExpr(AsmExpr *&Res) { if (ParseExpression(Res)) return true; if (Lexer.isNot(asmtok::RParen)) return TokError("expected ')' in parentheses expression"); @@ -70,28 +72,47 @@ /// primaryexpr ::= symbol /// primaryexpr ::= number /// primaryexpr ::= ~,+,- primaryexpr -bool AsmParser::ParsePrimaryExpr(int64_t &Res) { +bool AsmParser::ParsePrimaryExpr(AsmExpr *&Res) { switch (Lexer.getKind()) { default: return TokError("unknown token in expression"); + case asmtok::Exclaim: + Lexer.Lex(); // Eat the operator. + if (ParsePrimaryExpr(Res)) + return true; + Res = new AsmUnaryExpr(AsmUnaryExpr::LNot, Res); + return false; case asmtok::Identifier: // This is a label, this should be parsed as part of an expression, to - // handle things like LFOO+4 - Res = 0; // FIXME. + // handle things like LFOO+4. + Res = new AsmSymbolRefExpr(Ctx.GetOrCreateSymbol(Lexer.getCurStrVal())); Lexer.Lex(); // Eat identifier. return false; case asmtok::IntVal: - Res = Lexer.getCurIntVal(); + Res = new AsmConstantExpr(Lexer.getCurIntVal()); Lexer.Lex(); // Eat identifier. return false; case asmtok::LParen: Lexer.Lex(); // Eat the '('. return ParseParenExpr(Res); - case asmtok::Tilde: - case asmtok::Plus: case asmtok::Minus: Lexer.Lex(); // Eat the operator. - return ParsePrimaryExpr(Res); + if (ParsePrimaryExpr(Res)) + return true; + Res = new AsmUnaryExpr(AsmUnaryExpr::Minus, Res); + return false; + case asmtok::Plus: + Lexer.Lex(); // Eat the operator. + if (ParsePrimaryExpr(Res)) + return true; + Res = new AsmUnaryExpr(AsmUnaryExpr::Plus, Res); + return false; + case asmtok::Tilde: + Lexer.Lex(); // Eat the operator. + if (ParsePrimaryExpr(Res)) + return true; + Res = new AsmUnaryExpr(AsmUnaryExpr::Not, Res); + return false; } } @@ -102,59 +123,125 @@ /// expr ::= expr *,/,%,<<,>> expr -> highest. /// expr ::= primaryexpr /// -bool AsmParser::ParseExpression(int64_t &Res) { +bool AsmParser::ParseExpression(AsmExpr *&Res) { + Res = 0; return ParsePrimaryExpr(Res) || ParseBinOpRHS(1, Res); } -static unsigned getBinOpPrecedence(asmtok::TokKind K) { +bool AsmParser::ParseAbsoluteExpression(int64_t &Res) { + AsmExpr *Expr; + + if (ParseExpression(Expr)) + return true; + + if (!Expr->EvaluateAsAbsolute(Ctx, Res)) + return TokError("expected absolute expression"); + + return false; +} + +static unsigned getBinOpPrecedence(asmtok::TokKind K, + AsmBinaryExpr::Opcode &Kind) { switch (K) { default: return 0; // not a binop. + + // Lowest Precedence: &&, || + case asmtok::AmpAmp: + Kind = AsmBinaryExpr::LAnd; + return 1; + case asmtok::PipePipe: + Kind = AsmBinaryExpr::LOr; + return 1; + + // Low Precedence: +, -, ==, !=, <>, <, <=, >, >= case asmtok::Plus: + Kind = AsmBinaryExpr::Add; + return 2; case asmtok::Minus: - return 1; + Kind = AsmBinaryExpr::Sub; + return 2; + case asmtok::EqualEqual: + Kind = AsmBinaryExpr::EQ; + return 2; + case asmtok::ExclaimEqual: + case asmtok::LessGreater: + Kind = AsmBinaryExpr::NE; + return 2; + case asmtok::Less: + Kind = AsmBinaryExpr::LT; + return 2; + case asmtok::LessEqual: + Kind = AsmBinaryExpr::LTE; + return 2; + case asmtok::Greater: + Kind = AsmBinaryExpr::GT; + return 2; + case asmtok::GreaterEqual: + Kind = AsmBinaryExpr::GTE; + return 2; + + // Intermediate Precedence: |, &, ^ + // + // FIXME: gas seems to support '!' as an infix operator? case asmtok::Pipe: + Kind = AsmBinaryExpr::Or; + return 3; case asmtok::Caret: + Kind = AsmBinaryExpr::Xor; + return 3; case asmtok::Amp: - case asmtok::Exclaim: - return 2; + Kind = AsmBinaryExpr::And; + return 3; + + // Highest Precedence: *, /, %, <<, >> case asmtok::Star: + Kind = AsmBinaryExpr::Mul; + return 4; case asmtok::Slash: + Kind = AsmBinaryExpr::Div; + return 4; case asmtok::Percent: + Kind = AsmBinaryExpr::Mod; + return 4; case asmtok::LessLess: + Kind = AsmBinaryExpr::Shl; + return 4; case asmtok::GreaterGreater: - return 3; + Kind = AsmBinaryExpr::Shr; + return 4; } } /// ParseBinOpRHS - Parse all binary operators with precedence >= 'Precedence'. /// Res contains the LHS of the expression on input. -bool AsmParser::ParseBinOpRHS(unsigned Precedence, int64_t &Res) { +bool AsmParser::ParseBinOpRHS(unsigned Precedence, AsmExpr *&Res) { while (1) { - unsigned TokPrec = getBinOpPrecedence(Lexer.getKind()); + AsmBinaryExpr::Opcode Kind; + unsigned TokPrec = getBinOpPrecedence(Lexer.getKind(), Kind); // If the next token is lower precedence than we are allowed to eat, return // successfully with what we ate already. if (TokPrec < Precedence) return false; - //asmtok::TokKind BinOp = Lexer.getKind(); Lexer.Lex(); // Eat the next primary expression. - int64_t RHS; + AsmExpr *RHS; if (ParsePrimaryExpr(RHS)) return true; // If BinOp binds less tightly with RHS than the operator after RHS, let // the pending operator take RHS as its LHS. - unsigned NextTokPrec = getBinOpPrecedence(Lexer.getKind()); + AsmBinaryExpr::Opcode Dummy; + unsigned NextTokPrec = getBinOpPrecedence(Lexer.getKind(), Dummy); if (TokPrec < NextTokPrec) { if (ParseBinOpRHS(Precedence+1, RHS)) return true; } - // Merge LHS/RHS: fixme use the right operator etc. - Res += RHS; + // Merge LHS and RHS according to operator. + Res = new AsmBinaryExpr(Kind, Res, RHS); } } @@ -354,7 +441,7 @@ bool AsmParser::ParseAssignment(const char *Name, bool IsDotSet) { int64_t Value; - if (ParseExpression(Value)) + if (ParseAbsoluteExpression(Value)) return true; if (Lexer.isNot(asmtok::EndOfStatement)) @@ -433,7 +520,7 @@ } /// ParseDirectiveAscii: -/// ::= ( .ascii | .asciiz ) [ "string" ( , "string" )* ] +/// ::= ( .ascii | .asciz ) [ "string" ( , "string" )* ] bool AsmParser::ParseDirectiveAscii(bool ZeroTerminated) { if (Lexer.isNot(asmtok::EndOfStatement)) { for (;;) { @@ -469,7 +556,7 @@ if (Lexer.isNot(asmtok::EndOfStatement)) { for (;;) { int64_t Expr; - if (ParseExpression(Expr)) + if (ParseAbsoluteExpression(Expr)) return true; Out.EmitValue(MCValue::get(Expr), Size); @@ -492,7 +579,7 @@ /// ::= .space expression [ , expression ] bool AsmParser::ParseDirectiveSpace() { int64_t NumBytes; - if (ParseExpression(NumBytes)) + if (ParseAbsoluteExpression(NumBytes)) return true; int64_t FillExpr = 0; @@ -502,7 +589,7 @@ return TokError("unexpected token in '.space' directive"); Lexer.Lex(); - if (ParseExpression(FillExpr)) + if (ParseAbsoluteExpression(FillExpr)) return true; HasFillExpr = true; @@ -527,7 +614,7 @@ /// ::= .fill expression , expression , expression bool AsmParser::ParseDirectiveFill() { int64_t NumValues; - if (ParseExpression(NumValues)) + if (ParseAbsoluteExpression(NumValues)) return true; if (Lexer.isNot(asmtok::Comma)) @@ -535,7 +622,7 @@ Lexer.Lex(); int64_t FillSize; - if (ParseExpression(FillSize)) + if (ParseAbsoluteExpression(FillSize)) return true; if (Lexer.isNot(asmtok::Comma)) @@ -543,7 +630,7 @@ Lexer.Lex(); int64_t FillExpr; - if (ParseExpression(FillExpr)) + if (ParseAbsoluteExpression(FillExpr)) return true; if (Lexer.isNot(asmtok::EndOfStatement)) @@ -564,7 +651,7 @@ /// ::= .org expression [ , expression ] bool AsmParser::ParseDirectiveOrg() { int64_t Offset; - if (ParseExpression(Offset)) + if (ParseAbsoluteExpression(Offset)) return true; // Parse optional fill expression. @@ -574,7 +661,7 @@ return TokError("unexpected token in '.org' directive"); Lexer.Lex(); - if (ParseExpression(FillExpr)) + if (ParseAbsoluteExpression(FillExpr)) return true; if (Lexer.isNot(asmtok::EndOfStatement)) Modified: llvm/trunk/tools/llvm-mc/AsmParser.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/AsmParser.h?rev=74448&r1=74447&r2=74448&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/AsmParser.h (original) +++ llvm/trunk/tools/llvm-mc/AsmParser.h Mon Jun 29 15:37:27 2009 @@ -17,6 +17,7 @@ #include "AsmLexer.h" namespace llvm { +class AsmExpr; class MCContext; class MCInst; class MCStreamer; @@ -44,10 +45,24 @@ void EatToEndOfStatement(); bool ParseAssignment(const char *Name, bool IsDotSet); - bool ParseExpression(int64_t &Res); - bool ParsePrimaryExpr(int64_t &Res); - bool ParseBinOpRHS(unsigned Precedence, int64_t &Res); - bool ParseParenExpr(int64_t &Res); + + /// ParseExpression - Parse a general assembly expression. + /// + /// @param Res - The resulting expression. The pointer value is null on error. + /// @result - False on success. + bool ParseExpression(AsmExpr *&Res); + + /// ParseAbsoluteExpr - Parse an expression which must evaluate to an absolute + /// value. + /// + /// @param Res - The value of the absolute expression. The result is undefined + /// on error. + /// @result - False on success. + bool ParseAbsoluteExpression(int64_t &Res); + + bool ParsePrimaryExpr(AsmExpr *&Res); + bool ParseBinOpRHS(unsigned Precedence, AsmExpr *&Res); + bool ParseParenExpr(AsmExpr *&Res); // X86 specific. bool ParseX86InstOperands(MCInst &Inst); Modified: llvm/trunk/tools/llvm-mc/MC-X86Specific.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/MC-X86Specific.cpp?rev=74448&r1=74447&r2=74448&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/MC-X86Specific.cpp (original) +++ llvm/trunk/tools/llvm-mc/MC-X86Specific.cpp Mon Jun 29 15:37:27 2009 @@ -87,7 +87,7 @@ // $42 -> immediate. Lexer.Lex(); int64_t Val; - if (ParseExpression(Val)) + if (ParseAbsoluteExpression(Val)) return TokError("expected integer constant"); Op = X86Operand::CreateReg(Val); return false; @@ -118,7 +118,7 @@ // it. int64_t Disp = 0; if (Lexer.isNot(asmtok::LParen)) { - if (ParseExpression(Disp)) return true; + if (ParseAbsoluteExpression(Disp)) return true; // After parsing the base expression we could either have a parenthesized // memory address or not. If not, return now. If so, eat the (. @@ -139,8 +139,7 @@ // memory operand consumed. } else { // It must be an parenthesized expression, parse it now. - if (ParseParenExpr(Disp) || - ParseBinOpRHS(1, Disp)) + if (ParseAbsoluteExpression(Disp)) return true; // After parsing the base expression we could either have a parenthesized From dpatel at apple.com Mon Jun 29 15:38:14 2009 From: dpatel at apple.com (Devang Patel) Date: Mon, 29 Jun 2009 20:38:14 -0000 Subject: [llvm-commits] [llvm] r74449 - /llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp Message-ID: <200906292038.n5TKcELm030800@zion.cs.uiuc.edu> Author: dpatel Date: Mon Jun 29 15:38:13 2009 New Revision: 74449 URL: http://llvm.org/viewvc/llvm-project?rev=74449&view=rev Log: Multiple DW_TAG_compile_unit is not used, afaict, on any target. Update dwarf writer to only emit one DW_TAG_compile_unit per .o file. Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp?rev=74449&r1=74448&r2=74449&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp (original) +++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp Mon Jun 29 15:38:13 2009 @@ -1093,13 +1093,8 @@ // Get the subprogram debug information entry. DISubprogram SPD(Desc.getGV()); - // Get the compile unit context. - CompileUnit *Unit = MainCU; - if (!Unit) - Unit = &FindCompileUnit(SPD.getCompileUnit()); - // Get the subprogram die. - DIE *SPDie = Unit->getDieMapSlotFor(SPD.getGV()); + DIE *SPDie = MainCU->getDieMapSlotFor(SPD.getGV()); assert(SPDie && "Missing subprogram descriptor"); if (!AbstractScope) { @@ -1112,55 +1107,27 @@ AddAddress(SPDie, dwarf::DW_AT_frame_base, Location); } - ConstructDbgScope(RootScope, 0, 0, SPDie, Unit); + ConstructDbgScope(RootScope, 0, 0, SPDie, MainCU); } /// ConstructDefaultDbgScope - Construct a default scope for the subprogram. /// void DwarfDebug::ConstructDefaultDbgScope(MachineFunction *MF) { const char *FnName = MF->getFunction()->getNameStart(); - if (MainCU) { - StringMap &Globals = MainCU->getGlobals(); - StringMap::iterator GI = Globals.find(FnName); - if (GI != Globals.end()) { - DIE *SPDie = GI->second; - - // Add the function bounds. - AddLabel(SPDie, dwarf::DW_AT_low_pc, dwarf::DW_FORM_addr, - DWLabel("func_begin", SubprogramCount)); - AddLabel(SPDie, dwarf::DW_AT_high_pc, dwarf::DW_FORM_addr, - DWLabel("func_end", SubprogramCount)); - - MachineLocation Location(RI->getFrameRegister(*MF)); - AddAddress(SPDie, dwarf::DW_AT_frame_base, Location); - return; - } - } else { - for (unsigned i = 0, e = CompileUnits.size(); i != e; ++i) { - CompileUnit *Unit = CompileUnits[i]; - StringMap &Globals = Unit->getGlobals(); - StringMap::iterator GI = Globals.find(FnName); - if (GI != Globals.end()) { - DIE *SPDie = GI->second; - - // Add the function bounds. - AddLabel(SPDie, dwarf::DW_AT_low_pc, dwarf::DW_FORM_addr, - DWLabel("func_begin", SubprogramCount)); - AddLabel(SPDie, dwarf::DW_AT_high_pc, dwarf::DW_FORM_addr, - DWLabel("func_end", SubprogramCount)); - - MachineLocation Location(RI->getFrameRegister(*MF)); - AddAddress(SPDie, dwarf::DW_AT_frame_base, Location); - return; - } - } + StringMap &Globals = MainCU->getGlobals(); + StringMap::iterator GI = Globals.find(FnName); + if (GI != Globals.end()) { + DIE *SPDie = GI->second; + + // Add the function bounds. + AddLabel(SPDie, dwarf::DW_AT_low_pc, dwarf::DW_FORM_addr, + DWLabel("func_begin", SubprogramCount)); + AddLabel(SPDie, dwarf::DW_AT_high_pc, dwarf::DW_FORM_addr, + DWLabel("func_end", SubprogramCount)); + + MachineLocation Location(RI->getFrameRegister(*MF)); + AddAddress(SPDie, dwarf::DW_AT_frame_base, Location); } - -#if 0 - // FIXME: This is causing an abort because C++ mangled names are compared with - // their unmangled counterparts. See PR2885. Don't do this assert. - assert(0 && "Couldn't find DIE for machine function!"); -#endif } /// GetOrCreateSourceID - Look up the source id with the given directory and @@ -1233,10 +1200,11 @@ dwarf::DW_FORM_data1, RVer); CompileUnit *Unit = new CompileUnit(ID, Die); - if (DIUnit.isMain()) { - assert(!MainCU && "Multiple main compile units are found!"); + if (!MainCU && DIUnit.isMain()) { + // Use first compile unit marked as isMain as the compile unit + // for this module. MainCU = Unit; - } + } CompileUnitMap[DIUnit.getGV()] = Unit; CompileUnits.push_back(Unit); @@ -1244,16 +1212,13 @@ void DwarfDebug::ConstructGlobalVariableDIE(GlobalVariable *GV) { DIGlobalVariable DI_GV(GV); - CompileUnit *DW_Unit = MainCU; - if (!DW_Unit) - DW_Unit = &FindCompileUnit(DI_GV.getCompileUnit()); // Check for pre-existence. - DIE *&Slot = DW_Unit->getDieMapSlotFor(DI_GV.getGV()); + DIE *&Slot = MainCU->getDieMapSlotFor(DI_GV.getGV()); if (Slot) return; - DIE *VariableDie = CreateGlobalVariableDIE(DW_Unit, DI_GV); + DIE *VariableDie = CreateGlobalVariableDIE(MainCU, DI_GV); // Add address. DIEBlock *Block = new DIEBlock(); @@ -1267,22 +1232,19 @@ Slot = VariableDie; // Add to context owner. - DW_Unit->getDie()->AddChild(VariableDie); + MainCU->getDie()->AddChild(VariableDie); // Expose as global. FIXME - need to check external flag. std::string Name; - DW_Unit->AddGlobal(DI_GV.getName(Name), VariableDie); + MainCU->AddGlobal(DI_GV.getName(Name), VariableDie); return; } void DwarfDebug::ConstructSubprogram(GlobalVariable *GV) { DISubprogram SP(GV); - CompileUnit *Unit = MainCU; - if (!Unit) - Unit = &FindCompileUnit(SP.getCompileUnit()); // Check for pre-existence. - DIE *&Slot = Unit->getDieMapSlotFor(GV); + DIE *&Slot = MainCU->getDieMapSlotFor(GV); if (Slot) return; @@ -1291,17 +1253,17 @@ // class type. return; - DIE *SubprogramDie = CreateSubprogramDIE(Unit, SP); + DIE *SubprogramDie = CreateSubprogramDIE(MainCU, SP); // Add to map. Slot = SubprogramDie; // Add to context owner. - Unit->getDie()->AddChild(SubprogramDie); + MainCU->getDie()->AddChild(SubprogramDie); // Expose as global. std::string Name; - Unit->AddGlobal(SP.getName(Name), SubprogramDie); + MainCU->AddGlobal(SP.getName(Name), SubprogramDie); return; } @@ -1331,6 +1293,11 @@ return; } + // If main compile unit for this module is not seen than randomly + // select first compile unit. + if (!MainCU) + MainCU = CompileUnits[0]; + // If there is not any debug info available for any global variables and any // subprograms then there is not any debug info to emit. if (GVs.empty() && SPs.empty()) { @@ -1707,9 +1674,6 @@ if (TimePassesIsEnabled) DebugTimer->startTimer(); - CompileUnit *Unit = MainCU; - if (!Unit) - Unit = &FindCompileUnit(SP.getCompileUnit()); GlobalVariable *GV = SP.getGV(); DenseMap::iterator II = AbstractInstanceRootMap.find(GV); @@ -1720,9 +1684,9 @@ DbgScope *Scope = new DbgScope(NULL, DIDescriptor(GV)); // Get the compile unit context. - DIE *SPDie = Unit->getDieMapSlotFor(GV); + DIE *SPDie = MainCU->getDieMapSlotFor(GV); if (!SPDie) - SPDie = CreateSubprogramDIE(Unit, SP, false, true); + SPDie = CreateSubprogramDIE(MainCU, SP, false, true); // Mark as being inlined. This makes this subprogram entry an abstract // instance root. @@ -1741,12 +1705,12 @@ // Create a concrete inlined instance for this inlined function. DbgConcreteScope *ConcreteScope = new DbgConcreteScope(DIDescriptor(GV)); DIE *ScopeDie = new DIE(dwarf::DW_TAG_inlined_subroutine); - ScopeDie->setAbstractCompileUnit(Unit); + ScopeDie->setAbstractCompileUnit(MainCU); - DIE *Origin = Unit->getDieMapSlotFor(GV); + DIE *Origin = MainCU->getDieMapSlotFor(GV); AddDIEEntry(ScopeDie, dwarf::DW_AT_abstract_origin, dwarf::DW_FORM_ref4, Origin); - AddUInt(ScopeDie, dwarf::DW_AT_call_file, 0, Unit->getID()); + AddUInt(ScopeDie, dwarf::DW_AT_call_file, 0, MainCU->getID()); AddUInt(ScopeDie, dwarf::DW_AT_call_line, 0, Line); AddUInt(ScopeDie, dwarf::DW_AT_call_column, 0, Col); @@ -1907,22 +1871,8 @@ sizeof(int32_t) + // Offset Into Abbrev. Section sizeof(int8_t); // Pointer Size (in bytes) - // Process base compile unit. - if (MainCU) { - SizeAndOffsetDie(MainCU->getDie(), Offset, true); - CompileUnitOffsets[MainCU] = 0; - return; - } - - // Process all compile units. - unsigned PrevOffset = 0; - - for (unsigned i = 0, e = CompileUnits.size(); i != e; ++i) { - CompileUnit *Unit = CompileUnits[i]; - CompileUnitOffsets[Unit] = PrevOffset; - PrevOffset += SizeAndOffsetDie(Unit->getDie(), Offset, true) - + sizeof(int32_t); // FIXME - extra pad for gdb bug. - } + SizeAndOffsetDie(MainCU->getDie(), Offset, true); + CompileUnitOffsets[MainCU] = 0; } /// EmitInitial - Emit initial Dwarf declarations. This is necessary for cc @@ -2067,13 +2017,7 @@ // Start debug info section. Asm->SwitchToDataSection(TAI->getDwarfInfoSection()); - if (MainCU) { - EmitDebugInfoPerCU(MainCU); - return; - } - - for (unsigned i = 0, e = CompileUnits.size(); i != e; ++i) - EmitDebugInfoPerCU(CompileUnits[i]); + EmitDebugInfoPerCU(MainCU); } /// EmitAbbreviations - Emit the abbreviation section. @@ -2405,13 +2349,7 @@ // Start the dwarf pubnames section. Asm->SwitchToDataSection(TAI->getDwarfPubNamesSection()); - if (MainCU) { - EmitDebugPubNamesPerCU(MainCU); - return; - } - - for (unsigned i = 0, e = CompileUnits.size(); i != e; ++i) - EmitDebugPubNamesPerCU(CompileUnits[i]); + EmitDebugPubNamesPerCU(MainCU); } /// EmitDebugStr - Emit visible names into a debug str section. From daniel at zuster.org Mon Jun 29 15:40:36 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Mon, 29 Jun 2009 20:40:36 -0000 Subject: [llvm-commits] [llvm] r74450 - in /llvm/trunk/tools/llvm-mc: AsmExpr.cpp AsmExpr.h Message-ID: <200906292040.n5TKeaI9030880@zion.cs.uiuc.edu> Author: ddunbar Date: Mon Jun 29 15:40:36 2009 New Revision: 74450 URL: http://llvm.org/viewvc/llvm-project?rev=74450&view=rev Log: MC: Improve expression parsing and implement evaluation of absolute expressions (missed files). Added: llvm/trunk/tools/llvm-mc/AsmExpr.cpp llvm/trunk/tools/llvm-mc/AsmExpr.h Added: llvm/trunk/tools/llvm-mc/AsmExpr.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/AsmExpr.cpp?rev=74450&view=auto ============================================================================== --- llvm/trunk/tools/llvm-mc/AsmExpr.cpp (added) +++ llvm/trunk/tools/llvm-mc/AsmExpr.cpp Mon Jun 29 15:40:36 2009 @@ -0,0 +1,92 @@ +//===- AsmExpr.cpp - Assembly file expressions ----------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "AsmExpr.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCValue.h" +using namespace llvm; + +AsmExpr::~AsmExpr() { +} + +bool AsmExpr::EvaluateAsAbsolute(MCContext &Ctx, int64_t &Res) const { + switch (getKind()) { + default: + assert(0 && "Invalid assembly expression kind!"); + + case Constant: + Res = cast(this)->getValue(); + return true; + + case SymbolRef: { + MCSymbol *Sym = cast(this)->getSymbol(); + const MCValue *Value = Ctx.GetSymbolValue(Sym); + + // FIXME: Return more information about the failure. + if (!Value || !Value->isConstant()) + return false; + + Res = Value->getConstant(); + return true; + } + + case Unary: { + const AsmUnaryExpr *AUE = cast(this); + int64_t Value; + + if (!AUE->getSubExpr()->EvaluateAsAbsolute(Ctx, Value)) + return false; + + switch (AUE->getOpcode()) { + case AsmUnaryExpr::LNot: Res = !Value; break; + case AsmUnaryExpr::Minus: Res = -Value; break; + case AsmUnaryExpr::Not: Res = ~Value; break; + case AsmUnaryExpr::Plus: Res = +Value; break; + } + + return true; + } + + case Binary: { + const AsmBinaryExpr *ABE = cast(this); + int64_t LHS, RHS; + + if (!ABE->getLHS()->EvaluateAsAbsolute(Ctx, LHS) || + !ABE->getRHS()->EvaluateAsAbsolute(Ctx, RHS)) + return false; + + // FIXME: We need target hooks for the evaluation. It may be limited in + // width, and gas defines the result of comparisons differently from Apple + // as (the result is sign extended). + switch (ABE->getOpcode()) { + case AsmBinaryExpr::Add: Res = LHS + RHS; break; + case AsmBinaryExpr::And: Res = LHS & RHS; break; + case AsmBinaryExpr::Div: Res = LHS / RHS; break; + case AsmBinaryExpr::EQ: Res = LHS == RHS; break; + case AsmBinaryExpr::GT: Res = LHS > RHS; break; + case AsmBinaryExpr::GTE: Res = LHS >= RHS; break; + case AsmBinaryExpr::LAnd: Res = LHS && RHS; break; + case AsmBinaryExpr::LOr: Res = LHS || RHS; break; + case AsmBinaryExpr::LT: Res = LHS < RHS; break; + case AsmBinaryExpr::LTE: Res = LHS <= RHS; break; + case AsmBinaryExpr::Mod: Res = LHS % RHS; break; + case AsmBinaryExpr::Mul: Res = LHS * RHS; break; + case AsmBinaryExpr::NE: Res = LHS != RHS; break; + case AsmBinaryExpr::Or: Res = LHS | RHS; break; + case AsmBinaryExpr::Shl: Res = LHS << RHS; break; + case AsmBinaryExpr::Shr: Res = LHS >> RHS; break; + case AsmBinaryExpr::Sub: Res = LHS - RHS; break; + case AsmBinaryExpr::Xor: Res = LHS ^ RHS; break; + } + + return true; + } + } +} + Added: llvm/trunk/tools/llvm-mc/AsmExpr.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/AsmExpr.h?rev=74450&view=auto ============================================================================== --- llvm/trunk/tools/llvm-mc/AsmExpr.h (added) +++ llvm/trunk/tools/llvm-mc/AsmExpr.h Mon Jun 29 15:40:36 2009 @@ -0,0 +1,157 @@ +//===- AsmExpr.h - Assembly file expressions --------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef ASMEXPR_H +#define ASMEXPR_H + +#include "llvm/Support/Casting.h" +#include "llvm/Support/DataTypes.h" + +namespace llvm { +class MCContext; +class MCSymbol; + +class AsmExpr { +public: + enum AsmExprKind { + Binary, /// Binary expressions. + Constant, /// Constant expressions. + SymbolRef, /// References to labels and assigned expressions. + Unary /// Unary expressions. + }; + +private: + AsmExprKind Kind; + +protected: + AsmExpr(AsmExprKind _Kind) : Kind(_Kind) {} + +public: + virtual ~AsmExpr(); + + AsmExprKind getKind() const { return Kind; } + + /// EvaluateAsAbsolute - Try to evaluate the expression to an absolute value. + /// + /// @param Res - The absolute value if evaluation succeeds. + /// @result - True on success. + bool EvaluateAsAbsolute(MCContext &Ctx, int64_t &Res) const; + + static bool classof(const AsmExpr *) { return true; } +}; + +class AsmConstantExpr : public AsmExpr { + int64_t Value; + +public: + AsmConstantExpr(int64_t _Value) + : AsmExpr(AsmExpr::Constant), Value(_Value) {} + + int64_t getValue() const { return Value; } + + static bool classof(const AsmExpr *E) { + return E->getKind() == AsmExpr::Constant; + } + static bool classof(const AsmConstantExpr *) { return true; } +}; + +class AsmSymbolRefExpr : public AsmExpr { + MCSymbol *Symbol; + +public: + AsmSymbolRefExpr(MCSymbol *_Symbol) + : AsmExpr(AsmExpr::SymbolRef), Symbol(_Symbol) {} + + MCSymbol *getSymbol() const { return Symbol; } + + static bool classof(const AsmExpr *E) { + return E->getKind() == AsmExpr::SymbolRef; + } + static bool classof(const AsmSymbolRefExpr *) { return true; } +}; + +class AsmUnaryExpr : public AsmExpr { +public: + enum Opcode { + LNot, /// Logical negation. + Minus, /// Unary minus. + Not, /// Bit-wise negation. + Plus /// Unary plus. + }; + +private: + Opcode Op; + AsmExpr *Expr; + +public: + AsmUnaryExpr(Opcode _Op, AsmExpr *_Expr) + : AsmExpr(AsmExpr::Unary), Op(_Op), Expr(_Expr) {} + ~AsmUnaryExpr() { + delete Expr; + } + + Opcode getOpcode() const { return Op; } + + AsmExpr *getSubExpr() const { return Expr; } + + static bool classof(const AsmExpr *E) { + return E->getKind() == AsmExpr::Unary; + } + static bool classof(const AsmUnaryExpr *) { return true; } +}; + +class AsmBinaryExpr : public AsmExpr { +public: + enum Opcode { + Add, /// Addition. + And, /// Bitwise and. + Div, /// Division. + EQ, /// Equality comparison. + GT, /// Greater than comparison. + GTE, /// Greater than or equal comparison. + LAnd, /// Logical and. + LOr, /// Logical or. + LT, /// Less than comparison. + LTE, /// Less than or equal comparison. + Mod, /// Modulus. + Mul, /// Multiplication. + NE, /// Inequality comparison. + Or, /// Bitwise or. + Shl, /// Bitwise shift left. + Shr, /// Bitwise shift right. + Sub, /// Subtraction. + Xor /// Bitwise exclusive or. + }; + +private: + Opcode Op; + AsmExpr *LHS, *RHS; + +public: + AsmBinaryExpr(Opcode _Op, AsmExpr *_LHS, AsmExpr *_RHS) + : AsmExpr(AsmExpr::Binary), Op(_Op), LHS(_LHS), RHS(_RHS) {} + ~AsmBinaryExpr() { + delete LHS; + delete RHS; + } + + Opcode getOpcode() const { return Op; } + + AsmExpr *getLHS() const { return LHS; } + AsmExpr *getRHS() const { return RHS; } + + static bool classof(const AsmExpr *E) { + return E->getKind() == AsmExpr::Binary; + } + static bool classof(const AsmBinaryExpr *) { return true; } +}; + +} // end namespace llvm + +#endif From daniel at zuster.org Mon Jun 29 15:41:28 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Mon, 29 Jun 2009 20:41:28 -0000 Subject: [llvm-commits] [llvm] r74451 - in /llvm/trunk: test/Analysis/LoopDependenceAnalysis/ unittests/ExecutionEngine/JIT/ Message-ID: <200906292041.n5TKfSrB030916@zion.cs.uiuc.edu> Author: ddunbar Date: Mon Jun 29 15:41:28 2009 New Revision: 74451 URL: http://llvm.org/viewvc/llvm-project?rev=74451&view=rev Log: Set some svn:ignore props Modified: llvm/trunk/test/Analysis/LoopDependenceAnalysis/ (props changed) llvm/trunk/unittests/ExecutionEngine/JIT/ (props changed) Propchange: llvm/trunk/test/Analysis/LoopDependenceAnalysis/ ------------------------------------------------------------------------------ --- svn:ignore (added) +++ svn:ignore Mon Jun 29 15:41:28 2009 @@ -0,0 +1 @@ +Output Propchange: llvm/trunk/unittests/ExecutionEngine/JIT/ ------------------------------------------------------------------------------ --- svn:ignore (added) +++ svn:ignore Mon Jun 29 15:41:28 2009 @@ -0,0 +1 @@ +Debug From dpatel at apple.com Mon Jun 29 15:45:23 2009 From: dpatel at apple.com (Devang Patel) Date: Mon, 29 Jun 2009 20:45:23 -0000 Subject: [llvm-commits] [llvm] r74452 - in /llvm/trunk/lib/CodeGen/AsmPrinter: DwarfDebug.cpp DwarfDebug.h Message-ID: <200906292045.n5TKjN8C031026@zion.cs.uiuc.edu> Author: dpatel Date: Mon Jun 29 15:45:18 2009 New Revision: 74452 URL: http://llvm.org/viewvc/llvm-project?rev=74452&view=rev Log: s/MainCU/ModuleCU/g Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp?rev=74452&r1=74451&r2=74452&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp (original) +++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp Mon Jun 29 15:45:18 2009 @@ -221,7 +221,7 @@ } // end llvm namespace DwarfDebug::DwarfDebug(raw_ostream &OS, AsmPrinter *A, const TargetAsmInfo *T) - : Dwarf(OS, A, T, "dbg"), MainCU(0), + : Dwarf(OS, A, T, "dbg"), ModuleCU(0), AbbreviationsSet(InitAbbreviationsSetSize), Abbreviations(), ValuesSet(InitValuesSetSize), Values(), StringPool(), SectionMap(), SectionSourceLines(), didInitial(false), shouldEmit(false), @@ -1094,7 +1094,7 @@ DISubprogram SPD(Desc.getGV()); // Get the subprogram die. - DIE *SPDie = MainCU->getDieMapSlotFor(SPD.getGV()); + DIE *SPDie = ModuleCU->getDieMapSlotFor(SPD.getGV()); assert(SPDie && "Missing subprogram descriptor"); if (!AbstractScope) { @@ -1107,14 +1107,14 @@ AddAddress(SPDie, dwarf::DW_AT_frame_base, Location); } - ConstructDbgScope(RootScope, 0, 0, SPDie, MainCU); + ConstructDbgScope(RootScope, 0, 0, SPDie, ModuleCU); } /// ConstructDefaultDbgScope - Construct a default scope for the subprogram. /// void DwarfDebug::ConstructDefaultDbgScope(MachineFunction *MF) { const char *FnName = MF->getFunction()->getNameStart(); - StringMap &Globals = MainCU->getGlobals(); + StringMap &Globals = ModuleCU->getGlobals(); StringMap::iterator GI = Globals.find(FnName); if (GI != Globals.end()) { DIE *SPDie = GI->second; @@ -1200,10 +1200,10 @@ dwarf::DW_FORM_data1, RVer); CompileUnit *Unit = new CompileUnit(ID, Die); - if (!MainCU && DIUnit.isMain()) { + if (!ModuleCU && DIUnit.isMain()) { // Use first compile unit marked as isMain as the compile unit // for this module. - MainCU = Unit; + ModuleCU = Unit; } CompileUnitMap[DIUnit.getGV()] = Unit; @@ -1214,11 +1214,11 @@ DIGlobalVariable DI_GV(GV); // Check for pre-existence. - DIE *&Slot = MainCU->getDieMapSlotFor(DI_GV.getGV()); + DIE *&Slot = ModuleCU->getDieMapSlotFor(DI_GV.getGV()); if (Slot) return; - DIE *VariableDie = CreateGlobalVariableDIE(MainCU, DI_GV); + DIE *VariableDie = CreateGlobalVariableDIE(ModuleCU, DI_GV); // Add address. DIEBlock *Block = new DIEBlock(); @@ -1232,11 +1232,11 @@ Slot = VariableDie; // Add to context owner. - MainCU->getDie()->AddChild(VariableDie); + ModuleCU->getDie()->AddChild(VariableDie); // Expose as global. FIXME - need to check external flag. std::string Name; - MainCU->AddGlobal(DI_GV.getName(Name), VariableDie); + ModuleCU->AddGlobal(DI_GV.getName(Name), VariableDie); return; } @@ -1244,7 +1244,7 @@ DISubprogram SP(GV); // Check for pre-existence. - DIE *&Slot = MainCU->getDieMapSlotFor(GV); + DIE *&Slot = ModuleCU->getDieMapSlotFor(GV); if (Slot) return; @@ -1253,17 +1253,17 @@ // class type. return; - DIE *SubprogramDie = CreateSubprogramDIE(MainCU, SP); + DIE *SubprogramDie = CreateSubprogramDIE(ModuleCU, SP); // Add to map. Slot = SubprogramDie; // Add to context owner. - MainCU->getDie()->AddChild(SubprogramDie); + ModuleCU->getDie()->AddChild(SubprogramDie); // Expose as global. std::string Name; - MainCU->AddGlobal(SP.getName(Name), SubprogramDie); + ModuleCU->AddGlobal(SP.getName(Name), SubprogramDie); return; } @@ -1295,8 +1295,8 @@ // If main compile unit for this module is not seen than randomly // select first compile unit. - if (!MainCU) - MainCU = CompileUnits[0]; + if (!ModuleCU) + ModuleCU = CompileUnits[0]; // If there is not any debug info available for any global variables and any // subprograms then there is not any debug info to emit. @@ -1684,9 +1684,9 @@ DbgScope *Scope = new DbgScope(NULL, DIDescriptor(GV)); // Get the compile unit context. - DIE *SPDie = MainCU->getDieMapSlotFor(GV); + DIE *SPDie = ModuleCU->getDieMapSlotFor(GV); if (!SPDie) - SPDie = CreateSubprogramDIE(MainCU, SP, false, true); + SPDie = CreateSubprogramDIE(ModuleCU, SP, false, true); // Mark as being inlined. This makes this subprogram entry an abstract // instance root. @@ -1705,12 +1705,12 @@ // Create a concrete inlined instance for this inlined function. DbgConcreteScope *ConcreteScope = new DbgConcreteScope(DIDescriptor(GV)); DIE *ScopeDie = new DIE(dwarf::DW_TAG_inlined_subroutine); - ScopeDie->setAbstractCompileUnit(MainCU); + ScopeDie->setAbstractCompileUnit(ModuleCU); - DIE *Origin = MainCU->getDieMapSlotFor(GV); + DIE *Origin = ModuleCU->getDieMapSlotFor(GV); AddDIEEntry(ScopeDie, dwarf::DW_AT_abstract_origin, dwarf::DW_FORM_ref4, Origin); - AddUInt(ScopeDie, dwarf::DW_AT_call_file, 0, MainCU->getID()); + AddUInt(ScopeDie, dwarf::DW_AT_call_file, 0, ModuleCU->getID()); AddUInt(ScopeDie, dwarf::DW_AT_call_line, 0, Line); AddUInt(ScopeDie, dwarf::DW_AT_call_column, 0, Col); @@ -1871,8 +1871,8 @@ sizeof(int32_t) + // Offset Into Abbrev. Section sizeof(int8_t); // Pointer Size (in bytes) - SizeAndOffsetDie(MainCU->getDie(), Offset, true); - CompileUnitOffsets[MainCU] = 0; + SizeAndOffsetDie(ModuleCU->getDie(), Offset, true); + CompileUnitOffsets[ModuleCU] = 0; } /// EmitInitial - Emit initial Dwarf declarations. This is necessary for cc @@ -2017,7 +2017,7 @@ // Start debug info section. Asm->SwitchToDataSection(TAI->getDwarfInfoSection()); - EmitDebugInfoPerCU(MainCU); + EmitDebugInfoPerCU(ModuleCU); } /// EmitAbbreviations - Emit the abbreviation section. @@ -2349,7 +2349,7 @@ // Start the dwarf pubnames section. Asm->SwitchToDataSection(TAI->getDwarfPubNamesSection()); - EmitDebugPubNamesPerCU(MainCU); + EmitDebugPubNamesPerCU(ModuleCU); } /// EmitDebugStr - Emit visible names into a debug str section. @@ -2459,7 +2459,7 @@ if (!TAI->doesDwarfUsesInlineInfoSection()) return; - if (!MainCU) + if (!ModuleCU) return; Asm->SwitchToDataSection(TAI->getDwarfDebugInlineSection()); @@ -2493,7 +2493,7 @@ for (SmallVector::iterator LI = Labels.begin(), LE = Labels.end(); LI != LE; ++LI) { - DIE *SP = MainCU->getDieMapSlotFor(GV); + DIE *SP = ModuleCU->getDieMapSlotFor(GV); Asm->EmitInt32(SP->getOffset()); Asm->EOL("DIE offset"); if (TD->getPointerSize() == sizeof(int32_t)) Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h?rev=74452&r1=74451&r2=74452&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h (original) +++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h Mon Jun 29 15:45:18 2009 @@ -70,9 +70,8 @@ /// SmallVector CompileUnits; - /// MainCU - Some platform prefers one compile unit per .o file. In such - /// cases, all dies are inserted in MainCU. - CompileUnit *MainCU; + /// ModuleCU - All DIEs are inserted in ModuleCU. + CompileUnit *ModuleCU; /// AbbreviationsSet - Used to uniquely define abbreviations. /// From gohman at apple.com Mon Jun 29 15:46:00 2009 From: gohman at apple.com (Dan Gohman) Date: Mon, 29 Jun 2009 13:46:00 -0700 Subject: [llvm-commits] [PATCH] Avoid use after free in ScalarEvolution In-Reply-To: <4A49067E.6070404@gmail.com> References: <4A16816C.7080405@gmail.com> <4AFCEFE6-6B21-4B33-998F-DACE37C5235E@apple.com> <4A369661.8050909@gmail.com> <2BDFCF40-1E6F-47E3-917D-E1148DE31CF7@apple.com> <4A374784.3030607@gmail.com> <4A476FAF.3020205@gmail.com> <4A49067E.6070404@gmail.com> Message-ID: On Jun 29, 2009, at 11:22 AM, T?r?k Edwin wrote: > On 2009-06-29 21:15, Dan Gohman wrote: > >>> + if (!wasRun) >>> >>> + return; >>> >>> + for (unsigned Index = 0; Index < getNumContainedManagers(); + >>> >> +Index) { >> >>> + FPPassManager *FPPM = getContainedManager(Index); >>> >>> + for (unsigned Index = 0; Index < FPPM->getNumContainedPasses >>> >> (); ++Index) { >> >>> + FPPM->getContainedPass(Index)->releaseMemory(); >>> >>> + } >>> >>> + } >>> >>> +} >>> >> >> >> Should this set wasRun to true after freeing all the memory? >> >> >> > > wasRun is already true, otherwise we would have returned early. > wasRun only guards against calling releaseMemory() before the first > run() call. Oops. I meant to ask if wasRun should be set to false afterwards, to indicate that all of the state has been reset. Even if not necessary for correctness, this may be a nice invariant. > > >> + // Finalize on-the-fly passes >> >> + for (std::map::iterator >> >> + I = OnTheFlyManagers.begin(), E = OnTheFlyManagers.end(); >> >> + I != E; ++I) { >> >> + FunctionPassManagerImpl *FPP = I->second; >> >> + // We don't know when is the last time an on-the-fly pass is >> run, >> >> + // so we need to releaseMemory / finalize here >> >> + FPP->releaseMemoryOnTheFly(); >> >> + Changed |= FPP->doFinalization(M); >> >> + } >> >> >> >> Is it correct to call releaseMemoryOnTheFly before calling >> >> doInitialization? It seems like it should be the other way >> >> around. >> >> >> > > No, you can't call it before doInitialization. > releaseMemoryOnTheFly is called before doFinalization, that looks > right > to me. > doInitialization is called above, always before releaseMemory. > There is one situation where doInitialization is called, but run() > isn't, then releaseMemoryOnTheFly then doFinalization. > But that should be OK too, since then wasRun will be false, and > releaseMemory won't be called. Oops again. Here, I meant to ask if releaseMemoryOnTheFly should be called after doFinialization. It seems that a pass' doFinalization may want to have access to the pass' state before it gets freed. Dan From devang.patel at gmail.com Mon Jun 29 15:58:27 2009 From: devang.patel at gmail.com (Devang Patel) Date: Mon, 29 Jun 2009 13:58:27 -0700 Subject: [llvm-commits] [llvm] r74439 - /llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp In-Reply-To: <200906291851.n5TIpEkE027628@zion.cs.uiuc.edu> References: <200906291851.n5TIpEkE027628@zion.cs.uiuc.edu> Message-ID: <352a1fb20906291358m5251549fn34b71f733dacbec4@mail.gmail.com> On Mon, Jun 29, 2009 at 11:51 AM, Andreas Bolka wrote: > Author: abolka > Date: Mon Jun 29 13:51:11 2009 > New Revision: 74439 > > URL: http://llvm.org/viewvc/llvm-project?rev=74439&view=rev > Log: > Relax LDA memory instruction checks. Thanks! - Devang From edwintorok at gmail.com Mon Jun 29 16:01:23 2009 From: edwintorok at gmail.com (=?ISO-8859-1?Q?T=F6r=F6k_Edwin?=) Date: Tue, 30 Jun 2009 00:01:23 +0300 Subject: [llvm-commits] [PATCH] Avoid use after free in ScalarEvolution In-Reply-To: References: <4A16816C.7080405@gmail.com> <4AFCEFE6-6B21-4B33-998F-DACE37C5235E@apple.com> <4A369661.8050909@gmail.com> <2BDFCF40-1E6F-47E3-917D-E1148DE31CF7@apple.com> <4A374784.3030607@gmail.com> <4A476FAF.3020205@gmail.com> <4A49067E.6070404@gmail.com> Message-ID: <4A492BA3.6060906@gmail.com> On 2009-06-29 23:46, Dan Gohman wrote: > On Jun 29, 2009, at 11:22 AM, T?r?k Edwin wrote: > > > >> On 2009-06-29 21:15, Dan Gohman wrote: >> >> >>>> + if (!wasRun) >>>> >>>> + return; >>>> >>>> + for (unsigned Index = 0; Index < getNumContainedManagers(); + >>>> >>>> >>> +Index) { >>> >>> >>>> + FPPassManager *FPPM = getContainedManager(Index); >>>> >>>> + for (unsigned Index = 0; Index < FPPM->getNumContainedPasses >>>> >>>> >>> (); ++Index) { >>> >>> >>>> + FPPM->getContainedPass(Index)->releaseMemory(); >>>> >>>> + } >>>> >>>> + } >>>> >>>> +} >>>> >>>> >>> Should this set wasRun to true after freeing all the memory? >>> >>> >>> >>> >> wasRun is already true, otherwise we would have returned early. >> wasRun only guards against calling releaseMemory() before the first >> run() call. >> > > Oops. I meant to ask if wasRun should be set to false afterwards, > to indicate that all of the state has been reset. Even if not > necessary for correctness, this may be a nice invariant. > Makes sense, I'll set it to false. > >> >>> + // Finalize on-the-fly passes >>> >>> + for (std::map::iterator >>> >>> + I = OnTheFlyManagers.begin(), E = OnTheFlyManagers.end(); >>> >>> + I != E; ++I) { >>> >>> + FunctionPassManagerImpl *FPP = I->second; >>> >>> + // We don't know when is the last time an on-the-fly pass is >>> run, >>> >>> + // so we need to releaseMemory / finalize here >>> >>> + FPP->releaseMemoryOnTheFly(); >>> >>> + Changed |= FPP->doFinalization(M); >>> >>> + } >>> >>> >>> >>> Is it correct to call releaseMemoryOnTheFly before calling >>> >>> doInitialization? It seems like it should be the other way >>> >>> around. >>> >>> >>> >>> >> No, you can't call it before doInitialization. >> releaseMemoryOnTheFly is called before doFinalization, that looks >> right >> to me. >> doInitialization is called above, always before releaseMemory. >> There is one situation where doInitialization is called, but run() >> isn't, then releaseMemoryOnTheFly then doFinalization. >> But that should be OK too, since then wasRun will be false, and >> releaseMemory won't be called. >> > > Oops again. Here, I meant to ask if releaseMemoryOnTheFly should > be called after doFinialization. It seems that a pass' doFinalization > may want to have access to the pass' state before it gets freed. > The documentation isn't very clear on that unfortunately. What if doFinalization deletes a map that run() and releaseMemory() are using, and releaseMemory only .clear()s it? Best regards, --Edwin From edwintorok at gmail.com Mon Jun 29 16:05:12 2009 From: edwintorok at gmail.com (Torok Edwin) Date: Mon, 29 Jun 2009 21:05:12 -0000 Subject: [llvm-commits] [llvm] r74455 - /llvm/trunk/lib/VMCore/PassManager.cpp Message-ID: <200906292105.n5TL5CAA031702@zion.cs.uiuc.edu> Author: edwin Date: Mon Jun 29 16:05:10 2009 New Revision: 74455 URL: http://llvm.org/viewvc/llvm-project?rev=74455&view=rev Log: Set wasRun to false here on Dan's suggestion. Modified: llvm/trunk/lib/VMCore/PassManager.cpp Modified: llvm/trunk/lib/VMCore/PassManager.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/PassManager.cpp?rev=74455&r1=74454&r2=74455&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/PassManager.cpp (original) +++ llvm/trunk/lib/VMCore/PassManager.cpp Mon Jun 29 16:05:10 2009 @@ -1305,6 +1305,7 @@ FPPM->getContainedPass(Index)->releaseMemory(); } } + wasRun = false; } // Execute all the passes managed by this top level manager. From clattner at apple.com Mon Jun 29 16:10:28 2009 From: clattner at apple.com (Chris Lattner) Date: Mon, 29 Jun 2009 14:10:28 -0700 Subject: [llvm-commits] CVS: llvm-www/pubs/index.html pubs.js In-Reply-To: <4A49036F.7010308@gmail.com> References: <200906291643.n5TGhjxt023422@zion.cs.uiuc.edu> <4A49036F.7010308@gmail.com> Message-ID: On Jun 29, 2009, at 11:09 AM, T?r?k Edwin wrote: > On 2009-06-29 19:43, Misha Brukman wrote: >> Changes in directory llvm-www/pubs: >> >> index.html updated: 1.91 -> 1.92 >> pubs.js updated: 1.46 -> 1.47 >> --- >> Log message: >> >> Added a histogram of publications over years as a chart. >> > > Sounds cool, where can I see the histogram? > It doesn't show up in my firefox. Doesn't work for me with safari either. BTW Misha, thank you *so* much for making pubs.js, it saved me a huge amount of time adding those pubs. -Chris From daniel at zuster.org Mon Jun 29 16:12:28 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Mon, 29 Jun 2009 21:12:28 -0000 Subject: [llvm-commits] [llvm] r74456 - in /llvm/trunk: lib/Makefile tools/Makefile Message-ID: <200906292112.n5TLCT7T031928@zion.cs.uiuc.edu> Author: ddunbar Date: Mon Jun 29 16:12:26 2009 New Revision: 74456 URL: http://llvm.org/viewvc/llvm-project?rev=74456&view=rev Log: Don't build LLVMC when configured with --disable-pic (it needs requires shared module support to build). Modified: llvm/trunk/lib/Makefile llvm/trunk/tools/Makefile Modified: llvm/trunk/lib/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Makefile?rev=74456&r1=74455&r2=74456&view=diff ============================================================================== --- llvm/trunk/lib/Makefile (original) +++ llvm/trunk/lib/Makefile Mon Jun 29 16:12:26 2009 @@ -8,8 +8,16 @@ ##===----------------------------------------------------------------------===## LEVEL = .. -PARALLEL_DIRS = VMCore AsmParser Bitcode Archive Analysis Transforms CodeGen \ - Target ExecutionEngine Debugger Linker CompilerDriver MC +include $(LEVEL)/Makefile.config + +PARALLEL_DIRS := VMCore AsmParser Bitcode Archive Analysis Transforms CodeGen \ + Target ExecutionEngine Debugger Linker MC + +# Only build the CompilerDriver when PIC is enabled. + +ifeq ($(ENABLE_PIC),1) +PARALLEL_DIRS += CompilerDriver +endif include $(LEVEL)/Makefile.common Modified: llvm/trunk/tools/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/Makefile?rev=74456&r1=74455&r2=74456&view=diff ============================================================================== --- llvm/trunk/tools/Makefile (original) +++ llvm/trunk/tools/Makefile Mon Jun 29 16:12:26 2009 @@ -20,7 +20,7 @@ llc llvm-ranlib llvm-ar llvm-nm \ llvm-ld llvm-prof llvm-link \ lli gccas gccld llvm-extract llvm-db \ - bugpoint llvm-bcanalyzer llvm-stub llvmc \ + bugpoint llvm-bcanalyzer llvm-stub \ llvm-mc # Let users override the set of tools to build from the command line. @@ -32,7 +32,7 @@ include $(LEVEL)/Makefile.config ifeq ($(ENABLE_PIC),1) - DIRS += lto + DIRS += lto llvmc ifdef BINUTILS_INCDIR DIRS += gold endif From daniel at zuster.org Mon Jun 29 16:14:22 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Mon, 29 Jun 2009 21:14:22 -0000 Subject: [llvm-commits] [llvm] r74457 - /llvm/trunk/tools/llvm-mc/AsmParser.cpp Message-ID: <200906292114.n5TLEMkD032000@zion.cs.uiuc.edu> Author: ddunbar Date: Mon Jun 29 16:14:21 2009 New Revision: 74457 URL: http://llvm.org/viewvc/llvm-project?rev=74457&view=rev Log: Fix uninitialized variable warning. Modified: llvm/trunk/tools/llvm-mc/AsmParser.cpp Modified: llvm/trunk/tools/llvm-mc/AsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/AsmParser.cpp?rev=74457&r1=74456&r2=74457&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/AsmParser.cpp (original) +++ llvm/trunk/tools/llvm-mc/AsmParser.cpp Mon Jun 29 16:14:21 2009 @@ -218,7 +218,7 @@ /// Res contains the LHS of the expression on input. bool AsmParser::ParseBinOpRHS(unsigned Precedence, AsmExpr *&Res) { while (1) { - AsmBinaryExpr::Opcode Kind; + AsmBinaryExpr::Opcode Kind = AsmBinaryExpr::Add; unsigned TokPrec = getBinOpPrecedence(Lexer.getKind(), Kind); // If the next token is lower precedence than we are allowed to eat, return From resistor at mac.com Mon Jun 29 16:24:21 2009 From: resistor at mac.com (Owen Anderson) Date: Mon, 29 Jun 2009 21:24:21 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r74458 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Message-ID: <200906292124.n5TLONt4032305@zion.cs.uiuc.edu> Author: resistor Date: Mon Jun 29 16:24:10 2009 New Revision: 74458 URL: http://llvm.org/viewvc/llvm-project?rev=74458&view=rev Log: Correct comment. Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=74458&r1=74457&r2=74458&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Mon Jun 29 16:24:10 2009 @@ -4467,8 +4467,8 @@ C[1] = ConstantInt::get(Type::Int1Ty, ls); C[2] = ConstantInt::get(Type::Int1Ty, sl); C[3] = ConstantInt::get(Type::Int1Ty, ss); - // We assume like gcc appears to, that this only applies to cached memory. - C[4] = ConstantInt::get(Type::Int1Ty, true); + // Be conservatively correct. + C[4] = ConstantInt::get(Type::Int1Ty, true1); Builder.CreateCall(Intrinsic::getDeclaration(TheModule, Intrinsic::memory_barrier), From brukman at gmail.com Mon Jun 29 16:29:16 2009 From: brukman at gmail.com (Misha Brukman) Date: Mon, 29 Jun 2009 17:29:16 -0400 Subject: [llvm-commits] CVS: llvm-www/pubs/index.html pubs.js In-Reply-To: <4A491F73.6040200@gmail.com> References: <200906291643.n5TGhjxt023422@zion.cs.uiuc.edu> <4A49036F.7010308@gmail.com> <4A491F73.6040200@gmail.com> Message-ID: 2009/6/29 T?r?k Edwin > On 2009-06-29 22:53, Misha Brukman wrote: > > 2009/6/29 T?r?k Edwin >> > > > > On 2009-06-29 19:43, Misha Brukman wrote: > > > Changes in directory llvm-www/pubs: > > > > > > index.html updated: 1.91 -> 1.92 > > > pubs.js updated: 1.46 -> 1.47 > > > --- > > > Log message: > > > > > > Added a histogram of publications over years as a chart. > > > > > > > Sounds cool, where can I see the histogram? > > It doesn't show up in my firefox. > > > > > > http://llvm.org/pubs/ -- see top right of the page. Works for me in > > Firefox 3 on Linux. > > Firefox 3.0.11, Linux here too. > > Using chart.apis.google.com in the URL instead of google.com makes the > image appear. > I don't know why www.google.com/charts doesn't work (it does if I > copy+paste the URL in a new tab). Fixed the URL, thanks. -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090629/a2446866/attachment.html From echristo at apple.com Mon Jun 29 16:29:10 2009 From: echristo at apple.com (Eric Christopher) Date: Mon, 29 Jun 2009 14:29:10 -0700 Subject: [llvm-commits] [llvm-gcc-4.2] r74458 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp In-Reply-To: <200906292124.n5TLONt4032305@zion.cs.uiuc.edu> References: <200906292124.n5TLONt4032305@zion.cs.uiuc.edu> Message-ID: On Jun 29, 2009, at 2:24 PM, Owen Anderson wrote: > - // We assume like gcc appears to, that this only applies to > cached memory. > - C[4] = ConstantInt::get(Type::Int1Ty, true); > + // Be conservatively correct. > + C[4] = ConstantInt::get(Type::Int1Ty, true1); typo? The only other true1 I see is in combine. -eric From gohman at apple.com Mon Jun 29 16:31:40 2009 From: gohman at apple.com (Dan Gohman) Date: Mon, 29 Jun 2009 21:31:40 -0000 Subject: [llvm-commits] [llvm] r74459 - /llvm/trunk/lib/Analysis/ScalarEvolution.cpp Message-ID: <200906292131.n5TLVgtg032606@zion.cs.uiuc.edu> Author: djg Date: Mon Jun 29 16:31:18 2009 New Revision: 74459 URL: http://llvm.org/viewvc/llvm-project?rev=74459&view=rev Log: Use getSCEV instead of getUnknown to create a SCEV for a Constant. This lets ConstantInts be handled as SCEVConstant instead of SCEVUnknown, as getUnknown no longer has special-case code for ConstantInt and friends. This usually doesn't affect the final output, since the constants end up getting folded later, but it does make intermediate expressions more obvious in many cases. Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=74459&r1=74458&r2=74459&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original) +++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Mon Jun 29 16:31:18 2009 @@ -3572,7 +3572,7 @@ Constant *RV = getConstantEvolutionLoopExitValue(PN, BTCC->getValue()->getValue(), LI); - if (RV) return getUnknown(RV); + if (RV) return getSCEV(RV); } } @@ -3586,7 +3586,7 @@ std::pair::iterator, bool> Pair = Values.insert(std::make_pair(L, static_cast(0))); if (!Pair.second) - return Pair.first->second ? &*getUnknown(Pair.first->second) : V; + return Pair.first->second ? &*getSCEV(Pair.first->second) : V; std::vector Operands; Operands.reserve(I->getNumOperands()); @@ -3635,7 +3635,7 @@ C = ConstantFoldInstOperands(I->getOpcode(), I->getType(), &Operands[0], Operands.size()); Pair.first->second = C; - return getUnknown(C); + return getSCEV(C); } } From brukman at cs.uiuc.edu Mon Jun 29 16:34:06 2009 From: brukman at cs.uiuc.edu (Misha Brukman) Date: Mon, 29 Jun 2009 16:34:06 -0500 Subject: [llvm-commits] CVS: llvm-www/pubs/pubs.js Message-ID: <200906292134.n5TLY6B1032685@zion.cs.uiuc.edu> Changes in directory llvm-www/pubs: pubs.js updated: 1.47 -> 1.48 --- Log message: Fixed URL for Google Chart API. --- Diffs of the changes: (+1 -1) pubs.js | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm-www/pubs/pubs.js diff -u llvm-www/pubs/pubs.js:1.47 llvm-www/pubs/pubs.js:1.48 --- llvm-www/pubs/pubs.js:1.47 Mon Jun 29 11:39:51 2009 +++ llvm-www/pubs/pubs.js Mon Jun 29 16:28:53 2009 @@ -897,7 +897,7 @@ var container = document.getElementById(id); var image = document.createElement('img'); - image.src = 'http://www.google.com/chart?cht=bvs' + // vertical bars + image.src = 'http://chart.apis.google.com/chart?cht=bvs' + // vertical bars '&chs=300x200' + // size '&chtt=Histogram' + // title '&chdl=Count' + // label in legend From isanbard at gmail.com Mon Jun 29 16:46:48 2009 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 29 Jun 2009 21:46:48 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r74461 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Message-ID: <200906292146.n5TLkmeL000679@zion.cs.uiuc.edu> Author: void Date: Mon Jun 29 16:46:47 2009 New Revision: 74461 URL: http://llvm.org/viewvc/llvm-project?rev=74461&view=rev Log: --- Reverse-merging (from foreign repository) r74458 into 'gcc/llvm-convert.cpp': U gcc/llvm-convert.cpp Temporarily revert r74458. It was causing bootstrap failures. Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=74461&r1=74460&r2=74461&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Mon Jun 29 16:46:47 2009 @@ -4467,8 +4467,8 @@ C[1] = ConstantInt::get(Type::Int1Ty, ls); C[2] = ConstantInt::get(Type::Int1Ty, sl); C[3] = ConstantInt::get(Type::Int1Ty, ss); - // Be conservatively correct. - C[4] = ConstantInt::get(Type::Int1Ty, true1); + // We assume like gcc appears to, that this only applies to cached memory. + C[4] = ConstantInt::get(Type::Int1Ty, true); Builder.CreateCall(Intrinsic::getDeclaration(TheModule, Intrinsic::memory_barrier), From isanbard at gmail.com Mon Jun 29 16:47:07 2009 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 29 Jun 2009 14:47:07 -0700 Subject: [llvm-commits] [llvm-gcc-4.2] r74458 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp In-Reply-To: <200906292124.n5TLONt4032305@zion.cs.uiuc.edu> References: <200906292124.n5TLONt4032305@zion.cs.uiuc.edu> Message-ID: <16e5fdf90906291447o2bb4a417q1dffa37188549d2c@mail.gmail.com> Hi Owen, This isn't correct. It was causing bootstrapping failures. I reverted it for now. -bw On Mon, Jun 29, 2009 at 2:24 PM, Owen Anderson wrote: > Author: resistor > Date: Mon Jun 29 16:24:10 2009 > New Revision: 74458 > > URL: http://llvm.org/viewvc/llvm-project?rev=74458&view=rev > Log: > Correct comment. > > Modified: > ? ?llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp > > Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=74458&r1=74457&r2=74458&view=diff > > ============================================================================== > --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) > +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Mon Jun 29 16:24:10 2009 > @@ -4467,8 +4467,8 @@ > ? C[1] = ConstantInt::get(Type::Int1Ty, ls); > ? C[2] = ConstantInt::get(Type::Int1Ty, sl); > ? C[3] = ConstantInt::get(Type::Int1Ty, ss); > - ?// We assume like gcc appears to, that this only applies to cached memory. > - ?C[4] = ConstantInt::get(Type::Int1Ty, true); > + ?// Be conservatively correct. > + ?C[4] = ConstantInt::get(Type::Int1Ty, true1); > > ? Builder.CreateCall(Intrinsic::getDeclaration(TheModule, > ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?Intrinsic::memory_barrier), > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From daniel at zuster.org Mon Jun 29 16:58:23 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Mon, 29 Jun 2009 21:58:23 -0000 Subject: [llvm-commits] [llvm] r74462 - /llvm/trunk/tools/llvm-mc/AsmLexer.cpp Message-ID: <200906292158.n5TLwNvq001270@zion.cs.uiuc.edu> Author: ddunbar Date: Mon Jun 29 16:58:22 2009 New Revision: 74462 URL: http://llvm.org/viewvc/llvm-project?rev=74462&view=rev Log: llvm-mc: Recognize C++ style comments. Modified: llvm/trunk/tools/llvm-mc/AsmLexer.cpp Modified: llvm/trunk/tools/llvm-mc/AsmLexer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/AsmLexer.cpp?rev=74462&r1=74461&r2=74462&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/AsmLexer.cpp (original) +++ llvm/trunk/tools/llvm-mc/AsmLexer.cpp Mon Jun 29 16:58:22 2009 @@ -109,8 +109,11 @@ /// LexSlash: Slash: / /// C-Style Comment: /* ... */ asmtok::TokKind AsmLexer::LexSlash() { - if (*CurPtr != '*') - return asmtok::Slash; + switch (*CurPtr) { + case '*': break; // C style comment. + case '/': return ++CurPtr, LexLineComment(); + default: return asmtok::Slash; + } // C Style comment. ++CurPtr; // skip the star. @@ -129,8 +132,9 @@ } } -/// LexHash: Comment: #[^\n]* -asmtok::TokKind AsmLexer::LexHash() { +/// LexLineComment: Comment: #[^\n]* +/// : //[^\n]* +asmtok::TokKind AsmLexer::LexLineComment() { int CurChar = getNextChar(); while (CurChar != '\n' && CurChar != '\n' && CurChar != EOF) CurChar = getNextChar(); @@ -281,7 +285,7 @@ return asmtok::Exclaim; case '%': return LexPercent(); case '/': return LexSlash(); - case '#': return LexHash(); + case '#': return LexLineComment(); case '"': return LexQuote(); case '0': case '1': case '2': case '3': case '4': case '5': case '6': case '7': case '8': case '9': From daniel at zuster.org Mon Jun 29 17:00:58 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Mon, 29 Jun 2009 22:00:58 -0000 Subject: [llvm-commits] [llvm] r74463 - in /llvm/trunk: test/MC/AsmParser/exprs.s tools/llvm-mc/AsmLexer.h Message-ID: <200906292200.n5TM0wWu001366@zion.cs.uiuc.edu> Author: ddunbar Date: Mon Jun 29 17:00:57 2009 New Revision: 74463 URL: http://llvm.org/viewvc/llvm-project?rev=74463&view=rev Log: llvm-mc: Recognize C++ style comments. Modified: llvm/trunk/test/MC/AsmParser/exprs.s llvm/trunk/tools/llvm-mc/AsmLexer.h Modified: llvm/trunk/test/MC/AsmParser/exprs.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AsmParser/exprs.s?rev=74463&r1=74462&r2=74463&view=diff ============================================================================== --- llvm/trunk/test/MC/AsmParser/exprs.s (original) +++ llvm/trunk/test/MC/AsmParser/exprs.s Mon Jun 29 17:00:57 2009 @@ -1,8 +1,8 @@ -# FIXME: For now this test just checks that llvm-mc works. Once we have .macro, -# .if, and .abort we can write a better test (without resorting to miles of -# greps). +// FIXME: For now this test just checks that llvm-mc works. Once we have .macro, +// .if, and .abort we can write a better test (without resorting to miles of +// greps). -# RUN: llvm-mc %s > %t +// RUN: llvm-mc %s > %t .byte !1 + 2 .byte !0 Modified: llvm/trunk/tools/llvm-mc/AsmLexer.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/AsmLexer.h?rev=74463&r1=74462&r2=74463&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/AsmLexer.h (original) +++ llvm/trunk/tools/llvm-mc/AsmLexer.h Mon Jun 29 17:00:57 2009 @@ -108,7 +108,7 @@ asmtok::TokKind LexIdentifier(); asmtok::TokKind LexPercent(); asmtok::TokKind LexSlash(); - asmtok::TokKind LexHash(); + asmtok::TokKind LexLineComment(); asmtok::TokKind LexDigit(); asmtok::TokKind LexQuote(); }; From david_goodwin at apple.com Mon Jun 29 17:25:38 2009 From: david_goodwin at apple.com (David Goodwin) Date: Mon, 29 Jun 2009 22:25:38 -0000 Subject: [llvm-commits] [llvm] r74464 - in /llvm/trunk/test/CodeGen/Thumb2: thumb2-adc.ll thumb2-add2.ll thumb2-sbc2.ll thumb2-sub.ll thumb2-sub2.ll thumb2-sub4.ll thumb2-sub5.ll Message-ID: <200906292225.n5TMPf65002371@zion.cs.uiuc.edu> Author: david_goodwin Date: Mon Jun 29 17:25:22 2009 New Revision: 74464 URL: http://llvm.org/viewvc/llvm-project?rev=74464&view=rev Log: Thumb-2 tests Added: llvm/trunk/test/CodeGen/Thumb2/thumb2-sbc2.ll llvm/trunk/test/CodeGen/Thumb2/thumb2-sub.ll llvm/trunk/test/CodeGen/Thumb2/thumb2-sub2.ll llvm/trunk/test/CodeGen/Thumb2/thumb2-sub4.ll llvm/trunk/test/CodeGen/Thumb2/thumb2-sub5.ll Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-adc.ll llvm/trunk/test/CodeGen/Thumb2/thumb2-add2.ll Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-adc.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-adc.ll?rev=74464&r1=74463&r2=74464&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-adc.ll (original) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-adc.ll Mon Jun 29 17:25:22 2009 @@ -1,32 +1,32 @@ ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {adc\\W*r\[0-9\],\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#171\\|#1179666\\|#872428544\\|#1448498774\\|#66846720} | count 5 -; 734439407617 = 0x000000ab00000001 +; 734439407618 = 0x000000ab00000002 define i64 @f1(i64 %a) { - %tmp = add i64 %a, 734439407617 + %tmp = add i64 %a, 734439407618 ret i64 %tmp } -; 5066626890203137 = 0x0012001200000001 +; 5066626890203138 = 0x0012001200000002 define i64 @f2(i64 %a) { - %tmp = add i64 %a, 5066626890203137 + %tmp = add i64 %a, 5066626890203138 ret i64 %tmp } -; 3747052064576897025 = 0x3400340000000001 +; 3747052064576897026 = 0x3400340000000002 define i64 @f3(i64 %a) { - %tmp = add i64 %a, 3747052064576897025 + %tmp = add i64 %a, 3747052064576897026 ret i64 %tmp } -; 6221254862626095105 = 0x5656565600000001 +; 6221254862626095106 = 0x5656565600000002 define i64 @f4(i64 %a) { - %tmp = add i64 %a, 6221254862626095105 + %tmp = add i64 %a, 6221254862626095106 ret i64 %tmp } -; 287104476244869121 = 0x03fc000000000001 +; 287104476244869122 = 0x03fc000000000002 define i64 @f5(i64 %a) { - %tmp = add i64 %a, 287104476244869121 + %tmp = add i64 %a, 287104476244869122 ret i64 %tmp } Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-add2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-add2.ll?rev=74464&r1=74463&r2=74464&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-add2.ll (original) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-add2.ll Mon Jun 29 17:25:22 2009 @@ -29,8 +29,3 @@ %tmp = add i32 %a, 510 ret i32 %tmp } - -define i32 @f6(i32 %a) { - %tmp = add i32 %a, 4095 - ret i32 %tmp -} Added: llvm/trunk/test/CodeGen/Thumb2/thumb2-sbc2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-sbc2.ll?rev=74464&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-sbc2.ll (added) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-sbc2.ll Mon Jun 29 17:25:22 2009 @@ -0,0 +1,6 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sbc\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]*} | count 1 + +define i64 @f1(i64 %a, i64 %b) { + %tmp = sub i64 %a, %b + ret i64 %tmp +} Added: llvm/trunk/test/CodeGen/Thumb2/thumb2-sub.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-sub.ll?rev=74464&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-sub.ll (added) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-sub.ll Mon Jun 29 17:25:22 2009 @@ -0,0 +1,31 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\[w\]\\?\\W*r\[0-9\],\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#171\\|#1179666\\|#872428544\\|#1448498774\\|#510} | count 5 + +; 171 = 0x000000ab +define i32 @f1(i32 %a) { + %tmp = sub i32 %a, 171 + ret i32 %tmp +} + +; 1179666 = 0x00120012 +define i32 @f2(i32 %a) { + %tmp = sub i32 %a, 1179666 + ret i32 %tmp +} + +; 872428544 = 0x34003400 +define i32 @f3(i32 %a) { + %tmp = sub i32 %a, 872428544 + ret i32 %tmp +} + +; 1448498774 = 0x56565656 +define i32 @f4(i32 %a) { + %tmp = sub i32 %a, 1448498774 + ret i32 %tmp +} + +; 510 = 0x000001fe +define i32 @f5(i32 %a) { + %tmp = sub i32 %a, 510 + ret i32 %tmp +} Added: llvm/trunk/test/CodeGen/Thumb2/thumb2-sub2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-sub2.ll?rev=74464&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-sub2.ll (added) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-sub2.ll Mon Jun 29 17:25:22 2009 @@ -0,0 +1,6 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {subw\\W*r\[0-9\],\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#4095} | count 1 + +define i32 @f1(i32 %a) { + %tmp = sub i32 %a, 4095 + ret i32 %tmp +} Added: llvm/trunk/test/CodeGen/Thumb2/thumb2-sub4.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-sub4.ll?rev=74464&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-sub4.ll (added) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-sub4.ll Mon Jun 29 17:25:22 2009 @@ -0,0 +1,6 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1 + +define i32 @f1(i32 %a, i32 %b) { + %tmp = sub i32 %a, %b + ret i32 %tmp +} Added: llvm/trunk/test/CodeGen/Thumb2/thumb2-sub5.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-sub5.ll?rev=74464&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-sub5.ll (added) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-sub5.ll Mon Jun 29 17:25:22 2009 @@ -0,0 +1,6 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {subs\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1 + +define i64 @f1(i64 %a, i64 %b) { + %tmp = sub i64 %a, %b + ret i64 %tmp +} From jyasskin at google.com Mon Jun 29 17:32:04 2009 From: jyasskin at google.com (Jeffrey Yasskin) Date: Mon, 29 Jun 2009 15:32:04 -0700 Subject: [llvm-commits] Initial OProfile symbolization support Message-ID: OProfile provides a library to tell it about JIT output, described at http://oprofile.sourceforge.net/doc/devel/jit-interface.html. This patch tells OProfile about function ranges, but not line numbers. It adds a --with-oprofile= flag to configure, but I don't know how to do the equivalent to cmake. Problems: 1. Because oprofile installs its libraries to /lib/oprofile, we need an -rpath option to let the loader find them. We could probably link the oprofile library statically to avoid this (but how?). 2. llvm-config doesn't include the required -L and -rpath flags in its --ldflags output, even though it includes -lopagent. 3. cmake support is missing, as mentioned above. I've tested this by running the attached fib.c under lli. Let me know if you can think of an automated way to test it. The output from opreport follows: Before: $ opreport -l ~/opensource/llvm/trunk/dbg/Debug/bin/lli CPU: Core 2, speed 1998 MHz (estimated) Counted CPU_CLK_UNHALTED events (Clock cycles when not halted) with a unit mask of 0x00 (Unhalted core cycles) count 100000 samples % image name symbol name 48182 98.9729 anon (tgid:19412 range:0x7f12ccaab000-0x7f12cdaab000) anon (tgid:19412 range:0x7f12ccaab000-0x7f12cdaab000) 11 0.0226 libstdc++.so.6.0.9 /usr/lib/libstdc++.so.6.0.9 10 0.0205 lli llvm::MachineOperand::isReg() const ... After: $ opreport -l ~/opensource/llvm/oprof/dbg/Debug/bin/lli CPU: Core 2, speed 1998 MHz (estimated) Counted CPU_CLK_UNHALTED events (Clock cycles when not halted) with a unit mask of 0x00 (Unhalted core cycles) count 100000 samples % image name symbol name 24565 60.7308 19814.jo fib_left 15365 37.9861 19814.jo fib_right 22 0.0544 ld-2.7.so do_lookup_x 10 0.0247 lli llvm::MachineOperand::isReg() const 8 0.0198 ld-2.7.so _dl_relocate_object 8 0.0198 lli std::vector >::size() const ... -------------- next part -------------- A non-text attachment was scrubbed... Name: oprofile.patch Type: text/x-patch Size: 7684 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090629/15c69b27/attachment.bin -------------- next part -------------- A non-text attachment was scrubbed... Name: fib.c Type: text/x-csrc Size: 1013 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090629/15c69b27/attachment-0001.bin From clattner at apple.com Mon Jun 29 17:36:40 2009 From: clattner at apple.com (Chris Lattner) Date: Mon, 29 Jun 2009 15:36:40 -0700 Subject: [llvm-commits] CVS: llvm-www/pubs/pubs.js In-Reply-To: <200906292134.n5TLY6B1032685@zion.cs.uiuc.edu> References: <200906292134.n5TLY6B1032685@zion.cs.uiuc.edu> Message-ID: <9BD5D29B-311C-405B-B4AB-E30B1011F54A@apple.com> On Jun 29, 2009, at 2:34 PM, Misha Brukman wrote: > > > Changes in directory llvm-www/pubs: > > pubs.js updated: 1.47 -> 1.48 > --- > Log message: > > Fixed URL for Google Chart API. Nice, works great now. -Chris > > > > --- > Diffs of the changes: (+1 -1) > > pubs.js | 2 +- > 1 files changed, 1 insertion(+), 1 deletion(-) > > > Index: llvm-www/pubs/pubs.js > diff -u llvm-www/pubs/pubs.js:1.47 llvm-www/pubs/pubs.js:1.48 > --- llvm-www/pubs/pubs.js:1.47 Mon Jun 29 11:39:51 2009 > +++ llvm-www/pubs/pubs.js Mon Jun 29 16:28:53 2009 > @@ -897,7 +897,7 @@ > > var container = document.getElementById(id); > var image = document.createElement('img'); > - image.src = 'http://www.google.com/chart?cht=bvs' + // vertical > bars > + image.src = 'http://chart.apis.google.com/chart?cht=bvs' + // > vertical bars > '&chs=300x200' + // size > '&chtt=Histogram' + // title > '&chdl=Count' + // label in > legend > > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From david_goodwin at apple.com Mon Jun 29 17:49:43 2009 From: david_goodwin at apple.com (David Goodwin) Date: Mon, 29 Jun 2009 22:49:43 -0000 Subject: [llvm-commits] [llvm] r74468 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb2.td test/CodeGen/Thumb2/thumb2-teq.ll test/CodeGen/Thumb2/thumb2-teq2.ll test/CodeGen/Thumb2/thumb2-tst.ll test/CodeGen/Thumb2/thumb2-tst2.ll Message-ID: <200906292249.n5TMni1Q003345@zion.cs.uiuc.edu> Author: david_goodwin Date: Mon Jun 29 17:49:42 2009 New Revision: 74468 URL: http://llvm.org/viewvc/llvm-project?rev=74468&view=rev Log: Add Thumb-2 support for TEQ amd TST. Added: llvm/trunk/test/CodeGen/Thumb2/thumb2-teq.ll llvm/trunk/test/CodeGen/Thumb2/thumb2-teq2.ll llvm/trunk/test/CodeGen/Thumb2/thumb2-tst.ll llvm/trunk/test/CodeGen/Thumb2/thumb2-tst2.ll Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=74468&r1=74467&r2=74468&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Mon Jun 29 17:49:42 2009 @@ -621,7 +621,10 @@ def : T2Pat<(ARMcmpZ GPR:$src, t2_so_imm_neg:$imm), (t2CMNri GPR:$src, t2_so_imm_neg:$imm)>; -// FIXME: TST, TEQ, etc. +defm t2TST : T2I_cmp_is<"tst", + BinOpFrag<(ARMcmpZ (and node:$LHS, node:$RHS), 0)>>; +defm t2TEQ : T2I_cmp_is<"teq", + BinOpFrag<(ARMcmpZ (xor node:$LHS, node:$RHS), 0)>>; // A8.6.27 CBNZ, CBZ - Compare and branch on (non)zero. // Short range conditional branch. Looks awesome for loops. Need to figure Added: llvm/trunk/test/CodeGen/Thumb2/thumb2-teq.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-teq.ll?rev=74468&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-teq.ll (added) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-teq.ll Mon Jun 29 17:49:42 2009 @@ -0,0 +1,71 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {teq\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#187\\|#11141290\\|#3422604288\\|#1114112\\|#3722304989} | count 10 + +; 0x000000bb = 187 +define i1 @f1(i32 %a) { + %tmp = xor i32 %a, 187 + %tmp1 = icmp ne i32 %tmp, 0 + ret i1 %tmp1 +} + +; 0x000000bb = 187 +define i1 @f2(i32 %a) { + %tmp = xor i32 %a, 187 + %tmp1 = icmp eq i32 0, %tmp + ret i1 %tmp1 +} + +; 0x00aa00aa = 11141290 +define i1 @f3(i32 %a) { + %tmp = xor i32 %a, 11141290 + %tmp1 = icmp eq i32 %tmp, 0 + ret i1 %tmp1 +} + +; 0x00aa00aa = 11141290 +define i1 @f4(i32 %a) { + %tmp = xor i32 %a, 11141290 + %tmp1 = icmp ne i32 0, %tmp + ret i1 %tmp1 +} + +; 0xcc00cc00 = 3422604288 +define i1 @f5(i32 %a) { + %tmp = xor i32 %a, 3422604288 + %tmp1 = icmp ne i32 %tmp, 0 + ret i1 %tmp1 +} + +; 0xcc00cc00 = 3422604288 +define i1 @f6(i32 %a) { + %tmp = xor i32 %a, 3422604288 + %tmp1 = icmp eq i32 0, %tmp + ret i1 %tmp1 +} + +; 0xdddddddd = 3722304989 +define i1 @f7(i32 %a) { + %tmp = xor i32 %a, 3722304989 + %tmp1 = icmp eq i32 %tmp, 0 + ret i1 %tmp1 +} + +; 0xdddddddd = 3722304989 +define i1 @f8(i32 %a) { + %tmp = xor i32 %a, 3722304989 + %tmp1 = icmp ne i32 0, %tmp + ret i1 %tmp1 +} + +; 0x00110000 = 1114112 +define i1 @f9(i32 %a) { + %tmp = xor i32 %a, 1114112 + %tmp1 = icmp ne i32 %tmp, 0 + ret i1 %tmp1 +} + +; 0x00110000 = 1114112 +define i1 @f10(i32 %a) { + %tmp = xor i32 %a, 1114112 + %tmp1 = icmp eq i32 0, %tmp + ret i1 %tmp1 +} Added: llvm/trunk/test/CodeGen/Thumb2/thumb2-teq2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-teq2.ll?rev=74468&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-teq2.ll (added) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-teq2.ll Mon Jun 29 17:49:42 2009 @@ -0,0 +1,25 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {teq\\W*r\[0-9\],\\W*r\[0-9\]} | count 4 + +define i1 @f1(i32 %a, i32 %b) { + %tmp = xor i32 %a, %b + %tmp1 = icmp ne i32 %tmp, 0 + ret i1 %tmp1 +} + +define i1 @f2(i32 %a, i32 %b) { + %tmp = xor i32 %a, %b + %tmp1 = icmp eq i32 %tmp, 0 + ret i1 %tmp1 +} + +define i1 @f3(i32 %a, i32 %b) { + %tmp = xor i32 %a, %b + %tmp1 = icmp ne i32 0, %tmp + ret i1 %tmp1 +} + +define i1 @f4(i32 %a, i32 %b) { + %tmp = xor i32 %a, %b + %tmp1 = icmp eq i32 0, %tmp + ret i1 %tmp1 +} Added: llvm/trunk/test/CodeGen/Thumb2/thumb2-tst.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-tst.ll?rev=74468&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-tst.ll (added) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-tst.ll Mon Jun 29 17:49:42 2009 @@ -0,0 +1,71 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#187\\|#11141290\\|#3422604288\\|#1114112\\|#3722304989} | count 10 + +; 0x000000bb = 187 +define i1 @f1(i32 %a) { + %tmp = and i32 %a, 187 + %tmp1 = icmp ne i32 %tmp, 0 + ret i1 %tmp1 +} + +; 0x000000bb = 187 +define i1 @f2(i32 %a) { + %tmp = and i32 %a, 187 + %tmp1 = icmp eq i32 0, %tmp + ret i1 %tmp1 +} + +; 0x00aa00aa = 11141290 +define i1 @f3(i32 %a) { + %tmp = and i32 %a, 11141290 + %tmp1 = icmp eq i32 %tmp, 0 + ret i1 %tmp1 +} + +; 0x00aa00aa = 11141290 +define i1 @f4(i32 %a) { + %tmp = and i32 %a, 11141290 + %tmp1 = icmp ne i32 0, %tmp + ret i1 %tmp1 +} + +; 0xcc00cc00 = 3422604288 +define i1 @f5(i32 %a) { + %tmp = and i32 %a, 3422604288 + %tmp1 = icmp ne i32 %tmp, 0 + ret i1 %tmp1 +} + +; 0xcc00cc00 = 3422604288 +define i1 @f6(i32 %a) { + %tmp = and i32 %a, 3422604288 + %tmp1 = icmp eq i32 0, %tmp + ret i1 %tmp1 +} + +; 0xdddddddd = 3722304989 +define i1 @f7(i32 %a) { + %tmp = and i32 %a, 3722304989 + %tmp1 = icmp eq i32 %tmp, 0 + ret i1 %tmp1 +} + +; 0xdddddddd = 3722304989 +define i1 @f8(i32 %a) { + %tmp = and i32 %a, 3722304989 + %tmp1 = icmp ne i32 0, %tmp + ret i1 %tmp1 +} + +; 0x00110000 = 1114112 +define i1 @f9(i32 %a) { + %tmp = and i32 %a, 1114112 + %tmp1 = icmp ne i32 %tmp, 0 + ret i1 %tmp1 +} + +; 0x00110000 = 1114112 +define i1 @f10(i32 %a) { + %tmp = and i32 %a, 1114112 + %tmp1 = icmp eq i32 0, %tmp + ret i1 %tmp1 +} Added: llvm/trunk/test/CodeGen/Thumb2/thumb2-tst2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-tst2.ll?rev=74468&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-tst2.ll (added) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-tst2.ll Mon Jun 29 17:49:42 2009 @@ -0,0 +1,25 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\W*r\[0-9\],\\W*r\[0-9\]} | count 4 + +define i1 @f1(i32 %a, i32 %b) { + %tmp = and i32 %a, %b + %tmp1 = icmp ne i32 %tmp, 0 + ret i1 %tmp1 +} + +define i1 @f2(i32 %a, i32 %b) { + %tmp = and i32 %a, %b + %tmp1 = icmp eq i32 %tmp, 0 + ret i1 %tmp1 +} + +define i1 @f3(i32 %a, i32 %b) { + %tmp = and i32 %a, %b + %tmp1 = icmp ne i32 0, %tmp + ret i1 %tmp1 +} + +define i1 @f4(i32 %a, i32 %b) { + %tmp = and i32 %a, %b + %tmp1 = icmp eq i32 0, %tmp + ret i1 %tmp1 +} From greened at obbligato.org Mon Jun 29 17:50:51 2009 From: greened at obbligato.org (David Greene) Date: Mon, 29 Jun 2009 22:50:51 -0000 Subject: [llvm-commits] [llvm] r74469 - in /llvm/trunk/lib/Target/X86: X86ISelLowering.cpp X86RegisterInfo.td Message-ID: <200906292250.n5TMoqgx003421@zion.cs.uiuc.edu> Author: greened Date: Mon Jun 29 17:50:51 2009 New Revision: 74469 URL: http://llvm.org/viewvc/llvm-project?rev=74469&view=rev Log: Add a 256-bit register class and YMM registers. Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/lib/Target/X86/X86RegisterInfo.td Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=74469&r1=74468&r2=74469&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Jun 29 17:50:51 2009 @@ -785,6 +785,11 @@ } if (!UseSoftFloat && Subtarget->hasAVX()) { + addRegisterClass(MVT::v8f32, X86::VR256RegisterClass); + addRegisterClass(MVT::v4f64, X86::VR256RegisterClass); + addRegisterClass(MVT::v8i32, X86::VR256RegisterClass); + addRegisterClass(MVT::v4i64, X86::VR256RegisterClass); + setOperationAction(ISD::LOAD, MVT::v8f32, Legal); setOperationAction(ISD::LOAD, MVT::v8i32, Legal); setOperationAction(ISD::LOAD, MVT::v4f64, Legal); Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.td?rev=74469&r1=74468&r2=74469&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86RegisterInfo.td (original) +++ llvm/trunk/lib/Target/X86/X86RegisterInfo.td Mon Jun 29 17:50:51 2009 @@ -157,6 +157,24 @@ def XMM14: Register<"xmm14">, DwarfRegNum<[31, -2, -2]>; def XMM15: Register<"xmm15">, DwarfRegNum<[32, -2, -2]>; + // YMM Registers, used by AVX instructions + def YMM0: Register<"ymm0">, DwarfRegNum<[17, 21, 21]>; + def YMM1: Register<"ymm1">, DwarfRegNum<[18, 22, 22]>; + def YMM2: Register<"ymm2">, DwarfRegNum<[19, 23, 23]>; + def YMM3: Register<"ymm3">, DwarfRegNum<[20, 24, 24]>; + def YMM4: Register<"ymm4">, DwarfRegNum<[21, 25, 25]>; + def YMM5: Register<"ymm5">, DwarfRegNum<[22, 26, 26]>; + def YMM6: Register<"ymm6">, DwarfRegNum<[23, 27, 27]>; + def YMM7: Register<"ymm7">, DwarfRegNum<[24, 28, 28]>; + def YMM8: Register<"ymm8">, DwarfRegNum<[25, -2, -2]>; + def YMM9: Register<"ymm9">, DwarfRegNum<[26, -2, -2]>; + def YMM10: Register<"ymm10">, DwarfRegNum<[27, -2, -2]>; + def YMM11: Register<"ymm11">, DwarfRegNum<[28, -2, -2]>; + def YMM12: Register<"ymm12">, DwarfRegNum<[29, -2, -2]>; + def YMM13: Register<"ymm13">, DwarfRegNum<[30, -2, -2]>; + def YMM14: Register<"ymm14">, DwarfRegNum<[31, -2, -2]>; + def YMM15: Register<"ymm15">, DwarfRegNum<[32, -2, -2]>; + // Floating point stack registers def ST0 : Register<"st(0)">, DwarfRegNum<[33, 12, 11]>; def ST1 : Register<"st(1)">, DwarfRegNum<[34, 13, 12]>; @@ -229,6 +247,11 @@ [EAX, ECX, EDX, EBX, ESP, EBP, ESI, EDI, R8D, R9D, R10D, R11D, R12D, R13D, R14D, R15D]>; +def : SubRegSet<1, [YMM0, YMM1, YMM2, YMM3, YMM4, YMM5, YMM6, YMM7, + YMM8, YMM9, YMM10, YMM11, YMM12, YMM13, YMM14, YMM15], + [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, + XMM8, XMM9, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15]>; + //===----------------------------------------------------------------------===// // Register Class Definitions... now that we have all of the pieces, define the // top-level register classes. The order specified in the register list is @@ -755,6 +778,10 @@ } }]; } +def VR256 : RegisterClass<"X86", [ v8i32, v4i64, v8f32, v4f64],256, + [YMM0, YMM1, YMM2, YMM3, YMM4, YMM5, YMM6, YMM7, + YMM8, YMM9, YMM10, YMM11, + YMM12, YMM13, YMM14, YMM15]>; // Status flags registers. def CCR : RegisterClass<"X86", [i32], 32, [EFLAGS]> { From clattner at apple.com Mon Jun 29 17:51:22 2009 From: clattner at apple.com (Chris Lattner) Date: Mon, 29 Jun 2009 15:51:22 -0700 Subject: [llvm-commits] [llvm] r74444 - in /llvm/trunk: docs/TableGenFundamentals.html utils/TableGen/Record.cpp utils/TableGen/Record.h In-Reply-To: <200906292005.n5TK5gGn029811@zion.cs.uiuc.edu> References: <200906292005.n5TK5gGn029811@zion.cs.uiuc.edu> Message-ID: <71487B9A-572B-4D88-BDFB-64A77A404D5A@apple.com> On Jun 29, 2009, at 1:05 PM, David Greene wrote: > Author: greened > Date: Mon Jun 29 15:05:29 2009 > New Revision: 74444 > Implement !cast. Hi David, > + > +// VarInit *LHSv = dynamic_cast(LHS); > +// if (LHSv) { > +// // If this is not a template arg, cast it > +// if (!CurRec->isTemplateArg(LHSv->getName()) > +// && !CurMultiClass) { > +// return new StringInit(LHSv->getName()); > +// } > +// break; > +// } > + > +// OpInit *LHSo = dynamic_cast(LHS); > +// if (!LHSo) { > +// return new StringInit(LHS->getAsString()); > +// } > + } Please remove the commented-out code, thanks! -Chris From resistor at mac.com Mon Jun 29 17:55:07 2009 From: resistor at mac.com (Owen Anderson) Date: Mon, 29 Jun 2009 22:55:07 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r74470 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Message-ID: <200906292255.n5TMt7DE003699@zion.cs.uiuc.edu> Author: resistor Date: Mon Jun 29 17:55:07 2009 New Revision: 74470 URL: http://llvm.org/viewvc/llvm-project?rev=74470&view=rev Log: Correct comment, without the typo this time. Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=74470&r1=74469&r2=74470&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Mon Jun 29 17:55:07 2009 @@ -4467,7 +4467,7 @@ C[1] = ConstantInt::get(Type::Int1Ty, ls); C[2] = ConstantInt::get(Type::Int1Ty, sl); C[3] = ConstantInt::get(Type::Int1Ty, ss); - // We assume like gcc appears to, that this only applies to cached memory. + // Be conservatively safe. C[4] = ConstantInt::get(Type::Int1Ty, true); Builder.CreateCall(Intrinsic::getDeclaration(TheModule, From greened at obbligato.org Mon Jun 29 17:55:53 2009 From: greened at obbligato.org (David Greene) Date: Mon, 29 Jun 2009 22:55:53 -0000 Subject: [llvm-commits] [llvm] r74471 - /llvm/trunk/utils/TableGen/Record.cpp Message-ID: <200906292255.n5TMtrsV003734@zion.cs.uiuc.edu> Author: greened Date: Mon Jun 29 17:55:52 2009 New Revision: 74471 URL: http://llvm.org/viewvc/llvm-project?rev=74471&view=rev Log: Remove commented code. Modified: llvm/trunk/utils/TableGen/Record.cpp Modified: llvm/trunk/utils/TableGen/Record.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/Record.cpp?rev=74471&r1=74470&r2=74471&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/Record.cpp (original) +++ llvm/trunk/utils/TableGen/Record.cpp Mon Jun 29 17:55:52 2009 @@ -547,21 +547,6 @@ if (LHSd) { return new StringInit(LHSd->getDef()->getName()); } - -// VarInit *LHSv = dynamic_cast(LHS); -// if (LHSv) { -// // If this is not a template arg, cast it -// if (!CurRec->isTemplateArg(LHSv->getName()) -// && !CurMultiClass) { -// return new StringInit(LHSv->getName()); -// } -// break; -// } - -// OpInit *LHSo = dynamic_cast(LHS); -// if (!LHSo) { -// return new StringInit(LHS->getAsString()); -// } } else { StringInit *LHSs = dynamic_cast(LHS); From daniel at zuster.org Mon Jun 29 17:59:36 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Mon, 29 Jun 2009 22:59:36 -0000 Subject: [llvm-commits] [llvm] r74473 - /llvm/trunk/lib/CompilerDriver/Makefile Message-ID: <200906292259.n5TMxa0s003956@zion.cs.uiuc.edu> Author: ddunbar Date: Mon Jun 29 17:59:36 2009 New Revision: 74473 URL: http://llvm.org/viewvc/llvm-project?rev=74473&view=rev Log: Fix install of libCompilerDriver dynamic library to not copy on every build. Modified: llvm/trunk/lib/CompilerDriver/Makefile Modified: llvm/trunk/lib/CompilerDriver/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CompilerDriver/Makefile?rev=74473&r1=74472&r2=74473&view=diff ============================================================================== --- llvm/trunk/lib/CompilerDriver/Makefile (original) +++ llvm/trunk/lib/CompilerDriver/Makefile Mon Jun 29 17:59:36 2009 @@ -21,11 +21,12 @@ FullLibName = $(LIBRARYNAME)$(SHLIBEXT) +all-local:: $(ToolDir)/$(FullLibName) + # Copy the library to the bin dir so that llvmc can find it. -all-local:: - $(Echo) Copying $(BuildMode) Shared Library $(FullLibName) \ - to $(ToolDir) - -$(Verb) $(CP) $(LibDir)/$(FullLibName) $(ToolDir)/ +$(ToolDir)/$(FullLibName): $(LibDir)/$(FullLibName) $(ToolDir)/.dir + $(Echo) Copying $(BuildMode) Shared Library $(FullLibName) to $@ + -$(Verb) $(CP) $< $@ clean-local:: $(Echo) Removing $(BuildMode) Shared Library $(FullLibName) \ From daniel at zuster.org Mon Jun 29 18:29:08 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Mon, 29 Jun 2009 23:29:08 -0000 Subject: [llvm-commits] [llvm] r74474 - /llvm/trunk/include/llvm/Support/SourceMgr.h Message-ID: <200906292329.n5TNTA7e004881@zion.cs.uiuc.edu> Author: ddunbar Date: Mon Jun 29 18:28:55 2009 New Revision: 74474 URL: http://llvm.org/viewvc/llvm-project?rev=74474&view=rev Log: Add SMLoc::isValid method. - To support using SMLoc as a sentinel. Modified: llvm/trunk/include/llvm/Support/SourceMgr.h Modified: llvm/trunk/include/llvm/Support/SourceMgr.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/SourceMgr.h?rev=74474&r1=74473&r2=74474&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/SourceMgr.h (original) +++ llvm/trunk/include/llvm/Support/SourceMgr.h Mon Jun 29 18:28:55 2009 @@ -30,6 +30,8 @@ SMLoc() : Ptr(0) {} SMLoc(const SMLoc &RHS) : Ptr(RHS.Ptr) {} + bool isValid() const { return Ptr != 0; } + bool operator==(const SMLoc &RHS) const { return RHS.Ptr == Ptr; } bool operator!=(const SMLoc &RHS) const { return RHS.Ptr != Ptr; } From foldr at codedgers.com Mon Jun 29 18:29:23 2009 From: foldr at codedgers.com (Mikhail Glushenkov) Date: Mon, 29 Jun 2009 23:29:23 +0000 (UTC) Subject: [llvm-commits] =?utf-8?q?=5Bllvm=5D_r74473_-=09/llvm/trunk/lib/Co?= =?utf-8?q?mpilerDriver/Makefile?= References: <200906292259.n5TMxa0s003956@zion.cs.uiuc.edu> Message-ID: Daniel Dunbar writes: > Fix install of libCompilerDriver dynamic library to not copy on every build. Thanks! From foldr at codedgers.com Mon Jun 29 18:34:35 2009 From: foldr at codedgers.com (Mikhail Glushenkov) Date: Mon, 29 Jun 2009 23:34:35 +0000 (UTC) Subject: [llvm-commits] =?utf-8?q?=5Bllvm=5D_r74417_-_in_/llvm/trunk=3A_Ma?= =?utf-8?q?kefile=2Erules=09include/llvm/CompilerDriver/Main=2Einc?= =?utf-8?q?=09lib/CompilerDriver/BuiltinOptions=2Ecpp=09lib/Compile?= =?utf-8?q?rDriver/Makefile_lib/CompilerDriver/Tool=2Ecpp?= References: <200906290309.n5T39LPo015790@zion.cs.uiuc.edu> Message-ID: Hi, Howard Su writes: > Great. I can now wait to try. How can I compile a pass as a > DLL? Since you are talking about a pass, I guess you're thinking about *opt* plugins, but this was a *llvmc* commit. Anyway, to compile a llvmc plugin you should just cd to the plugin directory and run make: $ cd $LLVM_DIR/tools/llvmc/plugins/Base $ make $ cd $LLVM_DIR/tools/llvmc/example/Skeleton $ make $ llvmc-skeleton -load $LLVM_DIR/Release/lib/plugin_llvmc_Base.dll --help > Can you include a sample CMakefile? No, I don't use CMake. From isanbard at gmail.com Mon Jun 29 18:42:21 2009 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 29 Jun 2009 23:42:21 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r74475 - /llvm-gcc-4.2/trunk/gcc/function.c Message-ID: <200906292342.n5TNgLW5005272@zion.cs.uiuc.edu> Author: void Date: Mon Jun 29 18:42:21 2009 New Revision: 74475 URL: http://llvm.org/viewvc/llvm-project?rev=74475&view=rev Log: LLVM's optimizer does the inlining of "always_inline" functions. A function that returns an aggregate value may not be a problem in this case. The GCC inliner would normally inline these functions, and, if there are no more uses of said function, remove it entirely so that it would never hit this warning. For LLVM, check that the function is *not* marked "always_inline" before issuing the warning. Modified: llvm-gcc-4.2/trunk/gcc/function.c Modified: llvm-gcc-4.2/trunk/gcc/function.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/function.c?rev=74475&r1=74474&r2=74475&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/function.c (original) +++ llvm-gcc-4.2/trunk/gcc/function.c Mon Jun 29 18:42:21 2009 @@ -3985,7 +3985,13 @@ /* LLVM LOCAL end */ /* Warn if this value is an aggregate type, regardless of which calling convention we are using for it. */ - if (AGGREGATE_TYPE_P (TREE_TYPE (DECL_RESULT (subr)))) + /* LLVM LOCAL begin - */ + if (AGGREGATE_TYPE_P (TREE_TYPE (DECL_RESULT (subr))) +#ifdef ENABLE_LLVM + && !lookup_attribute ("always_inline", DECL_ATTRIBUTES (subr)) +#endif + ) + /* LLVM LOCAL end - */ warning (OPT_Waggregate_return, "function returns an aggregate"); } From daniel at zuster.org Mon Jun 29 18:43:14 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Mon, 29 Jun 2009 23:43:14 -0000 Subject: [llvm-commits] [llvm] r74476 - in /llvm/trunk: include/llvm/MC/MCContext.h include/llvm/MC/MCSymbol.h tools/llvm-mc/AsmParser.cpp Message-ID: <200906292343.n5TNhEGn005318@zion.cs.uiuc.edu> Author: ddunbar Date: Mon Jun 29 18:43:14 2009 New Revision: 74476 URL: http://llvm.org/viewvc/llvm-project?rev=74476&view=rev Log: llvm-mc: Diagnose misuse (mix) of defined symbols and labels. - For example, we diagnose errors on: -- a: a = 10 -- - For now we reject code like: -- .long a a = 10 -- which "as" accepts (on Darwin). Modified: llvm/trunk/include/llvm/MC/MCContext.h llvm/trunk/include/llvm/MC/MCSymbol.h llvm/trunk/tools/llvm-mc/AsmParser.cpp Modified: llvm/trunk/include/llvm/MC/MCContext.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCContext.h?rev=74476&r1=74475&r2=74476&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCContext.h (original) +++ llvm/trunk/include/llvm/MC/MCContext.h Mon Jun 29 18:43:14 2009 @@ -31,6 +31,8 @@ StringMap Symbols; /// SymbolValues - Bindings of symbols to values. + // + // FIXME: Is there a good reason to not just put this in the MCSymbol? DenseMap SymbolValues; /// Allocator - Allocator object used for creating machine code objects. Modified: llvm/trunk/include/llvm/MC/MCSymbol.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCSymbol.h?rev=74476&r1=74475&r2=74476&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCSymbol.h (original) +++ llvm/trunk/include/llvm/MC/MCSymbol.h Mon Jun 29 18:43:14 2009 @@ -17,14 +17,18 @@ MCSection *Section; std::string Name; unsigned IsTemporary : 1; + unsigned IsExternal : 1; public: MCSymbol(const char *_Name, bool _IsTemporary) - : Section(0), Name(_Name), IsTemporary(_IsTemporary) {} + : Section(0), Name(_Name), IsTemporary(_IsTemporary), IsExternal(false) {} MCSection *getSection() const { return Section; } void setSection(MCSection *Value) { Section = Value; } + bool isExternal() const { return IsExternal; } + void setExternal(bool Value) { IsExternal = Value; } + const std::string &getName() const { return Name; } }; Modified: llvm/trunk/tools/llvm-mc/AsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/AsmParser.cpp?rev=74476&r1=74475&r2=74476&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/AsmParser.cpp (original) +++ llvm/trunk/tools/llvm-mc/AsmParser.cpp Mon Jun 29 18:43:14 2009 @@ -17,6 +17,7 @@ #include "llvm/MC/MCContext.h" #include "llvm/MC/MCInst.h" #include "llvm/MC/MCStreamer.h" +#include "llvm/MC/MCSymbol.h" #include "llvm/Support/SourceMgr.h" #include "llvm/Support/raw_ostream.h" using namespace llvm; @@ -82,12 +83,19 @@ return true; Res = new AsmUnaryExpr(AsmUnaryExpr::LNot, Res); return false; - case asmtok::Identifier: + case asmtok::Identifier: { // This is a label, this should be parsed as part of an expression, to // handle things like LFOO+4. - Res = new AsmSymbolRefExpr(Ctx.GetOrCreateSymbol(Lexer.getCurStrVal())); + MCSymbol *Sym = Ctx.GetOrCreateSymbol(Lexer.getCurStrVal()); + + // If this is use of an undefined symbol then mark it external. + if (!Sym->getSection() && !Ctx.GetSymbolValue(Sym)) + Sym->setExternal(true); + + Res = new AsmSymbolRefExpr(Sym); Lexer.Lex(); // Eat identifier. return false; + } case asmtok::IntVal: Res = new AsmConstantExpr(Lexer.getCurIntVal()); Lexer.Lex(); // Eat identifier. @@ -270,16 +278,28 @@ // Consume the identifier, see what is after it. switch (Lexer.Lex()) { - case asmtok::Colon: + case asmtok::Colon: { // identifier ':' -> Label. Lexer.Lex(); + + // Diagnose attempt to use a variable as a label. + // + // FIXME: Diagnostics. Note the location of the definition as a label. + // FIXME: This doesn't diagnose assignment to a symbol which has been + // implicitly marked as external. + MCSymbol *Sym = Ctx.GetOrCreateSymbol(IDVal); + if (Sym->getSection()) + return Error(IDLoc, "invalid symbol redefinition"); + if (Ctx.GetSymbolValue(Sym)) + return Error(IDLoc, "symbol already used as assembler variable"); // Since we saw a label, create a symbol and emit it. // FIXME: If the label starts with L it is an assembler temporary label. // Why does the client of this api need to know this? - Out.EmitLabel(Ctx.GetOrCreateSymbol(IDVal)); - + Out.EmitLabel(Sym); + return ParseStatement(); + } case asmtok::Equal: // identifier '=' ... -> assignment statement @@ -440,6 +460,9 @@ } bool AsmParser::ParseAssignment(const char *Name, bool IsDotSet) { + // FIXME: Use better location, we should use proper tokens. + SMLoc EqualLoc = Lexer.getLoc(); + int64_t Value; if (ParseAbsoluteExpression(Value)) return true; @@ -450,9 +473,20 @@ // Eat the end of statement marker. Lexer.Lex(); - // Get the symbol for this name. + // Diagnose assignment to a label. + // + // FIXME: Diagnostics. Note the location of the definition as a label. + // FIXME: This doesn't diagnose assignment to a symbol which has been + // implicitly marked as external. // FIXME: Handle '.'. + // FIXME: Diagnose assignment to protected identifier (e.g., register name). MCSymbol *Sym = Ctx.GetOrCreateSymbol(Name); + if (Sym->getSection()) + return Error(EqualLoc, "invalid assignment to symbol emitted as a label"); + if (Sym->isExternal()) + return Error(EqualLoc, "invalid assignment to external symbol"); + + // Do the assignment. Out.EmitAssignment(Sym, MCValue::get(Value), IsDotSet); return false; From dpatel at apple.com Mon Jun 29 18:46:50 2009 From: dpatel at apple.com (Devang Patel) Date: Mon, 29 Jun 2009 23:46:50 -0000 Subject: [llvm-commits] [llvm] r74477 - /llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp Message-ID: <200906292346.n5TNkope005462@zion.cs.uiuc.edu> Author: dpatel Date: Mon Jun 29 18:46:50 2009 New Revision: 74477 URL: http://llvm.org/viewvc/llvm-project?rev=74477&view=rev Log: Struct types are described using field types only. Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp?rev=74477&r1=74476&r2=74477&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp (original) +++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp Mon Jun 29 18:46:50 2009 @@ -678,9 +678,6 @@ if (Element.getTag() == dwarf::DW_TAG_subprogram) ElemDie = CreateSubprogramDIE(DW_Unit, DISubprogram(Element.getGV())); - else if (Element.getTag() == dwarf::DW_TAG_variable) // ?? - ElemDie = CreateGlobalVariableDIE(DW_Unit, - DIGlobalVariable(Element.getGV())); else ElemDie = CreateMemberDIE(DW_Unit, DIDerivedType(Element.getGV())); From daniel at zuster.org Mon Jun 29 18:47:00 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Mon, 29 Jun 2009 23:47:00 -0000 Subject: [llvm-commits] [llvm] r74478 - in /llvm/trunk: include/llvm/MC/MCStreamer.h lib/MC/MCAsmStreamer.cpp test/MC/AsmParser/directive_align.s tools/llvm-mc/AsmParser.cpp tools/llvm-mc/AsmParser.h Message-ID: <200906292347.n5TNl09u005485@zion.cs.uiuc.edu> Author: ddunbar Date: Mon Jun 29 18:46:59 2009 New Revision: 74478 URL: http://llvm.org/viewvc/llvm-project?rev=74478&view=rev Log: llvm-mc: Parse .{,b,p2}align{,w,l} directives. Added: llvm/trunk/test/MC/AsmParser/directive_align.s Modified: llvm/trunk/include/llvm/MC/MCStreamer.h llvm/trunk/lib/MC/MCAsmStreamer.cpp llvm/trunk/tools/llvm-mc/AsmParser.cpp llvm/trunk/tools/llvm-mc/AsmParser.h Modified: llvm/trunk/include/llvm/MC/MCStreamer.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCStreamer.h?rev=74478&r1=74477&r2=74478&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCStreamer.h (original) +++ llvm/trunk/include/llvm/MC/MCStreamer.h Mon Jun 29 18:46:59 2009 @@ -135,7 +135,7 @@ /// This used to implement the .align assembler directive. /// /// @param ByteAlignment - The alignment to reach. This must be a power of - /// two. + /// two on some targets. /// @param Value - The value to use when filling bytes. /// @param Size - The size of the integer (in bytes) to emit for @param /// Value. This must match a native machine width. Modified: llvm/trunk/lib/MC/MCAsmStreamer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCAsmStreamer.cpp?rev=74478&r1=74477&r2=74478&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCAsmStreamer.cpp (original) +++ llvm/trunk/lib/MC/MCAsmStreamer.cpp Mon Jun 29 18:46:59 2009 @@ -105,6 +105,7 @@ OS << Symbol->getName() << ":\n"; Symbol->setSection(CurSection); + Symbol->setExternal(false); } void MCAsmStreamer::EmitAssignment(MCSymbol *Symbol, const MCValue &Value, @@ -164,20 +165,23 @@ void MCAsmStreamer::EmitValueToAlignment(unsigned ByteAlignment, int64_t Value, unsigned ValueSize, unsigned MaxBytesToEmit) { + // Some assemblers don't support .balign, so we always emit as .p2align if + // this is a power of two. Otherwise we assume the client knows the target + // supports .balign and use that. unsigned Pow2 = Log2_32(ByteAlignment); - assert((1U << Pow2) == ByteAlignment && "Invalid alignment!"); + bool IsPow2 = (1U << Pow2) == ByteAlignment; switch (ValueSize) { default: assert(0 && "Invalid size for machine code value!"); case 8: assert(0 && "Unsupported alignment size!"); - case 1: OS << ".p2align"; break; - case 2: OS << ".p2alignw"; break; - case 4: OS << ".p2alignl"; break; + case 1: OS << (IsPow2 ? ".p2align" : ".balign"); break; + case 2: OS << (IsPow2 ? ".p2alignw" : ".balignw"); break; + case 4: OS << (IsPow2 ? ".p2alignl" : ".balignl"); break; } - OS << ' ' << Pow2; + OS << ' ' << (IsPow2 ? Pow2 : ByteAlignment); OS << ", " << truncateToSize(Value, ValueSize); if (MaxBytesToEmit) Added: llvm/trunk/test/MC/AsmParser/directive_align.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AsmParser/directive_align.s?rev=74478&view=auto ============================================================================== --- llvm/trunk/test/MC/AsmParser/directive_align.s (added) +++ llvm/trunk/test/MC/AsmParser/directive_align.s Mon Jun 29 18:46:59 2009 @@ -0,0 +1,16 @@ +# RUN: llvm-mc %s > %t + +# RUN: grep -A 2 TEST0 %t > %t2 +# RUN: grep ".p2align 1, 0" %t2 | count 1 +TEST0: + .align 1 + +# RUN: grep -A 2 TEST1 %t > %t2 +# RUN: grep ".p2alignl 3, 0, 2" %t2 | count 1 +TEST1: + .align32 3,,2 + +# RUN: grep -A 2 TEST2 %t > %t2 +# RUN: grep ".balign 3, 10" %t2 | count 1 +TEST2: + .balign 3,10 Modified: llvm/trunk/tools/llvm-mc/AsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/AsmParser.cpp?rev=74478&r1=74477&r2=74478&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/AsmParser.cpp (original) +++ llvm/trunk/tools/llvm-mc/AsmParser.cpp Mon Jun 29 18:46:59 2009 @@ -429,10 +429,30 @@ return ParseDirectiveValue(4); if (!strcmp(IDVal, ".quad")) return ParseDirectiveValue(8); - if (!strcmp(IDVal, ".fill")) - return ParseDirectiveFill(); + + // FIXME: Target hooks for IsPow2. + if (!strcmp(IDVal, ".align")) + return ParseDirectiveAlign(/*IsPow2=*/true, /*ExprSize=*/1); + if (!strcmp(IDVal, ".align32")) + return ParseDirectiveAlign(/*IsPow2=*/true, /*ExprSize=*/4); + if (!strcmp(IDVal, ".balign")) + return ParseDirectiveAlign(/*IsPow2=*/false, /*ExprSize=*/1); + if (!strcmp(IDVal, ".balignw")) + return ParseDirectiveAlign(/*IsPow2=*/false, /*ExprSize=*/2); + if (!strcmp(IDVal, ".balignl")) + return ParseDirectiveAlign(/*IsPow2=*/false, /*ExprSize=*/4); + if (!strcmp(IDVal, ".p2align")) + return ParseDirectiveAlign(/*IsPow2=*/true, /*ExprSize=*/1); + if (!strcmp(IDVal, ".p2alignw")) + return ParseDirectiveAlign(/*IsPow2=*/true, /*ExprSize=*/2); + if (!strcmp(IDVal, ".p2alignl")) + return ParseDirectiveAlign(/*IsPow2=*/true, /*ExprSize=*/4); + if (!strcmp(IDVal, ".org")) return ParseDirectiveOrg(); + + if (!strcmp(IDVal, ".fill")) + return ParseDirectiveFill(); if (!strcmp(IDVal, ".space")) return ParseDirectiveSpace(); @@ -708,3 +728,77 @@ return false; } + +/// ParseDirectiveAlign +/// ::= {.align, ...} expression [ , expression [ , expression ]] +bool AsmParser::ParseDirectiveAlign(bool IsPow2, unsigned ValueSize) { + int64_t Alignment; + if (ParseAbsoluteExpression(Alignment)) + return true; + + SMLoc MaxBytesLoc; + bool HasFillExpr = false; + int64_t FillExpr = 0; + int64_t MaxBytesToFill = 0; + if (Lexer.isNot(asmtok::EndOfStatement)) { + if (Lexer.isNot(asmtok::Comma)) + return TokError("unexpected token in directive"); + Lexer.Lex(); + + // The fill expression can be omitted while specifying a maximum number of + // alignment bytes, e.g: + // .align 3,,4 + if (Lexer.isNot(asmtok::Comma)) { + HasFillExpr = true; + if (ParseAbsoluteExpression(FillExpr)) + return true; + } + + if (Lexer.isNot(asmtok::EndOfStatement)) { + if (Lexer.isNot(asmtok::Comma)) + return TokError("unexpected token in directive"); + Lexer.Lex(); + + MaxBytesLoc = Lexer.getLoc(); + if (ParseAbsoluteExpression(MaxBytesToFill)) + return true; + + if (Lexer.isNot(asmtok::EndOfStatement)) + return TokError("unexpected token in directive"); + } + } + + Lexer.Lex(); + + if (!HasFillExpr) { + // FIXME: Sometimes fill with nop. + FillExpr = 0; + } + + // Compute alignment in bytes. + if (IsPow2) { + // FIXME: Diagnose overflow. + Alignment = 1 << Alignment; + } + + // Diagnose non-sensical max bytes to fill. + if (MaxBytesLoc.isValid()) { + if (MaxBytesToFill < 1) { + Lexer.PrintMessage(MaxBytesLoc, "warning: alignment directive can never " + "be satisfied in this many bytes, ignoring"); + return false; + } + + if (MaxBytesToFill >= Alignment) { + Lexer.PrintMessage(MaxBytesLoc, "warning: maximum bytes expression " + "exceeds alignment and has no effect"); + MaxBytesToFill = 0; + } + } + + // FIXME: Target specific behavior about how the "extra" bytes are filled. + Out.EmitValueToAlignment(Alignment, FillExpr, ValueSize, MaxBytesToFill); + + return false; +} + Modified: llvm/trunk/tools/llvm-mc/AsmParser.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/AsmParser.h?rev=74478&r1=74477&r2=74478&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/AsmParser.h (original) +++ llvm/trunk/tools/llvm-mc/AsmParser.h Mon Jun 29 18:46:59 2009 @@ -79,6 +79,8 @@ bool ParseDirectiveSpace(); // ".space" bool ParseDirectiveSet(); // ".set" bool ParseDirectiveOrg(); // ".org" + // ".align{,32}", ".p2align{,w,l}" + bool ParseDirectiveAlign(bool IsPow2, unsigned ValueSize); }; From aaronngray.lists at googlemail.com Mon Jun 29 18:55:19 2009 From: aaronngray.lists at googlemail.com (Aaron Gray) Date: Tue, 30 Jun 2009 00:55:19 +0100 Subject: [llvm-commits] Cygwin 'volitile sys::cas_flag' patch Message-ID: <21D07E7DCEEC40218E09D18538FFCB98@HPLAPTOP> Sorry I sent the patch using Google mail which zips the patch file. Heres another copy. I am getting a casting error on the Cygwin build on both GCC 3.4.4 and GCC 4.2.4. I have created a patch but it may need checking out and reviewing befoire applying as I am not sure about the use of the volitile in this context. Thanks, Aaron -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090630/26d7a00f/attachment.html -------------- next part -------------- A non-text attachment was scrubbed... Name: cygwin.patch Type: application/octet-stream Size: 1787 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090630/26d7a00f/attachment.obj From foldr at codedgers.com Mon Jun 29 19:15:24 2009 From: foldr at codedgers.com (Mikhail Glushenkov) Date: Tue, 30 Jun 2009 00:15:24 -0000 Subject: [llvm-commits] [llvm] r74482 - in /llvm/trunk: include/llvm/CompilerDriver/Main.inc lib/CompilerDriver/Main.cpp Message-ID: <200906300015.n5U0FORd006408@zion.cs.uiuc.edu> Author: foldr Date: Mon Jun 29 19:15:24 2009 New Revision: 74482 URL: http://llvm.org/viewvc/llvm-project?rev=74482&view=rev Log: Move the driver entry point out of Main.inc. Added: llvm/trunk/lib/CompilerDriver/Main.cpp - copied, changed from r74473, llvm/trunk/include/llvm/CompilerDriver/Main.inc Modified: llvm/trunk/include/llvm/CompilerDriver/Main.inc Modified: llvm/trunk/include/llvm/CompilerDriver/Main.inc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CompilerDriver/Main.inc?rev=74482&r1=74481&r2=74482&view=diff ============================================================================== --- llvm/trunk/include/llvm/CompilerDriver/Main.inc (original) +++ llvm/trunk/include/llvm/CompilerDriver/Main.inc Mon Jun 29 19:15:24 2009 @@ -12,121 +12,22 @@ // supported please refer to the tools' manual page or run the tool // with the --help option. // +// This file provides the default entry point for the driver executable. +// //===----------------------------------------------------------------------===// #ifndef LLVM_INCLUDE_COMPILER_DRIVER_MAIN_INC #define LLVM_INCLUDE_COMPILER_DRIVER_MAIN_INC -#include "llvm/CompilerDriver/BuiltinOptions.h" -#include "llvm/CompilerDriver/CompilationGraph.h" -#include "llvm/CompilerDriver/Error.h" #include "llvm/CompilerDriver/ForceLinkage.h" -#include "llvm/CompilerDriver/Plugin.h" - -#include "llvm/System/Path.h" - -#include -#include -#include - -namespace cl = llvm::cl; -namespace sys = llvm::sys; -using namespace llvmc; - -namespace { - - sys::Path getTempDir() { - sys::Path tempDir; - - // GCC 4.5-style -save-temps handling. - if (SaveTemps == SaveTempsEnum::Unset) { - tempDir = sys::Path::GetTemporaryDirectory(); - } - else if (SaveTemps == SaveTempsEnum::Obj && !OutputFilename.empty()) { - tempDir = OutputFilename; - - if (!tempDir.exists()) { - std::string ErrMsg; - if (tempDir.createDirectoryOnDisk(true, &ErrMsg)) - throw std::runtime_error(ErrMsg); - } - } - // else if (SaveTemps == Cwd) -> use current dir (leave tempDir empty) - - return tempDir; - } - - /// BuildTargets - A small wrapper for CompilationGraph::Build. - int BuildTargets(CompilationGraph& graph, const LanguageMap& langMap) { - int ret; - const sys::Path& tempDir = getTempDir(); - try { - ret = graph.Build(tempDir, langMap); - } - catch(...) { - if (SaveTemps == SaveTempsEnum::Unset) - tempDir.eraseFromDisk(true); - throw; - } - - if (SaveTemps == SaveTempsEnum::Unset) - tempDir.eraseFromDisk(true); - return ret; - } +namespace llvmc { + int Main(int argc, char** argv); } int main(int argc, char** argv) { - try { - ForceLinkage(); - - LanguageMap langMap; - CompilationGraph graph; - - cl::ParseCommandLineOptions - (argc, argv, "LLVM Compiler Driver (Work In Progress)", true); - - PluginLoader Plugins; - Plugins.PopulateLanguageMap(langMap); - Plugins.PopulateCompilationGraph(graph); - - if (CheckGraph) { - int ret = graph.Check(); - if (!ret) - std::cerr << "check-graph: no errors found.\n"; - - return ret; - } - - if (ViewGraph) { - graph.viewGraph(); - if (!WriteGraph) - return 0; - } - - if (WriteGraph) { - graph.writeGraph(OutputFilename.empty() - ? std::string("compilation-graph.dot") - : OutputFilename); - return 0; - } - - if (InputFilenames.empty()) { - throw std::runtime_error("no input files"); - } - - return BuildTargets(graph, langMap); - } - catch(llvmc::error_code& ec) { - return ec.code(); - } - catch(const std::exception& ex) { - std::cerr << argv[0] << ": " << ex.what() << '\n'; - } - catch(...) { - std::cerr << argv[0] << ": unknown error!\n"; - } - return 1; + llvmc::ForceLinkage(); + return llvmc::Main(argc, argv); } #endif // LLVM_INCLUDE_COMPILER_DRIVER_MAIN_INC Copied: llvm/trunk/lib/CompilerDriver/Main.cpp (from r74473, llvm/trunk/include/llvm/CompilerDriver/Main.inc) URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CompilerDriver/Main.cpp?p2=llvm/trunk/lib/CompilerDriver/Main.cpp&p1=llvm/trunk/include/llvm/CompilerDriver/Main.inc&r1=74473&r2=74482&rev=74482&view=diff ============================================================================== --- llvm/trunk/include/llvm/CompilerDriver/Main.inc (original) +++ llvm/trunk/lib/CompilerDriver/Main.cpp Mon Jun 29 19:15:24 2009 @@ -1,4 +1,4 @@ -//===--- Main.inc - The LLVM Compiler Driver --------------------*- C++ -*-===// +//===--- Main.cpp - The LLVM Compiler Driver --------------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -7,20 +7,13 @@ // //===----------------------------------------------------------------------===// // -// This tool provides a single point of access to the LLVM -// compilation tools. It has many options. To discover the options -// supported please refer to the tools' manual page or run the tool -// with the --help option. +// llvmc::Main function - driver entry point. // //===----------------------------------------------------------------------===// -#ifndef LLVM_INCLUDE_COMPILER_DRIVER_MAIN_INC -#define LLVM_INCLUDE_COMPILER_DRIVER_MAIN_INC - #include "llvm/CompilerDriver/BuiltinOptions.h" #include "llvm/CompilerDriver/CompilationGraph.h" #include "llvm/CompilerDriver/Error.h" -#include "llvm/CompilerDriver/ForceLinkage.h" #include "llvm/CompilerDriver/Plugin.h" #include "llvm/System/Path.h" @@ -76,10 +69,10 @@ } } -int main(int argc, char** argv) { - try { - ForceLinkage(); +namespace llvmc { +int Main(int argc, char** argv) { + try { LanguageMap langMap; CompilationGraph graph; @@ -129,4 +122,4 @@ return 1; } -#endif // LLVM_INCLUDE_COMPILER_DRIVER_MAIN_INC +} // end namespace llvmc From foldr at codedgers.com Mon Jun 29 19:16:00 2009 From: foldr at codedgers.com (Mikhail Glushenkov) Date: Tue, 30 Jun 2009 00:16:00 -0000 Subject: [llvm-commits] [llvm] r74483 - in /llvm/trunk: lib/CompilerDriver/Main.cpp tools/llvmc/doc/LLVMC-Reference.rst Message-ID: <200906300016.n5U0G0DT006437@zion.cs.uiuc.edu> Author: foldr Date: Mon Jun 29 19:16:00 2009 New Revision: 74483 URL: http://llvm.org/viewvc/llvm-project?rev=74483&view=rev Log: Add a way to access argv[0] in hooks. Modified: llvm/trunk/lib/CompilerDriver/Main.cpp llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst Modified: llvm/trunk/lib/CompilerDriver/Main.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CompilerDriver/Main.cpp?rev=74483&r1=74482&r2=74483&view=diff ============================================================================== --- llvm/trunk/lib/CompilerDriver/Main.cpp (original) +++ llvm/trunk/lib/CompilerDriver/Main.cpp Mon Jun 29 19:16:00 2009 @@ -71,11 +71,16 @@ namespace llvmc { +// Sometimes plugins want to condition on the value in argv[0]. +const char* ProgramName; + int Main(int argc, char** argv) { try { LanguageMap langMap; CompilationGraph graph; + ProgramName = argv[0]; + cl::ParseCommandLineOptions (argc, argv, "LLVM Compiler Driver (Work In Progress)", true); Modified: llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst?rev=74483&r1=74482&r2=74483&view=diff ============================================================================== --- llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst (original) +++ llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst Mon Jun 29 19:16:00 2009 @@ -678,6 +678,28 @@ .. _Graphviz: http://www.graphviz.org/ .. _Ghostview: http://pages.cs.wisc.edu/~ghost/ +Conditioning on the executable name +----------------------------------- + +For now, the executable name (the value passed to the driver in ``argv[0]``) is +accessible only in the C++ code (i.e. hooks). Use the following code:: + + namespace llvmc { + extern const char* ProgramName; + } + + std::string MyHook() { + //... + if (strcmp(ProgramName, "mydriver") == 0) { + //... + + } + +In general, you're encouraged not to make the behaviour dependent on the +executable file name, and use command-line switches instead. See for example how +the ``Base`` plugin behaves when it needs to choose the correct linker options +(think ``g++`` vs. ``gcc``). + .. raw:: html
From foldr at codedgers.com Mon Jun 29 19:16:23 2009 From: foldr at codedgers.com (Mikhail Glushenkov) Date: Tue, 30 Jun 2009 00:16:23 -0000 Subject: [llvm-commits] [llvm] r74484 - /llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst Message-ID: <200906300016.n5U0GNEv006455@zion.cs.uiuc.edu> Author: foldr Date: Mon Jun 29 19:16:22 2009 New Revision: 74484 URL: http://llvm.org/viewvc/llvm-project?rev=74484&view=rev Log: Clang is now production quality (at least for C). Modified: llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst Modified: llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst?rev=74484&r1=74483&r2=74484&view=diff ============================================================================== --- llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst (original) +++ llvm/trunk/tools/llvmc/doc/LLVMC-Reference.rst Mon Jun 29 19:16:22 2009 @@ -71,9 +71,8 @@ $ ./a.out hello -By default, LLVMC uses ``llvm-gcc`` to compile the source code. It is -also possible to choose the work-in-progress ``clang`` compiler with -the ``-clang`` option. +By default, LLVMC uses ``llvm-gcc`` to compile the source code. It is also +possible to choose the ``clang`` compiler with the ``-clang`` option. Predefined options From foldr at codedgers.com Mon Jun 29 19:16:43 2009 From: foldr at codedgers.com (Mikhail Glushenkov) Date: Tue, 30 Jun 2009 00:16:43 -0000 Subject: [llvm-commits] [llvm] r74485 - /llvm/trunk/docs/CompilerDriver.html Message-ID: <200906300016.n5U0GhSZ006476@zion.cs.uiuc.edu> Author: foldr Date: Mon Jun 29 19:16:43 2009 New Revision: 74485 URL: http://llvm.org/viewvc/llvm-project?rev=74485&view=rev Log: Regenerate. Modified: llvm/trunk/docs/CompilerDriver.html Modified: llvm/trunk/docs/CompilerDriver.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CompilerDriver.html?rev=74485&r1=74484&r2=74485&view=diff ============================================================================== --- llvm/trunk/docs/CompilerDriver.html (original) +++ llvm/trunk/docs/CompilerDriver.html Mon Jun 29 19:16:43 2009 @@ -37,6 +37,7 @@
  • Hooks and environment variables
  • How plugins are loaded
  • Debugging
    • +
  • Conditioning on the executable name
    • @@ -94,9 +95,8 @@ $ ./a.out hello -

    By default, LLVMC uses llvm-gcc to compile the source code. It is -also possible to choose the work-in-progress clang compiler with -the -clang option.

    +

    By default, LLVMC uses llvm-gcc to compile the source code. It is also +possible to choose the clang compiler with the -clang option.

    Predefined options

    @@ -633,6 +633,27 @@ dynamically. When invoked with --check-graph, llvmc doesn't perform any compilation tasks and returns the number of encountered errors as its status code.

    +
    +
    +

    Conditioning on the executable name

    +

    For now, the executable name (the value passed to the driver in argv[0]) is +accessible only in the C++ code (i.e. hooks). Use the following code:

    +
    +namespace llvmc {
+extern const char* ProgramName;
+}
+
+std::string MyHook() {
+//...
+if (strcmp(ProgramName, "mydriver") == 0) {
+   //...
+
+}
+
    +

    In general, you're encouraged not to make the behaviour dependent on the +executable file name, and use command-line switches instead. See for example how +the Base plugin behaves when it needs to choose the correct linker options +(think g++ vs. gcc).

    From daniel at zuster.org Mon Jun 29 19:33:19 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Tue, 30 Jun 2009 00:33:19 -0000 Subject: [llvm-commits] [llvm] r74487 - in /llvm/trunk: test/MC/AsmParser/directive_symbol_attrs.s tools/llvm-mc/AsmParser.cpp tools/llvm-mc/AsmParser.h Message-ID: <200906300033.n5U0XJab007001@zion.cs.uiuc.edu> Author: ddunbar Date: Mon Jun 29 19:33:19 2009 New Revision: 74487 URL: http://llvm.org/viewvc/llvm-project?rev=74487&view=rev Log: llvm-mc: Parse symbol attribute directives. Added: llvm/trunk/test/MC/AsmParser/directive_symbol_attrs.s Modified: llvm/trunk/tools/llvm-mc/AsmParser.cpp llvm/trunk/tools/llvm-mc/AsmParser.h Added: llvm/trunk/test/MC/AsmParser/directive_symbol_attrs.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AsmParser/directive_symbol_attrs.s?rev=74487&view=auto ============================================================================== --- llvm/trunk/test/MC/AsmParser/directive_symbol_attrs.s (added) +++ llvm/trunk/test/MC/AsmParser/directive_symbol_attrs.s Mon Jun 29 19:33:19 2009 @@ -0,0 +1,7 @@ +# RUN: llvm-mc %s > %t + +# RUN: grep -A 3 TEST0 %t > %t2 +# RUN: grep ".globl a" %t2 | count 1 +# RUN: grep ".globl b" %t2 | count 1 +TEST0: + .globl a, b Modified: llvm/trunk/tools/llvm-mc/AsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/AsmParser.cpp?rev=74487&r1=74486&r2=74487&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/AsmParser.cpp (original) +++ llvm/trunk/tools/llvm-mc/AsmParser.cpp Mon Jun 29 19:33:19 2009 @@ -456,6 +456,32 @@ if (!strcmp(IDVal, ".space")) return ParseDirectiveSpace(); + // Symbol attribute directives + if (!strcmp(IDVal, ".globl") || !strcmp(IDVal, ".global")) + return ParseDirectiveSymbolAttribute(MCStreamer::Global); + if (!strcmp(IDVal, ".hidden")) + return ParseDirectiveSymbolAttribute(MCStreamer::Hidden); + if (!strcmp(IDVal, ".indirect_symbol")) + return ParseDirectiveSymbolAttribute(MCStreamer::IndirectSymbol); + if (!strcmp(IDVal, ".internal")) + return ParseDirectiveSymbolAttribute(MCStreamer::Internal); + if (!strcmp(IDVal, ".lazy_reference")) + return ParseDirectiveSymbolAttribute(MCStreamer::LazyReference); + if (!strcmp(IDVal, ".no_dead_strip")) + return ParseDirectiveSymbolAttribute(MCStreamer::NoDeadStrip); + if (!strcmp(IDVal, ".private_extern")) + return ParseDirectiveSymbolAttribute(MCStreamer::PrivateExtern); + if (!strcmp(IDVal, ".protected")) + return ParseDirectiveSymbolAttribute(MCStreamer::Protected); + if (!strcmp(IDVal, ".reference")) + return ParseDirectiveSymbolAttribute(MCStreamer::Reference); + if (!strcmp(IDVal, ".weak")) + return ParseDirectiveSymbolAttribute(MCStreamer::Weak); + if (!strcmp(IDVal, ".weak_definition")) + return ParseDirectiveSymbolAttribute(MCStreamer::WeakDefinition); + if (!strcmp(IDVal, ".weak_reference")) + return ParseDirectiveSymbolAttribute(MCStreamer::WeakReference); + Lexer.PrintMessage(IDLoc, "warning: ignoring directive for now"); EatToEndOfStatement(); return false; @@ -802,3 +828,32 @@ return false; } +/// ParseDirectiveSymbolAttribute +/// ::= { ".globl", ".weak", ... } [ identifier ( , identifier )* ] +bool AsmParser::ParseDirectiveSymbolAttribute(MCStreamer::SymbolAttr Attr) { + if (Lexer.isNot(asmtok::EndOfStatement)) { + for (;;) { + if (Lexer.isNot(asmtok::Identifier)) + return TokError("expected identifier in directive"); + + MCSymbol *Sym = Ctx.GetOrCreateSymbol(Lexer.getCurStrVal()); + Lexer.Lex(); + + // If this is use of an undefined symbol then mark it external. + if (!Sym->getSection() && !Ctx.GetSymbolValue(Sym)) + Sym->setExternal(true); + + Out.EmitSymbolAttribute(Sym, Attr); + + if (Lexer.is(asmtok::EndOfStatement)) + break; + + if (Lexer.isNot(asmtok::Comma)) + return TokError("unexpected token in directive"); + Lexer.Lex(); + } + } + + Lexer.Lex(); + return false; +} Modified: llvm/trunk/tools/llvm-mc/AsmParser.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/AsmParser.h?rev=74487&r1=74486&r2=74487&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/AsmParser.h (original) +++ llvm/trunk/tools/llvm-mc/AsmParser.h Mon Jun 29 19:33:19 2009 @@ -15,6 +15,7 @@ #define ASMPARSER_H #include "AsmLexer.h" +#include "llvm/MC/MCStreamer.h" namespace llvm { class AsmExpr; @@ -81,6 +82,10 @@ bool ParseDirectiveOrg(); // ".org" // ".align{,32}", ".p2align{,w,l}" bool ParseDirectiveAlign(bool IsPow2, unsigned ValueSize); + + /// ParseDirectiveSymbolAttribute - Parse a directive like ".globl" which + /// accepts a single symbol (which should be a label or an external). + bool ParseDirectiveSymbolAttribute(MCStreamer::SymbolAttr Attr); }; From resistor at mac.com Mon Jun 29 19:48:55 2009 From: resistor at mac.com (Owen Anderson) Date: Tue, 30 Jun 2009 00:48:55 -0000 Subject: [llvm-commits] [llvm] r74488 - in /llvm/trunk: include/llvm/LLVMContext.h lib/VMCore/CMakeLists.txt lib/VMCore/LLVMContext.cpp lib/VMCore/LLVMContextImpl.h Message-ID: <200906300048.n5U0mucZ007464@zion.cs.uiuc.edu> Author: resistor Date: Mon Jun 29 19:48:55 2009 New Revision: 74488 URL: http://llvm.org/viewvc/llvm-project?rev=74488&view=rev Log: Add LLVMContext, which will eventually be used as a container for privatizing a lot of (currently) global state, including the constant and type uniquing tables. For now, just make it a wrapper around the existing APIs. Added: llvm/trunk/include/llvm/LLVMContext.h llvm/trunk/lib/VMCore/LLVMContext.cpp llvm/trunk/lib/VMCore/LLVMContextImpl.h Modified: llvm/trunk/lib/VMCore/CMakeLists.txt Added: llvm/trunk/include/llvm/LLVMContext.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/LLVMContext.h?rev=74488&view=auto ============================================================================== --- llvm/trunk/include/llvm/LLVMContext.h (added) +++ llvm/trunk/include/llvm/LLVMContext.h Mon Jun 29 19:48:55 2009 @@ -0,0 +1,162 @@ +//===-- llvm/LLVMContext.h - Class for managing "global" state --*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LLVMCONTEXT_H +#define LLVM_LLVMCONTEXT_H + +#include "llvm/Support/DataTypes.h" +#include +#include + +namespace llvm { + +class LLVMContextImpl; +class Constant; +class ConstantInt; +class ConstantPointerNull; +class ConstantStruct; +class ConstantAggregateZero; +class ConstantArray; +class ConstantFP; +class ConstantVector; +class IntegerType; +class PointerType; +class StructType; +class ArrayType; +class VectorType; +class Type; +class APInt; +class APFloat; +class Value; + +class LLVMContext { + LLVMContextImpl* pImpl; +public: + LLVMContext(); + ~LLVMContext(); + + // ConstantInt accessors + ConstantInt* getConstantIntTrue(); + ConstantInt* getConstantIntFalse(); + ConstantInt* getConstantInt(const IntegerType* Ty, uint64_t V, + bool isSigned = false); + ConstantInt* getConstantIntSigned(const IntegerType* Ty, int64_t V); + ConstantInt* getConstantInt(const APInt& V); + Constant* getConstantInt(const Type* Ty, const APInt& V); + ConstantInt* getAllOnesConstantInt(const Type* Ty); + + // ConstantPointerNull accessors + ConstantPointerNull* getConstantPointerNull(const PointerType* T); + + // ConstantStruct accessors + Constant* getConstantStruct(const StructType* T, + const std::vector& V); + Constant* getConstantStruct(const std::vector& V, + bool Packed = false); + Constant* getConstantStruct(Constant* const *Vals, unsigned NumVals, + bool Packed = false); + + // ConstantAggregateZero accessors + ConstantAggregateZero* getConstantAggregateZero(const Type* Ty); + + // ConstantArray accessors + Constant* getConstantArray(const ArrayType* T, + const std::vector& V); + Constant* getConstantArray(const ArrayType* T, Constant* const* Vals, + unsigned NumVals); + Constant* getConstantArray(const std::string& Initializer, + bool AddNull = false); + + // ConstantExpr accessors + Constant* getConstantExpr(unsigned Opcode, Constant* C1, Constant* C2); + Constant* getConstantExprTrunc(Constant* C, const Type* Ty); + Constant* getConstantExprSExt(Constant* C, const Type* Ty); + Constant* getConstantExprZExt(Constant* C, const Type* Ty); + Constant* getConstantExprFPTrunc(Constant* C, const Type* Ty); + Constant* getConstantExprFPExtend(Constant* C, const Type* Ty); + Constant* getConstantExprUIToFP(Constant* C, const Type* Ty); + Constant* getConstantExprSIToFP(Constant* C, const Type* Ty); + Constant* getConstantExprFPToUI(Constant* C, const Type* Ty); + Constant* getConstantExprFPToSI(Constant* C, const Type* Ty); + Constant* getConstantExprPtrToInt(Constant* C, const Type* Ty); + Constant* getConstantExprIntToPtr(Constant* C, const Type* Ty); + Constant* getConstantExprBitCast(Constant* C, const Type* Ty); + Constant* getConstantExprCast(unsigned ops, Constant* C, const Type* Ty); + Constant* getConstantExprZExtOrBitCast(Constant* C, const Type* Ty); + Constant* getConstantExprSExtOrBitCast(Constant* C, const Type* Ty); + Constant* getConstantExprTruncOrBitCast(Constant* C, const Type* Ty); + Constant* getConstantExprPointerCast(Constant* C, const Type* Ty); + Constant* getConstantExprIntegerCast(Constant* C, const Type* Ty, + bool isSigned); + Constant* getConstantExprFPCast(Constant* C, const Type* Ty); + Constant* getConstantExprSelect(Constant* C, Constant* V1, Constant* V2); + Constant* getConstantExprAlignOf(const Type* Ty); + Constant* getConstantExprCompare(unsigned short pred, + Constant* C1, Constant* C2); + Constant* getConstantExprNeg(Constant* C); + Constant* getConstantExprFNeg(Constant* C); + Constant* getConstantExprNot(Constant* C); + Constant* getConstantExprAdd(Constant* C1, Constant* C2); + Constant* getConstantExprFAdd(Constant* C1, Constant* C2); + Constant* getConstantExprSub(Constant* C1, Constant* C2); + Constant* getConstantExprFSub(Constant* C1, Constant* C2); + Constant* getConstantExprMul(Constant* C1, Constant* C2); + Constant* getConstantExprFMul(Constant* C1, Constant* C2); + Constant* getConstantExprUDiv(Constant* C1, Constant* C2); + Constant* getConstantExprSDiv(Constant* C1, Constant* C2); + Constant* getConstantExprFDiv(Constant* C1, Constant* C2); + Constant* getConstantExprURem(Constant* C1, Constant* C2); + Constant* getConstantExprSRem(Constant* C1, Constant* C2); + Constant* getConstantExprFRem(Constant* C1, Constant* C2); + Constant* getConstantExprAnd(Constant* C1, Constant* C2); + Constant* getConstantExprOr(Constant* C1, Constant* C2); + Constant* getConstantExprXor(Constant* C1, Constant* C2); + Constant* getConstantExprICmp(unsigned short pred, Constant* LHS, + Constant* RHS); + Constant* getConstantExprFCmp(unsigned short pred, Constant* LHS, + Constant* RHS); + Constant* getConstantExprVICmp(unsigned short pred, Constant* LHS, + Constant* RHS); + Constant* getConstantExprVFCmp(unsigned short pred, Constant* LHS, + Constant* RHS); + Constant* getConstantExprShl(Constant* C1, Constant* C2); + Constant* getConstantExprLShr(Constant* C1, Constant* C2); + Constant* getConstantExprAShr(Constant* C1, Constant* C2); + Constant* getConstantExprGetElementPtr(Constant* C, Constant* const* IdxList, + unsigned NumIdx); + Constant* getConstantExprGetElementPtr(Constant* C, Value* const* IdxList, + unsigned NumIdx); + Constant* getConstantExprExtractElement(Constant* Vec, Constant* Idx); + Constant* getConstantExprInsertElement(Constant* Vec, Constant* Elt, + Constant* Idx); + Constant* getConstantExprShuffleVector(Constant* V1, Constant* V2, + Constant* Mask); + Constant* getConstantExprExtractValue(Constant* Agg, const unsigned* IdxList, + unsigned NumIdx); + Constant* getConstantExprInsertValue(Constant* Agg, Constant* Val, + const unsigned* IdxList, + unsigned NumIdx); + Constant* getZeroValueForNegation(const Type* Ty); + + // ConstantFP accessors + ConstantFP* getConstantFP(const APFloat& V); + Constant* getConstantFP(const Type* Ty, double V); + ConstantFP* getConstantFPNegativeZero(const Type* Ty); + + // ConstantVector accessors + Constant* getConstantVector(const VectorType* T, + const std::vector& V); + Constant* getConstantVector(const std::vector& V); + Constant* getConstantVector(Constant* const* Vals, unsigned NumVals); + ConstantVector* getConstantVectorAllOnes(const VectorType* Ty); +}; + +} + +#endif Modified: llvm/trunk/lib/VMCore/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/CMakeLists.txt?rev=74488&r1=74487&r2=74488&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/CMakeLists.txt (original) +++ llvm/trunk/lib/VMCore/CMakeLists.txt Mon Jun 29 19:48:55 2009 @@ -14,6 +14,7 @@ Instructions.cpp IntrinsicInst.cpp LeakDetector.cpp + LLVMContext.cpp Mangler.cpp Module.cpp ModuleProvider.cpp Added: llvm/trunk/lib/VMCore/LLVMContext.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/LLVMContext.cpp?rev=74488&view=auto ============================================================================== --- llvm/trunk/lib/VMCore/LLVMContext.cpp (added) +++ llvm/trunk/lib/VMCore/LLVMContext.cpp Mon Jun 29 19:48:55 2009 @@ -0,0 +1,379 @@ +//===-- LLVMContext.cpp - Implement LLVMContext -----------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/LLVMContext.h" +#include "llvm/Constants.h" +#include "LLVMContextImpl.h" + +using namespace llvm; + +LLVMContext::LLVMContext() : pImpl(new LLVMContextImpl()) { } +LLVMContext::~LLVMContext() { delete pImpl; } + +// ConstantInt accessors. +ConstantInt* LLVMContext::getConstantIntTrue() { + return ConstantInt::getTrue(); +} + +ConstantInt* LLVMContext::getConstantIntFalse() { + return ConstantInt::getFalse(); +} + +ConstantInt* LLVMContext::getConstantInt(const IntegerType* Ty, uint64_t V, + bool isSigned) { + return ConstantInt::get(Ty, V, isSigned); +} + +ConstantInt* LLVMContext::getConstantIntSigned(const IntegerType* Ty, + int64_t V) { + return ConstantInt::getSigned(Ty, V); +} + +ConstantInt* LLVMContext::getConstantInt(const APInt& V) { + return ConstantInt::get(V); +} + +Constant* LLVMContext::getConstantInt(const Type* Ty, const APInt& V) { + return ConstantInt::get(Ty, V); +} + +ConstantInt* LLVMContext::getAllOnesConstantInt(const Type* Ty) { + return ConstantInt::getAllOnesValue(Ty); +} + + +// ConstantPointerNull accessors. +ConstantPointerNull* LLVMContext::getConstantPointerNull(const PointerType* T) { + return ConstantPointerNull::get(T); +} + + +// ConstantStruct accessors. +Constant* LLVMContext::getConstantStruct(const StructType* T, + const std::vector& V) { + return ConstantStruct::get(T, V); +} + +Constant* LLVMContext::getConstantStruct(const std::vector& V, + bool Packed) { + return ConstantStruct::get(V, Packed); +} + +Constant* LLVMContext::getConstantStruct(Constant* const *Vals, + unsigned NumVals, bool Packed) { + return ConstantStruct::get(Vals, NumVals, Packed); +} + + +// ConstantAggregateZero accessors. +ConstantAggregateZero* LLVMContext::getConstantAggregateZero(const Type* Ty) { + return ConstantAggregateZero::get(Ty); +} + + +// ConstantArray accessors. +Constant* LLVMContext::getConstantArray(const ArrayType* T, + const std::vector& V) { + return ConstantArray::get(T, V); +} + +Constant* LLVMContext::getConstantArray(const ArrayType* T, + Constant* const* Vals, + unsigned NumVals) { + return ConstantArray::get(T, Vals, NumVals); +} + +Constant* LLVMContext::getConstantArray(const std::string& Initializer, + bool AddNull) { + return ConstantArray::get(Initializer, AddNull); +} + + +// ConstantExpr accessors. +Constant* LLVMContext::getConstantExpr(unsigned Opcode, Constant* C1, + Constant* C2) { + return ConstantExpr::get(Opcode, C1, C2); +} + +Constant* LLVMContext::getConstantExprTrunc(Constant* C, const Type* Ty) { + return ConstantExpr::getTrunc(C, Ty); +} + +Constant* LLVMContext::getConstantExprSExt(Constant* C, const Type* Ty) { + return ConstantExpr::getSExt(C, Ty); +} + +Constant* LLVMContext::getConstantExprZExt(Constant* C, const Type* Ty) { + return ConstantExpr::getZExt(C, Ty); +} + +Constant* LLVMContext::getConstantExprFPTrunc(Constant* C, const Type* Ty) { + return ConstantExpr::getFPTrunc(C, Ty); +} + +Constant* LLVMContext::getConstantExprFPExtend(Constant* C, const Type* Ty) { + return ConstantExpr::getFPExtend(C, Ty); +} + +Constant* LLVMContext::getConstantExprUIToFP(Constant* C, const Type* Ty) { + return ConstantExpr::getUIToFP(C, Ty); +} + +Constant* LLVMContext::getConstantExprSIToFP(Constant* C, const Type* Ty) { + return ConstantExpr::getSIToFP(C, Ty); +} + +Constant* LLVMContext::getConstantExprFPToUI(Constant* C, const Type* Ty) { + return ConstantExpr::getFPToUI(C, Ty); +} + +Constant* LLVMContext::getConstantExprFPToSI(Constant* C, const Type* Ty) { + return ConstantExpr::getFPToSI(C, Ty); +} + +Constant* LLVMContext::getConstantExprPtrToInt(Constant* C, const Type* Ty) { + return ConstantExpr::getPtrToInt(C, Ty); +} + +Constant* LLVMContext::getConstantExprIntToPtr(Constant* C, const Type* Ty) { + return ConstantExpr::getIntToPtr(C, Ty); +} + +Constant* LLVMContext::getConstantExprBitCast(Constant* C, const Type* Ty) { + return ConstantExpr::getBitCast(C, Ty); +} + +Constant* LLVMContext::getConstantExprCast(unsigned ops, Constant* C, + const Type* Ty) { + return ConstantExpr::getCast(ops, C, Ty); +} + +Constant* LLVMContext::getConstantExprZExtOrBitCast(Constant* C, + const Type* Ty) { + return ConstantExpr::getZExtOrBitCast(C, Ty); +} + +Constant* LLVMContext::getConstantExprSExtOrBitCast(Constant* C, + const Type* Ty) { + return ConstantExpr::getSExtOrBitCast(C, Ty); +} + +Constant* LLVMContext::getConstantExprTruncOrBitCast(Constant* C, + const Type* Ty) { + return ConstantExpr::getTruncOrBitCast(C, Ty); +} + +Constant* LLVMContext::getConstantExprPointerCast(Constant* C, const Type* Ty) { + return ConstantExpr::getPointerCast(C, Ty); +} + +Constant* LLVMContext::getConstantExprIntegerCast(Constant* C, const Type* Ty, + bool isSigned) { + return ConstantExpr::getIntegerCast(C, Ty, isSigned); +} + +Constant* LLVMContext::getConstantExprFPCast(Constant* C, const Type* Ty) { + return ConstantExpr::getFPCast(C, Ty); +} + +Constant* LLVMContext::getConstantExprSelect(Constant* C, Constant* V1, + Constant* V2) { + return ConstantExpr::getSelect(C, V1, V2); +} + +Constant* LLVMContext::getConstantExprAlignOf(const Type* Ty) { + return ConstantExpr::getAlignOf(Ty); +} + +Constant* LLVMContext::getConstantExprCompare(unsigned short pred, + Constant* C1, Constant* C2) { + return ConstantExpr::getCompare(pred, C1, C2); +} + +Constant* LLVMContext::getConstantExprNeg(Constant* C) { + return ConstantExpr::getNeg(C); +} + +Constant* LLVMContext::getConstantExprFNeg(Constant* C) { + return ConstantExpr::getFNeg(C); +} + +Constant* LLVMContext::getConstantExprNot(Constant* C) { + return ConstantExpr::getNot(C); +} + +Constant* LLVMContext::getConstantExprAdd(Constant* C1, Constant* C2) { + return ConstantExpr::getAdd(C1, C2); +} + +Constant* LLVMContext::getConstantExprFAdd(Constant* C1, Constant* C2) { + return ConstantExpr::getFAdd(C1, C2); +} + +Constant* LLVMContext::getConstantExprSub(Constant* C1, Constant* C2) { + return ConstantExpr::getSub(C1, C2); +} + +Constant* LLVMContext::getConstantExprFSub(Constant* C1, Constant* C2) { + return ConstantExpr::getFSub(C1, C2); +} + +Constant* LLVMContext::getConstantExprMul(Constant* C1, Constant* C2) { + return ConstantExpr::getMul(C1, C2); +} + +Constant* LLVMContext::getConstantExprFMul(Constant* C1, Constant* C2) { + return ConstantExpr::getFMul(C1, C2); +} + +Constant* LLVMContext::getConstantExprUDiv(Constant* C1, Constant* C2) { + return ConstantExpr::getUDiv(C1, C2); +} + +Constant* LLVMContext::getConstantExprSDiv(Constant* C1, Constant* C2) { + return ConstantExpr::getSDiv(C1, C2); +} + +Constant* LLVMContext::getConstantExprFDiv(Constant* C1, Constant* C2) { + return ConstantExpr::getFDiv(C1, C2); +} + +Constant* LLVMContext::getConstantExprURem(Constant* C1, Constant* C2) { + return ConstantExpr::getURem(C1, C2); +} + +Constant* LLVMContext::getConstantExprSRem(Constant* C1, Constant* C2) { + return ConstantExpr::getSRem(C1, C2); +} + +Constant* LLVMContext::getConstantExprFRem(Constant* C1, Constant* C2) { + return ConstantExpr::getFRem(C1, C2); +} + +Constant* LLVMContext::getConstantExprAnd(Constant* C1, Constant* C2) { + return ConstantExpr::getAnd(C1, C2); +} + +Constant* LLVMContext::getConstantExprOr(Constant* C1, Constant* C2) { + return ConstantExpr::getOr(C1, C2); +} + +Constant* LLVMContext::getConstantExprXor(Constant* C1, Constant* C2) { + return ConstantExpr::getXor(C1, C2); +} + +Constant* LLVMContext::getConstantExprICmp(unsigned short pred, Constant* LHS, + Constant* RHS) { + return ConstantExpr::getICmp(pred, LHS, RHS); +} + +Constant* LLVMContext::getConstantExprFCmp(unsigned short pred, Constant* LHS, + Constant* RHS) { + return ConstantExpr::getFCmp(pred, LHS, RHS); +} + +Constant* LLVMContext::getConstantExprVICmp(unsigned short pred, Constant* LHS, + Constant* RHS) { + return ConstantExpr::getVICmp(pred, LHS, RHS); +} + +Constant* LLVMContext::getConstantExprVFCmp(unsigned short pred, Constant* LHS, + Constant* RHS) { + return ConstantExpr::getVFCmp(pred, LHS, RHS); +} + +Constant* LLVMContext::getConstantExprShl(Constant* C1, Constant* C2) { + return ConstantExpr::getShl(C1, C2); +} + +Constant* LLVMContext::getConstantExprLShr(Constant* C1, Constant* C2) { + return ConstantExpr::getLShr(C1, C2); +} + +Constant* LLVMContext::getConstantExprAShr(Constant* C1, Constant* C2) { + return ConstantExpr::getAShr(C1, C2); +} + +Constant* LLVMContext::getConstantExprGetElementPtr(Constant* C, + Constant* const* IdxList, + unsigned NumIdx) { + return ConstantExpr::getGetElementPtr(C, IdxList, NumIdx); +} + +Constant* LLVMContext::getConstantExprGetElementPtr(Constant* C, + Value* const* IdxList, + unsigned NumIdx) { + return ConstantExpr::getGetElementPtr(C, IdxList, NumIdx); +} + +Constant* LLVMContext::getConstantExprExtractElement(Constant* Vec, + Constant* Idx) { + return ConstantExpr::getExtractElement(Vec, Idx); +} + +Constant* LLVMContext::getConstantExprInsertElement(Constant* Vec, + Constant* Elt, + Constant* Idx) { + return ConstantExpr::getInsertElement(Vec, Elt, Idx); +} + +Constant* LLVMContext::getConstantExprShuffleVector(Constant* V1, Constant* V2, + Constant* Mask) { + return ConstantExpr::getShuffleVector(V1, V2, Mask); +} + +Constant* LLVMContext::getConstantExprExtractValue(Constant* Agg, + const unsigned* IdxList, + unsigned NumIdx) { + return ConstantExpr::getExtractValue(Agg, IdxList, NumIdx); +} + +Constant* LLVMContext::getConstantExprInsertValue(Constant* Agg, Constant* Val, + const unsigned* IdxList, + unsigned NumIdx) { + return ConstantExpr::getInsertValue(Agg, Val, IdxList, NumIdx); +} + +Constant* LLVMContext::getZeroValueForNegation(const Type* Ty) { + return ConstantExpr::getZeroValueForNegationExpr(Ty); +} + + +// ConstantFP accessors. +ConstantFP* LLVMContext::getConstantFP(const APFloat& V) { + return ConstantFP::get(V); +} + +Constant* LLVMContext::getConstantFP(const Type* Ty, double V) { + return ConstantFP::get(Ty, V); +} + +ConstantFP* LLVMContext::getConstantFPNegativeZero(const Type* Ty) { + return ConstantFP::getNegativeZero(Ty); +} + + +// ConstantVector accessors. +Constant* LLVMContext::getConstantVector(const VectorType* T, + const std::vector& V) { + return ConstantVector::get(T, V); +} + +Constant* LLVMContext::getConstantVector(const std::vector& V) { + return ConstantVector::get(V); +} + +Constant* LLVMContext::getConstantVector(Constant* const* Vals, + unsigned NumVals) { + return ConstantVector::get(Vals, NumVals); +} + +ConstantVector* LLVMContext::getConstantVectorAllOnes(const VectorType* Ty) { + return ConstantVector::getAllOnesValue(Ty); +} Added: llvm/trunk/lib/VMCore/LLVMContextImpl.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/LLVMContextImpl.h?rev=74488&view=auto ============================================================================== --- llvm/trunk/lib/VMCore/LLVMContextImpl.h (added) +++ llvm/trunk/lib/VMCore/LLVMContextImpl.h Mon Jun 29 19:48:55 2009 @@ -0,0 +1,20 @@ +//===-- llvm/SymbolTableListTraitsImpl.h - Implementation ------*- C++ -*--===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LLVMCONTEXT_IMPL_H +#define LLVM_LLVMCONTEXT_IMPL_H + +namespace llvm { +class LLVMContextImpl { + +}; + +} + +#endif \ No newline at end of file From daniel at zuster.org Mon Jun 29 19:49:23 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Tue, 30 Jun 2009 00:49:23 -0000 Subject: [llvm-commits] [llvm] r74489 - in /llvm/trunk: include/llvm/Support/SourceMgr.h lib/Support/SourceMgr.cpp tools/llvm-mc/AsmLexer.cpp tools/llvm-mc/AsmLexer.h tools/llvm-mc/AsmParser.cpp tools/llvm-mc/AsmParser.h tools/llvm-mc/llvm-mc.cpp utils/TableGen/TGLexer.cpp utils/TableGen/TableGen.cpp Message-ID: <200906300049.n5U0nNR8007496@zion.cs.uiuc.edu> Author: ddunbar Date: Mon Jun 29 19:49:23 2009 New Revision: 74489 URL: http://llvm.org/viewvc/llvm-project?rev=74489&view=rev Log: Normalize SourceMgr messages. - Don't print "Parsing" in front of every message. - Take additional "type" argument which is prepended to the message (with ": ") if given. - Update clients to print errors (warnings) as: :: error(warning): ... Modified: llvm/trunk/include/llvm/Support/SourceMgr.h llvm/trunk/lib/Support/SourceMgr.cpp llvm/trunk/tools/llvm-mc/AsmLexer.cpp llvm/trunk/tools/llvm-mc/AsmLexer.h llvm/trunk/tools/llvm-mc/AsmParser.cpp llvm/trunk/tools/llvm-mc/AsmParser.h llvm/trunk/tools/llvm-mc/llvm-mc.cpp llvm/trunk/utils/TableGen/TGLexer.cpp llvm/trunk/utils/TableGen/TableGen.cpp Modified: llvm/trunk/include/llvm/Support/SourceMgr.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/SourceMgr.h?rev=74489&r1=74488&r2=74489&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/SourceMgr.h (original) +++ llvm/trunk/include/llvm/Support/SourceMgr.h Mon Jun 29 19:49:23 2009 @@ -111,7 +111,10 @@ /// PrintMessage - Emit a message about the specified location with the /// specified string. - void PrintMessage(SMLoc Loc, const std::string &Msg) const; + /// + /// @param Type - If non-null, the kind of message (e.g., "error") which is + /// prefixed to the message. + void PrintMessage(SMLoc Loc, const std::string &Msg, const char *Type) const; private: void PrintIncludeStack(SMLoc IncludeLoc) const; Modified: llvm/trunk/lib/Support/SourceMgr.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/SourceMgr.cpp?rev=74489&r1=74488&r2=74489&view=diff ============================================================================== --- llvm/trunk/lib/Support/SourceMgr.cpp (original) +++ llvm/trunk/lib/Support/SourceMgr.cpp Mon Jun 29 19:49:23 2009 @@ -90,7 +90,8 @@ } -void SourceMgr::PrintMessage(SMLoc Loc, const std::string &Msg) const { +void SourceMgr::PrintMessage(SMLoc Loc, const std::string &Msg, + const char *Type) const { raw_ostream &OS = errs(); // First thing to do: find the current buffer containing the specified @@ -103,9 +104,12 @@ MemoryBuffer *CurMB = getBufferInfo(CurBuf).Buffer; - OS << "Parsing " << CurMB->getBufferIdentifier() << ":" + OS << CurMB->getBufferIdentifier() << ":" << FindLineNumber(Loc, CurBuf) << ": "; - + + if (Type) + OS << Type << ": "; + OS << Msg << "\n"; // Scan backward to find the start of the line. Modified: llvm/trunk/tools/llvm-mc/AsmLexer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/AsmLexer.cpp?rev=74489&r1=74488&r2=74489&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/AsmLexer.cpp (original) +++ llvm/trunk/tools/llvm-mc/AsmLexer.cpp Mon Jun 29 19:49:23 2009 @@ -42,14 +42,15 @@ return SMLoc::getFromPointer(TokStart); } -void AsmLexer::PrintMessage(SMLoc Loc, const std::string &Msg) const { - SrcMgr.PrintMessage(Loc, Msg); +void AsmLexer::PrintMessage(SMLoc Loc, const std::string &Msg, + const char *Type) const { + SrcMgr.PrintMessage(Loc, Msg, Type); } /// ReturnError - Set the error to the specified string at the specified /// location. This is defined to always return asmtok::Error. asmtok::TokKind AsmLexer::ReturnError(const char *Loc, const std::string &Msg) { - SrcMgr.PrintMessage(SMLoc::getFromPointer(Loc), Msg); + SrcMgr.PrintMessage(SMLoc::getFromPointer(Loc), Msg, "error"); return asmtok::Error; } Modified: llvm/trunk/tools/llvm-mc/AsmLexer.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/AsmLexer.h?rev=74489&r1=74488&r2=74489&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/AsmLexer.h (original) +++ llvm/trunk/tools/llvm-mc/AsmLexer.h Mon Jun 29 19:49:23 2009 @@ -97,7 +97,7 @@ SMLoc getLoc() const; - void PrintMessage(SMLoc Loc, const std::string &Msg) const; + void PrintMessage(SMLoc Loc, const std::string &Msg, const char *Type) const; private: int getNextChar(); Modified: llvm/trunk/tools/llvm-mc/AsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/AsmParser.cpp?rev=74489&r1=74488&r2=74489&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/AsmParser.cpp (original) +++ llvm/trunk/tools/llvm-mc/AsmParser.cpp Mon Jun 29 19:49:23 2009 @@ -22,13 +22,17 @@ #include "llvm/Support/raw_ostream.h" using namespace llvm; +void AsmParser::Warning(SMLoc L, const char *Msg) { + Lexer.PrintMessage(L, Msg, "warning"); +} + bool AsmParser::Error(SMLoc L, const char *Msg) { - Lexer.PrintMessage(L, Msg); + Lexer.PrintMessage(L, Msg, "error"); return true; } bool AsmParser::TokError(const char *Msg) { - Lexer.PrintMessage(Lexer.getLoc(), Msg); + Lexer.PrintMessage(Lexer.getLoc(), Msg, "error"); return true; } @@ -482,7 +486,7 @@ if (!strcmp(IDVal, ".weak_reference")) return ParseDirectiveSymbolAttribute(MCStreamer::WeakReference); - Lexer.PrintMessage(IDLoc, "warning: ignoring directive for now"); + Warning(IDLoc, "ignoring directive for now"); EatToEndOfStatement(); return false; } @@ -810,14 +814,14 @@ // Diagnose non-sensical max bytes to fill. if (MaxBytesLoc.isValid()) { if (MaxBytesToFill < 1) { - Lexer.PrintMessage(MaxBytesLoc, "warning: alignment directive can never " - "be satisfied in this many bytes, ignoring"); + Warning(MaxBytesLoc, "alignment directive can never be satisfied in this " + "many bytes, ignoring"); return false; } if (MaxBytesToFill >= Alignment) { - Lexer.PrintMessage(MaxBytesLoc, "warning: maximum bytes expression " - "exceeds alignment and has no effect"); + Warning(MaxBytesLoc, "maximum bytes expression exceeds alignment and " + "has no effect"); MaxBytesToFill = 0; } } Modified: llvm/trunk/tools/llvm-mc/AsmParser.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/AsmParser.h?rev=74489&r1=74488&r2=74489&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/AsmParser.h (original) +++ llvm/trunk/tools/llvm-mc/AsmParser.h Mon Jun 29 19:49:23 2009 @@ -39,7 +39,8 @@ private: bool ParseStatement(); - + + void Warning(SMLoc L, const char *Msg); bool Error(SMLoc L, const char *Msg); bool TokError(const char *Msg); Modified: llvm/trunk/tools/llvm-mc/llvm-mc.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/llvm-mc.cpp?rev=74489&r1=74488&r2=74489&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/llvm-mc.cpp (original) +++ llvm/trunk/tools/llvm-mc/llvm-mc.cpp Mon Jun 29 19:49:23 2009 @@ -80,7 +80,7 @@ while (Tok != asmtok::Eof) { switch (Tok) { default: - Lexer.PrintMessage(Lexer.getLoc(), "driver: unknown token"); + Lexer.PrintMessage(Lexer.getLoc(), "unknown token", "warning"); Error = true; break; case asmtok::Error: Modified: llvm/trunk/utils/TableGen/TGLexer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/TGLexer.cpp?rev=74489&r1=74488&r2=74489&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/TGLexer.cpp (original) +++ llvm/trunk/utils/TableGen/TGLexer.cpp Mon Jun 29 19:49:23 2009 @@ -44,11 +44,11 @@ void TGLexer::PrintError(const char *Loc, const std::string &Msg) const { - SrcMgr.PrintMessage(SMLoc::getFromPointer(Loc), Msg); + SrcMgr.PrintMessage(SMLoc::getFromPointer(Loc), Msg, "error"); } void TGLexer::PrintError(SMLoc Loc, const std::string &Msg) const { - SrcMgr.PrintMessage(Loc, Msg); + SrcMgr.PrintMessage(Loc, Msg, "error"); } Modified: llvm/trunk/utils/TableGen/TableGen.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/TableGen.cpp?rev=74489&r1=74488&r2=74489&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/TableGen.cpp (original) +++ llvm/trunk/utils/TableGen/TableGen.cpp Mon Jun 29 19:49:23 2009 @@ -127,7 +127,7 @@ static SourceMgr SrcMgr; void llvm::PrintError(SMLoc ErrorLoc, const std::string &Msg) { - SrcMgr.PrintMessage(ErrorLoc, Msg); + SrcMgr.PrintMessage(ErrorLoc, Msg, "error"); } From david_goodwin at apple.com Mon Jun 29 20:02:21 2009 From: david_goodwin at apple.com (David Goodwin) Date: Tue, 30 Jun 2009 01:02:21 -0000 Subject: [llvm-commits] [llvm] r74490 - in /llvm/trunk/test/CodeGen/Thumb2: thumb2-add5.ll thumb2-and.ll thumb2-bic.ll thumb2-cmn.ll thumb2-cmp.ll thumb2-cmp2.ll thumb2-eor.ll thumb2-mvn2.ll thumb2-orn.ll thumb2-orr.ll thumb2-rsb.ll thumb2-sub4.ll thumb2-teq2.ll thumb2-tst2.ll Message-ID: <200906300102.n5U12L6H007895@zion.cs.uiuc.edu> Author: david_goodwin Date: Mon Jun 29 20:02:20 2009 New Revision: 74490 URL: http://llvm.org/viewvc/llvm-project?rev=74490&view=rev Log: Enhance tests to include shifted-register operand testing. Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-add5.ll llvm/trunk/test/CodeGen/Thumb2/thumb2-and.ll llvm/trunk/test/CodeGen/Thumb2/thumb2-bic.ll llvm/trunk/test/CodeGen/Thumb2/thumb2-cmn.ll llvm/trunk/test/CodeGen/Thumb2/thumb2-cmp.ll llvm/trunk/test/CodeGen/Thumb2/thumb2-cmp2.ll llvm/trunk/test/CodeGen/Thumb2/thumb2-eor.ll llvm/trunk/test/CodeGen/Thumb2/thumb2-mvn2.ll llvm/trunk/test/CodeGen/Thumb2/thumb2-orn.ll llvm/trunk/test/CodeGen/Thumb2/thumb2-orr.ll llvm/trunk/test/CodeGen/Thumb2/thumb2-rsb.ll llvm/trunk/test/CodeGen/Thumb2/thumb2-sub4.ll llvm/trunk/test/CodeGen/Thumb2/thumb2-teq2.ll llvm/trunk/test/CodeGen/Thumb2/thumb2-tst2.ll Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-add5.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-add5.ll?rev=74490&r1=74489&r2=74490&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-add5.ll (original) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-add5.ll Mon Jun 29 20:02:20 2009 @@ -1,6 +1,36 @@ -; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {add\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1 define i32 @f1(i32 %a, i32 %b) { %tmp = add i32 %a, %b ret i32 %tmp } + +define i32 @f2(i32 %a, i32 %b) { + %tmp = shl i32 %b, 5 + %tmp1 = add i32 %a, %tmp + ret i32 %tmp1 +} + +define i32 @f3(i32 %a, i32 %b) { + %tmp = lshr i32 %b, 6 + %tmp1 = add i32 %a, %tmp + ret i32 %tmp1 +} + +define i32 @f4(i32 %a, i32 %b) { + %tmp = ashr i32 %b, 7 + %tmp1 = add i32 %a, %tmp + ret i32 %tmp1 +} + +define i32 @f5(i32 %a, i32 %b) { + %l8 = shl i32 %a, 24 + %r8 = lshr i32 %a, 8 + %tmp = or i32 %l8, %r8 + %tmp1 = add i32 %a, %tmp + ret i32 %tmp1 +} Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-and.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-and.ll?rev=74490&r1=74489&r2=74490&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-and.ll (original) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-and.ll Mon Jun 29 20:02:20 2009 @@ -1,6 +1,36 @@ -; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {and\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {and\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {and\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {and\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {and\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {and\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1 define i32 @f1(i32 %a, i32 %b) { %tmp = and i32 %a, %b ret i32 %tmp } + +define i32 @f2(i32 %a, i32 %b) { + %tmp = shl i32 %b, 5 + %tmp1 = and i32 %a, %tmp + ret i32 %tmp1 +} + +define i32 @f3(i32 %a, i32 %b) { + %tmp = lshr i32 %b, 6 + %tmp1 = and i32 %a, %tmp + ret i32 %tmp1 +} + +define i32 @f4(i32 %a, i32 %b) { + %tmp = ashr i32 %b, 7 + %tmp1 = and i32 %a, %tmp + ret i32 %tmp1 +} + +define i32 @f5(i32 %a, i32 %b) { + %l8 = shl i32 %a, 24 + %r8 = lshr i32 %a, 8 + %tmp = or i32 %l8, %r8 + %tmp1 = and i32 %a, %tmp + ret i32 %tmp1 +} Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-bic.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-bic.ll?rev=74490&r1=74489&r2=74490&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-bic.ll (original) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-bic.ll Mon Jun 29 20:02:20 2009 @@ -1,4 +1,8 @@ -; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {bic\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*r\[0-9\]*} | count 4 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {bic\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*r\[0-9\]*$} | count 4 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {bic\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {bic\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {bic\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {bic\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1 define i32 @f1(i32 %a, i32 %b) { %tmp = xor i32 %b, 4294967295 @@ -23,3 +27,33 @@ %tmp1 = and i32 %tmp, %a ret i32 %tmp1 } + +define i32 @f5(i32 %a, i32 %b) { + %tmp = shl i32 %b, 5 + %tmp1 = xor i32 4294967295, %tmp + %tmp2 = and i32 %a, %tmp1 + ret i32 %tmp2 +} + +define i32 @f6(i32 %a, i32 %b) { + %tmp = lshr i32 %b, 6 + %tmp1 = xor i32 %tmp, 4294967295 + %tmp2 = and i32 %tmp1, %a + ret i32 %tmp2 +} + +define i32 @f7(i32 %a, i32 %b) { + %tmp = ashr i32 %b, 7 + %tmp1 = xor i32 %tmp, 4294967295 + %tmp2 = and i32 %a, %tmp1 + ret i32 %tmp2 +} + +define i32 @f8(i32 %a, i32 %b) { + %l8 = shl i32 %a, 24 + %r8 = lshr i32 %a, 8 + %tmp = or i32 %l8, %r8 + %tmp1 = xor i32 4294967295, %tmp + %tmp2 = and i32 %tmp1, %a + ret i32 %tmp2 +} Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-cmn.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-cmn.ll?rev=74490&r1=74489&r2=74490&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-cmn.ll (original) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-cmn.ll Mon Jun 29 20:02:20 2009 @@ -1,4 +1,8 @@ -; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmn\\W*r\[0-9\],\\W*r\[0-9\]} | count 4 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmn\\W*r\[0-9\],\\W*r\[0-9\]$} | count 4 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmn\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmn\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmn\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmn\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1 define i1 @f1(i32 %a, i32 %b) { %nb = sub i32 0, %b @@ -23,3 +27,33 @@ %tmp = icmp eq i32 %nb, %a ret i1 %tmp } + +define i1 @f5(i32 %a, i32 %b) { + %tmp = shl i32 %b, 5 + %nb = sub i32 0, %tmp + %tmp1 = icmp eq i32 %nb, %a + ret i1 %tmp1 +} + +define i1 @f6(i32 %a, i32 %b) { + %tmp = lshr i32 %b, 6 + %nb = sub i32 0, %tmp + %tmp1 = icmp ne i32 %nb, %a + ret i1 %tmp1 +} + +define i1 @f7(i32 %a, i32 %b) { + %tmp = ashr i32 %b, 7 + %nb = sub i32 0, %tmp + %tmp1 = icmp eq i32 %a, %nb + ret i1 %tmp1 +} + +define i1 @f8(i32 %a, i32 %b) { + %l8 = shl i32 %a, 24 + %r8 = lshr i32 %a, 8 + %tmp = or i32 %l8, %r8 + %nb = sub i32 0, %tmp + %tmp1 = icmp ne i32 %a, %nb + ret i1 %tmp1 +} Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-cmp.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-cmp.ll?rev=74490&r1=74489&r2=74490&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-cmp.ll (original) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-cmp.ll Mon Jun 29 20:02:20 2009 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep "cmp " | grep {#187\\|#11141290\\|#3422604288\\|#1114112\\|#3722304989} | count 5 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\W*r\[0-9\],\\W*#\[0-9\]*$} | grep {#187\\|#11141290\\|#3422604288\\|#1114112\\|#3722304989} | count 5 ; 0x000000bb = 187 define i1 @f1(i32 %a) { Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-cmp2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-cmp2.ll?rev=74490&r1=74489&r2=74490&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-cmp2.ll (original) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-cmp2.ll Mon Jun 29 20:02:20 2009 @@ -1,4 +1,8 @@ -; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\W*r\[0-9\],\\W*r\[0-9\]} | count 2 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\W*r\[0-9\],\\W*r\[0-9\]$} | count 2 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {cmp\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1 define i1 @f1(i32 %a, i32 %b) { %tmp = icmp ne i32 %a, %b @@ -9,3 +13,29 @@ %tmp = icmp eq i32 %a, %b ret i1 %tmp } + +define i1 @f6(i32 %a, i32 %b) { + %tmp = shl i32 %b, 5 + %tmp1 = icmp eq i32 %tmp, %a + ret i1 %tmp1 +} + +define i1 @f7(i32 %a, i32 %b) { + %tmp = lshr i32 %b, 6 + %tmp1 = icmp ne i32 %tmp, %a + ret i1 %tmp1 +} + +define i1 @f8(i32 %a, i32 %b) { + %tmp = ashr i32 %b, 7 + %tmp1 = icmp eq i32 %a, %tmp + ret i1 %tmp1 +} + +define i1 @f9(i32 %a, i32 %b) { + %l8 = shl i32 %a, 24 + %r8 = lshr i32 %a, 8 + %tmp = or i32 %l8, %r8 + %tmp1 = icmp ne i32 %a, %tmp + ret i1 %tmp1 +} Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-eor.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-eor.ll?rev=74490&r1=74489&r2=74490&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-eor.ll (original) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-eor.ll Mon Jun 29 20:02:20 2009 @@ -1,6 +1,41 @@ -; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {eor\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {eor\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]$} | count 2 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {eor\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {eor\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {eor\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {eor\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1 define i32 @f1(i32 %a, i32 %b) { %tmp = xor i32 %a, %b ret i32 %tmp } + +define i32 @f2(i32 %a, i32 %b) { + %tmp = xor i32 %b, %a + ret i32 %tmp +} + +define i32 @f3(i32 %a, i32 %b) { + %tmp = shl i32 %b, 5 + %tmp1 = xor i32 %a, %tmp + ret i32 %tmp1 +} + +define i32 @f4(i32 %a, i32 %b) { + %tmp = lshr i32 %b, 6 + %tmp1 = xor i32 %tmp, %a + ret i32 %tmp1 +} + +define i32 @f5(i32 %a, i32 %b) { + %tmp = ashr i32 %b, 7 + %tmp1 = xor i32 %a, %tmp + ret i32 %tmp1 +} + +define i32 @f6(i32 %a, i32 %b) { + %l8 = shl i32 %a, 24 + %r8 = lshr i32 %a, 8 + %tmp = or i32 %l8, %r8 + %tmp1 = xor i32 %tmp, %a + ret i32 %tmp1 +} Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-mvn2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-mvn2.ll?rev=74490&r1=74489&r2=74490&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-mvn2.ll (original) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-mvn2.ll Mon Jun 29 20:02:20 2009 @@ -1,4 +1,8 @@ -; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mvn\\W*r\[0-9\]*,\\W*r\[0-9\]*} | count 2 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mvn\\W*r\[0-9\]*,\\W*r\[0-9\]*$} | count 2 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mvn\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mvn\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mvn\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mvn\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1 define i32 @f1(i32 %a) { %tmp = xor i32 4294967295, %a @@ -9,3 +13,29 @@ %tmp = xor i32 %a, 4294967295 ret i32 %tmp } + +define i32 @f5(i32 %a) { + %tmp = shl i32 %a, 5 + %tmp1 = xor i32 %tmp, 4294967295 + ret i32 %tmp1 +} + +define i32 @f6(i32 %a) { + %tmp = lshr i32 %a, 6 + %tmp1 = xor i32 %tmp, 4294967295 + ret i32 %tmp1 +} + +define i32 @f7(i32 %a) { + %tmp = ashr i32 %a, 7 + %tmp1 = xor i32 %tmp, 4294967295 + ret i32 %tmp1 +} + +define i32 @f8(i32 %a) { + %l8 = shl i32 %a, 24 + %r8 = lshr i32 %a, 8 + %tmp = or i32 %l8, %r8 + %tmp1 = xor i32 %tmp, 4294967295 + ret i32 %tmp1 +} Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-orn.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-orn.ll?rev=74490&r1=74489&r2=74490&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-orn.ll (original) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-orn.ll Mon Jun 29 20:02:20 2009 @@ -1,4 +1,8 @@ -; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orn\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*r\[0-9\]*} | count 4 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orn\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*r\[0-9\]*$} | count 4 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orn\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orn\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orn\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orn\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1 define i32 @f1(i32 %a, i32 %b) { %tmp = xor i32 %b, 4294967295 @@ -23,3 +27,33 @@ %tmp1 = or i32 %tmp, %a ret i32 %tmp1 } + +define i32 @f5(i32 %a, i32 %b) { + %tmp = shl i32 %b, 5 + %tmp1 = xor i32 4294967295, %tmp + %tmp2 = or i32 %a, %tmp1 + ret i32 %tmp2 +} + +define i32 @f6(i32 %a, i32 %b) { + %tmp = lshr i32 %b, 6 + %tmp1 = xor i32 4294967295, %tmp + %tmp2 = or i32 %a, %tmp1 + ret i32 %tmp2 +} + +define i32 @f7(i32 %a, i32 %b) { + %tmp = ashr i32 %b, 7 + %tmp1 = xor i32 4294967295, %tmp + %tmp2 = or i32 %a, %tmp1 + ret i32 %tmp2 +} + +define i32 @f8(i32 %a, i32 %b) { + %l8 = shl i32 %a, 24 + %r8 = lshr i32 %a, 8 + %tmp = or i32 %l8, %r8 + %tmp1 = xor i32 4294967295, %tmp + %tmp2 = or i32 %a, %tmp1 + ret i32 %tmp2 +} Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-orr.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-orr.ll?rev=74490&r1=74489&r2=74490&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-orr.ll (original) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-orr.ll Mon Jun 29 20:02:20 2009 @@ -1,6 +1,36 @@ -; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orr\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*r\[0-9\]*} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orr\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*r\[0-9\]*$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orr\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orr\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orr\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {orr\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1 define i32 @f1(i32 %a, i32 %b) { %tmp2 = or i32 %a, %b ret i32 %tmp2 } + +define i32 @f5(i32 %a, i32 %b) { + %tmp = shl i32 %b, 5 + %tmp2 = or i32 %a, %tmp + ret i32 %tmp2 +} + +define i32 @f6(i32 %a, i32 %b) { + %tmp = lshr i32 %b, 6 + %tmp2 = or i32 %a, %tmp + ret i32 %tmp2 +} + +define i32 @f7(i32 %a, i32 %b) { + %tmp = ashr i32 %b, 7 + %tmp2 = or i32 %a, %tmp + ret i32 %tmp2 +} + +define i32 @f8(i32 %a, i32 %b) { + %l8 = shl i32 %a, 24 + %r8 = lshr i32 %a, 8 + %tmp = or i32 %l8, %r8 + %tmp2 = or i32 %a, %tmp + ret i32 %tmp2 +} Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-rsb.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-rsb.ll?rev=74490&r1=74489&r2=74490&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-rsb.ll (original) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-rsb.ll Mon Jun 29 20:02:20 2009 @@ -1,9 +1,30 @@ -; XFAIL: * -; this will match as "sub" until we get register shifting +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {rsb\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {rsb\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {rsb\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {rsb\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1 -; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {rsb\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]*} | count 1 +define i32 @f2(i32 %a, i32 %b) { + %tmp = shl i32 %b, 5 + %tmp1 = sub i32 %tmp, %a + ret i32 %tmp1 +} + +define i32 @f3(i32 %a, i32 %b) { + %tmp = lshr i32 %b, 6 + %tmp1 = sub i32 %tmp, %a + ret i32 %tmp1 +} + +define i32 @f4(i32 %a, i32 %b) { + %tmp = ashr i32 %b, 7 + %tmp1 = sub i32 %tmp, %a + ret i32 %tmp1 +} -define i32 @f1(i32 %a, i32 %b) { - %tmp = sub i32 %b, %a - ret i32 %tmp +define i32 @f5(i32 %a, i32 %b) { + %l8 = shl i32 %a, 24 + %r8 = lshr i32 %a, 8 + %tmp = or i32 %l8, %r8 + %tmp1 = sub i32 %tmp, %a + ret i32 %tmp1 } Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-sub4.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-sub4.ll?rev=74490&r1=74489&r2=74490&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-sub4.ll (original) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-sub4.ll Mon Jun 29 20:02:20 2009 @@ -1,6 +1,36 @@ -; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1 define i32 @f1(i32 %a, i32 %b) { %tmp = sub i32 %a, %b ret i32 %tmp } + +define i32 @f2(i32 %a, i32 %b) { + %tmp = shl i32 %b, 5 + %tmp1 = sub i32 %a, %tmp + ret i32 %tmp1 +} + +define i32 @f3(i32 %a, i32 %b) { + %tmp = lshr i32 %b, 6 + %tmp1 = sub i32 %a, %tmp + ret i32 %tmp1 +} + +define i32 @f4(i32 %a, i32 %b) { + %tmp = ashr i32 %b, 7 + %tmp1 = sub i32 %a, %tmp + ret i32 %tmp1 +} + +define i32 @f5(i32 %a, i32 %b) { + %l8 = shl i32 %a, 24 + %r8 = lshr i32 %a, 8 + %tmp = or i32 %l8, %r8 + %tmp1 = sub i32 %a, %tmp + ret i32 %tmp1 +} Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-teq2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-teq2.ll?rev=74490&r1=74489&r2=74490&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-teq2.ll (original) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-teq2.ll Mon Jun 29 20:02:20 2009 @@ -1,4 +1,8 @@ -; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {teq\\W*r\[0-9\],\\W*r\[0-9\]} | count 4 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {teq\\W*r\[0-9\],\\W*r\[0-9\]$} | count 4 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {teq\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {teq\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {teq\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {teq\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1 define i1 @f1(i32 %a, i32 %b) { %tmp = xor i32 %a, %b @@ -23,3 +27,33 @@ %tmp1 = icmp eq i32 0, %tmp ret i1 %tmp1 } + +define i1 @f6(i32 %a, i32 %b) { + %tmp = shl i32 %b, 5 + %tmp1 = xor i32 %a, %tmp + %tmp2 = icmp eq i32 %tmp1, 0 + ret i1 %tmp2 +} + +define i1 @f7(i32 %a, i32 %b) { + %tmp = lshr i32 %b, 6 + %tmp1 = xor i32 %a, %tmp + %tmp2 = icmp eq i32 %tmp1, 0 + ret i1 %tmp2 +} + +define i1 @f8(i32 %a, i32 %b) { + %tmp = ashr i32 %b, 7 + %tmp1 = xor i32 %a, %tmp + %tmp2 = icmp eq i32 %tmp1, 0 + ret i1 %tmp2 +} + +define i1 @f9(i32 %a, i32 %b) { + %l8 = shl i32 %a, 24 + %r8 = lshr i32 %a, 8 + %tmp = or i32 %l8, %r8 + %tmp1 = xor i32 %a, %tmp + %tmp2 = icmp eq i32 %tmp1, 0 + ret i1 %tmp2 +} Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-tst2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-tst2.ll?rev=74490&r1=74489&r2=74490&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-tst2.ll (original) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-tst2.ll Mon Jun 29 20:02:20 2009 @@ -1,4 +1,8 @@ -; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\W*r\[0-9\],\\W*r\[0-9\]} | count 4 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\W*r\[0-9\],\\W*r\[0-9\]$} | count 4 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsl\\W*#5$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\W*r\[0-9\],\\W*r\[0-9\],\\W*lsr\\W*#6$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\W*r\[0-9\],\\W*r\[0-9\],\\W*asr\\W*#7$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {tst\\W*r\[0-9\],\\W*r\[0-9\],\\W*ror\\W*#8$} | count 1 define i1 @f1(i32 %a, i32 %b) { %tmp = and i32 %a, %b @@ -23,3 +27,33 @@ %tmp1 = icmp eq i32 0, %tmp ret i1 %tmp1 } + +define i1 @f6(i32 %a, i32 %b) { + %tmp = shl i32 %b, 5 + %tmp1 = and i32 %a, %tmp + %tmp2 = icmp eq i32 %tmp1, 0 + ret i1 %tmp2 +} + +define i1 @f7(i32 %a, i32 %b) { + %tmp = lshr i32 %b, 6 + %tmp1 = and i32 %a, %tmp + %tmp2 = icmp eq i32 %tmp1, 0 + ret i1 %tmp2 +} + +define i1 @f8(i32 %a, i32 %b) { + %tmp = ashr i32 %b, 7 + %tmp1 = and i32 %a, %tmp + %tmp2 = icmp eq i32 %tmp1, 0 + ret i1 %tmp2 +} + +define i1 @f9(i32 %a, i32 %b) { + %l8 = shl i32 %a, 24 + %r8 = lshr i32 %a, 8 + %tmp = or i32 %l8, %r8 + %tmp1 = and i32 %a, %tmp + %tmp2 = icmp eq i32 %tmp1, 0 + ret i1 %tmp2 +} From gohman at apple.com Mon Jun 29 20:24:43 2009 From: gohman at apple.com (Dan Gohman) Date: Tue, 30 Jun 2009 01:24:43 -0000 Subject: [llvm-commits] [llvm] r74491 - /llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp Message-ID: <200906300124.n5U1OhcL008566@zion.cs.uiuc.edu> Author: djg Date: Mon Jun 29 20:24:43 2009 New Revision: 74491 URL: http://llvm.org/viewvc/llvm-project?rev=74491&view=rev Log: Minor code simplification. Modified: llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp Modified: llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp?rev=74491&r1=74490&r2=74491&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp Mon Jun 29 20:24:43 2009 @@ -282,10 +282,9 @@ // Attempt to hoist out all instructions except for the // comparison and the branch. bool AllInvariant = true; - for (BasicBlock::iterator I = ExitingBlock->begin(), - E = ExitingBlock->end(); I != E; ) { + for (BasicBlock::iterator I = ExitingBlock->begin(); &*I != BI; ) { Instruction *Inst = I++; - if (Inst == BI || Inst == CI) + if (Inst == CI) continue; if (Inst->isTrapping()) { AllInvariant = false; From gohman at apple.com Mon Jun 29 20:25:30 2009 From: gohman at apple.com (Dan Gohman) Date: Tue, 30 Jun 2009 01:25:30 -0000 Subject: [llvm-commits] [llvm] r74492 - /llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp Message-ID: <200906300125.n5U1PVLY008598@zion.cs.uiuc.edu> Author: djg Date: Mon Jun 29 20:25:30 2009 New Revision: 74492 URL: http://llvm.org/viewvc/llvm-project?rev=74492&view=rev Log: Minor formatting, whitespace, and 80-column fixes. Modified: llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp Modified: llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp?rev=74492&r1=74491&r2=74492&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp (original) +++ llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp Mon Jun 29 20:25:30 2009 @@ -185,8 +185,9 @@ if (const SCEVMulExpr *M = dyn_cast(S)) if (const SCEVConstant *C = dyn_cast(M->getOperand(0))) if (!C->getValue()->getValue().srem(Factor)) { - const SmallVectorImpl &MOperands = M->getOperands(); - SmallVector NewMulOps(MOperands.begin(), MOperands.end()); + const SmallVectorImpl &MOperands = M->getOperands(); + SmallVector NewMulOps(MOperands.begin(), + MOperands.end()); NewMulOps[0] = SE.getConstant(C->getValue()->getValue().sdiv(Factor)); S = SE.getMulExpr(NewMulOps); @@ -368,8 +369,7 @@ if (SE.TD) if (const PointerType *PTy = dyn_cast(V->getType())) { const SmallVectorImpl &Ops = S->getOperands(); - return expandAddToGEP(&Ops[0], &Ops[Ops.size() - 1], - PTy, Ty, V); + return expandAddToGEP(&Ops[0], &Ops[Ops.size() - 1], PTy, Ty, V); } V = InsertNoopCastOfTo(V, Ty); @@ -457,10 +457,10 @@ if (CanonicalIV && SE.getTypeSizeInBits(CanonicalIV->getType()) > SE.getTypeSizeInBits(Ty)) { - const SCEV* Start = SE.getAnyExtendExpr(S->getStart(), + const SCEV *Start = SE.getAnyExtendExpr(S->getStart(), + CanonicalIV->getType()); + const SCEV *Step = SE.getAnyExtendExpr(S->getStepRecurrence(SE), CanonicalIV->getType()); - const SCEV* Step = SE.getAnyExtendExpr(S->getStepRecurrence(SE), - CanonicalIV->getType()); Value *V = expand(SE.getAddRecExpr(Start, Step, S->getLoop())); BasicBlock *SaveInsertBB = Builder.GetInsertBlock(); BasicBlock::iterator SaveInsertPt = Builder.GetInsertPoint(); From gohman at apple.com Mon Jun 29 20:28:08 2009 From: gohman at apple.com (Dan Gohman) Date: Tue, 30 Jun 2009 01:28:08 -0000 Subject: [llvm-commits] [llvm] r74494 - in /llvm/trunk: include/llvm/ADT/APInt.h lib/Support/APInt.cpp Message-ID: <200906300128.n5U1S8xn008718@zion.cs.uiuc.edu> Author: djg Date: Mon Jun 29 20:28:08 2009 New Revision: 74494 URL: http://llvm.org/viewvc/llvm-project?rev=74494&view=rev Log: Define an operator<< for APInt to be used with std::ostream. This will allow it to be used in unittests that use gtest's EXPECT_EQ. Modified: llvm/trunk/include/llvm/ADT/APInt.h llvm/trunk/lib/Support/APInt.cpp Modified: llvm/trunk/include/llvm/ADT/APInt.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/APInt.h?rev=74494&r1=74493&r2=74494&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/APInt.h (original) +++ llvm/trunk/include/llvm/ADT/APInt.h Mon Jun 29 20:28:08 2009 @@ -1426,6 +1426,8 @@ return OS; } +std::ostream &operator<<(std::ostream &o, const APInt &I); + namespace APIntOps { /// @brief Determine the smaller of two APInts considered to be signed. Modified: llvm/trunk/lib/Support/APInt.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/APInt.cpp?rev=74494&r1=74493&r2=74494&view=diff ============================================================================== --- llvm/trunk/lib/Support/APInt.cpp (original) +++ llvm/trunk/lib/Support/APInt.cpp Mon Jun 29 20:28:08 2009 @@ -2178,6 +2178,12 @@ OS << S.c_str(); } +std::ostream &operator<<(std::ostream &o, const APInt &I) { + raw_os_ostream OS(o); + OS << I; + return o; +} + // This implements a variety of operations on a representation of // arbitrary precision, two's-complement, bignum integer values. From gohman at apple.com Mon Jun 29 20:29:09 2009 From: gohman at apple.com (Dan Gohman) Date: Tue, 30 Jun 2009 01:29:09 -0000 Subject: [llvm-commits] [llvm] r74495 - /llvm/trunk/include/llvm/CodeGen/ValueTypes.h Message-ID: <200906300129.n5U1T9tb008759@zion.cs.uiuc.edu> Author: djg Date: Mon Jun 29 20:29:09 2009 New Revision: 74495 URL: http://llvm.org/viewvc/llvm-project?rev=74495&view=rev Log: Delete a spurious blank line at the top of the file. Modified: llvm/trunk/include/llvm/CodeGen/ValueTypes.h Modified: llvm/trunk/include/llvm/CodeGen/ValueTypes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ValueTypes.h?rev=74495&r1=74494&r2=74495&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/ValueTypes.h (original) +++ llvm/trunk/include/llvm/CodeGen/ValueTypes.h Mon Jun 29 20:29:09 2009 @@ -1,4 +1,3 @@ - //===- CodeGen/ValueTypes.h - Low-Level Target independ. types --*- C++ -*-===// // // The LLVM Compiler Infrastructure From daniel at zuster.org Mon Jun 29 20:49:52 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Tue, 30 Jun 2009 01:49:52 -0000 Subject: [llvm-commits] [llvm] r74496 - in /llvm/trunk: include/llvm/MC/MCSymbol.h include/llvm/MC/MCValue.h tools/llvm-mc/AsmExpr.cpp tools/llvm-mc/AsmExpr.h tools/llvm-mc/AsmParser.cpp tools/llvm-mc/AsmParser.h Message-ID: <200906300149.n5U1nqPK009394@zion.cs.uiuc.edu> Author: ddunbar Date: Mon Jun 29 20:49:52 2009 New Revision: 74496 URL: http://llvm.org/viewvc/llvm-project?rev=74496&view=rev Log: llvm-mc: Evaluation for relocatable expressions. Modified: llvm/trunk/include/llvm/MC/MCSymbol.h llvm/trunk/include/llvm/MC/MCValue.h llvm/trunk/tools/llvm-mc/AsmExpr.cpp llvm/trunk/tools/llvm-mc/AsmExpr.h llvm/trunk/tools/llvm-mc/AsmParser.cpp llvm/trunk/tools/llvm-mc/AsmParser.h Modified: llvm/trunk/include/llvm/MC/MCSymbol.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCSymbol.h?rev=74496&r1=74495&r2=74496&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCSymbol.h (original) +++ llvm/trunk/include/llvm/MC/MCSymbol.h Mon Jun 29 20:49:52 2009 @@ -13,6 +13,8 @@ #include namespace llvm { + class MCSection; + class MCSymbol { MCSection *Section; std::string Name; Modified: llvm/trunk/include/llvm/MC/MCValue.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCValue.h?rev=74496&r1=74495&r2=74496&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCValue.h (original) +++ llvm/trunk/include/llvm/MC/MCValue.h Mon Jun 29 20:49:52 2009 @@ -15,6 +15,8 @@ #define LLVM_MC_MCVALUE_H #include "llvm/Support/DataTypes.h" +#include "llvm/MC/MCSymbol.h" +#include namespace llvm { class MCSymbol; @@ -23,6 +25,9 @@ /// form, this can hold "SymbolA - SymbolB + imm64". Not all targets supports /// relocations of this general form, but we need to represent this anyway. /// +/// In the general form, SymbolB can only be defined if SymbolA is, and both +/// must be in the same (non-external) section. +/// /// Note that this class must remain a simple POD value class, because we need /// it to live in unions etc. class MCValue { @@ -35,9 +40,21 @@ MCSymbol *getSymB() const { return SymB; } bool isConstant() const { return !SymA && !SymB; } - + + /// getAssociatedSection - For relocatable values, return the section the + /// value is associated with. + /// + /// @result - The value's associated section, or null for external or constant + /// values. + MCSection *getAssociatedSection() const { + return SymA ? SymA->getSection() : 0; + } + static MCValue get(MCSymbol *SymA, MCSymbol *SymB = 0, int64_t Val = 0) { MCValue R; + assert((!SymB || (SymA && SymA->getSection() && + SymA->getSection() == SymB->getSection())) && + "Invalid relocatable MCValue!"); R.Cst = Val; R.SymA = SymA; R.SymB = SymB; Modified: llvm/trunk/tools/llvm-mc/AsmExpr.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/AsmExpr.cpp?rev=74496&r1=74495&r2=74496&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/AsmExpr.cpp (original) +++ llvm/trunk/tools/llvm-mc/AsmExpr.cpp Mon Jun 29 20:49:52 2009 @@ -9,6 +9,7 @@ #include "AsmExpr.h" #include "llvm/MC/MCContext.h" +#include "llvm/MC/MCSymbol.h" #include "llvm/MC/MCValue.h" using namespace llvm; @@ -16,38 +17,61 @@ } bool AsmExpr::EvaluateAsAbsolute(MCContext &Ctx, int64_t &Res) const { + MCValue Value; + + if (!EvaluateAsRelocatable(Ctx, Value) || !Value.isConstant()) + return false; + + Res = Value.getConstant(); + return true; +} + +bool AsmExpr::EvaluateAsRelocatable(MCContext &Ctx, MCValue &Res) const { switch (getKind()) { default: assert(0 && "Invalid assembly expression kind!"); case Constant: - Res = cast(this)->getValue(); + Res = MCValue::get(cast(this)->getValue()); return true; case SymbolRef: { MCSymbol *Sym = cast(this)->getSymbol(); - const MCValue *Value = Ctx.GetSymbolValue(Sym); - - // FIXME: Return more information about the failure. - if (!Value || !Value->isConstant()) - return false; - - Res = Value->getConstant(); + if (const MCValue *Value = Ctx.GetSymbolValue(Sym)) + Res = *Value; + else + Res = MCValue::get(Sym, 0, 0); return true; } case Unary: { const AsmUnaryExpr *AUE = cast(this); - int64_t Value; + MCValue Value; - if (!AUE->getSubExpr()->EvaluateAsAbsolute(Ctx, Value)) + if (!AUE->getSubExpr()->EvaluateAsRelocatable(Ctx, Value)) return false; switch (AUE->getOpcode()) { - case AsmUnaryExpr::LNot: Res = !Value; break; - case AsmUnaryExpr::Minus: Res = -Value; break; - case AsmUnaryExpr::Not: Res = ~Value; break; - case AsmUnaryExpr::Plus: Res = +Value; break; + case AsmUnaryExpr::LNot: + if (!Value.isConstant()) + return false; + Res = MCValue::get(!Value.getConstant()); + break; + case AsmUnaryExpr::Minus: + /// -(a - b + const) ==> (b - a - const) + if (Value.getSymA() && !Value.getSymA()) + return false; + Res = MCValue::get(Value.getSymB(), Value.getSymA(), + -Value.getConstant()); + break; + case AsmUnaryExpr::Not: + if (!Value.isConstant()) + return false; + Res = MCValue::get(~Value.getConstant()); + break; + case AsmUnaryExpr::Plus: + Res = Value; + break; } return true; @@ -55,36 +79,75 @@ case Binary: { const AsmBinaryExpr *ABE = cast(this); - int64_t LHS, RHS; + MCValue LHSValue, RHSValue; - if (!ABE->getLHS()->EvaluateAsAbsolute(Ctx, LHS) || - !ABE->getRHS()->EvaluateAsAbsolute(Ctx, RHS)) + if (!ABE->getLHS()->EvaluateAsRelocatable(Ctx, LHSValue) || + !ABE->getRHS()->EvaluateAsRelocatable(Ctx, RHSValue)) return false; + // We only support a few operations on non-constant expressions, handle + // those first. + if (!LHSValue.isConstant() || !RHSValue.isConstant()) { + switch (ABE->getOpcode()) { + default: + return false; + case AsmBinaryExpr::Sub: + // Negate RHS and fall through. + RHSValue = MCValue::get(RHSValue.getSymB(), RHSValue.getSymA(), + -RHSValue.getConstant()); + case AsmBinaryExpr::Add: + // (a_0 - b_0 + cst_0) + (a_1 - b_1 + cst_1) + + // We can't add or subtract two symbols. + if ((LHSValue.getSymA() && RHSValue.getSymB()) || + (LHSValue.getSymB() && RHSValue.getSymB())) + return false; + + MCSymbol *A = + LHSValue.getSymA() ? LHSValue.getSymA() : RHSValue.getSymA(); + MCSymbol *B = + LHSValue.getSymB() ? LHSValue.getSymB() : RHSValue.getSymB(); + if (B) { + // If we have a negated symbol, then we must have also have a + // non-negated symbol, and both symbols must be in the same + // non-external section. We can do this check later to permit + // expressions which eventually fold to a representable form -- such + // as (a + (0 - b)) -- if necessary. + if (!A || !A->getSection() || A->getSection() != B->getSection()) + return false; + } + Res = MCValue::get(A, B, + LHSValue.getConstant() + RHSValue.getConstant()); + return true; + } + } + // FIXME: We need target hooks for the evaluation. It may be limited in // width, and gas defines the result of comparisons differently from Apple // as (the result is sign extended). + int64_t Result, LHS = LHSValue.getConstant(), RHS = RHSValue.getConstant(); switch (ABE->getOpcode()) { - case AsmBinaryExpr::Add: Res = LHS + RHS; break; - case AsmBinaryExpr::And: Res = LHS & RHS; break; - case AsmBinaryExpr::Div: Res = LHS / RHS; break; - case AsmBinaryExpr::EQ: Res = LHS == RHS; break; - case AsmBinaryExpr::GT: Res = LHS > RHS; break; - case AsmBinaryExpr::GTE: Res = LHS >= RHS; break; - case AsmBinaryExpr::LAnd: Res = LHS && RHS; break; - case AsmBinaryExpr::LOr: Res = LHS || RHS; break; - case AsmBinaryExpr::LT: Res = LHS < RHS; break; - case AsmBinaryExpr::LTE: Res = LHS <= RHS; break; - case AsmBinaryExpr::Mod: Res = LHS % RHS; break; - case AsmBinaryExpr::Mul: Res = LHS * RHS; break; - case AsmBinaryExpr::NE: Res = LHS != RHS; break; - case AsmBinaryExpr::Or: Res = LHS | RHS; break; - case AsmBinaryExpr::Shl: Res = LHS << RHS; break; - case AsmBinaryExpr::Shr: Res = LHS >> RHS; break; - case AsmBinaryExpr::Sub: Res = LHS - RHS; break; - case AsmBinaryExpr::Xor: Res = LHS ^ RHS; break; + case AsmBinaryExpr::Add: Result = LHS + RHS; break; + case AsmBinaryExpr::And: Result = LHS & RHS; break; + case AsmBinaryExpr::Div: Result = LHS / RHS; break; + case AsmBinaryExpr::EQ: Result = LHS == RHS; break; + case AsmBinaryExpr::GT: Result = LHS > RHS; break; + case AsmBinaryExpr::GTE: Result = LHS >= RHS; break; + case AsmBinaryExpr::LAnd: Result = LHS && RHS; break; + case AsmBinaryExpr::LOr: Result = LHS || RHS; break; + case AsmBinaryExpr::LT: Result = LHS < RHS; break; + case AsmBinaryExpr::LTE: Result = LHS <= RHS; break; + case AsmBinaryExpr::Mod: Result = LHS % RHS; break; + case AsmBinaryExpr::Mul: Result = LHS * RHS; break; + case AsmBinaryExpr::NE: Result = LHS != RHS; break; + case AsmBinaryExpr::Or: Result = LHS | RHS; break; + case AsmBinaryExpr::Shl: Result = LHS << RHS; break; + case AsmBinaryExpr::Shr: Result = LHS >> RHS; break; + case AsmBinaryExpr::Sub: Result = LHS - RHS; break; + case AsmBinaryExpr::Xor: Result = LHS ^ RHS; break; } + Res = MCValue::get(Result); return true; } } Modified: llvm/trunk/tools/llvm-mc/AsmExpr.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/AsmExpr.h?rev=74496&r1=74495&r2=74496&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/AsmExpr.h (original) +++ llvm/trunk/tools/llvm-mc/AsmExpr.h Mon Jun 29 20:49:52 2009 @@ -16,6 +16,7 @@ namespace llvm { class MCContext; class MCSymbol; +class MCValue; class AsmExpr { public: @@ -39,10 +40,17 @@ /// EvaluateAsAbsolute - Try to evaluate the expression to an absolute value. /// - /// @param Res - The absolute value if evaluation succeeds. + /// @param Res - The absolute value, if evaluation succeeds. /// @result - True on success. bool EvaluateAsAbsolute(MCContext &Ctx, int64_t &Res) const; + /// EvaluateAsRelocatable - Try to evaluate the expression to a relocatable + /// value. + /// + /// @param Res - The relocatable value, if evaluation succeeds. + /// @result - True on success. + bool EvaluateAsRelocatable(MCContext &Ctx, MCValue &Res) const; + static bool classof(const AsmExpr *) { return true; } }; Modified: llvm/trunk/tools/llvm-mc/AsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/AsmParser.cpp?rev=74496&r1=74495&r2=74496&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/AsmParser.cpp (original) +++ llvm/trunk/tools/llvm-mc/AsmParser.cpp Mon Jun 29 20:49:52 2009 @@ -153,6 +153,18 @@ return false; } +bool AsmParser::ParseRelocatableExpression(MCValue &Res) { + AsmExpr *Expr; + + if (ParseExpression(Expr)) + return true; + + if (!Expr->EvaluateAsRelocatable(Ctx, Res)) + return TokError("expected relocatable expression"); + + return false; +} + static unsigned getBinOpPrecedence(asmtok::TokKind K, AsmBinaryExpr::Opcode &Kind) { switch (K) { Modified: llvm/trunk/tools/llvm-mc/AsmParser.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/AsmParser.h?rev=74496&r1=74495&r2=74496&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/AsmParser.h (original) +++ llvm/trunk/tools/llvm-mc/AsmParser.h Mon Jun 29 20:49:52 2009 @@ -22,7 +22,8 @@ class MCContext; class MCInst; class MCStreamer; - +class MCValue; + class AsmParser { AsmLexer Lexer; MCContext &Ctx; @@ -53,15 +54,23 @@ /// @param Res - The resulting expression. The pointer value is null on error. /// @result - False on success. bool ParseExpression(AsmExpr *&Res); - - /// ParseAbsoluteExpr - Parse an expression which must evaluate to an absolute - /// value. + + /// ParseAbsoluteExpression - Parse an expression which must evaluate to an + /// absolute value. /// /// @param Res - The value of the absolute expression. The result is undefined /// on error. /// @result - False on success. bool ParseAbsoluteExpression(int64_t &Res); + /// ParseRelocatableExpression - Parse an expression which must be + /// relocatable. + /// + /// @param Res - The relocatable expression value. The result is undefined on + /// error. + /// @result - False on success. + bool ParseRelocatableExpression(MCValue &Res); + bool ParsePrimaryExpr(AsmExpr *&Res); bool ParseBinOpRHS(unsigned Precedence, AsmExpr *&Res); bool ParseParenExpr(AsmExpr *&Res); From daniel at zuster.org Mon Jun 29 21:08:27 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Tue, 30 Jun 2009 02:08:27 -0000 Subject: [llvm-commits] [llvm] r74497 - /llvm/trunk/tools/llvm-mc/AsmExpr.cpp Message-ID: <200906300208.n5U28RiM010039@zion.cs.uiuc.edu> Author: ddunbar Date: Mon Jun 29 21:08:27 2009 New Revision: 74497 URL: http://llvm.org/viewvc/llvm-project?rev=74497&view=rev Log: llvm-mc: Rewrite binary subtraction for relocatable expressions, we can't always legally negate an MCValue. Modified: llvm/trunk/tools/llvm-mc/AsmExpr.cpp Modified: llvm/trunk/tools/llvm-mc/AsmExpr.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/AsmExpr.cpp?rev=74497&r1=74496&r2=74497&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/AsmExpr.cpp (original) +++ llvm/trunk/tools/llvm-mc/AsmExpr.cpp Mon Jun 29 21:08:27 2009 @@ -26,6 +26,29 @@ return true; } +static bool EvaluateSymbolicAdd(const MCValue &LHS, MCSymbol *RHS_A, + MCSymbol *RHS_B, int64_t RHS_Cst, + MCValue &Res) { + // We can't add or subtract two symbols. + if ((LHS.getSymA() && RHS_A) || + (LHS.getSymB() && RHS_B)) + return false; + + MCSymbol *A = LHS.getSymA() ? LHS.getSymA() : RHS_A; + MCSymbol *B = LHS.getSymB() ? LHS.getSymB() : RHS_B; + if (B) { + // If we have a negated symbol, then we must have also have a + // non-negated symbol, and both symbols must be in the same + // non-external section. We can do this check later to permit + // expressions which eventually fold to a representable form -- such + // as (a + (0 - b)) -- if necessary. + if (!A || !A->getSection() || A->getSection() != B->getSection()) + return false; + } + Res = MCValue::get(A, B, LHS.getConstant() + RHS_Cst); + return true; +} + bool AsmExpr::EvaluateAsRelocatable(MCContext &Ctx, MCValue &Res) const { switch (getKind()) { default: @@ -92,33 +115,17 @@ default: return false; case AsmBinaryExpr::Sub: - // Negate RHS and fall through. - RHSValue = MCValue::get(RHSValue.getSymB(), RHSValue.getSymA(), - -RHSValue.getConstant()); - case AsmBinaryExpr::Add: - // (a_0 - b_0 + cst_0) + (a_1 - b_1 + cst_1) + // Negate RHS and add. + return EvaluateSymbolicAdd(LHSValue, + RHSValue.getSymB(), RHSValue.getSymA(), + -RHSValue.getConstant(), + Res); - // We can't add or subtract two symbols. - if ((LHSValue.getSymA() && RHSValue.getSymB()) || - (LHSValue.getSymB() && RHSValue.getSymB())) - return false; - - MCSymbol *A = - LHSValue.getSymA() ? LHSValue.getSymA() : RHSValue.getSymA(); - MCSymbol *B = - LHSValue.getSymB() ? LHSValue.getSymB() : RHSValue.getSymB(); - if (B) { - // If we have a negated symbol, then we must have also have a - // non-negated symbol, and both symbols must be in the same - // non-external section. We can do this check later to permit - // expressions which eventually fold to a representable form -- such - // as (a + (0 - b)) -- if necessary. - if (!A || !A->getSection() || A->getSection() != B->getSection()) - return false; - } - Res = MCValue::get(A, B, - LHSValue.getConstant() + RHSValue.getConstant()); - return true; + case AsmBinaryExpr::Add: + return EvaluateSymbolicAdd(LHSValue, + RHSValue.getSymA(), RHSValue.getSymB(), + RHSValue.getConstant(), + Res); } } From daniel at zuster.org Mon Jun 29 21:10:03 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Tue, 30 Jun 2009 02:10:03 -0000 Subject: [llvm-commits] [llvm] r74498 - in /llvm/trunk: test/MC/AsmParser/exprs.s tools/llvm-mc/AsmParser.cpp Message-ID: <200906300210.n5U2A30Y010150@zion.cs.uiuc.edu> Author: ddunbar Date: Mon Jun 29 21:10:03 2009 New Revision: 74498 URL: http://llvm.org/viewvc/llvm-project?rev=74498&view=rev Log: llvm-mc: Accept relocatable expressions for .org, assignments, .byte, etc. Modified: llvm/trunk/test/MC/AsmParser/exprs.s llvm/trunk/tools/llvm-mc/AsmParser.cpp Modified: llvm/trunk/test/MC/AsmParser/exprs.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AsmParser/exprs.s?rev=74498&r1=74497&r2=74498&view=diff ============================================================================== --- llvm/trunk/test/MC/AsmParser/exprs.s (original) +++ llvm/trunk/test/MC/AsmParser/exprs.s Mon Jun 29 21:10:03 2009 @@ -3,7 +3,13 @@ // greps). // RUN: llvm-mc %s > %t - + + .text +g: +h: +j: +k: + .data .byte !1 + 2 .byte !0 .byte ~0 @@ -36,4 +42,14 @@ .set c, 10 .byte c + 1 + + d = e + 10 + .long d + + f = g - h + 5 + .long f + + i = (j + 10) - (k + 2) + .long i + \ No newline at end of file Modified: llvm/trunk/tools/llvm-mc/AsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/AsmParser.cpp?rev=74498&r1=74497&r2=74498&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/AsmParser.cpp (original) +++ llvm/trunk/tools/llvm-mc/AsmParser.cpp Mon Jun 29 21:10:03 2009 @@ -144,11 +144,12 @@ bool AsmParser::ParseAbsoluteExpression(int64_t &Res) { AsmExpr *Expr; + SMLoc StartLoc = Lexer.getLoc(); if (ParseExpression(Expr)) return true; if (!Expr->EvaluateAsAbsolute(Ctx, Res)) - return TokError("expected absolute expression"); + return Error(StartLoc, "expected absolute expression"); return false; } @@ -156,11 +157,12 @@ bool AsmParser::ParseRelocatableExpression(MCValue &Res) { AsmExpr *Expr; + SMLoc StartLoc = Lexer.getLoc(); if (ParseExpression(Expr)) return true; if (!Expr->EvaluateAsRelocatable(Ctx, Res)) - return TokError("expected relocatable expression"); + return Error(StartLoc, "expected relocatable expression"); return false; } @@ -525,8 +527,8 @@ // FIXME: Use better location, we should use proper tokens. SMLoc EqualLoc = Lexer.getLoc(); - int64_t Value; - if (ParseAbsoluteExpression(Value)) + MCValue Value; + if (ParseRelocatableExpression(Value)) return true; if (Lexer.isNot(asmtok::EndOfStatement)) @@ -549,7 +551,7 @@ return Error(EqualLoc, "invalid assignment to external symbol"); // Do the assignment. - Out.EmitAssignment(Sym, MCValue::get(Value), IsDotSet); + Out.EmitAssignment(Sym, Value, IsDotSet); return false; } @@ -651,11 +653,11 @@ bool AsmParser::ParseDirectiveValue(unsigned Size) { if (Lexer.isNot(asmtok::EndOfStatement)) { for (;;) { - int64_t Expr; - if (ParseAbsoluteExpression(Expr)) + MCValue Expr; + if (ParseRelocatableExpression(Expr)) return true; - Out.EmitValue(MCValue::get(Expr), Size); + Out.EmitValue(Expr, Size); if (Lexer.is(asmtok::EndOfStatement)) break; @@ -746,8 +748,8 @@ /// ParseDirectiveOrg /// ::= .org expression [ , expression ] bool AsmParser::ParseDirectiveOrg() { - int64_t Offset; - if (ParseAbsoluteExpression(Offset)) + MCValue Offset; + if (ParseRelocatableExpression(Offset)) return true; // Parse optional fill expression. @@ -765,8 +767,10 @@ } Lexer.Lex(); - - Out.EmitValueToOffset(MCValue::get(Offset), FillExpr); + + // FIXME: Only limited forms of relocatable expressions are accepted here, it + // has to be relative to the current section. + Out.EmitValueToOffset(Offset, FillExpr); return false; } From andreas.bolka at gmx.net Mon Jun 29 21:11:02 2009 From: andreas.bolka at gmx.net (Andreas Bolka) Date: Tue, 30 Jun 2009 04:11:02 +0200 Subject: [llvm-commits] [llvm] r74451 - in /llvm/trunk: test/Analysis/LoopDependenceAnalysis/ unittests/ExecutionEngine/JIT/ In-Reply-To: <200906292041.n5TKfSrB030916@zion.cs.uiuc.edu> References: <200906292041.n5TKfSrB030916@zion.cs.uiuc.edu> Message-ID: <1246327761-sup-8433@strider> On Mon Jun 29 20:41:28 UTC 2009, Daniel Dunbar wrote: > Author: ddunbar > Date: Mon Jun 29 15:41:28 2009 > New Revision: 74451 > > URL: http://llvm.org/viewvc/llvm-project?rev=74451&view=rev > Log: > Set some svn:ignore props > > Modified: > llvm/trunk/test/Analysis/LoopDependenceAnalysis/ (props changed) > llvm/trunk/unittests/ExecutionEngine/JIT/ (props changed) Thanks! -- Andreas From a at bolka.at Mon Jun 29 21:12:11 2009 From: a at bolka.at (Andreas Bolka) Date: Tue, 30 Jun 2009 02:12:11 -0000 Subject: [llvm-commits] [llvm] r74499 - in /llvm/trunk: lib/Analysis/LoopDependenceAnalysis.cpp test/Analysis/LoopDependenceAnalysis/local-array.ll test/Analysis/LoopDependenceAnalysis/no-array.ll test/Analysis/LoopDependenceAnalysis/siv-strong1.ll test/Analysis/LoopDependenceAnalysis/siv-strong2.ll Message-ID: <200906300212.n5U2CBSE010249@zion.cs.uiuc.edu> Author: abolka Date: Mon Jun 29 21:12:10 2009 New Revision: 74499 URL: http://llvm.org/viewvc/llvm-project?rev=74499&view=rev Log: Array accesses are independent if the underlying arrays differ. Added: llvm/trunk/test/Analysis/LoopDependenceAnalysis/local-array.ll llvm/trunk/test/Analysis/LoopDependenceAnalysis/no-array.ll Modified: llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-strong1.ll llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-strong2.ll Modified: llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp?rev=74499&r1=74498&r2=74499&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp (original) +++ llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp Mon Jun 29 21:12:10 2009 @@ -22,6 +22,7 @@ #include "llvm/Analysis/LoopPass.h" #include "llvm/Analysis/ScalarEvolution.h" #include "llvm/Instructions.h" +#include "llvm/Support/Debug.h" using namespace llvm; LoopPass *llvm::createLoopDependenceAnalysisPass() { @@ -51,6 +52,20 @@ memrefs.push_back(i); } +static bool IsLoadOrStoreInst(Value *I) { + return isa(I) || isa(I); +} + +static Value *GetPointerOperand(Value *I) { + if (LoadInst *i = dyn_cast(I)) + return i->getPointerOperand(); + if (StoreInst *i = dyn_cast(I)) + return i->getPointerOperand(); + assert(0 && "Value is no load or store instruction!"); + // Never reached. + return 0; +} + //===----------------------------------------------------------------------===// // Dependence Testing //===----------------------------------------------------------------------===// @@ -65,6 +80,38 @@ bool LoopDependenceAnalysis::depends(Value *src, Value *dst) { assert(isDependencePair(src, dst) && "Values form no dependence pair!"); + DOUT << "== LDA test ==\n" << *src << *dst; + + // We only analyse loads and stores; for possible memory accesses by e.g. + // free, call, or invoke instructions we conservatively assume dependence. + if (!IsLoadOrStoreInst(src) || !IsLoadOrStoreInst(dst)) + return true; + + Value *srcPtr = GetPointerOperand(src); + Value *dstPtr = GetPointerOperand(dst); + const Value *srcObj = srcPtr->getUnderlyingObject(); + const Value *dstObj = dstPtr->getUnderlyingObject(); + const Type *srcTy = srcObj->getType(); + const Type *dstTy = dstObj->getType(); + + // For now, we only work on (pointers to) global or stack-allocated array + // values, as we know that their underlying memory areas will not overlap. + // MAYBE: relax this and test for aliasing? + if (!((isa(srcObj) || isa(srcObj)) && + (isa(dstObj) || isa(dstObj)) && + isa(srcTy) && + isa(dstTy) && + isa(cast(srcTy)->getElementType()) && + isa(cast(dstTy)->getElementType()))) + return true; + + // If the arrays are different, the underlying memory areas do not overlap + // and the memory accesses are therefore independent. + if (srcObj != dstObj) + return false; + + // We couldn't establish a more precise result, so we have to conservatively + // assume full dependence. return true; } Added: llvm/trunk/test/Analysis/LoopDependenceAnalysis/local-array.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/LoopDependenceAnalysis/local-array.ll?rev=74499&view=auto ============================================================================== --- llvm/trunk/test/Analysis/LoopDependenceAnalysis/local-array.ll (added) +++ llvm/trunk/test/Analysis/LoopDependenceAnalysis/local-array.ll Mon Jun 29 21:12:10 2009 @@ -0,0 +1,24 @@ +; RUN: llvm-as < %s | opt -disable-output -analyze -lda > %t +; RUN: grep {instructions: 2} %t | count 1 +; RUN: grep {0,1: dependent} %t | count 1 + +; x[5] = x[6] // with x being an array on the stack + +define void @foo(...) nounwind { +entry: + %xptr = alloca [256 x i32], align 4 + %x.ld.addr = getelementptr [256 x i32]* %xptr, i64 0, i64 6 + %x.st.addr = getelementptr [256 x i32]* %xptr, i64 0, i64 5 + br label %for.body + +for.body: + %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ] + %x = load i32* %x.ld.addr + store i32 %x, i32* %x.st.addr + %i.next = add i64 %i, 1 + %exitcond = icmp eq i64 %i.next, 256 + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret void +} Added: llvm/trunk/test/Analysis/LoopDependenceAnalysis/no-array.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/LoopDependenceAnalysis/no-array.ll?rev=74499&view=auto ============================================================================== --- llvm/trunk/test/Analysis/LoopDependenceAnalysis/no-array.ll (added) +++ llvm/trunk/test/Analysis/LoopDependenceAnalysis/no-array.ll Mon Jun 29 21:12:10 2009 @@ -0,0 +1,23 @@ +; RUN: llvm-as < %s | opt -disable-output -analyze -lda > %t +; RUN: grep {instructions: 2} %t | count 1 +; RUN: grep {0,1: dependent} %t | count 1 + +; x[5] = x[6] // with x being a pointer passed as argument + +define void @foo(i32* nocapture %xptr) nounwind { +entry: + %x.ld.addr = getelementptr i32* %xptr, i64 6 + %x.st.addr = getelementptr i32* %xptr, i64 5 + br label %for.body + +for.body: + %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ] + %x = load i32* %x.ld.addr + store i32 %x, i32* %x.st.addr + %i.next = add i64 %i, 1 + %exitcond = icmp eq i64 %i.next, 256 + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret void +} Modified: llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-strong1.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-strong1.ll?rev=74499&r1=74498&r2=74499&view=diff ============================================================================== --- llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-strong1.ll (original) +++ llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-strong1.ll Mon Jun 29 21:12:10 2009 @@ -1,7 +1,7 @@ ; RUN: llvm-as < %s | opt -disable-output -analyze -lda > %t ; RUN: grep {instructions: 3} %t | count 1 ; RUN: grep {0,2: dependent} %t | count 1 -; RUN: grep {1,2: dependent} %t | count 1 +; RUN: grep {1,2: independent} %t | count 1 ; for (i = 0; i < 256; i++) ; x[i] = x[i] + y[i] Modified: llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-strong2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-strong2.ll?rev=74499&r1=74498&r2=74499&view=diff ============================================================================== --- llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-strong2.ll (original) +++ llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-strong2.ll Mon Jun 29 21:12:10 2009 @@ -1,7 +1,7 @@ ; RUN: llvm-as < %s | opt -disable-output -analyze -lda > %t ; RUN: grep {instructions: 3} %t | count 1 ; RUN: grep {0,2: dependent} %t | count 1 -; RUN: grep {1,2: dependent} %t | count 1 +; RUN: grep {1,2: independent} %t | count 1 ; for (i = 0; i < 256; i++) ; x[i+1] = x[i] + y[i] From evan.cheng at apple.com Mon Jun 29 21:15:48 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 30 Jun 2009 02:15:48 -0000 Subject: [llvm-commits] [llvm] r74500 - in /llvm/trunk: lib/Target/ARM/ARMInstrFormats.td lib/Target/ARM/ARMInstrInfo.h lib/Target/ARM/ARMInstrThumb.td lib/Target/ARM/ARMInstrThumb2.td test/CodeGen/Thumb2/thumb2-ldr_ext.ll test/CodeGen/Thumb2/thumb2-ldrb.ll test/CodeGen/Thumb2/thumb2-ldrh.ll Message-ID: <200906300215.n5U2FmKF010366@zion.cs.uiuc.edu> Author: evancheng Date: Mon Jun 29 21:15:48 2009 New Revision: 74500 URL: http://llvm.org/viewvc/llvm-project?rev=74500&view=rev Log: A few more load instructions. Added: llvm/trunk/test/CodeGen/Thumb2/thumb2-ldr_ext.ll llvm/trunk/test/CodeGen/Thumb2/thumb2-ldrb.ll llvm/trunk/test/CodeGen/Thumb2/thumb2-ldrh.ll Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td llvm/trunk/lib/Target/ARM/ARMInstrInfo.h llvm/trunk/lib/Target/ARM/ARMInstrThumb.td llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=74500&r1=74499&r2=74500&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Mon Jun 29 21:15:48 2009 @@ -79,7 +79,8 @@ def AddrModeT2_i12: AddrMode<10>; def AddrModeT2_i8 : AddrMode<11>; def AddrModeT2_so : AddrMode<12>; -def AddrModeT2_pc : AddrMode<13>; +def AddrModeT2_pc : AddrMode<13>; +def AddrModeT2_i8s4 : AddrMode<14>; // Instruction size. class SizeFlagVal val> { @@ -856,6 +857,8 @@ : Thumb2I; class T2Ipc pattern> : Thumb2I; +class T2Ii8s4 pattern> + : Thumb2I; class T2sI pattern> : Thumb2sI; Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.h?rev=74500&r1=74499&r2=74500&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.h (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.h Mon Jun 29 21:15:48 2009 @@ -33,20 +33,21 @@ // This four-bit field describes the addressing mode used. AddrModeMask = 0xf, - AddrModeNone = 0, - AddrMode1 = 1, - AddrMode2 = 2, - AddrMode3 = 3, - AddrMode4 = 4, - AddrMode5 = 5, - AddrModeT1_1 = 6, - AddrModeT1_2 = 7, - AddrModeT1_4 = 8, - AddrModeT1_s = 9, // i8 * 4 for pc and sp relative data - AddrModeT2_i12= 10, - AddrModeT2_i8 = 11, - AddrModeT2_so = 12, - AddrModeT2_pc = 13, // +/- i12 for pc relative data + AddrModeNone = 0, + AddrMode1 = 1, + AddrMode2 = 2, + AddrMode3 = 3, + AddrMode4 = 4, + AddrMode5 = 5, + AddrModeT1_1 = 6, + AddrModeT1_2 = 7, + AddrModeT1_4 = 8, + AddrModeT1_s = 9, // i8 * 4 for pc and sp relative data + AddrModeT2_i12 = 10, + AddrModeT2_i8 = 11, + AddrModeT2_so = 12, + AddrModeT2_pc = 13, // +/- i12 for pc relative data + AddrModeT2_i8s4 = 14, // i8 * 4 // Size* - Flags to keep track of the size of an instruction. SizeShift = 4, Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb.td?rev=74500&r1=74499&r2=74500&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb.td Mon Jun 29 21:15:48 2009 @@ -622,13 +622,13 @@ def : Tv5Pat<(ARMcall tGPR:$dst), (tBLXr tGPR:$dst)>; // zextload i1 -> zextload i8 -def : TPat<(zextloadi1 t_addrmode_s1:$addr), - (tLDRB t_addrmode_s1:$addr)>; +def : T1Pat<(zextloadi1 t_addrmode_s1:$addr), + (tLDRB t_addrmode_s1:$addr)>; // extload -> zextload -def : TPat<(extloadi1 t_addrmode_s1:$addr), (tLDRB t_addrmode_s1:$addr)>; -def : TPat<(extloadi8 t_addrmode_s1:$addr), (tLDRB t_addrmode_s1:$addr)>; -def : TPat<(extloadi16 t_addrmode_s2:$addr), (tLDRH t_addrmode_s2:$addr)>; +def : T1Pat<(extloadi1 t_addrmode_s1:$addr), (tLDRB t_addrmode_s1:$addr)>; +def : T1Pat<(extloadi8 t_addrmode_s1:$addr), (tLDRB t_addrmode_s1:$addr)>; +def : T1Pat<(extloadi16 t_addrmode_s2:$addr), (tLDRH t_addrmode_s2:$addr)>; // Large immediate handling. Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=74500&r1=74499&r2=74500&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Mon Jun 29 21:15:48 2009 @@ -136,7 +136,7 @@ let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm); } -// t2addrmode_imm8 := reg - imm8 +// t2addrmode_imm8 := reg - imm8 (also reg + imm8 for some instructions) def t2addrmode_imm8 : Operand, ComplexPattern { let PrintMethod = "printT2AddrModeImm8Operand"; @@ -383,6 +383,22 @@ } } +/// T2I_ld - Defines a set of (op r, {imm12|imm8|so_reg}) load patterns. +multiclass T2I_ld { + def i12 : T2Ii12<(outs GPR:$dst), (ins t2addrmode_imm12:$addr), + opc, " $dst, $addr", + [(set GPR:$dst, (opnode t2addrmode_imm12:$addr))]>; + def i8 : T2Ii8 <(outs GPR:$dst), (ins t2addrmode_imm8:$addr), + opc, " $dst, $addr", + [(set GPR:$dst, (opnode t2addrmode_imm8:$addr))]>; + def s : T2Iso <(outs GPR:$dst), (ins t2addrmode_so_reg:$addr), + opc, " $dst, $addr", + [(set GPR:$dst, (opnode t2addrmode_so_reg:$addr))]>; + def pci : T2Ipc <(outs GPR:$dst), (ins i32imm:$addr), + opc, " $dst, $addr", + [(set GPR:$dst, (opnode (ARMWrapper tconstpool:$addr)))]>; +} + //===----------------------------------------------------------------------===// // Instructions //===----------------------------------------------------------------------===// @@ -434,24 +450,64 @@ // // Load -let canFoldAsLoad = 1 in { -def t2LDRi12 : T2Ii12<(outs GPR:$dst), (ins t2addrmode_imm12:$addr), - "ldr", " $dst, $addr", - [(set GPR:$dst, (load t2addrmode_imm12:$addr))]>; - -def t2LDRi8 : T2Ii8<(outs GPR:$dst), (ins t2addrmode_imm8:$addr), - "ldr", " $dst, $addr", - [(set GPR:$dst, (load t2addrmode_imm8:$addr))]>; - -def t2LDRs : T2Iso<(outs GPR:$dst), (ins t2addrmode_so_reg:$addr), - "ldr", " $dst, $addr", - [(set GPR:$dst, (load t2addrmode_so_reg:$addr))]>; - -// Load tconstpool -def t2LDRpci : T2Ipc<(outs GPR:$dst), (ins i32imm:$addr), - "ldr", " $dst, $addr", - [(set GPR:$dst, (load (ARMWrapper tconstpool:$addr)))]>; -} // canFoldAsLoad +let canFoldAsLoad = 1 in +defm t2LDR : T2I_ld<"ldr", UnOpFrag<(load node:$Src)>>; + +// Loads with zero extension +defm t2LDRH : T2I_ld<"ldrh", UnOpFrag<(zextloadi16 node:$Src)>>; +defm t2LDRB : T2I_ld<"ldrb", UnOpFrag<(zextloadi8 node:$Src)>>; + +// Loads with sign extension +defm t2LDRSH : T2I_ld<"ldrsh", UnOpFrag<(sextloadi16 node:$Src)>>; +defm t2LDRSB : T2I_ld<"ldrsb", UnOpFrag<(sextloadi8 node:$Src)>>; + +let mayLoad = 1 in { +// Load doubleword +def t2LDRDi8 : T2Ii8s4<(outs GPR:$dst), (ins t2addrmode_imm8:$addr), + "ldrd", " $dst, $addr", []>; +def t2LDRDpci : T2Ii8s4<(outs GPR:$dst), (ins i32imm:$addr), + "ldrd", " $dst, $addr", []>; +} + +// zextload i1 -> zextload i8 +def : T2Pat<(zextloadi1 t2addrmode_imm12:$addr), + (t2LDRBi12 t2addrmode_imm12:$addr)>; +def : T2Pat<(zextloadi1 t2addrmode_imm8:$addr), + (t2LDRBi8 t2addrmode_imm8:$addr)>; +def : T2Pat<(zextloadi1 t2addrmode_so_reg:$addr), + (t2LDRBs t2addrmode_so_reg:$addr)>; +def : T2Pat<(zextloadi1 (ARMWrapper tconstpool:$addr)), + (t2LDRBpci tconstpool:$addr)>; + +// extload -> zextload +// FIXME: Reduce the number of patterns by legalizing extload to zextload +// earlier? +def : T2Pat<(extloadi1 t2addrmode_imm12:$addr), + (t2LDRBi12 t2addrmode_imm12:$addr)>; +def : T2Pat<(extloadi1 t2addrmode_imm8:$addr), + (t2LDRBi8 t2addrmode_imm8:$addr)>; +def : T2Pat<(extloadi1 t2addrmode_so_reg:$addr), + (t2LDRBs t2addrmode_so_reg:$addr)>; +def : T2Pat<(extloadi1 (ARMWrapper tconstpool:$addr)), + (t2LDRBpci tconstpool:$addr)>; + +def : T2Pat<(extloadi8 t2addrmode_imm12:$addr), + (t2LDRBi12 t2addrmode_imm12:$addr)>; +def : T2Pat<(extloadi8 t2addrmode_imm8:$addr), + (t2LDRBi8 t2addrmode_imm8:$addr)>; +def : T2Pat<(extloadi8 t2addrmode_so_reg:$addr), + (t2LDRBs t2addrmode_so_reg:$addr)>; +def : T2Pat<(extloadi8 (ARMWrapper tconstpool:$addr)), + (t2LDRBpci tconstpool:$addr)>; + +def : T2Pat<(extloadi16 t2addrmode_imm12:$addr), + (t2LDRHi12 t2addrmode_imm12:$addr)>; +def : T2Pat<(extloadi16 t2addrmode_imm8:$addr), + (t2LDRHi8 t2addrmode_imm8:$addr)>; +def : T2Pat<(extloadi16 t2addrmode_so_reg:$addr), + (t2LDRHs t2addrmode_so_reg:$addr)>; +def : T2Pat<(extloadi16 (ARMWrapper tconstpool:$addr)), + (t2LDRHpci tconstpool:$addr)>; //===----------------------------------------------------------------------===// // Move Instructions. Added: llvm/trunk/test/CodeGen/Thumb2/thumb2-ldr_ext.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-ldr_ext.ll?rev=74500&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-ldr_ext.ll (added) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-ldr_ext.ll Mon Jun 29 21:15:48 2009 @@ -0,0 +1,28 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep ldrb | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep ldrh | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep ldrsb | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep ldrsh | count 1 + +define i32 @test1(i8* %v.pntr.s0.u1) { + %tmp.u = load i8* %v.pntr.s0.u1 + %tmp1.s = zext i8 %tmp.u to i32 + ret i32 %tmp1.s +} + +define i32 @test2(i16* %v.pntr.s0.u1) { + %tmp.u = load i16* %v.pntr.s0.u1 + %tmp1.s = zext i16 %tmp.u to i32 + ret i32 %tmp1.s +} + +define i32 @test3(i8* %v.pntr.s1.u0) { + %tmp.s = load i8* %v.pntr.s1.u0 + %tmp1.s = sext i8 %tmp.s to i32 + ret i32 %tmp1.s +} + +define i32 @test4() { + %tmp.s = load i16* null + %tmp1.s = sext i16 %tmp.s to i32 + ret i32 %tmp1.s +} Added: llvm/trunk/test/CodeGen/Thumb2/thumb2-ldrb.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-ldrb.ll?rev=74500&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-ldrb.ll (added) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-ldrb.ll Mon Jun 29 21:15:48 2009 @@ -0,0 +1,60 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {ldrb r0} | count 7 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep mvn +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep ldrb | grep lsl +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep lsr | not grep ldrb + +define i8 @f1(i8* %v) { +entry: + %tmp = load i8* %v + ret i8 %tmp +} + +define i8 @f2(i8* %v) { +entry: + %tmp2 = getelementptr i8* %v, i8 1023 + %tmp = load i8* %tmp2 + ret i8 %tmp +} + +define i8 @f3(i32 %base) { +entry: + %tmp1 = add i32 %base, 4096 + %tmp2 = inttoptr i32 %tmp1 to i8* + %tmp3 = load i8* %tmp2 + ret i8 %tmp3 +} + +define i8 @f4(i32 %base) { +entry: + %tmp1 = sub i32 %base, 128 + %tmp2 = inttoptr i32 %tmp1 to i8* + %tmp3 = load i8* %tmp2 + ret i8 %tmp3 +} + +define i8 @f5(i32 %base, i32 %offset) { +entry: + %tmp1 = add i32 %base, %offset + %tmp2 = inttoptr i32 %tmp1 to i8* + %tmp3 = load i8* %tmp2 + ret i8 %tmp3 +} + +define i8 @f6(i32 %base, i32 %offset) { +entry: + %tmp1 = shl i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i8* + %tmp4 = load i8* %tmp3 + ret i8 %tmp4 +} + +define i8 @f7(i32 %base, i32 %offset) { +entry: + %tmp1 = lshr i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i8* + %tmp4 = load i8* %tmp3 + ret i8 %tmp4 +} Added: llvm/trunk/test/CodeGen/Thumb2/thumb2-ldrh.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-ldrh.ll?rev=74500&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-ldrh.ll (added) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-ldrh.ll Mon Jun 29 21:15:48 2009 @@ -0,0 +1,59 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {ldrh r0} | count 7 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep mov | grep 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep mvn +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep ldrh | grep lsl +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep lsr | not grep ldrh + +define i16 @f1(i16* %v) { +entry: + %tmp = load i16* %v + ret i16 %tmp +} + +define i16 @f2(i16* %v) { +entry: + %tmp2 = getelementptr i16* %v, i16 1023 + %tmp = load i16* %tmp2 + ret i16 %tmp +} + +define i16 @f3(i16* %v) { +entry: + %tmp2 = getelementptr i16* %v, i16 2048 + %tmp = load i16* %tmp2 + ret i16 %tmp +} + +define i16 @f4(i32 %base) { +entry: + %tmp1 = sub i32 %base, 128 + %tmp2 = inttoptr i32 %tmp1 to i16* + %tmp3 = load i16* %tmp2 + ret i16 %tmp3 +} + +define i16 @f5(i32 %base, i32 %offset) { +entry: + %tmp1 = add i32 %base, %offset + %tmp2 = inttoptr i32 %tmp1 to i16* + %tmp3 = load i16* %tmp2 + ret i16 %tmp3 +} + +define i16 @f6(i32 %base, i32 %offset) { +entry: + %tmp1 = shl i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i16* + %tmp4 = load i16* %tmp3 + ret i16 %tmp4 +} + +define i16 @f7(i32 %base, i32 %offset) { +entry: + %tmp1 = lshr i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i16* + %tmp4 = load i16* %tmp3 + ret i16 %tmp4 +} From eli.friedman at gmail.com Mon Jun 29 22:47:25 2009 From: eli.friedman at gmail.com (Eli Friedman) Date: Mon, 29 Jun 2009 20:47:25 -0700 Subject: [llvm-commits] [llvm] r74499 - in /llvm/trunk: lib/Analysis/LoopDependenceAnalysis.cpp test/Analysis/LoopDependenceAnalysis/local-array.ll test/Analysis/LoopDependenceAnalysis/no-array.ll test/Analysis/LoopDependenceAnalysis/siv-strong1.ll test/A Message-ID: On Mon, Jun 29, 2009 at 7:12 PM, Andreas Bolka wrote: > + ?// For now, we only work on (pointers to) global or stack-allocated array > + ?// values, as we know that their underlying memory areas will not overlap. > + ?// MAYBE: relax this and test for aliasing? > + ?if (!((isa(srcObj) || isa(srcObj)) && > + ? ? ? ?(isa(dstObj) || isa(dstObj)) && > + ? ? ? ?isa(srcTy) && > + ? ? ? ?isa(dstTy) && > + ? ? ? ?isa(cast(srcTy)->getElementType()) && > + ? ? ? ?isa(cast(dstTy)->getElementType()))) > + ? ?return true; How does the type affect aliasing? -Eli From isanbard at gmail.com Mon Jun 29 23:07:12 2009 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 30 Jun 2009 04:07:12 -0000 Subject: [llvm-commits] [llvm] r74507 - in /llvm/trunk/lib/CompilerDriver: Action.cpp CompilationGraph.cpp Main.cpp Message-ID: <200906300407.n5U47DmP013834@zion.cs.uiuc.edu> Author: void Date: Mon Jun 29 23:07:12 2009 New Revision: 74507 URL: http://llvm.org/viewvc/llvm-project?rev=74507&view=rev Log: #include is forbidden. Remove it in favor of raw_ostream. Modified: llvm/trunk/lib/CompilerDriver/Action.cpp llvm/trunk/lib/CompilerDriver/CompilationGraph.cpp llvm/trunk/lib/CompilerDriver/Main.cpp Modified: llvm/trunk/lib/CompilerDriver/Action.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CompilerDriver/Action.cpp?rev=74507&r1=74506&r2=74507&view=diff ============================================================================== --- llvm/trunk/lib/CompilerDriver/Action.cpp (original) +++ llvm/trunk/lib/CompilerDriver/Action.cpp Mon Jun 29 23:07:12 2009 @@ -13,10 +13,8 @@ #include "llvm/CompilerDriver/Action.h" #include "llvm/CompilerDriver/BuiltinOptions.h" - +#include "llvm/Support/raw_ostream.h" #include "llvm/System/Program.h" - -#include #include using namespace llvm; @@ -58,15 +56,15 @@ } void print_string (const std::string& str) { - std::cerr << str << ' '; + errs() << str << ' '; } } int llvmc::Action::Execute() const { if (DryRun || VerboseMode) { - std::cerr << Command_ << " "; + errs() << Command_ << " "; std::for_each(Args_.begin(), Args_.end(), print_string); - std::cerr << '\n'; + errs() << '\n'; } if (DryRun) return 0; Modified: llvm/trunk/lib/CompilerDriver/CompilationGraph.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CompilerDriver/CompilationGraph.cpp?rev=74507&r1=74506&r2=74507&view=diff ============================================================================== --- llvm/trunk/lib/CompilerDriver/CompilationGraph.cpp (original) +++ llvm/trunk/lib/CompilerDriver/CompilationGraph.cpp Mon Jun 29 23:07:12 2009 @@ -18,10 +18,10 @@ #include "llvm/ADT/STLExtras.h" #include "llvm/Support/DOTGraphTraits.h" #include "llvm/Support/GraphWriter.h" +#include "llvm/Support/raw_ostream.h" #include #include -#include #include #include #include @@ -346,8 +346,8 @@ if (!N2.ToolPtr) { ++ret; - std::cerr << "Error: there is an edge from '" << N1.ToolPtr->Name() - << "' back to the root!\n\n"; + errs() << "Error: there is an edge from '" << N1.ToolPtr->Name() + << "' back to the root!\n\n"; continue; } @@ -363,17 +363,17 @@ if (!eq) { ++ret; - std::cerr << "Error: Output->input language mismatch in the edge '" << - N1.ToolPtr->Name() << "' -> '" << N2.ToolPtr->Name() << "'!\n"; - - std::cerr << "Expected one of { "; + errs() << "Error: Output->input language mismatch in the edge '" + << N1.ToolPtr->Name() << "' -> '" << N2.ToolPtr->Name() + << "'!\n" + << "Expected one of { "; InLangs = N2.ToolPtr->InputLanguages(); for (;*InLangs; ++InLangs) { - std::cerr << '\'' << *InLangs << (*(InLangs+1) ? "', " : "'"); + errs() << '\'' << *InLangs << (*(InLangs+1) ? "', " : "'"); } - std::cerr << " }, but got '" << OutLang << "'!\n\n"; + errs() << " }, but got '" << OutLang << "'!\n\n"; } } @@ -406,9 +406,8 @@ } else if (EdgeWeight == MaxWeight) { ++ret; - std::cerr - << "Error: there are multiple maximal edges stemming from the '" - << N.ToolPtr->Name() << "' node!\n\n"; + errs() << "Error: there are multiple maximal edges stemming from the '" + << N.ToolPtr->Name() << "' node!\n\n"; break; } } @@ -440,9 +439,9 @@ } if (deleted != NodesMap.size()) { - std::cerr << "Error: there are cycles in the compilation graph!\n" - << "Try inspecting the diagram produced by " - "'llvmc --view-graph'.\n\n"; + errs() << "Error: there are cycles in the compilation graph!\n" + << "Try inspecting the diagram produced by " + << "'llvmc --view-graph'.\n\n"; return 1; } @@ -518,9 +517,9 @@ std::ofstream O(OutputFilename.c_str()); if (O.good()) { - std::cerr << "Writing '"<< OutputFilename << "' file..."; + errs() << "Writing '"<< OutputFilename << "' file..."; llvm::WriteGraph(O, this); - std::cerr << "done.\n"; + errs() << "done.\n"; O.close(); } else { Modified: llvm/trunk/lib/CompilerDriver/Main.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CompilerDriver/Main.cpp?rev=74507&r1=74506&r2=74507&view=diff ============================================================================== --- llvm/trunk/lib/CompilerDriver/Main.cpp (original) +++ llvm/trunk/lib/CompilerDriver/Main.cpp Mon Jun 29 23:07:12 2009 @@ -16,9 +16,9 @@ #include "llvm/CompilerDriver/Error.h" #include "llvm/CompilerDriver/Plugin.h" +#include "llvm/Support/raw_ostream.h" #include "llvm/System/Path.h" -#include #include #include @@ -91,7 +91,7 @@ if (CheckGraph) { int ret = graph.Check(); if (!ret) - std::cerr << "check-graph: no errors found.\n"; + llvm::errs() << "check-graph: no errors found.\n"; return ret; } @@ -119,10 +119,10 @@ return ec.code(); } catch(const std::exception& ex) { - std::cerr << argv[0] << ": " << ex.what() << '\n'; + llvm::errs() << argv[0] << ": " << ex.what() << '\n'; } catch(...) { - std::cerr << argv[0] << ": unknown error!\n"; + llvm::errs() << argv[0] << ": unknown error!\n"; } return 1; } From dgregor at apple.com Mon Jun 29 11:25:23 2009 From: dgregor at apple.com (Douglas Gregor) Date: Mon, 29 Jun 2009 16:25:23 -0000 Subject: [llvm-commits] [llvm] r74426 - /llvm/trunk/cmake/config-ix.cmake Message-ID: <200906291625.n5TGPNSG022808@zion.cs.uiuc.edu> Author: dgregor Date: Mon Jun 29 11:25:22 2009 New Revision: 74426 URL: http://llvm.org/viewvc/llvm-project?rev=74426&view=rev Log: Fix CMake checks for pthread_getspecific and pthread_rwlock_init, from Xerxes Ranby Modified: llvm/trunk/cmake/config-ix.cmake Modified: llvm/trunk/cmake/config-ix.cmake URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/cmake/config-ix.cmake?rev=74426&r1=74425&r2=74426&view=diff ============================================================================== --- llvm/trunk/cmake/config-ix.cmake (original) +++ llvm/trunk/cmake/config-ix.cmake Mon Jun 29 11:25:22 2009 @@ -44,6 +44,8 @@ # library checks include(CheckLibraryExists) check_library_exists(pthread pthread_create "" HAVE_LIBPTHREAD) +check_library_exists(pthread pthread_getspecific "" HAVE_PTHREAD_GETSPECIFIC) +check_library_exists(pthread pthread_rwlock_init "" HAVE_PTHREAD_RWLOCK_INIT) check_library_exists(dl dlopen "" HAVE_LIBDL) # function checks @@ -64,8 +66,6 @@ check_symbol_exists(malloc_zone_statistics malloc/malloc.h HAVE_MALLOC_ZONE_STATISTICS) check_symbol_exists(pthread_mutex_lock pthread.h HAVE_PTHREAD_MUTEX_LOCK) -check_symbol_exists(pthread_rwlock_init pthread.h HAVE_PTHREAD_RWLOCK_INIT) -check_symbol_exists(pthread_getspecific pthread.h HAVE_PTHREAD_GETSPECIFIC) check_symbol_exists(strtoll stdlib.h HAVE_STRTOLL) check_symbol_exists(__GLIBC__ stdio.h LLVM_USING_GLIBC) From dgregor at apple.com Mon Jun 29 11:28:03 2009 From: dgregor at apple.com (Douglas Gregor) Date: Mon, 29 Jun 2009 09:28:03 -0700 Subject: [llvm-commits] [llvm] r74284 - in /llvm/trunk: cmake/config-ix.cmake include/llvm/Config/config.h.cmake - cmake bug? In-Reply-To: <4A450A7C.6020009@zafena.se> References: <200906261435.n5QEZiEn011654@zion.cs.uiuc.edu> <4A450A7C.6020009@zafena.se> Message-ID: <48F32CDD-90A7-4923-93D2-570913D50CCE@apple.com> On Jun 26, 2009, at 10:50 AM, Xerxes R?nby wrote: > Hi Doug. > > Im having some issues with these two test when implemented using > check_symbol_exists(), they both fail when they should not. > cd llvm > svn up > cd .. > mkdir llvm-build > cd llvm-build > cmake ../llvm > ... > -- Looking for pthread_create in pthread > -- Looking for pthread_create in pthread - found > ... > -- Looking for pthread_mutex_lock > -- Looking for pthread_mutex_lock - found > -- Looking for pthread_rwlock_init > -- Looking for pthread_rwlock_init - not found. > -- Looking for pthread_getspecific > -- Looking for pthread_getspecific - not found. > > if i change config-ix.cmake to use check_library_exists() for the > tests then they both succeed on the same machine: > > -- Looking for pthread_create in pthread > -- Looking for pthread_create in pthread - found > -- Looking for pthread_getspecific in pthread > -- Looking for pthread_getspecific in pthread - found > -- Looking for pthread_rwlock_init in pthread > -- Looking for pthread_rwlock_init in pthread - found > ... > -- Looking for pthread_mutex_lock > -- Looking for pthread_mutex_lock - found > > Im a bit puzzled why check_symbol_exists() dont seem to work for > these two tests while working to find pthread_mutex_lock. > Could this be a cmake bug? No, it was my bug. By default, check_symbol_exists only looks in those libraries that are automatically linked into an executable. I should have set CMAKE_REQUIRED_LIBRARIES to include pthread. On my platform, pthread libraries are automatically linked in, so it magically worked. Thanks for the fix! I've committed it in r74426. - Doug From the.dead.shall.rise at gmail.com Mon Jun 29 12:27:32 2009 From: the.dead.shall.rise at gmail.com (Mikhail Glushenkov) Date: Mon, 29 Jun 2009 17:27:32 +0000 (UTC) Subject: [llvm-commits] =?utf-8?q?=5Bllvm=5D_r74417_-_in_/llvm/trunk=3A_Ma?= =?utf-8?q?kefile=2Erules=09include/llvm/CompilerDriver/Main=2Einc?= =?utf-8?q?=09lib/CompilerDriver/BuiltinOptions=2Ecpp=09lib/Compile?= =?utf-8?q?rDriver/Makefile_lib/CompilerDriver/Tool=2Ecpp?= References: <200906290309.n5T39LPo015790@zion.cs.uiuc.edu> Message-ID: Hi, Howard Su writes: > > > Great. I can now wait to try. How can I compile a pass as a DLL? I guess that you are thinking about *opt* plugins, but this was a *llvmc* commit. Anyway, to compile a dynamic *llvmc* plugin, just cd to the plugin directory and run make. $ cd tools/llvmc/plugins/Base $ make $ cd ../../example/Skeleton $ make $ llvmc-skeleton -load $LLVM_DIR/Release/lib/plugin_llvmc_Base.dll --help > Can you include a sample CMakefile? No, I don't use cmake. From sabre at nondot.org Mon Jun 29 23:20:47 2009 From: sabre at nondot.org (Chris Lattner) Date: Tue, 30 Jun 2009 04:20:47 -0000 Subject: [llvm-commits] [llvm] r74508 - /llvm/trunk/lib/Target/X86/README.txt Message-ID: <200906300420.n5U4KlTm014263@zion.cs.uiuc.edu> Author: lattner Date: Mon Jun 29 23:20:46 2009 New Revision: 74508 URL: http://llvm.org/viewvc/llvm-project?rev=74508&view=rev Log: add a note Modified: llvm/trunk/lib/Target/X86/README.txt Modified: llvm/trunk/lib/Target/X86/README.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README.txt?rev=74508&r1=74507&r2=74508&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/README.txt (original) +++ llvm/trunk/lib/Target/X86/README.txt Mon Jun 29 23:20:46 2009 @@ -1932,3 +1932,23 @@ instcombine. //===---------------------------------------------------------------------===// + +It looks like we don't have patterns (or they aren't matching) for adc with +immediate: + +define i64 @f1(i64 %a) nounwind { + %tmp = sub i64 %a, 734439407618 + ret i64 %tmp +} +$ llvm-as < t.ll | llc -march=x86 + +_f1: + movl 4(%esp), %eax + addl $4294967294, %eax + movl $4294967124, %edx + adcl 8(%esp), %edx + ret + +There is no need to clobber %edx there. + +//===---------------------------------------------------------------------===// From eli.friedman at gmail.com Tue Jun 30 00:03:00 2009 From: eli.friedman at gmail.com (Eli Friedman) Date: Mon, 29 Jun 2009 22:03:00 -0700 Subject: [llvm-commits] [llvm] r74508 - /llvm/trunk/lib/Target/X86/README.txt In-Reply-To: <200906300420.n5U4KlTm014263@zion.cs.uiuc.edu> References: <200906300420.n5U4KlTm014263@zion.cs.uiuc.edu> Message-ID: On Mon, Jun 29, 2009 at 9:20 PM, Chris Lattner wrote: > ?//===---------------------------------------------------------------------===// > + > +It looks like we don't have patterns (or they aren't matching) for adc with > +immediate: > + > +define i64 @f1(i64 %a) nounwind { > + ? %tmp = sub i64 %a, 734439407618 > + ? ret i64 %tmp > +} > +$ llvm-as < t.ll | llc -march=x86 > + > +_f1: > + ? ? ? movl ? ?4(%esp), %eax > + ? ? ? addl ? ?$4294967294, %eax > + ? ? ? movl ? ?$4294967124, %edx > + ? ? ? adcl ? ?8(%esp), %edx > + ? ? ? ret The alternative is something like the following: _f1: movl 4(%esp), %eax addl $4294967294, %eax movl 8(%esp), %edx adcl $4294967124, %edx ret This form is slightly better because it's three bytes shorter, but it's not a huge defect. > +There is no need to clobber %edx there. Huh? We *are* returning a 64-bit value, whose top half is in %edx. -Eli From sabre at nondot.org Tue Jun 30 00:22:31 2009 From: sabre at nondot.org (Chris Lattner) Date: Tue, 30 Jun 2009 05:22:31 -0000 Subject: [llvm-commits] [llvm] r74509 - /llvm/trunk/lib/Target/X86/README.txt Message-ID: <200906300522.n5U5MWvW016203@zion.cs.uiuc.edu> Author: lattner Date: Tue Jun 30 00:22:31 2009 New Revision: 74509 URL: http://llvm.org/viewvc/llvm-project?rev=74509&view=rev Log: remove a bogus note. Modified: llvm/trunk/lib/Target/X86/README.txt Modified: llvm/trunk/lib/Target/X86/README.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README.txt?rev=74509&r1=74508&r2=74509&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/README.txt (original) +++ llvm/trunk/lib/Target/X86/README.txt Tue Jun 30 00:22:31 2009 @@ -1932,23 +1932,3 @@ instcombine. //===---------------------------------------------------------------------===// - -It looks like we don't have patterns (or they aren't matching) for adc with -immediate: - -define i64 @f1(i64 %a) nounwind { - %tmp = sub i64 %a, 734439407618 - ret i64 %tmp -} -$ llvm-as < t.ll | llc -march=x86 - -_f1: - movl 4(%esp), %eax - addl $4294967294, %eax - movl $4294967124, %edx - adcl 8(%esp), %edx - ret - -There is no need to clobber %edx there. - -//===---------------------------------------------------------------------===// From clattner at apple.com Tue Jun 30 00:22:42 2009 From: clattner at apple.com (Chris Lattner) Date: Mon, 29 Jun 2009 22:22:42 -0700 Subject: [llvm-commits] [llvm] r74508 - /llvm/trunk/lib/Target/X86/README.txt In-Reply-To: References: <200906300420.n5U4KlTm014263@zion.cs.uiuc.edu> Message-ID: <89EF2275-2D32-4DF8-8581-EF7799F32FFA@apple.com> On Jun 29, 2009, at 10:03 PM, Eli Friedman wrote: >> >> +There is no need to clobber %edx there. > > Huh? We *are* returning a 64-bit value, whose top half is in %edx. You're right, I completely misread the asm :) -Chris From clattner at apple.com Tue Jun 30 00:24:12 2009 From: clattner at apple.com (Chris Lattner) Date: Mon, 29 Jun 2009 22:24:12 -0700 Subject: [llvm-commits] [llvm] r74499 - in /llvm/trunk: lib/Analysis/LoopDependenceAnalysis.cpp test/Analysis/LoopDependenceAnalysis/local-array.ll test/Analysis/LoopDependenceAnalysis/no-array.ll test/Analysis/LoopDependenceAnalysis/siv-strong1.ll test/Analysis/LoopDependenceAnalysis/siv-strong2.ll In-Reply-To: <200906300212.n5U2CBSE010249@zion.cs.uiuc.edu> References: <200906300212.n5U2CBSE010249@zion.cs.uiuc.edu> Message-ID: <5EA8CF17-4AA7-4F41-80FA-F82DCB42A023@apple.com> On Jun 29, 2009, at 7:12 PM, Andreas Bolka wrote: > Author: abolka > Date: Mon Jun 29 21:12:10 2009 > New Revision: 74499 > > URL: http://llvm.org/viewvc/llvm-project?rev=74499&view=rev > Log: > Array accesses are independent if the underlying arrays differ. Andreas, you should really use AliasAnalysis queries for this. If you have P[i] and Q[j] then the accesses are known not to depend on each other if P/Q are known to noalias. Please don't reinvent alias analysis in your pass :) -Chris > > Added: > llvm/trunk/test/Analysis/LoopDependenceAnalysis/local-array.ll > llvm/trunk/test/Analysis/LoopDependenceAnalysis/no-array.ll > Modified: > llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp > llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-strong1.ll > llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-strong2.ll > > Modified: llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp?rev=74499&r1=74498&r2=74499&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp (original) > +++ llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp Mon Jun 29 > 21:12:10 2009 > @@ -22,6 +22,7 @@ > #include "llvm/Analysis/LoopPass.h" > #include "llvm/Analysis/ScalarEvolution.h" > #include "llvm/Instructions.h" > +#include "llvm/Support/Debug.h" > using namespace llvm; > > LoopPass *llvm::createLoopDependenceAnalysisPass() { > @@ -51,6 +52,20 @@ > memrefs.push_back(i); > } > > +static bool IsLoadOrStoreInst(Value *I) { > + return isa(I) || isa(I); > +} > + > +static Value *GetPointerOperand(Value *I) { > + if (LoadInst *i = dyn_cast(I)) > + return i->getPointerOperand(); > + if (StoreInst *i = dyn_cast(I)) > + return i->getPointerOperand(); > + assert(0 && "Value is no load or store instruction!"); > + // Never reached. > + return 0; > +} > + > // > = > = > = > ----------------------------------------------------------------------= > ==// > // Dependence Testing > // > = > = > = > ----------------------------------------------------------------------= > ==// > @@ -65,6 +80,38 @@ > > bool LoopDependenceAnalysis::depends(Value *src, Value *dst) { > assert(isDependencePair(src, dst) && "Values form no dependence > pair!"); > + DOUT << "== LDA test ==\n" << *src << *dst; > + > + // We only analyse loads and stores; for possible memory accesses > by e.g. > + // free, call, or invoke instructions we conservatively assume > dependence. > + if (!IsLoadOrStoreInst(src) || !IsLoadOrStoreInst(dst)) > + return true; > + > + Value *srcPtr = GetPointerOperand(src); > + Value *dstPtr = GetPointerOperand(dst); > + const Value *srcObj = srcPtr->getUnderlyingObject(); > + const Value *dstObj = dstPtr->getUnderlyingObject(); > + const Type *srcTy = srcObj->getType(); > + const Type *dstTy = dstObj->getType(); > + > + // For now, we only work on (pointers to) global or stack- > allocated array > + // values, as we know that their underlying memory areas will not > overlap. > + // MAYBE: relax this and test for aliasing? > + if (!((isa(srcObj) || isa(srcObj)) && > + (isa(dstObj) || isa(dstObj)) && > + isa(srcTy) && > + isa(dstTy) && > + isa(cast(srcTy)->getElementType()) && > + isa(cast(dstTy)->getElementType()))) > + return true; > + > + // If the arrays are different, the underlying memory areas do > not overlap > + // and the memory accesses are therefore independent. > + if (srcObj != dstObj) > + return false; > + > + // We couldn't establish a more precise result, so we have to > conservatively > + // assume full dependence. > return true; > } > > > Added: llvm/trunk/test/Analysis/LoopDependenceAnalysis/local-array.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/LoopDependenceAnalysis/local-array.ll?rev=74499&view=auto > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/test/Analysis/LoopDependenceAnalysis/local-array.ll > (added) > +++ llvm/trunk/test/Analysis/LoopDependenceAnalysis/local-array.ll > Mon Jun 29 21:12:10 2009 > @@ -0,0 +1,24 @@ > +; RUN: llvm-as < %s | opt -disable-output -analyze -lda > %t > +; RUN: grep {instructions: 2} %t | count 1 > +; RUN: grep {0,1: dependent} %t | count 1 > + > +; x[5] = x[6] // with x being an array on the stack > + > +define void @foo(...) nounwind { > +entry: > + %xptr = alloca [256 x i32], align 4 > + %x.ld.addr = getelementptr [256 x i32]* %xptr, i64 0, i64 6 > + %x.st.addr = getelementptr [256 x i32]* %xptr, i64 0, i64 5 > + br label %for.body > + > +for.body: > + %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ] > + %x = load i32* %x.ld.addr > + store i32 %x, i32* %x.st.addr > + %i.next = add i64 %i, 1 > + %exitcond = icmp eq i64 %i.next, 256 > + br i1 %exitcond, label %for.end, label %for.body > + > +for.end: > + ret void > +} > > Added: llvm/trunk/test/Analysis/LoopDependenceAnalysis/no-array.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/LoopDependenceAnalysis/no-array.ll?rev=74499&view=auto > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/test/Analysis/LoopDependenceAnalysis/no-array.ll > (added) > +++ llvm/trunk/test/Analysis/LoopDependenceAnalysis/no-array.ll Mon > Jun 29 21:12:10 2009 > @@ -0,0 +1,23 @@ > +; RUN: llvm-as < %s | opt -disable-output -analyze -lda > %t > +; RUN: grep {instructions: 2} %t | count 1 > +; RUN: grep {0,1: dependent} %t | count 1 > + > +; x[5] = x[6] // with x being a pointer passed as argument > + > +define void @foo(i32* nocapture %xptr) nounwind { > +entry: > + %x.ld.addr = getelementptr i32* %xptr, i64 6 > + %x.st.addr = getelementptr i32* %xptr, i64 5 > + br label %for.body > + > +for.body: > + %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ] > + %x = load i32* %x.ld.addr > + store i32 %x, i32* %x.st.addr > + %i.next = add i64 %i, 1 > + %exitcond = icmp eq i64 %i.next, 256 > + br i1 %exitcond, label %for.end, label %for.body > + > +for.end: > + ret void > +} > > Modified: llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv- > strong1.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-strong1.ll?rev=74499&r1=74498&r2=74499&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-strong1.ll > (original) > +++ llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-strong1.ll > Mon Jun 29 21:12:10 2009 > @@ -1,7 +1,7 @@ > ; RUN: llvm-as < %s | opt -disable-output -analyze -lda > %t > ; RUN: grep {instructions: 3} %t | count 1 > ; RUN: grep {0,2: dependent} %t | count 1 > -; RUN: grep {1,2: dependent} %t | count 1 > +; RUN: grep {1,2: independent} %t | count 1 > > ; for (i = 0; i < 256; i++) > ; x[i] = x[i] + y[i] > > Modified: llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv- > strong2.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-strong2.ll?rev=74499&r1=74498&r2=74499&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-strong2.ll > (original) > +++ llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-strong2.ll > Mon Jun 29 21:12:10 2009 > @@ -1,7 +1,7 @@ > ; RUN: llvm-as < %s | opt -disable-output -analyze -lda > %t > ; RUN: grep {instructions: 3} %t | count 1 > ; RUN: grep {0,2: dependent} %t | count 1 > -; RUN: grep {1,2: dependent} %t | count 1 > +; RUN: grep {1,2: independent} %t | count 1 > > ; for (i = 0; i < 256; i++) > ; x[i+1] = x[i] + y[i] > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From clattner at apple.com Tue Jun 30 00:28:13 2009 From: clattner at apple.com (Chris Lattner) Date: Mon, 29 Jun 2009 22:28:13 -0700 Subject: [llvm-commits] [llvm] r74488 - in /llvm/trunk: include/llvm/LLVMContext.h lib/VMCore/CMakeLists.txt lib/VMCore/LLVMContext.cpp lib/VMCore/LLVMContextImpl.h In-Reply-To: <200906300048.n5U0mucZ007464@zion.cs.uiuc.edu> References: <200906300048.n5U0mucZ007464@zion.cs.uiuc.edu> Message-ID: <8DB3CA98-C4DC-420F-92D6-7C5AD019F156@apple.com> On Jun 29, 2009, at 5:48 PM, Owen Anderson wrote: > URL: http://llvm.org/viewvc/llvm-project?rev=74488&view=rev > Log: > Add LLVMContext, which will eventually be used as a container for > privatizing a lot of (currently) global state, including the > constant and type uniquing tables. For now, just make it a wrapper > around the existing APIs. Thanks! > +++ llvm/trunk/include/llvm/LLVMContext.h Mon Jun 29 19:48:55 2009 > @@ -0,0 +1,162 @@ > +//===-- llvm/LLVMContext.h - Class for managing "global" state --*- > C++ -*-===// > +// > +// The LLVM Compiler Infrastructure > +// > +// This file is distributed under the University of Illinois Open > Source > +// License. See LICENSE.TXT for details. > +// > +// > = > = > = > ----------------------------------------------------------------------= > ==// Please follow the standard header style, adding the blob that describes what this header is all about. > +#ifndef LLVM_LLVMCONTEXT_H > +#define LLVM_LLVMCONTEXT_H > + > +#include "llvm/Support/DataTypes.h" > +#include > +#include It is really unfortunate to include vector and string in this header, would it be possible to fix these API mistakes incrementally by making this API take "start pointer + count"-style APIs? > + > +class LLVMContext { The class needs a big fat doxygen comment. You need to disable copy ctor and operator=. > +++ llvm/trunk/lib/VMCore/LLVMContext.cpp Mon Jun 29 19:48:55 2009 > @@ -0,0 +1,379 @@ > +//===-- LLVMContext.cpp - Implement LLVMContext > -----------------------===// > +// > +// The LLVM Compiler Infrastructure > +// > +// This file is distributed under the University of Illinois Open > Source > +// License. See LICENSE.TXT for details. > +// > +// > = > = > = > ----------------------------------------------------------------------= > ==// Likewise, please use the standard format. Note that the first line is too short and you're missing the second block. > +++ llvm/trunk/lib/VMCore/LLVMContextImpl.h Mon Jun 29 19:48:55 2009 > @@ -0,0 +1,20 @@ > +//===-- llvm/SymbolTableListTraitsImpl.h - Implementation ------*- C > ++ -*--===// > +// > +// The LLVM Compiler Infrastructure > +// > +// This file is distributed under the University of Illinois Open > Source > +// License. See LICENSE.TXT for details. > +// > +// > = > = > = > ----------------------------------------------------------------------= > ==// > + > +#ifndef LLVM_LLVMCONTEXT_IMPL_H > +#define LLVM_LLVMCONTEXT_IMPL_H > + > +namespace llvm { > +class LLVMContextImpl { Same issues as the LLVMContext.h file and class. > + > +}; > + > +} > + > +#endif > \ No newline at end of file Newline plz. :) -Chris From resistor at mac.com Tue Jun 30 00:33:46 2009 From: resistor at mac.com (Owen Anderson) Date: Tue, 30 Jun 2009 05:33:46 -0000 Subject: [llvm-commits] [llvm] r74510 - in /llvm/trunk: include/llvm/ADT/Statistic.h lib/Analysis/IPA/Andersens.cpp lib/Support/Annotation.cpp Message-ID: <200906300533.n5U5XkVh016571@zion.cs.uiuc.edu> Author: resistor Date: Tue Jun 30 00:33:46 2009 New Revision: 74510 URL: http://llvm.org/viewvc/llvm-project?rev=74510&view=rev Log: Fix the build on Cygwin. Patch by Aaron Gray. Modified: llvm/trunk/include/llvm/ADT/Statistic.h llvm/trunk/lib/Analysis/IPA/Andersens.cpp llvm/trunk/lib/Support/Annotation.cpp Modified: llvm/trunk/include/llvm/ADT/Statistic.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/Statistic.h?rev=74510&r1=74509&r2=74510&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/Statistic.h (original) +++ llvm/trunk/include/llvm/ADT/Statistic.h Tue Jun 30 00:33:46 2009 @@ -34,10 +34,10 @@ public: const char *Name; const char *Desc; - unsigned Value; + volatile llvm::sys::cas_flag Value; bool Initialized; - unsigned getValue() const { return Value; } + llvm::sys::cas_flag getValue() const { return Value; } const char *getName() const { return Name; } const char *getDesc() const { return Desc; } Modified: llvm/trunk/lib/Analysis/IPA/Andersens.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/IPA/Andersens.cpp?rev=74510&r1=74509&r2=74510&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/IPA/Andersens.cpp (original) +++ llvm/trunk/lib/Analysis/IPA/Andersens.cpp Tue Jun 30 00:33:46 2009 @@ -211,7 +211,7 @@ // for each location equivalent Node. struct Node { private: - static unsigned Counter; + static volatile sys::cas_flag Counter; public: Value *Val; @@ -618,7 +618,7 @@ static RegisterAnalysisGroup Y(X); // Initialize Timestamp Counter (static). -unsigned Andersens::Node::Counter = 0; +volatile llvm::sys::cas_flag Andersens::Node::Counter = 0; ModulePass *llvm::createAndersensPass() { return new Andersens(); } Modified: llvm/trunk/lib/Support/Annotation.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Annotation.cpp?rev=74510&r1=74509&r2=74510&view=diff ============================================================================== --- llvm/trunk/lib/Support/Annotation.cpp (original) +++ llvm/trunk/lib/Support/Annotation.cpp Tue Jun 30 00:33:46 2009 @@ -39,7 +39,7 @@ } typedef std::map IDMapType; -static unsigned IDCounter = 0; // Unique ID counter +static volatile sys::cas_flag IDCounter = 0; // Unique ID counter // Static member to ensure initialiation on demand. static ManagedStatic IDMap; From sabre at nondot.org Tue Jun 30 01:13:23 2009 From: sabre at nondot.org (Chris Lattner) Date: Tue, 30 Jun 2009 06:13:23 -0000 Subject: [llvm-commits] [llvm] r74511 - /llvm/trunk/docs/CodingStandards.html Message-ID: <200906300613.n5U6DN40018024@zion.cs.uiuc.edu> Author: lattner Date: Tue Jun 30 01:13:23 2009 New Revision: 74511 URL: http://llvm.org/viewvc/llvm-project?rev=74511&view=rev Log: add a note about re-evaluating end() every time through a loop. Modified: llvm/trunk/docs/CodingStandards.html Modified: llvm/trunk/docs/CodingStandards.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CodingStandards.html?rev=74511&r1=74510&r2=74511&view=diff ============================================================================== --- llvm/trunk/docs/CodingStandards.html (original) +++ llvm/trunk/docs/CodingStandards.html Tue Jun 30 01:13:23 2009 @@ -50,6 +50,8 @@
  • Do not use 'using namespace std'
  • Provide a virtual method anchor for classes in headers
    • +
  • Don't evaluate end() every time through a + loop
  • Prefer Preincrement
  • Avoid std::endl
    • @@ -661,6 +663,67 @@
    + +
    + Don't evaluate end() every time through a loop +
    + +
    + +

    Because C++ doesn't have a standard "foreach" loop (though it can be emulated +with macros and may be coming in C++'0x) we end up writing a lot of loops that +manually iterate from begin to end on a variety of containers or through other +data structures. One common mistake is to write a loop in this style:

    + +
    +
    +  BasicBlock *BB = ...
+  for (BasicBlock::iterator I = BB->begin(); I != BB->end(); ++I)
+     ... use I ...
+
    +
    + +

    The problem with this construct is that it evaluates "BB->end()" +every time through the loop. Instead of writing the loop like this, we strongly +prefer loops to be written so that they evaluate it once before the loop starts. +A convenient way to do this is like so:

    + +
    +
    +  BasicBlock *BB = ...
+  for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ++I)
+     ... use I ...
+
    +
    + +

    The observant may quickly point out that these two loops may have different +semantics: if the container (a basic block in this case) is being mutated, then +"BB->end()" may change its value every time through the loop and the +second loop may not in fact be correct. If you actually do depend on this +behavior, please write the loop in the second form and add a comment indicating +that you did it intentionally.

    + +

    Why do we prefer the second form (when correct)? Writing the loop in the +first form has two problems: First it may be less efficient than evaluating it +at the start of the loop. In this case, the cost is probably minor: a few extra +loads every time through the loop. However, if the base expression is more +complex, then the cost can rise quickly. I've seen loops where the end +expression was actually something like: "SomeMap[x]->end()" and map +lookups really aren't cheap. By writing it in the first form consistently, you +eliminate the issue entirely and don't even have to think about it.

    + +

    The second (even bigger) issue is that writing the loop in the second form +hints to the reader that the loop is mutating the container (a fact that a +comment would handily confirm!). If you write the loop in the second form, it +is immediately obvious without even looking at the body of the loop that the +container isn't being modified, which makes it easier to read the code and +understand what it does.

    + +

    While the second form of the loop is a few extra keystrokes, we do strongly +prefer it.

    + +
    +
    From sabre at nondot.org Tue Jun 30 01:20:03 2009 From: sabre at nondot.org (Chris Lattner) Date: Tue, 30 Jun 2009 06:20:03 -0000 Subject: [llvm-commits] [llvm] r74512 - /llvm/trunk/docs/CodingStandards.html Message-ID: <200906300620.n5U6K3TU018247@zion.cs.uiuc.edu> Author: lattner Date: Tue Jun 30 01:20:03 2009 New Revision: 74512 URL: http://llvm.org/viewvc/llvm-project?rev=74512&view=rev Log: fix some issues Jeff Yasskin noticed Modified: llvm/trunk/docs/CodingStandards.html Modified: llvm/trunk/docs/CodingStandards.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CodingStandards.html?rev=74512&r1=74511&r2=74512&view=diff ============================================================================== --- llvm/trunk/docs/CodingStandards.html (original) +++ llvm/trunk/docs/CodingStandards.html Tue Jun 30 01:20:03 2009 @@ -700,7 +700,7 @@ semantics: if the container (a basic block in this case) is being mutated, then "BB->end()" may change its value every time through the loop and the second loop may not in fact be correct. If you actually do depend on this -behavior, please write the loop in the second form and add a comment indicating +behavior, please write the loop in the first form and add a comment indicating that you did it intentionally.

    Why do we prefer the second form (when correct)? Writing the loop in the @@ -712,7 +712,7 @@ lookups really aren't cheap. By writing it in the first form consistently, you eliminate the issue entirely and don't even have to think about it.

    -

    The second (even bigger) issue is that writing the loop in the second form +

    The second (even bigger) issue is that writing the loop in the first form hints to the reader that the loop is mutating the container (a fact that a comment would handily confirm!). If you write the loop in the second form, it is immediately obvious without even looking at the body of the loop that the From sabre at nondot.org Tue Jun 30 01:27:55 2009 From: sabre at nondot.org (Chris Lattner) Date: Tue, 30 Jun 2009 06:27:55 -0000 Subject: [llvm-commits] [llvm] r74514 - /llvm/trunk/docs/CodingStandards.html Message-ID: <200906300627.n5U6RtC9018573@zion.cs.uiuc.edu> Author: lattner Date: Tue Jun 30 01:27:54 2009 New Revision: 74514 URL: http://llvm.org/viewvc/llvm-project?rev=74514&view=rev Log: got confused again Modified: llvm/trunk/docs/CodingStandards.html Modified: llvm/trunk/docs/CodingStandards.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CodingStandards.html?rev=74514&r1=74513&r2=74514&view=diff ============================================================================== --- llvm/trunk/docs/CodingStandards.html (original) +++ llvm/trunk/docs/CodingStandards.html Tue Jun 30 01:27:54 2009 @@ -709,7 +709,7 @@ loads every time through the loop. However, if the base expression is more complex, then the cost can rise quickly. I've seen loops where the end expression was actually something like: "SomeMap[x]->end()" and map -lookups really aren't cheap. By writing it in the first form consistently, you +lookups really aren't cheap. By writing it in the second form consistently, you eliminate the issue entirely and don't even have to think about it.

    The second (even bigger) issue is that writing the loop in the first form From isanbard at gmail.com Tue Jun 30 02:05:28 2009 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 30 Jun 2009 07:05:28 -0000 Subject: [llvm-commits] [llvm] r74515 - in /llvm/trunk: include/llvm/ADT/APInt.h lib/Support/APInt.cpp Message-ID: <200906300705.n5U75SGC019864@zion.cs.uiuc.edu> Author: void Date: Tue Jun 30 02:05:27 2009 New Revision: 74515 URL: http://llvm.org/viewvc/llvm-project?rev=74515&view=rev Log: Temporarily revert r74494. It was causing failures in the unit tests. Modified: llvm/trunk/include/llvm/ADT/APInt.h llvm/trunk/lib/Support/APInt.cpp Modified: llvm/trunk/include/llvm/ADT/APInt.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/APInt.h?rev=74515&r1=74514&r2=74515&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/APInt.h (original) +++ llvm/trunk/include/llvm/ADT/APInt.h Tue Jun 30 02:05:27 2009 @@ -1426,8 +1426,6 @@ return OS; } -std::ostream &operator<<(std::ostream &o, const APInt &I); - namespace APIntOps { /// @brief Determine the smaller of two APInts considered to be signed. Modified: llvm/trunk/lib/Support/APInt.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/APInt.cpp?rev=74515&r1=74514&r2=74515&view=diff ============================================================================== --- llvm/trunk/lib/Support/APInt.cpp (original) +++ llvm/trunk/lib/Support/APInt.cpp Tue Jun 30 02:05:27 2009 @@ -2178,12 +2178,6 @@ OS << S.c_str(); } -std::ostream &operator<<(std::ostream &o, const APInt &I) { - raw_os_ostream OS(o); - OS << I; - return o; -} - // This implements a variety of operations on a representation of // arbitrary precision, two's-complement, bignum integer values. From isanbard at gmail.com Tue Jun 30 02:06:17 2009 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 30 Jun 2009 00:06:17 -0700 Subject: [llvm-commits] [llvm] r74494 - in /llvm/trunk: include/llvm/ADT/APInt.h lib/Support/APInt.cpp In-Reply-To: <200906300128.n5U1S8xn008718@zion.cs.uiuc.edu> References: <200906300128.n5U1S8xn008718@zion.cs.uiuc.edu> Message-ID: <2201ECCB-767B-4049-AAE2-C78D5B35BF7A@gmail.com> Dan, This was causing the unittests to fail. I temporarily reverted it. Could you take a look please? -bw On Jun 29, 2009, at 6:28 PM, Dan Gohman wrote: > Author: djg > Date: Mon Jun 29 20:28:08 2009 > New Revision: 74494 > > URL: http://llvm.org/viewvc/llvm-project?rev=74494&view=rev > Log: > Define an operator<< for APInt to be used with std::ostream. > This will allow it to be used in unittests that use gtest's > EXPECT_EQ. > > Modified: > llvm/trunk/include/llvm/ADT/APInt.h > llvm/trunk/lib/Support/APInt.cpp > > Modified: llvm/trunk/include/llvm/ADT/APInt.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/APInt.h?rev=74494&r1=74493&r2=74494&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/include/llvm/ADT/APInt.h (original) > +++ llvm/trunk/include/llvm/ADT/APInt.h Mon Jun 29 20:28:08 2009 > @@ -1426,6 +1426,8 @@ > return OS; > } > > +std::ostream &operator<<(std::ostream &o, const APInt &I); > + > namespace APIntOps { > > /// @brief Determine the smaller of two APInts considered to be > signed. > > Modified: llvm/trunk/lib/Support/APInt.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/APInt.cpp?rev=74494&r1=74493&r2=74494&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Support/APInt.cpp (original) > +++ llvm/trunk/lib/Support/APInt.cpp Mon Jun 29 20:28:08 2009 > @@ -2178,6 +2178,12 @@ > OS << S.c_str(); > } > > +std::ostream &operator<<(std::ostream &o, const APInt &I) { > + raw_os_ostream OS(o); > + OS << I; > + return o; > +} > + > // This implements a variety of operations on a representation of > // arbitrary precision, two's-complement, bignum integer values. > > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Tue Jun 30 03:49:10 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 30 Jun 2009 08:49:10 -0000 Subject: [llvm-commits] [llvm] r74518 - in /llvm/trunk: include/llvm/CodeGen/MachineInstrBuilder.h include/llvm/CodeGen/MachineOperand.h include/llvm/CodeGen/RegisterScavenging.h lib/CodeGen/LiveIntervalAnalysis.cpp lib/CodeGen/MachineInstr.cpp lib/CodeGen/RegAllocLinearScan.cpp lib/CodeGen/RegisterScavenging.cpp lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp lib/CodeGen/VirtRegRewriter.cpp lib/Target/X86/X86InstrInfo.cpp test/CodeGen/ARM/2009-06-30-RegScavengerAssert.ll Message-ID: <200906300849.n5U8nCun002075@zion.cs.uiuc.edu> Author: evancheng Date: Tue Jun 30 03:49:04 2009 New Revision: 74518 URL: http://llvm.org/viewvc/llvm-project?rev=74518&view=rev Log: Add a bit IsUndef to MachineOperand. This indicates the def / use register operand is defined by an implicit_def. That means it can def / use any register and passes (e.g. register scavenger) can feel free to ignore them. The register allocator, when it allocates a register to a virtual register defined by an implicit_def, can allocate any physical register without worrying about overlapping live ranges. It should mark all of operands of the said virtual register so later passes will do the right thing. This is not the best solution. But it should be a lot less fragile to having the scavenger try to track what is defined by implicit_def. Added: llvm/trunk/test/CodeGen/ARM/2009-06-30-RegScavengerAssert.ll Modified: llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h llvm/trunk/include/llvm/CodeGen/MachineOperand.h llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp llvm/trunk/lib/CodeGen/MachineInstr.cpp llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp llvm/trunk/lib/CodeGen/RegisterScavenging.cpp llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Modified: llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h?rev=74518&r1=74517&r2=74518&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h (original) +++ llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h Tue Jun 30 03:49:04 2009 @@ -29,7 +29,8 @@ Implicit = 0x4, Kill = 0x8, Dead = 0x10, - EarlyClobber = 0x20, + Undef = 0x20, + EarlyClobber = 0x40, ImplicitDefine = Implicit | Define, ImplicitKill = Implicit | Kill }; @@ -57,8 +58,9 @@ flags & RegState::Implicit, flags & RegState::Kill, flags & RegState::Dead, - SubReg, - flags & RegState::EarlyClobber)); + flags & RegState::Undef, + flags & RegState::EarlyClobber, + SubReg)); return *this; } @@ -203,6 +205,9 @@ inline unsigned getDeadRegState(bool B) { return B ? RegState::Dead : 0; } +inline unsigned getUndefRegState(bool B) { + return B ? RegState::Undef : 0; +} } // End llvm namespace Modified: llvm/trunk/include/llvm/CodeGen/MachineOperand.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineOperand.h?rev=74518&r1=74517&r2=74518&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/MachineOperand.h (original) +++ llvm/trunk/include/llvm/CodeGen/MachineOperand.h Tue Jun 30 03:49:04 2009 @@ -75,6 +75,10 @@ /// This is only valid on definitions of registers. bool IsDead : 1; + /// IsUndef - True if this is a register def / use of "undef", i.e. register + /// defined by an IMPLICIT_DEF. This is only valid on registers. + bool IsUndef : 1; + /// IsEarlyClobber - True if this MO_Register 'def' operand is written to /// by the MachineInstr before all input registers are read. This is used to /// model the GCC inline asm '&' constraint modifier. @@ -198,6 +202,11 @@ return IsKill; } + bool isUndef() const { + assert(isReg() && "Wrong MachineOperand accessor"); + return IsUndef; + } + bool isEarlyClobber() const { assert(isReg() && "Wrong MachineOperand accessor"); return IsEarlyClobber; @@ -248,6 +257,11 @@ IsDead = Val; } + void setIsUndef(bool Val = true) { + assert(isReg() && "Wrong MachineOperand accessor"); + IsUndef = Val; + } + void setIsEarlyClobber(bool Val = true) { assert(isReg() && IsDef && "Wrong MachineOperand accessor"); IsEarlyClobber = Val; @@ -337,7 +351,8 @@ /// the specified value. If an operand is known to be an register already, /// the setReg method should be used. void ChangeToRegister(unsigned Reg, bool isDef, bool isImp = false, - bool isKill = false, bool isDead = false); + bool isKill = false, bool isDead = false, + bool isUndef = false); //===--------------------------------------------------------------------===// // Construction methods. @@ -357,13 +372,15 @@ static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp = false, bool isKill = false, bool isDead = false, - unsigned SubReg = 0, - bool isEarlyClobber = false) { + bool isUndef = false, + bool isEarlyClobber = false, + unsigned SubReg = 0) { MachineOperand Op(MachineOperand::MO_Register); Op.IsDef = isDef; Op.IsImp = isImp; Op.IsKill = isKill; Op.IsDead = isDead; + Op.IsUndef = isUndef; Op.IsEarlyClobber = isEarlyClobber; Op.Contents.Reg.RegNo = Reg; Op.Contents.Reg.Prev = 0; @@ -420,6 +437,7 @@ IsImp = MO.IsImp; IsKill = MO.IsKill; IsDead = MO.IsDead; + IsUndef = MO.IsUndef; IsEarlyClobber = MO.IsEarlyClobber; SubReg = MO.SubReg; ParentMI = MO.ParentMI; Modified: llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h?rev=74518&r1=74517&r2=74518&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h (original) +++ llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h Tue Jun 30 03:49:04 2009 @@ -69,10 +69,6 @@ /// available, unset means the register is currently being used. BitVector RegsAvailable; - /// ImplicitDefed - If bit is set that means the register is defined by an - /// implicit_def instructions. That means it can be clobbered at will. - BitVector ImplicitDefed; - /// CurrDist - Distance from MBB entry to the current instruction MBBI. /// unsigned CurrDist; @@ -117,25 +113,18 @@ bool isUsed(unsigned Reg) const { return !RegsAvailable[Reg]; } bool isUnused(unsigned Reg) const { return RegsAvailable[Reg]; } - bool isImplicitlyDefined(unsigned Reg) const { return ImplicitDefed[Reg]; } - /// getRegsUsed - return all registers currently in use in used. void getRegsUsed(BitVector &used, bool includeReserved); /// setUsed / setUnused - Mark the state of one or a number of registers. /// - void setUsed(unsigned Reg, bool ImpDef = false); - void setUsed(BitVector &Regs, bool ImpDef = false) { + void setUsed(unsigned Reg); + void setUsed(BitVector &Regs) { RegsAvailable &= ~Regs; - if (ImpDef) - ImplicitDefed |= Regs; - else - ImplicitDefed &= ~Regs; } void setUnused(unsigned Reg, const MachineInstr *MI); void setUnused(BitVector &Regs) { RegsAvailable |= Regs; - ImplicitDefed &= ~Regs; } /// FindUnusedReg - Find a unused register of the specified register class Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=74518&r1=74517&r2=74518&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original) +++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Tue Jun 30 03:49:04 2009 @@ -1782,8 +1782,12 @@ NewLIs.push_back(&getOrCreateInterval(NewVReg)); for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { MachineOperand &MO = MI->getOperand(i); - if (MO.isReg() && MO.getReg() == li.reg) + if (MO.isReg() && MO.getReg() == li.reg) { MO.setReg(NewVReg); + MO.setIsUndef(); + if (MO.isKill()) + MO.setIsKill(false); + } } } } Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=74518&r1=74517&r2=74518&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Tue Jun 30 03:49:04 2009 @@ -120,7 +120,7 @@ /// the specified value. If an operand is known to be an register already, /// the setReg method should be used. void MachineOperand::ChangeToRegister(unsigned Reg, bool isDef, bool isImp, - bool isKill, bool isDead) { + bool isKill, bool isDead, bool isUndef) { // If this operand is already a register operand, use setReg to update the // register's use/def lists. if (isReg()) { @@ -143,6 +143,7 @@ IsImp = isImp; IsKill = isKill; IsDead = isDead; + IsUndef = isUndef; IsEarlyClobber = false; SubReg = 0; } @@ -206,11 +207,11 @@ OS << "%mreg" << getReg(); } - if (getSubReg() != 0) { + if (getSubReg() != 0) OS << ':' << getSubReg(); - } - if (isDef() || isKill() || isDead() || isImplicit() || isEarlyClobber()) { + if (isDef() || isKill() || isDead() || isImplicit() || isUndef() || + isEarlyClobber()) { OS << '<'; bool NeedComma = false; if (isImplicit()) { @@ -224,10 +225,15 @@ OS << "def"; NeedComma = true; } - if (isKill() || isDead()) { + if (isKill() || isDead() || isUndef()) { if (NeedComma) OS << ','; if (isKill()) OS << "kill"; if (isDead()) OS << "dead"; + if (isUndef()) { + if (isKill() || isDead()) + OS << ','; + OS << "undef"; + } } OS << '>'; } Modified: llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp?rev=74518&r1=74517&r2=74518&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp (original) +++ llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp Tue Jun 30 03:49:04 2009 @@ -905,6 +905,17 @@ DOUT << tri_->getName(physReg) << '\n'; // Note the register is not really in use. vrm_->assignVirt2Phys(cur->reg, physReg); + // Since the register allocator is allowed to assign this virtual register + // physical register that overlaps other live intervals. Mark these + // operands as "Undef" which means later passes, e.g. register scavenger + // can ignore them. + for (MachineRegisterInfo::reg_iterator RI = mri_->reg_begin(cur->reg), + RE = mri_->reg_end(); RI != RE; ++RI) { + MachineOperand &MO = RI.getOperand(); + MO.setIsUndef(); + if (MO.isKill()) + MO.setIsKill(false); + } return; } Modified: llvm/trunk/lib/CodeGen/RegisterScavenging.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterScavenging.cpp?rev=74518&r1=74517&r2=74518&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegisterScavenging.cpp (original) +++ llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Tue Jun 30 03:49:04 2009 @@ -36,7 +36,7 @@ bool SeenSuperDef = false; for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { const MachineOperand &MO = MI->getOperand(i); - if (!MO.isReg()) + if (!MO.isReg() || MO.isUndef()) continue; if (TRI->isSuperRegister(SubReg, MO.getReg())) { if (MO.isUse()) @@ -57,28 +57,22 @@ } /// setUsed - Set the register and its sub-registers as being used. -void RegScavenger::setUsed(unsigned Reg, bool ImpDef) { +void RegScavenger::setUsed(unsigned Reg) { RegsAvailable.reset(Reg); - ImplicitDefed[Reg] = ImpDef; for (const unsigned *SubRegs = TRI->getSubRegisters(Reg); - unsigned SubReg = *SubRegs; ++SubRegs) { + unsigned SubReg = *SubRegs; ++SubRegs) RegsAvailable.reset(SubReg); - ImplicitDefed[SubReg] = ImpDef; - } } /// setUnused - Set the register and its sub-registers as being unused. void RegScavenger::setUnused(unsigned Reg, const MachineInstr *MI) { RegsAvailable.set(Reg); - ImplicitDefed.reset(Reg); for (const unsigned *SubRegs = TRI->getSubRegisters(Reg); unsigned SubReg = *SubRegs; ++SubRegs) - if (!RedefinesSuperRegPart(MI, Reg, TRI)) { + if (!RedefinesSuperRegPart(MI, Reg, TRI)) RegsAvailable.set(SubReg); - ImplicitDefed.reset(SubReg); - } } void RegScavenger::enterBasicBlock(MachineBasicBlock *mbb) { @@ -94,7 +88,6 @@ if (!MBB) { NumPhysRegs = TRI->getNumRegs(); RegsAvailable.resize(NumPhysRegs); - ImplicitDefed.resize(NumPhysRegs); // Create reserved registers bitvector. ReservedRegs = TRI->getReservedRegs(MF); @@ -113,7 +106,6 @@ ScavengeRestore = NULL; CurrDist = 0; DistanceMap.clear(); - ImplicitDefed.reset(); // All registers started out unused. RegsAvailable.set(); @@ -195,15 +187,13 @@ ScavengeRestore = NULL; } - bool IsImpDef = MI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF; - // Separate register operands into 3 classes: uses, defs, earlyclobbers. SmallVector, 4> UseMOs; SmallVector, 4> DefMOs; SmallVector, 4> EarlyClobberMOs; for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { const MachineOperand &MO = MI->getOperand(i); - if (!MO.isReg() || MO.getReg() == 0) + if (!MO.isReg() || MO.getReg() == 0 || MO.isUndef()) continue; if (MO.isUse()) UseMOs.push_back(std::make_pair(&MO,i)); @@ -221,14 +211,7 @@ assert(isUsed(Reg) && "Using an undefined register!"); - // Kill of implicit_def defined registers are ignored. e.g. - // entry: 0x2029ab8, LLVM BB @0x1b06080, ID#0: - // Live Ins: %R0 - // %R0 = IMPLICIT_DEF - // %R0 = IMPLICIT_DEF - // STR %R0, %R0, %reg0, 0, 14, %reg0, Mem:ST(4,4) [0x1b06510 + 0] - // %R1 = LDR %R0, %reg0, 24, 14, %reg0, Mem:LD(4,4) [0x1b065bc + 0] - if (MO.isKill() && !isReserved(Reg) && !isImplicitlyDefined(Reg)) { + if (MO.isKill() && !isReserved(Reg)) { KillRegs.set(Reg); // Mark sub-registers as used. @@ -274,10 +257,9 @@ // Implicit def is allowed to "re-define" any register. Similarly, // implicitly defined registers can be clobbered. assert((isReserved(Reg) || isUnused(Reg) || - IsImpDef || isImplicitlyDefined(Reg) || isLiveInButUnusedBefore(Reg, MI, MBB, TRI, MRI)) && "Re-defining a live register!"); - setUsed(Reg, IsImpDef); + setUsed(Reg); } } @@ -297,7 +279,7 @@ SmallVector, 4> EarlyClobberMOs; for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { const MachineOperand &MO = MI->getOperand(i); - if (!MO.isReg() || MO.getReg() == 0) + if (!MO.isReg() || MO.getReg() == 0 || MO.isUndef()) continue; if (MO.isUse()) UseMOs.push_back(std::make_pair(&MO,i)); Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp?rev=74518&r1=74517&r2=74518&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp Tue Jun 30 03:49:04 2009 @@ -617,7 +617,7 @@ for (; NumVals; --NumVals, ++i) { unsigned Reg = cast(Node->getOperand(i))->getReg(); MI->addOperand(MachineOperand::CreateReg(Reg, true, false, false, - false, 0, true)); + false, false, true)); } break; case 1: // Use of register. Modified: llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp?rev=74518&r1=74517&r2=74518&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp (original) +++ llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp Tue Jun 30 03:49:04 2009 @@ -356,7 +356,7 @@ SmallVector *KillRegs = NULL) { for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { MachineOperand &MO = MI.getOperand(i); - if (!MO.isReg() || !MO.isUse() || !MO.isKill()) + if (!MO.isReg() || !MO.isUse() || !MO.isKill() || MO.isUndef()) continue; unsigned Reg = MO.getReg(); if (TargetRegisterInfo::isVirtualRegister(Reg)) @@ -390,12 +390,12 @@ MachineOperand *DefOp = NULL; for (unsigned i = 0, e = DefMI->getNumOperands(); i != e; ++i) { MachineOperand &MO = DefMI->getOperand(i); - if (MO.isReg() && MO.isDef()) { - if (MO.getReg() == Reg) - DefOp = &MO; - else if (!MO.isDead()) - HasLiveDef = true; - } + if (!MO.isReg() || !MO.isUse() || !MO.isKill() || MO.isUndef()) + continue; + if (MO.getReg() == Reg) + DefOp = &MO; + else if (!MO.isDead()) + HasLiveDef = true; } if (!DefOp) return false; @@ -430,7 +430,7 @@ std::vector &KillOps) { for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { MachineOperand &MO = MI.getOperand(i); - if (!MO.isReg() || !MO.isUse()) + if (!MO.isReg() || !MO.isUse() || MO.isUndef()) continue; unsigned Reg = MO.getReg(); if (Reg == 0) @@ -1289,8 +1289,7 @@ if (InvalidateRegDef(PrevMII, *MII, KillRegs[j], HasOtherDef)) { MachineInstr *DeadDef = PrevMII; if (ReMatDefs.count(DeadDef) && !HasOtherDef) { - // FIXME: This assumes a remat def does not have side - // effects. + // FIXME: This assumes a remat def does not have side effects. VRM.RemoveMachineInstrFromMaps(DeadDef); MBB.erase(DeadDef); ++NumDRM; @@ -1569,6 +1568,8 @@ if (MO.isImplicit()) // If the virtual register is implicitly defined, emit a implicit_def // before so scavenger knows it's "defined". + // FIXME: This is a horrible hack done the by register allocator to + // remat a definition with virtual register operand. VirtUseOps.insert(VirtUseOps.begin(), i); else VirtUseOps.push_back(i); @@ -1595,6 +1596,7 @@ MI.getOperand(i).setReg(RReg); MI.getOperand(i).setSubReg(0); if (VRM.isImplicitlyDefined(VirtReg)) + // FIXME: Is this needed? BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(TargetInstrInfo::IMPLICIT_DEF), RReg); continue; @@ -1604,22 +1606,16 @@ if (!MO.isUse()) continue; // Handle defs in the loop below (handle use&def here though) - bool AvoidReload = false; - if (LIs->hasInterval(VirtReg)) { - LiveInterval &LI = LIs->getInterval(VirtReg); - if (!LI.liveAt(LIs->getUseIndex(LI.beginNumber()))) - // Must be defined by an implicit def. It should not be spilled. Note, - // this is for correctness reason. e.g. - // 8 %reg1024 = IMPLICIT_DEF - // 12 %reg1024 = INSERT_SUBREG %reg1024, %reg1025, 2 - // The live range [12, 14) are not part of the r1024 live interval since - // it's defined by an implicit def. It will not conflicts with live - // interval of r1025. Now suppose both registers are spilled, you can - // easily see a situation where both registers are reloaded before - // the INSERT_SUBREG and both target registers that would overlap. - AvoidReload = true; - } - + bool AvoidReload = MO.isUndef(); + // Check if it is defined by an implicit def. It should not be spilled. + // Note, this is for correctness reason. e.g. + // 8 %reg1024 = IMPLICIT_DEF + // 12 %reg1024 = INSERT_SUBREG %reg1024, %reg1025, 2 + // The live range [12, 14) are not part of the r1024 live interval since + // it's defined by an implicit def. It will not conflicts with live + // interval of r1025. Now suppose both registers are spilled, you can + // easily see a situation where both registers are reloaded before + // the INSERT_SUBREG and both target registers that would overlap. bool DoReMat = VRM.isReMaterialized(VirtReg); int SSorRMId = DoReMat ? VRM.getReMatId(VirtReg) : VRM.getStackSlot(VirtReg); Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=74518&r1=74517&r2=74518&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Tue Jun 30 03:49:04 2009 @@ -2459,7 +2459,8 @@ getDefRegState(MO.isDef()) | RegState::Implicit | getKillRegState(MO.isKill()) | - getDeadRegState(MO.isDead())); + getDeadRegState(MO.isDead()) | + getUndefRegState(MO.isUndef())); } // Change CMP32ri r, 0 back to TEST32rr r, r, etc. unsigned NewOpc = 0; Added: llvm/trunk/test/CodeGen/ARM/2009-06-30-RegScavengerAssert.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2009-06-30-RegScavengerAssert.ll?rev=74518&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/2009-06-30-RegScavengerAssert.ll (added) +++ llvm/trunk/test/CodeGen/ARM/2009-06-30-RegScavengerAssert.ll Tue Jun 30 03:49:04 2009 @@ -0,0 +1,122 @@ +; RUN: llvm-as < %s | llc -march=arm -mtriple=armv6-apple-darwin9 + + at nn = external global i32 ; [#uses=1] + at al_len = external global i32 ; [#uses=2] + at no_mat = external global i32 ; [#uses=2] + at no_mis = external global i32 ; [#uses=2] +@"\01LC12" = external constant [29 x i8], align 1 ; <[29 x i8]*> [#uses=1] +@"\01LC16" = external constant [33 x i8], align 1 ; <[33 x i8]*> [#uses=1] +@"\01LC17" = external constant [47 x i8], align 1 ; <[47 x i8]*> [#uses=1] + +declare arm_apcscc i32 @printf(i8* nocapture, ...) nounwind + +declare arm_apcscc void @diff(i8*, i8*, i32, i32, i32, i32) nounwind + +define arm_apcscc void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind { +entry: + br i1 undef, label %bb5, label %bb + +bb: ; preds = %bb, %entry + br label %bb + +bb5: ; preds = %entry + br i1 undef, label %bb6, label %bb8 + +bb6: ; preds = %bb6, %bb5 + br i1 undef, label %bb8, label %bb6 + +bb8: ; preds = %bb6, %bb5 + br label %bb15 + +bb9: ; preds = %bb15 + br i1 undef, label %bb10, label %bb11 + +bb10: ; preds = %bb9 + unreachable + +bb11: ; preds = %bb9 + %0 = load i32* undef, align 4 ; [#uses=2] + %1 = add i32 %0, 1 ; [#uses=2] + store i32 %1, i32* undef, align 4 + %2 = load i32* undef, align 4 ; [#uses=1] + store i32 %2, i32* @nn, align 4 + store i32 0, i32* @al_len, align 4 + store i32 0, i32* @no_mat, align 4 + store i32 0, i32* @no_mis, align 4 + %3 = getelementptr i8* %B, i32 %0 ; [#uses=1] + tail call arm_apcscc void @diff(i8* undef, i8* %3, i32 undef, i32 undef, i32 undef, i32 undef) nounwind + %4 = sitofp i32 undef to double ; [#uses=1] + %5 = fdiv double %4, 1.000000e+01 ; [#uses=1] + %6 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([29 x i8]* @"\01LC12", i32 0, i32 0), double %5) nounwind ; [#uses=0] + %7 = load i32* @al_len, align 4 ; [#uses=1] + %8 = load i32* @no_mat, align 4 ; [#uses=1] + %9 = load i32* @no_mis, align 4 ; [#uses=1] + %10 = sub i32 %7, %8 ; [#uses=1] + %11 = sub i32 %10, %9 ; [#uses=1] + %12 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([33 x i8]* @"\01LC16", i32 0, i32 0), i32 %11) nounwind ; [#uses=0] + %13 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([47 x i8]* @"\01LC17", i32 0, i32 0), i32 undef, i32 %1, i32 undef, i32 undef) nounwind ; [#uses=0] + br i1 undef, label %bb15, label %bb12 + +bb12: ; preds = %bb11 + br label %bb228.i + +bb74.i: ; preds = %bb228.i + br i1 undef, label %bb138.i, label %bb145.i + +bb138.i: ; preds = %bb74.i + br label %bb145.i + +bb145.i: ; preds = %bb228.i, %bb138.i, %bb74.i + br i1 undef, label %bb146.i, label %bb151.i + +bb146.i: ; preds = %bb145.i + br i1 undef, label %bb228.i, label %bb151.i + +bb151.i: ; preds = %bb146.i, %bb145.i + br i1 undef, label %bb153.i, label %bb228.i + +bb153.i: ; preds = %bb151.i + br i1 undef, label %bb220.i, label %bb.nph.i98 + +bb.nph.i98: ; preds = %bb153.i + br label %bb158.i + +bb158.i: ; preds = %bb218.i, %bb.nph.i98 + br i1 undef, label %bb168.i, label %bb160.i + +bb160.i: ; preds = %bb158.i + br i1 undef, label %bb161.i, label %bb168.i + +bb161.i: ; preds = %bb160.i + br i1 undef, label %bb168.i, label %bb163.i + +bb163.i: ; preds = %bb161.i + br i1 undef, label %bb167.i, label %bb168.i + +bb167.i: ; preds = %bb163.i + br label %bb168.i + +bb168.i: ; preds = %bb167.i, %bb163.i, %bb161.i, %bb160.i, %bb158.i + br i1 undef, label %bb211.i, label %bb218.i + +bb211.i: ; preds = %bb168.i + br label %bb218.i + +bb218.i: ; preds = %bb211.i, %bb168.i + br i1 undef, label %bb220.i, label %bb158.i + +bb220.i: ; preds = %bb218.i, %bb153.i + br i1 undef, label %bb221.i, label %bb228.i + +bb221.i: ; preds = %bb220.i + br label %bb228.i + +bb228.i: ; preds = %bb221.i, %bb220.i, %bb151.i, %bb146.i, %bb12 + br i1 undef, label %bb74.i, label %bb145.i + +bb15: ; preds = %bb11, %bb8 + br i1 undef, label %return, label %bb9 + +return: ; preds = %bb15 + ret void +} From xerxes at zafena.se Tue Jun 30 04:04:03 2009 From: xerxes at zafena.se (=?ISO-8859-1?Q?Xerxes_R=E5nby?=) Date: Tue, 30 Jun 2009 11:04:03 +0200 Subject: [llvm-commits] [patch] cmake add new cpp files to tools/llvm-mc/CMakeLists.txt and lib/CompilerDriver/CMakeLists.txt Message-ID: <4A49D503.7000702@zafena.se> Hi! Fixing cmake CMakeLists.txt files have started to become my new daily morning routine. ;) This patch fix: Linking CXX executable ../../bin/llvm-mc CMakeFiles/llvm-mc.dir/AsmParser.cpp.o: In function `llvm::AsmParser::ParseRelocatableExpression(llvm::MCValue&)': /usr/src/openembedded/overo/tmp/work/i686-linux/llvm2.6-native-2.5+svnr74515-r1/trunk/tools/llvm-mc/AsmParser.cpp:164: undefined reference to `llvm::AsmExpr::EvaluateAsRelocatable(llvm::MCContext&, llvm::MCValue&) const' CMakeFiles/llvm-mc.dir/AsmParser.cpp.o: In function `llvm::AsmParser::ParseAbsoluteExpression(long long&)': /usr/src/openembedded/overo/tmp/work/i686-linux/llvm2.6-native-2.5+svnr74515-r1/trunk/tools/llvm-mc/AsmParser.cpp:151: undefined reference to `llvm::AsmExpr::EvaluateAsAbsolute(llvm::MCContext&, long long&) const' CMakeFiles/llvm-mc.dir/AsmParser.cpp.o: In function `~AsmConstantExpr': And possibly some CompilerDriver issues. Cheers Xerxes -------------- next part -------------- A non-text attachment was scrubbed... Name: 30jun_add_new_cpp_files_to_cmake.patch Type: text/x-patch Size: 821 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090630/0425c2b5/attachment.bin From evan.cheng at apple.com Tue Jun 30 04:19:52 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 30 Jun 2009 09:19:52 -0000 Subject: [llvm-commits] [llvm] r74519 - in /llvm/trunk: include/llvm/CodeGen/RegisterScavenging.h lib/CodeGen/RegisterScavenging.cpp test/CodeGen/ARM/2009-06-30-RegScavengerAssert2.ll Message-ID: <200906300919.n5U9JujO003617@zion.cs.uiuc.edu> Author: evancheng Date: Tue Jun 30 04:19:42 2009 New Revision: 74519 URL: http://llvm.org/viewvc/llvm-project?rev=74519&view=rev Log: Temporarily restore the scavenger implicit_def checking code. MachineOperand isUndef mark is not being put on implicit_def of physical registers (created for parameter passing, etc.). Added: llvm/trunk/test/CodeGen/ARM/2009-06-30-RegScavengerAssert2.ll Modified: llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Modified: llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h?rev=74519&r1=74518&r2=74519&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h (original) +++ llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h Tue Jun 30 04:19:42 2009 @@ -69,6 +69,10 @@ /// available, unset means the register is currently being used. BitVector RegsAvailable; + /// ImplicitDefed - If bit is set that means the register is defined by an + /// implicit_def instructions. That means it can be clobbered at will. + BitVector ImplicitDefed; + /// CurrDist - Distance from MBB entry to the current instruction MBBI. /// unsigned CurrDist; @@ -113,18 +117,25 @@ bool isUsed(unsigned Reg) const { return !RegsAvailable[Reg]; } bool isUnused(unsigned Reg) const { return RegsAvailable[Reg]; } + bool isImplicitlyDefined(unsigned Reg) const { return ImplicitDefed[Reg]; } + /// getRegsUsed - return all registers currently in use in used. void getRegsUsed(BitVector &used, bool includeReserved); /// setUsed / setUnused - Mark the state of one or a number of registers. /// - void setUsed(unsigned Reg); - void setUsed(BitVector &Regs) { + void setUsed(unsigned Reg, bool ImpDef = false); + void setUsed(BitVector &Regs, bool ImpDef = false) { RegsAvailable &= ~Regs; + if (ImpDef) + ImplicitDefed |= Regs; + else + ImplicitDefed &= ~Regs; } void setUnused(unsigned Reg, const MachineInstr *MI); void setUnused(BitVector &Regs) { RegsAvailable |= Regs; + ImplicitDefed &= ~Regs; } /// FindUnusedReg - Find a unused register of the specified register class Modified: llvm/trunk/lib/CodeGen/RegisterScavenging.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterScavenging.cpp?rev=74519&r1=74518&r2=74519&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegisterScavenging.cpp (original) +++ llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Tue Jun 30 04:19:42 2009 @@ -57,22 +57,28 @@ } /// setUsed - Set the register and its sub-registers as being used. -void RegScavenger::setUsed(unsigned Reg) { +void RegScavenger::setUsed(unsigned Reg, bool ImpDef) { RegsAvailable.reset(Reg); + ImplicitDefed[Reg] = ImpDef; for (const unsigned *SubRegs = TRI->getSubRegisters(Reg); - unsigned SubReg = *SubRegs; ++SubRegs) + unsigned SubReg = *SubRegs; ++SubRegs) { RegsAvailable.reset(SubReg); + ImplicitDefed[SubReg] = ImpDef; + } } /// setUnused - Set the register and its sub-registers as being unused. void RegScavenger::setUnused(unsigned Reg, const MachineInstr *MI) { RegsAvailable.set(Reg); + ImplicitDefed.reset(Reg); for (const unsigned *SubRegs = TRI->getSubRegisters(Reg); unsigned SubReg = *SubRegs; ++SubRegs) - if (!RedefinesSuperRegPart(MI, Reg, TRI)) + if (!RedefinesSuperRegPart(MI, Reg, TRI)) { RegsAvailable.set(SubReg); + ImplicitDefed.reset(SubReg); + } } void RegScavenger::enterBasicBlock(MachineBasicBlock *mbb) { @@ -88,6 +94,7 @@ if (!MBB) { NumPhysRegs = TRI->getNumRegs(); RegsAvailable.resize(NumPhysRegs); + ImplicitDefed.resize(NumPhysRegs); // Create reserved registers bitvector. ReservedRegs = TRI->getReservedRegs(MF); @@ -106,6 +113,7 @@ ScavengeRestore = NULL; CurrDist = 0; DistanceMap.clear(); + ImplicitDefed.reset(); // All registers started out unused. RegsAvailable.set(); @@ -187,6 +195,8 @@ ScavengeRestore = NULL; } + bool IsImpDef = MI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF; + // Separate register operands into 3 classes: uses, defs, earlyclobbers. SmallVector, 4> UseMOs; SmallVector, 4> DefMOs; @@ -211,7 +221,14 @@ assert(isUsed(Reg) && "Using an undefined register!"); - if (MO.isKill() && !isReserved(Reg)) { + // Kill of implicit_def defined registers are ignored. e.g. + // entry: 0x2029ab8, LLVM BB @0x1b06080, ID#0: + // Live Ins: %R0 + // %R0 = IMPLICIT_DEF + // %R0 = IMPLICIT_DEF + // STR %R0, %R0, %reg0, 0, 14, %reg0, Mem:ST(4,4) [0x1b06510 + 0] + // %R1 = LDR %R0, %reg0, 24, 14, %reg0, Mem:LD(4,4) [0x1b065bc + 0] + if (MO.isKill() && !isReserved(Reg) && !isImplicitlyDefined(Reg)) { KillRegs.set(Reg); // Mark sub-registers as used. @@ -257,9 +274,10 @@ // Implicit def is allowed to "re-define" any register. Similarly, // implicitly defined registers can be clobbered. assert((isReserved(Reg) || isUnused(Reg) || + IsImpDef || isImplicitlyDefined(Reg) || isLiveInButUnusedBefore(Reg, MI, MBB, TRI, MRI)) && "Re-defining a live register!"); - setUsed(Reg); + setUsed(Reg, IsImpDef); } } Added: llvm/trunk/test/CodeGen/ARM/2009-06-30-RegScavengerAssert2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2009-06-30-RegScavengerAssert2.ll?rev=74519&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/2009-06-30-RegScavengerAssert2.ll (added) +++ llvm/trunk/test/CodeGen/ARM/2009-06-30-RegScavengerAssert2.ll Tue Jun 30 04:19:42 2009 @@ -0,0 +1,116 @@ +; RUN: llvm-as < %s | llc -march=arm -mtriple=armv6-apple-darwin9 + + at no_mat = external global i32 ; [#uses=1] + at no_mis = external global i32 ; [#uses=2] +@"\01LC11" = external constant [33 x i8], align 1 ; <[33 x i8]*> [#uses=1] +@"\01LC15" = external constant [33 x i8], align 1 ; <[33 x i8]*> [#uses=1] +@"\01LC17" = external constant [47 x i8], align 1 ; <[47 x i8]*> [#uses=1] + +declare arm_apcscc i32 @printf(i8* nocapture, ...) nounwind + +declare arm_apcscc void @diff(i8*, i8*, i32, i32, i32, i32) nounwind + +define arm_apcscc void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind { +entry: + br i1 undef, label %bb5, label %bb + +bb: ; preds = %bb, %entry + br label %bb + +bb5: ; preds = %entry + br i1 undef, label %bb6, label %bb8 + +bb6: ; preds = %bb6, %bb5 + br i1 undef, label %bb8, label %bb6 + +bb8: ; preds = %bb6, %bb5 + br label %bb15 + +bb9: ; preds = %bb15 + br i1 undef, label %bb10, label %bb11 + +bb10: ; preds = %bb9 + unreachable + +bb11: ; preds = %bb9 + %0 = load i32* undef, align 4 ; [#uses=3] + %1 = add i32 %0, 1 ; [#uses=2] + store i32 %1, i32* undef, align 4 + %2 = load i32* undef, align 4 ; [#uses=2] + %3 = sub i32 %2, %0 ; [#uses=1] + store i32 0, i32* @no_mat, align 4 + store i32 0, i32* @no_mis, align 4 + %4 = getelementptr i8* %B, i32 %0 ; [#uses=1] + tail call arm_apcscc void @diff(i8* undef, i8* %4, i32 undef, i32 %3, i32 undef, i32 undef) nounwind + %5 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([33 x i8]* @"\01LC11", i32 0, i32 0), i32 %tmp13) nounwind ; [#uses=0] + %6 = load i32* @no_mis, align 4 ; [#uses=1] + %7 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([33 x i8]* @"\01LC15", i32 0, i32 0), i32 %6) nounwind ; [#uses=0] + %8 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([47 x i8]* @"\01LC17", i32 0, i32 0), i32 undef, i32 %1, i32 undef, i32 %2) nounwind ; [#uses=0] + br i1 undef, label %bb15, label %bb12 + +bb12: ; preds = %bb11 + br label %bb228.i + +bb74.i: ; preds = %bb228.i + br i1 undef, label %bb138.i, label %bb145.i + +bb138.i: ; preds = %bb74.i + br label %bb145.i + +bb145.i: ; preds = %bb228.i, %bb138.i, %bb74.i + br i1 undef, label %bb146.i, label %bb151.i + +bb146.i: ; preds = %bb145.i + br i1 undef, label %bb228.i, label %bb151.i + +bb151.i: ; preds = %bb146.i, %bb145.i + br i1 undef, label %bb153.i, label %bb228.i + +bb153.i: ; preds = %bb151.i + br i1 undef, label %bb220.i, label %bb.nph.i98 + +bb.nph.i98: ; preds = %bb153.i + br label %bb158.i + +bb158.i: ; preds = %bb218.i, %bb.nph.i98 + br i1 undef, label %bb168.i, label %bb160.i + +bb160.i: ; preds = %bb158.i + br i1 undef, label %bb161.i, label %bb168.i + +bb161.i: ; preds = %bb160.i + br i1 undef, label %bb168.i, label %bb163.i + +bb163.i: ; preds = %bb161.i + br i1 undef, label %bb167.i, label %bb168.i + +bb167.i: ; preds = %bb163.i + br label %bb168.i + +bb168.i: ; preds = %bb167.i, %bb163.i, %bb161.i, %bb160.i, %bb158.i + br i1 undef, label %bb211.i, label %bb218.i + +bb211.i: ; preds = %bb168.i + br label %bb218.i + +bb218.i: ; preds = %bb211.i, %bb168.i + br i1 undef, label %bb220.i, label %bb158.i + +bb220.i: ; preds = %bb218.i, %bb153.i + br i1 undef, label %bb221.i, label %bb228.i + +bb221.i: ; preds = %bb220.i + br label %bb228.i + +bb228.i: ; preds = %bb221.i, %bb220.i, %bb151.i, %bb146.i, %bb12 + br i1 undef, label %bb74.i, label %bb145.i + +bb15: ; preds = %bb11, %bb8 + %indvar11 = phi i32 [ 0, %bb8 ], [ %tmp13, %bb11 ] ; [#uses=2] + %tmp13 = add i32 %indvar11, 1 ; [#uses=2] + %count.0 = sub i32 undef, %indvar11 ; [#uses=0] + br i1 undef, label %return, label %bb9 + +return: ; preds = %bb15 + ret void +} From rafael.espindola at gmail.com Tue Jun 30 07:18:38 2009 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Tue, 30 Jun 2009 12:18:38 -0000 Subject: [llvm-commits] [llvm] r74523 - in /llvm/trunk: lib/Target/X86/X86FloatingPoint.cpp test/CodeGen/X86/inline-asm-fpstack4.ll Message-ID: <200906301218.n5UCIioJ009485@zion.cs.uiuc.edu> Author: rafael Date: Tue Jun 30 07:18:16 2009 New Revision: 74523 URL: http://llvm.org/viewvc/llvm-project?rev=74523&view=rev Log: Fix PR4484. This was caused by me confounding FP0 and ST(0). Added: llvm/trunk/test/CodeGen/X86/inline-asm-fpstack4.ll Modified: llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp Modified: llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp?rev=74523&r1=74522&r2=74523&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp (original) +++ llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp Tue Jun 30 07:18:16 2009 @@ -990,16 +990,18 @@ } case X86::FpSET_ST0_32: case X86::FpSET_ST0_64: - case X86::FpSET_ST0_80: + case X86::FpSET_ST0_80: { + unsigned RegOnTop = getStackEntry(0); // FpSET_ST0_80 is generated by copyRegToReg for both function return // and inline assembly with the "st" constrain. In the latter case, - // it is possible for FP0 to be alive after this instruction. - if (!MI->killsRegister(X86::FP0)) { + // it is possible for ST(0) to be alive after this instruction. + if (!MI->killsRegister(X86::FP0 + RegOnTop)) { // Duplicate ST0 duplicateToTop(0, 7 /*temp register*/, I); } --StackTop; // "Forget" we have something on the top of stack! break; + } case X86::FpSET_ST1_32: case X86::FpSET_ST1_64: case X86::FpSET_ST1_80: Added: llvm/trunk/test/CodeGen/X86/inline-asm-fpstack4.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-fpstack4.ll?rev=74523&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/inline-asm-fpstack4.ll (added) +++ llvm/trunk/test/CodeGen/X86/inline-asm-fpstack4.ll Tue Jun 30 07:18:16 2009 @@ -0,0 +1,15 @@ +; RUN: llvm-as < %s | llc -march=x86 > %t +; PR4484 + +declare x86_fp80 @ceil() + +declare void @test(x86_fp80) + +define void @test2(x86_fp80 %a) { +entry: + %0 = call x86_fp80 @ceil() + call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %a) + call void @test(x86_fp80 %0) + ret void +} + From xerxes at zafena.se Tue Jun 30 07:48:16 2009 From: xerxes at zafena.se (=?ISO-8859-1?Q?Xerxes_R=E5nby?=) Date: Tue, 30 Jun 2009 14:48:16 +0200 Subject: [llvm-commits] [patch] cmake target lib dependencies chain update in order to build examples Message-ID: <4A4A0990.9020203@zafena.se> Problem using cmake with -DLLVM_EXAMPLES:BOOL=ON : [ 99%] Built target HowToUseJIT Linking CXX executable ../../bin/Kaleidoscope ../../lib/libLLVMX86CodeGen.a(X86TargetMachine.cpp.o): In function `llvm::X86TargetMachine::addInstSelector(llvm::PassManagerBase&, llvm::CodeGenOpt::Level)': X86TargetMachine.cpp:(.text+0x720): undefined reference to `llvm::EnableFastISel' X86TargetMachine.cpp:(.text+0x733): undefined reference to `llvm::createDeadMachineInstructionElimPass()' ../../lib/libLLVMX86CodeGen.a(X86TargetMachine.cpp.o): In function `llvm::X86TargetLowering::~X86TargetLowering()': X86TargetMachine.cpp:(.text._ZN4llvm17X86TargetLoweringD1Ev[llvm::X86TargetLowering::~X86TargetLowering()]+0x17): undefined reference to `llvm::TargetLowering::~TargetLowering()' ../../lib/libLLVMX86CodeGen.a(X86TargetMachine.cpp.o): In function `llvm::TargetInstrInfoImpl::~TargetInstrInfoImpl()': X86TargetMachine.cpp:(.text._ZN4llvm19TargetInstrInfoImplD2Ev[llvm::TargetInstrInfoImpl::~TargetInstrInfoImpl()]+0x7): undefined reference to `vtable for llvm::TargetInstrInfoImpl' ../../lib/libLLVMX86CodeGen.a(X86TargetMachine.cpp.o): In function `llvm::LLVMTargetMachine::~LLVMTargetMachine()': X86TargetMachine.cpp:(.text._ZN4llvm17LLVMTargetMachineD2Ev[llvm::LLVMTargetMachine::~LLVMTargetMachine()]+0x7): undefined reference to `vtable for llvm::LLVMTargetMachine' The patch updates all targets with codegen and asmprinter to deal with this issue. Ciao! Xerxes -------------- next part -------------- A non-text attachment was scrubbed... Name: 30jun_cmake_examples_dependencies.patch Type: text/x-patch Size: 4084 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090630/19fa87fb/attachment.bin From ofv at wanadoo.es Tue Jun 30 09:12:36 2009 From: ofv at wanadoo.es (Oscar Fuentes) Date: Tue, 30 Jun 2009 14:12:36 -0000 Subject: [llvm-commits] [llvm] r74526 - /llvm/trunk/lib/System/Win32/ThreadLocal.inc Message-ID: <200906301412.n5UECgbI013320@zion.cs.uiuc.edu> Author: ofv Date: Tue Jun 30 09:12:28 2009 New Revision: 74526 URL: http://llvm.org/viewvc/llvm-project?rev=74526&view=rev Log: Fixed assert that checks return value of TlsSetValue. See http://msdn.microsoft.com/en-us/library/ms686818(VS.85).aspx Patch by Olaf Krzikalla! Modified: llvm/trunk/lib/System/Win32/ThreadLocal.inc Modified: llvm/trunk/lib/System/Win32/ThreadLocal.inc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Win32/ThreadLocal.inc?rev=74526&r1=74525&r2=74526&view=diff ============================================================================== --- llvm/trunk/lib/System/Win32/ThreadLocal.inc (original) +++ llvm/trunk/lib/System/Win32/ThreadLocal.inc Tue Jun 30 09:12:28 2009 @@ -43,7 +43,7 @@ void ThreadLocalImpl::setInstance(const void* d){ DWORD* tls = static_cast(data); int errorcode = TlsSetValue(*tls, const_cast(d)); - assert(errorcode == 0); + assert(errorcode != 0); } } From dgregor at apple.com Tue Jun 30 09:37:44 2009 From: dgregor at apple.com (Douglas Gregor) Date: Tue, 30 Jun 2009 14:37:44 -0000 Subject: [llvm-commits] [llvm] r74527 - /llvm/trunk/tools/llvm-mc/CMakeLists.txt Message-ID: <200906301437.n5UEbmTU014054@zion.cs.uiuc.edu> Author: dgregor Date: Tue Jun 30 09:37:26 2009 New Revision: 74527 URL: http://llvm.org/viewvc/llvm-project?rev=74527&view=rev Log: Fix CMake build Modified: llvm/trunk/tools/llvm-mc/CMakeLists.txt Modified: llvm/trunk/tools/llvm-mc/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/CMakeLists.txt?rev=74527&r1=74526&r2=74527&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/CMakeLists.txt (original) +++ llvm/trunk/tools/llvm-mc/CMakeLists.txt Tue Jun 30 09:37:26 2009 @@ -2,6 +2,7 @@ add_llvm_tool(llvm-mc llvm-mc.cpp + AsmExpr.cpp AsmLexer.cpp AsmParser.cpp MC-X86Specific.cpp From daniel at zuster.org Tue Jun 30 11:03:04 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Tue, 30 Jun 2009 16:03:04 -0000 Subject: [llvm-commits] [llvm] r74529 - /llvm/trunk/tools/llvm-mc/AsmExpr.cpp Message-ID: <200906301603.n5UG36km017175@zion.cs.uiuc.edu> Author: ddunbar Date: Tue Jun 30 11:02:47 2009 New Revision: 74529 URL: http://llvm.org/viewvc/llvm-project?rev=74529&view=rev Log: Suppress may-be-used-uninitialized warning. Modified: llvm/trunk/tools/llvm-mc/AsmExpr.cpp Modified: llvm/trunk/tools/llvm-mc/AsmExpr.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/AsmExpr.cpp?rev=74529&r1=74528&r2=74529&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/AsmExpr.cpp (original) +++ llvm/trunk/tools/llvm-mc/AsmExpr.cpp Tue Jun 30 11:02:47 2009 @@ -132,7 +132,8 @@ // FIXME: We need target hooks for the evaluation. It may be limited in // width, and gas defines the result of comparisons differently from Apple // as (the result is sign extended). - int64_t Result, LHS = LHSValue.getConstant(), RHS = RHSValue.getConstant(); + int64_t LHS = LHSValue.getConstant(), RHS = RHSValue.getConstant(); + int64_t Result = 0; switch (ABE->getOpcode()) { case AsmBinaryExpr::Add: Result = LHS + RHS; break; case AsmBinaryExpr::And: Result = LHS & RHS; break; From daniel at zuster.org Tue Jun 30 11:12:23 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Tue, 30 Jun 2009 16:12:23 -0000 Subject: [llvm-commits] [llvm] r74530 - /llvm/trunk/unittests/ADT/TripleTest.cpp Message-ID: <200906301612.n5UGCSw0017468@zion.cs.uiuc.edu> Author: ddunbar Date: Tue Jun 30 11:11:58 2009 New Revision: 74530 URL: http://llvm.org/viewvc/llvm-project?rev=74530&view=rev Log: Intentionally break a unittest to test my buildbot gtest command. - Apologies in advance for the noise. Modified: llvm/trunk/unittests/ADT/TripleTest.cpp Modified: llvm/trunk/unittests/ADT/TripleTest.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/ADT/TripleTest.cpp?rev=74530&r1=74529&r2=74530&view=diff ============================================================================== --- llvm/trunk/unittests/ADT/TripleTest.cpp (original) +++ llvm/trunk/unittests/ADT/TripleTest.cpp Tue Jun 30 11:11:58 2009 @@ -132,6 +132,8 @@ EXPECT_EQ(Triple::PC, T.getVendor()); EXPECT_EQ(Triple::Darwin, T.getOS()); EXPECT_EQ("i386-pc-darwin", T.getTriple()); + + EXPECT_EQ("true", "false"); } } From daniel at zuster.org Tue Jun 30 11:27:20 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Tue, 30 Jun 2009 16:27:20 -0000 Subject: [llvm-commits] [llvm] r74531 - /llvm/trunk/unittests/ADT/TripleTest.cpp Message-ID: <200906301627.n5UGRQYK017989@zion.cs.uiuc.edu> Author: ddunbar Date: Tue Jun 30 11:26:57 2009 New Revision: 74531 URL: http://llvm.org/viewvc/llvm-project?rev=74531&view=rev Log: Revert my intentional breakage. Modified: llvm/trunk/unittests/ADT/TripleTest.cpp Modified: llvm/trunk/unittests/ADT/TripleTest.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/ADT/TripleTest.cpp?rev=74531&r1=74530&r2=74531&view=diff ============================================================================== --- llvm/trunk/unittests/ADT/TripleTest.cpp (original) +++ llvm/trunk/unittests/ADT/TripleTest.cpp Tue Jun 30 11:26:57 2009 @@ -132,8 +132,6 @@ EXPECT_EQ(Triple::PC, T.getVendor()); EXPECT_EQ(Triple::Darwin, T.getOS()); EXPECT_EQ("i386-pc-darwin", T.getTriple()); - - EXPECT_EQ("true", "false"); } } From rafael.espindola at gmail.com Tue Jun 30 11:40:14 2009 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Tue, 30 Jun 2009 16:40:14 -0000 Subject: [llvm-commits] [llvm] r74534 - in /llvm/trunk: lib/Target/X86/X86FloatingPoint.cpp test/CodeGen/X86/inline-asm-fpstack4.ll test/CodeGen/X86/inline-asm-fpstack5.ll Message-ID: <200906301640.n5UGeFSW018353@zion.cs.uiuc.edu> Author: rafael Date: Tue Jun 30 11:40:03 2009 New Revision: 74534 URL: http://llvm.org/viewvc/llvm-project?rev=74534&view=rev Log: Fix PR4485. Avoid unnecessary duplication of operand 0 of X86::FpSET_ST0_80. This duplication would cause one register to remain on the stack at the function return. Added: llvm/trunk/test/CodeGen/X86/inline-asm-fpstack5.ll Modified: llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp llvm/trunk/test/CodeGen/X86/inline-asm-fpstack4.ll Modified: llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp?rev=74534&r1=74533&r2=74534&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp (original) +++ llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp Tue Jun 30 11:40:03 2009 @@ -991,13 +991,16 @@ case X86::FpSET_ST0_32: case X86::FpSET_ST0_64: case X86::FpSET_ST0_80: { - unsigned RegOnTop = getStackEntry(0); + unsigned Op0 = getFPReg(MI->getOperand(0)); + // FpSET_ST0_80 is generated by copyRegToReg for both function return // and inline assembly with the "st" constrain. In the latter case, // it is possible for ST(0) to be alive after this instruction. - if (!MI->killsRegister(X86::FP0 + RegOnTop)) { - // Duplicate ST0 + if (!MI->killsRegister(X86::FP0 + Op0)) { + // Duplicate Op0 duplicateToTop(0, 7 /*temp register*/, I); + } else { + moveToTop(Op0, I); } --StackTop; // "Forget" we have something on the top of stack! break; Modified: llvm/trunk/test/CodeGen/X86/inline-asm-fpstack4.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-fpstack4.ll?rev=74534&r1=74533&r2=74534&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/inline-asm-fpstack4.ll (original) +++ llvm/trunk/test/CodeGen/X86/inline-asm-fpstack4.ll Tue Jun 30 11:40:03 2009 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 > %t +; RUN: llvm-as < %s | llc -march=x86 ; PR4484 declare x86_fp80 @ceil() Added: llvm/trunk/test/CodeGen/X86/inline-asm-fpstack5.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-fpstack5.ll?rev=74534&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/inline-asm-fpstack5.ll (added) +++ llvm/trunk/test/CodeGen/X86/inline-asm-fpstack5.ll Tue Jun 30 11:40:03 2009 @@ -0,0 +1,15 @@ +; RUN: llvm-as < %s | llc -march=x86 +; PR4485 + +define void @test(x86_fp80* %a) { +entry: + %0 = load x86_fp80* %a, align 16 + %1 = fmul x86_fp80 %0, 0xK4006B400000000000000 + %2 = fmul x86_fp80 %1, 0xK4012F424000000000000 + tail call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %2) + %3 = load x86_fp80* %a, align 16 + %4 = fmul x86_fp80 %3, 0xK4006B400000000000000 + %5 = fmul x86_fp80 %4, 0xK4012F424000000000000 + tail call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %5) + ret void +} From resistor at mac.com Tue Jun 30 12:07:11 2009 From: resistor at mac.com (Owen Anderson) Date: Tue, 30 Jun 2009 17:07:11 -0000 Subject: [llvm-commits] [llvm] r74537 - in /llvm/trunk: include/llvm/LLVMContext.h lib/VMCore/LLVMContext.cpp lib/VMCore/LLVMContextImpl.h Message-ID: <200906301707.n5UH7F0i019317@zion.cs.uiuc.edu> Author: resistor Date: Tue Jun 30 12:06:46 2009 New Revision: 74537 URL: http://llvm.org/viewvc/llvm-project?rev=74537&view=rev Log: Fix up header comments to make Chris happy. Modified: llvm/trunk/include/llvm/LLVMContext.h llvm/trunk/lib/VMCore/LLVMContext.cpp llvm/trunk/lib/VMCore/LLVMContextImpl.h Modified: llvm/trunk/include/llvm/LLVMContext.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/LLVMContext.h?rev=74537&r1=74536&r2=74537&view=diff ============================================================================== --- llvm/trunk/include/llvm/LLVMContext.h (original) +++ llvm/trunk/include/llvm/LLVMContext.h Tue Jun 30 12:06:46 2009 @@ -6,6 +6,11 @@ // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// +// +// This file declares LLVMContext, a container of "global" state in LLVM, such +// as the global type and constant uniquing tables. +// +//===----------------------------------------------------------------------===// #ifndef LLVM_LLVMCONTEXT_H #define LLVM_LLVMCONTEXT_H @@ -35,6 +40,11 @@ class APFloat; class Value; +/// This is an important class for using LLVM in a threaded context. It +/// (opaquely) owns and manages the core "global" data of LLVM's core +/// infrastructure, including the type and constant uniquing tables. +/// LLVMContext itself provides no locking guarantees, so you should be careful +/// to have one context per thread. class LLVMContext { LLVMContextImpl* pImpl; public: Modified: llvm/trunk/lib/VMCore/LLVMContext.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/LLVMContext.cpp?rev=74537&r1=74536&r2=74537&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/LLVMContext.cpp (original) +++ llvm/trunk/lib/VMCore/LLVMContext.cpp Tue Jun 30 12:06:46 2009 @@ -6,6 +6,11 @@ // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// +// +// This file implements LLVMContext, as a wrapper around the opaque +// class LLVMContextImpl. +// +//===----------------------------------------------------------------------===// #include "llvm/LLVMContext.h" #include "llvm/Constants.h" Modified: llvm/trunk/lib/VMCore/LLVMContextImpl.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/LLVMContextImpl.h?rev=74537&r1=74536&r2=74537&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/LLVMContextImpl.h (original) +++ llvm/trunk/lib/VMCore/LLVMContextImpl.h Tue Jun 30 12:06:46 2009 @@ -6,6 +6,11 @@ // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// +// +// This file declares LLVMContextImpl, the opaque implementation +// of LLVMContext. +// +//===----------------------------------------------------------------------===// #ifndef LLVM_LLVMCONTEXT_IMPL_H #define LLVM_LLVMCONTEXT_IMPL_H @@ -17,4 +22,4 @@ } -#endif \ No newline at end of file +#endif From sabre at nondot.org Tue Jun 30 12:10:20 2009 From: sabre at nondot.org (Chris Lattner) Date: Tue, 30 Jun 2009 17:10:20 -0000 Subject: [llvm-commits] [llvm] r74538 - /llvm/trunk/docs/FAQ.html Message-ID: <200906301710.n5UHAKx4019414@zion.cs.uiuc.edu> Author: lattner Date: Tue Jun 30 12:10:19 2009 New Revision: 74538 URL: http://llvm.org/viewvc/llvm-project?rev=74538&view=rev Log: add a FAQ. Modified: llvm/trunk/docs/FAQ.html Modified: llvm/trunk/docs/FAQ.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/FAQ.html?rev=74538&r1=74537&r2=74538&view=diff ============================================================================== --- llvm/trunk/docs/FAQ.html (original) +++ llvm/trunk/docs/FAQ.html Tue Jun 30 12:10:19 2009 @@ -124,6 +124,10 @@

  • What is this "undef" thing that shows up in my code?
    • + +
  • Why does instcombine + simplifycfg turn + a call to a function with a mismatched calling convention into "unreachable"? + Why not make the verifier reject it?
    • @@ -780,6 +784,143 @@ value specified for it.

    + + +
    +

    Why does instcombine + simplifycfg turn + a call to a function with a mismatched calling convention into "unreachable"? + Why not make the verifier reject it?

    +
    + +
    +

    This is a common problem run into by authors of front-ends that are using +custom calling conventions: you need to make sure to set the right calling +convention on both the function and on each call to the function. For example, +this code:

    + +
    +define fastcc void @foo() {
+        ret void
+}
+define void @bar() {
+        call void @foo( )
+        ret void
+}
+
    + +

    Is optimized to:

    + +
    +define fastcc void @foo() {
+	ret void
+}
+define void @bar() {
+	unreachable
+}
+
    + +

    ... with "opt -instcombine -simplifycfg". This often bites people because +"all their code disappears". Setting the calling convention on the caller and +callee is required for indirect calls to work, so people often ask why not make +the verifier reject this sort of thing.

    + +

    The answer is that this code has undefined behavior, but it is not illegal. +If we made it illegal, then every transformation that could potentially create +this would have to ensure that it doesn't, and there is valid code that can +create this sort of construct (in dead code). The sorts of things that can +cause this to happen are fairly contrived, but we still need to accept them. +Here's an example:

    + +
    +define fastcc void @foo() {
+        ret void
+}
+define internal void @bar(void()* %FP, i1 %cond) {
+        br i1 %cond, label %T, label %F
+T:  
+        call void %FP()
+        ret void
+F:
+        call fastcc void %FP()
+        ret void
+}
+define void @test() {
+        %X = or i1 false, false
+        call void @bar(void()* @foo, i1 %X)
+        ret void
+} 
+
    + +

    In this example, "test" always passes @foo/false into bar, which ensures that + it is dynamically called with the right calling conv (thus, the code is + perfectly well defined). If you run this through the inliner, you get this + (the explicit "or" is there so that the inliner doesn't dead code eliminate + a bunch of stuff): +

    + +
    +define fastcc void @foo() {
+	ret void
+}
+define void @test() {
+	%X = or i1 false, false
+	br i1 %X, label %T.i, label %F.i
+T.i:
+	call void @foo()
+	br label %bar.exit
+F.i:
+	call fastcc void @foo()
+	br label %bar.exit
+bar.exit:
+	ret void
+}
+
    + +

    Here you can see that the inlining pass made an undefined call to @foo with + the wrong calling convention. We really don't want to make the inliner have + to know about this sort of thing, so it needs to be valid code. In this case, + dead code elimination can trivially remove the undefined code. However, if %X + was an input argument to @test, the inliner would produce this: +

    + +
    +define fastcc void @foo() {
+	ret void
+}
+
+define void @test(i1 %X) {
+	br i1 %X, label %T.i, label %F.i
+T.i:
+	call void @foo()
+	br label %bar.exit
+F.i:
+	call fastcc void @foo()
+	br label %bar.exit
+bar.exit:
+	ret void
+}
+
    + +

    The interesting thing about this is that %X must be false for the +code to be well-defined, but no amount of dead code elimination will be able to +delete the broken call as unreachable. However, since instcombine/simplifycfg +turns the undefined call into unreachable, we end up with a branch on a +condition that goes to unreachable: a branch to unreachable can never happen, so +"-inline -instcombine -simplifycfg" is able to produce:

    + +
    +define fastcc void @foo() {
+	ret void
+}
+define void @test(i1 %X) {
+F.i:
+	call fastcc void @foo()
+	ret void
+}
+
    + +
    +
    From resistor at mac.com Tue Jun 30 12:50:55 2009 From: resistor at mac.com (Owen Anderson) Date: Tue, 30 Jun 2009 17:50:55 -0000 Subject: [llvm-commits] [llvm] r74542 - in /llvm/trunk: include/llvm/LLVMContext.h lib/VMCore/LLVMContext.cpp Message-ID: <200906301751.n5UHp10J020679@zion.cs.uiuc.edu> Author: resistor Date: Tue Jun 30 12:50:28 2009 New Revision: 74542 URL: http://llvm.org/viewvc/llvm-project?rev=74542&view=rev Log: Add wrappers for type construction to LLVMContext. Modified: llvm/trunk/include/llvm/LLVMContext.h llvm/trunk/lib/VMCore/LLVMContext.cpp Modified: llvm/trunk/include/llvm/LLVMContext.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/LLVMContext.h?rev=74542&r1=74541&r2=74542&view=diff ============================================================================== --- llvm/trunk/include/llvm/LLVMContext.h (original) +++ llvm/trunk/include/llvm/LLVMContext.h Tue Jun 30 12:50:28 2009 @@ -35,6 +35,8 @@ class StructType; class ArrayType; class VectorType; +class OpaqueType; +class FunctionType; class Type; class APInt; class APFloat; @@ -165,6 +167,34 @@ Constant* getConstantVector(const std::vector& V); Constant* getConstantVector(Constant* const* Vals, unsigned NumVals); ConstantVector* getConstantVectorAllOnes(const VectorType* Ty); + + // FunctionType accessors + FunctionType* getFunctionType(const Type* Result, + const std::vector& Params, + bool isVarArg); + + // IntegerType accessors + const IntegerType* getIntegerType(unsigned NumBits); + + // OpaqueType accessors + OpaqueType* getOpaqueType(); + + // StructType accessors + StructType* getStructType(const std::vector& Params, + bool isPacked = false); + + // ArrayType accessors + ArrayType* getArrayType(const Type* ElementType, uint64_t NumElements); + + // PointerType accessors + PointerType* getPointerType(const Type* ElementType, unsigned AddressSpace); + PointerType* getPointerTypeUnqualified(const Type* ElementType); + + // VectorType accessors + VectorType* getVectorType(const Type* ElementType, unsigned NumElements); + VectorType* getVectorTypeInteger(const VectorType* VTy); + VectorType* getVectorTypeExtendedElement(const VectorType* VTy); + VectorType* getVectorTypeTruncatedElement(const VectorType* VTy); }; } Modified: llvm/trunk/lib/VMCore/LLVMContext.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/LLVMContext.cpp?rev=74542&r1=74541&r2=74542&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/LLVMContext.cpp (original) +++ llvm/trunk/lib/VMCore/LLVMContext.cpp Tue Jun 30 12:50:28 2009 @@ -14,6 +14,7 @@ #include "llvm/LLVMContext.h" #include "llvm/Constants.h" +#include "llvm/DerivedTypes.h" #include "LLVMContextImpl.h" using namespace llvm; @@ -382,3 +383,60 @@ ConstantVector* LLVMContext::getConstantVectorAllOnes(const VectorType* Ty) { return ConstantVector::getAllOnesValue(Ty); } + +// FunctionType accessors +FunctionType* LLVMContext::getFunctionType(const Type* Result, + const std::vector& Params, + bool isVarArg) { + return FunctionType::get(Result, Params, isVarArg); +} + +// IntegerType accessors +const IntegerType* LLVMContext::getIntegerType(unsigned NumBits) { + return IntegerType::get(NumBits); +} + +// OpaqueType accessors +OpaqueType* LLVMContext::getOpaqueType() { + return OpaqueType::get(); +} + +// StructType accessors +StructType* LLVMContext::getStructType(const std::vector& Params, + bool isPacked) { + return StructType::get(Params, isPacked); +} + +// ArrayType accessors +ArrayType* LLVMContext::getArrayType(const Type* ElementType, + uint64_t NumElements) { + return ArrayType::get(ElementType, NumElements); +} + +// PointerType accessors +PointerType* LLVMContext::getPointerType(const Type* ElementType, + unsigned AddressSpace) { + return PointerType::get(ElementType, AddressSpace); +} + +PointerType* LLVMContext::getPointerTypeUnqualified(const Type* ElementType) { + return PointerType::getUnqual(ElementType); +} + +// VectorType accessors +VectorType* LLVMContext::getVectorType(const Type* ElementType, + unsigned NumElements) { + return VectorType::get(ElementType, NumElements); +} + +VectorType* LLVMContext::getVectorTypeInteger(const VectorType* VTy) { + return VectorType::getInteger(VTy); +} + +VectorType* LLVMContext::getVectorTypeExtendedElement(const VectorType* VTy) { + return VectorType::getExtendedElementVectorType(VTy); +} + +VectorType* LLVMContext::getVectorTypeTruncatedElement(const VectorType* VTy) { + return VectorType::getTruncatedElementVectorType(VTy); +} From david_goodwin at apple.com Tue Jun 30 13:04:20 2009 From: david_goodwin at apple.com (David Goodwin) Date: Tue, 30 Jun 2009 18:04:20 -0000 Subject: [llvm-commits] [llvm] r74543 - in /llvm/trunk/lib/Target/ARM: ARMConstantIslandPass.cpp ARMISelDAGToDAG.cpp ARMInstrFormats.td ARMInstrInfo.cpp ARMInstrThumb.td ARMInstrThumb2.td ARMMachineFunctionInfo.h Message-ID: <200906301804.n5UI4OTq021073@zion.cs.uiuc.edu> Author: david_goodwin Date: Tue Jun 30 13:04:13 2009 New Revision: 74543 URL: http://llvm.org/viewvc/llvm-project?rev=74543&view=rev Log: Add conditional and unconditional thumb-2 branch. Add thumb-2 jump table. Modified: llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp llvm/trunk/lib/Target/ARM/ARMInstrFormats.td llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp llvm/trunk/lib/Target/ARM/ARMInstrThumb.td llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td llvm/trunk/lib/Target/ARM/ARMMachineFunctionInfo.h Modified: llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp?rev=74543&r1=74542&r2=74543&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp Tue Jun 30 13:04:13 2009 @@ -124,6 +124,7 @@ const TargetInstrInfo *TII; ARMFunctionInfo *AFI; bool isThumb; + bool isThumb2; public: static char ID; ARMConstantIslands() : MachineFunctionPass(&ID) {} @@ -213,6 +214,7 @@ TII = Fn.getTarget().getInstrInfo(); AFI = Fn.getInfo(); isThumb = AFI->isThumbFunction(); + isThumb2 = AFI->isThumb2Function(); HasFarJump = false; @@ -376,6 +378,7 @@ int UOpc = Opc; switch (Opc) { case ARM::tBR_JTr: + case ARM::t2BR_JTr: // A Thumb table jump may involve padding; for the offsets to // be right, functions containing these must be 4-byte aligned. AFI->setAlign(2U); @@ -402,6 +405,16 @@ Bits = 11; Scale = 2; break; + case ARM::t2Bcc: + isCond = true; + UOpc = ARM::t2B; + Bits = 20; + Scale = 2; + break; + case ARM::t2B: + Bits = 24; + Scale = 2; + break; } // Record this immediate branch. @@ -575,7 +588,7 @@ // There doesn't seem to be meaningful DebugInfo available; this doesn't // correspond to anything in the source. BuildMI(OrigBB, DebugLoc::getUnknownLoc(), - TII->get(isThumb ? ARM::tB : ARM::B)).addMBB(NewBB); + TII->get(isThumb ? ((isThumb2) ? ARM::t2B : ARM::tB) : ARM::B)).addMBB(NewBB); NumSplit++; // Update the CFG. All succs of OrigBB are now succs of NewBB. @@ -719,7 +732,8 @@ MachineBasicBlock *Succ = *MBB->succ_begin(); MachineBasicBlock *Pred = *MBB->pred_begin(); MachineInstr *PredMI = &Pred->back(); - if (PredMI->getOpcode() == ARM::B || PredMI->getOpcode() == ARM::tB) + if (PredMI->getOpcode() == ARM::B || PredMI->getOpcode() == ARM::tB + || PredMI->getOpcode() == ARM::t2B) return PredMI->getOperand(0).getMBB() == Succ; return false; } @@ -751,7 +765,8 @@ // Thumb jump tables require padding. They should be at the end; // following unconditional branches are removed by AnalyzeBranch. MachineInstr *ThumbJTMI = NULL; - if (prior(MBB->end())->getOpcode() == ARM::tBR_JTr) + if ((prior(MBB->end())->getOpcode() == ARM::tBR_JTr) + || (prior(MBB->end())->getOpcode() == ARM::t2BR_JTr)) ThumbJTMI = prior(MBB->end()); if (ThumbJTMI) { unsigned newMIOffset = GetOffsetOf(ThumbJTMI); @@ -842,7 +857,16 @@ /// getUnconditionalBrDisp - Returns the maximum displacement that can fit in /// the specific unconditional branch instruction. static inline unsigned getUnconditionalBrDisp(int Opc) { - return (Opc == ARM::tB) ? ((1<<10)-1)*2 : ((1<<23)-1)*4; + switch (Opc) { + case ARM::tB: + return ((1<<10)-1)*2; + case ARM::t2B: + return ((1<<23)-1)*2; + default: + break; + } + + return ((1<<23)-1)*4; } /// AcceptWater - Small amount of common code factored out of the following. @@ -938,7 +962,7 @@ // range, but if the preceding conditional branch is out of range, the // targets will be exchanged, and the altered branch may be out of // range, so the machinery has to know about it. - int UncondBr = isThumb ? ARM::tB : ARM::B; + int UncondBr = isThumb ? ((isThumb2) ? ARM::t2B : ARM::tB) : ARM::B; BuildMI(UserMBB, DebugLoc::getUnknownLoc(), TII->get(UncondBr)).addMBB(*NewMBB); unsigned MaxDisp = getUnconditionalBrDisp(UncondBr); @@ -1168,7 +1192,7 @@ ARMConstantIslands::FixUpUnconditionalBr(MachineFunction &Fn, ImmBranch &Br) { MachineInstr *MI = Br.MI; MachineBasicBlock *MBB = MI->getParent(); - assert(isThumb && "Expected a Thumb function!"); + assert(isThumb && !isThumb2 && "Expected a Thumb-1 function!"); // Use BL to implement far jump. Br.MaxDisp = (1 << 21) * 2; Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp?rev=74543&r1=74542&r2=74543&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp Tue Jun 30 13:04:13 2009 @@ -858,7 +858,12 @@ // Emits: (tBcc:void (bb:Other):$dst, (imm:i32):$cc) // Pattern complexity = 6 cost = 1 size = 0 - unsigned Opc = Subtarget->isThumb() ? ARM::tBcc : ARM::Bcc; + // Pattern: (ARMbrcond:void (bb:Other):$dst, (imm:i32):$cc) + // Emits: (t2Bcc:void (bb:Other):$dst, (imm:i32):$cc) + // Pattern complexity = 6 cost = 1 size = 0 + + unsigned Opc = Subtarget->isThumb() ? + ((Subtarget->hasThumb2()) ? ARM::t2Bcc : ARM::tBcc) : ARM::Bcc; SDValue Chain = Op.getOperand(0); SDValue N1 = Op.getOperand(1); SDValue N2 = Op.getOperand(2); Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=74543&r1=74542&r2=74543&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Tue Jun 30 13:04:13 2009 @@ -801,6 +801,10 @@ : Thumb1I; class T1Is pattern> : Thumb1I; +class T1Ix2 pattern> + : Thumb1I; +class T1JTI pattern> + : Thumb1I; // Two-address instructions class T1It pattern> @@ -865,6 +869,8 @@ class T2XI pattern> : Thumb2XI; +class T2JTI pattern> + : Thumb2XI; // T2Pat - Same as Pat<>, but requires that the compiler be in Thumb2 mode. class T2Pat : Pat { Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp?rev=74543&r1=74542&r2=74543&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp Tue Jun 30 13:04:13 2009 @@ -350,11 +350,11 @@ // If there is only one terminator instruction, process it. unsigned LastOpc = LastInst->getOpcode(); if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) { - if (LastOpc == ARM::B || LastOpc == ARM::tB) { + if (LastOpc == ARM::B || LastOpc == ARM::tB || LastOpc == ARM::t2B) { TBB = LastInst->getOperand(0).getMBB(); return false; } - if (LastOpc == ARM::Bcc || LastOpc == ARM::tBcc) { + if (LastOpc == ARM::Bcc || LastOpc == ARM::tBcc || LastOpc == ARM::t2Bcc) { // Block ends with fall-through condbranch. TBB = LastInst->getOperand(0).getMBB(); Cond.push_back(LastInst->getOperand(1)); @@ -371,10 +371,12 @@ if (SecondLastInst && I != MBB.begin() && isUnpredicatedTerminator(--I)) return true; - // If the block ends with ARM::B/ARM::tB and a ARM::Bcc/ARM::tBcc, handle it. + // If the block ends with ARM::B/ARM::tB/ARM::t2B and a + // ARM::Bcc/ARM::tBcc/ARM::t2Bcc, handle it. unsigned SecondLastOpc = SecondLastInst->getOpcode(); if ((SecondLastOpc == ARM::Bcc && LastOpc == ARM::B) || - (SecondLastOpc == ARM::tBcc && LastOpc == ARM::tB)) { + (SecondLastOpc == ARM::tBcc && LastOpc == ARM::tB) || + (SecondLastOpc == ARM::t2Bcc && LastOpc == ARM::t2B)) { TBB = SecondLastInst->getOperand(0).getMBB(); Cond.push_back(SecondLastInst->getOperand(1)); Cond.push_back(SecondLastInst->getOperand(2)); @@ -384,8 +386,9 @@ // If the block ends with two unconditional branches, handle it. The second // one is not executed, so remove it. - if ((SecondLastOpc == ARM::B || SecondLastOpc==ARM::tB) && - (LastOpc == ARM::B || LastOpc == ARM::tB)) { + if ((SecondLastOpc == ARM::B || SecondLastOpc==ARM::tB || + SecondLastOpc==ARM::t2B) && + (LastOpc == ARM::B || LastOpc == ARM::tB || LastOpc == ARM::t2B)) { TBB = SecondLastInst->getOperand(0).getMBB(); I = LastInst; if (AllowModify) @@ -397,8 +400,9 @@ // branch. The branch folder can create these, and we must get rid of them for // correctness of Thumb constant islands. if ((SecondLastOpc == ARM::BR_JTr || SecondLastOpc==ARM::BR_JTm || - SecondLastOpc == ARM::BR_JTadd || SecondLastOpc==ARM::tBR_JTr) && - (LastOpc == ARM::B || LastOpc == ARM::tB)) { + SecondLastOpc == ARM::BR_JTadd || SecondLastOpc==ARM::tBR_JTr || + SecondLastOpc==ARM::t2BR_JTr) && + (LastOpc == ARM::B || LastOpc == ARM::tB || LastOpc == ARM::t2B)) { I = LastInst; if (AllowModify) I->eraseFromParent(); @@ -413,8 +417,10 @@ unsigned ARMBaseInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const { MachineFunction &MF = *MBB.getParent(); ARMFunctionInfo *AFI = MF.getInfo(); - int BOpc = AFI->isThumbFunction() ? ARM::tB : ARM::B; - int BccOpc = AFI->isThumbFunction() ? ARM::tBcc : ARM::Bcc; + int BOpc = AFI->isThumbFunction() ? + (AFI->isThumb2Function() ? ARM::t2B : ARM::tB) : ARM::B; + int BccOpc = AFI->isThumbFunction() ? + (AFI->isThumb2Function() ? ARM::t2Bcc : ARM::tBcc) : ARM::Bcc; MachineBasicBlock::iterator I = MBB.end(); if (I == MBB.begin()) return 0; @@ -445,8 +451,10 @@ DebugLoc dl = DebugLoc::getUnknownLoc(); MachineFunction &MF = *MBB.getParent(); ARMFunctionInfo *AFI = MF.getInfo(); - int BOpc = AFI->isThumbFunction() ? ARM::tB : ARM::B; - int BccOpc = AFI->isThumbFunction() ? ARM::tBcc : ARM::Bcc; + int BOpc = AFI->isThumbFunction() ? + (AFI->isThumb2Function() ? ARM::t2B : ARM::tB) : ARM::B; + int BccOpc = AFI->isThumbFunction() ? + (AFI->isThumb2Function() ? ARM::t2Bcc : ARM::tBcc) : ARM::Bcc; // Shouldn't be a fall through. assert(TBB && "InsertBranch must not be told to insert a fallthrough"); @@ -695,8 +703,10 @@ case ARM::tBX_RET_vararg: case ARM::tPOP_RET: case ARM::B: - case ARM::tB: // Uncond branch. + case ARM::tB: + case ARM::t2B: // Uncond branch. case ARM::tBR_JTr: + case ARM::t2BR_JTr: case ARM::BR_JTr: // Jumptable branch. case ARM::BR_JTm: // Jumptable branch through mem. case ARM::BR_JTadd: // Jumptable branch add to pc. @@ -721,8 +731,9 @@ PredicateInstruction(MachineInstr *MI, const SmallVectorImpl &Pred) const { unsigned Opc = MI->getOpcode(); - if (Opc == ARM::B || Opc == ARM::tB) { - MI->setDesc(get(Opc == ARM::B ? ARM::Bcc : ARM::tBcc)); + if (Opc == ARM::B || Opc == ARM::tB || Opc == ARM::t2B) { + MI->setDesc(get((Opc == ARM::B) ? ARM::Bcc : + ((Opc == ARM::tB) ? ARM::tBcc : ARM::t2Bcc))); MI->addOperand(MachineOperand::CreateImm(Pred[0].getImm())); MI->addOperand(MachineOperand::CreateReg(Pred[1].getReg(), false)); return true; @@ -835,7 +846,8 @@ case ARM::BR_JTr: case ARM::BR_JTm: case ARM::BR_JTadd: - case ARM::tBR_JTr: { + case ARM::tBR_JTr: + case ARM::t2BR_JTr: { // These are jumptable branches, i.e. a branch followed by an inlined // jumptable. The size is 4 + 4 * number of entries. unsigned NumOps = TID.getNumOperands(); @@ -853,7 +865,8 @@ // bytes, we can use 16-bit entries instead. Then there won't be an // alignment issue. return getNumJTEntries(JT, JTI) * 4 + - (MI->getOpcode()==ARM::tBR_JTr ? 2 : 4); + ((MI->getOpcode()==ARM::tBR_JTr || + MI->getOpcode()==ARM::t2BR_JTr) ? 2 : 4); } default: // Otherwise, pseudo-instruction sizes are zero. Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb.td?rev=74543&r1=74542&r2=74543&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb.td Tue Jun 30 13:04:13 2009 @@ -187,23 +187,24 @@ let isBranch = 1, isTerminator = 1 in { let isBarrier = 1 in { let isPredicable = 1 in - def tB : TI<(outs), (ins brtarget:$target), "b $target", - [(br bb:$target)]>; + def tB : T1I<(outs), (ins brtarget:$target), "b $target", + [(br bb:$target)]>; // Far jump - def tBfar : TIx2<(outs), (ins brtarget:$target), "bl $target\t@ far jump",[]>; + def tBfar : T1Ix2<(outs), (ins brtarget:$target), + "bl $target\t@ far jump",[]>; - def tBR_JTr : TJTI<(outs), - (ins tGPR:$target, jtblock_operand:$jt, i32imm:$id), - "cpy pc, $target \n\t.align\t2\n$jt", - [(ARMbrjt tGPR:$target, tjumptable:$jt, imm:$id)]>; + def tBR_JTr : T1JTI<(outs), + (ins tGPR:$target, jtblock_operand:$jt, i32imm:$id), + "cpy pc, $target \n\t.align\t2\n$jt", + [(ARMbrjt tGPR:$target, tjumptable:$jt, imm:$id)]>; } } // FIXME: should be able to write a pattern for ARMBrcond, but can't use // a two-value operand where a dag node expects two operands. :( let isBranch = 1, isTerminator = 1 in - def tBcc : TI<(outs), (ins brtarget:$target, pred:$cc), "b$cc $target", + def tBcc : T1I<(outs), (ins brtarget:$target, pred:$cc), "b$cc $target", [/*(ARMbrcond bb:$target, imm:$cc)*/]>; //===----------------------------------------------------------------------===// Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=74543&r1=74542&r2=74543&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Tue Jun 30 13:04:13 2009 @@ -688,6 +688,28 @@ // FIXME: Conditional moves +//===----------------------------------------------------------------------===// +// Control-Flow Instructions +// + +let isBranch = 1, isTerminator = 1, isBarrier = 1 in { +let isPredicable = 1 in +def t2B : T2XI<(outs), (ins brtarget:$target), + "b $target", + [(br bb:$target)]>; + +def t2BR_JTr : T2JTI<(outs), + (ins tGPR:$target, jtblock_operand:$jt, i32imm:$id), + "cpy pc, $target \n\t.align\t2\n$jt", + [(ARMbrjt tGPR:$target, tjumptable:$jt, imm:$id)]>; +} + +// FIXME: should be able to write a pattern for ARMBrcond, but can't use +// a two-value operand where a dag node expects two operands. :( +let isBranch = 1, isTerminator = 1 in +def t2Bcc : T2I<(outs), (ins brtarget:$target), + "b", " $target", + [/*(ARMbrcond bb:$target, imm:$cc)*/]>; //===----------------------------------------------------------------------===// // Non-Instruction Patterns Modified: llvm/trunk/lib/Target/ARM/ARMMachineFunctionInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMMachineFunctionInfo.h?rev=74543&r1=74542&r2=74543&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMMachineFunctionInfo.h (original) +++ llvm/trunk/lib/Target/ARM/ARMMachineFunctionInfo.h Tue Jun 30 13:04:13 2009 @@ -30,6 +30,11 @@ /// Used to initialized Align, so must precede it. bool isThumb; + /// hasThumb2 - True if the target architecture supports Thumb2. Do not use + /// to determine if function is compiled under Thumb mode, for that use + /// 'isThumb'. + bool hasThumb2; + /// Align - required alignment. ARM functions and Thumb functions with /// constant pools require 4-byte alignment; other Thumb functions /// require only 2-byte alignment. @@ -91,7 +96,8 @@ public: ARMFunctionInfo() : - isThumb(false), + isThumb(false), + hasThumb2(false), Align(2U), VarArgsRegSaveSize(0), HasStackFrame(false), LRSpilledForFarJump(false), R3IsLiveIn(false), @@ -102,6 +108,7 @@ explicit ARMFunctionInfo(MachineFunction &MF) : isThumb(MF.getTarget().getSubtarget().isThumb()), + hasThumb2(MF.getTarget().getSubtarget().hasThumb2()), Align(isThumb ? 1U : 2U), VarArgsRegSaveSize(0), HasStackFrame(false), LRSpilledForFarJump(false), R3IsLiveIn(false), @@ -112,6 +119,7 @@ JumpTableUId(0), ConstPoolEntryUId(0) {} bool isThumbFunction() const { return isThumb; } + bool isThumb2Function() const { return isThumb && hasThumb2; } unsigned getAlign() const { return Align; } void setAlign(unsigned a) { Align = a; } From dalej at apple.com Tue Jun 30 13:14:06 2009 From: dalej at apple.com (Dale Johannesen) Date: Tue, 30 Jun 2009 18:14:06 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r74544 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Message-ID: <200906301814.n5UIEDsW021402@zion.cs.uiuc.edu> Author: johannes Date: Tue Jun 30 13:13:46 2009 New Revision: 74544 URL: http://llvm.org/viewvc/llvm-project?rev=74544&view=rev Log: Next bit of multiple alternative constraints handling in asm's. This implements the mechanics of getting things to work after we've picked a tuple of constraints. Currently the 2nd tuple is picked arbitrarily, which of course leads, randomly, to some new successes and new failures in the bits of the gcc testsuite that exercise this. Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=74544&r1=74543&r2=74544&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Tue Jun 30 13:13:46 2009 @@ -3986,15 +3986,61 @@ /// constraints. Look through the operands and constraint possibilities /// and pick a tuple where all the operands match. Replace the strings /// in Constraints[] with the shorter strings from that tuple (malloc'ed, -/// caller is responsible for cleaning it up). +/// caller is responsible for cleaning it up). Later processing can alter what +/// Constraints points to, so to make sure we delete everything, the addresses +/// of everything we allocated also are returned in ReplacementStrings. +/// Casting back and forth from char* to const char* is Ugly, but we have to +/// interface with C code that expects const char*. /// /// gcc's algorithm for picking "the best" tuple is quite complicated, and /// is performed after things like SROA, not before. At the moment we are /// just trying to pick one that will work. This may get refined. static void -ChooseConstraintTuple(const char **Constraints, tree exp, unsigned NumInputs, - unsigned NumOutputs, unsigned NumChoices) +ChooseConstraintTuple (const char **Constraints, tree exp, unsigned NumInputs, + unsigned NumOutputs, unsigned NumChoices, + const char **ReplacementStrings) { + unsigned int CommasToSkip; + // TEMPORARY: assume the second set of constraints is the right one. + // This is totally wrong, of course, but allows the mechanics of string + // handling to be tested. + CommasToSkip = 1; + + for (unsigned int i=0; i1) { + ReplacementStrings = + (const char **)alloca((NumOutputs + NumInputs) * sizeof(const char *)); + ChooseConstraintTuple(Constraints, exp, NumInputs, NumOutputs, NumChoices, + ReplacementStrings); + } std::vector CallOps; std::vector CallArgTypes; @@ -4087,9 +4138,11 @@ const char *Constraint = Constraints[ValNum]; bool IsInOut, AllowsReg, AllowsMem; if (!parse_output_constraint(&Constraint, ValNum, NumInputs, NumOutputs, - &AllowsMem, &AllowsReg, &IsInOut)) + &AllowsMem, &AllowsReg, &IsInOut)) { + if (NumChoices>1) + FreeConstTupleStrings(ReplacementStrings, NumInputs+NumOutputs); return 0; - + } assert(Constraint[0] == '=' && "Not an output constraint?"); // Output constraints must be addressable if they aren't simple register @@ -4156,9 +4209,11 @@ bool AllowsReg, AllowsMem; if (!parse_input_constraint(Constraints+ValNum, ValNum-NumOutputs, NumInputs, NumOutputs, NumInOut, - Constraints, &AllowsMem, &AllowsReg)) + Constraints, &AllowsMem, &AllowsReg)) { + if (NumChoices>1) + FreeConstTupleStrings(ReplacementStrings, NumInputs+NumOutputs); return 0; - + } bool isIndirect = false; if (AllowsReg || !AllowsMem) { // Register operand. const Type *LLVMTy = ConvertType(type); @@ -4211,6 +4266,8 @@ error("%Hunsupported inline asm: input constraint with a matching " "output constraint of incompatible type!", &EXPR_LOCATION(exp)); + if (NumChoices>1) + FreeConstTupleStrings(ReplacementStrings, NumInputs+NumOutputs); return 0; } unsigned OTyBits = TD.getTypeSizeInBits(OTy); @@ -4267,6 +4324,8 @@ // FIXME: Figure out what ASM_USES means. error("%Hcode warrior/ms asm not supported yet in %qs", &EXPR_LOCATION(exp), TREE_STRING_POINTER(ASM_STRING(exp))); + if (NumChoices>1) + FreeConstTupleStrings(ReplacementStrings, NumInputs+NumOutputs); return 0; } @@ -4284,6 +4343,8 @@ case -2: // Invalid. error("%Hunknown register name %qs in %", &EXPR_LOCATION(exp), RegName); + if (NumChoices>1) + FreeConstTupleStrings(ReplacementStrings, NumInputs+NumOutputs); return 0; case -3: // cc ConstraintStr += ",~{cc}"; @@ -4320,6 +4381,8 @@ // Make sure we're created a valid inline asm expression. if (!InlineAsm::Verify(FTy, ConstraintStr)) { error("%HInvalid or unsupported inline assembly!", &EXPR_LOCATION(exp)); + if (NumChoices>1) + FreeConstTupleStrings(ReplacementStrings, NumInputs+NumOutputs); return 0; } @@ -4345,6 +4408,8 @@ if (const TargetAsmInfo *TAI = TheTarget->getTargetAsmInfo()) TAI->ExpandInlineAsm(CV); + if (NumChoices>1) + FreeConstTupleStrings(ReplacementStrings, NumInputs+NumOutputs); return 0; } From dalej at apple.com Tue Jun 30 13:46:30 2009 From: dalej at apple.com (Dale Johannesen) Date: Tue, 30 Jun 2009 18:46:30 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r74545 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Message-ID: <200906301846.n5UIkXFx022628@zion.cs.uiuc.edu> Author: johannes Date: Tue Jun 30 13:46:16 2009 New Revision: 74545 URL: http://llvm.org/viewvc/llvm-project?rev=74545&view=rev Log: Humor versions of gcc that are too stupid to figure out ReplacementStrings can't be used undefined. Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=74545&r1=74544&r2=74545&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Tue Jun 30 13:46:16 2009 @@ -4109,7 +4109,7 @@ // If there are multiple constraint tuples, pick one. Constraints is // altered to point to shorter strings (which are malloc'ed), and everything // below Just Works as in the NumChoices==1 case. - const char** ReplacementStrings; + const char** ReplacementStrings = 0; if (NumChoices>1) { ReplacementStrings = (const char **)alloca((NumOutputs + NumInputs) * sizeof(const char *)); From kremenek at apple.com Tue Jun 30 14:05:30 2009 From: kremenek at apple.com (Ted Kremenek) Date: Tue, 30 Jun 2009 19:05:30 -0000 Subject: [llvm-commits] [llvm] r74546 - /llvm/tags/checker/checker-0.212/ Message-ID: <200906301905.n5UJ5Uin023288@zion.cs.uiuc.edu> Author: kremenek Date: Tue Jun 30 14:05:29 2009 New Revision: 74546 URL: http://llvm.org/viewvc/llvm-project?rev=74546&view=rev Log: Tagging checker-0.212. Added: llvm/tags/checker/checker-0.212/ - copied from r74545, llvm/trunk/ From greened at obbligato.org Tue Jun 30 14:25:00 2009 From: greened at obbligato.org (David Greene) Date: Tue, 30 Jun 2009 19:25:00 -0000 Subject: [llvm-commits] [llvm] r74548 - in /llvm/trunk/lib/Target/X86: AsmPrinter/X86ATTAsmPrinter.h AsmPrinter/X86IntelAsmPrinter.h X86InstrInfo.td Message-ID: <200906301925.n5UJP1Pg023960@zion.cs.uiuc.edu> Author: greened Date: Tue Jun 30 14:24:59 2009 New Revision: 74548 URL: http://llvm.org/viewvc/llvm-project?rev=74548&view=rev Log: Add 256-bit memory operand support. Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h llvm/trunk/lib/Target/X86/X86InstrInfo.td Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h?rev=74548&r1=74547&r2=74548&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h (original) +++ llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h Tue Jun 30 14:24:59 2009 @@ -140,6 +140,9 @@ void printi128mem(const MachineInstr *MI, unsigned OpNo) { printMemReference(MI, OpNo); } + void printi256mem(const MachineInstr *MI, unsigned OpNo) { + printMemReference(MI, OpNo); + } void printf32mem(const MachineInstr *MI, unsigned OpNo) { printMemReference(MI, OpNo); } @@ -152,6 +155,9 @@ void printf128mem(const MachineInstr *MI, unsigned OpNo) { printMemReference(MI, OpNo); } + void printf256mem(const MachineInstr *MI, unsigned OpNo) { + printMemReference(MI, OpNo); + } void printlea32mem(const MachineInstr *MI, unsigned OpNo) { printLeaMemReference(MI, OpNo); } Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h?rev=74548&r1=74547&r2=74548&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h (original) +++ llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h Tue Jun 30 14:24:59 2009 @@ -76,6 +76,10 @@ O << "XMMWORD PTR "; printMemReference(MI, OpNo); } + void printi256mem(const MachineInstr *MI, unsigned OpNo) { + O << "YMMWORD PTR "; + printMemReference(MI, OpNo); + } void printf32mem(const MachineInstr *MI, unsigned OpNo) { O << "DWORD PTR "; printMemReference(MI, OpNo); @@ -92,6 +96,10 @@ O << "XMMWORD PTR "; printMemReference(MI, OpNo); } + void printf256mem(const MachineInstr *MI, unsigned OpNo) { + O << "YMMWORD PTR "; + printMemReference(MI, OpNo); + } void printlea32mem(const MachineInstr *MI, unsigned OpNo) { O << "DWORD PTR "; printLeaMemReference(MI, OpNo); Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=74548&r1=74547&r2=74548&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Tue Jun 30 14:24:59 2009 @@ -180,10 +180,12 @@ def i32mem : X86MemOperand<"printi32mem">; def i64mem : X86MemOperand<"printi64mem">; def i128mem : X86MemOperand<"printi128mem">; +def i256mem : X86MemOperand<"printi256mem">; def f32mem : X86MemOperand<"printf32mem">; def f64mem : X86MemOperand<"printf64mem">; def f80mem : X86MemOperand<"printf80mem">; def f128mem : X86MemOperand<"printf128mem">; +def f256mem : X86MemOperand<"printf256mem">; // A version of i8mem for use on x86-64 that uses GR64_NOREX instead of // plain GR64, so that it doesn't potentially require a REX prefix. From david_goodwin at apple.com Tue Jun 30 14:50:31 2009 From: david_goodwin at apple.com (David Goodwin) Date: Tue, 30 Jun 2009 19:50:31 -0000 Subject: [llvm-commits] [llvm] r74549 - in /llvm/trunk: lib/Target/ARM/ARMCodeEmitter.cpp lib/Target/ARM/ARMConstantIslandPass.cpp lib/Target/ARM/ARMInstrInfo.cpp lib/Target/ARM/ARMInstrThumb2.td test/CodeGen/Thumb2/thumb2-jumptbl.ll Message-ID: <200906301950.n5UJoaYf025220@zion.cs.uiuc.edu> Author: david_goodwin Date: Tue Jun 30 14:50:22 2009 New Revision: 74549 URL: http://llvm.org/viewvc/llvm-project?rev=74549&view=rev Log: Improve Thumb-2 jump table support. Added: llvm/trunk/test/CodeGen/Thumb2/thumb2-jumptbl.ll Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=74549&r1=74548&r2=74549&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Tue Jun 30 14:50:22 2009 @@ -1155,16 +1155,17 @@ const TargetInstrDesc &TID = MI.getDesc(); // Handle jump tables. - if (TID.Opcode == ARM::BR_JTr || TID.Opcode == ARM::BR_JTadd) { + if (TID.Opcode == ARM::BR_JTr || TID.Opcode == ARM::BR_JTadd || + TID.Opcode == ARM::t2BR_JTr || TID.Opcode == ARM::t2BR_JTadd) { // First emit a ldr pc, [] instruction. emitDataProcessingInstruction(MI, ARM::PC); // Then emit the inline jump table. - unsigned JTIndex = (TID.Opcode == ARM::BR_JTr) + unsigned JTIndex = (TID.Opcode == ARM::BR_JTr || TID.Opcode == ARM::t2BR_JTr) ? MI.getOperand(1).getIndex() : MI.getOperand(2).getIndex(); emitInlineJumpTable(JTIndex); return; - } else if (TID.Opcode == ARM::BR_JTm) { + } else if (TID.Opcode == ARM::BR_JTm || TID.Opcode == ARM::t2BR_JTm) { // First emit a ldr pc, [] instruction. emitLoadStoreInstruction(MI, ARM::PC); Modified: llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp?rev=74549&r1=74548&r2=74549&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp Tue Jun 30 14:50:22 2009 @@ -379,6 +379,8 @@ switch (Opc) { case ARM::tBR_JTr: case ARM::t2BR_JTr: + case ARM::t2BR_JTm: + case ARM::t2BR_JTadd: // A Thumb table jump may involve padding; for the offsets to // be right, functions containing these must be 4-byte aligned. AFI->setAlign(2U); @@ -766,7 +768,9 @@ // following unconditional branches are removed by AnalyzeBranch. MachineInstr *ThumbJTMI = NULL; if ((prior(MBB->end())->getOpcode() == ARM::tBR_JTr) - || (prior(MBB->end())->getOpcode() == ARM::t2BR_JTr)) + || (prior(MBB->end())->getOpcode() == ARM::t2BR_JTr) + || (prior(MBB->end())->getOpcode() == ARM::t2BR_JTm) + || (prior(MBB->end())->getOpcode() == ARM::t2BR_JTadd)) ThumbJTMI = prior(MBB->end()); if (ThumbJTMI) { unsigned newMIOffset = GetOffsetOf(ThumbJTMI); Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp?rev=74549&r1=74548&r2=74549&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp Tue Jun 30 14:50:22 2009 @@ -401,7 +401,8 @@ // correctness of Thumb constant islands. if ((SecondLastOpc == ARM::BR_JTr || SecondLastOpc==ARM::BR_JTm || SecondLastOpc == ARM::BR_JTadd || SecondLastOpc==ARM::tBR_JTr || - SecondLastOpc==ARM::t2BR_JTr) && + SecondLastOpc == ARM::t2BR_JTr || SecondLastOpc==ARM::t2BR_JTm || + SecondLastOpc == ARM::t2BR_JTadd) && (LastOpc == ARM::B || LastOpc == ARM::tB || LastOpc == ARM::t2B)) { I = LastInst; if (AllowModify) @@ -708,7 +709,9 @@ case ARM::tBR_JTr: case ARM::t2BR_JTr: case ARM::BR_JTr: // Jumptable branch. + case ARM::t2BR_JTm: case ARM::BR_JTm: // Jumptable branch through mem. + case ARM::t2BR_JTadd: case ARM::BR_JTadd: // Jumptable branch add to pc. return true; default: return false; @@ -846,8 +849,10 @@ case ARM::BR_JTr: case ARM::BR_JTm: case ARM::BR_JTadd: - case ARM::tBR_JTr: - case ARM::t2BR_JTr: { + case ARM::t2BR_JTr: + case ARM::t2BR_JTm: + case ARM::t2BR_JTadd: + case ARM::tBR_JTr: { // These are jumptable branches, i.e. a branch followed by an inlined // jumptable. The size is 4 + 4 * number of entries. unsigned NumOps = TID.getNumOperands(); @@ -865,8 +870,7 @@ // bytes, we can use 16-bit entries instead. Then there won't be an // alignment issue. return getNumJTEntries(JT, JTI) * 4 + - ((MI->getOpcode()==ARM::tBR_JTr || - MI->getOpcode()==ARM::t2BR_JTr) ? 2 : 4); + ((MI->getOpcode()==ARM::tBR_JTr) ? 2 : 4); } default: // Otherwise, pseudo-instruction sizes are zero. Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=74549&r1=74548&r2=74549&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Tue Jun 30 14:50:22 2009 @@ -698,11 +698,25 @@ "b $target", [(br bb:$target)]>; -def t2BR_JTr : T2JTI<(outs), - (ins tGPR:$target, jtblock_operand:$jt, i32imm:$id), - "cpy pc, $target \n\t.align\t2\n$jt", - [(ARMbrjt tGPR:$target, tjumptable:$jt, imm:$id)]>; -} +let isNotDuplicable = 1, isIndirectBranch = 1 in { +def t2BR_JTr : T2JTI<(outs), (ins GPR:$target, jtblock_operand:$jt, i32imm:$id), + "mov pc, $target \n$jt", + [(ARMbrjt GPR:$target, tjumptable:$jt, imm:$id)]>; + +def t2BR_JTm : + T2JTI<(outs), + (ins t2addrmode_so_reg:$target, jtblock_operand:$jt, i32imm:$id), + "ldr pc, $target \n$jt", + [(ARMbrjt (i32 (load t2addrmode_so_reg:$target)), tjumptable:$jt, + imm:$id)]>; + +def t2BR_JTadd : + T2JTI<(outs), + (ins GPR:$target, GPR:$idx, jtblock_operand:$jt, i32imm:$id), + "add pc, $target, $idx \n$jt", + [(ARMbrjt (add GPR:$target, GPR:$idx), tjumptable:$jt, imm:$id)]>; +} // isNotDuplicate, isIndirectBranch +} // isBranch, isTerminator, isBarrier // FIXME: should be able to write a pattern for ARMBrcond, but can't use // a two-value operand where a dag node expects two operands. :( Added: llvm/trunk/test/CodeGen/Thumb2/thumb2-jumptbl.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-jumptbl.ll?rev=74549&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-jumptbl.ll (added) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-jumptbl.ll Tue Jun 30 14:50:22 2009 @@ -0,0 +1,26 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {ldr\\W*pc,} | count 1 + +define i32 @foo(i32 %a) nounwind { +entry: + switch i32 %a, label %bb4 [ + i32 1, label %bb5 + i32 2, label %bb1 + i32 3, label %bb2 + i32 5, label %bb3 + ] + +bb1: ; preds = %entry + ret i32 1 + +bb2: ; preds = %entry + ret i32 1234 + +bb3: ; preds = %entry + ret i32 3456 + +bb4: ; preds = %entry + ret i32 0 + +bb5: ; preds = %entry + ret i32 12 +} From anton at korobeynikov.info Tue Jun 30 14:56:51 2009 From: anton at korobeynikov.info (Anton Korobeynikov) Date: Tue, 30 Jun 2009 23:56:51 +0400 Subject: [llvm-commits] [llvm] r74549 - in /llvm/trunk: lib/Target/ARM/ARMCodeEmitter.cpp lib/Target/ARM/ARMConstantIslandPass.cpp lib/Target/ARM/ARMInstrInfo.cpp lib/Target/ARM/ARMInstrThumb2.td test/CodeGen/Thumb2/thumb2-jumptbl.ll In-Reply-To: <200906301950.n5UJoaYf025220@zion.cs.uiuc.edu> References: <200906301950.n5UJoaYf025220@zion.cs.uiuc.edu> Message-ID: Hi David > - ?if (TID.Opcode == ARM::BR_JTr || TID.Opcode == ARM::BR_JTadd) { > + ?if (TID.Opcode == ARM::BR_JTr || TID.Opcode == ARM::BR_JTadd || > + ? ? ?TID.Opcode == ARM::t2BR_JTr || TID.Opcode == ARM::t2BR_JTadd) { Seeing all this - maybe it will make sense to factor out such code in separate predicate? E.g. isJumpTableOpcode(), etc? -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University From gohman at apple.com Tue Jun 30 15:11:03 2009 From: gohman at apple.com (Dan Gohman) Date: Tue, 30 Jun 2009 20:11:03 -0000 Subject: [llvm-commits] [llvm] r74550 - in /llvm/trunk: include/llvm/ADT/APInt.h lib/Support/APInt.cpp unittests/ADT/APIntTest.cpp Message-ID: <200906302011.n5UKBAmU025991@zion.cs.uiuc.edu> Author: djg Date: Tue Jun 30 15:10:56 2009 New Revision: 74550 URL: http://llvm.org/viewvc/llvm-project?rev=74550&view=rev Log: Reapply 74494, this time removing the conflicting definition of operator<< in APIntTest.cpp. Modified: llvm/trunk/include/llvm/ADT/APInt.h llvm/trunk/lib/Support/APInt.cpp llvm/trunk/unittests/ADT/APIntTest.cpp Modified: llvm/trunk/include/llvm/ADT/APInt.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/APInt.h?rev=74550&r1=74549&r2=74550&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/APInt.h (original) +++ llvm/trunk/include/llvm/ADT/APInt.h Tue Jun 30 15:10:56 2009 @@ -1426,6 +1426,8 @@ return OS; } +std::ostream &operator<<(std::ostream &o, const APInt &I); + namespace APIntOps { /// @brief Determine the smaller of two APInts considered to be signed. Modified: llvm/trunk/lib/Support/APInt.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/APInt.cpp?rev=74550&r1=74549&r2=74550&view=diff ============================================================================== --- llvm/trunk/lib/Support/APInt.cpp (original) +++ llvm/trunk/lib/Support/APInt.cpp Tue Jun 30 15:10:56 2009 @@ -2178,6 +2178,12 @@ OS << S.c_str(); } +std::ostream &llvm::operator<<(std::ostream &o, const APInt &I) { + raw_os_ostream OS(o); + OS << I; + return o; +} + // This implements a variety of operations on a representation of // arbitrary precision, two's-complement, bignum integer values. Modified: llvm/trunk/unittests/ADT/APIntTest.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/ADT/APIntTest.cpp?rev=74550&r1=74549&r2=74550&view=diff ============================================================================== --- llvm/trunk/unittests/ADT/APIntTest.cpp (original) +++ llvm/trunk/unittests/ADT/APIntTest.cpp Tue Jun 30 15:10:56 2009 @@ -17,19 +17,6 @@ namespace { -// Make the Google Test failure output equivalent to APInt::dump() -std::ostream& operator<<(std::ostream &OS, const llvm::APInt& I) { - llvm::raw_os_ostream raw_os(OS); - - SmallString<40> S, U; - I.toStringUnsigned(U); - I.toStringSigned(S); - raw_os << "APInt(" << I.getBitWidth()<< "b, " - << U.c_str() << "u " << S.c_str() << "s)"; - raw_os.flush(); - return OS; -} - // Test that APInt shift left works when bitwidth > 64 and shiftamt == 0 TEST(APIntTest, ShiftLeftByZero) { APInt One = APInt::getNullValue(65) + 1; From gohman at apple.com Tue Jun 30 15:13:32 2009 From: gohman at apple.com (Dan Gohman) Date: Tue, 30 Jun 2009 20:13:32 -0000 Subject: [llvm-commits] [llvm] r74551 - /llvm/trunk/lib/Analysis/ScalarEvolution.cpp Message-ID: <200906302013.n5UKDXPl026100@zion.cs.uiuc.edu> Author: djg Date: Tue Jun 30 15:13:32 2009 New Revision: 74551 URL: http://llvm.org/viewvc/llvm-project?rev=74551&view=rev Log: Minor code cleanups. Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=74551&r1=74550&r2=74551&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original) +++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Tue Jun 30 15:13:32 2009 @@ -110,7 +110,9 @@ //===----------------------------------------------------------------------===// // Implementation of the SCEV class. // + SCEV::~SCEV() {} + void SCEV::dump() const { print(errs()); errs() << '\n'; @@ -387,7 +389,6 @@ return true; } - void SCEVAddRecExpr::print(raw_ostream &OS) const { OS << "{" << *Operands[0]; for (unsigned i = 1, e = Operands.size(); i != e; ++i) @@ -743,6 +744,7 @@ "This is not a conversion to a SCEVable type!"); Ty = getEffectiveSCEVType(Ty); + // Fold if the operand is constant. if (const SCEVConstant *SC = dyn_cast(Op)) return getConstant( cast(ConstantExpr::getTrunc(SC->getValue(), Ty))); @@ -787,6 +789,7 @@ "This is not a conversion to a SCEVable type!"); Ty = getEffectiveSCEVType(Ty); + // Fold if the operand is constant. if (const SCEVConstant *SC = dyn_cast(Op)) { const Type *IntTy = getEffectiveSCEVType(Ty); Constant *C = ConstantExpr::getZExt(SC->getValue(), IntTy); @@ -882,6 +885,7 @@ "This is not a conversion to a SCEVable type!"); Ty = getEffectiveSCEVType(Ty); + // Fold if the operand is constant. if (const SCEVConstant *SC = dyn_cast(Op)) { const Type *IntTy = getEffectiveSCEVType(Ty); Constant *C = ConstantExpr::getSExt(SC->getValue(), IntTy); @@ -4241,7 +4245,7 @@ // The maximum backedge count is similar, except using the minimum start // value and the maximum end value. - const SCEV* MaxBECount = getBECount(MinStart, MaxEnd, Step);; + const SCEV* MaxBECount = getBECount(MinStart, MaxEnd, Step); return BackedgeTakenInfo(BECount, MaxBECount); } From a at bolka.at Tue Jun 30 16:33:58 2009 From: a at bolka.at (Andreas Bolka) Date: Tue, 30 Jun 2009 21:33:58 -0000 Subject: [llvm-commits] [llvm] r74553 - /llvm/trunk/include/llvm/Analysis/LoopDependenceAnalysis.h Message-ID: <200906302133.n5ULXxmo029056@zion.cs.uiuc.edu> Author: abolka Date: Tue Jun 30 16:33:56 2009 New Revision: 74553 URL: http://llvm.org/viewvc/llvm-project?rev=74553&view=rev Log: Drop redundant print impl. Modified: llvm/trunk/include/llvm/Analysis/LoopDependenceAnalysis.h Modified: llvm/trunk/include/llvm/Analysis/LoopDependenceAnalysis.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/LoopDependenceAnalysis.h?rev=74553&r1=74552&r2=74553&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/LoopDependenceAnalysis.h (original) +++ llvm/trunk/include/llvm/Analysis/LoopDependenceAnalysis.h Tue Jun 30 16:33:56 2009 @@ -48,9 +48,6 @@ void print(raw_ostream&, const Module* = 0) const; virtual void print(std::ostream&, const Module* = 0) const; - void print(std::ostream *OS, const Module *M = 0) const { - if (OS) print(*OS, M); - } }; // class LoopDependenceAnalysis From david_goodwin at apple.com Tue Jun 30 16:51:31 2009 From: david_goodwin at apple.com (David Goodwin) Date: Tue, 30 Jun 2009 14:51:31 -0700 Subject: [llvm-commits] [llvm] r74549 - in /llvm/trunk: lib/Target/ARM/ARMCodeEmitter.cpp lib/Target/ARM/ARMConstantIslandPass.cpp lib/Target/ARM/ARMInstrInfo.cpp lib/Target/ARM/ARMInstrThumb2.td test/CodeGen/Thumb2/thumb2-jumptbl.ll In-Reply-To: References: <200906301950.n5UJoaYf025220@zion.cs.uiuc.edu> Message-ID: Perhaps, though we are not always interested in all jump table opcodes. For instance, the code you show is not checking for all the jump table opcodes, there are also the move versions BR_JTm and t2BR_JTm. David On Jun 30, 2009, at 12:56 PM, Anton Korobeynikov wrote: > Hi David > >> - if (TID.Opcode == ARM::BR_JTr || TID.Opcode == ARM::BR_JTadd) { >> + if (TID.Opcode == ARM::BR_JTr || TID.Opcode == ARM::BR_JTadd || >> + TID.Opcode == ARM::t2BR_JTr || TID.Opcode == >> ARM::t2BR_JTadd) { > Seeing all this - maybe it will make sense to factor out such code in > separate predicate? E.g. isJumpTableOpcode(), etc? > > -- > With best regards, Anton Korobeynikov > Faculty of Mathematics and Mechanics, Saint Petersburg State > University > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From david_goodwin at apple.com Tue Jun 30 17:11:34 2009 From: david_goodwin at apple.com (David Goodwin) Date: Tue, 30 Jun 2009 22:11:34 -0000 Subject: [llvm-commits] [llvm] r74555 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb2.td test/CodeGen/Thumb2/thumb2-str.ll test/CodeGen/Thumb2/thumb2-strb.ll test/CodeGen/Thumb2/thumb2-strh.ll Message-ID: <200906302211.n5UMBYMc030183@zion.cs.uiuc.edu> Author: david_goodwin Date: Tue Jun 30 17:11:34 2009 New Revision: 74555 URL: http://llvm.org/viewvc/llvm-project?rev=74555&view=rev Log: Add thumb-2 store word, halfword, and byte. Added: llvm/trunk/test/CodeGen/Thumb2/thumb2-str.ll llvm/trunk/test/CodeGen/Thumb2/thumb2-strb.ll llvm/trunk/test/CodeGen/Thumb2/thumb2-strh.ll Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=74555&r1=74554&r2=74555&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Tue Jun 30 17:11:34 2009 @@ -399,6 +399,19 @@ [(set GPR:$dst, (opnode (ARMWrapper tconstpool:$addr)))]>; } +/// T2I_st - Defines a set of (op r, {imm12|imm8|so_reg}) store patterns. +multiclass T2I_st { + def i12 : T2Ii12<(outs), (ins GPR:$src, t2addrmode_imm12:$addr), + opc, " $src, $addr", + [(opnode GPR:$src, t2addrmode_imm12:$addr)]>; + def i8 : T2Ii8 <(outs), (ins GPR:$src, t2addrmode_imm8:$addr), + opc, " $src, $addr", + [(opnode GPR:$src, t2addrmode_imm8:$addr)]>; + def s : T2Iso <(outs), (ins GPR:$src, t2addrmode_so_reg:$addr), + opc, " $src, $addr", + [(opnode GPR:$src, t2addrmode_so_reg:$addr)]>; +} + //===----------------------------------------------------------------------===// // Instructions //===----------------------------------------------------------------------===// @@ -509,6 +522,11 @@ def : T2Pat<(extloadi16 (ARMWrapper tconstpool:$addr)), (t2LDRHpci tconstpool:$addr)>; +// Store +defm t2STR : T2I_st<"str", BinOpFrag<(store node:$LHS, node:$RHS)>>; +defm t2STRB : T2I_st<"strb", BinOpFrag<(truncstorei8 node:$LHS, node:$RHS)>>; +defm t2STRH : T2I_st<"strh", BinOpFrag<(truncstorei16 node:$LHS, node:$RHS)>>; + //===----------------------------------------------------------------------===// // Move Instructions. // Added: llvm/trunk/test/CodeGen/Thumb2/thumb2-str.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-str.ll?rev=74555&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-str.ll (added) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-str.ll Tue Jun 30 17:11:34 2009 @@ -0,0 +1,63 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {str\\W*r\[0-9\],\\W*\\\[r\[0-9\]*\\\]$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {str\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4092\\\]$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {str\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#-128\\\]$} | count 2 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep {str\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4096\\\]$} +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {str\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*\\\]$} | count 3 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {str\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*,\\Wlsl #2\\\]$} | count 1 + +define i32 @f1(i32 %a, i32* %v) { + store i32 %a, i32* %v + ret i32 %a +} + +define i32 @f2(i32 %a, i32* %v) { + %tmp2 = getelementptr i32* %v, i32 1023 + store i32 %a, i32* %tmp2 + ret i32 %a +} + +define i32 @f2a(i32 %a, i32* %v) { + %tmp2 = getelementptr i32* %v, i32 -32 + store i32 %a, i32* %tmp2 + ret i32 %a +} + +define i32 @f3(i32 %a, i32* %v) { + %tmp2 = getelementptr i32* %v, i32 1024 + store i32 %a, i32* %tmp2 + ret i32 %a +} + +define i32 @f4(i32 %a, i32 %base) { +entry: + %tmp1 = sub i32 %base, 128 + %tmp2 = inttoptr i32 %tmp1 to i32* + store i32 %a, i32* %tmp2 + ret i32 %a +} + +define i32 @f5(i32 %a, i32 %base, i32 %offset) { +entry: + %tmp1 = add i32 %base, %offset + %tmp2 = inttoptr i32 %tmp1 to i32* + store i32 %a, i32* %tmp2 + ret i32 %a +} + +define i32 @f6(i32 %a, i32 %base, i32 %offset) { +entry: + %tmp1 = shl i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i32* + store i32 %a, i32* %tmp3 + ret i32 %a +} + +define i32 @f7(i32 %a, i32 %base, i32 %offset) { +entry: + %tmp1 = lshr i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i32* + store i32 %a, i32* %tmp3 + ret i32 %a +} Added: llvm/trunk/test/CodeGen/Thumb2/thumb2-strb.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-strb.ll?rev=74555&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-strb.ll (added) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-strb.ll Tue Jun 30 17:11:34 2009 @@ -0,0 +1,63 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strb\\W*r\[0-9\],\\W*\\\[r\[0-9\]*\\\]$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strb\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4092\\\]$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strb\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#-128\\\]$} | count 2 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep {strb\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4096\\\]$} +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strb\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*\\\]$} | count 3 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strb\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*,\\Wlsl #2\\\]$} | count 1 + +define i8 @f1(i8 %a, i8* %v) { + store i8 %a, i8* %v + ret i8 %a +} + +define i8 @f2(i8 %a, i8* %v) { + %tmp2 = getelementptr i8* %v, i32 4092 + store i8 %a, i8* %tmp2 + ret i8 %a +} + +define i8 @f2a(i8 %a, i8* %v) { + %tmp2 = getelementptr i8* %v, i32 -128 + store i8 %a, i8* %tmp2 + ret i8 %a +} + +define i8 @f3(i8 %a, i8* %v) { + %tmp2 = getelementptr i8* %v, i32 4096 + store i8 %a, i8* %tmp2 + ret i8 %a +} + +define i8 @f4(i8 %a, i32 %base) { +entry: + %tmp1 = sub i32 %base, 128 + %tmp2 = inttoptr i32 %tmp1 to i8* + store i8 %a, i8* %tmp2 + ret i8 %a +} + +define i8 @f5(i8 %a, i32 %base, i32 %offset) { +entry: + %tmp1 = add i32 %base, %offset + %tmp2 = inttoptr i32 %tmp1 to i8* + store i8 %a, i8* %tmp2 + ret i8 %a +} + +define i8 @f6(i8 %a, i32 %base, i32 %offset) { +entry: + %tmp1 = shl i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i8* + store i8 %a, i8* %tmp3 + ret i8 %a +} + +define i8 @f7(i8 %a, i32 %base, i32 %offset) { +entry: + %tmp1 = lshr i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i8* + store i8 %a, i8* %tmp3 + ret i8 %a +} Added: llvm/trunk/test/CodeGen/Thumb2/thumb2-strh.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-strh.ll?rev=74555&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-strh.ll (added) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-strh.ll Tue Jun 30 17:11:34 2009 @@ -0,0 +1,63 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strh\\W*r\[0-9\],\\W*\\\[r\[0-9\]*\\\]$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strh\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4092\\\]$} | count 1 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strh\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#-128\\\]$} | count 2 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep {strh\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4096\\\]$} +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strh\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*\\\]$} | count 3 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strh\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*,\\Wlsl #2\\\]$} | count 1 + +define i16 @f1(i16 %a, i16* %v) { + store i16 %a, i16* %v + ret i16 %a +} + +define i16 @f2(i16 %a, i16* %v) { + %tmp2 = getelementptr i16* %v, i32 2046 + store i16 %a, i16* %tmp2 + ret i16 %a +} + +define i16 @f2a(i16 %a, i16* %v) { + %tmp2 = getelementptr i16* %v, i32 -64 + store i16 %a, i16* %tmp2 + ret i16 %a +} + +define i16 @f3(i16 %a, i16* %v) { + %tmp2 = getelementptr i16* %v, i32 2048 + store i16 %a, i16* %tmp2 + ret i16 %a +} + +define i16 @f4(i16 %a, i32 %base) { +entry: + %tmp1 = sub i32 %base, 128 + %tmp2 = inttoptr i32 %tmp1 to i16* + store i16 %a, i16* %tmp2 + ret i16 %a +} + +define i16 @f5(i16 %a, i32 %base, i32 %offset) { +entry: + %tmp1 = add i32 %base, %offset + %tmp2 = inttoptr i32 %tmp1 to i16* + store i16 %a, i16* %tmp2 + ret i16 %a +} + +define i16 @f6(i16 %a, i32 %base, i32 %offset) { +entry: + %tmp1 = shl i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i16* + store i16 %a, i16* %tmp3 + ret i16 %a +} + +define i16 @f7(i16 %a, i32 %base, i32 %offset) { +entry: + %tmp1 = lshr i32 %offset, 2 + %tmp2 = add i32 %base, %tmp1 + %tmp3 = inttoptr i32 %tmp2 to i16* + store i16 %a, i16* %tmp3 + ret i16 %a +} From evan.cheng at apple.com Tue Jun 30 17:25:02 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 30 Jun 2009 15:25:02 -0700 Subject: [llvm-commits] [PATCH] SVR4 ABI support for the PowerPC backend In-Reply-To: References: Message-ID: <7313C026-43B9-4990-A4B6-1A78909E4B67@apple.com> Dale, can you review? Thanks, Evan On Jun 27, 2009, at 8:15 AM, Tilmann Scheller wrote: > Hello, > > attached is a series of patches which implement the SVR4 ABI for > PowerPC. Patches were made against revision 74382 and need to be > applied in order. A patch which adds SVR4 support to llvm-gcc will > follow soon. > > The current state of LLVM on 32-bit PowerPC Linux: > compat.exp passes all tests (those are the ABI tests from the GCC > test suite) > C-only nightly tester results: 1638 TEST-PASS / 96 TEST-FAIL > llvm-gcc bootstraps at -O0 with a stage 2/3 comparison failure of > varasm.o > > These patches were not tested on Darwin PPC, so it would be really > great if someone with a Darwin PPC nightly tester (Evan? :) ) could > make a run with the patches applied. Just to make sure that I did not > introduce any major regressions :) > > Feedback welcome! > > Greetings, > > Tilmann > <0001-Small-cleanups-in-the-PowerPC-backend.patch><0002-Add- > NumFixedArgs-attribute-to-CallSDNode-which-indic.patch><0003- > Implement-the-SVR4-ABI-for-PowerPC.patch><0004-Refactor-ABI-code-in- > the-PowerPC- > backend.patch>_______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From kremenek at apple.com Tue Jun 30 17:26:32 2009 From: kremenek at apple.com (Ted Kremenek) Date: Tue, 30 Jun 2009 22:26:32 -0000 Subject: [llvm-commits] [llvm] r74557 - /llvm/tags/checker/checker-0.212/ Message-ID: <200906302226.n5UMQW9l030612@zion.cs.uiuc.edu> Author: kremenek Date: Tue Jun 30 17:26:32 2009 New Revision: 74557 URL: http://llvm.org/viewvc/llvm-project?rev=74557&view=rev Log: Removing checker-0.212. Removed: llvm/tags/checker/checker-0.212/ From kremenek at apple.com Tue Jun 30 17:32:13 2009 From: kremenek at apple.com (Ted Kremenek) Date: Tue, 30 Jun 2009 22:32:13 -0000 Subject: [llvm-commits] [llvm] r74560 - /llvm/tags/checker/checker-0.212/ Message-ID: <200906302232.n5UMWDOR030791@zion.cs.uiuc.edu> Author: kremenek Date: Tue Jun 30 17:32:12 2009 New Revision: 74560 URL: http://llvm.org/viewvc/llvm-project?rev=74560&view=rev Log: Tagging checker-0.212. Added: llvm/tags/checker/checker-0.212/ - copied from r74559, llvm/trunk/ From sabre at nondot.org Tue Jun 30 17:33:54 2009 From: sabre at nondot.org (Chris Lattner) Date: Tue, 30 Jun 2009 22:33:54 -0000 Subject: [llvm-commits] [compiler-rt] r74562 - /compiler-rt/trunk/www/ Message-ID: <200906302233.n5UMXs2O030852@zion.cs.uiuc.edu> Author: lattner Date: Tue Jun 30 17:33:54 2009 New Revision: 74562 URL: http://llvm.org/viewvc/llvm-project?rev=74562&view=rev Log: add directory for web page. Added: compiler-rt/trunk/www/ From isanbard at gmail.com Tue Jun 30 17:38:32 2009 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 30 Jun 2009 22:38:32 -0000 Subject: [llvm-commits] [llvm] r74564 - in /llvm/trunk: include/llvm/CodeGen/ include/llvm/Target/ lib/CodeGen/ lib/Target/ARM/ lib/Target/ARM/AsmPrinter/ lib/Target/Alpha/ lib/Target/Alpha/AsmPrinter/ lib/Target/CellSPU/ lib/Target/CellSPU/AsmPrinter/ lib/Target/IA64/ lib/Target/IA64/AsmPrinter/ lib/Target/MSP430/ lib/Target/Mips/ lib/Target/Mips/AsmPrinter/ lib/Target/PIC16/ lib/Target/PowerPC/ lib/Target/PowerPC/AsmPrinter/ lib/Target/Sparc/ lib/Target/Sparc/AsmPrinter/ lib/Target/X86/ lib/Target/X86/AsmPrinter/ lib/Target/X... Message-ID: <200906302238.n5UMcY5I031037@zion.cs.uiuc.edu> Author: void Date: Tue Jun 30 17:38:32 2009 New Revision: 74564 URL: http://llvm.org/viewvc/llvm-project?rev=74564&view=rev Log: Add an "alignment" field to the MachineFunction object. It makes more sense to have the alignment be calculated up front, and have the back-ends obey whatever alignment is decided upon. This allows for future work that would allow for precise no-op placement and the like. Modified: llvm/trunk/include/llvm/CodeGen/MachineFunction.h llvm/trunk/include/llvm/Target/TargetLowering.h llvm/trunk/lib/CodeGen/MachineFunction.cpp llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp llvm/trunk/lib/Target/ARM/ARMISelLowering.h llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp llvm/trunk/lib/Target/Alpha/AlphaISelLowering.h llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp llvm/trunk/lib/Target/CellSPU/SPUISelLowering.h llvm/trunk/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp llvm/trunk/lib/Target/IA64/IA64ISelLowering.h llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.h llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp llvm/trunk/lib/Target/Mips/MipsISelLowering.h llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.h llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h llvm/trunk/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp llvm/trunk/lib/Target/Sparc/SparcISelLowering.h llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.h llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp llvm/trunk/lib/Target/XCore/XCoreISelLowering.h Modified: llvm/trunk/include/llvm/CodeGen/MachineFunction.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineFunction.h?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/MachineFunction.h (original) +++ llvm/trunk/include/llvm/CodeGen/MachineFunction.h Tue Jun 30 17:38:32 2009 @@ -111,6 +111,9 @@ // Tracks debug locations. DebugLocTracker DebugLocInfo; + // The alignment of the function. + unsigned Alignment; + public: MachineFunction(const Function *Fn, const TargetMachine &TM); ~MachineFunction(); @@ -148,6 +151,14 @@ MachineConstantPool *getConstantPool() { return ConstantPool; } const MachineConstantPool *getConstantPool() const { return ConstantPool; } + /// getAlignment - Return the alignment of the function. + /// + unsigned getAlignment() const { return Alignment; } + + /// setAlignment - Set the alignment of the function. + /// + void setAlignment(unsigned A) { Alignment = A; } + /// MachineFunctionInfo - Keep track of various per-function pieces of /// information for backends that would like to do so. /// Modified: llvm/trunk/include/llvm/Target/TargetLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetLowering.h (original) +++ llvm/trunk/include/llvm/Target/TargetLowering.h Tue Jun 30 17:38:32 2009 @@ -736,6 +736,9 @@ /// PIC relocation models. virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const; + /// getFunctionAlignment - Return the alignment of this function. + virtual unsigned getFunctionAlignment(const Function *) const = 0; + //===--------------------------------------------------------------------===// // TargetLowering Optimization Methods // Modified: llvm/trunk/lib/CodeGen/MachineFunction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineFunction.cpp?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineFunction.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineFunction.cpp Tue Jun 30 17:38:32 2009 @@ -14,6 +14,10 @@ //===----------------------------------------------------------------------===// #include "llvm/DerivedTypes.h" +#include "llvm/Function.h" +#include "llvm/Instructions.h" +#include "llvm/ADT/STLExtras.h" +#include "llvm/Config/config.h" #include "llvm/CodeGen/MachineConstantPool.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineFrameInfo.h" @@ -22,15 +26,12 @@ #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/Passes.h" #include "llvm/Target/TargetData.h" +#include "llvm/Target/TargetLowering.h" #include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetFrameInfo.h" -#include "llvm/Function.h" -#include "llvm/Instructions.h" #include "llvm/Support/Compiler.h" #include "llvm/Support/GraphWriter.h" #include "llvm/Support/raw_ostream.h" -#include "llvm/ADT/STLExtras.h" -#include "llvm/Config/config.h" #include #include using namespace llvm; @@ -124,6 +125,7 @@ MachineFrameInfo(*TM.getFrameInfo()); ConstantPool = new (Allocator.Allocate()) MachineConstantPool(TM.getTargetData()); + Alignment = TM.getTargetLowering()->getFunctionAlignment(F); // Set up jump table. const TargetData &TD = *TM.getTargetData(); Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Tue Jun 30 17:38:32 2009 @@ -455,6 +455,11 @@ } } +/// getFunctionAlignment - Return the alignment of this function. +unsigned ARMTargetLowering::getFunctionAlignment(const Function *F) const { + return getTargetMachine().getSubtarget().isThumb() ? 1 : 2; +} + //===----------------------------------------------------------------------===// // Lowering Code //===----------------------------------------------------------------------===// Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.h?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelLowering.h (original) +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.h Tue Jun 30 17:38:32 2009 @@ -197,6 +197,9 @@ return Subtarget; } + /// getFunctionAlignment - Return the alignment of this function. + virtual unsigned getFunctionAlignment(const Function *F) const; + private: /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can /// make the right decision when generating code for different targets. Modified: llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp Tue Jun 30 17:38:32 2009 @@ -235,15 +235,16 @@ printVisibility(CurrentFnName, F->getVisibility()); if (AFI->isThumbFunction()) { - EmitAlignment(1, F, AFI->getAlign()); + EmitAlignment(MF.getAlignment(), F, AFI->getAlign()); O << "\t.code\t16\n"; O << "\t.thumb_func"; if (Subtarget->isTargetDarwin()) O << "\t" << CurrentFnName; O << "\n"; InCPMode = false; - } else - EmitAlignment(2, F); + } else { + EmitAlignment(MF.getAlignment(), F); + } O << CurrentFnName << ":\n"; // Emit pre-function debug information. Modified: llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp (original) +++ llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp Tue Jun 30 17:38:32 2009 @@ -181,6 +181,11 @@ } } +/// getFunctionAlignment - Return the function alignment. +unsigned AlphaTargetLowering::getFunctionAlignment(const Function *F) const { + return 4; +} + static SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) { MVT PtrVT = Op.getValueType(); JumpTableSDNode *JT = cast(Op); Modified: llvm/trunk/lib/Target/Alpha/AlphaISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaISelLowering.h?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/lib/Target/Alpha/AlphaISelLowering.h (original) +++ llvm/trunk/lib/Target/Alpha/AlphaISelLowering.h Tue Jun 30 17:38:32 2009 @@ -103,6 +103,9 @@ virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const; + /// getFunctionAlignment - Return the function alignment. + virtual unsigned getFunctionAlignment(const Function *F) const; + private: // Helpers for custom lowering. void LowerVAARG(SDNode *N, SDValue &Chain, SDValue &DataPtr, Modified: llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp Tue Jun 30 17:38:32 2009 @@ -155,7 +155,7 @@ const Function *F = MF.getFunction(); SwitchToSection(TAI->SectionForGlobal(F)); - EmitAlignment(4, F); + EmitAlignment(MF.getAlignment(), F); switch (F->getLinkage()) { default: assert(0 && "Unknown linkage type!"); case Function::InternalLinkage: // Symbols default to internal. Modified: llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp Tue Jun 30 17:38:32 2009 @@ -433,7 +433,7 @@ const Function *F = MF.getFunction(); SwitchToSection(TAI->SectionForGlobal(F)); - EmitAlignment(3, F); + EmitAlignment(MF.getAlignment(), F); switch (F->getLinkage()) { default: assert(0 && "Unknown linkage type!"); Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Tue Jun 30 17:38:32 2009 @@ -481,6 +481,11 @@ return ((i != node_names.end()) ? i->second : 0); } +/// getFunctionAlignment - Return the function alignment. +unsigned SPUTargetLowering::getFunctionAlignment(const Function *) const { + return 3; +} + //===----------------------------------------------------------------------===// // Return the Cell SPU's SETCC result type //===----------------------------------------------------------------------===// Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.h?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.h (original) +++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.h Tue Jun 30 17:38:32 2009 @@ -148,6 +148,9 @@ virtual bool isLegalAddressImmediate(GlobalValue *) const; virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const; + + /// getFunctionAlignment - Return the function alignment. + virtual unsigned getFunctionAlignment(const Function *F) const; }; } Modified: llvm/trunk/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp Tue Jun 30 17:38:32 2009 @@ -137,7 +137,7 @@ SwitchToSection(TAI->SectionForGlobal(F)); // Print out labels for the function. - EmitAlignment(5); + EmitAlignment(MF.getAlignment()); O << "\t.global\t" << CurrentFnName << '\n'; printVisibility(CurrentFnName, F->getVisibility()); Modified: llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp Tue Jun 30 17:38:32 2009 @@ -148,6 +148,11 @@ return MVT::i1; } +/// getFunctionAlignment - Return the function alignment. +unsigned IA64TargetLowering::getFunctionAlignment(const Function *) const { + return 5; +} + void IA64TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG, SmallVectorImpl &ArgValues, DebugLoc dl) { Modified: llvm/trunk/lib/Target/IA64/IA64ISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64ISelLowering.h?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/lib/Target/IA64/IA64ISelLowering.h (original) +++ llvm/trunk/lib/Target/IA64/IA64ISelLowering.h Tue Jun 30 17:38:32 2009 @@ -70,6 +70,8 @@ /// (currently, only "ret void") virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG); + /// getFunctionAlignment - Return the function alignment. + virtual unsigned getFunctionAlignment(const Function *F) const; }; } Modified: llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp Tue Jun 30 17:38:32 2009 @@ -97,10 +97,7 @@ SwitchToSection(TAI->SectionForGlobal(F)); - unsigned FnAlign = 4; - if (F->hasFnAttr(Attribute::OptimizeForSize)) - FnAlign = 1; - + unsigned FnAlign = MF.getAlignment(); EmitAlignment(FnAlign, F); switch (F->getLinkage()) { Modified: llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp Tue Jun 30 17:38:32 2009 @@ -127,6 +127,11 @@ } } +/// getFunctionAlignment - Return the alignment of this function. +unsigned MSP430TargetLowering::getFunctionAlignment(const Function *F) const { + return F->hasFnAttr(Attribute::OptimizeForSize) ? 1 : 4; +} + //===----------------------------------------------------------------------===// // Calling Convention Implementation //===----------------------------------------------------------------------===// Modified: llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.h?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.h (original) +++ llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.h Tue Jun 30 17:38:32 2009 @@ -74,6 +74,9 @@ /// DAG node. virtual const char *getTargetNodeName(unsigned Opcode) const; + /// getFunctionAlignment - Return the alignment of this function. + virtual unsigned getFunctionAlignment(const Function *F) const; + SDValue LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG); SDValue LowerCALL(SDValue Op, SelectionDAG &DAG); SDValue LowerRET(SDValue Op, SelectionDAG &DAG); Modified: llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp Tue Jun 30 17:38:32 2009 @@ -230,7 +230,7 @@ SwitchToSection(TAI->SectionForGlobal(F)); // 2 bits aligned - EmitAlignment(2, F); + EmitAlignment(MF.getAlignment(), F); O << "\t.globl\t" << CurrentFnName << '\n'; O << "\t.ent\t" << CurrentFnName << '\n'; Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Tue Jun 30 17:38:32 2009 @@ -154,11 +154,14 @@ computeRegisterProperties(); } - MVT MipsTargetLowering::getSetCCResultType(MVT VT) const { return MVT::i32; } +/// getFunctionAlignment - Return the function alignment. +unsigned MipsTargetLowering::getFunctionAlignment(const Function *) const { + return 2; +} SDValue MipsTargetLowering:: LowerOperation(SDValue Op, SelectionDAG &DAG) Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.h?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsISelLowering.h (original) +++ llvm/trunk/lib/Target/Mips/MipsISelLowering.h Tue Jun 30 17:38:32 2009 @@ -84,6 +84,8 @@ /// getSetCCResultType - get the ISD::SETCC result ValueType MVT getSetCCResultType(MVT VT) const; + /// getFunctionAlignment - Return the function alignment. + virtual unsigned getFunctionAlignment(const Function *F) const; private: // Subtarget Info const MipsSubtarget *Subtarget; Modified: llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.h?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.h (original) +++ llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.h Tue Jun 30 17:38:32 2009 @@ -145,6 +145,11 @@ unsigned GetTmpSize() { return TmpSize; } void SetTmpSize(unsigned Size) { TmpSize = Size; } + /// getFunctionAlignment - Return the function alignment. + virtual unsigned getFunctionAlignment(const Function *) const { + // FIXME: The function never seems to be aligned. + return 1; + } private: // If the Node is a BUILD_PAIR representing a direct Address, // then this function will return true. Modified: llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp Tue Jun 30 17:38:32 2009 @@ -596,7 +596,7 @@ printVisibility(CurrentFnName, F->getVisibility()); - EmitAlignment(2, F); + EmitAlignment(MF.getAlignment(), F); O << CurrentFnName << ":\n"; // Emit pre-function debug information. @@ -773,7 +773,7 @@ printVisibility(CurrentFnName, F->getVisibility()); - EmitAlignment(F->hasFnAttr(Attribute::OptimizeForSize) ? 2 : 4, F); + EmitAlignment(MF.getAlignment(), F); O << CurrentFnName << ":\n"; // Emit pre-function debug information. Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Tue Jun 30 17:38:32 2009 @@ -428,11 +428,17 @@ } } - MVT PPCTargetLowering::getSetCCResultType(MVT VT) const { return MVT::i32; } +/// getFunctionAlignment - Return the function alignment. +unsigned PPCTargetLowering::getFunctionAlignment(const Function *F) const { + if (getTargetMachine().getSubtarget().isDarwin()) + return F->hasFnAttr(Attribute::OptimizeForSize) ? 2 : 4; + else + return 2; +} //===----------------------------------------------------------------------===// // Node matching predicates, for use by the tblgen matching code. Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h (original) +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h Tue Jun 30 17:38:32 2009 @@ -337,6 +337,9 @@ virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const; + /// getFunctionAlignment - Return the function alignment. + virtual unsigned getFunctionAlignment(const Function *F) const; + private: SDValue getFramePointerFrameIndex(SelectionDAG & DAG) const; SDValue getReturnAddrFrameIndex(SelectionDAG & DAG) const; Modified: llvm/trunk/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp Tue Jun 30 17:38:32 2009 @@ -109,7 +109,7 @@ // Print out the label for the function. const Function *F = MF.getFunction(); SwitchToSection(TAI->SectionForGlobal(F)); - EmitAlignment(4, F); + EmitAlignment(MF.getAlignment(), F); O << "\t.globl\t" << CurrentFnName << '\n'; printVisibility(CurrentFnName, F->getVisibility()); Modified: llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp (original) +++ llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp Tue Jun 30 17:38:32 2009 @@ -1047,3 +1047,8 @@ // The Sparc target isn't yet aware of offsets. return false; } + +/// getFunctionAlignment - Return the function alignment. +unsigned SparcTargetLowering::getFunctionAlignment(const Function *) const { + return 4; +} Modified: llvm/trunk/lib/Target/Sparc/SparcISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcISelLowering.h?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/lib/Target/Sparc/SparcISelLowering.h (original) +++ llvm/trunk/lib/Target/Sparc/SparcISelLowering.h Tue Jun 30 17:38:32 2009 @@ -73,6 +73,9 @@ MVT VT) const; virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const; + + /// getFunctionAlignment - Return the function alignment. + virtual unsigned getFunctionAlignment(const Function *F) const; }; } // end namespace llvm Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Tue Jun 30 17:38:32 2009 @@ -154,21 +154,13 @@ } } - - void X86ATTAsmPrinter::emitFunctionHeader(const MachineFunction &MF) { + unsigned FnAlign = MF.getAlignment(); const Function *F = MF.getFunction(); decorateName(CurrentFnName, F); SwitchToSection(TAI->SectionForGlobal(F)); - - // FIXME: A function's alignment should be part of MachineFunction. There - // shouldn't be a policy decision here. - unsigned FnAlign = 4; - if (F->hasFnAttr(Attribute::OptimizeForSize)) - FnAlign = 1; - switch (F->getLinkage()) { default: assert(0 && "Unknown linkage type!"); case Function::InternalLinkage: // Symbols default to internal. Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp Tue Jun 30 17:38:32 2009 @@ -132,6 +132,7 @@ // Print out labels for the function. const Function *F = MF.getFunction(); unsigned CC = F->getCallingConv(); + unsigned FnAlign = MF.getAlignment(); // Populate function information map. Actually, We don't want to populate // non-stdcall or non-fastcall functions' information right now. @@ -141,10 +142,6 @@ decorateName(CurrentFnName, F); SwitchToTextSection("_text", F); - - unsigned FnAlign = 4; - if (F->hasFnAttr(Attribute::OptimizeForSize)) - FnAlign = 1; switch (F->getLinkage()) { default: assert(0 && "Unsupported linkage type!"); case Function::PrivateLinkage: Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Jun 30 17:38:32 2009 @@ -1027,6 +1027,11 @@ return Table; } +/// getFunctionAlignment - Return the alignment of this function. +unsigned X86TargetLowering::getFunctionAlignment(const Function *F) const { + return F->hasFnAttr(Attribute::OptimizeForSize) ? 1 : 4; +} + //===----------------------------------------------------------------------===// // Return Value Calling Convention Implementation //===----------------------------------------------------------------------===// Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Tue Jun 30 17:38:32 2009 @@ -380,7 +380,7 @@ MVT getOptimalMemOpType(uint64_t Size, unsigned Align, bool isSrcConst, bool isSrcStr, SelectionDAG &DAG) const; - + /// LowerOperation - Provide custom lowering hooks for some operations. /// virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG); @@ -533,7 +533,10 @@ , SmallSet & #endif ); - + + /// getFunctionAlignment - Return the alignment of this function. + virtual unsigned getFunctionAlignment(const Function *F) const; + private: /// Subtarget - Keep a pointer to the X86Subtarget around so that we can /// make the right decision when generating code for different targets. Modified: llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp Tue Jun 30 17:38:32 2009 @@ -277,7 +277,7 @@ break; } // (1 << 1) byte aligned - EmitAlignment(1, F, 1); + EmitAlignment(MF.getAlignment(), F, 1); if (TAI->hasDotTypeDotSizeDirective()) { O << "\t.type " << CurrentFnName << ", at function\n"; } Modified: llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp (original) +++ llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp Tue Jun 30 17:38:32 2009 @@ -187,6 +187,12 @@ } } +/// getFunctionAlignment - Return the alignment of this function. +unsigned XCoreTargetLowering:: +getFunctionAlignment(const Function *) const { + return 1; +} + //===----------------------------------------------------------------------===// // Misc Lower Operation implementation //===----------------------------------------------------------------------===// Modified: llvm/trunk/lib/Target/XCore/XCoreISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreISelLowering.h?rev=74564&r1=74563&r2=74564&view=diff ============================================================================== --- llvm/trunk/lib/Target/XCore/XCoreISelLowering.h (original) +++ llvm/trunk/lib/Target/XCore/XCoreISelLowering.h Tue Jun 30 17:38:32 2009 @@ -84,6 +84,9 @@ virtual bool isLegalAddressingMode(const AddrMode &AM, const Type *Ty) const; + /// getFunctionAlignment - Return the alignment of this function. + virtual unsigned getFunctionAlignment(const Function *F) const; + private: const XCoreTargetMachine &TM; const XCoreSubtarget &Subtarget; From resistor at mac.com Tue Jun 30 17:40:07 2009 From: resistor at mac.com (Owen Anderson) Date: Tue, 30 Jun 2009 15:40:07 -0700 Subject: [llvm-commits] [PATCH] Add an LLVMContext member to Module Message-ID: <4060B161-5D56-4BD3-BE4E-55129CC6C901@mac.com> Here's the first of many patches related to pushing LLVMContext through the existing APIs. This adds an LLVMContext member to each Module, which involves threading LLVMContext through large parts of the bitcode reader, the ASM parser, and all of the tools. --Owen -------------- next part -------------- A non-text attachment was scrubbed... Name: llvm-context.diff Type: application/octet-stream Size: 78053 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090630/73e18718/attachment.obj From daniel at zuster.org Tue Jun 30 17:49:27 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Tue, 30 Jun 2009 22:49:27 -0000 Subject: [llvm-commits] [llvm] r74565 - in /llvm/trunk: include/llvm/MC/MCValue.h test/MC/AsmParser/exprs.s tools/llvm-mc/AsmExpr.cpp Message-ID: <200906302249.n5UMnRqN031401@zion.cs.uiuc.edu> Author: ddunbar Date: Tue Jun 30 17:49:27 2009 New Revision: 74565 URL: http://llvm.org/viewvc/llvm-project?rev=74565&view=rev Log: llvm-mc: Symbols in a relocatable expression of the (a - b + cst) form are allowed to be undefined when the expression is seen, we cannot enforce the same-section requirement until the entire assembly file has been seen. Modified: llvm/trunk/include/llvm/MC/MCValue.h llvm/trunk/test/MC/AsmParser/exprs.s llvm/trunk/tools/llvm-mc/AsmExpr.cpp Modified: llvm/trunk/include/llvm/MC/MCValue.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCValue.h?rev=74565&r1=74564&r2=74565&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCValue.h (original) +++ llvm/trunk/include/llvm/MC/MCValue.h Tue Jun 30 17:49:27 2009 @@ -26,7 +26,8 @@ /// relocations of this general form, but we need to represent this anyway. /// /// In the general form, SymbolB can only be defined if SymbolA is, and both -/// must be in the same (non-external) section. +/// must be in the same (non-external) section. The latter constraint is not +/// enforced, since a symbol's section may not be known at construction. /// /// Note that this class must remain a simple POD value class, because we need /// it to live in unions etc. @@ -52,9 +53,7 @@ static MCValue get(MCSymbol *SymA, MCSymbol *SymB = 0, int64_t Val = 0) { MCValue R; - assert((!SymB || (SymA && SymA->getSection() && - SymA->getSection() == SymB->getSection())) && - "Invalid relocatable MCValue!"); + assert((!SymB || SymA) && "Invalid relocatable MCValue!"); R.Cst = Val; R.SymA = SymA; R.SymB = SymB; Modified: llvm/trunk/test/MC/AsmParser/exprs.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AsmParser/exprs.s?rev=74565&r1=74564&r2=74565&view=diff ============================================================================== --- llvm/trunk/test/MC/AsmParser/exprs.s (original) +++ llvm/trunk/test/MC/AsmParser/exprs.s Tue Jun 30 17:49:27 2009 @@ -52,4 +52,11 @@ i = (j + 10) - (k + 2) .long i + l = m - n + 4 + + .text +m: +n: + nop + \ No newline at end of file Modified: llvm/trunk/tools/llvm-mc/AsmExpr.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/AsmExpr.cpp?rev=74565&r1=74564&r2=74565&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/AsmExpr.cpp (original) +++ llvm/trunk/tools/llvm-mc/AsmExpr.cpp Tue Jun 30 17:49:27 2009 @@ -37,12 +37,11 @@ MCSymbol *A = LHS.getSymA() ? LHS.getSymA() : RHS_A; MCSymbol *B = LHS.getSymB() ? LHS.getSymB() : RHS_B; if (B) { - // If we have a negated symbol, then we must have also have a - // non-negated symbol, and both symbols must be in the same - // non-external section. We can do this check later to permit - // expressions which eventually fold to a representable form -- such + // If we have a negated symbol, then we must have also have a non-negated + // symbol in order to encode the expression. We can do this check later to + // permit expressions which eventually fold to a representable form -- such // as (a + (0 - b)) -- if necessary. - if (!A || !A->getSection() || A->getSection() != B->getSection()) + if (!A) return false; } Res = MCValue::get(A, B, LHS.getConstant() + RHS_Cst); From david_goodwin at apple.com Tue Jun 30 17:50:01 2009 From: david_goodwin at apple.com (David Goodwin) Date: Tue, 30 Jun 2009 22:50:01 -0000 Subject: [llvm-commits] [llvm] r74566 - in /llvm/trunk/lib/Target/ARM: ARMISelDAGToDAG.cpp ARMInstrThumb2.td Message-ID: <200906302250.n5UMo1rW031433@zion.cs.uiuc.edu> Author: david_goodwin Date: Tue Jun 30 17:50:01 2009 New Revision: 74566 URL: http://llvm.org/viewvc/llvm-project?rev=74566&view=rev Log: Thumb-2 load and store double description. But nothing yet creates them. Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp?rev=74566&r1=74565&r2=74566&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp Tue Jun 30 17:50:01 2009 @@ -100,6 +100,8 @@ SDValue &OffImm); bool SelectT2AddrModeImm8(SDValue Op, SDValue N, SDValue &Base, SDValue &OffImm); + bool SelectT2AddrModeImm8s4(SDValue Op, SDValue N, SDValue &Base, + SDValue &OffImm); bool SelectT2AddrModeSoReg(SDValue Op, SDValue N, SDValue &Base, SDValue &OffReg, SDValue &ShImm); @@ -613,6 +615,31 @@ return false; } +bool ARMDAGToDAGISel::SelectT2AddrModeImm8s4(SDValue Op, SDValue N, + SDValue &Base, SDValue &OffImm) { + if (N.getOpcode() == ISD::ADD) { + if (ConstantSDNode *RHS = dyn_cast(N.getOperand(1))) { + int RHSC = (int)RHS->getZExtValue(); + if (((RHSC & 0x3) == 0) && (RHSC < 0 && RHSC > -0x400)) { // 8 bits. + Base = N.getOperand(0); + OffImm = CurDAG->getTargetConstant(RHSC, MVT::i32); + return true; + } + } + } else if (N.getOpcode() == ISD::SUB) { + if (ConstantSDNode *RHS = dyn_cast(N.getOperand(1))) { + int RHSC = (int)RHS->getZExtValue(); + if (((RHSC & 0x3) == 0) && (RHSC >= 0 && RHSC < 0x400)) { // 8 bits. + Base = N.getOperand(0); + OffImm = CurDAG->getTargetConstant(-RHSC, MVT::i32); + return true; + } + } + } + + return false; +} + bool ARMDAGToDAGISel::SelectT2AddrModeSoReg(SDValue Op, SDValue N, SDValue &Base, SDValue &OffReg, SDValue &ShImm) { Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=74566&r1=74565&r2=74566&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Tue Jun 30 17:50:01 2009 @@ -143,6 +143,13 @@ let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm); } +// t2addrmode_imm8s4 := reg + (imm8 << 2) +def t2addrmode_imm8s4 : Operand, + ComplexPattern { + let PrintMethod = "printT2AddrModeImm8Operand"; + let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm); +} + // t2addrmode_so_reg := reg + reg << imm2 def t2addrmode_so_reg : Operand, ComplexPattern { @@ -476,7 +483,7 @@ let mayLoad = 1 in { // Load doubleword -def t2LDRDi8 : T2Ii8s4<(outs GPR:$dst), (ins t2addrmode_imm8:$addr), +def t2LDRDi8 : T2Ii8s4<(outs GPR:$dst), (ins t2addrmode_imm8s4:$addr), "ldrd", " $dst, $addr", []>; def t2LDRDpci : T2Ii8s4<(outs GPR:$dst), (ins i32imm:$addr), "ldrd", " $dst, $addr", []>; @@ -527,6 +534,11 @@ defm t2STRB : T2I_st<"strb", BinOpFrag<(truncstorei8 node:$LHS, node:$RHS)>>; defm t2STRH : T2I_st<"strh", BinOpFrag<(truncstorei16 node:$LHS, node:$RHS)>>; +// Store doubleword +let mayLoad = 1 in +def t2STRDi8 : T2Ii8s4<(outs), (ins GPR:$src, t2addrmode_imm8s4:$addr), + "strd", " $src, $addr", []>; + //===----------------------------------------------------------------------===// // Move Instructions. // From sabre at nondot.org Tue Jun 30 17:56:43 2009 From: sabre at nondot.org (Chris Lattner) Date: Tue, 30 Jun 2009 22:56:43 -0000 Subject: [llvm-commits] [compiler-rt] r74567 - in /compiler-rt/trunk/www: content.css index.html menu.css menu.html.incl Message-ID: <200906302256.n5UMuhlk031639@zion.cs.uiuc.edu> Author: lattner Date: Tue Jun 30 17:56:43 2009 New Revision: 74567 URL: http://llvm.org/viewvc/llvm-project?rev=74567&view=rev Log: initial web page for compiler_rt Added: compiler-rt/trunk/www/content.css compiler-rt/trunk/www/index.html compiler-rt/trunk/www/menu.css compiler-rt/trunk/www/menu.html.incl Added: compiler-rt/trunk/www/content.css URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/www/content.css?rev=74567&view=auto ============================================================================== --- compiler-rt/trunk/www/content.css (added) +++ compiler-rt/trunk/www/content.css Tue Jun 30 17:56:43 2009 @@ -0,0 +1,25 @@ +html, body { + padding:0px; + font-size:small; font-family:"Lucida Grande", "Lucida Sans Unicode", Arial, Verdana, Helvetica, sans-serif; background-color: #fff; color: #222; + line-height:1.5; +} + +h1, h2, h3, tt { color: #000 } + +h1 { padding-top:0px; margin-top:0px;} +h2 { color:#333333; padding-top:0.5em; } +h3 { padding-top: 0.5em; margin-bottom: -0.25em; color:#2d58b7} +li { padding-bottom: 0.5em; } +ul { padding-left:1.5em; } + +/* Slides */ +IMG.img_slide { + display: block; + margin-left: auto; + margin-right: auto +} + +.itemTitle { color:#2d58b7 } + +/* Tables */ +tr { vertical-align:top } Added: compiler-rt/trunk/www/index.html URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/www/index.html?rev=74567&view=auto ============================================================================== --- compiler-rt/trunk/www/index.html (added) +++ compiler-rt/trunk/www/index.html Tue Jun 30 17:56:43 2009 @@ -0,0 +1,67 @@ + + + + + + "compiler_rt" Runtime Library + + + + + +
    + +

    "compiler_rt" Runtime Library

    + + +

    The compiler_rt project is a simple library that provides an implementation + of the low-level target-specific hooks required by code generation and + other runtime components. For example, when compiling for a 32-bit target, + converting a double to a 64-bit unsigned integer is compiling into a runtime + call to the "__fixunsdfdi" function. The compiler_rt library provides + optimized implementations of this and other low-level routines.

    + + +

    Goals

    + + +

    Different targets require different routines. The compiler_rt project aims + to implement these routines in both target-independent C form as well as + providing heavily optimized assembly versions of the routines in some + cases. It should be very easy to bring compiler_rt to support a new + target by adding the new routines needed by that target.

    + +

    Where it make sense, the compiler_rt project aims to implement interfaces + that are drop-in compatible with the libgcc interfaces.

    + + +

    Features

    + + +

    The current feature set of compiler_rt is:

    + +
      +
    • Full support for the libgcc interfaces required by these targets: +
        +
      • Darwin i386
        • +
      • Darwin X86-64
        • +
      • Darwin PowerPC
        • +
      • Darwin PowerPC 64
        • +
      • + +
    • High performance hand tuned implementations of commonly used functions + like __floatundidf in assembly that are dramatically faster than the + libgcc implementations.
      • +
    • A target-independent implementation of the Apple "Blocks" runtime + interfaces.
      • +
    + + +

    Get it and get involved!

    + + +

    TODO.

    +
    + + Added: compiler-rt/trunk/www/menu.css URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/www/menu.css?rev=74567&view=auto ============================================================================== --- compiler-rt/trunk/www/menu.css (added) +++ compiler-rt/trunk/www/menu.css Tue Jun 30 17:56:43 2009 @@ -0,0 +1,39 @@ +/***************/ +/* page layout */ +/***************/ + +[id=menu] { + position:fixed; + width:25ex; +} +[id=content] { + /* ***** EDIT THIS VALUE IF CONTENT OVERLAPS MENU ***** */ + position:absolute; + left:29ex; + padding-right:4ex; +} + +/**************/ +/* menu style */ +/**************/ + +#menu .submenu { + padding-top:1em; + display:block; +} + +#menu label { + display:block; + font-weight: bold; + text-align: center; + background-color: rgb(192,192,192); +} +#menu a { + padding:0 .2em; + display:block; + text-align: center; + background-color: rgb(235,235,235); +} +#menu a:visited { + color:rgb(100,50,100); +} \ No newline at end of file Added: compiler-rt/trunk/www/menu.html.incl URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/www/menu.html.incl?rev=74567&view=auto ============================================================================== --- compiler-rt/trunk/www/menu.html.incl (added) +++ compiler-rt/trunk/www/menu.html.incl Tue Jun 30 17:56:43 2009 @@ -0,0 +1,19 @@ + From daniel at zuster.org Tue Jun 30 18:02:44 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Tue, 30 Jun 2009 23:02:44 -0000 Subject: [llvm-commits] [llvm] r74568 - /llvm/trunk/tools/llvm-mc/MC-X86Specific.cpp Message-ID: <200906302302.n5UN2i7T031825@zion.cs.uiuc.edu> Author: ddunbar Date: Tue Jun 30 18:02:44 2009 New Revision: 74568 URL: http://llvm.org/viewvc/llvm-project?rev=74568&view=rev Log: llvm-mc: Accept relocatable expressions when parsing displacements and immediates. Modified: llvm/trunk/tools/llvm-mc/MC-X86Specific.cpp Modified: llvm/trunk/tools/llvm-mc/MC-X86Specific.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/MC-X86Specific.cpp?rev=74568&r1=74567&r2=74568&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/MC-X86Specific.cpp (original) +++ llvm/trunk/tools/llvm-mc/MC-X86Specific.cpp Tue Jun 30 18:02:44 2009 @@ -30,13 +30,12 @@ } Reg; struct { - // FIXME: Should be a general expression. - int64_t Val; + MCValue Val; } Imm; struct { unsigned SegReg; - int64_t Disp; // FIXME: Should be a general expression. + MCValue Disp; unsigned BaseReg; unsigned Scale; unsigned ScaleReg; @@ -49,13 +48,13 @@ Res.Reg.RegNo = RegNo; return Res; } - static X86Operand CreateImm(int64_t Val) { + static X86Operand CreateImm(MCValue Val) { X86Operand Res; Res.Kind = Immediate; Res.Imm.Val = Val; return Res; } - static X86Operand CreateMem(unsigned SegReg, int64_t Disp, unsigned BaseReg, + static X86Operand CreateMem(unsigned SegReg, MCValue Disp, unsigned BaseReg, unsigned Scale, unsigned ScaleReg) { X86Operand Res; Res.Kind = Memory; @@ -86,12 +85,13 @@ case asmtok::Dollar: { // $42 -> immediate. Lexer.Lex(); - int64_t Val; - if (ParseAbsoluteExpression(Val)) - return TokError("expected integer constant"); - Op = X86Operand::CreateReg(Val); + MCValue Val; + if (ParseRelocatableExpression(Val)) + return true; + Op = X86Operand::CreateImm(Val); return false; - case asmtok::Star: + } + case asmtok::Star: { Lexer.Lex(); // Eat the star. if (Lexer.is(asmtok::Register)) { @@ -116,9 +116,9 @@ // of a memory operand with a missing displacement "(%ebx)" or "(,%eax)". The // only way to do this without lookahead is to eat the ( and see what is after // it. - int64_t Disp = 0; + MCValue Disp = MCValue::get(0, 0, 0); if (Lexer.isNot(asmtok::LParen)) { - if (ParseAbsoluteExpression(Disp)) return true; + if (ParseRelocatableExpression(Disp)) return true; // After parsing the base expression we could either have a parenthesized // memory address or not. If not, return now. If so, eat the (. @@ -139,7 +139,7 @@ // memory operand consumed. } else { // It must be an parenthesized expression, parse it now. - if (ParseAbsoluteExpression(Disp)) + if (ParseRelocatableExpression(Disp)) return true; // After parsing the base expression we could either have a parenthesized From dalej at apple.com Tue Jun 30 18:10:22 2009 From: dalej at apple.com (Dale Johannesen) Date: Tue, 30 Jun 2009 23:10:22 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r74569 - /llvm-gcc-4.2/trunk/gcc/config/darwin-c.c Message-ID: <200906302310.n5UNAMoW032101@zion.cs.uiuc.edu> Author: johannes Date: Tue Jun 30 18:10:22 2009 New Revision: 74569 URL: http://llvm.org/viewvc/llvm-project?rev=74569&view=rev Log: Detect an error cleanly instead of crashing. Modified: llvm-gcc-4.2/trunk/gcc/config/darwin-c.c Modified: llvm-gcc-4.2/trunk/gcc/config/darwin-c.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/darwin-c.c?rev=74569&r1=74568&r2=74569&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/darwin-c.c (original) +++ llvm-gcc-4.2/trunk/gcc/config/darwin-c.c Tue Jun 30 18:10:22 2009 @@ -1161,6 +1161,14 @@ argument = TREE_CHAIN (argument); } + /* APPLE LOCAL begin 7020016 */ + if (argument == NULL_TREE) + { + error ("argument number of CFString format too large"); + *no_add_attrs = true; + return false; + } + /* APPLE LOCAL end 7020016 */ if (!objc_check_cfstringref_type (TREE_VALUE (argument))) { error ("format CFString argument not an 'CFStringRef' type"); From dalej at apple.com Tue Jun 30 18:18:07 2009 From: dalej at apple.com (Dale Johannesen) Date: Tue, 30 Jun 2009 23:18:07 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r74570 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Message-ID: <200906302318.n5UNI7ei032326@zion.cs.uiuc.edu> Author: johannes Date: Tue Jun 30 18:18:07 2009 New Revision: 74570 URL: http://llvm.org/viewvc/llvm-project?rev=74570&view=rev Log: Add high-level matching algorithm for multiple alternative constraints in asm. The low-level part, matching one possible constraint against one operand, is not done (of course, this is the hard part). For variety, this time alternative 0 is always matched, with more random variation in tests that use this. Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=74570&r1=74569&r2=74570&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Tue Jun 30 18:18:07 2009 @@ -3981,6 +3981,14 @@ return Result; } +/// See if operand "exp" can use the indicated Constraint (which is +/// terminated by a null or a comma). +/// Returns: -1=no, 0=yes but auxiliary instructions needed, 1=yes and free +int MatchWeight(const char *Constraint, tree exp, bool isInput) { + /// TEMPORARY. This has the effect that alternative 0 is always chosen. + return 0; +} + /// ChooseConstraintTuple: we know each of the NumInputs+NumOutputs strings /// in Constraints[] is a comma-separated list of NumChoices different /// constraints. Look through the operands and constraint possibilities @@ -4000,13 +4008,67 @@ unsigned NumOutputs, unsigned NumChoices, const char **ReplacementStrings) { - unsigned int CommasToSkip; - // TEMPORARY: assume the second set of constraints is the right one. - // This is totally wrong, of course, but allows the mechanics of string - // handling to be tested. - CommasToSkip = 1; - + int MaxWeight = 0; + unsigned int CommasToSkip = 0; + int Weights[NumChoices]; + // RunningConstraints is pointers into the Constraints strings which + // are incremented as we go to point to the beginning of each + // comma-separated alternative. + const char* RunningConstraints[NumInputs+NumOutputs]; + memcpy(RunningConstraints, Constraints, + (NumInputs+NumOutputs) * sizeof(const char*)); + // The entire point of this loop is to compute CommasToSkip. + for (unsigned int i=0; iMaxWeight) { + CommasToSkip = i; + MaxWeight = Weights[i]; + } + } + // We have picked an alternative (the CommasToSkip'th one). + // Change Constraints to point to malloc'd copies of the appropriate + // constraints picked out of the original strings. for (unsigned int i=0; i Author: ddunbar Date: Tue Jun 30 18:37:44 2009 New Revision: 74572 URL: http://llvm.org/viewvc/llvm-project?rev=74572&view=rev Log: Fill in some methods for the MCValue field of an MCOperand. Modified: llvm/trunk/include/llvm/MC/MCInst.h Modified: llvm/trunk/include/llvm/MC/MCInst.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCInst.h?rev=74572&r1=74571&r2=74572&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCInst.h (original) +++ llvm/trunk/include/llvm/MC/MCInst.h Tue Jun 30 18:37:44 2009 @@ -31,7 +31,7 @@ kRegister, ///< Register operand. kImmediate, ///< Immediate operand. kMBBLabel, ///< Basic block label. - kMCValue + kMCValue ///< Relocatable immediate operand. }; unsigned char Kind; @@ -49,9 +49,11 @@ MCOperand() : Kind(kInvalid) {} MCOperand(const MCOperand &RHS) { *this = RHS; } + bool isValid() const { return Kind != kInvalid; } bool isReg() const { return Kind == kRegister; } bool isImm() const { return Kind == kImmediate; } bool isMBBLabel() const { return Kind == kMBBLabel; } + bool isMCValue() const { return Kind == kMCValue; } /// getReg - Returns the register number. unsigned getReg() const { @@ -82,6 +84,15 @@ assert(isMBBLabel() && "Wrong accessor"); return MBBLabel.BlockNo; } + + const MCValue &getMCValue() const { + assert(isMCValue() && "This is not an MCValue"); + return MCValueVal; + } + void setMCValue(const MCValue &Val) { + assert(isMCValue() && "This is not an MCValue"); + MCValueVal = Val; + } void MakeReg(unsigned Reg) { Kind = kRegister; @@ -96,6 +107,10 @@ MBBLabel.FunctionNo = Fn; MBBLabel.BlockNo = MBB; } + void MakeMCValue(const MCValue &Val) { + Kind = kMCValue; + MCValueVal = Val; + } }; @@ -119,7 +134,6 @@ void addOperand(const MCOperand &Op) { Operands.push_back(Op); } - }; From daniel at zuster.org Tue Jun 30 18:38:38 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Tue, 30 Jun 2009 23:38:38 -0000 Subject: [llvm-commits] [llvm] r74573 - in /llvm/trunk/tools/llvm-mc: AsmParser.cpp AsmParser.h MC-X86Specific.cpp Message-ID: <200906302338.n5UNcchR000469@zion.cs.uiuc.edu> Author: ddunbar Date: Tue Jun 30 18:38:38 2009 New Revision: 74573 URL: http://llvm.org/viewvc/llvm-project?rev=74573&view=rev Log: llvm-mc: Introduce method to match a parsed x86 instruction into an MCInst. Modified: llvm/trunk/tools/llvm-mc/AsmParser.cpp llvm/trunk/tools/llvm-mc/AsmParser.h llvm/trunk/tools/llvm-mc/MC-X86Specific.cpp Modified: llvm/trunk/tools/llvm-mc/AsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/AsmParser.cpp?rev=74573&r1=74572&r2=74573&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/AsmParser.cpp (original) +++ llvm/trunk/tools/llvm-mc/AsmParser.cpp Tue Jun 30 18:38:38 2009 @@ -506,7 +506,7 @@ } MCInst Inst; - if (ParseX86InstOperands(Inst)) + if (ParseX86InstOperands(IDVal, Inst)) return true; if (Lexer.isNot(asmtok::EndOfStatement)) Modified: llvm/trunk/tools/llvm-mc/AsmParser.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/AsmParser.h?rev=74573&r1=74572&r2=74573&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/AsmParser.h (original) +++ llvm/trunk/tools/llvm-mc/AsmParser.h Tue Jun 30 18:38:38 2009 @@ -25,12 +25,14 @@ class MCValue; class AsmParser { +public: + struct X86Operand; + +private: AsmLexer Lexer; MCContext &Ctx; MCStreamer &Out; - struct X86Operand; - public: AsmParser(SourceMgr &SM, MCContext &ctx, MCStreamer &OutStr) : Lexer(SM), Ctx(ctx), Out(OutStr) {} @@ -76,7 +78,7 @@ bool ParseParenExpr(AsmExpr *&Res); // X86 specific. - bool ParseX86InstOperands(MCInst &Inst); + bool ParseX86InstOperands(const char *InstName, MCInst &Inst); bool ParseX86Operand(X86Operand &Op); bool ParseX86MemOperand(X86Operand &Op); Modified: llvm/trunk/tools/llvm-mc/MC-X86Specific.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/MC-X86Specific.cpp?rev=74573&r1=74572&r2=74573&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/MC-X86Specific.cpp (original) +++ llvm/trunk/tools/llvm-mc/MC-X86Specific.cpp Tue Jun 30 18:38:38 2009 @@ -65,10 +65,6 @@ Res.Mem.ScaleReg = ScaleReg; return Res; } - - void AddToMCInst(MCInst &I) { - // FIXME: Add in x86 order here. - } }; bool AsmParser::ParseX86Operand(X86Operand &Op) { @@ -195,27 +191,34 @@ return false; } +/// MatchX86Inst - Convert a parsed instruction name and operand list into a +/// concrete instruction. +static bool MatchX86Inst(const char *Name, + llvm::SmallVector &Operands, + MCInst &Inst) { + return false; +} + /// ParseX86InstOperands - Parse the operands of an X86 instruction and return /// them as the operands of an MCInst. -bool AsmParser::ParseX86InstOperands(MCInst &Inst) { - // If no operands are present, just return. - if (Lexer.is(asmtok::EndOfStatement)) - return false; +bool AsmParser::ParseX86InstOperands(const char *InstName, MCInst &Inst) { + llvm::SmallVector Operands; - // Read the first operand. - X86Operand Op; - if (ParseX86Operand(Op)) - return true; - Op.AddToMCInst(Inst); - - while (Lexer.is(asmtok::Comma)) { - Lexer.Lex(); // Eat the comma. - - // Parse and remember the operand. - Op = X86Operand(); - if (ParseX86Operand(Op)) + if (Lexer.isNot(asmtok::EndOfStatement)) { + // Read the first operand. + Operands.push_back(X86Operand()); + if (ParseX86Operand(Operands.back())) return true; - Op.AddToMCInst(Inst); + + while (Lexer.is(asmtok::Comma)) { + Lexer.Lex(); // Eat the comma. + + // Parse and remember the operand. + Operands.push_back(X86Operand()); + if (ParseX86Operand(Operands.back())) + return true; + } } - return false; + + return MatchX86Inst(InstName, Operands, Inst); } From resistor at mac.com Tue Jun 30 18:40:00 2009 From: resistor at mac.com (Owen Anderson) Date: Tue, 30 Jun 2009 23:40:00 -0000 Subject: [llvm-commits] [llvm] r74574 - in /llvm/trunk: include/llvm/LLVMContext.h lib/VMCore/LLVMContext.cpp Message-ID: <200906302340.n5UNe0NR000520@zion.cs.uiuc.edu> Author: resistor Date: Tue Jun 30 18:39:59 2009 New Revision: 74574 URL: http://llvm.org/viewvc/llvm-project?rev=74574&view=rev Log: Add a global context, for easing backwards compatibility. Modified: llvm/trunk/include/llvm/LLVMContext.h llvm/trunk/lib/VMCore/LLVMContext.cpp Modified: llvm/trunk/include/llvm/LLVMContext.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/LLVMContext.h?rev=74574&r1=74573&r2=74574&view=diff ============================================================================== --- llvm/trunk/include/llvm/LLVMContext.h (original) +++ llvm/trunk/include/llvm/LLVMContext.h Tue Jun 30 18:39:59 2009 @@ -197,6 +197,9 @@ VectorType* getVectorTypeTruncatedElement(const VectorType* VTy); }; +/// FOR BACKWARDS COMPATIBILITY - Returns a global context. +LLVMContext* getGlobalContext(); + } #endif Modified: llvm/trunk/lib/VMCore/LLVMContext.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/LLVMContext.cpp?rev=74574&r1=74573&r2=74574&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/LLVMContext.cpp (original) +++ llvm/trunk/lib/VMCore/LLVMContext.cpp Tue Jun 30 18:39:59 2009 @@ -15,10 +15,17 @@ #include "llvm/LLVMContext.h" #include "llvm/Constants.h" #include "llvm/DerivedTypes.h" +#include "llvm/Support/ManagedStatic.h" #include "LLVMContextImpl.h" using namespace llvm; +static ManagedStatic GlobalContext; + +LLVMContext* getGlobalContext() { + return &*GlobalContext; +} + LLVMContext::LLVMContext() : pImpl(new LLVMContextImpl()) { } LLVMContext::~LLVMContext() { delete pImpl; } From isanbard at gmail.com Tue Jun 30 18:45:04 2009 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 30 Jun 2009 16:45:04 -0700 Subject: [llvm-commits] [llvm-gcc-4.2] r74570 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp In-Reply-To: <200906302318.n5UNI7ei032326@zion.cs.uiuc.edu> References: <200906302318.n5UNI7ei032326@zion.cs.uiuc.edu> Message-ID: <16e5fdf90906301645v9ec57cpa6c05515077331a8@mail.gmail.com> Hi Dale, The buildbots are getting this error message: /Volumes/Sandbox/Buildbot/llvm/build.llvm-gcc-i386-darwin9/llvm-gcc.src/gcc/llvm-convert.cpp: In function 'void ChooseConstraintTuple(const char**, tree_node*, unsigned int, unsigned int, unsigned int, const char**)': /Volumes/Sandbox/Buildbot/llvm/build.llvm-gcc-i386-darwin9/llvm-gcc.src/gcc/llvm-convert.cpp:4013: error: ISO C++ forbids variable-size array 'Weights' /Volumes/Sandbox/Buildbot/llvm/build.llvm-gcc-i386-darwin9/llvm-gcc.src/gcc/llvm-convert.cpp:4017: error: ISO C++ forbids variable-size array 'RunningConstraints' Could you take a look? -bw On Tue, Jun 30, 2009 at 4:18 PM, Dale Johannesen wrote: > Author: johannes > Date: Tue Jun 30 18:18:07 2009 > New Revision: 74570 > > URL: http://llvm.org/viewvc/llvm-project?rev=74570&view=rev > Log: > Add high-level matching algorithm for multiple > alternative constraints in asm. ?The low-level part, > matching one possible constraint against one operand, > is not done (of course, this is the hard part). ?For > variety, this time alternative 0 is always matched, > with more random variation in tests that use this. > > > Modified: > ? ?llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp > > Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=74570&r1=74569&r2=74570&view=diff > > ============================================================================== > --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) > +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Tue Jun 30 18:18:07 2009 > @@ -3981,6 +3981,14 @@ > ? return Result; > ?} > > +/// See if operand "exp" can use the indicated Constraint (which is > +/// terminated by a null or a comma). > +/// Returns: ?-1=no, 0=yes but auxiliary instructions needed, 1=yes and free > +int MatchWeight(const char *Constraint, tree exp, bool isInput) { > + ?/// TEMPORARY. ?This has the effect that alternative 0 is always chosen. > + ?return 0; > +} > + > ?/// ChooseConstraintTuple: we know each of the NumInputs+NumOutputs strings > ?/// in Constraints[] is a comma-separated list of NumChoices different > ?/// constraints. ?Look through the operands and constraint possibilities > @@ -4000,13 +4008,67 @@ > ? ? ? ? ? ? ? ? ? ? ? unsigned NumOutputs, unsigned NumChoices, > ? ? ? ? ? ? ? ? ? ? ? const char **ReplacementStrings) > ?{ > - ?unsigned int CommasToSkip; > - ?// TEMPORARY: assume the second set of constraints is the right one. > - ?// This is totally wrong, of course, but allows the mechanics of string > - ?// handling to be tested. > - ?CommasToSkip = 1; > - > + ?int MaxWeight = 0; > + ?unsigned int CommasToSkip = 0; > + ?int Weights[NumChoices]; > + ?// RunningConstraints is pointers into the Constraints strings which > + ?// are incremented as we go to point to the beginning of each > + ?// comma-separated alternative. > + ?const char* RunningConstraints[NumInputs+NumOutputs]; > + ?memcpy(RunningConstraints, Constraints, > + ? ? ? ? (NumInputs+NumOutputs) * sizeof(const char*)); > + ?// The entire point of this loop is to compute CommasToSkip. > + ?for (unsigned int i=0; i + ? ?Weights[i] = 0; > + ? ?unsigned int j = 0; > + ? ?for (tree Output = ASM_OUTPUTS(exp); j + ? ? ? ? j++, Output = TREE_CHAIN(Output)) { > + ? ? ?if (i==0) > + ? ? ? ?RunningConstraints[j]++; ? ?// skip leading = > + ? ? ?const char* p = RunningConstraints[j]; > + ? ? ?if (Weights[i] != -1) { > + ? ? ? ?int w = MatchWeight(p, TREE_VALUE(Output), false); > + ? ? ? ?// Nonmatch means the entire tuple doesn't match. ?However, we > + ? ? ? ?// keep scanning to set up RunningConstraints correctly for the > + ? ? ? ?// next tuple. > + ? ? ? ?if (w < 0) > + ? ? ? ? ?Weights[i] = -1; > + ? ? ? ?else > + ? ? ? ? ?Weights[i] += w; > + ? ? ?} > + ? ? ?while (*p!=0 && *p!=',') > + ? ? ? ?p++; > + ? ? ?if (*p!=0) > + ? ? ? ?p++; > + ? ? ?RunningConstraints[j] = p; > + ? ?} > + ? ?assert(j==NumOutputs); > + ? ?for (tree Input = ASM_INPUTS(exp); j + ? ? ? ? j++, Input = TREE_CHAIN(Input)) { > + ? ? ?const char* p = RunningConstraints[j]; > + ? ? ?if (Weights[i] != -1) { > + ? ? ? ?int w = MatchWeight(p, TREE_VALUE(Input), false); > + ? ? ? ?if (w < 0) > + ? ? ? ? ?Weights[i] = -1; ? ?// As above. > + ? ? ? ?else > + ? ? ? ? ?Weights[i] += w; > + ? ? ?} > + ? ? ?while (*p!=0 && *p!=',') > + ? ? ? ?p++; > + ? ? ?if (*p!=0) > + ? ? ? ?p++; > + ? ? ?RunningConstraints[j] = p; > + ? ?} > + ? ?if (Weights[i]>MaxWeight) { > + ? ? ?CommasToSkip = i; > + ? ? ?MaxWeight = Weights[i]; > + ? ?} > + ?} > + ?// We have picked an alternative (the CommasToSkip'th one). > + ?// Change Constraints to point to malloc'd copies of the appropriate > + ?// constraints picked out of the original strings. > ? for (unsigned int i=0; i + ? ?assert(*(RunningConstraints[i])==0); ? // sanity check > ? ? const char* start = Constraints[i]; > ? ? if (i ? ? ? start++; ? ? ? ? ?// skip '=' or '+' > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From dalej at apple.com Tue Jun 30 18:47:02 2009 From: dalej at apple.com (Dale Johannesen) Date: Tue, 30 Jun 2009 16:47:02 -0700 Subject: [llvm-commits] [llvm-gcc-4.2] r74570 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp In-Reply-To: <16e5fdf90906301645v9ec57cpa6c05515077331a8@mail.gmail.com> References: <200906302318.n5UNI7ei032326@zion.cs.uiuc.edu> <16e5fdf90906301645v9ec57cpa6c05515077331a8@mail.gmail.com> Message-ID: <3AD6E792-C8FC-458A-B21E-AE3328F22EED@apple.com> On Jun 30, 2009, at 4:45 PMPDT, Bill Wendling wrote: > Hi Dale, > > The buildbots are getting this error message: > > /Volumes/Sandbox/Buildbot/llvm/build.llvm-gcc-i386-darwin9/llvm- > gcc.src/gcc/llvm-convert.cpp: > In function 'void ChooseConstraintTuple(const char**, tree_node*, > unsigned int, unsigned int, unsigned int, const char**)': > /Volumes/Sandbox/Buildbot/llvm/build.llvm-gcc-i386-darwin9/llvm- > gcc.src/gcc/llvm-convert.cpp:4013: > error: ISO C++ forbids variable-size array 'Weights' > /Volumes/Sandbox/Buildbot/llvm/build.llvm-gcc-i386-darwin9/llvm- > gcc.src/gcc/llvm-convert.cpp:4017: > error: ISO C++ forbids variable-size array 'RunningConstraints' > > Could you take a look? Sure. Silly restriction. From dalej at apple.com Tue Jun 30 18:53:04 2009 From: dalej at apple.com (Dale Johannesen) Date: Tue, 30 Jun 2009 23:53:04 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r74575 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Message-ID: <200906302353.n5UNr4JS000931@zion.cs.uiuc.edu> Author: johannes Date: Tue Jun 30 18:53:04 2009 New Revision: 74575 URL: http://llvm.org/viewvc/llvm-project?rev=74575&view=rev Log: Fix buildbreaking nonstandardism. (And I thought I'd never complain C++ doesn't have enough features...) Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=74575&r1=74574&r2=74575&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Tue Jun 30 18:53:04 2009 @@ -4010,11 +4010,12 @@ { int MaxWeight = 0; unsigned int CommasToSkip = 0; - int Weights[NumChoices]; + int *Weights = (int *)alloca(NumChoices * sizeof(int)); // RunningConstraints is pointers into the Constraints strings which // are incremented as we go to point to the beginning of each // comma-separated alternative. - const char* RunningConstraints[NumInputs+NumOutputs]; + const char** RunningConstraints = + (const char**)alloca((NumInputs+NumOutputs)*sizeof(const char*)); memcpy(RunningConstraints, Constraints, (NumInputs+NumOutputs) * sizeof(const char*)); // The entire point of this loop is to compute CommasToSkip. From david_goodwin at apple.com Tue Jun 30 19:01:13 2009 From: david_goodwin at apple.com (David Goodwin) Date: Wed, 01 Jul 2009 00:01:13 -0000 Subject: [llvm-commits] [llvm] r74577 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb2.td test/CodeGen/Thumb2/load-global.ll test/CodeGen/Thumb2/tls1.ll test/CodeGen/Thumb2/tls2.ll Message-ID: <200907010001.n6101DXu001247@zion.cs.uiuc.edu> Author: david_goodwin Date: Tue Jun 30 19:01:13 2009 New Revision: 74577 URL: http://llvm.org/viewvc/llvm-project?rev=74577&view=rev Log: Add PIC load and store patterns for Thumb-2. Added: llvm/trunk/test/CodeGen/Thumb2/tls1.ll llvm/trunk/test/CodeGen/Thumb2/tls2.ll Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td llvm/trunk/test/CodeGen/Thumb2/load-global.ll Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=74577&r1=74576&r2=74577&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Tue Jun 30 19:01:13 2009 @@ -419,6 +419,18 @@ [(opnode GPR:$src, t2addrmode_so_reg:$addr)]>; } +/// T2I_picld - Defines the PIC load pattern. +class T2I_picld : + T2I<(outs GPR:$dst), (ins addrmodepc:$addr), + !strconcat("${addr:label}:\n\t", opc), " $dst, $addr", + [(set GPR:$dst, (opnode addrmodepc:$addr))]>; + +/// T2I_picst - Defines the PIC store pattern. +class T2I_picst : + T2I<(outs), (ins GPR:$src, addrmodepc:$addr), + !strconcat("${addr:label}:\n\t", opc), " $src, $addr", + [(opnode GPR:$src, addrmodepc:$addr)]>; + //===----------------------------------------------------------------------===// // Instructions //===----------------------------------------------------------------------===// @@ -539,6 +551,22 @@ def t2STRDi8 : T2Ii8s4<(outs), (ins GPR:$src, t2addrmode_imm8s4:$addr), "strd", " $src, $addr", []>; + +// Address computation and loads and stores in PIC mode. +let isNotDuplicable = 1, AddedComplexity = 10 in { +let canFoldAsLoad = 1 in +def t2PICLDR : T2I_picld<"ldr", UnOpFrag<(load node:$Src)>>; + +def t2PICLDRH : T2I_picld<"ldrh", UnOpFrag<(zextloadi16 node:$Src)>>; +def t2PICLDRB : T2I_picld<"ldrb", UnOpFrag<(zextloadi8 node:$Src)>>; +def t2PICLDRSH : T2I_picld<"ldrsh", UnOpFrag<(sextloadi16 node:$Src)>>; +def t2PICLDRSB : T2I_picld<"ldrsb", UnOpFrag<(sextloadi8 node:$Src)>>; + +def t2PICSTR : T2I_picst<"str", BinOpFrag<(store node:$LHS, node:$RHS)>>; +def t2PICSTRH : T2I_picst<"strh", BinOpFrag<(truncstorei16 node:$LHS, node:$RHS)>>; +def t2PICSTRB : T2I_picst<"strb", BinOpFrag<(truncstorei8 node:$LHS, node:$RHS)>>; +} // isNotDuplicable = 1, AddedComplexity = 10 + //===----------------------------------------------------------------------===// // Move Instructions. // Modified: llvm/trunk/test/CodeGen/Thumb2/load-global.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/load-global.ll?rev=74577&r1=74576&r2=74577&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/load-global.ll (original) +++ llvm/trunk/test/CodeGen/Thumb2/load-global.ll Tue Jun 30 19:01:13 2009 @@ -1,5 +1,15 @@ -; RUN: llvm-as < %s | llc -mtriple=thumbv7-apple-darwin -; RUN: llvm-as < %s | llc -mtriple=thumbv7-apple-darwin -relocation-model=pic | grep add | grep pc +; RUN: llvm-as < %s | \ +; RUN: llc -mtriple=thumbv7-apple-darwin -relocation-model=static | \ +; RUN: not grep {L_G\$non_lazy_ptr} +; RUN: llvm-as < %s | \ +; RUN: llc -mtriple=thumbv7-apple-darwin -relocation-model=dynamic-no-pic | \ +; RUN: grep {L_G\$non_lazy_ptr} | count 2 +; RUN: llvm-as < %s | \ +; RUN: llc -mtriple=thumbv7-apple-darwin -relocation-model=pic | \ +; RUN: grep {ldr.*pc} | count 1 +; RUN: llvm-as < %s | \ +; RUN: llc -mtriple=thumbv7-linux-gnueabi -relocation-model=pic | \ +; RUN: grep {GOT} | count 1 @G = external global i32 Added: llvm/trunk/test/CodeGen/Thumb2/tls1.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/tls1.ll?rev=74577&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/tls1.ll (added) +++ llvm/trunk/test/CodeGen/Thumb2/tls1.ll Tue Jun 30 19:01:13 2009 @@ -0,0 +1,20 @@ +; RUN: llvm-as < %s | llc -mtriple=thumbv7-linux-gnueabi | \ +; RUN: grep {i(tpoff)} +; RUN: llvm-as < %s | llc -mtriple=thumbv7-linux-gnueabi | \ +; RUN: grep {__aeabi_read_tp} +; RUN: llvm-as < %s | llc -mtriple=thumbv7-linux-gnueabi \ +; RUN: -relocation-model=pic | grep {__tls_get_addr} + + + at i = thread_local global i32 15 ; [#uses=2] + +define i32 @f() { +entry: + %tmp1 = load i32* @i ; [#uses=1] + ret i32 %tmp1 +} + +define i32* @g() { +entry: + ret i32* @i +} Added: llvm/trunk/test/CodeGen/Thumb2/tls2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/tls2.ll?rev=74577&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/tls2.ll (added) +++ llvm/trunk/test/CodeGen/Thumb2/tls2.ll Tue Jun 30 19:01:13 2009 @@ -0,0 +1,19 @@ +; RUN: llvm-as < %s | llc -mtriple=thumbv7-linux-gnueabi | \ +; RUN: grep {i(gottpoff)} +; RUN: llvm-as < %s | llc -mtriple=thumbv7-linux-gnueabi | \ +; RUN: grep {ldr r., \[pc, r.\]} +; RUN: llvm-as < %s | llc -mtriple=thumbv7-linux-gnueabi \ +; RUN: -relocation-model=pic | grep {__tls_get_addr} + + at i = external thread_local global i32 ; [#uses=2] + +define i32 @f() { +entry: + %tmp1 = load i32* @i ; [#uses=1] + ret i32 %tmp1 +} + +define i32* @g() { +entry: + ret i32* @i +} From clattner at apple.com Tue Jun 30 19:45:11 2009 From: clattner at apple.com (Chris Lattner) Date: Tue, 30 Jun 2009 17:45:11 -0700 Subject: [llvm-commits] [llvm-gcc-4.2] r74575 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp In-Reply-To: <200906302353.n5UNr4JS000931@zion.cs.uiuc.edu> References: <200906302353.n5UNr4JS000931@zion.cs.uiuc.edu> Message-ID: On Jun 30, 2009, at 4:53 PM, Dale Johannesen wrote: > Author: johannes > Date: Tue Jun 30 18:53:04 2009 > New Revision: 74575 > > URL: http://llvm.org/viewvc/llvm-project?rev=74575&view=rev > Log: > Fix buildbreaking nonstandardism. (And I thought I'd > never complain C++ doesn't have enough features...) Hi Dale, It's not that big of a deal, but please use SmallVector or something instead of alloca. SmallVector works when "N" is more than 4 by going to the heap so you won't run out of stack space for large N, and is more portable. -Chris > > > Modified: > llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp > > Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=74575&r1=74574&r2=74575&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) > +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Tue Jun 30 18:53:04 2009 > @@ -4010,11 +4010,12 @@ > { > int MaxWeight = 0; > unsigned int CommasToSkip = 0; > - int Weights[NumChoices]; > + int *Weights = (int *)alloca(NumChoices * sizeof(int)); > // RunningConstraints is pointers into the Constraints strings which > // are incremented as we go to point to the beginning of each > // comma-separated alternative. > - const char* RunningConstraints[NumInputs+NumOutputs]; > + const char** RunningConstraints = > + (const char**)alloca((NumInputs+NumOutputs)*sizeof(const char*)); > memcpy(RunningConstraints, Constraints, > (NumInputs+NumOutputs) * sizeof(const char*)); > // The entire point of this loop is to compute CommasToSkip. > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From dalej at apple.com Tue Jun 30 19:51:06 2009 From: dalej at apple.com (Dale Johannesen) Date: Tue, 30 Jun 2009 17:51:06 -0700 Subject: [llvm-commits] [llvm-gcc-4.2] r74575 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp In-Reply-To: References: <200906302353.n5UNr4JS000931@zion.cs.uiuc.edu> Message-ID: <6D383637-4E1F-499C-B91F-965E927D3D84@apple.com> On Jun 30, 2009, at 5:45 PMPDT, Chris Lattner wrote: > > On Jun 30, 2009, at 4:53 PM, Dale Johannesen wrote: > >> Author: johannes >> Date: Tue Jun 30 18:53:04 2009 >> New Revision: 74575 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=74575&view=rev >> Log: >> Fix buildbreaking nonstandardism. (And I thought I'd >> never complain C++ doesn't have enough features...) > > Hi Dale, > > It's not that big of a deal, but please use SmallVector or > something instead of alloca. SmallVector works when "N" is more than > 4 by going to the heap so you won't run out of stack space for large > N, and is more portable. I am not a big lover of alloca, but it was used several places in this code before I started working on it so I don't think portability can be a problem, and the numbers involved cannot be big enough to run out of stack space. > -Chris > >> >> >> Modified: >> llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp >> >> Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=74575&r1=74574&r2=74575&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) >> +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Tue Jun 30 18:53:04 2009 >> @@ -4010,11 +4010,12 @@ >> { >> int MaxWeight = 0; >> unsigned int CommasToSkip = 0; >> - int Weights[NumChoices]; >> + int *Weights = (int *)alloca(NumChoices * sizeof(int)); >> // RunningConstraints is pointers into the Constraints strings which >> // are incremented as we go to point to the beginning of each >> // comma-separated alternative. >> - const char* RunningConstraints[NumInputs+NumOutputs]; >> + const char** RunningConstraints = >> + (const char**)alloca((NumInputs+NumOutputs)*sizeof(const >> char*)); >> memcpy(RunningConstraints, Constraints, >> (NumInputs+NumOutputs) * sizeof(const char*)); >> // The entire point of this loop is to compute CommasToSkip. >> >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From dalej at apple.com Tue Jun 30 19:51:11 2009 From: dalej at apple.com (Dale Johannesen) Date: Tue, 30 Jun 2009 17:51:11 -0700 Subject: [llvm-commits] [llvm-gcc-4.2] r74575 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp In-Reply-To: References: <200906302353.n5UNr4JS000931@zion.cs.uiuc.edu> Message-ID: <899A1CC6-2EC6-45A3-B1E4-77E116D96E5F@apple.com> On Jun 30, 2009, at 5:45 PMPDT, Chris Lattner wrote: > > On Jun 30, 2009, at 4:53 PM, Dale Johannesen wrote: > >> Author: johannes >> Date: Tue Jun 30 18:53:04 2009 >> New Revision: 74575 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=74575&view=rev >> Log: >> Fix buildbreaking nonstandardism. (And I thought I'd >> never complain C++ doesn't have enough features...) > > Hi Dale, > > It's not that big of a deal, but please use SmallVector or > something instead of alloca. SmallVector works when "N" is more than > 4 by going to the heap so you won't run out of stack space for large > N, and is more portable. > > -Chris > >> >> >> Modified: >> llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp >> >> Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=74575&r1=74574&r2=74575&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> = >> ===================================================================== >> --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) >> +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Tue Jun 30 18:53:04 2009 >> @@ -4010,11 +4010,12 @@ >> { >> int MaxWeight = 0; >> unsigned int CommasToSkip = 0; >> - int Weights[NumChoices]; >> + int *Weights = (int *)alloca(NumChoices * sizeof(int)); >> // RunningConstraints is pointers into the Constraints strings which >> // are incremented as we go to point to the beginning of each >> // comma-separated alternative. >> - const char* RunningConstraints[NumInputs+NumOutputs]; >> + const char** RunningConstraints = >> + (const char**)alloca((NumInputs+NumOutputs)*sizeof(const >> char*)); >> memcpy(RunningConstraints, Constraints, >> (NumInputs+NumOutputs) * sizeof(const char*)); >> // The entire point of this loop is to compute CommasToSkip. >> >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From clattner at apple.com Tue Jun 30 20:10:39 2009 From: clattner at apple.com (Chris Lattner) Date: Tue, 30 Jun 2009 18:10:39 -0700 Subject: [llvm-commits] [llvm-gcc-4.2] r74575 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp In-Reply-To: <6D383637-4E1F-499C-B91F-965E927D3D84@apple.com> References: <200906302353.n5UNr4JS000931@zion.cs.uiuc.edu> <6D383637-4E1F-499C-B91F-965E927D3D84@apple.com> Message-ID: On Jun 30, 2009, at 5:51 PM, Dale Johannesen wrote: >> >> It's not that big of a deal, but please use SmallVector or >> something instead of alloca. SmallVector works when "N" is more than >> 4 by going to the heap so you won't run out of stack space for large >> N, and is more portable. > > I am not a big lover of alloca, but it was used several places in this > code before I started working on it so I don't think portability can > be a problem, and the numbers involved cannot be big enough to run out > of stack space. Ok, works for me. Please don't use it in normal llvm code though, llvm-gcc is fine. -Chris From dalej at apple.com Tue Jun 30 20:10:39 2009 From: dalej at apple.com (Dale Johannesen) Date: Tue, 30 Jun 2009 18:10:39 -0700 Subject: [llvm-commits] [PATCH] SVR4 ABI support for the PowerPC backend In-Reply-To: References: Message-ID: <1CB19DE4-DB7F-43AA-87D9-245656CEA0E8@apple.com> I'll look at this, and do some testing on Darwin. It will take a little time. Thanks for doing this. On Jun 27, 2009, at 8:15 AMPDT, Tilmann Scheller wrote: > Hello, > > attached is a series of patches which implement the SVR4 ABI for > PowerPC. Patches were made against revision 74382 and need to be > applied in order. A patch which adds SVR4 support to llvm-gcc will > follow soon. > > The current state of LLVM on 32-bit PowerPC Linux: > compat.exp passes all tests (those are the ABI tests from the GCC > test suite) You should also try struct-layout-1.exp . Also, make sure to run both sets of tests in the mode where they compare against the installed compiler; see ALT_CC_UNDER_TEST in the gcc documentation. Without that you're checking whether llvm-gcc is consistent with itself, which is a good thing but not sufficient. You may find t006 in the C++ part fails due to PR 2203; I don't get any other failures on Darwin. > C-only nightly tester results: 1638 TEST-PASS / 96 TEST-FAIL > llvm-gcc bootstraps at -O0 with a stage 2/3 comparison failure of > varasm.o > > These patches were not tested on Darwin PPC, so it would be really > great if someone with a Darwin PPC nightly tester (Evan? :) ) could > make a run with the patches applied. Just to make sure that I did not > introduce any major regressions :) > > Feedback welcome! > > Greetings, > > Tilmann -------------- next part -------------- A non-text attachment was scrubbed... Name: 0001-Small-cleanups-in-the-PowerPC-backend.patch Type: text/x-patch Size: 12107 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090630/aabad2ec/attachment.bin -------------- next part -------------- A non-text attachment was scrubbed... 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Name: 0004-Refactor-ABI-code-in-the-PowerPC-backend.patch Type: text/x-patch Size: 81794 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090630/aabad2ec/attachment-0003.bin -------------- next part -------------- > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From daniel at zuster.org Tue Jun 30 20:48:55 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Wed, 01 Jul 2009 01:48:55 -0000 Subject: [llvm-commits] [llvm] r74579 - in /llvm/trunk: include/llvm/CodeGen/ lib/CodeGen/AsmPrinter/ lib/Target/ARM/ lib/Target/ARM/AsmPrinter/ lib/Target/Alpha/ lib/Target/Alpha/AsmPrinter/ lib/Target/CellSPU/ lib/Target/CellSPU/AsmPrinter/ lib/Target/IA64/ lib/Target/IA64/AsmPrinter/ lib/Target/MSP430/ lib/Target/Mips/ lib/Target/Mips/AsmPrinter/ lib/Target/PIC16/ lib/Target/PowerPC/ lib/Target/PowerPC/AsmPrinter/ lib/Target/Sparc/ lib/Target/Sparc/AsmPrinter/ lib/Target/X86/ lib/Target/X86/AsmPrinter/ lib/Target/XCore/ Message-ID: <200907010148.n611muFo005142@zion.cs.uiuc.edu> Author: ddunbar Date: Tue Jun 30 20:48:54 2009 New Revision: 74579 URL: http://llvm.org/viewvc/llvm-project?rev=74579&view=rev Log: Remove unused AsmPrinter OptLevel argument, and propogate. - This more or less amounts to a revert of r65379. I'm curious to know what happened that caused this variable to become unused. Modified: llvm/trunk/include/llvm/CodeGen/AsmPrinter.h llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp llvm/trunk/lib/Target/ARM/ARM.h llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp llvm/trunk/lib/Target/ARM/ARMTargetMachine.h llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp llvm/trunk/lib/Target/Alpha/Alpha.h llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.h llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp llvm/trunk/lib/Target/CellSPU/SPU.h llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.h llvm/trunk/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp llvm/trunk/lib/Target/IA64/IA64.h llvm/trunk/lib/Target/IA64/IA64TargetMachine.cpp llvm/trunk/lib/Target/IA64/IA64TargetMachine.h llvm/trunk/lib/Target/MSP430/MSP430.h llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp llvm/trunk/lib/Target/Mips/Mips.h llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp llvm/trunk/lib/Target/Mips/MipsTargetMachine.h llvm/trunk/lib/Target/PIC16/PIC16.h llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.cpp llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.h llvm/trunk/lib/Target/PIC16/PIC16TargetMachine.cpp llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp llvm/trunk/lib/Target/PowerPC/PPC.h llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h llvm/trunk/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp llvm/trunk/lib/Target/Sparc/Sparc.h llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h llvm/trunk/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h llvm/trunk/lib/Target/X86/X86.h llvm/trunk/lib/Target/X86/X86TargetMachine.cpp llvm/trunk/lib/Target/X86/X86TargetMachine.h llvm/trunk/lib/Target/XCore/XCore.h llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp Modified: llvm/trunk/include/llvm/CodeGen/AsmPrinter.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/AsmPrinter.h?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/AsmPrinter.h (original) +++ llvm/trunk/include/llvm/CodeGen/AsmPrinter.h Tue Jun 30 20:48:54 2009 @@ -65,8 +65,6 @@ /// DW - If available, this is a pointer to the current dwarf writer. DwarfWriter *DW; - /// OptLevel - Generating code at a specific optimization level. - CodeGenOpt::Level OptLevel; public: /// Output stream on which we're printing assembly code. /// @@ -120,7 +118,7 @@ protected: explicit AsmPrinter(raw_ostream &o, TargetMachine &TM, - const TargetAsmInfo *T, CodeGenOpt::Level OL, bool V); + const TargetAsmInfo *T, bool V); public: virtual ~AsmPrinter(); @@ -139,7 +137,8 @@ /// /// This method is used when about to emit executable code. /// - void SwitchToTextSection(const char *NewSection, const GlobalValue *GV = NULL); + void SwitchToTextSection(const char *NewSection, + const GlobalValue *GV = NULL); /// SwitchToDataSection - Switch to the specified section of the executable /// if we are not already in it! If GV is non-null and if the global has an @@ -153,7 +152,8 @@ /// is the same as the SwitchToTextSection method, but not all assemblers /// are the same. /// - void SwitchToDataSection(const char *NewSection, const GlobalValue *GV = NULL); + void SwitchToDataSection(const char *NewSection, + const GlobalValue *GV = NULL); /// SwitchToSection - Switch to the specified section of the executable if /// we are not already in it! Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp (original) +++ llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp Tue Jun 30 20:48:54 2009 @@ -42,8 +42,8 @@ char AsmPrinter::ID = 0; AsmPrinter::AsmPrinter(raw_ostream &o, TargetMachine &tm, - const TargetAsmInfo *T, CodeGenOpt::Level OL, bool VDef) - : MachineFunctionPass(&ID), FunctionNumber(0), OptLevel(OL), O(o), + const TargetAsmInfo *T, bool VDef) + : MachineFunctionPass(&ID), FunctionNumber(0), O(o), TM(tm), TAI(T), TRI(tm.getRegisterInfo()), IsInTextSection(false), LastMI(0), LastFn(0), Counter(~0U), PrevDLT(0, ~0U, ~0U) { Modified: llvm/trunk/lib/Target/ARM/ARM.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARM.h?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARM.h (original) +++ llvm/trunk/lib/Target/ARM/ARM.h Tue Jun 30 20:48:54 2009 @@ -93,7 +93,6 @@ FunctionPass *createARMISelDag(ARMBaseTargetMachine &TM); FunctionPass *createARMCodePrinterPass(raw_ostream &O, ARMBaseTargetMachine &TM, - CodeGenOpt::Level OptLevel, bool Verbose); FunctionPass *createARMCodeEmitterPass(ARMBaseTargetMachine &TM, MachineCodeEmitter &MCE); Modified: llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp Tue Jun 30 20:48:54 2009 @@ -179,7 +179,7 @@ // Output assembly language. assert(AsmPrinterCtor && "AsmPrinter was not linked in"); if (AsmPrinterCtor) - PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose)); + PM.add(AsmPrinterCtor(Out, *this, Verbose)); return false; } @@ -198,7 +198,7 @@ if (DumpAsm) { assert(AsmPrinterCtor && "AsmPrinter was not linked in"); if (AsmPrinterCtor) - PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); + PM.add(AsmPrinterCtor(errs(), *this, true)); } return false; @@ -217,7 +217,7 @@ if (DumpAsm) { assert(AsmPrinterCtor && "AsmPrinter was not linked in"); if (AsmPrinterCtor) - PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); + PM.add(AsmPrinterCtor(errs(), *this, true)); } return false; @@ -232,7 +232,7 @@ if (DumpAsm) { assert(AsmPrinterCtor && "AsmPrinter was not linked in"); if (AsmPrinterCtor) - PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); + PM.add(AsmPrinterCtor(errs(), *this, true)); } return false; @@ -247,7 +247,7 @@ if (DumpAsm) { assert(AsmPrinterCtor && "AsmPrinter was not linked in"); if (AsmPrinterCtor) - PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); + PM.add(AsmPrinterCtor(errs(), *this, true)); } return false; Modified: llvm/trunk/lib/Target/ARM/ARMTargetMachine.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.h?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMTargetMachine.h (original) +++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.h Tue Jun 30 20:48:54 2009 @@ -43,7 +43,6 @@ // set this functions to ctor pointer at startup time if they are linked in. typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o, ARMBaseTargetMachine &tm, - CodeGenOpt::Level OptLevel, bool verbose); static AsmPrinterCtorFn AsmPrinterCtor; Modified: llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp Tue Jun 30 20:48:54 2009 @@ -82,9 +82,8 @@ bool InCPMode; public: explicit ARMAsmPrinter(raw_ostream &O, TargetMachine &TM, - const TargetAsmInfo *T, CodeGenOpt::Level OL, - bool V) - : AsmPrinter(O, TM, T, OL, V), DW(0), AFI(NULL), MCP(NULL), + const TargetAsmInfo *T, bool V) + : AsmPrinter(O, TM, T, V), DW(0), AFI(NULL), MCP(NULL), InCPMode(false) { Subtarget = &TM.getSubtarget(); } @@ -1198,9 +1197,8 @@ /// FunctionPass *llvm::createARMCodePrinterPass(raw_ostream &o, ARMBaseTargetMachine &tm, - CodeGenOpt::Level OptLevel, bool verbose) { - return new ARMAsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, verbose); + return new ARMAsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); } namespace { Modified: llvm/trunk/lib/Target/Alpha/Alpha.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/Alpha.h?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/Alpha/Alpha.h (original) +++ llvm/trunk/lib/Target/Alpha/Alpha.h Tue Jun 30 20:48:54 2009 @@ -27,7 +27,6 @@ FunctionPass *createAlphaISelDag(AlphaTargetMachine &TM); FunctionPass *createAlphaCodePrinterPass(raw_ostream &OS, TargetMachine &TM, - CodeGenOpt::Level OptLevel, bool Verbose); FunctionPass *createAlphaPatternInstructionSelector(TargetMachine &TM); FunctionPass *createAlphaCodeEmitterPass(AlphaTargetMachine &TM, Modified: llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp (original) +++ llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp Tue Jun 30 20:48:54 2009 @@ -94,7 +94,7 @@ // Output assembly language. assert(AsmPrinterCtor && "AsmPrinter was not linked in"); if (AsmPrinterCtor) - PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose)); + PM.add(AsmPrinterCtor(Out, *this, Verbose)); return false; } bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM, @@ -104,7 +104,7 @@ if (DumpAsm) { assert(AsmPrinterCtor && "AsmPrinter was not linked in"); if (AsmPrinterCtor) - PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); + PM.add(AsmPrinterCtor(errs(), *this, true)); } return false; } @@ -115,7 +115,7 @@ if (DumpAsm) { assert(AsmPrinterCtor && "AsmPrinter was not linked in"); if (AsmPrinterCtor) - PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); + PM.add(AsmPrinterCtor(errs(), *this, true)); } return false; } Modified: llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.h?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.h (original) +++ llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.h Tue Jun 30 20:48:54 2009 @@ -41,7 +41,6 @@ // set this functions to ctor pointer at startup time if they are linked in. typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o, TargetMachine &tm, - CodeGenOpt::Level OptLevel, bool verbose); static AsmPrinterCtorFn AsmPrinterCtor; Modified: llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp Tue Jun 30 20:48:54 2009 @@ -38,9 +38,8 @@ /// explicit AlphaAsmPrinter(raw_ostream &o, TargetMachine &tm, - const TargetAsmInfo *T, CodeGenOpt::Level OL, - bool V) - : AsmPrinter(o, tm, T, OL, V) {} + const TargetAsmInfo *T, bool V) + : AsmPrinter(o, tm, T, V) {} virtual const char *getPassName() const { return "Alpha Assembly Printer"; @@ -70,9 +69,8 @@ /// FunctionPass *llvm::createAlphaCodePrinterPass(raw_ostream &o, TargetMachine &tm, - CodeGenOpt::Level OptLevel, bool verbose) { - return new AlphaAsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, verbose); + return new AlphaAsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); } #include "AlphaGenAsmWriter.inc" Modified: llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp Tue Jun 30 20:48:54 2009 @@ -50,9 +50,8 @@ std::set FnStubs, GVStubs; public: explicit SPUAsmPrinter(raw_ostream &O, TargetMachine &TM, - const TargetAsmInfo *T, CodeGenOpt::Level OL, - bool V) : - AsmPrinter(O, TM, T, OL, V) {} + const TargetAsmInfo *T, bool V) : + AsmPrinter(O, TM, T, V) {} virtual const char *getPassName() const { return "STI CBEA SPU Assembly Printer"; @@ -290,9 +289,8 @@ DwarfWriter *DW; public: explicit LinuxAsmPrinter(raw_ostream &O, SPUTargetMachine &TM, - const TargetAsmInfo *T, CodeGenOpt::Level F, - bool V) - : SPUAsmPrinter(O, TM, T, F, V), DW(0) {} + const TargetAsmInfo *T, bool V) + : SPUAsmPrinter(O, TM, T, V), DW(0) {} virtual const char *getPassName() const { return "STI CBEA SPU Assembly Printer"; @@ -603,9 +601,8 @@ /// FunctionPass *llvm::createSPUAsmPrinterPass(raw_ostream &o, SPUTargetMachine &tm, - CodeGenOpt::Level OptLevel, bool verbose) { - return new LinuxAsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, verbose); + return new LinuxAsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); } // Force static initialization. Modified: llvm/trunk/lib/Target/CellSPU/SPU.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPU.h?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPU.h (original) +++ llvm/trunk/lib/Target/CellSPU/SPU.h Tue Jun 30 20:48:54 2009 @@ -26,7 +26,6 @@ FunctionPass *createSPUISelDag(SPUTargetMachine &TM); FunctionPass *createSPUAsmPrinterPass(raw_ostream &o, SPUTargetMachine &tm, - CodeGenOpt::Level OptLevel, bool verbose); /*--== Utility functions/predicates/etc used all over the place: --==*/ Modified: llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp Tue Jun 30 20:48:54 2009 @@ -94,6 +94,6 @@ // Output assembly language. assert(AsmPrinterCtor && "AsmPrinter was not linked in"); if (AsmPrinterCtor) - PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose)); + PM.add(AsmPrinterCtor(Out, *this, Verbose)); return false; } Modified: llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.h?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.h (original) +++ llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.h Tue Jun 30 20:48:54 2009 @@ -43,7 +43,6 @@ // set this functions to ctor pointer at startup time if they are linked in. typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o, SPUTargetMachine &tm, - CodeGenOpt::Level OptLevel, bool verbose); static AsmPrinterCtorFn AsmPrinterCtor; Modified: llvm/trunk/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp Tue Jun 30 20:48:54 2009 @@ -38,9 +38,8 @@ std::set ExternalFunctionNames, ExternalObjectNames; public: explicit IA64AsmPrinter(raw_ostream &O, TargetMachine &TM, - const TargetAsmInfo *T, CodeGenOpt::Level OL, - bool V) - : AsmPrinter(O, TM, T, OL, V) {} + const TargetAsmInfo *T, bool V) + : AsmPrinter(O, TM, T, V) {} virtual const char *getPassName() const { return "IA64 Assembly Printer"; @@ -373,9 +372,8 @@ /// FunctionPass *llvm::createIA64CodePrinterPass(raw_ostream &o, IA64TargetMachine &tm, - CodeGenOpt::Level OptLevel, bool verbose) { - return new IA64AsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, verbose); + return new IA64AsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); } namespace { Modified: llvm/trunk/lib/Target/IA64/IA64.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64.h?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/IA64/IA64.h (original) +++ llvm/trunk/lib/Target/IA64/IA64.h Tue Jun 30 20:48:54 2009 @@ -39,7 +39,6 @@ /// FunctionPass *createIA64CodePrinterPass(raw_ostream &o, IA64TargetMachine &tm, - CodeGenOpt::Level OptLevel, bool verbose); } // End llvm namespace Modified: llvm/trunk/lib/Target/IA64/IA64TargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64TargetMachine.cpp?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/IA64/IA64TargetMachine.cpp (original) +++ llvm/trunk/lib/Target/IA64/IA64TargetMachine.cpp Tue Jun 30 20:48:54 2009 @@ -73,7 +73,7 @@ //===----------------------------------------------------------------------===// bool IA64TargetMachine::addInstSelector(PassManagerBase &PM, - CodeGenOpt::Level OptLevel){ + CodeGenOpt::Level OptLevel) { PM.add(createIA64DAGToDAGInstructionSelector(*this)); return false; } @@ -91,7 +91,7 @@ // Output assembly language. assert(AsmPrinterCtor && "AsmPrinter was not linked in"); if (AsmPrinterCtor) - PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose)); + PM.add(AsmPrinterCtor(Out, *this, Verbose)); return false; } Modified: llvm/trunk/lib/Target/IA64/IA64TargetMachine.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64TargetMachine.h?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/IA64/IA64TargetMachine.h (original) +++ llvm/trunk/lib/Target/IA64/IA64TargetMachine.h Tue Jun 30 20:48:54 2009 @@ -38,7 +38,6 @@ // set this functions to ctor pointer at startup time if they are linked in. typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o, IA64TargetMachine &tm, - CodeGenOpt::Level OptLevel, bool verbose); static AsmPrinterCtorFn AsmPrinterCtor; Modified: llvm/trunk/lib/Target/MSP430/MSP430.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430.h?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/MSP430/MSP430.h (original) +++ llvm/trunk/lib/Target/MSP430/MSP430.h Tue Jun 30 20:48:54 2009 @@ -26,7 +26,6 @@ CodeGenOpt::Level OptLevel); FunctionPass *createMSP430CodePrinterPass(raw_ostream &o, MSP430TargetMachine &tm, - CodeGenOpt::Level OptLevel, bool verbose); } // end namespace llvm; Modified: llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp Tue Jun 30 20:48:54 2009 @@ -40,9 +40,8 @@ class VISIBILITY_HIDDEN MSP430AsmPrinter : public AsmPrinter { public: MSP430AsmPrinter(raw_ostream &O, MSP430TargetMachine &TM, - const TargetAsmInfo *TAI, - CodeGenOpt::Level OL, bool V) - : AsmPrinter(O, TM, TAI, OL, V) {} + const TargetAsmInfo *TAI, bool V) + : AsmPrinter(O, TM, TAI, V) {} virtual const char *getPassName() const { return "MSP430 Assembly Printer"; @@ -77,9 +76,8 @@ /// FunctionPass *llvm::createMSP430CodePrinterPass(raw_ostream &o, MSP430TargetMachine &tm, - CodeGenOpt::Level OptLevel, bool verbose) { - return new MSP430AsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, verbose); + return new MSP430AsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); } bool MSP430AsmPrinter::doInitialization(Module &M) { Modified: llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp (original) +++ llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp Tue Jun 30 20:48:54 2009 @@ -62,7 +62,7 @@ bool Verbose, raw_ostream &Out) { // Output assembly language. - PM.add(createMSP430CodePrinterPass(Out, *this, OptLevel, Verbose)); + PM.add(createMSP430CodePrinterPass(Out, *this, Verbose)); return false; } Modified: llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp Tue Jun 30 20:48:54 2009 @@ -51,9 +51,8 @@ const MipsSubtarget *Subtarget; public: explicit MipsAsmPrinter(raw_ostream &O, MipsTargetMachine &TM, - const TargetAsmInfo *T, CodeGenOpt::Level OL, - bool V) - : AsmPrinter(O, TM, T, OL, V) { + const TargetAsmInfo *T, bool V) + : AsmPrinter(O, TM, T, V) { Subtarget = &TM.getSubtarget(); } @@ -93,9 +92,8 @@ /// regardless of whether the function is in SSA form. FunctionPass *llvm::createMipsCodePrinterPass(raw_ostream &o, MipsTargetMachine &tm, - CodeGenOpt::Level OptLevel, bool verbose) { - return new MipsAsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, verbose); + return new MipsAsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); } //===----------------------------------------------------------------------===// Modified: llvm/trunk/lib/Target/Mips/Mips.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips.h?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/Mips.h (original) +++ llvm/trunk/lib/Target/Mips/Mips.h Tue Jun 30 20:48:54 2009 @@ -27,7 +27,6 @@ FunctionPass *createMipsDelaySlotFillerPass(MipsTargetMachine &TM); FunctionPass *createMipsCodePrinterPass(raw_ostream &OS, MipsTargetMachine &TM, - CodeGenOpt::Level OptLevel, bool Verbose); } // end namespace llvm; Modified: llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp Tue Jun 30 20:48:54 2009 @@ -134,6 +134,6 @@ bool Verbose, raw_ostream &Out) { // Output assembly language. assert(AsmPrinterCtor && "AsmPrinter was not linked in"); - PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose)); + PM.add(AsmPrinterCtor(Out, *this, Verbose)); return false; } Modified: llvm/trunk/lib/Target/Mips/MipsTargetMachine.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsTargetMachine.h?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsTargetMachine.h (original) +++ llvm/trunk/lib/Target/Mips/MipsTargetMachine.h Tue Jun 30 20:48:54 2009 @@ -39,7 +39,6 @@ // linked in. typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o, MipsTargetMachine &tm, - CodeGenOpt::Level OptLevel, bool verbose); static AsmPrinterCtorFn AsmPrinterCtor; Modified: llvm/trunk/lib/Target/PIC16/PIC16.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16.h?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/PIC16/PIC16.h (original) +++ llvm/trunk/lib/Target/PIC16/PIC16.h Tue Jun 30 20:48:54 2009 @@ -331,7 +331,6 @@ FunctionPass *createPIC16ISelDag(PIC16TargetMachine &TM); FunctionPass *createPIC16CodePrinterPass(raw_ostream &OS, PIC16TargetMachine &TM, - CodeGenOpt::Level OptLevel, bool Verbose); // Banksel optimzer pass. FunctionPass *createPIC16MemSelOptimizerPass(); Modified: llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.cpp Tue Jun 30 20:48:54 2009 @@ -113,9 +113,8 @@ /// FunctionPass *llvm::createPIC16CodePrinterPass(raw_ostream &o, PIC16TargetMachine &tm, - CodeGenOpt::Level OptLevel, bool verbose) { - return new PIC16AsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, verbose); + return new PIC16AsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); } Modified: llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.h?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.h (original) +++ llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.h Tue Jun 30 20:48:54 2009 @@ -30,9 +30,8 @@ namespace llvm { struct VISIBILITY_HIDDEN PIC16AsmPrinter : public AsmPrinter { explicit PIC16AsmPrinter(raw_ostream &O, PIC16TargetMachine &TM, - const TargetAsmInfo *T, CodeGenOpt::Level OL, - bool V) - : AsmPrinter(O, TM, T, OL, V), DbgInfo(O, T) { + const TargetAsmInfo *T, bool V) + : AsmPrinter(O, TM, T, V), DbgInfo(O, T) { PTLI = TM.getTargetLowering(); PTAI = static_cast (T); } Modified: llvm/trunk/lib/Target/PIC16/PIC16TargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16TargetMachine.cpp?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/PIC16/PIC16TargetMachine.cpp (original) +++ llvm/trunk/lib/Target/PIC16/PIC16TargetMachine.cpp Tue Jun 30 20:48:54 2009 @@ -65,11 +65,11 @@ return false; } -bool PIC16TargetMachine:: -addAssemblyEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, - bool Verbose, raw_ostream &Out) { +bool PIC16TargetMachine::addAssemblyEmitter(PassManagerBase &PM, + CodeGenOpt::Level OptLevel, + bool Verbose, raw_ostream &Out) { // Output assembly language. - PM.add(createPIC16CodePrinterPass(Out, *this, OptLevel, Verbose)); + PM.add(createPIC16CodePrinterPass(Out, *this, Verbose)); return false; } Modified: llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp Tue Jun 30 20:48:54 2009 @@ -56,9 +56,8 @@ const PPCSubtarget &Subtarget; public: explicit PPCAsmPrinter(raw_ostream &O, TargetMachine &TM, - const TargetAsmInfo *T, CodeGenOpt::Level OL, - bool V) - : AsmPrinter(O, TM, T, OL, V), + const TargetAsmInfo *T, bool V) + : AsmPrinter(O, TM, T, V), Subtarget(TM.getSubtarget()) {} virtual const char *getPassName() const { @@ -296,9 +295,8 @@ class VISIBILITY_HIDDEN PPCLinuxAsmPrinter : public PPCAsmPrinter { public: explicit PPCLinuxAsmPrinter(raw_ostream &O, PPCTargetMachine &TM, - const TargetAsmInfo *T, CodeGenOpt::Level OL, - bool V) - : PPCAsmPrinter(O, TM, T, OL, V){} + const TargetAsmInfo *T, bool V) + : PPCAsmPrinter(O, TM, T, V){} virtual const char *getPassName() const { return "Linux PPC Assembly Printer"; @@ -323,9 +321,8 @@ raw_ostream &OS; public: explicit PPCDarwinAsmPrinter(raw_ostream &O, PPCTargetMachine &TM, - const TargetAsmInfo *T, CodeGenOpt::Level OL, - bool V) - : PPCAsmPrinter(O, TM, T, OL, V), OS(O) {} + const TargetAsmInfo *T, bool V) + : PPCAsmPrinter(O, TM, T, V), OS(O) {} virtual const char *getPassName() const { return "Darwin PPC Assembly Printer"; @@ -1119,16 +1116,13 @@ /// FunctionPass *llvm::createPPCAsmPrinterPass(raw_ostream &o, PPCTargetMachine &tm, - CodeGenOpt::Level OptLevel, bool verbose) { const PPCSubtarget *Subtarget = &tm.getSubtarget(); if (Subtarget->isDarwin()) { - return new PPCDarwinAsmPrinter(o, tm, tm.getTargetAsmInfo(), - OptLevel, verbose); + return new PPCDarwinAsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); } else { - return new PPCLinuxAsmPrinter(o, tm, tm.getTargetAsmInfo(), - OptLevel, verbose); + return new PPCLinuxAsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); } } Modified: llvm/trunk/lib/Target/PowerPC/PPC.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPC.h?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPC.h (original) +++ llvm/trunk/lib/Target/PowerPC/PPC.h Tue Jun 30 20:48:54 2009 @@ -28,9 +28,8 @@ FunctionPass *createPPCBranchSelectionPass(); FunctionPass *createPPCISelDag(PPCTargetMachine &TM); -FunctionPass *createPPCAsmPrinterPass(raw_ostream &OS, - PPCTargetMachine &TM, - CodeGenOpt::Level OptLevel, bool Verbose); +FunctionPass *createPPCAsmPrinterPass(raw_ostream &OS, PPCTargetMachine &TM, + bool Verbose); FunctionPass *createPPCCodeEmitterPass(PPCTargetMachine &TM, MachineCodeEmitter &MCE); FunctionPass *createPPCJITCodeEmitterPass(PPCTargetMachine &TM, Modified: llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp Tue Jun 30 20:48:54 2009 @@ -152,7 +152,7 @@ raw_ostream &Out) { assert(AsmPrinterCtor && "AsmPrinter was not linked in"); if (AsmPrinterCtor) - PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose)); + PM.add(AsmPrinterCtor(Out, *this, Verbose)); return false; } @@ -183,7 +183,7 @@ if (DumpAsm) { assert(AsmPrinterCtor && "AsmPrinter was not linked in"); if (AsmPrinterCtor) - PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); + PM.add(AsmPrinterCtor(errs(), *this, true)); } return false; @@ -215,7 +215,7 @@ if (DumpAsm) { assert(AsmPrinterCtor && "AsmPrinter was not linked in"); if (AsmPrinterCtor) - PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); + PM.add(AsmPrinterCtor(errs(), *this, true)); } return false; @@ -230,7 +230,7 @@ if (DumpAsm) { assert(AsmPrinterCtor && "AsmPrinter was not linked in"); if (AsmPrinterCtor) - PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); + PM.add(AsmPrinterCtor(errs(), *this, true)); } return false; @@ -245,7 +245,7 @@ if (DumpAsm) { assert(AsmPrinterCtor && "AsmPrinter was not linked in"); if (AsmPrinterCtor) - PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); + PM.add(AsmPrinterCtor(errs(), *this, true)); } return false; Modified: llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h (original) +++ llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h Tue Jun 30 20:48:54 2009 @@ -46,7 +46,6 @@ // set this functions to ctor pointer at startup time if they are linked in. typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o, PPCTargetMachine &tm, - CodeGenOpt::Level OptLevel, bool verbose); static AsmPrinterCtorFn AsmPrinterCtor; Modified: llvm/trunk/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp Tue Jun 30 20:48:54 2009 @@ -50,9 +50,8 @@ unsigned BBNumber; public: explicit SparcAsmPrinter(raw_ostream &O, TargetMachine &TM, - const TargetAsmInfo *T, CodeGenOpt::Level OL, - bool V) - : AsmPrinter(O, TM, T, OL, V), BBNumber(0) {} + const TargetAsmInfo *T, bool V) + : AsmPrinter(O, TM, T, V), BBNumber(0) {} virtual const char *getPassName() const { return "Sparc Assembly Printer"; @@ -84,9 +83,8 @@ /// FunctionPass *llvm::createSparcCodePrinterPass(raw_ostream &o, TargetMachine &tm, - CodeGenOpt::Level OptLevel, bool verbose) { - return new SparcAsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, verbose); + return new SparcAsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); } Modified: llvm/trunk/lib/Target/Sparc/Sparc.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/Sparc.h?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/Sparc/Sparc.h (original) +++ llvm/trunk/lib/Target/Sparc/Sparc.h Tue Jun 30 20:48:54 2009 @@ -25,7 +25,6 @@ FunctionPass *createSparcISelDag(SparcTargetMachine &TM); FunctionPass *createSparcCodePrinterPass(raw_ostream &OS, TargetMachine &TM, - CodeGenOpt::Level OptLevel, bool Verbose); FunctionPass *createSparcDelaySlotFillerPass(TargetMachine &TM); FunctionPass *createSparcFPMoverPass(TargetMachine &TM); Modified: llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp (original) +++ llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp Tue Jun 30 20:48:54 2009 @@ -90,6 +90,6 @@ // Output assembly language. assert(AsmPrinterCtor && "AsmPrinter was not linked in"); if (AsmPrinterCtor) - PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose)); + PM.add(AsmPrinterCtor(Out, *this, Verbose)); return false; } Modified: llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h (original) +++ llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h Tue Jun 30 20:48:54 2009 @@ -39,7 +39,6 @@ // set this functions to ctor pointer at startup time if they are linked in. typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o, TargetMachine &tm, - CodeGenOpt::Level OptLevel, bool verbose); static AsmPrinterCtorFn AsmPrinterCtor; Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h (original) +++ llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h Tue Jun 30 20:48:54 2009 @@ -38,9 +38,8 @@ MCStreamer *Streamer; public: explicit X86ATTAsmPrinter(raw_ostream &O, X86TargetMachine &TM, - const TargetAsmInfo *T, CodeGenOpt::Level OL, - bool V) - : AsmPrinter(O, TM, T, OL, V) { + const TargetAsmInfo *T, bool V) + : AsmPrinter(O, TM, T, V) { Subtarget = &TM.getSubtarget(); Context = 0; Streamer = 0; Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp Tue Jun 30 20:48:54 2009 @@ -25,15 +25,12 @@ /// FunctionPass *llvm::createX86CodePrinterPass(raw_ostream &o, X86TargetMachine &tm, - CodeGenOpt::Level OptLevel, bool verbose) { const X86Subtarget *Subtarget = &tm.getSubtarget(); if (Subtarget->isFlavorIntel()) - return new X86IntelAsmPrinter(o, tm, tm.getTargetAsmInfo(), - OptLevel, verbose); - return new X86ATTAsmPrinter(o, tm, tm.getTargetAsmInfo(), - OptLevel, verbose); + return new X86IntelAsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); + return new X86ATTAsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); } namespace { Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h (original) +++ llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h Tue Jun 30 20:48:54 2009 @@ -26,9 +26,8 @@ struct VISIBILITY_HIDDEN X86IntelAsmPrinter : public AsmPrinter { explicit X86IntelAsmPrinter(raw_ostream &O, X86TargetMachine &TM, - const TargetAsmInfo *T, CodeGenOpt::Level OL, - bool V) - : AsmPrinter(O, TM, T, OL, V) {} + const TargetAsmInfo *T, bool V) + : AsmPrinter(O, TM, T, V) {} virtual const char *getPassName() const { return "X86 Intel-Style Assembly Printer"; Modified: llvm/trunk/lib/Target/X86/X86.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.h?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86.h (original) +++ llvm/trunk/lib/Target/X86/X86.h Tue Jun 30 20:48:54 2009 @@ -46,9 +46,7 @@ /// assembly code for a MachineFunction to the given output stream, /// using the given target machine description. /// -FunctionPass *createX86CodePrinterPass(raw_ostream &o, - X86TargetMachine &tm, - CodeGenOpt::Level OptLevel, +FunctionPass *createX86CodePrinterPass(raw_ostream &o, X86TargetMachine &tm, bool Verbose); /// createX86CodeEmitterPass - Return a pass that emits the collected X86 code Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp (original) +++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Tue Jun 30 20:48:54 2009 @@ -226,7 +226,7 @@ assert(AsmPrinterCtor && "AsmPrinter was not linked in"); if (AsmPrinterCtor) - PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose)); + PM.add(AsmPrinterCtor(Out, *this, Verbose)); return false; } @@ -254,7 +254,7 @@ if (DumpAsm) { assert(AsmPrinterCtor && "AsmPrinter was not linked in"); if (AsmPrinterCtor) - PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); + PM.add(AsmPrinterCtor(errs(), *this, true)); } return false; @@ -284,7 +284,7 @@ if (DumpAsm) { assert(AsmPrinterCtor && "AsmPrinter was not linked in"); if (AsmPrinterCtor) - PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); + PM.add(AsmPrinterCtor(errs(), *this, true)); } return false; @@ -298,7 +298,7 @@ if (DumpAsm) { assert(AsmPrinterCtor && "AsmPrinter was not linked in"); if (AsmPrinterCtor) - PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); + PM.add(AsmPrinterCtor(errs(), *this, true)); } return false; @@ -312,7 +312,7 @@ if (DumpAsm) { assert(AsmPrinterCtor && "AsmPrinter was not linked in"); if (AsmPrinterCtor) - PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); + PM.add(AsmPrinterCtor(errs(), *this, true)); } return false; Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.h?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86TargetMachine.h (original) +++ llvm/trunk/lib/Target/X86/X86TargetMachine.h Tue Jun 30 20:48:54 2009 @@ -45,7 +45,6 @@ // set this functions to ctor pointer at startup time if they are linked in. typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o, X86TargetMachine &tm, - CodeGenOpt::Level OptLevel, bool verbose); static AsmPrinterCtorFn AsmPrinterCtor; Modified: llvm/trunk/lib/Target/XCore/XCore.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCore.h?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/XCore/XCore.h (original) +++ llvm/trunk/lib/Target/XCore/XCore.h Tue Jun 30 20:48:54 2009 @@ -26,7 +26,6 @@ FunctionPass *createXCoreISelDag(XCoreTargetMachine &TM); FunctionPass *createXCoreCodePrinterPass(raw_ostream &OS, XCoreTargetMachine &TM, - CodeGenOpt::Level OptLevel, bool Verbose); } // end namespace llvm; Modified: llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp Tue Jun 30 20:48:54 2009 @@ -58,9 +58,8 @@ const XCoreSubtarget &Subtarget; public: explicit XCoreAsmPrinter(raw_ostream &O, XCoreTargetMachine &TM, - const TargetAsmInfo *T, CodeGenOpt::Level OL, - bool V) - : AsmPrinter(O, TM, T, OL, V), DW(0), + const TargetAsmInfo *T, bool V) + : AsmPrinter(O, TM, T, V), DW(0), Subtarget(*TM.getSubtargetImpl()) {} virtual const char *getPassName() const { @@ -106,9 +105,8 @@ /// FunctionPass *llvm::createXCoreCodePrinterPass(raw_ostream &o, XCoreTargetMachine &tm, - CodeGenOpt::Level OptLevel, bool verbose) { - return new XCoreAsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, verbose); + return new XCoreAsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); } // PrintEscapedString - Print each character of the specified string, escaping Modified: llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp?rev=74579&r1=74578&r2=74579&view=diff ============================================================================== --- llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp (original) +++ llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp Tue Jun 30 20:48:54 2009 @@ -69,6 +69,6 @@ bool Verbose, raw_ostream &Out) { // Output assembly language. - PM.add(createXCoreCodePrinterPass(Out, *this, OptLevel, Verbose)); + PM.add(createXCoreCodePrinterPass(Out, *this, Verbose)); return false; } From evan.cheng at apple.com Tue Jun 30 20:55:48 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 30 Jun 2009 18:55:48 -0700 Subject: [llvm-commits] [llvm] r74579 - in /llvm/trunk: include/llvm/CodeGen/ lib/CodeGen/AsmPrinter/ lib/Target/ARM/ lib/Target/ARM/AsmPrinter/ lib/Target/Alpha/ lib/Target/Alpha/AsmPrinter/ lib/Target/CellSPU/ lib/Target/CellSPU/AsmPrinter/ lib/Target/IA64/ lib/Target/IA64/AsmPrinter/ lib/Target/MSP430/ lib/Target/Mips/ lib/Target/Mips/AsmPrinter/ lib/Target/PIC16/ lib/Target/PowerPC/ lib/Target/PowerPC/AsmPrinter/ lib/Target/Sparc/ lib/Target/Sparc/AsmPrinter/ lib/Target/X86/ lib/Target/X86/AsmPrinter/ lib/Target/XCore/ In-Reply-To: <200907010148.n611muFo005142@zion.cs.uiuc.edu> References: <200907010148.n611muFo005142@zion.cs.uiuc.edu> Message-ID: On Jun 30, 2009, at 6:48 PM, Daniel Dunbar wrote: > Author: ddunbar > Date: Tue Jun 30 20:48:54 2009 > New Revision: 74579 > > URL: http://llvm.org/viewvc/llvm-project?rev=74579&view=rev > Log: > Remove unused AsmPrinter OptLevel argument, and propogate. > - This more or less amounts to a revert of r65379. I'm curious to > know what > happened that caused this variable to become unused. Is it unused? It used to control whether isel emits label nodes that force source ordering at -O0 (yeah it's horrible). Evan > > Modified: > llvm/trunk/include/llvm/CodeGen/AsmPrinter.h > llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp > llvm/trunk/lib/Target/ARM/ARM.h > llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp > llvm/trunk/lib/Target/ARM/ARMTargetMachine.h > llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp > llvm/trunk/lib/Target/Alpha/Alpha.h > llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp > llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.h > llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp > llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp > llvm/trunk/lib/Target/CellSPU/SPU.h > llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp > llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.h > llvm/trunk/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp > llvm/trunk/lib/Target/IA64/IA64.h > llvm/trunk/lib/Target/IA64/IA64TargetMachine.cpp > llvm/trunk/lib/Target/IA64/IA64TargetMachine.h > llvm/trunk/lib/Target/MSP430/MSP430.h > llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp > llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp > llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp > llvm/trunk/lib/Target/Mips/Mips.h > llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp > llvm/trunk/lib/Target/Mips/MipsTargetMachine.h > llvm/trunk/lib/Target/PIC16/PIC16.h > llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.cpp > llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.h > llvm/trunk/lib/Target/PIC16/PIC16TargetMachine.cpp > llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp > llvm/trunk/lib/Target/PowerPC/PPC.h > llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp > llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h > llvm/trunk/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp > llvm/trunk/lib/Target/Sparc/Sparc.h > llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp > llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h > llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h > llvm/trunk/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp > llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h > llvm/trunk/lib/Target/X86/X86.h > llvm/trunk/lib/Target/X86/X86TargetMachine.cpp > llvm/trunk/lib/Target/X86/X86TargetMachine.h > llvm/trunk/lib/Target/XCore/XCore.h > llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp > llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp > > Modified: llvm/trunk/include/llvm/CodeGen/AsmPrinter.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/AsmPrinter.h?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/include/llvm/CodeGen/AsmPrinter.h (original) > +++ llvm/trunk/include/llvm/CodeGen/AsmPrinter.h Tue Jun 30 20:48:54 > 2009 > @@ -65,8 +65,6 @@ > /// DW - If available, this is a pointer to the current dwarf > writer. > DwarfWriter *DW; > > - /// OptLevel - Generating code at a specific optimization level. > - CodeGenOpt::Level OptLevel; > public: > /// Output stream on which we're printing assembly code. > /// > @@ -120,7 +118,7 @@ > > protected: > explicit AsmPrinter(raw_ostream &o, TargetMachine &TM, > - const TargetAsmInfo *T, CodeGenOpt::Level > OL, bool V); > + const TargetAsmInfo *T, bool V); > > public: > virtual ~AsmPrinter(); > @@ -139,7 +137,8 @@ > /// > /// This method is used when about to emit executable code. > /// > - void SwitchToTextSection(const char *NewSection, const > GlobalValue *GV = NULL); > + void SwitchToTextSection(const char *NewSection, > + const GlobalValue *GV = NULL); > > /// SwitchToDataSection - Switch to the specified section of the > executable > /// if we are not already in it! If GV is non-null and if the > global has an > @@ -153,7 +152,8 @@ > /// is the same as the SwitchToTextSection method, but not all > assemblers > /// are the same. > /// > - void SwitchToDataSection(const char *NewSection, const > GlobalValue *GV = NULL); > + void SwitchToDataSection(const char *NewSection, > + const GlobalValue *GV = NULL); > > /// SwitchToSection - Switch to the specified section of the > executable if > /// we are not already in it! > > Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp (original) > +++ llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp Tue Jun 30 > 20:48:54 2009 > @@ -42,8 +42,8 @@ > > char AsmPrinter::ID = 0; > AsmPrinter::AsmPrinter(raw_ostream &o, TargetMachine &tm, > - const TargetAsmInfo *T, CodeGenOpt::Level > OL, bool VDef) > - : MachineFunctionPass(&ID), FunctionNumber(0), OptLevel(OL), O(o), > + const TargetAsmInfo *T, bool VDef) > + : MachineFunctionPass(&ID), FunctionNumber(0), O(o), > TM(tm), TAI(T), TRI(tm.getRegisterInfo()), > IsInTextSection(false), LastMI(0), LastFn(0), Counter(~0U), > PrevDLT(0, ~0U, ~0U) { > > Modified: llvm/trunk/lib/Target/ARM/ARM.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARM.h?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/ARM/ARM.h (original) > +++ llvm/trunk/lib/Target/ARM/ARM.h Tue Jun 30 20:48:54 2009 > @@ -93,7 +93,6 @@ > FunctionPass *createARMISelDag(ARMBaseTargetMachine &TM); > FunctionPass *createARMCodePrinterPass(raw_ostream &O, > ARMBaseTargetMachine &TM, > - CodeGenOpt::Level OptLevel, > bool Verbose); > FunctionPass *createARMCodeEmitterPass(ARMBaseTargetMachine &TM, > MachineCodeEmitter &MCE); > > Modified: llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp (original) > +++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp Tue Jun 30 > 20:48:54 2009 > @@ -179,7 +179,7 @@ > // Output assembly language. > assert(AsmPrinterCtor && "AsmPrinter was not linked in"); > if (AsmPrinterCtor) > - PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose)); > + PM.add(AsmPrinterCtor(Out, *this, Verbose)); > > return false; > } > @@ -198,7 +198,7 @@ > if (DumpAsm) { > assert(AsmPrinterCtor && "AsmPrinter was not linked in"); > if (AsmPrinterCtor) > - PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); > + PM.add(AsmPrinterCtor(errs(), *this, true)); > } > > return false; > @@ -217,7 +217,7 @@ > if (DumpAsm) { > assert(AsmPrinterCtor && "AsmPrinter was not linked in"); > if (AsmPrinterCtor) > - PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); > + PM.add(AsmPrinterCtor(errs(), *this, true)); > } > > return false; > @@ -232,7 +232,7 @@ > if (DumpAsm) { > assert(AsmPrinterCtor && "AsmPrinter was not linked in"); > if (AsmPrinterCtor) > - PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); > + PM.add(AsmPrinterCtor(errs(), *this, true)); > } > > return false; > @@ -247,7 +247,7 @@ > if (DumpAsm) { > assert(AsmPrinterCtor && "AsmPrinter was not linked in"); > if (AsmPrinterCtor) > - PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); > + PM.add(AsmPrinterCtor(errs(), *this, true)); > } > > return false; > > Modified: llvm/trunk/lib/Target/ARM/ARMTargetMachine.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.h?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/ARM/ARMTargetMachine.h (original) > +++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.h Tue Jun 30 20:48:54 > 2009 > @@ -43,7 +43,6 @@ > // set this functions to ctor pointer at startup time if they are > linked in. > typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o, > ARMBaseTargetMachine &tm, > - CodeGenOpt::Level > OptLevel, > bool verbose); > static AsmPrinterCtorFn AsmPrinterCtor; > > > Modified: llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp (original) > +++ llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp Tue Jun > 30 20:48:54 2009 > @@ -82,9 +82,8 @@ > bool InCPMode; > public: > explicit ARMAsmPrinter(raw_ostream &O, TargetMachine &TM, > - const TargetAsmInfo *T, > CodeGenOpt::Level OL, > - bool V) > - : AsmPrinter(O, TM, T, OL, V), DW(0), AFI(NULL), MCP(NULL), > + const TargetAsmInfo *T, bool V) > + : AsmPrinter(O, TM, T, V), DW(0), AFI(NULL), MCP(NULL), > InCPMode(false) { > Subtarget = &TM.getSubtarget(); > } > @@ -1198,9 +1197,8 @@ > /// > FunctionPass *llvm::createARMCodePrinterPass(raw_ostream &o, > ARMBaseTargetMachine &tm, > - CodeGenOpt::Level > OptLevel, > bool verbose) { > - return new ARMAsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, > verbose); > + return new ARMAsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); > } > > namespace { > > Modified: llvm/trunk/lib/Target/Alpha/Alpha.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/Alpha.h?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/Alpha/Alpha.h (original) > +++ llvm/trunk/lib/Target/Alpha/Alpha.h Tue Jun 30 20:48:54 2009 > @@ -27,7 +27,6 @@ > FunctionPass *createAlphaISelDag(AlphaTargetMachine &TM); > FunctionPass *createAlphaCodePrinterPass(raw_ostream &OS, > TargetMachine &TM, > - CodeGenOpt::Level > OptLevel, > bool Verbose); > FunctionPass *createAlphaPatternInstructionSelector(TargetMachine > &TM); > FunctionPass *createAlphaCodeEmitterPass(AlphaTargetMachine &TM, > > Modified: llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp (original) > +++ llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp Tue Jun 30 > 20:48:54 2009 > @@ -94,7 +94,7 @@ > // Output assembly language. > assert(AsmPrinterCtor && "AsmPrinter was not linked in"); > if (AsmPrinterCtor) > - PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose)); > + PM.add(AsmPrinterCtor(Out, *this, Verbose)); > return false; > } > bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM, > @@ -104,7 +104,7 @@ > if (DumpAsm) { > assert(AsmPrinterCtor && "AsmPrinter was not linked in"); > if (AsmPrinterCtor) > - PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); > + PM.add(AsmPrinterCtor(errs(), *this, true)); > } > return false; > } > @@ -115,7 +115,7 @@ > if (DumpAsm) { > assert(AsmPrinterCtor && "AsmPrinter was not linked in"); > if (AsmPrinterCtor) > - PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); > + PM.add(AsmPrinterCtor(errs(), *this, true)); > } > return false; > } > > Modified: llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.h?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.h (original) > +++ llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.h Tue Jun 30 > 20:48:54 2009 > @@ -41,7 +41,6 @@ > // set this functions to ctor pointer at startup time if they are > linked in. > typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o, > TargetMachine &tm, > - CodeGenOpt::Level > OptLevel, > bool verbose); > static AsmPrinterCtorFn AsmPrinterCtor; > > > Modified: llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp > (original) > +++ llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp Tue > Jun 30 20:48:54 2009 > @@ -38,9 +38,8 @@ > /// > > explicit AlphaAsmPrinter(raw_ostream &o, TargetMachine &tm, > - const TargetAsmInfo *T, > CodeGenOpt::Level OL, > - bool V) > - : AsmPrinter(o, tm, T, OL, V) {} > + const TargetAsmInfo *T, bool V) > + : AsmPrinter(o, tm, T, V) {} > > virtual const char *getPassName() const { > return "Alpha Assembly Printer"; > @@ -70,9 +69,8 @@ > /// > FunctionPass *llvm::createAlphaCodePrinterPass(raw_ostream &o, > TargetMachine &tm, > - CodeGenOpt::Level > OptLevel, > bool verbose) { > - return new AlphaAsmPrinter(o, tm, tm.getTargetAsmInfo(), > OptLevel, verbose); > + return new AlphaAsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); > } > > #include "AlphaGenAsmWriter.inc" > > Modified: llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp > (original) > +++ llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp Tue > Jun 30 20:48:54 2009 > @@ -50,9 +50,8 @@ > std::set FnStubs, GVStubs; > public: > explicit SPUAsmPrinter(raw_ostream &O, TargetMachine &TM, > - const TargetAsmInfo *T, > CodeGenOpt::Level OL, > - bool V) : > - AsmPrinter(O, TM, T, OL, V) {} > + const TargetAsmInfo *T, bool V) : > + AsmPrinter(O, TM, T, V) {} > > virtual const char *getPassName() const { > return "STI CBEA SPU Assembly Printer"; > @@ -290,9 +289,8 @@ > DwarfWriter *DW; > public: > explicit LinuxAsmPrinter(raw_ostream &O, SPUTargetMachine &TM, > - const TargetAsmInfo *T, > CodeGenOpt::Level F, > - bool V) > - : SPUAsmPrinter(O, TM, T, F, V), DW(0) {} > + const TargetAsmInfo *T, bool V) > + : SPUAsmPrinter(O, TM, T, V), DW(0) {} > > virtual const char *getPassName() const { > return "STI CBEA SPU Assembly Printer"; > @@ -603,9 +601,8 @@ > /// > FunctionPass *llvm::createSPUAsmPrinterPass(raw_ostream &o, > SPUTargetMachine &tm, > - CodeGenOpt::Level > OptLevel, > bool verbose) { > - return new LinuxAsmPrinter(o, tm, tm.getTargetAsmInfo(), > OptLevel, verbose); > + return new LinuxAsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); > } > > // Force static initialization. > > Modified: llvm/trunk/lib/Target/CellSPU/SPU.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPU.h?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/CellSPU/SPU.h (original) > +++ llvm/trunk/lib/Target/CellSPU/SPU.h Tue Jun 30 20:48:54 2009 > @@ -26,7 +26,6 @@ > FunctionPass *createSPUISelDag(SPUTargetMachine &TM); > FunctionPass *createSPUAsmPrinterPass(raw_ostream &o, > SPUTargetMachine &tm, > - CodeGenOpt::Level OptLevel, > bool verbose); > > /*--== Utility functions/predicates/etc used all over the place: -- > ==*/ > > Modified: llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp (original) > +++ llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp Tue Jun 30 > 20:48:54 2009 > @@ -94,6 +94,6 @@ > // Output assembly language. > assert(AsmPrinterCtor && "AsmPrinter was not linked in"); > if (AsmPrinterCtor) > - PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose)); > + PM.add(AsmPrinterCtor(Out, *this, Verbose)); > return false; > } > > Modified: llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.h?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.h (original) > +++ llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.h Tue Jun 30 > 20:48:54 2009 > @@ -43,7 +43,6 @@ > // set this functions to ctor pointer at startup time if they are > linked in. > typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o, > SPUTargetMachine &tm, > - CodeGenOpt::Level > OptLevel, > bool verbose); > static AsmPrinterCtorFn AsmPrinterCtor; > > > Modified: llvm/trunk/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp > (original) > +++ llvm/trunk/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp Tue Jun > 30 20:48:54 2009 > @@ -38,9 +38,8 @@ > std::set ExternalFunctionNames, ExternalObjectNames; > public: > explicit IA64AsmPrinter(raw_ostream &O, TargetMachine &TM, > - const TargetAsmInfo *T, > CodeGenOpt::Level OL, > - bool V) > - : AsmPrinter(O, TM, T, OL, V) {} > + const TargetAsmInfo *T, bool V) > + : AsmPrinter(O, TM, T, V) {} > > virtual const char *getPassName() const { > return "IA64 Assembly Printer"; > @@ -373,9 +372,8 @@ > /// > FunctionPass *llvm::createIA64CodePrinterPass(raw_ostream &o, > IA64TargetMachine &tm, > - CodeGenOpt::Level > OptLevel, > bool verbose) { > - return new IA64AsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, > verbose); > + return new IA64AsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); > } > > namespace { > > Modified: llvm/trunk/lib/Target/IA64/IA64.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64.h?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/IA64/IA64.h (original) > +++ llvm/trunk/lib/Target/IA64/IA64.h Tue Jun 30 20:48:54 2009 > @@ -39,7 +39,6 @@ > /// > FunctionPass *createIA64CodePrinterPass(raw_ostream &o, > IA64TargetMachine &tm, > - CodeGenOpt::Level OptLevel, > bool verbose); > > } // End llvm namespace > > Modified: llvm/trunk/lib/Target/IA64/IA64TargetMachine.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64TargetMachine.cpp?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/IA64/IA64TargetMachine.cpp (original) > +++ llvm/trunk/lib/Target/IA64/IA64TargetMachine.cpp Tue Jun 30 > 20:48:54 2009 > @@ -73,7 +73,7 @@ > // > = > = > = > ----------------------------------------------------------------------= > ==// > > bool IA64TargetMachine::addInstSelector(PassManagerBase &PM, > - CodeGenOpt::Level OptLevel){ > + CodeGenOpt::Level OptLevel) { > PM.add(createIA64DAGToDAGInstructionSelector(*this)); > return false; > } > @@ -91,7 +91,7 @@ > // Output assembly language. > assert(AsmPrinterCtor && "AsmPrinter was not linked in"); > if (AsmPrinterCtor) > - PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose)); > + PM.add(AsmPrinterCtor(Out, *this, Verbose)); > return false; > } > > > Modified: llvm/trunk/lib/Target/IA64/IA64TargetMachine.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64TargetMachine.h?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/IA64/IA64TargetMachine.h (original) > +++ llvm/trunk/lib/Target/IA64/IA64TargetMachine.h Tue Jun 30 > 20:48:54 2009 > @@ -38,7 +38,6 @@ > // set this functions to ctor pointer at startup time if they are > linked in. > typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o, > IA64TargetMachine &tm, > - CodeGenOpt::Level > OptLevel, > bool verbose); > static AsmPrinterCtorFn AsmPrinterCtor; > > > Modified: llvm/trunk/lib/Target/MSP430/MSP430.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430.h?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/MSP430/MSP430.h (original) > +++ llvm/trunk/lib/Target/MSP430/MSP430.h Tue Jun 30 20:48:54 2009 > @@ -26,7 +26,6 @@ > CodeGenOpt::Level OptLevel); > FunctionPass *createMSP430CodePrinterPass(raw_ostream &o, > MSP430TargetMachine &tm, > - CodeGenOpt::Level > OptLevel, > bool verbose); > } // end namespace llvm; > > > Modified: llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp (original) > +++ llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp Tue Jun 30 > 20:48:54 2009 > @@ -40,9 +40,8 @@ > class VISIBILITY_HIDDEN MSP430AsmPrinter : public AsmPrinter { > public: > MSP430AsmPrinter(raw_ostream &O, MSP430TargetMachine &TM, > - const TargetAsmInfo *TAI, > - CodeGenOpt::Level OL, bool V) > - : AsmPrinter(O, TM, TAI, OL, V) {} > + const TargetAsmInfo *TAI, bool V) > + : AsmPrinter(O, TM, TAI, V) {} > > virtual const char *getPassName() const { > return "MSP430 Assembly Printer"; > @@ -77,9 +76,8 @@ > /// > FunctionPass *llvm::createMSP430CodePrinterPass(raw_ostream &o, > MSP430TargetMachine > &tm, > - CodeGenOpt::Level > OptLevel, > bool verbose) { > - return new MSP430AsmPrinter(o, tm, tm.getTargetAsmInfo(), > OptLevel, verbose); > + return new MSP430AsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); > } > > bool MSP430AsmPrinter::doInitialization(Module &M) { > > Modified: llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp (original) > +++ llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp Tue Jun 30 > 20:48:54 2009 > @@ -62,7 +62,7 @@ > bool Verbose, > raw_ostream &Out) { > // Output assembly language. > - PM.add(createMSP430CodePrinterPass(Out, *this, OptLevel, Verbose)); > + PM.add(createMSP430CodePrinterPass(Out, *this, Verbose)); > return false; > } > > > Modified: llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp > (original) > +++ llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp Tue Jun > 30 20:48:54 2009 > @@ -51,9 +51,8 @@ > const MipsSubtarget *Subtarget; > public: > explicit MipsAsmPrinter(raw_ostream &O, MipsTargetMachine &TM, > - const TargetAsmInfo *T, > CodeGenOpt::Level OL, > - bool V) > - : AsmPrinter(O, TM, T, OL, V) { > + const TargetAsmInfo *T, bool V) > + : AsmPrinter(O, TM, T, V) { > Subtarget = &TM.getSubtarget(); > } > > @@ -93,9 +92,8 @@ > /// regardless of whether the function is in SSA form. > FunctionPass *llvm::createMipsCodePrinterPass(raw_ostream &o, > MipsTargetMachine &tm, > - CodeGenOpt::Level > OptLevel, > bool verbose) { > - return new MipsAsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, > verbose); > + return new MipsAsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); > } > > // > = > = > = > ----------------------------------------------------------------------= > ==// > > Modified: llvm/trunk/lib/Target/Mips/Mips.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips.h?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/Mips/Mips.h (original) > +++ llvm/trunk/lib/Target/Mips/Mips.h Tue Jun 30 20:48:54 2009 > @@ -27,7 +27,6 @@ > FunctionPass *createMipsDelaySlotFillerPass(MipsTargetMachine &TM); > FunctionPass *createMipsCodePrinterPass(raw_ostream &OS, > MipsTargetMachine &TM, > - CodeGenOpt::Level OptLevel, > bool Verbose); > } // end namespace llvm; > > > Modified: llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp (original) > +++ llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp Tue Jun 30 > 20:48:54 2009 > @@ -134,6 +134,6 @@ > bool Verbose, raw_ostream &Out) { > // Output assembly language. > assert(AsmPrinterCtor && "AsmPrinter was not linked in"); > - PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose)); > + PM.add(AsmPrinterCtor(Out, *this, Verbose)); > return false; > } > > Modified: llvm/trunk/lib/Target/Mips/MipsTargetMachine.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsTargetMachine.h?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/Mips/MipsTargetMachine.h (original) > +++ llvm/trunk/lib/Target/Mips/MipsTargetMachine.h Tue Jun 30 > 20:48:54 2009 > @@ -39,7 +39,6 @@ > // linked in. > typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o, > MipsTargetMachine &tm, > - CodeGenOpt::Level > OptLevel, > bool verbose); > static AsmPrinterCtorFn AsmPrinterCtor; > > > Modified: llvm/trunk/lib/Target/PIC16/PIC16.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16.h?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/PIC16/PIC16.h (original) > +++ llvm/trunk/lib/Target/PIC16/PIC16.h Tue Jun 30 20:48:54 2009 > @@ -331,7 +331,6 @@ > FunctionPass *createPIC16ISelDag(PIC16TargetMachine &TM); > FunctionPass *createPIC16CodePrinterPass(raw_ostream &OS, > PIC16TargetMachine &TM, > - CodeGenOpt::Level > OptLevel, > bool Verbose); > // Banksel optimzer pass. > FunctionPass *createPIC16MemSelOptimizerPass(); > > Modified: llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.cpp (original) > +++ llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.cpp Tue Jun 30 > 20:48:54 2009 > @@ -113,9 +113,8 @@ > /// > FunctionPass *llvm::createPIC16CodePrinterPass(raw_ostream &o, > PIC16TargetMachine &tm, > - CodeGenOpt::Level > OptLevel, > bool verbose) { > - return new PIC16AsmPrinter(o, tm, tm.getTargetAsmInfo(), > OptLevel, verbose); > + return new PIC16AsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); > } > > > > Modified: llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.h?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.h (original) > +++ llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.h Tue Jun 30 > 20:48:54 2009 > @@ -30,9 +30,8 @@ > namespace llvm { > struct VISIBILITY_HIDDEN PIC16AsmPrinter : public AsmPrinter { > explicit PIC16AsmPrinter(raw_ostream &O, PIC16TargetMachine &TM, > - const TargetAsmInfo *T, > CodeGenOpt::Level OL, > - bool V) > - : AsmPrinter(O, TM, T, OL, V), DbgInfo(O, T) { > + const TargetAsmInfo *T, bool V) > + : AsmPrinter(O, TM, T, V), DbgInfo(O, T) { > PTLI = TM.getTargetLowering(); > PTAI = static_cast (T); > } > > Modified: llvm/trunk/lib/Target/PIC16/PIC16TargetMachine.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16TargetMachine.cpp?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/PIC16/PIC16TargetMachine.cpp (original) > +++ llvm/trunk/lib/Target/PIC16/PIC16TargetMachine.cpp Tue Jun 30 > 20:48:54 2009 > @@ -65,11 +65,11 @@ > return false; > } > > -bool PIC16TargetMachine:: > -addAssemblyEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, > - bool Verbose, raw_ostream &Out) { > +bool PIC16TargetMachine::addAssemblyEmitter(PassManagerBase &PM, > + CodeGenOpt::Level > OptLevel, > + bool Verbose, > raw_ostream &Out) { > // Output assembly language. > - PM.add(createPIC16CodePrinterPass(Out, *this, OptLevel, Verbose)); > + PM.add(createPIC16CodePrinterPass(Out, *this, Verbose)); > return false; > } > > > Modified: llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp > (original) > +++ llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp Tue > Jun 30 20:48:54 2009 > @@ -56,9 +56,8 @@ > const PPCSubtarget &Subtarget; > public: > explicit PPCAsmPrinter(raw_ostream &O, TargetMachine &TM, > - const TargetAsmInfo *T, > CodeGenOpt::Level OL, > - bool V) > - : AsmPrinter(O, TM, T, OL, V), > + const TargetAsmInfo *T, bool V) > + : AsmPrinter(O, TM, T, V), > Subtarget(TM.getSubtarget()) {} > > virtual const char *getPassName() const { > @@ -296,9 +295,8 @@ > class VISIBILITY_HIDDEN PPCLinuxAsmPrinter : public PPCAsmPrinter { > public: > explicit PPCLinuxAsmPrinter(raw_ostream &O, PPCTargetMachine &TM, > - const TargetAsmInfo *T, > CodeGenOpt::Level OL, > - bool V) > - : PPCAsmPrinter(O, TM, T, OL, V){} > + const TargetAsmInfo *T, bool V) > + : PPCAsmPrinter(O, TM, T, V){} > > virtual const char *getPassName() const { > return "Linux PPC Assembly Printer"; > @@ -323,9 +321,8 @@ > raw_ostream &OS; > public: > explicit PPCDarwinAsmPrinter(raw_ostream &O, PPCTargetMachine &TM, > - const TargetAsmInfo *T, > CodeGenOpt::Level OL, > - bool V) > - : PPCAsmPrinter(O, TM, T, OL, V), OS(O) {} > + const TargetAsmInfo *T, bool V) > + : PPCAsmPrinter(O, TM, T, V), OS(O) {} > > virtual const char *getPassName() const { > return "Darwin PPC Assembly Printer"; > @@ -1119,16 +1116,13 @@ > /// > FunctionPass *llvm::createPPCAsmPrinterPass(raw_ostream &o, > PPCTargetMachine &tm, > - CodeGenOpt::Level > OptLevel, > bool verbose) { > const PPCSubtarget *Subtarget = &tm.getSubtarget(); > > if (Subtarget->isDarwin()) { > - return new PPCDarwinAsmPrinter(o, tm, tm.getTargetAsmInfo(), > - OptLevel, verbose); > + return new PPCDarwinAsmPrinter(o, tm, tm.getTargetAsmInfo(), > verbose); > } else { > - return new PPCLinuxAsmPrinter(o, tm, tm.getTargetAsmInfo(), > - OptLevel, verbose); > + return new PPCLinuxAsmPrinter(o, tm, tm.getTargetAsmInfo(), > verbose); > } > } > > > Modified: llvm/trunk/lib/Target/PowerPC/PPC.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPC.h?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/PowerPC/PPC.h (original) > +++ llvm/trunk/lib/Target/PowerPC/PPC.h Tue Jun 30 20:48:54 2009 > @@ -28,9 +28,8 @@ > > FunctionPass *createPPCBranchSelectionPass(); > FunctionPass *createPPCISelDag(PPCTargetMachine &TM); > -FunctionPass *createPPCAsmPrinterPass(raw_ostream &OS, > - PPCTargetMachine &TM, > - CodeGenOpt::Level OptLevel, > bool Verbose); > +FunctionPass *createPPCAsmPrinterPass(raw_ostream &OS, > PPCTargetMachine &TM, > + bool Verbose); > FunctionPass *createPPCCodeEmitterPass(PPCTargetMachine &TM, > MachineCodeEmitter &MCE); > FunctionPass *createPPCJITCodeEmitterPass(PPCTargetMachine &TM, > > Modified: llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp (original) > +++ llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp Tue Jun 30 > 20:48:54 2009 > @@ -152,7 +152,7 @@ > raw_ostream &Out) { > assert(AsmPrinterCtor && "AsmPrinter was not linked in"); > if (AsmPrinterCtor) > - PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose)); > + PM.add(AsmPrinterCtor(Out, *this, Verbose)); > > return false; > } > @@ -183,7 +183,7 @@ > if (DumpAsm) { > assert(AsmPrinterCtor && "AsmPrinter was not linked in"); > if (AsmPrinterCtor) > - PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); > + PM.add(AsmPrinterCtor(errs(), *this, true)); > } > > return false; > @@ -215,7 +215,7 @@ > if (DumpAsm) { > assert(AsmPrinterCtor && "AsmPrinter was not linked in"); > if (AsmPrinterCtor) > - PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); > + PM.add(AsmPrinterCtor(errs(), *this, true)); > } > > return false; > @@ -230,7 +230,7 @@ > if (DumpAsm) { > assert(AsmPrinterCtor && "AsmPrinter was not linked in"); > if (AsmPrinterCtor) > - PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); > + PM.add(AsmPrinterCtor(errs(), *this, true)); > } > > return false; > @@ -245,7 +245,7 @@ > if (DumpAsm) { > assert(AsmPrinterCtor && "AsmPrinter was not linked in"); > if (AsmPrinterCtor) > - PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); > + PM.add(AsmPrinterCtor(errs(), *this, true)); > } > > return false; > > Modified: llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h (original) > +++ llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h Tue Jun 30 > 20:48:54 2009 > @@ -46,7 +46,6 @@ > // set this functions to ctor pointer at startup time if they are > linked in. > typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o, > PPCTargetMachine &tm, > - CodeGenOpt::Level > OptLevel, > bool verbose); > static AsmPrinterCtorFn AsmPrinterCtor; > > > Modified: llvm/trunk/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp > (original) > +++ llvm/trunk/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp Tue > Jun 30 20:48:54 2009 > @@ -50,9 +50,8 @@ > unsigned BBNumber; > public: > explicit SparcAsmPrinter(raw_ostream &O, TargetMachine &TM, > - const TargetAsmInfo *T, > CodeGenOpt::Level OL, > - bool V) > - : AsmPrinter(O, TM, T, OL, V), BBNumber(0) {} > + const TargetAsmInfo *T, bool V) > + : AsmPrinter(O, TM, T, V), BBNumber(0) {} > > virtual const char *getPassName() const { > return "Sparc Assembly Printer"; > @@ -84,9 +83,8 @@ > /// > FunctionPass *llvm::createSparcCodePrinterPass(raw_ostream &o, > TargetMachine &tm, > - CodeGenOpt::Level > OptLevel, > bool verbose) { > - return new SparcAsmPrinter(o, tm, tm.getTargetAsmInfo(), > OptLevel, verbose); > + return new SparcAsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); > } > > > > Modified: llvm/trunk/lib/Target/Sparc/Sparc.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/Sparc.h?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/Sparc/Sparc.h (original) > +++ llvm/trunk/lib/Target/Sparc/Sparc.h Tue Jun 30 20:48:54 2009 > @@ -25,7 +25,6 @@ > > FunctionPass *createSparcISelDag(SparcTargetMachine &TM); > FunctionPass *createSparcCodePrinterPass(raw_ostream &OS, > TargetMachine &TM, > - CodeGenOpt::Level > OptLevel, > bool Verbose); > FunctionPass *createSparcDelaySlotFillerPass(TargetMachine &TM); > FunctionPass *createSparcFPMoverPass(TargetMachine &TM); > > Modified: llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp (original) > +++ llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp Tue Jun 30 > 20:48:54 2009 > @@ -90,6 +90,6 @@ > // Output assembly language. > assert(AsmPrinterCtor && "AsmPrinter was not linked in"); > if (AsmPrinterCtor) > - PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose)); > + PM.add(AsmPrinterCtor(Out, *this, Verbose)); > return false; > } > > Modified: llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h (original) > +++ llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h Tue Jun 30 > 20:48:54 2009 > @@ -39,7 +39,6 @@ > // set this functions to ctor pointer at startup time if they are > linked in. > typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o, > TargetMachine &tm, > - CodeGenOpt::Level > OptLevel, > bool verbose); > static AsmPrinterCtorFn AsmPrinterCtor; > > > Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h (original) > +++ llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h Tue Jun > 30 20:48:54 2009 > @@ -38,9 +38,8 @@ > MCStreamer *Streamer; > public: > explicit X86ATTAsmPrinter(raw_ostream &O, X86TargetMachine &TM, > - const TargetAsmInfo *T, > CodeGenOpt::Level OL, > - bool V) > - : AsmPrinter(O, TM, T, OL, V) { > + const TargetAsmInfo *T, bool V) > + : AsmPrinter(O, TM, T, V) { > Subtarget = &TM.getSubtarget(); > Context = 0; > Streamer = 0; > > Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp (original) > +++ llvm/trunk/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp Tue Jun > 30 20:48:54 2009 > @@ -25,15 +25,12 @@ > /// > FunctionPass *llvm::createX86CodePrinterPass(raw_ostream &o, > X86TargetMachine &tm, > - CodeGenOpt::Level > OptLevel, > bool verbose) { > const X86Subtarget *Subtarget = &tm.getSubtarget(); > > if (Subtarget->isFlavorIntel()) > - return new X86IntelAsmPrinter(o, tm, tm.getTargetAsmInfo(), > - OptLevel, verbose); > - return new X86ATTAsmPrinter(o, tm, tm.getTargetAsmInfo(), > - OptLevel, verbose); > + return new X86IntelAsmPrinter(o, tm, tm.getTargetAsmInfo(), > verbose); > + return new X86ATTAsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); > } > > namespace { > > Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h > (original) > +++ llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h Tue > Jun 30 20:48:54 2009 > @@ -26,9 +26,8 @@ > > struct VISIBILITY_HIDDEN X86IntelAsmPrinter : public AsmPrinter { > explicit X86IntelAsmPrinter(raw_ostream &O, X86TargetMachine &TM, > - const TargetAsmInfo *T, > CodeGenOpt::Level OL, > - bool V) > - : AsmPrinter(O, TM, T, OL, V) {} > + const TargetAsmInfo *T, bool V) > + : AsmPrinter(O, TM, T, V) {} > > virtual const char *getPassName() const { > return "X86 Intel-Style Assembly Printer"; > > Modified: llvm/trunk/lib/Target/X86/X86.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.h?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/X86/X86.h (original) > +++ llvm/trunk/lib/Target/X86/X86.h Tue Jun 30 20:48:54 2009 > @@ -46,9 +46,7 @@ > /// assembly code for a MachineFunction to the given output stream, > /// using the given target machine description. > /// > -FunctionPass *createX86CodePrinterPass(raw_ostream &o, > - X86TargetMachine &tm, > - CodeGenOpt::Level OptLevel, > +FunctionPass *createX86CodePrinterPass(raw_ostream &o, > X86TargetMachine &tm, > bool Verbose); > > /// createX86CodeEmitterPass - Return a pass that emits the > collected X86 code > > Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp (original) > +++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Tue Jun 30 > 20:48:54 2009 > @@ -226,7 +226,7 @@ > > assert(AsmPrinterCtor && "AsmPrinter was not linked in"); > if (AsmPrinterCtor) > - PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose)); > + PM.add(AsmPrinterCtor(Out, *this, Verbose)); > return false; > } > > @@ -254,7 +254,7 @@ > if (DumpAsm) { > assert(AsmPrinterCtor && "AsmPrinter was not linked in"); > if (AsmPrinterCtor) > - PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); > + PM.add(AsmPrinterCtor(errs(), *this, true)); > } > > return false; > @@ -284,7 +284,7 @@ > if (DumpAsm) { > assert(AsmPrinterCtor && "AsmPrinter was not linked in"); > if (AsmPrinterCtor) > - PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); > + PM.add(AsmPrinterCtor(errs(), *this, true)); > } > > return false; > @@ -298,7 +298,7 @@ > if (DumpAsm) { > assert(AsmPrinterCtor && "AsmPrinter was not linked in"); > if (AsmPrinterCtor) > - PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); > + PM.add(AsmPrinterCtor(errs(), *this, true)); > } > > return false; > @@ -312,7 +312,7 @@ > if (DumpAsm) { > assert(AsmPrinterCtor && "AsmPrinter was not linked in"); > if (AsmPrinterCtor) > - PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); > + PM.add(AsmPrinterCtor(errs(), *this, true)); > } > > return false; > > Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.h?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/X86/X86TargetMachine.h (original) > +++ llvm/trunk/lib/Target/X86/X86TargetMachine.h Tue Jun 30 20:48:54 > 2009 > @@ -45,7 +45,6 @@ > // set this functions to ctor pointer at startup time if they are > linked in. > typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o, > X86TargetMachine &tm, > - CodeGenOpt::Level > OptLevel, > bool verbose); > static AsmPrinterCtorFn AsmPrinterCtor; > > > Modified: llvm/trunk/lib/Target/XCore/XCore.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCore.h?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/XCore/XCore.h (original) > +++ llvm/trunk/lib/Target/XCore/XCore.h Tue Jun 30 20:48:54 2009 > @@ -26,7 +26,6 @@ > FunctionPass *createXCoreISelDag(XCoreTargetMachine &TM); > FunctionPass *createXCoreCodePrinterPass(raw_ostream &OS, > XCoreTargetMachine &TM, > - CodeGenOpt::Level > OptLevel, > bool Verbose); > } // end namespace llvm; > > > Modified: llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp (original) > +++ llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp Tue Jun 30 > 20:48:54 2009 > @@ -58,9 +58,8 @@ > const XCoreSubtarget &Subtarget; > public: > explicit XCoreAsmPrinter(raw_ostream &O, XCoreTargetMachine &TM, > - const TargetAsmInfo *T, > CodeGenOpt::Level OL, > - bool V) > - : AsmPrinter(O, TM, T, OL, V), DW(0), > + const TargetAsmInfo *T, bool V) > + : AsmPrinter(O, TM, T, V), DW(0), > Subtarget(*TM.getSubtargetImpl()) {} > > virtual const char *getPassName() const { > @@ -106,9 +105,8 @@ > /// > FunctionPass *llvm::createXCoreCodePrinterPass(raw_ostream &o, > XCoreTargetMachine &tm, > - CodeGenOpt::Level > OptLevel, > bool verbose) { > - return new XCoreAsmPrinter(o, tm, tm.getTargetAsmInfo(), > OptLevel, verbose); > + return new XCoreAsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); > } > > // PrintEscapedString - Print each character of the specified > string, escaping > > Modified: llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp?rev=74579&r1=74578&r2=74579&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp (original) > +++ llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp Tue Jun 30 > 20:48:54 2009 > @@ -69,6 +69,6 @@ > bool Verbose, > raw_ostream &Out) { > // Output assembly language. > - PM.add(createXCoreCodePrinterPass(Out, *this, OptLevel, Verbose)); > + PM.add(createXCoreCodePrinterPass(Out, *this, Verbose)); > return false; > } > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Tue Jun 30 20:59:32 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 01 Jul 2009 01:59:32 -0000 Subject: [llvm-commits] [llvm] r74580 - in /llvm/trunk: include/llvm/CodeGen/ lib/CodeGen/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/CellSPU/ lib/Target/Mips/ lib/Target/PowerPC/ lib/Target/Sparc/ test/CodeGen/ARM/ Message-ID: <200907010159.n611xWJT005501@zion.cs.uiuc.edu> Author: evancheng Date: Tue Jun 30 20:59:31 2009 New Revision: 74580 URL: http://llvm.org/viewvc/llvm-project?rev=74580&view=rev Log: Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the code to annotate machineoperands to LiveIntervalAnalysis. It also add markers for implicit_def that define physical registers. The rest, is just a lot of details. Added: llvm/trunk/test/CodeGen/ARM/2009-06-30-RegScavengerAssert3.ll llvm/trunk/test/CodeGen/ARM/2009-06-30-RegScavengerAssert4.ll Modified: llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp llvm/trunk/lib/CodeGen/RegisterScavenging.cpp llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.cpp llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp llvm/trunk/lib/Target/Sparc/SparcInstrInfo.cpp Modified: llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h?rev=74580&r1=74579&r2=74580&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h (original) +++ llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h Tue Jun 30 20:59:31 2009 @@ -390,6 +390,10 @@ unsigned getNumConflictsWithPhysReg(const LiveInterval &li, unsigned PhysReg) const; + /// processImplicitDefs - Process IMPLICIT_DEF instructions. Add isUndef + /// marker to implicit_def defs and their uses. + void processImplicitDefs(); + /// computeNumbering - Compute the index numbering. void computeNumbering(); Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=74580&r1=74579&r2=74580&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original) +++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Tue Jun 30 20:59:31 2009 @@ -23,6 +23,7 @@ #include "llvm/CodeGen/LiveVariables.h" #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineInstr.h" +#include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineLoopInfo.h" #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/Passes.h" @@ -33,6 +34,8 @@ #include "llvm/Target/TargetOptions.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/Debug.h" +#include "llvm/ADT/DepthFirstIterator.h" +#include "llvm/ADT/SmallSet.h" #include "llvm/ADT/Statistic.h" #include "llvm/ADT/STLExtras.h" #include @@ -98,6 +101,93 @@ } } +/// processImplicitDefs - Process IMPLICIT_DEF instructions and make sure +/// there is one implicit_def for each use. Add isUndef marker to +/// implicit_def defs and their uses. +void LiveIntervals::processImplicitDefs() { + SmallSet ImpDefRegs; + SmallVector ImpDefMIs; + MachineBasicBlock *Entry = mf_->begin(); + SmallPtrSet Visited; + for (df_ext_iterator > + DFI = df_ext_begin(Entry, Visited), E = df_ext_end(Entry, Visited); + DFI != E; ++DFI) { + MachineBasicBlock *MBB = *DFI; + for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end(); + I != E; ) { + MachineInstr *MI = &*I; + ++I; + if (MI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF) { + unsigned Reg = MI->getOperand(0).getReg(); + MI->getOperand(0).setIsUndef(); + ImpDefRegs.insert(Reg); + ImpDefMIs.push_back(MI); + continue; + } + for (unsigned i = 0; i != MI->getNumOperands(); ++i) { + MachineOperand& MO = MI->getOperand(i); + if (!MO.isReg() || !MO.isUse()) + continue; + unsigned Reg = MO.getReg(); + if (!Reg) + continue; + if (!ImpDefRegs.count(Reg)) + continue; + MO.setIsUndef(); + if (MO.isKill() || MI->isRegTiedToDefOperand(i)) + ImpDefRegs.erase(Reg); + } + + for (unsigned i = 0; i != MI->getNumOperands(); ++i) { + MachineOperand& MO = MI->getOperand(i); + if (!MO.isReg() || !MO.isDef()) + continue; + ImpDefRegs.erase(MO.getReg()); + } + } + + // Any outstanding liveout implicit_def's? + for (unsigned i = 0, e = ImpDefMIs.size(); i != e; ++i) { + MachineInstr *MI = ImpDefMIs[i]; + unsigned Reg = MI->getOperand(0).getReg(); + if (TargetRegisterInfo::isPhysicalRegister(Reg)) + // Physical registers are not liveout (yet). + continue; + if (!ImpDefRegs.count(Reg)) + continue; + bool HasLocalUse = false; + for (MachineRegisterInfo::reg_iterator RI = mri_->reg_begin(Reg), + RE = mri_->reg_end(); RI != RE; ) { + MachineOperand &RMO = RI.getOperand(); + MachineInstr *RMI = &*RI; + ++RI; + if (RMO.isDef()) { + // Don't expect another def of the same register. + assert(RMI == MI && + "Register with multiple defs including an implicit_def?"); + continue; + } + MachineBasicBlock *RMBB = RMI->getParent(); + if (RMBB == MBB) { + HasLocalUse = true; + continue; + } + const TargetRegisterClass* RC = mri_->getRegClass(Reg); + unsigned NewVReg = mri_->createVirtualRegister(RC); + BuildMI(*RMBB, RMI, RMI->getDebugLoc(), + tii_->get(TargetInstrInfo::IMPLICIT_DEF), NewVReg); + RMO.setReg(NewVReg); + RMO.setIsUndef(); + RMO.setIsKill(); + } + if (!HasLocalUse) + MI->eraseFromParent(); + } + ImpDefRegs.clear(); + ImpDefMIs.clear(); + } +} + void LiveIntervals::computeNumbering() { Index2MiMap OldI2MI = i2miMap_; std::vector OldI2MBB = Idx2MBBMap; @@ -299,6 +389,7 @@ lv_ = &getAnalysis(); allocatableRegs_ = tri_->getAllocatableSet(fn); + processImplicitDefs(); computeNumbering(); computeIntervals(); @@ -1785,8 +1876,6 @@ if (MO.isReg() && MO.getReg() == li.reg) { MO.setReg(NewVReg); MO.setIsUndef(); - if (MO.isKill()) - MO.setIsKill(false); } } } Modified: llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp?rev=74580&r1=74579&r2=74580&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp (original) +++ llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp Tue Jun 30 20:59:31 2009 @@ -545,26 +545,6 @@ if (!isPhys && vrm_->getPreSplitReg(cur.reg)) continue; - // A register defined by an implicit_def can be liveout the def BB and livein - // to a use BB. Add it to the livein set of the use BB's. - if (!isPhys && cur.empty()) { - if (MachineInstr *DefMI = mri_->getVRegDef(cur.reg)) { - assert(DefMI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF); - MachineBasicBlock *DefMBB = DefMI->getParent(); - SmallPtrSet Seen; - Seen.insert(DefMBB); - for (MachineRegisterInfo::reg_iterator ri = mri_->reg_begin(cur.reg), - re = mri_->reg_end(); ri != re; ++ri) { - MachineInstr *UseMI = &*ri; - MachineBasicBlock *UseMBB = UseMI->getParent(); - if (Seen.insert(UseMBB)) { - assert(TargetRegisterInfo::isPhysicalRegister(Reg) && - "Adding a virtual register to livein set?"); - UseMBB->addLiveIn(Reg); - } - } - } - } for (LiveInterval::Ranges::const_iterator I = cur.begin(), E = cur.end(); I != E; ++I) { const LiveRange &LR = *I; @@ -905,17 +885,6 @@ DOUT << tri_->getName(physReg) << '\n'; // Note the register is not really in use. vrm_->assignVirt2Phys(cur->reg, physReg); - // Since the register allocator is allowed to assign this virtual register - // physical register that overlaps other live intervals. Mark these - // operands as "Undef" which means later passes, e.g. register scavenger - // can ignore them. - for (MachineRegisterInfo::reg_iterator RI = mri_->reg_begin(cur->reg), - RE = mri_->reg_end(); RI != RE; ++RI) { - MachineOperand &MO = RI.getOperand(); - MO.setIsUndef(); - if (MO.isKill()) - MO.setIsKill(false); - } return; } Modified: llvm/trunk/lib/CodeGen/RegisterScavenging.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterScavenging.cpp?rev=74580&r1=74579&r2=74580&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegisterScavenging.cpp (original) +++ llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Tue Jun 30 20:59:31 2009 @@ -254,6 +254,8 @@ unsigned Idx = (i < NumECs) ? EarlyClobberMOs[i].second : DefMOs[i-NumECs].second; unsigned Reg = MO.getReg(); + if (MO.isUndef()) + continue; // If it's dead upon def, then it is now free. if (MO.isDead()) { @@ -262,7 +264,9 @@ } // Skip two-address destination operand. - if (MI->isRegTiedToUseOperand(Idx)) { + unsigned UseIdx; + if (MI->isRegTiedToUseOperand(Idx, &UseIdx) && + !MI->getOperand(UseIdx).isUndef()) { assert(isUsed(Reg) && "Using an undefined register!"); continue; } @@ -316,6 +320,8 @@ ? *DefMOs[i].first : *EarlyClobberMOs[i-NumDefs].first; unsigned Idx = (i < NumECs) ? DefMOs[i].second : EarlyClobberMOs[i-NumDefs].second; + if (MO.isUndef()) + continue; // Skip two-address destination operand. if (MI->isRegTiedToUseOperand(Idx)) Modified: llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp?rev=74580&r1=74579&r2=74580&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp (original) +++ llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp Tue Jun 30 20:59:31 2009 @@ -2029,8 +2029,12 @@ if (!TargetRegisterInfo::isVirtualRegister(VirtReg)) { // Check to see if this is a noop copy. If so, eliminate the // instruction before considering the dest reg to be changed. + // Also check if it's copying from an "undef", if so, we can't + // eliminate this or else the undef marker is lost and it will + // confuses the scavenger. This is extremely rare. unsigned Src, Dst, SrcSR, DstSR; - if (TII->isMoveInstr(MI, Src, Dst, SrcSR, DstSR) && Src == Dst) { + if (TII->isMoveInstr(MI, Src, Dst, SrcSR, DstSR) && Src == Dst && + !MI.findRegisterUseOperand(Src)->isUndef()) { ++NumDCE; DOUT << "Removing now-noop copy: " << MI; SmallVector KillRegs; @@ -2049,7 +2053,7 @@ Spills.disallowClobberPhysReg(VirtReg); goto ProcessNextInst; } - + // If it's not a no-op copy, it clobbers the value in the destreg. Spills.ClobberPhysReg(VirtReg); ReusedOperands.markClobbered(VirtReg); Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp?rev=74580&r1=74579&r2=74580&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp Tue Jun 30 20:59:31 2009 @@ -619,14 +619,19 @@ if (OpNum == 0) { // move -> store unsigned SrcReg = MI->getOperand(1).getReg(); bool isKill = MI->getOperand(1).isKill(); + bool isUndef = MI->getOperand(1).isUndef(); NewMI = BuildMI(MF, MI->getDebugLoc(), get(ARM::STR)) - .addReg(SrcReg, getKillRegState(isKill)) + .addReg(SrcReg, getKillRegState(isKill) | getUndefRegState(isUndef)) .addFrameIndex(FI).addReg(0).addImm(0).addImm(Pred).addReg(PredReg); } else { // move -> load unsigned DstReg = MI->getOperand(0).getReg(); bool isDead = MI->getOperand(0).isDead(); + bool isUndef = MI->getOperand(0).isUndef(); NewMI = BuildMI(MF, MI->getDebugLoc(), get(ARM::LDR)) - .addReg(DstReg, RegState::Define | getDeadRegState(isDead)) + .addReg(DstReg, + RegState::Define | + getDeadRegState(isDead) | + getUndefRegState(isUndef)) .addFrameIndex(FI).addReg(0).addImm(0).addImm(Pred).addReg(PredReg); } break; @@ -636,14 +641,22 @@ unsigned PredReg = MI->getOperand(3).getReg(); if (OpNum == 0) { // move -> store unsigned SrcReg = MI->getOperand(1).getReg(); + bool isKill = MI->getOperand(1).isKill(); + bool isUndef = MI->getOperand(1).isUndef(); NewMI = BuildMI(MF, MI->getDebugLoc(), get(ARM::FSTS)) - .addReg(SrcReg).addFrameIndex(FI) + .addReg(SrcReg, getKillRegState(isKill) | getUndefRegState(isUndef)) + .addFrameIndex(FI) .addImm(0).addImm(Pred).addReg(PredReg); } else { // move -> load unsigned DstReg = MI->getOperand(0).getReg(); - NewMI = BuildMI(MF, MI->getDebugLoc(), get(ARM::FLDS), DstReg) - .addFrameIndex(FI) - .addImm(0).addImm(Pred).addReg(PredReg); + bool isDead = MI->getOperand(0).isDead(); + bool isUndef = MI->getOperand(0).isUndef(); + NewMI = BuildMI(MF, MI->getDebugLoc(), get(ARM::FLDS)) + .addReg(DstReg, + RegState::Define | + getDeadRegState(isDead) | + getUndefRegState(isUndef)) + .addFrameIndex(FI).addImm(0).addImm(Pred).addReg(PredReg); } break; } @@ -653,14 +666,19 @@ if (OpNum == 0) { // move -> store unsigned SrcReg = MI->getOperand(1).getReg(); bool isKill = MI->getOperand(1).isKill(); + bool isUndef = MI->getOperand(1).isUndef(); NewMI = BuildMI(MF, MI->getDebugLoc(), get(ARM::FSTD)) - .addReg(SrcReg, getKillRegState(isKill)) + .addReg(SrcReg, getKillRegState(isKill) | getUndefRegState(isUndef)) .addFrameIndex(FI).addImm(0).addImm(Pred).addReg(PredReg); } else { // move -> load unsigned DstReg = MI->getOperand(0).getReg(); bool isDead = MI->getOperand(0).isDead(); + bool isUndef = MI->getOperand(0).isUndef(); NewMI = BuildMI(MF, MI->getDebugLoc(), get(ARM::FLDD)) - .addReg(DstReg, RegState::Define | getDeadRegState(isDead)) + .addReg(DstReg, + RegState::Define | + getDeadRegState(isDead) | + getUndefRegState(isUndef)) .addFrameIndex(FI).addImm(0).addImm(Pred).addReg(PredReg); } break; Modified: llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.cpp?rev=74580&r1=74579&r2=74580&view=diff ============================================================================== --- llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.cpp Tue Jun 30 20:59:31 2009 @@ -289,19 +289,22 @@ if (Ops[0] == 0) { // move -> store unsigned InReg = MI->getOperand(1).getReg(); bool isKill = MI->getOperand(1).isKill(); + bool isUndef = MI->getOperand(1).isUndef(); Opc = (Opc == Alpha::BISr) ? Alpha::STQ : ((Opc == Alpha::CPYSS) ? Alpha::STS : Alpha::STT); NewMI = BuildMI(MF, MI->getDebugLoc(), get(Opc)) - .addReg(InReg, getKillRegState(isKill)) + .addReg(InReg, getKillRegState(isKill) | getUndefRegState(isUndef)) .addFrameIndex(FrameIndex) .addReg(Alpha::F31); } else { // load -> move unsigned OutReg = MI->getOperand(0).getReg(); bool isDead = MI->getOperand(0).isDead(); + bool isUndef = MI->getOperand(0).isUndef(); Opc = (Opc == Alpha::BISr) ? Alpha::LDQ : ((Opc == Alpha::CPYSS) ? Alpha::LDS : Alpha::LDT); NewMI = BuildMI(MF, MI->getDebugLoc(), get(Opc)) - .addReg(OutReg, RegState::Define | getDeadRegState(isDead)) + .addReg(OutReg, RegState::Define | getDeadRegState(isDead) | + getUndefRegState(isUndef)) .addFrameIndex(FrameIndex) .addReg(Alpha::F31); } Modified: llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp?rev=74580&r1=74579&r2=74580&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.cpp Tue Jun 30 20:59:31 2009 @@ -491,19 +491,22 @@ if (OpNum == 0) { // move -> store unsigned InReg = MI->getOperand(1).getReg(); bool isKill = MI->getOperand(1).isKill(); + bool isUndef = MI->getOperand(1).isUndef(); if (FrameIndex < SPUFrameInfo::maxFrameOffset()) { MachineInstrBuilder MIB = BuildMI(MF, MI->getDebugLoc(), get(SPU::STQDr32)); - MIB.addReg(InReg, getKillRegState(isKill)); + MIB.addReg(InReg, getKillRegState(isKill) | getUndefRegState(isUndef)); NewMI = addFrameReference(MIB, FrameIndex); } } else { // move -> load unsigned OutReg = MI->getOperand(0).getReg(); bool isDead = MI->getOperand(0).isDead(); + bool isUndef = MI->getOperand(0).isUndef(); MachineInstrBuilder MIB = BuildMI(MF, MI->getDebugLoc(), get(Opc)); - MIB.addReg(OutReg, RegState::Define | getDeadRegState(isDead)); + MIB.addReg(OutReg, RegState::Define | getDeadRegState(isDead) | + getUndefRegState(isUndef)); Opc = (FrameIndex < SPUFrameInfo::maxFrameOffset()) ? SPU::STQDr32 : SPU::STQXr32; NewMI = addFrameReference(MIB, FrameIndex); Modified: llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp?rev=74580&r1=74579&r2=74580&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp Tue Jun 30 20:59:31 2009 @@ -291,14 +291,17 @@ if (Ops[0] == 0) { // COPY -> STORE unsigned SrcReg = MI->getOperand(2).getReg(); bool isKill = MI->getOperand(2).isKill(); + bool isUndef = MI->getOperand(2).isUndef(); NewMI = BuildMI(MF, MI->getDebugLoc(), get(Mips::SW)) - .addReg(SrcReg, getKillRegState(isKill)) + .addReg(SrcReg, getKillRegState(isKill) | getUndefRegState(isUndef)) .addImm(0).addFrameIndex(FI); } else { // COPY -> LOAD unsigned DstReg = MI->getOperand(0).getReg(); bool isDead = MI->getOperand(0).isDead(); + bool isUndef = MI->getOperand(0).isUndef(); NewMI = BuildMI(MF, MI->getDebugLoc(), get(Mips::LW)) - .addReg(DstReg, RegState::Define | getDeadRegState(isDead)) + .addReg(DstReg, RegState::Define | getDeadRegState(isDead) | + getUndefRegState(isUndef)) .addImm(0).addFrameIndex(FI); } } @@ -321,14 +324,17 @@ if (Ops[0] == 0) { // COPY -> STORE unsigned SrcReg = MI->getOperand(1).getReg(); bool isKill = MI->getOperand(1).isKill(); + bool isUndef = MI->getOperand(2).isUndef(); NewMI = BuildMI(MF, MI->getDebugLoc(), get(StoreOpc)) - .addReg(SrcReg, getKillRegState(isKill)) + .addReg(SrcReg, getKillRegState(isKill) | getUndefRegState(isUndef)) .addImm(0).addFrameIndex(FI) ; } else { // COPY -> LOAD unsigned DstReg = MI->getOperand(0).getReg(); bool isDead = MI->getOperand(0).isDead(); + bool isUndef = MI->getOperand(0).isUndef(); NewMI = BuildMI(MF, MI->getDebugLoc(), get(LoadOpc)) - .addReg(DstReg, RegState::Define | getDeadRegState(isDead)) + .addReg(DstReg, RegState::Define | getDeadRegState(isDead) | + getUndefRegState(isUndef)) .addImm(0).addFrameIndex(FI); } } Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp?rev=74580&r1=74579&r2=74580&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp Tue Jun 30 20:59:31 2009 @@ -691,16 +691,21 @@ if (OpNum == 0) { // move -> store unsigned InReg = MI->getOperand(1).getReg(); bool isKill = MI->getOperand(1).isKill(); + bool isUndef = MI->getOperand(1).isUndef(); NewMI = addFrameReference(BuildMI(MF, MI->getDebugLoc(), get(PPC::STW)) - .addReg(InReg, getKillRegState(isKill)), + .addReg(InReg, + getKillRegState(isKill) | + getUndefRegState(isUndef)), FrameIndex); } else { // move -> load unsigned OutReg = MI->getOperand(0).getReg(); bool isDead = MI->getOperand(0).isDead(); + bool isUndef = MI->getOperand(0).isUndef(); NewMI = addFrameReference(BuildMI(MF, MI->getDebugLoc(), get(PPC::LWZ)) .addReg(OutReg, RegState::Define | - getDeadRegState(isDead)), + getDeadRegState(isDead) | + getUndefRegState(isUndef)), FrameIndex); } } else if ((Opc == PPC::OR8 && @@ -708,48 +713,63 @@ if (OpNum == 0) { // move -> store unsigned InReg = MI->getOperand(1).getReg(); bool isKill = MI->getOperand(1).isKill(); + bool isUndef = MI->getOperand(1).isUndef(); NewMI = addFrameReference(BuildMI(MF, MI->getDebugLoc(), get(PPC::STD)) - .addReg(InReg, getKillRegState(isKill)), + .addReg(InReg, + getKillRegState(isKill) | + getUndefRegState(isUndef)), FrameIndex); } else { // move -> load unsigned OutReg = MI->getOperand(0).getReg(); bool isDead = MI->getOperand(0).isDead(); + bool isUndef = MI->getOperand(0).isUndef(); NewMI = addFrameReference(BuildMI(MF, MI->getDebugLoc(), get(PPC::LD)) .addReg(OutReg, RegState::Define | - getDeadRegState(isDead)), + getDeadRegState(isDead) | + getUndefRegState(isUndef)), FrameIndex); } } else if (Opc == PPC::FMRD) { if (OpNum == 0) { // move -> store unsigned InReg = MI->getOperand(1).getReg(); bool isKill = MI->getOperand(1).isKill(); + bool isUndef = MI->getOperand(1).isUndef(); NewMI = addFrameReference(BuildMI(MF, MI->getDebugLoc(), get(PPC::STFD)) - .addReg(InReg, getKillRegState(isKill)), + .addReg(InReg, + getKillRegState(isKill) | + getUndefRegState(isUndef)), FrameIndex); } else { // move -> load unsigned OutReg = MI->getOperand(0).getReg(); bool isDead = MI->getOperand(0).isDead(); + bool isUndef = MI->getOperand(0).isUndef(); NewMI = addFrameReference(BuildMI(MF, MI->getDebugLoc(), get(PPC::LFD)) .addReg(OutReg, RegState::Define | - getDeadRegState(isDead)), + getDeadRegState(isDead) | + getUndefRegState(isUndef)), FrameIndex); } } else if (Opc == PPC::FMRS) { if (OpNum == 0) { // move -> store unsigned InReg = MI->getOperand(1).getReg(); bool isKill = MI->getOperand(1).isKill(); + bool isUndef = MI->getOperand(1).isUndef(); NewMI = addFrameReference(BuildMI(MF, MI->getDebugLoc(), get(PPC::STFS)) - .addReg(InReg, getKillRegState(isKill)), + .addReg(InReg, + getKillRegState(isKill) | + getUndefRegState(isUndef)), FrameIndex); } else { // move -> load unsigned OutReg = MI->getOperand(0).getReg(); bool isDead = MI->getOperand(0).isDead(); + bool isUndef = MI->getOperand(0).isUndef(); NewMI = addFrameReference(BuildMI(MF, MI->getDebugLoc(), get(PPC::LFS)) .addReg(OutReg, RegState::Define | - getDeadRegState(isDead)), + getDeadRegState(isDead) | + getUndefRegState(isUndef)), FrameIndex); } } Modified: llvm/trunk/lib/Target/Sparc/SparcInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcInstrInfo.cpp?rev=74580&r1=74579&r2=74580&view=diff ============================================================================== --- llvm/trunk/lib/Target/Sparc/SparcInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/Sparc/SparcInstrInfo.cpp Tue Jun 30 20:59:31 2009 @@ -256,17 +256,20 @@ if (OpNum == 0) { // COPY -> STORE unsigned SrcReg = MI->getOperand(1).getReg(); bool isKill = MI->getOperand(1).isKill(); + bool isUndef = MI->getOperand(1).isUndef(); NewMI = BuildMI(MF, MI->getDebugLoc(), get(isFloat ? SP::STFri : SP::STDFri)) .addFrameIndex(FI) .addImm(0) - .addReg(SrcReg, getKillRegState(isKill)); + .addReg(SrcReg, getKillRegState(isKill) | getUndefRegState(isUndef)); } else { // COPY -> LOAD unsigned DstReg = MI->getOperand(0).getReg(); bool isDead = MI->getOperand(0).isDead(); + bool isUndef = MI->getOperand(0).isUndef(); NewMI = BuildMI(MF, MI->getDebugLoc(), get(isFloat ? SP::LDFri : SP::LDDFri)) - .addReg(DstReg, RegState::Define | getDeadRegState(isDead)) + .addReg(DstReg, RegState::Define | + getDeadRegState(isDead) | getUndefRegState(isUndef)) .addFrameIndex(FI) .addImm(0); } Added: llvm/trunk/test/CodeGen/ARM/2009-06-30-RegScavengerAssert3.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2009-06-30-RegScavengerAssert3.ll?rev=74580&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/2009-06-30-RegScavengerAssert3.ll (added) +++ llvm/trunk/test/CodeGen/ARM/2009-06-30-RegScavengerAssert3.ll Tue Jun 30 20:59:31 2009 @@ -0,0 +1,128 @@ +; RUN: llvm-as < %s | llc -march=arm -mtriple=armv6-apple-darwin9 + + at JJ = external global i32* ; [#uses=1] + +define arm_apcscc void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind { +entry: + br i1 undef, label %bb5, label %bb + +bb: ; preds = %bb, %entry + br label %bb + +bb5: ; preds = %entry + br i1 undef, label %bb6, label %bb8 + +bb6: ; preds = %bb6, %bb5 + br i1 undef, label %bb8, label %bb6 + +bb8: ; preds = %bb6, %bb5 + br label %bb15 + +bb9: ; preds = %bb15 + br i1 undef, label %bb10, label %bb11 + +bb10: ; preds = %bb9 + unreachable + +bb11: ; preds = %bb9 + br i1 undef, label %bb15, label %bb12 + +bb12: ; preds = %bb11 + %0 = load i32** @JJ, align 4 ; [#uses=1] + br label %bb228.i + +bb74.i: ; preds = %bb228.i + br i1 undef, label %bb138.i, label %bb145.i + +bb138.i: ; preds = %bb74.i + br label %bb145.i + +bb145.i: ; preds = %bb228.i, %bb138.i, %bb74.i + %cflag.0.i = phi i16 [ 0, %bb228.i ], [ 0, %bb74.i ], [ 1, %bb138.i ] ; [#uses=1] + br i1 undef, label %bb146.i, label %bb151.i + +bb146.i: ; preds = %bb145.i + br i1 undef, label %bb228.i, label %bb151.i + +bb151.i: ; preds = %bb146.i, %bb145.i + %.not297 = icmp ne i16 %cflag.0.i, 0 ; [#uses=1] + %or.cond298 = and i1 undef, %.not297 ; [#uses=1] + br i1 %or.cond298, label %bb153.i, label %bb228.i + +bb153.i: ; preds = %bb151.i + br i1 undef, label %bb220.i, label %bb.nph.i98 + +bb.nph.i98: ; preds = %bb153.i + br label %bb158.i + +bb158.i: ; preds = %bb218.i, %bb.nph.i98 + %c.1020.i = phi i32 [ 0, %bb.nph.i98 ], [ %c.14.i, %bb218.i ] ; [#uses=1] + %cflag.418.i = phi i16 [ 0, %bb.nph.i98 ], [ %cflag.3.i, %bb218.i ] ; [#uses=1] + %pj.317.i = phi i32 [ undef, %bb.nph.i98 ], [ %8, %bb218.i ] ; [#uses=1] + %pi.316.i = phi i32 [ undef, %bb.nph.i98 ], [ %7, %bb218.i ] ; [#uses=1] + %fj.515.i = phi i32 [ undef, %bb.nph.i98 ], [ %fj.4.i, %bb218.i ] ; [#uses=3] + %ci.910.i = phi i32 [ undef, %bb.nph.i98 ], [ %ci.12.i, %bb218.i ] ; [#uses=2] + %i.121.i = sub i32 undef, undef ; [#uses=3] + %tmp105.i = sub i32 undef, undef ; [#uses=1] + %1 = sub i32 %c.1020.i, undef ; [#uses=0] + br i1 undef, label %bb168.i, label %bb160.i + +bb160.i: ; preds = %bb158.i + br i1 undef, label %bb161.i, label %bb168.i + +bb161.i: ; preds = %bb160.i + br i1 undef, label %bb168.i, label %bb163.i + +bb163.i: ; preds = %bb161.i + %2 = icmp slt i32 %fj.515.i, undef ; [#uses=1] + %3 = and i1 %2, undef ; [#uses=1] + br i1 %3, label %bb167.i, label %bb168.i + +bb167.i: ; preds = %bb163.i + br label %bb168.i + +bb168.i: ; preds = %bb167.i, %bb163.i, %bb161.i, %bb160.i, %bb158.i + %fi.5.i = phi i32 [ undef, %bb167.i ], [ %ci.910.i, %bb158.i ], [ undef, %bb160.i ], [ %ci.910.i, %bb161.i ], [ undef, %bb163.i ] ; [#uses=1] + %fj.4.i = phi i32 [ undef, %bb167.i ], [ undef, %bb158.i ], [ %fj.515.i, %bb160.i ], [ undef, %bb161.i ], [ %fj.515.i, %bb163.i ] ; [#uses=2] + %scevgep88.i = getelementptr i32* null, i32 %i.121.i ; [#uses=3] + %4 = load i32* %scevgep88.i, align 4 ; [#uses=2] + %scevgep89.i = getelementptr i32* %0, i32 %i.121.i ; [#uses=3] + %5 = load i32* %scevgep89.i, align 4 ; [#uses=1] + %ci.10.i = select i1 undef, i32 %pi.316.i, i32 %i.121.i ; [#uses=0] + %cj.9.i = select i1 undef, i32 %pj.317.i, i32 undef ; [#uses=0] + %6 = icmp slt i32 undef, 0 ; [#uses=3] + %ci.12.i = select i1 %6, i32 %fi.5.i, i32 %4 ; [#uses=2] + %cj.11.i100 = select i1 %6, i32 %fj.4.i, i32 %5 ; [#uses=1] + %c.14.i = select i1 %6, i32 0, i32 undef ; [#uses=2] + store i32 %c.14.i, i32* undef, align 4 + %7 = load i32* %scevgep88.i, align 4 ; [#uses=1] + %8 = load i32* %scevgep89.i, align 4 ; [#uses=1] + store i32 %ci.12.i, i32* %scevgep88.i, align 4 + store i32 %cj.11.i100, i32* %scevgep89.i, align 4 + store i32 %4, i32* undef, align 4 + br i1 undef, label %bb211.i, label %bb218.i + +bb211.i: ; preds = %bb168.i + br label %bb218.i + +bb218.i: ; preds = %bb211.i, %bb168.i + %cflag.3.i = phi i16 [ %cflag.418.i, %bb168.i ], [ 1, %bb211.i ] ; [#uses=2] + %9 = icmp slt i32 %tmp105.i, undef ; [#uses=1] + br i1 %9, label %bb220.i, label %bb158.i + +bb220.i: ; preds = %bb218.i, %bb153.i + %cflag.4.lcssa.i = phi i16 [ 0, %bb153.i ], [ %cflag.3.i, %bb218.i ] ; [#uses=0] + br i1 undef, label %bb221.i, label %bb228.i + +bb221.i: ; preds = %bb220.i + br label %bb228.i + +bb228.i: ; preds = %bb221.i, %bb220.i, %bb151.i, %bb146.i, %bb12 + br i1 undef, label %bb74.i, label %bb145.i + +bb15: ; preds = %bb11, %bb8 + br i1 undef, label %return, label %bb9 + +return: ; preds = %bb15 + ret void +} Added: llvm/trunk/test/CodeGen/ARM/2009-06-30-RegScavengerAssert4.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2009-06-30-RegScavengerAssert4.ll?rev=74580&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/2009-06-30-RegScavengerAssert4.ll (added) +++ llvm/trunk/test/CodeGen/ARM/2009-06-30-RegScavengerAssert4.ll Tue Jun 30 20:59:31 2009 @@ -0,0 +1,128 @@ +; RUN: llvm-as < %s | llc -march=arm -mtriple=armv6-apple-darwin9 + + at r = external global i32 ; [#uses=1] + at qr = external global i32 ; [#uses=1] + at II = external global i32* ; [#uses=1] + at no_mis = external global i32 ; [#uses=1] + at name1 = external global i8* ; [#uses=1] + +declare arm_apcscc void @diff(i8*, i8*, i32, i32, i32, i32) nounwind + +define arm_apcscc void @SIM(i8* %A, i8* %B, i32 %M, i32 %N, i32 %K, [256 x i32]* %V, i32 %Q, i32 %R, i32 %nseq) nounwind { +entry: + br i1 undef, label %bb5, label %bb + +bb: ; preds = %bb, %entry + br label %bb + +bb5: ; preds = %entry + br i1 undef, label %bb6, label %bb8 + +bb6: ; preds = %bb6, %bb5 + br i1 undef, label %bb8, label %bb6 + +bb8: ; preds = %bb6, %bb5 + %0 = load i8** @name1, align 4 ; [#uses=0] + br label %bb15 + +bb9: ; preds = %bb15 + br i1 undef, label %bb10, label %bb11 + +bb10: ; preds = %bb9 + unreachable + +bb11: ; preds = %bb9 + store i32 0, i32* @no_mis, align 4 + %1 = getelementptr i8* %A, i32 0 ; [#uses=1] + %2 = getelementptr i8* %B, i32 0 ; [#uses=1] + tail call arm_apcscc void @diff(i8* %1, i8* %2, i32 undef, i32 undef, i32 undef, i32 undef) nounwind + br i1 undef, label %bb15, label %bb12 + +bb12: ; preds = %bb11 + %3 = load i32** @II, align 4 ; [#uses=1] + %4 = load i32* @r, align 4 ; [#uses=1] + %5 = load i32* @qr, align 4 ; [#uses=1] + br label %bb228.i + +bb74.i: ; preds = %bb228.i + br i1 undef, label %bb138.i, label %bb145.i + +bb138.i: ; preds = %bb74.i + br label %bb145.i + +bb145.i: ; preds = %bb228.i, %bb138.i, %bb74.i + br i1 undef, label %bb146.i, label %bb151.i + +bb146.i: ; preds = %bb145.i + br i1 undef, label %bb228.i, label %bb151.i + +bb151.i: ; preds = %bb146.i, %bb145.i + br i1 undef, label %bb153.i, label %bb228.i + +bb153.i: ; preds = %bb151.i + %6 = add i32 undef, -1 ; [#uses=3] + br i1 undef, label %bb220.i, label %bb.nph.i98 + +bb.nph.i98: ; preds = %bb153.i + br label %bb158.i + +bb158.i: ; preds = %bb218.i, %bb.nph.i98 + %c.1020.i = phi i32 [ 0, %bb.nph.i98 ], [ %c.14.i, %bb218.i ] ; [#uses=1] + %f.419.i = phi i32 [ undef, %bb.nph.i98 ], [ %f.5.i, %bb218.i ] ; [#uses=1] + %pi.316.i = phi i32 [ undef, %bb.nph.i98 ], [ %10, %bb218.i ] ; [#uses=1] + %fj.515.i = phi i32 [ %6, %bb.nph.i98 ], [ %fj.4.i, %bb218.i ] ; [#uses=2] + %fi.614.i = phi i32 [ undef, %bb.nph.i98 ], [ %fi.5.i, %bb218.i ] ; [#uses=3] + %cj.811.i = phi i32 [ %6, %bb.nph.i98 ], [ %cj.11.i100, %bb218.i ] ; [#uses=3] + %ci.910.i = phi i32 [ undef, %bb.nph.i98 ], [ %ci.12.i, %bb218.i ] ; [#uses=2] + %7 = sub i32 %f.419.i, %4 ; [#uses=5] + %8 = sub i32 %c.1020.i, %5 ; [#uses=2] + %9 = icmp slt i32 %7, %8 ; [#uses=1] + br i1 %9, label %bb168.i, label %bb160.i + +bb160.i: ; preds = %bb158.i + br i1 undef, label %bb161.i, label %bb168.i + +bb161.i: ; preds = %bb160.i + br i1 undef, label %bb168.i, label %bb163.i + +bb163.i: ; preds = %bb161.i + br i1 undef, label %bb167.i, label %bb168.i + +bb167.i: ; preds = %bb163.i + br label %bb168.i + +bb168.i: ; preds = %bb167.i, %bb163.i, %bb161.i, %bb160.i, %bb158.i + %fi.5.i = phi i32 [ %fi.614.i, %bb167.i ], [ %ci.910.i, %bb158.i ], [ %fi.614.i, %bb160.i ], [ %ci.910.i, %bb161.i ], [ %fi.614.i, %bb163.i ] ; [#uses=2] + %fj.4.i = phi i32 [ %cj.811.i, %bb167.i ], [ %cj.811.i, %bb158.i ], [ %fj.515.i, %bb160.i ], [ %cj.811.i, %bb161.i ], [ %fj.515.i, %bb163.i ] ; [#uses=2] + %f.5.i = phi i32 [ %7, %bb167.i ], [ %8, %bb158.i ], [ %7, %bb160.i ], [ %7, %bb161.i ], [ %7, %bb163.i ] ; [#uses=2] + %scevgep88.i = getelementptr i32* %3, i32 undef ; [#uses=1] + %ci.10.i = select i1 undef, i32 %pi.316.i, i32 undef ; [#uses=0] + %ci.12.i = select i1 undef, i32 %fi.5.i, i32 undef ; [#uses=1] + %cj.11.i100 = select i1 undef, i32 %fj.4.i, i32 undef ; [#uses=1] + %c.14.i = select i1 undef, i32 %f.5.i, i32 undef ; [#uses=1] + %10 = load i32* %scevgep88.i, align 4 ; [#uses=1] + br i1 undef, label %bb211.i, label %bb218.i + +bb211.i: ; preds = %bb168.i + br label %bb218.i + +bb218.i: ; preds = %bb211.i, %bb168.i + br i1 undef, label %bb220.i, label %bb158.i + +bb220.i: ; preds = %bb218.i, %bb153.i + %11 = getelementptr i32* null, i32 %6 ; [#uses=1] + store i32 undef, i32* %11, align 4 + br i1 undef, label %bb221.i, label %bb228.i + +bb221.i: ; preds = %bb220.i + br label %bb228.i + +bb228.i: ; preds = %bb221.i, %bb220.i, %bb151.i, %bb146.i, %bb12 + br i1 undef, label %bb74.i, label %bb145.i + +bb15: ; preds = %bb11, %bb8 + br i1 undef, label %return, label %bb9 + +return: ; preds = %bb15 + ret void +} From sabre at nondot.org Tue Jun 30 22:27:20 2009 From: sabre at nondot.org (Chris Lattner) Date: Wed, 01 Jul 2009 03:27:20 -0000 Subject: [llvm-commits] [llvm] r74582 - in /llvm/trunk: lib/Target/X86/X86FastISel.cpp lib/Target/X86/X86InstrBuilder.h test/CodeGen/X86/fast-isel-gv.ll Message-ID: <200907010327.n613RK7Q008043@zion.cs.uiuc.edu> Author: lattner Date: Tue Jun 30 22:27:19 2009 New Revision: 74582 URL: http://llvm.org/viewvc/llvm-project?rev=74582&view=rev Log: Fix some fast-isel problems selecting global variable addressing in pic mode. Added: llvm/trunk/test/CodeGen/X86/fast-isel-gv.ll Modified: llvm/trunk/lib/Target/X86/X86FastISel.cpp llvm/trunk/lib/Target/X86/X86InstrBuilder.h Modified: llvm/trunk/lib/Target/X86/X86FastISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FastISel.cpp?rev=74582&r1=74581&r2=74582&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86FastISel.cpp (original) +++ llvm/trunk/lib/Target/X86/X86FastISel.cpp Tue Jun 30 22:27:19 2009 @@ -457,20 +457,30 @@ AM.GV = 0; return true; } - // Issue load from stub if necessary. + + // Issue load from stub. unsigned Opc = 0; const TargetRegisterClass *RC = NULL; + X86AddressMode StubAM; + StubAM.Base.Reg = AM.Base.Reg; + StubAM.GV = AM.GV; + if (TLI.getPointerTy() == MVT::i32) { Opc = X86::MOV32rm; RC = X86::GR32RegisterClass; + + if (Subtarget->isPICStyleGOT() && + TM.getRelocationModel() == Reloc::PIC_) + StubAM.GVOpFlags = X86II::MO_GOT; + } else { Opc = X86::MOV64rm; RC = X86::GR64RegisterClass; + + if (TM.getRelocationModel() != Reloc::Static) + StubAM.GVOpFlags = X86II::MO_GOTPCREL; } - X86AddressMode StubAM; - StubAM.Base.Reg = AM.Base.Reg; - StubAM.GV = AM.GV; unsigned ResultReg = createResultReg(RC); addFullAddress(BuildMI(MBB, DL, TII.get(Opc), ResultReg), StubAM); Modified: llvm/trunk/lib/Target/X86/X86InstrBuilder.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrBuilder.h?rev=74582&r1=74581&r2=74582&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrBuilder.h (original) +++ llvm/trunk/lib/Target/X86/X86InstrBuilder.h Tue Jun 30 22:27:19 2009 @@ -49,8 +49,10 @@ unsigned IndexReg; unsigned Disp; GlobalValue *GV; + unsigned GVOpFlags; - X86AddressMode() : BaseType(RegBase), Scale(1), IndexReg(0), Disp(0), GV(0) { + X86AddressMode() + : BaseType(RegBase), Scale(1), IndexReg(0), Disp(0), GV(0), GVOpFlags(0) { Base.Reg = 0; } }; @@ -113,7 +115,7 @@ assert (0); MIB.addImm(AM.Scale).addReg(AM.IndexReg); if (AM.GV) - return MIB.addGlobalAddress(AM.GV, AM.Disp); + return MIB.addGlobalAddress(AM.GV, AM.Disp, AM.GVOpFlags); else return MIB.addImm(AM.Disp); } Added: llvm/trunk/test/CodeGen/X86/fast-isel-gv.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-gv.ll?rev=74582&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/fast-isel-gv.ll (added) +++ llvm/trunk/test/CodeGen/X86/fast-isel-gv.ll Tue Jun 30 22:27:19 2009 @@ -0,0 +1,24 @@ +; RUN: llvm-as < %s | llc -fast-isel | grep {_kill at GOTPCREL} +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" +target triple = "x86_64-apple-darwin10.0" + at f = global i8 (...)* @kill ; [#uses=1] + +declare signext i8 @kill(...) + +define i32 @main() nounwind ssp { +entry: + %retval = alloca i32 ; [#uses=2] + %0 = alloca i32 ; [#uses=2] + %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] + %1 = load i8 (...)** @f, align 8 ; [#uses=1] + %2 = icmp ne i8 (...)* %1, @kill ; [#uses=1] + %3 = zext i1 %2 to i32 ; [#uses=1] + store i32 %3, i32* %0, align 4 + %4 = load i32* %0, align 4 ; [#uses=1] + store i32 %4, i32* %retval, align 4 + br label %return + +return: ; preds = %entry + %retval1 = load i32* %retval ; [#uses=1] + ret i32 %retval1 +} From devang.patel at gmail.com Tue Jun 30 22:44:19 2009 From: devang.patel at gmail.com (Devang Patel) Date: Tue, 30 Jun 2009 20:44:19 -0700 Subject: [llvm-commits] [llvm] r74579 - in /llvm/trunk: include/llvm/CodeGen/ lib/CodeGen/AsmPrinter/ lib/Target/ARM/ lib/Target/ARM/AsmPrinter/ lib/Target/Alpha/ lib/Target/Alpha/AsmPrinter/ lib/Target/CellSPU/ lib/Target/CellSPU/AsmPrinter/ lib/Target/I Message-ID: <352a1fb20906302044w19703459kc2f7a93b4cc3c3ff@mail.gmail.com> On Tue, Jun 30, 2009 at 6:55 PM, Evan Cheng wrote: > > On Jun 30, 2009, at 6:48 PM, Daniel Dunbar wrote: > >> Author: ddunbar >> Date: Tue Jun 30 20:48:54 2009 >> New Revision: 74579 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=74579&view=rev >> Log: >> Remove unused AsmPrinter OptLevel argument, and propogate. >> - This more or less amounts to a revert of r65379. That patch series introduced one AsmPrinter use of opt level in AsmWriterEmitter.cpp >> I'm curious to >> know what >> ? happened that caused this variable to become unused. see r70871 > Is it unused? It used to control whether isel emits label nodes that > force source ordering at -O0 (yeah it's horrible). Isel still uses it but now AsmPrinter is not using opt level. - Devang From sabre at nondot.org Tue Jun 30 23:13:33 2009 From: sabre at nondot.org (Chris Lattner) Date: Wed, 01 Jul 2009 04:13:33 -0000 Subject: [llvm-commits] [llvm] r74584 - in /llvm/trunk: examples/ModuleMaker/ModuleMaker.cpp include/llvm/DerivedTypes.h include/llvm/Support/TypeBuilder.h lib/Analysis/DebugInfo.cpp lib/AsmParser/LLParser.cpp lib/Debugger/ProgramInfo.cpp lib/ExecutionEngine/JIT/JIT.cpp lib/Transforms/IPO/GlobalOpt.cpp lib/Transforms/IPO/RaiseAllocations.cpp lib/Transforms/Utils/LowerAllocations.cpp utils/TableGen/IntrinsicEmitter.cpp Message-ID: <200907010413.n614DYxV009475@zion.cs.uiuc.edu> Author: lattner Date: Tue Jun 30 23:13:31 2009 New Revision: 74584 URL: http://llvm.org/viewvc/llvm-project?rev=74584&view=rev Log: improve the APIs for creating struct and function types with no arguments/elements to not have to create a temporary vector (in the API at least). Patch by Jay Foad! Modified: llvm/trunk/examples/ModuleMaker/ModuleMaker.cpp llvm/trunk/include/llvm/DerivedTypes.h llvm/trunk/include/llvm/Support/TypeBuilder.h llvm/trunk/lib/Analysis/DebugInfo.cpp llvm/trunk/lib/AsmParser/LLParser.cpp llvm/trunk/lib/Debugger/ProgramInfo.cpp llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp llvm/trunk/lib/Transforms/IPO/RaiseAllocations.cpp llvm/trunk/lib/Transforms/Utils/LowerAllocations.cpp llvm/trunk/utils/TableGen/IntrinsicEmitter.cpp Modified: llvm/trunk/examples/ModuleMaker/ModuleMaker.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/examples/ModuleMaker/ModuleMaker.cpp?rev=74584&r1=74583&r2=74584&view=diff ============================================================================== --- llvm/trunk/examples/ModuleMaker/ModuleMaker.cpp (original) +++ llvm/trunk/examples/ModuleMaker/ModuleMaker.cpp Tue Jun 30 23:13:31 2009 @@ -27,8 +27,7 @@ Module *M = new Module("test"); // Create the main function: first create the type 'int ()' - FunctionType *FT = FunctionType::get(Type::Int32Ty, std::vector(), - /*not vararg*/false); + FunctionType *FT = FunctionType::get(Type::Int32Ty, /*not vararg*/false); // By passing a module as the last parameter to the Function constructor, // it automatically gets appended to the Module. Modified: llvm/trunk/include/llvm/DerivedTypes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/DerivedTypes.h?rev=74584&r1=74583&r2=74584&view=diff ============================================================================== --- llvm/trunk/include/llvm/DerivedTypes.h (original) +++ llvm/trunk/include/llvm/DerivedTypes.h Tue Jun 30 23:13:31 2009 @@ -159,6 +159,15 @@ bool isVarArg ///< Whether this is a variable argument length function ); + /// FunctionType::get - Create a FunctionType taking no parameters. + /// + static FunctionType *get( + const Type *Result, ///< The result type + bool isVarArg ///< Whether this is a variable argument length function + ) { + return get(Result, std::vector(), isVarArg); + } + /// isValidReturnType - Return true if the specified type is valid as a return /// type. static bool isValidReturnType(const Type *RetTy); @@ -234,6 +243,12 @@ static StructType *get(const std::vector &Params, bool isPacked=false); + /// StructType::get - Create an empty structure type. + /// + static StructType *get(bool isPacked=false) { + return get(std::vector(), isPacked); + } + /// StructType::get - This static method is a convenience method for /// creating structure types by specifying the elements as arguments. /// Note that this method always returns a non-packed struct. To get Modified: llvm/trunk/include/llvm/Support/TypeBuilder.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/TypeBuilder.h?rev=74584&r1=74583&r2=74584&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/TypeBuilder.h (original) +++ llvm/trunk/include/llvm/Support/TypeBuilder.h Tue Jun 30 23:13:31 2009 @@ -253,8 +253,7 @@ private: static const FunctionType *create() { - std::vector params; - return FunctionType::get(TypeBuilder::get(), params, false); + return FunctionType::get(TypeBuilder::get(), false); } }; template class TypeBuilder { @@ -360,8 +359,7 @@ private: static const FunctionType *create() { - std::vector params; - return FunctionType::get(TypeBuilder::get(), params, true); + return FunctionType::get(TypeBuilder::get(), true); } }; template Modified: llvm/trunk/lib/Analysis/DebugInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/DebugInfo.cpp?rev=74584&r1=74583&r2=74584&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/DebugInfo.cpp (original) +++ llvm/trunk/lib/Analysis/DebugInfo.cpp Tue Jun 30 23:13:31 2009 @@ -327,7 +327,7 @@ DIFactory::DIFactory(Module &m) : M(m), StopPointFn(0), FuncStartFn(0), RegionStartFn(0), RegionEndFn(0), DeclareFn(0) { - EmptyStructPtr = PointerType::getUnqual(StructType::get(NULL, NULL)); + EmptyStructPtr = PointerType::getUnqual(StructType::get()); } /// getCastToEmpty - Return this descriptor as a Constant* with type '{}*'. Modified: llvm/trunk/lib/AsmParser/LLParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/LLParser.cpp?rev=74584&r1=74583&r2=74584&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/LLParser.cpp (original) +++ llvm/trunk/lib/AsmParser/LLParser.cpp Tue Jun 30 23:13:31 2009 @@ -1244,7 +1244,7 @@ Lex.Lex(); // Consume the '{' if (EatIfPresent(lltok::rbrace)) { - Result = StructType::get(std::vector(), Packed); + Result = StructType::get(Packed); return false; } Modified: llvm/trunk/lib/Debugger/ProgramInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Debugger/ProgramInfo.cpp?rev=74584&r1=74583&r2=74584&view=diff ============================================================================== --- llvm/trunk/lib/Debugger/ProgramInfo.cpp (original) +++ llvm/trunk/lib/Debugger/ProgramInfo.cpp Tue Jun 30 23:13:31 2009 @@ -271,8 +271,7 @@ // should be on the use list of the llvm.dbg.translation_units global. // GlobalVariable *Units = - M->getGlobalVariable("llvm.dbg.translation_units", - StructType::get(std::vector())); + M->getGlobalVariable("llvm.dbg.translation_units", StructType::get()); if (Units == 0) throw "Program contains no debugging information!"; @@ -354,8 +353,7 @@ // should be on the use list of the llvm.dbg.translation_units global. // GlobalVariable *Units = - M->getGlobalVariable("llvm.dbg.globals", - StructType::get(std::vector())); + M->getGlobalVariable("llvm.dbg.globals", StructType::get()); if (Units == 0) throw "Program contains no debugging information!"; Modified: llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp?rev=74584&r1=74583&r2=74584&view=diff ============================================================================== --- llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp (original) +++ llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp Tue Jun 30 23:13:31 2009 @@ -453,7 +453,7 @@ // arguments. Make this function and return. // First, create the function. - FunctionType *STy=FunctionType::get(RetTy, std::vector(), false); + FunctionType *STy=FunctionType::get(RetTy, false); Function *Stub = Function::Create(STy, Function::InternalLinkage, "", F->getParent()); Modified: llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp?rev=74584&r1=74583&r2=74584&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp Tue Jun 30 23:13:31 2009 @@ -1928,8 +1928,7 @@ if (Ctors[i]) { CSVals[1] = Ctors[i]; } else { - const Type *FTy = FunctionType::get(Type::VoidTy, - std::vector(), false); + const Type *FTy = FunctionType::get(Type::VoidTy, false); const PointerType *PFTy = PointerType::getUnqual(FTy); CSVals[1] = Constant::getNullValue(PFTy); CSVals[0] = ConstantInt::get(Type::Int32Ty, 2147483647); Modified: llvm/trunk/lib/Transforms/IPO/RaiseAllocations.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/RaiseAllocations.cpp?rev=74584&r1=74583&r2=74584&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/RaiseAllocations.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/RaiseAllocations.cpp Tue Jun 30 23:13:31 2009 @@ -92,8 +92,7 @@ // i8*(...) * malloc // This handles the common declaration of: 'void *malloc();' const FunctionType *Malloc3Type = - FunctionType::get(PointerType::getUnqual(Type::Int8Ty), - std::vector(), true); + FunctionType::get(PointerType::getUnqual(Type::Int8Ty), true); if (TyWeHave != Malloc3Type) // Give up MallocFunc = 0; @@ -113,14 +112,12 @@ // Check to see if the prototype was forgotten, giving us // void (...) * free // This handles the common forward declaration of: 'void free();' - const FunctionType* Free2Type = FunctionType::get(Type::VoidTy, - std::vector(),true); + const FunctionType* Free2Type = FunctionType::get(Type::VoidTy, true); if (TyWeHave != Free2Type) { // One last try, check to see if we can find free as // int (...)* free. This handles the case where NOTHING was declared. - const FunctionType* Free3Type = FunctionType::get(Type::Int32Ty, - std::vector(),true); + const FunctionType* Free3Type = FunctionType::get(Type::Int32Ty, true); if (TyWeHave != Free3Type) { // Give up. Modified: llvm/trunk/lib/Transforms/Utils/LowerAllocations.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/LowerAllocations.cpp?rev=74584&r1=74583&r2=74584&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/LowerAllocations.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/LowerAllocations.cpp Tue Jun 30 23:13:31 2009 @@ -89,7 +89,7 @@ const Type *BPTy = PointerType::getUnqual(Type::Int8Ty); // Prototype malloc as "char* malloc(...)", because we don't know in // doInitialization whether size_t is int or long. - FunctionType *FT = FunctionType::get(BPTy, std::vector(), true); + FunctionType *FT = FunctionType::get(BPTy, true); MallocFunc = M.getOrInsertFunction("malloc", FT); FreeFunc = M.getOrInsertFunction("free" , Type::VoidTy, BPTy, (Type *)0); return true; Modified: llvm/trunk/utils/TableGen/IntrinsicEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/IntrinsicEmitter.cpp?rev=74584&r1=74583&r2=74584&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/IntrinsicEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/IntrinsicEmitter.cpp Tue Jun 30 23:13:31 2009 @@ -146,7 +146,7 @@ OS << "IntegerType::get(" << BitWidth << ")"; } else if (VT == MVT::Other) { // MVT::OtherVT is used to mean the empty struct type here. - OS << "StructType::get(std::vector())"; + OS << "StructType::get()"; } else if (VT == MVT::f32) { OS << "Type::FloatTy"; } else if (VT == MVT::f64) { From clattner at apple.com Tue Jun 30 23:14:36 2009 From: clattner at apple.com (Chris Lattner) Date: Tue, 30 Jun 2009 21:14:36 -0700 Subject: [llvm-commits] [LLVMdev] Removing std::vector from APIs In-Reply-To: References: Message-ID: <76ACE886-C1B4-4035-8EC6-544E57E97004@apple.com> On May 26, 2009, at 6:54 AM, Jay Foad wrote: > 2009/5/14 Chris Lattner : >> One minor thing is that StructType::get(NULL, 0) looks somewhat >> strange to >> me. How about adding a zero-argument version of "get" that returns >> the >> empty struct? That would allow code to use StructType::get(). > > How about this? It adds: > > FunctionType *FunctionType::get(const Type *Result, bool isVarArg); > StructType *StructType::get(bool isPacked = false); > > .. although the latter isn't used much because I've preferred to use > Type::EmptyStructTy instead. > > It passes "make check", cfe's "make test", and llvm-gcc still > bootstraps. Looks great, applied here, sorry for the delay! http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20090629/079858.html http://lists.cs.uiuc.edu/pipermail/cfe-commits/Week-of-Mon-20090629/018690.html -Chris From clattner at apple.com Tue Jun 30 23:28:02 2009 From: clattner at apple.com (Chris Lattner) Date: Tue, 30 Jun 2009 21:28:02 -0700 Subject: [llvm-commits] [PATCH] Improve error handling, supersede cerr+abort In-Reply-To: <4A47D8D4.6060001@gmail.com> References: <4A47D8D4.6060001@gmail.com> Message-ID: On Jun 28, 2009, at 1:55 PM, T?r?k Edwin wrote: > As discussed here is a first implementation of an error handling API > for > LLVM. > > The attached patch introduces the API, and as an example converts 2 > cerr+abort, and a assert(0)+abort to the new API. Cool, this is something we've needed for a long time. > The default is to call abort()/exit(1) as till now, but now a client > can > install a custom error handler. If the custom handler returns > abort()/exit(1) is still called. > The intention is to also change LLVM to return failure codes instead > of > aborting, but as a first incremental improvement I just introduced the > API, and tried > to preserve current behaviour. Sounds good. Here are a few specific thoughts on the patch: +++ b/include/llvm/Support/ErrorHandling.h @@ -0,0 +1,84 @@ +//===- llvm/Support/ErrorHandling.h - Callbacks for errors ------*- C+ + -*-===// .. +// +// This file defines an API for error handling, it supersedes cerr +abort(), and +// cerr+exit() style error handling. +// Callbacks can be registered for these errors through this API. +// = = =---------------------------------------------------------------------- ===// Please put a line before the last one. Also, the file should explain what it does, it should not refer to historical designs. Just say "this is used to indicate error conditions ... ". +#ifndef LLVM_SUPPORT_ERRORHANDLING_H +#define LLVM_SUPPORT_ERRORHANDLING_H +#include "llvm/Support/raw_ostream.h" +#include Please put a blank line before the #includes. Also, I think the raw_ostream header at least can be replaced with a forward declaration of the needed classes. + enum ErrorSeverity { + WarningSeverity=0, + ErrorSeverity, + FatalSeverity + }; I think that this is over-designed. The depths of the code generator should not be producing warnings, ever. Things that *can* produce warnings (e.g. llvm-mc, tblgen, etc) should do so with their own reporting mechanisms, not through this API. Likewise, I don't think there is a need for error vs fatal. There should be no fatal errors in LLVM: in cases where there is an error, it should be detected, reported, and recovered from. + // Restores default error handling behaviour. + // This must not be called between llvm_start_multithreaded() and + // llvm_stop_multithreaded(). + void llvm_remove_error_handler(llvm_error_handler_t handler); The only use of the argument is an assertion, I think you can just remove it. + // Call registered error handlers, or the default that prints message to + // stderr. + void llvm_handle_error(const std::string &reason, + enum ErrorSeverity severity); How about naming this "llvm_report_error", and remove the other llvm_report_* functions. + // Call this after every assert(0 && "something");. + // This makes sure that even if assertions are turned off, error handlers + // are invoked, and program is aborted. + static inline void llvm_unreachable(void) { + llvm_report_fatal_error("An impossible code path was reached!"); + } We don't need this. Assertions "can't happen", so assert(0) really is unreachable. +++ b/lib/ExecutionEngine/ExecutionEngine.cpp - default: assert(0 && "Invalid long double opcode"); abort(); + default: assert(0 && "Invalid long double opcode");llvm_unreachable(); This can go away. + std::string Error; + raw_string_ostream ss(Error); + ss << "Could not resolve external global address: " + << I->getName(); + llvm_report_fatal_error(ss.str()); This (and the one in JIT/JIT.cpp) can be simplified to: llvm_report_error("Could not resolve external global address: " + I- >getName()); Otherwise, this is looking like a great first step! Thank you for working on this, please send in a new adjusted patch. -Chris From daniel at zuster.org Tue Jun 30 23:28:57 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Tue, 30 Jun 2009 21:28:57 -0700 Subject: [llvm-commits] [llvm] r74579 - in /llvm/trunk: include/llvm/CodeGen/ lib/CodeGen/AsmPrinter/ lib/Target/ARM/ lib/Target/ARM/AsmPrinter/ lib/Target/Alpha/ lib/Target/Alpha/AsmPrinter/ lib/Target/CellSPU/ lib/Target/CellSPU/AsmPrinter/ lib/Target/I Message-ID: <6a8523d60906302128n140f7a87y7e581d982aeb1e81@mail.gmail.com> On Tue, Jun 30, 2009 at 6:55 PM, Evan Cheng wrote: > > On Jun 30, 2009, at 6:48 PM, Daniel Dunbar wrote: > >> Author: ddunbar >> Date: Tue Jun 30 20:48:54 2009 >> New Revision: 74579 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=74579&view=rev >> Log: >> Remove unused AsmPrinter OptLevel argument, and propogate. >> - This more or less amounts to a revert of r65379. I'm curious to >> know what >> ? happened that caused this variable to become unused. > > Is it unused? It used to control whether isel emits label nodes that > force source ordering at -O0 (yeah it's horrible). It was unused, yes. I didn't remove any uses, and things still build... - Daniel > Evan > >> >> Modified: >> ? ?llvm/trunk/include/llvm/CodeGen/AsmPrinter.h >> ? ?llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp >> ? ?llvm/trunk/lib/Target/ARM/ARM.h >> ? ?llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp >> ? ?llvm/trunk/lib/Target/ARM/ARMTargetMachine.h >> ? ?llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp >> ? ?llvm/trunk/lib/Target/Alpha/Alpha.h >> ? ?llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp >> ? ?llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.h >> ? ?llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp >> ? ?llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp >> ? ?llvm/trunk/lib/Target/CellSPU/SPU.h >> ? ?llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp >> ? ?llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.h >> ? ?llvm/trunk/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp >> ? ?llvm/trunk/lib/Target/IA64/IA64.h >> ? ?llvm/trunk/lib/Target/IA64/IA64TargetMachine.cpp >> ? ?llvm/trunk/lib/Target/IA64/IA64TargetMachine.h >> ? ?llvm/trunk/lib/Target/MSP430/MSP430.h >> ? ?llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp >> ? ?llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp >> ? ?llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp >> ? ?llvm/trunk/lib/Target/Mips/Mips.h >> ? ?llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp >> ? ?llvm/trunk/lib/Target/Mips/MipsTargetMachine.h >> ? ?llvm/trunk/lib/Target/PIC16/PIC16.h >> ? ?llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.cpp >> ? ?llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.h >> ? ?llvm/trunk/lib/Target/PIC16/PIC16TargetMachine.cpp >> ? ?llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp >> ? ?llvm/trunk/lib/Target/PowerPC/PPC.h >> ? ?llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp >> ? ?llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h >> ? ?llvm/trunk/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp >> ? ?llvm/trunk/lib/Target/Sparc/Sparc.h >> ? ?llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp >> ? ?llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h >> ? ?llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h >> ? ?llvm/trunk/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp >> ? ?llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h >> ? ?llvm/trunk/lib/Target/X86/X86.h >> ? ?llvm/trunk/lib/Target/X86/X86TargetMachine.cpp >> ? ?llvm/trunk/lib/Target/X86/X86TargetMachine.h >> ? ?llvm/trunk/lib/Target/XCore/XCore.h >> ? ?llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp >> ? ?llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp >> >> Modified: llvm/trunk/include/llvm/CodeGen/AsmPrinter.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/AsmPrinter.h?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/include/llvm/CodeGen/AsmPrinter.h (original) >> +++ llvm/trunk/include/llvm/CodeGen/AsmPrinter.h Tue Jun 30 20:48:54 >> 2009 >> @@ -65,8 +65,6 @@ >> ? ? /// DW - If available, this is a pointer to the current dwarf >> writer. >> ? ? DwarfWriter *DW; >> >> - ? ?/// OptLevel - Generating code at a specific optimization level. >> - ? ?CodeGenOpt::Level OptLevel; >> ? public: >> ? ? /// Output stream on which we're printing assembly code. >> ? ? /// >> @@ -120,7 +118,7 @@ >> >> ? protected: >> ? ? explicit AsmPrinter(raw_ostream &o, TargetMachine &TM, >> - ? ? ? ? ? ? ? ? ? ? ? ?const TargetAsmInfo *T, CodeGenOpt::Level >> OL, bool V); >> + ? ? ? ? ? ? ? ? ? ? ? ?const TargetAsmInfo *T, bool V); >> >> ? public: >> ? ? virtual ~AsmPrinter(); >> @@ -139,7 +137,8 @@ >> ? ? /// >> ? ? /// This method is used when about to emit executable code. >> ? ? /// >> - ? ?void SwitchToTextSection(const char *NewSection, const >> GlobalValue *GV = NULL); >> + ? ?void SwitchToTextSection(const char *NewSection, >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? const GlobalValue *GV = NULL); >> >> ? ? /// SwitchToDataSection - Switch to the specified section of the >> executable >> ? ? /// if we are not already in it! ?If GV is non-null and if the >> global has an >> @@ -153,7 +152,8 @@ >> ? ? /// is the same as the SwitchToTextSection method, but not all >> assemblers >> ? ? /// are the same. >> ? ? /// >> - ? ?void SwitchToDataSection(const char *NewSection, const >> GlobalValue *GV = NULL); >> + ? ?void SwitchToDataSection(const char *NewSection, >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? const GlobalValue *GV = NULL); >> >> ? ? /// SwitchToSection - Switch to the specified section of the >> executable if >> ? ? /// we are not already in it! >> >> Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp (original) >> +++ llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp Tue Jun 30 >> 20:48:54 2009 >> @@ -42,8 +42,8 @@ >> >> char AsmPrinter::ID = 0; >> AsmPrinter::AsmPrinter(raw_ostream &o, TargetMachine &tm, >> - ? ? ? ? ? ? ? ? ? ? ? const TargetAsmInfo *T, CodeGenOpt::Level >> OL, bool VDef) >> - ?: MachineFunctionPass(&ID), FunctionNumber(0), OptLevel(OL), O(o), >> + ? ? ? ? ? ? ? ? ? ? ? const TargetAsmInfo *T, bool VDef) >> + ?: MachineFunctionPass(&ID), FunctionNumber(0), O(o), >> ? ? TM(tm), TAI(T), TRI(tm.getRegisterInfo()), >> ? ? IsInTextSection(false), LastMI(0), LastFn(0), Counter(~0U), >> ? ? PrevDLT(0, ~0U, ~0U) { >> >> Modified: llvm/trunk/lib/Target/ARM/ARM.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARM.h?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/ARM/ARM.h (original) >> +++ llvm/trunk/lib/Target/ARM/ARM.h Tue Jun 30 20:48:54 2009 >> @@ -93,7 +93,6 @@ >> FunctionPass *createARMISelDag(ARMBaseTargetMachine &TM); >> FunctionPass *createARMCodePrinterPass(raw_ostream &O, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?ARMBaseTargetMachine &TM, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? CodeGenOpt::Level OptLevel, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?bool Verbose); >> FunctionPass *createARMCodeEmitterPass(ARMBaseTargetMachine &TM, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?MachineCodeEmitter &MCE); >> >> Modified: llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp (original) >> +++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp Tue Jun 30 >> 20:48:54 2009 >> @@ -179,7 +179,7 @@ >> ? // Output assembly language. >> ? assert(AsmPrinterCtor && "AsmPrinter was not linked in"); >> ? if (AsmPrinterCtor) >> - ? ?PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose)); >> + ? ?PM.add(AsmPrinterCtor(Out, *this, Verbose)); >> >> ? return false; >> } >> @@ -198,7 +198,7 @@ >> ? if (DumpAsm) { >> ? ? assert(AsmPrinterCtor && "AsmPrinter was not linked in"); >> ? ? if (AsmPrinterCtor) >> - ? ? ?PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); >> + ? ? ?PM.add(AsmPrinterCtor(errs(), *this, true)); >> ? } >> >> ? return false; >> @@ -217,7 +217,7 @@ >> ? if (DumpAsm) { >> ? ? assert(AsmPrinterCtor && "AsmPrinter was not linked in"); >> ? ? if (AsmPrinterCtor) >> - ? ? ?PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); >> + ? ? ?PM.add(AsmPrinterCtor(errs(), *this, true)); >> ? } >> >> ? return false; >> @@ -232,7 +232,7 @@ >> ? if (DumpAsm) { >> ? ? assert(AsmPrinterCtor && "AsmPrinter was not linked in"); >> ? ? if (AsmPrinterCtor) >> - ? ? ?PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); >> + ? ? ?PM.add(AsmPrinterCtor(errs(), *this, true)); >> ? } >> >> ? return false; >> @@ -247,7 +247,7 @@ >> ? if (DumpAsm) { >> ? ? assert(AsmPrinterCtor && "AsmPrinter was not linked in"); >> ? ? if (AsmPrinterCtor) >> - ? ? ?PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); >> + ? ? ?PM.add(AsmPrinterCtor(errs(), *this, true)); >> ? } >> >> ? return false; >> >> Modified: llvm/trunk/lib/Target/ARM/ARMTargetMachine.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.h?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/ARM/ARMTargetMachine.h (original) >> +++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.h Tue Jun 30 20:48:54 >> 2009 >> @@ -43,7 +43,6 @@ >> ? // set this functions to ctor pointer at startup time if they are >> linked in. >> ? typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ARMBaseTargetMachine &tm, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?CodeGenOpt::Level >> OptLevel, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? bool verbose); >> ? static AsmPrinterCtorFn AsmPrinterCtor; >> >> >> Modified: llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp (original) >> +++ llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp Tue Jun >> 30 20:48:54 2009 >> @@ -82,9 +82,8 @@ >> ? ? bool InCPMode; >> ? public: >> ? ? explicit ARMAsmPrinter(raw_ostream &O, TargetMachine &TM, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? const TargetAsmInfo *T, >> CodeGenOpt::Level OL, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? bool V) >> - ? ? ?: AsmPrinter(O, TM, T, OL, V), DW(0), AFI(NULL), MCP(NULL), >> + ? ? ? ? ? ? ? ? ? ? ? ? ? const TargetAsmInfo *T, bool V) >> + ? ? ?: AsmPrinter(O, TM, T, V), DW(0), AFI(NULL), MCP(NULL), >> ? ? ? ? InCPMode(false) { >> ? ? ? Subtarget = &TM.getSubtarget(); >> ? ? } >> @@ -1198,9 +1197,8 @@ >> /// >> FunctionPass *llvm::createARMCodePrinterPass(raw_ostream &o, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?ARMBaseTargetMachine &tm, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? CodeGenOpt::Level >> OptLevel, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?bool verbose) { >> - ?return new ARMAsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, >> verbose); >> + ?return new ARMAsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); >> } >> >> namespace { >> >> Modified: llvm/trunk/lib/Target/Alpha/Alpha.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/Alpha.h?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/Alpha/Alpha.h (original) >> +++ llvm/trunk/lib/Target/Alpha/Alpha.h Tue Jun 30 20:48:54 2009 >> @@ -27,7 +27,6 @@ >> ? FunctionPass *createAlphaISelDag(AlphaTargetMachine &TM); >> ? FunctionPass *createAlphaCodePrinterPass(raw_ostream &OS, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?TargetMachine &TM, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? CodeGenOpt::Level >> OptLevel, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?bool Verbose); >> ? FunctionPass *createAlphaPatternInstructionSelector(TargetMachine >> &TM); >> ? FunctionPass *createAlphaCodeEmitterPass(AlphaTargetMachine &TM, >> >> Modified: llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp (original) >> +++ llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp Tue Jun 30 >> 20:48:54 2009 >> @@ -94,7 +94,7 @@ >> ? // Output assembly language. >> ? assert(AsmPrinterCtor && "AsmPrinter was not linked in"); >> ? if (AsmPrinterCtor) >> - ? ?PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose)); >> + ? ?PM.add(AsmPrinterCtor(Out, *this, Verbose)); >> ? return false; >> } >> bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM, >> @@ -104,7 +104,7 @@ >> ? if (DumpAsm) { >> ? ? assert(AsmPrinterCtor && "AsmPrinter was not linked in"); >> ? ? if (AsmPrinterCtor) >> - ? ? ?PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); >> + ? ? ?PM.add(AsmPrinterCtor(errs(), *this, true)); >> ? } >> ? return false; >> } >> @@ -115,7 +115,7 @@ >> ? if (DumpAsm) { >> ? ? assert(AsmPrinterCtor && "AsmPrinter was not linked in"); >> ? ? if (AsmPrinterCtor) >> - ? ? ?PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); >> + ? ? ?PM.add(AsmPrinterCtor(errs(), *this, true)); >> ? } >> ? return false; >> } >> >> Modified: llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.h?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.h (original) >> +++ llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.h Tue Jun 30 >> 20:48:54 2009 >> @@ -41,7 +41,6 @@ >> ? // set this functions to ctor pointer at startup time if they are >> linked in. >> ? typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? TargetMachine &tm, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?CodeGenOpt::Level >> OptLevel, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? bool verbose); >> ? static AsmPrinterCtorFn AsmPrinterCtor; >> >> >> Modified: llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp >> (original) >> +++ llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp Tue >> Jun 30 20:48:54 2009 >> @@ -38,9 +38,8 @@ >> ? ? /// >> >> ? ? explicit AlphaAsmPrinter(raw_ostream &o, TargetMachine &tm, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? const TargetAsmInfo *T, >> CodeGenOpt::Level OL, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? bool V) >> - ? ? ?: AsmPrinter(o, tm, T, OL, V) {} >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? const TargetAsmInfo *T, bool V) >> + ? ? ?: AsmPrinter(o, tm, T, V) {} >> >> ? ? virtual const char *getPassName() const { >> ? ? ? return "Alpha Assembly Printer"; >> @@ -70,9 +69,8 @@ >> /// >> FunctionPass *llvm::createAlphaCodePrinterPass(raw_ostream &o, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?TargetMachine &tm, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? CodeGenOpt::Level >> OptLevel, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?bool verbose) { >> - ?return new AlphaAsmPrinter(o, tm, tm.getTargetAsmInfo(), >> OptLevel, verbose); >> + ?return new AlphaAsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); >> } >> >> #include "AlphaGenAsmWriter.inc" >> >> Modified: llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp >> (original) >> +++ llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp Tue >> Jun 30 20:48:54 2009 >> @@ -50,9 +50,8 @@ >> ? ? std::set FnStubs, GVStubs; >> ? public: >> ? ? explicit SPUAsmPrinter(raw_ostream &O, TargetMachine &TM, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? const TargetAsmInfo *T, >> CodeGenOpt::Level OL, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? bool V) : >> - ? ? ?AsmPrinter(O, TM, T, OL, V) {} >> + ? ? ? ? ? ? ? ? ? ? ? ? ? const TargetAsmInfo *T, bool V) : >> + ? ? ?AsmPrinter(O, TM, T, V) {} >> >> ? ? virtual const char *getPassName() const { >> ? ? ? return "STI CBEA SPU Assembly Printer"; >> @@ -290,9 +289,8 @@ >> ? ? DwarfWriter *DW; >> ? public: >> ? ? explicit LinuxAsmPrinter(raw_ostream &O, SPUTargetMachine &TM, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? const TargetAsmInfo *T, >> CodeGenOpt::Level F, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? bool V) >> - ? ? ?: SPUAsmPrinter(O, TM, T, F, V), DW(0) {} >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? const TargetAsmInfo *T, bool V) >> + ? ? ?: SPUAsmPrinter(O, TM, T, V), DW(0) {} >> >> ? ? virtual const char *getPassName() const { >> ? ? ? return "STI CBEA SPU Assembly Printer"; >> @@ -603,9 +601,8 @@ >> /// >> FunctionPass *llvm::createSPUAsmPrinterPass(raw_ostream &o, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? SPUTargetMachine &tm, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?CodeGenOpt::Level >> OptLevel, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? bool verbose) { >> - ?return new LinuxAsmPrinter(o, tm, tm.getTargetAsmInfo(), >> OptLevel, verbose); >> + ?return new LinuxAsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); >> } >> >> // Force static initialization. >> >> Modified: llvm/trunk/lib/Target/CellSPU/SPU.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPU.h?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/CellSPU/SPU.h (original) >> +++ llvm/trunk/lib/Target/CellSPU/SPU.h Tue Jun 30 20:48:54 2009 >> @@ -26,7 +26,6 @@ >> ? FunctionPass *createSPUISelDag(SPUTargetMachine &TM); >> ? FunctionPass *createSPUAsmPrinterPass(raw_ostream &o, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? SPUTargetMachine &tm, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?CodeGenOpt::Level OptLevel, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? bool verbose); >> >> ? /*--== Utility functions/predicates/etc used all over the place: -- >> ==*/ >> >> Modified: llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp (original) >> +++ llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp Tue Jun 30 >> 20:48:54 2009 >> @@ -94,6 +94,6 @@ >> ? // Output assembly language. >> ? assert(AsmPrinterCtor && "AsmPrinter was not linked in"); >> ? if (AsmPrinterCtor) >> - ? ?PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose)); >> + ? ?PM.add(AsmPrinterCtor(Out, *this, Verbose)); >> ? return false; >> } >> >> Modified: llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.h?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.h (original) >> +++ llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.h Tue Jun 30 >> 20:48:54 2009 >> @@ -43,7 +43,6 @@ >> ? // set this functions to ctor pointer at startup time if they are >> linked in. >> ? typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? SPUTargetMachine &tm, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?CodeGenOpt::Level >> OptLevel, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? bool verbose); >> ? static AsmPrinterCtorFn AsmPrinterCtor; >> >> >> Modified: llvm/trunk/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp >> (original) >> +++ llvm/trunk/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp Tue Jun >> 30 20:48:54 2009 >> @@ -38,9 +38,8 @@ >> ? ? std::set ExternalFunctionNames, ExternalObjectNames; >> ? public: >> ? ? explicit IA64AsmPrinter(raw_ostream &O, TargetMachine &TM, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ?const TargetAsmInfo *T, >> CodeGenOpt::Level OL, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ?bool V) >> - ? ? ?: AsmPrinter(O, TM, T, OL, V) {} >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ?const TargetAsmInfo *T, bool V) >> + ? ? ?: AsmPrinter(O, TM, T, V) {} >> >> ? ? virtual const char *getPassName() const { >> ? ? ? return "IA64 Assembly Printer"; >> @@ -373,9 +372,8 @@ >> /// >> FunctionPass *llvm::createIA64CodePrinterPass(raw_ostream &o, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? IA64TargetMachine &tm, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?CodeGenOpt::Level >> OptLevel, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? bool verbose) { >> - ?return new IA64AsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, >> verbose); >> + ?return new IA64AsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); >> } >> >> namespace { >> >> Modified: llvm/trunk/lib/Target/IA64/IA64.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64.h?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/IA64/IA64.h (original) >> +++ llvm/trunk/lib/Target/IA64/IA64.h Tue Jun 30 20:48:54 2009 >> @@ -39,7 +39,6 @@ >> /// >> FunctionPass *createIA64CodePrinterPass(raw_ostream &o, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? IA64TargetMachine &tm, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?CodeGenOpt::Level OptLevel, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? bool verbose); >> >> } // End llvm namespace >> >> Modified: llvm/trunk/lib/Target/IA64/IA64TargetMachine.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64TargetMachine.cpp?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/IA64/IA64TargetMachine.cpp (original) >> +++ llvm/trunk/lib/Target/IA64/IA64TargetMachine.cpp Tue Jun 30 >> 20:48:54 2009 >> @@ -73,7 +73,7 @@ >> // >> = >> = >> = >> ----------------------------------------------------------------------= >> ==// >> >> bool IA64TargetMachine::addInstSelector(PassManagerBase &PM, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?CodeGenOpt::Level OptLevel){ >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?CodeGenOpt::Level OptLevel) { >> ? PM.add(createIA64DAGToDAGInstructionSelector(*this)); >> ? return false; >> } >> @@ -91,7 +91,7 @@ >> ? // Output assembly language. >> ? assert(AsmPrinterCtor && "AsmPrinter was not linked in"); >> ? if (AsmPrinterCtor) >> - ? ?PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose)); >> + ? ?PM.add(AsmPrinterCtor(Out, *this, Verbose)); >> ? return false; >> } >> >> >> Modified: llvm/trunk/lib/Target/IA64/IA64TargetMachine.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64TargetMachine.h?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/IA64/IA64TargetMachine.h (original) >> +++ llvm/trunk/lib/Target/IA64/IA64TargetMachine.h Tue Jun 30 >> 20:48:54 2009 >> @@ -38,7 +38,6 @@ >> ? // set this functions to ctor pointer at startup time if they are >> linked in. >> ? typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? IA64TargetMachine &tm, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?CodeGenOpt::Level >> OptLevel, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? bool verbose); >> ? static AsmPrinterCtorFn AsmPrinterCtor; >> >> >> Modified: llvm/trunk/lib/Target/MSP430/MSP430.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430.h?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/MSP430/MSP430.h (original) >> +++ llvm/trunk/lib/Target/MSP430/MSP430.h Tue Jun 30 20:48:54 2009 >> @@ -26,7 +26,6 @@ >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? CodeGenOpt::Level OptLevel); >> ? FunctionPass *createMSP430CodePrinterPass(raw_ostream &o, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? MSP430TargetMachine &tm, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?CodeGenOpt::Level >> OptLevel, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? bool verbose); >> } // end namespace llvm; >> >> >> Modified: llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp (original) >> +++ llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp Tue Jun 30 >> 20:48:54 2009 >> @@ -40,9 +40,8 @@ >> ? class VISIBILITY_HIDDEN MSP430AsmPrinter : public AsmPrinter { >> ? public: >> ? ? MSP430AsmPrinter(raw_ostream &O, MSP430TargetMachine &TM, >> - ? ? ? ? ? ? ? ? ? ? const TargetAsmInfo *TAI, >> - ? ? ? ? ? ? ? ? ? ? CodeGenOpt::Level OL, bool V) >> - ? ? ?: AsmPrinter(O, TM, TAI, OL, V) {} >> + ? ? ? ? ? ? ? ? ? ? const TargetAsmInfo *TAI, bool V) >> + ? ? ?: AsmPrinter(O, TM, TAI, V) {} >> >> ? ? virtual const char *getPassName() const { >> ? ? ? return "MSP430 Assembly Printer"; >> @@ -77,9 +76,8 @@ >> /// >> FunctionPass *llvm::createMSP430CodePrinterPass(raw_ostream &o, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? MSP430TargetMachine >> &tm, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?CodeGenOpt::Level >> OptLevel, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? bool verbose) { >> - ?return new MSP430AsmPrinter(o, tm, tm.getTargetAsmInfo(), >> OptLevel, verbose); >> + ?return new MSP430AsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); >> } >> >> bool MSP430AsmPrinter::doInitialization(Module &M) { >> >> Modified: llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp (original) >> +++ llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp Tue Jun 30 >> 20:48:54 2009 >> @@ -62,7 +62,7 @@ >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?bool Verbose, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?raw_ostream &Out) { >> ? // Output assembly language. >> - ?PM.add(createMSP430CodePrinterPass(Out, *this, OptLevel, Verbose)); >> + ?PM.add(createMSP430CodePrinterPass(Out, *this, Verbose)); >> ? return false; >> } >> >> >> Modified: llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp >> (original) >> +++ llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp Tue Jun >> 30 20:48:54 2009 >> @@ -51,9 +51,8 @@ >> ? ? const MipsSubtarget *Subtarget; >> ? public: >> ? ? explicit MipsAsmPrinter(raw_ostream &O, MipsTargetMachine &TM, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ?const TargetAsmInfo *T, >> CodeGenOpt::Level OL, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ?bool V) >> - ? ? ?: AsmPrinter(O, TM, T, OL, V) { >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ?const TargetAsmInfo *T, bool V) >> + ? ? ?: AsmPrinter(O, TM, T, V) { >> ? ? ? Subtarget = &TM.getSubtarget(); >> ? ? } >> >> @@ -93,9 +92,8 @@ >> /// regardless of whether the function is in SSA form. >> FunctionPass *llvm::createMipsCodePrinterPass(raw_ostream &o, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? MipsTargetMachine &tm, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?CodeGenOpt::Level >> OptLevel, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? bool verbose) { >> - ?return new MipsAsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, >> verbose); >> + ?return new MipsAsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); >> } >> >> // >> = >> = >> = >> ----------------------------------------------------------------------= >> ==// >> >> Modified: llvm/trunk/lib/Target/Mips/Mips.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips.h?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/Mips/Mips.h (original) >> +++ llvm/trunk/lib/Target/Mips/Mips.h Tue Jun 30 20:48:54 2009 >> @@ -27,7 +27,6 @@ >> ? FunctionPass *createMipsDelaySlotFillerPass(MipsTargetMachine &TM); >> ? FunctionPass *createMipsCodePrinterPass(raw_ostream &OS, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? MipsTargetMachine &TM, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?CodeGenOpt::Level OptLevel, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? bool Verbose); >> } // end namespace llvm; >> >> >> Modified: llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp (original) >> +++ llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp Tue Jun 30 >> 20:48:54 2009 >> @@ -134,6 +134,6 @@ >> ? ? ? ? ? ? ? ? ? ?bool Verbose, raw_ostream &Out) ?{ >> ? // Output assembly language. >> ? assert(AsmPrinterCtor && "AsmPrinter was not linked in"); >> - ?PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose)); >> + ?PM.add(AsmPrinterCtor(Out, *this, Verbose)); >> ? return false; >> } >> >> Modified: llvm/trunk/lib/Target/Mips/MipsTargetMachine.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsTargetMachine.h?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/Mips/MipsTargetMachine.h (original) >> +++ llvm/trunk/lib/Target/Mips/MipsTargetMachine.h Tue Jun 30 >> 20:48:54 2009 >> @@ -39,7 +39,6 @@ >> ? ? // linked in. >> ? ? typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? MipsTargetMachine &tm, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?CodeGenOpt::Level >> OptLevel, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? bool verbose); >> ? ? static AsmPrinterCtorFn AsmPrinterCtor; >> >> >> Modified: llvm/trunk/lib/Target/PIC16/PIC16.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16.h?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/PIC16/PIC16.h (original) >> +++ llvm/trunk/lib/Target/PIC16/PIC16.h Tue Jun 30 20:48:54 2009 >> @@ -331,7 +331,6 @@ >> ? FunctionPass *createPIC16ISelDag(PIC16TargetMachine &TM); >> ? FunctionPass *createPIC16CodePrinterPass(raw_ostream &OS, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?PIC16TargetMachine &TM, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? CodeGenOpt::Level >> OptLevel, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?bool Verbose); >> ? // Banksel optimzer pass. >> ? FunctionPass *createPIC16MemSelOptimizerPass(); >> >> Modified: llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.cpp (original) >> +++ llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.cpp Tue Jun 30 >> 20:48:54 2009 >> @@ -113,9 +113,8 @@ >> /// >> FunctionPass *llvm::createPIC16CodePrinterPass(raw_ostream &o, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?PIC16TargetMachine &tm, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? CodeGenOpt::Level >> OptLevel, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?bool verbose) { >> - ?return new PIC16AsmPrinter(o, tm, tm.getTargetAsmInfo(), >> OptLevel, verbose); >> + ?return new PIC16AsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); >> } >> >> >> >> Modified: llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.h?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.h (original) >> +++ llvm/trunk/lib/Target/PIC16/PIC16AsmPrinter.h Tue Jun 30 >> 20:48:54 2009 >> @@ -30,9 +30,8 @@ >> namespace llvm { >> ? struct VISIBILITY_HIDDEN PIC16AsmPrinter : public AsmPrinter { >> ? ? explicit PIC16AsmPrinter(raw_ostream &O, PIC16TargetMachine &TM, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? const TargetAsmInfo *T, >> CodeGenOpt::Level OL, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? bool V) >> - ? ? ?: AsmPrinter(O, TM, T, OL, V), DbgInfo(O, T) { >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? const TargetAsmInfo *T, bool V) >> + ? ? ?: AsmPrinter(O, TM, T, V), DbgInfo(O, T) { >> ? ? ? PTLI = TM.getTargetLowering(); >> ? ? ? PTAI = static_cast (T); >> ? ? } >> >> Modified: llvm/trunk/lib/Target/PIC16/PIC16TargetMachine.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16TargetMachine.cpp?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/PIC16/PIC16TargetMachine.cpp (original) >> +++ llvm/trunk/lib/Target/PIC16/PIC16TargetMachine.cpp Tue Jun 30 >> 20:48:54 2009 >> @@ -65,11 +65,11 @@ >> ? return false; >> } >> >> -bool PIC16TargetMachine:: >> -addAssemblyEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, >> - ? ? ? ? ? ? ? ? ? bool Verbose, raw_ostream &Out) { >> +bool PIC16TargetMachine::addAssemblyEmitter(PassManagerBase &PM, >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?CodeGenOpt::Level >> OptLevel, >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?bool Verbose, >> raw_ostream &Out) { >> ? // Output assembly language. >> - ?PM.add(createPIC16CodePrinterPass(Out, *this, OptLevel, Verbose)); >> + ?PM.add(createPIC16CodePrinterPass(Out, *this, Verbose)); >> ? return false; >> } >> >> >> Modified: llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp >> (original) >> +++ llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp Tue >> Jun 30 20:48:54 2009 >> @@ -56,9 +56,8 @@ >> ? ? const PPCSubtarget &Subtarget; >> ? public: >> ? ? explicit PPCAsmPrinter(raw_ostream &O, TargetMachine &TM, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? const TargetAsmInfo *T, >> CodeGenOpt::Level OL, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? bool V) >> - ? ? ?: AsmPrinter(O, TM, T, OL, V), >> + ? ? ? ? ? ? ? ? ? ? ? ? ? const TargetAsmInfo *T, bool V) >> + ? ? ?: AsmPrinter(O, TM, T, V), >> ? ? ? ? Subtarget(TM.getSubtarget()) {} >> >> ? ? virtual const char *getPassName() const { >> @@ -296,9 +295,8 @@ >> ? class VISIBILITY_HIDDEN PPCLinuxAsmPrinter : public PPCAsmPrinter { >> ? public: >> ? ? explicit PPCLinuxAsmPrinter(raw_ostream &O, PPCTargetMachine &TM, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?const TargetAsmInfo *T, >> CodeGenOpt::Level OL, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?bool V) >> - ? ? ?: PPCAsmPrinter(O, TM, T, OL, V){} >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?const TargetAsmInfo *T, bool V) >> + ? ? ?: PPCAsmPrinter(O, TM, T, V){} >> >> ? ? virtual const char *getPassName() const { >> ? ? ? return "Linux PPC Assembly Printer"; >> @@ -323,9 +321,8 @@ >> ? ? raw_ostream &OS; >> ? public: >> ? ? explicit PPCDarwinAsmPrinter(raw_ostream &O, PPCTargetMachine &TM, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? const TargetAsmInfo *T, >> CodeGenOpt::Level OL, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? bool V) >> - ? ? ?: PPCAsmPrinter(O, TM, T, OL, V), OS(O) {} >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? const TargetAsmInfo *T, bool V) >> + ? ? ?: PPCAsmPrinter(O, TM, T, V), OS(O) {} >> >> ? ? virtual const char *getPassName() const { >> ? ? ? return "Darwin PPC Assembly Printer"; >> @@ -1119,16 +1116,13 @@ >> /// >> FunctionPass *llvm::createPPCAsmPrinterPass(raw_ostream &o, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? PPCTargetMachine &tm, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?CodeGenOpt::Level >> OptLevel, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? bool verbose) { >> ? const PPCSubtarget *Subtarget = &tm.getSubtarget(); >> >> ? if (Subtarget->isDarwin()) { >> - ? ?return new PPCDarwinAsmPrinter(o, tm, tm.getTargetAsmInfo(), >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OptLevel, verbose); >> + ? ?return new PPCDarwinAsmPrinter(o, tm, tm.getTargetAsmInfo(), >> verbose); >> ? } else { >> - ? ?return new PPCLinuxAsmPrinter(o, tm, tm.getTargetAsmInfo(), >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OptLevel, verbose); >> + ? ?return new PPCLinuxAsmPrinter(o, tm, tm.getTargetAsmInfo(), >> verbose); >> ? } >> } >> >> >> Modified: llvm/trunk/lib/Target/PowerPC/PPC.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPC.h?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/PowerPC/PPC.h (original) >> +++ llvm/trunk/lib/Target/PowerPC/PPC.h Tue Jun 30 20:48:54 2009 >> @@ -28,9 +28,8 @@ >> >> FunctionPass *createPPCBranchSelectionPass(); >> FunctionPass *createPPCISelDag(PPCTargetMachine &TM); >> -FunctionPass *createPPCAsmPrinterPass(raw_ostream &OS, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?PPCTargetMachine &TM, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?CodeGenOpt::Level OptLevel, >> bool Verbose); >> +FunctionPass *createPPCAsmPrinterPass(raw_ostream &OS, >> PPCTargetMachine &TM, >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?bool Verbose); >> FunctionPass *createPPCCodeEmitterPass(PPCTargetMachine &TM, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?MachineCodeEmitter &MCE); >> FunctionPass *createPPCJITCodeEmitterPass(PPCTargetMachine &TM, >> >> Modified: llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp (original) >> +++ llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp Tue Jun 30 >> 20:48:54 2009 >> @@ -152,7 +152,7 @@ >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? raw_ostream &Out) { >> ? assert(AsmPrinterCtor && "AsmPrinter was not linked in"); >> ? if (AsmPrinterCtor) >> - ? ?PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose)); >> + ? ?PM.add(AsmPrinterCtor(Out, *this, Verbose)); >> >> ? return false; >> } >> @@ -183,7 +183,7 @@ >> ? if (DumpAsm) { >> ? ? assert(AsmPrinterCtor && "AsmPrinter was not linked in"); >> ? ? if (AsmPrinterCtor) >> - ? ? ?PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); >> + ? ? ?PM.add(AsmPrinterCtor(errs(), *this, true)); >> ? } >> >> ? return false; >> @@ -215,7 +215,7 @@ >> ? if (DumpAsm) { >> ? ? assert(AsmPrinterCtor && "AsmPrinter was not linked in"); >> ? ? if (AsmPrinterCtor) >> - ? ? ?PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); >> + ? ? ?PM.add(AsmPrinterCtor(errs(), *this, true)); >> ? } >> >> ? return false; >> @@ -230,7 +230,7 @@ >> ? if (DumpAsm) { >> ? ? assert(AsmPrinterCtor && "AsmPrinter was not linked in"); >> ? ? if (AsmPrinterCtor) >> - ? ? ?PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); >> + ? ? ?PM.add(AsmPrinterCtor(errs(), *this, true)); >> ? } >> >> ? return false; >> @@ -245,7 +245,7 @@ >> ? if (DumpAsm) { >> ? ? assert(AsmPrinterCtor && "AsmPrinter was not linked in"); >> ? ? if (AsmPrinterCtor) >> - ? ? ?PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); >> + ? ? ?PM.add(AsmPrinterCtor(errs(), *this, true)); >> ? } >> >> ? return false; >> >> Modified: llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h (original) >> +++ llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h Tue Jun 30 >> 20:48:54 2009 >> @@ -46,7 +46,6 @@ >> ? // set this functions to ctor pointer at startup time if they are >> linked in. >> ? typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? PPCTargetMachine &tm, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?CodeGenOpt::Level >> OptLevel, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? bool verbose); >> ? static AsmPrinterCtorFn AsmPrinterCtor; >> >> >> Modified: llvm/trunk/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp >> (original) >> +++ llvm/trunk/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp Tue >> Jun 30 20:48:54 2009 >> @@ -50,9 +50,8 @@ >> ? ? unsigned BBNumber; >> ? public: >> ? ? explicit SparcAsmPrinter(raw_ostream &O, TargetMachine &TM, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? const TargetAsmInfo *T, >> CodeGenOpt::Level OL, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? bool V) >> - ? ? ?: AsmPrinter(O, TM, T, OL, V), BBNumber(0) {} >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? const TargetAsmInfo *T, bool V) >> + ? ? ?: AsmPrinter(O, TM, T, V), BBNumber(0) {} >> >> ? ? virtual const char *getPassName() const { >> ? ? ? return "Sparc Assembly Printer"; >> @@ -84,9 +83,8 @@ >> /// >> FunctionPass *llvm::createSparcCodePrinterPass(raw_ostream &o, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?TargetMachine &tm, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? CodeGenOpt::Level >> OptLevel, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?bool verbose) { >> - ?return new SparcAsmPrinter(o, tm, tm.getTargetAsmInfo(), >> OptLevel, verbose); >> + ?return new SparcAsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); >> } >> >> >> >> Modified: llvm/trunk/lib/Target/Sparc/Sparc.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/Sparc.h?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/Sparc/Sparc.h (original) >> +++ llvm/trunk/lib/Target/Sparc/Sparc.h Tue Jun 30 20:48:54 2009 >> @@ -25,7 +25,6 @@ >> >> ? FunctionPass *createSparcISelDag(SparcTargetMachine &TM); >> ? FunctionPass *createSparcCodePrinterPass(raw_ostream &OS, >> TargetMachine &TM, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? CodeGenOpt::Level >> OptLevel, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?bool Verbose); >> ? FunctionPass *createSparcDelaySlotFillerPass(TargetMachine &TM); >> ? FunctionPass *createSparcFPMoverPass(TargetMachine &TM); >> >> Modified: llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp (original) >> +++ llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp Tue Jun 30 >> 20:48:54 2009 >> @@ -90,6 +90,6 @@ >> ? // Output assembly language. >> ? assert(AsmPrinterCtor && "AsmPrinter was not linked in"); >> ? if (AsmPrinterCtor) >> - ? ?PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose)); >> + ? ?PM.add(AsmPrinterCtor(Out, *this, Verbose)); >> ? return false; >> } >> >> Modified: llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h (original) >> +++ llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h Tue Jun 30 >> 20:48:54 2009 >> @@ -39,7 +39,6 @@ >> ? // set this functions to ctor pointer at startup time if they are >> linked in. >> ? typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? TargetMachine &tm, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?CodeGenOpt::Level >> OptLevel, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? bool verbose); >> ? static AsmPrinterCtorFn AsmPrinterCtor; >> >> >> Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h (original) >> +++ llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h Tue Jun >> 30 20:48:54 2009 >> @@ -38,9 +38,8 @@ >> ? MCStreamer *Streamer; >> ?public: >> ? explicit X86ATTAsmPrinter(raw_ostream &O, X86TargetMachine &TM, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ?const TargetAsmInfo *T, >> CodeGenOpt::Level OL, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ?bool V) >> - ? ?: AsmPrinter(O, TM, T, OL, V) { >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ?const TargetAsmInfo *T, bool V) >> + ? ?: AsmPrinter(O, TM, T, V) { >> ? ? Subtarget = &TM.getSubtarget(); >> ? ? Context = 0; >> ? ? Streamer = 0; >> >> Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp (original) >> +++ llvm/trunk/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp Tue Jun >> 30 20:48:54 2009 >> @@ -25,15 +25,12 @@ >> /// >> FunctionPass *llvm::createX86CodePrinterPass(raw_ostream &o, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?X86TargetMachine &tm, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? CodeGenOpt::Level >> OptLevel, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?bool verbose) { >> ? const X86Subtarget *Subtarget = &tm.getSubtarget(); >> >> ? if (Subtarget->isFlavorIntel()) >> - ? ?return new X86IntelAsmPrinter(o, tm, tm.getTargetAsmInfo(), >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OptLevel, verbose); >> - ?return new X86ATTAsmPrinter(o, tm, tm.getTargetAsmInfo(), >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OptLevel, verbose); >> + ? ?return new X86IntelAsmPrinter(o, tm, tm.getTargetAsmInfo(), >> verbose); >> + ?return new X86ATTAsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); >> } >> >> namespace { >> >> Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h >> (original) >> +++ llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h Tue >> Jun 30 20:48:54 2009 >> @@ -26,9 +26,8 @@ >> >> struct VISIBILITY_HIDDEN X86IntelAsmPrinter : public AsmPrinter { >> ? explicit X86IntelAsmPrinter(raw_ostream &O, X86TargetMachine &TM, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?const TargetAsmInfo *T, >> CodeGenOpt::Level OL, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?bool V) >> - ? ?: AsmPrinter(O, TM, T, OL, V) {} >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?const TargetAsmInfo *T, bool V) >> + ? ?: AsmPrinter(O, TM, T, V) {} >> >> ? virtual const char *getPassName() const { >> ? ? return "X86 Intel-Style Assembly Printer"; >> >> Modified: llvm/trunk/lib/Target/X86/X86.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.h?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/X86/X86.h (original) >> +++ llvm/trunk/lib/Target/X86/X86.h Tue Jun 30 20:48:54 2009 >> @@ -46,9 +46,7 @@ >> /// assembly code for a MachineFunction to the given output stream, >> /// using the given target machine description. >> /// >> -FunctionPass *createX86CodePrinterPass(raw_ostream &o, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? X86TargetMachine &tm, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? CodeGenOpt::Level OptLevel, >> +FunctionPass *createX86CodePrinterPass(raw_ostream &o, >> X86TargetMachine &tm, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?bool Verbose); >> >> /// createX86CodeEmitterPass - Return a pass that emits the >> collected X86 code >> >> Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp (original) >> +++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Tue Jun 30 >> 20:48:54 2009 >> @@ -226,7 +226,7 @@ >> >> ? assert(AsmPrinterCtor && "AsmPrinter was not linked in"); >> ? if (AsmPrinterCtor) >> - ? ?PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose)); >> + ? ?PM.add(AsmPrinterCtor(Out, *this, Verbose)); >> ? return false; >> } >> >> @@ -254,7 +254,7 @@ >> ? if (DumpAsm) { >> ? ? assert(AsmPrinterCtor && "AsmPrinter was not linked in"); >> ? ? if (AsmPrinterCtor) >> - ? ? ?PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); >> + ? ? ?PM.add(AsmPrinterCtor(errs(), *this, true)); >> ? } >> >> ? return false; >> @@ -284,7 +284,7 @@ >> ? if (DumpAsm) { >> ? ? assert(AsmPrinterCtor && "AsmPrinter was not linked in"); >> ? ? if (AsmPrinterCtor) >> - ? ? ?PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); >> + ? ? ?PM.add(AsmPrinterCtor(errs(), *this, true)); >> ? } >> >> ? return false; >> @@ -298,7 +298,7 @@ >> ? if (DumpAsm) { >> ? ? assert(AsmPrinterCtor && "AsmPrinter was not linked in"); >> ? ? if (AsmPrinterCtor) >> - ? ? ?PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); >> + ? ? ?PM.add(AsmPrinterCtor(errs(), *this, true)); >> ? } >> >> ? return false; >> @@ -312,7 +312,7 @@ >> ? if (DumpAsm) { >> ? ? assert(AsmPrinterCtor && "AsmPrinter was not linked in"); >> ? ? if (AsmPrinterCtor) >> - ? ? ?PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); >> + ? ? ?PM.add(AsmPrinterCtor(errs(), *this, true)); >> ? } >> >> ? return false; >> >> Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.h?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/X86/X86TargetMachine.h (original) >> +++ llvm/trunk/lib/Target/X86/X86TargetMachine.h Tue Jun 30 20:48:54 >> 2009 >> @@ -45,7 +45,6 @@ >> ? // set this functions to ctor pointer at startup time if they are >> linked in. >> ? typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? X86TargetMachine &tm, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?CodeGenOpt::Level >> OptLevel, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? bool verbose); >> ? static AsmPrinterCtorFn AsmPrinterCtor; >> >> >> Modified: llvm/trunk/lib/Target/XCore/XCore.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCore.h?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/XCore/XCore.h (original) >> +++ llvm/trunk/lib/Target/XCore/XCore.h Tue Jun 30 20:48:54 2009 >> @@ -26,7 +26,6 @@ >> ? FunctionPass *createXCoreISelDag(XCoreTargetMachine &TM); >> ? FunctionPass *createXCoreCodePrinterPass(raw_ostream &OS, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?XCoreTargetMachine &TM, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? CodeGenOpt::Level >> OptLevel, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?bool Verbose); >> } // end namespace llvm; >> >> >> Modified: llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp (original) >> +++ llvm/trunk/lib/Target/XCore/XCoreAsmPrinter.cpp Tue Jun 30 >> 20:48:54 2009 >> @@ -58,9 +58,8 @@ >> ? ? const XCoreSubtarget &Subtarget; >> ? public: >> ? ? explicit XCoreAsmPrinter(raw_ostream &O, XCoreTargetMachine &TM, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? const TargetAsmInfo *T, >> CodeGenOpt::Level OL, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? bool V) >> - ? ? ?: AsmPrinter(O, TM, T, OL, V), DW(0), >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? const TargetAsmInfo *T, bool V) >> + ? ? ?: AsmPrinter(O, TM, T, V), DW(0), >> ? ? ? ? Subtarget(*TM.getSubtargetImpl()) {} >> >> ? ? virtual const char *getPassName() const { >> @@ -106,9 +105,8 @@ >> /// >> FunctionPass *llvm::createXCoreCodePrinterPass(raw_ostream &o, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?XCoreTargetMachine &tm, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? CodeGenOpt::Level >> OptLevel, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?bool verbose) { >> - ?return new XCoreAsmPrinter(o, tm, tm.getTargetAsmInfo(), >> OptLevel, verbose); >> + ?return new XCoreAsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose); >> } >> >> // PrintEscapedString - Print each character of the specified >> string, escaping >> >> Modified: llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp?rev=74579&r1=74578&r2=74579&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp (original) >> +++ llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp Tue Jun 30 >> 20:48:54 2009 >> @@ -69,6 +69,6 @@ >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? bool Verbose, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? raw_ostream &Out) { >> ? // Output assembly language. >> - ?PM.add(createXCoreCodePrinterPass(Out, *this, OptLevel, Verbose)); >> + ?PM.add(createXCoreCodePrinterPass(Out, *this, Verbose)); >> ? return false; >> } >> >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From clattner at apple.com Tue Jun 30 23:30:12 2009 From: clattner at apple.com (Chris Lattner) Date: Tue, 30 Jun 2009 21:30:12 -0700 Subject: [llvm-commits] Adding a portable strerror*() wrapper, llvm::sys::StrError() In-Reply-To: References: Message-ID: <7BBC8FF7-0F70-449A-BECD-BC10F92065F9@apple.com> On Jun 29, 2009, at 10:52 AM, Jeffrey Yasskin wrote: > My oprofile patch calls some functions that report errors through > errno, and since strerror_r changes its behavior depending on > GNU_SOURCE and other #defines, I figured it would be nice to have a > portable wrapper in llvm/System/Errno.h. I included the windows > version, strerror_s, even though I can't test it. > > This won't do quite the right thing on cmake builds--although it will > run successfully--since cmake doesn't define HAVE_STRERROR*. > > I wasn't sure quite what to do with MakeErrStr. I'd be perfectly happy > with that as the interface in Errno.h, but it does different things on > Windows and Unix, and I didn't want a public function to be ambiguous > like that. Seems pretty reasonable for me. If you think it's ok, please commit. Please commit any autoconf regenerations as a separate (second) patch though. -Chris From clattner at apple.com Tue Jun 30 23:36:56 2009 From: clattner at apple.com (Chris Lattner) Date: Tue, 30 Jun 2009 21:36:56 -0700 Subject: [llvm-commits] Initial OProfile symbolization support In-Reply-To: References: Message-ID: <65165FB7-0FFC-4315-B015-608AFF27A56B@apple.com> On Jun 29, 2009, at 3:32 PM, Jeffrey Yasskin wrote: > OProfile provides a library to tell it about JIT output, described at > http://oprofile.sourceforge.net/doc/devel/jit-interface.html. This > patch tells OProfile about function ranges, but not line numbers. It > adds a --with-oprofile= flag to configure, but I don't know > how to do the equivalent to cmake. > > Problems: > 1. Because oprofile installs its libraries to /lib/oprofile, > we need an -rpath option to let the loader find them. We could > probably link the oprofile library statically to avoid this (but > how?). > 2. llvm-config doesn't include the required -L and -rpath flags in its > --ldflags output, even though it includes -lopagent. > 3. cmake support is missing, as mentioned above. > > I've tested this by running the attached fib.c under lli. Let me know > if you can think of an automated way to test it. The patch looks fine to me. I don't think you need to worry about adding a testcase, but figuring out #1/#2 above seem important :) -Chirs > > > > The output from opreport follows: > > Before: > > $ opreport -l ~/opensource/llvm/trunk/dbg/Debug/bin/lli > > CPU: Core 2, speed 1998 MHz (estimated) > > Counted CPU_CLK_UNHALTED events (Clock cycles when not halted) with > a unit mask > of 0x00 (Unhalted core cycles) count 100000 > > samples % image name symbol name > > 48182 98.9729 anon (tgid:19412 range: > 0x7f12ccaab000-0x7f12cdaab000) anon > (tgid:19412 range:0x7f12ccaab000-0x7f12cdaab000) > > 11 0.0226 libstdc++.so.6.0.9 /usr/lib/libstdc++.so.6.0.9 > > 10 0.0205 lli > llvm::MachineOperand::isReg() const > > ... > > > After: > > $ opreport -l ~/opensource/llvm/oprof/dbg/Debug/bin/lli > CPU: Core 2, speed 1998 MHz (estimated) > > Counted CPU_CLK_UNHALTED events (Clock cycles when not halted) with > a unit mask > of 0x00 (Unhalted core cycles) count 100000 > > samples % image name symbol name > > 24565 60.7308 19814.jo fib_left > > 15365 37.9861 19814.jo fib_right > > 22 0.0544 ld-2.7.so do_lookup_x > > 10 0.0247 lli > llvm::MachineOperand::isReg() const > > 8 0.0198 ld-2.7.so _dl_relocate_object > > 8 0.0198 lli > std::vector std::allocator >::size() const > ... > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From eli.friedman at gmail.com Tue Jun 30 23:59:57 2009 From: eli.friedman at gmail.com (Eli Friedman) Date: Tue, 30 Jun 2009 21:59:57 -0700 Subject: [llvm-commits] [PATCH] Improve error handling, supersede cerr+abort In-Reply-To: References: <4A47D8D4.6060001@gmail.com> Message-ID: On Tue, Jun 30, 2009 at 9:28 PM, Chris Lattner wrote: > I think that this is over-designed. ?The depths of the code generator > should not be producing warnings, ever. Instcombine currently can produce warnings; are you suggesting we should get rid of that? > We don't need this. ?Assertions "can't happen", so assert(0) really is > unreachable. Mmm... yeah; that said, I think there are places where we should turn assertions into errors (particularly in legalization). -Eli From clattner at apple.com Wed Jul 1 00:12:16 2009 From: clattner at apple.com (Chris Lattner) Date: Tue, 30 Jun 2009 22:12:16 -0700 Subject: [llvm-commits] [PATCH] Improve error handling, supersede cerr+abort In-Reply-To: References: <4A47D8D4.6060001@gmail.com> Message-ID: <60D5E8C7-05E7-4D68-9D61-E07D83090882@apple.com> On Jun 30, 2009, at 9:59 PM, Eli Friedman wrote: > On Tue, Jun 30, 2009 at 9:28 PM, Chris Lattner > wrote: >> I think that this is over-designed. The depths of the code generator >> should not be producing warnings, ever. > > Instcombine currently can produce warnings; are you suggesting we > should get rid of that? Yes, without loc info, it is pretty useless. Working with end users using llvm-gcc, every time they get that warning, they assume it is a bug in the compiler, not a bug in their code. >> We don't need this. Assertions "can't happen", so assert(0) really >> is >> unreachable. > > Mmm... yeah; that said, I think there are places where we should turn > assertions into errors (particularly in legalization). Yes, I agree. Also the "cannot select" error should also be handled as an error not assert. -Chris From clattner at apple.com Wed Jul 1 00:27:55 2009 From: clattner at apple.com (Chris Lattner) Date: Tue, 30 Jun 2009 22:27:55 -0700 Subject: [llvm-commits] [PATCH] Add an LLVMContext member to Module In-Reply-To: <4060B161-5D56-4BD3-BE4E-55129CC6C901@mac.com> References: <4060B161-5D56-4BD3-BE4E-55129CC6C901@mac.com> Message-ID: <4821C903-EBEC-4799-B15E-27C0EA3280E0@apple.com> On Jun 30, 2009, at 3:40 PM, Owen Anderson wrote: > Here's the first of many patches related to pushing LLVMContext > through the existing APIs. This adds an LLVMContext member to each > Module, which involves threading LLVMContext through large parts of > the bitcode reader, the ASM parser, and all of the tools. Looks good to me. Some minor nits: + /// Get the global data context. + /// @returns LLVMContext - a container for LLVM's global information + LLVMContext* getContext() const { return Context; } Should this return a non-const context given a const module? @@ -30,7 +31,8 @@ /// @brief Parse LLVM Assembly from a file Module *ParseAssemblyFile( const std::string &Filename, ///< The name of the file to parse - ParseError &Error ///< If not null, an object to return errors in. + ParseError &Error, ///< If not null, an object to return errors in. + LLVMContext* Context ///< Context in which to allocate globals info. ); Is Context allowed to be null? If not, these APIs (and the module ctor etc) should take the context by-reference, instead of by-pointer. Module *ParseAssemblyString( const char *AsmString, ///< The string containing assembly Module *M, ///< A module to add the assembly too. - ParseError &Error ///< If not null, an object to return errors in. + ParseError &Error, ///< If not null, an object to return errors in. + LLVMContext* Context ); The module should already have a context, no need for it here. +++ include/llvm-c/BitReader.h (working copy) @@ -29,13 +29,14 @@ /* Builds a module from the bitcode in the specified memory buffer, returning a reference to the module via the OutModule parameter. Returns 0 on success. Optionally returns a human-readable error message via OutMessage. */ -int LLVMParseBitcode(LLVMMemoryBufferRef MemBuf, +int LLVMParseBitcode(LLVMMemoryBufferRef MemBuf, LLVMContextRef ContextRef, LLVMModuleRef *OutModule, char **OutMessage); /* Reads a module from the specified path, returning via the OutMP parameter a module provider which performs lazy deserialization. Returns 0 on success. Optionally returns a human-readable error message via OutMessage. */ int LLVMGetBitcodeModuleProvider(LLVMMemoryBufferRef MemBuf, + LLVMContextRef ContextRef, LLVMModuleProviderRef *OutMP, char **OutMessage); We really don't want to change the C APIs. This will break bindings and cause other problems. Please retain these entry-points (calling through here will default to using the "global" context). If someone wants to enhance the C apis to support multiple contexts, they can add new C api entrypoints in the future. Otherwise, looks great, please commit with these changes. Thanks Owen, -Chris From clattner at apple.com Wed Jul 1 00:31:29 2009 From: clattner at apple.com (Chris Lattner) Date: Tue, 30 Jun 2009 22:31:29 -0700 Subject: [llvm-commits] [llvm] r74564 - in /llvm/trunk: include/llvm/CodeGen/ include/llvm/Target/ lib/CodeGen/ lib/Target/ARM/ lib/Target/ARM/AsmPrinter/ lib/Target/Alpha/ lib/Target/Alpha/AsmPrinter/ lib/Target/CellSPU/ lib/Target/CellSPU/AsmPrinter/ lib/Target/IA64/ lib/Target/IA64/AsmPrinter/ lib/Target/MSP430/ lib/Target/Mips/ lib/Target/Mips/AsmPrinter/ lib/Target/PIC16/ lib/Target/PowerPC/ lib/Target/PowerPC/AsmPrinter/ lib/Target/Sparc/ lib/Target/Sparc/AsmPrinter/ lib/Target/X86/ lib/Target/X86/AsmPrinter/ lib/Target/X... In-Reply-To: <200906302238.n5UMcY5I031037@zion.cs.uiuc.edu> References: <200906302238.n5UMcY5I031037@zion.cs.uiuc.edu> Message-ID: <67A5DA74-7D6E-44EA-8541-DC57E9A99955@apple.com> On Jun 30, 2009, at 3:38 PM, Bill Wendling wrote: > Author: void > Date: Tue Jun 30 17:38:32 2009 > New Revision: 74564 > > URL: http://llvm.org/viewvc/llvm-project?rev=74564&view=rev > Log: > Add an "alignment" field to the MachineFunction object. It makes > more sense to > have the alignment be calculated up front, and have the back-ends > obey whatever > alignment is decided upon. Nice, thank you for doing this Bill. Please document very clearly in the APIs that the alignment is the log2 of the alignment, not the alignment in bytes. -Chris From clattner at apple.com Wed Jul 1 00:34:16 2009 From: clattner at apple.com (Chris Lattner) Date: Tue, 30 Jun 2009 22:34:16 -0700 Subject: [llvm-commits] [patch] cmake target lib dependencies chain update in order to build examples In-Reply-To: <4A4A0990.9020203@zafena.se> References: <4A4A0990.9020203@zafena.se> Message-ID: <8B685618-B3A3-45A6-8B7A-D64D138010F6@apple.com> On Jun 30, 2009, at 5:48 AM, Xerxes R?nby wrote: > Problem using cmake with -DLLVM_EXAMPLES:BOOL=ON : > [ 99%] Built target HowToUseJIT > Linking CXX executable ../../bin/Kaleidoscope > ../../lib/libLLVMX86CodeGen.a(X86TargetMachine.cpp.o): In function > `llvm::X86TargetMachine::addInstSelector(llvm::PassManagerBase&, > llvm::CodeGenOpt::Level)': > X86TargetMachine.cpp:(.text+0x720): undefined reference to > `llvm::EnableFastISel' > X86TargetMachine.cpp:(.text+0x733): undefined reference to > `llvm::createDeadMachineInstructionElimPass()' > ../../lib/libLLVMX86CodeGen.a(X86TargetMachine.cpp.o): In function > `llvm::X86TargetLowering::~X86TargetLowering()': > X86TargetMachine.cpp: > (.text > ._ZN4llvm17X86TargetLoweringD1Ev > [llvm::X86TargetLowering::~X86TargetLowering()]+0x17): undefined > reference to `llvm::TargetLowering::~TargetLowering()' > ../../lib/libLLVMX86CodeGen.a(X86TargetMachine.cpp.o): In function > `llvm::TargetInstrInfoImpl::~TargetInstrInfoImpl()': > X86TargetMachine.cpp: > (.text > ._ZN4llvm19TargetInstrInfoImplD2Ev > [llvm::TargetInstrInfoImpl::~TargetInstrInfoImpl()]+0x7): undefined > reference to `vtable for llvm::TargetInstrInfoImpl' > ../../lib/libLLVMX86CodeGen.a(X86TargetMachine.cpp.o): In function > `llvm::LLVMTargetMachine::~LLVMTargetMachine()': > X86TargetMachine.cpp: > (.text > ._ZN4llvm17LLVMTargetMachineD2Ev > [llvm::LLVMTargetMachine::~LLVMTargetMachine()]+0x7): undefined > reference to `vtable for llvm::LLVMTargetMachine' > > The patch updates all targets with codegen and asmprinter to deal > with this issue. This looks good to me, if it's ok with Doug. However, please attach the patch as an attachment so that we can apply it easily. Thanks! -Chris From clattner at apple.com Wed Jul 1 00:42:16 2009 From: clattner at apple.com (Chris Lattner) Date: Tue, 30 Jun 2009 22:42:16 -0700 Subject: [llvm-commits] [llvm] r73201 - in /llvm/trunk: include/llvm/Target/TargetELFWriterInfo.h lib/CodeGen/ELF.h lib/CodeGen/ELFCodeEmitter.cpp lib/CodeGen/ELFWriter.cpp lib/CodeGen/ELFWriter.h lib/Target/X86/X86ELFWriterInfo.cpp lib/Target/X86/X86ELFWriterInfo.h lib/Target/X86/X86TargetMachine.cpp In-Reply-To: <200906111916.n5BJG4DN001215@zion.cs.uiuc.edu> References: <200906111916.n5BJG4DN001215@zion.cs.uiuc.edu> Message-ID: On Jun 11, 2009, at 12:16 PM, Bruno Cardoso Lopes wrote: > URL: http://llvm.org/viewvc/llvm-project?rev=73201&view=rev > Log: > Support for ELF Visibility > Emission for globals, using the correct data sections > Function alignment can be computed for each target using > TargetELFWriterInfo > Some small fixes Nice. > +++ llvm/trunk/include/llvm/Target/TargetELFWriterInfo.h Thu Jun 11 > 14:16:03 2009 > @@ -14,6 +14,10 @@ > #ifndef LLVM_TARGET_TARGETELFWRITERINFO_H > #define LLVM_TARGET_TARGETELFWRITERINFO_H > > +#include "llvm/Target/TargetData.h" > +#include "llvm/Target/TargetMachine.h" > +#include "llvm/Function.h" Is it possible to forward declare this stuff instead of including it? If you move the getFunctionAlignment method out of line it will help. > + /// getFunctionAlignment - Returns the alignment for function > 'F', targets > + /// with different alignment constraints should overload this > method > + virtual unsigned getFunctionAlignment(const Function *F) const { > + const TargetData *TD = TM.getTargetData(); > + unsigned FnAlign = F->getAlignment(); > + unsigned TDAlign = TD->getPointerABIAlignment(); > + unsigned Align = std::max(FnAlign, TDAlign); > + assert(!(Align & (Align-1)) && "Alignment is not a power of > two!"); > + return Align; Bill just committed a patch to move Function Alignment information into MachineFunction. Can you change this to just read that information instead of inferring an alignment in the writer-specific code? > +++ llvm/trunk/lib/CodeGen/ELF.h Thu Jun 11 14:16:03 2009 > @@ -21,12 +21,12 @@ > #ifndef CODEGEN_ELF_H > #define CODEGEN_ELF_H > > +#include "llvm/GlobalVariable.h" > #include "llvm/CodeGen/MachineRelocation.h" > #include "llvm/Support/DataTypes.h" > #include Likewise, please try to shrink down #includes where possible. This should not need to include GlobalVariable.h. Thanks Bruno! -Chris From daniel at zuster.org Wed Jul 1 01:02:54 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Wed, 01 Jul 2009 06:02:54 -0000 Subject: [llvm-commits] [compiler-rt] r74586 - /compiler-rt/trunk/lib/enable_execute_stack.c Message-ID: <200907010602.n6162scK012785@zion.cs.uiuc.edu> Author: ddunbar Date: Wed Jul 1 01:02:53 2009 New Revision: 74586 URL: http://llvm.org/viewvc/llvm-project?rev=74586&view=rev Log: Use getpagesize() on non-Darwin platforms. - Presumably we will eventually need configure magic for this stuff. Modified: compiler-rt/trunk/lib/enable_execute_stack.c Modified: compiler-rt/trunk/lib/enable_execute_stack.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/enable_execute_stack.c?rev=74586&r1=74585&r2=74586&view=diff ============================================================================== --- compiler-rt/trunk/lib/enable_execute_stack.c (original) +++ compiler-rt/trunk/lib/enable_execute_stack.c Wed Jul 1 01:02:53 2009 @@ -24,7 +24,8 @@ // On Darwin, pagesize is always 4096 bytes const uintptr_t pageSize = 4096; #else - abort(); + // FIXME: We should have a configure check for this. + const uintptr_t pagesize = getpagesize(); #endif const uintptr_t pageAlignMask = ~(pageSize-1); uintptr_t p = (uintptr_t)addr; From daniel at zuster.org Wed Jul 1 01:04:04 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Wed, 01 Jul 2009 06:04:04 -0000 Subject: [llvm-commits] [compiler-rt] r74587 - in /compiler-rt/trunk/lib: i386/ ppc/ x86_64/ Message-ID: <200907010604.n61644to012840@zion.cs.uiuc.edu> Author: ddunbar Date: Wed Jul 1 01:04:03 2009 New Revision: 74587 URL: http://llvm.org/viewvc/llvm-project?rev=74587&view=rev Log: Fix a Darwinism, .s files meant to be preprocessed should be named .S. Added: compiler-rt/trunk/lib/i386/ashldi3.S (props changed) - copied unchanged from r74585, compiler-rt/trunk/lib/i386/ashldi3.s compiler-rt/trunk/lib/i386/ashrdi3.S (props changed) - copied unchanged from r74585, compiler-rt/trunk/lib/i386/ashrdi3.s compiler-rt/trunk/lib/i386/divdi3.S (props changed) - copied unchanged from r74585, compiler-rt/trunk/lib/i386/divdi3.s compiler-rt/trunk/lib/i386/floatdidf.S (props changed) - copied unchanged from r74585, compiler-rt/trunk/lib/i386/floatdidf.s compiler-rt/trunk/lib/i386/floatdisf.S (props changed) - copied unchanged from r74585, compiler-rt/trunk/lib/i386/floatdisf.s compiler-rt/trunk/lib/i386/floatdixf.S (props changed) - copied unchanged from r74585, compiler-rt/trunk/lib/i386/floatdixf.s compiler-rt/trunk/lib/i386/floatundidf.S (props changed) - copied unchanged from r74585, compiler-rt/trunk/lib/i386/floatundidf.s compiler-rt/trunk/lib/i386/floatundisf.S (props changed) - copied unchanged from r74585, compiler-rt/trunk/lib/i386/floatundisf.s compiler-rt/trunk/lib/i386/floatundixf.S (props changed) - copied unchanged from r74585, compiler-rt/trunk/lib/i386/floatundixf.s compiler-rt/trunk/lib/i386/lshrdi3.S (props changed) - copied unchanged from r74585, compiler-rt/trunk/lib/i386/lshrdi3.s compiler-rt/trunk/lib/i386/moddi3.S (props changed) - copied unchanged from r74585, compiler-rt/trunk/lib/i386/moddi3.s compiler-rt/trunk/lib/i386/muldi3.S (props changed) - copied unchanged from r74585, compiler-rt/trunk/lib/i386/muldi3.s compiler-rt/trunk/lib/i386/udivdi3.S (props changed) - copied unchanged from r74585, compiler-rt/trunk/lib/i386/udivdi3.s compiler-rt/trunk/lib/i386/umoddi3.S (props changed) - copied unchanged from r74585, compiler-rt/trunk/lib/i386/umoddi3.s compiler-rt/trunk/lib/ppc/restFP.S (props changed) - copied unchanged from r74585, compiler-rt/trunk/lib/ppc/restFP.s compiler-rt/trunk/lib/ppc/saveFP.S (props changed) - copied unchanged from r74585, compiler-rt/trunk/lib/ppc/saveFP.s compiler-rt/trunk/lib/x86_64/floatundidf.S (props changed) - copied unchanged from r74585, compiler-rt/trunk/lib/x86_64/floatundidf.s compiler-rt/trunk/lib/x86_64/floatundisf.S (props changed) - copied unchanged from r74585, compiler-rt/trunk/lib/x86_64/floatundisf.s compiler-rt/trunk/lib/x86_64/floatundixf.S (props changed) - copied unchanged from r74585, compiler-rt/trunk/lib/x86_64/floatundixf.s Removed: compiler-rt/trunk/lib/i386/ashldi3.s compiler-rt/trunk/lib/i386/ashrdi3.s compiler-rt/trunk/lib/i386/divdi3.s compiler-rt/trunk/lib/i386/floatdidf.s compiler-rt/trunk/lib/i386/floatdisf.s compiler-rt/trunk/lib/i386/floatdixf.s compiler-rt/trunk/lib/i386/floatundidf.s compiler-rt/trunk/lib/i386/floatundisf.s compiler-rt/trunk/lib/i386/floatundixf.s compiler-rt/trunk/lib/i386/lshrdi3.s compiler-rt/trunk/lib/i386/moddi3.s compiler-rt/trunk/lib/i386/muldi3.s compiler-rt/trunk/lib/i386/udivdi3.s compiler-rt/trunk/lib/i386/umoddi3.s compiler-rt/trunk/lib/ppc/restFP.s compiler-rt/trunk/lib/ppc/saveFP.s compiler-rt/trunk/lib/x86_64/floatundidf.s compiler-rt/trunk/lib/x86_64/floatundisf.s compiler-rt/trunk/lib/x86_64/floatundixf.s Propchange: compiler-rt/trunk/lib/i386/ashldi3.S ------------------------------------------------------------------------------ svn:mergeinfo = Removed: compiler-rt/trunk/lib/i386/ashldi3.s URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/i386/ashldi3.s?rev=74586&view=auto ============================================================================== --- compiler-rt/trunk/lib/i386/ashldi3.s (original) +++ compiler-rt/trunk/lib/i386/ashldi3.s (removed) @@ -1,65 +0,0 @@ -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. - -// di_int __ashldi3(di_int input, int count); - -// This routine has some extra memory traffic, loading the 64-bit input via two -// 32-bit loads, then immediately storing it back to the stack via a single 64-bit -// store. This is to avoid a write-small, read-large stall. -// However, if callers of this routine can be safely assumed to store the argument -// via a 64-bt store, this is unnecessary memory traffic, and should be avoided. -// It can be turned off by defining the TRUST_CALLERS_USE_64_BIT_STORES macro. - -#ifdef __i386__ -#ifdef __SSE2__ - -.text -.align 4 -.globl ___ashldi3 -___ashldi3: - movd 12(%esp), %xmm2 // Load count -#ifndef TRUST_CALLERS_USE_64_BIT_STORES - movd 4(%esp), %xmm0 - movd 8(%esp), %xmm1 - punpckldq %xmm1, %xmm0 // Load input -#else - movq 4(%esp), %xmm0 // Load input -#endif - psllq %xmm2, %xmm0 // shift input by count - movd %xmm0, %eax - psrlq $32, %xmm0 - movd %xmm0, %edx - ret - -#else // Use GPRs instead of SSE2 instructions, if they aren't available. - -.text -.align 4 -.globl ___ashldi3 -___ashldi3: - movl 12(%esp), %ecx // Load count - movl 8(%esp), %edx // Load high - movl 4(%esp), %eax // Load low - - testl $0x20, %ecx // If count >= 32 - jnz 2f // goto 2 - testl $0x1f, %ecx // If count == 0 - jz 1f // goto 1 - - pushl %ebx - movl %eax, %ebx // copy low - shll %cl, %eax // left shift low by count - shll %cl, %edx // left shift high by count - neg %cl - shrl %cl, %ebx // right shift low by 32 - count - orl %ebx, %edx // or the result into the high word - popl %ebx -1: ret - -2: movl %eax, %edx // Move low to high - xorl %eax, %eax // clear low - shll %cl, %edx // shift high by count - 32 - ret - -#endif // __SSE2__ -#endif // __i386__ Propchange: compiler-rt/trunk/lib/i386/ashrdi3.S ------------------------------------------------------------------------------ svn:mergeinfo = Removed: compiler-rt/trunk/lib/i386/ashrdi3.s URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/i386/ashrdi3.s?rev=74586&view=auto ============================================================================== --- compiler-rt/trunk/lib/i386/ashrdi3.s (original) +++ compiler-rt/trunk/lib/i386/ashrdi3.s (removed) @@ -1,75 +0,0 @@ -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. - -// di_int __ashrdi3(di_int input, int count); - -#ifdef __i386__ -#ifdef __SSE2__ - -.text -.align 4 -.globl ___ashrdi3 -___ashrdi3: - movd 12(%esp), %xmm2 // Load count - movl 8(%esp), %eax -#ifndef TRUST_CALLERS_USE_64_BIT_STORES - movd 4(%esp), %xmm0 - movd 8(%esp), %xmm1 - punpckldq %xmm1, %xmm0 // Load input -#else - movq 4(%esp), %xmm0 // Load input -#endif - - psrlq %xmm2, %xmm0 // unsigned shift input by count - - testl %eax, %eax // check the sign-bit of the input - jns 1f // early out for positive inputs - - // If the input is negative, we need to construct the shifted sign bit - // to or into the result, as xmm does not have a signed right shift. - pcmpeqb %xmm1, %xmm1 // -1ULL - psrlq $58, %xmm1 // 0x3f - pandn %xmm1, %xmm2 // 63 - count - pcmpeqb %xmm1, %xmm1 // -1ULL - psubq %xmm1, %xmm2 // 64 - count - psllq %xmm2, %xmm1 // -1 << (64 - count) = leading sign bits - por %xmm1, %xmm0 - - // Move the result back to the general purpose registers and return -1: movd %xmm0, %eax - psrlq $32, %xmm0 - movd %xmm0, %edx - ret - -#else // Use GPRs instead of SSE2 instructions, if they aren't available. - -.text -.align 4 -.globl ___ashrdi3 -___ashrdi3: - movl 12(%esp), %ecx // Load count - movl 8(%esp), %edx // Load high - movl 4(%esp), %eax // Load low - - testl $0x20, %ecx // If count >= 32 - jnz 2f // goto 2 - testl $0x1f, %ecx // If count == 0 - jz 1f // goto 1 - - pushl %ebx - movl %edx, %ebx // copy high - shrl %cl, %eax // right shift low by count - sarl %cl, %edx // right shift high by count - neg %cl - shll %cl, %ebx // left shift high by 32 - count - orl %ebx, %eax // or the result into the low word - popl %ebx -1: ret - -2: movl %edx, %eax // Move high to low - sarl $31, %edx // clear high - sarl %cl, %eax // shift low by count - 32 - ret - -#endif // __SSE2__ -#endif // __i386__ Propchange: compiler-rt/trunk/lib/i386/divdi3.S ------------------------------------------------------------------------------ svn:mergeinfo = Removed: compiler-rt/trunk/lib/i386/divdi3.s URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/i386/divdi3.s?rev=74586&view=auto ============================================================================== --- compiler-rt/trunk/lib/i386/divdi3.s (original) +++ compiler-rt/trunk/lib/i386/divdi3.s (removed) @@ -1,160 +0,0 @@ -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. - -// di_int __divdi3(di_int a, di_int b); - -// result = a / b. -// both inputs and the output are 64-bit signed integers. -// This will do whatever the underlying hardware is set to do on division by zero. -// No other exceptions are generated, as the divide cannot overflow. -// -// This is targeted at 32-bit x86 *only*, as this can be done directly in hardware -// on x86_64. The performance goal is ~40 cycles per divide, which is faster than -// currently possible via simulation of integer divides on the x87 unit. -// -// Stephen Canon, December 2008 - -#ifdef __i386__ - -.text -.align 4 -.globl ___divdi3 -___divdi3: - -/* This is currently implemented by wrapping the unsigned divide up in an absolute - value, then restoring the correct sign at the end of the computation. This could - certainly be improved upon. */ - - pushl %esi - movl 20(%esp), %edx // high word of b - movl 16(%esp), %eax // low word of b - movl %edx, %ecx - sarl $31, %ecx // (b < 0) ? -1 : 0 - xorl %ecx, %eax - xorl %ecx, %edx // EDX:EAX = (b < 0) ? not(b) : b - subl %ecx, %eax - sbbl %ecx, %edx // EDX:EAX = abs(b) - movl %edx, 20(%esp) - movl %eax, 16(%esp) // store abs(b) back to stack - movl %ecx, %esi // set aside sign of b - - movl 12(%esp), %edx // high word of b - movl 8(%esp), %eax // low word of b - movl %edx, %ecx - sarl $31, %ecx // (a < 0) ? -1 : 0 - xorl %ecx, %eax - xorl %ecx, %edx // EDX:EAX = (a < 0) ? not(a) : a - subl %ecx, %eax - sbbl %ecx, %edx // EDX:EAX = abs(a) - movl %edx, 12(%esp) - movl %eax, 8(%esp) // store abs(a) back to stack - xorl %ecx, %esi // sign of result = (sign of a) ^ (sign of b) - - pushl %ebx - movl 24(%esp), %ebx // Find the index i of the leading bit in b. - bsrl %ebx, %ecx // If the high word of b is zero, jump to - jz 9f // the code to handle that special case [9]. - - /* High word of b is known to be non-zero on this branch */ - - movl 20(%esp), %eax // Construct bhi, containing bits [1+i:32+i] of b - - shrl %cl, %eax // Practically, this means that bhi is given by: - shrl %eax // - notl %ecx // bhi = (high word of b) << (31 - i) | - shll %cl, %ebx // (low word of b) >> (1 + i) - orl %eax, %ebx // - movl 16(%esp), %edx // Load the high and low words of a, and jump - movl 12(%esp), %eax // to [1] if the high word is larger than bhi - cmpl %ebx, %edx // to avoid overflowing the upcoming divide. - jae 1f - - /* High word of a is greater than or equal to (b >> (1 + i)) on this branch */ - - divl %ebx // eax <-- qs, edx <-- r such that ahi:alo = bs*qs + r - - pushl %edi - notl %ecx - shrl %eax - shrl %cl, %eax // q = qs >> (1 + i) - movl %eax, %edi - mull 24(%esp) // q*blo - movl 16(%esp), %ebx - movl 20(%esp), %ecx // ECX:EBX = a - subl %eax, %ebx - sbbl %edx, %ecx // ECX:EBX = a - q*blo - movl 28(%esp), %eax - imull %edi, %eax // q*bhi - subl %eax, %ecx // ECX:EBX = a - q*b - sbbl $0, %edi // decrement q if remainder is negative - xorl %edx, %edx - movl %edi, %eax - - addl %esi, %eax // Restore correct sign to result - adcl %esi, %edx - xorl %esi, %eax - xorl %esi, %edx - popl %edi // Restore callee-save registers - popl %ebx - popl %esi - retl // Return - - -1: /* High word of a is greater than or equal to (b >> (1 + i)) on this branch */ - - subl %ebx, %edx // subtract bhi from ahi so that divide will not - divl %ebx // overflow, and find q and r such that - // - // ahi:alo = (1:q)*bhi + r - // - // Note that q is a number in (31-i).(1+i) - // fix point. - - pushl %edi - notl %ecx - shrl %eax - orl $0x80000000, %eax - shrl %cl, %eax // q = (1:qs) >> (1 + i) - movl %eax, %edi - mull 24(%esp) // q*blo - movl 16(%esp), %ebx - movl 20(%esp), %ecx // ECX:EBX = a - subl %eax, %ebx - sbbl %edx, %ecx // ECX:EBX = a - q*blo - movl 28(%esp), %eax - imull %edi, %eax // q*bhi - subl %eax, %ecx // ECX:EBX = a - q*b - sbbl $0, %edi // decrement q if remainder is negative - xorl %edx, %edx - movl %edi, %eax - - addl %esi, %eax // Restore correct sign to result - adcl %esi, %edx - xorl %esi, %eax - xorl %esi, %edx - popl %edi // Restore callee-save registers - popl %ebx - popl %esi - retl // Return - - -9: /* High word of b is zero on this branch */ - - movl 16(%esp), %eax // Find qhi and rhi such that - movl 20(%esp), %ecx // - xorl %edx, %edx // ahi = qhi*b + rhi with 0 ??? rhi < b - divl %ecx // - movl %eax, %ebx // - movl 12(%esp), %eax // Find qlo such that - divl %ecx // - movl %ebx, %edx // rhi:alo = qlo*b + rlo with 0 ??? rlo < b - - addl %esi, %eax // Restore correct sign to result - adcl %esi, %edx - xorl %esi, %eax - xorl %esi, %edx - popl %ebx // Restore callee-save registers - popl %esi - retl // Return - -#endif // __i386__ Propchange: compiler-rt/trunk/lib/i386/floatdidf.S ------------------------------------------------------------------------------ svn:mergeinfo = Removed: compiler-rt/trunk/lib/i386/floatdidf.s URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/i386/floatdidf.s?rev=74586&view=auto ============================================================================== --- compiler-rt/trunk/lib/i386/floatdidf.s (original) +++ compiler-rt/trunk/lib/i386/floatdidf.s (removed) @@ -1,32 +0,0 @@ -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. - -// double __floatundidf(du_int a); - -#ifdef __i386__ - -.const -.align 4 -twop52: .quad 0x4330000000000000 -twop32: .quad 0x41f0000000000000 - -#define REL_ADDR(_a) (_a)-0b(%eax) - -.text -.align 4 -.globl ___floatdidf -___floatdidf: - cvtsi2sd 8(%esp), %xmm1 - movss 4(%esp), %xmm0 // low 32 bits of a - calll 0f -0: popl %eax - mulsd REL_ADDR(twop32), %xmm1 // a_hi as a double (without rounding) - movsd REL_ADDR(twop52), %xmm2 // 0x1.0p52 - subsd %xmm2, %xmm1 // a_hi - 0x1p52 (no rounding occurs) - orpd %xmm2, %xmm0 // 0x1p52 + a_lo (no rounding occurs) - addsd %xmm1, %xmm0 // a_hi + a_lo (round happens here) - movsd %xmm0, 4(%esp) - fldl 4(%esp) - ret - -#endif // __i386__ Propchange: compiler-rt/trunk/lib/i386/floatdisf.S ------------------------------------------------------------------------------ svn:mergeinfo = Removed: compiler-rt/trunk/lib/i386/floatdisf.s URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/i386/floatdisf.s?rev=74586&view=auto ============================================================================== --- compiler-rt/trunk/lib/i386/floatdisf.s (original) +++ compiler-rt/trunk/lib/i386/floatdisf.s (removed) @@ -1,30 +0,0 @@ -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. - -// float __floatdisf(di_int a); - -// This routine has some extra memory traffic, loading the 64-bit input via two -// 32-bit loads, then immediately storing it back to the stack via a single 64-bit -// store. This is to avoid a write-small, read-large stall. -// However, if callers of this routine can be safely assumed to store the argument -// via a 64-bt store, this is unnecessary memory traffic, and should be avoided. -// It can be turned off by defining the TRUST_CALLERS_USE_64_BIT_STORES macro. - -#ifdef __i386__ - -.text -.align 4 -.globl ___floatdisf -___floatdisf: -#ifndef TRUST_CALLERS_USE_64_BIT_STORES - movd 4(%esp), %xmm0 - movd 8(%esp), %xmm1 - punpckldq %xmm1, %xmm0 - movq %xmm0, 4(%esp) -#endif - fildll 4(%esp) - fstps 4(%esp) - flds 4(%esp) - ret - -#endif // __i386__ Propchange: compiler-rt/trunk/lib/i386/floatdixf.S ------------------------------------------------------------------------------ svn:mergeinfo = Removed: compiler-rt/trunk/lib/i386/floatdixf.s URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/i386/floatdixf.s?rev=74586&view=auto ============================================================================== --- compiler-rt/trunk/lib/i386/floatdixf.s (original) +++ compiler-rt/trunk/lib/i386/floatdixf.s (removed) @@ -1,28 +0,0 @@ -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. - -// float __floatdixf(di_int a); - -#ifdef __i386__ - -// This routine has some extra memory traffic, loading the 64-bit input via two -// 32-bit loads, then immediately storing it back to the stack via a single 64-bit -// store. This is to avoid a write-small, read-large stall. -// However, if callers of this routine can be safely assumed to store the argument -// via a 64-bt store, this is unnecessary memory traffic, and should be avoided. -// It can be turned off by defining the TRUST_CALLERS_USE_64_BIT_STORES macro. - -.text -.align 4 -.globl ___floatdixf -___floatdixf: -#ifndef TRUST_CALLERS_USE_64_BIT_STORES - movd 4(%esp), %xmm0 - movd 8(%esp), %xmm1 - punpckldq %xmm1, %xmm0 - movq %xmm0, 4(%esp) -#endif - fildll 4(%esp) - ret - -#endif // __i386__ \ No newline at end of file Propchange: compiler-rt/trunk/lib/i386/floatundidf.S ------------------------------------------------------------------------------ svn:mergeinfo = Removed: compiler-rt/trunk/lib/i386/floatundidf.s URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/i386/floatundidf.s?rev=74586&view=auto ============================================================================== --- compiler-rt/trunk/lib/i386/floatundidf.s (original) +++ compiler-rt/trunk/lib/i386/floatundidf.s (removed) @@ -1,43 +0,0 @@ -//===-- floatundidf.s - Implement __floatundidf for i386 ------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __floatundidf for the compiler_rt library. -// -//===----------------------------------------------------------------------===// - -// double __floatundidf(du_int a); - -#ifdef __i386__ - -.const -.align 4 -twop52: .quad 0x4330000000000000 -twop84_plus_twop52: - .quad 0x4530000000100000 -twop84: .quad 0x4530000000000000 - -#define REL_ADDR(_a) (_a)-0b(%eax) - -.text -.align 4 -.globl ___floatundidf -___floatundidf: - movss 8(%esp), %xmm1 // high 32 bits of a - movss 4(%esp), %xmm0 // low 32 bits of a - calll 0f -0: popl %eax - orpd REL_ADDR(twop84), %xmm1 // 0x1p84 + a_hi (no rounding occurs) - subsd REL_ADDR(twop84_plus_twop52), %xmm1 // a_hi - 0x1p52 (no rounding occurs) - orpd REL_ADDR(twop52), %xmm0 // 0x1p52 + a_lo (no rounding occurs) - addsd %xmm1, %xmm0 // a_hi + a_lo (round happens here) - movsd %xmm0, 4(%esp) - fldl 4(%esp) - ret - -#endif // __i386__ Propchange: compiler-rt/trunk/lib/i386/floatundisf.S ------------------------------------------------------------------------------ svn:mergeinfo = Removed: compiler-rt/trunk/lib/i386/floatundisf.s URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/i386/floatundisf.s?rev=74586&view=auto ============================================================================== --- compiler-rt/trunk/lib/i386/floatundisf.s (original) +++ compiler-rt/trunk/lib/i386/floatundisf.s (removed) @@ -1,95 +0,0 @@ -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. - -// float __floatundisf(du_int a); - -// Note that there is a hardware instruction, fildll, that does most of what -// this function needs to do. However, because of our ia32 ABI, it will take -// a write-small read-large stall, so the software implementation here is -// actually several cycles faster. - -// This is a branch-free implementation. A branchy implementation might be -// faster for the common case if you know something a priori about the input -// distribution. - -/* branch-free x87 implementation - one cycle slower than without x87. - -#ifdef __i386__ - -.const -.align 3 - - .quad 0x43f0000000000000 -twop64: .quad 0x0000000000000000 - -#define TWOp64 twop64-0b(%ecx,%eax,8) - -.text -.align 4 -.globl ___floatundisf -___floatundisf: - movl 8(%esp), %eax - movd 8(%esp), %xmm1 - movd 4(%esp), %xmm0 - punpckldq %xmm1, %xmm0 - calll 0f -0: popl %ecx - sarl $31, %eax - movq %xmm0, 4(%esp) - fildll 4(%esp) - faddl TWOp64 - fstps 4(%esp) - flds 4(%esp) - ret - -#endif // __i386__ - -*/ - -/* branch-free, x87-free implementation - faster at the expense of code size */ - -#ifdef __i386__ - -.const -.align 3 -twop52: .quad 0x4330000000000000 - .quad 0x0000000000000fff -sticky: .quad 0x0000000000000000 - .long 0x00000012 -twelve: .long 0x00000000 - -#define TWOp52 twop52-0b(%ecx) -#define STICKY sticky-0b(%ecx,%eax,8) - -.text -.align 4 -.globl ___floatundisf -___floatundisf: - movl 8(%esp), %eax - movd 8(%esp), %xmm1 - movd 4(%esp), %xmm0 - punpckldq %xmm1, %xmm0 - - calll 0f -0: popl %ecx - shrl %eax // high 31 bits of input as sint32 - addl $0x7ff80000, %eax - sarl $31, %eax // (big input) ? -1 : 0 - movsd STICKY, %xmm1 // (big input) ? 0xfff : 0 - movl $12, %edx - andl %eax, %edx // (big input) ? 12 : 0 - movd %edx, %xmm3 - andpd %xmm0, %xmm1 // (big input) ? input & 0xfff : 0 - movsd TWOp52, %xmm2 // 0x1.0p52 - psrlq %xmm3, %xmm0 // (big input) ? input >> 12 : input - orpd %xmm2, %xmm1 // 0x1.0p52 + ((big input) ? input & 0xfff : input) - orpd %xmm1, %xmm0 // 0x1.0p52 + ((big input) ? (input >> 12 | input & 0xfff) : input) - subsd %xmm2, %xmm0 // (double)((big input) ? (input >> 12 | input & 0xfff) : input) - cvtsd2ss %xmm0, %xmm0 // (float)((big input) ? (input >> 12 | input & 0xfff) : input) - pslld $23, %xmm3 - paddd %xmm3, %xmm0 // (float)input - movd %xmm0, 4(%esp) - flds 4(%esp) - ret - -#endif // __i386__ Propchange: compiler-rt/trunk/lib/i386/floatundixf.S ------------------------------------------------------------------------------ svn:mergeinfo = Removed: compiler-rt/trunk/lib/i386/floatundixf.s URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/i386/floatundixf.s?rev=74586&view=auto ============================================================================== --- compiler-rt/trunk/lib/i386/floatundixf.s (original) +++ compiler-rt/trunk/lib/i386/floatundixf.s (removed) @@ -1,34 +0,0 @@ -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. - -// long double __floatundixf(du_int a);16 - -#ifdef __i386__ - -.const -.align 4 -twop52: .quad 0x4330000000000000 -twop84_plus_twop52_neg: - .quad 0xc530000000100000 -twop84: .quad 0x4530000000000000 - -#define REL_ADDR(_a) (_a)-0b(%eax) - -.text -.align 4 -.globl ___floatundixf -___floatundixf: - calll 0f -0: popl %eax - movss 8(%esp), %xmm0 // hi 32 bits of input - movss 4(%esp), %xmm1 // lo 32 bits of input - orpd REL_ADDR(twop84), %xmm0 // 2^84 + hi (as a double) - orpd REL_ADDR(twop52), %xmm1 // 2^52 + lo (as a double) - addsd REL_ADDR(twop84_plus_twop52_neg), %xmm0 // hi - 2^52 (no rounding occurs) - movsd %xmm1, 4(%esp) - fldl 4(%esp) - movsd %xmm0, 4(%esp) - faddl 4(%esp) - ret - -#endif // __i386__ \ No newline at end of file Propchange: compiler-rt/trunk/lib/i386/lshrdi3.S ------------------------------------------------------------------------------ svn:mergeinfo = Removed: compiler-rt/trunk/lib/i386/lshrdi3.s URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/i386/lshrdi3.s?rev=74586&view=auto ============================================================================== --- compiler-rt/trunk/lib/i386/lshrdi3.s (original) +++ compiler-rt/trunk/lib/i386/lshrdi3.s (removed) @@ -1,65 +0,0 @@ -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. - -// di_int __lshrdi3(di_int input, int count); - -// This routine has some extra memory traffic, loading the 64-bit input via two -// 32-bit loads, then immediately storing it back to the stack via a single 64-bit -// store. This is to avoid a write-small, read-large stall. -// However, if callers of this routine can be safely assumed to store the argument -// via a 64-bt store, this is unnecessary memory traffic, and should be avoided. -// It can be turned off by defining the TRUST_CALLERS_USE_64_BIT_STORES macro. - -#ifdef __i386__ -#ifdef __SSE2__ - -.text -.align 4 -.globl ___lshrdi3 -___lshrdi3: - movd 12(%esp), %xmm2 // Load count -#ifndef TRUST_CALLERS_USE_64_BIT_STORES - movd 4(%esp), %xmm0 - movd 8(%esp), %xmm1 - punpckldq %xmm1, %xmm0 // Load input -#else - movq 4(%esp), %xmm0 // Load input -#endif - psrlq %xmm2, %xmm0 // shift input by count - movd %xmm0, %eax - psrlq $32, %xmm0 - movd %xmm0, %edx - ret - -#else // Use GPRs instead of SSE2 instructions, if they aren't available. - -.text -.align 4 -.globl ___lshrdi3 -___lshrdi3: - movl 12(%esp), %ecx // Load count - movl 8(%esp), %edx // Load high - movl 4(%esp), %eax // Load low - - testl $0x20, %ecx // If count >= 32 - jnz 2f // goto 2 - testl $0x1f, %ecx // If count == 0 - jz 1f // goto 1 - - pushl %ebx - movl %edx, %ebx // copy high - shrl %cl, %eax // right shift low by count - shrl %cl, %edx // right shift high by count - neg %cl - shll %cl, %ebx // left shift high by 32 - count - orl %ebx, %eax // or the result into the low word - popl %ebx -1: ret - -2: movl %edx, %eax // Move high to low - xorl %edx, %edx // clear high - shrl %cl, %eax // shift low by count - 32 - ret - -#endif // __SSE2__ -#endif // __i386__ Propchange: compiler-rt/trunk/lib/i386/moddi3.S ------------------------------------------------------------------------------ svn:mergeinfo = Removed: compiler-rt/trunk/lib/i386/moddi3.s URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/i386/moddi3.s?rev=74586&view=auto ============================================================================== --- compiler-rt/trunk/lib/i386/moddi3.s (original) +++ compiler-rt/trunk/lib/i386/moddi3.s (removed) @@ -1,165 +0,0 @@ -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. - -// di_int __moddi3(di_int a, di_int b); - -// result = remainder of a / b. -// both inputs and the output are 64-bit signed integers. -// This will do whatever the underlying hardware is set to do on division by zero. -// No other exceptions are generated, as the divide cannot overflow. -// -// This is targeted at 32-bit x86 *only*, as this can be done directly in hardware -// on x86_64. The performance goal is ~40 cycles per divide, which is faster than -// currently possible via simulation of integer divides on the x87 unit. -// - -// Stephen Canon, December 2008 - -#ifdef __i386__ - -.text -.align 4 -.globl ___moddi3 -___moddi3: - -/* This is currently implemented by wrapping the unsigned modulus up in an absolute - value. This could certainly be improved upon. */ - - pushl %esi - movl 20(%esp), %edx // high word of b - movl 16(%esp), %eax // low word of b - movl %edx, %ecx - sarl $31, %ecx // (b < 0) ? -1 : 0 - xorl %ecx, %eax - xorl %ecx, %edx // EDX:EAX = (b < 0) ? not(b) : b - subl %ecx, %eax - sbbl %ecx, %edx // EDX:EAX = abs(b) - movl %edx, 20(%esp) - movl %eax, 16(%esp) // store abs(b) back to stack - - movl 12(%esp), %edx // high word of b - movl 8(%esp), %eax // low word of b - movl %edx, %ecx - sarl $31, %ecx // (a < 0) ? -1 : 0 - xorl %ecx, %eax - xorl %ecx, %edx // EDX:EAX = (a < 0) ? not(a) : a - subl %ecx, %eax - sbbl %ecx, %edx // EDX:EAX = abs(a) - movl %edx, 12(%esp) - movl %eax, 8(%esp) // store abs(a) back to stack - movl %ecx, %esi // set aside sign of a - - pushl %ebx - movl 24(%esp), %ebx // Find the index i of the leading bit in b. - bsrl %ebx, %ecx // If the high word of b is zero, jump to - jz 9f // the code to handle that special case [9]. - - /* High word of b is known to be non-zero on this branch */ - - movl 20(%esp), %eax // Construct bhi, containing bits [1+i:32+i] of b - - shrl %cl, %eax // Practically, this means that bhi is given by: - shrl %eax // - notl %ecx // bhi = (high word of b) << (31 - i) | - shll %cl, %ebx // (low word of b) >> (1 + i) - orl %eax, %ebx // - movl 16(%esp), %edx // Load the high and low words of a, and jump - movl 12(%esp), %eax // to [2] if the high word is larger than bhi - cmpl %ebx, %edx // to avoid overflowing the upcoming divide. - jae 2f - - /* High word of a is greater than or equal to (b >> (1 + i)) on this branch */ - - divl %ebx // eax <-- qs, edx <-- r such that ahi:alo = bs*qs + r - - pushl %edi - notl %ecx - shrl %eax - shrl %cl, %eax // q = qs >> (1 + i) - movl %eax, %edi - mull 24(%esp) // q*blo - movl 16(%esp), %ebx - movl 20(%esp), %ecx // ECX:EBX = a - subl %eax, %ebx - sbbl %edx, %ecx // ECX:EBX = a - q*blo - movl 28(%esp), %eax - imull %edi, %eax // q*bhi - subl %eax, %ecx // ECX:EBX = a - q*b - - jnc 1f // if positive, this is the result. - addl 24(%esp), %ebx // otherwise - adcl 28(%esp), %ecx // ECX:EBX = a - (q-1)*b = result -1: movl %ebx, %eax - movl %ecx, %edx - - addl %esi, %eax // Restore correct sign to result - adcl %esi, %edx - xorl %esi, %eax - xorl %esi, %edx - popl %edi // Restore callee-save registers - popl %ebx - popl %esi - retl // Return - -2: /* High word of a is greater than or equal to (b >> (1 + i)) on this branch */ - - subl %ebx, %edx // subtract bhi from ahi so that divide will not - divl %ebx // overflow, and find q and r such that - // - // ahi:alo = (1:q)*bhi + r - // - // Note that q is a number in (31-i).(1+i) - // fix point. - - pushl %edi - notl %ecx - shrl %eax - orl $0x80000000, %eax - shrl %cl, %eax // q = (1:qs) >> (1 + i) - movl %eax, %edi - mull 24(%esp) // q*blo - movl 16(%esp), %ebx - movl 20(%esp), %ecx // ECX:EBX = a - subl %eax, %ebx - sbbl %edx, %ecx // ECX:EBX = a - q*blo - movl 28(%esp), %eax - imull %edi, %eax // q*bhi - subl %eax, %ecx // ECX:EBX = a - q*b - - jnc 3f // if positive, this is the result. - addl 24(%esp), %ebx // otherwise - adcl 28(%esp), %ecx // ECX:EBX = a - (q-1)*b = result -3: movl %ebx, %eax - movl %ecx, %edx - - addl %esi, %eax // Restore correct sign to result - adcl %esi, %edx - xorl %esi, %eax - xorl %esi, %edx - popl %edi // Restore callee-save registers - popl %ebx - popl %esi - retl // Return - -9: /* High word of b is zero on this branch */ - - movl 16(%esp), %eax // Find qhi and rhi such that - movl 20(%esp), %ecx // - xorl %edx, %edx // ahi = qhi*b + rhi with 0 ??? rhi < b - divl %ecx // - movl %eax, %ebx // - movl 12(%esp), %eax // Find rlo such that - divl %ecx // - movl %edx, %eax // rhi:alo = qlo*b + rlo with 0 ??? rlo < b - popl %ebx // - xorl %edx, %edx // and return 0:rlo - - addl %esi, %eax // Restore correct sign to result - adcl %esi, %edx - xorl %esi, %eax - xorl %esi, %edx - popl %esi - retl // Return - - -#endif // __i386__ Propchange: compiler-rt/trunk/lib/i386/muldi3.S ------------------------------------------------------------------------------ svn:mergeinfo = Removed: compiler-rt/trunk/lib/i386/muldi3.s URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/i386/muldi3.s?rev=74586&view=auto ============================================================================== --- compiler-rt/trunk/lib/i386/muldi3.s (original) +++ compiler-rt/trunk/lib/i386/muldi3.s (removed) @@ -1,28 +0,0 @@ -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. - -// di_int __muldi3(di_int a, di_int b); - -#ifdef __i386__ - -.text -.align 4 -.globl ___muldi3 -___muldi3: - pushl %ebx - movl 16(%esp), %eax // b.lo - movl 12(%esp), %ecx // a.hi - imull %eax, %ecx // b.lo * a.hi - - movl 8(%esp), %edx // a.lo - movl 20(%esp), %ebx // b.hi - imull %edx, %ebx // a.lo * b.hi - - mull %edx // EDX:EAX = a.lo * b.lo - addl %ecx, %ebx // EBX = (a.lo*b.hi + a.hi*b.lo) - addl %ebx, %edx - - popl %ebx - retl - -#endif // __i386__ Propchange: compiler-rt/trunk/lib/i386/udivdi3.S ------------------------------------------------------------------------------ svn:mergeinfo = Removed: compiler-rt/trunk/lib/i386/udivdi3.s URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/i386/udivdi3.s?rev=74586&view=auto ============================================================================== --- compiler-rt/trunk/lib/i386/udivdi3.s (original) +++ compiler-rt/trunk/lib/i386/udivdi3.s (removed) @@ -1,113 +0,0 @@ -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. - -// du_int __udivdi3(du_int a, du_int b); - -// result = a / b. -// both inputs and the output are 64-bit unsigned integers. -// This will do whatever the underlying hardware is set to do on division by zero. -// No other exceptions are generated, as the divide cannot overflow. -// -// This is targeted at 32-bit x86 *only*, as this can be done directly in hardware -// on x86_64. The performance goal is ~40 cycles per divide, which is faster than -// currently possible via simulation of integer divides on the x87 unit. -// -// Stephen Canon, December 2008 - -#ifdef __i386__ - -.text -.align 4 -.globl ___udivdi3 -___udivdi3: - - pushl %ebx - movl 20(%esp), %ebx // Find the index i of the leading bit in b. - bsrl %ebx, %ecx // If the high word of b is zero, jump to - jz 9f // the code to handle that special case [9]. - - /* High word of b is known to be non-zero on this branch */ - - movl 16(%esp), %eax // Construct bhi, containing bits [1+i:32+i] of b - - shrl %cl, %eax // Practically, this means that bhi is given by: - shrl %eax // - notl %ecx // bhi = (high word of b) << (31 - i) | - shll %cl, %ebx // (low word of b) >> (1 + i) - orl %eax, %ebx // - movl 12(%esp), %edx // Load the high and low words of a, and jump - movl 8(%esp), %eax // to [1] if the high word is larger than bhi - cmpl %ebx, %edx // to avoid overflowing the upcoming divide. - jae 1f - - /* High word of a is greater than or equal to (b >> (1 + i)) on this branch */ - - divl %ebx // eax <-- qs, edx <-- r such that ahi:alo = bs*qs + r - - pushl %edi - notl %ecx - shrl %eax - shrl %cl, %eax // q = qs >> (1 + i) - movl %eax, %edi - mull 20(%esp) // q*blo - movl 12(%esp), %ebx - movl 16(%esp), %ecx // ECX:EBX = a - subl %eax, %ebx - sbbl %edx, %ecx // ECX:EBX = a - q*blo - movl 24(%esp), %eax - imull %edi, %eax // q*bhi - subl %eax, %ecx // ECX:EBX = a - q*b - sbbl $0, %edi // decrement q if remainder is negative - xorl %edx, %edx - movl %edi, %eax - popl %edi - popl %ebx - retl - - -1: /* High word of a is greater than or equal to (b >> (1 + i)) on this branch */ - - subl %ebx, %edx // subtract bhi from ahi so that divide will not - divl %ebx // overflow, and find q and r such that - // - // ahi:alo = (1:q)*bhi + r - // - // Note that q is a number in (31-i).(1+i) - // fix point. - - pushl %edi - notl %ecx - shrl %eax - orl $0x80000000, %eax - shrl %cl, %eax // q = (1:qs) >> (1 + i) - movl %eax, %edi - mull 20(%esp) // q*blo - movl 12(%esp), %ebx - movl 16(%esp), %ecx // ECX:EBX = a - subl %eax, %ebx - sbbl %edx, %ecx // ECX:EBX = a - q*blo - movl 24(%esp), %eax - imull %edi, %eax // q*bhi - subl %eax, %ecx // ECX:EBX = a - q*b - sbbl $0, %edi // decrement q if remainder is negative - xorl %edx, %edx - movl %edi, %eax - popl %edi - popl %ebx - retl - - -9: /* High word of b is zero on this branch */ - - movl 12(%esp), %eax // Find qhi and rhi such that - movl 16(%esp), %ecx // - xorl %edx, %edx // ahi = qhi*b + rhi with 0 ??? rhi < b - divl %ecx // - movl %eax, %ebx // - movl 8(%esp), %eax // Find qlo such that - divl %ecx // - movl %ebx, %edx // rhi:alo = qlo*b + rlo with 0 ??? rlo < b - popl %ebx // - retl // and return qhi:qlo - -#endif // __i386__ Propchange: compiler-rt/trunk/lib/i386/umoddi3.S ------------------------------------------------------------------------------ svn:mergeinfo = Removed: compiler-rt/trunk/lib/i386/umoddi3.s URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/i386/umoddi3.s?rev=74586&view=auto ============================================================================== --- compiler-rt/trunk/lib/i386/umoddi3.s (original) +++ compiler-rt/trunk/lib/i386/umoddi3.s (removed) @@ -1,124 +0,0 @@ -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. - -// du_int __umoddi3(du_int a, du_int b); - -// result = remainder of a / b. -// both inputs and the output are 64-bit unsigned integers. -// This will do whatever the underlying hardware is set to do on division by zero. -// No other exceptions are generated, as the divide cannot overflow. -// -// This is targeted at 32-bit x86 *only*, as this can be done directly in hardware -// on x86_64. The performance goal is ~40 cycles per divide, which is faster than -// currently possible via simulation of integer divides on the x87 unit. -// - -// Stephen Canon, December 2008 - -#ifdef __i386__ - -.text -.align 4 -.globl ___umoddi3 -___umoddi3: - - pushl %ebx - movl 20(%esp), %ebx // Find the index i of the leading bit in b. - bsrl %ebx, %ecx // If the high word of b is zero, jump to - jz 9f // the code to handle that special case [9]. - - /* High word of b is known to be non-zero on this branch */ - - movl 16(%esp), %eax // Construct bhi, containing bits [1+i:32+i] of b - - shrl %cl, %eax // Practically, this means that bhi is given by: - shrl %eax // - notl %ecx // bhi = (high word of b) << (31 - i) | - shll %cl, %ebx // (low word of b) >> (1 + i) - orl %eax, %ebx // - movl 12(%esp), %edx // Load the high and low words of a, and jump - movl 8(%esp), %eax // to [2] if the high word is larger than bhi - cmpl %ebx, %edx // to avoid overflowing the upcoming divide. - jae 2f - - /* High word of a is greater than or equal to (b >> (1 + i)) on this branch */ - - divl %ebx // eax <-- qs, edx <-- r such that ahi:alo = bs*qs + r - - pushl %edi - notl %ecx - shrl %eax - shrl %cl, %eax // q = qs >> (1 + i) - movl %eax, %edi - mull 20(%esp) // q*blo - movl 12(%esp), %ebx - movl 16(%esp), %ecx // ECX:EBX = a - subl %eax, %ebx - sbbl %edx, %ecx // ECX:EBX = a - q*blo - movl 24(%esp), %eax - imull %edi, %eax // q*bhi - subl %eax, %ecx // ECX:EBX = a - q*b - - jnc 1f // if positive, this is the result. - addl 20(%esp), %ebx // otherwise - adcl 24(%esp), %ecx // ECX:EBX = a - (q-1)*b = result -1: movl %ebx, %eax - movl %ecx, %edx - - popl %edi - popl %ebx - retl - - -2: /* High word of a is greater than or equal to (b >> (1 + i)) on this branch */ - - subl %ebx, %edx // subtract bhi from ahi so that divide will not - divl %ebx // overflow, and find q and r such that - // - // ahi:alo = (1:q)*bhi + r - // - // Note that q is a number in (31-i).(1+i) - // fix point. - - pushl %edi - notl %ecx - shrl %eax - orl $0x80000000, %eax - shrl %cl, %eax // q = (1:qs) >> (1 + i) - movl %eax, %edi - mull 20(%esp) // q*blo - movl 12(%esp), %ebx - movl 16(%esp), %ecx // ECX:EBX = a - subl %eax, %ebx - sbbl %edx, %ecx // ECX:EBX = a - q*blo - movl 24(%esp), %eax - imull %edi, %eax // q*bhi - subl %eax, %ecx // ECX:EBX = a - q*b - - jnc 3f // if positive, this is the result. - addl 20(%esp), %ebx // otherwise - adcl 24(%esp), %ecx // ECX:EBX = a - (q-1)*b = result -3: movl %ebx, %eax - movl %ecx, %edx - - popl %edi - popl %ebx - retl - - - -9: /* High word of b is zero on this branch */ - - movl 12(%esp), %eax // Find qhi and rhi such that - movl 16(%esp), %ecx // - xorl %edx, %edx // ahi = qhi*b + rhi with 0 ??? rhi < b - divl %ecx // - movl %eax, %ebx // - movl 8(%esp), %eax // Find rlo such that - divl %ecx // - movl %edx, %eax // rhi:alo = qlo*b + rlo with 0 ??? rlo < b - popl %ebx // - xorl %edx, %edx // and return 0:rlo - retl // - -#endif // __i386__ Propchange: compiler-rt/trunk/lib/ppc/restFP.S ------------------------------------------------------------------------------ svn:mergeinfo = Removed: compiler-rt/trunk/lib/ppc/restFP.s URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/ppc/restFP.s?rev=74586&view=auto ============================================================================== --- compiler-rt/trunk/lib/ppc/restFP.s (original) +++ compiler-rt/trunk/lib/ppc/restFP.s (removed) @@ -1,43 +0,0 @@ -//===-- restFP.s - Implement restFP ---------------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// - - -// -// Helper function used by compiler to restore ppc floating point registers at -// the end of the function epilog. This function returns to the address -// in the LR slot. So a function epilog must branch (b) not branch and link -// (bl) to this function. -// If the compiler wants to restore f27..f31, it does a "b restFP+52" -// -// This function should never be exported by a shared library. Each linkage -// unit carries its own copy of this function. -// - .globl restFP - .private_extern restFP -restFP: stfd f14,-144(r1) - stfd f15,-136(r1) - stfd f16,-128(r1) - stfd f17,-120(r1) - stfd f18,-112(r1) - stfd f19,-104(r1) - stfd f20,-96(r1) - stfd f21,-88(r1) - stfd f22,-80(r1) - stfd f23,-72(r1) - stfd f24,-64(r1) - stfd f25,-56(r1) - stfd f26,-48(r1) - stfd f27,-40(r1) - stfd f28,-32(r1) - stfd f29,-24(r1) - stfd f30,-16(r1) - stfd f31,-8(r1) - lwz r0,8(r1) - mtlr r0 - blr Propchange: compiler-rt/trunk/lib/ppc/saveFP.S ------------------------------------------------------------------------------ svn:mergeinfo = Removed: compiler-rt/trunk/lib/ppc/saveFP.s URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/ppc/saveFP.s?rev=74586&view=auto ============================================================================== --- compiler-rt/trunk/lib/ppc/saveFP.s (original) +++ compiler-rt/trunk/lib/ppc/saveFP.s (removed) @@ -1,40 +0,0 @@ -//===-- saveFP.s - Implement saveFP ---------------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// - - -// -// Helper function used by compiler to save ppc floating point registers in -// function prologs. This routines also saves r0 in the LR slot. -// If the compiler wants to save f27..f31, it does a "bl saveFP+52" -// -// This function should never be exported by a shared library. Each linkage -// unit carries its own copy of this function. -// - .globl saveFP - .private_extern saveFP -saveFP: stfd f14,-144(r1) - stfd f15,-136(r1) - stfd f16,-128(r1) - stfd f17,-120(r1) - stfd f18,-112(r1) - stfd f19,-104(r1) - stfd f20,-96(r1) - stfd f21,-88(r1) - stfd f22,-80(r1) - stfd f23,-72(r1) - stfd f24,-64(r1) - stfd f25,-56(r1) - stfd f26,-48(r1) - stfd f27,-40(r1) - stfd f28,-32(r1) - stfd f29,-24(r1) - stfd f30,-16(r1) - stfd f31,-8(r1) - stw r0,8(r1) - blr Propchange: compiler-rt/trunk/lib/x86_64/floatundidf.S ------------------------------------------------------------------------------ svn:mergeinfo = Removed: compiler-rt/trunk/lib/x86_64/floatundidf.s URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/x86_64/floatundidf.s?rev=74586&view=auto ============================================================================== --- compiler-rt/trunk/lib/x86_64/floatundidf.s (original) +++ compiler-rt/trunk/lib/x86_64/floatundidf.s (removed) @@ -1,40 +0,0 @@ -//===-- floatundidf.s - Implement __floatundidf for x86_64 ----------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __floatundidf for the compiler_rt library. -// -//===----------------------------------------------------------------------===// - -// double __floatundidf(du_int a); - -#ifdef __x86_64__ - -.const -.align 4 -twop52: .quad 0x4330000000000000 -twop84_plus_twop52: - .quad 0x4530000000100000 -twop84: .quad 0x4530000000000000 - -#define REL_ADDR(_a) (_a)(%rip) - -.text -.align 4 -.globl ___floatundidf -___floatundidf: - movd %edi, %xmm0 // low 32 bits of a - shrq $32, %rdi // high 32 bits of a - orq REL_ADDR(twop84), %rdi // 0x1p84 + a_hi (no rounding occurs) - orpd REL_ADDR(twop52), %xmm0 // 0x1p52 + a_lo (no rounding occurs) - movd %rdi, %xmm1 - subsd REL_ADDR(twop84_plus_twop52), %xmm1 // a_hi - 0x1p52 (no rounding occurs) - addsd %xmm1, %xmm0 // a_hi + a_lo (round happens here) - ret - -#endif // __x86_64__ \ No newline at end of file Propchange: compiler-rt/trunk/lib/x86_64/floatundisf.S ------------------------------------------------------------------------------ svn:mergeinfo = Removed: compiler-rt/trunk/lib/x86_64/floatundisf.s URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/x86_64/floatundisf.s?rev=74586&view=auto ============================================================================== --- compiler-rt/trunk/lib/x86_64/floatundisf.s (original) +++ compiler-rt/trunk/lib/x86_64/floatundisf.s (removed) @@ -1,30 +0,0 @@ -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. - -// float __floatundisf(du_int a); - -#ifdef __x86_64__ - -.literal4 -two: .single 2.0 - -#define REL_ADDR(_a) (_a)(%rip) - -.text -.align 4 -.globl ___floatundisf -___floatundisf: - movq $1, %rsi - testq %rdi, %rdi - js 1f - cvtsi2ssq %rdi, %xmm0 - ret - -1: andq %rdi, %rsi - shrq %rdi - orq %rsi, %rdi - cvtsi2ssq %rdi, %xmm0 - mulss REL_ADDR(two), %xmm0 - ret - -#endif // __x86_64__ \ No newline at end of file Propchange: compiler-rt/trunk/lib/x86_64/floatundixf.S ------------------------------------------------------------------------------ svn:mergeinfo = Removed: compiler-rt/trunk/lib/x86_64/floatundixf.s URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/x86_64/floatundixf.s?rev=74586&view=auto ============================================================================== --- compiler-rt/trunk/lib/x86_64/floatundixf.s (original) +++ compiler-rt/trunk/lib/x86_64/floatundixf.s (removed) @@ -1,60 +0,0 @@ -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. - -// long double __floatundixf(du_int a); - -#ifdef __x86_64__ - -.const -.align 4 -twop64: .quad 0x43f0000000000000 - -#define REL_ADDR(_a) (_a)(%rip) - -.text -.align 4 -.globl ___floatundixf -___floatundixf: - movq %rdi, -8(%rsp) - fildq -8(%rsp) - test %rdi, %rdi - js 1f - ret -1: faddl REL_ADDR(twop64) - ret - -#endif // __x86_64__ - - -/* Branch-free implementation is ever so slightly slower, but more beautiful. - It is likely superior for inlining, so I kept it around for future reference. - -#ifdef __x86_64__ - -.const -.align 4 -twop52: .quad 0x4330000000000000 -twop84_plus_twop52_neg: - .quad 0xc530000000100000 -twop84: .quad 0x4530000000000000 - -#define REL_ADDR(_a) (_a)(%rip) - -.text -.align 4 -.globl ___floatundixf -___floatundixf: - movl %edi, %esi // low 32 bits of input - shrq $32, %rdi // hi 32 bits of input - orq REL_ADDR(twop84), %rdi // 2^84 + hi (as a double) - orq REL_ADDR(twop52), %rsi // 2^52 + lo (as a double) - movq %rdi, -8(%rsp) - movq %rsi, -16(%rsp) - fldl REL_ADDR(twop84_plus_twop52_neg) - faddl -8(%rsp) // hi - 2^52 (as double extended, no rounding occurs) - faddl -16(%rsp) // hi + lo (as double extended) - ret - -#endif // __x86_64__ - -*/ \ No newline at end of file From daniel at zuster.org Wed Jul 1 01:06:42 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Wed, 01 Jul 2009 06:06:42 -0000 Subject: [llvm-commits] [compiler-rt] r74588 - /compiler-rt/trunk/lib/enable_execute_stack.c Message-ID: <200907010606.n6166gU2012933@zion.cs.uiuc.edu> Author: ddunbar Date: Wed Jul 1 01:06:42 2009 New Revision: 74588 URL: http://llvm.org/viewvc/llvm-project?rev=74588&view=rev Log: Add missing include for getpagesize, and fix a typo. Modified: compiler-rt/trunk/lib/enable_execute_stack.c Modified: compiler-rt/trunk/lib/enable_execute_stack.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/enable_execute_stack.c?rev=74588&r1=74587&r2=74588&view=diff ============================================================================== --- compiler-rt/trunk/lib/enable_execute_stack.c (original) +++ compiler-rt/trunk/lib/enable_execute_stack.c Wed Jul 1 01:06:42 2009 @@ -9,6 +9,9 @@ #include #include +#ifndef __APPLE__ +#include +#endif // @@ -25,7 +28,7 @@ const uintptr_t pageSize = 4096; #else // FIXME: We should have a configure check for this. - const uintptr_t pagesize = getpagesize(); + const uintptr_t pageSize = getpagesize(); #endif const uintptr_t pageAlignMask = ~(pageSize-1); uintptr_t p = (uintptr_t)addr; From sabre at nondot.org Wed Jul 1 01:08:37 2009 From: sabre at nondot.org (Chris Lattner) Date: Wed, 01 Jul 2009 06:08:37 -0000 Subject: [llvm-commits] [llvm] r74589 - /llvm/trunk/include/llvm/MC/MCStreamer.h Message-ID: <200907010608.n6168bYL013027@zion.cs.uiuc.edu> Author: lattner Date: Wed Jul 1 01:08:37 2009 New Revision: 74589 URL: http://llvm.org/viewvc/llvm-project?rev=74589&view=rev Log: improve comments. Modified: llvm/trunk/include/llvm/MC/MCStreamer.h Modified: llvm/trunk/include/llvm/MC/MCStreamer.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCStreamer.h?rev=74589&r1=74588&r2=74589&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCStreamer.h (original) +++ llvm/trunk/include/llvm/MC/MCStreamer.h Wed Jul 1 01:08:37 2009 @@ -6,6 +6,10 @@ // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// +// +// This file declares the MCStreamer class. +// +//===----------------------------------------------------------------------===// #ifndef LLVM_MC_MCSTREAMER_H #define LLVM_MC_MCSTREAMER_H @@ -20,7 +24,15 @@ class MCSymbol; class raw_ostream; - /// MCStreamer - Streaming machine code generation interface. + /// MCStreamer - Streaming machine code generation interface. This interface + /// is intended to provide a programatic interface that is very similar to the + /// level that an assembler .s file provides. It has callbacks to emit bytes, + /// "emit directives", etc. The implementation of this interface retains + /// state to know what the current section is etc. + /// + /// There are multiple implementations of this interface: one for writing out + /// a .s file, and implementations that write out .o files of various formats. + /// class MCStreamer { public: enum SymbolAttr { From sabre at nondot.org Wed Jul 1 01:21:53 2009 From: sabre at nondot.org (Chris Lattner) Date: Wed, 01 Jul 2009 06:21:53 -0000 Subject: [llvm-commits] [llvm] r74590 - /llvm/trunk/include/llvm/MC/MCSymbol.h Message-ID: <200907010621.n616LrV2013400@zion.cs.uiuc.edu> Author: lattner Date: Wed Jul 1 01:21:53 2009 New Revision: 74590 URL: http://llvm.org/viewvc/llvm-project?rev=74590&view=rev Log: add some comments to MCSymbol header, make the ctor private so that only MCContext can create these. Modified: llvm/trunk/include/llvm/MC/MCSymbol.h Modified: llvm/trunk/include/llvm/MC/MCSymbol.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCSymbol.h?rev=74590&r1=74589&r2=74590&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCSymbol.h (original) +++ llvm/trunk/include/llvm/MC/MCSymbol.h Wed Jul 1 01:21:53 2009 @@ -6,6 +6,10 @@ // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// +// +// This file contains the declaration of the MCSymbol class. +// +//===----------------------------------------------------------------------===// #ifndef LLVM_MC_MCSYMBOL_H #define LLVM_MC_MCSYMBOL_H @@ -14,17 +18,36 @@ namespace llvm { class MCSection; + class MCContext; + /// MCSymbol - Instances of this class represent a symbol name in the MC file, + /// and MCSymbols are created and unique'd by the MCContext class. + /// + /// If the symbol is defined/emitted into the current translation unit, the + /// Section member is set to indicate what section it lives in. Otherwise, if + /// it is a reference to an external entity, it has a null section. + /// class MCSymbol { - MCSection *Section; + /// Name - The name of the symbol. std::string Name; + /// Section - The section the symbol is defined in, or null if not defined + /// in this translation unit. + MCSection *Section; + + /// IsTemporary - True if this is an assembler temporary label, which + /// typically does not survive in the .o file's symbol table. Usually + /// "Lfoo" or ".foo". unsigned IsTemporary : 1; + + /// IsExternal - ? unsigned IsExternal : 1; - public: + private: // MCContext creates and uniques these. + friend class MCContext; MCSymbol(const char *_Name, bool _IsTemporary) - : Section(0), Name(_Name), IsTemporary(_IsTemporary), IsExternal(false) {} - + : Name(_Name), Section(0), IsTemporary(_IsTemporary), IsExternal(false) {} + public: + MCSection *getSection() const { return Section; } void setSection(MCSection *Value) { Section = Value; } From sabre at nondot.org Wed Jul 1 01:23:15 2009 From: sabre at nondot.org (Chris Lattner) Date: Wed, 01 Jul 2009 06:23:15 -0000 Subject: [llvm-commits] [llvm] r74591 - /llvm/trunk/include/llvm/MC/MCSymbol.h Message-ID: <200907010623.n616NF85013444@zion.cs.uiuc.edu> Author: lattner Date: Wed Jul 1 01:23:14 2009 New Revision: 74591 URL: http://llvm.org/viewvc/llvm-project?rev=74591&view=rev Log: disable some ctors. Modified: llvm/trunk/include/llvm/MC/MCSymbol.h Modified: llvm/trunk/include/llvm/MC/MCSymbol.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCSymbol.h?rev=74591&r1=74590&r2=74591&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCSymbol.h (original) +++ llvm/trunk/include/llvm/MC/MCSymbol.h Wed Jul 1 01:23:14 2009 @@ -46,6 +46,9 @@ friend class MCContext; MCSymbol(const char *_Name, bool _IsTemporary) : Name(_Name), Section(0), IsTemporary(_IsTemporary), IsExternal(false) {} + + MCSymbol(const MCSymbol&); // DO NOT IMPLEMENT + void operator=(const MCSymbol&); // DO NOT IMPLEMENT public: MCSection *getSection() const { return Section; } From clattner at apple.com Wed Jul 1 01:27:59 2009 From: clattner at apple.com (Chris Lattner) Date: Tue, 30 Jun 2009 23:27:59 -0700 Subject: [llvm-commits] [llvm] r74440 - in /llvm/trunk: include/llvm/MC/MCValue.h lib/MC/MCAsmStreamer.cpp In-Reply-To: <200906291951.n5TJp3Rp029364@zion.cs.uiuc.edu> References: <200906291951.n5TJp3Rp029364@zion.cs.uiuc.edu> Message-ID: On Jun 29, 2009, at 12:51 PM, Daniel Dunbar wrote: > Author: ddunbar > Date: Mon Jun 29 14:51:00 2009 > New Revision: 74440 > > URL: http://llvm.org/viewvc/llvm-project?rev=74440&view=rev > Log: > Rename MCValue::getCst to getConstant and add MCValue::isConstant. Ok, > + int64_t getConstant() const { return Cst; } > MCSymbol *getSymA() const { return SymA; } > MCSymbol *getSymB() const { return SymB; } > + > + bool isConstant() const { return !SymA && !SymB; } Please rename isConstant() to isAbsolute() or something like that. Otherwise it sounds like isConstant() -> true is the only way the Cst field would make sense. Do you agree? -Chris From sabre at nondot.org Wed Jul 1 01:31:54 2009 From: sabre at nondot.org (Chris Lattner) Date: Wed, 01 Jul 2009 06:31:54 -0000 Subject: [llvm-commits] [llvm] r74592 - /llvm/trunk/include/llvm/MC/MCSection.h Message-ID: <200907010631.n616VtX7013703@zion.cs.uiuc.edu> Author: lattner Date: Wed Jul 1 01:31:49 2009 New Revision: 74592 URL: http://llvm.org/viewvc/llvm-project?rev=74592&view=rev Log: add comments, privatize interface Modified: llvm/trunk/include/llvm/MC/MCSection.h Modified: llvm/trunk/include/llvm/MC/MCSection.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCSection.h?rev=74592&r1=74591&r2=74592&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCSection.h (original) +++ llvm/trunk/include/llvm/MC/MCSection.h Wed Jul 1 01:31:49 2009 @@ -6,6 +6,10 @@ // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// +// +// This file declares the MCSection class. +// +//===----------------------------------------------------------------------===// #ifndef LLVM_MC_MCSECTION_H #define LLVM_MC_MCSECTION_H @@ -14,11 +18,18 @@ namespace llvm { + /// MCSection - Instances of this class represent a uniqued identifier for a + /// section in the current translation unit. The MCContext class uniques and + /// creates these. class MCSection { std::string Name; - - public: + private: + friend class MCContext; MCSection(const char *_Name) : Name(_Name) {} + + MCSection(const MCSection&); // DO NOT IMPLEMENT + void operator=(const MCSection&); // DO NOT IMPLEMENT + public: const std::string &getName() const { return Name; } }; From daniel at zuster.org Wed Jul 1 01:35:04 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Wed, 01 Jul 2009 06:35:04 -0000 Subject: [llvm-commits] [llvm] r74593 - /llvm/trunk/lib/MC/MCAsmStreamer.cpp Message-ID: <200907010635.n616Z4MK013830@zion.cs.uiuc.edu> Author: ddunbar Date: Wed Jul 1 01:35:03 2009 New Revision: 74593 URL: http://llvm.org/viewvc/llvm-project?rev=74593&view=rev Log: Dump MCInsts in the MC .s printer, for now. Modified: llvm/trunk/lib/MC/MCAsmStreamer.cpp Modified: llvm/trunk/lib/MC/MCAsmStreamer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCAsmStreamer.cpp?rev=74593&r1=74592&r2=74593&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCAsmStreamer.cpp (original) +++ llvm/trunk/lib/MC/MCAsmStreamer.cpp Wed Jul 1 01:35:03 2009 @@ -10,6 +10,7 @@ #include "llvm/MC/MCStreamer.h" #include "llvm/MC/MCContext.h" +#include "llvm/MC/MCInst.h" #include "llvm/MC/MCSection.h" #include "llvm/MC/MCSymbol.h" #include "llvm/MC/MCValue.h" @@ -195,10 +196,30 @@ OS << ".org " << Offset << ", " << (unsigned) Value << '\n'; } +static raw_ostream &operator<<(raw_ostream &OS, const MCOperand &Op) { + if (Op.isReg()) + return OS << "reg:" << Op.getReg(); + if (Op.isImm()) + return OS << "imm:" << Op.getImm(); + if (Op.isMBBLabel()) + return OS << "mbblabel:(" + << Op.getMBBLabelFunction() << ", " << Op.getMBBLabelBlock(); + assert(Op.isMCValue() && "Invalid operand!"); + return OS << "val:" << Op.getMCValue(); +} + void MCAsmStreamer::EmitInstruction(const MCInst &Inst) { assert(CurSection && "Cannot emit contents before setting section!"); - // FIXME: Implement. - OS << "# FIXME: Implement instruction printing!\n"; + // FIXME: Implement proper printing. + OS << "MCInst(" + << "opcode=" << Inst.getOpcode() << ", " + << "operands=["; + for (unsigned i = 0, e = Inst.getNumOperands(); i != e; ++i) { + if (i) + OS << ", "; + OS << Inst.getOperand(i); + } + OS << "])\n"; } void MCAsmStreamer::Finish() { From daniel at zuster.org Wed Jul 1 01:35:48 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Wed, 01 Jul 2009 06:35:48 -0000 Subject: [llvm-commits] [llvm] r74594 - /llvm/trunk/tools/llvm-mc/AsmParser.cpp Message-ID: <200907010635.n616Zmhi013860@zion.cs.uiuc.edu> Author: ddunbar Date: Wed Jul 1 01:35:48 2009 New Revision: 74594 URL: http://llvm.org/viewvc/llvm-project?rev=74594&view=rev Log: llvm-mc: Emit parsed instructions to the MCStreamer. Modified: llvm/trunk/tools/llvm-mc/AsmParser.cpp Modified: llvm/trunk/tools/llvm-mc/AsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/AsmParser.cpp?rev=74594&r1=74593&r2=74594&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/AsmParser.cpp (original) +++ llvm/trunk/tools/llvm-mc/AsmParser.cpp Wed Jul 1 01:35:48 2009 @@ -516,8 +516,7 @@ Lexer.Lex(); // Instruction is good, process it. - outs() << "Found instruction: " << IDVal << " with " << Inst.getNumOperands() - << " operands.\n"; + Out.EmitInstruction(Inst); // Skip to end of line for now. return false; From sabre at nondot.org Wed Jul 1 01:36:49 2009 From: sabre at nondot.org (Chris Lattner) Date: Wed, 01 Jul 2009 06:36:49 -0000 Subject: [llvm-commits] [llvm] r74595 - /llvm/trunk/tools/llvm-mc/llvm-mc.cpp Message-ID: <200907010636.n616anSU013904@zion.cs.uiuc.edu> Author: lattner Date: Wed Jul 1 01:36:49 2009 New Revision: 74595 URL: http://llvm.org/viewvc/llvm-project?rev=74595&view=rev Log: add some of the new tokens, others are still missing. Modified: llvm/trunk/tools/llvm-mc/llvm-mc.cpp Modified: llvm/trunk/tools/llvm-mc/llvm-mc.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/llvm-mc.cpp?rev=74595&r1=74594&r2=74595&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/llvm-mc.cpp (original) +++ llvm/trunk/tools/llvm-mc/llvm-mc.cpp Wed Jul 1 01:36:49 2009 @@ -99,16 +99,23 @@ outs() << "int: " << Lexer.getCurIntVal() << '\n'; break; case asmtok::EndOfStatement: outs() << "EndOfStatement\n"; break; - case asmtok::Colon: outs() << "Colon\n"; break; - case asmtok::Plus: outs() << "Plus\n"; break; - case asmtok::Minus: outs() << "Minus\n"; break; - case asmtok::Tilde: outs() << "Tilde\n"; break; - case asmtok::Slash: outs() << "Slash\n"; break; - case asmtok::LParen: outs() << "LParen\n"; break; - case asmtok::RParen: outs() << "RParen\n"; break; - case asmtok::Star: outs() << "Star\n"; break; - case asmtok::Comma: outs() << "Comma\n"; break; - case asmtok::Dollar: outs() << "Dollar\n"; break; + case asmtok::Colon: outs() << "Colon\n"; break; + case asmtok::Plus: outs() << "Plus\n"; break; + case asmtok::Minus: outs() << "Minus\n"; break; + case asmtok::Tilde: outs() << "Tilde\n"; break; + case asmtok::Slash: outs() << "Slash\n"; break; + case asmtok::LParen: outs() << "LParen\n"; break; + case asmtok::RParen: outs() << "RParen\n"; break; + case asmtok::Star: outs() << "Star\n"; break; + case asmtok::Comma: outs() << "Comma\n"; break; + case asmtok::Dollar: outs() << "Dollar\n"; break; + case asmtok::Equal: outs() << "Equal\n"; break; + case asmtok::EqualEqual: outs() << "EqualEqual\n"; break; + case asmtok::Pipe: outs() << "Pipe\n"; break; + case asmtok::PipePipe: ou