[llvm-commits] PATCH: remove VICmp and VFCmp.
dag at cray.com
Thu Jul 9 13:47:51 CDT 2009
On Thursday 09 July 2009 13:24, Chris Lattner wrote:
> > So the processor really operates with such bit-packed vectors,
> > producing
> > them as results for comparisons?
> If a processor has that, it can use intrinsics. It's not as if two
> chips that support <4 x i1> natively in hardware would agree on a
> memory format anyway :)
Well, this is what I've thought about for Larrabee but we'd be forced to
use intrinsics because the LLVM IR doesn't currently support a mask
concept. Unfortunately, that will SEVERELY limit optimization opportunity.
We really don't want to go the intrinsic route for masked/predicated
operations. So we need native mask support in the LLVM IR and a way
to express a mask type that has the right semantics.
I'm fine with declaring that vectors have a memory layout equiavlent to
arrays as long as we have some other mechanism/type to express bit-packed
vectors. Maybe a bitvector type? Offhand I can't think of any other
vector type that would be bit-packed on hardware other than vectors of i1.
We really, really, really will need to have good mask support in the future.
Tnis isn't an immediate problem so it can be worked out later but I've
spent a lot of time worrying about how this will happen. Larrabee comes
out next year and without good mask usage, it will be a dog.
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