From daniel at zuster.org Mon Aug 3 00:02:47 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Mon, 03 Aug 2009 05:02:47 -0000 Subject: [llvm-commits] [llvm] r77953 - in /llvm/trunk: include/llvm/System/Program.h lib/System/Unix/Program.inc lib/System/Win32/Program.inc Message-ID: <200908030502.n7352mES012160@zion.cs.uiuc.edu> Author: ddunbar Date: Mon Aug 3 00:02:46 2009 New Revision: 77953 URL: http://llvm.org/viewvc/llvm-project?rev=77953&view=rev Log: Fix a race condition in getting the process exit code on Win32. Modified: llvm/trunk/include/llvm/System/Program.h llvm/trunk/lib/System/Unix/Program.inc llvm/trunk/lib/System/Win32/Program.inc Modified: llvm/trunk/include/llvm/System/Program.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/System/Program.h?rev=77953&r1=77952&r2=77953&view=diff ============================================================================== --- llvm/trunk/include/llvm/System/Program.h (original) +++ llvm/trunk/include/llvm/System/Program.h Mon Aug 3 00:02:46 2009 @@ -29,6 +29,9 @@ /// @since 1.4 /// @brief An abstraction for finding and executing programs. class Program { + /// Opaque handle for target specific data. + void *Data; + unsigned Pid_; // Noncopyable. @@ -39,9 +42,9 @@ /// @{ public: - Program() : Pid_(0) - {} - + Program(); + ~Program(); + /// Return process ID of this program. unsigned GetPid() { return Pid_; } Modified: llvm/trunk/lib/System/Unix/Program.inc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Unix/Program.inc?rev=77953&r1=77952&r2=77953&view=diff ============================================================================== --- llvm/trunk/lib/System/Unix/Program.inc (original) +++ llvm/trunk/lib/System/Unix/Program.inc Mon Aug 3 00:02:46 2009 @@ -35,6 +35,10 @@ namespace llvm { using namespace sys; +Program::Program() : Pid_(0) {} + +Program::~Program() {} + // This function just uses the PATH environment variable to find the program. Path Program::FindProgramByName(const std::string& progName) { Modified: llvm/trunk/lib/System/Win32/Program.inc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Win32/Program.inc?rev=77953&r1=77952&r2=77953&view=diff ============================================================================== --- llvm/trunk/lib/System/Win32/Program.inc (original) +++ llvm/trunk/lib/System/Win32/Program.inc Mon Aug 3 00:02:46 2009 @@ -25,6 +25,16 @@ namespace llvm { using namespace sys; +Program::Program() : Pid_(0), Data(0) {} + +Program::~Program() { + if (Data) { + HANDLE hProcess = (HANDLE) Data; + CloseHandle(hProcess); + Data = 0; + } +} + // This function just uses the PATH environment variable to find the program. Path Program::FindProgramByName(const std::string& progName) { @@ -122,6 +132,12 @@ const Path** redirects, unsigned memoryLimit, std::string* ErrMsg) { + if (Data) { + HANDLE hProcess = (HANDLE) Data; + CloseHandle(Data); + Data = 0; + } + if (!path.canExecute()) { if (ErrMsg) *ErrMsg = "program not executable"; @@ -250,9 +266,9 @@ return false; } Pid_ = pi.dwProcessId; - + Data = pi.hProcess; + // Make sure these get closed no matter what. - AutoHandle hProcess(pi.hProcess); AutoHandle hThread(pi.hThread); // Assign the process to a job if a memory limit is defined. @@ -286,13 +302,13 @@ int Program::Wait(unsigned secondsToWait, std::string* ErrMsg) { - if (Pid_ == 0) { + if (Data == 0) { MakeErrMsg(ErrMsg, "Process not started!"); return -1; } - AutoHandle hProcess = OpenProcess(SYNCHRONIZE, FALSE, Pid_); - + HANDLE hProcess = (HANDLE) Data; + // Wait for the process to terminate. DWORD millisecondsToWait = INFINITE; if (secondsToWait > 0) From daniel at zuster.org Mon Aug 3 00:03:08 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Sun, 2 Aug 2009 22:03:08 -0700 Subject: [llvm-commits] [llvm] r76340 - in /llvm/trunk: include/llvm/System/Program.h lib/System/Program.cpp lib/System/Unix/Program.inc lib/System/Win32/Program.inc In-Reply-To: <6a8523d60908012151x635f2843qe7a66d98bc7bba23@mail.gmail.com> References: <200907182143.n6ILhD0K003063@zion.cs.uiuc.edu> <6a8523d60908012151x635f2843qe7a66d98bc7bba23@mail.gmail.com> Message-ID: <6a8523d60908022203k2a6f379i47c5056194ffe8f1@mail.gmail.com> On Sat, Aug 1, 2009 at 9:51 PM, Daniel Dunbar wrote: > Hi Mikhail, > > Unfortunately I'm not seeing this until now, but this refactoring has > one key flaw. On Windows, it introduces a race condition between where > the program releases the process handle, and where it gets the handle > again in Program::Wait. I believe that the program needs to hold on to > the handle for as long as clients may want information about it. > > This causes substantial problems for the clang driver on Windows. Do > you think you can work out an alternate solution that avoids this > problem? Scratch that, fixed in r77953. - Daniel > On Sat, Jul 18, 2009 at 2:43 PM, Mikhail Glushenkov wrote: >> Author: foldr >> Date: Sat Jul 18 16:43:12 2009 >> New Revision: 76340 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=76340&view=rev >> Log: >> Remove duplication in Program::Execute{And,No}Wait. >> >> Implemented by moving the code out of static functions into methods of Program >> class. >> >> Modified: >> ? ?llvm/trunk/include/llvm/System/Program.h >> ? ?llvm/trunk/lib/System/Program.cpp >> ? ?llvm/trunk/lib/System/Unix/Program.inc >> ? ?llvm/trunk/lib/System/Win32/Program.inc >> >> Modified: llvm/trunk/include/llvm/System/Program.h >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/System/Program.h?rev=76340&r1=76339&r2=76340&view=diff >> >> ============================================================================== >> --- llvm/trunk/include/llvm/System/Program.h (original) >> +++ llvm/trunk/include/llvm/System/Program.h Sat Jul 18 16:43:12 2009 >> @@ -19,6 +19,9 @@ >> ?namespace llvm { >> ?namespace sys { >> >> + ?// TODO: Add operations to communicate with the process, redirect its I/O, >> + ?// etc. >> + >> ? /// This class provides an abstraction for programs that are executable by the >> ? /// operating system. It provides a platform generic way to find executable >> ? /// programs from the path and to execute them in various ways. The sys::Path >> @@ -26,104 +29,112 @@ >> ? /// @since 1.4 >> ? /// @brief An abstraction for finding and executing programs. >> ? class Program { >> + ? ?unsigned Pid_; >> + >> + ? ?// Noncopyable. >> + ? ?Program(const Program& other); >> + ? ?Program& operator=(const Program& other); >> + >> ? ? /// @name Methods >> ? ? /// @{ >> - ? ?public: >> - ? ? ?/// This static constructor (factory) will attempt to locate a program in >> - ? ? ?/// the operating system's file system using some pre-determined set of >> - ? ? ?/// locations to search (e.g. the PATH on Unix). >> - ? ? ?/// @returns A Path object initialized to the path of the program or a >> - ? ? ?/// Path object that is empty (invalid) if the program could not be found. >> - ? ? ?/// @throws nothing >> - ? ? ?/// @brief Construct a Program by finding it by name. >> - ? ? ?static Path FindProgramByName(const std::string& name); >> - >> - ? ? ?/// This function executes the program using the \p arguments provided and >> - ? ? ?/// waits for the program to exit. This function will block the current >> - ? ? ?/// program until the invoked program exits. The invoked program will >> - ? ? ?/// inherit the stdin, stdout, and stderr file descriptors, the >> - ? ? ?/// environment and other configuration settings of the invoking program. >> - ? ? ?/// If Path::executable() does not return true when this function is >> - ? ? ?/// called then a std::string is thrown. >> - ? ? ?/// @returns an integer result code indicating the status of the program. >> - ? ? ?/// A zero or positive value indicates the result code of the program. A >> - ? ? ?/// negative value is the signal number on which it terminated. >> - ? ? ?/// @see FindProgrambyName >> - ? ? ?/// @brief Executes the program with the given set of \p args. >> - ? ? ?static int ExecuteAndWait( >> - ? ? ? ?const Path& path, ?///< sys::Path object providing the path of the >> - ? ? ? ? ?///< program to be executed. It is presumed this is the result of >> - ? ? ? ? ?///< the FindProgramByName method. >> - ? ? ? ?const char** args, ///< A vector of strings that are passed to the >> - ? ? ? ? ?///< program. ?The first element should be the name of the program. >> - ? ? ? ? ?///< The list *must* be terminated by a null char* entry. >> - ? ? ? ?const char ** env = 0, ///< An optional vector of strings to use for >> - ? ? ? ? ?///< the program's environment. If not provided, the current program's >> - ? ? ? ? ?///< environment will be used. >> - ? ? ? ?const sys::Path** redirects = 0, ///< An optional array of pointers to >> - ? ? ? ? ?///< Paths. If the array is null, no redirection is done. The array >> - ? ? ? ? ?///< should have a size of at least three. If the pointer in the array >> - ? ? ? ? ?///< are not null, then the inferior process's stdin(0), stdout(1), >> - ? ? ? ? ?///< and stderr(2) will be redirected to the corresponding Paths. >> - ? ? ? ? ?///< When an empty Path is passed in, the corresponding file >> - ? ? ? ? ?///< descriptor will be disconnected (ie, /dev/null'd) in a portable >> - ? ? ? ? ?///< way. >> - ? ? ? ?unsigned secondsToWait = 0, ///< If non-zero, this specifies the amount >> - ? ? ? ? ?///< of time to wait for the child process to exit. If the time >> - ? ? ? ? ?///< expires, the child is killed and this call returns. If zero, >> - ? ? ? ? ?///< this function will wait until the child finishes or forever if >> - ? ? ? ? ?///< it doesn't. >> - ? ? ? ?unsigned memoryLimit = 0, ///< If non-zero, this specifies max. amount >> - ? ? ? ? ?///< of memory can be allocated by process. If memory usage will be >> - ? ? ? ? ?///< higher limit, the child is killed and this call returns. If zero >> - ? ? ? ? ?///< - no memory limit. >> - ? ? ? ?std::string* ErrMsg = 0 ///< If non-zero, provides a pointer to a string >> - ? ? ? ? ?///< instance in which error messages will be returned. If the string >> - ? ? ? ? ?///< is non-empty upon return an error occurred while invoking the >> - ? ? ? ? ?///< program. >> + ?public: >> + >> + ? ?Program() : Pid_(0) >> + ? ?{} >> + >> + ? ?/// This function executes the program using the \p arguments provided. ?The >> + ? ?/// invoked program will inherit the stdin, stdout, and stderr file >> + ? ?/// descriptors, the environment and other configuration settings of the >> + ? ?/// invoking program. If Path::executable() does not return true when this >> + ? ?/// function is called then a std::string is thrown. >> + ? ?/// @returns false in case of error, true otherwise. >> + ? ?/// @see FindProgramByName >> + ? ?/// @brief Executes the program with the given set of \p args. >> + ? ?bool Execute >> + ? ?( const Path& path, ?///< sys::Path object providing the path of the >> + ? ? ?///< program to be executed. It is presumed this is the result of >> + ? ? ?///< the FindProgramByName method. >> + ? ? ?const char** args, ///< A vector of strings that are passed to the >> + ? ? ?///< program. ?The first element should be the name of the program. >> + ? ? ?///< The list *must* be terminated by a null char* entry. >> + ? ? ?const char ** env = 0, ///< An optional vector of strings to use for >> + ? ? ?///< the program's environment. If not provided, the current program's >> + ? ? ?///< environment will be used. >> + ? ? ?const sys::Path** redirects = 0, ///< An optional array of pointers to >> + ? ? ?///< Paths. If the array is null, no redirection is done. The array >> + ? ? ?///< should have a size of at least three. If the pointer in the array >> + ? ? ?///< are not null, then the inferior process's stdin(0), stdout(1), >> + ? ? ?///< and stderr(2) will be redirected to the corresponding Paths. >> + ? ? ?///< When an empty Path is passed in, the corresponding file >> + ? ? ?///< descriptor will be disconnected (ie, /dev/null'd) in a portable >> + ? ? ?///< way. >> + ? ? ?unsigned memoryLimit = 0, ///< If non-zero, this specifies max. amount >> + ? ? ?///< of memory can be allocated by process. If memory usage will be >> + ? ? ?///< higher limit, the child is killed and this call returns. If zero >> + ? ? ?///< - no memory limit. >> + ? ? ?std::string* ErrMsg = 0 ///< If non-zero, provides a pointer to a string >> + ? ? ?///< instance in which error messages will be returned. If the string >> + ? ? ?///< is non-empty upon return an error occurred while invoking the >> + ? ? ?///< program. >> + ? ? ?); >> + >> + ? ?/// This function waits for the program to exit. This function will block >> + ? ?/// the current program until the invoked program exits. >> + ? ?/// @returns an integer result code indicating the status of the program. >> + ? ?/// A zero or positive value indicates the result code of the program. A >> + ? ?/// negative value is the signal number on which it terminated. >> + ? ?/// @see Execute >> + ? ?/// @brief Waits for the program to exit. >> + ? ?int Wait >> + ? ?( unsigned secondsToWait = 0, ///< If non-zero, this specifies the amount >> + ? ? ?///< of time to wait for the child process to exit. If the time >> + ? ? ?///< expires, the child is killed and this call returns. If zero, >> + ? ? ?///< this function will wait until the child finishes or forever if >> + ? ? ?///< it doesn't. >> + ? ? ?std::string* ErrMsg = 0 ///< If non-zero, provides a pointer to a string >> + ? ? ?///< instance in which error messages will be returned. If the string >> + ? ? ?///< is non-empty upon return an error occurred while invoking the >> + ? ? ?///< program. >> ? ? ? ); >> - ? ? ?// These methods change the specified standard stream (stdin or stdout) to >> - ? ? ?// binary mode. They return true if an error occurred >> - ? ? ?static bool ChangeStdinToBinary(); >> - ? ? ?static bool ChangeStdoutToBinary(); >> + >> + ? ?/// This static constructor (factory) will attempt to locate a program in >> + ? ?/// the operating system's file system using some pre-determined set of >> + ? ?/// locations to search (e.g. the PATH on Unix). >> + ? ?/// @returns A Path object initialized to the path of the program or a >> + ? ?/// Path object that is empty (invalid) if the program could not be found. >> + ? ?/// @throws nothing >> + ? ?/// @brief Construct a Program by finding it by name. >> + ? ?static Path FindProgramByName(const std::string& name); >> + >> + ? ?// These methods change the specified standard stream (stdin or stdout) to >> + ? ?// binary mode. They return true if an error occurred >> + ? ?static bool ChangeStdinToBinary(); >> + ? ?static bool ChangeStdoutToBinary(); >> + >> + ? ?/// A convenience function equivalent to Program prg; prg.Execute(..); >> + ? ?/// prg.Wait(..); >> + ? ?/// @throws nothing >> + ? ?/// @see Execute, Wait >> + ? ?static int ExecuteAndWait(const Path& path, >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?const char** args, >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?const char ** env = 0, >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?const sys::Path** redirects = 0, >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?unsigned secondsToWait = 0, >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?unsigned memoryLimit = 0, >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?std::string* ErrMsg = 0); >> + >> + ? ?/// A convenience function equivalent to Program prg; prg.Execute(..); >> + ? ?/// @throws nothing >> + ? ?/// @see Execute >> + ? ?static void ExecuteNoWait(const Path& path, >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?const char** args, >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?const char ** env = 0, >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?const sys::Path** redirects = 0, >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?unsigned memoryLimit = 0, >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?std::string* ErrMsg = 0); >> + >> ? ? /// @} >> >> - ? ? /// This function executes the program using the \p arguments provided and >> - ? ? /// waits for the program to exit. This function will block the current >> - ? ? /// program until the invoked program exits. The invoked program will >> - ? ? /// inherit the stdin, stdout, and stderr file descriptors, the >> - ? ? /// environment and other configuration settings of the invoking program. >> - ? ? /// If Path::executable() does not return true when this function is >> - ? ? /// called then a std::string is thrown. >> - ? ? /// @returns an integer result code indicating the status of the program. >> - ? ? /// A zero or positive value indicates the result code of the program. A >> - ? ? /// negative value is the signal number on which it terminated. >> - ? ? /// @see FindProgrambyName >> - ? ? /// @brief Executes the program with the given set of \p args. >> - ? ? static void ExecuteNoWait( >> - ? ? ? ?const Path& path, ?///< sys::Path object providing the path of the >> - ? ? ? ?///< program to be executed. It is presumed this is the result of >> - ? ? ? ?///< the FindProgramByName method. >> - ? ? ? ?const char** args, ///< A vector of strings that are passed to the >> - ? ? ? ?///< program. ?The first element should be the name of the program. >> - ? ? ? ?///< The list *must* be terminated by a null char* entry. >> - ? ? ? ?const char ** env = 0, ///< An optional vector of strings to use for >> - ? ? ? ?///< the program's environment. If not provided, the current program's >> - ? ? ? ?///< environment will be used. >> - ? ? ? ?const sys::Path** redirects = 0, ///< An optional array of pointers to >> - ? ? ? ?///< Paths. If the array is null, no redirection is done. The array >> - ? ? ? ?///< should have a size of at least three. If the pointer in the array >> - ? ? ? ?///< are not null, then the inferior process's stdin(0), stdout(1), >> - ? ? ? ?///< and stderr(2) will be redirected to the corresponding Paths. >> - ? ? ? ?unsigned memoryLimit = 0, ///< If non-zero, this specifies max. amount >> - ? ? ? ?///< of memory can be allocated by process. If memory usage will be >> - ? ? ? ?///< higher limit, the child is killed and this call returns. If zero - >> - ? ? ? ?///< no memory limit. >> - ? ? ? ?std::string* ErrMsg = 0 ///< If non-zero, provides a pointer to a string >> - ? ? ? ?///< instance in which error messages will be returned. If the string >> - ? ? ? ?///< is non-empty upon return an error occurred while invoking the >> - ? ? ? ?///< program. >> - ? ? ? ?); >> ? }; >> ?} >> ?} >> >> Modified: llvm/trunk/lib/System/Program.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Program.cpp?rev=76340&r1=76339&r2=76340&view=diff >> >> ============================================================================== >> --- llvm/trunk/lib/System/Program.cpp (original) >> +++ llvm/trunk/lib/System/Program.cpp Sat Jul 18 16:43:12 2009 >> @@ -22,6 +22,33 @@ >> ?//=== ? ? ? ? ?independent code. >> ?//===----------------------------------------------------------------------===// >> >> +int >> +Program::ExecuteAndWait(const Path& path, >> + ? ? ? ? ? ? ? ? ? ? ? ?const char** args, >> + ? ? ? ? ? ? ? ? ? ? ? ?const char** envp, >> + ? ? ? ? ? ? ? ? ? ? ? ?const Path** redirects, >> + ? ? ? ? ? ? ? ? ? ? ? ?unsigned secondsToWait, >> + ? ? ? ? ? ? ? ? ? ? ? ?unsigned memoryLimit, >> + ? ? ? ? ? ? ? ? ? ? ? ?std::string* ErrMsg) { >> + ?Program prg; >> + ?if (prg.Execute(path, args, envp, redirects, memoryLimit, ErrMsg)) >> + ? ?return prg.Wait(secondsToWait, ErrMsg); >> + ?else >> + ? ?return -1; >> +} >> + >> +void >> +Program::ExecuteNoWait(const Path& path, >> + ? ? ? ? ? ? ? ? ? ? ? const char** args, >> + ? ? ? ? ? ? ? ? ? ? ? const char** envp, >> + ? ? ? ? ? ? ? ? ? ? ? const Path** redirects, >> + ? ? ? ? ? ? ? ? ? ? ? unsigned memoryLimit, >> + ? ? ? ? ? ? ? ? ? ? ? std::string* ErrMsg) { >> + ?Program prg; >> + ?prg.Execute(path, args, envp, redirects, memoryLimit, ErrMsg); >> +} >> + >> + >> ?} >> >> ?// Include the platform-specific parts of this class. >> >> Modified: llvm/trunk/lib/System/Unix/Program.inc >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Unix/Program.inc?rev=76340&r1=76339&r2=76340&view=diff >> >> ============================================================================== >> --- llvm/trunk/lib/System/Unix/Program.inc (original) >> +++ llvm/trunk/lib/System/Unix/Program.inc Sat Jul 18 16:43:12 2009 >> @@ -142,49 +142,47 @@ >> ?#endif >> ?} >> >> -int >> -Program::ExecuteAndWait(const Path& path, >> - ? ? ? ? ? ? ? ? ? ? ? ?const char** args, >> - ? ? ? ? ? ? ? ? ? ? ? ?const char** envp, >> - ? ? ? ? ? ? ? ? ? ? ? ?const Path** redirects, >> - ? ? ? ? ? ? ? ? ? ? ? ?unsigned secondsToWait, >> - ? ? ? ? ? ? ? ? ? ? ? ?unsigned memoryLimit, >> - ? ? ? ? ? ? ? ? ? ? ? ?std::string* ErrMsg) >> +bool >> +Program::Execute(const Path& path, >> + ? ? ? ? ? ? ? ? const char** args, >> + ? ? ? ? ? ? ? ? const char** envp, >> + ? ? ? ? ? ? ? ? const Path** redirects, >> + ? ? ? ? ? ? ? ? unsigned memoryLimit, >> + ? ? ? ? ? ? ? ? std::string* ErrMsg) >> ?{ >> ? if (!path.canExecute()) { >> ? ? if (ErrMsg) >> ? ? ? *ErrMsg = path.toString() + " is not executable"; >> - ? ?return -1; >> + ? ?return false; >> ? } >> >> -#ifdef HAVE_SYS_WAIT_H >> ? // Create a child process. >> ? int child = fork(); >> ? switch (child) { >> ? ? // An error occured: ?Return to the caller. >> ? ? case -1: >> ? ? ? MakeErrMsg(ErrMsg, "Couldn't fork"); >> - ? ? ?return -1; >> + ? ? ?return false; >> >> ? ? // Child process: Execute the program. >> ? ? case 0: { >> ? ? ? // Redirect file descriptors... >> ? ? ? if (redirects) { >> ? ? ? ? // Redirect stdin >> - ? ? ? ?if (RedirectIO(redirects[0], 0, ErrMsg)) { return -1; } >> + ? ? ? ?if (RedirectIO(redirects[0], 0, ErrMsg)) { return false; } >> ? ? ? ? // Redirect stdout >> - ? ? ? ?if (RedirectIO(redirects[1], 1, ErrMsg)) { return -1; } >> + ? ? ? ?if (RedirectIO(redirects[1], 1, ErrMsg)) { return false; } >> ? ? ? ? if (redirects[1] && redirects[2] && >> ? ? ? ? ? ? *(redirects[1]) == *(redirects[2])) { >> ? ? ? ? ? // If stdout and stderr should go to the same place, redirect stderr >> ? ? ? ? ? // to the FD already open for stdout. >> ? ? ? ? ? if (-1 == dup2(1,2)) { >> ? ? ? ? ? ? MakeErrMsg(ErrMsg, "Can't redirect stderr to stdout"); >> - ? ? ? ? ? ?return -1; >> + ? ? ? ? ? ?return false; >> ? ? ? ? ? } >> ? ? ? ? } else { >> ? ? ? ? ? // Just redirect stderr >> - ? ? ? ? ?if (RedirectIO(redirects[2], 2, ErrMsg)) { return -1; } >> + ? ? ? ? ?if (RedirectIO(redirects[2], 2, ErrMsg)) { return false; } >> ? ? ? ? } >> ? ? ? } >> >> @@ -214,8 +212,23 @@ >> ? fsync(1); >> ? fsync(2); >> >> + ?Pid_ = child; >> + >> + ?return true; >> +} >> + >> +int >> +Program::Wait(unsigned secondsToWait, >> + ? ? ? ? ? ? ?std::string* ErrMsg) >> +{ >> +#ifdef HAVE_SYS_WAIT_H >> ? struct sigaction Act, Old; >> >> + ?if (Pid_ == 0) { >> + ? ?MakeErrMsg(ErrMsg, "Process not started!"); >> + ? ?return -1; >> + ?} >> + >> ? // Install a timeout handler. >> ? if (secondsToWait) { >> ? ? Timeout = false; >> @@ -229,6 +242,7 @@ >> >> ? // Parent process: Wait for the child process to terminate. >> ? int status; >> + ?int child = this->Pid_; >> ? while (wait(&status) != child) >> ? ? if (secondsToWait && errno == EINTR) { >> ? ? ? // Kill the child. >> @@ -274,78 +288,6 @@ >> >> ?} >> >> -void >> -Program::ExecuteNoWait(const Path& path, >> - ? ? ? ? ? ? ? ? ? ? ? const char** args, >> - ? ? ? ? ? ? ? ? ? ? ? const char** envp, >> - ? ? ? ? ? ? ? ? ? ? ? const Path** redirects, >> - ? ? ? ? ? ? ? ? ? ? ? unsigned memoryLimit, >> - ? ? ? ? ? ? ? ? ? ? ? std::string* ErrMsg) >> -{ >> - ?if (!path.canExecute()) { >> - ? ?if (ErrMsg) >> - ? ? ?*ErrMsg = path.toString() + " is not executable"; >> - ? ?return; >> - ?} >> - >> - ?// Create a child process. >> - ?int child = fork(); >> - ?switch (child) { >> - ? ?// An error occured: ?Return to the caller. >> - ? ?case -1: >> - ? ? ?MakeErrMsg(ErrMsg, "Couldn't fork"); >> - ? ? ?return; >> - >> - ? ?// Child process: Execute the program. >> - ? ?case 0: { >> - ? ? ?// Redirect file descriptors... >> - ? ? ?if (redirects) { >> - ? ? ? ?// Redirect stdin >> - ? ? ? ?if (RedirectIO(redirects[0], 0, ErrMsg)) { return; } >> - ? ? ? ?// Redirect stdout >> - ? ? ? ?if (RedirectIO(redirects[1], 1, ErrMsg)) { return; } >> - ? ? ? ?if (redirects[1] && redirects[2] && >> - ? ? ? ? ? ?*(redirects[1]) == *(redirects[2])) { >> - ? ? ? ? ?// If stdout and stderr should go to the same place, redirect stderr >> - ? ? ? ? ?// to the FD already open for stdout. >> - ? ? ? ? ?if (-1 == dup2(1,2)) { >> - ? ? ? ? ? ?MakeErrMsg(ErrMsg, "Can't redirect stderr to stdout"); >> - ? ? ? ? ? ?return; >> - ? ? ? ? ?} >> - ? ? ? ?} else { >> - ? ? ? ? ?// Just redirect stderr >> - ? ? ? ? ?if (RedirectIO(redirects[2], 2, ErrMsg)) { return; } >> - ? ? ? ?} >> - ? ? ?} >> - >> - ? ? ?// Set memory limits >> - ? ? ?if (memoryLimit!=0) { >> - ? ? ? ?SetMemoryLimits(memoryLimit); >> - ? ? ?} >> - >> - ? ? ?// Execute! >> - ? ? ?if (envp != 0) >> - ? ? ? ?execve (path.c_str(), (char**)args, (char**)envp); >> - ? ? ?else >> - ? ? ? ?execv (path.c_str(), (char**)args); >> - ? ? ?// If the execve() failed, we should exit and let the parent pick up >> - ? ? ?// our non-zero exit status. >> - ? ? ?exit (errno); >> - ? ?} >> - >> - ? ?// Parent process: Break out of the switch to do our processing. >> - ? ?default: >> - ? ? ?break; >> - ?} >> - >> - ?// Make sure stderr and stdout have been flushed >> - ?std::cerr << std::flush; >> - ?std::cout << std::flush; >> - ?fsync(1); >> - ?fsync(2); >> - >> -} >> - >> ?bool Program::ChangeStdinToBinary(){ >> ? // Do nothing, as Unix doesn't differentiate between text and binary. >> ? return false; >> >> Modified: llvm/trunk/lib/System/Win32/Program.inc >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Win32/Program.inc?rev=76340&r1=76339&r2=76340&view=diff >> >> ============================================================================== >> --- llvm/trunk/lib/System/Win32/Program.inc (original) >> +++ llvm/trunk/lib/System/Win32/Program.inc Sat Jul 18 16:43:12 2009 >> @@ -109,18 +109,17 @@ >> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? DWORD cbJobObjectInfoLength); >> ?#endif >> >> -int >> -Program::ExecuteAndWait(const Path& path, >> - ? ? ? ? ? ? ? ? ? ? ? ?const char** args, >> - ? ? ? ? ? ? ? ? ? ? ? ?const char** envp, >> - ? ? ? ? ? ? ? ? ? ? ? ?const Path** redirects, >> - ? ? ? ? ? ? ? ? ? ? ? ?unsigned secondsToWait, >> - ? ? ? ? ? ? ? ? ? ? ? ?unsigned memoryLimit, >> - ? ? ? ? ? ? ? ? ? ? ? ?std::string* ErrMsg) { >> +bool >> +Program::Execute(const Path& path, >> + ? ? ? ? ? ? ? ? const char** args, >> + ? ? ? ? ? ? ? ? const char** envp, >> + ? ? ? ? ? ? ? ? const Path** redirects, >> + ? ? ? ? ? ? ? ? unsigned memoryLimit, >> + ? ? ? ? ? ? ? ? std::string* ErrMsg) { >> ? if (!path.canExecute()) { >> ? ? if (ErrMsg) >> ? ? ? *ErrMsg = "program not executable"; >> - ? ?return -1; >> + ? ?return false; >> ? } >> >> ? // Windows wants a command line, not an array of args, to pass to the new >> @@ -195,13 +194,13 @@ >> ? ? si.hStdInput = RedirectIO(redirects[0], 0, ErrMsg); >> ? ? if (si.hStdInput == INVALID_HANDLE_VALUE) { >> ? ? ? MakeErrMsg(ErrMsg, "can't redirect stdin"); >> - ? ? ?return -1; >> + ? ? ?return false; >> ? ? } >> ? ? si.hStdOutput = RedirectIO(redirects[1], 1, ErrMsg); >> ? ? if (si.hStdOutput == INVALID_HANDLE_VALUE) { >> ? ? ? CloseHandle(si.hStdInput); >> ? ? ? MakeErrMsg(ErrMsg, "can't redirect stdout"); >> - ? ? ?return -1; >> + ? ? ?return false; >> ? ? } >> ? ? if (redirects[1] && redirects[2] && *(redirects[1]) == *(redirects[2])) { >> ? ? ? // If stdout and stderr should go to the same place, redirect stderr >> @@ -216,7 +215,7 @@ >> ? ? ? ? CloseHandle(si.hStdInput); >> ? ? ? ? CloseHandle(si.hStdOutput); >> ? ? ? ? MakeErrMsg(ErrMsg, "can't redirect stderr"); >> - ? ? ? ?return -1; >> + ? ? ? ?return false; >> ? ? ? } >> ? ? } >> ? } >> @@ -242,8 +241,9 @@ >> ? ? SetLastError(err); >> ? ? MakeErrMsg(ErrMsg, std::string("Couldn't execute program '") + >> ? ? ? ? ? ? ? ?path.toString() + "'"); >> - ? ?return -1; >> + ? ?return false; >> ? } >> + ?Pid_ = pi.dwProcessId; >> >> ? // Make sure these get closed no matter what. >> ? AutoHandle hProcess(pi.hProcess); >> @@ -270,204 +270,50 @@ >> ? ? ? MakeErrMsg(ErrMsg, std::string("Unable to set memory limit")); >> ? ? ? TerminateProcess(pi.hProcess, 1); >> ? ? ? WaitForSingleObject(pi.hProcess, INFINITE); >> - ? ? ?return -1; >> + ? ? ?return false; >> ? ? } >> ? } >> >> - ?// Wait for it to terminate. >> + ?return true; >> +} >> + >> +int >> +Program::Wait(unsigned secondsToWait, >> + ? ? ? ? ? ? ?std::string* ErrMsg) { >> + ?if (Pid_ == 0) { >> + ? ?MakeErrMsg(ErrMsg, "Process not started!"); >> + ? ?return -1; >> + ?} >> + >> + ?AutoHandle hProcess = OpenProcess(SYNCHRONIZE, FALSE, Pid_); >> + >> + ?// Wait for the process to terminate. >> ? DWORD millisecondsToWait = INFINITE; >> ? if (secondsToWait > 0) >> ? ? millisecondsToWait = secondsToWait * 1000; >> >> - ?if (WaitForSingleObject(pi.hProcess, millisecondsToWait) == WAIT_TIMEOUT) { >> - ? ?if (!TerminateProcess(pi.hProcess, 1)) { >> - ? ? ?MakeErrMsg(ErrMsg, std::string("Failed to terminate timed-out program '") >> - ? ? ? ? ?+ path.toString() + "'"); >> + ?if (WaitForSingleObject(hProcess, millisecondsToWait) == WAIT_TIMEOUT) { >> + ? ?if (!TerminateProcess(hProcess, 1)) { >> + ? ? ?MakeErrMsg(ErrMsg, "Failed to terminate timed-out program."); >> ? ? ? return -1; >> ? ? } >> - ? ?WaitForSingleObject(pi.hProcess, INFINITE); >> + ? ?WaitForSingleObject(hProcess, INFINITE); >> ? } >> >> ? // Get its exit status. >> ? DWORD status; >> - ?rc = GetExitCodeProcess(pi.hProcess, &status); >> - ?err = GetLastError(); >> + ?BOOL rc = GetExitCodeProcess(hProcess, &status); >> + ?DWORD err = GetLastError(); >> >> ? if (!rc) { >> ? ? SetLastError(err); >> - ? ?MakeErrMsg(ErrMsg, std::string("Failed getting status for program '") + >> - ? ? ? ? ? ? ? path.toString() + "'"); >> + ? ?MakeErrMsg(ErrMsg, "Failed getting status for program."); >> ? ? return -1; >> ? } >> >> ? return status; >> ?} >> >> -void >> -Program::ExecuteNoWait(const Path& path, >> - ? ? ? ? ? ? ? ? ? ? ? const char** args, >> - ? ? ? ? ? ? ? ? ? ? ? const char** envp, >> - ? ? ? ? ? ? ? ? ? ? ? const Path** redirects, >> - ? ? ? ? ? ? ? ? ? ? ? unsigned memoryLimit, >> - ? ? ? ? ? ? ? ? ? ? ? std::string* ErrMsg) { >> - ?if (!path.canExecute()) { >> - ? ?if (ErrMsg) >> - ? ? ?*ErrMsg = "program not executable"; >> - ? ?return; >> - ?} >> - >> - ?// Windows wants a command line, not an array of args, to pass to the new >> - ?// process. ?We have to concatenate them all, while quoting the args that >> - ?// have embedded spaces. >> - >> - ?// First, determine the length of the command line. >> - ?unsigned len = 0; >> - ?for (unsigned i = 0; args[i]; i++) { >> - ? ?len += strlen(args[i]) + 1; >> - ? ?if (strchr(args[i], ' ')) >> - ? ? ?len += 2; >> - ?} >> - >> - ?// Now build the command line. >> - ?char *command = reinterpret_cast(_alloca(len+1)); >> - ?char *p = command; >> - >> - ?for (unsigned i = 0; args[i]; i++) { >> - ? ?const char *arg = args[i]; >> - ? ?size_t len = strlen(arg); >> - ? ?bool needsQuoting = strchr(arg, ' ') != 0; >> - ? ?if (needsQuoting) >> - ? ? ?*p++ = '"'; >> - ? ?memcpy(p, arg, len); >> - ? ?p += len; >> - ? ?if (needsQuoting) >> - ? ? ?*p++ = '"'; >> - ? ?*p++ = ' '; >> - ?} >> - >> - ?*p = 0; >> - >> - ?// The pointer to the environment block for the new process. >> - ?char *envblock = 0; >> - >> - ?if (envp) { >> - ? ?// An environment block consists of a null-terminated block of >> - ? ?// null-terminated strings. Convert the array of environment variables to >> - ? ?// an environment block by concatenating them. >> - >> - ? ?// First, determine the length of the environment block. >> - ? ?len = 0; >> - ? ?for (unsigned i = 0; envp[i]; i++) >> - ? ? ?len += strlen(envp[i]) + 1; >> - >> - ? ?// Now build the environment block. >> - ? ?envblock = reinterpret_cast(_alloca(len+1)); >> - ? ?p = envblock; >> - >> - ? ?for (unsigned i = 0; envp[i]; i++) { >> - ? ? ?const char *ev = envp[i]; >> - ? ? ?size_t len = strlen(ev) + 1; >> - ? ? ?memcpy(p, ev, len); >> - ? ? ?p += len; >> - ? ?} >> - >> - ? ?*p = 0; >> - ?} >> - >> - ?// Create a child process. >> - ?STARTUPINFO si; >> - ?memset(&si, 0, sizeof(si)); >> - ?si.cb = sizeof(si); >> - ?si.hStdInput = INVALID_HANDLE_VALUE; >> - ?si.hStdOutput = INVALID_HANDLE_VALUE; >> - ?si.hStdError = INVALID_HANDLE_VALUE; >> - >> - ?if (redirects) { >> - ? ?si.dwFlags = STARTF_USESTDHANDLES; >> - >> - ? ?si.hStdInput = RedirectIO(redirects[0], 0, ErrMsg); >> - ? ?if (si.hStdInput == INVALID_HANDLE_VALUE) { >> - ? ? ?MakeErrMsg(ErrMsg, "can't redirect stdin"); >> - ? ? ?return; >> - ? ?} >> - ? ?si.hStdOutput = RedirectIO(redirects[1], 1, ErrMsg); >> - ? ?if (si.hStdOutput == INVALID_HANDLE_VALUE) { >> - ? ? ?CloseHandle(si.hStdInput); >> - ? ? ?MakeErrMsg(ErrMsg, "can't redirect stdout"); >> - ? ? ?return; >> - ? ?} >> - ? ?if (redirects[1] && redirects[2] && *(redirects[1]) == *(redirects[2])) { >> - ? ? ?// If stdout and stderr should go to the same place, redirect stderr >> - ? ? ?// to the handle already open for stdout. >> - ? ? ?DuplicateHandle(GetCurrentProcess(), si.hStdOutput, >> - ? ? ? ? ? ? ? ? ? ? ?GetCurrentProcess(), &si.hStdError, >> - ? ? ? ? ? ? ? ? ? ? ?0, TRUE, DUPLICATE_SAME_ACCESS); >> - ? ?} else { >> - ? ? ?// Just redirect stderr >> - ? ? ?si.hStdError = RedirectIO(redirects[2], 2, ErrMsg); >> - ? ? ?if (si.hStdError == INVALID_HANDLE_VALUE) { >> - ? ? ? ?CloseHandle(si.hStdInput); >> - ? ? ? ?CloseHandle(si.hStdOutput); >> - ? ? ? ?MakeErrMsg(ErrMsg, "can't redirect stderr"); >> - ? ? ? ?return; >> - ? ? ?} >> - ? ?} >> - ?} >> - >> - ?PROCESS_INFORMATION pi; >> - ?memset(&pi, 0, sizeof(pi)); >> - >> - ?fflush(stdout); >> - ?fflush(stderr); >> - ?BOOL rc = CreateProcess(path.c_str(), command, NULL, NULL, TRUE, 0, >> - ? ? ? ? ? ? ? ? ? ? ? ? ?envblock, NULL, &si, &pi); >> - ?DWORD err = GetLastError(); >> - >> - ?// Regardless of whether the process got created or not, we are done with >> - ?// the handles we created for it to inherit. >> - ?CloseHandle(si.hStdInput); >> - ?CloseHandle(si.hStdOutput); >> - ?CloseHandle(si.hStdError); >> - >> - ?// Now return an error if the process didn't get created. >> - ?if (!rc) >> - ?{ >> - ? ?SetLastError(err); >> - ? ?MakeErrMsg(ErrMsg, std::string("Couldn't execute program '") + >> - ? ? ? ? ? ? ? path.toString() + "'"); >> - ? ?return; >> - ?} >> - >> - ?// Make sure these get closed no matter what. >> - ?AutoHandle hProcess(pi.hProcess); >> - ?AutoHandle hThread(pi.hThread); >> - >> - ?// Assign the process to a job if a memory limit is defined. >> - ?AutoHandle hJob(0); >> - ?if (memoryLimit != 0) { >> - ? ?hJob = CreateJobObject(0, 0); >> - ? ?bool success = false; >> - ? ?if (hJob != 0) { >> - ? ? ?JOBOBJECT_EXTENDED_LIMIT_INFORMATION jeli; >> - ? ? ?memset(&jeli, 0, sizeof(jeli)); >> - ? ? ?jeli.BasicLimitInformation.LimitFlags = JOB_OBJECT_LIMIT_PROCESS_MEMORY; >> - ? ? ?jeli.ProcessMemoryLimit = uintptr_t(memoryLimit) * 1048576; >> - ? ? ?if (SetInformationJobObject(hJob, JobObjectExtendedLimitInformation, >> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?&jeli, sizeof(jeli))) { >> - ? ? ? ?if (AssignProcessToJobObject(hJob, pi.hProcess)) >> - ? ? ? ? ?success = true; >> - ? ? ?} >> - ? ?} >> - ? ?if (!success) { >> - ? ? ?SetLastError(GetLastError()); >> - ? ? ?MakeErrMsg(ErrMsg, std::string("Unable to set memory limit")); >> - ? ? ?TerminateProcess(pi.hProcess, 1); >> - ? ? ?WaitForSingleObject(pi.hProcess, INFINITE); >> - ? ? ?return; >> - ? ?} >> - ?} >> -} >> - >> ?bool Program::ChangeStdinToBinary(){ >> ? int result = _setmode( _fileno(stdin), _O_BINARY ); >> ? return result == -1; >> >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >> > From eli.friedman at gmail.com Mon Aug 3 00:08:04 2009 From: eli.friedman at gmail.com (Eli Friedman) Date: Sun, 2 Aug 2009 22:08:04 -0700 Subject: [llvm-commits] [llvm] r77940 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86InstrMMX.td test/CodeGen/X86/2009-08-02-mmx-scalar-to-vector.ll test/CodeGen/X86/mmx-bitcast-to-i64.ll In-Reply-To: <38a0d8450908022033w46f17d6dy2f403ad3c1624653@mail.gmail.com> References: <200908030245.n732jZ5E007719@zion.cs.uiuc.edu> <38a0d8450908021953ld211ee2y426145b3b4312443@mail.gmail.com> <38a0d8450908022020y3cce3809sefbc5f7f3b3538b0@mail.gmail.com> <38a0d8450908022033w46f17d6dy2f403ad3c1624653@mail.gmail.com> Message-ID: On Sun, Aug 2, 2009 at 8:33 PM, Rafael Espindola wrote: >> I don't see any connection between the way it's written and for the >> assembler and the way the JIT deals with it. ?And you still haven't >> addressed the issue, which is that I'm pretty sure it was done for >> compatibility reasons. ?If you don't know anything about that, I would >> suggest switching it back to movd. > > Do you know what we are trying to be compatible with? I looked it up; we are trying to be compatible with OS X. See http://lists.cs.uiuc.edu/pipermail/llvmdev/2007-December/011849.html . -Eli From daniel at zuster.org Mon Aug 3 00:12:16 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Mon, 03 Aug 2009 05:12:16 -0000 Subject: [llvm-commits] [llvm] r77954 - in /llvm/trunk/utils: FileUpdate/ FileUpdate/CMakeLists.txt FileUpdate/FileUpdate.cpp FileUpdate/Makefile Makefile Message-ID: <200908030512.n735CGLK012426@zion.cs.uiuc.edu> Author: ddunbar Date: Mon Aug 3 00:12:16 2009 New Revision: 77954 URL: http://llvm.org/viewvc/llvm-project?rev=77954&view=rev Log: Add FileUpdate tool, conditionally updates its output based on its input. - Gratuitous and unused, but possibly useful one day. Added: llvm/trunk/utils/FileUpdate/ (with props) llvm/trunk/utils/FileUpdate/CMakeLists.txt llvm/trunk/utils/FileUpdate/FileUpdate.cpp llvm/trunk/utils/FileUpdate/Makefile Modified: llvm/trunk/utils/Makefile Propchange: llvm/trunk/utils/FileUpdate/ ------------------------------------------------------------------------------ --- svn:ignore (added) +++ svn:ignore Mon Aug 3 00:12:16 2009 @@ -0,0 +1,3 @@ +Debug +Release-Asserts +Release Added: llvm/trunk/utils/FileUpdate/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/FileUpdate/CMakeLists.txt?rev=77954&view=auto ============================================================================== --- llvm/trunk/utils/FileUpdate/CMakeLists.txt (added) +++ llvm/trunk/utils/FileUpdate/CMakeLists.txt Mon Aug 3 00:12:16 2009 @@ -0,0 +1,11 @@ +add_executable(FileUpdate + FileUpdate.cpp + ) + +target_link_libraries(FileUpdate LLVMSupport LLVMSystem) +if( MINGW ) + target_link_libraries(FileUpdate imagehlp psapi) +endif( MINGW ) +if( LLVM_ENABLE_THREADS AND HAVE_LIBPTHREAD ) + target_link_libraries(FileUpdate pthread) +endif() Added: llvm/trunk/utils/FileUpdate/FileUpdate.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/FileUpdate/FileUpdate.cpp?rev=77954&view=auto ============================================================================== --- llvm/trunk/utils/FileUpdate/FileUpdate.cpp (added) +++ llvm/trunk/utils/FileUpdate/FileUpdate.cpp Mon Aug 3 00:12:16 2009 @@ -0,0 +1,86 @@ +//===- FileUpdate.cpp - Conditionally update a file -----------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// FileUpdate is a utility for conditionally updating a file from its input +// based on whether the input differs from the output. It is used to avoid +// unnecessary modifications in a build system. +// +//===----------------------------------------------------------------------===// + +#include "llvm/Support/CommandLine.h" +#include "llvm/Support/MemoryBuffer.h" +#include "llvm/Support/PrettyStackTrace.h" +#include "llvm/Support/raw_ostream.h" +#include "llvm/System/Signals.h" +using namespace llvm; + +static cl::opt +Quiet("quiet", cl::desc("Don't print unnecessary status information"), + cl::init(false)); + +static cl::opt +InputFilename("input-file", cl::desc("Input file (defaults to stdin)"), + cl::init("-"), cl::value_desc("filename")); + +static cl::opt +OutputFilename(cl::Positional, cl::desc(""), cl::Required); + +int main(int argc, char **argv) { + sys::PrintStackTraceOnErrorSignal(); + PrettyStackTraceProgram X(argc, argv); + cl::ParseCommandLineOptions(argc, argv); + + // Get the input data. + std::string ErrorStr; + MemoryBuffer *In = + MemoryBuffer::getFileOrSTDIN(InputFilename.c_str(), &ErrorStr); + if (In == 0) { + errs() << argv[0] << ": error: Unable to get input '" + << InputFilename << "': " << ErrorStr << '\n'; + return 1; + } + + // Get the output data. + MemoryBuffer *Out = MemoryBuffer::getFile(OutputFilename.c_str(), &ErrorStr); + + // If the output exists and the contents match, we are done. + if (Out && In->getBufferSize() == Out->getBufferSize() && + memcmp(In->getBufferStart(), Out->getBufferStart(), + Out->getBufferSize()) == 0) { + if (!Quiet) + outs() << argv[0] << ": Not updating '" << OutputFilename + << "', contents match input.\n"; + return 0; + } + + delete Out; + + // Otherwise, overwrite the output. + if (!Quiet) + outs() << argv[0] << ": Updating '" << OutputFilename + << "', contents changed.\n"; + raw_fd_ostream OutStream(OutputFilename.c_str(), /*Binary=*/true, + /*Force=*/true, ErrorStr); + if (!ErrorStr.empty()) { + errs() << argv[0] << ": Unable to write output '" + << OutputFilename << "': " << ErrorStr << '\n'; + return 1; + } + + OutStream.write(In->getBufferStart(), In->getBufferSize()); + OutStream.close(); + + if (OutStream.has_error()) { + errs() << argv[0] << ": Could not open output file '" + << OutputFilename << "': " << ErrorStr << '\n'; + return 1; + } + + return 0; +} Added: llvm/trunk/utils/FileUpdate/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/FileUpdate/Makefile?rev=77954&view=auto ============================================================================== --- llvm/trunk/utils/FileUpdate/Makefile (added) +++ llvm/trunk/utils/FileUpdate/Makefile Mon Aug 3 00:12:16 2009 @@ -0,0 +1,18 @@ +##===- utils/FileUpdate/Makefile ---------------------------*- Makefile -*-===## +# +# The LLVM Compiler Infrastructure +# +# This file is distributed under the University of Illinois Open Source +# License. See LICENSE.TXT for details. +# +##===----------------------------------------------------------------------===## + +LEVEL = ../.. +TOOLNAME = FileUpdate +USEDLIBS = LLVMSupport.a LLVMSystem.a + +# This tool has no plugins, optimize startup time. +TOOL_NO_EXPORTS = 1 + +include $(LEVEL)/Makefile.common + Modified: llvm/trunk/utils/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/Makefile?rev=77954&r1=77953&r2=77954&view=diff ============================================================================== --- llvm/trunk/utils/Makefile (original) +++ llvm/trunk/utils/Makefile Mon Aug 3 00:12:16 2009 @@ -8,7 +8,7 @@ ##===----------------------------------------------------------------------===## LEVEL = .. -PARALLEL_DIRS := TableGen fpcmp PerfectShuffle FileCheck unittest +PARALLEL_DIRS := TableGen fpcmp PerfectShuffle FileCheck FileUpdate unittest EXTRA_DIST := cgiplotNLT.pl check-each-file codegen-diff countloc.sh cvsupdate \ DSAclean.py DSAextract.py emacs findsym.pl GenLibDeps.pl \ From rafael.espindola at gmail.com Mon Aug 3 00:21:05 2009 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Mon, 03 Aug 2009 05:21:05 -0000 Subject: [llvm-commits] [llvm] r77956 - in /llvm/trunk: lib/Target/X86/X86InstrMMX.td test/CodeGen/X86/mmx-bitcast-to-i64.ll Message-ID: <200908030521.n735L5GJ012715@zion.cs.uiuc.edu> Author: rafael Date: Mon Aug 3 00:21:05 2009 New Revision: 77956 URL: http://llvm.org/viewvc/llvm-project?rev=77956&view=rev Log: Use movd instead of movq Modified: llvm/trunk/lib/Target/X86/X86InstrMMX.td llvm/trunk/test/CodeGen/X86/mmx-bitcast-to-i64.ll Modified: llvm/trunk/lib/Target/X86/X86InstrMMX.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrMMX.td?rev=77956&r1=77955&r2=77956&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrMMX.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrMMX.td Mon Aug 3 00:21:05 2009 @@ -164,11 +164,14 @@ []>; let neverHasSideEffects = 1 in { +// These are 64 bit moves, but since the OS X assembler doesn't +// recognize a register-register movq, we write them as +// movd. def MMX_MOVD64from64rr : MMXRI<0x7E, MRMDestReg, (outs GR64:$dst), (ins VR64:$src), - "movq\t{$src, $dst|$dst, $src}", []>; + "movd\t{$src, $dst|$dst, $src}", []>; def MMX_MOVD64rrv164 : MMXI<0x6E, MRMSrcReg, (outs VR64:$dst), (ins GR64:$src), - "movq\t{$src, $dst|$dst, $src}", + "movd\t{$src, $dst|$dst, $src}", [(set VR64:$dst, (v1i64 (scalar_to_vector GR64:$src)))]>; } Modified: llvm/trunk/test/CodeGen/X86/mmx-bitcast-to-i64.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mmx-bitcast-to-i64.ll?rev=77956&r1=77955&r2=77956&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/mmx-bitcast-to-i64.ll (original) +++ llvm/trunk/test/CodeGen/X86/mmx-bitcast-to-i64.ll Mon Aug 3 00:21:05 2009 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep movq | count 8 +; RUN: llvm-as < %s | llc -march=x86-64 | grep movd | count 4 define i64 @foo(<1 x i64>* %p) { %t = load <1 x i64>* %p From espindola at google.com Mon Aug 3 00:21:48 2009 From: espindola at google.com (Rafael Espindola) Date: Mon, 3 Aug 2009 01:21:48 -0400 Subject: [llvm-commits] [llvm] r77940 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86InstrMMX.td test/CodeGen/X86/2009-08-02-mmx-scalar-to-vector.ll test/CodeGen/X86/mmx-bitcast-to-i64.ll In-Reply-To: References: <200908030245.n732jZ5E007719@zion.cs.uiuc.edu> <38a0d8450908021953ld211ee2y426145b3b4312443@mail.gmail.com> <38a0d8450908022020y3cce3809sefbc5f7f3b3538b0@mail.gmail.com> <38a0d8450908022033w46f17d6dy2f403ad3c1624653@mail.gmail.com> Message-ID: <38a0d8450908022221g249b491fscd19d17ce463a4fa@mail.gmail.com> > I looked it up; we are trying to be compatible with OS X. ?See > http://lists.cs.uiuc.edu/pipermail/llvmdev/2007-December/011849.html . Thanks. I updated both the old and the new code to use movd and added a comment explaining why. > -Eli > Cheers, -- Rafael Avila de Espindola Google | Gordon House | Barrow Street | Dublin 4 | Ireland Registered in Dublin, Ireland | Registration Number: 368047 From stoklund at 2pi.dk Mon Aug 3 00:28:33 2009 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Mon, 3 Aug 2009 07:28:33 +0200 Subject: [llvm-commits] [llvm] r77904 - in /llvm/trunk: include/llvm/CodeGen/RegisterScavenging.h lib/CodeGen/RegisterScavenging.cpp test/CodeGen/Blackfin/load-intr.ll In-Reply-To: <92746321-5A4D-4AF1-BABD-63CB31689F86@apple.com> References: <200908021828.n72ISgpe023594@zion.cs.uiuc.edu> <92746321-5A4D-4AF1-BABD-63CB31689F86@apple.com> Message-ID: <8877A6FA-F9B8-4C42-9BD2-68E1BE821CD2@2pi.dk> On 03/08/2009, at 04.03, Evan Cheng wrote: > > On Aug 2, 2009, at 11:28 AM, Jakob Stoklund Olesen wrote: > >> >> /// setUsed - Set the register and its sub-registers as being used. >> void RegScavenger::setUsed(unsigned Reg) { >> RegsAvailable.reset(Reg); >> @@ -218,7 +226,7 @@ >> const MachineOperand MO = *UseMOs[i].first; >> unsigned Reg = MO.getReg(); >> >> - assert(isUsed(Reg) && "Using an undefined register!"); >> + assert((MO.isImplicit() || isUsed(Reg)) && "Using an undefined >> register!"); > > Hi Jakob, > > I don't understand why this is necessary. It's seems like it will end > up letting a lot of real errors go through. Clearly I was too quick to commit this part. Sorry about that. I will try to make it work with the stricter rule. Then I can back out this part. >> @@ -269,7 +277,8 @@ >> >> // Implicit def is allowed to "re-define" any register. Similarly, >> // implicitly defined registers can be clobbered. >> - assert((isReserved(Reg) || isUnused(Reg) || >> + assert((MO.isImplicit() || isReserved(Reg) || isUnused(Reg) || >> + isSuperRegUsed(Reg) || >> isLiveInButUnusedBefore(Reg, MI, MBB, TRI, MRI)) && >> "Re-defining a live register!"); >> setUsed(Reg); But this part is OK, right? can redefine a live register. /jakob From clattner at apple.com Mon Aug 3 00:34:55 2009 From: clattner at apple.com (Chris Lattner) Date: Sun, 2 Aug 2009 22:34:55 -0700 Subject: [llvm-commits] [PATCH] Scavenging callee-saved registers In-Reply-To: <5757CCF4-9B9B-4786-98E8-A7486B992C09@apple.com> References: <1D2FC7E7-BD36-451A-9BA4-D65B6F907748@apple.com> <2E97116B-1A5D-456B-91AE-541376595DA1@2pi.dk> <5757CCF4-9B9B-4786-98E8-A7486B992C09@apple.com> Message-ID: On Aug 2, 2009, at 1:00 PM, Evan Cheng wrote: >> >> I noticed that ARM tries to predict this situation so an extra CSR >> can be spilled. That probably means that ARM will never meet this >> situation. Unless it guesses wrong for some reason. Blackfin is not >> so advanced yet. It cannot predict scavenger use. > > Looks good. Please commit. > > I have a plan to completely revamp the use of register scavenger. > Basically I want PEI to introduce virtual registers instead of > scavenging. At the end of PEI it will do another round register > allocation using the scavenger. ... with the constraint that the new vregs have are defined by one instruction and killed by the next, right? -Chris From evan.cheng at apple.com Mon Aug 3 00:38:13 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Sun, 2 Aug 2009 22:38:13 -0700 Subject: [llvm-commits] [PATCH] Scavenging callee-saved registers In-Reply-To: References: <1D2FC7E7-BD36-451A-9BA4-D65B6F907748@apple.com> <2E97116B-1A5D-456B-91AE-541376595DA1@2pi.dk> <5757CCF4-9B9B-4786-98E8-A7486B992C09@apple.com> Message-ID: <7BC48F0F-8CA1-4CED-A9F3-2C5BABDE30C7@apple.com> On Aug 2, 2009, at 10:34 PM, Chris Lattner wrote: > > On Aug 2, 2009, at 1:00 PM, Evan Cheng wrote: > >>> >>> I noticed that ARM tries to predict this situation so an extra CSR >>> can be spilled. That probably means that ARM will never meet this >>> situation. Unless it guesses wrong for some reason. Blackfin is not >>> so advanced yet. It cannot predict scavenger use. >> >> Looks good. Please commit. >> >> I have a plan to completely revamp the use of register scavenger. >> Basically I want PEI to introduce virtual registers instead of >> scavenging. At the end of PEI it will do another round register >> allocation using the scavenger. > > ... with the constraint that the new vregs have are defined by one > instruction and killed by the next, right? Yes, with the exception of use-def by a series of two-address instructions. Evan > > -Chris > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Mon Aug 3 00:42:26 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Sun, 2 Aug 2009 22:42:26 -0700 Subject: [llvm-commits] [llvm] r77904 - in /llvm/trunk: include/llvm/CodeGen/RegisterScavenging.h lib/CodeGen/RegisterScavenging.cpp test/CodeGen/Blackfin/load-intr.ll In-Reply-To: <8877A6FA-F9B8-4C42-9BD2-68E1BE821CD2@2pi.dk> References: <200908021828.n72ISgpe023594@zion.cs.uiuc.edu> <92746321-5A4D-4AF1-BABD-63CB31689F86@apple.com> <8877A6FA-F9B8-4C42-9BD2-68E1BE821CD2@2pi.dk> Message-ID: <9E2FF46A-8D50-487E-9DBA-B2943AAE1699@apple.com> On Aug 2, 2009, at 10:28 PM, Jakob Stoklund Olesen wrote: > > On 03/08/2009, at 04.03, Evan Cheng wrote: > >> >> On Aug 2, 2009, at 11:28 AM, Jakob Stoklund Olesen wrote: >> >>> >>> /// setUsed - Set the register and its sub-registers as being used. >>> void RegScavenger::setUsed(unsigned Reg) { >>> RegsAvailable.reset(Reg); >>> @@ -218,7 +226,7 @@ >>> const MachineOperand MO = *UseMOs[i].first; >>> unsigned Reg = MO.getReg(); >>> >>> - assert(isUsed(Reg) && "Using an undefined register!"); >>> + assert((MO.isImplicit() || isUsed(Reg)) && "Using an undefined >>> register!"); >> >> Hi Jakob, >> >> I don't understand why this is necessary. It's seems like it will end >> up letting a lot of real errors go through. > > Clearly I was too quick to commit this part. Sorry about that. It's ok. It didn't break anything. I am just concerned of it not catching some potential bugs. > > I will try to make it work with the stricter rule. Then I can back out > this part. Ok. Thanks. > >>> @@ -269,7 +277,8 @@ >>> >>> // Implicit def is allowed to "re-define" any register. Similarly, >>> // implicitly defined registers can be clobbered. >>> - assert((isReserved(Reg) || isUnused(Reg) || >>> + assert((MO.isImplicit() || isReserved(Reg) || isUnused(Reg) || >>> + isSuperRegUsed(Reg) || >>> isLiveInButUnusedBefore(Reg, MI, MBB, TRI, MRI)) && >>> "Re-defining a live register!"); >>> setUsed(Reg); > > But this part is OK, right? can redefine a live register. It shouldn't. Are you talking about re-defining part of a larger register? In that case, it should first kill the larger register and then redefine it. At least that's what livevariable does. It's unclear if it's realistic to enforce this in register scavenger. This might be too difficult to maintain. I need to see an example. Evan > > /jakob > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From eocallaghan at auroraux.org Mon Aug 3 00:59:48 2009 From: eocallaghan at auroraux.org (Edward O'Callaghan) Date: Mon, 03 Aug 2009 05:59:48 -0000 Subject: [llvm-commits] [compiler-rt] r77958 - in /compiler-rt/trunk: CMakeLists.txt ConfigureChecks.cmake cmake/ cmake/Modules/ cmake/Modules/MacroEnsureOutOfSourceBuild.cmake config.h.cmake lib/CMakeLists.txt lib/divdc3.c lib/divsc3.c lib/divxc3.c lib/floatundidf.c lib/int_lib.h lib/muldc3.c lib/mulsc3.c lib/mulxc3.c Message-ID: <200908030559.n735xnn4014007@zion.cs.uiuc.edu> Author: evocallaghan Date: Mon Aug 3 00:59:48 2009 New Revision: 77958 URL: http://llvm.org/viewvc/llvm-project?rev=77958&view=rev Log: Fix newlinew warning in floatundidf.c , Bulkout CMake system more, complete port to AuroraUX and Solaris. Added: compiler-rt/trunk/ConfigureChecks.cmake compiler-rt/trunk/cmake/ compiler-rt/trunk/cmake/Modules/ compiler-rt/trunk/cmake/Modules/MacroEnsureOutOfSourceBuild.cmake compiler-rt/trunk/config.h.cmake Modified: compiler-rt/trunk/CMakeLists.txt compiler-rt/trunk/lib/CMakeLists.txt compiler-rt/trunk/lib/divdc3.c compiler-rt/trunk/lib/divsc3.c compiler-rt/trunk/lib/divxc3.c compiler-rt/trunk/lib/floatundidf.c compiler-rt/trunk/lib/int_lib.h compiler-rt/trunk/lib/muldc3.c compiler-rt/trunk/lib/mulsc3.c compiler-rt/trunk/lib/mulxc3.c Modified: compiler-rt/trunk/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/CMakeLists.txt?rev=77958&r1=77957&r2=77958&view=diff ============================================================================== --- compiler-rt/trunk/CMakeLists.txt (original) +++ compiler-rt/trunk/CMakeLists.txt Mon Aug 3 00:59:48 2009 @@ -8,14 +8,13 @@ set(PACKAGE_STRING "${PACKAGE_NAME} ${PACKAGE_VERSION}") set(PACKAGE_BUGREPORT "llvmbugs at cs.uiuc.edu") -if( CMAKE_SOURCE_DIR STREQUAL CMAKE_BINARY_DIR AND NOT MSVC_IDE ) - message(FATAL_ERROR "In-source builds are not allowed. -CMake would overwrite the makefiles distributed with Compiler-RT. -Please create a directory and run cmake from there, passing the path -to this source directory as the last argument. -This process created the file `CMakeCache.txt' and the directory `CMakeFiles'. -Please delete them.") -endif() +SET( CMAKE_MODULE_PATH ${CMAKE_SOURCE_DIR}/cmake/Modules ) + +# Disallow in-source build +INCLUDE( MacroEnsureOutOfSourceBuild ) +MACRO_ENSURE_OUT_OF_SOURCE_BUILD( + "${PROJECT_NAME} requires an out of source build. Please create a separate build directory and run 'cmake /path/to/${PROJECT_NAME} [options]' there." + ) install(DIRECTORY include DESTINATION . @@ -30,3 +29,5 @@ # Tests are being ignored for until the very basics are working. # ADD_SUBDIRECTORY( test ) +INCLUDE( ConfigureChecks.cmake ) +CONFIGURE_FILE( config.h.cmake ${CMAKE_CURRENT_BINARY_DIR}/config.h ) Added: compiler-rt/trunk/ConfigureChecks.cmake URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/ConfigureChecks.cmake?rev=77958&view=auto ============================================================================== --- compiler-rt/trunk/ConfigureChecks.cmake (added) +++ compiler-rt/trunk/ConfigureChecks.cmake Mon Aug 3 00:59:48 2009 @@ -0,0 +1,16 @@ +INCLUDE( CheckIncludeFile ) +INCLUDE( CheckFunctionExists ) + +SET( PACKAGE ${PACKAGE_NAME} ) +SET( VERSION ${PACKAGE_VERSION} ) + +SET( BINARYDIR ${CMAKE_BINARY_DIR} ) +SET( SOURCEDIR ${CMAKE_SOURCE_DIR} ) + +# HEADER FILES +CHECK_INCLUDE_FILE( sys/byteorder.h HAVE_SYS_BYTEORDER_H ) + +# FUNCTIONS +#CHECK_FUNCTION_EXISTS( strlcpy HAVE_STRLCPY ) + +#Example ConfigureChecks.cmake Added: compiler-rt/trunk/cmake/Modules/MacroEnsureOutOfSourceBuild.cmake URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/cmake/Modules/MacroEnsureOutOfSourceBuild.cmake?rev=77958&view=auto ============================================================================== --- compiler-rt/trunk/cmake/Modules/MacroEnsureOutOfSourceBuild.cmake (added) +++ compiler-rt/trunk/cmake/Modules/MacroEnsureOutOfSourceBuild.cmake Mon Aug 3 00:59:48 2009 @@ -0,0 +1,18 @@ +# MACRO_ENSURE_OUT_OF_SOURCE_BUILD() + +macro( MACRO_ENSURE_OUT_OF_SOURCE_BUILD _errorMessage ) + +string( COMPARE EQUAL "${CMAKE_SOURCE_DIR}" "${CMAKE_BINARY_DIR}" _insource ) +if( _insource ) + message( SEND_ERROR "${_errorMessage}" ) + message( FATAL_ERROR + "In-source builds are not allowed. + CMake would overwrite the makefiles distributed with Compiler-RT. + Please create a directory and run cmake from there, passing the path + to this source directory as the last argument. + This process created the file `CMakeCache.txt' and the directory `CMakeFiles'. + Please delete them." + ) +endif( _insource ) + +endmacro( MACRO_ENSURE_OUT_OF_SOURCE_BUILD ) Added: compiler-rt/trunk/config.h.cmake URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/config.h.cmake?rev=77958&view=auto ============================================================================== --- compiler-rt/trunk/config.h.cmake (added) +++ compiler-rt/trunk/config.h.cmake Mon Aug 3 00:59:48 2009 @@ -0,0 +1,3 @@ +#cmakedefine HAVE_SYS_BYTEORDER_H ${HAVE_SYS_BYTEORDER} + +#Example config.h.cmake Modified: compiler-rt/trunk/lib/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/CMakeLists.txt?rev=77958&r1=77957&r2=77958&view=diff ============================================================================== --- compiler-rt/trunk/lib/CMakeLists.txt (original) +++ compiler-rt/trunk/lib/CMakeLists.txt Mon Aug 3 00:59:48 2009 @@ -1,6 +1,10 @@ # # Create a library called "CompilerRT" which includes the source files. +#INCLUDE_DIRECTORIES( +# ${CMAKE_CURRENT_BINARY_DIR} +#) + # Generic functions needed for each architecture SET( SRCS Modified: compiler-rt/trunk/lib/divdc3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/divdc3.c?rev=77958&r1=77957&r2=77958&view=diff ============================================================================== --- compiler-rt/trunk/lib/divdc3.c (original) +++ compiler-rt/trunk/lib/divdc3.c Mon Aug 3 00:59:48 2009 @@ -15,6 +15,10 @@ #include #include +#if !defined(INFINITY) && defined(HUGE_VAL) +#define INFINITY HUGE_VAL +#endif + // Returns: the quotient of (a + ib) / (c + id) double _Complex Modified: compiler-rt/trunk/lib/divsc3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/divsc3.c?rev=77958&r1=77957&r2=77958&view=diff ============================================================================== --- compiler-rt/trunk/lib/divsc3.c (original) +++ compiler-rt/trunk/lib/divsc3.c Mon Aug 3 00:59:48 2009 @@ -15,6 +15,10 @@ #include #include +#if !defined(INFINITY) && defined(HUGE_VAL) +#define INFINITY HUGE_VAL +#endif + // Returns: the quotient of (a + ib) / (c + id) float _Complex Modified: compiler-rt/trunk/lib/divxc3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/divxc3.c?rev=77958&r1=77957&r2=77958&view=diff ============================================================================== --- compiler-rt/trunk/lib/divxc3.c (original) +++ compiler-rt/trunk/lib/divxc3.c Mon Aug 3 00:59:48 2009 @@ -17,6 +17,10 @@ #include #include +#if !defined(INFINITY) && defined(HUGE_VAL) +#define INFINITY HUGE_VAL +#endif + // Returns: the quotient of (a + ib) / (c + id) long double _Complex Modified: compiler-rt/trunk/lib/floatundidf.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/floatundidf.c?rev=77958&r1=77957&r2=77958&view=diff ============================================================================== --- compiler-rt/trunk/lib/floatundidf.c (original) +++ compiler-rt/trunk/lib/floatundidf.c Mon Aug 3 00:59:48 2009 @@ -98,4 +98,4 @@ fb.u.low = (su_int)a; // mantissa-low return fb.f; } -#endif \ No newline at end of file +#endif Modified: compiler-rt/trunk/lib/int_lib.h URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/int_lib.h?rev=77958&r1=77957&r2=77958&view=diff ============================================================================== --- compiler-rt/trunk/lib/int_lib.h (original) +++ compiler-rt/trunk/lib/int_lib.h Mon Aug 3 00:59:48 2009 @@ -20,6 +20,34 @@ #include +// TODO: Improve this to minimal pre-processor hackish'ness. +#if defined (__SVR4) && defined (__sun) +// config.h build via CMake. +//#include + +// Solaris header for endian and byte swap +//#if defined HAVE_SYS_BYTEORDER_H +#include + +// Solaris defines endian by setting _LITTLE_ENDIAN or _BIG_ENDIAN +#ifdef _BIG_ENDIAN +# define IS_BIG_ENDIAN +#endif +#ifdef _LITTLE_ENDIAN +# define IS_LITTLE_ENDIAN +#endif + +#ifdef IS_BIG_ENDIAN +#define __BIG_ENDIAN__ 1 +#define __LITTLE_ENDIAN__ 0 +#endif +#ifdef IS_LITTLE_ENDIAN +#define __BIG_ENDIAN__ 0 +#define __LITTLE_ENDIAN__ 1 +#endif + +#endif //End of Solaris ifdef. + #ifdef __LITTLE_ENDIAN__ #if __LITTLE_ENDIAN__ #define _YUGA_LITTLE_ENDIAN 1 Modified: compiler-rt/trunk/lib/muldc3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/muldc3.c?rev=77958&r1=77957&r2=77958&view=diff ============================================================================== --- compiler-rt/trunk/lib/muldc3.c (original) +++ compiler-rt/trunk/lib/muldc3.c Mon Aug 3 00:59:48 2009 @@ -15,6 +15,10 @@ #include #include +#if !defined(INFINITY) && defined(HUGE_VAL) +#define INFINITY HUGE_VAL +#endif + // Returns: the product of a + ib and c + id double _Complex Modified: compiler-rt/trunk/lib/mulsc3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/mulsc3.c?rev=77958&r1=77957&r2=77958&view=diff ============================================================================== --- compiler-rt/trunk/lib/mulsc3.c (original) +++ compiler-rt/trunk/lib/mulsc3.c Mon Aug 3 00:59:48 2009 @@ -15,6 +15,10 @@ #include #include +#if !defined(INFINITY) && defined(HUGE_VAL) +#define INFINITY HUGE_VAL +#endif + // Returns: the product of a + ib and c + id float _Complex Modified: compiler-rt/trunk/lib/mulxc3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/mulxc3.c?rev=77958&r1=77957&r2=77958&view=diff ============================================================================== --- compiler-rt/trunk/lib/mulxc3.c (original) +++ compiler-rt/trunk/lib/mulxc3.c Mon Aug 3 00:59:48 2009 @@ -17,6 +17,10 @@ #include #include +#if !defined(INFINITY) && defined(HUGE_VAL) +#define INFINITY HUGE_VAL +#endif + // Returns: the product of a + ib and c + id long double _Complex From clattner at apple.com Mon Aug 3 01:17:19 2009 From: clattner at apple.com (Chris Lattner) Date: Sun, 2 Aug 2009 23:17:19 -0700 Subject: [llvm-commits] [Backend API CHANGE] Calling-convention lowering proposal update In-Reply-To: <658EABAC-26A5-47E1-B35C-917891E1BE42@apple.com> References: <658EABAC-26A5-47E1-B35C-917891E1BE42@apple.com> Message-ID: On Aug 2, 2009, at 12:15 PM, Dan Gohman wrote: > Hello, > > Here is a new version of my major calling-convention patch, which was > first described here: > > http://lists.cs.uiuc.edu/pipermail/llvmdev/2009-April/021908.html > > In summary, this patch simpifies the way information is passed between > target-independent code and target-dependent code. Instead of encoding > lots of information in FORMAL_ARGUMENTS, CALL, and RET nodes > which must be decoded, the information is now kept in regular data > structures, and communicated via APIs. It also reworks how tail > calls are > lowered. Looks very nice to me! -Chris From dpatel at apple.com Mon Aug 3 01:19:02 2009 From: dpatel at apple.com (Devang Patel) Date: Mon, 03 Aug 2009 06:19:02 -0000 Subject: [llvm-commits] [llvm] r77959 - in /llvm/trunk: include/llvm/Metadata.h lib/VMCore/Metadata.cpp Message-ID: <200908030619.n736J2Oc014713@zion.cs.uiuc.edu> Author: dpatel Date: Mon Aug 3 01:19:01 2009 New Revision: 77959 URL: http://llvm.org/viewvc/llvm-project?rev=77959&view=rev Log: Add NamedMDNode destructor. Modified: llvm/trunk/include/llvm/Metadata.h llvm/trunk/lib/VMCore/Metadata.cpp Modified: llvm/trunk/include/llvm/Metadata.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Metadata.h?rev=77959&r1=77958&r2=77959&view=diff ============================================================================== --- llvm/trunk/include/llvm/Metadata.h (original) +++ llvm/trunk/include/llvm/Metadata.h Mon Aug 3 01:19:01 2009 @@ -200,6 +200,15 @@ return new NamedMDNode(N, MDs, NumMDs, M); } + /// eraseFromParent - Drop all references and remove the node from parent + /// module. + void eraseFromParent(); + + /// dropAllReferences - Remove all uses and clear node vector. + void dropAllReferences(); + + ~NamedMDNode(); + typedef SmallVectorImpl::const_iterator const_elem_iterator; /// getParent - Get the module that holds this named metadata collection. Modified: llvm/trunk/lib/VMCore/Metadata.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Metadata.cpp?rev=77959&r1=77958&r2=77959&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Metadata.cpp (original) +++ llvm/trunk/lib/VMCore/Metadata.cpp Mon Aug 3 01:19:01 2009 @@ -83,3 +83,20 @@ if (ParentModule) ParentModule->getNamedMDList().push_back(this); } + +/// eraseFromParent - Drop all references and remove the node from parent +/// module. +void NamedMDNode::eraseFromParent() { + dropAllReferences(); + getParent()->getNamedMDList().erase(this); +} + +/// dropAllReferences - Remove all uses and clear node vector. +void NamedMDNode::dropAllReferences() { + // FIXME: Update metadata use list. + Node.clear(); +} + +NamedMDNode::~NamedMDNode() { + dropAllReferences(); +} From stoklund at 2pi.dk Mon Aug 3 01:37:02 2009 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Mon, 3 Aug 2009 08:37:02 +0200 Subject: [llvm-commits] [Backend API CHANGE] Calling-convention lowering proposal update In-Reply-To: <658EABAC-26A5-47E1-B35C-917891E1BE42@apple.com> References: <658EABAC-26A5-47E1-B35C-917891E1BE42@apple.com> Message-ID: <04AC113E-7DD7-4A4F-BCAC-BB8BDB13568A@2pi.dk> On 02/08/2009, at 21.15, Dan Gohman wrote: > Hello, > > Here is a new version of my major calling-convention patch, which was > first described here: > > http://lists.cs.uiuc.edu/pipermail/llvmdev/2009-April/021908.html > > In summary, this patch simpifies the way information is passed between > target-independent code and target-dependent code. Instead of encoding > lots of information in FORMAL_ARGUMENTS, CALL, and RET nodes > which must be decoded, the information is now kept in regular data > structures, and communicated via APIs. It also reworks how tail > calls are > lowered. Very nice. While you are at it: It seems like every target defines an identical RET_FLAG node. I wonder if that could be lifted to common code as well? [...] > - Ported to trunk and updated for all targets (including Blackfin!). Impressive! [...] > Oh, and I haven't tested Blackfin yet, but I will as soon as it > settles in. But it appears to be a straight-forward target, so I'm not > worried. I quickly tested your patch, and it looks OK to me. The Blackfin call lowering code is almost entirely cargo cult programming, the XCore target was particularly nice to steal from. If something looks odd it is probably because of a mistake, not because I was being clever. I have not tried actually running the generated code yet, neither on silicon nor on a simulator, so there are probably bugs. I can just as easily fix them in your new code than in the old cargo cult code, so don't delay committing this because you haven't properly tested Blackfin yet. /jakob From clattner at apple.com Mon Aug 3 01:38:31 2009 From: clattner at apple.com (Chris Lattner) Date: Sun, 2 Aug 2009 23:38:31 -0700 Subject: [llvm-commits] [llvm] r77897 - in /llvm/trunk: include/llvm/ADT/ lib/Support/ lib/Target/Blackfin/ lib/Target/Blackfin/AsmPrinter/ lib/Target/Blackfin/TargetInfo/ test/CodeGen/Blackfin/ In-Reply-To: <200908021732.n72HWDeN021521@zion.cs.uiuc.edu> References: <200908021732.n72HWDeN021521@zion.cs.uiuc.edu> Message-ID: <9400D51E-1FC4-44DD-A33D-8B0E6701D975@apple.com> On Aug 2, 2009, at 10:32 AM, Jakob Stoklund Olesen wrote: > Author: stoklund > Date: Sun Aug 2 12:32:10 2009 > New Revision: 77897 > > Analog Devices Blackfin back-end. > > Generate code for the Blackfin family of DSPs from Analog Devices: > > http://www.analog.com/en/embedded-processing-dsp/blackfin/processors/index.html Very nice! Here are my last round of nit-picky comments :) > + > + // We must load delta into ScratchReg and add that. > + loadConstant(MBB, I, DL, ScratchReg, delta); > + if (BF::PRegClass.contains(Reg)) { > + assert (BF::PRegClass.contains(ScratchReg)); Minor syntax thing: please don't use a space after assert, assert is a function-like macro, not a control flow construct. > +void BlackfinRegisterInfo:: > +eliminateCallFramePseudoInstr(MachineFunction &MF, > + MachineBasicBlock &MBB, > + MachineBasicBlock::iterator I) const { > + if (!hasReservedCallFrame(MF)) { > + int64_t Amount = I->getOperand(0).getImm(); > + if (Amount != 0) { > + assert(Amount%4 == 0); Also, it is good practice to add some sort of message to the asserts. Something like: assert(Amount%4 == 0 && "stack should be 4 byte aligned"); Would be good. > > +void BlackfinRegisterInfo::eliminateFrameIndex > (MachineBasicBlock::iterator II, > + int SPAdj, > + RegScavenger *RS) > const { > + unsigned i; Please shrink the live range of i by declaring it right before it is used. Also, it is best to only name things "i" if they are loop induction variables defined in the loop but not live out. Since this is an important value used throughout the function, it would be best to name it something more evocative. > + MachineInstr &MI = *II; > + MachineBasicBlock &MBB = *MI.getParent(); > + MachineFunction &MF = *MBB.getParent(); > + DebugLoc DL = MI.getDebugLoc(); > + > + for (i=0; !MI.getOperand(i).isFI(); i++) { Please use preincrement (++i). Even though it doesn't matter for ints, it is good for consistency. > +++ llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.h Sun Aug 2 > 12:32:10 2009 > @@ -0,0 +1,114 @@ > + > + template > + static inline bool isImm(int x) { > + return x >= -(1<<(N-1)) && x < (1<<(N-1)); > + } > + > + template > + static inline bool isUimm(unsigned x) { > + return x < (1< + } This looks like a generally handy set of templates, can you hoist these up to llvm/Support/MathExtras.h and turn them into templates on the integer type like: template static inline bool isUimm(T x) { return x < ((T)1< +BlackfinTargetAsmInfo::BlackfinTargetAsmInfo() { > + GlobalPrefix = "_"; > + CommentString = "//"; Ah, I knew we supported multicharacter comments for a reason ;-) Thanks for building this! -Chris From clattner at apple.com Mon Aug 3 01:46:13 2009 From: clattner at apple.com (Chris Lattner) Date: Sun, 2 Aug 2009 23:46:13 -0700 Subject: [llvm-commits] [llvm] r77740 - in /llvm/trunk: include/llvm/CodeGen/AsmPrinter.h lib/CodeGen/AsmPrinter/AsmPrinter.cpp test/CodeGen/X86/2009-04-17-tls-fast.ll test/CodeGen/X86/tls1-pic.ll test/CodeGen/X86/tls2-pic.ll test/CodeGen/X86/tls3-pic.ll test/CodeGen/X86/tls4-pic.ll utils/TableGen/AsmWriterEmitter.cpp In-Reply-To: <4A7458D7.9090808@obbligato.org> References: <200907312157.n6VLvAKm021365@zion.cs.uiuc.edu> <311483A5-7349-4EDE-8179-54BB2B81BAFB@apple.com> <4A7458D7.9090808@obbligato.org> Message-ID: <679A075B-43B1-4ACD-B18C-0B8C7356BA2A@apple.com> On Aug 1, 2009, at 8:01 AM, David Greene wrote: Chris Lattner wrote: >> I'm not seeing this kick in. On X86, I'm seeing stuff like: >> >> _get_results: >> LBB2_0: ## entry >> pushl %ebx >> pushl %edi >> pushl %esi >> subl $48, %esp >> testl %edx, %edx >> movl %ecx, %esi >> je LBB2_4 ## bb >> >> >> Shouldn't the esp/edx/esi be lined up? What am I missing here? > > Two things: > > - There aren't any tabs in X86InstInfo.td (after the mnemonic, that > is) Aha, duh. Ok :). > - FirstOperandColumn = 0 and MaxOperandLength = 0 in X86TargetAsmInfo > which disables the padding. Ok, this gets back to another question I have. I don't think that these should be properties of TAI, at least not unless there are other clients of this information. The TAI::getOperandColumn() method in particular seems like an implementation detail of the asmprinter, not something that should be in TAI. However, more broadly, these are not properties that should be checked when the asmprinter is running. If these were properties of the "InstrInfo" class in the .td files, then X86 (for example), could be defined like this (X86.td): def X86InstrInfo : InstrInfo { let FirstOperandColumn = 42; // or whatever. let MaxOperandLength = 20; ... The nice thing about doing this is that if the target doesn't opt in to this, that the tblgen generated code for the asmwriter *wouldn't treat tab specially at all* and would not have to dynamically decide not to do column padding. The generated code would still have to dynamically check whether verbose-asm is enabled, but there should be no need to dynamically check to see if the asm syntax likes tabs. Making these values constants also allows them to constant fold in the generated code. >>> +/// PadToColumn - This gets called every time a tab is emitted. If >>> +/// column padding is turned on, we replace the tab with the >>> +/// appropriate amount of padding. If not, we replace the tab >>> with a >>> +/// space, except for the first operand so that initial operands >>> are >>> +/// always lined up by tabs. >>> +void AsmPrinter::PadToColumn(unsigned Operand) const { >>> + if (TAI->getOperandColumn(Operand) > 0) { >> >> Is this just a complex way to test for "FirstOperandColumn != 0" ? > > No, it's testing 0 for any operand, not just the first. Ok, maybe I'm not following it right then. When does this check fail? Can this be removed by moving the "column padding turned on" flag to the .td files? >>> @@ -852,6 +733,8 @@ >>> << " if (TAI->getOperandColumn(1) > 0) {\n" >>> << " // Don't emit trailing whitespace, let the column padding >>> do it. This\n" >>> << " // guarantees that a stray long opcode + tab won't upset >>> the alignment.\n" >>> + << " // We need to handle this special case here because >>> sometimes the initial\n" >>> + << " // mnemonic string includes a tab or space and >>> sometimes >>> it doesn't.\n" >>> << " unsigned OpLength = std::strlen(AsmStrs+(Bits & " << (1 >>> << >>> AsmStrBits)-1 << "));\n" >>> << " if (OpLength > 0 &&\n" >>> << " ((AsmStrs+(Bits & " << (1 << AsmStrBits)-1 << >>> "))[OpLength-1] == ' ' ||\n" >> >> Should this just be a considered a bug in .td files that don't do >> this >> right? What is the harm of just leaving this out? > > Because AsmStrs gets generated by TableGen. I'm not sure that .td > files actually have control over it since TableGen does the encoding > compaction itself. Look at X86GenAsdmWriter[1].inc for example. I'm not following what you mean here. Can you give me an example that shows what this does? -Chris From sabre at nondot.org Mon Aug 3 01:49:39 2009 From: sabre at nondot.org (Chris Lattner) Date: Mon, 3 Aug 2009 01:49:39 -0500 Subject: [llvm-commits] CVS: llvm-www/ProjectsWithLLVM/index.html Message-ID: <200908030649.n736ndhX015797@zion.cs.uiuc.edu> Changes in directory llvm-www/ProjectsWithLLVM: index.html updated: 1.48 -> 1.49 --- Log message: add macruby --- Diffs of the changes: (+35 -0) index.html | 35 +++++++++++++++++++++++++++++++++++ 1 files changed, 35 insertions(+) Index: llvm-www/ProjectsWithLLVM/index.html diff -u llvm-www/ProjectsWithLLVM/index.html:1.48 llvm-www/ProjectsWithLLVM/index.html:1.49 --- llvm-www/ProjectsWithLLVM/index.html:1.48 Sun Apr 26 20:27:24 2009 +++ llvm-www/ProjectsWithLLVM/index.html Mon Aug 3 01:48:42 2009 @@ -35,6 +35,7 @@
+ +
+MacRuby +
+ +
+By the +MacRuby Project Team +
+ +
+

+MacRuby is a free software project, +sponsored by Apple. +The goal of the MacRuby project is to be 100% compatible +syntactically and behaviorally with Ruby 1.9, +while providing seamless integration with Objective-C. +So, there are significant differences in the internals of the runtime. +

+ +

+For example, +MacRuby classes and objects are actually Objective-C objects, +allowing subclassing, method overloading, +and conversion-free object exchange with the Objective-C runtime. +MacRuby also uses the new Objective-C garbage collector engine, +instead of the traditional Ruby GC. +For more information, see the +Overview. +

+ +
+ +
TTA-based Codesign Environment (TCE)
From stoklund at 2pi.dk Mon Aug 3 01:53:55 2009 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Mon, 3 Aug 2009 08:53:55 +0200 Subject: [llvm-commits] [llvm] r77904 - in /llvm/trunk: include/llvm/CodeGen/RegisterScavenging.h lib/CodeGen/RegisterScavenging.cpp test/CodeGen/Blackfin/load-intr.ll In-Reply-To: <9E2FF46A-8D50-487E-9DBA-B2943AAE1699@apple.com> References: <200908021828.n72ISgpe023594@zion.cs.uiuc.edu> <92746321-5A4D-4AF1-BABD-63CB31689F86@apple.com> <8877A6FA-F9B8-4C42-9BD2-68E1BE821CD2@2pi.dk> <9E2FF46A-8D50-487E-9DBA-B2943AAE1699@apple.com> Message-ID: <0288F26C-52F6-40C5-A693-6A5110D12E6B@2pi.dk> On 03/08/2009, at 07.42, Evan Cheng wrote: >> >> But this part is OK, right? can redefine a live register. > > It shouldn't. Are you talking about re-defining part of a larger > register? In that case, it should first kill the larger register and > then redefine it. At least that's what livevariable does. It's unclear > if it's realistic to enforce this in register scavenger. This might be > too difficult to maintain. I need to see an example. At least that makes the rules clearer - no special treatment for implicit operands. This means that you must always know if a register is dead or alive before use use of define it in any way. It could work. I don't think the scavenger should enforce this rule through assertions. A double define does not break the scavenger in any way, it just makes it a bit less efficient - it is a missed available register, that is all. I think the machine code verifier should catch these bugs, and the scavenger should only assert when stuff would break. Use of undefined registers is another matter. It means that a register was killed too soon, and the scavenger could mistakenly overwrite it. That would be bad, and an assert is in order. I will implement the strict rules in the verifier. Then we can see how bad the status quo is and get some examples of breakage. /jakob From nicholas at mxc.ca Mon Aug 3 01:54:58 2009 From: nicholas at mxc.ca (Nick Lewycky) Date: Sun, 02 Aug 2009 23:54:58 -0700 Subject: [llvm-commits] [llvm] r77956 - in /llvm/trunk: lib/Target/X86/X86InstrMMX.td test/CodeGen/X86/mmx-bitcast-to-i64.ll In-Reply-To: <200908030521.n735L5GJ012715@zion.cs.uiuc.edu> References: <200908030521.n735L5GJ012715@zion.cs.uiuc.edu> Message-ID: <4A7689C2.7080408@mxc.ca> Rafael, this patch is causing tablegen to emit: Warning: neverHasSideEffects set on instruction 'MMX_MOVD64rrv164' which already has a pattern You can see this on a buildbot such as: http://google1.osuosl.org:8011/builders/llvm-x86_64-linux/builds/6062/steps/compile/logs/stdio Please take a look. Nick Rafael Espindola wrote: > Author: rafael > Date: Mon Aug 3 00:21:05 2009 > New Revision: 77956 > > URL: http://llvm.org/viewvc/llvm-project?rev=77956&view=rev > Log: > Use movd instead of movq > > Modified: > llvm/trunk/lib/Target/X86/X86InstrMMX.td > llvm/trunk/test/CodeGen/X86/mmx-bitcast-to-i64.ll > > Modified: llvm/trunk/lib/Target/X86/X86InstrMMX.td > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrMMX.td?rev=77956&r1=77955&r2=77956&view=diff > > ============================================================================== > --- llvm/trunk/lib/Target/X86/X86InstrMMX.td (original) > +++ llvm/trunk/lib/Target/X86/X86InstrMMX.td Mon Aug 3 00:21:05 2009 > @@ -164,11 +164,14 @@ > []>; > > let neverHasSideEffects = 1 in { > +// These are 64 bit moves, but since the OS X assembler doesn't > +// recognize a register-register movq, we write them as > +// movd. > def MMX_MOVD64from64rr : MMXRI<0x7E, MRMDestReg, > (outs GR64:$dst), (ins VR64:$src), > - "movq\t{$src, $dst|$dst, $src}", []>; > + "movd\t{$src, $dst|$dst, $src}", []>; > def MMX_MOVD64rrv164 : MMXI<0x6E, MRMSrcReg, (outs VR64:$dst), (ins GR64:$src), > - "movq\t{$src, $dst|$dst, $src}", > + "movd\t{$src, $dst|$dst, $src}", > [(set VR64:$dst, (v1i64 (scalar_to_vector GR64:$src)))]>; > } > > > Modified: llvm/trunk/test/CodeGen/X86/mmx-bitcast-to-i64.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mmx-bitcast-to-i64.ll?rev=77956&r1=77955&r2=77956&view=diff > > ============================================================================== > --- llvm/trunk/test/CodeGen/X86/mmx-bitcast-to-i64.ll (original) > +++ llvm/trunk/test/CodeGen/X86/mmx-bitcast-to-i64.ll Mon Aug 3 00:21:05 2009 > @@ -1,4 +1,4 @@ > -; RUN: llvm-as < %s | llc -march=x86-64 | grep movq | count 8 > +; RUN: llvm-as < %s | llc -march=x86-64 | grep movd | count 4 > > define i64 @foo(<1 x i64>* %p) { > %t = load <1 x i64>* %p > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From evan.cheng at apple.com Mon Aug 3 02:13:47 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 3 Aug 2009 00:13:47 -0700 Subject: [llvm-commits] [llvm] r77904 - in /llvm/trunk: include/llvm/CodeGen/RegisterScavenging.h lib/CodeGen/RegisterScavenging.cpp test/CodeGen/Blackfin/load-intr.ll In-Reply-To: <0288F26C-52F6-40C5-A693-6A5110D12E6B@2pi.dk> References: <200908021828.n72ISgpe023594@zion.cs.uiuc.edu> <92746321-5A4D-4AF1-BABD-63CB31689F86@apple.com> <8877A6FA-F9B8-4C42-9BD2-68E1BE821CD2@2pi.dk> <9E2FF46A-8D50-487E-9DBA-B2943AAE1699@apple.com> <0288F26C-52F6-40C5-A693-6A5110D12E6B@2pi.dk> Message-ID: <3ADC65B6-778B-498C-8FCD-C9FF3FC72984@apple.com> On Aug 2, 2009, at 11:53 PM, Jakob Stoklund Olesen wrote: > > On 03/08/2009, at 07.42, Evan Cheng wrote: > >>> >>> But this part is OK, right? can redefine a live register. >> >> It shouldn't. Are you talking about re-defining part of a larger >> register? In that case, it should first kill the larger register and >> then redefine it. At least that's what livevariable does. It's >> unclear >> if it's realistic to enforce this in register scavenger. This might >> be >> too difficult to maintain. I need to see an example. > > At least that makes the rules clearer - no special treatment for > implicit operands. This means that you must always know if a register > is dead or alive before use use of define it in any way. It could > work. Right. > > I don't think the scavenger should enforce this rule through > assertions. A double define does not break the scavenger in any way, > it just makes it a bit less efficient - it is a missed available > register, that is all. I think the machine code verifier should catch > these bugs, and the scavenger should only assert when stuff would > break. You are absolutely right. But we're not yet running the machine verifier by default that means we are using the scavenger for that purpose. It caught a lot of corner cases like these. On more than one occasion I'd thought about just removing the assertions. :-) Note the assertions are turned off in release mode so these bugs are being left through. > > Use of undefined registers is another matter. It means that a register > was killed too soon, and the scavenger could mistakenly overwrite it. > That would be bad, and an assert is in order. Right. We ought to use the newly introduced error reporting mechanism instead. Assertions are not strong enough here. The only concern I have is the compile time cost. Some of the assertions checks are implemented less than optimally. > > I will implement the strict rules in the verifier. Then we can see how > bad the status quo is and get some examples of breakage. Ok thanks. This is really really hard to get right. I really appreciate that someone else is hacking on it. :-) Please see my replies to [PATCH] Fix Bug 4657: register scavenger asserts with subreg lowering and [PATCH] Accidental on two-address operand for more discussion on these issues. Evan > > /jakob > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090803/cb9fd9ae/attachment.html From nicholas at mxc.ca Mon Aug 3 02:16:43 2009 From: nicholas at mxc.ca (Nick Lewycky) Date: Mon, 03 Aug 2009 07:16:43 -0000 Subject: [llvm-commits] [llvm] r77960 - in /llvm/trunk/tools/lto: LTOCodeGenerator.cpp LTOCodeGenerator.h lto.cpp Message-ID: <200908030716.n737GhAj016782@zion.cs.uiuc.edu> Author: nicholas Date: Mon Aug 3 02:16:42 2009 New Revision: 77960 URL: http://llvm.org/viewvc/llvm-project?rev=77960&view=rev Log: Remove the GCC path from libLTO. This has been superceded by setAssemblerPath. Modified: llvm/trunk/tools/lto/LTOCodeGenerator.cpp llvm/trunk/tools/lto/LTOCodeGenerator.h llvm/trunk/tools/lto/lto.cpp Modified: llvm/trunk/tools/lto/LTOCodeGenerator.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto/LTOCodeGenerator.cpp?rev=77960&r1=77959&r2=77960&view=diff ============================================================================== --- llvm/trunk/tools/lto/LTOCodeGenerator.cpp (original) +++ llvm/trunk/tools/lto/LTOCodeGenerator.cpp Mon Aug 3 02:16:42 2009 @@ -76,7 +76,7 @@ _linker("LinkTimeOptimizer", "ld-temp.o", _context), _target(NULL), _emitDwarfDebugInfo(false), _scopeRestrictionsDone(false), _codeModel(LTO_CODEGEN_PIC_MODEL_DYNAMIC), - _nativeObjectFile(NULL), _gccPath(NULL), _assemblerPath(NULL) + _nativeObjectFile(NULL), _assemblerPath(NULL) { InitializeAllTargets(); InitializeAllAsmPrinters(); @@ -126,13 +126,6 @@ return true; } -void LTOCodeGenerator::setGccPath(const char* path) -{ - if ( _gccPath ) - delete _gccPath; - _gccPath = new sys::Path(path); -} - void LTOCodeGenerator::setAssemblerPath(const char* path) { if ( _assemblerPath ) @@ -240,9 +233,6 @@ if ( _assemblerPath ) { tool = *_assemblerPath; needsCompilerOptions = false; - } - else if ( _gccPath ) { - tool = *_gccPath; } else { // find compiler driver tool = sys::Program::FindProgramByName("gcc"); Modified: llvm/trunk/tools/lto/LTOCodeGenerator.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto/LTOCodeGenerator.h?rev=77960&r1=77959&r2=77960&view=diff ============================================================================== --- llvm/trunk/tools/lto/LTOCodeGenerator.h (original) +++ llvm/trunk/tools/lto/LTOCodeGenerator.h Mon Aug 3 02:16:42 2009 @@ -37,7 +37,6 @@ bool addModule(class LTOModule*, std::string& errMsg); bool setDebugInfo(lto_debug_model, std::string& errMsg); bool setCodePICModel(lto_codegen_model, std::string& errMsg); - void setGccPath(const char* path); void setAssemblerPath(const char* path); void addMustPreserveSymbol(const char* sym); bool writeMergedModules(const char* path, @@ -63,7 +62,6 @@ StringSet _mustPreserveSymbols; llvm::MemoryBuffer* _nativeObjectFile; std::vector _codegenOptions; - llvm::sys::Path* _gccPath; llvm::sys::Path* _assemblerPath; }; Modified: llvm/trunk/tools/lto/lto.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto/lto.cpp?rev=77960&r1=77959&r2=77960&view=diff ============================================================================== --- llvm/trunk/tools/lto/lto.cpp (original) +++ llvm/trunk/tools/lto/lto.cpp Mon Aug 3 02:16:42 2009 @@ -203,14 +203,6 @@ } // -// sets the path to gcc -// -void lto_codegen_set_gcc_path(lto_code_gen_t cg, const char* path) -{ - cg->setGccPath(path); -} - -// // sets the path to the assembler tool // void lto_codegen_set_assembler_path(lto_code_gen_t cg, const char* path) From eli.friedman at gmail.com Mon Aug 3 03:07:15 2009 From: eli.friedman at gmail.com (Eli Friedman) Date: Mon, 3 Aug 2009 01:07:15 -0700 Subject: [llvm-commits] [llvm] r77927 - in /llvm/trunk: include/llvm/Target/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/Blackfin/ lib/Target/CBackend/ lib/Target/CellSPU/ lib/Target/CppBackend/ lib/Target/MSIL/ lib/Target/MSP430/ lib/Target/Mips/ lib/Ta Message-ID: On Sun, Aug 2, 2009 at 4:37 PM, Daniel Dunbar wrote: > Author: ddunbar > Date: Sun Aug ?2 18:37:13 2009 > New Revision: 77927 > > URL: http://llvm.org/viewvc/llvm-project?rev=77927&view=rev > Log: > Move most targets TargetMachine constructor to only taking a target triple. > ?- The C, C++, MSIL, and Mips backends still need the module. I took care of the Mips backend earlier. It looks like the C, C++ and MSIL backends need the DataLayout member of the Module; perhaps the standard signature for initializing a target should include that as a separate argument? -Eli From asl at math.spbu.ru Mon Aug 3 03:12:59 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Mon, 03 Aug 2009 08:12:59 -0000 Subject: [llvm-commits] [llvm] r77962 - in /llvm/trunk: lib/Target/X86/X86CallingConv.td lib/Target/X86/X86CompilationCallback_Win64.asm lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86Instr64bit.td lib/Target/X86/X86InstrInfo.td lib/Target/X86/X86RegisterInfo.cpp lib/Target/X86/X86TargetMachine.cpp test/CodeGen/X86/2009-06-03-Win64DisableRedZone.ll test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll Message-ID: <200908030813.n738D4Qg030803@zion.cs.uiuc.edu> Author: asl Date: Mon Aug 3 03:12:53 2009 New Revision: 77962 URL: http://llvm.org/viewvc/llvm-project?rev=77962&view=rev Log: Unbreak Win64 CC. Step one: honour register save area, fix some alignment and provide a different set of call-clobberred registers. Modified: llvm/trunk/lib/Target/X86/X86CallingConv.td llvm/trunk/lib/Target/X86/X86CompilationCallback_Win64.asm llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/lib/Target/X86/X86Instr64bit.td llvm/trunk/lib/Target/X86/X86InstrInfo.td llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp llvm/trunk/lib/Target/X86/X86TargetMachine.cpp llvm/trunk/test/CodeGen/X86/2009-06-03-Win64DisableRedZone.ll llvm/trunk/test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll Modified: llvm/trunk/lib/Target/X86/X86CallingConv.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CallingConv.td?rev=77962&r1=77961&r2=77962&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86CallingConv.td (original) +++ llvm/trunk/lib/Target/X86/X86CallingConv.td Mon Aug 3 03:12:53 2009 @@ -201,8 +201,8 @@ [XMM0, XMM1, XMM2, XMM3]>>, // Integer/FP values get stored in stack slots that are 8 bytes in size and - // 16-byte aligned if there are no more registers to hold them. - CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 16>>, + // 8-byte aligned if there are no more registers to hold them. + CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 8>>, // Long doubles get stack slots whose size and alignment depends on the // subtarget. @@ -211,8 +211,8 @@ // Vectors get 16-byte stack slots that are 16-byte aligned. CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], CCAssignToStack<16, 16>>, - // __m64 vectors get 8-byte stack slots that are 16-byte aligned. - CCIfType<[v8i8, v4i16, v2i32, v1i64], CCAssignToStack<8, 16>> + // __m64 vectors get 8-byte stack slots that are 8-byte aligned. + CCIfType<[v8i8, v4i16, v2i32, v1i64], CCAssignToStack<8, 8>> ]>; //===----------------------------------------------------------------------===// Modified: llvm/trunk/lib/Target/X86/X86CompilationCallback_Win64.asm URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CompilationCallback_Win64.asm?rev=77962&r1=77961&r2=77962&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86CompilationCallback_Win64.asm (original) +++ llvm/trunk/lib/Target/X86/X86CompilationCallback_Win64.asm Mon Aug 3 03:12:53 2009 @@ -15,52 +15,52 @@ .code X86CompilationCallback proc + ; Save all int arg registers into register spill area. + mov [rsp+ 8], rcx + mov [rsp+16], rdx + mov [rsp+24], r8 + mov [rsp+32], r9 + push rbp - ; Save RSP + ; Save RSP. mov rbp, rsp - ; Save all int arg registers - push rcx - push rdx - push r8 - push r9 - ; Align stack on 16-byte boundary. and rsp, -16 - ; Save all XMM arg registers - sub rsp, 64 - movaps [rsp], xmm0 - movaps [rsp+16], xmm1 - movaps [rsp+32], xmm2 - movaps [rsp+48], xmm3 + ; Save all XMM arg registers. Also allocate reg spill area. + sub rsp, 96 + movaps [rsp +32], xmm0 + movaps [rsp+16+32], xmm1 + movaps [rsp+32+32], xmm2 + movaps [rsp+48+32], xmm3 ; JIT callee - ; Pass prev frame and return address + ; Pass prev frame and return address. mov rcx, rbp mov rdx, qword ptr [rbp+8] call X86CompilationCallback2 - ; Restore all XMM arg registers - movaps xmm3, [rsp+48] - movaps xmm2, [rsp+32] - movaps xmm1, [rsp+16] - movaps xmm0, [rsp] + ; Restore all XMM arg registers. + movaps xmm3, [rsp+48+32] + movaps xmm2, [rsp+32+32] + movaps xmm1, [rsp+16+32] + movaps xmm0, [rsp +32] - ; Restore RSP + ; Restore RSP. mov rsp, rbp - ; Restore all int arg registers - sub rsp, 32 - pop r9 - pop r8 - pop rdx - pop rcx - - ; Restore RBP + ; Restore RBP. pop rbp + + ; Restore all int arg registers. + mov r9, [rsp+32] + mov r8, [rsp+24] + mov rdx, [rsp+16] + mov rcx, [rsp+ 8] + ret X86CompilationCallback endp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=77962&r1=77961&r2=77962&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Aug 3 03:12:53 2009 @@ -1228,7 +1228,7 @@ MVT::v2i64, InFlag).getValue(1); Val = Chain.getValue(0); Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i64, - Val, DAG.getConstant(0, MVT::i64)); + Val, DAG.getConstant(0, MVT::i64)); } else { Chain = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i64, InFlag).getValue(1); @@ -1628,8 +1628,9 @@ const CCValAssign &VA, SDValue Chain, SDValue Arg, ISD::ArgFlagsTy Flags) { + const unsigned FirstStackArgOffset = (Subtarget->isTargetWin64() ? 32 : 0); DebugLoc dl = TheCall->getDebugLoc(); - unsigned LocMemOffset = VA.getLocMemOffset(); + unsigned LocMemOffset = FirstStackArgOffset + VA.getLocMemOffset(); SDValue PtrOff = DAG.getIntPtrConstant(LocMemOffset); PtrOff = DAG.getNode(ISD::ADD, dl, getPointerTy(), StackPtr, PtrOff); if (Flags.isByVal()) { Modified: llvm/trunk/lib/Target/X86/X86Instr64bit.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Instr64bit.td?rev=77962&r1=77961&r2=77962&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86Instr64bit.td (original) +++ llvm/trunk/lib/Target/X86/X86Instr64bit.td Mon Aug 3 03:12:53 2009 @@ -128,13 +128,37 @@ def CALL64pcrel32 : Ii32<0xE8, RawFrm, (outs), (ins i64i32imm_pcrel:$dst, variable_ops), "call\t$dst", []>, - Requires<[In64BitMode]>; + Requires<[In64BitMode, NotWin64]>; def CALL64r : I<0xFF, MRM2r, (outs), (ins GR64:$dst, variable_ops), - "call\t{*}$dst", [(X86call GR64:$dst)]>; + "call\t{*}$dst", [(X86call GR64:$dst)]>, + Requires<[NotWin64]>; def CALL64m : I<0xFF, MRM2m, (outs), (ins i64mem:$dst, variable_ops), - "call\t{*}$dst", [(X86call (loadi64 addr:$dst))]>; + "call\t{*}$dst", [(X86call (loadi64 addr:$dst))]>, + Requires<[NotWin64]>; } + // FIXME: We need to teach codegen about single list of call-clobbered registers. +let isCall = 1 in + // All calls clobber the non-callee saved registers. RSP is marked as + // a use to prevent stack-pointer assignments that appear immediately + // before calls from potentially appearing dead. Uses for argument + // registers are added manually. + let Defs = [RAX, RCX, RDX, R8, R9, R10, R11, + FP0, FP1, FP2, FP3, FP4, FP5, FP6, ST0, ST1, + MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7, + XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, EFLAGS], + Uses = [RSP] in { + def WINCALL64pcrel32 : I<0xE8, RawFrm, + (outs), (ins i64i32imm:$dst, variable_ops), + "call\t${dst:call}", [(X86call imm:$dst)]>, + Requires<[IsWin64]>; + def WINCALL64r : I<0xFF, MRM2r, (outs), (ins GR64:$dst, variable_ops), + "call\t{*}$dst", + [(X86call GR64:$dst)]>, Requires<[IsWin64]>; + def WINCALL64m : I<0xFF, MRM2m, (outs), (ins i64mem:$dst, variable_ops), + "call\t{*}$dst", + [(X86call (loadi64 addr:$dst))]>, Requires<[IsWin64]>; + } let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in @@ -1495,9 +1519,14 @@ // Direct PC relative function call for small code model. 32-bit displacement // sign extended to 64-bit. def : Pat<(X86call (i64 tglobaladdr:$dst)), - (CALL64pcrel32 tglobaladdr:$dst)>; + (CALL64pcrel32 tglobaladdr:$dst)>, Requires<[NotWin64]>; def : Pat<(X86call (i64 texternalsym:$dst)), - (CALL64pcrel32 texternalsym:$dst)>; + (CALL64pcrel32 texternalsym:$dst)>, Requires<[NotWin64]>; + +def : Pat<(X86call (i64 tglobaladdr:$dst)), + (WINCALL64pcrel32 tglobaladdr:$dst)>, Requires<[IsWin64]>; +def : Pat<(X86call (i64 texternalsym:$dst)), + (WINCALL64pcrel32 texternalsym:$dst)>, Requires<[IsWin64]>; def : Pat<(X86tailcall (i64 tglobaladdr:$dst)), (CALL64pcrel32 tglobaladdr:$dst)>; Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=77962&r1=77961&r2=77962&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Mon Aug 3 03:12:53 2009 @@ -254,6 +254,8 @@ def FPStackf64 : Predicate<"!Subtarget->hasSSE2()">; def In32BitMode : Predicate<"!Subtarget->is64Bit()">; def In64BitMode : Predicate<"Subtarget->is64Bit()">; +def IsWin64 : Predicate<"Subtarget->isTargetWin64()">; +def NotWin64 : Predicate<"!Subtarget->isTargetWin64()">; def SmallCode : Predicate<"TM.getCodeModel() == CodeModel::Small">; def NotSmallCode : Predicate<"TM.getCodeModel() != CodeModel::Small">; def IsStatic : Predicate<"TM.getRelocationModel() == Reloc::Static">; Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp?rev=77962&r1=77961&r2=77962&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp Mon Aug 3 03:12:53 2009 @@ -484,15 +484,18 @@ int X86RegisterInfo::getFrameIndexOffset(MachineFunction &MF, int FI) const { - int Offset = MF.getFrameInfo()->getObjectOffset(FI) + SlotSize; - uint64_t StackSize = MF.getFrameInfo()->getStackSize(); + const TargetFrameInfo &TFI = *MF.getTarget().getFrameInfo(); + MachineFrameInfo *MFI = MF.getFrameInfo(); + + int Offset = MFI->getObjectOffset(FI) - TFI.getOffsetOfLocalArea(); + uint64_t StackSize = MFI->getStackSize(); if (needsStackRealignment(MF)) { if (FI < 0) // Skip the saved EBP Offset += SlotSize; else { - unsigned Align = MF.getFrameInfo()->getObjectAlignment(FI); + unsigned Align = MFI->getObjectAlignment(FI); assert( (-(Offset + StackSize)) % Align == 0); Align = 0; return Offset + StackSize; @@ -622,14 +625,14 @@ void X86RegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF, RegScavenger *RS) const { - MachineFrameInfo *FFI = MF.getFrameInfo(); + MachineFrameInfo *MFI = MF.getFrameInfo(); // Calculate and set max stack object alignment early, so we can decide // whether we will need stack realignment (and thus FP). - unsigned MaxAlign = std::max(FFI->getMaxAlignment(), - calculateMaxStackAlignment(FFI)); + unsigned MaxAlign = std::max(MFI->getMaxAlignment(), + calculateMaxStackAlignment(MFI)); - FFI->setMaxAlignment(MaxAlign); + MFI->setMaxAlignment(MaxAlign); X86MachineFunctionInfo *X86FI = MF.getInfo(); int32_t TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta(); @@ -643,18 +646,18 @@ // ... // } // [EBP] - MF.getFrameInfo()-> - CreateFixedObject(-TailCallReturnAddrDelta, - (-1*SlotSize)+TailCallReturnAddrDelta); + MFI->CreateFixedObject(-TailCallReturnAddrDelta, + (-1*SlotSize)+TailCallReturnAddrDelta); } + if (hasFP(MF)) { assert((TailCallReturnAddrDelta <= 0) && "The Delta should always be zero or negative"); // Create a frame entry for the EBP register that must be saved. - int FrameIdx = MF.getFrameInfo()->CreateFixedObject(SlotSize, - (int)SlotSize * -2+ - TailCallReturnAddrDelta); - assert(FrameIdx == MF.getFrameInfo()->getObjectIndexBegin() && + int FrameIdx = MFI->CreateFixedObject(SlotSize, + (int)SlotSize * -2+ + TailCallReturnAddrDelta); + assert(FrameIdx == MFI->getObjectIndexBegin() && "Slot for EBP register must be last in order to be found!"); FrameIdx = 0; } @@ -887,6 +890,11 @@ StackSize = std::max(MinSize, StackSize > 128 ? StackSize - 128 : 0); MFI->setStackSize(StackSize); + } else if (Subtarget->isTargetWin64()) { + // We need to always allocate 32 bytes as register spill area. + // FIXME: we might reuse these 32 bytes for leaf functions. + StackSize += 32; + MFI->setStackSize(StackSize); } // Insert stack pointer adjustment for later moving of return addr. Only Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=77962&r1=77961&r2=77962&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp (original) +++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Mon Aug 3 03:12:53 2009 @@ -64,7 +64,9 @@ Subtarget(TT, FS, is64Bit), DataLayout(Subtarget.getDataLayout()), FrameInfo(TargetFrameInfo::StackGrowsDown, - Subtarget.getStackAlignment(), Subtarget.is64Bit() ? -8 : -4), + Subtarget.getStackAlignment(), + (Subtarget.isTargetWin64() ? -40 : + (Subtarget.is64Bit() ? -8 : -4))), InstrInfo(*this), JITInfo(*this), TLInfo(*this), ELFWriterInfo(*this) { DefRelocModel = getRelocationModel(); Modified: llvm/trunk/test/CodeGen/X86/2009-06-03-Win64DisableRedZone.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-06-03-Win64DisableRedZone.ll?rev=77962&r1=77961&r2=77962&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2009-06-03-Win64DisableRedZone.ll (original) +++ llvm/trunk/test/CodeGen/X86/2009-06-03-Win64DisableRedZone.ll Mon Aug 3 03:12:53 2009 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc | grep "subq.*\\\$8, \\\%rsp" +; RUN: llvm-as < %s | llc | grep "subq.*\\\$40, \\\%rsp" target triple = "x86_64-mingw64" define x86_fp80 @a(i64 %x) nounwind readnone { Modified: llvm/trunk/test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll?rev=77962&r1=77961&r2=77962&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll (original) +++ llvm/trunk/test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll Mon Aug 3 03:12:53 2009 @@ -1,7 +1,7 @@ ; RUN: llvm-as < %s | llc -o %t1 -f -; RUN: grep "subq.*\\\$40, \\\%rsp" %t1 -; RUN: grep "movaps \\\%xmm8, \\\(\\\%rsp\\\)" %t1 -; RUN: grep "movaps \\\%xmm7, 16\\\(\\\%rsp\\\)" %t1 +; RUN: grep "subq.*\\\$72, \\\%rsp" %t1 +; RUN: grep "movaps \\\%xmm8, 32\\\(\\\%rsp\\\)" %t1 +; RUN: grep "movaps \\\%xmm7, 48\\\(\\\%rsp\\\)" %t1 target triple = "x86_64-mingw64" define i32 @a() nounwind { From asl at math.spbu.ru Mon Aug 3 03:13:25 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Mon, 03 Aug 2009 08:13:25 -0000 Subject: [llvm-commits] [llvm] r77963 - in /llvm/trunk/lib/Target/X86: X86CallingConv.td X86ISelLowering.cpp Message-ID: <200908030813.n738DQmv030831@zion.cs.uiuc.edu> Author: asl Date: Mon Aug 3 03:13:24 2009 New Revision: 77963 URL: http://llvm.org/viewvc/llvm-project?rev=77963&view=rev Log: Cleanup Darwin MMX calling conv stuff - make the stuff more generic. This also fixes a subtle bug, when 6th v1i64 argument passed wrongly. Modified: llvm/trunk/lib/Target/X86/X86CallingConv.td llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86CallingConv.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CallingConv.td?rev=77963&r1=77962&r2=77963&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86CallingConv.td (original) +++ llvm/trunk/lib/Target/X86/X86CallingConv.td Mon Aug 3 03:13:24 2009 @@ -137,26 +137,26 @@ // The 'nest' parameter, if any, is passed in R10. CCIfNest>, + // The first 6 v1i64 vector arguments are passed in GPRs on Darwin. + CCIfType<[v1i64], + CCIfSubtarget<"isTargetDarwin()", + CCBitConvertToType>>, + // The first 6 integer arguments are passed in integer registers. CCIfType<[i32], CCAssignToReg<[EDI, ESI, EDX, ECX, R8D, R9D]>>, CCIfType<[i64], CCAssignToReg<[RDI, RSI, RDX, RCX, R8 , R9 ]>>, - - // The first 8 FP/Vector arguments are passed in XMM registers. - CCIfType<[f32, f64, v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], - CCIfSubtarget<"hasSSE1()", - CCAssignToReg<[XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7]>>>, // The first 8 MMX (except for v1i64) vector arguments are passed in XMM // registers on Darwin. CCIfType<[v8i8, v4i16, v2i32, v2f32], CCIfSubtarget<"isTargetDarwin()", CCIfSubtarget<"hasSSE2()", - CCAssignToReg<[XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7]>>>>, + CCPromoteToType>>>, - // The first 8 v1i64 vector arguments are passed in GPRs on Darwin. - CCIfType<[v1i64], - CCIfSubtarget<"isTargetDarwin()", - CCAssignToReg<[RDI, RSI, RDX, RCX, R8]>>>, + // The first 8 FP/Vector arguments are passed in XMM registers. + CCIfType<[f32, f64, v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], + CCIfSubtarget<"hasSSE1()", + CCAssignToReg<[XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7]>>>, // Integer/FP values get stored in stack slots that are 8 bytes in size and // 8-byte aligned if there are no more registers to hold them. Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=77963&r1=77962&r2=77963&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Aug 3 03:13:24 2009 @@ -1429,24 +1429,10 @@ RC = X86::FR64RegisterClass; else if (RegVT.isVector() && RegVT.getSizeInBits() == 128) RC = X86::VR128RegisterClass; - else if (RegVT.isVector()) { - assert(RegVT.getSizeInBits() == 64); - if (!Is64Bit) - RC = X86::VR64RegisterClass; // MMX values are passed in MMXs. - else { - // Darwin calling convention passes MMX values in either GPRs or - // XMMs in x86-64. Other targets pass them in memory. - if (RegVT != MVT::v1i64 && Subtarget->hasSSE2()) { - RC = X86::VR128RegisterClass; // MMX values are passed in XMMs. - RegVT = MVT::v2i64; - } else { - RC = X86::GR64RegisterClass; // v1i64 values are passed in GPRs. - RegVT = MVT::i64; - } - } - } else { + else if (RegVT.isVector() && RegVT.getSizeInBits() == 64) + RC = X86::VR64RegisterClass; + else llvm_unreachable("Unknown argument type!"); - } unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC); SDValue ArgValue = DAG.getCopyFromReg(Root, dl, Reg, RegVT); @@ -1460,19 +1446,19 @@ else if (VA.getLocInfo() == CCValAssign::ZExt) ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, DAG.getValueType(VA.getValVT())); + else if (VA.getLocInfo() == CCValAssign::BCvt) + ArgValue = DAG.getNode(ISD::BIT_CONVERT, dl, RegVT, ArgValue, + DAG.getValueType(VA.getValVT())); - if (VA.getLocInfo() != CCValAssign::Full) - ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); - - // Handle MMX values passed in GPRs. - if (Is64Bit && RegVT != VA.getLocVT()) { - if (RegVT.getSizeInBits() == 64 && RC == X86::GR64RegisterClass) - ArgValue = DAG.getNode(ISD::BIT_CONVERT, dl, VA.getLocVT(), ArgValue); - else if (RC == X86::VR128RegisterClass) { + if (VA.getLocInfo() != CCValAssign::Full && + VA.getLocInfo() != CCValAssign::BCvt) { + // Handle MMX values passed in XMM regs. + if (RegVT.isVector()) { ArgValue = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i64, ArgValue, DAG.getConstant(0, MVT::i64)); - ArgValue = DAG.getNode(ISD::BIT_CONVERT, dl, VA.getLocVT(), ArgValue); - } + ArgValue = DAG.getNode(ISD::BIT_CONVERT, dl, VA.getValVT(), ArgValue); + } else + ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); } ArgValues.push_back(ArgValue); @@ -1734,6 +1720,7 @@ // of tail call optimization arguments are handle later. for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { CCValAssign &VA = ArgLocs[i]; + MVT RegVT = VA.getLocVT(); SDValue Arg = TheCall->getArg(i); ISD::ArgFlagsTy Flags = TheCall->getArgFlags(i); bool isByVal = Flags.isByVal(); @@ -1743,39 +1730,26 @@ default: llvm_unreachable("Unknown loc info!"); case CCValAssign::Full: break; case CCValAssign::SExt: - Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); + Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, RegVT, Arg); break; case CCValAssign::ZExt: - Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); + Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, RegVT, Arg); break; case CCValAssign::AExt: - Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); + if (RegVT.isVector() && RegVT.getSizeInBits() == 128) { + // Special case: passing MMX values in XMM registers. + Arg = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i64, Arg); + Arg = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2i64, Arg); + Arg = getMOVL(DAG, dl, MVT::v2i64, DAG.getUNDEF(MVT::v2i64), Arg); + } else + Arg = DAG.getNode(ISD::ANY_EXTEND, dl, RegVT, Arg); + break; + case CCValAssign::BCvt: + Arg = DAG.getNode(ISD::BIT_CONVERT, dl, RegVT, Arg); break; } if (VA.isRegLoc()) { - if (Is64Bit) { - MVT RegVT = VA.getLocVT(); - if (RegVT.isVector() && RegVT.getSizeInBits() == 64) - switch (VA.getLocReg()) { - default: - break; - case X86::RDI: case X86::RSI: case X86::RDX: case X86::RCX: - case X86::R8: { - // Special case: passing MMX values in GPR registers. - Arg = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i64, Arg); - break; - } - case X86::XMM0: case X86::XMM1: case X86::XMM2: case X86::XMM3: - case X86::XMM4: case X86::XMM5: case X86::XMM6: case X86::XMM7: { - // Special case: passing MMX values in XMM registers. - Arg = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i64, Arg); - Arg = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2i64, Arg); - Arg = getMOVL(DAG, dl, MVT::v2i64, DAG.getUNDEF(MVT::v2i64), Arg); - break; - } - } - } RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); } else { if (!IsTailCall || (IsTailCall && isByVal)) { From asl at math.spbu.ru Mon Aug 3 03:13:57 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Mon, 03 Aug 2009 08:13:57 -0000 Subject: [llvm-commits] [llvm] r77964 - in /llvm/trunk: include/llvm/CodeGen/CallingConvLower.h include/llvm/Target/TargetCallingConv.td lib/Target/X86/X86CallingConv.td lib/Target/X86/X86ISelLowering.cpp utils/TableGen/CallingConvEmitter.cpp Message-ID: <200908030813.n738Dw0G030864@zion.cs.uiuc.edu> Author: asl Date: Mon Aug 3 03:13:56 2009 New Revision: 77964 URL: http://llvm.org/viewvc/llvm-project?rev=77964&view=rev Log: Add 'Indirect' LocInfo class and use to pass __m128 on win64. Also minore fixes here and there (mostly __m64). Modified: llvm/trunk/include/llvm/CodeGen/CallingConvLower.h llvm/trunk/include/llvm/Target/TargetCallingConv.td llvm/trunk/lib/Target/X86/X86CallingConv.td llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/utils/TableGen/CallingConvEmitter.cpp Modified: llvm/trunk/include/llvm/CodeGen/CallingConvLower.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/CallingConvLower.h?rev=77964&r1=77963&r2=77964&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/CallingConvLower.h (original) +++ llvm/trunk/include/llvm/CodeGen/CallingConvLower.h Mon Aug 3 03:13:56 2009 @@ -33,32 +33,33 @@ SExt, // The value is sign extended in the location. ZExt, // The value is zero extended in the location. AExt, // The value is extended with undefined upper bits. - BCvt // The value is bit-converted in the location. + BCvt, // The value is bit-converted in the location. + Indirect // The location contains pointer to the value. // TODO: a subset of the value is in the location. }; private: /// ValNo - This is the value number begin assigned (e.g. an argument number). unsigned ValNo; - + /// Loc is either a stack offset or a register number. unsigned Loc; - + /// isMem - True if this is a memory loc, false if it is a register loc. bool isMem : 1; - + /// isCustom - True if this arg/retval requires special handling. bool isCustom : 1; /// Information about how the value is assigned. LocInfo HTP : 6; - + /// ValVT - The type of the value being assigned. MVT ValVT; /// LocVT - The type of the location being assigned to. MVT LocVT; public: - + static CCValAssign getReg(unsigned ValNo, MVT ValVT, unsigned RegNo, MVT LocVT, LocInfo HTP) { @@ -95,7 +96,7 @@ Ret.LocVT = LocVT; return Ret; } - + static CCValAssign getCustomMem(unsigned ValNo, MVT ValVT, unsigned Offset, MVT LocVT, LocInfo HTP) { @@ -110,14 +111,18 @@ bool isRegLoc() const { return !isMem; } bool isMemLoc() const { return isMem; } - + bool needsCustom() const { return isCustom; } unsigned getLocReg() const { assert(isRegLoc()); return Loc; } unsigned getLocMemOffset() const { assert(isMemLoc()); return Loc; } MVT getLocVT() const { return LocVT; } - + LocInfo getLocInfo() const { return HTP; } + bool isExtInLoc() const { + return (HTP == AExt || HTP == SExt || HTP == ZExt); + } + }; /// CCAssignFn - This function assigns a location for Val, updating State to @@ -143,22 +148,22 @@ const TargetRegisterInfo &TRI; SmallVector &Locs; LLVMContext &Context; - + unsigned StackOffset; SmallVector UsedRegs; public: CCState(unsigned CC, bool isVarArg, const TargetMachine &TM, SmallVector &locs, LLVMContext &C); - + void addLoc(const CCValAssign &V) { Locs.push_back(V); } - + LLVMContext &getContext() const { return Context; } const TargetMachine &getTarget() const { return TM; } unsigned getCallingConv() const { return CallingConv; } bool isVarArg() const { return IsVarArg; } - + unsigned getNextStackOffset() const { return StackOffset; } /// isAllocated - Return true if the specified register (or an alias) is @@ -166,15 +171,15 @@ bool isAllocated(unsigned Reg) const { return UsedRegs[Reg/32] & (1 << (Reg&31)); } - + /// AnalyzeFormalArguments - Analyze an ISD::FORMAL_ARGUMENTS node, /// incorporating info about the formals into this state. void AnalyzeFormalArguments(SDNode *TheArgs, CCAssignFn Fn); - + /// AnalyzeReturn - Analyze the returned values of an ISD::RET node, /// incorporating info about the result values into this state. void AnalyzeReturn(SDNode *TheRet, CCAssignFn Fn); - + /// AnalyzeCallOperands - Analyze an ISD::CALL node, incorporating info /// about the passed values into this state. void AnalyzeCallOperands(CallSDNode *TheCall, CCAssignFn Fn); @@ -188,7 +193,7 @@ /// AnalyzeCallResult - Analyze the return values of an ISD::CALL node, /// incorporating info about the passed values into this state. void AnalyzeCallResult(CallSDNode *TheCall, CCAssignFn Fn); - + /// AnalyzeCallResult - Same as above except it's specialized for calls which /// produce a single value. void AnalyzeCallResult(MVT VT, CCAssignFn Fn); @@ -201,7 +206,7 @@ return i; return NumRegs; } - + /// AllocateReg - Attempt to allocate one register. If it is not available, /// return zero. Otherwise, return the register, marking it and any aliases /// as allocated. Modified: llvm/trunk/include/llvm/Target/TargetCallingConv.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetCallingConv.td?rev=77964&r1=77963&r2=77964&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetCallingConv.td (original) +++ llvm/trunk/include/llvm/Target/TargetCallingConv.td Mon Aug 3 03:13:56 2009 @@ -109,6 +109,12 @@ ValueType DestTy = destTy; } +/// CCPassIndirect - If applied, this stores the value to stack and passes the pointer +/// as normal argument. +class CCPassIndirect : CCAction { + ValueType DestTy = destTy; +} + /// CCDelegateTo - This action invokes the specified sub-calling-convention. It /// is successful if the specified CC matches. class CCDelegateTo : CCAction { Modified: llvm/trunk/lib/Target/X86/X86CallingConv.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CallingConv.td?rev=77964&r1=77963&r2=77964&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86CallingConv.td (original) +++ llvm/trunk/lib/Target/X86/X86CallingConv.td Mon Aug 3 03:13:56 2009 @@ -89,7 +89,7 @@ // X86-Win64 C return-value convention. def RetCC_X86_Win64_C : CallingConv<[ // The X86-Win64 calling convention always returns __m64 values in RAX. - CCIfType<[v8i8, v4i16, v2i32, v1i64], CCAssignToReg<[RAX]>>, + CCIfType<[v8i8, v4i16, v2i32, v1i64], CCBitConvertToType>, // And FP in XMM0 only. CCIfType<[f32], CCAssignToReg<[XMM0]>>, @@ -184,6 +184,13 @@ // The 'nest' parameter, if any, is passed in R10. CCIfNest>, + // 128 bit vectors are passed by pointer + CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], CCPassIndirect>, + + // The first 4 MMX vector arguments are passed in GPRs. + CCIfType<[v8i8, v4i16, v2i32, v1i64, v2f32], + CCBitConvertToType>, + // The first 4 integer arguments are passed in integer registers. CCIfType<[i32], CCAssignToRegWithShadow<[ECX , EDX , R8D , R9D ], [XMM0, XMM1, XMM2, XMM3]>>, @@ -195,11 +202,6 @@ CCAssignToRegWithShadow<[XMM0, XMM1, XMM2, XMM3], [RCX , RDX , R8 , R9 ]>>, - // The first 4 MMX vector arguments are passed in GPRs. - CCIfType<[v8i8, v4i16, v2i32, v1i64, v2f32], - CCAssignToRegWithShadow<[RCX , RDX , R8 , R9 ], - [XMM0, XMM1, XMM2, XMM3]>>, - // Integer/FP values get stored in stack slots that are 8 bytes in size and // 8-byte aligned if there are no more registers to hold them. CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 8>>, @@ -208,9 +210,6 @@ // subtarget. CCIfType<[f80], CCAssignToStack<0, 0>>, - // Vectors get 16-byte stack slots that are 16-byte aligned. - CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], CCAssignToStack<16, 16>>, - // __m64 vectors get 8-byte stack slots that are 8-byte aligned. CCIfType<[v8i8, v4i16, v2i32, v1i64], CCAssignToStack<8, 8>> ]>; Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=77964&r1=77963&r2=77964&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Aug 3 03:13:56 2009 @@ -1408,6 +1408,7 @@ SmallVector ArgValues; unsigned LastVal = ~0U; + SDValue ArgValue; for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { CCValAssign &VA = ArgLocs[i]; // TODO: If an arg is passed in two places (e.g. reg and stack), skip later @@ -1435,7 +1436,7 @@ llvm_unreachable("Unknown argument type!"); unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC); - SDValue ArgValue = DAG.getCopyFromReg(Root, dl, Reg, RegVT); + ArgValue = DAG.getCopyFromReg(Root, dl, Reg, RegVT); // If this is an 8 or 16-bit value, it is really passed promoted to 32 // bits. Insert an assert[sz]ext to capture this, then truncate to the @@ -1450,8 +1451,7 @@ ArgValue = DAG.getNode(ISD::BIT_CONVERT, dl, RegVT, ArgValue, DAG.getValueType(VA.getValVT())); - if (VA.getLocInfo() != CCValAssign::Full && - VA.getLocInfo() != CCValAssign::BCvt) { + if (VA.isExtInLoc()) { // Handle MMX values passed in XMM regs. if (RegVT.isVector()) { ArgValue = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i64, @@ -1460,12 +1460,16 @@ } else ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); } - - ArgValues.push_back(ArgValue); } else { assert(VA.isMemLoc()); - ArgValues.push_back(LowerMemArgument(Op, DAG, VA, MFI, CC, Root, i)); + ArgValue = LowerMemArgument(Op, DAG, VA, MFI, CC, Root, i); } + + // If value is passed via pointer - do a load. + if (VA.getLocInfo() == CCValAssign::Indirect) + ArgValue = DAG.getLoad(VA.getValVT(), dl, Root, ArgValue, NULL, 0); + + ArgValues.push_back(ArgValue); } // The x86-64 ABI for returning structs by value requires that we copy @@ -1747,6 +1751,15 @@ case CCValAssign::BCvt: Arg = DAG.getNode(ISD::BIT_CONVERT, dl, RegVT, Arg); break; + case CCValAssign::Indirect: { + // Store the argument. + SDValue SpillSlot = DAG.CreateStackTemporary(VA.getValVT()); + int FI = cast(SpillSlot)->getIndex(); + Chain = DAG.getStore(Chain, dl, Arg, SpillSlot, + PseudoSourceValue::getFixedStack(FI), 0); + Arg = SpillSlot; + break; + } } if (VA.isRegLoc()) { Modified: llvm/trunk/utils/TableGen/CallingConvEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CallingConvEmitter.cpp?rev=77964&r1=77963&r2=77964&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/CallingConvEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/CallingConvEmitter.cpp Mon Aug 3 03:13:56 2009 @@ -186,6 +186,10 @@ Record *DestTy = Action->getValueAsDef("DestTy"); O << IndentStr << "LocVT = " << getEnumName(getValueType(DestTy)) <<";\n"; O << IndentStr << "LocInfo = CCValAssign::BCvt;\n"; + } else if (Action->isSubClassOf("CCPassIndirect")) { + Record *DestTy = Action->getValueAsDef("DestTy"); + O << IndentStr << "LocVT = " << getEnumName(getValueType(DestTy)) <<";\n"; + O << IndentStr << "LocInfo = CCValAssign::Indirect;\n"; } else if (Action->isSubClassOf("CCPassByVal")) { int Size = Action->getValueAsInt("Size"); int Align = Action->getValueAsInt("Align"); From asl at math.spbu.ru Mon Aug 3 03:14:15 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Mon, 03 Aug 2009 08:14:15 -0000 Subject: [llvm-commits] [llvm] r77965 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Message-ID: <200908030814.n738EG93030882@zion.cs.uiuc.edu> Author: asl Date: Mon Aug 3 03:14:14 2009 New Revision: 77965 URL: http://llvm.org/viewvc/llvm-project?rev=77965&view=rev Log: Perform bitconvert to proper type Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=77965&r1=77964&r2=77965&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Aug 3 03:14:14 2009 @@ -1448,8 +1448,7 @@ ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, DAG.getValueType(VA.getValVT())); else if (VA.getLocInfo() == CCValAssign::BCvt) - ArgValue = DAG.getNode(ISD::BIT_CONVERT, dl, RegVT, ArgValue, - DAG.getValueType(VA.getValVT())); + ArgValue = DAG.getNode(ISD::BIT_CONVERT, dl, VA.getValVT(), ArgValue); if (VA.isExtInLoc()) { // Handle MMX values passed in XMM regs. From asl at math.spbu.ru Mon Aug 3 03:14:30 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Mon, 03 Aug 2009 08:14:30 -0000 Subject: [llvm-commits] [llvm] r77966 - /llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp Message-ID: <200908030814.n738EVva030905@zion.cs.uiuc.edu> Author: asl Date: Mon Aug 3 03:14:30 2009 New Revision: 77966 URL: http://llvm.org/viewvc/llvm-project?rev=77966&view=rev Log: Create proper frame index for FP Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp?rev=77966&r1=77965&r2=77966&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp Mon Aug 3 03:14:30 2009 @@ -653,9 +653,11 @@ if (hasFP(MF)) { assert((TailCallReturnAddrDelta <= 0) && "The Delta should always be zero or negative"); + const TargetFrameInfo &TFI = *MF.getTarget().getFrameInfo(); // Create a frame entry for the EBP register that must be saved. int FrameIdx = MFI->CreateFixedObject(SlotSize, - (int)SlotSize * -2+ + -(int)SlotSize + + TFI.getOffsetOfLocalArea() + TailCallReturnAddrDelta); assert(FrameIdx == MFI->getObjectIndexBegin() && "Slot for EBP register must be last in order to be found!"); From evan.cheng at apple.com Mon Aug 3 03:42:10 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 03 Aug 2009 08:42:10 -0000 Subject: [llvm-commits] [llvm] r77967 - in /llvm/trunk: lib/CodeGen/SimpleRegisterCoalescing.cpp test/CodeGen/Thumb2/2009-08-02-CoalescerBug.ll Message-ID: <200908030842.n738gEJK031723@zion.cs.uiuc.edu> Author: evancheng Date: Mon Aug 3 03:41:59 2009 New Revision: 77967 URL: http://llvm.org/viewvc/llvm-project?rev=77967&view=rev Log: Fix a coaelescer bug. If a copy val# is extended to eliminate a non-trivially coalesced copy, and the copy kills its source register. Trim the source register's live range to the last use if possible. This fixes up kill marker to make the scavenger happy. Added: llvm/trunk/test/CodeGen/Thumb2/2009-08-02-CoalescerBug.ll Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=77967&r1=77966&r2=77967&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original) +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Mon Aug 3 03:41:59 2009 @@ -123,7 +123,8 @@ assert(BValNo->def == CopyIdx && "Copy doesn't define the value?"); // AValNo is the value number in A that defines the copy, A3 in the example. - LiveInterval::iterator ALR = IntA.FindLiveRangeContaining(CopyIdx-1); + unsigned CopyUseIdx = li_->getUseIndex(CopyIdx); + LiveInterval::iterator ALR = IntA.FindLiveRangeContaining(CopyUseIdx); assert(ALR != IntA.end() && "Live range not found!"); VNInfo *AValNo = ALR->valno; // If it's re-defined by an early clobber somewhere in the live range, then @@ -227,6 +228,12 @@ IntB.removeKill(ValLR->valno, FillerStart); } + // If the copy instruction was killing the destination register before the + // merge, find the last use and trim the live range. That will also add the + // isKill marker. + if (CopyMI->killsRegister(IntA.reg)) + TrimLiveIntervalToLastUse(CopyUseIdx, CopyMI->getParent(), IntA, ALR); + ++numExtends; return true; } Added: llvm/trunk/test/CodeGen/Thumb2/2009-08-02-CoalescerBug.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/2009-08-02-CoalescerBug.ll?rev=77967&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/2009-08-02-CoalescerBug.ll (added) +++ llvm/trunk/test/CodeGen/Thumb2/2009-08-02-CoalescerBug.ll Mon Aug 3 03:41:59 2009 @@ -0,0 +1,46 @@ +; RUN: llvm-as < %s | llc -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 -relocation-model=pic -disable-fp-elim + + type { void (%"struct.xalanc_1_8::FormatterToXML"*, i16)*, i32 } ; type %0 + type { void (%"struct.xalanc_1_8::FormatterToXML"*, i16*)*, i32 } ; type %1 + type { void (%"struct.xalanc_1_8::FormatterToXML"*, %"struct.xalanc_1_8::XalanDOMString"*)*, i32 } ; type %2 + type { void (%"struct.xalanc_1_8::FormatterToXML"*, i16*, i32, i32)*, i32 } ; type %3 + type { void (%"struct.xalanc_1_8::FormatterToXML"*)*, i32 } ; type %4 + %"struct.std::CharVectorType" = type { %"struct.std::_Vector_base >" } + %"struct.std::_Bit_const_iterator" = type { %"struct.std::_Bit_iterator_base" } + %"struct.std::_Bit_iterator_base" = type { i32*, i32 } + %"struct.std::_Bvector_base >" = type { %"struct.std::_Bvector_base >::_Bvector_impl" } + %"struct.std::_Bvector_base >::_Bvector_impl" = type { %"struct.std::_Bit_const_iterator", %"struct.std::_Bit_const_iterator", i32* } + %"struct.std::_Vector_base >" = type { %"struct.std::_Vector_base >::_Vector_impl" } + %"struct.std::_Vector_base >::_Vector_impl" = type { i8*, i8*, i8* } + %"struct.std::_Vector_base >" = type { %"struct.std::_Vector_base >::_Vector_impl" } + %"struct.std::_Vector_base >::_Vector_impl" = type { i16*, i16*, i16* } + %"struct.std::basic_ostream >.base" = type { i32 (...)** } + %"struct.std::vector >" = type { %"struct.std::_Bvector_base >" } + %"struct.std::vector >" = type { %"struct.std::_Vector_base >" } + %"struct.xalanc_1_8::FormatterListener" = type { %"struct.std::basic_ostream >.base", %"struct.std::basic_ostream >.base"*, i32 } + %"struct.xalanc_1_8::FormatterToXML" = type { %"struct.xalanc_1_8::FormatterListener", %"struct.std::basic_ostream >.base"*, %"struct.xalanc_1_8::XalanOutputStream"*, i16, [256 x i16], [256 x i16], i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, %"struct.xalanc_1_8::XalanDOMString", %"struct.xalanc_1_8::XalanDOMString", %"struct.xalanc_1_8::XalanDOMString", i32, i32, %"struct.std::vector >", %"struct.xalanc_1_8::XalanDOMString", i8, i8, i8, i8, i8, %"struct.xalanc_1_8::XalanDOMString", %"struct.xalanc_1_8::XalanDOMString", %"struct.xalanc_1_8::XalanDOMString", %"struct.xalanc_1_8::XalanDOMString", %"struct.std::vector >", i32, %"struct.std::CharVectorType", %"struct.std::vector >", %0, %1, %2, %3, %0, %1, %2, %3, %4, i16*, i32 } + %"struct.xalanc_1_8::XalanDOMString" = type { %"struct.std::vector >", i32 } + %"struct.xalanc_1_8::XalanOutputStream" = type { i32 (...)**, i32, %"struct.std::basic_ostream >.base"*, i32, %"struct.std::vector >", %"struct.xalanc_1_8::XalanDOMString", i8, i8, %"struct.std::CharVectorType" } + +declare arm_apcscc void @_ZN10xalanc_1_814FormatterToXML17writeParentTagEndEv(%"struct.xalanc_1_8::FormatterToXML"*) + +define arm_apcscc void @_ZN10xalanc_1_814FormatterToXML5cdataEPKtj(%"struct.xalanc_1_8::FormatterToXML"* %this, i16* %ch, i32 %length) { +entry: + %0 = getelementptr %"struct.xalanc_1_8::FormatterToXML"* %this, i32 0, i32 13 ; [#uses=1] + br i1 undef, label %bb4, label %bb + +bb: ; preds = %entry + store i8 0, i8* %0, align 1 + %1 = getelementptr %"struct.xalanc_1_8::FormatterToXML"* %this, i32 0, i32 0, i32 0, i32 0 ; [#uses=1] + %2 = load i32 (...)*** %1, align 4 ; [#uses=1] + %3 = getelementptr i32 (...)** %2, i32 11 ; [#uses=1] + %4 = load i32 (...)** %3, align 4 ; [#uses=1] + %5 = bitcast i32 (...)* %4 to void (%"struct.xalanc_1_8::FormatterToXML"*, i16*, i32)* ; [#uses=1] + tail call arm_apcscc void %5(%"struct.xalanc_1_8::FormatterToXML"* %this, i16* %ch, i32 %length) + ret void + +bb4: ; preds = %entry + tail call arm_apcscc void @_ZN10xalanc_1_814FormatterToXML17writeParentTagEndEv(%"struct.xalanc_1_8::FormatterToXML"* %this) + tail call arm_apcscc void undef(%"struct.xalanc_1_8::FormatterToXML"* %this, i16* %ch, i32 0, i32 %length, i8 zeroext undef) + ret void +} From asl at math.spbu.ru Mon Aug 3 03:43:38 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Mon, 03 Aug 2009 08:43:38 -0000 Subject: [llvm-commits] [llvm] r77968 - /llvm/trunk/lib/Target/X86/X86CompilationCallback_Win64.asm Message-ID: <200908030843.n738hcGX031777@zion.cs.uiuc.edu> Author: asl Date: Mon Aug 3 03:43:36 2009 New Revision: 77968 URL: http://llvm.org/viewvc/llvm-project?rev=77968&view=rev Log: Unbreak win64 compilation callback. Since we're generating stubs by hands we don't follow the ABI and don't create a register spill area. Don't use this area in compilation callback! Modified: llvm/trunk/lib/Target/X86/X86CompilationCallback_Win64.asm Modified: llvm/trunk/lib/Target/X86/X86CompilationCallback_Win64.asm URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CompilationCallback_Win64.asm?rev=77968&r1=77967&r2=77968&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86CompilationCallback_Win64.asm (original) +++ llvm/trunk/lib/Target/X86/X86CompilationCallback_Win64.asm Mon Aug 3 03:43:36 2009 @@ -15,17 +15,18 @@ .code X86CompilationCallback proc - ; Save all int arg registers into register spill area. - mov [rsp+ 8], rcx - mov [rsp+16], rdx - mov [rsp+24], r8 - mov [rsp+32], r9 - push rbp ; Save RSP. mov rbp, rsp + ; Save all int arg registers + ; WARNING: We cannot use register spill area - we're generating stubs by hands! + push rcx + push rdx + push r8 + push r9 + ; Align stack on 16-byte boundary. and rsp, -16 @@ -52,15 +53,15 @@ ; Restore RSP. mov rsp, rbp + ; Restore all int arg registers + sub rsp, 32 + pop r9 + pop r8 + pop rdx + pop rcx + ; Restore RBP. pop rbp - - ; Restore all int arg registers. - mov r9, [rsp+32] - mov r8, [rsp+24] - mov rdx, [rsp+16] - mov rcx, [rsp+ 8] - ret X86CompilationCallback endp From nicolas.geoffray at lip6.fr Mon Aug 3 04:01:16 2009 From: nicolas.geoffray at lip6.fr (Nicolas Geoffray) Date: Mon, 03 Aug 2009 11:01:16 +0200 Subject: [llvm-commits] [llvm] r77706 - in /llvm/trunk: include/llvm/Support/Annotation.h lib/Support/Annotation.cpp In-Reply-To: <200907311836.n6VIaP2r014052@zion.cs.uiuc.edu> References: <200907311836.n6VIaP2r014052@zion.cs.uiuc.edu> Message-ID: <4A76A75C.4040509@lip6.fr> Hi Dan, Dan Gohman wrote: > Author: djg > Date: Fri Jul 31 13:36:25 2009 > New Revision: 77706 > > URL: http://llvm.org/viewvc/llvm-project?rev=77706&view=rev > Log: > Remove Annotation.h, which is no longer used in the LLVM tree. > I know this has been long waiting for LLVM and I'm happy you got rid of it. Unfortunately, I was using Annotations to add VM-info per function in VMKit (e.g. a way to get the Java method out of a llvm::Function), and I'm reluctant into using a table to store that information now that the Annotation class is removed. Another way for me is to derive the llvm::Function class, add the information in the new class and always create this new class instead of llvm::Function. Do you know if that won't mess with the llvm passes? To implement this solution, one obvious change I need to do in the llvm source tree is to set the llvm::Function constructor protected instead of private. Let me know what you think. Thanks, Nicolas From nicolas.geoffray at lip6.fr Mon Aug 3 05:14:56 2009 From: nicolas.geoffray at lip6.fr (Nicolas Geoffray) Date: Mon, 03 Aug 2009 12:14:56 +0200 Subject: [llvm-commits] [llvm] r77706 - in /llvm/trunk: include/llvm/Support/Annotation.h lib/Support/Annotation.cpp In-Reply-To: <4A76A75C.4040509@lip6.fr> References: <200907311836.n6VIaP2r014052@zion.cs.uiuc.edu> <4A76A75C.4040509@lip6.fr> Message-ID: <4A76B8A0.3030004@lip6.fr> Hi again Dan, Nicolas Geoffray wrote: > Hi Dan, > > Dan Gohman wrote: > >> Author: djg >> Date: Fri Jul 31 13:36:25 2009 >> New Revision: 77706 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=77706&view=rev >> Log: >> Remove Annotation.h, which is no longer used in the LLVM tree. >> > > > Another way for me is to derive the llvm::Function class, add the > information in the new class and always create this new class instead of > llvm::Function. Do you know if that won't mess with the llvm passes? > Just to let you know that creating a derive class of llvm::Function works fine in VMKit. All that is needed is to set the llvm::Function constructor to protected instead of private. So I just wanted to make sure creating a derive class of llvm::Function won't break any llvm assumptions. Otherwise, I'll commit the private --> protected patch. Thanks, Nicolas From ggreif at gmail.com Mon Aug 3 05:28:04 2009 From: ggreif at gmail.com (Gabor Greif) Date: Mon, 3 Aug 2009 03:28:04 -0700 (PDT) Subject: [llvm-commits] [llvm] r77706 - in /llvm/trunk: include/llvm/Support/Annotation.h lib/Support/Annotation.cpp In-Reply-To: <4A76B8A0.3030004@lip6.fr> References: <200907311836.n6VIaP2r014052@zion.cs.uiuc.edu> <4A76A75C.4040509@lip6.fr> <4A76B8A0.3030004@lip6.fr> Message-ID: Hi Nicolas! When subclassing LLVM entities you have to be very careful. Did you test whether deserialization from bitcode create the right subclass? Cheers, Gabor On Aug 3, 12:14?pm, Nicolas Geoffray wrote: > Hi again Dan, > > > > Nicolas Geoffray wrote: > > Hi Dan, > > > Dan Gohman wrote: > > >> Author: djg > >> Date: Fri Jul 31 13:36:25 2009 > >> New Revision: 77706 > > >> URL:http://llvm.org/viewvc/llvm-project?rev=77706&view=rev > >> Log: > >> Remove Annotation.h, which is no longer used in the LLVM tree. > > > Another way for me is to derive the llvm::Function class, add the > > information in the new class and always create this new class instead of > > llvm::Function. Do you know if that won't mess with the llvm passes? > > Just to let you know that creating a derive class of llvm::Function > works fine in VMKit. All that is needed is to set the llvm::Function > constructor to protected instead of private. > > So I just wanted to make sure creating a derive class of llvm::Function > won't break any llvm assumptions. Otherwise, I'll commit the private --> > protected patch. > > Thanks, > Nicolas > _______________________________________________ > llvm-commits mailing list > llvm-comm... at cs.uiuc.eduhttp://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From nicolas.geoffray at lip6.fr Mon Aug 3 06:17:08 2009 From: nicolas.geoffray at lip6.fr (Nicolas Geoffray) Date: Mon, 03 Aug 2009 13:17:08 +0200 Subject: [llvm-commits] [llvm] r77706 - in /llvm/trunk: include/llvm/Support/Annotation.h lib/Support/Annotation.cpp In-Reply-To: References: <200907311836.n6VIaP2r014052@zion.cs.uiuc.edu> <4A76A75C.4040509@lip6.fr> <4A76B8A0.3030004@lip6.fr> Message-ID: <4A76C734.1050403@lip6.fr> Hi Gabor, Gabor Greif wrote: > Hi Nicolas! > > When subclassing LLVM entities you have to be very careful. OK. > Did you > test whether > deserialization from bitcode create the right subclass? > > I've just tested. Serialization of a llvm::Function subclass works fine. Deserialization creates a llvm::Function, as expected. Where can there be a problem? Thanks for the warning! Nicolas > Cheers, > > Gabor > > On Aug 3, 12:14 pm, Nicolas Geoffray wrote: > >> Hi again Dan, >> >> >> >> Nicolas Geoffray wrote: >> >>> Hi Dan, >>> >>> Dan Gohman wrote: >>> >>>> Author: djg >>>> Date: Fri Jul 31 13:36:25 2009 >>>> New Revision: 77706 >>>> >>>> URL:http://llvm.org/viewvc/llvm-project?rev=77706&view=rev >>>> Log: >>>> Remove Annotation.h, which is no longer used in the LLVM tree. >>>> >>> Another way for me is to derive the llvm::Function class, add the >>> information in the new class and always create this new class instead of >>> llvm::Function. Do you know if that won't mess with the llvm passes? >>> >> Just to let you know that creating a derive class of llvm::Function >> works fine in VMKit. All that is needed is to set the llvm::Function >> constructor to protected instead of private. >> >> So I just wanted to make sure creating a derive class of llvm::Function >> won't break any llvm assumptions. Otherwise, I'll commit the private --> >> protected patch. >> >> Thanks, >> Nicolas >> _______________________________________________ >> llvm-commits mailing list >> llvm-comm... at cs.uiuc.eduhttp://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >> > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From daniel at zuster.org Mon Aug 3 10:11:06 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Mon, 3 Aug 2009 08:11:06 -0700 Subject: [llvm-commits] [llvm] r77927 - in /llvm/trunk: include/llvm/Target/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/Blackfin/ lib/Target/CBackend/ lib/Target/CellSPU/ lib/Target/CppBackend/ lib/Target/MSIL/ lib/Target/MSP430/ lib/Target/Mips/ lib/Ta In-Reply-To: References: Message-ID: <6a8523d60908030811m3c1e5565p85deafcef537c0df@mail.gmail.com> On Mon, Aug 3, 2009 at 1:07 AM, Eli Friedman wrote: > On Sun, Aug 2, 2009 at 4:37 PM, Daniel Dunbar wrote: >> Author: ddunbar >> Date: Sun Aug ?2 18:37:13 2009 >> New Revision: 77927 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=77927&view=rev >> Log: >> Move most targets TargetMachine constructor to only taking a target triple. >> ?- The C, C++, MSIL, and Mips backends still need the module. > > I took care of the Mips backend earlier. Thanks! > It looks like the C, C++ and MSIL backends need the DataLayout member of > the Module; perhaps the standard signature for initializing a target should include > that as a separate argument? I'm not sure that is the right way to go; currently it is a little odd that the targets make up their own DataLayout independent of what was specified in the module, and various bits of code use that instead of the module layout. Intrinsically this seems bad, it seems like the module layout should be used everywhere, and the target should just validate that that layout is sane. But I don't really know how getTargetData is used in the back end, an alternate approach is to have each target provide a default layout string, and have the base TargetMachine class select either the default layout or the module layout, after it has the module available. This would also kill the unnecessarily duplicated getTargetData methods. - Daniel From devang.patel at gmail.com Mon Aug 3 10:59:07 2009 From: devang.patel at gmail.com (Devang Patel) Date: Mon, 3 Aug 2009 08:59:07 -0700 Subject: [llvm-commits] [llvm] r77960 - in /llvm/trunk/tools/lto: LTOCodeGenerator.cpp LTOCodeGenerator.h lto.cpp In-Reply-To: <200908030716.n737GhAj016782@zion.cs.uiuc.edu> References: <200908030716.n737GhAj016782@zion.cs.uiuc.edu> Message-ID: <352a1fb20908030859p5309772esa8fa97b38885f4c7@mail.gmail.com> On Mon, Aug 3, 2009 at 12:16 AM, Nick Lewycky wrote: > Author: nicholas > Date: Mon Aug ?3 02:16:42 2009 > New Revision: 77960 > > URL: http://llvm.org/viewvc/llvm-project?rev=77960&view=rev > Log: > Remove the GCC path from libLTO. This has been superceded by setAssemblerPath. > > Modified: > ? ?llvm/trunk/tools/lto/LTOCodeGenerator.cpp > ? ?llvm/trunk/tools/lto/LTOCodeGenerator.h > ? ?llvm/trunk/tools/lto/lto.cpp What about lto_codegen_set_gcc_path() ? This is breaking (removing) C api. Is it really necessary ? - Devang > > Modified: llvm/trunk/tools/lto/LTOCodeGenerator.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto/LTOCodeGenerator.cpp?rev=77960&r1=77959&r2=77960&view=diff > > ============================================================================== > --- llvm/trunk/tools/lto/LTOCodeGenerator.cpp (original) > +++ llvm/trunk/tools/lto/LTOCodeGenerator.cpp Mon Aug ?3 02:16:42 2009 > @@ -76,7 +76,7 @@ > ? ? ? _linker("LinkTimeOptimizer", "ld-temp.o", _context), _target(NULL), > ? ? ? _emitDwarfDebugInfo(false), _scopeRestrictionsDone(false), > ? ? ? _codeModel(LTO_CODEGEN_PIC_MODEL_DYNAMIC), > - ? ? ?_nativeObjectFile(NULL), _gccPath(NULL), _assemblerPath(NULL) > + ? ? ?_nativeObjectFile(NULL), _assemblerPath(NULL) > ?{ > ? ? InitializeAllTargets(); > ? ? InitializeAllAsmPrinters(); > @@ -126,13 +126,6 @@ > ? ? return true; > ?} > > -void LTOCodeGenerator::setGccPath(const char* path) > -{ > - ? ?if ( _gccPath ) > - ? ? ? ?delete _gccPath; > - ? ?_gccPath = new sys::Path(path); > -} > - > ?void LTOCodeGenerator::setAssemblerPath(const char* path) > ?{ > ? ? if ( _assemblerPath ) > @@ -240,9 +233,6 @@ > ? ? if ( _assemblerPath ) { > ? ? ? ? tool = *_assemblerPath; > ? ? ? ? needsCompilerOptions = false; > - ? ?} > - ? ?else if ( _gccPath ) { > - ? ? ? ?tool = *_gccPath; > ? ? } else { > ? ? ? ? // find compiler driver > ? ? ? ? tool = sys::Program::FindProgramByName("gcc"); > > Modified: llvm/trunk/tools/lto/LTOCodeGenerator.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto/LTOCodeGenerator.h?rev=77960&r1=77959&r2=77960&view=diff > > ============================================================================== > --- llvm/trunk/tools/lto/LTOCodeGenerator.h (original) > +++ llvm/trunk/tools/lto/LTOCodeGenerator.h Mon Aug ?3 02:16:42 2009 > @@ -37,7 +37,6 @@ > ? ? bool ? ? ? ? ? ? ? ?addModule(class LTOModule*, std::string& errMsg); > ? ? bool ? ? ? ? ? ? ? ?setDebugInfo(lto_debug_model, std::string& errMsg); > ? ? bool ? ? ? ? ? ? ? ?setCodePICModel(lto_codegen_model, std::string& errMsg); > - ? ?void ? ? ? ? ? ? ? ?setGccPath(const char* path); > ? ? void ? ? ? ? ? ? ? ?setAssemblerPath(const char* path); > ? ? void ? ? ? ? ? ? ? ?addMustPreserveSymbol(const char* sym); > ? ? bool ? ? ? ? ? ? ? ?writeMergedModules(const char* path, > @@ -63,7 +62,6 @@ > ? ? StringSet ? ? ? ? ? ? ? ? ? _mustPreserveSymbols; > ? ? llvm::MemoryBuffer* ? ? ? ? _nativeObjectFile; > ? ? std::vector ? ?_codegenOptions; > - ? ?llvm::sys::Path* ? ? ? ? ? ?_gccPath; > ? ? llvm::sys::Path* ? ? ? ? ? ?_assemblerPath; > ?}; > > > Modified: llvm/trunk/tools/lto/lto.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto/lto.cpp?rev=77960&r1=77959&r2=77960&view=diff > > ============================================================================== > --- llvm/trunk/tools/lto/lto.cpp (original) > +++ llvm/trunk/tools/lto/lto.cpp Mon Aug ?3 02:16:42 2009 > @@ -203,14 +203,6 @@ > ?} > > ?// > -// sets the path to gcc > -// > -void lto_codegen_set_gcc_path(lto_code_gen_t cg, const char* path) > -{ > - ?cg->setGccPath(path); > -} > - > -// > ?// sets the path to the assembler tool > ?// > ?void lto_codegen_set_assembler_path(lto_code_gen_t cg, const char* path) > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > -- - Devang From clattner at apple.com Mon Aug 3 11:29:23 2009 From: clattner at apple.com (Chris Lattner) Date: Mon, 3 Aug 2009 09:29:23 -0700 Subject: [llvm-commits] [llvm] r77960 - in /llvm/trunk/tools/lto: LTOCodeGenerator.cpp LTOCodeGenerator.h lto.cpp In-Reply-To: <352a1fb20908030859p5309772esa8fa97b38885f4c7@mail.gmail.com> References: <200908030716.n737GhAj016782@zion.cs.uiuc.edu> <352a1fb20908030859p5309772esa8fa97b38885f4c7@mail.gmail.com> Message-ID: On Aug 3, 2009, at 8:59 AM, Devang Patel wrote: > On Mon, Aug 3, 2009 at 12:16 AM, Nick Lewycky wrote: >> Author: nicholas >> Date: Mon Aug 3 02:16:42 2009 >> New Revision: 77960 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=77960&view=rev >> Log: >> Remove the GCC path from libLTO. This has been superceded by >> setAssemblerPath. >> >> Modified: >> llvm/trunk/tools/lto/LTOCodeGenerator.cpp >> llvm/trunk/tools/lto/LTOCodeGenerator.h >> llvm/trunk/tools/lto/lto.cpp > > What about lto_codegen_set_gcc_path() ? This is breaking (removing) C > api. Is it really necessary ? Is anyone using it? -Chris From clattner at apple.com Mon Aug 3 11:34:23 2009 From: clattner at apple.com (Chris Lattner) Date: Mon, 3 Aug 2009 09:34:23 -0700 Subject: [llvm-commits] [llvm] r77962 - in /llvm/trunk: lib/Target/X86/X86CallingConv.td lib/Target/X86/X86CompilationCallback_Win64.asm lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86Instr64bit.td lib/Target/X86/X86InstrInfo.td lib/Target/X86/X86RegisterInfo.cpp lib/Target/X86/X86TargetMachine.cpp test/CodeGen/X86/2009-06-03-Win64DisableRedZone.ll test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll In-Reply-To: <200908030813.n738D4Qg030803@zion.cs.uiuc.edu> References: <200908030813.n738D4Qg030803@zion.cs.uiuc.edu> Message-ID: <72E8EEC5-0ADC-462D-BD8A-EB90D51CA7C2@apple.com> On Aug 3, 2009, at 1:12 AM, Anton Korobeynikov wrote: > Author: asl > Date: Mon Aug 3 03:12:53 2009 > New Revision: 77962 > > URL: http://llvm.org/viewvc/llvm-project?rev=77962&view=rev > Log: > Unbreak Win64 CC. Step one: honour register save area, fix some > alignment and provide a different set of call-clobberred registers. Nice. > +++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Mon Aug 3 > 03:12:53 2009 > @@ -64,7 +64,9 @@ > Subtarget(TT, FS, is64Bit), > DataLayout(Subtarget.getDataLayout()), > FrameInfo(TargetFrameInfo::StackGrowsDown, > - Subtarget.getStackAlignment(), Subtarget.is64Bit() ? > -8 : -4), > + Subtarget.getStackAlignment(), > + (Subtarget.isTargetWin64() ? -40 : > + (Subtarget.is64Bit() ? -8 : -4))), Please split this out to be a static function or a method on subtarget. -Chris From clattner at apple.com Mon Aug 3 11:35:55 2009 From: clattner at apple.com (Chris Lattner) Date: Mon, 3 Aug 2009 09:35:55 -0700 Subject: [llvm-commits] [llvm] r77706 - in /llvm/trunk: include/llvm/Support/Annotation.h lib/Support/Annotation.cpp In-Reply-To: <4A76A75C.4040509@lip6.fr> References: <200907311836.n6VIaP2r014052@zion.cs.uiuc.edu> <4A76A75C.4040509@lip6.fr> Message-ID: <0BECC467-15D3-4E73-8085-BE55E8A4133B@apple.com> On Aug 3, 2009, at 2:01 AM, Nicolas Geoffray wrote: > Hi Dan, > > Dan Gohman wrote: >> Author: djg >> Date: Fri Jul 31 13:36:25 2009 >> New Revision: 77706 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=77706&view=rev >> Log: >> Remove Annotation.h, which is no longer used in the LLVM tree. >> > > I know this has been long waiting for LLVM and I'm happy you got rid > of > it. Unfortunately, I was using Annotations to add VM-info per function > in VMKit (e.g. a way to get the Java method out of a llvm::Function), > and I'm reluctant into using a table to store that information now > that > the Annotation class is removed. > Hi Nicolas, Why can't you just use a std::map or DenseMap on the side? Trying to actually *attach* data to LLVM IR objects is a really fragile thing to try to do. If the entire rest of the compiler can get away without it, I don't see why vmkit needs to do it. -Chris From ggreif at gmail.com Mon Aug 3 11:36:39 2009 From: ggreif at gmail.com (Gabor Greif) Date: Mon, 3 Aug 2009 09:36:39 -0700 (PDT) Subject: [llvm-commits] [llvm] r77706 - in /llvm/trunk: include/llvm/Support/Annotation.h lib/Support/Annotation.cpp In-Reply-To: <4A76C734.1050403@lip6.fr> References: <200907311836.n6VIaP2r014052@zion.cs.uiuc.edu> <4A76A75C.4040509@lip6.fr> <4A76B8A0.3030004@lip6.fr> <4A76C734.1050403@lip6.fr> Message-ID: <2d90c157-6127-409f-b026-deaaae567ee3@26g2000yqk.googlegroups.com> On Aug 3, 1:17?pm, Nicolas Geoffray wrote: > Hi Gabor, > > Gabor Greif wrote: > > Hi Nicolas! > > > When subclassing LLVM entities you have to be very careful. > > OK. > > > Did you > > test whether > > deserialization from bitcode create the right subclass? > > I've just tested. Serialization of a llvm::Function subclass works fine. > Deserialization creates a llvm::Function, as expected. Where can there > be a problem? I understood that you are subclassing llvm::Function to carry your annotations. When your function objects get serialized, do the annotations appear in the bitcode? If not, you have lost them. And when deserializing, do you get back your defined sublass? The BitcodeReader might need to be updated to deal with your subclass otherwise slicing may happen. But there is a chance that I understood your solution in the wrong way :-) Cheers, Gabor > > Thanks for the warning! > Nicolas > > > > > Cheers, > > > ? ? Gabor > > > On Aug 3, 12:14 pm, Nicolas Geoffray wrote: > > >> Hi again Dan, > > >> Nicolas Geoffray wrote: > > >>> Hi Dan, > > >>> Dan Gohman wrote: > > >>>> Author: djg > >>>> Date: Fri Jul 31 13:36:25 2009 > >>>> New Revision: 77706 > > >>>> URL:http://llvm.org/viewvc/llvm-project?rev=77706&view=rev > >>>> Log: > >>>> Remove Annotation.h, which is no longer used in the LLVM tree. > > >>> Another way for me is to derive the llvm::Function class, add the > >>> information in the new class and always create this new class instead of > >>> llvm::Function. Do you know if that won't mess with the llvm passes? > > >> Just to let you know that creating a derive class of llvm::Function > >> works fine in VMKit. All that is needed is to set the llvm::Function > >> constructor to protected instead of private. > > >> So I just wanted to make sure creating a derive class of llvm::Function > >> won't break any llvm assumptions. Otherwise, I'll commit the private --> > >> protected patch. > > >> Thanks, > >> Nicolas > >> _______________________________________________ > >> llvm-commits mailing list > >> llvm-comm... at cs.uiuc.eduhttp://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > > _______________________________________________ > > llvm-commits mailing list > > llvm-comm... at cs.uiuc.edu > >http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-comm... at cs.uiuc.eduhttp://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From greened at obbligato.org Mon Aug 3 11:46:20 2009 From: greened at obbligato.org (David A. Greene) Date: Mon, 3 Aug 2009 11:46:20 -0500 Subject: [llvm-commits] [llvm] r77740 - in /llvm/trunk: include/llvm/CodeGen/AsmPrinter.h lib/CodeGen/AsmPrinter/AsmPrinter.cpp test/CodeGen/X86/2009-04-17-tls-fast.ll test/CodeGen/X86/tls1-pic.ll test/CodeGen/X86/tls2-pic.ll test/CodeGen/X86/tls3-pic.ll test/CodeGen/X86/tls4-pic.ll utils/TableGen/AsmWriterEmitter.cpp In-Reply-To: <679A075B-43B1-4ACD-B18C-0B8C7356BA2A@apple.com> References: <200907312157.n6VLvAKm021365@zion.cs.uiuc.edu> <4A7458D7.9090808@obbligato.org> <679A075B-43B1-4ACD-B18C-0B8C7356BA2A@apple.com> Message-ID: <200908031146.20758.greened@obbligato.org> On Monday 03 August 2009 01:46, Chris Lattner wrote: > > - FirstOperandColumn = 0 and MaxOperandLength = 0 in X86TargetAsmInfo > > which disables the padding. > > Ok, this gets back to another question I have. I don't think that > these should be properties of TAI, at least not unless there are other > clients of this information. The TAI::getOperandColumn() method in > particular seems like an implementation detail of the asmprinter, not > something that should be in TAI. Agreed that getOperandColumn could be moved. But the column and operand length information really is target-specific. > However, more broadly, these are not properties that should be checked > when the asmprinter is running. If these were properties of the > "InstrInfo" class in the .td files, then X86 (for example), could be > defined like this (X86.td): > > def X86InstrInfo : InstrInfo { > let FirstOperandColumn = 42; // or whatever. > let MaxOperandLength = 20; > ... Interesting idea. > The nice thing about doing this is that if the target doesn't opt in > to this, that the tblgen generated code for the asmwriter *wouldn't > treat tab specially at all* and would not have to dynamically decide > not to do column padding. The generated code would still have to > dynamically check whether verbose-asm is enabled, but there should be > no need to dynamically check to see if the asm syntax likes tabs. > Making these values constants also allows them to constant fold in the > generated code. I agree that this could be pretty good. Unfortunately, I don't have the time to implement it at the moment. It would involve a bit of TableGen hacking, I imagine. I might be able to get to it after I've got my current set of patches sent upstream (well over a hundred at the moment). > >> Is this just a complex way to test for "FirstOperandColumn != 0" ? > > > > No, it's testing 0 for any operand, not just the first. > > Ok, maybe I'm not following it right then. When does this check > fail? Can this be removed by moving the "column padding turned on" > flag to the .td files? Yes, the check could be removed then. Right now the check fails if FirstOperandColumn == 0 or MaxOperandLength == 0. > >> Should this just be a considered a bug in .td files that don't do > >> this > >> right? What is the harm of just leaving this out? > > > > Because AsmStrs gets generated by TableGen. I'm not sure that .td > > files actually have control over it since TableGen does the encoding > > compaction itself. Look at X86GenAsdmWriter[1].inc for example. > > I'm not following what you mean here. Can you give me an example that > shows what this does? Oh! This changed since the last time I looked at it. It used to be that the tabs were embedded into the AsmStrs array and some opcodes had tabs after them and others didn't. I see now that in X86GenAsmWriter1.inc the asm boilerplate emits the tab after the opcode: O << "\t"; // Emit the opcode for the instruction. unsigned Bits = OpInfo[MI->getOpcode()]; if (Bits == 0) return false; How interesting. But then how does this work? case 10: // CMPPDrmi, CMPPDrri O << "pd"; PadToColumn(OperandColumn++); printOperand(MI, 0); O << ", "; break; Looks like the "pd" for packed cmp is emitted after the tab! What am I missing? -Dave From benny.kra at googlemail.com Mon Aug 3 08:34:08 2009 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Mon, 03 Aug 2009 13:34:08 -0000 Subject: [llvm-commits] [llvm] r77971 - in /llvm/trunk: include/llvm/Target/TargetData.h lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp lib/ExecutionEngine/Interpreter/Execution.cpp lib/ExecutionEngine/JIT/Intercept.cpp lib/Target/ARM/ARMCodeEmitter.cpp Message-ID: <200908031334.n73DYW1Z009022@zion.cs.uiuc.edu> Author: d0k Date: Mon Aug 3 08:33:33 2009 New Revision: 77971 URL: http://llvm.org/viewvc/llvm-project?rev=77971&view=rev Log: llvm_report_error already prints "LLVM ERROR:". So stop reporting errors like "LLVM ERROR: llvm: error:" or "LLVM ERROR: ERROR:". Modified: llvm/trunk/include/llvm/Target/TargetData.h llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp llvm/trunk/lib/ExecutionEngine/Interpreter/Execution.cpp llvm/trunk/lib/ExecutionEngine/JIT/Intercept.cpp llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Modified: llvm/trunk/include/llvm/Target/TargetData.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetData.h?rev=77971&r1=77970&r2=77971&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetData.h (original) +++ llvm/trunk/include/llvm/Target/TargetData.h Mon Aug 3 08:33:33 2009 @@ -112,7 +112,7 @@ /// @note This has to exist, because this is a pass, but it should never be /// used. TargetData() : ImmutablePass(&ID) { - llvm_report_error("ERROR: Bad TargetData ctor used. " + llvm_report_error("Bad TargetData ctor used. " "Tool did not specify a TargetData to use?"); } Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp?rev=77971&r1=77970&r2=77971&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp Mon Aug 3 08:33:33 2009 @@ -5074,7 +5074,7 @@ Input.ConstraintVT.isInteger()) || (OpInfo.ConstraintVT.getSizeInBits() != Input.ConstraintVT.getSizeInBits())) { - llvm_report_error("llvm: error: Unsupported asm: input constraint" + llvm_report_error("Unsupported asm: input constraint" " with a matching output constraint of incompatible" " type!"); } @@ -5179,7 +5179,7 @@ // Copy the output from the appropriate register. Find a register that // we can use. if (OpInfo.AssignedRegs.Regs.empty()) { - llvm_report_error("llvm: error: Couldn't allocate output reg for" + llvm_report_error("Couldn't allocate output reg for" " constraint '" + OpInfo.ConstraintCode + "'!"); } @@ -5233,8 +5233,7 @@ || (OpFlag & 7) == 6 /* EARLYCLOBBER REGDEF */) { // Add (OpFlag&0xffff)>>3 registers to MatchedRegs. if (OpInfo.isIndirect) { - llvm_report_error("llvm: error: " - "Don't know how to handle tied indirect " + llvm_report_error("Don't know how to handle tied indirect " "register inputs yet!"); } RegsForValue MatchedRegs; @@ -5277,7 +5276,7 @@ TLI.LowerAsmOperandForConstraint(InOperandVal, OpInfo.ConstraintCode[0], hasMemory, Ops, DAG); if (Ops.empty()) { - llvm_report_error("llvm: error: Invalid operand for inline asm" + llvm_report_error("Invalid operand for inline asm" " constraint '" + OpInfo.ConstraintCode + "'!"); } @@ -5308,7 +5307,7 @@ // Copy the input into the appropriate registers. if (OpInfo.AssignedRegs.Regs.empty()) { - llvm_report_error("llvm: error: Couldn't allocate input reg for" + llvm_report_error("Couldn't allocate input reg for" " constraint '"+ OpInfo.ConstraintCode +"'!"); } Modified: llvm/trunk/lib/ExecutionEngine/Interpreter/Execution.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/Interpreter/Execution.cpp?rev=77971&r1=77970&r2=77971&view=diff ============================================================================== --- llvm/trunk/lib/ExecutionEngine/Interpreter/Execution.cpp (original) +++ llvm/trunk/lib/ExecutionEngine/Interpreter/Execution.cpp Mon Aug 3 08:33:33 2009 @@ -644,7 +644,7 @@ } void Interpreter::visitUnreachableInst(UnreachableInst &I) { - llvm_report_error("ERROR: Program executed an 'unreachable' instruction!"); + llvm_report_error("Program executed an 'unreachable' instruction!"); } void Interpreter::visitBranchInst(BranchInst &I) { Modified: llvm/trunk/lib/ExecutionEngine/JIT/Intercept.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/JIT/Intercept.cpp?rev=77971&r1=77970&r2=77971&view=diff ============================================================================== --- llvm/trunk/lib/ExecutionEngine/JIT/Intercept.cpp (original) +++ llvm/trunk/lib/ExecutionEngine/JIT/Intercept.cpp Mon Aug 3 08:33:33 2009 @@ -141,7 +141,7 @@ return RP; if (AbortOnFailure) { - llvm_report_error("ERROR: Program used external function '"+Name+ + llvm_report_error("Program used external function '"+Name+ "' which could not be resolved!"); } return 0; Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=77971&r1=77970&r2=77971&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Mon Aug 3 08:33:33 2009 @@ -749,7 +749,7 @@ const TargetInstrDesc &TID = MI.getDesc(); if (TID.Opcode == ARM::BFC) { - llvm_report_error("ERROR: ARMv6t2 JIT is not yet supported."); + llvm_report_error("ARMv6t2 JIT is not yet supported."); } // Part of binary is determined by TableGn. From dag at cray.com Mon Aug 3 11:50:17 2009 From: dag at cray.com (David Greene) Date: Mon, 3 Aug 2009 11:50:17 -0500 Subject: [llvm-commits] [PATCH] Asm Loop Nest Comments In-Reply-To: <0F3CDC02-9267-4A6D-AFE4-7DCF9715CB64@apple.com> References: <200907301739.26152.dag@cray.com> <0F3CDC02-9267-4A6D-AFE4-7DCF9715CB64@apple.com> Message-ID: <200908031150.18088.dag@cray.com> On Saturday 01 August 2009 15:01, Dan Gohman wrote: > Hi Dave, > > This looks good! Here are some comments: > > Instead of using LoopInfo and Loop, this should use > MachineLoopInfo and MachineLoop. Ok. Those didn't exist when I initially did this. :) > Would be be practical to compute loop headers just-in-time > instead of precomputing it and storing it in a map? Switching > to MachineLoop would simplify this also. I'll take a look. > Would you mind making the default scale be 2 instead of 3? > That's what LoopInfo's print function uses, for example. But > it's not critical. Sure, no problem. > I'm a little confused about this: > > + inline Indent indent(int lvl, int amt = 3) { > + return(Indent(lvl, amt)); > + } > > This defines a function named indent which wraps a > constructor for Indent? Why not just have clients invoke > the class constructor directly? It's the IO manipulator syntax: os << indent(3) << string; It's indent(3) vs. Indent(3). Ok, not huge but it looks more "standard C++ like." I'll change it. > Minor style point: return values shouldn't be enclosed in parens. Gotcha. -Dave From dag at cray.com Mon Aug 3 11:51:21 2009 From: dag at cray.com (David Greene) Date: Mon, 3 Aug 2009 11:51:21 -0500 Subject: [llvm-commits] [PATCH] Dump with LI Indices In-Reply-To: References: <200907301710.32176.dag@cray.com> Message-ID: <200908031151.22285.dag@cray.com> On Saturday 01 August 2009 19:57, Evan Cheng wrote: > Do we really need Dump.h? Since it's Machine specific, perhaps it's ok > just put it in MachineFunction.h? But it gets used by MachineBasicBlock and MachineInstr too. -Dave From nicolas.geoffray at lip6.fr Mon Aug 3 12:05:25 2009 From: nicolas.geoffray at lip6.fr (Nicolas Geoffray) Date: Mon, 03 Aug 2009 19:05:25 +0200 Subject: [llvm-commits] [llvm] r77706 - in /llvm/trunk: include/llvm/Support/Annotation.h lib/Support/Annotation.cpp In-Reply-To: <0BECC467-15D3-4E73-8085-BE55E8A4133B@apple.com> References: <200907311836.n6VIaP2r014052@zion.cs.uiuc.edu> <4A76A75C.4040509@lip6.fr> <0BECC467-15D3-4E73-8085-BE55E8A4133B@apple.com> Message-ID: <4A7718D5.50604@lip6.fr> Hi Chris, Chris Lattner wrote: > Hi Nicolas, > > Why can't you just use a std::map or DenseMap on the side? Trying to > actually *attach* data to LLVM IR objects is a really fragile thing to > try to do. Yes, that's what I fear :( > If the entire rest of the compiler can get away without > it, I don't see why vmkit needs to do it. > I can surely use maps for that. My problem is that (a) I haven't coded a map implementation where I can control the allocations, and that's very important for the runtime. DenseMap and std::map have their own malloc allocators (the allocator in stl isn't usable). Using annotations and subclassing were easier solutions, timely speaking. And (b) I can't avoid a global map, and I hate global maps (needs locking and a global allocator). When llvm wants vmkit to materialize a llvm::function, I have no way of knowing what is the context of this function. For example, a context in Java is a class loader. By being able to attach this "context" to annotations or subclasses, there was no need of the global map. Nicolas > -Chris > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From nicolas.geoffray at lip6.fr Mon Aug 3 12:10:25 2009 From: nicolas.geoffray at lip6.fr (Nicolas Geoffray) Date: Mon, 03 Aug 2009 19:10:25 +0200 Subject: [llvm-commits] [llvm] r77706 - in /llvm/trunk: include/llvm/Support/Annotation.h lib/Support/Annotation.cpp In-Reply-To: <2d90c157-6127-409f-b026-deaaae567ee3@26g2000yqk.googlegroups.com> References: <200907311836.n6VIaP2r014052@zion.cs.uiuc.edu> <4A76A75C.4040509@lip6.fr> <4A76B8A0.3030004@lip6.fr> <4A76C734.1050403@lip6.fr> <2d90c157-6127-409f-b026-deaaae567ee3@26g2000yqk.googlegroups.com> Message-ID: <4A771A01.7090000@lip6.fr> Gabor Greif wrote: > > I understood that you are subclassing llvm::Function to carry your > annotations. > No, I was using the Annotation class previously to attach per-function information. Now that the Annotation class is deleted, I would like to subclass the llvm::Function to put these informations in the subclass. Serialization happens fine with the subclass. When I deserialize the bitcode I get llvm::Function and not the subclass. As expected. Nicolas From gohman at apple.com Mon Aug 3 12:32:27 2009 From: gohman at apple.com (Dan Gohman) Date: Mon, 3 Aug 2009 10:32:27 -0700 Subject: [llvm-commits] [llvm] r77706 - in /llvm/trunk: include/llvm/Support/Annotation.h lib/Support/Annotation.cpp In-Reply-To: <4A7718D5.50604@lip6.fr> References: <200907311836.n6VIaP2r014052@zion.cs.uiuc.edu> <4A76A75C.4040509@lip6.fr> <0BECC467-15D3-4E73-8085-BE55E8A4133B@apple.com> <4A7718D5.50604@lip6.fr> Message-ID: <1ED15384-C3EE-4FD7-9ECA-041D11C0973D@apple.com> On Aug 3, 2009, at 10:05 AM, Nicolas Geoffray wrote: > >> If the entire rest of the compiler can get away without >> it, I don't see why vmkit needs to do it. >> > > I can surely use maps for that. My problem is that (a) I haven't > coded a > map implementation where I can control the allocations, and that's > very > important for the runtime. DenseMap and std::map have their own malloc > allocators (the allocator in stl isn't usable). Using annotations and > subclassing were easier solutions, timely speaking. And (b) I can't > avoid a global map, and I hate global maps (needs locking and a global > allocator). When llvm wants vmkit to materialize a llvm::function, I > have no way of knowing what is the context of this function. For > example, a context in Java is a class loader. By being able to attach > this "context" to annotations or subclasses, there was no need of the > global map. What if you put a map member in your ModuleProvider subclass? That shouldn't require any locking beyond whatever is already present to protect the Module itself. Does vmkit assign contexts to Functions when the Module is created? If so, all of the map's allocation would happen at the same time, and materializeFunction calls wouldn't see any additional allocations. Dan From daniel at zuster.org Mon Aug 3 12:34:37 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Mon, 03 Aug 2009 17:34:37 -0000 Subject: [llvm-commits] [llvm] r77973 - /llvm/trunk/tools/llc/llc.cpp Message-ID: <200908031734.n73HYdox018026@zion.cs.uiuc.edu> Author: ddunbar Date: Mon Aug 3 12:34:19 2009 New Revision: 77973 URL: http://llvm.org/viewvc/llvm-project?rev=77973&view=rev Log: Provide target data from the module if the target machine doesn't have any. Modified: llvm/trunk/tools/llc/llc.cpp Modified: llvm/trunk/tools/llc/llc.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llc/llc.cpp?rev=77973&r1=77972&r2=77973&view=diff ============================================================================== --- llvm/trunk/tools/llc/llc.cpp (original) +++ llvm/trunk/tools/llc/llc.cpp Mon Aug 3 12:34:19 2009 @@ -310,7 +310,13 @@ // used by strange things like the C backend. if (Target.WantsWholeFile()) { PassManager PM; - PM.add(new TargetData(*Target.getTargetData())); + + // Add the target data from the target machine, if it exists, or the module. + if (const TargetData *TD = Target.getTargetData()) + PM.add(new TargetData(*TD)); + else + PM.add(new TargetData(&mod)); + if (!NoVerify) PM.add(createVerifierPass()); @@ -328,7 +334,12 @@ // Build up all of the passes that we want to do to the module. ExistingModuleProvider Provider(M.release()); FunctionPassManager Passes(&Provider); - Passes.add(new TargetData(*Target.getTargetData())); + + // Add the target data from the target machine, if it exists, or the module. + if (const TargetData *TD = Target.getTargetData()) + Passes.add(new TargetData(*TD)); + else + Passes.add(new TargetData(&mod)); #ifndef NDEBUG if (!NoVerify) From sanjiv.gupta at microchip.com Mon Aug 3 12:35:24 2009 From: sanjiv.gupta at microchip.com (Sanjiv Gupta) Date: Mon, 03 Aug 2009 17:35:24 -0000 Subject: [llvm-commits] [llvm] r77974 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp Message-ID: <200908031735.n73HZPBp018060@zion.cs.uiuc.edu> Author: sgupta Date: Mon Aug 3 12:35:21 2009 New Revision: 77974 URL: http://llvm.org/viewvc/llvm-project?rev=77974&view=rev Log: Allow targets to custom handle softening of results or operands before trying the standard stuff. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp?rev=77974&r1=77973&r2=77974&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp Mon Aug 3 12:35:21 2009 @@ -47,6 +47,10 @@ errs() << "\n"); SDValue R = SDValue(); + // See if the target wants to custom handle softening this result. + if (CustomLowerNode(N, N->getValueType(ResNo), true)) + return; + switch (N->getOpcode()) { default: #ifndef NDEBUG @@ -535,6 +539,10 @@ errs() << "\n"); SDValue Res = SDValue(); + // See if target wants to custom handle softening this operand. + if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false)) + return false; + switch (N->getOpcode()) { default: #ifndef NDEBUG From daniel at zuster.org Mon Aug 3 12:40:53 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Mon, 03 Aug 2009 17:40:53 -0000 Subject: [llvm-commits] [llvm] r77975 - in /llvm/trunk/lib/Target: CBackend/CTargetMachine.h CppBackend/CPPTargetMachine.h MSIL/MSILWriter.cpp Message-ID: <200908031740.n73HeupH018286@zion.cs.uiuc.edu> Author: ddunbar Date: Mon Aug 3 12:40:25 2009 New Revision: 77975 URL: http://llvm.org/viewvc/llvm-project?rev=77975&view=rev Log: Change C, CBE, MSIL to not provide target data via getTargetData(). - The theory is these should never actually be called, since these boil down to passes which can access the target data via the standard mechanism. Modified: llvm/trunk/lib/Target/CBackend/CTargetMachine.h llvm/trunk/lib/Target/CppBackend/CPPTargetMachine.h llvm/trunk/lib/Target/MSIL/MSILWriter.cpp Modified: llvm/trunk/lib/Target/CBackend/CTargetMachine.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CBackend/CTargetMachine.h?rev=77975&r1=77974&r2=77975&view=diff ============================================================================== --- llvm/trunk/lib/Target/CBackend/CTargetMachine.h (original) +++ llvm/trunk/lib/Target/CBackend/CTargetMachine.h Mon Aug 3 12:40:25 2009 @@ -32,7 +32,7 @@ CodeGenFileType FileType, CodeGenOpt::Level OptLevel); - virtual const TargetData *getTargetData() const { return &DataLayout; } + virtual const TargetData *getTargetData() const { return 0; } }; extern Target TheCBackendTarget; Modified: llvm/trunk/lib/Target/CppBackend/CPPTargetMachine.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CppBackend/CPPTargetMachine.h?rev=77975&r1=77974&r2=77975&view=diff ============================================================================== --- llvm/trunk/lib/Target/CppBackend/CPPTargetMachine.h (original) +++ llvm/trunk/lib/Target/CppBackend/CPPTargetMachine.h Mon Aug 3 12:40:25 2009 @@ -34,7 +34,7 @@ CodeGenFileType FileType, CodeGenOpt::Level OptLevel); - virtual const TargetData *getTargetData() const { return &DataLayout; } + virtual const TargetData *getTargetData() const { return 0; } }; extern Target TheCppBackendTarget; Modified: llvm/trunk/lib/Target/MSIL/MSILWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSIL/MSILWriter.cpp?rev=77975&r1=77974&r2=77975&view=diff ============================================================================== --- llvm/trunk/lib/Target/MSIL/MSILWriter.cpp (original) +++ llvm/trunk/lib/Target/MSIL/MSILWriter.cpp Mon Aug 3 12:40:25 2009 @@ -42,7 +42,7 @@ CodeGenFileType FileType, CodeGenOpt::Level OptLevel); - virtual const TargetData *getTargetData() const { return &DataLayout; } + virtual const TargetData *getTargetData() const { return 0; } }; } From parseerror at gmail.com Mon Aug 3 12:48:04 2009 From: parseerror at gmail.com (Ryan Flynn) Date: Mon, 3 Aug 2009 13:48:04 -0400 Subject: [llvm-commits] [commit-after-approval] printf("foo %s baz\n", "bar") -> puts("foo bar baz") Message-ID: given a printf() call format containing a single "%s" conversion specifier and a constant string parameter, inlines parameter into format and lowers printf() to puts(). it's a bit more complex than the other printf() optimizations, but i happened to run into the situation and it seemed pretty common and straightforward to implement. my first attempt at an optimization, constructive criticism appreciated. -------------- next part -------------- A non-text attachment was scrubbed... Name: printf-inline-string-param.patch Type: text/x-diff Size: 2477 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090803/b8beb86d/attachment.bin From devang.patel at gmail.com Mon Aug 3 12:49:10 2009 From: devang.patel at gmail.com (Devang Patel) Date: Mon, 3 Aug 2009 10:49:10 -0700 Subject: [llvm-commits] [llvm] r77960 - in /llvm/trunk/tools/lto: LTOCodeGenerator.cpp LTOCodeGenerator.h lto.cpp In-Reply-To: References: <200908030716.n737GhAj016782@zion.cs.uiuc.edu> <352a1fb20908030859p5309772esa8fa97b38885f4c7@mail.gmail.com> Message-ID: <352a1fb20908031049o2b30eb5dq40c87145a8799ab2@mail.gmail.com> On Mon, Aug 3, 2009 at 9:29 AM, Chris Lattner wrote: > > On Aug 3, 2009, at 8:59 AM, Devang Patel wrote: > >> On Mon, Aug 3, 2009 at 12:16 AM, Nick Lewycky wrote: >>> Author: nicholas >>> Date: Mon Aug ?3 02:16:42 2009 >>> New Revision: 77960 >>> >>> URL: http://llvm.org/viewvc/llvm-project?rev=77960&view=rev >>> Log: >>> Remove the GCC path from libLTO. This has been superceded by >>> setAssemblerPath. >>> >>> Modified: >>> ? ?llvm/trunk/tools/lto/LTOCodeGenerator.cpp >>> ? ?llvm/trunk/tools/lto/LTOCodeGenerator.h >>> ? ?llvm/trunk/tools/lto/lto.cpp >> >> What about lto_codegen_set_gcc_path() ? This is breaking (removing) C >> api. Is it really necessary ? > > Is anyone using it? I do not know. Typically lto clients are not in llvm svn. AFAIK, Darwin ld64 does not use lto_codegen_set_gcc_path(). I am not sure about other clients. - Devang From sabre at nondot.org Mon Aug 3 13:04:54 2009 From: sabre at nondot.org (Chris Lattner) Date: Mon, 03 Aug 2009 18:04:54 -0000 Subject: [llvm-commits] [llvm] r77976 - /llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp Message-ID: <200908031804.n73I4xYd019191@zion.cs.uiuc.edu> Author: lattner Date: Mon Aug 3 13:04:42 2009 New Revision: 77976 URL: http://llvm.org/viewvc/llvm-project?rev=77976&view=rev Log: make SwitchToSection accept null sections for now. Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp?rev=77976&r1=77975&r2=77976&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp (original) +++ llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp Mon Aug 3 13:04:42 2009 @@ -132,9 +132,14 @@ } /// SwitchToSection - Switch to the specified section of the executable if we -/// are not already in it! +/// are not already in it! If "NS" is null, then this causes us to exit the +/// current section and not reenter another one. This is generally used for +/// asmprinter hacks. +/// +/// FIXME: Remove support for null sections. +/// void AsmPrinter::SwitchToSection(const MCSection *NS) { - const std::string &NewSection = NS->getName(); + const std::string &NewSection = NS ? NS->getName() : ""; // If we're already in this section, we're done. if (CurrentSection == NewSection) return; @@ -165,7 +170,7 @@ O << TAI->getDataSectionStartSuffix() << '\n'; } - IsInTextSection = NS->getKind().isText(); + IsInTextSection = NS ? NS->getKind().isText() : false; } void AsmPrinter::getAnalysisUsage(AnalysisUsage &AU) const { From sabre at nondot.org Mon Aug 3 13:06:09 2009 From: sabre at nondot.org (Chris Lattner) Date: Mon, 03 Aug 2009 18:06:09 -0000 Subject: [llvm-commits] [llvm] r77977 - /llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp Message-ID: <200908031806.n73I6Ahh019244@zion.cs.uiuc.edu> Author: lattner Date: Mon Aug 3 13:06:07 2009 New Revision: 77977 URL: http://llvm.org/viewvc/llvm-project?rev=77977&view=rev Log: eliminate textual section switching from intel asm printer. This will cause it to enter the ".text" section instead of "_text" but masm is already broken. Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp?rev=77977&r1=77976&r2=77977&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp Mon Aug 3 13:06:07 2009 @@ -143,7 +143,8 @@ decorateName(CurrentFnName, F); - SwitchToTextSection("_text", F); + SwitchToSection(getObjFileLowering().SectionForGlobal(F, Mang, TM)); + switch (F->getLinkage()) { default: llvm_unreachable("Unsupported linkage type!"); case Function::PrivateLinkage: @@ -494,14 +495,14 @@ case GlobalValue::LinkOnceODRLinkage: case GlobalValue::WeakAnyLinkage: case GlobalValue::WeakODRLinkage: - SwitchToDataSection(""); + SwitchToSection(0); O << name << "?\tSEGEMNT PARA common 'COMMON'\n"; bCustomSegment = true; // FIXME: the default alignment is 16 bytes, but 1, 2, 4, and 256 // are also available. break; case GlobalValue::AppendingLinkage: - SwitchToDataSection(""); + SwitchToSection(0); O << name << "?\tSEGMENT PARA public 'DATA'\n"; bCustomSegment = true; // FIXME: the default alignment is 16 bytes, but 1, 2, 4, and 256 @@ -538,7 +539,7 @@ bool X86IntelAsmPrinter::doFinalization(Module &M) { // Output linker support code for dllexported globals if (!DLLExportedGVs.empty() || !DLLExportedFns.empty()) { - SwitchToDataSection(""); + SwitchToSection(0); O << "; WARNING: The following code is valid only with MASM v8.x" << "and (possible) higher\n" << "; This version of MASM is usually shipped with Microsoft " @@ -548,24 +549,23 @@ << "; dllexported symbols in the earlier versions of MASM in fully " << "automatic way\n\n"; O << "_drectve\t segment info alias('.drectve')\n"; - } - for (StringSet<>::iterator i = DLLExportedGVs.begin(), - e = DLLExportedGVs.end(); - i != e; ++i) - O << "\t db ' /EXPORT:" << i->getKeyData() << ",data'\n"; - - for (StringSet<>::iterator i = DLLExportedFns.begin(), - e = DLLExportedFns.end(); - i != e; ++i) - O << "\t db ' /EXPORT:" << i->getKeyData() << "'\n"; + for (StringSet<>::iterator i = DLLExportedGVs.begin(), + e = DLLExportedGVs.end(); + i != e; ++i) + O << "\t db ' /EXPORT:" << i->getKeyData() << ",data'\n"; + + for (StringSet<>::iterator i = DLLExportedFns.begin(), + e = DLLExportedFns.end(); + i != e; ++i) + O << "\t db ' /EXPORT:" << i->getKeyData() << "'\n"; - if (!DLLExportedGVs.empty() || !DLLExportedFns.empty()) O << "_drectve\t ends\n"; + } // Bypass X86SharedAsmPrinter::doFinalization(). bool Result = AsmPrinter::doFinalization(M); - SwitchToDataSection(""); + SwitchToSection(0); O << "\tend\n"; return Result; } From evan.cheng at apple.com Mon Aug 3 13:07:23 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 03 Aug 2009 18:07:23 -0000 Subject: [llvm-commits] [llvm] r77978 - /llvm/trunk/lib/Target/X86/X86InstrMMX.td Message-ID: <200908031807.n73I7NYs019290@zion.cs.uiuc.edu> Author: evancheng Date: Mon Aug 3 13:07:19 2009 New Revision: 77978 URL: http://llvm.org/viewvc/llvm-project?rev=77978&view=rev Log: Remove neverHasSideEffects on MMX_MOVD64rrv164 since it has a matching pattern. Modified: llvm/trunk/lib/Target/X86/X86InstrMMX.td Modified: llvm/trunk/lib/Target/X86/X86InstrMMX.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrMMX.td?rev=77978&r1=77977&r2=77978&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrMMX.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrMMX.td Mon Aug 3 13:07:19 2009 @@ -163,7 +163,7 @@ "movd\t{$src, $dst|$dst, $src}", []>; -let neverHasSideEffects = 1 in { +let neverHasSideEffects = 1 in // These are 64 bit moves, but since the OS X assembler doesn't // recognize a register-register movq, we write them as // movd. @@ -173,7 +173,6 @@ def MMX_MOVD64rrv164 : MMXI<0x6E, MRMSrcReg, (outs VR64:$dst), (ins GR64:$src), "movd\t{$src, $dst|$dst, $src}", [(set VR64:$dst, (v1i64 (scalar_to_vector GR64:$src)))]>; -} let neverHasSideEffects = 1 in def MMX_MOVQ64rr : MMXI<0x6F, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src), From daniel at zuster.org Mon Aug 3 13:18:54 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Mon, 03 Aug 2009 18:18:54 -0000 Subject: [llvm-commits] [zorg] r77979 - in /zorg/trunk/buildbot/smooshlab: master/org.llvm.smooshlab.master.plist slave/org.llvm.smooshlab.slave.plist Message-ID: <200908031819.n73IJ2ZC019632@zion.cs.uiuc.edu> Author: ddunbar Date: Mon Aug 3 13:18:15 2009 New Revision: 77979 URL: http://llvm.org/viewvc/llvm-project?rev=77979&view=rev Log: Fix typos Modified: zorg/trunk/buildbot/smooshlab/master/org.llvm.smooshlab.master.plist zorg/trunk/buildbot/smooshlab/slave/org.llvm.smooshlab.slave.plist Modified: zorg/trunk/buildbot/smooshlab/master/org.llvm.smooshlab.master.plist URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/smooshlab/master/org.llvm.smooshlab.master.plist?rev=77979&r1=77978&r2=77979&view=diff ============================================================================== --- zorg/trunk/buildbot/smooshlab/master/org.llvm.smooshlab.master.plist (original) +++ zorg/trunk/buildbot/smooshlab/master/org.llvm.smooshlab.master.plist Mon Aug 3 13:18:15 2009 @@ -11,7 +11,7 @@ WorkingDirectory - /Users/buildmaster/zorg/buildbot/masters/smooshlab + /Users/buildmaster/zorg/buildbot/smooshlab/master ProgramArguments Modified: zorg/trunk/buildbot/smooshlab/slave/org.llvm.smooshlab.slave.plist URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/smooshlab/slave/org.llvm.smooshlab.slave.plist?rev=77979&r1=77978&r2=77979&view=diff ============================================================================== --- zorg/trunk/buildbot/smooshlab/slave/org.llvm.smooshlab.slave.plist (original) +++ zorg/trunk/buildbot/smooshlab/slave/org.llvm.smooshlab.slave.plist Mon Aug 3 13:18:15 2009 @@ -5,11 +5,13 @@ Label org.llvm.smooshlab.slave + UserName buildslave + WorkingDirectory - /Users/buildslave/zorg/buildbot/slaves/smooshlab + /Users/buildslave/zorg/buildbot/smooshlab/slave ProgramArguments From bruno.cardoso at gmail.com Mon Aug 3 13:23:11 2009 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Mon, 3 Aug 2009 15:23:11 -0300 Subject: [llvm-commits] [PATCH] x86 code emitter improvements for object files In-Reply-To: <275e64e40907311603k11679adeybd7aa160739b1908@mail.gmail.com> References: <275e64e40907311603k11679adeybd7aa160739b1908@mail.gmail.com> Message-ID: <275e64e40908031123p3ddc4547qa74bf4326fb2d321@mail.gmail.com> Is it ok to commit this? On Fri, Jul 31, 2009 at 8:03 PM, Bruno Cardoso Lopes wrote: > Hi all, > > The X86CodeEmitter has the following behaviour: > > 1) When emiting displacements: > - Only use pc_relative relocations for x86_64 (globals, cstpools and jmptables) > - For x86, only uses pc_rel ou pic_re > This two items above do not always work for ELF. > > 2) RIP addressing: > The way emitMemModRMByte works now uses RIP relocation for all cases > where RegBase=0, IndexReg=0, and when the displacement needs relocation. And > for those cases, it will never generate a SIB byte + absolute > relocation, which ELF > needs. > > 3) The JIT can get the real address of cstpools and jmptables during > code emission, > but the same won't work for relocatable object files. > > This patch try to solve the 3 problems above to properly emit elf > binaries for x86/x86_64. With > this changes applied (together with elf improvements I've not commited > yet) I was able > to run 209/243 (83%) of SinglesSources using ELF object files emited by LLC :) > and with no regressions for JIT. > > The way the patch was done tries to ensure that no previous JIT code > emission mechanism will > be changed, trying to avoid loss in performance and new JIT bugs. > > The patch also introduces a new x86 relocation type reloc_absolute_word_sext, > which is lowered to x86 elf reloc type R_X86_64_32S. > > Please, review and comment :) > > -- > Bruno Cardoso Lopes > http://www.brunocardoso.cc > -- Bruno Cardoso Lopes http://www.brunocardoso.cc From daniel at zuster.org Mon Aug 3 13:30:23 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Mon, 03 Aug 2009 18:30:23 -0000 Subject: [llvm-commits] [zorg] r77980 - /zorg/trunk/buildbot/README.txt Message-ID: <200908031830.n73IUQj0020050@zion.cs.uiuc.edu> Author: ddunbar Date: Mon Aug 3 13:29:40 2009 New Revision: 77980 URL: http://llvm.org/viewvc/llvm-project?rev=77980&view=rev Log: Add description of the steps necessary to create a build slave based on the smooshlab skeleton. Added: zorg/trunk/buildbot/README.txt Added: zorg/trunk/buildbot/README.txt URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/README.txt?rev=77980&view=auto ============================================================================== --- zorg/trunk/buildbot/README.txt (added) +++ zorg/trunk/buildbot/README.txt Mon Aug 3 13:29:40 2009 @@ -0,0 +1,22 @@ +This directory contains a working skeleton for setting up a buildbot system +for testing LLVM. + +Build Slaves +------------ +These are the steps to install a buildslave based on this skeleton: + + 1. Install buildbot. + + 2. Create a user for the buildslave, e.g. "buildslave". + + 3. Check out the "zorg" SVN module somewhere as the buildslave user, + e.g. ~buildslave/zorg. + + 4. Edit "zorg/buildbot/smooshlab/Config.py" and fix getBuildmasterHost to + return the correct host name. You may also need to fix the buildslave + name and password to match what the master expects. + + 5. Configure your system to start the buildbot automatically. On Mac + OS X this means copying the sample .plist to /Library/LaunchDaemons + (editing it as appropriate if the user name or slave directories are + different), and using 'launchctl' to load and start it. From clattner at apple.com Mon Aug 3 14:00:48 2009 From: clattner at apple.com (Chris Lattner) Date: Mon, 3 Aug 2009 12:00:48 -0700 Subject: [llvm-commits] [PATCH] x86 code emitter improvements for object files In-Reply-To: <275e64e40907311603k11679adeybd7aa160739b1908@mail.gmail.com> References: <275e64e40907311603k11679adeybd7aa160739b1908@mail.gmail.com> Message-ID: <0C952180-94F8-475D-88ED-8EF214A9D02B@apple.com> On Jul 31, 2009, at 4:03 PM, Bruno Cardoso Lopes wrote: > Hi all, > > The X86CodeEmitter has the following behaviour: > > 1) When emiting displacements: > - Only use pc_relative relocations for x86_64 (globals, cstpools and > jmptables) > - For x86, only uses pc_rel ou pic_re > This two items above do not always work for ELF. Hi Bruno, I don't have an opinion about this patch specifically, but would it be possible to make the code emitter be driven off the asm operand flags instead of making equivalent decisions that have to mirror what isel does? Specifically, MO.getTargetFlags() should tell the code emitter how to handle the CPI/JT/GA/ExtSym operands, X86ATTAsmPrinter.cpp has stuff like this: switch (MO.getTargetFlags()) { default: llvm_unreachable("Unknown target flag on GV operand"); case X86II::MO_NO_FLAG: // No flag. break; case X86II::MO_DARWIN_NONLAZY: case X86II::MO_DARWIN_HIDDEN_NONLAZY: case X86II::MO_DLLIMPORT: case X86II::MO_DARWIN_STUB: // These affect the name of the symbol, not any suffix. break; case X86II::MO_GOT_ABSOLUTE_ADDRESS: O << " + [.-"; PrintPICBaseSymbol(); O << ']'; break; case X86II::MO_PIC_BASE_OFFSET: case X86II::MO_DARWIN_NONLAZY_PIC_BASE: case X86II::MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE: O << '-'; PrintPICBaseSymbol(); break; case X86II::MO_TLSGD: O << "@TLSGD"; break; case X86II::MO_GOTTPOFF: O << "@GOTTPOFF"; break; case X86II::MO_INDNTPOFF: O << "@INDNTPOFF"; break; case X86II::MO_TPOFF: O << "@TPOFF"; break; case X86II::MO_NTPOFF: O << "@NTPOFF"; break; case X86II::MO_GOTPCREL: O << "@GOTPCREL"; break; case X86II::MO_GOT: O << "@GOT"; break; case X86II::MO_GOTOFF: O << "@GOTOFF"; break; case X86II::MO_PLT: O << "@PLT"; break; } For example. It would be better to base the encoding on this flag than checking things like Is64BitMode, IsPIC etc. > This patch try to solve the 3 problems above to properly emit elf > binaries for x86/x86_64. With > this changes applied (together with elf improvements I've not commited > yet) I was able > to run 209/243 (83%) of SinglesSources using ELF object files emited > by LLC :) > and with no regressions for JIT. Wow, nice!! -Chris From clattner at apple.com Mon Aug 3 14:01:28 2009 From: clattner at apple.com (Chris Lattner) Date: Mon, 3 Aug 2009 12:01:28 -0700 Subject: [llvm-commits] [llvm] r77960 - in /llvm/trunk/tools/lto: LTOCodeGenerator.cpp LTOCodeGenerator.h lto.cpp In-Reply-To: <352a1fb20908031049o2b30eb5dq40c87145a8799ab2@mail.gmail.com> References: <200908030716.n737GhAj016782@zion.cs.uiuc.edu> <352a1fb20908030859p5309772esa8fa97b38885f4c7@mail.gmail.com> <352a1fb20908031049o2b30eb5dq40c87145a8799ab2@mail.gmail.com> Message-ID: <259EE804-34CE-4AC7-BE16-90311185FA8F@apple.com> On Aug 3, 2009, at 10:49 AM, Devang Patel wrote: >>>> >>>> Modified: >>>> llvm/trunk/tools/lto/LTOCodeGenerator.cpp >>>> llvm/trunk/tools/lto/LTOCodeGenerator.h >>>> llvm/trunk/tools/lto/lto.cpp >>> >>> What about lto_codegen_set_gcc_path() ? This is breaking >>> (removing) C >>> api. Is it really necessary ? >> >> Is anyone using it? > > I do not know. Typically lto clients are not in llvm svn. AFAIK, > Darwin ld64 does not use lto_codegen_set_gcc_path(). I am not sure > about other clients. Ok, since we didn't ship it in llvm 2.5, unless someone knows of a client of this, I think it is fine to remove it. -Chris From bob.wilson at apple.com Mon Aug 3 14:06:16 2009 From: bob.wilson at apple.com (Bob Wilson) Date: Mon, 3 Aug 2009 12:06:16 -0700 Subject: [llvm-commits] [llvm] r77974 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp In-Reply-To: <200908031735.n73HZPBp018060@zion.cs.uiuc.edu> References: <200908031735.n73HZPBp018060@zion.cs.uiuc.edu> Message-ID: <7D467673-881E-40C5-86E7-685A3E4BCFA3@apple.com> This patch broke 3 of the ARM dejagnu tests. I've reverted it for now. On Aug 3, 2009, at 10:35 AM, Sanjiv Gupta wrote: > Author: sgupta > Date: Mon Aug 3 12:35:21 2009 > New Revision: 77974 > > URL: http://llvm.org/viewvc/llvm-project?rev=77974&view=rev > Log: > Allow targets to custom handle softening of results or operands > before trying the standard stuff. > > Modified: > llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp > > Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp?rev=77974&r1=77973&r2=77974&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp > (original) > +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp Mon > Aug 3 12:35:21 2009 > @@ -47,6 +47,10 @@ > errs() << "\n"); > SDValue R = SDValue(); > > + // See if the target wants to custom handle softening this result. > + if (CustomLowerNode(N, N->getValueType(ResNo), true)) > + return; > + > switch (N->getOpcode()) { > default: > #ifndef NDEBUG > @@ -535,6 +539,10 @@ > errs() << "\n"); > SDValue Res = SDValue(); > > + // See if target wants to custom handle softening this operand. > + if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false)) > + return false; > + > switch (N->getOpcode()) { > default: > #ifndef NDEBUG > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From bob.wilson at apple.com Mon Aug 3 14:07:00 2009 From: bob.wilson at apple.com (Bob Wilson) Date: Mon, 03 Aug 2009 19:07:00 -0000 Subject: [llvm-commits] [llvm] r77982 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp Message-ID: <200908031907.n73J7DfT021342@zion.cs.uiuc.edu> Author: bwilson Date: Mon Aug 3 14:06:29 2009 New Revision: 77982 URL: http://llvm.org/viewvc/llvm-project?rev=77982&view=rev Log: Revert 77974. It breaks 3 of the ARM tests. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp?rev=77982&r1=77981&r2=77982&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp Mon Aug 3 14:06:29 2009 @@ -47,10 +47,6 @@ errs() << "\n"); SDValue R = SDValue(); - // See if the target wants to custom handle softening this result. - if (CustomLowerNode(N, N->getValueType(ResNo), true)) - return; - switch (N->getOpcode()) { default: #ifndef NDEBUG @@ -539,10 +535,6 @@ errs() << "\n"); SDValue Res = SDValue(); - // See if target wants to custom handle softening this operand. - if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false)) - return false; - switch (N->getOpcode()) { default: #ifndef NDEBUG From sabre at nondot.org Mon Aug 3 14:10:59 2009 From: sabre at nondot.org (Chris Lattner) Date: Mon, 03 Aug 2009 19:10:59 -0000 Subject: [llvm-commits] [llvm] r77983 - /llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Message-ID: <200908031911.n73JB8Md021493@zion.cs.uiuc.edu> Author: lattner Date: Mon Aug 3 14:10:44 2009 New Revision: 77983 URL: http://llvm.org/viewvc/llvm-project?rev=77983&view=rev Log: remove a dead switch directive, replace it with some code that I will be using shortly. Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp?rev=77983&r1=77982&r2=77983&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Mon Aug 3 14:10:44 2009 @@ -899,7 +899,8 @@ } if (Subtarget->isTargetDarwin()) { - SwitchToDataSection(""); + //TargetLoweringObjectFileMachO &TLOFMacho = + // static_cast(getObjFileLowering()); // Add the (possibly multiple) personalities to the set of global value // stubs. Only referenced functions get into the Personalities list. From eli.friedman at gmail.com Mon Aug 3 14:15:55 2009 From: eli.friedman at gmail.com (Eli Friedman) Date: Mon, 03 Aug 2009 19:15:55 -0000 Subject: [llvm-commits] [llvm] r77986 - /llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Message-ID: <200908031915.n73JFuTZ021665@zion.cs.uiuc.edu> Author: efriedma Date: Mon Aug 3 14:15:42 2009 New Revision: 77986 URL: http://llvm.org/viewvc/llvm-project?rev=77986&view=rev Log: Make SimplifyDemandedUseBits generate vector constants where appropriate. Patch per report on llvmdev. No testcase because the original report didn't come with a testcase, and I can't come up with a case that actually fails. Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=77986&r1=77985&r2=77986&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Mon Aug 3 14:15:42 2009 @@ -1014,7 +1014,7 @@ if ((DemandedMask & (RHSKnownZero|RHSKnownOne)) == DemandedMask) { // all known if ((RHSKnownOne & LHSKnownOne) == RHSKnownOne) { - Constant *AndC = ConstantInt::get(*Context, + Constant *AndC = ConstantInt::get(VTy, ~RHSKnownOne & DemandedMask); Instruction *And = BinaryOperator::CreateAnd(I->getOperand(0), AndC, "tmp"); @@ -1407,7 +1407,7 @@ // If the client is only demanding bits that we know, return the known // constant. if ((DemandedMask & (RHSKnownZero|RHSKnownOne)) == DemandedMask) { - Constant *C = ConstantInt::get(*Context, RHSKnownOne); + Constant *C = ConstantInt::get(VTy, RHSKnownOne); if (isa(V->getType())) C = ConstantExpr::getIntToPtr(C, V->getType()); return C; From sabre at nondot.org Mon Aug 3 14:12:44 2009 From: sabre at nondot.org (Chris Lattner) Date: Mon, 03 Aug 2009 19:12:44 -0000 Subject: [llvm-commits] [llvm] r77984 - in /llvm/trunk: include/llvm/CodeGen/AsmPrinter.h include/llvm/Target/TargetLowering.h lib/CodeGen/AsmPrinter/AsmPrinter.cpp Message-ID: <200908031913.n73JD1qe021564@zion.cs.uiuc.edu> Author: lattner Date: Mon Aug 3 14:12:26 2009 New Revision: 77984 URL: http://llvm.org/viewvc/llvm-project?rev=77984&view=rev Log: make getObjFileLowering() return a non-const reference. Modified: llvm/trunk/include/llvm/CodeGen/AsmPrinter.h llvm/trunk/include/llvm/Target/TargetLowering.h llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp Modified: llvm/trunk/include/llvm/CodeGen/AsmPrinter.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/AsmPrinter.h?rev=77984&r1=77983&r2=77984&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/AsmPrinter.h (original) +++ llvm/trunk/include/llvm/CodeGen/AsmPrinter.h Mon Aug 3 14:12:26 2009 @@ -77,7 +77,7 @@ TargetMachine &TM; /// getObjFileLowering - Return information about object file lowering. - const TargetLoweringObjectFile &getObjFileLowering() const; + TargetLoweringObjectFile &getObjFileLowering() const; /// Target Asm Printer information. /// Modified: llvm/trunk/include/llvm/Target/TargetLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=77984&r1=77983&r2=77984&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetLowering.h (original) +++ llvm/trunk/include/llvm/Target/TargetLowering.h Mon Aug 3 14:12:26 2009 @@ -107,7 +107,7 @@ TargetMachine &getTargetMachine() const { return TM; } const TargetData *getTargetData() const { return TD; } - const TargetLoweringObjectFile &getObjFileLowering() const { return TLOF; } + TargetLoweringObjectFile &getObjFileLowering() const { return TLOF; } bool isBigEndian() const { return !IsLittleEndian; } bool isLittleEndian() const { return IsLittleEndian; } Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp?rev=77984&r1=77983&r2=77984&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp (original) +++ llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp Mon Aug 3 14:12:26 2009 @@ -74,7 +74,7 @@ delete &OutContext; } -const TargetLoweringObjectFile &AsmPrinter::getObjFileLowering() const { +TargetLoweringObjectFile &AsmPrinter::getObjFileLowering() const { return TM.getTargetLowering()->getObjFileLowering(); } From stoklund at 2pi.dk Mon Aug 3 14:33:01 2009 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Mon, 03 Aug 2009 19:33:01 -0000 Subject: [llvm-commits] [llvm] r77987 - in /llvm/trunk/lib/Target/Blackfin: AsmPrinter/BlackfinAsmPrinter.cpp BlackfinISelLowering.cpp BlackfinRegisterInfo.cpp Message-ID: <200908031933.n73JX5in022345@zion.cs.uiuc.edu> Author: stoklund Date: Mon Aug 3 14:32:30 2009 New Revision: 77987 URL: http://llvm.org/viewvc/llvm-project?rev=77987&view=rev Log: Minor stylistic cleanups in the Blackfin target. Thanks Chris. Modified: llvm/trunk/lib/Target/Blackfin/AsmPrinter/BlackfinAsmPrinter.cpp llvm/trunk/lib/Target/Blackfin/BlackfinISelLowering.cpp llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.cpp Modified: llvm/trunk/lib/Target/Blackfin/AsmPrinter/BlackfinAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Blackfin/AsmPrinter/BlackfinAsmPrinter.cpp?rev=77987&r1=77986&r2=77987&view=diff ============================================================================== --- llvm/trunk/lib/Target/Blackfin/AsmPrinter/BlackfinAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/Blackfin/AsmPrinter/BlackfinAsmPrinter.cpp Mon Aug 3 14:32:30 2009 @@ -159,8 +159,8 @@ const TargetRegisterInfo &RI = *TM.getRegisterInfo(); switch (MO.getType()) { case MachineOperand::MO_Register: - assert (TargetRegisterInfo::isPhysicalRegister(MO.getReg()) && - "Virtual registers should be already mapped!"); + assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg()) && + "Virtual registers should be already mapped!"); O << RI.get(MO.getReg()).AsmName; break; Modified: llvm/trunk/lib/Target/Blackfin/BlackfinISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Blackfin/BlackfinISelLowering.cpp?rev=77987&r1=77986&r2=77987&view=diff ============================================================================== --- llvm/trunk/lib/Target/Blackfin/BlackfinISelLowering.cpp (original) +++ llvm/trunk/lib/Target/Blackfin/BlackfinISelLowering.cpp Mon Aug 3 14:32:30 2009 @@ -188,8 +188,8 @@ MVT RegVT = VA.getLocVT(); TargetRegisterClass *RC = VA.getLocReg() == BF::P0 ? BF::PRegisterClass : BF::DRegisterClass; - assert(RC->contains(VA.getLocReg())); - assert(RC->hasType(RegVT)); + assert(RC->contains(VA.getLocReg()) && "Unexpected regclass in CCState"); + assert(RC->hasType(RegVT) && "Unexpected regclass in CCState"); unsigned Reg = MF.getRegInfo().createVirtualRegister(RC); MF.getRegInfo().addLiveIn(VA.getLocReg(), Reg); @@ -210,7 +210,7 @@ ArgValues.push_back(ArgValue); } else { - assert(VA.isMemLoc()); + assert(VA.isMemLoc() && "CCValAssign must be RegLoc or MemLoc"); unsigned ObjSize = VA.getLocVT().getStoreSizeInBits()/8; int FI = MFI->CreateFixedObject(ObjSize, VA.getLocMemOffset()); SDValue FIN = DAG.getFrameIndex(FI, MVT::i32); @@ -331,10 +331,10 @@ if (VA.isRegLoc()) { RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); } else { - assert(VA.isMemLoc()); + assert(VA.isMemLoc() && "CCValAssign must be RegLoc or MemLoc"); int Offset = VA.getLocMemOffset(); - assert(Offset%4 == 0); - assert(VA.getLocVT()==MVT::i32); + assert(Offset%4 == 0 && "Unaligned LocMemOffset"); + assert(VA.getLocVT()==MVT::i32 && "Illegal CCValAssign type"); SDValue SPN = DAG.getCopyFromReg(Chain, dl, BF::SP, MVT::i32); SDValue OffsetN = DAG.getIntPtrConstant(Offset); OffsetN = DAG.getNode(ISD::ADD, dl, MVT::i32, SPN, OffsetN); Modified: llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.cpp?rev=77987&r1=77986&r2=77987&view=diff ============================================================================== --- llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.cpp Mon Aug 3 14:32:30 2009 @@ -126,13 +126,15 @@ // We must load delta into ScratchReg and add that. loadConstant(MBB, I, DL, ScratchReg, delta); if (BF::PRegClass.contains(Reg)) { - assert (BF::PRegClass.contains(ScratchReg)); + assert(BF::PRegClass.contains(ScratchReg) && + "ScratchReg must be a P register"); BuildMI(MBB, I, DL, TII.get(BF::ADDpp), Reg) .addReg(Reg, RegState::Kill) .addReg(ScratchReg, RegState::Kill); } else { - assert (BF::DRegClass.contains(Reg)); - assert (BF::DRegClass.contains(ScratchReg)); + assert(BF::DRegClass.contains(Reg) && "Reg must be a D or P register"); + assert(BF::DRegClass.contains(ScratchReg) && + "ScratchReg must be a D register"); BuildMI(MBB, I, DL, TII.get(BF::ADD), Reg) .addReg(Reg, RegState::Kill) .addReg(ScratchReg, RegState::Kill); @@ -179,11 +181,12 @@ if (!hasReservedCallFrame(MF)) { int64_t Amount = I->getOperand(0).getImm(); if (Amount != 0) { - assert(Amount%4 == 0); + assert(Amount%4 == 0 && "Unaligned call frame size"); if (I->getOpcode() == BF::ADJCALLSTACKDOWN) { adjustRegister(MBB, I, I->getDebugLoc(), BF::SP, BF::P1, -Amount); } else { - assert(I->getOpcode() == BF::ADJCALLSTACKUP); + assert(I->getOpcode() == BF::ADJCALLSTACKUP && + "Unknown call frame pseudo instruction"); adjustRegister(MBB, I, I->getDebugLoc(), BF::SP, BF::P1, Amount); } } @@ -207,22 +210,23 @@ void BlackfinRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, RegScavenger *RS) const { - unsigned i; MachineInstr &MI = *II; MachineBasicBlock &MBB = *MI.getParent(); MachineFunction &MF = *MBB.getParent(); DebugLoc DL = MI.getDebugLoc(); - for (i=0; !MI.getOperand(i).isFI(); i++) { - assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!"); + unsigned FIPos; + for (FIPos=0; !MI.getOperand(FIPos).isFI(); ++FIPos) { + assert(FIPos < MI.getNumOperands() && + "Instr doesn't have FrameIndex operand!"); } - int FrameIndex = MI.getOperand(i).getIndex(); - assert(i+1 < MI.getNumOperands() && MI.getOperand(i+1).isImm()); + int FrameIndex = MI.getOperand(FIPos).getIndex(); + assert(FIPos+1 < MI.getNumOperands() && MI.getOperand(FIPos+1).isImm()); int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex) - + MI.getOperand(i+1).getImm(); + + MI.getOperand(FIPos+1).getImm(); unsigned BaseReg = BF::FP; if (hasFP(MF)) { - assert(SPAdj==0); + assert(SPAdj==0 && "Unexpected SP adjust in function with frame pointer"); } else { BaseReg = BF::SP; Offset += MF.getFrameInfo()->getStackSize() + SPAdj; @@ -234,10 +238,10 @@ case BF::STORE32fi: isStore = true; case BF::LOAD32fi: { - assert(Offset%4 == 0 && "Badly aligned i32 stack access"); - assert(i==1); - MI.getOperand(i).ChangeToRegister(BaseReg, false); - MI.getOperand(i+1).setImm(Offset); + assert(Offset%4 == 0 && "Unaligned i32 stack access"); + assert(FIPos==1 && "Bad frame index operand"); + MI.getOperand(FIPos).ChangeToRegister(BaseReg, false); + MI.getOperand(FIPos+1).setImm(Offset); if (isUimm<6>(Offset)) { MI.setDesc(TII.get(isStore ? BF::STORE32p_uimm6m4 @@ -248,7 +252,7 @@ MI.setDesc(TII.get(isStore ? BF::STORE32fp_nimm7m4 : BF::LOAD32fp_nimm7m4)); - MI.getOperand(i+1).setImm(-Offset); + MI.getOperand(FIPos+1).setImm(-Offset); return; } if (isImm<18>(Offset)) { @@ -263,12 +267,12 @@ break; } case BF::ADDpp: { - assert(MI.getOperand(0).isReg()); + assert(MI.getOperand(0).isReg() && "ADD instruction needs a register"); unsigned DestReg = MI.getOperand(0).getReg(); // We need to produce a stack offset in a P register. We emit: // P0 = offset; // P0 = BR + P0; - assert(i==1); + assert(FIPos==1 && "Bad frame index operand"); loadConstant(MBB, II, DL, DestReg, Offset); MI.getOperand(1).ChangeToRegister(DestReg, false, false, true); MI.getOperand(2).ChangeToRegister(BaseReg, false); @@ -277,11 +281,11 @@ case BF::STORE16fi: isStore = true; case BF::LOAD16fi: { - assert(Offset%2 == 0 && "Badly aligned i16 stack access"); - assert(i==1); + assert(Offset%2 == 0 && "Unaligned i16 stack access"); + assert(FIPos==1 && "Bad frame index operand"); // We need a P register to use as an address unsigned ScratchReg = findScratchRegister(II, RS, &BF::PRegClass, SPAdj); - assert(ScratchReg); + assert(ScratchReg && "Could not scavenge register"); loadConstant(MBB, II, DL, ScratchReg, Offset); BuildMI(MBB, II, DL, TII.get(BF::ADDpp), ScratchReg) .addReg(ScratchReg, RegState::Kill) @@ -293,10 +297,10 @@ } case BF::STORE8fi: { // This is an AnyCC spill, we need a scratch register. - assert(i==1); + assert(FIPos==1 && "Bad frame index operand"); MachineOperand SpillReg = MI.getOperand(0); unsigned ScratchReg = findScratchRegister(II, RS, &BF::DRegClass, SPAdj); - assert(ScratchReg); + assert(ScratchReg && "Could not scavenge register"); if (SpillReg.getReg()==BF::NCC) { BuildMI(MBB, II, DL, TII.get(BF::MOVENCC_z), ScratchReg) .addOperand(SpillReg); @@ -309,20 +313,20 @@ // STORE D MI.setDesc(TII.get(BF::STORE8p_imm16)); MI.getOperand(0).ChangeToRegister(ScratchReg, false, false, true); - MI.getOperand(i).ChangeToRegister(BaseReg, false); - MI.getOperand(i+1).setImm(Offset); + MI.getOperand(FIPos).ChangeToRegister(BaseReg, false); + MI.getOperand(FIPos+1).setImm(Offset); break; } case BF::LOAD8fi: { // This is an restore, we need a scratch register. - assert(i==1); + assert(FIPos==1 && "Bad frame index operand"); MachineOperand SpillReg = MI.getOperand(0); unsigned ScratchReg = findScratchRegister(II, RS, &BF::DRegClass, SPAdj); - assert(ScratchReg); + assert(ScratchReg && "Could not scavenge register"); MI.setDesc(TII.get(BF::LOAD32p_imm16_8z)); MI.getOperand(0).ChangeToRegister(ScratchReg, true); - MI.getOperand(i).ChangeToRegister(BaseReg, false); - MI.getOperand(i+1).setImm(Offset); + MI.getOperand(FIPos).ChangeToRegister(BaseReg, false); + MI.getOperand(FIPos+1).setImm(Offset); ++II; if (SpillReg.getReg()==BF::CC) { // CC = D @@ -376,8 +380,8 @@ } if (!hasFP(MF)) { - // So far we only support FP elimination on leaf functions - assert(!MFI->hasCalls()); + assert(!MFI->hasCalls() && + "FP elimination on a non-leaf function is not supported"); adjustRegister(MBB, MBBI, dl, BF::SP, BF::P1, -FrameSize); return; } @@ -417,8 +421,8 @@ assert(FrameSize%4 == 0 && "Misaligned frame size"); if (!hasFP(MF)) { - // So far we only support FP elimination on leaf functions - assert(!MFI->hasCalls()); + assert(!MFI->hasCalls() && + "FP elimination on a non-leaf function is not supported"); adjustRegister(MBB, MBBI, dl, BF::SP, BF::P1, FrameSize); return; } From stoklund at 2pi.dk Mon Aug 3 15:08:35 2009 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Mon, 03 Aug 2009 20:08:35 -0000 Subject: [llvm-commits] [llvm] r77989 - in /llvm/trunk: lib/CodeGen/LowerSubregs.cpp lib/CodeGen/MachineInstr.cpp test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll Message-ID: <200908032008.n73K8goN023448@zion.cs.uiuc.edu> Author: stoklund Date: Mon Aug 3 15:08:18 2009 New Revision: 77989 URL: http://llvm.org/viewvc/llvm-project?rev=77989&view=rev Log: Fix Bug 4657: register scavenger asserts with subreg lowering When LowerSubregsInstructionPass::LowerInsert eliminates an INSERT_SUBREG instriction because it is an identity copy, make sure that the same registers are alive before and after the elimination. When the super-register is marked this requires inserting an IMPLICIT_DEF instruction to make sure the super register is live. Fix a related bug where a kill flag on the inserted sub-register was not transferred properly. Finally, clear the undef flag in MachineInstr::addRegisterKilled. Undef implies dead and kill implies live, so they cant both be valid. Added: llvm/trunk/test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll Modified: llvm/trunk/lib/CodeGen/LowerSubregs.cpp llvm/trunk/lib/CodeGen/MachineInstr.cpp Modified: llvm/trunk/lib/CodeGen/LowerSubregs.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LowerSubregs.cpp?rev=77989&r1=77988&r2=77989&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LowerSubregs.cpp (original) +++ llvm/trunk/lib/CodeGen/LowerSubregs.cpp Mon Aug 3 15:08:18 2009 @@ -19,6 +19,7 @@ #include "llvm/Function.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineInstr.h" +#include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/Target/TargetRegisterInfo.h" #include "llvm/Target/TargetInstrInfo.h" @@ -130,6 +131,7 @@ MII != MBB->end(); ++MII) if (MII->killsRegister(DstReg, &TRI)) { MII->addRegisterKilled(SuperReg, &TRI, /*AddIfNotFound=*/true); + DOUT << "\nsubreg: killed here: " << *MII; break; } } else { @@ -231,7 +233,7 @@ assert(DstReg == SrcReg && "insert_subreg not a two-address instruction?"); assert(SubIdx != 0 && "Invalid index for insert_subreg"); unsigned DstSubReg = TRI.getSubReg(DstReg, SubIdx); - + assert(DstSubReg && "invalid subregister index for register"); assert(TargetRegisterInfo::isPhysicalRegister(SrcReg) && "Insert superreg source must be in a physical register"); assert(TargetRegisterInfo::isPhysicalRegister(InsReg) && @@ -240,24 +242,45 @@ DOUT << "subreg: CONVERTING: " << *MI; if (DstSubReg == InsReg) { - // No need to insert an identify copy instruction. - DOUT << "subreg: eliminated!"; + // No need to insert an identity copy instruction. If the SrcReg was + // , we need to make sure it is alive by inserting an IMPLICIT_DEF + if (MI->getOperand(1).isUndef() && !MI->getOperand(0).isDead()) { + BuildMI(*MBB, MI, MI->getDebugLoc(), + TII.get(TargetInstrInfo::IMPLICIT_DEF), DstReg) + .addReg(InsReg, RegState::ImplicitKill); + } else { + DOUT << "subreg: eliminated!\n"; + MBB->erase(MI); + return true; + } } else { // Insert sub-register copy const TargetRegisterClass *TRC0= TRI.getPhysicalRegisterRegClass(DstSubReg); const TargetRegisterClass *TRC1= TRI.getPhysicalRegisterRegClass(InsReg); TII.copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC0, TRC1); + MachineBasicBlock::iterator CopyMI = MI; + --CopyMI; + // Transfer the kill/dead flags, if needed. - if (MI->getOperand(0).isDead()) + if (MI->getOperand(0).isDead()) { TransferDeadFlag(MI, DstSubReg, TRI); - if (MI->getOperand(1).isKill()) + // Also add a SrcReg of the super register. + CopyMI->addOperand(MachineOperand::CreateReg(DstReg, false, true, true)); + } else if (MI->getOperand(1).isUndef()) { + // If SrcReg was marked we must make sure it is alive after this + // replacement. Add a SrcReg operand. + CopyMI->addOperand(MachineOperand::CreateReg(DstReg, true, true)); + } + + // Make sure the inserted register gets killed + if (MI->getOperand(2).isKill()) TransferKillFlag(MI, InsReg, TRI); + } #ifndef NDEBUG - MachineBasicBlock::iterator dMI = MI; - DOUT << "subreg: " << *(--dMI); + MachineBasicBlock::iterator dMI = MI; + DOUT << "subreg: " << *(--dMI); #endif - } DOUT << "\n"; MBB->erase(MI); Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=77989&r1=77988&r2=77989&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Mon Aug 3 15:08:18 2009 @@ -1041,6 +1041,8 @@ if (MO.isKill()) // The register is already marked kill. return true; + // This operand can no longer be undef since Reg is live-in. + MO.setIsUndef(false); if (isPhysReg && isRegTiedToDefOperand(i)) // Two-address uses of physregs must not be marked kill. return true; Added: llvm/trunk/test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll?rev=77989&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll (added) +++ llvm/trunk/test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll Mon Aug 3 15:08:18 2009 @@ -0,0 +1,29 @@ +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon +; PR4657 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64" +target triple = "armv7-apple-darwin9" + +define arm_apcscc <4 x i32> @scale(<4 x i32> %v, i32 %f) nounwind { +entry: + %v_addr = alloca <4 x i32> ; <<4 x i32>*> [#uses=2] + %f_addr = alloca i32 ; [#uses=2] + %retval = alloca <4 x i32> ; <<4 x i32>*> [#uses=2] + %0 = alloca <4 x i32> ; <<4 x i32>*> [#uses=2] + %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] + store <4 x i32> %v, <4 x i32>* %v_addr + store i32 %f, i32* %f_addr + %1 = load <4 x i32>* %v_addr, align 16 ; <<4 x i32>> [#uses=1] + %2 = load i32* %f_addr, align 4 ; [#uses=1] + %3 = insertelement <4 x i32> undef, i32 %2, i32 0 ; <<4 x i32>> [#uses=1] + %4 = shufflevector <4 x i32> %3, <4 x i32> undef, <4 x i32> zeroinitializer ; <<4 x i32>> [#uses=1] + %5 = mul <4 x i32> %1, %4 ; <<4 x i32>> [#uses=1] + store <4 x i32> %5, <4 x i32>* %0, align 16 + %6 = load <4 x i32>* %0, align 16 ; <<4 x i32>> [#uses=1] + store <4 x i32> %6, <4 x i32>* %retval, align 16 + br label %return + +return: ; preds = %entry + %retval1 = load <4 x i32>* %retval ; <<4 x i32>> [#uses=1] + ret <4 x i32> %retval1 +} From isanbard at gmail.com Mon Aug 3 15:17:11 2009 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 3 Aug 2009 13:17:11 -0700 Subject: [llvm-commits] [llvm] r77986 - /llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp In-Reply-To: <200908031915.n73JFuTZ021665@zion.cs.uiuc.edu> References: <200908031915.n73JFuTZ021665@zion.cs.uiuc.edu> Message-ID: <16e5fdf90908031317p2b588a6cr4977b247f580222e@mail.gmail.com> Eli, This is breaking the bootstrap of llvm-gcc: Assertion failed: (C->getType() == Ty->getScalarType() && "ConstantInt type doesn't match the type implied by its value!"), function get, file /Volumes/Sandbox/Buildbot/llvm/build.llvm-gcc-i386-darwin9/llvm.src/lib/VMCore/Constants.cpp, line 288. /Volumes/Sandbox/Buildbot/llvm/build.llvm-gcc-i386-darwin9/llvm-gcc.src/gcc/cse.c:8188: internal compiler error: Abort trap Please submit a full bug report, with preprocessed source if appropriate. See for instructions. make[3]: *** [cse.o] Error 1 make[3]: *** Waiting for unfinished jobs.... Could you investigate? -bw On Mon, Aug 3, 2009 at 12:15 PM, Eli Friedman wrote: > Author: efriedma > Date: Mon Aug ?3 14:15:42 2009 > New Revision: 77986 > > URL: http://llvm.org/viewvc/llvm-project?rev=77986&view=rev > Log: > Make SimplifyDemandedUseBits generate vector constants where > appropriate. ?Patch per report on llvmdev. ?No testcase because the > original report didn't come with a testcase, and I can't come up with a case > that actually fails. > > > Modified: > ? ?llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp > > Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=77986&r1=77985&r2=77986&view=diff > > ============================================================================== > --- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original) > +++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Mon Aug ?3 14:15:42 2009 > @@ -1014,7 +1014,7 @@ > ? ? if ((DemandedMask & (RHSKnownZero|RHSKnownOne)) == DemandedMask) { > ? ? ? // all known > ? ? ? if ((RHSKnownOne & LHSKnownOne) == RHSKnownOne) { > - ? ? ? ?Constant *AndC = ConstantInt::get(*Context, > + ? ? ? ?Constant *AndC = ConstantInt::get(VTy, > ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ~RHSKnownOne & DemandedMask); > ? ? ? ? Instruction *And = > ? ? ? ? ? BinaryOperator::CreateAnd(I->getOperand(0), AndC, "tmp"); > @@ -1407,7 +1407,7 @@ > ? // If the client is only demanding bits that we know, return the known > ? // constant. > ? if ((DemandedMask & (RHSKnownZero|RHSKnownOne)) == DemandedMask) { > - ? ?Constant *C = ConstantInt::get(*Context, RHSKnownOne); > + ? ?Constant *C = ConstantInt::get(VTy, RHSKnownOne); > ? ? if (isa(V->getType())) > ? ? ? C = ConstantExpr::getIntToPtr(C, V->getType()); > ? ? return C; > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From mrs at apple.com Mon Aug 3 15:22:15 2009 From: mrs at apple.com (Mike Stump) Date: Mon, 3 Aug 2009 13:22:15 -0700 Subject: [llvm-commits] [commit-after-approval] printf("foo %s baz\n", "bar") -> puts("foo bar baz") In-Reply-To: References: Message-ID: <1370445E-DCE1-4ECE-BC23-3F20F488D403@apple.com> On Aug 3, 2009, at 10:48 AM, Ryan Flynn wrote: > given a printf() call format containing a single "%s" conversion > specifier and a constant string parameter, inlines parameter into > format and lowers printf() to puts(). -fno-builtin needs to avoid having this done in general. Some environments are carefully crafted (-ffreestanding -mkernel) and the transform can break them. From stoklund at 2pi.dk Mon Aug 3 15:34:08 2009 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Mon, 3 Aug 2009 22:34:08 +0200 Subject: [llvm-commits] [PATCH] Accidental on two-address operand In-Reply-To: References: <0CF6B5E2-8826-4AA5-93FF-C30E2D5166A7@apple.com> Message-ID: On 03/08/2009, at 04.23, Evan Cheng wrote: >> The generated code looks like this: >> >> %reg1032 = MOVENCC_z %reg1031 >> %reg1032 = BITTGL %reg1032, 0 >> >> In this case a kill flag is also added to BITTGL, and >> TwoAddressInstructionPass fails to remove it again. Probably because >> it is expecting SSA code as input? > > I am confused. Is BITTGL a two-address instruction? Is MOVENCC_z the > copy instruction? If so, then this is perfectly legal. Yes and Yes, but both can be inserted by copyRegToReg /before/ two- address pass. That means non-SSA instructions before two-address has run. From bob.wilson at apple.com Mon Aug 3 15:37:12 2009 From: bob.wilson at apple.com (Bob Wilson) Date: Mon, 03 Aug 2009 20:37:12 -0000 Subject: [llvm-commits] [llvm] r77992 - in /llvm/trunk: lib/Target/ARM/ARMISelDAGToDAG.cpp lib/Target/ARM/ARMISelLowering.cpp test/CodeGen/ARM/vcombine.ll Message-ID: <200908032037.n73KbN7M024487@zion.cs.uiuc.edu> Author: bwilson Date: Mon Aug 3 15:36:38 2009 New Revision: 77992 URL: http://llvm.org/viewvc/llvm-project?rev=77992&view=rev Log: Lower CONCAT_VECTOR during legalization instead of matching it during isel. Add a testcase. Added: llvm/trunk/test/CodeGen/ARM/vcombine.ll Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp?rev=77992&r1=77991&r2=77992&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp Mon Aug 3 15:36:38 2009 @@ -1267,27 +1267,6 @@ MVT::Other, Ops, 3); } - case ISD::CONCAT_VECTORS: { - MVT VT = Op.getValueType(); - assert(VT.is128BitVector() && Op.getNumOperands() == 2 && - "unexpected CONCAT_VECTORS"); - SDValue N0 = Op.getOperand(0); - SDValue N1 = Op.getOperand(1); - SDNode *Result = - CurDAG->getTargetNode(TargetInstrInfo::IMPLICIT_DEF, dl, VT); - if (N0.getOpcode() != ISD::UNDEF) - Result = CurDAG->getTargetNode(TargetInstrInfo::INSERT_SUBREG, dl, VT, - SDValue(Result, 0), N0, - CurDAG->getTargetConstant(arm_dsubreg_0, - MVT::i32)); - if (N1.getOpcode() != ISD::UNDEF) - Result = CurDAG->getTargetNode(TargetInstrInfo::INSERT_SUBREG, dl, VT, - SDValue(Result, 0), N1, - CurDAG->getTargetConstant(arm_dsubreg_1, - MVT::i32)); - return Result; - } - case ISD::VECTOR_SHUFFLE: { MVT VT = Op.getValueType(); Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=77992&r1=77991&r2=77992&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Mon Aug 3 15:36:38 2009 @@ -2312,10 +2312,24 @@ return DAG.getNode(ISD::TRUNCATE, dl, VT, Op); } -static SDValue LowerCONCAT_VECTORS(SDValue Op) { - if (Op.getValueType().is128BitVector() && Op.getNumOperands() == 2) - return Op; - return SDValue(); +static SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) { + // The only time a CONCAT_VECTORS operation can have legal types is when + // two 64-bit vectors are concatenated to a 128-bit vector. + assert(Op.getValueType().is128BitVector() && Op.getNumOperands() == 2 && + "unexpected CONCAT_VECTORS"); + DebugLoc dl = Op.getDebugLoc(); + SDValue Val = DAG.getUNDEF(MVT::v2f64); + SDValue Op0 = Op.getOperand(0); + SDValue Op1 = Op.getOperand(1); + if (Op0.getOpcode() != ISD::UNDEF) + Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Val, + DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f64, Op0), + DAG.getIntPtrConstant(0)); + if (Op1.getOpcode() != ISD::UNDEF) + Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Val, + DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f64, Op1), + DAG.getIntPtrConstant(1)); + return DAG.getNode(ISD::BIT_CONVERT, dl, Op.getValueType(), Val); } SDValue ARMTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) { @@ -2351,7 +2365,7 @@ case ISD::VECTOR_SHUFFLE: return LowerVECTOR_SHUFFLE(Op, DAG); case ISD::SCALAR_TO_VECTOR: return LowerSCALAR_TO_VECTOR(Op, DAG); case ISD::EXTRACT_VECTOR_ELT: return LowerEXTRACT_VECTOR_ELT(Op, DAG); - case ISD::CONCAT_VECTORS: return LowerCONCAT_VECTORS(Op); + case ISD::CONCAT_VECTORS: return LowerCONCAT_VECTORS(Op, DAG); } return SDValue(); } Added: llvm/trunk/test/CodeGen/ARM/vcombine.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vcombine.ll?rev=77992&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/vcombine.ll (added) +++ llvm/trunk/test/CodeGen/ARM/vcombine.ll Mon Aug 3 15:36:38 2009 @@ -0,0 +1,36 @@ +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon + +define <16 x i8> @vcombine8(<8 x i8>* %A, <8 x i8>* %B) nounwind { + %tmp1 = load <8 x i8>* %A + %tmp2 = load <8 x i8>* %B + %tmp3 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <16 x i32> + ret <16 x i8> %tmp3 +} + +define <8 x i16> @vcombine16(<4 x i16>* %A, <4 x i16>* %B) nounwind { + %tmp1 = load <4 x i16>* %A + %tmp2 = load <4 x i16>* %B + %tmp3 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <8 x i32> + ret <8 x i16> %tmp3 +} + +define <4 x i32> @vcombine32(<2 x i32>* %A, <2 x i32>* %B) nounwind { + %tmp1 = load <2 x i32>* %A + %tmp2 = load <2 x i32>* %B + %tmp3 = shufflevector <2 x i32> %tmp1, <2 x i32> %tmp2, <4 x i32> + ret <4 x i32> %tmp3 +} + +define <4 x float> @vcombinefloat(<2 x float>* %A, <2 x float>* %B) nounwind { + %tmp1 = load <2 x float>* %A + %tmp2 = load <2 x float>* %B + %tmp3 = shufflevector <2 x float> %tmp1, <2 x float> %tmp2, <4 x i32> + ret <4 x float> %tmp3 +} + +define <2 x i64> @vcombine64(<1 x i64>* %A, <1 x i64>* %B) nounwind { + %tmp1 = load <1 x i64>* %A + %tmp2 = load <1 x i64>* %B + %tmp3 = shufflevector <1 x i64> %tmp1, <1 x i64> %tmp2, <2 x i32> + ret <2 x i64> %tmp3 +} From eli.friedman at gmail.com Mon Aug 3 15:48:35 2009 From: eli.friedman at gmail.com (Eli Friedman) Date: Mon, 3 Aug 2009 13:48:35 -0700 Subject: [llvm-commits] [commit-after-approval] printf("foo %s baz\n", "bar") -> puts("foo bar baz") In-Reply-To: <1370445E-DCE1-4ECE-BC23-3F20F488D403@apple.com> References: <1370445E-DCE1-4ECE-BC23-3F20F488D403@apple.com> Message-ID: On Mon, Aug 3, 2009 at 1:22 PM, Mike Stump wrote: > On Aug 3, 2009, at 10:48 AM, Ryan Flynn wrote: >> given a printf() call format containing a single "%s" conversion >> specifier and a constant string parameter, inlines parameter into >> format and lowers printf() to puts(). > > -fno-builtin needs to avoid having this done in general. ?Some > environments are carefully crafted (-ffreestanding -mkernel) and the > transform can break them. That seems tangential; there are all sorts of transformations in SimplifyLibCalls that can break freestanding environments. -Eli From isanbard at gmail.com Mon Aug 3 15:58:13 2009 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 03 Aug 2009 20:58:13 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r77994 - /llvm-gcc-4.2/trunk/gcc/objc/objc-act.c Message-ID: <200908032058.n73KwKRf025269@zion.cs.uiuc.edu> Author: void Date: Mon Aug 3 15:57:57 2009 New Revision: 77994 URL: http://llvm.org/viewvc/llvm-project?rev=77994&view=rev Log: Wow! This is not good. So, it looks like we needed to generate "i8* null" for the last argument of an llvm.eh.selector call for the @finally block. Daniel explained some of the horrid behavior of the exception system. After I recovered from that nightmare, we determined that ObjC needed to handle the @finally as a C++ cleanup method. Hence, the "i8* null". This is only needed in 64-bit mode. Modified: llvm-gcc-4.2/trunk/gcc/objc/objc-act.c Modified: llvm-gcc-4.2/trunk/gcc/objc/objc-act.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/objc/objc-act.c?rev=77994&r1=77993&r2=77994&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/objc/objc-act.c (original) +++ llvm-gcc-4.2/trunk/gcc/objc/objc-act.c Mon Aug 3 15:57:57 2009 @@ -8229,6 +8229,19 @@ static struct objc_try_context *cur_try_context; +/* LLVM LOCAL begin 7069718 */ +#ifdef ENABLE_LLVM +/* Do nothing (return NULL_TREE). */ +static tree return_null_tree (void); + +tree +return_null_tree (void) +{ + return NULL_TREE; +} +#endif +/* LLVM LOCAL end 7069718 */ + /* This hook, called via lang_eh_runtime_type, generates a runtime object that represents TYPE. For Objective-C, this is just the class name. */ /* ??? Isn't there a class object or some such? Is it easy to get? */ @@ -8312,6 +8325,13 @@ lang_eh_runtime_type = objc_eh_runtime_type; } #endif + + /* LLVM LOCAL begin 7069718 */ +#ifdef ENABLE_LLVM + if (flag_objc_zerocost_exceptions) + lang_eh_catch_all = return_null_tree; +#endif + /* LLVM LOCAL end 7069718 */ } /* Build an EXC_PTR_EXPR, or the moral equivalent. In the case of Darwin, From bob.wilson at apple.com Mon Aug 3 16:18:56 2009 From: bob.wilson at apple.com (Bob Wilson) Date: Mon, 03 Aug 2009 21:18:56 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r77998 - /llvm-gcc-4.2/trunk/gcc/config/arm/arm.c Message-ID: <200908032118.n73LIvBC026114@zion.cs.uiuc.edu> Author: bwilson Date: Mon Aug 3 16:18:56 2009 New Revision: 77998 URL: http://llvm.org/viewvc/llvm-project?rev=77998&view=rev Log: Reenable default to Thumb for ARMv7, now that Thumb is working well enough to build libgcc. (Radar 7113812) Modified: llvm-gcc-4.2/trunk/gcc/config/arm/arm.c Modified: llvm-gcc-4.2/trunk/gcc/config/arm/arm.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/arm/arm.c?rev=77998&r1=77997&r2=77998&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/arm/arm.c (original) +++ llvm-gcc-4.2/trunk/gcc/config/arm/arm.c Mon Aug 3 16:18:56 2009 @@ -1459,10 +1459,6 @@ /* APPLE LOCAL end ARM interworking */ } -/* LLVM LOCAL */ -/* LLVM does not yet support Thumb2, so Thumb should not be enabled - by default for llvm-gcc. */ -#ifndef ENABLE_LLVM /* APPLE LOCAL begin 6150882 use thumb2 by default for v7 */ /* If we're compiling for v7, we should default to using thumb2 codegen. */ @@ -1470,8 +1466,6 @@ && thumb_option < 0) thumb_option = 1; /* APPLE LOCAL end 6150882 use thumb2 by default for v7 */ -#endif -/* LLVM LOCAL */ if (TARGET_THUMB && !(insn_flags & FL_THUMB)) { From eli.friedman at gmail.com Mon Aug 3 16:19:46 2009 From: eli.friedman at gmail.com (Eli Friedman) Date: Mon, 3 Aug 2009 14:19:46 -0700 Subject: [llvm-commits] [llvm] r77986 - /llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp In-Reply-To: <16e5fdf90908031317p2b588a6cr4977b247f580222e@mail.gmail.com> References: <200908031915.n73JFuTZ021665@zion.cs.uiuc.edu> <16e5fdf90908031317p2b588a6cr4977b247f580222e@mail.gmail.com> Message-ID: On Mon, Aug 3, 2009 at 1:17 PM, Bill Wendling wrote: > Eli, > > This is breaking the bootstrap of llvm-gcc: > > Assertion failed: (C->getType() == Ty->getScalarType() && "ConstantInt > type doesn't match the type implied by its value!"), function get, > file /Volumes/Sandbox/Buildbot/llvm/build.llvm-gcc-i386-darwin9/llvm.src/lib/VMCore/Constants.cpp, > line 288. > /Volumes/Sandbox/Buildbot/llvm/build.llvm-gcc-i386-darwin9/llvm-gcc.src/gcc/cse.c:8188: > internal compiler error: Abort trap > Please submit a full bug report, > with preprocessed source if appropriate. > See for instructions. > make[3]: *** [cse.o] Error 1 > make[3]: *** Waiting for unfinished jobs.... > > Could you investigate? llvm-gcc bootstrap seems to work fine on my computer; can you get a failing .bc file? -Eli From isanbard at gmail.com Mon Aug 3 16:23:54 2009 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 3 Aug 2009 14:23:54 -0700 Subject: [llvm-commits] [llvm] r77986 - /llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp In-Reply-To: References: <200908031915.n73JFuTZ021665@zion.cs.uiuc.edu> <16e5fdf90908031317p2b588a6cr4977b247f580222e@mail.gmail.com> Message-ID: <16e5fdf90908031423o2b3e508erc07826c5d2f244da@mail.gmail.com> On Mon, Aug 3, 2009 at 2:19 PM, Eli Friedman wrote: > On Mon, Aug 3, 2009 at 1:17 PM, Bill Wendling wrote: >> Eli, >> >> This is breaking the bootstrap of llvm-gcc: >> >> Assertion failed: (C->getType() == Ty->getScalarType() && "ConstantInt >> type doesn't match the type implied by its value!"), function get, >> file /Volumes/Sandbox/Buildbot/llvm/build.llvm-gcc-i386-darwin9/llvm.src/lib/VMCore/Constants.cpp, >> line 288. >> /Volumes/Sandbox/Buildbot/llvm/build.llvm-gcc-i386-darwin9/llvm-gcc.src/gcc/cse.c:8188: >> internal compiler error: Abort trap >> Please submit a full bug report, >> with preprocessed source if appropriate. >> See for instructions. >> make[3]: *** [cse.o] Error 1 >> make[3]: *** Waiting for unfinished jobs.... >> >> Could you investigate? > > llvm-gcc bootstrap seems to work fine on my computer; can you get a > failing .bc file? > I'll see what I can do, but it's one of the buildbots which is failing, so the files aren't kept around... -bw From clattner at apple.com Mon Aug 3 16:29:24 2009 From: clattner at apple.com (Chris Lattner) Date: Mon, 3 Aug 2009 14:29:24 -0700 Subject: [llvm-commits] [llvm] r77987 - in /llvm/trunk/lib/Target/Blackfin: AsmPrinter/BlackfinAsmPrinter.cpp BlackfinISelLowering.cpp BlackfinRegisterInfo.cpp In-Reply-To: <200908031933.n73JX5in022345@zion.cs.uiuc.edu> References: <200908031933.n73JX5in022345@zion.cs.uiuc.edu> Message-ID: <28E42D75-22E4-48E4-923E-0644F7E896C3@apple.com> On Aug 3, 2009, at 12:33 PM, Jakob Stoklund Olesen wrote: > Author: stoklund > Date: Mon Aug 3 14:32:30 2009 > New Revision: 77987 > > URL: http://llvm.org/viewvc/llvm-project?rev=77987&view=rev > Log: > Minor stylistic cleanups in the Blackfin target. Very nice, I think that bfin is probably llvm's prettiest and most consistent "best practices" target now :) -Chris From gohman at apple.com Mon Aug 3 16:29:56 2009 From: gohman at apple.com (Dan Gohman) Date: Mon, 3 Aug 2009 14:29:56 -0700 Subject: [llvm-commits] [llvm] r77986 - /llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp In-Reply-To: References: <200908031915.n73JFuTZ021665@zion.cs.uiuc.edu> <16e5fdf90908031317p2b588a6cr4977b247f580222e@mail.gmail.com> Message-ID: <92365DC5-5CB9-4438-B167-17FAEF91DA23@apple.com> On Aug 3, 2009, at 2:19 PM, Eli Friedman wrote: > On Mon, Aug 3, 2009 at 1:17 PM, Bill Wendling > wrote: > >> Eli, >> >> >> >> This is breaking the bootstrap of llvm-gcc: >> >> >> >> Assertion failed: (C->getType() == Ty->getScalarType() && >> "ConstantInt >> >> type doesn't match the type implied by its value!"), function get, >> >> file /Volumes/Sandbox/Buildbot/llvm/build.llvm-gcc-i386-darwin9/ >> llvm.src/lib/VMCore/Constants.cpp, >> >> line 288. >> >> /Volumes/Sandbox/Buildbot/llvm/build.llvm-gcc-i386-darwin9/llvm- >> gcc.src/gcc/cse.c:8188: >> >> internal compiler error: Abort trap >> >> Please submit a full bug report, >> >> with preprocessed source if appropriate. >> >> See for instructions. >> >> make[3]: *** [cse.o] Error 1 >> >> make[3]: *** Waiting for unfinished jobs.... >> >> >> >> Could you investigate? >> > > llvm-gcc bootstrap seems to work fine on my computer; can you get a > failing .bc file? I reproduced the failure. The problem is that VTy can have pointer type. I'll check in a fix shortly. Dan From clattner at apple.com Mon Aug 3 16:32:22 2009 From: clattner at apple.com (Chris Lattner) Date: Mon, 3 Aug 2009 14:32:22 -0700 Subject: [llvm-commits] [commit-after-approval] printf("foo %s baz\n", "bar") -> puts("foo bar baz") In-Reply-To: References: <1370445E-DCE1-4ECE-BC23-3F20F488D403@apple.com> Message-ID: <20987922-EF7B-4B74-86DE-FD188C2BB686@apple.com> On Aug 3, 2009, at 1:48 PM, Eli Friedman wrote: > On Mon, Aug 3, 2009 at 1:22 PM, Mike Stump wrote: >> On Aug 3, 2009, at 10:48 AM, Ryan Flynn wrote: >>> given a printf() call format containing a single "%s" conversion >>> specifier and a constant string parameter, inlines parameter into >>> format and lowers printf() to puts(). >> >> -fno-builtin needs to avoid having this done in general. Some >> environments are carefully crafted (-ffreestanding -mkernel) and the >> transform can break them. > > That seems tangential; there are all sorts of transformations in > SimplifyLibCalls that can break freestanding environments. Right, simplifylibcalls is libc specific, llvm-gcc and clang shouldn't run it in free standing mode. I'm pretty sure that at least llvm-gcc gets this right. -Chris From evan.cheng at apple.com Mon Aug 3 16:37:09 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 3 Aug 2009 14:37:09 -0700 Subject: [llvm-commits] [PATCH] Accidental on two-address operand In-Reply-To: References: <0CF6B5E2-8826-4AA5-93FF-C30E2D5166A7@apple.com> Message-ID: On Aug 3, 2009, at 1:34 PM, Jakob Stoklund Olesen wrote: > > On 03/08/2009, at 04.23, Evan Cheng wrote: > >>> The generated code looks like this: >>> >>> %reg1032 = MOVENCC_z %reg1031 >>> %reg1032 = BITTGL %reg1032, 0 >>> >>> In this case a kill flag is also added to BITTGL, and >>> TwoAddressInstructionPass fails to remove it again. Probably because >>> it is expecting SSA code as input? >> >> I am confused. Is BITTGL a two-address instruction? Is MOVENCC_z the >> copy instruction? If so, then this is perfectly legal. > > Yes and Yes, but both can be inserted by copyRegToReg /before/ two- > address pass. That means non-SSA instructions before two-address has > run. Hrm. It's not legal to insert non-ssa instructions before 2addr pass. Evan > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From isanbard at gmail.com Mon Aug 3 16:38:45 2009 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 3 Aug 2009 14:38:45 -0700 Subject: [llvm-commits] [llvm] r77986 - /llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp In-Reply-To: <92365DC5-5CB9-4438-B167-17FAEF91DA23@apple.com> References: <200908031915.n73JFuTZ021665@zion.cs.uiuc.edu> <16e5fdf90908031317p2b588a6cr4977b247f580222e@mail.gmail.com> <92365DC5-5CB9-4438-B167-17FAEF91DA23@apple.com> Message-ID: <16e5fdf90908031438y652e76b0xe191c9efe063d324@mail.gmail.com> On Mon, Aug 3, 2009 at 2:29 PM, Dan Gohman wrote: > I reproduced the failure. The problem is that VTy can have > pointer type. I'll check in a fix shortly. > Thanks, Dan. I have a .bc file if you want it... -bw From evan.cheng at apple.com Mon Aug 3 16:40:24 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 3 Aug 2009 14:40:24 -0700 Subject: [llvm-commits] [llvm] r77989 - in /llvm/trunk: lib/CodeGen/LowerSubregs.cpp lib/CodeGen/MachineInstr.cpp test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll In-Reply-To: <200908032008.n73K8goN023448@zion.cs.uiuc.edu> References: <200908032008.n73K8goN023448@zion.cs.uiuc.edu> Message-ID: On Aug 3, 2009, at 1:08 PM, Jakob Stoklund Olesen wrote: > Author: stoklund > Date: Mon Aug 3 15:08:18 2009 > New Revision: 77989 > > URL: http://llvm.org/viewvc/llvm-project?rev=77989&view=rev > Log: > Fix Bug 4657: register scavenger asserts with subreg lowering > > When LowerSubregsInstructionPass::LowerInsert eliminates an > INSERT_SUBREG > instriction because it is an identity copy, make sure that the same > registers > are alive before and after the elimination. > > When the super-register is marked this requires inserting an > IMPLICIT_DEF instruction to make sure the super register is live. > > Fix a related bug where a kill flag on the inserted sub-register was > not transferred properly. Thanks! > > Finally, clear the undef flag in MachineInstr::addRegisterKilled. > Undef implies dead and kill implies live, so they cant both be valid. That's not necessary. Undef doesn't implies dead. It just means its garbage and it has no liveness. Evan > > Added: > llvm/trunk/test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll > Modified: > llvm/trunk/lib/CodeGen/LowerSubregs.cpp > llvm/trunk/lib/CodeGen/MachineInstr.cpp > > Modified: llvm/trunk/lib/CodeGen/LowerSubregs.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LowerSubregs.cpp?rev=77989&r1=77988&r2=77989&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/LowerSubregs.cpp (original) > +++ llvm/trunk/lib/CodeGen/LowerSubregs.cpp Mon Aug 3 15:08:18 2009 > @@ -19,6 +19,7 @@ > #include "llvm/Function.h" > #include "llvm/CodeGen/MachineFunctionPass.h" > #include "llvm/CodeGen/MachineInstr.h" > +#include "llvm/CodeGen/MachineInstrBuilder.h" > #include "llvm/CodeGen/MachineRegisterInfo.h" > #include "llvm/Target/TargetRegisterInfo.h" > #include "llvm/Target/TargetInstrInfo.h" > @@ -130,6 +131,7 @@ > MII != MBB->end(); ++MII) > if (MII->killsRegister(DstReg, &TRI)) { > MII->addRegisterKilled(SuperReg, &TRI, /*AddIfNotFound=*/ > true); > + DOUT << "\nsubreg: killed here: " << *MII; > break; > } > } else { > @@ -231,7 +233,7 @@ > assert(DstReg == SrcReg && "insert_subreg not a two-address > instruction?"); > assert(SubIdx != 0 && "Invalid index for insert_subreg"); > unsigned DstSubReg = TRI.getSubReg(DstReg, SubIdx); > - > + assert(DstSubReg && "invalid subregister index for register"); > assert(TargetRegisterInfo::isPhysicalRegister(SrcReg) && > "Insert superreg source must be in a physical register"); > assert(TargetRegisterInfo::isPhysicalRegister(InsReg) && > @@ -240,24 +242,45 @@ > DOUT << "subreg: CONVERTING: " << *MI; > > if (DstSubReg == InsReg) { > - // No need to insert an identify copy instruction. > - DOUT << "subreg: eliminated!"; > + // No need to insert an identity copy instruction. If the > SrcReg was > + // , we need to make sure it is alive by inserting an > IMPLICIT_DEF > + if (MI->getOperand(1).isUndef() && !MI->getOperand(0).isDead()) { > + BuildMI(*MBB, MI, MI->getDebugLoc(), > + TII.get(TargetInstrInfo::IMPLICIT_DEF), DstReg) > + .addReg(InsReg, RegState::ImplicitKill); > + } else { > + DOUT << "subreg: eliminated!\n"; > + MBB->erase(MI); > + return true; > + } > } else { > // Insert sub-register copy > const TargetRegisterClass *TRC0= TRI.getPhysicalRegisterRegClass > (DstSubReg); > const TargetRegisterClass *TRC1= TRI.getPhysicalRegisterRegClass > (InsReg); > TII.copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC0, TRC1); > + MachineBasicBlock::iterator CopyMI = MI; > + --CopyMI; > + > // Transfer the kill/dead flags, if needed. > - if (MI->getOperand(0).isDead()) > + if (MI->getOperand(0).isDead()) { > TransferDeadFlag(MI, DstSubReg, TRI); > - if (MI->getOperand(1).isKill()) > + // Also add a SrcReg of the super register. > + CopyMI->addOperand(MachineOperand::CreateReg(DstReg, false, > true, true)); > + } else if (MI->getOperand(1).isUndef()) { > + // If SrcReg was marked we must make sure it is alive > after this > + // replacement. Add a SrcReg operand. > + CopyMI->addOperand(MachineOperand::CreateReg(DstReg, true, > true)); > + } > + > + // Make sure the inserted register gets killed > + if (MI->getOperand(2).isKill()) > TransferKillFlag(MI, InsReg, TRI); > + } > > #ifndef NDEBUG > - MachineBasicBlock::iterator dMI = MI; > - DOUT << "subreg: " << *(--dMI); > + MachineBasicBlock::iterator dMI = MI; > + DOUT << "subreg: " << *(--dMI); > #endif > - } > > DOUT << "\n"; > MBB->erase(MI); > > Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=77989&r1=77988&r2=77989&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original) > +++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Mon Aug 3 15:08:18 2009 > @@ -1041,6 +1041,8 @@ > if (MO.isKill()) > // The register is already marked kill. > return true; > + // This operand can no longer be undef since Reg is live-in. > + MO.setIsUndef(false); > if (isPhysReg && isRegTiedToDefOperand(i)) > // Two-address uses of physregs must not be marked kill. > return true; > > Added: llvm/trunk/test/CodeGen/ARM/2009-08-02-RegScavengerAssert- > Neon.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll?rev=77989&view=auto > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/test/CodeGen/ARM/2009-08-02-RegScavengerAssert- > Neon.ll (added) > +++ llvm/trunk/test/CodeGen/ARM/2009-08-02-RegScavengerAssert- > Neon.ll Mon Aug 3 15:08:18 2009 > @@ -0,0 +1,29 @@ > +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > +; PR4657 > + > +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32- > i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64" > +target triple = "armv7-apple-darwin9" > + > +define arm_apcscc <4 x i32> @scale(<4 x i32> %v, i32 %f) nounwind { > +entry: > + %v_addr = alloca <4 x i32> ; <<4 x i32>*> [#uses=2] > + %f_addr = alloca i32 ; [#uses=2] > + %retval = alloca <4 x i32> ; <<4 x i32>*> [#uses=2] > + %0 = alloca <4 x i32> ; <<4 x i32>*> [#uses=2] > + %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] > + store <4 x i32> %v, <4 x i32>* %v_addr > + store i32 %f, i32* %f_addr > + %1 = load <4 x i32>* %v_addr, align 16 ; <<4 x i32>> [#uses=1] > + %2 = load i32* %f_addr, align 4 ; [#uses=1] > + %3 = insertelement <4 x i32> undef, i32 %2, i32 0 ; <<4 x i32>> > [#uses=1] > + %4 = shufflevector <4 x i32> %3, <4 x i32> undef, <4 x i32> > zeroinitializer ; <<4 x i32>> [#uses=1] > + %5 = mul <4 x i32> %1, %4 ; <<4 x i32>> [#uses=1] > + store <4 x i32> %5, <4 x i32>* %0, align 16 > + %6 = load <4 x i32>* %0, align 16 ; <<4 x i32>> [#uses=1] > + store <4 x i32> %6, <4 x i32>* %retval, align 16 > + br label %return > + > +return: ; preds = %entry > + %retval1 = load <4 x i32>* %retval ; <<4 x i32>> [#uses=1] > + ret <4 x i32> %retval1 > +} > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From sabre at nondot.org Mon Aug 3 16:53:27 2009 From: sabre at nondot.org (Chris Lattner) Date: Mon, 03 Aug 2009 21:53:27 -0000 Subject: [llvm-commits] [llvm] r78002 - in /llvm/trunk: include/llvm/Target/TargetLoweringObjectFile.h lib/Target/TargetLoweringObjectFile.cpp lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Message-ID: <200908032153.n73LrRkY027499@zion.cs.uiuc.edu> Author: lattner Date: Mon Aug 3 16:53:27 2009 New Revision: 78002 URL: http://llvm.org/viewvc/llvm-project?rev=78002&view=rev Log: Eliminate textual section switching from the x86 backend, one more step towards "semantics sections" Modified: llvm/trunk/include/llvm/Target/TargetLoweringObjectFile.h llvm/trunk/lib/Target/TargetLoweringObjectFile.cpp llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Modified: llvm/trunk/include/llvm/Target/TargetLoweringObjectFile.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLoweringObjectFile.h?rev=78002&r1=78001&r2=78002&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetLoweringObjectFile.h (original) +++ llvm/trunk/include/llvm/Target/TargetLoweringObjectFile.h Mon Aug 3 16:53:27 2009 @@ -26,7 +26,6 @@ class Mangler; class TargetMachine; - class TargetLoweringObjectFile { MCContext *Ctx; protected: @@ -250,6 +249,11 @@ /// FIXME: REMOVE this (rdar://7071300) virtual bool shouldEmitUsedDirectiveFor(const GlobalValue *GV, Mangler *) const; + + /// getMachOSection - Return the MCSection for the specified mach-o section. + /// FIXME: Switch this to a semantic view eventually. + const MCSection *getMachOSection(const char *Name, bool isDirective, + SectionKind K); }; @@ -264,6 +268,11 @@ virtual const MCSection * SelectSectionForGlobal(const GlobalValue *GV, SectionKind Kind, Mangler *Mang, const TargetMachine &TM) const; + + /// getCOFFSection - Return the MCSection for the specified COFF section. + /// FIXME: Switch this to a semantic view eventually. + const MCSection *getCOFFSection(const char *Name, bool isDirective, + SectionKind K); }; } // end namespace llvm Modified: llvm/trunk/lib/Target/TargetLoweringObjectFile.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetLoweringObjectFile.cpp?rev=78002&r1=78001&r2=78002&view=diff ============================================================================== --- llvm/trunk/lib/Target/TargetLoweringObjectFile.cpp (original) +++ llvm/trunk/lib/Target/TargetLoweringObjectFile.cpp Mon Aug 3 16:53:27 2009 @@ -532,6 +532,14 @@ // MachO //===----------------------------------------------------------------------===// +const MCSection *TargetLoweringObjectFileMachO:: +getMachOSection(const char *Name, bool isDirective, SectionKind K) { + // FOR NOW, Just forward. + return getOrCreateSection(Name, isDirective, K); +} + + + void TargetLoweringObjectFileMachO::Initialize(MCContext &Ctx, const TargetMachine &TM) { TargetLoweringObjectFile::Initialize(Ctx, TM); @@ -733,6 +741,11 @@ // COFF //===----------------------------------------------------------------------===// +const MCSection *TargetLoweringObjectFileCOFF:: +getCOFFSection(const char *Name, bool isDirective, SectionKind K) { + return getOrCreateSection(Name, isDirective, K); +} + void TargetLoweringObjectFileCOFF::Initialize(MCContext &Ctx, const TargetMachine &TM) { TargetLoweringObjectFile::Initialize(Ctx, TM); Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp?rev=78002&r1=78001&r2=78002&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Mon Aug 3 16:53:27 2009 @@ -899,8 +899,9 @@ } if (Subtarget->isTargetDarwin()) { - //TargetLoweringObjectFileMachO &TLOFMacho = - // static_cast(getObjFileLowering()); + // All darwin targets use mach-o. + TargetLoweringObjectFileMachO &TLOFMacho = + static_cast(getObjFileLowering()); // Add the (possibly multiple) personalities to the set of global value // stubs. Only referenced functions get into the Personalities list. @@ -916,8 +917,11 @@ // Output stubs for dynamically-linked functions if (!FnStubs.empty()) { - SwitchToDataSection("\t.section __IMPORT,__jump_table,symbol_stubs," - "self_modifying_code+pure_instructions,5", 0); + const MCSection *TheSection = + TLOFMacho.getMachOSection("\t.section __IMPORT,__jump_table,symbol_stubs," + "self_modifying_code+pure_instructions,5", true, + SectionKind::getMetadata()); + SwitchToSection(TheSection); for (StringMap::iterator I = FnStubs.begin(), E = FnStubs.end(); I != E; ++I) O << I->getKeyData() << ":\n" << "\t.indirect_symbol " << I->second @@ -927,8 +931,11 @@ // Output stubs for external and common global variables. if (!GVStubs.empty()) { - SwitchToDataSection( - "\t.section __IMPORT,__pointers,non_lazy_symbol_pointers"); + const MCSection *TheSection = + TLOFMacho.getMachOSection("\t.section __IMPORT,__pointers," + "non_lazy_symbol_pointers", true, + SectionKind::getMetadata()); + SwitchToSection(TheSection); for (StringMap::iterator I = GVStubs.begin(), E = GVStubs.end(); I != E; ++I) O << I->getKeyData() << ":\n\t.indirect_symbol " @@ -963,16 +970,17 @@ // Output linker support code for dllexported globals on windows. - if (!DLLExportedGVs.empty()) { - SwitchToDataSection(".section .drectve"); + if (!DLLExportedGVs.empty() || !DLLExportedFns.empty()) { + // dllexport symbols only exist on coff targets. + TargetLoweringObjectFileCOFF &TLOFMacho = + static_cast(getObjFileLowering()); + + SwitchToSection(TLOFMacho.getCOFFSection(".section .drectve", true, + SectionKind::getMetadata())); for (StringSet<>::iterator i = DLLExportedGVs.begin(), e = DLLExportedGVs.end(); i != e; ++i) O << "\t.ascii \" -export:" << i->getKeyData() << ",data\"\n"; - } - - if (!DLLExportedFns.empty()) { - SwitchToDataSection(".section .drectve"); for (StringSet<>::iterator i = DLLExportedFns.begin(), e = DLLExportedFns.end(); From greened at obbligato.org Mon Aug 3 16:55:09 2009 From: greened at obbligato.org (David Greene) Date: Mon, 03 Aug 2009 21:55:09 -0000 Subject: [llvm-commits] [llvm] r78003 - in /llvm/trunk: include/llvm/CodeGen/Dump.h include/llvm/CodeGen/LiveIntervalAnalysis.h include/llvm/CodeGen/MachineBasicBlock.h include/llvm/CodeGen/MachineFunction.h lib/CodeGen/Dump.cpp lib/CodeGen/LiveIntervalAnalysis.cpp lib/CodeGen/MachineBasicBlock.cpp lib/CodeGen/MachineFunction.cpp Message-ID: <200908032155.n73Lt9fI027569@zion.cs.uiuc.edu> Author: greened Date: Mon Aug 3 16:55:09 2009 New Revision: 78003 URL: http://llvm.org/viewvc/llvm-project?rev=78003&view=rev Log: Re-apply LiveInterval index dumping patch, with fixes suggested by Bill and others. Added: llvm/trunk/include/llvm/CodeGen/Dump.h llvm/trunk/lib/CodeGen/Dump.cpp Modified: llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h llvm/trunk/include/llvm/CodeGen/MachineFunction.h llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp llvm/trunk/lib/CodeGen/MachineFunction.cpp Added: llvm/trunk/include/llvm/CodeGen/Dump.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/Dump.h?rev=78003&view=auto ============================================================================== --- llvm/trunk/include/llvm/CodeGen/Dump.h (added) +++ llvm/trunk/include/llvm/CodeGen/Dump.h Mon Aug 3 16:55:09 2009 @@ -0,0 +1,60 @@ +//===- llvm/Support/Dump.h - Easy way to tailor dump output -----*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file provides the PrefixPrinter interface to pass to MachineFunction +// and MachineBasicBlock print methods to output additional information before +// blocks and instructions are printed. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_CODEGEN_DUMP_H +#define LLVM_CODEGEN_DUMP_H + +#include + +namespace llvm { + +class MachineBasicBlock; +class MachineInstr; +class raw_ostream; + +/// PrefixPrinter - Print some additional information before printing +/// basic blocks and instructions. +class PrefixPrinter { +public: + virtual ~PrefixPrinter(); + + /// operator() - Print a prefix before each MachineBasicBlock + virtual raw_ostream &operator()(raw_ostream &out, + const MachineBasicBlock &) const { + return out; + } + + /// operator() - Print a prefix before each MachineInstr + virtual raw_ostream &operator()(raw_ostream &out, + const MachineInstr &) const { + return out; + } + + /// operator() - Print a prefix before each MachineBasicBlock + virtual std::ostream &operator()(std::ostream &out, + const MachineBasicBlock &) const { + return out; + } + + /// operator() - Print a prefix before each MachineInstr + virtual std::ostream &operator()(std::ostream &out, + const MachineInstr &) const { + return out; + } +}; + +} // End llvm namespace + +#endif Modified: llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h?rev=78003&r1=78002&r2=78003&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h (original) +++ llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h Mon Aug 3 16:55:09 2009 @@ -538,6 +538,37 @@ void printRegName(unsigned reg) const; }; + /// IntervalPrefixPrinter - Print live interval indices before each + /// instruction. + class IntervalPrefixPrinter : public PrefixPrinter { + private: + const LiveIntervals &liinfo; + + public: + IntervalPrefixPrinter(const LiveIntervals &lii) + : liinfo(lii) {}; + + // We need null implementations of the other virtual functions to + // avoid warnings about hidden virtual functions. + + raw_ostream &operator()(raw_ostream &out, + const MachineBasicBlock &instr) const { + return out; + } + + raw_ostream &operator()(raw_ostream &out, + const MachineInstr &instr) const; + + std::ostream &operator()(std::ostream &out, + const MachineBasicBlock &instr) const { + return out; + } + + std::ostream &operator()(std::ostream &out, + const MachineInstr &instr) const { + return out; + } + }; } // End llvm namespace #endif Modified: llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h?rev=78003&r1=78002&r2=78003&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h (original) +++ llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h Mon Aug 3 16:55:09 2009 @@ -16,6 +16,7 @@ #include "llvm/CodeGen/MachineInstr.h" #include "llvm/ADT/GraphTraits.h" +#include "llvm/CodeGen/Dump.h" namespace llvm { @@ -310,10 +311,18 @@ // Debugging methods. void dump() const; - void print(std::ostream &OS) const; - void print(std::ostream *OS) const { if (OS) print(*OS); } - void print(raw_ostream &OS) const; - void print(raw_ostream *OS) const { if (OS) print(*OS); } + void print(std::ostream &OS, + const PrefixPrinter &prefix = PrefixPrinter()) const; + void print(std::ostream *OS, + const PrefixPrinter &prefix = PrefixPrinter()) const { + if (OS) print(*OS, prefix); + } + void print(raw_ostream &OS, + const PrefixPrinter &prefix = PrefixPrinter()) const; + void print(raw_ostream *OS, + const PrefixPrinter &prefix = PrefixPrinter()) const { + if (OS) print(*OS, prefix); + } /// getNumber - MachineBasicBlocks are uniquely numbered at the function /// level, unless they're not in a MachineFunction yet, in which case this Modified: llvm/trunk/include/llvm/CodeGen/MachineFunction.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineFunction.h?rev=78003&r1=78002&r2=78003&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/MachineFunction.h (original) +++ llvm/trunk/include/llvm/CodeGen/MachineFunction.h Mon Aug 3 16:55:09 2009 @@ -20,6 +20,7 @@ #include "llvm/ADT/ilist.h" #include "llvm/Support/DebugLoc.h" +#include "llvm/CodeGen/Dump.h" #include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/Support/Allocator.h" #include "llvm/Support/Recycler.h" @@ -206,8 +207,12 @@ /// print - Print out the MachineFunction in a format suitable for debugging /// to the specified stream. /// - void print(std::ostream &OS) const; - void print(std::ostream *OS) const { if (OS) print(*OS); } + void print(std::ostream &OS, + const PrefixPrinter &prefix = PrefixPrinter()) const; + void print(std::ostream *OS, + const PrefixPrinter &prefix = PrefixPrinter()) const { + if (OS) print(*OS, prefix); + } /// viewCFG - This function is meant for use from the debugger. You can just /// say 'call F->viewCFG()' and a ghostview window should pop up from the Added: llvm/trunk/lib/CodeGen/Dump.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/Dump.cpp?rev=78003&view=auto ============================================================================== --- llvm/trunk/lib/CodeGen/Dump.cpp (added) +++ llvm/trunk/lib/CodeGen/Dump.cpp Mon Aug 3 16:55:09 2009 @@ -0,0 +1,18 @@ +//===- lib/Support/Dump.h - Virtual function homes --------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file provides the PrefixPrinter virtual function homes. +// +//===----------------------------------------------------------------------===// + +#include "llvm/CodeGen/Dump.h" + +using namespace llvm; + +PrefixPrinter::~PrefixPrinter() {} Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=78003&r1=78002&r2=78003&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original) +++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Mon Aug 3 16:55:09 2009 @@ -2501,3 +2501,9 @@ return LR; } + +raw_ostream & +IntervalPrefixPrinter::operator()(raw_ostream &out, + const MachineInstr &instr) const { + return out << liinfo.getInstructionIndex(&instr); +} Modified: llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp?rev=78003&r1=78002&r2=78003&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp Mon Aug 3 16:55:09 2009 @@ -153,12 +153,14 @@ os << " %reg" << RegNo; } -void MachineBasicBlock::print(std::ostream &OS) const { +void MachineBasicBlock::print(std::ostream &OS, + const PrefixPrinter &prefix) const { raw_os_ostream RawOS(OS); - print(RawOS); + print(RawOS, prefix); } -void MachineBasicBlock::print(raw_ostream &OS) const { +void MachineBasicBlock::print(raw_ostream &OS, + const PrefixPrinter &prefix) const { const MachineFunction *MF = getParent(); if(!MF) { OS << "Can't print out MachineBasicBlock because parent MachineFunction" @@ -191,7 +193,7 @@ } for (const_iterator I = begin(); I != end(); ++I) { - OS << "\t"; + prefix(OS, *I) << "\t"; I->print(OS, &getParent()->getTarget()); } Modified: llvm/trunk/lib/CodeGen/MachineFunction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineFunction.cpp?rev=78003&r1=78002&r2=78003&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineFunction.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineFunction.cpp Mon Aug 3 16:55:09 2009 @@ -218,7 +218,8 @@ print(*cerr.stream()); } -void MachineFunction::print(std::ostream &OS) const { +void MachineFunction::print(std::ostream &OS, + const PrefixPrinter &prefix) const { OS << "# Machine code for " << Fn->getNameStr () << "():\n"; // Print Frame Information @@ -260,8 +261,10 @@ OS << "\n"; } - for (const_iterator BB = begin(); BB != end(); ++BB) - BB->print(OS); + for (const_iterator BB = begin(); BB != end(); ++BB) { + prefix(OS, *BB); + BB->print(OS, prefix); + } OS << "\n# End machine code for " << Fn->getNameStr () << "().\n\n"; } From sabre at nondot.org Mon Aug 3 16:57:05 2009 From: sabre at nondot.org (Chris Lattner) Date: Mon, 03 Aug 2009 21:57:05 -0000 Subject: [llvm-commits] [llvm] r78004 - /llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp Message-ID: <200908032157.n73Lv609027658@zion.cs.uiuc.edu> Author: lattner Date: Mon Aug 3 16:57:00 2009 New Revision: 78004 URL: http://llvm.org/viewvc/llvm-project?rev=78004&view=rev Log: this really shouldn't switch sections without telling the asmprinter, but hey it uses .previous, so it should work :) Modified: llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp Modified: llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp?rev=78004&r1=78003&r2=78004&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp Mon Aug 3 16:57:00 2009 @@ -421,7 +421,7 @@ } bool MipsAsmPrinter::doInitialization(Module &M) { - // FIXME: Use SwitchToDataSection. + // FIXME: Use SwitchToSection. // Tell the assembler which ABI we are using O << "\t.section .mdebug." << emitCurrentABIString() << '\n'; From gohman at apple.com Mon Aug 3 17:07:34 2009 From: gohman at apple.com (Dan Gohman) Date: Mon, 03 Aug 2009 22:07:34 -0000 Subject: [llvm-commits] [llvm] r78005 - in /llvm/trunk: include/llvm/Constant.h lib/Transforms/Scalar/InstructionCombining.cpp lib/VMCore/Constants.cpp test/Transforms/InstCombine/simplify-demanded-bits-pointer.ll Message-ID: <200908032207.n73M7Ypq028151@zion.cs.uiuc.edu> Author: djg Date: Mon Aug 3 17:07:33 2009 New Revision: 78005 URL: http://llvm.org/viewvc/llvm-project?rev=78005&view=rev Log: Add a new Constant::getIntegerValue helper function, and convert a few places in InstCombine to use it, to fix problems handling pointer types. This fixes the recent llvm-gcc bootstrap error. Added: llvm/trunk/test/Transforms/InstCombine/simplify-demanded-bits-pointer.ll Modified: llvm/trunk/include/llvm/Constant.h llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp llvm/trunk/lib/VMCore/Constants.cpp Modified: llvm/trunk/include/llvm/Constant.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Constant.h?rev=78005&r1=78004&r2=78005&view=diff ============================================================================== --- llvm/trunk/include/llvm/Constant.h (original) +++ llvm/trunk/include/llvm/Constant.h Mon Aug 3 17:07:33 2009 @@ -17,6 +17,8 @@ #include "llvm/User.h" namespace llvm { + class APInt; + template class SmallVectorImpl; class LLVMContext; @@ -142,6 +144,10 @@ /// its bits set to true. /// @brief Get the all ones value static Constant* getAllOnesValue(const Type* Ty); + + /// getIntegerValue - Return the value for an integer or pointer constant, + /// or a vector thereof, with the given scalar value. + static Constant* getIntegerValue(const Type* Ty, const APInt &V); }; } // End llvm namespace Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=78005&r1=78004&r2=78005&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Mon Aug 3 17:07:33 2009 @@ -1014,8 +1014,8 @@ if ((DemandedMask & (RHSKnownZero|RHSKnownOne)) == DemandedMask) { // all known if ((RHSKnownOne & LHSKnownOne) == RHSKnownOne) { - Constant *AndC = ConstantInt::get(VTy, - ~RHSKnownOne & DemandedMask); + Constant *AndC = Constant::getIntegerValue(VTy, + ~RHSKnownOne & DemandedMask); Instruction *And = BinaryOperator::CreateAnd(I->getOperand(0), AndC, "tmp"); return InsertNewInstBefore(And, *I); @@ -1406,12 +1406,8 @@ // If the client is only demanding bits that we know, return the known // constant. - if ((DemandedMask & (RHSKnownZero|RHSKnownOne)) == DemandedMask) { - Constant *C = ConstantInt::get(VTy, RHSKnownOne); - if (isa(V->getType())) - C = ConstantExpr::getIntToPtr(C, V->getType()); - return C; - } + if ((DemandedMask & (RHSKnownZero|RHSKnownOne)) == DemandedMask) + return Constant::getIntegerValue(VTy, RHSKnownOne); return false; } Modified: llvm/trunk/lib/VMCore/Constants.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Constants.cpp?rev=78005&r1=78004&r2=78005&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Constants.cpp (original) +++ llvm/trunk/lib/VMCore/Constants.cpp Mon Aug 3 17:07:33 2009 @@ -70,6 +70,23 @@ } } +Constant* Constant::getIntegerValue(const Type* Ty, const APInt &V) { + const Type *ScalarTy = Ty->getScalarType(); + + // Create the base integer constant. + Constant *C = ConstantInt::get(Ty->getContext(), V); + + // Convert an integer to a pointer, if necessary. + if (const PointerType *PTy = dyn_cast(ScalarTy)) + C = ConstantExpr::getIntToPtr(C, PTy); + + // Broadcast a scalar to a vector, if necessary. + if (const VectorType *VTy = dyn_cast(Ty)) + C = ConstantVector::get(std::vector(VTy->getNumElements(), C)); + + return C; +} + Constant* Constant::getAllOnesValue(const Type* Ty) { if (const IntegerType* ITy = dyn_cast(Ty)) return ConstantInt::get(Ty->getContext(), Added: llvm/trunk/test/Transforms/InstCombine/simplify-demanded-bits-pointer.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/simplify-demanded-bits-pointer.ll?rev=78005&view=auto ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/simplify-demanded-bits-pointer.ll (added) +++ llvm/trunk/test/Transforms/InstCombine/simplify-demanded-bits-pointer.ll Mon Aug 3 17:07:33 2009 @@ -0,0 +1,84 @@ +; RUN: llvm-as < %s | opt -instcombine + +; SimplifyDemandedBits should cope with pointer types. + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" +target triple = "x86_64-unknown-linux-gnu" + %struct.VEC_rtx_base = type { i32, i32, [1 x %struct.rtx_def*] } + %struct.VEC_rtx_gc = type { %struct.VEC_rtx_base } + %struct.block_symbol = type { [3 x %struct.rtunion], %struct.object_block*, i64 } + %struct.object_block = type { %struct.section*, i32, i64, %struct.VEC_rtx_gc*, %struct.VEC_rtx_gc* } + %struct.omp_clause_subcode = type { i32 } + %struct.rtunion = type { i8* } + %struct.rtx_def = type { i16, i8, i8, %struct.u } + %struct.section = type { %struct.unnamed_section } + %struct.u = type { %struct.block_symbol } + %struct.unnamed_section = type { %struct.omp_clause_subcode, void (i8*)*, i8*, %struct.section* } + +define fastcc void @cse_insn(%struct.rtx_def* %insn, %struct.rtx_def* %libcall_insn) nounwind { +entry: + br i1 undef, label %bb43, label %bb88 + +bb43: ; preds = %entry + br label %bb88 + +bb88: ; preds = %bb43, %entry + br i1 undef, label %bb95, label %bb107 + +bb95: ; preds = %bb88 + unreachable + +bb107: ; preds = %bb88 + %0 = load i16* undef, align 8 ; [#uses=1] + %1 = icmp eq i16 %0, 38 ; [#uses=1] + %src_eqv_here.0 = select i1 %1, %struct.rtx_def* null, %struct.rtx_def* null ; <%struct.rtx_def*> [#uses=1] + br i1 undef, label %bb127, label %bb125 + +bb125: ; preds = %bb107 + br i1 undef, label %bb127, label %bb126 + +bb126: ; preds = %bb125 + br i1 undef, label %bb129, label %bb133 + +bb127: ; preds = %bb125, %bb107 + unreachable + +bb129: ; preds = %bb126 + br label %bb133 + +bb133: ; preds = %bb129, %bb126 + br i1 undef, label %bb134, label %bb146 + +bb134: ; preds = %bb133 + unreachable + +bb146: ; preds = %bb133 + br i1 undef, label %bb180, label %bb186 + +bb180: ; preds = %bb146 + %2 = icmp eq %struct.rtx_def* null, null ; [#uses=1] + %3 = zext i1 %2 to i8 ; [#uses=1] + %4 = icmp ne %struct.rtx_def* %src_eqv_here.0, null ; [#uses=1] + %5 = zext i1 %4 to i8 ; [#uses=1] + %toBool181 = icmp ne i8 %3, 0 ; [#uses=1] + %toBool182 = icmp ne i8 %5, 0 ; [#uses=1] + %6 = and i1 %toBool181, %toBool182 ; [#uses=1] + %7 = zext i1 %6 to i8 ; [#uses=1] + %toBool183 = icmp ne i8 %7, 0 ; [#uses=1] + br i1 %toBool183, label %bb184, label %bb186 + +bb184: ; preds = %bb180 + br i1 undef, label %bb185, label %bb186 + +bb185: ; preds = %bb184 + br label %bb186 + +bb186: ; preds = %bb185, %bb184, %bb180, %bb146 + br i1 undef, label %bb190, label %bb195 + +bb190: ; preds = %bb186 + unreachable + +bb195: ; preds = %bb186 + unreachable +} From dag at cray.com Mon Aug 3 17:11:30 2009 From: dag at cray.com (David Greene) Date: Mon, 3 Aug 2009 17:11:30 -0500 Subject: [llvm-commits] [llvm] r77740 - in /llvm/trunk: include/llvm/CodeGen/AsmPrinter.h lib/CodeGen/AsmPrinter/AsmPrinter.cpp test/CodeGen/X86/2009-04-17-tls-fast.ll test/CodeGen/X86/tls1-pic.ll test/CodeGen/X86/tls2-pic.ll test/CodeGen/X86/tls3-pic.ll test/CodeGen/X86/tls4-pic.ll utils/TableGen/AsmWriterEmitter.cpp In-Reply-To: <200908031705.59956.dag@cray.com> References: <200907312157.n6VLvAKm021365@zion.cs.uiuc.edu> <200908031146.20758.greened@obbligato.org> <200908031705.59956.dag@cray.com> Message-ID: <200908031711.30871.dag@cray.com> On Monday 03 August 2009 17:05, David Greene wrote: > On Monday 03 August 2009 11:46, David A. Greene wrote: > > > I'm not following what you mean here. Can you give me an example that > > > shows what this does? > > > > Oh! This changed since the last time I looked at it. It used to be that > > the tabs were embedded into the AsmStrs array and some opcodes had tabs > > after them and others didn't. I see now that in X86GenAsmWriter1.inc the > > asm boilerplate emits the tab after the opcode: > > > > O << "\t"; > > Oh, never mind. This is the tab to align the mnemonics. > > It still changed though. There used to be tabs embedded in AsmStrs. Now I > don't know how they get generated. > > I am thoroughly confused now. :-/ Confusion ended. Of course this changed with the definition of PadToColumn in AsmPrinter: void AsmPrinter::PadToColumn(unsigned Operand) const { if (getOperandColumn(Operand) > 0) { O.PadToColumn(getOperandColumn(Operand), 1); } else { if (Operand == 1) { // Emit the tab after the mnemonic. O << '\t'; } else { // Replace the tab with a space. O << ' '; } } } AsmWriterEmitter no longer emits tabs into the AsmStrs because of this. So you're right, all this ugly complexity can go away. Hmm...except this probably doesn't work for "pd" suffixed mnemonics as I pointed out earlier. So there's a bug here. I'll figure that out. -Dave From sabre at nondot.org Mon Aug 3 17:16:58 2009 From: sabre at nondot.org (Chris Lattner) Date: Mon, 03 Aug 2009 22:16:58 -0000 Subject: [llvm-commits] [llvm] r78006 - /llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Message-ID: <200908032216.n73MGxHF028407@zion.cs.uiuc.edu> Author: lattner Date: Mon Aug 3 17:16:57 2009 New Revision: 78006 URL: http://llvm.org/viewvc/llvm-project?rev=78006&view=rev Log: hoist some common code out of a switch Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp?rev=78006&r1=78005&r2=78006&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Mon Aug 3 17:16:57 2009 @@ -169,23 +169,22 @@ DecorateCygMingName(CurrentFnName, F); SwitchToSection(getObjFileLowering().SectionForGlobal(F, Mang, TM)); + EmitAlignment(FnAlign, F); + switch (F->getLinkage()) { default: llvm_unreachable("Unknown linkage type!"); case Function::InternalLinkage: // Symbols default to internal. case Function::PrivateLinkage: case Function::LinkerPrivateLinkage: - EmitAlignment(FnAlign, F); break; case Function::DLLExportLinkage: case Function::ExternalLinkage: - EmitAlignment(FnAlign, F); O << "\t.globl\t" << CurrentFnName << '\n'; break; case Function::LinkOnceAnyLinkage: case Function::LinkOnceODRLinkage: case Function::WeakAnyLinkage: case Function::WeakODRLinkage: - EmitAlignment(FnAlign, F); if (Subtarget->isTargetDarwin()) { O << "\t.globl\t" << CurrentFnName << '\n'; O << TAI->getWeakDefDirective() << CurrentFnName << '\n'; From sabre at nondot.org Mon Aug 3 17:18:16 2009 From: sabre at nondot.org (Chris Lattner) Date: Mon, 03 Aug 2009 22:18:16 -0000 Subject: [llvm-commits] [llvm] r78007 - /llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp Message-ID: <200908032218.n73MIGOI028459@zion.cs.uiuc.edu> Author: lattner Date: Mon Aug 3 17:18:15 2009 New Revision: 78007 URL: http://llvm.org/viewvc/llvm-project?rev=78007&view=rev Log: convert macho stub emission to use SwitchToSection instead of textual sections. Modified: llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp Modified: llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp?rev=78007&r1=78006&r2=78007&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp Mon Aug 3 17:18:15 2009 @@ -1269,49 +1269,65 @@ bool ARMAsmPrinter::doFinalization(Module &M) { if (Subtarget->isTargetDarwin()) { - SwitchToDataSection(""); - + // All darwin targets use mach-o. + TargetLoweringObjectFileMachO &TLOFMacho = + static_cast(getObjFileLowering()); + O << '\n'; - // Output stubs for dynamically-linked functions - for (StringMap::iterator I = FnStubs.begin(), E = FnStubs.end(); - I != E; ++I) { - const FnStubInfo &Info = I->second; + + if (!FnStubs.empty()) { + const MCSection *StubSection; if (TM.getRelocationModel() == Reloc::PIC_) - SwitchToTextSection(".section __TEXT,__picsymbolstub4,symbol_stubs," - "none,16", 0); + StubSection = TLOFMacho.getMachOSection(".section __TEXT,__picsymbolstu" + "b4,symbol_stubs,none,16", true, + SectionKind::getText()); else - SwitchToTextSection(".section __TEXT,__symbol_stub4,symbol_stubs," - "none,12", 0); - - EmitAlignment(2); - O << "\t.code\t32\n"; + StubSection = TLOFMacho.getMachOSection(".section __TEXT,__symbol_stub4" + ",symbol_stubs,none,12", true, + SectionKind::getText()); + + const MCSection *LazySymbolPointerSection + = TLOFMacho.getMachOSection(".lazy_symbol_pointer", true, + SectionKind::getMetadata()); + + // Output stubs for dynamically-linked functions + for (StringMap::iterator I = FnStubs.begin(), + E = FnStubs.end(); I != E; ++I) { + const FnStubInfo &Info = I->second; + + SwitchToSection(StubSection); + EmitAlignment(2); + O << "\t.code\t32\n"; - O << Info.Stub << ":\n"; - O << "\t.indirect_symbol " << I->getKeyData() << '\n'; - O << "\tldr ip, " << Info.SLP << '\n'; - if (TM.getRelocationModel() == Reloc::PIC_) { - O << Info.SCV << ":\n"; - O << "\tadd ip, pc, ip\n"; + O << Info.Stub << ":\n"; + O << "\t.indirect_symbol " << I->getKeyData() << '\n'; + O << "\tldr ip, " << Info.SLP << '\n'; + if (TM.getRelocationModel() == Reloc::PIC_) { + O << Info.SCV << ":\n"; + O << "\tadd ip, pc, ip\n"; + } + O << "\tldr pc, [ip, #0]\n"; + O << Info.SLP << ":\n"; + O << "\t.long\t" << Info.LazyPtr; + if (TM.getRelocationModel() == Reloc::PIC_) + O << "-(" << Info.SCV << "+8)"; + O << '\n'; + + SwitchToSection(LazySymbolPointerSection); + O << Info.LazyPtr << ":\n"; + O << "\t.indirect_symbol " << I->getKeyData() << "\n"; + O << "\t.long\tdyld_stub_binding_helper\n"; } - O << "\tldr pc, [ip, #0]\n"; - O << Info.SLP << ":\n"; - O << "\t.long\t" << Info.LazyPtr; - if (TM.getRelocationModel() == Reloc::PIC_) - O << "-(" << Info.SCV << "+8)"; O << '\n'; - - SwitchToDataSection(".lazy_symbol_pointer", 0); - O << Info.LazyPtr << ":\n"; - O << "\t.indirect_symbol " << I->getKeyData() << "\n"; - O << "\t.long\tdyld_stub_binding_helper\n"; } - O << '\n'; - + // Output non-lazy-pointers for external and common global variables. if (!GVNonLazyPtrs.empty()) { - SwitchToDataSection("\t.non_lazy_symbol_pointer", 0); - for (StringMap::iterator I = GVNonLazyPtrs.begin(), - E = GVNonLazyPtrs.end(); I != E; ++I) { + SwitchToSection(TLOFMacho.getMachOSection(".non_lazy_symbol_pointer", + true, + SectionKind::getMetadata())); + for (StringMap::iterator I = GVNonLazyPtrs.begin(), + E = GVNonLazyPtrs.end(); I != E; ++I) { O << I->second << ":\n"; O << "\t.indirect_symbol " << I->getKeyData() << "\n"; O << "\t.long\t0\n"; From isanbard at gmail.com Mon Aug 3 17:21:23 2009 From: isanbard at gmail.com (Bill Wendling) Date: Mon, 3 Aug 2009 15:21:23 -0700 Subject: [llvm-commits] [llvm] r78005 - in /llvm/trunk: include/llvm/Constant.h lib/Transforms/Scalar/InstructionCombining.cpp lib/VMCore/Constants.cpp test/Transforms/InstCombine/simplify-demanded-bits-pointer.ll In-Reply-To: <200908032207.n73M7Ypq028151@zion.cs.uiuc.edu> References: <200908032207.n73M7Ypq028151@zion.cs.uiuc.edu> Message-ID: <16e5fdf90908031521n3bf9e4a3kc6d00f9be5fbbe8d@mail.gmail.com> On Mon, Aug 3, 2009 at 3:07 PM, Dan Gohman wrote: > +; RUN: llvm-as < %s | opt -instcombine > + Should maybe use -disable-output? -bw From gohman at apple.com Mon Aug 3 17:24:22 2009 From: gohman at apple.com (Dan Gohman) Date: Mon, 03 Aug 2009 22:24:22 -0000 Subject: [llvm-commits] [llvm] r78009 - /llvm/trunk/test/Transforms/InstCombine/simplify-demanded-bits-pointer.ll Message-ID: <200908032224.n73MOMmE028750@zion.cs.uiuc.edu> Author: djg Date: Mon Aug 3 17:24:22 2009 New Revision: 78009 URL: http://llvm.org/viewvc/llvm-project?rev=78009&view=rev Log: Add -disable-output. Thanks Bill! Modified: llvm/trunk/test/Transforms/InstCombine/simplify-demanded-bits-pointer.ll Modified: llvm/trunk/test/Transforms/InstCombine/simplify-demanded-bits-pointer.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/simplify-demanded-bits-pointer.ll?rev=78009&r1=78008&r2=78009&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/simplify-demanded-bits-pointer.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/simplify-demanded-bits-pointer.ll Mon Aug 3 17:24:22 2009 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | opt -instcombine +; RUN: llvm-as < %s | opt -instcombine -disable-output ; SimplifyDemandedBits should cope with pointer types. From bruno.cardoso at gmail.com Mon Aug 3 17:25:32 2009 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Mon, 3 Aug 2009 19:25:32 -0300 Subject: [llvm-commits] [PATCH] x86 code emitter improvements for object files In-Reply-To: <0C952180-94F8-475D-88ED-8EF214A9D02B@apple.com> References: <275e64e40907311603k11679adeybd7aa160739b1908@mail.gmail.com> <0C952180-94F8-475D-88ED-8EF214A9D02B@apple.com> Message-ID: <275e64e40908031525i6ceeb331kf20b8393a1fc3918@mail.gmail.com> On Mon, Aug 3, 2009 at 4:00 PM, Chris Lattner wrote: > > On Jul 31, 2009, at 4:03 PM, Bruno Cardoso Lopes wrote: > >> Hi all, >> >> The X86CodeEmitter has the following behaviour: >> >> 1) When emiting displacements: >> - Only use pc_relative relocations for x86_64 (globals, cstpools and >> jmptables) >> - For x86, only uses pc_rel ou pic_re >> This two items above do not always work for ELF. > > Hi Bruno, > > I don't have an opinion about this patch specifically, but would it be > possible to make the code emitter be driven off the asm operand flags > instead of making equivalent decisions that have to mirror what isel does? > > Specifically, MO.getTargetFlags() should tell the code emitter how to handle > the CPI/JT/GA/ExtSym operands, X86ATTAsmPrinter.cpp has stuff like this: > > ?switch (MO.getTargetFlags()) { > ?default: > ? ?llvm_unreachable("Unknown target flag on GV operand"); > ?case X86II::MO_NO_FLAG: ? ?// No flag. > ? ?break; > ?case X86II::MO_DARWIN_NONLAZY: > ?case X86II::MO_DARWIN_HIDDEN_NONLAZY: > ?case X86II::MO_DLLIMPORT: > ?case X86II::MO_DARWIN_STUB: > ? ?// These affect the name of the symbol, not any suffix. > ? ?break; > ?case X86II::MO_GOT_ABSOLUTE_ADDRESS: > ? ?O << " + [.-"; > ? ?PrintPICBaseSymbol(); > ? ?O << ']'; > ? ?break; > ?case X86II::MO_PIC_BASE_OFFSET: > ?case X86II::MO_DARWIN_NONLAZY_PIC_BASE: > ?case X86II::MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE: > ? ?O << '-'; > ? ?PrintPICBaseSymbol(); > ? ?break; > ?case X86II::MO_TLSGD: ? ? O << "@TLSGD"; ? ? break; > ?case X86II::MO_GOTTPOFF: ?O << "@GOTTPOFF"; ?break; > ?case X86II::MO_INDNTPOFF: O << "@INDNTPOFF"; break; > ?case X86II::MO_TPOFF: ? ? O << "@TPOFF"; ? ? break; > ?case X86II::MO_NTPOFF: ? ?O << "@NTPOFF"; ? ?break; > ?case X86II::MO_GOTPCREL: ?O << "@GOTPCREL"; ?break; > ?case X86II::MO_GOT: ? ? ? O << "@GOT"; ? ? ? break; > ?case X86II::MO_GOTOFF: ? ?O << "@GOTOFF"; ? ?break; > ?case X86II::MO_PLT: ? ? ? O << "@PLT"; ? ? ? break; > ?} > > For example. ?It would be better to base the encoding on this flag than > checking things like Is64BitMode, IsPIC etc. Yes, that's the right way to go. I thought about that when I started hacking the x86 code emitter, but the problem here is that I'm afraid of breaking JIT stuff and lose the focus on the elf object code emission. I would be happy to work on this clean up as a next step after elf is working, but I would prefer to apply this patch for now if that's ok for you. But it's your call then. Thanks, >> This patch try to solve the 3 problems above to properly emit elf >> binaries for x86/x86_64. With >> this changes applied (together with elf improvements I've not commited >> yet) I was able >> to run 209/243 (83%) of SinglesSources using ELF object files emited by >> LLC :) >> and with no regressions for JIT. > > Wow, nice!! > > -Chris > > -- Bruno Cardoso Lopes http://www.brunocardoso.cc From gohman at apple.com Mon Aug 3 17:27:11 2009 From: gohman at apple.com (Dan Gohman) Date: Mon, 3 Aug 2009 15:27:11 -0700 Subject: [llvm-commits] [llvm] r77747 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp In-Reply-To: <4A75FBFE.3060901@obbligato.org> References: <200907312241.n6VMfM0B022916@zion.cs.uiuc.edu> <4A75FBFE.3060901@obbligato.org> Message-ID: On Aug 2, 2009, at 1:50 PM, David Greene wrote: > Dan Gohman wrote: > > >>> Yes, a vector of pointers isn't legal; we only support integer and >>> >>> FP vectors. >>> >> >> >> And if that ever changes (:-)) >> > > Oh Dan, do tell! :) I don't have anything to tell. It's just a feature that I can see someone wanting some day. Dan From gohman at apple.com Mon Aug 3 17:30:19 2009 From: gohman at apple.com (Dan Gohman) Date: Mon, 03 Aug 2009 22:30:19 -0000 Subject: [llvm-commits] [llvm] r78010 - /llvm/trunk/include/llvm/DerivedTypes.h Message-ID: <200908032230.n73MUK8Z028973@zion.cs.uiuc.edu> Author: djg Date: Mon Aug 3 17:30:18 2009 New Revision: 78010 URL: http://llvm.org/viewvc/llvm-project?rev=78010&view=rev Log: Minor whitespace fix, so this doesn't look like a unary *. Modified: llvm/trunk/include/llvm/DerivedTypes.h Modified: llvm/trunk/include/llvm/DerivedTypes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/DerivedTypes.h?rev=78010&r1=78009&r2=78010&view=diff ============================================================================== --- llvm/trunk/include/llvm/DerivedTypes.h (original) +++ llvm/trunk/include/llvm/DerivedTypes.h Mon Aug 3 17:30:18 2009 @@ -431,7 +431,7 @@ /// @brief Return the number of bits in the Vector type. inline unsigned getBitWidth() const { - return NumElements *getElementType()->getPrimitiveSizeInBits(); + return NumElements * getElementType()->getPrimitiveSizeInBits(); } // Implement the AbstractTypeUser interface. From sabre at nondot.org Mon Aug 3 17:32:52 2009 From: sabre at nondot.org (Chris Lattner) Date: Mon, 03 Aug 2009 22:32:52 -0000 Subject: [llvm-commits] [llvm] r78011 - /llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp Message-ID: <200908032232.n73MWqww029065@zion.cs.uiuc.edu> Author: lattner Date: Mon Aug 3 17:32:50 2009 New Revision: 78011 URL: http://llvm.org/viewvc/llvm-project?rev=78011&view=rev Log: use TLOF to compute the section for a function instead of replicating the logic manually. Modified: llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp Modified: llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp?rev=78011&r1=78010&r2=78011&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp Mon Aug 3 17:32:50 2009 @@ -253,18 +253,19 @@ // NOTE: we don't print out constant pools here, they are handled as // instructions. - O << "\n"; + O << '\n'; + // Print out labels for the function. const Function *F = MF.getFunction(); + SwitchToSection(getObjFileLowering().SectionForGlobal(F, Mang, TM)); + switch (F->getLinkage()) { default: llvm_unreachable("Unknown linkage type!"); case Function::PrivateLinkage: case Function::LinkerPrivateLinkage: case Function::InternalLinkage: - SwitchToTextSection("\t.text", F); break; case Function::ExternalLinkage: - SwitchToTextSection("\t.text", F); O << "\t.globl\t" << CurrentFnName << "\n"; break; case Function::WeakAnyLinkage: @@ -272,8 +273,6 @@ case Function::LinkOnceAnyLinkage: case Function::LinkOnceODRLinkage: if (Subtarget->isTargetDarwin()) { - SwitchToTextSection( - ".section __TEXT,__textcoal_nt,coalesced,pure_instructions", F); O << "\t.globl\t" << CurrentFnName << "\n"; O << "\t.weak_definition\t" << CurrentFnName << "\n"; } else { From dag at cray.com Mon Aug 3 17:35:23 2009 From: dag at cray.com (David Greene) Date: Mon, 3 Aug 2009 17:35:23 -0500 Subject: [llvm-commits] =?iso-8859-1?q?=5Bllvm=5D_r77747=09-_/llvm/trunk/l?= =?iso-8859-1?q?ib/CodeGen/SelectionDAG/SelectionDAGBuild=2Ecpp?= In-Reply-To: References: <200907312241.n6VMfM0B022916@zion.cs.uiuc.edu> <4A75FBFE.3060901@obbligato.org> Message-ID: <200908031735.23251.dag@cray.com> On Monday 03 August 2009 17:27, Dan Gohman wrote: > On Aug 2, 2009, at 1:50 PM, David Greene wrote: > > Dan Gohman wrote: > >>> Yes, a vector of pointers isn't legal; we only support integer and > >>> > >>> FP vectors. > >> > >> And if that ever changes (:-)) > > > > Oh Dan, do tell! :) > > I don't have anything to tell. It's just a feature that > I can see someone wanting some day. Rats! From dpatel at apple.com Mon Aug 3 17:51:10 2009 From: dpatel at apple.com (Devang Patel) Date: Mon, 03 Aug 2009 22:51:10 -0000 Subject: [llvm-commits] [llvm] r78012 - in /llvm/trunk: include/llvm/Metadata.h lib/VMCore/Metadata.cpp Message-ID: <200908032251.n73MpAJM029620@zion.cs.uiuc.edu> Author: dpatel Date: Mon Aug 3 17:51:10 2009 New Revision: 78012 URL: http://llvm.org/viewvc/llvm-project?rev=78012&view=rev Log: Keep track of metadata used by other metadata. Modified: llvm/trunk/include/llvm/Metadata.h llvm/trunk/lib/VMCore/Metadata.cpp Modified: llvm/trunk/include/llvm/Metadata.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Metadata.h?rev=78012&r1=78011&r2=78012&view=diff ============================================================================== --- llvm/trunk/include/llvm/Metadata.h (original) +++ llvm/trunk/include/llvm/Metadata.h Mon Aug 3 17:51:10 2009 @@ -16,7 +16,7 @@ #ifndef LLVM_MDNODE_H #define LLVM_MDNODE_H -#include "llvm/Value.h" +#include "llvm/User.h" #include "llvm/Type.h" #include "llvm/OperandTraits.h" #include "llvm/ADT/FoldingSet.h" @@ -31,11 +31,17 @@ //===----------------------------------------------------------------------===// // MetadataBase - A base class for MDNode, MDString and NamedMDNode. -class MetadataBase : public Value { +class MetadataBase : public User { +private: + /// ReservedSpace - The number of operands actually allocated. NumOperands is + /// the number actually in use. + unsigned ReservedSpace; + protected: MetadataBase(const Type *Ty, unsigned scid) - : Value(Ty, scid) {} + : User(Ty, scid, NULL, 0), ReservedSpace(0) {} + void resizeOperands(unsigned NumOps); public: /// getType() specialization - Type is always MetadataTy. /// @@ -64,13 +70,19 @@ /// MDString is always unnamd. class MDString : public MetadataBase { MDString(const MDString &); // DO NOT IMPLEMENT - StringRef Str; + void *operator new(size_t, unsigned); // DO NOT IMPLEMENT + unsigned getNumOperands(); // DO NOT IMPLEMENT + StringRef Str; protected: explicit MDString(const char *begin, unsigned l) : MetadataBase(Type::MetadataTy, Value::MDStringVal), Str(begin, l) {} public: + // Do not allocate any space for operands. + void *operator new(size_t s) { + return User::operator new(s, 0); + } static MDString *get(LLVMContext &Context, const StringRef &Str); StringRef getString() const { return Str; } @@ -97,38 +109,49 @@ /// These contain a list of the values that represent the metadata. /// MDNode is always unnamed. class MDNode : public MetadataBase, public FoldingSetNode { - MDNode(const MDNode &); // DO NOT IMPLEMENT + MDNode(const MDNode &); // DO NOT IMPLEMENT + void *operator new(size_t, unsigned); // DO NOT IMPLEMENT + // getNumOperands - Make this only available for private uses. + unsigned getNumOperands() { return User::getNumOperands(); } SmallVector Node; - typedef SmallVectorImpl::iterator elem_iterator; - protected: explicit MDNode(Value*const* Vals, unsigned NumVals); public: + // Do not allocate any space for operands. + void *operator new(size_t s) { + return User::operator new(s, 0); + } + // Constructors and destructors. static MDNode *get(LLVMContext &Context, Value* const* Vals, unsigned NumVals); - - typedef SmallVectorImpl::const_iterator const_elem_iterator; + /// dropAllReferences - Remove all uses and clear node vector. + void dropAllReferences(); + + /// ~MDNode - Destroy NamedMDNode. + ~MDNode(); + + /// getElement - Return specified element. Value *getElement(unsigned i) const { + assert (getNumElements() > i && "Invalid element number!"); return Node[i]; } + /// getNumElements - Return number of MDNode elements. unsigned getNumElements() const { return Node.size(); } - bool elem_empty() const { - return Node.empty(); - } - - const_elem_iterator elem_begin() const { - return Node.begin(); - } - - const_elem_iterator elem_end() const { - return Node.end(); - } + // Element access + typedef SmallVectorImpl::const_iterator const_elem_iterator; + typedef SmallVectorImpl::iterator elem_iterator; + /// elem_empty - Return true if MDNode is empty. + bool elem_empty() const { return Node.empty(); } + const_elem_iterator elem_begin() const { return Node.begin(); } + const_elem_iterator elem_end() const { return Node.end(); } + elem_iterator elem_begin() { return Node.begin(); } + elem_iterator elem_end() { return Node.end(); } /// getType() specialization - Type is always MetadataTy. /// @@ -183,10 +206,13 @@ class NamedMDNode : public MetadataBase, public ilist_node { friend class SymbolTableListTraits; - NamedMDNode(const NamedMDNode &); // DO NOT IMPLEMENT - friend class LLVMContextImpl; + NamedMDNode(const NamedMDNode &); // DO NOT IMPLEMENT + void *operator new(size_t, unsigned); // DO NOT IMPLEMENT + // getNumOperands - Make this only available for private uses. + unsigned getNumOperands() { return User::getNumOperands(); } + Module *Parent; SmallVector Node; typedef SmallVectorImpl::iterator elem_iterator; @@ -195,6 +221,10 @@ explicit NamedMDNode(const Twine &N, MetadataBase*const* Vals, unsigned NumVals, Module *M = 0); public: + // Do not allocate any space for operands. + void *operator new(size_t s) { + return User::operator new(s, 0); + } static NamedMDNode *Create(const Twine &N, MetadataBase*const*MDs, unsigned NumMDs, Module *M = 0) { return new NamedMDNode(N, MDs, NumMDs, M); @@ -207,39 +237,38 @@ /// dropAllReferences - Remove all uses and clear node vector. void dropAllReferences(); + /// ~NamedMDNode - Destroy NamedMDNode. ~NamedMDNode(); - typedef SmallVectorImpl::const_iterator const_elem_iterator; - /// getParent - Get the module that holds this named metadata collection. inline Module *getParent() { return Parent; } inline const Module *getParent() const { return Parent; } void setParent(Module *M) { Parent = M; } + /// getElement - Return specified element. MetadataBase *getElement(unsigned i) const { + assert (getNumElements() > i && "Invalid element number!"); return Node[i]; } + /// getNumElements - Return number of NamedMDNode elements. unsigned getNumElements() const { return Node.size(); } /// addElement - Add metadata element. void addElement(MetadataBase *M) { + resizeOperands(0); + OperandList[NumOperands++] = M; Node.push_back(WeakMetadataVH(M)); } - bool elem_empty() const { - return Node.empty(); - } - - const_elem_iterator elem_begin() const { - return Node.begin(); - } - - const_elem_iterator elem_end() const { - return Node.end(); - } + typedef SmallVectorImpl::const_iterator const_elem_iterator; + bool elem_empty() const { return Node.empty(); } + const_elem_iterator elem_begin() const { return Node.begin(); } + const_elem_iterator elem_end() const { return Node.end(); } + elem_iterator elem_begin() { return Node.begin(); } + elem_iterator elem_end() { return Node.end(); } /// getType() specialization - Type is always MetadataTy. /// Modified: llvm/trunk/lib/VMCore/Metadata.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Metadata.cpp?rev=78012&r1=78011&r2=78012&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Metadata.cpp (original) +++ llvm/trunk/lib/VMCore/Metadata.cpp Mon Aug 3 17:51:10 2009 @@ -19,6 +19,34 @@ using namespace llvm; //===----------------------------------------------------------------------===// +//MetadataBase implementation +// + +/// resizeOperands - Metadata keeps track of other metadata uses using +/// OperandList. Resize this list to hold anticipated number of metadata +/// operands. +void MetadataBase::resizeOperands(unsigned NumOps) { + unsigned e = getNumOperands(); + if (NumOps == 0) { + NumOps = e*2; + if (NumOps < 2) NumOps = 2; + } else if (NumOps > NumOperands) { + // No resize needed. + if (ReservedSpace >= NumOps) return; + } else if (NumOps == NumOperands) { + if (ReservedSpace == NumOps) return; + } else { + return; + } + + ReservedSpace = NumOps; + Use *OldOps = OperandList; + Use *NewOps = allocHungoffUses(NumOps); + std::copy(OldOps, OldOps + e, NewOps); + OperandList = NewOps; + if (OldOps) Use::zap(OldOps, OldOps + e, true); +} +//===----------------------------------------------------------------------===// //MDString implementation // MDString *MDString::get(LLVMContext &Context, const StringRef &Str) { @@ -38,8 +66,14 @@ // MDNode::MDNode(Value*const* Vals, unsigned NumVals) : MetadataBase(Type::MetadataTy, Value::MDNodeVal) { - for (unsigned i = 0; i != NumVals; ++i) + NumOperands = 0; + resizeOperands(NumVals); + for (unsigned i = 0; i != NumVals; ++i) { + // Only record metadata uses. + if (MetadataBase *MB = dyn_cast_or_null(Vals[i])) + OperandList[NumOperands++] = MB; Node.push_back(WeakVH(Vals[i])); + } } void MDNode::Profile(FoldingSetNodeID &ID) const { @@ -71,6 +105,15 @@ return N; } +/// dropAllReferences - Remove all uses and clear node vector. +void MDNode::dropAllReferences() { + User::dropAllReferences(); + Node.clear(); +} + +MDNode::~MDNode() { + dropAllReferences(); +} //===----------------------------------------------------------------------===// //NamedMDNode implementation // @@ -78,8 +121,14 @@ unsigned NumMDs, Module *ParentModule) : MetadataBase(Type::MetadataTy, Value::NamedMDNodeVal), Parent(0) { setName(N); - for (unsigned i = 0; i != NumMDs; ++i) + NumOperands = 0; + resizeOperands(NumMDs); + + for (unsigned i = 0; i != NumMDs; ++i) { + if (MDs[i]) + OperandList[NumOperands++] = MDs[i]; Node.push_back(WeakMetadataVH(MDs[i])); + } if (ParentModule) ParentModule->getNamedMDList().push_back(this); } @@ -87,13 +136,12 @@ /// eraseFromParent - Drop all references and remove the node from parent /// module. void NamedMDNode::eraseFromParent() { - dropAllReferences(); getParent()->getNamedMDList().erase(this); } /// dropAllReferences - Remove all uses and clear node vector. void NamedMDNode::dropAllReferences() { - // FIXME: Update metadata use list. + User::dropAllReferences(); Node.clear(); } From sabre at nondot.org Mon Aug 3 17:52:21 2009 From: sabre at nondot.org (Chris Lattner) Date: Mon, 03 Aug 2009 22:52:21 -0000 Subject: [llvm-commits] [llvm] r78013 - /llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp Message-ID: <200908032252.n73MqLSx029667@zion.cs.uiuc.edu> Author: lattner Date: Mon Aug 3 17:52:21 2009 New Revision: 78013 URL: http://llvm.org/viewvc/llvm-project?rev=78013&view=rev Log: switch ppc to using SwitchToSection instead of textual section stuff. Modified: llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp Modified: llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp?rev=78013&r1=78012&r2=78013&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp Mon Aug 3 17:52:21 2009 @@ -854,14 +854,22 @@ // Prime text sections so they are adjacent. This reduces the likelihood a // large data or debug section causes a branch to exceed 16M limit. - SwitchToTextSection("\t.section __TEXT,__textcoal_nt,coalesced," - "pure_instructions"); + + TargetLoweringObjectFileMachO &TLOFMacho = + static_cast(getObjFileLowering()); + SwitchToSection(TLOFMacho.getMachOSection("\t.section __TEXT,__textcoal_nt," + "coalesced,pure_instructions", true, + SectionKind::getText())); if (TM.getRelocationModel() == Reloc::PIC_) { - SwitchToTextSection("\t.section __TEXT,__picsymbolstub1,symbol_stubs," - "pure_instructions,32"); + SwitchToSection(TLOFMacho.getMachOSection("\t.section __TEXT,__picsymbolstu" + "b1,symbol_stubs," + "pure_instructions,32", true, + SectionKind::getText())); } else if (TM.getRelocationModel() == Reloc::DynamicNoPIC) { - SwitchToTextSection("\t.section __TEXT,__symbol_stub1,symbol_stubs," - "pure_instructions,16"); + SwitchToSection(TLOFMacho.getMachOSection("\t.section __TEXT,__symbol_stub1" + ",symbol_stubs," + "pure_instructions,16", true, + SectionKind::getText())); } SwitchToSection(getObjFileLowering().getTextSection()); @@ -980,12 +988,23 @@ bool isPPC64 = TD->getPointerSizeInBits() == 64; + // Darwin/PPC always uses mach-o. + TargetLoweringObjectFileMachO &TLOFMacho = + static_cast(getObjFileLowering()); + // Output stubs for dynamically-linked functions if (TM.getRelocationModel() == Reloc::PIC_ && !FnStubs.empty()) { + const MCSection *StubSection = + TLOFMacho.getMachOSection("\t.section __TEXT,__picsymbolstub1," + "symbol_stubs,pure_instructions,32", true, + SectionKind::getText()); + const MCSection *LSPSection = + TLOFMacho.getMachOSection(".lazy_symbol_pointer", true, + SectionKind::getMetadata()); + for (StringMap::iterator I = FnStubs.begin(), E = FnStubs.end(); I != E; ++I) { - SwitchToTextSection("\t.section __TEXT,__picsymbolstub1,symbol_stubs," - "pure_instructions,32"); + SwitchToSection(StubSection); EmitAlignment(4); const FnStubInfo &Info = I->second; O << Info.Stub << ":\n"; @@ -1002,16 +1021,23 @@ O << "\tmtctr r12\n"; O << "\tbctr\n"; - SwitchToDataSection(".lazy_symbol_pointer"); + SwitchToSection(LSPSection); O << Info.LazyPtr << ":\n"; O << "\t.indirect_symbol " << I->getKeyData() << '\n'; O << (isPPC64 ? "\t.quad" : "\t.long") << " dyld_stub_binding_helper\n"; } } else if (!FnStubs.empty()) { + const MCSection *StubSection = + TLOFMacho.getMachOSection("\t.section __TEXT,__symbol_stub1,symbol_stubs," + "pure_instructions,16", true, + SectionKind::getText()); + const MCSection *LSPSection = + TLOFMacho.getMachOSection(".lazy_symbol_pointer", true, + SectionKind::getMetadata()); + for (StringMap::iterator I = FnStubs.begin(), E = FnStubs.end(); I != E; ++I) { - SwitchToTextSection("\t.section __TEXT,__symbol_stub1,symbol_stubs," - "pure_instructions,16"); + SwitchToSection(StubSection); EmitAlignment(4); const FnStubInfo &Info = I->second; O << Info.Stub << ":\n"; @@ -1021,7 +1047,7 @@ O << Info.LazyPtr << ")(r11)\n"; O << "\tmtctr r12\n"; O << "\tbctr\n"; - SwitchToDataSection(".lazy_symbol_pointer"); + SwitchToSection(LSPSection); O << Info.LazyPtr << ":\n"; O << "\t.indirect_symbol " << I->getKeyData() << '\n'; O << (isPPC64 ? "\t.quad" : "\t.long") << " dyld_stub_binding_helper\n"; @@ -1042,9 +1068,12 @@ } } - // Output stubs for external and common global variables. + // Output macho stubs for external and common global variables. if (!GVStubs.empty()) { - SwitchToDataSection(".non_lazy_symbol_pointer"); + const MCSection *TheSection = + TLOFMacho.getMachOSection(".non_lazy_symbol_pointer", true, + SectionKind::getMetadata()); + SwitchToSection(TheSection); for (StringMap::iterator I = GVStubs.begin(), E = GVStubs.end(); I != E; ++I) { O << I->second << ":\n"; From clattner at apple.com Mon Aug 3 17:58:44 2009 From: clattner at apple.com (Chris Lattner) Date: Mon, 3 Aug 2009 15:58:44 -0700 Subject: [llvm-commits] [PATCH] x86 code emitter improvements for object files In-Reply-To: <275e64e40908031525i6ceeb331kf20b8393a1fc3918@mail.gmail.com> References: <275e64e40907311603k11679adeybd7aa160739b1908@mail.gmail.com> <0C952180-94F8-475D-88ED-8EF214A9D02B@apple.com> <275e64e40908031525i6ceeb331kf20b8393a1fc3918@mail.gmail.com> Message-ID: <4060CD96-A773-4622-8471-DF5BFBBCF50D@apple.com> On Aug 3, 2009, at 3:25 PM, Bruno Cardoso Lopes wrote: >> >> For example. It would be better to base the encoding on this flag >> than >> checking things like Is64BitMode, IsPIC etc. > > Yes, that's the right way to go. I thought about that when I started > hacking the > x86 code emitter, but the problem here is that I'm afraid of > breaking JIT stuff > and lose the focus on the elf object code emission. I would be happy > to > work on this clean up as a next step after elf is working, but I would > prefer to > apply this patch for now if that's ok for you. But it's your call > then. Sure, makes sense to me. Evan, are you ok with this patch? -Chris From sabre at nondot.org Mon Aug 3 18:02:50 2009 From: sabre at nondot.org (Chris Lattner) Date: Mon, 03 Aug 2009 23:02:50 -0000 Subject: [llvm-commits] [llvm] r78014 - /llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp Message-ID: <200908032302.n73N2pA4030027@zion.cs.uiuc.edu> Author: lattner Date: Mon Aug 3 18:02:45 2009 New Revision: 78014 URL: http://llvm.org/viewvc/llvm-project?rev=78014&view=rev Log: remove an unneeded section switch. Modified: llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp Modified: llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp?rev=78014&r1=78013&r2=78014&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp Mon Aug 3 18:02:45 2009 @@ -485,7 +485,6 @@ bool LinuxAsmPrinter::doInitialization(Module &M) { bool Result = AsmPrinter::doInitialization(M); DW = getAnalysisIfAvailable(); - SwitchToTextSection("\t.text"); return Result; } From sabre at nondot.org Mon Aug 3 18:10:36 2009 From: sabre at nondot.org (Chris Lattner) Date: Mon, 03 Aug 2009 23:10:36 -0000 Subject: [llvm-commits] [llvm] r78015 - in /llvm/trunk: include/llvm/CodeGen/AsmPrinter.h lib/CodeGen/AsmPrinter/AsmPrinter.cpp Message-ID: <200908032310.n73NAbnP030292@zion.cs.uiuc.edu> Author: lattner Date: Mon Aug 3 18:10:34 2009 New Revision: 78015 URL: http://llvm.org/viewvc/llvm-project?rev=78015&view=rev Log: Kill off SwitchToDataSection and SwitchToTextSection, woo. Modified: llvm/trunk/include/llvm/CodeGen/AsmPrinter.h llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp Modified: llvm/trunk/include/llvm/CodeGen/AsmPrinter.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/AsmPrinter.h?rev=78015&r1=78014&r2=78015&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/AsmPrinter.h (original) +++ llvm/trunk/include/llvm/CodeGen/AsmPrinter.h Mon Aug 3 18:10:34 2009 @@ -143,34 +143,6 @@ /// bool isVerbose() const { return VerboseAsm; } - /// SwitchToTextSection - Switch to the specified section of the executable - /// if we are not already in it! If GV is non-null and if the global has an - /// explicitly requested section, we switch to the section indicated for the - /// global instead of NewSection. - /// - /// If the new section is an empty string, this method forgets what the - /// current section is, but does not emit a .section directive. - /// - /// This method is used when about to emit executable code. - /// - void SwitchToTextSection(const char *NewSection, - const GlobalValue *GV = NULL); - - /// SwitchToDataSection - Switch to the specified section of the executable - /// if we are not already in it! If GV is non-null and if the global has an - /// explicitly requested section, we switch to the section indicated for the - /// global instead of NewSection. - /// - /// If the new section is an empty string, this method forgets what the - /// current section is, but does not emit a .section directive. - /// - /// This method is used when about to emit data. For most assemblers, this - /// is the same as the SwitchToTextSection method, but not all assemblers - /// are the same. - /// - void SwitchToDataSection(const char *NewSection, - const GlobalValue *GV = NULL); - /// SwitchToSection - Switch to the specified section of the executable if /// we are not already in it! void SwitchToSection(const MCSection *NS); Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp?rev=78015&r1=78014&r2=78015&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp (original) +++ llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp Mon Aug 3 18:10:34 2009 @@ -78,59 +78,6 @@ return TM.getTargetLowering()->getObjFileLowering(); } - -/// SwitchToTextSection - Switch to the specified text section of the executable -/// if we are not already in it! -/// -void AsmPrinter::SwitchToTextSection(const char *NewSection, - const GlobalValue *GV) { - std::string NS; - if (GV && GV->hasSection()) - NS = TAI->getSwitchToSectionDirective() + GV->getSection(); - else - NS = NewSection; - - // If we're already in this section, we're done. - if (CurrentSection == NS) return; - - // Close the current section, if applicable. - if (TAI->getSectionEndDirectiveSuffix() && !CurrentSection.empty()) - O << CurrentSection << TAI->getSectionEndDirectiveSuffix() << '\n'; - - CurrentSection = NS; - - if (!CurrentSection.empty()) - O << CurrentSection << TAI->getTextSectionStartSuffix() << '\n'; - - IsInTextSection = true; -} - -/// SwitchToDataSection - Switch to the specified data section of the executable -/// if we are not already in it! -/// -void AsmPrinter::SwitchToDataSection(const char *NewSection, - const GlobalValue *GV) { - std::string NS; - if (GV && GV->hasSection()) - NS = TAI->getSwitchToSectionDirective() + GV->getSection(); - else - NS = NewSection; - - // If we're already in this section, we're done. - if (CurrentSection == NS) return; - - // Close the current section, if applicable. - if (TAI->getSectionEndDirectiveSuffix() && !CurrentSection.empty()) - O << CurrentSection << TAI->getSectionEndDirectiveSuffix() << '\n'; - - CurrentSection = NS; - - if (!CurrentSection.empty()) - O << CurrentSection << TAI->getDataSectionStartSuffix() << '\n'; - - IsInTextSection = false; -} - /// SwitchToSection - Switch to the specified section of the executable if we /// are not already in it! If "NS" is null, then this causes us to exit the /// current section and not reenter another one. This is generally used for @@ -210,7 +157,7 @@ << '\n' << TAI->getCommentString() << " End of file scope inline assembly\n"; - SwitchToDataSection(""); // Reset back to no section. + SwitchToSection(0); // Reset back to no section to close off sections. if (TAI->doesSupportDebugInformation() || TAI->doesSupportExceptionHandling()) { @@ -241,7 +188,7 @@ // to stuff that is actually used. Note that doing so would require targets // to notice uses in operands (due to constant exprs etc). This should // happen with the MC stuff eventually. - SwitchToDataSection(""); + SwitchToSection(0); // Print out module-level global variables here. for (Module::const_global_iterator I = M.global_begin(), E = M.global_end(); @@ -250,8 +197,7 @@ O << TAI->getWeakRefDirective() << Mang->getMangledName(I) << '\n'; } - for (Module::const_iterator I = M.begin(), E = M.end(); - I != E; ++I) { + for (Module::const_iterator I = M.begin(), E = M.end(); I != E; ++I) { if (I->hasExternalWeakLinkage()) O << TAI->getWeakRefDirective() << Mang->getMangledName(I) << '\n'; } From sabre at nondot.org Mon Aug 3 18:20:29 2009 From: sabre at nondot.org (Chris Lattner) Date: Mon, 03 Aug 2009 23:20:29 -0000 Subject: [llvm-commits] [llvm] r78017 - in /llvm/trunk: include/llvm/CodeGen/AsmPrinter.h lib/CodeGen/AsmPrinter/AsmPrinter.cpp lib/CodeGen/AsmPrinter/DwarfDebug.cpp Message-ID: <200908032320.n73NKUrK030672@zion.cs.uiuc.edu> Author: lattner Date: Mon Aug 3 18:20:21 2009 New Revision: 78017 URL: http://llvm.org/viewvc/llvm-project?rev=78017&view=rev Log: eliminate CurrentSection, rename CurrentSection_ -> CurrentSection, make it private, eliminate IsInTextSection. Modified: llvm/trunk/include/llvm/CodeGen/AsmPrinter.h llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp Modified: llvm/trunk/include/llvm/CodeGen/AsmPrinter.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/AsmPrinter.h?rev=78017&r1=78016&r2=78017&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/AsmPrinter.h (original) +++ llvm/trunk/include/llvm/CodeGen/AsmPrinter.h Mon Aug 3 18:20:21 2009 @@ -60,6 +60,10 @@ typedef gcp_map_type::iterator gcp_iterator; gcp_map_type GCMetadataPrinters; + /// CurrentSection - The current section we are emitting to. This is + /// controlled and used by the SwitchToSection method. + const MCSection *CurrentSection; + protected: /// MMI - If available, this is a pointer to the current MachineModuleInfo. MachineModuleInfo *MMI; @@ -110,14 +114,9 @@ /// std::string CurrentFnName; - /// CurrentSection - The current section we are emitting to. This is - /// controlled and used by the SwitchSection method. - std::string CurrentSection; - const MCSection *CurrentSection_; - - /// IsInTextSection - True if the current section we are emitting to is a - /// text section. - bool IsInTextSection; + /// getCurrentSection() - Return the current section we are emitting to. + const MCSection *getCurrentSection() const { return CurrentSection; } + /// VerboseAsm - Emit comments in assembly output if this is true. /// Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp?rev=78017&r1=78016&r2=78017&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp (original) +++ llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp Mon Aug 3 18:20:21 2009 @@ -55,8 +55,9 @@ OutContext(*new MCContext()), OutStreamer(*createAsmStreamer(OutContext, O)), - IsInTextSection(false), LastMI(0), LastFn(0), Counter(~0U), + LastMI(0), LastFn(0), Counter(~0U), PrevDLT(0, ~0U, ~0U) { + CurrentSection = 0; DW = 0; MMI = 0; switch (AsmVerbose) { case cl::BOU_UNSET: VerboseAsm = VDef; break; @@ -86,20 +87,16 @@ /// FIXME: Remove support for null sections. /// void AsmPrinter::SwitchToSection(const MCSection *NS) { - const std::string &NewSection = NS ? NS->getName() : ""; - // If we're already in this section, we're done. - if (CurrentSection == NewSection) return; + if (CurrentSection == NS) return; // Close the current section, if applicable. - if (TAI->getSectionEndDirectiveSuffix() && !CurrentSection.empty()) - O << CurrentSection << TAI->getSectionEndDirectiveSuffix() << '\n'; + if (NS != 0 && TAI->getSectionEndDirectiveSuffix()) + O << NS->getName() << TAI->getSectionEndDirectiveSuffix() << '\n'; - // FIXME: Make CurrentSection a Section* in the future - CurrentSection = NewSection; - CurrentSection_ = NS; + CurrentSection = NS; - if (!CurrentSection.empty()) { + if (NS != 0) { // If section is named we need to switch into it via special '.section' // directive and also append funky flags. Otherwise - section name is just // some magic assembler directive. @@ -109,15 +106,12 @@ getObjFileLowering().getSectionFlagsAsString(NS->getKind(), FlagsStr); O << TAI->getSwitchToSectionDirective() - << CurrentSection - << FlagsStr.c_str(); + << CurrentSection->getName() << FlagsStr.c_str(); } else { - O << CurrentSection; + O << CurrentSection->getName(); } O << TAI->getDataSectionStartSuffix() << '\n'; } - - IsInTextSection = NS ? NS->getKind().isText() : false; } void AsmPrinter::getAnalysisUsage(AnalysisUsage &AU) const { @@ -787,12 +781,11 @@ if (TAI->getAlignmentIsInBytes()) NumBits = 1 << NumBits; O << TAI->getAlignDirective() << NumBits; - unsigned FillValue = TAI->getTextAlignFillValue(); - UseFillExpr &= IsInTextSection && FillValue; - if (UseFillExpr) { - O << ','; - PrintHex(FillValue); - } + if (CurrentSection && CurrentSection->getKind().isText()) + if (unsigned FillValue = TAI->getTextAlignFillValue()) { + O << ','; + PrintHex(FillValue); + } O << '\n'; } Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp?rev=78017&r1=78016&r2=78017&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp (original) +++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp Mon Aug 3 18:20:21 2009 @@ -1463,7 +1463,7 @@ // Get function line info. if (!Lines.empty()) { // Get section line info. - unsigned ID = SectionMap.insert(Asm->CurrentSection_); + unsigned ID = SectionMap.insert(Asm->getCurrentSection()); if (SectionSourceLines.size() < ID) SectionSourceLines.resize(ID); std::vector &SectionLineInfos = SectionSourceLines[ID-1]; // Append the function info to section info. From dag at cray.com Mon Aug 3 17:05:59 2009 From: dag at cray.com (David Greene) Date: Mon, 3 Aug 2009 17:05:59 -0500 Subject: [llvm-commits] [llvm] r77740 - in /llvm/trunk: include/llvm/CodeGen/AsmPrinter.h lib/CodeGen/AsmPrinter/AsmPrinter.cpp test/CodeGen/X86/2009-04-17-tls-fast.ll test/CodeGen/X86/tls1-pic.ll test/CodeGen/X86/tls2-pic.ll test/CodeGen/X86/tls3-pic.ll test/CodeGen/X86/tls4-pic.ll utils/TableGen/AsmWriterEmitter.cpp In-Reply-To: <200908031146.20758.greened@obbligato.org> References: <200907312157.n6VLvAKm021365@zion.cs.uiuc.edu> <679A075B-43B1-4ACD-B18C-0B8C7356BA2A@apple.com> <200908031146.20758.greened@obbligato.org> Message-ID: <200908031705.59956.dag@cray.com> On Monday 03 August 2009 11:46, David A. Greene wrote: > > I'm not following what you mean here. Can you give me an example that > > shows what this does? > > Oh! This changed since the last time I looked at it. It used to be that > the tabs were embedded into the AsmStrs array and some opcodes had tabs > after them and others didn't. I see now that in X86GenAsmWriter1.inc the > asm boilerplate emits the tab after the opcode: > > O << "\t"; Oh, never mind. This is the tab to align the mnemonics. It still changed though. There used to be tabs embedded in AsmStrs. Now I don't know how they get generated. I am thoroughly confused now. :-/ -Dave From dag at cray.com Mon Aug 3 18:36:50 2009 From: dag at cray.com (David Greene) Date: Mon, 3 Aug 2009 18:36:50 -0500 Subject: [llvm-commits] [llvm] r77740 - in /llvm/trunk: include/llvm/CodeGen/AsmPrinter.h lib/CodeGen/AsmPrinter/AsmPrinter.cpp test/CodeGen/X86/2009-04-17-tls-fast.ll test/CodeGen/X86/tls1-pic.ll test/CodeGen/X86/tls2-pic.ll test/CodeGen/X86/tls3-pic.ll test/CodeGen/X86/tls4-pic.ll utils/TableGen/AsmWriterEmitter.cpp In-Reply-To: <200908031711.30871.dag@cray.com> References: <200907312157.n6VLvAKm021365@zion.cs.uiuc.edu> <200908031705.59956.dag@cray.com> <200908031711.30871.dag@cray.com> Message-ID: <200908031836.51123.dag@cray.com> On Monday 03 August 2009 17:11, David Greene wrote: > > AsmWriterEmitter no longer emits tabs into the AsmStrs because of this. So > you're right, all this ugly complexity can go away. Hmm...except this > probably doesn't work for "pd" suffixed mnemonics as I pointed out earlier. > So there's a bug here. I'll figure that out. I've got a fix for this and a cleanup to boot. Testing now, will apply probably tomorrow. -Dave From kremenek at apple.com Mon Aug 3 18:44:05 2009 From: kremenek at apple.com (Ted Kremenek) Date: Mon, 03 Aug 2009 23:44:05 -0000 Subject: [llvm-commits] [llvm] r78020 - in /llvm/trunk/lib: CodeGen/CMakeLists.txt Target/Blackfin/AsmPrinter/CMakeLists.txt Target/Blackfin/TargetInfo/CMakeLists.txt Message-ID: <200908032344.n73Ni8ia031393@zion.cs.uiuc.edu> Author: kremenek Date: Mon Aug 3 18:44:01 2009 New Revision: 78020 URL: http://llvm.org/viewvc/llvm-project?rev=78020&view=rev Log: Update CMake files. Modified: llvm/trunk/lib/CodeGen/CMakeLists.txt llvm/trunk/lib/Target/Blackfin/AsmPrinter/CMakeLists.txt llvm/trunk/lib/Target/Blackfin/TargetInfo/CMakeLists.txt Modified: llvm/trunk/lib/CodeGen/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/CMakeLists.txt?rev=78020&r1=78019&r2=78020&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/CMakeLists.txt (original) +++ llvm/trunk/lib/CodeGen/CMakeLists.txt Mon Aug 3 18:44:01 2009 @@ -2,6 +2,7 @@ BranchFolding.cpp CodePlacementOpt.cpp DeadMachineInstructionElim.cpp + Dump.cpp DwarfEHPrepare.cpp ELFCodeEmitter.cpp ELFWriter.cpp Modified: llvm/trunk/lib/Target/Blackfin/AsmPrinter/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Blackfin/AsmPrinter/CMakeLists.txt?rev=78020&r1=78019&r2=78020&view=diff ============================================================================== --- llvm/trunk/lib/Target/Blackfin/AsmPrinter/CMakeLists.txt (original) +++ llvm/trunk/lib/Target/Blackfin/AsmPrinter/CMakeLists.txt Mon Aug 3 18:44:01 2009 @@ -1,3 +1,4 @@ include_directories( ${CMAKE_CURRENT_BINARY_DIR}/.. ${CMAKE_CURRENT_SOURCE_DIR}/.. ) add_llvm_library(LLVMBlackfinAsmPrinter BlackfinAsmPrinter.cpp) + BlackfinAsmPrinter.cpp add_dependencies(LLVMBlackfinAsmPrinter BlackfinCodeGenTable_gen) Modified: llvm/trunk/lib/Target/Blackfin/TargetInfo/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Blackfin/TargetInfo/CMakeLists.txt?rev=78020&r1=78019&r2=78020&view=diff ============================================================================== --- llvm/trunk/lib/Target/Blackfin/TargetInfo/CMakeLists.txt (original) +++ llvm/trunk/lib/Target/Blackfin/TargetInfo/CMakeLists.txt Mon Aug 3 18:44:01 2009 @@ -1,3 +1,4 @@ include_directories( ${CMAKE_CURRENT_BINARY_DIR}/.. ${CMAKE_CURRENT_SOURCE_DIR}/.. ) add_llvm_library(LLVMBlackfinInfo BlackfinTargetInfo.cpp) + BlackfinTargetInfo.cpp add_dependencies(LLVMBlackfinInfo BlackfinCodeGenTable_gen) From gohman at apple.com Mon Aug 3 19:24:52 2009 From: gohman at apple.com (Dan Gohman) Date: Tue, 04 Aug 2009 00:24:52 -0000 Subject: [llvm-commits] [llvm] r78023 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Message-ID: <200908040024.n740Ounb032729@zion.cs.uiuc.edu> Author: djg Date: Mon Aug 3 19:24:42 2009 New Revision: 78023 URL: http://llvm.org/viewvc/llvm-project?rev=78023&view=rev Log: Propogate the Depth argument when calling TLI.computeMaskedBitsForTargetNode from ComputeMaskedBits, since the former may call back into the latter. This fixes a major compile time problem on a testcase that happnened to hit this in a particularly bad way, PR4643. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=78023&r1=78022&r2=78023&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Mon Aug 3 19:24:42 2009 @@ -1987,7 +1987,8 @@ case ISD::INTRINSIC_WO_CHAIN: case ISD::INTRINSIC_W_CHAIN: case ISD::INTRINSIC_VOID: - TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this); + TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this, + Depth); } return; } From bob.wilson at apple.com Mon Aug 3 19:25:02 2009 From: bob.wilson at apple.com (Bob Wilson) Date: Tue, 04 Aug 2009 00:25:02 -0000 Subject: [llvm-commits] [llvm] r78024 - /llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Message-ID: <200908040025.n740P3h9032745@zion.cs.uiuc.edu> Author: bwilson Date: Mon Aug 3 19:25:01 2009 New Revision: 78024 URL: http://llvm.org/viewvc/llvm-project?rev=78024&view=rev Log: Minor cleanup. No functional changes intended. Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=78024&r1=78023&r2=78024&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Mon Aug 3 19:25:01 2009 @@ -1320,17 +1320,16 @@ SDValue ARMTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) { - MVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); unsigned IntNo = cast(Op.getOperand(0))->getZExtValue(); DebugLoc dl = Op.getDebugLoc(); switch (IntNo) { default: return SDValue(); // Don't custom lower most intrinsics. - case Intrinsic::arm_thread_pointer: - return DAG.getNode(ARMISD::THREAD_POINTER, dl, PtrVT); + case Intrinsic::arm_thread_pointer: { + MVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); + return DAG.getNode(ARMISD::THREAD_POINTER, dl, PtrVT); + } case Intrinsic::eh_sjlj_setjmp: - SDValue Res = DAG.getNode(ARMISD::EH_SJLJ_SETJMP, dl, MVT::i32, - Op.getOperand(1)); - return Res; + return DAG.getNode(ARMISD::EH_SJLJ_SETJMP, dl, MVT::i32, Op.getOperand(1)); } } From bob.wilson at apple.com Mon Aug 3 19:36:17 2009 From: bob.wilson at apple.com (Bob Wilson) Date: Tue, 04 Aug 2009 00:36:17 -0000 Subject: [llvm-commits] [llvm] r78025 - in /llvm/trunk/lib/Target/ARM: ARMISelLowering.cpp ARMISelLowering.h ARMInstrNEON.td Message-ID: <200908040036.n740aHAn000672@zion.cs.uiuc.edu> Author: bwilson Date: Mon Aug 3 19:36:16 2009 New Revision: 78025 URL: http://llvm.org/viewvc/llvm-project?rev=78025&view=rev Log: Lower Neon VLD* intrinsics to custom DAG nodes, and manually allocate the results to fixed registers. Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp llvm/trunk/lib/Target/ARM/ARMISelLowering.h llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=78025&r1=78024&r2=78025&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Mon Aug 3 19:36:16 2009 @@ -323,6 +323,7 @@ // We want to custom lower some of our intrinsics. setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom); + setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::Other, Custom); setOperationAction(ISD::SETCC, MVT::i32, Expand); setOperationAction(ISD::SETCC, MVT::f32, Expand); @@ -463,6 +464,9 @@ case ARMISD::VGETLANEu: return "ARMISD::VGETLANEu"; case ARMISD::VGETLANEs: return "ARMISD::VGETLANEs"; case ARMISD::VDUPLANEQ: return "ARMISD::VDUPLANEQ"; + case ARMISD::VLD2D: return "ARMISD::VLD2D"; + case ARMISD::VLD3D: return "ARMISD::VLD3D"; + case ARMISD::VLD4D: return "ARMISD::VLD4D"; } } @@ -1318,6 +1322,60 @@ return DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Result, PICLabel); } +static SDValue LowerNeonVLDIntrinsic(SDValue Op, SelectionDAG &DAG, + unsigned Opcode, unsigned NumVecs) { + SDNode *Node = Op.getNode(); + MVT VT = Node->getValueType(0); + DebugLoc dl = Op.getDebugLoc(); + + if (!VT.is64BitVector()) + return SDValue(); // unimplemented + + SDValue Ops[] = { Node->getOperand(0), + Node->getOperand(1) }; + SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Flag); + SDValue Result = DAG.getNode(Opcode, dl, Tys, Ops, 2); + + static const unsigned VLDRegs[] = { + ARM::D0, ARM::D1, ARM::D2, ARM::D3 + }; + + SmallVector ResultVals; + SDValue Chain = Result.getValue(0); + SDValue Flag = Result.getValue(1); + for (unsigned N = 0; N < NumVecs; ++N) { + Chain = DAG.getCopyFromReg(Chain, dl, VLDRegs[N], VT, Flag).getValue(1); + ResultVals.push_back(Chain.getValue(0)); + Flag = Chain.getValue(2); + } + ResultVals.push_back(Chain); + return DAG.getNode(ISD::MERGE_VALUES, dl, Node->getVTList(), + ResultVals.data(), NumVecs + 1); +} + +SDValue +ARMTargetLowering::LowerINTRINSIC_W_CHAIN(SDValue Op, SelectionDAG &DAG) { + unsigned IntNo = cast(Op.getOperand(1))->getZExtValue(); + switch (IntNo) { + case Intrinsic::arm_neon_vld2i: + case Intrinsic::arm_neon_vld2f: + return LowerNeonVLDIntrinsic(Op, DAG, ARMISD::VLD2D, 2); + case Intrinsic::arm_neon_vld3i: + case Intrinsic::arm_neon_vld3f: + return LowerNeonVLDIntrinsic(Op, DAG, ARMISD::VLD3D, 3); + case Intrinsic::arm_neon_vld4i: + case Intrinsic::arm_neon_vld4f: + return LowerNeonVLDIntrinsic(Op, DAG, ARMISD::VLD4D, 4); + case Intrinsic::arm_neon_vst2i: + case Intrinsic::arm_neon_vst2f: + case Intrinsic::arm_neon_vst3i: + case Intrinsic::arm_neon_vst3f: + case Intrinsic::arm_neon_vst4i: + case Intrinsic::arm_neon_vst4f: + default: return SDValue(); // Don't custom lower most intrinsics. + } +} + SDValue ARMTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) { unsigned IntNo = cast(Op.getOperand(0))->getZExtValue(); @@ -2354,6 +2412,7 @@ case ISD::RETURNADDR: break; case ISD::FRAMEADDR: return LowerFRAMEADDR(Op, DAG); case ISD::GLOBAL_OFFSET_TABLE: return LowerGLOBAL_OFFSET_TABLE(Op, DAG); + case ISD::INTRINSIC_W_CHAIN: return LowerINTRINSIC_W_CHAIN(Op, DAG); case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG); case ISD::BIT_CONVERT: return ExpandBIT_CONVERT(Op.getNode(), DAG); case ISD::SHL: Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.h?rev=78025&r1=78024&r2=78025&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelLowering.h (original) +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.h Mon Aug 3 19:36:16 2009 @@ -114,7 +114,12 @@ VGETLANEs, // sign-extend vector extract element // Vector duplicate lane (128-bit result only; 64-bit is a shuffle) - VDUPLANEQ // splat a lane from a 64-bit vector to a 128-bit vector + VDUPLANEQ, // splat a lane from a 64-bit vector to a 128-bit vector + + // Vector load/store with (de)interleaving + VLD2D, + VLD3D, + VLD4D }; } @@ -237,6 +242,7 @@ SDNode *LowerCallResult(SDValue Chain, SDValue InFlag, CallSDNode *TheCall, unsigned CallingConv, SelectionDAG &DAG); SDValue LowerCALL(SDValue Op, SelectionDAG &DAG); + SDValue LowerINTRINSIC_W_CHAIN(SDValue Op, SelectionDAG &DAG); SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG); SDValue LowerRET(SDValue Op, SelectionDAG &DAG); SDValue LowerGlobalAddressDarwin(SDValue Op, SelectionDAG &DAG); Modified: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrNEON.td?rev=78025&r1=78024&r2=78025&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrNEON.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Mon Aug 3 19:36:16 2009 @@ -68,6 +68,14 @@ def NEONvduplaneq : SDNode<"ARMISD::VDUPLANEQ", SDTypeProfile<1, 2, [SDTCisVT<2, i32>]>>; +def SDTARMVLD : SDTypeProfile<0, 1, [SDTCisPtrTy<0>]>; +def NEONvld2d : SDNode<"ARMISD::VLD2D", SDTARMVLD, + [SDNPHasChain, SDNPOutFlag, SDNPMayLoad]>; +def NEONvld3d : SDNode<"ARMISD::VLD3D", SDTARMVLD, + [SDNPHasChain, SDNPOutFlag, SDNPMayLoad]>; +def NEONvld4d : SDNode<"ARMISD::VLD4D", SDTARMVLD, + [SDNPHasChain, SDNPOutFlag, SDNPMayLoad]>; + //===----------------------------------------------------------------------===// // NEON operand definitions //===----------------------------------------------------------------------===// From evan.cheng at apple.com Mon Aug 3 20:21:12 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 3 Aug 2009 18:21:12 -0700 Subject: [llvm-commits] [llvm] r78025 - in /llvm/trunk/lib/Target/ARM: ARMISelLowering.cpp ARMISelLowering.h ARMInstrNEON.td In-Reply-To: <200908040036.n740aHAn000672@zion.cs.uiuc.edu> References: <200908040036.n740aHAn000672@zion.cs.uiuc.edu> Message-ID: <4B0840D7-EB4A-470F-B8A3-28F7C6404010@apple.com> On Aug 3, 2009, at 5:36 PM, Bob Wilson wrote: > > > +static SDValue LowerNeonVLDIntrinsic(SDValue Op, SelectionDAG &DAG, > + unsigned Opcode, unsigned > NumVecs) { > + SDNode *Node = Op.getNode(); > + MVT VT = Node->getValueType(0); > + DebugLoc dl = Op.getDebugLoc(); > + > + if (!VT.is64BitVector()) > + return SDValue(); // unimplemented > + > + SDValue Ops[] = { Node->getOperand(0), > + Node->getOperand(1) }; > + SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Flag); > + SDValue Result = DAG.getNode(Opcode, dl, Tys, Ops, 2); > + > + static const unsigned VLDRegs[] = { > + ARM::D0, ARM::D1, ARM::D2, ARM::D3 > + }; Is this a temporary solution? Perhaps we want to do a post-isel pre- allocation pass to be a little bit smarter about what registers to pre- allocate to? Evan > + > + SmallVector ResultVals; > + SDValue Chain = Result.getValue(0); > + SDValue Flag = Result.getValue(1); > + for (unsigned N = 0; N < NumVecs; ++N) { > + Chain = DAG.getCopyFromReg(Chain, dl, VLDRegs[N], VT, > Flag).getValue(1); > + ResultVals.push_back(Chain.getValue(0)); > + Flag = Chain.getValue(2); > + } > + ResultVals.push_back(Chain); > + return DAG.getNode(ISD::MERGE_VALUES, dl, Node->getVTList(), > + ResultVals.data(), NumVecs + 1); > +} > + > +SDValue > +ARMTargetLowering::LowerINTRINSIC_W_CHAIN(SDValue Op, SelectionDAG > &DAG) { > + unsigned IntNo = cast(Op.getOperand(1))- > >getZExtValue(); > + switch (IntNo) { > + case Intrinsic::arm_neon_vld2i: > + case Intrinsic::arm_neon_vld2f: > + return LowerNeonVLDIntrinsic(Op, DAG, ARMISD::VLD2D, 2); > + case Intrinsic::arm_neon_vld3i: > + case Intrinsic::arm_neon_vld3f: > + return LowerNeonVLDIntrinsic(Op, DAG, ARMISD::VLD3D, 3); > + case Intrinsic::arm_neon_vld4i: > + case Intrinsic::arm_neon_vld4f: > + return LowerNeonVLDIntrinsic(Op, DAG, ARMISD::VLD4D, 4); > + case Intrinsic::arm_neon_vst2i: > + case Intrinsic::arm_neon_vst2f: > + case Intrinsic::arm_neon_vst3i: > + case Intrinsic::arm_neon_vst3f: > + case Intrinsic::arm_neon_vst4i: > + case Intrinsic::arm_neon_vst4f: > + default: return SDValue(); // Don't custom lower most > intrinsics. > + } > +} > + > SDValue > ARMTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG > &DAG) { > unsigned IntNo = cast(Op.getOperand(0))- > >getZExtValue(); > @@ -2354,6 +2412,7 @@ > case ISD::RETURNADDR: break; > case ISD::FRAMEADDR: return LowerFRAMEADDR(Op, DAG); > case ISD::GLOBAL_OFFSET_TABLE: return LowerGLOBAL_OFFSET_TABLE(Op, > DAG); > + case ISD::INTRINSIC_W_CHAIN: return LowerINTRINSIC_W_CHAIN(Op, > DAG); > case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, > DAG); > case ISD::BIT_CONVERT: return ExpandBIT_CONVERT(Op.getNode(), > DAG); > case ISD::SHL: > > Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.h?rev=78025&r1=78024&r2=78025&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/ARM/ARMISelLowering.h (original) > +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.h Mon Aug 3 19:36:16 > 2009 > @@ -114,7 +114,12 @@ > VGETLANEs, // sign-extend vector extract element > > // Vector duplicate lane (128-bit result only; 64-bit is a > shuffle) > - VDUPLANEQ // splat a lane from a 64-bit vector to a 128- > bit vector > + VDUPLANEQ, // splat a lane from a 64-bit vector to a 128- > bit vector > + > + // Vector load/store with (de)interleaving > + VLD2D, > + VLD3D, > + VLD4D > }; > } > > @@ -237,6 +242,7 @@ > SDNode *LowerCallResult(SDValue Chain, SDValue InFlag, > CallSDNode *TheCall, > unsigned CallingConv, SelectionDAG &DAG); > SDValue LowerCALL(SDValue Op, SelectionDAG &DAG); > + SDValue LowerINTRINSIC_W_CHAIN(SDValue Op, SelectionDAG &DAG); > SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG); > SDValue LowerRET(SDValue Op, SelectionDAG &DAG); > SDValue LowerGlobalAddressDarwin(SDValue Op, SelectionDAG &DAG); > > Modified: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrNEON.td?rev=78025&r1=78024&r2=78025&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/ARM/ARMInstrNEON.td (original) > +++ llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Mon Aug 3 19:36:16 2009 > @@ -68,6 +68,14 @@ > def NEONvduplaneq : SDNode<"ARMISD::VDUPLANEQ", > SDTypeProfile<1, 2, [SDTCisVT<2, i32>]>>; > > +def SDTARMVLD : SDTypeProfile<0, 1, [SDTCisPtrTy<0>]>; > +def NEONvld2d : SDNode<"ARMISD::VLD2D", SDTARMVLD, > + [SDNPHasChain, SDNPOutFlag, SDNPMayLoad]>; > +def NEONvld3d : SDNode<"ARMISD::VLD3D", SDTARMVLD, > + [SDNPHasChain, SDNPOutFlag, SDNPMayLoad]>; > +def NEONvld4d : SDNode<"ARMISD::VLD4D", SDTARMVLD, > + [SDNPHasChain, SDNPOutFlag, SDNPMayLoad]>; > + > // > = > = > = > ----------------------------------------------------------------------= > ==// > // NEON operand definitions > // > = > = > = > ----------------------------------------------------------------------= > ==// > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Mon Aug 3 20:41:17 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 04 Aug 2009 01:41:17 -0000 Subject: [llvm-commits] [llvm] r78030 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb2.td test/CodeGen/Thumb2/thumb2-sub.ll Message-ID: <200908040141.n741fJef002688@zion.cs.uiuc.edu> Author: evancheng Date: Mon Aug 3 20:41:15 2009 New Revision: 78030 URL: http://llvm.org/viewvc/llvm-project?rev=78030&view=rev Log: Emit sub r, #c instead of transforming it to add r, #-c if c fits in 8-bit. This is a bit of pre-mature optimization. 8-bit variant makes it likely it will be narrowed to a 16-bit instruction. Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td llvm/trunk/test/CodeGen/Thumb2/thumb2-sub.ll Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=78030&r1=78029&r2=78030&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Mon Aug 3 20:41:15 2009 @@ -83,6 +83,10 @@ return (uint32_t)(-N->getZExtValue()) < 4096; }], imm_neg_XFORM>; +def imm0_255_neg : PatLeaf<(i32 imm), [{ + return (uint32_t)(-N->getZExtValue()) < 255; +}], imm_neg_XFORM>; + /// imm0_65535 predicate - True if the 32-bit immediate is in the range /// [0.65535]. def imm0_65535 : PatLeaf<(i32 imm), [{ @@ -619,12 +623,12 @@ let mayLoad = 1 in def t2LDM : T2XI<(outs), (ins addrmode4:$addr, pred:$p, reglist:$dst1, variable_ops), - "ldm${addr:submode}${p}.w $addr, $dst1", []>; + "ldm${addr:submode}${p} $addr, $dst1", []>; let mayStore = 1 in def t2STM : T2XI<(outs), (ins addrmode4:$addr, pred:$p, reglist:$src1, variable_ops), - "stm${addr:submode}${p}.w $addr, $src1", []>; + "stm${addr:submode}${p} $addr, $src1", []>; //===----------------------------------------------------------------------===// // Move Instructions. @@ -704,6 +708,9 @@ defm t2RSBS : T2I_rbin_s_is <"rsb", BinOpFrag<(subc node:$LHS, node:$RHS)>>; // (sub X, imm) gets canonicalized to (add X, -imm). Match this form. +let AddedComplexity = 1 in +def : T2Pat<(add GPR:$src, imm0_255_neg:$imm), + (t2SUBri GPR:$src, imm0_255_neg:$imm)>; def : T2Pat<(add GPR:$src, t2_so_imm_neg:$imm), (t2SUBri GPR:$src, t2_so_imm_neg:$imm)>; def : T2Pat<(add GPR:$src, imm0_4095_neg:$imm), Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-sub.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-sub.ll?rev=78030&r1=78029&r2=78030&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-sub.ll (original) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-sub.ll Mon Aug 3 20:41:15 2009 @@ -1,31 +1,49 @@ -; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#171\\|#1179666\\|#872428544\\|#1448498774\\|#510} | count 5 +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s ; 171 = 0x000000ab define i32 @f1(i32 %a) { +; CHECK: f1: +; CHECK: sub.w r0, r0, #171 %tmp = sub i32 %a, 171 ret i32 %tmp } ; 1179666 = 0x00120012 define i32 @f2(i32 %a) { +; CHECK: f2: +; CHECK: sub.w r0, r0, #1179666 %tmp = sub i32 %a, 1179666 ret i32 %tmp } ; 872428544 = 0x34003400 define i32 @f3(i32 %a) { +; CHECK: f3: +; CHECK: sub.w r0, r0, #872428544 %tmp = sub i32 %a, 872428544 ret i32 %tmp } ; 1448498774 = 0x56565656 define i32 @f4(i32 %a) { +; CHECK: f4: +; CHECK: sub.w r0, r0, #1448498774 %tmp = sub i32 %a, 1448498774 ret i32 %tmp } ; 510 = 0x000001fe define i32 @f5(i32 %a) { +; CHECK: f5: +; CHECK: sub.w r0, r0, #510 %tmp = sub i32 %a, 510 ret i32 %tmp } + +; Don't change this to an add. +define i32 @f6(i32 %a) { +; CHECK: f6: +; CHECK: sub.w r0, r0, #1 + %tmp = sub i32 %a, 1 + ret i32 %tmp +} From evan.cheng at apple.com Mon Aug 3 20:43:46 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 04 Aug 2009 01:43:46 -0000 Subject: [llvm-commits] [llvm] r78031 - in /llvm/trunk/lib/Target/ARM: ARMLoadStoreOptimizer.cpp AsmPrinter/ARMAsmPrinter.cpp Message-ID: <200908040143.n741hkT0002792@zion.cs.uiuc.edu> Author: evancheng Date: Mon Aug 3 20:43:45 2009 New Revision: 78031 URL: http://llvm.org/viewvc/llvm-project?rev=78031&view=rev Log: Load / store multiple pass fixes for Thumb2. Not enabled yet. Modified: llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp Modified: llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp?rev=78031&r1=78030&r2=78031&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Mon Aug 3 20:43:45 2009 @@ -143,12 +143,20 @@ return 0; } +static bool isT2i32Load(unsigned Opc) { + return Opc == ARM::t2LDRi12 || Opc == ARM::t2LDRi8; +} + static bool isi32Load(unsigned Opc) { - return Opc == ARM::LDR || Opc == ARM::t2LDRi12 || Opc == ARM::t2LDRi8; + return Opc == ARM::LDR || isT2i32Load(Opc); +} + +static bool isT2i32Store(unsigned Opc) { + return Opc == ARM::t2STRi12 || Opc == ARM::t2STRi8; } static bool isi32Store(unsigned Opc) { - return Opc == ARM::STR || Opc == ARM::t2STRi12 || Opc == ARM::t2STRi8; + return Opc == ARM::STR || isT2i32Store(Opc); } /// MergeOps - Create and insert a LDM or STM with Base as base register and @@ -211,7 +219,7 @@ } bool isDPR = Opcode == ARM::FLDD || Opcode == ARM::FSTD; - bool isDef = Opcode == ARM::LDR || Opcode == ARM::FLDS || Opcode == ARM::FLDD; + bool isDef = isi32Load(Opcode) || Opcode == ARM::FLDS || Opcode == ARM::FLDD; Opcode = getLoadStoreMultipleOpcode(Opcode); MachineInstrBuilder MIB = (isAM4) ? BuildMI(MBB, MBBI, dl, TII->get(Opcode)) @@ -309,24 +317,18 @@ } static inline bool isMatchingDecrement(MachineInstr *MI, unsigned Base, - unsigned Bytes, ARMCC::CondCodes Pred, - unsigned PredReg, bool isThumb2) { + unsigned Bytes, unsigned Limit, + ARMCC::CondCodes Pred, unsigned PredReg){ unsigned MyPredReg = 0; if (!MI) return false; - if (isThumb2) { - if (MI->getOpcode() != ARM::t2SUBri) - return false; - // Make sure the offset fits in 8 bits. - if (Bytes <= 0 || Bytes >= 0x100) - return false; - } else { - if (MI->getOpcode() != ARM::SUBri) - return false; - // Make sure the offset fits in 12 bits. - if (Bytes <= 0 || Bytes >= 0x1000) - return false; - } + if (MI->getOpcode() != ARM::t2SUBri && + MI->getOpcode() != ARM::SUBri) + return false; + + // Make sure the offset fits in 8 bits. + if (Bytes <= 0 || (Limit && Bytes >= Limit)) + return false; return (MI->getOperand(0).getReg() == Base && MI->getOperand(1).getReg() == Base && @@ -336,24 +338,18 @@ } static inline bool isMatchingIncrement(MachineInstr *MI, unsigned Base, - unsigned Bytes, ARMCC::CondCodes Pred, - unsigned PredReg, bool isThumb2) { + unsigned Bytes, unsigned Limit, + ARMCC::CondCodes Pred, unsigned PredReg){ unsigned MyPredReg = 0; if (!MI) return false; - if (isThumb2) { - if (MI->getOpcode() != ARM::t2ADDri) - return false; + if (MI->getOpcode() != ARM::t2ADDri && + MI->getOpcode() != ARM::ADDri) + return false; + + if (Bytes <= 0 || (Limit && Bytes >= Limit)) // Make sure the offset fits in 8 bits. - if (Bytes <= 0 || Bytes >= 0x100) - return false; - } else { - if (MI->getOpcode() != ARM::ADDri) - return false; - // Make sure the offset fits in 12 bits. - if (Bytes <= 0 || Bytes >= 0x1000) - return false; - } + return false; return (MI->getOperand(0).getReg() == Base && MI->getOperand(1).getReg() == Base && @@ -379,6 +375,8 @@ return 8; case ARM::LDM: case ARM::STM: + case ARM::t2LDM: + case ARM::t2STM: return (MI->getNumOperands() - 4) * 4; case ARM::FLDMS: case ARM::FSTMS: @@ -428,13 +426,12 @@ if (MBBI != MBB.begin()) { MachineBasicBlock::iterator PrevMBBI = prior(MBBI); if (Mode == ARM_AM::ia && - isMatchingDecrement(PrevMBBI, Base, Bytes, Pred, PredReg, isThumb2)) { + isMatchingDecrement(PrevMBBI, Base, Bytes, 0, Pred, PredReg)) { MI->getOperand(1).setImm(ARM_AM::getAM4ModeImm(ARM_AM::db, true)); MBB.erase(PrevMBBI); return true; } else if (Mode == ARM_AM::ib && - isMatchingDecrement(PrevMBBI, Base, Bytes, Pred, PredReg, - isThumb2)) { + isMatchingDecrement(PrevMBBI, Base, Bytes, 0, Pred, PredReg)) { MI->getOperand(1).setImm(ARM_AM::getAM4ModeImm(ARM_AM::da, true)); MBB.erase(PrevMBBI); return true; @@ -444,7 +441,7 @@ if (MBBI != MBB.end()) { MachineBasicBlock::iterator NextMBBI = next(MBBI); if ((Mode == ARM_AM::ia || Mode == ARM_AM::ib) && - isMatchingIncrement(NextMBBI, Base, Bytes, Pred, PredReg, isThumb2)) { + isMatchingIncrement(NextMBBI, Base, Bytes, 0, Pred, PredReg)) { MI->getOperand(1).setImm(ARM_AM::getAM4ModeImm(Mode, true)); if (NextMBBI == I) { Advance = true; @@ -453,8 +450,7 @@ MBB.erase(NextMBBI); return true; } else if ((Mode == ARM_AM::da || Mode == ARM_AM::db) && - isMatchingDecrement(NextMBBI, Base, Bytes, Pred, PredReg, - isThumb2)) { + isMatchingDecrement(NextMBBI, Base, Bytes, 0, Pred, PredReg)) { MI->getOperand(1).setImm(ARM_AM::getAM4ModeImm(Mode, true)); if (NextMBBI == I) { Advance = true; @@ -474,7 +470,7 @@ if (MBBI != MBB.begin()) { MachineBasicBlock::iterator PrevMBBI = prior(MBBI); if (Mode == ARM_AM::ia && - isMatchingDecrement(PrevMBBI, Base, Bytes, Pred, PredReg, isThumb2)) { + isMatchingDecrement(PrevMBBI, Base, Bytes, 0, Pred, PredReg)) { MI->getOperand(1).setImm(ARM_AM::getAM5Opc(ARM_AM::db, true, Offset)); MBB.erase(PrevMBBI); return true; @@ -484,7 +480,7 @@ if (MBBI != MBB.end()) { MachineBasicBlock::iterator NextMBBI = next(MBBI); if (Mode == ARM_AM::ia && - isMatchingIncrement(NextMBBI, Base, Bytes, Pred, PredReg, isThumb2)) { + isMatchingIncrement(NextMBBI, Base, Bytes, 0, Pred, PredReg)) { MI->getOperand(1).setImm(ARM_AM::getAM5Opc(ARM_AM::ia, true, Offset)); if (NextMBBI == I) { Advance = true; @@ -550,14 +546,16 @@ unsigned Bytes = getLSMultipleTransferSize(MI); int Opcode = MI->getOpcode(); DebugLoc dl = MI->getDebugLoc(); + bool isAM5 = Opcode == ARM::FLDD || Opcode == ARM::FLDS || + Opcode == ARM::FSTD || Opcode == ARM::FSTS; bool isAM2 = Opcode == ARM::LDR || Opcode == ARM::STR; if (isAM2 && ARM_AM::getAM2Offset(MI->getOperand(3).getImm()) != 0) return false; - else if (!isAM2 && !isThumb2 && - ARM_AM::getAM5Offset(MI->getOperand(2).getImm()) != 0) - return false; - else if (isThumb2 && MI->getOperand(2).getImm() != 0) + else if (isAM5 && ARM_AM::getAM5Offset(MI->getOperand(2).getImm()) != 0) return false; + else if (isT2i32Load(Opcode) || isT2i32Store(Opcode)) + if (MI->getOperand(2).getImm() != 0) + return false; bool isLd = isi32Load(Opcode) || Opcode == ARM::FLDS || Opcode == ARM::FLDD; // Can't do the merge if the destination register is the same as the would-be @@ -570,14 +568,16 @@ bool DoMerge = false; ARM_AM::AddrOpc AddSub = ARM_AM::add; unsigned NewOpc = 0; + // AM2 - 12 bits, thumb2 - 8 bits. + unsigned Limit = isAM5 ? 0 : (isAM2 ? 0x1000 : 0x100); if (MBBI != MBB.begin()) { MachineBasicBlock::iterator PrevMBBI = prior(MBBI); - if (isMatchingDecrement(PrevMBBI, Base, Bytes, Pred, PredReg, isThumb2)) { + if (isMatchingDecrement(PrevMBBI, Base, Bytes, Limit, Pred, PredReg)) { DoMerge = true; AddSub = ARM_AM::sub; NewOpc = getPreIndexedLoadStoreOpcode(Opcode); - } else if (isAM2 && isMatchingIncrement(PrevMBBI, Base, Bytes, - Pred, PredReg, isThumb2)) { + } else if (!isAM5 && + isMatchingIncrement(PrevMBBI, Base, Bytes, Limit,Pred,PredReg)) { DoMerge = true; NewOpc = getPreIndexedLoadStoreOpcode(Opcode); } @@ -587,13 +587,12 @@ if (!DoMerge && MBBI != MBB.end()) { MachineBasicBlock::iterator NextMBBI = next(MBBI); - if (isAM2 && isMatchingDecrement(NextMBBI, Base, Bytes, Pred, PredReg, - isThumb2)) { + if (!isAM5 && + isMatchingDecrement(NextMBBI, Base, Bytes, Limit, Pred, PredReg)) { DoMerge = true; AddSub = ARM_AM::sub; NewOpc = getPostIndexedLoadStoreOpcode(Opcode); - } else if (isMatchingIncrement(NextMBBI, Base, Bytes, Pred, PredReg, - isThumb2)) { + } else if (isMatchingIncrement(NextMBBI, Base, Bytes, Limit,Pred,PredReg)) { DoMerge = true; NewOpc = getPostIndexedLoadStoreOpcode(Opcode); } @@ -610,36 +609,46 @@ return false; bool isDPR = NewOpc == ARM::FLDMD || NewOpc == ARM::FSTMD; - unsigned Offset = isAM2 - ? ARM_AM::getAM2Opc(AddSub, Bytes, ARM_AM::no_shift) - : (isThumb2 - ? Bytes - : ARM_AM::getAM5Opc((AddSub == ARM_AM::sub) ? ARM_AM::db : ARM_AM::ia, - true, isDPR ? 2 : 1)); + unsigned Offset = isAM5 + ? ARM_AM::getAM5Opc((AddSub == ARM_AM::sub) ? ARM_AM::db : ARM_AM::ia, + true, isDPR ? 2 : 1) + : (isAM2 + ? ARM_AM::getAM2Opc(AddSub, Bytes, ARM_AM::no_shift) + : Bytes); if (isLd) { - if (isAM2 || isThumb2) - // LDR_PRE, LDR_POST, t2LDR_PRE, t2LDR_POST - BuildMI(MBB, MBBI, dl, TII->get(NewOpc), MI->getOperand(0).getReg()) - .addReg(Base, RegState::Define) - .addReg(Base).addReg(0).addImm(Offset).addImm(Pred).addReg(PredReg); - else if (!isThumb2) + if (isAM5) // FLDMS, FLDMD BuildMI(MBB, MBBI, dl, TII->get(NewOpc)) .addReg(Base, getKillRegState(BaseKill)) .addImm(Offset).addImm(Pred).addReg(PredReg) .addReg(MI->getOperand(0).getReg(), RegState::Define); - } else { - MachineOperand &MO = MI->getOperand(0); - if (isAM2 || isThumb2) - // STR_PRE, STR_POST, t2STR_PRE, t2STR_POST - BuildMI(MBB, MBBI, dl, TII->get(NewOpc), Base) - .addReg(MO.getReg(), getKillRegState(MO.isKill())) + else if (isAM2) + // LDR_PRE, LDR_POST, + BuildMI(MBB, MBBI, dl, TII->get(NewOpc), MI->getOperand(0).getReg()) + .addReg(Base, RegState::Define) .addReg(Base).addReg(0).addImm(Offset).addImm(Pred).addReg(PredReg); else + // t2LDR_PRE, t2LDR_POST + BuildMI(MBB, MBBI, dl, TII->get(NewOpc), MI->getOperand(0).getReg()) + .addReg(Base, RegState::Define) + .addReg(Base).addImm(Offset).addImm(Pred).addReg(PredReg); + } else { + MachineOperand &MO = MI->getOperand(0); + if (isAM5) // FSTMS, FSTMD BuildMI(MBB, MBBI, dl, TII->get(NewOpc)).addReg(Base).addImm(Offset) .addImm(Pred).addReg(PredReg) .addReg(MO.getReg(), getKillRegState(MO.isKill())); + else if (isAM2) + // STR_PRE, STR_POST + BuildMI(MBB, MBBI, dl, TII->get(NewOpc), Base) + .addReg(MO.getReg(), getKillRegState(MO.isKill())) + .addReg(Base).addReg(0).addImm(Offset).addImm(Pred).addReg(PredReg); + else + // t2STR_PRE, t2STR_POST + BuildMI(MBB, MBBI, dl, TII->get(NewOpc), Base) + .addReg(MO.getReg(), getKillRegState(MO.isKill())) + .addReg(Base).addImm(Offset).addImm(Pred).addReg(PredReg); } MBB.erase(MBBI); @@ -1010,13 +1019,13 @@ MachineInstr *PrevMI = prior(MBBI); if (PrevMI->getOpcode() == ARM::LDM || PrevMI->getOpcode() == ARM::t2LDM) { MachineOperand &MO = PrevMI->getOperand(PrevMI->getNumOperands()-1); - if (MO.getReg() == ARM::LR) { - unsigned NewOpc = isThumb2 ? ARM::t2LDM_RET : ARM::LDM_RET; - PrevMI->setDesc(TII->get(NewOpc)); - MO.setReg(ARM::PC); - MBB.erase(MBBI); - return true; - } + if (MO.getReg() != ARM::LR) + return false; + unsigned NewOpc = isThumb2 ? ARM::t2LDM_RET : ARM::LDM_RET; + PrevMI->setDesc(TII->get(NewOpc)); + MO.setReg(ARM::PC); + MBB.erase(MBBI); + return true; } } return false; Modified: llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp?rev=78031&r1=78030&r2=78031&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp Mon Aug 3 20:43:45 2009 @@ -596,8 +596,10 @@ ARM_AM::AMSubMode Mode = ARM_AM::getAM4SubMode(MO2.getImm()); if (Modifier && strcmp(Modifier, "submode") == 0) { if (MO1.getReg() == ARM::SP) { + // FIXME bool isLDM = (MI->getOpcode() == ARM::LDM || - MI->getOpcode() == ARM::LDM_RET); + MI->getOpcode() == ARM::LDM_RET || + MI->getOpcode() == ARM::t2LDM_RET); O << ARM_AM::getAMSubModeAltStr(Mode, isLDM); } else O << ARM_AM::getAMSubModeStr(Mode); From evan.cheng at apple.com Mon Aug 3 20:56:10 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 04 Aug 2009 01:56:10 -0000 Subject: [llvm-commits] [llvm] r78032 - in /llvm/trunk/lib/Target/ARM: ARMInstrInfo.cpp ARMInstrInfo.h Message-ID: <200908040156.n741uAEb003237@zion.cs.uiuc.edu> Author: evancheng Date: Mon Aug 3 20:56:09 2009 New Revision: 78032 URL: http://llvm.org/viewvc/llvm-project?rev=78032&view=rev Log: Remove ARM specific getInlineAsmLength. We'll rely on the simpler (and faster) generic algorithm for now. If more accurate computation is needed, we'll rely on the disassembler. Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp llvm/trunk/lib/Target/ARM/ARMInstrInfo.h Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp?rev=78032&r1=78031&r2=78032&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp Mon Aug 3 20:56:09 2009 @@ -99,163 +99,3 @@ MBB.insert(I, MI); } -/// Count the number of comma-separated arguments. -/// Do not try to detect errors. -static unsigned countArguments(const char* p, - const TargetAsmInfo &TAI) { - unsigned count = 0; - while (*p && isspace(*p) && *p != '\n') - p++; - count++; - while (*p && *p!='\n' && - strncmp(p, TAI.getCommentString(), - strlen(TAI.getCommentString())) != 0) { - if (*p==',') - count++; - p++; - } - return count; -} - -/// Count the length of a string enclosed in quote characters. -/// Do not try to detect errors. -static unsigned countString(const char *p) { - unsigned count = 0; - while (*p && isspace(*p) && *p!='\n') - p++; - if (!*p || *p != '\"') - return count; - while (*++p && *p != '\"') - count++; - return count; -} - -/// ARM-specific version of TargetAsmInfo::getInlineAsmLength. -unsigned ARMInstrInfo::getInlineAsmLength(const char *s, - const TargetAsmInfo &TAI) const { - // Make a lowercase-folded version of s for counting purposes. - char *q, *s_copy = (char *)malloc(strlen(s) + 1); - strcpy(s_copy, s); - for (q=s_copy; *q; q++) - *q = tolower(*q); - const char *Str = s_copy; - - // Count the number of bytes in the asm. - bool atInsnStart = true; - bool inTextSection = true; - unsigned Length = 0; - for (; *Str; ++Str) { - if (atInsnStart) { - // Skip whitespace - while (*Str && isspace(*Str) && *Str != '\n') - Str++; - // Skip label - for (const char* p = Str; *p && !isspace(*p); p++) - if (*p == ':') { - Str = p+1; - while (*Str && isspace(*Str) && *Str != '\n') - Str++; - break; - } - - if (*Str == 0) break; - - // Ignore everything from comment char(s) to EOL - if (strncmp(Str, TAI.getCommentString(), - strlen(TAI.getCommentString())) == 0) - atInsnStart = false; - // FIXME do something like the following for non-Darwin - else if (*Str == '.' && Subtarget.isTargetDarwin()) { - // Directive. - atInsnStart = false; - - // Some change the section, but don't generate code. - if (strncmp(Str, ".literal4", strlen(".literal4"))==0 || - strncmp(Str, ".literal8", strlen(".literal8"))==0 || - strncmp(Str, ".const", strlen(".const"))==0 || - strncmp(Str, ".constructor", strlen(".constructor"))==0 || - strncmp(Str, ".cstring", strlen(".cstring"))==0 || - strncmp(Str, ".data", strlen(".data"))==0 || - strncmp(Str, ".destructor", strlen(".destructor"))==0 || - strncmp(Str, ".fvmlib_init0", strlen(".fvmlib_init0"))==0 || - strncmp(Str, ".fvmlib_init1", strlen(".fvmlib_init1"))==0 || - strncmp(Str, ".mod_init_func", strlen(".mod_init_func"))==0 || - strncmp(Str, ".mod_term_func", strlen(".mod_term_func"))==0 || - strncmp(Str, ".picsymbol_stub", strlen(".picsymbol_stub"))==0 || - strncmp(Str, ".symbol_stub", strlen(".symbol_stub"))==0 || - strncmp(Str, ".static_data", strlen(".static_data"))==0 || - strncmp(Str, ".section", strlen(".section"))==0 || - strncmp(Str, ".lazy_symbol_pointer", strlen(".lazy_symbol_pointer"))==0 || - strncmp(Str, ".non_lazy_symbol_pointer", strlen(".non_lazy_symbol_pointer"))==0 || - strncmp(Str, ".dyld", strlen(".dyld"))==0 || - strncmp(Str, ".const_data", strlen(".const_data"))==0 || - strncmp(Str, ".objc", strlen(".objc"))==0 || //// many directives - strncmp(Str, ".static_const", strlen(".static_const"))==0) - inTextSection=false; - else if (strncmp(Str, ".text", strlen(".text"))==0) - inTextSection = true; - // Some can't really be handled without implementing significant pieces - // of an assembler. Others require dynamic adjustment of block sizes in - // AdjustBBOffsetsAfter; it's a big compile-time speed hit to check every - // instruction in there, and none of these are currently used in the kernel. - else if (strncmp(Str, ".macro", strlen(".macro"))==0 || - strncmp(Str, ".if", strlen(".if"))==0 || - strncmp(Str, ".align", strlen(".align"))==0 || - strncmp(Str, ".fill", strlen(".fill"))==0 || - strncmp(Str, ".space", strlen(".space"))==0 || - strncmp(Str, ".zerofill", strlen(".zerofill"))==0 || - strncmp(Str, ".p2align", strlen(".p2align"))==0 || - strncmp(Str, ".p2alignw", strlen(".p2alignw"))==0 || - strncmp(Str, ".p2alignl", strlen(".p2alignl"))==0 || - strncmp(Str, ".align32", strlen(".p2align32"))==0 || - strncmp(Str, ".include", strlen(".include"))==0) - cerr << "Directive " << Str << " in asm may lead to invalid offsets for" << - " constant pools (the assembler will tell you if this happens).\n"; - // Some generate code, but this is only interesting in the text section. - else if (inTextSection) { - if (strncmp(Str, ".long", strlen(".long"))==0) - Length += 4*countArguments(Str+strlen(".long"), TAI); - else if (strncmp(Str, ".short", strlen(".short"))==0) - Length += 2*countArguments(Str+strlen(".short"), TAI); - else if (strncmp(Str, ".byte", strlen(".byte"))==0) - Length += 1*countArguments(Str+strlen(".byte"), TAI); - else if (strncmp(Str, ".single", strlen(".single"))==0) - Length += 4*countArguments(Str+strlen(".single"), TAI); - else if (strncmp(Str, ".double", strlen(".double"))==0) - Length += 8*countArguments(Str+strlen(".double"), TAI); - else if (strncmp(Str, ".quad", strlen(".quad"))==0) - Length += 16*countArguments(Str+strlen(".quad"), TAI); - else if (strncmp(Str, ".ascii", strlen(".ascii"))==0) - Length += countString(Str+strlen(".ascii")); - else if (strncmp(Str, ".asciz", strlen(".asciz"))==0) - Length += countString(Str+strlen(".asciz"))+1; - } - } else if (inTextSection) { - // An instruction - atInsnStart = false; - if (Subtarget.isThumb()) { // FIXME thumb2 - // BL and BLX are 4 bytes, all others 2. - if (strncmp(Str, "blx", strlen("blx"))==0) { - const char* p = Str+3; - while (*p && isspace(*p)) - p++; - if (*p == 'r' || *p=='R') - Length += 2; // BLX reg - else - Length += 4; // BLX non-reg - } else if (strncmp(Str, "bl", strlen("bl"))==0) - Length += 4; // BL - else - Length += 2; // Thumb anything else - } - else - Length += 4; // ARM - } - } - if (*Str == '\n' || *Str == TAI.getSeparatorChar()) - atInsnStart = true; - } - free(s_copy); - return Length; -} - Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.h?rev=78032&r1=78031&r2=78032&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.h (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.h Mon Aug 3 20:56:09 2009 @@ -45,9 +45,6 @@ void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, unsigned SubIdx, const MachineInstr *Orig) const; - - virtual unsigned getInlineAsmLength(const char *Str, - const TargetAsmInfo &TAI) const; }; } From sanjiv.gupta at microchip.com Mon Aug 3 21:16:45 2009 From: sanjiv.gupta at microchip.com (Sanjiv Gupta) Date: Tue, 04 Aug 2009 07:46:45 +0530 Subject: [llvm-commits] [llvm] r77974 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp In-Reply-To: <7D467673-881E-40C5-86E7-685A3E4BCFA3@apple.com> References: <200908031735.n73HZPBp018060@zion.cs.uiuc.edu> <7D467673-881E-40C5-86E7-685A3E4BCFA3@apple.com> Message-ID: <4A779A0D.8090004@microchip.com> Bob Wilson wrote: > This patch broke 3 of the ARM dejagnu tests. I've reverted it for now. > > Fine. Let me take a look at that and get back. > On Aug 3, 2009, at 10:35 AM, Sanjiv Gupta wrote: > > >> Author: sgupta >> Date: Mon Aug 3 12:35:21 2009 >> New Revision: 77974 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=77974&view=rev >> Log: >> Allow targets to custom handle softening of results or operands >> before trying the standard stuff. >> >> Modified: >> llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp >> >> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp?rev=77974&r1=77973&r2=77974&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp >> (original) >> +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp Mon >> Aug 3 12:35:21 2009 >> @@ -47,6 +47,10 @@ >> errs() << "\n"); >> SDValue R = SDValue(); >> >> + // See if the target wants to custom handle softening this result. >> + if (CustomLowerNode(N, N->getValueType(ResNo), true)) >> + return; >> + >> switch (N->getOpcode()) { >> default: >> #ifndef NDEBUG >> @@ -535,6 +539,10 @@ >> errs() << "\n"); >> SDValue Res = SDValue(); >> >> + // See if target wants to custom handle softening this operand. >> + if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false)) >> + return false; >> + >> switch (N->getOpcode()) { >> default: >> #ifndef NDEBUG >> >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >> > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From dpatel at apple.com Mon Aug 3 21:26:59 2009 From: dpatel at apple.com (Devang Patel) Date: Tue, 04 Aug 2009 02:26:59 -0000 Subject: [llvm-commits] [llvm] r78033 - in /llvm/trunk: lib/Bitcode/Writer/BitcodeWriter.cpp test/Bitcode/metadata.ll Message-ID: <200908040227.n742R09W004181@zion.cs.uiuc.edu> Author: dpatel Date: Mon Aug 3 21:26:56 2009 New Revision: 78033 URL: http://llvm.org/viewvc/llvm-project?rev=78033&view=rev Log: Constants and Metadata share ValueList. This means they must be emitted interleaved (using appropriate BLOCK_IDs) otherwise ValuePtrs index gets out of sync. Added: llvm/trunk/test/Bitcode/metadata.ll Modified: llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp Modified: llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp?rev=78033&r1=78032&r2=78033&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp (original) +++ llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp Mon Aug 3 21:26:56 2009 @@ -473,50 +473,48 @@ return Flags; } -static void WriteMDNode(const MDNode *N, +/// WriteValues - Write Constants and Metadata. +/// This function could use some refactoring help. +static void WriteValues(unsigned FirstVal, unsigned LastVal, const ValueEnumerator &VE, - BitstreamWriter &Stream, - SmallVector &Record) { - for (unsigned i = 0, e = N->getNumElements(); i != e; ++i) { - if (N->getElement(i)) { - Record.push_back(VE.getTypeID(N->getElement(i)->getType())); - Record.push_back(VE.getValueID(N->getElement(i))); - } else { - Record.push_back(VE.getTypeID(Type::VoidTy)); - Record.push_back(0); - } - } - Stream.EmitRecord(bitc::METADATA_NODE, Record, 0); - Record.clear(); -} + BitstreamWriter &Stream, bool isGlobal) { + if (FirstVal == LastVal) return; -static void WriteModuleMetadata(const ValueEnumerator &VE, - BitstreamWriter &Stream) { - const ValueEnumerator::ValueList &Vals = VE.getValues(); - bool StartedMetadataBlock = false; + // MODULE_BLOCK_ID is 0, which is not handled here. So it is OK to use + // 0 as the initializer to indicate that block is not set. + enum bitc::BlockIDs LastBlockID = bitc::MODULE_BLOCK_ID; + + unsigned AggregateAbbrev = 0; + unsigned String8Abbrev = 0; + unsigned CString7Abbrev = 0; + unsigned CString6Abbrev = 0; unsigned MDSAbbrev = 0; + SmallVector Record; - for (unsigned i = 0, e = Vals.size(); i != e; ++i) { - - if (const MDNode *N = dyn_cast(Vals[i].first)) { - if (!StartedMetadataBlock) { + + const ValueEnumerator::ValueList &Vals = VE.getValues(); + const Type *LastTy = 0; + for (unsigned i = FirstVal; i != LastVal; ++i) { + const Value *V = Vals[i].first; + if (isa(V)) { + if (LastBlockID != bitc::METADATA_BLOCK_ID) { + // Exit privious block. + if (LastBlockID != bitc::MODULE_BLOCK_ID) + Stream.ExitBlock(); + + LastBlockID = bitc::METADATA_BLOCK_ID; Stream.EnterSubblock(bitc::METADATA_BLOCK_ID, 3); - StartedMetadataBlock = true; } - WriteMDNode(N, VE, Stream, Record); - } else if (const MDString *MDS = dyn_cast(Vals[i].first)) { - if (!StartedMetadataBlock) { - Stream.EnterSubblock(bitc::METADATA_BLOCK_ID, 3); - + } + if (const MDString *MDS = dyn_cast(V)) { + if (MDSAbbrev == 0) { // Abbrev for METADATA_STRING. BitCodeAbbrev *Abbv = new BitCodeAbbrev(); Abbv->Add(BitCodeAbbrevOp(bitc::METADATA_STRING)); Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Array)); Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 8)); MDSAbbrev = Stream.EmitAbbrev(Abbv); - StartedMetadataBlock = true; } - // Code: [strchar x N] const char *StrBegin = MDS->begin(); for (unsigned i = 0, e = MDS->length(); i != e; ++i) @@ -525,12 +523,21 @@ // Emit the finished record. Stream.EmitRecord(bitc::METADATA_STRING, Record, MDSAbbrev); Record.clear(); - } else if (const NamedMDNode *NMD = dyn_cast(Vals[i].first)) { - if (!StartedMetadataBlock) { - Stream.EnterSubblock(bitc::METADATA_BLOCK_ID, 3); - StartedMetadataBlock = true; + continue; + } else if (const MDNode *N = dyn_cast(V)) { + for (unsigned i = 0, e = N->getNumElements(); i != e; ++i) { + if (N->getElement(i)) { + Record.push_back(VE.getTypeID(N->getElement(i)->getType())); + Record.push_back(VE.getValueID(N->getElement(i))); + } else { + Record.push_back(VE.getTypeID(Type::VoidTy)); + Record.push_back(0); + } } - + Stream.EmitRecord(bitc::METADATA_NODE, Record, 0); + Record.clear(); + continue; + } else if (const NamedMDNode *NMD = dyn_cast(V)) { // Write name. std::string Str = NMD->getNameStr(); const char *StrBegin = Str.c_str(); @@ -538,7 +545,7 @@ Record.push_back(StrBegin[i]); Stream.EmitRecord(bitc::METADATA_NAME, Record, 0/*TODO*/); Record.clear(); - + // Write named metadata elements. for (unsigned i = 0, e = NMD->getNumElements(); i != e; ++i) { if (NMD->getElement(i)) @@ -548,59 +555,49 @@ } Stream.EmitRecord(bitc::METADATA_NAMED_NODE, Record, 0); Record.clear(); + continue; } - } - - if (StartedMetadataBlock) - Stream.ExitBlock(); -} -static void WriteConstants(unsigned FirstVal, unsigned LastVal, - const ValueEnumerator &VE, - BitstreamWriter &Stream, bool isGlobal) { - if (FirstVal == LastVal) return; - - Stream.EnterSubblock(bitc::CONSTANTS_BLOCK_ID, 4); + // If we need to switch block, do so now. + if (LastBlockID != bitc::CONSTANTS_BLOCK_ID) { + // Exit privious block. + if (LastBlockID != bitc::MODULE_BLOCK_ID) + Stream.ExitBlock(); + + LastBlockID = bitc::CONSTANTS_BLOCK_ID; + Stream.EnterSubblock(bitc::CONSTANTS_BLOCK_ID, 4); + // If this is a constant pool for the module, emit module-specific abbrevs. + if (isGlobal) { + // Abbrev for CST_CODE_AGGREGATE. + BitCodeAbbrev *Abbv = new BitCodeAbbrev(); + Abbv->Add(BitCodeAbbrevOp(bitc::CST_CODE_AGGREGATE)); + Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Array)); + Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, Log2_32_Ceil(LastVal+1))); + AggregateAbbrev = Stream.EmitAbbrev(Abbv); + + // Abbrev for CST_CODE_STRING. + Abbv = new BitCodeAbbrev(); + Abbv->Add(BitCodeAbbrevOp(bitc::CST_CODE_STRING)); + Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Array)); + Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 8)); + String8Abbrev = Stream.EmitAbbrev(Abbv); - unsigned AggregateAbbrev = 0; - unsigned String8Abbrev = 0; - unsigned CString7Abbrev = 0; - unsigned CString6Abbrev = 0; - // If this is a constant pool for the module, emit module-specific abbrevs. - if (isGlobal) { - // Abbrev for CST_CODE_AGGREGATE. - BitCodeAbbrev *Abbv = new BitCodeAbbrev(); - Abbv->Add(BitCodeAbbrevOp(bitc::CST_CODE_AGGREGATE)); - Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Array)); - Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, Log2_32_Ceil(LastVal+1))); - AggregateAbbrev = Stream.EmitAbbrev(Abbv); + // Abbrev for CST_CODE_CSTRING. + Abbv = new BitCodeAbbrev(); + Abbv->Add(BitCodeAbbrevOp(bitc::CST_CODE_CSTRING)); + Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Array)); + Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 7)); + CString7Abbrev = Stream.EmitAbbrev(Abbv); - // Abbrev for CST_CODE_STRING. - Abbv = new BitCodeAbbrev(); - Abbv->Add(BitCodeAbbrevOp(bitc::CST_CODE_STRING)); - Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Array)); - Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 8)); - String8Abbrev = Stream.EmitAbbrev(Abbv); - // Abbrev for CST_CODE_CSTRING. - Abbv = new BitCodeAbbrev(); - Abbv->Add(BitCodeAbbrevOp(bitc::CST_CODE_CSTRING)); - Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Array)); - Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 7)); - CString7Abbrev = Stream.EmitAbbrev(Abbv); - // Abbrev for CST_CODE_CSTRING. - Abbv = new BitCodeAbbrev(); - Abbv->Add(BitCodeAbbrevOp(bitc::CST_CODE_CSTRING)); - Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Array)); - Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Char6)); - CString6Abbrev = Stream.EmitAbbrev(Abbv); - } - - SmallVector Record; + // Abbrev for CST_CODE_CSTRING. + Abbv = new BitCodeAbbrev(); + Abbv->Add(BitCodeAbbrevOp(bitc::CST_CODE_CSTRING)); + Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Array)); + Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Char6)); + CString6Abbrev = Stream.EmitAbbrev(Abbv); + } - const ValueEnumerator::ValueList &Vals = VE.getValues(); - const Type *LastTy = 0; - for (unsigned i = FirstVal; i != LastVal; ++i) { - const Value *V = Vals[i].first; + } if (isa(V)) continue; // If we need to switch types, do so now. @@ -802,7 +799,7 @@ // We know globalvalues have been emitted by WriteModuleInfo. for (unsigned i = 0, e = Vals.size(); i != e; ++i) { if (!isa(Vals[i].first)) { - WriteConstants(i, Vals.size(), VE, Stream, true); + WriteValues(i, Vals.size(), VE, Stream, true); return; } } @@ -1131,7 +1128,7 @@ // If there are function-local constants, emit them now. unsigned CstStart, CstEnd; VE.getFunctionConstantRange(CstStart, CstEnd); - WriteConstants(CstStart, CstEnd, VE, Stream, false); + WriteValues(CstStart, CstEnd, VE, Stream, false); // Keep a running idea of what the instruction ID is. unsigned InstID = CstEnd; @@ -1384,9 +1381,6 @@ // Emit constants. WriteModuleConstants(VE, Stream); - // Emit metadata. - WriteModuleMetadata(VE, Stream); - // Emit function bodies. for (Module::const_iterator I = M->begin(), E = M->end(); I != E; ++I) if (!I->isDeclaration()) @@ -1397,7 +1391,7 @@ // Emit names for globals/functions etc. WriteValueSymbolTable(M->getValueSymbolTable(), VE, Stream); - + Stream.ExitBlock(); } Added: llvm/trunk/test/Bitcode/metadata.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Bitcode/metadata.ll?rev=78033&view=auto ============================================================================== --- llvm/trunk/test/Bitcode/metadata.ll (added) +++ llvm/trunk/test/Bitcode/metadata.ll Mon Aug 3 21:26:56 2009 @@ -0,0 +1,5 @@ +; RUN: llvm-as < %s | llvm-dis -f -o /dev/null + +!llvm.foo = !{!0} +!0 = metadata !{i32 42} + at my.str = internal constant [4 x i8] c"foo\00" From dpatel at apple.com Mon Aug 3 21:36:40 2009 From: dpatel at apple.com (Devang Patel) Date: Tue, 04 Aug 2009 02:36:40 -0000 Subject: [llvm-commits] [llvm] r78034 - /llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp Message-ID: <200908040236.n742aesE004477@zion.cs.uiuc.edu> Author: dpatel Date: Mon Aug 3 21:36:39 2009 New Revision: 78034 URL: http://llvm.org/viewvc/llvm-project?rev=78034&view=rev Log: Fix MDString Abbrev setup. Modified: llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp Modified: llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp?rev=78034&r1=78033&r2=78034&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp (original) +++ llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp Mon Aug 3 21:36:39 2009 @@ -504,10 +504,6 @@ LastBlockID = bitc::METADATA_BLOCK_ID; Stream.EnterSubblock(bitc::METADATA_BLOCK_ID, 3); - } - } - if (const MDString *MDS = dyn_cast(V)) { - if (MDSAbbrev == 0) { // Abbrev for METADATA_STRING. BitCodeAbbrev *Abbv = new BitCodeAbbrev(); Abbv->Add(BitCodeAbbrevOp(bitc::METADATA_STRING)); @@ -515,6 +511,8 @@ Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 8)); MDSAbbrev = Stream.EmitAbbrev(Abbv); } + } + if (const MDString *MDS = dyn_cast(V)) { // Code: [strchar x N] const char *StrBegin = MDS->begin(); for (unsigned i = 0, e = MDS->length(); i != e; ++i) From dpatel at apple.com Mon Aug 3 21:54:15 2009 From: dpatel at apple.com (Devang Patel) Date: Tue, 04 Aug 2009 02:54:15 -0000 Subject: [llvm-commits] [llvm] r78035 - /llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp Message-ID: <200908040254.n742sFD3005039@zion.cs.uiuc.edu> Author: dpatel Date: Mon Aug 3 21:54:15 2009 New Revision: 78035 URL: http://llvm.org/viewvc/llvm-project?rev=78035&view=rev Log: Remove dead code. Modified: llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp Modified: llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp?rev=78035&r1=78034&r2=78035&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp (original) +++ llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp Mon Aug 3 21:54:15 2009 @@ -596,8 +596,6 @@ } } - if (isa(V)) - continue; // If we need to switch types, do so now. if (V->getType() != LastTy) { LastTy = V->getType(); From isanbard at gmail.com Mon Aug 3 22:17:08 2009 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 04 Aug 2009 03:17:08 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r78036 - in /llvm-gcc-4.2/trunk/gcc: llvm-backend.cpp llvm-convert.cpp tree.h varasm.c Message-ID: <200908040317.n743H9n0005692@zion.cs.uiuc.edu> Author: void Date: Mon Aug 3 22:17:06 2009 New Revision: 78036 URL: http://llvm.org/viewvc/llvm-project?rev=78036&view=rev Log: Don't adorn ObjC metadata with "\1[Ll]_". This is now done in the back-end, where it should be. Declare what used to be "\1L_OBJC_*" metadata "private" and what used to be "\1l_OBJC_" linker private. Modified: llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp llvm-gcc-4.2/trunk/gcc/tree.h llvm-gcc-4.2/trunk/gcc/varasm.c Modified: llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp?rev=78036&r1=78035&r2=78036&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Mon Aug 3 22:17:06 2009 @@ -102,6 +102,7 @@ std::vector > StaticCtors, StaticDtors; SmallSetVector AttributeUsedGlobals; +SmallSetVector AttributeCompilerUsedGlobals; std::vector AttributeAnnotateGlobals; /// PerFunctionPasses - This is the list of cleanup passes run per-function @@ -205,6 +206,11 @@ AttributeUsedGlobals.insert(New); } + if (AttributeCompilerUsedGlobals.count(Old)) { + AttributeCompilerUsedGlobals.remove(Old); + AttributeCompilerUsedGlobals.insert(New); + } + for (unsigned i = 0, e = StaticCtors.size(); i != e; ++i) { if (StaticCtors[i].first == Old) StaticCtors[i].first = New; @@ -788,6 +794,7 @@ sys::Program::ChangeStdoutToBinary(); AttributeUsedGlobals.clear(); + AttributeCompilerUsedGlobals.clear(); timevar_pop(TV_LLVM_INIT); } @@ -843,7 +850,8 @@ if (!AttributeUsedGlobals.empty()) { std::vector AUGs; const Type *SBP= PointerType::getUnqual(Type::Int8Ty); - for (SmallSetVector::iterator AI = AttributeUsedGlobals.begin(), + for (SmallSetVector::iterator + AI = AttributeUsedGlobals.begin(), AE = AttributeUsedGlobals.end(); AI != AE; ++AI) { Constant *C = *AI; AUGs.push_back(TheFolder->CreateBitCast(C, SBP)); @@ -858,6 +866,25 @@ AttributeUsedGlobals.clear(); } + if (!AttributeCompilerUsedGlobals.empty()) { + std::vector ACUGs; + const Type *SBP= PointerType::getUnqual(Type::Int8Ty); + for (SmallSetVector::iterator + AI = AttributeCompilerUsedGlobals.begin(), + AE = AttributeCompilerUsedGlobals.end(); AI != AE; ++AI) { + Constant *C = *AI; + ACUGs.push_back(TheFolder->CreateBitCast(C, SBP)); + } + + ArrayType *AT = ArrayType::get(SBP, ACUGs.size()); + Constant *Init = ConstantArray::get(AT, ACUGs); + GlobalValue *gv = new GlobalVariable(*TheModule, AT, false, + GlobalValue::AppendingLinkage, Init, + "llvm.compiler.used"); + gv->setSection("llvm.metadata"); + AttributeCompilerUsedGlobals.clear(); + } + // Add llvm.global.annotations if (!AttributeAnnotateGlobals.empty()) { Constant *Array = ConstantArray::get( @@ -1051,6 +1078,8 @@ // A weak alias has TREE_PUBLIC set but not the other bits. if (DECL_LLVM_PRIVATE(decl)) Linkage = GlobalValue::PrivateLinkage; + else if (DECL_LLVM_LINKER_PRIVATE(decl)) + Linkage = GlobalValue::LinkerPrivateLinkage; else if (DECL_WEAK(decl)) // The user may have explicitly asked for weak linkage - ignore flag_odr. Linkage = GlobalValue::WeakAnyLinkage; @@ -1317,6 +1346,9 @@ if (CODE_CONTAINS_STRUCT (TREE_CODE (decl), TS_DECL_WITH_VIS) && DECL_LLVM_PRIVATE(decl)) { Linkage = GlobalValue::PrivateLinkage; + } else if (CODE_CONTAINS_STRUCT (TREE_CODE (decl), TS_DECL_WITH_VIS) + && DECL_LLVM_LINKER_PRIVATE(decl)) { + Linkage = GlobalValue::LinkerPrivateLinkage; } else if (!TREE_PUBLIC(decl)) { Linkage = GlobalValue::InternalLinkage; } else if (DECL_WEAK(decl)) { @@ -1376,8 +1408,12 @@ } // Handle used decls - if (DECL_PRESERVE_P (decl)) - AttributeUsedGlobals.insert(GV); + if (DECL_PRESERVE_P (decl)) { + if (DECL_LLVM_PRIVATE (decl)) + AttributeUsedGlobals.insert(GV); + else if (DECL_LLVM_LINKER_PRIVATE (decl)) + AttributeCompilerUsedGlobals.insert(GV); + } // Add annotate attributes for globals if (DECL_ATTRIBUTES(decl)) Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=78036&r1=78035&r2=78036&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Mon Aug 3 22:17:06 2009 @@ -474,6 +474,8 @@ // Compute the linkage that the function should get. if (DECL_LLVM_PRIVATE(FnDecl)) { Fn->setLinkage(Function::PrivateLinkage); + } else if (DECL_LLVM_LINKER_PRIVATE(FnDecl)) { + Fn->setLinkage(Function::LinkerPrivateLinkage); } else if (!TREE_PUBLIC(FnDecl) /*|| lang_hooks.llvm_is_in_anon(subr)*/) { Fn->setLinkage(Function::InternalLinkage); } else if (DECL_COMDAT(FnDecl)) { @@ -1995,21 +1997,21 @@ // what exception is being unwound, append a catch-all. // The representation of a catch-all is language specific. - Value *Catch_All; + Value *CatchAll; if (!lang_eh_catch_all) { // Use a "cleanup" - this should be good enough for most languages. - Catch_All = ConstantInt::get(Type::Int32Ty, 0); + CatchAll = ConstantInt::get(Type::Int32Ty, 0); } else { tree catch_all_type = lang_eh_catch_all(); if (catch_all_type == NULL_TREE) // Use a C++ style null catch-all object. - Catch_All = Constant::getNullValue( + CatchAll = Constant::getNullValue( PointerType::getUnqual(Type::Int8Ty)); else // This language has a type that catches all others. - Catch_All = Emit(catch_all_type, 0); + CatchAll = Emit(catch_all_type, 0); } - Args.push_back(Catch_All); + Args.push_back(CatchAll); } // Emit the selector call. Modified: llvm-gcc-4.2/trunk/gcc/tree.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/tree.h?rev=78036&r1=78035&r2=78036&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/tree.h (original) +++ llvm-gcc-4.2/trunk/gcc/tree.h Mon Aug 3 22:17:06 2009 @@ -2927,6 +2927,8 @@ #ifdef ENABLE_LLVM #define DECL_LLVM_PRIVATE(NODE) \ (DECL_WITH_VIS_CHECK (NODE)->decl_with_vis.llvm_private_flag) +#define DECL_LLVM_LINKER_PRIVATE(NODE) \ + (DECL_WITH_VIS_CHECK (NODE)->decl_with_vis.llvm_linker_private_flag) #endif /* LLVM LOCAL end */ @@ -3069,6 +3071,7 @@ /* LLVM LOCAL begin */ unsigned llvm_private_flag : 1; + unsigned llvm_linker_private_flag : 1; /* LLVM LOCAL end */ ENUM_BITFIELD(symbol_visibility) visibility : 2; @@ -3091,7 +3094,7 @@ unsigned block_synthesized_function : 1; /* APPLE LOCAL radar 5847976 */ unsigned block_weak : 1; - /* 4 unused bits (llvm). */ + /* 3 unused bits (llvm). */ /* APPLE LOCAL end radar 5932809 - copyable byref blocks */ /* APPLE LOCAL end radar 5732232 - blocks */ }; Modified: llvm-gcc-4.2/trunk/gcc/varasm.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/varasm.c?rev=78036&r1=78035&r2=78036&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/varasm.c (original) +++ llvm-gcc-4.2/trunk/gcc/varasm.c Mon Aug 3 22:17:06 2009 @@ -755,23 +755,45 @@ void set_user_assembler_name (tree decl, const char *name) { - char *starred = alloca (strlen (name) + 2); + size_t len = strlen (name); + char *starred = alloca (len + 2); /* LLVM LOCAL begin */ #ifndef ENABLE_LLVM starred[0] = '*'; strcpy (starred + 1, name); #else - /* If the name isn't an LLVM intrinsic, add a starting '\1' character to - * indicate that the target assembler shouldn't modify the name. If it *is* - * an LLVM intrinsic name, just set the name, to support code like this: - * unsigned bswap(unsigned) __asm__("llvm.bswap"); - */ - if (name[0] != 'l' || name[1] != 'l' || name[2] != 'v' || name[3] != 'm' - || name[4] != '.') { - starred[0] = 1; - strcpy (starred + 1, name); - } else { - strcpy (starred, name); + { + /* If the name isn't an LLVM intrinsic, add a starting '\1' character to + indicate that the target assembler shouldn't modify the name. If it *is* + an LLVM intrinsic name, just set the name, to support code like this: + unsigned bswap(unsigned) __asm__("llvm.bswap"); */ + bool has_llvm_prefix = + (len > 5 && name[0] == 'l' && name[1] == 'l' && name[2] == 'v' && + name[3] == 'm' && name[4] == '.'); + + /* If the name is an OBJC metadata name, then don't prepend a '\1' character + to it. Instead, mark it as either "private" or "linker private". */ + bool has_objc_prefix = + (len > 7 && (name[0] == 'l' || name[0] == 'L') && name[1] == '_' && + ((name[2] == 'O' && name[3] == 'B' && name[4] == 'J' && name[5] == 'C') || + (name[2] == 'o' && name[3] == 'b' && name[4] == 'j' && name[5] == 'c')) && + name[6] == '_'); + + if (!has_llvm_prefix && !has_objc_prefix) { + starred[0] = 1; + strcpy (starred + 1, name); + } else { + strcpy (starred, name); + + if (has_objc_prefix) { + DECL_LLVM_PRIVATE (decl) = (name[0] == 'L'); + DECL_LLVM_LINKER_PRIVATE (decl) = (name[0] == 'l'); + + /* Remove the "[Ll]_" prefix. The LLVM assembly printer is now + intelligent enough to add the appropriate prefix to the name. */ + strcpy (starred, &name[2]); + } + } } #endif /* LLVM LOCAL end */ From eocallaghan at auroraux.org Mon Aug 3 22:30:18 2009 From: eocallaghan at auroraux.org (Edward O'Callaghan) Date: Tue, 04 Aug 2009 03:30:18 -0000 Subject: [llvm-commits] [compiler-rt] r78037 - in /compiler-rt/trunk/lib: divdc3.c divsc3.c divxc3.c int_lib.h muldc3.c mulsc3.c mulxc3.c Message-ID: <200908040330.n743UJgt006096@zion.cs.uiuc.edu> Author: evocallaghan Date: Mon Aug 3 22:30:10 2009 New Revision: 78037 URL: http://llvm.org/viewvc/llvm-project?rev=78037&view=rev Log: Refactor out common pre-processor code. Modified: compiler-rt/trunk/lib/divdc3.c compiler-rt/trunk/lib/divsc3.c compiler-rt/trunk/lib/divxc3.c compiler-rt/trunk/lib/int_lib.h compiler-rt/trunk/lib/muldc3.c compiler-rt/trunk/lib/mulsc3.c compiler-rt/trunk/lib/mulxc3.c Modified: compiler-rt/trunk/lib/divdc3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/divdc3.c?rev=78037&r1=78036&r2=78037&view=diff ============================================================================== --- compiler-rt/trunk/lib/divdc3.c (original) +++ compiler-rt/trunk/lib/divdc3.c Mon Aug 3 22:30:10 2009 @@ -15,10 +15,6 @@ #include #include -#if !defined(INFINITY) && defined(HUGE_VAL) -#define INFINITY HUGE_VAL -#endif - // Returns: the quotient of (a + ib) / (c + id) double _Complex Modified: compiler-rt/trunk/lib/divsc3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/divsc3.c?rev=78037&r1=78036&r2=78037&view=diff ============================================================================== --- compiler-rt/trunk/lib/divsc3.c (original) +++ compiler-rt/trunk/lib/divsc3.c Mon Aug 3 22:30:10 2009 @@ -15,10 +15,6 @@ #include #include -#if !defined(INFINITY) && defined(HUGE_VAL) -#define INFINITY HUGE_VAL -#endif - // Returns: the quotient of (a + ib) / (c + id) float _Complex Modified: compiler-rt/trunk/lib/divxc3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/divxc3.c?rev=78037&r1=78036&r2=78037&view=diff ============================================================================== --- compiler-rt/trunk/lib/divxc3.c (original) +++ compiler-rt/trunk/lib/divxc3.c Mon Aug 3 22:30:10 2009 @@ -17,10 +17,6 @@ #include #include -#if !defined(INFINITY) && defined(HUGE_VAL) -#define INFINITY HUGE_VAL -#endif - // Returns: the quotient of (a + ib) / (c + id) long double _Complex Modified: compiler-rt/trunk/lib/int_lib.h URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/int_lib.h?rev=78037&r1=78036&r2=78037&view=diff ============================================================================== --- compiler-rt/trunk/lib/int_lib.h (original) +++ compiler-rt/trunk/lib/int_lib.h Mon Aug 3 22:30:10 2009 @@ -19,6 +19,11 @@ // Assumption: right shift of signed negative is arithmetic shift #include +#include + +#if !defined(INFINITY) && defined(HUGE_VAL) +#define INFINITY HUGE_VAL +#endif // TODO: Improve this to minimal pre-processor hackish'ness. #if defined (__SVR4) && defined (__sun) Modified: compiler-rt/trunk/lib/muldc3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/muldc3.c?rev=78037&r1=78036&r2=78037&view=diff ============================================================================== --- compiler-rt/trunk/lib/muldc3.c (original) +++ compiler-rt/trunk/lib/muldc3.c Mon Aug 3 22:30:10 2009 @@ -15,10 +15,6 @@ #include #include -#if !defined(INFINITY) && defined(HUGE_VAL) -#define INFINITY HUGE_VAL -#endif - // Returns: the product of a + ib and c + id double _Complex Modified: compiler-rt/trunk/lib/mulsc3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/mulsc3.c?rev=78037&r1=78036&r2=78037&view=diff ============================================================================== --- compiler-rt/trunk/lib/mulsc3.c (original) +++ compiler-rt/trunk/lib/mulsc3.c Mon Aug 3 22:30:10 2009 @@ -15,10 +15,6 @@ #include #include -#if !defined(INFINITY) && defined(HUGE_VAL) -#define INFINITY HUGE_VAL -#endif - // Returns: the product of a + ib and c + id float _Complex Modified: compiler-rt/trunk/lib/mulxc3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/mulxc3.c?rev=78037&r1=78036&r2=78037&view=diff ============================================================================== --- compiler-rt/trunk/lib/mulxc3.c (original) +++ compiler-rt/trunk/lib/mulxc3.c Mon Aug 3 22:30:10 2009 @@ -17,10 +17,6 @@ #include #include -#if !defined(INFINITY) && defined(HUGE_VAL) -#define INFINITY HUGE_VAL -#endif - // Returns: the product of a + ib and c + id long double _Complex From isanbard at gmail.com Mon Aug 3 22:40:55 2009 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 04 Aug 2009 03:40:55 -0000 Subject: [llvm-commits] [llvm] r78038 - /llvm/trunk/test/FrontendC/2005-12-04-AttributeUsed.c Message-ID: <200908040340.n743euGh006397@zion.cs.uiuc.edu> Author: void Date: Mon Aug 3 22:40:47 2009 New Revision: 78038 URL: http://llvm.org/viewvc/llvm-project?rev=78038&view=rev Log: XFAIL for the moment. Modified: llvm/trunk/test/FrontendC/2005-12-04-AttributeUsed.c Modified: llvm/trunk/test/FrontendC/2005-12-04-AttributeUsed.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2005-12-04-AttributeUsed.c?rev=78038&r1=78037&r2=78038&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2005-12-04-AttributeUsed.c (original) +++ llvm/trunk/test/FrontendC/2005-12-04-AttributeUsed.c Mon Aug 3 22:40:47 2009 @@ -1,5 +1,7 @@ // RUN: %llvmgcc %s -S -emit-llvm -o - | llvm-as | llvm-dis | \ // RUN: grep llvm.used | grep foo | grep X +// FIXME - Unxfail this when I know what's going on. +// XFAIL: * int X __attribute__((used)); int Y; From rafael.espindola at gmail.com Mon Aug 3 22:43:46 2009 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Tue, 04 Aug 2009 03:43:46 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r78039 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Message-ID: <200908040343.n743hlGk006477@zion.cs.uiuc.edu> Author: rafael Date: Mon Aug 3 22:43:38 2009 New Revision: 78039 URL: http://llvm.org/viewvc/llvm-project?rev=78039&view=rev Log: In C++, produce a varargs function for "T foo(...)". Fixes PR 4678 Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=78039&r1=78038&r2=78039&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Mon Aug 3 22:43:38 2009 @@ -415,7 +415,11 @@ // allows C functions declared as "T foo() {}" to be treated like // "T foo(void) {}" and allows us to handle functions with K&R-style // definitions correctly. - if (TYPE_ARG_TYPES(TREE_TYPE(FnDecl)) == 0) { + // Don't do this for c++. In c++ "T foo() {}" is not varargs and + // if the user typed "T foo(...)", he probably wants a varargs + // function. This also avoids a warning in instcombine. See + // llvm.org/PR4678 + if (TYPE_ARG_TYPES(TREE_TYPE(FnDecl)) == 0 && !c_dialect_cxx()) { FTy = TheTypeConverter->ConvertArgListToFnType(TREE_TYPE(FnDecl), DECL_ARGUMENTS(FnDecl), static_chain, From rafael.espindola at gmail.com Mon Aug 3 22:44:38 2009 From: rafael.espindola at gmail.com (Rafael Espindola) Date: Tue, 04 Aug 2009 03:44:38 -0000 Subject: [llvm-commits] [llvm] r78040 - /llvm/trunk/test/FrontendC++/2009-08-03-Varargs.cpp Message-ID: <200908040344.n743idUR006512@zion.cs.uiuc.edu> Author: rafael Date: Mon Aug 3 22:44:37 2009 New Revision: 78040 URL: http://llvm.org/viewvc/llvm-project?rev=78040&view=rev Log: Add test for PR4678 Added: llvm/trunk/test/FrontendC++/2009-08-03-Varargs.cpp Added: llvm/trunk/test/FrontendC++/2009-08-03-Varargs.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC%2B%2B/2009-08-03-Varargs.cpp?rev=78040&view=auto ============================================================================== --- llvm/trunk/test/FrontendC++/2009-08-03-Varargs.cpp (added) +++ llvm/trunk/test/FrontendC++/2009-08-03-Varargs.cpp Mon Aug 3 22:44:37 2009 @@ -0,0 +1,4 @@ +// RUN: %llvmgxx %s -S -emit-llvm -o - | grep _Z1az\(\.\.\.\) +// PR4678 +void a(...) { +} From isanbard at gmail.com Mon Aug 3 22:46:35 2009 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 04 Aug 2009 03:46:35 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r78041 - /llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Message-ID: <200908040346.n743kZMN006596@zion.cs.uiuc.edu> Author: void Date: Mon Aug 3 22:46:34 2009 New Revision: 78041 URL: http://llvm.org/viewvc/llvm-project?rev=78041&view=rev Log: Oh yeah. Not everything that is "preserved" is LLVM_PRIVATE. . . Modified: llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp?rev=78041&r1=78040&r2=78041&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Mon Aug 3 22:46:34 2009 @@ -1409,10 +1409,10 @@ // Handle used decls if (DECL_PRESERVE_P (decl)) { - if (DECL_LLVM_PRIVATE (decl)) - AttributeUsedGlobals.insert(GV); - else if (DECL_LLVM_LINKER_PRIVATE (decl)) + if (DECL_LLVM_LINKER_PRIVATE (decl)) AttributeCompilerUsedGlobals.insert(GV); + else + AttributeUsedGlobals.insert(GV); } // Add annotate attributes for globals From isanbard at gmail.com Mon Aug 3 22:46:54 2009 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 04 Aug 2009 03:46:54 -0000 Subject: [llvm-commits] [llvm] r78042 - /llvm/trunk/test/FrontendC/2005-12-04-AttributeUsed.c Message-ID: <200908040346.n743kt1P006615@zion.cs.uiuc.edu> Author: void Date: Mon Aug 3 22:46:54 2009 New Revision: 78042 URL: http://llvm.org/viewvc/llvm-project?rev=78042&view=rev Log: Fixed now. Modified: llvm/trunk/test/FrontendC/2005-12-04-AttributeUsed.c Modified: llvm/trunk/test/FrontendC/2005-12-04-AttributeUsed.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2005-12-04-AttributeUsed.c?rev=78042&r1=78041&r2=78042&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2005-12-04-AttributeUsed.c (original) +++ llvm/trunk/test/FrontendC/2005-12-04-AttributeUsed.c Mon Aug 3 22:46:54 2009 @@ -1,7 +1,5 @@ // RUN: %llvmgcc %s -S -emit-llvm -o - | llvm-as | llvm-dis | \ // RUN: grep llvm.used | grep foo | grep X -// FIXME - Unxfail this when I know what's going on. -// XFAIL: * int X __attribute__((used)); int Y; From daniel at zuster.org Mon Aug 3 23:02:48 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Tue, 04 Aug 2009 04:02:48 -0000 Subject: [llvm-commits] [llvm] r78043 - in /llvm/trunk: include/llvm/Target/TargetRegistry.h lib/Target/CBackend/CBackend.cpp lib/Target/CBackend/CTargetMachine.h lib/Target/CppBackend/CPPBackend.cpp lib/Target/CppBackend/CPPTargetMachine.h lib/Target/MSIL/MSILWriter.cpp Message-ID: <200908040402.n7442rxF007097@zion.cs.uiuc.edu> Author: ddunbar Date: Mon Aug 3 23:02:45 2009 New Revision: 78043 URL: http://llvm.org/viewvc/llvm-project?rev=78043&view=rev Log: Remove now unused Module argument to createTargetMachine. Modified: llvm/trunk/include/llvm/Target/TargetRegistry.h llvm/trunk/lib/Target/CBackend/CBackend.cpp llvm/trunk/lib/Target/CBackend/CTargetMachine.h llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp llvm/trunk/lib/Target/CppBackend/CPPTargetMachine.h llvm/trunk/lib/Target/MSIL/MSILWriter.cpp Modified: llvm/trunk/include/llvm/Target/TargetRegistry.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetRegistry.h?rev=78043&r1=78042&r2=78043&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetRegistry.h (original) +++ llvm/trunk/include/llvm/Target/TargetRegistry.h Mon Aug 3 23:02:45 2009 @@ -23,9 +23,6 @@ // FIXME: We shouldn't need this header, but we need it until there is a // different interface to get the TargetAsmInfo. #include "llvm/Target/TargetMachine.h" -// FIXME: We shouldn't need this header, but we need it until there is a -// different interface to the target machines. -#include "llvm/Module.h" #include #include @@ -50,7 +47,6 @@ typedef unsigned (*TripleMatchQualityFnTy)(const std::string &TT); typedef TargetMachine *(*TargetMachineCtorTy)(const Target &, - const Module &, const std::string &, const std::string &); typedef FunctionPass *(*AsmPrinterCtorTy)(formatted_raw_ostream &, @@ -120,12 +116,16 @@ /// feature set; it should always be provided. Generally this should be /// either the target triple from the module, or the target triple of the /// host if that does not exist. - TargetMachine *createTargetMachine(const Module &M, - const std::string &Triple, + TargetMachine *createTargetMachine(const std::string &Triple, const std::string &Features) const { if (!TargetMachineCtorFn) return 0; - return TargetMachineCtorFn(*this, M, Triple, Features); + return TargetMachineCtorFn(*this, Triple, Features); + } + TargetMachine *createTargetMachine(const Module &M, + const std::string &Triple, + const std::string &Features) const { + return createTargetMachine(Triple, Features); } /// createAsmPrinter - Create a target specific assembly printer pass. @@ -149,8 +149,6 @@ }; /// TargetRegistry - Generic interface to target specific features. - // - // FIXME: Provide Target* iterator. struct TargetRegistry { class iterator { const Target *Current; @@ -327,27 +325,12 @@ } private: - static TargetMachine *Allocator(const Target &T, const Module &M, - const std::string &TT, + static TargetMachine *Allocator(const Target &T, const std::string &TT, const std::string &FS) { return new TargetMachineImpl(T, TT, FS); } }; - template - struct RegisterTargetMachineDeprecated { - RegisterTargetMachineDeprecated(Target &T) { - TargetRegistry::RegisterTargetMachine(T, &Allocator); - } - - private: - static TargetMachine *Allocator(const Target &T, const Module &M, - const std::string &TT, - const std::string &FS) { - return new TargetMachineImpl(T, M, FS); - } - }; - /// RegisterAsmPrinter - Helper template for registering a target specific /// assembly printer, for use in the target machine initialization /// function. Usage: Modified: llvm/trunk/lib/Target/CBackend/CBackend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CBackend/CBackend.cpp?rev=78043&r1=78042&r2=78043&view=diff ============================================================================== --- llvm/trunk/lib/Target/CBackend/CBackend.cpp (original) +++ llvm/trunk/lib/Target/CBackend/CBackend.cpp Mon Aug 3 23:02:45 2009 @@ -51,7 +51,7 @@ extern "C" void LLVMInitializeCBackendTarget() { // Register the target. - RegisterTargetMachineDeprecated X(TheCBackendTarget); + RegisterTargetMachine X(TheCBackendTarget); } namespace { Modified: llvm/trunk/lib/Target/CBackend/CTargetMachine.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CBackend/CTargetMachine.h?rev=78043&r1=78042&r2=78043&view=diff ============================================================================== --- llvm/trunk/lib/Target/CBackend/CTargetMachine.h (original) +++ llvm/trunk/lib/Target/CBackend/CTargetMachine.h Mon Aug 3 23:02:45 2009 @@ -20,11 +20,8 @@ namespace llvm { struct CTargetMachine : public TargetMachine { - const TargetData DataLayout; // Calculates type size & alignment - - CTargetMachine(const Target &T, const Module &M, - const std::string &FS) - : TargetMachine(T), DataLayout(&M) {} + CTargetMachine(const Target &T, const std::string &TT, const std::string &FS) + : TargetMachine(T) {} virtual bool WantsWholeFile() const { return true; } virtual bool addPassesToEmitWholeFile(PassManager &PM, Modified: llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp?rev=78043&r1=78042&r2=78043&view=diff ============================================================================== --- llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp (original) +++ llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp Mon Aug 3 23:02:45 2009 @@ -74,7 +74,7 @@ extern "C" void LLVMInitializeCppBackendTarget() { // Register the target. - RegisterTargetMachineDeprecated X(TheCppBackendTarget); + RegisterTargetMachine X(TheCppBackendTarget); } namespace { Modified: llvm/trunk/lib/Target/CppBackend/CPPTargetMachine.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CppBackend/CPPTargetMachine.h?rev=78043&r1=78042&r2=78043&view=diff ============================================================================== --- llvm/trunk/lib/Target/CppBackend/CPPTargetMachine.h (original) +++ llvm/trunk/lib/Target/CppBackend/CPPTargetMachine.h Mon Aug 3 23:02:45 2009 @@ -22,11 +22,9 @@ class formatted_raw_ostream; struct CPPTargetMachine : public TargetMachine { - const TargetData DataLayout; // Calculates type size & alignment - - CPPTargetMachine(const Target &T, const Module &M, + CPPTargetMachine(const Target &T, const std::string &TT, const std::string &FS) - : TargetMachine(T), DataLayout(&M) {} + : TargetMachine(T) {} virtual bool WantsWholeFile() const { return true; } virtual bool addPassesToEmitWholeFile(PassManager &PM, Modified: llvm/trunk/lib/Target/MSIL/MSILWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSIL/MSILWriter.cpp?rev=78043&r1=78042&r2=78043&view=diff ============================================================================== --- llvm/trunk/lib/Target/MSIL/MSILWriter.cpp (original) +++ llvm/trunk/lib/Target/MSIL/MSILWriter.cpp Mon Aug 3 23:02:45 2009 @@ -31,10 +31,8 @@ namespace llvm { // TargetMachine for the MSIL struct VISIBILITY_HIDDEN MSILTarget : public TargetMachine { - const TargetData DataLayout; // Calculates type size & alignment - - MSILTarget(const Target &T, const Module &M, const std::string &FS) - : TargetMachine(T), DataLayout(&M) {} + MSILTarget(const Target &T, const std::string &TT, const std::string &FS) + : TargetMachine(T) {} virtual bool WantsWholeFile() const { return true; } virtual bool addPassesToEmitWholeFile(PassManager &PM, @@ -48,7 +46,7 @@ extern "C" void LLVMInitializeMSILTarget() { // Register the target. - RegisterTargetMachineDeprecated X(TheMSILTarget); + RegisterTargetMachine X(TheMSILTarget); } bool MSILModule::runOnModule(Module &M) { From daniel at zuster.org Mon Aug 3 23:04:04 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Tue, 04 Aug 2009 04:04:04 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r78045 - /llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Message-ID: <200908040404.n74445wk007161@zion.cs.uiuc.edu> Author: ddunbar Date: Mon Aug 3 23:04:04 2009 New Revision: 78045 URL: http://llvm.org/viewvc/llvm-project?rev=78045&view=rev Log: Update for LLVM API change Modified: llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp?rev=78045&r1=78044&r2=78045&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Mon Aug 3 23:04:04 2009 @@ -474,7 +474,7 @@ LLVM_SET_SUBTARGET_FEATURES(Features); FeatureStr = Features.getString(); #endif - TheTarget = TME->createTargetMachine(*TheModule, Triple, FeatureStr); + TheTarget = TME->createTargetMachine(Triple, FeatureStr); assert(TheTarget->getTargetData()->isBigEndian() == BYTES_BIG_ENDIAN); TheFolder = new TargetFolder(TheTarget->getTargetData(), getGlobalContext()); From daniel at zuster.org Mon Aug 3 23:04:25 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Tue, 04 Aug 2009 04:04:25 -0000 Subject: [llvm-commits] [llvm] r78046 - /llvm/trunk/include/llvm/Target/TargetRegistry.h Message-ID: <200908040404.n7444Pug007181@zion.cs.uiuc.edu> Author: ddunbar Date: Mon Aug 3 23:04:25 2009 New Revision: 78046 URL: http://llvm.org/viewvc/llvm-project?rev=78046&view=rev Log: Remove unused function. Modified: llvm/trunk/include/llvm/Target/TargetRegistry.h Modified: llvm/trunk/include/llvm/Target/TargetRegistry.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetRegistry.h?rev=78046&r1=78045&r2=78046&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetRegistry.h (original) +++ llvm/trunk/include/llvm/Target/TargetRegistry.h Mon Aug 3 23:04:25 2009 @@ -122,11 +122,6 @@ return 0; return TargetMachineCtorFn(*this, Triple, Features); } - TargetMachine *createTargetMachine(const Module &M, - const std::string &Triple, - const std::string &Features) const { - return createTargetMachine(Triple, Features); - } /// createAsmPrinter - Create a target specific assembly printer pass. FunctionPass *createAsmPrinter(formatted_raw_ostream &OS, From daniel at zuster.org Mon Aug 3 23:08:40 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Tue, 04 Aug 2009 04:08:40 -0000 Subject: [llvm-commits] [llvm] r78047 - in /llvm/trunk: lib/ExecutionEngine/JIT/TargetSelect.cpp lib/Target/CBackend/CBackend.cpp tools/llc/llc.cpp tools/lto/LTOCodeGenerator.cpp tools/lto/LTOModule.cpp Message-ID: <200908040408.n7448eSw007338@zion.cs.uiuc.edu> Author: ddunbar Date: Mon Aug 3 23:08:40 2009 New Revision: 78047 URL: http://llvm.org/viewvc/llvm-project?rev=78047&view=rev Log: No really, it's unused. Modified: llvm/trunk/lib/ExecutionEngine/JIT/TargetSelect.cpp llvm/trunk/lib/Target/CBackend/CBackend.cpp llvm/trunk/tools/llc/llc.cpp llvm/trunk/tools/lto/LTOCodeGenerator.cpp llvm/trunk/tools/lto/LTOModule.cpp Modified: llvm/trunk/lib/ExecutionEngine/JIT/TargetSelect.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/JIT/TargetSelect.cpp?rev=78047&r1=78046&r2=78047&view=diff ============================================================================== --- llvm/trunk/lib/ExecutionEngine/JIT/TargetSelect.cpp (original) +++ llvm/trunk/lib/ExecutionEngine/JIT/TargetSelect.cpp Mon Aug 3 23:08:40 2009 @@ -76,8 +76,7 @@ // Allocate a target... TargetMachine *Target = - TheTarget->createTargetMachine(*MP->getModule(), TheTriple.getTriple(), - FeaturesStr); + TheTarget->createTargetMachine(TheTriple.getTriple(), FeaturesStr); assert(Target && "Could not allocate target machine!"); return Target; } Modified: llvm/trunk/lib/Target/CBackend/CBackend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CBackend/CBackend.cpp?rev=78047&r1=78046&r2=78047&view=diff ============================================================================== --- llvm/trunk/lib/Target/CBackend/CBackend.cpp (original) +++ llvm/trunk/lib/Target/CBackend/CBackend.cpp Mon Aug 3 23:08:40 2009 @@ -3190,8 +3190,7 @@ if (Match) { // Per platform Target Machines don't exist, so create it; // this must be done only once. - const TargetMachine* TM = Match->createTargetMachine(*TheModule, Triple, - ""); + const TargetMachine* TM = Match->createTargetMachine(Triple, ""); TAsm = TM->getTargetAsmInfo(); } } Modified: llvm/trunk/tools/llc/llc.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llc/llc.cpp?rev=78047&r1=78046&r2=78047&view=diff ============================================================================== --- llvm/trunk/tools/llc/llc.cpp (original) +++ llvm/trunk/tools/llc/llc.cpp Mon Aug 3 23:08:40 2009 @@ -285,8 +285,7 @@ } std::auto_ptr - target(TheTarget->createTargetMachine(mod, TheTriple.getTriple(), - FeaturesStr)); + target(TheTarget->createTargetMachine(TheTriple.getTriple(), FeaturesStr)); assert(target.get() && "Could not allocate target machine!"); TargetMachine &Target = *target.get(); Modified: llvm/trunk/tools/lto/LTOCodeGenerator.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto/LTOCodeGenerator.cpp?rev=78047&r1=78046&r2=78047&view=diff ============================================================================== --- llvm/trunk/tools/lto/LTOCodeGenerator.cpp (original) +++ llvm/trunk/tools/lto/LTOCodeGenerator.cpp Mon Aug 3 23:08:40 2009 @@ -322,7 +322,6 @@ Triple = sys::getHostTriple(); // create target machine from info for merged modules - Module* mergedModule = _linker.getModule(); const Target *march = TargetRegistry::lookupTarget(Triple, errMsg); if ( march == NULL ) return true; @@ -343,7 +342,7 @@ // construct LTModule, hand over ownership of module and target std::string FeatureStr = getFeatureString(Triple.c_str()); - _target = march->createTargetMachine(*mergedModule, Triple, FeatureStr); + _target = march->createTargetMachine(Triple, FeatureStr); } return false; } Modified: llvm/trunk/tools/lto/LTOModule.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto/LTOModule.cpp?rev=78047&r1=78046&r2=78047&view=diff ============================================================================== --- llvm/trunk/tools/lto/LTOModule.cpp (original) +++ llvm/trunk/tools/lto/LTOModule.cpp Mon Aug 3 23:08:40 2009 @@ -162,7 +162,7 @@ // construct LTModule, hand over ownership of module and target std::string FeatureStr = getFeatureString(Triple.c_str()); - TargetMachine* target = march->createTargetMachine(*m, Triple, FeatureStr); + TargetMachine* target = march->createTargetMachine(Triple, FeatureStr); return new LTOModule(m.take(), target); } From nicholas at mxc.ca Mon Aug 3 23:08:44 2009 From: nicholas at mxc.ca (Nick Lewycky) Date: Mon, 03 Aug 2009 21:08:44 -0700 Subject: [llvm-commits] [llvm] r77960 - in /llvm/trunk/tools/lto: LTOCodeGenerator.cpp LTOCodeGenerator.h lto.cpp In-Reply-To: References: <200908030716.n737GhAj016782@zion.cs.uiuc.edu> <352a1fb20908030859p5309772esa8fa97b38885f4c7@mail.gmail.com> Message-ID: <4A77B44C.2000702@mxc.ca> Chris Lattner wrote: > On Aug 3, 2009, at 8:59 AM, Devang Patel wrote: > >> On Mon, Aug 3, 2009 at 12:16 AM, Nick Lewycky wrote: >>> Author: nicholas >>> Date: Mon Aug 3 02:16:42 2009 >>> New Revision: 77960 >>> >>> URL: http://llvm.org/viewvc/llvm-project?rev=77960&view=rev >>> Log: >>> Remove the GCC path from libLTO. This has been superceded by >>> setAssemblerPath. >>> >>> Modified: >>> llvm/trunk/tools/lto/LTOCodeGenerator.cpp >>> llvm/trunk/tools/lto/LTOCodeGenerator.h >>> llvm/trunk/tools/lto/lto.cpp >> What about lto_codegen_set_gcc_path() ? This is breaking (removing) C >> api. Is it really necessary ? > > Is anyone using it? As far as I know there's exactly two users of libLTO, the gold plugin which is in tree, and the Apple linker. The plugin started with set_gcc_path, then Apple LD added set_assembler_path, then I changed gold to use it instead. I'd like to remove set_gcc_path before anyone else starts using it, especially before we make a release with it. Nick From sabre at nondot.org Mon Aug 3 23:31:03 2009 From: sabre at nondot.org (Chris Lattner) Date: Tue, 04 Aug 2009 04:31:03 -0000 Subject: [llvm-commits] [llvm] r78048 - in /llvm/trunk: include/llvm/Value.h include/llvm/ValueSymbolTable.h lib/Bitcode/Writer/BitcodeWriter.cpp lib/VMCore/Value.cpp Message-ID: <200908040431.n744V3h9008282@zion.cs.uiuc.edu> Author: lattner Date: Mon Aug 3 23:31:02 2009 New Revision: 78048 URL: http://llvm.org/viewvc/llvm-project?rev=78048&view=rev Log: switch ValueMap to using AssertingVH. This is an old patch I had laying around in a tree I forgot about. Modified: llvm/trunk/include/llvm/Value.h llvm/trunk/include/llvm/ValueSymbolTable.h llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp llvm/trunk/lib/VMCore/Value.cpp Modified: llvm/trunk/include/llvm/Value.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Value.h?rev=78048&r1=78047&r2=78048&view=diff ============================================================================== --- llvm/trunk/include/llvm/Value.h (original) +++ llvm/trunk/include/llvm/Value.h Mon Aug 3 23:31:02 2009 @@ -38,7 +38,7 @@ template class StringMapEntry; template class AssertingVH; -typedef StringMapEntry ValueName; +typedef StringMapEntry > ValueName; class raw_ostream; class AssemblyAnnotationWriter; class ValueHandleBase; Modified: llvm/trunk/include/llvm/ValueSymbolTable.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ValueSymbolTable.h?rev=78048&r1=78047&r2=78048&view=diff ============================================================================== --- llvm/trunk/include/llvm/ValueSymbolTable.h (original) +++ llvm/trunk/include/llvm/ValueSymbolTable.h Mon Aug 3 23:31:02 2009 @@ -17,6 +17,7 @@ #include "llvm/Value.h" #include "llvm/ADT/StringMap.h" #include "llvm/Support/DataTypes.h" +#include "llvm/Support/ValueHandle.h" namespace llvm { template @@ -44,7 +45,7 @@ /// @{ public: /// @brief A mapping of names to values. - typedef StringMap ValueMap; + typedef StringMap > ValueMap; /// @brief An iterator over a ValueMap. typedef ValueMap::iterator iterator; Modified: llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp?rev=78048&r1=78047&r2=78048&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp (original) +++ llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp Mon Aug 3 23:31:02 2009 @@ -1083,7 +1083,7 @@ // VST_ENTRY: [valueid, namechar x N] // VST_BBENTRY: [bbid, namechar x N] unsigned Code; - if (isa(SI->getValue())) { + if (isa(*SI->getValue())) { Code = bitc::VST_CODE_BBENTRY; if (isChar6) AbbrevToUse = VST_BBENTRY_6_ABBREV; Modified: llvm/trunk/lib/VMCore/Value.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Value.cpp?rev=78048&r1=78047&r2=78048&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Value.cpp (original) +++ llvm/trunk/lib/VMCore/Value.cpp Mon Aug 3 23:31:02 2009 @@ -57,6 +57,14 @@ } Value::~Value() { + // If this value is named, destroy the name. This should not be in a symtab + // at this point. + if (Name) + Name->Destroy(); + + // There should be no uses of this object anymore, remove it. + LeakDetector::removeGarbageObject(this); + // Notify all ValueHandles (if present) that this value is going away. if (HasValueHandle) ValueHandleBase::ValueIsDeleted(this); @@ -76,14 +84,6 @@ } #endif assert(use_empty() && "Uses remain when a value is destroyed!"); - - // If this value is named, destroy the name. This should not be in a symtab - // at this point. - if (Name) - Name->Destroy(); - - // There should be no uses of this object anymore, remove it. - LeakDetector::removeGarbageObject(this); } /// hasNUses - Return true if this Value has exactly N users. From isanbard at gmail.com Mon Aug 3 23:48:31 2009 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 04 Aug 2009 04:48:31 -0000 Subject: [llvm-commits] [llvm] r78051 - /llvm/trunk/test/FrontendC/2004-03-16-AsmRegisterCrash.c Message-ID: <200908040448.n744mVOm008838@zion.cs.uiuc.edu> Author: void Date: Mon Aug 3 23:48:31 2009 New Revision: 78051 URL: http://llvm.org/viewvc/llvm-project?rev=78051&view=rev Log: llvm-gcc checks the static asm variable is valid in ValidateRegisterVariable. Make this work for PPC. Modified: llvm/trunk/test/FrontendC/2004-03-16-AsmRegisterCrash.c Modified: llvm/trunk/test/FrontendC/2004-03-16-AsmRegisterCrash.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2004-03-16-AsmRegisterCrash.c?rev=78051&r1=78050&r2=78051&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2004-03-16-AsmRegisterCrash.c (original) +++ llvm/trunk/test/FrontendC/2004-03-16-AsmRegisterCrash.c Mon Aug 3 23:48:31 2009 @@ -1,6 +1,10 @@ // RUN: %llvmgcc -S %s -o - | llvm-as -f -o /dev/null int foo() { +#ifdef __ppc__ + register int X __asm__("r1"); +#else register int X __asm__("ebx"); +#endif return X; } From eocallaghan at auroraux.org Mon Aug 3 23:48:38 2009 From: eocallaghan at auroraux.org (Edward O'Callaghan) Date: Tue, 04 Aug 2009 04:48:38 -0000 Subject: [llvm-commits] [compiler-rt] r78052 - /compiler-rt/trunk/www/index.html Message-ID: <200908040448.n744mdmF008855@zion.cs.uiuc.edu> Author: evocallaghan Date: Mon Aug 3 23:48:38 2009 New Revision: 78052 URL: http://llvm.org/viewvc/llvm-project?rev=78052&view=rev Log: Some compiler-rt www site improvements. Modified: compiler-rt/trunk/www/index.html Modified: compiler-rt/trunk/www/index.html URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/www/index.html?rev=78052&r1=78051&r2=78052&view=diff ============================================================================== --- compiler-rt/trunk/www/index.html (original) +++ compiler-rt/trunk/www/index.html Mon Aug 3 23:48:38 2009 @@ -47,14 +47,7 @@

The current feature set of compiler-rt is:

    -
  • Full support for the libgcc interfaces required by these targets: -
      -
    • Darwin i386
      • -
    • Darwin X86-64
      • -
    • Darwin PowerPC
      • -
    • Darwin PowerPC 64
      • -
    • - +
  • Full support for the libgcc interfaces on supported targets.
  • High performance hand tuned implementations of commonly used functions like __floatundidf in assembly that are dramatically faster than the libgcc implementations.
    • @@ -63,6 +56,39 @@
+

Platform Support

+ + +

Compiler-RT is known to work on the following platforms:

+ +
  • Machine Architectures: +
      +
    • i386
      • +
    • X86-64
      • +
    • PowerPC
      • +
    • PowerPC 64
      • +
    • + + + + + + + + + + + + + + + +
    OSArch
    AuroraUXAll +
    LinuxAll +
    DarwinAll +
    + +

    Source Structure

    From dpatel at apple.com Tue Aug 4 00:01:45 2009 From: dpatel at apple.com (Devang Patel) Date: Tue, 04 Aug 2009 05:01:45 -0000 Subject: [llvm-commits] [llvm] r78053 - in /llvm/trunk: lib/Bitcode/Writer/BitcodeWriter.cpp test/Bitcode/metadata.ll Message-ID: <200908040501.n7451nag009241@zion.cs.uiuc.edu> Author: dpatel Date: Tue Aug 4 00:01:35 2009 New Revision: 78053 URL: http://llvm.org/viewvc/llvm-project?rev=78053&view=rev Log: Revert recent bitcode writer patches. Removed: llvm/trunk/test/Bitcode/metadata.ll Modified: llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp Modified: llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp?rev=78053&r1=78052&r2=78053&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp (original) +++ llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp Tue Aug 4 00:01:35 2009 @@ -473,46 +473,50 @@ return Flags; } -/// WriteValues - Write Constants and Metadata. -/// This function could use some refactoring help. -static void WriteValues(unsigned FirstVal, unsigned LastVal, +static void WriteMDNode(const MDNode *N, const ValueEnumerator &VE, - BitstreamWriter &Stream, bool isGlobal) { - if (FirstVal == LastVal) return; - - // MODULE_BLOCK_ID is 0, which is not handled here. So it is OK to use - // 0 as the initializer to indicate that block is not set. - enum bitc::BlockIDs LastBlockID = bitc::MODULE_BLOCK_ID; + BitstreamWriter &Stream, + SmallVector &Record) { + for (unsigned i = 0, e = N->getNumElements(); i != e; ++i) { + if (N->getElement(i)) { + Record.push_back(VE.getTypeID(N->getElement(i)->getType())); + Record.push_back(VE.getValueID(N->getElement(i))); + } else { + Record.push_back(VE.getTypeID(Type::VoidTy)); + Record.push_back(0); + } + } + Stream.EmitRecord(bitc::METADATA_NODE, Record, 0); + Record.clear(); +} - unsigned AggregateAbbrev = 0; - unsigned String8Abbrev = 0; - unsigned CString7Abbrev = 0; - unsigned CString6Abbrev = 0; +static void WriteModuleMetadata(const ValueEnumerator &VE, + BitstreamWriter &Stream) { + const ValueEnumerator::ValueList &Vals = VE.getValues(); + bool StartedMetadataBlock = false; unsigned MDSAbbrev = 0; - SmallVector Record; - - const ValueEnumerator::ValueList &Vals = VE.getValues(); - const Type *LastTy = 0; - for (unsigned i = FirstVal; i != LastVal; ++i) { - const Value *V = Vals[i].first; - if (isa(V)) { - if (LastBlockID != bitc::METADATA_BLOCK_ID) { - // Exit privious block. - if (LastBlockID != bitc::MODULE_BLOCK_ID) - Stream.ExitBlock(); - - LastBlockID = bitc::METADATA_BLOCK_ID; + for (unsigned i = 0, e = Vals.size(); i != e; ++i) { + + if (const MDNode *N = dyn_cast(Vals[i].first)) { + if (!StartedMetadataBlock) { Stream.EnterSubblock(bitc::METADATA_BLOCK_ID, 3); + StartedMetadataBlock = true; + } + WriteMDNode(N, VE, Stream, Record); + } else if (const MDString *MDS = dyn_cast(Vals[i].first)) { + if (!StartedMetadataBlock) { + Stream.EnterSubblock(bitc::METADATA_BLOCK_ID, 3); + // Abbrev for METADATA_STRING. BitCodeAbbrev *Abbv = new BitCodeAbbrev(); Abbv->Add(BitCodeAbbrevOp(bitc::METADATA_STRING)); Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Array)); Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 8)); MDSAbbrev = Stream.EmitAbbrev(Abbv); + StartedMetadataBlock = true; } - } - if (const MDString *MDS = dyn_cast(V)) { + // Code: [strchar x N] const char *StrBegin = MDS->begin(); for (unsigned i = 0, e = MDS->length(); i != e; ++i) @@ -521,21 +525,12 @@ // Emit the finished record. Stream.EmitRecord(bitc::METADATA_STRING, Record, MDSAbbrev); Record.clear(); - continue; - } else if (const MDNode *N = dyn_cast(V)) { - for (unsigned i = 0, e = N->getNumElements(); i != e; ++i) { - if (N->getElement(i)) { - Record.push_back(VE.getTypeID(N->getElement(i)->getType())); - Record.push_back(VE.getValueID(N->getElement(i))); - } else { - Record.push_back(VE.getTypeID(Type::VoidTy)); - Record.push_back(0); - } + } else if (const NamedMDNode *NMD = dyn_cast(Vals[i].first)) { + if (!StartedMetadataBlock) { + Stream.EnterSubblock(bitc::METADATA_BLOCK_ID, 3); + StartedMetadataBlock = true; } - Stream.EmitRecord(bitc::METADATA_NODE, Record, 0); - Record.clear(); - continue; - } else if (const NamedMDNode *NMD = dyn_cast(V)) { + // Write name. std::string Str = NMD->getNameStr(); const char *StrBegin = Str.c_str(); @@ -543,7 +538,7 @@ Record.push_back(StrBegin[i]); Stream.EmitRecord(bitc::METADATA_NAME, Record, 0/*TODO*/); Record.clear(); - + // Write named metadata elements. for (unsigned i = 0, e = NMD->getNumElements(); i != e; ++i) { if (NMD->getElement(i)) @@ -553,49 +548,61 @@ } Stream.EmitRecord(bitc::METADATA_NAMED_NODE, Record, 0); Record.clear(); - continue; } + } + + if (StartedMetadataBlock) + Stream.ExitBlock(); +} - // If we need to switch block, do so now. - if (LastBlockID != bitc::CONSTANTS_BLOCK_ID) { - // Exit privious block. - if (LastBlockID != bitc::MODULE_BLOCK_ID) - Stream.ExitBlock(); - - LastBlockID = bitc::CONSTANTS_BLOCK_ID; - Stream.EnterSubblock(bitc::CONSTANTS_BLOCK_ID, 4); - // If this is a constant pool for the module, emit module-specific abbrevs. - if (isGlobal) { - // Abbrev for CST_CODE_AGGREGATE. - BitCodeAbbrev *Abbv = new BitCodeAbbrev(); - Abbv->Add(BitCodeAbbrevOp(bitc::CST_CODE_AGGREGATE)); - Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Array)); - Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, Log2_32_Ceil(LastVal+1))); - AggregateAbbrev = Stream.EmitAbbrev(Abbv); - - // Abbrev for CST_CODE_STRING. - Abbv = new BitCodeAbbrev(); - Abbv->Add(BitCodeAbbrevOp(bitc::CST_CODE_STRING)); - Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Array)); - Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 8)); - String8Abbrev = Stream.EmitAbbrev(Abbv); +static void WriteConstants(unsigned FirstVal, unsigned LastVal, + const ValueEnumerator &VE, + BitstreamWriter &Stream, bool isGlobal) { + if (FirstVal == LastVal) return; + + Stream.EnterSubblock(bitc::CONSTANTS_BLOCK_ID, 4); - // Abbrev for CST_CODE_CSTRING. - Abbv = new BitCodeAbbrev(); - Abbv->Add(BitCodeAbbrevOp(bitc::CST_CODE_CSTRING)); - Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Array)); - Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 7)); - CString7Abbrev = Stream.EmitAbbrev(Abbv); + unsigned AggregateAbbrev = 0; + unsigned String8Abbrev = 0; + unsigned CString7Abbrev = 0; + unsigned CString6Abbrev = 0; + // If this is a constant pool for the module, emit module-specific abbrevs. + if (isGlobal) { + // Abbrev for CST_CODE_AGGREGATE. + BitCodeAbbrev *Abbv = new BitCodeAbbrev(); + Abbv->Add(BitCodeAbbrevOp(bitc::CST_CODE_AGGREGATE)); + Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Array)); + Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, Log2_32_Ceil(LastVal+1))); + AggregateAbbrev = Stream.EmitAbbrev(Abbv); - // Abbrev for CST_CODE_CSTRING. - Abbv = new BitCodeAbbrev(); - Abbv->Add(BitCodeAbbrevOp(bitc::CST_CODE_CSTRING)); - Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Array)); - Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Char6)); - CString6Abbrev = Stream.EmitAbbrev(Abbv); - } + // Abbrev for CST_CODE_STRING. + Abbv = new BitCodeAbbrev(); + Abbv->Add(BitCodeAbbrevOp(bitc::CST_CODE_STRING)); + Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Array)); + Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 8)); + String8Abbrev = Stream.EmitAbbrev(Abbv); + // Abbrev for CST_CODE_CSTRING. + Abbv = new BitCodeAbbrev(); + Abbv->Add(BitCodeAbbrevOp(bitc::CST_CODE_CSTRING)); + Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Array)); + Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 7)); + CString7Abbrev = Stream.EmitAbbrev(Abbv); + // Abbrev for CST_CODE_CSTRING. + Abbv = new BitCodeAbbrev(); + Abbv->Add(BitCodeAbbrevOp(bitc::CST_CODE_CSTRING)); + Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Array)); + Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Char6)); + CString6Abbrev = Stream.EmitAbbrev(Abbv); + } + + SmallVector Record; - } + const ValueEnumerator::ValueList &Vals = VE.getValues(); + const Type *LastTy = 0; + for (unsigned i = FirstVal; i != LastVal; ++i) { + const Value *V = Vals[i].first; + if (isa(V)) + continue; // If we need to switch types, do so now. if (V->getType() != LastTy) { LastTy = V->getType(); @@ -795,7 +802,7 @@ // We know globalvalues have been emitted by WriteModuleInfo. for (unsigned i = 0, e = Vals.size(); i != e; ++i) { if (!isa(Vals[i].first)) { - WriteValues(i, Vals.size(), VE, Stream, true); + WriteConstants(i, Vals.size(), VE, Stream, true); return; } } @@ -1124,7 +1131,7 @@ // If there are function-local constants, emit them now. unsigned CstStart, CstEnd; VE.getFunctionConstantRange(CstStart, CstEnd); - WriteValues(CstStart, CstEnd, VE, Stream, false); + WriteConstants(CstStart, CstEnd, VE, Stream, false); // Keep a running idea of what the instruction ID is. unsigned InstID = CstEnd; @@ -1377,6 +1384,9 @@ // Emit constants. WriteModuleConstants(VE, Stream); + // Emit metadata. + WriteModuleMetadata(VE, Stream); + // Emit function bodies. for (Module::const_iterator I = M->begin(), E = M->end(); I != E; ++I) if (!I->isDeclaration()) @@ -1387,7 +1397,7 @@ // Emit names for globals/functions etc. WriteValueSymbolTable(M->getValueSymbolTable(), VE, Stream); - + Stream.ExitBlock(); } Removed: llvm/trunk/test/Bitcode/metadata.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Bitcode/metadata.ll?rev=78052&view=auto ============================================================================== --- llvm/trunk/test/Bitcode/metadata.ll (original) +++ llvm/trunk/test/Bitcode/metadata.ll (removed) @@ -1,5 +0,0 @@ -; RUN: llvm-as < %s | llvm-dis -f -o /dev/null - -!llvm.foo = !{!0} -!0 = metadata !{i32 42} - at my.str = internal constant [4 x i8] c"foo\00" From eocallaghan at auroraux.org Tue Aug 4 00:24:32 2009 From: eocallaghan at auroraux.org (Edward O'Callaghan) Date: Tue, 04 Aug 2009 05:24:32 -0000 Subject: [llvm-commits] [llvm] r78054 - /llvm/trunk/docs/GettingStarted.html Message-ID: <200908040524.n745OX6l010077@zion.cs.uiuc.edu> Author: evocallaghan Date: Tue Aug 4 00:24:28 2009 New Revision: 78054 URL: http://llvm.org/viewvc/llvm-project?rev=78054&view=rev Log: Minor www site formating improvements. Modified: llvm/trunk/docs/GettingStarted.html Modified: llvm/trunk/docs/GettingStarted.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/GettingStarted.html?rev=78054&r1=78053&r2=78054&view=diff ============================================================================== --- llvm/trunk/docs/GettingStarted.html (original) +++ llvm/trunk/docs/GettingStarted.html Tue Aug 4 00:24:28 2009 @@ -226,6 +226,11 @@ GCC + Linux + amd64 + GCC + + Solaris V9 (Ultrasparc) GCC @@ -244,7 +249,6 @@ MacOS X2,9 x86 GCC - Cygwin/Win32 @@ -256,11 +260,6 @@ x861,6,8 GCC 3.4.X, binutils 2.15 - - Linux - amd64 - GCC -

    LLVM has partial support for the following platforms:

    From sabre at nondot.org Tue Aug 4 00:35:56 2009 From: sabre at nondot.org (Chris Lattner) Date: Tue, 04 Aug 2009 05:35:56 -0000 Subject: [llvm-commits] [llvm] r78055 - in /llvm/trunk: include/llvm/MC/SectionKind.h lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp lib/Target/TargetLoweringObjectFile.cpp lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Message-ID: <200908040535.n745Zv9h010445@zion.cs.uiuc.edu> Author: lattner Date: Tue Aug 4 00:35:56 2009 New Revision: 78055 URL: http://llvm.org/viewvc/llvm-project?rev=78055&view=rev Log: make MergeableCString be a SectionKind "abstract class", and add new concrete versions for 1/2/4-byte mergable strings. These are not actually created yet. Modified: llvm/trunk/include/llvm/MC/SectionKind.h llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp llvm/trunk/lib/Target/TargetLoweringObjectFile.cpp llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Modified: llvm/trunk/include/llvm/MC/SectionKind.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/SectionKind.h?rev=78055&r1=78054&r2=78055&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/SectionKind.h (original) +++ llvm/trunk/include/llvm/MC/SectionKind.h Tue Aug 4 00:35:56 2009 @@ -38,13 +38,20 @@ /// SectionKind are not mergeable. ReadOnly, - /// MergeableCString - This is a special section for nul-terminated - /// strings. The linker can unique the C strings, knowing their - /// semantics. Because it uniques based on the nul terminators, the - /// compiler can't put strings in this section that have embeded nuls - /// in them. - MergeableCString, + /// MergableCString - Any null-terminated string which allows merging. + /// These values are known to end in a nul value of the specified size, + /// not otherwise contain a nul value, and be mergable. This allows the + /// linker to unique the strings if it so desires. + + /// Mergeable1ByteCString - 1 byte mergable, null terminated, string. + Mergeable1ByteCString, + /// Mergeable2ByteCString - 2 byte mergable, null terminated, string. + Mergeable2ByteCString, + + /// Mergeable4ByteCString - 4 byte mergable, null terminated, string. + Mergeable4ByteCString, + /// MergeableConst - These are sections for merging fixed-length /// constants together. For example, this can be used to unique /// constant pool entries etc. @@ -119,15 +126,22 @@ bool isText() const { return K == Text; } bool isReadOnly() const { - return K == ReadOnly || K == MergeableCString || isMergeableConst(); + return K == ReadOnly || isMergeableCString() || + isMergeableConst(); } - bool isMergeableCString() const { return K == MergeableCString; } + bool isMergeableCString() const { + return K == Mergeable1ByteCString || K == Mergeable2ByteCString || + K == Mergeable4ByteCString; + } + bool isMergeable1ByteCString() const { return K == Mergeable1ByteCString; } + bool isMergeable2ByteCString() const { return K == Mergeable2ByteCString; } + bool isMergeable4ByteCString() const { return K == Mergeable4ByteCString; } + bool isMergeableConst() const { return K == MergeableConst || K == MergeableConst4 || K == MergeableConst8 || K == MergeableConst16; } - bool isMergeableConst4() const { return K == MergeableConst4; } bool isMergeableConst8() const { return K == MergeableConst8; } bool isMergeableConst16() const { return K == MergeableConst16; } @@ -177,7 +191,15 @@ static SectionKind getMetadata() { return get(Metadata); } static SectionKind getText() { return get(Text); } static SectionKind getReadOnly() { return get(ReadOnly); } - static SectionKind getMergeableCString() { return get(MergeableCString); } + static SectionKind getMergeable1ByteCString() { + return get(Mergeable1ByteCString); + } + static SectionKind getMergeable2ByteCString() { + return get(Mergeable2ByteCString); + } + static SectionKind getMergeable4ByteCString() { + return get(Mergeable4ByteCString); + } static SectionKind getMergeableConst() { return get(MergeableConst); } static SectionKind getMergeableConst4() { return get(MergeableConst4); } static SectionKind getMergeableConst8() { return get(MergeableConst8); } Modified: llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp?rev=78055&r1=78054&r2=78055&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp Tue Aug 4 00:35:56 2009 @@ -905,6 +905,7 @@ getObjFileLowering().SectionForGlobal(GVar, Mang, TM); SwitchToSection(TheSection); + /// FIXME: Drive this off the section! if (C->isNullValue() && /* FIXME: Verify correct */ !GVar->hasSection() && (GVar->hasLocalLinkage() || GVar->hasExternalLinkage() || Modified: llvm/trunk/lib/Target/TargetLoweringObjectFile.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetLoweringObjectFile.cpp?rev=78055&r1=78054&r2=78055&view=diff ============================================================================== --- llvm/trunk/lib/Target/TargetLoweringObjectFile.cpp (original) +++ llvm/trunk/lib/Target/TargetLoweringObjectFile.cpp Tue Aug 4 00:35:56 2009 @@ -135,8 +135,10 @@ // If initializer is a null-terminated string, put it in a "cstring" // section if the target has it. if (isConstantString(C)) - return SectionKind::getMergeableCString(); + return SectionKind::getMergeable1ByteCString(); + // FIXME: Detect 2/4 byte strings. + // Otherwise, just drop it into a mergable constant section. If we have // a section for this size, use it, otherwise use the arbitrary sized // mergable section. @@ -290,8 +292,10 @@ getOrCreateSection("\t.rodata", false, SectionKind::getReadOnly()); TLSDataSection = getOrCreateSection("\t.tdata", false, SectionKind::getThreadData()); + + // FIXME: No reason to make this. CStringSection = getOrCreateSection("\t.rodata.str", true, - SectionKind::getMergeableCString()); + SectionKind::getMergeable1ByteCString()); TLSBSSSection = getOrCreateSection("\t.tbss", false, SectionKind::getThreadBSS()); @@ -392,12 +396,16 @@ Str.push_back('x'); if (Kind.isWriteable()) Str.push_back('w'); - if (Kind.isMergeableCString() || + if (Kind.isMergeable1ByteCString() || + Kind.isMergeable2ByteCString() || + Kind.isMergeable4ByteCString() || Kind.isMergeableConst4() || Kind.isMergeableConst8() || Kind.isMergeableConst16()) Str.push_back('M'); - if (Kind.isMergeableCString()) + if (Kind.isMergeable1ByteCString() || + Kind.isMergeable2ByteCString() || + Kind.isMergeable4ByteCString()) Str.push_back('S'); if (Kind.isThreadLocal()) Str.push_back('T'); @@ -419,11 +427,15 @@ Str.append(KindStr, KindStr+strlen(KindStr)); - if (Kind.isMergeableCString()) { - // TODO: Eventually handle multiple byte character strings. For now, all - // mergable C strings are single byte. + if (Kind.isMergeable1ByteCString()) { Str.push_back(','); Str.push_back('1'); + } else if (Kind.isMergeable2ByteCString()) { + Str.push_back(','); + Str.push_back('2'); + } else if (Kind.isMergeable4ByteCString()) { + Str.push_back(','); + Str.push_back('4'); } else if (Kind.isMergeableConst4()) { Str.push_back(','); Str.push_back('4'); @@ -469,7 +481,9 @@ if (Kind.isText()) return TextSection; - if (Kind.isMergeableCString()) { + if (Kind.isMergeable1ByteCString() || + Kind.isMergeable2ByteCString() || + Kind.isMergeable4ByteCString()) { assert(CStringSection && "Should have string section prefix"); // We also need alignment here. @@ -478,9 +492,17 @@ unsigned Align = TM.getTargetData()->getPreferredAlignment(cast(GV)); - std::string Name = CStringSection->getName() + "1." + utostr(Align); - return getOrCreateSection(Name.c_str(), false, - SectionKind::getMergeableCString()); + const char *SizeSpec = "1."; + if (Kind.isMergeable2ByteCString()) + SizeSpec = "2."; + else if (Kind.isMergeable4ByteCString()) + SizeSpec = "4."; + else + assert(Kind.isMergeable1ByteCString() && "unknown string width"); + + + std::string Name = CStringSection->getName() + SizeSpec + utostr(Align); + return getOrCreateSection(Name.c_str(), false, Kind); } if (Kind.isMergeableConst()) { @@ -549,7 +571,7 @@ SectionKind::getDataRel()); CStringSection = getOrCreateSection("\t.cstring", true, - SectionKind::getMergeableCString()); + SectionKind::getMergeable1ByteCString()); FourByteConstantSection = getOrCreateSection("\t.literal4\n", true, SectionKind::getMergeableConst4()); EightByteConstantSection = getOrCreateSection("\t.literal8\n", true, @@ -660,7 +682,7 @@ } // FIXME: Alignment check should be handled by section classifier. - if (Kind.isMergeableCString()) { + if (Kind.isMergeable1ByteCString()) { Constant *C = cast(GV)->getInitializer(); const Type *Ty = cast(C->getType())->getElementType(); const TargetData &TD = *TM.getTargetData(); Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp?rev=78055&r1=78054&r2=78055&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Tue Aug 4 00:35:56 2009 @@ -788,6 +788,7 @@ getObjFileLowering().SectionForGlobal(GVar, Mang, TM); SwitchToSection(TheSection); + // FIXME: get this stuff from section kind flags. if (C->isNullValue() && !GVar->hasSection() && // Don't put things that should go in the cstring section into "comm". !TheSection->getKind().isMergeableCString()) { From dpatel at apple.com Tue Aug 4 01:00:21 2009 From: dpatel at apple.com (Devang Patel) Date: Tue, 04 Aug 2009 06:00:21 -0000 Subject: [llvm-commits] [llvm] r78056 - in /llvm/trunk: lib/Bitcode/Reader/BitcodeReader.cpp lib/Bitcode/Reader/BitcodeReader.h lib/Bitcode/Writer/BitcodeWriter.cpp lib/Bitcode/Writer/ValueEnumerator.cpp lib/Bitcode/Writer/ValueEnumerator.h test/Bitcode/metadata-2.ll test/Bitcode/metadata.ll Message-ID: <200908040600.n7460MEq011227@zion.cs.uiuc.edu> Author: dpatel Date: Tue Aug 4 01:00:18 2009 New Revision: 78056 URL: http://llvm.org/viewvc/llvm-project?rev=78056&view=rev Log: Use separate ValueList for metadata. This fixes PR4666. Added: llvm/trunk/test/Bitcode/metadata-2.ll llvm/trunk/test/Bitcode/metadata.ll Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp llvm/trunk/lib/Bitcode/Reader/BitcodeReader.h llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.h Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp?rev=78056&r1=78055&r2=78056&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp (original) +++ llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Tue Aug 4 01:00:18 2009 @@ -34,6 +34,7 @@ Buffer = 0; std::vector().swap(TypeList); ValueList.clear(); + MDValueList.clear(); std::vector().swap(MAttributes); std::vector().swap(FunctionBBs); @@ -312,6 +313,41 @@ } } +void BitcodeReaderMDValueList::AssignValue(Value *V, unsigned Idx) { + if (Idx == size()) { + push_back(V); + return; + } + + if (Idx >= size()) + resize(Idx+1); + + WeakVH &OldV = MDValuePtrs[Idx]; + if (OldV == 0) { + OldV = V; + return; + } + + // If there was a forward reference to this value, replace it. + Value *PrevVal = OldV; + OldV->replaceAllUsesWith(V); + delete PrevVal; +} + +Value *BitcodeReaderMDValueList::getValueFwdRef(unsigned Idx) { + if (Idx >= size()) + resize(Idx + 1); + + if (Value *V = MDValuePtrs[Idx]) { + assert(V->getType() == Type::MetadataTy && "Type mismatch in value table!"); + return V; + } + + // Create and return a placeholder, which will later be RAUW'd. + Value *V = new Argument(Type::MetadataTy); + MDValuePtrs[Idx] = V; + return V; +} const Type *BitcodeReader::getTypeByID(unsigned ID, bool isTypeTable) { // If the TypeID is in range, return it. @@ -700,7 +736,7 @@ } bool BitcodeReader::ParseMetadata() { - unsigned NextValueNo = ValueList.size(); + unsigned NextValueNo = MDValueList.size(); if (Stream.EnterSubBlock(bitc::METADATA_BLOCK_ID)) return Error("Malformed block record"); @@ -752,13 +788,13 @@ unsigned Size = Record.size(); SmallVector Elts; for (unsigned i = 0; i != Size; ++i) { - Value *MD = ValueList.getValueFwdRef(Record[i], Type::MetadataTy); + Value *MD = MDValueList.getValueFwdRef(Record[i]); if (MetadataBase *B = dyn_cast(MD)) Elts.push_back(B); } Value *V = NamedMDNode::Create(Name.c_str(), Elts.data(), Elts.size(), TheModule); - ValueList.AssignValue(V, NextValueNo++); + MDValueList.AssignValue(V, NextValueNo++); break; } case bitc::METADATA_NODE: { @@ -769,13 +805,15 @@ SmallVector Elts; for (unsigned i = 0; i != Size; i += 2) { const Type *Ty = getTypeByID(Record[i], false); - if (Ty != Type::VoidTy) + if (Ty == Type::MetadataTy) + Elts.push_back(MDValueList.getValueFwdRef(Record[i+1])); + else if (Ty != Type::VoidTy) Elts.push_back(ValueList.getValueFwdRef(Record[i+1], Ty)); else Elts.push_back(NULL); } Value *V = MDNode::get(Context, &Elts[0], Elts.size()); - ValueList.AssignValue(V, NextValueNo++); + MDValueList.AssignValue(V, NextValueNo++); break; } case bitc::METADATA_STRING: { @@ -786,7 +824,7 @@ String[i] = Record[i]; Value *V = MDString::get(Context, StringRef(String.data(), String.size())); - ValueList.AssignValue(V, NextValueNo++); + MDValueList.AssignValue(V, NextValueNo++); break; } } Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Reader/BitcodeReader.h?rev=78056&r1=78055&r2=78056&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Reader/BitcodeReader.h (original) +++ llvm/trunk/lib/Bitcode/Reader/BitcodeReader.h Tue Aug 4 01:00:18 2009 @@ -86,6 +86,41 @@ void ResolveConstantForwardRefs(); }; + +//===----------------------------------------------------------------------===// +// BitcodeReaderMDValueList Class +//===----------------------------------------------------------------------===// + +class BitcodeReaderMDValueList { + std::vector MDValuePtrs; + + LLVMContext& Context; +public: + BitcodeReaderMDValueList(LLVMContext& C) : Context(C) {} + + // vector compatibility methods + unsigned size() const { return MDValuePtrs.size(); } + void resize(unsigned N) { MDValuePtrs.resize(N); } + void push_back(Value *V) { MDValuePtrs.push_back(V); } + void clear() { MDValuePtrs.clear(); } + Value *back() const { return MDValuePtrs.back(); } + void pop_back() { MDValuePtrs.pop_back(); } + bool empty() const { return MDValuePtrs.empty(); } + + Value *operator[](unsigned i) const { + assert(i < MDValuePtrs.size()); + return MDValuePtrs[i]; + } + + void shrinkTo(unsigned N) { + assert(N <= size() && "Invalid shrinkTo request!"); + MDValuePtrs.resize(N); + } + + Value *getValueFwdRef(unsigned Idx); + void AssignValue(Value *V, unsigned Idx); +}; + class BitcodeReader : public ModuleProvider { LLVMContext& Context; MemoryBuffer *Buffer; @@ -96,6 +131,7 @@ std::vector TypeList; BitcodeReaderValueList ValueList; + BitcodeReaderMDValueList MDValueList; std::vector > GlobalInits; std::vector > AliasInits; @@ -127,7 +163,7 @@ DenseMap > DeferredFunctionInfo; public: explicit BitcodeReader(MemoryBuffer *buffer, LLVMContext& C) - : Context(C), Buffer(buffer), ErrorString(0), ValueList(C) { + : Context(C), Buffer(buffer), ErrorString(0), ValueList(C), MDValueList(C) { HasReversedFunctionsWithBodies = false; } ~BitcodeReader() { @@ -160,7 +196,10 @@ private: const Type *getTypeByID(unsigned ID, bool isTypeTable = false); Value *getFnValueByID(unsigned ID, const Type *Ty) { - return ValueList.getValueFwdRef(ID, Ty); + if (Ty == Type::MetadataTy) + return MDValueList.getValueFwdRef(ID); + else + return ValueList.getValueFwdRef(ID, Ty); } BasicBlock *getBasicBlock(unsigned ID) const { if (ID >= FunctionBBs.size()) return 0; // Invalid ID Modified: llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp?rev=78056&r1=78055&r2=78056&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp (original) +++ llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp Tue Aug 4 01:00:18 2009 @@ -492,7 +492,7 @@ static void WriteModuleMetadata(const ValueEnumerator &VE, BitstreamWriter &Stream) { - const ValueEnumerator::ValueList &Vals = VE.getValues(); + const ValueEnumerator::ValueList &Vals = VE.getMDValues(); bool StartedMetadataBlock = false; unsigned MDSAbbrev = 0; SmallVector Record; @@ -601,8 +601,6 @@ const Type *LastTy = 0; for (unsigned i = FirstVal; i != LastVal; ++i) { const Value *V = Vals[i].first; - if (isa(V)) - continue; // If we need to switch types, do so now. if (V->getType() != LastTy) { LastTy = V->getType(); Modified: llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp?rev=78056&r1=78055&r2=78056&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp (original) +++ llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp Tue Aug 4 01:00:18 2009 @@ -114,6 +114,18 @@ TypeMap[Types[i].first] = i+1; } +unsigned ValueEnumerator::getValueID(const Value *V) const { + if (isa(V)) { + ValueMapType::const_iterator I = MDValueMap.find(V); + assert(I != MDValueMap.end() && "Value not in slotcalculator!"); + return I->second-1; + } + + ValueMapType::const_iterator I = ValueMap.find(V); + assert(I != ValueMap.end() && "Value not in slotcalculator!"); + return I->second-1; +} + // Optimize constant ordering. namespace { struct CstSortPredicate { @@ -165,9 +177,51 @@ EnumerateValue(VI->getValue()); } +void ValueEnumerator::EnumerateMetadata(const MetadataBase *MD) { + // Check to see if it's already in! + unsigned &MDValueID = MDValueMap[MD]; + if (MDValueID) { + // Increment use count. + MDValues[MDValueID-1].second++; + return; + } + + // Enumerate the type of this value. + EnumerateType(MD->getType()); + + if (const MDNode *N = dyn_cast(MD)) { + MDValues.push_back(std::make_pair(MD, 1U)); + MDValueMap[MD] = MDValues.size(); + MDValueID = MDValues.size(); + for (MDNode::const_elem_iterator I = N->elem_begin(), E = N->elem_end(); + I != E; ++I) { + if (*I) + EnumerateValue(*I); + else + EnumerateType(Type::VoidTy); + } + return; + } else if (const NamedMDNode *N = dyn_cast(MD)) { + for(NamedMDNode::const_elem_iterator I = N->elem_begin(), + E = N->elem_end(); I != E; ++I) { + MetadataBase *M = *I; + EnumerateValue(M); + } + MDValues.push_back(std::make_pair(MD, 1U)); + MDValueMap[MD] = Values.size(); + return; + } + + // Add the value. + MDValues.push_back(std::make_pair(MD, 1U)); + MDValueID = MDValues.size(); +} + void ValueEnumerator::EnumerateValue(const Value *V) { assert(V->getType() != Type::VoidTy && "Can't insert void values!"); - + if (const MetadataBase *MB = dyn_cast(V)) + return EnumerateMetadata(MB); + // Check to see if it's already in! unsigned &ValueID = ValueMap[V]; if (ValueID) { @@ -207,31 +261,6 @@ } } - if (const MDNode *N = dyn_cast(V)) { - Values.push_back(std::make_pair(V, 1U)); - ValueMap[V] = Values.size(); - ValueID = Values.size(); - for (MDNode::const_elem_iterator I = N->elem_begin(), E = N->elem_end(); - I != E; ++I) { - if (*I) - EnumerateValue(*I); - else - EnumerateType(Type::VoidTy); - } - return; - } - - if (const NamedMDNode *N = dyn_cast(V)) { - for(NamedMDNode::const_elem_iterator I = N->elem_begin(), - E = N->elem_end(); I != E; ++I) { - MetadataBase *M = *I; - EnumerateValue(M); - } - Values.push_back(std::make_pair(V, 1U)); - ValueMap[V] = Values.size(); - return; - } - // Add the value. Values.push_back(std::make_pair(V, 1U)); ValueID = Values.size(); Modified: llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.h?rev=78056&r1=78055&r2=78056&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.h (original) +++ llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.h Tue Aug 4 01:00:18 2009 @@ -25,6 +25,7 @@ class BasicBlock; class Function; class Module; +class MetadataBase; class AttrListPtr; class TypeSymbolTable; class ValueSymbolTable; @@ -44,7 +45,9 @@ typedef DenseMap ValueMapType; ValueMapType ValueMap; ValueList Values; - + ValueList MDValues; + ValueMapType MDValueMap; + typedef DenseMap AttributeMapType; AttributeMapType AttributeMap; std::vector Attributes; @@ -64,12 +67,8 @@ public: ValueEnumerator(const Module *M); - unsigned getValueID(const Value *V) const { - ValueMapType::const_iterator I = ValueMap.find(V); - assert(I != ValueMap.end() && "Value not in slotcalculator!"); - return I->second-1; - } - + unsigned getValueID(const Value *V) const; + unsigned getTypeID(const Type *T) const { TypeMapType::const_iterator I = TypeMap.find(T); assert(I != TypeMap.end() && "Type not in ValueEnumerator!"); @@ -91,6 +90,7 @@ } const ValueList &getValues() const { return Values; } + const ValueList &getMDValues() const { return MDValues; } const TypeList &getTypes() const { return Types; } const std::vector &getBasicBlocks() const { return BasicBlocks; @@ -108,6 +108,7 @@ private: void OptimizeConstants(unsigned CstStart, unsigned CstEnd); + void EnumerateMetadata(const MetadataBase *MD); void EnumerateValue(const Value *V); void EnumerateType(const Type *T); void EnumerateOperandType(const Value *V); Added: llvm/trunk/test/Bitcode/metadata-2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Bitcode/metadata-2.ll?rev=78056&view=auto ============================================================================== --- llvm/trunk/test/Bitcode/metadata-2.ll (added) +++ llvm/trunk/test/Bitcode/metadata-2.ll Tue Aug 4 01:00:18 2009 @@ -0,0 +1,87 @@ +; RUN: llvm-as < %s | llvm-dis -f -o /dev/null + type { %object.ModuleInfo.__vtbl*, i8*, %"byte[]", %1, %"ClassInfo[]", i32, void ()*, void ()*, void ()*, i8*, void ()* } ; type %0 + type { i64, %object.ModuleInfo* } ; type %1 + type { i32, void ()* } ; type %2 + %"ClassInfo[]" = type { i64, %object.ClassInfo** } + %"Interface[]" = type { i64, %object.Interface* } + %"ModuleInfo[]" = type { i64, %object.ModuleInfo** } + %ModuleReference = type { %ModuleReference*, %object.ModuleInfo* } + %"OffsetTypeInfo[]" = type { i64, %object.OffsetTypeInfo* } + %"byte[]" = type { i64, i8* } + %object.ClassInfo = type { %object.ClassInfo.__vtbl*, i8*, %"byte[]", %"byte[]", %"void*[]", %"Interface[]", %object.ClassInfo*, i8*, i8*, i32, i8*, %"OffsetTypeInfo[]", i8*, %object.TypeInfo* } + %object.ClassInfo.__vtbl = type { %object.ClassInfo*, %"byte[]" (%object.Object*)*, i64 (%object.Object*)*, i32 (%object.Object*, %object.Object*)*, i32 (%object.Object*, %object.Object*)*, %object.Object* (%object.ClassInfo*)* } + %object.Interface = type { %object.ClassInfo*, %"void*[]", i64 } + %object.ModuleInfo = type { %object.ModuleInfo.__vtbl*, i8*, %"byte[]", %"ModuleInfo[]", %"ClassInfo[]", i32, void ()*, void ()*, void ()*, i8*, void ()* } + %object.ModuleInfo.__vtbl = type { %object.ClassInfo*, %"byte[]" (%object.Object*)*, i64 (%object.Object*)*, i32 (%object.Object*, %object.Object*)*, i32 (%object.Object*, %object.Object*)* } + %object.Object = type { %object.ModuleInfo.__vtbl*, i8* } + %object.OffsetTypeInfo = type { i64, %object.TypeInfo* } + %object.TypeInfo = type { %object.TypeInfo.__vtbl*, i8* } + %object.TypeInfo.__vtbl = type { %object.ClassInfo*, %"byte[]" (%object.Object*)*, i64 (%object.Object*)*, i32 (%object.Object*, %object.Object*)*, i32 (%object.Object*, %object.Object*)*, i64 (%object.TypeInfo*, i8*)*, i32 (%object.TypeInfo*, i8*, i8*)*, i32 (%object.TypeInfo*, i8*, i8*)*, i64 (%object.TypeInfo*)*, void (%object.TypeInfo*, i8*, i8*)*, %object.TypeInfo* (%object.TypeInfo*)*, %"byte[]" (%object.TypeInfo*)*, i32 (%object.TypeInfo*)*, %"OffsetTypeInfo[]" (%object.TypeInfo*)* } + %"void*[]" = type { i64, i8** } + at _D10ModuleInfo6__vtblZ = external constant %object.ModuleInfo.__vtbl ; <%object.ModuleInfo.__vtbl*> [#uses=1] + at .str = internal constant [20 x i8] c"tango.core.BitManip\00" ; <[20 x i8]*> [#uses=1] + at _D5tango4core8BitManip8__ModuleZ = global %0 { %object.ModuleInfo.__vtbl* @_D10ModuleInfo6__vtblZ, i8* null, %"byte[]" { i64 19, i8* getelementptr ([20 x i8]* @.str, i32 0, i32 0) }, %1 zeroinitializer, %"ClassInfo[]" zeroinitializer, i32 4, void ()* null, void ()* null, void ()* null, i8* null, void ()* null } ; <%0*> [#uses=1] + at _D5tango4core8BitManip11__moduleRefZ = internal global %ModuleReference { %ModuleReference* null, %object.ModuleInfo* bitcast (%0* @_D5tango4core8BitManip8__ModuleZ to %object.ModuleInfo*) } ; <%ModuleReference*> [#uses=2] + at _Dmodule_ref = external global %ModuleReference* ; <%ModuleReference**> [#uses=2] + at llvm.global_ctors = appending constant [1 x %2] [%2 { i32 65535, void ()* @_D5tango4core8BitManip16__moduleinfoCtorZ }] ; <[1 x %2]*> [#uses=0] + +define fastcc i32 @_D5tango4core8BitManip6popcntFkZi(i32 %x_arg) nounwind readnone { +entry: + %tmp1 = lshr i32 %x_arg, 1 ; [#uses=1] + %tmp2 = and i32 %tmp1, 1431655765 ; [#uses=1] + %tmp4 = sub i32 %x_arg, %tmp2 ; [#uses=2] + %tmp6 = lshr i32 %tmp4, 2 ; [#uses=1] + %tmp7 = and i32 %tmp6, 858993459 ; [#uses=1] + %tmp9 = and i32 %tmp4, 858993459 ; [#uses=1] + %tmp10 = add i32 %tmp7, %tmp9 ; [#uses=2] + %tmp12 = lshr i32 %tmp10, 4 ; [#uses=1] + %tmp14 = add i32 %tmp12, %tmp10 ; [#uses=1] + %tmp16 = and i32 %tmp14, 252645135 ; [#uses=2] + %tmp18 = lshr i32 %tmp16, 8 ; [#uses=1] + %tmp20 = add i32 %tmp18, %tmp16 ; [#uses=1] + %tmp22 = and i32 %tmp20, 16711935 ; [#uses=2] + %tmp24 = lshr i32 %tmp22, 16 ; [#uses=1] + %tmp26 = add i32 %tmp24, %tmp22 ; [#uses=1] + %tmp28 = and i32 %tmp26, 65535 ; [#uses=1] + ret i32 %tmp28 +} + +define fastcc i32 @_D5tango4core8BitManip7bitswapFkZk(i32 %x_arg) nounwind readnone { +entry: + %tmp1 = lshr i32 %x_arg, 1 ; [#uses=1] + %tmp2 = and i32 %tmp1, 1431655765 ; [#uses=1] + %tmp4 = shl i32 %x_arg, 1 ; [#uses=1] + %tmp5 = and i32 %tmp4, -1431655766 ; [#uses=1] + %tmp6 = or i32 %tmp2, %tmp5 ; [#uses=2] + %tmp8 = lshr i32 %tmp6, 2 ; [#uses=1] + %tmp9 = and i32 %tmp8, 858993459 ; [#uses=1] + %tmp11 = shl i32 %tmp6, 2 ; [#uses=1] + %tmp12 = and i32 %tmp11, -858993460 ; [#uses=1] + %tmp13 = or i32 %tmp9, %tmp12 ; [#uses=2] + %tmp15 = lshr i32 %tmp13, 4 ; [#uses=1] + %tmp16 = and i32 %tmp15, 252645135 ; [#uses=1] + %tmp18 = shl i32 %tmp13, 4 ; [#uses=1] + %tmp19 = and i32 %tmp18, -252645136 ; [#uses=1] + %tmp20 = or i32 %tmp16, %tmp19 ; [#uses=2] + %tmp22 = lshr i32 %tmp20, 8 ; [#uses=1] + %tmp23 = and i32 %tmp22, 16711935 ; [#uses=1] + %tmp25 = shl i32 %tmp20, 8 ; [#uses=1] + %tmp26 = and i32 %tmp25, -16711936 ; [#uses=1] + %tmp27 = or i32 %tmp23, %tmp26 ; [#uses=2] + %tmp29 = lshr i32 %tmp27, 16 ; [#uses=1] + %tmp31 = shl i32 %tmp27, 16 ; [#uses=1] + %tmp32 = or i32 %tmp29, %tmp31 ; [#uses=1] + ret i32 %tmp32 +} + +define internal void @_D5tango4core8BitManip16__moduleinfoCtorZ() nounwind { +moduleinfoCtorEntry: + %current = load %ModuleReference** @_Dmodule_ref ; <%ModuleReference*> [#uses=1] + store %ModuleReference* %current, %ModuleReference** getelementptr (%ModuleReference* @_D5tango4core8BitManip11__moduleRefZ, i32 0, i32 0) + store %ModuleReference* @_D5tango4core8BitManip11__moduleRefZ, %ModuleReference** @_Dmodule_ref + ret void +} +!llvm.ldc.classinfo._D6Object7__ClassZ = !{!0} +!llvm.ldc.classinfo._D10ModuleInfo7__ClassZ = !{!1} +!0 = metadata !{%object.Object undef, i1 false, i1 false} +!1 = metadata !{%object.ModuleInfo undef, i1 false, i1 false} Added: llvm/trunk/test/Bitcode/metadata.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Bitcode/metadata.ll?rev=78056&view=auto ============================================================================== --- llvm/trunk/test/Bitcode/metadata.ll (added) +++ llvm/trunk/test/Bitcode/metadata.ll Tue Aug 4 01:00:18 2009 @@ -0,0 +1,6 @@ +; RUN: llvm-as < %s | llvm-dis -f -o /dev/null + +!llvm.foo = !{!0} +!0 = metadata !{i32 42} + at my.str = internal constant [4 x i8] c"foo\00" + From stoklund at 2pi.dk Tue Aug 4 01:05:26 2009 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Tue, 4 Aug 2009 08:05:26 +0200 Subject: [llvm-commits] [llvm] r77989 - in /llvm/trunk: lib/CodeGen/LowerSubregs.cpp lib/CodeGen/MachineInstr.cpp test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll In-Reply-To: References: <200908032008.n73K8goN023448@zion.cs.uiuc.edu> Message-ID: On 03/08/2009, at 23.40, Evan Cheng wrote: >> Finally, clear the undef flag in MachineInstr::addRegisterKilled. >> Undef implies dead and kill implies live, so they cant both be valid. > > That's not necessary. Undef doesn't implies dead. It just means its > garbage and it has no liveness. A zombie!? I am not sure what you mean. Do you mean that a register can have three states: dead-live-undef? Or do you mean that an undef operand can be both dead or live, both are OK? Consider this replacement in lower-subregs: From: %R0 = INSERT_SUBREG %R0, %R0L, 1 To: %R0 = IMPLICIT_DEF %R0L That is what we currently do, and it works when undef implies dead. If undef implies "don't know", we need to do this instead: To: %R0 = IMPLICIT_DEF %R0 This won't work today, because the scavenger ignores all undef operands, and we would get a double-def on %R0L. We could fix the scavenger to also kill operands. But that means that would work just like did before: Kill this register, dead or alive. I am not sure is RegScavenger::backward() is used today, but I think it can only work if we stick to strict rules. What would the state of %R0 be after running backward() over an IMPLICIT_DEF like the one above? /jakob From evan.cheng at apple.com Tue Aug 4 01:06:53 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 3 Aug 2009 23:06:53 -0700 Subject: [llvm-commits] [PATCH] x86 code emitter improvements for object files In-Reply-To: <4060CD96-A773-4622-8471-DF5BFBBCF50D@apple.com> References: <275e64e40907311603k11679adeybd7aa160739b1908@mail.gmail.com> <0C952180-94F8-475D-88ED-8EF214A9D02B@apple.com> <275e64e40908031525i6ceeb331kf20b8393a1fc3918@mail.gmail.com> <4060CD96-A773-4622-8471-DF5BFBBCF50D@apple.com> Message-ID: <914C6F2E-1855-473D-9F8B-981EA44FD063@apple.com> Ok. Evan On Aug 3, 2009, at 3:58 PM, Chris Lattner wrote: > > On Aug 3, 2009, at 3:25 PM, Bruno Cardoso Lopes wrote: > >>> >>> For example. It would be better to base the encoding on this flag >>> than >>> checking things like Is64BitMode, IsPIC etc. >> >> Yes, that's the right way to go. I thought about that when I >> started hacking the >> x86 code emitter, but the problem here is that I'm afraid of >> breaking JIT stuff >> and lose the focus on the elf object code emission. I would be >> happy to >> work on this clean up as a next step after elf is working, but I >> would >> prefer to >> apply this patch for now if that's ok for you. But it's your call >> then. > > Sure, makes sense to me. Evan, are you ok with this patch? > > -Chris From stoklund at 2pi.dk Tue Aug 4 01:07:31 2009 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Tue, 4 Aug 2009 08:07:31 +0200 Subject: [llvm-commits] [PATCH] Accidental on two-address operand In-Reply-To: References: <0CF6B5E2-8826-4AA5-93FF-C30E2D5166A7@apple.com> Message-ID: On 02/08/2009, at 21.52, Eli Friedman wrote: > On Sun, Aug 2, 2009 at 12:18 PM, Jakob Stoklund > Olesen wrote: >> The generated code looks like this: >> >> %reg1032 = MOVENCC_z %reg1031 >> %reg1032 = BITTGL %reg1032, 0 >> >> In this case a kill flag is also added to BITTGL, and >> TwoAddressInstructionPass fails to remove it again. Probably because >> it is expecting SSA code as input? > > AFAIK, all virtual registers are supposed to be SSA until the > two-address pass runs. I will have to create a new vreg in copyRegToReg then. Is there some way of knowing if we are before or after the two-address pass? From evan.cheng at apple.com Tue Aug 4 01:08:37 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 3 Aug 2009 23:08:37 -0700 Subject: [llvm-commits] [PATCH] Dump with LI Indices In-Reply-To: <200908031151.22285.dag@cray.com> References: <200907301710.32176.dag@cray.com> <200908031151.22285.dag@cray.com> Message-ID: <0CA98A62-A2A6-4705-916A-6D78396DE38E@apple.com> I am really not crazy about it especially since it has such a generic name Dump.h. But it's not a big deal. Evan On Aug 3, 2009, at 9:51 AM, David Greene wrote: > On Saturday 01 August 2009 19:57, Evan Cheng wrote: >> Do we really need Dump.h? Since it's Machine specific, perhaps it's >> ok >> just put it in MachineFunction.h? > > But it gets used by MachineBasicBlock and MachineInstr too. > > -Dave > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Tue Aug 4 01:11:16 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 3 Aug 2009 23:11:16 -0700 Subject: [llvm-commits] [llvm] r77940 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86InstrMMX.td test/CodeGen/X86/2009-08-02-mmx-scalar-to-vector.ll test/CodeGen/X86/mmx-bitcast-to-i64.ll In-Reply-To: References: <200908030245.n732jZ5E007719@zion.cs.uiuc.edu> <38a0d8450908021953ld211ee2y426145b3b4312443@mail.gmail.com> Message-ID: <6CD0A61D-FC64-4622-9FB8-F9BF540FF2D6@apple.com> I don't think even Intel knows which is which. Worst opcode names ever. Evan On Aug 2, 2009, at 8:03 PM, Eli Friedman wrote: > On Sun, Aug 2, 2009 at 7:53 PM, Rafael > Espindola wrote: >>> AFAIK, MMX_MOVD64from64rr was originally written as "movd" for >>> compatibility reasons; why are you changing it? >> >> Because it is supposed to move 64 bits. movd is 32 bits, right? >> >> I checked with gcc 4.3 and it uses movq. > > Really? I get two movd's for the following testcase: > > #include > long long a(__m64 x) { return _mm_cvtm64_si64(x); } > __m64 b(long long x) { return _mm_cvtsi64_m64(x); } > > -Eli > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Tue Aug 4 01:13:43 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 3 Aug 2009 23:13:43 -0700 Subject: [llvm-commits] [PATCH] Accidental on two-address operand In-Reply-To: References: <0CF6B5E2-8826-4AA5-93FF-C30E2D5166A7@apple.com> Message-ID: <141B2004-5734-4F38-8FAE-D48C8BAA3D67@apple.com> On Aug 3, 2009, at 11:07 PM, Jakob Stoklund Olesen wrote: > > On 02/08/2009, at 21.52, Eli Friedman wrote: > >> On Sun, Aug 2, 2009 at 12:18 PM, Jakob Stoklund >> Olesen wrote: >>> The generated code looks like this: >>> >>> %reg1032 = MOVENCC_z %reg1031 >>> %reg1032 = BITTGL %reg1032, 0 >>> >>> In this case a kill flag is also added to BITTGL, and >>> TwoAddressInstructionPass fails to remove it again. Probably because >>> it is expecting SSA code as input? >> >> AFAIK, all virtual registers are supposed to be SSA until the >> two-address pass runs. > > I will have to create a new vreg in copyRegToReg then. Sorry, I am still missing some details. Is MOVENCC_z the move instruction being inserted? Why do you need to introduce a VR then? > > Is there some way of knowing if we are before or after the two-address > pass? No. Evan > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From evan.cheng at apple.com Tue Aug 4 01:19:57 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Mon, 3 Aug 2009 23:19:57 -0700 Subject: [llvm-commits] [llvm] r77989 - in /llvm/trunk: lib/CodeGen/LowerSubregs.cpp lib/CodeGen/MachineInstr.cpp test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll In-Reply-To: References: <200908032008.n73K8goN023448@zion.cs.uiuc.edu> Message-ID: <85AC6E8F-168F-441E-B591-59C3B543F6EE@apple.com> On Aug 3, 2009, at 11:05 PM, Jakob Stoklund Olesen wrote: > > On 03/08/2009, at 23.40, Evan Cheng wrote: > >>> Finally, clear the undef flag in MachineInstr::addRegisterKilled. >>> Undef implies dead and kill implies live, so they cant both be >>> valid. >> >> That's not necessary. Undef doesn't implies dead. It just means its >> garbage and it has no liveness. > > A zombie!? > > I am not sure what you mean. > Do you mean that a register can have three states: dead-live-undef? > Or do you mean that an undef operand can be both dead or live, both > are OK? Undef operands are "don't care". :-) It would have been cleaner to have an Undef machineoperand rather than a register machineoperand that's undef. But we still need to assign registers to them so the instructions can be translated to machine code. > > Consider this replacement in lower-subregs: > > From: %R0 = INSERT_SUBREG %R0, %R0L, 1 > To: %R0 = IMPLICIT_DEF %R0L > > That is what we currently do, and it works when undef implies dead. If > undef implies "don't know", we need to do this instead: > > To: %R0 = IMPLICIT_DEF %R0 > > This won't work today, because the scavenger ignores all undef > operands, and we would get a double-def on %R0L. We could fix the > scavenger to also kill operands. But that means that > would work just like did before: Kill this > register, dead or alive. I see. subreg lowering could have just remove the undef marker. What my comment meant was addRegisterKilled really didn't have to unset the undef marker. It needed to be removed in this special case. I think a cleaner solution would have been to introduce a target specific instruction KILL that just kills a register. But that's future work. > > I am not sure is RegScavenger::backward() is used today, but I think > it can only work if we stick to strict rules. What would the state of > %R0 be after running backward() over an IMPLICIT_DEF like the one > above? I agree in this case the undef marker must be removed. The only argument who should remove it. Evan > > /jakob > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From stoklund at 2pi.dk Tue Aug 4 01:20:34 2009 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Tue, 4 Aug 2009 08:20:34 +0200 Subject: [llvm-commits] [PATCH] Accidental on two-address operand In-Reply-To: <141B2004-5734-4F38-8FAE-D48C8BAA3D67@apple.com> References: <0CF6B5E2-8826-4AA5-93FF-C30E2D5166A7@apple.com> <141B2004-5734-4F38-8FAE-D48C8BAA3D67@apple.com> Message-ID: <474EE964-F4A4-4EB2-BB19-5FB33E81B310@2pi.dk> On 04/08/2009, at 08.13, Evan Cheng wrote: > > On Aug 3, 2009, at 11:07 PM, Jakob Stoklund Olesen wrote: > >> >> On 02/08/2009, at 21.52, Eli Friedman wrote: >> >>> On Sun, Aug 2, 2009 at 12:18 PM, Jakob Stoklund >>> Olesen wrote: >>>> The generated code looks like this: >>>> >>>> %reg1032 = MOVENCC_z %reg1031 >>>> %reg1032 = BITTGL %reg1032, 0 >>>> >>>> In this case a kill flag is also added to BITTGL, and >>>> TwoAddressInstructionPass fails to remove it again. Probably >>>> because >>>> it is expecting SSA code as input? >>> >>> AFAIK, all virtual registers are supposed to be SSA until the >>> two-address pass runs. >> >> I will have to create a new vreg in copyRegToReg then. > > Sorry, I am still missing some details. Is MOVENCC_z the move > instruction being inserted? Why do you need to introduce a VR then? No, copyRegToReg inserts both instructions. It cannot do the move in just one instruction. From anton at korobeynikov.info Tue Aug 4 01:44:41 2009 From: anton at korobeynikov.info (Anton Korobeynikov) Date: Tue, 4 Aug 2009 10:44:41 +0400 Subject: [llvm-commits] [PATCH] Accidental on two-address operand In-Reply-To: <474EE964-F4A4-4EB2-BB19-5FB33E81B310@2pi.dk> References: <0CF6B5E2-8826-4AA5-93FF-C30E2D5166A7@apple.com> <141B2004-5734-4F38-8FAE-D48C8BAA3D67@apple.com> <474EE964-F4A4-4EB2-BB19-5FB33E81B310@2pi.dk> Message-ID: Hello, Jakob > No, copyRegToReg inserts both instructions. It cannot do the move in > just one instruction. Why don't use a pseudo instruction for now? I found it's the only way to go when one wants, e.g. to copy regpairs via 2 reg-reg moves. Too many code assumes that the last instruction being inserted is a 'real move' and all others are just some unimportant stuff. -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University From stoklund at 2pi.dk Tue Aug 4 01:54:23 2009 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Tue, 4 Aug 2009 08:54:23 +0200 Subject: [llvm-commits] [PATCH] Accidental on two-address operand In-Reply-To: References: <0CF6B5E2-8826-4AA5-93FF-C30E2D5166A7@apple.com> <141B2004-5734-4F38-8FAE-D48C8BAA3D67@apple.com> <474EE964-F4A4-4EB2-BB19-5FB33E81B310@2pi.dk> Message-ID: <785AA75A-4BAF-4C8C-9264-B8A292F88F85@2pi.dk> On 04/08/2009, at 08.44, Anton Korobeynikov wrote: > Hello, Jakob > >> No, copyRegToReg inserts both instructions. It cannot do the move in >> just one instruction. > Why don't use a pseudo instruction for now? I found it's the only way > to go when one wants, e.g. to copy regpairs via 2 reg-reg moves. Too > many code assumes that the last instruction being inserted is a 'real > move' and all others are just some unimportant stuff. That would work. In your case, have you tried adding imp-def/imp-use operands of the real super register? Take a look at BlackfinRegisterInfo::loadConstant where an i32 constant is loaded into a register by loading the two halves with i16 constants. From anton at korobeynikov.info Tue Aug 4 02:04:11 2009 From: anton at korobeynikov.info (Anton Korobeynikov) Date: Tue, 4 Aug 2009 11:04:11 +0400 Subject: [llvm-commits] [PATCH] Accidental on two-address operand In-Reply-To: <785AA75A-4BAF-4C8C-9264-B8A292F88F85@2pi.dk> References: <0CF6B5E2-8826-4AA5-93FF-C30E2D5166A7@apple.com> <141B2004-5734-4F38-8FAE-D48C8BAA3D67@apple.com> <474EE964-F4A4-4EB2-BB19-5FB33E81B310@2pi.dk> <785AA75A-4BAF-4C8C-9264-B8A292F88F85@2pi.dk> Message-ID: Hello, Jakob > In your case, have you tried adding imp-def/imp-use operands of the > real super register? Yes. Afair, some codes really assumes that only 1 instruction is issued by copyRegToReg. See, e.g. LowerSubregInstructionsPass::LowerExtract and around. There were other places, I don't remember offhand, but basically some codes expects that copyRegToReg can issue multiple instructions (mostly DAG lowering stuff) and others - not. -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University From evan.cheng at apple.com Tue Aug 4 03:34:49 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 04 Aug 2009 08:34:49 -0000 Subject: [llvm-commits] [llvm] r78057 - /llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Message-ID: <200908040834.n748YsZB023213@zion.cs.uiuc.edu> Author: evancheng Date: Tue Aug 4 03:34:18 2009 New Revision: 78057 URL: http://llvm.org/viewvc/llvm-project?rev=78057&view=rev Log: Thumb2 does not have ib (increment before) and da (decrement after) forms of ldm / stm. Modified: llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Modified: llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp?rev=78057&r1=78056&r2=78057&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Tue Aug 4 03:34:18 2009 @@ -176,13 +176,19 @@ ARM_AM::AMSubMode Mode = ARM_AM::ia; bool isAM4 = isi32Load(Opcode) || isi32Store(Opcode); - if (isAM4 && Offset == 4) + if (isAM4 && Offset == 4) { + if (isThumb2) + // Thumb2 does not support ldmib / stmib. + return false; Mode = ARM_AM::ib; - else if (isAM4 && Offset == -4 * (int)NumRegs + 4) + } else if (isAM4 && Offset == -4 * (int)NumRegs + 4) { + if (isThumb2) + // Thumb2 does not support ldmda / stmda. + return false; Mode = ARM_AM::da; - else if (isAM4 && Offset == -4 * (int)NumRegs) + } else if (isAM4 && Offset == -4 * (int)NumRegs) { Mode = ARM_AM::db; - else if (Offset != 0) { + } else if (Offset != 0) { // If starting offset isn't zero, insert a MI to materialize a new base. // But only do so if it is cost effective, i.e. merging more than two // loads / stores. From nicolas.geoffray at lip6.fr Tue Aug 4 05:33:53 2009 From: nicolas.geoffray at lip6.fr (Nicolas Geoffray) Date: Tue, 04 Aug 2009 12:33:53 +0200 Subject: [llvm-commits] [llvm] r77706 - in /llvm/trunk: include/llvm/Support/Annotation.h lib/Support/Annotation.cpp In-Reply-To: <1ED15384-C3EE-4FD7-9ECA-041D11C0973D@apple.com> References: <200907311836.n6VIaP2r014052@zion.cs.uiuc.edu> <4A76A75C.4040509@lip6.fr> <0BECC467-15D3-4E73-8085-BE55E8A4133B@apple.com> <4A7718D5.50604@lip6.fr> <1ED15384-C3EE-4FD7-9ECA-041D11C0973D@apple.com> Message-ID: <4A780E91.7060400@lip6.fr> Hi Dan, Dan Gohman wrote: > What if you put a map member in your ModuleProvider subclass? > Yes, that's what I will end up doing. By doing so, I must change lots of things in vmkit, as I was tolerating functions of different modules to call each other directly. This prevents using the verifier, but works fine otherwise! But that's just me being lazy :) > That shouldn't require any locking beyond whatever is already > present to protect the Module itself. Indeed. Nice catch. > Does vmkit assign contexts > to Functions when the Module is created? If so, all of the map's > allocation would happen at the same time, and materializeFunction > calls wouldn't see any additional allocations. > Not really, functions are created lazily, so new functions may be created after creation of the context. Thanks for having thought about it! Nicolas > Dan > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From asl at math.spbu.ru Tue Aug 4 05:47:33 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Tue, 04 Aug 2009 10:47:33 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r78058 - /llvm-gcc-4.2/trunk/gcc/config/arm/lib1funcs.asm Message-ID: <200908041047.n74Alb0n032760@zion.cs.uiuc.edu> Author: asl Date: Tue Aug 4 05:47:10 2009 New Revision: 78058 URL: http://llvm.org/viewvc/llvm-project?rev=78058&view=rev Log: Unbreak thumb version of the routine Modified: llvm-gcc-4.2/trunk/gcc/config/arm/lib1funcs.asm Modified: llvm-gcc-4.2/trunk/gcc/config/arm/lib1funcs.asm URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/arm/lib1funcs.asm?rev=78058&r1=78057&r2=78058&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/arm/lib1funcs.asm (original) +++ llvm-gcc-4.2/trunk/gcc/config/arm/lib1funcs.asm Tue Aug 4 05:47:10 2009 @@ -1264,7 +1264,8 @@ .code 32 FUNC_START div0 - stmfd sp!, {r1, lr} + /* LLVM LOCAL mainline */ + do_push {r1, lr} mov r0, #SIGFPE bl SYM(raise) __PLT__ /* APPLE LOCAL ARM MACH assembler */ From asl at math.spbu.ru Tue Aug 4 06:13:03 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Tue, 04 Aug 2009 11:13:03 -0000 Subject: [llvm-commits] [llvm] r78059 - /llvm/trunk/lib/Target/ARM/ARMTargetObjectFile.h Message-ID: <200908041113.n74BD5a7001030@zion.cs.uiuc.edu> Author: asl Date: Tue Aug 4 06:12:51 2009 New Revision: 78059 URL: http://llvm.org/viewvc/llvm-project?rev=78059&view=rev Log: Fix a typo - this unbreaks llvm-gcc build on arm Modified: llvm/trunk/lib/Target/ARM/ARMTargetObjectFile.h Modified: llvm/trunk/lib/Target/ARM/ARMTargetObjectFile.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetObjectFile.h?rev=78059&r1=78058&r2=78059&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMTargetObjectFile.h (original) +++ llvm/trunk/lib/Target/ARM/ARMTargetObjectFile.h Tue Aug 4 06:12:51 2009 @@ -25,10 +25,10 @@ // That will allow not treating these as "directives". if (TM.getSubtarget().isAAPCS_ABI()) { StaticCtorSection = - getOrCreateSection("\t.section .init_array,\"aw\",%init_array", false, + getOrCreateSection(".init_array,\"aw\",%init_array", false, SectionKind::getDataRel()); StaticDtorSection = - getOrCreateSection("\t.section .fini_array,\"aw\",%fini_array", false, + getOrCreateSection(".fini_array,\"aw\",%fini_array", false, SectionKind::getDataRel()); } } From asl at math.spbu.ru Tue Aug 4 06:18:49 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Tue, 04 Aug 2009 11:18:49 -0000 Subject: [llvm-commits] [llvm] r78060 - /llvm/trunk/lib/Target/ARM/ARMTargetObjectFile.h Message-ID: <200908041118.n74BIqSs001194@zion.cs.uiuc.edu> Author: asl Date: Tue Aug 4 06:18:31 2009 New Revision: 78060 URL: http://llvm.org/viewvc/llvm-project?rev=78060&view=rev Log: Ooops, I was too fast to commit the wrong fix :( Modified: llvm/trunk/lib/Target/ARM/ARMTargetObjectFile.h Modified: llvm/trunk/lib/Target/ARM/ARMTargetObjectFile.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetObjectFile.h?rev=78060&r1=78059&r2=78060&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMTargetObjectFile.h (original) +++ llvm/trunk/lib/Target/ARM/ARMTargetObjectFile.h Tue Aug 4 06:18:31 2009 @@ -25,10 +25,10 @@ // That will allow not treating these as "directives". if (TM.getSubtarget().isAAPCS_ABI()) { StaticCtorSection = - getOrCreateSection(".init_array,\"aw\",%init_array", false, + getOrCreateSection("\t.section .init_array,\"aw\",%init_array", true, SectionKind::getDataRel()); StaticDtorSection = - getOrCreateSection(".fini_array,\"aw\",%fini_array", false, + getOrCreateSection("\t.section .fini_array,\"aw\",%fini_array", true, SectionKind::getDataRel()); } } From asl at math.spbu.ru Tue Aug 4 06:32:30 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Tue, 04 Aug 2009 11:32:30 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r78061 - /llvm-gcc-4.2/trunk/gcc/config/arm/linux-eabi.h Message-ID: <200908041132.n74BWX0H001791@zion.cs.uiuc.edu> Author: asl Date: Tue Aug 4 06:32:20 2009 New Revision: 78061 URL: http://llvm.org/viewvc/llvm-project?rev=78061&view=rev Log: Use proper variant of swi instruction, since syscall number is passed in r7 register Modified: llvm-gcc-4.2/trunk/gcc/config/arm/linux-eabi.h Modified: llvm-gcc-4.2/trunk/gcc/config/arm/linux-eabi.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/arm/linux-eabi.h?rev=78061&r1=78060&r2=78061&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/arm/linux-eabi.h (original) +++ llvm-gcc-4.2/trunk/gcc/config/arm/linux-eabi.h Tue Aug 4 06:32:20 2009 @@ -79,7 +79,7 @@ register unsigned long _end __asm ("a2") = (unsigned long) (END); \ register unsigned long _flg __asm ("a3") = 0; \ register unsigned long _scno __asm ("r7") = 0xf0002; \ - __asm __volatile ("swi 0x9f0002 @ sys_cacheflush" \ + __asm __volatile ("swi 0 @ sys_cacheflush" \ : "=r" (_beg) \ : "0" (_beg), "r" (_end), "r" (_flg), "r" (_scno)); \ } From aaronngray.lists at googlemail.com Tue Aug 4 07:22:12 2009 From: aaronngray.lists at googlemail.com (Aaron Gray) Date: Tue, 4 Aug 2009 13:22:12 +0100 Subject: [llvm-commits] [PATCH] x86 code emitter improvements for object files In-Reply-To: <275e64e40908031525i6ceeb331kf20b8393a1fc3918@mail.gmail.com> References: <275e64e40907311603k11679adeybd7aa160739b1908@mail.gmail.com> <0C952180-94F8-475D-88ED-8EF214A9D02B@apple.com> <275e64e40908031525i6ceeb331kf20b8393a1fc3918@mail.gmail.com> Message-ID: <9719867c0908040522o2e8c5986y9d8cdb2fa6b99c76@mail.gmail.com> 2009/8/3 Bruno Cardoso Lopes > On Mon, Aug 3, 2009 at 4:00 PM, Chris Lattner wrote: > Yes, that's the right way to go. I thought about that when I started > hacking the > x86 code emitter, but the problem here is that I'm afraid of breaking JIT > stuff > and lose the focus on the elf object code emission. I would be happy to > work on this clean up as a next step after elf is working, but I would > prefer to > apply this patch for now if that's ok for you. But it's your call then. > Tests out fine on my diag program. Thanks, Aaron -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090804/f2305fc7/attachment.html From dag at cray.com Tue Aug 4 08:46:35 2009 From: dag at cray.com (David Greene) Date: Tue, 4 Aug 2009 08:46:35 -0500 Subject: [llvm-commits] [PATCH] Dump with LI Indices In-Reply-To: <0CA98A62-A2A6-4705-916A-6D78396DE38E@apple.com> References: <200907301710.32176.dag@cray.com> <200908031151.22285.dag@cray.com> <0CA98A62-A2A6-4705-916A-6D78396DE38E@apple.com> Message-ID: <200908040846.35455.dag@cray.com> On Tuesday 04 August 2009 01:08, Evan Cheng wrote: > I am really not crazy about it especially since it has such a generic > name Dump.h. But it's not a big deal. I'm open to a better naming. I'm not particulrly fond of Dump.h either. -Dave From dag at cray.com Tue Aug 4 08:50:19 2009 From: dag at cray.com (David Greene) Date: Tue, 4 Aug 2009 08:50:19 -0500 Subject: [llvm-commits] [llvm] r77940 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86InstrMMX.td test/CodeGen/X86/2009-08-02-mmx-scalar-to-vector.ll test/CodeGen/X86/mmx-bitcast-to-i64.ll In-Reply-To: References: <200908030245.n732jZ5E007719@zion.cs.uiuc.edu> <38a0d8450908022033w46f17d6dy2f403ad3c1624653@mail.gmail.com> Message-ID: <200908040850.19860.dag@cray.com> On Monday 03 August 2009 00:08, Eli Friedman wrote: > On Sun, Aug 2, 2009 at 8:33 PM, Rafael Espindola wrote: > >> I don't see any connection between the way it's written and for the > >> assembler and the way the JIT deals with it. ?And you still haven't > >> addressed the issue, which is that I'm pretty sure it was done for > >> compatibility reasons. ?If you don't know anything about that, I would > >> suggest switching it back to movd. > > > > Do you know what we are trying to be compatible with? > > I looked it up; we are trying to be compatible with OS X. See > http://lists.cs.uiuc.edu/pipermail/llvmdev/2007-December/011849.html . This *still* isn't fixed? This is a real problem. movq is the right thing to use for rr instructions. Why can't anyone fix the broken Leopard assembler? -Dave From dag at cray.com Tue Aug 4 08:50:55 2009 From: dag at cray.com (David Greene) Date: Tue, 4 Aug 2009 08:50:55 -0500 Subject: [llvm-commits] [llvm] r77940 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86InstrMMX.td test/CodeGen/X86/2009-08-02-mmx-scalar-to-vector.ll test/CodeGen/X86/mmx-bitcast-to-i64.ll In-Reply-To: <6CD0A61D-FC64-4622-9FB8-F9BF540FF2D6@apple.com> References: <200908030245.n732jZ5E007719@zion.cs.uiuc.edu> <6CD0A61D-FC64-4622-9FB8-F9BF540FF2D6@apple.com> Message-ID: <200908040850.55556.dag@cray.com> On Tuesday 04 August 2009 01:11, Evan Cheng wrote: > I don't think even Intel knows which is which. Worst opcode names ever. Actually, you can thank AMD for that one. Stupid, stupid, stupid! -Dave From dag at cray.com Tue Aug 4 08:54:03 2009 From: dag at cray.com (David Greene) Date: Tue, 4 Aug 2009 08:54:03 -0500 Subject: [llvm-commits] [llvm] r77940 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86InstrMMX.td test/CodeGen/X86/2009-08-02-mmx-scalar-to-vector.ll test/CodeGen/X86/mmx-bitcast-to-i64.ll In-Reply-To: <200908040850.19860.dag@cray.com> References: <200908030245.n732jZ5E007719@zion.cs.uiuc.edu> <200908040850.19860.dag@cray.com> Message-ID: <200908040854.04070.dag@cray.com> On Tuesday 04 August 2009 08:50, David Greene wrote: > On Monday 03 August 2009 00:08, Eli Friedman wrote: > > On Sun, Aug 2, 2009 at 8:33 PM, Rafael Espindola > > wrote: > > >> I don't see any connection between the way it's written and for the > > >> assembler and the way the JIT deals with it. ?And you still haven't > > >> addressed the issue, which is that I'm pretty sure it was done for > > >> compatibility reasons. ?If you don't know anything about that, I would > > >> suggest switching it back to movd. > > > > > > Do you know what we are trying to be compatible with? > > > > I looked it up; we are trying to be compatible with OS X. See > > http://lists.cs.uiuc.edu/pipermail/llvmdev/2007-December/011849.html . > > This *still* isn't fixed? > > This is a real problem. movq is the right thing to use for rr > instructions. Actually, the problem is with mr and rm variants because the assembler can't know to move 64 bits without a rex prefix. -Dave From stoklund at chora.dk Tue Aug 4 03:24:35 2009 From: stoklund at chora.dk (Jakob Stoklund Olesen) Date: Tue, 04 Aug 2009 10:24:35 +0200 Subject: [llvm-commits] [PATCH] Accidental on two-address operand References: <0CF6B5E2-8826-4AA5-93FF-C30E2D5166A7@apple.com> <141B2004-5734-4F38-8FAE-D48C8BAA3D67@apple.com> <474EE964-F4A4-4EB2-BB19-5FB33E81B310@2pi.dk> <785AA75A-4BAF-4C8C-9264-B8A292F88F85@2pi.dk> Message-ID: <87iqh4rnp8.fsf@chora.dk> Anton Korobeynikov writes: > Hello, Jakob > >> In your case, have you tried adding imp-def/imp-use operands of the >> real super register? > Yes. Afair, some codes really assumes that only 1 instruction is > issued by copyRegToReg. See, e.g. > LowerSubregInstructionsPass::LowerExtract and around. Yes, there is some dubious code around there. I am looking into it. > There were other > places, I don't remember offhand, but basically some codes expects > that copyRegToReg can issue multiple instructions (mostly DAG lowering > stuff) and others - not. LowerSubregInstructionsPass currently assumes that the source register is being used, and the destination register is being defined by the copyRegToReg instructions. It may also add implicit operands to the last instruction emitted - that may be a bit dubious come to think of it. If it doesn't work with multiple copy instructions, that is a bug IMHO. /jakob From stoklund at chora.dk Tue Aug 4 04:13:46 2009 From: stoklund at chora.dk (Jakob Stoklund Olesen) Date: Tue, 04 Aug 2009 11:13:46 +0200 Subject: [llvm-commits] [llvm] r77989 - in /llvm/trunk: lib/CodeGen/LowerSubregs.cpp lib/CodeGen/MachineInstr.cpp test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll References: <200908032008.n73K8goN023448@zion.cs.uiuc.edu> <85AC6E8F-168F-441E-B591-59C3B543F6EE@apple.com> Message-ID: <87eirsrlf9.fsf@chora.dk> Evan Cheng writes: > On Aug 3, 2009, at 11:05 PM, Jakob Stoklund Olesen wrote: > >> >> On 03/08/2009, at 23.40, Evan Cheng wrote: >> >>>> Finally, clear the undef flag in MachineInstr::addRegisterKilled. >>>> Undef implies dead and kill implies live, so they cant both be >>>> valid. >>> >>> That's not necessary. Undef doesn't implies dead. It just means its >>> garbage and it has no liveness. >> >> A zombie!? >> >> I am not sure what you mean. >> Do you mean that a register can have three states: dead-live-undef? >> Or do you mean that an undef operand can be both dead or live, both >> are OK? > > Undef operands are "don't care". :-) It would have been cleaner to > have an Undef machineoperand rather than a register machineoperand > that's undef. But we still need to assign registers to them so the > instructions can be translated to machine code. OK, here is the example that caused me to make that change: llvm-as < Blackfin/i8mem.ll | Debug/bin/llc -march=bfin -debug We have this code: %R0 = LOAD32p_8z %P0, Mem:LD(1,1) [i8_l + 0] %R0L = EXTRACT_SUBREG %R0, 1 %R0 = INSERT_SUBREG %R0, %R0L, 1 The code is stupid because of missing Blackfin peepholes. Please ignore that. It should be correct. Now look what happens without my fix: ********** LOWERING SUBREG INSTRS ********** ********** Function: i8_ls subreg: CONVERTING: %R0L = EXTRACT_SUBREG %R0, 1 subreg: eliminated! subreg: killed here: %R0 = INSERT_SUBREG %R0, %R0L, 1 LowerExtract moves the %R0 flag to the INSERT_SUBREG below. Because INSERT_SUBREG is a two-addr instruction, the kill flag on %R0 is implicit. (I fixed that last week). Then: subreg: CONVERTING: %R0 = INSERT_SUBREG %R0, %R0L, 1 subreg: %R0 = IMPLICIT_DEF %R0L And that is wrong because LowerInsert assumed %R0 was dead. We get a double-def of %R0. When the flag is removed by MachineInstr::addRegisterKilled, we get this instead: subreg: CONVERTING: %R0 = INSERT_SUBREG %R0, %R0L, 1 subreg: eliminated! Which is correct. With your semantics for , I think we would need to do this: subreg: CONVERTING: %R0 = INSERT_SUBREG %R0, %R0L, 1 subreg: %R0 = IMPLICIT_DEF %R0 This won't work now because the regscavenger ignores all operands, and we still get the double-def assert. That can be fixed, of course. Note that if we do this, %R0 means "kill %R0, dead or alive". That is what you wanted to avoid, I think. It also means that RegScavenger::backward probably can't work properly - Would %R0 be dead or alive after running backwards over %R0? Could we make it work with stricter semantics? Let "undef implies dead" be the rule? Then this: %R0 = IMPLICIT_DEF would essentially mean the same as this: %R0 = IMPLICIT_DEF And this: %R0 = INSERT_SUBREG %R0, %R0L, 1 would require %R0 to be dead. I think that could work, but there may be issues in livevars that I don't understand. Strict semantics makes it a lot easier to reason about register liveness when transforming the code in LowerSubregs and other places. From stoklund at chora.dk Tue Aug 4 05:12:12 2009 From: stoklund at chora.dk (Jakob Stoklund Olesen) Date: Tue, 04 Aug 2009 12:12:12 +0200 Subject: [llvm-commits] [llvm] r77989 - in /llvm/trunk: lib/CodeGen/LowerSubregs.cpp lib/CodeGen/MachineInstr.cpp test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll References: <200908032008.n73K8goN023448@zion.cs.uiuc.edu> <85AC6E8F-168F-441E-B591-59C3B543F6EE@apple.com> Message-ID: <87ab2fsxab.fsf@chora.dk> Evan Cheng writes: > I agree in this case the undef marker must be removed. The only > argument who should remove it. Actually, this is a bad example because LowerExtract's behaviour is wrong for another reason. Consider this code: %R0L = EXTRACT_SUBREG %R0, 1 %R0H = MOVE16i 12345 %P0 = STORE16_inc %P0, %R0H %P0 = STORE16_inc %P0, %R0L LowerExtract eliminates EXTRACT_SUBREG and moves the %R0 flag to the last instruction (where %R0L is killed): %R0H = MOVE16i 12345 %P0 = STORE16_inc %P0, %R0H %P0 = STORE16_inc %P0, %R0L, %R0 This means that the live range of %R0 has been extended with two instructions, and we get a double-def when defining the other subregister %R0H. I'll see if I can produce a test case. There is still an issue with the semantics. Look at this: %R0 = INSERT_SUBREG %R0, %R1H, 1 LowerInsert replaces it with %R0L = COPY16 %R1H, %R0, %R0 Should there be an %R0 or not? If %R0 is live it is required. If %R0 is dead it would be illegal. There are two choices: 1) We allow %R0 with "soft semantics". 2) We require "undef implies dead" so we can remove the . From c-d.hailfinger.devel.2006 at gmx.net Tue Aug 4 09:31:36 2009 From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger) Date: Tue, 04 Aug 2009 16:31:36 +0200 Subject: [llvm-commits] [PATCH] clang: Add 32/64bit library search paths for Linux Message-ID: <4A784648.6050609@gmx.net> Linux distributions have various library search paths which vary across distributions. /lib and /usr/lib/ are either 32 bit or 64 bit, depending on whether you run something from the Debian family or openSUSE/RedHat family. /lib32 and /usr/lib32 exist in some distributions (usually those which have /lib for 64 bit code, e.g. Debian on x86_64). /lib64 and /usr/lib64 exist in other distributions (usually those which have /lib for 32 bit code, e.g. openSUSE on x86_64). Add all those paths to the default clang library search path. This fixes Bug 4140 for x86-64 non-Debian distributions and for 32 bit compilation on x86-64 Debian. This is my first patch, so I appreciate feedback about what I can improve. The patch is against cfe trunk. Regards, Carl-Daniel -- http://www.hailfinger.org/ -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: clang_lib_searchpath_3264bit.diff Url: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090804/3769eceb/attachment.pl From brukman+llvm at gmail.com Tue Aug 4 10:47:38 2009 From: brukman+llvm at gmail.com (Misha Brukman) Date: Tue, 04 Aug 2009 15:47:38 -0000 Subject: [llvm-commits] [llvm] r78065 - /llvm/trunk/utils/crosstool/create-snapshots.sh Message-ID: <200908041547.n74FlfYB009567@zion.cs.uiuc.edu> Author: brukman Date: Tue Aug 4 10:47:18 2009 New Revision: 78065 URL: http://llvm.org/viewvc/llvm-project?rev=78065&view=rev Log: * Use "svn export" instead of "svn co" and avoid cleaning up .svn dirs * Use "svn info" to get last revision in repo, will get matching tarballs * Now run "svn -q" since "svn info" tells us the revision number Modified: llvm/trunk/utils/crosstool/create-snapshots.sh Modified: llvm/trunk/utils/crosstool/create-snapshots.sh URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/crosstool/create-snapshots.sh?rev=78065&r1=78064&r2=78065&view=diff ============================================================================== --- llvm/trunk/utils/crosstool/create-snapshots.sh (original) +++ llvm/trunk/utils/crosstool/create-snapshots.sh Tue Aug 4 10:47:18 2009 @@ -11,31 +11,31 @@ set -o nounset set -o errexit -readonly REV="${1:-HEAD}" +readonly LLVM_PROJECT_SVN="http://llvm.org/svn/llvm-project" -runOnModule() { +getLatestRevisionFromSVN() { + svn info ${LLVM_PROJECT_SVN} | egrep ^Revision | sed 's/^Revision: //' +} + +readonly REV="${1:-$(getLatestRevisionFromSVN)}" + +createTarballFromSVN() { local module=$1 local log="${module}.log" - echo "Running: svn co -r ${REV} ${module}; log in ${log}" - svn co -r ${REV} http://llvm.org/svn/llvm-project/${module}/trunk ${module} \ - > ${log} 2>&1 - - # Delete all the ".svn" dirs; they take quite a lot of space. - echo "Cleaning up .svn dirs" - find ${module} -type d -name \.svn -print0 | xargs -0 /bin/rm -rf + echo "Running: svn export -r ${REV} ${module}; log in ${log}" + svn -q export -r ${REV} ${LLVM_PROJECT_SVN}/${module}/trunk \ + ${module} > ${log} 2>&1 # Create "module-revision.tar.bz2" packages from the SVN checkout dirs. - local revision=$(grep "Checked out revision" ${log} | \ - sed 's/[^0-9]\+\([0-9]\+\)[^0-9]\+/\1/') - local tarball="${module}-${revision}.tar.bz2" + local tarball="${module}-${REV}.tar.bz2" echo "Creating tarball: ${tarball}" tar cjf ${tarball} ${module} - echo "Cleaning SVN checkout dir ${module}" + echo "Cleaning up '${module}'" rm -rf ${module} ${log} } for module in "llvm" "llvm-gcc-4.2"; do - runOnModule ${module} + createTarballFromSVN ${module} done From anton at korobeynikov.info Tue Aug 4 11:02:55 2009 From: anton at korobeynikov.info (Anton Korobeynikov) Date: Tue, 4 Aug 2009 20:02:55 +0400 Subject: [llvm-commits] [PATCH] Accidental on two-address operand In-Reply-To: <87iqh4rnp8.fsf@chora.dk> References: <141B2004-5734-4F38-8FAE-D48C8BAA3D67@apple.com> <474EE964-F4A4-4EB2-BB19-5FB33E81B310@2pi.dk> <785AA75A-4BAF-4C8C-9264-B8A292F88F85@2pi.dk> <87iqh4rnp8.fsf@chora.dk> Message-ID: Hello, Jakob > LowerSubregInstructionsPass currently assumes that the source register > is being used, and the destination register is being defined by the > copyRegToReg instructions. It may also add implicit operands to the last > instruction emitted - that may be a bit dubious come to think of it. Yeah, that's not true for the code emitted for regpairs. E.g. on systemz 64bit regpair is formed from low 32 bits of 2 consecutive registers, so one 64 bit move should be turned into 2 32 bit moves... -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University From bob.wilson at apple.com Tue Aug 4 11:06:41 2009 From: bob.wilson at apple.com (Bob Wilson) Date: Tue, 4 Aug 2009 09:06:41 -0700 Subject: [llvm-commits] [llvm] r78025 - in /llvm/trunk/lib/Target/ARM: ARMISelLowering.cpp ARMISelLowering.h ARMInstrNEON.td In-Reply-To: <4B0840D7-EB4A-470F-B8A3-28F7C6404010@apple.com> References: <200908040036.n740aHAn000672@zion.cs.uiuc.edu> <4B0840D7-EB4A-470F-B8A3-28F7C6404010@apple.com> Message-ID: <2248FEDC-254C-46E4-B385-04F421421281@apple.com> On Aug 3, 2009, at 6:21 PM, Evan Cheng wrote: > On Aug 3, 2009, at 5:36 PM, Bob Wilson wrote: > >> >> +static SDValue LowerNeonVLDIntrinsic(SDValue Op, SelectionDAG &DAG, >> + unsigned Opcode, unsigned >> NumVecs) { >> + SDNode *Node = Op.getNode(); >> + MVT VT = Node->getValueType(0); >> + DebugLoc dl = Op.getDebugLoc(); >> + >> + if (!VT.is64BitVector()) >> + return SDValue(); // unimplemented >> + >> + SDValue Ops[] = { Node->getOperand(0), >> + Node->getOperand(1) }; >> + SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Flag); >> + SDValue Result = DAG.getNode(Opcode, dl, Tys, Ops, 2); >> + >> + static const unsigned VLDRegs[] = { >> + ARM::D0, ARM::D1, ARM::D2, ARM::D3 >> + }; > > Is this a temporary solution? Perhaps we want to do a post-isel pre- > allocation pass to be a little bit smarter about what registers to > pre- > allocate to? I was just doing it that way because you told me to do that (e.g., http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20090706/080830.html ). When we talked about it in person, it was my understanding that your plan was to do something very simple when legalizing the intrinsics and then later on we would investigate smarter solutions. However, having gotten this far with it , I am not very happy with allocating the registers during isel lowering. The CopyToReg and CopyFromReg nodes are a hassle, and taking the next step of generating machine instructions seems like it will be even more awkward. I'm going to try adding a post-isel pre-allocation pass, as you suggest. Take 3. From sabre at nondot.org Tue Aug 4 11:13:10 2009 From: sabre at nondot.org (Chris Lattner) Date: Tue, 04 Aug 2009 16:13:10 -0000 Subject: [llvm-commits] [llvm] r78066 - in /llvm/trunk: lib/Target/TargetLoweringObjectFile.cpp test/CodeGen/X86/global-sections.ll Message-ID: <200908041613.n74GDB0O010342@zion.cs.uiuc.edu> Author: lattner Date: Tue Aug 4 11:13:09 2009 New Revision: 78066 URL: http://llvm.org/viewvc/llvm-project?rev=78066&view=rev Log: Add support emiting for 2/4 byte mergable strings to the ".rodata.str*" section on ELF targets. Modified: llvm/trunk/lib/Target/TargetLoweringObjectFile.cpp llvm/trunk/test/CodeGen/X86/global-sections.ll Modified: llvm/trunk/lib/Target/TargetLoweringObjectFile.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetLoweringObjectFile.cpp?rev=78066&r1=78065&r2=78066&view=diff ============================================================================== --- llvm/trunk/lib/Target/TargetLoweringObjectFile.cpp (original) +++ llvm/trunk/lib/Target/TargetLoweringObjectFile.cpp Tue Aug 4 11:13:09 2009 @@ -79,18 +79,33 @@ return true; } -static bool isConstantString(const Constant *C) { +/// IsNullTerminatedString - Return true if the specified constant (which is +/// known to have a type that is an array of 1/2/4 byte elements) ends with a +/// nul value and contains no other nuls in it. +static bool IsNullTerminatedString(const Constant *C) { + const ArrayType *ATy = cast(C->getType()); + // First check: is we have constant array of i8 terminated with zero - const ConstantArray *CVA = dyn_cast(C); - // Check, if initializer is a null-terminated string - if (CVA && CVA->isCString()) + if (const ConstantArray *CVA = dyn_cast(C)) { + if (ATy->getNumElements() == 0) return false; + + ConstantInt *Null = + dyn_cast(CVA->getOperand(ATy->getNumElements()-1)); + if (Null == 0 || Null->getZExtValue() != 0) + return false; // Not null terminated. + + // Verify that the null doesn't occur anywhere else in the string. + for (unsigned i = 0, e = ATy->getNumElements()-1; i != e; ++i) + // Reject constantexpr elements etc. + if (!isa(CVA->getOperand(i)) || + CVA->getOperand(i) == Null) + return false; return true; + } // Another possibility: [1 x i8] zeroinitializer if (isa(C)) - if (const ArrayType *Ty = dyn_cast(C->getType())) - return (Ty->getElementType() == Type::Int8Ty && - Ty->getNumElements() == 1); + return ATy->getNumElements() == 1; return false; } @@ -133,11 +148,23 @@ default: llvm_unreachable("unknown relocation info kind"); case Constant::NoRelocation: // If initializer is a null-terminated string, put it in a "cstring" - // section if the target has it. - if (isConstantString(C)) - return SectionKind::getMergeable1ByteCString(); - - // FIXME: Detect 2/4 byte strings. + // section of the right width. + if (const ArrayType *ATy = dyn_cast(C->getType())) { + if (const IntegerType *ITy = + dyn_cast(ATy->getElementType())) { + if ((ITy->getBitWidth() == 8 || ITy->getBitWidth() == 16 || + ITy->getBitWidth() == 32) && + IsNullTerminatedString(C)) { + if (ITy->getBitWidth() == 8) + return SectionKind::getMergeable1ByteCString(); + if (ITy->getBitWidth() == 16) + return SectionKind::getMergeable2ByteCString(); + + assert(ITy->getBitWidth() == 32 && "Unknown width"); + return SectionKind::getMergeable4ByteCString(); + } + } + } // Otherwise, just drop it into a mergable constant section. If we have // a section for this size, use it, otherwise use the arbitrary sized Modified: llvm/trunk/test/CodeGen/X86/global-sections.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/global-sections.ll?rev=78066&r1=78065&r2=78066&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/global-sections.ll (original) +++ llvm/trunk/test/CodeGen/X86/global-sections.ll Tue Aug 4 11:13:09 2009 @@ -85,3 +85,39 @@ ; DARWIN:_G6: ; DARWIN: .ascii "\001" + + at G7 = constant [10 x i8] c"abcdefghi\00" + +; DARWIN: .cstring +; DARWIN: .globl _G7 +; DARWIN: _G7: +; DARWIN: .asciz "abcdefghi" + +; LINUX: .section .rodata.str1.1,"aMS", at progbits,1 +; LINUX: .globl G7 +; LINUX: G7: +; LINUX: .asciz "abcdefghi" + + + at G8 = constant [4 x i16] [ i16 1, i16 2, i16 3, i16 0 ] + +; DARWIN: .const +; DARWIN: .globl _G8 +; DARWIN: _G8: + +; LINUX: .section .rodata.str2.2,"aMS", at progbits,2 +; LINUX: .globl G8 +; LINUX:G8: + + at G9 = constant [4 x i32] [ i32 1, i32 2, i32 3, i32 0 ] + +; ARWIN: .const [[ already in const section]] +; DARWIN: .globl _G9 +; DARWIN: _G9: + +; LINUX: .section .rodata.str4.4,"aMS", at progbits,4 +; LINUX: .globl G9 +; LINUX:G9 + + + From sabre at nondot.org Tue Aug 4 11:19:51 2009 From: sabre at nondot.org (Chris Lattner) Date: Tue, 04 Aug 2009 16:19:51 -0000 Subject: [llvm-commits] [llvm] r78067 - in /llvm/trunk: include/llvm/Target/TargetLoweringObjectFile.h lib/Target/TargetLoweringObjectFile.cpp Message-ID: <200908041619.n74GJpjf010652@zion.cs.uiuc.edu> Author: lattner Date: Tue Aug 4 11:19:50 2009 New Revision: 78067 URL: http://llvm.org/viewvc/llvm-project?rev=78067&view=rev Log: fix a fixme: don't create an explicit "CStringSection" for ELF, it is just being used as a prefix, so forward substitute it directly. Modified: llvm/trunk/include/llvm/Target/TargetLoweringObjectFile.h llvm/trunk/lib/Target/TargetLoweringObjectFile.cpp Modified: llvm/trunk/include/llvm/Target/TargetLoweringObjectFile.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLoweringObjectFile.h?rev=78067&r1=78066&r2=78067&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetLoweringObjectFile.h (original) +++ llvm/trunk/include/llvm/Target/TargetLoweringObjectFile.h Tue Aug 4 11:19:50 2009 @@ -187,8 +187,6 @@ /// const MCSection *TLSBSSSection; // Defaults to ".tbss". - const MCSection *CStringSection; - const MCSection *DataRelSection; const MCSection *DataRelLocalSection; const MCSection *DataRelROSection; Modified: llvm/trunk/lib/Target/TargetLoweringObjectFile.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetLoweringObjectFile.cpp?rev=78067&r1=78066&r2=78067&view=diff ============================================================================== --- llvm/trunk/lib/Target/TargetLoweringObjectFile.cpp (original) +++ llvm/trunk/lib/Target/TargetLoweringObjectFile.cpp Tue Aug 4 11:19:50 2009 @@ -320,10 +320,6 @@ TLSDataSection = getOrCreateSection("\t.tdata", false, SectionKind::getThreadData()); - // FIXME: No reason to make this. - CStringSection = getOrCreateSection("\t.rodata.str", true, - SectionKind::getMergeable1ByteCString()); - TLSBSSSection = getOrCreateSection("\t.tbss", false, SectionKind::getThreadBSS()); @@ -511,7 +507,6 @@ if (Kind.isMergeable1ByteCString() || Kind.isMergeable2ByteCString() || Kind.isMergeable4ByteCString()) { - assert(CStringSection && "Should have string section prefix"); // We also need alignment here. // FIXME: this is getting the alignment of the character, not the @@ -519,16 +514,16 @@ unsigned Align = TM.getTargetData()->getPreferredAlignment(cast(GV)); - const char *SizeSpec = "1."; + const char *SizeSpec = ".rodata.str1."; if (Kind.isMergeable2ByteCString()) - SizeSpec = "2."; + SizeSpec = ".rodata.str2."; else if (Kind.isMergeable4ByteCString()) - SizeSpec = "4."; + SizeSpec = ".rodata.str4."; else assert(Kind.isMergeable1ByteCString() && "unknown string width"); - std::string Name = CStringSection->getName() + SizeSpec + utostr(Align); + std::string Name = SizeSpec + utostr(Align); return getOrCreateSection(Name.c_str(), false, Kind); } From sabre at nondot.org Tue Aug 4 11:27:17 2009 From: sabre at nondot.org (Chris Lattner) Date: Tue, 04 Aug 2009 16:27:17 -0000 Subject: [llvm-commits] [llvm] r78068 - in /llvm/trunk: include/llvm/Target/TargetLoweringObjectFile.h lib/Target/TargetLoweringObjectFile.cpp test/CodeGen/X86/global-sections.ll Message-ID: <200908041627.n74GRHsI010937@zion.cs.uiuc.edu> Author: lattner Date: Tue Aug 4 11:27:13 2009 New Revision: 78068 URL: http://llvm.org/viewvc/llvm-project?rev=78068&view=rev Log: enhance codegen to put 16-bit character strings into the __TEXT,__ustring section on darwin. Modified: llvm/trunk/include/llvm/Target/TargetLoweringObjectFile.h llvm/trunk/lib/Target/TargetLoweringObjectFile.cpp llvm/trunk/test/CodeGen/X86/global-sections.ll Modified: llvm/trunk/include/llvm/Target/TargetLoweringObjectFile.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLoweringObjectFile.h?rev=78068&r1=78067&r2=78068&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetLoweringObjectFile.h (original) +++ llvm/trunk/include/llvm/Target/TargetLoweringObjectFile.h Tue Aug 4 11:27:13 2009 @@ -224,6 +224,7 @@ class TargetLoweringObjectFileMachO : public TargetLoweringObjectFile { const MCSection *CStringSection; + const MCSection *UStringSection; const MCSection *TextCoalSection; const MCSection *ConstTextCoalSection; const MCSection *ConstDataCoalSection; Modified: llvm/trunk/lib/Target/TargetLoweringObjectFile.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetLoweringObjectFile.cpp?rev=78068&r1=78067&r2=78068&view=diff ============================================================================== --- llvm/trunk/lib/Target/TargetLoweringObjectFile.cpp (original) +++ llvm/trunk/lib/Target/TargetLoweringObjectFile.cpp Tue Aug 4 11:27:13 2009 @@ -593,11 +593,13 @@ SectionKind::getDataRel()); CStringSection = getOrCreateSection("\t.cstring", true, - SectionKind::getMergeable1ByteCString()); + SectionKind::getMergeable1ByteCString()); + UStringSection = getOrCreateSection("__TEXT,__ustring", false, + SectionKind::getMergeable2ByteCString()); FourByteConstantSection = getOrCreateSection("\t.literal4\n", true, - SectionKind::getMergeableConst4()); + SectionKind::getMergeableConst4()); EightByteConstantSection = getOrCreateSection("\t.literal8\n", true, - SectionKind::getMergeableConst8()); + SectionKind::getMergeableConst8()); // ld_classic doesn't support .literal16 in 32-bit mode, and ld64 falls back // to using it in -static mode. @@ -704,18 +706,15 @@ } // FIXME: Alignment check should be handled by section classifier. - if (Kind.isMergeable1ByteCString()) { - Constant *C = cast(GV)->getInitializer(); - const Type *Ty = cast(C->getType())->getElementType(); - const TargetData &TD = *TM.getTargetData(); - unsigned Size = TD.getTypeAllocSize(Ty); - if (Size) { - unsigned Align = TD.getPreferredAlignment(cast(GV)); - if (Align <= 32) + if (Kind.isMergeable1ByteCString() || + Kind.isMergeable2ByteCString()) { + if (TM.getTargetData()->getPreferredAlignment( + cast(GV)) < 32) { + if (Kind.isMergeable1ByteCString()) return CStringSection; + assert(Kind.isMergeable2ByteCString()); + return UStringSection; } - - return ReadOnlySection; } if (Kind.isMergeableConst()) { @@ -725,11 +724,10 @@ return EightByteConstantSection; if (Kind.isMergeableConst16() && SixteenByteConstantSection) return SixteenByteConstantSection; - return ReadOnlySection; // .const } - - // FIXME: ROData -> const in -static mode that is relocatable but they happen - // by the static linker. Why not mergeable? + + // Otherwise, if it is readonly, but not something we can specially optimize, + // just drop it in .const. if (Kind.isReadOnly()) return ReadOnlySection; Modified: llvm/trunk/test/CodeGen/X86/global-sections.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/global-sections.ll?rev=78068&r1=78067&r2=78068&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/global-sections.ll (original) +++ llvm/trunk/test/CodeGen/X86/global-sections.ll Tue Aug 4 11:27:13 2009 @@ -101,7 +101,7 @@ @G8 = constant [4 x i16] [ i16 1, i16 2, i16 3, i16 0 ] -; DARWIN: .const +; DARWIN: .section __TEXT,__ustring ; DARWIN: .globl _G8 ; DARWIN: _G8: @@ -111,7 +111,7 @@ @G9 = constant [4 x i32] [ i32 1, i32 2, i32 3, i32 0 ] -; ARWIN: .const [[ already in const section]] +; DARWIN: .const ; DARWIN: .globl _G9 ; DARWIN: _G9: From daniel at zuster.org Tue Aug 4 11:46:39 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Tue, 04 Aug 2009 16:46:39 -0000 Subject: [llvm-commits] [llvm] r78070 - /llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp Message-ID: <200908041646.n74GklEZ011568@zion.cs.uiuc.edu> Author: ddunbar Date: Tue Aug 4 11:46:12 2009 New Revision: 78070 URL: http://llvm.org/viewvc/llvm-project?rev=78070&view=rev Log: Avoid compiler warning (in -Asserts mode) Modified: llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp Modified: llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp?rev=78070&r1=78069&r2=78070&view=diff ============================================================================== --- llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp Tue Aug 4 11:46:12 2009 @@ -1616,6 +1616,8 @@ SDVTList Tys = DAG.getVTList(MVT::i8, MVT::Flag); switch (Op.getOpcode()) { + default: + assert (0 && "Opcode unknown."); case ISD::SUBE: return DAG.getNode(Op.getOpcode(), dl, Tys, NewVal, Op.getOperand(1), Op.getOperand(2)); @@ -1626,8 +1628,6 @@ case ISD::SUB: return DAG.getNode(Op.getOpcode(), dl, MVT::i8, NewVal, Op.getOperand(1)); break; - default: - assert (0 && "Opcode unknown."); } } From evan.cheng at apple.com Tue Aug 4 11:52:46 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 04 Aug 2009 16:52:46 -0000 Subject: [llvm-commits] [llvm] r78072 - in /llvm/trunk: lib/CodeGen/RegisterScavenging.cpp test/CodeGen/ARM/2009-08-04-RegScavengerAssert.ll Message-ID: <200908041652.n74GqlLH011826@zion.cs.uiuc.edu> Author: evancheng Date: Tue Aug 4 11:52:44 2009 New Revision: 78072 URL: http://llvm.org/viewvc/llvm-project?rev=78072&view=rev Log: Fix PR4528. This scavenger assertion is too strict. The two-address value is killed by another operand. There is probably a better fix. Either 1) scavenger can look at other operands, or 2) livevariables can be smarter about kill markers. Patches welcome. Added: llvm/trunk/test/CodeGen/ARM/2009-08-04-RegScavengerAssert.ll Modified: llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Modified: llvm/trunk/lib/CodeGen/RegisterScavenging.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterScavenging.cpp?rev=78072&r1=78071&r2=78072&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegisterScavenging.cpp (original) +++ llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Tue Aug 4 11:52:44 2009 @@ -267,7 +267,8 @@ unsigned UseIdx; if (MI->isRegTiedToUseOperand(Idx, &UseIdx) && !MI->getOperand(UseIdx).isUndef()) { - assert(isUsed(Reg) && "Using an undefined register!"); + assert(!MI->getOperand(UseIdx).isKill() && + "Using an undefined register!"); continue; } Added: llvm/trunk/test/CodeGen/ARM/2009-08-04-RegScavengerAssert.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2009-08-04-RegScavengerAssert.ll?rev=78072&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/2009-08-04-RegScavengerAssert.ll (added) +++ llvm/trunk/test/CodeGen/ARM/2009-08-04-RegScavengerAssert.ll Tue Aug 4 11:52:44 2009 @@ -0,0 +1,25 @@ +; RUN: llvm-as < %s | llc -mtriple=armv6-elf +; PR4528 + +define arm_aapcscc i32 @file_read_actor(i32 %desc, i32 %page, i32 %offset, i32 %size) nounwind optsize { +entry: + br i1 undef, label %fault_in_pages_writeable.exit, label %bb5.i + +bb5.i: ; preds = %entry + %asmtmp.i = tail call i32 asm sideeffect "1:\09strbt\09$1,[$2]\0A2:\0A\09.section .fixup,\22ax\22\0A\09.align\092\0A3:\09mov\09$0, $3\0A\09b\092b\0A\09.previous\0A\09.section __ex_table,\22a\22\0A\09.align\093\0A\09.long\091b, 3b\0A\09.previous", "=r,r,r,i,0,~{cc}"(i8 0, i32 undef, i32 -14, i32 0) nounwind ; [#uses=1] + br label %fault_in_pages_writeable.exit + +fault_in_pages_writeable.exit: ; preds = %bb5.i, %entry + %0 = phi i32 [ 0, %entry ], [ %asmtmp.i, %bb5.i ] ; [#uses=1] + %1 = icmp eq i32 %0, 0 ; [#uses=1] + br i1 %1, label %bb2, label %bb3 + +bb2: ; preds = %fault_in_pages_writeable.exit + unreachable + +bb3: ; preds = %fault_in_pages_writeable.exit + %2 = tail call arm_aapcscc i32 @__copy_to_user(i8* undef, i8* undef, i32 undef) nounwind ; [#uses=0] + unreachable +} + +declare arm_aapcscc i32 @__copy_to_user(i8*, i8*, i32) From kremenek at apple.com Tue Aug 4 11:56:06 2009 From: kremenek at apple.com (Ted Kremenek) Date: Tue, 4 Aug 2009 09:56:06 -0700 Subject: [llvm-commits] [PATCH] clang: Add 32/64bit library search paths for Linux In-Reply-To: <4A784648.6050609@gmx.net> References: <4A784648.6050609@gmx.net> Message-ID: <99BA01F3-B628-4615-8C24-61CE4DC196DB@apple.com> Hi Carl-Daniel, The place to send clang patches is cfe-commits, not llvm-commits. Please resend your email to that list. Cheers, Ted On Aug 4, 2009, at 7:31 AM, Carl-Daniel Hailfinger wrote: > Linux distributions have various library search paths which vary > across > distributions. /lib and /usr/lib/ are either 32 bit or 64 bit, > depending > on whether you run something from the Debian family or openSUSE/RedHat > family. > /lib32 and /usr/lib32 exist in some distributions (usually those which > have /lib for 64 bit code, e.g. Debian on x86_64). > /lib64 and /usr/lib64 exist in other distributions (usually those > which > have /lib for 32 bit code, e.g. openSUSE on x86_64). > > Add all those paths to the default clang library search path. > > This fixes Bug 4140 for x86-64 non-Debian distributions and for 32 bit > compilation on x86-64 Debian. > > This is my first patch, so I appreciate feedback about what I can > improve. > > The patch is against cfe trunk. > > Regards, > Carl-Daniel > > -- > http://www.hailfinger.org/ > > < > clang_lib_searchpath_3264bit.diff > >_______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From kremenek at apple.com Tue Aug 4 11:59:13 2009 From: kremenek at apple.com (Ted Kremenek) Date: Tue, 04 Aug 2009 16:59:13 -0000 Subject: [llvm-commits] [llvm] r78073 - /llvm/tags/checker/checker-0.215/ Message-ID: <200908041659.n74GxGD7012219@zion.cs.uiuc.edu> Author: kremenek Date: Tue Aug 4 11:58:39 2009 New Revision: 78073 URL: http://llvm.org/viewvc/llvm-project?rev=78073&view=rev Log: Removing checker-0.215. Removed: llvm/tags/checker/checker-0.215/ From dgregor at apple.com Tue Aug 4 12:04:54 2009 From: dgregor at apple.com (Douglas Gregor) Date: Tue, 04 Aug 2009 17:04:54 -0000 Subject: [llvm-commits] [llvm] r78076 - /llvm/trunk/include/llvm/Support/type_traits.h Message-ID: <200908041704.n74H4sRg012443@zion.cs.uiuc.edu> Author: dgregor Date: Tue Aug 4 12:04:52 2009 New Revision: 78076 URL: http://llvm.org/viewvc/llvm-project?rev=78076&view=rev Log: Add some type traits that are used for Clang's statically-checked canonical types. Modified: llvm/trunk/include/llvm/Support/type_traits.h Modified: llvm/trunk/include/llvm/Support/type_traits.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/type_traits.h?rev=78076&r1=78075&r2=78076&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/type_traits.h (original) +++ llvm/trunk/include/llvm/Support/type_traits.h Tue Aug 4 12:04:52 2009 @@ -49,6 +49,33 @@ enum { value = sizeof(char) == sizeof(dont_use::is_class_helper(0)) }; }; + +// enable_if_c - Enable/disable a template based on a metafunction +template +struct enable_if_c { + typedef T type; +}; + +template struct enable_if_c { }; + +// enable_if - Enable/disable a template based on a metafunction +template +struct enable_if : public enable_if_c { }; + +namespace dont_use { + template char base_of_helper(const volatile Base*); + template double base_of_helper(...); +} + +/// is_base_of - Metafunction to determine whether one type is a base class of +/// (or identical to) another type. +template +struct is_base_of { + static const bool value + = is_class::value && is_class::value && + sizeof(char) == sizeof(dont_use::base_of_helper((Derived*)0)); +}; + } #endif From kremenek at apple.com Tue Aug 4 12:06:21 2009 From: kremenek at apple.com (Ted Kremenek) Date: Tue, 04 Aug 2009 17:06:21 -0000 Subject: [llvm-commits] [llvm] r78078 - /llvm/tags/checker/checker-0.215/ Message-ID: <200908041706.n74H6L9X012502@zion.cs.uiuc.edu> Author: kremenek Date: Tue Aug 4 12:06:19 2009 New Revision: 78078 URL: http://llvm.org/viewvc/llvm-project?rev=78078&view=rev Log: Tagging checker-0.215. Added: llvm/tags/checker/checker-0.215/ - copied from r78077, llvm/trunk/ From evan.cheng at apple.com Tue Aug 4 12:31:47 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 4 Aug 2009 10:31:47 -0700 Subject: [llvm-commits] [llvm] r77989 - in /llvm/trunk: lib/CodeGen/LowerSubregs.cpp lib/CodeGen/MachineInstr.cpp test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll In-Reply-To: <87eirsrlf9.fsf@chora.dk> References: <200908032008.n73K8goN023448@zion.cs.uiuc.edu> <85AC6E8F-168F-441E-B591-59C3B543F6EE@apple.com> <87eirsrlf9.fsf@chora.dk> Message-ID: <5B3E9460-BBBB-4715-A7F6-EA2454C51A6C@apple.com> On Aug 4, 2009, at 2:13 AM, Jakob Stoklund Olesen wrote: > Evan Cheng writes: > >> On Aug 3, 2009, at 11:05 PM, Jakob Stoklund Olesen wrote: >> >>> >>> On 03/08/2009, at 23.40, Evan Cheng wrote: >>> >>>>> Finally, clear the undef flag in MachineInstr::addRegisterKilled. >>>>> Undef implies dead and kill implies live, so they cant both be >>>>> valid. >>>> >>>> That's not necessary. Undef doesn't implies dead. It just means its >>>> garbage and it has no liveness. >>> >>> A zombie!? >>> >>> I am not sure what you mean. >>> Do you mean that a register can have three states: dead-live-undef? >>> Or do you mean that an undef operand can be both dead or live, both >>> are OK? >> >> Undef operands are "don't care". :-) It would have been cleaner to >> have an Undef machineoperand rather than a register machineoperand >> that's undef. But we still need to assign registers to them so the >> instructions can be translated to machine code. > > OK, here is the example that caused me to make that change: > > llvm-as < Blackfin/i8mem.ll | Debug/bin/llc -march=bfin -debug > > We have this code: > > %R0 = LOAD32p_8z %P0, Mem:LD(1,1) [i8_l + 0] > %R0L = EXTRACT_SUBREG %R0, 1 > %R0 = INSERT_SUBREG %R0, %R0L, 1 > > The code is stupid because of missing Blackfin peepholes. Please > ignore > that. It should be correct. > > Now look what happens without my fix: > > ********** LOWERING SUBREG INSTRS ********** > ********** Function: i8_ls > subreg: CONVERTING: %R0L = EXTRACT_SUBREG %R0, 1 > subreg: eliminated! > subreg: killed here: %R0 = INSERT_SUBREG %R0, > %R0L, 1 > > LowerExtract moves the %R0 flag to the INSERT_SUBREG > below. Because INSERT_SUBREG is a two-addr instruction, the kill > flag on > %R0 is implicit. (I fixed that last week). > > Then: > > subreg: CONVERTING: %R0 = INSERT_SUBREG %R0, %R0L, 1 > subreg: %R0 = IMPLICIT_DEF %R0L > > And that is wrong because LowerInsert assumed %R0 was dead. We get a > double-def of %R0. > > When the flag is removed by MachineInstr::addRegisterKilled, > we > get this instead: > > subreg: CONVERTING: %R0 = INSERT_SUBREG %R0, %R0L, 1 > subreg: eliminated! > > Which is correct. > > With your semantics for , I think we would need to do this: > > subreg: CONVERTING: %R0 = INSERT_SUBREG %R0, %R0L, 1 > subreg: %R0 = IMPLICIT_DEF %R0 > > This won't work now because the regscavenger ignores all > operands, and we still get the double-def assert. That can be fixed, > of > course. I agree not removing the here is correct. We need a way to model r0 is killed before the def. > > Note that if we do this, %R0 means "kill %R0, dead or > alive". That is what you wanted to avoid, I think. It also means that > RegScavenger::backward probably can't work properly - Would %R0 be > dead > or alive after running backwards over %R0? There isn't a client for backward() right now so I am not too concerned about it. But in this case, it would assume R0 is not-live. > > > Could we make it work with stricter semantics? Let "undef implies > dead" > be the rule? Then this: > > %R0 = IMPLICIT_DEF > > would essentially mean the same as this: > > %R0 = IMPLICIT_DEF > > And this: > > %R0 = INSERT_SUBREG %R0, %R0L, 1 > > would require %R0 to be dead. I think that could work, but there may > be > issues in livevars that I don't understand. I am very hesitant to change the semantics. That will break a lot of assumptions in the register allocator. I think the current approach of having subreg lowering pass insert the right instructions to model "kill" is enough. Is it not? Evan > > Strict semantics makes it a lot easier to reason about register > liveness > when transforming the code in LowerSubregs and other places. > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From devang.patel at gmail.com Tue Aug 4 12:43:07 2009 From: devang.patel at gmail.com (Devang Patel) Date: Tue, 4 Aug 2009 10:43:07 -0700 Subject: [llvm-commits] [PATCH] Dump with LI Indices In-Reply-To: <200908040846.35455.dag@cray.com> References: <200907301710.32176.dag@cray.com> <200908031151.22285.dag@cray.com> <0CA98A62-A2A6-4705-916A-6D78396DE38E@apple.com> <200908040846.35455.dag@cray.com> Message-ID: <352a1fb20908041043r55606e95l8a363b95f4320277@mail.gmail.com> On Tue, Aug 4, 2009 at 6:46 AM, David Greene wrote: > On Tuesday 04 August 2009 01:08, Evan Cheng wrote: >> I am really not crazy about it especially since it has such a generic >> name Dump.h. But it's not a big deal. > > I'm open to a better naming. ?I'm not particulrly fond of Dump.h either. Since you ask, how about AsmPrefixPrinter.h ? :) - Devang From clattner at apple.com Tue Aug 4 12:44:45 2009 From: clattner at apple.com (Chris Lattner) Date: Tue, 4 Aug 2009 10:44:45 -0700 Subject: [llvm-commits] [PATCH] Dump with LI Indices In-Reply-To: <200908040846.35455.dag@cray.com> References: <200907301710.32176.dag@cray.com> <200908031151.22285.dag@cray.com> <0CA98A62-A2A6-4705-916A-6D78396DE38E@apple.com> <200908040846.35455.dag@cray.com> Message-ID: On Aug 4, 2009, at 6:46 AM, David Greene wrote: > On Tuesday 04 August 2009 01:08, Evan Cheng wrote: >> I am really not crazy about it especially since it has such a generic >> name Dump.h. But it's not a big deal. > > I'm open to a better naming. I'm not particulrly fond of Dump.h > either. I still don't understand why you need a general "prefix printer" mechanism, instead of just doing a simple helper function in the liveintervals code. -Chris From clattner at apple.com Tue Aug 4 12:48:08 2009 From: clattner at apple.com (Chris Lattner) Date: Tue, 4 Aug 2009 10:48:08 -0700 Subject: [llvm-commits] [llvm] r77740 - in /llvm/trunk: include/llvm/CodeGen/AsmPrinter.h lib/CodeGen/AsmPrinter/AsmPrinter.cpp test/CodeGen/X86/2009-04-17-tls-fast.ll test/CodeGen/X86/tls1-pic.ll test/CodeGen/X86/tls2-pic.ll test/CodeGen/X86/tls3-pic.ll test/CodeGen/X86/tls4-pic.ll utils/TableGen/AsmWriterEmitter.cpp In-Reply-To: <200908031836.51123.dag@cray.com> References: <200907312157.n6VLvAKm021365@zion.cs.uiuc.edu> <200908031705.59956.dag@cray.com> <200908031711.30871.dag@cray.com> <200908031836.51123.dag@cray.com> Message-ID: On Aug 3, 2009, at 4:36 PM, David Greene wrote: > On Monday 03 August 2009 17:11, David Greene wrote: > >> >> AsmWriterEmitter no longer emits tabs into the AsmStrs because of >> this. So >> you're right, all this ugly complexity can go away. Hmm...except >> this >> probably doesn't work for "pd" suffixed mnemonics as I pointed out >> earlier. >> So there's a bug here. I'll figure that out. > > I've got a fix for this and a cleanup to boot. Testing now, will > apply > probably tomorrow. Thank you Dave, I really prefer that this change (the comment formatting stuff for operands) get settled before many more patches go in. I can only keep track of so many outstanding issues at a time. Once it is "right" I can stop fretting about it :) Thanks again for working on this, it seems like the solution is converging to a really really nice place. -Chris From david_goodwin at apple.com Tue Aug 4 12:53:37 2009 From: david_goodwin at apple.com (David Goodwin) Date: Tue, 04 Aug 2009 17:53:37 -0000 Subject: [llvm-commits] [llvm] r78081 - in /llvm/trunk: lib/Target/ARM/ARM.td lib/Target/ARM/ARMInstrFormats.td lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/ARMInstrNEON.td lib/Target/ARM/ARMInstrVFP.td lib/Target/ARM/ARMSubtarget.cpp lib/Target/ARM/ARMSubtarget.h test/CodeGen/ARM/fadds.ll test/CodeGen/ARM/fdivs.ll test/CodeGen/ARM/fmacs.ll test/CodeGen/ARM/fmscs.ll test/CodeGen/ARM/fmuls.ll test/CodeGen/ARM/fnmacs.ll test/CodeGen/ARM/fnmscs.ll test/CodeGen/ARM/fnmuls.ll test/CodeGen/ARM/fsubs.ll Message-ID: <200908041753.n74HrpTA014069@zion.cs.uiuc.edu> Author: david_goodwin Date: Tue Aug 4 12:53:06 2009 New Revision: 78081 URL: http://llvm.org/viewvc/llvm-project?rev=78081&view=rev Log: Initial support for single-precision FP using NEON. Added "neonfp" attribute to enable. Added patterns for some binary FP operations. Added: llvm/trunk/test/CodeGen/ARM/fadds.ll llvm/trunk/test/CodeGen/ARM/fdivs.ll llvm/trunk/test/CodeGen/ARM/fmacs.ll llvm/trunk/test/CodeGen/ARM/fmscs.ll llvm/trunk/test/CodeGen/ARM/fmuls.ll llvm/trunk/test/CodeGen/ARM/fnmacs.ll llvm/trunk/test/CodeGen/ARM/fnmscs.ll llvm/trunk/test/CodeGen/ARM/fnmuls.ll llvm/trunk/test/CodeGen/ARM/fsubs.ll Modified: llvm/trunk/lib/Target/ARM/ARM.td llvm/trunk/lib/Target/ARM/ARMInstrFormats.td llvm/trunk/lib/Target/ARM/ARMInstrInfo.td llvm/trunk/lib/Target/ARM/ARMInstrNEON.td llvm/trunk/lib/Target/ARM/ARMInstrVFP.td llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp llvm/trunk/lib/Target/ARM/ARMSubtarget.h Modified: llvm/trunk/lib/Target/ARM/ARM.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARM.td?rev=78081&r1=78080&r2=78081&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARM.td (original) +++ llvm/trunk/lib/Target/ARM/ARM.td Tue Aug 4 12:53:06 2009 @@ -32,6 +32,9 @@ "ARM v6t2">; def ArchV7A : SubtargetFeature<"v7a", "ARMArchVersion", "V7A", "ARM v7A">; +def FeatureNEONFP : SubtargetFeature<"neonfp", "UseNEONForSinglePrecisionFP", + "true", + "Use NEON for single-precision FP">; def FeatureVFP2 : SubtargetFeature<"vfp2", "ARMFPUType", "VFPv2", "Enable VFP2 instructions">; def FeatureVFP3 : SubtargetFeature<"vfp3", "ARMFPUType", "VFPv3", Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=78081&r1=78080&r2=78081&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Tue Aug 4 12:53:06 2009 @@ -1080,6 +1080,14 @@ let Inst{11-8} = 0b1010; } +// Single precision, binary if no NEON +// Same as ASbI except not available if NEON is enabled +class ASbIn opcod, dag oops, dag iops, string opc, + string asm, list pattern> + : ASbI { + list Predicates = [HasVFP2,DontUseNEONForFP]; +} + // VFP conversion instructions class AVConv1I opcod1, bits<4> opcod2, bits<4> opcod3, dag oops, dag iops, string opc, string asm, list pattern> @@ -1220,3 +1228,9 @@ class NVDup opcod1, bits<4> opcod2, bits<2> opcod3, dag oops, dag iops, string opc, string asm, list pattern> : NVLaneOp; + +// NEONFPPat - Same as Pat<>, but requires that the compiler be using NEON +// for single-precision FP. +class NEONFPPat : Pat { + list Predicates = [HasNEON,UseNEONForFP]; +} Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=78081&r1=78080&r2=78081&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Tue Aug 4 12:53:06 2009 @@ -104,6 +104,8 @@ def HasVFP2 : Predicate<"Subtarget->hasVFP2()">; def HasVFP3 : Predicate<"Subtarget->hasVFP3()">; def HasNEON : Predicate<"Subtarget->hasNEON()">; +def UseNEONForFP : Predicate<"Subtarget->useNEONForSinglePrecisionFP()">; +def DontUseNEONForFP : Predicate<"!Subtarget->useNEONForSinglePrecisionFP()">; def IsThumb : Predicate<"Subtarget->isThumb()">; def IsThumb1Only : Predicate<"Subtarget->isThumb1Only()">; def IsThumb2 : Predicate<"Subtarget->isThumb2()">; Modified: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrNEON.td?rev=78081&r1=78080&r2=78081&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrNEON.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Tue Aug 4 12:53:06 2009 @@ -283,6 +283,13 @@ let isCommutable = Commutable; } +// Basic 3-register operations, scalar single-precision +class N3VDs + : NEONFPPat<(f32 (OpNode SPR:$a, SPR:$b)), + (EXTRACT_SUBREG (Inst (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), SPR:$a, arm_ssubreg_0), + (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), SPR:$b, arm_ssubreg_0)), + arm_ssubreg_0)>; + // Basic 3-register intrinsics, both double- and quad-register. class N3VDInt op21_20, bits<4> op11_8, bit op4, string OpcodeStr, ValueType ResTy, ValueType OpTy, @@ -319,6 +326,15 @@ [(set QPR:$dst, (Ty (OpNode QPR:$src1, (Ty (MulOp QPR:$src2, QPR:$src3)))))]>; +// Multiply-Add/Sub operations, scalar single-precision +class N3VDMulOps + : NEONFPPat<(f32 (OpNode SPR:$acc, + (f32 (MulNode SPR:$a, SPR:$b)))), + (EXTRACT_SUBREG (Inst (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), SPR:$acc, arm_ssubreg_0), + (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), SPR:$a, arm_ssubreg_0), + (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), SPR:$b, arm_ssubreg_0)), + arm_ssubreg_0)>; + // Neon 3-argument intrinsics, both double- and quad-register. // The destination register is also used as the first source operand register. class N3VDInt3 op21_20, bits<4> op11_8, bit op4, @@ -886,6 +902,9 @@ // VRADDHN : Vector Rounding Add and Narrow Returning High Half (D = Q + Q) defm VRADDHN : N3VNInt_HSD<1,1,0b0100,0, "vraddhn.i", int_arm_neon_vraddhn, 1>; +// Vector Add Operations used for single-precision FP +def : N3VDs; + // Vector Multiply Operations. // VMUL : Vector Multiply (integer, polynomial and floating-point) @@ -908,6 +927,9 @@ // VQDMULL : Vector Saturating Doubling Multiply Long (Q = D * D) defm VQDMULL : N3VLInt_HS<0,1,0b1101,0, "vqdmull.s", int_arm_neon_vqdmull, 1>; +// Vector Multiply Operations used for single-precision FP +def : N3VDs; + // Vector Multiply-Accumulate and Multiply-Subtract Operations. // VMLA : Vector Multiply Accumulate (integer and floating-point) @@ -929,6 +951,9 @@ // VQDMLSL : Vector Saturating Doubling Multiply Subtract Long (Q -= D * D) defm VQDMLSL : N3VLInt3_HS<0, 1, 0b1011, 0, "vqdmlsl.s", int_arm_neon_vqdmlsl>; +// Vector Multiply-Accumulate/Subtract used for single-precision FP +def : N3VDMulOps; + // Vector Subtract Operations. // VSUB : Vector Subtract (integer and floating-point) @@ -952,6 +977,9 @@ // VRSUBHN : Vector Rounding Subtract and Narrow Returning High Half (D=Q-Q) defm VRSUBHN : N3VNInt_HSD<1,1,0b0110,0, "vrsubhn.i", int_arm_neon_vrsubhn, 0>; +// Vector Sub Operations used for single-precision FP +def : N3VDs; + // Vector Comparisons. // VCEQ : Vector Compare Equal Modified: llvm/trunk/lib/Target/ARM/ARMInstrVFP.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrVFP.td?rev=78081&r1=78080&r2=78081&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrVFP.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrVFP.td Tue Aug 4 12:53:06 2009 @@ -98,9 +98,9 @@ "faddd", " $dst, $a, $b", [(set DPR:$dst, (fadd DPR:$a, DPR:$b))]>; -def FADDS : ASbI<0b11100011, (outs SPR:$dst), (ins SPR:$a, SPR:$b), - "fadds", " $dst, $a, $b", - [(set SPR:$dst, (fadd SPR:$a, SPR:$b))]>; +def FADDS : ASbIn<0b11100011, (outs SPR:$dst), (ins SPR:$a, SPR:$b), + "fadds", " $dst, $a, $b", + [(set SPR:$dst, (fadd SPR:$a, SPR:$b))]>; // These are encoded as unary instructions. let Defs = [FPSCR] in { @@ -125,9 +125,9 @@ "fmuld", " $dst, $a, $b", [(set DPR:$dst, (fmul DPR:$a, DPR:$b))]>; -def FMULS : ASbI<0b11100010, (outs SPR:$dst), (ins SPR:$a, SPR:$b), - "fmuls", " $dst, $a, $b", - [(set SPR:$dst, (fmul SPR:$a, SPR:$b))]>; +def FMULS : ASbIn<0b11100010, (outs SPR:$dst), (ins SPR:$a, SPR:$b), + "fmuls", " $dst, $a, $b", + [(set SPR:$dst, (fmul SPR:$a, SPR:$b))]>; def FNMULD : ADbI<0b11100010, (outs DPR:$dst), (ins DPR:$a, DPR:$b), "fnmuld", " $dst, $a, $b", @@ -154,9 +154,9 @@ let Inst{6} = 1; } -def FSUBS : ASbI<0b11100011, (outs SPR:$dst), (ins SPR:$a, SPR:$b), - "fsubs", " $dst, $a, $b", - [(set SPR:$dst, (fsub SPR:$a, SPR:$b))]> { +def FSUBS : ASbIn<0b11100011, (outs SPR:$dst), (ins SPR:$a, SPR:$b), + "fsubs", " $dst, $a, $b", + [(set SPR:$dst, (fsub SPR:$a, SPR:$b))]> { let Inst{6} = 1; } @@ -317,10 +317,10 @@ [(set DPR:$dst, (fadd (fmul DPR:$a, DPR:$b), DPR:$dstin))]>, RegConstraint<"$dstin = $dst">; -def FMACS : ASbI<0b11100000, (outs SPR:$dst), (ins SPR:$dstin, SPR:$a, SPR:$b), - "fmacs", " $dst, $a, $b", - [(set SPR:$dst, (fadd (fmul SPR:$a, SPR:$b), SPR:$dstin))]>, - RegConstraint<"$dstin = $dst">; +def FMACS : ASbIn<0b11100000, (outs SPR:$dst), (ins SPR:$dstin, SPR:$a, SPR:$b), + "fmacs", " $dst, $a, $b", + [(set SPR:$dst, (fadd (fmul SPR:$a, SPR:$b), SPR:$dstin))]>, + RegConstraint<"$dstin = $dst">; def FMSCD : ADbI<0b11100001, (outs DPR:$dst), (ins DPR:$dstin, DPR:$a, DPR:$b), "fmscd", " $dst, $a, $b", @@ -339,8 +339,8 @@ let Inst{6} = 1; } -def FNMACS : ASbI<0b11100000, (outs SPR:$dst), (ins SPR:$dstin, SPR:$a, SPR:$b), - "fnmacs", " $dst, $a, $b", +def FNMACS : ASbIn<0b11100000, (outs SPR:$dst), (ins SPR:$dstin, SPR:$a, SPR:$b), + "fnmacs", " $dst, $a, $b", [(set SPR:$dst, (fadd (fneg (fmul SPR:$a, SPR:$b)), SPR:$dstin))]>, RegConstraint<"$dstin = $dst"> { let Inst{6} = 1; Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp?rev=78081&r1=78080&r2=78081&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp Tue Aug 4 12:53:06 2009 @@ -25,6 +25,7 @@ bool isThumb) : ARMArchVersion(V4T) , ARMFPUType(None) + , UseNEONForSinglePrecisionFP(false) , IsThumb(isThumb) , ThumbMode(Thumb1) , IsR9Reserved(ReserveR9) Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.h?rev=78081&r1=78080&r2=78081&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMSubtarget.h (original) +++ llvm/trunk/lib/Target/ARM/ARMSubtarget.h Tue Aug 4 12:53:06 2009 @@ -42,6 +42,9 @@ /// ARMFPUType - Floating Point Unit type. ARMFPEnum ARMFPUType; + /// UseNEONForSinglePrecisionFP - if NEON is available use for FP + bool UseNEONForSinglePrecisionFP; + /// IsThumb - True if we are in thumb mode, false if in ARM mode. bool IsThumb; @@ -98,7 +101,9 @@ bool hasVFP2() const { return ARMFPUType >= VFPv2; } bool hasVFP3() const { return ARMFPUType >= VFPv3; } bool hasNEON() const { return ARMFPUType >= NEON; } - + bool useNEONForSinglePrecisionFP() const { + return hasNEON() && UseNEONForSinglePrecisionFP; } + bool isTargetDarwin() const { return TargetType == isDarwin; } bool isTargetELF() const { return TargetType == isELF; } Added: llvm/trunk/test/CodeGen/ARM/fadds.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fadds.ll?rev=78081&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/fadds.ll (added) +++ llvm/trunk/test/CodeGen/ARM/fadds.ll Tue Aug 4 12:53:06 2009 @@ -0,0 +1,10 @@ +; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep -E {fadds\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | grep -E {vadd.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | grep -E {fadds\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 + +define float @test(float %a, float %b) { +entry: + %0 = fadd float %a, %b + ret float %0 +} + Added: llvm/trunk/test/CodeGen/ARM/fdivs.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fdivs.ll?rev=78081&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/fdivs.ll (added) +++ llvm/trunk/test/CodeGen/ARM/fdivs.ll Tue Aug 4 12:53:06 2009 @@ -0,0 +1,10 @@ +; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep -E {fdivs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | grep -E {fdivs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | grep -E {fdivs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 + +define float @test(float %a, float %b) { +entry: + %0 = fdiv float %a, %b + ret float %0 +} + Added: llvm/trunk/test/CodeGen/ARM/fmacs.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fmacs.ll?rev=78081&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/fmacs.ll (added) +++ llvm/trunk/test/CodeGen/ARM/fmacs.ll Tue Aug 4 12:53:06 2009 @@ -0,0 +1,11 @@ +; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep -E {fmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | grep -E {vmla.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | grep -E {fmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 + +define float @test(float %acc, float %a, float %b) { +entry: + %0 = fmul float %a, %b + %1 = fadd float %acc, %0 + ret float %1 +} + Added: llvm/trunk/test/CodeGen/ARM/fmscs.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fmscs.ll?rev=78081&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/fmscs.ll (added) +++ llvm/trunk/test/CodeGen/ARM/fmscs.ll Tue Aug 4 12:53:06 2009 @@ -0,0 +1,11 @@ +; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep -E {fmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | grep -E {fmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | grep -E {fmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 + +define float @test(float %acc, float %a, float %b) { +entry: + %0 = fmul float %a, %b + %1 = fsub float %0, %acc + ret float %1 +} + Added: llvm/trunk/test/CodeGen/ARM/fmuls.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fmuls.ll?rev=78081&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/fmuls.ll (added) +++ llvm/trunk/test/CodeGen/ARM/fmuls.ll Tue Aug 4 12:53:06 2009 @@ -0,0 +1,10 @@ +; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep -E {fmuls\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | grep -E {vmul.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | grep -E {fmuls\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 + +define float @test(float %a, float %b) { +entry: + %0 = fmul float %a, %b + ret float %0 +} + Added: llvm/trunk/test/CodeGen/ARM/fnmacs.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fnmacs.ll?rev=78081&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/fnmacs.ll (added) +++ llvm/trunk/test/CodeGen/ARM/fnmacs.ll Tue Aug 4 12:53:06 2009 @@ -0,0 +1,12 @@ +; XFAIL: * +; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep -E {fnmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | grep -E {vmls.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | grep -E {fnmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 + +define float @test(float %acc, float %a, float %b) { +entry: + %0 = fmul float %a, %b + %1 = fsub float %acc, %0 + ret float %1 +} + Added: llvm/trunk/test/CodeGen/ARM/fnmscs.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fnmscs.ll?rev=78081&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/fnmscs.ll (added) +++ llvm/trunk/test/CodeGen/ARM/fnmscs.ll Tue Aug 4 12:53:06 2009 @@ -0,0 +1,13 @@ +; XFAIL: * +; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep -E {fnmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | grep -E {fnmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | grep -E {fnmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 + +define float @test(float %acc, float %a, float %b) { +entry: + %0 = fmul float %a, %b + %1 = fsub float 0.0, %0 + %2 = fsub float %1, %acc + ret float %2 +} + Added: llvm/trunk/test/CodeGen/ARM/fnmuls.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fnmuls.ll?rev=78081&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/fnmuls.ll (added) +++ llvm/trunk/test/CodeGen/ARM/fnmuls.ll Tue Aug 4 12:53:06 2009 @@ -0,0 +1,12 @@ +; XFAIL: * +; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep -E {fnmuls\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | grep -E {fnmuls\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | grep -E {fnmuls\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 + +define float @test(float %a, float %b) { +entry: + %0 = fmul float %a, %b + %1 = fsub float 0.0, %0 + ret float %1 +} + Added: llvm/trunk/test/CodeGen/ARM/fsubs.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fsubs.ll?rev=78081&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/fsubs.ll (added) +++ llvm/trunk/test/CodeGen/ARM/fsubs.ll Tue Aug 4 12:53:06 2009 @@ -0,0 +1,10 @@ +; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep -E {fsubs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | grep -E {vsub.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | grep -E {fsubs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 + +define float @test(float %a, float %b) { +entry: + %0 = fsub float %a, %b + ret float %0 +} + From sanjiv.gupta at microchip.com Tue Aug 4 12:59:29 2009 From: sanjiv.gupta at microchip.com (Sanjiv Gupta) Date: Tue, 04 Aug 2009 17:59:29 -0000 Subject: [llvm-commits] [llvm] r78082 - /llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp Message-ID: <200908041759.n74HxVQm014227@zion.cs.uiuc.edu> Author: sgupta Date: Tue Aug 4 12:59:16 2009 New Revision: 78082 URL: http://llvm.org/viewvc/llvm-project?rev=78082&view=rev Log: Legalize i64 store operations generated by inst-combine. Modified: llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp Modified: llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp?rev=78082&r1=78081&r2=78082&view=diff ============================================================================== --- llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp Tue Aug 4 12:59:16 2009 @@ -253,6 +253,7 @@ setOperationAction(ISD::STORE, MVT::i8, Legal); setOperationAction(ISD::STORE, MVT::i16, Custom); setOperationAction(ISD::STORE, MVT::i32, Custom); + setOperationAction(ISD::STORE, MVT::i64, Custom); setOperationAction(ISD::ADDE, MVT::i8, Custom); setOperationAction(ISD::ADDC, MVT::i8, Custom); @@ -593,8 +594,25 @@ getChain(Store3), getChain(Store4)); return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, RetLo, RetHi); - } - else { + } else if (ValueType == MVT::i64) { + SDValue SrcLo, SrcHi; + GetExpandedParts(Src, DAG, SrcLo, SrcHi); + SDValue ChainLo = Chain, ChainHi = Chain; + if (Chain.getOpcode() == ISD::TokenFactor) { + ChainLo = Chain.getOperand(0); + ChainHi = Chain.getOperand(1); + } + SDValue Store1 = DAG.getStore(ChainLo, dl, SrcLo, Ptr, NULL, + 0 + StoreOffset); + + Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, + DAG.getConstant(4, Ptr.getValueType())); + SDValue Store2 = DAG.getStore(ChainHi, dl, SrcHi, Ptr, NULL, + 1 + StoreOffset); + + return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Store1, + Store2); + } else { assert (0 && "value type not supported"); return SDValue(); } From david_goodwin at apple.com Tue Aug 4 13:12:11 2009 From: david_goodwin at apple.com (David Goodwin) Date: Tue, 04 Aug 2009 18:12:11 -0000 Subject: [llvm-commits] [llvm] r78083 - in /llvm/trunk/test/CodeGen/ARM: fnmscs.ll fnmuls.ll Message-ID: <200908041812.n74ICFSh014698@zion.cs.uiuc.edu> Author: david_goodwin Date: Tue Aug 4 13:11:59 2009 New Revision: 78083 URL: http://llvm.org/viewvc/llvm-project?rev=78083&view=rev Log: Improve tests. Modified: llvm/trunk/test/CodeGen/ARM/fnmscs.ll llvm/trunk/test/CodeGen/ARM/fnmuls.ll Modified: llvm/trunk/test/CodeGen/ARM/fnmscs.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fnmscs.ll?rev=78083&r1=78082&r2=78083&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/fnmscs.ll (original) +++ llvm/trunk/test/CodeGen/ARM/fnmscs.ll Tue Aug 4 13:11:59 2009 @@ -1,9 +1,9 @@ ; XFAIL: * -; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep -E {fnmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 -; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | grep -E {fnmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 -; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | grep -E {fnmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep -E {fnmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 2 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | grep -E {fnmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 2 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | grep -E {fnmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 2 -define float @test(float %acc, float %a, float %b) { +define float @test1(float %acc, float %a, float %b) { entry: %0 = fmul float %a, %b %1 = fsub float 0.0, %0 @@ -11,3 +11,11 @@ ret float %2 } +define float @test2(float %acc, float %a, float %b) { +entry: + %0 = fmul float %a, %b + %1 = fmul float -1.0, %0 + %2 = fsub float %1, %acc + ret float %2 +} + Modified: llvm/trunk/test/CodeGen/ARM/fnmuls.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fnmuls.ll?rev=78083&r1=78082&r2=78083&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/fnmuls.ll (original) +++ llvm/trunk/test/CodeGen/ARM/fnmuls.ll Tue Aug 4 13:11:59 2009 @@ -1,12 +1,19 @@ ; XFAIL: * -; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep -E {fnmuls\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 -; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | grep -E {fnmuls\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 -; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | grep -E {fnmuls\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep -E {fnmuls\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 2 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | grep -E {fnmuls\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 2 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | grep -E {fnmuls\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 2 -define float @test(float %a, float %b) { +define float @test1(float %a, float %b) { entry: %0 = fmul float %a, %b %1 = fsub float 0.0, %0 ret float %1 } +define float @test2(float %a, float %b) { +entry: + %0 = fmul float %a, %b + %1 = fmul float -1.0, %0 + ret float %1 +} + From anton at korobeynikov.info Tue Aug 4 13:15:55 2009 From: anton at korobeynikov.info (Anton Korobeynikov) Date: Tue, 4 Aug 2009 22:15:55 +0400 Subject: [llvm-commits] [llvm] r78083 - in /llvm/trunk/test/CodeGen/ARM: fnmscs.ll fnmuls.ll In-Reply-To: <200908041812.n74ICFSh014698@zion.cs.uiuc.edu> References: <200908041812.n74ICFSh014698@zion.cs.uiuc.edu> Message-ID: Hi, David > -; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep -E {fnmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 > -; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | grep -E {fnmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 > -; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | grep -E {fnmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 > +; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep -E {fnmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 2 > +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | grep -E {fnmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 2 > +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | grep -E {fnmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 2 Why don't use FileCheck for this? -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University From david_goodwin at apple.com Tue Aug 4 13:26:17 2009 From: david_goodwin at apple.com (David Goodwin) Date: Tue, 4 Aug 2009 11:26:17 -0700 Subject: [llvm-commits] [llvm] r78083 - in /llvm/trunk/test/CodeGen/ARM: fnmscs.ll fnmuls.ll In-Reply-To: References: <200908041812.n74ICFSh014698@zion.cs.uiuc.edu> Message-ID: Where is the documentation for FileCheck? On Aug 4, 2009, at 11:15 AM, Anton Korobeynikov wrote: > Hi, David > >> -; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep -E {fnmscs >> \\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 >> -; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | grep - >> E {fnmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 >> -; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | grep - >> E {fnmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 >> +; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep -E {fnmscs >> \\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 2 >> +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | grep - >> E {fnmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 2 >> +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | grep - >> E {fnmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 2 > Why don't use FileCheck for this? > > -- > With best regards, Anton Korobeynikov > Faculty of Mathematics and Mechanics, Saint Petersburg State > University > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From clattner at apple.com Tue Aug 4 13:44:20 2009 From: clattner at apple.com (Chris Lattner) Date: Tue, 4 Aug 2009 11:44:20 -0700 Subject: [llvm-commits] [llvm] r78083 - in /llvm/trunk/test/CodeGen/ARM: fnmscs.ll fnmuls.ll In-Reply-To: References: <200908041812.n74ICFSh014698@zion.cs.uiuc.edu> Message-ID: On Aug 4, 2009, at 11:26 AM, David Goodwin wrote: > Where is the documentation for FileCheck? I still need to write the docs unfortunately. Basically it does a grep for a prefix (defaulting to "CHECK:") and verifies that the strings occur, and in order. Take a look at CodeGen/ arm/mul_const.ll for a simple example. It also defaults to canonicalizing horizontal whitespace, so you don't have to do an exact match on tabs and spaces. One annoying current limitation is that it doesn't support regex's yet. -Chris > > On Aug 4, 2009, at 11:15 AM, Anton Korobeynikov wrote: > >> Hi, David >> >>> -; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep -E {fnmscs >>> \\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 >>> -; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | grep - >>> E {fnmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 >>> -; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | grep - >>> E {fnmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 >>> +; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep -E {fnmscs >>> \\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 2 >>> +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | grep - >>> E {fnmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 2 >>> +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | grep - >>> E {fnmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 2 >> Why don't use FileCheck for this? >> >> -- >> With best regards, Anton Korobeynikov >> Faculty of Mathematics and Mechanics, Saint Petersburg State >> University >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From david_goodwin at apple.com Tue Aug 4 13:45:01 2009 From: david_goodwin at apple.com (David Goodwin) Date: Tue, 04 Aug 2009 18:45:01 -0000 Subject: [llvm-commits] [llvm] r78085 - in /llvm/trunk: lib/Target/ARM/ARMInstrNEON.td lib/Target/ARM/ARMInstrVFP.td test/CodeGen/ARM/fnmacs.ll Message-ID: <200908041845.n74IjBN0015695@zion.cs.uiuc.edu> Author: david_goodwin Date: Tue Aug 4 13:44:29 2009 New Revision: 78085 URL: http://llvm.org/viewvc/llvm-project?rev=78085&view=rev Log: Match common pattern for FNMAC. Add NEON SP support. Modified: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td llvm/trunk/lib/Target/ARM/ARMInstrVFP.td llvm/trunk/test/CodeGen/ARM/fnmacs.ll Modified: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrNEON.td?rev=78085&r1=78084&r2=78085&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrNEON.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Tue Aug 4 13:44:29 2009 @@ -953,6 +953,7 @@ // Vector Multiply-Accumulate/Subtract used for single-precision FP def : N3VDMulOps; +def : N3VDMulOps; // Vector Subtract Operations. Modified: llvm/trunk/lib/Target/ARM/ARMInstrVFP.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrVFP.td?rev=78085&r1=78084&r2=78085&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrVFP.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrVFP.td Tue Aug 4 13:44:29 2009 @@ -346,6 +346,11 @@ let Inst{6} = 1; } +def : Pat<(fsub DPR:$dstin, (fmul DPR:$a, DPR:$b)), + (FNMACD DPR:$dstin, DPR:$a, DPR:$b)>, Requires<[DontUseNEONForFP]>; +def : Pat<(fsub SPR:$dstin, (fmul SPR:$a, SPR:$b)), + (FNMACS SPR:$dstin, SPR:$a, SPR:$b)>, Requires<[DontUseNEONForFP]>; + def FNMSCD : ADbI<0b11100001, (outs DPR:$dst), (ins DPR:$dstin, DPR:$a, DPR:$b), "fnmscd", " $dst, $a, $b", [(set DPR:$dst, (fsub (fneg (fmul DPR:$a, DPR:$b)), DPR:$dstin))]>, Modified: llvm/trunk/test/CodeGen/ARM/fnmacs.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fnmacs.ll?rev=78085&r1=78084&r2=78085&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/fnmacs.ll (original) +++ llvm/trunk/test/CodeGen/ARM/fnmacs.ll Tue Aug 4 13:44:29 2009 @@ -1,4 +1,3 @@ -; XFAIL: * ; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep -E {fnmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | grep -E {vmls.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | grep -E {fnmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 From clattner at apple.com Tue Aug 4 13:45:30 2009 From: clattner at apple.com (Chris Lattner) Date: Tue, 4 Aug 2009 11:45:30 -0700 Subject: [llvm-commits] [llvm] r78083 - in /llvm/trunk/test/CodeGen/ARM: fnmscs.ll fnmuls.ll In-Reply-To: References: <200908041812.n74ICFSh014698@zion.cs.uiuc.edu> Message-ID: On Aug 4, 2009, at 11:44 AM, Chris Lattner wrote: > > On Aug 4, 2009, at 11:26 AM, David Goodwin wrote: > >> Where is the documentation for FileCheck? > > I still need to write the docs unfortunately. > > Basically it does a grep for a prefix (defaulting to "CHECK:") and > verifies that the strings occur, and in order. Take a look at > CodeGen/ > arm/mul_const.ll for a simple example. It also defaults to > canonicalizing horizontal whitespace, so you don't have to do an exact > match on tabs and spaces. > > One annoying current limitation is that it doesn't support regex's > yet. Oh, one really nice thing about it is that it lets you merge multiple tiny .ll files into larger ones, which run faster. For example, see CodeGen/X86/sse41.ll -Chris From evan.cheng at apple.com Tue Aug 4 13:46:22 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 04 Aug 2009 18:46:22 -0000 Subject: [llvm-commits] [llvm] r78086 - in /llvm/trunk: lib/Target/ARM/ARMRegisterInfo.td test/CodeGen/Thumb2/2009-08-04-CoalescerAssert.ll Message-ID: <200908041846.n74IkN32015737@zion.cs.uiuc.edu> Author: evancheng Date: Tue Aug 4 13:46:17 2009 New Revision: 78086 URL: http://llvm.org/viewvc/llvm-project?rev=78086&view=rev Log: In thumb mode, r7 is used as frame register. This fixes pr4681. Added: llvm/trunk/test/CodeGen/Thumb2/2009-08-04-CoalescerAssert.ll Modified: llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td Modified: llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td?rev=78086&r1=78085&r2=78086&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td (original) +++ llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td Tue Aug 4 13:46:17 2009 @@ -160,6 +160,13 @@ ARM::R4, ARM::R5, ARM::R6, ARM::R8, ARM::R10,ARM::R11, ARM::R7 }; + // FP is R7, R9 is available as callee-saved register. + // This is used by non-Darwin platform in Thumb mode. + static const unsigned ARM_GPR_AO_5[] = { + ARM::R0, ARM::R1, ARM::R2, ARM::R3, + ARM::R12,ARM::LR, + ARM::R4, ARM::R5, ARM::R6, + ARM::R8, ARM::R9, ARM::R10,ARM::R11,ARM::R7 }; GPRClass::iterator GPRClass::allocation_order_begin(const MachineFunction &MF) const { @@ -173,6 +180,8 @@ } else { if (Subtarget.isR9Reserved()) return ARM_GPR_AO_2; + else if (Subtarget.isThumb()) + return ARM_GPR_AO_5; else return ARM_GPR_AO_1; } @@ -193,6 +202,8 @@ } else { if (Subtarget.isR9Reserved()) I = ARM_GPR_AO_2 + (sizeof(ARM_GPR_AO_2)/sizeof(unsigned)); + else if (Subtarget.isThumb()) + I = ARM_GPR_AO_5 + (sizeof(ARM_GPR_AO_5)/sizeof(unsigned)); else I = ARM_GPR_AO_1 + (sizeof(ARM_GPR_AO_1)/sizeof(unsigned)); } Added: llvm/trunk/test/CodeGen/Thumb2/2009-08-04-CoalescerAssert.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/2009-08-04-CoalescerAssert.ll?rev=78086&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/2009-08-04-CoalescerAssert.ll (added) +++ llvm/trunk/test/CodeGen/Thumb2/2009-08-04-CoalescerAssert.ll Tue Aug 4 13:46:17 2009 @@ -0,0 +1,29 @@ +; RUN: llvm-as < %s | llc -mtriple=thumbv7-none-linux-gnueabi +; PR4681 + + %struct.FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i32, i32, [40 x i8] } + %struct._IO_marker = type { %struct._IO_marker*, %struct.FILE*, i32 } + at .str2 = external constant [30 x i8], align 1 ; <[30 x i8]*> [#uses=1] + +define arm_aapcscc i32 @__mf_heuristic_check(i32 %ptr, i32 %ptr_high) nounwind { +entry: + br i1 undef, label %bb1, label %bb + +bb: ; preds = %entry + unreachable + +bb1: ; preds = %entry + br i1 undef, label %bb9, label %bb2 + +bb2: ; preds = %bb1 + %0 = call i8* @llvm.frameaddress(i32 0) ; [#uses=1] + %1 = call arm_aapcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* noalias undef, i8* noalias getelementptr ([30 x i8]* @.str2, i32 0, i32 0), i8* %0, i8* null) nounwind ; [#uses=0] + unreachable + +bb9: ; preds = %bb1 + ret i32 undef +} + +declare i8* @llvm.frameaddress(i32) nounwind readnone + +declare arm_aapcscc i32 @fprintf(%struct.FILE* noalias nocapture, i8* noalias nocapture, ...) nounwind From stoklund at 2pi.dk Tue Aug 4 14:01:48 2009 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Tue, 4 Aug 2009 21:01:48 +0200 Subject: [llvm-commits] [llvm] r77989 - in /llvm/trunk: lib/CodeGen/LowerSubregs.cpp lib/CodeGen/MachineInstr.cpp test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll In-Reply-To: <5B3E9460-BBBB-4715-A7F6-EA2454C51A6C@apple.com> References: <200908032008.n73K8goN023448@zion.cs.uiuc.edu> <85AC6E8F-168F-441E-B591-59C3B543F6EE@apple.com> <87eirsrlf9.fsf@chora.dk> <5B3E9460-BBBB-4715-A7F6-EA2454C51A6C@apple.com> Message-ID: On 04/08/2009, at 19.31, Evan Cheng wrote: > I am very hesitant to change the semantics. That will break a lot of > assumptions in the register allocator. I think the current approach of > having subreg lowering pass insert the right instructions to model > "kill" is enough. Is it not? You are probably right. I am still struggling to completely understand the semantics. We will almost certainly need to insert fake instructions that only change flags. I am using IMPLICIT_DEF for that now, but it should probably be replaced by a new ALTER_LIFE or something. [...] >>> Undef operands are "don't care". :-) It would have been cleaner to >>> have an Undef machineoperand rather than a register machineoperand >>> that's undef. But we still need to assign registers to them so the >>> instructions can be translated to machine code. Ok, so if I understand you correctly, the actual register doesn't really matter. It is only there so we produce valid machine code and the only restriction is that the register class must be correct. And of course there are two-address constraints. If that is correct, we could write an undef operand as %UNDEF. Like this: %R0 = INSERT_SUBREG %UNDEF, %R0L, 1 This makes sense to me. Note that in this case %R0 must be dead. Not because it is referenced by an , but because it is not killed before being defined. MachineInstr::addRegisterKilled() should not remove the flag. It should completely skip the undef operand, just like the regscavenger does. The flags and should not be allowed at the same time. It is nonsensical. Am I on the right track? From alenhar2 at cs.uiuc.edu Tue Aug 4 14:06:35 2009 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Tue, 04 Aug 2009 19:06:35 -0000 Subject: [llvm-commits] [poolalloc] r78087 - /poolalloc/trunk/include/dsa/DSNode.h Message-ID: <200908041906.n74J6jwA016348@zion.cs.uiuc.edu> Author: alenhar2 Date: Tue Aug 4 14:06:07 2009 New Revision: 78087 URL: http://llvm.org/viewvc/llvm-project?rev=78087&view=rev Log: remove unnecesarry member Modified: poolalloc/trunk/include/dsa/DSNode.h Modified: poolalloc/trunk/include/dsa/DSNode.h URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/dsa/DSNode.h?rev=78087&r1=78086&r2=78087&view=diff ============================================================================== --- poolalloc/trunk/include/dsa/DSNode.h (original) +++ poolalloc/trunk/include/dsa/DSNode.h Tue Aug 4 14:06:07 2009 @@ -426,8 +426,6 @@ static DSNode *createSentinel() { return new DSNode(0,0); } static void destroySentinel(DSNode *N) { delete N; } - //static DSNode *createNode(const DSNode &V) { return new DSNode(V); } - void addNodeToList(DSNode *NTy) {} void removeNodeFromList(DSNode *NTy) {} From alenhar2 at cs.uiuc.edu Tue Aug 4 14:09:04 2009 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Tue, 04 Aug 2009 19:09:04 -0000 Subject: [llvm-commits] [poolalloc] r78088 - in /poolalloc/trunk/lib/DSA: BottomUpClosure.cpp CallTargets.cpp DataStructure.cpp DataStructureStats.cpp Local.cpp Printer.cpp StdLibPass.cpp TopDownClosure.cpp Message-ID: <200908041909.n74J97fh016428@zion.cs.uiuc.edu> Author: alenhar2 Date: Tue Aug 4 14:08:49 2009 New Revision: 78088 URL: http://llvm.org/viewvc/llvm-project?rev=78088&view=rev Log: make build against head Modified: poolalloc/trunk/lib/DSA/BottomUpClosure.cpp poolalloc/trunk/lib/DSA/CallTargets.cpp poolalloc/trunk/lib/DSA/DataStructure.cpp poolalloc/trunk/lib/DSA/DataStructureStats.cpp poolalloc/trunk/lib/DSA/Local.cpp poolalloc/trunk/lib/DSA/Printer.cpp poolalloc/trunk/lib/DSA/StdLibPass.cpp poolalloc/trunk/lib/DSA/TopDownClosure.cpp Modified: poolalloc/trunk/lib/DSA/BottomUpClosure.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/BottomUpClosure.cpp?rev=78088&r1=78087&r2=78088&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/BottomUpClosure.cpp (original) +++ poolalloc/trunk/lib/DSA/BottomUpClosure.cpp Tue Aug 4 14:08:49 2009 @@ -20,6 +20,8 @@ #include "llvm/Module.h" #include "llvm/ADT/Statistic.h" #include "llvm/Support/Debug.h" +#include "llvm/Support/FormattedStream.h" + using namespace llvm; namespace { @@ -52,15 +54,15 @@ calculateGraphs(MainFunc, Stack, NextID, ValMap); CloneAuxIntoGlobal(getDSGraph(*MainFunc)); } else { - DOUT << debugname << ": No 'main' function found!\n"; + DEBUG(ferrs() << debugname << ": No 'main' function found!\n"); } // Calculate the graphs for any functions that are unreachable from main... for (Module::iterator I = M.begin(), E = M.end(); I != E; ++I) if (!I->isDeclaration() && !hasDSGraph(*I)) { if (MainFunc) - DOUT << debugname << ": Function unreachable from main: " - << I->getName() << "\n"; + DEBUG(ferrs() << debugname << ": Function unreachable from main: " + << I->getName() << "\n"); calculateGraphs(I, Stack, NextID, ValMap); // Calculate all graphs. CloneAuxIntoGlobal(getDSGraph(*I)); } @@ -261,14 +263,14 @@ // If this is a new SCC, process it now. if (Stack.back() == F) { // Special case the single "SCC" case here. - DOUT << "Visiting single node SCC #: " << MyID << " fn: " - << F->getName() << "\n"; + DEBUG(ferrs() << "Visiting single node SCC #: " << MyID << " fn: " + << F->getName() << "\n"); Stack.pop_back(); - DOUT << " [BU] Calculating graph for: " << F->getName()<< "\n"; + DEBUG(ferrs() << " [BU] Calculating graph for: " << F->getName()<< "\n"); calculateGraph(Graph); - DOUT << " [BU] Done inlining: " << F->getName() << " [" - << Graph->getGraphSize() << "+" << Graph->getAuxFunctionCalls().size() - << "]\n"; + DEBUG(ferrs() << " [BU] Done inlining: " << F->getName() << " [" + << Graph->getGraphSize() << "+" << Graph->getAuxFunctionCalls().size() + << "]\n"); if (MaxSCC < 1) MaxSCC = 1; @@ -295,7 +297,7 @@ ResolvedFuncs.resize(uid - ResolvedFuncs.begin()); if (ResolvedFuncs.size() || NewCalleeFuncs.size()) { - DOUT << "Recalculating " << F->getName() << " due to new knowledge\n"; + DEBUG(ferrs() << "Recalculating " << F->getName() << " due to new knowledge\n"); ValMap.erase(F); return calculateGraphs(F, Stack, NextID, ValMap); } else { @@ -339,8 +341,8 @@ } Stack.pop_back(); - DOUT << "Calculating graph for SCC #: " << MyID << " of size: " - << SCCSize << "\n"; + DEBUG(ferrs() << "Calculating graph for SCC #: " << MyID << " of size: " + << SCCSize << "\n"); // Compute the Max SCC Size. if (MaxSCC < SCCSize) @@ -352,9 +354,9 @@ // Now that we have one big happy family, resolve all of the call sites in // the graph... calculateGraph(SCCGraph); - DOUT << " [BU] Done inlining SCC [" << SCCGraph->getGraphSize() - << "+" << SCCGraph->getAuxFunctionCalls().size() << "]\n" - << "DONE with SCC #: " << MyID << "\n"; + DEBUG(ferrs() << " [BU] Done inlining SCC [" << SCCGraph->getGraphSize() + << "+" << SCCGraph->getAuxFunctionCalls().size() << "]\n" + << "DONE with SCC #: " << MyID << "\n"); // We never have to revisit "SCC" processed functions... //propagate incomplete call nodes @@ -471,28 +473,30 @@ // Get the data structure graph for the called function. GI = getDSGraph(*Callee); // Graph to inline DEBUG(GI->AssertGraphOK(); GI->getGlobalsGraph()->AssertGraphOK()); - DOUT << " Inlining graph for " << Callee->getName() - << "[" << GI->getGraphSize() << "+" - << GI->getAuxFunctionCalls().size() << "] into '" - << Graph->getFunctionNames() << "' [" << Graph->getGraphSize() <<"+" - << Graph->getAuxFunctionCalls().size() << "]\n"; + DEBUG(ferrs() << " Inlining graph for " << Callee->getName() + << "[" << GI->getGraphSize() << "+" + << GI->getAuxFunctionCalls().size() << "] into '" + << Graph->getFunctionNames() << "' [" << Graph->getGraphSize() <<"+" + << Graph->getAuxFunctionCalls().size() << "]\n"); Graph->mergeInGraph(CS, *Callee, *GI, DSGraph::StripAllocaBit|DSGraph::DontCloneCallNodes| (isComplete?0:DSGraph::DontCloneAuxCallNodes)); ++NumInlines; DEBUG(Graph->AssertGraphOK();); } else if (CalledFuncs.size() > 1) { - DEBUG(std::cerr << "In Fns: " << Graph->getFunctionNames() << "\n"); - DEBUG(std::cerr << " calls " << CalledFuncs.size() + DEBUG(ferrs() << "In Fns: " << Graph->getFunctionNames() << "\n"); + DEBUG(ferrs() << " calls " << CalledFuncs.size() << " fns from site: " << CS.getCallSite().getInstruction() << " " << *CS.getCallSite().getInstruction()); - DEBUG(std::cerr << " Fns ="); + DEBUG(ferrs() << " Fns ="); unsigned NumPrinted = 0; for (std::vector::iterator I = CalledFuncs.begin(), E = CalledFuncs.end(); I != E; ++I) - if (NumPrinted++ < 8) DOUT << " " << (*I)->getName(); - DOUT << "\n"; + if (NumPrinted++ < 8) { + DEBUG(ferrs() << " " << (*I)->getName()); + } + DEBUG(ferrs() << "\n"); if (!isComplete) { for (unsigned x = 0; x < CalledFuncs.size(); ) @@ -543,17 +547,17 @@ // Clean up the final graph! GI->removeDeadNodes(DSGraph::KeepUnreachableGlobals); } else { - DOUT << "***\n*** RECYCLED GRAPH ***\n***\n"; + DEBUG(ferrs() << "***\n*** RECYCLED GRAPH ***\n***\n"); } GI = IndCallGraph.first; // Merge the unified graph into this graph now. - DOUT << " Inlining multi callee graph " - << "[" << GI->getGraphSize() << "+" - << GI->getAuxFunctionCalls().size() << "] into '" - << Graph->getFunctionNames() << "' [" << Graph->getGraphSize() <<"+" - << Graph->getAuxFunctionCalls().size() << "]\n"; + DEBUG(ferrs() << " Inlining multi callee graph " + << "[" << GI->getGraphSize() << "+" + << GI->getAuxFunctionCalls().size() << "] into '" + << Graph->getFunctionNames() << "' [" << Graph->getGraphSize() <<"+" + << Graph->getAuxFunctionCalls().size() << "]\n"); Graph->mergeInGraph(CS, IndCallGraph.second, *GI, DSGraph::StripAllocaBit | @@ -618,26 +622,28 @@ // Get the data structure graph for the called function. GI = getDSGraph(*Callee); // Graph to inline if (GI == Graph) continue; - DOUT << " Inlining graph for " << Callee->getName() - << "[" << GI->getGraphSize() << "+" - << GI->getAuxFunctionCalls().size() << "] into '" - << Graph->getFunctionNames() << "' [" << Graph->getGraphSize() <<"+" - << Graph->getAuxFunctionCalls().size() << "]\n"; + DEBUG(ferrs() << " Inlining graph for " << Callee->getName() + << "[" << GI->getGraphSize() << "+" + << GI->getAuxFunctionCalls().size() << "] into '" + << Graph->getFunctionNames() << "' [" << Graph->getGraphSize() <<"+" + << Graph->getAuxFunctionCalls().size() << "]\n"); Graph->mergeInGraph(CS, *Callee, *GI, DSGraph::StripAllocaBit|DSGraph::DontCloneCallNodes); ++NumInlines; } else { - DEBUG(std::cerr << "In Fns: " << Graph->getFunctionNames() << "\n"); + DEBUG(ferrs() << "In Fns: " << Graph->getFunctionNames() << "\n"); DEBUG(std::cerr << " calls " << CalledFuncs.size() << " fns from site: " << CS.getCallSite().getInstruction() << " " << *CS.getCallSite().getInstruction()); - DEBUG(std::cerr << " Fns ="); + DEBUG(ferrs() << " Fns ="); unsigned NumPrinted = 0; for (std::vector::iterator I = CalledFuncs.begin(), E = CalledFuncs.end(); I != E; ++I) - if (NumPrinted++ < 8) DOUT << " " << (*I)->getName(); - DOUT << "\n"; + if (NumPrinted++ < 8) { + DEBUG(ferrs() << " " << (*I)->getName()); + } + DEBUG(ferrs() << "\n"); for (unsigned x = 0; x < CalledFuncs.size(); ) if (!hasDSGraph(*CalledFuncs[x])) @@ -690,18 +696,17 @@ // Clean up the final graph! GI->removeDeadNodes(DSGraph::KeepUnreachableGlobals); } else { - DOUT << "***\n*** RECYCLED GRAPH ***\n***\n"; + DEBUG(ferrs() << "***\n*** RECYCLED GRAPH ***\n***\n"); } GI = IndCallGraph.first; // Merge the unified graph into this graph now. - DEBUG( - DOUT << " Inlining multi callee graph " + DEBUG(ferrs() << " Inlining multi callee graph " << "[" << GI->getGraphSize() << "+" << GI->getAuxFunctionCalls().size() << "] into '" << Graph->getFunctionNames() << "' [" << Graph->getGraphSize() <<"+" - << Graph->getAuxFunctionCalls().size() << "]\n"; ); + << Graph->getAuxFunctionCalls().size() << "]\n" ); Graph->mergeInGraph(CS, IndCallGraph.second, *GI, DSGraph::StripAllocaBit | Modified: poolalloc/trunk/lib/DSA/CallTargets.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/CallTargets.cpp?rev=78088&r1=78087&r2=78088&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/CallTargets.cpp (original) +++ poolalloc/trunk/lib/DSA/CallTargets.cpp Tue Aug 4 14:08:49 2009 @@ -24,7 +24,7 @@ #include "dsa/CallTargets.h" #include "llvm/ADT/Statistic.h" #include "llvm/Support/Debug.h" -#include "llvm/Support/Streams.h" +#include "llvm/Support/FormattedStream.h" #include "llvm/Constants.h" #include using namespace llvm; @@ -74,11 +74,11 @@ } if (N->isCompleteNode() && !IndMap[cs].size()) { ++CompleteEmpty; - cerr << "Call site empty: '" - << cs.getInstruction()->getName() - << "' In '" - << cs.getInstruction()->getParent()->getParent()->getName() - << "'\n"; + DEBUG(ferrs() << "Call site empty: '" + << cs.getInstruction()->getName() + << "' In '" + << cs.getInstruction()->getParent()->getParent()->getName() + << "'\n"); } } } else { @@ -100,13 +100,13 @@ O << "* "; CallSite cs = ii->first; cs.getInstruction()->dump(); - O << cs.getInstruction()->getParent()->getParent()->getName() << " " - << cs.getInstruction()->getName() << " "; + O << cs.getInstruction()->getParent()->getParent()->getNameStr() << " " + << cs.getInstruction()->getNameStr() << " "; } O << ii->first.getInstruction() << ":"; for (std::vector::const_iterator i = ii->second.begin(), e = ii->second.end(); i != e; ++i) { - O << " " << (*i)->getName(); + O << " " << (*i)->getNameStr(); } O << "\n"; } Modified: poolalloc/trunk/lib/DSA/DataStructure.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/DataStructure.cpp?rev=78088&r1=78087&r2=78088&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/DataStructure.cpp (original) +++ poolalloc/trunk/lib/DSA/DataStructure.cpp Tue Aug 4 14:08:49 2009 @@ -1426,7 +1426,7 @@ std::string Return; for (DSGraph::retnodes_iterator I = retnodes_begin(); I != retnodes_end(); ++I) - Return += I->first->getName() + " "; + Return += I->first->getNameStr() + " "; Return.erase(Return.end()-1, Return.end()); // Remove last space character return Return; } Modified: poolalloc/trunk/lib/DSA/DataStructureStats.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/DataStructureStats.cpp?rev=78088&r1=78087&r2=78088&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/DataStructureStats.cpp (original) +++ poolalloc/trunk/lib/DSA/DataStructureStats.cpp Tue Aug 4 14:08:49 2009 @@ -20,6 +20,8 @@ #include "llvm/Support/Streams.h" #include "llvm/ADT/Statistic.h" #include "llvm/Support/Debug.h" +#include "llvm/Support/FormattedStream.h" + #include using namespace llvm; @@ -94,19 +96,21 @@ if (Callees.size() > 0) { totalNumCallees += Callees.size(); ++numIndirectCalls; - } else - cerr << "WARNING: No callee in Function '" << F.getName() - << "' at call: \n" - << *I->getCallSite().getInstruction(); + } else { + DEBUG(ferrs() << "WARNING: No callee in Function '" + << F.getNameStr() << "' at call: \n" + << *I->getCallSite().getInstruction()); + } } TotalNumCallees += totalNumCallees; NumIndirectCalls += numIndirectCalls; - if (numIndirectCalls) - cout << " In function " << F.getName() << ": " - << (totalNumCallees / (double) numIndirectCalls) - << " average callees per indirect call\n"; + if (numIndirectCalls) { + DEBUG(ferrs() << " In function " << F.getName() << ": " + << (totalNumCallees / (double) numIndirectCalls) + << " average callees per indirect call\n"); + } } DSNode *DSGraphStats::getNodeForValue(Value *V) { Modified: poolalloc/trunk/lib/DSA/Local.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/Local.cpp?rev=78088&r1=78087&r2=78088&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/Local.cpp (original) +++ poolalloc/trunk/lib/DSA/Local.cpp Tue Aug 4 14:08:49 2009 @@ -23,6 +23,7 @@ #include "llvm/Target/TargetData.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/Debug.h" +#include "llvm/Support/FormattedStream.h" #include "llvm/Support/Timer.h" #include "llvm/ADT/Statistic.h" #include "llvm/ADT/DenseSet.h" @@ -249,7 +250,7 @@ NH = getValueDest(*(cast(C)->getAliasee())); return 0; } else { - llvm::cerr << "Unknown constant: " << *C << std::endl; + DEBUG(ferrs() << "Unknown constant: " << *C << "\n"); assert(0 && "Unknown constant type!"); } N = createNode(); // just create a shadow node @@ -486,9 +487,9 @@ } else { // Variable index into a node. We must merge all of the elements of the // sequential type here. - if (isa(STy)) - cerr << "Pointer indexing not handled yet!\n"; - else { + if (isa(STy)) { + DEBUG(ferrs() << "Pointer indexing not handled yet!\n"); + } else { const ArrayType *ATy = cast(STy); unsigned ElSize = TD.getTypeAllocSize(CurTy); DSNode *N = Value.getNode(); @@ -535,8 +536,9 @@ if (IGEP->getParent()->getParent()->getName() == "alloc_vfsmnt") { if (G.getPoolDescriptorsMap().count(N) != 0) - if (G.getPoolDescriptorsMap()[N]) - std::cerr << "LLVA: GEP[" << 0 << "]: Pool for " << GEP.getName() << " is " << G.getPoolDescriptorsMap()[N]->getName() << "\n"; + if (G.getPoolDescriptorsMap()[N]) { + DEBUG(ferrs() << "LLVA: GEP[" << 0 << "]: Pool for " << GEP.getName() << " is " << G.getPoolDescriptorsMap()[N]->getName() << "\n"); + } } } #endif @@ -695,7 +697,7 @@ return true; } - cerr << "[dsa:local] Unhandled intrinsic: " << F->getName() << "\n"; + DEBUG(ferrs() << "[dsa:local] Unhandled intrinsic: " << F->getName() << "\n"); assert(0 && "Unhandled intrinsic"); return false; } @@ -726,7 +728,7 @@ if (!isa(Callee)) { CalleeNode = getValueDest(*Callee).getNode(); if (CalleeNode == 0) { - cerr << "WARNING: Program is calling through a null pointer?\n"<< *I; + DEBUG(ferrs() << "WARNING: Program is calling through a null pointer?\n" << *I); return; // Calling a null pointer? } } Modified: poolalloc/trunk/lib/DSA/Printer.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/Printer.cpp?rev=78088&r1=78087&r2=78088&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/Printer.cpp (original) +++ poolalloc/trunk/lib/DSA/Printer.cpp Tue Aug 4 14:08:49 2009 @@ -24,7 +24,7 @@ #include "llvm/Support/Streams.h" #include "llvm/ADT/Statistic.h" #include "llvm/Config/config.h" -#include "llvm/Support/raw_ostream.h" +#include "llvm/Support/FormattedStream.h" #include #include #include @@ -190,7 +190,7 @@ if (G->getReturnNodes().size() == 1) Label = "returning"; else - Label = I->first->getName() + " ret node"; + Label = I->first->getNameStr() + " ret node"; // Output the return node... GW.emitSimpleNode((void*)I->first, "plaintext=circle", Label); @@ -295,17 +295,17 @@ if (I->getName() == "main" || !OnlyPrintMain) { const Function *SCCFn = Gr->retnodes_begin()->first; if (&*I == SCCFn) { - Gr->writeGraphToFile(O, Prefix+I->getName()); + Gr->writeGraphToFile(O, Prefix+I->getNameStr()); } else { IsDuplicateGraph = true; // Don't double count node/call nodes. - O << "Didn't write '" << Prefix+I->getName() - << ".dot' - Graph already emitted to '" << Prefix+SCCFn->getName() + O << "Didn't write '" << Prefix+I->getNameStr() + << ".dot' - Graph already emitted to '" << Prefix+SCCFn->getNameStr() << "\n"; } } else { const Function *SCCFn = Gr->retnodes_begin()->first; if (&*I == SCCFn) { - O << "Skipped Writing '" << Prefix+I->getName() << ".dot'... [" + O << "Skipped Writing '" << Prefix+I->getNameStr() << ".dot'... [" << Gr->getGraphSize() << "+" << NumCalls << "]\n"; } else { IsDuplicateGraph = true; // Don't double count node/call nodes. @@ -343,13 +343,13 @@ void DataStructures::dumpCallGraph() const { for( ActualCalleesTy::const_iterator ii = ActualCallees.begin(), ee = ActualCallees.end(); ii != ee; ++ii) { - if (ii->first) cerr << ii->first->getParent()->getParent()->getName() << " "; - cerr << ii->first << ": ["; + if (ii->first) ferrs() << ii->first->getParent()->getParent()->getName() << " "; + ferrs() << ii->first << ": ["; for (callee_iterator cbi = ii->second.begin(), cbe = ii->second.end(); cbi != cbe; ++cbi) { - cerr << (*cbi)->getName() << " "; + ferrs() << (*cbi)->getName() << " "; } - cerr << "]\n"; + ferrs() << "]\n"; if (ii->first) ii->first->dump(); } } Modified: poolalloc/trunk/lib/DSA/StdLibPass.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/StdLibPass.cpp?rev=78088&r1=78087&r2=78088&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/StdLibPass.cpp (original) +++ poolalloc/trunk/lib/DSA/StdLibPass.cpp Tue Aug 4 14:08:49 2009 @@ -20,6 +20,7 @@ #include "llvm/Target/TargetData.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/Debug.h" +#include "llvm/Support/FormattedStream.h" #include "llvm/Support/Timer.h" #include #include "llvm/Module.h" @@ -182,7 +183,8 @@ if (CI->getOperand(0) == F) { DSGraph* Graph = getDSGraph(*CI->getParent()->getParent()); //delete the call - DOUT << "Removing " << F->getName() << " from " << CI->getParent()->getParent()->getName() << "\n"; + DEBUG(ferrs() << "Removing " << F->getNameStr() << " from " + << CI->getParent()->getParent()->getNameStr() << "\n"); Graph->removeFunctionCalls(*F); } } Modified: poolalloc/trunk/lib/DSA/TopDownClosure.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/TopDownClosure.cpp?rev=78088&r1=78087&r2=78088&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/TopDownClosure.cpp (original) +++ poolalloc/trunk/lib/DSA/TopDownClosure.cpp Tue Aug 4 14:08:49 2009 @@ -20,6 +20,7 @@ #include "llvm/DerivedTypes.h" #include "dsa/DSGraph.h" #include "llvm/Support/Debug.h" +#include "llvm/Support/FormattedStream.h" #include "llvm/Support/Timer.h" #include "llvm/ADT/Statistic.h" using namespace llvm; @@ -197,7 +198,8 @@ RC.getClonedNH(GG->getNodeForValue(*GI)); } - DOUT << "[TD] Inlining callers into '" << DSG->getFunctionNames() << "'\n"; + DEBUG(ferrs() << "[TD] Inlining callers into '" + << DSG->getFunctionNames() << "'\n"); // Iteratively inline caller graphs into this graph. while (!EdgesFromCaller.empty()) { @@ -213,13 +215,16 @@ do { const DSCallSite &CS = *EdgesFromCaller.back().CS; const Function &CF = *EdgesFromCaller.back().CalledFunction; - DOUT << " [TD] Inlining graph into Fn '" << CF.getName() << "' from "; - if (CallerGraph->getReturnNodes().empty()) - DOUT << "SYNTHESIZED INDIRECT GRAPH"; - else - DOUT << "Fn '" << CS.getCallSite().getInstruction()-> - getParent()->getParent()->getName() << "'"; - DOUT << ": " << CF.getFunctionType()->getNumParams() << " args\n"; + DEBUG(ferrs() << " [TD] Inlining graph into Fn '" + << CF.getNameStr() << "' from "); + if (CallerGraph->getReturnNodes().empty()) { + DEBUG(ferrs() << "SYNTHESIZED INDIRECT GRAPH"); + } else { + DEBUG(ferrs() << "Fn '" << CS.getCallSite().getInstruction()-> + getParent()->getParent()->getNameStr() << "'"); + } + DEBUG(ferrs() << ": " << CF.getFunctionType()->getNumParams() + << " args\n"); // Get the formal argument and return nodes for the called function and // merge them with the cloned subgraph. @@ -334,8 +339,8 @@ // If we already have this graph, recycle it. if (IndCallRecI != IndCallMap.end() && IndCallRecI->first == Callees) { - DOUT << " [TD] *** Reuse of indcall graph for " << Callees.size() - << " callees!\n"; + DEBUG(ferrs() << " [TD] *** Reuse of indcall graph for " << Callees.size() + << " callees!\n"); IndCallGraph = IndCallRecI->second; } else { // Otherwise, create a new DSGraph to represent this. From stoklund at 2pi.dk Tue Aug 4 14:17:29 2009 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Tue, 04 Aug 2009 19:17:29 -0000 Subject: [llvm-commits] [llvm] r78089 - /llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.cpp Message-ID: <200908041917.n74JHXH6016675@zion.cs.uiuc.edu> Author: stoklund Date: Tue Aug 4 14:16:55 2009 New Revision: 78089 URL: http://llvm.org/viewvc/llvm-project?rev=78089&view=rev Log: Most flags are reserved registers on Blackfin. The only exception is CC. Modified: llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.cpp Modified: llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.cpp?rev=78089&r1=78088&r2=78089&view=diff ============================================================================== --- llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.cpp Tue Aug 4 14:16:55 2009 @@ -63,6 +63,17 @@ BlackfinRegisterInfo::getReservedRegs(const MachineFunction &MF) const { using namespace BF; BitVector Reserved(getNumRegs()); + Reserved.set(AZ); + Reserved.set(AN); + Reserved.set(AQ); + Reserved.set(AC0); + Reserved.set(AC1); + Reserved.set(AV0); + Reserved.set(AV0S); + Reserved.set(AV1); + Reserved.set(AV1S); + Reserved.set(V); + Reserved.set(VS); Reserved.set(L0); Reserved.set(L1); Reserved.set(L2); From stoklund at 2pi.dk Tue Aug 4 14:18:03 2009 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Tue, 04 Aug 2009 19:18:03 -0000 Subject: [llvm-commits] [llvm] r78090 - /llvm/trunk/lib/CodeGen/MachineVerifier.cpp Message-ID: <200908041918.n74JI36T016706@zion.cs.uiuc.edu> Author: stoklund Date: Tue Aug 4 14:18:01 2009 New Revision: 78090 URL: http://llvm.org/viewvc/llvm-project?rev=78090&view=rev Log: Enforce stricter rules in machine code verifier. Implicit operands no longer get a free pass: Imp-use requires a live register and imp-def requires a dead register. There is also no special rule allowing redefinition of a sub-register when the super-register is live. The super register must have imp-kill+imp-def operands instead. Modified: llvm/trunk/lib/CodeGen/MachineVerifier.cpp Modified: llvm/trunk/lib/CodeGen/MachineVerifier.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineVerifier.cpp?rev=78090&r1=78089&r2=78090&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineVerifier.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineVerifier.cpp Tue Aug 4 14:18:01 2009 @@ -88,14 +88,6 @@ RV.push_back(*R); } - // Does RS contain any super-registers of Reg? - bool anySuperRegisters(const RegSet &RS, unsigned Reg) { - for (const unsigned *R = TRI->getSuperRegisters(Reg); *R; R++) - if (RS.count(*R)) - return true; - return false; - } - struct BBInfo { // Is this MBB reachable from the MF entry point? bool reachable; @@ -151,7 +143,7 @@ DenseMap MBBInfoMap; bool isReserved(unsigned Reg) { - return Reg < regsReserved.size() && regsReserved[Reg]; + return Reg < regsReserved.size() && regsReserved.test(Reg); } void visitMachineFunctionBefore(); @@ -287,6 +279,16 @@ MachineVerifier::visitMachineFunctionBefore() { regsReserved = TRI->getReservedRegs(*MF); + + // A sub-register of a reserved register is also reserved + for (int Reg = regsReserved.find_first(); Reg>=0; + Reg = regsReserved.find_next(Reg)) { + for (const unsigned *Sub = TRI->getSubRegisters(Reg); *Sub; ++Sub) { + // FIXME: This should probably be: + // assert(regsReserved.test(*Sub) && "Non-reserved sub-register"); + regsReserved.set(*Sub); + } + } markReachable(&MF->front()); } @@ -364,9 +366,8 @@ MI->getOperand(defIdx).getReg() == Reg) addRegWithSubRegs(regsKilled, Reg); } - // Explicit use of a dead register. - // A register use marked is OK. - if (!MO->isImplicit() && !MO->isUndef() && !regsLive.count(Reg)) { + // Use of a dead register. A register use marked is OK. + if (!MO->isUndef() && !regsLive.count(Reg)) { if (TargetRegisterInfo::isPhysicalRegister(Reg)) { // Reserved registers may be used even when 'dead'. if (!isReserved(Reg)) @@ -385,10 +386,7 @@ } else { // Register defined. // TODO: verify that earlyclobber ops are not used. - if (MO->isImplicit()) - addRegWithSubRegs(regsImpDefined, Reg); - else - addRegWithSubRegs(regsDefined, Reg); + addRegWithSubRegs(regsDefined, Reg); if (MO->isDead()) addRegWithSubRegs(regsDead, Reg); @@ -462,10 +460,7 @@ E = regsDefined.end(); I != E; ++I) { if (regsLive.count(*I)) { if (TargetRegisterInfo::isPhysicalRegister(*I)) { - // We allow double defines to physical registers with live - // super-registers. - if (!allowPhysDoubleDefs && !isReserved(*I) && - !anySuperRegisters(regsLive, *I)) { + if (!allowPhysDoubleDefs && !isReserved(*I)) { report("Redefining a live physical register", MI); *OS << "Register " << TRI->getName(*I) << " was defined but already live.\n"; From alenhar2 at cs.uiuc.edu Tue Aug 4 14:34:15 2009 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Tue, 04 Aug 2009 19:34:15 -0000 Subject: [llvm-commits] [poolalloc] r78091 - in /poolalloc/trunk/lib/DSA: BottomUpClosure.cpp CallTargets.cpp DataStructureStats.cpp Local.cpp Printer.cpp StdLibPass.cpp TopDownClosure.cpp Message-ID: <200908041934.n74JYKss017263@zion.cs.uiuc.edu> Author: alenhar2 Date: Tue Aug 4 14:33:52 2009 New Revision: 78091 URL: http://llvm.org/viewvc/llvm-project?rev=78091&view=rev Log: wrong output Modified: poolalloc/trunk/lib/DSA/BottomUpClosure.cpp poolalloc/trunk/lib/DSA/CallTargets.cpp poolalloc/trunk/lib/DSA/DataStructureStats.cpp poolalloc/trunk/lib/DSA/Local.cpp poolalloc/trunk/lib/DSA/Printer.cpp poolalloc/trunk/lib/DSA/StdLibPass.cpp poolalloc/trunk/lib/DSA/TopDownClosure.cpp Modified: poolalloc/trunk/lib/DSA/BottomUpClosure.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/BottomUpClosure.cpp?rev=78091&r1=78090&r2=78091&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/BottomUpClosure.cpp (original) +++ poolalloc/trunk/lib/DSA/BottomUpClosure.cpp Tue Aug 4 14:33:52 2009 @@ -54,14 +54,14 @@ calculateGraphs(MainFunc, Stack, NextID, ValMap); CloneAuxIntoGlobal(getDSGraph(*MainFunc)); } else { - DEBUG(ferrs() << debugname << ": No 'main' function found!\n"); + DEBUG(errs() << debugname << ": No 'main' function found!\n"); } // Calculate the graphs for any functions that are unreachable from main... for (Module::iterator I = M.begin(), E = M.end(); I != E; ++I) if (!I->isDeclaration() && !hasDSGraph(*I)) { if (MainFunc) - DEBUG(ferrs() << debugname << ": Function unreachable from main: " + DEBUG(errs() << debugname << ": Function unreachable from main: " << I->getName() << "\n"); calculateGraphs(I, Stack, NextID, ValMap); // Calculate all graphs. CloneAuxIntoGlobal(getDSGraph(*I)); @@ -263,12 +263,12 @@ // If this is a new SCC, process it now. if (Stack.back() == F) { // Special case the single "SCC" case here. - DEBUG(ferrs() << "Visiting single node SCC #: " << MyID << " fn: " + DEBUG(errs() << "Visiting single node SCC #: " << MyID << " fn: " << F->getName() << "\n"); Stack.pop_back(); - DEBUG(ferrs() << " [BU] Calculating graph for: " << F->getName()<< "\n"); + DEBUG(errs() << " [BU] Calculating graph for: " << F->getName()<< "\n"); calculateGraph(Graph); - DEBUG(ferrs() << " [BU] Done inlining: " << F->getName() << " [" + DEBUG(errs() << " [BU] Done inlining: " << F->getName() << " [" << Graph->getGraphSize() << "+" << Graph->getAuxFunctionCalls().size() << "]\n"); @@ -297,7 +297,7 @@ ResolvedFuncs.resize(uid - ResolvedFuncs.begin()); if (ResolvedFuncs.size() || NewCalleeFuncs.size()) { - DEBUG(ferrs() << "Recalculating " << F->getName() << " due to new knowledge\n"); + DEBUG(errs() << "Recalculating " << F->getName() << " due to new knowledge\n"); ValMap.erase(F); return calculateGraphs(F, Stack, NextID, ValMap); } else { @@ -341,7 +341,7 @@ } Stack.pop_back(); - DEBUG(ferrs() << "Calculating graph for SCC #: " << MyID << " of size: " + DEBUG(errs() << "Calculating graph for SCC #: " << MyID << " of size: " << SCCSize << "\n"); // Compute the Max SCC Size. @@ -354,7 +354,7 @@ // Now that we have one big happy family, resolve all of the call sites in // the graph... calculateGraph(SCCGraph); - DEBUG(ferrs() << " [BU] Done inlining SCC [" << SCCGraph->getGraphSize() + DEBUG(errs() << " [BU] Done inlining SCC [" << SCCGraph->getGraphSize() << "+" << SCCGraph->getAuxFunctionCalls().size() << "]\n" << "DONE with SCC #: " << MyID << "\n"); @@ -473,7 +473,7 @@ // Get the data structure graph for the called function. GI = getDSGraph(*Callee); // Graph to inline DEBUG(GI->AssertGraphOK(); GI->getGlobalsGraph()->AssertGraphOK()); - DEBUG(ferrs() << " Inlining graph for " << Callee->getName() + DEBUG(errs() << " Inlining graph for " << Callee->getName() << "[" << GI->getGraphSize() << "+" << GI->getAuxFunctionCalls().size() << "] into '" << Graph->getFunctionNames() << "' [" << Graph->getGraphSize() <<"+" @@ -484,19 +484,19 @@ ++NumInlines; DEBUG(Graph->AssertGraphOK();); } else if (CalledFuncs.size() > 1) { - DEBUG(ferrs() << "In Fns: " << Graph->getFunctionNames() << "\n"); - DEBUG(ferrs() << " calls " << CalledFuncs.size() + DEBUG(errs() << "In Fns: " << Graph->getFunctionNames() << "\n"); + DEBUG(errs() << " calls " << CalledFuncs.size() << " fns from site: " << CS.getCallSite().getInstruction() << " " << *CS.getCallSite().getInstruction()); - DEBUG(ferrs() << " Fns ="); + DEBUG(errs() << " Fns ="); unsigned NumPrinted = 0; for (std::vector::iterator I = CalledFuncs.begin(), E = CalledFuncs.end(); I != E; ++I) if (NumPrinted++ < 8) { - DEBUG(ferrs() << " " << (*I)->getName()); + DEBUG(errs() << " " << (*I)->getName()); } - DEBUG(ferrs() << "\n"); + DEBUG(errs() << "\n"); if (!isComplete) { for (unsigned x = 0; x < CalledFuncs.size(); ) @@ -547,13 +547,13 @@ // Clean up the final graph! GI->removeDeadNodes(DSGraph::KeepUnreachableGlobals); } else { - DEBUG(ferrs() << "***\n*** RECYCLED GRAPH ***\n***\n"); + DEBUG(errs() << "***\n*** RECYCLED GRAPH ***\n***\n"); } GI = IndCallGraph.first; // Merge the unified graph into this graph now. - DEBUG(ferrs() << " Inlining multi callee graph " + DEBUG(errs() << " Inlining multi callee graph " << "[" << GI->getGraphSize() << "+" << GI->getAuxFunctionCalls().size() << "] into '" << Graph->getFunctionNames() << "' [" << Graph->getGraphSize() <<"+" @@ -622,7 +622,7 @@ // Get the data structure graph for the called function. GI = getDSGraph(*Callee); // Graph to inline if (GI == Graph) continue; - DEBUG(ferrs() << " Inlining graph for " << Callee->getName() + DEBUG(errs() << " Inlining graph for " << Callee->getName() << "[" << GI->getGraphSize() << "+" << GI->getAuxFunctionCalls().size() << "] into '" << Graph->getFunctionNames() << "' [" << Graph->getGraphSize() <<"+" @@ -631,19 +631,19 @@ DSGraph::StripAllocaBit|DSGraph::DontCloneCallNodes); ++NumInlines; } else { - DEBUG(ferrs() << "In Fns: " << Graph->getFunctionNames() << "\n"); + DEBUG(errs() << "In Fns: " << Graph->getFunctionNames() << "\n"); DEBUG(std::cerr << " calls " << CalledFuncs.size() << " fns from site: " << CS.getCallSite().getInstruction() << " " << *CS.getCallSite().getInstruction()); - DEBUG(ferrs() << " Fns ="); + DEBUG(errs() << " Fns ="); unsigned NumPrinted = 0; for (std::vector::iterator I = CalledFuncs.begin(), E = CalledFuncs.end(); I != E; ++I) if (NumPrinted++ < 8) { - DEBUG(ferrs() << " " << (*I)->getName()); + DEBUG(errs() << " " << (*I)->getName()); } - DEBUG(ferrs() << "\n"); + DEBUG(errs() << "\n"); for (unsigned x = 0; x < CalledFuncs.size(); ) if (!hasDSGraph(*CalledFuncs[x])) @@ -696,13 +696,13 @@ // Clean up the final graph! GI->removeDeadNodes(DSGraph::KeepUnreachableGlobals); } else { - DEBUG(ferrs() << "***\n*** RECYCLED GRAPH ***\n***\n"); + DEBUG(errs() << "***\n*** RECYCLED GRAPH ***\n***\n"); } GI = IndCallGraph.first; // Merge the unified graph into this graph now. - DEBUG(ferrs() << " Inlining multi callee graph " + DEBUG(errs() << " Inlining multi callee graph " << "[" << GI->getGraphSize() << "+" << GI->getAuxFunctionCalls().size() << "] into '" << Graph->getFunctionNames() << "' [" << Graph->getGraphSize() <<"+" Modified: poolalloc/trunk/lib/DSA/CallTargets.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/CallTargets.cpp?rev=78091&r1=78090&r2=78091&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/CallTargets.cpp (original) +++ poolalloc/trunk/lib/DSA/CallTargets.cpp Tue Aug 4 14:33:52 2009 @@ -74,7 +74,7 @@ } if (N->isCompleteNode() && !IndMap[cs].size()) { ++CompleteEmpty; - DEBUG(ferrs() << "Call site empty: '" + DEBUG(errs() << "Call site empty: '" << cs.getInstruction()->getName() << "' In '" << cs.getInstruction()->getParent()->getParent()->getName() Modified: poolalloc/trunk/lib/DSA/DataStructureStats.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/DataStructureStats.cpp?rev=78091&r1=78090&r2=78091&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/DataStructureStats.cpp (original) +++ poolalloc/trunk/lib/DSA/DataStructureStats.cpp Tue Aug 4 14:33:52 2009 @@ -97,7 +97,7 @@ totalNumCallees += Callees.size(); ++numIndirectCalls; } else { - DEBUG(ferrs() << "WARNING: No callee in Function '" + DEBUG(errs() << "WARNING: No callee in Function '" << F.getNameStr() << "' at call: \n" << *I->getCallSite().getInstruction()); } @@ -107,7 +107,7 @@ NumIndirectCalls += numIndirectCalls; if (numIndirectCalls) { - DEBUG(ferrs() << " In function " << F.getName() << ": " + DEBUG(errs() << " In function " << F.getName() << ": " << (totalNumCallees / (double) numIndirectCalls) << " average callees per indirect call\n"); } Modified: poolalloc/trunk/lib/DSA/Local.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/Local.cpp?rev=78091&r1=78090&r2=78091&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/Local.cpp (original) +++ poolalloc/trunk/lib/DSA/Local.cpp Tue Aug 4 14:33:52 2009 @@ -250,7 +250,7 @@ NH = getValueDest(*(cast(C)->getAliasee())); return 0; } else { - DEBUG(ferrs() << "Unknown constant: " << *C << "\n"); + DEBUG(errs() << "Unknown constant: " << *C << "\n"); assert(0 && "Unknown constant type!"); } N = createNode(); // just create a shadow node @@ -488,7 +488,7 @@ // Variable index into a node. We must merge all of the elements of the // sequential type here. if (isa(STy)) { - DEBUG(ferrs() << "Pointer indexing not handled yet!\n"); + DEBUG(errs() << "Pointer indexing not handled yet!\n"); } else { const ArrayType *ATy = cast(STy); unsigned ElSize = TD.getTypeAllocSize(CurTy); @@ -537,7 +537,7 @@ { if (G.getPoolDescriptorsMap().count(N) != 0) if (G.getPoolDescriptorsMap()[N]) { - DEBUG(ferrs() << "LLVA: GEP[" << 0 << "]: Pool for " << GEP.getName() << " is " << G.getPoolDescriptorsMap()[N]->getName() << "\n"); + DEBUG(errs() << "LLVA: GEP[" << 0 << "]: Pool for " << GEP.getName() << " is " << G.getPoolDescriptorsMap()[N]->getName() << "\n"); } } } @@ -697,7 +697,7 @@ return true; } - DEBUG(ferrs() << "[dsa:local] Unhandled intrinsic: " << F->getName() << "\n"); + DEBUG(errs() << "[dsa:local] Unhandled intrinsic: " << F->getName() << "\n"); assert(0 && "Unhandled intrinsic"); return false; } @@ -728,7 +728,7 @@ if (!isa(Callee)) { CalleeNode = getValueDest(*Callee).getNode(); if (CalleeNode == 0) { - DEBUG(ferrs() << "WARNING: Program is calling through a null pointer?\n" << *I); + DEBUG(errs() << "WARNING: Program is calling through a null pointer?\n" << *I); return; // Calling a null pointer? } } Modified: poolalloc/trunk/lib/DSA/Printer.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/Printer.cpp?rev=78091&r1=78090&r2=78091&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/Printer.cpp (original) +++ poolalloc/trunk/lib/DSA/Printer.cpp Tue Aug 4 14:33:52 2009 @@ -343,13 +343,13 @@ void DataStructures::dumpCallGraph() const { for( ActualCalleesTy::const_iterator ii = ActualCallees.begin(), ee = ActualCallees.end(); ii != ee; ++ii) { - if (ii->first) ferrs() << ii->first->getParent()->getParent()->getName() << " "; - ferrs() << ii->first << ": ["; + if (ii->first) errs() << ii->first->getParent()->getParent()->getName() << " "; + errs() << ii->first << ": ["; for (callee_iterator cbi = ii->second.begin(), cbe = ii->second.end(); cbi != cbe; ++cbi) { - ferrs() << (*cbi)->getName() << " "; + errs() << (*cbi)->getName() << " "; } - ferrs() << "]\n"; + errs() << "]\n"; if (ii->first) ii->first->dump(); } } Modified: poolalloc/trunk/lib/DSA/StdLibPass.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/StdLibPass.cpp?rev=78091&r1=78090&r2=78091&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/StdLibPass.cpp (original) +++ poolalloc/trunk/lib/DSA/StdLibPass.cpp Tue Aug 4 14:33:52 2009 @@ -183,7 +183,7 @@ if (CI->getOperand(0) == F) { DSGraph* Graph = getDSGraph(*CI->getParent()->getParent()); //delete the call - DEBUG(ferrs() << "Removing " << F->getNameStr() << " from " + DEBUG(errs() << "Removing " << F->getNameStr() << " from " << CI->getParent()->getParent()->getNameStr() << "\n"); Graph->removeFunctionCalls(*F); } Modified: poolalloc/trunk/lib/DSA/TopDownClosure.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/TopDownClosure.cpp?rev=78091&r1=78090&r2=78091&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/TopDownClosure.cpp (original) +++ poolalloc/trunk/lib/DSA/TopDownClosure.cpp Tue Aug 4 14:33:52 2009 @@ -198,7 +198,7 @@ RC.getClonedNH(GG->getNodeForValue(*GI)); } - DEBUG(ferrs() << "[TD] Inlining callers into '" + DEBUG(errs() << "[TD] Inlining callers into '" << DSG->getFunctionNames() << "'\n"); // Iteratively inline caller graphs into this graph. @@ -215,15 +215,15 @@ do { const DSCallSite &CS = *EdgesFromCaller.back().CS; const Function &CF = *EdgesFromCaller.back().CalledFunction; - DEBUG(ferrs() << " [TD] Inlining graph into Fn '" + DEBUG(errs() << " [TD] Inlining graph into Fn '" << CF.getNameStr() << "' from "); if (CallerGraph->getReturnNodes().empty()) { - DEBUG(ferrs() << "SYNTHESIZED INDIRECT GRAPH"); + DEBUG(errs() << "SYNTHESIZED INDIRECT GRAPH"); } else { - DEBUG(ferrs() << "Fn '" << CS.getCallSite().getInstruction()-> + DEBUG(errs() << "Fn '" << CS.getCallSite().getInstruction()-> getParent()->getParent()->getNameStr() << "'"); } - DEBUG(ferrs() << ": " << CF.getFunctionType()->getNumParams() + DEBUG(errs() << ": " << CF.getFunctionType()->getNumParams() << " args\n"); // Get the formal argument and return nodes for the called function and @@ -339,7 +339,7 @@ // If we already have this graph, recycle it. if (IndCallRecI != IndCallMap.end() && IndCallRecI->first == Callees) { - DEBUG(ferrs() << " [TD] *** Reuse of indcall graph for " << Callees.size() + DEBUG(errs() << " [TD] *** Reuse of indcall graph for " << Callees.size() << " callees!\n"); IndCallGraph = IndCallRecI->second; } else { From evan.cheng at apple.com Tue Aug 4 14:36:49 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 4 Aug 2009 12:36:49 -0700 Subject: [llvm-commits] [llvm] r77989 - in /llvm/trunk: lib/CodeGen/LowerSubregs.cpp lib/CodeGen/MachineInstr.cpp test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll In-Reply-To: References: <200908032008.n73K8goN023448@zion.cs.uiuc.edu> <85AC6E8F-168F-441E-B591-59C3B543F6EE@apple.com> <87eirsrlf9.fsf@chora.dk> <5B3E9460-BBBB-4715-A7F6-EA2454C51A6C@apple.com> Message-ID: <05BD81A1-6059-4509-B50B-1A54DD4CB5D8@apple.com> On Aug 4, 2009, at 12:01 PM, Jakob Stoklund Olesen wrote: > > On 04/08/2009, at 19.31, Evan Cheng wrote: >> I am very hesitant to change the semantics. That will break a lot of >> assumptions in the register allocator. I think the current approach >> of >> having subreg lowering pass insert the right instructions to model >> "kill" is enough. Is it not? > > You are probably right. I am still struggling to completely understand > the semantics. > > We will almost certainly need to insert fake instructions that only > change flags. I am using IMPLICIT_DEF for that now, but it should > probably be replaced by a new ALTER_LIFE or something. I suggest KILL. It's easy to understand. > > [...] > >>>> Undef operands are "don't care". :-) It would have been cleaner to >>>> have an Undef machineoperand rather than a register machineoperand >>>> that's undef. But we still need to assign registers to them so the >>>> instructions can be translated to machine code. > > Ok, so if I understand you correctly, the actual register doesn't > really matter. It is only there so we produce valid machine code and > the only restriction is that the register class must be correct. And > of course there are two-address constraints. Yep. > > If that is correct, we could write an undef operand as %UNDEF. Like > this: > > %R0 = INSERT_SUBREG %UNDEF, %R0L, 1 Right. > > This makes sense to me. Note that in this case %R0 must be dead. Not > because it is referenced by an , but because it is not killed > before being defined. Yep. > > MachineInstr::addRegisterKilled() should not remove the flag. > It should completely skip the undef operand, just like the > regscavenger does. Ok. > > The flags and should not be allowed at the same time. > It is nonsensical. Yes, that would be nice because it makes the instructions easier to read. I thought about changing the machine instruction printer to just print instead of %r0. > > Am I on the right track? Very much so! Thanks for working on this. Evan > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From stoklund at 2pi.dk Tue Aug 4 15:01:54 2009 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Tue, 04 Aug 2009 20:01:54 -0000 Subject: [llvm-commits] [llvm] r78093 - in /llvm/trunk: lib/CodeGen/LowerSubregs.cpp test/CodeGen/Blackfin/2009-08-04-LowerExtract-Live.ll test/CodeGen/X86/stack-color-with-reg.ll Message-ID: <200908042002.n74K20iY018093@zion.cs.uiuc.edu> Author: stoklund Date: Tue Aug 4 15:01:11 2009 New Revision: 78093 URL: http://llvm.org/viewvc/llvm-project?rev=78093&view=rev Log: LowerSubregsInstructionPass::LowerExtract should not extend the live range of registers. When LowerExtract eliminates an EXTRACT_SUBREG with a kill flag, it moves the kill flag to the place where the sub-register is killed. This can accidentally overlap with the use of a sibling sub-register, and we have trouble. In the test case we have this code: Live Ins: %R0 %R1 %R2 %R2L = EXTRACT_SUBREG %R2, 1 %R2H = LOAD16fi , 0, Mem:LD(2,4) [FixedStack-1 + 0] %R1L = EXTRACT_SUBREG %R1, 1 %R0L = EXTRACT_SUBREG %R0, 1 %R0H = ADD16 %R2H, %R2L, %AZ, %AN, %AC0, %V, %VS subreg: CONVERTING: %R2L = EXTRACT_SUBREG %R2, 1 subreg: eliminated! subreg: killed here: %R0H = ADD16 %R2H, %R2L, %R2, %AZ, %AN, %AC0, %V, %VS The kill flag on %R2 is moved to the last instruction, and the live range overlaps with the definition of %R2H: *** Bad machine code: Redefining a live physical register *** - function: f - basic block: 0x18358c0 (#0) - instruction: %R2H = LOAD16fi , 0, Mem:LD(2,4) [FixedStack-1 + 0] Register R2H was defined but already live. The fix is to replace EXTRACT_SUBREG with IMPLICIT_DEF instead of eliminating it completely: subreg: CONVERTING: %R2L = EXTRACT_SUBREG %R2, 1 subreg: replace by: %R2L = IMPLICIT_DEF %R2 Note that these IMPLICIT_DEF instructions survive to the asm output. It is necessary to fix the stack-color-with-reg test case because of that. Added: llvm/trunk/test/CodeGen/Blackfin/2009-08-04-LowerExtract-Live.ll Modified: llvm/trunk/lib/CodeGen/LowerSubregs.cpp llvm/trunk/test/CodeGen/X86/stack-color-with-reg.ll Modified: llvm/trunk/lib/CodeGen/LowerSubregs.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LowerSubregs.cpp?rev=78093&r1=78092&r2=78093&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LowerSubregs.cpp (original) +++ llvm/trunk/lib/CodeGen/LowerSubregs.cpp Tue Aug 4 15:01:11 2009 @@ -103,7 +103,7 @@ MachineFunction &MF = *MBB->getParent(); const TargetRegisterInfo &TRI = *MF.getTarget().getRegisterInfo(); const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo(); - + assert(MI->getOperand(0).isReg() && MI->getOperand(0).isDef() && MI->getOperand(1).isReg() && MI->getOperand(1).isUse() && MI->getOperand(2).isImm() && "Malformed extract_subreg"); @@ -117,23 +117,20 @@ "Extract supperg source must be a physical register"); assert(TargetRegisterInfo::isPhysicalRegister(DstReg) && "Extract destination must be in a physical register"); - + DOUT << "subreg: CONVERTING: " << *MI; if (SrcReg == DstReg) { - // No need to insert an identify copy instruction. + // No need to insert an identity copy instruction. + if (MI->getOperand(1).isKill()) { + // We must make sure the super-register gets killed.Replace the + // instruction with IMPLICIT_DEF. + MI->setDesc(TII.get(TargetInstrInfo::IMPLICIT_DEF)); + MI->RemoveOperand(2); // SubIdx + DOUT << "subreg: replace by: " << *MI; + return true; + } DOUT << "subreg: eliminated!"; - // Find the kill of the destination register's live range, and insert - // a kill of the source register at that point. - if (MI->getOperand(1).isKill() && !MI->getOperand(0).isDead()) - for (MachineBasicBlock::iterator MII = - next(MachineBasicBlock::iterator(MI)); - MII != MBB->end(); ++MII) - if (MII->killsRegister(DstReg, &TRI)) { - MII->addRegisterKilled(SuperReg, &TRI, /*AddIfNotFound=*/true); - DOUT << "\nsubreg: killed here: " << *MII; - break; - } } else { // Insert copy const TargetRegisterClass *TRCS = TRI.getPhysicalRegisterRegClass(DstReg); Added: llvm/trunk/test/CodeGen/Blackfin/2009-08-04-LowerExtract-Live.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Blackfin/2009-08-04-LowerExtract-Live.ll?rev=78093&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Blackfin/2009-08-04-LowerExtract-Live.ll (added) +++ llvm/trunk/test/CodeGen/Blackfin/2009-08-04-LowerExtract-Live.ll Tue Aug 4 15:01:11 2009 @@ -0,0 +1,15 @@ +; RUN: llvm-as < %s | llc -march=bfin -join-liveintervals=0 -verify-machineinstrs + +; Provoke an error in LowerSubregsPass::LowerExtract where the live range of a +; super-register is illegally extended. + +define i16 @f(i16 %x1, i16 %x2, i16 %x3, i16 %x4) { + %y1 = add i16 %x1, 1 + %y2 = add i16 %x2, 2 + %y3 = add i16 %x3, 3 + %y4 = add i16 %x4, 4 + %z12 = add i16 %y1, %y2 + %z34 = add i16 %y3, %y4 + %p = add i16 %z12, %z34 + ret i16 %p +} Modified: llvm/trunk/test/CodeGen/X86/stack-color-with-reg.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/stack-color-with-reg.ll?rev=78093&r1=78092&r2=78093&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/stack-color-with-reg.ll (original) +++ llvm/trunk/test/CodeGen/X86/stack-color-with-reg.ll Tue Aug 4 15:01:11 2009 @@ -1,7 +1,7 @@ ; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin10 -relocation-model=pic -disable-fp-elim -color-ss-with-regs -stats -info-output-file - > %t ; RUN: grep stackcoloring %t | grep "loads eliminated" ; RUN: grep stackcoloring %t | grep "stack slot refs replaced with reg refs" | grep 5 -; RUN: grep asm-printer %t | grep 175 +; RUN: grep asm-printer %t | grep 180 type { [62 x %struct.Bitvec*] } ; type %0 type { i8* } ; type %1 From stoklund at 2pi.dk Tue Aug 4 15:09:37 2009 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Tue, 04 Aug 2009 20:09:37 -0000 Subject: [llvm-commits] [llvm] r78095 - /llvm/trunk/lib/CodeGen/MachineInstr.cpp Message-ID: <200908042009.n74K9hCH018333@zion.cs.uiuc.edu> Author: stoklund Date: Tue Aug 4 15:09:25 2009 New Revision: 78095 URL: http://llvm.org/viewvc/llvm-project?rev=78095&view=rev Log: Don't tamper with operands in MachineInstr::addRegisterKilled. For an undef operand, MO.getReg() is meaningless and we should not use it. Undef operands should be skipped entirely. Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=78095&r1=78094&r2=78095&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Tue Aug 4 15:09:25 2009 @@ -1030,7 +1030,7 @@ SmallVector DeadOps; for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { MachineOperand &MO = getOperand(i); - if (!MO.isReg() || !MO.isUse()) + if (!MO.isReg() || !MO.isUse() || MO.isUndef()) continue; unsigned Reg = MO.getReg(); if (!Reg) @@ -1041,8 +1041,6 @@ if (MO.isKill()) // The register is already marked kill. return true; - // This operand can no longer be undef since Reg is live-in. - MO.setIsUndef(false); if (isPhysReg && isRegTiedToDefOperand(i)) // Two-address uses of physregs must not be marked kill. return true; From sabre at nondot.org Tue Aug 4 15:09:45 2009 From: sabre at nondot.org (Chris Lattner) Date: Tue, 04 Aug 2009 20:09:45 -0000 Subject: [llvm-commits] [llvm] r78096 - in /llvm/trunk: include/llvm/Target/TargetAsmInfo.h lib/CodeGen/AsmPrinter/AsmPrinter.cpp lib/Target/TargetAsmInfo.cpp lib/Target/X86/X86TargetAsmInfo.cpp Message-ID: <200908042009.n74K9mpI018352@zion.cs.uiuc.edu> Author: lattner Date: Tue Aug 4 15:09:41 2009 New Revision: 78096 URL: http://llvm.org/viewvc/llvm-project?rev=78096&view=rev Log: rip out SectionEndDirectiveSuffix support, only uses by the masm backend. If anyone cares about masm in the future, we'll have semantic sections it can hang off of. Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp llvm/trunk/lib/Target/TargetAsmInfo.cpp llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetAsmInfo.h?rev=78096&r1=78095&r2=78096&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetAsmInfo.h (original) +++ llvm/trunk/include/llvm/Target/TargetAsmInfo.h Tue Aug 4 15:09:41 2009 @@ -198,10 +198,6 @@ /// directive for data sections. const char *DataSectionStartSuffix; // Defaults to "". - /// SectionEndDirectiveSuffix - If non-null, the asm printer will close each - /// section with the section name and this suffix printed. - const char *SectionEndDirectiveSuffix;// Defaults to null. - /// JumpTableDirective - if non-null, the directive to emit before a jump /// table. const char *JumpTableDirective; @@ -454,9 +450,6 @@ const char *getDataSectionStartSuffix() const { return DataSectionStartSuffix; } - const char *getSectionEndDirectiveSuffix() const { - return SectionEndDirectiveSuffix; - } const char *getGlobalDirective() const { return GlobalDirective; } Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp?rev=78096&r1=78095&r2=78096&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp (original) +++ llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp Tue Aug 4 15:09:41 2009 @@ -90,10 +90,6 @@ // If we're already in this section, we're done. if (CurrentSection == NS) return; - // Close the current section, if applicable. - if (NS != 0 && TAI->getSectionEndDirectiveSuffix()) - O << NS->getName() << TAI->getSectionEndDirectiveSuffix() << '\n'; - CurrentSection = NS; if (NS != 0) { Modified: llvm/trunk/lib/Target/TargetAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetAsmInfo.cpp?rev=78096&r1=78095&r2=78096&view=diff ============================================================================== --- llvm/trunk/lib/Target/TargetAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/TargetAsmInfo.cpp Tue Aug 4 15:09:41 2009 @@ -57,7 +57,6 @@ SwitchToSectionDirective = "\t.section\t"; TextSectionStartSuffix = ""; DataSectionStartSuffix = ""; - SectionEndDirectiveSuffix = 0; JumpTableDirective = 0; GlobalDirective = "\t.globl\t"; SetDirective = 0; Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=78096&r1=78095&r2=78096&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Tue Aug 4 15:09:41 2009 @@ -134,7 +134,6 @@ SwitchToSectionDirective = ""; TextSectionStartSuffix = "\tSEGMENT PARA 'CODE'"; DataSectionStartSuffix = "\tSEGMENT PARA 'DATA'"; - SectionEndDirectiveSuffix = "\tends\n"; } // Instantiate default implementation. From stoklund at 2pi.dk Tue Aug 4 15:15:39 2009 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Tue, 4 Aug 2009 22:15:39 +0200 Subject: [llvm-commits] [llvm] r77989 - in /llvm/trunk: lib/CodeGen/LowerSubregs.cpp lib/CodeGen/MachineInstr.cpp test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll In-Reply-To: <05BD81A1-6059-4509-B50B-1A54DD4CB5D8@apple.com> References: <200908032008.n73K8goN023448@zion.cs.uiuc.edu> <85AC6E8F-168F-441E-B591-59C3B543F6EE@apple.com> <87eirsrlf9.fsf@chora.dk> <5B3E9460-BBBB-4715-A7F6-EA2454C51A6C@apple.com> <05BD81A1-6059-4509-B50B-1A54DD4CB5D8@apple.com> Message-ID: On 04/08/2009, at 21.36, Evan Cheng wrote: >> We will almost certainly need to insert fake instructions that only >> change flags. I am using IMPLICIT_DEF for that now, but it should >> probably be replaced by a new ALTER_LIFE or something. > > I suggest KILL. It's easy to understand. ALTER_LIFE is silly, but the instruction can also make registers live: subreg: CONVERTING: %R2L = EXTRACT_SUBREG %R2, 1 subreg: replace by: %R2L = IMPLICIT_DEF %R2 subreg: CONVERTING: %R0 = INSERT_SUBREG %R0, %R0L, 1 subreg: replace by: %R0 = IMPLICIT_DEF %R0L [...] >> Am I on the right track? > > Very much so! Thanks for working on this. Woot! Finally. From resistor at mac.com Tue Aug 4 15:25:25 2009 From: resistor at mac.com (Owen Anderson) Date: Tue, 04 Aug 2009 20:25:25 -0000 Subject: [llvm-commits] [llvm] r78097 - in /llvm/trunk: include/llvm/LLVMContext.h lib/VMCore/Constants.cpp lib/VMCore/LLVMContextImpl.cpp lib/VMCore/LLVMContextImpl.h Message-ID: <200908042025.n74KPVti018779@zion.cs.uiuc.edu> Author: resistor Date: Tue Aug 4 15:25:11 2009 New Revision: 78097 URL: http://llvm.org/viewvc/llvm-project?rev=78097&view=rev Log: Privatize the last bit of Constant-creation state. Modified: llvm/trunk/include/llvm/LLVMContext.h llvm/trunk/lib/VMCore/Constants.cpp llvm/trunk/lib/VMCore/LLVMContextImpl.cpp llvm/trunk/lib/VMCore/LLVMContextImpl.h Modified: llvm/trunk/include/llvm/LLVMContext.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/LLVMContext.h?rev=78097&r1=78096&r2=78097&view=diff ============================================================================== --- llvm/trunk/include/llvm/LLVMContext.h (original) +++ llvm/trunk/include/llvm/LLVMContext.h Tue Aug 4 15:25:11 2009 @@ -52,21 +52,9 @@ /// infrastructure, including the type and constant uniquing tables. /// LLVMContext itself provides no locking guarantees, so you should be careful /// to have one context per thread. -class LLVMContext { +struct LLVMContext { LLVMContextImpl* pImpl; - friend class ConstantInt; - friend class ConstantFP; - friend class ConstantStruct; - friend class ConstantArray; - friend class ConstantVector; - friend class ConstantAggregateZero; - friend class MDNode; - friend class MDString; - friend class ConstantPointerNull; - friend class UndefValue; - friend class ConstantExpr; -public: LLVMContext(); ~LLVMContext(); }; Modified: llvm/trunk/lib/VMCore/Constants.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Constants.cpp?rev=78097&r1=78096&r2=78097&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Constants.cpp (original) +++ llvm/trunk/lib/VMCore/Constants.cpp Tue Aug 4 15:25:11 2009 @@ -603,290 +603,6 @@ return get(std::vector(Vals, Vals+NumVals)); } - -namespace llvm { -// We declare several classes private to this file, so use an anonymous -// namespace -namespace { - -/// UnaryConstantExpr - This class is private to Constants.cpp, and is used -/// behind the scenes to implement unary constant exprs. -class VISIBILITY_HIDDEN UnaryConstantExpr : public ConstantExpr { - void *operator new(size_t, unsigned); // DO NOT IMPLEMENT -public: - // allocate space for exactly one operand - void *operator new(size_t s) { - return User::operator new(s, 1); - } - UnaryConstantExpr(unsigned Opcode, Constant *C, const Type *Ty) - : ConstantExpr(Ty, Opcode, &Op<0>(), 1) { - Op<0>() = C; - } - /// Transparently provide more efficient getOperand methods. - DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); -}; - -/// BinaryConstantExpr - This class is private to Constants.cpp, and is used -/// behind the scenes to implement binary constant exprs. -class VISIBILITY_HIDDEN BinaryConstantExpr : public ConstantExpr { - void *operator new(size_t, unsigned); // DO NOT IMPLEMENT -public: - // allocate space for exactly two operands - void *operator new(size_t s) { - return User::operator new(s, 2); - } - BinaryConstantExpr(unsigned Opcode, Constant *C1, Constant *C2) - : ConstantExpr(C1->getType(), Opcode, &Op<0>(), 2) { - Op<0>() = C1; - Op<1>() = C2; - } - /// Transparently provide more efficient getOperand methods. - DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); -}; - -/// SelectConstantExpr - This class is private to Constants.cpp, and is used -/// behind the scenes to implement select constant exprs. -class VISIBILITY_HIDDEN SelectConstantExpr : public ConstantExpr { - void *operator new(size_t, unsigned); // DO NOT IMPLEMENT -public: - // allocate space for exactly three operands - void *operator new(size_t s) { - return User::operator new(s, 3); - } - SelectConstantExpr(Constant *C1, Constant *C2, Constant *C3) - : ConstantExpr(C2->getType(), Instruction::Select, &Op<0>(), 3) { - Op<0>() = C1; - Op<1>() = C2; - Op<2>() = C3; - } - /// Transparently provide more efficient getOperand methods. - DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); -}; - -/// ExtractElementConstantExpr - This class is private to -/// Constants.cpp, and is used behind the scenes to implement -/// extractelement constant exprs. -class VISIBILITY_HIDDEN ExtractElementConstantExpr : public ConstantExpr { - void *operator new(size_t, unsigned); // DO NOT IMPLEMENT -public: - // allocate space for exactly two operands - void *operator new(size_t s) { - return User::operator new(s, 2); - } - ExtractElementConstantExpr(Constant *C1, Constant *C2) - : ConstantExpr(cast(C1->getType())->getElementType(), - Instruction::ExtractElement, &Op<0>(), 2) { - Op<0>() = C1; - Op<1>() = C2; - } - /// Transparently provide more efficient getOperand methods. - DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); -}; - -/// InsertElementConstantExpr - This class is private to -/// Constants.cpp, and is used behind the scenes to implement -/// insertelement constant exprs. -class VISIBILITY_HIDDEN InsertElementConstantExpr : public ConstantExpr { - void *operator new(size_t, unsigned); // DO NOT IMPLEMENT -public: - // allocate space for exactly three operands - void *operator new(size_t s) { - return User::operator new(s, 3); - } - InsertElementConstantExpr(Constant *C1, Constant *C2, Constant *C3) - : ConstantExpr(C1->getType(), Instruction::InsertElement, - &Op<0>(), 3) { - Op<0>() = C1; - Op<1>() = C2; - Op<2>() = C3; - } - /// Transparently provide more efficient getOperand methods. - DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); -}; - -/// ShuffleVectorConstantExpr - This class is private to -/// Constants.cpp, and is used behind the scenes to implement -/// shufflevector constant exprs. -class VISIBILITY_HIDDEN ShuffleVectorConstantExpr : public ConstantExpr { - void *operator new(size_t, unsigned); // DO NOT IMPLEMENT -public: - // allocate space for exactly three operands - void *operator new(size_t s) { - return User::operator new(s, 3); - } - ShuffleVectorConstantExpr(Constant *C1, Constant *C2, Constant *C3) - : ConstantExpr(VectorType::get( - cast(C1->getType())->getElementType(), - cast(C3->getType())->getNumElements()), - Instruction::ShuffleVector, - &Op<0>(), 3) { - Op<0>() = C1; - Op<1>() = C2; - Op<2>() = C3; - } - /// Transparently provide more efficient getOperand methods. - DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); -}; - -/// ExtractValueConstantExpr - This class is private to -/// Constants.cpp, and is used behind the scenes to implement -/// extractvalue constant exprs. -class VISIBILITY_HIDDEN ExtractValueConstantExpr : public ConstantExpr { - void *operator new(size_t, unsigned); // DO NOT IMPLEMENT -public: - // allocate space for exactly one operand - void *operator new(size_t s) { - return User::operator new(s, 1); - } - ExtractValueConstantExpr(Constant *Agg, - const SmallVector &IdxList, - const Type *DestTy) - : ConstantExpr(DestTy, Instruction::ExtractValue, &Op<0>(), 1), - Indices(IdxList) { - Op<0>() = Agg; - } - - /// Indices - These identify which value to extract. - const SmallVector Indices; - - /// Transparently provide more efficient getOperand methods. - DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); -}; - -/// InsertValueConstantExpr - This class is private to -/// Constants.cpp, and is used behind the scenes to implement -/// insertvalue constant exprs. -class VISIBILITY_HIDDEN InsertValueConstantExpr : public ConstantExpr { - void *operator new(size_t, unsigned); // DO NOT IMPLEMENT -public: - // allocate space for exactly one operand - void *operator new(size_t s) { - return User::operator new(s, 2); - } - InsertValueConstantExpr(Constant *Agg, Constant *Val, - const SmallVector &IdxList, - const Type *DestTy) - : ConstantExpr(DestTy, Instruction::InsertValue, &Op<0>(), 2), - Indices(IdxList) { - Op<0>() = Agg; - Op<1>() = Val; - } - - /// Indices - These identify the position for the insertion. - const SmallVector Indices; - - /// Transparently provide more efficient getOperand methods. - DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); -}; - - -/// GetElementPtrConstantExpr - This class is private to Constants.cpp, and is -/// used behind the scenes to implement getelementpr constant exprs. -class VISIBILITY_HIDDEN GetElementPtrConstantExpr : public ConstantExpr { - GetElementPtrConstantExpr(Constant *C, const std::vector &IdxList, - const Type *DestTy); -public: - static GetElementPtrConstantExpr *Create(Constant *C, - const std::vector&IdxList, - const Type *DestTy) { - return - new(IdxList.size() + 1) GetElementPtrConstantExpr(C, IdxList, DestTy); - } - /// Transparently provide more efficient getOperand methods. - DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); -}; - -// CompareConstantExpr - This class is private to Constants.cpp, and is used -// behind the scenes to implement ICmp and FCmp constant expressions. This is -// needed in order to store the predicate value for these instructions. -struct VISIBILITY_HIDDEN CompareConstantExpr : public ConstantExpr { - void *operator new(size_t, unsigned); // DO NOT IMPLEMENT - // allocate space for exactly two operands - void *operator new(size_t s) { - return User::operator new(s, 2); - } - unsigned short predicate; - CompareConstantExpr(const Type *ty, Instruction::OtherOps opc, - unsigned short pred, Constant* LHS, Constant* RHS) - : ConstantExpr(ty, opc, &Op<0>(), 2), predicate(pred) { - Op<0>() = LHS; - Op<1>() = RHS; - } - /// Transparently provide more efficient getOperand methods. - DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); -}; - -} // end anonymous namespace - -template <> -struct OperandTraits : FixedNumOperandTraits<1> { -}; -DEFINE_TRANSPARENT_OPERAND_ACCESSORS(UnaryConstantExpr, Value) - -template <> -struct OperandTraits : FixedNumOperandTraits<2> { -}; -DEFINE_TRANSPARENT_OPERAND_ACCESSORS(BinaryConstantExpr, Value) - -template <> -struct OperandTraits : FixedNumOperandTraits<3> { -}; -DEFINE_TRANSPARENT_OPERAND_ACCESSORS(SelectConstantExpr, Value) - -template <> -struct OperandTraits : FixedNumOperandTraits<2> { -}; -DEFINE_TRANSPARENT_OPERAND_ACCESSORS(ExtractElementConstantExpr, Value) - -template <> -struct OperandTraits : FixedNumOperandTraits<3> { -}; -DEFINE_TRANSPARENT_OPERAND_ACCESSORS(InsertElementConstantExpr, Value) - -template <> -struct OperandTraits : FixedNumOperandTraits<3> { -}; -DEFINE_TRANSPARENT_OPERAND_ACCESSORS(ShuffleVectorConstantExpr, Value) - -template <> -struct OperandTraits : FixedNumOperandTraits<1> { -}; -DEFINE_TRANSPARENT_OPERAND_ACCESSORS(ExtractValueConstantExpr, Value) - -template <> -struct OperandTraits : FixedNumOperandTraits<2> { -}; -DEFINE_TRANSPARENT_OPERAND_ACCESSORS(InsertValueConstantExpr, Value) - -template <> -struct OperandTraits : VariadicOperandTraits<1> { -}; - -GetElementPtrConstantExpr::GetElementPtrConstantExpr - (Constant *C, - const std::vector &IdxList, - const Type *DestTy) - : ConstantExpr(DestTy, Instruction::GetElementPtr, - OperandTraits::op_end(this) - - (IdxList.size()+1), - IdxList.size()+1) { - OperandList[0] = C; - for (unsigned i = 0, E = IdxList.size(); i != E; ++i) - OperandList[i+1] = IdxList[i]; -} - -DEFINE_TRANSPARENT_OPERAND_ACCESSORS(GetElementPtrConstantExpr, Value) - - -template <> -struct OperandTraits : FixedNumOperandTraits<2> { -}; -DEFINE_TRANSPARENT_OPERAND_ACCESSORS(CompareConstantExpr, Value) - - -} // End llvm namespace - - // Utility function for determining if a ConstantExpr is a CastOp or not. This // can't be inline because we don't want to #include Instruction.h into // Constant.h @@ -1264,134 +980,6 @@ //---- ConstantExpr::get() implementations... // -namespace { - -struct ExprMapKeyType { - typedef SmallVector IndexList; - - ExprMapKeyType(unsigned opc, - const std::vector &ops, - unsigned short pred = 0, - const IndexList &inds = IndexList()) - : opcode(opc), predicate(pred), operands(ops), indices(inds) {} - uint16_t opcode; - uint16_t predicate; - std::vector operands; - IndexList indices; - bool operator==(const ExprMapKeyType& that) const { - return this->opcode == that.opcode && - this->predicate == that.predicate && - this->operands == that.operands && - this->indices == that.indices; - } - bool operator<(const ExprMapKeyType & that) const { - return this->opcode < that.opcode || - (this->opcode == that.opcode && this->predicate < that.predicate) || - (this->opcode == that.opcode && this->predicate == that.predicate && - this->operands < that.operands) || - (this->opcode == that.opcode && this->predicate == that.predicate && - this->operands == that.operands && this->indices < that.indices); - } - - bool operator!=(const ExprMapKeyType& that) const { - return !(*this == that); - } -}; - -} - -namespace llvm { - template<> - struct ConstantCreator { - static ConstantExpr *create(const Type *Ty, const ExprMapKeyType &V, - unsigned short pred = 0) { - if (Instruction::isCast(V.opcode)) - return new UnaryConstantExpr(V.opcode, V.operands[0], Ty); - if ((V.opcode >= Instruction::BinaryOpsBegin && - V.opcode < Instruction::BinaryOpsEnd)) - return new BinaryConstantExpr(V.opcode, V.operands[0], V.operands[1]); - if (V.opcode == Instruction::Select) - return new SelectConstantExpr(V.operands[0], V.operands[1], - V.operands[2]); - if (V.opcode == Instruction::ExtractElement) - return new ExtractElementConstantExpr(V.operands[0], V.operands[1]); - if (V.opcode == Instruction::InsertElement) - return new InsertElementConstantExpr(V.operands[0], V.operands[1], - V.operands[2]); - if (V.opcode == Instruction::ShuffleVector) - return new ShuffleVectorConstantExpr(V.operands[0], V.operands[1], - V.operands[2]); - if (V.opcode == Instruction::InsertValue) - return new InsertValueConstantExpr(V.operands[0], V.operands[1], - V.indices, Ty); - if (V.opcode == Instruction::ExtractValue) - return new ExtractValueConstantExpr(V.operands[0], V.indices, Ty); - if (V.opcode == Instruction::GetElementPtr) { - std::vector IdxList(V.operands.begin()+1, V.operands.end()); - return GetElementPtrConstantExpr::Create(V.operands[0], IdxList, Ty); - } - - // The compare instructions are weird. We have to encode the predicate - // value and it is combined with the instruction opcode by multiplying - // the opcode by one hundred. We must decode this to get the predicate. - if (V.opcode == Instruction::ICmp) - return new CompareConstantExpr(Ty, Instruction::ICmp, V.predicate, - V.operands[0], V.operands[1]); - if (V.opcode == Instruction::FCmp) - return new CompareConstantExpr(Ty, Instruction::FCmp, V.predicate, - V.operands[0], V.operands[1]); - llvm_unreachable("Invalid ConstantExpr!"); - return 0; - } - }; - - template<> - struct ConvertConstantType { - static void convert(ConstantExpr *OldC, const Type *NewTy) { - Constant *New; - switch (OldC->getOpcode()) { - case Instruction::Trunc: - case Instruction::ZExt: - case Instruction::SExt: - case Instruction::FPTrunc: - case Instruction::FPExt: - case Instruction::UIToFP: - case Instruction::SIToFP: - case Instruction::FPToUI: - case Instruction::FPToSI: - case Instruction::PtrToInt: - case Instruction::IntToPtr: - case Instruction::BitCast: - New = ConstantExpr::getCast(OldC->getOpcode(), OldC->getOperand(0), - NewTy); - break; - case Instruction::Select: - New = ConstantExpr::getSelectTy(NewTy, OldC->getOperand(0), - OldC->getOperand(1), - OldC->getOperand(2)); - break; - default: - assert(OldC->getOpcode() >= Instruction::BinaryOpsBegin && - OldC->getOpcode() < Instruction::BinaryOpsEnd); - New = ConstantExpr::getTy(NewTy, OldC->getOpcode(), OldC->getOperand(0), - OldC->getOperand(1)); - break; - case Instruction::GetElementPtr: - // Make everyone now use a constant of the new type... - std::vector Idx(OldC->op_begin()+1, OldC->op_end()); - New = ConstantExpr::getGetElementPtrTy(NewTy, OldC->getOperand(0), - &Idx[0], Idx.size()); - break; - } - - assert(New != OldC && "Didn't replace constant??"); - OldC->uncheckedReplaceAllUsesWith(New); - OldC->destroyConstant(); // This constant is now dead, destroy it. - } - }; -} // end namespace llvm - - static ExprMapKeyType getValType(ConstantExpr *CE) { std::vector Operands; Operands.reserve(CE->getNumOperands()); @@ -1403,9 +991,6 @@ CE->getIndices() : SmallVector()); } -static ManagedStatic > ExprConstants; - /// This is a utility function to handle folding of casts and lookup of the /// cast in the ExprConstants map. It is used by the various get* methods below. static inline Constant *getFoldedCast( @@ -1415,12 +1000,14 @@ if (Constant *FC = ConstantFoldCastInstruction(Ty->getContext(), opc, C, Ty)) return FC; + LLVMContextImpl *pImpl = Ty->getContext().pImpl; + // Look up the constant in the table first to ensure uniqueness std::vector argVec(1, C); ExprMapKeyType Key(opc, argVec); // Implicitly locked. - return ExprConstants->getOrCreate(Ty, Key); + return pImpl->ExprConstants.getOrCreate(Ty, Key); } Constant *ConstantExpr::getCast(unsigned oc, Constant *C, const Type *Ty) { @@ -1663,8 +1250,10 @@ std::vector argVec(1, C1); argVec.push_back(C2); ExprMapKeyType Key(Opcode, argVec); + LLVMContextImpl *pImpl = ReqTy->getContext().pImpl; + // Implicitly locked. - return ExprConstants->getOrCreate(ReqTy, Key); + return pImpl->ExprConstants.getOrCreate(ReqTy, Key); } Constant *ConstantExpr::getCompareTy(unsigned short predicate, @@ -1796,8 +1385,10 @@ argVec[2] = V2; ExprMapKeyType Key(Instruction::Select, argVec); + LLVMContextImpl *pImpl = ReqTy->getContext().pImpl; + // Implicitly locked. - return ExprConstants->getOrCreate(ReqTy, Key); + return pImpl->ExprConstants.getOrCreate(ReqTy, Key); } Constant *ConstantExpr::getGetElementPtrTy(const Type *ReqTy, Constant *C, @@ -1822,8 +1413,10 @@ ArgVec.push_back(cast(Idxs[i])); const ExprMapKeyType Key(Instruction::GetElementPtr, ArgVec); + LLVMContextImpl *pImpl = ReqTy->getContext().pImpl; + // Implicitly locked. - return ExprConstants->getOrCreate(ReqTy, Key); + return pImpl->ExprConstants.getOrCreate(ReqTy, Key); } Constant *ConstantExpr::getGetElementPtr(Constant *C, Value* const *Idxs, @@ -1859,8 +1452,10 @@ // Get the key type with both the opcode and predicate const ExprMapKeyType Key(Instruction::ICmp, ArgVec, pred); + LLVMContextImpl *pImpl = LHS->getType()->getContext().pImpl; + // Implicitly locked. - return ExprConstants->getOrCreate(Type::Int1Ty, Key); + return pImpl->ExprConstants.getOrCreate(Type::Int1Ty, Key); } Constant * @@ -1879,8 +1474,10 @@ // Get the key type with both the opcode and predicate const ExprMapKeyType Key(Instruction::FCmp, ArgVec, pred); + LLVMContextImpl *pImpl = LHS->getType()->getContext().pImpl; + // Implicitly locked. - return ExprConstants->getOrCreate(Type::Int1Ty, Key); + return pImpl->ExprConstants.getOrCreate(Type::Int1Ty, Key); } Constant *ConstantExpr::getExtractElementTy(const Type *ReqTy, Constant *Val, @@ -1893,8 +1490,10 @@ ArgVec.push_back(Idx); const ExprMapKeyType Key(Instruction::ExtractElement,ArgVec); + LLVMContextImpl *pImpl = ReqTy->getContext().pImpl; + // Implicitly locked. - return ExprConstants->getOrCreate(ReqTy, Key); + return pImpl->ExprConstants.getOrCreate(ReqTy, Key); } Constant *ConstantExpr::getExtractElement(Constant *Val, Constant *Idx) { @@ -1917,8 +1516,10 @@ ArgVec.push_back(Idx); const ExprMapKeyType Key(Instruction::InsertElement,ArgVec); + LLVMContextImpl *pImpl = ReqTy->getContext().pImpl; + // Implicitly locked. - return ExprConstants->getOrCreate(ReqTy, Key); + return pImpl->ExprConstants.getOrCreate(ReqTy, Key); } Constant *ConstantExpr::getInsertElement(Constant *Val, Constant *Elt, @@ -1943,8 +1544,10 @@ ArgVec.push_back(Mask); const ExprMapKeyType Key(Instruction::ShuffleVector,ArgVec); + LLVMContextImpl *pImpl = ReqTy->getContext().pImpl; + // Implicitly locked. - return ExprConstants->getOrCreate(ReqTy, Key); + return pImpl->ExprConstants.getOrCreate(ReqTy, Key); } Constant *ConstantExpr::getShuffleVector(Constant *V1, Constant *V2, @@ -2113,7 +1716,8 @@ // void ConstantExpr::destroyConstant() { // Implicitly locked. - ExprConstants->remove(this); + LLVMContextImpl *pImpl = getType()->getContext().pImpl; + pImpl->ExprConstants.remove(this); destroyConstantImpl(); } Modified: llvm/trunk/lib/VMCore/LLVMContextImpl.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/LLVMContextImpl.cpp?rev=78097&r1=78096&r2=78097&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/LLVMContextImpl.cpp (original) +++ llvm/trunk/lib/VMCore/LLVMContextImpl.cpp Tue Aug 4 15:25:11 2009 @@ -21,3 +21,16 @@ LLVMContextImpl::LLVMContextImpl(LLVMContext &C) : Context(C), TheTrueVal(0), TheFalseVal(0) { } + +GetElementPtrConstantExpr::GetElementPtrConstantExpr + (Constant *C, + const std::vector &IdxList, + const Type *DestTy) + : ConstantExpr(DestTy, Instruction::GetElementPtr, + OperandTraits::op_end(this) + - (IdxList.size()+1), + IdxList.size()+1) { + OperandList[0] = C; + for (unsigned i = 0, E = IdxList.size(); i != E; ++i) + OperandList[i+1] = IdxList[i]; +} \ No newline at end of file Modified: llvm/trunk/lib/VMCore/LLVMContextImpl.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/LLVMContextImpl.h?rev=78097&r1=78096&r2=78097&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/LLVMContextImpl.h (original) +++ llvm/trunk/lib/VMCore/LLVMContextImpl.h Tue Aug 4 15:25:11 2009 @@ -18,6 +18,8 @@ #include "llvm/LLVMContext.h" #include "llvm/Constants.h" #include "llvm/DerivedTypes.h" +#include "llvm/Instructions.h" +#include "llvm/Operator.h" #include "llvm/Support/Debug.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/System/Mutex.h" @@ -34,6 +36,297 @@ template struct ConstantTraits; + +/// UnaryConstantExpr - This class is private to Constants.cpp, and is used +/// behind the scenes to implement unary constant exprs. +class UnaryConstantExpr : public ConstantExpr { + void *operator new(size_t, unsigned); // DO NOT IMPLEMENT +public: + // allocate space for exactly one operand + void *operator new(size_t s) { + return User::operator new(s, 1); + } + UnaryConstantExpr(unsigned Opcode, Constant *C, const Type *Ty) + : ConstantExpr(Ty, Opcode, &Op<0>(), 1) { + Op<0>() = C; + } + DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); +}; + +/// BinaryConstantExpr - This class is private to Constants.cpp, and is used +/// behind the scenes to implement binary constant exprs. +class BinaryConstantExpr : public ConstantExpr { + void *operator new(size_t, unsigned); // DO NOT IMPLEMENT +public: + // allocate space for exactly two operands + void *operator new(size_t s) { + return User::operator new(s, 2); + } + BinaryConstantExpr(unsigned Opcode, Constant *C1, Constant *C2) + : ConstantExpr(C1->getType(), Opcode, &Op<0>(), 2) { + Op<0>() = C1; + Op<1>() = C2; + } + /// Transparently provide more efficient getOperand methods. + DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); +}; + +/// SelectConstantExpr - This class is private to Constants.cpp, and is used +/// behind the scenes to implement select constant exprs. +class SelectConstantExpr : public ConstantExpr { + void *operator new(size_t, unsigned); // DO NOT IMPLEMENT +public: + // allocate space for exactly three operands + void *operator new(size_t s) { + return User::operator new(s, 3); + } + SelectConstantExpr(Constant *C1, Constant *C2, Constant *C3) + : ConstantExpr(C2->getType(), Instruction::Select, &Op<0>(), 3) { + Op<0>() = C1; + Op<1>() = C2; + Op<2>() = C3; + } + /// Transparently provide more efficient getOperand methods. + DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); +}; + +/// ExtractElementConstantExpr - This class is private to +/// Constants.cpp, and is used behind the scenes to implement +/// extractelement constant exprs. +class ExtractElementConstantExpr : public ConstantExpr { + void *operator new(size_t, unsigned); // DO NOT IMPLEMENT +public: + // allocate space for exactly two operands + void *operator new(size_t s) { + return User::operator new(s, 2); + } + ExtractElementConstantExpr(Constant *C1, Constant *C2) + : ConstantExpr(cast(C1->getType())->getElementType(), + Instruction::ExtractElement, &Op<0>(), 2) { + Op<0>() = C1; + Op<1>() = C2; + } + /// Transparently provide more efficient getOperand methods. + DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); +}; + +/// InsertElementConstantExpr - This class is private to +/// Constants.cpp, and is used behind the scenes to implement +/// insertelement constant exprs. +class InsertElementConstantExpr : public ConstantExpr { + void *operator new(size_t, unsigned); // DO NOT IMPLEMENT +public: + // allocate space for exactly three operands + void *operator new(size_t s) { + return User::operator new(s, 3); + } + InsertElementConstantExpr(Constant *C1, Constant *C2, Constant *C3) + : ConstantExpr(C1->getType(), Instruction::InsertElement, + &Op<0>(), 3) { + Op<0>() = C1; + Op<1>() = C2; + Op<2>() = C3; + } + /// Transparently provide more efficient getOperand methods. + DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); +}; + +/// ShuffleVectorConstantExpr - This class is private to +/// Constants.cpp, and is used behind the scenes to implement +/// shufflevector constant exprs. +class ShuffleVectorConstantExpr : public ConstantExpr { + void *operator new(size_t, unsigned); // DO NOT IMPLEMENT +public: + // allocate space for exactly three operands + void *operator new(size_t s) { + return User::operator new(s, 3); + } + ShuffleVectorConstantExpr(Constant *C1, Constant *C2, Constant *C3) + : ConstantExpr(VectorType::get( + cast(C1->getType())->getElementType(), + cast(C3->getType())->getNumElements()), + Instruction::ShuffleVector, + &Op<0>(), 3) { + Op<0>() = C1; + Op<1>() = C2; + Op<2>() = C3; + } + /// Transparently provide more efficient getOperand methods. + DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); +}; + +/// ExtractValueConstantExpr - This class is private to +/// Constants.cpp, and is used behind the scenes to implement +/// extractvalue constant exprs. +class ExtractValueConstantExpr : public ConstantExpr { + void *operator new(size_t, unsigned); // DO NOT IMPLEMENT +public: + // allocate space for exactly one operand + void *operator new(size_t s) { + return User::operator new(s, 1); + } + ExtractValueConstantExpr(Constant *Agg, + const SmallVector &IdxList, + const Type *DestTy) + : ConstantExpr(DestTy, Instruction::ExtractValue, &Op<0>(), 1), + Indices(IdxList) { + Op<0>() = Agg; + } + + /// Indices - These identify which value to extract. + const SmallVector Indices; + + /// Transparently provide more efficient getOperand methods. + DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); +}; + +/// InsertValueConstantExpr - This class is private to +/// Constants.cpp, and is used behind the scenes to implement +/// insertvalue constant exprs. +class InsertValueConstantExpr : public ConstantExpr { + void *operator new(size_t, unsigned); // DO NOT IMPLEMENT +public: + // allocate space for exactly one operand + void *operator new(size_t s) { + return User::operator new(s, 2); + } + InsertValueConstantExpr(Constant *Agg, Constant *Val, + const SmallVector &IdxList, + const Type *DestTy) + : ConstantExpr(DestTy, Instruction::InsertValue, &Op<0>(), 2), + Indices(IdxList) { + Op<0>() = Agg; + Op<1>() = Val; + } + + /// Indices - These identify the position for the insertion. + const SmallVector Indices; + + /// Transparently provide more efficient getOperand methods. + DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); +}; + + +/// GetElementPtrConstantExpr - This class is private to Constants.cpp, and is +/// used behind the scenes to implement getelementpr constant exprs. +class GetElementPtrConstantExpr : public ConstantExpr { + GetElementPtrConstantExpr(Constant *C, const std::vector &IdxList, + const Type *DestTy); +public: + static GetElementPtrConstantExpr *Create(Constant *C, + const std::vector&IdxList, + const Type *DestTy) { + return + new(IdxList.size() + 1) GetElementPtrConstantExpr(C, IdxList, DestTy); + } + /// Transparently provide more efficient getOperand methods. + DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); +}; + +// CompareConstantExpr - This class is private to Constants.cpp, and is used +// behind the scenes to implement ICmp and FCmp constant expressions. This is +// needed in order to store the predicate value for these instructions. +struct CompareConstantExpr : public ConstantExpr { + void *operator new(size_t, unsigned); // DO NOT IMPLEMENT + // allocate space for exactly two operands + void *operator new(size_t s) { + return User::operator new(s, 2); + } + unsigned short predicate; + CompareConstantExpr(const Type *ty, Instruction::OtherOps opc, + unsigned short pred, Constant* LHS, Constant* RHS) + : ConstantExpr(ty, opc, &Op<0>(), 2), predicate(pred) { + Op<0>() = LHS; + Op<1>() = RHS; + } + /// Transparently provide more efficient getOperand methods. + DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); +}; + +template <> +struct OperandTraits : FixedNumOperandTraits<1> { +}; +DEFINE_TRANSPARENT_OPERAND_ACCESSORS(UnaryConstantExpr, Value) + +template <> +struct OperandTraits : FixedNumOperandTraits<2> { +}; +DEFINE_TRANSPARENT_OPERAND_ACCESSORS(BinaryConstantExpr, Value) + +template <> +struct OperandTraits : FixedNumOperandTraits<3> { +}; +DEFINE_TRANSPARENT_OPERAND_ACCESSORS(SelectConstantExpr, Value) + +template <> +struct OperandTraits : FixedNumOperandTraits<2> { +}; +DEFINE_TRANSPARENT_OPERAND_ACCESSORS(ExtractElementConstantExpr, Value) + +template <> +struct OperandTraits : FixedNumOperandTraits<3> { +}; +DEFINE_TRANSPARENT_OPERAND_ACCESSORS(InsertElementConstantExpr, Value) + +template <> +struct OperandTraits : FixedNumOperandTraits<3> { +}; +DEFINE_TRANSPARENT_OPERAND_ACCESSORS(ShuffleVectorConstantExpr, Value) + +template <> +struct OperandTraits : FixedNumOperandTraits<1> { +}; +DEFINE_TRANSPARENT_OPERAND_ACCESSORS(ExtractValueConstantExpr, Value) + +template <> +struct OperandTraits : FixedNumOperandTraits<2> { +}; +DEFINE_TRANSPARENT_OPERAND_ACCESSORS(InsertValueConstantExpr, Value) + +template <> +struct OperandTraits : VariadicOperandTraits<1> { +}; + +DEFINE_TRANSPARENT_OPERAND_ACCESSORS(GetElementPtrConstantExpr, Value) + + +template <> +struct OperandTraits : FixedNumOperandTraits<2> { +}; +DEFINE_TRANSPARENT_OPERAND_ACCESSORS(CompareConstantExpr, Value) + +struct ExprMapKeyType { + typedef SmallVector IndexList; + + ExprMapKeyType(unsigned opc, + const std::vector &ops, + unsigned short pred = 0, + const IndexList &inds = IndexList()) + : opcode(opc), predicate(pred), operands(ops), indices(inds) {} + uint16_t opcode; + uint16_t predicate; + std::vector operands; + IndexList indices; + bool operator==(const ExprMapKeyType& that) const { + return this->opcode == that.opcode && + this->predicate == that.predicate && + this->operands == that.operands && + this->indices == that.indices; + } + bool operator<(const ExprMapKeyType & that) const { + return this->opcode < that.opcode || + (this->opcode == that.opcode && this->predicate < that.predicate) || + (this->opcode == that.opcode && this->predicate == that.predicate && + this->operands < that.operands) || + (this->opcode == that.opcode && this->predicate == that.predicate && + this->operands == that.operands && this->indices < that.indices); + } + + bool operator!=(const ExprMapKeyType& that) const { + return !(*this == that); + } +}; + // The number of operands for each ConstantCreator::create method is // determined by the ConstantTraits template. // ConstantCreator - A class that is used to create constants by @@ -42,26 +335,115 @@ // constant. // template -struct VISIBILITY_HIDDEN ConstantTraits< std::vector > { +struct ConstantTraits< std::vector > { static unsigned uses(const std::vector& v) { return v.size(); } }; template -struct VISIBILITY_HIDDEN ConstantCreator { +struct ConstantCreator { static ConstantClass *create(const TypeClass *Ty, const ValType &V) { return new(ConstantTraits::uses(V)) ConstantClass(Ty, V); } }; template -struct VISIBILITY_HIDDEN ConvertConstantType { +struct ConvertConstantType { static void convert(ConstantClass *OldC, const TypeClass *NewTy) { llvm_unreachable("This type cannot be converted!"); } }; +template<> +struct ConstantCreator { + static ConstantExpr *create(const Type *Ty, const ExprMapKeyType &V, + unsigned short pred = 0) { + if (Instruction::isCast(V.opcode)) + return new UnaryConstantExpr(V.opcode, V.operands[0], Ty); + if ((V.opcode >= Instruction::BinaryOpsBegin && + V.opcode < Instruction::BinaryOpsEnd)) + return new BinaryConstantExpr(V.opcode, V.operands[0], V.operands[1]); + if (V.opcode == Instruction::Select) + return new SelectConstantExpr(V.operands[0], V.operands[1], + V.operands[2]); + if (V.opcode == Instruction::ExtractElement) + return new ExtractElementConstantExpr(V.operands[0], V.operands[1]); + if (V.opcode == Instruction::InsertElement) + return new InsertElementConstantExpr(V.operands[0], V.operands[1], + V.operands[2]); + if (V.opcode == Instruction::ShuffleVector) + return new ShuffleVectorConstantExpr(V.operands[0], V.operands[1], + V.operands[2]); + if (V.opcode == Instruction::InsertValue) + return new InsertValueConstantExpr(V.operands[0], V.operands[1], + V.indices, Ty); + if (V.opcode == Instruction::ExtractValue) + return new ExtractValueConstantExpr(V.operands[0], V.indices, Ty); + if (V.opcode == Instruction::GetElementPtr) { + std::vector IdxList(V.operands.begin()+1, V.operands.end()); + return GetElementPtrConstantExpr::Create(V.operands[0], IdxList, Ty); + } + + // The compare instructions are weird. We have to encode the predicate + // value and it is combined with the instruction opcode by multiplying + // the opcode by one hundred. We must decode this to get the predicate. + if (V.opcode == Instruction::ICmp) + return new CompareConstantExpr(Ty, Instruction::ICmp, V.predicate, + V.operands[0], V.operands[1]); + if (V.opcode == Instruction::FCmp) + return new CompareConstantExpr(Ty, Instruction::FCmp, V.predicate, + V.operands[0], V.operands[1]); + llvm_unreachable("Invalid ConstantExpr!"); + return 0; + } +}; + +template<> +struct ConvertConstantType { + static void convert(ConstantExpr *OldC, const Type *NewTy) { + Constant *New; + switch (OldC->getOpcode()) { + case Instruction::Trunc: + case Instruction::ZExt: + case Instruction::SExt: + case Instruction::FPTrunc: + case Instruction::FPExt: + case Instruction::UIToFP: + case Instruction::SIToFP: + case Instruction::FPToUI: + case Instruction::FPToSI: + case Instruction::PtrToInt: + case Instruction::IntToPtr: + case Instruction::BitCast: + New = ConstantExpr::getCast(OldC->getOpcode(), OldC->getOperand(0), + NewTy); + break; + case Instruction::Select: + New = ConstantExpr::getSelectTy(NewTy, OldC->getOperand(0), + OldC->getOperand(1), + OldC->getOperand(2)); + break; + default: + assert(OldC->getOpcode() >= Instruction::BinaryOpsBegin && + OldC->getOpcode() < Instruction::BinaryOpsEnd); + New = ConstantExpr::getTy(NewTy, OldC->getOpcode(), OldC->getOperand(0), + OldC->getOperand(1)); + break; + case Instruction::GetElementPtr: + // Make everyone now use a constant of the new type... + std::vector Idx(OldC->op_begin()+1, OldC->op_end()); + New = ConstantExpr::getGetElementPtrTy(NewTy, OldC->getOperand(0), + &Idx[0], Idx.size()); + break; + } + + assert(New != OldC && "Didn't replace constant??"); + OldC->uncheckedReplaceAllUsesWith(New); + OldC->destroyConstant(); // This constant is now dead, destroy it. + } +}; + // ConstantAggregateZero does not take extra "value" argument... template struct ConstantCreator { @@ -458,7 +840,7 @@ static bool isPod() { return false; } }; -class LLVMContextImpl { +struct LLVMContextImpl { sys::SmartRWMutex ConstantsLock; typedef DenseMap UndefValueConstants; + ValueMap ExprConstants; + LLVMContext &Context; ConstantInt *TheTrueVal; ConstantInt *TheFalseVal; + LLVMContextImpl(LLVMContext &C); +private: LLVMContextImpl(); LLVMContextImpl(const LLVMContextImpl&); - - friend class ConstantInt; - friend class ConstantFP; - friend class ConstantStruct; - friend class ConstantArray; - friend class ConstantVector; - friend class ConstantAggregateZero; - friend class MDNode; - friend class MDString; - friend class ConstantPointerNull; - friend class UndefValue; -public: - LLVMContextImpl(LLVMContext &C); }; } From dag at cray.com Tue Aug 4 16:55:22 2009 From: dag at cray.com (David Greene) Date: Tue, 4 Aug 2009 16:55:22 -0500 Subject: [llvm-commits] [PATCH] Dump with LI Indices In-Reply-To: References: <200907301710.32176.dag@cray.com> <200908040846.35455.dag@cray.com> Message-ID: <200908041655.22914.dag@cray.com> On Tuesday 04 August 2009 12:44, Chris Lattner wrote: > On Aug 4, 2009, at 6:46 AM, David Greene wrote: > > On Tuesday 04 August 2009 01:08, Evan Cheng wrote: > >> I am really not crazy about it especially since it has such a generic > >> name Dump.h. But it's not a big deal. > > > > I'm open to a better naming. I'm not particulrly fond of Dump.h > > either. > > I still don't understand why you need a general "prefix printer" > mechanism, instead of just doing a simple helper function in the > liveintervals code. How would you do a helper function? Remember, dumps happen lots of places before and after LiveIntervals has run. Are you suggesting that the MachineFunction and MachineBasicBlock dump routines call directly into LiveIntervals? If so, then we'll need a flag to tell the dump routines to *not* do that. That seems less clean to me. -Dave From deeppatel1987 at gmail.com Tue Aug 4 17:20:14 2009 From: deeppatel1987 at gmail.com (Sandeep Patel) Date: Tue, 4 Aug 2009 22:20:14 +0000 Subject: [llvm-commits] [llvm] r78081 - in /llvm/trunk: lib/Target/ARM/ARM.td lib/Target/ARM/ARMInstrFormats.td lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/ARMInstrNEON.td lib/Target/ARM/ARMInstrVFP.td lib/Target/ARM/ARMSubtarget.cpp lib/Target/ARM/ARMS Message-ID: <305d6f60908041520t3346d13cgc238229dcc82741a@mail.gmail.com> Have you done any benchmarking that suggests that this is a win? The docs we have for the Cortex-A9 suggest that NEON operations have longer latency than VFP ops. (I don't have the A8 docs to compare with.) deep On Tue, Aug 4, 2009 at 5:53 PM, David Goodwin wrote: > Author: david_goodwin > Date: Tue Aug ?4 12:53:06 2009 > New Revision: 78081 > > URL: http://llvm.org/viewvc/llvm-project?rev=78081&view=rev > Log: > Initial support for single-precision FP using NEON. Added "neonfp" attribute to enable. Added patterns for some binary FP operations. From gohman at apple.com Tue Aug 4 17:29:58 2009 From: gohman at apple.com (Dan Gohman) Date: Tue, 4 Aug 2009 15:29:58 -0700 Subject: [llvm-commits] [llvm] r78048 - in /llvm/trunk: include/llvm/Value.h include/llvm/ValueSymbolTable.h lib/Bitcode/Writer/BitcodeWriter.cpp lib/VMCore/Value.cpp In-Reply-To: <200908040431.n744V3h9008282@zion.cs.uiuc.edu> References: <200908040431.n744V3h9008282@zion.cs.uiuc.edu> Message-ID: <93C933D6-2A1E-43B3-A26F-7B5A2395F286@apple.com> On Aug 3, 2009, at 9:31 PM, Chris Lattner wrote: > Author: lattner > Date: Mon Aug 3 23:31:02 2009 > New Revision: 78048 > > URL: http://llvm.org/viewvc/llvm-project?rev=78048&view=rev > Log: > switch ValueMap to using AssertingVH. This is an old patch I had > laying > around in a tree I forgot about. Hi Chris, This has the property of causing LLVM's public ABI to be non-trivially sensitive to NDEBUG. If clients aren't built with NDEBUG set to what it's set to in the LLVM build they're linking with, the results are very bad and very hard to diagnose. I think this is too heavy a burden to put on clients. Dan From resistor at mac.com Tue Aug 4 17:41:51 2009 From: resistor at mac.com (Owen Anderson) Date: Tue, 04 Aug 2009 22:41:51 -0000 Subject: [llvm-commits] [llvm] r78115 - in /llvm/trunk: include/llvm/ include/llvm/Analysis/ include/llvm/Assembly/ include/llvm/Bitcode/ include/llvm/CodeGen/ include/llvm/Debugger/ include/llvm/Support/ include/llvm/Transforms/Utils/ lib/Archive/ lib/AsmParser/ lib/Bitcode/Reader/ lib/VMCore/ tools/bugpoint/ tools/llvm-db/ Message-ID: <200908042241.n74MfuJc023650@zion.cs.uiuc.edu> Author: resistor Date: Tue Aug 4 17:41:48 2009 New Revision: 78115 URL: http://llvm.org/viewvc/llvm-project?rev=78115&view=rev Log: Factor some of the constants+context related code out into a separate header, to make LLVMContextImpl.h not hideous. Also, fix some MSVC compile errors. Removed: llvm/trunk/lib/VMCore/LLVMContextImpl.cpp Modified: llvm/trunk/include/llvm/Analysis/ConstantFolding.h llvm/trunk/include/llvm/Analysis/DebugInfo.h llvm/trunk/include/llvm/Analysis/ScalarEvolution.h llvm/trunk/include/llvm/Analysis/SparsePropagation.h llvm/trunk/include/llvm/Analysis/ValueTracking.h llvm/trunk/include/llvm/Assembly/Parser.h llvm/trunk/include/llvm/BasicBlock.h llvm/trunk/include/llvm/Bitcode/Archive.h llvm/trunk/include/llvm/Bitcode/ReaderWriter.h llvm/trunk/include/llvm/CodeGen/ValueTypes.h llvm/trunk/include/llvm/Constant.h llvm/trunk/include/llvm/Constants.h llvm/trunk/include/llvm/Debugger/Debugger.h llvm/trunk/include/llvm/Function.h llvm/trunk/include/llvm/GlobalVariable.h llvm/trunk/include/llvm/InstrTypes.h llvm/trunk/include/llvm/Instruction.h llvm/trunk/include/llvm/Instructions.h llvm/trunk/include/llvm/Intrinsics.h llvm/trunk/include/llvm/LLVMContext.h llvm/trunk/include/llvm/Linker.h llvm/trunk/include/llvm/Metadata.h llvm/trunk/include/llvm/Module.h llvm/trunk/include/llvm/Support/TargetFolder.h llvm/trunk/include/llvm/Transforms/Utils/Cloning.h llvm/trunk/include/llvm/Transforms/Utils/Local.h llvm/trunk/include/llvm/Transforms/Utils/PromoteMemToReg.h llvm/trunk/include/llvm/Transforms/Utils/ValueMapper.h llvm/trunk/include/llvm/Value.h llvm/trunk/lib/Archive/ArchiveInternals.h llvm/trunk/lib/AsmParser/LLLexer.h llvm/trunk/lib/Bitcode/Reader/BitcodeReader.h llvm/trunk/lib/VMCore/ConstantFold.h llvm/trunk/lib/VMCore/LLVMContext.cpp llvm/trunk/lib/VMCore/LLVMContextImpl.h llvm/trunk/tools/bugpoint/BugDriver.h llvm/trunk/tools/llvm-db/CLIDebugger.h Modified: llvm/trunk/include/llvm/Analysis/ConstantFolding.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ConstantFolding.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/ConstantFolding.h (original) +++ llvm/trunk/include/llvm/Analysis/ConstantFolding.h Tue Aug 4 17:41:48 2009 @@ -22,7 +22,7 @@ class TargetData; class Function; class Type; - class LLVMContext; + struct LLVMContext; /// ConstantFoldInstruction - Attempt to constant fold the specified /// instruction. If successful, the constant result is returned, if not, null Modified: llvm/trunk/include/llvm/Analysis/DebugInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/DebugInfo.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/DebugInfo.h (original) +++ llvm/trunk/include/llvm/Analysis/DebugInfo.h Tue Aug 4 17:41:48 2009 @@ -40,7 +40,7 @@ class DebugLoc; struct DebugLocTracker; class Instruction; - class LLVMContext; + struct LLVMContext; class DIDescriptor { protected: Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolution.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ScalarEvolution.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/ScalarEvolution.h (original) +++ llvm/trunk/include/llvm/Analysis/ScalarEvolution.h Tue Aug 4 17:41:48 2009 @@ -40,7 +40,7 @@ class Type; class ScalarEvolution; class TargetData; - class LLVMContext; + struct LLVMContext; class Loop; class LoopInfo; class Operator; Modified: llvm/trunk/include/llvm/Analysis/SparsePropagation.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/SparsePropagation.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/SparsePropagation.h (original) +++ llvm/trunk/include/llvm/Analysis/SparsePropagation.h Tue Aug 4 17:41:48 2009 @@ -31,7 +31,7 @@ class BasicBlock; class Function; class SparseSolver; - class LLVMContext; + struct LLVMContext; template class SmallVectorImpl; Modified: llvm/trunk/include/llvm/Analysis/ValueTracking.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ValueTracking.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/ValueTracking.h (original) +++ llvm/trunk/include/llvm/Analysis/ValueTracking.h Tue Aug 4 17:41:48 2009 @@ -23,7 +23,7 @@ class Instruction; class APInt; class TargetData; - class LLVMContext; + struct LLVMContext; /// ComputeMaskedBits - Determine which of the bits specified in Mask are /// known to be either zero or one and return them in the KnownZero/KnownOne Modified: llvm/trunk/include/llvm/Assembly/Parser.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Assembly/Parser.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/include/llvm/Assembly/Parser.h (original) +++ llvm/trunk/include/llvm/Assembly/Parser.h Tue Aug 4 17:41:48 2009 @@ -21,7 +21,7 @@ class Module; class SMDiagnostic; class raw_ostream; -class LLVMContext; +struct LLVMContext; /// This function is the main interface to the LLVM Assembly Parser. It parses /// an ASCII file that (presumably) contains LLVM Assembly code. It returns a Modified: llvm/trunk/include/llvm/BasicBlock.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/BasicBlock.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/include/llvm/BasicBlock.h (original) +++ llvm/trunk/include/llvm/BasicBlock.h Tue Aug 4 17:41:48 2009 @@ -22,7 +22,7 @@ namespace llvm { class TerminatorInst; -class LLVMContext; +struct LLVMContext; template<> struct ilist_traits : public SymbolTableListTraits { Modified: llvm/trunk/include/llvm/Bitcode/Archive.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Bitcode/Archive.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/include/llvm/Bitcode/Archive.h (original) +++ llvm/trunk/include/llvm/Bitcode/Archive.h Tue Aug 4 17:41:48 2009 @@ -32,7 +32,7 @@ class Module; // From VMCore class Archive; // Declared below class ArchiveMemberHeader; // Internal implementation class -class LLVMContext; // Global data +struct LLVMContext; // Global data /// This class is the main class manipulated by users of the Archive class. It /// holds information about one member of the Archive. It is also the element Modified: llvm/trunk/include/llvm/Bitcode/ReaderWriter.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Bitcode/ReaderWriter.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/include/llvm/Bitcode/ReaderWriter.h (original) +++ llvm/trunk/include/llvm/Bitcode/ReaderWriter.h Tue Aug 4 17:41:48 2009 @@ -23,7 +23,7 @@ class MemoryBuffer; class ModulePass; class BitstreamWriter; - class LLVMContext; + struct LLVMContext; class raw_ostream; /// getBitcodeModuleProvider - Read the header of the specified bitcode buffer Modified: llvm/trunk/include/llvm/CodeGen/ValueTypes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ValueTypes.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/ValueTypes.h (original) +++ llvm/trunk/include/llvm/CodeGen/ValueTypes.h Tue Aug 4 17:41:48 2009 @@ -23,7 +23,7 @@ namespace llvm { class Type; - class LLVMContext; + struct LLVMContext; struct MVT { // MVT = Machine Value Type public: Modified: llvm/trunk/include/llvm/Constant.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Constant.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/include/llvm/Constant.h (original) +++ llvm/trunk/include/llvm/Constant.h Tue Aug 4 17:41:48 2009 @@ -20,7 +20,7 @@ class APInt; template class SmallVectorImpl; - class LLVMContext; + struct LLVMContext; /// This is an important base class in LLVM. It provides the common facilities /// of all constant values in an LLVM program. A constant is a value that is Modified: llvm/trunk/include/llvm/Constants.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Constants.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/include/llvm/Constants.h (original) +++ llvm/trunk/include/llvm/Constants.h Tue Aug 4 17:41:48 2009 @@ -231,7 +231,7 @@ APFloat Val; void *operator new(size_t, unsigned);// DO NOT IMPLEMENT ConstantFP(const ConstantFP &); // DO NOT IMPLEMENT - friend class LLVMContextImpl; + friend struct LLVMContextImpl; protected: ConstantFP(const Type *Ty, const APFloat& V); protected: Modified: llvm/trunk/include/llvm/Debugger/Debugger.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Debugger/Debugger.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/include/llvm/Debugger/Debugger.h (original) +++ llvm/trunk/include/llvm/Debugger/Debugger.h Tue Aug 4 17:41:48 2009 @@ -20,7 +20,7 @@ namespace llvm { class Module; class InferiorProcess; - class LLVMContext; + struct LLVMContext; /// Debugger class - This class implements the LLVM source-level debugger. /// This allows clients to handle the user IO processing without having to Modified: llvm/trunk/include/llvm/Function.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Function.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/include/llvm/Function.h (original) +++ llvm/trunk/include/llvm/Function.h Tue Aug 4 17:41:48 2009 @@ -26,7 +26,7 @@ namespace llvm { class FunctionType; -class LLVMContext; +struct LLVMContext; // Traits for intrusive list of basic blocks... template<> struct ilist_traits Modified: llvm/trunk/include/llvm/GlobalVariable.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/GlobalVariable.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/include/llvm/GlobalVariable.h (original) +++ llvm/trunk/include/llvm/GlobalVariable.h Tue Aug 4 17:41:48 2009 @@ -28,7 +28,7 @@ class Module; class Constant; -class LLVMContext; +struct LLVMContext; template class SymbolTableListTraits; Modified: llvm/trunk/include/llvm/InstrTypes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/InstrTypes.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/include/llvm/InstrTypes.h (original) +++ llvm/trunk/include/llvm/InstrTypes.h Tue Aug 4 17:41:48 2009 @@ -22,7 +22,7 @@ namespace llvm { -class LLVMContext; +struct LLVMContext; //===----------------------------------------------------------------------===// // TerminatorInst Class Modified: llvm/trunk/include/llvm/Instruction.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Instruction.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/include/llvm/Instruction.h (original) +++ llvm/trunk/include/llvm/Instruction.h Tue Aug 4 17:41:48 2009 @@ -20,7 +20,7 @@ namespace llvm { -class LLVMContext; +struct LLVMContext; template class SymbolTableListTraits; Modified: llvm/trunk/include/llvm/Instructions.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Instructions.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/include/llvm/Instructions.h (original) +++ llvm/trunk/include/llvm/Instructions.h Tue Aug 4 17:41:48 2009 @@ -29,7 +29,7 @@ class ConstantInt; class ConstantRange; class APInt; -class LLVMContext; +struct LLVMContext; //===----------------------------------------------------------------------===// // AllocationInst Class Modified: llvm/trunk/include/llvm/Intrinsics.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Intrinsics.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/include/llvm/Intrinsics.h (original) +++ llvm/trunk/include/llvm/Intrinsics.h Tue Aug 4 17:41:48 2009 @@ -23,7 +23,7 @@ class Type; class FunctionType; class Function; -class LLVMContext; +struct LLVMContext; class Module; class AttrListPtr; Modified: llvm/trunk/include/llvm/LLVMContext.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/LLVMContext.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/include/llvm/LLVMContext.h (original) +++ llvm/trunk/include/llvm/LLVMContext.h Tue Aug 4 17:41:48 2009 @@ -34,7 +34,7 @@ class ConstantVector; class FunctionType; class IntegerType; -class LLVMContextImpl; +struct LLVMContextImpl; class MDNode; class MDString; class OpaqueType; Modified: llvm/trunk/include/llvm/Linker.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Linker.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/include/llvm/Linker.h (original) +++ llvm/trunk/include/llvm/Linker.h Tue Aug 4 17:41:48 2009 @@ -21,7 +21,7 @@ namespace llvm { class Module; -class LLVMContext; +struct LLVMContext; /// This class provides the core functionality of linking in LLVM. It retains a /// Module object which is the composite of the modules and libraries linked Modified: llvm/trunk/include/llvm/Metadata.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Metadata.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/include/llvm/Metadata.h (original) +++ llvm/trunk/include/llvm/Metadata.h Tue Aug 4 17:41:48 2009 @@ -27,7 +27,7 @@ namespace llvm { class Constant; -class LLVMContext; +struct LLVMContext; //===----------------------------------------------------------------------===// // MetadataBase - A base class for MDNode, MDString and NamedMDNode. @@ -206,7 +206,7 @@ class NamedMDNode : public MetadataBase, public ilist_node { friend class SymbolTableListTraits; - friend class LLVMContextImpl; + friend struct LLVMContextImpl; NamedMDNode(const NamedMDNode &); // DO NOT IMPLEMENT void *operator new(size_t, unsigned); // DO NOT IMPLEMENT Modified: llvm/trunk/include/llvm/Module.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Module.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/include/llvm/Module.h (original) +++ llvm/trunk/include/llvm/Module.h Tue Aug 4 17:41:48 2009 @@ -26,7 +26,7 @@ class GlobalValueRefMap; // Used by ConstantVals.cpp class FunctionType; -class LLVMContext; +struct LLVMContext; template<> struct ilist_traits : public SymbolTableListTraits { Modified: llvm/trunk/include/llvm/Support/TargetFolder.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/TargetFolder.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/TargetFolder.h (original) +++ llvm/trunk/include/llvm/Support/TargetFolder.h Tue Aug 4 17:41:48 2009 @@ -25,7 +25,7 @@ namespace llvm { class TargetData; -class LLVMContext; +struct LLVMContext; /// TargetFolder - Create constants with target dependent folding. class TargetFolder { Modified: llvm/trunk/include/llvm/Transforms/Utils/Cloning.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Transforms/Utils/Cloning.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/include/llvm/Transforms/Utils/Cloning.h (original) +++ llvm/trunk/include/llvm/Transforms/Utils/Cloning.h Tue Aug 4 17:41:48 2009 @@ -38,7 +38,7 @@ class TargetData; class Loop; class LoopInfo; -class LLVMContext; +struct LLVMContext; /// CloneModule - Return an exact copy of the specified module /// Modified: llvm/trunk/include/llvm/Transforms/Utils/Local.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Transforms/Utils/Local.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/include/llvm/Transforms/Utils/Local.h (original) +++ llvm/trunk/include/llvm/Transforms/Utils/Local.h Tue Aug 4 17:41:48 2009 @@ -27,7 +27,7 @@ class AllocaInst; class ConstantExpr; class TargetData; -class LLVMContext; +struct LLVMContext; struct DbgInfoIntrinsic; template class SmallVectorImpl; Modified: llvm/trunk/include/llvm/Transforms/Utils/PromoteMemToReg.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Transforms/Utils/PromoteMemToReg.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/include/llvm/Transforms/Utils/PromoteMemToReg.h (original) +++ llvm/trunk/include/llvm/Transforms/Utils/PromoteMemToReg.h Tue Aug 4 17:41:48 2009 @@ -23,7 +23,7 @@ class DominatorTree; class DominanceFrontier; class AliasSetTracker; -class LLVMContext; +struct LLVMContext; /// isAllocaPromotable - Return true if this alloca is legal for promotion. /// This is true if there are only loads and stores to the alloca... Modified: llvm/trunk/include/llvm/Transforms/Utils/ValueMapper.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Transforms/Utils/ValueMapper.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/include/llvm/Transforms/Utils/ValueMapper.h (original) +++ llvm/trunk/include/llvm/Transforms/Utils/ValueMapper.h Tue Aug 4 17:41:48 2009 @@ -20,7 +20,7 @@ namespace llvm { class Value; class Instruction; - class LLVMContext; + struct LLVMContext; typedef DenseMap ValueMapTy; Value *MapValue(const Value *V, ValueMapTy &VM, LLVMContext &Context); Modified: llvm/trunk/include/llvm/Value.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Value.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/include/llvm/Value.h (original) +++ llvm/trunk/include/llvm/Value.h Tue Aug 4 17:41:48 2009 @@ -42,7 +42,7 @@ class raw_ostream; class AssemblyAnnotationWriter; class ValueHandleBase; -class LLVMContext; +struct LLVMContext; //===----------------------------------------------------------------------===// // Value Class Modified: llvm/trunk/lib/Archive/ArchiveInternals.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Archive/ArchiveInternals.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/lib/Archive/ArchiveInternals.h (original) +++ llvm/trunk/lib/Archive/ArchiveInternals.h Tue Aug 4 17:41:48 2009 @@ -31,7 +31,7 @@ namespace llvm { - class LLVMContext; + struct LLVMContext; /// The ArchiveMemberHeader structure is used internally for bitcode /// archives. Modified: llvm/trunk/lib/AsmParser/LLLexer.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/LLLexer.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/LLLexer.h (original) +++ llvm/trunk/lib/AsmParser/LLLexer.h Tue Aug 4 17:41:48 2009 @@ -24,7 +24,7 @@ class MemoryBuffer; class Type; class SMDiagnostic; - class LLVMContext; + struct LLVMContext; class LLLexer { const char *CurPtr; Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Reader/BitcodeReader.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Reader/BitcodeReader.h (original) +++ llvm/trunk/lib/Bitcode/Reader/BitcodeReader.h Tue Aug 4 17:41:48 2009 @@ -26,7 +26,7 @@ namespace llvm { class MemoryBuffer; - class LLVMContext; + struct LLVMContext; //===----------------------------------------------------------------------===// // BitcodeReaderValueList Class Modified: llvm/trunk/lib/VMCore/ConstantFold.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/ConstantFold.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/ConstantFold.h (original) +++ llvm/trunk/lib/VMCore/ConstantFold.h Tue Aug 4 17:41:48 2009 @@ -23,7 +23,7 @@ class Value; class Constant; class Type; - class LLVMContext; + struct LLVMContext; // Constant fold various types of instruction... Constant *ConstantFoldCastInstruction( Modified: llvm/trunk/lib/VMCore/LLVMContext.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/LLVMContext.cpp?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/LLVMContext.cpp (original) +++ llvm/trunk/lib/VMCore/LLVMContext.cpp Tue Aug 4 17:41:48 2009 @@ -8,7 +8,7 @@ //===----------------------------------------------------------------------===// // // This file implements LLVMContext, as a wrapper around the opaque -// class LLVMContextImpl. +// struct LLVMContextImpl. // //===----------------------------------------------------------------------===// @@ -29,5 +29,18 @@ return *GlobalContext; } -LLVMContext::LLVMContext() : pImpl(new LLVMContextImpl(*this)) { } +LLVMContext::LLVMContext() : pImpl(new LLVMContextImpl()) { } LLVMContext::~LLVMContext() { delete pImpl; } + +GetElementPtrConstantExpr::GetElementPtrConstantExpr + (Constant *C, + const std::vector &IdxList, + const Type *DestTy) + : ConstantExpr(DestTy, Instruction::GetElementPtr, + OperandTraits::op_end(this) + - (IdxList.size()+1), + IdxList.size()+1) { + OperandList[0] = C; + for (unsigned i = 0, E = IdxList.size(); i != E; ++i) + OperandList[i+1] = IdxList[i]; +} Removed: llvm/trunk/lib/VMCore/LLVMContextImpl.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/LLVMContextImpl.cpp?rev=78114&view=auto ============================================================================== --- llvm/trunk/lib/VMCore/LLVMContextImpl.cpp (original) +++ llvm/trunk/lib/VMCore/LLVMContextImpl.cpp (removed) @@ -1,36 +0,0 @@ -//===--------------- LLVMContextImpl.cpp - Implementation ------*- C++ -*--===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements LLVMContextImpl, the opaque implementation -// of LLVMContext. -// -//===----------------------------------------------------------------------===// - -#include "LLVMContextImpl.h" -#include "llvm/Constants.h" -#include "llvm/DerivedTypes.h" -#include "llvm/LLVMContext.h" -#include "llvm/Metadata.h" -using namespace llvm; - -LLVMContextImpl::LLVMContextImpl(LLVMContext &C) : - Context(C), TheTrueVal(0), TheFalseVal(0) { } - -GetElementPtrConstantExpr::GetElementPtrConstantExpr - (Constant *C, - const std::vector &IdxList, - const Type *DestTy) - : ConstantExpr(DestTy, Instruction::GetElementPtr, - OperandTraits::op_end(this) - - (IdxList.size()+1), - IdxList.size()+1) { - OperandList[0] = C; - for (unsigned i = 0, E = IdxList.size(); i != E; ++i) - OperandList[i+1] = IdxList[i]; -} \ No newline at end of file Modified: llvm/trunk/lib/VMCore/LLVMContextImpl.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/LLVMContextImpl.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/LLVMContextImpl.h (original) +++ llvm/trunk/lib/VMCore/LLVMContextImpl.h Tue Aug 4 17:41:48 2009 @@ -15,776 +15,25 @@ #ifndef LLVM_LLVMCONTEXT_IMPL_H #define LLVM_LLVMCONTEXT_IMPL_H +#include "ConstantsContext.h" #include "llvm/LLVMContext.h" #include "llvm/Constants.h" #include "llvm/DerivedTypes.h" -#include "llvm/Instructions.h" -#include "llvm/Operator.h" -#include "llvm/Support/Debug.h" -#include "llvm/Support/ErrorHandling.h" -#include "llvm/System/Mutex.h" #include "llvm/System/RWMutex.h" #include "llvm/ADT/APFloat.h" #include "llvm/ADT/APInt.h" #include "llvm/ADT/DenseMap.h" #include "llvm/ADT/FoldingSet.h" #include "llvm/ADT/StringMap.h" -#include #include namespace llvm { -template -struct ConstantTraits; - - -/// UnaryConstantExpr - This class is private to Constants.cpp, and is used -/// behind the scenes to implement unary constant exprs. -class UnaryConstantExpr : public ConstantExpr { - void *operator new(size_t, unsigned); // DO NOT IMPLEMENT -public: - // allocate space for exactly one operand - void *operator new(size_t s) { - return User::operator new(s, 1); - } - UnaryConstantExpr(unsigned Opcode, Constant *C, const Type *Ty) - : ConstantExpr(Ty, Opcode, &Op<0>(), 1) { - Op<0>() = C; - } - DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); -}; - -/// BinaryConstantExpr - This class is private to Constants.cpp, and is used -/// behind the scenes to implement binary constant exprs. -class BinaryConstantExpr : public ConstantExpr { - void *operator new(size_t, unsigned); // DO NOT IMPLEMENT -public: - // allocate space for exactly two operands - void *operator new(size_t s) { - return User::operator new(s, 2); - } - BinaryConstantExpr(unsigned Opcode, Constant *C1, Constant *C2) - : ConstantExpr(C1->getType(), Opcode, &Op<0>(), 2) { - Op<0>() = C1; - Op<1>() = C2; - } - /// Transparently provide more efficient getOperand methods. - DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); -}; - -/// SelectConstantExpr - This class is private to Constants.cpp, and is used -/// behind the scenes to implement select constant exprs. -class SelectConstantExpr : public ConstantExpr { - void *operator new(size_t, unsigned); // DO NOT IMPLEMENT -public: - // allocate space for exactly three operands - void *operator new(size_t s) { - return User::operator new(s, 3); - } - SelectConstantExpr(Constant *C1, Constant *C2, Constant *C3) - : ConstantExpr(C2->getType(), Instruction::Select, &Op<0>(), 3) { - Op<0>() = C1; - Op<1>() = C2; - Op<2>() = C3; - } - /// Transparently provide more efficient getOperand methods. - DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); -}; - -/// ExtractElementConstantExpr - This class is private to -/// Constants.cpp, and is used behind the scenes to implement -/// extractelement constant exprs. -class ExtractElementConstantExpr : public ConstantExpr { - void *operator new(size_t, unsigned); // DO NOT IMPLEMENT -public: - // allocate space for exactly two operands - void *operator new(size_t s) { - return User::operator new(s, 2); - } - ExtractElementConstantExpr(Constant *C1, Constant *C2) - : ConstantExpr(cast(C1->getType())->getElementType(), - Instruction::ExtractElement, &Op<0>(), 2) { - Op<0>() = C1; - Op<1>() = C2; - } - /// Transparently provide more efficient getOperand methods. - DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); -}; - -/// InsertElementConstantExpr - This class is private to -/// Constants.cpp, and is used behind the scenes to implement -/// insertelement constant exprs. -class InsertElementConstantExpr : public ConstantExpr { - void *operator new(size_t, unsigned); // DO NOT IMPLEMENT -public: - // allocate space for exactly three operands - void *operator new(size_t s) { - return User::operator new(s, 3); - } - InsertElementConstantExpr(Constant *C1, Constant *C2, Constant *C3) - : ConstantExpr(C1->getType(), Instruction::InsertElement, - &Op<0>(), 3) { - Op<0>() = C1; - Op<1>() = C2; - Op<2>() = C3; - } - /// Transparently provide more efficient getOperand methods. - DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); -}; - -/// ShuffleVectorConstantExpr - This class is private to -/// Constants.cpp, and is used behind the scenes to implement -/// shufflevector constant exprs. -class ShuffleVectorConstantExpr : public ConstantExpr { - void *operator new(size_t, unsigned); // DO NOT IMPLEMENT -public: - // allocate space for exactly three operands - void *operator new(size_t s) { - return User::operator new(s, 3); - } - ShuffleVectorConstantExpr(Constant *C1, Constant *C2, Constant *C3) - : ConstantExpr(VectorType::get( - cast(C1->getType())->getElementType(), - cast(C3->getType())->getNumElements()), - Instruction::ShuffleVector, - &Op<0>(), 3) { - Op<0>() = C1; - Op<1>() = C2; - Op<2>() = C3; - } - /// Transparently provide more efficient getOperand methods. - DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); -}; - -/// ExtractValueConstantExpr - This class is private to -/// Constants.cpp, and is used behind the scenes to implement -/// extractvalue constant exprs. -class ExtractValueConstantExpr : public ConstantExpr { - void *operator new(size_t, unsigned); // DO NOT IMPLEMENT -public: - // allocate space for exactly one operand - void *operator new(size_t s) { - return User::operator new(s, 1); - } - ExtractValueConstantExpr(Constant *Agg, - const SmallVector &IdxList, - const Type *DestTy) - : ConstantExpr(DestTy, Instruction::ExtractValue, &Op<0>(), 1), - Indices(IdxList) { - Op<0>() = Agg; - } - - /// Indices - These identify which value to extract. - const SmallVector Indices; - - /// Transparently provide more efficient getOperand methods. - DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); -}; - -/// InsertValueConstantExpr - This class is private to -/// Constants.cpp, and is used behind the scenes to implement -/// insertvalue constant exprs. -class InsertValueConstantExpr : public ConstantExpr { - void *operator new(size_t, unsigned); // DO NOT IMPLEMENT -public: - // allocate space for exactly one operand - void *operator new(size_t s) { - return User::operator new(s, 2); - } - InsertValueConstantExpr(Constant *Agg, Constant *Val, - const SmallVector &IdxList, - const Type *DestTy) - : ConstantExpr(DestTy, Instruction::InsertValue, &Op<0>(), 2), - Indices(IdxList) { - Op<0>() = Agg; - Op<1>() = Val; - } - - /// Indices - These identify the position for the insertion. - const SmallVector Indices; - - /// Transparently provide more efficient getOperand methods. - DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); -}; - - -/// GetElementPtrConstantExpr - This class is private to Constants.cpp, and is -/// used behind the scenes to implement getelementpr constant exprs. -class GetElementPtrConstantExpr : public ConstantExpr { - GetElementPtrConstantExpr(Constant *C, const std::vector &IdxList, - const Type *DestTy); -public: - static GetElementPtrConstantExpr *Create(Constant *C, - const std::vector&IdxList, - const Type *DestTy) { - return - new(IdxList.size() + 1) GetElementPtrConstantExpr(C, IdxList, DestTy); - } - /// Transparently provide more efficient getOperand methods. - DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); -}; - -// CompareConstantExpr - This class is private to Constants.cpp, and is used -// behind the scenes to implement ICmp and FCmp constant expressions. This is -// needed in order to store the predicate value for these instructions. -struct CompareConstantExpr : public ConstantExpr { - void *operator new(size_t, unsigned); // DO NOT IMPLEMENT - // allocate space for exactly two operands - void *operator new(size_t s) { - return User::operator new(s, 2); - } - unsigned short predicate; - CompareConstantExpr(const Type *ty, Instruction::OtherOps opc, - unsigned short pred, Constant* LHS, Constant* RHS) - : ConstantExpr(ty, opc, &Op<0>(), 2), predicate(pred) { - Op<0>() = LHS; - Op<1>() = RHS; - } - /// Transparently provide more efficient getOperand methods. - DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); -}; - -template <> -struct OperandTraits : FixedNumOperandTraits<1> { -}; -DEFINE_TRANSPARENT_OPERAND_ACCESSORS(UnaryConstantExpr, Value) - -template <> -struct OperandTraits : FixedNumOperandTraits<2> { -}; -DEFINE_TRANSPARENT_OPERAND_ACCESSORS(BinaryConstantExpr, Value) - -template <> -struct OperandTraits : FixedNumOperandTraits<3> { -}; -DEFINE_TRANSPARENT_OPERAND_ACCESSORS(SelectConstantExpr, Value) - -template <> -struct OperandTraits : FixedNumOperandTraits<2> { -}; -DEFINE_TRANSPARENT_OPERAND_ACCESSORS(ExtractElementConstantExpr, Value) - -template <> -struct OperandTraits : FixedNumOperandTraits<3> { -}; -DEFINE_TRANSPARENT_OPERAND_ACCESSORS(InsertElementConstantExpr, Value) - -template <> -struct OperandTraits : FixedNumOperandTraits<3> { -}; -DEFINE_TRANSPARENT_OPERAND_ACCESSORS(ShuffleVectorConstantExpr, Value) - -template <> -struct OperandTraits : FixedNumOperandTraits<1> { -}; -DEFINE_TRANSPARENT_OPERAND_ACCESSORS(ExtractValueConstantExpr, Value) - -template <> -struct OperandTraits : FixedNumOperandTraits<2> { -}; -DEFINE_TRANSPARENT_OPERAND_ACCESSORS(InsertValueConstantExpr, Value) - -template <> -struct OperandTraits : VariadicOperandTraits<1> { -}; - -DEFINE_TRANSPARENT_OPERAND_ACCESSORS(GetElementPtrConstantExpr, Value) - - -template <> -struct OperandTraits : FixedNumOperandTraits<2> { -}; -DEFINE_TRANSPARENT_OPERAND_ACCESSORS(CompareConstantExpr, Value) - -struct ExprMapKeyType { - typedef SmallVector IndexList; - - ExprMapKeyType(unsigned opc, - const std::vector &ops, - unsigned short pred = 0, - const IndexList &inds = IndexList()) - : opcode(opc), predicate(pred), operands(ops), indices(inds) {} - uint16_t opcode; - uint16_t predicate; - std::vector operands; - IndexList indices; - bool operator==(const ExprMapKeyType& that) const { - return this->opcode == that.opcode && - this->predicate == that.predicate && - this->operands == that.operands && - this->indices == that.indices; - } - bool operator<(const ExprMapKeyType & that) const { - return this->opcode < that.opcode || - (this->opcode == that.opcode && this->predicate < that.predicate) || - (this->opcode == that.opcode && this->predicate == that.predicate && - this->operands < that.operands) || - (this->opcode == that.opcode && this->predicate == that.predicate && - this->operands == that.operands && this->indices < that.indices); - } - - bool operator!=(const ExprMapKeyType& that) const { - return !(*this == that); - } -}; - -// The number of operands for each ConstantCreator::create method is -// determined by the ConstantTraits template. -// ConstantCreator - A class that is used to create constants by -// ValueMap*. This class should be partially specialized if there is -// something strange that needs to be done to interface to the ctor for the -// constant. -// -template -struct ConstantTraits< std::vector > { - static unsigned uses(const std::vector& v) { - return v.size(); - } -}; - -template -struct ConstantCreator { - static ConstantClass *create(const TypeClass *Ty, const ValType &V) { - return new(ConstantTraits::uses(V)) ConstantClass(Ty, V); - } -}; - -template -struct ConvertConstantType { - static void convert(ConstantClass *OldC, const TypeClass *NewTy) { - llvm_unreachable("This type cannot be converted!"); - } -}; - -template<> -struct ConstantCreator { - static ConstantExpr *create(const Type *Ty, const ExprMapKeyType &V, - unsigned short pred = 0) { - if (Instruction::isCast(V.opcode)) - return new UnaryConstantExpr(V.opcode, V.operands[0], Ty); - if ((V.opcode >= Instruction::BinaryOpsBegin && - V.opcode < Instruction::BinaryOpsEnd)) - return new BinaryConstantExpr(V.opcode, V.operands[0], V.operands[1]); - if (V.opcode == Instruction::Select) - return new SelectConstantExpr(V.operands[0], V.operands[1], - V.operands[2]); - if (V.opcode == Instruction::ExtractElement) - return new ExtractElementConstantExpr(V.operands[0], V.operands[1]); - if (V.opcode == Instruction::InsertElement) - return new InsertElementConstantExpr(V.operands[0], V.operands[1], - V.operands[2]); - if (V.opcode == Instruction::ShuffleVector) - return new ShuffleVectorConstantExpr(V.operands[0], V.operands[1], - V.operands[2]); - if (V.opcode == Instruction::InsertValue) - return new InsertValueConstantExpr(V.operands[0], V.operands[1], - V.indices, Ty); - if (V.opcode == Instruction::ExtractValue) - return new ExtractValueConstantExpr(V.operands[0], V.indices, Ty); - if (V.opcode == Instruction::GetElementPtr) { - std::vector IdxList(V.operands.begin()+1, V.operands.end()); - return GetElementPtrConstantExpr::Create(V.operands[0], IdxList, Ty); - } - - // The compare instructions are weird. We have to encode the predicate - // value and it is combined with the instruction opcode by multiplying - // the opcode by one hundred. We must decode this to get the predicate. - if (V.opcode == Instruction::ICmp) - return new CompareConstantExpr(Ty, Instruction::ICmp, V.predicate, - V.operands[0], V.operands[1]); - if (V.opcode == Instruction::FCmp) - return new CompareConstantExpr(Ty, Instruction::FCmp, V.predicate, - V.operands[0], V.operands[1]); - llvm_unreachable("Invalid ConstantExpr!"); - return 0; - } -}; - -template<> -struct ConvertConstantType { - static void convert(ConstantExpr *OldC, const Type *NewTy) { - Constant *New; - switch (OldC->getOpcode()) { - case Instruction::Trunc: - case Instruction::ZExt: - case Instruction::SExt: - case Instruction::FPTrunc: - case Instruction::FPExt: - case Instruction::UIToFP: - case Instruction::SIToFP: - case Instruction::FPToUI: - case Instruction::FPToSI: - case Instruction::PtrToInt: - case Instruction::IntToPtr: - case Instruction::BitCast: - New = ConstantExpr::getCast(OldC->getOpcode(), OldC->getOperand(0), - NewTy); - break; - case Instruction::Select: - New = ConstantExpr::getSelectTy(NewTy, OldC->getOperand(0), - OldC->getOperand(1), - OldC->getOperand(2)); - break; - default: - assert(OldC->getOpcode() >= Instruction::BinaryOpsBegin && - OldC->getOpcode() < Instruction::BinaryOpsEnd); - New = ConstantExpr::getTy(NewTy, OldC->getOpcode(), OldC->getOperand(0), - OldC->getOperand(1)); - break; - case Instruction::GetElementPtr: - // Make everyone now use a constant of the new type... - std::vector Idx(OldC->op_begin()+1, OldC->op_end()); - New = ConstantExpr::getGetElementPtrTy(NewTy, OldC->getOperand(0), - &Idx[0], Idx.size()); - break; - } - - assert(New != OldC && "Didn't replace constant??"); - OldC->uncheckedReplaceAllUsesWith(New); - OldC->destroyConstant(); // This constant is now dead, destroy it. - } -}; - -// ConstantAggregateZero does not take extra "value" argument... -template -struct ConstantCreator { - static ConstantAggregateZero *create(const Type *Ty, const ValType &V){ - return new ConstantAggregateZero(Ty); - } -}; - -template<> -struct ConvertConstantType { - static void convert(ConstantVector *OldC, const VectorType *NewTy) { - // Make everyone now use a constant of the new type... - std::vector C; - for (unsigned i = 0, e = OldC->getNumOperands(); i != e; ++i) - C.push_back(cast(OldC->getOperand(i))); - Constant *New = ConstantVector::get(NewTy, C); - assert(New != OldC && "Didn't replace constant??"); - OldC->uncheckedReplaceAllUsesWith(New); - OldC->destroyConstant(); // This constant is now dead, destroy it. - } -}; - -template<> -struct ConvertConstantType { - static void convert(ConstantAggregateZero *OldC, const Type *NewTy) { - // Make everyone now use a constant of the new type... - Constant *New = ConstantAggregateZero::get(NewTy); - assert(New != OldC && "Didn't replace constant??"); - OldC->uncheckedReplaceAllUsesWith(New); - OldC->destroyConstant(); // This constant is now dead, destroy it. - } -}; - -template<> -struct ConvertConstantType { - static void convert(ConstantArray *OldC, const ArrayType *NewTy) { - // Make everyone now use a constant of the new type... - std::vector C; - for (unsigned i = 0, e = OldC->getNumOperands(); i != e; ++i) - C.push_back(cast(OldC->getOperand(i))); - Constant *New = ConstantArray::get(NewTy, C); - assert(New != OldC && "Didn't replace constant??"); - OldC->uncheckedReplaceAllUsesWith(New); - OldC->destroyConstant(); // This constant is now dead, destroy it. - } -}; - -template<> -struct ConvertConstantType { - static void convert(ConstantStruct *OldC, const StructType *NewTy) { - // Make everyone now use a constant of the new type... - std::vector C; - for (unsigned i = 0, e = OldC->getNumOperands(); i != e; ++i) - C.push_back(cast(OldC->getOperand(i))); - Constant *New = ConstantStruct::get(NewTy, C); - assert(New != OldC && "Didn't replace constant??"); - - OldC->uncheckedReplaceAllUsesWith(New); - OldC->destroyConstant(); // This constant is now dead, destroy it. - } -}; - -// ConstantPointerNull does not take extra "value" argument... -template -struct ConstantCreator { - static ConstantPointerNull *create(const PointerType *Ty, const ValType &V){ - return new ConstantPointerNull(Ty); - } -}; - -template<> -struct ConvertConstantType { - static void convert(ConstantPointerNull *OldC, const PointerType *NewTy) { - // Make everyone now use a constant of the new type... - Constant *New = ConstantPointerNull::get(NewTy); - assert(New != OldC && "Didn't replace constant??"); - OldC->uncheckedReplaceAllUsesWith(New); - OldC->destroyConstant(); // This constant is now dead, destroy it. - } -}; - -// UndefValue does not take extra "value" argument... -template -struct ConstantCreator { - static UndefValue *create(const Type *Ty, const ValType &V) { - return new UndefValue(Ty); - } -}; - -template<> -struct ConvertConstantType { - static void convert(UndefValue *OldC, const Type *NewTy) { - // Make everyone now use a constant of the new type. - Constant *New = UndefValue::get(NewTy); - assert(New != OldC && "Didn't replace constant??"); - OldC->uncheckedReplaceAllUsesWith(New); - OldC->destroyConstant(); // This constant is now dead, destroy it. - } -}; - -template -class ValueMap : public AbstractTypeUser { -public: - typedef std::pair MapKey; - typedef std::map MapTy; - typedef std::map InverseMapTy; - typedef std::map AbstractTypeMapTy; -private: - /// Map - This is the main map from the element descriptor to the Constants. - /// This is the primary way we avoid creating two of the same shape - /// constant. - MapTy Map; - - /// InverseMap - If "HasLargeKey" is true, this contains an inverse mapping - /// from the constants to their element in Map. This is important for - /// removal of constants from the array, which would otherwise have to scan - /// through the map with very large keys. - InverseMapTy InverseMap; - - /// AbstractTypeMap - Map for abstract type constants. - /// - AbstractTypeMapTy AbstractTypeMap; - - /// ValueMapLock - Mutex for this map. - sys::SmartMutex ValueMapLock; - -public: - // NOTE: This function is not locked. It is the caller's responsibility - // to enforce proper synchronization. - typename MapTy::iterator map_end() { return Map.end(); } - - /// InsertOrGetItem - Return an iterator for the specified element. - /// If the element exists in the map, the returned iterator points to the - /// entry and Exists=true. If not, the iterator points to the newly - /// inserted entry and returns Exists=false. Newly inserted entries have - /// I->second == 0, and should be filled in. - /// NOTE: This function is not locked. It is the caller's responsibility - // to enforce proper synchronization. - typename MapTy::iterator InsertOrGetItem(std::pair - &InsertVal, - bool &Exists) { - std::pair IP = Map.insert(InsertVal); - Exists = !IP.second; - return IP.first; - } - -private: - typename MapTy::iterator FindExistingElement(ConstantClass *CP) { - if (HasLargeKey) { - typename InverseMapTy::iterator IMI = InverseMap.find(CP); - assert(IMI != InverseMap.end() && IMI->second != Map.end() && - IMI->second->second == CP && - "InverseMap corrupt!"); - return IMI->second; - } - - typename MapTy::iterator I = - Map.find(MapKey(static_cast(CP->getRawType()), - getValType(CP))); - if (I == Map.end() || I->second != CP) { - // FIXME: This should not use a linear scan. If this gets to be a - // performance problem, someone should look at this. - for (I = Map.begin(); I != Map.end() && I->second != CP; ++I) - /* empty */; - } - return I; - } - - ConstantClass* Create(const TypeClass *Ty, const ValType &V, - typename MapTy::iterator I) { - ConstantClass* Result = - ConstantCreator::create(Ty, V); - - assert(Result->getType() == Ty && "Type specified is not correct!"); - I = Map.insert(I, std::make_pair(MapKey(Ty, V), Result)); - - if (HasLargeKey) // Remember the reverse mapping if needed. - InverseMap.insert(std::make_pair(Result, I)); - - // If the type of the constant is abstract, make sure that an entry - // exists for it in the AbstractTypeMap. - if (Ty->isAbstract()) { - typename AbstractTypeMapTy::iterator TI = - AbstractTypeMap.find(Ty); - - if (TI == AbstractTypeMap.end()) { - // Add ourselves to the ATU list of the type. - cast(Ty)->addAbstractTypeUser(this); - - AbstractTypeMap.insert(TI, std::make_pair(Ty, I)); - } - } - - return Result; - } -public: - - /// getOrCreate - Return the specified constant from the map, creating it if - /// necessary. - ConstantClass *getOrCreate(const TypeClass *Ty, const ValType &V) { - sys::SmartScopedLock Lock(ValueMapLock); - MapKey Lookup(Ty, V); - ConstantClass* Result = 0; - - typename MapTy::iterator I = Map.find(Lookup); - // Is it in the map? - if (I != Map.end()) - Result = static_cast(I->second); - - if (!Result) { - // If no preexisting value, create one now... - Result = Create(Ty, V, I); - } - - return Result; - } - - void remove(ConstantClass *CP) { - sys::SmartScopedLock Lock(ValueMapLock); - typename MapTy::iterator I = FindExistingElement(CP); - assert(I != Map.end() && "Constant not found in constant table!"); - assert(I->second == CP && "Didn't find correct element?"); - - if (HasLargeKey) // Remember the reverse mapping if needed. - InverseMap.erase(CP); - - // Now that we found the entry, make sure this isn't the entry that - // the AbstractTypeMap points to. - const TypeClass *Ty = static_cast(I->first.first); - if (Ty->isAbstract()) { - assert(AbstractTypeMap.count(Ty) && - "Abstract type not in AbstractTypeMap?"); - typename MapTy::iterator &ATMEntryIt = AbstractTypeMap[Ty]; - if (ATMEntryIt == I) { - // Yes, we are removing the representative entry for this type. - // See if there are any other entries of the same type. - typename MapTy::iterator TmpIt = ATMEntryIt; - - // First check the entry before this one... - if (TmpIt != Map.begin()) { - --TmpIt; - if (TmpIt->first.first != Ty) // Not the same type, move back... - ++TmpIt; - } - - // If we didn't find the same type, try to move forward... - if (TmpIt == ATMEntryIt) { - ++TmpIt; - if (TmpIt == Map.end() || TmpIt->first.first != Ty) - --TmpIt; // No entry afterwards with the same type - } - - // If there is another entry in the map of the same abstract type, - // update the AbstractTypeMap entry now. - if (TmpIt != ATMEntryIt) { - ATMEntryIt = TmpIt; - } else { - // Otherwise, we are removing the last instance of this type - // from the table. Remove from the ATM, and from user list. - cast(Ty)->removeAbstractTypeUser(this); - AbstractTypeMap.erase(Ty); - } - } - } - - Map.erase(I); - } - - - /// MoveConstantToNewSlot - If we are about to change C to be the element - /// specified by I, update our internal data structures to reflect this - /// fact. - /// NOTE: This function is not locked. It is the responsibility of the - /// caller to enforce proper synchronization if using this method. - void MoveConstantToNewSlot(ConstantClass *C, typename MapTy::iterator I) { - // First, remove the old location of the specified constant in the map. - typename MapTy::iterator OldI = FindExistingElement(C); - assert(OldI != Map.end() && "Constant not found in constant table!"); - assert(OldI->second == C && "Didn't find correct element?"); - - // If this constant is the representative element for its abstract type, - // update the AbstractTypeMap so that the representative element is I. - if (C->getType()->isAbstract()) { - typename AbstractTypeMapTy::iterator ATI = - AbstractTypeMap.find(C->getType()); - assert(ATI != AbstractTypeMap.end() && - "Abstract type not in AbstractTypeMap?"); - if (ATI->second == OldI) - ATI->second = I; - } - - // Remove the old entry from the map. - Map.erase(OldI); - - // Update the inverse map so that we know that this constant is now - // located at descriptor I. - if (HasLargeKey) { - assert(I->second == C && "Bad inversemap entry!"); - InverseMap[C] = I; - } - } - - void refineAbstractType(const DerivedType *OldTy, const Type *NewTy) { - sys::SmartScopedLock Lock(ValueMapLock); - typename AbstractTypeMapTy::iterator I = - AbstractTypeMap.find(cast(OldTy)); - - assert(I != AbstractTypeMap.end() && - "Abstract type not in AbstractTypeMap?"); - - // Convert a constant at a time until the last one is gone. The last one - // leaving will remove() itself, causing the AbstractTypeMapEntry to be - // eliminated eventually. - do { - ConvertConstantType::convert( - static_cast(I->second->second), - cast(NewTy)); - - I = AbstractTypeMap.find(cast(OldTy)); - } while (I != AbstractTypeMap.end()); - } - - // If the type became concrete without being refined to any other existing - // type, we just remove ourselves from the ATU list. - void typeBecameConcrete(const DerivedType *AbsTy) { - AbsTy->removeAbstractTypeUser(this); - } - - void dump() const { - DOUT << "Constant.cpp: ValueMap\n"; - } -}; - class ConstantInt; class ConstantFP; class MDString; class MDNode; -class LLVMContext; +struct LLVMContext; class Type; class Value; @@ -844,11 +93,11 @@ sys::SmartRWMutex ConstantsLock; typedef DenseMap IntMapTy; + DenseMapAPIntKeyInfo> IntMapTy; IntMapTy IntConstants; typedef DenseMap FPMapTy; + DenseMapAPFloatKeyInfo> FPMapTy; FPMapTy FPConstants; StringMap MDStringCache; @@ -875,14 +124,10 @@ ValueMap ExprConstants; - LLVMContext &Context; ConstantInt *TheTrueVal; ConstantInt *TheFalseVal; - LLVMContextImpl(LLVMContext &C); -private: - LLVMContextImpl(); - LLVMContextImpl(const LLVMContextImpl&); + LLVMContextImpl() : TheTrueVal(0), TheFalseVal(0) { } }; } Modified: llvm/trunk/tools/bugpoint/BugDriver.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/BugDriver.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/tools/bugpoint/BugDriver.h (original) +++ llvm/trunk/tools/bugpoint/BugDriver.h Tue Aug 4 17:41:48 2009 @@ -30,7 +30,7 @@ class BasicBlock; class AbstractInterpreter; class Instruction; -class LLVMContext; +struct LLVMContext; class DebugCrashes; Modified: llvm/trunk/tools/llvm-db/CLIDebugger.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-db/CLIDebugger.h?rev=78115&r1=78114&r2=78115&view=diff ============================================================================== --- llvm/trunk/tools/llvm-db/CLIDebugger.h (original) +++ llvm/trunk/tools/llvm-db/CLIDebugger.h Tue Aug 4 17:41:48 2009 @@ -24,7 +24,7 @@ struct SourceLanguage; class ProgramInfo; class RuntimeInfo; - class LLVMContext; + struct LLVMContext; /// CLIDebugger - This class implements the command line interface for the /// LLVM debugger. From evan.cheng at apple.com Tue Aug 4 17:23:23 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 04 Aug 2009 22:23:23 -0000 Subject: [llvm-commits] [llvm] r78113 - /llvm/trunk/test/CodeGen/Thumb2/thumb2-ldm.ll Message-ID: <200908042223.n74MNap9022864@zion.cs.uiuc.edu> Author: evancheng Date: Tue Aug 4 17:22:58 2009 New Revision: 78113 URL: http://llvm.org/viewvc/llvm-project?rev=78113&view=rev Log: Fix test. Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-ldm.ll Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-ldm.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-ldm.ll?rev=78113&r1=78112&r2=78113&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-ldm.ll (original) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-ldm.ll Tue Aug 4 17:22:58 2009 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s +; RUN: llvm-as < %s | llc -mtriple=thumbv7-apple-darwin -mattr=+thumb2 | FileCheck %s @X = external global [0 x i32] ; <[0 x i32]*> [#uses=5] From sabre at nondot.org Tue Aug 4 16:13:16 2009 From: sabre at nondot.org (Chris Lattner) Date: Tue, 04 Aug 2009 21:13:16 -0000 Subject: [llvm-commits] [llvm] r78103 - /llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Message-ID: <200908042113.n74LDNAM020289@zion.cs.uiuc.edu> Author: lattner Date: Tue Aug 4 16:12:08 2009 New Revision: 78103 URL: http://llvm.org/viewvc/llvm-project?rev=78103&view=rev Log: remove a random reference to subtarget. Even without this, we still get "intel syntax" instructions from llc with -x86-asm-syntax=intel Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=78103&r1=78102&r2=78103&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp (original) +++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Tue Aug 4 16:12:08 2009 @@ -29,8 +29,6 @@ } const TargetAsmInfo *X86TargetMachine::createTargetAsmInfo() const { - if (Subtarget.isFlavorIntel()) - return new X86WinTargetAsmInfo(*this); switch (Subtarget.TargetType) { default: llvm_unreachable("unknown subtarget type"); case X86Subtarget::isDarwin: From stoklund at 2pi.dk Tue Aug 4 16:29:33 2009 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Tue, 04 Aug 2009 21:29:33 -0000 Subject: [llvm-commits] [llvm] r78106 - /llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Message-ID: <200908042129.n74LTacY020906@zion.cs.uiuc.edu> Author: stoklund Date: Tue Aug 4 16:29:11 2009 New Revision: 78106 URL: http://llvm.org/viewvc/llvm-project?rev=78106&view=rev Log: Don't give implicit machine operands special treatment in the register scavenger. Imp-def is *not* allowed to redefine a live register. Imp-use is *not* allowed to use a dead register. Modified: llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Modified: llvm/trunk/lib/CodeGen/RegisterScavenging.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterScavenging.cpp?rev=78106&r1=78105&r2=78106&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegisterScavenging.cpp (original) +++ llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Tue Aug 4 16:29:11 2009 @@ -226,7 +226,7 @@ const MachineOperand MO = *UseMOs[i].first; unsigned Reg = MO.getReg(); - assert((MO.isImplicit() || isUsed(Reg)) && "Using an undefined register!"); + assert(isUsed(Reg) && "Using an undefined register!"); if (MO.isKill() && !isReserved(Reg)) { KillRegs.set(Reg); @@ -276,10 +276,7 @@ if (RedefinesSuperRegPart(MI, MO, TRI)) continue; - // Implicit def is allowed to "re-define" any register. Similarly, - // implicitly defined registers can be clobbered. - assert((MO.isImplicit() || isReserved(Reg) || isUnused(Reg) || - isSuperRegUsed(Reg) || + assert((isReserved(Reg) || isUnused(Reg) || isSuperRegUsed(Reg) || isLiveInButUnusedBefore(Reg, MI, MBB, TRI, MRI)) && "Re-defining a live register!"); setUsed(Reg); From mrs at apple.com Tue Aug 4 16:27:34 2009 From: mrs at apple.com (Mike Stump) Date: Tue, 04 Aug 2009 21:27:34 -0000 Subject: [llvm-commits] [llvm] r78105 - in /llvm/trunk/lib/Target/Blackfin: AsmPrinter/CMakeLists.txt TargetInfo/CMakeLists.txt Message-ID: <200908042127.n74LRjfN020792@zion.cs.uiuc.edu> Author: mrs Date: Tue Aug 4 16:27:06 2009 New Revision: 78105 URL: http://llvm.org/viewvc/llvm-project?rev=78105&view=rev Log: Restlyize to match other targets, fixes cmake build to boot. Modified: llvm/trunk/lib/Target/Blackfin/AsmPrinter/CMakeLists.txt llvm/trunk/lib/Target/Blackfin/TargetInfo/CMakeLists.txt Modified: llvm/trunk/lib/Target/Blackfin/AsmPrinter/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Blackfin/AsmPrinter/CMakeLists.txt?rev=78105&r1=78104&r2=78105&view=diff ============================================================================== --- llvm/trunk/lib/Target/Blackfin/AsmPrinter/CMakeLists.txt (original) +++ llvm/trunk/lib/Target/Blackfin/AsmPrinter/CMakeLists.txt Tue Aug 4 16:27:06 2009 @@ -1,4 +1,6 @@ include_directories( ${CMAKE_CURRENT_BINARY_DIR}/.. ${CMAKE_CURRENT_SOURCE_DIR}/.. ) -add_llvm_library(LLVMBlackfinAsmPrinter BlackfinAsmPrinter.cpp) + +add_llvm_library(LLVMBlackfinAsmPrinter BlackfinAsmPrinter.cpp + ) add_dependencies(LLVMBlackfinAsmPrinter BlackfinCodeGenTable_gen) Modified: llvm/trunk/lib/Target/Blackfin/TargetInfo/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Blackfin/TargetInfo/CMakeLists.txt?rev=78105&r1=78104&r2=78105&view=diff ============================================================================== --- llvm/trunk/lib/Target/Blackfin/TargetInfo/CMakeLists.txt (original) +++ llvm/trunk/lib/Target/Blackfin/TargetInfo/CMakeLists.txt Tue Aug 4 16:27:06 2009 @@ -1,4 +1,7 @@ include_directories( ${CMAKE_CURRENT_BINARY_DIR}/.. ${CMAKE_CURRENT_SOURCE_DIR}/.. ) -add_llvm_library(LLVMBlackfinInfo BlackfinTargetInfo.cpp) + +add_llvm_library(LLVMBlackfinInfo BlackfinTargetInfo.cpp + ) + add_dependencies(LLVMBlackfinInfo BlackfinCodeGenTable_gen) From bob.wilson at apple.com Tue Aug 4 16:39:48 2009 From: bob.wilson at apple.com (Bob Wilson) Date: Tue, 04 Aug 2009 21:39:48 -0000 Subject: [llvm-commits] [llvm] r78109 - in /llvm/trunk/lib/Target/ARM: ARMInstrNEON.td AsmPrinter/ARMAsmPrinter.cpp Message-ID: <200908042139.n74LdxHk021347@zion.cs.uiuc.edu> Author: bwilson Date: Tue Aug 4 16:39:33 2009 New Revision: 78109 URL: http://llvm.org/viewvc/llvm-project?rev=78109&view=rev Log: Replace dregsingle operand modifier with explicit escaped curly brackets. For other VLDn and VSTn operations, we need to list the multiple registers explicitly anyway, so there's no point in special-casing this one usage. Modified: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp Modified: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrNEON.td?rev=78109&r1=78108&r2=78109&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrNEON.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Tue Aug 4 16:39:33 2009 @@ -142,7 +142,7 @@ // VLD1 : Vector Load (multiple single elements) class VLD1D : NLdSt<(outs DPR:$dst), (ins addrmode6:$addr), - !strconcat(OpcodeStr, "\t${dst:dregsingle}, $addr"), + !strconcat(OpcodeStr, "\t\\{$dst\\}, $addr"), [(set DPR:$dst, (Ty (IntOp addrmode6:$addr)))]>; class VLD1Q : NLdSt<(outs QPR:$dst), (ins addrmode6:$addr), @@ -164,7 +164,7 @@ // VST1 : Vector Store (multiple single elements) class VST1D : NLdSt<(outs), (ins addrmode6:$addr, DPR:$src), - !strconcat(OpcodeStr, "\t${src:dregsingle}, $addr"), + !strconcat(OpcodeStr, "\t\\{$src\\}, $addr"), [(IntOp addrmode6:$addr, (Ty DPR:$src))]>; class VST1Q : NLdSt<(outs), (ins addrmode6:$addr, QPR:$src), Modified: llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp?rev=78109&r1=78108&r2=78109&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp Tue Aug 4 16:39:33 2009 @@ -348,8 +348,6 @@ O << '{' << TRI->getAsmName(DRegLo) << ',' << TRI->getAsmName(DRegHi) << '}'; - } else if (Modifier && strcmp(Modifier, "dregsingle") == 0) { - O << '{' << TRI->getAsmName(Reg) << '}'; } else { O << TRI->getAsmName(Reg); } From stoklund at 2pi.dk Tue Aug 4 16:30:38 2009 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Tue, 04 Aug 2009 21:30:38 -0000 Subject: [llvm-commits] [llvm] r78107 - in /llvm/trunk: lib/CodeGen/RegisterScavenging.cpp test/CodeGen/ARM/2009-08-04-RegScavengerAssert-2.ll Message-ID: <200908042130.n74LUdpB020949@zion.cs.uiuc.edu> Author: stoklund Date: Tue Aug 4 16:30:30 2009 New Revision: 78107 URL: http://llvm.org/viewvc/llvm-project?rev=78107&view=rev Log: Clean up the handling of two-address operands in RegScavenger. This fixes PR4528. Added: llvm/trunk/test/CodeGen/ARM/2009-08-04-RegScavengerAssert-2.ll Modified: llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Modified: llvm/trunk/lib/CodeGen/RegisterScavenging.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterScavenging.cpp?rev=78107&r1=78106&r2=78107&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegisterScavenging.cpp (original) +++ llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Tue Aug 4 16:30:30 2009 @@ -224,11 +224,13 @@ BitVector KillRegs(NumPhysRegs); for (unsigned i = 0, e = UseMOs.size(); i != e; ++i) { const MachineOperand MO = *UseMOs[i].first; + unsigned Idx = UseMOs[i].second; unsigned Reg = MO.getReg(); assert(isUsed(Reg) && "Using an undefined register!"); - if (MO.isKill() && !isReserved(Reg)) { + // Two-address operands implicitly kill. + if ((MO.isKill() || MI->isRegTiedToDefOperand(Idx)) && !isReserved(Reg)) { KillRegs.set(Reg); // Mark sub-registers as used. @@ -251,8 +253,6 @@ for (unsigned i = 0, e = NumECs + NumDefs; i != e; ++i) { const MachineOperand &MO = (i < NumECs) ? *EarlyClobberMOs[i].first : *DefMOs[i-NumECs].first; - unsigned Idx = (i < NumECs) - ? EarlyClobberMOs[i].second : DefMOs[i-NumECs].second; unsigned Reg = MO.getReg(); if (MO.isUndef()) continue; @@ -263,15 +263,6 @@ continue; } - // Skip two-address destination operand. - unsigned UseIdx; - if (MI->isRegTiedToUseOperand(Idx, &UseIdx) && - !MI->getOperand(UseIdx).isUndef()) { - assert(!MI->getOperand(UseIdx).isKill() && - "Using an undefined register!"); - continue; - } - // Skip if this is merely redefining part of a super-register. if (RedefinesSuperRegPart(MI, MO, TRI)) continue; Added: llvm/trunk/test/CodeGen/ARM/2009-08-04-RegScavengerAssert-2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2009-08-04-RegScavengerAssert-2.ll?rev=78107&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/2009-08-04-RegScavengerAssert-2.ll (added) +++ llvm/trunk/test/CodeGen/ARM/2009-08-04-RegScavengerAssert-2.ll Tue Aug 4 16:30:30 2009 @@ -0,0 +1,33 @@ +; RUN: llvm-as < %s | llc -mtriple=armv6-elf +; PR4528 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64" +target triple = "armv6-elf" + +define arm_aapcscc i32 @file_read_actor(i32* nocapture %desc, i32* %page, i32 %offset, i32 %size) nounwind optsize { +entry: + br i1 undef, label %fault_in_pages_writeable.exit, label %bb5.i + +bb5.i: ; preds = %entry + %asmtmp.i = tail call i32 asm sideeffect "1:\09strbt\09$1,[$2]\0A2:\0A\09.section .fixup,\22ax\22\0A\09.align\092\0A3:\09mov\09$0, $3\0A\09b\092b\0A\09.previous\0A\09.section __ex_table,\22a\22\0A\09.align\093\0A\09.long\091b, 3b\0A\09.previous", "=r,r,r,i,0,~{cc}"(i8 0, i32 undef, i32 -14, i32 0) nounwind ; [#uses=1] + %0 = icmp eq i32 %asmtmp.i, 0 ; [#uses=1] + br i1 %0, label %bb6.i, label %fault_in_pages_writeable.exit + +bb6.i: ; preds = %bb5.i + br i1 undef, label %fault_in_pages_writeable.exit, label %bb7.i + +bb7.i: ; preds = %bb6.i + unreachable + +fault_in_pages_writeable.exit: ; preds = %bb6.i, %bb5.i, %entry + br i1 undef, label %bb2, label %bb3 + +bb2: ; preds = %fault_in_pages_writeable.exit + unreachable + +bb3: ; preds = %fault_in_pages_writeable.exit + %1 = tail call arm_aapcscc i32 @__copy_to_user(i8* undef, i8* undef, i32 undef) nounwind ; [#uses=0] + unreachable +} + +declare arm_aapcscc i32 @__copy_to_user(i8*, i8*, i32) From evan.cheng at apple.com Tue Aug 4 16:13:16 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 04 Aug 2009 21:13:16 -0000 Subject: [llvm-commits] [llvm] r78104 - in /llvm/trunk: lib/Target/ARM/ARMLoadStoreOptimizer.cpp lib/Target/ARM/ARMTargetMachine.cpp lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp test/CodeGen/Thumb2/thumb2-ldm.ll Message-ID: <200908042113.n74LDSdA020296@zion.cs.uiuc.edu> Author: evancheng Date: Tue Aug 4 16:12:13 2009 New Revision: 78104 URL: http://llvm.org/viewvc/llvm-project?rev=78104&view=rev Log: Enable load / store multiple pass for Thumb2. It's not using ldrd / strd yet. Added: llvm/trunk/test/CodeGen/Thumb2/thumb2-ldm.ll Modified: llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp Modified: llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp?rev=78104&r1=78103&r2=78104&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Tue Aug 4 16:12:13 2009 @@ -615,12 +615,15 @@ return false; bool isDPR = NewOpc == ARM::FLDMD || NewOpc == ARM::FSTMD; - unsigned Offset = isAM5 - ? ARM_AM::getAM5Opc((AddSub == ARM_AM::sub) ? ARM_AM::db : ARM_AM::ia, - true, isDPR ? 2 : 1) - : (isAM2 - ? ARM_AM::getAM2Opc(AddSub, Bytes, ARM_AM::no_shift) - : Bytes); + unsigned Offset = 0; + if (isAM5) + Offset = ARM_AM::getAM5Opc((AddSub == ARM_AM::sub) + ? ARM_AM::db + : ARM_AM::ia, true, (isDPR ? 2 : 1)); + else if (isAM2) + Offset = ARM_AM::getAM2Opc(AddSub, Bytes, ARM_AM::no_shift); + else + Offset = AddSub == ARM_AM::sub ? -Bytes : Bytes; if (isLd) { if (isAM5) // FLDMS, FLDMD Modified: llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp?rev=78104&r1=78103&r2=78104&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp Tue Aug 4 16:12:13 2009 @@ -101,8 +101,9 @@ bool ARMBaseTargetMachine::addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel) { - // FIXME: temporarily disabling load / store optimization pass for Thumb mode. - if (OptLevel != CodeGenOpt::None && !DisableLdStOpti && !Subtarget.isThumb()) + // FIXME: temporarily disabling load / store optimization pass for Thumb1 mode. + if (OptLevel != CodeGenOpt::None && !DisableLdStOpti && + !Subtarget.isThumb1Only()) PM.add(createARMLoadStoreOptimizationPass()); if (OptLevel != CodeGenOpt::None && Modified: llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp?rev=78104&r1=78103&r2=78104&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp Tue Aug 4 16:12:13 2009 @@ -599,6 +599,7 @@ // FIXME bool isLDM = (MI->getOpcode() == ARM::LDM || MI->getOpcode() == ARM::LDM_RET || + MI->getOpcode() == ARM::t2LDM || MI->getOpcode() == ARM::t2LDM_RET); O << ARM_AM::getAMSubModeAltStr(Mode, isLDM); } else Added: llvm/trunk/test/CodeGen/Thumb2/thumb2-ldm.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-ldm.ll?rev=78104&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-ldm.ll (added) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-ldm.ll Tue Aug 4 16:12:13 2009 @@ -0,0 +1,40 @@ +; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s + + at X = external global [0 x i32] ; <[0 x i32]*> [#uses=5] + +define i32 @t1() { +; CHECK: t1: +; CHECK: stmfd sp!, {r7, lr} +; CHECK: ldmfd sp!, {r7, pc} + %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 0) ; [#uses=1] + %tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 1) ; [#uses=1] + %tmp4 = tail call i32 @f1( i32 %tmp, i32 %tmp3 ) ; [#uses=1] + ret i32 %tmp4 +} + +define i32 @t2() { +; CHECK: t2: +; CHECK: stmfd sp!, {r7, lr} +; CHECK: ldmia +; CHECK: ldmfd sp!, {r7, pc} + %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 2) ; [#uses=1] + %tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 3) ; [#uses=1] + %tmp5 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 4) ; [#uses=1] + %tmp6 = tail call i32 @f2( i32 %tmp, i32 %tmp3, i32 %tmp5 ) ; [#uses=1] + ret i32 %tmp6 +} + +define i32 @t3() { +; CHECK: t3: +; CHECK: stmfd sp!, {r7, lr} +; CHECK: ldmfd sp!, {r7, pc} + %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 1) ; [#uses=1] + %tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 2) ; [#uses=1] + %tmp5 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 3) ; [#uses=1] + %tmp6 = tail call i32 @f2( i32 %tmp, i32 %tmp3, i32 %tmp5 ) ; [#uses=1] + ret i32 %tmp6 +} + +declare i32 @f1(i32, i32) + +declare i32 @f2(i32, i32, i32) From bob.wilson at apple.com Tue Aug 4 17:02:25 2009 From: bob.wilson at apple.com (Bob Wilson) Date: Tue, 04 Aug 2009 22:02:25 -0000 Subject: [llvm-commits] [llvm] r78111 - in /llvm/trunk/test/CodeGen/ARM: vabal.ll vabdl.ll vacge.ll Message-ID: <200908042202.n74M2Uw6022120@zion.cs.uiuc.edu> Author: bwilson Date: Tue Aug 4 17:01:41 2009 New Revision: 78111 URL: http://llvm.org/viewvc/llvm-project?rev=78111&view=rev Log: Convert more Neon tests to use FileCheck. Modified: llvm/trunk/test/CodeGen/ARM/vabal.ll llvm/trunk/test/CodeGen/ARM/vabdl.ll llvm/trunk/test/CodeGen/ARM/vacge.ll Modified: llvm/trunk/test/CodeGen/ARM/vabal.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vabal.ll?rev=78111&r1=78110&r2=78111&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/vabal.ll (original) +++ llvm/trunk/test/CodeGen/ARM/vabal.ll Tue Aug 4 17:01:41 2009 @@ -1,12 +1,8 @@ -; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t -; RUN: grep {vabal\\.s8} %t | count 1 -; RUN: grep {vabal\\.s16} %t | count 1 -; RUN: grep {vabal\\.s32} %t | count 1 -; RUN: grep {vabal\\.u8} %t | count 1 -; RUN: grep {vabal\\.u16} %t | count 1 -; RUN: grep {vabal\\.u32} %t | count 1 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s define <8 x i16> @vabals8(<8 x i16>* %A, <8 x i8>* %B, <8 x i8>* %C) nounwind { +;CHECK: vabals8: +;CHECK: vabal.s8 %tmp1 = load <8 x i16>* %A %tmp2 = load <8 x i8>* %B %tmp3 = load <8 x i8>* %C @@ -15,6 +11,8 @@ } define <4 x i32> @vabals16(<4 x i32>* %A, <4 x i16>* %B, <4 x i16>* %C) nounwind { +;CHECK: vabals16: +;CHECK: vabal.s16 %tmp1 = load <4 x i32>* %A %tmp2 = load <4 x i16>* %B %tmp3 = load <4 x i16>* %C @@ -23,6 +21,8 @@ } define <2 x i64> @vabals32(<2 x i64>* %A, <2 x i32>* %B, <2 x i32>* %C) nounwind { +;CHECK: vabals32: +;CHECK: vabal.s32 %tmp1 = load <2 x i64>* %A %tmp2 = load <2 x i32>* %B %tmp3 = load <2 x i32>* %C @@ -31,6 +31,8 @@ } define <8 x i16> @vabalu8(<8 x i16>* %A, <8 x i8>* %B, <8 x i8>* %C) nounwind { +;CHECK: vabalu8: +;CHECK: vabal.u8 %tmp1 = load <8 x i16>* %A %tmp2 = load <8 x i8>* %B %tmp3 = load <8 x i8>* %C @@ -39,6 +41,8 @@ } define <4 x i32> @vabalu16(<4 x i32>* %A, <4 x i16>* %B, <4 x i16>* %C) nounwind { +;CHECK: vabalu16: +;CHECK: vabal.u16 %tmp1 = load <4 x i32>* %A %tmp2 = load <4 x i16>* %B %tmp3 = load <4 x i16>* %C @@ -47,6 +51,8 @@ } define <2 x i64> @vabalu32(<2 x i64>* %A, <2 x i32>* %B, <2 x i32>* %C) nounwind { +;CHECK: vabalu32: +;CHECK: vabal.u32 %tmp1 = load <2 x i64>* %A %tmp2 = load <2 x i32>* %B %tmp3 = load <2 x i32>* %C Modified: llvm/trunk/test/CodeGen/ARM/vabdl.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vabdl.ll?rev=78111&r1=78110&r2=78111&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/vabdl.ll (original) +++ llvm/trunk/test/CodeGen/ARM/vabdl.ll Tue Aug 4 17:01:41 2009 @@ -1,12 +1,8 @@ -; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t -; RUN: grep {vabdl\\.s8} %t | count 1 -; RUN: grep {vabdl\\.s16} %t | count 1 -; RUN: grep {vabdl\\.s32} %t | count 1 -; RUN: grep {vabdl\\.u8} %t | count 1 -; RUN: grep {vabdl\\.u16} %t | count 1 -; RUN: grep {vabdl\\.u32} %t | count 1 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s define <8 x i16> @vabdls8(<8 x i8>* %A, <8 x i8>* %B) nounwind { +;CHECK: vabdls8: +;CHECK: vabdl.s8 %tmp1 = load <8 x i8>* %A %tmp2 = load <8 x i8>* %B %tmp3 = call <8 x i16> @llvm.arm.neon.vabdls.v8i16(<8 x i8> %tmp1, <8 x i8> %tmp2) @@ -14,6 +10,8 @@ } define <4 x i32> @vabdls16(<4 x i16>* %A, <4 x i16>* %B) nounwind { +;CHECK: vabdls16: +;CHECK: vabdl.s16 %tmp1 = load <4 x i16>* %A %tmp2 = load <4 x i16>* %B %tmp3 = call <4 x i32> @llvm.arm.neon.vabdls.v4i32(<4 x i16> %tmp1, <4 x i16> %tmp2) @@ -21,6 +19,8 @@ } define <2 x i64> @vabdls32(<2 x i32>* %A, <2 x i32>* %B) nounwind { +;CHECK: vabdls32: +;CHECK: vabdl.s32 %tmp1 = load <2 x i32>* %A %tmp2 = load <2 x i32>* %B %tmp3 = call <2 x i64> @llvm.arm.neon.vabdls.v2i64(<2 x i32> %tmp1, <2 x i32> %tmp2) @@ -28,6 +28,8 @@ } define <8 x i16> @vabdlu8(<8 x i8>* %A, <8 x i8>* %B) nounwind { +;CHECK: vabdlu8: +;CHECK: vabdl.u8 %tmp1 = load <8 x i8>* %A %tmp2 = load <8 x i8>* %B %tmp3 = call <8 x i16> @llvm.arm.neon.vabdlu.v8i16(<8 x i8> %tmp1, <8 x i8> %tmp2) @@ -35,6 +37,8 @@ } define <4 x i32> @vabdlu16(<4 x i16>* %A, <4 x i16>* %B) nounwind { +;CHECK: vabdlu16: +;CHECK: vabdl.u16 %tmp1 = load <4 x i16>* %A %tmp2 = load <4 x i16>* %B %tmp3 = call <4 x i32> @llvm.arm.neon.vabdlu.v4i32(<4 x i16> %tmp1, <4 x i16> %tmp2) @@ -42,6 +46,8 @@ } define <2 x i64> @vabdlu32(<2 x i32>* %A, <2 x i32>* %B) nounwind { +;CHECK: vabdlu32: +;CHECK: vabdl.u32 %tmp1 = load <2 x i32>* %A %tmp2 = load <2 x i32>* %B %tmp3 = call <2 x i64> @llvm.arm.neon.vabdlu.v2i64(<2 x i32> %tmp1, <2 x i32> %tmp2) Modified: llvm/trunk/test/CodeGen/ARM/vacge.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vacge.ll?rev=78111&r1=78110&r2=78111&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/vacge.ll (original) +++ llvm/trunk/test/CodeGen/ARM/vacge.ll Tue Aug 4 17:01:41 2009 @@ -1,7 +1,8 @@ -; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t -; RUN: grep {vacge\\.f32} %t | count 2 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s define <2 x i32> @vacgef32(<2 x float>* %A, <2 x float>* %B) nounwind { +;CHECK: vacgef32: +;CHECK: vacge.f32 %tmp1 = load <2 x float>* %A %tmp2 = load <2 x float>* %B %tmp3 = call <2 x i32> @llvm.arm.neon.vacged(<2 x float> %tmp1, <2 x float> %tmp2) @@ -9,6 +10,8 @@ } define <4 x i32> @vacgeQf32(<4 x float>* %A, <4 x float>* %B) nounwind { +;CHECK: vacgeQf32: +;CHECK: vacge.f32 %tmp1 = load <4 x float>* %A %tmp2 = load <4 x float>* %B %tmp3 = call <4 x i32> @llvm.arm.neon.vacgeq(<4 x float> %tmp1, <4 x float> %tmp2) From bob.wilson at apple.com Tue Aug 4 16:34:34 2009 From: bob.wilson at apple.com (Bob Wilson) Date: Tue, 04 Aug 2009 21:34:34 -0000 Subject: [llvm-commits] [llvm] r78108 - in /llvm/trunk/test/CodeGen/ARM: vaba.ll vabd.ll vabs.ll Message-ID: <200908042134.n74LYuEx021119@zion.cs.uiuc.edu> Author: bwilson Date: Tue Aug 4 16:33:22 2009 New Revision: 78108 URL: http://llvm.org/viewvc/llvm-project?rev=78108&view=rev Log: Convert a few Neon tests to use FileCheck. Modified: llvm/trunk/test/CodeGen/ARM/vaba.ll llvm/trunk/test/CodeGen/ARM/vabd.ll llvm/trunk/test/CodeGen/ARM/vabs.ll Modified: llvm/trunk/test/CodeGen/ARM/vaba.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vaba.ll?rev=78108&r1=78107&r2=78108&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/vaba.ll (original) +++ llvm/trunk/test/CodeGen/ARM/vaba.ll Tue Aug 4 16:33:22 2009 @@ -1,12 +1,8 @@ -; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t -; RUN: grep {vaba\\.s8} %t | count 2 -; RUN: grep {vaba\\.s16} %t | count 2 -; RUN: grep {vaba\\.s32} %t | count 2 -; RUN: grep {vaba\\.u8} %t | count 2 -; RUN: grep {vaba\\.u16} %t | count 2 -; RUN: grep {vaba\\.u32} %t | count 2 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s define <8 x i8> @vabas8(<8 x i8>* %A, <8 x i8>* %B, <8 x i8>* %C) nounwind { +;CHECK: vabas8: +;CHECK: vaba.s8 %tmp1 = load <8 x i8>* %A %tmp2 = load <8 x i8>* %B %tmp3 = load <8 x i8>* %C @@ -15,6 +11,8 @@ } define <4 x i16> @vabas16(<4 x i16>* %A, <4 x i16>* %B, <4 x i16>* %C) nounwind { +;CHECK: vabas16: +;CHECK: vaba.s16 %tmp1 = load <4 x i16>* %A %tmp2 = load <4 x i16>* %B %tmp3 = load <4 x i16>* %C @@ -23,6 +21,8 @@ } define <2 x i32> @vabas32(<2 x i32>* %A, <2 x i32>* %B, <2 x i32>* %C) nounwind { +;CHECK: vabas32: +;CHECK: vaba.s32 %tmp1 = load <2 x i32>* %A %tmp2 = load <2 x i32>* %B %tmp3 = load <2 x i32>* %C @@ -31,6 +31,8 @@ } define <8 x i8> @vabau8(<8 x i8>* %A, <8 x i8>* %B, <8 x i8>* %C) nounwind { +;CHECK: vabau8: +;CHECK: vaba.u8 %tmp1 = load <8 x i8>* %A %tmp2 = load <8 x i8>* %B %tmp3 = load <8 x i8>* %C @@ -39,6 +41,8 @@ } define <4 x i16> @vabau16(<4 x i16>* %A, <4 x i16>* %B, <4 x i16>* %C) nounwind { +;CHECK: vabau16: +;CHECK: vaba.u16 %tmp1 = load <4 x i16>* %A %tmp2 = load <4 x i16>* %B %tmp3 = load <4 x i16>* %C @@ -47,6 +51,8 @@ } define <2 x i32> @vabau32(<2 x i32>* %A, <2 x i32>* %B, <2 x i32>* %C) nounwind { +;CHECK: vabau32: +;CHECK: vaba.u32 %tmp1 = load <2 x i32>* %A %tmp2 = load <2 x i32>* %B %tmp3 = load <2 x i32>* %C @@ -55,6 +61,8 @@ } define <16 x i8> @vabaQs8(<16 x i8>* %A, <16 x i8>* %B, <16 x i8>* %C) nounwind { +;CHECK: vabaQs8: +;CHECK: vaba.s8 %tmp1 = load <16 x i8>* %A %tmp2 = load <16 x i8>* %B %tmp3 = load <16 x i8>* %C @@ -63,6 +71,8 @@ } define <8 x i16> @vabaQs16(<8 x i16>* %A, <8 x i16>* %B, <8 x i16>* %C) nounwind { +;CHECK: vabaQs16: +;CHECK: vaba.s16 %tmp1 = load <8 x i16>* %A %tmp2 = load <8 x i16>* %B %tmp3 = load <8 x i16>* %C @@ -71,6 +81,8 @@ } define <4 x i32> @vabaQs32(<4 x i32>* %A, <4 x i32>* %B, <4 x i32>* %C) nounwind { +;CHECK: vabaQs32: +;CHECK: vaba.s32 %tmp1 = load <4 x i32>* %A %tmp2 = load <4 x i32>* %B %tmp3 = load <4 x i32>* %C @@ -79,6 +91,8 @@ } define <16 x i8> @vabaQu8(<16 x i8>* %A, <16 x i8>* %B, <16 x i8>* %C) nounwind { +;CHECK: vabaQu8: +;CHECK: vaba.u8 %tmp1 = load <16 x i8>* %A %tmp2 = load <16 x i8>* %B %tmp3 = load <16 x i8>* %C @@ -87,6 +101,8 @@ } define <8 x i16> @vabaQu16(<8 x i16>* %A, <8 x i16>* %B, <8 x i16>* %C) nounwind { +;CHECK: vabaQu16: +;CHECK: vaba.u16 %tmp1 = load <8 x i16>* %A %tmp2 = load <8 x i16>* %B %tmp3 = load <8 x i16>* %C @@ -95,6 +111,8 @@ } define <4 x i32> @vabaQu32(<4 x i32>* %A, <4 x i32>* %B, <4 x i32>* %C) nounwind { +;CHECK: vabaQu32: +;CHECK: vaba.u32 %tmp1 = load <4 x i32>* %A %tmp2 = load <4 x i32>* %B %tmp3 = load <4 x i32>* %C Modified: llvm/trunk/test/CodeGen/ARM/vabd.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vabd.ll?rev=78108&r1=78107&r2=78108&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/vabd.ll (original) +++ llvm/trunk/test/CodeGen/ARM/vabd.ll Tue Aug 4 16:33:22 2009 @@ -1,13 +1,8 @@ -; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t -; RUN: grep {vabd\\.s8} %t | count 2 -; RUN: grep {vabd\\.s16} %t | count 2 -; RUN: grep {vabd\\.s32} %t | count 2 -; RUN: grep {vabd\\.u8} %t | count 2 -; RUN: grep {vabd\\.u16} %t | count 2 -; RUN: grep {vabd\\.u32} %t | count 2 -; RUN: grep {vabd\\.f32} %t | count 2 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s define <8 x i8> @vabds8(<8 x i8>* %A, <8 x i8>* %B) nounwind { +;CHECK: vabds8: +;CHECK: vabd.s8 %tmp1 = load <8 x i8>* %A %tmp2 = load <8 x i8>* %B %tmp3 = call <8 x i8> @llvm.arm.neon.vabds.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2) @@ -15,6 +10,8 @@ } define <4 x i16> @vabds16(<4 x i16>* %A, <4 x i16>* %B) nounwind { +;CHECK: vabds16: +;CHECK: vabd.s16 %tmp1 = load <4 x i16>* %A %tmp2 = load <4 x i16>* %B %tmp3 = call <4 x i16> @llvm.arm.neon.vabds.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2) @@ -22,6 +19,8 @@ } define <2 x i32> @vabds32(<2 x i32>* %A, <2 x i32>* %B) nounwind { +;CHECK: vabds32: +;CHECK: vabd.s32 %tmp1 = load <2 x i32>* %A %tmp2 = load <2 x i32>* %B %tmp3 = call <2 x i32> @llvm.arm.neon.vabds.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2) @@ -29,6 +28,8 @@ } define <8 x i8> @vabdu8(<8 x i8>* %A, <8 x i8>* %B) nounwind { +;CHECK: vabdu8: +;CHECK: vabd.u8 %tmp1 = load <8 x i8>* %A %tmp2 = load <8 x i8>* %B %tmp3 = call <8 x i8> @llvm.arm.neon.vabdu.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2) @@ -36,6 +37,8 @@ } define <4 x i16> @vabdu16(<4 x i16>* %A, <4 x i16>* %B) nounwind { +;CHECK: vabdu16: +;CHECK: vabd.u16 %tmp1 = load <4 x i16>* %A %tmp2 = load <4 x i16>* %B %tmp3 = call <4 x i16> @llvm.arm.neon.vabdu.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2) @@ -43,6 +46,8 @@ } define <2 x i32> @vabdu32(<2 x i32>* %A, <2 x i32>* %B) nounwind { +;CHECK: vabdu32: +;CHECK: vabd.u32 %tmp1 = load <2 x i32>* %A %tmp2 = load <2 x i32>* %B %tmp3 = call <2 x i32> @llvm.arm.neon.vabdu.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2) @@ -50,6 +55,8 @@ } define <2 x float> @vabdf32(<2 x float>* %A, <2 x float>* %B) nounwind { +;CHECK: vabdf32: +;CHECK: vabd.f32 %tmp1 = load <2 x float>* %A %tmp2 = load <2 x float>* %B %tmp3 = call <2 x float> @llvm.arm.neon.vabdf.v2f32(<2 x float> %tmp1, <2 x float> %tmp2) @@ -57,6 +64,8 @@ } define <16 x i8> @vabdQs8(<16 x i8>* %A, <16 x i8>* %B) nounwind { +;CHECK: vabdQs8: +;CHECK: vabd.s8 %tmp1 = load <16 x i8>* %A %tmp2 = load <16 x i8>* %B %tmp3 = call <16 x i8> @llvm.arm.neon.vabds.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2) @@ -64,6 +73,8 @@ } define <8 x i16> @vabdQs16(<8 x i16>* %A, <8 x i16>* %B) nounwind { +;CHECK: vabdQs16: +;CHECK: vabd.s16 %tmp1 = load <8 x i16>* %A %tmp2 = load <8 x i16>* %B %tmp3 = call <8 x i16> @llvm.arm.neon.vabds.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2) @@ -71,6 +82,8 @@ } define <4 x i32> @vabdQs32(<4 x i32>* %A, <4 x i32>* %B) nounwind { +;CHECK: vabdQs32: +;CHECK: vabd.s32 %tmp1 = load <4 x i32>* %A %tmp2 = load <4 x i32>* %B %tmp3 = call <4 x i32> @llvm.arm.neon.vabds.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2) @@ -78,6 +91,8 @@ } define <16 x i8> @vabdQu8(<16 x i8>* %A, <16 x i8>* %B) nounwind { +;CHECK: vabdQu8: +;CHECK: vabd.u8 %tmp1 = load <16 x i8>* %A %tmp2 = load <16 x i8>* %B %tmp3 = call <16 x i8> @llvm.arm.neon.vabdu.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2) @@ -85,6 +100,8 @@ } define <8 x i16> @vabdQu16(<8 x i16>* %A, <8 x i16>* %B) nounwind { +;CHECK: vabdQu16: +;CHECK: vabd.u16 %tmp1 = load <8 x i16>* %A %tmp2 = load <8 x i16>* %B %tmp3 = call <8 x i16> @llvm.arm.neon.vabdu.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2) @@ -92,6 +109,8 @@ } define <4 x i32> @vabdQu32(<4 x i32>* %A, <4 x i32>* %B) nounwind { +;CHECK: vabdQu32: +;CHECK: vabd.u32 %tmp1 = load <4 x i32>* %A %tmp2 = load <4 x i32>* %B %tmp3 = call <4 x i32> @llvm.arm.neon.vabdu.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2) @@ -99,6 +118,8 @@ } define <4 x float> @vabdQf32(<4 x float>* %A, <4 x float>* %B) nounwind { +;CHECK: vabdQf32: +;CHECK: vabd.f32 %tmp1 = load <4 x float>* %A %tmp2 = load <4 x float>* %B %tmp3 = call <4 x float> @llvm.arm.neon.vabdf.v4f32(<4 x float> %tmp1, <4 x float> %tmp2) Modified: llvm/trunk/test/CodeGen/ARM/vabs.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vabs.ll?rev=78108&r1=78107&r2=78108&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/vabs.ll (original) +++ llvm/trunk/test/CodeGen/ARM/vabs.ll Tue Aug 4 16:33:22 2009 @@ -1,52 +1,64 @@ -; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t -; RUN: grep {vabs\\.s8} %t | count 2 -; RUN: grep {vabs\\.s16} %t | count 2 -; RUN: grep {vabs\\.s32} %t | count 2 -; RUN: grep {vabs\\.f32} %t | count 2 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s define <8 x i8> @vabss8(<8 x i8>* %A) nounwind { +;CHECK: vabss8: +;CHECK: vabs.s8 %tmp1 = load <8 x i8>* %A %tmp2 = call <8 x i8> @llvm.arm.neon.vabs.v8i8(<8 x i8> %tmp1) ret <8 x i8> %tmp2 } define <4 x i16> @vabss16(<4 x i16>* %A) nounwind { +;CHECK: vabss16: +;CHECK: vabs.s16 %tmp1 = load <4 x i16>* %A %tmp2 = call <4 x i16> @llvm.arm.neon.vabs.v4i16(<4 x i16> %tmp1) ret <4 x i16> %tmp2 } define <2 x i32> @vabss32(<2 x i32>* %A) nounwind { +;CHECK: vabss32: +;CHECK: vabs.s32 %tmp1 = load <2 x i32>* %A %tmp2 = call <2 x i32> @llvm.arm.neon.vabs.v2i32(<2 x i32> %tmp1) ret <2 x i32> %tmp2 } define <2 x float> @vabsf32(<2 x float>* %A) nounwind { +;CHECK: vabsf32: +;CHECK: vabs.f32 %tmp1 = load <2 x float>* %A %tmp2 = call <2 x float> @llvm.arm.neon.vabsf.v2f32(<2 x float> %tmp1) ret <2 x float> %tmp2 } define <16 x i8> @vabsQs8(<16 x i8>* %A) nounwind { +;CHECK: vabsQs8: +;CHECK: vabs.s8 %tmp1 = load <16 x i8>* %A %tmp2 = call <16 x i8> @llvm.arm.neon.vabs.v16i8(<16 x i8> %tmp1) ret <16 x i8> %tmp2 } define <8 x i16> @vabsQs16(<8 x i16>* %A) nounwind { +;CHECK: vabsQs16: +;CHECK: vabs.s16 %tmp1 = load <8 x i16>* %A %tmp2 = call <8 x i16> @llvm.arm.neon.vabs.v8i16(<8 x i16> %tmp1) ret <8 x i16> %tmp2 } define <4 x i32> @vabsQs32(<4 x i32>* %A) nounwind { +;CHECK: vabsQs32: +;CHECK: vabs.s32 %tmp1 = load <4 x i32>* %A %tmp2 = call <4 x i32> @llvm.arm.neon.vabs.v4i32(<4 x i32> %tmp1) ret <4 x i32> %tmp2 } define <4 x float> @vabsQf32(<4 x float>* %A) nounwind { +;CHECK: vabsQf32: +;CHECK: vabs.f32 %tmp1 = load <4 x float>* %A %tmp2 = call <4 x float> @llvm.arm.neon.vabsf.v4f32(<4 x float> %tmp1) ret <4 x float> %tmp2 From daniel at zuster.org Tue Aug 4 15:32:49 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Tue, 04 Aug 2009 20:32:49 -0000 Subject: [llvm-commits] [llvm] r78098 - /llvm/trunk/lib/System/Unix/Program.inc Message-ID: <200908042033.n74KX6ph019002@zion.cs.uiuc.edu> Author: ddunbar Date: Tue Aug 4 15:32:25 2009 New Revision: 78098 URL: http://llvm.org/viewvc/llvm-project?rev=78098&view=rev Log: When exec() fails, return 127 instead of errno; the parent process has no way to distinguish that the result is errno, so it can't use it to provide more information about the error (it also exposes the numeric value of errno). Modified: llvm/trunk/lib/System/Unix/Program.inc Modified: llvm/trunk/lib/System/Unix/Program.inc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Unix/Program.inc?rev=78098&r1=78097&r2=78098&view=diff ============================================================================== --- llvm/trunk/lib/System/Unix/Program.inc (original) +++ llvm/trunk/lib/System/Unix/Program.inc Tue Aug 4 15:32:25 2009 @@ -197,12 +197,12 @@ // Execute! if (envp != 0) - execve (path.c_str(), (char**)args, (char**)envp); + execve(path.c_str(), (char**)args, (char**)envp); else - execv (path.c_str(), (char**)args); + execv(path.c_str(), (char**)args); // If the execve() failed, we should exit and let the parent pick up // our non-zero exit status. - exit (errno); + exit(127); } // Parent process: Break out of the switch to do our processing. From daniel at zuster.org Tue Aug 4 15:36:56 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Tue, 04 Aug 2009 20:36:56 -0000 Subject: [llvm-commits] [llvm] r78099 - /llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Message-ID: <200908042037.n74Kb02i019127@zion.cs.uiuc.edu> Author: ddunbar Date: Tue Aug 4 15:36:45 2009 New Revision: 78099 URL: http://llvm.org/viewvc/llvm-project?rev=78099&view=rev Log: TableGen / AsmMatcher: Tweaks to avoid generating completely bogus match functions. - Fix variant flattening when the variant embeds an operand reference. - Ignore instructions which reference an operand multiple times (e.g., "xorb $dst, $dst"), and operands which have extra flags (e.g., "$dst:subreg32"). Modified: llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Modified: llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp?rev=78099&r1=78098&r2=78099&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Tue Aug 4 15:36:45 2009 @@ -29,23 +29,40 @@ std::string Res = ""; for (;;) { - // Add the prefix until the next '{', and split out the contents in the - // braces. - std::pair Inner, Split = Cur.split('{'); - - Res += Split.first; - if (Split.second.empty()) + // Find the start of the next variant string. + size_t VariantsStart = 0; + for (size_t e = Cur.size(); VariantsStart != e; ++VariantsStart) + if (Cur[VariantsStart] == '{' && + (VariantsStart == 0 || Cur[VariantsStart-1] != '$')) + break; + + // Add the prefix to the result. + Res += Cur.slice(0, VariantsStart); + if (VariantsStart == Cur.size()) break; - Inner = Split.second.split('}'); + ++VariantsStart; // Skip the '{'. + + // Scan to the end of the variants string. + size_t VariantsEnd = VariantsStart; + unsigned NestedBraces = 1; + for (size_t e = Cur.size(); VariantsEnd != e; ++VariantsEnd) { + if (Cur[VariantsEnd] == '}') { + if (--NestedBraces == 0) + break; + } else if (Cur[VariantsEnd] == '{') + ++NestedBraces; + } // Select the Nth variant (or empty). - StringRef Selection = Inner.first; + StringRef Selection = Cur.slice(VariantsStart, VariantsEnd); for (unsigned i = 0; i != N; ++i) Selection = Selection.split('|').second; Res += Selection.split('|').first; - Cur = Inner.second; + assert(VariantsEnd != Cur.size() && + "Unterminated variants in assembly string!"); + Cur = Cur.substr(VariantsEnd + 1); } return Res; @@ -128,6 +145,12 @@ if (Form->getValue()->getAsString() == "Pseudo") continue; + // Ignore "PHI" node. + // + // FIXME: This is also a hack. + if (it->first == "PHI") + continue; + // Ignore instructions with no .s string. // // FIXME: What are these? @@ -138,12 +161,6 @@ if (StringRef(CGI.AsmString).startswith("lock")) continue; - // FIXME: Hack. -#if 0 - if (1 && it->first != "SUB8mr") - continue; -#endif - std::string Flattened = FlattenVariants(CGI.AsmString, 0); SmallVector Tokens; @@ -167,9 +184,50 @@ } }); - // FIXME: Ignore non-literal tokens. - if (std::find(Tokens[0].begin(), Tokens[0].end(), '$') != Tokens[0].end()) + // FIXME: Ignore prefixes with non-literal tokens. + if (std::find(Tokens[0].begin(), Tokens[0].end(), '$') != Tokens[0].end()) { + DEBUG({ + errs() << "warning: '" << it->first << "': " + << "ignoring non-literal token '" << Tokens[0] << "', \n"; + }); + continue; + } + + // Ignore instructions with subreg specifiers, these are always fake + // instructions for simplifying codegen. + // + // FIXME: Is this true? + // + // Also, we ignore instructions which reference the operand multiple times; + // this implies a constraint we would not currently honor. These are + // currently always fake instructions for simplifying codegen. + // + // FIXME: Encode this assumption in the .td, so we can error out here. + std::set OperandNames; + unsigned HasSubreg = 0, HasDuplicate = 0; + for (unsigned i = 1, e = Tokens.size(); i < e; ++i) { + if (Tokens[i][0] == '$' && + std::find(Tokens[i].begin(), + Tokens[i].end(), ':') != Tokens[i].end()) + HasSubreg = i; + if (Tokens[i][0] == '$' && !OperandNames.insert(Tokens[i]).second) + HasDuplicate = i; + } + if (HasSubreg) { + DEBUG({ + errs() << "warning: '" << it->first << "': " + << "ignoring instruction; operand with subreg attribute '" + << Tokens[HasSubreg] << "', \n"; + }); continue; + } else if (HasDuplicate) { + DEBUG({ + errs() << "warning: '" << it->first << "': " + << "ignoring instruction; tied operand '" + << Tokens[HasSubreg] << "', \n"; + }); + continue; + } std::string FnName = "Match_" + Target.getName() + "_Inst_" + it->first; MatchFns.push_back(FnName); From david_goodwin at apple.com Tue Aug 4 15:39:11 2009 From: david_goodwin at apple.com (David Goodwin) Date: Tue, 04 Aug 2009 20:39:11 -0000 Subject: [llvm-commits] [llvm] r78101 - in /llvm/trunk: lib/Target/ARM/ARMInstrFormats.td lib/Target/ARM/ARMInstrNEON.td lib/Target/ARM/ARMInstrVFP.td test/CodeGen/ARM/fabss.ll test/CodeGen/ARM/fnegs.ll Message-ID: <200908042039.n74KdHpp019215@zion.cs.uiuc.edu> Author: david_goodwin Date: Tue Aug 4 15:39:05 2009 New Revision: 78101 URL: http://llvm.org/viewvc/llvm-project?rev=78101&view=rev Log: Add NEON single-precision FP support for fabs and fneg. Added: llvm/trunk/test/CodeGen/ARM/fabss.ll llvm/trunk/test/CodeGen/ARM/fnegs.ll Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td llvm/trunk/lib/Target/ARM/ARMInstrNEON.td llvm/trunk/lib/Target/ARM/ARMInstrVFP.td Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=78101&r1=78100&r2=78101&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Tue Aug 4 15:39:05 2009 @@ -1071,6 +1071,14 @@ let Inst{7-4} = opcod3; } +// Single precision, unary if no NEON +// Same as ASuI except not available if NEON is enabled +class ASuIn opcod1, bits<4> opcod2, bits<4> opcod3, dag oops, dag iops, + string opc, string asm, list pattern> + : ASuI { + list Predicates = [HasVFP2,DontUseNEONForFP]; +} + // Single precision, binary class ASbI opcod, dag oops, dag iops, string opc, string asm, list pattern> Modified: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrNEON.td?rev=78101&r1=78100&r2=78101&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrNEON.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Tue Aug 4 15:39:05 2009 @@ -246,6 +246,12 @@ (ins QPR:$src), !strconcat(OpcodeStr, "\t$dst, $src"), "", [(set QPR:$dst, (ResTy (IntOp (OpTy QPR:$src))))]>; +// Basic 2-register operations, scalar single-precision +class N2VDInts + : NEONFPPat<(f32 (OpNode SPR:$a)), + (EXTRACT_SUBREG (Inst (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), SPR:$a, arm_ssubreg_0)), + arm_ssubreg_0)>; + // Narrow 2-register intrinsics. class N2VNInt op24_23, bits<2> op21_20, bits<2> op19_18, bits<2> op17_16, bits<5> op11_7, bit op6, bit op4, @@ -1338,6 +1344,7 @@ v2f32, v2f32, int_arm_neon_vabsf>; def VABSfq : N2VQInt<0b11, 0b11, 0b10, 0b01, 0b01110, 0, "vabs.f32", v4f32, v4f32, int_arm_neon_vabsf>; +def : N2VDInts; // VQABS : Vector Saturating Absolute Value defm VQABS : N2VInt_QHS<0b11, 0b11, 0b00, 0b01110, 0, "vqabs.s", @@ -1372,6 +1379,7 @@ def VNEGf32q : N2V<0b11, 0b11, 0b10, 0b01, 0b01111, 1, 0, (outs QPR:$dst), (ins QPR:$src), "vneg.f32\t$dst, $src", "", [(set QPR:$dst, (v4f32 (fneg QPR:$src)))]>; +def : N2VDInts; def : Pat<(v8i8 (vneg_conv DPR:$src)), (VNEGs8d DPR:$src)>; def : Pat<(v4i16 (vneg_conv DPR:$src)), (VNEGs16d DPR:$src)>; Modified: llvm/trunk/lib/Target/ARM/ARMInstrVFP.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrVFP.td?rev=78101&r1=78100&r2=78101&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrVFP.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrVFP.td Tue Aug 4 15:39:05 2009 @@ -168,9 +168,9 @@ "fabsd", " $dst, $a", [(set DPR:$dst, (fabs DPR:$a))]>; -def FABSS : ASuI<0b11101011, 0b0000, 0b1100, (outs SPR:$dst), (ins SPR:$a), - "fabss", " $dst, $a", - [(set SPR:$dst, (fabs SPR:$a))]>; +def FABSS : ASuIn<0b11101011, 0b0000, 0b1100, (outs SPR:$dst), (ins SPR:$a), + "fabss", " $dst, $a", + [(set SPR:$dst, (fabs SPR:$a))]>; let Defs = [FPSCR] in { def FCMPEZD : ADuI<0b11101011, 0b0101, 0b1100, (outs), (ins DPR:$a), @@ -208,9 +208,9 @@ "fnegd", " $dst, $a", [(set DPR:$dst, (fneg DPR:$a))]>; -def FNEGS : ASuI<0b11101011, 0b0001, 0b0100, (outs SPR:$dst), (ins SPR:$a), - "fnegs", " $dst, $a", - [(set SPR:$dst, (fneg SPR:$a))]>; +def FNEGS : ASuIn<0b11101011, 0b0001, 0b0100, (outs SPR:$dst), (ins SPR:$a), + "fnegs", " $dst, $a", + [(set SPR:$dst, (fneg SPR:$a))]>; def FSQRTD : ADuI<0b11101011, 0b0001, 0b1100, (outs DPR:$dst), (ins DPR:$a), "fsqrtd", " $dst, $a", Added: llvm/trunk/test/CodeGen/ARM/fabss.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fabss.ll?rev=78101&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/fabss.ll (added) +++ llvm/trunk/test/CodeGen/ARM/fabss.ll Tue Aug 4 15:39:05 2009 @@ -0,0 +1,13 @@ +; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep -E {fabss\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | grep -E {vabs.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | grep -E {fabss\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 + +define float @test(float %a, float %b) { +entry: + %dum = fadd float %a, %b + %0 = tail call float @fabsf(float %dum) + %dum1 = fadd float %0, %b + ret float %dum1 +} + +declare float @fabsf(float) Added: llvm/trunk/test/CodeGen/ARM/fnegs.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fnegs.ll?rev=78101&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/fnegs.ll (added) +++ llvm/trunk/test/CodeGen/ARM/fnegs.ll Tue Aug 4 15:39:05 2009 @@ -0,0 +1,23 @@ +; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep -E {fnegs\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 2 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | grep -E {vneg.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 2 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | grep -E {fnegs\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 2 + +define float @test1(float* %a) { +entry: + %0 = load float* %a, align 4 ; [#uses=2] + %1 = fsub float -0.000000e+00, %0 ; [#uses=2] + %2 = fpext float %1 to double ; [#uses=1] + %3 = fcmp olt double %2, 1.234000e+00 ; [#uses=1] + %retval = select i1 %3, float %1, float %0 ; [#uses=1] + ret float %retval +} + +define float @test2(float* %a) { +entry: + %0 = load float* %a, align 4 ; [#uses=2] + %1 = fmul float -1.000000e+00, %0 ; [#uses=2] + %2 = fpext float %1 to double ; [#uses=1] + %3 = fcmp olt double %2, 1.234000e+00 ; [#uses=1] + %retval = select i1 %3, float %1, float %0 ; [#uses=1] + ret float %retval +} From resistor at mac.com Tue Aug 4 17:55:52 2009 From: resistor at mac.com (Owen Anderson) Date: Tue, 04 Aug 2009 22:55:52 -0000 Subject: [llvm-commits] [llvm] r78116 - /llvm/trunk/lib/VMCore/ConstantsContext.h Message-ID: <200908042255.n74Mtsje024274@zion.cs.uiuc.edu> Author: resistor Date: Tue Aug 4 17:55:26 2009 New Revision: 78116 URL: http://llvm.org/viewvc/llvm-project?rev=78116&view=rev Log: It helps if I remember to actually add the file... Added: llvm/trunk/lib/VMCore/ConstantsContext.h Added: llvm/trunk/lib/VMCore/ConstantsContext.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/ConstantsContext.h?rev=78116&view=auto ============================================================================== --- llvm/trunk/lib/VMCore/ConstantsContext.h (added) +++ llvm/trunk/lib/VMCore/ConstantsContext.h Tue Aug 4 17:55:26 2009 @@ -0,0 +1,774 @@ +//===---------------- ConstantsContext.h - Implementation ------*- C++ -*--===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines various helper methods and classes used by +// LLVMContextImpl for creating and managing constants. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_CONSTANTSCONTEXT_H +#define LLVM_CONSTANTSCONTEXT_H + +#include "llvm/Instructions.h" +#include "llvm/Operator.h" +#include "llvm/Support/Debug.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/System/Mutex.h" +#include "llvm/System/RWMutex.h" +#include + +namespace llvm { +template +struct ConstantTraits; + +/// UnaryConstantExpr - This class is private to Constants.cpp, and is used +/// behind the scenes to implement unary constant exprs. +class UnaryConstantExpr : public ConstantExpr { + void *operator new(size_t, unsigned); // DO NOT IMPLEMENT +public: + // allocate space for exactly one operand + void *operator new(size_t s) { + return User::operator new(s, 1); + } + UnaryConstantExpr(unsigned Opcode, Constant *C, const Type *Ty) + : ConstantExpr(Ty, Opcode, &Op<0>(), 1) { + Op<0>() = C; + } + DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); +}; + +/// BinaryConstantExpr - This class is private to Constants.cpp, and is used +/// behind the scenes to implement binary constant exprs. +class BinaryConstantExpr : public ConstantExpr { + void *operator new(size_t, unsigned); // DO NOT IMPLEMENT +public: + // allocate space for exactly two operands + void *operator new(size_t s) { + return User::operator new(s, 2); + } + BinaryConstantExpr(unsigned Opcode, Constant *C1, Constant *C2) + : ConstantExpr(C1->getType(), Opcode, &Op<0>(), 2) { + Op<0>() = C1; + Op<1>() = C2; + } + /// Transparently provide more efficient getOperand methods. + DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); +}; + +/// SelectConstantExpr - This class is private to Constants.cpp, and is used +/// behind the scenes to implement select constant exprs. +class SelectConstantExpr : public ConstantExpr { + void *operator new(size_t, unsigned); // DO NOT IMPLEMENT +public: + // allocate space for exactly three operands + void *operator new(size_t s) { + return User::operator new(s, 3); + } + SelectConstantExpr(Constant *C1, Constant *C2, Constant *C3) + : ConstantExpr(C2->getType(), Instruction::Select, &Op<0>(), 3) { + Op<0>() = C1; + Op<1>() = C2; + Op<2>() = C3; + } + /// Transparently provide more efficient getOperand methods. + DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); +}; + +/// ExtractElementConstantExpr - This class is private to +/// Constants.cpp, and is used behind the scenes to implement +/// extractelement constant exprs. +class ExtractElementConstantExpr : public ConstantExpr { + void *operator new(size_t, unsigned); // DO NOT IMPLEMENT +public: + // allocate space for exactly two operands + void *operator new(size_t s) { + return User::operator new(s, 2); + } + ExtractElementConstantExpr(Constant *C1, Constant *C2) + : ConstantExpr(cast(C1->getType())->getElementType(), + Instruction::ExtractElement, &Op<0>(), 2) { + Op<0>() = C1; + Op<1>() = C2; + } + /// Transparently provide more efficient getOperand methods. + DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); +}; + +/// InsertElementConstantExpr - This class is private to +/// Constants.cpp, and is used behind the scenes to implement +/// insertelement constant exprs. +class InsertElementConstantExpr : public ConstantExpr { + void *operator new(size_t, unsigned); // DO NOT IMPLEMENT +public: + // allocate space for exactly three operands + void *operator new(size_t s) { + return User::operator new(s, 3); + } + InsertElementConstantExpr(Constant *C1, Constant *C2, Constant *C3) + : ConstantExpr(C1->getType(), Instruction::InsertElement, + &Op<0>(), 3) { + Op<0>() = C1; + Op<1>() = C2; + Op<2>() = C3; + } + /// Transparently provide more efficient getOperand methods. + DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); +}; + +/// ShuffleVectorConstantExpr - This class is private to +/// Constants.cpp, and is used behind the scenes to implement +/// shufflevector constant exprs. +class ShuffleVectorConstantExpr : public ConstantExpr { + void *operator new(size_t, unsigned); // DO NOT IMPLEMENT +public: + // allocate space for exactly three operands + void *operator new(size_t s) { + return User::operator new(s, 3); + } + ShuffleVectorConstantExpr(Constant *C1, Constant *C2, Constant *C3) + : ConstantExpr(VectorType::get( + cast(C1->getType())->getElementType(), + cast(C3->getType())->getNumElements()), + Instruction::ShuffleVector, + &Op<0>(), 3) { + Op<0>() = C1; + Op<1>() = C2; + Op<2>() = C3; + } + /// Transparently provide more efficient getOperand methods. + DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); +}; + +/// ExtractValueConstantExpr - This class is private to +/// Constants.cpp, and is used behind the scenes to implement +/// extractvalue constant exprs. +class ExtractValueConstantExpr : public ConstantExpr { + void *operator new(size_t, unsigned); // DO NOT IMPLEMENT +public: + // allocate space for exactly one operand + void *operator new(size_t s) { + return User::operator new(s, 1); + } + ExtractValueConstantExpr(Constant *Agg, + const SmallVector &IdxList, + const Type *DestTy) + : ConstantExpr(DestTy, Instruction::ExtractValue, &Op<0>(), 1), + Indices(IdxList) { + Op<0>() = Agg; + } + + /// Indices - These identify which value to extract. + const SmallVector Indices; + + /// Transparently provide more efficient getOperand methods. + DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); +}; + +/// InsertValueConstantExpr - This class is private to +/// Constants.cpp, and is used behind the scenes to implement +/// insertvalue constant exprs. +class InsertValueConstantExpr : public ConstantExpr { + void *operator new(size_t, unsigned); // DO NOT IMPLEMENT +public: + // allocate space for exactly one operand + void *operator new(size_t s) { + return User::operator new(s, 2); + } + InsertValueConstantExpr(Constant *Agg, Constant *Val, + const SmallVector &IdxList, + const Type *DestTy) + : ConstantExpr(DestTy, Instruction::InsertValue, &Op<0>(), 2), + Indices(IdxList) { + Op<0>() = Agg; + Op<1>() = Val; + } + + /// Indices - These identify the position for the insertion. + const SmallVector Indices; + + /// Transparently provide more efficient getOperand methods. + DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); +}; + + +/// GetElementPtrConstantExpr - This class is private to Constants.cpp, and is +/// used behind the scenes to implement getelementpr constant exprs. +class GetElementPtrConstantExpr : public ConstantExpr { + GetElementPtrConstantExpr(Constant *C, const std::vector &IdxList, + const Type *DestTy); +public: + static GetElementPtrConstantExpr *Create(Constant *C, + const std::vector&IdxList, + const Type *DestTy) { + return + new(IdxList.size() + 1) GetElementPtrConstantExpr(C, IdxList, DestTy); + } + /// Transparently provide more efficient getOperand methods. + DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); +}; + +// CompareConstantExpr - This class is private to Constants.cpp, and is used +// behind the scenes to implement ICmp and FCmp constant expressions. This is +// needed in order to store the predicate value for these instructions. +struct CompareConstantExpr : public ConstantExpr { + void *operator new(size_t, unsigned); // DO NOT IMPLEMENT + // allocate space for exactly two operands + void *operator new(size_t s) { + return User::operator new(s, 2); + } + unsigned short predicate; + CompareConstantExpr(const Type *ty, Instruction::OtherOps opc, + unsigned short pred, Constant* LHS, Constant* RHS) + : ConstantExpr(ty, opc, &Op<0>(), 2), predicate(pred) { + Op<0>() = LHS; + Op<1>() = RHS; + } + /// Transparently provide more efficient getOperand methods. + DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); +}; + +template <> +struct OperandTraits : FixedNumOperandTraits<1> { +}; +DEFINE_TRANSPARENT_OPERAND_ACCESSORS(UnaryConstantExpr, Value) + +template <> +struct OperandTraits : FixedNumOperandTraits<2> { +}; +DEFINE_TRANSPARENT_OPERAND_ACCESSORS(BinaryConstantExpr, Value) + +template <> +struct OperandTraits : FixedNumOperandTraits<3> { +}; +DEFINE_TRANSPARENT_OPERAND_ACCESSORS(SelectConstantExpr, Value) + +template <> +struct OperandTraits : FixedNumOperandTraits<2> { +}; +DEFINE_TRANSPARENT_OPERAND_ACCESSORS(ExtractElementConstantExpr, Value) + +template <> +struct OperandTraits : FixedNumOperandTraits<3> { +}; +DEFINE_TRANSPARENT_OPERAND_ACCESSORS(InsertElementConstantExpr, Value) + +template <> +struct OperandTraits : FixedNumOperandTraits<3> { +}; +DEFINE_TRANSPARENT_OPERAND_ACCESSORS(ShuffleVectorConstantExpr, Value) + +template <> +struct OperandTraits : FixedNumOperandTraits<1> { +}; +DEFINE_TRANSPARENT_OPERAND_ACCESSORS(ExtractValueConstantExpr, Value) + +template <> +struct OperandTraits : FixedNumOperandTraits<2> { +}; +DEFINE_TRANSPARENT_OPERAND_ACCESSORS(InsertValueConstantExpr, Value) + +template <> +struct OperandTraits : VariadicOperandTraits<1> { +}; + +DEFINE_TRANSPARENT_OPERAND_ACCESSORS(GetElementPtrConstantExpr, Value) + + +template <> +struct OperandTraits : FixedNumOperandTraits<2> { +}; +DEFINE_TRANSPARENT_OPERAND_ACCESSORS(CompareConstantExpr, Value) + +struct ExprMapKeyType { + typedef SmallVector IndexList; + + ExprMapKeyType(unsigned opc, + const std::vector &ops, + unsigned short pred = 0, + const IndexList &inds = IndexList()) + : opcode(opc), predicate(pred), operands(ops), indices(inds) {} + uint16_t opcode; + uint16_t predicate; + std::vector operands; + IndexList indices; + bool operator==(const ExprMapKeyType& that) const { + return this->opcode == that.opcode && + this->predicate == that.predicate && + this->operands == that.operands && + this->indices == that.indices; + } + bool operator<(const ExprMapKeyType & that) const { + return this->opcode < that.opcode || + (this->opcode == that.opcode && this->predicate < that.predicate) || + (this->opcode == that.opcode && this->predicate == that.predicate && + this->operands < that.operands) || + (this->opcode == that.opcode && this->predicate == that.predicate && + this->operands == that.operands && this->indices < that.indices); + } + + bool operator!=(const ExprMapKeyType& that) const { + return !(*this == that); + } +}; + +// The number of operands for each ConstantCreator::create method is +// determined by the ConstantTraits template. +// ConstantCreator - A class that is used to create constants by +// ValueMap*. This class should be partially specialized if there is +// something strange that needs to be done to interface to the ctor for the +// constant. +// +template +struct ConstantTraits< std::vector > { + static unsigned uses(const std::vector& v) { + return v.size(); + } +}; + +template +struct ConstantCreator { + static ConstantClass *create(const TypeClass *Ty, const ValType &V) { + return new(ConstantTraits::uses(V)) ConstantClass(Ty, V); + } +}; + +template +struct ConvertConstantType { + static void convert(ConstantClass *OldC, const TypeClass *NewTy) { + llvm_unreachable("This type cannot be converted!"); + } +}; + +template<> +struct ConstantCreator { + static ConstantExpr *create(const Type *Ty, const ExprMapKeyType &V, + unsigned short pred = 0) { + if (Instruction::isCast(V.opcode)) + return new UnaryConstantExpr(V.opcode, V.operands[0], Ty); + if ((V.opcode >= Instruction::BinaryOpsBegin && + V.opcode < Instruction::BinaryOpsEnd)) + return new BinaryConstantExpr(V.opcode, V.operands[0], V.operands[1]); + if (V.opcode == Instruction::Select) + return new SelectConstantExpr(V.operands[0], V.operands[1], + V.operands[2]); + if (V.opcode == Instruction::ExtractElement) + return new ExtractElementConstantExpr(V.operands[0], V.operands[1]); + if (V.opcode == Instruction::InsertElement) + return new InsertElementConstantExpr(V.operands[0], V.operands[1], + V.operands[2]); + if (V.opcode == Instruction::ShuffleVector) + return new ShuffleVectorConstantExpr(V.operands[0], V.operands[1], + V.operands[2]); + if (V.opcode == Instruction::InsertValue) + return new InsertValueConstantExpr(V.operands[0], V.operands[1], + V.indices, Ty); + if (V.opcode == Instruction::ExtractValue) + return new ExtractValueConstantExpr(V.operands[0], V.indices, Ty); + if (V.opcode == Instruction::GetElementPtr) { + std::vector IdxList(V.operands.begin()+1, V.operands.end()); + return GetElementPtrConstantExpr::Create(V.operands[0], IdxList, Ty); + } + + // The compare instructions are weird. We have to encode the predicate + // value and it is combined with the instruction opcode by multiplying + // the opcode by one hundred. We must decode this to get the predicate. + if (V.opcode == Instruction::ICmp) + return new CompareConstantExpr(Ty, Instruction::ICmp, V.predicate, + V.operands[0], V.operands[1]); + if (V.opcode == Instruction::FCmp) + return new CompareConstantExpr(Ty, Instruction::FCmp, V.predicate, + V.operands[0], V.operands[1]); + llvm_unreachable("Invalid ConstantExpr!"); + return 0; + } +}; + +template<> +struct ConvertConstantType { + static void convert(ConstantExpr *OldC, const Type *NewTy) { + Constant *New; + switch (OldC->getOpcode()) { + case Instruction::Trunc: + case Instruction::ZExt: + case Instruction::SExt: + case Instruction::FPTrunc: + case Instruction::FPExt: + case Instruction::UIToFP: + case Instruction::SIToFP: + case Instruction::FPToUI: + case Instruction::FPToSI: + case Instruction::PtrToInt: + case Instruction::IntToPtr: + case Instruction::BitCast: + New = ConstantExpr::getCast(OldC->getOpcode(), OldC->getOperand(0), + NewTy); + break; + case Instruction::Select: + New = ConstantExpr::getSelectTy(NewTy, OldC->getOperand(0), + OldC->getOperand(1), + OldC->getOperand(2)); + break; + default: + assert(OldC->getOpcode() >= Instruction::BinaryOpsBegin && + OldC->getOpcode() < Instruction::BinaryOpsEnd); + New = ConstantExpr::getTy(NewTy, OldC->getOpcode(), OldC->getOperand(0), + OldC->getOperand(1)); + break; + case Instruction::GetElementPtr: + // Make everyone now use a constant of the new type... + std::vector Idx(OldC->op_begin()+1, OldC->op_end()); + New = ConstantExpr::getGetElementPtrTy(NewTy, OldC->getOperand(0), + &Idx[0], Idx.size()); + break; + } + + assert(New != OldC && "Didn't replace constant??"); + OldC->uncheckedReplaceAllUsesWith(New); + OldC->destroyConstant(); // This constant is now dead, destroy it. + } +}; + +// ConstantAggregateZero does not take extra "value" argument... +template +struct ConstantCreator { + static ConstantAggregateZero *create(const Type *Ty, const ValType &V){ + return new ConstantAggregateZero(Ty); + } +}; + +template<> +struct ConvertConstantType { + static void convert(ConstantVector *OldC, const VectorType *NewTy) { + // Make everyone now use a constant of the new type... + std::vector C; + for (unsigned i = 0, e = OldC->getNumOperands(); i != e; ++i) + C.push_back(cast(OldC->getOperand(i))); + Constant *New = ConstantVector::get(NewTy, C); + assert(New != OldC && "Didn't replace constant??"); + OldC->uncheckedReplaceAllUsesWith(New); + OldC->destroyConstant(); // This constant is now dead, destroy it. + } +}; + +template<> +struct ConvertConstantType { + static void convert(ConstantAggregateZero *OldC, const Type *NewTy) { + // Make everyone now use a constant of the new type... + Constant *New = ConstantAggregateZero::get(NewTy); + assert(New != OldC && "Didn't replace constant??"); + OldC->uncheckedReplaceAllUsesWith(New); + OldC->destroyConstant(); // This constant is now dead, destroy it. + } +}; + +template<> +struct ConvertConstantType { + static void convert(ConstantArray *OldC, const ArrayType *NewTy) { + // Make everyone now use a constant of the new type... + std::vector C; + for (unsigned i = 0, e = OldC->getNumOperands(); i != e; ++i) + C.push_back(cast(OldC->getOperand(i))); + Constant *New = ConstantArray::get(NewTy, C); + assert(New != OldC && "Didn't replace constant??"); + OldC->uncheckedReplaceAllUsesWith(New); + OldC->destroyConstant(); // This constant is now dead, destroy it. + } +}; + +template<> +struct ConvertConstantType { + static void convert(ConstantStruct *OldC, const StructType *NewTy) { + // Make everyone now use a constant of the new type... + std::vector C; + for (unsigned i = 0, e = OldC->getNumOperands(); i != e; ++i) + C.push_back(cast(OldC->getOperand(i))); + Constant *New = ConstantStruct::get(NewTy, C); + assert(New != OldC && "Didn't replace constant??"); + + OldC->uncheckedReplaceAllUsesWith(New); + OldC->destroyConstant(); // This constant is now dead, destroy it. + } +}; + +// ConstantPointerNull does not take extra "value" argument... +template +struct ConstantCreator { + static ConstantPointerNull *create(const PointerType *Ty, const ValType &V){ + return new ConstantPointerNull(Ty); + } +}; + +template<> +struct ConvertConstantType { + static void convert(ConstantPointerNull *OldC, const PointerType *NewTy) { + // Make everyone now use a constant of the new type... + Constant *New = ConstantPointerNull::get(NewTy); + assert(New != OldC && "Didn't replace constant??"); + OldC->uncheckedReplaceAllUsesWith(New); + OldC->destroyConstant(); // This constant is now dead, destroy it. + } +}; + +// UndefValue does not take extra "value" argument... +template +struct ConstantCreator { + static UndefValue *create(const Type *Ty, const ValType &V) { + return new UndefValue(Ty); + } +}; + +template<> +struct ConvertConstantType { + static void convert(UndefValue *OldC, const Type *NewTy) { + // Make everyone now use a constant of the new type. + Constant *New = UndefValue::get(NewTy); + assert(New != OldC && "Didn't replace constant??"); + OldC->uncheckedReplaceAllUsesWith(New); + OldC->destroyConstant(); // This constant is now dead, destroy it. + } +}; + +template +class ValueMap : public AbstractTypeUser { +public: + typedef std::pair MapKey; + typedef std::map MapTy; + typedef std::map InverseMapTy; + typedef std::map AbstractTypeMapTy; +private: + /// Map - This is the main map from the element descriptor to the Constants. + /// This is the primary way we avoid creating two of the same shape + /// constant. + MapTy Map; + + /// InverseMap - If "HasLargeKey" is true, this contains an inverse mapping + /// from the constants to their element in Map. This is important for + /// removal of constants from the array, which would otherwise have to scan + /// through the map with very large keys. + InverseMapTy InverseMap; + + /// AbstractTypeMap - Map for abstract type constants. + /// + AbstractTypeMapTy AbstractTypeMap; + + /// ValueMapLock - Mutex for this map. + sys::SmartMutex ValueMapLock; + +public: + // NOTE: This function is not locked. It is the caller's responsibility + // to enforce proper synchronization. + typename MapTy::iterator map_end() { return Map.end(); } + + /// InsertOrGetItem - Return an iterator for the specified element. + /// If the element exists in the map, the returned iterator points to the + /// entry and Exists=true. If not, the iterator points to the newly + /// inserted entry and returns Exists=false. Newly inserted entries have + /// I->second == 0, and should be filled in. + /// NOTE: This function is not locked. It is the caller's responsibility + // to enforce proper synchronization. + typename MapTy::iterator InsertOrGetItem(std::pair + &InsertVal, + bool &Exists) { + std::pair IP = Map.insert(InsertVal); + Exists = !IP.second; + return IP.first; + } + +private: + typename MapTy::iterator FindExistingElement(ConstantClass *CP) { + if (HasLargeKey) { + typename InverseMapTy::iterator IMI = InverseMap.find(CP); + assert(IMI != InverseMap.end() && IMI->second != Map.end() && + IMI->second->second == CP && + "InverseMap corrupt!"); + return IMI->second; + } + + typename MapTy::iterator I = + Map.find(MapKey(static_cast(CP->getRawType()), + getValType(CP))); + if (I == Map.end() || I->second != CP) { + // FIXME: This should not use a linear scan. If this gets to be a + // performance problem, someone should look at this. + for (I = Map.begin(); I != Map.end() && I->second != CP; ++I) + /* empty */; + } + return I; + } + + ConstantClass* Create(const TypeClass *Ty, const ValType &V, + typename MapTy::iterator I) { + ConstantClass* Result = + ConstantCreator::create(Ty, V); + + assert(Result->getType() == Ty && "Type specified is not correct!"); + I = Map.insert(I, std::make_pair(MapKey(Ty, V), Result)); + + if (HasLargeKey) // Remember the reverse mapping if needed. + InverseMap.insert(std::make_pair(Result, I)); + + // If the type of the constant is abstract, make sure that an entry + // exists for it in the AbstractTypeMap. + if (Ty->isAbstract()) { + typename AbstractTypeMapTy::iterator TI = + AbstractTypeMap.find(Ty); + + if (TI == AbstractTypeMap.end()) { + // Add ourselves to the ATU list of the type. + cast(Ty)->addAbstractTypeUser(this); + + AbstractTypeMap.insert(TI, std::make_pair(Ty, I)); + } + } + + return Result; + } +public: + + /// getOrCreate - Return the specified constant from the map, creating it if + /// necessary. + ConstantClass *getOrCreate(const TypeClass *Ty, const ValType &V) { + sys::SmartScopedLock Lock(ValueMapLock); + MapKey Lookup(Ty, V); + ConstantClass* Result = 0; + + typename MapTy::iterator I = Map.find(Lookup); + // Is it in the map? + if (I != Map.end()) + Result = static_cast(I->second); + + if (!Result) { + // If no preexisting value, create one now... + Result = Create(Ty, V, I); + } + + return Result; + } + + void remove(ConstantClass *CP) { + sys::SmartScopedLock Lock(ValueMapLock); + typename MapTy::iterator I = FindExistingElement(CP); + assert(I != Map.end() && "Constant not found in constant table!"); + assert(I->second == CP && "Didn't find correct element?"); + + if (HasLargeKey) // Remember the reverse mapping if needed. + InverseMap.erase(CP); + + // Now that we found the entry, make sure this isn't the entry that + // the AbstractTypeMap points to. + const TypeClass *Ty = static_cast(I->first.first); + if (Ty->isAbstract()) { + assert(AbstractTypeMap.count(Ty) && + "Abstract type not in AbstractTypeMap?"); + typename MapTy::iterator &ATMEntryIt = AbstractTypeMap[Ty]; + if (ATMEntryIt == I) { + // Yes, we are removing the representative entry for this type. + // See if there are any other entries of the same type. + typename MapTy::iterator TmpIt = ATMEntryIt; + + // First check the entry before this one... + if (TmpIt != Map.begin()) { + --TmpIt; + if (TmpIt->first.first != Ty) // Not the same type, move back... + ++TmpIt; + } + + // If we didn't find the same type, try to move forward... + if (TmpIt == ATMEntryIt) { + ++TmpIt; + if (TmpIt == Map.end() || TmpIt->first.first != Ty) + --TmpIt; // No entry afterwards with the same type + } + + // If there is another entry in the map of the same abstract type, + // update the AbstractTypeMap entry now. + if (TmpIt != ATMEntryIt) { + ATMEntryIt = TmpIt; + } else { + // Otherwise, we are removing the last instance of this type + // from the table. Remove from the ATM, and from user list. + cast(Ty)->removeAbstractTypeUser(this); + AbstractTypeMap.erase(Ty); + } + } + } + + Map.erase(I); + } + + + /// MoveConstantToNewSlot - If we are about to change C to be the element + /// specified by I, update our internal data structures to reflect this + /// fact. + /// NOTE: This function is not locked. It is the responsibility of the + /// caller to enforce proper synchronization if using this method. + void MoveConstantToNewSlot(ConstantClass *C, typename MapTy::iterator I) { + // First, remove the old location of the specified constant in the map. + typename MapTy::iterator OldI = FindExistingElement(C); + assert(OldI != Map.end() && "Constant not found in constant table!"); + assert(OldI->second == C && "Didn't find correct element?"); + + // If this constant is the representative element for its abstract type, + // update the AbstractTypeMap so that the representative element is I. + if (C->getType()->isAbstract()) { + typename AbstractTypeMapTy::iterator ATI = + AbstractTypeMap.find(C->getType()); + assert(ATI != AbstractTypeMap.end() && + "Abstract type not in AbstractTypeMap?"); + if (ATI->second == OldI) + ATI->second = I; + } + + // Remove the old entry from the map. + Map.erase(OldI); + + // Update the inverse map so that we know that this constant is now + // located at descriptor I. + if (HasLargeKey) { + assert(I->second == C && "Bad inversemap entry!"); + InverseMap[C] = I; + } + } + + void refineAbstractType(const DerivedType *OldTy, const Type *NewTy) { + sys::SmartScopedLock Lock(ValueMapLock); + typename AbstractTypeMapTy::iterator I = + AbstractTypeMap.find(cast(OldTy)); + + assert(I != AbstractTypeMap.end() && + "Abstract type not in AbstractTypeMap?"); + + // Convert a constant at a time until the last one is gone. The last one + // leaving will remove() itself, causing the AbstractTypeMapEntry to be + // eliminated eventually. + do { + ConvertConstantType::convert( + static_cast(I->second->second), + cast(NewTy)); + + I = AbstractTypeMap.find(cast(OldTy)); + } while (I != AbstractTypeMap.end()); + } + + // If the type became concrete without being refined to any other existing + // type, we just remove ourselves from the ATU list. + void typeBecameConcrete(const DerivedType *AbsTy) { + AbsTy->removeAbstractTypeUser(this); + } + + void dump() const { + DOUT << "Constant.cpp: ValueMap\n"; + } +}; + +} + +#endif From stuart at apple.com Tue Aug 4 17:59:10 2009 From: stuart at apple.com (Stuart Hastings) Date: Tue, 04 Aug 2009 22:59:10 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r78117 - /llvm-gcc-4.2/trunk/build_gcc Message-ID: <200908042259.n74MxDBU024393@zion.cs.uiuc.edu> Author: stuart Date: Tue Aug 4 17:58:56 2009 New Revision: 78117 URL: http://llvm.org/viewvc/llvm-project?rev=78117&view=rev Log: Revert r76083. Modified: llvm-gcc-4.2/trunk/build_gcc Modified: llvm-gcc-4.2/trunk/build_gcc URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/build_gcc?rev=78117&r1=78116&r2=78117&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/build_gcc (original) +++ llvm-gcc-4.2/trunk/build_gcc Tue Aug 4 17:58:56 2009 @@ -179,11 +179,8 @@ # APPLE LOCAL end ARM # LLVM LOCAL begin -# If we can find an LLVM-GCC, prefer it. -export CC=/Developer/usr/bin/llvm-gcc -if [ ! -x $CC ] ; then unset CC ; fi -export CXX=/Developer/usr/bin/llvm-g++ -if [ ! -x $CXX ] ; then unset CXX ; fi +# If the user has CC set in their environment unset it now +unset CC # LLVM LOCAL end ######################################## From benny.kra at googlemail.com Tue Aug 4 18:02:57 2009 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Tue, 04 Aug 2009 23:02:57 -0000 Subject: [llvm-commits] [llvm] r78118 - /llvm/trunk/lib/VMCore/CMakeLists.txt Message-ID: <200908042302.n74N2whm024597@zion.cs.uiuc.edu> Author: d0k Date: Tue Aug 4 18:02:53 2009 New Revision: 78118 URL: http://llvm.org/viewvc/llvm-project?rev=78118&view=rev Log: Update CMakeLists. Modified: llvm/trunk/lib/VMCore/CMakeLists.txt Modified: llvm/trunk/lib/VMCore/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/CMakeLists.txt?rev=78118&r1=78117&r2=78118&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/CMakeLists.txt (original) +++ llvm/trunk/lib/VMCore/CMakeLists.txt Tue Aug 4 18:02:53 2009 @@ -14,7 +14,6 @@ Instructions.cpp IntrinsicInst.cpp LLVMContext.cpp - LLVMContextImpl.cpp LeakDetector.cpp Mangler.cpp Metadata.cpp From sabre at nondot.org Tue Aug 4 18:07:18 2009 From: sabre at nondot.org (Chris Lattner) Date: Tue, 04 Aug 2009 23:07:18 -0000 Subject: [llvm-commits] [llvm] r78119 - in /llvm/trunk: include/llvm/Value.h include/llvm/ValueSymbolTable.h lib/Bitcode/Writer/BitcodeWriter.cpp lib/VMCore/Value.cpp Message-ID: <200908042307.n74N7Nav025051@zion.cs.uiuc.edu> Author: lattner Date: Tue Aug 4 18:07:12 2009 New Revision: 78119 URL: http://llvm.org/viewvc/llvm-project?rev=78119&view=rev Log: revert r78048, it isn't worth using assertingvh here. Modified: llvm/trunk/include/llvm/Value.h llvm/trunk/include/llvm/ValueSymbolTable.h llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp llvm/trunk/lib/VMCore/Value.cpp Modified: llvm/trunk/include/llvm/Value.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Value.h?rev=78119&r1=78118&r2=78119&view=diff ============================================================================== --- llvm/trunk/include/llvm/Value.h (original) +++ llvm/trunk/include/llvm/Value.h Tue Aug 4 18:07:12 2009 @@ -38,7 +38,7 @@ template class StringMapEntry; template class AssertingVH; -typedef StringMapEntry > ValueName; +typedef StringMapEntry ValueName; class raw_ostream; class AssemblyAnnotationWriter; class ValueHandleBase; Modified: llvm/trunk/include/llvm/ValueSymbolTable.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ValueSymbolTable.h?rev=78119&r1=78118&r2=78119&view=diff ============================================================================== --- llvm/trunk/include/llvm/ValueSymbolTable.h (original) +++ llvm/trunk/include/llvm/ValueSymbolTable.h Tue Aug 4 18:07:12 2009 @@ -17,7 +17,6 @@ #include "llvm/Value.h" #include "llvm/ADT/StringMap.h" #include "llvm/Support/DataTypes.h" -#include "llvm/Support/ValueHandle.h" namespace llvm { template @@ -45,7 +44,7 @@ /// @{ public: /// @brief A mapping of names to values. - typedef StringMap > ValueMap; + typedef StringMap ValueMap; /// @brief An iterator over a ValueMap. typedef ValueMap::iterator iterator; Modified: llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp?rev=78119&r1=78118&r2=78119&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp (original) +++ llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp Tue Aug 4 18:07:12 2009 @@ -1088,7 +1088,7 @@ // VST_ENTRY: [valueid, namechar x N] // VST_BBENTRY: [bbid, namechar x N] unsigned Code; - if (isa(*SI->getValue())) { + if (isa(SI->getValue())) { Code = bitc::VST_CODE_BBENTRY; if (isChar6) AbbrevToUse = VST_BBENTRY_6_ABBREV; Modified: llvm/trunk/lib/VMCore/Value.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Value.cpp?rev=78119&r1=78118&r2=78119&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Value.cpp (original) +++ llvm/trunk/lib/VMCore/Value.cpp Tue Aug 4 18:07:12 2009 @@ -57,14 +57,6 @@ } Value::~Value() { - // If this value is named, destroy the name. This should not be in a symtab - // at this point. - if (Name) - Name->Destroy(); - - // There should be no uses of this object anymore, remove it. - LeakDetector::removeGarbageObject(this); - // Notify all ValueHandles (if present) that this value is going away. if (HasValueHandle) ValueHandleBase::ValueIsDeleted(this); @@ -84,6 +76,14 @@ } #endif assert(use_empty() && "Uses remain when a value is destroyed!"); + + // If this value is named, destroy the name. This should not be in a symtab + // at this point. + if (Name) + Name->Destroy(); + + // There should be no uses of this object anymore, remove it. + LeakDetector::removeGarbageObject(this); } /// hasNUses - Return true if this Value has exactly N users. From clattner at apple.com Tue Aug 4 18:10:15 2009 From: clattner at apple.com (Chris Lattner) Date: Tue, 4 Aug 2009 16:10:15 -0700 Subject: [llvm-commits] [llvm] r78048 - in /llvm/trunk: include/llvm/Value.h include/llvm/ValueSymbolTable.h lib/Bitcode/Writer/BitcodeWriter.cpp lib/VMCore/Value.cpp In-Reply-To: <93C933D6-2A1E-43B3-A26F-7B5A2395F286@apple.com> References: <200908040431.n744V3h9008282@zion.cs.uiuc.edu> <93C933D6-2A1E-43B3-A26F-7B5A2395F286@apple.com> Message-ID: <13D9A47B-4039-45A1-AFB4-342D14734F32@apple.com> On Aug 4, 2009, at 3:29 PM, Dan Gohman wrote: > On Aug 3, 2009, at 9:31 PM, Chris Lattner wrote: >> Author: lattner >> Date: Mon Aug 3 23:31:02 2009 >> New Revision: 78048 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=78048&view=rev >> Log: >> switch ValueMap to using AssertingVH. This is an old patch I had >> laying >> around in a tree I forgot about. > > Hi Chris, > > This has the property of causing LLVM's public ABI to be non-trivially > sensitive to NDEBUG. If clients aren't built with NDEBUG set to what > it's set to in the LLVM build they're linking with, the results are > very bad and very hard to diagnose. I think this is too heavy a > burden to put on clients. I'm not really very sympathetic to that... there are so many ways that people will already get burned if they do that, it isn't funny. Also, the build system splits out assert and non-assert builds, so it is unlikely to happen. However, I don't really have a strong opinion and don't think it adds much value, so I reverted it. -Chris From gohman at apple.com Tue Aug 4 18:16:08 2009 From: gohman at apple.com (Dan Gohman) Date: Tue, 04 Aug 2009 23:16:08 -0000 Subject: [llvm-commits] [llvm] r78120 - /llvm/trunk/lib/System/Unix/Program.inc Message-ID: <200908042316.n74NGBGa025329@zion.cs.uiuc.edu> Author: djg Date: Tue Aug 4 18:15:49 2009 New Revision: 78120 URL: http://llvm.org/viewvc/llvm-project?rev=78120&view=rev Log: Follow Unix behavior and return 127 if the command is not found, and 126 if it is not executable. Modified: llvm/trunk/lib/System/Unix/Program.inc Modified: llvm/trunk/lib/System/Unix/Program.inc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Unix/Program.inc?rev=78120&r1=78119&r2=78120&view=diff ============================================================================== --- llvm/trunk/lib/System/Unix/Program.inc (original) +++ llvm/trunk/lib/System/Unix/Program.inc Tue Aug 4 18:15:49 2009 @@ -202,7 +202,7 @@ execv(path.c_str(), (char**)args); // If the execve() failed, we should exit and let the parent pick up // our non-zero exit status. - exit(127); + exit(errno == ENOENT ? 127 : 126); } // Parent process: Break out of the switch to do our processing. From gohman at apple.com Tue Aug 4 18:24:02 2009 From: gohman at apple.com (Dan Gohman) Date: Tue, 04 Aug 2009 23:24:02 -0000 Subject: [llvm-commits] [llvm] r78121 - /llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Message-ID: <200908042324.n74NO8MT025580@zion.cs.uiuc.edu> Author: djg Date: Tue Aug 4 18:23:56 2009 New Revision: 78121 URL: http://llvm.org/viewvc/llvm-project?rev=78121&view=rev Log: Check for !isa instead of isa. This matches what the comment says, and it avoids spurious BitCast instructions for Argument values. Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp?rev=78121&r1=78120&r2=78121&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Tue Aug 4 18:23:56 2009 @@ -1637,7 +1637,7 @@ // do this by forcing a BitCast (noop cast) to be inserted into the // preheader in this case. if (!fitsInAddressMode(Base, getAccessType(Inst), TLI, false) && - !isa(BaseV)) { + isa(BaseV)) { // We want this constant emitted into the preheader! This is just // using cast as a copy so BitCast (no-op cast) is appropriate BaseV = new BitCastInst(BaseV, BaseV->getType(), "preheaderinsert", From resistor at mac.com Tue Aug 4 18:33:07 2009 From: resistor at mac.com (Owen Anderson) Date: Tue, 04 Aug 2009 23:33:07 -0000 Subject: [llvm-commits] [llvm] r78122 - in /llvm/trunk/lib/VMCore: LLVMContextImpl.h Type.cpp TypesContext.h Message-ID: <200908042333.n74NXDIW025877@zion.cs.uiuc.edu> Author: resistor Date: Tue Aug 4 18:33:01 2009 New Revision: 78122 URL: http://llvm.org/viewvc/llvm-project?rev=78122&view=rev Log: Begin the process of privatizing the type uniquing tables. No API changes yet, but there will be in the near future. Added: llvm/trunk/lib/VMCore/TypesContext.h Modified: llvm/trunk/lib/VMCore/LLVMContextImpl.h llvm/trunk/lib/VMCore/Type.cpp Modified: llvm/trunk/lib/VMCore/LLVMContextImpl.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/LLVMContextImpl.h?rev=78122&r1=78121&r2=78122&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/LLVMContextImpl.h (original) +++ llvm/trunk/lib/VMCore/LLVMContextImpl.h Tue Aug 4 18:33:01 2009 @@ -16,6 +16,7 @@ #define LLVM_LLVMCONTEXT_IMPL_H #include "ConstantsContext.h" +#include "TypesContext.h" #include "llvm/LLVMContext.h" #include "llvm/Constants.h" #include "llvm/DerivedTypes.h" @@ -127,6 +128,8 @@ ConstantInt *TheTrueVal; ConstantInt *TheFalseVal; + TypeMap ArrayTypes; + LLVMContextImpl() : TheTrueVal(0), TheFalseVal(0) { } }; Modified: llvm/trunk/lib/VMCore/Type.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Type.cpp?rev=78122&r1=78121&r2=78122&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Type.cpp (original) +++ llvm/trunk/lib/VMCore/Type.cpp Tue Aug 4 18:33:01 2009 @@ -11,9 +11,12 @@ // //===----------------------------------------------------------------------===// +#include "LLVMContextImpl.h" #include "llvm/DerivedTypes.h" #include "llvm/Constants.h" #include "llvm/Assembly/Writer.h" +#include "llvm/LLVMContext.h" +#include "llvm/Metadata.h" #include "llvm/ADT/DepthFirstIterator.h" #include "llvm/ADT/StringExtras.h" #include "llvm/ADT/SCCIterator.h" @@ -696,295 +699,10 @@ return false; } -/// getSubElementHash - Generate a hash value for all of the SubType's of this -/// type. The hash value is guaranteed to be zero if any of the subtypes are -/// an opaque type. Otherwise we try to mix them in as well as possible, but do -/// not look at the subtype's subtype's. -static unsigned getSubElementHash(const Type *Ty) { - unsigned HashVal = 0; - for (Type::subtype_iterator I = Ty->subtype_begin(), E = Ty->subtype_end(); - I != E; ++I) { - HashVal *= 32; - const Type *SubTy = I->get(); - HashVal += SubTy->getTypeID(); - switch (SubTy->getTypeID()) { - default: break; - case Type::OpaqueTyID: return 0; // Opaque -> hash = 0 no matter what. - case Type::IntegerTyID: - HashVal ^= (cast(SubTy)->getBitWidth() << 3); - break; - case Type::FunctionTyID: - HashVal ^= cast(SubTy)->getNumParams()*2 + - cast(SubTy)->isVarArg(); - break; - case Type::ArrayTyID: - HashVal ^= cast(SubTy)->getNumElements(); - break; - case Type::VectorTyID: - HashVal ^= cast(SubTy)->getNumElements(); - break; - case Type::StructTyID: - HashVal ^= cast(SubTy)->getNumElements(); - break; - case Type::PointerTyID: - HashVal ^= cast(SubTy)->getAddressSpace(); - break; - } - } - return HashVal ? HashVal : 1; // Do not return zero unless opaque subty. -} - -//===----------------------------------------------------------------------===// -// Derived Type Factory Functions -//===----------------------------------------------------------------------===// - -namespace llvm { -class TypeMapBase { -protected: - /// TypesByHash - Keep track of types by their structure hash value. Note - /// that we only keep track of types that have cycles through themselves in - /// this map. - /// - std::multimap TypesByHash; - -public: - ~TypeMapBase() { - // PATypeHolder won't destroy non-abstract types. - // We can't destroy them by simply iterating, because - // they may contain references to each-other. -#if 0 - for (std::multimap::iterator I - = TypesByHash.begin(), E = TypesByHash.end(); I != E; ++I) { - Type *Ty = const_cast(I->second.Ty); - I->second.destroy(); - // We can't invoke destroy or delete, because the type may - // contain references to already freed types. - // So we have to destruct the object the ugly way. - if (Ty) { - Ty->AbstractTypeUsers.clear(); - static_cast(Ty)->Type::~Type(); - operator delete(Ty); - } - } -#endif - } - - void RemoveFromTypesByHash(unsigned Hash, const Type *Ty) { - std::multimap::iterator I = - TypesByHash.lower_bound(Hash); - for (; I != TypesByHash.end() && I->first == Hash; ++I) { - if (I->second == Ty) { - TypesByHash.erase(I); - return; - } - } - - // This must be do to an opaque type that was resolved. Switch down to hash - // code of zero. - assert(Hash && "Didn't find type entry!"); - RemoveFromTypesByHash(0, Ty); - } - - /// TypeBecameConcrete - When Ty gets a notification that TheType just became - /// concrete, drop uses and make Ty non-abstract if we should. - void TypeBecameConcrete(DerivedType *Ty, const DerivedType *TheType) { - // If the element just became concrete, remove 'ty' from the abstract - // type user list for the type. Do this for as many times as Ty uses - // OldType. - for (Type::subtype_iterator I = Ty->subtype_begin(), E = Ty->subtype_end(); - I != E; ++I) - if (I->get() == TheType) - TheType->removeAbstractTypeUser(Ty); - - // If the type is currently thought to be abstract, rescan all of our - // subtypes to see if the type has just become concrete! Note that this - // may send out notifications to AbstractTypeUsers that types become - // concrete. - if (Ty->isAbstract()) - Ty->PromoteAbstractToConcrete(); - } -}; -} - - -// TypeMap - Make sure that only one instance of a particular type may be -// created on any given run of the compiler... note that this involves updating -// our map if an abstract type gets refined somehow. -// -namespace llvm { -template -class TypeMap : public TypeMapBase { - std::map Map; -public: - typedef typename std::map::iterator iterator; - ~TypeMap() { print("ON EXIT"); } - - inline TypeClass *get(const ValType &V) { - iterator I = Map.find(V); - return I != Map.end() ? cast((Type*)I->second.get()) : 0; - } - - inline void add(const ValType &V, TypeClass *Ty) { - Map.insert(std::make_pair(V, Ty)); - - // If this type has a cycle, remember it. - TypesByHash.insert(std::make_pair(ValType::hashTypeStructure(Ty), Ty)); - print("add"); - } - - /// RefineAbstractType - This method is called after we have merged a type - /// with another one. We must now either merge the type away with - /// some other type or reinstall it in the map with it's new configuration. - void RefineAbstractType(TypeClass *Ty, const DerivedType *OldType, - const Type *NewType) { -#ifdef DEBUG_MERGE_TYPES - DOUT << "RefineAbstractType(" << (void*)OldType << "[" << *OldType - << "], " << (void*)NewType << " [" << *NewType << "])\n"; -#endif - - // Otherwise, we are changing one subelement type into another. Clearly the - // OldType must have been abstract, making us abstract. - assert(Ty->isAbstract() && "Refining a non-abstract type!"); - assert(OldType != NewType); - - // Make a temporary type holder for the type so that it doesn't disappear on - // us when we erase the entry from the map. - PATypeHolder TyHolder = Ty; - - // The old record is now out-of-date, because one of the children has been - // updated. Remove the obsolete entry from the map. - unsigned NumErased = Map.erase(ValType::get(Ty)); - assert(NumErased && "Element not found!"); NumErased = NumErased; - - // Remember the structural hash for the type before we start hacking on it, - // in case we need it later. - unsigned OldTypeHash = ValType::hashTypeStructure(Ty); - - // Find the type element we are refining... and change it now! - for (unsigned i = 0, e = Ty->getNumContainedTypes(); i != e; ++i) - if (Ty->ContainedTys[i] == OldType) - Ty->ContainedTys[i] = NewType; - unsigned NewTypeHash = ValType::hashTypeStructure(Ty); - - // If there are no cycles going through this node, we can do a simple, - // efficient lookup in the map, instead of an inefficient nasty linear - // lookup. - if (!TypeHasCycleThroughItself(Ty)) { - typename std::map::iterator I; - bool Inserted; - - tie(I, Inserted) = Map.insert(std::make_pair(ValType::get(Ty), Ty)); - if (!Inserted) { - // Refined to a different type altogether? - RemoveFromTypesByHash(OldTypeHash, Ty); - - // We already have this type in the table. Get rid of the newly refined - // type. - TypeClass *NewTy = cast((Type*)I->second.get()); - Ty->unlockedRefineAbstractTypeTo(NewTy); - return; - } - } else { - // Now we check to see if there is an existing entry in the table which is - // structurally identical to the newly refined type. If so, this type - // gets refined to the pre-existing type. - // - std::multimap::iterator I, E, Entry; - tie(I, E) = TypesByHash.equal_range(NewTypeHash); - Entry = E; - for (; I != E; ++I) { - if (I->second == Ty) { - // Remember the position of the old type if we see it in our scan. - Entry = I; - } else { - if (TypesEqual(Ty, I->second)) { - TypeClass *NewTy = cast((Type*)I->second.get()); - - // Remove the old entry form TypesByHash. If the hash values differ - // now, remove it from the old place. Otherwise, continue scanning - // withing this hashcode to reduce work. - if (NewTypeHash != OldTypeHash) { - RemoveFromTypesByHash(OldTypeHash, Ty); - } else { - if (Entry == E) { - // Find the location of Ty in the TypesByHash structure if we - // haven't seen it already. - while (I->second != Ty) { - ++I; - assert(I != E && "Structure doesn't contain type??"); - } - Entry = I; - } - TypesByHash.erase(Entry); - } - Ty->unlockedRefineAbstractTypeTo(NewTy); - return; - } - } - } - - // If there is no existing type of the same structure, we reinsert an - // updated record into the map. - Map.insert(std::make_pair(ValType::get(Ty), Ty)); - } - - // If the hash codes differ, update TypesByHash - if (NewTypeHash != OldTypeHash) { - RemoveFromTypesByHash(OldTypeHash, Ty); - TypesByHash.insert(std::make_pair(NewTypeHash, Ty)); - } - - // If the type is currently thought to be abstract, rescan all of our - // subtypes to see if the type has just become concrete! Note that this - // may send out notifications to AbstractTypeUsers that types become - // concrete. - if (Ty->isAbstract()) - Ty->PromoteAbstractToConcrete(); - } - - void print(const char *Arg) const { -#ifdef DEBUG_MERGE_TYPES - DOUT << "TypeMap<>::" << Arg << " table contents:\n"; - unsigned i = 0; - for (typename std::map::const_iterator I - = Map.begin(), E = Map.end(); I != E; ++I) - DOUT << " " << (++i) << ". " << (void*)I->second.get() << " " - << *I->second.get() << "\n"; -#endif - } - - void dump() const { print("dump output"); } -}; -} - - //===----------------------------------------------------------------------===// // Function Type Factory and Value Class... // -//===----------------------------------------------------------------------===// -// Integer Type Factory... -// -namespace llvm { -class IntegerValType { - uint32_t bits; -public: - IntegerValType(uint16_t numbits) : bits(numbits) {} - - static IntegerValType get(const IntegerType *Ty) { - return IntegerValType(Ty->getBitWidth()); - } - - static unsigned hashTypeStructure(const IntegerType *Ty) { - return (unsigned)Ty->getBitWidth(); - } - - inline bool operator<(const IntegerValType &IVT) const { - return bits < IVT.bits; - } -}; -} - static ManagedStatic > IntegerTypes; const IntegerType *IntegerType::get(unsigned NumBits) { @@ -1030,36 +748,6 @@ return APInt::getAllOnesValue(getBitWidth()); } -// FunctionValType - Define a class to hold the key that goes into the TypeMap -// -namespace llvm { -class FunctionValType { - const Type *RetTy; - std::vector ArgTypes; - bool isVarArg; -public: - FunctionValType(const Type *ret, const std::vector &args, - bool isVA) : RetTy(ret), ArgTypes(args), isVarArg(isVA) {} - - static FunctionValType get(const FunctionType *FT); - - static unsigned hashTypeStructure(const FunctionType *FT) { - unsigned Result = FT->getNumParams()*2 + FT->isVarArg(); - return Result; - } - - inline bool operator<(const FunctionValType &MTV) const { - if (RetTy < MTV.RetTy) return true; - if (RetTy > MTV.RetTy) return false; - if (isVarArg < MTV.isVarArg) return true; - if (isVarArg > MTV.isVarArg) return false; - if (ArgTypes < MTV.ArgTypes) return true; - if (ArgTypes > MTV.ArgTypes) return false; - return false; - } -}; -} - // Define the actual map itself now... static ManagedStatic > FunctionTypes; @@ -1096,46 +784,21 @@ return FT; } -//===----------------------------------------------------------------------===// -// Array Type Factory... -// -namespace llvm { -class ArrayValType { - const Type *ValTy; - uint64_t Size; -public: - ArrayValType(const Type *val, uint64_t sz) : ValTy(val), Size(sz) {} - - static ArrayValType get(const ArrayType *AT) { - return ArrayValType(AT->getElementType(), AT->getNumElements()); - } - - static unsigned hashTypeStructure(const ArrayType *AT) { - return (unsigned)AT->getNumElements(); - } - - inline bool operator<(const ArrayValType &MTV) const { - if (Size < MTV.Size) return true; - return Size == MTV.Size && ValTy < MTV.ValTy; - } -}; -} - -static ManagedStatic > ArrayTypes; - ArrayType *ArrayType::get(const Type *ElementType, uint64_t NumElements) { assert(ElementType && "Can't get array of types!"); assert(isValidElementType(ElementType) && "Invalid type for array element!"); ArrayValType AVT(ElementType, NumElements); ArrayType *AT = 0; + + LLVMContextImpl *pImpl = ElementType->getContext().pImpl; sys::SmartScopedLock L(*TypeMapLock); - AT = ArrayTypes->get(AVT); + AT = pImpl->ArrayTypes.get(AVT); if (!AT) { // Value not found. Derive a new type! - ArrayTypes->add(AVT, AT = new ArrayType(ElementType, NumElements)); + pImpl->ArrayTypes.add(AVT, AT = new ArrayType(ElementType, NumElements)); } #ifdef DEBUG_MERGE_TYPES DOUT << "Derived new type: " << *AT << "\n"; @@ -1155,32 +818,6 @@ return true; } - -//===----------------------------------------------------------------------===// -// Vector Type Factory... -// -namespace llvm { -class VectorValType { - const Type *ValTy; - unsigned Size; -public: - VectorValType(const Type *val, int sz) : ValTy(val), Size(sz) {} - - static VectorValType get(const VectorType *PT) { - return VectorValType(PT->getElementType(), PT->getNumElements()); - } - - static unsigned hashTypeStructure(const VectorType *PT) { - return PT->getNumElements(); - } - - inline bool operator<(const VectorValType &MTV) const { - if (Size < MTV.Size) return true; - return Size == MTV.Size && ValTy < MTV.ValTy; - } -}; -} - static ManagedStatic > VectorTypes; VectorType *VectorType::get(const Type *ElementType, unsigned NumElements) { @@ -1213,37 +850,6 @@ // Struct Type Factory... // -namespace llvm { -// StructValType - Define a class to hold the key that goes into the TypeMap -// -class StructValType { - std::vector ElTypes; - bool packed; -public: - StructValType(const std::vector &args, bool isPacked) - : ElTypes(args), packed(isPacked) {} - - static StructValType get(const StructType *ST) { - std::vector ElTypes; - ElTypes.reserve(ST->getNumElements()); - for (unsigned i = 0, e = ST->getNumElements(); i != e; ++i) - ElTypes.push_back(ST->getElementType(i)); - - return StructValType(ElTypes, ST->isPacked()); - } - - static unsigned hashTypeStructure(const StructType *ST) { - return ST->getNumElements(); - } - - inline bool operator<(const StructValType &STV) const { - if (ElTypes < STV.ElTypes) return true; - else if (ElTypes > STV.ElTypes) return false; - else return (int)packed < (int)STV.packed; - } -}; -} - static ManagedStatic > StructTypes; StructType *StructType::get(const std::vector &ETypes, @@ -1295,30 +901,6 @@ // Pointer Type Factory... // -// PointerValType - Define a class to hold the key that goes into the TypeMap -// -namespace llvm { -class PointerValType { - const Type *ValTy; - unsigned AddressSpace; -public: - PointerValType(const Type *val, unsigned as) : ValTy(val), AddressSpace(as) {} - - static PointerValType get(const PointerType *PT) { - return PointerValType(PT->getElementType(), PT->getAddressSpace()); - } - - static unsigned hashTypeStructure(const PointerType *PT) { - return getSubElementHash(PT); - } - - bool operator<(const PointerValType &MTV) const { - if (AddressSpace < MTV.AddressSpace) return true; - return AddressSpace == MTV.AddressSpace && ValTy < MTV.ValTy; - } -}; -} - static ManagedStatic > PointerTypes; PointerType *PointerType::get(const Type *ValueType, unsigned AddressSpace) { @@ -1533,11 +1115,13 @@ // void ArrayType::refineAbstractType(const DerivedType *OldType, const Type *NewType) { - ArrayTypes->RefineAbstractType(this, OldType, NewType); + LLVMContextImpl *pImpl = OldType->getContext().pImpl; + pImpl->ArrayTypes.RefineAbstractType(this, OldType, NewType); } void ArrayType::typeBecameConcrete(const DerivedType *AbsTy) { - ArrayTypes->TypeBecameConcrete(this, AbsTy); + LLVMContextImpl *pImpl = AbsTy->getContext().pImpl; + pImpl->ArrayTypes.TypeBecameConcrete(this, AbsTy); } // refineAbstractType - Called when a contained type is found to be more Added: llvm/trunk/lib/VMCore/TypesContext.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/TypesContext.h?rev=78122&view=auto ============================================================================== --- llvm/trunk/lib/VMCore/TypesContext.h (added) +++ llvm/trunk/lib/VMCore/TypesContext.h Tue Aug 4 18:33:01 2009 @@ -0,0 +1,426 @@ +//===-------------------- TypesContext.h - Implementation ------*- C++ -*--===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines various helper methods and classes used by +// LLVMContextImpl for creating and managing types. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_TYPESCONTEXT_H +#define LLVM_TYPESCONTEXT_H + +#include "llvm/ADT/STLExtras.h" +#include + + +//===----------------------------------------------------------------------===// +// Derived Type Factory Functions +//===----------------------------------------------------------------------===// +namespace llvm { + +/// getSubElementHash - Generate a hash value for all of the SubType's of this +/// type. The hash value is guaranteed to be zero if any of the subtypes are +/// an opaque type. Otherwise we try to mix them in as well as possible, but do +/// not look at the subtype's subtype's. +static unsigned getSubElementHash(const Type *Ty) { + unsigned HashVal = 0; + for (Type::subtype_iterator I = Ty->subtype_begin(), E = Ty->subtype_end(); + I != E; ++I) { + HashVal *= 32; + const Type *SubTy = I->get(); + HashVal += SubTy->getTypeID(); + switch (SubTy->getTypeID()) { + default: break; + case Type::OpaqueTyID: return 0; // Opaque -> hash = 0 no matter what. + case Type::IntegerTyID: + HashVal ^= (cast(SubTy)->getBitWidth() << 3); + break; + case Type::FunctionTyID: + HashVal ^= cast(SubTy)->getNumParams()*2 + + cast(SubTy)->isVarArg(); + break; + case Type::ArrayTyID: + HashVal ^= cast(SubTy)->getNumElements(); + break; + case Type::VectorTyID: + HashVal ^= cast(SubTy)->getNumElements(); + break; + case Type::StructTyID: + HashVal ^= cast(SubTy)->getNumElements(); + break; + case Type::PointerTyID: + HashVal ^= cast(SubTy)->getAddressSpace(); + break; + } + } + return HashVal ? HashVal : 1; // Do not return zero unless opaque subty. +} + +//===----------------------------------------------------------------------===// +// Integer Type Factory... +// +class IntegerValType { + uint32_t bits; +public: + IntegerValType(uint16_t numbits) : bits(numbits) {} + + static IntegerValType get(const IntegerType *Ty) { + return IntegerValType(Ty->getBitWidth()); + } + + static unsigned hashTypeStructure(const IntegerType *Ty) { + return (unsigned)Ty->getBitWidth(); + } + + inline bool operator<(const IntegerValType &IVT) const { + return bits < IVT.bits; + } +}; + +// PointerValType - Define a class to hold the key that goes into the TypeMap +// +class PointerValType { + const Type *ValTy; + unsigned AddressSpace; +public: + PointerValType(const Type *val, unsigned as) : ValTy(val), AddressSpace(as) {} + + static PointerValType get(const PointerType *PT) { + return PointerValType(PT->getElementType(), PT->getAddressSpace()); + } + + static unsigned hashTypeStructure(const PointerType *PT) { + return getSubElementHash(PT); + } + + bool operator<(const PointerValType &MTV) const { + if (AddressSpace < MTV.AddressSpace) return true; + return AddressSpace == MTV.AddressSpace && ValTy < MTV.ValTy; + } +}; + +//===----------------------------------------------------------------------===// +// Array Type Factory... +// +class ArrayValType { + const Type *ValTy; + uint64_t Size; +public: + ArrayValType(const Type *val, uint64_t sz) : ValTy(val), Size(sz) {} + + static ArrayValType get(const ArrayType *AT) { + return ArrayValType(AT->getElementType(), AT->getNumElements()); + } + + static unsigned hashTypeStructure(const ArrayType *AT) { + return (unsigned)AT->getNumElements(); + } + + inline bool operator<(const ArrayValType &MTV) const { + if (Size < MTV.Size) return true; + return Size == MTV.Size && ValTy < MTV.ValTy; + } +}; + +//===----------------------------------------------------------------------===// +// Vector Type Factory... +// +class VectorValType { + const Type *ValTy; + unsigned Size; +public: + VectorValType(const Type *val, int sz) : ValTy(val), Size(sz) {} + + static VectorValType get(const VectorType *PT) { + return VectorValType(PT->getElementType(), PT->getNumElements()); + } + + static unsigned hashTypeStructure(const VectorType *PT) { + return PT->getNumElements(); + } + + inline bool operator<(const VectorValType &MTV) const { + if (Size < MTV.Size) return true; + return Size == MTV.Size && ValTy < MTV.ValTy; + } +}; + +// StructValType - Define a class to hold the key that goes into the TypeMap +// +class StructValType { + std::vector ElTypes; + bool packed; +public: + StructValType(const std::vector &args, bool isPacked) + : ElTypes(args), packed(isPacked) {} + + static StructValType get(const StructType *ST) { + std::vector ElTypes; + ElTypes.reserve(ST->getNumElements()); + for (unsigned i = 0, e = ST->getNumElements(); i != e; ++i) + ElTypes.push_back(ST->getElementType(i)); + + return StructValType(ElTypes, ST->isPacked()); + } + + static unsigned hashTypeStructure(const StructType *ST) { + return ST->getNumElements(); + } + + inline bool operator<(const StructValType &STV) const { + if (ElTypes < STV.ElTypes) return true; + else if (ElTypes > STV.ElTypes) return false; + else return (int)packed < (int)STV.packed; + } +}; + +// FunctionValType - Define a class to hold the key that goes into the TypeMap +// +class FunctionValType { + const Type *RetTy; + std::vector ArgTypes; + bool isVarArg; +public: + FunctionValType(const Type *ret, const std::vector &args, + bool isVA) : RetTy(ret), ArgTypes(args), isVarArg(isVA) {} + + static FunctionValType get(const FunctionType *FT); + + static unsigned hashTypeStructure(const FunctionType *FT) { + unsigned Result = FT->getNumParams()*2 + FT->isVarArg(); + return Result; + } + + inline bool operator<(const FunctionValType &MTV) const { + if (RetTy < MTV.RetTy) return true; + if (RetTy > MTV.RetTy) return false; + if (isVarArg < MTV.isVarArg) return true; + if (isVarArg > MTV.isVarArg) return false; + if (ArgTypes < MTV.ArgTypes) return true; + if (ArgTypes > MTV.ArgTypes) return false; + return false; + } +}; + +class TypeMapBase { +protected: + /// TypesByHash - Keep track of types by their structure hash value. Note + /// that we only keep track of types that have cycles through themselves in + /// this map. + /// + std::multimap TypesByHash; + +public: + ~TypeMapBase() { + // PATypeHolder won't destroy non-abstract types. + // We can't destroy them by simply iterating, because + // they may contain references to each-other. +#if 0 + for (std::multimap::iterator I + = TypesByHash.begin(), E = TypesByHash.end(); I != E; ++I) { + Type *Ty = const_cast(I->second.Ty); + I->second.destroy(); + // We can't invoke destroy or delete, because the type may + // contain references to already freed types. + // So we have to destruct the object the ugly way. + if (Ty) { + Ty->AbstractTypeUsers.clear(); + static_cast(Ty)->Type::~Type(); + operator delete(Ty); + } + } +#endif + } + + void RemoveFromTypesByHash(unsigned Hash, const Type *Ty) { + std::multimap::iterator I = + TypesByHash.lower_bound(Hash); + for (; I != TypesByHash.end() && I->first == Hash; ++I) { + if (I->second == Ty) { + TypesByHash.erase(I); + return; + } + } + + // This must be do to an opaque type that was resolved. Switch down to hash + // code of zero. + assert(Hash && "Didn't find type entry!"); + RemoveFromTypesByHash(0, Ty); + } + + /// TypeBecameConcrete - When Ty gets a notification that TheType just became + /// concrete, drop uses and make Ty non-abstract if we should. + void TypeBecameConcrete(DerivedType *Ty, const DerivedType *TheType) { + // If the element just became concrete, remove 'ty' from the abstract + // type user list for the type. Do this for as many times as Ty uses + // OldType. + for (Type::subtype_iterator I = Ty->subtype_begin(), E = Ty->subtype_end(); + I != E; ++I) + if (I->get() == TheType) + TheType->removeAbstractTypeUser(Ty); + + // If the type is currently thought to be abstract, rescan all of our + // subtypes to see if the type has just become concrete! Note that this + // may send out notifications to AbstractTypeUsers that types become + // concrete. + if (Ty->isAbstract()) + Ty->PromoteAbstractToConcrete(); + } +}; + +// TypeMap - Make sure that only one instance of a particular type may be +// created on any given run of the compiler... note that this involves updating +// our map if an abstract type gets refined somehow. +// +template +class TypeMap : public TypeMapBase { + std::map Map; +public: + typedef typename std::map::iterator iterator; + ~TypeMap() { print("ON EXIT"); } + + inline TypeClass *get(const ValType &V) { + iterator I = Map.find(V); + return I != Map.end() ? cast((Type*)I->second.get()) : 0; + } + + inline void add(const ValType &V, TypeClass *Ty) { + Map.insert(std::make_pair(V, Ty)); + + // If this type has a cycle, remember it. + TypesByHash.insert(std::make_pair(ValType::hashTypeStructure(Ty), Ty)); + print("add"); + } + + /// RefineAbstractType - This method is called after we have merged a type + /// with another one. We must now either merge the type away with + /// some other type or reinstall it in the map with it's new configuration. + void RefineAbstractType(TypeClass *Ty, const DerivedType *OldType, + const Type *NewType) { +#ifdef DEBUG_MERGE_TYPES + DOUT << "RefineAbstractType(" << (void*)OldType << "[" << *OldType + << "], " << (void*)NewType << " [" << *NewType << "])\n"; +#endif + + // Otherwise, we are changing one subelement type into another. Clearly the + // OldType must have been abstract, making us abstract. + assert(Ty->isAbstract() && "Refining a non-abstract type!"); + assert(OldType != NewType); + + // Make a temporary type holder for the type so that it doesn't disappear on + // us when we erase the entry from the map. + PATypeHolder TyHolder = Ty; + + // The old record is now out-of-date, because one of the children has been + // updated. Remove the obsolete entry from the map. + unsigned NumErased = Map.erase(ValType::get(Ty)); + assert(NumErased && "Element not found!"); NumErased = NumErased; + + // Remember the structural hash for the type before we start hacking on it, + // in case we need it later. + unsigned OldTypeHash = ValType::hashTypeStructure(Ty); + + // Find the type element we are refining... and change it now! + for (unsigned i = 0, e = Ty->getNumContainedTypes(); i != e; ++i) + if (Ty->ContainedTys[i] == OldType) + Ty->ContainedTys[i] = NewType; + unsigned NewTypeHash = ValType::hashTypeStructure(Ty); + + // If there are no cycles going through this node, we can do a simple, + // efficient lookup in the map, instead of an inefficient nasty linear + // lookup. + if (!TypeHasCycleThroughItself(Ty)) { + typename std::map::iterator I; + bool Inserted; + + tie(I, Inserted) = Map.insert(std::make_pair(ValType::get(Ty), Ty)); + if (!Inserted) { + // Refined to a different type altogether? + RemoveFromTypesByHash(OldTypeHash, Ty); + + // We already have this type in the table. Get rid of the newly refined + // type. + TypeClass *NewTy = cast((Type*)I->second.get()); + Ty->unlockedRefineAbstractTypeTo(NewTy); + return; + } + } else { + // Now we check to see if there is an existing entry in the table which is + // structurally identical to the newly refined type. If so, this type + // gets refined to the pre-existing type. + // + std::multimap::iterator I, E, Entry; + tie(I, E) = TypesByHash.equal_range(NewTypeHash); + Entry = E; + for (; I != E; ++I) { + if (I->second == Ty) { + // Remember the position of the old type if we see it in our scan. + Entry = I; + } else { + if (TypesEqual(Ty, I->second)) { + TypeClass *NewTy = cast((Type*)I->second.get()); + + // Remove the old entry form TypesByHash. If the hash values differ + // now, remove it from the old place. Otherwise, continue scanning + // withing this hashcode to reduce work. + if (NewTypeHash != OldTypeHash) { + RemoveFromTypesByHash(OldTypeHash, Ty); + } else { + if (Entry == E) { + // Find the location of Ty in the TypesByHash structure if we + // haven't seen it already. + while (I->second != Ty) { + ++I; + assert(I != E && "Structure doesn't contain type??"); + } + Entry = I; + } + TypesByHash.erase(Entry); + } + Ty->unlockedRefineAbstractTypeTo(NewTy); + return; + } + } + } + + // If there is no existing type of the same structure, we reinsert an + // updated record into the map. + Map.insert(std::make_pair(ValType::get(Ty), Ty)); + } + + // If the hash codes differ, update TypesByHash + if (NewTypeHash != OldTypeHash) { + RemoveFromTypesByHash(OldTypeHash, Ty); + TypesByHash.insert(std::make_pair(NewTypeHash, Ty)); + } + + // If the type is currently thought to be abstract, rescan all of our + // subtypes to see if the type has just become concrete! Note that this + // may send out notifications to AbstractTypeUsers that types become + // concrete. + if (Ty->isAbstract()) + Ty->PromoteAbstractToConcrete(); + } + + void print(const char *Arg) const { +#ifdef DEBUG_MERGE_TYPES + DOUT << "TypeMap<>::" << Arg << " table contents:\n"; + unsigned i = 0; + for (typename std::map::const_iterator I + = Map.begin(), E = Map.end(); I != E; ++I) + DOUT << " " << (++i) << ". " << (void*)I->second.get() << " " + << *I->second.get() << "\n"; +#endif + } + + void dump() const { print("dump output"); } +}; +} + +#endif From bob.wilson at apple.com Tue Aug 4 18:37:07 2009 From: bob.wilson at apple.com (Bob Wilson) Date: Tue, 04 Aug 2009 23:37:07 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r78123 - /llvm-gcc-4.2/trunk/gcc/config/arm/llvm-arm.cpp Message-ID: <200908042337.n74Nb8VR025991@zion.cs.uiuc.edu> Author: bwilson Date: Tue Aug 4 18:36:57 2009 New Revision: 78123 URL: http://llvm.org/viewvc/llvm-project?rev=78123&view=rev Log: Initialize to avoid gcc warning. Modified: llvm-gcc-4.2/trunk/gcc/config/arm/llvm-arm.cpp Modified: llvm-gcc-4.2/trunk/gcc/config/arm/llvm-arm.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/arm/llvm-arm.cpp?rev=78123&r1=78122&r2=78123&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/arm/llvm-arm.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/config/arm/llvm-arm.cpp Tue Aug 4 18:36:57 2009 @@ -2045,7 +2045,7 @@ case NEON_BUILTIN_vld4_dup: { const VectorType *VTy = GetVldstType(exp, insn_data[icode].operand[0].mode); - unsigned NumVecs; + unsigned NumVecs = 0; switch (neon_code) { case NEON_BUILTIN_vld1_dup: NumVecs = 1; break; case NEON_BUILTIN_vld2_dup: NumVecs = 2; break; From bob.wilson at apple.com Tue Aug 4 18:43:04 2009 From: bob.wilson at apple.com (Bob Wilson) Date: Tue, 04 Aug 2009 23:43:04 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r78124 - /llvm-gcc-4.2/trunk/gcc/config/arm/llvm-arm.cpp Message-ID: <200908042343.n74Nh6dD026201@zion.cs.uiuc.edu> Author: bwilson Date: Tue Aug 4 18:42:46 2009 New Revision: 78124 URL: http://llvm.org/viewvc/llvm-project?rev=78124&view=rev Log: More initialization to avoid warnings. Modified: llvm-gcc-4.2/trunk/gcc/config/arm/llvm-arm.cpp Modified: llvm-gcc-4.2/trunk/gcc/config/arm/llvm-arm.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/arm/llvm-arm.cpp?rev=78124&r1=78123&r2=78124&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/arm/llvm-arm.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/config/arm/llvm-arm.cpp Tue Aug 4 18:42:46 2009 @@ -269,7 +269,7 @@ std::vector &Ops) { neon_datatype datatype = neon_datatype_unspecified; bool isRounded = false; - Intrinsic::ID intID; + Intrinsic::ID intID = Intrinsic::not_intrinsic; Function *intFn; const Type* intOpTypes[2]; @@ -2013,7 +2013,7 @@ case NEON_BUILTIN_vld4_lane: { const VectorType *VTy = GetVldstType(exp, insn_data[icode].operand[0].mode); - unsigned LaneVal, NumVecs; + unsigned LaneVal, NumVecs = 0; switch (neon_code) { case NEON_BUILTIN_vld1_lane: NumVecs = 1; break; case NEON_BUILTIN_vld2_lane: NumVecs = 2; break; @@ -2140,7 +2140,7 @@ case NEON_BUILTIN_vst4_lane: { const VectorType *VTy = GetVldstType(exp, insn_data[icode].operand[1].mode); - unsigned LaneVal, NumVecs; + unsigned LaneVal, NumVecs = 0; switch (neon_code) { case NEON_BUILTIN_vst1_lane: NumVecs = 1; break; case NEON_BUILTIN_vst2_lane: NumVecs = 2; break; From evan.cheng at apple.com Tue Aug 4 18:47:57 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 04 Aug 2009 23:47:57 -0000 Subject: [llvm-commits] [llvm] r78126 - in /llvm/trunk: lib/Target/ARM/ARMInstrFormats.td lib/Target/ARM/ARMInstrThumb.td lib/Target/ARM/ARMInstrThumb2.td test/CodeGen/Thumb2/load-global.ll test/CodeGen/Thumb2/pic-load.ll Message-ID: <200908042348.n74Nm14v026344@zion.cs.uiuc.edu> Author: evancheng Date: Tue Aug 4 18:47:55 2009 New Revision: 78126 URL: http://llvm.org/viewvc/llvm-project?rev=78126&view=rev Log: Fix part 1 of pr4682. PICADD is a 16-bit instruction even in thumb2 mode. Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td llvm/trunk/lib/Target/ARM/ARMInstrThumb.td llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td llvm/trunk/test/CodeGen/Thumb2/load-global.ll llvm/trunk/test/CodeGen/Thumb2/pic-load.ll Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=78126&r1=78125&r2=78126&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Tue Aug 4 18:47:55 2009 @@ -808,6 +808,10 @@ class TI pattern> : ThumbI; +// Two-address instructions +class TIt pattern> + : ThumbI; + // tBL, tBX instructions class TIx2 pattern> : ThumbI; Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb.td?rev=78126&r1=78125&r2=78126&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb.td Tue Aug 4 18:47:55 2009 @@ -127,10 +127,11 @@ [(ARMcallseq_start imm:$amt)]>, Requires<[IsThumb1Only]>; } +// For both thumb1 and thumb2. let isNotDuplicable = 1 in -def tPICADD : T1It<(outs tGPR:$dst), (ins tGPR:$lhs, pclabel:$cp), - "$cp:\n\tadd $dst, pc", - [(set tGPR:$dst, (ARMpic_add tGPR:$lhs, imm:$cp))]>; +def tPICADD : TIt<(outs GPR:$dst), (ins GPR:$lhs, pclabel:$cp), + "$cp:\n\tadd $dst, pc", + [(set GPR:$dst, (ARMpic_add GPR:$lhs, imm:$cp))]>; // PC relative add. def tADDrPCi : T1I<(outs tGPR:$dst), (ins i32imm:$rhs), Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=78126&r1=78125&r2=78126&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Tue Aug 4 18:47:55 2009 @@ -422,12 +422,6 @@ // Miscellaneous Instructions. // -let isNotDuplicable = 1 in -def t2PICADD : T2XI<(outs GPR:$dst), (ins GPR:$lhs, pclabel:$cp), - "$cp:\n\tadd.w $dst, $lhs, pc", - [(set GPR:$dst, (ARMpic_add GPR:$lhs, imm:$cp))]>; - - // LEApcrel - Load a pc-relative address into a register without offending the // assembler. def t2LEApcrel : T2XI<(outs GPR:$dst), (ins i32imm:$label, pred:$p), Modified: llvm/trunk/test/CodeGen/Thumb2/load-global.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/load-global.ll?rev=78126&r1=78125&r2=78126&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/load-global.ll (original) +++ llvm/trunk/test/CodeGen/Thumb2/load-global.ll Tue Aug 4 18:47:55 2009 @@ -17,7 +17,7 @@ ; DYNAMIC: .long L_G$non_lazy_ptr ; PIC: _test1 -; PIC: add.w r0, r0, pc +; PIC: add r0, pc ; PIC: .long L_G$non_lazy_ptr-(LPC0+4) ; LINUX: test1 Modified: llvm/trunk/test/CodeGen/Thumb2/pic-load.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/pic-load.ll?rev=78126&r1=78125&r2=78126&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/pic-load.ll (original) +++ llvm/trunk/test/CodeGen/Thumb2/pic-load.ll Tue Aug 4 18:47:55 2009 @@ -8,7 +8,7 @@ define hidden arm_apcscc i32 @atexit(void ()* %func) nounwind { entry: ; CHECK: atexit: -; CHECK: add.w r0, r0, pc +; CHECK: add r0, pc %r = alloca %struct.one_atexit_routine, align 4 ; <%struct.one_atexit_routine*> [#uses=3] %0 = getelementptr %struct.one_atexit_routine* %r, i32 0, i32 0, i32 0 ; [#uses=1] store void ()* %func, void ()** %0, align 4 From resistor at mac.com Tue Aug 4 18:47:57 2009 From: resistor at mac.com (Owen Anderson) Date: Tue, 04 Aug 2009 23:47:57 -0000 Subject: [llvm-commits] [llvm] r78125 - in /llvm/trunk/lib/VMCore: LLVMContextImpl.h Type.cpp Message-ID: <200908042348.n74Nm1Gk026342@zion.cs.uiuc.edu> Author: resistor Date: Tue Aug 4 18:47:44 2009 New Revision: 78125 URL: http://llvm.org/viewvc/llvm-project?rev=78125&view=rev Log: Privatize the VectorType uniquing. Modified: llvm/trunk/lib/VMCore/LLVMContextImpl.h llvm/trunk/lib/VMCore/Type.cpp Modified: llvm/trunk/lib/VMCore/LLVMContextImpl.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/LLVMContextImpl.h?rev=78125&r1=78124&r2=78125&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/LLVMContextImpl.h (original) +++ llvm/trunk/lib/VMCore/LLVMContextImpl.h Tue Aug 4 18:47:44 2009 @@ -129,6 +129,7 @@ ConstantInt *TheFalseVal; TypeMap ArrayTypes; + TypeMap VectorTypes; LLVMContextImpl() : TheTrueVal(0), TheFalseVal(0) { } }; Modified: llvm/trunk/lib/VMCore/Type.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Type.cpp?rev=78125&r1=78124&r2=78125&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Type.cpp (original) +++ llvm/trunk/lib/VMCore/Type.cpp Tue Aug 4 18:47:44 2009 @@ -818,19 +818,19 @@ return true; } -static ManagedStatic > VectorTypes; - VectorType *VectorType::get(const Type *ElementType, unsigned NumElements) { assert(ElementType && "Can't get vector of types!"); VectorValType PVT(ElementType, NumElements); VectorType *PT = 0; + LLVMContextImpl *pImpl = ElementType->getContext().pImpl; + sys::SmartScopedLock L(*TypeMapLock); - PT = VectorTypes->get(PVT); + PT = pImpl->VectorTypes.get(PVT); if (!PT) { - VectorTypes->add(PVT, PT = new VectorType(ElementType, NumElements)); + pImpl->VectorTypes.add(PVT, PT = new VectorType(ElementType, NumElements)); } #ifdef DEBUG_MERGE_TYPES DOUT << "Derived new type: " << *PT << "\n"; @@ -1130,11 +1130,13 @@ // void VectorType::refineAbstractType(const DerivedType *OldType, const Type *NewType) { - VectorTypes->RefineAbstractType(this, OldType, NewType); + LLVMContextImpl *pImpl = OldType->getContext().pImpl; + pImpl->VectorTypes.RefineAbstractType(this, OldType, NewType); } void VectorType::typeBecameConcrete(const DerivedType *AbsTy) { - VectorTypes->TypeBecameConcrete(this, AbsTy); + LLVMContextImpl *pImpl = AbsTy->getContext().pImpl; + pImpl->VectorTypes.TypeBecameConcrete(this, AbsTy); } // refineAbstractType - Called when a contained type is found to be more From jyasskin at google.com Tue Aug 4 18:53:35 2009 From: jyasskin at google.com (Jeffrey Yasskin) Date: Tue, 04 Aug 2009 23:53:35 -0000 Subject: [llvm-commits] [llvm] r78127 - in /llvm/trunk: lib/ExecutionEngine/ExecutionEngine.cpp unittests/ExecutionEngine/ExecutionEngineTest.cpp unittests/ExecutionEngine/Makefile Message-ID: <200908042353.n74NrdXX026510@zion.cs.uiuc.edu> Author: jyasskin Date: Tue Aug 4 18:53:16 2009 New Revision: 78127 URL: http://llvm.org/viewvc/llvm-project?rev=78127&view=rev Log: Make ExecutionEngine::updateGlobalMapping(GV, NULL) properly remove GV's old address from the reverse mapping, and add a test that this works now. Added: llvm/trunk/unittests/ExecutionEngine/ExecutionEngineTest.cpp Modified: llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp llvm/trunk/unittests/ExecutionEngine/Makefile Modified: llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp?rev=78127&r1=78126&r2=78127&view=diff ============================================================================== --- llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp (original) +++ llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp Tue Aug 4 18:53:16 2009 @@ -179,7 +179,7 @@ } if (!state.getGlobalAddressReverseMap(locked).empty()) - state.getGlobalAddressReverseMap(locked).erase(Addr); + state.getGlobalAddressReverseMap(locked).erase(OldVal); return OldVal; } Added: llvm/trunk/unittests/ExecutionEngine/ExecutionEngineTest.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/ExecutionEngine/ExecutionEngineTest.cpp?rev=78127&view=auto ============================================================================== --- llvm/trunk/unittests/ExecutionEngine/ExecutionEngineTest.cpp (added) +++ llvm/trunk/unittests/ExecutionEngine/ExecutionEngineTest.cpp Tue Aug 4 18:53:16 2009 @@ -0,0 +1,92 @@ +//===- ExecutionEngineTest.cpp - Unit tests for ExecutionEngine -----------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/DerivedTypes.h" +#include "llvm/GlobalVariable.h" +#include "llvm/LLVMContext.h" +#include "llvm/Module.h" +#include "llvm/ADT/OwningPtr.h" +#include "llvm/ExecutionEngine/Interpreter.h" +#include "gtest/gtest.h" + +using namespace llvm; + +namespace { + +class ExecutionEngineTest : public testing::Test { +protected: + ExecutionEngineTest() + : M(new Module("
    ", getGlobalContext())), + Engine(EngineBuilder(M).create()) { + } + + virtual void SetUp() { + ASSERT_TRUE(Engine.get() != NULL); + } + + GlobalVariable *NewExtGlobal(const Type *T, const Twine &Name) { + return new GlobalVariable(*M, T, false, // Not constant. + GlobalValue::ExternalLinkage, NULL, Name); + } + + Module *const M; + const OwningPtr Engine; +}; + +TEST_F(ExecutionEngineTest, ForwardGlobalMapping) { + GlobalVariable *G1 = NewExtGlobal(Type::Int32Ty, "Global1"); + int32_t Mem1 = 3; + Engine->addGlobalMapping(G1, &Mem1); + EXPECT_EQ(&Mem1, Engine->getPointerToGlobalIfAvailable(G1)); + int32_t Mem2 = 4; + Engine->updateGlobalMapping(G1, &Mem2); + EXPECT_EQ(&Mem2, Engine->getPointerToGlobalIfAvailable(G1)); + Engine->updateGlobalMapping(G1, NULL); + EXPECT_EQ(NULL, Engine->getPointerToGlobalIfAvailable(G1)); + Engine->updateGlobalMapping(G1, &Mem2); + EXPECT_EQ(&Mem2, Engine->getPointerToGlobalIfAvailable(G1)); + + GlobalVariable *G2 = NewExtGlobal(Type::Int32Ty, "Global1"); + EXPECT_EQ(NULL, Engine->getPointerToGlobalIfAvailable(G2)) + << "The NULL return shouldn't depend on having called" + << " updateGlobalMapping(..., NULL)"; + // Check that update...() can be called before add...(). + Engine->updateGlobalMapping(G2, &Mem1); + EXPECT_EQ(&Mem1, Engine->getPointerToGlobalIfAvailable(G2)); + EXPECT_EQ(&Mem2, Engine->getPointerToGlobalIfAvailable(G1)) + << "A second mapping shouldn't affect the first."; +} + +TEST_F(ExecutionEngineTest, ReverseGlobalMapping) { + GlobalVariable *G1 = NewExtGlobal(Type::Int32Ty, "Global1"); + + int32_t Mem1 = 3; + Engine->addGlobalMapping(G1, &Mem1); + EXPECT_EQ(G1, Engine->getGlobalValueAtAddress(&Mem1)); + int32_t Mem2 = 4; + Engine->updateGlobalMapping(G1, &Mem2); + EXPECT_EQ(NULL, Engine->getGlobalValueAtAddress(&Mem1)); + EXPECT_EQ(G1, Engine->getGlobalValueAtAddress(&Mem2)); + + GlobalVariable *G2 = NewExtGlobal(Type::Int32Ty, "Global2"); + Engine->updateGlobalMapping(G2, &Mem1); + EXPECT_EQ(G2, Engine->getGlobalValueAtAddress(&Mem1)); + EXPECT_EQ(G1, Engine->getGlobalValueAtAddress(&Mem2)); + Engine->updateGlobalMapping(G1, NULL); + EXPECT_EQ(G2, Engine->getGlobalValueAtAddress(&Mem1)) + << "Removing one mapping doesn't affect a different one."; + EXPECT_EQ(NULL, Engine->getGlobalValueAtAddress(&Mem2)); + Engine->updateGlobalMapping(G2, &Mem2); + EXPECT_EQ(NULL, Engine->getGlobalValueAtAddress(&Mem1)); + EXPECT_EQ(G2, Engine->getGlobalValueAtAddress(&Mem2)) + << "Once a mapping is removed, we can point another GV at the" + << " now-free address."; +} + +} Modified: llvm/trunk/unittests/ExecutionEngine/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/ExecutionEngine/Makefile?rev=78127&r1=78126&r2=78127&view=diff ============================================================================== --- llvm/trunk/unittests/ExecutionEngine/Makefile (original) +++ llvm/trunk/unittests/ExecutionEngine/Makefile Tue Aug 4 18:53:16 2009 @@ -8,12 +8,11 @@ ##===----------------------------------------------------------------------===## LEVEL = ../.. +TESTNAME = ExecutionEngine +LINK_COMPONENTS := engine interpreter include $(LEVEL)/Makefile.config PARALLEL_DIRS = JIT -include $(LEVEL)/Makefile.common - -clean:: - $(Verb) $(RM) -f *Tests +include $(LLVM_SRC_ROOT)/unittests/Makefile.unittest From gohman at apple.com Tue Aug 4 19:09:29 2009 From: gohman at apple.com (Dan Gohman) Date: Wed, 05 Aug 2009 00:09:29 -0000 Subject: [llvm-commits] [llvm] r78128 - /llvm/trunk/lib/System/Unix/Program.inc Message-ID: <200908050009.n7509Xqv026967@zion.cs.uiuc.edu> Author: djg Date: Tue Aug 4 19:09:12 2009 New Revision: 78128 URL: http://llvm.org/viewvc/llvm-project?rev=78128&view=rev Log: Use _exit rather than exit in the child process after a failed exec. Add a comment explaining why. Modified: llvm/trunk/lib/System/Unix/Program.inc Modified: llvm/trunk/lib/System/Unix/Program.inc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Unix/Program.inc?rev=78128&r1=78127&r2=78128&view=diff ============================================================================== --- llvm/trunk/lib/System/Unix/Program.inc (original) +++ llvm/trunk/lib/System/Unix/Program.inc Tue Aug 4 19:09:12 2009 @@ -200,9 +200,13 @@ execve(path.c_str(), (char**)args, (char**)envp); else execv(path.c_str(), (char**)args); - // If the execve() failed, we should exit and let the parent pick up - // our non-zero exit status. - exit(errno == ENOENT ? 127 : 126); + // If the execve() failed, we should exit. Follow Unix protocol and + // return 127 if the executable was not found, and 126 otherwise. + // Use _exit rather than exit so that atexit functions and static + // object destructors cloned from the parent process aren't + // redundantly run, and so that any data buffered in stdio buffers + // cloned from the parent aren't redundantly written out. + _exit(errno == ENOENT ? 127 : 126); } // Parent process: Break out of the switch to do our processing. From bruno.cardoso at gmail.com Tue Aug 4 19:11:22 2009 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Wed, 05 Aug 2009 00:11:22 -0000 Subject: [llvm-commits] [llvm] r78129 - in /llvm/trunk: include/llvm/CodeGen/JITCodeEmitter.h include/llvm/CodeGen/MachineCodeEmitter.h include/llvm/CodeGen/ObjectCodeEmitter.h lib/Target/X86/X86CodeEmitter.cpp lib/Target/X86/X86JITInfo.cpp lib/Target/X86/X86Relocations.h Message-ID: <200908050011.n750BMKO027050@zion.cs.uiuc.edu> Author: bruno Date: Tue Aug 4 19:11:21 2009 New Revision: 78129 URL: http://llvm.org/viewvc/llvm-project?rev=78129&view=rev Log: 1) Proper emit displacements for x86, using absolute relocations where necessary for ELF to work. 2) RIP addressing: Use SIB bytes for absolute relocations where RegBase=0, IndexReg=0. 3) The JIT can get the real address of cstpools and jmptables during code emission, fix that for object code emission Modified: llvm/trunk/include/llvm/CodeGen/JITCodeEmitter.h llvm/trunk/include/llvm/CodeGen/MachineCodeEmitter.h llvm/trunk/include/llvm/CodeGen/ObjectCodeEmitter.h llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp llvm/trunk/lib/Target/X86/X86JITInfo.cpp llvm/trunk/lib/Target/X86/X86Relocations.h Modified: llvm/trunk/include/llvm/CodeGen/JITCodeEmitter.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/JITCodeEmitter.h?rev=78129&r1=78128&r2=78129&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/JITCodeEmitter.h (original) +++ llvm/trunk/include/llvm/CodeGen/JITCodeEmitter.h Tue Aug 4 19:11:21 2009 @@ -289,6 +289,13 @@ return CurBufferPtr-BufferBegin; } + /// earlyResolveAddresses - True if the code emitter can use symbol addresses + /// during code emission time. The JIT is capable of doing this because it + /// creates jump tables or constant pools in memory on the fly while the + /// object code emitters rely on a linker to have real addresses and should + /// use relocations instead. + bool earlyResolveAddresses() const { return true; } + /// addRelocation - Whenever a relocatable address is needed, it should be /// noted with this interface. virtual void addRelocation(const MachineRelocation &MR) = 0; Modified: llvm/trunk/include/llvm/CodeGen/MachineCodeEmitter.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineCodeEmitter.h?rev=78129&r1=78128&r2=78129&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/MachineCodeEmitter.h (original) +++ llvm/trunk/include/llvm/CodeGen/MachineCodeEmitter.h Tue Aug 4 19:11:21 2009 @@ -280,6 +280,13 @@ return CurBufferPtr-BufferBegin; } + /// earlyResolveAddresses - True if the code emitter can use symbol addresses + /// during code emission time. The JIT is capable of doing this because it + /// creates jump tables or constant pools in memory on the fly while the + /// object code emitters rely on a linker to have real addresses and should + /// use relocations instead. + virtual bool earlyResolveAddresses() const = 0; + /// addRelocation - Whenever a relocatable address is needed, it should be /// noted with this interface. virtual void addRelocation(const MachineRelocation &MR) = 0; Modified: llvm/trunk/include/llvm/CodeGen/ObjectCodeEmitter.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ObjectCodeEmitter.h?rev=78129&r1=78128&r2=78129&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/ObjectCodeEmitter.h (original) +++ llvm/trunk/include/llvm/CodeGen/ObjectCodeEmitter.h Tue Aug 4 19:11:21 2009 @@ -109,6 +109,13 @@ /// noted with this interface. void addRelocation(const MachineRelocation& relocation); + /// earlyResolveAddresses - True if the code emitter can use symbol addresses + /// during code emission time. The JIT is capable of doing this because it + /// creates jump tables or constant pools in memory on the fly while the + /// object code emitters rely on a linker to have real addresses and should + /// use relocations instead. + bool earlyResolveAddresses() const { return false; } + /// startFunction - This callback is invoked when the specified function is /// about to be code generated. This initializes the BufferBegin/End/Ptr /// fields. Modified: llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp?rev=78129&r1=78128&r2=78129&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp Tue Aug 4 19:11:21 2009 @@ -87,7 +87,7 @@ intptr_t PCAdj = 0); void emitDisplacementField(const MachineOperand *RelocOp, int DispVal, - intptr_t PCAdj = 0); + intptr_t Adj = 0, bool IsPCRel = true); void emitRegModRMByte(unsigned ModRMReg, unsigned RegOpcodeField); void emitRegModRMByte(unsigned RegOpcodeField); @@ -175,7 +175,7 @@ intptr_t PCAdj /* = 0 */, bool NeedStub /* = false */, bool Indirect /* = false */) { - intptr_t RelocCST = 0; + intptr_t RelocCST = Disp; if (Reloc == X86::reloc_picrel_word) RelocCST = PICBaseOffset; else if (Reloc == X86::reloc_pcrel_word) @@ -309,34 +309,42 @@ template void Emitter::emitDisplacementField(const MachineOperand *RelocOp, - int DispVal, intptr_t PCAdj) { + int DispVal, + intptr_t Adj /* = 0 */, + bool IsPCRel /* = true */) { // If this is a simple integer displacement that doesn't require a relocation, // emit it now. if (!RelocOp) { emitConstant(DispVal, 4); return; } - + // Otherwise, this is something that requires a relocation. Emit it as such // now. if (RelocOp->isGlobal()) { // In 64-bit static small code model, we could potentially emit absolute. - // But it's probably not beneficial. + // But it's probably not beneficial. If the MCE supports using RIP directly + // do it, otherwise fallback to absolute (this is determined by IsPCRel). // 89 05 00 00 00 00 mov %eax,0(%rip) # PC-relative // 89 04 25 00 00 00 00 mov %eax,0x0 # Absolute - unsigned rt = Is64BitMode ? X86::reloc_pcrel_word + unsigned rt = Is64BitMode ? + (IsPCRel ? X86::reloc_pcrel_word : X86::reloc_absolute_word_sext) : (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word); bool NeedStub = isa(RelocOp->getGlobal()); bool Indirect = gvNeedsNonLazyPtr(*RelocOp, TM); emitGlobalAddress(RelocOp->getGlobal(), rt, RelocOp->getOffset(), - PCAdj, NeedStub, Indirect); + Adj, NeedStub, Indirect); } else if (RelocOp->isCPI()) { - unsigned rt = Is64BitMode ? X86::reloc_pcrel_word : X86::reloc_picrel_word; + unsigned rt = Is64BitMode ? + (IsPCRel ? X86::reloc_pcrel_word : X86::reloc_absolute_word_sext) + : (IsPCRel ? X86::reloc_picrel_word : X86::reloc_absolute_word); emitConstPoolAddress(RelocOp->getIndex(), rt, - RelocOp->getOffset(), PCAdj); + RelocOp->getOffset(), Adj); } else if (RelocOp->isJTI()) { - unsigned rt = Is64BitMode ? X86::reloc_pcrel_word : X86::reloc_picrel_word; - emitJumpTableAddress(RelocOp->getIndex(), rt, PCAdj); + unsigned rt = Is64BitMode ? + (IsPCRel ? X86::reloc_pcrel_word : X86::reloc_absolute_word_sext) + : (IsPCRel ? X86::reloc_picrel_word : X86::reloc_absolute_word); + emitJumpTableAddress(RelocOp->getIndex(), rt, Adj); } else { llvm_unreachable("Unknown value to relocate!"); } @@ -354,14 +362,14 @@ if (Op3.isGlobal()) { DispForReloc = &Op3; } else if (Op3.isCPI()) { - if (Is64BitMode || IsPIC) { + if (!MCE.earlyResolveAddresses() || Is64BitMode || IsPIC) { DispForReloc = &Op3; } else { DispVal += MCE.getConstantPoolEntryAddress(Op3.getIndex()); DispVal += Op3.getOffset(); } } else if (Op3.isJTI()) { - if (Is64BitMode || IsPIC) { + if (!MCE.earlyResolveAddresses() || Is64BitMode || IsPIC) { DispForReloc = &Op3; } else { DispVal += MCE.getJumpTableEntryAddress(Op3.getIndex()); @@ -376,17 +384,23 @@ unsigned BaseReg = Base.getReg(); + // Indicate that the displacement will use an pcrel or absolute reference + // by default. MCEs able to resolve addresses on-the-fly use pcrel by default + // while others, unless explicit asked to use RIP, use absolute references. + bool IsPCRel = MCE.earlyResolveAddresses() ? true : false; + // Is a SIB byte needed? + // If no BaseReg, issue a RIP relative instruction only if the MCE can + // resolve addresses on-the-fly, otherwise use SIB (Intel Manual 2A, table + // 2-7) and absolute references. if ((!Is64BitMode || DispForReloc || BaseReg != 0) && - IndexReg.getReg() == 0 && - (BaseReg == 0 || BaseReg == X86::RIP || - getX86RegNum(BaseReg) != N86::ESP)) { - if (BaseReg == 0 || - BaseReg == X86::RIP) { // Just a displacement? + IndexReg.getReg() == 0 && + ((BaseReg == 0 && MCE.earlyResolveAddresses()) || BaseReg == X86::RIP || + (BaseReg != 0 && getX86RegNum(BaseReg) != N86::ESP))) { + if (BaseReg == 0 || BaseReg == X86::RIP) { // Just a displacement? // Emit special case [disp32] encoding MCE.emitByte(ModRMByte(0, RegOpcodeField, 5)); - - emitDisplacementField(DispForReloc, DispVal, PCAdj); + emitDisplacementField(DispForReloc, DispVal, PCAdj, true); } else { unsigned BaseRegNo = getX86RegNum(BaseReg); if (!DispForReloc && DispVal == 0 && BaseRegNo != N86::EBP) { @@ -399,7 +413,7 @@ } else { // Emit the most general non-SIB encoding: [REG+disp32] MCE.emitByte(ModRMByte(2, RegOpcodeField, BaseRegNo)); - emitDisplacementField(DispForReloc, DispVal, PCAdj); + emitDisplacementField(DispForReloc, DispVal, PCAdj, IsPCRel); } } @@ -435,13 +449,13 @@ unsigned SS = SSTable[Scale.getImm()]; if (BaseReg == 0) { - // Handle the SIB byte for the case where there is no base. The - // displacement has already been output. + // Handle the SIB byte for the case where there is no base, see Intel + // Manual 2A, table 2-7. The displacement has already been output. unsigned IndexRegNo; if (IndexReg.getReg()) IndexRegNo = getX86RegNum(IndexReg.getReg()); - else - IndexRegNo = 4; // For example [ESP+1*+4] + else // Examples: [ESP+1*+4] or [scaled idx]+disp32 (MOD=0,BASE=5) + IndexRegNo = 4; emitSIBByte(SS, IndexRegNo, 5); } else { unsigned BaseRegNo = getX86RegNum(BaseReg); @@ -457,7 +471,7 @@ if (ForceDisp8) { emitConstant(DispVal, 1); } else if (DispVal != 0 || ForceDisp32) { - emitDisplacementField(DispForReloc, DispVal, PCAdj); + emitDisplacementField(DispForReloc, DispVal, PCAdj, IsPCRel); } } } Modified: llvm/trunk/lib/Target/X86/X86JITInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86JITInfo.cpp?rev=78129&r1=78128&r2=78129&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86JITInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86JITInfo.cpp Tue Aug 4 19:11:21 2009 @@ -538,6 +538,7 @@ break; } case X86::reloc_absolute_word: + case X86::reloc_absolute_word_sext: // Absolute relocation, just add the relocated value to the value already // in memory. *((unsigned*)RelocPos) += (unsigned)ResultPtr; Modified: llvm/trunk/lib/Target/X86/X86Relocations.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Relocations.h?rev=78129&r1=78128&r2=78129&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86Relocations.h (original) +++ llvm/trunk/lib/Target/X86/X86Relocations.h Tue Aug 4 19:11:21 2009 @@ -20,7 +20,9 @@ namespace X86 { /// RelocationType - An enum for the x86 relocation codes. Note that /// the terminology here doesn't follow x86 convention - word means - /// 32-bit and dword means 64-bit. + /// 32-bit and dword means 64-bit. The relocations will be treated + /// by JIT or ObjectCode emitters, this is transparent to the x86 code + /// emitter but JIT and ObjectCode will treat them differently enum RelocationType { /// reloc_pcrel_word - PC relative relocation, add the relocated value to /// the value already in memory, after we adjust it for where the PC is. @@ -30,11 +32,19 @@ /// value to the value already in memory, after we adjust it for where the /// PIC base is. reloc_picrel_word = 1, - - /// reloc_absolute_word, reloc_absolute_dword - Absolute relocation, just - /// add the relocated value to the value already in memory. + + /// reloc_absolute_word - absolute relocation, just add the relocated + /// value to the value already in memory. reloc_absolute_word = 2, - reloc_absolute_dword = 3 + + /// reloc_absolute_word_sext - absolute relocation, just add the relocated + /// value to the value already in memory. In object files, it represents a + /// value which must be sign-extended when resolving the relocation. + reloc_absolute_word_sext = 3, + + /// reloc_absolute_dword - absolute relocation, just add the relocated + /// value to the value already in memory. + reloc_absolute_dword = 4 }; } } From resistor at mac.com Tue Aug 4 19:15:12 2009 From: resistor at mac.com (Owen Anderson) Date: Wed, 05 Aug 2009 00:15:12 -0000 Subject: [llvm-commits] [llvm] r78130 - in /llvm/trunk/lib/VMCore: LLVMContextImpl.h Type.cpp Message-ID: <200908050015.n750FCdA027198@zion.cs.uiuc.edu> Author: resistor Date: Tue Aug 4 19:15:12 2009 New Revision: 78130 URL: http://llvm.org/viewvc/llvm-project?rev=78130&view=rev Log: Privatize the PointerType factory. Modified: llvm/trunk/lib/VMCore/LLVMContextImpl.h llvm/trunk/lib/VMCore/Type.cpp Modified: llvm/trunk/lib/VMCore/LLVMContextImpl.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/LLVMContextImpl.h?rev=78130&r1=78129&r2=78130&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/LLVMContextImpl.h (original) +++ llvm/trunk/lib/VMCore/LLVMContextImpl.h Tue Aug 4 19:15:12 2009 @@ -130,6 +130,7 @@ TypeMap ArrayTypes; TypeMap VectorTypes; + TypeMap PointerTypes; LLVMContextImpl() : TheTrueVal(0), TheFalseVal(0) { } }; Modified: llvm/trunk/lib/VMCore/Type.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Type.cpp?rev=78130&r1=78129&r2=78130&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Type.cpp (original) +++ llvm/trunk/lib/VMCore/Type.cpp Tue Aug 4 19:15:12 2009 @@ -901,8 +901,6 @@ // Pointer Type Factory... // -static ManagedStatic > PointerTypes; - PointerType *PointerType::get(const Type *ValueType, unsigned AddressSpace) { assert(ValueType && "Can't get a pointer to type!"); assert(ValueType != Type::VoidTy && @@ -912,12 +910,14 @@ PointerType *PT = 0; + LLVMContextImpl *pImpl = ValueType->getContext().pImpl; + sys::SmartScopedLock L(*TypeMapLock); - PT = PointerTypes->get(PVT); + PT = pImpl->PointerTypes.get(PVT); if (!PT) { // Value not found. Derive a new type! - PointerTypes->add(PVT, PT = new PointerType(ValueType, AddressSpace)); + pImpl->PointerTypes.add(PVT, PT = new PointerType(ValueType, AddressSpace)); } #ifdef DEBUG_MERGE_TYPES DOUT << "Derived new type: " << *PT << "\n"; @@ -1158,11 +1158,13 @@ // void PointerType::refineAbstractType(const DerivedType *OldType, const Type *NewType) { - PointerTypes->RefineAbstractType(this, OldType, NewType); + LLVMContextImpl *pImpl = OldType->getContext().pImpl; + pImpl->PointerTypes.RefineAbstractType(this, OldType, NewType); } void PointerType::typeBecameConcrete(const DerivedType *AbsTy) { - PointerTypes->TypeBecameConcrete(this, AbsTy); + LLVMContextImpl *pImpl = AbsTy->getContext().pImpl; + pImpl->PointerTypes.TypeBecameConcrete(this, AbsTy); } bool SequentialType::indexValid(const Value *V) const { From gohman at apple.com Tue Aug 4 19:17:00 2009 From: gohman at apple.com (Dan Gohman) Date: Wed, 05 Aug 2009 00:17:00 -0000 Subject: [llvm-commits] [llvm] r78131 - /llvm/trunk/lib/System/Unix/Program.inc Message-ID: <200908050017.n750H0AL027272@zion.cs.uiuc.edu> Author: djg Date: Tue Aug 4 19:17:00 2009 New Revision: 78131 URL: http://llvm.org/viewvc/llvm-project?rev=78131&view=rev Log: Remove needless uses of std::flush in the parent process after a fork call. This eliminates a need for . Also remove needless fsync calls. Modified: llvm/trunk/lib/System/Unix/Program.inc Modified: llvm/trunk/lib/System/Unix/Program.inc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Unix/Program.inc?rev=78131&r1=78130&r2=78131&view=diff ============================================================================== --- llvm/trunk/lib/System/Unix/Program.inc (original) +++ llvm/trunk/lib/System/Unix/Program.inc Tue Aug 4 19:17:00 2009 @@ -18,7 +18,6 @@ #include #include "Unix.h" -#include #if HAVE_SYS_STAT_H #include #endif @@ -214,12 +213,6 @@ break; } - // Make sure stderr and stdout have been flushed - std::cerr << std::flush; - std::cout << std::flush; - fsync(1); - fsync(2); - Pid_ = child; return true; From gohman at apple.com Tue Aug 4 19:28:59 2009 From: gohman at apple.com (Dan Gohman) Date: Wed, 05 Aug 2009 00:28:59 -0000 Subject: [llvm-commits] [llvm] r78133 - /llvm/trunk/tools/lli/lli.cpp Message-ID: <200908050028.n750Sxm5027649@zion.cs.uiuc.edu> Author: djg Date: Tue Aug 4 19:28:59 2009 New Revision: 78133 URL: http://llvm.org/viewvc/llvm-project?rev=78133&view=rev Log: lli doesn't need anymore. Modified: llvm/trunk/tools/lli/lli.cpp Modified: llvm/trunk/tools/lli/lli.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lli/lli.cpp?rev=78133&r1=78132&r2=78133&view=diff ============================================================================== --- llvm/trunk/tools/lli/lli.cpp (original) +++ llvm/trunk/tools/lli/lli.cpp Tue Aug 4 19:28:59 2009 @@ -31,7 +31,6 @@ #include "llvm/System/Process.h" #include "llvm/System/Signals.h" #include "llvm/Target/TargetSelect.h" -#include #include using namespace llvm; From alenhar2 at cs.uiuc.edu Tue Aug 4 19:30:23 2009 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Wed, 05 Aug 2009 00:30:23 -0000 Subject: [llvm-commits] [poolalloc] r78134 - in /poolalloc/trunk: include/rdsa/ lib/rDSA/ Message-ID: <200908050030.n750UOV4027725@zion.cs.uiuc.edu> Author: alenhar2 Date: Tue Aug 4 19:30:22 2009 New Revision: 78134 URL: http://llvm.org/viewvc/llvm-project?rev=78134&view=rev Log: New branch to clean up DSA some, may focus on precision rather than speed too Added: poolalloc/trunk/include/rdsa/ - copied from r78082, poolalloc/trunk/include/dsa/ poolalloc/trunk/include/rdsa/DSNode.h - copied, changed from r78087, poolalloc/trunk/include/dsa/DSNode.h poolalloc/trunk/lib/rDSA/ - copied from r78082, poolalloc/trunk/lib/DSA/ poolalloc/trunk/lib/rDSA/BottomUpClosure.cpp - copied, changed from r78088, poolalloc/trunk/lib/DSA/BottomUpClosure.cpp poolalloc/trunk/lib/rDSA/CallTargets.cpp - copied, changed from r78088, poolalloc/trunk/lib/DSA/CallTargets.cpp poolalloc/trunk/lib/rDSA/DataStructure.cpp - copied, changed from r78088, poolalloc/trunk/lib/DSA/DataStructure.cpp poolalloc/trunk/lib/rDSA/DataStructureStats.cpp - copied, changed from r78088, poolalloc/trunk/lib/DSA/DataStructureStats.cpp poolalloc/trunk/lib/rDSA/Local.cpp - copied, changed from r78088, poolalloc/trunk/lib/DSA/Local.cpp poolalloc/trunk/lib/rDSA/Printer.cpp - copied, changed from r78088, poolalloc/trunk/lib/DSA/Printer.cpp poolalloc/trunk/lib/rDSA/StdLibPass.cpp - copied, changed from r78088, poolalloc/trunk/lib/DSA/StdLibPass.cpp poolalloc/trunk/lib/rDSA/TopDownClosure.cpp - copied, changed from r78088, poolalloc/trunk/lib/DSA/TopDownClosure.cpp Modified: poolalloc/trunk/include/rdsa/DSGraph.h poolalloc/trunk/include/rdsa/DSGraphTraits.h poolalloc/trunk/include/rdsa/DSSupport.h poolalloc/trunk/lib/rDSA/Basic.cpp poolalloc/trunk/lib/rDSA/CompleteBottomUp.cpp poolalloc/trunk/lib/rDSA/DataStructureAA.cpp poolalloc/trunk/lib/rDSA/DataStructureOpt.cpp poolalloc/trunk/lib/rDSA/EquivClassGraphs.cpp poolalloc/trunk/lib/rDSA/GraphChecker.cpp poolalloc/trunk/lib/rDSA/Makefile poolalloc/trunk/lib/rDSA/Steensgaard.cpp poolalloc/trunk/lib/rDSA/SteensgaardAA.cpp Modified: poolalloc/trunk/include/rdsa/DSGraph.h URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/rdsa/DSGraph.h?rev=78134&r1=78082&r2=78134&view=diff ============================================================================== --- poolalloc/trunk/include/rdsa/DSGraph.h (original) +++ poolalloc/trunk/include/rdsa/DSGraph.h Tue Aug 4 19:30:22 2009 @@ -15,7 +15,7 @@ #ifndef LLVM_ANALYSIS_DSGRAPH_H #define LLVM_ANALYSIS_DSGRAPH_H -#include "dsa/DSNode.h" +#include "rdsa/DSNode.h" #include "llvm/ADT/EquivalenceClasses.h" #include "poolalloc/ADT/HashExtras.h" Modified: poolalloc/trunk/include/rdsa/DSGraphTraits.h URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/rdsa/DSGraphTraits.h?rev=78134&r1=78082&r2=78134&view=diff ============================================================================== --- poolalloc/trunk/include/rdsa/DSGraphTraits.h (original) +++ poolalloc/trunk/include/rdsa/DSGraphTraits.h Tue Aug 4 19:30:22 2009 @@ -16,7 +16,7 @@ #ifndef LLVM_ANALYSIS_DSGRAPHTRAITS_H #define LLVM_ANALYSIS_DSGRAPHTRAITS_H -#include "dsa/DSGraph.h" +#include "rdsa/DSGraph.h" #include "llvm/ADT/GraphTraits.h" #include "llvm/ADT/iterator.h" #include "llvm/ADT/STLExtras.h" Copied: poolalloc/trunk/include/rdsa/DSNode.h (from r78087, poolalloc/trunk/include/dsa/DSNode.h) URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/rdsa/DSNode.h?p2=poolalloc/trunk/include/rdsa/DSNode.h&p1=poolalloc/trunk/include/dsa/DSNode.h&r1=78087&r2=78134&rev=78134&view=diff ============================================================================== --- poolalloc/trunk/include/dsa/DSNode.h (original) +++ poolalloc/trunk/include/rdsa/DSNode.h Tue Aug 4 19:30:22 2009 @@ -14,7 +14,7 @@ #ifndef LLVM_ANALYSIS_DSNODE_H #define LLVM_ANALYSIS_DSNODE_H -#include "dsa/DSSupport.h" +#include "rdsa/DSSupport.h" #include "llvm/Support/Streams.h" #include "poolalloc/ADT/HashExtras.h" @@ -289,11 +289,18 @@ /// void mergeWith(const DSNodeHandle &NH, unsigned Offset); - /// addGlobal - Add an entry for a global value to the Globals list. This - /// also marks the node with the 'G' flag if it does not already have it. + /// addGlobal - Add an entry for a global value to the Globals list. + /// This also marks the node with the 'G' flag if it does not + /// already have it. /// void addGlobal(const GlobalValue *GV); + /// addFunction - Add an entry for a function value to the + /// Functionss list. This also marks the node with the 'F' flag if + /// it does not already have it. + /// + void addFunction(const Function* FV); + /// removeGlobal - Remove the specified global that is explicitly in the /// globals list. void removeGlobal(const GlobalValue *GV); @@ -483,7 +490,7 @@ return HandleForwarding(); } -inline void DSNodeHandle::setTo(DSNode *n, unsigned NewOffset) const { +inline const DSNodeHandle& DSNodeHandle::setTo(DSNode *n, unsigned NewOffset) const { assert((!n || !n->isForwarding()) && "Cannot set node to a forwarded node!"); if (N) getNode()->NumReferrers--; N = n; @@ -499,6 +506,7 @@ assert(!N || ((N->NodeType & DSNode::DeadNode) == 0)); assert((!N || Offset < N->Size || (N->Size == 0 && Offset == 0) || N->isForwarding()) && "Node handle offset out of range!"); + return *this; } inline bool DSNodeHandle::hasLink(unsigned Num) const { Modified: poolalloc/trunk/include/rdsa/DSSupport.h URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/rdsa/DSSupport.h?rev=78134&r1=78082&r2=78134&view=diff ============================================================================== --- poolalloc/trunk/include/rdsa/DSSupport.h (original) +++ poolalloc/trunk/include/rdsa/DSSupport.h Tue Aug 4 19:30:22 2009 @@ -109,7 +109,7 @@ Offset = O; } - void setTo(DSNode *N, unsigned O) const; // Defined inline in DSNode.h + const DSNodeHandle& setTo(DSNode *N, unsigned O) const; // Defined inline in DSNode.h void addEdgeTo(unsigned LinkNo, const DSNodeHandle &N); void addEdgeTo(const DSNodeHandle &N) { addEdgeTo(0, N); } Modified: poolalloc/trunk/lib/rDSA/Basic.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/rDSA/Basic.cpp?rev=78134&r1=78082&r2=78134&view=diff ============================================================================== --- poolalloc/trunk/lib/rDSA/Basic.cpp (original) +++ poolalloc/trunk/lib/rDSA/Basic.cpp Tue Aug 4 19:30:22 2009 @@ -12,8 +12,8 @@ // //===----------------------------------------------------------------------===// -#include "dsa/DataStructure.h" -#include "dsa/DSGraph.h" +#include "rdsa/DataStructure.h" +#include "rdsa/DSGraph.h" #include "llvm/Module.h" #include "llvm/DerivedTypes.h" Copied: poolalloc/trunk/lib/rDSA/BottomUpClosure.cpp (from r78088, poolalloc/trunk/lib/DSA/BottomUpClosure.cpp) URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/rDSA/BottomUpClosure.cpp?p2=poolalloc/trunk/lib/rDSA/BottomUpClosure.cpp&p1=poolalloc/trunk/lib/DSA/BottomUpClosure.cpp&r1=78088&r2=78134&rev=78134&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/BottomUpClosure.cpp (original) +++ poolalloc/trunk/lib/rDSA/BottomUpClosure.cpp Tue Aug 4 19:30:22 2009 @@ -15,8 +15,8 @@ //===----------------------------------------------------------------------===// #define DEBUG_TYPE "dsa-bu" -#include "dsa/DataStructure.h" -#include "dsa/DSGraph.h" +#include "rdsa/DataStructure.h" +#include "rdsa/DSGraph.h" #include "llvm/Module.h" #include "llvm/ADT/Statistic.h" #include "llvm/Support/Debug.h" @@ -54,14 +54,14 @@ calculateGraphs(MainFunc, Stack, NextID, ValMap); CloneAuxIntoGlobal(getDSGraph(*MainFunc)); } else { - DEBUG(ferrs() << debugname << ": No 'main' function found!\n"); + DEBUG(errs() << debugname << ": No 'main' function found!\n"); } // Calculate the graphs for any functions that are unreachable from main... for (Module::iterator I = M.begin(), E = M.end(); I != E; ++I) if (!I->isDeclaration() && !hasDSGraph(*I)) { if (MainFunc) - DEBUG(ferrs() << debugname << ": Function unreachable from main: " + DEBUG(errs() << debugname << ": Function unreachable from main: " << I->getName() << "\n"); calculateGraphs(I, Stack, NextID, ValMap); // Calculate all graphs. CloneAuxIntoGlobal(getDSGraph(*I)); @@ -263,12 +263,12 @@ // If this is a new SCC, process it now. if (Stack.back() == F) { // Special case the single "SCC" case here. - DEBUG(ferrs() << "Visiting single node SCC #: " << MyID << " fn: " + DEBUG(errs() << "Visiting single node SCC #: " << MyID << " fn: " << F->getName() << "\n"); Stack.pop_back(); - DEBUG(ferrs() << " [BU] Calculating graph for: " << F->getName()<< "\n"); + DEBUG(errs() << " [BU] Calculating graph for: " << F->getName()<< "\n"); calculateGraph(Graph); - DEBUG(ferrs() << " [BU] Done inlining: " << F->getName() << " [" + DEBUG(errs() << " [BU] Done inlining: " << F->getName() << " [" << Graph->getGraphSize() << "+" << Graph->getAuxFunctionCalls().size() << "]\n"); @@ -297,7 +297,7 @@ ResolvedFuncs.resize(uid - ResolvedFuncs.begin()); if (ResolvedFuncs.size() || NewCalleeFuncs.size()) { - DEBUG(ferrs() << "Recalculating " << F->getName() << " due to new knowledge\n"); + DEBUG(errs() << "Recalculating " << F->getName() << " due to new knowledge\n"); ValMap.erase(F); return calculateGraphs(F, Stack, NextID, ValMap); } else { @@ -341,7 +341,7 @@ } Stack.pop_back(); - DEBUG(ferrs() << "Calculating graph for SCC #: " << MyID << " of size: " + DEBUG(errs() << "Calculating graph for SCC #: " << MyID << " of size: " << SCCSize << "\n"); // Compute the Max SCC Size. @@ -354,7 +354,7 @@ // Now that we have one big happy family, resolve all of the call sites in // the graph... calculateGraph(SCCGraph); - DEBUG(ferrs() << " [BU] Done inlining SCC [" << SCCGraph->getGraphSize() + DEBUG(errs() << " [BU] Done inlining SCC [" << SCCGraph->getGraphSize() << "+" << SCCGraph->getAuxFunctionCalls().size() << "]\n" << "DONE with SCC #: " << MyID << "\n"); @@ -473,7 +473,7 @@ // Get the data structure graph for the called function. GI = getDSGraph(*Callee); // Graph to inline DEBUG(GI->AssertGraphOK(); GI->getGlobalsGraph()->AssertGraphOK()); - DEBUG(ferrs() << " Inlining graph for " << Callee->getName() + DEBUG(errs() << " Inlining graph for " << Callee->getName() << "[" << GI->getGraphSize() << "+" << GI->getAuxFunctionCalls().size() << "] into '" << Graph->getFunctionNames() << "' [" << Graph->getGraphSize() <<"+" @@ -484,19 +484,19 @@ ++NumInlines; DEBUG(Graph->AssertGraphOK();); } else if (CalledFuncs.size() > 1) { - DEBUG(ferrs() << "In Fns: " << Graph->getFunctionNames() << "\n"); - DEBUG(ferrs() << " calls " << CalledFuncs.size() + DEBUG(errs() << "In Fns: " << Graph->getFunctionNames() << "\n"); + DEBUG(errs() << " calls " << CalledFuncs.size() << " fns from site: " << CS.getCallSite().getInstruction() << " " << *CS.getCallSite().getInstruction()); - DEBUG(ferrs() << " Fns ="); + DEBUG(errs() << " Fns ="); unsigned NumPrinted = 0; for (std::vector::iterator I = CalledFuncs.begin(), E = CalledFuncs.end(); I != E; ++I) if (NumPrinted++ < 8) { - DEBUG(ferrs() << " " << (*I)->getName()); + DEBUG(errs() << " " << (*I)->getName()); } - DEBUG(ferrs() << "\n"); + DEBUG(errs() << "\n"); if (!isComplete) { for (unsigned x = 0; x < CalledFuncs.size(); ) @@ -547,13 +547,13 @@ // Clean up the final graph! GI->removeDeadNodes(DSGraph::KeepUnreachableGlobals); } else { - DEBUG(ferrs() << "***\n*** RECYCLED GRAPH ***\n***\n"); + DEBUG(errs() << "***\n*** RECYCLED GRAPH ***\n***\n"); } GI = IndCallGraph.first; // Merge the unified graph into this graph now. - DEBUG(ferrs() << " Inlining multi callee graph " + DEBUG(errs() << " Inlining multi callee graph " << "[" << GI->getGraphSize() << "+" << GI->getAuxFunctionCalls().size() << "] into '" << Graph->getFunctionNames() << "' [" << Graph->getGraphSize() <<"+" @@ -622,7 +622,7 @@ // Get the data structure graph for the called function. GI = getDSGraph(*Callee); // Graph to inline if (GI == Graph) continue; - DEBUG(ferrs() << " Inlining graph for " << Callee->getName() + DEBUG(errs() << " Inlining graph for " << Callee->getName() << "[" << GI->getGraphSize() << "+" << GI->getAuxFunctionCalls().size() << "] into '" << Graph->getFunctionNames() << "' [" << Graph->getGraphSize() <<"+" @@ -631,19 +631,19 @@ DSGraph::StripAllocaBit|DSGraph::DontCloneCallNodes); ++NumInlines; } else { - DEBUG(ferrs() << "In Fns: " << Graph->getFunctionNames() << "\n"); + DEBUG(errs() << "In Fns: " << Graph->getFunctionNames() << "\n"); DEBUG(std::cerr << " calls " << CalledFuncs.size() << " fns from site: " << CS.getCallSite().getInstruction() << " " << *CS.getCallSite().getInstruction()); - DEBUG(ferrs() << " Fns ="); + DEBUG(errs() << " Fns ="); unsigned NumPrinted = 0; for (std::vector::iterator I = CalledFuncs.begin(), E = CalledFuncs.end(); I != E; ++I) if (NumPrinted++ < 8) { - DEBUG(ferrs() << " " << (*I)->getName()); + DEBUG(errs() << " " << (*I)->getName()); } - DEBUG(ferrs() << "\n"); + DEBUG(errs() << "\n"); for (unsigned x = 0; x < CalledFuncs.size(); ) if (!hasDSGraph(*CalledFuncs[x])) @@ -696,13 +696,13 @@ // Clean up the final graph! GI->removeDeadNodes(DSGraph::KeepUnreachableGlobals); } else { - DEBUG(ferrs() << "***\n*** RECYCLED GRAPH ***\n***\n"); + DEBUG(errs() << "***\n*** RECYCLED GRAPH ***\n***\n"); } GI = IndCallGraph.first; // Merge the unified graph into this graph now. - DEBUG(ferrs() << " Inlining multi callee graph " + DEBUG(errs() << " Inlining multi callee graph " << "[" << GI->getGraphSize() << "+" << GI->getAuxFunctionCalls().size() << "] into '" << Graph->getFunctionNames() << "' [" << Graph->getGraphSize() <<"+" Copied: poolalloc/trunk/lib/rDSA/CallTargets.cpp (from r78088, poolalloc/trunk/lib/DSA/CallTargets.cpp) URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/rDSA/CallTargets.cpp?p2=poolalloc/trunk/lib/rDSA/CallTargets.cpp&p1=poolalloc/trunk/lib/DSA/CallTargets.cpp&r1=78088&r2=78134&rev=78134&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/CallTargets.cpp (original) +++ poolalloc/trunk/lib/rDSA/CallTargets.cpp Tue Aug 4 19:30:22 2009 @@ -19,9 +19,9 @@ #include "llvm/Module.h" #include "llvm/Instructions.h" -#include "dsa/DataStructure.h" -#include "dsa/DSGraph.h" -#include "dsa/CallTargets.h" +#include "rdsa/DataStructure.h" +#include "rdsa/DSGraph.h" +#include "rdsa/CallTargets.h" #include "llvm/ADT/Statistic.h" #include "llvm/Support/Debug.h" #include "llvm/Support/FormattedStream.h" @@ -74,7 +74,7 @@ } if (N->isCompleteNode() && !IndMap[cs].size()) { ++CompleteEmpty; - DEBUG(ferrs() << "Call site empty: '" + DEBUG(errs() << "Call site empty: '" << cs.getInstruction()->getName() << "' In '" << cs.getInstruction()->getParent()->getParent()->getName() Modified: poolalloc/trunk/lib/rDSA/CompleteBottomUp.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/rDSA/CompleteBottomUp.cpp?rev=78134&r1=78082&r2=78134&view=diff ============================================================================== --- poolalloc/trunk/lib/rDSA/CompleteBottomUp.cpp (original) +++ poolalloc/trunk/lib/rDSA/CompleteBottomUp.cpp Tue Aug 4 19:30:22 2009 @@ -14,8 +14,8 @@ //===----------------------------------------------------------------------===// #define DEBUG_TYPE "dsa-cbu" -#include "dsa/DataStructure.h" -#include "dsa/DSGraph.h" +#include "rdsa/DataStructure.h" +#include "rdsa/DSGraph.h" #include "llvm/Module.h" #include "llvm/ADT/Statistic.h" #include "llvm/Support/Debug.h" Copied: poolalloc/trunk/lib/rDSA/DataStructure.cpp (from r78088, poolalloc/trunk/lib/DSA/DataStructure.cpp) URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/rDSA/DataStructure.cpp?p2=poolalloc/trunk/lib/rDSA/DataStructure.cpp&p1=poolalloc/trunk/lib/DSA/DataStructure.cpp&r1=78088&r2=78134&rev=78134&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/DataStructure.cpp (original) +++ poolalloc/trunk/lib/rDSA/DataStructure.cpp Tue Aug 4 19:30:22 2009 @@ -11,10 +11,10 @@ // //===----------------------------------------------------------------------===// -#include "dsa/DSGraphTraits.h" -#include "dsa/DataStructure.h" -#include "dsa/DSGraph.h" -#include "dsa/DSSupport.h" +#include "rdsa/DSGraphTraits.h" +#include "rdsa/DataStructure.h" +#include "rdsa/DSGraph.h" +#include "rdsa/DSSupport.h" #include "llvm/Constants.h" #include "llvm/Function.h" #include "llvm/GlobalVariable.h" @@ -234,6 +234,14 @@ } } +/// addFunction - Add an entry for a function value to the +/// Functionss list. This also marks the node with the 'F' flag if +/// it does not already have it. +/// +void DSNode::addFunction(const Function* FV) { + addGlobal(FV); +} + // removeGlobal - Remove the specified global that is explicitly in the globals // list. void DSNode::removeGlobal(const GlobalValue *GV) { Modified: poolalloc/trunk/lib/rDSA/DataStructureAA.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/rDSA/DataStructureAA.cpp?rev=78134&r1=78082&r2=78134&view=diff ============================================================================== --- poolalloc/trunk/lib/rDSA/DataStructureAA.cpp (original) +++ poolalloc/trunk/lib/rDSA/DataStructureAA.cpp Tue Aug 4 19:30:22 2009 @@ -18,8 +18,8 @@ #include "llvm/Module.h" #include "llvm/Analysis/AliasAnalysis.h" #include "llvm/Analysis/Passes.h" -#include "dsa/DataStructure.h" -#include "dsa/DSGraph.h" +#include "rdsa/DataStructure.h" +#include "rdsa/DSGraph.h" using namespace llvm; namespace { Modified: poolalloc/trunk/lib/rDSA/DataStructureOpt.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/rDSA/DataStructureOpt.cpp?rev=78134&r1=78082&r2=78134&view=diff ============================================================================== --- poolalloc/trunk/lib/rDSA/DataStructureOpt.cpp (original) +++ poolalloc/trunk/lib/rDSA/DataStructureOpt.cpp Tue Aug 4 19:30:22 2009 @@ -12,8 +12,8 @@ // //===----------------------------------------------------------------------===// -#include "dsa/DataStructure.h" -#include "dsa/DSGraph.h" +#include "rdsa/DataStructure.h" +#include "rdsa/DSGraph.h" #include "llvm/Analysis/Passes.h" #include "llvm/Module.h" #include "llvm/Constant.h" Copied: poolalloc/trunk/lib/rDSA/DataStructureStats.cpp (from r78088, poolalloc/trunk/lib/DSA/DataStructureStats.cpp) URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/rDSA/DataStructureStats.cpp?p2=poolalloc/trunk/lib/rDSA/DataStructureStats.cpp&p1=poolalloc/trunk/lib/DSA/DataStructureStats.cpp&r1=78088&r2=78134&rev=78134&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/DataStructureStats.cpp (original) +++ poolalloc/trunk/lib/rDSA/DataStructureStats.cpp Tue Aug 4 19:30:22 2009 @@ -11,8 +11,8 @@ // //===----------------------------------------------------------------------===// -#include "dsa/DataStructure.h" -#include "dsa/DSGraph.h" +#include "rdsa/DataStructure.h" +#include "rdsa/DSGraph.h" #include "llvm/Function.h" #include "llvm/Instructions.h" #include "llvm/Pass.h" @@ -97,7 +97,7 @@ totalNumCallees += Callees.size(); ++numIndirectCalls; } else { - DEBUG(ferrs() << "WARNING: No callee in Function '" + DEBUG(errs() << "WARNING: No callee in Function '" << F.getNameStr() << "' at call: \n" << *I->getCallSite().getInstruction()); } @@ -107,7 +107,7 @@ NumIndirectCalls += numIndirectCalls; if (numIndirectCalls) { - DEBUG(ferrs() << " In function " << F.getName() << ": " + DEBUG(errs() << " In function " << F.getName() << ": " << (totalNumCallees / (double) numIndirectCalls) << " average callees per indirect call\n"); } Modified: poolalloc/trunk/lib/rDSA/EquivClassGraphs.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/rDSA/EquivClassGraphs.cpp?rev=78134&r1=78082&r2=78134&view=diff ============================================================================== --- poolalloc/trunk/lib/rDSA/EquivClassGraphs.cpp (original) +++ poolalloc/trunk/lib/rDSA/EquivClassGraphs.cpp Tue Aug 4 19:30:22 2009 @@ -15,11 +15,11 @@ //===----------------------------------------------------------------------===// #define DEBUG_TYPE "ECGraphs" -#include "dsa/DataStructure.h" +#include "rdsa/DataStructure.h" #include "llvm/DerivedTypes.h" #include "llvm/Module.h" #include "llvm/Pass.h" -#include "dsa/DSGraph.h" +#include "rdsa/DSGraph.h" #include "llvm/Support/CallSite.h" #include "llvm/Support/Debug.h" #include "llvm/ADT/SCCIterator.h" Modified: poolalloc/trunk/lib/rDSA/GraphChecker.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/rDSA/GraphChecker.cpp?rev=78134&r1=78082&r2=78134&view=diff ============================================================================== --- poolalloc/trunk/lib/rDSA/GraphChecker.cpp (original) +++ poolalloc/trunk/lib/rDSA/GraphChecker.cpp Tue Aug 4 19:30:22 2009 @@ -23,8 +23,8 @@ // //===----------------------------------------------------------------------===// -#include "dsa/DataStructure.h" -#include "dsa/DSGraph.h" +#include "rdsa/DataStructure.h" +#include "rdsa/DSGraph.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/Streams.h" #include "llvm/Value.h" Copied: poolalloc/trunk/lib/rDSA/Local.cpp (from r78088, poolalloc/trunk/lib/DSA/Local.cpp) URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/rDSA/Local.cpp?p2=poolalloc/trunk/lib/rDSA/Local.cpp&p1=poolalloc/trunk/lib/DSA/Local.cpp&r1=78088&r2=78134&rev=78134&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/Local.cpp (original) +++ poolalloc/trunk/lib/rDSA/Local.cpp Tue Aug 4 19:30:22 2009 @@ -12,8 +12,8 @@ // //===----------------------------------------------------------------------===// -#include "dsa/DataStructure.h" -#include "dsa/DSGraph.h" +#include "rdsa/DataStructure.h" +#include "rdsa/DSGraph.h" #include "llvm/Constants.h" #include "llvm/DerivedTypes.h" #include "llvm/Instructions.h" @@ -41,42 +41,100 @@ X("dsa-local", "Local Data Structure Analysis"); namespace { + //===--------------------------------------------------------------------===// - // GraphBuilder Class + // GraphBuilderBase Class //===--------------------------------------------------------------------===// // - /// This class is the builder class that constructs the local data structure - /// graph by performing a single pass over the function in question. + /// This class contains the common graph building coe. /// - class GraphBuilder : InstVisitor { - DSGraph &G; - Function* FB; - DataStructures* DS; - - //////////////////////////////////////////////////////////////////////////// - // Helper functions used to implement the visitation functions... - - void MergeConstantInitIntoNode(DSNodeHandle &NH, const Type* Ty, Constant *C); - + class GraphBuilderBase { + DSGraph* G; + protected: /// createNode - Create a new DSNode, ensuring that it is properly added to /// the graph. /// - DSNode *createNode(const Type *Ty = 0) - { - DSNode* ret = new DSNode(Ty, &G); - assert(ret->getParentGraph() && "No parent?"); - return ret; + DSNode* createNode(const Type *Ty = 0) { + return new DSNode(Ty, G); + } + DSNode* createNode(const Type *Ty, GlobalVariable* GV) { + DSNode* N = new DSNode(Ty, G); + N->addGlobal(GV); + return N; + } + DSNode* createNode(const Type *Ty, Function* FV) { + DSNode* N = new DSNode(Ty, G); + N->addFunction(FV); + return N; + } + + DSNodeHandle& getNodeForValue(const Value *V) { + return G->getScalarMap()[V]; + } + + bool hasNodeForValue(const Value* V) const { + return G->hasNodeForValue(V); + } + void eraseNodeForValue(const Value* V) { + G->eraseNodeForValue(V); + } + + void addDSCallSite(const DSCallSite& DSCS) { + G->getFunctionCalls().push_back(DSCS); } + /// getValueDest - Return the DSNode that the actual value points to. + /// + DSNodeHandle getValueDest(Value &V); + /// setDestTo - Set the ScalarMap entry for the specified value to point to /// the specified destination. If the Value already points to a node, make /// sure to merge the two destinations together. /// void setDestTo(Value &V, const DSNodeHandle &NH); - /// getValueDest - Return the DSNode that the actual value points to. - /// - DSNodeHandle getValueDest(Value &V); + void visitGetElementPtrInst(User &GEP); + + GraphBuilderBase(DSGraph* _G) :G(_G) {} + + }; + + //===--------------------------------------------------------------------===// + // GraphBuilderGlobal Class + //===--------------------------------------------------------------------===// + // + /// This class is the builder class that constructs the local data structure + /// graph by performing a single pass over the function in question. + /// + class GraphBuilderGlobal : GraphBuilderBase { + + void MergeConstantInitIntoNode(DSNodeHandle &NH, const Type* Ty, Constant *C); + + public: + // GraphBuilderGlobal ctor for working on the globals graph + explicit GraphBuilderGlobal(DSGraph* g) + :GraphBuilderBase(g) + {} + + void mergeInGlobalInitializer(GlobalVariable *GV); + void mergeFunction(Function& F) { getValueDest(F); } + + }; + + + //===--------------------------------------------------------------------===// + // GraphBuilderLocal Class + //===--------------------------------------------------------------------===// + // + /// This class is the builder class that constructs the local data structure + /// graph by performing a single pass over the function in question. + /// + class GraphBuilderLocal : GraphBuilderBase, InstVisitor { + DataStructures* DS; + DSNodeHandle& RetNode; + + //////////////////////////////////////////////////////////////////////////// + // Helper functions used to implement the visitation functions... /// getLink - This method is used to return the specified link in the /// specified node if one exists. If a link does not already exist (it's @@ -86,7 +144,7 @@ //////////////////////////////////////////////////////////////////////////// // Visitor functions, used to handle each instruction type we encounter... - friend class InstVisitor; + friend class InstVisitor; void visitMallocInst(MallocInst &MI) { setDestTo(MI, createNode()->setHeapMarker()); } @@ -111,18 +169,23 @@ void visitBitCastInst(BitCastInst &I); void visitCmpInst(CmpInst &I); + void visitExtractValueInst(ExtractValueInst &I); + void visitInsertValueInst(InsertValueInst &I); + //the nasty ones - void visitGetElementPtrInst(User &GEP); void visitCallInst(CallInst &CI); void visitInvokeInst(InvokeInst &II); void visitInstruction(Instruction &I); + void visitGetElementPtrInst(User &GEP) { + GraphBuilderBase::visitGetElementPtrInst(GEP); + } bool visitIntrinsic(CallSite CS, Function* F); void visitCallSite(CallSite CS); public: - GraphBuilder(Function &f, DSGraph &g, DataStructures& DSi) - : G(g), FB(&f), DS(&DSi) { + GraphBuilderLocal(Function& f, DSNodeHandle& retnode, DSGraph* g, DataStructures& DSi) + : GraphBuilderBase(g), DS(&DSi), RetNode(retnode) { // Create scalar nodes for all pointer arguments... for (Function::arg_iterator I = f.arg_begin(), E = f.arg_end(); I != E; ++I) { @@ -135,37 +198,26 @@ } } - // Create an entry for the return, which tracks which functions are in - // the graph - g.getOrCreateReturnNodeFor(f); - visit(f); // Single pass over the function // If there are any constant globals referenced in this function, merge // their initializers into the local graph from the globals graph. - if (g.getScalarMap().global_begin() != g.getScalarMap().global_end()) { - ReachabilityCloner RC(&g, g.getGlobalsGraph(), 0); + if (g->getScalarMap().global_begin() != g->getScalarMap().global_end()) { + ReachabilityCloner RC(g, g->getGlobalsGraph(), 0); - for (DSScalarMap::global_iterator I = g.getScalarMap().global_begin(); - I != g.getScalarMap().global_end(); ++I) + for (DSScalarMap::global_iterator I = g->getScalarMap().global_begin(); + I != g->getScalarMap().global_end(); ++I) if (const GlobalVariable *GV = dyn_cast(*I)) if (!GV->isDeclaration() && GV->isConstant()) - RC.merge(g.getNodeForValue(GV), g.getGlobalsGraph()->getNodeForValue(GV)); + RC.merge(g->getNodeForValue(GV), g->getGlobalsGraph()->getNodeForValue(GV)); } - g.markIncompleteNodes(DSGraph::MarkFormalArgs); + g->markIncompleteNodes(DSGraph::MarkFormalArgs); // Remove any nodes made dead due to merging... - g.removeDeadNodes(DSGraph::KeepUnreachableGlobals); + g->removeDeadNodes(DSGraph::KeepUnreachableGlobals); } - // GraphBuilder ctor for working on the globals graph - explicit GraphBuilder(DSGraph& g) - :G(g), FB(0) - {} - - void mergeInGlobalInitializer(GlobalVariable *GV); - void mergeFunction(Function& F) { getValueDest(F); } }; /// Traverse the whole DSGraph, and propagate the unknown flags through all @@ -198,28 +250,37 @@ /// /// getValueDest - Return the DSNode that the actual value points to. /// -DSNodeHandle GraphBuilder::getValueDest(Value &Val) { +DSNodeHandle GraphBuilderBase::getValueDest(Value &Val) { Value *V = &Val; if (isa(V) && cast(V)->isNullValue()) return 0; // Null doesn't point to anything, don't add to ScalarMap! - DSNodeHandle &NH = G.getNodeForValue(V); + DSNodeHandle &NH = getNodeForValue(V); if (!NH.isNull()) return NH; // Already have a node? Just return it... // Otherwise we need to create a new node to point to. + + if (GlobalVariable* GV = dyn_cast(V)) + // Create a new global node for this global variable. + return NH.setTo(createNode(GV->getType()->getElementType(), GV), 0); + + if (Function* FV = dyn_cast(V)) + // Create a new global node for this global variable. + return NH.setTo(createNode(0, FV), 0); + + if (GlobalAlias* GA = dyn_cast(V)) + return NH = getValueDest(*(GA->getAliasee())); + + if (isa(V)) { + eraseNodeForValue(V); + return 0; + } + // Check first for constant expressions that must be traversed to // extract the actual value. DSNode* N; - if (GlobalVariable* GV = dyn_cast(V)) { - // Create a new global node for this global variable. - N = createNode(GV->getType()->getElementType()); - N->addGlobal(GV); - } else if (Function* GV = dyn_cast(V)) { - // Create a new global node for this global variable. - N = createNode(); - N->addGlobal(GV); - } else if (Constant *C = dyn_cast(V)) { + if (Constant *C = dyn_cast(V)) { if (ConstantExpr *CE = dyn_cast(C)) { if (CE->isCast()) { if (isa(CE->getOperand(0)->getType())) @@ -228,29 +289,19 @@ NH = createNode()->setUnknownMarker(); } else if (CE->getOpcode() == Instruction::GetElementPtr) { visitGetElementPtrInst(*CE); - assert(G.hasNodeForValue(CE) && "GEP didn't get processed right?"); - NH = G.getNodeForValue(CE); + assert(hasNodeForValue(CE) && "GEP didn't get processed right?"); + NH = getNodeForValue(CE); } else { // This returns a conservative unknown node for any unhandled ConstExpr return NH = createNode()->setUnknownMarker(); } if (NH.isNull()) { // (getelementptr null, X) returns null - G.eraseNodeForValue(V); + eraseNodeForValue(V); return 0; } return NH; - } else if (isa(C)) { - G.eraseNodeForValue(V); - return 0; - } else if (isa(C)) { - // XXX: Need more investigation - // According to Andrew, DSA is broken on global aliasing, since it does - // not handle the aliases of parameters correctly. Here is only a quick - // fix for some special cases. - NH = getValueDest(*(cast(C)->getAliasee())); - return 0; } else { - DEBUG(ferrs() << "Unknown constant: " << *C << "\n"); + DEBUG(errs() << "Unknown constant: " << *C << "\n"); assert(0 && "Unknown constant type!"); } N = createNode(); // just create a shadow node @@ -259,8 +310,7 @@ N = createNode(); } - NH.setTo(N, 0); // Remember that we are pointing to it... - return NH; + return NH.setTo(N, 0); // Remember that we are pointing to it... } @@ -270,7 +320,7 @@ /// specify the type of the Node field we are accessing so that we know what /// type should be linked to if we need to create a new node. /// -DSNodeHandle &GraphBuilder::getLink(const DSNodeHandle &node, unsigned LinkNo) { +DSNodeHandle &GraphBuilderLocal::getLink(const DSNodeHandle &node, unsigned LinkNo) { DSNodeHandle &Node = const_cast(node); DSNodeHandle &Link = Node.getLink(LinkNo); if (Link.isNull()) { @@ -285,8 +335,8 @@ /// specified destination. If the Value already points to a node, make sure to /// merge the two destinations together. /// -void GraphBuilder::setDestTo(Value &V, const DSNodeHandle &NH) { - G.getNodeForValue(&V).mergeWith(NH); +void GraphBuilderBase::setDestTo(Value &V, const DSNodeHandle &NH) { + getNodeForValue(&V).mergeWith(NH); } @@ -297,26 +347,26 @@ // PHINode - Make the scalar for the PHI node point to all of the things the // incoming values point to... which effectively causes them to be merged. // -void GraphBuilder::visitPHINode(PHINode &PN) { +void GraphBuilderLocal::visitPHINode(PHINode &PN) { if (!isa(PN.getType())) return; // Only pointer PHIs - DSNodeHandle &PNDest = G.getNodeForValue(&PN); + DSNodeHandle &PNDest = getNodeForValue(&PN); for (unsigned i = 0, e = PN.getNumIncomingValues(); i != e; ++i) PNDest.mergeWith(getValueDest(*PN.getIncomingValue(i))); } -void GraphBuilder::visitSelectInst(SelectInst &SI) { +void GraphBuilderLocal::visitSelectInst(SelectInst &SI) { if (!isa(SI.getType())) return; // Only pointer Selects - DSNodeHandle &Dest = G.getNodeForValue(&SI); + DSNodeHandle &Dest = getNodeForValue(&SI); DSNodeHandle S1 = getValueDest(*SI.getOperand(1)); DSNodeHandle S2 = getValueDest(*SI.getOperand(2)); Dest.mergeWith(S1); Dest.mergeWith(S2); } -void GraphBuilder::visitLoadInst(LoadInst &LI) { +void GraphBuilderLocal::visitLoadInst(LoadInst &LI) { DSNodeHandle Ptr = getValueDest(*LI.getOperand(0)); if (Ptr.isNull()) return; // Load from null @@ -331,7 +381,7 @@ setDestTo(LI, getLink(Ptr)); } -void GraphBuilder::visitStoreInst(StoreInst &SI) { +void GraphBuilderLocal::visitStoreInst(StoreInst &SI) { const Type *StoredTy = SI.getOperand(0)->getType(); DSNodeHandle Dest = getValueDest(*SI.getOperand(1)); if (Dest.isNull()) return; @@ -347,12 +397,12 @@ Dest.addEdgeTo(getValueDest(*SI.getOperand(0))); } -void GraphBuilder::visitReturnInst(ReturnInst &RI) { +void GraphBuilderLocal::visitReturnInst(ReturnInst &RI) { if (RI.getNumOperands() && isa(RI.getOperand(0)->getType())) - G.getOrCreateReturnNodeFor(*FB).mergeWith(getValueDest(*RI.getOperand(0))); + RetNode.mergeWith(getValueDest(*RI.getOperand(0))); } -void GraphBuilder::visitVAArgInst(VAArgInst &I) { +void GraphBuilderLocal::visitVAArgInst(VAArgInst &I) { //FIXME: also updates the argument DSNodeHandle Ptr = getValueDest(*I.getOperand(0)); if (Ptr.isNull()) return; @@ -368,30 +418,30 @@ setDestTo(I, getLink(Ptr)); } -void GraphBuilder::visitIntToPtrInst(IntToPtrInst &I) { +void GraphBuilderLocal::visitIntToPtrInst(IntToPtrInst &I) { // std::cerr << "cast in " << I.getParent()->getParent()->getName() << "\n"; // I.dump(); setDestTo(I, createNode()->setUnknownMarker()->setIntToPtrMarker()); } -void GraphBuilder::visitPtrToIntInst(PtrToIntInst& I) { +void GraphBuilderLocal::visitPtrToIntInst(PtrToIntInst& I) { if (DSNode* N = getValueDest(*I.getOperand(0)).getNode()) N->setPtrToIntMarker(); } -void GraphBuilder::visitBitCastInst(BitCastInst &I) { +void GraphBuilderLocal::visitBitCastInst(BitCastInst &I) { if (!isa(I.getType())) return; // Only pointers DSNodeHandle Ptr = getValueDest(*I.getOperand(0)); if (Ptr.isNull()) return; setDestTo(I, Ptr); } -void GraphBuilder::visitCmpInst(CmpInst &I) { - //Should this merge or not? I don't think so. +void GraphBuilderLocal::visitCmpInst(CmpInst &I) { + // TODO: must merge pointers } -void GraphBuilder::visitGetElementPtrInst(User &GEP) { +void GraphBuilderBase::visitGetElementPtrInst(User &GEP) { DSNodeHandle Value = getValueDest(*GEP.getOperand(0)); if (Value.isNull()) Value = createNode(); @@ -488,7 +538,7 @@ // Variable index into a node. We must merge all of the elements of the // sequential type here. if (isa(STy)) { - DEBUG(ferrs() << "Pointer indexing not handled yet!\n"); + DEBUG(errs() << "Pointer indexing not handled yet!\n"); } else { const ArrayType *ATy = cast(STy); unsigned ElSize = TD.getTypeAllocSize(CurTy); @@ -537,7 +587,7 @@ { if (G.getPoolDescriptorsMap().count(N) != 0) if (G.getPoolDescriptorsMap()[N]) { - DEBUG(ferrs() << "LLVA: GEP[" << 0 << "]: Pool for " << GEP.getName() << " is " << G.getPoolDescriptorsMap()[N]->getName() << "\n"); + DEBUG(errs() << "LLVA: GEP[" << 0 << "]: Pool for " << GEP.getName() << " is " << G.getPoolDescriptorsMap()[N]->getName() << "\n"); } } } @@ -546,16 +596,16 @@ } -void GraphBuilder::visitCallInst(CallInst &CI) { +void GraphBuilderLocal::visitCallInst(CallInst &CI) { visitCallSite(&CI); } -void GraphBuilder::visitInvokeInst(InvokeInst &II) { +void GraphBuilderLocal::visitInvokeInst(InvokeInst &II) { visitCallSite(&II); } /// returns true if the intrinsic is handled -bool GraphBuilder::visitIntrinsic(CallSite CS, Function *F) { +bool GraphBuilderLocal::visitIntrinsic(CallSite CS, Function *F) { switch (F->getIntrinsicID()) { case Intrinsic::vastart: { // Mark the memory written by the vastart intrinsic as incomplete @@ -697,14 +747,14 @@ return true; } - DEBUG(ferrs() << "[dsa:local] Unhandled intrinsic: " << F->getName() << "\n"); + DEBUG(errs() << "[dsa:local] Unhandled intrinsic: " << F->getName() << "\n"); assert(0 && "Unhandled intrinsic"); return false; } } } -void GraphBuilder::visitCallSite(CallSite CS) { +void GraphBuilderLocal::visitCallSite(CallSite CS) { Value *Callee = CS.getCalledValue(); // Special case handling of certain libc allocation functions here. @@ -728,7 +778,7 @@ if (!isa(Callee)) { CalleeNode = getValueDest(*Callee).getNode(); if (CalleeNode == 0) { - DEBUG(ferrs() << "WARNING: Program is calling through a null pointer?\n" << *I); + DEBUG(errs() << "WARNING: Program is calling through a null pointer?\n" << *I); return; // Calling a null pointer? } } @@ -740,20 +790,21 @@ for (CallSite::arg_iterator I = CS.arg_begin(), E = CS.arg_end(); I != E; ++I) if (isa((*I)->getType())) Args.push_back(getValueDest(**I)); + else + Args.push_back(0); // Add a new function call entry... if (CalleeNode) { - G.getFunctionCalls().push_back(DSCallSite(CS, RetVal, CalleeNode, Args)); + addDSCallSite(DSCallSite(CS, RetVal, CalleeNode, Args)); DS->callee_site(CS.getInstruction()); - }else - G.getFunctionCalls().push_back(DSCallSite(CS, RetVal, cast(Callee), - Args)); + } else + addDSCallSite(DSCallSite(CS, RetVal, cast(Callee), Args)); } // visitInstruction - For all other instruction types, if we have any arguments // that are of pointer type, make them have unknown composition bits, and merge // the nodes together. -void GraphBuilder::visitInstruction(Instruction &Inst) { +void GraphBuilderLocal::visitInstruction(Instruction &Inst) { DSNodeHandle CurNode; if (isa(Inst.getType())) CurNode = getValueDest(Inst); @@ -765,6 +816,13 @@ N->setUnknownMarker(); } +void GraphBuilderLocal::visitExtractValueInst(ExtractValueInst &I) { + assert(!isa(I.getType()) && "ExtractValue not supported"); +} + +void GraphBuilderLocal::visitInsertValueInst(InsertValueInst &I) { + assert(!isa((*(I.op_begin()))->getType()) && "InsertValue not supported"); +} //===----------------------------------------------------------------------===// @@ -773,7 +831,7 @@ // MergeConstantInitIntoNode - Merge the specified constant into the node // pointed to by NH. -void GraphBuilder::MergeConstantInitIntoNode(DSNodeHandle &NH, const Type* Ty, Constant *C) { +void GraphBuilderGlobal::MergeConstantInitIntoNode(DSNodeHandle &NH, const Type* Ty, Constant *C) { // Ensure a type-record exists... DSNode *NHN = NH.getNode(); NHN->mergeTypeInfo(Ty, NH.getOffset()); @@ -814,13 +872,14 @@ } } -void GraphBuilder::mergeInGlobalInitializer(GlobalVariable *GV) { +void GraphBuilderGlobal::mergeInGlobalInitializer(GlobalVariable *GV) { assert(!GV->isDeclaration() && "Cannot merge in external global!"); // Get a node handle to the global node and merge the initializer into it. DSNodeHandle NH = getValueDest(*GV); MergeConstantInitIntoNode(NH, GV->getType()->getElementType(), GV->getInitializer()); } + char LocalDataStructures::ID; bool LocalDataStructures::runOnModule(Module &M) { @@ -828,7 +887,7 @@ // First step, build the globals graph. { - GraphBuilder GGB(*GlobalsGraph); + GraphBuilderGlobal GGB(GlobalsGraph); // Add initializers for all of the globals to the globals graph. for (Module::global_iterator I = M.global_begin(), E = M.global_end(); @@ -849,7 +908,7 @@ for (Module::iterator I = M.begin(), E = M.end(); I != E; ++I) if (!I->isDeclaration()) { DSGraph* G = new DSGraph(GlobalECs, getTargetData(), GlobalsGraph); - GraphBuilder GGB(*I, *G, *this); + GraphBuilderLocal GGB(*I, G->getOrCreateReturnNodeFor(*I), G, *this); G->getAuxFunctionCalls() = G->getFunctionCalls(); setDSGraph(*I, G); propagateUnknownFlag(G); Modified: poolalloc/trunk/lib/rDSA/Makefile URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/rDSA/Makefile?rev=78134&r1=78082&r2=78134&view=diff ============================================================================== --- poolalloc/trunk/lib/rDSA/Makefile (original) +++ poolalloc/trunk/lib/rDSA/Makefile Tue Aug 4 19:30:22 2009 @@ -10,7 +10,7 @@ LEVEL = ../.. BUILD_RELINKED=1 SHARED_LIBRARY=1 -LIBRARYNAME = LLVMDataStructure +LIBRARYNAME = rDSA include $(LEVEL)/Makefile.common Copied: poolalloc/trunk/lib/rDSA/Printer.cpp (from r78088, poolalloc/trunk/lib/DSA/Printer.cpp) URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/rDSA/Printer.cpp?p2=poolalloc/trunk/lib/rDSA/Printer.cpp&p1=poolalloc/trunk/lib/DSA/Printer.cpp&r1=78088&r2=78134&rev=78134&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/Printer.cpp (original) +++ poolalloc/trunk/lib/rDSA/Printer.cpp Tue Aug 4 19:30:22 2009 @@ -13,8 +13,8 @@ #define DEBUG_TYPE "dsgraph-printer" -#include "dsa/DataStructure.h" -#include "dsa/DSGraph.h" +#include "rdsa/DataStructure.h" +#include "rdsa/DSGraph.h" #include "dsa/DSGraphTraits.h" #include "llvm/Module.h" #include "llvm/Constants.h" @@ -339,17 +339,16 @@ << "] nodes total" << std::endl; } - void DataStructures::dumpCallGraph() const { for( ActualCalleesTy::const_iterator ii = ActualCallees.begin(), ee = ActualCallees.end(); ii != ee; ++ii) { - if (ii->first) ferrs() << ii->first->getParent()->getParent()->getName() << " "; - ferrs() << ii->first << ": ["; + if (ii->first) errs() << ii->first->getParent()->getParent()->getName() << " "; + errs() << ii->first << ": ["; for (callee_iterator cbi = ii->second.begin(), cbe = ii->second.end(); cbi != cbe; ++cbi) { - ferrs() << (*cbi)->getName() << " "; + errs() << (*cbi)->getName() << " "; } - ferrs() << "]\n"; + errs() << "]\n"; if (ii->first) ii->first->dump(); } } Copied: poolalloc/trunk/lib/rDSA/StdLibPass.cpp (from r78088, poolalloc/trunk/lib/DSA/StdLibPass.cpp) URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/rDSA/StdLibPass.cpp?p2=poolalloc/trunk/lib/rDSA/StdLibPass.cpp&p1=poolalloc/trunk/lib/DSA/StdLibPass.cpp&r1=78088&r2=78134&rev=78134&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/StdLibPass.cpp (original) +++ poolalloc/trunk/lib/rDSA/StdLibPass.cpp Tue Aug 4 19:30:22 2009 @@ -10,8 +10,8 @@ //===----------------------------------------------------------------------===// #include "llvm/ADT/Statistic.h" -#include "dsa/DataStructure.h" -#include "dsa/DSGraph.h" +#include "rdsa/DataStructure.h" +#include "rdsa/DSGraph.h" #include "llvm/Constants.h" #include "llvm/DerivedTypes.h" #include "llvm/Instructions.h" @@ -183,7 +183,7 @@ if (CI->getOperand(0) == F) { DSGraph* Graph = getDSGraph(*CI->getParent()->getParent()); //delete the call - DEBUG(ferrs() << "Removing " << F->getNameStr() << " from " + DEBUG(errs() << "Removing " << F->getNameStr() << " from " << CI->getParent()->getParent()->getNameStr() << "\n"); Graph->removeFunctionCalls(*F); } Modified: poolalloc/trunk/lib/rDSA/Steensgaard.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/rDSA/Steensgaard.cpp?rev=78134&r1=78082&r2=78134&view=diff ============================================================================== --- poolalloc/trunk/lib/rDSA/Steensgaard.cpp (original) +++ poolalloc/trunk/lib/rDSA/Steensgaard.cpp Tue Aug 4 19:30:22 2009 @@ -13,8 +13,8 @@ // //===----------------------------------------------------------------------===// -#include "dsa/DataStructure.h" -#include "dsa/DSGraph.h" +#include "rdsa/DataStructure.h" +#include "rdsa/DSGraph.h" #include "llvm/Analysis/AliasAnalysis.h" #include "llvm/Analysis/Passes.h" #include "llvm/Module.h" Modified: poolalloc/trunk/lib/rDSA/SteensgaardAA.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/rDSA/SteensgaardAA.cpp?rev=78134&r1=78082&r2=78134&view=diff ============================================================================== --- poolalloc/trunk/lib/rDSA/SteensgaardAA.cpp (original) +++ poolalloc/trunk/lib/rDSA/SteensgaardAA.cpp Tue Aug 4 19:30:22 2009 @@ -14,8 +14,8 @@ // //===----------------------------------------------------------------------===// -#include "dsa/DataStructure.h" -#include "dsa/DSGraph.h" +#include "rdsa/DataStructure.h" +#include "rdsa/DSGraph.h" #include "llvm/Analysis/AliasAnalysis.h" #include "llvm/Analysis/Passes.h" #include "llvm/Module.h" Copied: poolalloc/trunk/lib/rDSA/TopDownClosure.cpp (from r78088, poolalloc/trunk/lib/DSA/TopDownClosure.cpp) URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/rDSA/TopDownClosure.cpp?p2=poolalloc/trunk/lib/rDSA/TopDownClosure.cpp&p1=poolalloc/trunk/lib/DSA/TopDownClosure.cpp&r1=78088&r2=78134&rev=78134&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/TopDownClosure.cpp (original) +++ poolalloc/trunk/lib/rDSA/TopDownClosure.cpp Tue Aug 4 19:30:22 2009 @@ -15,10 +15,10 @@ //===----------------------------------------------------------------------===// #define DEBUG_TYPE "td_dsa" -#include "dsa/DataStructure.h" +#include "rdsa/DataStructure.h" #include "llvm/Module.h" #include "llvm/DerivedTypes.h" -#include "dsa/DSGraph.h" +#include "rdsa/DSGraph.h" #include "llvm/Support/Debug.h" #include "llvm/Support/FormattedStream.h" #include "llvm/Support/Timer.h" @@ -198,7 +198,7 @@ RC.getClonedNH(GG->getNodeForValue(*GI)); } - DEBUG(ferrs() << "[TD] Inlining callers into '" + DEBUG(errs() << "[TD] Inlining callers into '" << DSG->getFunctionNames() << "'\n"); // Iteratively inline caller graphs into this graph. @@ -215,15 +215,15 @@ do { const DSCallSite &CS = *EdgesFromCaller.back().CS; const Function &CF = *EdgesFromCaller.back().CalledFunction; - DEBUG(ferrs() << " [TD] Inlining graph into Fn '" + DEBUG(errs() << " [TD] Inlining graph into Fn '" << CF.getNameStr() << "' from "); if (CallerGraph->getReturnNodes().empty()) { - DEBUG(ferrs() << "SYNTHESIZED INDIRECT GRAPH"); + DEBUG(errs() << "SYNTHESIZED INDIRECT GRAPH"); } else { - DEBUG(ferrs() << "Fn '" << CS.getCallSite().getInstruction()-> + DEBUG(errs() << "Fn '" << CS.getCallSite().getInstruction()-> getParent()->getParent()->getNameStr() << "'"); } - DEBUG(ferrs() << ": " << CF.getFunctionType()->getNumParams() + DEBUG(errs() << ": " << CF.getFunctionType()->getNumParams() << " args\n"); // Get the formal argument and return nodes for the called function and @@ -339,7 +339,7 @@ // If we already have this graph, recycle it. if (IndCallRecI != IndCallMap.end() && IndCallRecI->first == Callees) { - DEBUG(ferrs() << " [TD] *** Reuse of indcall graph for " << Callees.size() + DEBUG(errs() << " [TD] *** Reuse of indcall graph for " << Callees.size() << " callees!\n"); IndCallGraph = IndCallRecI->second; } else { From gohman at apple.com Tue Aug 4 19:44:03 2009 From: gohman at apple.com (Dan Gohman) Date: Wed, 05 Aug 2009 00:44:03 -0000 Subject: [llvm-commits] [llvm] r78135 - /llvm/trunk/lib/Support/GraphWriter.cpp Message-ID: <200908050044.n750i3Dp028143@zion.cs.uiuc.edu> Author: djg Date: Tue Aug 4 19:44:01 2009 New Revision: 78135 URL: http://llvm.org/viewvc/llvm-project?rev=78135&view=rev Log: cerr isn't buffered so it doesn't need to be flushed. Modified: llvm/trunk/lib/Support/GraphWriter.cpp Modified: llvm/trunk/lib/Support/GraphWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/GraphWriter.cpp?rev=78135&r1=78134&r2=78135&view=diff ============================================================================== --- llvm/trunk/lib/Support/GraphWriter.cpp (original) +++ llvm/trunk/lib/Support/GraphWriter.cpp Tue Aug 4 19:44:01 2009 @@ -29,7 +29,7 @@ args.push_back(Filename.c_str()); args.push_back(0); - cerr << "Running 'Graphviz' program... " << std::flush; + cerr << "Running 'Graphviz' program... "; if (sys::Program::ExecuteAndWait(Graphviz, &args[0],0,0,0,0,&ErrMsg)) { cerr << "Error viewing graph " << Filename << ": " << ErrMsg << "\n"; } @@ -98,7 +98,7 @@ args.push_back(PSFilename.c_str()); args.push_back(0); - cerr << "Running '" << prog << "' program... " << std::flush; + cerr << "Running '" << prog << "' program... "; if (sys::Program::ExecuteAndWait(prog, &args[0],0,0,0,0,&ErrMsg)) { cerr << "Error viewing graph " << Filename << ": '" << ErrMsg << "\n"; @@ -133,7 +133,7 @@ args.push_back(Filename.c_str()); args.push_back(0); - cerr << "Running 'dotty' program... " << std::flush; + cerr << "Running 'dotty' program... "; if (sys::Program::ExecuteAndWait(dotty, &args[0],0,0,0,0,&ErrMsg)) { cerr << "Error viewing graph " << Filename << ": " << ErrMsg << "\n"; } else { From bob.wilson at apple.com Tue Aug 4 19:49:09 2009 From: bob.wilson at apple.com (Bob Wilson) Date: Wed, 05 Aug 2009 00:49:09 -0000 Subject: [llvm-commits] [llvm] r78136 - in /llvm/trunk/lib/Target/ARM: ARMISelDAGToDAG.cpp ARMISelLowering.cpp ARMInstrNEON.td ARMTargetMachine.cpp Message-ID: <200908050049.n750n91q028324@zion.cs.uiuc.edu> Author: bwilson Date: Tue Aug 4 19:49:09 2009 New Revision: 78136 URL: http://llvm.org/viewvc/llvm-project?rev=78136&view=rev Log: Change DAG nodes for Neon VLD2/3/4 operations to return multiple results. Get rid of yesterday's code to fix the register usage during isel. Select the new DAG nodes to machine instructions. The new pre-alloc pass to choose adjacent registers for these results is not done, so the results of this will generally not assemble yet. Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp llvm/trunk/lib/Target/ARM/ARMInstrNEON.td llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp?rev=78136&r1=78135&r2=78136&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp Tue Aug 4 19:49:09 2009 @@ -1284,7 +1284,7 @@ MVT HalfVT; unsigned Opc = 0; switch (VT.getVectorElementType().getSimpleVT()) { - default: assert(false && "unhandled VDUP splat type"); + default: llvm_unreachable("unhandled VDUP splat type"); case MVT::i8: Opc = ARM::VDUPLN8q; HalfVT = MVT::v8i8; break; case MVT::i16: Opc = ARM::VDUPLN16q; HalfVT = MVT::v4i16; break; case MVT::i32: Opc = ARM::VDUPLN32q; HalfVT = MVT::v2i32; break; @@ -1304,6 +1304,62 @@ break; } + + case ARMISD::VLD2D: { + MVT VT = Op.getValueType(); + SDValue MemAddr, MemUpdate, MemOpc; + if (!SelectAddrMode6(Op, N->getOperand(1), MemAddr, MemUpdate, MemOpc)) + return NULL; + unsigned Opc; + switch (VT.getSimpleVT()) { + default: llvm_unreachable("unhandled VLD2D type"); + case MVT::v8i8: Opc = ARM::VLD2d8; break; + case MVT::v4i16: Opc = ARM::VLD2d16; break; + case MVT::v2f32: + case MVT::v2i32: Opc = ARM::VLD2d32; break; + case MVT::v1i64: Opc = ARM::VLD2d64; break; + } + const SDValue Ops[] = { MemAddr, MemUpdate, MemOpc }; + return CurDAG->getTargetNode(Opc, dl, VT, VT, MVT::Other, Ops, 3); + } + + case ARMISD::VLD3D: { + MVT VT = Op.getValueType(); + SDValue MemAddr, MemUpdate, MemOpc; + if (!SelectAddrMode6(Op, N->getOperand(1), MemAddr, MemUpdate, MemOpc)) + return NULL; + unsigned Opc; + switch (VT.getSimpleVT()) { + default: llvm_unreachable("unhandled VLD3D type"); + case MVT::v8i8: Opc = ARM::VLD3d8; break; + case MVT::v4i16: Opc = ARM::VLD3d16; break; + case MVT::v2f32: + case MVT::v2i32: Opc = ARM::VLD3d32; break; + case MVT::v1i64: Opc = ARM::VLD3d64; break; + } + const SDValue Ops[] = { MemAddr, MemUpdate, MemOpc }; + return CurDAG->getTargetNode(Opc, dl, VT, VT, VT, MVT::Other, Ops, 3); + } + + case ARMISD::VLD4D: { + MVT VT = Op.getValueType(); + SDValue MemAddr, MemUpdate, MemOpc; + if (!SelectAddrMode6(Op, N->getOperand(1), MemAddr, MemUpdate, MemOpc)) + return NULL; + unsigned Opc; + switch (VT.getSimpleVT()) { + default: llvm_unreachable("unhandled VLD4D type"); + case MVT::v8i8: Opc = ARM::VLD4d8; break; + case MVT::v4i16: Opc = ARM::VLD4d16; break; + case MVT::v2f32: + case MVT::v2i32: Opc = ARM::VLD4d32; break; + case MVT::v1i64: Opc = ARM::VLD4d64; break; + } + const SDValue Ops[] = { MemAddr, MemUpdate, MemOpc }; + std::vector ResTys(4, VT); + ResTys.push_back(MVT::Other); + return CurDAG->getTargetNode(Opc, dl, ResTys, Ops, 3); + } } return SelectCode(Op); Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=78136&r1=78135&r2=78136&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Tue Aug 4 19:49:09 2009 @@ -1323,7 +1323,7 @@ } static SDValue LowerNeonVLDIntrinsic(SDValue Op, SelectionDAG &DAG, - unsigned Opcode, unsigned NumVecs) { + unsigned Opcode) { SDNode *Node = Op.getNode(); MVT VT = Node->getValueType(0); DebugLoc dl = Op.getDebugLoc(); @@ -1332,25 +1332,8 @@ return SDValue(); // unimplemented SDValue Ops[] = { Node->getOperand(0), - Node->getOperand(1) }; - SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Flag); - SDValue Result = DAG.getNode(Opcode, dl, Tys, Ops, 2); - - static const unsigned VLDRegs[] = { - ARM::D0, ARM::D1, ARM::D2, ARM::D3 - }; - - SmallVector ResultVals; - SDValue Chain = Result.getValue(0); - SDValue Flag = Result.getValue(1); - for (unsigned N = 0; N < NumVecs; ++N) { - Chain = DAG.getCopyFromReg(Chain, dl, VLDRegs[N], VT, Flag).getValue(1); - ResultVals.push_back(Chain.getValue(0)); - Flag = Chain.getValue(2); - } - ResultVals.push_back(Chain); - return DAG.getNode(ISD::MERGE_VALUES, dl, Node->getVTList(), - ResultVals.data(), NumVecs + 1); + Node->getOperand(2) }; + return DAG.getNode(Opcode, dl, Node->getVTList(), Ops, 2); } SDValue @@ -1359,13 +1342,13 @@ switch (IntNo) { case Intrinsic::arm_neon_vld2i: case Intrinsic::arm_neon_vld2f: - return LowerNeonVLDIntrinsic(Op, DAG, ARMISD::VLD2D, 2); + return LowerNeonVLDIntrinsic(Op, DAG, ARMISD::VLD2D); case Intrinsic::arm_neon_vld3i: case Intrinsic::arm_neon_vld3f: - return LowerNeonVLDIntrinsic(Op, DAG, ARMISD::VLD3D, 3); + return LowerNeonVLDIntrinsic(Op, DAG, ARMISD::VLD3D); case Intrinsic::arm_neon_vld4i: case Intrinsic::arm_neon_vld4f: - return LowerNeonVLDIntrinsic(Op, DAG, ARMISD::VLD4D, 4); + return LowerNeonVLDIntrinsic(Op, DAG, ARMISD::VLD4D); case Intrinsic::arm_neon_vst2i: case Intrinsic::arm_neon_vst2f: case Intrinsic::arm_neon_vst3i: Modified: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrNEON.td?rev=78136&r1=78135&r2=78136&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrNEON.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Tue Aug 4 19:49:09 2009 @@ -68,13 +68,18 @@ def NEONvduplaneq : SDNode<"ARMISD::VDUPLANEQ", SDTypeProfile<1, 2, [SDTCisVT<2, i32>]>>; -def SDTARMVLD : SDTypeProfile<0, 1, [SDTCisPtrTy<0>]>; -def NEONvld2d : SDNode<"ARMISD::VLD2D", SDTARMVLD, - [SDNPHasChain, SDNPOutFlag, SDNPMayLoad]>; -def NEONvld3d : SDNode<"ARMISD::VLD3D", SDTARMVLD, - [SDNPHasChain, SDNPOutFlag, SDNPMayLoad]>; -def NEONvld4d : SDNode<"ARMISD::VLD4D", SDTARMVLD, - [SDNPHasChain, SDNPOutFlag, SDNPMayLoad]>; +def SDTARMVLD2 : SDTypeProfile<2, 1, [SDTCisSameAs<0, 1>, SDTCisPtrTy<2>]>; +def SDTARMVLD3 : SDTypeProfile<3, 1, [SDTCisSameAs<0, 1>, + SDTCisSameAs<0, 2>, SDTCisPtrTy<3>]>; +def SDTARMVLD4 : SDTypeProfile<4, 1, [SDTCisSameAs<0, 1>, + SDTCisSameAs<0, 2>, + SDTCisSameAs<0, 3>, SDTCisPtrTy<4>]>; +def NEONvld2d : SDNode<"ARMISD::VLD2D", SDTARMVLD2, + [SDNPHasChain, SDNPMayLoad]>; +def NEONvld3d : SDNode<"ARMISD::VLD3D", SDTARMVLD3, + [SDNPHasChain, SDNPMayLoad]>; +def NEONvld4d : SDNode<"ARMISD::VLD4D", SDTARMVLD4, + [SDNPHasChain, SDNPMayLoad]>; //===----------------------------------------------------------------------===// // NEON operand definitions @@ -183,6 +188,37 @@ def VST1qf : VST1Q<"vst1.32", v4f32, int_arm_neon_vst1f>; def VST1q64 : VST1Q<"vst1.64", v2i64, int_arm_neon_vst1i>; +// VLD2 : Vector Load (multiple 2-element structures) +class VLD2D + : NLdSt<(outs DPR:$dst1, DPR:$dst2), (ins addrmode6:$addr), + !strconcat(OpcodeStr, "\t\\{$dst1,$dst2\\}, $addr"), []>; + +def VLD2d8 : VLD2D<"vld2.8">; +def VLD2d16 : VLD2D<"vld2.16">; +def VLD2d32 : VLD2D<"vld2.32">; +def VLD2d64 : VLD2D<"vld2.64">; + +// VLD3 : Vector Load (multiple 3-element structures) +class VLD3D + : NLdSt<(outs DPR:$dst1, DPR:$dst2, DPR:$dst3), (ins addrmode6:$addr), + !strconcat(OpcodeStr, "\t\\{$dst1,$dst2,$dst3\\}, $addr"), []>; + +def VLD3d8 : VLD3D<"vld3.8">; +def VLD3d16 : VLD3D<"vld3.16">; +def VLD3d32 : VLD3D<"vld3.32">; +def VLD3d64 : VLD3D<"vld3.64">; + +// VLD4 : Vector Load (multiple 4-element structures) +class VLD4D + : NLdSt<(outs DPR:$dst1, DPR:$dst2, DPR:$dst3, DPR:$dst4), + (ins addrmode6:$addr), + !strconcat(OpcodeStr, "\t\\{$dst1,$dst2,$dst3,$dst4\\}, $addr"), []>; + +def VLD4d8 : VLD4D<"vld4.8">; +def VLD4d16 : VLD4D<"vld4.16">; +def VLD4d32 : VLD4D<"vld4.32">; +def VLD4d64 : VLD4D<"vld4.64">; + //===----------------------------------------------------------------------===// // NEON pattern fragments Modified: llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp?rev=78136&r1=78135&r2=78136&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp Tue Aug 4 19:49:09 2009 @@ -93,6 +93,8 @@ bool ARMBaseTargetMachine::addPreRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel) { + // Call NEON pre-alloc pass here. + // FIXME: temporarily disabling load / store optimization pass for Thumb mode. if (OptLevel != CodeGenOpt::None && !DisableLdStOpti && !Subtarget.isThumb()) PM.add(createARMLoadStoreOptimizationPass(true)); From gohman at apple.com Tue Aug 4 19:49:25 2009 From: gohman at apple.com (Dan Gohman) Date: Wed, 05 Aug 2009 00:49:25 -0000 Subject: [llvm-commits] [llvm] r78137 - in /llvm/trunk/lib/Target: ARM/AsmPrinter/ARMAsmPrinter.cpp MSP430/MSP430AsmPrinter.cpp PowerPC/AsmPrinter/PPCAsmPrinter.cpp SystemZ/AsmPrinter/SystemZAsmPrinter.cpp X86/AsmPrinter/X86ATTAsmPrinter.cpp X86/AsmPrinter/X86IntelAsmPrinter.cpp Message-ID: <200908050049.n750nPTI028374@zion.cs.uiuc.edu> Author: djg Date: Tue Aug 4 19:49:25 2009 New Revision: 78137 URL: http://llvm.org/viewvc/llvm-project?rev=78137&view=rev Log: Don't flush the raw_ostream between each MachineFunction. These flush calls were originally put in place because errs() at one time was not unbuffered, and these print routines are commonly used with errs() for debugging. However, errs() is now properly unbuffered, so the flush calls are no longer needed. This significantly reduces the number of write(2) calls for regular asm printing when there are many small functions. Modified: llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp llvm/trunk/lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp Modified: llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp?rev=78137&r1=78136&r2=78137&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp Tue Aug 4 19:49:25 2009 @@ -330,8 +330,6 @@ // Emit post-function debug information. DW->EndFunction(&MF); - O.flush(); - return false; } Modified: llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp?rev=78137&r1=78136&r2=78137&view=diff ============================================================================== --- llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp Tue Aug 4 19:49:25 2009 @@ -134,8 +134,6 @@ if (TAI->hasDotTypeDotSizeDirective()) O << "\t.size\t" << CurrentFnName << ", .-" << CurrentFnName << '\n'; - O.flush(); - // We didn't modify anything return false; } Modified: llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp?rev=78137&r1=78136&r2=78137&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp Tue Aug 4 19:49:25 2009 @@ -646,8 +646,6 @@ // Emit post-function debug information. DW->EndFunction(&MF); - O.flush(); - // We didn't modify anything. return false; } Modified: llvm/trunk/lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp?rev=78137&r1=78136&r2=78137&view=diff ============================================================================== --- llvm/trunk/lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp Tue Aug 4 19:49:25 2009 @@ -144,8 +144,6 @@ // Print out jump tables referenced by the function. EmitJumpTableInfo(MF.getJumpTableInfo(), MF); - O.flush(); - // We didn't modify anything return false; } Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp?rev=78137&r1=78136&r2=78137&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Tue Aug 4 19:49:25 2009 @@ -284,8 +284,6 @@ // Print out jump tables referenced by the function. EmitJumpTableInfo(MF.getJumpTableInfo(), MF); - O.flush(); - // We didn't modify anything. return false; } Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp?rev=78137&r1=78136&r2=78137&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp Tue Aug 4 19:49:25 2009 @@ -183,8 +183,6 @@ O << CurrentFnName << "\tendp\n"; - O.flush(); - // We didn't modify anything. return false; } From gohman at apple.com Tue Aug 4 19:52:45 2009 From: gohman at apple.com (Dan Gohman) Date: Tue, 4 Aug 2009 17:52:45 -0700 Subject: [llvm-commits] [llvm] r78097 - in /llvm/trunk: include/llvm/LLVMContext.h lib/VMCore/Constants.cpp lib/VMCore/LLVMContextImpl.cpp lib/VMCore/LLVMContextImpl.h In-Reply-To: <200908042025.n74KPVti018779@zion.cs.uiuc.edu> References: <200908042025.n74KPVti018779@zion.cs.uiuc.edu> Message-ID: <23F64AF9-FDE2-436D-8F46-D00EFE1FE871@apple.com> On Aug 4, 2009, at 1:25 PM, Owen Anderson wrote: > -class LLVMContext { > +struct LLVMContext { > LLVMContextImpl* pImpl; Hi Owen, With the pImpl member being public, would it make sense to make it const? It looks like it's never modified after its initialization in the LLVMContext constructor. Alternatively, perhaps this could be accessed with an accessor function. Dan From deeppatel1987 at gmail.com Tue Aug 4 19:54:16 2009 From: deeppatel1987 at gmail.com (Sandeep Patel) Date: Wed, 5 Aug 2009 00:54:16 +0000 Subject: [llvm-commits] [patch] CBackend improvements In-Reply-To: <70D7905D-DDC2-400C-9C6F-992EFA75D44C@apple.com> References: <305d6f60907232339k582287b3p93baf72cfbc85041@mail.gmail.com> <70D7905D-DDC2-400C-9C6F-992EFA75D44C@apple.com> Message-ID: <305d6f60908041754j63b2663erc26b22bdfe279a3@mail.gmail.com> ping. Can somebody commit this? deep On Sun, Jul 26, 2009 at 6:47 PM, Evan Cheng wrote: > Ok. Thanks. > > Evan > > On Jul 23, 2009, at 11:39 PM, Sandeep Patel wrote: > >> The attached causes module asms to be emitted by the CBackend and >> makes #line directive filenames slightly more correct >> >> deep >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From gohman at apple.com Tue Aug 4 20:06:40 2009 From: gohman at apple.com (Dan Gohman) Date: Wed, 05 Aug 2009 01:06:40 -0000 Subject: [llvm-commits] [llvm] r78138 - /llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp Message-ID: <200908050106.n7516fpV029022@zion.cs.uiuc.edu> Author: djg Date: Tue Aug 4 20:06:38 2009 New Revision: 78138 URL: http://llvm.org/viewvc/llvm-project?rev=78138&view=rev Log: Remove an unnecessary flush in the CppBackend's output. Modified: llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp Modified: llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp?rev=78138&r1=78137&r2=78138&view=diff ============================================================================== --- llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp (original) +++ llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp Tue Aug 4 20:06:38 2009 @@ -1816,7 +1816,6 @@ Out << "int main(int argc, char**argv) {\n"; Out << " Module* Mod = " << fname << "();\n"; Out << " verifyModule(*Mod, PrintMessageAction);\n"; - Out << " outs().flush();\n"; Out << " PassManager PM;\n"; Out << " PM.add(createPrintModulePass(&outs()));\n"; Out << " PM.run(*Mod);\n"; From gohman at apple.com Tue Aug 4 20:19:01 2009 From: gohman at apple.com (Dan Gohman) Date: Wed, 05 Aug 2009 01:19:01 -0000 Subject: [llvm-commits] [llvm] r78139 - /llvm/trunk/lib/CodeGen/MachineSink.cpp Message-ID: <200908050119.n751J16g029458@zion.cs.uiuc.edu> Author: djg Date: Tue Aug 4 20:19:01 2009 New Revision: 78139 URL: http://llvm.org/viewvc/llvm-project?rev=78139&view=rev Log: Various comment fixes. Modified: llvm/trunk/lib/CodeGen/MachineSink.cpp Modified: llvm/trunk/lib/CodeGen/MachineSink.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineSink.cpp?rev=78139&r1=78138&r2=78139&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineSink.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineSink.cpp Tue Aug 4 20:19:01 2009 @@ -7,7 +7,12 @@ // //===----------------------------------------------------------------------===// // -// This pass +// This pass moves instructions into successor blocks, when possible, so that +// they aren't executed on paths where their results aren't needed. +// +// This pass is not intended to be a replacement or a complete alternative +// for an LLVM-IR-level sinking pass. It is only designed to sink simple +// constructs that are not exposed before lowering and instruction selection. // //===----------------------------------------------------------------------===// @@ -31,7 +36,7 @@ const TargetInstrInfo *TII; MachineFunction *CurMF; // Current MachineFunction MachineRegisterInfo *RegInfo; // Machine register information - MachineDominatorTree *DT; // Machine dominator tree for the current Loop + MachineDominatorTree *DT; // Machine dominator tree public: static char ID; // Pass identification @@ -152,7 +157,7 @@ // also sink them down before their first use in the block. This xform has to // be careful not to *increase* register pressure though, e.g. sinking // "x = y + z" down if it kills y and z would increase the live ranges of y - // and z only the shrink the live range of x. + // and z and only shrink the live range of x. // Loop over all the operands of the specified instruction. If there is // anything we can't handle, bail out. From evan.cheng at apple.com Tue Aug 4 20:29:24 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 05 Aug 2009 01:29:24 -0000 Subject: [llvm-commits] [llvm] r78141 - in /llvm/trunk: lib/CodeGen/LowerSubregs.cpp test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll Message-ID: <200908050129.n751TOKR029848@zion.cs.uiuc.edu> Author: evancheng Date: Tue Aug 4 20:29:24 2009 New Revision: 78141 URL: http://llvm.org/viewvc/llvm-project?rev=78141&view=rev Log: If the insert_subreg source is , insert an implicit_def instead of a copy. Added: llvm/trunk/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll Modified: llvm/trunk/lib/CodeGen/LowerSubregs.cpp Modified: llvm/trunk/lib/CodeGen/LowerSubregs.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LowerSubregs.cpp?rev=78141&r1=78140&r2=78141&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LowerSubregs.cpp (original) +++ llvm/trunk/lib/CodeGen/LowerSubregs.cpp Tue Aug 4 20:29:24 2009 @@ -254,7 +254,13 @@ // Insert sub-register copy const TargetRegisterClass *TRC0= TRI.getPhysicalRegisterRegClass(DstSubReg); const TargetRegisterClass *TRC1= TRI.getPhysicalRegisterRegClass(InsReg); - TII.copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC0, TRC1); + if (MI->getOperand(2).isUndef()) + // If the source register being inserted is undef, then this becomes an + // implicit_def. + BuildMI(*MBB, MI, MI->getDebugLoc(), + TII.get(TargetInstrInfo::IMPLICIT_DEF), DstSubReg); + else + TII.copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC0, TRC1); MachineBasicBlock::iterator CopyMI = MI; --CopyMI; @@ -270,7 +276,7 @@ } // Make sure the inserted register gets killed - if (MI->getOperand(2).isKill()) + if (MI->getOperand(2).isKill() && !MI->getOperand(2).isUndef()) TransferKillFlag(MI, InsReg, TRI); } Added: llvm/trunk/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll?rev=78141&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll (added) +++ llvm/trunk/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll Tue Aug 4 20:29:24 2009 @@ -0,0 +1,34 @@ +; RUN: llvm-as < %s | llc -mtriple=thumbv7-apple-darwin9 -mattr=+neon,+neonfp +; RUN: llvm-as < %s | llc -mtriple=thumbv7-apple-darwin9 -mattr=+neon,+neonfp | grep fcpys | count 1 +; rdar://7117307 + + %struct.Hosp = type { i32, i32, i32, %struct.List, %struct.List, %struct.List, %struct.List } + %struct.List = type { %struct.List*, %struct.Patient*, %struct.List* } + %struct.Patient = type { i32, i32, i32, %struct.Village* } + %struct.Results = type { float, float, float } + %struct.Village = type { [4 x %struct.Village*], %struct.Village*, %struct.List, %struct.Hosp, i32, i32 } + +define arm_apcscc void @get_results(%struct.Results* noalias nocapture sret %agg.result, %struct.Village* %village) nounwind { +entry: + br i1 undef, label %bb, label %bb6.preheader + +bb6.preheader: ; preds = %entry + call void @llvm.memcpy.i32(i8* undef, i8* undef, i32 12, i32 4) + br i1 undef, label %bb15, label %bb13 + +bb: ; preds = %entry + ret void + +bb13: ; preds = %bb13, %bb6.preheader + %0 = fadd float undef, undef ; [#uses=1] + %1 = fadd float undef, 1.000000e+00 ; [#uses=1] + br i1 undef, label %bb15, label %bb13 + +bb15: ; preds = %bb13, %bb6.preheader + %r1.0.0.lcssa = phi float [ 0.000000e+00, %bb6.preheader ], [ %1, %bb13 ] ; [#uses=1] + %r1.1.0.lcssa = phi float [ undef, %bb6.preheader ], [ %0, %bb13 ] ; [#uses=0] + store float %r1.0.0.lcssa, float* undef, align 4 + ret void +} + +declare void @llvm.memcpy.i32(i8* nocapture, i8* nocapture, i32, i32) nounwind From gohman at apple.com Tue Aug 4 20:29:29 2009 From: gohman at apple.com (Dan Gohman) Date: Wed, 05 Aug 2009 01:29:29 -0000 Subject: [llvm-commits] [llvm] r78142 - in /llvm/trunk: include/llvm/CodeGen/ include/llvm/Target/ lib/CodeGen/SelectionDAG/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/Blackfin/ lib/Target/CellSPU/ lib/Target/MSP430/ lib/Target/Mips/ lib/Target/PIC16/ lib/Target/PowerPC/ lib/Target/Sparc/ lib/Target/SystemZ/ lib/Target/X86/ lib/Target/XCore/ test/CodeGen/X86/ Message-ID: <200908050129.n751TVCZ029906@zion.cs.uiuc.edu> Author: djg Date: Tue Aug 4 20:29:28 2009 New Revision: 78142 URL: http://llvm.org/viewvc/llvm-project?rev=78142&view=rev Log: Major calling convention code refactoring. Instead of awkwardly encoding calling-convention information with ISD::CALL, ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering provides three virtual functions for targets to override: LowerFormalArguments, LowerCall, and LowerRet, which replace the custom lowering done on the special nodes. They provide the same information, but in a more immediately usable format. This also reworks much of the target-independent tail call logic. The decision of whether or not to perform a tail call is now cleanly split between target-independent portions, and the target dependent portion in IsEligibleForTailCallOptimization. This also synchronizes all in-tree targets, to help enable future refactoring and feature work. Modified: llvm/trunk/include/llvm/CodeGen/CallingConvLower.h llvm/trunk/include/llvm/CodeGen/SelectionDAG.h llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h llvm/trunk/include/llvm/Target/TargetLowering.h llvm/trunk/include/llvm/Target/TargetSelectionDAG.td llvm/trunk/lib/CodeGen/SelectionDAG/CallingConvLower.cpp llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.h llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp llvm/trunk/lib/Target/ARM/ARMISelLowering.h llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp llvm/trunk/lib/Target/Alpha/AlphaISelLowering.h llvm/trunk/lib/Target/Blackfin/BlackfinISelLowering.cpp llvm/trunk/lib/Target/Blackfin/BlackfinISelLowering.h llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp llvm/trunk/lib/Target/CellSPU/SPUISelLowering.h llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.h llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp llvm/trunk/lib/Target/Mips/MipsISelLowering.h llvm/trunk/lib/Target/Mips/MipsMachineFunction.h llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.h llvm/trunk/lib/Target/PIC16/PIC16InstrInfo.td llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp llvm/trunk/lib/Target/Sparc/SparcISelLowering.h llvm/trunk/lib/Target/Sparc/SparcInstrInfo.td llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.h llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.h llvm/trunk/lib/Target/X86/X86Instr64bit.td llvm/trunk/lib/Target/X86/X86InstrInfo.td llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp llvm/trunk/lib/Target/XCore/XCoreISelLowering.h llvm/trunk/test/CodeGen/X86/tailcallstack64.ll Modified: llvm/trunk/include/llvm/CodeGen/CallingConvLower.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/CallingConvLower.h?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/CallingConvLower.h (original) +++ llvm/trunk/include/llvm/CodeGen/CallingConvLower.h Tue Aug 4 20:29:28 2009 @@ -172,17 +172,20 @@ return UsedRegs[Reg/32] & (1 << (Reg&31)); } - /// AnalyzeFormalArguments - Analyze an ISD::FORMAL_ARGUMENTS node, + /// AnalyzeFormalArguments - Analyze an array of argument values, /// incorporating info about the formals into this state. - void AnalyzeFormalArguments(SDNode *TheArgs, CCAssignFn Fn); + void AnalyzeFormalArguments(const SmallVectorImpl &Ins, + CCAssignFn Fn); - /// AnalyzeReturn - Analyze the returned values of an ISD::RET node, + /// AnalyzeReturn - Analyze the returned values of a return, /// incorporating info about the result values into this state. - void AnalyzeReturn(SDNode *TheRet, CCAssignFn Fn); + void AnalyzeReturn(const SmallVectorImpl &Outs, + CCAssignFn Fn); - /// AnalyzeCallOperands - Analyze an ISD::CALL node, incorporating info - /// about the passed values into this state. - void AnalyzeCallOperands(CallSDNode *TheCall, CCAssignFn Fn); + /// AnalyzeCallOperands - Analyze the outgoing arguments to a call, + /// incorporating info about the passed values into this state. + void AnalyzeCallOperands(const SmallVectorImpl &Outs, + CCAssignFn Fn); /// AnalyzeCallOperands - Same as above except it takes vectors of types /// and argument flags. @@ -190,9 +193,10 @@ SmallVectorImpl &Flags, CCAssignFn Fn); - /// AnalyzeCallResult - Analyze the return values of an ISD::CALL node, + /// AnalyzeCallResult - Analyze the return values of a call, /// incorporating info about the passed values into this state. - void AnalyzeCallResult(CallSDNode *TheCall, CCAssignFn Fn); + void AnalyzeCallResult(const SmallVectorImpl &Ins, + CCAssignFn Fn); /// AnalyzeCallResult - Same as above except it's specialized for calls which /// produce a single value. Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAG.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAG.h?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/SelectionDAG.h (original) +++ llvm/trunk/include/llvm/CodeGen/SelectionDAG.h Tue Aug 4 20:29:28 2009 @@ -319,7 +319,6 @@ SDValue getExternalSymbol(const char *Sym, DebugLoc dl, MVT VT); SDValue getTargetExternalSymbol(const char *Sym, MVT VT, unsigned char TargetFlags = 0); - SDValue getArgFlags(ISD::ArgFlagsTy Flags); SDValue getValueType(MVT); SDValue getRegister(unsigned Reg, MVT VT); SDValue getDbgStopPoint(DebugLoc DL, SDValue Root, @@ -460,6 +459,12 @@ SDValue N1, SDValue N2, SDValue N3, SDValue N4, SDValue N5); + /// getStackArgumentTokenFactor - Compute a TokenFactor to force all + /// the incoming stack arguments to be loaded from the stack. This is + /// used in tail call lowering to protect stack arguments from being + /// clobbered. + SDValue getStackArgumentTokenFactor(SDValue Chain); + SDValue getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool AlwaysInline, const Value *DstSV, uint64_t DstSVOff, @@ -534,13 +539,6 @@ /// getMergeValues - Create a MERGE_VALUES node from the given operands. SDValue getMergeValues(const SDValue *Ops, unsigned NumOps, DebugLoc dl); - /// getCall - Create a CALL node from the given information. - /// - SDValue getCall(unsigned CallingConv, DebugLoc dl, bool IsVarArgs, - bool IsTailCall, bool isInreg, SDVTList VTs, - const SDValue *Operands, unsigned NumOperands, - unsigned NumFixedArgs); - /// getLoad - Loads are not normal binary operators: their result type is not /// determined by their operands, and they produce a value AND a token chain. /// Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original) +++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Tue Aug 4 20:29:28 2009 @@ -97,7 +97,7 @@ AssertSext, AssertZext, // Various leaf nodes. - BasicBlock, VALUETYPE, ARG_FLAGS, CONDCODE, Register, + BasicBlock, VALUETYPE, CONDCODE, Register, Constant, ConstantFP, GlobalAddress, GlobalTLSAddress, FrameIndex, JumpTable, ConstantPool, ExternalSymbol, @@ -180,38 +180,6 @@ // UNDEF - An undefined node UNDEF, - /// FORMAL_ARGUMENTS(CHAIN, CC#, ISVARARG, FLAG0, ..., FLAGn) - This node - /// represents the formal arguments for a function. CC# is a Constant value - /// indicating the calling convention of the function, and ISVARARG is a - /// flag that indicates whether the function is varargs or not. This node - /// has one result value for each incoming argument, plus one for the output - /// chain. It must be custom legalized. See description of CALL node for - /// FLAG argument contents explanation. - /// - FORMAL_ARGUMENTS, - - /// RV1, RV2...RVn, CHAIN = CALL(CHAIN, CALLEE, - /// ARG0, FLAG0, ARG1, FLAG1, ... ARGn, FLAGn) - /// This node represents a fully general function call, before the legalizer - /// runs. This has one result value for each argument / flag pair, plus - /// a chain result. It must be custom legalized. Flag argument indicates - /// misc. argument attributes. Currently: - /// Bit 0 - signness - /// Bit 1 - 'inreg' attribute - /// Bit 2 - 'sret' attribute - /// Bit 4 - 'byval' attribute - /// Bit 5 - 'nest' attribute - /// Bit 6-9 - alignment of byval structures - /// Bit 10-26 - size of byval structures - /// Bits 31:27 - argument ABI alignment in the first argument piece and - /// alignment '1' in other argument pieces. - /// - /// CALL nodes use the CallSDNode subclass of SDNode, which - /// additionally carries information about the calling convention, - /// whether the call is varargs, and if it's marked as a tail call. - /// - CALL, - // EXTRACT_ELEMENT - This is used to get the lower or upper (determined by // a Constant, which is required to be operand #1) half of the integer or // float value specified as operand #0. This is only for use before @@ -515,12 +483,6 @@ // chain, cc, lhs, rhs, block to branch to if condition is true. BR_CC, - // RET - Return from function. The first operand is the chain, - // and any subsequent operands are pairs of return value and return value - // attributes (see CALL for description of attributes) for the function. - // This operation can have variable number of operands. - RET, - // INLINEASM - Represents an inline asm block. This node always has two // return values: a chain and a flag result. The inputs are as follows: // Operand #0 : Input chain. @@ -2234,80 +2196,41 @@ /// getRawBits - Represent the flags as a bunch of bits. uint64_t getRawBits() const { return Flags; } }; -} - -/// ARG_FLAGSSDNode - Leaf node holding parameter flags. -class ARG_FLAGSSDNode : public SDNode { - ISD::ArgFlagsTy TheFlags; - friend class SelectionDAG; - explicit ARG_FLAGSSDNode(ISD::ArgFlagsTy Flags) - : SDNode(ISD::ARG_FLAGS, DebugLoc::getUnknownLoc(), - getSDVTList(MVT::Other)), TheFlags(Flags) { - } -public: - ISD::ArgFlagsTy getArgFlags() const { return TheFlags; } - - static bool classof(const ARG_FLAGSSDNode *) { return true; } - static bool classof(const SDNode *N) { - return N->getOpcode() == ISD::ARG_FLAGS; - } -}; - -/// CallSDNode - Node for calls -- ISD::CALL. -class CallSDNode : public SDNode { - unsigned CallingConv; - bool IsVarArg; - bool IsTailCall; - unsigned NumFixedArgs; - // We might eventually want a full-blown Attributes for the result; that - // will expand the size of the representation. At the moment we only - // need Inreg. - bool Inreg; - friend class SelectionDAG; - CallSDNode(unsigned cc, DebugLoc dl, bool isvararg, bool istailcall, - bool isinreg, SDVTList VTs, const SDValue *Operands, - unsigned numOperands, unsigned numFixedArgs) - : SDNode(ISD::CALL, dl, VTs, Operands, numOperands), - CallingConv(cc), IsVarArg(isvararg), IsTailCall(istailcall), - NumFixedArgs(numFixedArgs), Inreg(isinreg) {} -public: - unsigned getCallingConv() const { return CallingConv; } - unsigned isVarArg() const { return IsVarArg; } - unsigned isTailCall() const { return IsTailCall; } - unsigned isInreg() const { return Inreg; } - - /// Set this call to not be marked as a tail call. Normally setter - /// methods in SDNodes are unsafe because it breaks the CSE map, - /// but we don't include the tail call flag for calls so it's ok - /// in this case. - void setNotTailCall() { IsTailCall = false; } - - SDValue getChain() const { return getOperand(0); } - SDValue getCallee() const { return getOperand(1); } - - unsigned getNumArgs() const { return (getNumOperands() - 2) / 2; } - unsigned getNumFixedArgs() const { - if (isVarArg()) - return NumFixedArgs; - else - return getNumArgs(); - } - SDValue getArg(unsigned i) const { return getOperand(2+2*i); } - SDValue getArgFlagsVal(unsigned i) const { - return getOperand(3+2*i); - } - ISD::ArgFlagsTy getArgFlags(unsigned i) const { - return cast(getArgFlagsVal(i).getNode())->getArgFlags(); - } - unsigned getNumRetVals() const { return getNumValues() - 1; } - MVT getRetValType(unsigned i) const { return getValueType(i); } + /// InputArg - This struct carries flags and type information about a + /// single incoming (formal) argument or incoming (from the perspective + /// of the caller) return value virtual register. + /// + struct InputArg { + ArgFlagsTy Flags; + MVT VT; + bool Used; + + InputArg() : VT(MVT::Other), Used(false) {} + InputArg(ISD::ArgFlagsTy flags, MVT vt, bool used) + : Flags(flags), VT(vt), Used(used) { + assert(VT.isSimple() && + "InputArg value type must be Simple!"); + } + }; - static bool classof(const CallSDNode *) { return true; } - static bool classof(const SDNode *N) { - return N->getOpcode() == ISD::CALL; - } -}; + /// OutputArg - This struct carries flags and a value for a + /// single outgoing (actual) argument or outgoing (from the perspective + /// of the caller) return value virtual register. + /// + struct OutputArg { + ArgFlagsTy Flags; + SDValue Val; + bool IsFixed; + + OutputArg() : IsFixed(false) {} + OutputArg(ISD::ArgFlagsTy flags, SDValue val, bool isfixed) + : Flags(flags), Val(val), IsFixed(isfixed) { + assert(Val.getValueType().isSimple() && + "OutputArg value type must be Simple!"); + } + }; +} /// VTSDNode - This class is used to represent MVT's, which are used /// to parameterize some operations. @@ -2491,7 +2414,7 @@ /// MostAlignedSDNode - The SDNode class with the greatest alignment /// requirement. /// -typedef ARG_FLAGSSDNode MostAlignedSDNode; +typedef GlobalAddressSDNode MostAlignedSDNode; namespace ISD { /// isNormalLoad - Returns true if the specified node is a non-extending Modified: llvm/trunk/include/llvm/Target/TargetLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetLowering.h (original) +++ llvm/trunk/include/llvm/Target/TargetLowering.h Tue Aug 4 20:29:28 2009 @@ -1091,16 +1091,27 @@ // the SelectionDAGLowering code knows how to lower these. // - /// LowerArguments - This hook must be implemented to indicate how we should - /// lower the arguments for the specified function, into the specified DAG. - virtual void - LowerArguments(Function &F, SelectionDAG &DAG, - SmallVectorImpl& ArgValues, DebugLoc dl); + /// LowerFormalArguments - This hook must be implemented to lower the + /// incoming (formal) arguments, described by the Ins array, into the + /// specified DAG. The implementation should fill in the InVals array + /// with legal-type argument values, and return the resulting token + /// chain value. + /// + virtual SDValue + LowerFormalArguments(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { + assert(0 && "Not Implemented"); + return SDValue(); // this is here to silence compiler errors + } - /// LowerCallTo - This hook lowers an abstract call to a function into an + /// LowerCallTo - This function lowers an abstract call to a function into an /// actual call. This returns a pair of operands. The first element is the /// return value for the function (if RetTy is not VoidTy). The second - /// element is the outgoing token chain. + /// element is the outgoing token chain. It calls LowerCall to do the actual + /// lowering. struct ArgListEntry { SDValue Node; const Type* Ty; @@ -1116,11 +1127,47 @@ isSRet(false), isNest(false), isByVal(false), Alignment(0) { } }; typedef std::vector ArgListTy; - virtual std::pair + std::pair LowerCallTo(SDValue Chain, const Type *RetTy, bool RetSExt, bool RetZExt, bool isVarArg, bool isInreg, unsigned NumFixedArgs, - unsigned CallingConv, bool isTailCall, SDValue Callee, - ArgListTy &Args, SelectionDAG &DAG, DebugLoc dl); + unsigned CallConv, bool isTailCall, bool isReturnValueUsed, + SDValue Callee, ArgListTy &Args, SelectionDAG &DAG, DebugLoc dl); + + /// LowerCall - This hook must be implemented to lower calls into the + /// the specified DAG. The outgoing arguments to the call are described + /// by the Outs array, and the values to be returned by the call are + /// described by the Ins array. The implementation should fill in the + /// InVals array with legal-type return values from the call, and return + /// the resulting token chain value. + /// + /// The isTailCall flag here is normative. If it is true, the + /// implementation must emit a tail call. The + /// IsEligibleForTailCallOptimization hook should be used to catch + /// cases that cannot be handled. + /// + virtual SDValue + LowerCall(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, bool isTailCall, + const SmallVectorImpl &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { + assert(0 && "Not Implemented"); + return SDValue(); // this is here to silence compiler errors + } + + /// LowerReturn - This hook must be implemented to lower outgoing + /// return values, described by the Outs array, into the specified + /// DAG. The implementation should return the resulting token chain + /// value. + /// + virtual SDValue + LowerReturn(SDValue Chain, unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Outs, + DebugLoc dl, SelectionDAG &DAG) { + assert(0 && "Not Implemented"); + return SDValue(); // this is here to silence compiler errors + } /// EmitTargetCodeForMemcpy - Emit target-specific code that performs a /// memcpy. This can be used by targets to provide code sequences for cases @@ -1216,19 +1263,17 @@ /// IsEligibleForTailCallOptimization - Check whether the call is eligible for /// tail call optimization. Targets which want to do tail call optimization - /// should override this function. - virtual bool IsEligibleForTailCallOptimization(CallSDNode *Call, - SDValue Ret, - SelectionDAG &DAG) const { + /// should override this function. + virtual bool + IsEligibleForTailCallOptimization(SDValue Callee, + unsigned CalleeCC, + bool isVarArg, + const SmallVectorImpl &Ins, + SelectionDAG& DAG) const { + // Conservative default: no calls are eligible. return false; } - /// CheckTailCallReturnConstraints - Check whether CALL node immediatly - /// preceeds the RET node and whether the return uses the result of the node - /// or is a void return. This function can be used by the target to determine - /// eligiblity of tail call optimization. - static bool CheckTailCallReturnConstraints(CallSDNode *TheCall, SDValue Ret); - /// GetPossiblePreceedingTailCall - Get preceeding TailCallNodeOpCode node if /// it exists. Skip a possible ISD::TokenFactor. static SDValue GetPossiblePreceedingTailCall(SDValue Chain, Modified: llvm/trunk/include/llvm/Target/TargetSelectionDAG.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetSelectionDAG.td?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetSelectionDAG.td (original) +++ llvm/trunk/include/llvm/Target/TargetSelectionDAG.td Tue Aug 4 20:29:28 2009 @@ -345,7 +345,6 @@ def brcond : SDNode<"ISD::BRCOND" , SDTBrcond, [SDNPHasChain]>; def brind : SDNode<"ISD::BRIND" , SDTBrind, [SDNPHasChain]>; def br : SDNode<"ISD::BR" , SDTBr, [SDNPHasChain]>; -def ret : SDNode<"ISD::RET" , SDTNone, [SDNPHasChain]>; def trap : SDNode<"ISD::TRAP" , SDTNone, [SDNPHasChain, SDNPSideEffect]>; Modified: llvm/trunk/lib/CodeGen/SelectionDAG/CallingConvLower.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/CallingConvLower.cpp?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/CallingConvLower.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/CallingConvLower.cpp Tue Aug 4 20:29:28 2009 @@ -57,15 +57,16 @@ UsedRegs[Reg/32] |= 1 << (Reg&31); } -/// AnalyzeFormalArguments - Analyze an ISD::FORMAL_ARGUMENTS node, +/// AnalyzeFormalArguments - Analyze an array of argument values, /// incorporating info about the formals into this state. -void CCState::AnalyzeFormalArguments(SDNode *TheArgs, CCAssignFn Fn) { - unsigned NumArgs = TheArgs->getNumValues()-1; - +void +CCState::AnalyzeFormalArguments(const SmallVectorImpl &Ins, + CCAssignFn Fn) { + unsigned NumArgs = Ins.size(); + for (unsigned i = 0; i != NumArgs; ++i) { - MVT ArgVT = TheArgs->getValueType(i); - ISD::ArgFlagsTy ArgFlags = - cast(TheArgs->getOperand(3+i))->getArgFlags(); + MVT ArgVT = Ins[i].VT; + ISD::ArgFlagsTy ArgFlags = Ins[i].Flags; if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) { #ifndef NDEBUG cerr << "Formal argument #" << i << " has unhandled type " @@ -76,14 +77,14 @@ } } -/// AnalyzeReturn - Analyze the returned values of an ISD::RET node, +/// AnalyzeReturn - Analyze the returned values of a return, /// incorporating info about the result values into this state. -void CCState::AnalyzeReturn(SDNode *TheRet, CCAssignFn Fn) { +void CCState::AnalyzeReturn(const SmallVectorImpl &Outs, + CCAssignFn Fn) { // Determine which register each value should be copied into. - for (unsigned i = 0, e = TheRet->getNumOperands() / 2; i != e; ++i) { - MVT VT = TheRet->getOperand(i*2+1).getValueType(); - ISD::ArgFlagsTy ArgFlags = - cast(TheRet->getOperand(i*2+2))->getArgFlags(); + for (unsigned i = 0, e = Outs.size(); i != e; ++i) { + MVT VT = Outs[i].Val.getValueType(); + ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) { #ifndef NDEBUG cerr << "Return operand #" << i << " has unhandled type " @@ -95,13 +96,14 @@ } -/// AnalyzeCallOperands - Analyze an ISD::CALL node, incorporating info -/// about the passed values into this state. -void CCState::AnalyzeCallOperands(CallSDNode *TheCall, CCAssignFn Fn) { - unsigned NumOps = TheCall->getNumArgs(); +/// AnalyzeCallOperands - Analyze the outgoing arguments to a call, +/// incorporating info about the passed values into this state. +void CCState::AnalyzeCallOperands(const SmallVectorImpl &Outs, + CCAssignFn Fn) { + unsigned NumOps = Outs.size(); for (unsigned i = 0; i != NumOps; ++i) { - MVT ArgVT = TheCall->getArg(i).getValueType(); - ISD::ArgFlagsTy ArgFlags = TheCall->getArgFlags(i); + MVT ArgVT = Outs[i].Val.getValueType(); + ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) { #ifndef NDEBUG cerr << "Call operand #" << i << " has unhandled type " @@ -131,14 +133,13 @@ } } -/// AnalyzeCallResult - Analyze the return values of an ISD::CALL node, +/// AnalyzeCallResult - Analyze the return values of a call, /// incorporating info about the passed values into this state. -void CCState::AnalyzeCallResult(CallSDNode *TheCall, CCAssignFn Fn) { - for (unsigned i = 0, e = TheCall->getNumRetVals(); i != e; ++i) { - MVT VT = TheCall->getRetValType(i); - ISD::ArgFlagsTy Flags = ISD::ArgFlagsTy(); - if (TheCall->isInreg()) - Flags.setInReg(); +void CCState::AnalyzeCallResult(const SmallVectorImpl &Ins, + CCAssignFn Fn) { + for (unsigned i = 0, e = Ins.size(); i != e; ++i) { + MVT VT = Ins[i].VT; + ISD::ArgFlagsTy Flags = Ins[i].Flags; if (Fn(i, VT, VT, CCValAssign::Full, Flags, *this)) { #ifndef NDEBUG cerr << "Call result #" << i << " has unhandled type " Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Tue Aug 4 20:29:28 2009 @@ -823,11 +823,6 @@ // special case should be done as part of making LegalizeDAG non-recursive. SimpleFinishLegalizing = false; break; - case ISD::CALL: - // FIXME: Legalization for calls requires custom-lowering the call before - // legalizing the operands! (I haven't looked into precisely why.) - SimpleFinishLegalizing = false; - break; case ISD::EXTRACT_ELEMENT: case ISD::FLT_ROUNDS_: case ISD::SADDO: @@ -849,7 +844,6 @@ case ISD::TRAMPOLINE: case ISD::FRAMEADDR: case ISD::RETURNADDR: - case ISD::FORMAL_ARGUMENTS: // These operations lie about being legal: when they claim to be legal, // they should actually be custom-lowered. Action = TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0)); @@ -887,7 +881,6 @@ case ISD::BR_JT: case ISD::BR_CC: case ISD::BRCOND: - case ISD::RET: // Branches tweak the chain to include LastCALLSEQ_END Ops[0] = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Ops[0], LastCALLSEQ_END); @@ -951,37 +944,7 @@ cerr << "NODE: "; Node->dump(&DAG); cerr << "\n"; #endif llvm_unreachable("Do not know how to legalize this operator!"); - case ISD::CALL: - // The only option for this is to custom lower it. - Tmp3 = TLI.LowerOperation(Result.getValue(0), DAG); - assert(Tmp3.getNode() && "Target didn't custom lower this node!"); - // A call within a calling sequence must be legalized to something - // other than the normal CALLSEQ_END. Violating this gets Legalize - // into an infinite loop. - assert ((!IsLegalizingCall || - Node->getOpcode() != ISD::CALL || - Tmp3.getNode()->getOpcode() != ISD::CALLSEQ_END) && - "Nested CALLSEQ_START..CALLSEQ_END not supported."); - - // The number of incoming and outgoing values should match; unless the final - // outgoing value is a flag. - assert((Tmp3.getNode()->getNumValues() == Result.getNode()->getNumValues() || - (Tmp3.getNode()->getNumValues() == Result.getNode()->getNumValues() + 1 && - Tmp3.getNode()->getValueType(Tmp3.getNode()->getNumValues() - 1) == - MVT::Flag)) && - "Lowering call/formal_arguments produced unexpected # results!"); - - // Since CALL/FORMAL_ARGUMENTS nodes produce multiple values, make sure to - // remember that we legalized all of them, so it doesn't get relegalized. - for (unsigned i = 0, e = Tmp3.getNode()->getNumValues(); i != e; ++i) { - if (Tmp3.getNode()->getValueType(i) == MVT::Flag) - continue; - Tmp1 = LegalizeOp(Tmp3.getValue(i)); - if (Op.getResNo() == i) - Tmp2 = Tmp1; - AddLegalizedOperand(SDValue(Node, i), Tmp1); - } - return Tmp2; + case ISD::BUILD_VECTOR: switch (TLI.getOperationAction(ISD::BUILD_VECTOR, Node->getValueType(0))) { default: llvm_unreachable("This action is not supported yet!"); @@ -1905,7 +1868,9 @@ const Type *RetTy = Node->getValueType(0).getTypeForMVT(); std::pair CallInfo = TLI.LowerCallTo(InChain, RetTy, isSigned, !isSigned, false, false, - 0, CallingConv::C, false, Callee, Args, DAG, + 0, CallingConv::C, false, + /*isReturnValueUsed=*/true, + Callee, Args, DAG, Node->getDebugLoc()); // Legalize the call sequence, starting with the chain. This will advance @@ -2311,6 +2276,7 @@ std::pair CallResult = TLI.LowerCallTo(Node->getOperand(0), Type::VoidTy, false, false, false, false, 0, CallingConv::C, false, + /*isReturnValueUsed=*/true, DAG.getExternalSymbol("abort", TLI.getPointerTy()), Args, DAG, dl); Results.push_back(CallResult.second); Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp Tue Aug 4 20:29:28 2009 @@ -1019,7 +1019,9 @@ const Type *RetTy = RetVT.getTypeForMVT(); std::pair CallInfo = TLI.LowerCallTo(DAG.getEntryNode(), RetTy, isSigned, !isSigned, false, - false, 0, CallingConv::C, false, Callee, Args, DAG, dl); + false, 0, CallingConv::C, false, + /*isReturnValueUsed=*/true, + Callee, Args, DAG, dl); return CallInfo.first; } Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp Tue Aug 4 20:29:28 2009 @@ -20,8 +20,8 @@ // type i8 which must be promoted. // // This does not legalize vector manipulations like ISD::BUILD_VECTOR, -// or operations that happen to take a vector which are custom-lowered like -// ISD::CALL; the legalization for such operations never produces nodes +// or operations that happen to take a vector which are custom-lowered; +// the legalization for such operations never produces nodes // with illegal types, so it's okay to put off legalizing them until // SelectionDAG::Legalize runs. // Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Tue Aug 4 20:29:28 2009 @@ -366,9 +366,6 @@ case ISD::ExternalSymbol: llvm_unreachable("Should only be used on nodes with operands"); default: break; // Normal nodes don't need extra info. - case ISD::ARG_FLAGS: - ID.AddInteger(cast(N)->getArgFlags().getRawBits()); - break; case ISD::TargetConstant: case ISD::Constant: ID.AddPointer(cast(N)->getConstantIntValue()); @@ -430,12 +427,6 @@ ID.AddInteger(CP->getTargetFlags()); break; } - case ISD::CALL: { - const CallSDNode *Call = cast(N); - ID.AddInteger(Call->getCallingConv()); - ID.AddInteger(Call->isVarArg()); - break; - } case ISD::LOAD: { const LoadSDNode *LD = cast(N); ID.AddInteger(LD->getMemoryVT().getRawBits()); @@ -1103,20 +1094,6 @@ return SDValue(N, 0); } -SDValue SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) { - FoldingSetNodeID ID; - AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), 0, 0); - ID.AddInteger(Flags.getRawBits()); - void *IP = 0; - if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) - return SDValue(E, 0); - SDNode *N = NodeAllocator.Allocate(); - new (N) ARG_FLAGSSDNode(Flags); - CSEMap.InsertNode(N, IP); - AllNodes.push_back(N); - return SDValue(N, 0); -} - SDValue SelectionDAG::getValueType(MVT VT) { if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size()) ValueTypeNodes.resize(VT.getSimpleVT()+1); @@ -2995,6 +2972,29 @@ return getNode(Opcode, DL, VT, Ops, 5); } +/// getStackArgumentTokenFactor - Compute a TokenFactor to force all +/// the incoming stack arguments to be loaded from the stack. +SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { + SmallVector ArgChains; + + // Include the original chain at the beginning of the list. When this is + // used by target LowerCall hooks, this helps legalize find the + // CALLSEQ_BEGIN node. + ArgChains.push_back(Chain); + + // Add a chain value for each stack argument. + for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), + UE = getEntryNode().getNode()->use_end(); U != UE; ++U) + if (LoadSDNode *L = dyn_cast(*U)) + if (FrameIndexSDNode *FI = dyn_cast(L->getBasePtr())) + if (FI->getIndex() < 0) + ArgChains.push_back(SDValue(L, 1)); + + // Build a tokenfactor for all the chains. + return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, + &ArgChains[0], ArgChains.size()); +} + /// getMemsetValue - Vectorized representation of the memset value /// operand. static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG, @@ -3386,6 +3386,7 @@ std::pair CallResult = TLI.LowerCallTo(Chain, Type::VoidTy, false, false, false, false, 0, CallingConv::C, false, + /*isReturnValueUsed=*/false, getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), TLI.getPointerTy()), Args, *this, dl); @@ -3433,6 +3434,7 @@ std::pair CallResult = TLI.LowerCallTo(Chain, Type::VoidTy, false, false, false, false, 0, CallingConv::C, false, + /*isReturnValueUsed=*/false, getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), TLI.getPointerTy()), Args, *this, dl); @@ -3486,6 +3488,7 @@ std::pair CallResult = TLI.LowerCallTo(Chain, Type::VoidTy, false, false, false, false, 0, CallingConv::C, false, + /*isReturnValueUsed=*/false, getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), TLI.getPointerTy()), Args, *this, dl); @@ -3616,32 +3619,6 @@ } SDValue -SelectionDAG::getCall(unsigned CallingConv, DebugLoc dl, bool IsVarArgs, - bool IsTailCall, bool IsInreg, SDVTList VTs, - const SDValue *Operands, unsigned NumOperands, - unsigned NumFixedArgs) { - // Do not include isTailCall in the folding set profile. - FoldingSetNodeID ID; - AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands); - ID.AddInteger(CallingConv); - ID.AddInteger(IsVarArgs); - void *IP = 0; - if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { - // Instead of including isTailCall in the folding set, we just - // set the flag of the existing node. - if (!IsTailCall) - cast(E)->setNotTailCall(); - return SDValue(E, 0); - } - SDNode *N = NodeAllocator.Allocate(); - new (N) CallSDNode(CallingConv, dl, IsVarArgs, IsTailCall, IsInreg, - VTs, Operands, NumOperands, NumFixedArgs); - CSEMap.InsertNode(N, IP); - AllNodes.push_back(N); - return SDValue(N, 0); -} - -SDValue SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, ISD::LoadExtType ExtType, MVT VT, SDValue Chain, SDValue Ptr, SDValue Offset, @@ -5206,7 +5183,6 @@ case ISD::AssertZext: return "AssertZext"; case ISD::BasicBlock: return "BasicBlock"; - case ISD::ARG_FLAGS: return "ArgFlags"; case ISD::VALUETYPE: return "ValueType"; case ISD::Register: return "Register"; @@ -5254,8 +5230,6 @@ case ISD::EH_LABEL: return "eh_label"; case ISD::DECLARE: return "declare"; case ISD::HANDLENODE: return "handlenode"; - case ISD::FORMAL_ARGUMENTS: return "formal_arguments"; - case ISD::CALL: return "call"; // Unary operators case ISD::FABS: return "fabs"; @@ -5364,7 +5338,6 @@ case ISD::BR_JT: return "br_jt"; case ISD::BRCOND: return "brcond"; case ISD::BR_CC: return "br_cc"; - case ISD::RET: return "ret"; case ISD::CALLSEQ_START: return "callseq_start"; case ISD::CALLSEQ_END: return "callseq_end"; @@ -5566,8 +5539,6 @@ OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">"; else OS << "MO.getOffset() << ">"; - } else if (const ARG_FLAGSSDNode *N = dyn_cast(this)) { - OS << N->getArgFlags().getArgFlagsString(); } else if (const VTSDNode *N = dyn_cast(this)) { OS << ":" << N->getVT().getMVTString(); } Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp Tue Aug 4 20:29:28 2009 @@ -17,6 +17,7 @@ #include "llvm/ADT/SmallSet.h" #include "llvm/Analysis/AliasAnalysis.h" #include "llvm/Constants.h" +#include "llvm/Constants.h" #include "llvm/CallingConv.h" #include "llvm/DerivedTypes.h" #include "llvm/Function.h" @@ -753,6 +754,7 @@ PendingExports.clear(); DAG.clear(); CurDebugLoc = DebugLoc::getUnknownLoc(); + HasTailCall = false; } /// getRoot - Return the current virtual root of the Selection DAG, @@ -934,14 +936,8 @@ void SelectionDAGLowering::visitRet(ReturnInst &I) { - if (I.getNumOperands() == 0) { - DAG.setRoot(DAG.getNode(ISD::RET, getCurDebugLoc(), - MVT::Other, getControlRoot())); - return; - } - - SmallVector NewValues; - NewValues.push_back(getControlRoot()); + SDValue Chain = getControlRoot(); + SmallVector Outs; for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i) { SmallVector ValueVTs; ComputeValueVTs(TLI, I.getOperand(i)->getType(), ValueVTs); @@ -988,14 +984,16 @@ else if (F->paramHasAttr(0, Attribute::ZExt)) Flags.setZExt(); - for (unsigned i = 0; i < NumParts; ++i) { - NewValues.push_back(Parts[i]); - NewValues.push_back(DAG.getArgFlags(Flags)); - } + for (unsigned i = 0; i < NumParts; ++i) + Outs.push_back(ISD::OutputArg(Flags, Parts[i], /*isfixed=*/true)); } } - DAG.setRoot(DAG.getNode(ISD::RET, getCurDebugLoc(), MVT::Other, - &NewValues[0], NewValues.size())); + + bool isVarArg = DAG.getMachineFunction().getFunction()->isVarArg(); + unsigned CallConv = DAG.getMachineFunction().getFunction()->getCallingConv(); + Chain = TLI.LowerReturn(Chain, CallConv, isVarArg, + Outs, getCurDebugLoc(), DAG); + DAG.setRoot(Chain); } /// CopyToExportRegsIfNeeded - If the given value has virtual registers @@ -4346,9 +4344,76 @@ } } +/// Test if the given instruction is in a position to be optimized +/// with a tail-call. This roughly means that it's in a block with +/// a return and there's nothing that needs to be scheduled +/// between it and the return. +/// +/// This function only tests target-independent requirements. +/// For target-dependent requirements, a target should override +/// TargetLowering::IsEligibleForTailCallOptimization. +/// +static bool +isInTailCallPosition(const Instruction *I, Attributes RetAttr, + const TargetLowering &TLI) { + const BasicBlock *ExitBB = I->getParent(); + const TerminatorInst *Term = ExitBB->getTerminator(); + const ReturnInst *Ret = dyn_cast(Term); + const Function *F = ExitBB->getParent(); + + // The block must end in a return statement or an unreachable. + if (!Ret && !isa(Term)) return false; + + // If I will have a chain, make sure no other instruction that will have a + // chain interposes between I and the return. + if (I->mayHaveSideEffects() || I->mayReadFromMemory() || + !I->isSafeToSpeculativelyExecute()) + for (BasicBlock::const_iterator BBI = prior(prior(ExitBB->end())); ; + --BBI) { + if (&*BBI == I) + break; + if (BBI->mayHaveSideEffects() || BBI->mayReadFromMemory() || + !BBI->isSafeToSpeculativelyExecute()) + return false; + } + + // If the block ends with a void return or unreachable, it doesn't matter + // what the call's return type is. + if (!Ret || Ret->getNumOperands() == 0) return true; + + // Conservatively require the attributes of the call to match those of + // the return. + if (F->getAttributes().getRetAttributes() != RetAttr) + return false; + + // Otherwise, make sure the unmodified return value of I is the return value. + for (const Instruction *U = dyn_cast(Ret->getOperand(0)); ; + U = dyn_cast(U->getOperand(0))) { + if (!U) + return false; + if (!U->hasOneUse()) + return false; + if (U == I) + break; + // Check for a truly no-op truncate. + if (isa(U) && + TLI.isTruncateFree(U->getOperand(0)->getType(), U->getType())) + continue; + // Check for a truly no-op bitcast. + if (isa(U) && + (U->getOperand(0)->getType() == U->getType() || + (isa(U->getOperand(0)->getType()) && + isa(U->getType())))) + continue; + // Otherwise it's not a true no-op. + return false; + } + + return true; +} void SelectionDAGLowering::LowerCallTo(CallSite CS, SDValue Callee, - bool IsTailCall, + bool isTailCall, MachineBasicBlock *LandingPad) { const PointerType *PT = cast(CS.getCalledValue()->getType()); const FunctionType *FTy = cast(PT->getElementType()); @@ -4358,8 +4423,9 @@ TargetLowering::ArgListTy Args; TargetLowering::ArgListEntry Entry; Args.reserve(CS.arg_size()); + unsigned j = 1; for (CallSite::arg_iterator i = CS.arg_begin(), e = CS.arg_end(); - i != e; ++i) { + i != e; ++i, ++j) { SDValue ArgNode = getValue(*i); Entry.Node = ArgNode; Entry.Ty = (*i)->getType(); @@ -4385,17 +4451,38 @@ getControlRoot(), BeginLabel)); } + // Check if target-independent constraints permit a tail call here. + // Target-dependent constraints are checked within TLI.LowerCallTo. + if (isTailCall && + !isInTailCallPosition(CS.getInstruction(), + CS.getAttributes().getRetAttributes(), + TLI)) + isTailCall = false; + std::pair Result = TLI.LowerCallTo(getRoot(), CS.getType(), CS.paramHasAttr(0, Attribute::SExt), CS.paramHasAttr(0, Attribute::ZExt), FTy->isVarArg(), CS.paramHasAttr(0, Attribute::InReg), FTy->getNumParams(), CS.getCallingConv(), - IsTailCall && PerformTailCallOpt, + isTailCall, + !CS.getInstruction()->use_empty(), Callee, Args, DAG, getCurDebugLoc()); - if (CS.getType() != Type::VoidTy) + assert((isTailCall || CS.getType() == Type::VoidTy || + Result.first.getNode()) && + "Non-null value expected with non-void non-tail call!"); + assert((isTailCall || Result.second.getNode()) && + "Non-null chain expected with non-tail call!"); + assert((Result.second.getNode() || !Result.first.getNode()) && + "Null value expected with tail call!"); + if (Result.first.getNode()) setValue(CS.getInstruction(), Result.first); - DAG.setRoot(Result.second); + // As a special case, a null chain means that a tail call has + // been emitted and the DAG root is already updated. + if (Result.second.getNode()) + DAG.setRoot(Result.second); + else + HasTailCall = true; if (LandingPad && MMI) { // Insert a label at the end of the invoke call to mark the try range. This @@ -4484,7 +4571,12 @@ else Callee = DAG.getExternalSymbol(RenameFn, TLI.getPointerTy()); - LowerCallTo(&I, Callee, I.isTailCall()); + // Check if we can potentially perform a tail call. More detailed + // checking is be done within LowerCallTo, after more information + // about the call is known. + bool isTailCall = PerformTailCallOpt && I.isTailCall(); + + LowerCallTo(&I, Callee, isTailCall); } @@ -5431,13 +5523,18 @@ Entry.Ty = TLI.getTargetData()->getIntPtrType(); Args.push_back(Entry); + bool isTailCall = PerformTailCallOpt && + isInTailCallPosition(&I, Attribute::None, TLI); std::pair Result = TLI.LowerCallTo(getRoot(), I.getType(), false, false, false, false, - 0, CallingConv::C, PerformTailCallOpt, + 0, CallingConv::C, isTailCall, + /*isReturnValueUsed=*/true, DAG.getExternalSymbol("malloc", IntPtr), Args, DAG, getCurDebugLoc()); - setValue(&I, Result.first); // Pointers always fit in registers - DAG.setRoot(Result.second); + if (Result.first.getNode()) + setValue(&I, Result.first); // Pointers always fit in registers + if (Result.second.getNode()) + DAG.setRoot(Result.second); } void SelectionDAGLowering::visitFree(FreeInst &I) { @@ -5447,12 +5544,16 @@ Entry.Ty = TLI.getTargetData()->getIntPtrType(); Args.push_back(Entry); MVT IntPtr = TLI.getPointerTy(); + bool isTailCall = PerformTailCallOpt && + isInTailCallPosition(&I, Attribute::None, TLI); std::pair Result = TLI.LowerCallTo(getRoot(), Type::VoidTy, false, false, false, false, - 0, CallingConv::C, PerformTailCallOpt, + 0, CallingConv::C, isTailCall, + /*isReturnValueUsed=*/true, DAG.getExternalSymbol("free", IntPtr), Args, DAG, getCurDebugLoc()); - DAG.setRoot(Result.second); + if (Result.second.getNode()) + DAG.setRoot(Result.second); } void SelectionDAGLowering::visitVAStart(CallInst &I) { @@ -5486,154 +5587,24 @@ DAG.getSrcValue(I.getOperand(2)))); } -/// TargetLowering::LowerArguments - This is the default LowerArguments -/// implementation, which just inserts a FORMAL_ARGUMENTS node. FIXME: When all -/// targets are migrated to using FORMAL_ARGUMENTS, this hook should be -/// integrated into SDISel. -void TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG, - SmallVectorImpl &ArgValues, - DebugLoc dl) { - // Add CC# and isVararg as operands to the FORMAL_ARGUMENTS node. - SmallVector Ops; - Ops.push_back(DAG.getRoot()); - Ops.push_back(DAG.getConstant(F.getCallingConv(), getPointerTy())); - Ops.push_back(DAG.getConstant(F.isVarArg(), getPointerTy())); - - // Add one result value for each formal argument. - SmallVector RetVals; - unsigned j = 1; - for (Function::arg_iterator I = F.arg_begin(), E = F.arg_end(); - I != E; ++I, ++j) { - SmallVector ValueVTs; - ComputeValueVTs(*this, I->getType(), ValueVTs); - for (unsigned Value = 0, NumValues = ValueVTs.size(); - Value != NumValues; ++Value) { - MVT VT = ValueVTs[Value]; - const Type *ArgTy = VT.getTypeForMVT(); - ISD::ArgFlagsTy Flags; - unsigned OriginalAlignment = - getTargetData()->getABITypeAlignment(ArgTy); - - if (F.paramHasAttr(j, Attribute::ZExt)) - Flags.setZExt(); - if (F.paramHasAttr(j, Attribute::SExt)) - Flags.setSExt(); - if (F.paramHasAttr(j, Attribute::InReg)) - Flags.setInReg(); - if (F.paramHasAttr(j, Attribute::StructRet)) - Flags.setSRet(); - if (F.paramHasAttr(j, Attribute::ByVal)) { - Flags.setByVal(); - const PointerType *Ty = cast(I->getType()); - const Type *ElementTy = Ty->getElementType(); - unsigned FrameAlign = getByValTypeAlignment(ElementTy); - unsigned FrameSize = getTargetData()->getTypeAllocSize(ElementTy); - // For ByVal, alignment should be passed from FE. BE will guess if - // this info is not there but there are cases it cannot get right. - if (F.getParamAlignment(j)) - FrameAlign = F.getParamAlignment(j); - Flags.setByValAlign(FrameAlign); - Flags.setByValSize(FrameSize); - } - if (F.paramHasAttr(j, Attribute::Nest)) - Flags.setNest(); - Flags.setOrigAlign(OriginalAlignment); - - MVT RegisterVT = getRegisterType(VT); - unsigned NumRegs = getNumRegisters(VT); - for (unsigned i = 0; i != NumRegs; ++i) { - RetVals.push_back(RegisterVT); - ISD::ArgFlagsTy MyFlags = Flags; - if (NumRegs > 1 && i == 0) - MyFlags.setSplit(); - // if it isn't first piece, alignment must be 1 - else if (i > 0) - MyFlags.setOrigAlign(1); - Ops.push_back(DAG.getArgFlags(MyFlags)); - } - } - } - - RetVals.push_back(MVT::Other); - - // Create the node. - SDNode *Result = DAG.getNode(ISD::FORMAL_ARGUMENTS, dl, - DAG.getVTList(&RetVals[0], RetVals.size()), - &Ops[0], Ops.size()).getNode(); - - // Prelower FORMAL_ARGUMENTS. This isn't required for functionality, but - // allows exposing the loads that may be part of the argument access to the - // first DAGCombiner pass. - SDValue TmpRes = LowerOperation(SDValue(Result, 0), DAG); - - // The number of results should match up, except that the lowered one may have - // an extra flag result. - assert((Result->getNumValues() == TmpRes.getNode()->getNumValues() || - (Result->getNumValues()+1 == TmpRes.getNode()->getNumValues() && - TmpRes.getValue(Result->getNumValues()).getValueType() == MVT::Flag)) - && "Lowering produced unexpected number of results!"); - - // The FORMAL_ARGUMENTS node itself is likely no longer needed. - if (Result != TmpRes.getNode() && Result->use_empty()) { - HandleSDNode Dummy(DAG.getRoot()); - DAG.RemoveDeadNode(Result); - } - - Result = TmpRes.getNode(); - - unsigned NumArgRegs = Result->getNumValues() - 1; - DAG.setRoot(SDValue(Result, NumArgRegs)); - - // Set up the return result vector. - unsigned i = 0; - unsigned Idx = 1; - for (Function::arg_iterator I = F.arg_begin(), E = F.arg_end(); I != E; - ++I, ++Idx) { - SmallVector ValueVTs; - ComputeValueVTs(*this, I->getType(), ValueVTs); - for (unsigned Value = 0, NumValues = ValueVTs.size(); - Value != NumValues; ++Value) { - MVT VT = ValueVTs[Value]; - MVT PartVT = getRegisterType(VT); - - unsigned NumParts = getNumRegisters(VT); - SmallVector Parts(NumParts); - for (unsigned j = 0; j != NumParts; ++j) - Parts[j] = SDValue(Result, i++); - - ISD::NodeType AssertOp = ISD::DELETED_NODE; - if (F.paramHasAttr(Idx, Attribute::SExt)) - AssertOp = ISD::AssertSext; - else if (F.paramHasAttr(Idx, Attribute::ZExt)) - AssertOp = ISD::AssertZext; - - ArgValues.push_back(getCopyFromParts(DAG, dl, &Parts[0], NumParts, - PartVT, VT, AssertOp)); - } - } - assert(i == NumArgRegs && "Argument register count mismatch!"); -} - - /// TargetLowering::LowerCallTo - This is the default LowerCallTo -/// implementation, which just inserts an ISD::CALL node, which is later custom -/// lowered by the target to something concrete. FIXME: When all targets are -/// migrated to using ISD::CALL, this hook should be integrated into SDISel. +/// implementation, which just calls LowerCall. +/// FIXME: When all targets are +/// migrated to using LowerCall, this hook should be integrated into SDISel. std::pair TargetLowering::LowerCallTo(SDValue Chain, const Type *RetTy, bool RetSExt, bool RetZExt, bool isVarArg, bool isInreg, unsigned NumFixedArgs, - unsigned CallingConv, bool isTailCall, + unsigned CallConv, bool isTailCall, + bool isReturnValueUsed, SDValue Callee, ArgListTy &Args, SelectionDAG &DAG, DebugLoc dl) { + assert((!isTailCall || PerformTailCallOpt) && "isTailCall set when tail-call optimizations are disabled!"); - SmallVector Ops; - Ops.push_back(Chain); // Op#0 - Chain - Ops.push_back(Callee); - // Handle all of the outgoing arguments. + SmallVector Outs; for (unsigned i = 0, e = Args.size(); i != e; ++i) { SmallVector ValueVTs; ComputeValueVTs(*this, Args[i].Ty, ValueVTs); @@ -5684,74 +5655,91 @@ getCopyToParts(DAG, dl, Op, &Parts[0], NumParts, PartVT, ExtendKind); - for (unsigned i = 0; i != NumParts; ++i) { + for (unsigned j = 0; j != NumParts; ++j) { // if it isn't first piece, alignment must be 1 - ISD::ArgFlagsTy MyFlags = Flags; - if (NumParts > 1 && i == 0) - MyFlags.setSplit(); - else if (i != 0) - MyFlags.setOrigAlign(1); + ISD::OutputArg MyFlags(Flags, Parts[j], i < NumFixedArgs); + if (NumParts > 1 && j == 0) + MyFlags.Flags.setSplit(); + else if (j != 0) + MyFlags.Flags.setOrigAlign(1); - Ops.push_back(Parts[i]); - Ops.push_back(DAG.getArgFlags(MyFlags)); + Outs.push_back(MyFlags); } } } - // Figure out the result value types. We start by making a list of - // the potentially illegal return value types. - SmallVector LoweredRetTys; + // Handle the incoming return values from the call. + SmallVector Ins; SmallVector RetTys; ComputeValueVTs(*this, RetTy, RetTys); - - // Then we translate that to a list of legal types. for (unsigned I = 0, E = RetTys.size(); I != E; ++I) { MVT VT = RetTys[I]; MVT RegisterVT = getRegisterType(VT); unsigned NumRegs = getNumRegisters(VT); - for (unsigned i = 0; i != NumRegs; ++i) - LoweredRetTys.push_back(RegisterVT); + for (unsigned i = 0; i != NumRegs; ++i) { + ISD::InputArg MyFlags; + MyFlags.VT = RegisterVT; + MyFlags.Used = isReturnValueUsed; + if (RetSExt) + MyFlags.Flags.setSExt(); + if (RetZExt) + MyFlags.Flags.setZExt(); + if (isInreg) + MyFlags.Flags.setInReg(); + Ins.push_back(MyFlags); + } } - LoweredRetTys.push_back(MVT::Other); // Always has a chain. + // Check if target-dependent constraints permit a tail call here. + // Target-independent constraints should be checked by the caller. + if (isTailCall && + !IsEligibleForTailCallOptimization(Callee, CallConv, isVarArg, Ins, DAG)) + isTailCall = false; + + SmallVector InVals; + Chain = LowerCall(Chain, Callee, CallConv, isVarArg, isTailCall, + Outs, Ins, dl, DAG, InVals); + assert((!isTailCall || InVals.empty()) && "Tail call had return SDValues!"); + + // For a tail call, the return value is merely live-out and there aren't + // any nodes in the DAG representing it. Return a special value to + // indicate that a tail call has been emitted and no more Instructions + // should be processed in the current block. + if (isTailCall) { + DAG.setRoot(Chain); + return std::make_pair(SDValue(), SDValue()); + } + + // Collect the legal value parts into potentially illegal values + // that correspond to the original function's return values. + ISD::NodeType AssertOp = ISD::DELETED_NODE; + if (RetSExt) + AssertOp = ISD::AssertSext; + else if (RetZExt) + AssertOp = ISD::AssertZext; + SmallVector ReturnValues; + unsigned CurReg = 0; + for (unsigned I = 0, E = RetTys.size(); I != E; ++I) { + MVT VT = RetTys[I]; + MVT RegisterVT = getRegisterType(VT); + unsigned NumRegs = getNumRegisters(VT); - // Create the CALL node. - SDValue Res = DAG.getCall(CallingConv, dl, - isVarArg, isTailCall, isInreg, - DAG.getVTList(&LoweredRetTys[0], - LoweredRetTys.size()), - &Ops[0], Ops.size(), NumFixedArgs - ); - Chain = Res.getValue(LoweredRetTys.size() - 1); - - // Gather up the call result into a single value. - if (RetTy != Type::VoidTy && !RetTys.empty()) { - ISD::NodeType AssertOp = ISD::DELETED_NODE; - - if (RetSExt) - AssertOp = ISD::AssertSext; - else if (RetZExt) - AssertOp = ISD::AssertZext; - - SmallVector ReturnValues; - unsigned RegNo = 0; - for (unsigned I = 0, E = RetTys.size(); I != E; ++I) { - MVT VT = RetTys[I]; - MVT RegisterVT = getRegisterType(VT); - unsigned NumRegs = getNumRegisters(VT); - unsigned RegNoEnd = NumRegs + RegNo; - SmallVector Results; - for (; RegNo != RegNoEnd; ++RegNo) - Results.push_back(Res.getValue(RegNo)); - SDValue ReturnValue = - getCopyFromParts(DAG, dl, &Results[0], NumRegs, RegisterVT, VT, - AssertOp); - ReturnValues.push_back(ReturnValue); - } - Res = DAG.getNode(ISD::MERGE_VALUES, dl, - DAG.getVTList(&RetTys[0], RetTys.size()), - &ReturnValues[0], ReturnValues.size()); - } + SDValue ReturnValue = + getCopyFromParts(DAG, dl, &InVals[CurReg], NumRegs, RegisterVT, VT, + AssertOp); + ReturnValues.push_back(ReturnValue); + CurReg += NumRegs; + } + + // For a function returning void, there is no return value. We can't create + // such a node, so we just return a null return value in that case. In + // that case, nothing will actualy look at the value. + if (ReturnValues.empty()) + return std::make_pair(SDValue(), Chain); + + SDValue Res = DAG.getNode(ISD::MERGE_VALUES, dl, + DAG.getVTList(&RetTys[0], RetTys.size()), + &ReturnValues[0], ReturnValues.size()); return std::make_pair(Res, Chain); } @@ -5789,25 +5777,108 @@ LowerArguments(BasicBlock *LLVMBB) { // If this is the entry block, emit arguments. Function &F = *LLVMBB->getParent(); - SDValue OldRoot = SDL->DAG.getRoot(); - SmallVector Args; - TLI.LowerArguments(F, SDL->DAG, Args, SDL->getCurDebugLoc()); - - unsigned a = 0; - for (Function::arg_iterator AI = F.arg_begin(), E = F.arg_end(); - AI != E; ++AI) { + SelectionDAG &DAG = SDL->DAG; + SDValue OldRoot = DAG.getRoot(); + DebugLoc dl = SDL->getCurDebugLoc(); + const TargetData *TD = TLI.getTargetData(); + + // Set up the incoming argument description vector. + SmallVector Ins; + unsigned Idx = 1; + for (Function::arg_iterator I = F.arg_begin(), E = F.arg_end(); + I != E; ++I, ++Idx) { SmallVector ValueVTs; - ComputeValueVTs(TLI, AI->getType(), ValueVTs); + ComputeValueVTs(TLI, I->getType(), ValueVTs); + bool isArgValueUsed = !I->use_empty(); + for (unsigned Value = 0, NumValues = ValueVTs.size(); + Value != NumValues; ++Value) { + MVT VT = ValueVTs[Value]; + const Type *ArgTy = VT.getTypeForMVT(); + ISD::ArgFlagsTy Flags; + unsigned OriginalAlignment = + TD->getABITypeAlignment(ArgTy); + + if (F.paramHasAttr(Idx, Attribute::ZExt)) + Flags.setZExt(); + if (F.paramHasAttr(Idx, Attribute::SExt)) + Flags.setSExt(); + if (F.paramHasAttr(Idx, Attribute::InReg)) + Flags.setInReg(); + if (F.paramHasAttr(Idx, Attribute::StructRet)) + Flags.setSRet(); + if (F.paramHasAttr(Idx, Attribute::ByVal)) { + Flags.setByVal(); + const PointerType *Ty = cast(I->getType()); + const Type *ElementTy = Ty->getElementType(); + unsigned FrameAlign = TLI.getByValTypeAlignment(ElementTy); + unsigned FrameSize = TD->getTypeAllocSize(ElementTy); + // For ByVal, alignment should be passed from FE. BE will guess if + // this info is not there but there are cases it cannot get right. + if (F.getParamAlignment(Idx)) + FrameAlign = F.getParamAlignment(Idx); + Flags.setByValAlign(FrameAlign); + Flags.setByValSize(FrameSize); + } + if (F.paramHasAttr(Idx, Attribute::Nest)) + Flags.setNest(); + Flags.setOrigAlign(OriginalAlignment); + + MVT RegisterVT = TLI.getRegisterType(VT); + unsigned NumRegs = TLI.getNumRegisters(VT); + for (unsigned i = 0; i != NumRegs; ++i) { + ISD::InputArg MyFlags(Flags, RegisterVT, isArgValueUsed); + if (NumRegs > 1 && i == 0) + MyFlags.Flags.setSplit(); + // if it isn't first piece, alignment must be 1 + else if (i > 0) + MyFlags.Flags.setOrigAlign(1); + Ins.push_back(MyFlags); + } + } + } + + // Call the target to set up the argument values. + SmallVector InVals; + SDValue NewRoot = TLI.LowerFormalArguments(DAG.getRoot(), F.getCallingConv(), + F.isVarArg(), Ins, + dl, DAG, InVals); + DAG.setRoot(NewRoot); + + // Set up the argument values. + unsigned i = 0; + Idx = 1; + for (Function::arg_iterator I = F.arg_begin(), E = F.arg_end(); I != E; + ++I, ++Idx) { + SmallVector ArgValues; + SmallVector ValueVTs; + ComputeValueVTs(TLI, I->getType(), ValueVTs); unsigned NumValues = ValueVTs.size(); - if (!AI->use_empty()) { - SDL->setValue(AI, SDL->DAG.getMergeValues(&Args[a], NumValues, - SDL->getCurDebugLoc())); + for (unsigned Value = 0; Value != NumValues; ++Value) { + MVT VT = ValueVTs[Value]; + MVT PartVT = TLI.getRegisterType(VT); + unsigned NumParts = TLI.getNumRegisters(VT); + + if (!I->use_empty()) { + ISD::NodeType AssertOp = ISD::DELETED_NODE; + if (F.paramHasAttr(Idx, Attribute::SExt)) + AssertOp = ISD::AssertSext; + else if (F.paramHasAttr(Idx, Attribute::ZExt)) + AssertOp = ISD::AssertZext; + + ArgValues.push_back(getCopyFromParts(DAG, dl, &InVals[i], NumParts, + PartVT, VT, AssertOp)); + } + i += NumParts; + } + if (!I->use_empty()) { + SDL->setValue(I, DAG.getMergeValues(&ArgValues[0], NumValues, + SDL->getCurDebugLoc())); // If this argument is live outside of the entry block, insert a copy from // whereever we got it to the vreg that other BB's will reference it as. - SDL->CopyToExportRegsIfNeeded(AI); + SDL->CopyToExportRegsIfNeeded(I); } - a += NumValues; } + assert(i == InVals.size() && "Argument register count mismatch!"); // Finally, if the target has anything special to do, allow it to do so. // FIXME: this should insert code into the DAG! Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.h?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.h (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.h Tue Aug 4 20:29:28 2009 @@ -363,13 +363,20 @@ /// GFI - Garbage collection metadata for the function. GCFunctionInfo *GFI; + /// HasTailCall - This is set to true if a call in the current + /// block has been translated as a tail call. In this case, + /// no subsequent DAG nodes should be created. + /// + bool HasTailCall; + LLVMContext *Context; SelectionDAGLowering(SelectionDAG &dag, TargetLowering &tli, FunctionLoweringInfo &funcinfo, CodeGenOpt::Level ol) : CurDebugLoc(DebugLoc::getUnknownLoc()), - TLI(tli), DAG(dag), FuncInfo(funcinfo), OptLevel(ol), + TLI(tli), DAG(dag), FuncInfo(funcinfo), OptLevel(ol), + HasTailCall(false), Context(dag.getContext()) { } Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Tue Aug 4 20:29:28 2009 @@ -366,140 +366,36 @@ } } -/// IsFixedFrameObjectWithPosOffset - Check if object is a fixed frame object and -/// whether object offset >= 0. -static bool -IsFixedFrameObjectWithPosOffset(MachineFrameInfo *MFI, SDValue Op) { - if (!isa(Op)) return false; - - FrameIndexSDNode * FrameIdxNode = dyn_cast(Op); - int FrameIdx = FrameIdxNode->getIndex(); - return MFI->isFixedObjectIndex(FrameIdx) && - MFI->getObjectOffset(FrameIdx) >= 0; -} - -/// IsPossiblyOverwrittenArgumentOfTailCall - Check if the operand could -/// possibly be overwritten when lowering the outgoing arguments in a tail -/// call. Currently the implementation of this call is very conservative and -/// assumes all arguments sourcing from FORMAL_ARGUMENTS or a CopyFromReg with -/// virtual registers would be overwritten by direct lowering. -static bool IsPossiblyOverwrittenArgumentOfTailCall(SDValue Op, - MachineFrameInfo *MFI) { - RegisterSDNode * OpReg = NULL; - if (Op.getOpcode() == ISD::FORMAL_ARGUMENTS || - (Op.getOpcode()== ISD::CopyFromReg && - (OpReg = dyn_cast(Op.getOperand(1))) && - (OpReg->getReg() >= TargetRegisterInfo::FirstVirtualRegister)) || - (Op.getOpcode() == ISD::LOAD && - IsFixedFrameObjectWithPosOffset(MFI, Op.getOperand(1))) || - (Op.getOpcode() == ISD::MERGE_VALUES && - Op.getOperand(Op.getResNo()).getOpcode() == ISD::LOAD && - IsFixedFrameObjectWithPosOffset(MFI, Op.getOperand(Op.getResNo()). - getOperand(1)))) - return true; - return false; -} - -/// CheckDAGForTailCallsAndFixThem - This Function looks for CALL nodes in the -/// DAG and fixes their tailcall attribute operand. -static void CheckDAGForTailCallsAndFixThem(SelectionDAG &DAG, - const TargetLowering& TLI) { - SDNode * Ret = NULL; - SDValue Terminator = DAG.getRoot(); - - // Find RET node. - if (Terminator.getOpcode() == ISD::RET) { - Ret = Terminator.getNode(); - } - - // Fix tail call attribute of CALL nodes. - for (SelectionDAG::allnodes_iterator BE = DAG.allnodes_begin(), - BI = DAG.allnodes_end(); BI != BE; ) { - --BI; - if (CallSDNode *TheCall = dyn_cast(BI)) { - SDValue OpRet(Ret, 0); - SDValue OpCall(BI, 0); - bool isMarkedTailCall = TheCall->isTailCall(); - // If CALL node has tail call attribute set to true and the call is not - // eligible (no RET or the target rejects) the attribute is fixed to - // false. The TargetLowering::IsEligibleForTailCallOptimization function - // must correctly identify tail call optimizable calls. - if (!isMarkedTailCall) continue; - if (Ret==NULL || - !TLI.IsEligibleForTailCallOptimization(TheCall, OpRet, DAG)) { - // Not eligible. Mark CALL node as non tail call. Note that we - // can modify the call node in place since calls are not CSE'd. - TheCall->setNotTailCall(); - } else { - // Look for tail call clobbered arguments. Emit a series of - // copyto/copyfrom virtual register nodes to protect them. - SmallVector Ops; - SDValue Chain = TheCall->getChain(), InFlag; - Ops.push_back(Chain); - Ops.push_back(TheCall->getCallee()); - for (unsigned i = 0, e = TheCall->getNumArgs(); i != e; ++i) { - SDValue Arg = TheCall->getArg(i); - bool isByVal = TheCall->getArgFlags(i).isByVal(); - MachineFunction &MF = DAG.getMachineFunction(); - MachineFrameInfo *MFI = MF.getFrameInfo(); - if (!isByVal && - IsPossiblyOverwrittenArgumentOfTailCall(Arg, MFI)) { - MVT VT = Arg.getValueType(); - unsigned VReg = MF.getRegInfo(). - createVirtualRegister(TLI.getRegClassFor(VT)); - Chain = DAG.getCopyToReg(Chain, Arg.getDebugLoc(), - VReg, Arg, InFlag); - InFlag = Chain.getValue(1); - Arg = DAG.getCopyFromReg(Chain, Arg.getDebugLoc(), - VReg, VT, InFlag); - Chain = Arg.getValue(1); - InFlag = Arg.getValue(2); - } - Ops.push_back(Arg); - Ops.push_back(TheCall->getArgFlagsVal(i)); - } - // Link in chain of CopyTo/CopyFromReg. - Ops[0] = Chain; - DAG.UpdateNodeOperands(OpCall, Ops.begin(), Ops.size()); - } - } - } -} - void SelectionDAGISel::SelectBasicBlock(BasicBlock *LLVMBB, BasicBlock::iterator Begin, BasicBlock::iterator End) { SDL->setCurrentBasicBlock(BB); - // Lower all of the non-terminator instructions. - for (BasicBlock::iterator I = Begin; I != End; ++I) + // Lower all of the non-terminator instructions. If a call is emitted + // as a tail call, cease emitting nodes for this block. + for (BasicBlock::iterator I = Begin; I != End && !SDL->HasTailCall; ++I) if (!isa(I)) SDL->visit(*I); - // Ensure that all instructions which are used outside of their defining - // blocks are available as virtual registers. Invoke is handled elsewhere. - for (BasicBlock::iterator I = Begin; I != End; ++I) - if (!isa(I) && !isa(I)) - SDL->CopyToExportRegsIfNeeded(I); - - // Handle PHI nodes in successor blocks. - if (End == LLVMBB->end()) { - HandlePHINodesInSuccessorBlocks(LLVMBB); + if (!SDL->HasTailCall) { + // Ensure that all instructions which are used outside of their defining + // blocks are available as virtual registers. Invoke is handled elsewhere. + for (BasicBlock::iterator I = Begin; I != End; ++I) + if (!isa(I) && !isa(I)) + SDL->CopyToExportRegsIfNeeded(I); + + // Handle PHI nodes in successor blocks. + if (End == LLVMBB->end()) { + HandlePHINodesInSuccessorBlocks(LLVMBB); - // Lower the terminator after the copies are emitted. - SDL->visit(*LLVMBB->getTerminator()); + // Lower the terminator after the copies are emitted. + SDL->visit(*LLVMBB->getTerminator()); + } } // Make sure the root of the DAG is up-to-date. CurDAG->setRoot(SDL->getControlRoot()); - // Check whether calls in this block are real tail calls. Fix up CALL nodes - // with correct tailcall attribute so that the target can rely on the tailcall - // attribute indicating whether the call is really eligible for tail call - // optimization. - if (PerformTailCallOpt) - CheckDAGForTailCallsAndFixThem(*CurDAG, TLI); - // Final step, emit the lowered DAG as machine code. CodeGenAndEmitDAG(); SDL->clear(); Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Tue Aug 4 20:29:28 2009 @@ -2584,45 +2584,3 @@ DAG.getConstant(magics.s-1, getShiftAmountTy())); } } - -/// IgnoreHarmlessInstructions - Ignore instructions between a CALL and RET -/// node that don't prevent tail call optimization. -static SDValue IgnoreHarmlessInstructions(SDValue node) { - // Found call return. - if (node.getOpcode() == ISD::CALL) return node; - // Ignore MERGE_VALUES. Will have at least one operand. - if (node.getOpcode() == ISD::MERGE_VALUES) - return IgnoreHarmlessInstructions(node.getOperand(0)); - // Ignore ANY_EXTEND node. - if (node.getOpcode() == ISD::ANY_EXTEND) - return IgnoreHarmlessInstructions(node.getOperand(0)); - if (node.getOpcode() == ISD::TRUNCATE) - return IgnoreHarmlessInstructions(node.getOperand(0)); - // Any other node type. - return node; -} - -bool TargetLowering::CheckTailCallReturnConstraints(CallSDNode *TheCall, - SDValue Ret) { - unsigned NumOps = Ret.getNumOperands(); - // ISD::CALL results:(value0, ..., valuen, chain) - // ISD::RET operands:(chain, value0, flag0, ..., valuen, flagn) - // Value return: - // Check that operand of the RET node sources from the CALL node. The RET node - // has at least two operands. Operand 0 holds the chain. Operand 1 holds the - // value. - // Also we need to check that there is no code in between the call and the - // return. Hence we also check that the incomming chain to the return sources - // from the outgoing chain of the call. - if (NumOps > 1 && - IgnoreHarmlessInstructions(Ret.getOperand(1)) == SDValue(TheCall,0) && - Ret.getOperand(0) == SDValue(TheCall, TheCall->getNumValues()-1)) - return true; - // void return: The RET node has the chain result value of the CALL node as - // input. - if (NumOps == 1 && - Ret.getOperand(0) == SDValue(TheCall, TheCall->getNumValues()-1)) - return true; - - return false; -} Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Tue Aug 4 20:29:28 2009 @@ -295,7 +295,6 @@ setOperationAction(ISD::DBG_STOPPOINT, MVT::Other, Expand); setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand); - setOperationAction(ISD::RET, MVT::Other, Custom); setOperationAction(ISD::GlobalAddress, MVT::i32, Custom); setOperationAction(ISD::ConstantPool, MVT::i32, Custom); setOperationAction(ISD::GLOBAL_OFFSET_TABLE, MVT::i32, Custom); @@ -531,13 +530,6 @@ //===----------------------------------------------------------------------===// // Calling Convention Implementation -// -// The lower operations present on calling convention works on this order: -// LowerCALL (virt regs --> phys regs, virt regs --> stack) -// LowerFORMAL_ARGUMENTS (phys --> virt regs, stack --> virt regs) -// LowerRET (virt regs --> phys regs) -// LowerCALL (phys regs --> virt regs) -// //===----------------------------------------------------------------------===// #include "ARMGenCallingConv.inc" @@ -694,25 +686,21 @@ } } -/// LowerCallResult - Lower the result values of an ISD::CALL into the -/// appropriate copies out of appropriate physical registers. This assumes that -/// Chain/InFlag are the input chain/flag to use, and that TheCall is the call -/// being lowered. The returns a SDNode with the same number of values as the -/// ISD::CALL. -SDNode *ARMTargetLowering:: -LowerCallResult(SDValue Chain, SDValue InFlag, CallSDNode *TheCall, - unsigned CallingConv, SelectionDAG &DAG) { +/// LowerCallResult - Lower the result values of a call into the +/// appropriate copies out of appropriate physical registers. +SDValue +ARMTargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { - DebugLoc dl = TheCall->getDebugLoc(); // Assign locations to each value returned by this call. SmallVector RVLocs; - bool isVarArg = TheCall->isVarArg(); - CCState CCInfo(CallingConv, isVarArg, getTargetMachine(), + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), RVLocs, *DAG.getContext()); - CCInfo.AnalyzeCallResult(TheCall, - CCAssignFnForNode(CallingConv, /* Return*/ true)); - - SmallVector ResultVals; + CCInfo.AnalyzeCallResult(Ins, + CCAssignFnForNode(CallConv, /* Return*/ true)); // Copy all of the result registers out of their specified physreg. for (unsigned i = 0; i != RVLocs.size(); ++i) { @@ -764,13 +752,10 @@ break; } - ResultVals.push_back(Val); + InVals.push_back(Val); } - // Merge everything together with a MERGE_VALUES node. - ResultVals.push_back(Chain); - return DAG.getNode(ISD::MERGE_VALUES, dl, TheCall->getVTList(), - &ResultVals[0], ResultVals.size()).getNode(); + return Chain; } /// CreateCopyOfByValArgument - Make a copy of an aggregate at address specified @@ -790,11 +775,11 @@ /// LowerMemOpCallTo - Store the argument to the stack. SDValue -ARMTargetLowering::LowerMemOpCallTo(CallSDNode *TheCall, SelectionDAG &DAG, - const SDValue &StackPtr, - const CCValAssign &VA, SDValue Chain, - SDValue Arg, ISD::ArgFlagsTy Flags) { - DebugLoc dl = TheCall->getDebugLoc(); +ARMTargetLowering::LowerMemOpCallTo(SDValue Chain, + SDValue StackPtr, SDValue Arg, + DebugLoc dl, SelectionDAG &DAG, + const CCValAssign &VA, + ISD::ArgFlagsTy Flags) { unsigned LocMemOffset = VA.getLocMemOffset(); SDValue PtrOff = DAG.getIntPtrConstant(LocMemOffset); PtrOff = DAG.getNode(ISD::ADD, dl, getPointerTy(), StackPtr, PtrOff); @@ -805,14 +790,13 @@ PseudoSourceValue::getStack(), LocMemOffset); } -void ARMTargetLowering::PassF64ArgInRegs(CallSDNode *TheCall, SelectionDAG &DAG, +void ARMTargetLowering::PassF64ArgInRegs(DebugLoc dl, SelectionDAG &DAG, SDValue Chain, SDValue &Arg, RegsToPassVector &RegsToPass, CCValAssign &VA, CCValAssign &NextVA, SDValue &StackPtr, SmallVector &MemOpChains, ISD::ArgFlagsTy Flags) { - DebugLoc dl = TheCall->getDebugLoc(); SDValue fmrrd = DAG.getNode(ARMISD::FMRRD, dl, DAG.getVTList(MVT::i32, MVT::i32), Arg); @@ -825,27 +809,30 @@ if (StackPtr.getNode() == 0) StackPtr = DAG.getCopyFromReg(Chain, dl, ARM::SP, getPointerTy()); - MemOpChains.push_back(LowerMemOpCallTo(TheCall, DAG, StackPtr, NextVA, - Chain, fmrrd.getValue(1), Flags)); + MemOpChains.push_back(LowerMemOpCallTo(Chain, StackPtr, fmrrd.getValue(1), + dl, DAG, NextVA, + Flags)); } } -/// LowerCALL - Lowering a ISD::CALL node into a callseq_start <- +/// LowerCall - Lowering a call into a callseq_start <- /// ARMISD:CALL <- callseq_end chain. Also add input and output parameter /// nodes. -SDValue ARMTargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG) { - CallSDNode *TheCall = cast(Op.getNode()); - MVT RetVT = TheCall->getRetValType(0); - SDValue Chain = TheCall->getChain(); - unsigned CC = TheCall->getCallingConv(); - bool isVarArg = TheCall->isVarArg(); - SDValue Callee = TheCall->getCallee(); - DebugLoc dl = TheCall->getDebugLoc(); +SDValue +ARMTargetLowering::LowerCall(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, + bool isTailCall, + const SmallVectorImpl &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { // Analyze operands of the call, assigning locations to each operand. SmallVector ArgLocs; - CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs, *DAG.getContext()); - CCInfo.AnalyzeCallOperands(TheCall, CCAssignFnForNode(CC, /* Return*/ false)); + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), ArgLocs, + *DAG.getContext()); + CCInfo.AnalyzeCallOperands(Outs, + CCAssignFnForNode(CallConv, /* Return*/ false)); // Get a count of how many bytes are to be pushed on the stack. unsigned NumBytes = CCInfo.getNextStackOffset(); @@ -865,8 +852,8 @@ i != e; ++i, ++realArgIdx) { CCValAssign &VA = ArgLocs[i]; - SDValue Arg = TheCall->getArg(realArgIdx); - ISD::ArgFlagsTy Flags = TheCall->getArgFlags(realArgIdx); + SDValue Arg = Outs[realArgIdx].Val; + ISD::ArgFlagsTy Flags = Outs[realArgIdx].Flags; // Promote the value if needed. switch (VA.getLocInfo()) { @@ -894,23 +881,23 @@ SDValue Op1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, DAG.getConstant(1, MVT::i32)); - PassF64ArgInRegs(TheCall, DAG, Chain, Op0, RegsToPass, + PassF64ArgInRegs(dl, DAG, Chain, Op0, RegsToPass, VA, ArgLocs[++i], StackPtr, MemOpChains, Flags); VA = ArgLocs[++i]; // skip ahead to next loc if (VA.isRegLoc()) { - PassF64ArgInRegs(TheCall, DAG, Chain, Op1, RegsToPass, + PassF64ArgInRegs(dl, DAG, Chain, Op1, RegsToPass, VA, ArgLocs[++i], StackPtr, MemOpChains, Flags); } else { assert(VA.isMemLoc()); if (StackPtr.getNode() == 0) StackPtr = DAG.getCopyFromReg(Chain, dl, ARM::SP, getPointerTy()); - MemOpChains.push_back(LowerMemOpCallTo(TheCall, DAG, StackPtr, VA, - Chain, Op1, Flags)); + MemOpChains.push_back(LowerMemOpCallTo(Chain, StackPtr, Op1, + dl, DAG, VA, Flags)); } } else { - PassF64ArgInRegs(TheCall, DAG, Chain, Arg, RegsToPass, VA, ArgLocs[++i], + PassF64ArgInRegs(dl, DAG, Chain, Arg, RegsToPass, VA, ArgLocs[++i], StackPtr, MemOpChains, Flags); } } else if (VA.isRegLoc()) { @@ -920,8 +907,8 @@ if (StackPtr.getNode() == 0) StackPtr = DAG.getCopyFromReg(Chain, dl, ARM::SP, getPointerTy()); - MemOpChains.push_back(LowerMemOpCallTo(TheCall, DAG, StackPtr, VA, - Chain, Arg, Flags)); + MemOpChains.push_back(LowerMemOpCallTo(Chain, StackPtr, Arg, + dl, DAG, VA, Flags)); } } @@ -1024,30 +1011,30 @@ Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(NumBytes, true), DAG.getIntPtrConstant(0, true), InFlag); - if (RetVT != MVT::Other) + if (!Ins.empty()) InFlag = Chain.getValue(1); // Handle result values, copying them out of physregs into vregs that we // return. - return SDValue(LowerCallResult(Chain, InFlag, TheCall, CC, DAG), - Op.getResNo()); + return LowerCallResult(Chain, InFlag, CallConv, isVarArg, Ins, + dl, DAG, InVals); } -SDValue ARMTargetLowering::LowerRET(SDValue Op, SelectionDAG &DAG) { - // The chain is always operand #0 - SDValue Chain = Op.getOperand(0); - DebugLoc dl = Op.getDebugLoc(); +SDValue +ARMTargetLowering::LowerReturn(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Outs, + DebugLoc dl, SelectionDAG &DAG) { // CCValAssign - represent the assignment of the return value to a location. SmallVector RVLocs; - unsigned CC = DAG.getMachineFunction().getFunction()->getCallingConv(); - bool isVarArg = DAG.getMachineFunction().getFunction()->isVarArg(); // CCState - Info about the registers and stack slots. - CCState CCInfo(CC, isVarArg, getTargetMachine(), RVLocs, *DAG.getContext()); + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), RVLocs, + *DAG.getContext()); - // Analyze return values of ISD::RET. - CCInfo.AnalyzeReturn(Op.getNode(), CCAssignFnForNode(CC, /* Return */ true)); + // Analyze outgoing return values. + CCInfo.AnalyzeReturn(Outs, CCAssignFnForNode(CallConv, /* Return */ true)); // If this is the first return lowered for this function, add // the regs to the liveout set for the function. @@ -1066,9 +1053,7 @@ CCValAssign &VA = RVLocs[i]; assert(VA.isRegLoc() && "Can only return in registers!"); - // ISD::RET => ret chain, (regnum1,val1), ... - // So i*2+1 index only the regnums - SDValue Arg = Op.getOperand(realRVLocIdx*2+1); + SDValue Arg = Outs[realRVLocIdx].Val; switch (VA.getLocInfo()) { default: llvm_unreachable("Unknown loc info!"); @@ -1172,7 +1157,7 @@ // FIXME: is there useful debug info available here? std::pair CallResult = LowerCallTo(Chain, (const Type *) Type::Int32Ty, false, false, false, false, - 0, CallingConv::C, false, + 0, CallingConv::C, false, /*isReturnValueUsed=*/true, DAG.getExternalSymbol("__tls_get_addr", PtrVT), Args, DAG, dl); return CallResult.first; } @@ -1420,21 +1405,24 @@ } SDValue -ARMTargetLowering::LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG) { +ARMTargetLowering::LowerFormalArguments(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl + &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { + MachineFunction &MF = DAG.getMachineFunction(); MachineFrameInfo *MFI = MF.getFrameInfo(); - SDValue Root = Op.getOperand(0); - DebugLoc dl = Op.getDebugLoc(); - bool isVarArg = cast(Op.getOperand(2))->getZExtValue() != 0; - unsigned CC = MF.getFunction()->getCallingConv(); ARMFunctionInfo *AFI = MF.getInfo(); // Assign locations to all of the incoming arguments. SmallVector ArgLocs; - CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs, *DAG.getContext()); - CCInfo.AnalyzeFormalArguments(Op.getNode(), - CCAssignFnForNode(CC, /* Return*/ false)); + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), ArgLocs, + *DAG.getContext()); + CCInfo.AnalyzeFormalArguments(Ins, + CCAssignFnForNode(CallConv, /* Return*/ false)); SmallVector ArgValues; @@ -1453,17 +1441,17 @@ if (VA.getLocVT() == MVT::v2f64) { SDValue ArgValue1 = GetF64FormalArgument(VA, ArgLocs[++i], - Root, DAG, dl); + Chain, DAG, dl); VA = ArgLocs[++i]; // skip ahead to next loc SDValue ArgValue2 = GetF64FormalArgument(VA, ArgLocs[++i], - Root, DAG, dl); + Chain, DAG, dl); ArgValue = DAG.getNode(ISD::UNDEF, dl, MVT::v2f64); ArgValue = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, ArgValue, ArgValue1, DAG.getIntPtrConstant(0)); ArgValue = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, ArgValue, ArgValue2, DAG.getIntPtrConstant(1)); } else - ArgValue = GetF64FormalArgument(VA, ArgLocs[++i], Root, DAG, dl); + ArgValue = GetF64FormalArgument(VA, ArgLocs[++i], Chain, DAG, dl); } else { TargetRegisterClass *RC; @@ -1478,11 +1466,11 @@ assert((RegVT == MVT::i32 || RegVT == MVT::f32 || (FloatABIType == FloatABI::Hard && RegVT == MVT::f64)) && - "RegVT not supported by FORMAL_ARGUMENTS Lowering"); + "RegVT not supported by formal arguments Lowering"); // Transform the arguments in physical registers into virtual ones. unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC); - ArgValue = DAG.getCopyFromReg(Root, dl, Reg, RegVT); + ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, RegVT); } // If this is an 8 or 16-bit value, it is really passed promoted @@ -1506,7 +1494,7 @@ break; } - ArgValues.push_back(ArgValue); + InVals.push_back(ArgValue); } else { // VA.isRegLoc() @@ -1519,7 +1507,7 @@ // Create load nodes to retrieve arguments from the stack. SDValue FIN = DAG.getFrameIndex(FI, getPointerTy()); - ArgValues.push_back(DAG.getLoad(VA.getValVT(), dl, Root, FIN, NULL, 0)); + InVals.push_back(DAG.getLoad(VA.getValVT(), dl, Chain, FIN, NULL, 0)); } } @@ -1555,25 +1543,21 @@ RC = ARM::GPRRegisterClass; unsigned VReg = MF.addLiveIn(GPRArgRegs[NumGPRs], RC); - SDValue Val = DAG.getCopyFromReg(Root, dl, VReg, MVT::i32); + SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, MVT::i32); SDValue Store = DAG.getStore(Val.getValue(1), dl, Val, FIN, NULL, 0); MemOps.push_back(Store); FIN = DAG.getNode(ISD::ADD, dl, getPointerTy(), FIN, DAG.getConstant(4, getPointerTy())); } if (!MemOps.empty()) - Root = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, - &MemOps[0], MemOps.size()); + Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, + &MemOps[0], MemOps.size()); } else // This will point to the next argument passed via stack. VarArgsFrameIndex = MFI->CreateFixedObject(4, ArgOffset); } - ArgValues.push_back(Root); - - // Return the new list of results. - return DAG.getNode(ISD::MERGE_VALUES, dl, Op.getNode()->getVTList(), - &ArgValues[0], ArgValues.size()).getValue(Op.getResNo()); + return Chain; } /// isFloatingPointZero - Return true if this is +0.0. @@ -2380,8 +2364,6 @@ return Subtarget->isTargetDarwin() ? LowerGlobalAddressDarwin(Op, DAG) : LowerGlobalAddressELF(Op, DAG); case ISD::GlobalTLSAddress: return LowerGlobalTLSAddress(Op, DAG); - case ISD::CALL: return LowerCALL(Op, DAG); - case ISD::RET: return LowerRET(Op, DAG); case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG, Subtarget); case ISD::BR_CC: return LowerBR_CC(Op, DAG, Subtarget); case ISD::BR_JT: return LowerBR_JT(Op, DAG); @@ -2391,7 +2373,6 @@ case ISD::FP_TO_SINT: case ISD::FP_TO_UINT: return LowerFP_TO_INT(Op, DAG); case ISD::FCOPYSIGN: return LowerFCOPYSIGN(Op, DAG); - case ISD::FORMAL_ARGUMENTS: return LowerFORMAL_ARGUMENTS(Op, DAG); case ISD::RETURNADDR: break; case ISD::FRAMEADDR: return LowerFRAMEADDR(Op, DAG); case ISD::GLOBAL_OFFSET_TABLE: return LowerGLOBAL_OFFSET_TABLE(Op, DAG); Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.h?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelLowering.h (original) +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.h Tue Aug 4 20:29:28 2009 @@ -225,7 +225,7 @@ void addQRTypeForNEON(MVT VT); typedef SmallVector, 8> RegsToPassVector; - void PassF64ArgInRegs(CallSDNode *TheCall, SelectionDAG &DAG, + void PassF64ArgInRegs(DebugLoc dl, SelectionDAG &DAG, SDValue Chain, SDValue &Arg, RegsToPassVector &RegsToPass, CCValAssign &VA, CCValAssign &NextVA, @@ -236,15 +236,12 @@ SDValue &Root, SelectionDAG &DAG, DebugLoc dl); CCAssignFn *CCAssignFnForNode(unsigned CC, bool Return) const; - SDValue LowerMemOpCallTo(CallSDNode *TheCall, SelectionDAG &DAG, - const SDValue &StackPtr, const CCValAssign &VA, - SDValue Chain, SDValue Arg, ISD::ArgFlagsTy Flags); - SDNode *LowerCallResult(SDValue Chain, SDValue InFlag, CallSDNode *TheCall, - unsigned CallingConv, SelectionDAG &DAG); - SDValue LowerCALL(SDValue Op, SelectionDAG &DAG); + SDValue LowerMemOpCallTo(SDValue Chain, SDValue StackPtr, SDValue Arg, + DebugLoc dl, SelectionDAG &DAG, + const CCValAssign &VA, + ISD::ArgFlagsTy Flags); SDValue LowerINTRINSIC_W_CHAIN(SDValue Op, SelectionDAG &DAG); SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG); - SDValue LowerRET(SDValue Op, SelectionDAG &DAG); SDValue LowerGlobalAddressDarwin(SDValue Op, SelectionDAG &DAG); SDValue LowerGlobalAddressELF(SDValue Op, SelectionDAG &DAG); SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG); @@ -253,7 +250,6 @@ SDValue LowerToTLSExecModels(GlobalAddressSDNode *GA, SelectionDAG &DAG); SDValue LowerGLOBAL_OFFSET_TABLE(SDValue Op, SelectionDAG &DAG); - SDValue LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG); SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG); SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG); @@ -264,6 +260,33 @@ bool AlwaysInline, const Value *DstSV, uint64_t DstSVOff, const Value *SrcSV, uint64_t SrcSVOff); + SDValue LowerCallResult(SDValue Chain, SDValue InFlag, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + + virtual SDValue + LowerFormalArguments(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + + virtual SDValue + LowerCall(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, + bool isTailCall, + const SmallVectorImpl &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + + virtual SDValue + LowerReturn(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Outs, + DebugLoc dl, SelectionDAG &DAG); }; } Modified: llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp (original) +++ llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp Tue Aug 4 20:29:28 2009 @@ -166,8 +166,6 @@ setOperationAction(ISD::VAARG, MVT::Other, Custom); setOperationAction(ISD::VAARG, MVT::i32, Custom); - setOperationAction(ISD::RET, MVT::Other, Custom); - setOperationAction(ISD::JumpTable, MVT::i64, Custom); setOperationAction(ISD::JumpTable, MVT::i32, Custom); @@ -246,20 +244,21 @@ #include "AlphaGenCallingConv.inc" -SDValue AlphaTargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG) { - CallSDNode *TheCall = cast(Op.getNode()); - SDValue Chain = TheCall->getChain(); - SDValue Callee = TheCall->getCallee(); - bool isVarArg = TheCall->isVarArg(); - DebugLoc dl = Op.getDebugLoc(); - MachineFunction &MF = DAG.getMachineFunction(); - unsigned CC = MF.getFunction()->getCallingConv(); +SDValue +AlphaTargetLowering::LowerCall(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, + bool isTailCall, + const SmallVectorImpl &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { // Analyze operands of the call, assigning locations to each operand. SmallVector ArgLocs; - CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs, *DAG.getContext()); + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), + ArgLocs, *DAG.getContext()); - CCInfo.AnalyzeCallOperands(TheCall, CC_Alpha); + CCInfo.AnalyzeCallOperands(Outs, CC_Alpha); // Get a count of how many bytes are to be pushed on the stack. unsigned NumBytes = CCInfo.getNextStackOffset(); @@ -275,8 +274,7 @@ for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { CCValAssign &VA = ArgLocs[i]; - // Arguments start after the 5 first operands of ISD::CALL - SDValue Arg = TheCall->getArg(i); + SDValue Arg = Outs[i].Val; // Promote the value if needed. switch (VA.getLocInfo()) { @@ -355,30 +353,26 @@ // Handle result values, copying them out of physregs into vregs that we // return. - return SDValue(LowerCallResult(Chain, InFlag, TheCall, CC, DAG), - Op.getResNo()); + return LowerCallResult(Chain, InFlag, CallConv, isVarArg, + Ins, dl, DAG, InVals); } -/// LowerCallResult - Lower the result values of an ISD::CALL into the -/// appropriate copies out of appropriate physical registers. This assumes that -/// Chain/InFlag are the input chain/flag to use, and that TheCall is the call -/// being lowered. Returns a SDNode with the same number of values as the -/// ISD::CALL. -SDNode* +/// LowerCallResult - Lower the result values of a call into the +/// appropriate copies out of appropriate physical registers. +/// +SDValue AlphaTargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag, - CallSDNode *TheCall, - unsigned CallingConv, - SelectionDAG &DAG) { - bool isVarArg = TheCall->isVarArg(); - DebugLoc dl = TheCall->getDebugLoc(); + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { // Assign locations to each value returned by this call. SmallVector RVLocs; - CCState CCInfo(CallingConv, isVarArg, getTargetMachine(), RVLocs, + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), RVLocs, *DAG.getContext()); - CCInfo.AnalyzeCallResult(TheCall, RetCC_Alpha); - SmallVector ResultVals; + CCInfo.AnalyzeCallResult(Ins, RetCC_Alpha); // Copy all of the result registers out of their specified physreg. for (unsigned i = 0; i != RVLocs.size(); ++i) { @@ -402,33 +396,31 @@ if (VA.getLocInfo() != CCValAssign::Full) RetValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), RetValue); - ResultVals.push_back(RetValue); + InVals.push_back(RetValue); } - ResultVals.push_back(Chain); - - // Merge everything together with a MERGE_VALUES node. - return DAG.getNode(ISD::MERGE_VALUES, dl, TheCall->getVTList(), - &ResultVals[0], ResultVals.size()).getNode(); + return Chain; } -static SDValue LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG, - int &VarArgsBase, - int &VarArgsOffset) { +SDValue +AlphaTargetLowering::LowerFormalArguments(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl + &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { + MachineFunction &MF = DAG.getMachineFunction(); MachineFrameInfo *MFI = MF.getFrameInfo(); - std::vector ArgValues; - SDValue Root = Op.getOperand(0); - DebugLoc dl = Op.getDebugLoc(); unsigned args_int[] = { Alpha::R16, Alpha::R17, Alpha::R18, Alpha::R19, Alpha::R20, Alpha::R21}; unsigned args_float[] = { Alpha::F16, Alpha::F17, Alpha::F18, Alpha::F19, Alpha::F20, Alpha::F21}; - for (unsigned ArgNo = 0, e = Op.getNode()->getNumValues()-1; ArgNo != e; ++ArgNo) { + for (unsigned ArgNo = 0, e = Ins.size(); ArgNo != e; ++ArgNo) { SDValue argt; - MVT ObjectVT = Op.getValue(ArgNo).getValueType(); + MVT ObjectVT = Ins[ArgNo].VT; SDValue ArgVal; if (ArgNo < 6) { @@ -438,17 +430,17 @@ case MVT::f64: args_float[ArgNo] = AddLiveIn(MF, args_float[ArgNo], &Alpha::F8RCRegClass); - ArgVal = DAG.getCopyFromReg(Root, dl, args_float[ArgNo], ObjectVT); + ArgVal = DAG.getCopyFromReg(Chain, dl, args_float[ArgNo], ObjectVT); break; case MVT::f32: args_float[ArgNo] = AddLiveIn(MF, args_float[ArgNo], &Alpha::F4RCRegClass); - ArgVal = DAG.getCopyFromReg(Root, dl, args_float[ArgNo], ObjectVT); + ArgVal = DAG.getCopyFromReg(Chain, dl, args_float[ArgNo], ObjectVT); break; case MVT::i64: args_int[ArgNo] = AddLiveIn(MF, args_int[ArgNo], &Alpha::GPRCRegClass); - ArgVal = DAG.getCopyFromReg(Root, dl, args_int[ArgNo], MVT::i64); + ArgVal = DAG.getCopyFromReg(Chain, dl, args_int[ArgNo], MVT::i64); break; } } else { //more args @@ -458,59 +450,58 @@ // Create the SelectionDAG nodes corresponding to a load //from this parameter SDValue FIN = DAG.getFrameIndex(FI, MVT::i64); - ArgVal = DAG.getLoad(ObjectVT, dl, Root, FIN, NULL, 0); + ArgVal = DAG.getLoad(ObjectVT, dl, Chain, FIN, NULL, 0); } - ArgValues.push_back(ArgVal); + InVals.push_back(ArgVal); } // If the functions takes variable number of arguments, copy all regs to stack - bool isVarArg = cast(Op.getOperand(2))->getZExtValue() != 0; if (isVarArg) { - VarArgsOffset = (Op.getNode()->getNumValues()-1) * 8; + VarArgsOffset = Ins.size() * 8; std::vector LS; for (int i = 0; i < 6; ++i) { if (TargetRegisterInfo::isPhysicalRegister(args_int[i])) args_int[i] = AddLiveIn(MF, args_int[i], &Alpha::GPRCRegClass); - SDValue argt = DAG.getCopyFromReg(Root, dl, args_int[i], MVT::i64); + SDValue argt = DAG.getCopyFromReg(Chain, dl, args_int[i], MVT::i64); int FI = MFI->CreateFixedObject(8, -8 * (6 - i)); if (i == 0) VarArgsBase = FI; SDValue SDFI = DAG.getFrameIndex(FI, MVT::i64); - LS.push_back(DAG.getStore(Root, dl, argt, SDFI, NULL, 0)); + LS.push_back(DAG.getStore(Chain, dl, argt, SDFI, NULL, 0)); if (TargetRegisterInfo::isPhysicalRegister(args_float[i])) args_float[i] = AddLiveIn(MF, args_float[i], &Alpha::F8RCRegClass); - argt = DAG.getCopyFromReg(Root, dl, args_float[i], MVT::f64); + argt = DAG.getCopyFromReg(Chain, dl, args_float[i], MVT::f64); FI = MFI->CreateFixedObject(8, - 8 * (12 - i)); SDFI = DAG.getFrameIndex(FI, MVT::i64); - LS.push_back(DAG.getStore(Root, dl, argt, SDFI, NULL, 0)); + LS.push_back(DAG.getStore(Chain, dl, argt, SDFI, NULL, 0)); } //Set up a token factor with all the stack traffic - Root = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &LS[0], LS.size()); + Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &LS[0], LS.size()); } - ArgValues.push_back(Root); - - // Return the new list of results. - return DAG.getNode(ISD::MERGE_VALUES, dl, Op.getNode()->getVTList(), - &ArgValues[0], ArgValues.size()); + return Chain; } -static SDValue LowerRET(SDValue Op, SelectionDAG &DAG) { - DebugLoc dl = Op.getDebugLoc(); - SDValue Copy = DAG.getCopyToReg(Op.getOperand(0), dl, Alpha::R26, - DAG.getNode(AlphaISD::GlobalRetAddr, - DebugLoc::getUnknownLoc(), - MVT::i64), - SDValue()); - switch (Op.getNumOperands()) { +SDValue +AlphaTargetLowering::LowerReturn(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Outs, + DebugLoc dl, SelectionDAG &DAG) { + + SDValue Copy = DAG.getCopyToReg(Chain, dl, Alpha::R26, + DAG.getNode(AlphaISD::GlobalRetAddr, + DebugLoc::getUnknownLoc(), + MVT::i64), + SDValue()); + switch (Outs.size()) { default: llvm_unreachable("Do not know how to return this many arguments!"); - case 1: + case 0: break; //return SDValue(); // ret void is legal - case 3: { - MVT ArgVT = Op.getOperand(1).getValueType(); + case 1: { + MVT ArgVT = Outs[0].Val.getValueType(); unsigned ArgReg; if (ArgVT.isInteger()) ArgReg = Alpha::R0; @@ -519,13 +510,13 @@ ArgReg = Alpha::F0; } Copy = DAG.getCopyToReg(Copy, dl, ArgReg, - Op.getOperand(1), Copy.getValue(1)); + Outs[0].Val, Copy.getValue(1)); if (DAG.getMachineFunction().getRegInfo().liveout_empty()) DAG.getMachineFunction().getRegInfo().addLiveOut(ArgReg); break; } - case 5: { - MVT ArgVT = Op.getOperand(1).getValueType(); + case 2: { + MVT ArgVT = Outs[0].Val.getValueType(); unsigned ArgReg1, ArgReg2; if (ArgVT.isInteger()) { ArgReg1 = Alpha::R0; @@ -536,13 +527,13 @@ ArgReg2 = Alpha::F1; } Copy = DAG.getCopyToReg(Copy, dl, ArgReg1, - Op.getOperand(1), Copy.getValue(1)); + Outs[0].Val, Copy.getValue(1)); if (std::find(DAG.getMachineFunction().getRegInfo().liveout_begin(), DAG.getMachineFunction().getRegInfo().liveout_end(), ArgReg1) == DAG.getMachineFunction().getRegInfo().liveout_end()) DAG.getMachineFunction().getRegInfo().addLiveOut(ArgReg1); Copy = DAG.getCopyToReg(Copy, dl, ArgReg2, - Op.getOperand(3), Copy.getValue(1)); + Outs[1].Val, Copy.getValue(1)); if (std::find(DAG.getMachineFunction().getRegInfo().liveout_begin(), DAG.getMachineFunction().getRegInfo().liveout_end(), ArgReg2) == DAG.getMachineFunction().getRegInfo().liveout_end()) @@ -589,11 +580,6 @@ DebugLoc dl = Op.getDebugLoc(); switch (Op.getOpcode()) { default: llvm_unreachable("Wasn't expecting to be able to lower this!"); - case ISD::FORMAL_ARGUMENTS: return LowerFORMAL_ARGUMENTS(Op, DAG, - VarArgsBase, - VarArgsOffset); - case ISD::CALL: return LowerCALL(Op, DAG); - case ISD::RET: return LowerRET(Op,DAG); case ISD::JumpTable: return LowerJumpTable(Op, DAG); case ISD::INTRINSIC_WO_CHAIN: { Modified: llvm/trunk/lib/Target/Alpha/AlphaISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaISelLowering.h?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/Target/Alpha/AlphaISelLowering.h (original) +++ llvm/trunk/lib/Target/Alpha/AlphaISelLowering.h Tue Aug 4 20:29:28 2009 @@ -82,9 +82,11 @@ // Friendly names for dumps const char *getTargetNodeName(unsigned Opcode) const; - SDValue LowerCALL(SDValue Op, SelectionDAG &DAG); - SDNode *LowerCallResult(SDValue Chain, SDValue InFlag, CallSDNode *TheCall, - unsigned CallingConv, SelectionDAG &DAG); + SDValue LowerCallResult(SDValue Chain, SDValue InFlag, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); ConstraintType getConstraintType(const std::string &Constraint) const; @@ -107,6 +109,26 @@ void LowerVAARG(SDNode *N, SDValue &Chain, SDValue &DataPtr, SelectionDAG &DAG); + virtual SDValue + LowerFormalArguments(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + + virtual SDValue + LowerCall(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, bool isTailCall, + const SmallVectorImpl &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + + virtual SDValue + LowerReturn(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Outs, + DebugLoc dl, SelectionDAG &DAG); }; } Modified: llvm/trunk/lib/Target/Blackfin/BlackfinISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Blackfin/BlackfinISelLowering.cpp?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/Target/Blackfin/BlackfinISelLowering.cpp (original) +++ llvm/trunk/lib/Target/Blackfin/BlackfinISelLowering.cpp Tue Aug 4 20:29:28 2009 @@ -123,9 +123,6 @@ setOperationAction(ISD::VAEND, MVT::Other, Expand); setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); - - // RET must be custom lowered, to meet ABI requirements - setOperationAction(ISD::RET, MVT::Other, Custom); } const char *BlackfinTargetLowering::getTargetNodeName(unsigned Opcode) const { @@ -160,27 +157,23 @@ return DAG.getNode(BFISD::Wrapper, DL, MVT::i32, Op); } -// FORMAL_ARGUMENTS(CHAIN, CC#, ISVARARG, FLAG0, ..., FLAGn) - This node -// represents the formal arguments for a function. CC# is a Constant value -// indicating the calling convention of the function, and ISVARARG is a -// flag that indicates whether the function is varargs or not. This node -// has one result value for each incoming argument, plus one for the output -// chain. -SDValue BlackfinTargetLowering::LowerFORMAL_ARGUMENTS(SDValue Op, - SelectionDAG &DAG) { - DebugLoc dl = Op.getDebugLoc(); - SDValue Root = Op.getOperand(0); - unsigned CC = Op.getConstantOperandVal(1); - bool isVarArg = Op.getConstantOperandVal(2); +SDValue +BlackfinTargetLowering::LowerFormalArguments(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl + &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { + MachineFunction &MF = DAG.getMachineFunction(); MachineFrameInfo *MFI = MF.getFrameInfo(); SmallVector ArgLocs; - CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs, *DAG.getContext()); + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), + ArgLocs, *DAG.getContext()); CCInfo.AllocateStack(12, 4); // ABI requires 12 bytes stack space - CCInfo.AnalyzeFormalArguments(Op.getNode(), CC_Blackfin); + CCInfo.AnalyzeFormalArguments(Ins, CC_Blackfin); - SmallVector ArgValues; for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { CCValAssign &VA = ArgLocs[i]; @@ -193,7 +186,7 @@ unsigned Reg = MF.getRegInfo().createVirtualRegister(RC); MF.getRegInfo().addLiveIn(VA.getLocReg(), Reg); - SDValue ArgValue = DAG.getCopyFromReg(Root, dl, Reg, RegVT); + SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, RegVT); // If this is an 8 or 16-bit value, it is really passed promoted to 32 // bits. Insert an assert[sz]ext to capture this, then truncate to the @@ -208,35 +201,34 @@ if (VA.getLocInfo() != CCValAssign::Full) ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); - ArgValues.push_back(ArgValue); + InVals.push_back(ArgValue); } else { assert(VA.isMemLoc() && "CCValAssign must be RegLoc or MemLoc"); unsigned ObjSize = VA.getLocVT().getStoreSizeInBits()/8; int FI = MFI->CreateFixedObject(ObjSize, VA.getLocMemOffset()); SDValue FIN = DAG.getFrameIndex(FI, MVT::i32); - ArgValues.push_back(DAG.getLoad(VA.getValVT(), dl, Root, FIN, NULL, 0)); + InVals.push_back(DAG.getLoad(VA.getValVT(), dl, Chain, FIN, NULL, 0)); } } - ArgValues.push_back(Root); - - // Return the new list of results. - return DAG.getNode(ISD::MERGE_VALUES, dl, Op.getNode()->getVTList(), - &ArgValues[0], ArgValues.size()).getValue(Op.getResNo()); + return Chain; } -SDValue BlackfinTargetLowering::LowerRET(SDValue Op, SelectionDAG &DAG) { +SDValue +BlackfinTargetLowering::LowerReturn(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Outs, + DebugLoc dl, SelectionDAG &DAG) { + // CCValAssign - represent the assignment of the return value to locations. SmallVector RVLocs; - unsigned CC = DAG.getMachineFunction().getFunction()->getCallingConv(); - bool isVarArg = DAG.getMachineFunction().getFunction()->isVarArg(); - DebugLoc dl = Op.getDebugLoc(); // CCState - Info about the registers and stack slot. - CCState CCInfo(CC, isVarArg, DAG.getTarget(), RVLocs, *DAG.getContext()); + CCState CCInfo(CallConv, isVarArg, DAG.getTarget(), + RVLocs, *DAG.getContext()); - // Analize return values of ISD::RET - CCInfo.AnalyzeReturn(Op.getNode(), RetCC_Blackfin); + // Analize return values. + CCInfo.AnalyzeReturn(Outs, RetCC_Blackfin); // If this is the first return lowered for this function, add the regs to the // liveout set for the function. @@ -245,14 +237,13 @@ DAG.getMachineFunction().getRegInfo().addLiveOut(RVLocs[i].getLocReg()); } - SDValue Chain = Op.getOperand(0); SDValue Flag; // Copy the result values into the output registers. for (unsigned i = 0; i != RVLocs.size(); ++i) { CCValAssign &VA = RVLocs[i]; assert(VA.isRegLoc() && "Can only return in registers!"); - SDValue Opi = Op.getOperand(i*2+1); + SDValue Opi = Outs[i].Val; // Expand to i32 if necessary switch (VA.getLocInfo()) { @@ -268,8 +259,6 @@ Opi = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Opi); break; } - // ISD::RET => ret chain, (regnum1,val1), ... - // So i*2+1 index only the regnums. Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), Opi, SDValue()); // Guarantee that all emitted copies are stuck together with flags. Flag = Chain.getValue(1); @@ -282,20 +271,21 @@ } } -SDValue BlackfinTargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG) { - CallSDNode *TheCall = cast(Op.getNode()); - unsigned CallingConv = TheCall->getCallingConv(); - SDValue Chain = TheCall->getChain(); - SDValue Callee = TheCall->getCallee(); - bool isVarArg = TheCall->isVarArg(); - DebugLoc dl = TheCall->getDebugLoc(); +SDValue +BlackfinTargetLowering::LowerCall(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, + bool isTailCall, + const SmallVectorImpl &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { // Analyze operands of the call, assigning locations to each operand. SmallVector ArgLocs; - CCState CCInfo(CallingConv, isVarArg, DAG.getTarget(), ArgLocs, + CCState CCInfo(CallConv, isVarArg, DAG.getTarget(), ArgLocs, *DAG.getContext()); CCInfo.AllocateStack(12, 4); // ABI requires 12 bytes stack space - CCInfo.AnalyzeCallOperands(TheCall, CC_Blackfin); + CCInfo.AnalyzeCallOperands(Outs, CC_Blackfin); // Get the size of the outgoing arguments stack space requirement. unsigned ArgsSize = CCInfo.getNextStackOffset(); @@ -307,9 +297,7 @@ // Walk the register/memloc assignments, inserting copies/loads. for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { CCValAssign &VA = ArgLocs[i]; - - // Arguments start after the 5 first operands of ISD::CALL - SDValue Arg = TheCall->getArg(i); + SDValue Arg = Outs[i].Val; // Promote the value if needed. switch (VA.getLocInfo()) { @@ -383,11 +371,10 @@ // Assign locations to each value returned by this call. SmallVector RVLocs; - CCState RVInfo(CallingConv, isVarArg, DAG.getTarget(), RVLocs, + CCState RVInfo(CallConv, isVarArg, DAG.getTarget(), RVLocs, *DAG.getContext()); - RVInfo.AnalyzeCallResult(TheCall, RetCC_Blackfin); - SmallVector ResultVals; + RVInfo.AnalyzeCallResult(Ins, RetCC_Blackfin); // Copy all of the result registers out of their specified physreg. for (unsigned i = 0; i != RVLocs.size(); ++i) { @@ -417,16 +404,10 @@ // Truncate to valtype if (RV.getLocInfo() != CCValAssign::Full) Val = DAG.getNode(ISD::TRUNCATE, dl, RV.getValVT(), Val); - ResultVals.push_back(Val); + InVals.push_back(Val); } - ResultVals.push_back(Chain); - - // Merge everything together with a MERGE_VALUES node. - SDValue merge = DAG.getNode(ISD::MERGE_VALUES, dl, - TheCall->getVTList(), &ResultVals[0], - ResultVals.size()); - return merge; + return Chain; } // Expansion of ADDE / SUBE. This is a bit involved since blackfin doesn't have @@ -477,9 +458,6 @@ // Frame & Return address. Currently unimplemented case ISD::FRAMEADDR: return SDValue(); case ISD::RETURNADDR: return SDValue(); - case ISD::FORMAL_ARGUMENTS: return LowerFORMAL_ARGUMENTS(Op, DAG); - case ISD::CALL: return LowerCALL(Op, DAG); - case ISD::RET: return LowerRET(Op, DAG); case ISD::ADDE: case ISD::SUBE: return LowerADDE(Op, DAG); } Modified: llvm/trunk/lib/Target/Blackfin/BlackfinISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Blackfin/BlackfinISelLowering.h?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/Target/Blackfin/BlackfinISelLowering.h (original) +++ llvm/trunk/lib/Target/Blackfin/BlackfinISelLowering.h Tue Aug 4 20:29:28 2009 @@ -51,10 +51,27 @@ private: SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG); SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG); - SDValue LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG); - SDValue LowerRET(SDValue Op, SelectionDAG &DAG); - SDValue LowerCALL(SDValue Op, SelectionDAG &DAG); SDValue LowerADDE(SDValue Op, SelectionDAG &DAG); + + virtual SDValue + LowerFormalArguments(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + virtual SDValue + LowerCall(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, bool isTailCall, + const SmallVectorImpl &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + + virtual SDValue + LowerReturn(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Outs, + DebugLoc dl, SelectionDAG &DAG); }; } // end namespace llvm Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Tue Aug 4 20:29:28 2009 @@ -115,7 +115,9 @@ const Type *RetTy = Op.getNode()->getValueType(0).getTypeForMVT(); std::pair CallInfo = TLI.LowerCallTo(InChain, RetTy, isSigned, !isSigned, false, false, - 0, CallingConv::C, false, Callee, Args, DAG, + 0, CallingConv::C, false, + /*isReturnValueUsed=*/true, + Callee, Args, DAG, Op.getDebugLoc()); return CallInfo.first; @@ -396,9 +398,6 @@ setOperationAction(ISD::JumpTable, VT, Custom); } - // RET must be custom lowered, to meet ABI requirements - setOperationAction(ISD::RET, MVT::Other, Custom); - // VASTART needs to be custom lowered to use the VarArgsFrameIndex setOperationAction(ISD::VASTART , MVT::Other, Custom); @@ -1008,16 +1007,17 @@ return SDValue(); } -static SDValue -LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG, int &VarArgsFrameIndex) -{ +SDValue +SPUTargetLowering::LowerFormalArguments(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl + &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { + MachineFunction &MF = DAG.getMachineFunction(); MachineFrameInfo *MFI = MF.getFrameInfo(); MachineRegisterInfo &RegInfo = MF.getRegInfo(); - SmallVector ArgValues; - SDValue Root = Op.getOperand(0); - bool isVarArg = cast(Op.getOperand(2))->getZExtValue() != 0; - DebugLoc dl = Op.getDebugLoc(); const unsigned *ArgRegs = SPURegisterInfo::getArgRegs(); const unsigned NumArgRegs = SPURegisterInfo::getNumArgRegs(); @@ -1029,9 +1029,8 @@ MVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); // Add DAG nodes to load the arguments or copy them out of registers. - for (unsigned ArgNo = 0, e = Op.getNode()->getNumValues() - 1; - ArgNo != e; ++ArgNo) { - MVT ObjectVT = Op.getValue(ArgNo).getValueType(); + for (unsigned ArgNo = 0, e = Ins.size(); ArgNo != e; ++ArgNo) { + MVT ObjectVT = Ins[ArgNo].VT; unsigned ObjSize = ObjectVT.getSizeInBits()/8; SDValue ArgVal; @@ -1042,7 +1041,7 @@ default: { std::string msg; raw_string_ostream Msg(msg); - Msg << "LowerFORMAL_ARGUMENTS Unhandled argument type: " + Msg << "LowerFormalArguments Unhandled argument type: " << ObjectVT.getMVTString(); llvm_report_error(Msg.str()); } @@ -1079,7 +1078,7 @@ unsigned VReg = RegInfo.createVirtualRegister(ArgRegClass); RegInfo.addLiveIn(ArgRegs[ArgRegIdx], VReg); - ArgVal = DAG.getCopyFromReg(Root, dl, VReg, ObjectVT); + ArgVal = DAG.getCopyFromReg(Chain, dl, VReg, ObjectVT); ++ArgRegIdx; } else { // We need to load the argument to a virtual register if we determined @@ -1087,13 +1086,13 @@ // or we're forced to do vararg int FI = MFI->CreateFixedObject(ObjSize, ArgOffset); SDValue FIN = DAG.getFrameIndex(FI, PtrVT); - ArgVal = DAG.getLoad(ObjectVT, dl, Root, FIN, NULL, 0); + ArgVal = DAG.getLoad(ObjectVT, dl, Chain, FIN, NULL, 0); ArgOffset += StackSlotSize; } - ArgValues.push_back(ArgVal); + InVals.push_back(ArgVal); // Update the chain - Root = ArgVal.getOperand(0); + Chain = ArgVal.getOperand(0); } // vararg handling: @@ -1108,23 +1107,19 @@ VarArgsFrameIndex = MFI->CreateFixedObject(StackSlotSize, ArgOffset); SDValue FIN = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT); SDValue ArgVal = DAG.getRegister(ArgRegs[ArgRegIdx], MVT::v16i8); - SDValue Store = DAG.getStore(Root, dl, ArgVal, FIN, NULL, 0); - Root = Store.getOperand(0); + SDValue Store = DAG.getStore(Chain, dl, ArgVal, FIN, NULL, 0); + Chain = Store.getOperand(0); MemOps.push_back(Store); // Increment address by stack slot size for the next stored argument ArgOffset += StackSlotSize; } if (!MemOps.empty()) - Root = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, - &MemOps[0], MemOps.size()); + Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, + &MemOps[0], MemOps.size()); } - ArgValues.push_back(Root); - - // Return the new list of results. - return DAG.getNode(ISD::MERGE_VALUES, dl, Op.getNode()->getVTList(), - &ArgValues[0], ArgValues.size()); + return Chain; } /// isLSAAddress - Return the immediate to use if the specified @@ -1141,16 +1136,20 @@ return DAG.getConstant((int)C->getZExtValue() >> 2, MVT::i32).getNode(); } -static SDValue -LowerCALL(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) { - CallSDNode *TheCall = cast(Op.getNode()); - SDValue Chain = TheCall->getChain(); - SDValue Callee = TheCall->getCallee(); - unsigned NumOps = TheCall->getNumArgs(); +SDValue +SPUTargetLowering::LowerCall(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, + bool isTailCall, + const SmallVectorImpl &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { + + const SPUSubtarget *ST = SPUTM.getSubtargetImpl(); + unsigned NumOps = Outs.size(); unsigned StackSlotSize = SPUFrameInfo::stackSlotSize(); const unsigned *ArgRegs = SPURegisterInfo::getArgRegs(); const unsigned NumArgRegs = SPURegisterInfo::getNumArgRegs(); - DebugLoc dl = TheCall->getDebugLoc(); // Handy pointer type MVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); @@ -1176,7 +1175,7 @@ SmallVector MemOpChains; for (unsigned i = 0; i != NumOps; ++i) { - SDValue Arg = TheCall->getArg(i); + SDValue Arg = Outs[i].Val; // PtrOff will be used to store the current argument to the stack if a // register cannot be found for it. @@ -1308,50 +1307,46 @@ Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(NumStackBytes, true), DAG.getIntPtrConstant(0, true), InFlag); - if (TheCall->getValueType(0) != MVT::Other) + if (!Ins.empty()) InFlag = Chain.getValue(1); - SDValue ResultVals[3]; - unsigned NumResults = 0; + // If the function returns void, just return the chain. + if (Ins.empty()) + return Chain; // If the call has results, copy the values out of the ret val registers. - switch (TheCall->getValueType(0).getSimpleVT()) { + switch (Ins[0].VT.getSimpleVT()) { default: llvm_unreachable("Unexpected ret value!"); case MVT::Other: break; case MVT::i32: - if (TheCall->getValueType(1) == MVT::i32) { + if (Ins.size() > 1 && Ins[1].VT == MVT::i32) { Chain = DAG.getCopyFromReg(Chain, dl, SPU::R4, MVT::i32, InFlag).getValue(1); - ResultVals[0] = Chain.getValue(0); + InVals.push_back(Chain.getValue(0)); Chain = DAG.getCopyFromReg(Chain, dl, SPU::R3, MVT::i32, Chain.getValue(2)).getValue(1); - ResultVals[1] = Chain.getValue(0); - NumResults = 2; + InVals.push_back(Chain.getValue(0)); } else { Chain = DAG.getCopyFromReg(Chain, dl, SPU::R3, MVT::i32, InFlag).getValue(1); - ResultVals[0] = Chain.getValue(0); - NumResults = 1; + InVals.push_back(Chain.getValue(0)); } break; case MVT::i64: Chain = DAG.getCopyFromReg(Chain, dl, SPU::R3, MVT::i64, InFlag).getValue(1); - ResultVals[0] = Chain.getValue(0); - NumResults = 1; + InVals.push_back(Chain.getValue(0)); break; case MVT::i128: Chain = DAG.getCopyFromReg(Chain, dl, SPU::R3, MVT::i128, InFlag).getValue(1); - ResultVals[0] = Chain.getValue(0); - NumResults = 1; + InVals.push_back(Chain.getValue(0)); break; case MVT::f32: case MVT::f64: - Chain = DAG.getCopyFromReg(Chain, dl, SPU::R3, TheCall->getValueType(0), + Chain = DAG.getCopyFromReg(Chain, dl, SPU::R3, Ins[0].VT, InFlag).getValue(1); - ResultVals[0] = Chain.getValue(0); - NumResults = 1; + InVals.push_back(Chain.getValue(0)); break; case MVT::v2f64: case MVT::v2i64: @@ -1359,31 +1354,25 @@ case MVT::v4i32: case MVT::v8i16: case MVT::v16i8: - Chain = DAG.getCopyFromReg(Chain, dl, SPU::R3, TheCall->getValueType(0), + Chain = DAG.getCopyFromReg(Chain, dl, SPU::R3, Ins[0].VT, InFlag).getValue(1); - ResultVals[0] = Chain.getValue(0); - NumResults = 1; + InVals.push_back(Chain.getValue(0)); break; } - // If the function returns void, just return the chain. - if (NumResults == 0) - return Chain; - - // Otherwise, merge everything together with a MERGE_VALUES node. - ResultVals[NumResults++] = Chain; - SDValue Res = DAG.getMergeValues(ResultVals, NumResults, dl); - return Res.getValue(Op.getResNo()); + return Chain; } -static SDValue -LowerRET(SDValue Op, SelectionDAG &DAG, TargetMachine &TM) { +SDValue +SPUTargetLowering::LowerReturn(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Outs, + DebugLoc dl, SelectionDAG &DAG) { + SmallVector RVLocs; - unsigned CC = DAG.getMachineFunction().getFunction()->getCallingConv(); - bool isVarArg = DAG.getMachineFunction().getFunction()->isVarArg(); - DebugLoc dl = Op.getDebugLoc(); - CCState CCInfo(CC, isVarArg, TM, RVLocs, *DAG.getContext()); - CCInfo.AnalyzeReturn(Op.getNode(), RetCC_SPU); + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), + RVLocs, *DAG.getContext()); + CCInfo.AnalyzeReturn(Outs, RetCC_SPU); // If this is the first return lowered for this function, add the regs to the // liveout set for the function. @@ -1392,7 +1381,6 @@ DAG.getMachineFunction().getRegInfo().addLiveOut(RVLocs[i].getLocReg()); } - SDValue Chain = Op.getOperand(0); SDValue Flag; // Copy the result values into the output registers. @@ -1400,7 +1388,7 @@ CCValAssign &VA = RVLocs[i]; assert(VA.isRegLoc() && "Can only return in registers!"); Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), - Op.getOperand(i*2+1), Flag); + Outs[i].Val, Flag); Flag = Chain.getValue(1); } @@ -2648,12 +2636,6 @@ return LowerJumpTable(Op, DAG, SPUTM.getSubtargetImpl()); case ISD::ConstantFP: return LowerConstantFP(Op, DAG); - case ISD::FORMAL_ARGUMENTS: - return LowerFORMAL_ARGUMENTS(Op, DAG, VarArgsFrameIndex); - case ISD::CALL: - return LowerCALL(Op, DAG, SPUTM.getSubtargetImpl()); - case ISD::RET: - return LowerRET(Op, DAG, getTargetMachine()); // i8, i64 math ops: case ISD::ADD: Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.h?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.h (original) +++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.h Tue Aug 4 20:29:28 2009 @@ -150,6 +150,28 @@ /// getFunctionAlignment - Return the Log2 alignment of this function. virtual unsigned getFunctionAlignment(const Function *F) const; + + virtual SDValue + LowerFormalArguments(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + + virtual SDValue + LowerCall(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, + bool isTailCall, + const SmallVectorImpl &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + + virtual SDValue + LowerReturn(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Outs, + DebugLoc dl, SelectionDAG &DAG); }; } Modified: llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td (original) +++ llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td Tue Aug 4 20:29:28 2009 @@ -4431,13 +4431,6 @@ (ILHr8 imm:$imm)>; //===----------------------------------------------------------------------===// -// Call instruction patterns: -//===----------------------------------------------------------------------===// -// Return void -def : Pat<(ret), - (RET)>; - -//===----------------------------------------------------------------------===// // Zero/Any/Sign extensions //===----------------------------------------------------------------------===// Modified: llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp Tue Aug 4 20:29:28 2009 @@ -80,7 +80,6 @@ setOperationAction(ISD::ROTR, MVT::i8, Expand); setOperationAction(ISD::ROTL, MVT::i16, Expand); setOperationAction(ISD::ROTR, MVT::i16, Expand); - setOperationAction(ISD::RET, MVT::Other, Custom); setOperationAction(ISD::GlobalAddress, MVT::i16, Custom); setOperationAction(ISD::ExternalSymbol, MVT::i16, Custom); setOperationAction(ISD::BR_JT, MVT::Other, Expand); @@ -129,12 +128,9 @@ SDValue MSP430TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) { switch (Op.getOpcode()) { - case ISD::FORMAL_ARGUMENTS: return LowerFORMAL_ARGUMENTS(Op, DAG); case ISD::SHL: // FALLTHROUGH case ISD::SRL: case ISD::SRA: return LowerShifts(Op, DAG); - case ISD::RET: return LowerRET(Op, DAG); - case ISD::CALL: return LowerCALL(Op, DAG); case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG); case ISD::ExternalSymbol: return LowerExternalSymbol(Op, DAG); case ISD::BR_CC: return LowerBR_CC(Op, DAG); @@ -157,27 +153,41 @@ #include "MSP430GenCallingConv.inc" -SDValue MSP430TargetLowering::LowerFORMAL_ARGUMENTS(SDValue Op, - SelectionDAG &DAG) { - unsigned CC = cast(Op.getOperand(1))->getZExtValue(); - switch (CC) { +SDValue +MSP430TargetLowering::LowerFormalArguments(SDValue Chain, + unsigned CallConv, + bool isVarArg, + const SmallVectorImpl + &Ins, + DebugLoc dl, + SelectionDAG &DAG, + SmallVectorImpl &InVals) { + + switch (CallConv) { default: llvm_unreachable("Unsupported calling convention"); case CallingConv::C: case CallingConv::Fast: - return LowerCCCArguments(Op, DAG); + return LowerCCCArguments(Chain, CallConv, isVarArg, Ins, dl, DAG, InVals); } } -SDValue MSP430TargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG) { - CallSDNode *TheCall = cast(Op.getNode()); - unsigned CallingConv = TheCall->getCallingConv(); - switch (CallingConv) { +SDValue +MSP430TargetLowering::LowerCall(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, + bool isTailCall, + const SmallVectorImpl &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { + + switch (CallConv) { default: llvm_unreachable("Unsupported calling convention"); case CallingConv::Fast: case CallingConv::C: - return LowerCCCCallTo(Op, DAG, CallingConv); + return LowerCCCCallTo(Chain, Callee, CallConv, isVarArg, isTailCall, + Outs, Ins, dl, DAG, InVals); } } @@ -185,24 +195,27 @@ /// generate load operations for arguments places on the stack. // FIXME: struct return stuff // FIXME: varargs -SDValue MSP430TargetLowering::LowerCCCArguments(SDValue Op, - SelectionDAG &DAG) { +SDValue +MSP430TargetLowering::LowerCCCArguments(SDValue Chain, + unsigned CallConv, + bool isVarArg, + const SmallVectorImpl + &Ins, + DebugLoc dl, + SelectionDAG &DAG, + SmallVectorImpl &InVals) { MachineFunction &MF = DAG.getMachineFunction(); MachineFrameInfo *MFI = MF.getFrameInfo(); MachineRegisterInfo &RegInfo = MF.getRegInfo(); - SDValue Root = Op.getOperand(0); - bool isVarArg = cast(Op.getOperand(2))->getZExtValue() != 0; - unsigned CC = MF.getFunction()->getCallingConv(); - DebugLoc dl = Op.getDebugLoc(); // Assign locations to all of the incoming arguments. SmallVector ArgLocs; - CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs, *DAG.getContext()); - CCInfo.AnalyzeFormalArguments(Op.getNode(), CC_MSP430); + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), + ArgLocs, *DAG.getContext()); + CCInfo.AnalyzeFormalArguments(Ins, CC_MSP430); assert(!isVarArg && "Varargs not supported yet"); - SmallVector ArgValues; for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { CCValAssign &VA = ArgLocs[i]; if (VA.isRegLoc()) { @@ -212,7 +225,7 @@ default: { #ifndef NDEBUG - cerr << "LowerFORMAL_ARGUMENTS Unhandled argument type: " + cerr << "LowerFormalArguments Unhandled argument type: " << RegVT.getSimpleVT() << "\n"; #endif llvm_unreachable(0); @@ -221,7 +234,7 @@ unsigned VReg = RegInfo.createVirtualRegister(MSP430::GR16RegisterClass); RegInfo.addLiveIn(VA.getLocReg(), VReg); - SDValue ArgValue = DAG.getCopyFromReg(Root, dl, VReg, RegVT); + SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, VReg, RegVT); // If this is an 8-bit value, it is really passed promoted to 16 // bits. Insert an assert[sz]ext to capture this, then truncate to the @@ -236,7 +249,7 @@ if (VA.getLocInfo() != CCValAssign::Full) ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); - ArgValues.push_back(ArgValue); + InVals.push_back(ArgValue); } } else { // Sanity check @@ -244,7 +257,7 @@ // Load the argument to a virtual register unsigned ObjSize = VA.getLocVT().getSizeInBits()/8; if (ObjSize > 2) { - cerr << "LowerFORMAL_ARGUMENTS Unhandled argument type: " + cerr << "LowerFormalArguments Unhandled argument type: " << VA.getLocVT().getSimpleVT() << "\n"; } @@ -254,30 +267,29 @@ // Create the SelectionDAG nodes corresponding to a load //from this parameter SDValue FIN = DAG.getFrameIndex(FI, MVT::i16); - ArgValues.push_back(DAG.getLoad(VA.getLocVT(), dl, Root, FIN, - PseudoSourceValue::getFixedStack(FI), 0)); + InVals.push_back(DAG.getLoad(VA.getLocVT(), dl, Chain, FIN, + PseudoSourceValue::getFixedStack(FI), 0)); } } - ArgValues.push_back(Root); - - // Return the new list of results. - return DAG.getNode(ISD::MERGE_VALUES, dl, Op.getNode()->getVTList(), - &ArgValues[0], ArgValues.size()).getValue(Op.getResNo()); + return Chain; } -SDValue MSP430TargetLowering::LowerRET(SDValue Op, SelectionDAG &DAG) { +SDValue +MSP430TargetLowering::LowerReturn(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Outs, + DebugLoc dl, SelectionDAG &DAG) { + // CCValAssign - represent the assignment of the return value to a location SmallVector RVLocs; - unsigned CC = DAG.getMachineFunction().getFunction()->getCallingConv(); - bool isVarArg = DAG.getMachineFunction().getFunction()->isVarArg(); - DebugLoc dl = Op.getDebugLoc(); // CCState - Info about the registers and stack slot. - CCState CCInfo(CC, isVarArg, getTargetMachine(), RVLocs, *DAG.getContext()); + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), + RVLocs, *DAG.getContext()); - // Analize return values of ISD::RET - CCInfo.AnalyzeReturn(Op.getNode(), RetCC_MSP430); + // Analize return values. + CCInfo.AnalyzeReturn(Outs, RetCC_MSP430); // If this is the first return lowered for this function, add the regs to the // liveout set for the function. @@ -287,8 +299,6 @@ DAG.getMachineFunction().getRegInfo().addLiveOut(RVLocs[i].getLocReg()); } - // The chain is always operand #0 - SDValue Chain = Op.getOperand(0); SDValue Flag; // Copy the result values into the output registers. @@ -296,10 +306,8 @@ CCValAssign &VA = RVLocs[i]; assert(VA.isRegLoc() && "Can only return in registers!"); - // ISD::RET => ret chain, (regnum1,val1), ... - // So i*2+1 index only the regnums Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), - Op.getOperand(i*2+1), Flag); + Outs[i].Val, Flag); // Guarantee that all emitted copies are stuck together, // avoiding something bad. @@ -316,19 +324,21 @@ /// LowerCCCCallTo - functions arguments are copied from virtual regs to /// (physical regs)/(stack frame), CALLSEQ_START and CALLSEQ_END are emitted. /// TODO: sret. -SDValue MSP430TargetLowering::LowerCCCCallTo(SDValue Op, SelectionDAG &DAG, - unsigned CC) { - CallSDNode *TheCall = cast(Op.getNode()); - SDValue Chain = TheCall->getChain(); - SDValue Callee = TheCall->getCallee(); - bool isVarArg = TheCall->isVarArg(); - DebugLoc dl = Op.getDebugLoc(); - +SDValue +MSP430TargetLowering::LowerCCCCallTo(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, + bool isTailCall, + const SmallVectorImpl + &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { // Analyze operands of the call, assigning locations to each operand. SmallVector ArgLocs; - CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs, *DAG.getContext()); + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), + ArgLocs, *DAG.getContext()); - CCInfo.AnalyzeCallOperands(TheCall, CC_MSP430); + CCInfo.AnalyzeCallOperands(Outs, CC_MSP430); // Get a count of how many bytes are to be pushed on the stack. unsigned NumBytes = CCInfo.getNextStackOffset(); @@ -344,8 +354,7 @@ for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { CCValAssign &VA = ArgLocs[i]; - // Arguments start after the 5 first operands of ISD::CALL - SDValue Arg = TheCall->getArg(i); + SDValue Arg = Outs[i].Val; // Promote the value if needed. switch (VA.getLocInfo()) { @@ -434,44 +443,36 @@ // Handle result values, copying them out of physregs into vregs that we // return. - return SDValue(LowerCallResult(Chain, InFlag, TheCall, CC, DAG), - Op.getResNo()); + return LowerCallResult(Chain, InFlag, CallConv, isVarArg, Ins, dl, + DAG, InVals); } -/// LowerCallResult - Lower the result values of an ISD::CALL into the -/// appropriate copies out of appropriate physical registers. This assumes that -/// Chain/InFlag are the input chain/flag to use, and that TheCall is the call -/// being lowered. Returns a SDNode with the same number of values as the -/// ISD::CALL. -SDNode* +/// LowerCallResult - Lower the result values of a call into the +/// appropriate copies out of appropriate physical registers. +/// +SDValue MSP430TargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag, - CallSDNode *TheCall, - unsigned CallingConv, - SelectionDAG &DAG) { - bool isVarArg = TheCall->isVarArg(); - DebugLoc dl = TheCall->getDebugLoc(); + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { // Assign locations to each value returned by this call. SmallVector RVLocs; - CCState CCInfo(CallingConv, isVarArg, getTargetMachine(), + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), RVLocs, *DAG.getContext()); - CCInfo.AnalyzeCallResult(TheCall, RetCC_MSP430); - SmallVector ResultVals; + CCInfo.AnalyzeCallResult(Ins, RetCC_MSP430); // Copy all of the result registers out of their specified physreg. for (unsigned i = 0; i != RVLocs.size(); ++i) { Chain = DAG.getCopyFromReg(Chain, dl, RVLocs[i].getLocReg(), RVLocs[i].getValVT(), InFlag).getValue(1); InFlag = Chain.getValue(2); - ResultVals.push_back(Chain.getValue(0)); + InVals.push_back(Chain.getValue(0)); } - ResultVals.push_back(Chain); - - // Merge everything together with a MERGE_VALUES node. - return DAG.getNode(ISD::MERGE_VALUES, dl, TheCall->getVTList(), - &ResultVals[0], ResultVals.size()).getNode(); + return Chain; } SDValue MSP430TargetLowering::LowerShifts(SDValue Op, Modified: llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.h?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.h (original) +++ llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.h Tue Aug 4 20:29:28 2009 @@ -33,7 +33,7 @@ /// Y = RRC X, rotate right via carry RRC, - /// CALL/TAILCALL - These operations represent an abstract call + /// CALL - These operations represent an abstract call /// instruction, which includes a bunch of information. CALL, @@ -77,10 +77,6 @@ /// getFunctionAlignment - Return the Log2 alignment of this function. virtual unsigned getFunctionAlignment(const Function *F) const; - SDValue LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG); - SDValue LowerCALL(SDValue Op, SelectionDAG &DAG); - SDValue LowerRET(SDValue Op, SelectionDAG &DAG); - SDValue LowerCCCArguments(SDValue Op, SelectionDAG &DAG); SDValue LowerShifts(SDValue Op, SelectionDAG &DAG); SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG); SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG); @@ -88,16 +84,52 @@ SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG); SDValue LowerSIGN_EXTEND(SDValue Op, SelectionDAG &DAG); - SDValue LowerCCCCallTo(SDValue Op, SelectionDAG &DAG, - unsigned CC); - SDNode* LowerCallResult(SDValue Chain, SDValue InFlag, - CallSDNode *TheCall, - unsigned CallingConv, SelectionDAG &DAG); - MachineBasicBlock* EmitInstrWithCustomInserter(MachineInstr *MI, MachineBasicBlock *BB) const; private: + SDValue LowerCCCCallTo(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, + bool isTailCall, + const SmallVectorImpl &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + + SDValue LowerCCCArguments(SDValue Chain, + unsigned CallConv, + bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, + SelectionDAG &DAG, + SmallVectorImpl &InVals); + + SDValue LowerCallResult(SDValue Chain, SDValue InFlag, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + + virtual SDValue + LowerFormalArguments(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + virtual SDValue + LowerCall(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, bool isTailCall, + const SmallVectorImpl &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + + virtual SDValue + LowerReturn(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Outs, + DebugLoc dl, SelectionDAG &DAG); + const MSP430Subtarget &Subtarget; const MSP430TargetMachine &TM; }; Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Tue Aug 4 20:29:28 2009 @@ -94,7 +94,6 @@ // Mips Custom Operations setOperationAction(ISD::GlobalAddress, MVT::i32, Custom); setOperationAction(ISD::GlobalTLSAddress, MVT::i32, Custom); - setOperationAction(ISD::RET, MVT::Other, Custom); setOperationAction(ISD::JumpTable, MVT::i32, Custom); setOperationAction(ISD::ConstantPool, MVT::i32, Custom); setOperationAction(ISD::SELECT, MVT::f32, Custom); @@ -182,16 +181,13 @@ { case ISD::AND: return LowerANDOR(Op, DAG); case ISD::BRCOND: return LowerBRCOND(Op, DAG); - case ISD::CALL: return LowerCALL(Op, DAG); case ISD::ConstantPool: return LowerConstantPool(Op, DAG); case ISD::DYNAMIC_STACKALLOC: return LowerDYNAMIC_STACKALLOC(Op, DAG); - case ISD::FORMAL_ARGUMENTS: return LowerFORMAL_ARGUMENTS(Op, DAG); case ISD::FP_TO_SINT: return LowerFP_TO_SINT(Op, DAG); case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG); case ISD::GlobalTLSAddress: return LowerGlobalTLSAddress(Op, DAG); case ISD::JumpTable: return LowerJumpTable(Op, DAG); case ISD::OR: return LowerANDOR(Op, DAG); - case ISD::RET: return LowerRET(Op, DAG); case ISD::SELECT: return LowerSELECT(Op, DAG); case ISD::SETCC: return LowerSETCC(Op, DAG); } @@ -580,13 +576,6 @@ //===----------------------------------------------------------------------===// // Calling Convention Implementation -// -// The lower operations present on calling convention works on this order: -// LowerCALL (virt regs --> phys regs, virt regs --> stack) -// LowerFORMAL_ARGUMENTS (phys --> virt regs, stack --> virt regs) -// LowerRET (virt regs --> phys regs) -// LowerCALL (phys regs --> virt regs) -// //===----------------------------------------------------------------------===// #include "MipsGenCallingConv.inc" @@ -671,38 +660,37 @@ } //===----------------------------------------------------------------------===// -// CALL Calling Convention Implementation +// Call Calling Convention Implementation //===----------------------------------------------------------------------===// -/// LowerCALL - functions arguments are copied from virtual regs to +/// LowerCall - functions arguments are copied from virtual regs to /// (physical regs)/(stack frame), CALLSEQ_START and CALLSEQ_END are emitted. /// TODO: isVarArg, isTailCall. -SDValue MipsTargetLowering:: -LowerCALL(SDValue Op, SelectionDAG &DAG) -{ - MachineFunction &MF = DAG.getMachineFunction(); - - CallSDNode *TheCall = cast(Op.getNode()); - SDValue Chain = TheCall->getChain(); - SDValue Callee = TheCall->getCallee(); - bool isVarArg = TheCall->isVarArg(); - unsigned CC = TheCall->getCallingConv(); - DebugLoc dl = TheCall->getDebugLoc(); +SDValue +MipsTargetLowering::LowerCall(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, + bool isTailCall, + const SmallVectorImpl &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { + MachineFunction &MF = DAG.getMachineFunction(); MachineFrameInfo *MFI = MF.getFrameInfo(); // Analyze operands of the call, assigning locations to each operand. SmallVector ArgLocs; - CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs, *DAG.getContext()); + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), ArgLocs, + *DAG.getContext()); // To meet O32 ABI, Mips must always allocate 16 bytes on // the stack (even if less than 4 are used as arguments) if (Subtarget->isABI_O32()) { int VTsize = MVT(MVT::i32).getSizeInBits()/8; MFI->CreateFixedObject(VTsize, (VTsize*3)); - CCInfo.AnalyzeCallOperands(TheCall, CC_MipsO32); + CCInfo.AnalyzeCallOperands(Outs, CC_MipsO32); } else - CCInfo.AnalyzeCallOperands(TheCall, CC_Mips); + CCInfo.AnalyzeCallOperands(Outs, CC_Mips); // Get a count of how many bytes are to be pushed on the stack. unsigned NumBytes = CCInfo.getNextStackOffset(); @@ -719,7 +707,7 @@ // Walk the register/memloc assignments, inserting copies/loads. for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { - SDValue Arg = TheCall->getArg(i); + SDValue Arg = Outs[i].Val; CCValAssign &VA = ArgLocs[i]; // Promote the value if needed. @@ -859,76 +847,69 @@ // Handle result values, copying them out of physregs into vregs that we // return. - return SDValue(LowerCallResult(Chain, InFlag, TheCall, CC, DAG), Op.getResNo()); + return LowerCallResult(Chain, InFlag, CallConv, isVarArg, + Ins, dl, DAG, InVals); } -/// LowerCallResult - Lower the result values of an ISD::CALL into the -/// appropriate copies out of appropriate physical registers. This assumes that -/// Chain/InFlag are the input chain/flag to use, and that TheCall is the call -/// being lowered. Returns a SDNode with the same number of values as the -/// ISD::CALL. -SDNode *MipsTargetLowering:: -LowerCallResult(SDValue Chain, SDValue InFlag, CallSDNode *TheCall, - unsigned CallingConv, SelectionDAG &DAG) { - - bool isVarArg = TheCall->isVarArg(); - DebugLoc dl = TheCall->getDebugLoc(); +/// LowerCallResult - Lower the result values of a call into the +/// appropriate copies out of appropriate physical registers. +SDValue +MipsTargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { // Assign locations to each value returned by this call. SmallVector RVLocs; - CCState CCInfo(CallingConv, isVarArg, getTargetMachine(), + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), RVLocs, *DAG.getContext()); - CCInfo.AnalyzeCallResult(TheCall, RetCC_Mips); - SmallVector ResultVals; + CCInfo.AnalyzeCallResult(Ins, RetCC_Mips); // Copy all of the result registers out of their specified physreg. for (unsigned i = 0; i != RVLocs.size(); ++i) { Chain = DAG.getCopyFromReg(Chain, dl, RVLocs[i].getLocReg(), - RVLocs[i].getValVT(), InFlag).getValue(1); + RVLocs[i].getValVT(), InFlag).getValue(1); InFlag = Chain.getValue(2); - ResultVals.push_back(Chain.getValue(0)); + InVals.push_back(Chain.getValue(0)); } - - ResultVals.push_back(Chain); - // Merge everything together with a MERGE_VALUES node. - return DAG.getNode(ISD::MERGE_VALUES, dl, TheCall->getVTList(), - &ResultVals[0], ResultVals.size()).getNode(); + return Chain; } //===----------------------------------------------------------------------===// -// FORMAL_ARGUMENTS Calling Convention Implementation +// Formal Arguments Calling Convention Implementation //===----------------------------------------------------------------------===// -/// LowerFORMAL_ARGUMENTS - transform physical registers into +/// LowerFormalArguments - transform physical registers into /// virtual registers and generate load operations for /// arguments places on the stack. /// TODO: isVarArg -SDValue MipsTargetLowering:: -LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG) -{ - SDValue Root = Op.getOperand(0); +SDValue +MipsTargetLowering::LowerFormalArguments(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl + &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { + MachineFunction &MF = DAG.getMachineFunction(); MachineFrameInfo *MFI = MF.getFrameInfo(); MipsFunctionInfo *MipsFI = MF.getInfo(); - DebugLoc dl = Op.getDebugLoc(); - - bool isVarArg = cast(Op.getOperand(2))->getZExtValue() != 0; - unsigned CC = DAG.getMachineFunction().getFunction()->getCallingConv(); unsigned StackReg = MF.getTarget().getRegisterInfo()->getFrameRegister(MF); // Assign locations to all of the incoming arguments. SmallVector ArgLocs; - CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs, *DAG.getContext()); + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), + ArgLocs, *DAG.getContext()); if (Subtarget->isABI_O32()) - CCInfo.AnalyzeFormalArguments(Op.getNode(), CC_MipsO32); + CCInfo.AnalyzeFormalArguments(Ins, CC_MipsO32); else - CCInfo.AnalyzeFormalArguments(Op.getNode(), CC_Mips); + CCInfo.AnalyzeFormalArguments(Ins, CC_Mips); - SmallVector ArgValues; SDValue StackPtr; unsigned FirstStackArgLoc = (Subtarget->isABI_EABI() ? 0 : 16); @@ -949,12 +930,12 @@ if (!Subtarget->isSingleFloat()) RC = Mips::AFGR64RegisterClass; } else - llvm_unreachable("RegVT not supported by FORMAL_ARGUMENTS Lowering"); + llvm_unreachable("RegVT not supported by LowerFormalArguments Lowering"); // Transform the arguments stored on // physical registers into virtual ones unsigned Reg = AddLiveIn(DAG.getMachineFunction(), VA.getLocReg(), RC); - SDValue ArgValue = DAG.getCopyFromReg(Root, dl, Reg, RegVT); + SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, RegVT); // If this is an 8 or 16-bit value, it has been passed promoted // to 32 bits. Insert an assert[sz]ext to capture this, then @@ -978,14 +959,14 @@ if (RegVT == MVT::i32 && VA.getValVT() == MVT::f64) { unsigned Reg2 = AddLiveIn(DAG.getMachineFunction(), VA.getLocReg()+1, RC); - SDValue ArgValue2 = DAG.getCopyFromReg(Root, dl, Reg2, RegVT); + SDValue ArgValue2 = DAG.getCopyFromReg(Chain, dl, Reg2, RegVT); SDValue Hi = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f32, ArgValue); SDValue Lo = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f32, ArgValue2); ArgValue = DAG.getNode(ISD::BUILD_PAIR, dl, MVT::f64, Lo, Hi); } } - ArgValues.push_back(ArgValue); + InVals.push_back(ArgValue); // To meet ABI, when VARARGS are passed on registers, the registers // must have their values written to the caller stack frame. @@ -1007,7 +988,7 @@ // emit ISD::STORE whichs stores the // parameter value to a stack Location - ArgValues.push_back(DAG.getStore(Root, dl, ArgValue, PtrOff, NULL, 0)); + InVals.push_back(DAG.getStore(Chain, dl, ArgValue, PtrOff, NULL, 0)); } } else { // VA.isRegLoc() @@ -1030,7 +1011,7 @@ // Create load nodes to retrieve arguments from the stack SDValue FIN = DAG.getFrameIndex(FI, getPointerTy()); - ArgValues.push_back(DAG.getLoad(VA.getValVT(), dl, Root, FIN, NULL, 0)); + InVals.push_back(DAG.getLoad(VA.getValVT(), dl, Chain, FIN, NULL, 0)); } } @@ -1043,36 +1024,33 @@ Reg = MF.getRegInfo().createVirtualRegister(getRegClassFor(MVT::i32)); MipsFI->setSRetReturnReg(Reg); } - SDValue Copy = DAG.getCopyToReg(DAG.getEntryNode(), dl, Reg, ArgValues[0]); - Root = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Copy, Root); + SDValue Copy = DAG.getCopyToReg(DAG.getEntryNode(), dl, Reg, InVals[0]); + Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Copy, Chain); } - ArgValues.push_back(Root); - - // Return the new list of results. - return DAG.getNode(ISD::MERGE_VALUES, dl, Op.getNode()->getVTList(), - &ArgValues[0], ArgValues.size()).getValue(Op.getResNo()); + return Chain; } //===----------------------------------------------------------------------===// // Return Value Calling Convention Implementation //===----------------------------------------------------------------------===// -SDValue MipsTargetLowering:: -LowerRET(SDValue Op, SelectionDAG &DAG) -{ +SDValue +MipsTargetLowering::LowerReturn(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Outs, + DebugLoc dl, SelectionDAG &DAG) { + // CCValAssign - represent the assignment of // the return value to a location SmallVector RVLocs; - unsigned CC = DAG.getMachineFunction().getFunction()->getCallingConv(); - bool isVarArg = DAG.getMachineFunction().getFunction()->isVarArg(); - DebugLoc dl = Op.getDebugLoc(); // CCState - Info about the registers and stack slot. - CCState CCInfo(CC, isVarArg, getTargetMachine(), RVLocs, *DAG.getContext()); + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), + RVLocs, *DAG.getContext()); - // Analize return values of ISD::RET - CCInfo.AnalyzeReturn(Op.getNode(), RetCC_Mips); + // Analize return values. + CCInfo.AnalyzeReturn(Outs, RetCC_Mips); // If this is the first return lowered for this function, add // the regs to the liveout set for the function. @@ -1082,8 +1060,6 @@ DAG.getMachineFunction().getRegInfo().addLiveOut(RVLocs[i].getLocReg()); } - // The chain is always operand #0 - SDValue Chain = Op.getOperand(0); SDValue Flag; // Copy the result values into the output registers. @@ -1091,10 +1067,8 @@ CCValAssign &VA = RVLocs[i]; assert(VA.isRegLoc() && "Can only return in registers!"); - // ISD::RET => ret chain, (regnum1,val1), ... - // So i*2+1 index only the regnums Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), - Op.getOperand(i*2+1), Flag); + Outs[i].Val, Flag); // guarantee that all emitted copies are // stuck together, avoiding something bad Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.h?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsISelLowering.h (original) +++ llvm/trunk/lib/Target/Mips/MipsISelLowering.h Tue Aug 4 20:29:28 2009 @@ -89,24 +89,46 @@ const MipsSubtarget *Subtarget; // Lower Operand helpers - SDNode *LowerCallResult(SDValue Chain, SDValue InFlag, CallSDNode *TheCall, - unsigned CallingConv, SelectionDAG &DAG); + SDValue LowerCallResult(SDValue Chain, SDValue InFlag, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); // Lower Operand specifics SDValue LowerANDOR(SDValue Op, SelectionDAG &DAG); SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG); - SDValue LowerCALL(SDValue Op, SelectionDAG &DAG); SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG); SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG); - SDValue LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG); SDValue LowerFP_TO_SINT(SDValue Op, SelectionDAG &DAG); SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG); SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG); SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG); - SDValue LowerRET(SDValue Op, SelectionDAG &DAG); SDValue LowerSELECT(SDValue Op, SelectionDAG &DAG); SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG); + virtual SDValue + LowerFormalArguments(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + + virtual SDValue + LowerCall(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, + bool isTailCall, + const SmallVectorImpl &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + + virtual SDValue + LowerReturn(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Outs, + DebugLoc dl, SelectionDAG &DAG); + virtual MachineBasicBlock *EmitInstrWithCustomInserter(MachineInstr *MI, MachineBasicBlock *MBB) const; Modified: llvm/trunk/lib/Target/Mips/MipsMachineFunction.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsMachineFunction.h?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsMachineFunction.h (original) +++ llvm/trunk/lib/Target/Mips/MipsMachineFunction.h Tue Aug 4 20:29:28 2009 @@ -57,7 +57,7 @@ /// to be used on emitPrologue and processFunctionBeforeFrameFinalized. MipsFIHolder GPHolder; - /// On LowerFORMAL_ARGUMENTS the stack size is unknown, so the Stack + /// On LowerFormalArguments the stack size is unknown, so the Stack /// Pointer Offset calculation of "not in register arguments" must be /// postponed to emitPrologue. SmallVector FnLoadArgs; @@ -65,7 +65,7 @@ // When VarArgs, we must write registers back to caller stack, preserving // on register arguments. Since the stack size is unknown on - // LowerFORMAL_ARGUMENTS, the Stack Pointer Offset calculation must be + // LowerFormalArguments, the Stack Pointer Offset calculation must be // postponed to emitPrologue. SmallVector FnStoreVarArgs; bool HasStoreVarArgs; Modified: llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp Tue Aug 4 20:29:28 2009 @@ -212,7 +212,7 @@ // The emitted instruction will be something like: // lw REGX, 16+StackSize(SP) // -// Since the total stack size is unknown on LowerFORMAL_ARGUMENTS, all +// Since the total stack size is unknown on LowerFormalArguments, all // stack references (ObjectOffset) created to reference the function // arguments, are negative numbers. This way, on eliminateFrameIndex it's // possible to detect those references and the offsets are adjusted to @@ -234,7 +234,7 @@ int TopCPUSavedRegOff = -1, TopFPUSavedRegOff = -1; // Replace the dummy '0' SPOffset by the negative offsets, as explained on - // LowerFORMAL_ARGUMENTS. Leaving '0' for while is necessary to avoid + // LowerFormalArguments. Leaving '0' for while is necessary to avoid // the approach done by calculateFrameObjectOffsets to the stack frame. MipsFI->adjustLoadArgsFI(MFI); MipsFI->adjustStoreVarArgsFI(MFI); @@ -378,7 +378,7 @@ DOUT << "stackSize : " << stackSize << "\n"; #endif - // as explained on LowerFORMAL_ARGUMENTS, detect negative offsets + // as explained on LowerFormalArguments, detect negative offsets // and adjust SPOffsets considering the final stack size. int Offset = ((spOffset < 0) ? (stackSize + (-(spOffset+4))) : (spOffset)); Offset += MI.getOperand(i-1).getImm(); Modified: llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp Tue Aug 4 20:29:28 2009 @@ -268,8 +268,6 @@ setOperationAction(ISD::XOR, MVT::i8, Custom); setOperationAction(ISD::FrameIndex, MVT::i16, Custom); - setOperationAction(ISD::CALL, MVT::i16, Custom); - setOperationAction(ISD::RET, MVT::Other, Custom); setOperationAction(ISD::MUL, MVT::i8, Custom); @@ -410,7 +408,9 @@ const Type *RetTy = RetVT.getTypeForMVT(); std::pair CallInfo = LowerCallTo(DAG.getEntryNode(), RetTy, isSigned, !isSigned, false, - false, 0, CallingConv::C, false, Callee, Args, DAG, dl); + false, 0, CallingConv::C, false, + /*isReturnValueUsed=*/true, + Callee, Args, DAG, dl); return CallInfo.first; } @@ -440,6 +440,7 @@ case PIC16ISD::SUBCC: return "PIC16ISD::SUBCC"; case PIC16ISD::SELECT_ICC: return "PIC16ISD::SELECT_ICC"; case PIC16ISD::BRCOND: return "PIC16ISD::BRCOND"; + case PIC16ISD::RET: return "PIC16ISD::RET"; case PIC16ISD::Dummy: return "PIC16ISD::Dummy"; } } @@ -994,12 +995,8 @@ SDValue Res; unsigned i; switch (Op.getOpcode()) { - case ISD::FORMAL_ARGUMENTS: - Res = LowerFORMAL_ARGUMENTS(Op, DAG); break; case ISD::LOAD: Res = ExpandLoad(Op.getNode(), DAG); break; - case ISD::CALL: - Res = LowerCALL(Op, DAG); break; default: { // All other operations are handled in LowerOperation. Res = LowerOperation(Op, DAG); @@ -1019,8 +1016,6 @@ SDValue PIC16TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) { switch (Op.getOpcode()) { - case ISD::FORMAL_ARGUMENTS: - return LowerFORMAL_ARGUMENTS(Op, DAG); case ISD::ADD: case ISD::ADDC: case ISD::ADDE: @@ -1043,10 +1038,6 @@ case ISD::AND: case ISD::XOR: return LowerBinOp(Op, DAG); - case ISD::CALL: - return LowerCALL(Op, DAG); - case ISD::RET: - return LowerRET(Op, DAG); case ISD::BR_CC: return LowerBR_CC(Op, DAG); case ISD::SELECT_CC: @@ -1091,12 +1082,11 @@ } SDValue PIC16TargetLowering:: -LowerIndirectCallArguments(SDValue Op, SDValue Chain, SDValue InFlag, +LowerIndirectCallArguments(SDValue Chain, SDValue InFlag, SDValue DataAddr_Lo, SDValue DataAddr_Hi, - SelectionDAG &DAG) { - CallSDNode *TheCall = dyn_cast(Op); - unsigned NumOps = TheCall->getNumArgs(); - DebugLoc dl = TheCall->getDebugLoc(); + const SmallVectorImpl &Outs, + DebugLoc dl, SelectionDAG &DAG) { + unsigned NumOps = Outs.size(); // If call has no arguments then do nothing and return. if (NumOps == 0) @@ -1107,10 +1097,10 @@ SDValue Arg, StoreRet; // For PIC16 ABI the arguments come after the return value. - unsigned RetVals = TheCall->getNumRetVals(); + unsigned RetVals = Outs.size(); for (unsigned i = 0, ArgOffset = RetVals; i < NumOps; i++) { // Get the arguments - Arg = TheCall->getArg(i); + Arg = Outs[i].Val; Ops.clear(); Ops.push_back(Chain); @@ -1130,16 +1120,14 @@ } SDValue PIC16TargetLowering:: -LowerDirectCallArguments(SDValue Op, SDValue Chain, SDValue ArgLabel, - SDValue InFlag, SelectionDAG &DAG) { - CallSDNode *TheCall = dyn_cast(Op); - unsigned NumOps = TheCall->getNumArgs(); - DebugLoc dl = TheCall->getDebugLoc(); +LowerDirectCallArguments(SDValue ArgLabel, SDValue Chain, SDValue InFlag, + const SmallVectorImpl &Outs, + DebugLoc dl, SelectionDAG &DAG) { + unsigned NumOps = Outs.size(); std::string Name; SDValue Arg, StoreAt; MVT ArgVT; unsigned Size=0; - unsigned ArgCount=0; // If call has no arguments then do nothing and return. if (NumOps == 0) @@ -1157,9 +1145,9 @@ std::vector Ops; SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Flag); - for (unsigned i=ArgCount, Offset = 0; igetArg(i); + Arg = Outs[i].Val; StoreOffset = (Offset + AddressOffset); // Store the argument on frame @@ -1187,12 +1175,12 @@ } SDValue PIC16TargetLowering:: -LowerIndirectCallReturn (SDValue Op, SDValue Chain, SDValue InFlag, - SDValue DataAddr_Lo, SDValue DataAddr_Hi, - SelectionDAG &DAG) { - CallSDNode *TheCall = dyn_cast(Op); - DebugLoc dl = TheCall->getDebugLoc(); - unsigned RetVals = TheCall->getNumRetVals(); +LowerIndirectCallReturn(SDValue Chain, SDValue InFlag, + SDValue DataAddr_Lo, SDValue DataAddr_Hi, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { + unsigned RetVals = Ins.size(); // If call does not have anything to return // then do nothing and go back. @@ -1200,7 +1188,6 @@ return Chain; // Call has something to return - std::vector ResultVals; SDValue LoadRet; SDVTList Tys = DAG.getVTList(MVT::i8, MVT::Other, MVT::Flag); @@ -1210,23 +1197,20 @@ InFlag); InFlag = getOutFlag(LoadRet); Chain = getChain(LoadRet); - ResultVals.push_back(LoadRet); + InVals.push_back(LoadRet); } - ResultVals.push_back(Chain); - SDValue Res = DAG.getMergeValues(&ResultVals[0], ResultVals.size(), dl); - return Res; + return Chain; } SDValue PIC16TargetLowering:: -LowerDirectCallReturn(SDValue Op, SDValue Chain, SDValue RetLabel, - SDValue InFlag, SelectionDAG &DAG) { - CallSDNode *TheCall = dyn_cast(Op); - DebugLoc dl = TheCall->getDebugLoc(); +LowerDirectCallReturn(SDValue RetLabel, SDValue Chain, SDValue InFlag, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { + // Currently handling primitive types only. They will come in // i8 parts - unsigned RetVals = TheCall->getNumRetVals(); - - std::vector ResultVals; + unsigned RetVals = Ins.size(); // Return immediately if the return type is void if (RetVals == 0) @@ -1252,29 +1236,20 @@ Chain = getChain(LoadRet); Offset++; - ResultVals.push_back(LoadRet); + InVals.push_back(LoadRet); } - // To return use MERGE_VALUES - ResultVals.push_back(Chain); - SDValue Res = DAG.getMergeValues(&ResultVals[0], ResultVals.size(), dl); - return Res; + return Chain; } -SDValue PIC16TargetLowering::LowerRET(SDValue Op, SelectionDAG &DAG) { - SDValue Chain = Op.getOperand(0); - DebugLoc dl = Op.getDebugLoc(); - - if (Op.getNumOperands() == 1) // return void - return Op; +SDValue +PIC16TargetLowering::LowerReturn(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Outs, + DebugLoc dl, SelectionDAG &DAG) { - // return should have odd number of operands - if ((Op.getNumOperands() % 2) == 0 ) { - llvm_unreachable("Do not know how to return this many arguments!"); - } - // Number of values to return - unsigned NumRet = (Op.getNumOperands() / 2); + unsigned NumRet = Outs.size(); // Function returns value always on stack with the offset starting // from 0 @@ -1288,68 +1263,13 @@ SDValue BS = DAG.getConstant(1, MVT::i8); SDValue RetVal; for(unsigned i=0;igetOperand(2*i + 1); + RetVal = Outs[i].Val; Chain = DAG.getNode (PIC16ISD::PIC16Store, dl, MVT::Other, Chain, RetVal, ES, BS, DAG.getConstant (i, MVT::i8)); } - return DAG.getNode(ISD::RET, dl, MVT::Other, Chain); -} - -// CALL node may have some operands non-legal to PIC16. Generate new CALL -// node with all the operands legal. -// Currently only Callee operand of the CALL node is non-legal. This function -// legalizes the Callee operand and uses all other operands as are to generate -// new CALL node. - -SDValue PIC16TargetLowering::LegalizeCALL(SDValue Op, SelectionDAG &DAG) { - CallSDNode *TheCall = dyn_cast(Op); - SDValue Chain = TheCall->getChain(); - SDValue Callee = TheCall->getCallee(); - DebugLoc dl = TheCall->getDebugLoc(); - unsigned i =0; - - assert(Callee.getValueType() == MVT::i16 && - "Don't know how to legalize this call node!!!"); - assert(Callee.getOpcode() == ISD::BUILD_PAIR && - "Don't know how to legalize this call node!!!"); - - if (isDirectAddress(Callee)) { - // Come here for direct calls - Callee = Callee.getOperand(0).getOperand(0); - } else { - // Come here for indirect calls - SDValue Lo, Hi; - // Indirect addresses. Get the hi and lo parts of ptr. - GetExpandedParts(Callee, DAG, Lo, Hi); - // Connect Lo and Hi parts of the callee with the PIC16Connect - Callee = DAG.getNode(PIC16ISD::PIC16Connect, dl, MVT::i8, Lo, Hi); - } - std::vector Ops; - Ops.push_back(Chain); - Ops.push_back(Callee); - - // Add the call arguments and their flags - unsigned NumArgs = TheCall->getNumArgs(); - for(i=0;igetArg(i)); - Ops.push_back(TheCall->getArgFlagsVal(i)); - } - std::vector NodeTys; - unsigned NumRets = TheCall->getNumRetVals(); - for(i=0;igetRetValType(i)); - - // Return a Chain as well - NodeTys.push_back(MVT::Other); - - SDVTList VTs = DAG.getVTList(&NodeTys[0], NodeTys.size()); - // Generate new call with all the operands legal - return DAG.getCall(TheCall->getCallingConv(), dl, - TheCall->isVarArg(), TheCall->isTailCall(), - TheCall->isInreg(), VTs, &Ops[0], Ops.size(), - TheCall->getNumFixedArgs()); + return DAG.getNode(PIC16ISD::RET, dl, MVT::Other, Chain); } void PIC16TargetLowering:: @@ -1414,36 +1334,40 @@ DataAddr_Hi = DAG.getNode(PIC16ISD::MTHI, dl, MVT::i8, Call, OperFlag); } +SDValue +PIC16TargetLowering::LowerCall(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, + bool isTailCall, + const SmallVectorImpl &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { -SDValue PIC16TargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG) { - CallSDNode *TheCall = dyn_cast(Op); - SDValue Chain = TheCall->getChain(); - SDValue Callee = TheCall->getCallee(); - DebugLoc dl = TheCall->getDebugLoc(); - if (Callee.getValueType() == MVT::i16 && - Callee.getOpcode() == ISD::BUILD_PAIR) { - // Control should come here only from TypeLegalizer for lowering - - // Legalize the non-legal arguments of call and return the - // new call with legal arguments. - return LegalizeCALL(Op, DAG); - } - // Control should come here from Legalize DAG. - // Here all the operands of CALL node should be legal. - - // If this is an indirect call then to pass the arguments - // and read the return value back, we need the data address - // of the function being called. - // To get the data address two more calls need to be made. + assert(Callee.getValueType() == MVT::i16 && + "Don't know how to legalize this call node!!!"); // The flag to track if this is a direct or indirect call. bool IsDirectCall = true; - unsigned RetVals = TheCall->getNumRetVals(); - unsigned NumArgs = TheCall->getNumArgs(); + unsigned RetVals = Ins.size(); + unsigned NumArgs = Outs.size(); SDValue DataAddr_Lo, DataAddr_Hi; - if (Callee.getOpcode() == PIC16ISD::PIC16Connect) { + if (!isa(Callee) && + !isa(Callee)) { IsDirectCall = false; // This is indirect call + + // If this is an indirect call then to pass the arguments + // and read the return value back, we need the data address + // of the function being called. + // To get the data address two more calls need to be made. + + // Come here for indirect calls + SDValue Lo, Hi; + // Indirect addresses. Get the hi and lo parts of ptr. + GetExpandedParts(Callee, DAG, Lo, Hi); + // Connect Lo and Hi parts of the callee with the PIC16Connect + Callee = DAG.getNode(PIC16ISD::PIC16Connect, dl, MVT::i8, Lo, Hi); + // Read DataAddress only if we have to pass arguments or // read return value. if ((RetVals > 0) || (NumArgs > 0)) @@ -1499,12 +1423,13 @@ // Pass the argument to function before making the call. SDValue CallArgs; if (IsDirectCall) { - CallArgs = LowerDirectCallArguments(Op, Chain, ArgLabel, OperFlag, DAG); + CallArgs = LowerDirectCallArguments(ArgLabel, Chain, OperFlag, + Outs, dl, DAG); Chain = getChain(CallArgs); OperFlag = getOutFlag(CallArgs); } else { - CallArgs = LowerIndirectCallArguments(Op, Chain, OperFlag, DataAddr_Lo, - DataAddr_Hi, DAG); + CallArgs = LowerIndirectCallArguments(Chain, OperFlag, DataAddr_Lo, + DataAddr_Hi, Outs, dl, DAG); Chain = getChain(CallArgs); OperFlag = getOutFlag(CallArgs); } @@ -1525,10 +1450,11 @@ // Lower the return value reading after the call. if (IsDirectCall) - return LowerDirectCallReturn(Op, Chain, RetLabel, OperFlag, DAG); + return LowerDirectCallReturn(RetLabel, Chain, OperFlag, + Ins, dl, DAG, InVals); else - return LowerIndirectCallReturn(Op, Chain, OperFlag, DataAddr_Lo, - DataAddr_Hi, DAG); + return LowerIndirectCallReturn(Chain, OperFlag, DataAddr_Lo, + DataAddr_Hi, Ins, dl, DAG, InVals); } bool PIC16TargetLowering::isDirectLoad(const SDValue Op) { @@ -1660,17 +1586,19 @@ ReservedFrameCount = NumArgs + 1; } -// LowerFORMAL_ARGUMENTS - Argument values are loaded from the +// LowerFormalArguments - Argument values are loaded from the // .args + offset. All arguments are already broken to leaglized // types, so the offset just runs from 0 to NumArgVals - 1. -SDValue PIC16TargetLowering::LowerFORMAL_ARGUMENTS(SDValue Op, - SelectionDAG &DAG) { - SmallVector ArgValues; - unsigned NumArgVals = Op.getNode()->getNumValues() - 1; - DebugLoc dl = Op.getDebugLoc(); - SDValue Chain = Op.getOperand(0); // Formal arguments' chain - +SDValue +PIC16TargetLowering::LowerFormalArguments(SDValue Chain, + unsigned CallConv, + bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, + SelectionDAG &DAG, + SmallVectorImpl &InVals) { + unsigned NumArgVals = Ins.size(); // Get the callee's name to create the .args label to pass args. MachineFunction &MF = DAG.getMachineFunction(); @@ -1694,13 +1622,10 @@ SDValue PICLoad = DAG.getNode(PIC16ISD::PIC16LdArg, dl, VTs, Chain, ES, BS, Offset); Chain = getChain(PICLoad); - ArgValues.push_back(PICLoad); + InVals.push_back(PICLoad); } - // Return a MERGE_VALUE node. - ArgValues.push_back(Op.getOperand(0)); - return DAG.getNode(ISD::MERGE_VALUES, dl, Op.getNode()->getVTList(), - &ArgValues[0], ArgValues.size()).getValue(Op.getResNo()); + return Chain; } // Perform DAGCombine of PIC16Load. Modified: llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.h?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.h (original) +++ llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.h Tue Aug 4 20:29:28 2009 @@ -52,6 +52,7 @@ SUBCC, // Compare for equality or inequality. SELECT_ICC, // Psuedo to be caught in schedular and expanded to brcond. BRCOND, // Conditional branch. + RET, // Return. Dummy }; @@ -82,32 +83,35 @@ virtual const char *getTargetNodeName(unsigned Opcode) const; /// getSetCCResultType - Return the ISD::SETCC ValueType virtual MVT getSetCCResultType(MVT ValType) const; - SDValue LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG); SDValue LowerShift(SDValue Op, SelectionDAG &DAG); SDValue LowerMUL(SDValue Op, SelectionDAG &DAG); SDValue LowerADD(SDValue Op, SelectionDAG &DAG); SDValue LowerSUB(SDValue Op, SelectionDAG &DAG); SDValue LowerBinOp(SDValue Op, SelectionDAG &DAG); - SDValue LowerCALL(SDValue Op, SelectionDAG &DAG); - SDValue LowerRET(SDValue Op, SelectionDAG &DAG); // Call returns SDValue - LowerDirectCallReturn(SDValue Op, SDValue Chain, SDValue FrameAddress, - SDValue InFlag, SelectionDAG &DAG); + LowerDirectCallReturn(SDValue RetLabel, SDValue Chain, SDValue InFlag, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); SDValue - LowerIndirectCallReturn(SDValue Op, SDValue Chain, SDValue InFlag, - SDValue DataAddr_Lo, SDValue DataAddr_Hi, - SelectionDAG &DAG); + LowerIndirectCallReturn(SDValue Chain, SDValue InFlag, + SDValue DataAddr_Lo, SDValue DataAddr_Hi, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); // Call arguments SDValue - LowerDirectCallArguments(SDValue Op, SDValue Chain, SDValue FrameAddress, - SDValue InFlag, SelectionDAG &DAG); + LowerDirectCallArguments(SDValue ArgLabel, SDValue Chain, SDValue InFlag, + const SmallVectorImpl &Outs, + DebugLoc dl, SelectionDAG &DAG); SDValue - LowerIndirectCallArguments(SDValue Op, SDValue Chain, SDValue InFlag, + LowerIndirectCallArguments(SDValue Chain, SDValue InFlag, SDValue DataAddr_Lo, SDValue DataAddr_Hi, - SelectionDAG &DAG); + const SmallVectorImpl &Outs, + DebugLoc dl, SelectionDAG &DAG); SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG); SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG); @@ -125,6 +129,28 @@ SmallVectorImpl &Results, SelectionDAG &DAG); + virtual SDValue + LowerFormalArguments(SDValue Chain, + unsigned CallConv, + bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + + virtual SDValue + LowerCall(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, bool isTailCall, + const SmallVectorImpl &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + + virtual SDValue + LowerReturn(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Outs, + DebugLoc dl, SelectionDAG &DAG); + SDValue ExpandStore(SDNode *N, SelectionDAG &DAG); SDValue ExpandLoad(SDNode *N, SelectionDAG &DAG); SDValue ExpandGlobalAddress(SDNode *N, SelectionDAG &DAG); @@ -175,12 +201,6 @@ void LegalizeFrameIndex(SDValue Op, SelectionDAG &DAG, SDValue &ES, int &Offset); - - // CALL node should have all legal operands only. Legalize all non-legal - // operands of CALL node and then return the new call will all operands - // legal. - SDValue LegalizeCALL(SDValue Op, SelectionDAG &DAG); - // For indirect calls data address of the callee frame need to be // extracted. This function fills the arguments DataAddr_Lo and // DataAddr_Hi with the address of the callee frame. Modified: llvm/trunk/lib/Target/PIC16/PIC16InstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16InstrInfo.td?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/Target/PIC16/PIC16InstrInfo.td (original) +++ llvm/trunk/lib/Target/PIC16/PIC16InstrInfo.td Tue Aug 4 20:29:28 2009 @@ -115,6 +115,8 @@ def PIC16Selecticc : SDNode<"PIC16ISD::SELECT_ICC", SDT_PIC16Selecticc, [SDNPInFlag]>; +def PIC16ret : SDNode<"PIC16ISD::RET", SDTNone, [SDNPHasChain]>; + //===----------------------------------------------------------------------===// // PIC16 Operand Definitions. //===----------------------------------------------------------------------===// @@ -493,7 +495,7 @@ // Return insn. let isTerminator = 1, isBarrier = 1, isReturn = 1 in def Return : - ControlFormat<0, (outs), (ins), "return", [(ret)]>; + ControlFormat<0, (outs), (ins), "return", [(PIC16ret)]>; //===----------------------------------------------------------------------===// // PIC16 Replacment Patterns. Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Tue Aug 4 20:29:28 2009 @@ -203,9 +203,6 @@ setOperationAction(ISD::ConstantPool, MVT::i64, Custom); setOperationAction(ISD::JumpTable, MVT::i64, Custom); - // RET must be custom lowered, to meet ABI requirements. - setOperationAction(ISD::RET , MVT::Other, Custom); - // TRAP is legal. setOperationAction(ISD::TRAP, MVT::Other, Legal); @@ -448,7 +445,6 @@ case PPCISD::MTFSB1: return "PPCISD::MTFSB1"; case PPCISD::FADDRTZ: return "PPCISD::FADDRTZ"; case PPCISD::MTFSF: return "PPCISD::MTFSF"; - case PPCISD::TAILCALL: return "PPCISD::TAILCALL"; case PPCISD::TC_RETURN: return "PPCISD::TC_RETURN"; } } @@ -1293,6 +1289,7 @@ std::pair CallResult = LowerCallTo(Chain, Op.getValueType().getTypeForMVT(), false, false, false, false, 0, CallingConv::C, false, + /*isReturnValueUsed=*/true, DAG.getExternalSymbol("__trampoline_setup", PtrVT), Args, DAG, dl); @@ -1472,9 +1469,8 @@ /// CalculateStackSlotSize - Calculates the size reserved for this argument on /// the stack. -static unsigned CalculateStackSlotSize(SDValue Arg, ISD::ArgFlagsTy Flags, +static unsigned CalculateStackSlotSize(MVT ArgVT, ISD::ArgFlagsTy Flags, unsigned PtrByteSize) { - MVT ArgVT = Arg.getValueType(); unsigned ArgSize = ArgVT.getSizeInBits()/8; if (Flags.isByVal()) ArgSize = Flags.getByValSize(); @@ -1484,13 +1480,30 @@ } SDValue -PPCTargetLowering::LowerFORMAL_ARGUMENTS_SVR4(SDValue Op, - SelectionDAG &DAG, - int &VarArgsFrameIndex, - int &VarArgsStackOffset, - unsigned &VarArgsNumGPR, - unsigned &VarArgsNumFPR, - const PPCSubtarget &Subtarget) { +PPCTargetLowering::LowerFormalArguments(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl + &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { + if (PPCSubTarget.isSVR4ABI()) { + return LowerFormalArguments_SVR4(Chain, CallConv, isVarArg, Ins, + dl, DAG, InVals); + } else { + return LowerFormalArguments_Darwin(Chain, CallConv, isVarArg, Ins, + dl, DAG, InVals); + } +} + +SDValue +PPCTargetLowering::LowerFormalArguments_SVR4( + SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl + &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { + // SVR4 ABI Stack Frame Layout: // +-----------------------------------+ // +--> | Back chain | @@ -1522,25 +1535,21 @@ MachineFunction &MF = DAG.getMachineFunction(); MachineFrameInfo *MFI = MF.getFrameInfo(); - SmallVector ArgValues; - SDValue Root = Op.getOperand(0); - bool isVarArg = cast(Op.getOperand(2))->getZExtValue() != 0; - DebugLoc dl = Op.getDebugLoc(); MVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); // Potential tail calls could cause overwriting of argument stack slots. - unsigned CC = MF.getFunction()->getCallingConv(); - bool isImmutable = !(PerformTailCallOpt && (CC==CallingConv::Fast)); + bool isImmutable = !(PerformTailCallOpt && (CallConv==CallingConv::Fast)); unsigned PtrByteSize = 4; // Assign locations to all of the incoming arguments. SmallVector ArgLocs; - CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs, *DAG.getContext()); + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), ArgLocs, + *DAG.getContext()); // Reserve space for the linkage area on the stack. CCInfo.AllocateStack(PPCFrameInfo::getLinkageSize(false, false), PtrByteSize); - CCInfo.AnalyzeFormalArguments(Op.getNode(), CC_PPC_SVR4); + CCInfo.AnalyzeFormalArguments(Ins, CC_PPC_SVR4); for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { CCValAssign &VA = ArgLocs[i]; @@ -1552,7 +1561,7 @@ switch (ValVT.getSimpleVT()) { default: - llvm_unreachable("ValVT not supported by FORMAL_ARGUMENTS Lowering"); + llvm_unreachable("ValVT not supported by formal arguments Lowering"); case MVT::i32: RC = PPC::GPRCRegisterClass; break; @@ -1572,9 +1581,9 @@ // Transform the arguments stored in physical registers into virtual ones. unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC); - SDValue ArgValue = DAG.getCopyFromReg(Root, dl, Reg, ValVT); + SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, ValVT); - ArgValues.push_back(ArgValue); + InVals.push_back(ArgValue); } else { // Argument stored in memory. assert(VA.isMemLoc()); @@ -1585,7 +1594,7 @@ // Create load nodes to retrieve arguments from the stack. SDValue FIN = DAG.getFrameIndex(FI, PtrVT); - ArgValues.push_back(DAG.getLoad(VA.getValVT(), dl, Root, FIN, NULL, 0)); + InVals.push_back(DAG.getLoad(VA.getValVT(), dl, Chain, FIN, NULL, 0)); } } @@ -1593,13 +1602,13 @@ // Aggregates passed by value are stored in the local variable space of the // caller's stack frame, right above the parameter list area. SmallVector ByValArgLocs; - CCState CCByValInfo(CC, isVarArg, getTargetMachine(), + CCState CCByValInfo(CallConv, isVarArg, getTargetMachine(), ByValArgLocs, *DAG.getContext()); // Reserve stack space for the allocations in CCInfo. CCByValInfo.AllocateStack(CCInfo.getNextStackOffset(), PtrByteSize); - CCByValInfo.AnalyzeFormalArguments(Op.getNode(), CC_PPC_SVR4_ByVal); + CCByValInfo.AnalyzeFormalArguments(Ins, CC_PPC_SVR4_ByVal); // Area that is at least reserved in the caller of this function. unsigned MinReservedArea = CCByValInfo.getNextStackOffset(); @@ -1656,7 +1665,7 @@ unsigned GPRIndex = 0; for (; GPRIndex != VarArgsNumGPR; ++GPRIndex) { SDValue Val = DAG.getRegister(GPArgRegs[GPRIndex], PtrVT); - SDValue Store = DAG.getStore(Root, dl, Val, FIN, NULL, 0); + SDValue Store = DAG.getStore(Chain, dl, Val, FIN, NULL, 0); MemOps.push_back(Store); // Increment the address by four for the next argument to store SDValue PtrOff = DAG.getConstant(PtrVT.getSizeInBits()/8, PtrVT); @@ -1669,7 +1678,7 @@ for (; GPRIndex != NumGPArgRegs; ++GPRIndex) { unsigned VReg = MF.addLiveIn(GPArgRegs[GPRIndex], &PPC::GPRCRegClass); - SDValue Val = DAG.getCopyFromReg(Root, dl, VReg, PtrVT); + SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT); SDValue Store = DAG.getStore(Val.getValue(1), dl, Val, FIN, NULL, 0); MemOps.push_back(Store); // Increment the address by four for the next argument to store @@ -1685,7 +1694,7 @@ unsigned FPRIndex = 0; for (FPRIndex = 0; FPRIndex != VarArgsNumFPR; ++FPRIndex) { SDValue Val = DAG.getRegister(FPArgRegs[FPRIndex], MVT::f64); - SDValue Store = DAG.getStore(Root, dl, Val, FIN, NULL, 0); + SDValue Store = DAG.getStore(Chain, dl, Val, FIN, NULL, 0); MemOps.push_back(Store); // Increment the address by eight for the next argument to store SDValue PtrOff = DAG.getConstant(MVT(MVT::f64).getSizeInBits()/8, @@ -1696,7 +1705,7 @@ for (; FPRIndex != NumFPArgRegs; ++FPRIndex) { unsigned VReg = MF.addLiveIn(FPArgRegs[FPRIndex], &PPC::F8RCRegClass); - SDValue Val = DAG.getCopyFromReg(Root, dl, VReg, MVT::f64); + SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, MVT::f64); SDValue Store = DAG.getStore(Val.getValue(1), dl, Val, FIN, NULL, 0); MemOps.push_back(Store); // Increment the address by eight for the next argument to store @@ -1707,36 +1716,30 @@ } if (!MemOps.empty()) - Root = DAG.getNode(ISD::TokenFactor, dl, - MVT::Other, &MemOps[0], MemOps.size()); + Chain = DAG.getNode(ISD::TokenFactor, dl, + MVT::Other, &MemOps[0], MemOps.size()); - - ArgValues.push_back(Root); - - // Return the new list of results. - return DAG.getNode(ISD::MERGE_VALUES, dl, Op.getNode()->getVTList(), - &ArgValues[0], ArgValues.size()).getValue(Op.getResNo()); + return Chain; } SDValue -PPCTargetLowering::LowerFORMAL_ARGUMENTS_Darwin(SDValue Op, - SelectionDAG &DAG, - int &VarArgsFrameIndex, - const PPCSubtarget &Subtarget) { +PPCTargetLowering::LowerFormalArguments_Darwin( + SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl + &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { + // TODO: add description of PPC stack frame format, or at least some docs. // MachineFunction &MF = DAG.getMachineFunction(); MachineFrameInfo *MFI = MF.getFrameInfo(); - SmallVector ArgValues; - SDValue Root = Op.getOperand(0); - bool isVarArg = cast(Op.getOperand(2))->getZExtValue() != 0; - DebugLoc dl = Op.getDebugLoc(); MVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); bool isPPC64 = PtrVT == MVT::i64; // Potential tail calls could cause overwriting of argument stack slots. - unsigned CC = MF.getFunction()->getCallingConv(); - bool isImmutable = !(PerformTailCallOpt && (CC==CallingConv::Fast)); + bool isImmutable = !(PerformTailCallOpt && (CallConv==CallingConv::Fast)); unsigned PtrByteSize = isPPC64 ? 8 : 4; unsigned ArgOffset = PPCFrameInfo::getLinkageSize(isPPC64, true); @@ -1752,7 +1755,7 @@ PPC::X7, PPC::X8, PPC::X9, PPC::X10, }; - static const unsigned *FPR = GetFPR(Subtarget); + static const unsigned *FPR = GetFPR(PPCSubTarget); static const unsigned VR[] = { PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, @@ -1776,12 +1779,11 @@ // entire point of the following loop. unsigned VecArgOffset = ArgOffset; if (!isVarArg && !isPPC64) { - for (unsigned ArgNo = 0, e = Op.getNode()->getNumValues()-1; ArgNo != e; + for (unsigned ArgNo = 0, e = Ins.size(); ArgNo != e; ++ArgNo) { - MVT ObjectVT = Op.getValue(ArgNo).getValueType(); + MVT ObjectVT = Ins[ArgNo].VT; unsigned ObjSize = ObjectVT.getSizeInBits()/8; - ISD::ArgFlagsTy Flags = - cast(Op.getOperand(ArgNo+3))->getArgFlags(); + ISD::ArgFlagsTy Flags = Ins[ArgNo].Flags; if (Flags.isByVal()) { // ObjSize is the true size, ArgSize rounded up to multiple of regs. @@ -1822,15 +1824,13 @@ SmallVector MemOps; unsigned nAltivecParamsAtEnd = 0; - for (unsigned ArgNo = 0, e = Op.getNode()->getNumValues() - 1; - ArgNo != e; ++ArgNo) { + for (unsigned ArgNo = 0, e = Ins.size(); ArgNo != e; ++ArgNo) { SDValue ArgVal; bool needsLoad = false; - MVT ObjectVT = Op.getValue(ArgNo).getValueType(); + MVT ObjectVT = Ins[ArgNo].VT; unsigned ObjSize = ObjectVT.getSizeInBits()/8; unsigned ArgSize = ObjSize; - ISD::ArgFlagsTy Flags = - cast(Op.getOperand(ArgNo+3))->getArgFlags(); + ISD::ArgFlagsTy Flags = Ins[ArgNo].Flags; unsigned CurArgOffset = ArgOffset; @@ -1839,13 +1839,13 @@ ObjectVT==MVT::v8i16 || ObjectVT==MVT::v16i8) { if (isVarArg || isPPC64) { MinReservedArea = ((MinReservedArea+15)/16)*16; - MinReservedArea += CalculateStackSlotSize(Op.getValue(ArgNo), + MinReservedArea += CalculateStackSlotSize(ObjectVT, Flags, PtrByteSize); } else nAltivecParamsAtEnd++; } else // Calculate min reserved area. - MinReservedArea += CalculateStackSlotSize(Op.getValue(ArgNo), + MinReservedArea += CalculateStackSlotSize(Ins[ArgNo].VT, Flags, PtrByteSize); @@ -1863,11 +1863,11 @@ // The value of the object is its address. int FI = MFI->CreateFixedObject(ObjSize, CurArgOffset); SDValue FIN = DAG.getFrameIndex(FI, PtrVT); - ArgValues.push_back(FIN); + InVals.push_back(FIN); if (ObjSize==1 || ObjSize==2) { if (GPR_idx != Num_GPR_Regs) { unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::GPRCRegClass); - SDValue Val = DAG.getCopyFromReg(Root, dl, VReg, PtrVT); + SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT); SDValue Store = DAG.getTruncStore(Val.getValue(1), dl, Val, FIN, NULL, 0, ObjSize==1 ? MVT::i8 : MVT::i16 ); MemOps.push_back(Store); @@ -1886,7 +1886,7 @@ unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::GPRCRegClass); int FI = MFI->CreateFixedObject(PtrByteSize, ArgOffset); SDValue FIN = DAG.getFrameIndex(FI, PtrVT); - SDValue Val = DAG.getCopyFromReg(Root, dl, VReg, PtrVT); + SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT); SDValue Store = DAG.getStore(Val.getValue(1), dl, Val, FIN, NULL, 0); MemOps.push_back(Store); ++GPR_idx; @@ -1905,7 +1905,7 @@ if (!isPPC64) { if (GPR_idx != Num_GPR_Regs) { unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::GPRCRegClass); - ArgVal = DAG.getCopyFromReg(Root, dl, VReg, MVT::i32); + ArgVal = DAG.getCopyFromReg(Chain, dl, VReg, MVT::i32); ++GPR_idx; } else { needsLoad = true; @@ -1919,7 +1919,7 @@ case MVT::i64: // PPC64 if (GPR_idx != Num_GPR_Regs) { unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass); - ArgVal = DAG.getCopyFromReg(Root, dl, VReg, MVT::i64); + ArgVal = DAG.getCopyFromReg(Chain, dl, VReg, MVT::i64); if (ObjectVT == MVT::i32) { // PPC64 passes i8, i16, and i32 values in i64 registers. Promote @@ -1960,7 +1960,7 @@ else VReg = MF.addLiveIn(FPR[FPR_idx], &PPC::F8RCRegClass); - ArgVal = DAG.getCopyFromReg(Root, dl, VReg, ObjectVT); + ArgVal = DAG.getCopyFromReg(Chain, dl, VReg, ObjectVT); ++FPR_idx; } else { needsLoad = true; @@ -1977,7 +1977,7 @@ // except in varargs functions. if (VR_idx != Num_VR_Regs) { unsigned VReg = MF.addLiveIn(VR[VR_idx], &PPC::VRRCRegClass); - ArgVal = DAG.getCopyFromReg(Root, dl, VReg, ObjectVT); + ArgVal = DAG.getCopyFromReg(Chain, dl, VReg, ObjectVT); if (isVarArg) { while ((ArgOffset % 16) != 0) { ArgOffset += PtrByteSize; @@ -2011,10 +2011,10 @@ CurArgOffset + (ArgSize - ObjSize), isImmutable); SDValue FIN = DAG.getFrameIndex(FI, PtrVT); - ArgVal = DAG.getLoad(ObjectVT, dl, Root, FIN, NULL, 0); + ArgVal = DAG.getLoad(ObjectVT, dl, Chain, FIN, NULL, 0); } - ArgValues.push_back(ArgVal); + InVals.push_back(ArgVal); } // Set the size that is at least reserved in caller of this function. Tail @@ -2056,7 +2056,7 @@ else VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::GPRCRegClass); - SDValue Val = DAG.getCopyFromReg(Root, dl, VReg, PtrVT); + SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT); SDValue Store = DAG.getStore(Val.getValue(1), dl, Val, FIN, NULL, 0); MemOps.push_back(Store); // Increment the address by four for the next argument to store @@ -2066,14 +2066,10 @@ } if (!MemOps.empty()) - Root = DAG.getNode(ISD::TokenFactor, dl, - MVT::Other, &MemOps[0], MemOps.size()); - - ArgValues.push_back(Root); + Chain = DAG.getNode(ISD::TokenFactor, dl, + MVT::Other, &MemOps[0], MemOps.size()); - // Return the new list of results. - return DAG.getNode(ISD::MERGE_VALUES, dl, Op.getNode()->getVTList(), - &ArgValues[0], ArgValues.size()); + return Chain; } /// CalculateParameterAndLinkageAreaSize - Get the size of the paramter plus @@ -2083,13 +2079,14 @@ bool isPPC64, bool isVarArg, unsigned CC, - CallSDNode *TheCall, + const SmallVectorImpl + &Outs, unsigned &nAltivecParamsAtEnd) { // Count how many bytes are to be pushed on the stack, including the linkage // area, and parameter passing area. We start with 24/48 bytes, which is // prereserved space for [SP][CR][LR][3 x unused]. unsigned NumBytes = PPCFrameInfo::getLinkageSize(isPPC64, true); - unsigned NumOps = TheCall->getNumArgs(); + unsigned NumOps = Outs.size(); unsigned PtrByteSize = isPPC64 ? 8 : 4; // Add up all the space actually used. @@ -2100,8 +2097,8 @@ // 16-byte aligned. nAltivecParamsAtEnd = 0; for (unsigned i = 0; i != NumOps; ++i) { - SDValue Arg = TheCall->getArg(i); - ISD::ArgFlagsTy Flags = TheCall->getArgFlags(i); + SDValue Arg = Outs[i].Val; + ISD::ArgFlagsTy Flags = Outs[i].Flags; MVT ArgVT = Arg.getValueType(); // Varargs Altivec parameters are padded to a 16 byte boundary. if (ArgVT==MVT::v4f32 || ArgVT==MVT::v4i32 || @@ -2115,7 +2112,7 @@ // Varargs and 64-bit Altivec parameters are padded to 16 byte boundary. NumBytes = ((NumBytes+15)/16)*16; } - NumBytes += CalculateStackSlotSize(Arg, Flags, PtrByteSize); + NumBytes += CalculateStackSlotSize(ArgVT, Flags, PtrByteSize); } // Allow for Altivec parameters at the end, if needed. @@ -2160,40 +2157,37 @@ return SPDiff; } -/// IsEligibleForTailCallElimination - Check to see whether the next instruction -/// following the call is a return. A function is eligible if caller/callee -/// calling conventions match, currently only fastcc supports tail calls, and -/// the function CALL is immediatly followed by a RET. +/// IsEligibleForTailCallOptimization - Check whether the call is eligible +/// for tail call optimization. Targets which want to do tail call +/// optimization should implement this function. bool -PPCTargetLowering::IsEligibleForTailCallOptimization(CallSDNode *TheCall, - SDValue Ret, +PPCTargetLowering::IsEligibleForTailCallOptimization(SDValue Callee, + unsigned CalleeCC, + bool isVarArg, + const SmallVectorImpl &Ins, SelectionDAG& DAG) const { // Variable argument functions are not supported. - if (!PerformTailCallOpt || TheCall->isVarArg()) + if (isVarArg) return false; - if (CheckTailCallReturnConstraints(TheCall, Ret)) { - MachineFunction &MF = DAG.getMachineFunction(); - unsigned CallerCC = MF.getFunction()->getCallingConv(); - unsigned CalleeCC = TheCall->getCallingConv(); - if (CalleeCC == CallingConv::Fast && CallerCC == CalleeCC) { - // Functions containing by val parameters are not supported. - for (unsigned i = 0; i != TheCall->getNumArgs(); i++) { - ISD::ArgFlagsTy Flags = TheCall->getArgFlags(i); - if (Flags.isByVal()) return false; - } + MachineFunction &MF = DAG.getMachineFunction(); + unsigned CallerCC = MF.getFunction()->getCallingConv(); + if (CalleeCC == CallingConv::Fast && CallerCC == CalleeCC) { + // Functions containing by val parameters are not supported. + for (unsigned i = 0; i != Ins.size(); i++) { + ISD::ArgFlagsTy Flags = Ins[i].Flags; + if (Flags.isByVal()) return false; + } - SDValue Callee = TheCall->getCallee(); - // Non PIC/GOT tail calls are supported. - if (getTargetMachine().getRelocationModel() != Reloc::PIC_) - return true; + // Non PIC/GOT tail calls are supported. + if (getTargetMachine().getRelocationModel() != Reloc::PIC_) + return true; - // At the moment we can only do local tail calls (in same module, hidden - // or protected) if we are generating PIC. - if (GlobalAddressSDNode *G = dyn_cast(Callee)) - return G->getGlobal()->hasHiddenVisibility() - || G->getGlobal()->hasProtectedVisibility(); - } + // At the moment we can only do local tail calls (in same module, hidden + // or protected) if we are generating PIC. + if (GlobalAddressSDNode *G = dyn_cast(Callee)) + return G->getGlobal()->hasHiddenVisibility() + || G->getGlobal()->hasProtectedVisibility(); } return false; @@ -2455,16 +2449,17 @@ return CallOpc; } -static SDValue LowerCallReturn(SDValue Op, SelectionDAG &DAG, TargetMachine &TM, - CallSDNode *TheCall, SDValue Chain, - SDValue InFlag) { - bool isVarArg = TheCall->isVarArg(); - DebugLoc dl = TheCall->getDebugLoc(); - SmallVector ResultVals; +SDValue +PPCTargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { + SmallVector RVLocs; - unsigned CallerCC = DAG.getMachineFunction().getFunction()->getCallingConv(); - CCState CCRetInfo(CallerCC, isVarArg, TM, RVLocs, *DAG.getContext()); - CCRetInfo.AnalyzeCallResult(TheCall, RetCC_PPC); + CCState CCRetInfo(CallConv, isVarArg, getTargetMachine(), + RVLocs, *DAG.getContext()); + CCRetInfo.AnalyzeCallResult(Ins, RetCC_PPC); // Copy all of the result registers out of their specified physreg. for (unsigned i = 0, e = RVLocs.size(); i != e; ++i) { @@ -2473,53 +2468,61 @@ assert(VA.isRegLoc() && "Can only return in registers!"); Chain = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), VT, InFlag).getValue(1); - ResultVals.push_back(Chain.getValue(0)); + InVals.push_back(Chain.getValue(0)); InFlag = Chain.getValue(2); } - // If the function returns void, just return the chain. - if (RVLocs.empty()) - return Chain; - - // Otherwise, merge everything together with a MERGE_VALUES node. - ResultVals.push_back(Chain); - SDValue Res = DAG.getNode(ISD::MERGE_VALUES, dl, TheCall->getVTList(), - &ResultVals[0], ResultVals.size()); - return Res.getValue(Op.getResNo()); + return Chain; } -static -SDValue FinishCall(SelectionDAG &DAG, CallSDNode *TheCall, TargetMachine &TM, - SmallVector, 8> &RegsToPass, - SDValue Op, SDValue InFlag, SDValue Chain, SDValue &Callee, - int SPDiff, unsigned NumBytes) { - unsigned CC = TheCall->getCallingConv(); - DebugLoc dl = TheCall->getDebugLoc(); - bool isTailCall = TheCall->isTailCall() - && CC == CallingConv::Fast && PerformTailCallOpt; +SDValue +PPCTargetLowering::FinishCall(unsigned CallConv, DebugLoc dl, bool isTailCall, + bool isVarArg, + SelectionDAG &DAG, + SmallVector, 8> + &RegsToPass, + SDValue InFlag, SDValue Chain, + SDValue &Callee, + int SPDiff, unsigned NumBytes, + const SmallVectorImpl &Ins, + SmallVectorImpl &InVals) { std::vector NodeTys; SmallVector Ops; unsigned CallOpc = PrepareCall(DAG, Callee, InFlag, Chain, dl, SPDiff, isTailCall, RegsToPass, Ops, NodeTys, - TM.getSubtarget().isSVR4ABI()); + PPCSubTarget.isSVR4ABI()); // When performing tail call optimization the callee pops its arguments off // the stack. Account for this here so these bytes can be pushed back on in // PPCRegisterInfo::eliminateCallFramePseudoInstr. int BytesCalleePops = - (CC==CallingConv::Fast && PerformTailCallOpt) ? NumBytes : 0; + (CallConv==CallingConv::Fast && PerformTailCallOpt) ? NumBytes : 0; if (InFlag.getNode()) Ops.push_back(InFlag); // Emit tail call. if (isTailCall) { - assert(InFlag.getNode() && - "Flag must be set. Depend on flag being set in LowerRET"); - Chain = DAG.getNode(PPCISD::TAILCALL, dl, - TheCall->getVTList(), &Ops[0], Ops.size()); - return SDValue(Chain.getNode(), Op.getResNo()); + // If this is the first return lowered for this function, add the regs + // to the liveout set for the function. + if (DAG.getMachineFunction().getRegInfo().liveout_empty()) { + SmallVector RVLocs; + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), RVLocs, + *DAG.getContext()); + CCInfo.AnalyzeCallResult(Ins, RetCC_PPC); + for (unsigned i = 0; i != RVLocs.size(); ++i) + DAG.getMachineFunction().getRegInfo().addLiveOut(RVLocs[i].getLocReg()); + } + + assert(((Callee.getOpcode() == ISD::Register && + cast(Callee)->getReg() == PPC::CTR) || + Callee.getOpcode() == ISD::TargetExternalSymbol || + Callee.getOpcode() == ISD::TargetGlobalAddress || + isa(Callee)) && + "Expecting an global address, external symbol, absolute value or register"); + + return DAG.getNode(PPCISD::TC_RETURN, dl, MVT::Other, &Ops[0], Ops.size()); } Chain = DAG.getNode(CallOpc, dl, NodeTys, &Ops[0], Ops.size()); @@ -2528,27 +2531,49 @@ Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(NumBytes, true), DAG.getIntPtrConstant(BytesCalleePops, true), InFlag); - if (TheCall->getValueType(0) != MVT::Other) + if (!Ins.empty()) InFlag = Chain.getValue(1); - return LowerCallReturn(Op, DAG, TM, TheCall, Chain, InFlag); + return LowerCallResult(Chain, InFlag, CallConv, isVarArg, + Ins, dl, DAG, InVals); } -SDValue PPCTargetLowering::LowerCALL_SVR4(SDValue Op, SelectionDAG &DAG, - const PPCSubtarget &Subtarget, - TargetMachine &TM) { - // See PPCTargetLowering::LowerFORMAL_ARGUMENTS_SVR4() for a description +SDValue +PPCTargetLowering::LowerCall(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, + bool isTailCall, + const SmallVectorImpl &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { + if (PPCSubTarget.isSVR4ABI()) { + return LowerCall_SVR4(Chain, Callee, CallConv, isVarArg, + isTailCall, Outs, Ins, + dl, DAG, InVals); + } else { + return LowerCall_Darwin(Chain, Callee, CallConv, isVarArg, + isTailCall, Outs, Ins, + dl, DAG, InVals); + } +} + +SDValue +PPCTargetLowering::LowerCall_SVR4(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, + bool isTailCall, + const SmallVectorImpl &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { + // See PPCTargetLowering::LowerFormalArguments_SVR4() for a description // of the SVR4 ABI stack frame layout. - CallSDNode *TheCall = cast(Op.getNode()); - SDValue Chain = TheCall->getChain(); - bool isVarArg = TheCall->isVarArg(); - unsigned CC = TheCall->getCallingConv(); - assert((CC == CallingConv::C || - CC == CallingConv::Fast) && "Unknown calling convention!"); - bool isTailCall = TheCall->isTailCall() - && CC == CallingConv::Fast && PerformTailCallOpt; - SDValue Callee = TheCall->getCallee(); - DebugLoc dl = TheCall->getDebugLoc(); + + assert((!isTailCall || + (CallConv == CallingConv::Fast && PerformTailCallOpt)) && + "IsEligibleForTailCallOptimization missed a case!"); + + assert((CallConv == CallingConv::C || + CallConv == CallingConv::Fast) && "Unknown calling convention!"); MVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); unsigned PtrByteSize = 4; @@ -2560,7 +2585,7 @@ // and restoring the callers stack pointer in this functions epilog. This is // done because by tail calling the called function might overwrite the value // in this function's (MF) stack pointer stack slot 0(SP). - if (PerformTailCallOpt && CC==CallingConv::Fast) + if (PerformTailCallOpt && CallConv==CallingConv::Fast) MF.getInfo()->setHasFastCall(); // Count how many bytes are to be pushed on the stack, including the linkage @@ -2569,7 +2594,8 @@ // Assign locations to all of the outgoing arguments. SmallVector ArgLocs; - CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs, *DAG.getContext()); + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), + ArgLocs, *DAG.getContext()); // Reserve space for the linkage area on the stack. CCInfo.AllocateStack(PPCFrameInfo::getLinkageSize(false, false), PtrByteSize); @@ -2578,15 +2604,14 @@ // Handle fixed and variable vector arguments differently. // Fixed vector arguments go into registers as long as registers are // available. Variable vector arguments always go into memory. - unsigned NumArgs = TheCall->getNumArgs(); - unsigned NumFixedArgs = TheCall->getNumFixedArgs(); + unsigned NumArgs = Outs.size(); for (unsigned i = 0; i != NumArgs; ++i) { - MVT ArgVT = TheCall->getArg(i).getValueType(); - ISD::ArgFlagsTy ArgFlags = TheCall->getArgFlags(i); + MVT ArgVT = Outs[i].Val.getValueType(); + ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; bool Result; - if (i < NumFixedArgs) { + if (Outs[i].IsFixed) { Result = CC_PPC_SVR4(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, CCInfo); } else { @@ -2604,18 +2629,18 @@ } } else { // All arguments are treated the same. - CCInfo.AnalyzeCallOperands(TheCall, CC_PPC_SVR4); + CCInfo.AnalyzeCallOperands(Outs, CC_PPC_SVR4); } // Assign locations to all of the outgoing aggregate by value arguments. SmallVector ByValArgLocs; - CCState CCByValInfo(CC, isVarArg, getTargetMachine(), ByValArgLocs, + CCState CCByValInfo(CallConv, isVarArg, getTargetMachine(), ByValArgLocs, *DAG.getContext()); // Reserve stack space for the allocations in CCInfo. CCByValInfo.AllocateStack(CCInfo.getNextStackOffset(), PtrByteSize); - CCByValInfo.AnalyzeCallOperands(TheCall, CC_PPC_SVR4_ByVal); + CCByValInfo.AnalyzeCallOperands(Outs, CC_PPC_SVR4_ByVal); // Size of the linkage area, parameter list area and the part of the local // space variable where copies of aggregates which are passed by value are @@ -2651,8 +2676,8 @@ i != e; ++i) { CCValAssign &VA = ArgLocs[i]; - SDValue Arg = TheCall->getArg(i); - ISD::ArgFlagsTy Flags = TheCall->getArgFlags(i); + SDValue Arg = Outs[i].Val; + ISD::ArgFlagsTy Flags = Outs[i].Flags; if (Flags.isByVal()) { // Argument is an aggregate which is passed by value, thus we need to @@ -2736,22 +2761,21 @@ false, TailCallArguments); } - return FinishCall(DAG, TheCall, TM, RegsToPass, Op, InFlag, Chain, Callee, - SPDiff, NumBytes); + return FinishCall(CallConv, dl, isTailCall, isVarArg, DAG, + RegsToPass, InFlag, Chain, Callee, SPDiff, NumBytes, + Ins, InVals); } -SDValue PPCTargetLowering::LowerCALL_Darwin(SDValue Op, SelectionDAG &DAG, - const PPCSubtarget &Subtarget, - TargetMachine &TM) { - CallSDNode *TheCall = cast(Op.getNode()); - SDValue Chain = TheCall->getChain(); - bool isVarArg = TheCall->isVarArg(); - unsigned CC = TheCall->getCallingConv(); - bool isTailCall = TheCall->isTailCall() - && CC == CallingConv::Fast && PerformTailCallOpt; - SDValue Callee = TheCall->getCallee(); - unsigned NumOps = TheCall->getNumArgs(); - DebugLoc dl = TheCall->getDebugLoc(); +SDValue +PPCTargetLowering::LowerCall_Darwin(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, + bool isTailCall, + const SmallVectorImpl &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { + + unsigned NumOps = Outs.size(); MVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); bool isPPC64 = PtrVT == MVT::i64; @@ -2764,7 +2788,7 @@ // and restoring the callers stack pointer in this functions epilog. This is // done because by tail calling the called function might overwrite the value // in this function's (MF) stack pointer stack slot 0(SP). - if (PerformTailCallOpt && CC==CallingConv::Fast) + if (PerformTailCallOpt && CallConv==CallingConv::Fast) MF.getInfo()->setHasFastCall(); unsigned nAltivecParamsAtEnd = 0; @@ -2773,13 +2797,19 @@ // area, and parameter passing area. We start with 24/48 bytes, which is // prereserved space for [SP][CR][LR][3 x unused]. unsigned NumBytes = - CalculateParameterAndLinkageAreaSize(DAG, isPPC64, isVarArg, CC, TheCall, + CalculateParameterAndLinkageAreaSize(DAG, isPPC64, isVarArg, CallConv, + Outs, nAltivecParamsAtEnd); // Calculate by how many bytes the stack has to be adjusted in case of tail // call optimization. int SPDiff = CalculateTailCallSPDiff(DAG, isTailCall, NumBytes); + // To protect arguments on the stack from being clobbered in a tail call, + // force all the loads to happen before doing any other lowering. + if (isTailCall) + Chain = DAG.getStackArgumentTokenFactor(Chain); + // Adjust the stack pointer for the new arguments... // These operations are automatically eliminated by the prolog/epilog pass Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(NumBytes, true)); @@ -2815,7 +2845,7 @@ PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, }; - static const unsigned *FPR = GetFPR(Subtarget); + static const unsigned *FPR = GetFPR(PPCSubTarget); static const unsigned VR[] = { PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, @@ -2833,8 +2863,8 @@ SmallVector MemOpChains; for (unsigned i = 0; i != NumOps; ++i) { bool inMem = false; - SDValue Arg = TheCall->getArg(i); - ISD::ArgFlagsTy Flags = TheCall->getArgFlags(i); + SDValue Arg = Outs[i].Val; + ISD::ArgFlagsTy Flags = Outs[i].Flags; // PtrOff will be used to store the current argument to the stack if a // register cannot be found for it. @@ -3031,7 +3061,7 @@ ArgOffset = ((ArgOffset+15)/16)*16; ArgOffset += 12*16; for (unsigned i = 0; i != NumOps; ++i) { - SDValue Arg = TheCall->getArg(i); + SDValue Arg = Outs[i].Val; MVT ArgType = Arg.getValueType(); if (ArgType==MVT::v4f32 || ArgType==MVT::v4i32 || ArgType==MVT::v8i16 || ArgType==MVT::v16i8) { @@ -3065,18 +3095,21 @@ FPOp, true, TailCallArguments); } - return FinishCall(DAG, TheCall, TM, RegsToPass, Op, InFlag, Chain, Callee, - SPDiff, NumBytes); + return FinishCall(CallConv, dl, isTailCall, isVarArg, DAG, + RegsToPass, InFlag, Chain, Callee, SPDiff, NumBytes, + Ins, InVals); } -SDValue PPCTargetLowering::LowerRET(SDValue Op, SelectionDAG &DAG, - TargetMachine &TM) { +SDValue +PPCTargetLowering::LowerReturn(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Outs, + DebugLoc dl, SelectionDAG &DAG) { + SmallVector RVLocs; - unsigned CC = DAG.getMachineFunction().getFunction()->getCallingConv(); - bool isVarArg = DAG.getMachineFunction().getFunction()->isVarArg(); - DebugLoc dl = Op.getDebugLoc(); - CCState CCInfo(CC, isVarArg, TM, RVLocs, *DAG.getContext()); - CCInfo.AnalyzeReturn(Op.getNode(), RetCC_PPC); + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), + RVLocs, *DAG.getContext()); + CCInfo.AnalyzeReturn(Outs, RetCC_PPC); // If this is the first return lowered for this function, add the regs to the // liveout set for the function. @@ -3085,37 +3118,6 @@ DAG.getMachineFunction().getRegInfo().addLiveOut(RVLocs[i].getLocReg()); } - SDValue Chain = Op.getOperand(0); - - Chain = GetPossiblePreceedingTailCall(Chain, PPCISD::TAILCALL); - if (Chain.getOpcode() == PPCISD::TAILCALL) { - SDValue TailCall = Chain; - SDValue TargetAddress = TailCall.getOperand(1); - SDValue StackAdjustment = TailCall.getOperand(2); - - assert(((TargetAddress.getOpcode() == ISD::Register && - cast(TargetAddress)->getReg() == PPC::CTR) || - TargetAddress.getOpcode() == ISD::TargetExternalSymbol || - TargetAddress.getOpcode() == ISD::TargetGlobalAddress || - isa(TargetAddress)) && - "Expecting an global address, external symbol, absolute value or register"); - - assert(StackAdjustment.getOpcode() == ISD::Constant && - "Expecting a const value"); - - SmallVector Operands; - Operands.push_back(Chain.getOperand(0)); - Operands.push_back(TargetAddress); - Operands.push_back(StackAdjustment); - // Copy registers used by the call. Last operand is a flag so it is not - // copied. - for (unsigned i=3; i < TailCall.getNumOperands()-1; i++) { - Operands.push_back(Chain.getOperand(i)); - } - return DAG.getNode(PPCISD::TC_RETURN, dl, MVT::Other, &Operands[0], - Operands.size()); - } - SDValue Flag; // Copy the result values into the output registers. @@ -3123,7 +3125,7 @@ CCValAssign &VA = RVLocs[i]; assert(VA.isRegLoc() && "Can only return in registers!"); Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), - Op.getOperand(i*2+1), Flag); + Outs[i].Val, Flag); Flag = Chain.getValue(1); } @@ -4178,24 +4180,6 @@ return LowerVAARG(Op, DAG, VarArgsFrameIndex, VarArgsStackOffset, VarArgsNumGPR, VarArgsNumFPR, PPCSubTarget); - case ISD::FORMAL_ARGUMENTS: - if (PPCSubTarget.isSVR4ABI()) { - return LowerFORMAL_ARGUMENTS_SVR4(Op, DAG, VarArgsFrameIndex, - VarArgsStackOffset, VarArgsNumGPR, - VarArgsNumFPR, PPCSubTarget); - } else { - return LowerFORMAL_ARGUMENTS_Darwin(Op, DAG, VarArgsFrameIndex, - PPCSubTarget); - } - - case ISD::CALL: - if (PPCSubTarget.isSVR4ABI()) { - return LowerCALL_SVR4(Op, DAG, PPCSubTarget, getTargetMachine()); - } else { - return LowerCALL_Darwin(Op, DAG, PPCSubTarget, getTargetMachine()); - } - - case ISD::RET: return LowerRET(Op, DAG, getTargetMachine()); case ISD::STACKRESTORE: return LowerSTACKRESTORE(Op, DAG, PPCSubTarget); case ISD::DYNAMIC_STACKALLOC: return LowerDYNAMIC_STACKALLOC(Op, DAG, PPCSubTarget); Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h (original) +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h Tue Aug 4 20:29:28 2009 @@ -160,8 +160,6 @@ /// indexed. This is used to implement atomic operations. STCX, - /// TAILCALL - Indicates a tail call should be taken. - TAILCALL, /// TC_RETURN - A tail call return. /// operand #0 chain /// operand #1 callee (register or absolute) @@ -327,12 +325,12 @@ /// the offset of the target addressing mode. virtual bool isLegalAddressImmediate(GlobalValue *GV) const; - /// IsEligibleForTailCallOptimization - Check whether the call is eligible - /// for tail call optimization. Targets which want to do tail call - /// optimization should implement this function. - virtual bool IsEligibleForTailCallOptimization(CallSDNode *TheCall, - SDValue Ret, - SelectionDAG &DAG) const; + virtual bool + IsEligibleForTailCallOptimization(SDValue Callee, + unsigned CalleeCC, + bool isVarArg, + const SmallVectorImpl &Ins, + SelectionDAG& DAG) const; virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const; @@ -370,20 +368,6 @@ SDValue LowerVAARG(SDValue Op, SelectionDAG &DAG, int VarArgsFrameIndex, int VarArgsStackOffset, unsigned VarArgsNumGPR, unsigned VarArgsNumFPR, const PPCSubtarget &Subtarget); - SDValue LowerFORMAL_ARGUMENTS_SVR4(SDValue Op, SelectionDAG &DAG, - int &VarArgsFrameIndex, - int &VarArgsStackOffset, - unsigned &VarArgsNumGPR, - unsigned &VarArgsNumFPR, - const PPCSubtarget &Subtarget); - SDValue LowerFORMAL_ARGUMENTS_Darwin(SDValue Op, SelectionDAG &DAG, - int &VarArgsFrameIndex, - const PPCSubtarget &Subtarget); - SDValue LowerCALL_Darwin(SDValue Op, SelectionDAG &DAG, - const PPCSubtarget &Subtarget, TargetMachine &TM); - SDValue LowerCALL_SVR4(SDValue Op, SelectionDAG &DAG, - const PPCSubtarget &Subtarget, TargetMachine &TM); - SDValue LowerRET(SDValue Op, SelectionDAG &DAG, TargetMachine &TM); SDValue LowerSTACKRESTORE(SDValue Op, SelectionDAG &DAG, const PPCSubtarget &Subtarget); SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG, @@ -400,6 +384,71 @@ SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG); SDValue LowerSCALAR_TO_VECTOR(SDValue Op, SelectionDAG &DAG); SDValue LowerMUL(SDValue Op, SelectionDAG &DAG); + + SDValue LowerCallResult(SDValue Chain, SDValue InFlag, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + SDValue FinishCall(unsigned CallConv, DebugLoc dl, bool isTailCall, + bool isVarArg, + SelectionDAG &DAG, + SmallVector, 8> + &RegsToPass, + SDValue InFlag, SDValue Chain, + SDValue &Callee, + int SPDiff, unsigned NumBytes, + const SmallVectorImpl &Ins, + SmallVectorImpl &InVals); + + virtual SDValue + LowerFormalArguments(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + + virtual SDValue + LowerCall(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, bool isTailCall, + const SmallVectorImpl &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + + virtual SDValue + LowerReturn(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Outs, + DebugLoc dl, SelectionDAG &DAG); + + SDValue + LowerFormalArguments_Darwin(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + SDValue + LowerFormalArguments_SVR4(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + + SDValue + LowerCall_Darwin(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, bool isTailCall, + const SmallVectorImpl &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + SDValue + LowerCall_SVR4(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, bool isTailCall, + const SmallVectorImpl &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); }; } Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td (original) +++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Tue Aug 4 20:29:28 2009 @@ -125,9 +125,6 @@ def PPCtc_return : SDNode<"PPCISD::TC_RETURN", SDT_PPCTC_ret, [SDNPHasChain, SDNPOptInFlag]>; -def PPCtailcall : SDNode<"PPCISD::TAILCALL", SDT_PPCCall, - [SDNPHasChain, SDNPOutFlag, SDNPOptInFlag]>; - def PPCvcmp : SDNode<"PPCISD::VCMP" , SDT_PPCvcmp, []>; def PPCvcmp_o : SDNode<"PPCISD::VCMPo", SDT_PPCvcmp, [SDNPOutFlag]>; Modified: llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp (original) +++ llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp Tue Aug 4 20:29:28 2009 @@ -33,18 +33,21 @@ #include "SparcGenCallingConv.inc" -static SDValue LowerRET(SDValue Op, SelectionDAG &DAG) { +SDValue +SparcTargetLowering::LowerReturn(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Outs, + DebugLoc dl, SelectionDAG &DAG) { + // CCValAssign - represent the assignment of the return value to locations. SmallVector RVLocs; - unsigned CC = DAG.getMachineFunction().getFunction()->getCallingConv(); - bool isVarArg = DAG.getMachineFunction().getFunction()->isVarArg(); - DebugLoc dl = Op.getDebugLoc(); // CCState - Info about the registers and stack slot. - CCState CCInfo(CC, isVarArg, DAG.getTarget(), RVLocs, *DAG.getContext()); + CCState CCInfo(CallConv, isVarArg, DAG.getTarget(), + RVLocs, *DAG.getContext()); - // Analize return values of ISD::RET - CCInfo.AnalyzeReturn(Op.getNode(), RetCC_Sparc32); + // Analize return values. + CCInfo.AnalyzeReturn(Outs, RetCC_Sparc32); // If this is the first return lowered for this function, add the regs to the // liveout set for the function. @@ -54,7 +57,6 @@ DAG.getMachineFunction().getRegInfo().addLiveOut(RVLocs[i].getLocReg()); } - SDValue Chain = Op.getOperand(0); SDValue Flag; // Copy the result values into the output registers. @@ -62,10 +64,8 @@ CCValAssign &VA = RVLocs[i]; assert(VA.isRegLoc() && "Can only return in registers!"); - // ISD::RET => ret chain, (regnum1,val1), ... - // So i*2+1 index only the regnums. Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), - Op.getOperand(i*2+1), Flag); + Outs[i].Val, Flag); // Guarantee that all emitted copies are stuck together with flags. Flag = Chain.getValue(1); @@ -76,23 +76,25 @@ return DAG.getNode(SPISD::RET_FLAG, dl, MVT::Other, Chain); } -/// LowerArguments - V8 uses a very simple ABI, where all values are passed in -/// either one or two GPRs, including FP values. TODO: we should pass FP values -/// in FP registers for fastcc functions. +/// LowerFormalArguments - V8 uses a very simple ABI, where all values are +/// passed in either one or two GPRs, including FP values. TODO: we should +/// pass FP values in FP registers for fastcc functions. SDValue -SparcTargetLowering::LowerFORMAL_ARGUMENTS(SDValue Op, - SelectionDAG &DAG) { +SparcTargetLowering::LowerFormalArguments(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl + &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { + MachineFunction &MF = DAG.getMachineFunction(); MachineRegisterInfo &RegInfo = MF.getRegInfo(); - SDValue Root = Op.getOperand(0); - bool isVarArg = cast(Op.getOperand(2))->getZExtValue() != 0; - unsigned CC = MF.getFunction()->getCallingConv(); - DebugLoc dl = Op.getDebugLoc(); // Assign locations to all of the incoming arguments. SmallVector ArgLocs; - CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs, *DAG.getContext()); - CCInfo.AnalyzeFormalArguments(Op.getNode(), CC_Sparc32); + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), + ArgLocs, *DAG.getContext()); + CCInfo.AnalyzeFormalArguments(Ins, CC_Sparc32); static const unsigned ArgRegs[] = { SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5 @@ -100,7 +102,6 @@ const unsigned *CurArgReg = ArgRegs, *ArgRegEnd = ArgRegs+6; unsigned ArgOffset = 68; - SmallVector ArgValues; for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { SDValue ArgValue; CCValAssign &VA = ArgLocs[i]; @@ -113,23 +114,26 @@ case MVT::i8: case MVT::i16: case MVT::i32: - if (CurArgReg < ArgRegEnd) { // Lives in an incoming GPR + if (!Ins[i].Used) { // Argument is dead. + if (CurArgReg < ArgRegEnd) ++CurArgReg; + InVals.push_back(DAG.getUNDEF(ObjectVT)); + } else if (CurArgReg < ArgRegEnd) { // Lives in an incoming GPR unsigned VReg = RegInfo.createVirtualRegister(&SP::IntRegsRegClass); MF.getRegInfo().addLiveIn(*CurArgReg++, VReg); - SDValue Arg = DAG.getCopyFromReg(Root, dl, VReg, MVT::i32); + SDValue Arg = DAG.getCopyFromReg(Chain, dl, VReg, MVT::i32); if (ObjectVT != MVT::i32) { unsigned AssertOp = ISD::AssertSext; Arg = DAG.getNode(AssertOp, dl, MVT::i32, Arg, DAG.getValueType(ObjectVT)); Arg = DAG.getNode(ISD::TRUNCATE, dl, ObjectVT, Arg); } - ArgValues.push_back(Arg); + InVals.push_back(Arg); } else { int FrameIdx = MF.getFrameInfo()->CreateFixedObject(4, ArgOffset); SDValue FIPtr = DAG.getFrameIndex(FrameIdx, MVT::i32); SDValue Load; if (ObjectVT == MVT::i32) { - Load = DAG.getLoad(MVT::i32, dl, Root, FIPtr, NULL, 0); + Load = DAG.getLoad(MVT::i32, dl, Chain, FIPtr, NULL, 0); } else { ISD::LoadExtType LoadOp = ISD::SEXTLOAD; @@ -137,56 +141,63 @@ unsigned Offset = 4-std::max(1U, ObjectVT.getSizeInBits()/8); FIPtr = DAG.getNode(ISD::ADD, dl, MVT::i32, FIPtr, DAG.getConstant(Offset, MVT::i32)); - Load = DAG.getExtLoad(LoadOp, dl, MVT::i32, Root, FIPtr, + Load = DAG.getExtLoad(LoadOp, dl, MVT::i32, Chain, FIPtr, NULL, 0, ObjectVT); Load = DAG.getNode(ISD::TRUNCATE, dl, ObjectVT, Load); } - ArgValues.push_back(Load); + InVals.push_back(Load); } ArgOffset += 4; break; case MVT::f32: - if (CurArgReg < ArgRegEnd) { // Lives in an incoming GPR + if (!Ins[i].Used) { // Argument is dead. + if (CurArgReg < ArgRegEnd) ++CurArgReg; + InVals.push_back(DAG.getUNDEF(ObjectVT)); + } else if (CurArgReg < ArgRegEnd) { // Lives in an incoming GPR // FP value is passed in an integer register. unsigned VReg = RegInfo.createVirtualRegister(&SP::IntRegsRegClass); MF.getRegInfo().addLiveIn(*CurArgReg++, VReg); - SDValue Arg = DAG.getCopyFromReg(Root, dl, VReg, MVT::i32); + SDValue Arg = DAG.getCopyFromReg(Chain, dl, VReg, MVT::i32); Arg = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f32, Arg); - ArgValues.push_back(Arg); + InVals.push_back(Arg); } else { int FrameIdx = MF.getFrameInfo()->CreateFixedObject(4, ArgOffset); SDValue FIPtr = DAG.getFrameIndex(FrameIdx, MVT::i32); - SDValue Load = DAG.getLoad(MVT::f32, dl, Root, FIPtr, NULL, 0); - ArgValues.push_back(Load); + SDValue Load = DAG.getLoad(MVT::f32, dl, Chain, FIPtr, NULL, 0); + InVals.push_back(Load); } ArgOffset += 4; break; case MVT::i64: case MVT::f64: - { + if (!Ins[i].Used) { // Argument is dead. + if (CurArgReg < ArgRegEnd) ++CurArgReg; + if (CurArgReg < ArgRegEnd) ++CurArgReg; + InVals.push_back(DAG.getUNDEF(ObjectVT)); + } else { SDValue HiVal; if (CurArgReg < ArgRegEnd) { // Lives in an incoming GPR unsigned VRegHi = RegInfo.createVirtualRegister(&SP::IntRegsRegClass); MF.getRegInfo().addLiveIn(*CurArgReg++, VRegHi); - HiVal = DAG.getCopyFromReg(Root, dl, VRegHi, MVT::i32); + HiVal = DAG.getCopyFromReg(Chain, dl, VRegHi, MVT::i32); } else { int FrameIdx = MF.getFrameInfo()->CreateFixedObject(4, ArgOffset); SDValue FIPtr = DAG.getFrameIndex(FrameIdx, MVT::i32); - HiVal = DAG.getLoad(MVT::i32, dl, Root, FIPtr, NULL, 0); + HiVal = DAG.getLoad(MVT::i32, dl, Chain, FIPtr, NULL, 0); } SDValue LoVal; if (CurArgReg < ArgRegEnd) { // Lives in an incoming GPR unsigned VRegLo = RegInfo.createVirtualRegister(&SP::IntRegsRegClass); MF.getRegInfo().addLiveIn(*CurArgReg++, VRegLo); - LoVal = DAG.getCopyFromReg(Root, dl, VRegLo, MVT::i32); + LoVal = DAG.getCopyFromReg(Chain, dl, VRegLo, MVT::i32); } else { int FrameIdx = MF.getFrameInfo()->CreateFixedObject(4, ArgOffset+4); SDValue FIPtr = DAG.getFrameIndex(FrameIdx, MVT::i32); - LoVal = DAG.getLoad(MVT::i32, dl, Root, FIPtr, NULL, 0); + LoVal = DAG.getLoad(MVT::i32, dl, Chain, FIPtr, NULL, 0); } // Compose the two halves together into an i64 unit. @@ -197,7 +208,7 @@ if (ObjectVT == MVT::f64) WholeValue = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f64, WholeValue); - ArgValues.push_back(WholeValue); + InVals.push_back(WholeValue); } ArgOffset += 8; break; @@ -224,32 +235,29 @@ } if (!OutChains.empty()) { - OutChains.push_back(Root); - Root = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, - &OutChains[0], OutChains.size()); + OutChains.push_back(Chain); + Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, + &OutChains[0], OutChains.size()); } } - ArgValues.push_back(Root); - - // Return the new list of results. - return DAG.getNode(ISD::MERGE_VALUES, dl, Op.getNode()->getVTList(), - &ArgValues[0], ArgValues.size()).getValue(Op.getResNo()); + return Chain; } -static SDValue LowerCALL(SDValue Op, SelectionDAG &DAG) { - CallSDNode *TheCall = cast(Op.getNode()); - unsigned CallingConv = TheCall->getCallingConv(); - SDValue Chain = TheCall->getChain(); - SDValue Callee = TheCall->getCallee(); - bool isVarArg = TheCall->isVarArg(); - DebugLoc dl = TheCall->getDebugLoc(); +SDValue +SparcTargetLowering::LowerCall(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, + bool isTailCall, + const SmallVectorImpl &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { #if 0 // Analyze operands of the call, assigning locations to each operand. SmallVector ArgLocs; - CCState CCInfo(CallingConv, isVarArg, DAG.getTarget(), ArgLocs); - CCInfo.AnalyzeCallOperands(Op.getNode(), CC_Sparc32); + CCState CCInfo(CallConv, isVarArg, DAG.getTarget(), ArgLocs); + CCInfo.AnalyzeCallOperands(Outs, CC_Sparc32); // Get the size of the outgoing arguments stack space requirement. unsigned ArgsSize = CCInfo.getNextStackOffset(); @@ -259,8 +267,8 @@ // Count the size of the outgoing arguments. unsigned ArgsSize = 0; - for (unsigned i = 0, e = TheCall->getNumArgs(); i != e; ++i) { - switch (TheCall->getArg(i).getValueType().getSimpleVT()) { + for (unsigned i = 0, e = Outs.size(); i != e; ++i) { + switch (Outs[i].Val.getValueType().getSimpleVT()) { default: llvm_unreachable("Unknown value type!"); case MVT::i1: case MVT::i8: @@ -293,9 +301,7 @@ // Walk the register/memloc assignments, inserting copies/loads. for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { CCValAssign &VA = ArgLocs[i]; - - // Arguments start after the 5 first operands of ISD::CALL - SDValue Arg = TheCall->getArg(i); + SDValue Arg = Outs[i].Val; // Promote the value if needed. switch (VA.getLocInfo()) { @@ -335,8 +341,8 @@ }; unsigned ArgOffset = 68; - for (unsigned i = 0, e = TheCall->getNumArgs(); i != e; ++i) { - SDValue Val = TheCall->getArg(i); + for (unsigned i = 0, e = Outs.size(); i != e; ++i) { + SDValue Val = Outs[i].Val; MVT ObjectVT = Val.getValueType(); SDValue ValToStore(0, 0); unsigned ObjSize; @@ -469,11 +475,10 @@ // Assign locations to each value returned by this call. SmallVector RVLocs; - CCState RVInfo(CallingConv, isVarArg, DAG.getTarget(), + CCState RVInfo(CallConv, isVarArg, DAG.getTarget(), RVLocs, *DAG.getContext()); - RVInfo.AnalyzeCallResult(TheCall, RetCC_Sparc32); - SmallVector ResultVals; + RVInfo.AnalyzeCallResult(Ins, RetCC_Sparc32); // Copy all of the result registers out of their specified physreg. for (unsigned i = 0; i != RVLocs.size(); ++i) { @@ -486,15 +491,10 @@ Chain = DAG.getCopyFromReg(Chain, dl, Reg, RVLocs[i].getValVT(), InFlag).getValue(1); InFlag = Chain.getValue(2); - ResultVals.push_back(Chain.getValue(0)); + InVals.push_back(Chain.getValue(0)); } - ResultVals.push_back(Chain); - - // Merge everything together with a MERGE_VALUES node. - return DAG.getNode(ISD::MERGE_VALUES, dl, - TheCall->getVTList(), &ResultVals[0], - ResultVals.size()); + return Chain; } @@ -668,9 +668,6 @@ setOperationAction(ISD::DBG_LABEL, MVT::Other, Expand); setOperationAction(ISD::EH_LABEL, MVT::Other, Expand); - // RET must be custom lowered, to meet ABI requirements - setOperationAction(ISD::RET , MVT::Other, Custom); - // VASTART needs to be custom lowered to use the VarArgsFrameIndex. setOperationAction(ISD::VASTART , MVT::Other, Custom); // VAARG needs to be lowered to not do unaligned accesses for doubles. @@ -948,9 +945,6 @@ case ISD::VASTART: return LowerVASTART(Op, DAG, *this); case ISD::VAARG: return LowerVAARG(Op, DAG); case ISD::DYNAMIC_STACKALLOC: return LowerDYNAMIC_STACKALLOC(Op, DAG); - case ISD::CALL: return LowerCALL(Op, DAG); - case ISD::FORMAL_ARGUMENTS: return LowerFORMAL_ARGUMENTS(Op, DAG); - case ISD::RET: return LowerRET(Op, DAG); } } Modified: llvm/trunk/lib/Target/Sparc/SparcISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcISelLowering.h?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/Target/Sparc/SparcISelLowering.h (original) +++ llvm/trunk/lib/Target/Sparc/SparcISelLowering.h Tue Aug 4 20:29:28 2009 @@ -44,7 +44,6 @@ public: SparcTargetLowering(TargetMachine &TM); virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG); - SDValue LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG); int getVarArgsFrameOffset() const { return VarArgsFrameOffset; } @@ -74,6 +73,29 @@ /// getFunctionAlignment - Return the Log2 alignment of this function. virtual unsigned getFunctionAlignment(const Function *F) const; + + virtual SDValue + LowerFormalArguments(SDValue Chain, + unsigned CallConv, + bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + + virtual SDValue + LowerCall(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, + bool isTailCall, + const SmallVectorImpl &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + + virtual SDValue + LowerReturn(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Outs, + DebugLoc dl, SelectionDAG &DAG); }; } // end namespace llvm Modified: llvm/trunk/lib/Target/Sparc/SparcInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcInstrInfo.td?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/Target/Sparc/SparcInstrInfo.td (original) +++ llvm/trunk/lib/Target/Sparc/SparcInstrInfo.td Tue Aug 4 20:29:28 2009 @@ -754,8 +754,6 @@ def : Pat<(call texternalsym:$dst), (CALL texternalsym:$dst)>; -def : Pat<(ret), (RETL)>; - // Map integer extload's to zextloads. def : Pat<(i32 (extloadi1 ADDRrr:$src)), (LDUBrr ADDRrr:$src)>; def : Pat<(i32 (extloadi1 ADDRri:$src)), (LDUBri ADDRri:$src)>; Modified: llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp (original) +++ llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp Tue Aug 4 20:29:28 2009 @@ -82,8 +82,6 @@ setSchedulingPreference(SchedulingForLatency); setBooleanContents(ZeroOrOneBooleanContent); - setOperationAction(ISD::RET, MVT::Other, Custom); - setOperationAction(ISD::BR_JT, MVT::Other, Expand); setOperationAction(ISD::BRCOND, MVT::Other, Expand); setOperationAction(ISD::BR_CC, MVT::i32, Custom); @@ -155,9 +153,6 @@ SDValue SystemZTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) { switch (Op.getOpcode()) { - case ISD::FORMAL_ARGUMENTS: return LowerFORMAL_ARGUMENTS(Op, DAG); - case ISD::RET: return LowerRET(Op, DAG); - case ISD::CALL: return LowerCALL(Op, DAG); case ISD::BR_CC: return LowerBR_CC(Op, DAG); case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG); case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG); @@ -175,27 +170,41 @@ #include "SystemZGenCallingConv.inc" -SDValue SystemZTargetLowering::LowerFORMAL_ARGUMENTS(SDValue Op, - SelectionDAG &DAG) { - unsigned CC = cast(Op.getOperand(1))->getZExtValue(); - switch (CC) { +SDValue +SystemZTargetLowering::LowerFormalArguments(SDValue Chain, + unsigned CallConv, + bool isVarArg, + const SmallVectorImpl + &Ins, + DebugLoc dl, + SelectionDAG &DAG, + SmallVectorImpl &InVals) { + + switch (CallConv) { default: llvm_unreachable("Unsupported calling convention"); case CallingConv::C: case CallingConv::Fast: - return LowerCCCArguments(Op, DAG); + return LowerCCCArguments(Chain, CallConv, isVarArg, Ins, dl, DAG, InVals); } } -SDValue SystemZTargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG) { - CallSDNode *TheCall = cast(Op.getNode()); - unsigned CallingConv = TheCall->getCallingConv(); - switch (CallingConv) { +SDValue +SystemZTargetLowering::LowerCall(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, + bool isTailCall, + const SmallVectorImpl &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { + + switch (CallConv) { default: llvm_unreachable("Unsupported calling convention"); case CallingConv::Fast: case CallingConv::C: - return LowerCCCCallTo(Op, DAG, CallingConv); + return LowerCCCCallTo(Chain, Callee, CallConv, isVarArg, isTailCall, + Outs, Ins, dl, DAG, InVals); } } @@ -203,25 +212,29 @@ /// generate load operations for arguments places on the stack. // FIXME: struct return stuff // FIXME: varargs -SDValue SystemZTargetLowering::LowerCCCArguments(SDValue Op, - SelectionDAG &DAG) { +SDValue +SystemZTargetLowering::LowerCCCArguments(SDValue Chain, + unsigned CallConv, + bool isVarArg, + const SmallVectorImpl + &Ins, + DebugLoc dl, + SelectionDAG &DAG, + SmallVectorImpl &InVals) { + MachineFunction &MF = DAG.getMachineFunction(); MachineFrameInfo *MFI = MF.getFrameInfo(); MachineRegisterInfo &RegInfo = MF.getRegInfo(); - SDValue Root = Op.getOperand(0); - bool isVarArg = cast(Op.getOperand(2))->getZExtValue() != 0; - unsigned CC = MF.getFunction()->getCallingConv(); - DebugLoc dl = Op.getDebugLoc(); // Assign locations to all of the incoming arguments. SmallVector ArgLocs; - CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs, *DAG.getContext()); - CCInfo.AnalyzeFormalArguments(Op.getNode(), CC_SystemZ); + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), + ArgLocs, *DAG.getContext()); + CCInfo.AnalyzeFormalArguments(Ins, CC_SystemZ); if (isVarArg) llvm_report_error("Varargs not supported yet"); - SmallVector ArgValues; for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { SDValue ArgValue; CCValAssign &VA = ArgLocs[i]; @@ -232,7 +245,7 @@ switch (LocVT.getSimpleVT()) { default: #ifndef NDEBUG - cerr << "LowerFORMAL_ARGUMENTS Unhandled argument type: " + cerr << "LowerFormalArguments Unhandled argument type: " << LocVT.getSimpleVT() << "\n"; #endif @@ -250,7 +263,7 @@ unsigned VReg = RegInfo.createVirtualRegister(RC); RegInfo.addLiveIn(VA.getLocReg(), VReg); - ArgValue = DAG.getCopyFromReg(Root, dl, VReg, LocVT); + ArgValue = DAG.getCopyFromReg(Chain, dl, VReg, LocVT); } else { // Sanity check assert(VA.isMemLoc()); @@ -263,7 +276,7 @@ // Create the SelectionDAG nodes corresponding to a load // from this parameter SDValue FIN = DAG.getFrameIndex(FI, getPointerTy()); - ArgValue = DAG.getLoad(LocVT, dl, Root, FIN, + ArgValue = DAG.getLoad(LocVT, dl, Chain, FIN, PseudoSourceValue::getFixedStack(FI), 0); } @@ -280,26 +293,25 @@ if (VA.getLocInfo() != CCValAssign::Full) ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); - ArgValues.push_back(ArgValue); + InVals.push_back(ArgValue); } - ArgValues.push_back(Root); - - // Return the new list of results. - return DAG.getNode(ISD::MERGE_VALUES, dl, Op.getNode()->getVTList(), - &ArgValues[0], ArgValues.size()).getValue(Op.getResNo()); + return Chain; } /// LowerCCCCallTo - functions arguments are copied from virtual regs to /// (physical regs)/(stack frame), CALLSEQ_START and CALLSEQ_END are emitted. /// TODO: sret. -SDValue SystemZTargetLowering::LowerCCCCallTo(SDValue Op, SelectionDAG &DAG, - unsigned CC) { - CallSDNode *TheCall = cast(Op.getNode()); - SDValue Chain = TheCall->getChain(); - SDValue Callee = TheCall->getCallee(); - bool isVarArg = TheCall->isVarArg(); - DebugLoc dl = Op.getDebugLoc(); +SDValue +SystemZTargetLowering::LowerCCCCallTo(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, + bool isTailCall, + const SmallVectorImpl + &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { + MachineFunction &MF = DAG.getMachineFunction(); // Offset to first argument stack slot. @@ -307,9 +319,10 @@ // Analyze operands of the call, assigning locations to each operand. SmallVector ArgLocs; - CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs, *DAG.getContext()); + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), + ArgLocs, *DAG.getContext()); - CCInfo.AnalyzeCallOperands(TheCall, CC_SystemZ); + CCInfo.AnalyzeCallOperands(Outs, CC_SystemZ); // Get a count of how many bytes are to be pushed on the stack. unsigned NumBytes = CCInfo.getNextStackOffset(); @@ -325,8 +338,7 @@ for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { CCValAssign &VA = ArgLocs[i]; - // Arguments start after the 5 first operands of ISD::CALL - SDValue Arg = TheCall->getArg(i); + SDValue Arg = Outs[i].Val; // Promote the value if needed. switch (VA.getLocInfo()) { @@ -418,30 +430,27 @@ // Handle result values, copying them out of physregs into vregs that we // return. - return SDValue(LowerCallResult(Chain, InFlag, TheCall, CC, DAG), - Op.getResNo()); + return LowerCallResult(Chain, InFlag, CallConv, isVarArg, Ins, dl, + DAG, InVals); } -/// LowerCallResult - Lower the result values of an ISD::CALL into the -/// appropriate copies out of appropriate physical registers. This assumes that -/// Chain/InFlag are the input chain/flag to use, and that TheCall is the call -/// being lowered. Returns a SDNode with the same number of values as the -/// ISD::CALL. -SDNode* +/// LowerCallResult - Lower the result values of a call into the +/// appropriate copies out of appropriate physical registers. +/// +SDValue SystemZTargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag, - CallSDNode *TheCall, - unsigned CallingConv, - SelectionDAG &DAG) { - bool isVarArg = TheCall->isVarArg(); - DebugLoc dl = TheCall->getDebugLoc(); + unsigned CallConv, bool isVarArg, + const SmallVectorImpl + &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { // Assign locations to each value returned by this call. SmallVector RVLocs; - CCState CCInfo(CallingConv, isVarArg, getTargetMachine(), RVLocs, + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), RVLocs, *DAG.getContext()); - CCInfo.AnalyzeCallResult(TheCall, RetCC_SystemZ); - SmallVector ResultVals; + CCInfo.AnalyzeCallResult(Ins, RetCC_SystemZ); // Copy all of the result registers out of their specified physreg. for (unsigned i = 0; i != RVLocs.size(); ++i) { @@ -465,29 +474,28 @@ if (VA.getLocInfo() != CCValAssign::Full) RetValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), RetValue); - ResultVals.push_back(RetValue); + InVals.push_back(RetValue); } - ResultVals.push_back(Chain); - - // Merge everything together with a MERGE_VALUES node. - return DAG.getNode(ISD::MERGE_VALUES, dl, TheCall->getVTList(), - &ResultVals[0], ResultVals.size()).getNode(); + return Chain; } -SDValue SystemZTargetLowering::LowerRET(SDValue Op, SelectionDAG &DAG) { +SDValue +SystemZTargetLowering::LowerReturn(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Outs, + DebugLoc dl, SelectionDAG &DAG) { + // CCValAssign - represent the assignment of the return value to a location SmallVector RVLocs; - unsigned CC = DAG.getMachineFunction().getFunction()->getCallingConv(); - bool isVarArg = DAG.getMachineFunction().getFunction()->isVarArg(); - DebugLoc dl = Op.getDebugLoc(); // CCState - Info about the registers and stack slot. - CCState CCInfo(CC, isVarArg, getTargetMachine(), RVLocs, *DAG.getContext()); + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), + RVLocs, *DAG.getContext()); - // Analize return values of ISD::RET - CCInfo.AnalyzeReturn(Op.getNode(), RetCC_SystemZ); + // Analize return values. + CCInfo.AnalyzeReturn(Outs, RetCC_SystemZ); // If this is the first return lowered for this function, add the regs to the // liveout set for the function. @@ -497,14 +505,12 @@ DAG.getMachineFunction().getRegInfo().addLiveOut(RVLocs[i].getLocReg()); } - // The chain is always operand #0 - SDValue Chain = Op.getOperand(0); SDValue Flag; // Copy the result values into the output registers. for (unsigned i = 0; i != RVLocs.size(); ++i) { CCValAssign &VA = RVLocs[i]; - SDValue ResValue = Op.getOperand(i*2+1); + SDValue ResValue = Outs[i].Val; assert(VA.isRegLoc() && "Can only return in registers!"); // If this is an 8/16/32-bit value, it is really should be passed promoted @@ -516,8 +522,6 @@ else if (VA.getLocInfo() == CCValAssign::AExt) ResValue = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), ResValue); - // ISD::RET => ret chain, (regnum1,val1), ... - // So i*2+1 index only the regnums Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), ResValue, Flag); // Guarantee that all emitted copies are stuck together, Modified: llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.h?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.h (original) +++ llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.h Tue Aug 4 20:29:28 2009 @@ -28,7 +28,7 @@ /// Return with a flag operand. Operand 0 is the chain operand. RET_FLAG, - /// CALL/TAILCALL - These operations represent an abstract call + /// CALL - These operations represent an abstract call /// instruction, which includes a bunch of information. CALL, @@ -69,21 +69,12 @@ return 1; } - SDValue LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG); - SDValue LowerRET(SDValue Op, SelectionDAG &DAG); - SDValue LowerCALL(SDValue Op, SelectionDAG &DAG); SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG); SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG); SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG); SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG); SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG); - SDValue LowerCCCArguments(SDValue Op, SelectionDAG &DAG); - SDValue LowerCCCCallTo(SDValue Op, SelectionDAG &DAG, unsigned CC); - SDNode* LowerCallResult(SDValue Chain, SDValue InFlag, - CallSDNode *TheCall, - unsigned CallingConv, SelectionDAG &DAG); - SDValue EmitCmp(SDValue LHS, SDValue RHS, ISD::CondCode CC, SDValue &SystemZCC, SelectionDAG &DAG); @@ -93,6 +84,48 @@ MachineBasicBlock *BB) const; private: + SDValue LowerCCCCallTo(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, + bool isTailCall, + const SmallVectorImpl &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + + SDValue LowerCCCArguments(SDValue Chain, + unsigned CallConv, + bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, + SelectionDAG &DAG, + SmallVectorImpl &InVals); + + SDValue LowerCallResult(SDValue Chain, SDValue InFlag, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + + virtual SDValue + LowerFormalArguments(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + virtual SDValue + LowerCall(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, bool isTailCall, + const SmallVectorImpl &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + + virtual SDValue + LowerReturn(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Outs, + DebugLoc dl, SelectionDAG &DAG); + const SystemZSubtarget &Subtarget; const SystemZTargetMachine &TM; const SystemZRegisterInfo *RegInfo; Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Aug 4 20:29:28 2009 @@ -294,8 +294,6 @@ setOperationAction(ISD::SELECT , MVT::i64 , Custom); setOperationAction(ISD::SETCC , MVT::i64 , Custom); } - // X86 ret instruction may pop stack. - setOperationAction(ISD::RET , MVT::Other, Custom); setOperationAction(ISD::EH_RETURN , MVT::Other, Custom); // Darwin ABI issue. @@ -1060,16 +1058,16 @@ #include "X86GenCallingConv.inc" -/// LowerRET - Lower an ISD::RET node. -SDValue X86TargetLowering::LowerRET(SDValue Op, SelectionDAG &DAG) { - DebugLoc dl = Op.getDebugLoc(); - assert((Op.getNumOperands() & 1) == 1 && "ISD::RET should have odd # args"); +SDValue +X86TargetLowering::LowerReturn(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Outs, + DebugLoc dl, SelectionDAG &DAG) { SmallVector RVLocs; - unsigned CC = DAG.getMachineFunction().getFunction()->getCallingConv(); - bool isVarArg = DAG.getMachineFunction().getFunction()->isVarArg(); - CCState CCInfo(CC, isVarArg, getTargetMachine(), RVLocs, *DAG.getContext()); - CCInfo.AnalyzeReturn(Op.getNode(), RetCC_X86); + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), + RVLocs, *DAG.getContext()); + CCInfo.AnalyzeReturn(Outs, RetCC_X86); // If this is the first return lowered for this function, add the regs to the // liveout set for the function. @@ -1078,37 +1076,7 @@ if (RVLocs[i].isRegLoc()) DAG.getMachineFunction().getRegInfo().addLiveOut(RVLocs[i].getLocReg()); } - SDValue Chain = Op.getOperand(0); - - // Handle tail call return. - Chain = GetPossiblePreceedingTailCall(Chain, X86ISD::TAILCALL); - if (Chain.getOpcode() == X86ISD::TAILCALL) { - SDValue TailCall = Chain; - SDValue TargetAddress = TailCall.getOperand(1); - SDValue StackAdjustment = TailCall.getOperand(2); - assert(((TargetAddress.getOpcode() == ISD::Register && - (cast(TargetAddress)->getReg() == X86::EAX || - cast(TargetAddress)->getReg() == X86::R11)) || - TargetAddress.getOpcode() == ISD::TargetExternalSymbol || - TargetAddress.getOpcode() == ISD::TargetGlobalAddress) && - "Expecting an global address, external symbol, or register"); - assert(StackAdjustment.getOpcode() == ISD::Constant && - "Expecting a const value"); - - SmallVector Operands; - Operands.push_back(Chain.getOperand(0)); - Operands.push_back(TargetAddress); - Operands.push_back(StackAdjustment); - // Copy registers used by the call. Last operand is a flag so it is not - // copied. - for (unsigned i=3; i < TailCall.getNumOperands()-1; i++) { - Operands.push_back(Chain.getOperand(i)); - } - return DAG.getNode(X86ISD::TC_RETURN, dl, MVT::Other, &Operands[0], - Operands.size()); - } - // Regular return. SDValue Flag; SmallVector RetOps; @@ -1120,7 +1088,7 @@ for (unsigned i = 0; i != RVLocs.size(); ++i) { CCValAssign &VA = RVLocs[i]; assert(VA.isRegLoc() && "Can only return in registers!"); - SDValue ValToCopy = Op.getOperand(i*2+1); + SDValue ValToCopy = Outs[i].Val; // Returns in ST0/ST1 are handled specially: these are pushed as operands to // the RET instruction and handled by the FP Stackifier. @@ -1179,26 +1147,22 @@ MVT::Other, &RetOps[0], RetOps.size()); } +/// LowerCallResult - Lower the result values of a call into the +/// appropriate copies out of appropriate physical registers. +/// +SDValue +X86TargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { -/// LowerCallResult - Lower the result values of an ISD::CALL into the -/// appropriate copies out of appropriate physical registers. This assumes that -/// Chain/InFlag are the input chain/flag to use, and that TheCall is the call -/// being lowered. The returns a SDNode with the same number of values as the -/// ISD::CALL. -SDNode *X86TargetLowering:: -LowerCallResult(SDValue Chain, SDValue InFlag, CallSDNode *TheCall, - unsigned CallingConv, SelectionDAG &DAG) { - - DebugLoc dl = TheCall->getDebugLoc(); // Assign locations to each value returned by this call. SmallVector RVLocs; - bool isVarArg = TheCall->isVarArg(); bool Is64Bit = Subtarget->is64Bit(); - CCState CCInfo(CallingConv, isVarArg, getTargetMachine(), + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), RVLocs, *DAG.getContext()); - CCInfo.AnalyzeCallResult(TheCall, RetCC_X86); - - SmallVector ResultVals; + CCInfo.AnalyzeCallResult(Ins, RetCC_X86); // Copy all of the result registers out of their specified physreg. for (unsigned i = 0; i != RVLocs.size(); ++i) { @@ -1207,7 +1171,7 @@ // If this is x86-64, and we disabled SSE, we can't return FP values if ((CopyVT == MVT::f32 || CopyVT == MVT::f64) && - ((Is64Bit || TheCall->isInreg()) && !Subtarget->hasSSE1())) { + ((Is64Bit || Ins[i].Flags.isInReg()) && !Subtarget->hasSSE1())) { llvm_report_error("SSE register return with SSE disabled"); } @@ -1250,13 +1214,10 @@ DAG.getIntPtrConstant(1)); } - ResultVals.push_back(Val); + InVals.push_back(Val); } - // Merge everything together with a MERGE_VALUES node. - ResultVals.push_back(Chain); - return DAG.getNode(ISD::MERGE_VALUES, dl, TheCall->getVTList(), - &ResultVals[0], ResultVals.size()).getNode(); + return Chain; } @@ -1270,24 +1231,23 @@ // For info on fast calling convention see Fast Calling Convention (tail call) // implementation LowerX86_32FastCCCallTo. -/// CallIsStructReturn - Determines whether a CALL node uses struct return +/// CallIsStructReturn - Determines whether a call uses struct return /// semantics. -static bool CallIsStructReturn(CallSDNode *TheCall) { - unsigned NumOps = TheCall->getNumArgs(); - if (!NumOps) +static bool CallIsStructReturn(const SmallVectorImpl &Outs) { + if (Outs.empty()) return false; - return TheCall->getArgFlags(0).isSRet(); + return Outs[0].Flags.isSRet(); } /// ArgsAreStructReturn - Determines whether a function uses struct /// return semantics. -static bool ArgsAreStructReturn(SDValue Op) { - unsigned NumArgs = Op.getNode()->getNumValues() - 1; - if (!NumArgs) +static bool +ArgsAreStructReturn(const SmallVectorImpl &Ins) { + if (Ins.empty()) return false; - return cast(Op.getOperand(3))->getArgFlags().isSRet(); + return Ins[0].Flags.isSRet(); } /// IsCalleePop - Determines whether the callee is required to pop its @@ -1326,14 +1286,13 @@ return CC_X86_32_C; } -/// NameDecorationForFORMAL_ARGUMENTS - Selects the appropriate decoration to -/// apply to a MachineFunction containing a given FORMAL_ARGUMENTS node. +/// NameDecorationForCallConv - Selects the appropriate decoration to +/// apply to a MachineFunction containing a given calling convention. NameDecorationStyle -X86TargetLowering::NameDecorationForFORMAL_ARGUMENTS(SDValue Op) { - unsigned CC = cast(Op.getOperand(1))->getZExtValue(); - if (CC == CallingConv::X86_FastCall) +X86TargetLowering::NameDecorationForCallConv(unsigned CallConv) { + if (CallConv == CallingConv::X86_FastCall) return FastCall; - else if (CC == CallingConv::X86_StdCall) + else if (CallConv == CallingConv::X86_StdCall) return StdCall; return None; } @@ -1352,15 +1311,18 @@ /*AlwaysInline=*/true, NULL, 0, NULL, 0); } -SDValue X86TargetLowering::LowerMemArgument(SDValue Op, SelectionDAG &DAG, - const CCValAssign &VA, - MachineFrameInfo *MFI, - unsigned CC, - SDValue Root, unsigned i) { +SDValue +X86TargetLowering::LowerMemArgument(SDValue Chain, + unsigned CallConv, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + const CCValAssign &VA, + MachineFrameInfo *MFI, + unsigned i) { + // Create the nodes corresponding to a load from this parameter slot. - ISD::ArgFlagsTy Flags = - cast(Op.getOperand(3 + i))->getArgFlags(); - bool AlwaysUseMutable = (CC==CallingConv::Fast) && PerformTailCallOpt; + ISD::ArgFlagsTy Flags = Ins[i].Flags; + bool AlwaysUseMutable = (CallConv==CallingConv::Fast) && PerformTailCallOpt; bool isImmutable = !AlwaysUseMutable && !Flags.isByVal(); // FIXME: For now, all byval parameter objects are marked mutable. This can be @@ -1372,15 +1334,21 @@ SDValue FIN = DAG.getFrameIndex(FI, getPointerTy()); if (Flags.isByVal()) return FIN; - return DAG.getLoad(VA.getValVT(), Op.getDebugLoc(), Root, FIN, + return DAG.getLoad(VA.getValVT(), dl, Chain, FIN, PseudoSourceValue::getFixedStack(FI), 0); } SDValue -X86TargetLowering::LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG) { +X86TargetLowering::LowerFormalArguments(SDValue Chain, + unsigned CallConv, + bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, + SelectionDAG &DAG, + SmallVectorImpl &InVals) { + MachineFunction &MF = DAG.getMachineFunction(); X86MachineFunctionInfo *FuncInfo = MF.getInfo(); - DebugLoc dl = Op.getDebugLoc(); const Function* Fn = MF.getFunction(); if (Fn->hasExternalLinkage() && @@ -1389,24 +1357,21 @@ FuncInfo->setForceFramePointer(true); // Decorate the function name. - FuncInfo->setDecorationStyle(NameDecorationForFORMAL_ARGUMENTS(Op)); + FuncInfo->setDecorationStyle(NameDecorationForCallConv(CallConv)); MachineFrameInfo *MFI = MF.getFrameInfo(); - SDValue Root = Op.getOperand(0); - bool isVarArg = cast(Op.getOperand(2))->getZExtValue() != 0; - unsigned CC = MF.getFunction()->getCallingConv(); bool Is64Bit = Subtarget->is64Bit(); bool IsWin64 = Subtarget->isTargetWin64(); - assert(!(isVarArg && CC == CallingConv::Fast) && + assert(!(isVarArg && CallConv == CallingConv::Fast) && "Var args not supported with calling convention fastcc"); // Assign locations to all of the incoming arguments. SmallVector ArgLocs; - CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs, *DAG.getContext()); - CCInfo.AnalyzeFormalArguments(Op.getNode(), CCAssignFnForNode(CC)); + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), + ArgLocs, *DAG.getContext()); + CCInfo.AnalyzeFormalArguments(Ins, CCAssignFnForNode(CallConv)); - SmallVector ArgValues; unsigned LastVal = ~0U; SDValue ArgValue; for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { @@ -1436,7 +1401,7 @@ llvm_unreachable("Unknown argument type!"); unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC); - ArgValue = DAG.getCopyFromReg(Root, dl, Reg, RegVT); + ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, RegVT); // If this is an 8 or 16-bit value, it is really passed promoted to 32 // bits. Insert an assert[sz]ext to capture this, then truncate to the @@ -1461,14 +1426,14 @@ } } else { assert(VA.isMemLoc()); - ArgValue = LowerMemArgument(Op, DAG, VA, MFI, CC, Root, i); + ArgValue = LowerMemArgument(Chain, CallConv, Ins, dl, DAG, VA, MFI, i); } // If value is passed via pointer - do a load. if (VA.getLocInfo() == CCValAssign::Indirect) - ArgValue = DAG.getLoad(VA.getValVT(), dl, Root, ArgValue, NULL, 0); + ArgValue = DAG.getLoad(VA.getValVT(), dl, Chain, ArgValue, NULL, 0); - ArgValues.push_back(ArgValue); + InVals.push_back(ArgValue); } // The x86-64 ABI for returning structs by value requires that we copy @@ -1481,19 +1446,19 @@ Reg = MF.getRegInfo().createVirtualRegister(getRegClassFor(MVT::i64)); FuncInfo->setSRetReturnReg(Reg); } - SDValue Copy = DAG.getCopyToReg(DAG.getEntryNode(), dl, Reg, ArgValues[0]); - Root = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Copy, Root); + SDValue Copy = DAG.getCopyToReg(DAG.getEntryNode(), dl, Reg, InVals[0]); + Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Copy, Chain); } unsigned StackSize = CCInfo.getNextStackOffset(); // align stack specially for tail calls - if (PerformTailCallOpt && CC == CallingConv::Fast) + if (PerformTailCallOpt && CallConv == CallingConv::Fast) StackSize = GetAlignedArgumentStackSize(StackSize, DAG); // If the function takes variable number of arguments, make a frame index for // the start of the first vararg value... for expansion of llvm.va_start. if (isVarArg) { - if (Is64Bit || CC != CallingConv::X86_FastCall) { + if (Is64Bit || CallConv != CallingConv::X86_FastCall) { VarArgsFrameIndex = MFI->CreateFixedObject(1, StackSize); } if (Is64Bit) { @@ -1555,7 +1520,7 @@ for (; NumIntRegs != TotalNumIntRegs; ++NumIntRegs) { unsigned VReg = MF.addLiveIn(GPR64ArgRegs[NumIntRegs], X86::GR64RegisterClass); - SDValue Val = DAG.getCopyFromReg(Root, dl, VReg, MVT::i64); + SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, MVT::i64); SDValue Store = DAG.getStore(Val.getValue(1), dl, Val, FIN, PseudoSourceValue::getFixedStack(RegSaveFrameIndex), 0); @@ -1570,7 +1535,7 @@ for (; NumXMMRegs != TotalNumXMMRegs; ++NumXMMRegs) { unsigned VReg = MF.addLiveIn(XMMArgRegs[NumXMMRegs], X86::VR128RegisterClass); - SDValue Val = DAG.getCopyFromReg(Root, dl, VReg, MVT::v4f32); + SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, MVT::v4f32); SDValue Store = DAG.getStore(Val.getValue(1), dl, Val, FIN, PseudoSourceValue::getFixedStack(RegSaveFrameIndex), 0); @@ -1579,46 +1544,41 @@ DAG.getIntPtrConstant(16)); } if (!MemOps.empty()) - Root = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, + Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &MemOps[0], MemOps.size()); } } - ArgValues.push_back(Root); - // Some CCs need callee pop. - if (IsCalleePop(isVarArg, CC)) { + if (IsCalleePop(isVarArg, CallConv)) { BytesToPopOnReturn = StackSize; // Callee pops everything. BytesCallerReserves = 0; } else { BytesToPopOnReturn = 0; // Callee pops nothing. // If this is an sret function, the return should pop the hidden pointer. - if (!Is64Bit && CC != CallingConv::Fast && ArgsAreStructReturn(Op)) + if (!Is64Bit && CallConv != CallingConv::Fast && ArgsAreStructReturn(Ins)) BytesToPopOnReturn = 4; BytesCallerReserves = StackSize; } if (!Is64Bit) { RegSaveFrameIndex = 0xAAAAAAA; // RegSaveFrameIndex is X86-64 only. - if (CC == CallingConv::X86_FastCall) + if (CallConv == CallingConv::X86_FastCall) VarArgsFrameIndex = 0xAAAAAAA; // fastcc functions can't have varargs. } FuncInfo->setBytesToPopOnReturn(BytesToPopOnReturn); - // Return the new list of results. - return DAG.getNode(ISD::MERGE_VALUES, dl, Op.getNode()->getVTList(), - &ArgValues[0], ArgValues.size()).getValue(Op.getResNo()); + return Chain; } SDValue -X86TargetLowering::LowerMemOpCallTo(CallSDNode *TheCall, SelectionDAG &DAG, - const SDValue &StackPtr, +X86TargetLowering::LowerMemOpCallTo(SDValue Chain, + SDValue StackPtr, SDValue Arg, + DebugLoc dl, SelectionDAG &DAG, const CCValAssign &VA, - SDValue Chain, - SDValue Arg, ISD::ArgFlagsTy Flags) { + ISD::ArgFlagsTy Flags) { const unsigned FirstStackArgOffset = (Subtarget->isTargetWin64() ? 32 : 0); - DebugLoc dl = TheCall->getDebugLoc(); unsigned LocMemOffset = FirstStackArgOffset + VA.getLocMemOffset(); SDValue PtrOff = DAG.getIntPtrConstant(LocMemOffset); PtrOff = DAG.getNode(ISD::ADD, dl, getPointerTy(), StackPtr, PtrOff); @@ -1669,34 +1629,37 @@ return Chain; } -SDValue X86TargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG) { +SDValue +X86TargetLowering::LowerCall(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, bool isTailCall, + const SmallVectorImpl &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { + MachineFunction &MF = DAG.getMachineFunction(); - CallSDNode *TheCall = cast(Op.getNode()); - SDValue Chain = TheCall->getChain(); - unsigned CC = TheCall->getCallingConv(); - bool isVarArg = TheCall->isVarArg(); - bool IsTailCall = TheCall->isTailCall() && - CC == CallingConv::Fast && PerformTailCallOpt; - SDValue Callee = TheCall->getCallee(); bool Is64Bit = Subtarget->is64Bit(); - bool IsStructRet = CallIsStructReturn(TheCall); - DebugLoc dl = TheCall->getDebugLoc(); + bool IsStructRet = CallIsStructReturn(Outs); - assert(!(isVarArg && CC == CallingConv::Fast) && + assert((!isTailCall || + (CallConv == CallingConv::Fast && PerformTailCallOpt)) && + "IsEligibleForTailCallOptimization missed a case!"); + assert(!(isVarArg && CallConv == CallingConv::Fast) && "Var args not supported with calling convention fastcc"); // Analyze operands of the call, assigning locations to each operand. SmallVector ArgLocs; - CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs, *DAG.getContext()); - CCInfo.AnalyzeCallOperands(TheCall, CCAssignFnForNode(CC)); + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), + ArgLocs, *DAG.getContext()); + CCInfo.AnalyzeCallOperands(Outs, CCAssignFnForNode(CallConv)); // Get a count of how many bytes are to be pushed on the stack. unsigned NumBytes = CCInfo.getNextStackOffset(); - if (PerformTailCallOpt && CC == CallingConv::Fast) + if (PerformTailCallOpt && CallConv == CallingConv::Fast) NumBytes = GetAlignedArgumentStackSize(NumBytes, DAG); int FPDiff = 0; - if (IsTailCall) { + if (isTailCall) { // Lower arguments at fp - stackoffset + fpdiff. unsigned NumBytesCallerPushed = MF.getInfo()->getBytesToPopOnReturn(); @@ -1712,7 +1675,7 @@ SDValue RetAddrFrIdx; // Load return adress for tail calls. - Chain = EmitTailCallLoadRetAddr(DAG, RetAddrFrIdx, Chain, IsTailCall, Is64Bit, + Chain = EmitTailCallLoadRetAddr(DAG, RetAddrFrIdx, Chain, isTailCall, Is64Bit, FPDiff, dl); SmallVector, 8> RegsToPass; @@ -1724,8 +1687,8 @@ for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { CCValAssign &VA = ArgLocs[i]; MVT RegVT = VA.getLocVT(); - SDValue Arg = TheCall->getArg(i); - ISD::ArgFlagsTy Flags = TheCall->getArgFlags(i); + SDValue Arg = Outs[i].Val; + ISD::ArgFlagsTy Flags = Outs[i].Flags; bool isByVal = Flags.isByVal(); // Promote the value if needed. @@ -1764,13 +1727,13 @@ if (VA.isRegLoc()) { RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); } else { - if (!IsTailCall || (IsTailCall && isByVal)) { + if (!isTailCall || (isTailCall && isByVal)) { assert(VA.isMemLoc()); if (StackPtr.getNode() == 0) StackPtr = DAG.getCopyFromReg(Chain, dl, X86StackPtr, getPointerTy()); - MemOpChains.push_back(LowerMemOpCallTo(TheCall, DAG, StackPtr, VA, - Chain, Arg, Flags)); + MemOpChains.push_back(LowerMemOpCallTo(Chain, StackPtr, Arg, + dl, DAG, VA, Flags)); } } } @@ -1784,7 +1747,7 @@ SDValue InFlag; // Tail call byval lowering might overwrite argument registers so in case of // tail call optimization the copies to registers are lowered later. - if (!IsTailCall) + if (!isTailCall) for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, RegsToPass[i].second, InFlag); @@ -1795,7 +1758,7 @@ if (Subtarget->isPICStyleGOT()) { // ELF / PIC requires GOT in the EBX register before function calls via PLT // GOT pointer. - if (!IsTailCall) { + if (!isTailCall) { Chain = DAG.getCopyToReg(Chain, dl, X86::EBX, DAG.getNode(X86ISD::GlobalBaseReg, DebugLoc::getUnknownLoc(), @@ -1847,7 +1810,15 @@ // For tail calls lower the arguments to the 'real' stack slot. - if (IsTailCall) { + if (isTailCall) { + // Force all the incoming stack arguments to be loaded from the stack + // before any new outgoing arguments are stored to the stack, because the + // outgoing stack slots may alias the incoming argument stack slots, and + // the alias isn't otherwise explicit. This is slightly more conservative + // than necessary, because it means that each store effectively depends + // on every argument instead of just those arguments it would clobber. + SDValue ArgChain = DAG.getStackArgumentTokenFactor(Chain); + SmallVector MemOpChains2; SDValue FIN; int FI = 0; @@ -1857,8 +1828,8 @@ CCValAssign &VA = ArgLocs[i]; if (!VA.isRegLoc()) { assert(VA.isMemLoc()); - SDValue Arg = TheCall->getArg(i); - ISD::ArgFlagsTy Flags = TheCall->getArgFlags(i); + SDValue Arg = Outs[i].Val; + ISD::ArgFlagsTy Flags = Outs[i].Flags; // Create frame index. int32_t Offset = VA.getLocMemOffset()+FPDiff; uint32_t OpSize = (VA.getLocVT().getSizeInBits()+7)/8; @@ -1873,12 +1844,13 @@ getPointerTy()); Source = DAG.getNode(ISD::ADD, dl, getPointerTy(), StackPtr, Source); - MemOpChains2.push_back(CreateCopyOfByValArgument(Source, FIN, Chain, + MemOpChains2.push_back(CreateCopyOfByValArgument(Source, FIN, + ArgChain, Flags, DAG, dl)); } else { // Store relative to framepointer. MemOpChains2.push_back( - DAG.getStore(Chain, dl, Arg, FIN, + DAG.getStore(ArgChain, dl, Arg, FIN, PseudoSourceValue::getFixedStack(FI), 0)); } } @@ -1948,7 +1920,7 @@ Callee = DAG.getTargetExternalSymbol(S->getSymbol(), getPointerTy(), OpFlags); - } else if (IsTailCall) { + } else if (isTailCall) { unsigned Opc = Is64Bit ? X86::R11 : X86::EAX; Chain = DAG.getCopyToReg(Chain, dl, @@ -1963,20 +1935,16 @@ SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Flag); SmallVector Ops; - if (IsTailCall) { + if (isTailCall) { Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(NumBytes, true), DAG.getIntPtrConstant(0, true), InFlag); InFlag = Chain.getValue(1); - - // Returns a chain & a flag for retval copy to use. - NodeTys = DAG.getVTList(MVT::Other, MVT::Flag); - Ops.clear(); } Ops.push_back(Chain); Ops.push_back(Callee); - if (IsTailCall) + if (isTailCall) Ops.push_back(DAG.getConstant(FPDiff, MVT::i32)); // Add argument registers to the end of the list so that they are known live @@ -1986,7 +1954,7 @@ RegsToPass[i].second.getValueType())); // Add an implicit use GOT pointer in EBX. - if (!IsTailCall && Subtarget->isPICStyleGOT()) + if (!isTailCall && Subtarget->isPICStyleGOT()) Ops.push_back(DAG.getRegister(X86::EBX, getPointerTy())); // Add an implicit use of AL for x86 vararg functions. @@ -1996,13 +1964,28 @@ if (InFlag.getNode()) Ops.push_back(InFlag); - if (IsTailCall) { - assert(InFlag.getNode() && - "Flag must be set. Depend on flag being set in LowerRET"); - Chain = DAG.getNode(X86ISD::TAILCALL, dl, - TheCall->getVTList(), &Ops[0], Ops.size()); + if (isTailCall) { + // If this is the first return lowered for this function, add the regs + // to the liveout set for the function. + if (MF.getRegInfo().liveout_empty()) { + SmallVector RVLocs; + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), RVLocs, + *DAG.getContext()); + CCInfo.AnalyzeCallResult(Ins, RetCC_X86); + for (unsigned i = 0; i != RVLocs.size(); ++i) + if (RVLocs[i].isRegLoc()) + MF.getRegInfo().addLiveOut(RVLocs[i].getLocReg()); + } + + assert(((Callee.getOpcode() == ISD::Register && + (cast(Callee)->getReg() == X86::EAX || + cast(Callee)->getReg() == X86::R9)) || + Callee.getOpcode() == ISD::TargetExternalSymbol || + Callee.getOpcode() == ISD::TargetGlobalAddress) && + "Expecting an global address, external symbol, or register"); - return SDValue(Chain.getNode(), Op.getResNo()); + return DAG.getNode(X86ISD::TC_RETURN, dl, + NodeTys, &Ops[0], Ops.size()); } Chain = DAG.getNode(X86ISD::CALL, dl, NodeTys, &Ops[0], Ops.size()); @@ -2010,9 +1993,9 @@ // Create the CALLSEQ_END node. unsigned NumBytesForCalleeToPush; - if (IsCalleePop(isVarArg, CC)) + if (IsCalleePop(isVarArg, CallConv)) NumBytesForCalleeToPush = NumBytes; // Callee pops everything - else if (!Is64Bit && CC != CallingConv::Fast && IsStructRet) + else if (!Is64Bit && CallConv != CallingConv::Fast && IsStructRet) // If this is is a call to a struct-return function, the callee // pops the hidden struct pointer, so we have to push it back. // This is common for Darwin/X86, Linux & Mingw32 targets. @@ -2030,8 +2013,8 @@ // Handle result values, copying them out of physregs into vregs that we // return. - return SDValue(LowerCallResult(Chain, InFlag, TheCall, CC, DAG), - Op.getResNo()); + return LowerCallResult(Chain, InFlag, CallConv, isVarArg, + Ins, dl, DAG, InVals); } @@ -2088,25 +2071,18 @@ return Offset; } -/// IsEligibleForTailCallElimination - Check to see whether the next instruction -/// following the call is a return. A function is eligible if caller/callee -/// calling conventions match, currently only fastcc supports tail calls, and -/// the function CALL is immediatly followed by a RET. -bool X86TargetLowering::IsEligibleForTailCallOptimization(CallSDNode *TheCall, - SDValue Ret, - SelectionDAG& DAG) const { - if (!PerformTailCallOpt) - return false; - - if (CheckTailCallReturnConstraints(TheCall, Ret)) { - unsigned CallerCC = - DAG.getMachineFunction().getFunction()->getCallingConv(); - unsigned CalleeCC = TheCall->getCallingConv(); - if (CalleeCC == CallingConv::Fast && CallerCC == CalleeCC) - return true; - } - - return false; +/// IsEligibleForTailCallOptimization - Check whether the call is eligible +/// for tail call optimization. Targets which want to do tail call +/// optimization should implement this function. +bool +X86TargetLowering::IsEligibleForTailCallOptimization(SDValue Callee, + unsigned CalleeCC, + bool isVarArg, + const SmallVectorImpl &Ins, + SelectionDAG& DAG) const { + MachineFunction &MF = DAG.getMachineFunction(); + unsigned CallerCC = MF.getFunction()->getCallingConv(); + return CalleeCC == CallingConv::Fast && CallerCC == CalleeCC; } FastISel * @@ -5825,7 +5801,7 @@ Args.push_back(Entry); std::pair CallResult = LowerCallTo(Chain, Type::VoidTy, false, false, false, false, - 0, CallingConv::C, false, + 0, CallingConv::C, false, /*isReturnValueUsed=*/false, DAG.getExternalSymbol(bzeroEntry, IntPtr), Args, DAG, dl); return CallResult.second; } @@ -6845,9 +6821,6 @@ case ISD::SELECT: return LowerSELECT(Op, DAG); case ISD::BRCOND: return LowerBRCOND(Op, DAG); case ISD::JumpTable: return LowerJumpTable(Op, DAG); - case ISD::CALL: return LowerCALL(Op, DAG); - case ISD::RET: return LowerRET(Op, DAG); - case ISD::FORMAL_ARGUMENTS: return LowerFORMAL_ARGUMENTS(Op, DAG); case ISD::VASTART: return LowerVASTART(Op, DAG); case ISD::VAARG: return LowerVAARG(Op, DAG); case ISD::VACOPY: return LowerVACOPY(Op, DAG); @@ -7009,7 +6982,6 @@ case X86ISD::FLD: return "X86ISD::FLD"; case X86ISD::FST: return "X86ISD::FST"; case X86ISD::CALL: return "X86ISD::CALL"; - case X86ISD::TAILCALL: return "X86ISD::TAILCALL"; case X86ISD::RDTSC_DAG: return "X86ISD::RDTSC_DAG"; case X86ISD::BT: return "X86ISD::BT"; case X86ISD::CMP: return "X86ISD::CMP"; Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Tue Aug 4 20:29:28 2009 @@ -85,7 +85,7 @@ /// as. FST, - /// CALL/TAILCALL - These operations represent an abstract X86 call + /// CALL - These operations represent an abstract X86 call /// instruction, which includes a bunch of information. In particular the /// operands of these node are: /// @@ -102,12 +102,8 @@ /// #1 - The first register result value (optional) /// #2 - The second register result value (optional) /// - /// The CALL vs TAILCALL distinction boils down to whether the callee is - /// known not to modify the caller's stack frame, as is standard with - /// LLVM. CALL, - TAILCALL, - + /// RDTSC_DAG - This operation implements the lowering for /// readcyclecounter RDTSC_DAG, @@ -508,9 +504,12 @@ /// IsEligibleForTailCallOptimization - Check whether the call is eligible /// for tail call optimization. Targets which want to do tail call /// optimization should implement this function. - virtual bool IsEligibleForTailCallOptimization(CallSDNode *TheCall, - SDValue Ret, - SelectionDAG &DAG) const; + virtual bool + IsEligibleForTailCallOptimization(SDValue Callee, + unsigned CalleeCC, + bool isVarArg, + const SmallVectorImpl &Ins, + SelectionDAG& DAG) const; virtual const X86Subtarget* getSubtarget() { return Subtarget; @@ -563,26 +562,30 @@ bool X86ScalarSSEf32; bool X86ScalarSSEf64; - SDNode *LowerCallResult(SDValue Chain, SDValue InFlag, CallSDNode *TheCall, - unsigned CallingConv, SelectionDAG &DAG); - - SDValue LowerMemArgument(SDValue Op, SelectionDAG &DAG, - const CCValAssign &VA, MachineFrameInfo *MFI, - unsigned CC, SDValue Root, unsigned i); - - SDValue LowerMemOpCallTo(CallSDNode *TheCall, SelectionDAG &DAG, - const SDValue &StackPtr, - const CCValAssign &VA, SDValue Chain, - SDValue Arg, ISD::ArgFlagsTy Flags); + SDValue LowerCallResult(SDValue Chain, SDValue InFlag, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + SDValue LowerMemArgument(SDValue Chain, + unsigned CallConv, + const SmallVectorImpl &ArgInfo, + DebugLoc dl, SelectionDAG &DAG, + const CCValAssign &VA, MachineFrameInfo *MFI, + unsigned i); + SDValue LowerMemOpCallTo(SDValue Chain, SDValue StackPtr, SDValue Arg, + DebugLoc dl, SelectionDAG &DAG, + const CCValAssign &VA, + ISD::ArgFlagsTy Flags); // Call lowering helpers. - bool IsCalleePop(bool isVarArg, unsigned CallingConv); + bool IsCalleePop(bool isVarArg, unsigned CallConv); SDValue EmitTailCallLoadRetAddr(SelectionDAG &DAG, SDValue &OutRetAddr, SDValue Chain, bool IsTailCall, bool Is64Bit, int FPDiff, DebugLoc dl); - CCAssignFn *CCAssignFnForNode(unsigned CallingConv) const; - NameDecorationStyle NameDecorationForFORMAL_ARGUMENTS(SDValue Op); + CCAssignFn *CCAssignFnForNode(unsigned CallConv) const; + NameDecorationStyle NameDecorationForCallConv(unsigned CallConv); unsigned GetAlignedArgumentStackSize(unsigned StackSize, SelectionDAG &DAG); std::pair FP_TO_INTHelper(SDValue Op, SelectionDAG &DAG, @@ -619,10 +622,7 @@ SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG); SDValue LowerMEMSET(SDValue Op, SelectionDAG &DAG); SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG); - SDValue LowerCALL(SDValue Op, SelectionDAG &DAG); - SDValue LowerRET(SDValue Op, SelectionDAG &DAG); SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG); - SDValue LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG); SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG); SDValue LowerVAARG(SDValue Op, SelectionDAG &DAG); SDValue LowerVACOPY(SDValue Op, SelectionDAG &DAG); @@ -642,6 +642,26 @@ SDValue LowerLOAD_SUB(SDValue Op, SelectionDAG &DAG); SDValue LowerREADCYCLECOUNTER(SDValue Op, SelectionDAG &DAG); + virtual SDValue + LowerFormalArguments(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + virtual SDValue + LowerCall(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, bool isTailCall, + const SmallVectorImpl &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + + virtual SDValue + LowerReturn(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Outs, + DebugLoc dl, SelectionDAG &DAG); + void ReplaceATOMIC_BINARY_64(SDNode *N, SmallVectorImpl &Results, SelectionDAG &DAG, unsigned NewOp); Modified: llvm/trunk/lib/Target/X86/X86Instr64bit.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Instr64bit.td?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86Instr64bit.td (original) +++ llvm/trunk/lib/Target/X86/X86Instr64bit.td Tue Aug 4 20:29:28 2009 @@ -1528,23 +1528,7 @@ def : Pat<(X86call (i64 texternalsym:$dst)), (WINCALL64pcrel32 texternalsym:$dst)>, Requires<[IsWin64]>; -def : Pat<(X86tailcall (i64 tglobaladdr:$dst)), - (CALL64pcrel32 tglobaladdr:$dst)>; -def : Pat<(X86tailcall (i64 texternalsym:$dst)), - (CALL64pcrel32 texternalsym:$dst)>; - -def : Pat<(X86tailcall GR64:$dst), - (CALL64r GR64:$dst)>; - - // tailcall stuff -def : Pat<(X86tailcall GR32:$dst), - (TAILCALL)>; -def : Pat<(X86tailcall (i64 tglobaladdr:$dst)), - (TAILCALL)>; -def : Pat<(X86tailcall (i64 texternalsym:$dst)), - (TAILCALL)>; - def : Pat<(X86tcret GR64:$dst, imm:$off), (TCRETURNri64 GR64:$dst, imm:$off)>; Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Tue Aug 4 20:29:28 2009 @@ -124,9 +124,6 @@ def X86call : SDNode<"X86ISD::CALL", SDT_X86Call, [SDNPHasChain, SDNPOutFlag, SDNPOptInFlag]>; -def X86tailcall: SDNode<"X86ISD::TAILCALL", SDT_X86Call, - [SDNPHasChain, SDNPOutFlag, SDNPOptInFlag]>; - def X86rep_stos: SDNode<"X86ISD::REP_STOS", SDTX86RepStr, [SDNPHasChain, SDNPInFlag, SDNPOutFlag, SDNPMayStore]>; def X86rep_movs: SDNode<"X86ISD::REP_MOVS", SDTX86RepStr, @@ -622,10 +619,6 @@ // Tail call stuff. -def TAILCALL : I<0, Pseudo, (outs), (ins), - "#TAILCALL", - []>; - let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in def TCRETURNdi : I<0, Pseudo, (outs), (ins i32imm:$dst, i32imm:$offset, variable_ops), "#TC_RETURN $dst $offset", @@ -3452,14 +3445,6 @@ // Calls // tailcall stuff -def : Pat<(X86tailcall GR32:$dst), - (TAILCALL)>; - -def : Pat<(X86tailcall (i32 tglobaladdr:$dst)), - (TAILCALL)>; -def : Pat<(X86tailcall (i32 texternalsym:$dst)), - (TAILCALL)>; - def : Pat<(X86tcret GR32:$dst, imm:$off), (TCRETURNri GR32:$dst, imm:$off)>; Modified: llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp (original) +++ llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp Tue Aug 4 20:29:28 2009 @@ -113,9 +113,6 @@ setOperationAction(ISD::BR_JT, MVT::Other, Expand); setOperationAction(ISD::JumpTable, MVT::i32, Custom); - // RET must be custom lowered, to meet ABI requirements - setOperationAction(ISD::RET, MVT::Other, Custom); - setOperationAction(ISD::GlobalAddress, MVT::i32, Custom); // Thread Local Storage @@ -162,9 +159,6 @@ LowerOperation(SDValue Op, SelectionDAG &DAG) { switch (Op.getOpcode()) { - case ISD::CALL: return LowerCALL(Op, DAG); - case ISD::FORMAL_ARGUMENTS: return LowerFORMAL_ARGUMENTS(Op, DAG); - case ISD::RET: return LowerRET(Op, DAG); case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG); case ISD::GlobalTLSAddress: return LowerGlobalTLSAddress(Op, DAG); case ISD::ConstantPool: return LowerConstantPool(Op, DAG); @@ -455,6 +449,7 @@ std::pair CallResult = LowerCallTo(Chain, IntPtrTy, false, false, false, false, 0, CallingConv::C, false, + /*isReturnValueUsed=*/true, DAG.getExternalSymbol("__misaligned_load", getPointerTy()), Args, DAG, dl); @@ -515,6 +510,7 @@ std::pair CallResult = LowerCallTo(Chain, Type::VoidTy, false, false, false, false, 0, CallingConv::C, false, + /*isReturnValueUsed=*/true, DAG.getExternalSymbol("__misaligned_store", getPointerTy()), Args, DAG, dl); @@ -603,35 +599,33 @@ //===----------------------------------------------------------------------===// // Calling Convention Implementation -// -// The lower operations present on calling convention works on this order: -// LowerCALL (virt regs --> phys regs, virt regs --> stack) -// LowerFORMAL_ARGUMENTS (phys --> virt regs, stack --> virt regs) -// LowerRET (virt regs --> phys regs) -// LowerCALL (phys regs --> virt regs) -// //===----------------------------------------------------------------------===// #include "XCoreGenCallingConv.inc" //===----------------------------------------------------------------------===// -// CALL Calling Convention Implementation +// Call Calling Convention Implementation //===----------------------------------------------------------------------===// -/// XCore custom CALL implementation -SDValue XCoreTargetLowering:: -LowerCALL(SDValue Op, SelectionDAG &DAG) -{ - CallSDNode *TheCall = cast(Op.getNode()); - unsigned CallingConv = TheCall->getCallingConv(); +/// XCore call implementation +SDValue +XCoreTargetLowering::LowerCall(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, + bool isTailCall, + const SmallVectorImpl &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { + // For now, only CallingConv::C implemented - switch (CallingConv) + switch (CallConv) { default: llvm_unreachable("Unsupported calling convention"); case CallingConv::Fast: case CallingConv::C: - return LowerCCCCallTo(Op, DAG, CallingConv); + return LowerCCCCallTo(Chain, Callee, CallConv, isVarArg, isTailCall, + Outs, Ins, dl, DAG, InVals); } } @@ -639,24 +633,25 @@ /// regs to (physical regs)/(stack frame), CALLSEQ_START and /// CALLSEQ_END are emitted. /// TODO: isTailCall, sret. -SDValue XCoreTargetLowering:: -LowerCCCCallTo(SDValue Op, SelectionDAG &DAG, unsigned CC) -{ - CallSDNode *TheCall = cast(Op.getNode()); - SDValue Chain = TheCall->getChain(); - SDValue Callee = TheCall->getCallee(); - bool isVarArg = TheCall->isVarArg(); - DebugLoc dl = Op.getDebugLoc(); +SDValue +XCoreTargetLowering::LowerCCCCallTo(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, + bool isTailCall, + const SmallVectorImpl &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { // Analyze operands of the call, assigning locations to each operand. SmallVector ArgLocs; - CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs, *DAG.getContext()); + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), + ArgLocs, *DAG.getContext()); // The ABI dictates there should be one stack slot available to the callee // on function entry (for saving lr). CCInfo.AllocateStack(4, 4); - CCInfo.AnalyzeCallOperands(TheCall, CC_XCore); + CCInfo.AnalyzeCallOperands(Outs, CC_XCore); // Get a count of how many bytes are to be pushed on the stack. unsigned NumBytes = CCInfo.getNextStackOffset(); @@ -670,9 +665,7 @@ // Walk the register/memloc assignments, inserting copies/loads. for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { CCValAssign &VA = ArgLocs[i]; - - // Arguments start after the 5 first operands of ISD::CALL - SDValue Arg = TheCall->getArg(i); + SDValue Arg = Outs[i].Val; // Promote the value if needed. switch (VA.getLocInfo()) { @@ -759,60 +752,58 @@ // Handle result values, copying them out of physregs into vregs that we // return. - return SDValue(LowerCallResult(Chain, InFlag, TheCall, CC, DAG), - Op.getResNo()); + return LowerCallResult(Chain, InFlag, CallConv, isVarArg, + Ins, dl, DAG, InVals); } -/// LowerCallResult - Lower the result values of an ISD::CALL into the -/// appropriate copies out of appropriate physical registers. This assumes that -/// Chain/InFlag are the input chain/flag to use, and that TheCall is the call -/// being lowered. Returns a SDNode with the same number of values as the -/// ISD::CALL. -SDNode *XCoreTargetLowering:: -LowerCallResult(SDValue Chain, SDValue InFlag, CallSDNode *TheCall, - unsigned CallingConv, SelectionDAG &DAG) { - bool isVarArg = TheCall->isVarArg(); - DebugLoc dl = TheCall->getDebugLoc(); +/// LowerCallResult - Lower the result values of a call into the +/// appropriate copies out of appropriate physical registers. +SDValue +XCoreTargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals) { // Assign locations to each value returned by this call. SmallVector RVLocs; - CCState CCInfo(CallingConv, isVarArg, getTargetMachine(), + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), RVLocs, *DAG.getContext()); - CCInfo.AnalyzeCallResult(TheCall, RetCC_XCore); - SmallVector ResultVals; + CCInfo.AnalyzeCallResult(Ins, RetCC_XCore); // Copy all of the result registers out of their specified physreg. for (unsigned i = 0; i != RVLocs.size(); ++i) { Chain = DAG.getCopyFromReg(Chain, dl, RVLocs[i].getLocReg(), RVLocs[i].getValVT(), InFlag).getValue(1); InFlag = Chain.getValue(2); - ResultVals.push_back(Chain.getValue(0)); + InVals.push_back(Chain.getValue(0)); } - ResultVals.push_back(Chain); - - // Merge everything together with a MERGE_VALUES node. - return DAG.getNode(ISD::MERGE_VALUES, dl, TheCall->getVTList(), - &ResultVals[0], ResultVals.size()).getNode(); + return Chain; } //===----------------------------------------------------------------------===// -// FORMAL_ARGUMENTS Calling Convention Implementation +// Formal Arguments Calling Convention Implementation //===----------------------------------------------------------------------===// -/// XCore custom FORMAL_ARGUMENTS implementation -SDValue XCoreTargetLowering:: -LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG) -{ - unsigned CC = cast(Op.getOperand(1))->getZExtValue(); - switch(CC) +/// XCore formal arguments implementation +SDValue +XCoreTargetLowering::LowerFormalArguments(SDValue Chain, + unsigned CallConv, + bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, + SelectionDAG &DAG, + SmallVectorImpl &InVals) { + switch (CallConv) { default: llvm_unreachable("Unsupported calling convention"); case CallingConv::C: case CallingConv::Fast: - return LowerCCCArguments(Op, DAG); + return LowerCCCArguments(Chain, CallConv, isVarArg, + Ins, dl, DAG, InVals); } } @@ -820,27 +811,28 @@ /// virtual registers and generate load operations for /// arguments places on the stack. /// TODO: sret -SDValue XCoreTargetLowering:: -LowerCCCArguments(SDValue Op, SelectionDAG &DAG) -{ +SDValue +XCoreTargetLowering::LowerCCCArguments(SDValue Chain, + unsigned CallConv, + bool isVarArg, + const SmallVectorImpl + &Ins, + DebugLoc dl, + SelectionDAG &DAG, + SmallVectorImpl &InVals) { MachineFunction &MF = DAG.getMachineFunction(); MachineFrameInfo *MFI = MF.getFrameInfo(); MachineRegisterInfo &RegInfo = MF.getRegInfo(); - SDValue Root = Op.getOperand(0); - bool isVarArg = cast(Op.getOperand(2))->getZExtValue() != 0; - unsigned CC = MF.getFunction()->getCallingConv(); - DebugLoc dl = Op.getDebugLoc(); // Assign locations to all of the incoming arguments. SmallVector ArgLocs; - CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs, *DAG.getContext()); + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), + ArgLocs, *DAG.getContext()); - CCInfo.AnalyzeFormalArguments(Op.getNode(), CC_XCore); + CCInfo.AnalyzeFormalArguments(Ins, CC_XCore); unsigned StackSlotSize = XCoreFrameInfo::stackSlotSize(); - SmallVector ArgValues; - unsigned LRSaveSize = StackSlotSize; for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { @@ -854,7 +846,7 @@ default: { #ifndef NDEBUG - errs() << "LowerFORMAL_ARGUMENTS Unhandled argument type: " + errs() << "LowerFormalArguments Unhandled argument type: " << RegVT.getSimpleVT() << "\n"; #endif llvm_unreachable(0); @@ -863,7 +855,7 @@ unsigned VReg = RegInfo.createVirtualRegister( XCore::GRRegsRegisterClass); RegInfo.addLiveIn(VA.getLocReg(), VReg); - ArgValues.push_back(DAG.getCopyFromReg(Root, dl, VReg, RegVT)); + InVals.push_back(DAG.getCopyFromReg(Chain, dl, VReg, RegVT)); } } else { // sanity check @@ -871,7 +863,7 @@ // Load the argument to a virtual register unsigned ObjSize = VA.getLocVT().getSizeInBits()/8; if (ObjSize > StackSlotSize) { - errs() << "LowerFORMAL_ARGUMENTS Unhandled argument type: " + errs() << "LowerFormalArguments Unhandled argument type: " << VA.getLocVT().getSimpleVT() << "\n"; } @@ -882,7 +874,7 @@ // Create the SelectionDAG nodes corresponding to a load //from this parameter SDValue FIN = DAG.getFrameIndex(FI, MVT::i32); - ArgValues.push_back(DAG.getLoad(VA.getLocVT(), dl, Root, FIN, NULL, 0)); + InVals.push_back(DAG.getLoad(VA.getLocVT(), dl, Chain, FIN, NULL, 0)); } } @@ -911,14 +903,14 @@ unsigned VReg = RegInfo.createVirtualRegister( XCore::GRRegsRegisterClass); RegInfo.addLiveIn(ArgRegs[i], VReg); - SDValue Val = DAG.getCopyFromReg(Root, dl, VReg, MVT::i32); + SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, MVT::i32); // Move argument from virt reg -> stack SDValue Store = DAG.getStore(Val.getValue(1), dl, Val, FIN, NULL, 0); MemOps.push_back(Store); } if (!MemOps.empty()) - Root = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, - &MemOps[0], MemOps.size()); + Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, + &MemOps[0], MemOps.size()); } else { // This will point to the next argument passed via stack. XFI->setVarArgsFrameIndex( @@ -926,34 +918,29 @@ } } - ArgValues.push_back(Root); - - // Return the new list of results. - std::vector RetVT(Op.getNode()->value_begin(), - Op.getNode()->value_end()); - return DAG.getNode(ISD::MERGE_VALUES, dl, RetVT, - &ArgValues[0], ArgValues.size()); + return Chain; } //===----------------------------------------------------------------------===// // Return Value Calling Convention Implementation //===----------------------------------------------------------------------===// -SDValue XCoreTargetLowering:: -LowerRET(SDValue Op, SelectionDAG &DAG) -{ +SDValue +XCoreTargetLowering::LowerReturn(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Outs, + DebugLoc dl, SelectionDAG &DAG) { + // CCValAssign - represent the assignment of // the return value to a location SmallVector RVLocs; - unsigned CC = DAG.getMachineFunction().getFunction()->getCallingConv(); - bool isVarArg = DAG.getMachineFunction().getFunction()->isVarArg(); - DebugLoc dl = Op.getDebugLoc(); // CCState - Info about the registers and stack slot. - CCState CCInfo(CC, isVarArg, getTargetMachine(), RVLocs, *DAG.getContext()); + CCState CCInfo(CallConv, isVarArg, getTargetMachine(), + RVLocs, *DAG.getContext()); - // Analize return values of ISD::RET - CCInfo.AnalyzeReturn(Op.getNode(), RetCC_XCore); + // Analize return values. + CCInfo.AnalyzeReturn(Outs, RetCC_XCore); // If this is the first return lowered for this function, add // the regs to the liveout set for the function. @@ -963,8 +950,6 @@ DAG.getMachineFunction().getRegInfo().addLiveOut(RVLocs[i].getLocReg()); } - // The chain is always operand #0 - SDValue Chain = Op.getOperand(0); SDValue Flag; // Copy the result values into the output registers. @@ -972,10 +957,8 @@ CCValAssign &VA = RVLocs[i]; assert(VA.isRegLoc() && "Can only return in registers!"); - // ISD::RET => ret chain, (regnum1,val1), ... - // So i*2+1 index only the regnums Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), - Op.getOperand(i*2+1), Flag); + Outs[i].Val, Flag); // guarantee that all emitted copies are // stuck together, avoiding something bad Modified: llvm/trunk/lib/Target/XCore/XCoreISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreISelLowering.h?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/lib/Target/XCore/XCoreISelLowering.h (original) +++ llvm/trunk/lib/Target/XCore/XCoreISelLowering.h Tue Aug 4 20:29:28 2009 @@ -92,10 +92,24 @@ const XCoreSubtarget &Subtarget; // Lower Operand helpers - SDValue LowerCCCArguments(SDValue Op, SelectionDAG &DAG); - SDValue LowerCCCCallTo(SDValue Op, SelectionDAG &DAG, unsigned CC); - SDNode *LowerCallResult(SDValue Chain, SDValue InFlag, CallSDNode*TheCall, - unsigned CallingConv, SelectionDAG &DAG); + SDValue LowerCCCArguments(SDValue Chain, + unsigned CallConv, + bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + SDValue LowerCCCCallTo(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, + bool isTailCall, + const SmallVectorImpl &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + SDValue LowerCallResult(SDValue Chain, SDValue InFlag, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); SDValue getReturnAddressFrameIndex(SelectionDAG &DAG); SDValue getGlobalAddressWrapper(SDValue GA, GlobalValue *GV, SelectionDAG &DAG); @@ -103,9 +117,6 @@ // Lower Operand specifics SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG); SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG); - SDValue LowerRET(SDValue Op, SelectionDAG &DAG); - SDValue LowerCALL(SDValue Op, SelectionDAG &DAG); - SDValue LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG); SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG); SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG); SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG); @@ -124,6 +135,29 @@ SDValue ExpandADDSUB(SDNode *Op, SelectionDAG &DAG); virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const; + + virtual SDValue + LowerFormalArguments(SDValue Chain, + unsigned CallConv, + bool isVarArg, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + + virtual SDValue + LowerCall(SDValue Chain, SDValue Callee, + unsigned CallConv, bool isVarArg, + bool isTailCall, + const SmallVectorImpl &Outs, + const SmallVectorImpl &Ins, + DebugLoc dl, SelectionDAG &DAG, + SmallVectorImpl &InVals); + + virtual SDValue + LowerReturn(SDValue Chain, + unsigned CallConv, bool isVarArg, + const SmallVectorImpl &Outs, + DebugLoc dl, SelectionDAG &DAG); }; } Modified: llvm/trunk/test/CodeGen/X86/tailcallstack64.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tailcallstack64.ll?rev=78142&r1=78141&r2=78142&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/tailcallstack64.ll (original) +++ llvm/trunk/test/CodeGen/X86/tailcallstack64.ll Tue Aug 4 20:29:28 2009 @@ -1,14 +1,17 @@ -; RUN: llvm-as < %s | llc -tailcallopt -march=x86-64 | grep TAILCALL +; RUN: llvm-as < %s | llc -tailcallopt -march=x86-64 | FileCheck %s + ; Check that lowered arguments on the stack do not overwrite each other. -; Move param %in1 to temp register (%eax). -; RUN: llvm-as < %s | llc -tailcallopt -march=x86-64 -x86-asm-syntax=att | grep {movl 40(%rsp), %eax} -; Add %in1 %p1 to another temporary register (%r9d). -; RUN: llvm-as < %s | llc -tailcallopt -march=x86-64 -x86-asm-syntax=att | grep {movl %edi, %r10d} -; RUN: llvm-as < %s | llc -tailcallopt -march=x86-64 -x86-asm-syntax=att | grep {addl 32(%rsp), %r10d} +; Add %in1 %p1 to a different temporary register (%eax). +; CHECK: movl %edi, %eax +; CHECK: addl 32(%rsp), %eax +; Move param %in1 to temp register (%r10d). +; CHECK: movl 40(%rsp), %r10d ; Move result of addition to stack. -; RUN: llvm-as < %s | llc -tailcallopt -march=x86-64 -x86-asm-syntax=att | grep {movl %r10d, 40(%rsp)} +; CHECK: movl %eax, 40(%rsp) ; Move param %in2 to stack. -; RUN: llvm-as < %s | llc -tailcallopt -march=x86-64 -x86-asm-syntax=att | grep {movl %eax, 32(%rsp)} +; CHECK: movl %r10d, 32(%rsp) +; Eventually, do a TAILCALL +; CHECK: TAILCALL declare fastcc i32 @tailcallee(i32 %p1, i32 %p2, i32 %p3, i32 %p4, i32 %p5, i32 %p6, i32 %a, i32 %b) From eocallaghan at auroraux.org Tue Aug 4 20:47:29 2009 From: eocallaghan at auroraux.org (Edward O'Callaghan) Date: Wed, 05 Aug 2009 01:47:29 -0000 Subject: [llvm-commits] [compiler-rt] r78143 - in /compiler-rt/trunk: CMakeLists.txt ConfigureChecks.cmake cmake/Modules/DefineCompilerFlags.cmake cmake/Modules/MacroAddCheckTest.cmake config.h.cmake lib/CMakeLists.txt lib/int_lib.h test/CMakeLists.txt test/Unit/CMakeLists.txt test/Unit/int_lib.h test/timing/CMakeLists.txt Message-ID: <200908050147.n751lTS5030497@zion.cs.uiuc.edu> Author: evocallaghan Date: Tue Aug 4 20:47:29 2009 New Revision: 78143 URL: http://llvm.org/viewvc/llvm-project?rev=78143&view=rev Log: Start porting compiler-rt testsuit to Solaris with new build system. Fix some C++ style comments which are not allowed in ISO C90. Added: compiler-rt/trunk/cmake/Modules/DefineCompilerFlags.cmake compiler-rt/trunk/cmake/Modules/MacroAddCheckTest.cmake Modified: compiler-rt/trunk/CMakeLists.txt compiler-rt/trunk/ConfigureChecks.cmake compiler-rt/trunk/config.h.cmake compiler-rt/trunk/lib/CMakeLists.txt compiler-rt/trunk/lib/int_lib.h compiler-rt/trunk/test/CMakeLists.txt compiler-rt/trunk/test/Unit/CMakeLists.txt compiler-rt/trunk/test/Unit/int_lib.h compiler-rt/trunk/test/timing/CMakeLists.txt Modified: compiler-rt/trunk/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/CMakeLists.txt?rev=78143&r1=78142&r2=78143&view=diff ============================================================================== --- compiler-rt/trunk/CMakeLists.txt (original) +++ compiler-rt/trunk/CMakeLists.txt Tue Aug 4 20:47:29 2009 @@ -10,12 +10,18 @@ SET( CMAKE_MODULE_PATH ${CMAKE_SOURCE_DIR}/cmake/Modules ) +# add definitions +include(DefineCompilerFlags) + # Disallow in-source build INCLUDE( MacroEnsureOutOfSourceBuild ) MACRO_ENSURE_OUT_OF_SOURCE_BUILD( "${PROJECT_NAME} requires an out of source build. Please create a separate build directory and run 'cmake /path/to/${PROJECT_NAME} [options]' there." ) +INCLUDE( ConfigureChecks.cmake ) +CONFIGURE_FILE( config.h.cmake ${CMAKE_CURRENT_BINARY_DIR}/config.h ) + install(DIRECTORY include DESTINATION . PATTERN ".svn" EXCLUDE @@ -25,9 +31,9 @@ # BlocksRuntime - some random cruft that got thrown in at the last minute, ignoring for now. # ADD_SUBDIRECTORY( BlocksRuntime ) + ADD_SUBDIRECTORY( lib ) + # Tests are being ignored for until the very basics are working. +# INCLUDE( MacroAddCheckTest ) # ADD_SUBDIRECTORY( test ) - -INCLUDE( ConfigureChecks.cmake ) -CONFIGURE_FILE( config.h.cmake ${CMAKE_CURRENT_BINARY_DIR}/config.h ) Modified: compiler-rt/trunk/ConfigureChecks.cmake URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/ConfigureChecks.cmake?rev=78143&r1=78142&r2=78143&view=diff ============================================================================== --- compiler-rt/trunk/ConfigureChecks.cmake (original) +++ compiler-rt/trunk/ConfigureChecks.cmake Tue Aug 4 20:47:29 2009 @@ -12,5 +12,3 @@ # FUNCTIONS #CHECK_FUNCTION_EXISTS( strlcpy HAVE_STRLCPY ) - -#Example ConfigureChecks.cmake Added: compiler-rt/trunk/cmake/Modules/DefineCompilerFlags.cmake URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/cmake/Modules/DefineCompilerFlags.cmake?rev=78143&view=auto ============================================================================== --- compiler-rt/trunk/cmake/Modules/DefineCompilerFlags.cmake (added) +++ compiler-rt/trunk/cmake/Modules/DefineCompilerFlags.cmake Tue Aug 4 20:47:29 2009 @@ -0,0 +1,4 @@ +# Define compiler flags + +#ADD_DEFINITIONS( -Wall -W -Werror -pedantic ) +ADD_DEFINITIONS( -Wall -W -pedantic ) Added: compiler-rt/trunk/cmake/Modules/MacroAddCheckTest.cmake URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/cmake/Modules/MacroAddCheckTest.cmake?rev=78143&view=auto ============================================================================== --- compiler-rt/trunk/cmake/Modules/MacroAddCheckTest.cmake (added) +++ compiler-rt/trunk/cmake/Modules/MacroAddCheckTest.cmake Tue Aug 4 20:47:29 2009 @@ -0,0 +1,11 @@ +# - macro_add_check_test(test_name test_source linklib1 ... linklibN) + +ENABLE_TESTING() +include(CTest) +set(CMAKE_C_FLAGS_PROFILING "-g -pg") + +macro (MACRO_ADD_CHECK_TEST _testName _testSource) + add_executable(${_testName} ${_testSource}) + target_link_libraries(${_testName} ${ARGN}) + add_test(${_testName} ${CMAKE_CURRENT_BINARY_DIR}/${_testName}) +endmacro (MACRO_ADD_CHECK_TEST) Modified: compiler-rt/trunk/config.h.cmake URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/config.h.cmake?rev=78143&r1=78142&r2=78143&view=diff ============================================================================== --- compiler-rt/trunk/config.h.cmake (original) +++ compiler-rt/trunk/config.h.cmake Tue Aug 4 20:47:29 2009 @@ -1,3 +1 @@ #cmakedefine HAVE_SYS_BYTEORDER_H ${HAVE_SYS_BYTEORDER} - -#Example config.h.cmake Modified: compiler-rt/trunk/lib/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/CMakeLists.txt?rev=78143&r1=78142&r2=78143&view=diff ============================================================================== --- compiler-rt/trunk/lib/CMakeLists.txt (original) +++ compiler-rt/trunk/lib/CMakeLists.txt Tue Aug 4 20:47:29 2009 @@ -34,3 +34,4 @@ # Creates a shared lib .so ADD_LIBRARY( ${PROJECT_NAME} SHARED ${SRCS} ) +#ADD_LIBRARY( ${PROJECT_NAME} STATIC ${SRCS} ) Modified: compiler-rt/trunk/lib/int_lib.h URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/int_lib.h?rev=78143&r1=78142&r2=78143&view=diff ============================================================================== --- compiler-rt/trunk/lib/int_lib.h (original) +++ compiler-rt/trunk/lib/int_lib.h Tue Aug 4 20:47:29 2009 @@ -1,22 +1,23 @@ -//===-- int_lib.h - configuration header for libgcc replacement -----------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file is a configuration header for libgcc replacement. -// This file is not part of the interface of this library. -// -//===----------------------------------------------------------------------===// +/* ===-- int_lib.h - configuration header for libgcc replacement -----------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file is a configuration header for libgcc replacement. + * This file is not part of the interface of this library. + * + * ===----------------------------------------------------------------------=== + */ #ifndef INT_LIB_H #define INT_LIB_H -// Assumption: signed integral is 2's complement -// Assumption: right shift of signed negative is arithmetic shift +/* Assumption: signed integral is 2's complement */ +/* Assumption: right shift of signed negative is arithmetic shift */ #include #include @@ -25,16 +26,16 @@ #define INFINITY HUGE_VAL #endif -// TODO: Improve this to minimal pre-processor hackish'ness. +/* TODO: Improve this to minimal pre-processor hackish'ness. */ #if defined (__SVR4) && defined (__sun) -// config.h build via CMake. -//#include +/* config.h build via CMake. */ +/* #include */ -// Solaris header for endian and byte swap -//#if defined HAVE_SYS_BYTEORDER_H +/* Solaris header for endian and byte swap */ +/* #if defined HAVE_SYS_BYTEORDER_H */ #include -// Solaris defines endian by setting _LITTLE_ENDIAN or _BIG_ENDIAN +/* Solaris defines endian by setting _LITTLE_ENDIAN or _BIG_ENDIAN */ #ifdef _BIG_ENDIAN # define IS_BIG_ENDIAN #endif @@ -51,7 +52,7 @@ #define __LITTLE_ENDIAN__ 1 #endif -#endif //End of Solaris ifdef. +#endif /* End of Solaris ifdef. */ #ifdef __LITTLE_ENDIAN__ #if __LITTLE_ENDIAN__ Modified: compiler-rt/trunk/test/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/CMakeLists.txt?rev=78143&r1=78142&r2=78143&view=diff ============================================================================== --- compiler-rt/trunk/test/CMakeLists.txt (original) +++ compiler-rt/trunk/test/CMakeLists.txt Tue Aug 4 20:47:29 2009 @@ -1,2 +1,15 @@ -ADD_SUBDIRECTORY( timing ) -ADD_SUBDIRECTORY( Unit ) +PROJECT( tests ) + +SET( CompilerRT_LIBRARY CompilerRT ) + +# create test library +# add_library(${CompilerRT_LIBRARY} STATIC support.c cmdline.c) +TARGET_LINK_LIBRARIES( ${CompilerRT_LIBRARY} ) + +SET( TEST_TARGET_LIBRARIES ${CompilerRT_LIBRARY} ) + +# create tests +# MACRO_ADD_CHECK_TEST( foo foo.c ${TEST_TARGET_LIBRARIES} ) + +#ADD_SUBDIRECTORY( timing ) +#ADD_SUBDIRECTORY( Unit ) Modified: compiler-rt/trunk/test/Unit/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/CMakeLists.txt?rev=78143&r1=78142&r2=78143&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/CMakeLists.txt (original) +++ compiler-rt/trunk/test/Unit/CMakeLists.txt Tue Aug 4 20:47:29 2009 @@ -1,109 +1,103 @@ -PROJECT( Unit ) -SET( SRCS - ashldi3_test.c - gcc_personality_test.c - udivmodti4_test.c - negvsi2_test.c - fixdfdi_test.c - mulvsi3_test.c - fixdfti_test.c - muldc3_test.c - popcountdi2_test.c - negti2_test.c - divsc3_test.c - cmpti2_test.c - trampoline_setup_test.c - mulvti3_test.c - fixunsxfdi_test.c - fixunsxfti_test.c - paritydi2_test.c - negvti2_test.c - divtc3_test.c - ucmpti2_test.c - multc3_test.c - floatdixf_test.c - popcountti2_test.c - negdi2_test.c - floatdidf_test.c - fixunstfdi_test.c - ashlti3_test.c - enable_execute_stack_test.c - floatundixf_test.c - udivmoddi4_test.c - paritysi2_test.c - floatundidf_test.c - divdc3_test.c - floatuntisf_test.c - ucmpdi2_test.c - powixf2_test.c - mulsc3_test.c - popcountsi2_test.c - cmpdi2_test.c - floattisf_test.c - mulvdi3_test.c - fixunssfdi_test.c - fixunsdfsi_test.c - fixunssfti_test.c - parityti2_test.c - negvdi2_test.c - moddi3_test.c - clear_cache_test.c - fixunsxfsi_test.c - subvdi3_test.c - multi3_test.c - addvdi3_test.c - clzti2_test.c - umoddi3_test.c - absvsi2_test.c - ctzdi2_test.c - powitf2_test.c - fixsfdi_test.c - ffsti2_test.c - divdi3_test.c - fixsfti_test.c - absvti2_test.c - ashrti3_test.c - powisf2_test.c - mulxc3_test.c - lshrdi3_test.c - udivdi3_test.c - clzsi2_test.c - addvti3_test.c - udivsi3_test.c - clzdi2_test.c - floatuntidf_test.c - umodti3_test.c - divxc3_test.c - ctzti2_test.c - floatuntixf_test.c - powidf2_test.c - floattidf_test.c - modti3_test.c - fixunssfsi_test.c - fixunsdfdi_test.c - divsi3_test.c - floattixf_test.c - fixunsdfti_test.c - subvti3_test.c - muldi3_test.c - ctzsi2_test.c - absvdi2_test.c - ashrdi3_test.c - lshrti3_test.c - floatdisf_test.c - addvsi3_test.c - udivti3_test.c - umodsi3_test.c - subvsi3_test.c - fixxfdi_test.c - modsi3_test.c - fixxfti_test.c - ffsdi2_test.c - divti3_test.c - floatundisf_test.c - ) - -ADD_LIBRARY( ${PROJECT_NAME} SHARED ${SRCS}) -# ADD_EXECUTABLE( ${PROJECT_NAME} ${SRCS} ) -# TARGET_LINK_LIBRARIES( ${PROJECT_NAME} ${LIBS} ) +# create tests +MACRO_ADD_CHECK_TEST( ashldi3_test ashldi3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( gcc_personality_test gcc_personality_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( udivmodti4_test udivmodti4_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( negvsi2_test negvsi2_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( fixdfdi_test fixdfdi_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( mulvsi3_test mulvsi3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( fixdfti_test fixdfti_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( muldc3_test muldc3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( popcountdi2_test popcountdi2_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( negti2_test negti2_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( divsc3_test divsc3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( cmpti2_test cmpti2_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( trampoline_setup_test trampoline_setup_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( mulvti3_test mulvti3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( fixunsxfdi_test fixunsxfdi_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( fixunsxfti_test fixunsxfti_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( paritydi2_test paritydi2_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( negvti2_test negvti2_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( divtc3_test divtc3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( ucmpti2_test ucmpti2_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( multc3_test multc3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( floatdixf_test floatdixf_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( popcountti2_test popcountti2_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( negdi2_test negdi2_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( floatdidf_test floatdidf_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( fixunstfdi_test fixunstfdi_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( shlti3_test ashlti3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( enable_execute_stack_test enable_execute_stack_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( floatundixf_test floatundixf_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( udivmoddi4_test udivmoddi4_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( paritysi2_test paritysi2_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( floatundidf_test floatundidf_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( divdc3_test divdc3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( floatuntisf_test floatuntisf_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( ucmpdi2_test ucmpdi2_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( powixf2_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( mulsc3_test mulsc3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( popcountsi2_test popcountsi2_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( cmpdi2_test cmpdi2_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( floattisf_test floattisf_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( mulvdi3_test mulvdi3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( fixunssfdi_test fixunssfdi_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( fixunsdfsi_test fixunsdfsi_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( fixunssfti_test fixunssfti_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( parityti2_test parityti2_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( negvdi2_test negvdi2_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( moddi3_test moddi3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( clear_cache_test clear_cache_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( fixunsxfsi_test fixunsxfsi_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( subvdi3_test subvdi3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( multi3_test multi3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( addvdi3_test addvdi3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( clzti2_test clzti2_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( umoddi3_test umoddi3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( absvsi2_test absvsi2_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( ctzdi2_test ctzdi2_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( powitf2_test powitf2_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( fixsfdi_test fixsfdi_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( ffsti2_test ffsti2_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( divdi3_test divdi3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( fixsfti_test fixsfti_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( absvti2_test absvti2_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( ashrti3_test ashrti3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( powisf2_test powisf2_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( mulxc3_test mulxc3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( lshrdi3_test lshrdi3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( udivdi3_test udivdi3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( clzsi2_test clzsi2_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( addvti3_test addvti3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( udivsi3_test udivsi3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( clzdi2_test clzdi2_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( floatuntidf_test floatuntidf_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( umodti3_test umodti3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( divxc3_test divxc3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( ctzti2_test ctzti2_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( floatuntixf_test floatuntixf_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( powidf2_test powidf2_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( floattidf_test floattidf_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( modti3_test modti3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( fixunssfsi_test fixunssfsi_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( fixunsdfdi_test fixunsdfdi_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( divsi3_test divsi3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( floattixf_test floattixf_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( fixunsdfti_test fixunsdfti_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( subvti3_test subvti3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( muldi3_test muldi3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( ctzsi2_test ctzsi2_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( absvdi2_test absvdi2_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( ashrdi3_test ashrdi3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( lshrti3_test lshrti3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( floatdisf_test floatdisf_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( addvsi3_test addvsi3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( udivti3_test udivti3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( umodsi3_test umodsi3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( subvsi3_test subvsi3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( fixxfdi_test fixxfdi_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( modsi3_test modsi3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( fixxfti_test fixxfti_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( ffsdi2_test ffsdi2_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( divti3_test divti3_test.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( floatundisf_test floatundisf_test.c ${TEST_TARGET_LIBRARIES} ) Modified: compiler-rt/trunk/test/Unit/int_lib.h URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/int_lib.h?rev=78143&r1=78142&r2=78143&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/int_lib.h (original) +++ compiler-rt/trunk/test/Unit/int_lib.h Tue Aug 4 20:47:29 2009 @@ -20,6 +20,34 @@ #include +// TODO: Improve this to minimal pre-processor hackish'ness. +#if defined (__SVR4) && defined (__sun) +// config.h build via CMake. +//#include + +// Solaris header for endian and byte swap +//#if defined HAVE_SYS_BYTEORDER_H +#include + +// Solaris defines endian by setting _LITTLE_ENDIAN or _BIG_ENDIAN +#ifdef _BIG_ENDIAN +# define IS_BIG_ENDIAN +#endif +#ifdef _LITTLE_ENDIAN +# define IS_LITTLE_ENDIAN +#endif + +#ifdef IS_BIG_ENDIAN +#define __BIG_ENDIAN__ 1 +#define __LITTLE_ENDIAN__ 0 +#endif +#ifdef IS_LITTLE_ENDIAN +#define __BIG_ENDIAN__ 0 +#define __LITTLE_ENDIAN__ 1 +#endif + +#endif //End of Solaris ifdef. + #ifdef __LITTLE_ENDIAN__ #if __LITTLE_ENDIAN__ #define _YUGA_LITTLE_ENDIAN 1 Modified: compiler-rt/trunk/test/timing/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/timing/CMakeLists.txt?rev=78143&r1=78142&r2=78143&view=diff ============================================================================== --- compiler-rt/trunk/test/timing/CMakeLists.txt (original) +++ compiler-rt/trunk/test/timing/CMakeLists.txt Tue Aug 4 20:47:29 2009 @@ -1,23 +1,17 @@ -PROJECT( timing ) -SET( SRCS - lshrdi3.c - floatundixf.c - floatdixf.c - umoddi3.c - udivdi3.c - negdi2.c - ashrdi3.c - muldi3.c - ashldi3.c - divdi3.c - floatundisf.c - floatdidf.c - floatdisf.c - moddi3.c - floatundidf.c - ) - -ADD_LIBRARY( ${PROJECT_NAME} SHARED ${SRCS}) -# ADD_EXECUTABLE( ${PROJECT_NAME} ${SRCS} ) -# TARGET_LINK_LIBRARIES( ${PROJECT_NAME} ${LIBS} ) +# create tests +MACRO_ADD_CHECK_TEST( lshrdi3 lshrdi3.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( floatundixf floatundixf.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( floatdixf floatdixf.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( umoddi3 umoddi3.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( udivdi3 udivdi3.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( negdi2 negdi2.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( ashrdi3 ashrdi3.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( muldi3 muldi3.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( ashldi3 ashldi3.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( divdi3 divdi3.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( floatundisf floatundisf.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( floatdidf floatdidf.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( floatdisf floatdisf.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( moddi3 moddi3.c ${TEST_TARGET_LIBRARIES} ) +MACRO_ADD_CHECK_TEST( floatundidf floatundidf.c ${TEST_TARGET_LIBRARIES} ) From evan.cheng at apple.com Tue Aug 4 20:57:22 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 05 Aug 2009 01:57:22 -0000 Subject: [llvm-commits] [llvm] r78144 - in /llvm/trunk: lib/CodeGen/LowerSubregs.cpp test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug2.ll Message-ID: <200908050157.n751vMgU030837@zion.cs.uiuc.edu> Author: evancheng Date: Tue Aug 4 20:57:22 2009 New Revision: 78144 URL: http://llvm.org/viewvc/llvm-project?rev=78144&view=rev Log: One more place where subreg lowering forgot to transfer undefness. Added: llvm/trunk/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug2.ll Modified: llvm/trunk/lib/CodeGen/LowerSubregs.cpp Modified: llvm/trunk/lib/CodeGen/LowerSubregs.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LowerSubregs.cpp?rev=78144&r1=78143&r2=78144&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LowerSubregs.cpp (original) +++ llvm/trunk/lib/CodeGen/LowerSubregs.cpp Tue Aug 4 20:57:22 2009 @@ -242,9 +242,12 @@ // No need to insert an identity copy instruction. If the SrcReg was // , we need to make sure it is alive by inserting an IMPLICIT_DEF if (MI->getOperand(1).isUndef() && !MI->getOperand(0).isDead()) { - BuildMI(*MBB, MI, MI->getDebugLoc(), - TII.get(TargetInstrInfo::IMPLICIT_DEF), DstReg) - .addReg(InsReg, RegState::ImplicitKill); + MachineInstrBuilder MIB = BuildMI(*MBB, MI, MI->getDebugLoc(), + TII.get(TargetInstrInfo::IMPLICIT_DEF), DstReg); + if (MI->getOperand(2).isUndef()) + MIB.addReg(InsReg, RegState::Implicit | RegState::Undef); + else + MIB.addReg(InsReg, RegState::ImplicitKill); } else { DOUT << "subreg: eliminated!\n"; MBB->erase(MI); Added: llvm/trunk/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug2.ll?rev=78144&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug2.ll (added) +++ llvm/trunk/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug2.ll Tue Aug 4 20:57:22 2009 @@ -0,0 +1,42 @@ +; RUN: llvm-as < %s | llc -mtriple=thumbv7-apple-darwin9 -mattr=+neon,+neonfp +; rdar://7117307 + + %struct.Hosp = type { i32, i32, i32, %struct.List, %struct.List, %struct.List, %struct.List } + %struct.List = type { %struct.List*, %struct.Patient*, %struct.List* } + %struct.Patient = type { i32, i32, i32, %struct.Village* } + %struct.Village = type { [4 x %struct.Village*], %struct.Village*, %struct.List, %struct.Hosp, i32, i32 } + +define arm_apcscc %struct.List* @sim(%struct.Village* %village) nounwind { +entry: + br i1 undef, label %bb14, label %bb3.preheader + +bb3.preheader: ; preds = %entry + br label %bb5 + +bb5: ; preds = %bb5, %bb3.preheader + br i1 undef, label %bb11, label %bb5 + +bb11: ; preds = %bb5 + %0 = fmul float undef, 0x41E0000000000000 ; [#uses=1] + %1 = fptosi float %0 to i32 ; [#uses=1] + store i32 %1, i32* undef, align 4 + br i1 undef, label %generate_patient.exit, label %generate_patient.exit.thread + +generate_patient.exit.thread: ; preds = %bb11 + ret %struct.List* null + +generate_patient.exit: ; preds = %bb11 + br i1 undef, label %bb14, label %bb12 + +bb12: ; preds = %generate_patient.exit + br i1 undef, label %bb.i, label %bb1.i + +bb.i: ; preds = %bb12 + ret %struct.List* null + +bb1.i: ; preds = %bb12 + ret %struct.List* null + +bb14: ; preds = %generate_patient.exit, %entry + ret %struct.List* undef +} From evan.cheng at apple.com Tue Aug 4 21:25:12 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 05 Aug 2009 02:25:12 -0000 Subject: [llvm-commits] [llvm] r78145 - in /llvm/trunk: lib/CodeGen/LowerSubregs.cpp test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug3.ll Message-ID: <200908050225.n752PCsk031884@zion.cs.uiuc.edu> Author: evancheng Date: Tue Aug 4 21:25:11 2009 New Revision: 78145 URL: http://llvm.org/viewvc/llvm-project?rev=78145&view=rev Log: One more. Transfer kill of the larger register when lowering an EXTRACT_SUBREG. Added: llvm/trunk/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug3.ll Modified: llvm/trunk/lib/CodeGen/LowerSubregs.cpp Modified: llvm/trunk/lib/CodeGen/LowerSubregs.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LowerSubregs.cpp?rev=78145&r1=78144&r2=78145&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LowerSubregs.cpp (original) +++ llvm/trunk/lib/CodeGen/LowerSubregs.cpp Tue Aug 4 21:25:11 2009 @@ -56,7 +56,8 @@ void TransferDeadFlag(MachineInstr *MI, unsigned DstReg, const TargetRegisterInfo &TRI); void TransferKillFlag(MachineInstr *MI, unsigned SrcReg, - const TargetRegisterInfo &TRI); + const TargetRegisterInfo &TRI, + bool AddIfNotFound = false); }; char LowerSubregsInstructionPass::ID = 0; @@ -88,10 +89,11 @@ void LowerSubregsInstructionPass::TransferKillFlag(MachineInstr *MI, unsigned SrcReg, - const TargetRegisterInfo &TRI) { + const TargetRegisterInfo &TRI, + bool AddIfNotFound) { for (MachineBasicBlock::iterator MII = prior(MachineBasicBlock::iterator(MI)); ; --MII) { - if (MII->addRegisterKilled(SrcReg, &TRI)) + if (MII->addRegisterKilled(SrcReg, &TRI, AddIfNotFound)) break; assert(MII != MI->getParent()->begin() && "copyRegToReg output doesn't reference source register!"); @@ -142,7 +144,7 @@ if (MI->getOperand(0).isDead()) TransferDeadFlag(MI, DstReg, TRI); if (MI->getOperand(1).isKill()) - TransferKillFlag(MI, SrcReg, TRI); + TransferKillFlag(MI, SuperReg, TRI, true); #ifndef NDEBUG MachineBasicBlock::iterator dMI = MI; Added: llvm/trunk/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug3.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug3.ll?rev=78145&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug3.ll (added) +++ llvm/trunk/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug3.ll Tue Aug 4 21:25:11 2009 @@ -0,0 +1,54 @@ +; RUN: llvm-as < %s | llc -mtriple=thumbv7-apple-darwin9 -mattr=+neon,+neonfp +; rdar://7117307 + + %struct.Hosp = type { i32, i32, i32, %struct.List, %struct.List, %struct.List, %struct.List } + %struct.List = type { %struct.List*, %struct.Patient*, %struct.List* } + %struct.Patient = type { i32, i32, i32, %struct.Village* } + %struct.Village = type { [4 x %struct.Village*], %struct.Village*, %struct.List, %struct.Hosp, i32, i32 } + +define arm_apcscc %struct.List* @sim(%struct.Village* %village) nounwind { +entry: + br i1 undef, label %bb14, label %bb3.preheader + +bb3.preheader: ; preds = %entry + br label %bb5 + +bb5: ; preds = %bb5, %bb3.preheader + br i1 undef, label %bb11, label %bb5 + +bb11: ; preds = %bb5 + %0 = load i32* undef, align 4 ; [#uses=1] + %1 = xor i32 %0, 123459876 ; [#uses=1] + %2 = sdiv i32 %1, 127773 ; [#uses=1] + %3 = mul i32 %2, 2836 ; [#uses=1] + %4 = sub i32 0, %3 ; [#uses=1] + %5 = xor i32 %4, 123459876 ; [#uses=1] + %idum_addr.0.i.i = select i1 undef, i32 undef, i32 %5 ; [#uses=1] + %6 = sitofp i32 %idum_addr.0.i.i to double ; [#uses=1] + %7 = fmul double %6, 0x3E00000000200000 ; [#uses=1] + %8 = fptrunc double %7 to float ; [#uses=2] + %9 = fmul float %8, 0x41E0000000000000 ; [#uses=1] + %10 = fptosi float %9 to i32 ; [#uses=1] + store i32 %10, i32* undef, align 4 + %11 = fpext float %8 to double ; [#uses=1] + %12 = fcmp ogt double %11, 6.660000e-01 ; [#uses=1] + br i1 %12, label %generate_patient.exit, label %generate_patient.exit.thread + +generate_patient.exit.thread: ; preds = %bb11 + ret %struct.List* null + +generate_patient.exit: ; preds = %bb11 + br i1 undef, label %bb14, label %bb12 + +bb12: ; preds = %generate_patient.exit + br i1 undef, label %bb.i, label %bb1.i + +bb.i: ; preds = %bb12 + ret %struct.List* null + +bb1.i: ; preds = %bb12 + ret %struct.List* null + +bb14: ; preds = %generate_patient.exit, %entry + ret %struct.List* undef +} From clattner at apple.com Tue Aug 4 21:30:05 2009 From: clattner at apple.com (Chris Lattner) Date: Tue, 4 Aug 2009 19:30:05 -0700 Subject: [llvm-commits] [llvm] r78127 - in /llvm/trunk: lib/ExecutionEngine/ExecutionEngine.cpp unittests/ExecutionEngine/ExecutionEngineTest.cpp unittests/ExecutionEngine/Makefile In-Reply-To: <200908042353.n74NrdXX026510@zion.cs.uiuc.edu> References: <200908042353.n74NrdXX026510@zion.cs.uiuc.edu> Message-ID: <2C7A8D9B-526C-4241-9C8D-54A320AF0623@apple.com> On Aug 4, 2009, at 4:53 PM, Jeffrey Yasskin wrote: > Author: jyasskin > Date: Tue Aug 4 18:53:16 2009 > New Revision: 78127 > > URL: http://llvm.org/viewvc/llvm-project?rev=78127&view=rev > Log: > Make ExecutionEngine::updateGlobalMapping(GV, NULL) properly remove > GV's old > address from the reverse mapping, and add a test that this works now. Hey Jeffrey, Should the GlobalMapping move to using AssertingVH? I think that would define this class of bugs away. -Chris > > Added: > llvm/trunk/unittests/ExecutionEngine/ExecutionEngineTest.cpp > Modified: > llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp > llvm/trunk/unittests/ExecutionEngine/Makefile > > Modified: llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp?rev=78127&r1=78126&r2=78127&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp (original) > +++ llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp Tue Aug 4 > 18:53:16 2009 > @@ -179,7 +179,7 @@ > } > > if (!state.getGlobalAddressReverseMap(locked).empty()) > - state.getGlobalAddressReverseMap(locked).erase(Addr); > + state.getGlobalAddressReverseMap(locked).erase(OldVal); > return OldVal; > } > > > Added: llvm/trunk/unittests/ExecutionEngine/ExecutionEngineTest.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/ExecutionEngine/ExecutionEngineTest.cpp?rev=78127&view=auto > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/unittests/ExecutionEngine/ExecutionEngineTest.cpp > (added) > +++ llvm/trunk/unittests/ExecutionEngine/ExecutionEngineTest.cpp Tue > Aug 4 18:53:16 2009 > @@ -0,0 +1,92 @@ > +//===- ExecutionEngineTest.cpp - Unit tests for ExecutionEngine > -----------===// > +// > +// The LLVM Compiler Infrastructure > +// > +// This file is distributed under the University of Illinois Open > Source > +// License. See LICENSE.TXT for details. > +// > +// > = > = > = > ----------------------------------------------------------------------= > ==// > + > +#include "llvm/DerivedTypes.h" > +#include "llvm/GlobalVariable.h" > +#include "llvm/LLVMContext.h" > +#include "llvm/Module.h" > +#include "llvm/ADT/OwningPtr.h" > +#include "llvm/ExecutionEngine/Interpreter.h" > +#include "gtest/gtest.h" > + > +using namespace llvm; > + > +namespace { > + > +class ExecutionEngineTest : public testing::Test { > +protected: > + ExecutionEngineTest() > + : M(new Module("
    ", getGlobalContext())), > + Engine(EngineBuilder(M).create()) { > + } > + > + virtual void SetUp() { > + ASSERT_TRUE(Engine.get() != NULL); > + } > + > + GlobalVariable *NewExtGlobal(const Type *T, const Twine &Name) { > + return new GlobalVariable(*M, T, false, // Not constant. > + GlobalValue::ExternalLinkage, NULL, > Name); > + } > + > + Module *const M; > + const OwningPtr Engine; > +}; > + > +TEST_F(ExecutionEngineTest, ForwardGlobalMapping) { > + GlobalVariable *G1 = NewExtGlobal(Type::Int32Ty, "Global1"); > + int32_t Mem1 = 3; > + Engine->addGlobalMapping(G1, &Mem1); > + EXPECT_EQ(&Mem1, Engine->getPointerToGlobalIfAvailable(G1)); > + int32_t Mem2 = 4; > + Engine->updateGlobalMapping(G1, &Mem2); > + EXPECT_EQ(&Mem2, Engine->getPointerToGlobalIfAvailable(G1)); > + Engine->updateGlobalMapping(G1, NULL); > + EXPECT_EQ(NULL, Engine->getPointerToGlobalIfAvailable(G1)); > + Engine->updateGlobalMapping(G1, &Mem2); > + EXPECT_EQ(&Mem2, Engine->getPointerToGlobalIfAvailable(G1)); > + > + GlobalVariable *G2 = NewExtGlobal(Type::Int32Ty, "Global1"); > + EXPECT_EQ(NULL, Engine->getPointerToGlobalIfAvailable(G2)) > + << "The NULL return shouldn't depend on having called" > + << " updateGlobalMapping(..., NULL)"; > + // Check that update...() can be called before add...(). > + Engine->updateGlobalMapping(G2, &Mem1); > + EXPECT_EQ(&Mem1, Engine->getPointerToGlobalIfAvailable(G2)); > + EXPECT_EQ(&Mem2, Engine->getPointerToGlobalIfAvailable(G1)) > + << "A second mapping shouldn't affect the first."; > +} > + > +TEST_F(ExecutionEngineTest, ReverseGlobalMapping) { > + GlobalVariable *G1 = NewExtGlobal(Type::Int32Ty, "Global1"); > + > + int32_t Mem1 = 3; > + Engine->addGlobalMapping(G1, &Mem1); > + EXPECT_EQ(G1, Engine->getGlobalValueAtAddress(&Mem1)); > + int32_t Mem2 = 4; > + Engine->updateGlobalMapping(G1, &Mem2); > + EXPECT_EQ(NULL, Engine->getGlobalValueAtAddress(&Mem1)); > + EXPECT_EQ(G1, Engine->getGlobalValueAtAddress(&Mem2)); > + > + GlobalVariable *G2 = NewExtGlobal(Type::Int32Ty, "Global2"); > + Engine->updateGlobalMapping(G2, &Mem1); > + EXPECT_EQ(G2, Engine->getGlobalValueAtAddress(&Mem1)); > + EXPECT_EQ(G1, Engine->getGlobalValueAtAddress(&Mem2)); > + Engine->updateGlobalMapping(G1, NULL); > + EXPECT_EQ(G2, Engine->getGlobalValueAtAddress(&Mem1)) > + << "Removing one mapping doesn't affect a different one."; > + EXPECT_EQ(NULL, Engine->getGlobalValueAtAddress(&Mem2)); > + Engine->updateGlobalMapping(G2, &Mem2); > + EXPECT_EQ(NULL, Engine->getGlobalValueAtAddress(&Mem1)); > + EXPECT_EQ(G2, Engine->getGlobalValueAtAddress(&Mem2)) > + << "Once a mapping is removed, we can point another GV at the" > + << " now-free address."; > +} > + > +} > > Modified: llvm/trunk/unittests/ExecutionEngine/Makefile > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/ExecutionEngine/Makefile?rev=78127&r1=78126&r2=78127&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/unittests/ExecutionEngine/Makefile (original) > +++ llvm/trunk/unittests/ExecutionEngine/Makefile Tue Aug 4 > 18:53:16 2009 > @@ -8,12 +8,11 @@ > ##= > = > = > ----------------------------------------------------------------------= > ==## > > LEVEL = ../.. > +TESTNAME = ExecutionEngine > +LINK_COMPONENTS := engine interpreter > > include $(LEVEL)/Makefile.config > > PARALLEL_DIRS = JIT > > -include $(LEVEL)/Makefile.common > - > -clean:: > - $(Verb) $(RM) -f *Tests > +include $(LLVM_SRC_ROOT)/unittests/Makefile.unittest > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From clattner at apple.com Tue Aug 4 21:32:14 2009 From: clattner at apple.com (Chris Lattner) Date: Tue, 4 Aug 2009 19:32:14 -0700 Subject: [llvm-commits] [llvm] r78097 - in /llvm/trunk: include/llvm/LLVMContext.h lib/VMCore/Constants.cpp lib/VMCore/LLVMContextImpl.cpp lib/VMCore/LLVMContextImpl.h In-Reply-To: <23F64AF9-FDE2-436D-8F46-D00EFE1FE871@apple.com> References: <200908042025.n74KPVti018779@zion.cs.uiuc.edu> <23F64AF9-FDE2-436D-8F46-D00EFE1FE871@apple.com> Message-ID: <6EC02354-3DE7-4574-AF07-639DA521F0B7@apple.com> On Aug 4, 2009, at 5:52 PM, Dan Gohman wrote: > > On Aug 4, 2009, at 1:25 PM, Owen Anderson wrote: >> -class LLVMContext { >> +struct LLVMContext { >> LLVMContextImpl* pImpl; > > Hi Owen, > > With the pImpl member being public, would it make sense to make > it const? It looks like it's never modified after its initialization > in the LLVMContext constructor. Alternatively, perhaps this could > be accessed with an accessor function. Also, LLVMContext should be uniformly declared as a class: http://llvm.org/docs/CodingStandards.html#ci_class_struct -Chris From bob.wilson at apple.com Tue Aug 4 21:47:17 2009 From: bob.wilson at apple.com (Bob Wilson) Date: Wed, 05 Aug 2009 02:47:17 -0000 Subject: [llvm-commits] [llvm] r78146 - /llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp Message-ID: <200908050247.n752lIx8032528@zion.cs.uiuc.edu> Author: bwilson Date: Tue Aug 4 21:47:13 2009 New Revision: 78146 URL: http://llvm.org/viewvc/llvm-project?rev=78146&view=rev Log: Oops. I didn't mean to commit this piece yet. Modified: llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp Modified: llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp?rev=78146&r1=78145&r2=78146&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp Tue Aug 4 21:47:13 2009 @@ -93,8 +93,6 @@ bool ARMBaseTargetMachine::addPreRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel) { - // Call NEON pre-alloc pass here. - // FIXME: temporarily disabling load / store optimization pass for Thumb mode. if (OptLevel != CodeGenOpt::None && !DisableLdStOpti && !Subtarget.isThumb()) PM.add(createARMLoadStoreOptimizationPass(true)); From resistor at mac.com Tue Aug 4 22:43:40 2009 From: resistor at mac.com (Owen Anderson) Date: Tue, 04 Aug 2009 20:43:40 -0700 Subject: [llvm-commits] [llvm] r78097 - in /llvm/trunk: include/llvm/LLVMContext.h lib/VMCore/Constants.cpp lib/VMCore/LLVMContextImpl.cpp lib/VMCore/LLVMContextImpl.h In-Reply-To: <6EC02354-3DE7-4574-AF07-639DA521F0B7@apple.com> References: <200908042025.n74KPVti018779@zion.cs.uiuc.edu> <23F64AF9-FDE2-436D-8F46-D00EFE1FE871@apple.com> <6EC02354-3DE7-4574-AF07-639DA521F0B7@apple.com> Message-ID: On Aug 4, 2009, at 7:32 PM, Chris Lattner wrote: > Also, LLVMContext should be uniformly declared as a class: > http://llvm.org/docs/CodingStandards.html#ci_class_struct Actually, it is intended to be an all-members-are-public type, so struct is appropriate. The only use of private is to prevent the compiler from generating default and copy constructors, not to define actual members. --Owen -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090804/7b9ce3ab/attachment.html -------------- next part -------------- A non-text attachment was scrubbed... Name: smime.p7s Type: application/pkcs7-signature Size: 2620 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090804/7b9ce3ab/attachment.bin From evan.cheng at apple.com Tue Aug 4 22:53:22 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 05 Aug 2009 03:53:22 -0000 Subject: [llvm-commits] [llvm] r78151 - in /llvm/trunk: lib/CodeGen/LiveIntervalAnalysis.cpp lib/CodeGen/LowerSubregs.cpp test/CodeGen/Blackfin/printf2.ll Message-ID: <200908050353.n753rRd1002041@zion.cs.uiuc.edu> Author: evancheng Date: Tue Aug 4 22:53:14 2009 New Revision: 78151 URL: http://llvm.org/viewvc/llvm-project?rev=78151&view=rev Log: Turn some insert_subreg, extract_subreg, subreg_to_reg into implicit_defs. Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp llvm/trunk/lib/CodeGen/LowerSubregs.cpp llvm/trunk/test/CodeGen/Blackfin/printf2.ll Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=78151&r1=78150&r2=78151&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original) +++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Tue Aug 4 22:53:14 2009 @@ -106,6 +106,23 @@ } } +static bool CanTurnIntoImplicitDef(MachineInstr *MI, unsigned Reg, + const TargetInstrInfo *tii_) { + unsigned SrcReg, DstReg, SrcSubReg, DstSubReg; + if (tii_->isMoveInstr(*MI, SrcReg, DstReg, SrcSubReg, DstSubReg) && + Reg == SrcReg) + return true; + + if ((MI->getOpcode() == TargetInstrInfo::INSERT_SUBREG || + MI->getOpcode() == TargetInstrInfo::SUBREG_TO_REG) && + MI->getOperand(2).getReg() == Reg) + return true; + if (MI->getOpcode() == TargetInstrInfo::EXTRACT_SUBREG && + MI->getOperand(1).getReg() == Reg) + return true; + return false; +} + /// processImplicitDefs - Process IMPLICIT_DEF instructions and make sure /// there is one implicit_def for each use. Add isUndef marker to /// implicit_def defs and their uses. @@ -132,7 +149,7 @@ bool ChangedToImpDef = false; for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { MachineOperand& MO = MI->getOperand(i); - if (!MO.isReg() || !MO.isUse()) + if (!MO.isReg() || !MO.isUse() || MO.isUndef()) continue; unsigned Reg = MO.getReg(); if (!Reg) @@ -140,9 +157,7 @@ if (!ImpDefRegs.count(Reg)) continue; // Use is a copy, just turn it into an implicit_def. - unsigned SrcReg, DstReg, SrcSubReg, DstSubReg; - if (tii_->isMoveInstr(*MI, SrcReg, DstReg, SrcSubReg, DstSubReg) && - Reg == SrcReg) { + if (CanTurnIntoImplicitDef(MI, Reg, tii_)) { bool isKill = MO.isKill(); MI->setDesc(tii_->get(TargetInstrInfo::IMPLICIT_DEF)); for (int j = MI->getNumOperands() - 1, ee = 0; j > ee; --j) @@ -154,8 +169,15 @@ } MO.setIsUndef(); - if (MO.isKill() || MI->isRegTiedToDefOperand(i)) + if (MO.isKill() || MI->isRegTiedToDefOperand(i)) { + // Make sure other uses of + for (unsigned j = i+1; j != e; ++j) { + MachineOperand &MOJ = MI->getOperand(j); + if (MOJ.isReg() && MOJ.isUse() && MOJ.getReg() == Reg) + MOJ.setIsUndef(); + } ImpDefRegs.erase(Reg); + } } if (ChangedToImpDef) { Modified: llvm/trunk/lib/CodeGen/LowerSubregs.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LowerSubregs.cpp?rev=78151&r1=78150&r2=78151&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LowerSubregs.cpp (original) +++ llvm/trunk/lib/CodeGen/LowerSubregs.cpp Tue Aug 4 22:53:14 2009 @@ -119,6 +119,7 @@ "Extract supperg source must be a physical register"); assert(TargetRegisterInfo::isPhysicalRegister(DstReg) && "Extract destination must be in a physical register"); + assert(SrcReg && "invalid subregister index for register"); DOUT << "subreg: CONVERTING: " << *MI; Modified: llvm/trunk/test/CodeGen/Blackfin/printf2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Blackfin/printf2.ll?rev=78151&r1=78150&r2=78151&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Blackfin/printf2.ll (original) +++ llvm/trunk/test/CodeGen/Blackfin/printf2.ll Tue Aug 4 22:53:14 2009 @@ -1,7 +1,4 @@ ; RUN: llvm-as < %s | llc -march=bfin -; XFAIL: * -; Assertion failed: (isUsed(Reg) && "Using an undefined register!"), -; function forward, file RegisterScavenging.cpp, line 182. declare i32 @printf(i8*, ...) From clattner at apple.com Tue Aug 4 22:54:54 2009 From: clattner at apple.com (Chris Lattner) Date: Tue, 4 Aug 2009 20:54:54 -0700 Subject: [llvm-commits] [llvm] r78097 - in /llvm/trunk: include/llvm/LLVMContext.h lib/VMCore/Constants.cpp lib/VMCore/LLVMContextImpl.cpp lib/VMCore/LLVMContextImpl.h In-Reply-To: References: <200908042025.n74KPVti018779@zion.cs.uiuc.edu> <23F64AF9-FDE2-436D-8F46-D00EFE1FE871@apple.com> <6EC02354-3DE7-4574-AF07-639DA521F0B7@apple.com> Message-ID: On Aug 4, 2009, at 8:43 PM, Owen Anderson wrote: > On Aug 4, 2009, at 7:32 PM, Chris Lattner wrote: >> Also, LLVMContext should be uniformly declared as a class: >> http://llvm.org/docs/CodingStandards.html#ci_class_struct > > Actually, it is intended to be an all-members-are-public type, so > struct is appropriate. The only use of private is to prevent the > compiler from generating default and copy constructors, not to > define actual members. Fine, its implementation is private to vmcore, right? Since it has to be forward declared in various headers, why not use class? -Chris -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090804/052953df/attachment.html From a at bolka.at Tue Aug 4 23:03:30 2009 From: a at bolka.at (Andreas Bolka) Date: Wed, 05 Aug 2009 04:03:30 -0000 Subject: [llvm-commits] [llvm] r78153 - /llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-weak-crossing.ll Message-ID: <200908050403.n7543Uxt002411@zion.cs.uiuc.edu> Author: abolka Date: Tue Aug 4 23:03:29 2009 New Revision: 78153 URL: http://llvm.org/viewvc/llvm-project?rev=78153&view=rev Log: Fix LDA testcases. Modified: llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-weak-crossing.ll Modified: llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-weak-crossing.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-weak-crossing.ll?rev=78153&r1=78152&r2=78153&view=diff ============================================================================== --- llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-weak-crossing.ll (original) +++ llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-weak-crossing.ll Tue Aug 4 23:03:29 2009 @@ -13,8 +13,8 @@ for.body: %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ] %i.255 = sub i64 255, %i - %y.ld.addr = getelementptr [256 x i32]* @y, i64 0, i64 %i.255 - %x.ld.addr = getelementptr [256 x i32]* @x, i64 0, i64 %i + %y.ld.addr = getelementptr [256 x i32]* @y, i64 0, i64 %i + %x.ld.addr = getelementptr [256 x i32]* @x, i64 0, i64 %i.255 %x.st.addr = getelementptr [256 x i32]* @x, i64 0, i64 %i %x = load i32* %x.ld.addr ; 0 %y = load i32* %y.ld.addr ; 1 @@ -39,9 +39,9 @@ for.body: %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ] - %i.255 = sub i64 0, %i + %i.255 = sub i64 255, %i %y.ld.addr = getelementptr [256 x i32]* @y, i64 0, i64 %i - %x.ld.addr = getelementptr [256 x i32]* @x, i64 1, i64 %i.255 + %x.ld.addr = getelementptr [256 x i32]* @x, i64 0, i64 %i.255 %x.st.addr = getelementptr [256 x i32]* @x, i64 0, i64 %i %x = load i32* %x.ld.addr ; 0 %y = load i32* %y.ld.addr ; 1 From eocallaghan at auroraux.org Tue Aug 4 23:03:21 2009 From: eocallaghan at auroraux.org (Edward O'Callaghan) Date: Wed, 05 Aug 2009 04:03:21 -0000 Subject: [llvm-commits] [compiler-rt] r78152 - in /compiler-rt/trunk/lib: ashrti3.c clear_cache.c clzdi2.c clzsi2.c clzti2.c divti3.c enable_execute_stack.c eprintf.c ffsdi2.c ffsti2.c fixunsdfdi.c fixunsdfsi.c fixunsdfti.c fixunssfdi.c fixunssfsi.c fixunssfti.c fixunsxfdi.c fixunsxfti.c fixxfdi.c fixxfti.c floattixf.c floatuntixf.c gcc_personality_v0.c lshrdi3.c lshrti3.c negdi2.c negti2.c negvdi2.c negvsi2.c subvdi3.c subvsi3.c subvti3.c trampoline_setup.c Message-ID: <200908050403.n7543Tg7002401@zion.cs.uiuc.edu> Author: evocallaghan Date: Tue Aug 4 23:02:56 2009 New Revision: 78152 URL: http://llvm.org/viewvc/llvm-project?rev=78152&view=rev Log: Fixup C++ style comments are not allowed in ISO C90 to classic C style. Modified: compiler-rt/trunk/lib/ashrti3.c compiler-rt/trunk/lib/clear_cache.c compiler-rt/trunk/lib/clzdi2.c compiler-rt/trunk/lib/clzsi2.c compiler-rt/trunk/lib/clzti2.c compiler-rt/trunk/lib/divti3.c compiler-rt/trunk/lib/enable_execute_stack.c compiler-rt/trunk/lib/eprintf.c compiler-rt/trunk/lib/ffsdi2.c compiler-rt/trunk/lib/ffsti2.c compiler-rt/trunk/lib/fixunsdfdi.c compiler-rt/trunk/lib/fixunsdfsi.c compiler-rt/trunk/lib/fixunsdfti.c compiler-rt/trunk/lib/fixunssfdi.c compiler-rt/trunk/lib/fixunssfsi.c compiler-rt/trunk/lib/fixunssfti.c compiler-rt/trunk/lib/fixunsxfdi.c compiler-rt/trunk/lib/fixunsxfti.c compiler-rt/trunk/lib/fixxfdi.c compiler-rt/trunk/lib/fixxfti.c compiler-rt/trunk/lib/floattixf.c compiler-rt/trunk/lib/floatuntixf.c compiler-rt/trunk/lib/gcc_personality_v0.c compiler-rt/trunk/lib/lshrdi3.c compiler-rt/trunk/lib/lshrti3.c compiler-rt/trunk/lib/negdi2.c compiler-rt/trunk/lib/negti2.c compiler-rt/trunk/lib/negvdi2.c compiler-rt/trunk/lib/negvsi2.c compiler-rt/trunk/lib/subvdi3.c compiler-rt/trunk/lib/subvsi3.c compiler-rt/trunk/lib/subvti3.c compiler-rt/trunk/lib/trampoline_setup.c Modified: compiler-rt/trunk/lib/ashrti3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/ashrti3.c?rev=78152&r1=78151&r2=78152&view=diff ============================================================================== --- compiler-rt/trunk/lib/ashrti3.c (original) +++ compiler-rt/trunk/lib/ashrti3.c Tue Aug 4 23:02:56 2009 @@ -1,23 +1,24 @@ -//===-- ashrti3.c - Implement __ashrti3 -----------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __ashrti3 for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- ashrti3.c - Implement __ashrti3 -----------------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __ashrti3 for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #if __x86_64 #include "int_lib.h" -// Returns: arithmetic a >> b +/* Returns: arithmetic a >> b */ -// Precondition: 0 <= b < bits_in_tword +/* Precondition: 0 <= b < bits_in_tword */ ti_int __ashrti3(ti_int a, si_int b) @@ -26,13 +27,13 @@ twords input; twords result; input.all = a; - if (b & bits_in_dword) // bits_in_dword <= b < bits_in_tword + if (b & bits_in_dword) /* bits_in_dword <= b < bits_in_tword */ { - // result.high = input.high < 0 ? -1 : 0 + /* result.high = input.high < 0 ? -1 : 0 */ result.high = input.high >> (bits_in_dword - 1); result.low = input.high >> (b - bits_in_dword); } - else // 0 <= b < bits_in_dword + else /* 0 <= b < bits_in_dword */ { if (b == 0) return a; Modified: compiler-rt/trunk/lib/clear_cache.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/clear_cache.c?rev=78152&r1=78151&r2=78152&view=diff ============================================================================== --- compiler-rt/trunk/lib/clear_cache.c (original) +++ compiler-rt/trunk/lib/clear_cache.c Tue Aug 4 23:02:56 2009 @@ -1,11 +1,12 @@ -//===-- clear_cache.c - Implement __clear_cache ---------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// +/* ===-- clear_cache.c - Implement __clear_cache ---------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + */ #include @@ -13,22 +14,23 @@ #include #endif -// -// The compiler generates calls to __clear_cache() when creating -// trampoline functions on the stack for use with nested functions. -// It is expected to invalidate the instruction cache for the -// specified range. -// +/* + * The compiler generates calls to __clear_cache() when creating + * trampoline functions on the stack for use with nested functions. + * It is expected to invalidate the instruction cache for the + * specified range. + */ + void __clear_cache(void* start, void* end) { #if __i386__ || __x86_64__ -// -// Intel processors have a unified instruction and data cache -// so there is nothing to do -// +/* + * Intel processors have a unified instruction and data cache + * so there is nothing to do + */ #else #if __APPLE__ - // On Darwin, sys_icache_invalidate() provides this functionality + /* On Darwin, sys_icache_invalidate() provides this functionality */ sys_icache_invalidate(start, end-start); #else abort(); Modified: compiler-rt/trunk/lib/clzdi2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/clzdi2.c?rev=78152&r1=78151&r2=78152&view=diff ============================================================================== --- compiler-rt/trunk/lib/clzdi2.c (original) +++ compiler-rt/trunk/lib/clzdi2.c Tue Aug 4 23:02:56 2009 @@ -1,21 +1,22 @@ -//===-- clzdi2.c - Implement __clzdi2 -------------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __clzdi2 for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- clzdi2.c - Implement __clzdi2 -------------------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __clzdi2 for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #include "int_lib.h" -// Returns: the number of leading 0-bits +/* Returns: the number of leading 0-bits */ -// Precondition: a != 0 +/* Precondition: a != 0 */ si_int __clzdi2(di_int a) Modified: compiler-rt/trunk/lib/clzsi2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/clzsi2.c?rev=78152&r1=78151&r2=78152&view=diff ============================================================================== --- compiler-rt/trunk/lib/clzsi2.c (original) +++ compiler-rt/trunk/lib/clzsi2.c Tue Aug 4 23:02:56 2009 @@ -1,51 +1,53 @@ -//===-- clzsi2.c - Implement __clzsi2 -------------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __clzsi2 for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- clzsi2.c - Implement __clzsi2 -------------------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __clzsi2 for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #include "int_lib.h" -// Returns: the number of leading 0-bits +/* Returns: the number of leading 0-bits */ -// Precondition: a != 0 +/* Precondition: a != 0 */ si_int __clzsi2(si_int a) { su_int x = (su_int)a; - si_int t = ((x & 0xFFFF0000) == 0) << 4; // if (x is small) t = 16 else 0 - x >>= 16 - t; // x = [0 - 0xFFFF] - su_int r = t; // r = [0, 16] - // return r + clz(x) + si_int t = ((x & 0xFFFF0000) == 0) << 4; /* if (x is small) t = 16 else 0 */ + x >>= 16 - t; /* x = [0 - 0xFFFF] */ + su_int r = t; /* r = [0, 16] */ + /* return r + clz(x) */ t = ((x & 0xFF00) == 0) << 3; - x >>= 8 - t; // x = [0 - 0xFF] - r += t; // r = [0, 8, 16, 24] - // return r + clz(x) + x >>= 8 - t; /* x = [0 - 0xFF] */ + r += t; /* r = [0, 8, 16, 24] */ + /* return r + clz(x) */ t = ((x & 0xF0) == 0) << 2; - x >>= 4 - t; // x = [0 - 0xF] - r += t; // r = [0, 4, 8, 12, 16, 20, 24, 28] - // return r + clz(x) + x >>= 4 - t; /* x = [0 - 0xF] */ + r += t; /* r = [0, 4, 8, 12, 16, 20, 24, 28] */ + /* return r + clz(x) */ t = ((x & 0xC) == 0) << 1; - x >>= 2 - t; // x = [0 - 3] - r += t; // r = [0 - 30] and is even - // return r + clz(x) -// switch (x) -// { -// case 0: -// return r + 2; -// case 1: -// return r + 1; -// case 2: -// case 3: -// return r; -// } + x >>= 2 - t; /* x = [0 - 3] */ + r += t; /* r = [0 - 30] and is even */ + /* return r + clz(x) */ +/* switch (x) + * { + * case 0: + * return r + 2; + * case 1: + * return r + 1; + * case 2: + * case 3: + * return r; + * } + */ return r + ((2 - x) & -((x & 2) == 0)); } Modified: compiler-rt/trunk/lib/clzti2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/clzti2.c?rev=78152&r1=78151&r2=78152&view=diff ============================================================================== --- compiler-rt/trunk/lib/clzti2.c (original) +++ compiler-rt/trunk/lib/clzti2.c Tue Aug 4 23:02:56 2009 @@ -1,23 +1,24 @@ -//===-- clzti2.c - Implement __clzti2 -------------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __clzti2 for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- clzti2.c - Implement __clzti2 -------------------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __clzti2 for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #if __x86_64 #include "int_lib.h" -// Returns: the number of leading 0-bits +/* Returns: the number of leading 0-bits */ -// Precondition: a != 0 +/* Precondition: a != 0 */ si_int __clzti2(ti_int a) Modified: compiler-rt/trunk/lib/divti3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/divti3.c?rev=78152&r1=78151&r2=78152&view=diff ============================================================================== --- compiler-rt/trunk/lib/divti3.c (original) +++ compiler-rt/trunk/lib/divti3.c Tue Aug 4 23:02:56 2009 @@ -1,15 +1,16 @@ -//===-- divti3.c - Implement __divti3 -------------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __divti3 for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- divti3.c - Implement __divti3 -------------------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __divti3 for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #if __x86_64 @@ -17,18 +18,18 @@ tu_int __udivmodti4(tu_int a, tu_int b, tu_int* rem); -// Returns: a / b +/* Returns: a / b */ ti_int __divti3(ti_int a, ti_int b) { const int bits_in_tword_m1 = (int)(sizeof(ti_int) * CHAR_BIT) - 1; - ti_int s_a = a >> bits_in_tword_m1; // s_a = a < 0 ? -1 : 0 - ti_int s_b = b >> bits_in_tword_m1; // s_b = b < 0 ? -1 : 0 - a = (a ^ s_a) - s_a; // negate if s_a == -1 - b = (b ^ s_b) - s_b; // negate if s_b == -1 - s_a ^= s_b; // sign of quotient - return (__udivmodti4(a, b, (tu_int*)0) ^ s_a) - s_a; // negate if s_a == -1 + ti_int s_a = a >> bits_in_tword_m1; /* s_a = a < 0 ? -1 : 0 */ + ti_int s_b = b >> bits_in_tword_m1; /* s_b = b < 0 ? -1 : 0 */ + a = (a ^ s_a) - s_a; /* negate if s_a == -1 */ + b = (b ^ s_b) - s_b; /* negate if s_b == -1 */ + s_a ^= s_b; /* sign of quotient */ + return (__udivmodti4(a, b, (tu_int*)0) ^ s_a) - s_a; /* negate if s_a == -1 */ } #endif Modified: compiler-rt/trunk/lib/enable_execute_stack.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/enable_execute_stack.c?rev=78152&r1=78151&r2=78152&view=diff ============================================================================== --- compiler-rt/trunk/lib/enable_execute_stack.c (original) +++ compiler-rt/trunk/lib/enable_execute_stack.c Tue Aug 4 23:02:56 2009 @@ -1,11 +1,12 @@ -//===-- enable_execute_stack.c - Implement __enable_execute_stack ---------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// +/* ===-- enable_execute_stack.c - Implement __enable_execute_stack ---------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + */ #include #include @@ -14,20 +15,21 @@ #endif -// -// The compiler generates calls to __enable_execute_stack() when creating -// trampoline functions on the stack for use with nested functions. -// It is expected to mark the page(s) containing the address -// and the next 48 bytes as executable. Since the stack is normally rw- -// that means changing the protection on those page(s) to rwx. -// +/* + * The compiler generates calls to __enable_execute_stack() when creating + * trampoline functions on the stack for use with nested functions. + * It is expected to mark the page(s) containing the address + * and the next 48 bytes as executable. Since the stack is normally rw- + * that means changing the protection on those page(s) to rwx. + */ + void __enable_execute_stack(void* addr) { #if __APPLE__ - // On Darwin, pagesize is always 4096 bytes + /* On Darwin, pagesize is always 4096 bytes */ const uintptr_t pageSize = 4096; #else - // FIXME: We should have a configure check for this. + /* FIXME: We should have a configure check for this. */ const uintptr_t pageSize = getpagesize(); #endif const uintptr_t pageAlignMask = ~(pageSize-1); Modified: compiler-rt/trunk/lib/eprintf.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/eprintf.c?rev=78152&r1=78151&r2=78152&view=diff ============================================================================== --- compiler-rt/trunk/lib/eprintf.c (original) +++ compiler-rt/trunk/lib/eprintf.c Tue Aug 4 23:02:56 2009 @@ -1,11 +1,12 @@ -//===---------- eprintf.c - Implements __eprintf --------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// +/* ===---------- eprintf.c - Implements __eprintf --------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + */ @@ -13,14 +14,14 @@ #include -// -// __eprintf() was used in an old version of . -// It can eventually go away, but it is needed when linking -// .o files built with the old . -// -// It should never be exported from a dylib, so it is marked -// visibility hidden. -// +/* + * __eprintf() was used in an old version of . + * It can eventually go away, but it is needed when linking + * .o files built with the old . + * + * It should never be exported from a dylib, so it is marked + * visibility hidden. + */ __attribute__((visibility("hidden"))) void __eprintf(const char* format, const char* assertion_expression, const char* line, const char* file) Modified: compiler-rt/trunk/lib/ffsdi2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/ffsdi2.c?rev=78152&r1=78151&r2=78152&view=diff ============================================================================== --- compiler-rt/trunk/lib/ffsdi2.c (original) +++ compiler-rt/trunk/lib/ffsdi2.c Tue Aug 4 23:02:56 2009 @@ -1,20 +1,22 @@ -//===-- ffsdi2.c - Implement __ffsdi2 -------------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __ffsdi2 for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- ffsdi2.c - Implement __ffsdi2 -------------------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __ffsdi2 for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #include "int_lib.h" -// Returns: the index of the least significant 1-bit in a, or -// the value zero if a is zero. The least significant bit is index one. +/* Returns: the index of the least significant 1-bit in a, or + * the value zero if a is zero. The least significant bit is index one. + */ si_int __ffsdi2(di_int a) Modified: compiler-rt/trunk/lib/ffsti2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/ffsti2.c?rev=78152&r1=78151&r2=78152&view=diff ============================================================================== --- compiler-rt/trunk/lib/ffsti2.c (original) +++ compiler-rt/trunk/lib/ffsti2.c Tue Aug 4 23:02:56 2009 @@ -1,22 +1,24 @@ -//===-- ffsti2.c - Implement __ffsti2 -------------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __ffsti2 for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- ffsti2.c - Implement __ffsti2 -------------------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __ffsti2 for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #if __x86_64 #include "int_lib.h" -// Returns: the index of the least significant 1-bit in a, or -// the value zero if a is zero. The least significant bit is index one. +/* Returns: the index of the least significant 1-bit in a, or + * the value zero if a is zero. The least significant bit is index one. + */ si_int __ffsti2(ti_int a) Modified: compiler-rt/trunk/lib/fixunsdfdi.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/fixunsdfdi.c?rev=78152&r1=78151&r2=78152&view=diff ============================================================================== --- compiler-rt/trunk/lib/fixunsdfdi.c (original) +++ compiler-rt/trunk/lib/fixunsdfdi.c Tue Aug 4 23:02:56 2009 @@ -1,27 +1,30 @@ -//===-- fixunsdfdi.c - Implement __fixunsdfdi -----------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __fixunsdfdi for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- fixunsdfdi.c - Implement __fixunsdfdi -----------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __fixunsdfdi for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #include "int_lib.h" -// Returns: convert a to a unsigned long long, rounding toward zero. -// Negative values all become zero. +/* Returns: convert a to a unsigned long long, rounding toward zero. + * Negative values all become zero. + */ -// Assumption: double is a IEEE 64 bit floating point type -// du_int is a 64 bit integral type -// value in double is representable in du_int or is negative -// (no range checking performed) +/* Assumption: double is a IEEE 64 bit floating point type + * du_int is a 64 bit integral type + * value in double is representable in du_int or is negative + * (no range checking performed) + */ -// seee eeee eeee mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm +/* seee eeee eeee mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm */ du_int __fixunsdfdi(double a) Modified: compiler-rt/trunk/lib/fixunsdfsi.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/fixunsdfsi.c?rev=78152&r1=78151&r2=78152&view=diff ============================================================================== --- compiler-rt/trunk/lib/fixunsdfsi.c (original) +++ compiler-rt/trunk/lib/fixunsdfsi.c Tue Aug 4 23:02:56 2009 @@ -1,27 +1,30 @@ -//===-- fixunsdfsi.c - Implement __fixunsdfsi -----------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __fixunsdfsi for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- fixunsdfsi.c - Implement __fixunsdfsi -----------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __fixunsdfsi for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #include "int_lib.h" -// Returns: convert a to a unsigned int, rounding toward zero. -// Negative values all become zero. +/* Returns: convert a to a unsigned int, rounding toward zero. + * Negative values all become zero. + */ -// Assumption: double is a IEEE 64 bit floating point type -// su_int is a 32 bit integral type -// value in double is representable in su_int or is negative -// (no range checking performed) +/* Assumption: double is a IEEE 64 bit floating point type + * su_int is a 32 bit integral type + * value in double is representable in su_int or is negative + * (no range checking performed) + */ -// seee eeee eeee mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm +/* seee eeee eeee mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm */ su_int __fixunsdfsi(double a) Modified: compiler-rt/trunk/lib/fixunsdfti.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/fixunsdfti.c?rev=78152&r1=78151&r2=78152&view=diff ============================================================================== --- compiler-rt/trunk/lib/fixunsdfti.c (original) +++ compiler-rt/trunk/lib/fixunsdfti.c Tue Aug 4 23:02:56 2009 @@ -1,29 +1,32 @@ -//===-- fixunsdfti.c - Implement __fixunsdfti -----------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __fixunsdfti for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- fixunsdfti.c - Implement __fixunsdfti -----------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __fixunsdfti for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #if __x86_64 #include "int_lib.h" -// Returns: convert a to a unsigned long long, rounding toward zero. -// Negative values all become zero. +/* Returns: convert a to a unsigned long long, rounding toward zero. + * Negative values all become zero. + */ + +/* Assumption: double is a IEEE 64 bit floating point type + * tu_int is a 64 bit integral type + * value in double is representable in tu_int or is negative + * (no range checking performed) + */ -// Assumption: double is a IEEE 64 bit floating point type -// tu_int is a 64 bit integral type -// value in double is representable in tu_int or is negative -// (no range checking performed) - -// seee eeee eeee mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm +/* seee eeee eeee mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm */ tu_int __fixunsdfti(double a) Modified: compiler-rt/trunk/lib/fixunssfdi.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/fixunssfdi.c?rev=78152&r1=78151&r2=78152&view=diff ============================================================================== --- compiler-rt/trunk/lib/fixunssfdi.c (original) +++ compiler-rt/trunk/lib/fixunssfdi.c Tue Aug 4 23:02:56 2009 @@ -1,27 +1,30 @@ -//===-- fixunssfdi.c - Implement __fixunssfdi -----------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __fixunssfdi for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- fixunssfdi.c - Implement __fixunssfdi -----------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __fixunssfdi for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #include "int_lib.h" -// Returns: convert a to a unsigned long long, rounding toward zero. -// Negative values all become zero. +/* Returns: convert a to a unsigned long long, rounding toward zero. + * Negative values all become zero. + */ -// Assumption: float is a IEEE 32 bit floating point type -// du_int is a 64 bit integral type -// value in float is representable in du_int or is negative -// (no range checking performed) +/* Assumption: float is a IEEE 32 bit floating point type + * du_int is a 64 bit integral type + * value in float is representable in du_int or is negative + * (no range checking performed) + */ -// seee eeee emmm mmmm mmmm mmmm mmmm mmmm +/* seee eeee emmm mmmm mmmm mmmm mmmm mmmm */ du_int __fixunssfdi(float a) Modified: compiler-rt/trunk/lib/fixunssfsi.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/fixunssfsi.c?rev=78152&r1=78151&r2=78152&view=diff ============================================================================== --- compiler-rt/trunk/lib/fixunssfsi.c (original) +++ compiler-rt/trunk/lib/fixunssfsi.c Tue Aug 4 23:02:56 2009 @@ -1,27 +1,30 @@ -//===-- fixunssfsi.c - Implement __fixunssfsi -----------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __fixunssfsi for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- fixunssfsi.c - Implement __fixunssfsi -----------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __fixunssfsi for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #include "int_lib.h" -// Returns: convert a to a unsigned int, rounding toward zero. -// Negative values all become zero. +/* Returns: convert a to a unsigned int, rounding toward zero. + * Negative values all become zero. + */ -// Assumption: float is a IEEE 32 bit floating point type -// su_int is a 32 bit integral type -// value in float is representable in su_int or is negative -// (no range checking performed) +/* Assumption: float is a IEEE 32 bit floating point type + * su_int is a 32 bit integral type + * value in float is representable in su_int or is negative + * (no range checking performed) + */ -// seee eeee emmm mmmm mmmm mmmm mmmm mmmm +/* seee eeee emmm mmmm mmmm mmmm mmmm mmmm */ su_int __fixunssfsi(float a) Modified: compiler-rt/trunk/lib/fixunssfti.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/fixunssfti.c?rev=78152&r1=78151&r2=78152&view=diff ============================================================================== --- compiler-rt/trunk/lib/fixunssfti.c (original) +++ compiler-rt/trunk/lib/fixunssfti.c Tue Aug 4 23:02:56 2009 @@ -1,29 +1,32 @@ -//===-- fixunssfti.c - Implement __fixunssfti -----------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __fixunssfti for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- fixunssfti.c - Implement __fixunssfti -----------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __fixunssfti for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #if __x86_64 #include "int_lib.h" -// Returns: convert a to a unsigned long long, rounding toward zero. -// Negative values all become zero. +/* Returns: convert a to a unsigned long long, rounding toward zero. + * Negative values all become zero. + */ + +/* Assumption: float is a IEEE 32 bit floating point type + * tu_int is a 64 bit integral type + * value in float is representable in tu_int or is negative + * (no range checking performed) + */ -// Assumption: float is a IEEE 32 bit floating point type -// tu_int is a 64 bit integral type -// value in float is representable in tu_int or is negative -// (no range checking performed) - -// seee eeee emmm mmmm mmmm mmmm mmmm mmmm +// seee eeee emmm mmmm mmmm mmmm mmmm mmmm */ tu_int __fixunssfti(float a) Modified: compiler-rt/trunk/lib/fixunsxfdi.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/fixunsxfdi.c?rev=78152&r1=78151&r2=78152&view=diff ============================================================================== --- compiler-rt/trunk/lib/fixunsxfdi.c (original) +++ compiler-rt/trunk/lib/fixunsxfdi.c Tue Aug 4 23:02:56 2009 @@ -1,30 +1,34 @@ -//===-- fixunsxfdi.c - Implement __fixunsxfdi -----------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __fixunsxfdi for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- fixunsxfdi.c - Implement __fixunsxfdi -----------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __fixunsxfdi for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #if !_ARCH_PPC #include "int_lib.h" -// Returns: convert a to a unsigned long long, rounding toward zero. -// Negative values all become zero. - -// Assumption: long double is an intel 80 bit floating point type padded with 6 bytes -// du_int is a 64 bit integral type -// value in long double is representable in du_int or is negative -// (no range checking performed) - -// gggg gggg gggg gggg gggg gggg gggg gggg | gggg gggg gggg gggg seee eeee eeee eeee | -// 1mmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm +/* Returns: convert a to a unsigned long long, rounding toward zero. + * Negative values all become zero. + */ + +/* Assumption: long double is an intel 80 bit floating point type padded with 6 bytes + * du_int is a 64 bit integral type + * value in long double is representable in du_int or is negative + * (no range checking performed) + */ + +/* gggg gggg gggg gggg gggg gggg gggg gggg | gggg gggg gggg gggg seee eeee eeee eeee | + * 1mmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm + */ du_int __fixunsxfdi(long double a) Modified: compiler-rt/trunk/lib/fixunsxfti.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/fixunsxfti.c?rev=78152&r1=78151&r2=78152&view=diff ============================================================================== --- compiler-rt/trunk/lib/fixunsxfti.c (original) +++ compiler-rt/trunk/lib/fixunsxfti.c Tue Aug 4 23:02:56 2009 @@ -1,30 +1,34 @@ -//===-- fixunsxfti.c - Implement __fixunsxfti -----------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __fixunsxfti for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- fixunsxfti.c - Implement __fixunsxfti -----------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __fixunsxfti for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #if __x86_64 #include "int_lib.h" -// Returns: convert a to a unsigned long long, rounding toward zero. -// Negative values all become zero. - -// Assumption: long double is an intel 80 bit floating point type padded with 6 bytes -// tu_int is a 64 bit integral type -// value in long double is representable in tu_int or is negative -// (no range checking performed) - -// gggg gggg gggg gggg gggg gggg gggg gggg | gggg gggg gggg gggg seee eeee eeee eeee | -// 1mmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm +/* Returns: convert a to a unsigned long long, rounding toward zero. + * Negative values all become zero. + */ + +/* Assumption: long double is an intel 80 bit floating point type padded with 6 bytes + * tu_int is a 64 bit integral type + * value in long double is representable in tu_int or is negative + * (no range checking performed) + */ + +/* gggg gggg gggg gggg gggg gggg gggg gggg | gggg gggg gggg gggg seee eeee eeee eeee | + * 1mmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm + */ tu_int __fixunsxfti(long double a) Modified: compiler-rt/trunk/lib/fixxfdi.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/fixxfdi.c?rev=78152&r1=78151&r2=78152&view=diff ============================================================================== --- compiler-rt/trunk/lib/fixxfdi.c (original) +++ compiler-rt/trunk/lib/fixxfdi.c Tue Aug 4 23:02:56 2009 @@ -1,28 +1,31 @@ -//===-- fixxfdi.c - Implement __fixxfdi -----------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __fixxfdi for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- fixxfdi.c - Implement __fixxfdi -----------------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __fixxfdi for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #if !_ARCH_PPC #include "int_lib.h" -// Returns: convert a to a signed long long, rounding toward zero. +/* Returns: convert a to a signed long long, rounding toward zero. */ -// Assumption: long double is an intel 80 bit floating point type padded with 6 bytes -// su_int is a 32 bit integral type -// value in long double is representable in di_int (no range checking performed) - -// gggg gggg gggg gggg gggg gggg gggg gggg | gggg gggg gggg gggg seee eeee eeee eeee | -// 1mmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm +/* Assumption: long double is an intel 80 bit floating point type padded with 6 bytes + * su_int is a 32 bit integral type + * value in long double is representable in di_int (no range checking performed) + */ + +/* gggg gggg gggg gggg gggg gggg gggg gggg | gggg gggg gggg gggg seee eeee eeee eeee | + * 1mmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm + */ di_int __fixxfdi(long double a) Modified: compiler-rt/trunk/lib/fixxfti.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/fixxfti.c?rev=78152&r1=78151&r2=78152&view=diff ============================================================================== --- compiler-rt/trunk/lib/fixxfti.c (original) +++ compiler-rt/trunk/lib/fixxfti.c Tue Aug 4 23:02:56 2009 @@ -1,28 +1,31 @@ -//===-- fixxfti.c - Implement __fixxfti -----------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __fixxfti for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- fixxfti.c - Implement __fixxfti -----------------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __fixxfti for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #if __x86_64 #include "int_lib.h" -// Returns: convert a to a signed long long, rounding toward zero. +/* Returns: convert a to a signed long long, rounding toward zero. */ -// Assumption: long double is an intel 80 bit floating point type padded with 6 bytes -// su_int is a 32 bit integral type -// value in long double is representable in ti_int (no range checking performed) - -// gggg gggg gggg gggg gggg gggg gggg gggg | gggg gggg gggg gggg seee eeee eeee eeee | -// 1mmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm +/* Assumption: long double is an intel 80 bit floating point type padded with 6 bytes + * su_int is a 32 bit integral type + * value in long double is representable in ti_int (no range checking performed) + */ + +/* gggg gggg gggg gggg gggg gggg gggg gggg | gggg gggg gggg gggg seee eeee eeee eeee | + * 1mmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm + */ ti_int __fixxfti(long double a) Modified: compiler-rt/trunk/lib/floattixf.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/floattixf.c?rev=78152&r1=78151&r2=78152&view=diff ============================================================================== --- compiler-rt/trunk/lib/floattixf.c (original) +++ compiler-rt/trunk/lib/floattixf.c Tue Aug 4 23:02:56 2009 @@ -1,28 +1,31 @@ -//===-- floattixf.c - Implement __floattixf -------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __floattixf for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- floattixf.c - Implement __floattixf -------------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __floattixf for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #if __x86_64 #include "int_lib.h" #include -// Returns: convert a to a long double, rounding toward even. +/* Returns: convert a to a long double, rounding toward even. */ -// Assumption: long double is a IEEE 80 bit floating point type padded to 128 bits -// ti_int is a 128 bit integral type - -// gggg gggg gggg gggg gggg gggg gggg gggg | gggg gggg gggg gggg seee eeee eeee eeee | -// 1mmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm +/* Assumption: long double is a IEEE 80 bit floating point type padded to 128 bits + * ti_int is a 128 bit integral type + */ + +/* gggg gggg gggg gggg gggg gggg gggg gggg | gggg gggg gggg gggg seee eeee eeee eeee | + * 1mmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm + */ si_int __clzti2(ti_int a); @@ -38,13 +41,14 @@ int e = sd - 1; // exponent if (sd > LDBL_MANT_DIG) { - // start: 0000000000000000000001xxxxxxxxxxxxxxxxxxxxxxPQxxxxxxxxxxxxxxxxxx - // finish: 000000000000000000000000000000000000001xxxxxxxxxxxxxxxxxxxxxxPQR - // 12345678901234567890123456 - // 1 = msb 1 bit - // P = bit LDBL_MANT_DIG-1 bits to the right of 1 - // Q = bit LDBL_MANT_DIG bits to the right of 1 - // R = "or" of all bits to the right of Q + /* start: 0000000000000000000001xxxxxxxxxxxxxxxxxxxxxxPQxxxxxxxxxxxxxxxxxx + * finish: 000000000000000000000000000000000000001xxxxxxxxxxxxxxxxxxxxxxPQR + * 12345678901234567890123456 + * 1 = msb 1 bit + * P = bit LDBL_MANT_DIG-1 bits to the right of 1 + * Q = bit LDBL_MANT_DIG bits to the right of 1 + * R = "or" of all bits to the right of Q + */ switch (sd) { case LDBL_MANT_DIG + 1: @@ -56,27 +60,27 @@ a = ((tu_int)a >> (sd - (LDBL_MANT_DIG+2))) | ((a & ((tu_int)(-1) >> ((N + LDBL_MANT_DIG+2) - sd))) != 0); }; - // finish: - a |= (a & 4) != 0; // Or P into R - ++a; // round - this step may add a significant bit - a >>= 2; // dump Q and R - // a is now rounded to LDBL_MANT_DIG or LDBL_MANT_DIG+1 bits + /* finish: */ + a |= (a & 4) != 0; /* Or P into R */ + ++a; /* round - this step may add a significant bit */ + a >>= 2; /* dump Q and R */ + /* a is now rounded to LDBL_MANT_DIG or LDBL_MANT_DIG+1 bits */ if (a & ((tu_int)1 << LDBL_MANT_DIG)) { a >>= 1; ++e; } - // a is now rounded to LDBL_MANT_DIG bits + /* a is now rounded to LDBL_MANT_DIG bits */ } else { a <<= (LDBL_MANT_DIG - sd); - // a is now rounded to LDBL_MANT_DIG bits + /* a is now rounded to LDBL_MANT_DIG bits */ } long_double_bits fb; - fb.u.high.low = ((su_int)s & 0x8000) | // sign - (e + 16383); // exponent - fb.u.low.all = (du_int)a; // mantissa + fb.u.high.low = ((su_int)s & 0x8000) | /* sign */ + (e + 16383); /* exponent */ + fb.u.low.all = (du_int)a; /* mantissa */ return fb.f; } Modified: compiler-rt/trunk/lib/floatuntixf.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/floatuntixf.c?rev=78152&r1=78151&r2=78152&view=diff ============================================================================== --- compiler-rt/trunk/lib/floatuntixf.c (original) +++ compiler-rt/trunk/lib/floatuntixf.c Tue Aug 4 23:02:56 2009 @@ -1,28 +1,31 @@ -//===-- floatuntixf.c - Implement __floatuntixf ---------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __floatuntixf for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- floatuntixf.c - Implement __floatuntixf ---------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __floatuntixf for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #if __x86_64 #include "int_lib.h" #include -// Returns: convert a to a long double, rounding toward even. +/* Returns: convert a to a long double, rounding toward even. */ -// Assumption: long double is a IEEE 80 bit floating point type padded to 128 bits -// tu_int is a 128 bit integral type - -// gggg gggg gggg gggg gggg gggg gggg gggg | gggg gggg gggg gggg seee eeee eeee eeee | -// 1mmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm +/* Assumption: long double is a IEEE 80 bit floating point type padded to 128 bits + * tu_int is a 128 bit integral type + */ + +/* gggg gggg gggg gggg gggg gggg gggg gggg | gggg gggg gggg gggg seee eeee eeee eeee | + * 1mmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm + */ si_int __clzti2(ti_int a); @@ -32,17 +35,18 @@ if (a == 0) return 0.0; const unsigned N = sizeof(tu_int) * CHAR_BIT; - int sd = N - __clzti2(a); // number of significant digits - int e = sd - 1; // exponent + int sd = N - __clzti2(a); /* number of significant digits */ + int e = sd - 1; /* exponent */ if (sd > LDBL_MANT_DIG) { - // start: 0000000000000000000001xxxxxxxxxxxxxxxxxxxxxxPQxxxxxxxxxxxxxxxxxx - // finish: 000000000000000000000000000000000000001xxxxxxxxxxxxxxxxxxxxxxPQR - // 12345678901234567890123456 - // 1 = msb 1 bit - // P = bit LDBL_MANT_DIG-1 bits to the right of 1 - // Q = bit LDBL_MANT_DIG bits to the right of 1 - // R = "or" of all bits to the right of Q + /* start: 0000000000000000000001xxxxxxxxxxxxxxxxxxxxxxPQxxxxxxxxxxxxxxxxxx + * finish: 000000000000000000000000000000000000001xxxxxxxxxxxxxxxxxxxxxxPQR + * 12345678901234567890123456 + * 1 = msb 1 bit + * P = bit LDBL_MANT_DIG-1 bits to the right of 1 + * Q = bit LDBL_MANT_DIG bits to the right of 1 + * R = "or" of all bits to the right of Q + */ switch (sd) { case LDBL_MANT_DIG + 1: @@ -54,26 +58,26 @@ a = (a >> (sd - (LDBL_MANT_DIG+2))) | ((a & ((tu_int)(-1) >> ((N + LDBL_MANT_DIG+2) - sd))) != 0); }; - // finish: - a |= (a & 4) != 0; // Or P into R - ++a; // round - this step may add a significant bit - a >>= 2; // dump Q and R - // a is now rounded to LDBL_MANT_DIG or LDBL_MANT_DIG+1 bits + /* finish: */ + a |= (a & 4) != 0; /* Or P into R */ + ++a; /* round - this step may add a significant bit */ + a >>= 2; /* dump Q and R */ + /* a is now rounded to LDBL_MANT_DIG or LDBL_MANT_DIG+1 bits */ if (a & ((tu_int)1 << LDBL_MANT_DIG)) { a >>= 1; ++e; } - // a is now rounded to LDBL_MANT_DIG bits + /* a is now rounded to LDBL_MANT_DIG bits */ } else { a <<= (LDBL_MANT_DIG - sd); - // a is now rounded to LDBL_MANT_DIG bits + /* a is now rounded to LDBL_MANT_DIG bits */ } long_double_bits fb; - fb.u.high.low = (e + 16383); // exponent - fb.u.low.all = (du_int)a; // mantissa + fb.u.high.low = (e + 16383); /* exponent */ + fb.u.low.all = (du_int)a; /* mantissa */ return fb.f; } Modified: compiler-rt/trunk/lib/gcc_personality_v0.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/gcc_personality_v0.c?rev=78152&r1=78151&r2=78152&view=diff ============================================================================== --- compiler-rt/trunk/lib/gcc_personality_v0.c (original) +++ compiler-rt/trunk/lib/gcc_personality_v0.c Tue Aug 4 23:02:56 2009 @@ -1,20 +1,23 @@ -//===-- gcc_personality_v0.c - Implement __gcc_personality_v0 -------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// +/* ===-- gcc_personality_v0.c - Implement __gcc_personality_v0 -------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + */ #include #include #include -// -// _Unwind_* stuff based on C++ ABI public documentation -// http://refspecs.freestandards.org/abi-eh-1.21.html -// +/* + * _Unwind_* stuff based on C++ ABI public documentation + * http://refspecs.freestandards.org/abi-eh-1.21.html + */ + typedef enum { _URC_NO_REASON = 0, _URC_FOREIGN_EXCEPTION_CAUGHT = 1, @@ -52,11 +55,12 @@ extern uintptr_t _Unwind_GetRegionStart(_Unwind_Context_t context); -// -// Pointer encodings documented at: -// http://refspecs.freestandards.org/LSB_1.3.0/gLSB/gLSB/ehframehdr.html -// -#define DW_EH_PE_omit 0xff // no data follows +/* + * Pointer encodings documented at: + * http://refspecs.freestandards.org/LSB_1.3.0/gLSB/gLSB/ehframehdr.html + */ + +#define DW_EH_PE_omit 0xff /* no data follows */ #define DW_EH_PE_absptr 0x00 #define DW_EH_PE_uleb128 0x01 @@ -73,11 +77,11 @@ #define DW_EH_PE_datarel 0x30 #define DW_EH_PE_funcrel 0x40 #define DW_EH_PE_aligned 0x50 -#define DW_EH_PE_indirect 0x80 // gcc extension +#define DW_EH_PE_indirect 0x80 /* gcc extension */ -// read a uleb128 encoded value and advance pointer +/* read a uleb128 encoded value and advance pointer */ static uintptr_t readULEB128(const uint8_t** data) { uintptr_t result = 0; @@ -93,7 +97,7 @@ return result; } -// read a pointer encoded value and advance pointer +/* read a pointer encoded value and advance pointer */ static uintptr_t readEncodedPointer(const uint8_t** data, uint8_t encoding) { const uint8_t* p = *data; @@ -102,7 +106,7 @@ if ( encoding == DW_EH_PE_omit ) return 0; - // first get value + /* first get value */ switch (encoding & 0x0F) { case DW_EH_PE_absptr: result = *((uintptr_t*)p); @@ -137,15 +141,15 @@ break; case DW_EH_PE_sleb128: default: - // not supported + /* not supported */ abort(); break; } - // then add relative offset + /* then add relative offset */ switch ( encoding & 0x70 ) { case DW_EH_PE_absptr: - // do nothing + /* do nothing */ break; case DW_EH_PE_pcrel: result += (uintptr_t)(*data); @@ -155,12 +159,12 @@ case DW_EH_PE_funcrel: case DW_EH_PE_aligned: default: - // not supported + /* not supported */ abort(); break; } - // then apply indirection + /* then apply indirection */ if (encoding & DW_EH_PE_indirect) { result = *((uintptr_t*)result); } @@ -170,24 +174,25 @@ } -// -// The C compiler makes references to __gcc_personality_v0 in -// the dwarf unwind information for translation units that use -// __attribute__((cleanup(xx))) on local variables. -// This personality routine is called by the system unwinder -// on each frame as the stack is unwound during a C++ exception -// throw through a C function compiled with -fexceptions. -// +/* + * The C compiler makes references to __gcc_personality_v0 in + * the dwarf unwind information for translation units that use + * __attribute__((cleanup(xx))) on local variables. + * This personality routine is called by the system unwinder + * on each frame as the stack is unwound during a C++ exception + * throw through a C function compiled with -fexceptions. + */ + _Unwind_Reason_Code __gcc_personality_v0(int version, _Unwind_Action actions, uint64_t exceptionClass, struct _Unwind_Exception* exceptionObject, _Unwind_Context_t context) { - // Since C does not have catch clauses, there is nothing to do during - // phase 1 (the search phase). + /* Since C does not have catch clauses, there is nothing to do during */ + /* phase 1 (the search phase). */ if ( actions & _UA_SEARCH_PHASE ) return _URC_CONTINUE_UNWIND; - // There is nothing to do if there is no LSDA for this frame. + /* There is nothing to do if there is no LSDA for this frame. */ const uint8_t* lsda = _Unwind_GetLanguageSpecificData(context); if ( lsda == NULL ) return _URC_CONTINUE_UNWIND; @@ -196,7 +201,7 @@ uintptr_t funcStart = _Unwind_GetRegionStart(context); uintptr_t pcOffset = pc - funcStart; - // Parse LSDA header. + /* Parse LSDA header. */ uint8_t lpStartEncoding = *lsda++; if (lpStartEncoding != DW_EH_PE_omit) { readEncodedPointer(&lsda, lpStartEncoding); @@ -205,7 +210,7 @@ if (ttypeEncoding != DW_EH_PE_omit) { readULEB128(&lsda); } - // Walk call-site table looking for range that includes current PC. + /* Walk call-site table looking for range that includes current PC. */ uint8_t callSiteEncoding = *lsda++; uint32_t callSiteTableLength = readULEB128(&lsda); const uint8_t* callSiteTableStart = lsda; @@ -215,14 +220,15 @@ uintptr_t start = readEncodedPointer(&p, callSiteEncoding); uintptr_t length = readEncodedPointer(&p, callSiteEncoding); uintptr_t landingPad = readEncodedPointer(&p, callSiteEncoding); - readULEB128(&p); // action value not used for C code + readULEB128(&p); /* action value not used for C code */ if ( landingPad == 0 ) - continue; // no landing pad for this entry + continue; /* no landing pad for this entry */ if ( (start <= pcOffset) && (pcOffset < (start+length)) ) { - // Found landing pad for the PC. - // Set Instruction Pointer to so we re-enter function - // at landing pad. The landing pad is created by the compiler - // to take two parameters in registers. + /* Found landing pad for the PC. + * Set Instruction Pointer to so we re-enter function + * at landing pad. The landing pad is created by the compiler + * to take two parameters in registers. + */ _Unwind_SetGR(context, __builtin_eh_return_data_regno(0), (uintptr_t)exceptionObject); _Unwind_SetGR(context, __builtin_eh_return_data_regno(1), 0); @@ -231,7 +237,7 @@ } } - // No landing pad found, continue unwinding. + /* No landing pad found, continue unwinding. */ return _URC_CONTINUE_UNWIND; } Modified: compiler-rt/trunk/lib/lshrdi3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/lshrdi3.c?rev=78152&r1=78151&r2=78152&view=diff ============================================================================== --- compiler-rt/trunk/lib/lshrdi3.c (original) +++ compiler-rt/trunk/lib/lshrdi3.c Tue Aug 4 23:02:56 2009 @@ -1,21 +1,22 @@ -//===-- lshrdi3.c - Implement __lshrdi3 -----------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __lshrdi3 for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- lshrdi3.c - Implement __lshrdi3 -----------------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __lshrdi3 for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #include "int_lib.h" -// Returns: logical a >> b +/* Returns: logical a >> b */ -// Precondition: 0 <= b < bits_in_dword +/* Precondition: 0 <= b < bits_in_dword */ di_int __lshrdi3(di_int a, si_int b) @@ -24,12 +25,12 @@ udwords input; udwords result; input.all = a; - if (b & bits_in_word) // bits_in_word <= b < bits_in_dword + if (b & bits_in_word) /* bits_in_word <= b < bits_in_dword */ { result.high = 0; result.low = input.high >> (b - bits_in_word); } - else // 0 <= b < bits_in_word + else /* 0 <= b < bits_in_word */ { if (b == 0) return a; Modified: compiler-rt/trunk/lib/lshrti3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/lshrti3.c?rev=78152&r1=78151&r2=78152&view=diff ============================================================================== --- compiler-rt/trunk/lib/lshrti3.c (original) +++ compiler-rt/trunk/lib/lshrti3.c Tue Aug 4 23:02:56 2009 @@ -1,23 +1,24 @@ -//===-- lshrti3.c - Implement __lshrti3 -----------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __lshrti3 for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- lshrti3.c - Implement __lshrti3 -----------------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __lshrti3 for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #if __x86_64 #include "int_lib.h" -// Returns: logical a >> b +/* Returns: logical a >> b */ -// Precondition: 0 <= b < bits_in_tword +/* Precondition: 0 <= b < bits_in_tword */ ti_int __lshrti3(ti_int a, si_int b) @@ -26,12 +27,12 @@ utwords input; utwords result; input.all = a; - if (b & bits_in_dword) // bits_in_dword <= b < bits_in_tword + if (b & bits_in_dword) /* bits_in_dword <= b < bits_in_tword */ { result.high = 0; result.low = input.high >> (b - bits_in_dword); } - else // 0 <= b < bits_in_dword + else /* 0 <= b < bits_in_dword */ { if (b == 0) return a; Modified: compiler-rt/trunk/lib/negdi2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/negdi2.c?rev=78152&r1=78151&r2=78152&view=diff ============================================================================== --- compiler-rt/trunk/lib/negdi2.c (original) +++ compiler-rt/trunk/lib/negdi2.c Tue Aug 4 23:02:56 2009 @@ -1,24 +1,26 @@ -//===-- negdi2.c - Implement __negdi2 -------------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __negdi2 for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- negdi2.c - Implement __negdi2 -------------------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __negdi2 for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #include "int_lib.h" -// Returns: -a +/* Returns: -a */ di_int __negdi2(di_int a) { - // Note: this routine is here for API compatibility; any sane compiler - // should expand it inline. + /* Note: this routine is here for API compatibility; any sane compiler + * should expand it inline. + */ return -a; } Modified: compiler-rt/trunk/lib/negti2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/negti2.c?rev=78152&r1=78151&r2=78152&view=diff ============================================================================== --- compiler-rt/trunk/lib/negti2.c (original) +++ compiler-rt/trunk/lib/negti2.c Tue Aug 4 23:02:56 2009 @@ -1,27 +1,29 @@ -//===-- negti2.c - Implement __negti2 -------------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __negti2 for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- negti2.c - Implement __negti2 -------------------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __negti2 for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #if __x86_64 #include "int_lib.h" -// Returns: -a +/* Returns: -a */ ti_int __negti2(ti_int a) { - // Note: this routine is here for API compatibility; any sane compiler - // should expand it inline. + /* Note: this routine is here for API compatibility; any sane compiler + * should expand it inline. + */ return -a; } Modified: compiler-rt/trunk/lib/negvdi2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/negvdi2.c?rev=78152&r1=78151&r2=78152&view=diff ============================================================================== --- compiler-rt/trunk/lib/negvdi2.c (original) +++ compiler-rt/trunk/lib/negvdi2.c Tue Aug 4 23:02:56 2009 @@ -1,22 +1,23 @@ -//===-- negvdi2.c - Implement __negvdi2 -----------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __negvdi2 for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- negvdi2.c - Implement __negvdi2 -----------------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __negvdi2 for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #include "int_lib.h" #include -// Returns: -a +/* Returns: -a */ -// Effects: aborts if -a overflows +/* Effects: aborts if -a overflows */ di_int __negvdi2(di_int a) Modified: compiler-rt/trunk/lib/negvsi2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/negvsi2.c?rev=78152&r1=78151&r2=78152&view=diff ============================================================================== --- compiler-rt/trunk/lib/negvsi2.c (original) +++ compiler-rt/trunk/lib/negvsi2.c Tue Aug 4 23:02:56 2009 @@ -1,22 +1,23 @@ -//===-- negvsi2.c - Implement __negvsi2 -----------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __negvsi2 for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- negvsi2.c - Implement __negvsi2 -----------------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __negvsi2 for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #include "int_lib.h" #include -// Returns: -a +/* Returns: -a */ -// Effects: aborts if -a overflows +/* Effects: aborts if -a overflows */ si_int __negvsi2(si_int a) Modified: compiler-rt/trunk/lib/subvdi3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/subvdi3.c?rev=78152&r1=78151&r2=78152&view=diff ============================================================================== --- compiler-rt/trunk/lib/subvdi3.c (original) +++ compiler-rt/trunk/lib/subvdi3.c Tue Aug 4 23:02:56 2009 @@ -1,22 +1,23 @@ -//===-- subvdi3.c - Implement __subvdi3 -----------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __subvdi3 for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- subvdi3.c - Implement __subvdi3 -----------------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __subvdi3 for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #include "int_lib.h" #include -// Returns: a - b +/* Returns: a - b */ -// Effects: aborts if a - b overflows +/* Effects: aborts if a - b overflows */ di_int __subvdi3(di_int a, di_int b) Modified: compiler-rt/trunk/lib/subvsi3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/subvsi3.c?rev=78152&r1=78151&r2=78152&view=diff ============================================================================== --- compiler-rt/trunk/lib/subvsi3.c (original) +++ compiler-rt/trunk/lib/subvsi3.c Tue Aug 4 23:02:56 2009 @@ -1,22 +1,23 @@ -//===-- subvsi3.c - Implement __subvsi3 -----------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __subvsi3 for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- subvsi3.c - Implement __subvsi3 -----------------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __subvsi3 for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #include "int_lib.h" #include -// Returns: a - b +/* Returns: a - b */ -// Effects: aborts if a - b overflows +/* Effects: aborts if a - b overflows */ si_int __subvsi3(si_int a, si_int b) Modified: compiler-rt/trunk/lib/subvti3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/subvti3.c?rev=78152&r1=78151&r2=78152&view=diff ============================================================================== --- compiler-rt/trunk/lib/subvti3.c (original) +++ compiler-rt/trunk/lib/subvti3.c Tue Aug 4 23:02:56 2009 @@ -1,24 +1,25 @@ -//===-- subvti3.c - Implement __subvti3 -----------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __subvti3 for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- subvti3.c - Implement __subvti3 -----------------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __subvti3 for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #if __x86_64 #include "int_lib.h" #include -// Returns: a - b +/* Returns: a - b */ -// Effects: aborts if a - b overflows +/* Effects: aborts if a - b overflows */ ti_int __subvti3(ti_int a, ti_int b) Modified: compiler-rt/trunk/lib/trampoline_setup.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/trampoline_setup.c?rev=78152&r1=78151&r2=78152&view=diff ============================================================================== --- compiler-rt/trunk/lib/trampoline_setup.c (original) +++ compiler-rt/trunk/lib/trampoline_setup.c Tue Aug 4 23:02:56 2009 @@ -1,46 +1,48 @@ -//===----- trampoline_setup.c - Implement __trampoline_setup -------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// +/* ===----- trampoline_setup.c - Implement __trampoline_setup -------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + */ #include #include extern void __clear_cache(void* start, void* end); -// -// The ppc compiler generates calls to __trampoline_setup() when creating -// trampoline functions on the stack for use with nested functions. -// This function creates a custom 40-byte trampoline function on the stack -// which loads r11 with a pointer to the outer function's locals -// and then jumps to the target nested function. -// +/* + * The ppc compiler generates calls to __trampoline_setup() when creating + * trampoline functions on the stack for use with nested functions. + * This function creates a custom 40-byte trampoline function on the stack + * which loads r11 with a pointer to the outer function's locals + * and then jumps to the target nested function. + */ + #if __ppc__ void __trampoline_setup(uint32_t* trampOnStack, int trampSizeAllocated, const void* realFunc, void* localsPtr) { - // should never happen, but if compiler did not allocate - // enough space on stack for the trampoline, abort + /* should never happen, but if compiler did not allocate */ + /* enough space on stack for the trampoline, abort */ if ( trampSizeAllocated < 40 ) abort(); - // create trampoline - trampOnStack[0] = 0x7c0802a6; // mflr r0 - trampOnStack[1] = 0x4800000d; // bl Lbase + /* create trampoline */ + trampOnStack[0] = 0x7c0802a6; /* mflr r0 */ + trampOnStack[1] = 0x4800000d; /* bl Lbase */ trampOnStack[2] = (uint32_t)realFunc; trampOnStack[3] = (uint32_t)localsPtr; - trampOnStack[4] = 0x7d6802a6; // Lbase: mflr r11 - trampOnStack[5] = 0x818b0000; // lwz r12,0(r11) - trampOnStack[6] = 0x7c0803a6; // mtlr r0 - trampOnStack[7] = 0x7d8903a6; // mtctr r12 - trampOnStack[8] = 0x816b0004; // lwz r11,4(r11) - trampOnStack[9] = 0x4e800420; // bctr + trampOnStack[4] = 0x7d6802a6; /* Lbase: mflr r11 */ + trampOnStack[5] = 0x818b0000; /* lwz r12,0(r11) */ + trampOnStack[6] = 0x7c0803a6; /* mtlr r0 */ + trampOnStack[7] = 0x7d8903a6; /* mtctr r12 */ + trampOnStack[8] = 0x816b0004; /* lwz r11,4(r11) */ + trampOnStack[9] = 0x4e800420; /* bctr */ - // clear instruction cache + /* clear instruction cache */ __clear_cache(trampOnStack, &trampOnStack[10]); } -#endif // __ppc__ +#endif /* __ppc__ */ From clattner at apple.com Tue Aug 4 23:07:33 2009 From: clattner at apple.com (Chris Lattner) Date: Tue, 4 Aug 2009 21:07:33 -0700 Subject: [llvm-commits] [PATCH] Dump with LI Indices In-Reply-To: <200908041655.22914.dag@cray.com> References: <200907301710.32176.dag@cray.com> <200908040846.35455.dag@cray.com> <200908041655.22914.dag@cray.com> Message-ID: On Aug 4, 2009, at 2:55 PM, David Greene wrote: > On Tuesday 04 August 2009 12:44, Chris Lattner wrote: >> On Aug 4, 2009, at 6:46 AM, David Greene wrote: >>> On Tuesday 04 August 2009 01:08, Evan Cheng wrote: >>>> I am really not crazy about it especially since it has such a >>>> generic >>>> name Dump.h. But it's not a big deal. >>> >>> I'm open to a better naming. I'm not particulrly fond of Dump.h >>> either. >> >> I still don't understand why you need a general "prefix printer" >> mechanism, instead of just doing a simple helper function in the >> liveintervals code. > > How would you do a helper function? Remember, dumps happen lots of > places > before and after LiveIntervals has run. Are you suggesting that the > MachineFunction and MachineBasicBlock dump routines call directly into > LiveIntervals? If so, then we'll need a flag to tell the dump > routines to > *not* do that. That seems less clean to me. The idea is that we shouldn't have to affect every instance of "dump ()", just add a new DumpWithLiveIntervals() function, and call that instead. There is no reason to have "magic" to make "dump()" itself add extra info. -Chris From resistor at mac.com Tue Aug 4 23:08:42 2009 From: resistor at mac.com (Owen Anderson) Date: Tue, 04 Aug 2009 21:08:42 -0700 Subject: [llvm-commits] [llvm] r78097 - in /llvm/trunk: include/llvm/LLVMContext.h lib/VMCore/Constants.cpp lib/VMCore/LLVMContextImpl.cpp lib/VMCore/LLVMContextImpl.h In-Reply-To: References: <200908042025.n74KPVti018779@zion.cs.uiuc.edu> <23F64AF9-FDE2-436D-8F46-D00EFE1FE871@apple.com> <6EC02354-3DE7-4574-AF07-639DA521F0B7@apple.com> Message-ID: <3DA71DB2-38AA-4F0E-B2E8-84DEE6D92609@mac.com> On Aug 4, 2009, at 8:54 PM, Chris Lattner wrote: > Fine, its implementation is private to vmcore, right? Since it has > to be forward declared in various headers, why not use class? Because MSVC is unhappy if you mix class/struct for the same type. --Owen -------------- next part -------------- A non-text attachment was scrubbed... Name: smime.p7s Type: application/pkcs7-signature Size: 2620 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090804/1ab08fc9/attachment.bin From sabre at nondot.org Tue Aug 4 23:09:32 2009 From: sabre at nondot.org (Chris Lattner) Date: Wed, 05 Aug 2009 04:09:32 -0000 Subject: [llvm-commits] [llvm] r78154 - /llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp Message-ID: <200908050409.n7549ZIq002668@zion.cs.uiuc.edu> Author: lattner Date: Tue Aug 4 23:09:18 2009 New Revision: 78154 URL: http://llvm.org/viewvc/llvm-project?rev=78154&view=rev Log: add a temporary hook to allow reuse of the asmprinter from the disassembler. Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp?rev=78154&r1=78153&r2=78154&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp (original) +++ llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp Tue Aug 4 23:09:18 2009 @@ -1319,6 +1319,9 @@ /// processDebugLoc - Processes the debug information of each machine /// instruction's DebugLoc. void AsmPrinter::processDebugLoc(DebugLoc DL) { + if (!TAI || !DW) + return; + if (TAI->doesSupportDebugInformation() && DW->ShouldEmitDwarfDebug()) { if (!DL.isUnknown()) { DebugLocTuple CurDLT = MF->getDebugLocTuple(DL); From clattner at apple.com Tue Aug 4 23:11:18 2009 From: clattner at apple.com (Chris Lattner) Date: Tue, 4 Aug 2009 21:11:18 -0700 Subject: [llvm-commits] [llvm] r78097 - in /llvm/trunk: include/llvm/LLVMContext.h lib/VMCore/Constants.cpp lib/VMCore/LLVMContextImpl.cpp lib/VMCore/LLVMContextImpl.h In-Reply-To: <3DA71DB2-38AA-4F0E-B2E8-84DEE6D92609@mac.com> References: <200908042025.n74KPVti018779@zion.cs.uiuc.edu> <23F64AF9-FDE2-436D-8F46-D00EFE1FE871@apple.com> <6EC02354-3DE7-4574-AF07-639DA521F0B7@apple.com> <3DA71DB2-38AA-4F0E-B2E8-84DEE6D92609@mac.com> Message-ID: <0F5BCBB8-7351-4C60-B72E-3AABDFCFB3AE@apple.com> On Aug 4, 2009, at 9:08 PM, Owen Anderson wrote: > On Aug 4, 2009, at 8:54 PM, Chris Lattner wrote: >> Fine, its implementation is private to vmcore, right? Since it has >> to be forward declared in various headers, why not use class? > > Because MSVC is unhappy if you mix class/struct for the same type. I mean "why not use class consistently everywhere". If LLVMContext is an internal implementation detail of VMCore, it is unfortunate that the tagtype has to be exposed at all. You didn't answer the first q. -Chris From jyasskin at google.com Tue Aug 4 23:12:12 2009 From: jyasskin at google.com (Jeffrey Yasskin) Date: Tue, 4 Aug 2009 21:12:12 -0700 Subject: [llvm-commits] [llvm] r78127 - in /llvm/trunk: lib/ExecutionEngine/ExecutionEngine.cpp unittests/ExecutionEngine/ExecutionEngineTest.cpp unittests/ExecutionEngine/Makefile In-Reply-To: <2C7A8D9B-526C-4241-9C8D-54A320AF0623@apple.com> References: <200908042353.n74NrdXX026510@zion.cs.uiuc.edu> <2C7A8D9B-526C-4241-9C8D-54A320AF0623@apple.com> Message-ID: On Tue, Aug 4, 2009 at 7:30 PM, Chris Lattner wrote: > > On Aug 4, 2009, at 4:53 PM, Jeffrey Yasskin wrote: > >> Author: jyasskin >> Date: Tue Aug ?4 18:53:16 2009 >> New Revision: 78127 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=78127&view=rev >> Log: >> Make ExecutionEngine::updateGlobalMapping(GV, NULL) properly remove >> GV's old >> address from the reverse mapping, and add a test that this works now. > > Hey Jeffrey, > > Should the GlobalMapping move to using AssertingVH? ?I think that > would define this class of bugs away. I'd actually like to move them and the other maps in ExecutionEngine to using CallbackVH so that users don't have to deal with removing/changing global mappings unless the object actually moves. But whether or not I do that, this bug made it impossible to do things like: T1 *obj1 = new T1; engine.addGlobalMapping(GV, obj1); ... engine.updateGlobalMapping(GV, NULL); delete obj1; ... T2 *obj2 = new T2; // Happens to land at the same address. engine.addGlobalMapping(UnrelatedGV, obj2); and I don't see how AssertingVH would make any of that illegal or work better. >> >> Added: >> ? ?llvm/trunk/unittests/ExecutionEngine/ExecutionEngineTest.cpp >> Modified: >> ? ?llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp >> ? ?llvm/trunk/unittests/ExecutionEngine/Makefile >> >> Modified: llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp?rev=78127&r1=78126&r2=78127&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp (original) >> +++ llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp Tue Aug ?4 >> 18:53:16 2009 >> @@ -179,7 +179,7 @@ >> ? ? } >> >> ? ? if (!state.getGlobalAddressReverseMap(locked).empty()) >> - ? ? ?state.getGlobalAddressReverseMap(locked).erase(Addr); >> + ? ? ?state.getGlobalAddressReverseMap(locked).erase(OldVal); >> ? ? return OldVal; >> ? } >> >> >> Added: llvm/trunk/unittests/ExecutionEngine/ExecutionEngineTest.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/ExecutionEngine/ExecutionEngineTest.cpp?rev=78127&view=auto >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/unittests/ExecutionEngine/ExecutionEngineTest.cpp >> (added) >> +++ llvm/trunk/unittests/ExecutionEngine/ExecutionEngineTest.cpp Tue >> Aug ?4 18:53:16 2009 >> @@ -0,0 +1,92 @@ >> +//===- ExecutionEngineTest.cpp - Unit tests for ExecutionEngine >> -----------===// >> +// >> +// ? ? ? ? ? ? ? ? ? ? The LLVM Compiler Infrastructure >> +// >> +// This file is distributed under the University of Illinois Open >> Source >> +// License. See LICENSE.TXT for details. >> +// >> +// >> = >> = >> = >> ----------------------------------------------------------------------= >> ==// >> + >> +#include "llvm/DerivedTypes.h" >> +#include "llvm/GlobalVariable.h" >> +#include "llvm/LLVMContext.h" >> +#include "llvm/Module.h" >> +#include "llvm/ADT/OwningPtr.h" >> +#include "llvm/ExecutionEngine/Interpreter.h" >> +#include "gtest/gtest.h" >> + >> +using namespace llvm; >> + >> +namespace { >> + >> +class ExecutionEngineTest : public testing::Test { >> +protected: >> + ?ExecutionEngineTest() >> + ? ?: M(new Module("
    ", getGlobalContext())), >> + ? ? ?Engine(EngineBuilder(M).create()) { >> + ?} >> + >> + ?virtual void SetUp() { >> + ? ?ASSERT_TRUE(Engine.get() != NULL); >> + ?} >> + >> + ?GlobalVariable *NewExtGlobal(const Type *T, const Twine &Name) { >> + ? ?return new GlobalVariable(*M, T, false, ?// Not constant. >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?GlobalValue::ExternalLinkage, NULL, >> Name); >> + ?} >> + >> + ?Module *const M; >> + ?const OwningPtr Engine; >> +}; >> + >> +TEST_F(ExecutionEngineTest, ForwardGlobalMapping) { >> + ?GlobalVariable *G1 = NewExtGlobal(Type::Int32Ty, "Global1"); >> + ?int32_t Mem1 = 3; >> + ?Engine->addGlobalMapping(G1, &Mem1); >> + ?EXPECT_EQ(&Mem1, Engine->getPointerToGlobalIfAvailable(G1)); >> + ?int32_t Mem2 = 4; >> + ?Engine->updateGlobalMapping(G1, &Mem2); >> + ?EXPECT_EQ(&Mem2, Engine->getPointerToGlobalIfAvailable(G1)); >> + ?Engine->updateGlobalMapping(G1, NULL); >> + ?EXPECT_EQ(NULL, Engine->getPointerToGlobalIfAvailable(G1)); >> + ?Engine->updateGlobalMapping(G1, &Mem2); >> + ?EXPECT_EQ(&Mem2, Engine->getPointerToGlobalIfAvailable(G1)); >> + >> + ?GlobalVariable *G2 = NewExtGlobal(Type::Int32Ty, "Global1"); >> + ?EXPECT_EQ(NULL, Engine->getPointerToGlobalIfAvailable(G2)) >> + ? ?<< "The NULL return shouldn't depend on having called" >> + ? ?<< " updateGlobalMapping(..., NULL)"; >> + ?// Check that update...() can be called before add...(). >> + ?Engine->updateGlobalMapping(G2, &Mem1); >> + ?EXPECT_EQ(&Mem1, Engine->getPointerToGlobalIfAvailable(G2)); >> + ?EXPECT_EQ(&Mem2, Engine->getPointerToGlobalIfAvailable(G1)) >> + ? ?<< "A second mapping shouldn't affect the first."; >> +} >> + >> +TEST_F(ExecutionEngineTest, ReverseGlobalMapping) { >> + ?GlobalVariable *G1 = NewExtGlobal(Type::Int32Ty, "Global1"); >> + >> + ?int32_t Mem1 = 3; >> + ?Engine->addGlobalMapping(G1, &Mem1); >> + ?EXPECT_EQ(G1, Engine->getGlobalValueAtAddress(&Mem1)); >> + ?int32_t Mem2 = 4; >> + ?Engine->updateGlobalMapping(G1, &Mem2); >> + ?EXPECT_EQ(NULL, Engine->getGlobalValueAtAddress(&Mem1)); >> + ?EXPECT_EQ(G1, Engine->getGlobalValueAtAddress(&Mem2)); >> + >> + ?GlobalVariable *G2 = NewExtGlobal(Type::Int32Ty, "Global2"); >> + ?Engine->updateGlobalMapping(G2, &Mem1); >> + ?EXPECT_EQ(G2, Engine->getGlobalValueAtAddress(&Mem1)); >> + ?EXPECT_EQ(G1, Engine->getGlobalValueAtAddress(&Mem2)); >> + ?Engine->updateGlobalMapping(G1, NULL); >> + ?EXPECT_EQ(G2, Engine->getGlobalValueAtAddress(&Mem1)) >> + ? ?<< "Removing one mapping doesn't affect a different one."; >> + ?EXPECT_EQ(NULL, Engine->getGlobalValueAtAddress(&Mem2)); >> + ?Engine->updateGlobalMapping(G2, &Mem2); >> + ?EXPECT_EQ(NULL, Engine->getGlobalValueAtAddress(&Mem1)); >> + ?EXPECT_EQ(G2, Engine->getGlobalValueAtAddress(&Mem2)) >> + ? ?<< "Once a mapping is removed, we can point another GV at the" >> + ? ?<< " now-free address."; >> +} >> + >> +} >> >> Modified: llvm/trunk/unittests/ExecutionEngine/Makefile >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/ExecutionEngine/Makefile?rev=78127&r1=78126&r2=78127&view=diff >> >> = >> = >> = >> = >> = >> = >> = >> = >> ====================================================================== >> --- llvm/trunk/unittests/ExecutionEngine/Makefile (original) >> +++ llvm/trunk/unittests/ExecutionEngine/Makefile Tue Aug ?4 >> 18:53:16 2009 >> @@ -8,12 +8,11 @@ >> ##= >> = >> = >> ----------------------------------------------------------------------= >> ==## >> >> LEVEL = ../.. >> +TESTNAME = ExecutionEngine >> +LINK_COMPONENTS := engine interpreter >> >> include $(LEVEL)/Makefile.config >> >> PARALLEL_DIRS = JIT >> >> -include $(LEVEL)/Makefile.common >> - >> -clean:: >> - ? ? $(Verb) $(RM) -f *Tests >> +include $(LLVM_SRC_ROOT)/unittests/Makefile.unittest >> >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits at cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From a at bolka.at Tue Aug 4 23:13:45 2009 From: a at bolka.at (Andreas Bolka) Date: Wed, 05 Aug 2009 04:13:45 -0000 Subject: [llvm-commits] [llvm] r78155 - /llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp Message-ID: <200908050413.n754Dkc5002816@zion.cs.uiuc.edu> Author: abolka Date: Tue Aug 4 23:13:41 2009 New Revision: 78155 URL: http://llvm.org/viewvc/llvm-project?rev=78155&view=rev Log: Restrict LDA to GEPs with the same pointer offset. We can not simply apply ZIV testing to the pointer offsets, as this would incorrectly return independence for e.g. (GEP x,0,i; GEP x,1,-i). Modified: llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp Modified: llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp?rev=78155&r1=78154&r2=78155&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp (original) +++ llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp Tue Aug 4 23:13:41 2009 @@ -195,28 +195,44 @@ // FIXME: Is filtering coupled subscripts necessary? - // Analyse indices pairwise (FIXME: use GetGEPOperands from BasicAA), adding + // Collect GEP operand pairs (FIXME: use GetGEPOperands from BasicAA), adding // trailing zeroes to the smaller GEP, if needed. - GEPOperator::const_op_iterator aIdx = aGEP->idx_begin(), - aEnd = aGEP->idx_end(), - bIdx = bGEP->idx_begin(), - bEnd = bGEP->idx_end(); - while (aIdx != aEnd && bIdx != bEnd) { + typedef SmallVector, 4> GEPOpdPairsTy; + GEPOpdPairsTy opds; + for(GEPOperator::const_op_iterator aIdx = aGEP->idx_begin(), + aEnd = aGEP->idx_end(), + bIdx = bGEP->idx_begin(), + bEnd = bGEP->idx_end(); + aIdx != aEnd && bIdx != bEnd; + aIdx += (aIdx != aEnd), bIdx += (bIdx != bEnd)) { const SCEV* aSCEV = (aIdx != aEnd) ? SE->getSCEV(*aIdx) : GetZeroSCEV(SE); const SCEV* bSCEV = (bIdx != bEnd) ? SE->getSCEV(*bIdx) : GetZeroSCEV(SE); + opds.push_back(std::make_pair(aSCEV, bSCEV)); + } + + if (!opds.empty() && opds[0].first != opds[0].second) { + // We cannot (yet) handle arbitrary GEP pointer offsets. By limiting + // + // TODO: this could be relaxed by adding the size of the underlying object + // to the first subscript. If we have e.g. (GEP x,0,i; GEP x,2,-i) and we + // know that x is a [100 x i8]*, we could modify the first subscript to be + // (i, 200-i) instead of (i, -i). + return Unknown; + } + + // Now analyse the collected operand pairs (skipping the GEP ptr offsets). + for (GEPOpdPairsTy::const_iterator i = opds.begin() + 1, end = opds.end(); + i != end; ++i) { Subscript subscript; - DependenceResult result = analyseSubscript(aSCEV, bSCEV, &subscript); + DependenceResult result = analyseSubscript(i->first, i->second, &subscript); if (result != Dependent) { // We either proved independence or failed to analyse this subscript. // Further subscripts will not improve the situation, so abort early. return result; } P->Subscripts.push_back(subscript); - if (aIdx != aEnd) ++aIdx; - if (bIdx != bEnd) ++bIdx; } - // Either there were no subscripts or all subscripts were analysed to be - // dependent; in both cases we know the accesses are dependent. + // We successfully analysed all subscripts but failed to prove independence. return Dependent; } From resistor at mac.com Tue Aug 4 23:17:00 2009 From: resistor at mac.com (Owen Anderson) Date: Tue, 04 Aug 2009 21:17:00 -0700 Subject: [llvm-commits] [llvm] r78097 - in /llvm/trunk: include/llvm/LLVMContext.h lib/VMCore/Constants.cpp lib/VMCore/LLVMContextImpl.cpp lib/VMCore/LLVMContextImpl.h In-Reply-To: <0F5BCBB8-7351-4C60-B72E-3AABDFCFB3AE@apple.com> References: <200908042025.n74KPVti018779@zion.cs.uiuc.edu> <23F64AF9-FDE2-436D-8F46-D00EFE1FE871@apple.com> <6EC02354-3DE7-4574-AF07-639DA521F0B7@apple.com> <3DA71DB2-38AA-4F0E-B2E8-84DEE6D92609@mac.com> <0F5BCBB8-7351-4C60-B72E-3AABDFCFB3AE@apple.com> Message-ID: On Aug 4, 2009, at 9:11 PM, Chris Lattner wrote: > > On Aug 4, 2009, at 9:08 PM, Owen Anderson wrote: > >> On Aug 4, 2009, at 8:54 PM, Chris Lattner wrote: >>> Fine, its implementation is private to vmcore, right? Since it has >>> to be forward declared in various headers, why not use class? >> >> Because MSVC is unhappy if you mix class/struct for the same type. > > I mean "why not use class consistently everywhere". If LLVMContext is > an internal implementation detail of VMCore, it is unfortunate that > the tagtype has to be exposed at all. You didn't answer the first q. LLVMContext isn't internal to VMCore. Clients need to be able to instantiate it. LLVMContextImpl is private to VMCore, though. I'm not clear on how that really impact the struct vs. class issue. --Owen -------------- next part -------------- A non-text attachment was scrubbed... Name: smime.p7s Type: application/pkcs7-signature Size: 2620 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090804/b1978180/attachment.bin From sabre at nondot.org Tue Aug 4 23:25:55 2009 From: sabre at nondot.org (Chris Lattner) Date: Wed, 05 Aug 2009 04:25:55 -0000 Subject: [llvm-commits] [llvm] r78156 - in /llvm/trunk: include/llvm/Target/TargetLoweringObjectFile.h lib/Target/TargetLoweringObjectFile.cpp Message-ID: <200908050425.n754PwNS003187@zion.cs.uiuc.edu> Author: lattner Date: Tue Aug 4 23:25:40 2009 New Revision: 78156 URL: http://llvm.org/viewvc/llvm-project?rev=78156&view=rev Log: expose SectionKindForGlobal to curious clients, named as getKindForGlobal. Modified: llvm/trunk/include/llvm/Target/TargetLoweringObjectFile.h llvm/trunk/lib/Target/TargetLoweringObjectFile.cpp Modified: llvm/trunk/include/llvm/Target/TargetLoweringObjectFile.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLoweringObjectFile.h?rev=78156&r1=78155&r2=78156&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetLoweringObjectFile.h (original) +++ llvm/trunk/include/llvm/Target/TargetLoweringObjectFile.h Tue Aug 4 23:25:40 2009 @@ -141,13 +141,27 @@ return K; } + /// getKindForGlobal - Classify the specified global variable into a set of + /// target independent categories embodied in SectionKind. + static SectionKind getKindForGlobal(const GlobalValue *GV, + const TargetMachine &TM); + /// SectionForGlobal - This method computes the appropriate section to emit /// the specified global variable or function definition. This should not /// be passed external (or available externally) globals. const MCSection *SectionForGlobal(const GlobalValue *GV, - Mangler *Mang, + SectionKind Kind, Mangler *Mang, const TargetMachine &TM) const; + /// SectionForGlobal - This method computes the appropriate section to emit + /// the specified global variable or function definition. This should not + /// be passed external (or available externally) globals. + const MCSection *SectionForGlobal(const GlobalValue *GV, + Mangler *Mang, + const TargetMachine &TM) const { + return SectionForGlobal(GV, getKindForGlobal(GV, TM), Mang, TM); + } + /// getSpecialCasedSectionGlobals - Allow the target to completely override /// section assignment of a global. /// FIXME: ELIMINATE this by making PIC16 implement ADDRESS with Modified: llvm/trunk/lib/Target/TargetLoweringObjectFile.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetLoweringObjectFile.cpp?rev=78156&r1=78155&r2=78156&view=diff ============================================================================== --- llvm/trunk/lib/Target/TargetLoweringObjectFile.cpp (original) +++ llvm/trunk/lib/Target/TargetLoweringObjectFile.cpp Tue Aug 4 23:25:40 2009 @@ -110,13 +110,16 @@ return false; } -/// SectionKindForGlobal - This is a top-level target-independent classifier for +/// getKindForGlobal - This is a top-level target-independent classifier for /// a global variable. Given an global variable and information from TM, it /// classifies the global in a variety of ways that make various target /// implementations simpler. The target implementation is free to ignore this /// extra info of course. -static SectionKind SectionKindForGlobal(const GlobalValue *GV, - const TargetMachine &TM) { +SectionKind TargetLoweringObjectFile::getKindForGlobal(const GlobalValue *GV, + const TargetMachine &TM){ + assert(!GV->isDeclaration() && !GV->hasAvailableExternallyLinkage() && + "Can only be used for global definitions"); + Reloc::Model ReloModel = TM.getRelocationModel(); // Early exit - functions should be always in text sections. @@ -227,13 +230,8 @@ /// the specified global variable or function definition. This should not /// be passed external (or available externally) globals. const MCSection *TargetLoweringObjectFile:: -SectionForGlobal(const GlobalValue *GV, Mangler *Mang, +SectionForGlobal(const GlobalValue *GV, SectionKind Kind, Mangler *Mang, const TargetMachine &TM) const { - assert(!GV->isDeclaration() && !GV->hasAvailableExternallyLinkage() && - "Can only be used for global definitions"); - - SectionKind Kind = SectionKindForGlobal(GV, TM); - // Select section name. if (GV->hasSection()) { // If the target has special section hacks for specifically named globals, @@ -254,6 +252,7 @@ return SelectSectionForGlobal(GV, Kind, Mang, TM); } + // Lame default implementation. Calculate the section name for global. const MCSection * TargetLoweringObjectFile::SelectSectionForGlobal(const GlobalValue *GV, From a at bolka.at Tue Aug 4 23:26:06 2009 From: a at bolka.at (Andreas Bolka) Date: Wed, 05 Aug 2009 04:26:06 -0000 Subject: [llvm-commits] [llvm] r78157 - in /llvm/trunk: include/llvm/Analysis/LoopDependenceAnalysis.h lib/Analysis/LoopDependenceAnalysis.cpp test/Analysis/LoopDependenceAnalysis/alias.ll test/Analysis/LoopDependenceAnalysis/ziv.ll Message-ID: <200908050426.n754Q7BX003208@zion.cs.uiuc.edu> Author: abolka Date: Tue Aug 4 23:26:05 2009 New Revision: 78157 URL: http://llvm.org/viewvc/llvm-project?rev=78157&view=rev Log: ZIV tester for LDA. Modified: llvm/trunk/include/llvm/Analysis/LoopDependenceAnalysis.h llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp llvm/trunk/test/Analysis/LoopDependenceAnalysis/alias.ll llvm/trunk/test/Analysis/LoopDependenceAnalysis/ziv.ll Modified: llvm/trunk/include/llvm/Analysis/LoopDependenceAnalysis.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/LoopDependenceAnalysis.h?rev=78157&r1=78156&r2=78157&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/LoopDependenceAnalysis.h (original) +++ llvm/trunk/include/llvm/Analysis/LoopDependenceAnalysis.h Tue Aug 4 23:26:05 2009 @@ -77,6 +77,8 @@ bool isAffine(const SCEV*) const; /// TODO: doc + bool isZIVPair(const SCEV*, const SCEV*) const; + DependenceResult analyseZIV(const SCEV*, const SCEV*, Subscript*) const; DependenceResult analyseSubscript(const SCEV*, const SCEV*, Subscript*) const; DependenceResult analysePair(DependencePair*) const; Modified: llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp?rev=78157&r1=78156&r2=78157&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp (original) +++ llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp Tue Aug 4 23:26:05 2009 @@ -136,6 +136,19 @@ return isLoopInvariant(S) || (rec && rec->isAffine()); } +bool LoopDependenceAnalysis::isZIVPair(const SCEV *A, const SCEV *B) const { + return isLoopInvariant(A) && isLoopInvariant(B); +} + +LoopDependenceAnalysis::DependenceResult +LoopDependenceAnalysis::analyseZIV(const SCEV *A, + const SCEV *B, + Subscript *S) const { + assert(isZIVPair(A, B)); + const SCEV *diff = SE->getMinusSCEV(A, B); + return diff->isZero() ? Dependent : Independent; +} + LoopDependenceAnalysis::DependenceResult LoopDependenceAnalysis::analyseSubscript(const SCEV *A, const SCEV *B, @@ -152,7 +165,10 @@ return Unknown; } - // TODO: Implement ZIV/SIV/MIV testers. + if (isZIVPair(A, B)) + return analyseZIV(A, B, S); + + // TODO: Implement SIV/MIV testers. DEBUG(errs() << " -> [?] cannot analyse subscript\n"); return Unknown; Modified: llvm/trunk/test/Analysis/LoopDependenceAnalysis/alias.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/LoopDependenceAnalysis/alias.ll?rev=78157&r1=78156&r2=78157&view=diff ============================================================================== --- llvm/trunk/test/Analysis/LoopDependenceAnalysis/alias.ll (original) +++ llvm/trunk/test/Analysis/LoopDependenceAnalysis/alias.ll Tue Aug 4 23:26:05 2009 @@ -34,7 +34,7 @@ %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ] %x = load i32* %x.ld.addr store i32 %x, i32* %x.st.addr -; CHECK: 0,1: dep +; CHECK: 0,1: ind %i.next = add i64 %i, 1 %exitcond = icmp eq i64 %i.next, 256 br i1 %exitcond, label %for.end, label %for.body Modified: llvm/trunk/test/Analysis/LoopDependenceAnalysis/ziv.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/LoopDependenceAnalysis/ziv.ll?rev=78157&r1=78156&r2=78157&view=diff ============================================================================== --- llvm/trunk/test/Analysis/LoopDependenceAnalysis/ziv.ll (original) +++ llvm/trunk/test/Analysis/LoopDependenceAnalysis/ziv.ll Tue Aug 4 23:26:05 2009 @@ -12,7 +12,7 @@ %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ] %x = load i32* getelementptr ([256 x i32]* @x, i32 0, i64 6) store i32 %x, i32* getelementptr ([256 x i32]* @x, i32 0, i64 5) -; CHECK: 0,1: dep +; CHECK: 0,1: ind %i.next = add i64 %i, 1 %exitcond = icmp eq i64 %i.next, 256 br i1 %exitcond, label %for.end, label %for.body @@ -34,7 +34,7 @@ %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ] %x = load i32* %x.ld.addr store i32 %x, i32* %x.st.addr -; CHECK: 0,1: dep +; CHECK: 0,1: ind %i.next = add i64 %i, 1 %exitcond = icmp eq i64 %i.next, 256 br i1 %exitcond, label %for.end, label %for.body From sabre at nondot.org Wed Aug 5 00:21:07 2009 From: sabre at nondot.org (Chris Lattner) Date: Wed, 05 Aug 2009 05:21:07 -0000 Subject: [llvm-commits] [llvm] r78160 - in /llvm/trunk: docs/LangRef.html lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp lib/VMCore/Verifier.cpp Message-ID: <200908050521.n755L8dT005156@zion.cs.uiuc.edu> Author: lattner Date: Wed Aug 5 00:21:07 2009 New Revision: 78160 URL: http://llvm.org/viewvc/llvm-project?rev=78160&view=rev Log: Clarify common linkage and the requirements on it. Enforce them in the verifier. Modified: llvm/trunk/docs/LangRef.html llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp llvm/trunk/lib/VMCore/Verifier.cpp Modified: llvm/trunk/docs/LangRef.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/LangRef.html?rev=78160&r1=78159&r2=78160&view=diff ============================================================================== --- llvm/trunk/docs/LangRef.html (original) +++ llvm/trunk/docs/LangRef.html Wed Aug 5 00:21:07 2009 @@ -552,19 +552,22 @@ translation unit that uses it. Unreferenced linkonce globals are allowed to be discarded. +
    weak:
    +
    "weak" linkage has the same merging semantics as + linkonce linkage, except that unreferenced globals with + weak linkage may not be discarded. This is used for globals that + are declared "weak" in C source code.
    +
    common:
    -
    "common" linkage is exactly the same as linkonce - linkage, except that unreferenced common globals may not be - discarded. This is used for globals that may be emitted in multiple - translation units, but that are not guaranteed to be emitted into every - translation unit that uses them. One example of this is tentative - definitions in C, such as "int X;" at global scope.
    +
    "common" linkage is most similar to "weak" linkage, but + they are used for tentative definitions in C, such as "int X;" at + global scope. + Symbols with "common" linkage are merged in the same way as + weak symbols, and they may not be deleted if unreferenced. + Further, common symbols may not have an explicit section, and + must have a zero initializer. Functions and aliases may not have common + linkage.
    -
    weak:
    -
    "weak" linkage is the same as common linkage, except - that some targets may choose to emit different assembly sequences for them - for target-dependent reasons. This is used for globals that are declared - "weak" in C source code.
    appending:
    "appending" linkage may only be applied to global variables of Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp?rev=78160&r1=78159&r2=78160&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Wed Aug 5 00:21:07 2009 @@ -782,8 +782,13 @@ if (Subtarget->isTargetELF()) O << "\t.type\t" << name << ", at object\n"; + + SectionKind GVKind = TargetLoweringObjectFile::getKindForGlobal(GVar, TM); + + + const MCSection *TheSection = - getObjFileLowering().SectionForGlobal(GVar, Mang, TM); + getObjFileLowering().SectionForGlobal(GVar, GVKind, Mang, TM); SwitchToSection(TheSection); // FIXME: get this stuff from section kind flags. Modified: llvm/trunk/lib/VMCore/Verifier.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Verifier.cpp?rev=78160&r1=78159&r2=78160&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Verifier.cpp (original) +++ llvm/trunk/lib/VMCore/Verifier.cpp Wed Aug 5 00:21:07 2009 @@ -378,6 +378,12 @@ "Global variable initializer type does not match global " "variable type!", &GV); + // If the global has common linkage, it must have a zero initializer. + if (GV.hasCommonLinkage()) + Assert1(GV.getInitializer()->isNullValue(), + "'common' global must have a zero initializer!", &GV); + + // Verify that any metadata used in a global initializer points only to // other globals. if (MDNode *FirstNode = dyn_cast(GV.getInitializer())) { @@ -544,6 +550,7 @@ const FunctionType *FT = F.getFunctionType(); unsigned NumArgs = F.arg_size(); + Assert1(!F.hasCommonLinkage(), "Functions may not have common linkage", &F); Assert2(FT->getNumParams() == NumArgs, "# formal arguments must match # of arguments for function type!", &F, FT); From nicholas at mxc.ca Wed Aug 5 00:29:49 2009 From: nicholas at mxc.ca (Nick Lewycky) Date: Tue, 04 Aug 2009 22:29:49 -0700 Subject: [llvm-commits] [llvm] r78157 - in /llvm/trunk: include/llvm/Analysis/LoopDependenceAnalysis.h lib/Analysis/LoopDependenceAnalysis.cpp test/Analysis/LoopDependenceAnalysis/alias.ll test/Analysis/LoopDependenceAnalysis/ziv.ll In-Reply-To: <200908050426.n754Q7BX003208@zion.cs.uiuc.edu> References: <200908050426.n754Q7BX003208@zion.cs.uiuc.edu> Message-ID: <4A7918CD.3010006@mxc.ca> Andreas Bolka wrote: > Author: abolka > Date: Tue Aug 4 23:26:05 2009 > New Revision: 78157 > > URL: http://llvm.org/viewvc/llvm-project?rev=78157&view=rev > Log: > ZIV tester for LDA. > > Modified: > llvm/trunk/include/llvm/Analysis/LoopDependenceAnalysis.h > llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp > llvm/trunk/test/Analysis/LoopDependenceAnalysis/alias.ll > llvm/trunk/test/Analysis/LoopDependenceAnalysis/ziv.ll > > Modified: llvm/trunk/include/llvm/Analysis/LoopDependenceAnalysis.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/LoopDependenceAnalysis.h?rev=78157&r1=78156&r2=78157&view=diff > > ============================================================================== > --- llvm/trunk/include/llvm/Analysis/LoopDependenceAnalysis.h (original) > +++ llvm/trunk/include/llvm/Analysis/LoopDependenceAnalysis.h Tue Aug 4 23:26:05 2009 > @@ -77,6 +77,8 @@ > bool isAffine(const SCEV*) const; > > /// TODO: doc > + bool isZIVPair(const SCEV*, const SCEV*) const; > + DependenceResult analyseZIV(const SCEV*, const SCEV*, Subscript*) const; > DependenceResult analyseSubscript(const SCEV*, const SCEV*, Subscript*) const; > DependenceResult analysePair(DependencePair*) const; > > > Modified: llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp?rev=78157&r1=78156&r2=78157&view=diff > > ============================================================================== > --- llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp (original) > +++ llvm/trunk/lib/Analysis/LoopDependenceAnalysis.cpp Tue Aug 4 23:26:05 2009 > @@ -136,6 +136,19 @@ > return isLoopInvariant(S) || (rec && rec->isAffine()); > } > > +bool LoopDependenceAnalysis::isZIVPair(const SCEV *A, const SCEV *B) const { > + return isLoopInvariant(A) && isLoopInvariant(B); > +} > + > +LoopDependenceAnalysis::DependenceResult > +LoopDependenceAnalysis::analyseZIV(const SCEV *A, > + const SCEV *B, > + Subscript *S) const { > + assert(isZIVPair(A, B)); > + const SCEV *diff = SE->getMinusSCEV(A, B); > + return diff->isZero() ? Dependent : Independent; Doesn't that imply A == B ? Dependent : Independent? In what other case could this happen? Nick > +} > + > LoopDependenceAnalysis::DependenceResult > LoopDependenceAnalysis::analyseSubscript(const SCEV *A, > const SCEV *B, > @@ -152,7 +165,10 @@ > return Unknown; > } > > - // TODO: Implement ZIV/SIV/MIV testers. > + if (isZIVPair(A, B)) > + return analyseZIV(A, B, S); > + > + // TODO: Implement SIV/MIV testers. > > DEBUG(errs() << " -> [?] cannot analyse subscript\n"); > return Unknown; > > Modified: llvm/trunk/test/Analysis/LoopDependenceAnalysis/alias.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/LoopDependenceAnalysis/alias.ll?rev=78157&r1=78156&r2=78157&view=diff > > ============================================================================== > --- llvm/trunk/test/Analysis/LoopDependenceAnalysis/alias.ll (original) > +++ llvm/trunk/test/Analysis/LoopDependenceAnalysis/alias.ll Tue Aug 4 23:26:05 2009 > @@ -34,7 +34,7 @@ > %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ] > %x = load i32* %x.ld.addr > store i32 %x, i32* %x.st.addr > -; CHECK: 0,1: dep > +; CHECK: 0,1: ind > %i.next = add i64 %i, 1 > %exitcond = icmp eq i64 %i.next, 256 > br i1 %exitcond, label %for.end, label %for.body > > Modified: llvm/trunk/test/Analysis/LoopDependenceAnalysis/ziv.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/LoopDependenceAnalysis/ziv.ll?rev=78157&r1=78156&r2=78157&view=diff > > ============================================================================== > --- llvm/trunk/test/Analysis/LoopDependenceAnalysis/ziv.ll (original) > +++ llvm/trunk/test/Analysis/LoopDependenceAnalysis/ziv.ll Tue Aug 4 23:26:05 2009 > @@ -12,7 +12,7 @@ > %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ] > %x = load i32* getelementptr ([256 x i32]* @x, i32 0, i64 6) > store i32 %x, i32* getelementptr ([256 x i32]* @x, i32 0, i64 5) > -; CHECK: 0,1: dep > +; CHECK: 0,1: ind > %i.next = add i64 %i, 1 > %exitcond = icmp eq i64 %i.next, 256 > br i1 %exitcond, label %for.end, label %for.body > @@ -34,7 +34,7 @@ > %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ] > %x = load i32* %x.ld.addr > store i32 %x, i32* %x.st.addr > -; CHECK: 0,1: dep > +; CHECK: 0,1: ind > %i.next = add i64 %i, 1 > %exitcond = icmp eq i64 %i.next, 256 > br i1 %exitcond, label %for.end, label %for.body > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From clattner at apple.com Wed Aug 5 00:30:04 2009 From: clattner at apple.com (Chris Lattner) Date: Tue, 4 Aug 2009 22:30:04 -0700 Subject: [llvm-commits] [llvm] r78097 - in /llvm/trunk: include/llvm/LLVMContext.h lib/VMCore/Constants.cpp lib/VMCore/LLVMContextImpl.cpp lib/VMCore/LLVMContextImpl.h In-Reply-To: References: <200908042025.n74KPVti018779@zion.cs.uiuc.edu> <23F64AF9-FDE2-436D-8F46-D00EFE1FE871@apple.com> <6EC02354-3DE7-4574-AF07-639DA521F0B7@apple.com> <3DA71DB2-38AA-4F0E-B2E8-84DEE6D92609@mac.com> <0F5BCBB8-7351-4C60-B72E-3AABDFCFB3AE@apple.com> Message-ID: <477A8252-6B3F-45FA-AA87-4F46C4310152@apple.com> On Aug 4, 2009, at 9:17 PM, Owen Anderson wrote: > > On Aug 4, 2009, at 9:11 PM, Chris Lattner wrote: > >> >> On Aug 4, 2009, at 9:08 PM, Owen Anderson wrote: >> >>> On Aug 4, 2009, at 8:54 PM, Chris Lattner wrote: >>>> Fine, its implementation is private to vmcore, right? Since it has >>>> to be forward declared in various headers, why not use class? >>> >>> Because MSVC is unhappy if you mix class/struct for the same type. >> >> I mean "why not use class consistently everywhere". If LLVMContext >> is >> an internal implementation detail of VMCore, it is unfortunate that >> the tagtype has to be exposed at all. You didn't answer the first q. > > LLVMContext isn't internal to VMCore. Clients need to be able to > instantiate it. LLVMContextImpl is private to VMCore, though. I'm > not clear on how that really impact the struct vs. class issue. Please just use class, thanks! -Chris From clattner at apple.com Wed Aug 5 00:33:32 2009 From: clattner at apple.com (Chris Lattner) Date: Tue, 4 Aug 2009 22:33:32 -0700 Subject: [llvm-commits] [llvm] r78127 - in /llvm/trunk: lib/ExecutionEngine/ExecutionEngine.cpp unittests/ExecutionEngine/ExecutionEngineTest.cpp unittests/ExecutionEngine/Makefile In-Reply-To: References: <200908042353.n74NrdXX026510@zion.cs.uiuc.edu> <2C7A8D9B-526C-4241-9C8D-54A320AF0623@apple.com> Message-ID: On Aug 4, 2009, at 9:12 PM, Jeffrey Yasskin wrote: > On Tue, Aug 4, 2009 at 7:30 PM, Chris Lattner > wrote: >> >> On Aug 4, 2009, at 4:53 PM, Jeffrey Yasskin wrote: >> >>> Author: jyasskin >>> Date: Tue Aug 4 18:53:16 2009 >>> New Revision: 78127 >>> >>> URL: http://llvm.org/viewvc/llvm-project?rev=78127&view=rev >>> Log: >>> Make ExecutionEngine::updateGlobalMapping(GV, NULL) properly remove >>> GV's old >>> address from the reverse mapping, and add a test that this works >>> now. >> >> Hey Jeffrey, >> >> Should the GlobalMapping move to using AssertingVH? I think that >> would define this class of bugs away. > > I'd actually like to move them and the other maps in ExecutionEngine > to using CallbackVH so that users don't have to deal with > removing/changing global mappings unless the object actually moves. That would also be nice. :) > But whether or not I do that, this bug made it impossible to do > things like: > > T1 *obj1 = new T1; > engine.addGlobalMapping(GV, obj1); > ... > engine.updateGlobalMapping(GV, NULL); > delete obj1; > ... > T2 *obj2 = new T2; // Happens to land at the same address. > engine.addGlobalMapping(UnrelatedGV, obj2); > > and I don't see how AssertingVH would make any of that illegal or > work better. If "updateglobalmapping" to null deletes the entry out of the map, then assertingvh should work fine. -Chris From gohman at apple.com Wed Aug 5 00:33:42 2009 From: gohman at apple.com (Dan Gohman) Date: Wed, 05 Aug 2009 05:33:42 -0000 Subject: [llvm-commits] [llvm] r78163 - in /llvm/trunk: lib/Target/X86/X86FastISel.cpp test/CodeGen/X86/coalesce-esp.ll test/CodeGen/X86/fast-isel-bc.ll test/CodeGen/X86/stack-color-with-reg.ll Message-ID: <200908050533.n755XhIb005646@zion.cs.uiuc.edu> Author: djg Date: Wed Aug 5 00:33:42 2009 New Revision: 78163 URL: http://llvm.org/viewvc/llvm-project?rev=78163&view=rev Log: Teach X86FastISel how to handle CCValAssign::BCvt, which is used for MMX arguments. This fixes PR4684. Added: llvm/trunk/test/CodeGen/X86/fast-isel-bc.ll Modified: llvm/trunk/lib/Target/X86/X86FastISel.cpp llvm/trunk/test/CodeGen/X86/coalesce-esp.ll llvm/trunk/test/CodeGen/X86/stack-color-with-reg.ll Modified: llvm/trunk/lib/Target/X86/X86FastISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FastISel.cpp?rev=78163&r1=78162&r2=78163&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86FastISel.cpp (original) +++ llvm/trunk/lib/Target/X86/X86FastISel.cpp Wed Aug 5 00:33:42 2009 @@ -1351,6 +1351,14 @@ ArgVT = VA.getLocVT(); break; } + case CCValAssign::BCvt: { + unsigned BC = FastEmit_r(ArgVT.getSimpleVT(), VA.getLocVT().getSimpleVT(), + ISD::BIT_CONVERT, Arg); + assert(BC != 0 && "Failed to emit a bitcast!"); + Arg = BC; + ArgVT = VA.getLocVT(); + break; + } } if (VA.isRegLoc()) { Modified: llvm/trunk/test/CodeGen/X86/coalesce-esp.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/coalesce-esp.ll?rev=78163&r1=78162&r2=78163&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/coalesce-esp.ll (original) +++ llvm/trunk/test/CodeGen/X86/coalesce-esp.ll Wed Aug 5 00:33:42 2009 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -strict-index-regclass | grep {movl %esp, %eax} +; RUN: llvm-as < %s | llc | grep {movl %esp, %eax} ; PR4572 ; Don't coalesce with %esp if it would end up putting %esp in Added: llvm/trunk/test/CodeGen/X86/fast-isel-bc.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-bc.ll?rev=78163&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/fast-isel-bc.ll (added) +++ llvm/trunk/test/CodeGen/X86/fast-isel-bc.ll Wed Aug 5 00:33:42 2009 @@ -0,0 +1,19 @@ +; RUN: llvm-as < %s | llc -O0 -march=x86-64 -mattr=+mmx | FileCheck %s +; PR4684 + +target datalayout = +"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" +target triple = "x86_64-apple-darwin9.8" + +declare void @func2(<1 x i64>) + +define void @func1() nounwind { + +; This isn't spectacular, but it's MMX code at -O0... +; CHECK: movl $2, %eax +; CHECK: movd %rax, %mm0 +; CHECK: movd %mm0, %rdi + + call void @func2(<1 x i64> ) + ret void +} Modified: llvm/trunk/test/CodeGen/X86/stack-color-with-reg.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/stack-color-with-reg.ll?rev=78163&r1=78162&r2=78163&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/stack-color-with-reg.ll (original) +++ llvm/trunk/test/CodeGen/X86/stack-color-with-reg.ll Wed Aug 5 00:33:42 2009 @@ -1,7 +1,7 @@ ; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin10 -relocation-model=pic -disable-fp-elim -color-ss-with-regs -stats -info-output-file - > %t ; RUN: grep stackcoloring %t | grep "loads eliminated" ; RUN: grep stackcoloring %t | grep "stack slot refs replaced with reg refs" | grep 5 -; RUN: grep asm-printer %t | grep 180 +; RUN: grep asm-printer %t | grep 182 type { [62 x %struct.Bitvec*] } ; type %0 type { i8* } ; type %1 From gohman at apple.com Wed Aug 5 00:38:13 2009 From: gohman at apple.com (Dan Gohman) Date: Wed, 05 Aug 2009 05:38:13 -0000 Subject: [llvm-commits] [llvm] r78165 - in /llvm/trunk/test/CodeGen/X86: coalesce-esp.ll stack-color-with-reg.ll Message-ID: <200908050538.n755cDSp005839@zion.cs.uiuc.edu> Author: djg Date: Wed Aug 5 00:38:13 2009 New Revision: 78165 URL: http://llvm.org/viewvc/llvm-project?rev=78165&view=rev Log: Revert changes accidentally committed along with r78163. Modified: llvm/trunk/test/CodeGen/X86/coalesce-esp.ll llvm/trunk/test/CodeGen/X86/stack-color-with-reg.ll Modified: llvm/trunk/test/CodeGen/X86/coalesce-esp.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/coalesce-esp.ll?rev=78165&r1=78164&r2=78165&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/coalesce-esp.ll (original) +++ llvm/trunk/test/CodeGen/X86/coalesce-esp.ll Wed Aug 5 00:38:13 2009 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc | grep {movl %esp, %eax} +; RUN: llvm-as < %s | llc -strict-index-regclass | grep {movl %esp, %eax} ; PR4572 ; Don't coalesce with %esp if it would end up putting %esp in Modified: llvm/trunk/test/CodeGen/X86/stack-color-with-reg.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/stack-color-with-reg.ll?rev=78165&r1=78164&r2=78165&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/stack-color-with-reg.ll (original) +++ llvm/trunk/test/CodeGen/X86/stack-color-with-reg.ll Wed Aug 5 00:38:13 2009 @@ -1,7 +1,7 @@ ; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin10 -relocation-model=pic -disable-fp-elim -color-ss-with-regs -stats -info-output-file - > %t ; RUN: grep stackcoloring %t | grep "loads eliminated" ; RUN: grep stackcoloring %t | grep "stack slot refs replaced with reg refs" | grep 5 -; RUN: grep asm-printer %t | grep 182 +; RUN: grep asm-printer %t | grep 180 type { [62 x %struct.Bitvec*] } ; type %0 type { i8* } ; type %1 From stoklund at 2pi.dk Wed Aug 5 00:39:06 2009 From: stoklund at 2pi.dk (Jakob Stoklund Olesen) Date: Wed, 5 Aug 2009 07:39:06 +0200 Subject: [llvm-commits] [llvm] r77989 - in /llvm/trunk: lib/CodeGen/LowerSubregs.cpp lib/CodeGen/MachineInstr.cpp test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll In-Reply-To: <5B3E9460-BBBB-4715-A7F6-EA2454C51A6C@apple.com> References: <200908032008.n73K8goN023448@zion.cs.uiuc.edu> <85AC6E8F-168F-441E-B591-59C3B543F6EE@apple.com> <87eirsrlf9.fsf@chora.dk> <5B3E9460-BBBB-4715-A7F6-EA2454C51A6C@apple.com> Message-ID: <0C109B57-EC0D-42B9-BC79-D112126FAE81@2pi.dk> On 04/08/2009, at 19.31, Evan Cheng wrote: > There isn't a client for backward() right now so I am not too > concerned about it. But in this case, it would assume R0 is not-live. I think I understand now, and I think backward() can work. It just has to ignore operands, just like forward(). Anyway, if there are no clients, can I kill it? It is bit rotting. /jakob From sabre at nondot.org Wed Aug 5 00:41:45 2009 From: sabre at nondot.org (Chris Lattner) Date: Wed, 05 Aug 2009 05:41:45 -0000 Subject: [llvm-commits] [llvm] r78169 - in /llvm/trunk: docs/LangRef.html lib/VMCore/Verifier.cpp Message-ID: <200908050541.n755fjrd005990@zion.cs.uiuc.edu> Author: lattner Date: Wed Aug 5 00:41:44 2009 New Revision: 78169 URL: http://llvm.org/viewvc/llvm-project?rev=78169&view=rev Log: common globals may also not be marked constant. Modified: llvm/trunk/docs/LangRef.html llvm/trunk/lib/VMCore/Verifier.cpp Modified: llvm/trunk/docs/LangRef.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/LangRef.html?rev=78169&r1=78168&r2=78169&view=diff ============================================================================== --- llvm/trunk/docs/LangRef.html (original) +++ llvm/trunk/docs/LangRef.html Wed Aug 5 00:41:44 2009 @@ -564,9 +564,10 @@ global scope. Symbols with "common" linkage are merged in the same way as weak symbols, and they may not be deleted if unreferenced. - Further, common symbols may not have an explicit section, and - must have a zero initializer. Functions and aliases may not have common - linkage.
    + common symbols may not have an explicit section, + must have a zero initializer, and may not be marked 'constant'. Functions and aliases may not + have common linkage.
    appending:
    Modified: llvm/trunk/lib/VMCore/Verifier.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Verifier.cpp?rev=78169&r1=78168&r2=78169&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Verifier.cpp (original) +++ llvm/trunk/lib/VMCore/Verifier.cpp Wed Aug 5 00:41:44 2009 @@ -378,11 +378,14 @@ "Global variable initializer type does not match global " "variable type!", &GV); - // If the global has common linkage, it must have a zero initializer. - if (GV.hasCommonLinkage()) + // If the global has common linkage, it must have a zero initializer and + // cannot be constant. + if (GV.hasCommonLinkage()) { Assert1(GV.getInitializer()->isNullValue(), "'common' global must have a zero initializer!", &GV); - + Assert1(!GV.isConstant(), "'common' global may not be marked constant!", + &GV); + } // Verify that any metadata used in a global initializer points only to // other globals. From evan.cheng at apple.com Wed Aug 5 01:10:35 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Tue, 4 Aug 2009 23:10:35 -0700 Subject: [llvm-commits] [llvm] r77989 - in /llvm/trunk: lib/CodeGen/LowerSubregs.cpp lib/CodeGen/MachineInstr.cpp test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll In-Reply-To: <0C109B57-EC0D-42B9-BC79-D112126FAE81@2pi.dk> References: <200908032008.n73K8goN023448@zion.cs.uiuc.edu> <85AC6E8F-168F-441E-B591-59C3B543F6EE@apple.com> <87eirsrlf9.fsf@chora.dk> <5B3E9460-BBBB-4715-A7F6-EA2454C51A6C@apple.com> <0C109B57-EC0D-42B9-BC79-D112126FAE81@2pi.dk> Message-ID: On Aug 4, 2009, at 10:39 PM, Jakob Stoklund Olesen wrote: > > On 04/08/2009, at 19.31, Evan Cheng wrote: > >> There isn't a client for backward() right now so I am not too >> concerned about it. But in this case, it would assume R0 is not-live. > > I think I understand now, and I think backward() can work. It > just has to ignore operands, just like forward(). > > Anyway, if there are no clients, can I kill it? It is bit rotting. Sure. Evan > > /jakob > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From kremenek at apple.com Wed Aug 5 01:17:12 2009 From: kremenek at apple.com (Ted Kremenek) Date: Wed, 05 Aug 2009 06:17:12 -0000 Subject: [llvm-commits] [llvm] r78170 - /llvm/tags/checker/checker-0.215/ Message-ID: <200908050617.n756HDo4007004@zion.cs.uiuc.edu> Author: kremenek Date: Wed Aug 5 01:17:11 2009 New Revision: 78170 URL: http://llvm.org/viewvc/llvm-project?rev=78170&view=rev Log: Removing checker-0.215. Removed: llvm/tags/checker/checker-0.215/ From kremenek at apple.com Wed Aug 5 01:17:55 2009 From: kremenek at apple.com (Ted Kremenek) Date: Wed, 05 Aug 2009 06:17:55 -0000 Subject: [llvm-commits] [llvm] r78172 - /llvm/tags/checker/checker-0.215/ Message-ID: <200908050617.n756Htbg007063@zion.cs.uiuc.edu> Author: kremenek Date: Wed Aug 5 01:17:55 2009 New Revision: 78172 URL: http://llvm.org/viewvc/llvm-project?rev=78172&view=rev Log: Tagging checker-0.215. Added: llvm/tags/checker/checker-0.215/ - copied from r78171, llvm/trunk/ From evan.cheng at apple.com Wed Aug 5 01:41:25 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 05 Aug 2009 06:41:25 -0000 Subject: [llvm-commits] [llvm] r78175 - /llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Message-ID: <200908050641.n756fPG8007870@zion.cs.uiuc.edu> Author: evancheng Date: Wed Aug 5 01:41:25 2009 New Revision: 78175 URL: http://llvm.org/viewvc/llvm-project?rev=78175&view=rev Log: 80 col violations. Modified: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Modified: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrNEON.td?rev=78175&r1=78174&r2=78175&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrNEON.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Wed Aug 5 01:41:25 2009 @@ -285,8 +285,9 @@ // Basic 2-register operations, scalar single-precision class N2VDInts : NEONFPPat<(f32 (OpNode SPR:$a)), - (EXTRACT_SUBREG (Inst (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), SPR:$a, arm_ssubreg_0)), - arm_ssubreg_0)>; + (EXTRACT_SUBREG (Inst (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), + SPR:$a, arm_ssubreg_0)), + arm_ssubreg_0)>; // Narrow 2-register intrinsics. class N2VNInt op24_23, bits<2> op21_20, bits<2> op19_18, @@ -328,9 +329,11 @@ // Basic 3-register operations, scalar single-precision class N3VDs : NEONFPPat<(f32 (OpNode SPR:$a, SPR:$b)), - (EXTRACT_SUBREG (Inst (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), SPR:$a, arm_ssubreg_0), - (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), SPR:$b, arm_ssubreg_0)), - arm_ssubreg_0)>; + (EXTRACT_SUBREG (Inst (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), + SPR:$a, arm_ssubreg_0), + (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), + SPR:$b, arm_ssubreg_0)), + arm_ssubreg_0)>; // Basic 3-register intrinsics, both double- and quad-register. class N3VDInt op21_20, bits<4> op11_8, bit op4, @@ -372,10 +375,13 @@ class N3VDMulOps : NEONFPPat<(f32 (OpNode SPR:$acc, (f32 (MulNode SPR:$a, SPR:$b)))), - (EXTRACT_SUBREG (Inst (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), SPR:$acc, arm_ssubreg_0), - (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), SPR:$a, arm_ssubreg_0), - (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), SPR:$b, arm_ssubreg_0)), - arm_ssubreg_0)>; + (EXTRACT_SUBREG (Inst (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), + SPR:$acc, arm_ssubreg_0), + (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), + SPR:$a, arm_ssubreg_0), + (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), + SPR:$b, arm_ssubreg_0)), + arm_ssubreg_0)>; // Neon 3-argument intrinsics, both double- and quad-register. // The destination register is also used as the first source operand register. From bruno.cardoso at gmail.com Wed Aug 5 01:57:04 2009 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Wed, 05 Aug 2009 06:57:04 -0000 Subject: [llvm-commits] [llvm] r78176 - in /llvm/trunk: include/llvm/Target/TargetELFWriterInfo.h lib/CodeGen/ELF.h lib/CodeGen/ELFCodeEmitter.cpp lib/CodeGen/ELFWriter.cpp lib/CodeGen/ELFWriter.h lib/CodeGen/ObjectCodeEmitter.cpp lib/Target/X86/X86ELFWriterInfo.cpp lib/Target/X86/X86ELFWriterInfo.h Message-ID: <200908050657.n756v4Cq008421@zion.cs.uiuc.edu> Author: bruno Date: Wed Aug 5 01:57:03 2009 New Revision: 78176 URL: http://llvm.org/viewvc/llvm-project?rev=78176&view=rev Log: - Remove custom handling of jumptables by the elf writter (this was a dirty hack and isn't need anymore since the last x86 code emitter patch) - Add a target-dependent modifier to addend calculation - Use R_X86_64_32S relocation for X86::reloc_absolute_word_sext - Use getELFSectionFlags whenever possible - fix getTextSection to use TLOF and emit the right text section - Handle global emission for static ctors, dtors and Type::PointerTyID - Some minor fixes Modified: llvm/trunk/include/llvm/Target/TargetELFWriterInfo.h llvm/trunk/lib/CodeGen/ELF.h llvm/trunk/lib/CodeGen/ELFCodeEmitter.cpp llvm/trunk/lib/CodeGen/ELFWriter.cpp llvm/trunk/lib/CodeGen/ELFWriter.h llvm/trunk/lib/CodeGen/ObjectCodeEmitter.cpp llvm/trunk/lib/Target/X86/X86ELFWriterInfo.cpp llvm/trunk/lib/Target/X86/X86ELFWriterInfo.h Modified: llvm/trunk/include/llvm/Target/TargetELFWriterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetELFWriterInfo.h?rev=78176&r1=78175&r2=78176&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetELFWriterInfo.h (original) +++ llvm/trunk/include/llvm/Target/TargetELFWriterInfo.h Wed Aug 5 01:57:03 2009 @@ -89,14 +89,6 @@ : (hasRelocationAddend() ? 12 : 8); } - /// hasCustomJumpTableIndexRelTy - Returns true if the target has a - /// specific relocation type for a jump table index. - virtual bool hasCustomJumpTableIndexRelTy() const { return false; } - - /// getJumpTableIndexRelTy - Returns the target specific relocation type - /// for a jump table index. - virtual unsigned getJumpTableIndexRelTy() const { return 0; } - /// getRelocationType - Returns the target specific ELF Relocation type. /// 'MachineRelTy' contains the object code independent relocation type virtual unsigned getRelocationType(unsigned MachineRelTy) const = 0; @@ -107,7 +99,8 @@ /// getDefaultAddendForRelTy - Gets the default addend value for a /// relocation entry based on the target ELF relocation type. - virtual long int getDefaultAddendForRelTy(unsigned RelTy) const = 0; + virtual long int getDefaultAddendForRelTy(unsigned RelTy, + long int Modifier = 0) const = 0; /// getRelTySize - Returns the size of relocatable field in bits virtual unsigned getRelocationTySize(unsigned RelTy) const = 0; Modified: llvm/trunk/lib/CodeGen/ELF.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ELF.h?rev=78176&r1=78175&r2=78176&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/ELF.h (original) +++ llvm/trunk/lib/CodeGen/ELF.h Wed Aug 5 01:57:03 2009 @@ -136,6 +136,18 @@ return Sym; } + // getFileSym - Returns a elf symbol to represent the module identifier + static ELFSym *getUndefGV(const GlobalValue *GV) { + ELFSym *Sym = new ELFSym(); + Sym->Source.GV = GV; + Sym->setBind(STB_GLOBAL); + Sym->setType(STT_NOTYPE); + Sym->setVisibility(STV_DEFAULT); + Sym->SectionIdx = 0; //ELFSection::SHN_UNDEF; + Sym->SourceType = isGV; + return Sym; + } + // ELF specific fields unsigned NameIdx; // Index in .strtab of name, once emitted. uint64_t Value; Modified: llvm/trunk/lib/CodeGen/ELFCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ELFCodeEmitter.cpp?rev=78176&r1=78175&r2=78176&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/ELFCodeEmitter.cpp (original) +++ llvm/trunk/lib/CodeGen/ELFCodeEmitter.cpp Wed Aug 5 01:57:03 2009 @@ -40,7 +40,7 @@ << MF.getFunction()->getName() << "\n"); // Get the ELF Section that this function belongs in. - ES = &EW.getTextSection(); + ES = &EW.getTextSection(MF.getFunction()); // Set the desired binary object to be used by the code emitters setBinaryObject(ES); @@ -52,7 +52,7 @@ ES->emitAlignment(Align); // Update the section alignment if needed. - if (ES->Align < Align) ES->Align = Align; + ES->Align = std::max(ES->Align, Align); // Record the function start offset FnStartOff = ES->getCurrentPCOffset(); @@ -73,7 +73,7 @@ EW.getGlobalELFVisibility(F)); FnSym->SectionIdx = ES->SectionIdx; FnSym->Size = ES->getCurrentPCOffset()-FnStartOff; - EW.addGlobalSymbol(F); + EW.addGlobalSymbol(F, true); // Offset from start of Section FnSym->Value = FnStartOff; @@ -83,22 +83,21 @@ // Patch up Jump Table Section relocations to use the real MBBs offsets // now that the MBB label offsets inside the function are known. - ELFSection &JTSection = EW.getJumpTableSection(); - for (std::vector::iterator MRI = JTRelocations.begin(), - MRE = JTRelocations.end(); MRI != MRE; ++MRI) { - MachineRelocation &MR = *MRI; - unsigned MBBOffset = getMachineBasicBlockAddress(MR.getBasicBlock()); - MR.setResultPointer((void*)MBBOffset); - MR.setConstantVal(ES->SectionIdx); - JTSection.addRelocation(MR); + if (!MF.getJumpTableInfo()->isEmpty()) { + ELFSection &JTSection = EW.getJumpTableSection(); + for (std::vector::iterator MRI = JTRelocations.begin(), + MRE = JTRelocations.end(); MRI != MRE; ++MRI) { + MachineRelocation &MR = *MRI; + unsigned MBBOffset = getMachineBasicBlockAddress(MR.getBasicBlock()); + MR.setResultPointer((void*)MBBOffset); + MR.setConstantVal(ES->SectionIdx); + JTSection.addRelocation(MR); + } } - // Relocations - // ----------- // If we have emitted any relocations to function-specific objects such as // basic blocks, constant pools entries, or jump tables, record their - // addresses now so that we can rewrite them with the correct addresses - // later. + // addresses now so that we can rewrite them with the correct addresses later for (unsigned i = 0, e = Relocations.size(); i != e; ++i) { MachineRelocation &MR = Relocations[i]; intptr_t Addr; @@ -115,6 +114,7 @@ MR.setConstantVal(CPSections[MR.getConstantPoolIndex()]); MR.setResultPointer((void*)Addr); } else if (MR.isJumpTableIndex()) { + ELFSection &JTSection = EW.getJumpTableSection(); Addr = getJumpTableEntryAddress(MR.getJumpTableIndex()); MR.setConstantVal(JTSection.SectionIdx); MR.setResultPointer((void*)Addr); Modified: llvm/trunk/lib/CodeGen/ELFWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ELFWriter.cpp?rev=78176&r1=78175&r2=78176&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/ELFWriter.cpp (original) +++ llvm/trunk/lib/CodeGen/ELFWriter.cpp Wed Aug 5 01:57:03 2009 @@ -76,6 +76,7 @@ ELFWriter::ELFWriter(raw_ostream &o, TargetMachine &tm) : MachineFunctionPass(&ID), O(o), TM(tm), OutContext(*new MCContext()), + TLOF(TM.getTargetLowering()->getObjFileLowering()), is64Bit(TM.getTargetData()->getPointerSizeInBits() == 64), isLittleEndian(TM.getTargetData()->isLittleEndian()), ElfHdr(isLittleEndian, is64Bit) { @@ -99,8 +100,6 @@ // the module to the ELF file. bool ELFWriter::doInitialization(Module &M) { // Initialize TargetLoweringObjectFile. - const TargetLoweringObjectFile &TLOF = - TM.getTargetLowering()->getObjFileLowering(); const_cast(TLOF).Initialize(OutContext, TM); Mang = new Mangler(M); @@ -160,11 +159,13 @@ return false; } -// addGlobalSymbol - Add a global to be processed and to the -// global symbol lookup, use a zero index for non private symbols -// because the table index will be determined later. -void ELFWriter::addGlobalSymbol(const GlobalValue *GV) { +// addGlobalSymbol - Add a global to be processed and to the global symbol +// lookup, use a zero index because the table index will be determined later. +void ELFWriter::addGlobalSymbol(const GlobalValue *GV, + bool AddToLookup /* = false */) { PendingGlobals.insert(GV); + if (AddToLookup) + GblSymLookup[GV] = 0; } // addExternalSymbol - Add the external to be processed and to the @@ -175,20 +176,39 @@ ExtSymLookup[External] = 0; } -// Get jump table section on the section name returned by TAI -ELFSection &ELFWriter::getJumpTableSection() { - unsigned Align = TM.getTargetData()->getPointerABIAlignment(); - - const TargetLoweringObjectFile &TLOF = - TM.getTargetLowering()->getObjFileLowering(); +// getCtorSection - Get the static constructor section +ELFSection &ELFWriter::getCtorSection() { + const MCSection *Ctor = TLOF.getStaticCtorSection(); + return getSection(Ctor->getName(), ELFSection::SHT_PROGBITS, + getElfSectionFlags(Ctor->getKind())); +} - return getSection(TLOF.getSectionForConstant(SectionKind::getReadOnly()) - ->getName(), +// getDtorSection - Get the static destructor section +ELFSection &ELFWriter::getDtorSection() { + const MCSection *Dtor = TLOF.getStaticDtorSection(); + return getSection(Dtor->getName(), ELFSection::SHT_PROGBITS, + getElfSectionFlags(Dtor->getKind())); +} + +// getTextSection - Get the text section for the specified function +ELFSection &ELFWriter::getTextSection(Function *F) { + const MCSection *Text = TLOF.SectionForGlobal(F, Mang, TM); + return getSection(Text->getName(), ELFSection::SHT_PROGBITS, + getElfSectionFlags(Text->getKind())); +} + +// getJumpTableSection - Get a read only section for constants when +// emitting jump tables. TODO: add PIC support +ELFSection &ELFWriter::getJumpTableSection() { + const MCSection *JT = TLOF.getSectionForConstant(SectionKind::getReadOnly()); + return getSection(JT->getName(), ELFSection::SHT_PROGBITS, - ELFSection::SHF_ALLOC, Align); + getElfSectionFlags(JT->getKind()), + TM.getTargetData()->getPointerABIAlignment()); } -// Get a constant pool section based on the section name returned by TAI +// getConstantPoolSection - Get a constant pool section based on the machine +// constant pool entry type and relocation info. ELFSection &ELFWriter::getConstantPoolSection(MachineConstantPoolEntry &CPE) { SectionKind Kind; switch (CPE.getRelocationInfo()) { @@ -206,17 +226,14 @@ } } - const TargetLoweringObjectFile &TLOF = - TM.getTargetLowering()->getObjFileLowering(); - return getSection(TLOF.getSectionForConstant(Kind)->getName(), ELFSection::SHT_PROGBITS, - ELFSection::SHF_MERGE | ELFSection::SHF_ALLOC, + getElfSectionFlags(Kind), CPE.getAlignment()); } -// Return the relocation section of section 'S'. 'RelA' is true -// if the relocation section contains entries with addends. +// getRelocSection - Return the relocation section of section 'S'. 'RelA' +// is true if the relocation section contains entries with addends. ELFSection &ELFWriter::getRelocSection(ELFSection &S) { unsigned SectionHeaderTy = TEW->hasRelocationAddend() ? ELFSection::SHT_RELA : ELFSection::SHT_REL; @@ -248,7 +265,7 @@ if (GV->hasInternalLinkage()) return ELFSym::STB_LOCAL; - if (GV->hasWeakLinkage()) + if (GV->isWeakForLinker()) return ELFSym::STB_WEAK; return ELFSym::STB_GLOBAL; @@ -267,9 +284,11 @@ // getElfSectionFlags - Get the ELF Section Header flags based // on the flags defined in SectionKind.h. -unsigned ELFWriter::getElfSectionFlags(SectionKind Kind) { - unsigned ElfSectionFlags = ELFSection::SHF_ALLOC; - +unsigned ELFWriter::getElfSectionFlags(SectionKind Kind, bool IsAlloc) { + unsigned ElfSectionFlags = 0; + + if (IsAlloc) + ElfSectionFlags |= ELFSection::SHF_ALLOC; if (Kind.isText()) ElfSectionFlags |= ELFSection::SHF_EXECINSTR; if (Kind.isWriteable()) @@ -287,7 +306,8 @@ // isELFUndefSym - the symbol has no section and must be placed in // the symbol table with a reference to the null section. static bool isELFUndefSym(const GlobalValue *GV) { - return GV->isDeclaration(); + // Functions which make up until this point references are an undef symbol + return GV->isDeclaration() || (isa(GV)); } // isELFBssSym - for an undef or null value, the symbol must go to a bss @@ -305,7 +325,7 @@ } // isELFDataSym - if the symbol is an initialized but no null constant -// it must go to some kind of data section gathered from TAI +// it must go to some kind of data section static bool isELFDataSym(const Constant *CV) { return (!(CV->isNullValue() || isa(CV))); } @@ -317,27 +337,22 @@ if (GblSymLookup.find(GV) != GblSymLookup.end()) return; - // If the global is a function already emited in the text section - // just add it to the global symbol lookup with a zero index to be - // patched up later. - if (isa(GV) && !GV->isDeclaration()) { - GblSymLookup[GV] = 0; - return; - } - // Handle ELF Bind, Visibility and Type for the current symbol unsigned SymBind = getGlobalELFBinding(GV); - ELFSym *GblSym = ELFSym::getGV(GV, SymBind, getGlobalELFType(GV), - getGlobalELFVisibility(GV)); + unsigned SymType = getGlobalELFType(GV); - if (isELFUndefSym(GV)) { - GblSym->SectionIdx = ELFSection::SHN_UNDEF; - } else { + // All undef symbols have the same binding, type and visibily and + // are classified regardless of their type. + ELFSym *GblSym = isELFUndefSym(GV) ? ELFSym::getUndefGV(GV) + : ELFSym::getGV(GV, SymBind, SymType, getGlobalELFVisibility(GV)); + + if (!isELFUndefSym(GV)) { assert(isa(GV) && "GV not a global variable!"); const GlobalVariable *GVar = dyn_cast(GV); - const TargetLoweringObjectFile &TLOF = - TM.getTargetLowering()->getObjFileLowering(); + // Handle special llvm globals + if (EmitSpecialLLVMGlobal(GVar)) + return; // Get the ELF section where this global belongs from TLOF const MCSection *S = TLOF.SectionForGlobal(GV, Mang, TM); @@ -474,39 +489,106 @@ for (unsigned I = 0, E = PTy->getNumElements(); I < E; ++I) EmitGlobalConstant(CP->getOperand(I), GblS); return; - } else if (const GlobalValue *GV = dyn_cast(CV)) { - // This is a constant address for a global variable or function and - // therefore must be referenced using a relocation entry. - - // Check if the referenced symbol is already emitted - if (GblSymLookup.find(GV) == GblSymLookup.end()) - EmitGlobal(GV); - - // Create the relocation entry for the global value - MachineRelocation MR = - MachineRelocation::getGV(GblS.getCurrentPCOffset(), - TEW->getAbsoluteLabelMachineRelTy(), - const_cast(GV)); - - // Fill the data entry with zeros - for (unsigned i=0; i < Size; ++i) - GblS.emitByte(0); - - // Add the relocation entry for the current data section - GblS.addRelocation(MR); - return; } else if (const ConstantExpr *CE = dyn_cast(CV)) { if (CE->getOpcode() == Instruction::BitCast) { EmitGlobalConstant(CE->getOperand(0), GblS); return; } - // See AsmPrinter::EmitConstantValueOnly for other ConstantExpr types - llvm_unreachable("Unsupported ConstantExpr type"); + std::string msg(CE->getOpcodeName()); + raw_string_ostream ErrorMsg(msg); + ErrorMsg << ": Unsupported ConstantExpr type"; + llvm_report_error(ErrorMsg.str()); + } else if (CV->getType()->getTypeID() == Type::PointerTyID) { + // Fill the data entry with zeros or emit a relocation entry + if (isa(CV)) { + for (unsigned i=0; i < Size; ++i) + GblS.emitByte(0); + } else { + emitGlobalDataRelocation(cast(CV), + TD->getPointerSize(), GblS); + } + return; + } else if (const GlobalValue *GV = dyn_cast(CV)) { + // This is a constant address for a global variable or function and + // therefore must be referenced using a relocation entry. + emitGlobalDataRelocation(GV, Size, GblS); + return; } - llvm_unreachable("Unknown global constant type"); + std::string msg; + raw_string_ostream ErrorMsg(msg); + ErrorMsg << "Constant unimp for type: " << *CV->getType(); + llvm_report_error(ErrorMsg.str()); +} + +void ELFWriter::emitGlobalDataRelocation(const GlobalValue *GV, unsigned Size, + ELFSection &GblS) { + // Create the relocation entry for the global value + MachineRelocation MR = + MachineRelocation::getGV(GblS.getCurrentPCOffset(), + TEW->getAbsoluteLabelMachineRelTy(), + const_cast(GV)); + + // Fill the data entry with zeros + for (unsigned i=0; i < Size; ++i) + GblS.emitByte(0); + + // Add the relocation entry for the current data section + GblS.addRelocation(MR); +} + +/// EmitSpecialLLVMGlobal - Check to see if the specified global is a +/// special global used by LLVM. If so, emit it and return true, otherwise +/// do nothing and return false. +bool ELFWriter::EmitSpecialLLVMGlobal(const GlobalVariable *GV) { + if (GV->getName() == "llvm.used") + llvm_unreachable("not implemented yet"); + + // Ignore debug and non-emitted data. This handles llvm.compiler.used. + if (GV->getSection() == "llvm.metadata" || + GV->hasAvailableExternallyLinkage()) + return true; + + if (!GV->hasAppendingLinkage()) return false; + + assert(GV->hasInitializer() && "Not a special LLVM global!"); + + const TargetData *TD = TM.getTargetData(); + unsigned Align = TD->getPointerPrefAlignment(); + if (GV->getName() == "llvm.global_ctors") { + ELFSection &Ctor = getCtorSection(); + Ctor.emitAlignment(Align); + EmitXXStructorList(GV->getInitializer(), Ctor); + return true; + } + + if (GV->getName() == "llvm.global_dtors") { + ELFSection &Dtor = getDtorSection(); + Dtor.emitAlignment(Align); + EmitXXStructorList(GV->getInitializer(), Dtor); + return true; + } + + return false; } +/// EmitXXStructorList - Emit the ctor or dtor list. This just emits out the +/// function pointers, ignoring the init priority. +void ELFWriter::EmitXXStructorList(Constant *List, ELFSection &Xtor) { + // Should be an array of '{ int, void ()* }' structs. The first value is the + // init priority, which we ignore. + if (!isa(List)) return; + ConstantArray *InitList = cast(List); + for (unsigned i = 0, e = InitList->getNumOperands(); i != e; ++i) + if (ConstantStruct *CS = dyn_cast(InitList->getOperand(i))){ + if (CS->getNumOperands() != 2) return; // Not array of 2-element structs. + + if (CS->getOperand(1)->isNullValue()) + return; // Found a null terminator, exit printing. + // Emit the function pointer. + EmitGlobalConstant(CS->getOperand(1), Xtor); + } +} bool ELFWriter::runOnMachineFunction(MachineFunction &MF) { // Nothing to do here, this is all done through the ElfCE object above. @@ -638,7 +720,8 @@ Addend = PrivateSyms[SymIdx]->Value; SymIdx = SectionList[SectionIdx]->getSymbolTableIndex(); } else { - Addend = TEW->getDefaultAddendForRelTy(RelType); + int64_t GlobalOffset = MR.getConstantVal(); + Addend = TEW->getDefaultAddendForRelTy(RelType, GlobalOffset); } } else if (MR.isExternalSymbol()) { const char *ExtSym = MR.getExternalSymbol(); @@ -648,29 +731,26 @@ // Get the symbol index for the section symbol unsigned SectionIdx = MR.getConstantVal(); SymIdx = SectionList[SectionIdx]->getSymbolTableIndex(); - Addend = (uint64_t)MR.getResultPointer(); + + // The symbol offset inside the section + int64_t SymOffset = (int64_t)MR.getResultPointer(); // For pc relative relocations where symbols are defined in the same // section they are referenced, ignore the relocation entry and patch // the relocatable field with the symbol offset directly. if (S.SectionIdx == SectionIdx && TEW->isPCRelativeRel(RelType)) { - int64_t Value = TEW->computeRelocation(Addend, RelOffset, RelType); + int64_t Value = TEW->computeRelocation(SymOffset, RelOffset, RelType); RelocateField(S, RelOffset, Value, RelTySize); continue; } - // Handle Jump Table Index relocation - if ((SectionIdx == getJumpTableSection().SectionIdx) && - TEW->hasCustomJumpTableIndexRelTy()) { - RelType = TEW->getJumpTableIndexRelTy(); - RelTySize = TEW->getRelocationTySize(RelType); - } + Addend = TEW->getDefaultAddendForRelTy(RelType, SymOffset); } // The target without addend on the relocation symbol must be // patched in the relocation place itself to contain the addend - if (!HasRelA) - RelocateField(S, RelOffset, Addend, RelTySize); + // otherwise write zeros to make sure there is no garbage there + RelocateField(S, RelOffset, HasRelA ? 0 : Addend, RelTySize); // Get the relocation entry and emit to the relocation section ELFRelocation Rel(RelOffset, SymIdx, RelType, HasRelA, Addend); Modified: llvm/trunk/lib/CodeGen/ELFWriter.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ELFWriter.h?rev=78176&r1=78175&r2=78176&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/ELFWriter.h (original) +++ llvm/trunk/lib/CodeGen/ELFWriter.h Wed Aug 5 01:57:03 2009 @@ -33,6 +33,7 @@ class ObjectCodeEmitter; class TargetAsmInfo; class TargetELFWriterInfo; + class TargetLoweringObjectFile; class raw_ostream; class SectionKind; class MCContext; @@ -66,6 +67,7 @@ /// Target machine description. TargetMachine &TM; + /// Context object for machine code objects. MCContext &OutContext; /// Target Elf Writer description. @@ -78,6 +80,10 @@ /// code for functions to the .o file. ELFCodeEmitter *ElfCE; + /// TLOF - Target Lowering Object File, provide section names for globals + /// and other object file specific stuff + const TargetLoweringObjectFile &TLOF; + /// TAI - Target Asm Info, provide information about section names for /// globals and other target specific stuff. const TargetAsmInfo *TAI; @@ -176,13 +182,6 @@ return *SN; } - /// TODO: support mangled names here to emit the right .text section - /// for c++ object files. - ELFSection &getTextSection() { - return getSection(".text", ELFSection::SHT_PROGBITS, - ELFSection::SHF_EXECINSTR | ELFSection::SHF_ALLOC); - } - ELFSection &getNonExecStackSection() { return getSection(".note.GNU-stack", ELFSection::SHT_PROGBITS, 0, 1); } @@ -213,21 +212,24 @@ return getSection("", ELFSection::SHT_NULL, 0); } + ELFSection &getCtorSection(); + ELFSection &getDtorSection(); ELFSection &getJumpTableSection(); ELFSection &getConstantPoolSection(MachineConstantPoolEntry &CPE); + ELFSection &getTextSection(Function *F); ELFSection &getRelocSection(ELFSection &S); // Helpers for obtaining ELF specific info. unsigned getGlobalELFBinding(const GlobalValue *GV); unsigned getGlobalELFType(const GlobalValue *GV); unsigned getGlobalELFVisibility(const GlobalValue *GV); - unsigned getElfSectionFlags(SectionKind Kind); - - // addGlobalSymbol - Add a global to be processed and to the - // global symbol lookup, use a zero index for non private symbols - // because the table index will be determined later. - void addGlobalSymbol(const GlobalValue *GV); + unsigned getElfSectionFlags(SectionKind Kind, bool IsAlloc = true); + // addGlobalSymbol - Add a global to be processed and to + // the global symbol lookup, use a zero index because the table + // index will be determined later. + void addGlobalSymbol(const GlobalValue *GV, bool AddToLookup = false); + // addExternalSymbol - Add the external to be processed and to the // external symbol lookup, use a zero index because the symbol // table index will be determined later @@ -246,7 +248,10 @@ void EmitGlobalConstant(const Constant *C, ELFSection &GblS); void EmitGlobalConstantStruct(const ConstantStruct *CVS, ELFSection &GblS); - ELFSection &getGlobalSymELFSection(const GlobalVariable *GV, ELFSym &Sym); + void emitGlobalDataRelocation(const GlobalValue *GV, unsigned Size, + ELFSection &GblS); + bool EmitSpecialLLVMGlobal(const GlobalVariable *GV); + void EmitXXStructorList(Constant *List, ELFSection &Xtor); void EmitRelocations(); void EmitRelocation(BinaryObject &RelSec, ELFRelocation &Rel, bool HasRelA); void EmitSectionHeader(BinaryObject &SHdrTab, const ELFSection &SHdr); Modified: llvm/trunk/lib/CodeGen/ObjectCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ObjectCodeEmitter.cpp?rev=78176&r1=78175&r2=78176&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/ObjectCodeEmitter.cpp (original) +++ llvm/trunk/lib/CodeGen/ObjectCodeEmitter.cpp Wed Aug 5 01:57:03 2009 @@ -55,8 +55,7 @@ BO->emitDWordBE(W); } -/// emitAlignment - Move the CurBufferPtr pointer up the the specified -/// alignment (saturated to BufferEnd of course). +/// emitAlignment - Align 'BO' to the necessary alignment boundary. void ObjectCodeEmitter::emitAlignment(unsigned Alignment /* 0 */, uint8_t fill /* 0 */) { BO->emitAlignment(Alignment, fill); @@ -138,5 +137,7 @@ return CPSections[Index]; } +/// getNoopSize - Returns the size of the no operation instruction + } // end namespace llvm Modified: llvm/trunk/lib/Target/X86/X86ELFWriterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ELFWriterInfo.cpp?rev=78176&r1=78175&r2=78176&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ELFWriterInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ELFWriterInfo.cpp Wed Aug 5 01:57:03 2009 @@ -39,6 +39,8 @@ return R_X86_64_PC32; case X86::reloc_absolute_word: return R_X86_64_32; + case X86::reloc_absolute_word_sext: + return R_X86_64_32S; case X86::reloc_absolute_dword: return R_X86_64_64; case X86::reloc_picrel_word: @@ -51,6 +53,7 @@ return R_386_PC32; case X86::reloc_absolute_word: return R_386_32; + case X86::reloc_absolute_word_sext: case X86::reloc_absolute_dword: case X86::reloc_picrel_word: default: @@ -60,20 +63,22 @@ return 0; } -long int X86ELFWriterInfo::getDefaultAddendForRelTy(unsigned RelTy) const { +long int X86ELFWriterInfo::getDefaultAddendForRelTy(unsigned RelTy, + long int Modifier) const { if (is64Bit) { switch(RelTy) { - case R_X86_64_PC32: return -4; + case R_X86_64_PC32: return Modifier - 4; case R_X86_64_32: + case R_X86_64_32S: case R_X86_64_64: - return 0; + return Modifier; default: llvm_unreachable("unknown x86_64 relocation type"); } } else { switch(RelTy) { - case R_386_PC32: return -4; - case R_386_32: return 0; + case R_386_PC32: return Modifier - 4; + case R_386_32: return Modifier; default: llvm_unreachable("unknown x86 relocation type"); } Modified: llvm/trunk/lib/Target/X86/X86ELFWriterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ELFWriterInfo.h?rev=78176&r1=78175&r2=78176&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ELFWriterInfo.h (original) +++ llvm/trunk/lib/Target/X86/X86ELFWriterInfo.h Wed Aug 5 01:57:03 2009 @@ -49,19 +49,10 @@ /// ELF relocation entry. virtual bool hasRelocationAddend() const { return is64Bit ? true : false; } - /// hasCustomJumpTableIndexRelTy - Returns true if the target has a - /// specific relocation type for a jump table index. - virtual bool hasCustomJumpTableIndexRelTy() const { - return is64Bit ? true : false; - } - - /// getJumpTableIndexRelTy - Returns the target specific relocation type - /// for a jump table index. - virtual unsigned getJumpTableIndexRelTy() const { return R_X86_64_32S; } - /// getDefaultAddendForRelTy - Gets the default addend value for a /// relocation entry based on the target ELF relocation type. - virtual long int getDefaultAddendForRelTy(unsigned RelTy) const; + virtual long int getDefaultAddendForRelTy(unsigned RelTy, + long int Modifier = 0) const; /// getRelTySize - Returns the size of relocatable field in bits virtual unsigned getRelocationTySize(unsigned RelTy) const; From bruno.cardoso at gmail.com Wed Aug 5 02:00:47 2009 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Wed, 05 Aug 2009 07:00:47 -0000 Subject: [llvm-commits] [llvm] r78177 - /llvm/trunk/lib/CodeGen/ObjectCodeEmitter.cpp Message-ID: <200908050700.n7570nYf008568@zion.cs.uiuc.edu> Author: bruno Date: Wed Aug 5 02:00:43 2009 New Revision: 78177 URL: http://llvm.org/viewvc/llvm-project?rev=78177&view=rev Log: Remove accidental commited comment Modified: llvm/trunk/lib/CodeGen/ObjectCodeEmitter.cpp Modified: llvm/trunk/lib/CodeGen/ObjectCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ObjectCodeEmitter.cpp?rev=78177&r1=78176&r2=78177&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/ObjectCodeEmitter.cpp (original) +++ llvm/trunk/lib/CodeGen/ObjectCodeEmitter.cpp Wed Aug 5 02:00:43 2009 @@ -137,7 +137,5 @@ return CPSections[Index]; } -/// getNoopSize - Returns the size of the no operation instruction - } // end namespace llvm From evan.cheng at apple.com Wed Aug 5 02:05:42 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 05 Aug 2009 07:05:42 -0000 Subject: [llvm-commits] [llvm] r78178 - in /llvm/trunk: lib/CodeGen/SimpleRegisterCoalescing.cpp test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll Message-ID: <200908050705.n7575g9L008827@zion.cs.uiuc.edu> Author: evancheng Date: Wed Aug 5 02:05:41 2009 New Revision: 78178 URL: http://llvm.org/viewvc/llvm-project?rev=78178&view=rev Log: Another nasty coalescer bug (is there another kind): After coalescing reg1027's def and kill are both at the same point: %reg1027,0.000000e+00 = [56,814:0) 0 at 70-(814) bb5: 60 %reg1027 = t2MOVr %reg1027, 14, %reg0, %reg0 68 %reg1027 = t2LDRi12 %reg1027, 8, 14, %reg0 76 t2CMPzri %reg1038, 0, 14, %reg0, %CPSR 84 %reg1027 = t2MOVr %reg1027, 14, %reg0, %reg0 96 t2Bcc mbb, 1, %CPSR Do not remove the kill marker on t2LDRi12. Added: llvm/trunk/test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=78178&r1=78177&r2=78178&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original) +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Wed Aug 5 02:05:41 2009 @@ -804,12 +804,26 @@ for (MachineRegisterInfo::use_iterator UI = mri_->use_begin(Reg), UE = mri_->use_end(); UI != UE; ++UI) { MachineOperand &UseMO = UI.getOperand(); - if (UseMO.isKill()) { - MachineInstr *UseMI = UseMO.getParent(); - unsigned UseIdx = li_->getUseIndex(li_->getInstructionIndex(UseMI)); - const LiveRange *UI = LI.getLiveRangeContaining(UseIdx); - if (!UI || !LI.isKill(UI->valno, UseIdx+1)) + if (!UseMO.isKill()) + continue; + MachineInstr *UseMI = UseMO.getParent(); + unsigned UseIdx = li_->getUseIndex(li_->getInstructionIndex(UseMI)); + const LiveRange *UI = LI.getLiveRangeContaining(UseIdx); + if (!UI || !LI.isKill(UI->valno, UseIdx+1)) { + if (UI->valno->def != UseIdx+1) { + // Interesting problem. After coalescing reg1027's def and kill are both + // at the same point: %reg1027,0.000000e+00 = [56,814:0) 0 at 70-(814) + // + // bb5: + // 60 %reg1027 = t2MOVr %reg1027, 14, %reg0, %reg0 + // 68 %reg1027 = t2LDRi12 %reg1027, 8, 14, %reg0 + // 76 t2CMPzri %reg1038, 0, 14, %reg0, %CPSR + // 84 %reg1027 = t2MOVr %reg1027, 14, %reg0, %reg0 + // 96 t2Bcc mbb, 1, %CPSR + // + // Do not remove the kill marker on t2LDRi12. UseMO.setIsKill(false); + } } } } Added: llvm/trunk/test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll?rev=78178&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll (added) +++ llvm/trunk/test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll Wed Aug 5 02:05:41 2009 @@ -0,0 +1,153 @@ +; RUN: llvm-as < %s | llc -mtriple=thumbv7-apple-darwin -mattr=+neon,+neonfp -relocation-model=pic -disable-fp-elim + + type { %struct.GAP } ; type %0 + type { i16, i8, i8 } ; type %1 + type { [2 x i32], [2 x i32] } ; type %2 + type { %struct.rec* } ; type %3 + type { i8, i8, i16, i8, i8, i8, i8 } ; type %4 + %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 } + %struct.FILE_POS = type { i8, i8, i16, i32 } + %struct.FIRST_UNION = type { %struct.FILE_POS } + %struct.FOURTH_UNION = type { %struct.STYLE } + %struct.GAP = type { i8, i8, i16 } + %struct.LIST = type { %struct.rec*, %struct.rec* } + %struct.SECOND_UNION = type { %1 } + %struct.STYLE = type { %0, %0, i16, i16, i32 } + %struct.THIRD_UNION = type { %2 } + %struct.__sFILEX = type opaque + %struct.__sbuf = type { i8*, i32 } + %struct.head_type = type { [2 x %struct.LIST], %struct.FIRST_UNION, %struct.SECOND_UNION, %struct.THIRD_UNION, %struct.FOURTH_UNION, %struct.rec*, %3, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, i32 } + %struct.rec = type { %struct.head_type } + at .str24239 = external constant [20 x i8], align 1 ; <[20 x i8]*> [#uses=1] + at no_file_pos = external global %4 ; <%4*> [#uses=1] + at zz_tmp = external global %struct.rec* ; <%struct.rec**> [#uses=1] + at .str81872 = external constant [10 x i8], align 1 ; <[10 x i8]*> [#uses=1] + at out_fp = external global %struct.FILE* ; <%struct.FILE**> [#uses=2] + at cpexists = external global i32 ; [#uses=2] + at .str212784 = external constant [17 x i8], align 1 ; <[17 x i8]*> [#uses=1] + at .str1822946 = external constant [8 x i8], align 1 ; <[8 x i8]*> [#uses=1] + at .str1842948 = external constant [11 x i8], align 1 ; <[11 x i8]*> [#uses=1] + +declare arm_apcscc i32 @fprintf(%struct.FILE* nocapture, i8* nocapture, ...) nounwind + +declare arm_apcscc i32 @"\01_fwrite"(i8*, i32, i32, i8*) + +declare arm_apcscc %struct.FILE* @OpenIncGraphicFile(i8*, i8 zeroext, %struct.rec** nocapture, %struct.FILE_POS*, i32* nocapture) nounwind + +declare arm_apcscc void @Error(i32, i32, i8*, i32, %struct.FILE_POS*, ...) nounwind + +declare arm_apcscc i8* @fgets(i8*, i32, %struct.FILE* nocapture) nounwind + +define arm_apcscc void @PS_PrintGraphicInclude(%struct.rec* %x, i32 %colmark, i32 %rowmark) nounwind { +entry: + br label %bb5 + +bb5: ; preds = %bb5, %entry + %.pn = phi %struct.rec* [ %y.0, %bb5 ], [ undef, %entry ] ; <%struct.rec*> [#uses=1] + %y.0.in = getelementptr %struct.rec* %.pn, i32 0, i32 0, i32 0, i32 1, i32 0 ; <%struct.rec**> [#uses=1] + %y.0 = load %struct.rec** %y.0.in ; <%struct.rec*> [#uses=2] + br i1 undef, label %bb5, label %bb6 + +bb6: ; preds = %bb5 + %0 = call arm_apcscc %struct.FILE* @OpenIncGraphicFile(i8* undef, i8 zeroext 0, %struct.rec** undef, %struct.FILE_POS* null, i32* undef) nounwind ; <%struct.FILE*> [#uses=1] + br i1 false, label %bb.i, label %FontHalfXHeight.exit + +bb.i: ; preds = %bb6 + br label %FontHalfXHeight.exit + +FontHalfXHeight.exit: ; preds = %bb.i, %bb6 + br i1 undef, label %bb.i1, label %FontSize.exit + +bb.i1: ; preds = %FontHalfXHeight.exit + br label %FontSize.exit + +FontSize.exit: ; preds = %bb.i1, %FontHalfXHeight.exit + %1 = load i32* undef, align 4 ; [#uses=1] + %2 = icmp ult i32 0, undef ; [#uses=1] + br i1 %2, label %bb.i5, label %FontName.exit + +bb.i5: ; preds = %FontSize.exit + call arm_apcscc void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 2, i8* getelementptr ([20 x i8]* @.str24239, i32 0, i32 0), i32 0, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*), i8* getelementptr ([10 x i8]* @.str81872, i32 0, i32 0)) nounwind + br label %FontName.exit + +FontName.exit: ; preds = %bb.i5, %FontSize.exit + %3 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* undef, i8* getelementptr ([8 x i8]* @.str1822946, i32 0, i32 0), i32 %1, i8* undef) nounwind ; [#uses=0] + %4 = call arm_apcscc i32 @"\01_fwrite"(i8* getelementptr ([11 x i8]* @.str1842948, i32 0, i32 0), i32 1, i32 10, i8* undef) nounwind ; [#uses=0] + %5 = sub i32 %colmark, undef ; [#uses=1] + %6 = sub i32 %rowmark, undef ; [#uses=1] + %7 = load %struct.FILE** @out_fp, align 4 ; <%struct.FILE*> [#uses=1] + %8 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %7, i8* getelementptr ([17 x i8]* @.str212784, i32 0, i32 0), i32 %5, i32 %6) nounwind ; [#uses=0] + store i32 0, i32* @cpexists, align 4 + %9 = getelementptr %struct.rec* %y.0, i32 0, i32 0, i32 3, i32 0, i32 0, i32 1 ; [#uses=1] + %10 = load i32* %9, align 4 ; [#uses=1] + %11 = sub i32 0, %10 ; [#uses=1] + %12 = load %struct.FILE** @out_fp, align 4 ; <%struct.FILE*> [#uses=1] + %13 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %12, i8* getelementptr ([17 x i8]* @.str212784, i32 0, i32 0), i32 undef, i32 %11) nounwind ; [#uses=0] + store i32 0, i32* @cpexists, align 4 + br label %bb100.outer.outer + +bb100.outer.outer: ; preds = %bb79.critedge, %bb1.i3, %FontName.exit + %x_addr.0.ph.ph = phi %struct.rec* [ %x, %FontName.exit ], [ null, %bb79.critedge ], [ null, %bb1.i3 ] ; <%struct.rec*> [#uses=1] + %14 = getelementptr %struct.rec* %x_addr.0.ph.ph, i32 0, i32 0, i32 1, i32 0 ; <%struct.FILE_POS*> [#uses=0] + br label %bb100.outer + +bb.i80: ; preds = %bb3.i85 + br i1 undef, label %bb2.i84, label %bb2.i51 + +bb2.i84: ; preds = %bb100.outer, %bb.i80 + br i1 undef, label %bb3.i77, label %bb3.i85 + +bb3.i85: ; preds = %bb2.i84 + br i1 false, label %StringBeginsWith.exit88, label %bb.i80 + +StringBeginsWith.exit88: ; preds = %bb3.i85 + br i1 undef, label %bb3.i77, label %bb2.i51 + +bb2.i.i68: ; preds = %bb3.i77 + br label %bb3.i77 + +bb3.i77: ; preds = %bb2.i.i68, %StringBeginsWith.exit88, %bb2.i84 + br i1 false, label %bb1.i58, label %bb2.i.i68 + +bb1.i58: ; preds = %bb3.i77 + unreachable + +bb.i47: ; preds = %bb3.i52 + br i1 undef, label %bb2.i51, label %bb2.i.i15.critedge + +bb2.i51: ; preds = %bb.i47, %StringBeginsWith.exit88, %bb.i80 + %15 = load i8* undef, align 1 ; [#uses=0] + br i1 false, label %StringBeginsWith.exit55thread-split, label %bb3.i52 + +bb3.i52: ; preds = %bb2.i51 + br i1 false, label %StringBeginsWith.exit55, label %bb.i47 + +StringBeginsWith.exit55thread-split: ; preds = %bb2.i51 + br label %StringBeginsWith.exit55 + +StringBeginsWith.exit55: ; preds = %StringBeginsWith.exit55thread-split, %bb3.i52 + br label %bb2.i41 + +bb2.i41: ; preds = %bb2.i41, %StringBeginsWith.exit55 + br label %bb2.i41 + +bb2.i.i15.critedge: ; preds = %bb.i47 + %16 = call arm_apcscc i8* @fgets(i8* undef, i32 512, %struct.FILE* %0) nounwind ; [#uses=0] + %iftmp.560.0 = select i1 undef, i32 2, i32 0 ; [#uses=1] + br label %bb100.outer + +bb2.i8: ; preds = %bb100.outer + br i1 undef, label %bb1.i3, label %bb79.critedge + +bb1.i3: ; preds = %bb2.i8 + br label %bb100.outer.outer + +bb79.critedge: ; preds = %bb2.i8 + store %struct.rec* null, %struct.rec** @zz_tmp, align 4 + br label %bb100.outer.outer + +bb100.outer: ; preds = %bb2.i.i15.critedge, %bb100.outer.outer + %state.0.ph = phi i32 [ 0, %bb100.outer.outer ], [ %iftmp.560.0, %bb2.i.i15.critedge ] ; [#uses=1] + %cond = icmp eq i32 %state.0.ph, 1 ; [#uses=1] + br i1 %cond, label %bb2.i8, label %bb2.i84 +} From evan.cheng at apple.com Wed Aug 5 02:26:19 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 05 Aug 2009 07:26:19 -0000 Subject: [llvm-commits] [llvm] r78179 - in /llvm/trunk: lib/CodeGen/LLVMTargetMachine.cpp test/CodeGen/Thumb2/2009-08-04-ScavengerAssert.ll Message-ID: <200908050726.n757QJEr009469@zion.cs.uiuc.edu> Author: evancheng Date: Wed Aug 5 02:26:17 2009 New Revision: 78179 URL: http://llvm.org/viewvc/llvm-project?rev=78179&view=rev Log: Disable stack coloring with register for now. It's not able to set kill markers. Added: llvm/trunk/test/CodeGen/Thumb2/2009-08-04-ScavengerAssert.ll Modified: llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp Modified: llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp?rev=78179&r1=78178&r2=78179&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp (original) +++ llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp Wed Aug 5 02:26:17 2009 @@ -281,7 +281,9 @@ // Perform stack slot coloring. if (OptLevel != CodeGenOpt::None) - PM.add(createStackSlotColoringPass(OptLevel >= CodeGenOpt::Aggressive)); + // FIXME: Re-enable coloring with register when it's capable of adding + // kill markers. + PM.add(createStackSlotColoringPass(false)); printAndVerify(PM); // Print the register-allocated code Added: llvm/trunk/test/CodeGen/Thumb2/2009-08-04-ScavengerAssert.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/2009-08-04-ScavengerAssert.ll?rev=78179&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/2009-08-04-ScavengerAssert.ll (added) +++ llvm/trunk/test/CodeGen/Thumb2/2009-08-04-ScavengerAssert.ll Wed Aug 5 02:26:17 2009 @@ -0,0 +1,508 @@ +; RUN: llvm-as < %s | llc -mtriple=thumbv7-apple-darwin -mattr=+neon,+neonfp -relocation-model=pic -disable-fp-elim -O3 + + type { i16, i8, i8 } ; type %0 + type { [2 x i32], [2 x i32] } ; type %1 + type { %struct.GAP } ; type %2 + type { %struct.rec* } ; type %3 + type { i8, i8, i16, i8, i8, i8, i8 } ; type %4 + type { i8, i8, i8, i8 } ; type %5 + %struct.COMPOSITE = type { i8, i16, i16 } + %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 } + %struct.FILE_POS = type { i8, i8, i16, i32 } + %struct.FIRST_UNION = type { %struct.FILE_POS } + %struct.FONT_INFO = type { %struct.metrics*, i8*, i16*, %struct.COMPOSITE*, i32, %struct.rec*, %struct.rec*, i16, i16, i16*, i8*, i8*, i16* } + %struct.FOURTH_UNION = type { %struct.STYLE } + %struct.GAP = type { i8, i8, i16 } + %struct.LIST = type { %struct.rec*, %struct.rec* } + %struct.SECOND_UNION = type { %0 } + %struct.STYLE = type { %2, %2, i16, i16, i32 } + %struct.THIRD_UNION = type { %1 } + %struct.__sFILEX = type opaque + %struct.__sbuf = type { i8*, i32 } + %struct.head_type = type { [2 x %struct.LIST], %struct.FIRST_UNION, %struct.SECOND_UNION, %struct.THIRD_UNION, %struct.FOURTH_UNION, %struct.rec*, %3, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, i32 } + %struct.metrics = type { i16, i16, i16, i16, i16 } + %struct.rec = type { %struct.head_type } + at .str24239 = external constant [20 x i8], align 1 ; <[20 x i8]*> [#uses=1] + at no_file_pos = external global %4 ; <%4*> [#uses=1] + at .str19294 = external constant [9 x i8], align 1 ; <[9 x i8]*> [#uses=1] + at zz_lengths = external global [150 x i8] ; <[150 x i8]*> [#uses=1] + at next_free.4772 = external global i8** ; [#uses=3] + at top_free.4773 = external global i8** ; [#uses=2] + at .str1575 = external constant [32 x i8], align 1 ; <[32 x i8]*> [#uses=1] + at zz_free = external global [524 x %struct.rec*] ; <[524 x %struct.rec*]*> [#uses=2] + at zz_hold = external global %struct.rec* ; <%struct.rec**> [#uses=5] + at zz_tmp = external global %struct.rec* ; <%struct.rec**> [#uses=2] + at zz_res = external global %struct.rec* ; <%struct.rec**> [#uses=2] + at xx_link = external global %struct.rec* ; <%struct.rec**> [#uses=2] + at font_count = external global i32 ; [#uses=1] + at .str81872 = external constant [10 x i8], align 1 ; <[10 x i8]*> [#uses=1] + at .str101874 = external constant [30 x i8], align 1 ; <[30 x i8]*> [#uses=1] + at .str111875 = external constant [17 x i8], align 1 ; <[17 x i8]*> [#uses=1] + at .str141878 = external constant [27 x i8], align 1 ; <[27 x i8]*> [#uses=1] + at out_fp = external global %struct.FILE* ; <%struct.FILE**> [#uses=3] + at .str192782 = external constant [17 x i8], align 1 ; <[17 x i8]*> [#uses=1] + at cpexists = external global i32 ; [#uses=2] + at .str212784 = external constant [17 x i8], align 1 ; <[17 x i8]*> [#uses=1] + at currentfont = external global i32 ; [#uses=3] + at wordcount = external global i32 ; [#uses=1] + at needs = external global %struct.rec* ; <%struct.rec**> [#uses=1] + at .str742838 = external constant [6 x i8], align 1 ; <[6 x i8]*> [#uses=1] + at .str752839 = external constant [10 x i8], align 1 ; <[10 x i8]*> [#uses=1] + at .str1802944 = external constant [40 x i8], align 1 ; <[40 x i8]*> [#uses=1] + at .str1822946 = external constant [8 x i8], align 1 ; <[8 x i8]*> [#uses=1] + at .str1842948 = external constant [11 x i8], align 1 ; <[11 x i8]*> [#uses=1] + at .str1852949 = external constant [23 x i8], align 1 ; <[23 x i8]*> [#uses=1] + at .str1872951 = external constant [17 x i8], align 1 ; <[17 x i8]*> [#uses=1] + at .str1932957 = external constant [26 x i8], align 1 ; <[26 x i8]*> [#uses=1] + +declare arm_apcscc i32 @fprintf(%struct.FILE* nocapture, i8* nocapture, ...) nounwind + +declare arm_apcscc i32 @"\01_fwrite"(i8*, i32, i32, i8*) + +declare arm_apcscc i32 @remove(i8* nocapture) nounwind + +declare arm_apcscc %struct.FILE* @OpenIncGraphicFile(i8*, i8 zeroext, %struct.rec** nocapture, %struct.FILE_POS*, i32* nocapture) nounwind + +declare arm_apcscc %struct.rec* @MakeWord(i32, i8* nocapture, %struct.FILE_POS*) nounwind + +declare arm_apcscc void @Error(i32, i32, i8*, i32, %struct.FILE_POS*, ...) nounwind + +declare arm_apcscc i32 @"\01_fputs"(i8*, %struct.FILE*) + +declare arm_apcscc noalias i8* @calloc(i32, i32) nounwind + +declare arm_apcscc i8* @fgets(i8*, i32, %struct.FILE* nocapture) nounwind + +define arm_apcscc void @PS_PrintGraphicInclude(%struct.rec* %x, i32 %colmark, i32 %rowmark) nounwind { +entry: + %buff = alloca [512 x i8], align 4 ; <[512 x i8]*> [#uses=5] + %0 = getelementptr %struct.rec* %x, i32 0, i32 0, i32 1, i32 0, i32 0 ; [#uses=2] + %1 = load i8* %0, align 4 ; [#uses=1] + %2 = add i8 %1, -94 ; [#uses=1] + %3 = icmp ugt i8 %2, 1 ; [#uses=1] + br i1 %3, label %bb, label %bb1 + +bb: ; preds = %entry + br label %bb1 + +bb1: ; preds = %bb, %entry + %4 = getelementptr %struct.rec* %x, i32 0, i32 0, i32 2 ; <%struct.SECOND_UNION*> [#uses=1] + %5 = bitcast %struct.SECOND_UNION* %4 to %5* ; <%5*> [#uses=1] + %6 = getelementptr %5* %5, i32 0, i32 1 ; [#uses=1] + %7 = load i8* %6, align 1 ; [#uses=1] + %8 = icmp eq i8 %7, 0 ; [#uses=1] + br i1 %8, label %bb2, label %bb3 + +bb2: ; preds = %bb1 + call arm_apcscc void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 2, i8* getelementptr ([20 x i8]* @.str24239, i32 0, i32 0), i32 0, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*), i8* getelementptr ([40 x i8]* @.str1802944, i32 0, i32 0)) nounwind + br label %bb3 + +bb3: ; preds = %bb2, %bb1 + %9 = load %struct.rec** undef, align 4 ; <%struct.rec*> [#uses=0] + br label %bb5 + +bb5: ; preds = %bb5, %bb3 + %y.0 = load %struct.rec** null ; <%struct.rec*> [#uses=2] + br i1 false, label %bb5, label %bb6 + +bb6: ; preds = %bb5 + %10 = load i8* %0, align 4 ; [#uses=1] + %11 = getelementptr %struct.rec* %y.0, i32 0, i32 0, i32 1, i32 0 ; <%struct.FILE_POS*> [#uses=1] + %12 = call arm_apcscc %struct.FILE* @OpenIncGraphicFile(i8* undef, i8 zeroext %10, %struct.rec** null, %struct.FILE_POS* %11, i32* undef) nounwind ; <%struct.FILE*> [#uses=4] + br i1 false, label %bb7, label %bb8 + +bb7: ; preds = %bb6 + unreachable + +bb8: ; preds = %bb6 + %13 = and i32 undef, 4095 ; [#uses=2] + %14 = load i32* @currentfont, align 4 ; [#uses=0] + br i1 false, label %bb10, label %bb9 + +bb9: ; preds = %bb8 + %15 = icmp ult i32 0, %13 ; [#uses=1] + br i1 %15, label %bb.i, label %FontHalfXHeight.exit + +bb.i: ; preds = %bb9 + call arm_apcscc void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 2, i8* getelementptr ([20 x i8]* @.str24239, i32 0, i32 0), i32 0, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*), i8* getelementptr ([17 x i8]* @.str111875, i32 0, i32 0)) nounwind + %.pre186 = load i32* @currentfont, align 4 ; [#uses=1] + br label %FontHalfXHeight.exit + +FontHalfXHeight.exit: ; preds = %bb.i, %bb9 + %16 = phi i32 [ %.pre186, %bb.i ], [ %13, %bb9 ] ; [#uses=1] + br i1 false, label %bb.i1, label %bb1.i + +bb.i1: ; preds = %FontHalfXHeight.exit + br label %bb1.i + +bb1.i: ; preds = %bb.i1, %FontHalfXHeight.exit + br i1 undef, label %bb2.i, label %FontSize.exit + +bb2.i: ; preds = %bb1.i + call arm_apcscc void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 37, i32 61, i8* getelementptr ([30 x i8]* @.str101874, i32 0, i32 0), i32 1, %struct.FILE_POS* null) nounwind + unreachable + +FontSize.exit: ; preds = %bb1.i + %17 = getelementptr %struct.FONT_INFO* undef, i32 %16, i32 5 ; <%struct.rec**> [#uses=0] + %18 = load i32* undef, align 4 ; [#uses=1] + %19 = load i32* @currentfont, align 4 ; [#uses=2] + %20 = load i32* @font_count, align 4 ; [#uses=1] + %21 = icmp ult i32 %20, %19 ; [#uses=1] + br i1 %21, label %bb.i5, label %FontName.exit + +bb.i5: ; preds = %FontSize.exit + call arm_apcscc void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 2, i8* getelementptr ([20 x i8]* @.str24239, i32 0, i32 0), i32 0, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*), i8* getelementptr ([10 x i8]* @.str81872, i32 0, i32 0)) nounwind + br label %FontName.exit + +FontName.exit: ; preds = %bb.i5, %FontSize.exit + %22 = phi %struct.FONT_INFO* [ undef, %bb.i5 ], [ undef, %FontSize.exit ] ; <%struct.FONT_INFO*> [#uses=1] + %23 = getelementptr %struct.FONT_INFO* %22, i32 %19, i32 5 ; <%struct.rec**> [#uses=0] + %24 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* undef, i8* getelementptr ([8 x i8]* @.str1822946, i32 0, i32 0), i32 %18, i8* null) nounwind ; [#uses=0] + br label %bb10 + +bb10: ; preds = %FontName.exit, %bb8 + %25 = call arm_apcscc i32 @"\01_fwrite"(i8* getelementptr ([11 x i8]* @.str1842948, i32 0, i32 0), i32 1, i32 10, i8* undef) nounwind ; [#uses=0] + %26 = sub i32 %rowmark, undef ; [#uses=1] + %27 = load %struct.FILE** @out_fp, align 4 ; <%struct.FILE*> [#uses=1] + %28 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %27, i8* getelementptr ([17 x i8]* @.str212784, i32 0, i32 0), i32 undef, i32 %26) nounwind ; [#uses=0] + store i32 0, i32* @cpexists, align 4 + %29 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* undef, i8* getelementptr ([17 x i8]* @.str192782, i32 0, i32 0), double 2.000000e+01, double 2.000000e+01) nounwind ; [#uses=0] + %30 = getelementptr %struct.rec* %y.0, i32 0, i32 0, i32 3, i32 0, i32 0, i32 0 ; [#uses=1] + %31 = load i32* %30, align 4 ; [#uses=1] + %32 = sub i32 0, %31 ; [#uses=1] + %33 = load i32* undef, align 4 ; [#uses=1] + %34 = sub i32 0, %33 ; [#uses=1] + %35 = load %struct.FILE** @out_fp, align 4 ; <%struct.FILE*> [#uses=1] + %36 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %35, i8* getelementptr ([17 x i8]* @.str212784, i32 0, i32 0), i32 %32, i32 %34) nounwind ; [#uses=0] + store i32 0, i32* @cpexists, align 4 + %37 = load %struct.rec** null, align 4 ; <%struct.rec*> [#uses=1] + %38 = getelementptr %struct.rec* %37, i32 0, i32 0, i32 4 ; <%struct.FOURTH_UNION*> [#uses=1] + %39 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* undef, i8* getelementptr ([23 x i8]* @.str1852949, i32 0, i32 0), %struct.FOURTH_UNION* %38) nounwind ; [#uses=0] + %buff14 = getelementptr [512 x i8]* %buff, i32 0, i32 0 ; [#uses=5] + %40 = call arm_apcscc i8* @fgets(i8* %buff14, i32 512, %struct.FILE* %12) nounwind ; [#uses=0] + %iftmp.506.0 = select i1 undef, i32 2, i32 0 ; [#uses=1] + %41 = getelementptr [512 x i8]* %buff, i32 0, i32 26 ; [#uses=1] + br label %bb100.outer.outer + +bb100.outer.outer: ; preds = %bb83, %bb10 + %state.0.ph.ph = phi i32 [ %iftmp.506.0, %bb10 ], [ undef, %bb83 ] ; [#uses=1] + %x_addr.0.ph.ph = phi %struct.rec* [ %x, %bb10 ], [ %71, %bb83 ] ; <%struct.rec*> [#uses=1] + %42 = getelementptr %struct.rec* %x_addr.0.ph.ph, i32 0, i32 0, i32 1, i32 0 ; <%struct.FILE_POS*> [#uses=0] + br label %bb100.outer + +bb.i80: ; preds = %bb3.i85 + %43 = icmp eq i8 %44, %46 ; [#uses=1] + %indvar.next.i79 = add i32 %indvar.i81, 1 ; [#uses=1] + br i1 %43, label %bb2.i84, label %bb2.i51 + +bb2.i84: ; preds = %bb100.outer, %bb.i80 + %indvar.i81 = phi i32 [ %indvar.next.i79, %bb.i80 ], [ 0, %bb100.outer ] ; [#uses=3] + %pp.0.i82 = getelementptr [27 x i8]* @.str141878, i32 0, i32 %indvar.i81 ; [#uses=2] + %sp.0.i83 = getelementptr [512 x i8]* %buff, i32 0, i32 %indvar.i81 ; [#uses=1] + %44 = load i8* %sp.0.i83, align 1 ; [#uses=2] + %45 = icmp eq i8 %44, 0 ; [#uses=1] + br i1 %45, label %StringBeginsWith.exit88thread-split, label %bb3.i85 + +bb3.i85: ; preds = %bb2.i84 + %46 = load i8* %pp.0.i82, align 1 ; [#uses=3] + %47 = icmp eq i8 %46, 0 ; [#uses=1] + br i1 %47, label %StringBeginsWith.exit88, label %bb.i80 + +StringBeginsWith.exit88thread-split: ; preds = %bb2.i84 + %.pr = load i8* %pp.0.i82 ; [#uses=1] + br label %StringBeginsWith.exit88 + +StringBeginsWith.exit88: ; preds = %StringBeginsWith.exit88thread-split, %bb3.i85 + %48 = phi i8 [ %.pr, %StringBeginsWith.exit88thread-split ], [ %46, %bb3.i85 ] ; [#uses=1] + %phitmp91 = icmp eq i8 %48, 0 ; [#uses=1] + br i1 %phitmp91, label %bb3.i77, label %bb2.i51 + +bb2.i.i68: ; preds = %bb3.i77 + br i1 false, label %bb2.i51, label %bb2.i75 + +bb2.i75: ; preds = %bb2.i.i68 + br label %bb3.i77 + +bb3.i77: ; preds = %bb2.i75, %StringBeginsWith.exit88 + %sp.0.i76 = getelementptr [512 x i8]* %buff, i32 0, i32 undef ; [#uses=1] + %49 = load i8* %sp.0.i76, align 1 ; [#uses=1] + %50 = icmp eq i8 %49, 0 ; [#uses=1] + br i1 %50, label %bb24, label %bb2.i.i68 + +bb24: ; preds = %bb3.i77 + %51 = call arm_apcscc %struct.rec* @MakeWord(i32 11, i8* %41, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*)) nounwind ; <%struct.rec*> [#uses=0] + %52 = load i8* getelementptr ([150 x i8]* @zz_lengths, i32 0, i32 0), align 4 ; [#uses=1] + %53 = zext i8 %52 to i32 ; [#uses=2] + %54 = getelementptr [524 x %struct.rec*]* @zz_free, i32 0, i32 %53 ; <%struct.rec**> [#uses=2] + %55 = load %struct.rec** %54, align 4 ; <%struct.rec*> [#uses=3] + %56 = icmp eq %struct.rec* %55, null ; [#uses=1] + br i1 %56, label %bb27, label %bb28 + +bb27: ; preds = %bb24 + br i1 undef, label %bb.i56, label %GetMemory.exit62 + +bb.i56: ; preds = %bb27 + br i1 undef, label %bb1.i58, label %bb2.i60 + +bb1.i58: ; preds = %bb.i56 + call arm_apcscc void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 31, i32 1, i8* getelementptr ([32 x i8]* @.str1575, i32 0, i32 0), i32 1, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*)) nounwind + br label %bb2.i60 + +bb2.i60: ; preds = %bb1.i58, %bb.i56 + %.pre1.i59 = phi i8** [ undef, %bb1.i58 ], [ undef, %bb.i56 ] ; [#uses=1] + store i8** undef, i8*** @top_free.4773, align 4 + br label %GetMemory.exit62 + +GetMemory.exit62: ; preds = %bb2.i60, %bb27 + %57 = phi i8** [ %.pre1.i59, %bb2.i60 ], [ undef, %bb27 ] ; [#uses=1] + %58 = getelementptr i8** %57, i32 %53 ; [#uses=1] + store i8** %58, i8*** @next_free.4772, align 4 + store %struct.rec* undef, %struct.rec** @zz_hold, align 4 + br label %bb29 + +bb28: ; preds = %bb24 + store %struct.rec* %55, %struct.rec** @zz_hold, align 4 + %59 = load %struct.rec** null, align 4 ; <%struct.rec*> [#uses=1] + store %struct.rec* %59, %struct.rec** %54, align 4 + br label %bb29 + +bb29: ; preds = %bb28, %GetMemory.exit62 + %.pre184 = phi %struct.rec* [ %55, %bb28 ], [ undef, %GetMemory.exit62 ] ; <%struct.rec*> [#uses=3] + store i8 0, i8* undef + store %struct.rec* %.pre184, %struct.rec** @xx_link, align 4 + br i1 undef, label %bb35, label %bb31 + +bb31: ; preds = %bb29 + store %struct.rec* %.pre184, %struct.rec** undef + br label %bb35 + +bb35: ; preds = %bb31, %bb29 + br i1 undef, label %bb41, label %bb37 + +bb37: ; preds = %bb35 + %60 = load %struct.rec** null, align 4 ; <%struct.rec*> [#uses=1] + store %struct.rec* %60, %struct.rec** undef + store %struct.rec* undef, %struct.rec** null + store %struct.rec* %.pre184, %struct.rec** null, align 4 + br label %bb41 + +bb41: ; preds = %bb37, %bb35 + %61 = call arm_apcscc i8* @fgets(i8* %buff14, i32 512, %struct.FILE* %12) nounwind ; [#uses=1] + %62 = icmp eq i8* %61, null ; [#uses=1] + %iftmp.554.0 = select i1 %62, i32 2, i32 1 ; [#uses=1] + br label %bb100.outer + +bb.i47: ; preds = %bb3.i52 + %63 = icmp eq i8 %64, %65 ; [#uses=1] + br i1 %63, label %bb2.i51, label %bb2.i41 + +bb2.i51: ; preds = %bb.i47, %bb2.i.i68, %StringBeginsWith.exit88, %bb.i80 + %pp.0.i49 = getelementptr [17 x i8]* @.str1872951, i32 0, i32 0 ; [#uses=1] + %64 = load i8* null, align 1 ; [#uses=1] + br i1 false, label %StringBeginsWith.exit55thread-split, label %bb3.i52 + +bb3.i52: ; preds = %bb2.i51 + %65 = load i8* %pp.0.i49, align 1 ; [#uses=1] + br i1 false, label %StringBeginsWith.exit55, label %bb.i47 + +StringBeginsWith.exit55thread-split: ; preds = %bb2.i51 + br label %StringBeginsWith.exit55 + +StringBeginsWith.exit55: ; preds = %StringBeginsWith.exit55thread-split, %bb3.i52 + br i1 false, label %bb49, label %bb2.i41 + +bb49: ; preds = %StringBeginsWith.exit55 + br label %bb2.i41 + +bb2.i41: ; preds = %bb2.i41, %bb49, %StringBeginsWith.exit55, %bb.i47 + br i1 false, label %bb2.i41, label %bb2.i.i15 + +bb2.i.i15: ; preds = %bb2.i41 + %pp.0.i.i13 = getelementptr [6 x i8]* @.str742838, i32 0, i32 0 ; [#uses=1] + br i1 false, label %StringBeginsWith.exitthread-split.i18, label %bb3.i.i16 + +bb3.i.i16: ; preds = %bb2.i.i15 + %66 = load i8* %pp.0.i.i13, align 1 ; [#uses=1] + br label %StringBeginsWith.exit.i20 + +StringBeginsWith.exitthread-split.i18: ; preds = %bb2.i.i15 + br label %StringBeginsWith.exit.i20 + +StringBeginsWith.exit.i20: ; preds = %StringBeginsWith.exitthread-split.i18, %bb3.i.i16 + %67 = phi i8 [ undef, %StringBeginsWith.exitthread-split.i18 ], [ %66, %bb3.i.i16 ] ; [#uses=1] + %phitmp.i19 = icmp eq i8 %67, 0 ; [#uses=1] + br i1 %phitmp.i19, label %bb58, label %bb2.i6.i26 + +bb2.i6.i26: ; preds = %bb2.i6.i26, %StringBeginsWith.exit.i20 + %indvar.i3.i23 = phi i32 [ %indvar.next.i1.i21, %bb2.i6.i26 ], [ 0, %StringBeginsWith.exit.i20 ] ; [#uses=3] + %sp.0.i5.i25 = getelementptr [512 x i8]* %buff, i32 0, i32 %indvar.i3.i23 ; [#uses=0] + %pp.0.i4.i24 = getelementptr [10 x i8]* @.str752839, i32 0, i32 %indvar.i3.i23 ; [#uses=1] + %68 = load i8* %pp.0.i4.i24, align 1 ; [#uses=0] + %indvar.next.i1.i21 = add i32 %indvar.i3.i23, 1 ; [#uses=1] + br i1 undef, label %bb2.i6.i26, label %bb55 + +bb55: ; preds = %bb2.i6.i26 + %69 = call arm_apcscc i32 @"\01_fputs"(i8* %buff14, %struct.FILE* undef) nounwind ; [#uses=0] + unreachable + +bb58: ; preds = %StringBeginsWith.exit.i20 + %70 = call arm_apcscc i8* @fgets(i8* %buff14, i32 512, %struct.FILE* %12) nounwind ; [#uses=0] + %iftmp.560.0 = select i1 undef, i32 2, i32 0 ; [#uses=1] + br label %bb100.outer + +bb.i7: ; preds = %bb3.i + br i1 false, label %bb2.i8, label %bb2.i.i + +bb2.i8: ; preds = %bb100.outer, %bb.i7 + br i1 undef, label %StringBeginsWith.exitthread-split, label %bb3.i + +bb3.i: ; preds = %bb2.i8 + br i1 undef, label %StringBeginsWith.exit, label %bb.i7 + +StringBeginsWith.exitthread-split: ; preds = %bb2.i8 + br label %StringBeginsWith.exit + +StringBeginsWith.exit: ; preds = %StringBeginsWith.exitthread-split, %bb3.i + %phitmp93 = icmp eq i8 undef, 0 ; [#uses=1] + br i1 %phitmp93, label %bb66, label %bb2.i.i + +bb66: ; preds = %StringBeginsWith.exit + %71 = call arm_apcscc %struct.rec* @MakeWord(i32 11, i8* undef, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*)) nounwind ; <%struct.rec*> [#uses=4] + %72 = load i8* getelementptr ([150 x i8]* @zz_lengths, i32 0, i32 0), align 4 ; [#uses=1] + %73 = zext i8 %72 to i32 ; [#uses=2] + %74 = getelementptr [524 x %struct.rec*]* @zz_free, i32 0, i32 %73 ; <%struct.rec**> [#uses=2] + %75 = load %struct.rec** %74, align 4 ; <%struct.rec*> [#uses=3] + %76 = icmp eq %struct.rec* %75, null ; [#uses=1] + br i1 %76, label %bb69, label %bb70 + +bb69: ; preds = %bb66 + br i1 undef, label %bb.i2, label %GetMemory.exit + +bb.i2: ; preds = %bb69 + %77 = call arm_apcscc noalias i8* @calloc(i32 1020, i32 4) nounwind ; [#uses=1] + %78 = bitcast i8* %77 to i8** ; [#uses=3] + store i8** %78, i8*** @next_free.4772, align 4 + br i1 undef, label %bb1.i3, label %bb2.i4 + +bb1.i3: ; preds = %bb.i2 + call arm_apcscc void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 31, i32 1, i8* getelementptr ([32 x i8]* @.str1575, i32 0, i32 0), i32 1, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*)) nounwind + br label %bb2.i4 + +bb2.i4: ; preds = %bb1.i3, %bb.i2 + %.pre1.i = phi i8** [ undef, %bb1.i3 ], [ %78, %bb.i2 ] ; [#uses=1] + %79 = phi i8** [ undef, %bb1.i3 ], [ %78, %bb.i2 ] ; [#uses=1] + %80 = getelementptr i8** %79, i32 1020 ; [#uses=1] + store i8** %80, i8*** @top_free.4773, align 4 + br label %GetMemory.exit + +GetMemory.exit: ; preds = %bb2.i4, %bb69 + %81 = phi i8** [ %.pre1.i, %bb2.i4 ], [ undef, %bb69 ] ; [#uses=2] + %82 = bitcast i8** %81 to %struct.rec* ; <%struct.rec*> [#uses=3] + %83 = getelementptr i8** %81, i32 %73 ; [#uses=1] + store i8** %83, i8*** @next_free.4772, align 4 + store %struct.rec* %82, %struct.rec** @zz_hold, align 4 + br label %bb71 + +bb70: ; preds = %bb66 + %84 = load %struct.rec** null, align 4 ; <%struct.rec*> [#uses=1] + store %struct.rec* %84, %struct.rec** %74, align 4 + br label %bb71 + +bb71: ; preds = %bb70, %GetMemory.exit + %.pre185 = phi %struct.rec* [ %75, %bb70 ], [ %82, %GetMemory.exit ] ; <%struct.rec*> [#uses=8] + %85 = phi %struct.rec* [ %75, %bb70 ], [ %82, %GetMemory.exit ] ; <%struct.rec*> [#uses=1] + %86 = getelementptr %struct.rec* %85, i32 0, i32 0, i32 1, i32 0, i32 0 ; [#uses=0] + %87 = getelementptr %struct.rec* %.pre185, i32 0, i32 0, i32 0, i32 1, i32 1 ; <%struct.rec**> [#uses=0] + %88 = getelementptr %struct.rec* %.pre185, i32 0, i32 0, i32 0, i32 1, i32 0 ; <%struct.rec**> [#uses=1] + store %struct.rec* %.pre185, %struct.rec** @xx_link, align 4 + store %struct.rec* %.pre185, %struct.rec** @zz_res, align 4 + %89 = load %struct.rec** @needs, align 4 ; <%struct.rec*> [#uses=2] + store %struct.rec* %89, %struct.rec** @zz_hold, align 4 + br i1 false, label %bb77, label %bb73 + +bb73: ; preds = %bb71 + %90 = getelementptr %struct.rec* %89, i32 0, i32 0, i32 0, i32 0, i32 0 ; <%struct.rec**> [#uses=1] + store %struct.rec* null, %struct.rec** @zz_tmp, align 4 + store %struct.rec* %.pre185, %struct.rec** %90 + store %struct.rec* %.pre185, %struct.rec** undef, align 4 + br label %bb77 + +bb77: ; preds = %bb73, %bb71 + store %struct.rec* %.pre185, %struct.rec** @zz_res, align 4 + store %struct.rec* %71, %struct.rec** @zz_hold, align 4 + br i1 undef, label %bb83, label %bb79 + +bb79: ; preds = %bb77 + %91 = getelementptr %struct.rec* %71, i32 0, i32 0, i32 0, i32 1, i32 0 ; <%struct.rec**> [#uses=1] + store %struct.rec* null, %struct.rec** @zz_tmp, align 4 + %92 = load %struct.rec** %88, align 4 ; <%struct.rec*> [#uses=1] + store %struct.rec* %92, %struct.rec** %91 + %93 = getelementptr %struct.rec* undef, i32 0, i32 0, i32 0, i32 1, i32 1 ; <%struct.rec**> [#uses=1] + store %struct.rec* %71, %struct.rec** %93, align 4 + store %struct.rec* %.pre185, %struct.rec** undef, align 4 + br label %bb83 + +bb83: ; preds = %bb79, %bb77 + br label %bb100.outer.outer + +bb.i.i: ; preds = %bb3.i.i + br i1 undef, label %bb2.i.i, label %bb2.i6.i + +bb2.i.i: ; preds = %bb.i.i, %StringBeginsWith.exit, %bb.i7 + br i1 undef, label %StringBeginsWith.exitthread-split.i, label %bb3.i.i + +bb3.i.i: ; preds = %bb2.i.i + br i1 undef, label %StringBeginsWith.exit.i, label %bb.i.i + +StringBeginsWith.exitthread-split.i: ; preds = %bb2.i.i + br label %StringBeginsWith.exit.i + +StringBeginsWith.exit.i: ; preds = %StringBeginsWith.exitthread-split.i, %bb3.i.i + br i1 false, label %bb94, label %bb2.i6.i + +bb.i2.i: ; preds = %bb3.i7.i + br i1 false, label %bb2.i6.i, label %bb91 + +bb2.i6.i: ; preds = %bb.i2.i, %StringBeginsWith.exit.i, %bb.i.i + br i1 undef, label %strip_out.exitthread-split, label %bb3.i7.i + +bb3.i7.i: ; preds = %bb2.i6.i + %94 = load i8* undef, align 1 ; [#uses=1] + br i1 undef, label %strip_out.exit, label %bb.i2.i + +strip_out.exitthread-split: ; preds = %bb2.i6.i + %.pr100 = load i8* undef ; [#uses=1] + br label %strip_out.exit + +strip_out.exit: ; preds = %strip_out.exitthread-split, %bb3.i7.i + %95 = phi i8 [ %.pr100, %strip_out.exitthread-split ], [ %94, %bb3.i7.i ] ; [#uses=0] + br i1 undef, label %bb94, label %bb91 + +bb91: ; preds = %strip_out.exit, %bb.i2.i + unreachable + +bb94: ; preds = %strip_out.exit, %StringBeginsWith.exit.i + %96 = call arm_apcscc i8* @fgets(i8* %buff14, i32 512, %struct.FILE* %12) nounwind ; [#uses=0] + unreachable + +bb100.outer: ; preds = %bb58, %bb41, %bb100.outer.outer + %state.0.ph = phi i32 [ %state.0.ph.ph, %bb100.outer.outer ], [ %iftmp.560.0, %bb58 ], [ %iftmp.554.0, %bb41 ] ; [#uses=1] + switch i32 %state.0.ph, label %bb2.i84 [ + i32 2, label %bb101.split + i32 1, label %bb2.i8 + ] + +bb101.split: ; preds = %bb100.outer + %97 = icmp eq i32 undef, 0 ; [#uses=1] + br i1 %97, label %bb103, label %bb102 + +bb102: ; preds = %bb101.split + %98 = call arm_apcscc i32 @remove(i8* getelementptr ([9 x i8]* @.str19294, i32 0, i32 0)) nounwind ; [#uses=0] + unreachable + +bb103: ; preds = %bb101.split + %99 = load %struct.FILE** @out_fp, align 4 ; <%struct.FILE*> [#uses=1] + %100 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %99, i8* getelementptr ([26 x i8]* @.str1932957, i32 0, i32 0)) nounwind ; [#uses=0] + store i32 0, i32* @wordcount, align 4 + ret void +} From anton at korobeynikov.info Wed Aug 5 02:36:24 2009 From: anton at korobeynikov.info (Anton Korobeynikov) Date: Wed, 5 Aug 2009 11:36:24 +0400 Subject: [llvm-commits] [patch] CBackend improvements In-Reply-To: <305d6f60908041754j63b2663erc26b22bdfe279a3@mail.gmail.com> References: <305d6f60907232339k582287b3p93baf72cfbc85041@mail.gmail.com> <70D7905D-DDC2-400C-9C6F-992EFA75D44C@apple.com> <305d6f60908041754j63b2663erc26b22bdfe279a3@mail.gmail.com> Message-ID: > ping. Can somebody commit this? Will do. -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University From asl at math.spbu.ru Wed Aug 5 04:30:08 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 05 Aug 2009 09:30:08 -0000 Subject: [llvm-commits] [llvm] r78180 - /llvm/trunk/lib/Target/CBackend/CBackend.cpp Message-ID: <200908050930.n759UK2a026538@zion.cs.uiuc.edu> Author: asl Date: Wed Aug 5 04:29:56 2009 New Revision: 78180 URL: http://llvm.org/viewvc/llvm-project?rev=78180&view=rev Log: Emit module-level inline asm for CBE. Patch by Sandeep Patel Modified: llvm/trunk/lib/Target/CBackend/CBackend.cpp Modified: llvm/trunk/lib/Target/CBackend/CBackend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CBackend/CBackend.cpp?rev=78180&r1=78179&r2=78180&view=diff ============================================================================== --- llvm/trunk/lib/Target/CBackend/CBackend.cpp (original) +++ llvm/trunk/lib/Target/CBackend/CBackend.cpp Wed Aug 5 04:29:56 2009 @@ -29,6 +29,7 @@ #include "llvm/Analysis/ConstantsScanner.h" #include "llvm/Analysis/FindUsedTypes.h" #include "llvm/Analysis/LoopInfo.h" +#include "llvm/Analysis/ValueTracking.h" #include "llvm/CodeGen/Passes.h" #include "llvm/CodeGen/IntrinsicLowering.h" #include "llvm/Transforms/Scalar.h" @@ -1811,6 +1812,30 @@ return NotSpecial; } +// PrintEscapedString - Print each character of the specified string, escaping +// it if it is not printable or if it is an escape char. +static void PrintEscapedString(const char *Str, unsigned Length, + raw_ostream &Out) { + for (unsigned i = 0; i != Length; ++i) { + unsigned char C = Str[i]; + if (isprint(C) && C != '\\' && C != '"') + Out << C; + else if (C == '\\') + Out << "\\\\"; + else if (C == '\"') + Out << "\\\""; + else if (C == '\t') + Out << "\\t"; + else + Out << "\\x" << hexdigit(C >> 4) << hexdigit(C & 0x0F); + } +} + +// PrintEscapedString - Print each character of the specified string, escaping +// it if it is not printable or if it is an escape char. +static void PrintEscapedString(const std::string &Str, raw_ostream &Out) { + PrintEscapedString(Str.c_str(), Str.size(), Out); +} bool CWriter::doInitialization(Module &M) { FunctionPass::doInitialization(M); @@ -1865,6 +1890,29 @@ // First output all the declarations for the program, because C requires // Functions & globals to be declared before they are used. // + if (!M.getModuleInlineAsm().empty()) { + Out << "/* Module asm statements */\n" + << "asm("; + + // Split the string into lines, to make it easier to read the .ll file. + std::string Asm = M.getModuleInlineAsm(); + size_t CurPos = 0; + size_t NewLine = Asm.find_first_of('\n', CurPos); + while (NewLine != std::string::npos) { + // We found a newline, print the portion of the asm string from the + // last newline up to this newline. + Out << "\""; + PrintEscapedString(std::string(Asm.begin()+CurPos, Asm.begin()+NewLine), + Out); + Out << "\\n\"\n"; + CurPos = NewLine+1; + NewLine = Asm.find_first_of('\n', CurPos); + } + Out << "\""; + PrintEscapedString(std::string(Asm.begin()+CurPos, Asm.end()), Out); + Out << "\");\n" + << "/* End Module asm statements */\n"; + } // Loop over the symbol table, emitting all named constants... printModuleTypes(M.getTypeSymbolTable()); From asl at math.spbu.ru Wed Aug 5 04:31:09 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 05 Aug 2009 09:31:09 -0000 Subject: [llvm-commits] [llvm] r78181 - /llvm/trunk/lib/Target/CBackend/CBackend.cpp Message-ID: <200908050931.n759V9QW026595@zion.cs.uiuc.edu> Author: asl Date: Wed Aug 5 04:31:07 2009 New Revision: 78181 URL: http://llvm.org/viewvc/llvm-project?rev=78181&view=rev Log: Minor arm CBE fixes. Patch by Sandeep. Modified: llvm/trunk/lib/Target/CBackend/CBackend.cpp Modified: llvm/trunk/lib/Target/CBackend/CBackend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CBackend/CBackend.cpp?rev=78181&r1=78180&r2=78181&view=diff ============================================================================== --- llvm/trunk/lib/Target/CBackend/CBackend.cpp (original) +++ llvm/trunk/lib/Target/CBackend/CBackend.cpp Wed Aug 5 04:31:07 2009 @@ -1642,7 +1642,7 @@ Out << "/* get a declaration for alloca */\n" << "#if defined(__CYGWIN__) || defined(__MINGW32__)\n" << "#define alloca(x) __builtin_alloca((x))\n" - << "#define _alloca(x) __builtin_alloca((x))\n" + << "#define _alloca(x) __builtin_alloca((x))\n" << "#elif defined(__APPLE__)\n" << "extern void *__builtin_alloca(unsigned long);\n" << "#define alloca(x) __builtin_alloca(x)\n" @@ -1655,7 +1655,7 @@ << "extern void *__builtin_alloca(unsigned int);\n" << "#endif\n" << "#define alloca(x) __builtin_alloca(x)\n" - << "#elif defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__) || defined(__DragonFly__)\n" + << "#elif defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__) || defined(__DragonFly__) || defined(__arm__)\n" << "#define alloca(x) __builtin_alloca(x)\n" << "#elif defined(_MSC_VER)\n" << "#define inline _inline\n" From asl at math.spbu.ru Wed Aug 5 04:31:42 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 05 Aug 2009 09:31:42 -0000 Subject: [llvm-commits] [llvm] r78182 - /llvm/trunk/lib/Target/CBackend/CBackend.cpp Message-ID: <200908050931.n759Vg9T026647@zion.cs.uiuc.edu> Author: asl Date: Wed Aug 5 04:31:40 2009 New Revision: 78182 URL: http://llvm.org/viewvc/llvm-project?rev=78182&view=rev Log: Cleanup in dbg_stoppoint handling in CBE. Patch by Sandeep Patel. Modified: llvm/trunk/lib/Target/CBackend/CBackend.cpp Modified: llvm/trunk/lib/Target/CBackend/CBackend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CBackend/CBackend.cpp?rev=78182&r1=78181&r2=78182&view=diff ============================================================================== --- llvm/trunk/lib/Target/CBackend/CBackend.cpp (original) +++ llvm/trunk/lib/Target/CBackend/CBackend.cpp Wed Aug 5 04:31:40 2009 @@ -3160,16 +3160,15 @@ case Intrinsic::dbg_stoppoint: { // If we use writeOperand directly we get a "u" suffix which is rejected // by gcc. - std::stringstream SPIStr; DbgStopPointInst &SPI = cast(I); - SPI.getDirectory()->print(SPIStr); + std::string dir; + GetConstantStringInfo(SPI.getDirectory(), dir); + std::string file; + GetConstantStringInfo(SPI.getFileName(), file); Out << "\n#line " << SPI.getLine() - << " \""; - Out << SPIStr.str(); - SPIStr.clear(); - SPI.getFileName()->print(SPIStr); - Out << SPIStr.str() << "\"\n"; + << " \"" + << dir << '/' << file << "\"\n"; return true; } case Intrinsic::x86_sse_cmp_ss: From asl at math.spbu.ru Wed Aug 5 04:32:25 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 05 Aug 2009 09:32:25 -0000 Subject: [llvm-commits] [llvm] r78183 - in /llvm/trunk/tools/bugpoint: BugDriver.cpp ExecutionDriver.cpp ToolRunner.cpp ToolRunner.h Message-ID: <200908050932.n759WRi2026683@zion.cs.uiuc.edu> Author: asl Date: Wed Aug 5 04:32:10 2009 New Revision: 78183 URL: http://llvm.org/viewvc/llvm-project?rev=78183&view=rev Log: Add save-temps option to bugpoint to keep temporary stuff. Patch by Sandeep Patel Modified: llvm/trunk/tools/bugpoint/BugDriver.cpp llvm/trunk/tools/bugpoint/ExecutionDriver.cpp llvm/trunk/tools/bugpoint/ToolRunner.cpp llvm/trunk/tools/bugpoint/ToolRunner.h Modified: llvm/trunk/tools/bugpoint/BugDriver.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/BugDriver.cpp?rev=78183&r1=78182&r2=78183&view=diff ============================================================================== --- llvm/trunk/tools/bugpoint/BugDriver.cpp (original) +++ llvm/trunk/tools/bugpoint/BugDriver.cpp Wed Aug 5 04:32:10 2009 @@ -196,7 +196,7 @@ // Make sure the reference output file gets deleted on exit from this // function, if appropriate. sys::Path ROF(ReferenceOutputFile); - FileRemover RemoverInstance(ROF, CreatedOutput); + FileRemover RemoverInstance(ROF, CreatedOutput && !SaveTemps); // Diff the output of the raw program against the reference output. If it // matches, then we assume there is a miscompilation bug and try to Modified: llvm/trunk/tools/bugpoint/ExecutionDriver.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/ExecutionDriver.cpp?rev=78183&r1=78182&r2=78183&view=diff ============================================================================== --- llvm/trunk/tools/bugpoint/ExecutionDriver.cpp (original) +++ llvm/trunk/tools/bugpoint/ExecutionDriver.cpp Wed Aug 5 04:32:10 2009 @@ -288,7 +288,7 @@ } // Remove the temporary bitcode file when we are done. - FileRemover BitcodeFileRemover(BitcodeFile); + FileRemover BitcodeFileRemover(BitcodeFile, !SaveTemps); // Actually compile the program! Interpreter->compileProgram(BitcodeFile.toString()); @@ -328,7 +328,7 @@ // Remove the temporary bitcode file when we are done. sys::Path BitcodePath (BitcodeFile); - FileRemover BitcodeFileRemover(BitcodePath, CreatedBitcode); + FileRemover BitcodeFileRemover(BitcodePath, CreatedBitcode && !SaveTemps); if (OutputFile.empty()) OutputFile = "bugpoint-execution-output"; Modified: llvm/trunk/tools/bugpoint/ToolRunner.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/ToolRunner.cpp?rev=78183&r1=78182&r2=78183&view=diff ============================================================================== --- llvm/trunk/tools/bugpoint/ToolRunner.cpp (original) +++ llvm/trunk/tools/bugpoint/ToolRunner.cpp Wed Aug 5 04:32:10 2009 @@ -22,6 +22,11 @@ #include using namespace llvm; +namespace llvm { + cl::opt + SaveTemps("save-temps", cl::init(false), cl::desc("Save temporary files")); +} + namespace { cl::opt RemoteClient("remote-client", @@ -395,7 +400,7 @@ sys::Path OutputAsmFile; OutputCode(Bitcode, OutputAsmFile); - FileRemover OutFileRemover(OutputAsmFile); + FileRemover OutFileRemover(OutputAsmFile, !SaveTemps); std::vector GCCArgs(ArgsForGCC); GCCArgs.insert(GCCArgs.end(), SharedLibs.begin(), SharedLibs.end()); @@ -560,7 +565,7 @@ sys::Path OutputCFile; OutputCode(Bitcode, OutputCFile); - FileRemover CFileRemove(OutputCFile); + FileRemover CFileRemove(OutputCFile, !SaveTemps); std::vector GCCArgs(ArgsForGCC); GCCArgs.insert(GCCArgs.end(), SharedLibs.begin(), SharedLibs.end()); @@ -726,7 +731,7 @@ errs() << "\n"; ); - FileRemover OutputBinaryRemover(OutputBinary); + FileRemover OutputBinaryRemover(OutputBinary, !SaveTemps); if (RemoteClientPath.isEmpty()) { DEBUG(errs() << "";); Modified: llvm/trunk/tools/bugpoint/ToolRunner.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/ToolRunner.h?rev=78183&r1=78182&r2=78183&view=diff ============================================================================== --- llvm/trunk/tools/bugpoint/ToolRunner.h (original) +++ llvm/trunk/tools/bugpoint/ToolRunner.h Wed Aug 5 04:32:10 2009 @@ -17,12 +17,15 @@ #ifndef BUGPOINT_TOOLRUNNER_H #define BUGPOINT_TOOLRUNNER_H +#include "llvm/Support/CommandLine.h" #include "llvm/Support/SystemUtils.h" #include #include namespace llvm { +extern cl::opt SaveTemps; + class CBE; class LLC; From asl at math.spbu.ru Wed Aug 5 04:32:55 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 05 Aug 2009 09:32:55 -0000 Subject: [llvm-commits] [llvm] r78184 - /llvm/trunk/tools/bugpoint/ToolRunner.cpp Message-ID: <200908050932.n759Wta2026704@zion.cs.uiuc.edu> Author: asl Date: Wed Aug 5 04:32:53 2009 New Revision: 78184 URL: http://llvm.org/viewvc/llvm-project?rev=78184&view=rev Log: Pass user only if it's non-empty. Patch by Sandeep. Modified: llvm/trunk/tools/bugpoint/ToolRunner.cpp Modified: llvm/trunk/tools/bugpoint/ToolRunner.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/ToolRunner.cpp?rev=78184&r1=78183&r2=78184&view=diff ============================================================================== --- llvm/trunk/tools/bugpoint/ToolRunner.cpp (original) +++ llvm/trunk/tools/bugpoint/ToolRunner.cpp Wed Aug 5 04:32:53 2009 @@ -698,8 +698,10 @@ else { ProgramArgs.push_back(RemoteClientPath.c_str()); ProgramArgs.push_back(RemoteHost.c_str()); - ProgramArgs.push_back("-l"); - ProgramArgs.push_back(RemoteUser.c_str()); + if (!RemoteUser.empty()) { + ProgramArgs.push_back("-l"); + ProgramArgs.push_back(RemoteUser.c_str()); + } if (!RemotePort.empty()) { ProgramArgs.push_back("-p"); ProgramArgs.push_back(RemotePort.c_str()); From asl at math.spbu.ru Wed Aug 5 04:37:47 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 05 Aug 2009 09:37:47 -0000 Subject: [llvm-commits] [llvm] r78185 - /llvm/trunk/Makefile.rules Message-ID: <200908050937.n759boHq026891@zion.cs.uiuc.edu> Author: asl Date: Wed Aug 5 04:37:43 2009 New Revision: 78185 URL: http://llvm.org/viewvc/llvm-project?rev=78185&view=rev Log: Add executable suffix for the tool. This is needed e.g. for 'make install' on mingw32. Modified: llvm/trunk/Makefile.rules Modified: llvm/trunk/Makefile.rules URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/Makefile.rules?rev=78185&r1=78184&r2=78185&view=diff ============================================================================== --- llvm/trunk/Makefile.rules (original) +++ llvm/trunk/Makefile.rules Wed Aug 5 04:37:43 2009 @@ -1212,7 +1212,7 @@ uninstall-local:: $(Echo) Uninstall circumvented with NO_INSTALL else -DestTool = $(PROJ_bindir)/$(TOOLNAME) +DestTool = $(PROJ_bindir)/$(TOOLNAME)$(EXEEXT) install-local:: $(DestTool) From deeppatel1987 at gmail.com Wed Aug 5 04:59:52 2009 From: deeppatel1987 at gmail.com (Sandeep Patel) Date: Wed, 5 Aug 2009 09:59:52 +0000 Subject: [llvm-commits] cross building fixes Message-ID: <305d6f60908050259l157641b6x8dcb87bf8a431536@mail.gmail.com> The attached patches attempt to fix cross builds. For example, if you try to use i686-darwin to build for arm-eabi, you'll quickly run into several false assumptions that the target OS must be the same as the host OS. These patches split $(OS) into $(HOST_OS) and $(TARGET_OS) to help builds like "make check" and the test-suite able to cross compile. Along the way a target of *-unknown-eabi is defined as "Freestanding" so that TARGET_OS checks have something to work with. Also attached is a patch to add a definition for __STDC_CONSTANT_MACROS so that llvm2cpp doesn't fail during make check on a cross. deep -------------- next part -------------- A non-text attachment was scrubbed... Name: deep-llvm-cross-builds.diff Type: application/octet-stream Size: 10057 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090805/18d822ca/attachment.obj -------------- next part -------------- A non-text attachment was scrubbed... Name: deep-llvm-llvm2cpp-cross.diff Type: application/octet-stream Size: 740 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090805/18d822ca/attachment-0001.obj -------------- next part -------------- A non-text attachment was scrubbed... Name: deep-testsuite-cross.diff Type: application/octet-stream Size: 9095 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090805/18d822ca/attachment-0002.obj From deeppatel1987 at gmail.com Wed Aug 5 05:15:52 2009 From: deeppatel1987 at gmail.com (Sandeep Patel) Date: Wed, 5 Aug 2009 10:15:52 +0000 Subject: [llvm-commits] calling convention support for ARM AAPCS VFP "homogenous aggregates" Message-ID: <305d6f60908050315i4d781629wfe2ef4d477aa2891@mail.gmail.com> Attached is a patch to llvm-gcc to implement passing of homogenous aggregates via FP registers per the ARM AAPCS VFP variant (a.k.a. hard float). 1. The patch uses CallingConv::ID consistently instead of unsigned to hold the CC. 2. The patch keeps track of the CC in all DefaultABIClient subclasses. 3. The patch passes the CC into LLVM_SHOULD_PASS_AGGREGATE_IN_MIXED_REGS and LLVM_AGGREGATE_PARTIALLY_PASSED_IN_REGS. 4. The patch implements both macros in the ARM backend according to the rules of the AAPCS spec. Note: no code was imported to implement this. The structure of vfp_arg_homogenous_aggregate_p was originally taken from the i386 classify_argument() function. deep -------------- next part -------------- A non-text attachment was scrubbed... Name: deep-gcc-hard-float-homogeneous.diff Type: application/octet-stream Size: 27944 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090805/02d0cbea/attachment.obj From benny.kra at googlemail.com Wed Aug 5 06:34:21 2009 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Wed, 05 Aug 2009 11:34:21 -0000 Subject: [llvm-commits] [llvm] r78187 - in /llvm/trunk/include/llvm: LLVMContext.h TypeSymbolTable.h Message-ID: <200908051134.n75BYVH0030718@zion.cs.uiuc.edu> Author: d0k Date: Wed Aug 5 06:33:27 2009 New Revision: 78187 URL: http://llvm.org/viewvc/llvm-project?rev=78187&view=rev Log: Remove unused forward decls. Modified: llvm/trunk/include/llvm/LLVMContext.h llvm/trunk/include/llvm/TypeSymbolTable.h Modified: llvm/trunk/include/llvm/LLVMContext.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/LLVMContext.h?rev=78187&r1=78186&r2=78187&view=diff ============================================================================== --- llvm/trunk/include/llvm/LLVMContext.h (original) +++ llvm/trunk/include/llvm/LLVMContext.h Wed Aug 5 06:33:27 2009 @@ -21,31 +21,7 @@ namespace llvm { -class APFloat; -class APInt; -class ArrayType; -class Constant; -class ConstantAggregateZero; -class ConstantArray; -class ConstantFP; -class ConstantInt; -class ConstantPointerNull; -class ConstantStruct; -class ConstantVector; -class FunctionType; -class IntegerType; struct LLVMContextImpl; -class MDNode; -class MDString; -class OpaqueType; -class PointerType; -class StringRef; -class StructType; -class Type; -class UndefValue; -class Use; -class Value; -class VectorType; /// This is an important class for using LLVM in a threaded context. It /// (opaquely) owns and manages the core "global" data of LLVM's core Modified: llvm/trunk/include/llvm/TypeSymbolTable.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/TypeSymbolTable.h?rev=78187&r1=78186&r2=78187&view=diff ============================================================================== --- llvm/trunk/include/llvm/TypeSymbolTable.h (original) +++ llvm/trunk/include/llvm/TypeSymbolTable.h Wed Aug 5 06:33:27 2009 @@ -19,6 +19,8 @@ namespace llvm { +class StringRef; + /// This class provides a symbol table of name/type pairs with operations to /// support constructing, searching and iterating over the symbol table. The /// class derives from AbstractTypeUser so that the contents of the symbol From aaronngray.lists at googlemail.com Wed Aug 5 07:35:20 2009 From: aaronngray.lists at googlemail.com (Aaron Gray) Date: Wed, 5 Aug 2009 13:35:20 +0100 Subject: [llvm-commits] Pre pr4572 lvm-gcc building/working revision needed Message-ID: <9719867c0908050535s6ce3c775n425ead340f5abfed@mail.gmail.com> Hi, I am trying to find someone who has a building/working pre pr4572 revision of llvm-gcc working on Cygwin and/or MinGW32. Many thanks in advance, Aaron -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20090805/bbbfe6df/attachment.html From alenhar2 at cs.uiuc.edu Wed Aug 5 09:00:47 2009 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Wed, 05 Aug 2009 14:00:47 -0000 Subject: [llvm-commits] [llvm] r78189 - /llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp Message-ID: <200908051400.n75E0tWJ002777@zion.cs.uiuc.edu> Author: alenhar2 Date: Wed Aug 5 08:59:57 2009 New Revision: 78189 URL: http://llvm.org/viewvc/llvm-project?rev=78189&view=rev Log: Alpha: Get section directives right Modified: llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp Modified: llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp?rev=78189&r1=78188&r2=78189&view=diff ============================================================================== --- llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp (original) +++ llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp Wed Aug 5 08:59:57 2009 @@ -36,11 +36,11 @@ public: void Initialize(MCContext &Ctx, const TargetMachine &TM) { TargetLoweringObjectFile::Initialize(Ctx, TM); - TextSection = getOrCreateSection("_text", true, + TextSection = getOrCreateSection(".text", true, SectionKind::getText()); - DataSection = getOrCreateSection("_data", true, + DataSection = getOrCreateSection(".data", true, SectionKind::getDataRel()); - ReadOnlySection = getOrCreateSection("_rodata", true, + ReadOnlySection = getOrCreateSection(".rodata", true, SectionKind::getReadOnly()); } }; From asl at math.spbu.ru Wed Aug 5 09:42:15 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 05 Aug 2009 14:42:15 -0000 Subject: [llvm-commits] [llvm] r78191 - /llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.td Message-ID: <200908051442.n75EgMpu004052@zion.cs.uiuc.edu> Author: asl Date: Wed Aug 5 09:42:00 2009 New Revision: 78191 URL: http://llvm.org/viewvc/llvm-project?rev=78191&view=rev Log: Special constants as destinations does not work as expected - drop the patterns. Modified: llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.td Modified: llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.td?rev=78191&r1=78190&r2=78191&view=diff ============================================================================== --- llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.td (original) +++ llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.td Wed Aug 5 09:42:00 2009 @@ -722,59 +722,6 @@ "cmp.w\t{$src1, $src2}", [(MSP430cmp (i16 imm:$src1), (load addr:$src2)), (implicit SRW)]>; -// FIXME: imm is allowed only on src operand, not on dst. - -//def CMP8ri : Pseudo<(outs), (ins GR8:$src1, i8imm:$src2), -// "cmp.b\t{$src1, $src2}", -// [(MSP430cmp GR8:$src1, imm:$src2), (implicit SRW)]>; -//def CMP16ri : Pseudo<(outs), (ins GR16:$src1, i16imm:$src2), -// "cmp.w\t{$src1, $src2}", -// [(MSP430cmp GR16:$src1, imm:$src2), (implicit SRW)]>; - -//def CMP8mi : Pseudo<(outs), (ins memsrc:$src1, i8imm:$src2), -// "cmp.b\t{$src1, $src2}", -// [(MSP430cmp (load addr:$src1), (i8 imm:$src2)), (implicit SRW)]>; -//def CMP16mi : Pseudo<(outs), (ins memsrc:$src1, i16imm:$src2), -// "cmp.w\t{$src1, $src2}", -// [(MSP430cmp (load addr:$src1), (i16 imm:$src2)), (implicit SRW)]>; - - -// Imm 0, +1, +2, +4, +8 are encoded via constant generator registers. -// That's why we can use them as dest operands. -// We don't define new class for them, since they would need special encoding -// in the future. - -def CMP8ri0 : Pseudo<(outs), (ins GR8:$src1), - "cmp.b\t{$src1, #0}", - [(MSP430cmp GR8:$src1, 0), (implicit SRW)]>; -def CMP16ri0: Pseudo<(outs), (ins GR16:$src1), - "cmp.w\t{$src1, #0}", - [(MSP430cmp GR16:$src1, 0), (implicit SRW)]>; -def CMP8ri1 : Pseudo<(outs), (ins GR8:$src1), - "cmp.b\t{$src1, #1}", - [(MSP430cmp GR8:$src1, 1), (implicit SRW)]>; -def CMP16ri1: Pseudo<(outs), (ins GR16:$src1), - "cmp.w\t{$src1, #1}", - [(MSP430cmp GR16:$src1, 1), (implicit SRW)]>; -def CMP8ri2 : Pseudo<(outs), (ins GR8:$src1), - "cmp.b\t{$src1, #2}", - [(MSP430cmp GR8:$src1, 2), (implicit SRW)]>; -def CMP16ri2: Pseudo<(outs), (ins GR16:$src1), - "cmp.w\t{$src1, #2}", - [(MSP430cmp GR16:$src1, 2), (implicit SRW)]>; -def CMP8ri4 : Pseudo<(outs), (ins GR8:$src1), - "cmp.b\t{$src1, #4}", - [(MSP430cmp GR8:$src1, 4), (implicit SRW)]>; -def CMP16ri4: Pseudo<(outs), (ins GR16:$src1), - "cmp.w\t{$src1, #4}", - [(MSP430cmp GR16:$src1, 4), (implicit SRW)]>; -def CMP8ri8 : Pseudo<(outs), (ins GR8:$src1), - "cmp.b\t{$src1, #8}", - [(MSP430cmp GR8:$src1, 8), (implicit SRW)]>; -def CMP16ri8: Pseudo<(outs), (ins GR16:$src1), - "cmp.w\t{$src1, #8}", - [(MSP430cmp GR16:$src1, 8), (implicit SRW)]>; - def CMP8rm : Pseudo<(outs), (ins GR8:$src1, memsrc:$src2), "cmp.b\t{$src1, $src2}", [(MSP430cmp GR8:$src1, (load addr:$src2)), (implicit SRW)]>; From alenhar2 at cs.uiuc.edu Wed Aug 5 10:04:24 2009 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Wed, 05 Aug 2009 15:04:24 -0000 Subject: [llvm-commits] [llvm] r78192 - /llvm/trunk/include/llvm/Support/GraphWriter.h Message-ID: <200908051504.n75F4Ojr004827@zion.cs.uiuc.edu> Author: alenhar2 Date: Wed Aug 5 10:04:22 2009 New Revision: 78192 URL: http://llvm.org/viewvc/llvm-project?rev=78192&view=rev Log: only point to dest labels if the graph has them Modified: llvm/trunk/include/llvm/Support/GraphWriter.h Modified: llvm/trunk/include/llvm/Support/GraphWriter.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/GraphWriter.h?rev=78192&r1=78191&r2=78192&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/GraphWriter.h (original) +++ llvm/trunk/include/llvm/Support/GraphWriter.h Wed Aug 5 10:04:22 2009 @@ -252,8 +252,12 @@ if (SrcNodePort >= 0) O << ":s" << SrcNodePort; O << " -> Node" << DestNodeID; - if (DestNodePort >= 0) - O << ":d" << DestNodePort; + if (DestNodePort >= 0) { + if (DOTTraits::hasEdgeDestLabels()) + O << ":d" << DestNodePort; + else + O << ":s" << DestNodePort; + } if (!Attrs.empty()) O << "[" << Attrs << "]"; From alenhar2 at cs.uiuc.edu Wed Aug 5 10:06:45 2009 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Wed, 05 Aug 2009 15:06:45 -0000 Subject: [llvm-commits] [poolalloc] r78193 - in /poolalloc/trunk: include/rdsa/DSGraphTraits.h include/rdsa/DSNode.h include/rdsa/DSSupport.h include/rdsa/DataStructure.h lib/rDSA/Basic.cpp lib/rDSA/BottomUpClosure.cpp lib/rDSA/CallTargets.cpp lib/rDSA/CompleteBottomUp.cpp lib/rDSA/DataStructure.cpp lib/rDSA/DataStructureAA.cpp lib/rDSA/DataStructureStats.cpp lib/rDSA/EquivClassGraphs.cpp lib/rDSA/GraphChecker.cpp lib/rDSA/Local.cpp lib/rDSA/Printer.cpp lib/rDSA/StdLibPass.cpp lib/rDSA/Steensgaard.cpp lib/rDSA/TopDownClosure.cpp Message-ID: <200908051506.n75F6kI7004967@zion.cs.uiuc.edu> Author: alenhar2 Date: Wed Aug 5 10:06:44 2009 New Revision: 78193 URL: http://llvm.org/viewvc/llvm-project?rev=78193&view=rev Log: Allow union types by tracking pointers per byte offset and cleanup interfaces Modified: poolalloc/trunk/include/rdsa/DSGraphTraits.h poolalloc/trunk/include/rdsa/DSNode.h poolalloc/trunk/include/rdsa/DSSupport.h poolalloc/trunk/include/rdsa/DataStructure.h poolalloc/trunk/lib/rDSA/Basic.cpp poolalloc/trunk/lib/rDSA/BottomUpClosure.cpp poolalloc/trunk/lib/rDSA/CallTargets.cpp poolalloc/trunk/lib/rDSA/CompleteBottomUp.cpp poolalloc/trunk/lib/rDSA/DataStructure.cpp poolalloc/trunk/lib/rDSA/DataStructureAA.cpp poolalloc/trunk/lib/rDSA/DataStructureStats.cpp poolalloc/trunk/lib/rDSA/EquivClassGraphs.cpp poolalloc/trunk/lib/rDSA/GraphChecker.cpp poolalloc/trunk/lib/rDSA/Local.cpp poolalloc/trunk/lib/rDSA/Printer.cpp poolalloc/trunk/lib/rDSA/StdLibPass.cpp poolalloc/trunk/lib/rDSA/Steensgaard.cpp poolalloc/trunk/lib/rDSA/TopDownClosure.cpp Modified: poolalloc/trunk/include/rdsa/DSGraphTraits.h URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/rdsa/DSGraphTraits.h?rev=78193&r1=78192&r2=78193&view=diff ============================================================================== --- poolalloc/trunk/include/rdsa/DSGraphTraits.h (original) +++ poolalloc/trunk/include/rdsa/DSGraphTraits.h Wed Aug 5 10:06:44 2009 @@ -34,10 +34,10 @@ DSNodeIterator(NodeTy *N) : Node(N), Offset(0) {} // begin iterator DSNodeIterator(NodeTy *N, bool) : Node(N) { // Create end iterator if (N != 0) { - Offset = N->getNumLinks() << DS::PointerShift; + Offset = N->getNumLinks(); if (Offset == 0 && Node->getForwardNode() && Node->isDeadNode()) // Model Forward link - Offset += DS::PointerSize; + Offset += 1; } else { Offset = 0; } @@ -66,7 +66,7 @@ pointer operator->() const { return operator*(); } _Self& operator++() { // Preincrement - Offset += (1 << DS::PointerShift); + Offset += 1; return *this; } _Self operator++(int) { // Postincrement Modified: poolalloc/trunk/include/rdsa/DSNode.h URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/rdsa/DSNode.h?rev=78193&r1=78192&r2=78193&view=diff ============================================================================== --- poolalloc/trunk/include/rdsa/DSNode.h (original) +++ poolalloc/trunk/include/rdsa/DSNode.h Wed Aug 5 10:06:44 2009 @@ -195,9 +195,7 @@ /// hasLink - Return true if this memory object has a link in slot LinkNo /// bool hasLink(unsigned Offset) const { - assert((Offset & ((1 << DS::PointerShift)-1)) == 0 && - "Pointer offset not aligned correctly!"); - unsigned Index = Offset >> DS::PointerShift; + unsigned Index = Offset; assert(Index < Links.size() && "Link index is out of range!"); return Links[Index].getNode(); } @@ -205,16 +203,12 @@ /// getLink - Return the link at the specified offset. /// DSNodeHandle &getLink(unsigned Offset) { - assert((Offset & ((1 << DS::PointerShift)-1)) == 0 && - "Pointer offset not aligned correctly!"); - unsigned Index = Offset >> DS::PointerShift; + unsigned Index = Offset; assert(Index < Links.size() && "Link index is out of range!"); return Links[Index]; } const DSNodeHandle &getLink(unsigned Offset) const { - assert((Offset & ((1 << DS::PointerShift)-1)) == 0 && - "Pointer offset not aligned correctly!"); - unsigned Index = Offset >> DS::PointerShift; + unsigned Index = Offset; assert(Index < Links.size() && "Link index is out of range!"); return Links[Index]; } @@ -264,17 +258,11 @@ /// instead one of the higher level methods should be used, below. /// void setLink(unsigned Offset, const DSNodeHandle &NH) { - assert((Offset & ((1 << DS::PointerShift)-1)) == 0 && - "Pointer offset not aligned correctly!"); - unsigned Index = Offset >> DS::PointerShift; + unsigned Index = Offset; assert(Index < Links.size() && "Link index is out of range!"); Links[Index] = NH; } - /// getPointerSize - Return the size of a pointer for the current target. - /// - unsigned getPointerSize() const { return DS::PointerSize; } - /// addEdgeTo - Add an edge from the current node to the specified node. This /// can cause merging of nodes in the graph. /// Modified: poolalloc/trunk/include/rdsa/DSSupport.h URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/rdsa/DSSupport.h?rev=78193&r1=78192&r2=78193&view=diff ============================================================================== --- poolalloc/trunk/include/rdsa/DSSupport.h (original) +++ poolalloc/trunk/include/rdsa/DSSupport.h Wed Aug 5 10:06:44 2009 @@ -30,17 +30,6 @@ class DSGraph; // A graph for a function class ReachabilityCloner; -namespace DS { // FIXME: After the paper, this should get cleaned up - enum { PointerShift = 2, // 64bit ptrs = 3, 32 bit ptrs = 2 - PointerSize = 1 << PointerShift - }; - - /// isPointerType - Return true if this first class type is big enough to hold - /// a pointer. - /// - bool isPointerType(const Type *Ty); -} - //===----------------------------------------------------------------------===// /// DSNodeHandle - Implement a "handle" to a data structure node that takes care /// of all of the add/un'refing of the node to prevent the backpointers in the Modified: poolalloc/trunk/include/rdsa/DataStructure.h URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/rdsa/DataStructure.h?rev=78193&r1=78192&r2=78193&view=diff ============================================================================== --- poolalloc/trunk/include/rdsa/DataStructure.h (original) +++ poolalloc/trunk/include/rdsa/DataStructure.h Wed Aug 5 10:06:44 2009 @@ -140,23 +140,24 @@ virtual void releaseMemory(); - virtual bool hasDSGraph(const Function &F) const { - return DSInfo.find(&F) != DSInfo.end(); + virtual bool hasDSGraph(const Function* F) const { + return DSInfo.find(F) != DSInfo.end(); } /// getDSGraph - Return the data structure graph for the specified function. /// - virtual DSGraph *getDSGraph(const Function &F) const { - hash_map::const_iterator I = DSInfo.find(&F); + virtual DSGraph *getDSGraph(const Function* F) const { + hash_map::const_iterator I = DSInfo.find(F); assert(I != DSInfo.end() && "Function not in module!"); return I->second; } - void setDSGraph(const Function& F, DSGraph* G) { - DSInfo[&F] = G; + void setDSGraph(const Function* F, DSGraph* G) { + DSInfo[F] = G; } - DSGraph* getOrCreateGraph(const Function* F); + DSGraph* getOrFetchDSGraph(const Function* F); + DSGraph* getGlobalsGraph() const { return GlobalsGraph; } @@ -394,7 +395,7 @@ hash_set &Visited); void InlineCallersIntoGraph(DSGraph* G); - void ComputePostOrder(const Function &F, hash_set &Visited, + void ComputePostOrder(const Function* F, hash_set &Visited, std::vector &PostOrder); }; @@ -437,11 +438,11 @@ /// getDSGraph - Return the data structure graph for the specified function. /// - virtual DSGraph *getDSGraph(const Function &F) const { + virtual DSGraph *getDSGraph(const Function* F) const { return getResultGraph(); } - virtual bool hasDSGraph(const Function &F) const { + virtual bool hasDSGraph(const Function* F) const { return true; } Modified: poolalloc/trunk/lib/rDSA/Basic.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/rDSA/Basic.cpp?rev=78193&r1=78192&r2=78193&view=diff ============================================================================== --- poolalloc/trunk/lib/rDSA/Basic.cpp (original) +++ poolalloc/trunk/lib/rDSA/Basic.cpp Wed Aug 5 10:06:44 2009 @@ -77,7 +77,7 @@ Node->foldNodeCompletely(); Node->maskNodeTypes(DSNode::IncompleteNode); - setDSGraph(*F, G); + setDSGraph(F, G); } } Modified: poolalloc/trunk/lib/rDSA/BottomUpClosure.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/rDSA/BottomUpClosure.cpp?rev=78193&r1=78192&r2=78193&view=diff ============================================================================== --- poolalloc/trunk/lib/rDSA/BottomUpClosure.cpp (original) +++ poolalloc/trunk/lib/rDSA/BottomUpClosure.cpp Wed Aug 5 10:06:44 2009 @@ -52,19 +52,19 @@ Function *MainFunc = M.getFunction("main"); if (MainFunc && !MainFunc->isDeclaration()) { calculateGraphs(MainFunc, Stack, NextID, ValMap); - CloneAuxIntoGlobal(getDSGraph(*MainFunc)); + CloneAuxIntoGlobal(getDSGraph(MainFunc)); } else { DEBUG(errs() << debugname << ": No 'main' function found!\n"); } // Calculate the graphs for any functions that are unreachable from main... for (Module::iterator I = M.begin(), E = M.end(); I != E; ++I) - if (!I->isDeclaration() && !hasDSGraph(*I)) { + if (!I->isDeclaration() && !hasDSGraph(I)) { if (MainFunc) DEBUG(errs() << debugname << ": Function unreachable from main: " << I->getName() << "\n"); calculateGraphs(I, Stack, NextID, ValMap); // Calculate all graphs. - CloneAuxIntoGlobal(getDSGraph(*I)); + CloneAuxIntoGlobal(getDSGraph(I)); } // If we computed any temporary indcallgraphs, free them now. @@ -97,7 +97,7 @@ // into the main function's graph so that the main function contains all of // the information about global pools and GV usage in the program. if (MainFunc && !MainFunc->isDeclaration()) { - DSGraph* MainGraph = getOrCreateGraph(MainFunc); + DSGraph* MainGraph = getDSGraph(MainFunc); const DSGraph* GG = MainGraph->getGlobalsGraph(); ReachabilityCloner RC(MainGraph, GG, DSGraph::DontCloneCallNodes | @@ -229,7 +229,7 @@ return Min; } - DSGraph* Graph = getOrCreateGraph(F); + DSGraph* Graph = getOrFetchDSGraph(F); // Find all callee functions. std::vector CalleeFunctions; @@ -315,7 +315,7 @@ unsigned SCCSize = 1; const Function *NF = Stack.back(); ValMap[NF] = ~0U; - DSGraph* SCCGraph = getDSGraph(*NF); + DSGraph* SCCGraph = getDSGraph(NF); // First thing first, collapse all of the DSGraphs into a single graph for // the entire SCC. Splice all of the graphs into one and discard all of the @@ -326,13 +326,13 @@ NF = Stack.back(); ValMap[NF] = ~0U; - DSGraph* NFG = getDSGraph(*NF); + DSGraph* NFG = getDSGraph(NF); if (NFG != SCCGraph) { // Update the Function -> DSG map. for (DSGraph::retnodes_iterator I = NFG->retnodes_begin(), E = NFG->retnodes_end(); I != E; ++I) - setDSGraph(*I->first, SCCGraph); + setDSGraph(I->first, SCCGraph); SCCGraph->spliceFrom(NFG); delete NFG; @@ -467,11 +467,11 @@ ii != ee; ++ii) callee_add(TheCall, *ii); - if (CalledFuncs.size() == 1 && (isComplete || hasDSGraph(*CalledFuncs[0]))) { + if (CalledFuncs.size() == 1 && (isComplete || hasDSGraph(CalledFuncs[0]))) { const Function *Callee = CalledFuncs[0]; // Get the data structure graph for the called function. - GI = getDSGraph(*Callee); // Graph to inline + GI = getDSGraph(Callee); // Graph to inline DEBUG(GI->AssertGraphOK(); GI->getGlobalsGraph()->AssertGraphOK()); DEBUG(errs() << " Inlining graph for " << Callee->getName() << "[" << GI->getGraphSize() << "+" @@ -500,7 +500,7 @@ if (!isComplete) { for (unsigned x = 0; x < CalledFuncs.size(); ) - if (!hasDSGraph(*CalledFuncs[x])) + if (!hasDSGraph(CalledFuncs[x])) CalledFuncs.erase(CalledFuncs.begin() + x); else ++x; @@ -516,7 +516,7 @@ E = CalledFuncs.end(); // Start with a copy of the first graph. - GI = IndCallGraph.first = new DSGraph(getDSGraph(**I), GlobalECs); + GI = IndCallGraph.first = new DSGraph(getDSGraph(*I), GlobalECs); GI->setGlobalsGraph(Graph->getGlobalsGraph()); std::vector &Args = IndCallGraph.second; @@ -529,7 +529,7 @@ // If the graph already contains the nodes for the function, don't // bother merging it in again. if (!GI->containsFunction(*I)) { - GI->cloneInto(getDSGraph(**I)); + GI->cloneInto(getDSGraph(*I)); ++NumInlines; } @@ -616,11 +616,11 @@ ii != ee; ++ii) callee_add(TheCall, *ii); - if (CalledFuncs.size() == 1 && hasDSGraph(*CalledFuncs[0])) { + if (CalledFuncs.size() == 1 && hasDSGraph(CalledFuncs[0])) { const Function *Callee = CalledFuncs[0]; // Get the data structure graph for the called function. - GI = getDSGraph(*Callee); // Graph to inline + GI = getDSGraph(Callee); // Graph to inline if (GI == Graph) continue; DEBUG(errs() << " Inlining graph for " << Callee->getName() << "[" << GI->getGraphSize() << "+" @@ -646,7 +646,7 @@ DEBUG(errs() << "\n"); for (unsigned x = 0; x < CalledFuncs.size(); ) - if (!hasDSGraph(*CalledFuncs[x])) + if (!hasDSGraph(CalledFuncs[x])) CalledFuncs.erase(CalledFuncs.begin() + x); else ++x; @@ -665,7 +665,7 @@ E = CalledFuncs.end(); // Start with a copy of the first graph. - GI = IndCallGraph.first = new DSGraph(getDSGraph(**I), GlobalECs); + GI = IndCallGraph.first = new DSGraph(getDSGraph(*I), GlobalECs); GI->setGlobalsGraph(Graph->getGlobalsGraph()); std::vector &Args = IndCallGraph.second; @@ -678,7 +678,7 @@ // If the graph already contains the nodes for the function, don't // bother merging it in again. if (!GI->containsFunction(*I)) { - GI->cloneInto(getDSGraph(**I)); + GI->cloneInto(getDSGraph(*I)); ++NumInlines; } Modified: poolalloc/trunk/lib/rDSA/CallTargets.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/rDSA/CallTargets.cpp?rev=78193&r1=78192&r2=78193&view=diff ============================================================================== --- poolalloc/trunk/lib/rDSA/CallTargets.cpp (original) +++ poolalloc/trunk/lib/rDSA/CallTargets.cpp Wed Aug 5 10:06:44 2009 @@ -64,7 +64,7 @@ CompleteSites.insert(cs); } else { IndCall++; - DSNode* N = T->getDSGraph(*cs.getCaller()) + DSNode* N = T->getDSGraph(cs.getCaller()) ->getNodeForValue(cs.getCalledValue()).getNode(); assert (N && "CallTarget: findIndTargets: No DSNode!\n"); N->addFullFunctionList(IndMap[cs]); Modified: poolalloc/trunk/lib/rDSA/CompleteBottomUp.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/rDSA/CompleteBottomUp.cpp?rev=78193&r1=78192&r2=78193&view=diff ============================================================================== --- poolalloc/trunk/lib/rDSA/CompleteBottomUp.cpp (original) +++ poolalloc/trunk/lib/rDSA/CompleteBottomUp.cpp Wed Aug 5 10:06:44 2009 @@ -53,7 +53,7 @@ if (*ii) { callee_iterator csi = callee_begin(*ii), cse = callee_end(*ii); if (csi != cse) ++csi; - DSGraph* G = getOrCreateGraph((*ii)->getParent()->getParent()); + DSGraph* G = getOrFetchDSGraph((*ii)->getParent()->getParent()); for ( ; csi != cse; ++csi) { G->getNodeForValue(*csi).mergeWith(G->getNodeForValue((*ii)->getOperand(0))); G->getNodeForValue((*ii)->getOperand(0)).getNode()->setGlobalMarker(); Modified: poolalloc/trunk/lib/rDSA/DataStructure.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/rDSA/DataStructure.cpp?rev=78193&r1=78192&r2=78193&view=diff ============================================================================== --- poolalloc/trunk/lib/rDSA/DataStructure.cpp (original) +++ poolalloc/trunk/lib/rDSA/DataStructure.cpp Wed Aug 5 10:06:44 2009 @@ -44,34 +44,12 @@ STATISTIC (NumDNE , "Number of nodes removed by reachability"); STATISTIC (NumTrivialDNE , "Number of nodes trivially removed"); STATISTIC (NumTrivialGlobalDNE, "Number of globals trivially removed"); -#ifdef LLVA_KERNEL - STATISTIC (LostPools , "Number of pools lost to DSNode Merge"); -#endif static cl::opt DSAFieldLimit("dsa-field-limit", cl::Hidden, cl::desc("Number of fields to track before collapsing a node"), cl::init(256)); } -#if 0 -#define TIME_REGION(VARNAME, DESC) \ - NamedRegionTimer VARNAME(DESC) -#else -#define TIME_REGION(VARNAME, DESC) -#endif - -using namespace DS; - -// -// Function: DS::isPointerType() -// -// Description: -// This returns whether the given type is a pointer. -// -bool DS::isPointerType(const Type *Ty) { - return isa(Ty); -} - /// isForwarding - Return true if this NodeHandle is forwarding to another /// one. bool DSNodeHandle::isForwarding() const { @@ -538,7 +516,7 @@ // If this node would have to have an unreasonable number of fields, just // collapse it. This can occur for fortran common blocks, which have stupid // things like { [100000000 x double], [1000000 x double] }. - unsigned NumFields = (NewTySize+DS::PointerSize-1) >> DS::PointerShift; + unsigned NumFields = NewTySize; if (NumFields > DSAFieldLimit) { foldNodeCompletely(); return true; @@ -566,7 +544,7 @@ // If this node would have to have an unreasonable number of fields, just // collapse it. This can occur for fortran common blocks, which have stupid // things like { [100000000 x double], [1000000 x double] }. - unsigned NumFields = (NewTySize+Offset+DS::PointerSize-1) >> DS::PointerShift; + unsigned NumFields = NewTySize+Offset; if (NumFields > DSAFieldLimit) { foldNodeCompletely(); return true; @@ -953,7 +931,7 @@ // Make all of the outgoing links of N now be outgoing links of CurNodeH. // for (unsigned i = 0; i < N->getNumLinks(); ++i) { - DSNodeHandle &Link = N->getLink(i << DS::PointerShift); + DSNodeHandle &Link = N->getLink(i); if (Link.getNode()) { // Compute the offset into the current node at which to // merge this link. In the common case, this is a linear @@ -964,7 +942,7 @@ unsigned MergeOffset = 0; DSNode *CN = CurNodeH.getNode(); if (CN->Size != 1) - MergeOffset = ((i << DS::PointerShift)+NOffset) % CN->getSize(); + MergeOffset = (i+NOffset) % CN->getSize(); CN->addEdgeTo(MergeOffset, Link); } } @@ -1091,7 +1069,7 @@ // reason, we must always go through NH. DN = 0; for (unsigned i = 0, e = SN->getNumLinks(); i != e; ++i) { - const DSNodeHandle &SrcEdge = SN->getLink(i << DS::PointerShift); + const DSNodeHandle &SrcEdge = SN->getLink(i); if (!SrcEdge.isNull()) { const DSNodeHandle &DestEdge = getClonedNH(SrcEdge); // Compute the offset into the current node at which to @@ -1103,7 +1081,7 @@ unsigned MergeOffset = 0; DSNode *CN = NH.getNode(); if (CN->getSize() != 1) - MergeOffset = ((i << DS::PointerShift)+NH.getOffset()) % CN->getSize(); + MergeOffset = (i+NH.getOffset()) % CN->getSize(); CN->addEdgeTo(MergeOffset, DestEdge); } } @@ -1296,7 +1274,7 @@ // For this reason, we must always go through NH. DN = 0; for (unsigned i = 0, e = SN->getNumLinks(); i != e; ++i) { - const DSNodeHandle &SrcEdge = SN->getLink(i << DS::PointerShift); + const DSNodeHandle &SrcEdge = SN->getLink(i); if (!SrcEdge.isNull()) { // Compute the offset into the current node at which to // merge this link. In the common case, this is a linear @@ -1306,7 +1284,7 @@ // links at offset zero. DSNode *CN = SCNH.getNode(); unsigned MergeOffset = - ((i << DS::PointerShift)+SCNH.getOffset()) % CN->getSize(); + (i+SCNH.getOffset()) % CN->getSize(); DSNodeHandle Tmp = CN->getLink(MergeOffset); if (!Tmp.isNull()) { @@ -1321,7 +1299,7 @@ unsigned MergeOffset = 0; CN = SCNH.getNode(); - MergeOffset = ((i << DS::PointerShift)+SCNH.getOffset()) %CN->getSize(); + MergeOffset = (i+SCNH.getOffset()) %CN->getSize(); CN->getLink(MergeOffset).mergeWith(Tmp); } } @@ -1528,7 +1506,6 @@ /// The CloneFlags member controls various aspects of the cloning process. /// void DSGraph::cloneInto( DSGraph* G, unsigned CloneFlags) { - TIME_REGION(X, "cloneInto"); assert(G != this && "Cannot clone graph into itself!"); NodeMapTy OldNodeMap; @@ -1547,10 +1524,6 @@ OldNodeMap[I] = New; } -#ifndef NDEBUG - Timer::addPeakMemoryMeasurement(); -#endif - // Rewrite the links in the new nodes to point into the current graph now. // Note that we don't loop over the node's list to do this. The problem is // that remaping links can cause recursive merging to happen, which means @@ -1773,8 +1746,6 @@ void DSGraph::mergeInGraph(const DSCallSite &CS, std::vector &Args, const DSGraph &Graph, unsigned CloneFlags) { - TIME_REGION(X, "mergeInGraph"); - assert((CloneFlags & DontCloneCallNodes) && "Doesn't support copying of call nodes!"); @@ -2180,7 +2151,6 @@ // we don't have to perform any non-trivial analysis here. // void DSGraph::removeTriviallyDeadNodes(bool updateForwarders) { - TIME_REGION(X, "removeTriviallyDeadNodes"); if (updateForwarders) { /// NOTE: This code is disabled. This slows down DSA on 177.mesa @@ -2189,26 +2159,22 @@ // Loop over all of the nodes in the graph, calling getNode on each field. // This will cause all nodes to update their forwarding edges, causing // forwarded nodes to be delete-able. - { TIME_REGION(X, "removeTriviallyDeadNodes:node_iterate"); - for (node_iterator NI = node_begin(), E = node_end(); NI != E; ++NI) { - DSNode &N = *NI; - for (unsigned l = 0, e = N.getNumLinks(); l != e; ++l) - N.getLink(l*N.getPointerSize()).getNode(); - } + for (node_iterator NI = node_begin(), E = node_end(); NI != E; ++NI) { + DSNode &N = *NI; + for (unsigned l = 0, e = N.getNumLinks(); l != e; ++l) + N.getLink(l).getNode(); } // NOTE: This code is disabled. Though it should, in theory, allow us to // remove more nodes down below, the scan of the scalar map is incredibly // expensive for certain programs (with large SCCs). In the future, if we can // make the scalar map scan more efficient, then we can reenable this. - { TIME_REGION(X, "removeTriviallyDeadNodes:scalarmap"); - // Likewise, forward any edges from the scalar nodes. While we are at it, - // clean house a bit. - for (DSScalarMap::iterator I = ScalarMap.begin(),E = ScalarMap.end();I != E;){ - I->second.getNode(); - ++I; - } + // Likewise, forward any edges from the scalar nodes. While we are at it, + // clean house a bit. + for (DSScalarMap::iterator I = ScalarMap.begin(),E = ScalarMap.end();I != E;){ + I->second.getNode(); + ++I; } } @@ -2352,8 +2318,6 @@ // merging... removeTriviallyDeadNodes(); - TIME_REGION(X, "removeDeadNodes"); - // FIXME: Merge non-trivially identical call nodes... // Alive - a set that holds all nodes found to be reachable/alive. @@ -2371,7 +2335,6 @@ DSGraph::StripIncompleteBit); // Mark all nodes reachable by (non-global) scalar nodes as alive... -{ TIME_REGION(Y, "removeDeadNodes:scalarscan"); for (DSScalarMap::iterator I = ScalarMap.begin(), E = ScalarMap.end(); I != E; ++I) if (isa(I->first)) { // Keep track of global nodes @@ -2391,7 +2354,6 @@ } else { I->second.getNode()->markReachableNodes(Alive); } -} // The return values are alive as well. for (ReturnNodesTy::iterator I = ReturnNodes.begin(), E = ReturnNodes.end(); @@ -2584,7 +2546,7 @@ unsigned N2Size = N2->getSize(); if (N2Size == 0) return; // No edges to map to. - for (unsigned i = 0, e = N1->getSize(); i < e; i += DS::PointerSize) { + for (unsigned i = 0, e = N1->getSize(); i < e; i += 1) { const DSNodeHandle &N1NH = N1->getLink(i); // Don't call N2->getLink if not needed (avoiding crash if N2Idx is not // aligned right). @@ -2665,7 +2627,6 @@ /// nodes reachable from them from the globals graph into the current graph. /// void DSGraph::updateFromGlobalGraph() { - TIME_REGION(X, "updateFromGlobalGraph"); ReachabilityCloner RC(this, GlobalsGraph, 0); // Clone the non-up-to-date global nodes into this graph. @@ -2697,12 +2658,12 @@ void DataStructures::deleteValue(Value *V) { if (const Function *F = getFnForValue(V)) { // Function local value? // If this is a function local value, just delete it from the scalar map! - getDSGraph(*F)->getScalarMap().eraseIfExists(V); + getDSGraph(F)->getScalarMap().eraseIfExists(V); return; } if (Function *F = dyn_cast(V)) { - assert(getDSGraph(*F)->getReturnNodes().size() == 1 && + assert(getDSGraph(F)->getReturnNodes().size() == 1 && "cannot handle scc's"); delete DSInfo[F]; DSInfo.erase(F); @@ -2716,14 +2677,14 @@ if (From == To) return; if (const Function *F = getFnForValue(From)) { // Function local value? // If this is a function local value, just delete it from the scalar map! - getDSGraph(*F)->getScalarMap().copyScalarIfExists(From, To); + getDSGraph(F)->getScalarMap().copyScalarIfExists(From, To); return; } if (Function *FromF = dyn_cast(From)) { Function *ToF = cast(To); assert(!DSInfo.count(ToF) && "New Function already exists!"); - DSGraph *NG = new DSGraph(getDSGraph(*FromF), GlobalECs); + DSGraph *NG = new DSGraph(getDSGraph(FromF), GlobalECs); DSInfo[ToF] = NG; assert(NG->getReturnNodes().size() == 1 && "Cannot copy SCC's yet!"); @@ -2735,7 +2696,7 @@ } if (const Function *F = getFnForValue(To)) { - getDSGraph(*F)->getScalarMap().copyScalarIfExists(From, To); + getDSGraph(F)->getScalarMap().copyScalarIfExists(From, To); return; } @@ -2745,12 +2706,12 @@ abort(); } -DSGraph* DataStructures::getOrCreateGraph(const Function* F) { +DSGraph* DataStructures::getOrFetchDSGraph(const Function* F) { assert(F && "No function"); DSGraph *&G = DSInfo[F]; if (!G) { //Clone or Steal the Source Graph - DSGraph* BaseGraph = GraphSource->getDSGraph(*F); + DSGraph* BaseGraph = GraphSource->getDSGraph(F); if (Clone) { G = new DSGraph(BaseGraph, GlobalECs, DSGraph::DontCloneAuxCallNodes); } else { Modified: poolalloc/trunk/lib/rDSA/DataStructureAA.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/rDSA/DataStructureAA.cpp?rev=78193&r1=78192&r2=78193&view=diff ============================================================================== --- poolalloc/trunk/lib/rDSA/DataStructureAA.cpp (original) +++ poolalloc/trunk/lib/rDSA/DataStructureAA.cpp Wed Aug 5 10:06:44 2009 @@ -113,11 +113,11 @@ // DSGraph *DSAA::getGraphForValue(const Value *V) { if (const Instruction *I = dyn_cast(V)) - return TD->getDSGraph(*I->getParent()->getParent()); + return TD->getDSGraph(I->getParent()->getParent()); else if (const Argument *A = dyn_cast(V)) - return TD->getDSGraph(*A->getParent()); + return TD->getDSGraph(A->getParent()); else if (const BasicBlock *BB = dyn_cast(V)) - return TD->getDSGraph(*BB->getParent()); + return TD->getDSGraph(BB->getParent()); return 0; } @@ -178,7 +178,7 @@ if (CS.getInstruction() == MapCS.getInstruction()) { { const Function *Caller = CS.getInstruction()->getParent()->getParent(); - DSGraph* CallerTDGraph = TD->getDSGraph(*Caller); + DSGraph* CallerTDGraph = TD->getDSGraph(Caller); // Figure out which node in the TD graph this pointer corresponds to. DSScalarMap &CallerSM = CallerTDGraph->getScalarMap(); @@ -229,7 +229,7 @@ // the portion of the program we have analyzed, we can draw conclusions // based on whether the global escapes the program. Function *Caller = CS.getInstruction()->getParent()->getParent(); - DSGraph *G = TD->getDSGraph(*Caller); + DSGraph *G = TD->getDSGraph(Caller); DSScalarMap::iterator NI = G->getScalarMap().find(P); if (NI == G->getScalarMap().end()) { // If it wasn't in the local function graph, check the global graph. This @@ -251,8 +251,8 @@ // Get the graphs for the callee and caller. Note that we want the BU graph // for the callee because we don't want all caller's effects incorporated! const Function *Caller = CS.getInstruction()->getParent()->getParent(); - DSGraph* CallerTDGraph = TD->getDSGraph(*Caller); - DSGraph* CalleeBUGraph = BU->getDSGraph(*F); + DSGraph* CallerTDGraph = TD->getDSGraph(Caller); + DSGraph* CalleeBUGraph = BU->getDSGraph(F); // Figure out which node in the TD graph this pointer corresponds to. DSScalarMap &CallerSM = CallerTDGraph->getScalarMap(); Modified: poolalloc/trunk/lib/rDSA/DataStructureStats.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/rDSA/DataStructureStats.cpp?rev=78193&r1=78192&r2=78193&view=diff ============================================================================== --- poolalloc/trunk/lib/rDSA/DataStructureStats.cpp (original) +++ poolalloc/trunk/lib/rDSA/DataStructureStats.cpp Wed Aug 5 10:06:44 2009 @@ -39,7 +39,7 @@ "Number of loads/stores which are untyped"); class DSGraphStats : public FunctionPass, public InstVisitor { - void countCallees(const Function &F); + void countCallees(const Function* F); const DSGraph *TDGraph; DSNode *getNodeForValue(Value *V); @@ -83,7 +83,7 @@ } -void DSGraphStats::countCallees(const Function& F) { +void DSGraphStats::countCallees(const Function* F) { unsigned numIndirectCalls = 0, totalNumCallees = 0; for (DSGraph::fc_iterator I = TDGraph->fc_begin(), E = TDGraph->fc_end(); @@ -98,7 +98,7 @@ ++numIndirectCalls; } else { DEBUG(errs() << "WARNING: No callee in Function '" - << F.getNameStr() << "' at call: \n" + << F->getNameStr() << "' at call: \n" << *I->getCallSite().getInstruction()); } } @@ -107,7 +107,7 @@ NumIndirectCalls += numIndirectCalls; if (numIndirectCalls) { - DEBUG(errs() << " In function " << F.getName() << ": " + DEBUG(errs() << " In function " << F->getName() << ": " << (totalNumCallees / (double) numIndirectCalls) << " average callees per indirect call\n"); } @@ -150,8 +150,8 @@ bool DSGraphStats::runOnFunction(Function& F) { - TDGraph = getAnalysis().getDSGraph(F); - countCallees(F); + TDGraph = getAnalysis().getDSGraph(&F); + countCallees(&F); visit(F); return true; } Modified: poolalloc/trunk/lib/rDSA/EquivClassGraphs.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/rDSA/EquivClassGraphs.cpp?rev=78193&r1=78192&r2=78193&view=diff ============================================================================== --- poolalloc/trunk/lib/rDSA/EquivClassGraphs.cpp (original) +++ poolalloc/trunk/lib/rDSA/EquivClassGraphs.cpp Wed Aug 5 10:06:44 2009 @@ -65,13 +65,13 @@ MI != GlobalECs.member_end(); ++MI) { if (const Function* F = dyn_cast(*MI)) { if (!BaseGraph) { - BaseGraph = getOrCreateGraph(F); + BaseGraph = getOrFetchDSGraph(F); BaseGraph->getFunctionArgumentsForCall(F, Args); } else if (BaseGraph->containsFunction(F)) { //already merged } else { std::vector NextArgs; - BaseGraph->cloneInto(getOrCreateGraph(F)); + BaseGraph->cloneInto(getOrFetchDSGraph(F)); BaseGraph->getFunctionArgumentsForCall(F, NextArgs); unsigned i = 0, e = Args.size(); for (; i != e; ++i) { @@ -80,7 +80,7 @@ } for (e = NextArgs.size(); i != e; ++i) Args.push_back(NextArgs[i]); - setDSGraph(*F, BaseGraph); + setDSGraph(F, BaseGraph); } } } Modified: poolalloc/trunk/lib/rDSA/GraphChecker.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/rDSA/GraphChecker.cpp?rev=78193&r1=78192&r2=78193&view=diff ============================================================================== --- poolalloc/trunk/lib/rDSA/GraphChecker.cpp (original) +++ poolalloc/trunk/lib/rDSA/GraphChecker.cpp Wed Aug 5 10:06:44 2009 @@ -109,9 +109,9 @@ /// bool DSGC::runOnFunction(Function &F) { switch (DSPass) { - case local: verify(getAnalysis().getDSGraph(F)); break; - case bu: verify(getAnalysis().getDSGraph(F)); break; - case td: verify(getAnalysis().getDSGraph(F)); break; + case local: verify(getAnalysis().getDSGraph(&F)); break; + case bu: verify(getAnalysis().getDSGraph(&F)); break; + case td: verify(getAnalysis().getDSGraph(&F)); break; } return false; Modified: poolalloc/trunk/lib/rDSA/Local.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/rDSA/Local.cpp?rev=78193&r1=78192&r2=78193&view=diff ============================================================================== --- poolalloc/trunk/lib/rDSA/Local.cpp (original) +++ poolalloc/trunk/lib/rDSA/Local.cpp Wed Aug 5 10:06:44 2009 @@ -910,7 +910,7 @@ DSGraph* G = new DSGraph(GlobalECs, getTargetData(), GlobalsGraph); GraphBuilderLocal GGB(*I, G->getOrCreateReturnNodeFor(*I), G, *this); G->getAuxFunctionCalls() = G->getFunctionCalls(); - setDSGraph(*I, G); + setDSGraph(I, G); propagateUnknownFlag(G); } Modified: poolalloc/trunk/lib/rDSA/Printer.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/rDSA/Printer.cpp?rev=78193&r1=78192&r2=78193&view=diff ============================================================================== --- poolalloc/trunk/lib/rDSA/Printer.cpp (original) +++ poolalloc/trunk/lib/rDSA/Printer.cpp Wed Aug 5 10:06:44 2009 @@ -15,7 +15,7 @@ #include "rdsa/DataStructure.h" #include "rdsa/DSGraph.h" -#include "dsa/DSGraphTraits.h" +#include "rdsa/DSGraphTraits.h" #include "llvm/Module.h" #include "llvm/Constants.h" #include "llvm/Assembly/Writer.h" @@ -132,13 +132,13 @@ static bool edgeTargetsEdgeSource(const void *Node, DSNode::const_iterator I) { unsigned O = I.getNode()->getLink(I.getOffset()).getOffset(); - return (O >> DS::PointerShift) != 0; + return O != 0; } static DSNode::const_iterator getEdgeTarget(const DSNode *Node, DSNode::const_iterator I) { unsigned O = I.getNode()->getLink(I.getOffset()).getOffset(); - unsigned LinkNo = O >> DS::PointerShift; + unsigned LinkNo = O; const DSNode *N = *I; DSNode::const_iterator R = N->begin(); for (; LinkNo; --LinkNo) @@ -174,7 +174,7 @@ // Add edge from return node to real destination DSNode *DestNode = I->second.getNode(); - int EdgeDest = I->second.getOffset() >> DS::PointerShift; + int EdgeDest = I->second.getOffset(); if (EdgeDest == 0) EdgeDest = -1; GW.emitEdge(I->first, -1, DestNode, EdgeDest, "arrowtail=tee,color=gray63"); @@ -196,7 +196,7 @@ // Add edge from return node to real destination DSNode *RetNode = I->second.getNode(); - int RetEdgeDest = I->second.getOffset() >> DS::PointerShift;; + int RetEdgeDest = I->second.getOffset(); if (RetEdgeDest == 0) RetEdgeDest = -1; GW.emitEdge((void*)I->first, -1, RetNode, RetEdgeDest, "arrowtail=tee,color=gray63"); @@ -220,7 +220,7 @@ &EdgeSourceCaptions); if (DSNode *N = Call.getRetVal().getNode()) { - int EdgeDest = Call.getRetVal().getOffset() >> DS::PointerShift; + int EdgeDest = Call.getRetVal().getOffset(); if (EdgeDest == 0) EdgeDest = -1; GW.emitEdge(&Call, 0, N, EdgeDest, "color=gray63,tailclip=false"); } @@ -234,7 +234,7 @@ for (unsigned j = 0, e = Call.getNumPtrArgs(); j != e; ++j) if (DSNode *N = Call.getPtrArg(j).getNode()) { - int EdgeDest = Call.getPtrArg(j).getOffset() >> DS::PointerShift; + int EdgeDest = Call.getPtrArg(j).getOffset(); if (EdgeDest == 0) EdgeDest = -1; GW.emitEdge(&Call, j+2, N, EdgeDest, "color=gray63,tailclip=false"); } @@ -286,8 +286,8 @@ unsigned TotalNumNodes = 0, TotalCallNodes = 0; for (Module::const_iterator I = M->begin(), E = M->end(); I != E; ++I) - if (C.hasDSGraph(*I)) { - DSGraph* Gr = C.getDSGraph((Function&)*I); + if (C.hasDSGraph(I)) { + DSGraph* Gr = C.getDSGraph(I); unsigned NumCalls = Gr->shouldPrintAuxCalls() ? Gr->getAuxFunctionCalls().size() : Gr->getFunctionCalls().size(); bool IsDuplicateGraph = false; Modified: poolalloc/trunk/lib/rDSA/StdLibPass.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/rDSA/StdLibPass.cpp?rev=78193&r1=78192&r2=78193&view=diff ============================================================================== --- poolalloc/trunk/lib/rDSA/StdLibPass.cpp (original) +++ poolalloc/trunk/lib/rDSA/StdLibPass.cpp Wed Aug 5 10:06:44 2009 @@ -181,7 +181,7 @@ ii != ee; ++ii) if (CallInst* CI = dyn_cast(ii)) if (CI->getOperand(0) == F) { - DSGraph* Graph = getDSGraph(*CI->getParent()->getParent()); + DSGraph* Graph = getDSGraph(CI->getParent()->getParent()); //delete the call DEBUG(errs() << "Removing " << F->getNameStr() << " from " << CI->getParent()->getParent()->getNameStr() << "\n"); @@ -195,7 +195,7 @@ //Clone Module for (Module::iterator I = M.begin(), E = M.end(); I != E; ++I) if (!I->isDeclaration()) - getOrCreateGraph(&*I); + getOrFetchDSGraph(I); //Trust the readnone annotation for (Module::iterator I = M.begin(), E = M.end(); I != E; ++I) @@ -224,7 +224,7 @@ ii != ee; ++ii) if (CallInst* CI = dyn_cast(ii)) if (CI->getOperand(0) == F) { - DSGraph* Graph = getDSGraph(*CI->getParent()->getParent()); + DSGraph* Graph = getDSGraph(CI->getParent()->getParent()); if (recFuncs[x].action.read[0]) Graph->getNodeForValue(CI).getNode()->setReadMarker(); if (recFuncs[x].action.write[0]) Modified: poolalloc/trunk/lib/rDSA/Steensgaard.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/rDSA/Steensgaard.cpp?rev=78193&r1=78192&r2=78193&view=diff ============================================================================== --- poolalloc/trunk/lib/rDSA/Steensgaard.cpp (original) +++ poolalloc/trunk/lib/rDSA/Steensgaard.cpp Wed Aug 5 10:06:44 2009 @@ -72,7 +72,7 @@ // for (Module::iterator I = M.begin(), E = M.end(); I != E; ++I) { if (!I->isDeclaration()) { - ResultGraph->spliceFrom(DS->getDSGraph(*I)); + ResultGraph->spliceFrom(DS->getDSGraph(I)); } } Modified: poolalloc/trunk/lib/rDSA/TopDownClosure.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/rDSA/TopDownClosure.cpp?rev=78193&r1=78192&r2=78193&view=diff ============================================================================== --- poolalloc/trunk/lib/rDSA/TopDownClosure.cpp (original) +++ poolalloc/trunk/lib/rDSA/TopDownClosure.cpp Wed Aug 5 10:06:44 2009 @@ -51,7 +51,7 @@ Visited.insert(N); for (unsigned i = 0, e = N->getNumLinks(); i != e; ++i) { - DSNodeHandle &NH = N->getLink(i*N->getPointerSize()); + DSNodeHandle &NH = N->getLink(i); if (DSNode *NN = NH.getNode()) { std::vector Functions; NN->addFullFunctionList(Functions); @@ -112,12 +112,12 @@ // Calculate top-down from main... if (Function *F = M.getFunction("main")) - ComputePostOrder(*F, VisitedGraph, PostOrder); + ComputePostOrder(F, VisitedGraph, PostOrder); // Next calculate the graphs for each unreachable function... for (Module::iterator I = M.begin(), E = M.end(); I != E; ++I) if (!I->isDeclaration()) - ComputePostOrder(*I, VisitedGraph, PostOrder); + ComputePostOrder(I, VisitedGraph, PostOrder); VisitedGraph.clear(); // Release memory! } @@ -146,11 +146,11 @@ } -void TDDataStructures::ComputePostOrder(const Function &F, +void TDDataStructures::ComputePostOrder(const Function* F, hash_set &Visited, std::vector &PostOrder) { - if (F.isDeclaration()) return; - DSGraph* G = getOrCreateGraph(&F); + if (F->isDeclaration()) return; + DSGraph* G = getOrFetchDSGraph(F); if (Visited.count(G)) return; Visited.insert(G); @@ -159,7 +159,7 @@ Instruction *CallI = CI->getCallSite().getInstruction(); for (callee_iterator I = callee_begin(CallI), E = callee_end(CallI); I != E; ++I) - ComputePostOrder(**I, Visited, PostOrder); + ComputePostOrder(*I, Visited, PostOrder); } PostOrder.push_back(G); @@ -287,7 +287,7 @@ if (CI->isDirectCall()) { if (!CI->getCalleeFunc()->isDeclaration() && !DSG->getReturnNodes().count(CI->getCalleeFunc())) - CallerEdges[getOrCreateGraph(CI->getCalleeFunc())] + CallerEdges[getOrFetchDSGraph(CI->getCalleeFunc())] .push_back(CallerCallEdge(DSG, &*CI, CI->getCalleeFunc())); continue; } @@ -298,7 +298,7 @@ callee_begin(CallI), IPE = callee_end(CallI); // Skip over all calls to this graph (SCC calls). - while (IPI != IPE && getDSGraph(**IPI) == DSG) + while (IPI != IPE && getDSGraph(*IPI) == DSG) ++IPI; // All SCC calls? @@ -308,14 +308,14 @@ ++IPI; // Skip over more SCC calls. - while (IPI != IPE && getDSGraph(**IPI) == DSG) + while (IPI != IPE && getDSGraph(*IPI) == DSG) ++IPI; // If there is exactly one callee from this call site, remember the edge in // CallerEdges. if (IPI == IPE) { if (!FirstCallee->isDeclaration()) - CallerEdges[getOrCreateGraph(FirstCallee)] + CallerEdges[getOrFetchDSGraph(FirstCallee)] .push_back(CallerCallEdge(DSG, &*CI, FirstCallee)); continue; } @@ -360,7 +360,7 @@ // exactly once. DSCallSite *NCS = &IndCallGraph->getFunctionCalls().front(); for (unsigned i = 0, e = Callees.size(); i != e; ++i) { - DSGraph* CalleeGraph = getDSGraph(*Callees[i]); + DSGraph* CalleeGraph = getDSGraph(Callees[i]); if (CalleeGraph != DSG) CallerEdges[CalleeGraph].push_back(CallerCallEdge(IndCallGraph, NCS, Callees[i])); From nicholas at mxc.ca Wed Aug 5 10:17:09 2009 From: nicholas at mxc.ca (Nick Lewycky) Date: Wed, 05 Aug 2009 08:17:09 -0700 Subject: [llvm-commits] [commit-after-approval] printf("foo %s baz\n", "bar") -> puts("foo bar baz") In-Reply-To: References: Message-ID: <4A79A275.7000008@mxc.ca> Ryan Flynn wrote: > given a printf() call format containing a single "%s" conversion > specifier and a constant string parameter, inlines parameter into > format and lowers printf() to puts(). > > it's a bit more complex than the other printf() optimizations, but i > happened to run into the situation and it seemed pretty common and > straightforward to implement. > > my first attempt at an optimization, constructive criticism appreciated. Index: lib/Transforms/Scalar/SimplifyLibCalls.cpp =================================================================== --- lib/Transforms/Scalar/SimplifyLibCalls.cpp (revision 77970) +++ lib/Transforms/Scalar/SimplifyLibCalls.cpp (working copy) @@ -1323,6 +1323,32 @@ EmitPutS(CI->getOperand(2), B); return CI; } + + // printf("foo %s baz\n", "bar") -> puts("foo bar baz") + // TODO: eliminate PutS and '\n' suffix dependency, if possible + // TODO: implement for multiple string parameters I think you're conflating two transformations here. You should be able to fold "foo %s baz" with a constant parameter "bar" into "foo bar baz". This could apply iteratively to multiple %s parts. Once that's done, there's another transformation which turns printf("foo bar baz\n") into puts("foo bar baz"), so there's no need to check for the \n here, just emit a printf at the end instead. + size_t s; + if (CI->getNumOperands() == 3 && + CI->use_empty() && + isa(CI->getOperand(2)->getType()) && + FormatStr[FormatStr.size()-1] == '\n' && + (s = FormatStr.find('%')) != std::string::npos && + FormatStr[s+1] == 's' && // "%s" + FormatStr.find('%', s+1) == std::string::npos) { // no others I'm pretty sure that the "FormatStr[s+1] == 's'" part will dereference past the end of the string given a string like "foo %". Maybe you can break this if-statement up into a few pieces? It looks horrible to have it all as one huge expression, especially when it assigns to 'size_t s' somewhere in the middle. + std::string Arg; + if (GetConstantStringInfo(CI->getOperand(2), Arg)) { + // inline arg into format string, replace "%s" and '\n' + std::string Merge(FormatStr, 0, s); + Merge.reserve(FormatStr.size() + Arg.size()); + Merge.append(Arg); + Merge.append(FormatStr, s+2, FormatStr.size()-(s+2)-1); + Constant *C = ConstantArray::get(Merge, true); + C = new GlobalVariable(*Callee->getParent(), C->getType(), true, + GlobalVariable::InternalLinkage, C, "str"); Please use PrivateLinkage here, not InternalLinkage. Current LLVM uses private for string literals. Nick + EmitPutS(C, B); + return CI; + } + } return 0; } }; Index: test/Transforms/SimplifyLibCalls/Printf.ll =================================================================== --- test/Transforms/SimplifyLibCalls/Printf.ll (revision 77970) +++ test/Transforms/SimplifyLibCalls/Printf.ll (working copy) @@ -3,7 +3,8 @@ ; RUN: not grep {call.*printf} @str = internal constant [13 x i8] c"hello world\0A\00" ; <[13 x i8]*> [#uses=1] - at str1 = internal constant [2 x i8] c"h\00" ; <[2 x i8]*> [#uses=1] + at str1 = internal constant [2 x i8] c"h\00" ; <[2 x i8]*> [#uses=2] + at str2 = internal constant [6 x i8] c"<%s>\0A\00" ; <[6 x i8]*> [#uses=1] define void @foo() { entry: @@ -19,3 +20,9 @@ ret void } +define void @baz() { +entry: + %tmp1 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([6 x i8]* @str2, i32 0, i32 0), i8* getelementptr ([2 x i8]* @str1, i32 0, i32 0)) nounwind ; [#uses=0] + ret void +} + From alenhar2 at cs.uiuc.edu Wed Aug 5 10:24:18 2009 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Wed, 05 Aug 2009 15:24:18 -0000 Subject: [llvm-commits] [poolalloc] r78194 - /poolalloc/trunk/Regressions/2009-08-05.unions.ll Message-ID: <200908051524.n75FOKL0005526@zion.cs.uiuc.edu> Author: alenhar2 Date: Wed Aug 5 10:24:11 2009 New Revision: 78194 URL: http://llvm.org/viewvc/llvm-project?rev=78194&view=rev Log: union example Added: poolalloc/trunk/Regressions/2009-08-05.unions.ll Added: poolalloc/trunk/Regressions/2009-08-05.unions.ll URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/Regressions/2009-08-05.unions.ll?rev=78194&view=auto ============================================================================== --- poolalloc/trunk/Regressions/2009-08-05.unions.ll (added) +++ poolalloc/trunk/Regressions/2009-08-05.unions.ll Wed Aug 5 10:24:11 2009 @@ -0,0 +1,38 @@ +; ModuleID = 'foo.o' +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" +target triple = "x86_64-unknown-linux-gnu" + %struct.pa = type <{ i8, i32*, i8 }> + at .str = private constant [25 x i8] c"Hello World %d %d %s %s\0A\00", align 1 ; <[25 x i8]*> [#uses=1] + at .str1 = private constant [22 x i8] c"Hello World %d %d %s\0A\00", align 1 ; <[22 x i8]*> [#uses=1] + +define void @foo(i32* nocapture %y) nounwind noinline { +entry: + store i32 3, i32* %y, align 4 + ret void +} + +define void @bar(%struct.pa* nocapture %S, i32* %v) nounwind { +entry: + %0 = getelementptr %struct.pa* %S, i64 0, i32 0 ; [#uses=1] + store i8 0, i8* %0, align 1 + %1 = getelementptr %struct.pa* %S, i64 0, i32 1 ; [#uses=1] + store i32* %v, i32** %1, align 1 + %2 = getelementptr %struct.pa* %S, i64 0, i32 2 ; [#uses=1] + store i8 0, i8* %2, align 1 + ret void +} + +define i32 @main(i32 %argc, i8** nocapture %argv) nounwind { +entry: + %0 = malloc i32 ; [#uses=2] + store i32 %argc, i32* %0, align 8 + tail call void @foo(i32* %0) nounwind noinline + %1 = getelementptr i8** %argv, i64 1 ; [#uses=1] + %2 = load i8** %1, align 8 ; [#uses=1] + %3 = tail call i32 (i8*, ...)* @printf(i8* noalias getelementptr ([25 x i8]* @.str, i64 0, i64 0), i32 %argc, i32 2, i8* %2) nounwind ; [#uses=0] + %4 = load i8** %argv, align 8 ; [#uses=1] + %5 = tail call i32 (i8*, ...)* @printf(i8* noalias getelementptr ([22 x i8]* @.str1, i64 0, i64 0), i32 %argc, i32 2, i8* %4) nounwind ; [#uses=0] + ret i32 %argc +} + +declare i32 @printf(i8* nocapture, ...) nounwind From alenhar2 at cs.uiuc.edu Wed Aug 5 10:24:53 2009 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Wed, 05 Aug 2009 15:24:53 -0000 Subject: [llvm-commits] [poolalloc] r78195 - in /poolalloc/trunk/Regressions: 2009-08-05.packed.ll 2009-08-05.unions.ll Message-ID: <200908051524.n75FOrAq005554@zion.cs.uiuc.edu> Author: alenhar2 Date: Wed Aug 5 10:24:52 2009 New Revision: 78195 URL: http://llvm.org/viewvc/llvm-project?rev=78195&view=rev Log: I mean packed Added: poolalloc/trunk/Regressions/2009-08-05.packed.ll - copied unchanged from r78194, poolalloc/trunk/Regressions/2009-08-05.unions.ll Removed: poolalloc/trunk/Regressions/2009-08-05.unions.ll Removed: poolalloc/trunk/Regressions/2009-08-05.unions.ll URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/Regressions/2009-08-05.unions.ll?rev=78194&view=auto ============================================================================== --- poolalloc/trunk/Regressions/2009-08-05.unions.ll (original) +++ poolalloc/trunk/Regressions/2009-08-05.unions.ll (removed) @@ -1,38 +0,0 @@ -; ModuleID = 'foo.o' -target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" -target triple = "x86_64-unknown-linux-gnu" - %struct.pa = type <{ i8, i32*, i8 }> - at .str = private constant [25 x i8] c"Hello World %d %d %s %s\0A\00", align 1 ; <[25 x i8]*> [#uses=1] - at .str1 = private constant [22 x i8] c"Hello World %d %d %s\0A\00", align 1 ; <[22 x i8]*> [#uses=1] - -define void @foo(i32* nocapture %y) nounwind noinline { -entry: - store i32 3, i32* %y, align 4 - ret void -} - -define void @bar(%struct.pa* nocapture %S, i32* %v) nounwind { -entry: - %0 = getelementptr %struct.pa* %S, i64 0, i32 0 ; [#uses=1] - store i8 0, i8* %0, align 1 - %1 = getelementptr %struct.pa* %S, i64 0, i32 1 ; [#uses=1] - store i32* %v, i32** %1, align 1 - %2 = getelementptr %struct.pa* %S, i64 0, i32 2 ; [#uses=1] - store i8 0, i8* %2, align 1 - ret void -} - -define i32 @main(i32 %argc, i8** nocapture %argv) nounwind { -entry: - %0 = malloc i32 ; [#uses=2] - store i32 %argc, i32* %0, align 8 - tail call void @foo(i32* %0) nounwind noinline - %1 = getelementptr i8** %argv, i64 1 ; [#uses=1] - %2 = load i8** %1, align 8 ; [#uses=1] - %3 = tail call i32 (i8*, ...)* @printf(i8* noalias getelementptr ([25 x i8]* @.str, i64 0, i64 0), i32 %argc, i32 2, i8* %2) nounwind ; [#uses=0] - %4 = load i8** %argv, align 8 ; [#uses=1] - %5 = tail call i32 (i8*, ...)* @printf(i8* noalias getelementptr ([22 x i8]* @.str1, i64 0, i64 0), i32 %argc, i32 2, i8* %4) nounwind ; [#uses=0] - ret i32 %argc -} - -declare i32 @printf(i8* nocapture, ...) nounwind From jyasskin at google.com Wed Aug 5 10:34:08 2009 From: jyasskin at google.com (Jeffrey Yasskin) Date: Wed, 5 Aug 2009 08:34:08 -0700 Subject: [llvm-commits] [llvm] r78127 - in /llvm/trunk: lib/ExecutionEngine/ExecutionEngine.cpp unittests/ExecutionEngine/ExecutionEngineTest.cpp unittests/ExecutionEngine/Makefile In-Reply-To: References: <200908042353.n74NrdXX026510@zion.cs.uiuc.edu> <2C7A8D9B-526C-4241-9C8D-54A320AF0623@apple.com> Message-ID: On Tue, Aug 4, 2009 at 10:33 PM, Chris Lattner wrote: > > On Aug 4, 2009, at 9:12 PM, Jeffrey Yasskin wrote: > >> On Tue, Aug 4, 2009 at 7:30 PM, Chris Lattner >> wrote: >>> >>> On Aug 4, 2009, at 4:53 PM, Jeffrey Yasskin wrote: >>> >>>> Author: jyasskin >>>> Date: Tue Aug ?4 18:53:16 2009 >>>> New Revision: 78127 >>>> >>>> URL: http://llvm.org/viewvc/llvm-project?rev=78127&view=rev >>>> Log: >>>> Make ExecutionEngine::updateGlobalMapping(GV, NULL) properly remove >>>> GV's old >>>> address from the reverse mapping, and add a test that this works >>>> now. >>> >>> Hey Jeffrey, >>> >>> Should the GlobalMapping move to using AssertingVH? ?I think that >>> would define this class of bugs away. >> >> I'd actually like to move them and the other maps in ExecutionEngine >> to using CallbackVH so that users don't have to deal with >> removing/changing global mappings unless the object actually moves. > > That would also be nice. :) > >> But whether or not I do that, this bug made it impossible to do >> things like: >> >> T1 *obj1 = new T1; >> engine.addGlobalMapping(GV, obj1); >> ... >> engine.updateGlobalMapping(GV, NULL); >> delete obj1; >> ... >> T2 *obj2 = new T2; ?// Happens to land at the same address. >> engine.addGlobalMapping(UnrelatedGV, obj2); >> >> and I don't see how AssertingVH would make any of that illegal or >> work better. > > If "updateglobalmapping" to null deletes the entry out of the map, > then assertingvh should work fine. Oh, I see what you're going for. Yep, I'll switch those GlobalValue*s to AssertingVH's (since going to CallbackVHs will take longer) and run the nightly tests to see what else needs fixing. From benny.kra at googlemail.com Wed Aug 5 10:42:52 2009 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Wed, 05 Aug 2009 15:42:52 -0000 Subject: [llvm-commits] [llvm] r78196 - in /llvm/trunk/docs: BitCodeFormat.html CMake.html CommandLine.html ExceptionHandling.html GarbageCollection.html GettingStartedVS.html HowToReleaseLLVM.html ProgrammersManual.html ReleaseNotes-2.6.html TableGenFundamentals.html WritingAnLLVMBackend.html tutorial/LangImpl5.html tutorial/OCamlLangImpl5.html Message-ID: <200908051543.n75Fh79Q006107@zion.cs.uiuc.edu> Author: d0k Date: Wed Aug 5 10:42:44 2009 New Revision: 78196 URL: http://llvm.org/viewvc/llvm-project?rev=78196&view=rev Log: Documentation: fix HTML validation errors. Modified: llvm/trunk/docs/BitCodeFormat.html llvm/trunk/docs/CMake.html llvm/trunk/docs/CommandLine.html llvm/trunk/docs/ExceptionHandling.html llvm/trunk/docs/GarbageCollection.html llvm/trunk/docs/GettingStartedVS.html llvm/trunk/docs/HowToReleaseLLVM.html llvm/trunk/docs/ProgrammersManual.html llvm/trunk/docs/ReleaseNotes-2.6.html llvm/trunk/docs/TableGenFundamentals.html llvm/trunk/docs/WritingAnLLVMBackend.html llvm/trunk/docs/tutorial/LangImpl5.html llvm/trunk/docs/tutorial/OCamlLangImpl5.html Modified: llvm/trunk/docs/BitCodeFormat.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/BitCodeFormat.html?rev=78196&r1=78195&r2=78196&view=diff ============================================================================== --- llvm/trunk/docs/BitCodeFormat.html (original) +++ llvm/trunk/docs/BitCodeFormat.html Wed Aug 5 10:42:44 2009 @@ -462,23 +462,23 @@

    The possible operand encodings are:

      -
    1. Fixed: The field should be emitted as +
    2. Fixed: The field should be emitted as a fixed-width value, whose width is specified by the operand's extra data.
      3. -
    3. VBR: The field should be emitted as +
    4. VBR: The field should be emitted as a variable-width value, whose width is specified by the operand's extra data.
      5. -
    5. Array: This field is an array of values. The array operand +
    6. Array: This field is an array of values. The array operand has no extra data, but expects another operand to follow it which indicates the element type of the array. When reading an array in an abbreviated record, the first integer is a vbr6 that indicates the array length, followed by the encoded elements of the array. An array may only occur as the last operand of an abbreviation (except for the one final operand that gives the array's type).
      7. -
    7. Char6: This field should be emitted as +
    8. Char6: This field should be emitted as a char6-encoded value. This operand type takes no extra data.
      9. -
    9. Blob: This field is emitted as a vbr6, followed by padding to a +
    10. Blob: This field is emitted as a vbr6, followed by padding to a 32-bit boundary (for alignment) and an array of 8-bit objects. The array of bytes is further followed by tail padding to ensure that its total length is a multiple of 4 bytes. This makes it very efficient for the reader to Modified: llvm/trunk/docs/CMake.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CMake.html?rev=78196&r1=78195&r2=78196&view=diff ============================================================================== --- llvm/trunk/docs/CMake.html (original) +++ llvm/trunk/docs/CMake.html Wed Aug 5 10:42:44 2009 @@ -67,7 +67,7 @@
        -

      1. Download +

      2. Download and install CMake. Version 2.6.2 is the minimum required.

      3. Open a shell. Your development tools must be reachable from this @@ -180,7 +180,7 @@

        Variables are stored on the CMake cache. This is a file - named CMakeCache.txt on the root of the build + named CMakeCache.txt on the root of the build directory. Do not hand-edit it.

        Variables are listed here appending its type after a colon. It is Modified: llvm/trunk/docs/CommandLine.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CommandLine.html?rev=78196&r1=78195&r2=78196&view=diff ============================================================================== --- llvm/trunk/docs/CommandLine.html (original) +++ llvm/trunk/docs/CommandLine.html Wed Aug 5 10:42:44 2009 @@ -1441,9 +1441,9 @@

      4. The cl::Sink modifier is used to handle unknown options. If there is at least one option with -cl::Sink modifier specified, the parser passes +cl::Sink modifier specified, the parser passes unrecognized option strings to it as values instead of signaling an -error. As with cl::CommaSeparated, this modifier +error. As with cl::CommaSeparated, this modifier only makes sense with a cl::list option.
        5. Modified: llvm/trunk/docs/ExceptionHandling.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ExceptionHandling.html?rev=78196&r1=78195&r2=78196&view=diff ============================================================================== --- llvm/trunk/docs/ExceptionHandling.html (original) +++ llvm/trunk/docs/ExceptionHandling.html Wed Aug 5 10:42:44 2009 @@ -426,6 +426,8 @@ llvm.eh.sjlj.longjmp in the second word. The following three words are available for use in a target-specific manner.

        + +
        Asm Table Formats Modified: llvm/trunk/docs/GarbageCollection.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/GarbageCollection.html?rev=78196&r1=78195&r2=78196&view=diff ============================================================================== --- llvm/trunk/docs/GarbageCollection.html (original) +++ llvm/trunk/docs/GarbageCollection.html Wed Aug 5 10:42:44 2009 @@ -334,11 +334,11 @@ // For roots [0, NumMeta), the metadata pointer is in the FrameMap. for (unsigned e = R->Map->NumMeta; i != e; ++i) - Visitor(&R->Roots[i], R->Map->Meta[i]); + Visitor(&R->Roots[i], R->Map->Meta[i]); // For roots [NumMeta, NumRoots), the metadata pointer is null. for (unsigned e = R->Map->NumRoots; i != e; ++i) - Visitor(&R->Roots[i], NULL); + Visitor(&R->Roots[i], NULL); } }
        @@ -398,7 +398,7 @@
        - define ty @name(...) gc "name" { ... + define ty @name(...) gc "name" { ...
        Modified: llvm/trunk/docs/GettingStartedVS.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/GettingStartedVS.html?rev=78196&r1=78195&r2=78196&view=diff ============================================================================== --- llvm/trunk/docs/GettingStartedVS.html (original) +++ llvm/trunk/docs/GettingStartedVS.html Wed Aug 5 10:42:44 2009 @@ -140,15 +140,15 @@
      5. If you used CMake, then the directory you created the project files, the root directory will have an llvm.sln file, just double-click on that to open Visual Studio.
        6. -
      11. +
    11. Build the LLVM Suite: -
        +
        • Simply build the solution.
        • The Fibonacci project is a sample program that uses the JIT. Modify the project's debugging properties to provide a numeric command line argument. The program will print the corresponding fibonacci value.
          • -
      12. +
    Modified: llvm/trunk/docs/HowToReleaseLLVM.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/HowToReleaseLLVM.html?rev=78196&r1=78195&r2=78196&view=diff ============================================================================== --- llvm/trunk/docs/HowToReleaseLLVM.html (original) +++ llvm/trunk/docs/HowToReleaseLLVM.html Wed Aug 5 10:42:44 2009 @@ -138,7 +138,6 @@ - Modified: llvm/trunk/docs/ProgrammersManual.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ProgrammersManual.html?rev=78196&r1=78195&r2=78196&view=diff ============================================================================== --- llvm/trunk/docs/ProgrammersManual.html (original) +++ llvm/trunk/docs/ProgrammersManual.html Wed Aug 5 10:42:44 2009 @@ -30,11 +30,12 @@
  • The isa<>, cast<> and dyn_cast<> templates
  • Passing strings (the StringRef -and Twine classes)
    • +and Twine classes) +
  • The DEBUG() macro and -debug option
  • String-like containers -
      - -
    • +
  • BitVector-like containers
    • A dense bitvector
      • @@ -525,7 +526,7 @@ unnecessary heap allocation involved in constructing the temporary results of string concatenation. See "llvm/ADT/Twine.h" -for more information.

      +for more information.

      As with a StringRef, Twine objects point to external memory and should almost never be stored or mentioned directly. They are intended Modified: llvm/trunk/docs/ReleaseNotes-2.6.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes-2.6.html?rev=78196&r1=78195&r2=78196&view=diff ============================================================================== --- llvm/trunk/docs/ReleaseNotes-2.6.html (original) +++ llvm/trunk/docs/ReleaseNotes-2.6.html Wed Aug 5 10:42:44 2009 @@ -486,7 +486,7 @@ could move to a Twine based design.

    • isName() should be replaced with comparison - against getName() (this is now efficient). + against getName() (this is now efficient).
    • Modified: llvm/trunk/docs/TableGenFundamentals.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/TableGenFundamentals.html?rev=78196&r1=78195&r2=78196&view=diff ============================================================================== --- llvm/trunk/docs/TableGenFundamentals.html (original) +++ llvm/trunk/docs/TableGenFundamentals.html Wed Aug 5 10:42:44 2009 @@ -371,8 +371,8 @@
    string value
    [{ ... }]
    code fragment
    -
    [ X, Y, Z ]
    -
    list value. is the type of the list +
    [ X, Y, Z ]<type>
    +
    list value. <type> is the type of the list element and is usually optional. In rare cases, TableGen is unable to deduce the element type in which case the user must specify it explicitly.
    @@ -408,13 +408,13 @@
    !strconcat(a, b)
    A string value that is the result of concatenating the 'a' and 'b' strings.
    -
    !cast(a)
    +
    !cast<type>(a)
    A symbol of type type obtained by looking up the string 'a' in the symbol table. If the type of 'a' does not match type, TableGen -aborts with an error. !cast is a special case in that the argument must +aborts with an error. !cast<string> is a special case in that the argument must be an object defined by a 'def' construct.
    !nameconcat<type>(a, b)
    -
    Shorthand for !cast(!strconcat(a, b))
    +
    Shorthand for !cast<type>(!strconcat(a, b))
    !subst(a, b, c)
    If 'a' and 'b' are of string type or are symbol references, substitute 'b' for 'a' in 'c.' This operation is analogous to $(subst) in GNU make.
    Modified: llvm/trunk/docs/WritingAnLLVMBackend.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/WritingAnLLVMBackend.html?rev=78196&r1=78195&r2=78196&view=diff ============================================================================== --- llvm/trunk/docs/WritingAnLLVMBackend.html (original) +++ llvm/trunk/docs/WritingAnLLVMBackend.html Wed Aug 5 10:42:44 2009 @@ -451,7 +451,7 @@ Target llvm::TheSparcTarget; extern "C" void LLVMInitializeSparcTargetInfo() { - RegisterTarget + RegisterTarget<Triple::sparc, /*HasJIT=*/false> X(TheSparcTarget, "sparc", "Sparc"); } @@ -469,7 +469,7 @@ 
     extern "C" void LLVMInitializeSparcAsmPrinter() { 
-  RegisterAsmPrinter X(TheSparcTarget);
+  RegisterAsmPrinter<SparcAsmPrinter> X(TheSparcTarget);
 }
    Modified: llvm/trunk/docs/tutorial/LangImpl5.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/tutorial/LangImpl5.html?rev=78196&r1=78195&r2=78196&view=diff ============================================================================== --- llvm/trunk/docs/tutorial/LangImpl5.html (original) +++ llvm/trunk/docs/tutorial/LangImpl5.html Wed Aug 5 10:42:44 2009 @@ -288,8 +288,8 @@ href="../ProgrammersManual.html#ViewGraph">a window will pop up and you'll see this graph:

    -
    Example CFG
    +
    Example CFG

    Another way to get this is to call "F->viewCFG()" or "F->viewCFGOnly()" (where F is a "Function*") either by Modified: llvm/trunk/docs/tutorial/OCamlLangImpl5.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/tutorial/OCamlLangImpl5.html?rev=78196&r1=78195&r2=78196&view=diff ============================================================================== --- llvm/trunk/docs/tutorial/OCamlLangImpl5.html (original) +++ llvm/trunk/docs/tutorial/OCamlLangImpl5.html Wed Aug 5 10:42:44 2009 @@ -271,8 +271,8 @@ href="../ProgrammersManual.html#ViewGraph">a window will pop up and you'll see this graph:

    -
    Example CFG
    +
    Example CFG

    Another way to get this is to call "Llvm_analysis.view_function_cfg f" or "Llvm_analysis.view_function_cfg_only f" (where f From daniel at zuster.org Wed Aug 5 10:48:38 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Wed, 05 Aug 2009 15:48:38 -0000 Subject: [llvm-commits] [llvm] r78197 - /llvm/trunk/include/llvm/ADT/StringRef.h Message-ID: <200908051548.n75FmfXc006241@zion.cs.uiuc.edu> Author: ddunbar Date: Wed Aug 5 10:48:26 2009 New Revision: 78197 URL: http://llvm.org/viewvc/llvm-project?rev=78197&view=rev Log: Add StringRef::endswith Modified: llvm/trunk/include/llvm/ADT/StringRef.h Modified: llvm/trunk/include/llvm/ADT/StringRef.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/StringRef.h?rev=78197&r1=78196&r2=78197&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/StringRef.h (original) +++ llvm/trunk/include/llvm/ADT/StringRef.h Wed Aug 5 10:48:26 2009 @@ -174,6 +174,11 @@ return substr(0, Prefix.Length).equals(Prefix); } + /// endswith - Check if this string ends with the given \arg Suffix. + bool endswith(const StringRef &Suffix) const { + return slice(size() - Suffix.Length, size()).equals(Suffix); + } + /// @} }; From sanjiv.gupta at microchip.com Wed Aug 5 10:52:25 2009 From: sanjiv.gupta at microchip.com (Sanjiv Gupta) Date: Wed, 05 Aug 2009 15:52:25 -0000 Subject: [llvm-commits] [llvm] r78198 - /llvm/trunk/test/CodeGen/PIC16/sext.ll Message-ID: <200908051552.n75FqQse006371@zion.cs.uiuc.edu> Author: sgupta Date: Wed Aug 5 10:52:14 2009 New Revision: 78198 URL: http://llvm.org/viewvc/llvm-project?rev=78198&view=rev Log: Quite a few tests crashed in llc after 78142. This is just one of them. I hope to add a few more. Added: llvm/trunk/test/CodeGen/PIC16/sext.ll Added: llvm/trunk/test/CodeGen/PIC16/sext.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PIC16/sext.ll?rev=78198&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/PIC16/sext.ll (added) +++ llvm/trunk/test/CodeGen/PIC16/sext.ll Wed Aug 5 10:52:14 2009 @@ -0,0 +1,10 @@ +; RUN: llvm-as < %s | llc -march=pic16 + + at main.auto.c = internal global i8 0 ; [#uses=1] + +define i16 @main() nounwind { +entry: + %tmp = load i8* @main.auto.c ; [#uses=1] + %conv = sext i8 %tmp to i16 ; [#uses=1] + ret i16 %conv +} From aaronngray.lists at googlemail.com Wed Aug 5 10:52:50 2009 From: aaronngray.lists at googlemail.com (Aaron Gray) Date: Wed, 5 Aug 2009 16:52:50 +0100 Subject: [llvm-commits] [llvm] r78178 - in /llvm/trunk: lib/CodeGen/SimpleRegisterCoalescing.cpp test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll References: <200908050705.n7575g9L008827@zion.cs.uiuc.edu> Message-ID: <74722A4431F344C5BF99F0A69762ED68@HPLAPTOP> Evan, /llvm/trunk: 'lib/CodeGen/SimpleRegisterCoalescing.cpp' is broken on Visual Studio. I am not sure but, I think 'MachineRegisterInfo::use_iterator UI' and 'const LiveRange *UI' conflict. ~~~~~VS Output ~~~~~~~~~ 1>------ Build started: Project: LLVMCodeGen, Configuration: Debug Win32 ------ 1>Compiling... 1>SimpleRegisterCoalescing.cpp 1>..\..\..\..\..\cygwin\home\ang\svn\llvm-coff\lib\CodeGen\SimpleRegisterCoalescing.cpp(811) : error C2040: 'UI' : 'const llvm::LiveRange *' differs in levels of indirection from 'llvm::MachineRegisterInfo::use_iterator' 1>..\..\..\..\..\cygwin\home\ang\svn\llvm-coff\lib\CodeGen\SimpleRegisterCoalescing.cpp(812) : error C2088: '!' : illegal for class 1>..\..\..\..\..\cygwin\home\ang\svn\llvm-coff\lib\CodeGen\SimpleRegisterCoalescing.cpp(812) : error C2039: 'valno' : is not a member of 'llvm::MachineRegisterInfo::defusechain_iterator' 1> with 1> [ 1> ReturnUses=true, 1> ReturnDefs=false 1> ] 1>..\..\..\..\..\cygwin\home\ang\svn\llvm-coff\lib\CodeGen\SimpleRegisterCoalescing.cpp(813) : error C2039: 'valno' : is not a member of 'llvm::MachineRegisterInfo::defusechain_iterator' 1> with 1> [ 1> ReturnUses=true, 1> ReturnDefs=false 1> ] 1>..\..\..\..\..\cygwin\home\ang\svn\llvm-coff\lib\CodeGen\SimpleRegisterCoalescing.cpp(813) : error C2227: left of '->def' must point to class/struct/union/generic type ~~~~~~~~~~~~~~~~~~~~ Aaron > Author: evancheng > Date: Wed Aug 5 02:05:41 2009 > New Revision: 78178 > > URL: http://llvm.org/viewvc/llvm-project?rev=78178&view=rev > Log: > Another nasty coalescer bug (is there another kind): > > After coalescing reg1027's def and kill are both at the same point: > %reg1027,0.000000e+00 = [56,814:0) 0 at 70-(814) > > bb5: > 60 %reg1027 = t2MOVr %reg1027, 14, %reg0, %reg0 > 68 %reg1027 = t2LDRi12 %reg1027, 8, 14, %reg0 > 76 t2CMPzri %reg1038, 0, 14, %reg0, %CPSR > 84 %reg1027 = t2MOVr %reg1027, 14, %reg0, %reg0 > 96 t2Bcc mbb, 1, %CPSR > > Do not remove the kill marker on t2LDRi12. > > Added: > llvm/trunk/test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll > Modified: > llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp > > Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp > URL: > http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=78178&r1=78177&r2=78178&view=diff > > ============================================================================== > --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original) > +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Wed Aug 5 > 02:05:41 2009 > @@ -804,12 +804,26 @@ > for (MachineRegisterInfo::use_iterator UI = mri_->use_begin(Reg), > UE = mri_->use_end(); UI != UE; ++UI) { > MachineOperand &UseMO = UI.getOperand(); > - if (UseMO.isKill()) { > - MachineInstr *UseMI = UseMO.getParent(); > - unsigned UseIdx = > li_->getUseIndex(li_->getInstructionIndex(UseMI)); > - const LiveRange *UI = LI.getLiveRangeContaining(UseIdx); > - if (!UI || !LI.isKill(UI->valno, UseIdx+1)) > + if (!UseMO.isKill()) > + continue; > + MachineInstr *UseMI = UseMO.getParent(); > + unsigned UseIdx = li_->getUseIndex(li_->getInstructionIndex(UseMI)); > + const LiveRange *UI = LI.getLiveRangeContaining(UseIdx); > + if (!UI || !LI.isKill(UI->valno, UseIdx+1)) { > + if (UI->valno->def != UseIdx+1) { > + // Interesting problem. After coalescing reg1027's def and kill > are both > + // at the same point: %reg1027,0.000000e+00 = [56,814:0) > 0 at 70-(814) > + // > + // bb5: > + // 60 %reg1027 = t2MOVr %reg1027, 14, %reg0, %reg0 > + // 68 %reg1027 = t2LDRi12 %reg1027, 8, 14, %reg0 > + // 76 t2CMPzri %reg1038, 0, 14, %reg0, %CPSR > + // 84 %reg1027 = t2MOVr %reg1027, 14, %reg0, %reg0 > + // 96 t2Bcc mbb, 1, %CPSR > + // > + // Do not remove the kill marker on t2LDRi12. > UseMO.setIsKill(false); > + } > } > } > } > > Added: llvm/trunk/test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll > URL: > http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll?rev=78178&view=auto > > ============================================================================== > --- llvm/trunk/test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll (added) > +++ llvm/trunk/test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll Wed Aug 5 > 02:05:41 2009 > @@ -0,0 +1,153 @@ > +; RUN: llvm-as < %s | > llc -mtriple=thumbv7-apple-darwin -mattr=+neon,+neonfp -relocation-model=pic > -disable-fp-elim > + > + type { %struct.GAP } ; type %0 > + type { i16, i8, i8 } ; type %1 > + type { [2 x i32], [2 x i32] } ; type %2 > + type { %struct.rec* } ; type %3 > + type { i8, i8, i16, i8, i8, i8, i8 } ; type %4 > + %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, > i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, > i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], > %struct.__sbuf, i32, i64 } > + %struct.FILE_POS = type { i8, i8, i16, i32 } > + %struct.FIRST_UNION = type { %struct.FILE_POS } > + %struct.FOURTH_UNION = type { %struct.STYLE } > + %struct.GAP = type { i8, i8, i16 } > + %struct.LIST = type { %struct.rec*, %struct.rec* } > + %struct.SECOND_UNION = type { %1 } > + %struct.STYLE = type { %0, %0, i16, i16, i32 } > + %struct.THIRD_UNION = type { %2 } > + %struct.__sFILEX = type opaque > + %struct.__sbuf = type { i8*, i32 } > + %struct.head_type = type { [2 x %struct.LIST], %struct.FIRST_UNION, > %struct.SECOND_UNION, %struct.THIRD_UNION, %struct.FOURTH_UNION, > %struct.rec*, %3, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, > %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, i32 } > + %struct.rec = type { %struct.head_type } > + at .str24239 = external constant [20 x i8], align 1 ; <[20 x i8]*> > [#uses=1] > + at no_file_pos = external global %4 ; <%4*> [#uses=1] > + at zz_tmp = external global %struct.rec* ; <%struct.rec**> [#uses=1] > + at .str81872 = external constant [10 x i8], align 1 ; <[10 x i8]*> > [#uses=1] > + at out_fp = external global %struct.FILE* ; <%struct.FILE**> [#uses=2] > + at cpexists = external global i32 ; [#uses=2] > + at .str212784 = external constant [17 x i8], align 1 ; <[17 x i8]*> > [#uses=1] > + at .str1822946 = external constant [8 x i8], align 1 ; <[8 x i8]*> > [#uses=1] > + at .str1842948 = external constant [11 x i8], align 1 ; <[11 x i8]*> > [#uses=1] > + > +declare arm_apcscc i32 @fprintf(%struct.FILE* nocapture, i8* nocapture, > ...) nounwind > + > +declare arm_apcscc i32 @"\01_fwrite"(i8*, i32, i32, i8*) > + > +declare arm_apcscc %struct.FILE* @OpenIncGraphicFile(i8*, i8 zeroext, > %struct.rec** nocapture, %struct.FILE_POS*, i32* nocapture) nounwind > + > +declare arm_apcscc void @Error(i32, i32, i8*, i32, %struct.FILE_POS*, > ...) nounwind > + > +declare arm_apcscc i8* @fgets(i8*, i32, %struct.FILE* nocapture) nounwind > + > +define arm_apcscc void @PS_PrintGraphicInclude(%struct.rec* %x, i32 > %colmark, i32 %rowmark) nounwind { > +entry: > + br label %bb5 > + > +bb5: ; preds = %bb5, %entry > + %.pn = phi %struct.rec* [ %y.0, %bb5 ], [ undef, %entry ] ; > <%struct.rec*> [#uses=1] > + %y.0.in = getelementptr %struct.rec* %.pn, i32 0, i32 0, i32 0, i32 1, > i32 0 ; <%struct.rec**> [#uses=1] > + %y.0 = load %struct.rec** %y.0.in ; <%struct.rec*> [#uses=2] > + br i1 undef, label %bb5, label %bb6 > + > +bb6: ; preds = %bb5 > + %0 = call arm_apcscc %struct.FILE* @OpenIncGraphicFile(i8* undef, i8 > zeroext 0, %struct.rec** undef, %struct.FILE_POS* null, i32* undef) > nounwind ; <%struct.FILE*> [#uses=1] > + br i1 false, label %bb.i, label %FontHalfXHeight.exit > + > +bb.i: ; preds = %bb6 > + br label %FontHalfXHeight.exit > + > +FontHalfXHeight.exit: ; preds = %bb.i, %bb6 > + br i1 undef, label %bb.i1, label %FontSize.exit > + > +bb.i1: ; preds = %FontHalfXHeight.exit > + br label %FontSize.exit > + > +FontSize.exit: ; preds = %bb.i1, %FontHalfXHeight.exit > + %1 = load i32* undef, align 4 ; [#uses=1] > + %2 = icmp ult i32 0, undef ; [#uses=1] > + br i1 %2, label %bb.i5, label %FontName.exit > + > +bb.i5: ; preds = %FontSize.exit > + call arm_apcscc void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* > @Error(i32 1, i32 2, i8* getelementptr ([20 x i8]* @.str24239, i32 0, i32 > 0), i32 0, %struct.FILE_POS* bitcast (%4* @no_file_pos to > %struct.FILE_POS*), i8* getelementptr ([10 x i8]* @.str81872, i32 0, i32 > 0)) nounwind > + br label %FontName.exit > + > +FontName.exit: ; preds = %bb.i5, %FontSize.exit > + %3 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* > @fprintf(%struct.FILE* undef, i8* getelementptr ([8 x i8]* @.str1822946, > i32 0, i32 0), i32 %1, i8* undef) nounwind ; [#uses=0] > + %4 = call arm_apcscc i32 @"\01_fwrite"(i8* getelementptr ([11 x i8]* > @.str1842948, i32 0, i32 0), i32 1, i32 10, i8* undef) nounwind ; > [#uses=0] > + %5 = sub i32 %colmark, undef ; [#uses=1] > + %6 = sub i32 %rowmark, undef ; [#uses=1] > + %7 = load %struct.FILE** @out_fp, align 4 ; <%struct.FILE*> [#uses=1] > + %8 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* > @fprintf(%struct.FILE* %7, i8* getelementptr ([17 x i8]* @.str212784, i32 > 0, i32 0), i32 %5, i32 %6) nounwind ; [#uses=0] > + store i32 0, i32* @cpexists, align 4 > + %9 = getelementptr %struct.rec* %y.0, i32 0, i32 0, i32 3, i32 0, i32 0, > i32 1 ; [#uses=1] > + %10 = load i32* %9, align 4 ; [#uses=1] > + %11 = sub i32 0, %10 ; [#uses=1] > + %12 = load %struct.FILE** @out_fp, align 4 ; <%struct.FILE*> [#uses=1] > + %13 = call arm_apcscc i32 (%struct.FILE*, i8*, ...)* > @fprintf(%struct.FILE* %12, i8* getelementptr ([17 x i8]* @.str212784, i32 > 0, i32 0), i32 undef, i32 %11) nounwind ; [#uses=0] > + store i32 0, i32* @cpexists, align 4 > + br label %bb100.outer.outer > + > +bb100.outer.outer: ; preds = %bb79.critedge, %bb1.i3, %FontName.exit > + %x_addr.0.ph.ph = phi %struct.rec* [ %x, %FontName.exit ], [ null, > %bb79.critedge ], [ null, %bb1.i3 ] ; <%struct.rec*> [#uses=1] > + %14 = getelementptr %struct.rec* %x_addr.0.ph.ph, i32 0, i32 0, i32 1, > i32 0 ; <%struct.FILE_POS*> [#uses=0] > + br label %bb100.outer > + > +bb.i80: ; preds = %bb3.i85 > + br i1 undef, label %bb2.i84, label %bb2.i51 > + > +bb2.i84: ; preds = %bb100.outer, %bb.i80 > + br i1 undef, label %bb3.i77, label %bb3.i85 > + > +bb3.i85: ; preds = %bb2.i84 > + br i1 false, label %StringBeginsWith.exit88, label %bb.i80 > + > +StringBeginsWith.exit88: ; preds = %bb3.i85 > + br i1 undef, label %bb3.i77, label %bb2.i51 > + > +bb2.i.i68: ; preds = %bb3.i77 > + br label %bb3.i77 > + > +bb3.i77: ; preds = %bb2.i.i68, %StringBeginsWith.exit88, %bb2.i84 > + br i1 false, label %bb1.i58, label %bb2.i.i68 > + > +bb1.i58: ; preds = %bb3.i77 > + unreachable > + > +bb.i47: ; preds = %bb3.i52 > + br i1 undef, label %bb2.i51, label %bb2.i.i15.critedge > + > +bb2.i51: ; preds = %bb.i47, %StringBeginsWith.exit88, %bb.i80 > + %15 = load i8* undef, align 1 ; [#uses=0] > + br i1 false, label %StringBeginsWith.exit55thread-split, label %bb3.i52 > + > +bb3.i52: ; preds = %bb2.i51 > + br i1 false, label %StringBeginsWith.exit55, label %bb.i47 > + > +StringBeginsWith.exit55thread-split: ; preds = %bb2.i51 > + br label %StringBeginsWith.exit55 > + > +StringBeginsWith.exit55: ; preds = %StringBeginsWith.exit55thread-split, > %bb3.i52 > + br label %bb2.i41 > + > +bb2.i41: ; preds = %bb2.i41, %StringBeginsWith.exit55 > + br label %bb2.i41 > + > +bb2.i.i15.critedge: ; preds = %bb.i47 > + %16 = call arm_apcscc i8* @fgets(i8* undef, i32 512, %struct.FILE* %0) > nounwind ; [#uses=0] > + %iftmp.560.0 = select i1 undef, i32 2, i32 0 ; [#uses=1] > + br label %bb100.outer > + > +bb2.i8: ; preds = %bb100.outer > + br i1 undef, label %bb1.i3, label %bb79.critedge > + > +bb1.i3: ; preds = %bb2.i8 > + br label %bb100.outer.outer > + > +bb79.critedge: ; preds = %bb2.i8 > + store %struct.rec* null, %struct.rec** @zz_tmp, align 4 > + br label %bb100.outer.outer > + > +bb100.outer: ; preds = %bb2.i.i15.critedge, %bb100.outer.outer > + %state.0.ph = phi i32 [ 0, %bb100.outer.outer ], [ %iftmp.560.0, > %bb2.i.i15.critedge ] ; [#uses=1] > + %cond = icmp eq i32 %state.0.ph, 1 ; [#uses=1] > + br i1 %cond, label %bb2.i8, label %bb2.i84 > +} > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From daniel at zuster.org Wed Aug 5 10:56:11 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Wed, 05 Aug 2009 15:56:11 -0000 Subject: [llvm-commits] [llvm] r78199 - in /llvm/trunk: include/llvm/Analysis/ProfileInfoLoader.h lib/Analysis/ProfileInfoLoader.cpp lib/Analysis/ProfileInfoLoaderPass.cpp tools/llvm-prof/llvm-prof.cpp Message-ID: <200908051556.n75FuGen006475@zion.cs.uiuc.edu> Author: ddunbar Date: Wed Aug 5 10:55:56 2009 New Revision: 78199 URL: http://llvm.org/viewvc/llvm-project?rev=78199&view=rev Log: Remove unnecessary ProfileInfoLoader methods. - Part of optimal static profiling patch sequence by Andreas Neustifter. Modified: llvm/trunk/include/llvm/Analysis/ProfileInfoLoader.h llvm/trunk/lib/Analysis/ProfileInfoLoader.cpp llvm/trunk/lib/Analysis/ProfileInfoLoaderPass.cpp llvm/trunk/tools/llvm-prof/llvm-prof.cpp Modified: llvm/trunk/include/llvm/Analysis/ProfileInfoLoader.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ProfileInfoLoader.h?rev=78199&r1=78198&r2=78199&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/ProfileInfoLoader.h (original) +++ llvm/trunk/include/llvm/Analysis/ProfileInfoLoader.h Wed Aug 5 10:55:56 2009 @@ -27,6 +27,7 @@ class BasicBlock; class ProfileInfoLoader { + const std::string &Filename; Module &M; std::vector CommandLines; std::vector FunctionCounts; @@ -43,46 +44,28 @@ unsigned getNumExecutions() const { return CommandLines.size(); } const std::string &getExecution(unsigned i) const { return CommandLines[i]; } - // getFunctionCounts - This method is used by consumers of function counting - // information. If we do not directly have function count information, we - // compute it from other, more refined, types of profile information. - // - void getFunctionCounts(std::vector > &Counts); + const std::string &getFileName() const { return Filename; } - // hasAccurateBlockCounts - Return true if we can synthesize accurate block - // frequency information from whatever we have. + // getRawFunctionCounts - This method is used by consumers of function + // counting information. // - bool hasAccurateBlockCounts() const { - return !BlockCounts.empty() || !EdgeCounts.empty(); + const std::vector &getRawFunctionCounts() const { + return FunctionCounts; } - // hasAccurateEdgeCounts - Return true if we can synthesize accurate edge - // frequency information from whatever we have. + // getRawBlockCounts - This method is used by consumers of block counting + // information. // - bool hasAccurateEdgeCounts() const { - return !EdgeCounts.empty(); + const std::vector &getRawBlockCounts() const { + return BlockCounts; } - // getBlockCounts - This method is used by consumers of block counting - // information. If we do not directly have block count information, we - // compute it from other, more refined, types of profile information. - // - void getBlockCounts(std::vector > &Counts); - // getEdgeCounts - This method is used by consumers of edge counting - // information. If we do not directly have edge count information, we compute - // it from other, more refined, types of profile information. - // - // Edges are represented as a pair, where the first element is the basic block - // and the second element is the successor number. - // - typedef std::pair Edge; - void getEdgeCounts(std::vector > &Counts); - - // getBBTrace - This method is used by consumers of basic-block trace // information. // - void getBBTrace(std::vector &Trace); + const std::vector &getRawEdgeCounts() const { + return EdgeCounts; + } }; } // End llvm namespace Modified: llvm/trunk/lib/Analysis/ProfileInfoLoader.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ProfileInfoLoader.cpp?rev=78199&r1=78198&r2=78199&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ProfileInfoLoader.cpp (original) +++ llvm/trunk/lib/Analysis/ProfileInfoLoader.cpp Wed Aug 5 10:55:56 2009 @@ -73,8 +73,9 @@ // ProfileInfoLoader::ProfileInfoLoader(const char *ToolName, const std::string &Filename, - Module &TheModule) : - M(TheModule), Warned(false) { + Module &TheModule) : + Filename(Filename), + M(TheModule), Warned(false) { FILE *F = fopen(Filename.c_str(), "r"); if (F == 0) { cerr << ToolName << ": Error opening '" << Filename << "': "; @@ -139,139 +140,3 @@ fclose(F); } - -// getFunctionCounts - This method is used by consumers of function counting -// information. If we do not directly have function count information, we -// compute it from other, more refined, types of profile information. -// -void ProfileInfoLoader::getFunctionCounts(std::vector > &Counts) { - if (FunctionCounts.empty()) { - if (hasAccurateBlockCounts()) { - // Synthesize function frequency information from the number of times - // their entry blocks were executed. - std::vector > BlockCounts; - getBlockCounts(BlockCounts); - - for (unsigned i = 0, e = BlockCounts.size(); i != e; ++i) - if (&BlockCounts[i].first->getParent()->getEntryBlock() == - BlockCounts[i].first) - Counts.push_back(std::make_pair(BlockCounts[i].first->getParent(), - BlockCounts[i].second)); - } else { - cerr << "Function counts are not available!\n"; - } - return; - } - - unsigned Counter = 0; - for (Module::iterator I = M.begin(), E = M.end(); - I != E && Counter != FunctionCounts.size(); ++I) - if (!I->isDeclaration()) - Counts.push_back(std::make_pair(I, FunctionCounts[Counter++])); -} - -// getBlockCounts - This method is used by consumers of block counting -// information. If we do not directly have block count information, we -// compute it from other, more refined, types of profile information. -// -void ProfileInfoLoader::getBlockCounts(std::vector > &Counts) { - if (BlockCounts.empty()) { - if (hasAccurateEdgeCounts()) { - // Synthesize block count information from edge frequency information. - // The block execution frequency is equal to the sum of the execution - // frequency of all outgoing edges from a block. - // - // If a block has no successors, this will not be correct, so we have to - // special case it. :( - std::vector > EdgeCounts; - getEdgeCounts(EdgeCounts); - - std::map InEdgeFreqs; - - BasicBlock *LastBlock = 0; - TerminatorInst *TI = 0; - for (unsigned i = 0, e = EdgeCounts.size(); i != e; ++i) { - if (EdgeCounts[i].first.first != LastBlock) { - LastBlock = EdgeCounts[i].first.first; - TI = LastBlock->getTerminator(); - Counts.push_back(std::make_pair(LastBlock, 0)); - } - Counts.back().second += EdgeCounts[i].second; - unsigned SuccNum = EdgeCounts[i].first.second; - if (SuccNum >= TI->getNumSuccessors()) { - if (!Warned) { - cerr << "WARNING: profile info doesn't seem to match" - << " the program!\n"; - Warned = true; - } - } else { - // If this successor has no successors of its own, we will never - // compute an execution count for that block. Remember the incoming - // edge frequencies to add later. - BasicBlock *Succ = TI->getSuccessor(SuccNum); - if (Succ->getTerminator()->getNumSuccessors() == 0) - InEdgeFreqs[Succ] += EdgeCounts[i].second; - } - } - - // Now we have to accumulate information for those blocks without - // successors into our table. - for (std::map::iterator I = InEdgeFreqs.begin(), - E = InEdgeFreqs.end(); I != E; ++I) { - unsigned i = 0; - for (; i != Counts.size() && Counts[i].first != I->first; ++i) - /*empty*/; - if (i == Counts.size()) Counts.push_back(std::make_pair(I->first, 0)); - Counts[i].second += I->second; - } - - } else { - cerr << "Block counts are not available!\n"; - } - return; - } - - unsigned Counter = 0; - for (Module::iterator F = M.begin(), E = M.end(); F != E; ++F) - for (Function::iterator BB = F->begin(), E = F->end(); BB != E; ++BB) { - Counts.push_back(std::make_pair(BB, BlockCounts[Counter++])); - if (Counter == BlockCounts.size()) - return; - } -} - -// getEdgeCounts - This method is used by consumers of edge counting -// information. If we do not directly have edge count information, we compute -// it from other, more refined, types of profile information. -// -void ProfileInfoLoader::getEdgeCounts(std::vector > &Counts) { - if (EdgeCounts.empty()) { - cerr << "Edge counts not available, and no synthesis " - << "is implemented yet!\n"; - return; - } - - unsigned Counter = 0; - for (Module::iterator F = M.begin(), E = M.end(); F != E; ++F) - for (Function::iterator BB = F->begin(), E = F->end(); BB != E; ++BB) - for (unsigned i = 0, e = BB->getTerminator()->getNumSuccessors(); - i != e; ++i) { - Counts.push_back(std::make_pair(Edge(BB, i), EdgeCounts[Counter++])); - if (Counter == EdgeCounts.size()) - return; - } -} - -// getBBTrace - This method is used by consumers of basic-block trace -// information. -// -void ProfileInfoLoader::getBBTrace(std::vector &Trace) { - if (BBTrace.empty ()) { - cerr << "Basic block trace is not available!\n"; - return; - } - cerr << "Basic block trace loading is not implemented yet!\n"; -} Modified: llvm/trunk/lib/Analysis/ProfileInfoLoaderPass.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ProfileInfoLoaderPass.cpp?rev=78199&r1=78198&r2=78199&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ProfileInfoLoaderPass.cpp (original) +++ llvm/trunk/lib/Analysis/ProfileInfoLoaderPass.cpp Wed Aug 5 10:55:56 2009 @@ -14,6 +14,7 @@ #include "llvm/BasicBlock.h" #include "llvm/InstrTypes.h" +#include "llvm/Module.h" #include "llvm/Pass.h" #include "llvm/Analysis/Passes.h" #include "llvm/Analysis/ProfileInfo.h" @@ -69,23 +70,25 @@ bool LoaderPass::runOnModule(Module &M) { ProfileInfoLoader PIL("profile-loader", Filename, M); EdgeCounts.clear(); - bool PrintedWarning = false; - std::vector > ECs; - PIL.getEdgeCounts(ECs); - for (unsigned i = 0, e = ECs.size(); i != e; ++i) { - BasicBlock *BB = ECs[i].first.first; - unsigned SuccNum = ECs[i].first.second; - TerminatorInst *TI = BB->getTerminator(); - if (SuccNum >= TI->getNumSuccessors()) { - if (!PrintedWarning) { - cerr << "WARNING: profile information is inconsistent with " - << "the current program!\n"; - PrintedWarning = true; + std::vector ECs = PIL.getRawEdgeCounts(); + // Instrument all of the edges... + unsigned i = 0; + for (Module::iterator F = M.begin(), E = M.end(); F != E; ++F) + for (Function::iterator BB = F->begin(), E = F->end(); BB != E; ++BB) { + // Okay, we have to add a counter of each outgoing edge. If the + // outgoing edge is not critical don't split it, just insert the counter + // in the source or destination of the edge. + TerminatorInst *TI = BB->getTerminator(); + for (unsigned s = 0, e = TI->getNumSuccessors(); s != e; ++s) { + if (i < ECs.size()) + EdgeCounts[std::make_pair(BB, TI->getSuccessor(s))]+= ECs[i++]; } - } else { - EdgeCounts[std::make_pair(BB, TI->getSuccessor(SuccNum))]+= ECs[i].second; } + + if (i != ECs.size()) { + cerr << "WARNING: profile information is inconsistent with " + << "the current program!\n"; } return false; Modified: llvm/trunk/tools/llvm-prof/llvm-prof.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-prof/llvm-prof.cpp?rev=78199&r1=78198&r2=78199&view=diff ============================================================================== --- llvm/trunk/tools/llvm-prof/llvm-prof.cpp (original) +++ llvm/trunk/tools/llvm-prof/llvm-prof.cpp Wed Aug 5 10:55:56 2009 @@ -20,6 +20,7 @@ #include "llvm/Assembly/AsmAnnotationWriter.h" #include "llvm/Analysis/ProfileInfo.h" #include "llvm/Analysis/ProfileInfoLoader.h" +#include "llvm/Analysis/Passes.h" #include "llvm/Bitcode/ReaderWriter.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/ManagedStatic.h" @@ -67,48 +68,38 @@ namespace { class ProfileAnnotator : public AssemblyAnnotationWriter { - std::map &FuncFreqs; - std::map &BlockFreqs; - std::map &EdgeFreqs; + ProfileInfo &PI; public: - ProfileAnnotator(std::map &FF, - std::map &BF, - std::map &EF) - : FuncFreqs(FF), BlockFreqs(BF), EdgeFreqs(EF) {} + ProfileAnnotator(ProfileInfo& pi) : PI(pi) {} virtual void emitFunctionAnnot(const Function *F, raw_ostream &OS) { - OS << ";;; %" << F->getName() << " called " << FuncFreqs[F] + OS << ";;; %" << F->getName() << " called " << PI.getExecutionCount(F) << " times.\n;;;\n"; } virtual void emitBasicBlockStartAnnot(const BasicBlock *BB, raw_ostream &OS) { - if (BlockFreqs.empty()) return; - std::map::const_iterator I = - BlockFreqs.find(BB); - if (I != BlockFreqs.end()) - OS << "\t;;; Basic block executed " << I->second << " times.\n"; + unsigned w = PI.getExecutionCount(BB); + if (w != 0) + OS << "\t;;; Basic block executed " << w << " times.\n"; else OS << "\t;;; Never executed!\n"; } virtual void emitBasicBlockEndAnnot(const BasicBlock *BB, raw_ostream &OS) { - if (EdgeFreqs.empty()) return; - // Figure out how many times each successor executed. - std::vector > SuccCounts; - const TerminatorInst *TI = BB->getTerminator(); + std::vector > SuccCounts; - std::map::iterator I = - EdgeFreqs.lower_bound(std::make_pair(const_cast(BB), 0U)); - for (; I != EdgeFreqs.end() && I->first.first == BB; ++I) - if (I->second) - SuccCounts.push_back(std::make_pair(TI->getSuccessor(I->first.second), - I->second)); + const TerminatorInst *TI = BB->getTerminator(); + for (unsigned s = 0, e = TI->getNumSuccessors(); s != e; ++s) { + BasicBlock* Succ = TI->getSuccessor(s); + SuccCounts.push_back(std::make_pair(std::make_pair(BB,Succ), + PI.getEdgeWeight(BB,Succ))); + } if (!SuccCounts.empty()) { OS << "\t;;; Out-edge counts:"; for (unsigned i = 0, e = SuccCounts.size(); i != e; ++i) - OS << " [" << SuccCounts[i].second << " -> " - << SuccCounts[i].first->getName() << "]"; + OS << " [" << (SuccCounts[i]).second << " -> " + << (SuccCounts[i]).first.second->getName() << "]"; OS << "\n"; } } @@ -139,17 +130,26 @@ char ProfileInfoPrinterPass::ID = 0; bool ProfileInfoPrinterPass::runOnModule(Module &M) { + ProfileInfo &PI = getAnalysis(); std::map FuncFreqs; std::map BlockFreqs; - std::map EdgeFreqs; + std::map EdgeFreqs; // Output a report. Eventually, there will be multiple reports selectable on // the command line, for now, just keep things simple. // Emit the most frequent function table... std::vector > FunctionCounts; - PIL.getFunctionCounts(FunctionCounts); - FuncFreqs.insert(FunctionCounts.begin(), FunctionCounts.end()); + std::vector > Counts; + for (Module::iterator FI = M.begin(), FE = M.end(); FI != FE; ++FI) { + unsigned w = PI.getExecutionCount(FI); + if (w != (unsigned) -1) + FunctionCounts.push_back(std::make_pair(FI,PI.getExecutionCount(FI))); + for (Function::iterator BB = FI->begin(), BBE = FI->end(); + BB != BBE; ++BB) { + Counts.push_back(std::make_pair(BB,PI.getExecutionCount(BB))); + } + } // Sort by the frequency, backwards. sort(FunctionCounts.begin(), FunctionCounts.end(), @@ -190,54 +190,39 @@ std::set FunctionsToPrint; - // If we have block count information, print out the LLVM module with - // frequency annotations. - if (PIL.hasAccurateBlockCounts()) { - std::vector > Counts; - PIL.getBlockCounts(Counts); - - TotalExecutions = 0; - for (unsigned i = 0, e = Counts.size(); i != e; ++i) - TotalExecutions += Counts[i].second; - - // Sort by the frequency, backwards. - sort(Counts.begin(), Counts.end(), - PairSecondSortReverse()); - - std::cout << "\n===" << std::string(73, '-') << "===\n"; - std::cout << "Top 20 most frequently executed basic blocks:\n\n"; - - // Print out the function frequencies... - std::cout <<" ## %% \tFrequency\n"; - unsigned BlocksToPrint = Counts.size(); - if (BlocksToPrint > 20) BlocksToPrint = 20; - for (unsigned i = 0; i != BlocksToPrint; ++i) { - if (Counts[i].second == 0) break; - Function *F = Counts[i].first->getParent(); - std::cout << std::setw(3) << i+1 << ". " - << std::setw(5) << std::setprecision(2) - << Counts[i].second/(double)TotalExecutions*100 << "% " - << std::setw(5) << Counts[i].second << "/" - << TotalExecutions << "\t" - << F->getNameStr() << "() - " - << Counts[i].first->getNameStr() << "\n"; - FunctionsToPrint.insert(F); - } - - BlockFreqs.insert(Counts.begin(), Counts.end()); - } - - if (PIL.hasAccurateEdgeCounts()) { - std::vector > Counts; - PIL.getEdgeCounts(Counts); - EdgeFreqs.insert(Counts.begin(), Counts.end()); + TotalExecutions = 0; + for (unsigned i = 0, e = Counts.size(); i != e; ++i) + TotalExecutions += Counts[i].second; + + // Sort by the frequency, backwards. + sort(Counts.begin(), Counts.end(), + PairSecondSortReverse()); + + std::cout << "\n===" << std::string(73, '-') << "===\n"; + std::cout << "Top 20 most frequently executed basic blocks:\n\n"; + + // Print out the function frequencies... + std::cout <<" ## %% \tFrequency\n"; + unsigned BlocksToPrint = Counts.size(); + if (BlocksToPrint > 20) BlocksToPrint = 20; + for (unsigned i = 0; i != BlocksToPrint; ++i) { + if (Counts[i].second == 0) break; + Function *F = Counts[i].first->getParent(); + std::cout << std::setw(3) << i+1 << ". " + << std::setw(5) << std::setprecision(2) + << Counts[i].second/(double)TotalExecutions*100 << "% " + << std::setw(5) << Counts[i].second << "/" + << TotalExecutions << "\t" + << F->getNameStr() << "() - " + << Counts[i].first->getNameStr() << "\n"; + FunctionsToPrint.insert(F); } if (PrintAnnotatedLLVM || PrintAllCode) { std::cout << "\n===" << std::string(73, '-') << "===\n"; std::cout << "Annotated LLVM code for the module:\n\n"; - - ProfileAnnotator PA(FuncFreqs, BlockFreqs, EdgeFreqs); + + ProfileAnnotator PA(PI); if (FunctionsToPrint.empty() || PrintAllCode) M.print(std::cout, &PA); From sanjiv.gupta at microchip.com Wed Aug 5 10:56:28 2009 From: sanjiv.gupta at microchip.com (Sanjiv Gupta) Date: Wed, 05 Aug 2009 21:26:28 +0530 Subject: [llvm-commits] [llvm] r78142 - in /llvm/trunk: include/llvm/CodeGen/ include/llvm/Target/ lib/CodeGen/SelectionDAG/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/Blackfin/ lib/Target/CellSPU/ lib/Target/MSP430/ lib/Target/Mips/ lib/Target/PIC16/ lib/Target/PowerPC/ lib/Target/Sparc/ lib/Target/SystemZ/ lib/Target/X86/ lib/Target/XCore/ test/CodeGen/X86/ In-Reply-To: <200908050129.n751TVCZ029906@zion.cs.uiuc.edu> References: <200908050129.n751TVCZ029906@zion.cs.uiuc.edu> Message-ID: <4A79ABAC.3060604@microchip.com> Hi Dan, This causes an assert in quite a few of our tests for codegen. I just added one as test/CodeGen/PIC16/sext.ll - Sanjiv Dan Gohman wrote: > Author: djg > Date: Tue Aug 4 20:29:28 2009 > New Revision: 78142 > > URL: http://llvm.org/viewvc/llvm-project?rev=78142&view=rev > Log: > Major calling convention code refactoring. > > Instead of awkwardly encoding calling-convention information with ISD::CALL, > ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering > provides three virtual functions for targets to override: > LowerFormalArguments, LowerCall, and LowerRet, which replace the custom > lowering done on the special nodes. They provide the same information, but > in a more immediately usable format. > > This also reworks much of the target-independent tail call logic. The > decision of whether or not to perform a tail call is now cleanly split > between target-independent portions, and the target dependent portion > in IsEligibleForTailCallOptimization. > > This also synchronizes all in-tree targets, to help enable future > refactoring and feature work. > > From aaronngray.lists at googlemail.com Wed Aug 5 10:58:49 2009 From: aaronngray.lists at googlemail.com (Aaron Gray) Date: Wed, 5 Aug 2009 16:58:49 +0100 Subject: [llvm-commits] [llvm] r78178 - in /llvm/trunk: lib/CodeGen/SimpleRegisterCoalescing.cpp test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll References: <200908050705.n7575g9L008827@zion.cs.uiuc.edu> Message-ID: <36C7769C305046999537C4B0213A9FC0@HPLAPTOP> Evan, Yeah, I just renamed the second UI to UI2 and followed the instances through and it compiles okay now. Aaron From david_goodwin at apple.com Wed Aug 5 11:01:24 2009 From: david_goodwin at apple.com (David Goodwin) Date: Wed, 05 Aug 2009 16:01:24 -0000 Subject: [llvm-commits] [llvm] r78200 - in /llvm/trunk/lib/Target/ARM: ARM.td ARMSubtarget.h Message-ID: <200908051601.n75G1QSa006649@zion.cs.uiuc.edu> Author: david_goodwin Date: Wed Aug 5 11:01:19 2009 New Revision: 78200 URL: http://llvm.org/viewvc/llvm-project?rev=78200&view=rev Log: By default, for cortex-a8 use NEON for single-precision FP. Modified: llvm/trunk/lib/Target/ARM/ARM.td llvm/trunk/lib/Target/ARM/ARMSubtarget.h Modified: llvm/trunk/lib/Target/ARM/ARM.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARM.td?rev=78200&r1=78199&r2=78200&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARM.td (original) +++ llvm/trunk/lib/Target/ARM/ARM.td Wed Aug 5 11:01:19 2009 @@ -32,9 +32,6 @@ "ARM v6t2">; def ArchV7A : SubtargetFeature<"v7a", "ARMArchVersion", "V7A", "ARM v7A">; -def FeatureNEONFP : SubtargetFeature<"neonfp", "UseNEONForSinglePrecisionFP", - "true", - "Use NEON for single-precision FP">; def FeatureVFP2 : SubtargetFeature<"vfp2", "ARMFPUType", "VFPv2", "Enable VFP2 instructions">; def FeatureVFP3 : SubtargetFeature<"vfp3", "ARMFPUType", "VFPv3", @@ -43,6 +40,9 @@ "Enable NEON instructions">; def FeatureThumb2 : SubtargetFeature<"thumb2", "ThumbMode", "Thumb2", "Enable Thumb2 instructions">; +def FeatureNEONFP : SubtargetFeature<"neonfp", "UseNEONForSinglePrecisionFP", + "true", + "Use NEON for single-precision FP">; //===----------------------------------------------------------------------===// // ARM Processors supported. @@ -113,7 +113,7 @@ // V7 Processors. def : Processor<"cortex-a8", CortexA8Itineraries, - [ArchV7A, FeatureThumb2, FeatureNEON]>; + [ArchV7A, FeatureThumb2, FeatureNEON, FeatureNEONFP]>; def : Processor<"cortex-a9", V7Itineraries, [ArchV7A, FeatureThumb2, FeatureNEON]>; Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.h?rev=78200&r1=78199&r2=78200&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMSubtarget.h (original) +++ llvm/trunk/lib/Target/ARM/ARMSubtarget.h Wed Aug 5 11:01:19 2009 @@ -42,7 +42,9 @@ /// ARMFPUType - Floating Point Unit type. ARMFPEnum ARMFPUType; - /// UseNEONForSinglePrecisionFP - if NEON is available use for FP + /// UseNEONForSinglePrecisionFP - if the NEONFP attribute has been + /// specified. Use the method useNEONForSinglePrecisionFP() to + /// determine if NEON should actually be used. bool UseNEONForSinglePrecisionFP; /// IsThumb - True if we are in thumb mode, false if in ARM mode. From clattner at apple.com Wed Aug 5 11:03:18 2009 From: clattner at apple.com (Chris Lattner) Date: Wed, 5 Aug 2009 09:03:18 -0700 Subject: [llvm-commits] [llvm] r78127 - in /llvm/trunk: lib/ExecutionEngine/ExecutionEngine.cpp unittests/ExecutionEngine/ExecutionEngineTest.cpp unittests/ExecutionEngine/Makefile In-Reply-To: References: <200908042353.n74NrdXX026510@zion.cs.uiuc.edu> <2C7A8D9B-526C-4241-9C8D-54A320AF0623@apple.com> Message-ID: <044AAE05-7F1F-47E2-8492-E27A064405DB@apple.com> On Aug 5, 2009, at 8:34 AM, Jeffrey Yasskin wrote: >>> T2 *obj2 = new T2; // Happens to land at the same address. >>> engine.addGlobalMapping(UnrelatedGV, obj2); >>> >>> and I don't see how AssertingVH would make any of that illegal or >>> work better. >> >> If "updateglobalmapping" to null deletes the entry out of the map, >> then assertingvh should work fine. > > Oh, I see what you're going for. Yep, I'll switch those GlobalValue*s > to AssertingVH's (since going to CallbackVHs will take longer) and run > the nightly tests to see what else needs fixing. Nice, thanks! -Chris From sabre at nondot.org Wed Aug 5 11:04:22 2009 From: sabre at nondot.org (Chris Lattner) Date: Wed, 05 Aug 2009 16:04:22 -0000 Subject: [llvm-commits] [llvm] r78201 - /llvm/trunk/test/CodeGen/PIC16/sext.ll Message-ID: <200908051604.n75G4OdL006750@zion.cs.uiuc.edu> Author: lattner Date: Wed Aug 5 11:04:18 2009 New Revision: 78201 URL: http://llvm.org/viewvc/llvm-project?rev=78201&view=rev Log: checking in broken testcases is not such a good idea. Modified: llvm/trunk/test/CodeGen/PIC16/sext.ll Modified: llvm/trunk/test/CodeGen/PIC16/sext.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PIC16/sext.ll?rev=78201&r1=78200&r2=78201&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PIC16/sext.ll (original) +++ llvm/trunk/test/CodeGen/PIC16/sext.ll Wed Aug 5 11:04:18 2009 @@ -1,4 +1,5 @@ ; RUN: llvm-as < %s | llc -march=pic16 +; XFAIL: * @main.auto.c = internal global i8 0 ; [#uses=1] From clattner at apple.com Wed Aug 5 11:05:15 2009 From: clattner at apple.com (Chris Lattner) Date: Wed, 5 Aug 2009 09:05:15 -0700 Subject: [llvm-commits] [llvm] r78142 - in /llvm/trunk: include/llvm/CodeGen/ include/llvm/Target/ lib/CodeGen/SelectionDAG/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/Blackfin/ lib/Target/CellSPU/ lib/Target/MSP430/ lib/Target/Mips/ lib/Target/PIC16/ lib/Target/PowerPC/ lib/Target/Sparc/ lib/Target/SystemZ/ lib/Target/X86/ lib/Target/XCore/ test/CodeGen/X86/ In-Reply-To: <4A79ABAC.3060604@microchip.com> References: <200908050129.n751TVCZ029906@zion.cs.uiuc.edu> <4A79ABAC.3060604@microchip.com> Message-ID: <094B461E-336D-49B5-ADCE-E94DF30B4A70@apple.com> On Aug 5, 2009, at 8:56 AM, Sanjiv Gupta wrote: > Hi Dan, > This causes an assert in quite a few of our tests for codegen. > I just added one as test/CodeGen/PIC16/sext.ll Sanjiv, if the test is known broken, please xfail it. Not doing so breaks all the buildbots. -Chris > > - Sanjiv > > Dan Gohman wrote: >> Author: djg >> Date: Tue Aug 4 20:29:28 2009 >> New Revision: 78142 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=78142&view=rev >> Log: >> Major calling convention code refactoring. >> >> Instead of awkwardly encoding calling-convention information with >> ISD::CALL, >> ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, >> TargetLowering >> provides three virtual functions for targets to override: >> LowerFormalArguments, LowerCall, and LowerRet, which replace the >> custom >> lowering done on the special nodes. They provide the same >> information, but >> in a more immediately usable format. >> >> This also reworks much of the target-independent tail call logic. The >> decision of whether or not to perform a tail call is now cleanly >> split >> between target-independent portions, and the target dependent portion >> in IsEligibleForTailCallOptimization. >> >> This also synchronizes all in-tree targets, to help enable future >> refactoring and feature work. >> >> > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From benny.kra at googlemail.com Wed Aug 5 11:09:01 2009 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Wed, 05 Aug 2009 16:09:01 -0000 Subject: [llvm-commits] [llvm] r78202 - /llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Message-ID: <200908051609.n75G93nS006870@zion.cs.uiuc.edu> Author: d0k Date: Wed Aug 5 11:08:58 2009 New Revision: 78202 URL: http://llvm.org/viewvc/llvm-project?rev=78202&view=rev Log: Rename a variable to make MSVC happy. Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=78202&r1=78201&r2=78202&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original) +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Wed Aug 5 11:08:58 2009 @@ -808,9 +808,9 @@ continue; MachineInstr *UseMI = UseMO.getParent(); unsigned UseIdx = li_->getUseIndex(li_->getInstructionIndex(UseMI)); - const LiveRange *UI = LI.getLiveRangeContaining(UseIdx); - if (!UI || !LI.isKill(UI->valno, UseIdx+1)) { - if (UI->valno->def != UseIdx+1) { + const LiveRange *LR = LI.getLiveRangeContaining(UseIdx); + if (!LR || !LI.isKill(LR->valno, UseIdx+1)) { + if (LR->valno->def != UseIdx+1) { // Interesting problem. After coalescing reg1027's def and kill are both // at the same point: %reg1027,0.000000e+00 = [56,814:0) 0 at 70-(814) // From benny.kra at googlemail.com Wed Aug 5 11:11:52 2009 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Wed, 05 Aug 2009 18:11:52 +0200 Subject: [llvm-commits] [llvm] r78178 - in /llvm/trunk: lib/CodeGen/SimpleRegisterCoalescing.cpp test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll In-Reply-To: <36C7769C305046999537C4B0213A9FC0@HPLAPTOP> References: <200908050705.n7575g9L008827@zion.cs.uiuc.edu> <36C7769C305046999537C4B0213A9FC0@HPLAPTOP> Message-ID: <4A79AF48.5030008@googlemail.com> Aaron Gray writes: > Evan, > > Yeah, I just renamed the second UI to UI2 and followed the instances through > and it compiles okay now. > > Aaron Fixed: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20090803/083663.html From asl at math.spbu.ru Wed Aug 5 11:16:12 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 05 Aug 2009 16:16:12 -0000 Subject: [llvm-commits] [llvm] r78203 - /llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td Message-ID: <200908051616.n75GGDDH007077@zion.cs.uiuc.edu> Author: asl Date: Wed Aug 5 11:16:11 2009 New Revision: 78203 URL: http://llvm.org/viewvc/llvm-project?rev=78203&view=rev Log: Add memory versions of some instructions. Patch by Neale Ferguson! Modified: llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td Modified: llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td?rev=78203&r1=78202&r2=78203&view=diff ============================================================================== --- llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td (original) +++ llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td Wed Aug 5 11:16:11 2009 @@ -505,6 +505,16 @@ "lrvg\t{$dst, $src}", [(set GR64:$dst, (bswap (load rriaddr:$src)))]>; +//def BSWAP16mr : RXYI<0xE33F, (outs), (ins rriaddr:$dst, GR32:$src), +// "strvh\t{$src, $dst}", +// [(truncstorei16 (bswap GR32:$src), rriaddr:$dst)]>; +def BSWAP32mr : RXYI<0xE33E, (outs), (ins rriaddr:$dst, GR32:$src), + "strv\t{$src, $dst}", + [(truncstorei32 (bswap GR32:$src), rriaddr:$dst)]>; +def BSWAP64mr : RXYI<0xE32F, (outs), (ins rriaddr:$dst, GR64:$src), + "strvg\t{$src, $dst}", + [(store (bswap GR64:$src), rriaddr:$dst)]>; + //===----------------------------------------------------------------------===// // Arithmetic Instructions @@ -539,6 +549,20 @@ (implicit PSW)]>; } +def ADD32rm : RXI<0x5A, (outs GR32:$dst), (ins GR32:$src1, rriaddr12:$src2), + "a\t{$dst, $src2}", + [(set GR32:$dst, (add GR32:$src1, (load rriaddr12:$src2))), + (implicit PSW)]>; +def ADD32rmy : RXYI<0xE35A, (outs GR32:$dst), (ins GR32:$src1, rriaddr:$src2), + "ay\t{$dst, $src2}", + [(set GR32:$dst, (add GR32:$src1, (load rriaddr:$src2))), + (implicit PSW)]>; +def ADD64rm : RXYI<0xE308, (outs GR64:$dst), (ins GR64:$src1, rriaddr:$src2), + "ag\t{$dst, $src2}", + [(set GR64:$dst, (add GR64:$src1, (load rriaddr:$src2))), + (implicit PSW)]>; + + def ADD32ri16 : RII<0xA7A, (outs GR32:$dst), (ins GR32:$src1, s16imm:$src2), "ahi\t{$dst, $src2}", @@ -580,13 +604,13 @@ let Uses = [PSW] in { def ADDE32rr : RREI<0xB998, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), - "alcr\t{$dst, $src2}", - [(set GR32:$dst, (adde GR32:$src1, GR32:$src2)), - (implicit PSW)]>; + "alcr\t{$dst, $src2}", + [(set GR32:$dst, (adde GR32:$src1, GR32:$src2)), + (implicit PSW)]>; def ADDE64rr : RREI<0xB988, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), - "alcgr\t{$dst, $src2}", - [(set GR64:$dst, (adde GR64:$src1, GR64:$src2)), - (implicit PSW)]>; + "alcgr\t{$dst, $src2}", + [(set GR64:$dst, (adde GR64:$src1, GR64:$src2)), + (implicit PSW)]>; } let isCommutable = 1 in { // X = AND Y, Z == X = AND Z, Y @@ -600,6 +624,19 @@ [(set GR64:$dst, (and GR64:$src1, GR64:$src2))]>; } +def AND32rm : RXI<0x54, (outs GR32:$dst), (ins GR32:$src1, rriaddr12:$src2), + "n\t{$dst, $src2}", + [(set GR32:$dst, (and GR32:$src1, (load rriaddr12:$src2))), + (implicit PSW)]>; +def AND32rmy : RXYI<0xE354, (outs GR32:$dst), (ins GR32:$src1, rriaddr:$src2), + "ny\t{$dst, $src2}", + [(set GR32:$dst, (and GR32:$src1, (load rriaddr:$src2))), + (implicit PSW)]>; +def AND64rm : RXYI<0xE360, (outs GR64:$dst), (ins GR64:$src1, rriaddr:$src2), + "ng\t{$dst, $src2}", + [(set GR64:$dst, (and GR64:$src1, (load rriaddr:$src2))), + (implicit PSW)]>; + def AND32rill16 : RII<0xA57, (outs GR32:$dst), (ins GR32:$src1, i32imm:$src2), "nill\t{$dst, $src2}", @@ -651,6 +688,20 @@ [(set GR64:$dst, (or GR64:$src1, GR64:$src2))]>; } +def OR32rm : RXI<0x56, (outs GR32:$dst), (ins GR32:$src1, rriaddr12:$src2), + "o\t{$dst, $src2}", + [(set GR32:$dst, (or GR32:$src1, (load rriaddr12:$src2))), + (implicit PSW)]>; +def OR32rmy : RXYI<0xE356, (outs GR32:$dst), (ins GR32:$src1, rriaddr:$src2), + "oy\t{$dst, $src2}", + [(set GR32:$dst, (or GR32:$src1, (load rriaddr:$src2))), + (implicit PSW)]>; +def OR64rm : RXYI<0xE381, (outs GR64:$dst), (ins GR64:$src1, rriaddr:$src2), + "og\t{$dst, $src2}", + [(set GR64:$dst, (or GR64:$src1, (load rriaddr:$src2))), + (implicit PSW)]>; + + // FIXME: Provide proper encoding! def OR32ri16 : RII<0xA5B, (outs GR32:$dst), (ins GR32:$src1, i32imm:$src2), "oill\t{$dst, $src2}", @@ -699,6 +750,19 @@ "sgr\t{$dst, $src2}", [(set GR64:$dst, (sub GR64:$src1, GR64:$src2))]>; +def SUB32rm : RXI<0x5B, (outs GR32:$dst), (ins GR32:$src1, rriaddr12:$src2), + "s\t{$dst, $src2}", + [(set GR32:$dst, (sub GR32:$src1, (load rriaddr12:$src2))), + (implicit PSW)]>; +def SUB32rmy : RXYI<0xE35B, (outs GR32:$dst), (ins GR32:$src1, rriaddr:$src2), + "sy\t{$dst, $src2}", + [(set GR32:$dst, (sub GR32:$src1, (load rriaddr:$src2))), + (implicit PSW)]>; +def SUB64rm : RXYI<0xE309, (outs GR64:$dst), (ins GR64:$src1, rriaddr:$src2), + "sg\t{$dst, $src2}", + [(set GR64:$dst, (sub GR64:$src1, (load rriaddr:$src2))), + (implicit PSW)]>; + def SBC32rr : RRI<0x1F, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), "slr\t{$dst, $src2}", @@ -739,6 +803,19 @@ [(set GR64:$dst, (xor GR64:$src1, GR64:$src2))]>; } +def XOR32rm : RXI<0x57,(outs GR32:$dst), (ins GR32:$src1, rriaddr12:$src2), + "x\t{$dst, $src2}", + [(set GR32:$dst, (xor GR32:$src1, (load rriaddr12:$src2))), + (implicit PSW)]>; +def XOR32rmy : RXYI<0xE357, (outs GR32:$dst), (ins GR32:$src1, rriaddr:$src2), + "xy\t{$dst, $src2}", + [(set GR32:$dst, (xor GR32:$src1, (load rriaddr:$src2))), + (implicit PSW)]>; +def XOR64rm : RXYI<0xE382, (outs GR64:$dst), (ins GR64:$src1, rriaddr:$src2), + "xg\t{$dst, $src2}", + [(set GR64:$dst, (xor GR64:$src1, (load rriaddr:$src2))), + (implicit PSW)]>; + def XOR32ri : RILI<0xC07, (outs GR32:$dst), (ins GR32:$src1, i32imm:$src2), "xilf\t{$dst, $src2}", From clattner at apple.com Wed Aug 5 11:18:54 2009 From: clattner at apple.com (Chris Lattner) Date: Wed, 5 Aug 2009 09:18:54 -0700 Subject: [llvm-commits] [llvm] r78189 - /llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp In-Reply-To: <200908051400.n75E0tWJ002777@zion.cs.uiuc.edu> References: <200908051400.n75E0tWJ002777@zion.cs.uiuc.edu> Message-ID: <158B464E-DCA2-4710-8AC2-1CA6CE36783D@apple.com> On Aug 5, 2009, at 7:00 AM, Andrew Lenharth wrote: > Author: alenhar2 > Date: Wed Aug 5 08:59:57 2009 > New Revision: 78189 > > URL: http://llvm.org/viewvc/llvm-project?rev=78189&view=rev > Log: > Alpha: Get section directives right Hey Andrew, Can Alpha derive from the ELF common code? -Chris > > Modified: > llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp > > Modified: llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp?rev=78189&r1=78188&r2=78189&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp (original) > +++ llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp Wed Aug 5 > 08:59:57 2009 > @@ -36,11 +36,11 @@ > public: > void Initialize(MCContext &Ctx, const TargetMachine &TM) { > TargetLoweringObjectFile::Initialize(Ctx, TM); > - TextSection = getOrCreateSection("_text", true, > + TextSection = getOrCreateSection(".text", true, > SectionKind::getText()); > - DataSection = getOrCreateSection("_data", true, > + DataSection = getOrCreateSection(".data", true, > SectionKind::getDataRel()); > - ReadOnlySection = getOrCreateSection("_rodata", true, > + ReadOnlySection = getOrCreateSection(".rodata", true, > SectionKind::getReadOnly()); > } > }; > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From clattner at apple.com Wed Aug 5 11:19:34 2009 From: clattner at apple.com (Chris Lattner) Date: Wed, 5 Aug 2009 09:19:34 -0700 Subject: [llvm-commits] [llvm] r78203 - /llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td In-Reply-To: <200908051616.n75GGDDH007077@zion.cs.uiuc.edu> References: <200908051616.n75GGDDH007077@zion.cs.uiuc.edu> Message-ID: On Aug 5, 2009, at 9:16 AM, Anton Korobeynikov wrote: > Author: asl > Date: Wed Aug 5 11:16:11 2009 > New Revision: 78203 > > URL: http://llvm.org/viewvc/llvm-project?rev=78203&view=rev > Log: > Add memory versions of some instructions. > Patch by Neale Ferguson! Testcase please :) -Chris > > Modified: > llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td > > Modified: llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td?rev=78203&r1=78202&r2=78203&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td (original) > +++ llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td Wed Aug 5 > 11:16:11 2009 > @@ -505,6 +505,16 @@ > "lrvg\t{$dst, $src}", > [(set GR64:$dst, (bswap (load rriaddr:$src)))]>; > > +//def BSWAP16mr : RXYI<0xE33F, (outs), (ins rriaddr:$dst, GR32:$src), > +// "strvh\t{$src, $dst}", > +// [(truncstorei16 (bswap GR32:$src), rriaddr: > $dst)]>; > +def BSWAP32mr : RXYI<0xE33E, (outs), (ins rriaddr:$dst, GR32:$src), > + "strv\t{$src, $dst}", > + [(truncstorei32 (bswap GR32:$src), rriaddr: > $dst)]>; > +def BSWAP64mr : RXYI<0xE32F, (outs), (ins rriaddr:$dst, GR64:$src), > + "strvg\t{$src, $dst}", > + [(store (bswap GR64:$src), rriaddr:$dst)]>; > + > // > = > = > = > ----------------------------------------------------------------------= > ==// > // Arithmetic Instructions > > @@ -539,6 +549,20 @@ > (implicit PSW)]>; > } > > +def ADD32rm : RXI<0x5A, (outs GR32:$dst), (ins GR32:$src1, > rriaddr12:$src2), > + "a\t{$dst, $src2}", > + [(set GR32:$dst, (add GR32:$src1, (load > rriaddr12:$src2))), > + (implicit PSW)]>; > +def ADD32rmy : RXYI<0xE35A, (outs GR32:$dst), (ins GR32:$src1, > rriaddr:$src2), > + "ay\t{$dst, $src2}", > + [(set GR32:$dst, (add GR32:$src1, (load > rriaddr:$src2))), > + (implicit PSW)]>; > +def ADD64rm : RXYI<0xE308, (outs GR64:$dst), (ins GR64:$src1, > rriaddr:$src2), > + "ag\t{$dst, $src2}", > + [(set GR64:$dst, (add GR64:$src1, (load > rriaddr:$src2))), > + (implicit PSW)]>; > + > + > def ADD32ri16 : RII<0xA7A, > (outs GR32:$dst), (ins GR32:$src1, s16imm:$src2), > "ahi\t{$dst, $src2}", > @@ -580,13 +604,13 @@ > > let Uses = [PSW] in { > def ADDE32rr : RREI<0xB998, (outs GR32:$dst), (ins GR32:$src1, > GR32:$src2), > - "alcr\t{$dst, $src2}", > - [(set GR32:$dst, (adde GR32:$src1, GR32:$src2)), > - (implicit PSW)]>; > + "alcr\t{$dst, $src2}", > + [(set GR32:$dst, (adde GR32:$src1, GR32:$src2)), > + (implicit PSW)]>; > def ADDE64rr : RREI<0xB988, (outs GR64:$dst), (ins GR64:$src1, > GR64:$src2), > - "alcgr\t{$dst, $src2}", > - [(set GR64:$dst, (adde GR64:$src1, GR64:$src2)), > - (implicit PSW)]>; > + "alcgr\t{$dst, $src2}", > + [(set GR64:$dst, (adde GR64:$src1, GR64:$src2)), > + (implicit PSW)]>; > } > > let isCommutable = 1 in { // X = AND Y, Z == X = AND Z, Y > @@ -600,6 +624,19 @@ > [(set GR64:$dst, (and GR64:$src1, GR64:$src2))]>; > } > > +def AND32rm : RXI<0x54, (outs GR32:$dst), (ins GR32:$src1, > rriaddr12:$src2), > + "n\t{$dst, $src2}", > + [(set GR32:$dst, (and GR32:$src1, (load > rriaddr12:$src2))), > + (implicit PSW)]>; > +def AND32rmy : RXYI<0xE354, (outs GR32:$dst), (ins GR32:$src1, > rriaddr:$src2), > + "ny\t{$dst, $src2}", > + [(set GR32:$dst, (and GR32:$src1, (load > rriaddr:$src2))), > + (implicit PSW)]>; > +def AND64rm : RXYI<0xE360, (outs GR64:$dst), (ins GR64:$src1, > rriaddr:$src2), > + "ng\t{$dst, $src2}", > + [(set GR64:$dst, (and GR64:$src1, (load > rriaddr:$src2))), > + (implicit PSW)]>; > + > def AND32rill16 : RII<0xA57, > (outs GR32:$dst), (ins GR32:$src1, i32imm: > $src2), > "nill\t{$dst, $src2}", > @@ -651,6 +688,20 @@ > [(set GR64:$dst, (or GR64:$src1, GR64:$src2))]>; > } > > +def OR32rm : RXI<0x56, (outs GR32:$dst), (ins GR32:$src1, > rriaddr12:$src2), > + "o\t{$dst, $src2}", > + [(set GR32:$dst, (or GR32:$src1, (load > rriaddr12:$src2))), > + (implicit PSW)]>; > +def OR32rmy : RXYI<0xE356, (outs GR32:$dst), (ins GR32:$src1, > rriaddr:$src2), > + "oy\t{$dst, $src2}", > + [(set GR32:$dst, (or GR32:$src1, (load rriaddr: > $src2))), > + (implicit PSW)]>; > +def OR64rm : RXYI<0xE381, (outs GR64:$dst), (ins GR64:$src1, > rriaddr:$src2), > + "og\t{$dst, $src2}", > + [(set GR64:$dst, (or GR64:$src1, (load rriaddr: > $src2))), > + (implicit PSW)]>; > + > + // FIXME: Provide proper encoding! > def OR32ri16 : RII<0xA5B, > (outs GR32:$dst), (ins GR32:$src1, i32imm:$src2), > "oill\t{$dst, $src2}", > @@ -699,6 +750,19 @@ > "sgr\t{$dst, $src2}", > [(set GR64:$dst, (sub GR64:$src1, GR64:$src2))]>; > > +def SUB32rm : RXI<0x5B, (outs GR32:$dst), (ins GR32:$src1, > rriaddr12:$src2), > + "s\t{$dst, $src2}", > + [(set GR32:$dst, (sub GR32:$src1, (load > rriaddr12:$src2))), > + (implicit PSW)]>; > +def SUB32rmy : RXYI<0xE35B, (outs GR32:$dst), (ins GR32:$src1, > rriaddr:$src2), > + "sy\t{$dst, $src2}", > + [(set GR32:$dst, (sub GR32:$src1, (load > rriaddr:$src2))), > + (implicit PSW)]>; > +def SUB64rm : RXYI<0xE309, (outs GR64:$dst), (ins GR64:$src1, > rriaddr:$src2), > + "sg\t{$dst, $src2}", > + [(set GR64:$dst, (sub GR64:$src1, (load > rriaddr:$src2))), > + (implicit PSW)]>; > + > def SBC32rr : RRI<0x1F, > (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), > "slr\t{$dst, $src2}", > @@ -739,6 +803,19 @@ > [(set GR64:$dst, (xor GR64:$src1, GR64:$src2))]>; > } > > +def XOR32rm : RXI<0x57,(outs GR32:$dst), (ins GR32:$src1, > rriaddr12:$src2), > + "x\t{$dst, $src2}", > + [(set GR32:$dst, (xor GR32:$src1, (load > rriaddr12:$src2))), > + (implicit PSW)]>; > +def XOR32rmy : RXYI<0xE357, (outs GR32:$dst), (ins GR32:$src1, > rriaddr:$src2), > + "xy\t{$dst, $src2}", > + [(set GR32:$dst, (xor GR32:$src1, (load > rriaddr:$src2))), > + (implicit PSW)]>; > +def XOR64rm : RXYI<0xE382, (outs GR64:$dst), (ins GR64:$src1, > rriaddr:$src2), > + "xg\t{$dst, $src2}", > + [(set GR64:$dst, (xor GR64:$src1, (load > rriaddr:$src2))), > + (implicit PSW)]>; > + > def XOR32ri : RILI<0xC07, > (outs GR32:$dst), (ins GR32:$src1, i32imm:$src2), > "xilf\t{$dst, $src2}", > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From gohman at apple.com Wed Aug 5 11:21:48 2009 From: gohman at apple.com (Dan Gohman) Date: Wed, 5 Aug 2009 09:21:48 -0700 Subject: [llvm-commits] [llvm] r78082 - /llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp In-Reply-To: <200908041759.n74HxVQm014227@zion.cs.uiuc.edu> References: <200908041759.n74HxVQm014227@zion.cs.uiuc.edu> Message-ID: <96761BCA-063F-4528-B079-9FD186C174F2@apple.com> On Aug 4, 2009, at 10:59 AM, Sanjiv Gupta wrote: > + SDValue ChainLo = Chain, ChainHi = Chain; > + if (Chain.getOpcode() == ISD::TokenFactor) { > + ChainLo = Chain.getOperand(0); > + ChainHi = Chain.getOperand(1); > + } This is not correct. There's no guarantee that a Tokenfactor for an i64 store will have 2 chains and that it will be safe to use them in this way. In order to be correct, this code should validate that the TokenFactor operands are actually the two chains from a sufficiently-aligned non-volatile expanded load. And actually, with that checking, this code could be useful in the DAGCombiner pass, if you're interested. The DAGCombiner's alias-analysis code is not currently enabled by default for a variety of reasons, so it would be nice to catch common cases like this. It would help several targets. Dan From evan.cheng at apple.com Wed Aug 5 11:22:12 2009 From: evan.cheng at apple.com (Evan Cheng) Date: Wed, 5 Aug 2009 09:22:12 -0700 Subject: [llvm-commits] [llvm] r78200 - in /llvm/trunk/lib/Target/ARM: ARM.td ARMSubtarget.h In-Reply-To: <200908051601.n75G1QSa006649@zion.cs.uiuc.edu> References: <200908051601.n75G1QSa006649@zion.cs.uiuc.edu> Message-ID: <7CA90A24-35C0-4BD5-B6EB-2F943FBE8915@apple.com> Hi David, Can we disable this until the failures are fixed? Thanks, Evan On Aug 5, 2009, at 9:01 AM, David Goodwin wrote: > Author: david_goodwin > Date: Wed Aug 5 11:01:19 2009 > New Revision: 78200 > > URL: http://llvm.org/viewvc/llvm-project?rev=78200&view=rev > Log: > By default, for cortex-a8 use NEON for single-precision FP. > > Modified: > llvm/trunk/lib/Target/ARM/ARM.td > llvm/trunk/lib/Target/ARM/ARMSubtarget.h > > Modified: llvm/trunk/lib/Target/ARM/ARM.td > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARM.td?rev=78200&r1=78199&r2=78200&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/ARM/ARM.td (original) > +++ llvm/trunk/lib/Target/ARM/ARM.td Wed Aug 5 11:01:19 2009 > @@ -32,9 +32,6 @@ > "ARM v6t2">; > def ArchV7A : SubtargetFeature<"v7a", "ARMArchVersion", "V7A", > "ARM v7A">; > -def FeatureNEONFP : SubtargetFeature<"neonfp", > "UseNEONForSinglePrecisionFP", > - "true", > - "Use NEON for single-precision > FP">; > def FeatureVFP2 : SubtargetFeature<"vfp2", "ARMFPUType", "VFPv2", > "Enable VFP2 instructions">; > def FeatureVFP3 : SubtargetFeature<"vfp3", "ARMFPUType", "VFPv3", > @@ -43,6 +40,9 @@ > "Enable NEON instructions">; > def FeatureThumb2 : SubtargetFeature<"thumb2", "ThumbMode", "Thumb2", > "Enable Thumb2 instructions">; > +def FeatureNEONFP : SubtargetFeature<"neonfp", > "UseNEONForSinglePrecisionFP", > + "true", > + "Use NEON for single-precision > FP">; > > // > = > = > = > ----------------------------------------------------------------------= > ==// > // ARM Processors supported. > @@ -113,7 +113,7 @@ > > // V7 Processors. > def : Processor<"cortex-a8", CortexA8Itineraries, > - [ArchV7A, FeatureThumb2, FeatureNEON]>; > + [ArchV7A, FeatureThumb2, FeatureNEON, > FeatureNEONFP]>; > def : Processor<"cortex-a9", V7Itineraries, > [ArchV7A, FeatureThumb2, FeatureNEON]>; > > > Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.h?rev=78200&r1=78199&r2=78200&view=diff > > = > = > = > = > = > = > = > = > ====================================================================== > --- llvm/trunk/lib/Target/ARM/ARMSubtarget.h (original) > +++ llvm/trunk/lib/Target/ARM/ARMSubtarget.h Wed Aug 5 11:01:19 2009 > @@ -42,7 +42,9 @@ > /// ARMFPUType - Floating Point Unit type. > ARMFPEnum ARMFPUType; > > - /// UseNEONForSinglePrecisionFP - if NEON is available use for FP > + /// UseNEONForSinglePrecisionFP - if the NEONFP attribute has been > + /// specified. Use the method useNEONForSinglePrecisionFP() to > + /// determine if NEON should actually be used. > bool UseNEONForSinglePrecisionFP; > > /// IsThumb - True if we are in thumb mode, false if in ARM mode. > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From gohman at apple.com Wed Aug 5 11:37:38 2009 From: gohman at apple.com (Dan Gohman) Date: Wed, 05 Aug 2009 16:37:38 -0000 Subject: [llvm-commits] [llvm] r78204 - in /llvm/trunk/test/CodeGen/X86: 2009-03-26-NoImplicitFPBug.ll red-zone.ll Message-ID: <200908051637.n75GbkuV007691@zion.cs.uiuc.edu> Author: djg Date: Wed Aug 5 11:37:27 2009 New Revision: 78204 URL: http://llvm.org/viewvc/llvm-project?rev=78204&view=rev Log: Change these tests to use function attributes rather than special llc command-line options. Modified: llvm/trunk/test/CodeGen/X86/2009-03-26-NoImplicitFPBug.ll llvm/trunk/test/CodeGen/X86/red-zone.ll Modified: llvm/trunk/test/CodeGen/X86/2009-03-26-NoImplicitFPBug.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-03-26-NoImplicitFPBug.ll?rev=78204&r1=78203&r2=78204&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/2009-03-26-NoImplicitFPBug.ll (original) +++ llvm/trunk/test/CodeGen/X86/2009-03-26-NoImplicitFPBug.ll Wed Aug 5 11:37:27 2009 @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -no-implicit-float +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -define double @t(double %x) nounwind ssp { +define double @t(double %x) nounwind ssp noimplicitfloat { entry: br i1 false, label %return, label %bb3 Modified: llvm/trunk/test/CodeGen/X86/red-zone.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/red-zone.ll?rev=78204&r1=78203&r2=78204&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/red-zone.ll (original) +++ llvm/trunk/test/CodeGen/X86/red-zone.ll Wed Aug 5 11:37:27 2009 @@ -1,13 +1,25 @@ -; RUN: llvm-as < %s | llc -march=x86-64 > %t -; RUN: not grep subq %t -; RUN: not grep addq %t -; RUN: grep {\\-4(%%rsp)} %t | count 2 -; RUN: llvm-as < %s | llc -march=x86-64 -disable-red-zone > %t -; RUN: grep subq %t | count 1 -; RUN: grep addq %t | count 1 +; RUN: llvm-as < %s | llc -march=x86-64 | FileCheck %s +; First without noredzone. +; CHECK: f0: +; CHECK: -4(%rsp) +; CHECK: -4(%rsp) +; CHECK: ret define x86_fp80 @f0(float %f) nounwind readnone { entry: %0 = fpext float %f to x86_fp80 ; [#uses=1] ret x86_fp80 %0 } + +; Then with noredzone. +; CHECK: f1: +; CHECK: subq $4, %rsp +; CHECK: (%rsp) +; CHECK: (%rsp) +; CHECK: addq $4, %rsp +; CHECK: ret +define x86_fp80 @f1(float %f) nounwind readnone noredzone { +entry: + %0 = fpext float %f to x86_fp80 ; [#uses=1] + ret x86_fp80 %0 +} From gohman at apple.com Wed Aug 5 11:38:50 2009 From: gohman at apple.com (Dan Gohman) Date: Wed, 05 Aug 2009 16:38:50 -0000 Subject: [llvm-commits] [llvm] r78205 - /llvm/trunk/utils/vim/llvm.vim Message-ID: <200908051638.n75GcqDL007732@zion.cs.uiuc.edu> Author: djg Date: Wed Aug 5 11:38:48 2009 New Revision: 78205 URL: http://llvm.org/viewvc/llvm-project?rev=78205&view=rev Log: Add new function attribute keywords to the vim syntax. Modified: llvm/trunk/utils/vim/llvm.vim Modified: llvm/trunk/utils/vim/llvm.vim URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/vim/llvm.vim?rev=78205&r1=78204&r2=78205&view=diff ============================================================================== --- llvm/trunk/utils/vim/llvm.vim (original) +++ llvm/trunk/utils/vim/llvm.vim Wed Aug 5 11:38:48 2009 @@ -50,8 +50,9 @@ syn keyword llvmKeyword volatile fastcc coldcc cc ccc syn keyword llvmKeyword x86_stdcallcc x86_fastcallcc syn keyword llvmKeyword signext zeroext inreg sret nounwind noreturn -syn keyword llvmKeyword nocapture byval nest readnone readonly +syn keyword llvmKeyword nocapture byval nest readnone readonly noalias syn keyword llvmKeyword noinline alwaysinline optsize ssp sspreq +syn keyword llvmKeyword noredzone noimplicitfloat naked syn keyword llvmKeyword module asm align tail to syn keyword llvmKeyword addrspace section alias sideeffect c gc syn keyword llvmKeyword target datalayout triple From gohman at apple.com Wed Aug 5 11:39:46 2009 From: gohman at apple.com (Dan Gohman) Date: Wed, 05 Aug 2009 16:39:46 -0000 Subject: [llvm-commits] [llvm] r78206 - /llvm/trunk/include/llvm/Target/TargetMachine.h Message-ID: <200908051639.n75GdlSn007767@zion.cs.uiuc.edu> Author: djg Date: Wed Aug 5 11:39:42 2009 New Revision: 78206 URL: http://llvm.org/viewvc/llvm-project?rev=78206&view=rev Log: Delete an obsolete sentance from a comment. Modified: llvm/trunk/include/llvm/Target/TargetMachine.h Modified: llvm/trunk/include/llvm/Target/TargetMachine.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetMachine.h?rev=78206&r1=78205&r2=78206&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetMachine.h (original) +++ llvm/trunk/include/llvm/Target/TargetMachine.h Wed Aug 5 11:39:42 2009 @@ -209,8 +209,7 @@ /// addPassesToEmitFile - Add passes to the specified pass manager to get the /// specified file emitted. Typically this will involve several steps of code - /// generation. If Fast is set to true, the code generator should emit code - /// as fast as possible, though the generated code may be less efficient. + /// generation. /// This method should return FileModel::Error if emission of this file type /// is not supported. /// From dpatel at apple.com Wed Aug 5 11:40:04 2009 From: dpatel at apple.com (Devang Patel) Date: Wed, 05 Aug 2009 16:40:04 -0000 Subject: [llvm-commits] [llvm] r78207 - in /llvm/trunk/lib/Target: ARM/AsmPrinter/ARMAsmPrinter.cpp Alpha/AsmPrinter/AlphaAsmPrinter.cpp CellSPU/AsmPrinter/SPUAsmPrinter.cpp Mips/AsmPrinter/MipsAsmPrinter.cpp PowerPC/AsmPrinter/PPCAsmPrinter.cpp Sparc/AsmPrinter/SparcAsmPrinter.cpp X86/AsmPrinter/X86ATTAsmPrinter.cpp Message-ID: <200908051640.n75Ge6eX007795@zion.cs.uiuc.edu> Author: dpatel Date: Wed Aug 5 11:40:02 2009 New Revision: 78207 URL: http://llvm.org/viewvc/llvm-project?rev=78207&view=rev Log: Remove dead code. MDNode and MDString are not Constant anymore. Modified: llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp llvm/trunk/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Modified: llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp?rev=78207&r1=78206&r2=78207&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp Wed Aug 5 11:40:02 2009 @@ -21,7 +21,6 @@ #include "ARMMachineFunctionInfo.h" #include "llvm/Constants.h" #include "llvm/Module.h" -#include "llvm/Metadata.h" #include "llvm/CodeGen/AsmPrinter.h" #include "llvm/CodeGen/DwarfWriter.h" #include "llvm/CodeGen/MachineModuleInfo.h" @@ -1146,8 +1145,6 @@ std::string name = Mang->getMangledName(GVar); Constant *C = GVar->getInitializer(); - if (isa(C) || isa(C)) - return; const Type *Type = C->getType(); unsigned Size = TD->getTypeAllocSize(Type); unsigned Align = TD->getPreferredAlignmentLog(GVar); Modified: llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp?rev=78207&r1=78206&r2=78207&view=diff ============================================================================== --- llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp Wed Aug 5 11:40:02 2009 @@ -17,7 +17,6 @@ #include "AlphaInstrInfo.h" #include "AlphaTargetMachine.h" #include "llvm/Module.h" -#include "llvm/Metadata.h" #include "llvm/Type.h" #include "llvm/Assembly/Writer.h" #include "llvm/CodeGen/AsmPrinter.h" @@ -209,8 +208,6 @@ std::string name = Mang->getMangledName(GVar); Constant *C = GVar->getInitializer(); - if (isa(C) || isa(C)) - return; unsigned Size = TD->getTypeAllocSize(C->getType()); unsigned Align = TD->getPreferredAlignmentLog(GVar); Modified: llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp?rev=78207&r1=78206&r2=78207&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp Wed Aug 5 11:40:02 2009 @@ -19,7 +19,6 @@ #include "llvm/Constants.h" #include "llvm/DerivedTypes.h" #include "llvm/Module.h" -#include "llvm/Metadata.h" #include "llvm/Assembly/Writer.h" #include "llvm/CodeGen/AsmPrinter.h" #include "llvm/CodeGen/DwarfWriter.h" @@ -519,8 +518,6 @@ printVisibility(name, GVar->getVisibility()); Constant *C = GVar->getInitializer(); - if (isa(C) || isa(C)) - return; const Type *Type = C->getType(); unsigned Size = TD->getTypeAllocSize(Type); unsigned Align = TD->getPreferredAlignmentLog(GVar); Modified: llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp?rev=78207&r1=78206&r2=78207&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp Wed Aug 5 11:40:02 2009 @@ -22,7 +22,6 @@ #include "llvm/Constants.h" #include "llvm/DerivedTypes.h" #include "llvm/Module.h" -#include "llvm/Metadata.h" #include "llvm/CodeGen/AsmPrinter.h" #include "llvm/CodeGen/DwarfWriter.h" #include "llvm/CodeGen/MachineFunctionPass.h" @@ -450,8 +449,6 @@ O << "\n\n"; std::string name = Mang->getMangledName(GVar); Constant *C = GVar->getInitializer(); - if (isa(C) || isa(C)) - return; const Type *CTy = C->getType(); unsigned Size = TD->getTypeAllocSize(CTy); const ConstantArray *CVA = dyn_cast(C); Modified: llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp?rev=78207&r1=78206&r2=78207&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp Wed Aug 5 11:40:02 2009 @@ -24,7 +24,6 @@ #include "llvm/Constants.h" #include "llvm/DerivedTypes.h" #include "llvm/Module.h" -#include "llvm/Metadata.h" #include "llvm/Assembly/Writer.h" #include "llvm/CodeGen/AsmPrinter.h" #include "llvm/CodeGen/DwarfWriter.h" @@ -675,8 +674,6 @@ printVisibility(name, GVar->getVisibility()); Constant *C = GVar->getInitializer(); - if (isa(C) || isa(C)) - return; const Type *Type = C->getType(); unsigned Size = TD->getTypeAllocSize(Type); unsigned Align = TD->getPreferredAlignmentLog(GVar); Modified: llvm/trunk/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp?rev=78207&r1=78206&r2=78207&view=diff ============================================================================== --- llvm/trunk/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp Wed Aug 5 11:40:02 2009 @@ -19,7 +19,6 @@ #include "llvm/Constants.h" #include "llvm/DerivedTypes.h" #include "llvm/Module.h" -#include "llvm/Metadata.h" #include "llvm/CodeGen/AsmPrinter.h" #include "llvm/CodeGen/DwarfWriter.h" #include "llvm/CodeGen/MachineFunctionPass.h" @@ -223,8 +222,6 @@ O << "\n\n"; std::string name = Mang->getMangledName(GVar); Constant *C = GVar->getInitializer(); - if (isa(C) || isa(C)) - return; unsigned Size = TD->getTypeAllocSize(C->getType()); unsigned Align = TD->getPreferredAlignment(GVar); Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp?rev=78207&r1=78206&r2=78207&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Wed Aug 5 11:40:02 2009 @@ -23,7 +23,6 @@ #include "llvm/CallingConv.h" #include "llvm/DerivedTypes.h" #include "llvm/Module.h" -#include "llvm/Metadata.h" #include "llvm/Type.h" #include "llvm/ADT/Statistic.h" #include "llvm/ADT/StringExtras.h" @@ -771,8 +770,6 @@ std::string name = Mang->getMangledName(GVar); Constant *C = GVar->getInitializer(); - if (isa(C) || isa(C)) - return; const Type *Type = C->getType(); unsigned Size = TD->getTypeAllocSize(Type); unsigned Align = TD->getPreferredAlignmentLog(GVar); From gohman at apple.com Wed Aug 5 11:40:36 2009 From: gohman at apple.com (Dan Gohman) Date: Wed, 05 Aug 2009 16:40:36 -0000 Subject: [llvm-commits] [llvm] r78208 - /llvm/trunk/include/llvm/PassManagers.h Message-ID: <200908051640.n75Geaim007824@zion.cs.uiuc.edu> Author: djg Date: Wed Aug 5 11:40:32 2009 New Revision: 78208 URL: http://llvm.org/viewvc/llvm-project?rev=78208&view=rev Log: Add an explicit keyword. Modified: llvm/trunk/include/llvm/PassManagers.h Modified: llvm/trunk/include/llvm/PassManagers.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/PassManagers.h?rev=78208&r1=78207&r2=78208&view=diff ============================================================================== --- llvm/trunk/include/llvm/PassManagers.h (original) +++ llvm/trunk/include/llvm/PassManagers.h Wed Aug 5 11:40:32 2009 @@ -122,7 +122,7 @@ Value *V; Module *M; public: - PassManagerPrettyStackEntry(Pass *p) + explicit PassManagerPrettyStackEntry(Pass *p) : P(p), V(0), M(0) {} // When P is releaseMemory'd. PassManagerPrettyStackEntry(Pass *p, Value &v) : P(p), V(&v), M(0) {} // When P is run on V From david_goodwin at apple.com Wed Aug 5 11:40:59 2009 From: david_goodwin at apple.com (David Goodwin) Date: Wed, 05 Aug 2009 16:40:59 -0000 Subject: [llvm-commits] [llvm] r78209 - /llvm/trunk/lib/Target/ARM/ARM.td Message-ID: <200908051641.n75Gex32007844@zion.cs.uiuc.edu> Author: david_goodwin Date: Wed Aug 5 11:40:57 2009 New Revision: 78209 URL: http://llvm.org/viewvc/llvm-project?rev=78209&view=rev Log: Disable NEON single-precision FP support for Cortex-A8, for now... Modified: llvm/trunk/lib/Target/ARM/ARM.td Modified: llvm/trunk/lib/Target/ARM/ARM.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARM.td?rev=78209&r1=78208&r2=78209&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARM.td (original) +++ llvm/trunk/lib/Target/ARM/ARM.td Wed Aug 5 11:40:57 2009 @@ -113,7 +113,7 @@ // V7 Processors. def : Processor<"cortex-a8", CortexA8Itineraries, - [ArchV7A, FeatureThumb2, FeatureNEON, FeatureNEONFP]>; + [ArchV7A, FeatureThumb2, FeatureNEON]>; def : Processor<"cortex-a9", V7Itineraries, [ArchV7A, FeatureThumb2, FeatureNEON]>; From daniel at zuster.org Wed Aug 5 11:42:17 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Wed, 05 Aug 2009 16:42:17 -0000 Subject: [llvm-commits] [zorg] r78210 - /zorg/trunk/zorg/buildbot/util/InformativeMailNotifier.py Message-ID: <200908051642.n75GgJdX007913@zion.cs.uiuc.edu> Author: ddunbar Date: Wed Aug 5 11:42:10 2009 New Revision: 78210 URL: http://llvm.org/viewvc/llvm-project?rev=78210&view=rev Log: Implement the comparable mixin for the InformativeMailNotifier, otherwise buildbot likes to infinite loop on reconfig. Modified: zorg/trunk/zorg/buildbot/util/InformativeMailNotifier.py Modified: zorg/trunk/zorg/buildbot/util/InformativeMailNotifier.py URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/zorg/buildbot/util/InformativeMailNotifier.py?rev=78210&r1=78209&r2=78210&view=diff ============================================================================== --- zorg/trunk/zorg/buildbot/util/InformativeMailNotifier.py (original) +++ zorg/trunk/zorg/buildbot/util/InformativeMailNotifier.py Wed Aug 5 11:42:10 2009 @@ -1,19 +1,22 @@ +import buildbot.util from buildbot.status import builder, mail -class InformativeMailNotifier(mail.MailNotifier): +class InformativeMailNotifier(mail.MailNotifier, buildbot.util.ComparableMixin): """MailNotifier subclass which provides additional information about the build failure inside the email.""" + compare_attrs = ["num_lines", "only_failure_logs"] + # FIXME: The customMessage interface is fairly inefficient, switch to # something new when it becomes available. def __init__(self, - numLines = 10, onlyFailureLogs = True, + num_lines = 10, only_failure_logs = True, *attrs, **kwargs): mail.MailNotifier.__init__(self, customMesg=self.customMessage, *attrs, **kwargs) - self.numLines = numLines - self.onlyFailureLogs = onlyFailureLogs + self.num_lines = num_lines + self.only_failure_logs = only_failure_logs def customMessage(self, attrs): # Get the standard message. @@ -27,14 +30,14 @@ data += '\n\n' # Append log files. - if self.numLines: + if self.num_lines: data += 'LOGS:\n' for name, url, lines, logstatus in attrs['logs']: - if (self.onlyFailureLogs and logstatus != builder.FAILURE): + if (self.only_failure_logs and logstatus != builder.FAILURE): continue - data += "Last %d lines of '%s':\n" % (self.numLines, name) - data += '\t' + '\n\t'.join(lines[-self.numLines:]) + data += "Last %d lines of '%s':\n" % (self.num_lines, name) + data += '\t' + '\n\t'.join(lines[-self.num_lines:]) data += '\n\n' return (data, 'plain') From gohman at apple.com Wed Aug 5 11:46:56 2009 From: gohman at apple.com (Dan Gohman) Date: Wed, 05 Aug 2009 16:46:56 -0000 Subject: [llvm-commits] [llvm] r78211 - in /llvm/trunk: lib/Target/PIC16/PIC16ISelLowering.cpp test/CodeGen/PIC16/sext.ll Message-ID: <200908051646.n75GkwiD008038@zion.cs.uiuc.edu> Author: djg Date: Wed Aug 5 11:46:43 2009 New Revision: 78211 URL: http://llvm.org/viewvc/llvm-project?rev=78211&view=rev Log: Fix a bug in the PIC16 backend. Modified: llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp llvm/trunk/test/CodeGen/PIC16/sext.ll Modified: llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp?rev=78211&r1=78210&r2=78211&view=diff ============================================================================== --- llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp Wed Aug 5 11:46:43 2009 @@ -403,7 +403,7 @@ Entry.isZExt = !isSigned; Args.push_back(Entry); } - SDValue Callee = DAG.getExternalSymbol(getPIC16LibcallName(Call), MVT::i8); + SDValue Callee = DAG.getExternalSymbol(getPIC16LibcallName(Call), MVT::i16); const Type *RetTy = RetVT.getTypeForMVT(); std::pair CallInfo = Modified: llvm/trunk/test/CodeGen/PIC16/sext.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PIC16/sext.ll?rev=78211&r1=78210&r2=78211&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/PIC16/sext.ll (original) +++ llvm/trunk/test/CodeGen/PIC16/sext.ll Wed Aug 5 11:46:43 2009 @@ -1,5 +1,4 @@ ; RUN: llvm-as < %s | llc -march=pic16 -; XFAIL: * @main.auto.c = internal global i8 0 ; [#uses=1] From asl at math.spbu.ru Wed Aug 5 11:51:01 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 05 Aug 2009 16:51:01 -0000 Subject: [llvm-commits] [llvm] r78212 - in /llvm/trunk: lib/Target/SystemZ/SystemZInstrInfo.td test/CodeGen/SystemZ/11-BSwap.ll Message-ID: <200908051651.n75Gp3tY008199@zion.cs.uiuc.edu> Author: asl Date: Wed Aug 5 11:50:53 2009 New Revision: 78212 URL: http://llvm.org/viewvc/llvm-project?rev=78212&view=rev Log: Convert bswap test to filecheck, add more test entries & convert stuff to filecheck Modified: llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td llvm/trunk/test/CodeGen/SystemZ/11-BSwap.ll Modified: llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td?rev=78212&r1=78211&r2=78212&view=diff ============================================================================== --- llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td (original) +++ llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td Wed Aug 5 11:50:53 2009 @@ -510,7 +510,7 @@ // [(truncstorei16 (bswap GR32:$src), rriaddr:$dst)]>; def BSWAP32mr : RXYI<0xE33E, (outs), (ins rriaddr:$dst, GR32:$src), "strv\t{$src, $dst}", - [(truncstorei32 (bswap GR32:$src), rriaddr:$dst)]>; + [(store (bswap GR32:$src), rriaddr:$dst)]>; def BSWAP64mr : RXYI<0xE32F, (outs), (ins rriaddr:$dst, GR64:$src), "strvg\t{$src, $dst}", [(store (bswap GR64:$src), rriaddr:$dst)]>; Modified: llvm/trunk/test/CodeGen/SystemZ/11-BSwap.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SystemZ/11-BSwap.ll?rev=78212&r1=78211&r2=78212&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/SystemZ/11-BSwap.ll (original) +++ llvm/trunk/test/CodeGen/SystemZ/11-BSwap.ll Wed Aug 5 11:50:53 2009 @@ -1,9 +1,4 @@ -; XFAIL: * -; RUN: llvm-as < %s | llc | grep lrvr | count 2 -; RUN: llvm-as < %s | llc | grep lrvgr | count 1 -; RUN: llvm-as < %s | llc | grep lrvh | count 1 -; RUN: llvm-as < %s | llc | grep {lrv.%} | count 1 -; RUN: llvm-as < %s | llc | grep {lrvg.%} | count 1 +; RUN: llvm-as < %s | llc | FileCheck %s target datalayout = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16" @@ -16,11 +11,15 @@ } define i32 @foo2(i32 zeroext %a) zeroext { +; CHECK: foo2: +; CHECK: lrvr %r1, %r2 %res = tail call i32 @llvm.bswap.i32(i32 %a) ret i32 %res } define i64 @foo3(i64 %a) zeroext { +; CHECK: foo3: +; CHECK: lrvgr %r2, %r2 %res = tail call i64 @llvm.bswap.i64(i64 %a) ret i64 %res } @@ -32,17 +31,43 @@ } define i32 @foo5(i32* %b) zeroext { +; CHECK: foo5: +; CHECK: lrv %r1, 0(%r2) %a = load i32* %b %res = tail call i32 @llvm.bswap.i32(i32 %a) ret i32 %res } define i64 @foo6(i64* %b) { +; CHECK: foo6: +; CHECK: lrvg %r2, 0(%r2) %a = load i64* %b %res = tail call i64 @llvm.bswap.i64(i64 %a) ret i64 %res } +define void @foo7(i16 %a, i16* %b) { + %res = tail call i16 @llvm.bswap.i16(i16 %a) + store i16 %res, i16* %b + ret void +} + +define void @foo8(i32 %a, i32* %b) { +; CHECK: foo8: +; CHECK: strv %r2, 0(%r3) + %res = tail call i32 @llvm.bswap.i32(i32 %a) + store i32 %res, i32* %b + ret void +} + +define void @foo9(i64 %a, i64* %b) { +; CHECK: foo9: +; CHECK: strvg %r2, 0(%r3) + %res = tail call i64 @llvm.bswap.i64(i64 %a) + store i64 %res, i64* %b + ret void +} + declare i16 @llvm.bswap.i16(i16) nounwind readnone declare i32 @llvm.bswap.i32(i32) nounwind readnone declare i64 @llvm.bswap.i64(i64) nounwind readnone From asl at math.spbu.ru Wed Aug 5 12:04:41 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 05 Aug 2009 17:04:41 -0000 Subject: [llvm-commits] [llvm] r78214 - /llvm/trunk/test/CodeGen/SystemZ/02-MemArith.ll Message-ID: <200908051704.n75H4lxa008623@zion.cs.uiuc.edu> Author: asl Date: Wed Aug 5 12:04:32 2009 New Revision: 78214 URL: http://llvm.org/viewvc/llvm-project?rev=78214&view=rev Log: Add testcases for reg-mem arithemtics added recently Added: llvm/trunk/test/CodeGen/SystemZ/02-MemArith.ll Added: llvm/trunk/test/CodeGen/SystemZ/02-MemArith.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SystemZ/02-MemArith.ll?rev=78214&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/SystemZ/02-MemArith.ll (added) +++ llvm/trunk/test/CodeGen/SystemZ/02-MemArith.ll Wed Aug 5 12:04:32 2009 @@ -0,0 +1,133 @@ +; RUN: llvm-as < %s | llc -march=systemz | FileCheck %s + +define i32 @foo1(i32 %a, i32 *%b, i64 %idx) signext { +; CHECK: foo1: +; CHECK: a %r2, 4(%r1,%r3) +entry: + %idx2 = add i64 %idx, 1 ; [#uses=1] + %ptr = getelementptr i32* %b, i64 %idx2 ; [#uses=1] + %c = load i32* %ptr + %d = add i32 %a, %c + ret i32 %d +} + +define i32 @foo2(i32 %a, i32 *%b, i64 %idx) signext { +; CHECK: foo2: +; CHECK: ay %r2, -4(%r1,%r3) +entry: + %idx2 = add i64 %idx, -1 ; [#uses=1] + %ptr = getelementptr i32* %b, i64 %idx2 ; [#uses=1] + %c = load i32* %ptr + %d = add i32 %a, %c + ret i32 %d +} + +define i64 @foo3(i64 %a, i64 *%b, i64 %idx) signext { +; CHECK: foo3: +; CHECK: ag %r2, 8(%r1,%r3) +entry: + %idx2 = add i64 %idx, 1 ; [#uses=1] + %ptr = getelementptr i64* %b, i64 %idx2 ; [#uses=1] + %c = load i64* %ptr + %d = add i64 %a, %c + ret i64 %d +} + +define i32 @foo4(i32 %a, i32 *%b, i64 %idx) signext { +; CHECK: foo4: +; CHECK: n %r2, 4(%r1,%r3) +entry: + %idx2 = add i64 %idx, 1 ; [#uses=1] + %ptr = getelementptr i32* %b, i64 %idx2 ; [#uses=1] + %c = load i32* %ptr + %d = and i32 %a, %c + ret i32 %d +} + +define i32 @foo5(i32 %a, i32 *%b, i64 %idx) signext { +; CHECK: foo5: +; CHECK: ny %r2, -4(%r1,%r3) +entry: + %idx2 = add i64 %idx, -1 ; [#uses=1] + %ptr = getelementptr i32* %b, i64 %idx2 ; [#uses=1] + %c = load i32* %ptr + %d = and i32 %a, %c + ret i32 %d +} + +define i64 @foo6(i64 %a, i64 *%b, i64 %idx) signext { +; CHECK: foo6: +; CHECK: ng %r2, 8(%r1,%r3) +entry: + %idx2 = add i64 %idx, 1 ; [#uses=1] + %ptr = getelementptr i64* %b, i64 %idx2 ; [#uses=1] + %c = load i64* %ptr + %d = and i64 %a, %c + ret i64 %d +} + +define i32 @foo7(i32 %a, i32 *%b, i64 %idx) signext { +; CHECK: foo7: +; CHECK: o %r2, 4(%r1,%r3) +entry: + %idx2 = add i64 %idx, 1 ; [#uses=1] + %ptr = getelementptr i32* %b, i64 %idx2 ; [#uses=1] + %c = load i32* %ptr + %d = or i32 %a, %c + ret i32 %d +} + +define i32 @foo8(i32 %a, i32 *%b, i64 %idx) signext { +; CHECK: foo8: +; CHECK: oy %r2, -4(%r1,%r3) +entry: + %idx2 = add i64 %idx, -1 ; [#uses=1] + %ptr = getelementptr i32* %b, i64 %idx2 ; [#uses=1] + %c = load i32* %ptr + %d = or i32 %a, %c + ret i32 %d +} + +define i64 @foo9(i64 %a, i64 *%b, i64 %idx) signext { +; CHECK: foo9: +; CHECK: og %r2, 8(%r1,%r3) +entry: + %idx2 = add i64 %idx, 1 ; [#uses=1] + %ptr = getelementptr i64* %b, i64 %idx2 ; [#uses=1] + %c = load i64* %ptr + %d = or i64 %a, %c + ret i64 %d +} + +define i32 @foo10(i32 %a, i32 *%b, i64 %idx) signext { +; CHECK: foo10: +; CHECK: x %r2, 4(%r1,%r3) +entry: + %idx2 = add i64 %idx, 1 ; [#uses=1] + %ptr = getelementptr i32* %b, i64 %idx2 ; [#uses=1] + %c = load i32* %ptr + %d = xor i32 %a, %c + ret i32 %d +} + +define i32 @foo11(i32 %a, i32 *%b, i64 %idx) signext { +; CHECK: foo11: +; CHECK: xy %r2, -4(%r1,%r3) +entry: + %idx2 = add i64 %idx, -1 ; [#uses=1] + %ptr = getelementptr i32* %b, i64 %idx2 ; [#uses=1] + %c = load i32* %ptr + %d = xor i32 %a, %c + ret i32 %d +} + +define i64 @foo12(i64 %a, i64 *%b, i64 %idx) signext { +; CHECK: foo12: +; CHECK: xg %r2, 8(%r1,%r3) +entry: + %idx2 = add i64 %idx, 1 ; [#uses=1] + %ptr = getelementptr i64* %b, i64 %idx2 ; [#uses=1] + %c = load i64* %ptr + %d = xor i64 %a, %c + ret i64 %d +} From anton at korobeynikov.info Wed Aug 5 12:20:25 2009 From: anton at korobeynikov.info (Anton Korobeynikov) Date: Wed, 5 Aug 2009 21:20:25 +0400 Subject: [llvm-commits] [llvm] r78203 - /llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td In-Reply-To: References: <200908051616.n75GGDDH007077@zion.cs.uiuc.edu> Message-ID: > Testcase please :) Done :) -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University From clattner at apple.com Wed Aug 5 12:20:55 2009 From: clattner at apple.com (Chris Lattner) Date: Wed, 5 Aug 2009 10:20:55 -0700 Subject: [llvm-commits] [llvm] r78203 - /llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td In-Reply-To: References: <200908051616.n75GGDDH007077@zion.cs.uiuc.edu> Message-ID: <8C131D0E-C930-4840-A541-7165A7958733@apple.com> On Aug 5, 2009, at 10:20 AM, Anton Korobeynikov wrote: >> Testcase please :) > Done :) Thanks! -Chris From gohman at apple.com Wed Aug 5 12:33:09 2009 From: gohman at apple.com (Dan Gohman) Date: Wed, 05 Aug 2009 17:33:09 -0000 Subject: [llvm-commits] [llvm] r78215 - /llvm/trunk/lib/System/Unix/Program.inc Message-ID: <200908051733.n75HXFAS009417@zion.cs.uiuc.edu> Author: djg Date: Wed Aug 5 12:32:39 2009 New Revision: 78215 URL: http://llvm.org/viewvc/llvm-project?rev=78215&view=rev Log: Update a comment to reflect the current code. Modified: llvm/trunk/lib/System/Unix/Program.inc Modified: llvm/trunk/lib/System/Unix/Program.inc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Unix/Program.inc?rev=78215&r1=78214&r2=78215&view=diff ============================================================================== --- llvm/trunk/lib/System/Unix/Program.inc (original) +++ llvm/trunk/lib/System/Unix/Program.inc Wed Aug 5 12:32:39 2009 @@ -53,7 +53,8 @@ if (progName.find('/') != std::string::npos) return temp; - // At this point, the file name is valid and its not executable + // At this point, the file name does not contain slashes. Search for it + // through the directories specified in the PATH environment variable. // Get the path. If its empty, we can't do anything to find it. const char *PathStr = getenv("PATH"); From bob.wilson at apple.com Wed Aug 5 12:40:11 2009 From: bob.wilson at apple.com (Bob Wilson) Date: Wed, 05 Aug 2009 17:40:11 -0000 Subject: [llvm-commits] [llvm] r78216 - /llvm/trunk/lib/Target/ARM/ARM.h Message-ID: <200908051740.n75HeHod009615@zion.cs.uiuc.edu> Author: bwilson Date: Wed Aug 5 12:39:44 2009 New Revision: 78216 URL: http://llvm.org/viewvc/llvm-project?rev=78216&view=rev Log: Remove a redundant declaration. Modified: llvm/trunk/lib/Target/ARM/ARM.h Modified: llvm/trunk/lib/Target/ARM/ARM.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARM.h?rev=78216&r1=78215&r2=78216&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARM.h (original) +++ llvm/trunk/lib/Target/ARM/ARM.h Wed Aug 5 12:39:44 2009 @@ -93,8 +93,6 @@ } FunctionPass *createARMISelDag(ARMBaseTargetMachine &TM); -FunctionPass *createARMCodeEmitterPass(ARMBaseTargetMachine &TM, - MachineCodeEmitter &MCE); FunctionPass *createARMCodeEmitterPass(ARMBaseTargetMachine &TM, MachineCodeEmitter &MCE); From gohman at apple.com Wed Aug 5 12:40:27 2009 From: gohman at apple.com (Dan Gohman) Date: Wed, 05 Aug 2009 17:40:27 -0000 Subject: [llvm-commits] [llvm] r78217 - in /llvm/trunk: lib/Target/X86/X86Instr64bit.td lib/Target/X86/X86InstrInfo.td lib/Target/X86/X86RegisterInfo.cpp test/CodeGen/X86/coalesce-esp.ll test/CodeGen/X86/ins_subreg_coalesce-3.ll test/CodeGen/X86/stack-color-with-reg.ll Message-ID: <200908051740.n75HeXwk009641@zion.cs.uiuc.edu> Author: djg Date: Wed Aug 5 12:40:24 2009 New Revision: 78217 URL: http://llvm.org/viewvc/llvm-project?rev=78217&view=rev Log: Enable the new no-SP register classes by default. This is to address PR4572. A few tests have some minor code regressions due to different coalescing. Modified: llvm/trunk/lib/Target/X86/X86Instr64bit.td llvm/trunk/lib/Target/X86/X86InstrInfo.td llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp llvm/trunk/test/CodeGen/X86/coalesce-esp.ll llvm/trunk/test/CodeGen/X86/ins_subreg_coalesce-3.ll llvm/trunk/test/CodeGen/X86/stack-color-with-reg.ll Modified: llvm/trunk/lib/Target/X86/X86Instr64bit.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Instr64bit.td?rev=78217&r1=78216&r2=78217&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86Instr64bit.td (original) +++ llvm/trunk/lib/Target/X86/X86Instr64bit.td Wed Aug 5 12:40:24 2009 @@ -32,13 +32,13 @@ def lea64mem : Operand { let PrintMethod = "printlea64mem"; - let MIOperandInfo = (ops GR64, i8imm, GR64, i32imm); + let MIOperandInfo = (ops GR64, i8imm, GR64_NOSP, i32imm); } def lea64_32mem : Operand { let PrintMethod = "printlea64_32mem"; let AsmOperandLowerMethod = "lower_lea64_32mem"; - let MIOperandInfo = (ops GR32, i8imm, GR32, i32imm); + let MIOperandInfo = (ops GR32, i8imm, GR32_NOSP, i32imm); } //===----------------------------------------------------------------------===// Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=78217&r1=78216&r2=78217&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Wed Aug 5 12:40:24 2009 @@ -196,7 +196,7 @@ def lea32mem : Operand { let PrintMethod = "printlea32mem"; - let MIOperandInfo = (ops GR32, i8imm, GR32, i32imm); + let MIOperandInfo = (ops GR32, i8imm, GR32_NOSP, i32imm); } def SSECC : Operand { Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp?rev=78217&r1=78216&r2=78217&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp Wed Aug 5 12:40:24 2009 @@ -42,11 +42,6 @@ #include "llvm/Support/ErrorHandling.h" using namespace llvm; -static cl::opt -StrictIndexRegclass("strict-index-regclass", - cl::desc("Use a special register class to avoid letting SP " - "be used as an index")); - X86RegisterInfo::X86RegisterInfo(X86TargetMachine &tm, const TargetInstrInfo &tii) : X86GenRegisterInfo(tm.getSubtarget().is64Bit() ? @@ -274,15 +269,9 @@ return &X86::GR64RegClass; return &X86::GR32RegClass; case 1: // Normal GRPs except the stack pointer (for encoding reasons). - if (!StrictIndexRegclass) { - if (TM.getSubtarget().is64Bit()) - return &X86::GR64RegClass; - return &X86::GR32RegClass; - } else { - if (TM.getSubtarget().is64Bit()) - return &X86::GR64_NOSPRegClass; - return &X86::GR32_NOSPRegClass; - } + if (TM.getSubtarget().is64Bit()) + return &X86::GR64_NOSPRegClass; + return &X86::GR32_NOSPRegClass; } } Modified: llvm/trunk/test/CodeGen/X86/coalesce-esp.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/coalesce-esp.ll?rev=78217&r1=78216&r2=78217&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/coalesce-esp.ll (original) +++ llvm/trunk/test/CodeGen/X86/coalesce-esp.ll Wed Aug 5 12:40:24 2009 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -strict-index-regclass | grep {movl %esp, %eax} +; RUN: llvm-as < %s | llc | grep {movl %esp, %eax} ; PR4572 ; Don't coalesce with %esp if it would end up putting %esp in Modified: llvm/trunk/test/CodeGen/X86/ins_subreg_coalesce-3.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/ins_subreg_coalesce-3.ll?rev=78217&r1=78216&r2=78217&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/ins_subreg_coalesce-3.ll (original) +++ llvm/trunk/test/CodeGen/X86/ins_subreg_coalesce-3.ll Wed Aug 5 12:40:24 2009 @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep mov | count 10 +; RUN: llvm-as < %s | llc -march=x86-64 | grep mov | count 11 %struct.COMPOSITE = type { i8, i16, i16 } %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 } Modified: llvm/trunk/test/CodeGen/X86/stack-color-with-reg.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/stack-color-with-reg.ll?rev=78217&r1=78216&r2=78217&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/stack-color-with-reg.ll (original) +++ llvm/trunk/test/CodeGen/X86/stack-color-with-reg.ll Wed Aug 5 12:40:24 2009 @@ -1,7 +1,7 @@ ; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin10 -relocation-model=pic -disable-fp-elim -color-ss-with-regs -stats -info-output-file - > %t ; RUN: grep stackcoloring %t | grep "loads eliminated" ; RUN: grep stackcoloring %t | grep "stack slot refs replaced with reg refs" | grep 5 -; RUN: grep asm-printer %t | grep 180 +; RUN: grep asm-printer %t | grep 182 type { [62 x %struct.Bitvec*] } ; type %0 type { i8* } ; type %1 From gohman at apple.com Wed Aug 5 12:46:34 2009 From: gohman at apple.com (Dan Gohman) Date: Wed, 05 Aug 2009 17:46:34 -0000 Subject: [llvm-commits] [test-suite] r78218 - /test-suite/trunk/Makefile.programs Message-ID: <200908051746.n75Hkbtk009916@zion.cs.uiuc.edu> Author: djg Date: Wed Aug 5 12:46:05 2009 New Revision: 78218 URL: http://llvm.org/viewvc/llvm-project?rev=78218&view=rev Log: -strict-index-regclass is now on by default. Switch x86's LLCBETA option to -combiner-alias-analysis. LSR is now preserving getelementptrs, so perhaps this option will see better results than in the past. Modified: test-suite/trunk/Makefile.programs Modified: test-suite/trunk/Makefile.programs URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Makefile.programs?rev=78218&r1=78217&r2=78218&view=diff ============================================================================== --- test-suite/trunk/Makefile.programs (original) +++ test-suite/trunk/Makefile.programs Wed Aug 5 12:46:05 2009 @@ -224,10 +224,10 @@ LLCBETAOPTION := -sched=simple endif ifeq ($(ARCH),x86_64) -LLCBETAOPTION := -strict-index-regclass +LLCBETAOPTION := -combiner-alias-analysis -combiner-global-alias-analysis endif ifeq ($(ARCH),x86) -LLCBETAOPTION := -strict-index-regclass +LLCBETAOPTION := -combiner-alias-analysis -combiner-global-alias-analysis #-pre-alloc-split #-join-cross-class-copies #-fast-isel From daniel at zuster.org Wed Aug 5 13:12:47 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Wed, 05 Aug 2009 18:12:47 -0000 Subject: [llvm-commits] [llvm] r78219 - in /llvm/trunk/lib/Target: ARM/ARMSubtarget.cpp PowerPC/PPCSubtarget.cpp X86/X86Subtarget.cpp Message-ID: <200908051812.n75ICsvC010631@zion.cs.uiuc.edu> Author: ddunbar Date: Wed Aug 5 13:12:37 2009 New Revision: 78219 URL: http://llvm.org/viewvc/llvm-project?rev=78219&view=rev Log: Remove some dead code. Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp llvm/trunk/lib/Target/X86/X86Subtarget.cpp Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp?rev=78219&r1=78218&r2=78219&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp Wed Aug 5 13:12:37 2009 @@ -81,10 +81,6 @@ if (TT.find("-darwin") != std::string::npos) // arm-darwin TargetType = isDarwin; - } else if (TT.empty()) { -#if defined(__APPLE__) - TargetType = isDarwin; -#endif } if (TT.find("eabi") != std::string::npos) Modified: llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp?rev=78219&r1=78218&r2=78219&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp Wed Aug 5 13:12:37 2009 @@ -103,15 +103,6 @@ else DarwinVers = 8; // Minimum supported darwin is Tiger. } - } else if (TT.empty()) { - // Try to autosense the subtarget from the host compiler. -#if defined(__APPLE__) -#if __APPLE_CC__ > 5400 - DarwinVers = 9; // GCC 5400+ is Leopard. -#else - DarwinVers = 8; // Minimum supported darwin is Tiger. -#endif -#endif } // Set up darwin-specific properties. Modified: llvm/trunk/lib/Target/X86/X86Subtarget.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.cpp?rev=78219&r1=78218&r2=78219&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86Subtarget.cpp (original) +++ llvm/trunk/lib/Target/X86/X86Subtarget.cpp Wed Aug 5 13:12:37 2009 @@ -458,31 +458,10 @@ TargetType = isWindows; } else if (TT.find("windows") != std::string::npos) { TargetType = isWindows; - } - else if (TT.find("-cl") != std::string::npos) { + } else if (TT.find("-cl") != std::string::npos) { TargetType = isDarwin; DarwinVers = 9; } - } else if (TT.empty()) { -#if defined(__CYGWIN__) - TargetType = isCygwin; -#elif defined(__MINGW32__) || defined(__MINGW64__) - TargetType = isMingw; -#elif defined(__APPLE__) - TargetType = isDarwin; -#if __APPLE_CC__ > 5400 - DarwinVers = 9; // GCC 5400+ is Leopard. -#else - DarwinVers = 8; // Minimum supported darwin is Tiger. -#endif - -#elif defined(_WIN32) || defined(_WIN64) - TargetType = isWindows; -#elif defined(__linux__) - // Linux doesn't imply ELF, but we don't currently support anything else. - TargetType = isELF; - IsLinux = true; -#endif } // If the asm syntax hasn't been overridden on the command line, use whatever From alenhar2 at cs.uiuc.edu Wed Aug 5 13:13:05 2009 From: alenhar2 at cs.uiuc.edu (Andrew Lenharth) Date: Wed, 05 Aug 2009 18:13:05 -0000 Subject: [llvm-commits] [llvm] r78220 - /llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp Message-ID: <200908051813.n75ID6p7010656@zion.cs.uiuc.edu> Author: alenhar2 Date: Wed Aug 5 13:13:04 2009 New Revision: 78220 URL: http://llvm.org/viewvc/llvm-project?rev=78220&view=rev Log: Use elf Object File directly Modified: llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp Modified: llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp?rev=78220&r1=78219&r2=78220&view=diff ============================================================================== --- llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp (original) +++ llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp Wed Aug 5 13:13:04 2009 @@ -31,23 +31,6 @@ #include "llvm/Support/raw_ostream.h" using namespace llvm; -namespace { -class TargetLoweringObjectFileAlpha : public TargetLoweringObjectFile { -public: - void Initialize(MCContext &Ctx, const TargetMachine &TM) { - TargetLoweringObjectFile::Initialize(Ctx, TM); - TextSection = getOrCreateSection(".text", true, - SectionKind::getText()); - DataSection = getOrCreateSection(".data", true, - SectionKind::getDataRel()); - ReadOnlySection = getOrCreateSection(".rodata", true, - SectionKind::getReadOnly()); - } -}; -} - - - /// AddLiveIn - This helper function adds the specified physical register to the /// MachineFunction as a live in value. It also creates a corresponding virtual /// register for it. @@ -60,7 +43,7 @@ } AlphaTargetLowering::AlphaTargetLowering(TargetMachine &TM) - : TargetLowering(TM, new TargetLoweringObjectFileAlpha()) { + : TargetLowering(TM, new TargetLoweringObjectFileELF()) { // Set up the TargetLowering object. //I am having problems with shr n i8 1 setShiftAmountType(MVT::i64); From resistor at mac.com Wed Aug 5 13:13:28 2009 From: resistor at mac.com (Owen Anderson) Date: Wed, 05 Aug 2009 18:13:28 -0000 Subject: [llvm-commits] [llvm] r78221 - in /llvm/trunk/lib/VMCore: LLVMContextImpl.h Type.cpp Message-ID: <200908051813.n75IDToD010678@zion.cs.uiuc.edu> Author: resistor Date: Wed Aug 5 13:13:27 2009 New Revision: 78221 URL: http://llvm.org/viewvc/llvm-project?rev=78221&view=rev Log: Privatize the FunctionType table. Modified: llvm/trunk/lib/VMCore/LLVMContextImpl.h llvm/trunk/lib/VMCore/Type.cpp Modified: llvm/trunk/lib/VMCore/LLVMContextImpl.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/LLVMContextImpl.h?rev=78221&r1=78220&r2=78221&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/LLVMContextImpl.h (original) +++ llvm/trunk/lib/VMCore/LLVMContextImpl.h Wed Aug 5 13:13:27 2009 @@ -131,6 +131,7 @@ TypeMap ArrayTypes; TypeMap VectorTypes; TypeMap PointerTypes; + TypeMap FunctionTypes; LLVMContextImpl() : TheTrueVal(0), TheFalseVal(0) { } }; Modified: llvm/trunk/lib/VMCore/Type.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Type.cpp?rev=78221&r1=78220&r2=78221&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Type.cpp (original) +++ llvm/trunk/lib/VMCore/Type.cpp Wed Aug 5 13:13:27 2009 @@ -748,9 +748,6 @@ return APInt::getAllOnesValue(getBitWidth()); } -// Define the actual map itself now... -static ManagedStatic > FunctionTypes; - FunctionValType FunctionValType::get(const FunctionType *FT) { // Build up a FunctionValType std::vector ParamTypes; @@ -768,14 +765,16 @@ FunctionValType VT(ReturnType, Params, isVarArg); FunctionType *FT = 0; + LLVMContextImpl *pImpl = ReturnType->getContext().pImpl; + sys::SmartScopedLock L(*TypeMapLock); - FT = FunctionTypes->get(VT); + FT = pImpl->FunctionTypes.get(VT); if (!FT) { FT = (FunctionType*) operator new(sizeof(FunctionType) + sizeof(PATypeHandle)*(Params.size()+1)); new (FT) FunctionType(ReturnType, Params, isVarArg); - FunctionTypes->add(VT, FT); + pImpl->FunctionTypes.add(VT, FT); } #ifdef DEBUG_MERGE_TYPES @@ -1101,11 +1100,13 @@ // void FunctionType::refineAbstractType(const DerivedType *OldType, const Type *NewType) { - FunctionTypes->RefineAbstractType(this, OldType, NewType); + LLVMContextImpl *pImpl = OldType->getContext().pImpl; + pImpl->FunctionTypes.RefineAbstractType(this, OldType, NewType); } void FunctionType::typeBecameConcrete(const DerivedType *AbsTy) { - FunctionTypes->TypeBecameConcrete(this, AbsTy); + LLVMContextImpl *pImpl = AbsTy->getContext().pImpl; + pImpl->FunctionTypes.TypeBecameConcrete(this, AbsTy); } From dalej at apple.com Wed Aug 5 13:59:53 2009 From: dalej at apple.com (Dale Johannesen) Date: Wed, 05 Aug 2009 18:59:53 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r78223 - /llvm-gcc-4.2/trunk/gcc/config/darwin-c.c Message-ID: <200908051900.n75J03g4012036@zion.cs.uiuc.edu> Author: johannes Date: Wed Aug 5 13:59:35 2009 New Revision: 78223 URL: http://llvm.org/viewvc/llvm-project?rev=78223&view=rev Log: Pad UTF-16 strings with two null bytes, not one. 7095855. (They're actually UTF-16LE, but comments say UTF-16 throughout.) Modified: llvm-gcc-4.2/trunk/gcc/config/darwin-c.c Modified: llvm-gcc-4.2/trunk/gcc/config/darwin-c.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/darwin-c.c?rev=78223&r1=78222&r2=78223&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/darwin-c.c (original) +++ llvm-gcc-4.2/trunk/gcc/config/darwin-c.c Wed Aug 5 13:59:35 2009 @@ -1209,8 +1209,9 @@ for (l = 0; l < *numUniChars; l++) initlist = tree_cons (NULL_TREE, build_int_cst (char_type_node, uniCharBuf[l]), initlist); + /* LLVM LOCAL utf16 has two trailing nulls 7095855 */ type = build_array_type (char_type_node, - build_index_type (build_int_cst (NULL_TREE, *numUniChars))); + build_index_type (build_int_cst (NULL_TREE, *numUniChars + 1))); name = (char *)alloca (strlen (name_prefix) + 10); sprintf (name, "%s%d", name_prefix, ++num); decl = build_decl (VAR_DECL, get_identifier (name), type); From asl at math.spbu.ru Wed Aug 5 14:04:46 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 05 Aug 2009 19:04:46 -0000 Subject: [llvm-commits] [llvm] r78225 - in /llvm/trunk: lib/Target/ARM/ARMCallingConv.td lib/Target/ARM/ARMISelLowering.cpp lib/Target/ARM/ARMISelLowering.h lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp test/CodeGen/ARM/hardfloat_neon.ll Message-ID: <200908051904.n75J4nps012363@zion.cs.uiuc.edu> Author: asl Date: Wed Aug 5 14:04:42 2009 New Revision: 78225 URL: http://llvm.org/viewvc/llvm-project?rev=78225&view=rev Log: Missed pieces for ARM HardFP ABI. Patch by Sandeep Patel! Added: llvm/trunk/test/CodeGen/ARM/hardfloat_neon.ll Modified: llvm/trunk/lib/Target/ARM/ARMCallingConv.td llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp llvm/trunk/lib/Target/ARM/ARMISelLowering.h llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp Modified: llvm/trunk/lib/Target/ARM/ARMCallingConv.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCallingConv.td?rev=78225&r1=78224&r2=78225&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMCallingConv.td (original) +++ llvm/trunk/lib/Target/ARM/ARMCallingConv.td Wed Aug 5 14:04:42 2009 @@ -111,6 +111,7 @@ CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType>, CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32], CCBitConvertToType>, + CCIfType<[v2f64], CCAssignToReg<[Q0, Q1, Q2, Q3]>>, CCIfType<[f64], CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>, CCIfType<[f32], CCAssignToReg<[S0, S1, S2, S3, S4, S5, S6, S7, S8, S9, S10, S11, S12, S13, S14, S15]>>, @@ -122,6 +123,7 @@ CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType>, CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32], CCBitConvertToType>, + CCIfType<[v2f64], CCAssignToReg<[Q0, Q1, Q2, Q3]>>, CCIfType<[f64], CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>, CCIfType<[f32], CCAssignToReg<[S0, S1, S2, S3, S4, S5, S6, S7, S8, S9, S10, S11, S12, S13, S14, S15]>>, Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=78225&r1=78224&r2=78225&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Wed Aug 5 14:04:42 2009 @@ -662,27 +662,28 @@ /// CCAssignFnForNode - Selects the correct CCAssignFn for a the /// given CallingConvention value. CCAssignFn *ARMTargetLowering::CCAssignFnForNode(unsigned CC, - bool Return) const { + bool Return, + bool isVarArg) const { switch (CC) { default: - llvm_unreachable("Unsupported calling convention"); + llvm_unreachable("Unsupported calling convention"); case CallingConv::C: case CallingConv::Fast: - // Use target triple & subtarget features to do actual dispatch. - if (Subtarget->isAAPCS_ABI()) { - if (Subtarget->hasVFP2() && - FloatABIType == FloatABI::Hard) - return (Return ? RetCC_ARM_AAPCS_VFP: CC_ARM_AAPCS_VFP); - else - return (Return ? RetCC_ARM_AAPCS: CC_ARM_AAPCS); - } else - return (Return ? RetCC_ARM_APCS: CC_ARM_APCS); + // Use target triple & subtarget features to do actual dispatch. + if (Subtarget->isAAPCS_ABI()) { + if (Subtarget->hasVFP2() && + FloatABIType == FloatABI::Hard && !isVarArg) + return (Return ? RetCC_ARM_AAPCS_VFP: CC_ARM_AAPCS_VFP); + else + return (Return ? RetCC_ARM_AAPCS: CC_ARM_AAPCS); + } else + return (Return ? RetCC_ARM_APCS: CC_ARM_APCS); case CallingConv::ARM_AAPCS_VFP: - return (Return ? RetCC_ARM_AAPCS_VFP: CC_ARM_AAPCS_VFP); + return (Return ? RetCC_ARM_AAPCS_VFP: CC_ARM_AAPCS_VFP); case CallingConv::ARM_AAPCS: - return (Return ? RetCC_ARM_AAPCS: CC_ARM_AAPCS); + return (Return ? RetCC_ARM_AAPCS: CC_ARM_AAPCS); case CallingConv::ARM_APCS: - return (Return ? RetCC_ARM_APCS: CC_ARM_APCS); + return (Return ? RetCC_ARM_APCS: CC_ARM_APCS); } } @@ -700,7 +701,8 @@ CCState CCInfo(CallConv, isVarArg, getTargetMachine(), RVLocs, *DAG.getContext()); CCInfo.AnalyzeCallResult(Ins, - CCAssignFnForNode(CallConv, /* Return*/ true)); + CCAssignFnForNode(CallConv, /* Return*/ true, + isVarArg)); // Copy all of the result registers out of their specified physreg. for (unsigned i = 0; i != RVLocs.size(); ++i) { @@ -832,7 +834,8 @@ CCState CCInfo(CallConv, isVarArg, getTargetMachine(), ArgLocs, *DAG.getContext()); CCInfo.AnalyzeCallOperands(Outs, - CCAssignFnForNode(CallConv, /* Return*/ false)); + CCAssignFnForNode(CallConv, /* Return*/ false, + isVarArg)); // Get a count of how many bytes are to be pushed on the stack. unsigned NumBytes = CCInfo.getNextStackOffset(); @@ -873,7 +876,7 @@ break; } - // f64 and v2f64 are passed in i32 pairs and must be split into pieces + // f64 and v2f64 might be passed in i32 pairs and must be split into pieces if (VA.needsCustom()) { if (VA.getLocVT() == MVT::v2f64) { SDValue Op0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, @@ -1034,7 +1037,8 @@ *DAG.getContext()); // Analyze outgoing return values. - CCInfo.AnalyzeReturn(Outs, CCAssignFnForNode(CallConv, /* Return */ true)); + CCInfo.AnalyzeReturn(Outs, CCAssignFnForNode(CallConv, /* Return */ true, + isVarArg)); // If this is the first return lowered for this function, add // the regs to the liveout set for the function. @@ -1422,7 +1426,8 @@ CCState CCInfo(CallConv, isVarArg, getTargetMachine(), ArgLocs, *DAG.getContext()); CCInfo.AnalyzeFormalArguments(Ins, - CCAssignFnForNode(CallConv, /* Return*/ false)); + CCAssignFnForNode(CallConv, /* Return*/ false, + isVarArg)); SmallVector ArgValues; @@ -1455,18 +1460,23 @@ } else { TargetRegisterClass *RC; - if (FloatABIType == FloatABI::Hard && RegVT == MVT::f32) + bool IsHardFloatCC = (CallConv == CallingConv::ARM_AAPCS_VFP); + + if (IsHardFloatCC && RegVT == MVT::f32) RC = ARM::SPRRegisterClass; - else if (FloatABIType == FloatABI::Hard && RegVT == MVT::f64) + else if (IsHardFloatCC && RegVT == MVT::f64) RC = ARM::DPRRegisterClass; + else if (IsHardFloatCC && RegVT == MVT::v2f64) + RC = ARM::QPRRegisterClass; else if (AFI->isThumb1OnlyFunction()) RC = ARM::tGPRRegisterClass; else RC = ARM::GPRRegisterClass; assert((RegVT == MVT::i32 || RegVT == MVT::f32 || - (FloatABIType == FloatABI::Hard && RegVT == MVT::f64)) && - "RegVT not supported by formal arguments Lowering"); + (IsHardFloatCC && + ((RegVT == MVT::f64) || (RegVT == MVT::v2f64)))) && + "RegVT not supported by FORMAL_ARGUMENTS Lowering"); // Transform the arguments in physical registers into virtual ones. unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC); Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.h?rev=78225&r1=78224&r2=78225&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelLowering.h (original) +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.h Wed Aug 5 14:04:42 2009 @@ -235,7 +235,7 @@ SDValue GetF64FormalArgument(CCValAssign &VA, CCValAssign &NextVA, SDValue &Root, SelectionDAG &DAG, DebugLoc dl); - CCAssignFn *CCAssignFnForNode(unsigned CC, bool Return) const; + CCAssignFn *CCAssignFnForNode(unsigned CC, bool Return, bool isVarArg) const; SDValue LowerMemOpCallTo(SDValue Chain, SDValue StackPtr, SDValue Arg, DebugLoc dl, SelectionDAG &DAG, const CCValAssign &VA, Modified: llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp?rev=78225&r1=78224&r2=78225&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp Wed Aug 5 14:04:42 2009 @@ -1108,6 +1108,11 @@ O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_align8_needed << ", 1\n" << "\t.eabi_attribute " << ARMBuildAttrs::ABI_align8_preserved << ", 1\n"; + // Hard float. Use both S and D registers and conform to AAPCS-VFP. + if (Subtarget->isAAPCS_ABI() && FloatABIType == FloatABI::Hard) + O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_HardFP_use << ", 3\n" + << "\t.eabi_attribute " << ARMBuildAttrs::ABI_VFP_args << ", 1\n"; + // FIXME: Should we signal R9 usage? } Added: llvm/trunk/test/CodeGen/ARM/hardfloat_neon.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/hardfloat_neon.ll?rev=78225&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/hardfloat_neon.ll (added) +++ llvm/trunk/test/CodeGen/ARM/hardfloat_neon.ll Wed Aug 5 14:04:42 2009 @@ -0,0 +1,13 @@ +; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi -mattr=+neon -float-abi=hard + +define <16 x i8> @vmulQi8_reg(<16 x i8> %A, <16 x i8> %B) nounwind { + %tmp1 = mul <16 x i8> %A, %B + ret <16 x i8> %tmp1 +} + +define <16 x i8> @f(<16 x i8> %a, <16 x i8> %b) { + %tmp = call <16 x i8> @g(<16 x i8> %b) + ret <16 x i8> %tmp +} + +declare <16 x i8> @g(<16 x i8>) From eocallaghan at auroraux.org Wed Aug 5 14:06:54 2009 From: eocallaghan at auroraux.org (Edward O'Callaghan) Date: Wed, 05 Aug 2009 19:06:54 -0000 Subject: [llvm-commits] [compiler-rt] r78226 - in /compiler-rt/trunk/lib: addvti3.c ctzti2.c endianness.h fixsfti.c fixunsxfsi.c floatuntidf.c floatuntisf.c int_lib.h mulvsi3.c mulvti3.c mulxc3.c popcountdi2.c powitf2.c powixf2.c ucmpti2.c umodti3.c Message-ID: <200908051907.n75J743i012572@zion.cs.uiuc.edu> Author: evocallaghan Date: Wed Aug 5 14:06:50 2009 New Revision: 78226 URL: http://llvm.org/viewvc/llvm-project?rev=78226&view=rev Log: Next batch of C++ to C comment style changes. Also improve and factor out endianness pre-processor code. Added: compiler-rt/trunk/lib/endianness.h Modified: compiler-rt/trunk/lib/addvti3.c compiler-rt/trunk/lib/ctzti2.c compiler-rt/trunk/lib/fixsfti.c compiler-rt/trunk/lib/fixunsxfsi.c compiler-rt/trunk/lib/floatuntidf.c compiler-rt/trunk/lib/floatuntisf.c compiler-rt/trunk/lib/int_lib.h compiler-rt/trunk/lib/mulvsi3.c compiler-rt/trunk/lib/mulvti3.c compiler-rt/trunk/lib/mulxc3.c compiler-rt/trunk/lib/popcountdi2.c compiler-rt/trunk/lib/powitf2.c compiler-rt/trunk/lib/powixf2.c compiler-rt/trunk/lib/ucmpti2.c compiler-rt/trunk/lib/umodti3.c Modified: compiler-rt/trunk/lib/addvti3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/addvti3.c?rev=78226&r1=78225&r2=78226&view=diff ============================================================================== --- compiler-rt/trunk/lib/addvti3.c (original) +++ compiler-rt/trunk/lib/addvti3.c Wed Aug 5 14:06:50 2009 @@ -1,24 +1,25 @@ -//===-- addvti3.c - Implement __addvti3 -----------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __addvti3 for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- addvti3.c - Implement __addvti3 -----------------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __addvti3 for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #if __x86_64 #include "int_lib.h" #include -// Returns: a + b +/* Returns: a + b */ -// Effects: aborts if a + b overflows +/* Effects: aborts if a + b overflows */ ti_int __addvti3(ti_int a, ti_int b) Modified: compiler-rt/trunk/lib/ctzti2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/ctzti2.c?rev=78226&r1=78225&r2=78226&view=diff ============================================================================== --- compiler-rt/trunk/lib/ctzti2.c (original) +++ compiler-rt/trunk/lib/ctzti2.c Wed Aug 5 14:06:50 2009 @@ -1,23 +1,24 @@ -//===-- ctzti2.c - Implement __ctzti2 -------------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __ctzti2 for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- ctzti2.c - Implement __ctzti2 -------------------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __ctzti2 for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #if __x86_64 #include "int_lib.h" -// Returns: the number of trailing 0-bits +/* Returns: the number of trailing 0-bits */ -// Precondition: a != 0 +/* Precondition: a != 0 */ si_int __ctzti2(ti_int a) Added: compiler-rt/trunk/lib/endianness.h URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/endianness.h?rev=78226&view=auto ============================================================================== --- compiler-rt/trunk/lib/endianness.h (added) +++ compiler-rt/trunk/lib/endianness.h Wed Aug 5 14:06:50 2009 @@ -0,0 +1,65 @@ +/* ===-- endianness.h - configuration header for libgcc replacement --------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file is a configuration header for libgcc replacement. + * This file is not part of the interface of this library. + * + * ===----------------------------------------------------------------------=== + */ + +#ifndef ENDIANNESS_H +#define ENDIANNESS_H + +/* TODO: Improve this to minimal pre-processor hackish'ness. */ +/* config.h build via CMake. */ +/* #include */ +/* Solaris header for endian and byte swap */ +/* #if defined HAVE_SYS_BYTEORDER_H */ + +#if defined (__SVR4) && defined (__sun) +#include +#if _BYTE_ORDER == _BIG_ENDIAN +#define __BIG_ENDIAN__ 1 +#define __LITTLE_ENDIAN__ 0 +#else /* _BYTE_ORDER == _LITTLE_ENDIAN */ +#define __BIG_ENDIAN__ 0 +#define __LITTLE_ENDIAN__ 1 +#endif /* _BYTE_ORDER */ +#endif /* Solaris and AuroraUX. */ + +#if defined (__FreeBSD__) +#include +#if _BYTE_ORDER == _BIG_ENDIAN +#define __BIG_ENDIAN__ 1 +#define __LITTLE_ENDIAN__ 0 +#else /* _BYTE_ORDER == _LITTLE_ENDIAN */ +#define __BIG_ENDIAN__ 0 +#define __LITTLE_ENDIAN__ 1 +#endif /* _BYTE_ORDER */ +#endif /* FreeBSD */ + +#ifdef __LITTLE_ENDIAN__ +#if __LITTLE_ENDIAN__ +#define _YUGA_LITTLE_ENDIAN 1 +#define _YUGA_BIG_ENDIAN 0 +#endif +#endif + +#ifdef __BIG_ENDIAN__ +#if __BIG_ENDIAN__ +#define _YUGA_LITTLE_ENDIAN 0 +#define _YUGA_BIG_ENDIAN 1 +#endif +#endif + +#if !defined(_YUGA_LITTLE_ENDIAN) || !defined(_YUGA_BIG_ENDIAN) +#error unable to determine endian +#endif + +#endif /* ENDIANNESS_H */ Modified: compiler-rt/trunk/lib/fixsfti.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/fixsfti.c?rev=78226&r1=78225&r2=78226&view=diff ============================================================================== --- compiler-rt/trunk/lib/fixsfti.c (original) +++ compiler-rt/trunk/lib/fixsfti.c Wed Aug 5 14:06:50 2009 @@ -1,27 +1,29 @@ -//===-- fixsfti.c - Implement __fixsfti -----------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __fixsfti for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- fixsfti.c - Implement __fixsfti -----------------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __fixsfti for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #if __x86_64 #include "int_lib.h" -// Returns: convert a to a signed long long, rounding toward zero. +/* Returns: convert a to a signed long long, rounding toward zero. */ -// Assumption: float is a IEEE 32 bit floating point type -// su_int is a 32 bit integral type -// value in float is representable in ti_int (no range checking performed) +/* Assumption: float is a IEEE 32 bit floating point type + * su_int is a 32 bit integral type + * value in float is representable in ti_int (no range checking performed) + */ -// seee eeee emmm mmmm mmmm mmmm mmmm mmmm +/* seee eeee emmm mmmm mmmm mmmm mmmm mmmm */ ti_int __fixsfti(float a) Modified: compiler-rt/trunk/lib/fixunsxfsi.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/fixunsxfsi.c?rev=78226&r1=78225&r2=78226&view=diff ============================================================================== --- compiler-rt/trunk/lib/fixunsxfsi.c (original) +++ compiler-rt/trunk/lib/fixunsxfsi.c Wed Aug 5 14:06:50 2009 @@ -1,30 +1,34 @@ -//===-- fixunsxfsi.c - Implement __fixunsxfsi -----------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __fixunsxfsi for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- fixunsxfsi.c - Implement __fixunsxfsi -----------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __fixunsxfsi for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #if !_ARCH_PPC #include "int_lib.h" -// Returns: convert a to a unsigned int, rounding toward zero. -// Negative values all become zero. - -// Assumption: long double is an intel 80 bit floating point type padded with 6 bytes -// su_int is a 32 bit integral type -// value in long double is representable in su_int or is negative -// (no range checking performed) - -// gggg gggg gggg gggg gggg gggg gggg gggg | gggg gggg gggg gggg seee eeee eeee eeee | -// 1mmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm +/* Returns: convert a to a unsigned int, rounding toward zero. + * Negative values all become zero. + */ + +/* Assumption: long double is an intel 80 bit floating point type padded with 6 bytes + * su_int is a 32 bit integral type + * value in long double is representable in su_int or is negative + * (no range checking performed) + */ + +/* gggg gggg gggg gggg gggg gggg gggg gggg | gggg gggg gggg gggg seee eeee eeee eeee | + * 1mmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm + */ su_int __fixunsxfsi(long double a) Modified: compiler-rt/trunk/lib/floatuntidf.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/floatuntidf.c?rev=78226&r1=78225&r2=78226&view=diff ============================================================================== --- compiler-rt/trunk/lib/floatuntidf.c (original) +++ compiler-rt/trunk/lib/floatuntidf.c Wed Aug 5 14:06:50 2009 @@ -1,27 +1,29 @@ -//===-- floatuntidf.c - Implement __floatuntidf ---------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __floatuntidf for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- floatuntidf.c - Implement __floatuntidf ---------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __floatuntidf for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #if __x86_64 #include "int_lib.h" #include -// Returns: convert a to a double, rounding toward even. +/* Returns: convert a to a double, rounding toward even. */ -// Assumption: double is a IEEE 64 bit floating point type -// tu_int is a 128 bit integral type +/* Assumption: double is a IEEE 64 bit floating point type + * tu_int is a 128 bit integral type + */ -// seee eeee eeee mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm +/* seee eeee eeee mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm */ si_int __clzti2(ti_int a); @@ -31,17 +33,18 @@ if (a == 0) return 0.0; const unsigned N = sizeof(tu_int) * CHAR_BIT; - int sd = N - __clzti2(a); // number of significant digits - int e = sd - 1; // exponent + int sd = N - __clzti2(a); /* number of significant digits */ + int e = sd - 1; /* exponent */ if (sd > DBL_MANT_DIG) { - // start: 0000000000000000000001xxxxxxxxxxxxxxxxxxxxxxPQxxxxxxxxxxxxxxxxxx - // finish: 000000000000000000000000000000000000001xxxxxxxxxxxxxxxxxxxxxxPQR - // 12345678901234567890123456 - // 1 = msb 1 bit - // P = bit DBL_MANT_DIG-1 bits to the right of 1 - // Q = bit DBL_MANT_DIG bits to the right of 1 - // R = "or" of all bits to the right of Q + /* start: 0000000000000000000001xxxxxxxxxxxxxxxxxxxxxxPQxxxxxxxxxxxxxxxxxx + * finish: 000000000000000000000000000000000000001xxxxxxxxxxxxxxxxxxxxxxPQR + * 12345678901234567890123456 + * 1 = msb 1 bit + * P = bit DBL_MANT_DIG-1 bits to the right of 1 + * Q = bit DBL_MANT_DIG bits to the right of 1 + * R = "or" of all bits to the right of Q + */ switch (sd) { case DBL_MANT_DIG + 1: @@ -53,27 +56,27 @@ a = (a >> (sd - (DBL_MANT_DIG+2))) | ((a & ((tu_int)(-1) >> ((N + DBL_MANT_DIG+2) - sd))) != 0); }; - // finish: - a |= (a & 4) != 0; // Or P into R - ++a; // round - this step may add a significant bit - a >>= 2; // dump Q and R - // a is now rounded to DBL_MANT_DIG or DBL_MANT_DIG+1 bits + /* finish: */ + a |= (a & 4) != 0; /* Or P into R */ + ++a; /* round - this step may add a significant bit */ + a >>= 2; /* dump Q and R */ + /* a is now rounded to DBL_MANT_DIG or DBL_MANT_DIG+1 bits */ if (a & ((tu_int)1 << DBL_MANT_DIG)) { a >>= 1; ++e; } - // a is now rounded to DBL_MANT_DIG bits + /* a is now rounded to DBL_MANT_DIG bits */ } else { a <<= (DBL_MANT_DIG - sd); - // a is now rounded to DBL_MANT_DIG bits + /* a is now rounded to DBL_MANT_DIG bits */ } double_bits fb; - fb.u.high = ((e + 1023) << 20) | // exponent - ((su_int)(a >> 32) & 0x000FFFFF); // mantissa-high - fb.u.low = (su_int)a; // mantissa-low + fb.u.high = ((e + 1023) << 20) | /* exponent */ + ((su_int)(a >> 32) & 0x000FFFFF); /* mantissa-high */ + fb.u.low = (su_int)a; /* mantissa-low */ return fb.f; } Modified: compiler-rt/trunk/lib/floatuntisf.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/floatuntisf.c?rev=78226&r1=78225&r2=78226&view=diff ============================================================================== --- compiler-rt/trunk/lib/floatuntisf.c (original) +++ compiler-rt/trunk/lib/floatuntisf.c Wed Aug 5 14:06:50 2009 @@ -1,27 +1,29 @@ -//===-- floatuntisf.c - Implement __floatuntisf ---------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __floatuntisf for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- floatuntisf.c - Implement __floatuntisf ---------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __floatuntisf for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #if __x86_64 #include "int_lib.h" #include -// Returns: convert a to a float, rounding toward even. +/* Returns: convert a to a float, rounding toward even. */ -// Assumption: float is a IEEE 32 bit floating point type -// tu_int is a 128 bit integral type +/* Assumption: float is a IEEE 32 bit floating point type + * tu_int is a 128 bit integral type + */ -// seee eeee emmm mmmm mmmm mmmm mmmm mmmm +/* seee eeee emmm mmmm mmmm mmmm mmmm mmmm */ si_int __clzti2(ti_int a); @@ -31,17 +33,18 @@ if (a == 0) return 0.0F; const unsigned N = sizeof(tu_int) * CHAR_BIT; - int sd = N - __clzti2(a); // number of significant digits - int e = sd - 1; // exponent + int sd = N - __clzti2(a); /* number of significant digits */ + int e = sd - 1; /* exponent */ if (sd > FLT_MANT_DIG) { - // start: 0000000000000000000001xxxxxxxxxxxxxxxxxxxxxxPQxxxxxxxxxxxxxxxxxx - // finish: 000000000000000000000000000000000000001xxxxxxxxxxxxxxxxxxxxxxPQR - // 12345678901234567890123456 - // 1 = msb 1 bit - // P = bit FLT_MANT_DIG-1 bits to the right of 1 - // Q = bit FLT_MANT_DIG bits to the right of 1 - // R = "or" of all bits to the right of Q + /* start: 0000000000000000000001xxxxxxxxxxxxxxxxxxxxxxPQxxxxxxxxxxxxxxxxxx + * finish: 000000000000000000000000000000000000001xxxxxxxxxxxxxxxxxxxxxxPQR + * 12345678901234567890123456 + * 1 = msb 1 bit + * P = bit FLT_MANT_DIG-1 bits to the right of 1 + * Q = bit FLT_MANT_DIG bits to the right of 1 + * R = "or" of all bits to the right of Q + */ switch (sd) { case FLT_MANT_DIG + 1: @@ -53,26 +56,26 @@ a = (a >> (sd - (FLT_MANT_DIG+2))) | ((a & ((tu_int)(-1) >> ((N + FLT_MANT_DIG+2) - sd))) != 0); }; - // finish: - a |= (a & 4) != 0; // Or P into R - ++a; // round - this step may add a significant bit - a >>= 2; // dump Q and R - // a is now rounded to FLT_MANT_DIG or FLT_MANT_DIG+1 bits + /* finish: */ + a |= (a & 4) != 0; /* Or P into R */ + ++a; /* round - this step may add a significant bit */ + a >>= 2; /* dump Q and R */ + /* a is now rounded to FLT_MANT_DIG or FLT_MANT_DIG+1 bits */ if (a & ((tu_int)1 << FLT_MANT_DIG)) { a >>= 1; ++e; } - // a is now rounded to FLT_MANT_DIG bits + /* a is now rounded to FLT_MANT_DIG bits */ } else { a <<= (FLT_MANT_DIG - sd); - // a is now rounded to FLT_MANT_DIG bits + /* a is now rounded to FLT_MANT_DIG bits */ } float_bits fb; - fb.u = ((e + 127) << 23) | // exponent - ((su_int)a & 0x007FFFFF); // mantissa + fb.u = ((e + 127) << 23) | /* exponent */ + ((su_int)a & 0x007FFFFF); /* mantissa */ return fb.f; } Modified: compiler-rt/trunk/lib/int_lib.h URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/int_lib.h?rev=78226&r1=78225&r2=78226&view=diff ============================================================================== --- compiler-rt/trunk/lib/int_lib.h (original) +++ compiler-rt/trunk/lib/int_lib.h Wed Aug 5 14:06:50 2009 @@ -20,58 +20,13 @@ /* Assumption: right shift of signed negative is arithmetic shift */ #include +#include "endianness.h" #include #if !defined(INFINITY) && defined(HUGE_VAL) #define INFINITY HUGE_VAL #endif -/* TODO: Improve this to minimal pre-processor hackish'ness. */ -#if defined (__SVR4) && defined (__sun) -/* config.h build via CMake. */ -/* #include */ - -/* Solaris header for endian and byte swap */ -/* #if defined HAVE_SYS_BYTEORDER_H */ -#include - -/* Solaris defines endian by setting _LITTLE_ENDIAN or _BIG_ENDIAN */ -#ifdef _BIG_ENDIAN -# define IS_BIG_ENDIAN -#endif -#ifdef _LITTLE_ENDIAN -# define IS_LITTLE_ENDIAN -#endif - -#ifdef IS_BIG_ENDIAN -#define __BIG_ENDIAN__ 1 -#define __LITTLE_ENDIAN__ 0 -#endif -#ifdef IS_LITTLE_ENDIAN -#define __BIG_ENDIAN__ 0 -#define __LITTLE_ENDIAN__ 1 -#endif - -#endif /* End of Solaris ifdef. */ - -#ifdef __LITTLE_ENDIAN__ -#if __LITTLE_ENDIAN__ -#define _YUGA_LITTLE_ENDIAN 1 -#define _YUGA_BIG_ENDIAN 0 -#endif -#endif - -#ifdef __BIG_ENDIAN__ -#if __BIG_ENDIAN__ -#define _YUGA_LITTLE_ENDIAN 0 -#define _YUGA_BIG_ENDIAN 1 -#endif -#endif - -#if !defined(_YUGA_LITTLE_ENDIAN) || !defined(_YUGA_BIG_ENDIAN) -#error unable to determine endian -#endif - typedef int si_int; typedef unsigned su_int; Modified: compiler-rt/trunk/lib/mulvsi3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/mulvsi3.c?rev=78226&r1=78225&r2=78226&view=diff ============================================================================== --- compiler-rt/trunk/lib/mulvsi3.c (original) +++ compiler-rt/trunk/lib/mulvsi3.c Wed Aug 5 14:06:50 2009 @@ -1,22 +1,23 @@ -//===-- mulvsi3.c - Implement __mulvsi3 -----------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __mulvsi3 for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- mulvsi3.c - Implement __mulvsi3 -----------------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __mulvsi3 for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #include "int_lib.h" #include -// Returns: a * b +/* Returns: a * b */ -// Effects: aborts if a * b overflows +/* Effects: aborts if a * b overflows */ si_int __mulvsi3(si_int a, si_int b) Modified: compiler-rt/trunk/lib/mulvti3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/mulvti3.c?rev=78226&r1=78225&r2=78226&view=diff ============================================================================== --- compiler-rt/trunk/lib/mulvti3.c (original) +++ compiler-rt/trunk/lib/mulvti3.c Wed Aug 5 14:06:50 2009 @@ -1,24 +1,25 @@ -//===-- mulvti3.c - Implement __mulvti3 -----------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __mulvti3 for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- mulvti3.c - Implement __mulvti3 -----------------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __mulvti3 for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #if __x86_64 #include "int_lib.h" #include -// Returns: a * b +/* Returns: a * b */ -// Effects: aborts if a * b overflows +/* Effects: aborts if a * b overflows */ ti_int __mulvti3(ti_int a, ti_int b) Modified: compiler-rt/trunk/lib/mulxc3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/mulxc3.c?rev=78226&r1=78225&r2=78226&view=diff ============================================================================== --- compiler-rt/trunk/lib/mulxc3.c (original) +++ compiler-rt/trunk/lib/mulxc3.c Wed Aug 5 14:06:50 2009 @@ -1,15 +1,16 @@ -//===-- mulxc3.c - Implement __mulxc3 -------------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __mulxc3 for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- mulxc3.c - Implement __mulxc3 -------------------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __mulxc3 for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #if !_ARCH_PPC @@ -17,7 +18,7 @@ #include #include -// Returns: the product of a + ib and c + id +/* Returns: the product of a + ib and c + id */ long double _Complex __mulxc3(long double __a, long double __b, long double __c, long double __d) Modified: compiler-rt/trunk/lib/popcountdi2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/popcountdi2.c?rev=78226&r1=78225&r2=78226&view=diff ============================================================================== --- compiler-rt/trunk/lib/popcountdi2.c (original) +++ compiler-rt/trunk/lib/popcountdi2.c Wed Aug 5 14:06:50 2009 @@ -1,35 +1,36 @@ -//===-- popcountdi2.c - Implement __popcountdi2 ----------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __popcountdi2 for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- popcountdi2.c - Implement __popcountdi2 ----------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __popcountdi2 for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #include "int_lib.h" -// Returns: count of 1 bits +/* Returns: count of 1 bits */ si_int __popcountdi2(di_int a) { du_int x2 = (du_int)a; x2 = x2 - ((x2 >> 1) & 0x5555555555555555uLL); - // Every 2 bits holds the sum of every pair of bits (32) + /* Every 2 bits holds the sum of every pair of bits (32) */ x2 = ((x2 >> 2) & 0x3333333333333333uLL) + (x2 & 0x3333333333333333uLL); - // Every 4 bits holds the sum of every 4-set of bits (3 significant bits) (16) + /* Every 4 bits holds the sum of every 4-set of bits (3 significant bits) (16) */ x2 = (x2 + (x2 >> 4)) & 0x0F0F0F0F0F0F0F0FuLL; - // Every 8 bits holds the sum of every 8-set of bits (4 significant bits) (8) + /* Every 8 bits holds the sum of every 8-set of bits (4 significant bits) (8) */ su_int x = (su_int)(x2 + (x2 >> 32)); - // The lower 32 bits hold four 16 bit sums (5 significant bits). - // Upper 32 bits are garbage + /* The lower 32 bits hold four 16 bit sums (5 significant bits). */ + /* Upper 32 bits are garbage */ x = x + (x >> 16); - // The lower 16 bits hold two 32 bit sums (6 significant bits). - // Upper 16 bits are garbage - return (x + (x >> 8)) & 0x0000007F; // (7 significant bits) + /* The lower 16 bits hold two 32 bit sums (6 significant bits). */ + /* Upper 16 bits are garbage */ + return (x + (x >> 8)) & 0x0000007F; /* (7 significant bits) */ } Modified: compiler-rt/trunk/lib/powitf2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/powitf2.c?rev=78226&r1=78225&r2=78226&view=diff ============================================================================== --- compiler-rt/trunk/lib/powitf2.c (original) +++ compiler-rt/trunk/lib/powitf2.c Wed Aug 5 14:06:50 2009 @@ -1,21 +1,22 @@ -//===-- powitf2.cpp - Implement __powitf2 ---------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __powitf2 for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- powitf2.cpp - Implement __powitf2 ---------------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __powitf2 for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #if _ARCH_PPC #include "int_lib.h" -// Returns: a ^ b +/* Returns: a ^ b */ long double __powitf2(long double a, si_int b) Modified: compiler-rt/trunk/lib/powixf2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/powixf2.c?rev=78226&r1=78225&r2=78226&view=diff ============================================================================== --- compiler-rt/trunk/lib/powixf2.c (original) +++ compiler-rt/trunk/lib/powixf2.c Wed Aug 5 14:06:50 2009 @@ -1,21 +1,22 @@ -//===-- powixf2.cpp - Implement __powixf2 ---------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __powixf2 for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- powixf2.cpp - Implement __powixf2 ---------------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __powixf2 for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #if !_ARCH_PPC #include "int_lib.h" -// Returns: a ^ b +/* Returns: a ^ b */ long double __powixf2(long double a, si_int b) Modified: compiler-rt/trunk/lib/ucmpti2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/ucmpti2.c?rev=78226&r1=78225&r2=78226&view=diff ============================================================================== --- compiler-rt/trunk/lib/ucmpti2.c (original) +++ compiler-rt/trunk/lib/ucmpti2.c Wed Aug 5 14:06:50 2009 @@ -1,23 +1,25 @@ -//===-- ucmpti2.c - Implement __ucmpti2 -----------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __ucmpti2 for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- ucmpti2.c - Implement __ucmpti2 -----------------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __ucmpti2 for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #if __x86_64 #include "int_lib.h" -// Returns: if (a < b) returns 0 -// if (a == b) returns 1 -// if (a > b) returns 2 +/* Returns: if (a < b) returns 0 + * if (a == b) returns 1 + * if (a > b) returns 2 + */ si_int __ucmpti2(tu_int a, tu_int b) Modified: compiler-rt/trunk/lib/umodti3.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/umodti3.c?rev=78226&r1=78225&r2=78226&view=diff ============================================================================== --- compiler-rt/trunk/lib/umodti3.c (original) +++ compiler-rt/trunk/lib/umodti3.c Wed Aug 5 14:06:50 2009 @@ -1,15 +1,16 @@ -//===-- umodti3.c - Implement __umodti3 -----------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __umodti3 for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- umodti3.c - Implement __umodti3 -----------------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __umodti3 for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #if __x86_64 @@ -17,7 +18,7 @@ tu_int __udivmodti4(tu_int a, tu_int b, tu_int* rem); -// Returns: a % b +/* Returns: a % b */ tu_int __umodti3(tu_int a, tu_int b) From dalej at apple.com Wed Aug 5 14:08:48 2009 From: dalej at apple.com (Dale Johannesen) Date: Wed, 05 Aug 2009 19:08:48 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r78227 - /llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-const-str-64bit-1.m Message-ID: <200908051908.n75J8m3j012648@zion.cs.uiuc.edu> Author: johannes Date: Wed Aug 5 14:08:41 2009 New Revision: 78227 URL: http://llvm.org/viewvc/llvm-project?rev=78227&view=rev Log: Adjust test for latest change in llvm output syntax. Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-const-str-64bit-1.m Modified: llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-const-str-64bit-1.m URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-const-str-64bit-1.m?rev=78227&r1=78226&r2=78227&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-const-str-64bit-1.m (original) +++ llvm-gcc-4.2/trunk/gcc/testsuite/objc.dg/objc2-const-str-64bit-1.m Wed Aug 5 14:08:41 2009 @@ -13,4 +13,4 @@ return (int)(long)@"foo"; } /* LLVM LOCAL accept llvm syntax */ -/* { dg-final { scan-assembler "(LC1|__unnamed_1_0):.*\n\t.quad\t_OBJC_CLASS_\\\$_NSConstantString" } } */ +/* { dg-final { scan-assembler "(LC1|__unnamed_1_0|___unnamed_1):.*\n\t.quad\t_OBJC_CLASS_\\\$_NSConstantString" } } */ From dalej at apple.com Wed Aug 5 14:10:43 2009 From: dalej at apple.com (Dale Johannesen) Date: Wed, 05 Aug 2009 19:10:43 -0000 Subject: [llvm-commits] [llvm] r78229 - /llvm/trunk/test/FrontendObjC/2009-08-05-utf16.m Message-ID: <200908051910.n75JAhOO012734@zion.cs.uiuc.edu> Author: johannes Date: Wed Aug 5 14:10:41 2009 New Revision: 78229 URL: http://llvm.org/viewvc/llvm-project?rev=78229&view=rev Log: Test for llvm-gcc checkin 78223. Added: llvm/trunk/test/FrontendObjC/2009-08-05-utf16.m Added: llvm/trunk/test/FrontendObjC/2009-08-05-utf16.m URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendObjC/2009-08-05-utf16.m?rev=78229&view=auto ============================================================================== --- llvm/trunk/test/FrontendObjC/2009-08-05-utf16.m (added) +++ llvm/trunk/test/FrontendObjC/2009-08-05-utf16.m Wed Aug 5 14:10:41 2009 @@ -0,0 +1,5 @@ +/* RUN: %llvmgcc -w -x objective-c -S %s -o - | grep {__utf16_string_1} | grep {12 x i8} + rdar://7095855 */ + +void *P = @"iPod???"; + From eli.friedman at gmail.com Wed Aug 5 14:38:38 2009 From: eli.friedman at gmail.com (Eli Friedman) Date: Wed, 5 Aug 2009 12:38:38 -0700 Subject: [llvm-commits] cross building fixes In-Reply-To: <305d6f60908050259l157641b6x8dcb87bf8a431536@mail.gmail.com> References: <305d6f60908050259l157641b6x8dcb87bf8a431536@mail.gmail.com> Message-ID: On Wed, Aug 5, 2009 at 2:59 AM, Sandeep Patel wrote: > The attached patches attempt to fix cross builds. For example, if you > try to use i686-darwin to build for arm-eabi, you'll quickly run into > several false assumptions that the target OS must be the same as the > host OS. These patches split $(OS) into $(HOST_OS) and $(TARGET_OS) to > help builds like "make check" and the test-suite able to cross > compile. Along the way a target of *-unknown-eabi is defined as > "Freestanding" so that TARGET_OS checks have something to work with. > > Also attached is a patch to add a definition for > __STDC_CONSTANT_MACROS so that llvm2cpp doesn't fail during make check > on a cross. The naming you're using is kind of confusing... from "configure --help" for LLVM: System types: --build=BUILD configure for building on BUILD [guessed] --host=HOST cross-compile to build programs to run on HOST [BUILD] --target=TARGET configure for building compilers for TARGET [HOST] -Eli From asl at math.spbu.ru Wed Aug 5 14:40:53 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 05 Aug 2009 19:40:53 -0000 Subject: [llvm-commits] [llvm] r78232 - /llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Message-ID: <200908051941.n75Jf0bb013686@zion.cs.uiuc.edu> Author: asl Date: Wed Aug 5 14:40:16 2009 New Revision: 78232 URL: http://llvm.org/viewvc/llvm-project?rev=78232&view=rev Log: Unbreak the stuff, this is ugly, but we cannot do better for now with 'plain' C calling conv. Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=78232&r1=78231&r2=78232&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Wed Aug 5 14:40:16 2009 @@ -1460,13 +1460,12 @@ } else { TargetRegisterClass *RC; - bool IsHardFloatCC = (CallConv == CallingConv::ARM_AAPCS_VFP); - if (IsHardFloatCC && RegVT == MVT::f32) + if (FloatABIType == FloatABI::Hard && RegVT == MVT::f32) RC = ARM::SPRRegisterClass; - else if (IsHardFloatCC && RegVT == MVT::f64) + else if (FloatABIType == FloatABI::Hard && RegVT == MVT::f64) RC = ARM::DPRRegisterClass; - else if (IsHardFloatCC && RegVT == MVT::v2f64) + else if (FloatABIType == FloatABI::Hard && RegVT == MVT::v2f64) RC = ARM::QPRRegisterClass; else if (AFI->isThumb1OnlyFunction()) RC = ARM::tGPRRegisterClass; @@ -1474,7 +1473,7 @@ RC = ARM::GPRRegisterClass; assert((RegVT == MVT::i32 || RegVT == MVT::f32 || - (IsHardFloatCC && + (FloatABIType == FloatABI::Hard && ((RegVT == MVT::f64) || (RegVT == MVT::v2f64)))) && "RegVT not supported by FORMAL_ARGUMENTS Lowering"); From aaronngray.lists at googlemail.com Wed Aug 5 14:50:13 2009 From: aaronngray.lists at googlemail.com (Aaron Gray) Date: Wed, 5 Aug 2009 20:50:13 +0100 Subject: [llvm-commits] [llvm] r78178 - in /llvm/trunk: lib/CodeGen/SimpleRegisterCoalescing.cpp test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll In-Reply-To: <4A79AF48.5030008@googlemail.com> References: <200908050705.n7575g9L008827@zion.cs.uiuc.edu> <36C7769C305046999537C4B0213A9FC0@HPLAPTOP> <4A79AF48.5030008@googlemail.com> Message-ID: <9719867c0908051250v20bac6b2sec04752fc9c48c49@mail.gmail.com> 2009/8/5 Benjamin Kramer : > Aaron Gray writes: >> Evan, >> >> Yeah, I just renamed the second UI to UI2 and followed the instances through >> and it compiles okay now. >> >> Aaron > > Fixed: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20090803/083663.html Thanks, Whats going on there C++ wise, thats a bit odd. Aaron From dag at cray.com Wed Aug 5 15:20:40 2009 From: dag at cray.com (David Greene) Date: Wed, 5 Aug 2009 15:20:40 -0500 Subject: [llvm-commits] [PATCH] Dump with LI Indices In-Reply-To: References: <200907301710.32176.dag@cray.com> <200908041655.22914.dag@cray.com> Message-ID: <200908051520.40233.dag@cray.com> On Tuesday 04 August 2009 23:07, Chris Lattner wrote: > The idea is that we shouldn't have to affect every instance of "dump > ()", just add a new DumpWithLiveIntervals() function, and call that > instead. There is no reason to have "magic" to make "dump()" itself > add extra info. I still don't understand how this is better. Wouldn't DumpWithLiveIntervals() have to duplicate all of the functionality of dump()? -Dave From clattner at apple.com Wed Aug 5 15:23:10 2009 From: clattner at apple.com (Chris Lattner) Date: Wed, 5 Aug 2009 13:23:10 -0700 Subject: [llvm-commits] [PATCH] Dump with LI Indices In-Reply-To: <200908051520.40233.dag@cray.com> References: <200907301710.32176.dag@cray.com> <200908041655.22914.dag@cray.com> <200908051520.40233.dag@cray.com> Message-ID: <6092D482-7D29-41A1-B122-D629ECB7AA6E@apple.com> On Aug 5, 2009, at 1:20 PM, David Greene wrote: > On Tuesday 04 August 2009 23:07, Chris Lattner wrote: > >> The idea is that we shouldn't have to affect every instance of "dump >> ()", just add a new DumpWithLiveIntervals() function, and call that >> instead. There is no reason to have "magic" to make "dump()" itself >> add extra info. > > I still don't understand how this is better. Wouldn't > DumpWithLiveIntervals() > have to duplicate all of the functionality of dump()? Yes. It is better because live-intervals specific code is specific to live intervals. The code to loop over the mbbs and instructions in an mbb is only a few lines. -Chris From dag at cray.com Wed Aug 5 16:32:33 2009 From: dag at cray.com (David Greene) Date: Wed, 5 Aug 2009 16:32:33 -0500 Subject: [llvm-commits] [PATCH] Dump with LI Indices In-Reply-To: <6092D482-7D29-41A1-B122-D629ECB7AA6E@apple.com> References: <200907301710.32176.dag@cray.com> <200908051520.40233.dag@cray.com> <6092D482-7D29-41A1-B122-D629ECB7AA6E@apple.com> Message-ID: <200908051632.33816.dag@cray.com> On Wednesday 05 August 2009 15:23, Chris Lattner wrote: > Yes. It is better because live-intervals specific code is specific to > live intervals. The code to loop over the mbbs and instructions in an > mbb is only a few lines. Uh, no it isn't: void MachineBasicBlock::print(raw_ostream &OS, const PrefixPrinter &prefix) const { const MachineFunction *MF = getParent(); if(!MF) { OS << "Can't print out MachineBasicBlock because parent MachineFunction" << " is null\n"; return; } const BasicBlock *LBB = getBasicBlock(); OS << "\n"; if (LBB) OS << LBB->getName() << ": "; OS << (const void*)this << ", LLVM BB @" << (const void*) LBB << ", ID#" << getNumber(); if (Alignment) OS << ", Alignment " << Alignment; if (isLandingPad()) OS << ", EH LANDING PAD"; OS << ":\n"; const TargetRegisterInfo *TRI = MF->getTarget().getRegisterInfo(); if (!livein_empty()) { OS << "Live Ins:"; for (const_livein_iterator I = livein_begin(),E = livein_end(); I != E; ++I) OutputReg(OS, *I, TRI); OS << "\n"; } // Print the preds of this block according to the CFG. if (!pred_empty()) { OS << " Predecessors according to CFG:"; for (const_pred_iterator PI = pred_begin(), E = pred_end(); PI != E; ++PI) OS << " " << *PI << " (#" << (*PI)->getNumber() << ")"; OS << "\n"; } for (const_iterator I = begin(); I != end(); ++I) { prefix(OS, *I) << "\t"; I->print(OS, &getParent()->getTarget()); } // Print the successors of this block according to the CFG. if (!succ_empty()) { OS << " Successors according to CFG:"; for (const_succ_iterator SI = succ_begin(), E = succ_end(); SI != E; ++SI) OS << " " << *SI << " (#" << (*SI)->getNumber() << ")"; OS << "\n"; } } You really want all this duplicated? -Dave From gohman at apple.com Wed Aug 5 15:24:10 2009 From: gohman at apple.com (Dan Gohman) Date: Wed, 05 Aug 2009 20:24:10 -0000 Subject: [llvm-commits] [llvm] r78241 - /llvm/trunk/unittests/ExecutionEngine/ Message-ID: <200908052024.n75KOBWK015272@zion.cs.uiuc.edu> Author: djg Date: Wed Aug 5 15:24:09 2009 New Revision: 78241 URL: http://llvm.org/viewvc/llvm-project?rev=78241&view=rev Log: Add an svn:ignore property. Modified: llvm/trunk/unittests/ExecutionEngine/ (props changed) Propchange: llvm/trunk/unittests/ExecutionEngine/ ------------------------------------------------------------------------------ --- svn:ignore (added) +++ svn:ignore Wed Aug 5 15:24:09 2009 @@ -0,0 +1,3 @@ +Debug +Release +Release-Asserts From dalej at apple.com Wed Aug 5 17:19:00 2009 From: dalej at apple.com (Dale Johannesen) Date: Wed, 05 Aug 2009 22:19:00 -0000 Subject: [llvm-commits] [llvm] r78251 - /llvm/trunk/test/FrontendObjC/2009-08-05-utf16.m Message-ID: <200908052219.n75MJ9OJ019018@zion.cs.uiuc.edu> Author: johannes Date: Wed Aug 5 17:18:47 2009 New Revision: 78251 URL: http://llvm.org/viewvc/llvm-project?rev=78251&view=rev Log: Adjust test for llvm-gcc checkin 78249. Modified: llvm/trunk/test/FrontendObjC/2009-08-05-utf16.m Modified: llvm/trunk/test/FrontendObjC/2009-08-05-utf16.m URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendObjC/2009-08-05-utf16.m?rev=78251&r1=78250&r2=78251&view=diff ============================================================================== --- llvm/trunk/test/FrontendObjC/2009-08-05-utf16.m (original) +++ llvm/trunk/test/FrontendObjC/2009-08-05-utf16.m Wed Aug 5 17:18:47 2009 @@ -1,5 +1,5 @@ -/* RUN: %llvmgcc -w -x objective-c -S %s -o - | grep {__utf16_string_1} | grep {12 x i8} - rdar://7095855 */ +/* RUN: %llvmgcc -w -x objective-c -S %s -o - | grep {__utf16_string_1} | grep {internal constant} | grep {12 x i8} + rdar://7095855 rdar://7115749 */ void *P = @"iPod???"; From gohman at apple.com Wed Aug 5 15:16:58 2009 From: gohman at apple.com (Dan Gohman) Date: Wed, 05 Aug 2009 20:16:58 -0000 Subject: [llvm-commits] [llvm] r78239 - /llvm/trunk/lib/System/Unix/Path.inc Message-ID: <200908052017.n75KH1S4014964@zion.cs.uiuc.edu> Author: djg Date: Wed Aug 5 15:16:55 2009 New Revision: 78239 URL: http://llvm.org/viewvc/llvm-project?rev=78239&view=rev Log: Minor code simplification. Modified: llvm/trunk/lib/System/Unix/Path.inc Modified: llvm/trunk/lib/System/Unix/Path.inc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Unix/Path.inc?rev=78239&r1=78238&r2=78239&view=diff ============================================================================== --- llvm/trunk/lib/System/Unix/Path.inc (original) +++ llvm/trunk/lib/System/Unix/Path.inc Wed Aug 5 15:16:55 2009 @@ -344,10 +344,8 @@ #elif defined(__linux__) || defined(__CYGWIN__) char exe_path[MAXPATHLEN]; ssize_t len = readlink("/proc/self/exe", exe_path, sizeof(exe_path)); - if (len > 0 && len < MAXPATHLEN - 1) { - exe_path[len] = '\0'; - return Path(std::string(exe_path)); - } + if (len >= 0) + return Path(std::string(exe_path, len)); #elif defined(HAVE_DLFCN_H) // Use dladdr to get executable path if available. Dl_info DLInfo; From daniel at zuster.org Wed Aug 5 16:43:29 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Wed, 05 Aug 2009 21:43:29 -0000 Subject: [llvm-commits] [llvm] r78246 - /llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp Message-ID: <200908052143.n75LhokF017956@zion.cs.uiuc.edu> Author: ddunbar Date: Wed Aug 5 16:42:40 2009 New Revision: 78246 URL: http://llvm.org/viewvc/llvm-project?rev=78246&view=rev Log: Suppress compiler warning. Modified: llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp Modified: llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp?rev=78246&r1=78245&r2=78246&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp Wed Aug 5 16:42:40 2009 @@ -728,7 +728,9 @@ << " if (Bits == 0) return false;\n" << " O << AsmStrs+(Bits & " << (1 << AsmStrBits)-1 << ");\n\n"; - O << " unsigned OperandColumn = 1;\n\n"; + // This variable may be unused, suppress build warnings. + O << " unsigned OperandColumn = 1;\n"; + O << " (void) OperandColumn;\n\n"; // Output the table driven operand information. BitsLeft = 32-AsmStrBits; From dalej at apple.com Wed Aug 5 17:14:36 2009 From: dalej at apple.com (Dale Johannesen) Date: Wed, 05 Aug 2009 22:14:36 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r78249 - /llvm-gcc-4.2/trunk/gcc/config/darwin-c.c Message-ID: <200908052214.n75MEmGj018875@zion.cs.uiuc.edu> Author: johannes Date: Wed Aug 5 17:13:47 2009 New Revision: 78249 URL: http://llvm.org/viewvc/llvm-project?rev=78249&view=rev Log: Mark decls created for UTF-16 strings as constant. Modified: llvm-gcc-4.2/trunk/gcc/config/darwin-c.c Modified: llvm-gcc-4.2/trunk/gcc/config/darwin-c.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/darwin-c.c?rev=78249&r1=78248&r2=78249&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/darwin-c.c (original) +++ llvm-gcc-4.2/trunk/gcc/config/darwin-c.c Wed Aug 5 17:13:47 2009 @@ -1220,6 +1220,10 @@ DECL_IGNORED_P (decl) = 1; DECL_ARTIFICIAL (decl) = 1; DECL_CONTEXT (decl) = NULL_TREE; + /* LLVM LOCAL begin 7115749 this object is constant. */ + TREE_CONSTANT (decl) = 1; + TREE_READONLY (decl) = 1; + /* LLVM LOCAL end */ attribute = tree_cons (NULL_TREE, build_string (len, section_name), NULL_TREE); attribute = tree_cons (get_identifier ("section"), attribute, NULL_TREE); From gohman at apple.com Wed Aug 5 15:14:27 2009 From: gohman at apple.com (Dan Gohman) Date: Wed, 05 Aug 2009 20:14:27 -0000 Subject: [llvm-commits] [llvm] r78236 - /llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Message-ID: <200908052014.n75KEn3p014864@zion.cs.uiuc.edu> Author: djg Date: Wed Aug 5 15:13:45 2009 New Revision: 78236 URL: http://llvm.org/viewvc/llvm-project?rev=78236&view=rev Log: hasSuperClass tests for a strict superset relation, rather than a superset relation. This code wants to test the regular superset relation. Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=78236&r1=78235&r2=78236&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Wed Aug 5 15:13:45 2009 @@ -1698,8 +1698,8 @@ else if (!DestRC->hasSubClass(SrcRC)) { // Neither of GR64_NOREX or GR64_NOSP is a superclass of the other, // but we want to copy then as GR64. - if (SrcRC->hasSuperClass(&X86::GR64RegClass) && - DestRC->hasSuperClass(&X86::GR64RegClass)) + if ((SrcRC == &X86::GR64RegClass || SrcRC->hasSuperClass(&X86::GR64RegClass)) && + (DestRC == &X86::GR64RegClass || DestRC->hasSuperClass(&X86::GR64RegClass))) CommonRC = &X86::GR64RegClass; else CommonRC = 0; From gohman at apple.com Wed Aug 5 17:19:00 2009 From: gohman at apple.com (Dan Gohman) Date: Wed, 05 Aug 2009 22:19:00 -0000 Subject: [llvm-commits] [llvm] r78250 - /llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Message-ID: <200908052219.n75MJ9M7019021@zion.cs.uiuc.edu> Author: djg Date: Wed Aug 5 17:18:26 2009 New Revision: 78250 URL: http://llvm.org/viewvc/llvm-project?rev=78250&view=rev Log: Use GR32 for copies between GR32_NOSP and GR32_NOREX, as neither is a subset of the other, but both are subsets of GR32. Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=78250&r1=78249&r2=78250&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Wed Aug 5 17:18:26 2009 @@ -1697,10 +1697,18 @@ CommonRC = SrcRC; else if (!DestRC->hasSubClass(SrcRC)) { // Neither of GR64_NOREX or GR64_NOSP is a superclass of the other, - // but we want to copy then as GR64. - if ((SrcRC == &X86::GR64RegClass || SrcRC->hasSuperClass(&X86::GR64RegClass)) && - (DestRC == &X86::GR64RegClass || DestRC->hasSuperClass(&X86::GR64RegClass))) + // but we want to copy then as GR64. Similarly, for GR32_NOREX and + // GR32_NOSP, copy as GR32. + if ((SrcRC == &X86::GR64RegClass || + SrcRC->hasSuperClass(&X86::GR64RegClass)) && + (DestRC == &X86::GR64RegClass || + DestRC->hasSuperClass(&X86::GR64RegClass))) CommonRC = &X86::GR64RegClass; + else if ((SrcRC == &X86::GR32RegClass || + SrcRC->hasSuperClass(&X86::GR32RegClass)) && + (DestRC == &X86::GR32RegClass || + DestRC->hasSuperClass(&X86::GR32RegClass))) + CommonRC = &X86::GR32RegClass; else CommonRC = 0; } From asl at math.spbu.ru Wed Aug 5 15:15:21 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 05 Aug 2009 20:15:21 -0000 Subject: [llvm-commits] [llvm] r78237 - /llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Message-ID: <200908052015.n75KFNGH014889@zion.cs.uiuc.edu> Author: asl Date: Wed Aug 5 15:15:19 2009 New Revision: 78237 URL: http://llvm.org/viewvc/llvm-project?rev=78237&view=rev Log: Remove redundand checks: the only way to have, e.g. f32 RegVT is exactly hardfloat case. Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=78237&r1=78236&r2=78237&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Wed Aug 5 15:15:19 2009 @@ -1461,21 +1461,17 @@ } else { TargetRegisterClass *RC; - if (FloatABIType == FloatABI::Hard && RegVT == MVT::f32) + if (RegVT == MVT::f32) RC = ARM::SPRRegisterClass; - else if (FloatABIType == FloatABI::Hard && RegVT == MVT::f64) + else if (RegVT == MVT::f64) RC = ARM::DPRRegisterClass; - else if (FloatABIType == FloatABI::Hard && RegVT == MVT::v2f64) + else if (RegVT == MVT::v2f64) RC = ARM::QPRRegisterClass; - else if (AFI->isThumb1OnlyFunction()) - RC = ARM::tGPRRegisterClass; + else if (RegVT == MVT::i32) + RC = (AFI->isThumb1OnlyFunction() ? + ARM::tGPRRegisterClass : ARM::GPRRegisterClass); else - RC = ARM::GPRRegisterClass; - - assert((RegVT == MVT::i32 || RegVT == MVT::f32 || - (FloatABIType == FloatABI::Hard && - ((RegVT == MVT::f64) || (RegVT == MVT::v2f64)))) && - "RegVT not supported by FORMAL_ARGUMENTS Lowering"); + llvm_unreachable("RegVT not supported by FORMAL_ARGUMENTS Lowering"); // Transform the arguments in physical registers into virtual ones. unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC); From eocallaghan at auroraux.org Wed Aug 5 14:58:46 2009 From: eocallaghan at auroraux.org (Edward O'Callaghan) Date: Wed, 05 Aug 2009 19:58:46 -0000 Subject: [llvm-commits] [compiler-rt] r78235 - /compiler-rt/trunk/test/Unit/endianness.h Message-ID: <200908051958.n75Jwl36014394@zion.cs.uiuc.edu> Author: evocallaghan Date: Wed Aug 5 14:58:45 2009 New Revision: 78235 URL: http://llvm.org/viewvc/llvm-project?rev=78235&view=rev Log: Forgot to add new endianness.h header file. Added: compiler-rt/trunk/test/Unit/endianness.h Added: compiler-rt/trunk/test/Unit/endianness.h URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/endianness.h?rev=78235&view=auto ============================================================================== --- compiler-rt/trunk/test/Unit/endianness.h (added) +++ compiler-rt/trunk/test/Unit/endianness.h Wed Aug 5 14:58:45 2009 @@ -0,0 +1,65 @@ +/* ===-- endianness.h - configuration header for libgcc replacement --------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file is a configuration header for libgcc replacement. + * This file is not part of the interface of this library. + * + * ===----------------------------------------------------------------------=== + */ + +#ifndef ENDIANNESS_H +#define ENDIANNESS_H + +/* TODO: Improve this to minimal pre-processor hackish'ness. */ +/* config.h build via CMake. */ +/* #include */ +/* Solaris header for endian and byte swap */ +/* #if defined HAVE_SYS_BYTEORDER_H */ + +#if defined (__SVR4) && defined (__sun) +#include +#if _BYTE_ORDER == _BIG_ENDIAN +#define __BIG_ENDIAN__ 1 +#define __LITTLE_ENDIAN__ 0 +#else /* _BYTE_ORDER == _LITTLE_ENDIAN */ +#define __BIG_ENDIAN__ 0 +#define __LITTLE_ENDIAN__ 1 +#endif /* _BYTE_ORDER */ +#endif /* Solaris and AuroraUX. */ + +#if defined (__FreeBSD__) +#include +#if _BYTE_ORDER == _BIG_ENDIAN +#define __BIG_ENDIAN__ 1 +#define __LITTLE_ENDIAN__ 0 +#else /* _BYTE_ORDER == _LITTLE_ENDIAN */ +#define __BIG_ENDIAN__ 0 +#define __LITTLE_ENDIAN__ 1 +#endif /* _BYTE_ORDER */ +#endif /* FreeBSD */ + +#ifdef __LITTLE_ENDIAN__ +#if __LITTLE_ENDIAN__ +#define _YUGA_LITTLE_ENDIAN 1 +#define _YUGA_BIG_ENDIAN 0 +#endif +#endif + +#ifdef __BIG_ENDIAN__ +#if __BIG_ENDIAN__ +#define _YUGA_LITTLE_ENDIAN 0 +#define _YUGA_BIG_ENDIAN 1 +#endif +#endif + +#if !defined(_YUGA_LITTLE_ENDIAN) || !defined(_YUGA_BIG_ENDIAN) +#error unable to determine endian +#endif + +#endif /* ENDIANNESS_H */ From gohman at apple.com Wed Aug 5 16:03:52 2009 From: gohman at apple.com (Dan Gohman) Date: Wed, 05 Aug 2009 21:03:52 -0000 Subject: [llvm-commits] [llvm] r78245 - in /llvm/trunk/tools: bugpoint/ToolRunner.cpp llvm-ld/llvm-ld.cpp Message-ID: <200908052103.n75L3v3j016814@zion.cs.uiuc.edu> Author: djg Date: Wed Aug 5 16:03:39 2009 New Revision: 78245 URL: http://llvm.org/viewvc/llvm-project?rev=78245&view=rev Log: Use (void *)(intptr_t) to cast function addresses to void* for use with sys::Path::GetMainExecutable, to avoid warnings with -pedantic. Modified: llvm/trunk/tools/bugpoint/ToolRunner.cpp llvm/trunk/tools/llvm-ld/llvm-ld.cpp Modified: llvm/trunk/tools/bugpoint/ToolRunner.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/ToolRunner.cpp?rev=78245&r1=78244&r2=78245&view=diff ============================================================================== --- llvm/trunk/tools/bugpoint/ToolRunner.cpp (original) +++ llvm/trunk/tools/bugpoint/ToolRunner.cpp Wed Aug 5 16:03:39 2009 @@ -232,8 +232,7 @@ std::string &Message, const std::vector *ToolArgs) { std::string LLIPath = - FindExecutable("lli", Argv0, - reinterpret_cast(&createLLI)).toString(); + FindExecutable("lli", Argv0, (void *)(intptr_t)&createLLI).toString(); if (!LLIPath.empty()) { Message = "Found lli: " + LLIPath + "\n"; return new LLI(LLIPath, ToolArgs); @@ -420,8 +419,7 @@ const std::vector *Args, const std::vector *GCCArgs) { std::string LLCPath = - FindExecutable("llc", Argv0, - reinterpret_cast(&createLLC)).toString(); + FindExecutable("llc", Argv0, (void *)(intptr_t)&createLLC).toString(); if (LLCPath.empty()) { Message = "Cannot find `llc' in executable directory or PATH!\n"; return 0; @@ -507,8 +505,7 @@ AbstractInterpreter *AbstractInterpreter::createJIT(const char *Argv0, std::string &Message, const std::vector *Args) { std::string LLIPath = - FindExecutable("lli", Argv0, - reinterpret_cast(&createJIT)).toString(); + FindExecutable("lli", Argv0, (void *)(intptr_t)&createJIT).toString(); if (!LLIPath.empty()) { Message = "Found lli: " + LLIPath + "\n"; return new JIT(LLIPath, Args); @@ -587,8 +584,7 @@ const std::vector *Args, const std::vector *GCCArgs) { sys::Path LLCPath = - FindExecutable("llc", Argv0, - reinterpret_cast(&createCBE)); + FindExecutable("llc", Argv0, (void *)(intptr_t)&createCBE); if (LLCPath.isEmpty()) { Message = "Cannot find `llc' in executable directory or PATH!\n"; Modified: llvm/trunk/tools/llvm-ld/llvm-ld.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-ld/llvm-ld.cpp?rev=78245&r1=78244&r2=78245&view=diff ============================================================================== --- llvm/trunk/tools/llvm-ld/llvm-ld.cpp (original) +++ llvm/trunk/tools/llvm-ld/llvm-ld.cpp Wed Aug 5 16:03:39 2009 @@ -415,7 +415,7 @@ // build tree to the destination file. std::string ErrMsg; sys::Path llvmstub = FindExecutable("llvm-stub.exe", argv[0], - reinterpret_cast(&Optimize)); + (void *)(intptr_t)&Optimize); if (llvmstub.isEmpty()) PrintAndExit("Could not find llvm-stub.exe executable!"); @@ -642,7 +642,7 @@ // Determine the locations of the llc and gcc programs. sys::Path llc = FindExecutable("llc", argv[0], - reinterpret_cast(&Optimize)); + (void *)(intptr_t)&Optimize); if (llc.isEmpty()) PrintAndExit("Failed to find llc"); @@ -672,7 +672,7 @@ // Determine the locations of the llc and gcc programs. sys::Path llc = FindExecutable("llc", argv[0], - reinterpret_cast(&Optimize)); + (void *)(intptr_t)&Optimize); if (llc.isEmpty()) PrintAndExit("Failed to find llc"); From sabre at nondot.org Wed Aug 5 15:50:13 2009 From: sabre at nondot.org (Chris Lattner) Date: Wed, 05 Aug 2009 20:50:13 -0000 Subject: [llvm-commits] [llvm] r78242 - in /llvm/trunk: include/llvm/Target/TargetAsmInfo.h lib/CodeGen/AsmPrinter/AsmPrinter.cpp lib/Target/TargetAsmInfo.cpp lib/Target/X86/X86TargetAsmInfo.cpp Message-ID: <200908052050.n75KoRWn016231@zion.cs.uiuc.edu> Author: lattner Date: Wed Aug 5 15:49:52 2009 New Revision: 78242 URL: http://llvm.org/viewvc/llvm-project?rev=78242&view=rev Log: remove the 'DataSectionStartSuffix' and 'TextSectionStartSuffix' knobs. Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp llvm/trunk/lib/Target/TargetAsmInfo.cpp llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetAsmInfo.h?rev=78242&r1=78241&r2=78242&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetAsmInfo.h (original) +++ llvm/trunk/include/llvm/Target/TargetAsmInfo.h Wed Aug 5 15:49:52 2009 @@ -190,14 +190,6 @@ /// this. const char *SwitchToSectionDirective; // Defaults to "\t.section\t" - /// TextSectionStartSuffix - This is printed after each start of section - /// directive for text sections. - const char *TextSectionStartSuffix; // Defaults to "". - - /// DataSectionStartSuffix - This is printed after each start of section - /// directive for data sections. - const char *DataSectionStartSuffix; // Defaults to "". - /// JumpTableDirective - if non-null, the directive to emit before a jump /// table. const char *JumpTableDirective; @@ -444,12 +436,6 @@ const char *getSwitchToSectionDirective() const { return SwitchToSectionDirective; } - const char *getTextSectionStartSuffix() const { - return TextSectionStartSuffix; - } - const char *getDataSectionStartSuffix() const { - return DataSectionStartSuffix; - } const char *getGlobalDirective() const { return GlobalDirective; } Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp?rev=78242&r1=78241&r2=78242&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp (original) +++ llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp Wed Aug 5 15:49:52 2009 @@ -92,21 +92,19 @@ CurrentSection = NS; - if (NS != 0) { - // If section is named we need to switch into it via special '.section' - // directive and also append funky flags. Otherwise - section name is just - // some magic assembler directive. - if (!NS->isDirective()) { - SmallString<32> FlagsStr; - - getObjFileLowering().getSectionFlagsAsString(NS->getKind(), FlagsStr); + if (NS == 0) return; + + // If section is named we need to switch into it via special '.section' + // directive and also append funky flags. Otherwise - section name is just + // some magic assembler directive. + if (!NS->isDirective()) { + SmallString<32> FlagsStr; + getObjFileLowering().getSectionFlagsAsString(NS->getKind(), FlagsStr); - O << TAI->getSwitchToSectionDirective() - << CurrentSection->getName() << FlagsStr.c_str(); - } else { - O << CurrentSection->getName(); - } - O << TAI->getDataSectionStartSuffix() << '\n'; + O << TAI->getSwitchToSectionDirective() + << CurrentSection->getName() << FlagsStr.c_str() << '\n'; + } else { + O << CurrentSection->getName() << '\n'; } } Modified: llvm/trunk/lib/Target/TargetAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetAsmInfo.cpp?rev=78242&r1=78241&r2=78242&view=diff ============================================================================== --- llvm/trunk/lib/Target/TargetAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/TargetAsmInfo.cpp Wed Aug 5 15:49:52 2009 @@ -55,8 +55,6 @@ AlignmentIsInBytes = true; TextAlignFillValue = 0; SwitchToSectionDirective = "\t.section\t"; - TextSectionStartSuffix = ""; - DataSectionStartSuffix = ""; JumpTableDirective = 0; GlobalDirective = "\t.globl\t"; SetDirective = 0; Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=78242&r1=78241&r2=78242&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Aug 5 15:49:52 2009 @@ -130,10 +130,6 @@ HasSingleParameterDotFile = false; AlignmentIsInBytes = true; - - SwitchToSectionDirective = ""; - TextSectionStartSuffix = "\tSEGMENT PARA 'CODE'"; - DataSectionStartSuffix = "\tSEGMENT PARA 'DATA'"; } // Instantiate default implementation. From daniel at zuster.org Wed Aug 5 16:51:48 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Wed, 05 Aug 2009 21:51:48 -0000 Subject: [llvm-commits] [llvm] r78247 - in /llvm/trunk: include/llvm/Analysis/ProfileInfo.h lib/Analysis/ProfileInfo.cpp lib/Analysis/ProfileInfoLoaderPass.cpp tools/llvm-prof/llvm-prof.cpp Message-ID: <200908052151.n75Lpu93018241@zion.cs.uiuc.edu> Author: ddunbar Date: Wed Aug 5 16:51:16 2009 New Revision: 78247 URL: http://llvm.org/viewvc/llvm-project?rev=78247&view=rev Log: Make block and function count available via ProfileInfo. - Part of optimal static profiling patch sequence by Andreas Neustifter. Modified: llvm/trunk/include/llvm/Analysis/ProfileInfo.h llvm/trunk/lib/Analysis/ProfileInfo.cpp llvm/trunk/lib/Analysis/ProfileInfoLoaderPass.cpp llvm/trunk/tools/llvm-prof/llvm-prof.cpp Modified: llvm/trunk/include/llvm/Analysis/ProfileInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ProfileInfo.h?rev=78247&r1=78246&r2=78247&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/ProfileInfo.h (original) +++ llvm/trunk/include/llvm/Analysis/ProfileInfo.h Wed Aug 5 16:51:16 2009 @@ -42,6 +42,12 @@ // BasicBlock to the entry block to indicate how many times the function was // entered. std::map EdgeCounts; + + // BlockCounts - Count the number of times a block is executed. + std::map BlockCounts; + + // FunctionCounts - Count the number of times a function is executed. + std::map FunctionCounts; public: static char ID; // Class identification, replacement for typeinfo virtual ~ProfileInfo(); // We want to be subclassed Modified: llvm/trunk/lib/Analysis/ProfileInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ProfileInfo.cpp?rev=78247&r1=78246&r2=78247&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ProfileInfo.cpp (original) +++ llvm/trunk/lib/Analysis/ProfileInfo.cpp Wed Aug 5 16:51:16 2009 @@ -27,6 +27,9 @@ ProfileInfo::~ProfileInfo() {} unsigned ProfileInfo::getExecutionCount(const BasicBlock *BB) const { + if (BlockCounts.find(BB) != BlockCounts.end()) + return BlockCounts.find(BB)->second; + pred_const_iterator PI = pred_begin(BB), PE = pred_end(BB); // Are there zero predecessors of this block? @@ -76,7 +79,9 @@ } unsigned ProfileInfo::getExecutionCount(const Function *F) const { - if (F->isDeclaration()) return -1; + if (FunctionCounts.find(F) != FunctionCounts.end()) + return FunctionCounts.find(F)->second; + return getExecutionCount(&F->getEntryBlock()); } Modified: llvm/trunk/lib/Analysis/ProfileInfoLoaderPass.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ProfileInfoLoaderPass.cpp?rev=78247&r1=78246&r2=78247&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ProfileInfoLoaderPass.cpp (original) +++ llvm/trunk/lib/Analysis/ProfileInfoLoaderPass.cpp Wed Aug 5 16:51:16 2009 @@ -72,21 +72,29 @@ EdgeCounts.clear(); std::vector ECs = PIL.getRawEdgeCounts(); + std::vector BCs = PIL.getRawBlockCounts(); + std::vector FCs = PIL.getRawFunctionCounts(); // Instrument all of the edges... - unsigned i = 0; - for (Module::iterator F = M.begin(), E = M.end(); F != E; ++F) + unsigned ei = 0; + unsigned bi = 0; + unsigned fi = 0; + for (Module::iterator F = M.begin(), E = M.end(); F != E; ++F) { + if (F->isDeclaration()) continue; + if (fibegin(), E = F->end(); BB != E; ++BB) { + if (bigetTerminator(); for (unsigned s = 0, e = TI->getNumSuccessors(); s != e; ++s) { - if (i < ECs.size()) - EdgeCounts[std::make_pair(BB, TI->getSuccessor(s))]+= ECs[i++]; + if (ei < ECs.size()) + EdgeCounts[std::make_pair(BB, TI->getSuccessor(s))]+= ECs[ei++]; } } + } - if (i != ECs.size()) { + if (ei != ECs.size()) { cerr << "WARNING: profile information is inconsistent with " << "the current program!\n"; } Modified: llvm/trunk/tools/llvm-prof/llvm-prof.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-prof/llvm-prof.cpp?rev=78247&r1=78246&r2=78247&view=diff ============================================================================== --- llvm/trunk/tools/llvm-prof/llvm-prof.cpp (original) +++ llvm/trunk/tools/llvm-prof/llvm-prof.cpp Wed Aug 5 16:51:16 2009 @@ -142,9 +142,8 @@ std::vector > FunctionCounts; std::vector > Counts; for (Module::iterator FI = M.begin(), FE = M.end(); FI != FE; ++FI) { - unsigned w = PI.getExecutionCount(FI); - if (w != (unsigned) -1) - FunctionCounts.push_back(std::make_pair(FI,PI.getExecutionCount(FI))); + if (FI->isDeclaration()) continue; + FunctionCounts.push_back(std::make_pair(FI,PI.getExecutionCount(FI))); for (Function::iterator BB = FI->begin(), BBE = FI->end(); BB != BBE; ++BB) { Counts.push_back(std::make_pair(BB,PI.getExecutionCount(BB))); @@ -209,7 +208,7 @@ if (Counts[i].second == 0) break; Function *F = Counts[i].first->getParent(); std::cout << std::setw(3) << i+1 << ". " - << std::setw(5) << std::setprecision(2) + << std::setw(5) << std::setprecision(3) << Counts[i].second/(double)TotalExecutions*100 << "% " << std::setw(5) << Counts[i].second << "/" << TotalExecutions << "\t" From greened at obbligato.org Wed Aug 5 16:01:28 2009 From: greened at obbligato.org (David Greene) Date: Wed, 05 Aug 2009 21:01:28 -0000 Subject: [llvm-commits] [llvm] r78243 - in /llvm/trunk: include/llvm/CodeGen/AsmPrinter.h include/llvm/Target/TargetAsmInfo.h lib/CodeGen/AsmPrinter/AsmPrinter.cpp utils/TableGen/AsmWriterEmitter.cpp Message-ID: <200908052101.n75L1bu8016720@zion.cs.uiuc.edu> Author: greened Date: Wed Aug 5 16:00:52 2009 New Revision: 78243 URL: http://llvm.org/viewvc/llvm-project?rev=78243&view=rev Log: Fix some column padding bugs, reorganize things as suggested by Chris and eliminate complexity. Yay! Modified: llvm/trunk/include/llvm/CodeGen/AsmPrinter.h llvm/trunk/include/llvm/Target/TargetAsmInfo.h llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp Modified: llvm/trunk/include/llvm/CodeGen/AsmPrinter.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/AsmPrinter.h?rev=78243&r1=78242&r2=78243&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/AsmPrinter.h (original) +++ llvm/trunk/include/llvm/CodeGen/AsmPrinter.h Wed Aug 5 16:00:52 2009 @@ -327,6 +327,12 @@ void EmitComments(const MCInst &MI) const; protected: + /// getOperandColumn - Return the output column number (zero-based) + /// for operand % "operand." If TargetAsmInfo has FirstOperandColumn + /// == 0 or MaxOperandLength == 0, return 0, meaning column alignment + /// is disabled. + unsigned getOperandColumn(int operand) const; + /// PadToColumn - This gets called every time a tab is emitted. If /// column padding is turned on, we replace the tab with the /// appropriate amount of padding. If not, we replace the tab with a Modified: llvm/trunk/include/llvm/Target/TargetAsmInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetAsmInfo.h?rev=78243&r1=78242&r2=78243&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetAsmInfo.h (original) +++ llvm/trunk/include/llvm/Target/TargetAsmInfo.h Wed Aug 5 16:00:52 2009 @@ -361,8 +361,11 @@ const char *getCommentString() const { return CommentString; } - unsigned getOperandColumn(int operand) const { - return FirstOperandColumn + (MaxOperandLength+1)*(operand-1); + unsigned getFirstOperandColumn() const { + return FirstOperandColumn; + } + unsigned getMaxOperandLength() const { + return MaxOperandLength; } const char *getGlobalPrefix() const { return GlobalPrefix; Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp?rev=78243&r1=78242&r2=78243&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp (original) +++ llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp Wed Aug 5 16:00:52 2009 @@ -782,6 +782,20 @@ } O << '\n'; } + +/// getOperandColumn - Return the output column number (zero-based) +/// for operand % "operand." If TargetAsmInfo has FirstOperandColumn +/// == 0 or MaxOperandLength == 0, return 0, meaning column alignment +/// is disabled. +unsigned AsmPrinter::getOperandColumn(int operand) const { + if (TAI->getFirstOperandColumn() > 0 && TAI->getMaxOperandLength() > 0) { + return TAI->getFirstOperandColumn() + + (TAI->getMaxOperandLength()+1)*(operand-1); + } + else { + return 0; + } +} /// PadToColumn - This gets called every time a tab is emitted. If /// column padding is turned on, we replace the tab with the @@ -789,8 +803,8 @@ /// space, except for the first operand so that initial operands are /// always lined up by tabs. void AsmPrinter::PadToColumn(unsigned Operand) const { - if (TAI->getOperandColumn(Operand) > 0) { - O.PadToColumn(TAI->getOperandColumn(Operand), 1); + if (getOperandColumn(Operand) > 0) { + O.PadToColumn(getOperandColumn(Operand), 1); } else { if (Operand == 1) { Modified: llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp?rev=78243&r1=78242&r2=78243&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp Wed Aug 5 16:00:52 2009 @@ -148,8 +148,6 @@ // Emit a constant string fragment. - // TODO: Recognize an operand separator to determine when to pad - // to the next operator. if (DollarPos != LastEmitted) { if (CurVariant == Variant || CurVariant == ~0U) { for (; LastEmitted != DollarPos; ++LastEmitted) @@ -727,30 +725,10 @@ O << " // Emit the opcode for the instruction.\n" << " unsigned Bits = OpInfo[MI->getOpcode()];\n" - << " if (Bits == 0) return false;\n\n"; - - O << " unsigned OperandColumn = 1;\n\n" - << " if (TAI->getOperandColumn(1) > 0) {\n" - << " // Don't emit trailing whitespace, let the column padding do it. This\n" - << " // guarantees that a stray long opcode + tab won't upset the alignment.\n" - << " // We need to handle this special case here because sometimes the initial\n" - << " // mnemonic string includes a tab or space and sometimes it doesn't.\n" - << " unsigned OpLength = std::strlen(AsmStrs+(Bits & " << (1 << AsmStrBits)-1 << "));\n" - << " if (OpLength > 0 &&\n" - << " ((AsmStrs+(Bits & " << (1 << AsmStrBits)-1 << "))[OpLength-1] == ' ' ||\n" - << " (AsmStrs+(Bits & " << (1 << AsmStrBits)-1 << "))[OpLength-1] == '\\t')) {\n" - << " do {\n" - << " --OpLength;\n" - << " } while ((AsmStrs+(Bits & " << (1 << AsmStrBits)-1 << "))[OpLength-1] == ' ' ||\n" - << " (AsmStrs+(Bits & " << (1 << AsmStrBits)-1 << "))[OpLength-1] == '\\t');\n" - << " for (unsigned Idx = 0; Idx < OpLength; ++Idx)\n" - << " O << (AsmStrs+(Bits & " << (1 << AsmStrBits)-1 << "))[Idx];\n" - << " O.PadToColumn(TAI->getOperandColumn(OperandColumn++), 1);\n" - << " }\n" - << " } else {\n" - << " O << AsmStrs+(Bits & " << (1 << AsmStrBits)-1 << ");\n" - << " }\n\n"; - + << " if (Bits == 0) return false;\n" + << " O << AsmStrs+(Bits & " << (1 << AsmStrBits)-1 << ");\n\n"; + + O << " unsigned OperandColumn = 1;\n\n"; // Output the table driven operand information. BitsLeft = 32-AsmStrBits; From david_goodwin at apple.com Wed Aug 5 16:02:30 2009 From: david_goodwin at apple.com (David Goodwin) Date: Wed, 05 Aug 2009 21:02:30 -0000 Subject: [llvm-commits] [llvm] r78244 - in /llvm/trunk/lib/Target/ARM: ARMBaseInstrInfo.cpp ARMInstrNEON.td ARMRegisterInfo.td Message-ID: <200908052102.n75L2XVO016767@zion.cs.uiuc.edu> Author: david_goodwin Date: Wed Aug 5 16:02:22 2009 New Revision: 78244 URL: http://llvm.org/viewvc/llvm-project?rev=78244&view=rev Log: When using NEON for single-precision FP, the NEON result must be placed in D0-D15 as these are the only D registers with S subregs. Introduce a new regclass to represent D0-D15 and use it in the NEON single-precision FP patterns. Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp llvm/trunk/lib/Target/ARM/ARMInstrNEON.td llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=78244&r1=78243&r2=78244&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Wed Aug 5 16:02:22 2009 @@ -610,23 +610,29 @@ if (I != MBB.end()) DL = I->getDebugLoc(); if (DestRC != SrcRC) { - // Not yet supported! - return false; + if (((DestRC == ARM::DPRRegisterClass) && (SrcRC == ARM::DPR_VFP2RegisterClass)) || + ((SrcRC == ARM::DPRRegisterClass) && (DestRC == ARM::DPR_VFP2RegisterClass))) { + // Allow copy between DPR and DPR_VFP2. + } else { + return false; + } } - if (DestRC == ARM::GPRRegisterClass) + if (DestRC == ARM::GPRRegisterClass) { AddDefaultCC(AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::MOVr), DestReg).addReg(SrcReg))); - else if (DestRC == ARM::SPRRegisterClass) + } else if (DestRC == ARM::SPRRegisterClass) { AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::FCPYS), DestReg) .addReg(SrcReg)); - else if (DestRC == ARM::DPRRegisterClass) + } else if ((DestRC == ARM::DPRRegisterClass) || + (DestRC == ARM::DPR_VFP2RegisterClass)) { AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::FCPYD), DestReg) .addReg(SrcReg)); - else if (DestRC == ARM::QPRRegisterClass) + } else if (DestRC == ARM::QPRRegisterClass) { BuildMI(MBB, I, DL, get(ARM::VMOVQ), DestReg).addReg(SrcReg); - else + } else { return false; + } return true; } Modified: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrNEON.td?rev=78244&r1=78243&r2=78244&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrNEON.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Wed Aug 5 16:02:22 2009 @@ -285,9 +285,11 @@ // Basic 2-register operations, scalar single-precision class N2VDInts : NEONFPPat<(f32 (OpNode SPR:$a)), - (EXTRACT_SUBREG (Inst (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), - SPR:$a, arm_ssubreg_0)), - arm_ssubreg_0)>; + (EXTRACT_SUBREG (COPY_TO_REGCLASS + (Inst (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), + SPR:$a, arm_ssubreg_0)), + DPR_VFP2), + arm_ssubreg_0)>; // Narrow 2-register intrinsics. class N2VNInt op24_23, bits<2> op21_20, bits<2> op19_18, @@ -329,11 +331,13 @@ // Basic 3-register operations, scalar single-precision class N3VDs : NEONFPPat<(f32 (OpNode SPR:$a, SPR:$b)), - (EXTRACT_SUBREG (Inst (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), - SPR:$a, arm_ssubreg_0), - (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), - SPR:$b, arm_ssubreg_0)), - arm_ssubreg_0)>; + (EXTRACT_SUBREG (COPY_TO_REGCLASS + (Inst (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), + SPR:$a, arm_ssubreg_0), + (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), + SPR:$b, arm_ssubreg_0)), + DPR_VFP2), + arm_ssubreg_0)>; // Basic 3-register intrinsics, both double- and quad-register. class N3VDInt op21_20, bits<4> op11_8, bit op4, @@ -375,12 +379,14 @@ class N3VDMulOps : NEONFPPat<(f32 (OpNode SPR:$acc, (f32 (MulNode SPR:$a, SPR:$b)))), - (EXTRACT_SUBREG (Inst (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), - SPR:$acc, arm_ssubreg_0), - (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), - SPR:$a, arm_ssubreg_0), - (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), - SPR:$b, arm_ssubreg_0)), + (EXTRACT_SUBREG (COPY_TO_REGCLASS + (Inst (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), + SPR:$acc, arm_ssubreg_0), + (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), + SPR:$a, arm_ssubreg_0), + (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), + SPR:$b, arm_ssubreg_0)), + DPR_VFP2), arm_ssubreg_0)>; // Neon 3-argument intrinsics, both double- and quad-register. Modified: llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td?rev=78244&r1=78243&r2=78244&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td (original) +++ llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td Wed Aug 5 16:02:22 2009 @@ -305,6 +305,14 @@ }]; } +// Subset of DPR that are accessible with VFP2 (and so that also have +// 32-bit SPR subregs). +def DPR_VFP2 : RegisterClass<"ARM", [f64, v2f32], 64, + [D0, D1, D2, D3, D4, D5, D6, D7, + D8, D9, D10, D11, D12, D13, D14, D15]> { + let SubRegClassList = [SPR, SPR]; +} + // Generic 128-bit vector register class. def QPR : RegisterClass<"ARM", [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], 128, [Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7, From eocallaghan at auroraux.org Wed Aug 5 14:57:45 2009 From: eocallaghan at auroraux.org (Edward O'Callaghan) Date: Wed, 05 Aug 2009 19:57:45 -0000 Subject: [llvm-commits] [compiler-rt] r78234 - in /compiler-rt/trunk: BlocksRuntime/Block_private.h lib/int_lib.h lib/powidf2.c test/Unit/int_lib.h Message-ID: <200908051957.n75JvpOh014359@zion.cs.uiuc.edu> Author: evocallaghan Date: Wed Aug 5 14:57:20 2009 New Revision: 78234 URL: http://llvm.org/viewvc/llvm-project?rev=78234&view=rev Log: Refactor test suit endianness pre-processor code. More style and readability fixes, start labling endif's Modified: compiler-rt/trunk/BlocksRuntime/Block_private.h compiler-rt/trunk/lib/int_lib.h compiler-rt/trunk/lib/powidf2.c compiler-rt/trunk/test/Unit/int_lib.h Modified: compiler-rt/trunk/BlocksRuntime/Block_private.h URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/BlocksRuntime/Block_private.h?rev=78234&r1=78233&r2=78234&view=diff ============================================================================== --- compiler-rt/trunk/BlocksRuntime/Block_private.h (original) +++ compiler-rt/trunk/BlocksRuntime/Block_private.h Wed Aug 5 14:57:20 2009 @@ -48,13 +48,13 @@ BLOCK_REFCOUNT_MASK = (0xffff), BLOCK_NEEDS_FREE = (1 << 24), BLOCK_HAS_COPY_DISPOSE = (1 << 25), - BLOCK_HAS_CTOR = (1 << 26), // helpers have C++ code + BLOCK_HAS_CTOR = (1 << 26), /* helpers have C++ code */ BLOCK_IS_GC = (1 << 27), BLOCK_IS_GLOBAL = (1 << 28), BLOCK_HAS_DESCRIPTOR = (1 << 29), }; -// revised new layout +/* revised new layout */ struct Block_descriptor { unsigned long int reserved; unsigned long int size; @@ -68,7 +68,7 @@ int reserved; void (*invoke)(void *, ...); struct Block_descriptor *descriptor; - // imported variables + /* imported variables */ }; @@ -76,11 +76,11 @@ struct Block_byref { void *isa; struct Block_byref *forwarding; - int flags;//refcount; + int flags; /* refcount; */ int size; void (*byref_keep)(struct Block_byref *dst, struct Block_byref *src); void (*byref_destroy)(struct Block_byref *); - // long shared[0]; + /* long shared[0]; */ }; struct Block_byref_header { @@ -91,36 +91,36 @@ }; -// Runtime support functions used by compiler when generating copy/dispose helpers +/* Runtime support functions used by compiler when generating copy/dispose helpers */ enum { - // see function implementation for a more complete description of these fields and combinations - BLOCK_FIELD_IS_OBJECT = 3, // id, NSObject, __attribute__((NSObject)), block, ... - BLOCK_FIELD_IS_BLOCK = 7, // a block variable - BLOCK_FIELD_IS_BYREF = 8, // the on stack structure holding the __block variable - BLOCK_FIELD_IS_WEAK = 16, // declared __weak, only used in byref copy helpers - BLOCK_BYREF_CALLER = 128, // called from __block (byref) copy/dispose support routines. + /* see function implementation for a more complete description of these fields and combinations */ + BLOCK_FIELD_IS_OBJECT = 3, /* id, NSObject, __attribute__((NSObject)), block, ... */ + BLOCK_FIELD_IS_BLOCK = 7, /* a block variable */ + BLOCK_FIELD_IS_BYREF = 8, /* the on stack structure holding the __block variable */ + BLOCK_FIELD_IS_WEAK = 16, /* declared __weak, only used in byref copy helpers */ + BLOCK_BYREF_CALLER = 128, /* called from __block (byref) copy/dispose support routines. */ }; -// Runtime entry point called by compiler when assigning objects inside copy helper routines +/* Runtime entry point called by compiler when assigning objects inside copy helper routines */ BLOCK_EXPORT void _Block_object_assign(void *destAddr, const void *object, const int flags); - // BLOCK_FIELD_IS_BYREF is only used from within block copy helpers + /* BLOCK_FIELD_IS_BYREF is only used from within block copy helpers */ -// runtime entry point called by the compiler when disposing of objects inside dispose helper routine +/* runtime entry point called by the compiler when disposing of objects inside dispose helper routine */ BLOCK_EXPORT void _Block_object_dispose(const void *object, const int flags); -// Other support functions +/* Other support functions */ -// runtime entry to get total size of a closure +/* runtime entry to get total size of a closure */ BLOCK_EXPORT unsigned long int Block_size(void *block_basic); -// the raw data space for runtime classes for blocks -// class+meta used for stack, malloc, and collectable based blocks +/* the raw data space for runtime classes for blocks */ +/* class+meta used for stack, malloc, and collectable based blocks */ BLOCK_EXPORT void * _NSConcreteStackBlock[32]; BLOCK_EXPORT void * _NSConcreteMallocBlock[32]; BLOCK_EXPORT void * _NSConcreteAutoBlock[32]; @@ -129,14 +129,14 @@ BLOCK_EXPORT void * _NSConcreteWeakBlockVariable[32]; -// the intercept routines that must be used under GC +/* the intercept routines that must be used under GC */ BLOCK_EXPORT void _Block_use_GC( void *(*alloc)(const unsigned long, const bool isOne, const bool isObject), void (*setHasRefcount)(const void *, const bool), void (*gc_assign_strong)(void *, void **), void (*gc_assign_weak)(const void *, void *), void (*gc_memmove)(void *, void *, unsigned long)); -// earlier version, now simply transitional +/* earlier version, now simply transitional */ BLOCK_EXPORT void _Block_use_GC5( void *(*alloc)(const unsigned long, const bool isOne, const bool isObject), void (*setHasRefcount)(const void *, const bool), void (*gc_assign_strong)(void *, void **), @@ -145,24 +145,24 @@ BLOCK_EXPORT void _Block_use_RR( void (*retain)(const void *), void (*release)(const void *)); -// make a collectable GC heap based Block. Not useful under non-GC. +/* make a collectable GC heap based Block. Not useful under non-GC. */ BLOCK_EXPORT void *_Block_copy_collectable(const void *aBlock); -// thread-unsafe diagnostic +/* thread-unsafe diagnostic */ BLOCK_EXPORT const char *_Block_dump(const void *block); -// Obsolete +/* Obsolete */ -// first layout +/* first layout */ struct Block_basic { void *isa; - int Block_flags; // int32_t - int Block_size; // XXX should be packed into Block_flags + int Block_flags; /* int32_t */ + int Block_size; /* XXX should be packed into Block_flags */ void (*Block_invoke)(void *); - void (*Block_copy)(void *dst, void *src); // iff BLOCK_HAS_COPY_DISPOSE - void (*Block_dispose)(void *); // iff BLOCK_HAS_COPY_DISPOSE - //long params[0]; // where const imports, __block storage references, etc. get laid down + void (*Block_copy)(void *dst, void *src); /* iff BLOCK_HAS_COPY_DISPOSE */ + void (*Block_dispose)(void *); /* iff BLOCK_HAS_COPY_DISPOSE */ + /* long params[0]; // where const imports, __block storage references, etc. get laid down */ }; Modified: compiler-rt/trunk/lib/int_lib.h URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/int_lib.h?rev=78234&r1=78233&r2=78234&view=diff ============================================================================== --- compiler-rt/trunk/lib/int_lib.h (original) +++ compiler-rt/trunk/lib/int_lib.h Wed Aug 5 14:57:20 2009 @@ -25,7 +25,7 @@ #if !defined(INFINITY) && defined(HUGE_VAL) #define INFINITY HUGE_VAL -#endif +#endif /* INFINITY */ typedef int si_int; typedef unsigned su_int; @@ -44,7 +44,7 @@ #else si_int high; su_int low; -#endif +#endif /* _YUGA_LITTLE_ENDIAN */ }; } dwords; @@ -59,7 +59,7 @@ #else su_int high; su_int low; -#endif +#endif /* _YUGA_LITTLE_ENDIAN */ }; } udwords; @@ -79,7 +79,7 @@ #else di_int high; du_int low; -#endif +#endif /* _YUGA_LITTLE_ENDIAN */ }; } twords; @@ -94,11 +94,11 @@ #else du_int high; du_int low; -#endif +#endif /* _YUGA_LITTLE_ENDIAN */ }; } utwords; -#endif +#endif /* __x86_64 */ typedef union { @@ -120,7 +120,7 @@ #else udwords high; udwords low; -#endif +#endif /* _YUGA_LITTLE_ENDIAN */ } uqwords; typedef union @@ -129,4 +129,4 @@ long double f; } long_double_bits; -#endif +#endif /* INT_LIB_H */ Modified: compiler-rt/trunk/lib/powidf2.c URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/powidf2.c?rev=78234&r1=78233&r2=78234&view=diff ============================================================================== --- compiler-rt/trunk/lib/powidf2.c (original) +++ compiler-rt/trunk/lib/powidf2.c Wed Aug 5 14:57:20 2009 @@ -1,19 +1,20 @@ -//===-- powidf2.cpp - Implement __powidf2 ---------------------------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file implements __powidf2 for the compiler_rt library. -// -//===----------------------------------------------------------------------===// +/* ===-- powidf2.cpp - Implement __powidf2 ---------------------------------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file implements __powidf2 for the compiler_rt library. + * + * ===----------------------------------------------------------------------=== + */ #include "int_lib.h" -// Returns: a ^ b +/* Returns: a ^ b */ double __powidf2(double a, si_int b) Modified: compiler-rt/trunk/test/Unit/int_lib.h URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/Unit/int_lib.h?rev=78234&r1=78233&r2=78234&view=diff ============================================================================== --- compiler-rt/trunk/test/Unit/int_lib.h (original) +++ compiler-rt/trunk/test/Unit/int_lib.h Wed Aug 5 14:57:20 2009 @@ -1,70 +1,31 @@ -//===-- int_lib.h - configuration header for libgcc replacement -----------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file is a configuration header for libgcc replacement. -// This file is not part of the interface of this library. -// -//===----------------------------------------------------------------------===// +/* ===-- int_lib.h - configuration header for libgcc replacement -----------=== + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + * ===----------------------------------------------------------------------=== + * + * This file is a configuration header for libgcc replacement. + * This file is not part of the interface of this library. + * + * ===----------------------------------------------------------------------=== + */ #ifndef INT_LIB_H #define INT_LIB_H -// Assumption: signed integral is 2's complement -// Assumption: right shift of signed negative is arithmetic shift +/* Assumption: signed integral is 2's complement */ +/* Assumption: right shift of signed negative is arithmetic shift */ #include +#include "endianness.h" +#include -// TODO: Improve this to minimal pre-processor hackish'ness. -#if defined (__SVR4) && defined (__sun) -// config.h build via CMake. -//#include - -// Solaris header for endian and byte swap -//#if defined HAVE_SYS_BYTEORDER_H -#include - -// Solaris defines endian by setting _LITTLE_ENDIAN or _BIG_ENDIAN -#ifdef _BIG_ENDIAN -# define IS_BIG_ENDIAN -#endif -#ifdef _LITTLE_ENDIAN -# define IS_LITTLE_ENDIAN -#endif - -#ifdef IS_BIG_ENDIAN -#define __BIG_ENDIAN__ 1 -#define __LITTLE_ENDIAN__ 0 -#endif -#ifdef IS_LITTLE_ENDIAN -#define __BIG_ENDIAN__ 0 -#define __LITTLE_ENDIAN__ 1 -#endif - -#endif //End of Solaris ifdef. - -#ifdef __LITTLE_ENDIAN__ -#if __LITTLE_ENDIAN__ -#define _YUGA_LITTLE_ENDIAN 1 -#define _YUGA_BIG_ENDIAN 0 -#endif -#endif - -#ifdef __BIG_ENDIAN__ -#if __BIG_ENDIAN__ -#define _YUGA_LITTLE_ENDIAN 0 -#define _YUGA_BIG_ENDIAN 1 -#endif -#endif - -#if !defined(_YUGA_LITTLE_ENDIAN) || !defined(_YUGA_BIG_ENDIAN) -#error unable to determine endian -#endif +#if !defined(INFINITY) && defined(HUGE_VAL) +#define INFINITY HUGE_VAL +#endif /* INFINITY */ typedef int si_int; typedef unsigned su_int; @@ -83,7 +44,7 @@ #else si_int high; su_int low; -#endif +#endif /* _YUGA_LITTLE_ENDIAN */ }; } dwords; @@ -98,7 +59,7 @@ #else su_int high; su_int low; -#endif +#endif /* _YUGA_LITTLE_ENDIAN */ }; } udwords; @@ -118,7 +79,7 @@ #else di_int high; du_int low; -#endif +#endif /* _YUGA_LITTLE_ENDIAN */ }; } twords; @@ -133,7 +94,7 @@ #else du_int high; du_int low; -#endif +#endif /* _YUGA_LITTLE_ENDIAN */ }; } utwords; @@ -157,7 +118,7 @@ return r.all; } -#endif +#endif /* __x86_64 */ typedef union { @@ -179,7 +140,7 @@ #else udwords high; udwords low; -#endif +#endif /* _YUGA_LITTLE_ENDIAN */ } uqwords; typedef union @@ -188,4 +149,4 @@ long double f; } long_double_bits; -#endif +#endif /* INT_LIB_H */ From gohman at apple.com Wed Aug 5 15:21:49 2009 From: gohman at apple.com (Dan Gohman) Date: Wed, 05 Aug 2009 20:21:49 -0000 Subject: [llvm-commits] [llvm] r78240 - in /llvm/trunk: include/llvm/Support/SystemUtils.h lib/Support/SystemUtils.cpp tools/bugpoint/BugDriver.h tools/bugpoint/ExecutionDriver.cpp tools/bugpoint/OptimizerDriver.cpp tools/bugpoint/ToolRunner.cpp tools/bugpoint/ToolRunner.h tools/llvm-ld/llvm-ld.cpp Message-ID: <200908052022.n75KMEiC015195@zion.cs.uiuc.edu> Author: djg Date: Wed Aug 5 15:21:17 2009 New Revision: 78240 URL: http://llvm.org/viewvc/llvm-project?rev=78240&view=rev Log: Fix FindExecutable to use sys::Path::GetMainExecutable instead of just argv[0]. And remove the code for searching the current working directory and for searching PATH; the point of FindExecutable is not to find whatever version of the executable can be found by searching around, but to find an executable that accompanies the current executable. Update the tools to use sys::Program::FindProgramByName when they want PATH searching. Modified: llvm/trunk/include/llvm/Support/SystemUtils.h llvm/trunk/lib/Support/SystemUtils.cpp llvm/trunk/tools/bugpoint/BugDriver.h llvm/trunk/tools/bugpoint/ExecutionDriver.cpp llvm/trunk/tools/bugpoint/OptimizerDriver.cpp llvm/trunk/tools/bugpoint/ToolRunner.cpp llvm/trunk/tools/bugpoint/ToolRunner.h llvm/trunk/tools/llvm-ld/llvm-ld.cpp Modified: llvm/trunk/include/llvm/Support/SystemUtils.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/SystemUtils.h?rev=78240&r1=78239&r2=78240&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/SystemUtils.h (original) +++ llvm/trunk/include/llvm/Support/SystemUtils.h Wed Aug 5 15:21:17 2009 @@ -40,12 +40,12 @@ ); /// FindExecutable - Find a named executable, giving the argv[0] of program -/// being executed. This allows us to find another LLVM tool if it is built into -/// the same directory, but that directory is neither the current directory, nor -/// in the PATH. If the executable cannot be found, return an empty string. +/// being executed. This allows us to find another LLVM tool if it is built in +/// the same directory. If the executable cannot be found, return an +/// empty string. /// @brief Find a named executable. sys::Path FindExecutable(const std::string &ExeName, - const std::string &ProgramPath); + const char *Argv0, void *MainAddr); } // End llvm namespace Modified: llvm/trunk/lib/Support/SystemUtils.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/SystemUtils.cpp?rev=78240&r1=78239&r2=78240&view=diff ============================================================================== --- llvm/trunk/lib/Support/SystemUtils.cpp (original) +++ llvm/trunk/lib/Support/SystemUtils.cpp Wed Aug 5 15:21:17 2009 @@ -50,24 +50,17 @@ } /// FindExecutable - Find a named executable, giving the argv[0] of program -/// being executed. This allows us to find another LLVM tool if it is built -/// into the same directory, but that directory is neither the current -/// directory, nor in the PATH. If the executable cannot be found, return an -/// empty string. Return the input string if given a full path to an executable. -/// +/// being executed. This allows us to find another LLVM tool if it is built in +/// the same directory. If the executable cannot be found, return an +/// empty string. +/// @brief Find a named executable. #undef FindExecutable // needed on windows :( sys::Path llvm::FindExecutable(const std::string &ExeName, - const std::string &ProgramPath) { - // First check if the given name is already a valid path to an executable. - sys::Path Result(ExeName); - Result.makeAbsolute(); - if (Result.canExecute()) - return Result; - - // Otherwise check the directory that the calling program is in. We can do + const char *Argv0, void *MainAddr) { + // Check the directory that the calling program is in. We can do // this if ProgramPath contains at least one / character, indicating that it // is a relative path to the executable itself. - Result = ProgramPath; + sys::Path Result = sys::Path::GetMainExecutable(Argv0, MainAddr); Result.eraseComponent(); if (!Result.isEmpty()) { Result.appendComponent(ExeName); @@ -75,5 +68,5 @@ return Result; } - return sys::Program::FindProgramByName(ExeName); + return sys::Path(); } Modified: llvm/trunk/tools/bugpoint/BugDriver.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/BugDriver.h?rev=78240&r1=78239&r2=78240&view=diff ============================================================================== --- llvm/trunk/tools/bugpoint/BugDriver.h (original) +++ llvm/trunk/tools/bugpoint/BugDriver.h Wed Aug 5 15:21:17 2009 @@ -44,7 +44,7 @@ class BugDriver { LLVMContext& Context; - const std::string ToolName; // Name of bugpoint + const char *ToolName; // argv[0] of bugpoint std::string ReferenceOutputFile; // Name of `good' output file Module *Program; // The raw program, linked together std::vector PassesToRun; @@ -64,7 +64,7 @@ BugDriver(const char *toolname, bool as_child, bool find_bugs, unsigned timeout, unsigned memlimit, LLVMContext& ctxt); - const std::string &getToolName() const { return ToolName; } + const char *getToolName() const { return ToolName; } LLVMContext& getContext() { return Context; } Modified: llvm/trunk/tools/bugpoint/ExecutionDriver.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/ExecutionDriver.cpp?rev=78240&r1=78239&r2=78240&view=diff ============================================================================== --- llvm/trunk/tools/bugpoint/ExecutionDriver.cpp (original) +++ llvm/trunk/tools/bugpoint/ExecutionDriver.cpp Wed Aug 5 15:21:17 2009 @@ -177,8 +177,7 @@ &ToolArgv, &GCCToolArgv); break; case Custom: - Interpreter = AbstractInterpreter::createCustom(getToolName(), Message, - CustomExecCommand); + Interpreter = AbstractInterpreter::createCustom(Message, CustomExecCommand); break; default: Message = "Sorry, this back-end is not supported by bugpoint right now!\n"; @@ -200,7 +199,7 @@ InterpreterSel == CBE_bug) { SafeInterpreterSel = RunLLC; SafeToolArgs.push_back("--relocation-model=pic"); - SafeInterpreter = AbstractInterpreter::createLLC(Path, Message, + SafeInterpreter = AbstractInterpreter::createLLC(Path.c_str(), Message, &SafeToolArgs, &GCCToolArgv); } @@ -210,7 +209,7 @@ InterpreterSel == LLC_Safe) { SafeInterpreterSel = RunLLC; SafeToolArgs.push_back("--relocation-model=pic"); - SafeInterpreter = AbstractInterpreter::createLLC(Path, Message, + SafeInterpreter = AbstractInterpreter::createLLC(Path.c_str(), Message, &SafeToolArgs, &GCCToolArgv); } @@ -221,7 +220,7 @@ if (!SafeInterpreter && InterpreterSel != RunCBE) { SafeInterpreterSel = RunCBE; - SafeInterpreter = AbstractInterpreter::createCBE(Path, Message, + SafeInterpreter = AbstractInterpreter::createCBE(Path.c_str(), Message, &SafeToolArgs, &GCCToolArgv); } @@ -230,7 +229,7 @@ InterpreterSel != RunJIT) { SafeInterpreterSel = RunLLC; SafeToolArgs.push_back("--relocation-model=pic"); - SafeInterpreter = AbstractInterpreter::createLLC(Path, Message, + SafeInterpreter = AbstractInterpreter::createLLC(Path.c_str(), Message, &SafeToolArgs, &GCCToolArgv); } @@ -241,17 +240,17 @@ break; case RunLLC: SafeToolArgs.push_back("--relocation-model=pic"); - SafeInterpreter = AbstractInterpreter::createLLC(Path, Message, + SafeInterpreter = AbstractInterpreter::createLLC(Path.c_str(), Message, &SafeToolArgs, &GCCToolArgv); break; case RunCBE: - SafeInterpreter = AbstractInterpreter::createCBE(Path, Message, + SafeInterpreter = AbstractInterpreter::createCBE(Path.c_str(), Message, &SafeToolArgs, &GCCToolArgv); break; case Custom: - SafeInterpreter = AbstractInterpreter::createCustom(Path, Message, + SafeInterpreter = AbstractInterpreter::createCustom(Message, CustomExecCommand); break; default: @@ -261,7 +260,7 @@ } if (!SafeInterpreter) { outs() << Message << "\nExiting.\n"; exit(1); } - gcc = GCC::create(getToolName(), Message, &GCCToolArgv); + gcc = GCC::create(Message, &GCCToolArgv); if (!gcc) { outs() << Message << "\nExiting.\n"; exit(1); } // If there was an error creating the selected interpreter, quit with error. Modified: llvm/trunk/tools/bugpoint/OptimizerDriver.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/OptimizerDriver.cpp?rev=78240&r1=78239&r2=78240&view=diff ============================================================================== --- llvm/trunk/tools/bugpoint/OptimizerDriver.cpp (original) +++ llvm/trunk/tools/bugpoint/OptimizerDriver.cpp Wed Aug 5 15:21:17 2009 @@ -167,7 +167,7 @@ args[n++] = "-q"; args[n++] = tool.c_str(); } else - args[n++] = ToolName.c_str(); + args[n++] = ToolName; args[n++] = "-as-child"; args[n++] = "-child-output"; Modified: llvm/trunk/tools/bugpoint/ToolRunner.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/ToolRunner.cpp?rev=78240&r1=78239&r2=78240&view=diff ============================================================================== --- llvm/trunk/tools/bugpoint/ToolRunner.cpp (original) +++ llvm/trunk/tools/bugpoint/ToolRunner.cpp Wed Aug 5 15:21:17 2009 @@ -228,10 +228,12 @@ } // LLI create method - Try to find the LLI executable -AbstractInterpreter *AbstractInterpreter::createLLI(const std::string &ProgPath, +AbstractInterpreter *AbstractInterpreter::createLLI(const char *Argv0, std::string &Message, const std::vector *ToolArgs) { - std::string LLIPath = FindExecutable("lli", ProgPath).toString(); + std::string LLIPath = + FindExecutable("lli", Argv0, + reinterpret_cast(&createLLI)).toString(); if (!LLIPath.empty()) { Message = "Found lli: " + LLIPath + "\n"; return new LLI(LLIPath, ToolArgs); @@ -298,7 +300,6 @@ // Custom execution environment create method, takes the execution command // as arguments AbstractInterpreter *AbstractInterpreter::createCustom( - const std::string &ProgramPath, std::string &Message, const std::string &ExecCommandLine) { @@ -332,7 +333,7 @@ pos = ExecCommandLine.find_first_of(delimiters, lastPos); } - std::string CmdPath = FindExecutable(Command, ProgramPath).toString(); + std::string CmdPath = sys::Program::FindProgramByName(Command).toString(); if (CmdPath.empty()) { Message = std::string("Cannot find '") + Command + @@ -414,18 +415,20 @@ /// createLLC - Try to find the LLC executable /// -LLC *AbstractInterpreter::createLLC(const std::string &ProgramPath, +LLC *AbstractInterpreter::createLLC(const char *Argv0, std::string &Message, const std::vector *Args, const std::vector *GCCArgs) { - std::string LLCPath = FindExecutable("llc", ProgramPath).toString(); + std::string LLCPath = + FindExecutable("llc", Argv0, + reinterpret_cast(&createLLC)).toString(); if (LLCPath.empty()) { Message = "Cannot find `llc' in executable directory or PATH!\n"; return 0; } Message = "Found llc: " + LLCPath + "\n"; - GCC *gcc = GCC::create(ProgramPath, Message, GCCArgs); + GCC *gcc = GCC::create(Message, GCCArgs); if (!gcc) { errs() << Message << "\n"; exit(1); @@ -501,9 +504,11 @@ /// createJIT - Try to find the LLI executable /// -AbstractInterpreter *AbstractInterpreter::createJIT(const std::string &ProgPath, +AbstractInterpreter *AbstractInterpreter::createJIT(const char *Argv0, std::string &Message, const std::vector *Args) { - std::string LLIPath = FindExecutable("lli", ProgPath).toString(); + std::string LLIPath = + FindExecutable("lli", Argv0, + reinterpret_cast(&createJIT)).toString(); if (!LLIPath.empty()) { Message = "Found lli: " + LLIPath + "\n"; return new JIT(LLIPath, Args); @@ -577,11 +582,13 @@ /// createCBE - Try to find the 'llc' executable /// -CBE *AbstractInterpreter::createCBE(const std::string &ProgramPath, +CBE *AbstractInterpreter::createCBE(const char *Argv0, std::string &Message, const std::vector *Args, const std::vector *GCCArgs) { - sys::Path LLCPath = FindExecutable("llc", ProgramPath); + sys::Path LLCPath = + FindExecutable("llc", Argv0, + reinterpret_cast(&createCBE)); if (LLCPath.isEmpty()) { Message = "Cannot find `llc' in executable directory or PATH!\n"; @@ -589,7 +596,7 @@ } Message = "Found llc: " + LLCPath.toString() + "\n"; - GCC *gcc = GCC::create(ProgramPath, Message, GCCArgs); + GCC *gcc = GCC::create(Message, GCCArgs); if (!gcc) { errs() << Message << "\n"; exit(1); @@ -827,9 +834,9 @@ /// create - Try to find the `gcc' executable /// -GCC *GCC::create(const std::string &ProgramPath, std::string &Message, +GCC *GCC::create(std::string &Message, const std::vector *Args) { - sys::Path GCCPath = FindExecutable("gcc", ProgramPath); + sys::Path GCCPath = sys::Program::FindProgramByName("gcc"); if (GCCPath.isEmpty()) { Message = "Cannot find `gcc' in executable directory or PATH!\n"; return 0; @@ -837,7 +844,7 @@ sys::Path RemoteClientPath; if (!RemoteClient.empty()) - RemoteClientPath = FindExecutable(RemoteClient.c_str(), ProgramPath); + RemoteClientPath = sys::Program::FindProgramByName(RemoteClient); Message = "Found gcc: " + GCCPath.toString() + "\n"; return new GCC(GCCPath, RemoteClientPath, Args); Modified: llvm/trunk/tools/bugpoint/ToolRunner.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/ToolRunner.h?rev=78240&r1=78239&r2=78240&view=diff ============================================================================== --- llvm/trunk/tools/bugpoint/ToolRunner.h (original) +++ llvm/trunk/tools/bugpoint/ToolRunner.h Wed Aug 5 15:21:17 2009 @@ -57,7 +57,7 @@ public: enum FileType { AsmFile, CFile }; - static GCC *create(const std::string &ProgramPath, std::string &Message, + static GCC *create(std::string &Message, const std::vector *Args); /// ExecuteProgram - Execute the program specified by "ProgramFile" (which is @@ -93,23 +93,20 @@ /// class AbstractInterpreter { public: - static CBE *createCBE(const std::string &ProgramPath, std::string &Message, + static CBE *createCBE(const char *Argv0, std::string &Message, const std::vector *Args = 0, const std::vector *GCCArgs = 0); - static LLC *createLLC(const std::string &ProgramPath, std::string &Message, + static LLC *createLLC(const char *Argv0, std::string &Message, const std::vector *Args = 0, const std::vector *GCCArgs = 0); - static AbstractInterpreter* createLLI(const std::string &ProgramPath, - std::string &Message, + static AbstractInterpreter* createLLI(const char *Argv0, std::string &Message, const std::vector *Args=0); - static AbstractInterpreter* createJIT(const std::string &ProgramPath, - std::string &Message, + static AbstractInterpreter* createJIT(const char *Argv0, std::string &Message, const std::vector *Args=0); - static AbstractInterpreter* createCustom(const std::string &ProgramPath, - std::string &Message, + static AbstractInterpreter* createCustom(std::string &Message, const std::string &ExecCommandLine); Modified: llvm/trunk/tools/llvm-ld/llvm-ld.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-ld/llvm-ld.cpp?rev=78240&r1=78239&r2=78240&view=diff ============================================================================== --- llvm/trunk/tools/llvm-ld/llvm-ld.cpp (original) +++ llvm/trunk/tools/llvm-ld/llvm-ld.cpp Wed Aug 5 15:21:17 2009 @@ -41,6 +41,11 @@ #include using namespace llvm; +// Rightly this should go in a header file but it just seems such a waste. +namespace llvm { +extern void Optimize(Module*); +} + // Input/Output Options static cl::list InputFilenames(cl::Positional, cl::OneOrMore, cl::desc("")); @@ -409,7 +414,8 @@ // support windows systems, we copy the llvm-stub.exe executable from the // build tree to the destination file. std::string ErrMsg; - sys::Path llvmstub = FindExecutable("llvm-stub.exe", argv[0]); + sys::Path llvmstub = FindExecutable("llvm-stub.exe", argv[0], + reinterpret_cast(&Optimize)); if (llvmstub.isEmpty()) PrintAndExit("Could not find llvm-stub.exe executable!"); @@ -500,11 +506,6 @@ } } -// Rightly this should go in a header file but it just seems such a waste. -namespace llvm { -extern void Optimize(Module*); -} - int main(int argc, char **argv, char **envp) { // Print a stack trace if we signal out. sys::PrintStackTraceOnErrorSignal(); @@ -640,11 +641,12 @@ sys::RemoveFileOnSignal(sys::Path(OutputFilename)); // Determine the locations of the llc and gcc programs. - sys::Path llc = FindExecutable("llc", argv[0]); + sys::Path llc = FindExecutable("llc", argv[0], + reinterpret_cast(&Optimize)); if (llc.isEmpty()) PrintAndExit("Failed to find llc"); - sys::Path gcc = FindExecutable("gcc", argv[0]); + sys::Path gcc = sys::Program::FindProgramByName("gcc"); if (gcc.isEmpty()) PrintAndExit("Failed to find gcc"); @@ -669,11 +671,12 @@ sys::RemoveFileOnSignal(sys::Path(OutputFilename)); // Determine the locations of the llc and gcc programs. - sys::Path llc = FindExecutable("llc", argv[0]); + sys::Path llc = FindExecutable("llc", argv[0], + reinterpret_cast(&Optimize)); if (llc.isEmpty()) PrintAndExit("Failed to find llc"); - sys::Path gcc = FindExecutable("gcc", argv[0]); + sys::Path gcc = sys::Program::FindProgramByName("gcc"); if (gcc.isEmpty()) PrintAndExit("Failed to find gcc"); From deeppatel1987 at gmail.com Wed Aug 5 17:57:09 2009 From: deeppatel1987 at gmail.com (Sandeep Patel) Date: Wed, 5 Aug 2009 22:57:09 +0000 Subject: [llvm-commits] cross building fixes In-Reply-To: References: <305d6f60908050259l157641b6x8dcb87bf8a431536@mail.gmail.com> Message-ID: <305d6f60908051557t641e2f89if99c34e675c6b6df@mail.gmail.com> On Wed, Aug 5, 2009 at 7:38 PM, Eli Friedman wrote: > On Wed, Aug 5, 2009 at 2:59 AM, Sandeep Patel wrote: >> The attached patches attempt to fix cross builds. For example, if you >> try to use i686-darwin to build for arm-eabi, you'll quickly run into >> several false assumptions that the target OS must be the same as the >> host OS. These patches split $(OS) into $(HOST_OS) and $(TARGET_OS) to >> help builds like "make check" and the test-suite able to cross >> compile. Along the way a target of *-unknown-eabi is defined as >> "Freestanding" so that TARGET_OS checks have something to work with. >> >> Also attached is a patch to add a definition for >> __STDC_CONSTANT_MACROS so that llvm2cpp doesn't fail during make check >> on a cross. > > The naming you're using is kind of confusing... from "configure > --help" for LLVM: > System types: > ?--build=BUILD ? ? configure for building on BUILD [guessed] > ?--host=HOST ? ? ? cross-compile to build programs to run on HOST [BUILD] > ?--target=TARGET ? configure for building compilers for TARGET [HOST] I think I'm using this exact same naming. If there's a specific spot of confusion in the patch, I'd be happy to address it. deep From asl at math.spbu.ru Wed Aug 5 18:01:27 2009 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 05 Aug 2009 23:01:27 -0000 Subject: [llvm-commits] [llvm] r78255 - in /llvm/trunk/lib/Target/X86: X86ISelDAGToDAG.cpp X86ISelLowering.cpp X86ISelLowering.h Message-ID: <200908052301.n75N1SD8020980@zion.cs.uiuc.edu> Author: asl Date: Wed Aug 5 18:01:26 2009 New Revision: 78255 URL: http://llvm.org/viewvc/llvm-project?rev=78255&view=rev Log: Better handle kernel code model. Also, generalize the things and fix one subtle bug with small code model. Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.h Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=78255&r1=78254&r2=78255&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Wed Aug 5 18:01:26 2009 @@ -705,7 +705,7 @@ /// MatchWrapper - Try to match X86ISD::Wrapper and X86ISD::WrapperRIP nodes /// into an addressing mode. These wrap things that will resolve down into a /// symbol reference. If no match is possible, this returns true, otherwise it -/// returns false. +/// returns false. bool X86DAGToDAGISel::MatchWrapper(SDValue N, X86ISelAddressMode &AM) { // If the addressing mode already has a symbol as the displacement, we can // never match another symbol. @@ -713,28 +713,27 @@ return true; SDValue N0 = N.getOperand(0); - + CodeModel::Model M = TM.getCodeModel(); + // Handle X86-64 rip-relative addresses. We check this before checking direct // folding because RIP is preferable to non-RIP accesses. if (Subtarget->is64Bit() && // Under X86-64 non-small code model, GV (and friends) are 64-bits, so // they cannot be folded into immediate fields. // FIXME: This can be improved for kernel and other models? - TM.getCodeModel() == CodeModel::Small && - + (M == CodeModel::Small || CodeModel::Kernel) && // Base and index reg must be 0 in order to use %rip as base and lowering // must allow RIP. !AM.hasBaseOrIndexReg() && N.getOpcode() == X86ISD::WrapperRIP) { - if (GlobalAddressSDNode *G = dyn_cast(N0)) { int64_t Offset = AM.Disp + G->getOffset(); - if (!isInt32(Offset)) return true; + if (!X86::isOffsetSuitableForCodeModel(Offset, M)) return true; AM.GV = G->getGlobal(); AM.Disp = Offset; AM.SymbolFlags = G->getTargetFlags(); } else if (ConstantPoolSDNode *CP = dyn_cast(N0)) { int64_t Offset = AM.Disp + CP->getOffset(); - if (!isInt32(Offset)) return true; + if (!X86::isOffsetSuitableForCodeModel(Offset, M)) return true; AM.CP = CP->getConstVal(); AM.Align = CP->getAlignment(); AM.Disp = Offset; @@ -747,7 +746,7 @@ AM.JT = J->getIndex(); AM.SymbolFlags = J->getTargetFlags(); } - + if (N.getOpcode() == X86ISD::WrapperRIP) AM.setBaseReg(CurDAG->getRegister(X86::RIP, MVT::i64)); return false; @@ -757,7 +756,7 @@ // X86-32 always and X86-64 when in -static -mcmodel=small mode. In 64-bit // mode, this results in a non-RIP-relative computation. if (!Subtarget->is64Bit() || - (TM.getCodeModel() == CodeModel::Small && + ((M == CodeModel::Small || M == CodeModel::Kernel) && TM.getRelocationModel() == Reloc::Static)) { if (GlobalAddressSDNode *G = dyn_cast(N0)) { AM.GV = G->getGlobal(); @@ -809,7 +808,9 @@ // Limit recursion. if (Depth > 5) return MatchAddressBase(N, AM); - + + CodeModel::Model M = TM.getCodeModel(); + // If this is already a %rip relative address, we can only merge immediates // into it. Instead of handling this in every case, we handle it here. // RIP relative addressing: %rip + 32-bit displacement! @@ -818,10 +819,11 @@ // displacements. It isn't very important, but this should be fixed for // consistency. if (!AM.ES && AM.JT != -1) return true; - + if (ConstantSDNode *Cst = dyn_cast(N)) { int64_t Val = AM.Disp + Cst->getSExtValue(); - if (isInt32(Val)) { + if (X86::isOffsetSuitableForCodeModel(Val, M, + AM.hasSymbolicDisplacement())) { AM.Disp = Val; return false; } @@ -833,7 +835,9 @@ default: break; case ISD::Constant: { uint64_t Val = cast(N)->getSExtValue(); - if (!is64Bit || isInt32(AM.Disp + Val)) { + if (!is64Bit || + X86::isOffsetSuitableForCodeModel(AM.Disp + Val, M, + AM.hasSymbolicDisplacement())) { AM.Disp += Val; return false; } @@ -889,7 +893,9 @@ ConstantSDNode *AddVal = cast(ShVal.getNode()->getOperand(1)); uint64_t Disp = AM.Disp + (AddVal->getSExtValue() << Val); - if (!is64Bit || isInt32(Disp)) + if (!is64Bit || + X86::isOffsetSuitableForCodeModel(Disp, M, + AM.hasSymbolicDisplacement())) AM.Disp = Disp; else AM.IndexReg = ShVal; @@ -931,7 +937,9 @@ cast(MulVal.getNode()->getOperand(1)); uint64_t Disp = AM.Disp + AddVal->getSExtValue() * CN->getZExtValue(); - if (!is64Bit || isInt32(Disp)) + if (!is64Bit || + X86::isOffsetSuitableForCodeModel(Disp, M, + AM.hasSymbolicDisplacement())) AM.Disp = Disp; else Reg = N.getNode()->getOperand(0); @@ -1050,7 +1058,9 @@ // Address could not have picked a GV address for the displacement. AM.GV == NULL && // On x86-64, the resultant disp must fit in 32-bits. - (!is64Bit || isInt32(AM.Disp + Offset)) && + (!is64Bit || + X86::isOffsetSuitableForCodeModel(AM.Disp + Offset, M, + AM.hasSymbolicDisplacement())) && // Check to see if the LHS & C is zero. CurDAG->MaskedValueIsZero(N.getOperand(0), CN->getAPIntValue())) { AM.Disp += Offset; Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=78255&r1=78254&r2=78255&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Aug 5 18:01:26 2009 @@ -2126,6 +2126,36 @@ } +bool X86::isOffsetSuitableForCodeModel(int64_t Offset, CodeModel::Model M, + bool hasSymbolicDisplacement) { + // Offset should fit into 32 bit immediate field. + if (!isInt32(Offset)) + return false; + + // If we don't have a symbolic displacement - we don't have any extra + // restrictions. + if (!hasSymbolicDisplacement) + return true; + + // FIXME: Some tweaks might be needed for medium code model. + if (M != CodeModel::Small && M != CodeModel::Kernel) + return false; + + // For small code model we assume that latest object is 16MB before end of 31 + // bits boundary. We may also accept pretty large negative constants knowing + // that all objects are in the positive half of address space. + if (M == CodeModel::Small && Offset < 16*1024*1024) + return true; + + // For kernel code model we know that all object resist in the negative half + // of 32bits address space. We may not accept negative offsets, since they may + // be just off and we may accept pretty large positive ones. + if (M == CodeModel::Kernel && Offset > 0) + return true; + + return false; +} + /// TranslateX86CC - do a one to one translation of a ISD::CondCode to the X86 /// specific condition code, returning the condition code and the LHS/RHS of the /// comparison to make. @@ -4440,9 +4470,10 @@ // global base reg. unsigned char OpFlag = 0; unsigned WrapperKind = X86ISD::Wrapper; - + CodeModel::Model M = getTargetMachine().getCodeModel(); + if (Subtarget->isPICStyleRIPRel() && - getTargetMachine().getCodeModel() == CodeModel::Small) + (M == CodeModel::Small || M == CodeModel::Kernel)) WrapperKind = X86ISD::WrapperRIP; else if (Subtarget->isPICStyleGOT()) OpFlag = X86II::MO_GOTOFF; @@ -4472,9 +4503,10 @@ // global base reg. unsigned char OpFlag = 0; unsigned WrapperKind = X86ISD::Wrapper; - + CodeModel::Model M = getTargetMachine().getCodeModel(); + if (Subtarget->isPICStyleRIPRel() && - getTargetMachine().getCodeModel() == CodeModel::Small) + (M == CodeModel::Small || M == CodeModel::Kernel)) WrapperKind = X86ISD::WrapperRIP; else if (Subtarget->isPICStyleGOT()) OpFlag = X86II::MO_GOTOFF; @@ -4505,8 +4537,10 @@ // global base reg. unsigned char OpFlag = 0; unsigned WrapperKind = X86ISD::Wrapper; + CodeModel::Model M = getTargetMachine().getCodeModel(); + if (Subtarget->isPICStyleRIPRel() && - getTargetMachine().getCodeModel() == CodeModel::Small) + (M == CodeModel::Small || M == CodeModel::Kernel)) WrapperKind = X86ISD::WrapperRIP; else if (Subtarget->isPICStyleGOT()) OpFlag = X86II::MO_GOTOFF; @@ -4540,8 +4574,10 @@ // offset if it is legal. unsigned char OpFlags = Subtarget->ClassifyGlobalReference(GV, getTargetMachine()); + CodeModel::Model M = getTargetMachine().getCodeModel(); SDValue Result; - if (OpFlags == X86II::MO_NO_FLAG && isInt32(Offset)) { + if (OpFlags == X86II::MO_NO_FLAG && + X86::isOffsetSuitableForCodeModel(Offset, M)) { // A direct static reference to a global. Result = DAG.getTargetGlobalAddress(GV, getPointerTy(), Offset); Offset = 0; @@ -4550,7 +4586,7 @@ } if (Subtarget->isPICStyleRIPRel() && - getTargetMachine().getCodeModel() == CodeModel::Small) + (M == CodeModel::Small || M == CodeModel::Kernel)) Result = DAG.getNode(X86ISD::WrapperRIP, dl, getPointerTy(), Result); else Result = DAG.getNode(X86ISD::Wrapper, dl, getPointerTy(), Result); @@ -7049,32 +7085,28 @@ bool X86TargetLowering::isLegalAddressingMode(const AddrMode &AM, const Type *Ty) const { // X86 supports extremely general addressing modes. + CodeModel::Model M = getTargetMachine().getCodeModel(); // X86 allows a sign-extended 32-bit immediate field as a displacement. - if (AM.BaseOffs <= -(1LL << 32) || AM.BaseOffs >= (1LL << 32)-1) + if (!X86::isOffsetSuitableForCodeModel(AM.BaseOffs, M, AM.BaseGV != NULL)) return false; if (AM.BaseGV) { unsigned GVFlags = Subtarget->ClassifyGlobalReference(AM.BaseGV, getTargetMachine()); - + // If a reference to this global requires an extra load, we can't fold it. if (isGlobalStubReference(GVFlags)) return false; - + // If BaseGV requires a register for the PIC base, we cannot also have a // BaseReg specified. if (AM.HasBaseReg && isGlobalRelativeToPICBase(GVFlags)) return false; - // X86-64 only supports addr of globals in small code model. - if (Subtarget->is64Bit()) { - if (getTargetMachine().getCodeModel() != CodeModel::Small) - return false; - // If lower 4G is not available, then we must use rip-relative addressing. - if (AM.BaseOffs || AM.Scale > 1) - return false; - } + // If lower 4G is not available, then we must use rip-relative addressing. + if (Subtarget->is64Bit() && (AM.BaseOffs || AM.Scale > 1)) + return false; } switch (AM.Scale) { Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=78255&r1=78254&r2=78255&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Wed Aug 5 18:01:26 2009 @@ -336,6 +336,11 @@ /// isZeroNode - Returns true if Elt is a constant zero or a floating point /// constant +0.0. bool isZeroNode(SDValue Elt); + + /// isOffsetSuitableForCodeModel - Returns true of the given offset can be + /// fit into displacement field of the instruction. + bool isOffsetSuitableForCodeModel(int64_t Offset, CodeModel::Model M, + bool hasSymbolicDisplacement = true); } //===--------------------------------------------------------------------===// From echristo at apple.com Wed Aug 5 18:09:08 2009 From: echristo at apple.com (Eric Christopher) Date: Wed, 5 Aug 2009 16:09:08 -0700 Subject: [llvm-commits] [llvm-gcc-4.2] r78249 - /llvm-gcc-4.2/trunk/gcc/config/darwin-c.c In-Reply-To: <200908052214.n75MEmGj018875@zion.cs.uiuc.edu> References: <200908052214.n75MEmGj018875@zion.cs.uiuc.edu> Message-ID: > > + /* LLVM LOCAL begin 7115749 this object is constant. */ > + TREE_CONSTANT (decl) = 1; > + TREE_READONLY (decl) = 1; > + /* LLVM LOCAL end */ Don't think this needs to be llvm local if you want to add it to the apple gcc tree as well - if it does need to be llvm local I think there's a bug somewhere :) -eric From dalej at apple.com Wed Aug 5 18:11:51 2009 From: dalej at apple.com (Dale Johannesen) Date: Wed, 5 Aug 2009 16:11:51 -0700 Subject: [llvm-commits] [llvm-gcc-4.2] r78249 - /llvm-gcc-4.2/trunk/gcc/config/darwin-c.c In-Reply-To: References: <200908052214.n75MEmGj018875@zion.cs.uiuc.edu> Message-ID: <8B6B2CC2-B6FE-4D6F-8A37-4926E3DED2F3@apple.com> On Aug 5, 2009, at 4:09 PMPDT, Eric Christopher wrote: >> >> + /* LLVM LOCAL begin 7115749 this object is constant. */ >> + TREE_CONSTANT (decl) = 1; >> + TREE_READONLY (decl) = 1; >> + /* LLVM LOCAL end */ > > Don't think this needs to be llvm local if you want to add it to the > apple gcc tree as well - if it does need to be llvm local I think > there's a bug somewhere :) > > -eric We are no longer maintaining the apple gcc tree, as I understand it. If we are it should go there. From bob.wilson at apple.com Wed Aug 5 18:13:14 2009 From: bob.wilson at apple.com (Bob Wilson) Date: Wed, 05 Aug 2009 23:13:14 -0000 Subject: [llvm-commits] [llvm] r78256 - in /llvm/trunk/lib/Target/ARM: ARM.h ARMTargetMachine.cpp CMakeLists.txt NEONPreAllocPass.cpp Message-ID: <200908052313.n75NDZ7C021379@zion.cs.uiuc.edu> Author: bwilson Date: Wed Aug 5 18:12:45 2009 New Revision: 78256 URL: http://llvm.org/viewvc/llvm-project?rev=78256&view=rev Log: Add a new pre-allocation pass to assign adjacent registers for Neon instructions that have that constraint. This is currently just assigning a fixed set of registers, and it only handles VLDn for n=2,3,4 with DPR registers. I'm going to expand it to handle more operations next; we can make it smarter once everything is working correctly. Added: llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp Modified: llvm/trunk/lib/Target/ARM/ARM.h llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp llvm/trunk/lib/Target/ARM/CMakeLists.txt Modified: llvm/trunk/lib/Target/ARM/ARM.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARM.h?rev=78256&r1=78255&r2=78256&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARM.h (original) +++ llvm/trunk/lib/Target/ARM/ARM.h Wed Aug 5 18:12:45 2009 @@ -103,7 +103,7 @@ FunctionPass *createARMLoadStoreOptimizationPass(bool PreAlloc = false); FunctionPass *createARMConstantIslandPass(); - +FunctionPass *createNEONPreAllocPass(); FunctionPass *createThumb2ITBlockPass(); extern Target TheARMTarget, TheThumbTarget; Modified: llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp?rev=78256&r1=78255&r2=78256&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp Wed Aug 5 18:12:45 2009 @@ -93,6 +93,9 @@ bool ARMBaseTargetMachine::addPreRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel) { + if (Subtarget.hasNEON()) + PM.add(createNEONPreAllocPass()); + // FIXME: temporarily disabling load / store optimization pass for Thumb mode. if (OptLevel != CodeGenOpt::None && !DisableLdStOpti && !Subtarget.isThumb()) PM.add(createARMLoadStoreOptimizationPass(true)); Modified: llvm/trunk/lib/Target/ARM/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/CMakeLists.txt?rev=78256&r1=78255&r2=78256&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/CMakeLists.txt (original) +++ llvm/trunk/lib/Target/ARM/CMakeLists.txt Wed Aug 5 18:12:45 2009 @@ -26,6 +26,7 @@ ARMSubtarget.cpp ARMTargetAsmInfo.cpp ARMTargetMachine.cpp + NEONPreAllocPass.cpp Thumb1InstrInfo.cpp Thumb1RegisterInfo.cpp Thumb2ITBlockPass.cpp Added: llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp?rev=78256&view=auto ============================================================================== --- llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp (added) +++ llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp Wed Aug 5 18:12:45 2009 @@ -0,0 +1,137 @@ +//===-- NEONPreAllocPass.cpp - Allocate adjacent NEON registers--*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#define DEBUG_TYPE "neon-prealloc" +#include "ARM.h" +#include "ARMInstrInfo.h" +#include "llvm/CodeGen/MachineInstr.h" +#include "llvm/CodeGen/MachineInstrBuilder.h" +#include "llvm/CodeGen/MachineFunctionPass.h" +using namespace llvm; + +namespace { + class VISIBILITY_HIDDEN NEONPreAllocPass : public MachineFunctionPass { + const TargetInstrInfo *TII; + + public: + static char ID; + NEONPreAllocPass() : MachineFunctionPass(&ID) {} + + virtual bool runOnMachineFunction(MachineFunction &MF); + + virtual const char *getPassName() const { + return "NEON register pre-allocation pass"; + } + + private: + bool PreAllocNEONRegisters(MachineBasicBlock &MBB); + }; + + char NEONPreAllocPass::ID = 0; +} + +static bool isNEONMultiRegOp(int Opcode, unsigned &FirstOpnd, + unsigned &NumRegs) { + switch (Opcode) { + default: + break; + + case ARM::VLD2d8: + case ARM::VLD2d16: + case ARM::VLD2d32: + case ARM::VLD2d64: + FirstOpnd = 0; + NumRegs = 2; + return true; + + case ARM::VLD3d8: + case ARM::VLD3d16: + case ARM::VLD3d32: + case ARM::VLD3d64: + FirstOpnd = 0; + NumRegs = 3; + return true; + + case ARM::VLD4d8: + case ARM::VLD4d16: + case ARM::VLD4d32: + case ARM::VLD4d64: + FirstOpnd = 0; + NumRegs = 4; + return true; + } + + return false; +} + +bool NEONPreAllocPass::PreAllocNEONRegisters(MachineBasicBlock &MBB) { + bool Modified = false; + + MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end(); + for (; MBBI != E; ++MBBI) { + MachineInstr *MI = &*MBBI; + unsigned FirstOpnd, NumRegs; + if (!isNEONMultiRegOp(MI->getOpcode(), FirstOpnd, NumRegs)) + continue; + + MachineBasicBlock::iterator NextI = next(MBBI); + for (unsigned R = 0; R < NumRegs; ++R) { + MachineOperand &MO = MI->getOperand(FirstOpnd + R); + assert(MO.isReg() && MO.getSubReg() == 0 && "unexpected operand"); + unsigned VirtReg = MO.getReg(); + assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && + "expected a virtual register"); + + // For now, just assign a fixed set of adjacent registers. + // This leaves plenty of room for future improvements. + static const unsigned NEONDRegs[] = { + ARM::D0, ARM::D1, ARM::D2, ARM::D3 + }; + MO.setReg(NEONDRegs[R]); + + if (MO.isUse()) { + // Insert a copy from VirtReg. + AddDefaultPred(BuildMI(MBB, MBBI, MI->getDebugLoc(), + TII->get(ARM::FCPYD), MO.getReg()) + .addReg(VirtReg)); + if (MO.isKill()) { + MachineInstr *CopyMI = prior(MBBI); + CopyMI->findRegisterUseOperand(VirtReg)->setIsKill(); + } + MO.setIsKill(); + } else if (MO.isDef() && !MO.isDead()) { + // Add a copy to VirtReg. + AddDefaultPred(BuildMI(MBB, NextI, MI->getDebugLoc(), + TII->get(ARM::FCPYD), VirtReg) + .addReg(MO.getReg())); + } + } + } + + return Modified; +} + +bool NEONPreAllocPass::runOnMachineFunction(MachineFunction &MF) { + TII = MF.getTarget().getInstrInfo(); + + bool Modified = false; + for (MachineFunction::iterator MFI = MF.begin(), E = MF.end(); MFI != E; + ++MFI) { + MachineBasicBlock &MBB = *MFI; + Modified |= PreAllocNEONRegisters(MBB); + } + + return Modified; +} + +/// createNEONPreAllocPass - returns an instance of the NEON register +/// pre-allocation pass. +FunctionPass *llvm::createNEONPreAllocPass() { + return new NEONPreAllocPass(); +} From resistor at mac.com Wed Aug 5 18:16:10 2009 From: resistor at mac.com (Owen Anderson) Date: Wed, 05 Aug 2009 23:16:10 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r78257 - in /llvm-gcc-4.2/trunk/gcc: config/i386/llvm-i386.cpp llvm-abi.h llvm-backend.cpp llvm-convert.cpp llvm-types.cpp Message-ID: <200908052316.n75NGDiK021465@zion.cs.uiuc.edu> Author: resistor Date: Wed Aug 5 18:15:52 2009 New Revision: 78257 URL: http://llvm.org/viewvc/llvm-project?rev=78257&view=rev Log: Update for LLVM API change. Modified: llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp llvm-gcc-4.2/trunk/gcc/llvm-abi.h llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp llvm-gcc-4.2/trunk/gcc/llvm-types.cpp Modified: llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp?rev=78257&r1=78256&r2=78257&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp Wed Aug 5 18:15:52 2009 @@ -1313,12 +1313,12 @@ if (llvm_x86_should_not_return_complex_in_memory(type)) { ElementTypes.push_back(Type::X86_FP80Ty); ElementTypes.push_back(Type::X86_FP80Ty); - return StructType::get(ElementTypes, STy->isPacked()); + return StructType::get(Context, ElementTypes, STy->isPacked()); } std::vector GCCElts; llvm_x86_64_get_multiple_return_reg_classes(type, Ty, GCCElts); - return StructType::get(GCCElts, false); + return StructType::get(Context, GCCElts, false); } // llvm_x86_extract_mrv_array_element - Helper function that help extract Modified: llvm-gcc-4.2/trunk/gcc/llvm-abi.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-abi.h?rev=78257&r1=78256&r2=78257&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-abi.h (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-abi.h Wed Aug 5 18:15:52 2009 @@ -623,7 +623,7 @@ Size -= 1; } assert(Size == 0 && "Didn't cover value?"); - const StructType *STy = StructType::get(Elts, false); + const StructType *STy = StructType::get(getGlobalContext(), Elts, false); unsigned i = 0; if (ArraySize) { @@ -661,7 +661,7 @@ if (OrigElts[i]==Type::VoidTy) Elts[i] = wordType; - const StructType *STy = StructType::get(Elts, false); + const StructType *STy = StructType::get(getGlobalContext(), Elts, false); unsigned Size = getTargetData().getTypeAllocSize(STy); const StructType *InSTy = dyn_cast(Ty); @@ -1062,7 +1062,7 @@ Size -= 1; } assert(Size == 0 && "Didn't cover value?"); - const StructType *STy = StructType::get(Elts, false); + const StructType *STy = StructType::get(getGlobalContext(), Elts, false); unsigned i = 0; if (ArraySize) { @@ -1102,7 +1102,7 @@ if (OrigElts[i]==Type::VoidTy) Elts[i] = wordType; - const StructType *STy = StructType::get(Elts, false); + const StructType *STy = StructType::get(getGlobalContext(), Elts, false); unsigned Size = getTargetData().getTypeAllocSize(STy); const StructType *InSTy = dyn_cast(Ty); Modified: llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp?rev=78257&r1=78256&r2=78257&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Wed Aug 5 18:15:52 2009 @@ -292,7 +292,7 @@ } // Create string table. - Constant *LLVMValuesTable = ConstantStruct::get(ValuesForPCH, false); + Constant *LLVMValuesTable = ConstantStruct::get(Context, ValuesForPCH, false); // Create variable to hold this string table. new GlobalVariable(*TheModule, LLVMValuesTable->getType(), true, @@ -818,7 +818,7 @@ // __attribute__(constructor) can be on a function with any type. Make sure // the pointer is void()*. StructInit[1] = TheFolder->CreateBitCast(Tors[i].first, FPTy); - InitList.push_back(ConstantStruct::get(StructInit, false)); + InitList.push_back(ConstantStruct::get(Context, StructInit, false)); } Constant *Array = ConstantArray::get( ArrayType::get(InitList[0]->getType(), InitList.size()), InitList); @@ -1181,7 +1181,7 @@ }; AttributeAnnotateGlobals.push_back( - ConstantStruct::get(Element, 4, false)); + ConstantStruct::get(Context, Element, 4, false)); } // Get next annotate attribute. @@ -1621,7 +1621,8 @@ // If we have "extern void foo", make the global have type {} instead of // type void. - if (Ty == Type::VoidTy) Ty = StructType::get(NULL, NULL); + if (Ty == Type::VoidTy) + Ty = StructType::get(Context); if (Name[0] == 0) { // Global has no name. GV = new GlobalVariable(*TheModule, Ty, false, Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=78257&r1=78256&r2=78257&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Wed Aug 5 18:15:52 2009 @@ -4559,7 +4559,7 @@ default: std::vector TmpVec(CallResultTypes.begin(), CallResultTypes.end()); - CallResultType = StructType::get(TmpVec); + CallResultType = StructType::get(Context, TmpVec); break; } @@ -6778,7 +6778,7 @@ const Type *Ty = ConvertType(TREE_TYPE(exp)); // If we have "extern void foo", make the global have type {} instead of // type void. - if (Ty == Type::VoidTy) Ty = StructType::get(NULL, NULL); + if (Ty == Type::VoidTy) Ty = StructType::get(Context); const PointerType *PTy = PointerType::getUnqual(Ty); unsigned Alignment = Ty->isSized() ? TD.getABITypeAlignment(Ty) : 1; if (DECL_ALIGN(exp)) { @@ -7129,7 +7129,7 @@ std::vector Elts; Elts.push_back(Convert(TREE_REALPART(exp))); Elts.push_back(Convert(TREE_IMAGPART(exp))); - return ConstantStruct::get(Elts, false); + return ConstantStruct::get(Context, Elts, false); } Constant *TreeConstantToLLVM::ConvertNOP_EXPR(tree exp) { @@ -7315,7 +7315,7 @@ if (AllEltsSameType) return ConstantArray::get( ArrayType::get(ElTy, ResultElts.size()), ResultElts); - return ConstantStruct::get(ResultElts, false); + return ConstantStruct::get(Context, ResultElts, false); } @@ -7735,8 +7735,8 @@ LayoutInfo.HandleTailPadding(getInt64(StructTypeSizeTree, true)); // Okay, we're done, return the computed elements. - return - ConstantStruct::get(LayoutInfo.ResultElts, LayoutInfo.StructIsPacked); + return ConstantStruct::get(Context, LayoutInfo.ResultElts, + LayoutInfo.StructIsPacked); } Constant *TreeConstantToLLVM::ConvertUnionCONSTRUCTOR(tree exp) { @@ -7768,7 +7768,7 @@ Elts.push_back(Constant::getNullValue(FillTy)); } } - return ConstantStruct::get(Elts, false); + return ConstantStruct::get(Context, Elts, false); } //===----------------------------------------------------------------------===// Modified: llvm-gcc-4.2/trunk/gcc/llvm-types.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-types.cpp?rev=78257&r1=78256&r2=78257&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-types.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-types.cpp Wed Aug 5 18:15:52 2009 @@ -192,7 +192,7 @@ } // Create string table. - Constant *LTypesNameTable = ConstantStruct::get(LTypesNames, false); + Constant *LTypesNameTable = ConstantStruct::get(Context, LTypesNames, false); // Create variable to hold this string table. GlobalVariable *GV = new GlobalVariable(*TheModule, @@ -752,8 +752,8 @@ #else // 128-bit long doubles map onto { double, double }. return SET_TYPE_LLVM(type, - StructType::get(Type::DoubleTy, Type::DoubleTy, - NULL)); + StructType::get(Context, Type::DoubleTy, + Type::DoubleTy, NULL)); #endif } @@ -761,7 +761,7 @@ if (const Type *Ty = GET_TYPE_LLVM(type)) return Ty; const Type *Ty = ConvertType(TREE_TYPE(type)); assert(!Ty->isAbstract() && "should use TypeDB.setType()"); - return SET_TYPE_LLVM(type, StructType::get(Ty, Ty, NULL)); + return SET_TYPE_LLVM(type, StructType::get(Context, Ty, Ty, NULL)); } case VECTOR_TYPE: { if (const Type *Ty = GET_TYPE_LLVM(type)) return Ty; @@ -1358,7 +1358,7 @@ const Type *getLLVMType() const { // Use Packed type if Packed is set or all struct fields are bitfields. // Empty struct is not packed unless packed is set. - return StructType::get(Elements, + return StructType::get(Context, Elements, Packed || (!Elements.empty() && AllBitFields)); } @@ -2448,7 +2448,7 @@ } bool isPacked = 8 * EltAlign > TYPE_ALIGN(type); - const Type *ResultTy = StructType::get(UnionElts, isPacked); + const Type *ResultTy = StructType::get(Context, UnionElts, isPacked); const OpaqueType *OldTy = cast_or_null(GET_TYPE_LLVM(type)); TypeDB.setType(type, ResultTy); From resistor at mac.com Wed Aug 5 18:16:18 2009 From: resistor at mac.com (Owen Anderson) Date: Wed, 05 Aug 2009 23:16:18 -0000 Subject: [llvm-commits] [llvm] r78258 - in /llvm/trunk: include/llvm/ lib/Analysis/ lib/AsmParser/ lib/Bitcode/Reader/ lib/CodeGen/ lib/Debugger/ lib/Transforms/IPO/ lib/Transforms/Utils/ lib/VMCore/ tools/bugpoint/ utils/TableGen/ Message-ID: <200908052316.n75NGRkj021499@zion.cs.uiuc.edu> Author: resistor Date: Wed Aug 5 18:16:16 2009 New Revision: 78258 URL: http://llvm.org/viewvc/llvm-project?rev=78258&view=rev Log: Privatize the StructType table, which unfortunately involves routing contexts through a number of APIs. Modified: llvm/trunk/include/llvm/Constants.h llvm/trunk/include/llvm/DerivedTypes.h llvm/trunk/lib/Analysis/DebugInfo.cpp llvm/trunk/lib/AsmParser/LLParser.cpp llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp llvm/trunk/lib/CodeGen/ShadowStackGC.cpp llvm/trunk/lib/Debugger/ProgramInfo.cpp llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp llvm/trunk/lib/Transforms/Utils/LowerInvoke.cpp llvm/trunk/lib/VMCore/ConstantFold.cpp llvm/trunk/lib/VMCore/Constants.cpp llvm/trunk/lib/VMCore/Core.cpp llvm/trunk/lib/VMCore/LLVMContextImpl.h llvm/trunk/lib/VMCore/Type.cpp llvm/trunk/tools/bugpoint/ExtractFunction.cpp llvm/trunk/utils/TableGen/IntrinsicEmitter.cpp Modified: llvm/trunk/include/llvm/Constants.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Constants.h?rev=78258&r1=78257&r2=78258&view=diff ============================================================================== --- llvm/trunk/include/llvm/Constants.h (original) +++ llvm/trunk/include/llvm/Constants.h Wed Aug 5 18:16:16 2009 @@ -407,8 +407,10 @@ public: // ConstantStruct accessors static Constant* get(const StructType* T, const std::vector& V); - static Constant* get(const std::vector& V, bool Packed = false); - static Constant* get(Constant* const *Vals, unsigned NumVals, + static Constant* get(LLVMContext &Context, + const std::vector& V, bool Packed = false); + static Constant* get(LLVMContext &Context, + Constant* const *Vals, unsigned NumVals, bool Packed = false); /// Transparently provide more efficient getOperand methods. Modified: llvm/trunk/include/llvm/DerivedTypes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/DerivedTypes.h?rev=78258&r1=78257&r2=78258&view=diff ============================================================================== --- llvm/trunk/include/llvm/DerivedTypes.h (original) +++ llvm/trunk/include/llvm/DerivedTypes.h Wed Aug 5 18:16:16 2009 @@ -31,6 +31,7 @@ class VectorValType; class IntegerValType; class APInt; +struct LLVMContext; class DerivedType : public Type { friend class Type; @@ -240,20 +241,22 @@ /// StructType::get - This static method is the primary way to create a /// StructType. /// - static StructType *get(const std::vector &Params, + static StructType *get(LLVMContext &Context, + const std::vector &Params, bool isPacked=false); /// StructType::get - Create an empty structure type. /// - static StructType *get(bool isPacked=false) { - return get(std::vector(), isPacked); + static StructType *get(LLVMContext &Context, bool isPacked=false) { + return get(Context, std::vector(), isPacked); } /// StructType::get - This static method is a convenience method for /// creating structure types by specifying the elements as arguments. /// Note that this method always returns a non-packed struct. To get /// an empty struct, pass NULL, NULL. - static StructType *get(const Type *type, ...) END_WITH_NULL; + static StructType *get(LLVMContext &Context, + const Type *type, ...) END_WITH_NULL; /// isValidElementType - Return true if the specified type is valid as a /// element type. Modified: llvm/trunk/lib/Analysis/DebugInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/DebugInfo.cpp?rev=78258&r1=78257&r2=78258&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/DebugInfo.cpp (original) +++ llvm/trunk/lib/Analysis/DebugInfo.cpp Wed Aug 5 18:16:16 2009 @@ -470,7 +470,7 @@ : M(m), VMContext(M.getContext()), StopPointFn(0), FuncStartFn(0), RegionStartFn(0), RegionEndFn(0), DeclareFn(0) { - EmptyStructPtr = PointerType::getUnqual(StructType::get()); + EmptyStructPtr = PointerType::getUnqual(StructType::get(VMContext)); } /// getCastToEmpty - Return this descriptor as a Constant* with type '{}*'. @@ -546,7 +546,8 @@ ConstantInt::get(Type::Int64Ty, Hi) }; - Constant *Init = ConstantStruct::get(Elts, sizeof(Elts)/sizeof(Elts[0])); + Constant *Init = ConstantStruct::get(VMContext, Elts, + sizeof(Elts)/sizeof(Elts[0])); // If we already have this range, just return the uniqued version. DIDescriptor &Entry = SimpleConstantCache[Init]; @@ -587,7 +588,8 @@ ConstantInt::get(Type::Int32Ty, RunTimeVer) }; - Constant *Init = ConstantStruct::get(Elts, sizeof(Elts)/sizeof(Elts[0])); + Constant *Init = ConstantStruct::get(VMContext, Elts, + sizeof(Elts)/sizeof(Elts[0])); M.addTypeName("llvm.dbg.compile_unit.type", Init->getType()); GlobalVariable *GV = new GlobalVariable(M, Init->getType(), true, @@ -605,7 +607,8 @@ ConstantInt::get(Type::Int64Ty, Val) }; - Constant *Init = ConstantStruct::get(Elts, sizeof(Elts)/sizeof(Elts[0])); + Constant *Init = ConstantStruct::get(VMContext, Elts, + sizeof(Elts)/sizeof(Elts[0])); M.addTypeName("llvm.dbg.enumerator.type", Init->getType()); GlobalVariable *GV = new GlobalVariable(M, Init->getType(), true, @@ -638,7 +641,8 @@ ConstantInt::get(Type::Int32Ty, Encoding) }; - Constant *Init = ConstantStruct::get(Elts, sizeof(Elts)/sizeof(Elts[0])); + Constant *Init = ConstantStruct::get(VMContext, Elts, + sizeof(Elts)/sizeof(Elts[0])); M.addTypeName("llvm.dbg.basictype.type", Init->getType()); GlobalVariable *GV = new GlobalVariable(M, Init->getType(), true, @@ -673,7 +677,8 @@ getCastToEmpty(DerivedFrom) }; - Constant *Init = ConstantStruct::get(Elts, sizeof(Elts)/sizeof(Elts[0])); + Constant *Init = ConstantStruct::get(VMContext, Elts, + sizeof(Elts)/sizeof(Elts[0])); M.addTypeName("llvm.dbg.derivedtype.type", Init->getType()); GlobalVariable *GV = new GlobalVariable(M, Init->getType(), true, @@ -712,7 +717,8 @@ ConstantInt::get(Type::Int32Ty, RuntimeLang) }; - Constant *Init = ConstantStruct::get(Elts, sizeof(Elts)/sizeof(Elts[0])); + Constant *Init = ConstantStruct::get(VMContext, Elts, + sizeof(Elts)/sizeof(Elts[0])); M.addTypeName("llvm.dbg.composite.type", Init->getType()); GlobalVariable *GV = new GlobalVariable(M, Init->getType(), true, @@ -749,7 +755,8 @@ ConstantInt::get(Type::Int1Ty, isDefinition) }; - Constant *Init = ConstantStruct::get(Elts, sizeof(Elts)/sizeof(Elts[0])); + Constant *Init = ConstantStruct::get(VMContext, Elts, + sizeof(Elts)/sizeof(Elts[0])); M.addTypeName("llvm.dbg.subprogram.type", Init->getType()); GlobalVariable *GV = new GlobalVariable(M, Init->getType(), true, @@ -782,7 +789,8 @@ ConstantExpr::getBitCast(Val, EmptyStructPtr) }; - Constant *Init = ConstantStruct::get(Elts, sizeof(Elts)/sizeof(Elts[0])); + Constant *Init = ConstantStruct::get(VMContext, Elts, + sizeof(Elts)/sizeof(Elts[0])); M.addTypeName("llvm.dbg.global_variable.type", Init->getType()); GlobalVariable *GV = new GlobalVariable(M, Init->getType(), true, @@ -807,7 +815,8 @@ getCastToEmpty(Type) }; - Constant *Init = ConstantStruct::get(Elts, sizeof(Elts)/sizeof(Elts[0])); + Constant *Init = ConstantStruct::get(VMContext, Elts, + sizeof(Elts)/sizeof(Elts[0])); M.addTypeName("llvm.dbg.variable.type", Init->getType()); GlobalVariable *GV = new GlobalVariable(M, Init->getType(), true, @@ -826,7 +835,8 @@ getCastToEmpty(Context) }; - Constant *Init = ConstantStruct::get(Elts, sizeof(Elts)/sizeof(Elts[0])); + Constant *Init = ConstantStruct::get(VMContext, Elts, + sizeof(Elts)/sizeof(Elts[0])); M.addTypeName("llvm.dbg.block.type", Init->getType()); GlobalVariable *GV = new GlobalVariable(M, Init->getType(), true, Modified: llvm/trunk/lib/AsmParser/LLParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/LLParser.cpp?rev=78258&r1=78257&r2=78258&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/LLParser.cpp (original) +++ llvm/trunk/lib/AsmParser/LLParser.cpp Wed Aug 5 18:16:16 2009 @@ -1381,7 +1381,7 @@ Lex.Lex(); // Consume the '{' if (EatIfPresent(lltok::rbrace)) { - Result = StructType::get(Packed); + Result = StructType::get(Context, Packed); return false; } @@ -1413,7 +1413,7 @@ std::vector ParamsListTy; for (unsigned i = 0, e = ParamsList.size(); i != e; ++i) ParamsListTy.push_back(ParamsList[i].get()); - Result = HandleUpRefs(StructType::get(ParamsListTy, Packed)); + Result = HandleUpRefs(StructType::get(Context, ParamsListTy, Packed)); return false; } @@ -1772,7 +1772,8 @@ ParseToken(lltok::rbrace, "expected end of struct constant")) return true; - ID.ConstantVal = ConstantStruct::get(Elts.data(), Elts.size(), false); + ID.ConstantVal = ConstantStruct::get(Context, Elts.data(), + Elts.size(), false); ID.Kind = ValID::t_Constant; return false; } @@ -1792,7 +1793,7 @@ if (isPackedStruct) { ID.ConstantVal = - ConstantStruct::get(Elts.data(), Elts.size(), true); + ConstantStruct::get(Context, Elts.data(), Elts.size(), true); ID.Kind = ValID::t_Constant; return false; } Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp?rev=78258&r1=78257&r2=78258&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp (original) +++ llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Wed Aug 5 18:16:16 2009 @@ -292,7 +292,7 @@ NewC = ConstantArray::get(UserCA->getType(), &NewOps[0], NewOps.size()); } else if (ConstantStruct *UserCS = dyn_cast(UserC)) { - NewC = ConstantStruct::get(&NewOps[0], NewOps.size(), + NewC = ConstantStruct::get(Context, &NewOps[0], NewOps.size(), UserCS->getType()->isPacked()); } else if (isa(UserC)) { NewC = ConstantVector::get(&NewOps[0], NewOps.size()); @@ -580,7 +580,7 @@ std::vector EltTys; for (unsigned i = 1, e = Record.size(); i != e; ++i) EltTys.push_back(getTypeByID(Record[i], true)); - ResultTy = StructType::get(EltTys, Record[0]); + ResultTy = StructType::get(Context, EltTys, Record[0]); break; } case bitc::TYPE_CODE_ARRAY: // ARRAY: [numelts, eltty] Modified: llvm/trunk/lib/CodeGen/ShadowStackGC.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ShadowStackGC.cpp?rev=78258&r1=78257&r2=78258&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/ShadowStackGC.cpp (original) +++ llvm/trunk/lib/CodeGen/ShadowStackGC.cpp Wed Aug 5 18:16:16 2009 @@ -206,12 +206,12 @@ }; Constant *DescriptorElts[] = { - ConstantStruct::get(BaseElts, 2), + ConstantStruct::get(F.getContext(), BaseElts, 2), ConstantArray::get(ArrayType::get(VoidPtr, NumMeta), Metadata.begin(), NumMeta) }; - Constant *FrameMap = ConstantStruct::get(DescriptorElts, 2); + Constant *FrameMap = ConstantStruct::get(F.getContext(), DescriptorElts, 2); std::string TypeName("gc_map."); TypeName += utostr(NumMeta); @@ -245,7 +245,7 @@ EltTys.push_back(StackEntryTy); for (size_t I = 0; I != Roots.size(); I++) EltTys.push_back(Roots[I].second->getAllocatedType()); - Type *Ty = StructType::get(EltTys); + Type *Ty = StructType::get(F.getContext(), EltTys); std::string TypeName("gc_stackentry."); TypeName += F.getName(); @@ -265,7 +265,7 @@ std::vector EltTys; EltTys.push_back(Type::Int32Ty); // 32 bits is ok up to a 32GB stack frame. :) EltTys.push_back(Type::Int32Ty); // Specifies length of variable length array. - StructType *FrameMapTy = StructType::get(EltTys); + StructType *FrameMapTy = StructType::get(M.getContext(), EltTys); M.addTypeName("gc_map", FrameMapTy); PointerType *FrameMapPtrTy = PointerType::getUnqual(FrameMapTy); @@ -279,7 +279,7 @@ EltTys.clear(); EltTys.push_back(PointerType::getUnqual(RecursiveTy)); EltTys.push_back(FrameMapPtrTy); - PATypeHolder LinkTyH = StructType::get(EltTys); + PATypeHolder LinkTyH = StructType::get(M.getContext(), EltTys); RecursiveTy->refineAbstractTypeTo(LinkTyH.get()); StackEntryTy = cast(LinkTyH.get()); Modified: llvm/trunk/lib/Debugger/ProgramInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Debugger/ProgramInfo.cpp?rev=78258&r1=78257&r2=78258&view=diff ============================================================================== --- llvm/trunk/lib/Debugger/ProgramInfo.cpp (original) +++ llvm/trunk/lib/Debugger/ProgramInfo.cpp Wed Aug 5 18:16:16 2009 @@ -271,7 +271,8 @@ // should be on the use list of the llvm.dbg.translation_units global. // GlobalVariable *Units = - M->getGlobalVariable("llvm.dbg.translation_units", StructType::get()); + M->getGlobalVariable("llvm.dbg.translation_units", + StructType::get(M->getContext())); if (Units == 0) throw "Program contains no debugging information!"; @@ -353,7 +354,7 @@ // should be on the use list of the llvm.dbg.translation_units global. // GlobalVariable *Units = - M->getGlobalVariable("llvm.dbg.globals", StructType::get()); + M->getGlobalVariable("llvm.dbg.globals", StructType::get(M->getContext())); if (Units == 0) throw "Program contains no debugging information!"; Modified: llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp?rev=78258&r1=78257&r2=78258&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp Wed Aug 5 18:16:16 2009 @@ -638,7 +638,7 @@ // something and {} into void. // Make the new struct packed if we used to return a packed struct // already. - NRetTy = StructType::get(RetTypes, STy->isPacked()); + NRetTy = StructType::get(STy->getContext(), RetTypes, STy->isPacked()); else if (RetTypes.size() == 1) // One return type? Just a simple value then, but only if we didn't use to // return a struct with that simple value before. Modified: llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp?rev=78258&r1=78257&r2=78258&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp Wed Aug 5 18:16:16 2009 @@ -1961,7 +1961,7 @@ CSVals[1] = Constant::getNullValue(PFTy); CSVals[0] = ConstantInt::get(Type::Int32Ty, 2147483647); } - CAList.push_back(ConstantStruct::get(CSVals)); + CAList.push_back(ConstantStruct::get(Context, CSVals)); } // Create the array initializer. @@ -2069,7 +2069,7 @@ Elts[Idx] = EvaluateStoreInto(Elts[Idx], Val, Addr, OpNo+1, Context); // Return the modified struct. - return ConstantStruct::get(&Elts[0], Elts.size(), STy->isPacked()); + return ConstantStruct::get(Context, &Elts[0], Elts.size(), STy->isPacked()); } else { ConstantInt *CI = cast(Addr->getOperand(OpNo)); const ArrayType *ATy = cast(Init->getType()); Modified: llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp?rev=78258&r1=78257&r2=78258&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp Wed Aug 5 18:16:16 2009 @@ -275,7 +275,7 @@ if (AggregateArgs && (inputs.size() + outputs.size() > 0)) { PointerType *StructPtr = - PointerType::getUnqual(StructType::get(paramTy)); + PointerType::getUnqual(StructType::get(M->getContext(), paramTy)); paramTy.clear(); paramTy.push_back(StructPtr); } @@ -382,7 +382,7 @@ ArgTypes.push_back((*v)->getType()); // Allocate a struct at the beginning of this function - Type *StructArgTy = StructType::get(ArgTypes); + Type *StructArgTy = StructType::get(newFunction->getContext(), ArgTypes); Struct = new AllocaInst(StructArgTy, 0, "structArg", codeReplacer->getParent()->begin()->begin()); Modified: llvm/trunk/lib/Transforms/Utils/LowerInvoke.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/LowerInvoke.cpp?rev=78258&r1=78257&r2=78258&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/LowerInvoke.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/LowerInvoke.cpp Wed Aug 5 18:16:16 2009 @@ -128,7 +128,7 @@ Elements.push_back(JmpBufTy); OpaqueType *OT = OpaqueType::get(); Elements.push_back(PointerType::getUnqual(OT)); - PATypeHolder JBLType(StructType::get(Elements)); + PATypeHolder JBLType(StructType::get(M.getContext(), Elements)); OT->refineAbstractTypeTo(JBLType.get()); // Complete the cycle. JBLinkTy = JBLType.get(); M.addTypeName("llvm.sjljeh.jmpbufty", JBLinkTy); Modified: llvm/trunk/lib/VMCore/ConstantFold.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/ConstantFold.cpp?rev=78258&r1=78257&r2=78258&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/ConstantFold.cpp (original) +++ llvm/trunk/lib/VMCore/ConstantFold.cpp Wed Aug 5 18:16:16 2009 @@ -519,7 +519,7 @@ Ops[i] = const_cast(Op); } if (isa(AggTy)) - return ConstantStruct::get(Ops); + return ConstantStruct::get(Context, Ops); else return ConstantArray::get(cast(AggTy), Ops); } @@ -548,7 +548,7 @@ Ops[i] = const_cast(Op); } if (isa(AggTy)) - return ConstantStruct::get(Ops); + return ConstantStruct::get(Context, Ops); else return ConstantArray::get(cast(AggTy), Ops); } @@ -565,7 +565,7 @@ } Constant *C; if (isa(Agg->getType())) - C = ConstantStruct::get(Ops); + C = ConstantStruct::get(Context, Ops); else C = ConstantArray::get(cast(Agg->getType()), Ops); return C; Modified: llvm/trunk/lib/VMCore/Constants.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Constants.cpp?rev=78258&r1=78257&r2=78258&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Constants.cpp (original) +++ llvm/trunk/lib/VMCore/Constants.cpp Wed Aug 5 18:16:16 2009 @@ -532,18 +532,20 @@ return ConstantAggregateZero::get(T); } -Constant* ConstantStruct::get(const std::vector& V, bool packed) { +Constant* ConstantStruct::get(LLVMContext &Context, + const std::vector& V, bool packed) { std::vector StructEls; StructEls.reserve(V.size()); for (unsigned i = 0, e = V.size(); i != e; ++i) StructEls.push_back(V[i]->getType()); - return get(StructType::get(StructEls, packed), V); + return get(StructType::get(Context, StructEls, packed), V); } -Constant* ConstantStruct::get(Constant* const *Vals, unsigned NumVals, +Constant* ConstantStruct::get(LLVMContext &Context, + Constant* const *Vals, unsigned NumVals, bool Packed) { // FIXME: make this the primary ctor method. - return get(std::vector(Vals, Vals+NumVals), Packed); + return get(Context, std::vector(Vals, Vals+NumVals), Packed); } ConstantVector::ConstantVector(const VectorType *T, @@ -1355,7 +1357,8 @@ Constant* ConstantExpr::getAlignOf(const Type* Ty) { // alignof is implemented as: (i64) gep ({i8,Ty}*)null, 0, 1 - const Type *AligningTy = StructType::get(Type::Int8Ty, Ty, NULL); + const Type *AligningTy = StructType::get(Ty->getContext(), + Type::Int8Ty, Ty, NULL); Constant *NullPtr = Constant::getNullValue(AligningTy->getPointerTo()); Constant *Zero = ConstantInt::get(Type::Int32Ty, 0); Constant *One = ConstantInt::get(Type::Int32Ty, 1); Modified: llvm/trunk/lib/VMCore/Core.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Core.cpp?rev=78258&r1=78257&r2=78258&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Core.cpp (original) +++ llvm/trunk/lib/VMCore/Core.cpp Wed Aug 5 18:16:16 2009 @@ -217,7 +217,7 @@ *E = ElementTypes + ElementCount; I != E; ++I) Tys.push_back(unwrap(*I)); - return wrap(StructType::get(Tys, Packed != 0)); + return wrap(StructType::get(getGlobalContext(), Tys, Packed != 0)); } unsigned LLVMCountStructElementTypes(LLVMTypeRef StructTy) { @@ -411,7 +411,8 @@ LLVMValueRef LLVMConstStruct(LLVMValueRef *ConstantVals, unsigned Count, int Packed) { - return wrap(ConstantStruct::get(unwrap(ConstantVals, Count), + return wrap(ConstantStruct::get(getGlobalContext(), + unwrap(ConstantVals, Count), Count, Packed != 0)); } Modified: llvm/trunk/lib/VMCore/LLVMContextImpl.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/LLVMContextImpl.h?rev=78258&r1=78257&r2=78258&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/LLVMContextImpl.h (original) +++ llvm/trunk/lib/VMCore/LLVMContextImpl.h Wed Aug 5 18:16:16 2009 @@ -132,6 +132,7 @@ TypeMap VectorTypes; TypeMap PointerTypes; TypeMap FunctionTypes; + TypeMap StructTypes; LLVMContextImpl() : TheTrueVal(0), TheFalseVal(0) { } }; Modified: llvm/trunk/lib/VMCore/Type.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Type.cpp?rev=78258&r1=78257&r2=78258&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Type.cpp (original) +++ llvm/trunk/lib/VMCore/Type.cpp Wed Aug 5 18:16:16 2009 @@ -849,22 +849,23 @@ // Struct Type Factory... // -static ManagedStatic > StructTypes; - -StructType *StructType::get(const std::vector &ETypes, +StructType *StructType::get(LLVMContext &Context, + const std::vector &ETypes, bool isPacked) { StructValType STV(ETypes, isPacked); StructType *ST = 0; + LLVMContextImpl *pImpl = Context.pImpl; + sys::SmartScopedLock L(*TypeMapLock); - ST = StructTypes->get(STV); + ST = pImpl->StructTypes.get(STV); if (!ST) { // Value not found. Derive a new type! ST = (StructType*) operator new(sizeof(StructType) + sizeof(PATypeHandle) * ETypes.size()); new (ST) StructType(ETypes, isPacked); - StructTypes->add(STV, ST); + pImpl->StructTypes.add(STV, ST); } #ifdef DEBUG_MERGE_TYPES DOUT << "Derived new type: " << *ST << "\n"; @@ -872,7 +873,7 @@ return ST; } -StructType *StructType::get(const Type *type, ...) { +StructType *StructType::get(LLVMContext &Context, const Type *type, ...) { va_list ap; std::vector StructFields; va_start(ap, type); @@ -880,7 +881,7 @@ StructFields.push_back(type); type = va_arg(ap, llvm::Type*); } - return llvm::StructType::get(StructFields); + return llvm::StructType::get(Context, StructFields); } bool StructType::isValidElementType(const Type *ElemTy) { @@ -1146,11 +1147,13 @@ // void StructType::refineAbstractType(const DerivedType *OldType, const Type *NewType) { - StructTypes->RefineAbstractType(this, OldType, NewType); + LLVMContextImpl *pImpl = OldType->getContext().pImpl; + pImpl->StructTypes.RefineAbstractType(this, OldType, NewType); } void StructType::typeBecameConcrete(const DerivedType *AbsTy) { - StructTypes->TypeBecameConcrete(this, AbsTy); + LLVMContextImpl *pImpl = AbsTy->getContext().pImpl; + pImpl->StructTypes.TypeBecameConcrete(this, AbsTy); } // refineAbstractType - Called when a contained type is found to be more Modified: llvm/trunk/tools/bugpoint/ExtractFunction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/ExtractFunction.cpp?rev=78258&r1=78257&r2=78258&view=diff ============================================================================== --- llvm/trunk/tools/bugpoint/ExtractFunction.cpp (original) +++ llvm/trunk/tools/bugpoint/ExtractFunction.cpp Wed Aug 5 18:16:16 2009 @@ -186,7 +186,8 @@ std::vector Elts; Elts.push_back(ConstantInt::get(Type::Int32Ty, TorList[i].second)); Elts.push_back(TorList[i].first); - ArrayElts.push_back(ConstantStruct::get(Elts)); + ArrayElts.push_back(ConstantStruct::get( + TorList[i].first->getContext(), Elts)); } return ConstantArray::get(ArrayType::get(ArrayElts[0]->getType(), ArrayElts.size()), Modified: llvm/trunk/utils/TableGen/IntrinsicEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/IntrinsicEmitter.cpp?rev=78258&r1=78257&r2=78258&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/IntrinsicEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/IntrinsicEmitter.cpp Wed Aug 5 18:16:16 2009 @@ -146,7 +146,7 @@ OS << "IntegerType::get(" << BitWidth << ")"; } else if (VT == MVT::Other) { // MVT::OtherVT is used to mean the empty struct type here. - OS << "StructType::get()"; + OS << "StructType::get(Context)"; } else if (VT == MVT::f32) { OS << "Type::FloatTy"; } else if (VT == MVT::f64) { @@ -177,7 +177,7 @@ return; } - OS << "StructType::get("; + OS << "StructType::get(Context, "; for (std::vector::const_iterator I = ArgTypes.begin(), E = ArgTypes.end(); I != E; ++I) { From resistor at mac.com Wed Aug 5 18:29:30 2009 From: resistor at mac.com (Owen Anderson) Date: Wed, 05 Aug 2009 23:29:30 -0000 Subject: [llvm-commits] [llvm] r78260 - /llvm/trunk/unittests/Support/TypeBuilderTest.cpp Message-ID: <200908052329.n75NTYNY021933@zion.cs.uiuc.edu> Author: resistor Date: Wed Aug 5 18:28:57 2009 New Revision: 78260 URL: http://llvm.org/viewvc/llvm-project?rev=78260&view=rev Log: Update unit test. Modified: llvm/trunk/unittests/Support/TypeBuilderTest.cpp Modified: llvm/trunk/unittests/Support/TypeBuilderTest.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/Support/TypeBuilderTest.cpp?rev=78260&r1=78259&r2=78260&view=diff ============================================================================== --- llvm/trunk/unittests/Support/TypeBuilderTest.cpp (original) +++ llvm/trunk/unittests/Support/TypeBuilderTest.cpp Wed Aug 5 18:28:57 2009 @@ -171,7 +171,7 @@ st.push_back(TypeBuilder::get(Context)); st.push_back(TypeBuilder::get(Context)); st.push_back(TypeBuilder::get(Context)); - static const StructType *const result = StructType::get(st); + static const StructType *const result = StructType::get(Context, st); return result; } @@ -194,7 +194,7 @@ st.push_back(TypeBuilder, cross>::get(Context)); st.push_back(TypeBuilder*, cross>::get(Context)); st.push_back(TypeBuilder*[], cross>::get(Context)); - static const StructType *const result = StructType::get(st); + static const StructType *const result = StructType::get(Context, st); return result; } @@ -211,19 +211,19 @@ namespace { TEST(TypeBuilderTest, Extensions) { - EXPECT_EQ(PointerType::getUnqual(StructType::get( + EXPECT_EQ(PointerType::getUnqual(StructType::get(getGlobalContext(), TypeBuilder::get(getGlobalContext()), TypeBuilder::get(getGlobalContext()), TypeBuilder::get(getGlobalContext()), NULL)), (TypeBuilder::get(getGlobalContext()))); - EXPECT_EQ(PointerType::getUnqual(StructType::get( + EXPECT_EQ(PointerType::getUnqual(StructType::get(getGlobalContext(), TypeBuilder, false>::get(getGlobalContext()), TypeBuilder*, false>::get(getGlobalContext()), TypeBuilder*[], false>::get(getGlobalContext()), NULL)), (TypeBuilder::get(getGlobalContext()))); - EXPECT_EQ(PointerType::getUnqual(StructType::get( + EXPECT_EQ(PointerType::getUnqual(StructType::get(getGlobalContext(), TypeBuilder, false>::get(getGlobalContext()), TypeBuilder*, false>::get(getGlobalContext()), TypeBuilder*[], false>::get(getGlobalContext()), From bob.wilson at apple.com Wed Aug 5 18:51:48 2009 From: bob.wilson at apple.com (Bob Wilson) Date: Wed, 05 Aug 2009 23:51:48 -0000 Subject: [llvm-commits] [llvm] r78261 - in /llvm/trunk/test/CodeGen/ARM: vld1.ll vst1.ll Message-ID: <200908052351.n75NpqRW022725@zion.cs.uiuc.edu> Author: bwilson Date: Wed Aug 5 18:51:20 2009 New Revision: 78261 URL: http://llvm.org/viewvc/llvm-project?rev=78261&view=rev Log: Convert more Neon tests to FileCheck. Modified: llvm/trunk/test/CodeGen/ARM/vld1.ll llvm/trunk/test/CodeGen/ARM/vst1.ll Modified: llvm/trunk/test/CodeGen/ARM/vld1.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vld1.ll?rev=78261&r1=78260&r2=78261&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/vld1.ll (original) +++ llvm/trunk/test/CodeGen/ARM/vld1.ll Wed Aug 5 18:51:20 2009 @@ -1,55 +1,71 @@ -; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t -; RUN: grep {vld1\\.8} %t | count 2 -; RUN: grep {vld1\\.16} %t | count 2 -; RUN: grep {vld1\\.32} %t | count 4 -; RUN: grep {vld1\\.64} %t | count 2 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s define <8 x i8> @vld1i8(i8* %A) nounwind { +;CHECK: vld1i8: +;CHECK: vld1.8 %tmp1 = call <8 x i8> @llvm.arm.neon.vld1i.v8i8(i8* %A) ret <8 x i8> %tmp1 } define <4 x i16> @vld1i16(i16* %A) nounwind { +;CHECK: vld1i16: +;CHECK: vld1.16 %tmp1 = call <4 x i16> @llvm.arm.neon.vld1i.v4i16(i16* %A) ret <4 x i16> %tmp1 } define <2 x i32> @vld1i32(i32* %A) nounwind { +;CHECK: vld1i32: +;CHECK: vld1.32 %tmp1 = call <2 x i32> @llvm.arm.neon.vld1i.v2i32(i32* %A) ret <2 x i32> %tmp1 } define <2 x float> @vld1f(float* %A) nounwind { +;CHECK: vld1f: +;CHECK: vld1.32 %tmp1 = call <2 x float> @llvm.arm.neon.vld1f.v2f32(float* %A) ret <2 x float> %tmp1 } define <1 x i64> @vld1i64(i64* %A) nounwind { +;CHECK: vld1i64: +;CHECK: vld1.64 %tmp1 = call <1 x i64> @llvm.arm.neon.vld1i.v1i64(i64* %A) ret <1 x i64> %tmp1 } define <16 x i8> @vld1Qi8(i8* %A) nounwind { +;CHECK: vld1Qi8: +;CHECK: vld1.8 %tmp1 = call <16 x i8> @llvm.arm.neon.vld1i.v16i8(i8* %A) ret <16 x i8> %tmp1 } define <8 x i16> @vld1Qi16(i16* %A) nounwind { +;CHECK: vld1Qi16: +;CHECK: vld1.16 %tmp1 = call <8 x i16> @llvm.arm.neon.vld1i.v8i16(i16* %A) ret <8 x i16> %tmp1 } define <4 x i32> @vld1Qi32(i32* %A) nounwind { +;CHECK: vld1Qi32: +;CHECK: vld1.32 %tmp1 = call <4 x i32> @llvm.arm.neon.vld1i.v4i32(i32* %A) ret <4 x i32> %tmp1 } define <4 x float> @vld1Qf(float* %A) nounwind { +;CHECK: vld1Qf: +;CHECK: vld1.32 %tmp1 = call <4 x float> @llvm.arm.neon.vld1f.v4f32(float* %A) ret <4 x float> %tmp1 } define <2 x i64> @vld1Qi64(i64* %A) nounwind { +;CHECK: vld1Qi64: +;CHECK: vld1.64 %tmp1 = call <2 x i64> @llvm.arm.neon.vld1i.v2i64(i64* %A) ret <2 x i64> %tmp1 } Modified: llvm/trunk/test/CodeGen/ARM/vst1.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vst1.ll?rev=78261&r1=78260&r2=78261&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/vst1.ll (original) +++ llvm/trunk/test/CodeGen/ARM/vst1.ll Wed Aug 5 18:51:20 2009 @@ -1,64 +1,80 @@ -; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t -; RUN: grep {vst1\\.8} %t | count 2 -; RUN: grep {vst1\\.16} %t | count 2 -; RUN: grep {vst1\\.32} %t | count 4 -; RUN: grep {vst1\\.64} %t | count 2 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s define void @vst1i8(i8* %A, <8 x i8>* %B) nounwind { +;CHECK: vst1i8: +;CHECK: vst1.8 %tmp1 = load <8 x i8>* %B call void @llvm.arm.neon.vst1i.v8i8(i8* %A, <8 x i8> %tmp1) ret void } define void @vst1i16(i16* %A, <4 x i16>* %B) nounwind { +;CHECK: vst1i16: +;CHECK: vst1.16 %tmp1 = load <4 x i16>* %B call void @llvm.arm.neon.vst1i.v4i16(i16* %A, <4 x i16> %tmp1) ret void } define void @vst1i32(i32* %A, <2 x i32>* %B) nounwind { +;CHECK: vst1i32: +;CHECK: vst1.32 %tmp1 = load <2 x i32>* %B call void @llvm.arm.neon.vst1i.v2i32(i32* %A, <2 x i32> %tmp1) ret void } define void @vst1f(float* %A, <2 x float>* %B) nounwind { +;CHECK: vst1f: +;CHECK: vst1.32 %tmp1 = load <2 x float>* %B call void @llvm.arm.neon.vst1f.v2f32(float* %A, <2 x float> %tmp1) ret void } define void @vst1i64(i64* %A, <1 x i64>* %B) nounwind { +;CHECK: vst1i64: +;CHECK: vst1.64 %tmp1 = load <1 x i64>* %B call void @llvm.arm.neon.vst1i.v1i64(i64* %A, <1 x i64> %tmp1) ret void } define void @vst1Qi8(i8* %A, <16 x i8>* %B) nounwind { +;CHECK: vst1Qi8: +;CHECK: vst1.8 %tmp1 = load <16 x i8>* %B call void @llvm.arm.neon.vst1i.v16i8(i8* %A, <16 x i8> %tmp1) ret void } define void @vst1Qi16(i16* %A, <8 x i16>* %B) nounwind { +;CHECK: vst1Qi16: +;CHECK: vst1.16 %tmp1 = load <8 x i16>* %B call void @llvm.arm.neon.vst1i.v8i16(i16* %A, <8 x i16> %tmp1) ret void } define void @vst1Qi32(i32* %A, <4 x i32>* %B) nounwind { +;CHECK: vst1Qi32: +;CHECK: vst1.32 %tmp1 = load <4 x i32>* %B call void @llvm.arm.neon.vst1i.v4i32(i32* %A, <4 x i32> %tmp1) ret void } define void @vst1Qf(float* %A, <4 x float>* %B) nounwind { +;CHECK: vst1Qf: +;CHECK: vst1.32 %tmp1 = load <4 x float>* %B call void @llvm.arm.neon.vst1f.v4f32(float* %A, <4 x float> %tmp1) ret void } define void @vst1Qi64(i64* %A, <2 x i64>* %B) nounwind { +;CHECK: vst1Qi64: +;CHECK: vst1.64 %tmp1 = load <2 x i64>* %B call void @llvm.arm.neon.vst1i.v2i64(i64* %A, <2 x i64> %tmp1) ret void From bob.wilson at apple.com Wed Aug 5 19:24:51 2009 From: bob.wilson at apple.com (Bob Wilson) Date: Thu, 06 Aug 2009 00:24:51 -0000 Subject: [llvm-commits] [llvm] r78263 - in /llvm/trunk/lib/Target/ARM: ARMISelDAGToDAG.cpp ARMInstrNEON.td NEONPreAllocPass.cpp Message-ID: <200908060024.n760Otav023662@zion.cs.uiuc.edu> Author: bwilson Date: Wed Aug 5 19:24:27 2009 New Revision: 78263 URL: http://llvm.org/viewvc/llvm-project?rev=78263&view=rev Log: Neon does not actually have VLD{234}.64 instructions. These operations will have to be synthesized from other instructions. Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp llvm/trunk/lib/Target/ARM/ARMInstrNEON.td llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp?rev=78263&r1=78262&r2=78263&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp Wed Aug 5 19:24:27 2009 @@ -1317,7 +1317,6 @@ case MVT::v4i16: Opc = ARM::VLD2d16; break; case MVT::v2f32: case MVT::v2i32: Opc = ARM::VLD2d32; break; - case MVT::v1i64: Opc = ARM::VLD2d64; break; } const SDValue Ops[] = { MemAddr, MemUpdate, MemOpc }; return CurDAG->getTargetNode(Opc, dl, VT, VT, MVT::Other, Ops, 3); @@ -1335,7 +1334,6 @@ case MVT::v4i16: Opc = ARM::VLD3d16; break; case MVT::v2f32: case MVT::v2i32: Opc = ARM::VLD3d32; break; - case MVT::v1i64: Opc = ARM::VLD3d64; break; } const SDValue Ops[] = { MemAddr, MemUpdate, MemOpc }; return CurDAG->getTargetNode(Opc, dl, VT, VT, VT, MVT::Other, Ops, 3); @@ -1353,7 +1351,6 @@ case MVT::v4i16: Opc = ARM::VLD4d16; break; case MVT::v2f32: case MVT::v2i32: Opc = ARM::VLD4d32; break; - case MVT::v1i64: Opc = ARM::VLD4d64; break; } const SDValue Ops[] = { MemAddr, MemUpdate, MemOpc }; std::vector ResTys(4, VT); Modified: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrNEON.td?rev=78263&r1=78262&r2=78263&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrNEON.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Wed Aug 5 19:24:27 2009 @@ -196,7 +196,6 @@ def VLD2d8 : VLD2D<"vld2.8">; def VLD2d16 : VLD2D<"vld2.16">; def VLD2d32 : VLD2D<"vld2.32">; -def VLD2d64 : VLD2D<"vld2.64">; // VLD3 : Vector Load (multiple 3-element structures) class VLD3D @@ -206,7 +205,6 @@ def VLD3d8 : VLD3D<"vld3.8">; def VLD3d16 : VLD3D<"vld3.16">; def VLD3d32 : VLD3D<"vld3.32">; -def VLD3d64 : VLD3D<"vld3.64">; // VLD4 : Vector Load (multiple 4-element structures) class VLD4D @@ -217,7 +215,6 @@ def VLD4d8 : VLD4D<"vld4.8">; def VLD4d16 : VLD4D<"vld4.16">; def VLD4d32 : VLD4D<"vld4.32">; -def VLD4d64 : VLD4D<"vld4.64">; //===----------------------------------------------------------------------===// Modified: llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp?rev=78263&r1=78262&r2=78263&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp (original) +++ llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp Wed Aug 5 19:24:27 2009 @@ -45,7 +45,6 @@ case ARM::VLD2d8: case ARM::VLD2d16: case ARM::VLD2d32: - case ARM::VLD2d64: FirstOpnd = 0; NumRegs = 2; return true; @@ -53,7 +52,6 @@ case ARM::VLD3d8: case ARM::VLD3d16: case ARM::VLD3d32: - case ARM::VLD3d64: FirstOpnd = 0; NumRegs = 3; return true; @@ -61,7 +59,6 @@ case ARM::VLD4d8: case ARM::VLD4d16: case ARM::VLD4d32: - case ARM::VLD4d64: FirstOpnd = 0; NumRegs = 4; return true; From bob.wilson at apple.com Wed Aug 5 19:38:53 2009 From: bob.wilson at apple.com (Bob Wilson) Date: Thu, 06 Aug 2009 00:38:53 -0000 Subject: [llvm-commits] [llvm] r78264 - in /llvm/trunk/test/CodeGen/ARM: vld2.ll vld3.ll vld4.ll Message-ID: <200908060039.n760d0Nt024180@zion.cs.uiuc.edu> Author: bwilson Date: Wed Aug 5 19:38:31 2009 New Revision: 78264 URL: http://llvm.org/viewvc/llvm-project?rev=78264&view=rev Log: Add tests for new NEON vld instructions. Added: llvm/trunk/test/CodeGen/ARM/vld2.ll llvm/trunk/test/CodeGen/ARM/vld3.ll llvm/trunk/test/CodeGen/ARM/vld4.ll Added: llvm/trunk/test/CodeGen/ARM/vld2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vld2.ll?rev=78264&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/vld2.ll (added) +++ llvm/trunk/test/CodeGen/ARM/vld2.ll Wed Aug 5 19:38:31 2009 @@ -0,0 +1,51 @@ +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s + +%struct.__builtin_neon_v8qi2 = type { <8 x i8>, <8 x i8> } +%struct.__builtin_neon_v4hi2 = type { <4 x i16>, <4 x i16> } +%struct.__builtin_neon_v2si2 = type { <2 x i32>, <2 x i32> } +%struct.__builtin_neon_v2sf2 = type { <2 x float>, <2 x float> } + +define <8 x i8> @vld2i8(i8* %A) nounwind { +;CHECK: vld2i8: +;CHECK: vld2.8 + %tmp1 = call %struct.__builtin_neon_v8qi2 @llvm.arm.neon.vld2i.v8i8(i8* %A) + %tmp2 = extractvalue %struct.__builtin_neon_v8qi2 %tmp1, 0 + %tmp3 = extractvalue %struct.__builtin_neon_v8qi2 %tmp1, 1 + %tmp4 = add <8 x i8> %tmp2, %tmp3 + ret <8 x i8> %tmp4 +} + +define <4 x i16> @vld2i16(i16* %A) nounwind { +;CHECK: vld2i16: +;CHECK: vld2.16 + %tmp1 = call %struct.__builtin_neon_v4hi2 @llvm.arm.neon.vld2i.v4i16(i16* %A) + %tmp2 = extractvalue %struct.__builtin_neon_v4hi2 %tmp1, 0 + %tmp3 = extractvalue %struct.__builtin_neon_v4hi2 %tmp1, 1 + %tmp4 = add <4 x i16> %tmp2, %tmp3 + ret <4 x i16> %tmp4 +} + +define <2 x i32> @vld2i32(i32* %A) nounwind { +;CHECK: vld2i32: +;CHECK: vld2.32 + %tmp1 = call %struct.__builtin_neon_v2si2 @llvm.arm.neon.vld2i.v2i32(i32* %A) + %tmp2 = extractvalue %struct.__builtin_neon_v2si2 %tmp1, 0 + %tmp3 = extractvalue %struct.__builtin_neon_v2si2 %tmp1, 1 + %tmp4 = add <2 x i32> %tmp2, %tmp3 + ret <2 x i32> %tmp4 +} + +define <2 x float> @vld2f(float* %A) nounwind { +;CHECK: vld2f: +;CHECK: vld2.32 + %tmp1 = call %struct.__builtin_neon_v2sf2 @llvm.arm.neon.vld2f.v2f32(float* %A) + %tmp2 = extractvalue %struct.__builtin_neon_v2sf2 %tmp1, 0 + %tmp3 = extractvalue %struct.__builtin_neon_v2sf2 %tmp1, 1 + %tmp4 = add <2 x float> %tmp2, %tmp3 + ret <2 x float> %tmp4 +} + +declare %struct.__builtin_neon_v8qi2 @llvm.arm.neon.vld2i.v8i8(i8*) nounwind readonly +declare %struct.__builtin_neon_v4hi2 @llvm.arm.neon.vld2i.v4i16(i8*) nounwind readonly +declare %struct.__builtin_neon_v2si2 @llvm.arm.neon.vld2i.v2i32(i8*) nounwind readonly +declare %struct.__builtin_neon_v2sf2 @llvm.arm.neon.vld2f.v2f32(i8*) nounwind readonly Added: llvm/trunk/test/CodeGen/ARM/vld3.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vld3.ll?rev=78264&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/vld3.ll (added) +++ llvm/trunk/test/CodeGen/ARM/vld3.ll Wed Aug 5 19:38:31 2009 @@ -0,0 +1,51 @@ +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s + +%struct.__builtin_neon_v8qi3 = type { <8 x i8>, <8 x i8>, <8 x i8> } +%struct.__builtin_neon_v4hi3 = type { <4 x i16>, <4 x i16>, <4 x i16> } +%struct.__builtin_neon_v2si3 = type { <2 x i32>, <2 x i32>, <2 x i32> } +%struct.__builtin_neon_v2sf3 = type { <2 x float>, <2 x float>, <2 x float> } + +define <8 x i8> @vld3i8(i8* %A) nounwind { +;CHECK: vld3i8: +;CHECK: vld3.8 + %tmp1 = call %struct.__builtin_neon_v8qi3 @llvm.arm.neon.vld3i.v8i8(i8* %A) + %tmp2 = extractvalue %struct.__builtin_neon_v8qi3 %tmp1, 0 + %tmp3 = extractvalue %struct.__builtin_neon_v8qi3 %tmp1, 2 + %tmp4 = add <8 x i8> %tmp2, %tmp3 + ret <8 x i8> %tmp4 +} + +define <4 x i16> @vld3i16(i16* %A) nounwind { +;CHECK: vld3i16: +;CHECK: vld3.16 + %tmp1 = call %struct.__builtin_neon_v4hi3 @llvm.arm.neon.vld3i.v4i16(i16* %A) + %tmp2 = extractvalue %struct.__builtin_neon_v4hi3 %tmp1, 0 + %tmp3 = extractvalue %struct.__builtin_neon_v4hi3 %tmp1, 2 + %tmp4 = add <4 x i16> %tmp2, %tmp3 + ret <4 x i16> %tmp4 +} + +define <2 x i32> @vld3i32(i32* %A) nounwind { +;CHECK: vld3i32: +;CHECK: vld3.32 + %tmp1 = call %struct.__builtin_neon_v2si3 @llvm.arm.neon.vld3i.v2i32(i32* %A) + %tmp2 = extractvalue %struct.__builtin_neon_v2si3 %tmp1, 0 + %tmp3 = extractvalue %struct.__builtin_neon_v2si3 %tmp1, 2 + %tmp4 = add <2 x i32> %tmp2, %tmp3 + ret <2 x i32> %tmp4 +} + +define <2 x float> @vld3f(float* %A) nounwind { +;CHECK: vld3f: +;CHECK: vld3.32 + %tmp1 = call %struct.__builtin_neon_v2sf3 @llvm.arm.neon.vld3f.v2f32(float* %A) + %tmp2 = extractvalue %struct.__builtin_neon_v2sf3 %tmp1, 0 + %tmp3 = extractvalue %struct.__builtin_neon_v2sf3 %tmp1, 2 + %tmp4 = add <2 x float> %tmp2, %tmp3 + ret <2 x float> %tmp4 +} + +declare %struct.__builtin_neon_v8qi3 @llvm.arm.neon.vld3i.v8i8(i8*) nounwind readonly +declare %struct.__builtin_neon_v4hi3 @llvm.arm.neon.vld3i.v4i16(i8*) nounwind readonly +declare %struct.__builtin_neon_v2si3 @llvm.arm.neon.vld3i.v2i32(i8*) nounwind readonly +declare %struct.__builtin_neon_v2sf3 @llvm.arm.neon.vld3f.v2f32(i8*) nounwind readonly Added: llvm/trunk/test/CodeGen/ARM/vld4.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vld4.ll?rev=78264&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/ARM/vld4.ll (added) +++ llvm/trunk/test/CodeGen/ARM/vld4.ll Wed Aug 5 19:38:31 2009 @@ -0,0 +1,51 @@ +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s + +%struct.__builtin_neon_v8qi4 = type { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } +%struct.__builtin_neon_v4hi4 = type { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } +%struct.__builtin_neon_v2si4 = type { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } +%struct.__builtin_neon_v2sf4 = type { <2 x float>, <2 x float>, <2 x float>, <2 x float> } + +define <8 x i8> @vld4i8(i8* %A) nounwind { +;CHECK: vld4i8: +;CHECK: vld4.8 + %tmp1 = call %struct.__builtin_neon_v8qi4 @llvm.arm.neon.vld4i.v8i8(i8* %A) + %tmp2 = extractvalue %struct.__builtin_neon_v8qi4 %tmp1, 0 + %tmp3 = extractvalue %struct.__builtin_neon_v8qi4 %tmp1, 2 + %tmp4 = add <8 x i8> %tmp2, %tmp3 + ret <8 x i8> %tmp4 +} + +define <4 x i16> @vld4i16(i16* %A) nounwind { +;CHECK: vld4i16: +;CHECK: vld4.16 + %tmp1 = call %struct.__builtin_neon_v4hi4 @llvm.arm.neon.vld4i.v4i16(i16* %A) + %tmp2 = extractvalue %struct.__builtin_neon_v4hi4 %tmp1, 0 + %tmp3 = extractvalue %struct.__builtin_neon_v4hi4 %tmp1, 2 + %tmp4 = add <4 x i16> %tmp2, %tmp3 + ret <4 x i16> %tmp4 +} + +define <2 x i32> @vld4i32(i32* %A) nounwind { +;CHECK: vld4i32: +;CHECK: vld4.32 + %tmp1 = call %struct.__builtin_neon_v2si4 @llvm.arm.neon.vld4i.v2i32(i32* %A) + %tmp2 = extractvalue %struct.__builtin_neon_v2si4 %tmp1, 0 + %tmp3 = extractvalue %struct.__builtin_neon_v2si4 %tmp1, 2 + %tmp4 = add <2 x i32> %tmp2, %tmp3 + ret <2 x i32> %tmp4 +} + +define <2 x float> @vld4f(float* %A) nounwind { +;CHECK: vld4f: +;CHECK: vld4.32 + %tmp1 = call %struct.__builtin_neon_v2sf4 @llvm.arm.neon.vld4f.v2f32(float* %A) + %tmp2 = extractvalue %struct.__builtin_neon_v2sf4 %tmp1, 0 + %tmp3 = extractvalue %struct.__builtin_neon_v2sf4 %tmp1, 2 + %tmp4 = add <2 x float> %tmp2, %tmp3 + ret <2 x float> %tmp4 +} + +declare %struct.__builtin_neon_v8qi4 @llvm.arm.neon.vld4i.v8i8(i8*) nounwind readonly +declare %struct.__builtin_neon_v4hi4 @llvm.arm.neon.vld4i.v4i16(i8*) nounwind readonly +declare %struct.__builtin_neon_v2si4 @llvm.arm.neon.vld4i.v2i32(i8*) nounwind readonly +declare %struct.__builtin_neon_v2sf4 @llvm.arm.neon.vld4f.v2f32(i8*) nounwind readonly From mrs at apple.com Wed Aug 5 19:51:25 2009 From: mrs at apple.com (Mike Stump) Date: Wed, 5 Aug 2009 17:51:25 -0700 Subject: [llvm-commits] [llvm] r78260 - /llvm/trunk/unittests/Support/TypeBuilderTest.cpp In-Reply-To: <200908052329.n75NTYNY021933@zion.cs.uiuc.edu> References: <200908052329.n75NTYNY021933@zion.cs.uiuc.edu> Message-ID: On Aug 5, 2009, at 4:29 PM, Owen Anderson wrote: > Author: resistor > Date: Wed Aug 5 18:28:57 2009 > New Revision: 78260 > > URL: http://llvm.org/viewvc/llvm-project?rev=78260&view=rev > Log: > Update unit test. This appears to kill the build bots... ? From daniel at zuster.org Wed Aug 5 21:09:15 2009 From: daniel at zuster.org (Daniel Dunbar) Date: Wed, 5 Aug 2009 19:09:15 -0700 Subject: [llvm-commits] [llvm] r78255 - in /llvm/trunk/lib/Target/X86: X86ISelDAGToDAG.cpp X86ISelLowering.cpp X86ISelLowering.h In-Reply-To: <200908052301.n75N1SD8020980@zion.cs.uiuc.edu> References: <200908052301.n75N1SD8020980@zion.cs.uiuc.edu> Message-ID: <6a8523d60908051909i73216b54ud983d4e0ac1dfecf@mail.gmail.com> On Wed, Aug 5, 2009 at 4:01 PM, Anton Korobeynikov wrote: > Author: asl > Date: Wed Aug ?5 18:01:26 2009 > New Revision: 78255 > > URL: http://llvm.org/viewvc/llvm-project?rev=78255&view=rev > Log: > Better handle kernel code model. Also, generalize the things and fix one > subtle bug with small code model. Seems like the "subtle bug" should get a test case? - Daniel > Modified: > ? ?llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp > ? ?llvm/trunk/lib/Target/X86/X86ISelLowering.cpp > ? ?llvm/trunk/lib/Target/X86/X86ISelLowering.h > > Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=78255&r1=78254&r2=78255&view=diff > > ============================================================================== > --- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original) > +++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Wed Aug ?5 18:01:26 2009 > @@ -705,7 +705,7 @@ > ?/// MatchWrapper - Try to match X86ISD::Wrapper and X86ISD::WrapperRIP nodes > ?/// into an addressing mode. ?These wrap things that will resolve down into a > ?/// symbol reference. ?If no match is possible, this returns true, otherwise it > -/// returns false. > +/// returns false. > ?bool X86DAGToDAGISel::MatchWrapper(SDValue N, X86ISelAddressMode &AM) { > ? // If the addressing mode already has a symbol as the displacement, we can > ? // never match another symbol. > @@ -713,28 +713,27 @@ > ? ? return true; > > ? SDValue N0 = N.getOperand(0); > - > + ?CodeModel::Model M = TM.getCodeModel(); > + > ? // Handle X86-64 rip-relative addresses. ?We check this before checking direct > ? // folding because RIP is preferable to non-RIP accesses. > ? if (Subtarget->is64Bit() && > ? ? ? // Under X86-64 non-small code model, GV (and friends) are 64-bits, so > ? ? ? // they cannot be folded into immediate fields. > ? ? ? // FIXME: This can be improved for kernel and other models? > - ? ? ?TM.getCodeModel() == CodeModel::Small && > - > + ? ? ?(M == CodeModel::Small || CodeModel::Kernel) && > ? ? ? // Base and index reg must be 0 in order to use %rip as base and lowering > ? ? ? // must allow RIP. > ? ? ? !AM.hasBaseOrIndexReg() && N.getOpcode() == X86ISD::WrapperRIP) { > - > ? ? if (GlobalAddressSDNode *G = dyn_cast(N0)) { > ? ? ? int64_t Offset = AM.Disp + G->getOffset(); > - ? ? ?if (!isInt32(Offset)) return true; > + ? ? ?if (!X86::isOffsetSuitableForCodeModel(Offset, M)) return true; > ? ? ? AM.GV = G->getGlobal(); > ? ? ? AM.Disp = Offset; > ? ? ? AM.SymbolFlags = G->getTargetFlags(); > ? ? } else if (ConstantPoolSDNode *CP = dyn_cast(N0)) { > ? ? ? int64_t Offset = AM.Disp + CP->getOffset(); > - ? ? ?if (!isInt32(Offset)) return true; > + ? ? ?if (!X86::isOffsetSuitableForCodeModel(Offset, M)) return true; > ? ? ? AM.CP = CP->getConstVal(); > ? ? ? AM.Align = CP->getAlignment(); > ? ? ? AM.Disp = Offset; > @@ -747,7 +746,7 @@ > ? ? ? AM.JT = J->getIndex(); > ? ? ? AM.SymbolFlags = J->getTargetFlags(); > ? ? } > - > + > ? ? if (N.getOpcode() == X86ISD::WrapperRIP) > ? ? ? AM.setBaseReg(CurDAG->getRegister(X86::RIP, MVT::i64)); > ? ? return false; > @@ -757,7 +756,7 @@ > ? // X86-32 always and X86-64 when in -static -mcmodel=small mode. ?In 64-bit > ? // mode, this results in a non-RIP-relative computation. > ? if (!Subtarget->is64Bit() || > - ? ? ?(TM.getCodeModel() == CodeModel::Small && > + ? ? ?((M == CodeModel::Small || M == CodeModel::Kernel) && > ? ? ? ?TM.getRelocationModel() == Reloc::Static)) { > ?