[llvm-commits] patch: partial dse
nicholas at mxc.ca
Fri Jan 8 23:20:22 CST 2010
Duncan Sands wrote:
> Hi Nick,
>> At the moment, it restricts itself to the case where we have
>> TargetData. This seems odd at first, but the problem is that DSE
>> itself doesn't seem to be sure how many bits will be modified by a
>> store without it. 'i32' and 'i16' are clear, but 'i6' less so (and
>> which 2 bits does it leave alone). My opinion is that the only sane
>> behaviour for an i6* store is that it overwrite only the first 6 bits
>> of the pointee and no others, which is the same rule that i16* and
>> i32* have.
> no, it will overwrite 8 bits. The general rule is that an iN store will
> overwrite (N+7)/8 bytes, which is the same rule that i16* and i32*
> have :)
> This is currently target independent, but I suppose it is safer to define
> it in TD in case we get a target that has 16 bit bytes one day.
Hah! Yes, I meant "consistent behaviour that doesn't have magic numbers" :)
Is this (N+7)/8 logic codified somewhere outside of TargetData? It'd be
useful to know how many bits the i6* will really modify even when
targetdata isn't available, but I don't want to scatter the assumptions
everywhere, making it difficult to port LLVM to the PDP-11 some day.
More information about the llvm-commits