From clattner at apple.com  Mon Apr 12 00:03:48 2010
From: clattner at apple.com (Chris Lattner)
Date: Sun, 11 Apr 2010 22:03:48 -0700
Subject: [llvm-commits] PATCH: exception-free bugpoint
In-Reply-To: <4BC10E32.4070501@mxc.ca>
References: <4BC10E32.4070501@mxc.ca>
Message-ID: <F339C89C-508E-4064-9724-0A74F9BD1B49@apple.com>

Looks fine to me, please apply!  Thanks Nick!

On Apr 10, 2010, at 4:48 PM, Nick Lewycky wrote:

> LLVM is nearly exception-free, but we still have exceptions on in the VMCore because bugpoint uses them internally. Bugpoint uses them for things like stopping a bisection on the pass list when the code generator crashes and switches to debugging the codegen crash instead. (This means that bugpoint has functions taking function pointer parameters which in turn throw exceptions.)
> 
> This patch threads error return values and/or std::string pointers/references all over bugpoint to replicate the existing behaviour.
> 
> There is supposed to be absolutely no functionality change. I've tested this side-by-side with unmodified bugpoint and fixed all the problems I could find, but honestly I still don't trust this patch very much.
> 
> Please review!
> 
> Nick
> 
> <bugpoint-exceptionfree1.patch>_______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits




From nicholas at mxc.ca  Mon Apr 12 00:08:25 2010
From: nicholas at mxc.ca (Nick Lewycky)
Date: Mon, 12 Apr 2010 05:08:25 -0000
Subject: [llvm-commits] [llvm] r101013 - in /llvm/trunk/tools/bugpoint:
 BugDriver.cpp BugDriver.h CrashDebugger.cpp ExecutionDriver.cpp
 FindBugs.cpp ListReducer.h Miscompilation.cpp ToolRunner.cpp ToolRunner.h
 bugpoint.cpp
Message-ID: <20100412050826.1E0EC2A6C12C@llvm.org>

Author: nicholas
Date: Mon Apr 12 00:08:25 2010
New Revision: 101013

URL: http://llvm.org/viewvc/llvm-project?rev=101013&view=rev
Log:
Remove use of exceptions from bugpoint. No deliberate functionality change!

Modified:
    llvm/trunk/tools/bugpoint/BugDriver.cpp
    llvm/trunk/tools/bugpoint/BugDriver.h
    llvm/trunk/tools/bugpoint/CrashDebugger.cpp
    llvm/trunk/tools/bugpoint/ExecutionDriver.cpp
    llvm/trunk/tools/bugpoint/FindBugs.cpp
    llvm/trunk/tools/bugpoint/ListReducer.h
    llvm/trunk/tools/bugpoint/Miscompilation.cpp
    llvm/trunk/tools/bugpoint/ToolRunner.cpp
    llvm/trunk/tools/bugpoint/ToolRunner.h
    llvm/trunk/tools/bugpoint/bugpoint.cpp

Modified: llvm/trunk/tools/bugpoint/BugDriver.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/BugDriver.cpp?rev=101013&r1=101012&r2=101013&view=diff
==============================================================================
--- llvm/trunk/tools/bugpoint/BugDriver.cpp (original)
+++ llvm/trunk/tools/bugpoint/BugDriver.cpp Mon Apr 12 00:08:25 2010
@@ -115,30 +115,25 @@
   assert(Program == 0 && "Cannot call addSources multiple times!");
   assert(!Filenames.empty() && "Must specify at least on input filename!");
 
-  try {
-    // Load the first input file.
-    Program = ParseInputFile(Filenames[0], Context);
-    if (Program == 0) return true;
+  // Load the first input file.
+  Program = ParseInputFile(Filenames[0], Context);
+  if (Program == 0) return true;
     
-    if (!run_as_child)
-      outs() << "Read input file      : '" << Filenames[0] << "'\n";
+  if (!run_as_child)
+    outs() << "Read input file      : '" << Filenames[0] << "'\n";
+
+  for (unsigned i = 1, e = Filenames.size(); i != e; ++i) {
+    std::auto_ptr<Module> M(ParseInputFile(Filenames[i], Context));
+    if (M.get() == 0) return true;
 
-    for (unsigned i = 1, e = Filenames.size(); i != e; ++i) {
-      std::auto_ptr<Module> M(ParseInputFile(Filenames[i], Context));
-      if (M.get() == 0) return true;
-
-      if (!run_as_child)
-        outs() << "Linking in input file: '" << Filenames[i] << "'\n";
-      std::string ErrorMessage;
-      if (Linker::LinkModules(Program, M.get(), &ErrorMessage)) {
-        errs() << ToolName << ": error linking in '" << Filenames[i] << "': "
-               << ErrorMessage << '\n';
-        return true;
-      }
+    if (!run_as_child)
+      outs() << "Linking in input file: '" << Filenames[i] << "'\n";
+    std::string ErrorMessage;
+    if (Linker::LinkModules(Program, M.get(), &ErrorMessage)) {
+      errs() << ToolName << ": error linking in '" << Filenames[i] << "': "
+             << ErrorMessage << '\n';
+      return true;
     }
-  } catch (const std::string &Error) {
-    errs() << ToolName << ": error reading input '" << Error << "'\n";
-    return true;
   }
 
   if (!run_as_child)
@@ -153,7 +148,7 @@
 /// run - The top level method that is invoked after all of the instance
 /// variables are set up from command line arguments.
 ///
-bool BugDriver::run() {
+bool BugDriver::run(std::string &ErrMsg) {
   // The first thing to do is determine if we're running as a child. If we are,
   // then what to do is very narrow. This form of invocation is only called
   // from the runPasses method to actually run those passes in a child process.
@@ -165,7 +160,7 @@
   if (run_find_bugs) {
     // Rearrange the passes and apply them to the program. Repeat this process
     // until the user kills the program or we find a bug.
-    return runManyPasses(PassesToRun);
+    return runManyPasses(PassesToRun, ErrMsg);
   }
 
   // If we're not running as a child, the first thing that we must do is 
@@ -186,14 +181,13 @@
 
   // Test to see if we have a code generator crash.
   outs() << "Running the code generator to test for a crash: ";
-  try {
-    compileProgram(Program);
-    outs() << '\n';
-  } catch (ToolExecutionError &TEE) {
-    outs() << TEE.what();
-    return debugCodeGeneratorCrash();
+  std::string Error;
+  compileProgram(Program, &Error);
+  if (!Error.empty()) {
+    outs() << Error;
+    return debugCodeGeneratorCrash(ErrMsg);
   }
-
+  outs() << '\n';
 
   // Run the raw input to see where we are coming from.  If a reference output
   // was specified, make sure that the raw output matches it.  If not, it's a
@@ -202,8 +196,8 @@
   bool CreatedOutput = false;
   if (ReferenceOutputFile.empty()) {
     outs() << "Generating reference output from raw program: ";
-    if(!createReferenceFile(Program)){
-      return debugCodeGeneratorCrash();
+    if (!createReferenceFile(Program)) {
+      return debugCodeGeneratorCrash(ErrMsg);
     }
     CreatedOutput = true;
   }
@@ -217,24 +211,29 @@
   // matches, then we assume there is a miscompilation bug and try to 
   // diagnose it.
   outs() << "*** Checking the code generator...\n";
-  try {
-    if (!diffProgram()) {
-      outs() << "\n*** Output matches: Debugging miscompilation!\n";
-      return debugMiscompilation();
+  bool Diff = diffProgram("", "", false, &Error);
+  if (!Error.empty()) {
+    errs() << Error;
+    return debugCodeGeneratorCrash(ErrMsg);
+  }
+  if (!Diff) {
+    outs() << "\n*** Output matches: Debugging miscompilation!\n";
+    debugMiscompilation(&Error);
+    if (!Error.empty()) {
+      errs() << Error;
+      return debugCodeGeneratorCrash(ErrMsg);
     }
-  } catch (ToolExecutionError &TEE) {
-    errs() << TEE.what();
-    return debugCodeGeneratorCrash();
+    return false;
   }
 
   outs() << "\n*** Input program does not match reference diff!\n";
   outs() << "Debugging code generator problem!\n";
-  try {
-    return debugCodeGenerator();
-  } catch (ToolExecutionError &TEE) {
-    errs() << TEE.what();
-    return debugCodeGeneratorCrash();
+  bool Failure = debugCodeGenerator(&Error);
+  if (!Error.empty()) {
+    errs() << Error;
+    return debugCodeGeneratorCrash(ErrMsg);
   }
+  return Failure;
 }
 
 void llvm::PrintFunctionList(const std::vector<Function*> &Funcs) {

Modified: llvm/trunk/tools/bugpoint/BugDriver.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/BugDriver.h?rev=101013&r1=101012&r2=101013&view=diff
==============================================================================
--- llvm/trunk/tools/bugpoint/BugDriver.h (original)
+++ llvm/trunk/tools/bugpoint/BugDriver.h Mon Apr 12 00:08:25 2010
@@ -88,7 +88,7 @@
   /// variables are set up from command line arguments. The \p as_child argument
   /// indicates whether the driver is to run in parent mode or child mode.
   ///
-  bool run();
+  bool run(std::string &ErrMsg);
 
   /// debugOptimizerCrash - This method is called when some optimizer pass
   /// crashes on input.  It attempts to prune down the testcase to something
@@ -99,12 +99,12 @@
   /// debugCodeGeneratorCrash - This method is called when the code generator
   /// crashes on an input.  It attempts to reduce the input as much as possible
   /// while still causing the code generator to crash.
-  bool debugCodeGeneratorCrash();
+  bool debugCodeGeneratorCrash(std::string &Error);
 
   /// debugMiscompilation - This method is used when the passes selected are not
   /// crashing, but the generated output is semantically different from the
   /// input.
-  bool debugMiscompilation();
+  void debugMiscompilation(std::string *Error);
 
   /// debugPassMiscompilation - This method is called when the specified pass
   /// miscompiles Program as input.  It tries to reduce the testcase to
@@ -118,12 +118,13 @@
   /// compileSharedObject - This method creates a SharedObject from a given
   /// BitcodeFile for debugging a code generator.
   ///
-  std::string compileSharedObject(const std::string &BitcodeFile);
+  std::string compileSharedObject(const std::string &BitcodeFile,
+                                  std::string &Error);
 
   /// debugCodeGenerator - This method narrows down a module to a function or
   /// set of functions, using the CBE as a ``safe'' code generator for other
   /// functions that are not under consideration.
-  bool debugCodeGenerator();
+  bool debugCodeGenerator(std::string *Error);
 
   /// isExecutingJIT - Returns true if bugpoint is currently testing the JIT
   ///
@@ -164,27 +165,29 @@
   /// the specified one as the current program.
   void setNewProgram(Module *M);
 
-  /// compileProgram - Try to compile the specified module, throwing an
-  /// exception if an error occurs, or returning normally if not.  This is used
-  /// for code generation crash testing.
+  /// compileProgram - Try to compile the specified module, returning false and
+  /// setting Error if an error occurs.  This is used for code generation
+  /// crash testing.
   ///
-  void compileProgram(Module *M);
+  void compileProgram(Module *M, std::string *Error);
 
   /// executeProgram - This method runs "Program", capturing the output of the
-  /// program to a file, returning the filename of the file.  A recommended
-  /// filename may be optionally specified.  If there is a problem with the code
-  /// generator (e.g., llc crashes), this will throw an exception.
-  ///
-  std::string executeProgram(std::string RequestedOutputFilename = "",
-                             std::string Bitcode = "",
-                             const std::string &SharedObjects = "",
-                             AbstractInterpreter *AI = 0);
+  /// program to a file.  The recommended filename will be filled in with the
+  /// name of the file with the captured output.  If there is a problem with
+  /// the code generator (e.g., llc crashes), this will throw an exception.
+  ///
+  std::string executeProgram(std::string OutputFilename,
+                             std::string Bitcode,
+                             const std::string &SharedObjects,
+                             AbstractInterpreter *AI,
+                             std::string *Error);
 
   /// executeProgramSafely - Used to create reference output with the "safe"
   /// backend, if reference output is not provided.  If there is a problem with
-  /// the code generator (e.g., llc crashes), this will throw an exception.
+  /// the code generator (e.g., llc crashes), this will return false and set
+  /// Error.
   ///
-  std::string executeProgramSafely(std::string OutputFile = "");
+  std::string executeProgramSafely(std::string OutputFile, std::string *Error);
 
   /// createReferenceFile - calls compileProgram and then records the output
   /// into ReferenceOutputFile. Returns true if reference file created, false 
@@ -196,13 +199,14 @@
 
   /// diffProgram - This method executes the specified module and diffs the
   /// output against the file specified by ReferenceOutputFile.  If the output
-  /// is different, true is returned.  If there is a problem with the code
-  /// generator (e.g., llc crashes), this will throw an exception.
+  /// is different, 1 is returned.  If there is a problem with the code
+  /// generator (e.g., llc crashes), this will return -1 and set Error.
   ///
   bool diffProgram(const std::string &BitcodeFile = "",
                    const std::string &SharedObj = "",
-                   bool RemoveBitcode = false);
-                   
+                   bool RemoveBitcode = false,
+                   std::string *Error = 0);
+
   /// EmitProgressBitcode - This function is used to output the current Program
   /// to a file named "bugpoint-ID.bc".
   ///
@@ -266,7 +270,8 @@
   /// If the passes did not compile correctly, output the command required to 
   /// recreate the failure. This returns true if a compiler error is found.
   ///
-  bool runManyPasses(const std::vector<const PassInfo*> &AllPasses);
+  bool runManyPasses(const std::vector<const PassInfo*> &AllPasses,
+		     std::string &ErrMsg);
 
   /// writeProgramToFile - This writes the current "Program" to the named
   /// bitcode file.  If an error occurs, true is returned.

Modified: llvm/trunk/tools/bugpoint/CrashDebugger.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/CrashDebugger.cpp?rev=101013&r1=101012&r2=101013&view=diff
==============================================================================
--- llvm/trunk/tools/bugpoint/CrashDebugger.cpp (original)
+++ llvm/trunk/tools/bugpoint/CrashDebugger.cpp Mon Apr 12 00:08:25 2010
@@ -53,13 +53,15 @@
     // passes.  If we return true, we update the current module of bugpoint.
     //
     virtual TestResult doTest(std::vector<const PassInfo*> &Removed,
-                              std::vector<const PassInfo*> &Kept);
+                              std::vector<const PassInfo*> &Kept,
+                              std::string &Error);
   };
 }
 
 ReducePassList::TestResult
 ReducePassList::doTest(std::vector<const PassInfo*> &Prefix,
-                       std::vector<const PassInfo*> &Suffix) {
+                       std::vector<const PassInfo*> &Suffix,
+                       std::string &Error) {
   sys::Path PrefixOutput;
   Module *OrigProgram = 0;
   if (!Prefix.empty()) {
@@ -107,27 +109,26 @@
     bool (*TestFn)(BugDriver &, Module *);
   public:
     ReduceCrashingGlobalVariables(BugDriver &bd,
-                                  bool (*testFn)(BugDriver&, Module*))
+                                  bool (*testFn)(BugDriver &, Module *))
       : BD(bd), TestFn(testFn) {}
 
-    virtual TestResult doTest(std::vector<GlobalVariable*>& Prefix,
-                              std::vector<GlobalVariable*>& Kept) {
+    virtual TestResult doTest(std::vector<GlobalVariable*> &Prefix,
+                              std::vector<GlobalVariable*> &Kept,
+                              std::string &Error) {
       if (!Kept.empty() && TestGlobalVariables(Kept))
         return KeepSuffix;
-
       if (!Prefix.empty() && TestGlobalVariables(Prefix))
         return KeepPrefix;
-
       return NoFailure;
     }
 
-    bool TestGlobalVariables(std::vector<GlobalVariable*>& GVs);
+    bool TestGlobalVariables(std::vector<GlobalVariable*> &GVs);
   };
 }
 
 bool
 ReduceCrashingGlobalVariables::TestGlobalVariables(
-                              std::vector<GlobalVariable*>& GVs) {
+                              std::vector<GlobalVariable*> &GVs) {
   // Clone the program to try hacking it apart...
   DenseMap<const Value*, Value*> ValueMap;
   Module *M = CloneModule(BD.getProgram(), ValueMap);
@@ -182,7 +183,8 @@
       : BD(bd), TestFn(testFn) {}
 
     virtual TestResult doTest(std::vector<Function*> &Prefix,
-                              std::vector<Function*> &Kept) {
+                              std::vector<Function*> &Kept,
+                              std::string &Error) {
       if (!Kept.empty() && TestFuncs(Kept))
         return KeepSuffix;
       if (!Prefix.empty() && TestFuncs(Prefix))
@@ -253,7 +255,8 @@
       : BD(bd), TestFn(testFn) {}
 
     virtual TestResult doTest(std::vector<const BasicBlock*> &Prefix,
-                              std::vector<const BasicBlock*> &Kept) {
+                              std::vector<const BasicBlock*> &Kept,
+                              std::string &Error) {
       if (!Kept.empty() && TestBlocks(Kept))
         return KeepSuffix;
       if (!Prefix.empty() && TestBlocks(Prefix))
@@ -355,7 +358,8 @@
       : BD(bd), TestFn(testFn) {}
 
     virtual TestResult doTest(std::vector<const Instruction*> &Prefix,
-                              std::vector<const Instruction*> &Kept) {
+                              std::vector<const Instruction*> &Kept,
+                              std::string &Error) {
       if (!Kept.empty() && TestInsts(Kept))
         return KeepSuffix;
       if (!Prefix.empty() && TestInsts(Prefix))
@@ -421,7 +425,8 @@
 /// DebugACrash - Given a predicate that determines whether a component crashes
 /// on a program, try to destructively reduce the program while still keeping
 /// the predicate true.
-static bool DebugACrash(BugDriver &BD,  bool (*TestFn)(BugDriver &, Module *)) {
+static bool DebugACrash(BugDriver &BD, bool (*TestFn)(BugDriver &, Module *),
+                        std::string &Error) {
   // See if we can get away with nuking some of the global variable initializers
   // in the program...
   if (!NoGlobalRM &&
@@ -464,7 +469,9 @@
                     << "variables in the testcase\n";
 
           unsigned OldSize = GVs.size();
-          ReduceCrashingGlobalVariables(BD, TestFn).reduceList(GVs);
+          ReduceCrashingGlobalVariables(BD, TestFn).reduceList(GVs, Error);
+          if (!Error.empty())
+            return true;
 
           if (GVs.size() < OldSize)
             BD.EmitProgressBitcode("reduced-global-variables");
@@ -485,7 +492,7 @@
       "in the testcase\n";
 
     unsigned OldSize = Functions.size();
-    ReduceCrashingFunctions(BD, TestFn).reduceList(Functions);
+    ReduceCrashingFunctions(BD, TestFn).reduceList(Functions, Error);
 
     if (Functions.size() < OldSize)
       BD.EmitProgressBitcode("reduced-function");
@@ -503,7 +510,7 @@
       for (Function::const_iterator FI = I->begin(), E = I->end(); FI !=E; ++FI)
         Blocks.push_back(FI);
     unsigned OldSize = Blocks.size();
-    ReduceCrashingBlocks(BD, TestFn).reduceList(Blocks);
+    ReduceCrashingBlocks(BD, TestFn).reduceList(Blocks, Error);
     if (Blocks.size() < OldSize)
       BD.EmitProgressBitcode("reduced-blocks");
   }
@@ -521,7 +528,7 @@
           if (!isa<TerminatorInst>(I))
             Insts.push_back(I);
 
-    ReduceCrashingInstructions(BD, TestFn).reduceList(Insts);
+    ReduceCrashingInstructions(BD, TestFn).reduceList(Insts, Error);
   }
 
   // FIXME: This should use the list reducer to converge faster by deleting
@@ -614,9 +621,11 @@
 bool BugDriver::debugOptimizerCrash(const std::string &ID) {
   outs() << "\n*** Debugging optimizer crash!\n";
 
+  std::string Error;
   // Reduce the list of passes which causes the optimizer to crash...
   if (!BugpointIsInterrupted)
-    ReducePassList(*this).reduceList(PassesToRun);
+    ReducePassList(*this).reduceList(PassesToRun, Error);
+  assert(Error.empty());
 
   outs() << "\n*** Found crashing pass"
          << (PassesToRun.size() == 1 ? ": " : "es: ")
@@ -624,25 +633,27 @@
 
   EmitProgressBitcode(ID);
 
-  return DebugACrash(*this, TestForOptimizerCrash);
+  bool Success = DebugACrash(*this, TestForOptimizerCrash, Error);
+  assert(Error.empty());
+  return Success;
 }
 
 static bool TestForCodeGenCrash(BugDriver &BD, Module *M) {
-  try {
-    BD.compileProgram(M);
-    errs() << '\n';
-    return false;
-  } catch (ToolExecutionError &) {
+  std::string Error;
+  BD.compileProgram(M, &Error);
+  if (!Error.empty()) {
     errs() << "<crash>\n";
     return true;  // Tool is still crashing.
   }
+  errs() << '\n';
+  return false;
 }
 
 /// debugCodeGeneratorCrash - This method is called when the code generator
 /// crashes on an input.  It attempts to reduce the input as much as possible
 /// while still causing the code generator to crash.
-bool BugDriver::debugCodeGeneratorCrash() {
+bool BugDriver::debugCodeGeneratorCrash(std::string &Error) {
   errs() << "*** Debugging code generator crash!\n";
 
-  return DebugACrash(*this, TestForCodeGenCrash);
+  return DebugACrash(*this, TestForCodeGenCrash, Error);
 }

Modified: llvm/trunk/tools/bugpoint/ExecutionDriver.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/ExecutionDriver.cpp?rev=101013&r1=101012&r2=101013&view=diff
==============================================================================
--- llvm/trunk/tools/bugpoint/ExecutionDriver.cpp (original)
+++ llvm/trunk/tools/bugpoint/ExecutionDriver.cpp Mon Apr 12 00:08:25 2010
@@ -278,15 +278,15 @@
   return Interpreter == 0;
 }
 
-/// compileProgram - Try to compile the specified module, throwing an exception
-/// if an error occurs, or returning normally if not.  This is used for code
-/// generation crash testing.
+/// compileProgram - Try to compile the specified module, returning false and
+/// setting Error if an error occurs.  This is used for code generation
+/// crash testing.
 ///
-void BugDriver::compileProgram(Module *M) {
+void BugDriver::compileProgram(Module *M, std::string *Error) {
   // Emit the program to a bitcode file...
   sys::Path BitcodeFile (OutputPrefix + "-test-program.bc");
   std::string ErrMsg;
-  if (BitcodeFile.makeUnique(true,&ErrMsg)) {
+  if (BitcodeFile.makeUnique(true, &ErrMsg)) {
     errs() << ToolName << ": Error making unique filename: " << ErrMsg 
            << "\n";
     exit(1);
@@ -297,11 +297,11 @@
     exit(1);
   }
 
-    // Remove the temporary bitcode file when we are done.
+  // Remove the temporary bitcode file when we are done.
   FileRemover BitcodeFileRemover(BitcodeFile, !SaveTemps);
 
   // Actually compile the program!
-  Interpreter->compileProgram(BitcodeFile.str());
+  Interpreter->compileProgram(BitcodeFile.str(), Error);
 }
 
 
@@ -312,7 +312,8 @@
 std::string BugDriver::executeProgram(std::string OutputFile,
                                       std::string BitcodeFile,
                                       const std::string &SharedObj,
-                                      AbstractInterpreter *AI) {
+                                      AbstractInterpreter *AI,
+                                      std::string *Error) {
   if (AI == 0) AI = Interpreter;
   assert(AI && "Interpreter should have been created already!");
   bool CreatedBitcode = false;
@@ -355,9 +356,11 @@
   if (!SharedObj.empty())
     SharedObjs.push_back(SharedObj);
 
-  int RetVal = AI->ExecuteProgram(BitcodeFile, InputArgv, InputFile,
-                                  OutputFile, AdditionalLinkerArgs, SharedObjs, 
+  int RetVal = AI->ExecuteProgram(BitcodeFile, InputArgv, InputFile, OutputFile,
+                                  Error, AdditionalLinkerArgs, SharedObjs,
                                   Timeout, MemoryLimit);
+  if (!Error->empty())
+    return OutputFile;
 
   if (RetVal == -1) {
     errs() << "<timeout>";
@@ -385,21 +388,28 @@
 /// executeProgramSafely - Used to create reference output with the "safe"
 /// backend, if reference output is not provided.
 ///
-std::string BugDriver::executeProgramSafely(std::string OutputFile) {
-  std::string outFN = executeProgram(OutputFile, "", "", SafeInterpreter);
-  return outFN;
+std::string BugDriver::executeProgramSafely(std::string OutputFile,
+                                            std::string *Error) {
+  return executeProgram(OutputFile, "", "", SafeInterpreter, Error);
 }
 
-std::string BugDriver::compileSharedObject(const std::string &BitcodeFile) {
+std::string BugDriver::compileSharedObject(const std::string &BitcodeFile,
+                                           std::string &Error) {
   assert(Interpreter && "Interpreter should have been created already!");
   sys::Path OutputFile;
 
   // Using the known-good backend.
-  GCC::FileType FT = SafeInterpreter->OutputCode(BitcodeFile, OutputFile);
+  GCC::FileType FT = SafeInterpreter->OutputCode(BitcodeFile, OutputFile,
+                                                 Error);
+  if (!Error.empty())
+    return "";
 
   std::string SharedObjectFile;
-  if (gcc->MakeSharedObject(OutputFile.str(), FT,
-                            SharedObjectFile, AdditionalLinkerArgs))
+  bool Failure = gcc->MakeSharedObject(OutputFile.str(), FT, SharedObjectFile,
+                                       AdditionalLinkerArgs, Error);
+  if (!Error.empty())
+    return "";
+  if (Failure)
     exit(1);
 
   // Remove the intermediate C file
@@ -414,16 +424,14 @@
 /// this function.
 ///
 bool BugDriver::createReferenceFile(Module *M, const std::string &Filename) {
-  try {
-    compileProgram(Program);
-  } catch (ToolExecutionError &) {
+  std::string Error;
+  compileProgram(Program, &Error);
+  if (!Error.empty())
     return false;
-  }
-  try {
-    ReferenceOutputFile = executeProgramSafely(Filename);
-    outs() << "\nReference output is: " << ReferenceOutputFile << "\n\n";
-  } catch (ToolExecutionError &TEE) {
-    errs() << TEE.what();
+
+  ReferenceOutputFile = executeProgramSafely(Filename, &Error);
+  if (!Error.empty()) {
+    errs() << Error;
     if (Interpreter != SafeInterpreter) {
       errs() << "*** There is a bug running the \"safe\" backend.  Either"
              << " debug it (for example with the -run-cbe bugpoint option,"
@@ -432,19 +440,23 @@
     }
     return false;
   }
+  outs() << "\nReference output is: " << ReferenceOutputFile << "\n\n";
   return true;
 }
 
 /// diffProgram - This method executes the specified module and diffs the
 /// output against the file specified by ReferenceOutputFile.  If the output
-/// is different, true is returned.  If there is a problem with the code
-/// generator (e.g., llc crashes), this will throw an exception.
+/// is different, 1 is returned.  If there is a problem with the code
+/// generator (e.g., llc crashes), this will return -1 and set Error.
 ///
 bool BugDriver::diffProgram(const std::string &BitcodeFile,
                             const std::string &SharedObject,
-                            bool RemoveBitcode) {
+                            bool RemoveBitcode,
+                            std::string *ErrMsg) {
   // Execute the program, generating an output file...
-  sys::Path Output(executeProgram("", BitcodeFile, SharedObject, 0));
+  sys::Path Output(executeProgram("", BitcodeFile, SharedObject, 0, ErrMsg));
+  if (!ErrMsg->empty())
+    return false;
 
   std::string Error;
   bool FilesDifferent = false;

Modified: llvm/trunk/tools/bugpoint/FindBugs.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/FindBugs.cpp?rev=101013&r1=101012&r2=101013&view=diff
==============================================================================
--- llvm/trunk/tools/bugpoint/FindBugs.cpp (original)
+++ llvm/trunk/tools/bugpoint/FindBugs.cpp Mon Apr 12 00:08:25 2010
@@ -29,7 +29,8 @@
 /// If the passes did not compile correctly, output the command required to 
 /// recreate the failure. This returns true if a compiler error is found.
 ///
-bool BugDriver::runManyPasses(const std::vector<const PassInfo*> &AllPasses) {
+bool BugDriver::runManyPasses(const std::vector<const PassInfo*> &AllPasses,
+                              std::string &ErrMsg) {
   setPassesToRun(AllPasses);
   outs() << "Starting bug finding procedure...\n\n";
   
@@ -74,33 +75,33 @@
     // Step 3: Compile the optimized code.
     //
     outs() << "Running the code generator to test for a crash: ";
-    try {
-      compileProgram(Program);
-      outs() << '\n';
-    } catch (ToolExecutionError &TEE) {
+    std::string Error;
+    compileProgram(Program, &Error);
+    if (!Error.empty()) {
       outs() << "\n*** compileProgram threw an exception: ";
-      outs() << TEE.what();
-      return debugCodeGeneratorCrash();
+      outs() << Error;
+      return debugCodeGeneratorCrash(ErrMsg);
     }
+    outs() << '\n';
     
     //
     // Step 4: Run the program and compare its output to the reference 
     // output (created above).
     //
     outs() << "*** Checking if passes caused miscompliation:\n";
-    try {
-      if (diffProgram(Filename, "", false)) {
-        outs() << "\n*** diffProgram returned true!\n";
-        debugMiscompilation();
+    bool Diff = diffProgram(Filename, "", false, &Error);
+    if (Error.empty() && Diff) {
+      outs() << "\n*** diffProgram returned true!\n";
+      debugMiscompilation(&Error);
+      if (Error.empty())
         return true;
-      } else {
-        outs() << "\n*** diff'd output matches!\n";
-      }
-    } catch (ToolExecutionError &TEE) {
-      errs() << TEE.what();
-      debugCodeGeneratorCrash();
+    }
+    if (!Error.empty()) {
+      errs() << Error;
+      debugCodeGeneratorCrash(ErrMsg);
       return true;
     }
+    outs() << "\n*** diff'd output matches!\n";
     
     sys::Path(Filename).eraseFromDisk();
     

Modified: llvm/trunk/tools/bugpoint/ListReducer.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/ListReducer.h?rev=101013&r1=101012&r2=101013&view=diff
==============================================================================
--- llvm/trunk/tools/bugpoint/ListReducer.h (original)
+++ llvm/trunk/tools/bugpoint/ListReducer.h Mon Apr 12 00:08:25 2010
@@ -16,6 +16,7 @@
 #define BUGPOINT_LIST_REDUCER_H
 
 #include "llvm/Support/raw_ostream.h"
+#include "llvm/Support/ErrorHandling.h"
 #include <vector>
 #include <cstdlib>
 #include <algorithm>
@@ -29,7 +30,8 @@
   enum TestResult {
     NoFailure,         // No failure of the predicate was detected
     KeepSuffix,        // The suffix alone satisfies the predicate
-    KeepPrefix         // The prefix alone satisfies the predicate
+    KeepPrefix,        // The prefix alone satisfies the predicate
+    InternalError      // Encountered an error trying to run the predicate
   };
 
   virtual ~ListReducer() {}
@@ -40,16 +42,17 @@
   // the prefix anyway, it can.
   //
   virtual TestResult doTest(std::vector<ElTy> &Prefix,
-                            std::vector<ElTy> &Kept) = 0;
+                            std::vector<ElTy> &Kept,
+                            std::string &Error) = 0;
 
   // reduceList - This function attempts to reduce the length of the specified
   // list while still maintaining the "test" property.  This is the core of the
   // "work" that bugpoint does.
   //
-  bool reduceList(std::vector<ElTy> &TheList) {
+  bool reduceList(std::vector<ElTy> &TheList, std::string &Error) {
     std::vector<ElTy> empty;
     std::srand(0x6e5ea738); // Seed the random number generator
-    switch (doTest(TheList, empty)) {
+    switch (doTest(TheList, empty, Error)) {
     case KeepPrefix:
       if (TheList.size() == 1) // we are done, it's the base case and it fails
         return true;
@@ -58,11 +61,15 @@
 
     case KeepSuffix:
       // cannot be reached!
-      errs() << "bugpoint ListReducer internal error: selected empty set.\n";
-      abort();
+      llvm_unreachable("bugpoint ListReducer internal error: "
+                       "selected empty set.");
 
     case NoFailure:
       return false; // there is no failure with the full set of passes/funcs!
+
+    case InternalError:
+      assert(!Error.empty());
+      return true;
     }
 
     // Maximal number of allowed splitting iterations,
@@ -90,7 +97,7 @@
         std::random_shuffle(ShuffledList.begin(), ShuffledList.end());
         errs() << "\n\n*** Testing shuffled set...\n\n";
         // Check that random shuffle doesn't loose the bug
-        if (doTest(ShuffledList, empty) == KeepPrefix) {
+        if (doTest(ShuffledList, empty, Error) == KeepPrefix) {
           // If the bug is still here, use the shuffled list.
           TheList.swap(ShuffledList);
           MidTop = TheList.size();
@@ -109,7 +116,7 @@
       std::vector<ElTy> Prefix(TheList.begin(), TheList.begin()+Mid);
       std::vector<ElTy> Suffix(TheList.begin()+Mid, TheList.end());
 
-      switch (doTest(Prefix, Suffix)) {
+      switch (doTest(Prefix, Suffix, Error)) {
       case KeepSuffix:
         // The property still holds.  We can just drop the prefix elements, and
         // shorten the list to the "kept" elements.
@@ -133,7 +140,10 @@
         MidTop = Mid;
         NumOfIterationsWithoutProgress++;
         break;
+      case InternalError:
+        return true;  // Error was set by doTest.
       }
+      assert(Error.empty() && "doTest did not return InternalError for error");
     }
 
     // Probability of backjumping from the trimming loop back to the binary
@@ -167,12 +177,14 @@
           std::vector<ElTy> TestList(TheList);
           TestList.erase(TestList.begin()+i);
 
-          if (doTest(EmptyList, TestList) == KeepSuffix) {
+          if (doTest(EmptyList, TestList, Error) == KeepSuffix) {
             // We can trim down the list!
             TheList.swap(TestList);
             --i;  // Don't skip an element of the list
             Changed = true;
           }
+	  if (!Error.empty())
+	    return true;
         }
         // This can take a long time if left uncontrolled.  For now, don't
         // iterate.

Modified: llvm/trunk/tools/bugpoint/Miscompilation.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/Miscompilation.cpp?rev=101013&r1=101012&r2=101013&view=diff
==============================================================================
--- llvm/trunk/tools/bugpoint/Miscompilation.cpp (original)
+++ llvm/trunk/tools/bugpoint/Miscompilation.cpp Mon Apr 12 00:08:25 2010
@@ -49,7 +49,8 @@
     ReduceMiscompilingPasses(BugDriver &bd) : BD(bd) {}
 
     virtual TestResult doTest(std::vector<const PassInfo*> &Prefix,
-                              std::vector<const PassInfo*> &Suffix);
+                              std::vector<const PassInfo*> &Suffix,
+                              std::string &Error);
   };
 }
 
@@ -58,7 +59,8 @@
 ///
 ReduceMiscompilingPasses::TestResult
 ReduceMiscompilingPasses::doTest(std::vector<const PassInfo*> &Prefix,
-                                 std::vector<const PassInfo*> &Suffix) {
+                                 std::vector<const PassInfo*> &Suffix,
+                                 std::string &Error) {
   // First, run the program with just the Suffix passes.  If it is still broken
   // with JUST the kept passes, discard the prefix passes.
   outs() << "Checking to see if '" << getPassesString(Suffix)
@@ -74,7 +76,11 @@
   }
   
   // Check to see if the finished program matches the reference output...
-  if (BD.diffProgram(BitcodeResult, "", true /*delete bitcode*/)) {
+  bool Diff = BD.diffProgram(BitcodeResult, "", true /*delete bitcode*/,
+                             &Error);
+  if (!Error.empty())
+    return InternalError;
+  if (Diff) {
     outs() << " nope.\n";
     if (Suffix.empty()) {
       errs() << BD.getToolName() << ": I'm confused: the test fails when "
@@ -107,7 +113,10 @@
   }
 
   // If the prefix maintains the predicate by itself, only keep the prefix!
-  if (BD.diffProgram(BitcodeResult)) {
+  Diff = BD.diffProgram(BitcodeResult, "", false, &Error);
+  if (!Error.empty())
+    return InternalError;
+  if (Diff) {
     outs() << " nope.\n";
     sys::Path(BitcodeResult).eraseFromDisk();
     return KeepPrefix;
@@ -143,7 +152,10 @@
   }
 
   // Run the result...
-  if (BD.diffProgram(BitcodeResult, "", true/*delete bitcode*/)) {
+  Diff = BD.diffProgram(BitcodeResult, "", true /*delete bitcode*/, &Error);
+  if (!Error.empty())
+    return InternalError;
+  if (Diff) {
     outs() << " nope.\n";
     delete OriginalInput;     // We pruned down the original input...
     return KeepSuffix;
@@ -158,22 +170,34 @@
 namespace {
   class ReduceMiscompilingFunctions : public ListReducer<Function*> {
     BugDriver &BD;
-    bool (*TestFn)(BugDriver &, Module *, Module *);
+    bool (*TestFn)(BugDriver &, Module *, Module *, std::string &);
   public:
     ReduceMiscompilingFunctions(BugDriver &bd,
-                                bool (*F)(BugDriver &, Module *, Module *))
+                                bool (*F)(BugDriver &, Module *, Module *,
+                                          std::string &))
       : BD(bd), TestFn(F) {}
 
     virtual TestResult doTest(std::vector<Function*> &Prefix,
-                              std::vector<Function*> &Suffix) {
-      if (!Suffix.empty() && TestFuncs(Suffix))
-        return KeepSuffix;
-      if (!Prefix.empty() && TestFuncs(Prefix))
-        return KeepPrefix;
+                              std::vector<Function*> &Suffix,
+                              std::string &Error) {
+      if (!Suffix.empty()) {
+        bool Ret = TestFuncs(Suffix, Error);
+        if (!Error.empty())
+          return InternalError;
+        if (Ret)
+          return KeepSuffix;
+      }
+      if (!Prefix.empty()) {
+        bool Ret = TestFuncs(Prefix, Error);
+        if (!Error.empty())
+          return InternalError;
+        if (Ret)
+          return KeepPrefix;
+      }
       return NoFailure;
     }
 
-    bool TestFuncs(const std::vector<Function*> &Prefix);
+    int TestFuncs(const std::vector<Function*> &Prefix, std::string &Error);
   };
 }
 
@@ -184,7 +208,7 @@
 /// returns.
 ///
 static bool TestMergedProgram(BugDriver &BD, Module *M1, Module *M2,
-                              bool DeleteInputs) {
+                              bool DeleteInputs, std::string &Error) {
   // Link the two portions of the program back to together.
   std::string ErrorMsg;
   if (!DeleteInputs) {
@@ -202,11 +226,12 @@
 
   // Execute the program.  If it does not match the expected output, we must
   // return true.
-  bool Broken = BD.diffProgram();
-
-  // Delete the linked module & restore the original
-  BD.swapProgramIn(OldProgram);
-  delete M1;
+  bool Broken = BD.diffProgram("", "", false, &Error);
+  if (!Error.empty()) {
+    // Delete the linked module & restore the original
+    BD.swapProgramIn(OldProgram);
+    delete M1;
+  }
   return Broken;
 }
 
@@ -214,7 +239,8 @@
 /// under consideration for miscompilation vs. those that are not, and test
 /// accordingly. Each group of functions becomes a separate Module.
 ///
-bool ReduceMiscompilingFunctions::TestFuncs(const std::vector<Function*>&Funcs){
+int ReduceMiscompilingFunctions::TestFuncs(const std::vector<Function*> &Funcs,
+                                           std::string &Error) {
   // Test to see if the function is misoptimized if we ONLY run it on the
   // functions listed in Funcs.
   outs() << "Checking to see if the program is misoptimized when "
@@ -231,7 +257,7 @@
                                                  ValueMap);
 
   // Run the predicate, note that the predicate will delete both input modules.
-  return TestFn(BD, ToOptimize, ToNotOptimize);
+  return TestFn(BD, ToOptimize, ToNotOptimize, Error);
 }
 
 /// DisambiguateGlobalSymbols - Give anonymous global values names.
@@ -251,8 +277,10 @@
 /// bug.  If so, it reduces the amount of code identified.
 ///
 static bool ExtractLoops(BugDriver &BD,
-                         bool (*TestFn)(BugDriver &, Module *, Module *),
-                         std::vector<Function*> &MiscompiledFunctions) {
+                         bool (*TestFn)(BugDriver &, Module *, Module *,
+                                        std::string &),
+                         std::vector<Function*> &MiscompiledFunctions,
+                         std::string &Error) {
   bool MadeChange = false;
   while (1) {
     if (BugpointIsInterrupted) return MadeChange;
@@ -279,7 +307,11 @@
     // has broken.  If something broke, then we'll inform the user and stop
     // extraction.
     AbstractInterpreter *AI = BD.switchToSafeInterpreter();
-    if (TestMergedProgram(BD, ToOptimizeLoopExtracted, ToNotOptimize, false)) {
+    bool Failure = TestMergedProgram(BD, ToOptimizeLoopExtracted, ToNotOptimize,
+                                     false, Error);
+    if (!Error.empty())
+      return false;
+    if (Failure) {
       BD.switchToInterpreter(AI);
 
       // Merged program doesn't work anymore!
@@ -308,7 +340,10 @@
     // Clone modules, the tester function will free them.
     Module *TOLEBackup = CloneModule(ToOptimizeLoopExtracted);
     Module *TNOBackup  = CloneModule(ToNotOptimize);
-    if (!TestFn(BD, ToOptimizeLoopExtracted, ToNotOptimize)) {
+    Failure = TestFn(BD, ToOptimizeLoopExtracted, ToNotOptimize, Error);
+    if (!Error.empty())
+      return false;
+    if (!Failure) {
       outs() << "*** Loop extraction masked the problem.  Undoing.\n";
       // If the program is not still broken, then loop extraction did something
       // that masked the error.  Stop loop extraction now.
@@ -361,31 +396,44 @@
 namespace {
   class ReduceMiscompiledBlocks : public ListReducer<BasicBlock*> {
     BugDriver &BD;
-    bool (*TestFn)(BugDriver &, Module *, Module *);
+    bool (*TestFn)(BugDriver &, Module *, Module *, std::string &);
     std::vector<Function*> FunctionsBeingTested;
   public:
     ReduceMiscompiledBlocks(BugDriver &bd,
-                            bool (*F)(BugDriver &, Module *, Module *),
+                            bool (*F)(BugDriver &, Module *, Module *,
+                                      std::string &),
                             const std::vector<Function*> &Fns)
       : BD(bd), TestFn(F), FunctionsBeingTested(Fns) {}
 
     virtual TestResult doTest(std::vector<BasicBlock*> &Prefix,
-                              std::vector<BasicBlock*> &Suffix) {
-      if (!Suffix.empty() && TestFuncs(Suffix))
-        return KeepSuffix;
-      if (TestFuncs(Prefix))
-        return KeepPrefix;
+                              std::vector<BasicBlock*> &Suffix,
+                              std::string &Error) {
+      if (!Suffix.empty()) {
+        bool Ret = TestFuncs(Suffix, Error);
+        if (!Error.empty())
+          return InternalError;
+        if (Ret)
+          return KeepSuffix;
+      }
+      if (!Prefix.empty()) {
+        bool Ret = TestFuncs(Prefix, Error);
+        if (!Error.empty())
+          return InternalError;
+        if (Ret)
+          return KeepPrefix;
+      }
       return NoFailure;
     }
 
-    bool TestFuncs(const std::vector<BasicBlock*> &Prefix);
+    bool TestFuncs(const std::vector<BasicBlock*> &BBs, std::string &Error);
   };
 }
 
 /// TestFuncs - Extract all blocks for the miscompiled functions except for the
 /// specified blocks.  If the problem still exists, return true.
 ///
-bool ReduceMiscompiledBlocks::TestFuncs(const std::vector<BasicBlock*> &BBs) {
+bool ReduceMiscompiledBlocks::TestFuncs(const std::vector<BasicBlock*> &BBs,
+                                        std::string &Error) {
   // Test to see if the function is misoptimized if we ONLY run it on the
   // functions listed in Funcs.
   outs() << "Checking to see if the program is misoptimized when all ";
@@ -411,7 +459,7 @@
   if (Module *New = BD.ExtractMappedBlocksFromModule(BBs, ToOptimize)) {
     delete ToOptimize;
     // Run the predicate, not that the predicate will delete both input modules.
-    return TestFn(BD, New, ToNotOptimize);
+    return TestFn(BD, New, ToNotOptimize, Error);
   }
   delete ToOptimize;
   delete ToNotOptimize;
@@ -424,8 +472,10 @@
 /// the bug.
 ///
 static bool ExtractBlocks(BugDriver &BD,
-                          bool (*TestFn)(BugDriver &, Module *, Module *),
-                          std::vector<Function*> &MiscompiledFunctions) {
+                          bool (*TestFn)(BugDriver &, Module *, Module *,
+                                         std::string &),
+                          std::vector<Function*> &MiscompiledFunctions,
+                          std::string &Error) {
   if (BugpointIsInterrupted) return false;
   
   std::vector<BasicBlock*> Blocks;
@@ -440,11 +490,17 @@
   unsigned OldSize = Blocks.size();
 
   // Check to see if all blocks are extractible first.
-  if (ReduceMiscompiledBlocks(BD, TestFn,
-                  MiscompiledFunctions).TestFuncs(std::vector<BasicBlock*>())) {
+  bool Ret = ReduceMiscompiledBlocks(BD, TestFn, MiscompiledFunctions)
+                                  .TestFuncs(std::vector<BasicBlock*>(), Error);
+  if (!Error.empty())
+    return false;
+  if (Ret) {
     Blocks.clear();
   } else {
-    ReduceMiscompiledBlocks(BD, TestFn,MiscompiledFunctions).reduceList(Blocks);
+    ReduceMiscompiledBlocks(BD, TestFn,
+                            MiscompiledFunctions).reduceList(Blocks, Error);
+    if (!Error.empty())
+      return false;
     if (Blocks.size() == OldSize)
       return false;
   }
@@ -505,7 +561,9 @@
 ///
 static std::vector<Function*>
 DebugAMiscompilation(BugDriver &BD,
-                     bool (*TestFn)(BugDriver &, Module *, Module *)) {
+                     bool (*TestFn)(BugDriver &, Module *, Module *,
+                                    std::string &),
+                     std::string &Error) {
   // Okay, now that we have reduced the list of passes which are causing the
   // failure, see if we can pin down which functions are being
   // miscompiled... first build a list of all of the non-external functions in
@@ -518,7 +576,10 @@
 
   // Do the reduction...
   if (!BugpointIsInterrupted)
-    ReduceMiscompilingFunctions(BD, TestFn).reduceList(MiscompiledFunctions);
+    ReduceMiscompilingFunctions(BD, TestFn).reduceList(MiscompiledFunctions,
+                                                       Error);
+  if (!Error.empty())
+    return MiscompiledFunctions;
 
   outs() << "\n*** The following function"
          << (MiscompiledFunctions.size() == 1 ? " is" : "s are")
@@ -529,37 +590,51 @@
   // See if we can rip any loops out of the miscompiled functions and still
   // trigger the problem.
 
-  if (!BugpointIsInterrupted && !DisableLoopExtraction &&
-      ExtractLoops(BD, TestFn, MiscompiledFunctions)) {
-    // Okay, we extracted some loops and the problem still appears.  See if we
-    // can eliminate some of the created functions from being candidates.
-    DisambiguateGlobalSymbols(BD.getProgram());
-
-    // Do the reduction...
-    if (!BugpointIsInterrupted)
-      ReduceMiscompilingFunctions(BD, TestFn).reduceList(MiscompiledFunctions);
-
-    outs() << "\n*** The following function"
-           << (MiscompiledFunctions.size() == 1 ? " is" : "s are")
-           << " being miscompiled: ";
-    PrintFunctionList(MiscompiledFunctions);
-    outs() << '\n';
-  }
-
-  if (!BugpointIsInterrupted && !DisableBlockExtraction && 
-      ExtractBlocks(BD, TestFn, MiscompiledFunctions)) {
-    // Okay, we extracted some blocks and the problem still appears.  See if we
-    // can eliminate some of the created functions from being candidates.
-    DisambiguateGlobalSymbols(BD.getProgram());
-
-    // Do the reduction...
-    ReduceMiscompilingFunctions(BD, TestFn).reduceList(MiscompiledFunctions);
-
-    outs() << "\n*** The following function"
-           << (MiscompiledFunctions.size() == 1 ? " is" : "s are")
-           << " being miscompiled: ";
-    PrintFunctionList(MiscompiledFunctions);
-    outs() << '\n';
+  if (!BugpointIsInterrupted && !DisableLoopExtraction) {
+    bool Ret = ExtractLoops(BD, TestFn, MiscompiledFunctions, Error);
+    if (!Error.empty())
+      return MiscompiledFunctions;
+    if (Ret) {
+      // Okay, we extracted some loops and the problem still appears.  See if
+      // we can eliminate some of the created functions from being candidates.
+      DisambiguateGlobalSymbols(BD.getProgram());
+
+      // Do the reduction...
+      if (!BugpointIsInterrupted)
+        ReduceMiscompilingFunctions(BD, TestFn).reduceList(MiscompiledFunctions,
+                                                           Error);
+      if (!Error.empty())
+        return MiscompiledFunctions;
+
+      outs() << "\n*** The following function"
+             << (MiscompiledFunctions.size() == 1 ? " is" : "s are")
+             << " being miscompiled: ";
+      PrintFunctionList(MiscompiledFunctions);
+      outs() << '\n';
+    }
+  }
+
+  if (!BugpointIsInterrupted && !DisableBlockExtraction) {
+    bool Ret = ExtractBlocks(BD, TestFn, MiscompiledFunctions, Error);
+    if (!Error.empty())
+      return MiscompiledFunctions;
+    if (Ret) {
+      // Okay, we extracted some blocks and the problem still appears.  See if
+      // we can eliminate some of the created functions from being candidates.
+      DisambiguateGlobalSymbols(BD.getProgram());
+
+      // Do the reduction...
+      ReduceMiscompilingFunctions(BD, TestFn).reduceList(MiscompiledFunctions,
+                                                         Error);
+      if (!Error.empty())
+        return MiscompiledFunctions;
+
+      outs() << "\n*** The following function"
+             << (MiscompiledFunctions.size() == 1 ? " is" : "s are")
+             << " being miscompiled: ";
+      PrintFunctionList(MiscompiledFunctions);
+      outs() << '\n';
+    }
   }
 
   return MiscompiledFunctions;
@@ -569,7 +644,8 @@
 /// "Test" portion of the program is misoptimized.  If so, return true.  In any
 /// case, both module arguments are deleted.
 ///
-static bool TestOptimizer(BugDriver &BD, Module *Test, Module *Safe) {
+static bool TestOptimizer(BugDriver &BD, Module *Test, Module *Safe,
+                          std::string &Error) {
   // Run the optimization passes on ToOptimize, producing a transformed version
   // of the functions being tested.
   outs() << "  Optimizing functions being tested: ";
@@ -579,8 +655,8 @@
   delete Test;
 
   outs() << "  Checking to see if the merged program executes correctly: ";
-  bool Broken = TestMergedProgram(BD, Optimized, Safe, true);
-  outs() << (Broken ? " nope.\n" : " yup.\n");
+  bool Broken = TestMergedProgram(BD, Optimized, Safe, true, Error);
+  if (Error.empty()) outs() << (Broken ? " nope.\n" : " yup.\n");
   return Broken;
 }
 
@@ -589,13 +665,14 @@
 /// crashing, but the generated output is semantically different from the
 /// input.
 ///
-bool BugDriver::debugMiscompilation() {
+void BugDriver::debugMiscompilation(std::string *Error) {
   // Make sure something was miscompiled...
   if (!BugpointIsInterrupted)
-    if (!ReduceMiscompilingPasses(*this).reduceList(PassesToRun)) {
-      errs() << "*** Optimized program matches reference output!  No problem"
-             << " detected...\nbugpoint can't help you with your problem!\n";
-      return false;
+    if (!ReduceMiscompilingPasses(*this).reduceList(PassesToRun, *Error)) {
+      if (Error->empty())
+        errs() << "*** Optimized program matches reference output!  No problem"
+               << " detected...\nbugpoint can't help you with your problem!\n";
+      return;
     }
 
   outs() << "\n*** Found miscompiling pass"
@@ -603,8 +680,10 @@
          << getPassesString(getPassesToRun()) << '\n';
   EmitProgressBitcode("passinput");
 
-  std::vector<Function*> MiscompiledFunctions =
-    DebugAMiscompilation(*this, TestOptimizer);
+  std::vector<Function *> MiscompiledFunctions = 
+    DebugAMiscompilation(*this, TestOptimizer, *Error);
+  if (!Error->empty())
+    return;
 
   // Output a bunch of bitcode files for the user...
   outs() << "Outputting reduced bitcode files which expose the problem:\n";
@@ -624,7 +703,7 @@
   EmitProgressBitcode("tooptimize");
   setNewProgram(ToOptimize);      // Delete hacked module.
 
-  return false;
+  return;
 }
 
 /// CleanupAndPrepareModules - Get the specified modules ready for code
@@ -797,7 +876,8 @@
 /// the "Test" portion of the program is miscompiled by the code generator under
 /// test.  If so, return true.  In any case, both module arguments are deleted.
 ///
-static bool TestCodeGenerator(BugDriver &BD, Module *Test, Module *Safe) {
+static bool TestCodeGenerator(BugDriver &BD, Module *Test, Module *Safe,
+                              std::string &Error) {
   CleanupAndPrepareModules(BD, Test, Safe);
 
   sys::Path TestModuleBC("bugpoint.test.bc");
@@ -827,12 +907,16 @@
            << "'\nExiting.";
     exit(1);
   }
-  std::string SharedObject = BD.compileSharedObject(SafeModuleBC.str());
+  std::string SharedObject = BD.compileSharedObject(SafeModuleBC.str(), Error);
+  if (!Error.empty())
+    return -1;
   delete Safe;
 
   // Run the code generator on the `Test' code, loading the shared library.
   // The function returns whether or not the new output differs from reference.
-  int Result = BD.diffProgram(TestModuleBC.str(), SharedObject, false);
+  bool Result = BD.diffProgram(TestModuleBC.str(), SharedObject, false, &Error);
+  if (!Error.empty())
+    return false;
 
   if (Result)
     errs() << ": still failing!\n";
@@ -848,23 +932,28 @@
 
 /// debugCodeGenerator - debug errors in LLC, LLI, or CBE.
 ///
-bool BugDriver::debugCodeGenerator() {
+bool BugDriver::debugCodeGenerator(std::string *Error) {
   if ((void*)SafeInterpreter == (void*)Interpreter) {
-    std::string Result = executeProgramSafely("bugpoint.safe.out");
-    outs() << "\n*** The \"safe\" i.e. 'known good' backend cannot match "
-           << "the reference diff.  This may be due to a\n    front-end "
-           << "bug or a bug in the original program, but this can also "
-           << "happen if bugpoint isn't running the program with the "
-           << "right flags or input.\n    I left the result of executing "
-           << "the program with the \"safe\" backend in this file for "
-           << "you: '"
-           << Result << "'.\n";
+    std::string Result = executeProgramSafely("bugpoint.safe.out", Error);
+    if (Error->empty()) {
+      outs() << "\n*** The \"safe\" i.e. 'known good' backend cannot match "
+             << "the reference diff.  This may be due to a\n    front-end "
+             << "bug or a bug in the original program, but this can also "
+             << "happen if bugpoint isn't running the program with the "
+             << "right flags or input.\n    I left the result of executing "
+             << "the program with the \"safe\" backend in this file for "
+             << "you: '"
+             << Result << "'.\n";
+    }
     return true;
   }
 
   DisambiguateGlobalSymbols(Program);
 
-  std::vector<Function*> Funcs = DebugAMiscompilation(*this, TestCodeGenerator);
+  std::vector<Function*> Funcs = DebugAMiscompilation(*this, TestCodeGenerator,
+                                                      *Error);
+  if (!Error->empty())
+    return true;
 
   // Split the module into the two halves of the program we want.
   DenseMap<const Value*, Value*> ValueMap;
@@ -902,7 +991,9 @@
            << "'\nExiting.";
     exit(1);
   }
-  std::string SharedObject = compileSharedObject(SafeModuleBC.str());
+  std::string SharedObject = compileSharedObject(SafeModuleBC.str(), *Error);
+  if (!Error->empty())
+    return true;
   delete ToNotCodeGen;
 
   outs() << "You can reproduce the problem with the command line: \n";
@@ -919,7 +1010,7 @@
     outs() << "\n";
     outs() << "  " << TestModuleBC.str() << ".exe";
   }
-  for (unsigned i=0, e = InputArgv.size(); i != e; ++i)
+  for (unsigned i = 0, e = InputArgv.size(); i != e; ++i)
     outs() << " " << InputArgv[i];
   outs() << '\n';
   outs() << "The shared object was created with:\n  llc -march=c "

Modified: llvm/trunk/tools/bugpoint/ToolRunner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/ToolRunner.cpp?rev=101013&r1=101012&r2=101013&view=diff
==============================================================================
--- llvm/trunk/tools/bugpoint/ToolRunner.cpp (original)
+++ llvm/trunk/tools/bugpoint/ToolRunner.cpp Mon Apr 12 00:08:25 2010
@@ -50,11 +50,9 @@
           cl::desc("Remote execution (rsh/ssh) extra options"));
 }
 
-ToolExecutionError::~ToolExecutionError() throw() { }
-
 /// RunProgramWithTimeout - This function provides an alternate interface
 /// to the sys::Program::ExecuteAndWait interface.
-/// @see sys:Program::ExecuteAndWait
+/// @see sys::Program::ExecuteAndWait
 static int RunProgramWithTimeout(const sys::Path &ProgramPath,
                                  const char **Args,
                                  const sys::Path &StdInFile,
@@ -86,7 +84,7 @@
 /// Returns the remote program exit code or reports a remote client error if it
 /// fails. Remote client is required to return 255 if it failed or program exit
 /// code otherwise.
-/// @see sys:Program::ExecuteAndWait
+/// @see sys::Program::ExecuteAndWait
 static int RunProgramRemotelyWithTimeout(const sys::Path &RemoteClientPath,
                                          const char **Args,
                                          const sys::Path &StdInFile,
@@ -129,13 +127,13 @@
       ErrorFile.close();
     }
 
-    throw ToolExecutionError(OS.str());
+    errs() << OS;
   }
 
   return ReturnCode;
 }
 
-static void ProcessFailure(sys::Path ProgPath, const char** Args) {
+static std::string ProcessFailure(sys::Path ProgPath, const char** Args) {
   std::ostringstream OS;
   OS << "\nError running tool:\n ";
   for (const char **Arg = Args; *Arg; ++Arg)
@@ -162,7 +160,7 @@
   }
 
   ErrorFilename.eraseFromDisk();
-  throw ToolExecutionError(OS.str());
+  return OS.str();
 }
 
 //===---------------------------------------------------------------------===//
@@ -183,6 +181,7 @@
                                const std::vector<std::string> &Args,
                                const std::string &InputFile,
                                const std::string &OutputFile,
+                               std::string *Error,
                                const std::vector<std::string> &GCCArgs,
                                const std::vector<std::string> &SharedLibs =
                                std::vector<std::string>(),
@@ -195,6 +194,7 @@
                         const std::vector<std::string> &Args,
                         const std::string &InputFile,
                         const std::string &OutputFile,
+                        std::string *Error,
                         const std::vector<std::string> &GCCArgs,
                         const std::vector<std::string> &SharedLibs,
                         unsigned Timeout,
@@ -263,9 +263,10 @@
                                const std::vector<std::string> &Args,
                                const std::string &InputFile,
                                const std::string &OutputFile,
+                               std::string *Error,
                                const std::vector<std::string> &GCCArgs,
                                const std::vector<std::string> &SharedLibs =
-                               std::vector<std::string>(),
+                                 std::vector<std::string>(),
                                unsigned Timeout = 0,
                                unsigned MemoryLimit = 0);
   };
@@ -275,6 +276,7 @@
                         const std::vector<std::string> &Args,
                         const std::string &InputFile,
                         const std::string &OutputFile,
+                        std::string *Error,
                         const std::vector<std::string> &GCCArgs,
                         const std::vector<std::string> &SharedLibs,
                         unsigned Timeout,
@@ -289,7 +291,7 @@
   ProgramArgs.push_back(0);
 
   // Add optional parameters to the running program from Argv
-  for (unsigned i=0, e = Args.size(); i != e; ++i)
+  for (unsigned i = 0, e = Args.size(); i != e; ++i)
     ProgramArgs.push_back(Args[i].c_str());
 
   return RunProgramWithTimeout(
@@ -351,7 +353,7 @@
 // LLC Implementation of AbstractIntepreter interface
 //
 GCC::FileType LLC::OutputCode(const std::string &Bitcode, 
-                              sys::Path &OutputAsmFile) {
+                              sys::Path &OutputAsmFile, std::string &Error) {
   const char *Suffix = (UseIntegratedAssembler ? ".llc.o" : ".llc.s");
   sys::Path uniqueFile(Bitcode + Suffix);
   std::string ErrMsg;
@@ -379,20 +381,19 @@
   outs() << (UseIntegratedAssembler ? "<llc-ia>" : "<llc>");
   outs().flush();
   DEBUG(errs() << "\nAbout to run:\t";
-        for (unsigned i=0, e = LLCArgs.size()-1; i != e; ++i)
+        for (unsigned i = 0, e = LLCArgs.size()-1; i != e; ++i)
           errs() << " " << LLCArgs[i];
         errs() << "\n";
         );
   if (RunProgramWithTimeout(sys::Path(LLCPath), &LLCArgs[0],
                             sys::Path(), sys::Path(), sys::Path()))
-    ProcessFailure(sys::Path(LLCPath), &LLCArgs[0]);
-
-  return UseIntegratedAssembler ? GCC::ObjectFile : GCC::AsmFile;
+    Error = ProcessFailure(sys::Path(LLCPath), &LLCArgs[0]);
+  return UseIntegratedAssembler ? GCC::ObjectFile : GCC::AsmFile;  
 }
 
-void LLC::compileProgram(const std::string &Bitcode) {
+void LLC::compileProgram(const std::string &Bitcode, std::string *Error) {
   sys::Path OutputAsmFile;
-  OutputCode(Bitcode, OutputAsmFile);
+  OutputCode(Bitcode, OutputAsmFile, *Error);
   OutputAsmFile.eraseFromDisk();
 }
 
@@ -400,13 +401,14 @@
                         const std::vector<std::string> &Args,
                         const std::string &InputFile,
                         const std::string &OutputFile,
+                        std::string *Error,
                         const std::vector<std::string> &ArgsForGCC,
                         const std::vector<std::string> &SharedLibs,
                         unsigned Timeout,
                         unsigned MemoryLimit) {
 
   sys::Path OutputAsmFile;
-  GCC::FileType FileKind = OutputCode(Bitcode, OutputAsmFile);
+  GCC::FileType FileKind = OutputCode(Bitcode, OutputAsmFile, *Error);
   FileRemover OutFileRemover(OutputAsmFile, !SaveTemps);
 
   std::vector<std::string> GCCArgs(ArgsForGCC);
@@ -415,7 +417,7 @@
 
   // Assuming LLC worked, compile the result with GCC and run it.
   return gcc->ExecuteProgram(OutputAsmFile.str(), Args, FileKind,
-                             InputFile, OutputFile, GCCArgs,
+                             InputFile, OutputFile, Error, GCCArgs,
                              Timeout, MemoryLimit);
 }
 
@@ -460,12 +462,13 @@
                                const std::vector<std::string> &Args,
                                const std::string &InputFile,
                                const std::string &OutputFile,
+                               std::string *Error,
                                const std::vector<std::string> &GCCArgs =
                                  std::vector<std::string>(),
                                const std::vector<std::string> &SharedLibs =
                                  std::vector<std::string>(), 
-                               unsigned Timeout =0,
-                               unsigned MemoryLimit =0);
+                               unsigned Timeout = 0,
+                               unsigned MemoryLimit = 0);
   };
 }
 
@@ -473,6 +476,7 @@
                         const std::vector<std::string> &Args,
                         const std::string &InputFile,
                         const std::string &OutputFile,
+                        std::string *Error,
                         const std::vector<std::string> &GCCArgs,
                         const std::vector<std::string> &SharedLibs,
                         unsigned Timeout,
@@ -524,7 +528,7 @@
 }
 
 GCC::FileType CBE::OutputCode(const std::string &Bitcode,
-                              sys::Path &OutputCFile) {
+                              sys::Path &OutputCFile, std::string &Error) {
   sys::Path uniqueFile(Bitcode+".cbe.c");
   std::string ErrMsg;
   if (uniqueFile.makeUnique(true, &ErrMsg)) {
@@ -533,34 +537,34 @@
   }
   OutputCFile = uniqueFile;
   std::vector<const char *> LLCArgs;
-  LLCArgs.push_back (LLCPath.c_str());
+  LLCArgs.push_back(LLCPath.c_str());
 
   // Add any extra LLC args.
   for (unsigned i = 0, e = ToolArgs.size(); i != e; ++i)
     LLCArgs.push_back(ToolArgs[i].c_str());
 
-  LLCArgs.push_back ("-o");
-  LLCArgs.push_back (OutputCFile.c_str());   // Output to the C file
-  LLCArgs.push_back ("-march=c");            // Output C language
-  LLCArgs.push_back ("-f");                  // Overwrite as necessary...
-  LLCArgs.push_back (Bitcode.c_str());      // This is the input bitcode
-  LLCArgs.push_back (0);
+  LLCArgs.push_back("-o");
+  LLCArgs.push_back(OutputCFile.c_str());   // Output to the C file
+  LLCArgs.push_back("-march=c");            // Output C language
+  LLCArgs.push_back("-f");                  // Overwrite as necessary...
+  LLCArgs.push_back(Bitcode.c_str());      // This is the input bitcode
+  LLCArgs.push_back(0);
 
   outs() << "<cbe>"; outs().flush();
   DEBUG(errs() << "\nAbout to run:\t";
-        for (unsigned i=0, e = LLCArgs.size()-1; i != e; ++i)
+        for (unsigned i = 0, e = LLCArgs.size()-1; i != e; ++i)
           errs() << " " << LLCArgs[i];
         errs() << "\n";
         );
   if (RunProgramWithTimeout(LLCPath, &LLCArgs[0], sys::Path(), sys::Path(),
                             sys::Path()))
-    ProcessFailure(LLCPath, &LLCArgs[0]);
+    Error = ProcessFailure(LLCPath, &LLCArgs[0]);
   return GCC::CFile;
 }
 
-void CBE::compileProgram(const std::string &Bitcode) {
+void CBE::compileProgram(const std::string &Bitcode, std::string *Error) {
   sys::Path OutputCFile;
-  OutputCode(Bitcode, OutputCFile);
+  OutputCode(Bitcode, OutputCFile, *Error);
   OutputCFile.eraseFromDisk();
 }
 
@@ -568,12 +572,13 @@
                         const std::vector<std::string> &Args,
                         const std::string &InputFile,
                         const std::string &OutputFile,
+                        std::string *Error,
                         const std::vector<std::string> &ArgsForGCC,
                         const std::vector<std::string> &SharedLibs,
                         unsigned Timeout,
                         unsigned MemoryLimit) {
   sys::Path OutputCFile;
-  OutputCode(Bitcode, OutputCFile);
+  OutputCode(Bitcode, OutputCFile, *Error);
 
   FileRemover CFileRemove(OutputCFile, !SaveTemps);
 
@@ -581,7 +586,7 @@
   GCCArgs.insert(GCCArgs.end(), SharedLibs.begin(), SharedLibs.end());
 
   return gcc->ExecuteProgram(OutputCFile.str(), Args, GCC::CFile,
-                             InputFile, OutputFile, GCCArgs,
+                             InputFile, OutputFile, Error, GCCArgs,
                              Timeout, MemoryLimit);
 }
 
@@ -631,6 +636,7 @@
                         FileType fileType,
                         const std::string &InputFile,
                         const std::string &OutputFile,
+                        std::string *Error,
                         const std::vector<std::string> &ArgsForGCC,
                         unsigned Timeout,
                         unsigned MemoryLimit) {
@@ -694,14 +700,14 @@
 
   outs() << "<gcc>"; outs().flush();
   DEBUG(errs() << "\nAbout to run:\t";
-        for (unsigned i=0, e = GCCArgs.size()-1; i != e; ++i)
+        for (unsigned i = 0, e = GCCArgs.size()-1; i != e; ++i)
           errs() << " " << GCCArgs[i];
         errs() << "\n";
         );
   if (RunProgramWithTimeout(GCCPath, &GCCArgs[0], sys::Path(), sys::Path(),
         sys::Path())) {
-    ProcessFailure(GCCPath, &GCCArgs[0]);
-    exit(1);
+    *Error = ProcessFailure(GCCPath, &GCCArgs[0]);
+    return -1;
   }
 
   std::vector<const char*> ProgramArgs;
@@ -734,14 +740,14 @@
   }
 
   // Add optional parameters to the running program from Argv
-  for (unsigned i=0, e = Args.size(); i != e; ++i)
+  for (unsigned i = 0, e = Args.size(); i != e; ++i)
     ProgramArgs.push_back(Args[i].c_str());
   ProgramArgs.push_back(0);                // NULL terminator
 
   // Now that we have a binary, run it!
   outs() << "<program>"; outs().flush();
   DEBUG(errs() << "\nAbout to run:\t";
-        for (unsigned i=0, e = ProgramArgs.size()-1; i != e; ++i)
+        for (unsigned i = 0, e = ProgramArgs.size()-1; i != e; ++i)
           errs() << " " << ProgramArgs[i];
         errs() << "\n";
         );
@@ -749,7 +755,7 @@
   FileRemover OutputBinaryRemover(OutputBinary, !SaveTemps);
 
   if (RemoteClientPath.isEmpty()) {
-    DEBUG(errs() << "<run locally>";);
+    DEBUG(errs() << "<run locally>");
     return RunProgramWithTimeout(OutputBinary, &ProgramArgs[0],
         sys::Path(InputFile), sys::Path(OutputFile), sys::Path(OutputFile),
         Timeout, MemoryLimit);
@@ -763,7 +769,8 @@
 
 int GCC::MakeSharedObject(const std::string &InputFile, FileType fileType,
                           std::string &OutputFile,
-                          const std::vector<std::string> &ArgsForGCC) {
+                          const std::vector<std::string> &ArgsForGCC,
+                          std::string &Error) {
   sys::Path uniqueFilename(InputFile+LTDL_SHLIB_EXT);
   std::string ErrMsg;
   if (uniqueFilename.makeUnique(true, &ErrMsg)) {
@@ -831,13 +838,13 @@
 
   outs() << "<gcc>"; outs().flush();
   DEBUG(errs() << "\nAbout to run:\t";
-        for (unsigned i=0, e = GCCArgs.size()-1; i != e; ++i)
+        for (unsigned i = 0, e = GCCArgs.size()-1; i != e; ++i)
           errs() << " " << GCCArgs[i];
         errs() << "\n";
         );
   if (RunProgramWithTimeout(GCCPath, &GCCArgs[0], sys::Path(), sys::Path(),
                             sys::Path())) {
-    ProcessFailure(GCCPath, &GCCArgs[0]);
+    Error = ProcessFailure(GCCPath, &GCCArgs[0]);
     return 1;
   }
   return 0;

Modified: llvm/trunk/tools/bugpoint/ToolRunner.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/ToolRunner.h?rev=101013&r1=101012&r2=101013&view=diff
==============================================================================
--- llvm/trunk/tools/bugpoint/ToolRunner.h (original)
+++ llvm/trunk/tools/bugpoint/ToolRunner.h Mon Apr 12 00:08:25 2010
@@ -19,6 +19,7 @@
 
 #include "llvm/ADT/Triple.h"
 #include "llvm/Support/CommandLine.h"
+#include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/SystemUtils.h"
 #include "llvm/System/Path.h"
 #include <exception>
@@ -32,19 +33,6 @@
 class CBE;
 class LLC;
 
-/// ToolExecutionError - An instance of this class is thrown by the
-/// AbstractInterpreter instances if there is an error running a tool (e.g., LLC
-/// crashes) which prevents execution of the program.
-///
-class ToolExecutionError : std::exception {
-  std::string Message;
-public:
-  explicit ToolExecutionError(const std::string &M) : Message(M) {}
-  virtual ~ToolExecutionError() throw();
-  virtual const char* what() const throw() { return Message.c_str(); }
-};
-
-
 //===---------------------------------------------------------------------===//
 // GCC abstraction
 //
@@ -75,6 +63,7 @@
                      FileType fileType,
                      const std::string &InputFile,
                      const std::string &OutputFile,
+		     std::string *Error = 0,
                      const std::vector<std::string> &GCCArgs =
                          std::vector<std::string>(), 
                      unsigned Timeout = 0,
@@ -85,7 +74,8 @@
   ///
   int MakeSharedObject(const std::string &InputFile, FileType fileType,
                        std::string &OutputFile,
-                       const std::vector<std::string> &ArgsForGCC);
+                       const std::vector<std::string> &ArgsForGCC,
+                       std::string &Error);
 };
 
 
@@ -118,26 +108,29 @@
 
   /// compileProgram - Compile the specified program from bitcode to executable
   /// code.  This does not produce any output, it is only used when debugging
-  /// the code generator.  If the code generator fails, an exception should be
-  /// thrown, otherwise, this function will just return.
-  virtual void compileProgram(const std::string &Bitcode) {}
+  /// the code generator.  It returns false if the code generator fails.
+  virtual void compileProgram(const std::string &Bitcode, std::string *Error) {}
 
   /// OutputCode - Compile the specified program from bitcode to code
   /// understood by the GCC driver (either C or asm).  If the code generator
-  /// fails, an exception should be thrown, otherwise, this function returns the
-  /// type of code emitted.
+  /// fails, it sets Error, otherwise, this function returns the type of code
+  /// emitted.
   virtual GCC::FileType OutputCode(const std::string &Bitcode,
-                                   sys::Path &OutFile) {
-    throw std::string("OutputCode not supported by this AbstractInterpreter!");
+                                   sys::Path &OutFile, std::string &Error) {
+    Error = "OutputCode not supported by this AbstractInterpreter!";
+    return GCC::AsmFile;
   }
-  
+
   /// ExecuteProgram - Run the specified bitcode file, emitting output to the
-  /// specified filename.  This returns the exit code of the program.
+  /// specified filename.  This sets RetVal to the exit code of the program or
+  /// returns false if a problem was encountered that prevented execution of
+  /// the program.
   ///
   virtual int ExecuteProgram(const std::string &Bitcode,
                              const std::vector<std::string> &Args,
                              const std::string &InputFile,
                              const std::string &OutputFile,
+                             std::string *Error,
                              const std::vector<std::string> &GCCArgs =
                                std::vector<std::string>(),
                              const std::vector<std::string> &SharedLibs =
@@ -164,14 +157,14 @@
 
   /// compileProgram - Compile the specified program from bitcode to executable
   /// code.  This does not produce any output, it is only used when debugging
-  /// the code generator.  If the code generator fails, an exception should be
-  /// thrown, otherwise, this function will just return.
-  virtual void compileProgram(const std::string &Bitcode);
+  /// the code generator.  Returns false if the code generator fails.
+  virtual void compileProgram(const std::string &Bitcode, std::string *Error);
 
   virtual int ExecuteProgram(const std::string &Bitcode,
                              const std::vector<std::string> &Args,
                              const std::string &InputFile,
                              const std::string &OutputFile,
+                             std::string *Error,
                              const std::vector<std::string> &GCCArgs =
                                std::vector<std::string>(),
                              const std::vector<std::string> &SharedLibs =
@@ -181,10 +174,10 @@
 
   /// OutputCode - Compile the specified program from bitcode to code
   /// understood by the GCC driver (either C or asm).  If the code generator
-  /// fails, an exception should be thrown, otherwise, this function returns the
-  /// type of code emitted.
+  /// fails, it sets Error, otherwise, this function returns the type of code
+  /// emitted.
   virtual GCC::FileType OutputCode(const std::string &Bitcode,
-                                   sys::Path &OutFile);
+                                   sys::Path &OutFile, std::string &Error);
 };
 
 
@@ -212,14 +205,14 @@
 
   /// compileProgram - Compile the specified program from bitcode to executable
   /// code.  This does not produce any output, it is only used when debugging
-  /// the code generator.  If the code generator fails, an exception should be
-  /// thrown, otherwise, this function will just return.
-  virtual void compileProgram(const std::string &Bitcode);
+  /// the code generator.  Returns false if the code generator fails.
+  virtual void compileProgram(const std::string &Bitcode, std::string *Error);
 
   virtual int ExecuteProgram(const std::string &Bitcode,
                              const std::vector<std::string> &Args,
                              const std::string &InputFile,
                              const std::string &OutputFile,
+                             std::string *Error,
                              const std::vector<std::string> &GCCArgs =
                                std::vector<std::string>(),
                              const std::vector<std::string> &SharedLibs =
@@ -227,9 +220,12 @@
                              unsigned Timeout = 0,
                              unsigned MemoryLimit = 0);
 
+  /// OutputCode - Compile the specified program from bitcode to code
+  /// understood by the GCC driver (either C or asm).  If the code generator
+  /// fails, it sets Error, otherwise, this function returns the type of code
+  /// emitted.
   virtual GCC::FileType OutputCode(const std::string &Bitcode,
-                                   sys::Path &OutFile);
-  
+                                   sys::Path &OutFile, std::string &Error);
 };
 
 } // End llvm namespace

Modified: llvm/trunk/tools/bugpoint/bugpoint.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/bugpoint.cpp?rev=101013&r1=101012&r2=101013&view=diff
==============================================================================
--- llvm/trunk/tools/bugpoint/bugpoint.cpp (original)
+++ llvm/trunk/tools/bugpoint/bugpoint.cpp Mon Apr 12 00:08:25 2010
@@ -149,23 +149,11 @@
   // avoid filling up the disk, we prevent it
   sys::Process::PreventCoreFiles();
 
-  try {
-    return D.run();
-  } catch (ToolExecutionError &TEE) {
-    errs() << "Tool execution error: " << TEE.what() << '\n';
-  } catch (const std::string& msg) {
-    errs() << argv[0] << ": " << msg << "\n";
-  } catch (const std::bad_alloc&) {
-    errs() << "Oh no, a bugpoint process ran out of memory!\n"
-              "To increase the allocation limits for bugpoint child\n"
-              "processes, use the -mlimit option.\n";
-  } catch (const std::exception &e) {
-    errs() << "Whoops, a std::exception leaked out of bugpoint: "
-           << e.what() << "\n"
-           << "This is a bug in bugpoint!\n";
-  } catch (...) {
-    errs() << "Whoops, an exception leaked out of bugpoint.  "
-           << "This is a bug in bugpoint!\n";
+  std::string Error;
+  bool Failure = D.run(Error);
+  if (!Error.empty()) {
+    errs() << Error;
+    return 1;
   }
-  return 1;
+  return Failure;
 }




From evan.cheng at apple.com  Mon Apr 12 01:25:29 2010
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 12 Apr 2010 06:25:29 -0000
Subject: [llvm-commits] [llvm] r101023 - in /llvm/trunk:
 lib/CodeGen/LLVMTargetMachine.cpp test/CodeGen/X86/postra-licm.ll
Message-ID: <20100412062529.202D22A6C12C@llvm.org>

Author: evancheng
Date: Mon Apr 12 01:25:28 2010
New Revision: 101023

URL: http://llvm.org/viewvc/llvm-project?rev=101023&view=rev
Log:
Enable post regalloc machine licm by default.

Added:
    llvm/trunk/test/CodeGen/X86/postra-licm.ll
Modified:
    llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp

Modified: llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp?rev=101023&r1=101022&r2=101023&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp (original)
+++ llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp Mon Apr 12 01:25:28 2010
@@ -66,9 +66,6 @@
     cl::desc("Verify generated machine code"),
     cl::init(getenv("LLVM_VERIFY_MACHINEINSTRS")!=NULL));
 
-static cl::opt<bool> PostRAMachineLICM("postra-machine-licm", cl::Hidden,
-    cl::desc("Enable post-regalloc Machine LICM"));
-
 static cl::opt<cl::boolOrDefault>
 AsmVerbose("asm-verbose", cl::desc("Add comments to directives."),
            cl::init(cl::BOU_UNSET));
@@ -348,8 +345,7 @@
     printAndVerify(PM, "After StackSlotColoring");
 
     // Run post-ra machine LICM to hoist reloads / remats.
-    if (PostRAMachineLICM)
-      PM.add(createMachineLICMPass(false));
+    PM.add(createMachineLICMPass(false));
   }
 
   // Run post-ra passes.

Added: llvm/trunk/test/CodeGen/X86/postra-licm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/postra-licm.ll?rev=101023&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/postra-licm.ll (added)
+++ llvm/trunk/test/CodeGen/X86/postra-licm.ll Mon Apr 12 01:25:28 2010
@@ -0,0 +1,140 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=pic -disable-fp-elim | FileCheck %s
+
+; MachineLICM should be able to hoist loop invariant reload out of the loop.
+; rdar://7233099
+
+%struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+%struct.__sFILEX = type opaque
+%struct.__sbuf = type { i8*, i32 }
+%struct.epoch_t = type { %struct.trans_t*, %struct.trans_t*, i32, i32, i32, i32, i32 }
+%struct.trans_t = type { i32, i32, i32, i8* }
+
+ at .str12 = external constant [2 x i8], align 1     ; <[2 x i8]*> [#uses=1]
+ at .str19 = external constant [7 x i8], align 1     ; <[7 x i8]*> [#uses=1]
+ at .str24 = external constant [4 x i8], align 1     ; <[4 x i8]*> [#uses=1]
+
+define i32 @main(i32 %c, i8** nocapture %v) nounwind ssp {
+; CHECK: main:
+entry:
+  br i1 undef, label %bb, label %bb3
+
+bb:                                               ; preds = %entry
+  unreachable
+
+bb3:                                              ; preds = %entry
+  br i1 undef, label %bb.i, label %bb.nph41
+
+bb.i:                                             ; preds = %bb3
+  unreachable
+
+bb.nph41:                                         ; preds = %bb3
+  %0 = call %struct.FILE* @"\01_fopen$UNIX2003"(i8* undef, i8* getelementptr inbounds ([2 x i8]* @.str12, i32 0, i32 0)) nounwind ; <%struct.FILE*> [#uses=3]
+  br i1 undef, label %bb4, label %bb5.preheader
+
+bb5.preheader:                                    ; preds = %bb.nph41
+  br label %bb5
+
+bb4:                                              ; preds = %bb.nph41
+  unreachable
+
+bb5:                                              ; preds = %bb5, %bb5.preheader
+  br i1 undef, label %bb7, label %bb5
+
+bb7:                                              ; preds = %bb5
+  br i1 undef, label %bb9, label %bb12
+
+bb9:                                              ; preds = %bb7
+  unreachable
+
+bb12:                                             ; preds = %bb7
+  br i1 undef, label %bb16, label %bb22
+
+bb16:                                             ; preds = %bb12
+  unreachable
+
+bb22:                                             ; preds = %bb12
+  br label %bb.i1
+
+bb.i1:                                            ; preds = %bb.i1, %bb22
+  %1 = icmp eq i8 undef, 69                       ; <i1> [#uses=1]
+  br i1 %1, label %imix_test.exit, label %bb.i1
+
+imix_test.exit:                                   ; preds = %bb.i1
+  br i1 undef, label %bb23, label %bb26.preheader
+
+bb26.preheader:                                   ; preds = %imix_test.exit
+  br i1 undef, label %bb28, label %bb30
+
+bb23:                                             ; preds = %imix_test.exit
+  unreachable
+; CHECK: %bb26.preheader.bb28_crit_edge
+; CHECK: movl -16(%ebp),
+; CHECK-NEXT: .align 4
+; CHECK-NEXT: %bb28
+
+bb28:                                             ; preds = %bb28, %bb26.preheader
+  %counter.035 = phi i32 [ %3, %bb28 ], [ 0, %bb26.preheader ] ; <i32> [#uses=2]
+  %tmp56 = shl i32 %counter.035, 2                ; <i32> [#uses=0]
+  %2 = call i8* @fgets(i8* undef, i32 50, %struct.FILE* %0) nounwind ; <i8*> [#uses=0]
+  %3 = add nsw i32 %counter.035, 1                ; <i32> [#uses=1]
+  %4 = call i32 @feof(%struct.FILE* %0) nounwind  ; <i32> [#uses=0]
+  br label %bb28
+
+bb30:                                             ; preds = %bb26.preheader
+  %5 = call i32 @strcmp(i8* undef, i8* getelementptr inbounds ([7 x i8]* @.str19, i32 0, i32 0)) nounwind readonly ; <i32> [#uses=0]
+  br i1 undef, label %bb34, label %bb70
+
+bb32.loopexit:                                    ; preds = %bb45
+  %6 = icmp eq i32 undef, 0                       ; <i1> [#uses=1]
+  %indvar.next55 = add i32 %indvar54, 1           ; <i32> [#uses=1]
+  br i1 %6, label %bb34, label %bb70
+
+bb34:                                             ; preds = %bb32.loopexit, %bb30
+  %indvar54 = phi i32 [ %indvar.next55, %bb32.loopexit ], [ 0, %bb30 ] ; <i32> [#uses=3]
+  br i1 false, label %bb35, label %bb39.preheader
+
+bb35:                                             ; preds = %bb34
+  unreachable
+
+bb39.preheader:                                   ; preds = %bb34
+  %7 = getelementptr inbounds %struct.epoch_t* undef, i32 %indvar54, i32 3 ; <i32*> [#uses=1]
+  %8 = getelementptr inbounds %struct.epoch_t* undef, i32 %indvar54, i32 2 ; <i32*> [#uses=0]
+  br i1 false, label %bb42, label %bb45
+
+bb42:                                             ; preds = %bb39.preheader
+  unreachable
+
+bb45:                                             ; preds = %bb39.preheader
+  %9 = call i32 @strcmp(i8* undef, i8* getelementptr inbounds ([4 x i8]* @.str24, i32 0, i32 0)) nounwind readonly ; <i32> [#uses=0]
+  br i1 false, label %bb47, label %bb32.loopexit
+
+bb47:                                             ; preds = %bb45
+  %10 = load i32* %7, align 4                     ; <i32> [#uses=0]
+  unreachable
+
+bb70:                                             ; preds = %bb32.loopexit, %bb30
+  br i1 undef, label %bb78, label %bb76
+
+bb76:                                             ; preds = %bb70
+  unreachable
+
+bb78:                                             ; preds = %bb70
+  br i1 undef, label %bb83, label %bb79
+
+bb79:                                             ; preds = %bb78
+  unreachable
+
+bb83:                                             ; preds = %bb78
+  call void @rewind(%struct.FILE* %0) nounwind
+  unreachable
+}
+
+declare %struct.FILE* @"\01_fopen$UNIX2003"(i8*, i8*)
+
+declare i8* @fgets(i8*, i32, %struct.FILE* nocapture) nounwind
+
+declare void @rewind(%struct.FILE* nocapture) nounwind
+
+declare i32 @feof(%struct.FILE* nocapture) nounwind
+
+declare i32 @strcmp(i8* nocapture, i8* nocapture) nounwind readonly




From gohman at apple.com  Mon Apr 12 02:29:15 2010
From: gohman at apple.com (Dan Gohman)
Date: Mon, 12 Apr 2010 07:29:15 -0000
Subject: [llvm-commits] [llvm] r101027 -
	/llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp
Message-ID: <20100412072915.D8A0C2A6C12C@llvm.org>

Author: djg
Date: Mon Apr 12 02:29:15 2010
New Revision: 101027

URL: http://llvm.org/viewvc/llvm-project?rev=101027&view=rev
Log:
Use RecursivelyDeleteTriviallyDeadInstructions in EliminateIVComparisons,
instead of deleting just the user. This makes it more consistent with
other code in IndVarSimplify, and theoretically can eliminate more users
earlier.

Modified:
    llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp?rev=101027&r1=101026&r2=101027&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp Mon Apr 12 02:29:15 2010
@@ -338,9 +338,11 @@
 }
 
 void IndVarSimplify::EliminateIVComparisons() {
+  SmallVector<WeakVH, 16> DeadInsts;
+
   // Look for ICmp users.
-  for (IVUsers::iterator I = IU->begin(), E = IU->end(); I != E;) {
-    IVStrideUse &UI = *I++;
+  for (IVUsers::iterator I = IU->begin(), E = IU->end(); I != E; ++I) {
+    IVStrideUse &UI = *I;
     ICmpInst *ICmp = dyn_cast<ICmpInst>(UI.getUser());
     if (!ICmp) continue;
 
@@ -367,8 +369,15 @@
       continue;
 
     DEBUG(dbgs() << "INDVARS: Eliminated comparison: " << *ICmp << '\n');
-    ICmp->eraseFromParent();
+    DeadInsts.push_back(ICmp);
   }
+
+  // Now that we're done iterating through lists, clean up any instructions
+  // which are now dead.
+  while (!DeadInsts.empty())
+    if (Instruction *Inst =
+          dyn_cast_or_null<Instruction>(DeadInsts.pop_back_val()))
+      RecursivelyDeleteTriviallyDeadInstructions(Inst);
 }
 
 bool IndVarSimplify::runOnLoop(Loop *L, LPPassManager &LPM) {




From gohman at apple.com  Mon Apr 12 02:39:33 2010
From: gohman at apple.com (Dan Gohman)
Date: Mon, 12 Apr 2010 07:39:33 -0000
Subject: [llvm-commits] [llvm] r101028 -
	/llvm/trunk/lib/Analysis/ScalarEvolution.cpp
Message-ID: <20100412073933.C0D462A6C12D@llvm.org>

Author: djg
Date: Mon Apr 12 02:39:33 2010
New Revision: 101028

URL: http://llvm.org/viewvc/llvm-project?rev=101028&view=rev
Log:
Rewrite the overflow checking in the get{Signed,Unsigned}Range code for
AddRecs so that it checks for overflow in the computation that it is
performing, rather than just checking hasNo{Signed,Unsigned}Wrap, since
those flags are for a different computation. This fixes a bug that
impacts an upcoming change.

Modified:
    llvm/trunk/lib/Analysis/ScalarEvolution.cpp

Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=101028&r1=101027&r2=101028&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original)
+++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Mon Apr 12 02:39:33 2010
@@ -2933,14 +2933,26 @@
         MaxBECount = getNoopOrZeroExtend(MaxBECount, Ty);
 
         const SCEV *Start = AddRec->getStart();
-        const SCEV *End = AddRec->evaluateAtIteration(MaxBECount, *this);
+        const SCEV *Step = AddRec->getStepRecurrence(*this);
 
-        // Check for overflow.
-        if (!AddRec->hasNoUnsignedWrap())
+        ConstantRange StartRange = getUnsignedRange(Start);
+        ConstantRange StepRange = getSignedRange(Step);
+        ConstantRange MaxBECountRange = getUnsignedRange(MaxBECount);
+        ConstantRange EndRange =
+          StartRange.add(MaxBECountRange.multiply(StepRange));
+
+        // Check for overflow. This must be done with ConstantRange arithmetic
+        // because we could be called from within the ScalarEvolution overflow
+        // checking code.
+        ConstantRange ExtStartRange = StartRange.zextOrTrunc(BitWidth*2+1);
+        ConstantRange ExtStepRange = StepRange.sextOrTrunc(BitWidth*2+1);
+        ConstantRange ExtMaxBECountRange =
+          MaxBECountRange.zextOrTrunc(BitWidth*2+1);
+        ConstantRange ExtEndRange = EndRange.zextOrTrunc(BitWidth*2+1);
+        if (ExtStartRange.add(ExtMaxBECountRange.multiply(ExtStepRange)) !=
+            ExtEndRange)
           return ConservativeResult;
 
-        ConstantRange StartRange = getUnsignedRange(Start);
-        ConstantRange EndRange = getUnsignedRange(End);
         APInt Min = APIntOps::umin(StartRange.getUnsignedMin(),
                                    EndRange.getUnsignedMin());
         APInt Max = APIntOps::umax(StartRange.getUnsignedMax(),
@@ -3064,14 +3076,26 @@
         MaxBECount = getNoopOrZeroExtend(MaxBECount, Ty);
 
         const SCEV *Start = AddRec->getStart();
-        const SCEV *End = AddRec->evaluateAtIteration(MaxBECount, *this);
+        const SCEV *Step = AddRec->getStepRecurrence(*this);
 
-        // Check for overflow.
-        if (!AddRec->hasNoSignedWrap())
+        ConstantRange StartRange = getSignedRange(Start);
+        ConstantRange StepRange = getSignedRange(Step);
+        ConstantRange MaxBECountRange = getUnsignedRange(MaxBECount);
+        ConstantRange EndRange =
+          StartRange.add(MaxBECountRange.multiply(StepRange));
+
+        // Check for overflow. This must be done with ConstantRange arithmetic
+        // because we could be called from within the ScalarEvolution overflow
+        // checking code.
+        ConstantRange ExtStartRange = StartRange.sextOrTrunc(BitWidth*2+1);
+        ConstantRange ExtStepRange = StepRange.sextOrTrunc(BitWidth*2+1);
+        ConstantRange ExtMaxBECountRange =
+          MaxBECountRange.zextOrTrunc(BitWidth*2+1);
+        ConstantRange ExtEndRange = EndRange.sextOrTrunc(BitWidth*2+1);
+        if (ExtStartRange.add(ExtMaxBECountRange.multiply(ExtStepRange)) !=
+            ExtEndRange)
           return ConservativeResult;
 
-        ConstantRange StartRange = getSignedRange(Start);
-        ConstantRange EndRange = getSignedRange(End);
         APInt Min = APIntOps::smin(StartRange.getSignedMin(),
                                    EndRange.getSignedMin());
         APInt Max = APIntOps::smax(StartRange.getSignedMax(),




From gohman at apple.com  Mon Apr 12 02:49:36 2010
From: gohman at apple.com (Dan Gohman)
Date: Mon, 12 Apr 2010 07:49:36 -0000
Subject: [llvm-commits] [llvm] r101030 - in /llvm/trunk:
 lib/Analysis/ScalarEvolution.cpp
 test/Analysis/ScalarEvolution/unsimplified-loop.ll
Message-ID: <20100412074936.D6EDE2A6C12D@llvm.org>

Author: djg
Date: Mon Apr 12 02:49:36 2010
New Revision: 101030

URL: http://llvm.org/viewvc/llvm-project?rev=101030&view=rev
Log:
Generalize ScalarEvolution's PHI analysis to handle loops that don't
have preheaders or dedicated exit blocks, as clients may not otherwise
need to run LoopSimplify.

Added:
    llvm/trunk/test/Analysis/ScalarEvolution/unsimplified-loop.ll
Modified:
    llvm/trunk/lib/Analysis/ScalarEvolution.cpp

Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=101030&r1=101029&r2=101030&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original)
+++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Mon Apr 12 02:49:36 2010
@@ -2597,14 +2597,29 @@
 /// a loop header, making it a potential recurrence, or it doesn't.
 ///
 const SCEV *ScalarEvolution::createNodeForPHI(PHINode *PN) {
-  if (PN->getNumIncomingValues() == 2)  // The loops have been canonicalized.
-    if (const Loop *L = LI->getLoopFor(PN->getParent()))
-      if (L->getHeader() == PN->getParent()) {
-        // If it lives in the loop header, it has two incoming values, one
-        // from outside the loop, and one from inside.
-        unsigned IncomingEdge = L->contains(PN->getIncomingBlock(0));
-        unsigned BackEdge     = IncomingEdge^1;
-
+  if (const Loop *L = LI->getLoopFor(PN->getParent()))
+    if (L->getHeader() == PN->getParent()) {
+      // The loop may have multiple entrances or multiple exits; we can analyze
+      // this phi as an addrec if it has a unique entry value and a unique
+      // backedge value.
+      Value *BEValueV = 0, *StartValueV = 0;
+      for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i) {
+        Value *V = PN->getIncomingValue(i);
+        if (L->contains(PN->getIncomingBlock(i))) {
+          if (!BEValueV) {
+            BEValueV = V;
+          } else if (BEValueV != V) {
+            BEValueV = 0;
+            break;
+          }
+        } else if (!StartValueV) {
+          StartValueV = V;
+        } else if (StartValueV != V) {
+          StartValueV = 0;
+          break;
+        }
+      }
+      if (BEValueV && StartValueV) {
         // While we are analyzing this PHI node, handle its value symbolically.
         const SCEV *SymbolicName = getUnknown(PN);
         assert(Scalars.find(PN) == Scalars.end() &&
@@ -2613,7 +2628,6 @@
 
         // Using this symbolic name for the PHI, analyze the value coming around
         // the back-edge.
-        Value *BEValueV = PN->getIncomingValue(BackEdge);
         const SCEV *BEValue = getSCEV(BEValueV);
 
         // NOTE: If BEValue is loop invariant, we know that the PHI node just
@@ -2657,8 +2671,7 @@
                   HasNSW = true;
               }
 
-              const SCEV *StartVal =
-                getSCEV(PN->getIncomingValue(IncomingEdge));
+              const SCEV *StartVal = getSCEV(StartValueV);
               const SCEV *PHISCEV =
                 getAddRecExpr(StartVal, Accum, L, HasNUW, HasNSW);
 
@@ -2684,7 +2697,7 @@
           // Because the other in-value of i (0) fits the evolution of BEValue
           // i really is an addrec evolution.
           if (AddRec->getLoop() == L && AddRec->isAffine()) {
-            const SCEV *StartVal = getSCEV(PN->getIncomingValue(IncomingEdge));
+            const SCEV *StartVal = getSCEV(StartValueV);
 
             // If StartVal = j.start - j.stride, we can use StartVal as the
             // initial step of the addrec evolution.
@@ -2702,9 +2715,8 @@
             }
           }
         }
-
-        return SymbolicName;
       }
+    }
 
   // If the PHI has a single incoming value, follow that value, unless the
   // PHI's incoming blocks are in a different loop, in which case doing so

Added: llvm/trunk/test/Analysis/ScalarEvolution/unsimplified-loop.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/ScalarEvolution/unsimplified-loop.ll?rev=101030&view=auto
==============================================================================
--- llvm/trunk/test/Analysis/ScalarEvolution/unsimplified-loop.ll (added)
+++ llvm/trunk/test/Analysis/ScalarEvolution/unsimplified-loop.ll Mon Apr 12 02:49:36 2010
@@ -0,0 +1,29 @@
+; RUN: opt -analyze -scalar-evolution < %s | FileCheck %s
+
+; This loop has no preheader, multiple backedges, etc., but ScalarEvolution
+; should still be able to analyze it.
+
+; CHECK: %i = phi i64 [ 5, %entry ], [ 5, %alt ], [ %i.next, %loop.a ], [ %i.next, %loop.b ]
+; CHECK-NEXT: -->  {5,+,1}<%loop>
+
+define void @foo(i1 %p, i1 %q, i1 %s, i1 %u) {
+entry:
+  br i1 %p, label %loop, label %alt
+
+alt:
+  br i1 %s, label %loop, label %exit
+
+loop:
+  %i = phi i64 [ 5, %entry ], [ 5, %alt ], [ %i.next, %loop.a ], [ %i.next, %loop.b ]
+  %i.next = add i64 %i, 1
+  br i1 %q, label %loop.a, label %loop.b
+
+loop.a:
+  br label %loop
+
+loop.b:
+  br i1 %u, label %loop, label %exit
+
+exit:
+  ret void
+}




From gohman at apple.com  Mon Apr 12 02:56:56 2010
From: gohman at apple.com (Dan Gohman)
Date: Mon, 12 Apr 2010 07:56:56 -0000
Subject: [llvm-commits] [llvm] r101032 -
	/llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp
Message-ID: <20100412075656.45DFE2A6C12C@llvm.org>

Author: djg
Date: Mon Apr 12 02:56:56 2010
New Revision: 101032

URL: http://llvm.org/viewvc/llvm-project?rev=101032&view=rev
Log:
Move the EliminateIVUsers call back out to its original location. Now that
a ScalarEvolution bug with overflow handling is fixed, the normal analysis
code will automatically decline to operate on the icmp instructions which
are responsible for the loop exit.

Modified:
    llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp?rev=101032&r1=101031&r2=101032&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp Mon Apr 12 02:56:56 2010
@@ -406,6 +406,9 @@
   if (!isa<SCEVCouldNotCompute>(BackedgeTakenCount))
     RewriteLoopExitValues(L, Rewriter);
 
+  // Simplify ICmp IV users.
+  EliminateIVComparisons();
+
   // Compute the type of the largest recurrence expression, and decide whether
   // a canonical induction variable should be inserted.
   const Type *LargestType = 0;
@@ -471,19 +474,10 @@
       ExitingBlock) {
     assert(NeedCannIV &&
            "LinearFunctionTestReplace requires a canonical induction variable");
-
     // Can't rewrite non-branch yet.
-    if (BranchInst *BI = dyn_cast<BranchInst>(ExitingBlock->getTerminator())) {
-      // Eliminate comparisons which are always true or always false, due to
-      // the known backedge-taken count. This may include comparisons which
-      // are currently controlling (part of) the loop exit, so we can only do
-      // it when we know we're going to insert our own loop exit code.
-      EliminateIVComparisons();
-
-      // Insert new loop exit code.
+    if (BranchInst *BI = dyn_cast<BranchInst>(ExitingBlock->getTerminator()))
       NewICmp = LinearFunctionTestReplace(L, BackedgeTakenCount, IndVar,
                                           ExitingBlock, BI, Rewriter);
-    }
   }
 
   // Rewrite IV-derived expressions. Clears the rewriter cache.




From gohman at apple.com  Mon Apr 12 03:00:22 2010
From: gohman at apple.com (Dan Gohman)
Date: Mon, 12 Apr 2010 08:00:22 -0000
Subject: [llvm-commits] [llvm] r101033 -
	/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp
Message-ID: <20100412080022.2BE9D2A6C12C@llvm.org>

Author: djg
Date: Mon Apr 12 03:00:22 2010
New Revision: 101033

URL: http://llvm.org/viewvc/llvm-project?rev=101033&view=rev
Log:
Delete this code, which is no longer needed.

Modified:
    llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp?rev=101033&r1=101032&r2=101033&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Mon Apr 12 03:00:22 2010
@@ -2907,10 +2907,6 @@
         BB = DT.findNearestCommonDominator(BB, ExitingBlocks[i]);
       Inputs.push_back(BB->getTerminator());
     }
-
-    // Be dominated by the loop latch, if it's unique.
-    if (BasicBlock *Latch = PIL->getLoopLatch())
-      Inputs.push_back(prior(BasicBlock::iterator(Latch->getTerminator())));
   }
 
   // Then, climb up the immediate dominator tree as far as we can go while




From ggreif at gmail.com  Mon Apr 12 04:30:39 2010
From: ggreif at gmail.com (Gabor Greif)
Date: Mon, 12 Apr 2010 02:30:39 -0700 (PDT)
Subject: [llvm-commits] script for updating LLVM + Clang from anywhere
	in the tree
In-Reply-To: <y2h89adf3281004091301sb6e6d26dke0b31105911ceb45@mail.gmail.com>
References: <y2h89adf3281004091301sb6e6d26dke0b31105911ceb45@mail.gmail.com>
Message-ID: <4ed0c645-7baf-440e-b723-a2f98e391ab8@j21g2000yqh.googlegroups.com>

On Apr 9, 10:01?pm, Zhanyong Wan (?x.x x) <w... at google.com> wrote:
> Hi,
>
> I have a script for updating both LLVM and Clang source trees to a
> given revision, from anywhere in either of the trees.
>
> USAGE:
> ? ? upllvm.py ? ? ? ? # Updates to HEAD.
> ? ? upllvm.py 12345 ? # Updates to r12345.
> ? ? upllvm.py r12345 ?# The same as the previous command.

As I have already pointed out in IRC, this is already part of the
regular (non-cmake) makefiles.

make update SVN-UPDATE-OPTIONS=-r12345

simply typing "make update" will bring the tree to HEAD.
This should work for everywhere in the tree and also in the
build directory. It will also find the subdirectories like
"clang" and "llvm-test" and update them.

Unfortunately cmake-generated makefiles lack this functionality
and although I am not a cmake expert I guess adding the two-or-so
lines to the makefiles should be easy enough ("passthrough" ?
"include" ?)

Cheers,

    Gabor

>
> Could someone review the patch? ?Thanks,
> --
> Zhanyong
>
> ?upllvm.patch
> 2KViewDownload
>
> _______________________________________________
> llvm-commits mailing list
> llvm-comm... at cs.uiuc.eduhttp://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From benny.kra at googlemail.com  Mon Apr 12 06:38:35 2010
From: benny.kra at googlemail.com (Benjamin Kramer)
Date: Mon, 12 Apr 2010 11:38:35 -0000
Subject: [llvm-commits] [llvm] r101034 -
	/llvm/trunk/lib/CodeGen/MachineLICM.cpp
Message-ID: <20100412113835.9C9C12A6C12C@llvm.org>

Author: d0k
Date: Mon Apr 12 06:38:35 2010
New Revision: 101034

URL: http://llvm.org/viewvc/llvm-project?rev=101034&view=rev
Log:
Plug trivial leak.

Modified:
    llvm/trunk/lib/CodeGen/MachineLICM.cpp

Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=101034&r1=101033&r2=101034&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Mon Apr 12 06:38:35 2010
@@ -391,6 +391,8 @@
     if (PhysRegDefs[Candidates[i].Def] == 1)
       HoistPostRA(Candidates[i].MI, Candidates[i].Def);
   }
+
+  delete[] PhysRegDefs;
 }
 
 /// AddToLiveIns - Add register 'Reg' to the livein sets of BBs in the




From benny.kra at googlemail.com  Mon Apr 12 07:22:19 2010
From: benny.kra at googlemail.com (Benjamin Kramer)
Date: Mon, 12 Apr 2010 12:22:19 -0000
Subject: [llvm-commits] [llvm] r101035 -
	/llvm/trunk/tools/bugpoint/Miscompilation.cpp
Message-ID: <20100412122219.A9FC72A6C12C@llvm.org>

Author: d0k
Date: Mon Apr 12 07:22:19 2010
New Revision: 101035

URL: http://llvm.org/viewvc/llvm-project?rev=101035&view=rev
Log:
Boolify.

Modified:
    llvm/trunk/tools/bugpoint/Miscompilation.cpp

Modified: llvm/trunk/tools/bugpoint/Miscompilation.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/Miscompilation.cpp?rev=101035&r1=101034&r2=101035&view=diff
==============================================================================
--- llvm/trunk/tools/bugpoint/Miscompilation.cpp (original)
+++ llvm/trunk/tools/bugpoint/Miscompilation.cpp Mon Apr 12 07:22:19 2010
@@ -909,7 +909,7 @@
   }
   std::string SharedObject = BD.compileSharedObject(SafeModuleBC.str(), Error);
   if (!Error.empty())
-    return -1;
+    return false;
   delete Safe;
 
   // Run the code generator on the `Test' code, loading the shared library.




From grosser at fim.uni-passau.de  Mon Apr 12 10:02:19 2010
From: grosser at fim.uni-passau.de (Tobias Grosser)
Date: Mon, 12 Apr 2010 15:02:19 -0000
Subject: [llvm-commits] [llvm] r101036 -
	/llvm/trunk/lib/Analysis/DomPrinter.cpp
Message-ID: <20100412150219.C66362A6C12C@llvm.org>

Author: grosser
Date: Mon Apr 12 10:02:19 2010
New Revision: 101036

URL: http://llvm.org/viewvc/llvm-project?rev=101036&view=rev
Log:
Remove dead code in the dotty dominance tree printer.

This template is not needed anymore as it was replaced by the
DOTGraphTraitsViewer.

Modified:
    llvm/trunk/lib/Analysis/DomPrinter.cpp

Modified: llvm/trunk/lib/Analysis/DomPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/DomPrinter.cpp?rev=101036&r1=101035&r2=101036&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/DomPrinter.cpp (original)
+++ llvm/trunk/lib/Analysis/DomPrinter.cpp Mon Apr 12 10:02:19 2010
@@ -83,31 +83,6 @@
 }
 
 namespace {
-template <class Analysis, bool OnlyBBS>
-struct GenericGraphViewer : public FunctionPass {
-  std::string Name;
-
-  GenericGraphViewer(std::string GraphName, const void *ID) : FunctionPass(ID) {
-    Name = GraphName;
-  }
-
-  virtual bool runOnFunction(Function &F) {
-    Analysis *Graph;
-    std::string Title, GraphName;
-    Graph = &getAnalysis<Analysis>();
-    GraphName = DOTGraphTraits<Analysis*>::getGraphName(Graph);
-    Title = GraphName + " for '" + F.getNameStr() + "' function";
-    ViewGraph(Graph, Name, OnlyBBS, Title);
-
-    return false;
-  }
-
-  virtual void getAnalysisUsage(AnalysisUsage &AU) const {
-    AU.setPreservesAll();
-    AU.addRequired<Analysis>();
-  }
-};
-
 struct DomViewer
   : public DOTGraphTraitsViewer<DominatorTree, false> {
   static char ID;




From grosser at fim.uni-passau.de  Mon Apr 12 10:32:55 2010
From: grosser at fim.uni-passau.de (Tobias Grosser)
Date: Mon, 12 Apr 2010 15:32:55 -0000
Subject: [llvm-commits] [llvm] r101038 -
	/llvm/trunk/lib/Analysis/PostDominators.cpp
Message-ID: <20100412153255.C401A2A6C12C@llvm.org>

Author: grosser
Date: Mon Apr 12 10:32:55 2010
New Revision: 101038

URL: http://llvm.org/viewvc/llvm-project?rev=101038&view=rev
Log:
Remove unneeded debug in PostDominator runOnFunction()

The information is already available with "opt -analyze". The DominatorTree
does also not have this in its runOnFunction. So they behave now
more consistent.

Modified:
    llvm/trunk/lib/Analysis/PostDominators.cpp

Modified: llvm/trunk/lib/Analysis/PostDominators.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/PostDominators.cpp?rev=101038&r1=101037&r2=101038&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/PostDominators.cpp (original)
+++ llvm/trunk/lib/Analysis/PostDominators.cpp Mon Apr 12 10:32:55 2010
@@ -33,7 +33,6 @@
 
 bool PostDominatorTree::runOnFunction(Function &F) {
   DT->recalculate(F);
-  DEBUG(DT->print(dbgs()));
   return false;
 }
 




From baldrick at free.fr  Mon Apr 12 10:34:06 2010
From: baldrick at free.fr (Duncan Sands)
Date: Mon, 12 Apr 2010 15:34:06 -0000
Subject: [llvm-commits] [dragonegg] r101039 -
	/dragonegg/trunk/llvm-convert.cpp
Message-ID: <20100412153406.F3B962A6C12C@llvm.org>

Author: baldrick
Date: Mon Apr 12 10:34:06 2010
New Revision: 101039

URL: http://llvm.org/viewvc/llvm-project?rev=101039&view=rev
Log:
Note about the ARM EABI.

Modified:
    dragonegg/trunk/llvm-convert.cpp

Modified: dragonegg/trunk/llvm-convert.cpp
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/llvm-convert.cpp?rev=101039&r1=101038&r2=101039&view=diff
==============================================================================
--- dragonegg/trunk/llvm-convert.cpp (original)
+++ dragonegg/trunk/llvm-convert.cpp Mon Apr 12 10:34:06 2010
@@ -2128,6 +2128,7 @@
   Value *ExcPtr = Builder.CreateLoad(RewindTmp);
 
   // Generate an explicit call to _Unwind_Resume_or_Rethrow.
+  // FIXME: On ARM this should be a call to __cxa_end_cleanup with no arguments.
   std::vector<const Type*> Params(1, Type::getInt8PtrTy(Context));
   FunctionType *FTy = FunctionType::get(Type::getVoidTy(Context), Params,
                                         false);




From gohman at apple.com  Mon Apr 12 11:26:03 2010
From: gohman at apple.com (Dan Gohman)
Date: Mon, 12 Apr 2010 16:26:03 -0000
Subject: [llvm-commits] [llvm] r101043 -
	/llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp
Message-ID: <20100412162603.A5C3F2A6C12C@llvm.org>

Author: djg
Date: Mon Apr 12 11:26:03 2010
New Revision: 101043

URL: http://llvm.org/viewvc/llvm-project?rev=101043&view=rev
Log:
Remove a #include.

Modified:
    llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp

Modified: llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp?rev=101043&r1=101042&r2=101043&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp (original)
+++ llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp Mon Apr 12 11:26:03 2010
@@ -46,7 +46,6 @@
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/ADT/BitVector.h"
 #include "llvm/ADT/Statistic.h"
-#include <map>
 #include <set>
 using namespace llvm;
 




From edwintorok at gmail.com  Mon Apr 12 11:58:53 2010
From: edwintorok at gmail.com (Torok Edwin)
Date: Mon, 12 Apr 2010 16:58:53 -0000
Subject: [llvm-commits] [test-suite] r101045 -
 /test-suite/trunk/MultiSource/Applications/sqlite3/sqlite3.c
Message-ID: <20100412165854.0EC292A6C12C@llvm.org>

Author: edwin
Date: Mon Apr 12 11:58:53 2010
New Revision: 101045

URL: http://llvm.org/viewvc/llvm-project?rev=101045&view=rev
Log:
Fix use of undefined value causing JIT test to fail (PR6660).

Modified:
    test-suite/trunk/MultiSource/Applications/sqlite3/sqlite3.c

Modified: test-suite/trunk/MultiSource/Applications/sqlite3/sqlite3.c
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/MultiSource/Applications/sqlite3/sqlite3.c?rev=101045&r1=101044&r2=101045&view=diff
==============================================================================
--- test-suite/trunk/MultiSource/Applications/sqlite3/sqlite3.c (original)
+++ test-suite/trunk/MultiSource/Applications/sqlite3/sqlite3.c Mon Apr 12 11:58:53 2010
@@ -72903,7 +72903,7 @@
         break;
       case 104: /* cmd ::= select */
 {
-  SelectDest dest = {SRT_Callback, 0, 0};
+  SelectDest dest = {SRT_Callback, 0, 0, 0};
   sqlite3Select(pParse, yymsp[0].minor.yy219, &dest, 0, 0, 0, 0);
   sqlite3SelectDelete(yymsp[0].minor.yy219);
 }




From edwintorok at gmail.com  Mon Apr 12 12:10:20 2010
From: edwintorok at gmail.com (Torok Edwin)
Date: Mon, 12 Apr 2010 17:10:20 -0000
Subject: [llvm-commits] [test-suite] r101049 -
 /test-suite/trunk/MultiSource/Applications/sqlite3/sqlite3.c
Message-ID: <20100412171020.54F4C2A6C12C@llvm.org>

Author: edwin
Date: Mon Apr 12 12:10:20 2010
New Revision: 101049

URL: http://llvm.org/viewvc/llvm-project?rev=101049&view=rev
Log:
Not a sqlite bug, compiler bug.

Modified:
    test-suite/trunk/MultiSource/Applications/sqlite3/sqlite3.c

Modified: test-suite/trunk/MultiSource/Applications/sqlite3/sqlite3.c
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/MultiSource/Applications/sqlite3/sqlite3.c?rev=101049&r1=101048&r2=101049&view=diff
==============================================================================
--- test-suite/trunk/MultiSource/Applications/sqlite3/sqlite3.c (original)
+++ test-suite/trunk/MultiSource/Applications/sqlite3/sqlite3.c Mon Apr 12 12:10:20 2010
@@ -72903,7 +72903,7 @@
         break;
       case 104: /* cmd ::= select */
 {
-  SelectDest dest = {SRT_Callback, 0, 0, 0};
+  SelectDest dest = {SRT_Callback, 0, 0};
   sqlite3Select(pParse, yymsp[0].minor.yy219, &dest, 0, 0, 0, 0);
   sqlite3SelectDelete(yymsp[0].minor.yy219);
 }




From grosser at fim.uni-passau.de  Mon Apr 12 13:39:30 2010
From: grosser at fim.uni-passau.de (Tobias Grosser)
Date: Mon, 12 Apr 2010 20:39:30 +0200
Subject: [llvm-commits] [PATCH] Missing libraries in cmake build?
Message-ID: <4BC368E2.3040400@fim.uni-passau.de>

Hi,

I get this error using cmake and BUILD_SHARED_LIBS=1 on a build using 
LLVM trunk + one additional pass added by me.

Linking CXX executable ../../bin/llvm-extract
../../lib/libLLVMipo.so: undefined reference to `llvm::createIPSCCPPass()'
collect2: ld returned 1 exit status
gmake[2]: *** [bin/llvm-extract] Error 1
gmake[1]: *** [tools/llvm-extract/CMakeFiles/llvm-extract.dir/all] Error 2
gmake: *** [all] Error 2

For me it seems there are some libraries missing in the CMakeLists.txt
files. The problem does not appear neither with a clean trunk nor with 
LLVM + my patches build using the autotools infrastructure.

However the patch solves the build issues on my side and they seem to be 
consistent as IPO really uses a function defined in ScalarOpt.

Therefore I believe this is correct and propose this patch for LLVM trunk.

OK to commit?

Thanks

Tobi
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From johnny.chen at apple.com  Mon Apr 12 13:46:54 2010
From: johnny.chen at apple.com (Johnny Chen)
Date: Mon, 12 Apr 2010 18:46:54 -0000
Subject: [llvm-commits] [llvm] r101053 - in /llvm/trunk:
 lib/Target/ARM/ARMAddressingModes.h
 lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
 test/MC/Disassembler/arm-tests.txt
Message-ID: <20100412184654.1702E2A6C12C@llvm.org>

Author: johnny
Date: Mon Apr 12 13:46:53 2010
New Revision: 101053

URL: http://llvm.org/viewvc/llvm-project?rev=101053&view=rev
Log:
Fixed a crasher in arm disassembler within ARMInstPrinter.cpp after calling
ARM_AM::getSoImmVal(V) with a legitimate so_imm value: #245 rotate right by 2.
Introduce ARM_AM::getSOImmValOneOrNoRotate(unsigned Arg) which is called from
ARMInstPrinter.cpp's printSOImm() function, replacing ARM_AM::getSOImmVal(V).

[12:44:43] johnny:/Volumes/data/llvm/git/trunk (local-trunk) $ gdb Debug/bin/llvm-mc
GNU gdb 6.3.50-20050815 (Apple version gdb-1346) (Fri Sep 18 20:40:51 UTC 2009)
Copyright 2004 Free Software Foundation, Inc.
GDB is free software, covered by the GNU General Public License, and you are
welcome to change it and/or distribute copies of it under certain conditions.
Type "show copying" to see the conditions.
There is absolutely no warranty for GDB.  Type "show warranty" for details.
This GDB was configured as "x86_64-apple-darwin"...Reading symbols for shared libraries ... done

(gdb) set args  -triple=arm-apple-darwin9 -debug-only=arm-disassembler --disassemble
(gdb) r
Starting program: /Volumes/data/llvm/git/trunk/Debug/bin/llvm-mc -triple=arm-apple-darwin9 -debug-only=arm-disassembler --disassemble
Reading symbols for shared libraries ++. done
0xf5 0x71 0xf0 0x53
Opcode=201 Name=MVNi Format=ARM_FORMAT_DPFRM(4)
 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
-------------------------------------------------------------------------------------------------
| 0: 1: 0: 1| 0: 0: 1: 1| 1: 1: 1: 1| 0: 0: 0: 0| 0: 1: 1: 1| 0: 0: 0: 1| 1: 1: 1: 1| 0: 1: 0: 1|
-------------------------------------------------------------------------------------------------

	mvnpls	r7, Assertion failed: (V != -1 && "Not a valid so_imm value!"), function printSOImm, file ARMInstPrinter.cpp, line 229.

Program received signal SIGABRT, Aborted.
0x00007fff88c65886 in __kill ()
(gdb) bt
#0  0x00007fff88c65886 in __kill ()
#1  0x00007fff88d05eae in abort ()
#2  0x00007fff88cf2ef0 in __assert_rtn ()
#3  0x000000010020e422 in printSOImm (O=@0x1010bdf80, V=-1, VerboseAsm=false, MAI=0x1020106d0) at ARMInstPrinter.cpp:229
#4  0x000000010020e5fe in llvm::ARMInstPrinter::printSOImmOperand (this=0x1020107e0, MI=0x7fff5fbfee70, OpNum=1, O=@0x1010bdf80) at ARMInstPrinter.cpp:254
#5  0x00000001001ffbc0 in llvm::ARMInstPrinter::printInstruction (this=0x1020107e0, MI=0x7fff5fbfee70, O=@0x1010bdf80) at ARMGenAsmWriter.inc:3236
#6  0x000000010020c27c in llvm::ARMInstPrinter::printInst (this=0x1020107e0, MI=0x7fff5fbfee70, O=@0x1010bdf80) at ARMInstPrinter.cpp:182
#7  0x000000010003cbff in PrintInsts (DisAsm=@0x10200f4e0, Printer=@0x1020107e0, Bytes=@0x7fff5fbff060, SM=@0x7fff5fbff078) at Disassembler.cpp:65
#8  0x000000010003c8b4 in llvm::Disassembler::disassemble (T=@0x1010c13c0, Triple=@0x1010b6798, Buffer=@0x102010690) at Disassembler.cpp:153
#9  0x000000010004095c in DisassembleInput (ProgName=0x7fff5fbff3f0 "/Volumes/data/llvm/git/trunk/Debug/bin/llvm-mc") at llvm-mc.cpp:347
#10 0x000000010003eefb in main (argc=4, argv=0x7fff5fbff298) at llvm-mc.cpp:374
(gdb) q
The program is running.  Exit anyway? (y or n) y
[13:36:26] johnny:/Volumes/data/llvm/git/trunk (local-trunk) $ 

Modified:
    llvm/trunk/lib/Target/ARM/ARMAddressingModes.h
    llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
    llvm/trunk/test/MC/Disassembler/arm-tests.txt

Modified: llvm/trunk/lib/Target/ARM/ARMAddressingModes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAddressingModes.h?rev=101053&r1=101052&r2=101053&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMAddressingModes.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMAddressingModes.h Mon Apr 12 13:46:53 2010
@@ -193,6 +193,43 @@
     return rotl32(Arg, RotAmt) | ((RotAmt>>1) << 8);
   }
 
+  /// getSOImmValOneRotate - Try to handle Imm with an immediate shifter
+  /// operand, computing the rotate amount to use.  If this immediate value
+  /// cannot be handled with a single shifter-op, return 0.
+  static unsigned getSOImmValOneRotate(unsigned Imm) {
+    // A5.2.4 Constants with multiple encodings
+    // The lowest unsigned value of rotation wins!
+    for (unsigned R = 1; R <= 15; ++R)
+      if ((Imm & rotr32(~255U, 2*R)) == 0)
+        return 2*R;
+
+    // Failed to find a suitable rotate amount.
+    return 0;
+  }
+
+  /// getSOImmValOneOrNoRotate - Given a 32-bit immediate, if it is something
+  /// that can fit into a shifter_operand immediate operand, return the 12-bit
+  /// encoding for it.  If not, return -1.  This is different from getSOImmVal()
+  /// in that getSOImmVal() is used during codegen, for example,
+  /// rewriteARMFrameIndex() where return value of -1 is not considered fatal.
+  ///
+  /// The current consumer of this API is printSOImm() within ARMInstPrinter.cpp
+  /// where return value of -1 indicates that the Arg is not a valid so_imm val!
+  static inline int getSOImmValOneOrNoRotate(unsigned Arg) {
+    // 8-bit (or less) immediates are trivially shifter_operands with a rotate
+    // of zero.
+    if ((Arg & ~255U) == 0) return Arg;
+
+    unsigned RotAmt = getSOImmValOneRotate(Arg);
+
+    // If this cannot be handled with a single shifter_op, bail out.
+    if (rotr32(~255U, RotAmt) & Arg)
+      return -1;
+
+    // Encode this correctly.
+    return rotl32(Arg, RotAmt) | ((RotAmt>>1) << 8);
+  }
+
   /// isSOImmTwoPartVal - Return true if the specified value can be obtained by
   /// or'ing together two SOImmVal's.
   static inline bool isSOImmTwoPartVal(unsigned V) {

Modified: llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp?rev=101053&r1=101052&r2=101053&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp Mon Apr 12 13:46:53 2010
@@ -225,7 +225,7 @@
 static void printSOImm(raw_ostream &O, int64_t V, bool VerboseAsm,
                        const MCAsmInfo *MAI) {
   // Break it up into two parts that make up a shifter immediate.
-  V = ARM_AM::getSOImmVal(V);
+  V = ARM_AM::getSOImmValOneOrNoRotate(V);
   assert(V != -1 && "Not a valid so_imm value!");
   
   unsigned Imm = ARM_AM::getSOImmValImm(V);

Modified: llvm/trunk/test/MC/Disassembler/arm-tests.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/arm-tests.txt?rev=101053&r1=101052&r2=101053&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/arm-tests.txt (original)
+++ llvm/trunk/test/MC/Disassembler/arm-tests.txt Mon Apr 12 13:46:53 2010
@@ -27,6 +27,9 @@
 # CHECK:	movt	r8, #65535
 0xff 0x8f 0x4f 0xe3
 
+# CHECK:	mvnpls	r7, #245, 2
+0xf5 0x71 0xf0 0x53
+
 # CHECK:	pkhbt	r8, r9, r10, lsl #4
 0x1a 0x82 0x89 0xe6
 




From baldrick at free.fr  Mon Apr 12 14:12:21 2010
From: baldrick at free.fr (Duncan Sands)
Date: Mon, 12 Apr 2010 19:12:21 -0000
Subject: [llvm-commits] [dragonegg] r101055 - /dragonegg/trunk/Makefile
Message-ID: <20100412191221.C58FF2A6C12C@llvm.org>

Author: baldrick
Date: Mon Apr 12 14:12:21 2010
New Revision: 101055

URL: http://llvm.org/viewvc/llvm-project?rev=101055&view=rev
Log:
Use less obscure automatic make variables.

Modified:
    dragonegg/trunk/Makefile

Modified: dragonegg/trunk/Makefile
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/Makefile?rev=101055&r1=101054&r2=101055&view=diff
==============================================================================
--- dragonegg/trunk/Makefile (original)
+++ dragonegg/trunk/Makefile Mon Apr 12 14:12:21 2010
@@ -55,19 +55,19 @@
 default: $(PLUGIN)
 
 $(TARGET_UTIL_OBJECTS): %.o : $(SRC_DIR)/utils/%.cpp
-	@echo Compiling utils/$(<F)
+	@echo Compiling utils/$*.cpp
 	$(QUIET)$(CXX) -c $(PREPROCESSOR) $(CXXFLAGS) $<
 
 $(TARGET_UTIL): $(TARGET_UTIL_OBJECTS)
-	@echo Linking $(@F)
+	@echo Linking $@
 	$(QUIET)$(CXX) -o $@ $^ $(LINKER)
 
 %.o : $(SRC_DIR)/%.c $(TARGET_UTIL)
-	@echo Compiling $(<F)
+	@echo Compiling $*.c
 	$(QUIET)$(CC) -c $(PREPROCESSOR) $(TARGET_HEADERS) $(CFLAGS) $<
 
 %.o : $(SRC_DIR)/%.cpp $(TARGET_UTIL)
-	@echo Compiling $(<F)
+	@echo Compiling $*.cpp
 	$(QUIET)$(CXX) -c $(PREPROCESSOR) $(TARGET_HEADERS) $(CXXFLAGS) $<
 
 $(TARGET_OBJECT): $(TARGET_UTIL)
@@ -76,7 +76,7 @@
 		$(TARGET_SOURCE)
 
 $(PLUGIN): $(PLUGIN_OBJECTS) $(TARGET_OBJECT) $(TARGET_UTIL)
-	@echo Linking $(@F)
+	@echo Linking $@
 	$(QUIET)$(CXX) -shared $(PLUGIN_OBJECTS) $(TARGET_OBJECT) -o $@ \
 	$(LINKER) $(shell $(LLVM_CONFIG) --libs $(shell $(TARGET_UTIL) -p))
 




From baldrick at free.fr  Mon Apr 12 14:20:11 2010
From: baldrick at free.fr (Duncan Sands)
Date: Mon, 12 Apr 2010 19:20:11 -0000
Subject: [llvm-commits] [dragonegg] r101056 - /dragonegg/trunk/Makefile
Message-ID: <20100412192011.D519F2A6C12C@llvm.org>

Author: baldrick
Date: Mon Apr 12 14:20:11 2010
New Revision: 101056

URL: http://llvm.org/viewvc/llvm-project?rev=101056&view=rev
Log:
Make sure that -fpic etc are passed at the same time as -shared, as
recommended by the gcc docs.

Modified:
    dragonegg/trunk/Makefile

Modified: dragonegg/trunk/Makefile
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/Makefile?rev=101056&r1=101055&r2=101056&view=diff
==============================================================================
--- dragonegg/trunk/Makefile (original)
+++ dragonegg/trunk/Makefile Mon Apr 12 14:20:11 2010
@@ -77,8 +77,8 @@
 
 $(PLUGIN): $(PLUGIN_OBJECTS) $(TARGET_OBJECT) $(TARGET_UTIL)
 	@echo Linking $@
-	$(QUIET)$(CXX) -shared $(PLUGIN_OBJECTS) $(TARGET_OBJECT) -o $@ \
-	$(LINKER) $(shell $(LLVM_CONFIG) --libs $(shell $(TARGET_UTIL) -p))
+	$(QUIET)$(CXX) -shared $(CXXFLAGS) $(PLUGIN_OBJECTS) $(TARGET_OBJECT) \
+	-o $@ $(LINKER) $(shell $(LLVM_CONFIG) --libs $(shell $(TARGET_UTIL) -p))
 
 clean::
 	$(QUIET)rm -f *.o *.d $(PLUGIN) $(TARGET_UTIL)




From baldrick at free.fr  Mon Apr 12 14:36:00 2010
From: baldrick at free.fr (Duncan Sands)
Date: Mon, 12 Apr 2010 19:36:00 -0000
Subject: [llvm-commits] [dragonegg] r101057 - /dragonegg/trunk/Makefile
Message-ID: <20100412193600.13D162A6C12C@llvm.org>

Author: baldrick
Date: Mon Apr 12 14:35:59 2010
New Revision: 101057

URL: http://llvm.org/viewvc/llvm-project?rev=101057&view=rev
Log:
On Darwin, dynamic libraries are not the same as loadable modules,
so use the appropriate options to get a loadable module there.

Modified:
    dragonegg/trunk/Makefile

Modified: dragonegg/trunk/Makefile
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/Makefile?rev=101057&r1=101056&r2=101057&view=diff
==============================================================================
--- dragonegg/trunk/Makefile (original)
+++ dragonegg/trunk/Makefile Mon Apr 12 14:35:59 2010
@@ -20,6 +20,12 @@
 CFLAGS+=-Wall $(shell $(LLVM_CONFIG) --cflags)
 CXXFLAGS+=-Wall $(shell $(LLVM_CONFIG) --cxxflags)
 
+ifeq ($(shell uname),Darwin)
+LOADABLE_MODULE_OPTIONS=-bundle -undefined dynamic_lookup
+else
+LOADABLE_MODULE_OPTIONS=-shared
+endif
+
 GCC_PLUGIN_DIR=$(shell $(GCC) -print-file-name=plugin)
 TARGET_TRIPLE:=$(shell $(GCC) -v 2>&1 | grep "^Target:" | sed -e "s/^Target: *//")
 
@@ -77,8 +83,9 @@
 
 $(PLUGIN): $(PLUGIN_OBJECTS) $(TARGET_OBJECT) $(TARGET_UTIL)
 	@echo Linking $@
-	$(QUIET)$(CXX) -shared $(CXXFLAGS) $(PLUGIN_OBJECTS) $(TARGET_OBJECT) \
-	-o $@ $(LINKER) $(shell $(LLVM_CONFIG) --libs $(shell $(TARGET_UTIL) -p))
+	$(QUIET)$(CXX) $(LOADABLE_MODULE_OPTIONS) $(CXXFLAGS) -o $@ $(LINKER) \
+	$(PLUGIN_OBJECTS) $(TARGET_OBJECT) -o $@ $(LINKER) \
+	$(shell $(LLVM_CONFIG) --libs $(shell $(TARGET_UTIL) -p))
 
 clean::
 	$(QUIET)rm -f *.o *.d $(PLUGIN) $(TARGET_UTIL)




From scallanan at apple.com  Mon Apr 12 14:43:00 2010
From: scallanan at apple.com (Sean Callanan)
Date: Mon, 12 Apr 2010 19:43:00 -0000
Subject: [llvm-commits] [llvm] r101058 - in /llvm/trunk/tools: Makefile
 llvm-mc/Disassembler.cpp llvm-mc/Disassembler.h llvm-mc/Makefile
 llvm-mc/llvm-mc.cpp
Message-ID: <20100412194300.47CA32A6C12C@llvm.org>

Author: spyffe
Date: Mon Apr 12 14:43:00 2010
New Revision: 101058

URL: http://llvm.org/viewvc/llvm-project?rev=101058&view=rev
Log:
Second try at integrating the edis tester.  This
time I use the LIBS variable, which is not subject
to a %.a -> -l% transformation, to link llvm-mc
against libEnhancedDisassembly.

llvm-mc -edis works the same as llvm-mc
-disassemble, but outputs tokens and operands.

Modified:
    llvm/trunk/tools/Makefile
    llvm/trunk/tools/llvm-mc/Disassembler.cpp
    llvm/trunk/tools/llvm-mc/Disassembler.h
    llvm/trunk/tools/llvm-mc/Makefile
    llvm/trunk/tools/llvm-mc/llvm-mc.cpp

Modified: llvm/trunk/tools/Makefile
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/Makefile?rev=101058&r1=101057&r2=101058&view=diff
==============================================================================
--- llvm/trunk/tools/Makefile (original)
+++ llvm/trunk/tools/Makefile Mon Apr 12 14:43:00 2010
@@ -36,6 +36,8 @@
 ifeq ($(ENABLE_PIC),1)
   # No support for dynamic libraries on windows targets.
   ifneq ($(TARGET_OS), $(filter $(TARGET_OS), Cygwin MingW))
+    # libEnhancedDisassembly must be built ahead of llvm-mc
+    # because llvm-mc links against libEnhancedDisassembly
     DIRS += edis
 
     # gold only builds if binutils is around.  It requires "lto" to build before

Modified: llvm/trunk/tools/llvm-mc/Disassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/Disassembler.cpp?rev=101058&r1=101057&r2=101058&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-mc/Disassembler.cpp (original)
+++ llvm/trunk/tools/llvm-mc/Disassembler.cpp Mon Apr 12 14:43:00 2010
@@ -15,6 +15,7 @@
 #include "Disassembler.h"
 
 #include "llvm/ADT/OwningPtr.h"
+#include "llvm/ADT/Triple.h"
 #include "llvm/MC/MCAsmInfo.h"
 #include "llvm/MC/MCDisassembler.h"
 #include "llvm/MC/MCInst.h"
@@ -24,6 +25,9 @@
 #include "llvm/Support/MemoryObject.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/Support/SourceMgr.h"
+
+#include "llvm-c/EnhancedDisassembly.h"
+
 using namespace llvm;
 
 typedef std::vector<std::pair<unsigned char, const char*> > ByteArrayTy;
@@ -64,8 +68,7 @@
                                /*REMOVE*/ nulls())) {
       Printer.printInst(&Inst, outs());
       outs() << "\n";
-    }
-    else {
+    } else {
       SM.PrintMessage(SMLoc::getFromPointer(Bytes[Index].second),
                       "invalid instruction encoding", "warning");
       if (Size == 0)
@@ -76,37 +79,9 @@
   return false;
 }
 
-int Disassembler::disassemble(const Target &T, const std::string &Triple,
-                              MemoryBuffer &Buffer) {
-  // Set up disassembler.
-  OwningPtr<const MCAsmInfo> AsmInfo(T.createAsmInfo(Triple));
-  
-  if (!AsmInfo) {
-    errs() << "error: no assembly info for target " << Triple << "\n";
-    return -1;
-  }
-  
-  OwningPtr<const MCDisassembler> DisAsm(T.createMCDisassembler());
-  if (!DisAsm) {
-    errs() << "error: no disassembler for target " << Triple << "\n";
-    return -1;
-  }
-  
-  OwningPtr<MCInstPrinter> IP(T.createMCInstPrinter(0, *AsmInfo));
-  if (!IP) {
-    errs() << "error: no instruction printer for target " << Triple << '\n';
-    return -1;
-  }
-  
-  bool ErrorOccurred = false;
-  
-  SourceMgr SM;
-  SM.AddNewSourceBuffer(&Buffer, SMLoc());
-  
-  // Convert the input to a vector for disassembly.
-  ByteArrayTy ByteArray;
-  
-  StringRef Str = Buffer.getBuffer();
+static bool ByteArrayFromString(ByteArrayTy &ByteArray, 
+                                StringRef &Str, 
+                                SourceMgr &SM) {
   while (!Str.empty()) {
     // Strip horizontal whitespace.
     if (size_t Pos = Str.find_first_not_of(" \t\r")) {
@@ -119,9 +94,9 @@
     if (Str[0] == '\n' || Str[0] == '#') {
       // Strip to the end of line if we already processed any bytes on this
       // line.  This strips the comment and/or the \n.
-      if (Str[0] == '\n')
+      if (Str[0] == '\n') {
         Str = Str.substr(1);
-      else {
+      } else {
         Str = Str.substr(Str.find_first_of('\n'));
         if (!Str.empty())
           Str = Str.substr(1);
@@ -138,8 +113,7 @@
     if (Value.getAsInteger(0, ByteVal) || ByteVal > 255) {
       // If we have an error, print it and skip to the end of line.
       SM.PrintMessage(SMLoc::getFromPointer(Value.data()),
-                                 "invalid input token", "error");
-      ErrorOccurred = true;
+                      "invalid input token", "error");
       Str = Str.substr(Str.find('\n'));
       ByteArray.clear();
       continue;
@@ -149,8 +123,229 @@
     Str = Str.substr(Next);
   }
   
+  return false;
+}
+
+int Disassembler::disassemble(const Target &T, const std::string &Triple,
+                              MemoryBuffer &Buffer) {
+  // Set up disassembler.
+  OwningPtr<const MCAsmInfo> AsmInfo(T.createAsmInfo(Triple));
+  
+  if (!AsmInfo) {
+    errs() << "error: no assembly info for target " << Triple << "\n";
+    return -1;
+  }
+  
+  OwningPtr<const MCDisassembler> DisAsm(T.createMCDisassembler());
+  if (!DisAsm) {
+    errs() << "error: no disassembler for target " << Triple << "\n";
+    return -1;
+  }
+  
+  OwningPtr<MCInstPrinter> IP(T.createMCInstPrinter(0, *AsmInfo));
+  if (!IP) {
+    errs() << "error: no instruction printer for target " << Triple << '\n';
+    return -1;
+  }
+  
+  bool ErrorOccurred = false;
+  
+  SourceMgr SM;
+  SM.AddNewSourceBuffer(&Buffer, SMLoc());
+  
+  // Convert the input to a vector for disassembly.
+  ByteArrayTy ByteArray;
+  StringRef Str = Buffer.getBuffer();
+  
+  ErrorOccurred |= ByteArrayFromString(ByteArray, Str, SM);
+  
   if (!ByteArray.empty())
     ErrorOccurred |= PrintInsts(*DisAsm, *IP, ByteArray, SM);
     
   return ErrorOccurred;
 }
+
+static int byteArrayReader(uint8_t *B, uint64_t A, void *Arg) {
+  ByteArrayTy &ByteArray = *((ByteArrayTy*)Arg);
+  
+  if (A >= ByteArray.size())
+    return -1;
+  
+  *B = ByteArray[A].first;
+  
+  return 0;
+}
+
+static int verboseEvaluator(uint64_t *V, unsigned R, void *Arg) {
+  EDDisassemblerRef &disassembler = *((EDDisassemblerRef*)Arg);
+  
+  const char *regName;
+  
+  if (!EDGetRegisterName(&regName,
+                        disassembler,
+                        R))
+    outs() << "[" << regName << "/" << R << "]";
+  if (EDRegisterIsStackPointer(disassembler, R))
+    outs() << "(sp)";
+  if (EDRegisterIsProgramCounter(disassembler, R))
+    outs() << "(pc)";
+  
+  *V = 0;
+  
+  return 0;
+}
+
+int Disassembler::disassembleEnhanced(const std::string &TS, 
+                                      MemoryBuffer &Buffer) {
+  ByteArrayTy ByteArray;
+  StringRef Str = Buffer.getBuffer();
+  SourceMgr SM;
+  
+  SM.AddNewSourceBuffer(&Buffer, SMLoc());
+  
+  if (ByteArrayFromString(ByteArray, Str, SM)) {
+    return -1;
+  }
+  
+  EDDisassemblerRef disassembler;
+  
+  Triple T(TS);
+  EDAssemblySyntax_t AS;
+  
+  switch (T.getArch()) {
+  default:
+    errs() << "error: no default assembly syntax for " << TS.c_str() << "\n";
+    return -1;
+  case Triple::arm:
+  case Triple::thumb:
+    AS = kEDAssemblySyntaxARMUAL;
+    break;
+  case Triple::x86:
+  case Triple::x86_64:
+    AS = kEDAssemblySyntaxX86ATT;
+    break;
+  }
+  
+  if (EDGetDisassembler(&disassembler, 
+                        TS.c_str(),
+                        AS)) {
+    errs() << "error: couldn't get disassembler for " << TS.c_str() << "\n";
+    return -1;
+  }
+  
+  EDInstRef inst;
+  
+  if (EDCreateInsts(&inst, 1, disassembler, byteArrayReader, 0,&ByteArray) 
+      != 1) {
+    errs() << "error: Didn't get an instruction\n";
+    return -1;
+  }
+  
+  int numTokens = EDNumTokens(inst);
+  
+  if (numTokens < 0) {
+    errs() << "error: Couldn't count the instruction's tokens\n";
+    return -1;
+  }
+  
+  int tokenIndex;
+  
+  for (tokenIndex = 0; tokenIndex < numTokens; ++tokenIndex) {
+    EDTokenRef token;
+    
+    if (EDGetToken(&token, inst, tokenIndex)) {
+      errs() << "error: Couldn't get token\n";
+      return -1;
+    }
+    
+    const char *buf;
+    
+    if (EDGetTokenString(&buf, token)) {
+      errs() << "error: Couldn't get string for token\n";
+      return -1;
+    }
+    
+    outs() << "[";
+    
+    int operandIndex = EDOperandIndexForToken(token);
+    
+    if (operandIndex >= 0)
+      outs() << operandIndex << "-";
+    
+    if (EDTokenIsWhitespace(token)) {
+      outs() << "w";
+    } else if (EDTokenIsPunctuation(token)) {
+      outs() << "p";
+    } else if (EDTokenIsOpcode(token)) {
+      outs() << "o";
+    } else if (EDTokenIsLiteral(token)) {
+      outs() << "l";
+    } else if (EDTokenIsRegister(token)) {
+      outs() << "r";
+    } else {
+      outs() << "?";
+    }
+    
+    outs() << ":" << buf;
+  
+    if (EDTokenIsLiteral(token)) {
+      outs() << "=";
+      if (EDTokenIsNegativeLiteral(token))
+        outs() << "-";
+      uint64_t absoluteValue;
+      if (EDLiteralTokenAbsoluteValue(&absoluteValue, token)) {
+        errs() << "error: Couldn't get the value of a literal token\n";
+        return -1;
+      }
+      outs() << absoluteValue;
+    } else if (EDTokenIsRegister(token)) {
+      outs() << "=";
+      unsigned regID;
+      if (EDRegisterTokenValue(&regID, token)) {
+        errs() << "error: Couldn't get the ID of a register token\n";
+        return -1;
+      }
+      outs() << "r" << regID;
+    }
+    
+    outs() << "]";
+  }
+  
+  outs() << " ";
+  
+  int numOperands = EDNumOperands(inst);
+  
+  if (numOperands < 0) {
+    errs() << "error: Couldn't count operands\n";
+    return -1;
+  }
+  
+  int operandIndex;
+  
+  for (operandIndex = 0; operandIndex < numOperands; ++operandIndex) {
+    outs() << operandIndex << ":";
+    
+    EDOperandRef operand;
+    
+    if (EDGetOperand(&operand,
+                     inst,
+                     operandIndex)) {
+      errs() << "error: Couldn't get operand\n";
+      return -1;
+    }
+    
+    uint64_t evaluatedResult;
+    
+    EDEvaluateOperand(&evaluatedResult, 
+                      operand, 
+                      verboseEvaluator, 
+                      &disassembler);
+    
+    outs() << " ";
+  }
+  
+  outs() << "\n";
+  
+  return 0;
+}
+

Modified: llvm/trunk/tools/llvm-mc/Disassembler.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/Disassembler.h?rev=101058&r1=101057&r2=101058&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-mc/Disassembler.h (original)
+++ llvm/trunk/tools/llvm-mc/Disassembler.h Mon Apr 12 14:43:00 2010
@@ -27,6 +27,9 @@
   static int disassemble(const Target &target, 
                          const std::string &tripleString,
                          MemoryBuffer &buffer);
+  
+  static int disassembleEnhanced(const std::string &tripleString,
+                                 MemoryBuffer &buffer);
 };
   
 } // namespace llvm

Modified: llvm/trunk/tools/llvm-mc/Makefile
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/Makefile?rev=101058&r1=101057&r2=101058&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-mc/Makefile (original)
+++ llvm/trunk/tools/llvm-mc/Makefile Mon Apr 12 14:43:00 2010
@@ -22,3 +22,6 @@
 LINK_COMPONENTS := $(TARGETS_TO_BUILD) MCParser MC support
 
 include $(LLVM_SRC_ROOT)/Makefile.rules
+
+# Using LIBS instead of USEDLIBS to force static linking
+LIBS += $(LLVMLibDir)/libEnhancedDisassembly.a

Modified: llvm/trunk/tools/llvm-mc/llvm-mc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/llvm-mc.cpp?rev=101058&r1=101057&r2=101058&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-mc/llvm-mc.cpp (original)
+++ llvm/trunk/tools/llvm-mc/llvm-mc.cpp Mon Apr 12 14:43:00 2010
@@ -97,7 +97,8 @@
 enum ActionType {
   AC_AsLex,
   AC_Assemble,
-  AC_Disassemble
+  AC_Disassemble,
+  AC_EDisassemble
 };
 
 static cl::opt<ActionType>
@@ -109,6 +110,8 @@
                              "Assemble a .s file (default)"),
                   clEnumValN(AC_Disassemble, "disassemble",
                              "Disassemble strings of hex bytes"),
+                  clEnumValN(AC_EDisassemble, "edis",
+                             "Enhanced disassembly of strings of hex bytes"),
                   clEnumValEnd));
 
 static const Target *GetTarget(const char *ProgName) {
@@ -325,7 +328,7 @@
   return Res;
 }
 
-static int DisassembleInput(const char *ProgName) {
+static int DisassembleInput(const char *ProgName, bool Enhanced) {
   const Target *TheTarget = GetTarget(ProgName);
   if (!TheTarget)
     return 0;
@@ -344,7 +347,10 @@
     return 1;
   }
   
-  return Disassembler::disassemble(*TheTarget, TripleName, *Buffer);
+  if (Enhanced)
+    return Disassembler::disassembleEnhanced(TripleName, *Buffer);
+  else
+    return Disassembler::disassemble(*TheTarget, TripleName, *Buffer);
 }
 
 
@@ -371,7 +377,9 @@
   case AC_Assemble:
     return AssembleInput(argv[0]);
   case AC_Disassemble:
-    return DisassembleInput(argv[0]);
+    return DisassembleInput(argv[0], false);
+  case AC_EDisassemble:
+    return DisassembleInput(argv[0], true);
   }
   
   return 0;




From baldrick at free.fr  Mon Apr 12 15:06:53 2010
From: baldrick at free.fr (Duncan Sands)
Date: Mon, 12 Apr 2010 20:06:53 -0000
Subject: [llvm-commits] [dragonegg] r101061 - /dragonegg/trunk/Makefile
Message-ID: <20100412200653.E30CA2A6C12C@llvm.org>

Author: baldrick
Date: Mon Apr 12 15:06:53 2010
New Revision: 101061

URL: http://llvm.org/viewvc/llvm-project?rev=101061&view=rev
Log:
Rename some variables, and removing the doubled-up use of
-o $@ $(LINKER) in the final link line, which I must have
introduced by accident in one of the preceding commits.

Modified:
    dragonegg/trunk/Makefile

Modified: dragonegg/trunk/Makefile
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/Makefile?rev=101061&r1=101060&r2=101061&view=diff
==============================================================================
--- dragonegg/trunk/Makefile (original)
+++ dragonegg/trunk/Makefile Mon Apr 12 15:06:53 2010
@@ -44,14 +44,14 @@
 
 ALL_OBJECTS=$(PLUGIN_OBJECTS) $(TARGET_OBJECT) $(TARGET_UTIL_OBJECTS)
 
-PREPROCESSOR+=$(CPPFLAGS) $(shell $(LLVM_CONFIG) --cppflags) \
-	      -MD -MP \
-	      -DIN_GCC -DREVISION=\"$(REVISION)\" \
-	      -DTARGET_NAME=\"$(TARGET_TRIPLE)\" \
-	      -I$(SRC_DIR) -I$(GCC_PLUGIN_DIR)/include
+CPP_OPTIONS+=$(CPPFLAGS) $(shell $(LLVM_CONFIG) --cppflags) \
+	     -MD -MP \
+	     -DIN_GCC -DREVISION=\"$(REVISION)\" \
+	     -DTARGET_NAME=\"$(TARGET_TRIPLE)\" \
+	     -I$(SRC_DIR) -I$(GCC_PLUGIN_DIR)/include
 
-LINKER+=$(LDFLAGS) $(shell $(LLVM_CONFIG) --ldflags) \
-	$(shell $(LLVM_CONFIG) --libs analysis core ipo scalaropts target)
+LD_OPTIONS+=$(LDFLAGS) $(shell $(LLVM_CONFIG) --ldflags) \
+	    $(shell $(LLVM_CONFIG) --libs analysis core ipo scalaropts target)
 
 # NOTE: The following flags can only be used after TARGET_UTIL has been built.
 TARGET_HEADERS+=-I$(SRC_DIR)/$(shell $(TARGET_UTIL) -p) \
@@ -62,29 +62,29 @@
 
 $(TARGET_UTIL_OBJECTS): %.o : $(SRC_DIR)/utils/%.cpp
 	@echo Compiling utils/$*.cpp
-	$(QUIET)$(CXX) -c $(PREPROCESSOR) $(CXXFLAGS) $<
+	$(QUIET)$(CXX) -c $(CPP_OPTIONS) $(CXXFLAGS) $<
 
 $(TARGET_UTIL): $(TARGET_UTIL_OBJECTS)
 	@echo Linking $@
-	$(QUIET)$(CXX) -o $@ $^ $(LINKER)
+	$(QUIET)$(CXX) -o $@ $^ $(LD_OPTIONS)
 
 %.o : $(SRC_DIR)/%.c $(TARGET_UTIL)
 	@echo Compiling $*.c
-	$(QUIET)$(CC) -c $(PREPROCESSOR) $(TARGET_HEADERS) $(CFLAGS) $<
+	$(QUIET)$(CC) -c $(CPP_OPTIONS) $(TARGET_HEADERS) $(CFLAGS) $<
 
 %.o : $(SRC_DIR)/%.cpp $(TARGET_UTIL)
 	@echo Compiling $*.cpp
-	$(QUIET)$(CXX) -c $(PREPROCESSOR) $(TARGET_HEADERS) $(CXXFLAGS) $<
+	$(QUIET)$(CXX) -c $(CPP_OPTIONS) $(TARGET_HEADERS) $(CXXFLAGS) $<
 
 $(TARGET_OBJECT): $(TARGET_UTIL)
 	@echo Compiling $(shell $(TARGET_UTIL) -p)/llvm-target.cpp
-	$(QUIET)$(CXX) -o $@ -c $(PREPROCESSOR) $(TARGET_HEADERS) $(CXXFLAGS) \
+	$(QUIET)$(CXX) -o $@ -c $(CPP_OPTIONS) $(TARGET_HEADERS) $(CXXFLAGS) \
 		$(TARGET_SOURCE)
 
 $(PLUGIN): $(PLUGIN_OBJECTS) $(TARGET_OBJECT) $(TARGET_UTIL)
 	@echo Linking $@
-	$(QUIET)$(CXX) $(LOADABLE_MODULE_OPTIONS) $(CXXFLAGS) -o $@ $(LINKER) \
-	$(PLUGIN_OBJECTS) $(TARGET_OBJECT) -o $@ $(LINKER) \
+	$(QUIET)$(CXX) $(LOADABLE_MODULE_OPTIONS) $(LD_OPTIONS) \
+	$(CXXFLAGS) -o $@ $(PLUGIN_OBJECTS) $(TARGET_OBJECT) \
 	$(shell $(LLVM_CONFIG) --libs $(shell $(TARGET_UTIL) -p))
 
 clean::




From scallanan at apple.com  Mon Apr 12 15:21:56 2010
From: scallanan at apple.com (Sean Callanan)
Date: Mon, 12 Apr 2010 20:21:56 -0000
Subject: [llvm-commits] [llvm] r101062 -
	/llvm/trunk/include/llvm-c/EnhancedDisassembly.h
Message-ID: <20100412202156.DE1112A6C12C@llvm.org>

Author: spyffe
Date: Mon Apr 12 15:21:56 2010
New Revision: 101062

URL: http://llvm.org/viewvc/llvm-project?rev=101062&view=rev
Log:
Bug fix: included System/Types.h instead of
inttypes.h to allow building on Windows.

Modified:
    llvm/trunk/include/llvm-c/EnhancedDisassembly.h

Modified: llvm/trunk/include/llvm-c/EnhancedDisassembly.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm-c/EnhancedDisassembly.h?rev=101062&r1=101061&r2=101062&view=diff
==============================================================================
--- llvm/trunk/include/llvm-c/EnhancedDisassembly.h (original)
+++ llvm/trunk/include/llvm-c/EnhancedDisassembly.h Mon Apr 12 15:21:56 2010
@@ -19,7 +19,7 @@
 #ifndef LLVM_C_ENHANCEDDISASSEMBLY_H
 #define LLVM_C_ENHANCEDDISASSEMBLY_H
 
-#include <inttypes.h>
+#include "llvm/System/DataTypes.h"
 
 #ifdef __cplusplus
 extern "C" {




From scallanan at apple.com  Mon Apr 12 15:23:08 2010
From: scallanan at apple.com (Sean Callanan)
Date: Mon, 12 Apr 2010 20:23:08 -0000
Subject: [llvm-commits] [llvm] r101063 - /llvm/trunk/tools/edis/Makefile
Message-ID: <20100412202308.DB5F82A6C12C@llvm.org>

Author: spyffe
Date: Mon Apr 12 15:23:08 2010
New Revision: 101063

URL: http://llvm.org/viewvc/llvm-project?rev=101063&view=rev
Log:
Bug fix: made the enhanced disassembler's link
flags work properly when EDIS_VERSION is defined

Modified:
    llvm/trunk/tools/edis/Makefile

Modified: llvm/trunk/tools/edis/Makefile
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/edis/Makefile?rev=101063&r1=101062&r2=101063&view=diff
==============================================================================
--- llvm/trunk/tools/edis/Makefile (original)
+++ llvm/trunk/tools/edis/Makefile Mon Apr 12 15:23:08 2010
@@ -32,7 +32,7 @@
                          -Wl,-dead_strip
 
     ifdef EDIS_VERSION
-        LLVMLibsOptions    := -Wl,-current_version -Wl,$(EDIS_VERSION) \
+        LLVMLibsOptions    := $(LLVMLibsOptions) -Wl,-current_version -Wl,$(EDIS_VERSION) \
                               -Wl,-compatibility_version -Wl,1
     endif
 




From clattner at apple.com  Mon Apr 12 15:44:42 2010
From: clattner at apple.com (Chris Lattner)
Date: Mon, 12 Apr 2010 13:44:42 -0700
Subject: [llvm-commits] [PATCH] Missing libraries in cmake build?
In-Reply-To: <4BC368E2.3040400@fim.uni-passau.de>
References: <4BC368E2.3040400@fim.uni-passau.de>
Message-ID: <CE253174-14BA-407B-AB39-17947E61D557@apple.com>

On Apr 12, 2010, at 11:39 AM, Tobias Grosser wrote:

> Hi,
> 
> I get this error using cmake and BUILD_SHARED_LIBS=1 on a build using LLVM trunk + one additional pass added by me.

Hi Tobias,

IPO depending on scalaropts seems fine, but I don't think scalaropts should depend on instcombine.

-Chris

> 
> Linking CXX executable ../../bin/llvm-extract
> ../../lib/libLLVMipo.so: undefined reference to `llvm::createIPSCCPPass()'
> collect2: ld returned 1 exit status
> gmake[2]: *** [bin/llvm-extract] Error 1
> gmake[1]: *** [tools/llvm-extract/CMakeFiles/llvm-extract.dir/all] Error 2
> gmake: *** [all] Error 2
> 
> For me it seems there are some libraries missing in the CMakeLists.txt
> files. The problem does not appear neither with a clean trunk nor with LLVM + my patches build using the autotools infrastructure.
> 
> However the patch solves the build issues on my side and they seem to be consistent as IPO really uses a function defined in ScalarOpt.
> 
> Therefore I believe this is correct and propose this patch for LLVM trunk.
> 
> OK to commit?
> 
> Thanks
> 
> Tobi
> <llvm_Add-missing-libraries-to-cmake.patch>_______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits




From gohman at apple.com  Mon Apr 12 16:13:43 2010
From: gohman at apple.com (Dan Gohman)
Date: Mon, 12 Apr 2010 21:13:43 -0000
Subject: [llvm-commits] [llvm] r101068 - in /llvm/trunk:
 lib/Transforms/Scalar/IndVarSimplify.cpp
 test/Transforms/IndVarSimplify/udiv.ll
Message-ID: <20100412211343.EEE852A6C12C@llvm.org>

Author: djg
Date: Mon Apr 12 16:13:43 2010
New Revision: 101068

URL: http://llvm.org/viewvc/llvm-project?rev=101068&view=rev
Log:
Suppress LinearFunctionTestReplace when the computed backedge-taken
expression is a UDiv and it doesn't appear that the UDiv came from
the user's source.

ScalarEvolution has recently figured out how to compute a tripcount
expression for the inner loop in
SingleSource/Benchmarks/Shootout/sieve.c, using a udiv. Emitting a
udiv instruction dramatically slows down the enclosing loop.

Added:
    llvm/trunk/test/Transforms/IndVarSimplify/udiv.ll
Modified:
    llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp?rev=101068&r1=101067&r2=101068&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp Mon Apr 12 16:13:43 2010
@@ -134,6 +134,24 @@
                                    BasicBlock *ExitingBlock,
                                    BranchInst *BI,
                                    SCEVExpander &Rewriter) {
+  // Special case: If the backedge-taken count is a UDiv, it's very likely a
+  // UDiv that ScalarEvolution produced in order to compute a precise
+  // expression, rather than a UDiv from the user's code. If we can't find a
+  // UDiv in the code with some simple searching, assume the former and forego
+  // rewriting the loop.
+  if (isa<SCEVUDivExpr>(BackedgeTakenCount)) {
+    ICmpInst *OrigCond = dyn_cast<ICmpInst>(BI->getCondition());
+    if (!OrigCond) return 0;
+    const SCEV *R = SE->getSCEV(OrigCond->getOperand(1));
+    R = SE->getMinusSCEV(R, SE->getIntegerSCEV(1, R->getType()));
+    if (R != BackedgeTakenCount) {
+      const SCEV *L = SE->getSCEV(OrigCond->getOperand(0));
+      L = SE->getMinusSCEV(L, SE->getIntegerSCEV(1, L->getType()));
+      if (L != BackedgeTakenCount)
+        return 0;
+    }
+  }
+
   // If the exiting block is not the same as the backedge block, we must compare
   // against the preincremented value, otherwise we prefer to compare against
   // the post-incremented value.

Added: llvm/trunk/test/Transforms/IndVarSimplify/udiv.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IndVarSimplify/udiv.ll?rev=101068&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/IndVarSimplify/udiv.ll (added)
+++ llvm/trunk/test/Transforms/IndVarSimplify/udiv.ll Mon Apr 12 16:13:43 2010
@@ -0,0 +1,162 @@
+; RUN: opt -indvars -S < %s | FileCheck %s
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
+
+ at main.flags = internal global [8193 x i8] zeroinitializer, align 1 ; <[8193 x i8]*> [#uses=5]
+ at .str = private constant [11 x i8] c"Count: %d\0A\00" ; <[11 x i8]*> [#uses=1]
+
+; Indvars shouldn't emit a udiv here, because there's no udiv in the
+; original code. This comes from SingleSource/Benchmarks/Shootout/sieve.c.
+
+; CHECK: @main
+; CHECK-NOT: div
+
+define i32 @main(i32 %argc, i8** nocapture %argv) nounwind {
+entry:
+  %cmp = icmp eq i32 %argc, 2                     ; <i1> [#uses=1]
+  br i1 %cmp, label %cond.true, label %while.cond.preheader
+
+cond.true:                                        ; preds = %entry
+  %arrayidx = getelementptr inbounds i8** %argv, i64 1 ; <i8**> [#uses=1]
+  %tmp2 = load i8** %arrayidx                     ; <i8*> [#uses=1]
+  %call = tail call i32 @atoi(i8* %tmp2) nounwind readonly ; <i32> [#uses=1]
+  br label %while.cond.preheader
+
+while.cond.preheader:                             ; preds = %entry, %cond.true
+  %NUM.0.ph = phi i32 [ %call, %cond.true ], [ 170000, %entry ] ; <i32> [#uses=2]
+  %tobool18 = icmp eq i32 %NUM.0.ph, 0            ; <i1> [#uses=1]
+  br i1 %tobool18, label %while.end, label %bb.nph30
+
+while.cond.loopexit:                              ; preds = %for.cond12.while.cond.loopexit_crit_edge, %for.cond12.loopexit
+  %count.2.lcssa = phi i32 [ %count.1.lcssa, %for.cond12.while.cond.loopexit_crit_edge ], [ 0, %for.cond12.loopexit ] ; <i32> [#uses=1]
+  br label %while.cond
+
+while.cond:                                       ; preds = %while.cond.loopexit
+  %tobool = icmp eq i32 %dec19, 0                 ; <i1> [#uses=1]
+  br i1 %tobool, label %while.cond.while.end_crit_edge, label %for.cond.preheader
+
+while.cond.while.end_crit_edge:                   ; preds = %while.cond
+  %count.2.lcssa.lcssa = phi i32 [ %count.2.lcssa, %while.cond ] ; <i32> [#uses=1]
+  br label %while.end
+
+bb.nph30:                                         ; preds = %while.cond.preheader
+  br label %for.cond.preheader
+
+for.cond.preheader:                               ; preds = %bb.nph30, %while.cond
+  %dec19.in = phi i32 [ %NUM.0.ph, %bb.nph30 ], [ %dec19, %while.cond ] ; <i32> [#uses=1]
+  %dec19 = add i32 %dec19.in, -1                  ; <i32> [#uses=2]
+  br i1 true, label %bb.nph, label %for.cond12.loopexit
+
+for.cond:                                         ; preds = %for.body
+  %cmp8 = icmp slt i64 %inc, 8193                 ; <i1> [#uses=1]
+  br i1 %cmp8, label %for.body, label %for.cond.for.cond12.loopexit_crit_edge
+
+for.cond.for.cond12.loopexit_crit_edge:           ; preds = %for.cond
+  br label %for.cond12.loopexit
+
+bb.nph:                                           ; preds = %for.cond.preheader
+  br label %for.body
+
+for.body:                                         ; preds = %bb.nph, %for.cond
+  %i.02 = phi i64 [ 2, %bb.nph ], [ %inc, %for.cond ] ; <i64> [#uses=2]
+  %arrayidx10 = getelementptr inbounds [8193 x i8]* @main.flags, i64 0, i64 %i.02 ; <i8*> [#uses=1]
+  store i8 1, i8* %arrayidx10
+  %inc = add nsw i64 %i.02, 1                     ; <i64> [#uses=2]
+  br label %for.cond
+
+for.cond12.loopexit:                              ; preds = %for.cond.for.cond12.loopexit_crit_edge, %for.cond.preheader
+  br i1 true, label %bb.nph16, label %while.cond.loopexit
+
+for.cond12:                                       ; preds = %for.inc35
+  %cmp14 = icmp slt i64 %inc37, 8193              ; <i1> [#uses=1]
+  br i1 %cmp14, label %for.body15, label %for.cond12.while.cond.loopexit_crit_edge
+
+for.cond12.while.cond.loopexit_crit_edge:         ; preds = %for.cond12
+  %count.1.lcssa = phi i32 [ %count.1, %for.cond12 ] ; <i32> [#uses=1]
+  br label %while.cond.loopexit
+
+bb.nph16:                                         ; preds = %for.cond12.loopexit
+  br label %for.body15
+
+for.body15:                                       ; preds = %bb.nph16, %for.cond12
+  %count.212 = phi i32 [ 0, %bb.nph16 ], [ %count.1, %for.cond12 ] ; <i32> [#uses=2]
+  %i.17 = phi i64 [ 2, %bb.nph16 ], [ %inc37, %for.cond12 ] ; <i64> [#uses=4]
+  %arrayidx17 = getelementptr inbounds [8193 x i8]* @main.flags, i64 0, i64 %i.17 ; <i8*> [#uses=1]
+  %tmp18 = load i8* %arrayidx17                   ; <i8> [#uses=1]
+  %tobool19 = icmp eq i8 %tmp18, 0                ; <i1> [#uses=1]
+  br i1 %tobool19, label %for.inc35, label %if.then
+
+if.then:                                          ; preds = %for.body15
+  %add = shl i64 %i.17, 1                         ; <i64> [#uses=2]
+  %cmp243 = icmp slt i64 %add, 8193               ; <i1> [#uses=1]
+  br i1 %cmp243, label %bb.nph5, label %for.end32
+
+for.cond22:                                       ; preds = %for.body25
+  %cmp24 = icmp slt i64 %add31, 8193              ; <i1> [#uses=1]
+  br i1 %cmp24, label %for.body25, label %for.cond22.for.end32_crit_edge
+
+for.cond22.for.end32_crit_edge:                   ; preds = %for.cond22
+  br label %for.end32
+
+bb.nph5:                                          ; preds = %if.then
+  br label %for.body25
+
+for.body25:                                       ; preds = %bb.nph5, %for.cond22
+  %k.04 = phi i64 [ %add, %bb.nph5 ], [ %add31, %for.cond22 ] ; <i64> [#uses=2]
+  %arrayidx27 = getelementptr inbounds [8193 x i8]* @main.flags, i64 0, i64 %k.04 ; <i8*> [#uses=1]
+  store i8 0, i8* %arrayidx27
+  %add31 = add nsw i64 %k.04, %i.17               ; <i64> [#uses=2]
+  br label %for.cond22
+
+for.end32:                                        ; preds = %for.cond22.for.end32_crit_edge, %if.then
+  %inc34 = add nsw i32 %count.212, 1              ; <i32> [#uses=1]
+  br label %for.inc35
+
+for.inc35:                                        ; preds = %for.body15, %for.end32
+  %count.1 = phi i32 [ %inc34, %for.end32 ], [ %count.212, %for.body15 ] ; <i32> [#uses=2]
+  %inc37 = add nsw i64 %i.17, 1                   ; <i64> [#uses=2]
+  br label %for.cond12
+
+while.end:                                        ; preds = %while.cond.while.end_crit_edge, %while.cond.preheader
+  %count.0.lcssa = phi i32 [ %count.2.lcssa.lcssa, %while.cond.while.end_crit_edge ], [ 0, %while.cond.preheader ] ; <i32> [#uses=1]
+  %call40 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([11 x i8]* @.str, i64 0, i64 0), i32 %count.0.lcssa) nounwind ; <i32> [#uses=0]
+  ret i32 0
+}
+
+declare i32 @atoi(i8* nocapture) nounwind readonly
+
+declare i32 @printf(i8* nocapture, ...) nounwind
+
+; IndVars shouldn't be afraid to emit a udiv here, since there's a udiv in
+; the original code.
+
+; CHECK: @foo
+; CHECK: for.body.preheader:
+; CHECK-NEXT: udiv
+
+define void @foo(double* %p, i64 %n) nounwind {
+entry:
+  %div0 = udiv i64 %n, 7                          ; <i64> [#uses=1]
+  %div1 = add i64 %div0, 1
+  %cmp2 = icmp ult i64 0, %div1                   ; <i1> [#uses=1]
+  br i1 %cmp2, label %for.body.preheader, label %for.end
+
+for.body.preheader:                               ; preds = %entry
+  br label %for.body
+
+for.body:                                         ; preds = %for.body.preheader, %for.body
+  %i.03 = phi i64 [ %inc, %for.body ], [ 0, %for.body.preheader ] ; <i64> [#uses=2]
+  %arrayidx = getelementptr inbounds double* %p, i64 %i.03 ; <double*> [#uses=1]
+  store double 0.000000e+00, double* %arrayidx
+  %inc = add i64 %i.03, 1                         ; <i64> [#uses=2]
+  %divx = udiv i64 %n, 7                           ; <i64> [#uses=1]
+  %div = add i64 %divx, 1
+  %cmp = icmp ult i64 %inc, %div                  ; <i1> [#uses=1]
+  br i1 %cmp, label %for.body, label %for.end.loopexit
+
+for.end.loopexit:                                 ; preds = %for.body
+  br label %for.end
+
+for.end:                                          ; preds = %for.end.loopexit, %entry
+  ret void
+}




From scallanan at apple.com  Mon Apr 12 16:55:49 2010
From: scallanan at apple.com (Sean Callanan)
Date: Mon, 12 Apr 2010 21:55:49 -0000
Subject: [llvm-commits] [llvm] r101072 - in /llvm/trunk/tools: Makefile
	edis/Makefile
Message-ID: <20100412215549.C74EF2A6C12C@llvm.org>

Author: spyffe
Date: Mon Apr 12 16:55:49 2010
New Revision: 101072

URL: http://llvm.org/viewvc/llvm-project?rev=101072&view=rev
Log:
Build system fixes.  llvm-mc depends on
libEnhancedDisassembly, so we now build the
static library in all cases (although the shared
library is only built when requested/possible).

Also, fixed a bug where edis wasn't properly
initializing the targets it uses.

Modified:
    llvm/trunk/tools/Makefile
    llvm/trunk/tools/edis/Makefile

Modified: llvm/trunk/tools/Makefile
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/Makefile?rev=101072&r1=101071&r2=101072&view=diff
==============================================================================
--- llvm/trunk/tools/Makefile (original)
+++ llvm/trunk/tools/Makefile Mon Apr 12 16:55:49 2010
@@ -15,7 +15,10 @@
 # NOTE: The tools are organized into five groups of four consisting of one
 # large and three small executables. This is done to minimize memory load
 # in parallel builds.  Please retain this ordering.
-DIRS := llvm-config
+
+# libEnhancedDisassembly must be built ahead of llvm-mc
+# because llvm-mc links against libEnhancedDisassembly
+DIRS := llvm-config edis
 PARALLEL_DIRS := opt llvm-as llvm-dis \
                  llc llvm-ranlib llvm-ar llvm-nm \
                  llvm-ld llvm-prof llvm-link \
@@ -36,10 +39,6 @@
 ifeq ($(ENABLE_PIC),1)
   # No support for dynamic libraries on windows targets.
   ifneq ($(TARGET_OS), $(filter $(TARGET_OS), Cygwin MingW))
-    # libEnhancedDisassembly must be built ahead of llvm-mc
-    # because llvm-mc links against libEnhancedDisassembly
-    DIRS += edis
-
     # gold only builds if binutils is around.  It requires "lto" to build before
     # it so it is added to DIRS.
     ifdef BINUTILS_INCDIR
@@ -50,11 +49,6 @@
   endif
 endif
 
-# Only build edis if X86 target support is enabled.
-ifeq ($(filter $(TARGETS_TO_BUILD), X86),)
-  PARALLEL_DIRS := $(filter-out edis, $(PARALLEL_DIRS))
-endif
-
 # Don't build edis if we explicitly disabled it.
 ifeq ($(DISABLE_EDIS),1)
   PARALLEL_DIRS := $(filter-out edis, $(PARALLEL_DIRS))

Modified: llvm/trunk/tools/edis/Makefile
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/edis/Makefile?rev=101072&r1=101071&r2=101072&view=diff
==============================================================================
--- llvm/trunk/tools/edis/Makefile (original)
+++ llvm/trunk/tools/edis/Makefile Mon Apr 12 16:55:49 2010
@@ -17,8 +17,12 @@
 # early so we can set up LINK_COMPONENTS before including Makefile.rules
 include $(LEVEL)/Makefile.config
 
-LINK_LIBS_IN_SHARED = 1
-SHARED_LIBRARY = 1
+ifeq ($(ENABLE_PIC),1)
+    ifneq ($(TARGET_OS), $(filter $(TARGET_OS), Cygwin MingW))
+	LINK_LIBS_IN_SHARED = 1
+	SHARED_LIBRARY = 1
+    endif
+endif
 
 LINK_COMPONENTS := $(TARGETS_TO_BUILD) x86asmprinter x86disassembler
 
@@ -55,8 +59,7 @@
 	EDIS_DEFINES := $(EDIS_DEFINES) -DEDIS_ARM
 endif
 
-CXXFLAGS := $(CXXFLAGS) 
-#$(EDIS_DEFINES)
+CXXFLAGS := $(CXXFLAGS) $(EDIS_DEFINES)
 
 EDInfo.inc:	$(TBLGEN)
 	$(Echo) "Building semantic information header"




From gohman at apple.com  Mon Apr 12 17:12:29 2010
From: gohman at apple.com (Dan Gohman)
Date: Mon, 12 Apr 2010 22:12:29 -0000
Subject: [llvm-commits] [llvm] r101074 - /llvm/trunk/lib/VMCore/Constants.cpp
Message-ID: <20100412221229.7B4D32A6C12C@llvm.org>

Author: djg
Date: Mon Apr 12 17:12:29 2010
New Revision: 101074

URL: http://llvm.org/viewvc/llvm-project?rev=101074&view=rev
Log:
Simplify this code.

Modified:
    llvm/trunk/lib/VMCore/Constants.cpp

Modified: llvm/trunk/lib/VMCore/Constants.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Constants.cpp?rev=101074&r1=101073&r2=101074&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/Constants.cpp (original)
+++ llvm/trunk/lib/VMCore/Constants.cpp Mon Apr 12 17:12:29 2010
@@ -1224,20 +1224,20 @@
 
 Constant *ConstantExpr::getZExtOrBitCast(Constant *C, const Type *Ty) {
   if (C->getType()->getScalarSizeInBits() == Ty->getScalarSizeInBits())
-    return getCast(Instruction::BitCast, C, Ty);
-  return getCast(Instruction::ZExt, C, Ty);
+    return getBitCast(C, Ty);
+  return getZExt(C, Ty);
 }
 
 Constant *ConstantExpr::getSExtOrBitCast(Constant *C, const Type *Ty) {
   if (C->getType()->getScalarSizeInBits() == Ty->getScalarSizeInBits())
-    return getCast(Instruction::BitCast, C, Ty);
-  return getCast(Instruction::SExt, C, Ty);
+    return getBitCast(C, Ty);
+  return getSExt(C, Ty);
 }
 
 Constant *ConstantExpr::getTruncOrBitCast(Constant *C, const Type *Ty) {
   if (C->getType()->getScalarSizeInBits() == Ty->getScalarSizeInBits())
-    return getCast(Instruction::BitCast, C, Ty);
-  return getCast(Instruction::Trunc, C, Ty);
+    return getBitCast(C, Ty);
+  return getTrunc(C, Ty);
 }
 
 Constant *ConstantExpr::getPointerCast(Constant *S, const Type *Ty) {
@@ -1245,8 +1245,8 @@
   assert((Ty->isIntegerTy() || Ty->isPointerTy()) && "Invalid cast");
 
   if (Ty->isIntegerTy())
-    return getCast(Instruction::PtrToInt, S, Ty);
-  return getCast(Instruction::BitCast, S, Ty);
+    return getPtrToInt(S, Ty);
+  return getBitCast(S, Ty);
 }
 
 Constant *ConstantExpr::getIntegerCast(Constant *C, const Type *Ty, 
@@ -1523,8 +1523,8 @@
   Constant *GEPIdx = ConstantInt::get(Type::getInt32Ty(Ty->getContext()), 1);
   Constant *GEP = getGetElementPtr(
                  Constant::getNullValue(PointerType::getUnqual(Ty)), &GEPIdx, 1);
-  return getCast(Instruction::PtrToInt, GEP, 
-                 Type::getInt64Ty(Ty->getContext()));
+  return getPtrToInt(GEP, 
+                     Type::getInt64Ty(Ty->getContext()));
 }
 
 Constant* ConstantExpr::getAlignOf(const Type* Ty) {
@@ -1537,8 +1537,8 @@
   Constant *One = ConstantInt::get(Type::getInt32Ty(Ty->getContext()), 1);
   Constant *Indices[2] = { Zero, One };
   Constant *GEP = getGetElementPtr(NullPtr, Indices, 2);
-  return getCast(Instruction::PtrToInt, GEP,
-                 Type::getInt64Ty(Ty->getContext()));
+  return getPtrToInt(GEP,
+                     Type::getInt64Ty(Ty->getContext()));
 }
 
 Constant* ConstantExpr::getOffsetOf(const StructType* STy, unsigned FieldNo) {
@@ -1555,8 +1555,8 @@
   };
   Constant *GEP = getGetElementPtr(
                 Constant::getNullValue(PointerType::getUnqual(Ty)), GEPIdx, 2);
-  return getCast(Instruction::PtrToInt, GEP,
-                 Type::getInt64Ty(Ty->getContext()));
+  return getPtrToInt(GEP,
+                     Type::getInt64Ty(Ty->getContext()));
 }
 
 Constant *ConstantExpr::getCompare(unsigned short pred, 




From isanbard at gmail.com  Mon Apr 12 17:19:57 2010
From: isanbard at gmail.com (Bill Wendling)
Date: Mon, 12 Apr 2010 22:19:57 -0000
Subject: [llvm-commits] [llvm] r101075 - in /llvm/trunk:
 lib/Target/X86/X86InstrInfo.cpp test/CodeGen/X86/brcond.ll
Message-ID: <20100412221957.EBF8A2A6C12C@llvm.org>

Author: void
Date: Mon Apr 12 17:19:57 2010
New Revision: 101075

URL: http://llvm.org/viewvc/llvm-project?rev=101075&view=rev
Log:
Micro-optimization:

If we have this situation:

    jCC  L1
    jmp  L2
L1:
  ...
L2:
  ...

We can get a small performance boost by emitting this instead:

    jnCC L2
L1:
  ...
L2:
  ...

This testcase shows an example of this:

float func(float x, float y) {
    double product = (double)x * y;
    if (product == 0.0)
        return product;
    return product - 1.0;
}


Modified:
    llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
    llvm/trunk/test/CodeGen/X86/brcond.ll

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=101075&r1=101074&r2=101075&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Mon Apr 12 17:19:57 2010
@@ -1684,6 +1684,7 @@
   // Start from the bottom of the block and work up, examining the
   // terminator instructions.
   MachineBasicBlock::iterator I = MBB.end();
+  MachineBasicBlock::iterator UnCondBrIter = MBB.end();
   while (I != MBB.begin()) {
     --I;
     if (I->isDebugValue())
@@ -1701,6 +1702,8 @@
 
     // Handle unconditional branches.
     if (I->getOpcode() == X86::JMP_4) {
+      UnCondBrIter = I;
+
       if (!AllowModify) {
         TBB = I->getOperand(0).getMBB();
         continue;
@@ -1718,10 +1721,11 @@
         TBB = 0;
         I->eraseFromParent();
         I = MBB.end();
+        UnCondBrIter = MBB.end();
         continue;
       }
 
-      // TBB is used to indicate the unconditinal destination.
+      // TBB is used to indicate the unconditional destination.
       TBB = I->getOperand(0).getMBB();
       continue;
     }
@@ -1733,7 +1737,48 @@
 
     // Working from the bottom, handle the first conditional branch.
     if (Cond.empty()) {
+      MachineBasicBlock *TargetBB = I->getOperand(0).getMBB();
+      if (AllowModify && UnCondBrIter != MBB.end() &&
+          MBB.isLayoutSuccessor(TargetBB)) {
+        // If we can modify the code and it ends in something like:
+        //
+        //     jCC L1
+        //     jmp L2
+        //   L1:
+        //     ...
+        //   L2:
+        //
+        // Then we can change this to:
+        //
+        //     jnCC L2
+        //   L1:
+        //     ...
+        //   L2:
+        //
+        // Which is a bit more efficient.
+        // We conditionally jump to the fall-through block.
+        BranchCode = GetOppositeBranchCondition(BranchCode);
+        unsigned JNCC = GetCondBranchFromCond(BranchCode);
+        MachineBasicBlock::iterator OldInst = I;
+        --I;
+
+        BuildMI(MBB, UnCondBrIter, MBB.findDebugLoc(I), get(JNCC))
+          .addMBB(UnCondBrIter->getOperand(0).getMBB());
+        BuildMI(MBB, UnCondBrIter, MBB.findDebugLoc(I), get(X86::JMP_4))
+          .addMBB(TargetBB);
+        MBB.addSuccessor(TargetBB);
+
+        OldInst->eraseFromParent();
+        UnCondBrIter->eraseFromParent();
+
+        // Restart the analysis.
+        UnCondBrIter = MBB.end();
+        I = MBB.end();
+        continue;
+      }
+
       FBB = TBB;
+      TBB = TargetBB;
       TBB = I->getOperand(0).getMBB();
       Cond.push_back(MachineOperand::CreateImm(BranchCode));
       continue;

Modified: llvm/trunk/test/CodeGen/X86/brcond.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/brcond.ll?rev=101075&r1=101074&r2=101075&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/brcond.ll (original)
+++ llvm/trunk/test/CodeGen/X86/brcond.ll Mon Apr 12 17:19:57 2010
@@ -67,3 +67,41 @@
 ; CHECK-NEXT:	orl	8(%esp), %eax
 ; CHECK-NEXT:	je	LBB3_2
 }
+
+; <rdar://problem/7598384>:
+;
+;    jCC  L1
+;    jmp  L2
+; L1:
+;   ...
+; L2:
+;   ...
+;
+; to:
+; 
+;    jnCC L2
+; L1:
+;   ...
+; L2:
+;   ...
+define float @test4(float %x, float %y) nounwind readnone optsize ssp {
+entry:
+  %0 = fpext float %x to double                   ; <double> [#uses=1]
+  %1 = fpext float %y to double                   ; <double> [#uses=1]
+  %2 = fmul double %0, %1                         ; <double> [#uses=3]
+  %3 = fcmp oeq double %2, 0.000000e+00           ; <i1> [#uses=1]
+  br i1 %3, label %bb2, label %bb1
+
+; CHECK:      jne
+; CHECK-NOT:  jmp
+; CHECK-NEXT: jnp
+
+bb1:                                              ; preds = %entry
+  %4 = fadd double %2, -1.000000e+00              ; <double> [#uses=1]
+  br label %bb2
+
+bb2:                                              ; preds = %entry, %bb1
+  %.0.in = phi double [ %4, %bb1 ], [ %2, %entry ] ; <double> [#uses=1]
+  %.0 = fptrunc double %.0.in to float            ; <float> [#uses=1]
+  ret float %.0
+}




From isanbard at gmail.com  Mon Apr 12 17:25:42 2010
From: isanbard at gmail.com (Bill Wendling)
Date: Mon, 12 Apr 2010 22:25:42 -0000
Subject: [llvm-commits] [llvm] r101077 -
	/llvm/trunk/test/CodeGen/X86/brcond.ll
Message-ID: <20100412222542.C67292A6C12C@llvm.org>

Author: void
Date: Mon Apr 12 17:25:42 2010
New Revision: 101077

URL: http://llvm.org/viewvc/llvm-project?rev=101077&view=rev
Log:
Correct test to test what I mean it to test.

Modified:
    llvm/trunk/test/CodeGen/X86/brcond.ll

Modified: llvm/trunk/test/CodeGen/X86/brcond.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/brcond.ll?rev=101077&r1=101076&r2=101077&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/brcond.ll (original)
+++ llvm/trunk/test/CodeGen/X86/brcond.ll Mon Apr 12 17:25:42 2010
@@ -93,8 +93,9 @@
   br i1 %3, label %bb2, label %bb1
 
 ; CHECK:      jne
-; CHECK-NOT:  jmp
 ; CHECK-NEXT: jnp
+; CHECK-NOT:  jmp
+; CHECK-NEXT: LBB1_1
 
 bb1:                                              ; preds = %entry
   %4 = fadd double %2, -1.000000e+00              ; <double> [#uses=1]




From isanbard at gmail.com  Mon Apr 12 17:40:37 2010
From: isanbard at gmail.com (Bill Wendling)
Date: Mon, 12 Apr 2010 22:40:37 -0000
Subject: [llvm-commits] [llvm] r101079 -
	/llvm/trunk/test/CodeGen/X86/brcond.ll
Message-ID: <20100412224037.2ECE82A6C12C@llvm.org>

Author: void
Date: Mon Apr 12 17:40:37 2010
New Revision: 101079

URL: http://llvm.org/viewvc/llvm-project?rev=101079&view=rev
Log:
Genericize the label test.

Modified:
    llvm/trunk/test/CodeGen/X86/brcond.ll

Modified: llvm/trunk/test/CodeGen/X86/brcond.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/brcond.ll?rev=101079&r1=101078&r2=101079&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/brcond.ll (original)
+++ llvm/trunk/test/CodeGen/X86/brcond.ll Mon Apr 12 17:40:37 2010
@@ -95,7 +95,7 @@
 ; CHECK:      jne
 ; CHECK-NEXT: jnp
 ; CHECK-NOT:  jmp
-; CHECK-NEXT: LBB1_1
+; CHECK-NEXT: LBB
 
 bb1:                                              ; preds = %entry
   %4 = fadd double %2, -1.000000e+00              ; <double> [#uses=1]




From isanbard at gmail.com  Mon Apr 12 17:43:21 2010
From: isanbard at gmail.com (Bill Wendling)
Date: Mon, 12 Apr 2010 22:43:21 -0000
Subject: [llvm-commits] [llvm] r101081 -
	/llvm/trunk/test/CodeGen/X86/brcond.ll
Message-ID: <20100412224321.2C65B2A6C12C@llvm.org>

Author: void
Date: Mon Apr 12 17:43:21 2010
New Revision: 101081

URL: http://llvm.org/viewvc/llvm-project?rev=101081&view=rev
Log:
Third time's a charm...

Modified:
    llvm/trunk/test/CodeGen/X86/brcond.ll

Modified: llvm/trunk/test/CodeGen/X86/brcond.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/brcond.ll?rev=101081&r1=101080&r2=101081&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/brcond.ll (original)
+++ llvm/trunk/test/CodeGen/X86/brcond.ll Mon Apr 12 17:43:21 2010
@@ -95,7 +95,7 @@
 ; CHECK:      jne
 ; CHECK-NEXT: jnp
 ; CHECK-NOT:  jmp
-; CHECK-NEXT: LBB
+; CHECK:      LBB
 
 bb1:                                              ; preds = %entry
   %4 = fadd double %2, -1.000000e+00              ; <double> [#uses=1]




From gohman at apple.com  Mon Apr 12 18:03:26 2010
From: gohman at apple.com (Dan Gohman)
Date: Mon, 12 Apr 2010 23:03:26 -0000
Subject: [llvm-commits] [llvm] r101083 -
	/llvm/trunk/lib/Analysis/ScalarEvolution.cpp
Message-ID: <20100412230326.58AD62A6C12C@llvm.org>

Author: djg
Date: Mon Apr 12 18:03:26 2010
New Revision: 101083

URL: http://llvm.org/viewvc/llvm-project?rev=101083&view=rev
Log:
Add fast paths to ScalarEvolution::getSizeOf and getOffsetOf, as
they're used a lot by getNodeForGEP, which can be called a lot.
This speeds up -iv-users by around 15% on several testcases.

Modified:
    llvm/trunk/lib/Analysis/ScalarEvolution.cpp

Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=101083&r1=101082&r2=101083&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original)
+++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Mon Apr 12 18:03:26 2010
@@ -2254,6 +2254,13 @@
 }
 
 const SCEV *ScalarEvolution::getSizeOfExpr(const Type *AllocTy) {
+  // If we have TargetData, we can bypass creating a target-independent
+  // constant expression and then folding it back into a ConstantInt.
+  // This is just a compile-time optimization.
+  if (TD)
+    return getConstant(TD->getIntPtrType(getContext()),
+                       TD->getTypeAllocSize(AllocTy));
+
   Constant *C = ConstantExpr::getSizeOf(AllocTy);
   if (ConstantExpr *CE = dyn_cast<ConstantExpr>(C))
     C = ConstantFoldConstantExpression(CE, TD);
@@ -2271,6 +2278,13 @@
 
 const SCEV *ScalarEvolution::getOffsetOfExpr(const StructType *STy,
                                              unsigned FieldNo) {
+  // If we have TargetData, we can bypass creating a target-independent
+  // constant expression and then folding it back into a ConstantInt.
+  // This is just a compile-time optimization.
+  if (TD)
+    return getConstant(TD->getIntPtrType(getContext()),
+                       TD->getStructLayout(STy)->getElementOffset(FieldNo));
+
   Constant *C = ConstantExpr::getOffsetOf(STy, FieldNo);
   if (ConstantExpr *CE = dyn_cast<ConstantExpr>(C))
     C = ConstantFoldConstantExpression(CE, TD);




From evan.cheng at apple.com  Mon Apr 12 18:07:17 2010
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 12 Apr 2010 23:07:17 -0000
Subject: [llvm-commits] [llvm] r101085 - in /llvm/trunk:
 lib/Target/X86/AsmPrinter/X86MCInstLower.cpp
 test/CodeGen/X86/pic_jumptable.ll
Message-ID: <20100412230718.059E72A6C12C@llvm.org>

Author: evancheng
Date: Mon Apr 12 18:07:17 2010
New Revision: 101085

URL: http://llvm.org/viewvc/llvm-project?rev=101085&view=rev
Log:
Use .set expression for x86 pic jump table reference to reduce assembly relocation. rdar://7738756

Modified:
    llvm/trunk/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp
    llvm/trunk/test/CodeGen/X86/pic_jumptable.ll

Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp?rev=101085&r1=101084&r2=101085&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp (original)
+++ llvm/trunk/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp Mon Apr 12 18:07:17 2010
@@ -169,6 +169,15 @@
     Expr = MCBinaryExpr::CreateSub(Expr, 
                                MCSymbolRefExpr::Create(GetPICBaseSymbol(), Ctx),
                                    Ctx);
+    if (MO.isJTI() && AsmPrinter.MAI->hasSetDirective()) {
+      // If .set directive is supported, use it to reduce the number of
+      // relocations the assembler will generate for differences between
+      // local labels. This is only safe when the symbols are in the same
+      // section so we are restricting it to jumptable references.
+      MCSymbol *Label = Ctx.CreateTempSymbol();
+      AsmPrinter.OutStreamer.EmitAssignment(Label, Expr);
+      Expr = MCSymbolRefExpr::Create(Label, Ctx);
+    }
     break;
   }
   

Modified: llvm/trunk/test/CodeGen/X86/pic_jumptable.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pic_jumptable.ll?rev=101085&r1=101084&r2=101085&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pic_jumptable.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pic_jumptable.ll Mon Apr 12 18:07:17 2010
@@ -1,13 +1,18 @@
 ; RUN: llc < %s -relocation-model=pic -mtriple=i386-linux-gnu -asm-verbose=false | not grep -F .text
-; RUN: llc < %s -relocation-model=pic -mtriple=i686-apple-darwin -asm-verbose=false | not grep lea
-; RUN: llc < %s -relocation-model=pic -mtriple=i686-apple-darwin -asm-verbose=false | grep add | count 2
+; RUN: llc < %s -relocation-model=pic -mtriple=i686-apple-darwin -asm-verbose=false | FileCheck %s
 ; RUN: llc < %s                       -mtriple=x86_64-apple-darwin | not grep 'lJTI'
 ; rdar://6971437
+; rdar://7738756
 
 declare void @_Z3bari(i32)
 
 define linkonce void @_Z3fooILi1EEvi(i32 %Y) nounwind {
 entry:
+; CHECK:       L1$pb
+; CHECK-NOT:   leal
+; CHECK:       Ltmp0 = LJTI1_0-L1$pb
+; CHECK-NEXT:  addl Ltmp0(%eax,%ecx,4)
+; CHECK-NEXT:  jmpl *%eax
 	%Y_addr = alloca i32		; <i32*> [#uses=2]
 	%"alloca point" = bitcast i32 0 to i32		; <i32> [#uses=0]
 	store i32 %Y, i32* %Y_addr




From gohman at apple.com  Mon Apr 12 18:08:18 2010
From: gohman at apple.com (Dan Gohman)
Date: Mon, 12 Apr 2010 23:08:18 -0000
Subject: [llvm-commits] [llvm] r101086 -
	/llvm/trunk/lib/Analysis/ScalarEvolution.cpp
Message-ID: <20100412230818.3F1322A6C12C@llvm.org>

Author: djg
Date: Mon Apr 12 18:08:18 2010
New Revision: 101086

URL: http://llvm.org/viewvc/llvm-project?rev=101086&view=rev
Log:
Micro-optimize a few hot spots.

Modified:
    llvm/trunk/lib/Analysis/ScalarEvolution.cpp

Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=101086&r1=101085&r2=101086&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original)
+++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Mon Apr 12 18:08:18 2010
@@ -1237,7 +1237,7 @@
       }
     } else if (const SCEVConstant *C = dyn_cast<SCEVConstant>(Ops[i])) {
       // Pull a buried constant out to the outside.
-      if (Scale != 1 || AccumulatedConstant != 0 || C->isZero())
+      if (Scale != 1 || AccumulatedConstant != 0 || C->getValue()->isZero())
         Interesting = true;
       AccumulatedConstant += Scale * C->getValue()->getValue();
     } else {
@@ -1308,13 +1308,13 @@
     }
 
     // If we are left with a constant zero being added, strip it off.
-    if (cast<SCEVConstant>(Ops[0])->getValue()->isZero()) {
+    if (LHSC->getValue()->isZero()) {
       Ops.erase(Ops.begin());
       --Idx;
     }
-  }
 
-  if (Ops.size() == 1) return Ops[0];
+    if (Ops.size() == 1) return Ops[0];
+  }
 
   // Okay, check to see if the same value occurs in the operand list twice.  If
   // so, merge them together into an multiply expression.  Since we sorted the
@@ -1534,8 +1534,9 @@
     // they are loop invariant w.r.t. the recurrence.
     SmallVector<const SCEV *, 8> LIOps;
     const SCEVAddRecExpr *AddRec = cast<SCEVAddRecExpr>(Ops[Idx]);
+    const Loop *AddRecLoop = AddRec->getLoop();
     for (unsigned i = 0, e = Ops.size(); i != e; ++i)
-      if (Ops[i]->isLoopInvariant(AddRec->getLoop())) {
+      if (Ops[i]->isLoopInvariant(AddRecLoop)) {
         LIOps.push_back(Ops[i]);
         Ops.erase(Ops.begin()+i);
         --i; --e;
@@ -1552,7 +1553,7 @@
 
       // It's tempting to propagate NUW/NSW flags here, but nuw/nsw addition
       // is not associative so this isn't necessarily safe.
-      const SCEV *NewRec = getAddRecExpr(AddRecOps, AddRec->getLoop());
+      const SCEV *NewRec = getAddRecExpr(AddRecOps, AddRecLoop);
 
       // If all of the other operands were loop invariant, we are done.
       if (Ops.size() == 1) return NewRec;
@@ -1573,7 +1574,7 @@
          OtherIdx < Ops.size() && isa<SCEVAddRecExpr>(Ops[OtherIdx]);++OtherIdx)
       if (OtherIdx != Idx) {
         const SCEVAddRecExpr *OtherAddRec = cast<SCEVAddRecExpr>(Ops[OtherIdx]);
-        if (AddRec->getLoop() == OtherAddRec->getLoop()) {
+        if (AddRecLoop == OtherAddRec->getLoop()) {
           // Other + {A,+,B} + {C,+,D}  -->  Other + {A+C,+,B+D}
           SmallVector<const SCEV *, 4> NewOps(AddRec->op_begin(),
                                               AddRec->op_end());
@@ -1585,7 +1586,7 @@
             }
             NewOps[i] = getAddExpr(NewOps[i], OtherAddRec->getOperand(i));
           }
-          const SCEV *NewAddRec = getAddRecExpr(NewOps, AddRec->getLoop());
+          const SCEV *NewAddRec = getAddRecExpr(NewOps, AddRecLoop);
 
           if (Ops.size() == 2) return NewAddRec;
 
@@ -1843,7 +1844,7 @@
   if (const SCEVConstant *RHSC = dyn_cast<SCEVConstant>(RHS)) {
     if (RHSC->getValue()->equalsInt(1))
       return LHS;                               // X udiv 1 --> x
-    if (RHSC->isZero())
+    if (RHSC->getValue()->isZero())
       return getIntegerSCEV(0, LHS->getType()); // value is undefined
 
     // Determine if the division can be folded into the operands of
@@ -2946,7 +2947,7 @@
     // initial value.
     if (AddRec->hasNoUnsignedWrap())
       if (const SCEVConstant *C = dyn_cast<SCEVConstant>(AddRec->getStart()))
-        if (!C->isZero())
+        if (!C->getValue()->isZero())
           ConservativeResult =
             ConstantRange(C->getValue()->getValue(), APInt(BitWidth, 0));
 




From clattner at apple.com  Mon Apr 12 18:13:38 2010
From: clattner at apple.com (Chris Lattner)
Date: Mon, 12 Apr 2010 16:13:38 -0700
Subject: [llvm-commits] [llvm] r101075 - in /llvm/trunk:
	lib/Target/X86/X86InstrInfo.cpp test/CodeGen/X86/brcond.ll
In-Reply-To: <20100412221957.EBF8A2A6C12C@llvm.org>
References: <20100412221957.EBF8A2A6C12C@llvm.org>
Message-ID: <000E7360-B5FF-460E-80EF-F8A69D74C0DF@apple.com>


On Apr 12, 2010, at 3:19 PM, Bill Wendling wrote:

> Author: void
> Date: Mon Apr 12 17:19:57 2010
> New Revision: 101075

hi Bill, is it possible for this to go in target independent code, e.g. branch folding?

-Chris

> 
> URL: http://llvm.org/viewvc/llvm-project?rev=101075&view=rev
> Log:
> Micro-optimization:
> 
> If we have this situation:
> 
>    jCC  L1
>    jmp  L2
> L1:
>  ...
> L2:
>  ...
> 
> We can get a small performance boost by emitting this instead:
> 
>    jnCC L2
> L1:
>  ...
> L2:
>  ...
> 
> This testcase shows an example of this:
> 
> float func(float x, float y) {
>    double product = (double)x * y;
>    if (product == 0.0)
>        return product;
>    return product - 1.0;
> }
> 
> 
> Modified:
>    llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
>    llvm/trunk/test/CodeGen/X86/brcond.ll
> 
> Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=101075&r1=101074&r2=101075&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Mon Apr 12 17:19:57 2010
> @@ -1684,6 +1684,7 @@
>   // Start from the bottom of the block and work up, examining the
>   // terminator instructions.
>   MachineBasicBlock::iterator I = MBB.end();
> +  MachineBasicBlock::iterator UnCondBrIter = MBB.end();
>   while (I != MBB.begin()) {
>     --I;
>     if (I->isDebugValue())
> @@ -1701,6 +1702,8 @@
> 
>     // Handle unconditional branches.
>     if (I->getOpcode() == X86::JMP_4) {
> +      UnCondBrIter = I;
> +
>       if (!AllowModify) {
>         TBB = I->getOperand(0).getMBB();
>         continue;
> @@ -1718,10 +1721,11 @@
>         TBB = 0;
>         I->eraseFromParent();
>         I = MBB.end();
> +        UnCondBrIter = MBB.end();
>         continue;
>       }
> 
> -      // TBB is used to indicate the unconditinal destination.
> +      // TBB is used to indicate the unconditional destination.
>       TBB = I->getOperand(0).getMBB();
>       continue;
>     }
> @@ -1733,7 +1737,48 @@
> 
>     // Working from the bottom, handle the first conditional branch.
>     if (Cond.empty()) {
> +      MachineBasicBlock *TargetBB = I->getOperand(0).getMBB();
> +      if (AllowModify && UnCondBrIter != MBB.end() &&
> +          MBB.isLayoutSuccessor(TargetBB)) {
> +        // If we can modify the code and it ends in something like:
> +        //
> +        //     jCC L1
> +        //     jmp L2
> +        //   L1:
> +        //     ...
> +        //   L2:
> +        //
> +        // Then we can change this to:
> +        //
> +        //     jnCC L2
> +        //   L1:
> +        //     ...
> +        //   L2:
> +        //
> +        // Which is a bit more efficient.
> +        // We conditionally jump to the fall-through block.
> +        BranchCode = GetOppositeBranchCondition(BranchCode);
> +        unsigned JNCC = GetCondBranchFromCond(BranchCode);
> +        MachineBasicBlock::iterator OldInst = I;
> +        --I;
> +
> +        BuildMI(MBB, UnCondBrIter, MBB.findDebugLoc(I), get(JNCC))
> +          .addMBB(UnCondBrIter->getOperand(0).getMBB());
> +        BuildMI(MBB, UnCondBrIter, MBB.findDebugLoc(I), get(X86::JMP_4))
> +          .addMBB(TargetBB);
> +        MBB.addSuccessor(TargetBB);
> +
> +        OldInst->eraseFromParent();
> +        UnCondBrIter->eraseFromParent();
> +
> +        // Restart the analysis.
> +        UnCondBrIter = MBB.end();
> +        I = MBB.end();
> +        continue;
> +      }
> +
>       FBB = TBB;
> +      TBB = TargetBB;
>       TBB = I->getOperand(0).getMBB();
>       Cond.push_back(MachineOperand::CreateImm(BranchCode));
>       continue;
> 
> Modified: llvm/trunk/test/CodeGen/X86/brcond.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/brcond.ll?rev=101075&r1=101074&r2=101075&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/brcond.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/brcond.ll Mon Apr 12 17:19:57 2010
> @@ -67,3 +67,41 @@
> ; CHECK-NEXT:	orl	8(%esp), %eax
> ; CHECK-NEXT:	je	LBB3_2
> }
> +
> +; <rdar://problem/7598384>:
> +;
> +;    jCC  L1
> +;    jmp  L2
> +; L1:
> +;   ...
> +; L2:
> +;   ...
> +;
> +; to:
> +; 
> +;    jnCC L2
> +; L1:
> +;   ...
> +; L2:
> +;   ...
> +define float @test4(float %x, float %y) nounwind readnone optsize ssp {
> +entry:
> +  %0 = fpext float %x to double                   ; <double> [#uses=1]
> +  %1 = fpext float %y to double                   ; <double> [#uses=1]
> +  %2 = fmul double %0, %1                         ; <double> [#uses=3]
> +  %3 = fcmp oeq double %2, 0.000000e+00           ; <i1> [#uses=1]
> +  br i1 %3, label %bb2, label %bb1
> +
> +; CHECK:      jne
> +; CHECK-NOT:  jmp
> +; CHECK-NEXT: jnp
> +
> +bb1:                                              ; preds = %entry
> +  %4 = fadd double %2, -1.000000e+00              ; <double> [#uses=1]
> +  br label %bb2
> +
> +bb2:                                              ; preds = %entry, %bb1
> +  %.0.in = phi double [ %4, %bb1 ], [ %2, %entry ] ; <double> [#uses=1]
> +  %.0 = fptrunc double %.0.in to float            ; <float> [#uses=1]
> +  ret float %.0
> +}
> 
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits




From dalej at apple.com  Mon Apr 12 18:22:13 2010
From: dalej at apple.com (Dale Johannesen)
Date: Mon, 12 Apr 2010 16:22:13 -0700
Subject: [llvm-commits] [llvm] r101075 - in /llvm/trunk:
	lib/Target/X86/X86InstrInfo.cpp test/CodeGen/X86/brcond.ll
In-Reply-To: <000E7360-B5FF-460E-80EF-F8A69D74C0DF@apple.com>
References: <20100412221957.EBF8A2A6C12C@llvm.org>
	<000E7360-B5FF-460E-80EF-F8A69D74C0DF@apple.com>
Message-ID: <26E362DF-1C47-4A0C-B259-0A6AFC5E5B37@apple.com>


On Apr 12, 2010, at 4:13 PMPDT, Chris Lattner wrote:

> 
> On Apr 12, 2010, at 3:19 PM, Bill Wendling wrote:
> 
>> Author: void
>> Date: Mon Apr 12 17:19:57 2010
>> New Revision: 101075
> 
> hi Bill, is it possible for this to go in target independent code, e.g. branch folding?
> 
> -Chris

Branch folding is already trying:

    // If the prior block branches here on true and somewhere else on false, and
    // if the branch condition is reversible, reverse the branch to create a
    // fall-through.
    if (PriorTBB == MBB) {
      SmallVector<MachineOperand, 4> NewPriorCond(PriorCond);
      if (!TII->ReverseBranchCondition(NewPriorCond)) {
        TII->RemoveBranch(PrevBB);
        TII->InsertBranch(PrevBB, PriorFBB, 0, NewPriorCond);
        MadeChange = true;
        ++NumBranchOpts;
        goto ReoptimizeBlock;
      }
    }

Why doesn't it work in this case?

>> URL: http://llvm.org/viewvc/llvm-project?rev=101075&view=rev
>> Log:
>> Micro-optimization:
>> 
>> If we have this situation:
>> 
>>   jCC  L1
>>   jmp  L2
>> L1:
>> ...
>> L2:
>> ...
>> 
>> We can get a small performance boost by emitting this instead:
>> 
>>   jnCC L2
>> L1:
>> ...
>> L2:
>> ...
>> 
>> This testcase shows an example of this:
>> 
>> float func(float x, float y) {
>>   double product = (double)x * y;
>>   if (product == 0.0)
>>       return product;
>>   return product - 1.0;
>> }
>> 
>> 
>> Modified:
>>   llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
>>   llvm/trunk/test/CodeGen/X86/brcond.ll
>> 
>> Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=101075&r1=101074&r2=101075&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)
>> +++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Mon Apr 12 17:19:57 2010
>> @@ -1684,6 +1684,7 @@
>>  // Start from the bottom of the block and work up, examining the
>>  // terminator instructions.
>>  MachineBasicBlock::iterator I = MBB.end();
>> +  MachineBasicBlock::iterator UnCondBrIter = MBB.end();
>>  while (I != MBB.begin()) {
>>    --I;
>>    if (I->isDebugValue())
>> @@ -1701,6 +1702,8 @@
>> 
>>    // Handle unconditional branches.
>>    if (I->getOpcode() == X86::JMP_4) {
>> +      UnCondBrIter = I;
>> +
>>      if (!AllowModify) {
>>        TBB = I->getOperand(0).getMBB();
>>        continue;
>> @@ -1718,10 +1721,11 @@
>>        TBB = 0;
>>        I->eraseFromParent();
>>        I = MBB.end();
>> +        UnCondBrIter = MBB.end();
>>        continue;
>>      }
>> 
>> -      // TBB is used to indicate the unconditinal destination.
>> +      // TBB is used to indicate the unconditional destination.
>>      TBB = I->getOperand(0).getMBB();
>>      continue;
>>    }
>> @@ -1733,7 +1737,48 @@
>> 
>>    // Working from the bottom, handle the first conditional branch.
>>    if (Cond.empty()) {
>> +      MachineBasicBlock *TargetBB = I->getOperand(0).getMBB();
>> +      if (AllowModify && UnCondBrIter != MBB.end() &&
>> +          MBB.isLayoutSuccessor(TargetBB)) {
>> +        // If we can modify the code and it ends in something like:
>> +        //
>> +        //     jCC L1
>> +        //     jmp L2
>> +        //   L1:
>> +        //     ...
>> +        //   L2:
>> +        //
>> +        // Then we can change this to:
>> +        //
>> +        //     jnCC L2
>> +        //   L1:
>> +        //     ...
>> +        //   L2:
>> +        //
>> +        // Which is a bit more efficient.
>> +        // We conditionally jump to the fall-through block.
>> +        BranchCode = GetOppositeBranchCondition(BranchCode);
>> +        unsigned JNCC = GetCondBranchFromCond(BranchCode);
>> +        MachineBasicBlock::iterator OldInst = I;
>> +        --I;
>> +
>> +        BuildMI(MBB, UnCondBrIter, MBB.findDebugLoc(I), get(JNCC))
>> +          .addMBB(UnCondBrIter->getOperand(0).getMBB());
>> +        BuildMI(MBB, UnCondBrIter, MBB.findDebugLoc(I), get(X86::JMP_4))
>> +          .addMBB(TargetBB);
>> +        MBB.addSuccessor(TargetBB);
>> +
>> +        OldInst->eraseFromParent();
>> +        UnCondBrIter->eraseFromParent();
>> +
>> +        // Restart the analysis.
>> +        UnCondBrIter = MBB.end();
>> +        I = MBB.end();
>> +        continue;
>> +      }
>> +
>>      FBB = TBB;
>> +      TBB = TargetBB;
>>      TBB = I->getOperand(0).getMBB();
>>      Cond.push_back(MachineOperand::CreateImm(BranchCode));
>>      continue;
>> 
>> Modified: llvm/trunk/test/CodeGen/X86/brcond.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/brcond.ll?rev=101075&r1=101074&r2=101075&view=diff
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/X86/brcond.ll (original)
>> +++ llvm/trunk/test/CodeGen/X86/brcond.ll Mon Apr 12 17:19:57 2010
>> @@ -67,3 +67,41 @@
>> ; CHECK-NEXT:	orl	8(%esp), %eax
>> ; CHECK-NEXT:	je	LBB3_2
>> }
>> +
>> +; <rdar://problem/7598384>:
>> +;
>> +;    jCC  L1
>> +;    jmp  L2
>> +; L1:
>> +;   ...
>> +; L2:
>> +;   ...
>> +;
>> +; to:
>> +; 
>> +;    jnCC L2
>> +; L1:
>> +;   ...
>> +; L2:
>> +;   ...
>> +define float @test4(float %x, float %y) nounwind readnone optsize ssp {
>> +entry:
>> +  %0 = fpext float %x to double                   ; <double> [#uses=1]
>> +  %1 = fpext float %y to double                   ; <double> [#uses=1]
>> +  %2 = fmul double %0, %1                         ; <double> [#uses=3]
>> +  %3 = fcmp oeq double %2, 0.000000e+00           ; <i1> [#uses=1]
>> +  br i1 %3, label %bb2, label %bb1
>> +
>> +; CHECK:      jne
>> +; CHECK-NOT:  jmp
>> +; CHECK-NEXT: jnp
>> +
>> +bb1:                                              ; preds = %entry
>> +  %4 = fadd double %2, -1.000000e+00              ; <double> [#uses=1]
>> +  br label %bb2
>> +
>> +bb2:                                              ; preds = %entry, %bb1
>> +  %.0.in = phi double [ %4, %bb1 ], [ %2, %entry ] ; <double> [#uses=1]
>> +  %.0 = fptrunc double %.0.in to float            ; <float> [#uses=1]
>> +  ret float %.0
>> +}
>> 
>> 
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
> 
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits




From gohman at apple.com  Mon Apr 12 18:27:52 2010
From: gohman at apple.com (Dan Gohman)
Date: Mon, 12 Apr 2010 16:27:52 -0700
Subject: [llvm-commits] [llvm] r101075 - in /llvm/trunk:
	lib/Target/X86/X86InstrInfo.cpp test/CodeGen/X86/brcond.ll
In-Reply-To: <26E362DF-1C47-4A0C-B259-0A6AFC5E5B37@apple.com>
References: <20100412221957.EBF8A2A6C12C@llvm.org>
	<000E7360-B5FF-460E-80EF-F8A69D74C0DF@apple.com>
	<26E362DF-1C47-4A0C-B259-0A6AFC5E5B37@apple.com>
Message-ID: <FCDEA618-97D0-457D-AB36-E695A89C0D62@apple.com>


On Apr 12, 2010, at 4:22 PM, Dale Johannesen wrote:

> 
> On Apr 12, 2010, at 4:13 PMPDT, Chris Lattner wrote:
> 
>> 
>> On Apr 12, 2010, at 3:19 PM, Bill Wendling wrote:
>> 
>>> Author: void
>>> Date: Mon Apr 12 17:19:57 2010
>>> New Revision: 101075
>> 
>> hi Bill, is it possible for this to go in target independent code, e.g. branch folding?
>> 
>> -Chris
> 
> Branch folding is already trying:
> 
>    // If the prior block branches here on true and somewhere else on false, and
>    // if the branch condition is reversible, reverse the branch to create a
>    // fall-through.
>    if (PriorTBB == MBB) {
>      SmallVector<MachineOperand, 4> NewPriorCond(PriorCond);
>      if (!TII->ReverseBranchCondition(NewPriorCond)) {
>        TII->RemoveBranch(PrevBB);
>        TII->InsertBranch(PrevBB, PriorFBB, 0, NewPriorCond);
>        MadeChange = true;
>        ++NumBranchOpts;
>        goto ReoptimizeBlock;
>      }
>    }
> 
> Why doesn't it work in this case?

I was curious too. CodeGenPrepare has split a critical edge for a PHI
node, however after register allocation it turns out that no copy was
needed, so the jmp is actually in a separate basic block from the
jne, jp.

Would it be possible to get branch folding to merge the empty block
before doing the other reordering that it's doing here? I'm curious if
that would allow the code Dale quoted above to do its job.

Dan




From dalej at apple.com  Mon Apr 12 18:38:09 2010
From: dalej at apple.com (Dale Johannesen)
Date: Mon, 12 Apr 2010 16:38:09 -0700
Subject: [llvm-commits] [llvm] r101075 - in /llvm/trunk:
	lib/Target/X86/X86InstrInfo.cpp test/CodeGen/X86/brcond.ll
In-Reply-To: <FCDEA618-97D0-457D-AB36-E695A89C0D62@apple.com>
References: <20100412221957.EBF8A2A6C12C@llvm.org>
	<000E7360-B5FF-460E-80EF-F8A69D74C0DF@apple.com>
	<26E362DF-1C47-4A0C-B259-0A6AFC5E5B37@apple.com>
	<FCDEA618-97D0-457D-AB36-E695A89C0D62@apple.com>
Message-ID: <1670CEA8-B035-4FCA-B5A6-549664FC826C@apple.com>


On Apr 12, 2010, at 4:27 PMPDT, Dan Gohman wrote:

> 
> On Apr 12, 2010, at 4:22 PM, Dale Johannesen wrote:
> 
>> 
>> On Apr 12, 2010, at 4:13 PMPDT, Chris Lattner wrote:
>> 
>>> 
>>> On Apr 12, 2010, at 3:19 PM, Bill Wendling wrote:
>>> 
>>>> Author: void
>>>> Date: Mon Apr 12 17:19:57 2010
>>>> New Revision: 101075
>>> 
>>> hi Bill, is it possible for this to go in target independent code, e.g. branch folding?
>>> 
>>> -Chris
>> 
>> Branch folding is already trying:
>> 
>>   // If the prior block branches here on true and somewhere else on false, and
>>   // if the branch condition is reversible, reverse the branch to create a
>>   // fall-through.
>>   if (PriorTBB == MBB) {
>>     SmallVector<MachineOperand, 4> NewPriorCond(PriorCond);
>>     if (!TII->ReverseBranchCondition(NewPriorCond)) {
>>       TII->RemoveBranch(PrevBB);
>>       TII->InsertBranch(PrevBB, PriorFBB, 0, NewPriorCond);
>>       MadeChange = true;
>>       ++NumBranchOpts;
>>       goto ReoptimizeBlock;
>>     }
>>   }
>> 
>> Why doesn't it work in this case?
> 
> I was curious too. CodeGenPrepare has split a critical edge for a PHI
> node, however after register allocation it turns out that no copy was
> needed, so the jmp is actually in a separate basic block from the
> jne, jp.


In that case, branch folding should be removing the block that consists of only an unconditional branch:

      // If this block is just an unconditional branch to CurTBB, we can
      // usually completely eliminate the block.  The only case we cannot
      // completely eliminate the block is when the block before this one
      // falls through into MBB and we can't understand the prior block's branch
      // condition.
      if (MBB->empty()) {
         <too long to quote, but appears to do what the comment says>

so why doesn't *that* work?




From bob.wilson at apple.com  Mon Apr 12 18:49:22 2010
From: bob.wilson at apple.com (Bob Wilson)
Date: Mon, 12 Apr 2010 23:49:22 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r101090 -
	/llvm-gcc-4.2/trunk/configure.in
Message-ID: <20100412234922.909FB2A6C12C@llvm.org>

Author: bwilson
Date: Mon Apr 12 18:49:22 2010
New Revision: 101090

URL: http://llvm.org/viewvc/llvm-project?rev=101090&view=rev
Log:
Use "-isysroot <path>" instead of "--sysroot=<path>" for --with-build-sysroot.
The Darwin linker does not get the right -isyslibroot option with --sysroot.
Radar 7852964.

Modified:
    llvm-gcc-4.2/trunk/configure.in

Modified: llvm-gcc-4.2/trunk/configure.in
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/configure.in?rev=101090&r1=101089&r2=101090&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/configure.in (original)
+++ llvm-gcc-4.2/trunk/configure.in Mon Apr 12 18:49:22 2010
@@ -1524,7 +1524,8 @@
   [  --with-build-sysroot=sysroot
                           use sysroot as the system root during the build],
   [if test x"$withval" != x ; then
-     SYSROOT_CFLAGS_FOR_TARGET="--sysroot=$withval"
+     # APPLE LOCAL 7852964 Use -isysroot instead of --sysroot.
+     SYSROOT_CFLAGS_FOR_TARGET="-isysroot $withval"
    fi],
   [SYSROOT_CFLAGS_FOR_TARGET=])
 AC_SUBST(SYSROOT_CFLAGS_FOR_TARGET)




From bob.wilson at apple.com  Mon Apr 12 18:49:43 2010
From: bob.wilson at apple.com (Bob Wilson)
Date: Mon, 12 Apr 2010 23:49:43 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r101091 -
	/llvm-gcc-4.2/trunk/configure
Message-ID: <20100412234943.32FAA2A6C12C@llvm.org>

Author: bwilson
Date: Mon Apr 12 18:49:43 2010
New Revision: 101091

URL: http://llvm.org/viewvc/llvm-project?rev=101091&view=rev
Log:
Regenerate configure script.

Modified:
    llvm-gcc-4.2/trunk/configure

Modified: llvm-gcc-4.2/trunk/configure
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/configure?rev=101091&r1=101090&r2=101091&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/configure (original)
+++ llvm-gcc-4.2/trunk/configure Mon Apr 12 18:49:43 2010
@@ -2808,7 +2808,8 @@
 if test "${with_build_sysroot+set}" = set; then
   withval="$with_build_sysroot"
   if test x"$withval" != x ; then
-     SYSROOT_CFLAGS_FOR_TARGET="--sysroot=$withval"
+     # APPLE LOCAL 7852964 Use -isysroot instead of --sysroot.
+     SYSROOT_CFLAGS_FOR_TARGET="-isysroot $withval"
    fi
 else
   SYSROOT_CFLAGS_FOR_TARGET=
@@ -3555,7 +3556,7 @@
 # Extract the first word of "$ac_prog", so it can be a program name with args.
 set dummy $ac_prog; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3559: checking for $ac_word" >&5
+echo "configure:3560: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_YACC'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -3595,7 +3596,7 @@
 # Extract the first word of "$ac_prog", so it can be a program name with args.
 set dummy $ac_prog; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3599: checking for $ac_word" >&5
+echo "configure:3600: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_BISON'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -3634,7 +3635,7 @@
 # Extract the first word of "$ac_prog", so it can be a program name with args.
 set dummy $ac_prog; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3638: checking for $ac_word" >&5
+echo "configure:3639: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_M4'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -3673,7 +3674,7 @@
 # Extract the first word of "$ac_prog", so it can be a program name with args.
 set dummy $ac_prog; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3677: checking for $ac_word" >&5
+echo "configure:3678: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_LEX'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -3713,7 +3714,7 @@
 # Extract the first word of "$ac_prog", so it can be a program name with args.
 set dummy $ac_prog; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3717: checking for $ac_word" >&5
+echo "configure:3718: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_FLEX'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -3752,7 +3753,7 @@
 # Extract the first word of "$ac_prog", so it can be a program name with args.
 set dummy $ac_prog; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3756: checking for $ac_word" >&5
+echo "configure:3757: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_MAKEINFO'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -3805,7 +3806,7 @@
 # Extract the first word of "$ac_prog", so it can be a program name with args.
 set dummy $ac_prog; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3809: checking for $ac_word" >&5
+echo "configure:3810: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_EXPECT'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -3846,7 +3847,7 @@
 # Extract the first word of "$ac_prog", so it can be a program name with args.
 set dummy $ac_prog; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3850: checking for $ac_word" >&5
+echo "configure:3851: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_RUNTEST'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -3894,7 +3895,7 @@
     # Extract the first word of "${ncn_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3898: checking for $ac_word" >&5
+echo "configure:3899: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_AR'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -3925,7 +3926,7 @@
     # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3929: checking for $ac_word" >&5
+echo "configure:3930: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_AR'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -3969,7 +3970,7 @@
     # Extract the first word of "${ncn_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3973: checking for $ac_word" >&5
+echo "configure:3974: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_AS'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4000,7 +4001,7 @@
     # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4004: checking for $ac_word" >&5
+echo "configure:4005: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_AS'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4044,7 +4045,7 @@
     # Extract the first word of "${ncn_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4048: checking for $ac_word" >&5
+echo "configure:4049: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_DLLTOOL'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4075,7 +4076,7 @@
     # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4079: checking for $ac_word" >&5
+echo "configure:4080: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_DLLTOOL'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4119,7 +4120,7 @@
     # Extract the first word of "${ncn_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4123: checking for $ac_word" >&5
+echo "configure:4124: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_LD'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4150,7 +4151,7 @@
     # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4154: checking for $ac_word" >&5
+echo "configure:4155: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_LD'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4194,7 +4195,7 @@
     # Extract the first word of "${ncn_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4198: checking for $ac_word" >&5
+echo "configure:4199: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_LIPO'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4225,7 +4226,7 @@
     # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4229: checking for $ac_word" >&5
+echo "configure:4230: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_LIPO'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4269,7 +4270,7 @@
     # Extract the first word of "${ncn_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4273: checking for $ac_word" >&5
+echo "configure:4274: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_NM'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4300,7 +4301,7 @@
     # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4304: checking for $ac_word" >&5
+echo "configure:4305: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_NM'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4344,7 +4345,7 @@
     # Extract the first word of "${ncn_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4348: checking for $ac_word" >&5
+echo "configure:4349: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4375,7 +4376,7 @@
     # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4379: checking for $ac_word" >&5
+echo "configure:4380: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4414,7 +4415,7 @@
     # Extract the first word of "${ncn_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4418: checking for $ac_word" >&5
+echo "configure:4419: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_STRIP'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4445,7 +4446,7 @@
     # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4449: checking for $ac_word" >&5
+echo "configure:4450: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_STRIP'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4484,7 +4485,7 @@
     # Extract the first word of "${ncn_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4488: checking for $ac_word" >&5
+echo "configure:4489: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_WINDRES'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4515,7 +4516,7 @@
     # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4519: checking for $ac_word" >&5
+echo "configure:4520: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_WINDRES'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4559,7 +4560,7 @@
     # Extract the first word of "${ncn_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4563: checking for $ac_word" >&5
+echo "configure:4564: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_OBJCOPY'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4590,7 +4591,7 @@
     # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4594: checking for $ac_word" >&5
+echo "configure:4595: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_OBJCOPY'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4634,7 +4635,7 @@
     # Extract the first word of "${ncn_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4638: checking for $ac_word" >&5
+echo "configure:4639: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_OBJDUMP'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4665,7 +4666,7 @@
     # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4669: checking for $ac_word" >&5
+echo "configure:4670: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_OBJDUMP'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4729,7 +4730,7 @@
  if test -n "$with_build_time_tools"; then
   for ncn_progname in cc gcc; do
     echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:4733: checking for ${ncn_progname} in $with_build_time_tools" >&5
+echo "configure:4734: checking for ${ncn_progname} in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/${ncn_progname}; then
       ac_cv_prog_CC_FOR_TARGET=$with_build_time_tools/${ncn_progname}
       echo "$ac_t""yes" 1>&6
@@ -4746,7 +4747,7 @@
       # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4750: checking for $ac_word" >&5
+echo "configure:4751: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_CC_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4777,7 +4778,7 @@
       # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4781: checking for $ac_word" >&5
+echo "configure:4782: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_CC_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4822,7 +4823,7 @@
  if test -n "$with_build_time_tools"; then
   for ncn_progname in c++ g++ cxx gxx; do
     echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:4826: checking for ${ncn_progname} in $with_build_time_tools" >&5
+echo "configure:4827: checking for ${ncn_progname} in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/${ncn_progname}; then
       ac_cv_prog_CXX_FOR_TARGET=$with_build_time_tools/${ncn_progname}
       echo "$ac_t""yes" 1>&6
@@ -4839,7 +4840,7 @@
       # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4843: checking for $ac_word" >&5
+echo "configure:4844: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_CXX_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4870,7 +4871,7 @@
       # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4874: checking for $ac_word" >&5
+echo "configure:4875: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_CXX_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4915,7 +4916,7 @@
  if test -n "$with_build_time_tools"; then
   for ncn_progname in gcc; do
     echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:4919: checking for ${ncn_progname} in $with_build_time_tools" >&5
+echo "configure:4920: checking for ${ncn_progname} in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/${ncn_progname}; then
       ac_cv_prog_GCC_FOR_TARGET=$with_build_time_tools/${ncn_progname}
       echo "$ac_t""yes" 1>&6
@@ -4932,7 +4933,7 @@
       # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4936: checking for $ac_word" >&5
+echo "configure:4937: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_GCC_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4963,7 +4964,7 @@
       # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4967: checking for $ac_word" >&5
+echo "configure:4968: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_GCC_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5003,7 +5004,7 @@
  if test -n "$with_build_time_tools"; then
   for ncn_progname in gcj; do
     echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:5007: checking for ${ncn_progname} in $with_build_time_tools" >&5
+echo "configure:5008: checking for ${ncn_progname} in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/${ncn_progname}; then
       ac_cv_prog_GCJ_FOR_TARGET=$with_build_time_tools/${ncn_progname}
       echo "$ac_t""yes" 1>&6
@@ -5020,7 +5021,7 @@
       # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5024: checking for $ac_word" >&5
+echo "configure:5025: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_GCJ_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5051,7 +5052,7 @@
       # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5055: checking for $ac_word" >&5
+echo "configure:5056: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_GCJ_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5096,7 +5097,7 @@
  if test -n "$with_build_time_tools"; then
   for ncn_progname in gfortran; do
     echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:5100: checking for ${ncn_progname} in $with_build_time_tools" >&5
+echo "configure:5101: checking for ${ncn_progname} in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/${ncn_progname}; then
       ac_cv_prog_GFORTRAN_FOR_TARGET=$with_build_time_tools/${ncn_progname}
       echo "$ac_t""yes" 1>&6
@@ -5113,7 +5114,7 @@
       # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5117: checking for $ac_word" >&5
+echo "configure:5118: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_GFORTRAN_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5144,7 +5145,7 @@
       # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5148: checking for $ac_word" >&5
+echo "configure:5149: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_GFORTRAN_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5253,7 +5254,7 @@
 if test -z "$ac_cv_path_AR_FOR_TARGET" ; then
   if test -n "$with_build_time_tools"; then
     echo $ac_n "checking for ar in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:5257: checking for ar in $with_build_time_tools" >&5
+echo "configure:5258: checking for ar in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/ar; then
       AR_FOR_TARGET=`cd $with_build_time_tools && pwd`/ar
       ac_cv_path_AR_FOR_TARGET=$AR_FOR_TARGET
@@ -5271,7 +5272,7 @@
   # Extract the first word of "ar", so it can be a program name with args.
 set dummy ar; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5275: checking for $ac_word" >&5
+echo "configure:5276: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_path_AR_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5308,7 +5309,7 @@
    if test -n "$with_build_time_tools"; then
   for ncn_progname in ar; do
     echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:5312: checking for ${ncn_progname} in $with_build_time_tools" >&5
+echo "configure:5313: checking for ${ncn_progname} in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/${ncn_progname}; then
       ac_cv_prog_AR_FOR_TARGET=$with_build_time_tools/${ncn_progname}
       echo "$ac_t""yes" 1>&6
@@ -5325,7 +5326,7 @@
       # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5329: checking for $ac_word" >&5
+echo "configure:5330: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_AR_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5356,7 +5357,7 @@
       # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5360: checking for $ac_word" >&5
+echo "configure:5361: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_AR_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5408,7 +5409,7 @@
 if test -z "$ac_cv_path_AS_FOR_TARGET" ; then
   if test -n "$with_build_time_tools"; then
     echo $ac_n "checking for as in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:5412: checking for as in $with_build_time_tools" >&5
+echo "configure:5413: checking for as in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/as; then
       AS_FOR_TARGET=`cd $with_build_time_tools && pwd`/as
       ac_cv_path_AS_FOR_TARGET=$AS_FOR_TARGET
@@ -5426,7 +5427,7 @@
   # Extract the first word of "as", so it can be a program name with args.
 set dummy as; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5430: checking for $ac_word" >&5
+echo "configure:5431: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_path_AS_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5463,7 +5464,7 @@
    if test -n "$with_build_time_tools"; then
   for ncn_progname in as; do
     echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:5467: checking for ${ncn_progname} in $with_build_time_tools" >&5
+echo "configure:5468: checking for ${ncn_progname} in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/${ncn_progname}; then
       ac_cv_prog_AS_FOR_TARGET=$with_build_time_tools/${ncn_progname}
       echo "$ac_t""yes" 1>&6
@@ -5480,7 +5481,7 @@
       # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5484: checking for $ac_word" >&5
+echo "configure:5485: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_AS_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5511,7 +5512,7 @@
       # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5515: checking for $ac_word" >&5
+echo "configure:5516: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_AS_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5563,7 +5564,7 @@
 if test -z "$ac_cv_path_DLLTOOL_FOR_TARGET" ; then
   if test -n "$with_build_time_tools"; then
     echo $ac_n "checking for dlltool in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:5567: checking for dlltool in $with_build_time_tools" >&5
+echo "configure:5568: checking for dlltool in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/dlltool; then
       DLLTOOL_FOR_TARGET=`cd $with_build_time_tools && pwd`/dlltool
       ac_cv_path_DLLTOOL_FOR_TARGET=$DLLTOOL_FOR_TARGET
@@ -5581,7 +5582,7 @@
   # Extract the first word of "dlltool", so it can be a program name with args.
 set dummy dlltool; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5585: checking for $ac_word" >&5
+echo "configure:5586: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_path_DLLTOOL_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5618,7 +5619,7 @@
    if test -n "$with_build_time_tools"; then
   for ncn_progname in dlltool; do
     echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:5622: checking for ${ncn_progname} in $with_build_time_tools" >&5
+echo "configure:5623: checking for ${ncn_progname} in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/${ncn_progname}; then
       ac_cv_prog_DLLTOOL_FOR_TARGET=$with_build_time_tools/${ncn_progname}
       echo "$ac_t""yes" 1>&6
@@ -5635,7 +5636,7 @@
       # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5639: checking for $ac_word" >&5
+echo "configure:5640: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_DLLTOOL_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5666,7 +5667,7 @@
       # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5670: checking for $ac_word" >&5
+echo "configure:5671: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_DLLTOOL_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5718,7 +5719,7 @@
 if test -z "$ac_cv_path_LD_FOR_TARGET" ; then
   if test -n "$with_build_time_tools"; then
     echo $ac_n "checking for ld in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:5722: checking for ld in $with_build_time_tools" >&5
+echo "configure:5723: checking for ld in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/ld; then
       LD_FOR_TARGET=`cd $with_build_time_tools && pwd`/ld
       ac_cv_path_LD_FOR_TARGET=$LD_FOR_TARGET
@@ -5736,7 +5737,7 @@
   # Extract the first word of "ld", so it can be a program name with args.
 set dummy ld; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5740: checking for $ac_word" >&5
+echo "configure:5741: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_path_LD_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5773,7 +5774,7 @@
    if test -n "$with_build_time_tools"; then
   for ncn_progname in ld; do
     echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:5777: checking for ${ncn_progname} in $with_build_time_tools" >&5
+echo "configure:5778: checking for ${ncn_progname} in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/${ncn_progname}; then
       ac_cv_prog_LD_FOR_TARGET=$with_build_time_tools/${ncn_progname}
       echo "$ac_t""yes" 1>&6
@@ -5790,7 +5791,7 @@
       # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5794: checking for $ac_word" >&5
+echo "configure:5795: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_LD_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5821,7 +5822,7 @@
       # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5825: checking for $ac_word" >&5
+echo "configure:5826: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_LD_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5873,7 +5874,7 @@
 if test -z "$ac_cv_path_LIPO_FOR_TARGET" ; then
   if test -n "$with_build_time_tools"; then
     echo $ac_n "checking for lipo in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:5877: checking for lipo in $with_build_time_tools" >&5
+echo "configure:5878: checking for lipo in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/lipo; then
       LIPO_FOR_TARGET=`cd $with_build_time_tools && pwd`/lipo
       ac_cv_path_LIPO_FOR_TARGET=$LIPO_FOR_TARGET
@@ -5891,7 +5892,7 @@
   # Extract the first word of "lipo", so it can be a program name with args.
 set dummy lipo; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5895: checking for $ac_word" >&5
+echo "configure:5896: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_path_LIPO_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5928,7 +5929,7 @@
    if test -n "$with_build_time_tools"; then
   for ncn_progname in lipo; do
     echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:5932: checking for ${ncn_progname} in $with_build_time_tools" >&5
+echo "configure:5933: checking for ${ncn_progname} in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/${ncn_progname}; then
       ac_cv_prog_LIPO_FOR_TARGET=$with_build_time_tools/${ncn_progname}
       echo "$ac_t""yes" 1>&6
@@ -5945,7 +5946,7 @@
       # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5949: checking for $ac_word" >&5
+echo "configure:5950: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_LIPO_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5976,7 +5977,7 @@
       # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5980: checking for $ac_word" >&5
+echo "configure:5981: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_LIPO_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6028,7 +6029,7 @@
 if test -z "$ac_cv_path_NM_FOR_TARGET" ; then
   if test -n "$with_build_time_tools"; then
     echo $ac_n "checking for nm in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:6032: checking for nm in $with_build_time_tools" >&5
+echo "configure:6033: checking for nm in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/nm; then
       NM_FOR_TARGET=`cd $with_build_time_tools && pwd`/nm
       ac_cv_path_NM_FOR_TARGET=$NM_FOR_TARGET
@@ -6046,7 +6047,7 @@
   # Extract the first word of "nm", so it can be a program name with args.
 set dummy nm; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:6050: checking for $ac_word" >&5
+echo "configure:6051: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_path_NM_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6083,7 +6084,7 @@
    if test -n "$with_build_time_tools"; then
   for ncn_progname in nm; do
     echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:6087: checking for ${ncn_progname} in $with_build_time_tools" >&5
+echo "configure:6088: checking for ${ncn_progname} in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/${ncn_progname}; then
       ac_cv_prog_NM_FOR_TARGET=$with_build_time_tools/${ncn_progname}
       echo "$ac_t""yes" 1>&6
@@ -6100,7 +6101,7 @@
       # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:6104: checking for $ac_word" >&5
+echo "configure:6105: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_NM_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6131,7 +6132,7 @@
       # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:6135: checking for $ac_word" >&5
+echo "configure:6136: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_NM_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6183,7 +6184,7 @@
 if test -z "$ac_cv_path_OBJDUMP_FOR_TARGET" ; then
   if test -n "$with_build_time_tools"; then
     echo $ac_n "checking for objdump in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:6187: checking for objdump in $with_build_time_tools" >&5
+echo "configure:6188: checking for objdump in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/objdump; then
       OBJDUMP_FOR_TARGET=`cd $with_build_time_tools && pwd`/objdump
       ac_cv_path_OBJDUMP_FOR_TARGET=$OBJDUMP_FOR_TARGET
@@ -6201,7 +6202,7 @@
   # Extract the first word of "objdump", so it can be a program name with args.
 set dummy objdump; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:6205: checking for $ac_word" >&5
+echo "configure:6206: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_path_OBJDUMP_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6238,7 +6239,7 @@
    if test -n "$with_build_time_tools"; then
   for ncn_progname in objdump; do
     echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:6242: checking for ${ncn_progname} in $with_build_time_tools" >&5
+echo "configure:6243: checking for ${ncn_progname} in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/${ncn_progname}; then
       ac_cv_prog_OBJDUMP_FOR_TARGET=$with_build_time_tools/${ncn_progname}
       echo "$ac_t""yes" 1>&6
@@ -6255,7 +6256,7 @@
       # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:6259: checking for $ac_word" >&5
+echo "configure:6260: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_OBJDUMP_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6286,7 +6287,7 @@
       # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:6290: checking for $ac_word" >&5
+echo "configure:6291: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_OBJDUMP_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6338,7 +6339,7 @@
 if test -z "$ac_cv_path_RANLIB_FOR_TARGET" ; then
   if test -n "$with_build_time_tools"; then
     echo $ac_n "checking for ranlib in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:6342: checking for ranlib in $with_build_time_tools" >&5
+echo "configure:6343: checking for ranlib in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/ranlib; then
       RANLIB_FOR_TARGET=`cd $with_build_time_tools && pwd`/ranlib
       ac_cv_path_RANLIB_FOR_TARGET=$RANLIB_FOR_TARGET
@@ -6356,7 +6357,7 @@
   # Extract the first word of "ranlib", so it can be a program name with args.
 set dummy ranlib; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:6360: checking for $ac_word" >&5
+echo "configure:6361: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_path_RANLIB_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6393,7 +6394,7 @@
    if test -n "$with_build_time_tools"; then
   for ncn_progname in ranlib; do
     echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:6397: checking for ${ncn_progname} in $with_build_time_tools" >&5
+echo "configure:6398: checking for ${ncn_progname} in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/${ncn_progname}; then
       ac_cv_prog_RANLIB_FOR_TARGET=$with_build_time_tools/${ncn_progname}
       echo "$ac_t""yes" 1>&6
@@ -6410,7 +6411,7 @@
       # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:6414: checking for $ac_word" >&5
+echo "configure:6415: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_RANLIB_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6441,7 +6442,7 @@
       # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:6445: checking for $ac_word" >&5
+echo "configure:6446: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_RANLIB_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6493,7 +6494,7 @@
 if test -z "$ac_cv_path_STRIP_FOR_TARGET" ; then
   if test -n "$with_build_time_tools"; then
     echo $ac_n "checking for strip in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:6497: checking for strip in $with_build_time_tools" >&5
+echo "configure:6498: checking for strip in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/strip; then
       STRIP_FOR_TARGET=`cd $with_build_time_tools && pwd`/strip
       ac_cv_path_STRIP_FOR_TARGET=$STRIP_FOR_TARGET
@@ -6511,7 +6512,7 @@
   # Extract the first word of "strip", so it can be a program name with args.
 set dummy strip; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:6515: checking for $ac_word" >&5
+echo "configure:6516: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_path_STRIP_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6548,7 +6549,7 @@
    if test -n "$with_build_time_tools"; then
   for ncn_progname in strip; do
     echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:6552: checking for ${ncn_progname} in $with_build_time_tools" >&5
+echo "configure:6553: checking for ${ncn_progname} in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/${ncn_progname}; then
       ac_cv_prog_STRIP_FOR_TARGET=$with_build_time_tools/${ncn_progname}
       echo "$ac_t""yes" 1>&6
@@ -6565,7 +6566,7 @@
       # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:6569: checking for $ac_word" >&5
+echo "configure:6570: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_STRIP_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6596,7 +6597,7 @@
       # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:6600: checking for $ac_word" >&5
+echo "configure:6601: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_STRIP_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6648,7 +6649,7 @@
 if test -z "$ac_cv_path_WINDRES_FOR_TARGET" ; then
   if test -n "$with_build_time_tools"; then
     echo $ac_n "checking for windres in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:6652: checking for windres in $with_build_time_tools" >&5
+echo "configure:6653: checking for windres in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/windres; then
       WINDRES_FOR_TARGET=`cd $with_build_time_tools && pwd`/windres
       ac_cv_path_WINDRES_FOR_TARGET=$WINDRES_FOR_TARGET
@@ -6666,7 +6667,7 @@
   # Extract the first word of "windres", so it can be a program name with args.
 set dummy windres; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:6670: checking for $ac_word" >&5
+echo "configure:6671: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_path_WINDRES_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6703,7 +6704,7 @@
    if test -n "$with_build_time_tools"; then
   for ncn_progname in windres; do
     echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:6707: checking for ${ncn_progname} in $with_build_time_tools" >&5
+echo "configure:6708: checking for ${ncn_progname} in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/${ncn_progname}; then
       ac_cv_prog_WINDRES_FOR_TARGET=$with_build_time_tools/${ncn_progname}
       echo "$ac_t""yes" 1>&6
@@ -6720,7 +6721,7 @@
       # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:6724: checking for $ac_word" >&5
+echo "configure:6725: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_WINDRES_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6751,7 +6752,7 @@
       # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:6755: checking for $ac_word" >&5
+echo "configure:6756: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_WINDRES_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6801,7 +6802,7 @@
 RAW_CXX_FOR_TARGET="$CXX_FOR_TARGET"
 
 echo $ac_n "checking where to find the target ar""... $ac_c" 1>&6
-echo "configure:6805: checking where to find the target ar" >&5
+echo "configure:6806: checking where to find the target ar" >&5
 if test "x${build}" != "x${host}" ; then
   if expr "x$AR_FOR_TARGET" : "x/" > /dev/null; then
     # We already found the complete path
@@ -6834,7 +6835,7 @@
   fi
 fi
 echo $ac_n "checking where to find the target as""... $ac_c" 1>&6
-echo "configure:6838: checking where to find the target as" >&5
+echo "configure:6839: checking where to find the target as" >&5
 if test "x${build}" != "x${host}" ; then
   if expr "x$AS_FOR_TARGET" : "x/" > /dev/null; then
     # We already found the complete path
@@ -6867,7 +6868,7 @@
   fi
 fi
 echo $ac_n "checking where to find the target cc""... $ac_c" 1>&6
-echo "configure:6871: checking where to find the target cc" >&5
+echo "configure:6872: checking where to find the target cc" >&5
 if test "x${build}" != "x${host}" ; then
   if expr "x$CC_FOR_TARGET" : "x/" > /dev/null; then
     # We already found the complete path
@@ -6900,7 +6901,7 @@
   fi
 fi
 echo $ac_n "checking where to find the target c++""... $ac_c" 1>&6
-echo "configure:6904: checking where to find the target c++" >&5
+echo "configure:6905: checking where to find the target c++" >&5
 if test "x${build}" != "x${host}" ; then
   if expr "x$CXX_FOR_TARGET" : "x/" > /dev/null; then
     # We already found the complete path
@@ -6936,7 +6937,7 @@
   fi
 fi
 echo $ac_n "checking where to find the target c++ for libstdc++""... $ac_c" 1>&6
-echo "configure:6940: checking where to find the target c++ for libstdc++" >&5
+echo "configure:6941: checking where to find the target c++ for libstdc++" >&5
 if test "x${build}" != "x${host}" ; then
   if expr "x$RAW_CXX_FOR_TARGET" : "x/" > /dev/null; then
     # We already found the complete path
@@ -6972,7 +6973,7 @@
   fi
 fi
 echo $ac_n "checking where to find the target dlltool""... $ac_c" 1>&6
-echo "configure:6976: checking where to find the target dlltool" >&5
+echo "configure:6977: checking where to find the target dlltool" >&5
 if test "x${build}" != "x${host}" ; then
   if expr "x$DLLTOOL_FOR_TARGET" : "x/" > /dev/null; then
     # We already found the complete path
@@ -7005,7 +7006,7 @@
   fi
 fi
 echo $ac_n "checking where to find the target gcc""... $ac_c" 1>&6
-echo "configure:7009: checking where to find the target gcc" >&5
+echo "configure:7010: checking where to find the target gcc" >&5
 if test "x${build}" != "x${host}" ; then
   if expr "x$GCC_FOR_TARGET" : "x/" > /dev/null; then
     # We already found the complete path
@@ -7038,7 +7039,7 @@
   fi
 fi
 echo $ac_n "checking where to find the target gcj""... $ac_c" 1>&6
-echo "configure:7042: checking where to find the target gcj" >&5
+echo "configure:7043: checking where to find the target gcj" >&5
 if test "x${build}" != "x${host}" ; then
   if expr "x$GCJ_FOR_TARGET" : "x/" > /dev/null; then
     # We already found the complete path
@@ -7074,7 +7075,7 @@
   fi
 fi
 echo $ac_n "checking where to find the target gfortran""... $ac_c" 1>&6
-echo "configure:7078: checking where to find the target gfortran" >&5
+echo "configure:7079: checking where to find the target gfortran" >&5
 if test "x${build}" != "x${host}" ; then
   if expr "x$GFORTRAN_FOR_TARGET" : "x/" > /dev/null; then
     # We already found the complete path
@@ -7110,7 +7111,7 @@
   fi
 fi
 echo $ac_n "checking where to find the target ld""... $ac_c" 1>&6
-echo "configure:7114: checking where to find the target ld" >&5
+echo "configure:7115: checking where to find the target ld" >&5
 if test "x${build}" != "x${host}" ; then
   if expr "x$LD_FOR_TARGET" : "x/" > /dev/null; then
     # We already found the complete path
@@ -7143,7 +7144,7 @@
   fi
 fi
 echo $ac_n "checking where to find the target lipo""... $ac_c" 1>&6
-echo "configure:7147: checking where to find the target lipo" >&5
+echo "configure:7148: checking where to find the target lipo" >&5
 if test "x${build}" != "x${host}" ; then
   if expr "x$LIPO_FOR_TARGET" : "x/" > /dev/null; then
     # We already found the complete path
@@ -7166,7 +7167,7 @@
   fi
 fi
 echo $ac_n "checking where to find the target nm""... $ac_c" 1>&6
-echo "configure:7170: checking where to find the target nm" >&5
+echo "configure:7171: checking where to find the target nm" >&5
 if test "x${build}" != "x${host}" ; then
   if expr "x$NM_FOR_TARGET" : "x/" > /dev/null; then
     # We already found the complete path
@@ -7199,7 +7200,7 @@
   fi
 fi
 echo $ac_n "checking where to find the target objdump""... $ac_c" 1>&6
-echo "configure:7203: checking where to find the target objdump" >&5
+echo "configure:7204: checking where to find the target objdump" >&5
 if test "x${build}" != "x${host}" ; then
   if expr "x$OBJDUMP_FOR_TARGET" : "x/" > /dev/null; then
     # We already found the complete path
@@ -7232,7 +7233,7 @@
   fi
 fi
 echo $ac_n "checking where to find the target ranlib""... $ac_c" 1>&6
-echo "configure:7236: checking where to find the target ranlib" >&5
+echo "configure:7237: checking where to find the target ranlib" >&5
 if test "x${build}" != "x${host}" ; then
   if expr "x$RANLIB_FOR_TARGET" : "x/" > /dev/null; then
     # We already found the complete path
@@ -7265,7 +7266,7 @@
   fi
 fi
 echo $ac_n "checking where to find the target strip""... $ac_c" 1>&6
-echo "configure:7269: checking where to find the target strip" >&5
+echo "configure:7270: checking where to find the target strip" >&5
 if test "x${build}" != "x${host}" ; then
   if expr "x$STRIP_FOR_TARGET" : "x/" > /dev/null; then
     # We already found the complete path
@@ -7298,7 +7299,7 @@
   fi
 fi
 echo $ac_n "checking where to find the target windres""... $ac_c" 1>&6
-echo "configure:7302: checking where to find the target windres" >&5
+echo "configure:7303: checking where to find the target windres" >&5
 if test "x${build}" != "x${host}" ; then
   if expr "x$WINDRES_FOR_TARGET" : "x/" > /dev/null; then
     # We already found the complete path
@@ -7359,7 +7360,7 @@
 
 
 echo $ac_n "checking whether to enable maintainer-specific portions of Makefiles""... $ac_c" 1>&6
-echo "configure:7363: checking whether to enable maintainer-specific portions of Makefiles" >&5
+echo "configure:7364: checking whether to enable maintainer-specific portions of Makefiles" >&5
 # Check whether --enable-maintainer-mode or --disable-maintainer-mode was given.
 if test "${enable_maintainer_mode+set}" = set; then
   enableval="$enable_maintainer_mode"
@@ -7410,9 +7411,9 @@
   # Pass -fkeep-inline-functions for stage 1 if the GCC version supports it.
   CFLAGS="$CFLAGS -fkeep-inline-functions"
   echo $ac_n "checking whether -fkeep-inline-functions is supported""... $ac_c" 1>&6
-echo "configure:7414: checking whether -fkeep-inline-functions is supported" >&5
+echo "configure:7415: checking whether -fkeep-inline-functions is supported" >&5
   cat > conftest.$ac_ext <<EOF
-#line 7416 "configure"
+#line 7417 "configure"
 #include "confdefs.h"
 
 #if (__GNUC__ < 3) \
@@ -7425,7 +7426,7 @@
 
 ; return 0; }
 EOF
-if { (eval echo configure:7429: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:7430: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
   rm -rf conftest*
   echo "$ac_t""yes" 1>&6; stage1_cflags="$stage1_cflags -fkeep-inline-functions"
 else




From scallanan at apple.com  Mon Apr 12 18:55:28 2010
From: scallanan at apple.com (Sean Callanan)
Date: Mon, 12 Apr 2010 23:55:28 -0000
Subject: [llvm-commits] [llvm] r101095 - /llvm/trunk/tools/Makefile
Message-ID: <20100412235528.D3D402A6C12C@llvm.org>

Author: spyffe
Date: Mon Apr 12 18:55:28 2010
New Revision: 101095

URL: http://llvm.org/viewvc/llvm-project?rev=101095&view=rev
Log:
Build system fix to make llvm-mc properly build
after edis.  Really, there ought to be some
mechanism to ensure that PARALLEL_DIRS get built
after DIRS.

Modified:
    llvm/trunk/tools/Makefile

Modified: llvm/trunk/tools/Makefile
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/Makefile?rev=101095&r1=101094&r2=101095&view=diff
==============================================================================
--- llvm/trunk/tools/Makefile (original)
+++ llvm/trunk/tools/Makefile Mon Apr 12 18:55:28 2010
@@ -18,13 +18,13 @@
 
 # libEnhancedDisassembly must be built ahead of llvm-mc
 # because llvm-mc links against libEnhancedDisassembly
-DIRS := llvm-config edis
+DIRS := llvm-config edis llvm-mc
 PARALLEL_DIRS := opt llvm-as llvm-dis \
                  llc llvm-ranlib llvm-ar llvm-nm \
                  llvm-ld llvm-prof llvm-link \
                  lli llvm-extract \
                  bugpoint llvm-bcanalyzer llvm-stub \
-                 llvm-mc llvmc
+                 llvmc
 
 # Let users override the set of tools to build from the command line.
 ifdef ONLY_TOOLS




From clattner at apple.com  Mon Apr 12 19:18:48 2010
From: clattner at apple.com (Chris Lattner)
Date: Mon, 12 Apr 2010 17:18:48 -0700
Subject: [llvm-commits] [llvm] r101075 - in /llvm/trunk:
	lib/Target/X86/X86InstrInfo.cpp test/CodeGen/X86/brcond.ll
In-Reply-To: <1670CEA8-B035-4FCA-B5A6-549664FC826C@apple.com>
References: <20100412221957.EBF8A2A6C12C@llvm.org>
	<000E7360-B5FF-460E-80EF-F8A69D74C0DF@apple.com>
	<26E362DF-1C47-4A0C-B259-0A6AFC5E5B37@apple.com>
	<FCDEA618-97D0-457D-AB36-E695A89C0D62@apple.com>
	<1670CEA8-B035-4FCA-B5A6-549664FC826C@apple.com>
Message-ID: <C39AC7F0-E69E-491F-A65E-FE5CFC9ED74E@apple.com>

>>>  // If the prior block branches here on true and somewhere else on false, and
>>>  // if the branch condition is reversible, reverse the branch to create a
>>>  // fall-through.
>>>  if (PriorTBB == MBB) {
>>>    SmallVector<MachineOperand, 4> NewPriorCond(PriorCond);
>>>    if (!TII->ReverseBranchCondition(NewPriorCond)) {
>>>      TII->RemoveBranch(PrevBB);
>>>      TII->InsertBranch(PrevBB, PriorFBB, 0, NewPriorCond);
>>>      MadeChange = true;
>>>      ++NumBranchOpts;
>>>      goto ReoptimizeBlock;
>>>    }
>>>  }
>>> 
>>> Why doesn't it work in this case?
>> 
>> I was curious too. CodeGenPrepare has split a critical edge for a PHI
>> node, however after register allocation it turns out that no copy was
>> needed, so the jmp is actually in a separate basic block from the
>> jne, jp.
> 
> 
> In that case, branch folding should be removing the block that consists of only an unconditional branch:
> 
>      // If this block is just an unconditional branch to CurTBB, we can
>      // usually completely eliminate the block.  The only case we cannot
>      // completely eliminate the block is when the block before this one
>      // falls through into MBB and we can't understand the prior block's branch
>      // condition.
>      if (MBB->empty()) {
>         <too long to quote, but appears to do what the comment says>
> 
> so why doesn't *that* work?
> 

I think that answering these questions (and fixing the problem) is a much better idea than hacking the X86 backend to handle one specific case of this.

-Chris


From bob.wilson at apple.com  Mon Apr 12 19:25:41 2010
From: bob.wilson at apple.com (Bob Wilson)
Date: Mon, 12 Apr 2010 17:25:41 -0700
Subject: [llvm-commits] [llvm] r101053 - in /llvm/trunk:
	lib/Target/ARM/ARMAddressingModes.h
	lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
	test/MC/Disassembler/arm-tests.txt
In-Reply-To: <20100412184654.1702E2A6C12C@llvm.org>
References: <20100412184654.1702E2A6C12C@llvm.org>
Message-ID: <2906E7A5-0DAC-4061-9F22-5AC4A480815F@apple.com>

This is working around a problem in getSOImmValRotate().  I'm going to try to fix that problem and then this change won't be needed.

On Apr 12, 2010, at 11:46 AM, Johnny Chen wrote:

> Author: johnny
> Date: Mon Apr 12 13:46:53 2010
> New Revision: 101053
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=101053&view=rev
> Log:
> Fixed a crasher in arm disassembler within ARMInstPrinter.cpp after calling
> ARM_AM::getSoImmVal(V) with a legitimate so_imm value: #245 rotate right by 2.
> Introduce ARM_AM::getSOImmValOneOrNoRotate(unsigned Arg) which is called from
> ARMInstPrinter.cpp's printSOImm() function, replacing ARM_AM::getSOImmVal(V).
> 
> [12:44:43] johnny:/Volumes/data/llvm/git/trunk (local-trunk) $ gdb Debug/bin/llvm-mc
> GNU gdb 6.3.50-20050815 (Apple version gdb-1346) (Fri Sep 18 20:40:51 UTC 2009)
> Copyright 2004 Free Software Foundation, Inc.
> GDB is free software, covered by the GNU General Public License, and you are
> welcome to change it and/or distribute copies of it under certain conditions.
> Type "show copying" to see the conditions.
> There is absolutely no warranty for GDB.  Type "show warranty" for details.
> This GDB was configured as "x86_64-apple-darwin"...Reading symbols for shared libraries ... done
> 
> (gdb) set args  -triple=arm-apple-darwin9 -debug-only=arm-disassembler --disassemble
> (gdb) r
> Starting program: /Volumes/data/llvm/git/trunk/Debug/bin/llvm-mc -triple=arm-apple-darwin9 -debug-only=arm-disassembler --disassemble
> Reading symbols for shared libraries ++. done
> 0xf5 0x71 0xf0 0x53
> Opcode=201 Name=MVNi Format=ARM_FORMAT_DPFRM(4)
> 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
> -------------------------------------------------------------------------------------------------
> | 0: 1: 0: 1| 0: 0: 1: 1| 1: 1: 1: 1| 0: 0: 0: 0| 0: 1: 1: 1| 0: 0: 0: 1| 1: 1: 1: 1| 0: 1: 0: 1|
> -------------------------------------------------------------------------------------------------
> 
> 	mvnpls	r7, Assertion failed: (V != -1 && "Not a valid so_imm value!"), function printSOImm, file ARMInstPrinter.cpp, line 229.
> 
> Program received signal SIGABRT, Aborted.
> 0x00007fff88c65886 in __kill ()
> (gdb) bt
> #0  0x00007fff88c65886 in __kill ()
> #1  0x00007fff88d05eae in abort ()
> #2  0x00007fff88cf2ef0 in __assert_rtn ()
> #3  0x000000010020e422 in printSOImm (O=@0x1010bdf80, V=-1, VerboseAsm=false, MAI=0x1020106d0) at ARMInstPrinter.cpp:229
> #4  0x000000010020e5fe in llvm::ARMInstPrinter::printSOImmOperand (this=0x1020107e0, MI=0x7fff5fbfee70, OpNum=1, O=@0x1010bdf80) at ARMInstPrinter.cpp:254
> #5  0x00000001001ffbc0 in llvm::ARMInstPrinter::printInstruction (this=0x1020107e0, MI=0x7fff5fbfee70, O=@0x1010bdf80) at ARMGenAsmWriter.inc:3236
> #6  0x000000010020c27c in llvm::ARMInstPrinter::printInst (this=0x1020107e0, MI=0x7fff5fbfee70, O=@0x1010bdf80) at ARMInstPrinter.cpp:182
> #7  0x000000010003cbff in PrintInsts (DisAsm=@0x10200f4e0, Printer=@0x1020107e0, Bytes=@0x7fff5fbff060, SM=@0x7fff5fbff078) at Disassembler.cpp:65
> #8  0x000000010003c8b4 in llvm::Disassembler::disassemble (T=@0x1010c13c0, Triple=@0x1010b6798, Buffer=@0x102010690) at Disassembler.cpp:153
> #9  0x000000010004095c in DisassembleInput (ProgName=0x7fff5fbff3f0 "/Volumes/data/llvm/git/trunk/Debug/bin/llvm-mc") at llvm-mc.cpp:347
> #10 0x000000010003eefb in main (argc=4, argv=0x7fff5fbff298) at llvm-mc.cpp:374
> (gdb) q
> The program is running.  Exit anyway? (y or n) y
> [13:36:26] johnny:/Volumes/data/llvm/git/trunk (local-trunk) $ 
> 
> Modified:
>    llvm/trunk/lib/Target/ARM/ARMAddressingModes.h
>    llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
>    llvm/trunk/test/MC/Disassembler/arm-tests.txt
> 
> Modified: llvm/trunk/lib/Target/ARM/ARMAddressingModes.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAddressingModes.h?rev=101053&r1=101052&r2=101053&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMAddressingModes.h (original)
> +++ llvm/trunk/lib/Target/ARM/ARMAddressingModes.h Mon Apr 12 13:46:53 2010
> @@ -193,6 +193,43 @@
>     return rotl32(Arg, RotAmt) | ((RotAmt>>1) << 8);
>   }
> 
> +  /// getSOImmValOneRotate - Try to handle Imm with an immediate shifter
> +  /// operand, computing the rotate amount to use.  If this immediate value
> +  /// cannot be handled with a single shifter-op, return 0.
> +  static unsigned getSOImmValOneRotate(unsigned Imm) {
> +    // A5.2.4 Constants with multiple encodings
> +    // The lowest unsigned value of rotation wins!
> +    for (unsigned R = 1; R <= 15; ++R)
> +      if ((Imm & rotr32(~255U, 2*R)) == 0)
> +        return 2*R;
> +
> +    // Failed to find a suitable rotate amount.
> +    return 0;
> +  }
> +
> +  /// getSOImmValOneOrNoRotate - Given a 32-bit immediate, if it is something
> +  /// that can fit into a shifter_operand immediate operand, return the 12-bit
> +  /// encoding for it.  If not, return -1.  This is different from getSOImmVal()
> +  /// in that getSOImmVal() is used during codegen, for example,
> +  /// rewriteARMFrameIndex() where return value of -1 is not considered fatal.
> +  ///
> +  /// The current consumer of this API is printSOImm() within ARMInstPrinter.cpp
> +  /// where return value of -1 indicates that the Arg is not a valid so_imm val!
> +  static inline int getSOImmValOneOrNoRotate(unsigned Arg) {
> +    // 8-bit (or less) immediates are trivially shifter_operands with a rotate
> +    // of zero.
> +    if ((Arg & ~255U) == 0) return Arg;
> +
> +    unsigned RotAmt = getSOImmValOneRotate(Arg);
> +
> +    // If this cannot be handled with a single shifter_op, bail out.
> +    if (rotr32(~255U, RotAmt) & Arg)
> +      return -1;
> +
> +    // Encode this correctly.
> +    return rotl32(Arg, RotAmt) | ((RotAmt>>1) << 8);
> +  }
> +
>   /// isSOImmTwoPartVal - Return true if the specified value can be obtained by
>   /// or'ing together two SOImmVal's.
>   static inline bool isSOImmTwoPartVal(unsigned V) {
> 
> Modified: llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp?rev=101053&r1=101052&r2=101053&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp Mon Apr 12 13:46:53 2010
> @@ -225,7 +225,7 @@
> static void printSOImm(raw_ostream &O, int64_t V, bool VerboseAsm,
>                        const MCAsmInfo *MAI) {
>   // Break it up into two parts that make up a shifter immediate.
> -  V = ARM_AM::getSOImmVal(V);
> +  V = ARM_AM::getSOImmValOneOrNoRotate(V);
>   assert(V != -1 && "Not a valid so_imm value!");
> 
>   unsigned Imm = ARM_AM::getSOImmValImm(V);
> 
> Modified: llvm/trunk/test/MC/Disassembler/arm-tests.txt
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/arm-tests.txt?rev=101053&r1=101052&r2=101053&view=diff
> ==============================================================================
> --- llvm/trunk/test/MC/Disassembler/arm-tests.txt (original)
> +++ llvm/trunk/test/MC/Disassembler/arm-tests.txt Mon Apr 12 13:46:53 2010
> @@ -27,6 +27,9 @@
> # CHECK:	movt	r8, #65535
> 0xff 0x8f 0x4f 0xe3
> 
> +# CHECK:	mvnpls	r7, #245, 2
> +0xf5 0x71 0xf0 0x53
> +
> # CHECK:	pkhbt	r8, r9, r10, lsl #4
> 0x1a 0x82 0x89 0xe6
> 
> 
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits




From johnny.chen at apple.com  Mon Apr 12 19:26:36 2010
From: johnny.chen at apple.com (Johnny Chen)
Date: Mon, 12 Apr 2010 17:26:36 -0700
Subject: [llvm-commits] [llvm] r101053 - in /llvm/trunk:
	lib/Target/ARM/ARMAddressingModes.h
	lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
	test/MC/Disassembler/arm-tests.txt
In-Reply-To: <2906E7A5-0DAC-4061-9F22-5AC4A480815F@apple.com>
References: <20100412184654.1702E2A6C12C@llvm.org>
	<2906E7A5-0DAC-4061-9F22-5AC4A480815F@apple.com>
Message-ID: <A6C74FF0-C0D9-420F-AADB-399276CDD39A@apple.com>

Thanks, Bob!
You know the codegen path better.... :-)

On Apr 12, 2010, at 5:25 PM, Bob Wilson wrote:

> This is working around a problem in getSOImmValRotate().  I'm going to try to fix that problem and then this change won't be needed.
> 
> On Apr 12, 2010, at 11:46 AM, Johnny Chen wrote:
> 
>> Author: johnny
>> Date: Mon Apr 12 13:46:53 2010
>> New Revision: 101053
>> 
>> URL: http://llvm.org/viewvc/llvm-project?rev=101053&view=rev
>> Log:
>> Fixed a crasher in arm disassembler within ARMInstPrinter.cpp after calling
>> ARM_AM::getSoImmVal(V) with a legitimate so_imm value: #245 rotate right by 2.
>> Introduce ARM_AM::getSOImmValOneOrNoRotate(unsigned Arg) which is called from
>> ARMInstPrinter.cpp's printSOImm() function, replacing ARM_AM::getSOImmVal(V).
>> 
>> [12:44:43] johnny:/Volumes/data/llvm/git/trunk (local-trunk) $ gdb Debug/bin/llvm-mc
>> GNU gdb 6.3.50-20050815 (Apple version gdb-1346) (Fri Sep 18 20:40:51 UTC 2009)
>> Copyright 2004 Free Software Foundation, Inc.
>> GDB is free software, covered by the GNU General Public License, and you are
>> welcome to change it and/or distribute copies of it under certain conditions.
>> Type "show copying" to see the conditions.
>> There is absolutely no warranty for GDB.  Type "show warranty" for details.
>> This GDB was configured as "x86_64-apple-darwin"...Reading symbols for shared libraries ... done
>> 
>> (gdb) set args  -triple=arm-apple-darwin9 -debug-only=arm-disassembler --disassemble
>> (gdb) r
>> Starting program: /Volumes/data/llvm/git/trunk/Debug/bin/llvm-mc -triple=arm-apple-darwin9 -debug-only=arm-disassembler --disassemble
>> Reading symbols for shared libraries ++. done
>> 0xf5 0x71 0xf0 0x53
>> Opcode=201 Name=MVNi Format=ARM_FORMAT_DPFRM(4)
>> 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
>> -------------------------------------------------------------------------------------------------
>> | 0: 1: 0: 1| 0: 0: 1: 1| 1: 1: 1: 1| 0: 0: 0: 0| 0: 1: 1: 1| 0: 0: 0: 1| 1: 1: 1: 1| 0: 1: 0: 1|
>> -------------------------------------------------------------------------------------------------
>> 
>> 	mvnpls	r7, Assertion failed: (V != -1 && "Not a valid so_imm value!"), function printSOImm, file ARMInstPrinter.cpp, line 229.
>> 
>> Program received signal SIGABRT, Aborted.
>> 0x00007fff88c65886 in __kill ()
>> (gdb) bt
>> #0  0x00007fff88c65886 in __kill ()
>> #1  0x00007fff88d05eae in abort ()
>> #2  0x00007fff88cf2ef0 in __assert_rtn ()
>> #3  0x000000010020e422 in printSOImm (O=@0x1010bdf80, V=-1, VerboseAsm=false, MAI=0x1020106d0) at ARMInstPrinter.cpp:229
>> #4  0x000000010020e5fe in llvm::ARMInstPrinter::printSOImmOperand (this=0x1020107e0, MI=0x7fff5fbfee70, OpNum=1, O=@0x1010bdf80) at ARMInstPrinter.cpp:254
>> #5  0x00000001001ffbc0 in llvm::ARMInstPrinter::printInstruction (this=0x1020107e0, MI=0x7fff5fbfee70, O=@0x1010bdf80) at ARMGenAsmWriter.inc:3236
>> #6  0x000000010020c27c in llvm::ARMInstPrinter::printInst (this=0x1020107e0, MI=0x7fff5fbfee70, O=@0x1010bdf80) at ARMInstPrinter.cpp:182
>> #7  0x000000010003cbff in PrintInsts (DisAsm=@0x10200f4e0, Printer=@0x1020107e0, Bytes=@0x7fff5fbff060, SM=@0x7fff5fbff078) at Disassembler.cpp:65
>> #8  0x000000010003c8b4 in llvm::Disassembler::disassemble (T=@0x1010c13c0, Triple=@0x1010b6798, Buffer=@0x102010690) at Disassembler.cpp:153
>> #9  0x000000010004095c in DisassembleInput (ProgName=0x7fff5fbff3f0 "/Volumes/data/llvm/git/trunk/Debug/bin/llvm-mc") at llvm-mc.cpp:347
>> #10 0x000000010003eefb in main (argc=4, argv=0x7fff5fbff298) at llvm-mc.cpp:374
>> (gdb) q
>> The program is running.  Exit anyway? (y or n) y
>> [13:36:26] johnny:/Volumes/data/llvm/git/trunk (local-trunk) $ 
>> 
>> Modified:
>>   llvm/trunk/lib/Target/ARM/ARMAddressingModes.h
>>   llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
>>   llvm/trunk/test/MC/Disassembler/arm-tests.txt
>> 
>> Modified: llvm/trunk/lib/Target/ARM/ARMAddressingModes.h
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAddressingModes.h?rev=101053&r1=101052&r2=101053&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/ARM/ARMAddressingModes.h (original)
>> +++ llvm/trunk/lib/Target/ARM/ARMAddressingModes.h Mon Apr 12 13:46:53 2010
>> @@ -193,6 +193,43 @@
>>    return rotl32(Arg, RotAmt) | ((RotAmt>>1) << 8);
>>  }
>> 
>> +  /// getSOImmValOneRotate - Try to handle Imm with an immediate shifter
>> +  /// operand, computing the rotate amount to use.  If this immediate value
>> +  /// cannot be handled with a single shifter-op, return 0.
>> +  static unsigned getSOImmValOneRotate(unsigned Imm) {
>> +    // A5.2.4 Constants with multiple encodings
>> +    // The lowest unsigned value of rotation wins!
>> +    for (unsigned R = 1; R <= 15; ++R)
>> +      if ((Imm & rotr32(~255U, 2*R)) == 0)
>> +        return 2*R;
>> +
>> +    // Failed to find a suitable rotate amount.
>> +    return 0;
>> +  }
>> +
>> +  /// getSOImmValOneOrNoRotate - Given a 32-bit immediate, if it is something
>> +  /// that can fit into a shifter_operand immediate operand, return the 12-bit
>> +  /// encoding for it.  If not, return -1.  This is different from getSOImmVal()
>> +  /// in that getSOImmVal() is used during codegen, for example,
>> +  /// rewriteARMFrameIndex() where return value of -1 is not considered fatal.
>> +  ///
>> +  /// The current consumer of this API is printSOImm() within ARMInstPrinter.cpp
>> +  /// where return value of -1 indicates that the Arg is not a valid so_imm val!
>> +  static inline int getSOImmValOneOrNoRotate(unsigned Arg) {
>> +    // 8-bit (or less) immediates are trivially shifter_operands with a rotate
>> +    // of zero.
>> +    if ((Arg & ~255U) == 0) return Arg;
>> +
>> +    unsigned RotAmt = getSOImmValOneRotate(Arg);
>> +
>> +    // If this cannot be handled with a single shifter_op, bail out.
>> +    if (rotr32(~255U, RotAmt) & Arg)
>> +      return -1;
>> +
>> +    // Encode this correctly.
>> +    return rotl32(Arg, RotAmt) | ((RotAmt>>1) << 8);
>> +  }
>> +
>>  /// isSOImmTwoPartVal - Return true if the specified value can be obtained by
>>  /// or'ing together two SOImmVal's.
>>  static inline bool isSOImmTwoPartVal(unsigned V) {
>> 
>> Modified: llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp?rev=101053&r1=101052&r2=101053&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp (original)
>> +++ llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp Mon Apr 12 13:46:53 2010
>> @@ -225,7 +225,7 @@
>> static void printSOImm(raw_ostream &O, int64_t V, bool VerboseAsm,
>>                       const MCAsmInfo *MAI) {
>>  // Break it up into two parts that make up a shifter immediate.
>> -  V = ARM_AM::getSOImmVal(V);
>> +  V = ARM_AM::getSOImmValOneOrNoRotate(V);
>>  assert(V != -1 && "Not a valid so_imm value!");
>> 
>>  unsigned Imm = ARM_AM::getSOImmValImm(V);
>> 
>> Modified: llvm/trunk/test/MC/Disassembler/arm-tests.txt
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/arm-tests.txt?rev=101053&r1=101052&r2=101053&view=diff
>> ==============================================================================
>> --- llvm/trunk/test/MC/Disassembler/arm-tests.txt (original)
>> +++ llvm/trunk/test/MC/Disassembler/arm-tests.txt Mon Apr 12 13:46:53 2010
>> @@ -27,6 +27,9 @@
>> # CHECK:	movt	r8, #65535
>> 0xff 0x8f 0x4f 0xe3
>> 
>> +# CHECK:	mvnpls	r7, #245, 2
>> +0xf5 0x71 0xf0 0x53
>> +
>> # CHECK:	pkhbt	r8, r9, r10, lsl #4
>> 0x1a 0x82 0x89 0xe6
>> 
>> 
>> 
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
> 




From sabre at nondot.org  Mon Apr 12 19:36:43 2010
From: sabre at nondot.org (Chris Lattner)
Date: Tue, 13 Apr 2010 00:36:43 -0000
Subject: [llvm-commits] [llvm] r101106 - in /llvm/trunk:
 include/llvm/Target/TargetMachine.h
 lib/CodeGen/TargetLoweringObjectFileImpl.cpp lib/Target/TargetMachine.cpp
 test/CodeGen/X86/global-sections.ll
Message-ID: <20100413003643.4EFBF2A6C12C@llvm.org>

Author: lattner
Date: Mon Apr 12 19:36:43 2010
New Revision: 101106

URL: http://llvm.org/viewvc/llvm-project?rev=101106&view=rev
Log:
add llvm codegen support for -ffunction-sections and -fdata-sections,
patch by Sylvere Teissier!

Modified:
    llvm/trunk/include/llvm/Target/TargetMachine.h
    llvm/trunk/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
    llvm/trunk/lib/Target/TargetMachine.cpp
    llvm/trunk/test/CodeGen/X86/global-sections.ll

Modified: llvm/trunk/include/llvm/Target/TargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetMachine.h?rev=101106&r1=101105&r2=101106&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetMachine.h (original)
+++ llvm/trunk/include/llvm/Target/TargetMachine.h Mon Apr 12 19:36:43 2010
@@ -171,6 +171,21 @@
   /// is false.
   static void setAsmVerbosityDefault(bool);
 
+  /// getDataSections - Return true if data objects should be emitted into their
+  /// own section, corresponds to -fdata-sections.
+  static bool getDataSections();
+
+  /// getFunctionSections - Return true if functions should be emitted into
+  /// their own section, corresponding to -ffunction-sections.
+  static bool getFunctionSections();
+
+  /// setDataSections - Set if the data are emit into separate sections.
+  static void setDataSections(bool);
+
+  /// setFunctionSections - Set if the functions are emit into separate
+  /// sections.
+  static void setFunctionSections(bool);
+
   /// CodeGenFileType - These enums are meant to be passed into
   /// addPassesToEmitFile to indicate what type of file to emit, and returned by
   /// it to indicate what type of file could actually be made.

Modified: llvm/trunk/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TargetLoweringObjectFileImpl.cpp?rev=101106&r1=101105&r2=101106&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/TargetLoweringObjectFileImpl.cpp (original)
+++ llvm/trunk/lib/CodeGen/TargetLoweringObjectFileImpl.cpp Mon Apr 12 19:36:43 2010
@@ -279,14 +279,48 @@
   return ".gnu.linkonce.d.rel.ro.";
 }
 
+/// getSectionPrefixForGlobal - Return the section prefix name used by options
+/// FunctionsSections and DataSections.
+static const char *getSectionPrefixForGlobal(SectionKind Kind) {
+  if (Kind.isText())                 return ".text.";
+  if (Kind.isReadOnly())             return ".rodata.";
+
+  if (Kind.isThreadData())           return ".tdata.";
+  if (Kind.isThreadBSS())            return ".tbss.";
+
+  if (Kind.isDataNoRel())            return ".data.";
+  if (Kind.isDataRelLocal())         return ".data.rel.local.";
+  if (Kind.isDataRel())              return ".data.rel.";
+  if (Kind.isReadOnlyWithRelLocal()) return ".data.rel.ro.local.";
+
+  assert(Kind.isReadOnlyWithRel() && "Unknown section kind");
+  return ".data.rel.ro.";
+}
+
+
 const MCSection *TargetLoweringObjectFileELF::
 SelectSectionForGlobal(const GlobalValue *GV, SectionKind Kind,
                        Mangler *Mang, const TargetMachine &TM) const {
+  // If we have -ffunction-section or -fdata-section then we should emit the
+  // global value to a uniqued section specifically for it.
+  bool EmitUniquedSection;
+  if (Kind.isText())
+    EmitUniquedSection = TM.getFunctionSections();
+  else 
+    EmitUniquedSection = TM.getDataSections();
 
   // If this global is linkonce/weak and the target handles this by emitting it
   // into a 'uniqued' section name, create and return the section now.
-  if (GV->isWeakForLinker() && !Kind.isCommon() && !Kind.isBSS()) {
-    const char *Prefix = getSectionPrefixForUniqueGlobal(Kind);
+  if ((GV->isWeakForLinker() || EmitUniquedSection) &&
+      !Kind.isCommon() && !Kind.isBSS()) {
+    const char *Prefix;
+    if (GV->isWeakForLinker())
+      Prefix = getSectionPrefixForUniqueGlobal(Kind);
+    else {
+      assert(EmitUniquedSection);
+      Prefix = getSectionPrefixForGlobal(Kind);
+    }
+
     SmallString<128> Name(Prefix, Prefix+strlen(Prefix));
     MCSymbol *Sym = Mang->getSymbol(GV);
     Name.append(Sym->getName().begin(), Sym->getName().end());

Modified: llvm/trunk/lib/Target/TargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetMachine.cpp?rev=101106&r1=101105&r2=101106&view=diff
==============================================================================
--- llvm/trunk/lib/Target/TargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/TargetMachine.cpp Mon Apr 12 19:36:43 2010
@@ -197,7 +197,14 @@
   cl::desc("Use strong PHI elimination."),
   cl::location(StrongPHIElim),
   cl::init(false));
-
+static cl::opt<bool>
+DataSections("fdata-sections",
+  cl::desc("Emit data into separate sections"),
+  cl::init(false));
+static cl::opt<bool>
+FunctionSections("ffunction-sections",
+  cl::desc("Emit functions into separate sections"),
+  cl::init(false));
 //---------------------------------------------------------------------------
 // TargetMachine Class
 //
@@ -244,6 +251,22 @@
   AsmVerbosityDefault = V;
 }
 
+bool TargetMachine::getFunctionSections() {
+  return FunctionSections;
+}
+
+bool TargetMachine::getDataSections() {
+  return DataSections;
+}
+
+void TargetMachine::setFunctionSections(bool V) {
+  FunctionSections = V;
+}
+
+void TargetMachine::setDataSections(bool V) {
+  DataSections = V;
+}
+
 namespace llvm {
   /// LessPreciseFPMAD - This flag return true when -enable-fp-mad option
   /// is specified on the command line.  When this flag is off(default), the

Modified: llvm/trunk/test/CodeGen/X86/global-sections.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/global-sections.ll?rev=101106&r1=101105&r2=101106&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/global-sections.ll (original)
+++ llvm/trunk/test/CodeGen/X86/global-sections.ll Mon Apr 12 19:36:43 2010
@@ -1,5 +1,6 @@
 ; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s -check-prefix=LINUX
 ; RUN: llc < %s -mtriple=i386-apple-darwin9.7 | FileCheck %s -check-prefix=DARWIN
+; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -fdata-sections | FileCheck %s -check-prefix=LINUX-SECTIONS
 
 
 ; int G1;
@@ -32,6 +33,12 @@
 ; DARWIN: _G3:
 ; DARWIN:     .long _G1
 
+; LINUX:   .section        .rodata,"a", at progbits
+; LINUX:   .globl  G3
+
+; LINUX-SECTIONS: .section        .rodata.G3,"a", at progbits
+; LINUX-SECTIONS: .globl  G3
+
 
 ; _Complex long long const G4 = 34;
 @G4 = constant {i64,i64} { i64 34, i64 0 }
@@ -97,6 +104,9 @@
 ; LINUX: G7:
 ; LINUX:	.asciz	"abcdefghi"
 
+; LINUX-SECTIONS: .section        .rodata.G7,"aMS", at progbits,1
+; LINUX-SECTIONS:	.globl G7
+
 
 @G8 = constant [4 x i16] [ i16 1, i16 2, i16 3, i16 0 ]
 




From isanbard at gmail.com  Mon Apr 12 19:47:15 2010
From: isanbard at gmail.com (Bill Wendling)
Date: Mon, 12 Apr 2010 17:47:15 -0700
Subject: [llvm-commits] [llvm] r101075 - in /llvm/trunk:
	lib/Target/X86/X86InstrInfo.cpp test/CodeGen/X86/brcond.ll
In-Reply-To: <C39AC7F0-E69E-491F-A65E-FE5CFC9ED74E@apple.com>
References: <20100412221957.EBF8A2A6C12C@llvm.org>
	<000E7360-B5FF-460E-80EF-F8A69D74C0DF@apple.com>
	<26E362DF-1C47-4A0C-B259-0A6AFC5E5B37@apple.com>
	<FCDEA618-97D0-457D-AB36-E695A89C0D62@apple.com>
	<1670CEA8-B035-4FCA-B5A6-549664FC826C@apple.com>
	<C39AC7F0-E69E-491F-A65E-FE5CFC9ED74E@apple.com>
Message-ID: <197AE70F-B04A-4389-8525-2EA30E810258@gmail.com>

On Apr 12, 2010, at 5:18 PM, Chris Lattner wrote:

>>>> // If the prior block branches here on true and somewhere else on false, and
>>>> // if the branch condition is reversible, reverse the branch to create a
>>>> // fall-through.
>>>> if (PriorTBB == MBB) {
>>>>   SmallVector<MachineOperand, 4> NewPriorCond(PriorCond);
>>>>   if (!TII->ReverseBranchCondition(NewPriorCond)) {
>>>>     TII->RemoveBranch(PrevBB);
>>>>     TII->InsertBranch(PrevBB, PriorFBB, 0, NewPriorCond);
>>>>     MadeChange = true;
>>>>     ++NumBranchOpts;
>>>>     goto ReoptimizeBlock;
>>>>   }
>>>> }
>>>> 
>>>> Why doesn't it work in this case?
>>> 
>>> I was curious too. CodeGenPrepare has split a critical edge for a PHI
>>> node, however after register allocation it turns out that no copy was
>>> needed, so the jmp is actually in a separate basic block from the
>>> jne, jp.
>> 
>> 
>> In that case, branch folding should be removing the block that consists of only an unconditional branch:
>> 
>>     // If this block is just an unconditional branch to CurTBB, we can
>>     // usually completely eliminate the block.  The only case we cannot
>>     // completely eliminate the block is when the block before this one
>>     // falls through into MBB and we can't understand the prior block's branch
>>     // condition.
>>     if (MBB->empty()) {
>>        <too long to quote, but appears to do what the comment says>
>> 
>> so why doesn't *that* work?
>> 
> 
> I think that answering these questions (and fixing the problem) is a much better idea than hacking the X86 backend to handle one specific case of this.
> 
I looked into all of this, but it wouldn't work for various reasons (it was several weeks ago so I forget most of the reasons, but Dan discovered one of them).

I'll look again.

-bw





From isanbard at gmail.com  Mon Apr 12 19:59:53 2010
From: isanbard at gmail.com (Bill Wendling)
Date: Mon, 12 Apr 2010 17:59:53 -0700
Subject: [llvm-commits] [llvm] r101075 - in /llvm/trunk:
	lib/Target/X86/X86InstrInfo.cpp test/CodeGen/X86/brcond.ll
In-Reply-To: <1670CEA8-B035-4FCA-B5A6-549664FC826C@apple.com>
References: <20100412221957.EBF8A2A6C12C@llvm.org>
	<000E7360-B5FF-460E-80EF-F8A69D74C0DF@apple.com>
	<26E362DF-1C47-4A0C-B259-0A6AFC5E5B37@apple.com>
	<FCDEA618-97D0-457D-AB36-E695A89C0D62@apple.com>
	<1670CEA8-B035-4FCA-B5A6-549664FC826C@apple.com>
Message-ID: <EFCC590B-E3DE-4840-9891-6BEE7FAC2F40@gmail.com>


On Apr 12, 2010, at 4:38 PM, Dale Johannesen wrote:

> 
> On Apr 12, 2010, at 4:27 PMPDT, Dan Gohman wrote:
> 
>> 
>> On Apr 12, 2010, at 4:22 PM, Dale Johannesen wrote:
>> 
>>> 
>>> On Apr 12, 2010, at 4:13 PMPDT, Chris Lattner wrote:
>>> 
>>>> 
>>>> On Apr 12, 2010, at 3:19 PM, Bill Wendling wrote:
>>>> 
>>>>> Author: void
>>>>> Date: Mon Apr 12 17:19:57 2010
>>>>> New Revision: 101075
>>>> 
>>>> hi Bill, is it possible for this to go in target independent code, e.g. branch folding?
>>>> 
>>>> -Chris
>>> 
>>> Branch folding is already trying:
>>> 
>>>  // If the prior block branches here on true and somewhere else on false, and
>>>  // if the branch condition is reversible, reverse the branch to create a
>>>  // fall-through.
>>>  if (PriorTBB == MBB) {
>>>    SmallVector<MachineOperand, 4> NewPriorCond(PriorCond);
>>>    if (!TII->ReverseBranchCondition(NewPriorCond)) {
>>>      TII->RemoveBranch(PrevBB);
>>>      TII->InsertBranch(PrevBB, PriorFBB, 0, NewPriorCond);
>>>      MadeChange = true;
>>>      ++NumBranchOpts;
>>>      goto ReoptimizeBlock;
>>>    }
>>>  }
>>> 
>>> Why doesn't it work in this case?
>> 
>> I was curious too. CodeGenPrepare has split a critical edge for a PHI
>> node, however after register allocation it turns out that no copy was
>> needed, so the jmp is actually in a separate basic block from the
>> jne, jp.
> 
> 
> In that case, branch folding should be removing the block that consists of only an unconditional branch:
> 
>      // If this block is just an unconditional branch to CurTBB, we can
>      // usually completely eliminate the block.  The only case we cannot
>      // completely eliminate the block is when the block before this one
>      // falls through into MBB and we can't understand the prior block's branch
>      // condition.
>      if (MBB->empty()) {
>         <too long to quote, but appears to do what the comment says>
> 
> so why doesn't *that* work?
> 
It does. But it happens too late in the game. The block's not removed until after the "OptimizeBlock" method returns. By then, it goes on to the next block (which happens to be in this case the fall-through of the removed block). Then we're left with the situation this hack fixes.

-bw




From isanbard at gmail.com  Mon Apr 12 20:24:18 2010
From: isanbard at gmail.com (Bill Wendling)
Date: Mon, 12 Apr 2010 18:24:18 -0700
Subject: [llvm-commits] [llvm] r101075 - in /llvm/trunk:
	lib/Target/X86/X86InstrInfo.cpp test/CodeGen/X86/brcond.ll
In-Reply-To: <C39AC7F0-E69E-491F-A65E-FE5CFC9ED74E@apple.com>
References: <20100412221957.EBF8A2A6C12C@llvm.org>
	<000E7360-B5FF-460E-80EF-F8A69D74C0DF@apple.com>
	<26E362DF-1C47-4A0C-B259-0A6AFC5E5B37@apple.com>
	<FCDEA618-97D0-457D-AB36-E695A89C0D62@apple.com>
	<1670CEA8-B035-4FCA-B5A6-549664FC826C@apple.com>
	<C39AC7F0-E69E-491F-A65E-FE5CFC9ED74E@apple.com>
Message-ID: <667DBFC7-8ED4-4C68-AC13-9468E25031EB@gmail.com>

On Apr 12, 2010, at 5:18 PM, Chris Lattner wrote:

>>>> // If the prior block branches here on true and somewhere else on false, and
>>>> // if the branch condition is reversible, reverse the branch to create a
>>>> // fall-through.
>>>> if (PriorTBB == MBB) {
>>>>   SmallVector<MachineOperand, 4> NewPriorCond(PriorCond);
>>>>   if (!TII->ReverseBranchCondition(NewPriorCond)) {
>>>>     TII->RemoveBranch(PrevBB);
>>>>     TII->InsertBranch(PrevBB, PriorFBB, 0, NewPriorCond);
>>>>     MadeChange = true;
>>>>     ++NumBranchOpts;
>>>>     goto ReoptimizeBlock;
>>>>   }
>>>> }
>>>> 
>>>> Why doesn't it work in this case?
>>> 
>>> I was curious too. CodeGenPrepare has split a critical edge for a PHI
>>> node, however after register allocation it turns out that no copy was
>>> needed, so the jmp is actually in a separate basic block from the
>>> jne, jp.
>> 
>> 
>> In that case, branch folding should be removing the block that consists of only an unconditional branch:
>> 
>>     // If this block is just an unconditional branch to CurTBB, we can
>>     // usually completely eliminate the block.  The only case we cannot
>>     // completely eliminate the block is when the block before this one
>>     // falls through into MBB and we can't understand the prior block's branch
>>     // condition.
>>     if (MBB->empty()) {
>>        <too long to quote, but appears to do what the comment says>
>> 
>> so why doesn't *that* work?
>> 
> 
> I think that answering these questions (and fixing the problem) is a much better idea than hacking the X86 backend to handle one specific case of this.
> 
The problem lies in this bit of code in X86InstrInfo::AnalyzeBranch:

    // If they differ, see if they fit one of the known patterns. Theoretically,                                                                                        
    // we could handle more patterns here, but we shouldn't expect to see them                                                                                          
    // if instruction selection has done a reasonable job.                                                                                                              
    if ((OldBranchCode == X86::COND_NP &&
         BranchCode == X86::COND_E) ||
        (OldBranchCode == X86::COND_E &&
         BranchCode == X86::COND_NP))
      BranchCode = X86::COND_NP_OR_E;
    else if ((OldBranchCode == X86::COND_P &&
              BranchCode == X86::COND_NE) ||
             (OldBranchCode == X86::COND_NE &&
              BranchCode == X86::COND_P))
      BranchCode = X86::COND_NE_OR_P;
    else
      return true;

When the code in BranchFolding calls "ReverseBranchCondition", the X86 back-end isn't able to handle it. So it doesn't change the branch conditions.

If you look for the bits of code that handle COND_NP_OR_E and COND_NE_OR_P there doesn't seem to be any optimizations done with them. X86InstrInfo::InsertBranch looks at them and inserts two branches.

What is the rationale behind converting a JE/JNP and JNE/JP into COND_NE_OR_P and COND_NP_OR_E?

-bw

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From daniel at zuster.org  Mon Apr 12 20:38:57 2010
From: daniel at zuster.org (Daniel Dunbar)
Date: Tue, 13 Apr 2010 01:38:57 -0000
Subject: [llvm-commits] [llvm] r101110 -
	/llvm/trunk/include/llvm/Support/IRBuilder.h
Message-ID: <20100413013857.6A1762A6C12C@llvm.org>

Author: ddunbar
Date: Mon Apr 12 20:38:57 2010
New Revision: 101110

URL: http://llvm.org/viewvc/llvm-project?rev=101110&view=rev
Log:
IRBuilder: Add Create{Shl,LShr,And,Or,Xor} methods from uin64_t and APInt constants.

Modified:
    llvm/trunk/include/llvm/Support/IRBuilder.h

Modified: llvm/trunk/include/llvm/Support/IRBuilder.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/IRBuilder.h?rev=101110&r1=101109&r2=101110&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/IRBuilder.h (original)
+++ llvm/trunk/include/llvm/Support/IRBuilder.h Mon Apr 12 20:38:57 2010
@@ -432,12 +432,19 @@
         return Folder.CreateFRem(LC, RC);
     return Insert(BinaryOperator::CreateFRem(LHS, RHS), Name);
   }
+
   Value *CreateShl(Value *LHS, Value *RHS, const Twine &Name = "") {
     if (Constant *LC = dyn_cast<Constant>(LHS))
       if (Constant *RC = dyn_cast<Constant>(RHS))
         return Folder.CreateShl(LC, RC);
     return Insert(BinaryOperator::CreateShl(LHS, RHS), Name);
   }
+  Value *CreateShl(Value *LHS, const APInt &RHS, const Twine &Name = "") {
+    Constant *RHSC = ConstantInt::get(LHS->getType(), RHS);
+    if (Constant *LC = dyn_cast<Constant>(LHS))
+      return Folder.CreateShl(LC, RHSC);
+    return Insert(BinaryOperator::CreateShl(LHS, RHSC), Name);
+  }
   Value *CreateShl(Value *LHS, uint64_t RHS, const Twine &Name = "") {
     Constant *RHSC = ConstantInt::get(LHS->getType(), RHS);
     if (Constant *LC = dyn_cast<Constant>(LHS))
@@ -451,23 +458,35 @@
         return Folder.CreateLShr(LC, RC);
     return Insert(BinaryOperator::CreateLShr(LHS, RHS), Name);
   }
+  Value *CreateLShr(Value *LHS, const APInt &RHS, const Twine &Name = "") {
+    Constant *RHSC = ConstantInt::get(LHS->getType(), RHS);
+    if (Constant *LC = dyn_cast<Constant>(LHS))
+      return Folder.CreateLShr(LC, RHSC);
+    return Insert(BinaryOperator::CreateLShr(LHS, RHSC), Name);
+  }
   Value *CreateLShr(Value *LHS, uint64_t RHS, const Twine &Name = "") {
     Constant *RHSC = ConstantInt::get(LHS->getType(), RHS);
     if (Constant *LC = dyn_cast<Constant>(LHS))
       return Folder.CreateLShr(LC, RHSC);
     return Insert(BinaryOperator::CreateLShr(LHS, RHSC), Name);
   }
-  
+
   Value *CreateAShr(Value *LHS, Value *RHS, const Twine &Name = "") {
     if (Constant *LC = dyn_cast<Constant>(LHS))
       if (Constant *RC = dyn_cast<Constant>(RHS))
         return Folder.CreateAShr(LC, RC);
     return Insert(BinaryOperator::CreateAShr(LHS, RHS), Name);
   }
+  Value *CreateAShr(Value *LHS, const APInt &RHS, const Twine &Name = "") {
+    Constant *RHSC = ConstantInt::get(LHS->getType(), RHS);
+    if (Constant *LC = dyn_cast<Constant>(LHS))
+      return Folder.CreateAShr(LC, RHSC);
+    return Insert(BinaryOperator::CreateAShr(LHS, RHSC), Name);
+  }
   Value *CreateAShr(Value *LHS, uint64_t RHS, const Twine &Name = "") {
     Constant *RHSC = ConstantInt::get(LHS->getType(), RHS);
     if (Constant *LC = dyn_cast<Constant>(LHS))
-      return Folder.CreateSShr(LC, RHSC);
+      return Folder.CreateAShr(LC, RHSC);
     return Insert(BinaryOperator::CreateAShr(LHS, RHSC), Name);
   }
 
@@ -480,6 +499,19 @@
     }
     return Insert(BinaryOperator::CreateAnd(LHS, RHS), Name);
   }
+  Value *CreateAnd(Value *LHS, const APInt &RHS, const Twine &Name = "") {
+    Constant *RHSC = ConstantInt::get(LHS->getType(), RHS);
+    if (Constant *LC = dyn_cast<Constant>(LHS))
+      return Folder.CreateAnd(LC, RHSC);
+    return Insert(BinaryOperator::CreateAnd(LHS, RHSC), Name);
+  }
+  Value *CreateAnd(Value *LHS, uint64_t RHS, const Twine &Name = "") {
+    Constant *RHSC = ConstantInt::get(LHS->getType(), RHS);
+    if (Constant *LC = dyn_cast<Constant>(LHS))
+      return Folder.CreateAnd(LC, RHSC);
+    return Insert(BinaryOperator::CreateAnd(LHS, RHSC), Name);
+  }
+
   Value *CreateOr(Value *LHS, Value *RHS, const Twine &Name = "") {
     if (Constant *RC = dyn_cast<Constant>(RHS)) {
       if (RC->isNullValue())
@@ -489,12 +521,37 @@
     }
     return Insert(BinaryOperator::CreateOr(LHS, RHS), Name);
   }
+  Value *CreateOr(Value *LHS, const APInt &RHS, const Twine &Name = "") {
+    Constant *RHSC = ConstantInt::get(LHS->getType(), RHS);
+    if (Constant *LC = dyn_cast<Constant>(LHS))
+      return Folder.CreateOr(LC, RHSC);
+    return Insert(BinaryOperator::CreateOr(LHS, RHSC), Name);
+  }
+  Value *CreateOr(Value *LHS, uint64_t RHS, const Twine &Name = "") {
+    Constant *RHSC = ConstantInt::get(LHS->getType(), RHS);
+    if (Constant *LC = dyn_cast<Constant>(LHS))
+      return Folder.CreateOr(LC, RHSC);
+    return Insert(BinaryOperator::CreateOr(LHS, RHSC), Name);
+  }
+
   Value *CreateXor(Value *LHS, Value *RHS, const Twine &Name = "") {
     if (Constant *LC = dyn_cast<Constant>(LHS))
       if (Constant *RC = dyn_cast<Constant>(RHS))
         return Folder.CreateXor(LC, RC);
     return Insert(BinaryOperator::CreateXor(LHS, RHS), Name);
   }
+  Value *CreateXor(Value *LHS, const APInt &RHS, const Twine &Name = "") {
+    Constant *RHSC = ConstantInt::get(LHS->getType(), RHS);
+    if (Constant *LC = dyn_cast<Constant>(LHS))
+      return Folder.CreateXor(LC, RHSC);
+    return Insert(BinaryOperator::CreateXor(LHS, RHSC), Name);
+  }
+  Value *CreateXor(Value *LHS, uint64_t RHS, const Twine &Name = "") {
+    Constant *RHSC = ConstantInt::get(LHS->getType(), RHS);
+    if (Constant *LC = dyn_cast<Constant>(LHS))
+      return Folder.CreateXor(LC, RHSC);
+    return Insert(BinaryOperator::CreateXor(LHS, RHSC), Name);
+  }
 
   Value *CreateBinOp(Instruction::BinaryOps Opc,
                      Value *LHS, Value *RHS, const Twine &Name = "") {




From daniel at zuster.org  Mon Apr 12 20:39:07 2010
From: daniel at zuster.org (Daniel Dunbar)
Date: Tue, 13 Apr 2010 01:39:07 -0000
Subject: [llvm-commits] [llvm] r101111 - in /llvm/trunk: include/llvm/Type.h
	lib/VMCore/Type.cpp
Message-ID: <20100413013907.8BCBB2A6C12C@llvm.org>

Author: ddunbar
Date: Mon Apr 12 20:39:07 2010
New Revision: 101111

URL: http://llvm.org/viewvc/llvm-project?rev=101111&view=rev
Log:
VMCore: Add Type::getIntN[Ptr]Ty, which are the obvious generic forms of
Type::getInt{1,8,...}[Ptr]Ty, so code can consistently use the methods on Type
without occasionally needed to call IntegerType::get.

Modified:
    llvm/trunk/include/llvm/Type.h
    llvm/trunk/lib/VMCore/Type.cpp

Modified: llvm/trunk/include/llvm/Type.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Type.h?rev=101111&r1=101110&r2=101111&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Type.h (original)
+++ llvm/trunk/include/llvm/Type.h Mon Apr 12 20:39:07 2010
@@ -406,6 +406,7 @@
   static const Type *getX86_FP80Ty(LLVMContext &C);
   static const Type *getFP128Ty(LLVMContext &C);
   static const Type *getPPC_FP128Ty(LLVMContext &C);
+  static const IntegerType *getIntNTy(LLVMContext &C, unsigned N);
   static const IntegerType *getInt1Ty(LLVMContext &C);
   static const IntegerType *getInt8Ty(LLVMContext &C);
   static const IntegerType *getInt16Ty(LLVMContext &C);
@@ -421,6 +422,8 @@
   static const PointerType *getX86_FP80PtrTy(LLVMContext &C, unsigned AS = 0);
   static const PointerType *getFP128PtrTy(LLVMContext &C, unsigned AS = 0);
   static const PointerType *getPPC_FP128PtrTy(LLVMContext &C, unsigned AS = 0);
+  static const PointerType *getIntNPtrTy(LLVMContext &C, unsigned N,
+                                         unsigned AS = 0);
   static const PointerType *getInt1PtrTy(LLVMContext &C, unsigned AS = 0);
   static const PointerType *getInt8PtrTy(LLVMContext &C, unsigned AS = 0);
   static const PointerType *getInt16PtrTy(LLVMContext &C, unsigned AS = 0);

Modified: llvm/trunk/lib/VMCore/Type.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Type.cpp?rev=101111&r1=101110&r2=101111&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/Type.cpp (original)
+++ llvm/trunk/lib/VMCore/Type.cpp Mon Apr 12 20:39:07 2010
@@ -380,6 +380,10 @@
   return &C.pImpl->PPC_FP128Ty;
 }
 
+const IntegerType *Type::getIntNTy(LLVMContext &C, unsigned N) {
+  return IntegerType::get(C, N);
+}
+
 const IntegerType *Type::getInt1Ty(LLVMContext &C) {
   return &C.pImpl->Int1Ty;
 }
@@ -420,6 +424,10 @@
   return getPPC_FP128Ty(C)->getPointerTo(AS);
 }
 
+const PointerType *Type::getIntNPtrTy(LLVMContext &C, unsigned N, unsigned AS) {
+  return getIntNTy(C, N)->getPointerTo(AS);
+}
+
 const PointerType *Type::getInt1PtrTy(LLVMContext &C, unsigned AS) {
   return getInt1Ty(C)->getPointerTo(AS);
 }




From gohman at apple.com  Mon Apr 12 20:46:37 2010
From: gohman at apple.com (Dan Gohman)
Date: Tue, 13 Apr 2010 01:46:37 -0000
Subject: [llvm-commits] [llvm] r101113 - in /llvm/trunk:
 lib/Transforms/Scalar/IndVarSimplify.cpp
 test/Transforms/IndVarSimplify/eliminate-rem.ll
Message-ID: <20100413014637.26EDE2A6C12C@llvm.org>

Author: djg
Date: Mon Apr 12 20:46:36 2010
New Revision: 101113

URL: http://llvm.org/viewvc/llvm-project?rev=101113&view=rev
Log:
Teach IndVarSimplify how to eliminate remainder operators where the
numerator is an induction variable. For example, with code like this:

  for (i=0;i<n;++i)
    x[i%n] = 0;

IndVarSimplify will now recognize that i is always less than n inside
the loop, and eliminate the remainder.

Added:
    llvm/trunk/test/Transforms/IndVarSimplify/eliminate-rem.ll
Modified:
    llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp?rev=101113&r1=101112&r2=101113&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp Mon Apr 12 20:46:36 2010
@@ -98,6 +98,7 @@
   private:
 
     void EliminateIVComparisons();
+    void EliminateIVRemainders();
     void RewriteNonIntegerIVs(Loop *L);
 
     ICmpInst *LinearFunctionTestReplace(Loop *L, const SCEV *BackedgeTakenCount,
@@ -398,6 +399,73 @@
       RecursivelyDeleteTriviallyDeadInstructions(Inst);
 }
 
+void IndVarSimplify::EliminateIVRemainders() {
+  SmallVector<WeakVH, 16> DeadInsts;
+
+  // Look for SRem and URem users.
+  for (IVUsers::iterator I = IU->begin(), E = IU->end(); I != E; ++I) {
+    IVStrideUse &UI = *I;
+    BinaryOperator *Rem = dyn_cast<BinaryOperator>(UI.getUser());
+    if (!Rem) continue;
+
+    bool isSigned = Rem->getOpcode() == Instruction::SRem;
+    if (!isSigned && Rem->getOpcode() != Instruction::URem)
+      continue;
+
+    // We're only interested in the case where we know something about
+    // the numerator.
+    if (UI.getOperandValToReplace() != Rem->getOperand(0))
+      continue;
+
+    // Get the SCEVs for the ICmp operands.
+    const SCEV *S = SE->getSCEV(Rem->getOperand(0));
+    const SCEV *X = SE->getSCEV(Rem->getOperand(1));
+
+    // Simplify unnecessary loops away.
+    const Loop *ICmpLoop = LI->getLoopFor(Rem->getParent());
+    S = SE->getSCEVAtScope(S, ICmpLoop);
+    X = SE->getSCEVAtScope(X, ICmpLoop);
+
+    // i % n  -->  i  if i is in [0,n).
+    if ((!isSigned || SE->isKnownNonNegative(S)) &&
+        SE->isKnownPredicate(isSigned ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT,
+                             S, X))
+      Rem->replaceAllUsesWith(Rem->getOperand(0));
+    else {
+      // (i+1) % n  -->  (i+1)==n?0:(i+1)  if i is in [0,n).
+      const SCEV *LessOne =
+        SE->getMinusSCEV(S, SE->getIntegerSCEV(1, S->getType()));
+      if ((!isSigned || SE->isKnownNonNegative(LessOne)) &&
+          SE->isKnownPredicate(isSigned ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT,
+                               LessOne, X)) {
+        ICmpInst *ICmp = new ICmpInst(Rem, ICmpInst::ICMP_EQ,
+                                      Rem->getOperand(0), Rem->getOperand(1),
+                                      "tmp");
+        SelectInst *Sel =
+          SelectInst::Create(ICmp,
+                             ConstantInt::get(Rem->getType(), 0),
+                             Rem->getOperand(0), "tmp", Rem);
+        Rem->replaceAllUsesWith(Sel);
+      } else
+        continue;
+    }
+
+    // Inform IVUsers about the new users.
+    if (Instruction *I = dyn_cast<Instruction>(Rem->getOperand(0)))
+      IU->AddUsersIfInteresting(I);
+
+    DEBUG(dbgs() << "INDVARS: Simplified rem: " << *Rem << '\n');
+    DeadInsts.push_back(Rem);
+  }
+
+  // Now that we're done iterating through lists, clean up any instructions
+  // which are now dead.
+  while (!DeadInsts.empty())
+    if (Instruction *Inst =
+          dyn_cast_or_null<Instruction>(DeadInsts.pop_back_val()))
+      RecursivelyDeleteTriviallyDeadInstructions(Inst);
+}
+
 bool IndVarSimplify::runOnLoop(Loop *L, LPPassManager &LPM) {
   IU = &getAnalysis<IVUsers>();
   LI = &getAnalysis<LoopInfo>();
@@ -427,6 +495,9 @@
   // Simplify ICmp IV users.
   EliminateIVComparisons();
 
+  // Simplify SRem and URem IV users.
+  EliminateIVRemainders();
+
   // Compute the type of the largest recurrence expression, and decide whether
   // a canonical induction variable should be inserted.
   const Type *LargestType = 0;

Added: llvm/trunk/test/Transforms/IndVarSimplify/eliminate-rem.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IndVarSimplify/eliminate-rem.ll?rev=101113&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/IndVarSimplify/eliminate-rem.ll (added)
+++ llvm/trunk/test/Transforms/IndVarSimplify/eliminate-rem.ll Mon Apr 12 20:46:36 2010
@@ -0,0 +1,121 @@
+; RUN: opt -indvars -S < %s | FileCheck %s
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
+
+; Indvars should be able to eliminate this srem.
+; CHECK: @simple
+; CHECK-NOT: rem
+; CHECK: ret
+
+define void @simple(i64 %arg, double* %arg3) nounwind {
+bb:
+  %t = icmp slt i64 0, %arg                     ; <i1> [#uses=1]
+  br i1 %t, label %bb4, label %bb12
+
+bb4:                                              ; preds = %bb
+  br label %bb5
+
+bb5:                                              ; preds = %bb4, %bb5
+  %t6 = phi i64 [ %t9, %bb5 ], [ 0, %bb4 ]    ; <i64> [#uses=2]
+  %t7 = srem i64 %t6, %arg                    ; <i64> [#uses=1]
+  %t8 = getelementptr inbounds double* %arg3, i64 %t7 ; <double*> [#uses=1]
+  store double 0.000000e+00, double* %t8
+  %t9 = add nsw i64 %t6, 1                    ; <i64> [#uses=2]
+  %t10 = icmp slt i64 %t9, %arg               ; <i1> [#uses=1]
+  br i1 %t10, label %bb5, label %bb11
+
+bb11:                                             ; preds = %bb5
+  br label %bb12
+
+bb12:                                             ; preds = %bb11, %bb
+  ret void
+}
+
+; Indvars should be able to eliminate the (i+1)%n.
+; CHECK: @f
+; CHECK-NOT: rem
+; CHECK: rem
+; CHECK-NOT: rem
+; CHECK: ret
+
+define i32 @f(i64* %arg, i64 %arg1, i64 %arg2, i64 %arg3) nounwind {
+bb:
+  %t = icmp sgt i64 %arg1, 0                      ; <i1> [#uses=1]
+  br i1 %t, label %bb4, label %bb54
+
+bb4:                                              ; preds = %bb
+  br label %bb5
+
+bb5:                                              ; preds = %bb49, %bb4
+  %t6 = phi i64 [ %t51, %bb49 ], [ 0, %bb4 ]      ; <i64> [#uses=4]
+  %t7 = phi i32 [ %t50, %bb49 ], [ 0, %bb4 ]      ; <i32> [#uses=2]
+  %t8 = add nsw i64 %t6, %arg1                    ; <i64> [#uses=1]
+  %t9 = add nsw i64 %t8, -2                       ; <i64> [#uses=1]
+  %t10 = srem i64 %t9, %arg1                      ; <i64> [#uses=1]
+  %t11 = add nsw i64 %t10, 1                      ; <i64> [#uses=1]
+  %t12 = add nsw i64 %t6, 1                       ; <i64> [#uses=1]
+  %t13 = srem i64 %t12, %arg1                     ; <i64> [#uses=1]
+  %t14 = icmp sgt i64 %arg1, 0                    ; <i1> [#uses=1]
+  br i1 %t14, label %bb15, label %bb49
+
+bb15:                                             ; preds = %bb5
+  br label %bb16
+
+bb16:                                             ; preds = %bb44, %bb15
+  %t17 = phi i64 [ %t46, %bb44 ], [ 0, %bb15 ]    ; <i64> [#uses=1]
+  %t18 = phi i32 [ %t45, %bb44 ], [ %t7, %bb15 ]  ; <i32> [#uses=2]
+  %t19 = icmp sgt i64 %arg1, 0                    ; <i1> [#uses=1]
+  br i1 %t19, label %bb20, label %bb44
+
+bb20:                                             ; preds = %bb16
+  br label %bb21
+
+bb21:                                             ; preds = %bb21, %bb20
+  %t22 = phi i64 [ %t41, %bb21 ], [ 0, %bb20 ]    ; <i64> [#uses=4]
+  %t23 = phi i32 [ %t40, %bb21 ], [ %t18, %bb20 ] ; <i32> [#uses=1]
+  %t24 = mul i64 %t6, %arg1                       ; <i64> [#uses=1]
+  %t25 = mul i64 %t13, %arg1                      ; <i64> [#uses=1]
+  %t26 = add nsw i64 %t24, %t22                   ; <i64> [#uses=1]
+  %t27 = mul i64 %t11, %arg1                      ; <i64> [#uses=1]
+  %t28 = add nsw i64 %t25, %t22                   ; <i64> [#uses=1]
+  %t29 = getelementptr inbounds i64* %arg, i64 %t26 ; <i64*> [#uses=1]
+  %t30 = add nsw i64 %t27, %t22                   ; <i64> [#uses=1]
+  %t31 = getelementptr inbounds i64* %arg, i64 %t28 ; <i64*> [#uses=1]
+  %t32 = zext i32 %t23 to i64                     ; <i64> [#uses=1]
+  %t33 = load i64* %t29                           ; <i64> [#uses=1]
+  %t34 = getelementptr inbounds i64* %arg, i64 %t30 ; <i64*> [#uses=1]
+  %t35 = load i64* %t31                           ; <i64> [#uses=1]
+  %t36 = add nsw i64 %t32, %t33                   ; <i64> [#uses=1]
+  %t37 = add nsw i64 %t36, %t35                   ; <i64> [#uses=1]
+  %t38 = load i64* %t34                           ; <i64> [#uses=1]
+  %t39 = add nsw i64 %t37, %t38                   ; <i64> [#uses=1]
+  %t40 = trunc i64 %t39 to i32                    ; <i32> [#uses=2]
+  %t41 = add nsw i64 %t22, 1                      ; <i64> [#uses=2]
+  %t42 = icmp slt i64 %t41, %arg1                 ; <i1> [#uses=1]
+  br i1 %t42, label %bb21, label %bb43
+
+bb43:                                             ; preds = %bb21
+  br label %bb44
+
+bb44:                                             ; preds = %bb43, %bb16
+  %t45 = phi i32 [ %t18, %bb16 ], [ %t40, %bb43 ] ; <i32> [#uses=2]
+  %t46 = add nsw i64 %t17, 1                      ; <i64> [#uses=2]
+  %t47 = icmp slt i64 %t46, %arg1                 ; <i1> [#uses=1]
+  br i1 %t47, label %bb16, label %bb48
+
+bb48:                                             ; preds = %bb44
+  br label %bb49
+
+bb49:                                             ; preds = %bb48, %bb5
+  %t50 = phi i32 [ %t7, %bb5 ], [ %t45, %bb48 ]   ; <i32> [#uses=2]
+  %t51 = add nsw i64 %t6, 1                       ; <i64> [#uses=2]
+  %t52 = icmp slt i64 %t51, %arg1                 ; <i1> [#uses=1]
+  br i1 %t52, label %bb5, label %bb53
+
+bb53:                                             ; preds = %bb49
+  br label %bb54
+
+bb54:                                             ; preds = %bb53, %bb
+  %t55 = phi i32 [ 0, %bb ], [ %t50, %bb53 ]      ; <i32> [#uses=1]
+  ret i32 %t55
+}




From bob.wilson at apple.com  Mon Apr 12 21:11:48 2010
From: bob.wilson at apple.com (Bob Wilson)
Date: Tue, 13 Apr 2010 02:11:48 -0000
Subject: [llvm-commits] [llvm] r101114 - in /llvm/trunk/lib/Target/ARM:
 ARMAddressingModes.h AsmPrinter/ARMInstPrinter.cpp
Message-ID: <20100413021148.AE2F92A6C12C@llvm.org>

Author: bwilson
Date: Mon Apr 12 21:11:48 2010
New Revision: 101114

URL: http://llvm.org/viewvc/llvm-project?rev=101114&view=rev
Log:
Replace r101053 with a fix for getSOImmValRotate() so that it will correctly
recognize all the valid rotated immediates.  This fixes the disassembler
issue and will also help codegen for some unusual constant values.

Modified:
    llvm/trunk/lib/Target/ARM/ARMAddressingModes.h
    llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMAddressingModes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAddressingModes.h?rev=101114&r1=101113&r2=101114&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMAddressingModes.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMAddressingModes.h Mon Apr 12 21:11:48 2010
@@ -151,22 +151,13 @@
     if ((rotr32(Imm, RotAmt) & ~255U) == 0)
       return (32-RotAmt)&31;  // HW rotates right, not left.
 
-    // For values like 0xF000000F, we should skip the first run of ones, then
+    // For values like 0xF000000F, we should ignore the low 7 bits, then
     // retry the hunt.
-    if (Imm & 1) {
-      unsigned TrailingOnes = CountTrailingZeros_32(~Imm);
-      if (TrailingOnes != 32) {  // Avoid overflow on 0xFFFFFFFF
-        // Restart the search for a high-order bit after the initial seconds of
-        // ones.
-        unsigned TZ2 = CountTrailingZeros_32(Imm & ~((1 << TrailingOnes)-1));
-
-        // Rotate amount must be even.
-        unsigned RotAmt2 = TZ2 & ~1;
-
-        // If this fits, use it.
-        if (RotAmt2 != 32 && (rotr32(Imm, RotAmt2) & ~255U) == 0)
-          return (32-RotAmt2)&31;  // HW rotates right, not left.
-      }
+    if (Imm & 127U) {
+      unsigned TZ2 = CountTrailingZeros_32(Imm & ~127U);
+      unsigned RotAmt2 = TZ2 & ~1;
+      if ((rotr32(Imm, RotAmt2) & ~255U) == 0)
+        return (32-RotAmt2)&31;  // HW rotates right, not left.
     }
 
     // Otherwise, we have no way to cover this span of bits with a single
@@ -193,43 +184,6 @@
     return rotl32(Arg, RotAmt) | ((RotAmt>>1) << 8);
   }
 
-  /// getSOImmValOneRotate - Try to handle Imm with an immediate shifter
-  /// operand, computing the rotate amount to use.  If this immediate value
-  /// cannot be handled with a single shifter-op, return 0.
-  static unsigned getSOImmValOneRotate(unsigned Imm) {
-    // A5.2.4 Constants with multiple encodings
-    // The lowest unsigned value of rotation wins!
-    for (unsigned R = 1; R <= 15; ++R)
-      if ((Imm & rotr32(~255U, 2*R)) == 0)
-        return 2*R;
-
-    // Failed to find a suitable rotate amount.
-    return 0;
-  }
-
-  /// getSOImmValOneOrNoRotate - Given a 32-bit immediate, if it is something
-  /// that can fit into a shifter_operand immediate operand, return the 12-bit
-  /// encoding for it.  If not, return -1.  This is different from getSOImmVal()
-  /// in that getSOImmVal() is used during codegen, for example,
-  /// rewriteARMFrameIndex() where return value of -1 is not considered fatal.
-  ///
-  /// The current consumer of this API is printSOImm() within ARMInstPrinter.cpp
-  /// where return value of -1 indicates that the Arg is not a valid so_imm val!
-  static inline int getSOImmValOneOrNoRotate(unsigned Arg) {
-    // 8-bit (or less) immediates are trivially shifter_operands with a rotate
-    // of zero.
-    if ((Arg & ~255U) == 0) return Arg;
-
-    unsigned RotAmt = getSOImmValOneRotate(Arg);
-
-    // If this cannot be handled with a single shifter_op, bail out.
-    if (rotr32(~255U, RotAmt) & Arg)
-      return -1;
-
-    // Encode this correctly.
-    return rotl32(Arg, RotAmt) | ((RotAmt>>1) << 8);
-  }
-
   /// isSOImmTwoPartVal - Return true if the specified value can be obtained by
   /// or'ing together two SOImmVal's.
   static inline bool isSOImmTwoPartVal(unsigned V) {

Modified: llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp?rev=101114&r1=101113&r2=101114&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp Mon Apr 12 21:11:48 2010
@@ -225,7 +225,7 @@
 static void printSOImm(raw_ostream &O, int64_t V, bool VerboseAsm,
                        const MCAsmInfo *MAI) {
   // Break it up into two parts that make up a shifter immediate.
-  V = ARM_AM::getSOImmValOneOrNoRotate(V);
+  V = ARM_AM::getSOImmVal(V);
   assert(V != -1 && "Not a valid so_imm value!");
   
   unsigned Imm = ARM_AM::getSOImmValImm(V);




From evan.cheng at apple.com  Mon Apr 12 21:20:21 2010
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 12 Apr 2010 19:20:21 -0700
Subject: [llvm-commits] [llvm] r101075 - in /llvm/trunk:
	lib/Target/X86/X86InstrInfo.cpp test/CodeGen/X86/brcond.ll
In-Reply-To: <667DBFC7-8ED4-4C68-AC13-9468E25031EB@gmail.com>
References: <20100412221957.EBF8A2A6C12C@llvm.org>
	<000E7360-B5FF-460E-80EF-F8A69D74C0DF@apple.com>
	<26E362DF-1C47-4A0C-B259-0A6AFC5E5B37@apple.com>
	<FCDEA618-97D0-457D-AB36-E695A89C0D62@apple.com>
	<1670CEA8-B035-4FCA-B5A6-549664FC826C@apple.com>
	<C39AC7F0-E69E-491F-A65E-FE5CFC9ED74E@apple.com>
	<667DBFC7-8ED4-4C68-AC13-9468E25031EB@gmail.com>
Message-ID: <FB543B92-067C-4DC9-B92C-7C91959CE4C9@apple.com>


On Apr 12, 2010, at 6:24 PM, Bill Wendling wrote:

> On Apr 12, 2010, at 5:18 PM, Chris Lattner wrote:
> 
>>>>> // If the prior block branches here on true and somewhere else on false, and
>>>>> // if the branch condition is reversible, reverse the branch to create a
>>>>> // fall-through.
>>>>> if (PriorTBB == MBB) {
>>>>>   SmallVector<MachineOperand, 4> NewPriorCond(PriorCond);
>>>>>   if (!TII->ReverseBranchCondition(NewPriorCond)) {
>>>>>     TII->RemoveBranch(PrevBB);
>>>>>     TII->InsertBranch(PrevBB, PriorFBB, 0, NewPriorCond);
>>>>>     MadeChange = true;
>>>>>     ++NumBranchOpts;
>>>>>     goto ReoptimizeBlock;
>>>>>   }
>>>>> }
>>>>> 
>>>>> Why doesn't it work in this case?
>>>> 
>>>> I was curious too. CodeGenPrepare has split a critical edge for a PHI
>>>> node, however after register allocation it turns out that no copy was
>>>> needed, so the jmp is actually in a separate basic block from the
>>>> jne, jp.
>>> 
>>> 
>>> In that case, branch folding should be removing the block that consists of only an unconditional branch:
>>> 
>>>     // If this block is just an unconditional branch to CurTBB, we can
>>>     // usually completely eliminate the block.  The only case we cannot
>>>     // completely eliminate the block is when the block before this one
>>>     // falls through into MBB and we can't understand the prior block's branch
>>>     // condition.
>>>     if (MBB->empty()) {
>>>        <too long to quote, but appears to do what the comment says>
>>> 
>>> so why doesn't *that* work?
>>> 
>> 
>> I think that answering these questions (and fixing the problem) is a much better idea than hacking the X86 backend to handle one specific case of this.
>> 
> The problem lies in this bit of code in X86InstrInfo::AnalyzeBranch:
> 
>     // If they differ, see if they fit one of the known patterns. Theoretically,                                                                                         
>     // we could handle more patterns here, but we shouldn't expect to see them                                                                                           
>     // if instruction selection has done a reasonable job.                                                                                                               
>     if ((OldBranchCode == X86::COND_NP &&
>          BranchCode == X86::COND_E) ||
>         (OldBranchCode == X86::COND_E &&
>          BranchCode == X86::COND_NP))
>       BranchCode = X86::COND_NP_OR_E;
>     else if ((OldBranchCode == X86::COND_P &&
>               BranchCode == X86::COND_NE) ||
>              (OldBranchCode == X86::COND_NE &&
>               BranchCode == X86::COND_P))
>       BranchCode = X86::COND_NE_OR_P;
>     else
>       return true;
> 
> When the code in BranchFolding calls "ReverseBranchCondition", the X86 back-end isn't able to handle it. So it doesn't change the branch conditions.
> 
> If you look for the bits of code that handle COND_NP_OR_E and COND_NE_OR_P there doesn't seem to be any optimizations done with them. X86InstrInfo::InsertBranch looks at them and inserts two branches.
> 
> What is the rationale behind converting a JE/JNP and JNE/JP into COND_NE_OR_P and COND_NP_OR_E?

I think these are used to merge two conditional branches into one and split them back out again later. It seems like a hack to allow AnalyzeBranch to handle BB with two conditional branches. They correspond to OEQ and UNE.

Is it possible to teach ReverseBranchCondition to do the right thing? Ain't OEQ the reverse of UNE and vice versa?

Evan

> 
> -bw
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits

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From sabre at nondot.org  Mon Apr 12 23:35:39 2010
From: sabre at nondot.org (Chris Lattner)
Date: Tue, 13 Apr 2010 04:35:39 -0000
Subject: [llvm-commits] [llvm] r101116 -
	/llvm/trunk/lib/Support/GraphWriter.cpp
Message-ID: <20100413043539.650B32A6C12C@llvm.org>

Author: lattner
Date: Mon Apr 12 23:35:39 2010
New Revision: 101116

URL: http://llvm.org/viewvc/llvm-project?rev=101116&view=rev
Log:
Fix PR6826: GraphWriter delete the generated file before "dotty" load it,
patch by 'ether'.

Modified:
    llvm/trunk/lib/Support/GraphWriter.cpp

Modified: llvm/trunk/lib/Support/GraphWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/GraphWriter.cpp?rev=101116&r1=101115&r2=101116&view=diff
==============================================================================
--- llvm/trunk/lib/Support/GraphWriter.cpp (original)
+++ llvm/trunk/lib/Support/GraphWriter.cpp Mon Apr 12 23:35:39 2010
@@ -166,7 +166,8 @@
      errs() << "Error viewing graph " << Filename.str() << ": "
             << ErrMsg << "\n";
   } else {
-#ifdef __MINGW32__ // Dotty spawns another app and doesn't wait until it returns
+// Dotty spawns another app and doesn't wait until it returns
+#if defined (__MINGW32__) || defined (_WINDOWS)
     return;
 #endif
     Filename.eraseFromDisk();




From resistor at mac.com  Tue Apr 13 00:24:08 2010
From: resistor at mac.com (Owen Anderson)
Date: Tue, 13 Apr 2010 05:24:08 -0000
Subject: [llvm-commits] [llvm] r101117 - in /llvm/trunk:
 include/llvm/LinkAllPasses.h include/llvm/Transforms/Scalar.h
 lib/Transforms/Scalar/SCCVN.cpp
Message-ID: <20100413052408.8925C2A6C12C@llvm.org>

Author: resistor
Date: Tue Apr 13 00:24:08 2010
New Revision: 101117

URL: http://llvm.org/viewvc/llvm-project?rev=101117&view=rev
Log:
SCCVN, we hardly knew ye!

Removed:
    llvm/trunk/lib/Transforms/Scalar/SCCVN.cpp
Modified:
    llvm/trunk/include/llvm/LinkAllPasses.h
    llvm/trunk/include/llvm/Transforms/Scalar.h

Modified: llvm/trunk/include/llvm/LinkAllPasses.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/LinkAllPasses.h?rev=101117&r1=101116&r2=101117&view=diff
==============================================================================
--- llvm/trunk/include/llvm/LinkAllPasses.h (original)
+++ llvm/trunk/include/llvm/LinkAllPasses.h Tue Apr 13 00:24:08 2010
@@ -136,7 +136,6 @@
       (void) llvm::createSSIPass();
       (void) llvm::createSSIEverythingPass();
       (void) llvm::createGEPSplitterPass();
-      (void) llvm::createSCCVNPass();
       (void) llvm::createABCDPass();
       (void) llvm::createLintPass();
 

Modified: llvm/trunk/include/llvm/Transforms/Scalar.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Transforms/Scalar.h?rev=101117&r1=101116&r2=101117&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Transforms/Scalar.h (original)
+++ llvm/trunk/include/llvm/Transforms/Scalar.h Tue Apr 13 00:24:08 2010
@@ -326,12 +326,6 @@
 
 //===----------------------------------------------------------------------===//
 //
-// SCCVN - Aggressively eliminate redundant scalar values
-//
-FunctionPass *createSCCVNPass();
-
-//===----------------------------------------------------------------------===//
-//
 // ABCD - Elimination of Array Bounds Checks on Demand
 //
 FunctionPass *createABCDPass();

Removed: llvm/trunk/lib/Transforms/Scalar/SCCVN.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/SCCVN.cpp?rev=101116&view=auto
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/SCCVN.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/SCCVN.cpp (removed)
@@ -1,716 +0,0 @@
-//===- SCCVN.cpp - Eliminate redundant values -----------------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This pass performs global value numbering to eliminate fully redundant
-// instructions.  This is based on the paper "SCC-based Value Numbering"
-// by Cooper, et al.
-//
-//===----------------------------------------------------------------------===//
-
-#define DEBUG_TYPE "sccvn"
-#include "llvm/Transforms/Scalar.h"
-#include "llvm/BasicBlock.h"
-#include "llvm/Constants.h"
-#include "llvm/DerivedTypes.h"
-#include "llvm/Function.h"
-#include "llvm/Operator.h"
-#include "llvm/Value.h"
-#include "llvm/ADT/DenseMap.h"
-#include "llvm/ADT/DepthFirstIterator.h"
-#include "llvm/ADT/PostOrderIterator.h"
-#include "llvm/ADT/SmallPtrSet.h"
-#include "llvm/ADT/SmallVector.h"
-#include "llvm/ADT/SparseBitVector.h"
-#include "llvm/ADT/Statistic.h"
-#include "llvm/Analysis/Dominators.h"
-#include "llvm/Support/CFG.h"
-#include "llvm/Support/CommandLine.h"
-#include "llvm/Support/Debug.h"
-#include "llvm/Support/ErrorHandling.h"
-#include "llvm/Transforms/Utils/SSAUpdater.h"
-using namespace llvm;
-
-STATISTIC(NumSCCVNInstr,  "Number of instructions deleted by SCCVN");
-STATISTIC(NumSCCVNPhi,  "Number of phis deleted by SCCVN");
-
-//===----------------------------------------------------------------------===//
-//                         ValueTable Class
-//===----------------------------------------------------------------------===//
-
-/// This class holds the mapping between values and value numbers.  It is used
-/// as an efficient mechanism to determine the expression-wise equivalence of
-/// two values.
-namespace {
-  struct Expression {
-    enum ExpressionOpcode { ADD, FADD, SUB, FSUB, MUL, FMUL,
-                            UDIV, SDIV, FDIV, UREM, SREM,
-                            FREM, SHL, LSHR, ASHR, AND, OR, XOR, ICMPEQ,
-                            ICMPNE, ICMPUGT, ICMPUGE, ICMPULT, ICMPULE,
-                            ICMPSGT, ICMPSGE, ICMPSLT, ICMPSLE, FCMPOEQ,
-                            FCMPOGT, FCMPOGE, FCMPOLT, FCMPOLE, FCMPONE,
-                            FCMPORD, FCMPUNO, FCMPUEQ, FCMPUGT, FCMPUGE,
-                            FCMPULT, FCMPULE, FCMPUNE, EXTRACT, INSERT,
-                            SHUFFLE, SELECT, TRUNC, ZEXT, SEXT, FPTOUI,
-                            FPTOSI, UITOFP, SITOFP, FPTRUNC, FPEXT,
-                            PTRTOINT, INTTOPTR, BITCAST, GEP, CALL, CONSTANT,
-                            INSERTVALUE, EXTRACTVALUE, EMPTY, TOMBSTONE };
-
-    ExpressionOpcode opcode;
-    const Type* type;
-    SmallVector<uint32_t, 4> varargs;
-
-    Expression() { }
-    Expression(ExpressionOpcode o) : opcode(o) { }
-
-    bool operator==(const Expression &other) const {
-      if (opcode != other.opcode)
-        return false;
-      else if (opcode == EMPTY || opcode == TOMBSTONE)
-        return true;
-      else if (type != other.type)
-        return false;
-      else {
-        if (varargs.size() != other.varargs.size())
-          return false;
-
-        for (size_t i = 0; i < varargs.size(); ++i)
-          if (varargs[i] != other.varargs[i])
-            return false;
-
-        return true;
-      }
-    }
-
-    bool operator!=(const Expression &other) const {
-      return !(*this == other);
-    }
-  };
-
-  class ValueTable {
-    private:
-      DenseMap<Value*, uint32_t> valueNumbering;
-      DenseMap<Expression, uint32_t> expressionNumbering;
-      DenseMap<Value*, uint32_t> constantsNumbering;
-
-      uint32_t nextValueNumber;
-
-      Expression::ExpressionOpcode getOpcode(BinaryOperator* BO);
-      Expression::ExpressionOpcode getOpcode(CmpInst* C);
-      Expression::ExpressionOpcode getOpcode(CastInst* C);
-      Expression create_expression(BinaryOperator* BO);
-      Expression create_expression(CmpInst* C);
-      Expression create_expression(ShuffleVectorInst* V);
-      Expression create_expression(ExtractElementInst* C);
-      Expression create_expression(InsertElementInst* V);
-      Expression create_expression(SelectInst* V);
-      Expression create_expression(CastInst* C);
-      Expression create_expression(GetElementPtrInst* G);
-      Expression create_expression(CallInst* C);
-      Expression create_expression(Constant* C);
-      Expression create_expression(ExtractValueInst* C);
-      Expression create_expression(InsertValueInst* C);
-    public:
-      ValueTable() : nextValueNumber(1) { }
-      uint32_t computeNumber(Value *V);
-      uint32_t lookup(Value *V);
-      void add(Value *V, uint32_t num);
-      void clear();
-      void clearExpressions();
-      void erase(Value *v);
-      unsigned size();
-      void verifyRemoved(const Value *) const;
-  };
-}
-
-namespace llvm {
-template <> struct DenseMapInfo<Expression> {
-  static inline Expression getEmptyKey() {
-    return Expression(Expression::EMPTY);
-  }
-
-  static inline Expression getTombstoneKey() {
-    return Expression(Expression::TOMBSTONE);
-  }
-
-  static unsigned getHashValue(const Expression e) {
-    unsigned hash = e.opcode;
-
-    hash = ((unsigned)((uintptr_t)e.type >> 4) ^
-            (unsigned)((uintptr_t)e.type >> 9));
-
-    for (SmallVector<uint32_t, 4>::const_iterator I = e.varargs.begin(),
-         E = e.varargs.end(); I != E; ++I)
-      hash = *I + hash * 37;
-
-    return hash;
-  }
-  static bool isEqual(const Expression &LHS, const Expression &RHS) {
-    return LHS == RHS;
-  }
-};
-template <>
-struct isPodLike<Expression> { static const bool value = true; };
-
-}
-
-//===----------------------------------------------------------------------===//
-//                     ValueTable Internal Functions
-//===----------------------------------------------------------------------===//
-Expression::ExpressionOpcode ValueTable::getOpcode(BinaryOperator* BO) {
-  switch(BO->getOpcode()) {
-  default: // THIS SHOULD NEVER HAPPEN
-    llvm_unreachable("Binary operator with unknown opcode?");
-  case Instruction::Add:  return Expression::ADD;
-  case Instruction::FAdd: return Expression::FADD;
-  case Instruction::Sub:  return Expression::SUB;
-  case Instruction::FSub: return Expression::FSUB;
-  case Instruction::Mul:  return Expression::MUL;
-  case Instruction::FMul: return Expression::FMUL;
-  case Instruction::UDiv: return Expression::UDIV;
-  case Instruction::SDiv: return Expression::SDIV;
-  case Instruction::FDiv: return Expression::FDIV;
-  case Instruction::URem: return Expression::UREM;
-  case Instruction::SRem: return Expression::SREM;
-  case Instruction::FRem: return Expression::FREM;
-  case Instruction::Shl:  return Expression::SHL;
-  case Instruction::LShr: return Expression::LSHR;
-  case Instruction::AShr: return Expression::ASHR;
-  case Instruction::And:  return Expression::AND;
-  case Instruction::Or:   return Expression::OR;
-  case Instruction::Xor:  return Expression::XOR;
-  }
-}
-
-Expression::ExpressionOpcode ValueTable::getOpcode(CmpInst* C) {
-  if (isa<ICmpInst>(C)) {
-    switch (C->getPredicate()) {
-    default:  // THIS SHOULD NEVER HAPPEN
-      llvm_unreachable("Comparison with unknown predicate?");
-    case ICmpInst::ICMP_EQ:  return Expression::ICMPEQ;
-    case ICmpInst::ICMP_NE:  return Expression::ICMPNE;
-    case ICmpInst::ICMP_UGT: return Expression::ICMPUGT;
-    case ICmpInst::ICMP_UGE: return Expression::ICMPUGE;
-    case ICmpInst::ICMP_ULT: return Expression::ICMPULT;
-    case ICmpInst::ICMP_ULE: return Expression::ICMPULE;
-    case ICmpInst::ICMP_SGT: return Expression::ICMPSGT;
-    case ICmpInst::ICMP_SGE: return Expression::ICMPSGE;
-    case ICmpInst::ICMP_SLT: return Expression::ICMPSLT;
-    case ICmpInst::ICMP_SLE: return Expression::ICMPSLE;
-    }
-  } else {
-    switch (C->getPredicate()) {
-    default: // THIS SHOULD NEVER HAPPEN
-      llvm_unreachable("Comparison with unknown predicate?");
-    case FCmpInst::FCMP_OEQ: return Expression::FCMPOEQ;
-    case FCmpInst::FCMP_OGT: return Expression::FCMPOGT;
-    case FCmpInst::FCMP_OGE: return Expression::FCMPOGE;
-    case FCmpInst::FCMP_OLT: return Expression::FCMPOLT;
-    case FCmpInst::FCMP_OLE: return Expression::FCMPOLE;
-    case FCmpInst::FCMP_ONE: return Expression::FCMPONE;
-    case FCmpInst::FCMP_ORD: return Expression::FCMPORD;
-    case FCmpInst::FCMP_UNO: return Expression::FCMPUNO;
-    case FCmpInst::FCMP_UEQ: return Expression::FCMPUEQ;
-    case FCmpInst::FCMP_UGT: return Expression::FCMPUGT;
-    case FCmpInst::FCMP_UGE: return Expression::FCMPUGE;
-    case FCmpInst::FCMP_ULT: return Expression::FCMPULT;
-    case FCmpInst::FCMP_ULE: return Expression::FCMPULE;
-    case FCmpInst::FCMP_UNE: return Expression::FCMPUNE;
-    }
-  }
-}
-
-Expression::ExpressionOpcode ValueTable::getOpcode(CastInst* C) {
-  switch(C->getOpcode()) {
-  default: // THIS SHOULD NEVER HAPPEN
-    llvm_unreachable("Cast operator with unknown opcode?");
-  case Instruction::Trunc:    return Expression::TRUNC;
-  case Instruction::ZExt:     return Expression::ZEXT;
-  case Instruction::SExt:     return Expression::SEXT;
-  case Instruction::FPToUI:   return Expression::FPTOUI;
-  case Instruction::FPToSI:   return Expression::FPTOSI;
-  case Instruction::UIToFP:   return Expression::UITOFP;
-  case Instruction::SIToFP:   return Expression::SITOFP;
-  case Instruction::FPTrunc:  return Expression::FPTRUNC;
-  case Instruction::FPExt:    return Expression::FPEXT;
-  case Instruction::PtrToInt: return Expression::PTRTOINT;
-  case Instruction::IntToPtr: return Expression::INTTOPTR;
-  case Instruction::BitCast:  return Expression::BITCAST;
-  }
-}
-
-Expression ValueTable::create_expression(CallInst* C) {
-  Expression e;
-
-  e.type = C->getType();
-  e.opcode = Expression::CALL;
-
-  e.varargs.push_back(lookup(C->getCalledFunction()));
-  for (CallInst::op_iterator I = C->op_begin()+1, E = C->op_end();
-       I != E; ++I)
-    e.varargs.push_back(lookup(*I));
-
-  return e;
-}
-
-Expression ValueTable::create_expression(BinaryOperator* BO) {
-  Expression e;
-  e.varargs.push_back(lookup(BO->getOperand(0)));
-  e.varargs.push_back(lookup(BO->getOperand(1)));
-  e.type = BO->getType();
-  e.opcode = getOpcode(BO);
-
-  return e;
-}
-
-Expression ValueTable::create_expression(CmpInst* C) {
-  Expression e;
-
-  e.varargs.push_back(lookup(C->getOperand(0)));
-  e.varargs.push_back(lookup(C->getOperand(1)));
-  e.type = C->getType();
-  e.opcode = getOpcode(C);
-
-  return e;
-}
-
-Expression ValueTable::create_expression(CastInst* C) {
-  Expression e;
-
-  e.varargs.push_back(lookup(C->getOperand(0)));
-  e.type = C->getType();
-  e.opcode = getOpcode(C);
-
-  return e;
-}
-
-Expression ValueTable::create_expression(ShuffleVectorInst* S) {
-  Expression e;
-
-  e.varargs.push_back(lookup(S->getOperand(0)));
-  e.varargs.push_back(lookup(S->getOperand(1)));
-  e.varargs.push_back(lookup(S->getOperand(2)));
-  e.type = S->getType();
-  e.opcode = Expression::SHUFFLE;
-
-  return e;
-}
-
-Expression ValueTable::create_expression(ExtractElementInst* E) {
-  Expression e;
-
-  e.varargs.push_back(lookup(E->getOperand(0)));
-  e.varargs.push_back(lookup(E->getOperand(1)));
-  e.type = E->getType();
-  e.opcode = Expression::EXTRACT;
-
-  return e;
-}
-
-Expression ValueTable::create_expression(InsertElementInst* I) {
-  Expression e;
-
-  e.varargs.push_back(lookup(I->getOperand(0)));
-  e.varargs.push_back(lookup(I->getOperand(1)));
-  e.varargs.push_back(lookup(I->getOperand(2)));
-  e.type = I->getType();
-  e.opcode = Expression::INSERT;
-
-  return e;
-}
-
-Expression ValueTable::create_expression(SelectInst* I) {
-  Expression e;
-
-  e.varargs.push_back(lookup(I->getCondition()));
-  e.varargs.push_back(lookup(I->getTrueValue()));
-  e.varargs.push_back(lookup(I->getFalseValue()));
-  e.type = I->getType();
-  e.opcode = Expression::SELECT;
-
-  return e;
-}
-
-Expression ValueTable::create_expression(GetElementPtrInst* G) {
-  Expression e;
-
-  e.varargs.push_back(lookup(G->getPointerOperand()));
-  e.type = G->getType();
-  e.opcode = Expression::GEP;
-
-  for (GetElementPtrInst::op_iterator I = G->idx_begin(), E = G->idx_end();
-       I != E; ++I)
-    e.varargs.push_back(lookup(*I));
-
-  return e;
-}
-
-Expression ValueTable::create_expression(ExtractValueInst* E) {
-  Expression e;
-
-  e.varargs.push_back(lookup(E->getAggregateOperand()));
-  for (ExtractValueInst::idx_iterator II = E->idx_begin(), IE = E->idx_end();
-       II != IE; ++II)
-    e.varargs.push_back(*II);
-  e.type = E->getType();
-  e.opcode = Expression::EXTRACTVALUE;
-
-  return e;
-}
-
-Expression ValueTable::create_expression(InsertValueInst* E) {
-  Expression e;
-
-  e.varargs.push_back(lookup(E->getAggregateOperand()));
-  e.varargs.push_back(lookup(E->getInsertedValueOperand()));
-  for (InsertValueInst::idx_iterator II = E->idx_begin(), IE = E->idx_end();
-       II != IE; ++II)
-    e.varargs.push_back(*II);
-  e.type = E->getType();
-  e.opcode = Expression::INSERTVALUE;
-
-  return e;
-}
-
-//===----------------------------------------------------------------------===//
-//                     ValueTable External Functions
-//===----------------------------------------------------------------------===//
-
-/// add - Insert a value into the table with a specified value number.
-void ValueTable::add(Value *V, uint32_t num) {
-  valueNumbering[V] = num;
-}
-
-/// computeNumber - Returns the value number for the specified value, assigning
-/// it a new number if it did not have one before.
-uint32_t ValueTable::computeNumber(Value *V) {
-  if (uint32_t v = valueNumbering[V])
-    return v;
-  else if (uint32_t v= constantsNumbering[V])
-    return v;
-
-  if (!isa<Instruction>(V)) {
-    constantsNumbering[V] = nextValueNumber;
-    return nextValueNumber++;
-  }
-  
-  Instruction* I = cast<Instruction>(V);
-  Expression exp;
-  switch (I->getOpcode()) {
-    case Instruction::Add:
-    case Instruction::FAdd:
-    case Instruction::Sub:
-    case Instruction::FSub:
-    case Instruction::Mul:
-    case Instruction::FMul:
-    case Instruction::UDiv:
-    case Instruction::SDiv:
-    case Instruction::FDiv:
-    case Instruction::URem:
-    case Instruction::SRem:
-    case Instruction::FRem:
-    case Instruction::Shl:
-    case Instruction::LShr:
-    case Instruction::AShr:
-    case Instruction::And:
-    case Instruction::Or :
-    case Instruction::Xor:
-      exp = create_expression(cast<BinaryOperator>(I));
-      break;
-    case Instruction::ICmp:
-    case Instruction::FCmp:
-      exp = create_expression(cast<CmpInst>(I));
-      break;
-    case Instruction::Trunc:
-    case Instruction::ZExt:
-    case Instruction::SExt:
-    case Instruction::FPToUI:
-    case Instruction::FPToSI:
-    case Instruction::UIToFP:
-    case Instruction::SIToFP:
-    case Instruction::FPTrunc:
-    case Instruction::FPExt:
-    case Instruction::PtrToInt:
-    case Instruction::IntToPtr:
-    case Instruction::BitCast:
-      exp = create_expression(cast<CastInst>(I));
-      break;
-    case Instruction::Select:
-      exp = create_expression(cast<SelectInst>(I));
-      break;
-    case Instruction::ExtractElement:
-      exp = create_expression(cast<ExtractElementInst>(I));
-      break;
-    case Instruction::InsertElement:
-      exp = create_expression(cast<InsertElementInst>(I));
-      break;
-    case Instruction::ShuffleVector:
-      exp = create_expression(cast<ShuffleVectorInst>(I));
-      break;
-    case Instruction::ExtractValue:
-      exp = create_expression(cast<ExtractValueInst>(I));
-      break;
-    case Instruction::InsertValue:
-      exp = create_expression(cast<InsertValueInst>(I));
-      break;      
-    case Instruction::GetElementPtr:
-      exp = create_expression(cast<GetElementPtrInst>(I));
-      break;
-    default:
-      valueNumbering[V] = nextValueNumber;
-      return nextValueNumber++;
-  }
-
-  uint32_t& e = expressionNumbering[exp];
-  if (!e) e = nextValueNumber++;
-  valueNumbering[V] = e;
-  
-  return e;
-}
-
-/// lookup - Returns the value number of the specified value. Returns 0 if
-/// the value has not yet been numbered.
-uint32_t ValueTable::lookup(Value *V) {
-  if (!isa<Instruction>(V)) {
-    if (!constantsNumbering.count(V))
-      constantsNumbering[V] = nextValueNumber++;
-    return constantsNumbering[V];
-  }
-  
-  return valueNumbering[V];
-}
-
-/// clear - Remove all entries from the ValueTable
-void ValueTable::clear() {
-  valueNumbering.clear();
-  expressionNumbering.clear();
-  constantsNumbering.clear();
-  nextValueNumber = 1;
-}
-
-void ValueTable::clearExpressions() {
-  expressionNumbering.clear();
-  constantsNumbering.clear();
-  nextValueNumber = 1;
-}
-
-/// erase - Remove a value from the value numbering
-void ValueTable::erase(Value *V) {
-  valueNumbering.erase(V);
-}
-
-/// verifyRemoved - Verify that the value is removed from all internal data
-/// structures.
-void ValueTable::verifyRemoved(const Value *V) const {
-  for (DenseMap<Value*, uint32_t>::const_iterator
-         I = valueNumbering.begin(), E = valueNumbering.end(); I != E; ++I) {
-    assert(I->first != V && "Inst still occurs in value numbering map!");
-  }
-}
-
-//===----------------------------------------------------------------------===//
-//                              SCCVN Pass
-//===----------------------------------------------------------------------===//
-
-namespace {
-
-  struct ValueNumberScope {
-    ValueNumberScope* parent;
-    DenseMap<uint32_t, Value*> table;
-    SparseBitVector<128> availIn;
-    SparseBitVector<128> availOut;
-    
-    ValueNumberScope(ValueNumberScope* p) : parent(p) { }
-  };
-
-  class SCCVN : public FunctionPass {
-    bool runOnFunction(Function &F);
-  public:
-    static char ID; // Pass identification, replacement for typeid
-    SCCVN() : FunctionPass(&ID) { }
-
-  private:
-    ValueTable VT;
-    DenseMap<BasicBlock*, ValueNumberScope*> BBMap;
-    
-    // This transformation requires dominator postdominator info
-    virtual void getAnalysisUsage(AnalysisUsage &AU) const {
-      AU.addRequired<DominatorTree>();
-
-      AU.addPreserved<DominatorTree>();
-      AU.setPreservesCFG();
-    }
-  };
-
-  char SCCVN::ID = 0;
-}
-
-// createSCCVNPass - The public interface to this file...
-FunctionPass *llvm::createSCCVNPass() { return new SCCVN(); }
-
-static RegisterPass<SCCVN> X("sccvn",
-                              "SCC Value Numbering");
-
-static Value *lookupNumber(ValueNumberScope *Locals, uint32_t num) {
-  while (Locals) {
-    DenseMap<uint32_t, Value*>::iterator I = Locals->table.find(num);
-    if (I != Locals->table.end())
-      return I->second;
-    Locals = Locals->parent;
-  }
-
-  return 0;
-}
-
-bool SCCVN::runOnFunction(Function& F) {
-  // Implement the RPO version of the SCCVN algorithm.  Conceptually, 
-  // we optimisitically assume that all instructions with the same opcode have
-  // the same VN.  Then we deepen our comparison by one level, to all 
-  // instructions whose operands have the same opcodes get the same VN.  We
-  // iterate this process until the partitioning stops changing, at which
-  // point we have computed a full numbering.
-  ReversePostOrderTraversal<Function*> RPOT(&F);
-  bool done = false;
-  while (!done) {
-    done = true;
-    VT.clearExpressions();
-    for (ReversePostOrderTraversal<Function*>::rpo_iterator I = RPOT.begin(),
-         E = RPOT.end(); I != E; ++I) {
-      BasicBlock* BB = *I;
-      for (BasicBlock::iterator BI = BB->begin(), BE = BB->end();
-           BI != BE; ++BI) {
-         uint32_t origVN = VT.lookup(BI);
-         uint32_t newVN = VT.computeNumber(BI);
-         if (origVN != newVN)
-           done = false;
-      }
-    }
-  }
-  
-  // Now, do a dominator walk, eliminating simple, dominated redundancies as we
-  // go.  Also, build the ValueNumberScope structure that will be used for
-  // computing full availability.
-  DominatorTree& DT = getAnalysis<DominatorTree>();
-  bool changed = false;
-  for (df_iterator<DomTreeNode*> DI = df_begin(DT.getRootNode()),
-       DE = df_end(DT.getRootNode()); DI != DE; ++DI) {
-    BasicBlock* BB = DI->getBlock();
-    if (DI->getIDom())
-      BBMap[BB] = new ValueNumberScope(BBMap[DI->getIDom()->getBlock()]);
-    else
-      BBMap[BB] = new ValueNumberScope(0);
-    
-    for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ) {
-      uint32_t num = VT.lookup(I);
-      Value* repl = lookupNumber(BBMap[BB], num);
-      
-      if (repl) {
-        if (isa<PHINode>(I))
-          ++NumSCCVNPhi;
-        else
-          ++NumSCCVNInstr;
-        I->replaceAllUsesWith(repl);
-        Instruction* OldInst = I;
-        ++I;
-        BBMap[BB]->table[num] = repl;
-        OldInst->eraseFromParent();
-        changed = true;
-      } else {
-        BBMap[BB]->table[num] = I;
-        BBMap[BB]->availOut.set(num);
-  
-        ++I;
-      }
-    }
-  }
-
-  // Perform a forward data-flow to compute availability at all points on
-  // the CFG.
-  do {
-    changed = false;
-    for (ReversePostOrderTraversal<Function*>::rpo_iterator I = RPOT.begin(),
-         E = RPOT.end(); I != E; ++I) {
-      BasicBlock* BB = *I;
-      ValueNumberScope *VNS = BBMap[BB];
-      
-      SparseBitVector<128> preds;
-      bool first = true;
-      for (pred_iterator PI = pred_begin(BB), PE = pred_end(BB);
-           PI != PE; ++PI) {
-        if (first) {
-          preds = BBMap[*PI]->availOut;
-          first = false;
-        } else {
-          preds &= BBMap[*PI]->availOut;
-        }
-      }
-      
-      changed |= (VNS->availIn |= preds);
-      changed |= (VNS->availOut |= preds);
-    }
-  } while (changed);
-  
-  // Use full availability information to perform non-dominated replacements.
-  SSAUpdater SSU; 
-  for (Function::iterator FI = F.begin(), FE = F.end(); FI != FE; ++FI) {
-    if (!BBMap.count(FI)) continue;
-    for (BasicBlock::iterator BI = FI->begin(), BE = FI->end();
-         BI != BE; ) {
-      uint32_t num = VT.lookup(BI);
-      if (!BBMap[FI]->availIn.test(num)) {
-        ++BI;
-        continue;
-      }
-      
-      SSU.Initialize(BI);
-      
-      SmallPtrSet<BasicBlock*, 8> visited;
-      SmallVector<BasicBlock*, 8> stack;
-      visited.insert(FI);
-      for (pred_iterator PI = pred_begin(FI), PE = pred_end(FI);
-           PI != PE; ++PI)
-        if (!visited.count(*PI))
-          stack.push_back(*PI);
-      
-      while (!stack.empty()) {
-        BasicBlock* CurrBB = stack.pop_back_val();
-        visited.insert(CurrBB);
-        
-        ValueNumberScope* S = BBMap[CurrBB];
-        if (S->table.count(num)) {
-          SSU.AddAvailableValue(CurrBB, S->table[num]);
-        } else {
-          for (pred_iterator PI = pred_begin(CurrBB), PE = pred_end(CurrBB);
-               PI != PE; ++PI)
-            if (!visited.count(*PI))
-              stack.push_back(*PI);
-        }
-      }
-      
-      Value* repl = SSU.GetValueInMiddleOfBlock(FI);
-      BI->replaceAllUsesWith(repl);
-      Instruction* CurInst = BI;
-      ++BI;
-      BBMap[FI]->table[num] = repl;
-      if (isa<PHINode>(CurInst))
-        ++NumSCCVNPhi;
-      else
-        ++NumSCCVNInstr;
-        
-      CurInst->eraseFromParent();
-    }
-  }
-
-  VT.clear();
-  for (DenseMap<BasicBlock*, ValueNumberScope*>::iterator
-       I = BBMap.begin(), E = BBMap.end(); I != E; ++I)
-    delete I->second;
-  BBMap.clear();
-  
-  return changed;
-}




From sabre at nondot.org  Tue Apr 13 01:37:00 2010
From: sabre at nondot.org (Chris Lattner)
Date: Tue, 13 Apr 2010 06:37:00 -0000
Subject: [llvm-commits] [llvm] r101118 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <20100413063701.164112A6C12C@llvm.org>

Author: lattner
Date: Tue Apr 13 01:37:00 2010
New Revision: 101118

URL: http://llvm.org/viewvc/llvm-project?rev=101118&view=rev
Log:
checkpoint.

Modified:
    llvm/trunk/docs/ReleaseNotes.html

Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=101118&r1=101117&r2=101118&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Tue Apr 13 01:37:00 2010
@@ -28,11 +28,12 @@
   <p>Written by the <a href="http://llvm.org">LLVM Team</a></p>
 </div>
 
+<!--
 <h1 style="color:red">These are in-progress notes for the upcoming LLVM 2.7
 release.<br>
 You may prefer the
 <a href="http://llvm.org/releases/2.6/docs/ReleaseNotes.html">LLVM 2.6
-Release Notes</a>.</h1>
+Release Notes</a>.</h1>-->
 
 <!-- *********************************************************************** -->
 <div class="doc_section">
@@ -71,7 +72,7 @@
   include/llvm/Analysis/LiveValues.h => Dan
   lib/Transforms/IPO/MergeFunctions.cpp => consider for 2.8.
   llvm/Analysis/PointerTracking.h => Edwin wants this, consider for 2.8.
-  ABCD, SCCVN, GEPSplitterPass
+  ABCD, GEPSplitterPass
   MSIL backend?
   lib/Transforms/Utils/SSI.cpp  -> ABCD depends on it.
 -->
@@ -532,17 +533,30 @@
   them up.
 Combiner-AA improvements, why not on by default?
 Pre-regalloc tail duplication
-x86 sibcall optimization
+x86 sibcall / tailcall optimization in CCC mode.
 New LSR with full strength reduction mode
 The most awesome sext / zext optimization pass. ?
-
+Better code size analysis in loop unswitch, inliner code split out to a new 
+  CodeMetrics class for reuse.
 The ARM backend now has good support for ARMv4 backend (tested on StrongARM
   hardware), previously only supported ARMv4T and newer.
-
+Half-float support in APFloat
+Indirect branch + address of label (blog post), particularly useful for interpreters.
+Many changes to the pass ordering for improved optimization effectiveness.  
+
+Opt now works conservatively if no target data is set (is this fully working?)
+Target data now has notion of 'native' integer data types which optimizations can use.
+ARM backend generates instructions in unified assembly syntax.
+New Analysis/InstructionSimplify.h interface for simplifying instructions that don't exist.
+Jump threading is now much more aggressive at simplifying correlated
+   conditionals and threading blocks with otherwise complex logic. CondProp pass
+   removed (functionality merged into jump threading).
+X86 and XCore supports returning arbitrary return values, returning too many values is
+   supported by returning through a hidden pointer.
+verbose-asm now produces information about spill slots and loop nests
 
 
 Defaults to RTTI off, packagers should build with make REQUIRE_RTTI=1.
-CondProp pass removed (functionality merged into jump threading).
 AndersAA got removed (from 2.7 or mainline?)
 PredSimplify, LoopVR, GVNPRE got removed.
 LLVM command line tools now overwrite their output, before they would only do this with -f.




From baldrick at free.fr  Tue Apr 13 02:15:16 2010
From: baldrick at free.fr (Duncan Sands)
Date: Tue, 13 Apr 2010 07:15:16 -0000
Subject: [llvm-commits] [dragonegg] r101121 -
	/dragonegg/trunk/extras/do_self_strap
Message-ID: <20100413071516.228FC2A6C12C@llvm.org>

Author: baldrick
Date: Tue Apr 13 02:15:15 2010
New Revision: 101121

URL: http://llvm.org/viewvc/llvm-project?rev=101121&view=rev
Log:
Have the buildbots build dragonegg verbosely.

Modified:
    dragonegg/trunk/extras/do_self_strap

Modified: dragonegg/trunk/extras/do_self_strap
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/extras/do_self_strap?rev=101121&r1=101120&r2=101121&view=diff
==============================================================================
--- dragonegg/trunk/extras/do_self_strap (original)
+++ dragonegg/trunk/extras/do_self_strap Tue Apr 13 02:15:15 2010
@@ -186,7 +186,7 @@
   mkdir -p $DRAGONEGG_BUILD-pre
   cd $DRAGONEGG_BUILD-pre
   $MAKE -f $DRAGONEGG_SOURCE/Makefile clean
-  SRC_DIR=$DRAGONEGG_SOURCE $MAKE -f $DRAGONEGG_SOURCE/Makefile
+  SRC_DIR=$DRAGONEGG_SOURCE $MAKE -f $DRAGONEGG_SOURCE/Makefile VERBOSE=1
   # <== end: Build dragonegg using the just built GCC and DRAGONEGG.
 
 
@@ -203,7 +203,7 @@
   mkdir -p $DRAGONEGG_BUILD
   cd $DRAGONEGG_BUILD
   $MAKE -f $DRAGONEGG_SOURCE/Makefile clean
-  SRC_DIR=$DRAGONEGG_SOURCE $MAKE -f $DRAGONEGG_SOURCE/Makefile
+  SRC_DIR=$DRAGONEGG_SOURCE $MAKE -f $DRAGONEGG_SOURCE/Makefile VERBOSE=1
   # <== end: Build dragonegg again using the just built dragonegg
 
 




From baldrick at free.fr  Tue Apr 13 02:45:47 2010
From: baldrick at free.fr (Duncan Sands)
Date: Tue, 13 Apr 2010 07:45:47 -0000
Subject: [llvm-commits] [dragonegg] r101123 - /dragonegg/trunk/Makefile
Message-ID: <20100413074547.8F6DA2A6C12E@llvm.org>

Author: baldrick
Date: Tue Apr 13 02:45:47 2010
New Revision: 101123

URL: http://llvm.org/viewvc/llvm-project?rev=101123&view=rev
Log:
LD_OPTIONS needs to go after the plugin objects.

Modified:
    dragonegg/trunk/Makefile

Modified: dragonegg/trunk/Makefile
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/Makefile?rev=101123&r1=101122&r2=101123&view=diff
==============================================================================
--- dragonegg/trunk/Makefile (original)
+++ dragonegg/trunk/Makefile Tue Apr 13 02:45:47 2010
@@ -83,10 +83,11 @@
 
 $(PLUGIN): $(PLUGIN_OBJECTS) $(TARGET_OBJECT) $(TARGET_UTIL)
 	@echo Linking $@
-	$(QUIET)$(CXX) $(LOADABLE_MODULE_OPTIONS) $(LD_OPTIONS) \
-	$(CXXFLAGS) -o $@ $(PLUGIN_OBJECTS) $(TARGET_OBJECT) \
+	$(QUIET)$(CXX) $(LOADABLE_MODULE_OPTIONS) $(CXXFLAGS) \
+	-o $@ $(PLUGIN_OBJECTS) $(TARGET_OBJECT) $(LD_OPTIONS) \
 	$(shell $(LLVM_CONFIG) --libs $(shell $(TARGET_UTIL) -p))
 
+
 clean::
 	$(QUIET)rm -f *.o *.d $(PLUGIN) $(TARGET_UTIL)
 




From baldrick at free.fr  Tue Apr 13 03:00:24 2010
From: baldrick at free.fr (Duncan Sands)
Date: Tue, 13 Apr 2010 08:00:24 -0000
Subject: [llvm-commits] [dragonegg] r101124 -
	/dragonegg/trunk/llvm-convert.cpp
Message-ID: <20100413080024.EA1D42A6C12C@llvm.org>

Author: baldrick
Date: Tue Apr 13 03:00:24 2010
New Revision: 101124

URL: http://llvm.org/viewvc/llvm-project?rev=101124&view=rev
Log:
Work around the bad interaction of dwarf exception handling and
invoke inlining using the traditional hack of pushing a catch-all
onto the end of the type list.  This is known to be inadequate,
but will do for the moment.

Modified:
    dragonegg/trunk/llvm-convert.cpp

Modified: dragonegg/trunk/llvm-convert.cpp
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/llvm-convert.cpp?rev=101124&r1=101123&r2=101124&view=diff
==============================================================================
--- dragonegg/trunk/llvm-convert.cpp (original)
+++ dragonegg/trunk/llvm-convert.cpp Tue Apr 13 03:00:24 2010
@@ -1995,6 +1995,24 @@
     Args.push_back(Builder.CreateBitCast(DECL_LLVM(personality),
                                          Type::getInt8PtrTy(Context)));
 
+    // The representation of a catch-all is language specific.
+    // TODO: Remove this hack.
+    Constant *CatchAll;
+    StringRef LanguageName = lang_hooks.name;
+    if (LanguageName == "GNU Ada") {
+      StringRef Name = "__gnat_all_others_value";
+      CatchAll = TheModule->getGlobalVariable(Name);
+      if (!CatchAll)
+        CatchAll = new GlobalVariable(*TheModule,
+                                      ConvertType(integer_type_node),
+                                      /*isConstant*/true,
+                                      GlobalValue::ExternalLinkage,
+                                      /*Initializer*/NULL, Name);
+    } else {
+      // Other languages use a null pointer.
+      CatchAll = Constant::getNullValue(Type::getInt8PtrTy(Context));
+    }
+
     bool AllCaught = false; // Did we saw a catch-all or no-throw?
     SmallSet<Constant *, 8> AlreadyCaught; // Typeinfos known caught already.
     for (; region && !AllCaught; region = region->outer)
@@ -2049,33 +2067,21 @@
               if (!AlreadyCaught.insert(TypeInfo))
                 continue;
               Args.push_back(TypeInfo);
+              AllCaught = TypeInfo == CatchAll;
+              if (AllCaught)
+                break;
             }
           }
         break;
       }
 
-//FIXME    if (can_throw_external_1(i, false, false)) {
-//FIXME      // Some exceptions from this region may not be caught by any handler.
-//FIXME      // Since invokes are required to branch to the unwind label no matter
-//FIXME      // what exception is being unwound, append a catch-all.
-//FIXME
-//FIXME      // The representation of a catch-all is language specific.
-//FIXME      Value *CatchAll;
-//FIXME      if (USING_SJLJ_EXCEPTIONS || !lang_eh_catch_all) {
-//FIXME        // Use a "cleanup" - this should be good enough for most languages.
-//FIXME        CatchAll = ConstantInt::get(Type::getInt32Ty, 0);
-//FIXME      } else {
-//FIXME        tree catch_all_type = lang_eh_catch_all();
-//FIXME        if (catch_all_type == NULL_TREE)
-//FIXME          // Use a C++ style null catch-all object.
-//FIXME          CatchAll = Constant::getNullValue(
-//FIXME                                    Type::getInt8PtrTy(Context));
-//FIXME        else
-//FIXME          // This language has a type that catches all others.
-//FIXME          CatchAll = TreeConstantToLLVM::Convert(catch_all_type);
-//FIXME      }
-//FIXME      Args.push_back(CatchAll);
-//FIXME    }
+    if (!AllCaught)
+      // Some exceptions from this region may not be caught by any handler.
+      // Since invokes are required to branch to the unwind label no matter
+      // what exception is being unwound, append a catch-all.  I have a plan
+      // that will make all such horrible hacks unnecessary, but unfortunately
+      // this comment is too short to explain it.
+      Args.push_back(CatchAll);
 
     // Emit the selector call.
     Value *Filter = Builder.CreateCall(SelectorIntr, Args.begin(), Args.end(),




From pietreka at gmail.com  Tue Apr 13 03:21:29 2010
From: pietreka at gmail.com (Artur Pietrek)
Date: Tue, 13 Apr 2010 10:21:29 +0200
Subject: [llvm-commits] [llvm] r101117 - in /llvm/trunk:
	include/llvm/LinkAllPasses.h include/llvm/Transforms/Scalar.h
	lib/Transforms/Scalar/SCCVN.cpp
In-Reply-To: <20100413052408.8925C2A6C12C@llvm.org>
References: <20100413052408.8925C2A6C12C@llvm.org>
Message-ID: <w2id50b8be21004130121j17ac8b31obfac2c40e4a5bf89@mail.gmail.com>

Hi,
You've forgotten to remove it also from CMakeLists.txt, patch attached

On Tue, Apr 13, 2010 at 7:24 AM, Owen Anderson <resistor at mac.com> wrote:

> Author: resistor
> Date: Tue Apr 13 00:24:08 2010
> New Revision: 101117
>
> URL: http://llvm.org/viewvc/llvm-project?rev=101117&view=rev
> Log:
> SCCVN, we hardly knew ye!
>
> Removed:
>    llvm/trunk/lib/Transforms/Scalar/SCCVN.cpp
> Modified:
>    llvm/trunk/include/llvm/LinkAllPasses.h
>    llvm/trunk/include/llvm/Transforms/Scalar.h
>
> Modified: llvm/trunk/include/llvm/LinkAllPasses.h
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/LinkAllPasses.h?rev=101117&r1=101116&r2=101117&view=diff
>
> ==============================================================================
> --- llvm/trunk/include/llvm/LinkAllPasses.h (original)
> +++ llvm/trunk/include/llvm/LinkAllPasses.h Tue Apr 13 00:24:08 2010
> @@ -136,7 +136,6 @@
>       (void) llvm::createSSIPass();
>       (void) llvm::createSSIEverythingPass();
>       (void) llvm::createGEPSplitterPass();
> -      (void) llvm::createSCCVNPass();
>       (void) llvm::createABCDPass();
>       (void) llvm::createLintPass();
>
>
> Modified: llvm/trunk/include/llvm/Transforms/Scalar.h
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Transforms/Scalar.h?rev=101117&r1=101116&r2=101117&view=diff
>
> ==============================================================================
> --- llvm/trunk/include/llvm/Transforms/Scalar.h (original)
> +++ llvm/trunk/include/llvm/Transforms/Scalar.h Tue Apr 13 00:24:08 2010
> @@ -326,12 +326,6 @@
>
>
>  //===----------------------------------------------------------------------===//
>  //
> -// SCCVN - Aggressively eliminate redundant scalar values
> -//
> -FunctionPass *createSCCVNPass();
> -
>
> -//===----------------------------------------------------------------------===//
> -//
>  // ABCD - Elimination of Array Bounds Checks on Demand
>  //
>  FunctionPass *createABCDPass();
>
> Removed: llvm/trunk/lib/Transforms/Scalar/SCCVN.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/SCCVN.cpp?rev=101116&view=auto
>
> ==============================================================================
> --- llvm/trunk/lib/Transforms/Scalar/SCCVN.cpp (original)
> +++ llvm/trunk/lib/Transforms/Scalar/SCCVN.cpp (removed)
> @@ -1,716 +0,0 @@
> -//===- SCCVN.cpp - Eliminate redundant values
> -----------------------------===//
> -//
> -//                     The LLVM Compiler Infrastructure
> -//
> -// This file is distributed under the University of Illinois Open Source
> -// License. See LICENSE.TXT for details.
> -//
>
> -//===----------------------------------------------------------------------===//
> -//
> -// This pass performs global value numbering to eliminate fully redundant
> -// instructions.  This is based on the paper "SCC-based Value Numbering"
> -// by Cooper, et al.
> -//
>
> -//===----------------------------------------------------------------------===//
> -
> -#define DEBUG_TYPE "sccvn"
> -#include "llvm/Transforms/Scalar.h"
> -#include "llvm/BasicBlock.h"
> -#include "llvm/Constants.h"
> -#include "llvm/DerivedTypes.h"
> -#include "llvm/Function.h"
> -#include "llvm/Operator.h"
> -#include "llvm/Value.h"
> -#include "llvm/ADT/DenseMap.h"
> -#include "llvm/ADT/DepthFirstIterator.h"
> -#include "llvm/ADT/PostOrderIterator.h"
> -#include "llvm/ADT/SmallPtrSet.h"
> -#include "llvm/ADT/SmallVector.h"
> -#include "llvm/ADT/SparseBitVector.h"
> -#include "llvm/ADT/Statistic.h"
> -#include "llvm/Analysis/Dominators.h"
> -#include "llvm/Support/CFG.h"
> -#include "llvm/Support/CommandLine.h"
> -#include "llvm/Support/Debug.h"
> -#include "llvm/Support/ErrorHandling.h"
> -#include "llvm/Transforms/Utils/SSAUpdater.h"
> -using namespace llvm;
> -
> -STATISTIC(NumSCCVNInstr,  "Number of instructions deleted by SCCVN");
> -STATISTIC(NumSCCVNPhi,  "Number of phis deleted by SCCVN");
> -
>
> -//===----------------------------------------------------------------------===//
> -//                         ValueTable Class
>
> -//===----------------------------------------------------------------------===//
> -
> -/// This class holds the mapping between values and value numbers.  It is
> used
> -/// as an efficient mechanism to determine the expression-wise equivalence
> of
> -/// two values.
> -namespace {
> -  struct Expression {
> -    enum ExpressionOpcode { ADD, FADD, SUB, FSUB, MUL, FMUL,
> -                            UDIV, SDIV, FDIV, UREM, SREM,
> -                            FREM, SHL, LSHR, ASHR, AND, OR, XOR, ICMPEQ,
> -                            ICMPNE, ICMPUGT, ICMPUGE, ICMPULT, ICMPULE,
> -                            ICMPSGT, ICMPSGE, ICMPSLT, ICMPSLE, FCMPOEQ,
> -                            FCMPOGT, FCMPOGE, FCMPOLT, FCMPOLE, FCMPONE,
> -                            FCMPORD, FCMPUNO, FCMPUEQ, FCMPUGT, FCMPUGE,
> -                            FCMPULT, FCMPULE, FCMPUNE, EXTRACT, INSERT,
> -                            SHUFFLE, SELECT, TRUNC, ZEXT, SEXT, FPTOUI,
> -                            FPTOSI, UITOFP, SITOFP, FPTRUNC, FPEXT,
> -                            PTRTOINT, INTTOPTR, BITCAST, GEP, CALL,
> CONSTANT,
> -                            INSERTVALUE, EXTRACTVALUE, EMPTY, TOMBSTONE };
> -
> -    ExpressionOpcode opcode;
> -    const Type* type;
> -    SmallVector<uint32_t, 4> varargs;
> -
> -    Expression() { }
> -    Expression(ExpressionOpcode o) : opcode(o) { }
> -
> -    bool operator==(const Expression &other) const {
> -      if (opcode != other.opcode)
> -        return false;
> -      else if (opcode == EMPTY || opcode == TOMBSTONE)
> -        return true;
> -      else if (type != other.type)
> -        return false;
> -      else {
> -        if (varargs.size() != other.varargs.size())
> -          return false;
> -
> -        for (size_t i = 0; i < varargs.size(); ++i)
> -          if (varargs[i] != other.varargs[i])
> -            return false;
> -
> -        return true;
> -      }
> -    }
> -
> -    bool operator!=(const Expression &other) const {
> -      return !(*this == other);
> -    }
> -  };
> -
> -  class ValueTable {
> -    private:
> -      DenseMap<Value*, uint32_t> valueNumbering;
> -      DenseMap<Expression, uint32_t> expressionNumbering;
> -      DenseMap<Value*, uint32_t> constantsNumbering;
> -
> -      uint32_t nextValueNumber;
> -
> -      Expression::ExpressionOpcode getOpcode(BinaryOperator* BO);
> -      Expression::ExpressionOpcode getOpcode(CmpInst* C);
> -      Expression::ExpressionOpcode getOpcode(CastInst* C);
> -      Expression create_expression(BinaryOperator* BO);
> -      Expression create_expression(CmpInst* C);
> -      Expression create_expression(ShuffleVectorInst* V);
> -      Expression create_expression(ExtractElementInst* C);
> -      Expression create_expression(InsertElementInst* V);
> -      Expression create_expression(SelectInst* V);
> -      Expression create_expression(CastInst* C);
> -      Expression create_expression(GetElementPtrInst* G);
> -      Expression create_expression(CallInst* C);
> -      Expression create_expression(Constant* C);
> -      Expression create_expression(ExtractValueInst* C);
> -      Expression create_expression(InsertValueInst* C);
> -    public:
> -      ValueTable() : nextValueNumber(1) { }
> -      uint32_t computeNumber(Value *V);
> -      uint32_t lookup(Value *V);
> -      void add(Value *V, uint32_t num);
> -      void clear();
> -      void clearExpressions();
> -      void erase(Value *v);
> -      unsigned size();
> -      void verifyRemoved(const Value *) const;
> -  };
> -}
> -
> -namespace llvm {
> -template <> struct DenseMapInfo<Expression> {
> -  static inline Expression getEmptyKey() {
> -    return Expression(Expression::EMPTY);
> -  }
> -
> -  static inline Expression getTombstoneKey() {
> -    return Expression(Expression::TOMBSTONE);
> -  }
> -
> -  static unsigned getHashValue(const Expression e) {
> -    unsigned hash = e.opcode;
> -
> -    hash = ((unsigned)((uintptr_t)e.type >> 4) ^
> -            (unsigned)((uintptr_t)e.type >> 9));
> -
> -    for (SmallVector<uint32_t, 4>::const_iterator I = e.varargs.begin(),
> -         E = e.varargs.end(); I != E; ++I)
> -      hash = *I + hash * 37;
> -
> -    return hash;
> -  }
> -  static bool isEqual(const Expression &LHS, const Expression &RHS) {
> -    return LHS == RHS;
> -  }
> -};
> -template <>
> -struct isPodLike<Expression> { static const bool value = true; };
> -
> -}
> -
>
> -//===----------------------------------------------------------------------===//
> -//                     ValueTable Internal Functions
>
> -//===----------------------------------------------------------------------===//
> -Expression::ExpressionOpcode ValueTable::getOpcode(BinaryOperator* BO) {
> -  switch(BO->getOpcode()) {
> -  default: // THIS SHOULD NEVER HAPPEN
> -    llvm_unreachable("Binary operator with unknown opcode?");
> -  case Instruction::Add:  return Expression::ADD;
> -  case Instruction::FAdd: return Expression::FADD;
> -  case Instruction::Sub:  return Expression::SUB;
> -  case Instruction::FSub: return Expression::FSUB;
> -  case Instruction::Mul:  return Expression::MUL;
> -  case Instruction::FMul: return Expression::FMUL;
> -  case Instruction::UDiv: return Expression::UDIV;
> -  case Instruction::SDiv: return Expression::SDIV;
> -  case Instruction::FDiv: return Expression::FDIV;
> -  case Instruction::URem: return Expression::UREM;
> -  case Instruction::SRem: return Expression::SREM;
> -  case Instruction::FRem: return Expression::FREM;
> -  case Instruction::Shl:  return Expression::SHL;
> -  case Instruction::LShr: return Expression::LSHR;
> -  case Instruction::AShr: return Expression::ASHR;
> -  case Instruction::And:  return Expression::AND;
> -  case Instruction::Or:   return Expression::OR;
> -  case Instruction::Xor:  return Expression::XOR;
> -  }
> -}
> -
> -Expression::ExpressionOpcode ValueTable::getOpcode(CmpInst* C) {
> -  if (isa<ICmpInst>(C)) {
> -    switch (C->getPredicate()) {
> -    default:  // THIS SHOULD NEVER HAPPEN
> -      llvm_unreachable("Comparison with unknown predicate?");
> -    case ICmpInst::ICMP_EQ:  return Expression::ICMPEQ;
> -    case ICmpInst::ICMP_NE:  return Expression::ICMPNE;
> -    case ICmpInst::ICMP_UGT: return Expression::ICMPUGT;
> -    case ICmpInst::ICMP_UGE: return Expression::ICMPUGE;
> -    case ICmpInst::ICMP_ULT: return Expression::ICMPULT;
> -    case ICmpInst::ICMP_ULE: return Expression::ICMPULE;
> -    case ICmpInst::ICMP_SGT: return Expression::ICMPSGT;
> -    case ICmpInst::ICMP_SGE: return Expression::ICMPSGE;
> -    case ICmpInst::ICMP_SLT: return Expression::ICMPSLT;
> -    case ICmpInst::ICMP_SLE: return Expression::ICMPSLE;
> -    }
> -  } else {
> -    switch (C->getPredicate()) {
> -    default: // THIS SHOULD NEVER HAPPEN
> -      llvm_unreachable("Comparison with unknown predicate?");
> -    case FCmpInst::FCMP_OEQ: return Expression::FCMPOEQ;
> -    case FCmpInst::FCMP_OGT: return Expression::FCMPOGT;
> -    case FCmpInst::FCMP_OGE: return Expression::FCMPOGE;
> -    case FCmpInst::FCMP_OLT: return Expression::FCMPOLT;
> -    case FCmpInst::FCMP_OLE: return Expression::FCMPOLE;
> -    case FCmpInst::FCMP_ONE: return Expression::FCMPONE;
> -    case FCmpInst::FCMP_ORD: return Expression::FCMPORD;
> -    case FCmpInst::FCMP_UNO: return Expression::FCMPUNO;
> -    case FCmpInst::FCMP_UEQ: return Expression::FCMPUEQ;
> -    case FCmpInst::FCMP_UGT: return Expression::FCMPUGT;
> -    case FCmpInst::FCMP_UGE: return Expression::FCMPUGE;
> -    case FCmpInst::FCMP_ULT: return Expression::FCMPULT;
> -    case FCmpInst::FCMP_ULE: return Expression::FCMPULE;
> -    case FCmpInst::FCMP_UNE: return Expression::FCMPUNE;
> -    }
> -  }
> -}
> -
> -Expression::ExpressionOpcode ValueTable::getOpcode(CastInst* C) {
> -  switch(C->getOpcode()) {
> -  default: // THIS SHOULD NEVER HAPPEN
> -    llvm_unreachable("Cast operator with unknown opcode?");
> -  case Instruction::Trunc:    return Expression::TRUNC;
> -  case Instruction::ZExt:     return Expression::ZEXT;
> -  case Instruction::SExt:     return Expression::SEXT;
> -  case Instruction::FPToUI:   return Expression::FPTOUI;
> -  case Instruction::FPToSI:   return Expression::FPTOSI;
> -  case Instruction::UIToFP:   return Expression::UITOFP;
> -  case Instruction::SIToFP:   return Expression::SITOFP;
> -  case Instruction::FPTrunc:  return Expression::FPTRUNC;
> -  case Instruction::FPExt:    return Expression::FPEXT;
> -  case Instruction::PtrToInt: return Expression::PTRTOINT;
> -  case Instruction::IntToPtr: return Expression::INTTOPTR;
> -  case Instruction::BitCast:  return Expression::BITCAST;
> -  }
> -}
> -
> -Expression ValueTable::create_expression(CallInst* C) {
> -  Expression e;
> -
> -  e.type = C->getType();
> -  e.opcode = Expression::CALL;
> -
> -  e.varargs.push_back(lookup(C->getCalledFunction()));
> -  for (CallInst::op_iterator I = C->op_begin()+1, E = C->op_end();
> -       I != E; ++I)
> -    e.varargs.push_back(lookup(*I));
> -
> -  return e;
> -}
> -
> -Expression ValueTable::create_expression(BinaryOperator* BO) {
> -  Expression e;
> -  e.varargs.push_back(lookup(BO->getOperand(0)));
> -  e.varargs.push_back(lookup(BO->getOperand(1)));
> -  e.type = BO->getType();
> -  e.opcode = getOpcode(BO);
> -
> -  return e;
> -}
> -
> -Expression ValueTable::create_expression(CmpInst* C) {
> -  Expression e;
> -
> -  e.varargs.push_back(lookup(C->getOperand(0)));
> -  e.varargs.push_back(lookup(C->getOperand(1)));
> -  e.type = C->getType();
> -  e.opcode = getOpcode(C);
> -
> -  return e;
> -}
> -
> -Expression ValueTable::create_expression(CastInst* C) {
> -  Expression e;
> -
> -  e.varargs.push_back(lookup(C->getOperand(0)));
> -  e.type = C->getType();
> -  e.opcode = getOpcode(C);
> -
> -  return e;
> -}
> -
> -Expression ValueTable::create_expression(ShuffleVectorInst* S) {
> -  Expression e;
> -
> -  e.varargs.push_back(lookup(S->getOperand(0)));
> -  e.varargs.push_back(lookup(S->getOperand(1)));
> -  e.varargs.push_back(lookup(S->getOperand(2)));
> -  e.type = S->getType();
> -  e.opcode = Expression::SHUFFLE;
> -
> -  return e;
> -}
> -
> -Expression ValueTable::create_expression(ExtractElementInst* E) {
> -  Expression e;
> -
> -  e.varargs.push_back(lookup(E->getOperand(0)));
> -  e.varargs.push_back(lookup(E->getOperand(1)));
> -  e.type = E->getType();
> -  e.opcode = Expression::EXTRACT;
> -
> -  return e;
> -}
> -
> -Expression ValueTable::create_expression(InsertElementInst* I) {
> -  Expression e;
> -
> -  e.varargs.push_back(lookup(I->getOperand(0)));
> -  e.varargs.push_back(lookup(I->getOperand(1)));
> -  e.varargs.push_back(lookup(I->getOperand(2)));
> -  e.type = I->getType();
> -  e.opcode = Expression::INSERT;
> -
> -  return e;
> -}
> -
> -Expression ValueTable::create_expression(SelectInst* I) {
> -  Expression e;
> -
> -  e.varargs.push_back(lookup(I->getCondition()));
> -  e.varargs.push_back(lookup(I->getTrueValue()));
> -  e.varargs.push_back(lookup(I->getFalseValue()));
> -  e.type = I->getType();
> -  e.opcode = Expression::SELECT;
> -
> -  return e;
> -}
> -
> -Expression ValueTable::create_expression(GetElementPtrInst* G) {
> -  Expression e;
> -
> -  e.varargs.push_back(lookup(G->getPointerOperand()));
> -  e.type = G->getType();
> -  e.opcode = Expression::GEP;
> -
> -  for (GetElementPtrInst::op_iterator I = G->idx_begin(), E =
> G->idx_end();
> -       I != E; ++I)
> -    e.varargs.push_back(lookup(*I));
> -
> -  return e;
> -}
> -
> -Expression ValueTable::create_expression(ExtractValueInst* E) {
> -  Expression e;
> -
> -  e.varargs.push_back(lookup(E->getAggregateOperand()));
> -  for (ExtractValueInst::idx_iterator II = E->idx_begin(), IE =
> E->idx_end();
> -       II != IE; ++II)
> -    e.varargs.push_back(*II);
> -  e.type = E->getType();
> -  e.opcode = Expression::EXTRACTVALUE;
> -
> -  return e;
> -}
> -
> -Expression ValueTable::create_expression(InsertValueInst* E) {
> -  Expression e;
> -
> -  e.varargs.push_back(lookup(E->getAggregateOperand()));
> -  e.varargs.push_back(lookup(E->getInsertedValueOperand()));
> -  for (InsertValueInst::idx_iterator II = E->idx_begin(), IE =
> E->idx_end();
> -       II != IE; ++II)
> -    e.varargs.push_back(*II);
> -  e.type = E->getType();
> -  e.opcode = Expression::INSERTVALUE;
> -
> -  return e;
> -}
> -
>
> -//===----------------------------------------------------------------------===//
> -//                     ValueTable External Functions
>
> -//===----------------------------------------------------------------------===//
> -
> -/// add - Insert a value into the table with a specified value number.
> -void ValueTable::add(Value *V, uint32_t num) {
> -  valueNumbering[V] = num;
> -}
> -
> -/// computeNumber - Returns the value number for the specified value,
> assigning
> -/// it a new number if it did not have one before.
> -uint32_t ValueTable::computeNumber(Value *V) {
> -  if (uint32_t v = valueNumbering[V])
> -    return v;
> -  else if (uint32_t v= constantsNumbering[V])
> -    return v;
> -
> -  if (!isa<Instruction>(V)) {
> -    constantsNumbering[V] = nextValueNumber;
> -    return nextValueNumber++;
> -  }
> -
> -  Instruction* I = cast<Instruction>(V);
> -  Expression exp;
> -  switch (I->getOpcode()) {
> -    case Instruction::Add:
> -    case Instruction::FAdd:
> -    case Instruction::Sub:
> -    case Instruction::FSub:
> -    case Instruction::Mul:
> -    case Instruction::FMul:
> -    case Instruction::UDiv:
> -    case Instruction::SDiv:
> -    case Instruction::FDiv:
> -    case Instruction::URem:
> -    case Instruction::SRem:
> -    case Instruction::FRem:
> -    case Instruction::Shl:
> -    case Instruction::LShr:
> -    case Instruction::AShr:
> -    case Instruction::And:
> -    case Instruction::Or :
> -    case Instruction::Xor:
> -      exp = create_expression(cast<BinaryOperator>(I));
> -      break;
> -    case Instruction::ICmp:
> -    case Instruction::FCmp:
> -      exp = create_expression(cast<CmpInst>(I));
> -      break;
> -    case Instruction::Trunc:
> -    case Instruction::ZExt:
> -    case Instruction::SExt:
> -    case Instruction::FPToUI:
> -    case Instruction::FPToSI:
> -    case Instruction::UIToFP:
> -    case Instruction::SIToFP:
> -    case Instruction::FPTrunc:
> -    case Instruction::FPExt:
> -    case Instruction::PtrToInt:
> -    case Instruction::IntToPtr:
> -    case Instruction::BitCast:
> -      exp = create_expression(cast<CastInst>(I));
> -      break;
> -    case Instruction::Select:
> -      exp = create_expression(cast<SelectInst>(I));
> -      break;
> -    case Instruction::ExtractElement:
> -      exp = create_expression(cast<ExtractElementInst>(I));
> -      break;
> -    case Instruction::InsertElement:
> -      exp = create_expression(cast<InsertElementInst>(I));
> -      break;
> -    case Instruction::ShuffleVector:
> -      exp = create_expression(cast<ShuffleVectorInst>(I));
> -      break;
> -    case Instruction::ExtractValue:
> -      exp = create_expression(cast<ExtractValueInst>(I));
> -      break;
> -    case Instruction::InsertValue:
> -      exp = create_expression(cast<InsertValueInst>(I));
> -      break;
> -    case Instruction::GetElementPtr:
> -      exp = create_expression(cast<GetElementPtrInst>(I));
> -      break;
> -    default:
> -      valueNumbering[V] = nextValueNumber;
> -      return nextValueNumber++;
> -  }
> -
> -  uint32_t& e = expressionNumbering[exp];
> -  if (!e) e = nextValueNumber++;
> -  valueNumbering[V] = e;
> -
> -  return e;
> -}
> -
> -/// lookup - Returns the value number of the specified value. Returns 0 if
> -/// the value has not yet been numbered.
> -uint32_t ValueTable::lookup(Value *V) {
> -  if (!isa<Instruction>(V)) {
> -    if (!constantsNumbering.count(V))
> -      constantsNumbering[V] = nextValueNumber++;
> -    return constantsNumbering[V];
> -  }
> -
> -  return valueNumbering[V];
> -}
> -
> -/// clear - Remove all entries from the ValueTable
> -void ValueTable::clear() {
> -  valueNumbering.clear();
> -  expressionNumbering.clear();
> -  constantsNumbering.clear();
> -  nextValueNumber = 1;
> -}
> -
> -void ValueTable::clearExpressions() {
> -  expressionNumbering.clear();
> -  constantsNumbering.clear();
> -  nextValueNumber = 1;
> -}
> -
> -/// erase - Remove a value from the value numbering
> -void ValueTable::erase(Value *V) {
> -  valueNumbering.erase(V);
> -}
> -
> -/// verifyRemoved - Verify that the value is removed from all internal
> data
> -/// structures.
> -void ValueTable::verifyRemoved(const Value *V) const {
> -  for (DenseMap<Value*, uint32_t>::const_iterator
> -         I = valueNumbering.begin(), E = valueNumbering.end(); I != E;
> ++I) {
> -    assert(I->first != V && "Inst still occurs in value numbering map!");
> -  }
> -}
> -
>
> -//===----------------------------------------------------------------------===//
> -//                              SCCVN Pass
>
> -//===----------------------------------------------------------------------===//
> -
> -namespace {
> -
> -  struct ValueNumberScope {
> -    ValueNumberScope* parent;
> -    DenseMap<uint32_t, Value*> table;
> -    SparseBitVector<128> availIn;
> -    SparseBitVector<128> availOut;
> -
> -    ValueNumberScope(ValueNumberScope* p) : parent(p) { }
> -  };
> -
> -  class SCCVN : public FunctionPass {
> -    bool runOnFunction(Function &F);
> -  public:
> -    static char ID; // Pass identification, replacement for typeid
> -    SCCVN() : FunctionPass(&ID) { }
> -
> -  private:
> -    ValueTable VT;
> -    DenseMap<BasicBlock*, ValueNumberScope*> BBMap;
> -
> -    // This transformation requires dominator postdominator info
> -    virtual void getAnalysisUsage(AnalysisUsage &AU) const {
> -      AU.addRequired<DominatorTree>();
> -
> -      AU.addPreserved<DominatorTree>();
> -      AU.setPreservesCFG();
> -    }
> -  };
> -
> -  char SCCVN::ID = 0;
> -}
> -
> -// createSCCVNPass - The public interface to this file...
> -FunctionPass *llvm::createSCCVNPass() { return new SCCVN(); }
> -
> -static RegisterPass<SCCVN> X("sccvn",
> -                              "SCC Value Numbering");
> -
> -static Value *lookupNumber(ValueNumberScope *Locals, uint32_t num) {
> -  while (Locals) {
> -    DenseMap<uint32_t, Value*>::iterator I = Locals->table.find(num);
> -    if (I != Locals->table.end())
> -      return I->second;
> -    Locals = Locals->parent;
> -  }
> -
> -  return 0;
> -}
> -
> -bool SCCVN::runOnFunction(Function& F) {
> -  // Implement the RPO version of the SCCVN algorithm.  Conceptually,
> -  // we optimisitically assume that all instructions with the same opcode
> have
> -  // the same VN.  Then we deepen our comparison by one level, to all
> -  // instructions whose operands have the same opcodes get the same VN.
>  We
> -  // iterate this process until the partitioning stops changing, at which
> -  // point we have computed a full numbering.
> -  ReversePostOrderTraversal<Function*> RPOT(&F);
> -  bool done = false;
> -  while (!done) {
> -    done = true;
> -    VT.clearExpressions();
> -    for (ReversePostOrderTraversal<Function*>::rpo_iterator I =
> RPOT.begin(),
> -         E = RPOT.end(); I != E; ++I) {
> -      BasicBlock* BB = *I;
> -      for (BasicBlock::iterator BI = BB->begin(), BE = BB->end();
> -           BI != BE; ++BI) {
> -         uint32_t origVN = VT.lookup(BI);
> -         uint32_t newVN = VT.computeNumber(BI);
> -         if (origVN != newVN)
> -           done = false;
> -      }
> -    }
> -  }
> -
> -  // Now, do a dominator walk, eliminating simple, dominated redundancies
> as we
> -  // go.  Also, build the ValueNumberScope structure that will be used for
> -  // computing full availability.
> -  DominatorTree& DT = getAnalysis<DominatorTree>();
> -  bool changed = false;
> -  for (df_iterator<DomTreeNode*> DI = df_begin(DT.getRootNode()),
> -       DE = df_end(DT.getRootNode()); DI != DE; ++DI) {
> -    BasicBlock* BB = DI->getBlock();
> -    if (DI->getIDom())
> -      BBMap[BB] = new ValueNumberScope(BBMap[DI->getIDom()->getBlock()]);
> -    else
> -      BBMap[BB] = new ValueNumberScope(0);
> -
> -    for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ) {
> -      uint32_t num = VT.lookup(I);
> -      Value* repl = lookupNumber(BBMap[BB], num);
> -
> -      if (repl) {
> -        if (isa<PHINode>(I))
> -          ++NumSCCVNPhi;
> -        else
> -          ++NumSCCVNInstr;
> -        I->replaceAllUsesWith(repl);
> -        Instruction* OldInst = I;
> -        ++I;
> -        BBMap[BB]->table[num] = repl;
> -        OldInst->eraseFromParent();
> -        changed = true;
> -      } else {
> -        BBMap[BB]->table[num] = I;
> -        BBMap[BB]->availOut.set(num);
> -
> -        ++I;
> -      }
> -    }
> -  }
> -
> -  // Perform a forward data-flow to compute availability at all points on
> -  // the CFG.
> -  do {
> -    changed = false;
> -    for (ReversePostOrderTraversal<Function*>::rpo_iterator I =
> RPOT.begin(),
> -         E = RPOT.end(); I != E; ++I) {
> -      BasicBlock* BB = *I;
> -      ValueNumberScope *VNS = BBMap[BB];
> -
> -      SparseBitVector<128> preds;
> -      bool first = true;
> -      for (pred_iterator PI = pred_begin(BB), PE = pred_end(BB);
> -           PI != PE; ++PI) {
> -        if (first) {
> -          preds = BBMap[*PI]->availOut;
> -          first = false;
> -        } else {
> -          preds &= BBMap[*PI]->availOut;
> -        }
> -      }
> -
> -      changed |= (VNS->availIn |= preds);
> -      changed |= (VNS->availOut |= preds);
> -    }
> -  } while (changed);
> -
> -  // Use full availability information to perform non-dominated
> replacements.
> -  SSAUpdater SSU;
> -  for (Function::iterator FI = F.begin(), FE = F.end(); FI != FE; ++FI) {
> -    if (!BBMap.count(FI)) continue;
> -    for (BasicBlock::iterator BI = FI->begin(), BE = FI->end();
> -         BI != BE; ) {
> -      uint32_t num = VT.lookup(BI);
> -      if (!BBMap[FI]->availIn.test(num)) {
> -        ++BI;
> -        continue;
> -      }
> -
> -      SSU.Initialize(BI);
> -
> -      SmallPtrSet<BasicBlock*, 8> visited;
> -      SmallVector<BasicBlock*, 8> stack;
> -      visited.insert(FI);
> -      for (pred_iterator PI = pred_begin(FI), PE = pred_end(FI);
> -           PI != PE; ++PI)
> -        if (!visited.count(*PI))
> -          stack.push_back(*PI);
> -
> -      while (!stack.empty()) {
> -        BasicBlock* CurrBB = stack.pop_back_val();
> -        visited.insert(CurrBB);
> -
> -        ValueNumberScope* S = BBMap[CurrBB];
> -        if (S->table.count(num)) {
> -          SSU.AddAvailableValue(CurrBB, S->table[num]);
> -        } else {
> -          for (pred_iterator PI = pred_begin(CurrBB), PE =
> pred_end(CurrBB);
> -               PI != PE; ++PI)
> -            if (!visited.count(*PI))
> -              stack.push_back(*PI);
> -        }
> -      }
> -
> -      Value* repl = SSU.GetValueInMiddleOfBlock(FI);
> -      BI->replaceAllUsesWith(repl);
> -      Instruction* CurInst = BI;
> -      ++BI;
> -      BBMap[FI]->table[num] = repl;
> -      if (isa<PHINode>(CurInst))
> -        ++NumSCCVNPhi;
> -      else
> -        ++NumSCCVNInstr;
> -
> -      CurInst->eraseFromParent();
> -    }
> -  }
> -
> -  VT.clear();
> -  for (DenseMap<BasicBlock*, ValueNumberScope*>::iterator
> -       I = BBMap.begin(), E = BBMap.end(); I != E; ++I)
> -    delete I->second;
> -  BBMap.clear();
> -
> -  return changed;
> -}
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
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From resistor at mac.com  Tue Apr 13 03:33:09 2010
From: resistor at mac.com (Owen Anderson)
Date: Tue, 13 Apr 2010 08:33:09 -0000
Subject: [llvm-commits] [llvm] r101125 -
	/llvm/trunk/lib/Transforms/Scalar/CMakeLists.txt
Message-ID: <20100413083309.908A62A6C12C@llvm.org>

Author: resistor
Date: Tue Apr 13 03:33:09 2010
New Revision: 101125

URL: http://llvm.org/viewvc/llvm-project?rev=101125&view=rev
Log:
Remove SCCVN from the CMake build system.

Modified:
    llvm/trunk/lib/Transforms/Scalar/CMakeLists.txt

Modified: llvm/trunk/lib/Transforms/Scalar/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/CMakeLists.txt?rev=101125&r1=101124&r2=101125&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/CMakeLists.txt (original)
+++ llvm/trunk/lib/Transforms/Scalar/CMakeLists.txt Tue Apr 13 03:33:09 2010
@@ -21,7 +21,6 @@
   Reassociate.cpp
   Reg2Mem.cpp
   SCCP.cpp
-  SCCVN.cpp
   Scalar.cpp
   ScalarReplAggregates.cpp
   SimplifyCFGPass.cpp




From isanbard at gmail.com  Tue Apr 13 04:01:24 2010
From: isanbard at gmail.com (Bill Wendling)
Date: Tue, 13 Apr 2010 02:01:24 -0700
Subject: [llvm-commits] [llvm] r101075 - in /llvm/trunk:
	lib/Target/X86/X86InstrInfo.cpp test/CodeGen/X86/brcond.ll
In-Reply-To: <FB543B92-067C-4DC9-B92C-7C91959CE4C9@apple.com>
References: <20100412221957.EBF8A2A6C12C@llvm.org>
	<000E7360-B5FF-460E-80EF-F8A69D74C0DF@apple.com>
	<26E362DF-1C47-4A0C-B259-0A6AFC5E5B37@apple.com>
	<FCDEA618-97D0-457D-AB36-E695A89C0D62@apple.com>
	<1670CEA8-B035-4FCA-B5A6-549664FC826C@apple.com>
	<C39AC7F0-E69E-491F-A65E-FE5CFC9ED74E@apple.com>
	<667DBFC7-8ED4-4C68-AC13-9468E25031EB@gmail.com>
	<FB543B92-067C-4DC9-B92C-7C91959CE4C9@apple.com>
Message-ID: <EDBE6564-41D5-434E-A1AE-11C089E34F1C@gmail.com>

On Apr 12, 2010, at 7:20 PM, Evan Cheng wrote:

>> The problem lies in this bit of code in X86InstrInfo::AnalyzeBranch:
>> 
>>     // If they differ, see if they fit one of the known patterns. Theoretically,                                                                                        
>>     // we could handle more patterns here, but we shouldn't expect to see them                                                                                          
>>     // if instruction selection has done a reasonable job.                                                                                                              
>>     if ((OldBranchCode == X86::COND_NP &&
>>          BranchCode == X86::COND_E) ||
>>         (OldBranchCode == X86::COND_E &&
>>          BranchCode == X86::COND_NP))
>>       BranchCode = X86::COND_NP_OR_E;
>>     else if ((OldBranchCode == X86::COND_P &&
>>               BranchCode == X86::COND_NE) ||
>>              (OldBranchCode == X86::COND_NE &&
>>               BranchCode == X86::COND_P))
>>       BranchCode = X86::COND_NE_OR_P;
>>     else
>>       return true;
>> 
>> When the code in BranchFolding calls "ReverseBranchCondition", the X86 back-end isn't able to handle it. So it doesn't change the branch conditions.
>> 
>> If you look for the bits of code that handle COND_NP_OR_E and COND_NE_OR_P there doesn't seem to be any optimizations done with them. X86InstrInfo::InsertBranch looks at them and inserts two branches.
>> 
>> What is the rationale behind converting a JE/JNP and JNE/JP into COND_NE_OR_P and COND_NP_OR_E?
> 
> I think these are used to merge two conditional branches into one and split them back out again later. It seems like a hack to allow AnalyzeBranch to handle BB with two conditional branches. They correspond to OEQ and UNE.
> 
> Is it possible to teach ReverseBranchCondition to do the right thing? Ain't OEQ the reverse of UNE and vice versa?
> 
It looks like I can safely teach GetOppositeBranchCondition to return the opposite for the two COND_* above. We do have an interesting case, though. If I change the original code to "une" instead of "oeq" like this:

define float @func2(float %x, float %y) nounwind readnone optsize ssp {
entry:
  %0 = fpext float %x to double                   ; <double> [#uses=1]
  %1 = fpext float %y to double                   ; <double> [#uses=1]
  %2 = fmul double %0, %1                         ; <double> [#uses=3]
  %3 = fcmp une double %2, 0.000000e+00           ; <i1> [#uses=1]
  br i1 %3, label %bb2, label %bb1

bb1:                                              ; preds = %entry
  %4 = fadd double %2, -1.000000e+00              ; <double> [#uses=1]
  br label %bb2

bb2:                                              ; preds = %entry, %bb1
  %.0.in = phi double [ %4, %bb1 ], [ %2, %entry ] ; <double> [#uses=1]
  %.0 = fptrunc double %.0.in to float            ; <float> [#uses=1]
  ret float %.0
}

Then we generate this for the "fcmp une ..."

	%AL<def> = SETNPr %EFLAGS<imp-use>
	%CL<def> = SETEr %EFLAGS<imp-use,kill>
	TEST8rr %CL<kill>, %AL<kill>, %EFLAGS<imp-def>
	JE_4 <BB#2>, %EFLAGS<imp-use>

Ick. I suppose we should instead be generating?

	JNP_4 <BB#2>, %EFLAGS<imp-use>
	JE_4 <BB#2>, %EFLAGS<imp-use>

-bw

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From baldrick at free.fr  Tue Apr 13 04:11:20 2010
From: baldrick at free.fr (Duncan Sands)
Date: Tue, 13 Apr 2010 09:11:20 -0000
Subject: [llvm-commits] [dragonegg] r101126 - /dragonegg/trunk/Makefile
Message-ID: <20100413091121.009522A6C12C@llvm.org>

Author: baldrick
Date: Tue Apr 13 04:11:20 2010
New Revision: 101126

URL: http://llvm.org/viewvc/llvm-project?rev=101126&view=rev
Log:
Don't list libraries in LD_OPTIONS.  List the libraries to use explicitly
when linking.

Modified:
    dragonegg/trunk/Makefile

Modified: dragonegg/trunk/Makefile
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/Makefile?rev=101126&r1=101125&r2=101126&view=diff
==============================================================================
--- dragonegg/trunk/Makefile (original)
+++ dragonegg/trunk/Makefile Tue Apr 13 04:11:20 2010
@@ -50,8 +50,7 @@
 	     -DTARGET_NAME=\"$(TARGET_TRIPLE)\" \
 	     -I$(SRC_DIR) -I$(GCC_PLUGIN_DIR)/include
 
-LD_OPTIONS+=$(LDFLAGS) $(shell $(LLVM_CONFIG) --ldflags) \
-	    $(shell $(LLVM_CONFIG) --libs analysis core ipo scalaropts target)
+LD_OPTIONS+=$(LDFLAGS) $(shell $(LLVM_CONFIG) --ldflags)
 
 # NOTE: The following flags can only be used after TARGET_UTIL has been built.
 TARGET_HEADERS+=-I$(SRC_DIR)/$(shell $(TARGET_UTIL) -p) \
@@ -66,7 +65,8 @@
 
 $(TARGET_UTIL): $(TARGET_UTIL_OBJECTS)
 	@echo Linking $@
-	$(QUIET)$(CXX) -o $@ $^ $(LD_OPTIONS)
+	$(QUIET)$(CXX) -o $@ $^ $(LD_OPTIONS) \
+	$(shell $(LLVM_CONFIG) --libs support)
 
 %.o : $(SRC_DIR)/%.c $(TARGET_UTIL)
 	@echo Compiling $*.c
@@ -83,10 +83,10 @@
 
 $(PLUGIN): $(PLUGIN_OBJECTS) $(TARGET_OBJECT) $(TARGET_UTIL)
 	@echo Linking $@
-	$(QUIET)$(CXX) $(LOADABLE_MODULE_OPTIONS) $(CXXFLAGS) \
-	-o $@ $(PLUGIN_OBJECTS) $(TARGET_OBJECT) $(LD_OPTIONS) \
-	$(shell $(LLVM_CONFIG) --libs $(shell $(TARGET_UTIL) -p))
-
+	$(QUIET)$(CXX) -o $@ $(LOADABLE_MODULE_OPTIONS) $(CXXFLAGS) \
+	$(LD_OPTIONS) $(PLUGIN_OBJECTS) $(TARGET_OBJECT) \
+	$(shell $(LLVM_CONFIG) --libs analysis core ipo scalaropts target \
+	$(shell $(TARGET_UTIL) -p))
 
 clean::
 	$(QUIET)rm -f *.o *.d $(PLUGIN) $(TARGET_UTIL)




From pietreka at gmail.com  Tue Apr 13 04:13:53 2010
From: pietreka at gmail.com (Artur Pietrek)
Date: Tue, 13 Apr 2010 11:13:53 +0200
Subject: [llvm-commits] [llvm] r101058 - in /llvm/trunk/tools: Makefile
	llvm-mc/Disassembler.cpp llvm-mc/Disassembler.h
	llvm-mc/Makefile llvm-mc/llvm-mc.cpp
In-Reply-To: <20100412194300.47CA32A6C12C@llvm.org>
References: <20100412194300.47CA32A6C12C@llvm.org>
Message-ID: <i2sd50b8be21004130213y271c95bk668d80e6e3f10479@mail.gmail.com>

Hi,
It seems that this breaks cmake build, at least for me.

Artur

On Mon, Apr 12, 2010 at 9:43 PM, Sean Callanan <scallanan at apple.com> wrote:

> Author: spyffe
> Date: Mon Apr 12 14:43:00 2010
> New Revision: 101058
>
> URL: http://llvm.org/viewvc/llvm-project?rev=101058&view=rev
> Log:
> Second try at integrating the edis tester.  This
> time I use the LIBS variable, which is not subject
> to a %.a -> -l% transformation, to link llvm-mc
> against libEnhancedDisassembly.
>
> llvm-mc -edis works the same as llvm-mc
> -disassemble, but outputs tokens and operands.
>
> Modified:
>    llvm/trunk/tools/Makefile
>    llvm/trunk/tools/llvm-mc/Disassembler.cpp
>    llvm/trunk/tools/llvm-mc/Disassembler.h
>    llvm/trunk/tools/llvm-mc/Makefile
>    llvm/trunk/tools/llvm-mc/llvm-mc.cpp
>
> Modified: llvm/trunk/tools/Makefile
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/Makefile?rev=101058&r1=101057&r2=101058&view=diff
>
> ==============================================================================
> --- llvm/trunk/tools/Makefile (original)
> +++ llvm/trunk/tools/Makefile Mon Apr 12 14:43:00 2010
> @@ -36,6 +36,8 @@
>  ifeq ($(ENABLE_PIC),1)
>   # No support for dynamic libraries on windows targets.
>   ifneq ($(TARGET_OS), $(filter $(TARGET_OS), Cygwin MingW))
> +    # libEnhancedDisassembly must be built ahead of llvm-mc
> +    # because llvm-mc links against libEnhancedDisassembly
>     DIRS += edis
>
>     # gold only builds if binutils is around.  It requires "lto" to build
> before
>
> Modified: llvm/trunk/tools/llvm-mc/Disassembler.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/Disassembler.cpp?rev=101058&r1=101057&r2=101058&view=diff
>
> ==============================================================================
> --- llvm/trunk/tools/llvm-mc/Disassembler.cpp (original)
> +++ llvm/trunk/tools/llvm-mc/Disassembler.cpp Mon Apr 12 14:43:00 2010
> @@ -15,6 +15,7 @@
>  #include "Disassembler.h"
>
>  #include "llvm/ADT/OwningPtr.h"
> +#include "llvm/ADT/Triple.h"
>  #include "llvm/MC/MCAsmInfo.h"
>  #include "llvm/MC/MCDisassembler.h"
>  #include "llvm/MC/MCInst.h"
> @@ -24,6 +25,9 @@
>  #include "llvm/Support/MemoryObject.h"
>  #include "llvm/Support/raw_ostream.h"
>  #include "llvm/Support/SourceMgr.h"
> +
> +#include "llvm-c/EnhancedDisassembly.h"
> +
>  using namespace llvm;
>
>  typedef std::vector<std::pair<unsigned char, const char*> > ByteArrayTy;
> @@ -64,8 +68,7 @@
>                                /*REMOVE*/ nulls())) {
>       Printer.printInst(&Inst, outs());
>       outs() << "\n";
> -    }
> -    else {
> +    } else {
>       SM.PrintMessage(SMLoc::getFromPointer(Bytes[Index].second),
>                       "invalid instruction encoding", "warning");
>       if (Size == 0)
> @@ -76,37 +79,9 @@
>   return false;
>  }
>
> -int Disassembler::disassemble(const Target &T, const std::string &Triple,
> -                              MemoryBuffer &Buffer) {
> -  // Set up disassembler.
> -  OwningPtr<const MCAsmInfo> AsmInfo(T.createAsmInfo(Triple));
> -
> -  if (!AsmInfo) {
> -    errs() << "error: no assembly info for target " << Triple << "\n";
> -    return -1;
> -  }
> -
> -  OwningPtr<const MCDisassembler> DisAsm(T.createMCDisassembler());
> -  if (!DisAsm) {
> -    errs() << "error: no disassembler for target " << Triple << "\n";
> -    return -1;
> -  }
> -
> -  OwningPtr<MCInstPrinter> IP(T.createMCInstPrinter(0, *AsmInfo));
> -  if (!IP) {
> -    errs() << "error: no instruction printer for target " << Triple <<
> '\n';
> -    return -1;
> -  }
> -
> -  bool ErrorOccurred = false;
> -
> -  SourceMgr SM;
> -  SM.AddNewSourceBuffer(&Buffer, SMLoc());
> -
> -  // Convert the input to a vector for disassembly.
> -  ByteArrayTy ByteArray;
> -
> -  StringRef Str = Buffer.getBuffer();
> +static bool ByteArrayFromString(ByteArrayTy &ByteArray,
> +                                StringRef &Str,
> +                                SourceMgr &SM) {
>   while (!Str.empty()) {
>     // Strip horizontal whitespace.
>     if (size_t Pos = Str.find_first_not_of(" \t\r")) {
> @@ -119,9 +94,9 @@
>     if (Str[0] == '\n' || Str[0] == '#') {
>       // Strip to the end of line if we already processed any bytes on this
>       // line.  This strips the comment and/or the \n.
> -      if (Str[0] == '\n')
> +      if (Str[0] == '\n') {
>         Str = Str.substr(1);
> -      else {
> +      } else {
>         Str = Str.substr(Str.find_first_of('\n'));
>         if (!Str.empty())
>           Str = Str.substr(1);
> @@ -138,8 +113,7 @@
>     if (Value.getAsInteger(0, ByteVal) || ByteVal > 255) {
>       // If we have an error, print it and skip to the end of line.
>       SM.PrintMessage(SMLoc::getFromPointer(Value.data()),
> -                                 "invalid input token", "error");
> -      ErrorOccurred = true;
> +                      "invalid input token", "error");
>       Str = Str.substr(Str.find('\n'));
>       ByteArray.clear();
>       continue;
> @@ -149,8 +123,229 @@
>     Str = Str.substr(Next);
>   }
>
> +  return false;
> +}
> +
> +int Disassembler::disassemble(const Target &T, const std::string &Triple,
> +                              MemoryBuffer &Buffer) {
> +  // Set up disassembler.
> +  OwningPtr<const MCAsmInfo> AsmInfo(T.createAsmInfo(Triple));
> +
> +  if (!AsmInfo) {
> +    errs() << "error: no assembly info for target " << Triple << "\n";
> +    return -1;
> +  }
> +
> +  OwningPtr<const MCDisassembler> DisAsm(T.createMCDisassembler());
> +  if (!DisAsm) {
> +    errs() << "error: no disassembler for target " << Triple << "\n";
> +    return -1;
> +  }
> +
> +  OwningPtr<MCInstPrinter> IP(T.createMCInstPrinter(0, *AsmInfo));
> +  if (!IP) {
> +    errs() << "error: no instruction printer for target " << Triple <<
> '\n';
> +    return -1;
> +  }
> +
> +  bool ErrorOccurred = false;
> +
> +  SourceMgr SM;
> +  SM.AddNewSourceBuffer(&Buffer, SMLoc());
> +
> +  // Convert the input to a vector for disassembly.
> +  ByteArrayTy ByteArray;
> +  StringRef Str = Buffer.getBuffer();
> +
> +  ErrorOccurred |= ByteArrayFromString(ByteArray, Str, SM);
> +
>   if (!ByteArray.empty())
>     ErrorOccurred |= PrintInsts(*DisAsm, *IP, ByteArray, SM);
>
>   return ErrorOccurred;
>  }
> +
> +static int byteArrayReader(uint8_t *B, uint64_t A, void *Arg) {
> +  ByteArrayTy &ByteArray = *((ByteArrayTy*)Arg);
> +
> +  if (A >= ByteArray.size())
> +    return -1;
> +
> +  *B = ByteArray[A].first;
> +
> +  return 0;
> +}
> +
> +static int verboseEvaluator(uint64_t *V, unsigned R, void *Arg) {
> +  EDDisassemblerRef &disassembler = *((EDDisassemblerRef*)Arg);
> +
> +  const char *regName;
> +
> +  if (!EDGetRegisterName(&regName,
> +                        disassembler,
> +                        R))
> +    outs() << "[" << regName << "/" << R << "]";
> +  if (EDRegisterIsStackPointer(disassembler, R))
> +    outs() << "(sp)";
> +  if (EDRegisterIsProgramCounter(disassembler, R))
> +    outs() << "(pc)";
> +
> +  *V = 0;
> +
> +  return 0;
> +}
> +
> +int Disassembler::disassembleEnhanced(const std::string &TS,
> +                                      MemoryBuffer &Buffer) {
> +  ByteArrayTy ByteArray;
> +  StringRef Str = Buffer.getBuffer();
> +  SourceMgr SM;
> +
> +  SM.AddNewSourceBuffer(&Buffer, SMLoc());
> +
> +  if (ByteArrayFromString(ByteArray, Str, SM)) {
> +    return -1;
> +  }
> +
> +  EDDisassemblerRef disassembler;
> +
> +  Triple T(TS);
> +  EDAssemblySyntax_t AS;
> +
> +  switch (T.getArch()) {
> +  default:
> +    errs() << "error: no default assembly syntax for " << TS.c_str() <<
> "\n";
> +    return -1;
> +  case Triple::arm:
> +  case Triple::thumb:
> +    AS = kEDAssemblySyntaxARMUAL;
> +    break;
> +  case Triple::x86:
> +  case Triple::x86_64:
> +    AS = kEDAssemblySyntaxX86ATT;
> +    break;
> +  }
> +
> +  if (EDGetDisassembler(&disassembler,
> +                        TS.c_str(),
> +                        AS)) {
> +    errs() << "error: couldn't get disassembler for " << TS.c_str() <<
> "\n";
> +    return -1;
> +  }
> +
> +  EDInstRef inst;
> +
> +  if (EDCreateInsts(&inst, 1, disassembler, byteArrayReader, 0,&ByteArray)
> +      != 1) {
> +    errs() << "error: Didn't get an instruction\n";
> +    return -1;
> +  }
> +
> +  int numTokens = EDNumTokens(inst);
> +
> +  if (numTokens < 0) {
> +    errs() << "error: Couldn't count the instruction's tokens\n";
> +    return -1;
> +  }
> +
> +  int tokenIndex;
> +
> +  for (tokenIndex = 0; tokenIndex < numTokens; ++tokenIndex) {
> +    EDTokenRef token;
> +
> +    if (EDGetToken(&token, inst, tokenIndex)) {
> +      errs() << "error: Couldn't get token\n";
> +      return -1;
> +    }
> +
> +    const char *buf;
> +
> +    if (EDGetTokenString(&buf, token)) {
> +      errs() << "error: Couldn't get string for token\n";
> +      return -1;
> +    }
> +
> +    outs() << "[";
> +
> +    int operandIndex = EDOperandIndexForToken(token);
> +
> +    if (operandIndex >= 0)
> +      outs() << operandIndex << "-";
> +
> +    if (EDTokenIsWhitespace(token)) {
> +      outs() << "w";
> +    } else if (EDTokenIsPunctuation(token)) {
> +      outs() << "p";
> +    } else if (EDTokenIsOpcode(token)) {
> +      outs() << "o";
> +    } else if (EDTokenIsLiteral(token)) {
> +      outs() << "l";
> +    } else if (EDTokenIsRegister(token)) {
> +      outs() << "r";
> +    } else {
> +      outs() << "?";
> +    }
> +
> +    outs() << ":" << buf;
> +
> +    if (EDTokenIsLiteral(token)) {
> +      outs() << "=";
> +      if (EDTokenIsNegativeLiteral(token))
> +        outs() << "-";
> +      uint64_t absoluteValue;
> +      if (EDLiteralTokenAbsoluteValue(&absoluteValue, token)) {
> +        errs() << "error: Couldn't get the value of a literal token\n";
> +        return -1;
> +      }
> +      outs() << absoluteValue;
> +    } else if (EDTokenIsRegister(token)) {
> +      outs() << "=";
> +      unsigned regID;
> +      if (EDRegisterTokenValue(&regID, token)) {
> +        errs() << "error: Couldn't get the ID of a register token\n";
> +        return -1;
> +      }
> +      outs() << "r" << regID;
> +    }
> +
> +    outs() << "]";
> +  }
> +
> +  outs() << " ";
> +
> +  int numOperands = EDNumOperands(inst);
> +
> +  if (numOperands < 0) {
> +    errs() << "error: Couldn't count operands\n";
> +    return -1;
> +  }
> +
> +  int operandIndex;
> +
> +  for (operandIndex = 0; operandIndex < numOperands; ++operandIndex) {
> +    outs() << operandIndex << ":";
> +
> +    EDOperandRef operand;
> +
> +    if (EDGetOperand(&operand,
> +                     inst,
> +                     operandIndex)) {
> +      errs() << "error: Couldn't get operand\n";
> +      return -1;
> +    }
> +
> +    uint64_t evaluatedResult;
> +
> +    EDEvaluateOperand(&evaluatedResult,
> +                      operand,
> +                      verboseEvaluator,
> +                      &disassembler);
> +
> +    outs() << " ";
> +  }
> +
> +  outs() << "\n";
> +
> +  return 0;
> +}
> +
>
> Modified: llvm/trunk/tools/llvm-mc/Disassembler.h
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/Disassembler.h?rev=101058&r1=101057&r2=101058&view=diff
>
> ==============================================================================
> --- llvm/trunk/tools/llvm-mc/Disassembler.h (original)
> +++ llvm/trunk/tools/llvm-mc/Disassembler.h Mon Apr 12 14:43:00 2010
> @@ -27,6 +27,9 @@
>   static int disassemble(const Target &target,
>                          const std::string &tripleString,
>                          MemoryBuffer &buffer);
> +
> +  static int disassembleEnhanced(const std::string &tripleString,
> +                                 MemoryBuffer &buffer);
>  };
>
>  } // namespace llvm
>
> Modified: llvm/trunk/tools/llvm-mc/Makefile
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/Makefile?rev=101058&r1=101057&r2=101058&view=diff
>
> ==============================================================================
> --- llvm/trunk/tools/llvm-mc/Makefile (original)
> +++ llvm/trunk/tools/llvm-mc/Makefile Mon Apr 12 14:43:00 2010
> @@ -22,3 +22,6 @@
>  LINK_COMPONENTS := $(TARGETS_TO_BUILD) MCParser MC support
>
>  include $(LLVM_SRC_ROOT)/Makefile.rules
> +
> +# Using LIBS instead of USEDLIBS to force static linking
> +LIBS += $(LLVMLibDir)/libEnhancedDisassembly.a
>
> Modified: llvm/trunk/tools/llvm-mc/llvm-mc.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/llvm-mc.cpp?rev=101058&r1=101057&r2=101058&view=diff
>
> ==============================================================================
> --- llvm/trunk/tools/llvm-mc/llvm-mc.cpp (original)
> +++ llvm/trunk/tools/llvm-mc/llvm-mc.cpp Mon Apr 12 14:43:00 2010
> @@ -97,7 +97,8 @@
>  enum ActionType {
>   AC_AsLex,
>   AC_Assemble,
> -  AC_Disassemble
> +  AC_Disassemble,
> +  AC_EDisassemble
>  };
>
>  static cl::opt<ActionType>
> @@ -109,6 +110,8 @@
>                              "Assemble a .s file (default)"),
>                   clEnumValN(AC_Disassemble, "disassemble",
>                              "Disassemble strings of hex bytes"),
> +                  clEnumValN(AC_EDisassemble, "edis",
> +                             "Enhanced disassembly of strings of hex
> bytes"),
>                   clEnumValEnd));
>
>  static const Target *GetTarget(const char *ProgName) {
> @@ -325,7 +328,7 @@
>   return Res;
>  }
>
> -static int DisassembleInput(const char *ProgName) {
> +static int DisassembleInput(const char *ProgName, bool Enhanced) {
>   const Target *TheTarget = GetTarget(ProgName);
>   if (!TheTarget)
>     return 0;
> @@ -344,7 +347,10 @@
>     return 1;
>   }
>
> -  return Disassembler::disassemble(*TheTarget, TripleName, *Buffer);
> +  if (Enhanced)
> +    return Disassembler::disassembleEnhanced(TripleName, *Buffer);
> +  else
> +    return Disassembler::disassemble(*TheTarget, TripleName, *Buffer);
>  }
>
>
> @@ -371,7 +377,9 @@
>   case AC_Assemble:
>     return AssembleInput(argv[0]);
>   case AC_Disassemble:
> -    return DisassembleInput(argv[0]);
> +    return DisassembleInput(argv[0], false);
> +  case AC_EDisassemble:
> +    return DisassembleInput(argv[0], true);
>   }
>
>   return 0;
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
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From benny.kra at googlemail.com  Tue Apr 13 09:41:52 2010
From: benny.kra at googlemail.com (Benjamin Kramer)
Date: Tue, 13 Apr 2010 14:41:52 -0000
Subject: [llvm-commits] [llvm] r101130 -
	/llvm/trunk/lib/Support/Allocator.cpp
Message-ID: <20100413144152.129892A6C12C@llvm.org>

Author: d0k
Date: Tue Apr 13 09:41:51 2010
New Revision: 101130

URL: http://llvm.org/viewvc/llvm-project?rev=101130&view=rev
Log:
Let BumpPtrAllocator lazily allocate the first slab.

We have some code in llvm and clang where a BumpPtrAllocator is declared in a
class but never used in the common case. Stop wasting memory there.

Modified:
    llvm/trunk/lib/Support/Allocator.cpp

Modified: llvm/trunk/lib/Support/Allocator.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Allocator.cpp?rev=101130&r1=101129&r2=101130&view=diff
==============================================================================
--- llvm/trunk/lib/Support/Allocator.cpp (original)
+++ llvm/trunk/lib/Support/Allocator.cpp Tue Apr 13 09:41:51 2010
@@ -23,9 +23,7 @@
 BumpPtrAllocator::BumpPtrAllocator(size_t size, size_t threshold,
                                    SlabAllocator &allocator)
     : SlabSize(size), SizeThreshold(threshold), Allocator(allocator),
-      CurSlab(0), BytesAllocated(0) {
-  StartNewSlab();
-}
+      CurSlab(0), BytesAllocated(0) { }
 
 BumpPtrAllocator::~BumpPtrAllocator() {
   DeallocateSlabs(CurSlab);
@@ -72,6 +70,8 @@
 /// Reset - Deallocate all but the current slab and reset the current pointer
 /// to the beginning of it, freeing all memory allocated so far.
 void BumpPtrAllocator::Reset() {
+  if (!CurSlab) // Start a new slab if we didn't allocate one already.
+    StartNewSlab();
   DeallocateSlabs(CurSlab->NextPtr);
   CurSlab->NextPtr = 0;
   CurPtr = (char*)(CurSlab + 1);
@@ -81,6 +81,9 @@
 /// Allocate - Allocate space at the specified alignment.
 ///
 void *BumpPtrAllocator::Allocate(size_t Size, size_t Alignment) {
+  if (!CurSlab) // Start a new slab if we haven't allocated one already.
+    StartNewSlab();
+
   // Keep track of how many bytes we've allocated.
   BytesAllocated += Size;
 




From benny.kra at googlemail.com  Tue Apr 13 10:01:26 2010
From: benny.kra at googlemail.com (Benjamin Kramer)
Date: Tue, 13 Apr 2010 15:01:26 -0000
Subject: [llvm-commits] [llvm] r101131 -
 /llvm/trunk/unittests/ExecutionEngine/JIT/JITMemoryManagerTest.cpp
Message-ID: <20100413150126.5DAD32A6C12C@llvm.org>

Author: d0k
Date: Tue Apr 13 10:01:26 2010
New Revision: 101131

URL: http://llvm.org/viewvc/llvm-project?rev=101131&view=rev
Log:
Update unittest for allocator laziness.

Modified:
    llvm/trunk/unittests/ExecutionEngine/JIT/JITMemoryManagerTest.cpp

Modified: llvm/trunk/unittests/ExecutionEngine/JIT/JITMemoryManagerTest.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/ExecutionEngine/JIT/JITMemoryManagerTest.cpp?rev=101131&r1=101130&r2=101131&view=diff
==============================================================================
--- llvm/trunk/unittests/ExecutionEngine/JIT/JITMemoryManagerTest.cpp (original)
+++ llvm/trunk/unittests/ExecutionEngine/JIT/JITMemoryManagerTest.cpp Tue Apr 13 10:01:26 2010
@@ -239,8 +239,8 @@
   size_t Size = 128;
   int Iters = (SlabSize / Size) + 1;
 
-  // We should start with one slab.
-  EXPECT_EQ(1U, MemMgr->GetNumDataSlabs());
+  // We should start with no slabs.
+  EXPECT_EQ(0U, MemMgr->GetNumDataSlabs());
 
   // After allocating a bunch of globals, we should have two.
   for (int I = 0; I < Iters; ++I)
@@ -262,8 +262,8 @@
   size_t Size = 128;
   int Iters = (SlabSize / Size) + 1;
 
-  // We should start with one slab.
-  EXPECT_EQ(1U, MemMgr->GetNumStubSlabs());
+  // We should start with no slabs.
+  EXPECT_EQ(0U, MemMgr->GetNumDataSlabs());
 
   // After allocating a bunch of stubs, we should have two.
   for (int I = 0; I < Iters; ++I)




From gabor at mac.com  Tue Apr 13 10:50:22 2010
From: gabor at mac.com (Gabor Greif)
Date: Tue, 13 Apr 2010 17:50:22 +0200
Subject: [llvm-commits] [PATCH] Rotate CallInst operands -- HEADS UP
Message-ID: <4BC492BE.8040205@mac.com>

Hi all,

I am about to submit a patch for reordering CallInst operands.

Note: this potentially will have an effect on any optimizer that
does not use CallSite + getCalledValue (the abstract interface)
but does getOperand/setOperand on the CallInst directly.

In a nutshell, the "callee" operand moves to the last operand
position, whereas it used to reside in the frontmost position.

Motivation ---------------------------------------------------
Because of the internal workings of Use::getUser() the operands
near the end of the operand array allow a faster access to their
User. Call-Graph computation relies on getUser() and is expected
to become speedier.
Also, InvokeInst already has transitioned to this operand ordering
some time ago (already in the upcoming release 2.7). Moving CallInst
over allows to simplify CallSite.
Third, there is no more need to add 1 to op_begin() when accessing
the arguments of the call.
Fourth, getCalledValue (and friends) now access a value at a constant
offset from the CallInst, whereas before this change it needed a pointer
dereference operation (resp. a multiplication with sizeof(Use)).

What to do ---------------------------------------------------

If you have an optimization framework that interrogates CallInsts
directly, you should use the abstract accessors CallSite and
getCalledValue/Function (and friends) so you don't have to bother
with operand positioning. You can make these changes (to employ
the abstract accessors) now, and this will probably improve your
code because they also handle InvokeInst.

llvm-gcc needed no adjustment, and clang needed one change (in the
spirit of the lines above) which has been checked in already.

For reviewers -------------------------------------------------

The changes are mostly mechanical, and do not need a lot of explanation.
There is at least one fix to an InvokeInst bug (in CBackend). Of
course I could commit that (those) separately.

Cheers,

	Gabor


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From daniel at zuster.org  Tue Apr 13 11:18:28 2010
From: daniel at zuster.org (Daniel Dunbar)
Date: Tue, 13 Apr 2010 09:18:28 -0700
Subject: [llvm-commits] [PATCH] Rotate CallInst operands -- HEADS UP
In-Reply-To: <4BC492BE.8040205@mac.com>
References: <4BC492BE.8040205@mac.com>
Message-ID: <x2q6a8523d61004130918y7a79b03bkf838fb62b7c2f461@mail.gmail.com>

Hi Gabor,

What is the measured performance impact of this change?

 - Daniel

On Tue, Apr 13, 2010 at 8:50 AM, Gabor Greif <gabor at mac.com> wrote:
> Hi all,
>
> I am about to submit a patch for reordering CallInst operands.
>
> Note: this potentially will have an effect on any optimizer that
> does not use CallSite + getCalledValue (the abstract interface)
> but does getOperand/setOperand on the CallInst directly.
>
> In a nutshell, the "callee" operand moves to the last operand
> position, whereas it used to reside in the frontmost position.
>
> Motivation ---------------------------------------------------
> Because of the internal workings of Use::getUser() the operands
> near the end of the operand array allow a faster access to their
> User. Call-Graph computation relies on getUser() and is expected
> to become speedier.
> Also, InvokeInst already has transitioned to this operand ordering
> some time ago (already in the upcoming release 2.7). Moving CallInst
> over allows to simplify CallSite.
> Third, there is no more need to add 1 to op_begin() when accessing
> the arguments of the call.
> Fourth, getCalledValue (and friends) now access a value at a constant
> offset from the CallInst, whereas before this change it needed a pointer
> dereference operation (resp. a multiplication with sizeof(Use)).
>
> What to do ---------------------------------------------------
>
> If you have an optimization framework that interrogates CallInsts
> directly, you should use the abstract accessors CallSite and
> getCalledValue/Function (and friends) so you don't have to bother
> with operand positioning. You can make these changes (to employ
> the abstract accessors) now, and this will probably improve your
> code because they also handle InvokeInst.
>
> llvm-gcc needed no adjustment, and clang needed one change (in the
> spirit of the lines above) which has been checked in already.
>
> For reviewers -------------------------------------------------
>
> The changes are mostly mechanical, and do not need a lot of explanation.
> There is at least one fix to an InvokeInst bug (in CBackend). Of
> course I could commit that (those) separately.
>
> Cheers,
>
> ? ? ? ?Gabor
>
>
>
> Index: llvm/include/llvm/Instructions.h
> ===================================================================
> --- llvm/include/llvm/Instructions.h ? ?(revision 101132)
> +++ llvm/include/llvm/Instructions.h ? ?(working copy)
> @@ -1031,17 +1031,17 @@
> ? /// indirect function invocation.
> ? ///
> ? Function *getCalledFunction() const {
> - ? ?return dyn_cast<Function>(Op<0>());
> + ? ?return dyn_cast<Function>(Op<-1>());
> ? }
>
> ? /// getCalledValue - Get a pointer to the function that is invoked by this
> ? /// instruction.
> - ?const Value *getCalledValue() const { return Op<0>(); }
> - ? ? ? ?Value *getCalledValue() ? ? ? { return Op<0>(); }
> + ?const Value *getCalledValue() const { return Op<-1>(); }
> + ? ? ? ?Value *getCalledValue() ? ? ? { return Op<-1>(); }
>
> ? /// setCalledFunction - Set the function called.
> ? void setCalledFunction(Value* Fn) {
> - ? ?Op<0>() = Fn;
> + ? ?Op<-1>() = Fn;
> ? }
>
> ? // Methods for support type inquiry through isa, cast, and dyn_cast:
> @@ -1071,7 +1071,7 @@
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?->getElementType())->getReturnType(),
> ? ? ? ? ? ? ? ? Instruction::Call,
> ? ? ? ? ? ? ? ? OperandTraits<CallInst>::op_end(this) - (ArgEnd - ArgBegin + 1),
> - ? ? ? ? ? ? ? ?(unsigned)(ArgEnd - ArgBegin + 1), InsertAtEnd) {
> + ? ? ? ? ? ? ? ?unsigned(ArgEnd - ArgBegin + 1), InsertAtEnd) {
> ? init(Func, ArgBegin, ArgEnd, NameStr,
> ? ? ? ?typename std::iterator_traits<InputIterator>::iterator_category());
> ?}
> Index: llvm/include/llvm/IntrinsicInst.h
> ===================================================================
> --- llvm/include/llvm/IntrinsicInst.h ? (revision 101132)
> +++ llvm/include/llvm/IntrinsicInst.h ? (working copy)
> @@ -43,7 +43,7 @@
> ? ? Intrinsic::ID getIntrinsicID() const {
> ? ? ? return (Intrinsic::ID)getCalledFunction()->getIntrinsicID();
> ? ? }
> -
> +
> ? ? // Methods for support type inquiry through isa, cast, and dyn_cast:
> ? ? static inline bool classof(const IntrinsicInst *) { return true; }
> ? ? static inline bool classof(const CallInst *I) {
> @@ -74,7 +74,7 @@
> ? ? static inline bool classof(const Value *V) {
> ? ? ? return isa<IntrinsicInst>(V) && classof(cast<IntrinsicInst>(V));
> ? ? }
> -
> +
> ? ? static Value *StripCast(Value *C);
> ? };
>
> @@ -83,7 +83,7 @@
> ? class DbgDeclareInst : public DbgInfoIntrinsic {
> ? public:
> ? ? Value *getAddress() const;
> - ? ?MDNode *getVariable() const { return cast<MDNode>(getOperand(2)); }
> + ? ?MDNode *getVariable() const { return cast<MDNode>(getOperand(1)); }
>
> ? ? // Methods for support type inquiry through isa, cast, and dyn_cast:
> ? ? static inline bool classof(const DbgDeclareInst *) { return true; }
> @@ -103,10 +103,10 @@
> ? ? Value *getValue();
> ? ? uint64_t getOffset() const {
> ? ? ? return cast<ConstantInt>(
> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? const_cast<Value*>(getOperand(2)))->getZExtValue();
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? const_cast<Value*>(getOperand(1)))->getZExtValue();
> ? ? }
> - ? ?const MDNode *getVariable() const { return cast<MDNode>(getOperand(3)); }
> - ? ?MDNode *getVariable() { return cast<MDNode>(getOperand(3)); }
> + ? ?const MDNode *getVariable() const { return cast<MDNode>(getOperand(2)); }
> + ? ?MDNode *getVariable() { return cast<MDNode>(getOperand(2)); }
>
> ? ? // Methods for support type inquiry through isa, cast, and dyn_cast:
> ? ? static inline bool classof(const DbgValueInst *) { return true; }
> @@ -122,19 +122,19 @@
> ? ///
> ? class MemIntrinsic : public IntrinsicInst {
> ? public:
> - ? ?Value *getRawDest() const { return const_cast<Value*>(getOperand(1)); }
> + ? ?Value *getRawDest() const { return const_cast<Value*>(getOperand(0)); }
>
> - ? ?Value *getLength() const { return const_cast<Value*>(getOperand(3)); }
> + ? ?Value *getLength() const { return const_cast<Value*>(getOperand(2)); }
> ? ? ConstantInt *getAlignmentCst() const {
> - ? ? ?return cast<ConstantInt>(const_cast<Value*>(getOperand(4)));
> + ? ? ?return cast<ConstantInt>(const_cast<Value*>(getOperand(3)));
> ? ? }
> -
> +
> ? ? unsigned getAlignment() const {
> ? ? ? return getAlignmentCst()->getZExtValue();
> ? ? }
>
> ? ? ConstantInt *getVolatileCst() const {
> - ? ? ?return cast<ConstantInt>(const_cast<Value*>(getOperand(5)));
> + ? ? ?return cast<ConstantInt>(const_cast<Value*>(getOperand(4)));
> ? ? }
> ? ? bool isVolatile() const {
> ? ? ? return getVolatileCst()->getZExtValue() != 0;
> @@ -150,27 +150,27 @@
> ? ? void setDest(Value *Ptr) {
> ? ? ? assert(getRawDest()->getType() == Ptr->getType() &&
> ? ? ? ? ? ? ?"setDest called with pointer of wrong type!");
> - ? ? ?setOperand(1, Ptr);
> + ? ? ?setOperand(0, Ptr);
> ? ? }
>
> ? ? void setLength(Value *L) {
> ? ? ? assert(getLength()->getType() == L->getType() &&
> ? ? ? ? ? ? ?"setLength called with value of wrong type!");
> - ? ? ?setOperand(3, L);
> + ? ? ?setOperand(2, L);
> ? ? }
> -
> +
> ? ? void setAlignment(Constant* A) {
> - ? ? ?setOperand(4, A);
> + ? ? ?setOperand(3, A);
> ? ? }
>
> ? ? void setVolatile(Constant* V) {
> - ? ? ?setOperand(5, V);
> + ? ? ?setOperand(4, V);
> ? ? }
>
> ? ? const Type *getAlignmentType() const {
> - ? ? ?return getOperand(4)->getType();
> + ? ? ?return getOperand(3)->getType();
> ? ? }
> -
> +
> ? ? // Methods for support type inquiry through isa, cast, and dyn_cast:
> ? ? static inline bool classof(const MemIntrinsic *) { return true; }
> ? ? static inline bool classof(const IntrinsicInst *I) {
> @@ -193,14 +193,14 @@
> ? public:
> ? ? /// get* - Return the arguments to the instruction.
> ? ? ///
> - ? ?Value *getValue() const { return const_cast<Value*>(getOperand(2)); }
> -
> + ? ?Value *getValue() const { return const_cast<Value*>(getOperand(1)); }
> +
> ? ? void setValue(Value *Val) {
> ? ? ? assert(getValue()->getType() == Val->getType() &&
> - ? ? ? ? ? ? "setSource called with pointer of wrong type!");
> - ? ? ?setOperand(2, Val);
> + ? ? ? ? ? ? "setValue called with value of wrong type!");
> + ? ? ?setOperand(1, Val);
> ? ? }
> -
> +
> ? ? // Methods for support type inquiry through isa, cast, and dyn_cast:
> ? ? static inline bool classof(const MemSetInst *) { return true; }
> ? ? static inline bool classof(const IntrinsicInst *I) {
> @@ -210,26 +210,26 @@
> ? ? ? return isa<IntrinsicInst>(V) && classof(cast<IntrinsicInst>(V));
> ? ? }
> ? };
> -
> +
> ? /// MemTransferInst - This class wraps the llvm.memcpy/memmove intrinsics.
> ? ///
> ? class MemTransferInst : public MemIntrinsic {
> ? public:
> ? ? /// get* - Return the arguments to the instruction.
> ? ? ///
> - ? ?Value *getRawSource() const { return const_cast<Value*>(getOperand(2)); }
> -
> + ? ?Value *getRawSource() const { return const_cast<Value*>(getOperand(1)); }
> +
> ? ? /// getSource - This is just like getRawSource, but it strips off any cast
> ? ? /// instructions that feed it, giving the original input. ?The returned
> ? ? /// value is guaranteed to be a pointer.
> ? ? Value *getSource() const { return getRawSource()->stripPointerCasts(); }
> -
> +
> ? ? void setSource(Value *Ptr) {
> ? ? ? assert(getRawSource()->getType() == Ptr->getType() &&
> ? ? ? ? ? ? ?"setSource called with pointer of wrong type!");
> - ? ? ?setOperand(2, Ptr);
> + ? ? ?setOperand(1, Ptr);
> ? ? }
> -
> +
> ? ? // Methods for support type inquiry through isa, cast, and dyn_cast:
> ? ? static inline bool classof(const MemTransferInst *) { return true; }
> ? ? static inline bool classof(const IntrinsicInst *I) {
> @@ -240,8 +240,8 @@
> ? ? ? return isa<IntrinsicInst>(V) && classof(cast<IntrinsicInst>(V));
> ? ? }
> ? };
> -
> -
> +
> +
> ? /// MemCpyInst - This class wraps the llvm.memcpy intrinsic.
> ? ///
> ? class MemCpyInst : public MemTransferInst {
> @@ -283,7 +283,7 @@
> ? ? ? return isa<IntrinsicInst>(V) && classof(cast<IntrinsicInst>(V));
> ? ? }
> ? };
> -
> +
> ? /// MemoryUseIntrinsic - This is the common base class for the memory use
> ? /// marker intrinsics.
> ? ///
> Index: llvm/include/llvm/Support/CallSite.h
> ===================================================================
> --- llvm/include/llvm/Support/CallSite.h ? ? ? ?(revision 101132)
> +++ llvm/include/llvm/Support/CallSite.h ? ? ? ?(working copy)
> @@ -153,27 +153,21 @@
> ?private:
> ? /// Returns the operand number of the first argument
> ? unsigned getArgumentOffset() const {
> - ? ?if (isCall())
> - ? ? ?return 1; // Skip Function (ATM)
> - ? ?else
> ? ? ? return 0; // Args are at the front
> ? }
>
> ? unsigned getArgumentEndOffset() const {
> ? ? if (isCall())
> - ? ? ?return 0; // Unchanged (ATM)
> + ? ? ?return 1; // Skip Function
> ? ? else
> ? ? ? return 3; // Skip BB, BB, Function
> ? }
>
> ? IterTy getCallee() const {
> - ? ? ?// FIXME: this is slow, since we do not have the fast versions
> - ? ? ?// of the op_*() functions here. See CallSite::getCallee.
> - ? ? ?//
> - ? ?if (isCall())
> - ? ? ?return getInstruction()->op_begin(); // Unchanged (ATM)
> - ? ?else
> - ? ? ?return getInstruction()->op_end() - 3; // Skip BB, BB, Function
> + ? ?// FIXME: this is slow, since we do not have the fast versions
> + ? ? ? ? ? ? ? // of the op_*() functions here. See CallSite::getCallee.
> + ? ? ? ? ? ? ? //
> + ? ?return arg_end();
> ? }
> ?};
>
> Index: llvm/lib/Analysis/MemoryBuiltins.cpp
> ===================================================================
> --- llvm/lib/Analysis/MemoryBuiltins.cpp ? ? ? ?(revision 101132)
> +++ llvm/lib/Analysis/MemoryBuiltins.cpp ? ? ? ?(working copy)
> @@ -103,7 +103,7 @@
>
> ? // If malloc calls' arg can be determined to be a multiple of ElementSize,
> ? // return the multiple. ?Otherwise, return NULL.
> - ?Value *MallocArg = CI->getOperand(1);
> + ?Value *MallocArg = CI->getOperand(0);
> ? Value *Multiple = NULL;
> ? if (ComputeMultiple(MallocArg, ElementSize, Multiple,
> ? ? ? ? ? ? ? ? ? ? ? LookThroughSExt))
> @@ -120,7 +120,7 @@
> ? Value *ArraySize = computeArraySize(CI, TD);
>
> ? if (ArraySize &&
> - ? ? ?ArraySize != ConstantInt::get(CI->getOperand(1)->getType(), 1))
> + ? ? ?ArraySize != ConstantInt::get(CI->getOperand(0)->getType(), 1))
> ? ? return CI;
>
> ? // CI is a non-array malloc or we can't figure out that it is an array malloc.
> Index: llvm/lib/Analysis/MemoryDependenceAnalysis.cpp
> ===================================================================
> --- llvm/lib/Analysis/MemoryDependenceAnalysis.cpp ? ? ?(revision 101132)
> +++ llvm/lib/Analysis/MemoryDependenceAnalysis.cpp ? ? ?(working copy)
> @@ -117,7 +117,7 @@
> ? ? ? Pointer = V->getOperand(0);
> ? ? ? PointerSize = AA->getTypeStoreSize(V->getType());
> ? ? } else if (isFreeCall(Inst)) {
> - ? ? ?Pointer = Inst->getOperand(1);
> + ? ? ?Pointer = Inst->getOperand(0);
> ? ? ? // calls to free() erase the entire structure
> ? ? ? PointerSize = ~0ULL;
> ? ? } else if (isa<CallInst>(Inst) || isa<InvokeInst>(Inst)) {
> @@ -197,9 +197,9 @@
> ? ? ? ? // pointer, not on query pointers that are indexed off of them. ?It'd
> ? ? ? ? // be nice to handle that at some point.
> ? ? ? ? AliasAnalysis::AliasResult R =
> - ? ? ? ? ?AA->alias(II->getOperand(3), ~0U, MemPtr, ~0U);
> + ? ? ? ? ?AA->alias(II->getOperand(2), ~0U, MemPtr, ~0U);
> ? ? ? ? if (R == AliasAnalysis::MustAlias) {
> - ? ? ? ? ?InvariantTag = II->getOperand(1);
> + ? ? ? ? ?InvariantTag = II->getOperand(0);
> ? ? ? ? ? continue;
> ? ? ? ? }
>
> @@ -210,7 +210,7 @@
> ? ? ? ? // pointer, not on query pointers that are indexed off of them. ?It'd
> ? ? ? ? // be nice to handle that at some point.
> ? ? ? ? AliasAnalysis::AliasResult R =
> - ? ? ? ? ?AA->alias(II->getOperand(2), ~0U, MemPtr, ~0U);
> + ? ? ? ? ?AA->alias(II->getOperand(1), ~0U, MemPtr, ~0U);
> ? ? ? ? if (R == AliasAnalysis::MustAlias)
> ? ? ? ? ? return MemDepResult::getDef(II);
> ? ? ? }
> @@ -366,7 +366,7 @@
> ? ? ? MemSize = AA->getTypeStoreSize(LI->getType());
> ? ? }
> ? } else if (isFreeCall(QueryInst)) {
> - ? ?MemPtr = QueryInst->getOperand(1);
> + ? ?MemPtr = QueryInst->getOperand(0);
> ? ? // calls to free() erase the entire structure, not just a field.
> ? ? MemSize = ~0UL;
> ? } else if (isa<CallInst>(QueryInst) || isa<InvokeInst>(QueryInst)) {
> @@ -378,13 +378,13 @@
> ? ? case Intrinsic::lifetime_start:
> ? ? case Intrinsic::lifetime_end:
> ? ? case Intrinsic::invariant_start:
> + ? ? ?MemPtr = QueryInst->getOperand(1);
> + ? ? ?MemSize = cast<ConstantInt>(QueryInst->getOperand(0))->getZExtValue();
> + ? ? ?break;
> + ? ?case Intrinsic::invariant_end:
> ? ? ? MemPtr = QueryInst->getOperand(2);
> ? ? ? MemSize = cast<ConstantInt>(QueryInst->getOperand(1))->getZExtValue();
> ? ? ? break;
> - ? ?case Intrinsic::invariant_end:
> - ? ? ?MemPtr = QueryInst->getOperand(3);
> - ? ? ?MemSize = cast<ConstantInt>(QueryInst->getOperand(2))->getZExtValue();
> - ? ? ?break;
> ? ? default:
> ? ? ? CallSite QueryCS = CallSite::get(QueryInst);
> ? ? ? bool isReadOnly = AA->onlyReadsMemory(QueryCS);
> Index: llvm/lib/Analysis/IPA/GlobalsModRef.cpp
> ===================================================================
> --- llvm/lib/Analysis/IPA/GlobalsModRef.cpp ? ? (revision 101132)
> +++ llvm/lib/Analysis/IPA/GlobalsModRef.cpp ? ? (working copy)
> @@ -252,7 +252,7 @@
> ? ? } else if (CallInst *CI = dyn_cast<CallInst>(*UI)) {
> ? ? ? // Make sure that this is just the function being called, not that it is
> ? ? ? // passing into the function.
> - ? ? ?for (unsigned i = 1, e = CI->getNumOperands(); i != e; ++i)
> + ? ? ?for (unsigned i = 0, e = CI->getNumOperands() - 1; i != e; ++i)
> ? ? ? ? if (CI->getOperand(i) == V) return true;
> ? ? } else if (InvokeInst *II = dyn_cast<InvokeInst>(*UI)) {
> ? ? ? // Make sure that this is just the function being called, not that it is
> Index: llvm/lib/Analysis/ValueTracking.cpp
> ===================================================================
> --- llvm/lib/Analysis/ValueTracking.cpp (revision 101132)
> +++ llvm/lib/Analysis/ValueTracking.cpp (working copy)
> @@ -953,7 +953,7 @@
> ? if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(I))
> ? ? // sqrt(-0.0) = -0.0, no other negative results are possible.
> ? ? if (II->getIntrinsicID() == Intrinsic::sqrt)
> - ? ? ?return CannotBeNegativeZero(II->getOperand(1), Depth+1);
> + ? ? ?return CannotBeNegativeZero(II->getOperand(0), Depth+1);
>
> ? if (const CallInst *CI = dyn_cast<CallInst>(I))
> ? ? if (const Function *F = CI->getCalledFunction()) {
> @@ -966,7 +966,7 @@
> ? ? ? ? if (F->getName() == "fabsl") return true;
> ? ? ? ? if (F->getName() == "sqrt" || F->getName() == "sqrtf" ||
> ? ? ? ? ? ? F->getName() == "sqrtl")
> - ? ? ? ? ?return CannotBeNegativeZero(CI->getOperand(1), Depth+1);
> + ? ? ? ? ?return CannotBeNegativeZero(CI->getOperand(0), Depth+1);
> ? ? ? }
> ? ? }
>
> Index: llvm/lib/Analysis/BasicAliasAnalysis.cpp
> ===================================================================
> --- llvm/lib/Analysis/BasicAliasAnalysis.cpp ? ?(revision 101132)
> +++ llvm/lib/Analysis/BasicAliasAnalysis.cpp ? ?(working copy)
> @@ -94,7 +94,7 @@
> ? } else if (const CallInst* CI = extractMallocCall(V)) {
> ? ? if (!isArrayMalloc(V, &TD))
> ? ? ? // The size is the argument to the malloc call.
> - ? ? ?if (const ConstantInt* C = dyn_cast<ConstantInt>(CI->getOperand(1)))
> + ? ? ?if (const ConstantInt* C = dyn_cast<ConstantInt>(CI->getOperand(0)))
> ? ? ? ? return (C->getZExtValue() < Size);
> ? ? return false;
> ? } else if (const Argument *A = dyn_cast<Argument>(V)) {
> @@ -318,10 +318,10 @@
> ? case Intrinsic::memcpy:
> ? case Intrinsic::memmove: {
> ? ? unsigned Len = ~0U;
> - ? ?if (ConstantInt *LenCI = dyn_cast<ConstantInt>(II->getOperand(3)))
> + ? ?if (ConstantInt *LenCI = dyn_cast<ConstantInt>(II->getOperand(2)))
> ? ? ? Len = LenCI->getZExtValue();
> - ? ?Value *Dest = II->getOperand(1);
> - ? ?Value *Src = II->getOperand(2);
> + ? ?Value *Dest = II->getOperand(0);
> + ? ?Value *Src = II->getOperand(1);
> ? ? if (isNoAlias(Dest, Len, P, Size)) {
> ? ? ? if (isNoAlias(Src, Len, P, Size))
> ? ? ? ? return NoModRef;
> @@ -332,9 +332,9 @@
> ? case Intrinsic::memset:
> ? ? // Since memset is 'accesses arguments' only, the AliasAnalysis base class
> ? ? // will handle it for the variable length case.
> - ? ?if (ConstantInt *LenCI = dyn_cast<ConstantInt>(II->getOperand(3))) {
> + ? ?if (ConstantInt *LenCI = dyn_cast<ConstantInt>(II->getOperand(2))) {
> ? ? ? unsigned Len = LenCI->getZExtValue();
> - ? ? ?Value *Dest = II->getOperand(1);
> + ? ? ?Value *Dest = II->getOperand(0);
> ? ? ? if (isNoAlias(Dest, Len, P, Size))
> ? ? ? ? return NoModRef;
> ? ? }
> @@ -352,7 +352,7 @@
> ? case Intrinsic::atomic_load_umax:
> ? case Intrinsic::atomic_load_umin:
> ? ? if (TD) {
> - ? ? ?Value *Op1 = II->getOperand(1);
> + ? ? ?Value *Op1 = II->getOperand(0);
> ? ? ? unsigned Op1Size = TD->getTypeStoreSize(Op1->getType());
> ? ? ? if (isNoAlias(Op1, Op1Size, P, Size))
> ? ? ? ? return NoModRef;
> @@ -361,14 +361,14 @@
> ? case Intrinsic::lifetime_start:
> ? case Intrinsic::lifetime_end:
> ? case Intrinsic::invariant_start: {
> - ? ?unsigned PtrSize = cast<ConstantInt>(II->getOperand(1))->getZExtValue();
> - ? ?if (isNoAlias(II->getOperand(2), PtrSize, P, Size))
> + ? ?unsigned PtrSize = cast<ConstantInt>(II->getOperand(0))->getZExtValue();
> + ? ?if (isNoAlias(II->getOperand(1), PtrSize, P, Size))
> ? ? ? return NoModRef;
> ? ? break;
> ? }
> ? case Intrinsic::invariant_end: {
> - ? ?unsigned PtrSize = cast<ConstantInt>(II->getOperand(2))->getZExtValue();
> - ? ?if (isNoAlias(II->getOperand(3), PtrSize, P, Size))
> + ? ?unsigned PtrSize = cast<ConstantInt>(II->getOperand(1))->getZExtValue();
> + ? ?if (isNoAlias(II->getOperand(2), PtrSize, P, Size))
> ? ? ? return NoModRef;
> ? ? break;
> ? }
> Index: llvm/lib/Analysis/ConstantFolding.cpp
> ===================================================================
> --- llvm/lib/Analysis/ConstantFolding.cpp ? ? ? (revision 101132)
> +++ llvm/lib/Analysis/ConstantFolding.cpp ? ? ? (working copy)
> @@ -772,9 +772,9 @@
> ? case Instruction::ICmp:
> ? case Instruction::FCmp: assert(0 && "Invalid for compares");
> ? case Instruction::Call:
> - ? ?if (Function *F = dyn_cast<Function>(Ops[0]))
> + ? ?if (Function *F = dyn_cast<Function>(Ops[NumOps - 1]))
> ? ? ? if (canConstantFoldCallTo(F))
> - ? ? ? ?return ConstantFoldCall(F, Ops+1, NumOps-1);
> + ? ? ? ?return ConstantFoldCall(F, Ops, NumOps - 1);
> ? ? return 0;
> ? case Instruction::PtrToInt:
> ? ? // If the input is a inttoptr, eliminate the pair. ?This requires knowing
> Index: llvm/lib/Target/X86/X86ISelLowering.cpp
> ===================================================================
> --- llvm/lib/Target/X86/X86ISelLowering.cpp ? ? (revision 101132)
> +++ llvm/lib/Target/X86/X86ISelLowering.cpp ? ? (working copy)
> @@ -9917,7 +9917,7 @@
>
> ? // Verify this is a simple bswap.
> ? if (CI->getNumOperands() != 2 ||
> - ? ? ?CI->getType() != CI->getOperand(1)->getType() ||
> + ? ? ?CI->getType() != CI->getOperand(0)->getType() ||
> ? ? ? !CI->getType()->isIntegerTy())
> ? ? return false;
>
> @@ -9930,7 +9930,7 @@
> ? Module *M = CI->getParent()->getParent()->getParent();
> ? Constant *Int = Intrinsic::getDeclaration(M, Intrinsic::bswap, Tys, 1);
>
> - ?Value *Op = CI->getOperand(1);
> + ?Value *Op = CI->getOperand(0);
> ? Op = CallInst::Create(Int, Op, CI->getName(), CI);
>
> ? CI->replaceAllUsesWith(Op);
> Index: llvm/lib/Target/X86/X86FastISel.cpp
> ===================================================================
> --- llvm/lib/Target/X86/X86FastISel.cpp (revision 101132)
> +++ llvm/lib/Target/X86/X86FastISel.cpp (working copy)
> @@ -1168,8 +1168,8 @@
> ? ? // Emit code inline code to store the stack guard onto the stack.
> ? ? EVT PtrTy = TLI.getPointerTy();
>
> - ? ?Value *Op1 = I.getOperand(1); // The guard's value.
> - ? ?AllocaInst *Slot = cast<AllocaInst>(I.getOperand(2));
> + ? ?Value *Op1 = I.getOperand(0); // The guard's value.
> + ? ?AllocaInst *Slot = cast<AllocaInst>(I.getOperand(1));
>
> ? ? // Grab the frame index.
> ? ? X86AddressMode AM;
> @@ -1180,7 +1180,7 @@
> ? ? return true;
> ? }
> ? case Intrinsic::objectsize: {
> - ? ?ConstantInt *CI = dyn_cast<ConstantInt>(I.getOperand(2));
> + ? ?ConstantInt *CI = dyn_cast<ConstantInt>(I.getOperand(1));
> ? ? const Type *Ty = I.getCalledFunction()->getReturnType();
>
> ? ? assert(CI && "Non-constant type in Intrinsic::objectsize?");
> @@ -1235,8 +1235,8 @@
> ? ? if (!isTypeLegal(RetTy, VT))
> ? ? ? return false;
>
> - ? ?Value *Op1 = I.getOperand(1);
> - ? ?Value *Op2 = I.getOperand(2);
> + ? ?Value *Op1 = I.getOperand(0);
> + ? ?Value *Op2 = I.getOperand(1);
> ? ? unsigned Reg1 = getRegForValue(Op1);
> ? ? unsigned Reg2 = getRegForValue(Op2);
>
> @@ -1279,7 +1279,7 @@
>
> ?bool X86FastISel::X86SelectCall(Instruction *I) {
> ? CallInst *CI = cast<CallInst>(I);
> - ?Value *Callee = I->getOperand(0);
> + ?Value *Callee = CI->getCalledValue();
>
> ? // Can't handle inline asm yet.
> ? if (isa<InlineAsm>(Callee))
> Index: llvm/lib/Target/CBackend/CBackend.cpp
> ===================================================================
> --- llvm/lib/Target/CBackend/CBackend.cpp ? ? ? (revision 101132)
> +++ llvm/lib/Target/CBackend/CBackend.cpp ? ? ? (working copy)
> @@ -2886,7 +2886,7 @@
> ? bool hasByVal = I.hasByValArgument();
> ? bool isStructRet = I.hasStructRetAttr();
> ? if (isStructRet) {
> - ? ?writeOperandDeref(I.getOperand(1));
> + ? ?writeOperandDeref(I.getOperand(0));
> ? ? Out << " = ";
> ? }
>
> @@ -2942,7 +2942,7 @@
>
> ? unsigned NumDeclaredParams = FTy->getNumParams();
>
> - ?CallSite::arg_iterator AI = I.op_begin()+1, AE = I.op_end();
> + ?CallInst::op_iterator AI = I.op_begin(), AE = I.op_end() - 1;
> ? unsigned ArgNo = 0;
> ? if (isStructRet) { ? // Skip struct return argument.
> ? ? ++AI;
> @@ -2996,7 +2996,7 @@
> ? ? Out << "0; ";
>
> ? ? Out << "va_start(*(va_list*)";
> - ? ?writeOperand(I.getOperand(1));
> + ? ?writeOperand(I.getOperand(0));
> ? ? Out << ", ";
> ? ? // Output the last argument to the enclosing function.
> ? ? if (I.getParent()->getParent()->arg_empty())
> @@ -3006,9 +3006,9 @@
> ? ? Out << ')';
> ? ? return true;
> ? case Intrinsic::vaend:
> - ? ?if (!isa<ConstantPointerNull>(I.getOperand(1))) {
> + ? ?if (!isa<ConstantPointerNull>(I.getOperand(0))) {
> ? ? ? Out << "0; va_end(*(va_list*)";
> - ? ? ?writeOperand(I.getOperand(1));
> + ? ? ?writeOperand(I.getOperand(0));
> ? ? ? Out << ')';
> ? ? } else {
> ? ? ? Out << "va_end(*(va_list*)0)";
> @@ -3017,47 +3017,47 @@
> ? case Intrinsic::vacopy:
> ? ? Out << "0; ";
> ? ? Out << "va_copy(*(va_list*)";
> + ? ?writeOperand(I.getOperand(0));
> + ? ?Out << ", *(va_list*)";
> ? ? writeOperand(I.getOperand(1));
> - ? ?Out << ", *(va_list*)";
> - ? ?writeOperand(I.getOperand(2));
> ? ? Out << ')';
> ? ? return true;
> ? case Intrinsic::returnaddress:
> ? ? Out << "__builtin_return_address(";
> - ? ?writeOperand(I.getOperand(1));
> + ? ?writeOperand(I.getOperand(0));
> ? ? Out << ')';
> ? ? return true;
> ? case Intrinsic::frameaddress:
> ? ? Out << "__builtin_frame_address(";
> - ? ?writeOperand(I.getOperand(1));
> + ? ?writeOperand(I.getOperand(0));
> ? ? Out << ')';
> ? ? return true;
> ? case Intrinsic::powi:
> ? ? Out << "__builtin_powi(";
> + ? ?writeOperand(I.getOperand(0));
> + ? ?Out << ", ";
> ? ? writeOperand(I.getOperand(1));
> - ? ?Out << ", ";
> - ? ?writeOperand(I.getOperand(2));
> ? ? Out << ')';
> ? ? return true;
> ? case Intrinsic::setjmp:
> ? ? Out << "setjmp(*(jmp_buf*)";
> - ? ?writeOperand(I.getOperand(1));
> + ? ?writeOperand(I.getOperand(0));
> ? ? Out << ')';
> ? ? return true;
> ? case Intrinsic::longjmp:
> ? ? Out << "longjmp(*(jmp_buf*)";
> + ? ?writeOperand(I.getOperand(0));
> + ? ?Out << ", ";
> ? ? writeOperand(I.getOperand(1));
> - ? ?Out << ", ";
> - ? ?writeOperand(I.getOperand(2));
> ? ? Out << ')';
> ? ? return true;
> ? case Intrinsic::prefetch:
> ? ? Out << "LLVM_PREFETCH((const void *)";
> + ? ?writeOperand(I.getOperand(0));
> + ? ?Out << ", ";
> ? ? writeOperand(I.getOperand(1));
> ? ? Out << ", ";
> ? ? writeOperand(I.getOperand(2));
> - ? ?Out << ", ";
> - ? ?writeOperand(I.getOperand(3));
> ? ? Out << ")";
> ? ? return true;
> ? case Intrinsic::stacksave:
> @@ -3074,7 +3074,7 @@
> ? ? printType(Out, I.getType());
> ? ? Out << ')';
> ? ? // Multiple GCC builtins multiplex onto this intrinsic.
> - ? ?switch (cast<ConstantInt>(I.getOperand(3))->getZExtValue()) {
> + ? ?switch (cast<ConstantInt>(I.getOperand(2))->getZExtValue()) {
> ? ? default: llvm_unreachable("Invalid llvm.x86.sse.cmp!");
> ? ? case 0: Out << "__builtin_ia32_cmpeq"; break;
> ? ? case 1: Out << "__builtin_ia32_cmplt"; break;
> @@ -3095,9 +3095,9 @@
> ? ? ? Out << 'd';
>
> ? ? Out << "(";
> + ? ?writeOperand(I.getOperand(0));
> + ? ?Out << ", ";
> ? ? writeOperand(I.getOperand(1));
> - ? ?Out << ", ";
> - ? ?writeOperand(I.getOperand(2));
> ? ? Out << ")";
> ? ? return true;
> ? case Intrinsic::ppc_altivec_lvsl:
> @@ -3105,7 +3105,7 @@
> ? ? printType(Out, I.getType());
> ? ? Out << ')';
> ? ? Out << "__builtin_altivec_lvsl(0, (void*)";
> - ? ?writeOperand(I.getOperand(1));
> + ? ?writeOperand(I.getOperand(0));
> ? ? Out << ")";
> ? ? return true;
> ? }
> @@ -3218,7 +3218,7 @@
> ? ? ? DestVal = ResultVals[ValueCount].first;
> ? ? ? DestValNo = ResultVals[ValueCount].second;
> ? ? } else
> - ? ? ?DestVal = CI.getOperand(ValueCount-ResultVals.size()+1);
> + ? ? ?DestVal = CI.getOperand(ValueCount-ResultVals.size());
>
> ? ? if (I->isEarlyClobber)
> ? ? ? C = "&"+C;
> @@ -3252,7 +3252,7 @@
> ? ? }
>
> ? ? assert(ValueCount >= ResultVals.size() && "Input can't refer to result");
> - ? ?Value *SrcVal = CI.getOperand(ValueCount-ResultVals.size()+1);
> + ? ?Value *SrcVal = CI.getOperand(ValueCount-ResultVals.size());
>
> ? ? Out << "\"" << C << "\"(";
> ? ? if (!I->isIndirect)
> Index: llvm/lib/Target/CppBackend/CPPBackend.cpp
> ===================================================================
> --- llvm/lib/Target/CppBackend/CPPBackend.cpp ? (revision 101132)
> +++ llvm/lib/Target/CppBackend/CPPBackend.cpp ? (working copy)
> @@ -1082,8 +1082,9 @@
>
> ? ? // Before we emit this instruction, we need to take care of generating any
> ? ? // forward references. So, we get the names of all the operands in advance
> - ? ?std::string* opNames = new std::string[I->getNumOperands()];
> - ? ?for (unsigned i = 0; i < I->getNumOperands(); i++) {
> + ? ?const unsigned Ops(I->getNumOperands());
> + ? ?std::string* opNames = new std::string[Ops];
> + ? ?for (unsigned i = 0; i < Ops; i++) {
> ? ? ? opNames[i] = getOpName(I->getOperand(i));
> ? ? }
>
> @@ -1144,15 +1145,15 @@
> ? ? ? const InvokeInst* inv = cast<InvokeInst>(I);
> ? ? ? Out << "std::vector<Value*> " << iName << "_params;";
> ? ? ? nl(Out);
> - ? ? ?for (unsigned i = 3; i < inv->getNumOperands(); ++i) {
> + ? ? ?for (unsigned i = 0; i < inv->getNumOperands() - 3; ++i) {
> ? ? ? ? Out << iName << "_params.push_back("
> ? ? ? ? ? ? << opNames[i] << ");";
> ? ? ? ? nl(Out);
> ? ? ? }
> ? ? ? Out << "InvokeInst *" << iName << " = InvokeInst::Create("
> - ? ? ? ? ?<< opNames[0] << ", "
> - ? ? ? ? ?<< opNames[1] << ", "
> - ? ? ? ? ?<< opNames[2] << ", "
> + ? ? ? ? ?<< opNames[Ops - 3] << ", "
> + ? ? ? ? ?<< opNames[Ops - 2] << ", "
> + ? ? ? ? ?<< opNames[Ops - 1] << ", "
> ? ? ? ? ? << iName << "_params.begin(), " << iName << "_params.end(), \"";
> ? ? ? printEscapedString(inv->getName());
> ? ? ? Out << "\", " << bbname << ");";
> @@ -1388,18 +1389,18 @@
> ? ? ? if (call->getNumOperands() > 2) {
> ? ? ? ? Out << "std::vector<Value*> " << iName << "_params;";
> ? ? ? ? nl(Out);
> - ? ? ? ?for (unsigned i = 1; i < call->getNumOperands(); ++i) {
> + ? ? ? ?for (unsigned i = 0; i < call->getNumOperands() - 1; ++i) {
> ? ? ? ? ? Out << iName << "_params.push_back(" << opNames[i] << ");";
> ? ? ? ? ? nl(Out);
> ? ? ? ? }
> ? ? ? ? Out << "CallInst* " << iName << " = CallInst::Create("
> - ? ? ? ? ? ?<< opNames[0] << ", " << iName << "_params.begin(), "
> + ? ? ? ? ? ?<< opNames[Ops - 1] << ", " << iName << "_params.begin(), "
> ? ? ? ? ? ? << iName << "_params.end(), \"";
> ? ? ? } else if (call->getNumOperands() == 2) {
> ? ? ? ? Out << "CallInst* " << iName << " = CallInst::Create("
> - ? ? ? ? ? ?<< opNames[0] << ", " << opNames[1] << ", \"";
> + ? ? ? ? ? ?<< opNames[Ops - 1] << ", " << opNames[0] << ", \"";
> ? ? ? } else {
> - ? ? ? ?Out << "CallInst* " << iName << " = CallInst::Create(" << opNames[0]
> + ? ? ? ?Out << "CallInst* " << iName << " = CallInst::Create(" << opNames[Ops - 1]
> ? ? ? ? ? ? << ", \"";
> ? ? ? }
> ? ? ? printEscapedString(call->getName());
> Index: llvm/lib/VMCore/Instructions.cpp
> ===================================================================
> --- llvm/lib/VMCore/Instructions.cpp ? ?(revision 101132)
> +++ llvm/lib/VMCore/Instructions.cpp ? ?(working copy)
> @@ -107,7 +107,7 @@
> ?User::op_iterator CallSite::getCallee() const {
> ? Instruction *II(getInstruction());
> ? return isCall()
> - ? ?? cast<CallInst>(II)->op_begin()
> + ? ?? cast<CallInst>(II)->op_end() - 1 // Skip Function
> ? ? : cast<InvokeInst>(II)->op_end() - 3; // Skip BB, BB, Function
> ?}
>
> @@ -308,8 +308,7 @@
>
> ?void CallInst::init(Value *Func, Value* const *Params, unsigned NumParams) {
> ? assert(NumOperands == NumParams+1 && "NumOperands not set up?");
> - ?Use *OL = OperandList;
> - ?OL[0] = Func;
> + ?Op<-1>() = Func;
>
> ? const FunctionType *FTy =
> ? ? cast<FunctionType>(cast<PointerType>(Func->getType())->getElementType());
> @@ -318,20 +317,21 @@
> ? assert((NumParams == FTy->getNumParams() ||
> ? ? ? ? ? (FTy->isVarArg() && NumParams > FTy->getNumParams())) &&
> ? ? ? ? ?"Calling a function with bad signature!");
> +
> + ?Use *OL = OperandList;
> ? for (unsigned i = 0; i != NumParams; ++i) {
> ? ? assert((i >= FTy->getNumParams() ||
> ? ? ? ? ? ? FTy->getParamType(i) == Params[i]->getType()) &&
> ? ? ? ? ? ?"Calling a function with a bad signature!");
> - ? ?OL[i+1] = Params[i];
> + ? ?OL[i] = Params[i];
> ? }
> ?}
>
> ?void CallInst::init(Value *Func, Value *Actual1, Value *Actual2) {
> ? assert(NumOperands == 3 && "NumOperands not set up?");
> - ?Use *OL = OperandList;
> - ?OL[0] = Func;
> - ?OL[1] = Actual1;
> - ?OL[2] = Actual2;
> + ?Op<-1>() = Func;
> + ?Op<0>() = Actual1;
> + ?Op<1>() = Actual2;
>
> ? const FunctionType *FTy =
> ? ? cast<FunctionType>(cast<PointerType>(Func->getType())->getElementType());
> @@ -350,9 +350,8 @@
>
> ?void CallInst::init(Value *Func, Value *Actual) {
> ? assert(NumOperands == 2 && "NumOperands not set up?");
> - ?Use *OL = OperandList;
> - ?OL[0] = Func;
> - ?OL[1] = Actual;
> + ?Op<-1>() = Func;
> + ?Op<0>() = Actual;
>
> ? const FunctionType *FTy =
> ? ? cast<FunctionType>(cast<PointerType>(Func->getType())->getElementType());
> @@ -368,8 +367,7 @@
>
> ?void CallInst::init(Value *Func) {
> ? assert(NumOperands == 1 && "NumOperands not set up?");
> - ?Use *OL = OperandList;
> - ?OL[0] = Func;
> + ?Op<-1>() = Func;
>
> ? const FunctionType *FTy =
> ? ? cast<FunctionType>(cast<PointerType>(Func->getType())->getElementType());
> Index: llvm/lib/VMCore/Verifier.cpp
> ===================================================================
> --- llvm/lib/VMCore/Verifier.cpp ? ? ? ?(revision 101132)
> +++ llvm/lib/VMCore/Verifier.cpp ? ? ? ?(working copy)
> @@ -1396,7 +1396,7 @@
> ? ? if (Function *F = dyn_cast<Function>(I.getOperand(i))) {
> ? ? ? // Check to make sure that the "address of" an intrinsic function is never
> ? ? ? // taken.
> - ? ? ?Assert1(!F->isIntrinsic() || (i == 0 && isa<CallInst>(I)),
> + ? ? ?Assert1(!F->isIntrinsic() || (i + 1 == e && isa<CallInst>(I)),
> ? ? ? ? ? ? ? "Cannot take the address of an intrinsic!", &I);
> ? ? ? Assert1(F->getParent() == Mod, "Referencing function in another module!",
> ? ? ? ? ? ? ? &I);
> @@ -1479,7 +1479,8 @@
> ? ? ? ? ? ? ? ? "Instruction does not dominate all uses!", Op, &I);
> ? ? ? }
> ? ? } else if (isa<InlineAsm>(I.getOperand(i))) {
> - ? ? ?Assert1((i == 0 && isa<CallInst>(I)) || (i + 3 == e && isa<InvokeInst>(I)),
> + ? ? ?Assert1((i + 1 == e && isa<CallInst>(I)) ||
> + ? ? ? ? ? ? ?(i + 3 == e && isa<InvokeInst>(I)),
> ? ? ? ? ? ? ? "Cannot take the address of an inline asm!", &I);
> ? ? }
> ? }
> @@ -1614,16 +1615,16 @@
> ? default:
> ? ? break;
> ? case Intrinsic::dbg_declare: { ?// llvm.dbg.declare
> - ? ?Assert1(CI.getOperand(1) && isa<MDNode>(CI.getOperand(1)),
> + ? ?Assert1(CI.getOperand(0) && isa<MDNode>(CI.getOperand(0)),
> ? ? ? ? ? ? ? ? "invalid llvm.dbg.declare intrinsic call 1", &CI);
> - ? ?MDNode *MD = cast<MDNode>(CI.getOperand(1));
> + ? ?MDNode *MD = cast<MDNode>(CI.getOperand(0));
> ? ? Assert1(MD->getNumOperands() == 1,
> ? ? ? ? ? ? ? ? "invalid llvm.dbg.declare intrinsic call 2", &CI);
> ? } break;
> ? case Intrinsic::memcpy:
> ? case Intrinsic::memmove:
> ? case Intrinsic::memset:
> - ? ?Assert1(isa<ConstantInt>(CI.getOperand(4)),
> + ? ?Assert1(isa<ConstantInt>(CI.getOperand(3)),
> ? ? ? ? ? ? "alignment argument of memory intrinsics must be a constant int",
> ? ? ? ? ? ? &CI);
> ? ? break;
> @@ -1632,10 +1633,10 @@
> ? case Intrinsic::gcread:
> ? ? if (ID == Intrinsic::gcroot) {
> ? ? ? AllocaInst *AI =
> - ? ? ? ?dyn_cast<AllocaInst>(CI.getOperand(1)->stripPointerCasts());
> + ? ? ? ?dyn_cast<AllocaInst>(CI.getOperand(0)->stripPointerCasts());
> ? ? ? Assert1(AI && AI->getType()->getElementType()->isPointerTy(),
> ? ? ? ? ? ? ? "llvm.gcroot parameter #1 must be a pointer alloca.", &CI);
> - ? ? ?Assert1(isa<Constant>(CI.getOperand(2)),
> + ? ? ?Assert1(isa<Constant>(CI.getOperand(1)),
> ? ? ? ? ? ? ? "llvm.gcroot parameter #2 must be a constant.", &CI);
> ? ? }
>
> @@ -1643,32 +1644,32 @@
> ? ? ? ? ? ? "Enclosing function does not use GC.", &CI);
> ? ? break;
> ? case Intrinsic::init_trampoline:
> - ? ?Assert1(isa<Function>(CI.getOperand(2)->stripPointerCasts()),
> + ? ?Assert1(isa<Function>(CI.getOperand(1)->stripPointerCasts()),
> ? ? ? ? ? ? "llvm.init_trampoline parameter #2 must resolve to a function.",
> ? ? ? ? ? ? &CI);
> ? ? break;
> ? case Intrinsic::prefetch:
> - ? ?Assert1(isa<ConstantInt>(CI.getOperand(2)) &&
> - ? ? ? ? ? ?isa<ConstantInt>(CI.getOperand(3)) &&
> - ? ? ? ? ? ?cast<ConstantInt>(CI.getOperand(2))->getZExtValue() < 2 &&
> - ? ? ? ? ? ?cast<ConstantInt>(CI.getOperand(3))->getZExtValue() < 4,
> + ? ?Assert1(isa<ConstantInt>(CI.getOperand(1)) &&
> + ? ? ? ? ? ?isa<ConstantInt>(CI.getOperand(2)) &&
> + ? ? ? ? ? ?cast<ConstantInt>(CI.getOperand(1))->getZExtValue() < 2 &&
> + ? ? ? ? ? ?cast<ConstantInt>(CI.getOperand(2))->getZExtValue() < 4,
> ? ? ? ? ? ? "invalid arguments to llvm.prefetch",
> ? ? ? ? ? ? &CI);
> ? ? break;
> ? case Intrinsic::stackprotector:
> - ? ?Assert1(isa<AllocaInst>(CI.getOperand(2)->stripPointerCasts()),
> + ? ?Assert1(isa<AllocaInst>(CI.getOperand(1)->stripPointerCasts()),
> ? ? ? ? ? ? "llvm.stackprotector parameter #2 must resolve to an alloca.",
> ? ? ? ? ? ? &CI);
> ? ? break;
> ? case Intrinsic::lifetime_start:
> ? case Intrinsic::lifetime_end:
> ? case Intrinsic::invariant_start:
> - ? ?Assert1(isa<ConstantInt>(CI.getOperand(1)),
> + ? ?Assert1(isa<ConstantInt>(CI.getOperand(0)),
> ? ? ? ? ? ? "size argument of memory use markers must be a constant integer",
> ? ? ? ? ? ? &CI);
> ? ? break;
> ? case Intrinsic::invariant_end:
> - ? ?Assert1(isa<ConstantInt>(CI.getOperand(2)),
> + ? ?Assert1(isa<ConstantInt>(CI.getOperand(1)),
> ? ? ? ? ? ? "llvm.invariant.end parameter #2 must be a constant integer", &CI);
> ? ? break;
> ? }
> Index: llvm/lib/VMCore/AsmWriter.cpp
> ===================================================================
> --- llvm/lib/VMCore/AsmWriter.cpp ? ? ? (revision 101132)
> +++ llvm/lib/VMCore/AsmWriter.cpp ? ? ? (working copy)
> @@ -1847,6 +1847,7 @@
> ? ? default: Out << " cc" << CI->getCallingConv(); break;
> ? ? }
>
> + ? ?Operand = CI->getCalledValue();
> ? ? const PointerType ? ?*PTy = cast<PointerType>(Operand->getType());
> ? ? const FunctionType ? *FTy = cast<FunctionType>(PTy->getElementType());
> ? ? const Type ? ? ? ? *RetTy = FTy->getReturnType();
> @@ -1870,10 +1871,10 @@
> ? ? ? writeOperand(Operand, true);
> ? ? }
> ? ? Out << '(';
> - ? ?for (unsigned op = 1, Eop = I.getNumOperands(); op < Eop; ++op) {
> - ? ? ?if (op > 1)
> + ? ?for (unsigned op = 0, Eop = CI->getNumOperands() - 1; op < Eop; ++op) {
> + ? ? ?if (op > 0)
> ? ? ? ? Out << ", ";
> - ? ? ?writeParamOperand(I.getOperand(op), PAL.getParamAttributes(op));
> + ? ? ?writeParamOperand(CI->getOperand(op), PAL.getParamAttributes(op + 1));
> ? ? }
> ? ? Out << ')';
> ? ? if (PAL.getFnAttributes() != Attribute::None)
> @@ -1917,10 +1918,10 @@
> ? ? ? writeOperand(Operand, true);
> ? ? }
> ? ? Out << '(';
> - ? ?for (unsigned op = 0, Eop = I.getNumOperands() - 3; op < Eop; ++op) {
> + ? ?for (unsigned op = 0, Eop = II->getNumOperands() - 3; op < Eop; ++op) {
> ? ? ? if (op)
> ? ? ? ? Out << ", ";
> - ? ? ?writeParamOperand(I.getOperand(op), PAL.getParamAttributes(op + 1));
> + ? ? ?writeParamOperand(II->getOperand(op), PAL.getParamAttributes(op + 1));
> ? ? }
>
> ? ? Out << ')';
> Index: llvm/lib/VMCore/AutoUpgrade.cpp
> ===================================================================
> --- llvm/lib/VMCore/AutoUpgrade.cpp ? ? (revision 101132)
> +++ llvm/lib/VMCore/AutoUpgrade.cpp ? ? (working copy)
> @@ -338,11 +338,11 @@
> ? ? if (isLoadH || isLoadL || isMovL || isMovSD || isShufPD ||
> ? ? ? ? isUnpckhPD || isUnpcklPD || isPunpckhQPD || isPunpcklQPD) {
> ? ? ? std::vector<Constant*> Idxs;
> - ? ? ?Value *Op0 = CI->getOperand(1);
> + ? ? ?Value *Op0 = CI->getOperand(0);
> ? ? ? ShuffleVectorInst *SI = NULL;
> ? ? ? if (isLoadH || isLoadL) {
> ? ? ? ? Value *Op1 = UndefValue::get(Op0->getType());
> - ? ? ? ?Value *Addr = new BitCastInst(CI->getOperand(2),
> + ? ? ? ?Value *Addr = new BitCastInst(CI->getOperand(1),
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? Type::getDoublePtrTy(C),
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? "upgraded.", CI);
> ? ? ? ? Value *Load = new LoadInst(Addr, "upgraded.", false, 8, CI);
> @@ -375,7 +375,7 @@
> ? ? ? ? SI = new ShuffleVectorInst(ZeroV, Op0, Mask, "upgraded.", CI);
> ? ? ? } else if (isMovSD ||
> ? ? ? ? ? ? ? ? ?isUnpckhPD || isUnpcklPD || isPunpckhQPD || isPunpcklQPD) {
> - ? ? ? ?Value *Op1 = CI->getOperand(2);
> + ? ? ? ?Value *Op1 = CI->getOperand(1);
> ? ? ? ? if (isMovSD) {
> ? ? ? ? ? Idxs.push_back(ConstantInt::get(Type::getInt32Ty(C), 2));
> ? ? ? ? ? Idxs.push_back(ConstantInt::get(Type::getInt32Ty(C), 1));
> @@ -389,8 +389,8 @@
> ? ? ? ? Value *Mask = ConstantVector::get(Idxs);
> ? ? ? ? SI = new ShuffleVectorInst(Op0, Op1, Mask, "upgraded.", CI);
> ? ? ? } else if (isShufPD) {
> - ? ? ? ?Value *Op1 = CI->getOperand(2);
> - ? ? ? ?unsigned MaskVal = cast<ConstantInt>(CI->getOperand(3))->getZExtValue();
> + ? ? ? ?Value *Op1 = CI->getOperand(1);
> + ? ? ? ?unsigned MaskVal = cast<ConstantInt>(CI->getOperand(2))->getZExtValue();
> ? ? ? ? Idxs.push_back(ConstantInt::get(Type::getInt32Ty(C), MaskVal & 1));
> ? ? ? ? Idxs.push_back(ConstantInt::get(Type::getInt32Ty(C),
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?((MaskVal >> 1) & 1)+2));
> @@ -410,8 +410,8 @@
> ? ? ? CI->eraseFromParent();
> ? ? } else if (F->getName() == "llvm.x86.sse41.pmulld") {
> ? ? ? // Upgrade this set of intrinsics into vector multiplies.
> - ? ? ?Instruction *Mul = BinaryOperator::CreateMul(CI->getOperand(1),
> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? CI->getOperand(2),
> + ? ? ?Instruction *Mul = BinaryOperator::CreateMul(CI->getOperand(0),
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? CI->getOperand(1),
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?CI->getName(),
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?CI);
> ? ? ? // Fix up all the uses with our new multiply.
> @@ -438,10 +438,10 @@
> ? case Intrinsic::x86_mmx_psrl_w: {
> ? ? Value *Operands[2];
>
> - ? ?Operands[0] = CI->getOperand(1);
> + ? ?Operands[0] = CI->getOperand(0);
>
> ? ? // Cast the second parameter to the correct type.
> - ? ?BitCastInst *BC = new BitCastInst(CI->getOperand(2),
> + ? ?BitCastInst *BC = new BitCastInst(CI->getOperand(1),
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? NewFn->getFunctionType()->getParamType(1),
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? "upgraded.", CI);
> ? ? Operands[1] = BC;
> @@ -465,9 +465,9 @@
> ? case Intrinsic::ctlz:
> ? case Intrinsic::ctpop:
> ? case Intrinsic::cttz: {
> - ? ?// ?Build a small vector of the 1..(N-1) operands, which are the
> + ? ?// ?Build a small vector of the 0..(N-1) operands, which are the
> ? ? // ?parameters.
> - ? ?SmallVector<Value*, 8> Operands(CI->op_begin()+1, CI->op_end());
> + ? ?SmallVector<Value*, 8> Operands(CI->op_begin(), CI->op_end() - 1);
>
> ? ? // ?Construct a new CallInst
> ? ? CallInst *NewCI = CallInst::Create(NewFn, Operands.begin(), Operands.end(),
> @@ -502,7 +502,7 @@
> ? case Intrinsic::eh_selector:
> ? case Intrinsic::eh_typeid_for: {
> ? ? // Only the return type changed.
> - ? ?SmallVector<Value*, 8> Operands(CI->op_begin() + 1, CI->op_end());
> + ? ?SmallVector<Value*, 8> Operands(CI->op_begin(), CI->op_end() - 1);
> ? ? CallInst *NewCI = CallInst::Create(NewFn, Operands.begin(), Operands.end(),
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?"upgraded." + CI->getName(), CI);
> ? ? NewCI->setTailCall(CI->isTailCall());
> @@ -525,8 +525,8 @@
> ? case Intrinsic::memset: {
> ? ? // Add isVolatile
> ? ? const llvm::Type *I1Ty = llvm::Type::getInt1Ty(CI->getContext());
> - ? ?Value *Operands[5] = { CI->getOperand(1), CI->getOperand(2),
> - ? ? ? ? ? ? ? ? ? ? ? ? ? CI->getOperand(3), CI->getOperand(4),
> + ? ?Value *Operands[5] = { CI->getOperand(0), CI->getOperand(1),
> + ? ? ? ? ? ? ? ? ? ? ? ? ? CI->getOperand(2), CI->getOperand(3),
> ? ? ? ? ? ? ? ? ? ? ? ? ? ?llvm::ConstantInt::get(I1Ty, 0) };
> ? ? CallInst *NewCI = CallInst::Create(NewFn, Operands, Operands+5,
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?CI->getName(), CI);
> @@ -608,7 +608,8 @@
> ? if (Function *Declare = M->getFunction("llvm.dbg.declare")) {
> ? ? if (!Declare->use_empty()) {
> ? ? ? DbgDeclareInst *DDI = cast<DbgDeclareInst>(Declare->use_back());
> - ? ? ?if (!isa<MDNode>(DDI->getOperand(1)) ||!isa<MDNode>(DDI->getOperand(2))) {
> + ? ? ?if (!isa<MDNode>(DDI->getOperand(0)) ||
> + ? ? ? ? ?!isa<MDNode>(DDI->getOperand(1))) {
> ? ? ? ? while (!Declare->use_empty()) {
> ? ? ? ? ? CallInst *CI = cast<CallInst>(Declare->use_back());
> ? ? ? ? ? CI->eraseFromParent();
> Index: llvm/lib/VMCore/IntrinsicInst.cpp
> ===================================================================
> --- llvm/lib/VMCore/IntrinsicInst.cpp ? (revision 101132)
> +++ llvm/lib/VMCore/IntrinsicInst.cpp ? (working copy)
> @@ -54,7 +54,7 @@
> ?///
>
> ?Value *DbgDeclareInst::getAddress() const {
> - ?if (MDNode* MD = cast_or_null<MDNode>(getOperand(1)))
> + ?if (MDNode* MD = cast_or_null<MDNode>(getOperand(0)))
> ? ? return MD->getOperand(0);
> ? else
> ? ? return NULL;
> @@ -65,9 +65,9 @@
> ?///
>
> ?const Value *DbgValueInst::getValue() const {
> - ?return cast<MDNode>(getOperand(1))->getOperand(0);
> + ?return cast<MDNode>(getOperand(0))->getOperand(0);
> ?}
>
> ?Value *DbgValueInst::getValue() {
> - ?return cast<MDNode>(getOperand(1))->getOperand(0);
> + ?return cast<MDNode>(getOperand(0))->getOperand(0);
> ?}
> Index: llvm/lib/Transforms/Utils/BuildLibCalls.cpp
> ===================================================================
> --- llvm/lib/Transforms/Utils/BuildLibCalls.cpp (revision 101132)
> +++ llvm/lib/Transforms/Utils/BuildLibCalls.cpp (working copy)
> @@ -395,11 +395,11 @@
> ? ? ? ? FT->getParamType(2) != TD->getIntPtrType(Context) ||
> ? ? ? ? FT->getParamType(3) != TD->getIntPtrType(Context))
> ? ? ? return false;
> -
> - ? ?if (isFoldable(4, 3, false)) {
> - ? ? ?EmitMemCpy(CI->getOperand(1), CI->getOperand(2), CI->getOperand(3),
> +
> + ? ?if (isFoldable(3, 2, false)) {
> + ? ? ?EmitMemCpy(CI->getOperand(0), CI->getOperand(1), CI->getOperand(2),
> ? ? ? ? ? ? ? ? ?1, false, B, TD);
> - ? ? ?replaceCall(CI->getOperand(1));
> + ? ? ?replaceCall(CI->getOperand(0));
> ? ? ? return true;
> ? ? }
> ? ? return false;
> @@ -418,11 +418,11 @@
> ? ? ? ? FT->getParamType(2) != TD->getIntPtrType(Context) ||
> ? ? ? ? FT->getParamType(3) != TD->getIntPtrType(Context))
> ? ? ? return false;
> -
> - ? ?if (isFoldable(4, 3, false)) {
> - ? ? ?EmitMemMove(CI->getOperand(1), CI->getOperand(2), CI->getOperand(3),
> +
> + ? ?if (isFoldable(3, 2, false)) {
> + ? ? ?EmitMemMove(CI->getOperand(0), CI->getOperand(1), CI->getOperand(2),
> ? ? ? ? ? ? ? ? ? 1, false, B, TD);
> - ? ? ?replaceCall(CI->getOperand(1));
> + ? ? ?replaceCall(CI->getOperand(0));
> ? ? ? return true;
> ? ? }
> ? ? return false;
> @@ -436,12 +436,12 @@
> ? ? ? ? FT->getParamType(2) != TD->getIntPtrType(Context) ||
> ? ? ? ? FT->getParamType(3) != TD->getIntPtrType(Context))
> ? ? ? return false;
> -
> - ? ?if (isFoldable(4, 3, false)) {
> - ? ? ?Value *Val = B.CreateIntCast(CI->getOperand(2), B.getInt8Ty(),
> +
> + ? ?if (isFoldable(3, 2, false)) {
> + ? ? ?Value *Val = B.CreateIntCast(CI->getOperand(1), B.getInt8Ty(),
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?false);
> - ? ? ?EmitMemSet(CI->getOperand(1), Val, ?CI->getOperand(3), false, B, TD);
> - ? ? ?replaceCall(CI->getOperand(1));
> + ? ? ?EmitMemSet(CI->getOperand(0), Val, ?CI->getOperand(2), false, B, TD);
> + ? ? ?replaceCall(CI->getOperand(0));
> ? ? ? return true;
> ? ? }
> ? ? return false;
> @@ -462,8 +462,8 @@
> ? ? // st[rp]cpy_chk call which may fail at runtime if the size is too long.
> ? ? // TODO: It might be nice to get a maximum length out of the possible
> ? ? // string lengths for varying.
> - ? ?if (isFoldable(3, 2, true)) {
> - ? ? ?Value *Ret = EmitStrCpy(CI->getOperand(1), CI->getOperand(2), B, TD,
> + ? ?if (isFoldable(2, 1, true)) {
> + ? ? ?Value *Ret = EmitStrCpy(CI->getOperand(0), CI->getOperand(1), B, TD,
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? Name.substr(2, 6));
> ? ? ? replaceCall(Ret);
> ? ? ? return true;
> @@ -478,10 +478,10 @@
> ? ? ? ? FT->getParamType(0) != Type::getInt8PtrTy(Context) ||
> ? ? ? ? !FT->getParamType(2)->isIntegerTy() ||
> ? ? ? ? FT->getParamType(3) != TD->getIntPtrType(Context))
> -
> - ? ?if (isFoldable(4, 3, false)) {
> - ? ? ?Value *Ret = EmitStrNCpy(CI->getOperand(1), CI->getOperand(2),
> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? CI->getOperand(3), B, TD, Name.substr(2, 7));
> +
> + ? ?if (isFoldable(3, 2, false)) {
> + ? ? ?Value *Ret = EmitStrNCpy(CI->getOperand(0), CI->getOperand(1),
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? CI->getOperand(2), B, TD, Name.substr(2, 7));
> ? ? ? replaceCall(Ret);
> ? ? ? return true;
> ? ? }
> Index: llvm/lib/Transforms/Utils/AddrModeMatcher.cpp
> ===================================================================
> --- llvm/lib/Transforms/Utils/AddrModeMatcher.cpp ? ? ? (revision 101132)
> +++ llvm/lib/Transforms/Utils/AddrModeMatcher.cpp ? ? ? (working copy)
> @@ -382,7 +382,7 @@
> ? std::vector<InlineAsm::ConstraintInfo>
> ? Constraints = IA->ParseConstraints();
>
> - ?unsigned ArgNo = 1; ? // ArgNo - The operand of the CallInst.
> + ?unsigned ArgNo = 0; ? // ArgNo - The operand of the CallInst.
> ? for (unsigned i = 0, e = Constraints.size(); i != e; ++i) {
> ? ? TargetLowering::AsmOperandInfo OpInfo(Constraints[i]);
>
> @@ -450,7 +450,7 @@
>
> ? ? if (CallInst *CI = dyn_cast<CallInst>(U)) {
> ? ? ? InlineAsm *IA = dyn_cast<InlineAsm>(CI->getCalledValue());
> - ? ? ?if (IA == 0) return true;
> + ? ? ?if (!IA) return true;
>
> ? ? ? // If this is a memory operand, we're cool, otherwise bail out.
> ? ? ? if (!IsOperandAMemoryOperand(CI, IA, I, TLI))
> Index: llvm/lib/Transforms/Utils/InlineFunction.cpp
> ===================================================================
> --- llvm/lib/Transforms/Utils/InlineFunction.cpp ? ? ? ?(revision 101132)
> +++ llvm/lib/Transforms/Utils/InlineFunction.cpp ? ? ? ?(working copy)
> @@ -66,7 +66,7 @@
>
> ? ? // Next, create the new invoke instruction, inserting it at the end
> ? ? // of the old basic block.
> - ? ?SmallVector<Value*, 8> InvokeArgs(CI->op_begin()+1, CI->op_end());
> + ? ?SmallVector<Value*, 8> InvokeArgs(CI->op_begin(), CI->op_end() - 1);
> ? ? InvokeInst *II =
> ? ? ? InvokeInst::Create(CI->getCalledValue(), Split, InvokeDest,
> ? ? ? ? ? ? ? ? ? ? ? ? ?InvokeArgs.begin(), InvokeArgs.end(),
> Index: llvm/lib/Transforms/Instrumentation/ProfilingUtils.cpp
> ===================================================================
> --- llvm/lib/Transforms/Instrumentation/ProfilingUtils.cpp ? ? ?(revision 101132)
> +++ llvm/lib/Transforms/Instrumentation/ProfilingUtils.cpp ? ? ?(working copy)
> @@ -73,10 +73,10 @@
> ? ? if (AI->getType() != ArgVTy) {
> ? ? ? Instruction::CastOps opcode = CastInst::getCastOpcode(AI, false, ArgVTy,
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? false);
> - ? ? ?InitCall->setOperand(2,
> + ? ? ?InitCall->setOperand(1,
> ? ? ? ? ? CastInst::Create(opcode, AI, ArgVTy, "argv.cast", InitCall));
> ? ? } else {
> - ? ? ?InitCall->setOperand(2, AI);
> + ? ? ?InitCall->setOperand(1, AI);
> ? ? }
> ? ? /* FALL THROUGH */
>
> @@ -93,12 +93,12 @@
> ? ? ? }
> ? ? ? opcode = CastInst::getCastOpcode(AI, true,
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?Type::getInt32Ty(Context), true);
> - ? ? ?InitCall->setOperand(1,
> + ? ? ?InitCall->setOperand(0,
> ? ? ? ? ? CastInst::Create(opcode, AI, Type::getInt32Ty(Context),
> ? ? ? ? ? ? ? ? ? ? ? ? ? ?"argc.cast", InitCall));
> ? ? } else {
> ? ? ? AI->replaceAllUsesWith(InitCall);
> - ? ? ?InitCall->setOperand(1, AI);
> + ? ? ?InitCall->setOperand(0, AI);
> ? ? }
>
> ? case 0: break;
> Index: llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
> ===================================================================
> --- llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp ? ? (revision 101132)
> +++ llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp ? ? (working copy)
> @@ -250,7 +250,7 @@
> ? ? // If we are passing this argument into call as the corresponding
> ? ? // argument operand, then the argument is dynamically constant.
> ? ? // Otherwise, we cannot transform this function safely.
> - ? ?if (CI->getOperand(ArgNo+1) == Arg)
> + ? ?if (CI->getOperand(ArgNo) == Arg)
> ? ? ? return true;
> ? }
>
> @@ -442,7 +442,7 @@
> ? // required PHI nodes, add entries into the PHI node for the actual
> ? // parameters passed into the tail-recursive call.
> ? for (unsigned i = 0, e = CI->getNumOperands()-1; i != e; ++i)
> - ? ?ArgumentPHIs[i]->addIncoming(CI->getOperand(i+1), BB);
> + ? ?ArgumentPHIs[i]->addIncoming(CI->getOperand(i), BB);
>
> ? // If we are introducing an accumulator variable to eliminate the recursion,
> ? // do so now. ?Note that we _know_ that no subsequent tail recursion
> Index: llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp
> ===================================================================
> --- llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp (revision 101132)
> +++ llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp (working copy)
> @@ -254,7 +254,7 @@
> ? ? if (Instruction *TheCopy = isOnlyCopiedFromConstantGlobal(AI)) {
> ? ? ? DEBUG(dbgs() << "Found alloca equal to global: " << *AI << '\n');
> ? ? ? DEBUG(dbgs() << " ?memcpy = " << *TheCopy << '\n');
> - ? ? ?Constant *TheSrc = cast<Constant>(TheCopy->getOperand(2));
> + ? ? ?Constant *TheSrc = cast<Constant>(TheCopy->getOperand(1));
> ? ? ? AI->replaceAllUsesWith(ConstantExpr::getBitCast(TheSrc, AI->getType()));
> ? ? ? TheCopy->eraseFromParent(); ?// Don't mutate the global.
> ? ? ? AI->eraseFromParent();
> @@ -404,11 +404,11 @@
> ? ? ? isSafeGEP(GEPI, AI, GEPOffset, Info);
> ? ? ? if (!Info.isUnsafe)
> ? ? ? ? isSafeForScalarRepl(GEPI, AI, GEPOffset, Info);
> - ? ?} else if (MemIntrinsic *MI = dyn_cast<MemIntrinsic>(UI)) {
> + ? ?} else if (MemIntrinsic *MI = dyn_cast<MemIntrinsic>(User)) {
> ? ? ? ConstantInt *Length = dyn_cast<ConstantInt>(MI->getLength());
> ? ? ? if (Length)
> ? ? ? ? isSafeMemAccess(AI, Offset, Length->getZExtValue(), 0,
> - ? ? ? ? ? ? ? ? ? ? ? ?UI.getOperandNo() == 1, Info);
> + ? ? ? ? ? ? ? ? ? ? ? ?UI.getOperandNo() == 0, Info);
> ? ? ? else
> ? ? ? ? MarkUnsafe(Info);
> ? ? } else if (LoadInst *LI = dyn_cast<LoadInst>(User)) {
> @@ -756,7 +756,7 @@
> ? }
>
> ? // Process each element of the aggregate.
> - ?Value *TheFn = MI->getOperand(0);
> + ?Value *TheFn = MI->getCalledValue();
> ? const Type *BytePtrTy = MI->getRawDest()->getType();
> ? bool SROADest = MI->getRawDest() == Inst;
>
> @@ -814,7 +814,7 @@
> ? ? ? // If the stored element is zero (common case), just store a null
> ? ? ? // constant.
> ? ? ? Constant *StoreVal;
> - ? ? ?if (ConstantInt *CI = dyn_cast<ConstantInt>(MI->getOperand(2))) {
> + ? ? ?if (ConstantInt *CI = dyn_cast<ConstantInt>(MI->getOperand(1))) {
> ? ? ? ? if (CI->isZero()) {
> ? ? ? ? ? StoreVal = Constant::getNullValue(EltTy); ?// 0.0, null, 0, <0,0>
> ? ? ? ? } else {
> @@ -877,7 +877,7 @@
> ? ? ? Value *Ops[] = {
> ? ? ? ? SROADest ? EltPtr : OtherElt, ?// Dest ptr
> ? ? ? ? SROADest ? OtherElt : EltPtr, ?// Src ptr
> - ? ? ? ?ConstantInt::get(MI->getOperand(3)->getType(), EltSize), // Size
> + ? ? ? ?ConstantInt::get(MI->getOperand(2)->getType(), EltSize), // Size
> ? ? ? ? // Align
> ? ? ? ? ConstantInt::get(Type::getInt32Ty(MI->getContext()), OtherEltAlign),
> ? ? ? ? MI->getVolatileCst()
> @@ -892,8 +892,8 @@
> ? ? } else {
> ? ? ? assert(isa<MemSetInst>(MI));
> ? ? ? Value *Ops[] = {
> - ? ? ? ?EltPtr, MI->getOperand(2), ?// Dest, Value,
> - ? ? ? ?ConstantInt::get(MI->getOperand(3)->getType(), EltSize), // Size
> + ? ? ? ?EltPtr, MI->getOperand(1), ?// Dest, Value,
> + ? ? ? ?ConstantInt::get(MI->getOperand(2)->getType(), EltSize), // Size
> ? ? ? ? Zero, ?// Align
> ? ? ? ? ConstantInt::get(Type::getInt1Ty(MI->getContext()), 0) // isVolatile
> ? ? ? };
> @@ -1737,12 +1737,12 @@
> ? ? if (isOffset) return false;
>
> ? ? // If the memintrinsic isn't using the alloca as the dest, reject it.
> - ? ?if (UI.getOperandNo() != 1) return false;
> + ? ?if (UI.getOperandNo() != 0) return false;
>
> ? ? MemIntrinsic *MI = cast<MemIntrinsic>(U);
>
> ? ? // If the source of the memcpy/move is not a constant global, reject it.
> - ? ?if (!PointsToConstantGlobal(MI->getOperand(2)))
> + ? ?if (!PointsToConstantGlobal(MI->getOperand(1)))
> ? ? ? return false;
>
> ? ? // Otherwise, the transform is safe. ?Remember the copy instruction.
> Index: llvm/lib/Transforms/Scalar/GVN.cpp
> ===================================================================
> --- llvm/lib/Transforms/Scalar/GVN.cpp ?(revision 101132)
> +++ llvm/lib/Transforms/Scalar/GVN.cpp ?(working copy)
> @@ -271,7 +271,7 @@
> ? e.function = C->getCalledFunction();
> ? e.opcode = Expression::CALL;
>
> - ?for (CallInst::op_iterator I = C->op_begin()+1, E = C->op_end();
> + ?for (CallInst::op_iterator I = C->op_begin(), E = C->op_end() - 1;
> ? ? ? ?I != E; ++I)
> ? ? e.varargs.push_back(lookup_or_add(*I));
>
> @@ -452,7 +452,7 @@
> ? ? ? ? return nextValueNumber++;
> ? ? ? }
>
> - ? ? ?for (unsigned i = 1; i < C->getNumOperands(); ++i) {
> + ? ? ?for (unsigned i = 0, e = C->getNumOperands() - 1; i < e; ++i) {
> ? ? ? ? uint32_t c_vn = lookup_or_add(C->getOperand(i));
> ? ? ? ? uint32_t cd_vn = lookup_or_add(local_cdep->getOperand(i));
> ? ? ? ? if (c_vn != cd_vn) {
> @@ -508,7 +508,7 @@
> ? ? ? valueNumbering[C] = nextValueNumber;
> ? ? ? return nextValueNumber++;
> ? ? }
> - ? ?for (unsigned i = 1; i < C->getNumOperands(); ++i) {
> + ? ?for (unsigned i = 0, e = C->getNumOperands() - 1; i < e; ++i) {
> ? ? ? uint32_t c_vn = lookup_or_add(C->getOperand(i));
> ? ? ? uint32_t cd_vn = lookup_or_add(cdep->getOperand(i));
> ? ? ? if (c_vn != cd_vn) {
> Index: llvm/lib/Transforms/Scalar/SimplifyLibCalls.cpp
> ===================================================================
> --- llvm/lib/Transforms/Scalar/SimplifyLibCalls.cpp ? ? (revision 101132)
> +++ llvm/lib/Transforms/Scalar/SimplifyLibCalls.cpp ? ? (working copy)
> @@ -110,8 +110,8 @@
> ? ? ? return 0;
>
> ? ? // Extract some information from the instruction
> - ? ?Value *Dst = CI->getOperand(1);
> - ? ?Value *Src = CI->getOperand(2);
> + ? ?Value *Dst = CI->getOperand(0);
> + ? ?Value *Src = CI->getOperand(1);
>
> ? ? // See if we can get the length of the input string.
> ? ? uint64_t Len = GetStringLength(Src);
> @@ -162,12 +162,12 @@
> ? ? ? return 0;
>
> ? ? // Extract some information from the instruction
> - ? ?Value *Dst = CI->getOperand(1);
> - ? ?Value *Src = CI->getOperand(2);
> + ? ?Value *Dst = CI->getOperand(0);
> + ? ?Value *Src = CI->getOperand(1);
> ? ? uint64_t Len;
>
> ? ? // We don't do anything if length is not constant
> - ? ?if (ConstantInt *LengthArg = dyn_cast<ConstantInt>(CI->getOperand(3)))
> + ? ?if (ConstantInt *LengthArg = dyn_cast<ConstantInt>(CI->getOperand(2)))
> ? ? ? Len = LengthArg->getZExtValue();
> ? ? else
> ? ? ? return 0;
> @@ -207,11 +207,11 @@
> ? ? ? ? FT->getParamType(0) != FT->getReturnType())
> ? ? ? return 0;
>
> - ? ?Value *SrcStr = CI->getOperand(1);
> + ? ?Value *SrcStr = CI->getOperand(0);
>
> ? ? // If the second operand is non-constant, see if we can compute the length
> ? ? // of the input string and turn this into memchr.
> - ? ?ConstantInt *CharC = dyn_cast<ConstantInt>(CI->getOperand(2));
> + ? ?ConstantInt *CharC = dyn_cast<ConstantInt>(CI->getOperand(1));
> ? ? if (CharC == 0) {
> ? ? ? // These optimizations require TargetData.
> ? ? ? if (!TD) return 0;
> @@ -220,7 +220,7 @@
> ? ? ? if (Len == 0 || !FT->getParamType(1)->isIntegerTy(32))// memchr needs i32.
> ? ? ? ? return 0;
>
> - ? ? ?return EmitMemChr(SrcStr, CI->getOperand(2), // include nul.
> + ? ? ?return EmitMemChr(SrcStr, CI->getOperand(1), // include nul.
> ? ? ? ? ? ? ? ? ? ? ? ? ConstantInt::get(TD->getIntPtrType(*Context), Len),
> ? ? ? ? ? ? ? ? ? ? ? ? B, TD);
> ? ? }
> @@ -265,7 +265,7 @@
> ? ? ? ? FT->getParamType(0) != Type::getInt8PtrTy(*Context))
> ? ? ? return 0;
>
> - ? ?Value *Str1P = CI->getOperand(1), *Str2P = CI->getOperand(2);
> + ? ?Value *Str1P = CI->getOperand(0), *Str2P = CI->getOperand(1);
> ? ? if (Str1P == Str2P) ? ? ?// strcmp(x,x) ?-> 0
> ? ? ? return ConstantInt::get(CI->getType(), 0);
>
> @@ -314,13 +314,13 @@
> ? ? ? ? !FT->getParamType(2)->isIntegerTy())
> ? ? ? return 0;
>
> - ? ?Value *Str1P = CI->getOperand(1), *Str2P = CI->getOperand(2);
> + ? ?Value *Str1P = CI->getOperand(0), *Str2P = CI->getOperand(1);
> ? ? if (Str1P == Str2P) ? ? ?// strncmp(x,x,n) ?-> 0
> ? ? ? return ConstantInt::get(CI->getType(), 0);
>
> ? ? // Get the length argument if it is constant.
> ? ? uint64_t Length;
> - ? ?if (ConstantInt *LengthArg = dyn_cast<ConstantInt>(CI->getOperand(3)))
> + ? ?if (ConstantInt *LengthArg = dyn_cast<ConstantInt>(CI->getOperand(2)))
> ? ? ? Length = LengthArg->getZExtValue();
> ? ? else
> ? ? ? return 0;
> @@ -365,7 +365,7 @@
> ? ? ? ? FT->getParamType(0) != Type::getInt8PtrTy(*Context))
> ? ? ? return 0;
>
> - ? ?Value *Dst = CI->getOperand(1), *Src = CI->getOperand(2);
> + ? ?Value *Dst = CI->getOperand(0), *Src = CI->getOperand(1);
> ? ? if (Dst == Src) ? ? ?// strcpy(x,x) ?-> x
> ? ? ? return Src;
>
> @@ -381,7 +381,7 @@
> ? ? if (OptChkCall)
> ? ? ? EmitMemCpyChk(Dst, Src,
> ? ? ? ? ? ? ? ? ? ? ConstantInt::get(TD->getIntPtrType(*Context), Len),
> - ? ? ? ? ? ? ? ? ? ?CI->getOperand(3), B, TD);
> + ? ? ? ? ? ? ? ? ? ?CI->getOperand(2), B, TD);
> ? ? else
> ? ? ? EmitMemCpy(Dst, Src,
> ? ? ? ? ? ? ? ? ?ConstantInt::get(TD->getIntPtrType(*Context), Len),
> @@ -402,9 +402,9 @@
> ? ? ? ? !FT->getParamType(2)->isIntegerTy())
> ? ? ? return 0;
>
> - ? ?Value *Dst = CI->getOperand(1);
> - ? ?Value *Src = CI->getOperand(2);
> - ? ?Value *LenOp = CI->getOperand(3);
> + ? ?Value *Dst = CI->getOperand(0);
> + ? ?Value *Src = CI->getOperand(1);
> + ? ?Value *LenOp = CI->getOperand(2);
>
> ? ? // See if we can get the length of the input string.
> ? ? uint64_t SrcLen = GetStringLength(Src);
> @@ -452,7 +452,7 @@
> ? ? ? ? !FT->getReturnType()->isIntegerTy())
> ? ? ? return 0;
>
> - ? ?Value *Src = CI->getOperand(1);
> + ? ?Value *Src = CI->getOperand(0);
>
> ? ? // Constant folding: strlen("xyz") -> 3
> ? ? if (uint64_t Len = GetStringLength(Src))
> @@ -477,7 +477,7 @@
> ? ? ? ? !FT->getParamType(1)->isPointerTy())
> ? ? ? return 0;
>
> - ? ?Value *EndPtr = CI->getOperand(2);
> + ? ?Value *EndPtr = CI->getOperand(1);
> ? ? if (isa<ConstantPointerNull>(EndPtr)) {
> ? ? ? CI->setOnlyReadsMemory();
> ? ? ? CI->addAttribute(1, Attribute::NoCapture);
> @@ -500,17 +500,17 @@
> ? ? ? return 0;
>
> ? ? // fold strstr(x, x) -> x.
> - ? ?if (CI->getOperand(1) == CI->getOperand(2))
> - ? ? ?return B.CreateBitCast(CI->getOperand(1), CI->getType());
> + ? ?if (CI->getOperand(0) == CI->getOperand(1))
> + ? ? ?return B.CreateBitCast(CI->getOperand(0), CI->getType());
>
> ? ? // See if either input string is a constant string.
> ? ? std::string SearchStr, ToFindStr;
> - ? ?bool HasStr1 = GetConstantStringInfo(CI->getOperand(1), SearchStr);
> - ? ?bool HasStr2 = GetConstantStringInfo(CI->getOperand(2), ToFindStr);
> + ? ?bool HasStr1 = GetConstantStringInfo(CI->getOperand(0), SearchStr);
> + ? ?bool HasStr2 = GetConstantStringInfo(CI->getOperand(1), ToFindStr);
>
> ? ? // fold strstr(x, "") -> x.
> ? ? if (HasStr2 && ToFindStr.empty())
> - ? ? ?return B.CreateBitCast(CI->getOperand(1), CI->getType());
> + ? ? ?return B.CreateBitCast(CI->getOperand(0), CI->getType());
>
> ? ? // If both strings are known, constant fold it.
> ? ? if (HasStr1 && HasStr2) {
> @@ -520,14 +520,14 @@
> ? ? ? ? return Constant::getNullValue(CI->getType());
>
> ? ? ? // strstr("abcd", "bc") -> gep((char*)"abcd", 1)
> - ? ? ?Value *Result = CastToCStr(CI->getOperand(1), B);
> + ? ? ?Value *Result = CastToCStr(CI->getOperand(0), B);
> ? ? ? Result = B.CreateConstInBoundsGEP1_64(Result, Offset, "strstr");
> ? ? ? return B.CreateBitCast(Result, CI->getType());
> ? ? }
>
> ? ? // fold strstr(x, "y") -> strchr(x, 'y').
> ? ? if (HasStr2 && ToFindStr.size() == 1)
> - ? ? ?return B.CreateBitCast(EmitStrChr(CI->getOperand(1), ToFindStr[0], B, TD),
> + ? ? ?return B.CreateBitCast(EmitStrChr(CI->getOperand(0), ToFindStr[0], B, TD),
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?CI->getType());
> ? ? return 0;
> ? }
> @@ -545,13 +545,13 @@
> ? ? ? ? !FT->getReturnType()->isIntegerTy(32))
> ? ? ? return 0;
>
> - ? ?Value *LHS = CI->getOperand(1), *RHS = CI->getOperand(2);
> + ? ?Value *LHS = CI->getOperand(0), *RHS = CI->getOperand(1);
>
> ? ? if (LHS == RHS) ?// memcmp(s,s,x) -> 0
> ? ? ? return Constant::getNullValue(CI->getType());
>
> ? ? // Make sure we have a constant length.
> - ? ?ConstantInt *LenC = dyn_cast<ConstantInt>(CI->getOperand(3));
> + ? ?ConstantInt *LenC = dyn_cast<ConstantInt>(CI->getOperand(2));
> ? ? if (!LenC) return 0;
> ? ? uint64_t Len = LenC->getZExtValue();
>
> @@ -595,9 +595,9 @@
> ? ? ? return 0;
>
> ? ? // memcpy(x, y, n) -> llvm.memcpy(x, y, n, 1)
> - ? ?EmitMemCpy(CI->getOperand(1), CI->getOperand(2),
> - ? ? ? ? ? ? ? CI->getOperand(3), 1, false, B, TD);
> - ? ?return CI->getOperand(1);
> + ? ?EmitMemCpy(CI->getOperand(0), CI->getOperand(1),
> + ? ? ? ? ? ? ? CI->getOperand(2), 1, false, B, TD);
> + ? ?return CI->getOperand(0);
> ? }
> ?};
>
> @@ -617,9 +617,9 @@
> ? ? ? return 0;
>
> ? ? // memmove(x, y, n) -> llvm.memmove(x, y, n, 1)
> - ? ?EmitMemMove(CI->getOperand(1), CI->getOperand(2),
> - ? ? ? ? ? ? ? ?CI->getOperand(3), 1, false, B, TD);
> - ? ?return CI->getOperand(1);
> + ? ?EmitMemMove(CI->getOperand(0), CI->getOperand(1),
> + ? ? ? ? ? ? ? ?CI->getOperand(2), 1, false, B, TD);
> + ? ?return CI->getOperand(0);
> ? }
> ?};
>
> @@ -639,10 +639,10 @@
> ? ? ? return 0;
>
> ? ? // memset(p, v, n) -> llvm.memset(p, v, n, 1)
> - ? ?Value *Val = B.CreateIntCast(CI->getOperand(2), Type::getInt8Ty(*Context),
> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? false);
> - ? ?EmitMemSet(CI->getOperand(1), Val, ?CI->getOperand(3), false, B, TD);
> - ? ?return CI->getOperand(1);
> + ? ?Value *Val = B.CreateIntCast(CI->getOperand(1), Type::getInt8Ty(*Context),
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?false);
> + ? ?EmitMemSet(CI->getOperand(0), Val, ?CI->getOperand(2), false, B, TD);
> + ? ?return CI->getOperand(0);
> ? }
> ?};
>
> @@ -663,7 +663,7 @@
> ? ? ? ? !FT->getParamType(0)->isFloatingPointTy())
> ? ? ? return 0;
>
> - ? ?Value *Op1 = CI->getOperand(1), *Op2 = CI->getOperand(2);
> + ? ?Value *Op1 = CI->getOperand(0), *Op2 = CI->getOperand(1);
> ? ? if (ConstantFP *Op1C = dyn_cast<ConstantFP>(Op1)) {
> ? ? ? if (Op1C->isExactlyValue(1.0)) ?// pow(1.0, x) -> 1.0
> ? ? ? ? return Op1C;
> @@ -717,7 +717,7 @@
> ? ? ? ? !FT->getParamType(0)->isFloatingPointTy())
> ? ? ? return 0;
>
> - ? ?Value *Op = CI->getOperand(1);
> + ? ?Value *Op = CI->getOperand(0);
> ? ? // Turn exp2(sitofp(x)) -> ldexp(1.0, sext(x)) ?if sizeof(x) <= 32
> ? ? // Turn exp2(uitofp(x)) -> ldexp(1.0, zext(x)) ?if sizeof(x) < 32
> ? ? Value *LdExpArg = 0;
> @@ -769,7 +769,7 @@
> ? ? ? return 0;
>
> ? ? // If this is something like 'floor((double)floatval)', convert to floorf.
> - ? ?FPExtInst *Cast = dyn_cast<FPExtInst>(CI->getOperand(1));
> + ? ?FPExtInst *Cast = dyn_cast<FPExtInst>(CI->getOperand(0));
> ? ? if (Cast == 0 || !Cast->getOperand(0)->getType()->isFloatTy())
> ? ? ? return 0;
>
> @@ -798,7 +798,7 @@
> ? ? ? ? !FT->getParamType(0)->isIntegerTy())
> ? ? ? return 0;
>
> - ? ?Value *Op = CI->getOperand(1);
> + ? ?Value *Op = CI->getOperand(0);
>
> ? ? // Constant fold.
> ? ? if (ConstantInt *CI = dyn_cast<ConstantInt>(Op)) {
> @@ -834,7 +834,7 @@
> ? ? ? return 0;
>
> ? ? // isdigit(c) -> (c-'0') <u 10
> - ? ?Value *Op = CI->getOperand(1);
> + ? ?Value *Op = CI->getOperand(0);
> ? ? Op = B.CreateSub(Op, ConstantInt::get(Type::getInt32Ty(*Context), '0'),
> ? ? ? ? ? ? ? ? ? ? ?"isdigittmp");
> ? ? Op = B.CreateICmpULT(Op, ConstantInt::get(Type::getInt32Ty(*Context), 10),
> @@ -855,7 +855,7 @@
> ? ? ? return 0;
>
> ? ? // isascii(c) -> c <u 128
> - ? ?Value *Op = CI->getOperand(1);
> + ? ?Value *Op = CI->getOperand(0);
> ? ? Op = B.CreateICmpULT(Op, ConstantInt::get(Type::getInt32Ty(*Context), 128),
> ? ? ? ? ? ? ? ? ? ? ? ? ?"isascii");
> ? ? return B.CreateZExt(Op, CI->getType());
> @@ -874,7 +874,7 @@
> ? ? ? return 0;
>
> ? ? // abs(x) -> x >s -1 ? x : -x
> - ? ?Value *Op = CI->getOperand(1);
> + ? ?Value *Op = CI->getOperand(0);
> ? ? Value *Pos = B.CreateICmpSGT(Op,
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?Constant::getAllOnesValue(Op->getType()),
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?"ispos");
> @@ -896,7 +896,7 @@
> ? ? ? return 0;
>
> ? ? // isascii(c) -> c & 0x7f
> - ? ?return B.CreateAnd(CI->getOperand(1),
> + ? ?return B.CreateAnd(CI->getOperand(0),
> ? ? ? ? ? ? ? ? ? ? ? ?ConstantInt::get(CI->getType(),0x7F));
> ? }
> ?};
> @@ -919,7 +919,7 @@
>
> ? ? // Check for a fixed format string.
> ? ? std::string FormatStr;
> - ? ?if (!GetConstantStringInfo(CI->getOperand(1), FormatStr))
> + ? ?if (!GetConstantStringInfo(CI->getOperand(0), FormatStr))
> ? ? ? return 0;
>
> ? ? // Empty format string -> noop.
> @@ -951,10 +951,10 @@
> ? ? }
>
> ? ? // Optimize specific format strings.
> - ? ?// printf("%c", chr) --> putchar(*(i8*)dst)
> + ? ?// printf("%c", chr) --> putchar(chr)
> ? ? if (FormatStr == "%c" && CI->getNumOperands() > 2 &&
> - ? ? ? ?CI->getOperand(2)->getType()->isIntegerTy()) {
> - ? ? ?Value *Res = EmitPutChar(CI->getOperand(2), B, TD);
> + ? ? ? ?CI->getOperand(1)->getType()->isIntegerTy()) {
> + ? ? ?Value *Res = EmitPutChar(CI->getOperand(1), B, TD);
>
> ? ? ? if (CI->use_empty()) return CI;
> ? ? ? return B.CreateIntCast(Res, CI->getType(), true);
> @@ -962,9 +962,9 @@
>
> ? ? // printf("%s\n", str) --> puts(str)
> ? ? if (FormatStr == "%s\n" && CI->getNumOperands() > 2 &&
> - ? ? ? ?CI->getOperand(2)->getType()->isPointerTy() &&
> + ? ? ? ?CI->getOperand(1)->getType()->isPointerTy() &&
> ? ? ? ? CI->use_empty()) {
> - ? ? ?EmitPutS(CI->getOperand(2), B, TD);
> + ? ? ?EmitPutS(CI->getOperand(1), B, TD);
> ? ? ? return CI;
> ? ? }
> ? ? return 0;
> @@ -985,7 +985,7 @@
>
> ? ? // Check for a fixed format string.
> ? ? std::string FormatStr;
> - ? ?if (!GetConstantStringInfo(CI->getOperand(2), FormatStr))
> + ? ?if (!GetConstantStringInfo(CI->getOperand(1), FormatStr))
> ? ? ? return 0;
>
> ? ? // If we just have a format string (nothing else crazy) transform it.
> @@ -1000,7 +1000,7 @@
> ? ? ? if (!TD) return 0;
>
> ? ? ? // sprintf(str, fmt) -> llvm.memcpy(str, fmt, strlen(fmt)+1, 1)
> - ? ? ?EmitMemCpy(CI->getOperand(1), CI->getOperand(2), // Copy the nul byte.
> + ? ? ?EmitMemCpy(CI->getOperand(0), CI->getOperand(1), // Copy the nul byte.
> ? ? ? ? ? ? ? ? ?ConstantInt::get(TD->getIntPtrType(*Context),
> ? ? ? ? ? ? ? ? ?FormatStr.size()+1), 1, false, B, TD);
> ? ? ? return ConstantInt::get(CI->getType(), FormatStr.size());
> @@ -1014,10 +1014,10 @@
> ? ? // Decode the second character of the format string.
> ? ? if (FormatStr[1] == 'c') {
> ? ? ? // sprintf(dst, "%c", chr) --> *(i8*)dst = chr; *((i8*)dst+1) = 0
> - ? ? ?if (!CI->getOperand(3)->getType()->isIntegerTy()) return 0;
> - ? ? ?Value *V = B.CreateTrunc(CI->getOperand(3),
> + ? ? ?if (!CI->getOperand(2)->getType()->isIntegerTy()) return 0;
> + ? ? ?Value *V = B.CreateTrunc(CI->getOperand(2),
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?Type::getInt8Ty(*Context), "char");
> - ? ? ?Value *Ptr = CastToCStr(CI->getOperand(1), B);
> + ? ? ?Value *Ptr = CastToCStr(CI->getOperand(0), B);
> ? ? ? B.CreateStore(V, Ptr);
> ? ? ? Ptr = B.CreateGEP(Ptr, ConstantInt::get(Type::getInt32Ty(*Context), 1),
> ? ? ? ? ? ? ? ? ? ? ? ? "nul");
> @@ -1031,13 +1031,13 @@
> ? ? ? if (!TD) return 0;
>
> ? ? ? // sprintf(dest, "%s", str) -> llvm.memcpy(dest, str, strlen(str)+1, 1)
> - ? ? ?if (!CI->getOperand(3)->getType()->isPointerTy()) return 0;
> + ? ? ?if (!CI->getOperand(2)->getType()->isPointerTy()) return 0;
>
> - ? ? ?Value *Len = EmitStrLen(CI->getOperand(3), B, TD);
> + ? ? ?Value *Len = EmitStrLen(CI->getOperand(2), B, TD);
> ? ? ? Value *IncLen = B.CreateAdd(Len,
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ConstantInt::get(Len->getType(), 1),
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? "leninc");
> - ? ? ?EmitMemCpy(CI->getOperand(1), CI->getOperand(3), IncLen, 1, false, B, TD);
> + ? ? ?EmitMemCpy(CI->getOperand(0), CI->getOperand(2), IncLen, 1, false, B, TD);
>
> ? ? ? // The sprintf result is the unincremented number of bytes in the string.
> ? ? ? return B.CreateIntCast(Len, CI->getType(), false);
> @@ -1061,8 +1061,8 @@
> ? ? ? return 0;
>
> ? ? // Get the element size and count.
> - ? ?ConstantInt *SizeC = dyn_cast<ConstantInt>(CI->getOperand(2));
> - ? ?ConstantInt *CountC = dyn_cast<ConstantInt>(CI->getOperand(3));
> + ? ?ConstantInt *SizeC = dyn_cast<ConstantInt>(CI->getOperand(1));
> + ? ?ConstantInt *CountC = dyn_cast<ConstantInt>(CI->getOperand(2));
> ? ? if (!SizeC || !CountC) return 0;
> ? ? uint64_t Bytes = SizeC->getZExtValue()*CountC->getZExtValue();
>
> @@ -1072,8 +1072,8 @@
>
> ? ? // If this is writing one byte, turn it into fputc.
> ? ? if (Bytes == 1) { ?// fwrite(S,1,1,F) -> fputc(S[0],F)
> - ? ? ?Value *Char = B.CreateLoad(CastToCStr(CI->getOperand(1), B), "char");
> - ? ? ?EmitFPutC(Char, CI->getOperand(4), B, TD);
> + ? ? ?Value *Char = B.CreateLoad(CastToCStr(CI->getOperand(0), B), "char");
> + ? ? ?EmitFPutC(Char, CI->getOperand(3), B, TD);
> ? ? ? return ConstantInt::get(CI->getType(), 1);
> ? ? }
>
> @@ -1097,11 +1097,11 @@
> ? ? ? return 0;
>
> ? ? // fputs(s,F) --> fwrite(s,1,strlen(s),F)
> - ? ?uint64_t Len = GetStringLength(CI->getOperand(1));
> + ? ?uint64_t Len = GetStringLength(CI->getOperand(0));
> ? ? if (!Len) return 0;
> - ? ?EmitFWrite(CI->getOperand(1),
> + ? ?EmitFWrite(CI->getOperand(0),
> ? ? ? ? ? ? ? ?ConstantInt::get(TD->getIntPtrType(*Context), Len-1),
> - ? ? ? ? ? ? ? CI->getOperand(2), B, TD);
> + ? ? ? ? ? ? ? CI->getOperand(1), B, TD);
> ? ? return CI; ?// Known to have no uses (see above).
> ? }
> ?};
> @@ -1120,7 +1120,7 @@
>
> ? ? // All the optimizations depend on the format string.
> ? ? std::string FormatStr;
> - ? ?if (!GetConstantStringInfo(CI->getOperand(2), FormatStr))
> + ? ?if (!GetConstantStringInfo(CI->getOperand(1), FormatStr))
> ? ? ? return 0;
>
> ? ? // fprintf(F, "foo") --> fwrite("foo", 3, 1, F)
> @@ -1132,10 +1132,10 @@
> ? ? ? // These optimizations require TargetData.
> ? ? ? if (!TD) return 0;
>
> - ? ? ?EmitFWrite(CI->getOperand(2),
> + ? ? ?EmitFWrite(CI->getOperand(1),
> ? ? ? ? ? ? ? ? ?ConstantInt::get(TD->getIntPtrType(*Context),
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? FormatStr.size()),
> - ? ? ? ? ? ? ? ? CI->getOperand(1), B, TD);
> + ? ? ? ? ? ? ? ? CI->getOperand(0), B, TD);
> ? ? ? return ConstantInt::get(CI->getType(), FormatStr.size());
> ? ? }
>
> @@ -1146,17 +1146,17 @@
>
> ? ? // Decode the second character of the format string.
> ? ? if (FormatStr[1] == 'c') {
> - ? ? ?// fprintf(F, "%c", chr) --> *(i8*)dst = chr
> - ? ? ?if (!CI->getOperand(3)->getType()->isIntegerTy()) return 0;
> - ? ? ?EmitFPutC(CI->getOperand(3), CI->getOperand(1), B, TD);
> + ? ? ?// fprintf(F, "%c", chr) --> fputc(chr, F)
> + ? ? ?if (!CI->getOperand(2)->getType()->isIntegerTy()) return 0;
> + ? ? ?EmitFPutC(CI->getOperand(2), CI->getOperand(0), B, TD);
> ? ? ? return ConstantInt::get(CI->getType(), 1);
> ? ? }
>
> ? ? if (FormatStr[1] == 's') {
> - ? ? ?// fprintf(F, "%s", str) -> fputs(str, F)
> - ? ? ?if (!CI->getOperand(3)->getType()->isPointerTy() || !CI->use_empty())
> + ? ? ?// fprintf(F, "%s", str) --> fputs(str, F)
> + ? ? ?if (!CI->getOperand(2)->getType()->isPointerTy() || !CI->use_empty())
> ? ? ? ? return 0;
> - ? ? ?EmitFPutS(CI->getOperand(3), CI->getOperand(1), B, TD);
> + ? ? ?EmitFPutS(CI->getOperand(2), CI->getOperand(0), B, TD);
> ? ? ? return CI;
> ? ? }
> ? ? return 0;
> Index: llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
> ===================================================================
> --- llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp (revision 101132)
> +++ llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp (working copy)
> @@ -123,14 +123,14 @@
> ? if (StoreInst *SI = dyn_cast<StoreInst>(I))
> ? ? return SI->getPointerOperand();
> ? if (MemIntrinsic *MI = dyn_cast<MemIntrinsic>(I))
> - ? ?return MI->getOperand(1);
> + ? ?return MI->getOperand(0);
>
> ? switch (cast<IntrinsicInst>(I)->getIntrinsicID()) {
> ? default: assert(false && "Unexpected intrinsic!");
> ? case Intrinsic::init_trampoline:
> + ? ?return I->getOperand(0);
> + ?case Intrinsic::lifetime_end:
> ? ? return I->getOperand(1);
> - ?case Intrinsic::lifetime_end:
> - ? ?return I->getOperand(2);
> ? }
> ?}
>
> @@ -152,7 +152,7 @@
> ? ? case Intrinsic::init_trampoline:
> ? ? ? return -1u;
> ? ? case Intrinsic::lifetime_end:
> - ? ? ?Len = I->getOperand(1);
> + ? ? ?Len = I->getOperand(0);
> ? ? ? break;
> ? ? }
> ? }
> @@ -287,7 +287,7 @@
>
> ?/// handleFreeWithNonTrivialDependency - Handle frees of entire structures whose
> ?/// dependency is a store to a field of that structure.
> -bool DSE::handleFreeWithNonTrivialDependency(Instruction *F, MemDepResult Dep) {
> +bool DSE::handleFreeWithNonTrivialDependency(/*FIXME: Call*/Instruction *F, MemDepResult Dep) {
> ? AliasAnalysis &AA = getAnalysis<AliasAnalysis>();
>
> ? Instruction *Dependency = Dep.getInst();
> @@ -297,7 +297,7 @@
> ? Value *DepPointer = getPointerOperand(Dependency)->getUnderlyingObject();
>
> ? // Check for aliasing.
> - ?if (AA.alias(F->getOperand(1), 1, DepPointer, 1) !=
> + ?if (AA.alias(F->getOperand(0), 1, DepPointer, 1) !=
> ? ? ? ? ?AliasAnalysis::MustAlias)
> ? ? return false;
>
> Index: llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
> ===================================================================
> --- llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp ? ? ?(revision 101132)
> +++ llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp ? ? ?(working copy)
> @@ -744,7 +744,7 @@
> ? const Type *ArgTys[3] = { M->getRawDest()->getType(),
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? M->getRawSource()->getType(),
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? M->getLength()->getType() };
> - ?M->setOperand(0,Intrinsic::getDeclaration(Mod, Intrinsic::memcpy, ArgTys, 3));
> + ?M->setCalledFunction(Intrinsic::getDeclaration(Mod, Intrinsic::memcpy, ArgTys, 3));
>
> ? // MemDep may have over conservative information about this instruction, just
> ? // conservatively flush it from the cache.
> Index: llvm/lib/Transforms/IPO/LowerSetJmp.cpp
> ===================================================================
> --- llvm/lib/Transforms/IPO/LowerSetJmp.cpp ? ? (revision 101132)
> +++ llvm/lib/Transforms/IPO/LowerSetJmp.cpp ? ? (working copy)
> @@ -262,8 +262,8 @@
> ? // char*. It returns "void", so it doesn't need to replace any of
> ? // Inst's uses and doesn't get a name.
> ? CastInst* CI =
> - ? ?new BitCastInst(Inst->getOperand(1), SBPTy, "LJBuf", Inst);
> - ?Value *Args[] = { CI, Inst->getOperand(2) };
> + ? ?new BitCastInst(Inst->getOperand(0), SBPTy, "LJBuf", Inst);
> + ?Value *Args[] = { CI, Inst->getOperand(1) };
> ? CallInst::Create(ThrowLongJmp, Args, Args + 2, "", Inst);
>
> ? SwitchValuePair& SVP = SwitchValMap[Inst->getParent()->getParent()];
> @@ -378,7 +378,7 @@
> ? const Type* SBPTy =
> ? ? ? ? ? Type::getInt8PtrTy(Inst->getContext());
> ? CastInst* BufPtr =
> - ? ?new BitCastInst(Inst->getOperand(1), SBPTy, "SBJmpBuf", Inst);
> + ? ?new BitCastInst(Inst->getOperand(0), SBPTy, "SBJmpBuf", Inst);
> ? Value *Args[] = {
> ? ? GetSetJmpMap(Func), BufPtr,
> ? ? ConstantInt::get(Type::getInt32Ty(Inst->getContext()), SetJmpIDMap[Func]++)
> @@ -473,7 +473,7 @@
>
> ? // Construct the new "invoke" instruction.
> ? TerminatorInst* Term = OldBB->getTerminator();
> - ?std::vector<Value*> Params(CI.op_begin() + 1, CI.op_end());
> + ?std::vector<Value*> Params(CI.op_begin(), CI.op_end() - 1);
> ? InvokeInst* II =
> ? ? InvokeInst::Create(CI.getCalledValue(), NewBB, PrelimBBMap[Func],
> ? ? ? ? ? ? ? ? ? ? ? ?Params.begin(), Params.end(), CI.getName(), Term);
> Index: llvm/lib/Transforms/IPO/GlobalOpt.cpp
> ===================================================================
> --- llvm/lib/Transforms/IPO/GlobalOpt.cpp ? ? ? (revision 101132)
> +++ llvm/lib/Transforms/IPO/GlobalOpt.cpp ? ? ? (working copy)
> @@ -222,12 +222,12 @@
> ? ? ? ? GS.HasPHIUser = true;
> ? ? ? } else if (isa<CmpInst>(I)) {
> ? ? ? } else if (isa<MemTransferInst>(I)) {
> + ? ? ? ?if (I->getOperand(0) == V)
> + ? ? ? ? ?GS.StoredType = GlobalStatus::isStored;
> ? ? ? ? if (I->getOperand(1) == V)
> - ? ? ? ? ?GS.StoredType = GlobalStatus::isStored;
> - ? ? ? ?if (I->getOperand(2) == V)
> ? ? ? ? ? GS.isLoaded = true;
> ? ? ? } else if (isa<MemSetInst>(I)) {
> - ? ? ? ?assert(I->getOperand(1) == V && "Memset only takes one pointer!");
> + ? ? ? ?assert(I->getOperand(0) == V && "Memset only takes one pointer!");
> ? ? ? ? GS.StoredType = GlobalStatus::isStored;
> ? ? ? } else {
> ? ? ? ? return true; ?// Any other non-load instruction might take address!
> @@ -1323,8 +1323,8 @@
> ? // ? ? ?if (F2) { free(F2); F2 = 0; }
> ? // ? ?}
> ? // The malloc can also fail if its argument is too large.
> - ?Constant *ConstantZero = ConstantInt::get(CI->getOperand(1)->getType(), 0);
> - ?Value *RunningOr = new ICmpInst(CI, ICmpInst::ICMP_SLT, CI->getOperand(1),
> + ?Constant *ConstantZero = ConstantInt::get(CI->getOperand(0)->getType(), 0);
> + ?Value *RunningOr = new ICmpInst(CI, ICmpInst::ICMP_SLT, CI->getOperand(0),
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ConstantZero, "isneg");
> ? for (unsigned i = 0, e = FieldMallocs.size(); i != e; ++i) {
> ? ? Value *Cond = new ICmpInst(CI, ICmpInst::ICMP_EQ, FieldMallocs[i],
> @@ -1508,7 +1508,7 @@
>
> ? ? // If this is an allocation of a fixed size array of structs, analyze as a
> ? ? // variable size array. ?malloc [100 x struct],1 -> malloc struct, 100
> - ? ?if (NElems == ConstantInt::get(CI->getOperand(1)->getType(), 1))
> + ? ?if (NElems == ConstantInt::get(CI->getOperand(0)->getType(), 1))
> ? ? ? if (const ArrayType *AT = dyn_cast<ArrayType>(AllocTy))
> ? ? ? ? AllocTy = AT->getElementType();
>
> @@ -1638,7 +1638,7 @@
> ? ? ? ? // bool.
> ? ? ? ? Instruction *StoredVal = cast<Instruction>(SI->getOperand(0));
>
> - ? ? ? ?// If we're already replaced the input, StoredVal will be a cast or
> + ? ? ? ?// If we've already replaced the input, StoredVal will be a cast or
> ? ? ? ? // select instruction. ?If not, it will be a load of the original
> ? ? ? ? // global.
> ? ? ? ? if (LoadInst *LI = dyn_cast<LoadInst>(StoredVal)) {
> @@ -2259,8 +2259,8 @@
> ? ? } else if (SelectInst *SI = dyn_cast<SelectInst>(CurInst)) {
> ? ? ? InstResult =
> ? ? ? ? ? ? ConstantExpr::getSelect(getVal(Values, SI->getOperand(0)),
> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? getVal(Values, SI->getOperand(1)),
> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? getVal(Values, SI->getOperand(2)));
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?getVal(Values, SI->getOperand(1)),
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?getVal(Values, SI->getOperand(2)));
> ? ? } else if (GetElementPtrInst *GEP = dyn_cast<GetElementPtrInst>(CurInst)) {
> ? ? ? Constant *P = getVal(Values, GEP->getOperand(0));
> ? ? ? SmallVector<Constant*, 8> GEPOps;
> @@ -2292,14 +2292,14 @@
> ? ? ? }
>
> ? ? ? // Cannot handle inline asm.
> - ? ? ?if (isa<InlineAsm>(CI->getOperand(0))) return false;
> + ? ? ?if (isa<InlineAsm>(CI->getCalledValue())) return false;
>
> ? ? ? // Resolve function pointers.
> - ? ? ?Function *Callee = dyn_cast<Function>(getVal(Values, CI->getOperand(0)));
> + ? ? ?Function *Callee = dyn_cast<Function>(getVal(Values, CI->getCalledValue()));
> ? ? ? if (!Callee) return false; ?// Cannot resolve.
>
> ? ? ? SmallVector<Constant*, 8> Formals;
> - ? ? ?for (User::op_iterator i = CI->op_begin() + 1, e = CI->op_end();
> + ? ? ?for (User::op_iterator i = CI->op_begin(), e = CI->op_end() - 1;
> ? ? ? ? ? ?i != e; ++i)
> ? ? ? ? Formals.push_back(getVal(Values, *i));
>
> Index: llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
> ===================================================================
> --- llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp ? ? (revision 101132)
> +++ llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp ? ? (working copy)
> @@ -1423,7 +1423,7 @@
> ? ? ? switch (II->getIntrinsicID()) {
> ? ? ? case Intrinsic::bswap:
> ? ? ? ? Worklist.Add(II);
> - ? ? ? ?ICI.setOperand(0, II->getOperand(1));
> + ? ? ? ?ICI.setOperand(0, II->getOperand(0));
> ? ? ? ? ICI.setOperand(1, ConstantInt::get(II->getContext(), RHSV.byteSwap()));
> ? ? ? ? return &ICI;
> ? ? ? case Intrinsic::ctlz:
> @@ -1431,7 +1431,7 @@
> ? ? ? ? // ctz(A) == bitwidth(a) ?-> ?A == 0 and likewise for !=
> ? ? ? ? if (RHSV == RHS->getType()->getBitWidth()) {
> ? ? ? ? ? Worklist.Add(II);
> - ? ? ? ? ?ICI.setOperand(0, II->getOperand(1));
> + ? ? ? ? ?ICI.setOperand(0, II->getOperand(0));
> ? ? ? ? ? ICI.setOperand(1, ConstantInt::get(RHS->getType(), 0));
> ? ? ? ? ? return &ICI;
> ? ? ? ? }
> @@ -1440,7 +1440,7 @@
> ? ? ? ? // popcount(A) == 0 ?-> ?A == 0 and likewise for !=
> ? ? ? ? if (RHS->isZero()) {
> ? ? ? ? ? Worklist.Add(II);
> - ? ? ? ? ?ICI.setOperand(0, II->getOperand(1));
> + ? ? ? ? ?ICI.setOperand(0, II->getOperand(0));
> ? ? ? ? ? ICI.setOperand(1, RHS);
> ? ? ? ? ? return &ICI;
> ? ? ? ? }
> Index: llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
> ===================================================================
> --- llvm/lib/Transforms/InstCombine/InstructionCombining.cpp ? ?(revision 101132)
> +++ llvm/lib/Transforms/InstCombine/InstructionCombining.cpp ? ?(working copy)
> @@ -711,7 +711,7 @@
> ?}
>
> ?Instruction *InstCombiner::visitFree(Instruction &FI) {
> - ?Value *Op = FI.getOperand(1);
> + ?Value *Op = FI.getOperand(0);
>
> ? // free undef -> unreachable.
> ? if (isa<UndefValue>(Op)) {
> @@ -896,7 +896,7 @@
> ? if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(Agg)) {
> ? ? // We're extracting from an intrinsic, see if we're the only user, which
> ? ? // allows us to simplify multiple result intrinsics to simpler things that
> - ? ?// just get one value..
> + ? ?// just get one value.
> ? ? if (II->hasOneUse()) {
> ? ? ? // Check if we're grabbing the overflow bit or the result of a 'with
> ? ? ? // overflow' intrinsic. ?If it's the latter we can remove the intrinsic
> @@ -905,7 +905,7 @@
> ? ? ? case Intrinsic::uadd_with_overflow:
> ? ? ? case Intrinsic::sadd_with_overflow:
> ? ? ? ? if (*EV.idx_begin() == 0) { ?// Normal result.
> - ? ? ? ? ?Value *LHS = II->getOperand(1), *RHS = II->getOperand(2);
> + ? ? ? ? ?Value *LHS = II->getOperand(0), *RHS = II->getOperand(1);
> ? ? ? ? ? II->replaceAllUsesWith(UndefValue::get(II->getType()));
> ? ? ? ? ? EraseInstFromFunction(*II);
> ? ? ? ? ? return BinaryOperator::CreateAdd(LHS, RHS);
> @@ -914,7 +914,7 @@
> ? ? ? case Intrinsic::usub_with_overflow:
> ? ? ? case Intrinsic::ssub_with_overflow:
> ? ? ? ? if (*EV.idx_begin() == 0) { ?// Normal result.
> - ? ? ? ? ?Value *LHS = II->getOperand(1), *RHS = II->getOperand(2);
> + ? ? ? ? ?Value *LHS = II->getOperand(0), *RHS = II->getOperand(1);
> ? ? ? ? ? II->replaceAllUsesWith(UndefValue::get(II->getType()));
> ? ? ? ? ? EraseInstFromFunction(*II);
> ? ? ? ? ? return BinaryOperator::CreateSub(LHS, RHS);
> @@ -923,7 +923,7 @@
> ? ? ? case Intrinsic::umul_with_overflow:
> ? ? ? case Intrinsic::smul_with_overflow:
> ? ? ? ? if (*EV.idx_begin() == 0) { ?// Normal result.
> - ? ? ? ? ?Value *LHS = II->getOperand(1), *RHS = II->getOperand(2);
> + ? ? ? ? ?Value *LHS = II->getOperand(0), *RHS = II->getOperand(1);
> ? ? ? ? ? II->replaceAllUsesWith(UndefValue::get(II->getType()));
> ? ? ? ? ? EraseInstFromFunction(*II);
> ? ? ? ? ? return BinaryOperator::CreateMul(LHS, RHS);
> Index: llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
> ===================================================================
> --- llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp ? ? (revision 101132)
> +++ llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp ? ? (working copy)
> @@ -732,10 +732,10 @@
> ? ? ? ? ? // the right place.
> ? ? ? ? ? Instruction *NewVal;
> ? ? ? ? ? if (InputBit > ResultBit)
> - ? ? ? ? ? ?NewVal = BinaryOperator::CreateLShr(I->getOperand(1),
> + ? ? ? ? ? ?NewVal = BinaryOperator::CreateLShr(II->getOperand(0),
> ? ? ? ? ? ? ? ? ? ? ConstantInt::get(I->getType(), InputBit-ResultBit));
> ? ? ? ? ? else
> - ? ? ? ? ? ?NewVal = BinaryOperator::CreateShl(I->getOperand(1),
> + ? ? ? ? ? ?NewVal = BinaryOperator::CreateShl(II->getOperand(0),
> ? ? ? ? ? ? ? ? ? ? ConstantInt::get(I->getType(), ResultBit-InputBit));
> ? ? ? ? ? NewVal->takeName(I);
> ? ? ? ? ? return InsertNewInstBefore(NewVal, *I);
> @@ -1052,12 +1052,12 @@
> ? ? case Intrinsic::x86_sse2_mul_sd:
> ? ? case Intrinsic::x86_sse2_min_sd:
> ? ? case Intrinsic::x86_sse2_max_sd:
> + ? ? ?TmpV = SimplifyDemandedVectorElts(II->getOperand(0), DemandedElts,
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?UndefElts, Depth+1);
> + ? ? ?if (TmpV) { II->setOperand(0, TmpV); MadeChange = true; }
> ? ? ? TmpV = SimplifyDemandedVectorElts(II->getOperand(1), DemandedElts,
> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?UndefElts, Depth+1);
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?UndefElts2, Depth+1);
> ? ? ? if (TmpV) { II->setOperand(1, TmpV); MadeChange = true; }
> - ? ? ?TmpV = SimplifyDemandedVectorElts(II->getOperand(2), DemandedElts,
> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?UndefElts2, Depth+1);
> - ? ? ?if (TmpV) { II->setOperand(2, TmpV); MadeChange = true; }
>
> ? ? ? // If only the low elt is demanded and this is a scalarizable intrinsic,
> ? ? ? // scalarize it now.
> @@ -1069,8 +1069,8 @@
> ? ? ? ? case Intrinsic::x86_sse2_sub_sd:
> ? ? ? ? case Intrinsic::x86_sse2_mul_sd:
> ? ? ? ? ? // TODO: Lower MIN/MAX/ABS/etc
> - ? ? ? ? ?Value *LHS = II->getOperand(1);
> - ? ? ? ? ?Value *RHS = II->getOperand(2);
> + ? ? ? ? ?Value *LHS = II->getOperand(0);
> + ? ? ? ? ?Value *RHS = II->getOperand(1);
> ? ? ? ? ? // Extract the element as scalars.
> ? ? ? ? ? LHS = InsertNewInstBefore(ExtractElementInst::Create(LHS,
> ? ? ? ? ? ? ConstantInt::get(Type::getInt32Ty(I->getContext()), 0U)), *II);
> Index: llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
> ===================================================================
> --- llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp ? ? ? ?(revision 101132)
> +++ llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp ? ? ? ?(working copy)
> @@ -109,8 +109,8 @@
> ?}
>
> ?Instruction *InstCombiner::SimplifyMemTransfer(MemIntrinsic *MI) {
> - ?unsigned DstAlign = GetOrEnforceKnownAlignment(MI->getOperand(1));
> - ?unsigned SrcAlign = GetOrEnforceKnownAlignment(MI->getOperand(2));
> + ?unsigned DstAlign = GetOrEnforceKnownAlignment(MI->getOperand(0));
> + ?unsigned SrcAlign = GetOrEnforceKnownAlignment(MI->getOperand(1));
> ? unsigned MinAlign = std::min(DstAlign, SrcAlign);
> ? unsigned CopyAlign = MI->getAlignment();
>
> @@ -122,7 +122,7 @@
>
> ? // If MemCpyInst length is 1/2/4/8 bytes then replace memcpy with
> ? // load/store.
> - ?ConstantInt *MemOpLength = dyn_cast<ConstantInt>(MI->getOperand(3));
> + ?ConstantInt *MemOpLength = dyn_cast<ConstantInt>(MI->getOperand(2));
> ? if (MemOpLength == 0) return 0;
>
> ? // Source and destination pointer types are always "i8*" for intrinsic. ?See
> @@ -137,9 +137,9 @@
>
> ? // Use an integer load+store unless we can find something better.
> ? unsigned SrcAddrSp =
> - ? ?cast<PointerType>(MI->getOperand(2)->getType())->getAddressSpace();
> - ?unsigned DstAddrSp =
> ? ? cast<PointerType>(MI->getOperand(1)->getType())->getAddressSpace();
> + ?unsigned DstAddrSp =
> + ? ?cast<PointerType>(MI->getOperand(0)->getType())->getAddressSpace();
>
> ? const IntegerType* IntType = IntegerType::get(MI->getContext(), Size<<3);
> ? Type *NewSrcPtrTy = PointerType::get(IntType, SrcAddrSp);
> @@ -151,8 +151,8 @@
> ? // an i64 load+store, here because this improves the odds that the source or
> ? // dest address will be promotable. ?See if we can find a better type than the
> ? // integer datatype.
> - ?Value *StrippedDest = MI->getOperand(1)->stripPointerCasts();
> - ?if (StrippedDest != MI->getOperand(1)) {
> + ?Value *StrippedDest = MI->getOperand(0)->stripPointerCasts();
> + ?if (StrippedDest != MI->getOperand(0)) {
> ? ? const Type *SrcETy = cast<PointerType>(StrippedDest->getType())
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ->getElementType();
> ? ? if (TD && SrcETy->isSized() && TD->getTypeStoreSize(SrcETy) == Size) {
> @@ -186,15 +186,15 @@
> ? SrcAlign = std::max(SrcAlign, CopyAlign);
> ? DstAlign = std::max(DstAlign, CopyAlign);
>
> - ?Value *Src = Builder->CreateBitCast(MI->getOperand(2), NewSrcPtrTy);
> - ?Value *Dest = Builder->CreateBitCast(MI->getOperand(1), NewDstPtrTy);
> + ?Value *Src = Builder->CreateBitCast(MI->getOperand(1), NewSrcPtrTy);
> + ?Value *Dest = Builder->CreateBitCast(MI->getOperand(0), NewDstPtrTy);
> ? Instruction *L = new LoadInst(Src, "tmp", MI->isVolatile(), SrcAlign);
> ? InsertNewInstBefore(L, *MI);
> ? InsertNewInstBefore(new StoreInst(L, Dest, MI->isVolatile(), DstAlign),
> ? ? ? ? ? ? ? ? ? ? ? *MI);
>
> ? // Set the size of the copy to 0, it will be deleted on the next iteration.
> - ?MI->setOperand(3, Constant::getNullValue(MemOpLength->getType()));
> + ?MI->setOperand(2, Constant::getNullValue(MemOpLength->getType()));
> ? return MI;
> ?}
>
> @@ -258,7 +258,7 @@
>
> ? IntrinsicInst *II = dyn_cast<IntrinsicInst>(&CI);
> ? if (!II) return visitCallSite(&CI);
> -
> +
> ? // Intrinsics cannot occur in an invoke, so handle them here instead of in
> ? // visitCallSite.
> ? if (MemIntrinsic *MI = dyn_cast<MemIntrinsic>(II)) {
> @@ -282,12 +282,12 @@
> ? ? if (MemMoveInst *MMI = dyn_cast<MemMoveInst>(MI)) {
> ? ? ? if (GlobalVariable *GVSrc = dyn_cast<GlobalVariable>(MMI->getSource()))
> ? ? ? ? if (GVSrc->isConstant()) {
> - ? ? ? ? ?Module *M = CI.getParent()->getParent()->getParent();
> + ? ? ? ? ?Module *M = MMI->getParent()->getParent()->getParent();
> ? ? ? ? ? Intrinsic::ID MemCpyID = Intrinsic::memcpy;
> - ? ? ? ? ?const Type *Tys[3] = { CI.getOperand(1)->getType(),
> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? CI.getOperand(2)->getType(),
> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? CI.getOperand(3)->getType() };
> - ? ? ? ? ?CI.setOperand(0,
> + ? ? ? ? ?const Type *Tys[3] = { CI.getOperand(0)->getType(),
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? CI.getOperand(1)->getType(),
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? CI.getOperand(2)->getType() };
> + ? ? ? ? ?MMI->setCalledFunction(
> ? ? ? ? ? ? ? ? ? ? ? ? Intrinsic::getDeclaration(M, MemCpyID, Tys, 3));
> ? ? ? ? ? Changed = true;
> ? ? ? ? }
> @@ -297,21 +297,19 @@
> ? ? ? // memmove(x,x,size) -> noop.
> ? ? ? if (MTI->getSource() == MTI->getDest())
> ? ? ? ? return EraseInstFromFunction(CI);
> - ? ?}
>
> - ? ?// If we can determine a pointer alignment that is bigger than currently
> - ? ?// set, update the alignment.
> - ? ?if (isa<MemTransferInst>(MI)) {
> - ? ? ?if (Instruction *I = SimplifyMemTransfer(MI))
> + ? ? ?// If we can determine a pointer alignment that is bigger than currently
> + ? ? ?// set, update the alignment.
> + ? ? ?if (Instruction *I = SimplifyMemTransfer(MTI))
> ? ? ? ? return I;
> ? ? } else if (MemSetInst *MSI = dyn_cast<MemSetInst>(MI)) {
> ? ? ? if (Instruction *I = SimplifyMemSet(MSI))
> ? ? ? ? return I;
> ? ? }
> -
> +
> ? ? if (Changed) return II;
> ? }
> -
> +
> ? switch (II->getIntrinsicID()) {
> ? default: break;
> ? case Intrinsic::objectsize: {
> @@ -319,10 +317,10 @@
> ? ? if (!TD) break;
>
> ? ? const Type *ReturnTy = CI.getType();
> - ? ?bool Min = (cast<ConstantInt>(II->getOperand(2))->getZExtValue() == 1);
> + ? ?bool Min = (cast<ConstantInt>(II->getOperand(1))->getZExtValue() == 1);
>
> ? ? // Get to the real allocated thing and offset as fast as possible.
> - ? ?Value *Op1 = II->getOperand(1)->stripPointerCasts();
> + ? ?Value *Op1 = II->getOperand(0)->stripPointerCasts();
>
> ? ? // If we've stripped down to a single global variable that we
> ? ? // can know the size of then just return that.
> @@ -390,7 +388,6 @@
>
> ? ? ? Constant *RetVal = ConstantInt::get(ReturnTy, Size-Offset);
> ? ? ? return ReplaceInstUsesWith(CI, RetVal);
> -
> ? ? }
>
> ? ? // Do not return "I don't know" here. Later optimization passes could
> @@ -399,45 +396,45 @@
> ? }
> ? case Intrinsic::bswap:
> ? ? // bswap(bswap(x)) -> x
> - ? ?if (IntrinsicInst *Operand = dyn_cast<IntrinsicInst>(II->getOperand(1)))
> + ? ?if (IntrinsicInst *Operand = dyn_cast<IntrinsicInst>(II->getOperand(0)))
> ? ? ? if (Operand->getIntrinsicID() == Intrinsic::bswap)
> - ? ? ? ?return ReplaceInstUsesWith(CI, Operand->getOperand(1));
> + ? ? ? ?return ReplaceInstUsesWith(CI, Operand->getOperand(0));
>
> ? ? // bswap(trunc(bswap(x))) -> trunc(lshr(x, c))
> - ? ?if (TruncInst *TI = dyn_cast<TruncInst>(II->getOperand(1))) {
> + ? ?if (TruncInst *TI = dyn_cast<TruncInst>(II->getOperand(0))) {
> ? ? ? if (IntrinsicInst *Operand = dyn_cast<IntrinsicInst>(TI->getOperand(0)))
> ? ? ? ? if (Operand->getIntrinsicID() == Intrinsic::bswap) {
> ? ? ? ? ? unsigned C = Operand->getType()->getPrimitiveSizeInBits() -
> ? ? ? ? ? ? ? ? ? ? ? ?TI->getType()->getPrimitiveSizeInBits();
> ? ? ? ? ? Value *CV = ConstantInt::get(Operand->getType(), C);
> - ? ? ? ? ?Value *V = Builder->CreateLShr(Operand->getOperand(1), CV);
> + ? ? ? ? ?Value *V = Builder->CreateLShr(Operand->getOperand(0), CV);
> ? ? ? ? ? return new TruncInst(V, TI->getType());
> ? ? ? ? }
> ? ? }
>
> ? ? break;
> ? case Intrinsic::powi:
> - ? ?if (ConstantInt *Power = dyn_cast<ConstantInt>(II->getOperand(2))) {
> + ? ?if (ConstantInt *Power = dyn_cast<ConstantInt>(II->getOperand(1))) {
> ? ? ? // powi(x, 0) -> 1.0
> ? ? ? if (Power->isZero())
> ? ? ? ? return ReplaceInstUsesWith(CI, ConstantFP::get(CI.getType(), 1.0));
> ? ? ? // powi(x, 1) -> x
> ? ? ? if (Power->isOne())
> - ? ? ? ?return ReplaceInstUsesWith(CI, II->getOperand(1));
> + ? ? ? ?return ReplaceInstUsesWith(CI, II->getOperand(0));
> ? ? ? // powi(x, -1) -> 1/x
> ? ? ? if (Power->isAllOnesValue())
> ? ? ? ? return BinaryOperator::CreateFDiv(ConstantFP::get(CI.getType(), 1.0),
> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?II->getOperand(1));
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?II->getOperand(0));
> ? ? }
> ? ? break;
> ? case Intrinsic::cttz: {
> ? ? // If all bits below the first known one are known zero,
> ? ? // this value is constant.
> - ? ?const IntegerType *IT = cast<IntegerType>(II->getOperand(1)->getType());
> + ? ?const IntegerType *IT = cast<IntegerType>(II->getOperand(0)->getType());
> ? ? uint32_t BitWidth = IT->getBitWidth();
> ? ? APInt KnownZero(BitWidth, 0);
> ? ? APInt KnownOne(BitWidth, 0);
> - ? ?ComputeMaskedBits(II->getOperand(1), APInt::getAllOnesValue(BitWidth),
> + ? ?ComputeMaskedBits(II->getOperand(0), APInt::getAllOnesValue(BitWidth),
> ? ? ? ? ? ? ? ? ? ? ? KnownZero, KnownOne);
> ? ? unsigned TrailingZeros = KnownOne.countTrailingZeros();
> ? ? APInt Mask(APInt::getLowBitsSet(BitWidth, TrailingZeros));
> @@ -450,11 +447,11 @@
> ? case Intrinsic::ctlz: {
> ? ? // If all bits above the first known one are known zero,
> ? ? // this value is constant.
> - ? ?const IntegerType *IT = cast<IntegerType>(II->getOperand(1)->getType());
> + ? ?const IntegerType *IT = cast<IntegerType>(II->getOperand(0)->getType());
> ? ? uint32_t BitWidth = IT->getBitWidth();
> ? ? APInt KnownZero(BitWidth, 0);
> ? ? APInt KnownOne(BitWidth, 0);
> - ? ?ComputeMaskedBits(II->getOperand(1), APInt::getAllOnesValue(BitWidth),
> + ? ?ComputeMaskedBits(II->getOperand(0), APInt::getAllOnesValue(BitWidth),
> ? ? ? ? ? ? ? ? ? ? ? KnownZero, KnownOne);
> ? ? unsigned LeadingZeros = KnownOne.countLeadingZeros();
> ? ? APInt Mask(APInt::getHighBitsSet(BitWidth, LeadingZeros));
> @@ -465,8 +462,8 @@
> ? ? }
> ? ? break;
> ? case Intrinsic::uadd_with_overflow: {
> - ? ?Value *LHS = II->getOperand(1), *RHS = II->getOperand(2);
> - ? ?const IntegerType *IT = cast<IntegerType>(II->getOperand(1)->getType());
> + ? ?Value *LHS = II->getOperand(0), *RHS = II->getOperand(1);
> + ? ?const IntegerType *IT = cast<IntegerType>(II->getOperand(0)->getType());
> ? ? uint32_t BitWidth = IT->getBitWidth();
> ? ? APInt Mask = APInt::getSignBit(BitWidth);
> ? ? APInt LHSKnownZero(BitWidth, 0);
> @@ -510,19 +507,19 @@
> ? // FALL THROUGH uadd into sadd
> ? case Intrinsic::sadd_with_overflow:
> ? ? // Canonicalize constants into the RHS.
> - ? ?if (isa<Constant>(II->getOperand(1)) &&
> - ? ? ? ?!isa<Constant>(II->getOperand(2))) {
> - ? ? ?Value *LHS = II->getOperand(1);
> - ? ? ?II->setOperand(1, II->getOperand(2));
> - ? ? ?II->setOperand(2, LHS);
> + ? ?if (isa<Constant>(II->getOperand(0)) &&
> + ? ? ? ?!isa<Constant>(II->getOperand(1))) {
> + ? ? ?Value *LHS = II->getOperand(0);
> + ? ? ?II->setOperand(0, II->getOperand(1));
> + ? ? ?II->setOperand(1, LHS);
> ? ? ? return II;
> ? ? }
>
> ? ? // X + undef -> undef
> - ? ?if (isa<UndefValue>(II->getOperand(2)))
> + ? ?if (isa<UndefValue>(II->getOperand(1)))
> ? ? ? return ReplaceInstUsesWith(CI, UndefValue::get(II->getType()));
>
> - ? ?if (ConstantInt *RHS = dyn_cast<ConstantInt>(II->getOperand(2))) {
> + ? ?if (ConstantInt *RHS = dyn_cast<ConstantInt>(II->getOperand(1))) {
> ? ? ? // X + 0 -> {X, false}
> ? ? ? if (RHS->isZero()) {
> ? ? ? ? Constant *V[] = {
> @@ -530,7 +527,7 @@
> ? ? ? ? ? ConstantInt::getFalse(II->getContext())
> ? ? ? ? };
> ? ? ? ? Constant *Struct = ConstantStruct::get(II->getContext(), V, 2, false);
> - ? ? ? ?return InsertValueInst::Create(Struct, II->getOperand(1), 0);
> + ? ? ? ?return InsertValueInst::Create(Struct, II->getOperand(0), 0);
> ? ? ? }
> ? ? }
> ? ? break;
> @@ -538,38 +535,38 @@
> ? case Intrinsic::ssub_with_overflow:
> ? ? // undef - X -> undef
> ? ? // X - undef -> undef
> - ? ?if (isa<UndefValue>(II->getOperand(1)) ||
> - ? ? ? ?isa<UndefValue>(II->getOperand(2)))
> + ? ?if (isa<UndefValue>(II->getOperand(0)) ||
> + ? ? ? ?isa<UndefValue>(II->getOperand(1)))
> ? ? ? return ReplaceInstUsesWith(CI, UndefValue::get(II->getType()));
>
> - ? ?if (ConstantInt *RHS = dyn_cast<ConstantInt>(II->getOperand(2))) {
> + ? ?if (ConstantInt *RHS = dyn_cast<ConstantInt>(II->getOperand(1))) {
> ? ? ? // X - 0 -> {X, false}
> ? ? ? if (RHS->isZero()) {
> ? ? ? ? Constant *V[] = {
> - ? ? ? ? ?UndefValue::get(II->getOperand(1)->getType()),
> + ? ? ? ? ?UndefValue::get(II->getOperand(0)->getType()),
> ? ? ? ? ? ConstantInt::getFalse(II->getContext())
> ? ? ? ? };
> ? ? ? ? Constant *Struct = ConstantStruct::get(II->getContext(), V, 2, false);
> - ? ? ? ?return InsertValueInst::Create(Struct, II->getOperand(1), 0);
> + ? ? ? ?return InsertValueInst::Create(Struct, II->getOperand(0), 0);
> ? ? ? }
> ? ? }
> ? ? break;
> ? case Intrinsic::umul_with_overflow:
> ? case Intrinsic::smul_with_overflow:
> ? ? // Canonicalize constants into the RHS.
> - ? ?if (isa<Constant>(II->getOperand(1)) &&
> - ? ? ? ?!isa<Constant>(II->getOperand(2))) {
> - ? ? ?Value *LHS = II->getOperand(1);
> - ? ? ?II->setOperand(1, II->getOperand(2));
> - ? ? ?II->setOperand(2, LHS);
> + ? ?if (isa<Constant>(II->getOperand(0)) &&
> + ? ? ? ?!isa<Constant>(II->getOperand(1))) {
> + ? ? ?Value *LHS = II->getOperand(0);
> + ? ? ?II->setOperand(0, II->getOperand(1));
> + ? ? ?II->setOperand(1, LHS);
> ? ? ? return II;
> ? ? }
>
> ? ? // X * undef -> undef
> - ? ?if (isa<UndefValue>(II->getOperand(2)))
> + ? ?if (isa<UndefValue>(II->getOperand(1)))
> ? ? ? return ReplaceInstUsesWith(CI, UndefValue::get(II->getType()));
>
> - ? ?if (ConstantInt *RHSI = dyn_cast<ConstantInt>(II->getOperand(2))) {
> + ? ?if (ConstantInt *RHSI = dyn_cast<ConstantInt>(II->getOperand(1))) {
> ? ? ? // X*0 -> {0, false}
> ? ? ? if (RHSI->isZero())
> ? ? ? ? return ReplaceInstUsesWith(CI, Constant::getNullValue(II->getType()));
> @@ -577,11 +574,11 @@
> ? ? ? // X * 1 -> {X, false}
> ? ? ? if (RHSI->equalsInt(1)) {
> ? ? ? ? Constant *V[] = {
> - ? ? ? ? ?UndefValue::get(II->getOperand(1)->getType()),
> + ? ? ? ? ?UndefValue::get(II->getOperand(0)->getType()),
> ? ? ? ? ? ConstantInt::getFalse(II->getContext())
> ? ? ? ? };
> ? ? ? ? Constant *Struct = ConstantStruct::get(II->getContext(), V, 2, false);
> - ? ? ? ?return InsertValueInst::Create(Struct, II->getOperand(1), 0);
> + ? ? ? ?return InsertValueInst::Create(Struct, II->getOperand(0), 0);
> ? ? ? }
> ? ? }
> ? ? break;
> @@ -592,8 +589,8 @@
> ? case Intrinsic::x86_sse2_loadu_dq:
> ? ? // Turn PPC lvx ? ? -> load if the pointer is known aligned.
> ? ? // Turn X86 loadups -> load if the pointer is known aligned.
> - ? ?if (GetOrEnforceKnownAlignment(II->getOperand(1), 16) >= 16) {
> - ? ? ?Value *Ptr = Builder->CreateBitCast(II->getOperand(1),
> + ? ?if (GetOrEnforceKnownAlignment(II->getOperand(0), 16) >= 16) {
> + ? ? ?Value *Ptr = Builder->CreateBitCast(II->getOperand(0),
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?PointerType::getUnqual(II->getType()));
> ? ? ? return new LoadInst(Ptr);
> ? ? }
> @@ -601,22 +598,22 @@
> ? case Intrinsic::ppc_altivec_stvx:
> ? case Intrinsic::ppc_altivec_stvxl:
> ? ? // Turn stvx -> store if the pointer is known aligned.
> - ? ?if (GetOrEnforceKnownAlignment(II->getOperand(2), 16) >= 16) {
> + ? ?if (GetOrEnforceKnownAlignment(II->getOperand(1), 16) >= 16) {
> ? ? ? const Type *OpPtrTy =
> - ? ? ? ?PointerType::getUnqual(II->getOperand(1)->getType());
> - ? ? ?Value *Ptr = Builder->CreateBitCast(II->getOperand(2), OpPtrTy);
> - ? ? ?return new StoreInst(II->getOperand(1), Ptr);
> + ? ? ? ?PointerType::getUnqual(II->getOperand(0)->getType());
> + ? ? ?Value *Ptr = Builder->CreateBitCast(II->getOperand(1), OpPtrTy);
> + ? ? ?return new StoreInst(II->getOperand(0), Ptr);
> ? ? }
> ? ? break;
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
>



From stoklund at 2pi.dk  Tue Apr 13 11:21:46 2010
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Tue, 13 Apr 2010 09:21:46 -0700
Subject: [llvm-commits] [llvm] r101130 -
	/llvm/trunk/lib/Support/Allocator.cpp
In-Reply-To: <20100413144152.129892A6C12C@llvm.org>
References: <20100413144152.129892A6C12C@llvm.org>
Message-ID: <B10F8B92-ED9C-4EB4-AC6E-7ABE3C8FD3C6@2pi.dk>


On Apr 13, 2010, at 7:41 AM, Benjamin Kramer wrote:
> 
> @@ -72,6 +70,8 @@
> /// Reset - Deallocate all but the current slab and reset the current pointer
> /// to the beginning of it, freeing all memory allocated so far.
> void BumpPtrAllocator::Reset() {
> +  if (!CurSlab) // Start a new slab if we didn't allocate one already.
> +    StartNewSlab();
>   DeallocateSlabs(CurSlab->NextPtr);
>   CurSlab->NextPtr = 0;
>   CurPtr = (char*)(CurSlab + 1);

Could you just return early here? I don't think Reset() need to allocate anything.





From benny.kra at googlemail.com  Tue Apr 13 11:38:07 2010
From: benny.kra at googlemail.com (Benjamin Kramer)
Date: Tue, 13 Apr 2010 16:38:07 -0000
Subject: [llvm-commits] [llvm] r101138 -
	/llvm/trunk/lib/Support/Allocator.cpp
Message-ID: <20100413163807.202C62A6C12C@llvm.org>

Author: d0k
Date: Tue Apr 13 11:38:06 2010
New Revision: 101138

URL: http://llvm.org/viewvc/llvm-project?rev=101138&view=rev
Log:
BumpPtrAllocator::Reset() doesn't need to allocate anything. (Thanks, Jakob)

Modified:
    llvm/trunk/lib/Support/Allocator.cpp

Modified: llvm/trunk/lib/Support/Allocator.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Allocator.cpp?rev=101138&r1=101137&r2=101138&view=diff
==============================================================================
--- llvm/trunk/lib/Support/Allocator.cpp (original)
+++ llvm/trunk/lib/Support/Allocator.cpp Tue Apr 13 11:38:06 2010
@@ -70,8 +70,8 @@
 /// Reset - Deallocate all but the current slab and reset the current pointer
 /// to the beginning of it, freeing all memory allocated so far.
 void BumpPtrAllocator::Reset() {
-  if (!CurSlab) // Start a new slab if we didn't allocate one already.
-    StartNewSlab();
+  if (!CurSlab)
+    return;
   DeallocateSlabs(CurSlab->NextPtr);
   CurSlab->NextPtr = 0;
   CurPtr = (char*)(CurSlab + 1);




From benny.kra at googlemail.com  Tue Apr 13 11:39:40 2010
From: benny.kra at googlemail.com (Benjamin Kramer)
Date: Tue, 13 Apr 2010 18:39:40 +0200
Subject: [llvm-commits] [llvm] r101130 -
	/llvm/trunk/lib/Support/Allocator.cpp
In-Reply-To: <B10F8B92-ED9C-4EB4-AC6E-7ABE3C8FD3C6@2pi.dk>
References: <20100413144152.129892A6C12C@llvm.org>
	<B10F8B92-ED9C-4EB4-AC6E-7ABE3C8FD3C6@2pi.dk>
Message-ID: <3A8E7270-9626-4AD7-A9AA-38FB83C0C360@gmail.com>


On 13.04.2010, at 18:21, Jakob Stoklund Olesen wrote:

> 
> On Apr 13, 2010, at 7:41 AM, Benjamin Kramer wrote:
>> 
>> @@ -72,6 +70,8 @@
>> /// Reset - Deallocate all but the current slab and reset the current pointer
>> /// to the beginning of it, freeing all memory allocated so far.
>> void BumpPtrAllocator::Reset() {
>> +  if (!CurSlab) // Start a new slab if we didn't allocate one already.
>> +    StartNewSlab();
>>  DeallocateSlabs(CurSlab->NextPtr);
>>  CurSlab->NextPtr = 0;
>>  CurPtr = (char*)(CurSlab + 1);
> 
> Could you just return early here? I don't think Reset() need to allocate anything.
> 

Sure *slaps head*

Thanks for the review, I changed the code in r101138.


From echristo at apple.com  Tue Apr 13 11:41:29 2010
From: echristo at apple.com (Eric Christopher)
Date: Tue, 13 Apr 2010 16:41:29 -0000
Subject: [llvm-commits] [llvm] r101139 -
	/llvm/trunk/lib/Transforms/Utils/BuildLibCalls.cpp
Message-ID: <20100413164129.898B62A6C12C@llvm.org>

Author: echristo
Date: Tue Apr 13 11:41:29 2010
New Revision: 101139

URL: http://llvm.org/viewvc/llvm-project?rev=101139&view=rev
Log:
Actually... return after the check for invalid input.

Modified:
    llvm/trunk/lib/Transforms/Utils/BuildLibCalls.cpp

Modified: llvm/trunk/lib/Transforms/Utils/BuildLibCalls.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/BuildLibCalls.cpp?rev=101139&r1=101138&r2=101139&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Utils/BuildLibCalls.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/BuildLibCalls.cpp Tue Apr 13 11:41:29 2010
@@ -478,6 +478,7 @@
         FT->getParamType(0) != Type::getInt8PtrTy(Context) ||
         !FT->getParamType(2)->isIntegerTy() ||
         FT->getParamType(3) != TD->getIntPtrType(Context))
+      return false;
     
     if (isFoldable(4, 3, false)) {
       Value *Ret = EmitStrNCpy(CI->getOperand(1), CI->getOperand(2),




From gohman at apple.com  Tue Apr 13 11:49:23 2010
From: gohman at apple.com (Dan Gohman)
Date: Tue, 13 Apr 2010 16:49:23 -0000
Subject: [llvm-commits] [llvm] r101141 -
	/llvm/trunk/lib/Analysis/ScalarEvolution.cpp
Message-ID: <20100413164923.3B7572A6C12C@llvm.org>

Author: djg
Date: Tue Apr 13 11:49:23 2010
New Revision: 101141

URL: http://llvm.org/viewvc/llvm-project?rev=101141&view=rev
Log:
Minor code micro-optimizations.

Modified:
    llvm/trunk/lib/Analysis/ScalarEvolution.cpp

Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=101141&r1=101140&r2=101141&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original)
+++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Tue Apr 13 11:49:23 2010
@@ -1698,15 +1698,15 @@
             return getAddExpr(NewOps);
         }
     }
+
+    if (Ops.size() == 1)
+      return Ops[0];
   }
 
   // Skip over the add expression until we get to a multiply.
   while (Idx < Ops.size() && Ops[Idx]->getSCEVType() < scMulExpr)
     ++Idx;
 
-  if (Ops.size() == 1)
-    return Ops[0];
-
   // If there are mul operands inline them all into this expression.
   if (Idx < Ops.size()) {
     bool DeletedMul = false;
@@ -2091,9 +2091,9 @@
       // maximum-int.
       return Ops[0];
     }
-  }
 
-  if (Ops.size() == 1) return Ops[0];
+    if (Ops.size() == 1) return Ops[0];
+  }
 
   // Find the first SMax
   while (Idx < Ops.size() && Ops[Idx]->getSCEVType() < scSMaxExpr)
@@ -2190,9 +2190,9 @@
       // maximum-int.
       return Ops[0];
     }
-  }
 
-  if (Ops.size() == 1) return Ops[0];
+    if (Ops.size() == 1) return Ops[0];
+  }
 
   // Find the first UMax
   while (Idx < Ops.size() && Ops[Idx]->getSCEVType() < scUMaxExpr)




From gohman at apple.com  Tue Apr 13 11:51:03 2010
From: gohman at apple.com (Dan Gohman)
Date: Tue, 13 Apr 2010 16:51:03 -0000
Subject: [llvm-commits] [llvm] r101142 - in /llvm/trunk:
 lib/Analysis/ScalarEvolution.cpp
 test/Transforms/IndVarSimplify/eliminate-max.ll
Message-ID: <20100413165103.98AD42A6C12C@llvm.org>

Author: djg
Date: Tue Apr 13 11:51:03 2010
New Revision: 101142

URL: http://llvm.org/viewvc/llvm-project?rev=101142&view=rev
Log:
Teach ScalarEvolution to simplify smax and umax when it can prove
that one operand is always greater than another.

Added:
    llvm/trunk/test/Transforms/IndVarSimplify/eliminate-max.ll
Modified:
    llvm/trunk/lib/Analysis/ScalarEvolution.cpp

Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=101142&r1=101141&r2=101142&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original)
+++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Tue Apr 13 11:51:03 2010
@@ -2117,7 +2117,13 @@
   // so, delete one.  Since we sorted the list, these values are required to
   // be adjacent.
   for (unsigned i = 0, e = Ops.size()-1; i != e; ++i)
-    if (Ops[i] == Ops[i+1]) {      //  X smax Y smax Y  -->  X smax Y
+    //  X smax Y smax Y  -->  X smax Y
+    //  X smax Y         -->  X, if X is always greater than Y
+    if (Ops[i] == Ops[i+1] ||
+        isKnownPredicate(ICmpInst::ICMP_SGE, Ops[i], Ops[i+1])) {
+      Ops.erase(Ops.begin()+i+1, Ops.begin()+i+2);
+      --i; --e;
+    } else if (isKnownPredicate(ICmpInst::ICMP_SLE, Ops[i], Ops[i+1])) {
       Ops.erase(Ops.begin()+i, Ops.begin()+i+1);
       --i; --e;
     }
@@ -2216,7 +2222,13 @@
   // so, delete one.  Since we sorted the list, these values are required to
   // be adjacent.
   for (unsigned i = 0, e = Ops.size()-1; i != e; ++i)
-    if (Ops[i] == Ops[i+1]) {      //  X umax Y umax Y  -->  X umax Y
+    //  X umax Y umax Y  -->  X umax Y
+    //  X umax Y         -->  X, if X is always greater than Y
+    if (Ops[i] == Ops[i+1] ||
+        isKnownPredicate(ICmpInst::ICMP_UGE, Ops[i], Ops[i+1])) {
+      Ops.erase(Ops.begin()+i+1, Ops.begin()+i+2);
+      --i; --e;
+    } else if (isKnownPredicate(ICmpInst::ICMP_ULE, Ops[i], Ops[i+1])) {
       Ops.erase(Ops.begin()+i, Ops.begin()+i+1);
       --i; --e;
     }

Added: llvm/trunk/test/Transforms/IndVarSimplify/eliminate-max.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IndVarSimplify/eliminate-max.ll?rev=101142&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/IndVarSimplify/eliminate-max.ll (added)
+++ llvm/trunk/test/Transforms/IndVarSimplify/eliminate-max.ll Tue Apr 13 11:51:03 2010
@@ -0,0 +1,52 @@
+; RUN: opt < %s -S -indvars | grep {= icmp} | count 3
+; PR4914.ll
+
+; Indvars should be able to do range analysis and eliminate icmps.
+; There are two here which cannot be eliminated.
+; There's one that icmp which can be eliminated and which indvars currently
+; cannot eliminate, because it requires analyzing more than just the
+; range of the induction variable.
+
+ at 0 = private constant [4 x i8] c"%d\0A\00", align 1 ; <[4 x i8]*> [#uses=1]
+
+define i32 @main() nounwind {
+bb:
+  br label %bb1
+
+bb1:                                              ; preds = %bb14, %bb
+  %t = phi i32 [ 0, %bb ], [ %t19, %bb14 ]        ; <i32> [#uses=5]
+  %t2 = phi i32 [ 0, %bb ], [ %t18, %bb14 ]       ; <i32> [#uses=1]
+  %t3 = icmp slt i32 %t, 0                        ; <i1> [#uses=1]
+  br i1 %t3, label %bb7, label %bb4
+
+bb4:                                              ; preds = %bb1
+  %t5 = icmp sgt i32 %t, 255                      ; <i1> [#uses=1]
+  %t6 = select i1 %t5, i32 255, i32 %t            ; <i32> [#uses=1]
+  br label %bb7
+
+bb7:                                              ; preds = %bb4, %bb1
+  %t8 = phi i32 [ %t6, %bb4 ], [ 0, %bb1 ]        ; <i32> [#uses=1]
+  %t9 = sub i32 0, %t                             ; <i32> [#uses=3]
+  %t10 = icmp slt i32 %t9, 0                      ; <i1> [#uses=1]
+  br i1 %t10, label %bb14, label %bb11
+
+bb11:                                             ; preds = %bb7
+  %t12 = icmp sgt i32 %t9, 255                    ; <i1> [#uses=1]
+  %t13 = select i1 %t12, i32 255, i32 %t9         ; <i32> [#uses=1]
+  br label %bb14
+
+bb14:                                             ; preds = %bb11, %bb7
+  %t15 = phi i32 [ %t13, %bb11 ], [ 0, %bb7 ]     ; <i32> [#uses=1]
+  %t16 = add nsw i32 %t2, 255                     ; <i32> [#uses=1]
+  %t17 = add nsw i32 %t16, %t8                    ; <i32> [#uses=1]
+  %t18 = add nsw i32 %t17, %t15                   ; <i32> [#uses=2]
+  %t19 = add nsw i32 %t, 1                        ; <i32> [#uses=2]
+  %t20 = icmp slt i32 %t19, 1000000000            ; <i1> [#uses=1]
+  br i1 %t20, label %bb1, label %bb21
+
+bb21:                                             ; preds = %bb14
+  %t22 = call i32 (i8*, ...)* @printf(i8* noalias getelementptr inbounds ([4 x i8]* @0, i32 0, i32 0), i32 %t18) nounwind
+  ret i32 0
+}
+
+declare i32 @printf(i8* noalias nocapture, ...) nounwind




From gohman at apple.com  Tue Apr 13 11:51:39 2010
From: gohman at apple.com (Dan Gohman)
Date: Tue, 13 Apr 2010 16:51:39 -0000
Subject: [llvm-commits] [llvm] r101143 - in /llvm/trunk:
 include/llvm/CodeGen/ScheduleDAG.h lib/CodeGen/ScheduleDAG.cpp
Message-ID: <20100413165139.6FA902A6C12C@llvm.org>

Author: djg
Date: Tue Apr 13 11:51:39 2010
New Revision: 101143

URL: http://llvm.org/viewvc/llvm-project?rev=101143&view=rev
Log:
Delete an unused member variable.

Modified:
    llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h
    llvm/trunk/lib/CodeGen/ScheduleDAG.cpp

Modified: llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h?rev=101143&r1=101142&r2=101143&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h (original)
+++ llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h Tue Apr 13 11:51:39 2010
@@ -459,7 +459,6 @@
     const TargetLowering *TLI;            // Target lowering info
     MachineFunction &MF;                  // Machine function
     MachineRegisterInfo &MRI;             // Virtual/real register map
-    MachineConstantPool *ConstPool;       // Target constant pool
     std::vector<SUnit*> Sequence;         // The schedule. Null SUnit*'s
                                           // represent noop instructions.
     std::vector<SUnit> SUnits;            // The scheduling units.

Modified: llvm/trunk/lib/CodeGen/ScheduleDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ScheduleDAG.cpp?rev=101143&r1=101142&r2=101143&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/ScheduleDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/ScheduleDAG.cpp Tue Apr 13 11:51:39 2010
@@ -29,7 +29,6 @@
     TRI(TM.getRegisterInfo()),
     TLI(TM.getTargetLowering()),
     MF(mf), MRI(mf.getRegInfo()),
-    ConstPool(MF.getConstantPool()),
     EntrySU(), ExitSU() {
 }
 




From gohman at apple.com  Tue Apr 13 11:53:51 2010
From: gohman at apple.com (Dan Gohman)
Date: Tue, 13 Apr 2010 16:53:51 -0000
Subject: [llvm-commits] [llvm] r101144 -
	/llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp
Message-ID: <20100413165351.9AB142A6C12C@llvm.org>

Author: djg
Date: Tue Apr 13 11:53:51 2010
New Revision: 101144

URL: http://llvm.org/viewvc/llvm-project?rev=101144&view=rev
Log:
Use MachineBasicBlock::isLiveIn.

Modified:
    llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp

Modified: llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp?rev=101144&r1=101143&r2=101144&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp Tue Apr 13 11:53:51 2010
@@ -656,15 +656,8 @@
 bool Thumb2SizeReduce::ReduceMBB(MachineBasicBlock &MBB) {
   bool Modified = false;
 
-  bool LiveCPSR = false;
   // Yes, CPSR could be livein.
-  for (MachineBasicBlock::const_livein_iterator I = MBB.livein_begin(),
-         E = MBB.livein_end(); I != E; ++I) {
-    if (*I == ARM::CPSR) {
-      LiveCPSR = true;
-      break;
-    }
-  }
+  bool LiveCPSR = MBB.isLiveIn(ARM::CPSR);
 
   MachineBasicBlock::iterator MII = MBB.begin(), E = MBB.end();
   MachineBasicBlock::iterator NextMII;




From gohman at apple.com  Tue Apr 13 11:55:37 2010
From: gohman at apple.com (Dan Gohman)
Date: Tue, 13 Apr 2010 16:55:37 -0000
Subject: [llvm-commits] [llvm] r101145 - in /llvm/trunk:
 include/llvm/CodeGen/MachineRegisterInfo.h
 lib/CodeGen/MachineRegisterInfo.cpp
Message-ID: <20100413165537.995EA2A6C12C@llvm.org>

Author: djg
Date: Tue Apr 13 11:55:37 2010
New Revision: 101145

URL: http://llvm.org/viewvc/llvm-project?rev=101145&view=rev
Log:
Move MachineRegisterInfo's isLiveIn and isLiveOut out of line.

Modified:
    llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h
    llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp

Modified: llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h?rev=101145&r1=101144&r2=101145&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h Tue Apr 13 11:55:37 2010
@@ -258,18 +258,8 @@
   liveout_iterator liveout_end()   const { return LiveOuts.end(); }
   bool             liveout_empty() const { return LiveOuts.empty(); }
 
-  bool isLiveIn(unsigned Reg) const {
-    for (livein_iterator I = livein_begin(), E = livein_end(); I != E; ++I)
-      if (I->first == Reg || I->second == Reg)
-        return true;
-    return false;
-  }
-  bool isLiveOut(unsigned Reg) const {
-    for (liveout_iterator I = liveout_begin(), E = liveout_end(); I != E; ++I)
-      if (*I == Reg)
-        return true;
-    return false;
-  }
+  bool isLiveIn(unsigned Reg) const;
+  bool isLiveOut(unsigned Reg) const;
 
 private:
   void HandleVRegListReallocation();

Modified: llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp?rev=101145&r1=101144&r2=101145&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp Tue Apr 13 11:55:37 2010
@@ -130,6 +130,20 @@
   return ++UI == use_nodbg_end();
 }
 
+bool MachineRegisterInfo::isLiveIn(unsigned Reg) const {
+  for (livein_iterator I = livein_begin(), E = livein_end(); I != E; ++I)
+    if (I->first == Reg || I->second == Reg)
+      return true;
+  return false;
+}
+
+bool MachineRegisterInfo::isLiveOut(unsigned Reg) const {
+  for (liveout_iterator I = liveout_begin(), E = liveout_end(); I != E; ++I)
+    if (*I == Reg)
+      return true;
+  return false;
+}
+
 #ifndef NDEBUG
 void MachineRegisterInfo::dumpUses(unsigned Reg) const {
   for (use_iterator I = use_begin(Reg), E = use_end(); I != E; ++I)




From gohman at apple.com  Tue Apr 13 11:56:46 2010
From: gohman at apple.com (Dan Gohman)
Date: Tue, 13 Apr 2010 16:56:46 -0000
Subject: [llvm-commits] [llvm] r101146 -
	/llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp
Message-ID: <20100413165646.0B9D62A6C12C@llvm.org>

Author: djg
Date: Tue Apr 13 11:56:45 2010
New Revision: 101146

URL: http://llvm.org/viewvc/llvm-project?rev=101146&view=rev
Log:
Rename MachineFrameInfo variables to MFI, for consistency with
the rest of CodeGen.

Modified:
    llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp

Modified: llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp?rev=101146&r1=101145&r2=101146&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp (original)
+++ llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Tue Apr 13 11:56:45 2010
@@ -131,10 +131,10 @@
 /// pseudo instructions.
 void PEI::calculateCallsInformation(MachineFunction &Fn) {
   const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
-  MachineFrameInfo *FFI = Fn.getFrameInfo();
+  MachineFrameInfo *MFI = Fn.getFrameInfo();
 
   unsigned MaxCallFrameSize = 0;
-  bool HasCalls = FFI->hasCalls();
+  bool HasCalls = MFI->hasCalls();
 
   // Get the function call frame set-up and tear-down instruction opcode
   int FrameSetupOpcode   = RegInfo->getCallFrameSetupOpcode();
@@ -162,8 +162,8 @@
         HasCalls = true;
       }
 
-  FFI->setHasCalls(HasCalls);
-  FFI->setMaxCallFrameSize(MaxCallFrameSize);
+  MFI->setHasCalls(HasCalls);
+  MFI->setMaxCallFrameSize(MaxCallFrameSize);
 
   for (std::vector<MachineBasicBlock::iterator>::iterator
          i = FrameSDOps.begin(), e = FrameSDOps.end(); i != e; ++i) {
@@ -184,7 +184,7 @@
 void PEI::calculateCalleeSavedRegisters(MachineFunction &Fn) {
   const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
   const TargetFrameInfo *TFI = Fn.getTarget().getFrameInfo();
-  MachineFrameInfo *FFI = Fn.getFrameInfo();
+  MachineFrameInfo *MFI = Fn.getFrameInfo();
 
   // Get the callee saved register list...
   const unsigned *CSRegs = RegInfo->getCalleeSavedRegs(&Fn);
@@ -255,19 +255,19 @@
       // the TargetRegisterClass if the stack alignment is smaller. Use the
       // min.
       Align = std::min(Align, StackAlign);
-      FrameIdx = FFI->CreateStackObject(RC->getSize(), Align, true);
+      FrameIdx = MFI->CreateStackObject(RC->getSize(), Align, true);
       if ((unsigned)FrameIdx < MinCSFrameIndex) MinCSFrameIndex = FrameIdx;
       if ((unsigned)FrameIdx > MaxCSFrameIndex) MaxCSFrameIndex = FrameIdx;
     } else {
       // Spill it to the stack where we must.
-      FrameIdx = FFI->CreateFixedObject(RC->getSize(), FixedSlot->Offset,
+      FrameIdx = MFI->CreateFixedObject(RC->getSize(), FixedSlot->Offset,
                                         true, false);
     }
 
     I->setFrameIdx(FrameIdx);
   }
 
-  FFI->setCalleeSavedInfo(CSI);
+  MFI->setCalleeSavedInfo(CSI);
 }
 
 /// insertCSRSpillsAndRestores - Insert spill and restore code for
@@ -275,10 +275,10 @@
 ///
 void PEI::insertCSRSpillsAndRestores(MachineFunction &Fn) {
   // Get callee saved register information.
-  MachineFrameInfo *FFI = Fn.getFrameInfo();
-  const std::vector<CalleeSavedInfo> &CSI = FFI->getCalleeSavedInfo();
+  MachineFrameInfo *MFI = Fn.getFrameInfo();
+  const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
 
-  FFI->setCalleeSavedInfoValid(true);
+  MFI->setCalleeSavedInfoValid(true);
 
   // Early exit if no callee saved registers are modified!
   if (CSI.empty())
@@ -436,14 +436,14 @@
 
 /// AdjustStackOffset - Helper function used to adjust the stack frame offset.
 static inline void
-AdjustStackOffset(MachineFrameInfo *FFI, int FrameIdx,
+AdjustStackOffset(MachineFrameInfo *MFI, int FrameIdx,
                   bool StackGrowsDown, int64_t &Offset,
                   unsigned &MaxAlign) {
   // If the stack grows down, add the object size to find the lowest address.
   if (StackGrowsDown)
-    Offset += FFI->getObjectSize(FrameIdx);
+    Offset += MFI->getObjectSize(FrameIdx);
 
-  unsigned Align = FFI->getObjectAlignment(FrameIdx);
+  unsigned Align = MFI->getObjectAlignment(FrameIdx);
 
   // If the alignment of this object is greater than that of the stack, then
   // increase the stack alignment to match.
@@ -453,10 +453,10 @@
   Offset = (Offset + Align - 1) / Align * Align;
 
   if (StackGrowsDown) {
-    FFI->setObjectOffset(FrameIdx, -Offset); // Set the computed offset
+    MFI->setObjectOffset(FrameIdx, -Offset); // Set the computed offset
   } else {
-    FFI->setObjectOffset(FrameIdx, Offset);
-    Offset += FFI->getObjectSize(FrameIdx);
+    MFI->setObjectOffset(FrameIdx, Offset);
+    Offset += MFI->getObjectSize(FrameIdx);
   }
 }
 
@@ -470,7 +470,7 @@
     TFI.getStackGrowthDirection() == TargetFrameInfo::StackGrowsDown;
 
   // Loop over all of the stack objects, assigning sequential addresses...
-  MachineFrameInfo *FFI = Fn.getFrameInfo();
+  MachineFrameInfo *MFI = Fn.getFrameInfo();
 
   // Start at the beginning of the local area.
   // The Offset is the distance from the stack top in the direction
@@ -487,17 +487,17 @@
   // We currently don't support filling in holes in between fixed sized
   // objects, so we adjust 'Offset' to point to the end of last fixed sized
   // preallocated object.
-  for (int i = FFI->getObjectIndexBegin(); i != 0; ++i) {
+  for (int i = MFI->getObjectIndexBegin(); i != 0; ++i) {
     int64_t FixedOff;
     if (StackGrowsDown) {
       // The maximum distance from the stack pointer is at lower address of
       // the object -- which is given by offset. For down growing stack
       // the offset is negative, so we negate the offset to get the distance.
-      FixedOff = -FFI->getObjectOffset(i);
+      FixedOff = -MFI->getObjectOffset(i);
     } else {
       // The maximum distance from the start pointer is at the upper
       // address of the object.
-      FixedOff = FFI->getObjectOffset(i) + FFI->getObjectSize(i);
+      FixedOff = MFI->getObjectOffset(i) + MFI->getObjectSize(i);
     }
     if (FixedOff > Offset) Offset = FixedOff;
   }
@@ -508,27 +508,27 @@
     for (unsigned i = MinCSFrameIndex; i <= MaxCSFrameIndex; ++i) {
       // If stack grows down, we need to add size of find the lowest
       // address of the object.
-      Offset += FFI->getObjectSize(i);
+      Offset += MFI->getObjectSize(i);
 
-      unsigned Align = FFI->getObjectAlignment(i);
+      unsigned Align = MFI->getObjectAlignment(i);
       // Adjust to alignment boundary
       Offset = (Offset+Align-1)/Align*Align;
 
-      FFI->setObjectOffset(i, -Offset);        // Set the computed offset
+      MFI->setObjectOffset(i, -Offset);        // Set the computed offset
     }
   } else {
     int MaxCSFI = MaxCSFrameIndex, MinCSFI = MinCSFrameIndex;
     for (int i = MaxCSFI; i >= MinCSFI ; --i) {
-      unsigned Align = FFI->getObjectAlignment(i);
+      unsigned Align = MFI->getObjectAlignment(i);
       // Adjust to alignment boundary
       Offset = (Offset+Align-1)/Align*Align;
 
-      FFI->setObjectOffset(i, Offset);
-      Offset += FFI->getObjectSize(i);
+      MFI->setObjectOffset(i, Offset);
+      Offset += MFI->getObjectSize(i);
     }
   }
 
-  unsigned MaxAlign = FFI->getMaxAlignment();
+  unsigned MaxAlign = MFI->getMaxAlignment();
 
   // Make sure the special register scavenging spill slot is closest to the
   // frame pointer if a frame pointer is required.
@@ -536,28 +536,28 @@
   if (RS && RegInfo->hasFP(Fn) && !RegInfo->needsStackRealignment(Fn)) {
     int SFI = RS->getScavengingFrameIndex();
     if (SFI >= 0)
-      AdjustStackOffset(FFI, SFI, StackGrowsDown, Offset, MaxAlign);
+      AdjustStackOffset(MFI, SFI, StackGrowsDown, Offset, MaxAlign);
   }
 
   // Make sure that the stack protector comes before the local variables on the
   // stack.
-  if (FFI->getStackProtectorIndex() >= 0)
-    AdjustStackOffset(FFI, FFI->getStackProtectorIndex(), StackGrowsDown,
+  if (MFI->getStackProtectorIndex() >= 0)
+    AdjustStackOffset(MFI, MFI->getStackProtectorIndex(), StackGrowsDown,
                       Offset, MaxAlign);
 
   // Then assign frame offsets to stack objects that are not used to spill
   // callee saved registers.
-  for (unsigned i = 0, e = FFI->getObjectIndexEnd(); i != e; ++i) {
+  for (unsigned i = 0, e = MFI->getObjectIndexEnd(); i != e; ++i) {
     if (i >= MinCSFrameIndex && i <= MaxCSFrameIndex)
       continue;
     if (RS && (int)i == RS->getScavengingFrameIndex())
       continue;
-    if (FFI->isDeadObjectIndex(i))
+    if (MFI->isDeadObjectIndex(i))
       continue;
-    if (FFI->getStackProtectorIndex() == (int)i)
+    if (MFI->getStackProtectorIndex() == (int)i)
       continue;
 
-    AdjustStackOffset(FFI, i, StackGrowsDown, Offset, MaxAlign);
+    AdjustStackOffset(MFI, i, StackGrowsDown, Offset, MaxAlign);
   }
 
   // Make sure the special register scavenging spill slot is closest to the
@@ -565,15 +565,15 @@
   if (RS && (!RegInfo->hasFP(Fn) || RegInfo->needsStackRealignment(Fn))) {
     int SFI = RS->getScavengingFrameIndex();
     if (SFI >= 0)
-      AdjustStackOffset(FFI, SFI, StackGrowsDown, Offset, MaxAlign);
+      AdjustStackOffset(MFI, SFI, StackGrowsDown, Offset, MaxAlign);
   }
 
   if (!RegInfo->targetHandlesStackFrameRounding()) {
     // If we have reserved argument space for call sites in the function
     // immediately on entry to the current function, count it as part of the
     // overall stack size.
-    if (FFI->hasCalls() && RegInfo->hasReservedCallFrame(Fn))
-      Offset += FFI->getMaxCallFrameSize();
+    if (MFI->hasCalls() && RegInfo->hasReservedCallFrame(Fn))
+      Offset += MFI->getMaxCallFrameSize();
 
     // Round up the size to a multiple of the alignment.  If the function has
     // any calls or alloca's, align to the target's StackAlignment value to
@@ -581,8 +581,8 @@
     // otherwise, for leaf functions, align to the TransientStackAlignment
     // value.
     unsigned StackAlign;
-    if (FFI->hasCalls() || FFI->hasVarSizedObjects() ||
-        (RegInfo->needsStackRealignment(Fn) && FFI->getObjectIndexEnd() != 0))
+    if (MFI->hasCalls() || MFI->hasVarSizedObjects() ||
+        (RegInfo->needsStackRealignment(Fn) && MFI->getObjectIndexEnd() != 0))
       StackAlign = TFI.getStackAlignment();
     else
       StackAlign = TFI.getTransientStackAlignment();
@@ -594,7 +594,7 @@
   }
 
   // Update frame info to pretend that this is part of the stack...
-  FFI->setStackSize(Offset - LocalAreaOffset);
+  MFI->setStackSize(Offset - LocalAreaOffset);
 }
 
 




From gohman at apple.com  Tue Apr 13 11:57:55 2010
From: gohman at apple.com (Dan Gohman)
Date: Tue, 13 Apr 2010 16:57:55 -0000
Subject: [llvm-commits] [llvm] r101147 - in /llvm/trunk:
 include/llvm/CodeGen/MachineBasicBlock.h
 lib/CodeGen/LiveIntervalAnalysis.cpp lib/CodeGen/LiveVariables.cpp
 lib/CodeGen/MachineBasicBlock.cpp lib/CodeGen/MachineLICM.cpp
 lib/CodeGen/MachineVerifier.cpp lib/CodeGen/RegisterScavenging.cpp
 lib/Target/X86/SSEDomainFix.cpp
Message-ID: <20100413165755.572832A6C12C@llvm.org>

Author: djg
Date: Tue Apr 13 11:57:55 2010
New Revision: 101147

URL: http://llvm.org/viewvc/llvm-project?rev=101147&view=rev
Log:
Eliminate MachineBasicBlock::const_livein_iterator and make
MachineBasicBlock::livein_iterator a const_iterator, because
clients shouldn't ever be using the iterator interface to
mutate the livein set.

Modified:
    llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h
    llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
    llvm/trunk/lib/CodeGen/LiveVariables.cpp
    llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp
    llvm/trunk/lib/CodeGen/MachineLICM.cpp
    llvm/trunk/lib/CodeGen/MachineVerifier.cpp
    llvm/trunk/lib/CodeGen/RegisterScavenging.cpp
    llvm/trunk/lib/Target/X86/SSEDomainFix.cpp

Modified: llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h?rev=101147&r1=101146&r2=101147&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineBasicBlock.h Tue Apr 13 11:57:55 2010
@@ -201,12 +201,9 @@
 
   // Iteration support for live in sets.  These sets are kept in sorted
   // order by their register number.
-  typedef std::vector<unsigned>::iterator       livein_iterator;
-  typedef std::vector<unsigned>::const_iterator const_livein_iterator;
-  livein_iterator       livein_begin()       { return LiveIns.begin(); }
-  const_livein_iterator livein_begin() const { return LiveIns.begin(); }
-  livein_iterator       livein_end()         { return LiveIns.end(); }
-  const_livein_iterator livein_end()   const { return LiveIns.end(); }
+  typedef std::vector<unsigned>::const_iterator livein_iterator;
+  livein_iterator livein_begin() const { return LiveIns.begin(); }
+  livein_iterator livein_end()   const { return LiveIns.end(); }
   bool            livein_empty() const { return LiveIns.empty(); }
 
   /// getAlignment - Return alignment of the basic block.

Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=101147&r1=101146&r2=101147&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Tue Apr 13 11:57:55 2010
@@ -668,7 +668,7 @@
     DEBUG(dbgs() << MBB->getName() << ":\n");
 
     // Create intervals for live-ins to this BB first.
-    for (MachineBasicBlock::const_livein_iterator LI = MBB->livein_begin(),
+    for (MachineBasicBlock::livein_iterator LI = MBB->livein_begin(),
            LE = MBB->livein_end(); LI != LE; ++LI) {
       handleLiveInRegister(MBB, MIIndex, getOrCreateInterval(*LI));
       // Multiple live-ins can alias the same register.

Modified: llvm/trunk/lib/CodeGen/LiveVariables.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveVariables.cpp?rev=101147&r1=101146&r2=101147&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LiveVariables.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveVariables.cpp Tue Apr 13 11:57:55 2010
@@ -531,7 +531,7 @@
 
     // Mark live-in registers as live-in.
     SmallVector<unsigned, 4> Defs;
-    for (MachineBasicBlock::const_livein_iterator II = MBB->livein_begin(),
+    for (MachineBasicBlock::livein_iterator II = MBB->livein_begin(),
            EE = MBB->livein_end(); II != EE; ++II) {
       assert(TargetRegisterInfo::isPhysicalRegister(*II) &&
              "Cannot have a live-in virtual register!");

Modified: llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp?rev=101147&r1=101146&r2=101147&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp Tue Apr 13 11:57:55 2010
@@ -191,7 +191,7 @@
   const TargetRegisterInfo *TRI = MF->getTarget().getRegisterInfo();  
   if (!livein_empty()) {
     OS << "    Live Ins:";
-    for (const_livein_iterator I = livein_begin(),E = livein_end(); I != E; ++I)
+    for (livein_iterator I = livein_begin(),E = livein_end(); I != E; ++I)
       OutputReg(OS, *I, TRI);
     OS << '\n';
   }
@@ -218,13 +218,14 @@
 }
 
 void MachineBasicBlock::removeLiveIn(unsigned Reg) {
-  livein_iterator I = std::find(livein_begin(), livein_end(), Reg);
-  assert(I != livein_end() && "Not a live in!");
+  std::vector<unsigned>::iterator I =
+    std::find(LiveIns.begin(), LiveIns.end(), Reg);
+  assert(I != LiveIns.end() && "Not a live in!");
   LiveIns.erase(I);
 }
 
 bool MachineBasicBlock::isLiveIn(unsigned Reg) const {
-  const_livein_iterator I = std::find(livein_begin(), livein_end(), Reg);
+  livein_iterator I = std::find(livein_begin(), livein_end(), Reg);
   return I != livein_end();
 }
 

Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=101147&r1=101146&r2=101147&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Tue Apr 13 11:57:55 2010
@@ -360,7 +360,7 @@
     // Conservatively treat live-in's as an external def.
     // FIXME: That means a reload that're reused in successor block(s) will not
     // be LICM'ed.
-    for (MachineBasicBlock::const_livein_iterator I = BB->livein_begin(),
+    for (MachineBasicBlock::livein_iterator I = BB->livein_begin(),
            E = BB->livein_end(); I != E; ++I) {
       unsigned Reg = *I;
       ++PhysRegDefs[Reg];

Modified: llvm/trunk/lib/CodeGen/MachineVerifier.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineVerifier.cpp?rev=101147&r1=101146&r2=101147&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineVerifier.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineVerifier.cpp Tue Apr 13 11:57:55 2010
@@ -470,7 +470,7 @@
   }
 
   regsLive.clear();
-  for (MachineBasicBlock::const_livein_iterator I = MBB->livein_begin(),
+  for (MachineBasicBlock::livein_iterator I = MBB->livein_begin(),
          E = MBB->livein_end(); I != E; ++I) {
     if (!TargetRegisterInfo::isPhysicalRegister(*I)) {
       report("MBB live-in list contains non-physical register", MBB);

Modified: llvm/trunk/lib/CodeGen/RegisterScavenging.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterScavenging.cpp?rev=101147&r1=101146&r2=101147&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegisterScavenging.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Tue Apr 13 11:57:55 2010
@@ -64,7 +64,7 @@
     return;
 
   // Live-in registers are in use.
-  for (MachineBasicBlock::const_livein_iterator I = MBB->livein_begin(),
+  for (MachineBasicBlock::livein_iterator I = MBB->livein_begin(),
          E = MBB->livein_end(); I != E; ++I)
     setUsed(*I);
 

Modified: llvm/trunk/lib/Target/X86/SSEDomainFix.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/SSEDomainFix.cpp?rev=101147&r1=101146&r2=101147&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/SSEDomainFix.cpp (original)
+++ llvm/trunk/lib/Target/X86/SSEDomainFix.cpp Tue Apr 13 11:57:55 2010
@@ -270,7 +270,7 @@
 
 void SSEDomainFixPass::enterBasicBlock() {
   // Try to coalesce live-out registers from predecessors.
-  for (MachineBasicBlock::const_livein_iterator i = MBB->livein_begin(),
+  for (MachineBasicBlock::livein_iterator i = MBB->livein_begin(),
          e = MBB->livein_end(); i != e; ++i) {
     int rx = RegIndex(*i);
     if (rx < 0) continue;




From gohman at apple.com  Tue Apr 13 12:07:06 2010
From: gohman at apple.com (Dan Gohman)
Date: Tue, 13 Apr 2010 17:07:06 -0000
Subject: [llvm-commits] [llvm] r101148 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
Message-ID: <20100413170706.88FB32A6C12C@llvm.org>

Author: djg
Date: Tue Apr 13 12:07:06 2010
New Revision: 101148

URL: http://llvm.org/viewvc/llvm-project?rev=101148&view=rev
Log:
Add a few comments.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp?rev=101148&r1=101147&r2=101148&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp Tue Apr 13 12:07:06 2010
@@ -94,9 +94,11 @@
     Reg =
       getRegForValue(Constant::getNullValue(TD.getIntPtrType(V->getContext())));
   } else if (ConstantFP *CF = dyn_cast<ConstantFP>(V)) {
+    // Try to emit the constant directly.
     Reg = FastEmit_f(VT, VT, ISD::ConstantFP, CF);
 
     if (!Reg) {
+      // Try to emit the constant by using an integer constant with a cast.
       const APFloat &Flt = CF->getValueAPF();
       EVT IntVT = TLI.getPointerTy();
 
@@ -320,6 +322,7 @@
   Function *F = cast<CallInst>(I)->getCalledFunction();
   if (!F) return false;
 
+  // Handle selected intrinsic function calls.
   unsigned IID = F->getIntrinsicID();
   switch (IID) {
   default: break;
@@ -440,6 +443,8 @@
     break;
   }
   }
+
+  // An arbitrary call. Bail.
   return false;
 }
 




From malloc at inode.at  Tue Apr 13 13:13:55 2010
From: malloc at inode.at (Marius Wachtler)
Date: Tue, 13 Apr 2010 20:13:55 +0200
Subject: [llvm-commits] [PATCH] Teach llvm-mc to respect x86-asm-syntax
Message-ID: <o2n3838f7f11004131113gb60bba1egdb17aaffdbff9809@mail.gmail.com>

Hi all,

with this patch llvm-mc respects the assembler dialect when printing
instructions.


Before:

malloc at deadcode:~/dev/llvm_trunk/debug_make/Debug/bin$ ./llvm-mc
-x86-asm-syntax=intel --disassemble
0x48 0x83 0xEC 0x08
subq $8, %rsp


With patch:

malloc at deadcode:~/dev/llvm_trunk/debug_make/Debug/bin$ ./llvm-mc
-x86-asm-syntax=intel --disassemble
0x48 0x83 0xEC 0x08
sub RSP, 8

-- Marius Wachtler
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From gohman at apple.com  Tue Apr 13 13:15:08 2010
From: gohman at apple.com (Dan Gohman)
Date: Tue, 13 Apr 2010 11:15:08 -0700
Subject: [llvm-commits] [llvm] r101075 - in /llvm/trunk:
	lib/Target/X86/X86InstrInfo.cpp test/CodeGen/X86/brcond.ll
In-Reply-To: <EDBE6564-41D5-434E-A1AE-11C089E34F1C@gmail.com>
References: <20100412221957.EBF8A2A6C12C@llvm.org>
	<000E7360-B5FF-460E-80EF-F8A69D74C0DF@apple.com>
	<26E362DF-1C47-4A0C-B259-0A6AFC5E5B37@apple.com>
	<FCDEA618-97D0-457D-AB36-E695A89C0D62@apple.com>
	<1670CEA8-B035-4FCA-B5A6-549664FC826C@apple.com>
	<C39AC7F0-E69E-491F-A65E-FE5CFC9ED74E@apple.com>
	<667DBFC7-8ED4-4C68-AC13-9468E25031EB@gmail.com>
	<FB543B92-067C-4DC9-B92C-7C91959CE4C9@apple.com>
	<EDBE6564-41D5-434E-A1AE-11C089E34F1C@gmail.com>
Message-ID: <35DC7D63-E50B-4BD1-9EC0-E998BC677B0B@apple.com>


On Apr 13, 2010, at 2:01 AM, Bill Wendling wrote:

> On Apr 12, 2010, at 7:20 PM, Evan Cheng wrote:
> 
>>> The problem lies in this bit of code in X86InstrInfo::AnalyzeBranch:
>>> 
>>>     // If they differ, see if they fit one of the known patterns. Theoretically,                                                                                        
>>>     // we could handle more patterns here, but we shouldn't expect to see them                                                                                          
>>>     // if instruction selection has done a reasonable job.                                                                                                              
>>>     if ((OldBranchCode == X86::COND_NP &&
>>>          BranchCode == X86::COND_E) ||
>>>         (OldBranchCode == X86::COND_E &&
>>>          BranchCode == X86::COND_NP))
>>>       BranchCode = X86::COND_NP_OR_E;
>>>     else if ((OldBranchCode == X86::COND_P &&
>>>               BranchCode == X86::COND_NE) ||
>>>              (OldBranchCode == X86::COND_NE &&
>>>               BranchCode == X86::COND_P))
>>>       BranchCode = X86::COND_NE_OR_P;
>>>     else
>>>       return true;
>>> 
>>> When the code in BranchFolding calls "ReverseBranchCondition", the X86 back-end isn't able to handle it. So it doesn't change the branch conditions.
>>> 
>>> If you look for the bits of code that handle COND_NP_OR_E and COND_NE_OR_P there doesn't seem to be any optimizations done with them. X86InstrInfo::InsertBranch looks at them and inserts two branches.
>>> 
>>> What is the rationale behind converting a JE/JNP and JNE/JP into COND_NE_OR_P and COND_NP_OR_E?
>> 
>> I think these are used to merge two conditional branches into one and split them back out again later. It seems like a hack to allow AnalyzeBranch to handle BB with two conditional branches. They correspond to OEQ and UNE.
>> 
>> Is it possible to teach ReverseBranchCondition to do the right thing? Ain't OEQ the reverse of UNE and vice versa?
>> 
> It looks like I can safely teach GetOppositeBranchCondition to return the opposite for the two COND_* above. We do have an interesting case, though. If I change the original code to "une" instead of "oeq" like this:
> 
> define float @func2(float %x, float %y) nounwind readnone optsize ssp {
> entry:
>   %0 = fpext float %x to double                   ; <double> [#uses=1]
>   %1 = fpext float %y to double                   ; <double> [#uses=1]
>   %2 = fmul double %0, %1                         ; <double> [#uses=3]
>   %3 = fcmp une double %2, 0.000000e+00           ; <i1> [#uses=1]
>   br i1 %3, label %bb2, label %bb1
> 
> bb1:                                              ; preds = %entry
>   %4 = fadd double %2, -1.000000e+00              ; <double> [#uses=1]
>   br label %bb2
> 
> bb2:                                              ; preds = %entry, %bb1
>   %.0.in = phi double [ %4, %bb1 ], [ %2, %entry ] ; <double> [#uses=1]
>   %.0 = fptrunc double %.0.in to float            ; <float> [#uses=1]
>   ret float %.0
> }
> 
> Then we generate this for the "fcmp une ..."
> 
> 	%AL<def> = SETNPr %EFLAGS<imp-use>
> 	%CL<def> = SETEr %EFLAGS<imp-use,kill>
> 	TEST8rr %CL<kill>, %AL<kill>, %EFLAGS<imp-def>
> 	JE_4 <BB#2>, %EFLAGS<imp-use>
> 
> Ick. I suppose we should instead be generating?
> 
> 	JNP_4 <BB#2>, %EFLAGS<imp-use>
> 	JE_4 <BB#2>, %EFLAGS<imp-use>

This isn't equivalent. The first version jumps only if both conditions are
true, the second if either one is true.

Dan




From evan.cheng at apple.com  Tue Apr 13 13:16:00 2010
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 13 Apr 2010 18:16:00 -0000
Subject: [llvm-commits] [llvm] r101154 -
	/llvm/trunk/lib/CodeGen/MachineLICM.cpp
Message-ID: <20100413181600.EE1562A6C12C@llvm.org>

Author: evancheng
Date: Tue Apr 13 13:16:00 2010
New Revision: 101154

URL: http://llvm.org/viewvc/llvm-project?rev=101154&view=rev
Log:
Teach postra machine licm to hoist more obvious invariants, e.g. instructions with no source operands.

Modified:
    llvm/trunk/lib/CodeGen/MachineLICM.cpp

Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=101154&r1=101153&r2=101154&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Tue Apr 13 13:16:00 2010
@@ -101,10 +101,10 @@
     /// CandidateInfo - Keep track of information about hoisting candidates.
     struct CandidateInfo {
       MachineInstr *MI;
-      int           FI;
       unsigned      Def;
-      CandidateInfo(MachineInstr *mi, int fi, unsigned def)
-        : MI(mi), FI(fi), Def(def) {}
+      int           FI;
+      CandidateInfo(MachineInstr *mi, unsigned def, int fi)
+        : MI(mi), Def(def), FI(fi) {}
     };
 
     /// HoistRegionPostRA - Walk the specified region of the CFG and hoist loop
@@ -127,6 +127,11 @@
     void AddToLiveIns(unsigned Reg,
                       MachineBasicBlock *MBB, MachineBasicBlock *LoopHeader);    
 
+    /// IsLICMCandidate - Returns true if the instruction may be a suitable
+    /// candidate for LICM. e.g. If the instruction is a call, then it's obviously
+    /// not safe to hoist it.
+    bool IsLICMCandidate(MachineInstr &I);
+
     /// IsLoopInvariantInst - Returns true if the instruction is loop
     /// invariant. I.e., all virtual register operands are defined outside of
     /// the loop, physical registers aren't accessed (explicitly or implicitly),
@@ -271,6 +276,7 @@
                             SmallSet<int, 32> &StoredFIs,
                             SmallVector<CandidateInfo, 32> &Candidates) {
   bool RuledOut = false;
+  bool HasRegFIUse = false;
   unsigned Def = 0;
   for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
     const MachineOperand &MO = MI->getOperand(i);
@@ -281,6 +287,7 @@
           MFI->isSpillSlotObjectIndex(FI) &&
           InstructionStoresToFI(MI, FI))
         StoredFIs.insert(FI);
+      HasRegFIUse = true;
       continue;
     }
 
@@ -292,8 +299,10 @@
     assert(TargetRegisterInfo::isPhysicalRegister(Reg) &&
            "Not expecting virtual register!");
 
-    if (!MO.isDef())
+    if (!MO.isDef()) {
+      HasRegFIUse = true;
       continue;
+    }
 
     if (MO.isImplicit()) {
       ++PhysRegDefs[Reg];
@@ -325,13 +334,15 @@
         RuledOut = true;
   }
 
-  // FIXME: Only consider reloads for now. We should be able to handle
-  // remats which does not have register operands.
+  // Only consider reloads for now and remats which do not have register
+  // operands. FIXME: Consider unfold load folding instructions.
   if (Def && !RuledOut) {
-    int FI;
-    if (TII->isLoadFromStackSlot(MI, FI) &&
-        MFI->isSpillSlotObjectIndex(FI))
-      Candidates.push_back(CandidateInfo(MI, FI, Def));
+    int FI = INT_MIN;
+    // FIXME: Also hoist instructions if all source operands are live in
+    // to the loop.
+    if ((!HasRegFIUse && IsLICMCandidate(*MI)) ||
+        (TII->isLoadFromStackSlot(MI, FI) && MFI->isSpillSlotObjectIndex(FI)))
+      Candidates.push_back(CandidateInfo(MI, Def, FI));
   }
 }
 
@@ -385,7 +396,8 @@
   // 2. If the candidate is a load from stack slot (always true for now),
   //    check if the slot is stored anywhere in the loop.
   for (unsigned i = 0, e = Candidates.size(); i != e; ++i) {
-    if (StoredFIs.count(Candidates[i].FI))
+    if (Candidates[i].FI != INT_MIN &&
+        StoredFIs.count(Candidates[i].FI))
       continue;
 
     if (PhysRegDefs[Candidates[i].Def] == 1)
@@ -470,12 +482,10 @@
     HoistRegion(Children[I]);
 }
 
-/// IsLoopInvariantInst - Returns true if the instruction is loop
-/// invariant. I.e., all virtual register operands are defined outside of the
-/// loop, physical registers aren't accessed explicitly, and there are no side
-/// effects that aren't captured by the operands or other flags.
-/// 
-bool MachineLICM::IsLoopInvariantInst(MachineInstr &I) {
+/// IsLICMCandidate - Returns true if the instruction may be a suitable
+/// candidate for LICM. e.g. If the instruction is a call, then it's obviously
+/// not safe to hoist it.
+bool MachineLICM::IsLICMCandidate(MachineInstr &I) {
   const TargetInstrDesc &TID = I.getDesc();
   
   // Ignore stuff that we obviously can't hoist.
@@ -493,6 +503,17 @@
       // This is a trivial form of alias analysis.
       return false;
   }
+  return true;
+}
+
+/// IsLoopInvariantInst - Returns true if the instruction is loop
+/// invariant. I.e., all virtual register operands are defined outside of the
+/// loop, physical registers aren't accessed explicitly, and there are no side
+/// effects that aren't captured by the operands or other flags.
+/// 
+bool MachineLICM::IsLoopInvariantInst(MachineInstr &I) {
+  if (!IsLICMCandidate(I))
+    return false;
 
   // The instruction is loop invariant if all of its operands are.
   for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i) {




From kremenek at apple.com  Tue Apr 13 13:37:52 2010
From: kremenek at apple.com (Ted Kremenek)
Date: Tue, 13 Apr 2010 11:37:52 -0700
Subject: [llvm-commits] [llvm] r101072 - in /llvm/trunk/tools: Makefile
	edis/Makefile
In-Reply-To: <20100412215549.C74EF2A6C12C@llvm.org>
References: <20100412215549.C74EF2A6C12C@llvm.org>
Message-ID: <AE42CEE4-8773-4855-8CA1-E738164EB5F3@apple.com>

The CMake build needs to be updated as well.  The CMake build is now broken.  I'll see if I can fix it.

On Apr 12, 2010, at 2:55 PM, Sean Callanan wrote:

> Author: spyffe
> Date: Mon Apr 12 16:55:49 2010
> New Revision: 101072
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=101072&view=rev
> Log:
> Build system fixes.  llvm-mc depends on
> libEnhancedDisassembly, so we now build the
> static library in all cases (although the shared
> library is only built when requested/possible).
> 
> Also, fixed a bug where edis wasn't properly
> initializing the targets it uses.
> 
> Modified:
>    llvm/trunk/tools/Makefile
>    llvm/trunk/tools/edis/Makefile
> 
> Modified: llvm/trunk/tools/Makefile
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/Makefile?rev=101072&r1=101071&r2=101072&view=diff
> ==============================================================================
> --- llvm/trunk/tools/Makefile (original)
> +++ llvm/trunk/tools/Makefile Mon Apr 12 16:55:49 2010
> @@ -15,7 +15,10 @@
> # NOTE: The tools are organized into five groups of four consisting of one
> # large and three small executables. This is done to minimize memory load
> # in parallel builds.  Please retain this ordering.
> -DIRS := llvm-config
> +
> +# libEnhancedDisassembly must be built ahead of llvm-mc
> +# because llvm-mc links against libEnhancedDisassembly
> +DIRS := llvm-config edis
> PARALLEL_DIRS := opt llvm-as llvm-dis \
>                  llc llvm-ranlib llvm-ar llvm-nm \
>                  llvm-ld llvm-prof llvm-link \
> @@ -36,10 +39,6 @@
> ifeq ($(ENABLE_PIC),1)
>   # No support for dynamic libraries on windows targets.
>   ifneq ($(TARGET_OS), $(filter $(TARGET_OS), Cygwin MingW))
> -    # libEnhancedDisassembly must be built ahead of llvm-mc
> -    # because llvm-mc links against libEnhancedDisassembly
> -    DIRS += edis
> -
>     # gold only builds if binutils is around.  It requires "lto" to build before
>     # it so it is added to DIRS.
>     ifdef BINUTILS_INCDIR
> @@ -50,11 +49,6 @@
>   endif
> endif
> 
> -# Only build edis if X86 target support is enabled.
> -ifeq ($(filter $(TARGETS_TO_BUILD), X86),)
> -  PARALLEL_DIRS := $(filter-out edis, $(PARALLEL_DIRS))
> -endif
> -
> # Don't build edis if we explicitly disabled it.
> ifeq ($(DISABLE_EDIS),1)
>   PARALLEL_DIRS := $(filter-out edis, $(PARALLEL_DIRS))
> 
> Modified: llvm/trunk/tools/edis/Makefile
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/edis/Makefile?rev=101072&r1=101071&r2=101072&view=diff
> ==============================================================================
> --- llvm/trunk/tools/edis/Makefile (original)
> +++ llvm/trunk/tools/edis/Makefile Mon Apr 12 16:55:49 2010
> @@ -17,8 +17,12 @@
> # early so we can set up LINK_COMPONENTS before including Makefile.rules
> include $(LEVEL)/Makefile.config
> 
> -LINK_LIBS_IN_SHARED = 1
> -SHARED_LIBRARY = 1
> +ifeq ($(ENABLE_PIC),1)
> +    ifneq ($(TARGET_OS), $(filter $(TARGET_OS), Cygwin MingW))
> +	LINK_LIBS_IN_SHARED = 1
> +	SHARED_LIBRARY = 1
> +    endif
> +endif
> 
> LINK_COMPONENTS := $(TARGETS_TO_BUILD) x86asmprinter x86disassembler
> 
> @@ -55,8 +59,7 @@
> 	EDIS_DEFINES := $(EDIS_DEFINES) -DEDIS_ARM
> endif
> 
> -CXXFLAGS := $(CXXFLAGS) 
> -#$(EDIS_DEFINES)
> +CXXFLAGS := $(CXXFLAGS) $(EDIS_DEFINES)
> 
> EDInfo.inc:	$(TBLGEN)
> 	$(Echo) "Building semantic information header"
> 
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits




From bob.wilson at apple.com  Tue Apr 13 13:37:58 2010
From: bob.wilson at apple.com (Bob Wilson)
Date: Tue, 13 Apr 2010 18:37:58 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r101157 -
	/llvm-gcc-4.2/trunk/configure.in
Message-ID: <20100413183758.E3D8A2A6C12C@llvm.org>

Author: bwilson
Date: Tue Apr 13 13:37:58 2010
New Revision: 101157

URL: http://llvm.org/viewvc/llvm-project?rev=101157&view=rev
Log:
Preserve the original behavior of --with-build-sysroot for non-Darwin systems.

Modified:
    llvm-gcc-4.2/trunk/configure.in

Modified: llvm-gcc-4.2/trunk/configure.in
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/configure.in?rev=101157&r1=101156&r2=101157&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/configure.in (original)
+++ llvm-gcc-4.2/trunk/configure.in Tue Apr 13 13:37:58 2010
@@ -1524,8 +1524,13 @@
   [  --with-build-sysroot=sysroot
                           use sysroot as the system root during the build],
   [if test x"$withval" != x ; then
+     # LLVM LOCAL begin Keep original --sysroot usage for non-Darwin targets.
+     case "${target}" in
      # APPLE LOCAL 7852964 Use -isysroot instead of --sysroot.
-     SYSROOT_CFLAGS_FOR_TARGET="-isysroot $withval"
+     *-*-darwin*) SYSROOT_CFLAGS_FOR_TARGET="-isysroot $withval" ;;
+     *) SYSROOT_CFLAGS_FOR_TARGET="--sysroot=$withval" ;;
+     esac
+     # LLVM LOCAL end Keep original --sysroot usage for non-Darwin targets.
    fi],
   [SYSROOT_CFLAGS_FOR_TARGET=])
 AC_SUBST(SYSROOT_CFLAGS_FOR_TARGET)




From echristo at apple.com  Tue Apr 13 13:37:58 2010
From: echristo at apple.com (Eric Christopher)
Date: Tue, 13 Apr 2010 18:37:58 -0000
Subject: [llvm-commits] [llvm] r101158 - in /llvm/trunk:
 lib/Target/X86/X86InstrInfo.cpp test/CodeGen/X86/brcond.ll
Message-ID: <20100413183759.0C0532A6C12D@llvm.org>

Author: echristo
Date: Tue Apr 13 13:37:58 2010
New Revision: 101158

URL: http://llvm.org/viewvc/llvm-project?rev=101158&view=rev
Log:
Temporarily revert r101075, it's causing invalid iterator assertions
in a nightly tester.

Modified:
    llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
    llvm/trunk/test/CodeGen/X86/brcond.ll

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=101158&r1=101157&r2=101158&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Tue Apr 13 13:37:58 2010
@@ -1684,7 +1684,6 @@
   // Start from the bottom of the block and work up, examining the
   // terminator instructions.
   MachineBasicBlock::iterator I = MBB.end();
-  MachineBasicBlock::iterator UnCondBrIter = MBB.end();
   while (I != MBB.begin()) {
     --I;
     if (I->isDebugValue())
@@ -1702,8 +1701,6 @@
 
     // Handle unconditional branches.
     if (I->getOpcode() == X86::JMP_4) {
-      UnCondBrIter = I;
-
       if (!AllowModify) {
         TBB = I->getOperand(0).getMBB();
         continue;
@@ -1721,11 +1718,10 @@
         TBB = 0;
         I->eraseFromParent();
         I = MBB.end();
-        UnCondBrIter = MBB.end();
         continue;
       }
 
-      // TBB is used to indicate the unconditional destination.
+      // TBB is used to indicate the unconditinal destination.
       TBB = I->getOperand(0).getMBB();
       continue;
     }
@@ -1737,48 +1733,7 @@
 
     // Working from the bottom, handle the first conditional branch.
     if (Cond.empty()) {
-      MachineBasicBlock *TargetBB = I->getOperand(0).getMBB();
-      if (AllowModify && UnCondBrIter != MBB.end() &&
-          MBB.isLayoutSuccessor(TargetBB)) {
-        // If we can modify the code and it ends in something like:
-        //
-        //     jCC L1
-        //     jmp L2
-        //   L1:
-        //     ...
-        //   L2:
-        //
-        // Then we can change this to:
-        //
-        //     jnCC L2
-        //   L1:
-        //     ...
-        //   L2:
-        //
-        // Which is a bit more efficient.
-        // We conditionally jump to the fall-through block.
-        BranchCode = GetOppositeBranchCondition(BranchCode);
-        unsigned JNCC = GetCondBranchFromCond(BranchCode);
-        MachineBasicBlock::iterator OldInst = I;
-        --I;
-
-        BuildMI(MBB, UnCondBrIter, MBB.findDebugLoc(I), get(JNCC))
-          .addMBB(UnCondBrIter->getOperand(0).getMBB());
-        BuildMI(MBB, UnCondBrIter, MBB.findDebugLoc(I), get(X86::JMP_4))
-          .addMBB(TargetBB);
-        MBB.addSuccessor(TargetBB);
-
-        OldInst->eraseFromParent();
-        UnCondBrIter->eraseFromParent();
-
-        // Restart the analysis.
-        UnCondBrIter = MBB.end();
-        I = MBB.end();
-        continue;
-      }
-
       FBB = TBB;
-      TBB = TargetBB;
       TBB = I->getOperand(0).getMBB();
       Cond.push_back(MachineOperand::CreateImm(BranchCode));
       continue;

Modified: llvm/trunk/test/CodeGen/X86/brcond.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/brcond.ll?rev=101158&r1=101157&r2=101158&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/brcond.ll (original)
+++ llvm/trunk/test/CodeGen/X86/brcond.ll Tue Apr 13 13:37:58 2010
@@ -67,42 +67,3 @@
 ; CHECK-NEXT:	orl	8(%esp), %eax
 ; CHECK-NEXT:	je	LBB3_2
 }
-
-; <rdar://problem/7598384>:
-;
-;    jCC  L1
-;    jmp  L2
-; L1:
-;   ...
-; L2:
-;   ...
-;
-; to:
-; 
-;    jnCC L2
-; L1:
-;   ...
-; L2:
-;   ...
-define float @test4(float %x, float %y) nounwind readnone optsize ssp {
-entry:
-  %0 = fpext float %x to double                   ; <double> [#uses=1]
-  %1 = fpext float %y to double                   ; <double> [#uses=1]
-  %2 = fmul double %0, %1                         ; <double> [#uses=3]
-  %3 = fcmp oeq double %2, 0.000000e+00           ; <i1> [#uses=1]
-  br i1 %3, label %bb2, label %bb1
-
-; CHECK:      jne
-; CHECK-NEXT: jnp
-; CHECK-NOT:  jmp
-; CHECK:      LBB
-
-bb1:                                              ; preds = %entry
-  %4 = fadd double %2, -1.000000e+00              ; <double> [#uses=1]
-  br label %bb2
-
-bb2:                                              ; preds = %entry, %bb1
-  %.0.in = phi double [ %4, %bb1 ], [ %2, %entry ] ; <double> [#uses=1]
-  %.0 = fptrunc double %.0.in to float            ; <float> [#uses=1]
-  ret float %.0
-}




From bob.wilson at apple.com  Tue Apr 13 13:38:28 2010
From: bob.wilson at apple.com (Bob Wilson)
Date: Tue, 13 Apr 2010 18:38:28 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r101159 -
	/llvm-gcc-4.2/trunk/configure
Message-ID: <20100413183828.50C932A6C12C@llvm.org>

Author: bwilson
Date: Tue Apr 13 13:38:28 2010
New Revision: 101159

URL: http://llvm.org/viewvc/llvm-project?rev=101159&view=rev
Log:
Regenerate configure script.

Modified:
    llvm-gcc-4.2/trunk/configure

Modified: llvm-gcc-4.2/trunk/configure
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/configure?rev=101159&r1=101158&r2=101159&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/configure (original)
+++ llvm-gcc-4.2/trunk/configure Tue Apr 13 13:38:28 2010
@@ -2808,8 +2808,13 @@
 if test "${with_build_sysroot+set}" = set; then
   withval="$with_build_sysroot"
   if test x"$withval" != x ; then
+     # LLVM LOCAL begin Keep original --sysroot usage for non-Darwin targets.
+     case "${target}" in
      # APPLE LOCAL 7852964 Use -isysroot instead of --sysroot.
-     SYSROOT_CFLAGS_FOR_TARGET="-isysroot $withval"
+     *-*-darwin*) SYSROOT_CFLAGS_FOR_TARGET="-isysroot $withval" ;;
+     *) SYSROOT_CFLAGS_FOR_TARGET="--sysroot=$withval" ;;
+     esac
+     # LLVM LOCAL end Keep original --sysroot usage for non-Darwin targets.
    fi
 else
   SYSROOT_CFLAGS_FOR_TARGET=
@@ -3556,7 +3561,7 @@
 # Extract the first word of "$ac_prog", so it can be a program name with args.
 set dummy $ac_prog; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3560: checking for $ac_word" >&5
+echo "configure:3565: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_YACC'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -3596,7 +3601,7 @@
 # Extract the first word of "$ac_prog", so it can be a program name with args.
 set dummy $ac_prog; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3600: checking for $ac_word" >&5
+echo "configure:3605: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_BISON'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -3635,7 +3640,7 @@
 # Extract the first word of "$ac_prog", so it can be a program name with args.
 set dummy $ac_prog; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3639: checking for $ac_word" >&5
+echo "configure:3644: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_M4'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -3674,7 +3679,7 @@
 # Extract the first word of "$ac_prog", so it can be a program name with args.
 set dummy $ac_prog; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3678: checking for $ac_word" >&5
+echo "configure:3683: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_LEX'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -3714,7 +3719,7 @@
 # Extract the first word of "$ac_prog", so it can be a program name with args.
 set dummy $ac_prog; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3718: checking for $ac_word" >&5
+echo "configure:3723: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_FLEX'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -3753,7 +3758,7 @@
 # Extract the first word of "$ac_prog", so it can be a program name with args.
 set dummy $ac_prog; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3757: checking for $ac_word" >&5
+echo "configure:3762: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_MAKEINFO'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -3806,7 +3811,7 @@
 # Extract the first word of "$ac_prog", so it can be a program name with args.
 set dummy $ac_prog; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3810: checking for $ac_word" >&5
+echo "configure:3815: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_EXPECT'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -3847,7 +3852,7 @@
 # Extract the first word of "$ac_prog", so it can be a program name with args.
 set dummy $ac_prog; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3851: checking for $ac_word" >&5
+echo "configure:3856: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_RUNTEST'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -3895,7 +3900,7 @@
     # Extract the first word of "${ncn_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3899: checking for $ac_word" >&5
+echo "configure:3904: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_AR'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -3926,7 +3931,7 @@
     # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3930: checking for $ac_word" >&5
+echo "configure:3935: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_AR'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -3970,7 +3975,7 @@
     # Extract the first word of "${ncn_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:3974: checking for $ac_word" >&5
+echo "configure:3979: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_AS'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4001,7 +4006,7 @@
     # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4005: checking for $ac_word" >&5
+echo "configure:4010: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_AS'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4045,7 +4050,7 @@
     # Extract the first word of "${ncn_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4049: checking for $ac_word" >&5
+echo "configure:4054: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_DLLTOOL'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4076,7 +4081,7 @@
     # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4080: checking for $ac_word" >&5
+echo "configure:4085: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_DLLTOOL'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4120,7 +4125,7 @@
     # Extract the first word of "${ncn_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4124: checking for $ac_word" >&5
+echo "configure:4129: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_LD'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4151,7 +4156,7 @@
     # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4155: checking for $ac_word" >&5
+echo "configure:4160: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_LD'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4195,7 +4200,7 @@
     # Extract the first word of "${ncn_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4199: checking for $ac_word" >&5
+echo "configure:4204: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_LIPO'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4226,7 +4231,7 @@
     # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4230: checking for $ac_word" >&5
+echo "configure:4235: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_LIPO'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4270,7 +4275,7 @@
     # Extract the first word of "${ncn_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4274: checking for $ac_word" >&5
+echo "configure:4279: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_NM'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4301,7 +4306,7 @@
     # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4305: checking for $ac_word" >&5
+echo "configure:4310: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_NM'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4345,7 +4350,7 @@
     # Extract the first word of "${ncn_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4349: checking for $ac_word" >&5
+echo "configure:4354: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4376,7 +4381,7 @@
     # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4380: checking for $ac_word" >&5
+echo "configure:4385: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4415,7 +4420,7 @@
     # Extract the first word of "${ncn_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4419: checking for $ac_word" >&5
+echo "configure:4424: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_STRIP'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4446,7 +4451,7 @@
     # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4450: checking for $ac_word" >&5
+echo "configure:4455: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_STRIP'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4485,7 +4490,7 @@
     # Extract the first word of "${ncn_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4489: checking for $ac_word" >&5
+echo "configure:4494: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_WINDRES'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4516,7 +4521,7 @@
     # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4520: checking for $ac_word" >&5
+echo "configure:4525: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_WINDRES'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4560,7 +4565,7 @@
     # Extract the first word of "${ncn_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4564: checking for $ac_word" >&5
+echo "configure:4569: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_OBJCOPY'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4591,7 +4596,7 @@
     # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4595: checking for $ac_word" >&5
+echo "configure:4600: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_OBJCOPY'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4635,7 +4640,7 @@
     # Extract the first word of "${ncn_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4639: checking for $ac_word" >&5
+echo "configure:4644: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_OBJDUMP'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4666,7 +4671,7 @@
     # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4670: checking for $ac_word" >&5
+echo "configure:4675: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_OBJDUMP'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4730,7 +4735,7 @@
  if test -n "$with_build_time_tools"; then
   for ncn_progname in cc gcc; do
     echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:4734: checking for ${ncn_progname} in $with_build_time_tools" >&5
+echo "configure:4739: checking for ${ncn_progname} in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/${ncn_progname}; then
       ac_cv_prog_CC_FOR_TARGET=$with_build_time_tools/${ncn_progname}
       echo "$ac_t""yes" 1>&6
@@ -4747,7 +4752,7 @@
       # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4751: checking for $ac_word" >&5
+echo "configure:4756: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_CC_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4778,7 +4783,7 @@
       # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4782: checking for $ac_word" >&5
+echo "configure:4787: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_CC_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4823,7 +4828,7 @@
  if test -n "$with_build_time_tools"; then
   for ncn_progname in c++ g++ cxx gxx; do
     echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:4827: checking for ${ncn_progname} in $with_build_time_tools" >&5
+echo "configure:4832: checking for ${ncn_progname} in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/${ncn_progname}; then
       ac_cv_prog_CXX_FOR_TARGET=$with_build_time_tools/${ncn_progname}
       echo "$ac_t""yes" 1>&6
@@ -4840,7 +4845,7 @@
       # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4844: checking for $ac_word" >&5
+echo "configure:4849: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_CXX_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4871,7 +4876,7 @@
       # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4875: checking for $ac_word" >&5
+echo "configure:4880: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_CXX_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4916,7 +4921,7 @@
  if test -n "$with_build_time_tools"; then
   for ncn_progname in gcc; do
     echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:4920: checking for ${ncn_progname} in $with_build_time_tools" >&5
+echo "configure:4925: checking for ${ncn_progname} in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/${ncn_progname}; then
       ac_cv_prog_GCC_FOR_TARGET=$with_build_time_tools/${ncn_progname}
       echo "$ac_t""yes" 1>&6
@@ -4933,7 +4938,7 @@
       # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4937: checking for $ac_word" >&5
+echo "configure:4942: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_GCC_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -4964,7 +4969,7 @@
       # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:4968: checking for $ac_word" >&5
+echo "configure:4973: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_GCC_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5004,7 +5009,7 @@
  if test -n "$with_build_time_tools"; then
   for ncn_progname in gcj; do
     echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:5008: checking for ${ncn_progname} in $with_build_time_tools" >&5
+echo "configure:5013: checking for ${ncn_progname} in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/${ncn_progname}; then
       ac_cv_prog_GCJ_FOR_TARGET=$with_build_time_tools/${ncn_progname}
       echo "$ac_t""yes" 1>&6
@@ -5021,7 +5026,7 @@
       # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5025: checking for $ac_word" >&5
+echo "configure:5030: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_GCJ_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5052,7 +5057,7 @@
       # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5056: checking for $ac_word" >&5
+echo "configure:5061: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_GCJ_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5097,7 +5102,7 @@
  if test -n "$with_build_time_tools"; then
   for ncn_progname in gfortran; do
     echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:5101: checking for ${ncn_progname} in $with_build_time_tools" >&5
+echo "configure:5106: checking for ${ncn_progname} in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/${ncn_progname}; then
       ac_cv_prog_GFORTRAN_FOR_TARGET=$with_build_time_tools/${ncn_progname}
       echo "$ac_t""yes" 1>&6
@@ -5114,7 +5119,7 @@
       # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5118: checking for $ac_word" >&5
+echo "configure:5123: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_GFORTRAN_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5145,7 +5150,7 @@
       # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5149: checking for $ac_word" >&5
+echo "configure:5154: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_GFORTRAN_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5254,7 +5259,7 @@
 if test -z "$ac_cv_path_AR_FOR_TARGET" ; then
   if test -n "$with_build_time_tools"; then
     echo $ac_n "checking for ar in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:5258: checking for ar in $with_build_time_tools" >&5
+echo "configure:5263: checking for ar in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/ar; then
       AR_FOR_TARGET=`cd $with_build_time_tools && pwd`/ar
       ac_cv_path_AR_FOR_TARGET=$AR_FOR_TARGET
@@ -5272,7 +5277,7 @@
   # Extract the first word of "ar", so it can be a program name with args.
 set dummy ar; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5276: checking for $ac_word" >&5
+echo "configure:5281: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_path_AR_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5309,7 +5314,7 @@
    if test -n "$with_build_time_tools"; then
   for ncn_progname in ar; do
     echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:5313: checking for ${ncn_progname} in $with_build_time_tools" >&5
+echo "configure:5318: checking for ${ncn_progname} in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/${ncn_progname}; then
       ac_cv_prog_AR_FOR_TARGET=$with_build_time_tools/${ncn_progname}
       echo "$ac_t""yes" 1>&6
@@ -5326,7 +5331,7 @@
       # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5330: checking for $ac_word" >&5
+echo "configure:5335: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_AR_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5357,7 +5362,7 @@
       # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5361: checking for $ac_word" >&5
+echo "configure:5366: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_AR_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5409,7 +5414,7 @@
 if test -z "$ac_cv_path_AS_FOR_TARGET" ; then
   if test -n "$with_build_time_tools"; then
     echo $ac_n "checking for as in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:5413: checking for as in $with_build_time_tools" >&5
+echo "configure:5418: checking for as in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/as; then
       AS_FOR_TARGET=`cd $with_build_time_tools && pwd`/as
       ac_cv_path_AS_FOR_TARGET=$AS_FOR_TARGET
@@ -5427,7 +5432,7 @@
   # Extract the first word of "as", so it can be a program name with args.
 set dummy as; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5431: checking for $ac_word" >&5
+echo "configure:5436: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_path_AS_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5464,7 +5469,7 @@
    if test -n "$with_build_time_tools"; then
   for ncn_progname in as; do
     echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:5468: checking for ${ncn_progname} in $with_build_time_tools" >&5
+echo "configure:5473: checking for ${ncn_progname} in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/${ncn_progname}; then
       ac_cv_prog_AS_FOR_TARGET=$with_build_time_tools/${ncn_progname}
       echo "$ac_t""yes" 1>&6
@@ -5481,7 +5486,7 @@
       # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5485: checking for $ac_word" >&5
+echo "configure:5490: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_AS_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5512,7 +5517,7 @@
       # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5516: checking for $ac_word" >&5
+echo "configure:5521: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_AS_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5564,7 +5569,7 @@
 if test -z "$ac_cv_path_DLLTOOL_FOR_TARGET" ; then
   if test -n "$with_build_time_tools"; then
     echo $ac_n "checking for dlltool in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:5568: checking for dlltool in $with_build_time_tools" >&5
+echo "configure:5573: checking for dlltool in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/dlltool; then
       DLLTOOL_FOR_TARGET=`cd $with_build_time_tools && pwd`/dlltool
       ac_cv_path_DLLTOOL_FOR_TARGET=$DLLTOOL_FOR_TARGET
@@ -5582,7 +5587,7 @@
   # Extract the first word of "dlltool", so it can be a program name with args.
 set dummy dlltool; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5586: checking for $ac_word" >&5
+echo "configure:5591: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_path_DLLTOOL_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5619,7 +5624,7 @@
    if test -n "$with_build_time_tools"; then
   for ncn_progname in dlltool; do
     echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:5623: checking for ${ncn_progname} in $with_build_time_tools" >&5
+echo "configure:5628: checking for ${ncn_progname} in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/${ncn_progname}; then
       ac_cv_prog_DLLTOOL_FOR_TARGET=$with_build_time_tools/${ncn_progname}
       echo "$ac_t""yes" 1>&6
@@ -5636,7 +5641,7 @@
       # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5640: checking for $ac_word" >&5
+echo "configure:5645: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_DLLTOOL_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5667,7 +5672,7 @@
       # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5671: checking for $ac_word" >&5
+echo "configure:5676: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_DLLTOOL_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5719,7 +5724,7 @@
 if test -z "$ac_cv_path_LD_FOR_TARGET" ; then
   if test -n "$with_build_time_tools"; then
     echo $ac_n "checking for ld in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:5723: checking for ld in $with_build_time_tools" >&5
+echo "configure:5728: checking for ld in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/ld; then
       LD_FOR_TARGET=`cd $with_build_time_tools && pwd`/ld
       ac_cv_path_LD_FOR_TARGET=$LD_FOR_TARGET
@@ -5737,7 +5742,7 @@
   # Extract the first word of "ld", so it can be a program name with args.
 set dummy ld; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5741: checking for $ac_word" >&5
+echo "configure:5746: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_path_LD_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5774,7 +5779,7 @@
    if test -n "$with_build_time_tools"; then
   for ncn_progname in ld; do
     echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:5778: checking for ${ncn_progname} in $with_build_time_tools" >&5
+echo "configure:5783: checking for ${ncn_progname} in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/${ncn_progname}; then
       ac_cv_prog_LD_FOR_TARGET=$with_build_time_tools/${ncn_progname}
       echo "$ac_t""yes" 1>&6
@@ -5791,7 +5796,7 @@
       # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5795: checking for $ac_word" >&5
+echo "configure:5800: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_LD_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5822,7 +5827,7 @@
       # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5826: checking for $ac_word" >&5
+echo "configure:5831: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_LD_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5874,7 +5879,7 @@
 if test -z "$ac_cv_path_LIPO_FOR_TARGET" ; then
   if test -n "$with_build_time_tools"; then
     echo $ac_n "checking for lipo in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:5878: checking for lipo in $with_build_time_tools" >&5
+echo "configure:5883: checking for lipo in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/lipo; then
       LIPO_FOR_TARGET=`cd $with_build_time_tools && pwd`/lipo
       ac_cv_path_LIPO_FOR_TARGET=$LIPO_FOR_TARGET
@@ -5892,7 +5897,7 @@
   # Extract the first word of "lipo", so it can be a program name with args.
 set dummy lipo; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5896: checking for $ac_word" >&5
+echo "configure:5901: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_path_LIPO_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5929,7 +5934,7 @@
    if test -n "$with_build_time_tools"; then
   for ncn_progname in lipo; do
     echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:5933: checking for ${ncn_progname} in $with_build_time_tools" >&5
+echo "configure:5938: checking for ${ncn_progname} in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/${ncn_progname}; then
       ac_cv_prog_LIPO_FOR_TARGET=$with_build_time_tools/${ncn_progname}
       echo "$ac_t""yes" 1>&6
@@ -5946,7 +5951,7 @@
       # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5950: checking for $ac_word" >&5
+echo "configure:5955: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_LIPO_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -5977,7 +5982,7 @@
       # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:5981: checking for $ac_word" >&5
+echo "configure:5986: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_LIPO_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6029,7 +6034,7 @@
 if test -z "$ac_cv_path_NM_FOR_TARGET" ; then
   if test -n "$with_build_time_tools"; then
     echo $ac_n "checking for nm in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:6033: checking for nm in $with_build_time_tools" >&5
+echo "configure:6038: checking for nm in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/nm; then
       NM_FOR_TARGET=`cd $with_build_time_tools && pwd`/nm
       ac_cv_path_NM_FOR_TARGET=$NM_FOR_TARGET
@@ -6047,7 +6052,7 @@
   # Extract the first word of "nm", so it can be a program name with args.
 set dummy nm; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:6051: checking for $ac_word" >&5
+echo "configure:6056: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_path_NM_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6084,7 +6089,7 @@
    if test -n "$with_build_time_tools"; then
   for ncn_progname in nm; do
     echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:6088: checking for ${ncn_progname} in $with_build_time_tools" >&5
+echo "configure:6093: checking for ${ncn_progname} in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/${ncn_progname}; then
       ac_cv_prog_NM_FOR_TARGET=$with_build_time_tools/${ncn_progname}
       echo "$ac_t""yes" 1>&6
@@ -6101,7 +6106,7 @@
       # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:6105: checking for $ac_word" >&5
+echo "configure:6110: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_NM_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6132,7 +6137,7 @@
       # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:6136: checking for $ac_word" >&5
+echo "configure:6141: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_NM_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6184,7 +6189,7 @@
 if test -z "$ac_cv_path_OBJDUMP_FOR_TARGET" ; then
   if test -n "$with_build_time_tools"; then
     echo $ac_n "checking for objdump in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:6188: checking for objdump in $with_build_time_tools" >&5
+echo "configure:6193: checking for objdump in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/objdump; then
       OBJDUMP_FOR_TARGET=`cd $with_build_time_tools && pwd`/objdump
       ac_cv_path_OBJDUMP_FOR_TARGET=$OBJDUMP_FOR_TARGET
@@ -6202,7 +6207,7 @@
   # Extract the first word of "objdump", so it can be a program name with args.
 set dummy objdump; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:6206: checking for $ac_word" >&5
+echo "configure:6211: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_path_OBJDUMP_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6239,7 +6244,7 @@
    if test -n "$with_build_time_tools"; then
   for ncn_progname in objdump; do
     echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:6243: checking for ${ncn_progname} in $with_build_time_tools" >&5
+echo "configure:6248: checking for ${ncn_progname} in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/${ncn_progname}; then
       ac_cv_prog_OBJDUMP_FOR_TARGET=$with_build_time_tools/${ncn_progname}
       echo "$ac_t""yes" 1>&6
@@ -6256,7 +6261,7 @@
       # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:6260: checking for $ac_word" >&5
+echo "configure:6265: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_OBJDUMP_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6287,7 +6292,7 @@
       # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:6291: checking for $ac_word" >&5
+echo "configure:6296: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_OBJDUMP_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6339,7 +6344,7 @@
 if test -z "$ac_cv_path_RANLIB_FOR_TARGET" ; then
   if test -n "$with_build_time_tools"; then
     echo $ac_n "checking for ranlib in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:6343: checking for ranlib in $with_build_time_tools" >&5
+echo "configure:6348: checking for ranlib in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/ranlib; then
       RANLIB_FOR_TARGET=`cd $with_build_time_tools && pwd`/ranlib
       ac_cv_path_RANLIB_FOR_TARGET=$RANLIB_FOR_TARGET
@@ -6357,7 +6362,7 @@
   # Extract the first word of "ranlib", so it can be a program name with args.
 set dummy ranlib; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:6361: checking for $ac_word" >&5
+echo "configure:6366: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_path_RANLIB_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6394,7 +6399,7 @@
    if test -n "$with_build_time_tools"; then
   for ncn_progname in ranlib; do
     echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:6398: checking for ${ncn_progname} in $with_build_time_tools" >&5
+echo "configure:6403: checking for ${ncn_progname} in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/${ncn_progname}; then
       ac_cv_prog_RANLIB_FOR_TARGET=$with_build_time_tools/${ncn_progname}
       echo "$ac_t""yes" 1>&6
@@ -6411,7 +6416,7 @@
       # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:6415: checking for $ac_word" >&5
+echo "configure:6420: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_RANLIB_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6442,7 +6447,7 @@
       # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:6446: checking for $ac_word" >&5
+echo "configure:6451: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_RANLIB_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6494,7 +6499,7 @@
 if test -z "$ac_cv_path_STRIP_FOR_TARGET" ; then
   if test -n "$with_build_time_tools"; then
     echo $ac_n "checking for strip in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:6498: checking for strip in $with_build_time_tools" >&5
+echo "configure:6503: checking for strip in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/strip; then
       STRIP_FOR_TARGET=`cd $with_build_time_tools && pwd`/strip
       ac_cv_path_STRIP_FOR_TARGET=$STRIP_FOR_TARGET
@@ -6512,7 +6517,7 @@
   # Extract the first word of "strip", so it can be a program name with args.
 set dummy strip; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:6516: checking for $ac_word" >&5
+echo "configure:6521: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_path_STRIP_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6549,7 +6554,7 @@
    if test -n "$with_build_time_tools"; then
   for ncn_progname in strip; do
     echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:6553: checking for ${ncn_progname} in $with_build_time_tools" >&5
+echo "configure:6558: checking for ${ncn_progname} in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/${ncn_progname}; then
       ac_cv_prog_STRIP_FOR_TARGET=$with_build_time_tools/${ncn_progname}
       echo "$ac_t""yes" 1>&6
@@ -6566,7 +6571,7 @@
       # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:6570: checking for $ac_word" >&5
+echo "configure:6575: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_STRIP_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6597,7 +6602,7 @@
       # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:6601: checking for $ac_word" >&5
+echo "configure:6606: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_STRIP_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6649,7 +6654,7 @@
 if test -z "$ac_cv_path_WINDRES_FOR_TARGET" ; then
   if test -n "$with_build_time_tools"; then
     echo $ac_n "checking for windres in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:6653: checking for windres in $with_build_time_tools" >&5
+echo "configure:6658: checking for windres in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/windres; then
       WINDRES_FOR_TARGET=`cd $with_build_time_tools && pwd`/windres
       ac_cv_path_WINDRES_FOR_TARGET=$WINDRES_FOR_TARGET
@@ -6667,7 +6672,7 @@
   # Extract the first word of "windres", so it can be a program name with args.
 set dummy windres; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:6671: checking for $ac_word" >&5
+echo "configure:6676: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_path_WINDRES_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6704,7 +6709,7 @@
    if test -n "$with_build_time_tools"; then
   for ncn_progname in windres; do
     echo $ac_n "checking for ${ncn_progname} in $with_build_time_tools""... $ac_c" 1>&6
-echo "configure:6708: checking for ${ncn_progname} in $with_build_time_tools" >&5
+echo "configure:6713: checking for ${ncn_progname} in $with_build_time_tools" >&5
     if test -x $with_build_time_tools/${ncn_progname}; then
       ac_cv_prog_WINDRES_FOR_TARGET=$with_build_time_tools/${ncn_progname}
       echo "$ac_t""yes" 1>&6
@@ -6721,7 +6726,7 @@
       # Extract the first word of "${ncn_target_tool_prefix}${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_target_tool_prefix}${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:6725: checking for $ac_word" >&5
+echo "configure:6730: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_WINDRES_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6752,7 +6757,7 @@
       # Extract the first word of "${ncn_progname}", so it can be a program name with args.
 set dummy ${ncn_progname}; ac_word=$2
 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:6756: checking for $ac_word" >&5
+echo "configure:6761: checking for $ac_word" >&5
 if eval "test \"`echo '$''{'ac_cv_prog_WINDRES_FOR_TARGET'+set}'`\" = set"; then
   echo $ac_n "(cached) $ac_c" 1>&6
 else
@@ -6802,7 +6807,7 @@
 RAW_CXX_FOR_TARGET="$CXX_FOR_TARGET"
 
 echo $ac_n "checking where to find the target ar""... $ac_c" 1>&6
-echo "configure:6806: checking where to find the target ar" >&5
+echo "configure:6811: checking where to find the target ar" >&5
 if test "x${build}" != "x${host}" ; then
   if expr "x$AR_FOR_TARGET" : "x/" > /dev/null; then
     # We already found the complete path
@@ -6835,7 +6840,7 @@
   fi
 fi
 echo $ac_n "checking where to find the target as""... $ac_c" 1>&6
-echo "configure:6839: checking where to find the target as" >&5
+echo "configure:6844: checking where to find the target as" >&5
 if test "x${build}" != "x${host}" ; then
   if expr "x$AS_FOR_TARGET" : "x/" > /dev/null; then
     # We already found the complete path
@@ -6868,7 +6873,7 @@
   fi
 fi
 echo $ac_n "checking where to find the target cc""... $ac_c" 1>&6
-echo "configure:6872: checking where to find the target cc" >&5
+echo "configure:6877: checking where to find the target cc" >&5
 if test "x${build}" != "x${host}" ; then
   if expr "x$CC_FOR_TARGET" : "x/" > /dev/null; then
     # We already found the complete path
@@ -6901,7 +6906,7 @@
   fi
 fi
 echo $ac_n "checking where to find the target c++""... $ac_c" 1>&6
-echo "configure:6905: checking where to find the target c++" >&5
+echo "configure:6910: checking where to find the target c++" >&5
 if test "x${build}" != "x${host}" ; then
   if expr "x$CXX_FOR_TARGET" : "x/" > /dev/null; then
     # We already found the complete path
@@ -6937,7 +6942,7 @@
   fi
 fi
 echo $ac_n "checking where to find the target c++ for libstdc++""... $ac_c" 1>&6
-echo "configure:6941: checking where to find the target c++ for libstdc++" >&5
+echo "configure:6946: checking where to find the target c++ for libstdc++" >&5
 if test "x${build}" != "x${host}" ; then
   if expr "x$RAW_CXX_FOR_TARGET" : "x/" > /dev/null; then
     # We already found the complete path
@@ -6973,7 +6978,7 @@
   fi
 fi
 echo $ac_n "checking where to find the target dlltool""... $ac_c" 1>&6
-echo "configure:6977: checking where to find the target dlltool" >&5
+echo "configure:6982: checking where to find the target dlltool" >&5
 if test "x${build}" != "x${host}" ; then
   if expr "x$DLLTOOL_FOR_TARGET" : "x/" > /dev/null; then
     # We already found the complete path
@@ -7006,7 +7011,7 @@
   fi
 fi
 echo $ac_n "checking where to find the target gcc""... $ac_c" 1>&6
-echo "configure:7010: checking where to find the target gcc" >&5
+echo "configure:7015: checking where to find the target gcc" >&5
 if test "x${build}" != "x${host}" ; then
   if expr "x$GCC_FOR_TARGET" : "x/" > /dev/null; then
     # We already found the complete path
@@ -7039,7 +7044,7 @@
   fi
 fi
 echo $ac_n "checking where to find the target gcj""... $ac_c" 1>&6
-echo "configure:7043: checking where to find the target gcj" >&5
+echo "configure:7048: checking where to find the target gcj" >&5
 if test "x${build}" != "x${host}" ; then
   if expr "x$GCJ_FOR_TARGET" : "x/" > /dev/null; then
     # We already found the complete path
@@ -7075,7 +7080,7 @@
   fi
 fi
 echo $ac_n "checking where to find the target gfortran""... $ac_c" 1>&6
-echo "configure:7079: checking where to find the target gfortran" >&5
+echo "configure:7084: checking where to find the target gfortran" >&5
 if test "x${build}" != "x${host}" ; then
   if expr "x$GFORTRAN_FOR_TARGET" : "x/" > /dev/null; then
     # We already found the complete path
@@ -7111,7 +7116,7 @@
   fi
 fi
 echo $ac_n "checking where to find the target ld""... $ac_c" 1>&6
-echo "configure:7115: checking where to find the target ld" >&5
+echo "configure:7120: checking where to find the target ld" >&5
 if test "x${build}" != "x${host}" ; then
   if expr "x$LD_FOR_TARGET" : "x/" > /dev/null; then
     # We already found the complete path
@@ -7144,7 +7149,7 @@
   fi
 fi
 echo $ac_n "checking where to find the target lipo""... $ac_c" 1>&6
-echo "configure:7148: checking where to find the target lipo" >&5
+echo "configure:7153: checking where to find the target lipo" >&5
 if test "x${build}" != "x${host}" ; then
   if expr "x$LIPO_FOR_TARGET" : "x/" > /dev/null; then
     # We already found the complete path
@@ -7167,7 +7172,7 @@
   fi
 fi
 echo $ac_n "checking where to find the target nm""... $ac_c" 1>&6
-echo "configure:7171: checking where to find the target nm" >&5
+echo "configure:7176: checking where to find the target nm" >&5
 if test "x${build}" != "x${host}" ; then
   if expr "x$NM_FOR_TARGET" : "x/" > /dev/null; then
     # We already found the complete path
@@ -7200,7 +7205,7 @@
   fi
 fi
 echo $ac_n "checking where to find the target objdump""... $ac_c" 1>&6
-echo "configure:7204: checking where to find the target objdump" >&5
+echo "configure:7209: checking where to find the target objdump" >&5
 if test "x${build}" != "x${host}" ; then
   if expr "x$OBJDUMP_FOR_TARGET" : "x/" > /dev/null; then
     # We already found the complete path
@@ -7233,7 +7238,7 @@
   fi
 fi
 echo $ac_n "checking where to find the target ranlib""... $ac_c" 1>&6
-echo "configure:7237: checking where to find the target ranlib" >&5
+echo "configure:7242: checking where to find the target ranlib" >&5
 if test "x${build}" != "x${host}" ; then
   if expr "x$RANLIB_FOR_TARGET" : "x/" > /dev/null; then
     # We already found the complete path
@@ -7266,7 +7271,7 @@
   fi
 fi
 echo $ac_n "checking where to find the target strip""... $ac_c" 1>&6
-echo "configure:7270: checking where to find the target strip" >&5
+echo "configure:7275: checking where to find the target strip" >&5
 if test "x${build}" != "x${host}" ; then
   if expr "x$STRIP_FOR_TARGET" : "x/" > /dev/null; then
     # We already found the complete path
@@ -7299,7 +7304,7 @@
   fi
 fi
 echo $ac_n "checking where to find the target windres""... $ac_c" 1>&6
-echo "configure:7303: checking where to find the target windres" >&5
+echo "configure:7308: checking where to find the target windres" >&5
 if test "x${build}" != "x${host}" ; then
   if expr "x$WINDRES_FOR_TARGET" : "x/" > /dev/null; then
     # We already found the complete path
@@ -7360,7 +7365,7 @@
 
 
 echo $ac_n "checking whether to enable maintainer-specific portions of Makefiles""... $ac_c" 1>&6
-echo "configure:7364: checking whether to enable maintainer-specific portions of Makefiles" >&5
+echo "configure:7369: checking whether to enable maintainer-specific portions of Makefiles" >&5
 # Check whether --enable-maintainer-mode or --disable-maintainer-mode was given.
 if test "${enable_maintainer_mode+set}" = set; then
   enableval="$enable_maintainer_mode"
@@ -7411,9 +7416,9 @@
   # Pass -fkeep-inline-functions for stage 1 if the GCC version supports it.
   CFLAGS="$CFLAGS -fkeep-inline-functions"
   echo $ac_n "checking whether -fkeep-inline-functions is supported""... $ac_c" 1>&6
-echo "configure:7415: checking whether -fkeep-inline-functions is supported" >&5
+echo "configure:7420: checking whether -fkeep-inline-functions is supported" >&5
   cat > conftest.$ac_ext <<EOF
-#line 7417 "configure"
+#line 7422 "configure"
 #include "confdefs.h"
 
 #if (__GNUC__ < 3) \
@@ -7426,7 +7431,7 @@
 
 ; return 0; }
 EOF
-if { (eval echo configure:7430: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:7435: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
   rm -rf conftest*
   echo "$ac_t""yes" 1>&6; stage1_cflags="$stage1_cflags -fkeep-inline-functions"
 else




From sabre at nondot.org  Tue Apr 13 13:41:17 2010
From: sabre at nondot.org (Chris Lattner)
Date: Tue, 13 Apr 2010 18:41:17 -0000
Subject: [llvm-commits] [llvm] r101160 -
	/llvm/trunk/tools/llvm-mc/Disassembler.cpp
Message-ID: <20100413184118.02ED52A6C12C@llvm.org>

Author: lattner
Date: Tue Apr 13 13:41:17 2010
New Revision: 101160

URL: http://llvm.org/viewvc/llvm-project?rev=101160&view=rev
Log:
Make the disassembler respect the assembler dialect when printing instructions,
patch by Marius Wachtler!

Modified:
    llvm/trunk/tools/llvm-mc/Disassembler.cpp

Modified: llvm/trunk/tools/llvm-mc/Disassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/Disassembler.cpp?rev=101160&r1=101159&r2=101160&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-mc/Disassembler.cpp (original)
+++ llvm/trunk/tools/llvm-mc/Disassembler.cpp Tue Apr 13 13:41:17 2010
@@ -142,7 +142,9 @@
     return -1;
   }
   
-  OwningPtr<MCInstPrinter> IP(T.createMCInstPrinter(0, *AsmInfo));
+  int AsmPrinterVariant = AsmInfo->getAssemblerDialect();
+  OwningPtr<MCInstPrinter> IP(T.createMCInstPrinter(AsmPrinterVariant,
+                                                    *AsmInfo));
   if (!IP) {
     errs() << "error: no instruction printer for target " << Triple << '\n';
     return -1;




From clattner at apple.com  Tue Apr 13 13:42:42 2010
From: clattner at apple.com (Chris Lattner)
Date: Tue, 13 Apr 2010 11:42:42 -0700
Subject: [llvm-commits] [PATCH] Teach llvm-mc to respect x86-asm-syntax
In-Reply-To: <o2n3838f7f11004131113gb60bba1egdb17aaffdbff9809@mail.gmail.com>
References: <o2n3838f7f11004131113gb60bba1egdb17aaffdbff9809@mail.gmail.com>
Message-ID: <BE69FAB6-7287-4813-A617-0458725956AD@apple.com>

Looks great, applied here, thanks!
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20100412/099711.html

-Chris

On Apr 13, 2010, at 11:13 AM, Marius Wachtler wrote:

> Hi all,
> 
> with this patch llvm-mc respects the assembler dialect when printing instructions.
> 
> 
> Before:
> 
> malloc at deadcode:~/dev/llvm_trunk/debug_make/Debug/bin$ ./llvm-mc -x86-asm-syntax=intel --disassemble 
> 0x48 0x83 0xEC 0x08
> 	subq	$8, %rsp
> 
> 
> With patch:
> 
> malloc at deadcode:~/dev/llvm_trunk/debug_make/Debug/bin$ ./llvm-mc -x86-asm-syntax=intel --disassemble 
> 0x48 0x83 0xEC 0x08
> 	sub	RSP, 8
> 
> -- Marius Wachtler
> <asm_variant.diff>_______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits




From evan.cheng at apple.com  Tue Apr 13 13:50:27 2010
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 13 Apr 2010 18:50:27 -0000
Subject: [llvm-commits] [llvm] r101162 - in /llvm/trunk:
 lib/Target/X86/X86InstrInfo.cpp
 test/CodeGen/X86/2010-04-13-AnalyzeBranchCrash.ll
 test/CodeGen/X86/brcond.ll
Message-ID: <20100413185027.388212A6C12C@llvm.org>

Author: evancheng
Date: Tue Apr 13 13:50:27 2010
New Revision: 101162

URL: http://llvm.org/viewvc/llvm-project?rev=101162&view=rev
Log:
Re-apply 101075 and fix it properly. Just reuse the debug info of the branch instruction being optimized. There is no need to --I which can deref off start of the BB.

Added:
    llvm/trunk/test/CodeGen/X86/2010-04-13-AnalyzeBranchCrash.ll
Modified:
    llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
    llvm/trunk/test/CodeGen/X86/brcond.ll

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=101162&r1=101161&r2=101162&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Tue Apr 13 13:50:27 2010
@@ -1684,6 +1684,7 @@
   // Start from the bottom of the block and work up, examining the
   // terminator instructions.
   MachineBasicBlock::iterator I = MBB.end();
+  MachineBasicBlock::iterator UnCondBrIter = MBB.end();
   while (I != MBB.begin()) {
     --I;
     if (I->isDebugValue())
@@ -1701,6 +1702,8 @@
 
     // Handle unconditional branches.
     if (I->getOpcode() == X86::JMP_4) {
+      UnCondBrIter = I;
+
       if (!AllowModify) {
         TBB = I->getOperand(0).getMBB();
         continue;
@@ -1718,10 +1721,11 @@
         TBB = 0;
         I->eraseFromParent();
         I = MBB.end();
+        UnCondBrIter = MBB.end();
         continue;
       }
 
-      // TBB is used to indicate the unconditinal destination.
+      // TBB is used to indicate the unconditional destination.
       TBB = I->getOperand(0).getMBB();
       continue;
     }
@@ -1733,6 +1737,45 @@
 
     // Working from the bottom, handle the first conditional branch.
     if (Cond.empty()) {
+      MachineBasicBlock *TargetBB = I->getOperand(0).getMBB();
+      if (AllowModify && UnCondBrIter != MBB.end() &&
+          MBB.isLayoutSuccessor(TargetBB)) {
+        // If we can modify the code and it ends in something like:
+        //
+        //     jCC L1
+        //     jmp L2
+        //   L1:
+        //     ...
+        //   L2:
+        //
+        // Then we can change this to:
+        //
+        //     jnCC L2
+        //   L1:
+        //     ...
+        //   L2:
+        //
+        // Which is a bit more efficient.
+        // We conditionally jump to the fall-through block.
+        BranchCode = GetOppositeBranchCondition(BranchCode);
+        unsigned JNCC = GetCondBranchFromCond(BranchCode);
+        MachineBasicBlock::iterator OldInst = I;
+
+        BuildMI(MBB, UnCondBrIter, MBB.findDebugLoc(I), get(JNCC))
+          .addMBB(UnCondBrIter->getOperand(0).getMBB());
+        BuildMI(MBB, UnCondBrIter, MBB.findDebugLoc(I), get(X86::JMP_4))
+          .addMBB(TargetBB);
+        MBB.addSuccessor(TargetBB);
+
+        OldInst->eraseFromParent();
+        UnCondBrIter->eraseFromParent();
+
+        // Restart the analysis.
+        UnCondBrIter = MBB.end();
+        I = MBB.end();
+        continue;
+      }
+
       FBB = TBB;
       TBB = I->getOperand(0).getMBB();
       Cond.push_back(MachineOperand::CreateImm(BranchCode));

Added: llvm/trunk/test/CodeGen/X86/2010-04-13-AnalyzeBranchCrash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-04-13-AnalyzeBranchCrash.ll?rev=101162&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-04-13-AnalyzeBranchCrash.ll (added)
+++ llvm/trunk/test/CodeGen/X86/2010-04-13-AnalyzeBranchCrash.ll Tue Apr 13 13:50:27 2010
@@ -0,0 +1,42 @@
+; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=core2
+; rdar://7857830
+
+%0 = type opaque
+%1 = type opaque
+
+define void @t(%0* %self, i8* nocapture %_cmd, %1* %scroller, i32 %hitPart, float %multiplier) nounwind optsize ssp {
+entry:
+  switch i32 %hitPart, label %if.else [
+    i32 7, label %if.then
+    i32 8, label %if.then
+  ]
+
+if.then:                                          ; preds = %entry, %entry
+  %tmp69 = load float* null, align 4              ; <float> [#uses=1]
+  %cmp19 = icmp eq %1* null, %scroller            ; <i1> [#uses=2]
+  %cond = select i1 %cmp19, float %tmp69, float 0.000000e+00 ; <float> [#uses=1]
+  %call36 = call i64 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i64 (i8*, i8*)*)(i8* undef, i8* undef) nounwind optsize ; <i64> [#uses=2]
+  br i1 %cmp19, label %cond.true32, label %cond.false39
+
+cond.true32:                                      ; preds = %if.then
+  %sroa.store.elt68 = lshr i64 %call36, 32        ; <i64> [#uses=1]
+  %0 = trunc i64 %sroa.store.elt68 to i32         ; <i32> [#uses=1]
+  br label %cond.end47
+
+cond.false39:                                     ; preds = %if.then
+  %1 = trunc i64 %call36 to i32                   ; <i32> [#uses=1]
+  br label %cond.end47
+
+cond.end47:                                       ; preds = %cond.false39, %cond.true32
+  %cond48.in = phi i32 [ %0, %cond.true32 ], [ %1, %cond.false39 ] ; <i32> [#uses=1]
+  %cond48 = bitcast i32 %cond48.in to float       ; <float> [#uses=1]
+  %div = fdiv float %cond, undef                  ; <float> [#uses=1]
+  %div58 = fdiv float %div, %cond48               ; <float> [#uses=1]
+  call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, float)*)(i8* undef, i8* undef, float %div58) nounwind optsize
+  ret void
+
+if.else:                                          ; preds = %entry
+  ret void
+}
+
+declare i8* @objc_msgSend(i8*, i8*, ...)

Modified: llvm/trunk/test/CodeGen/X86/brcond.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/brcond.ll?rev=101162&r1=101161&r2=101162&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/brcond.ll (original)
+++ llvm/trunk/test/CodeGen/X86/brcond.ll Tue Apr 13 13:50:27 2010
@@ -67,3 +67,42 @@
 ; CHECK-NEXT:	orl	8(%esp), %eax
 ; CHECK-NEXT:	je	LBB3_2
 }
+
+; <rdar://problem/7598384>:
+;
+;    jCC  L1
+;    jmp  L2
+; L1:
+;   ...
+; L2:
+;   ...
+;
+; to:
+; 
+;    jnCC L2
+; L1:
+;   ...
+; L2:
+;   ...
+define float @test4(float %x, float %y) nounwind readnone optsize ssp {
+entry:
+  %0 = fpext float %x to double                   ; <double> [#uses=1]
+  %1 = fpext float %y to double                   ; <double> [#uses=1]
+  %2 = fmul double %0, %1                         ; <double> [#uses=3]
+  %3 = fcmp oeq double %2, 0.000000e+00           ; <i1> [#uses=1]
+  br i1 %3, label %bb2, label %bb1
+
+; CHECK:      jne
+; CHECK-NEXT: jnp
+; CHECK-NOT:  jmp
+; CHECK:      LBB
+
+bb1:                                              ; preds = %entry
+  %4 = fadd double %2, -1.000000e+00              ; <double> [#uses=1]
+  br label %bb2
+
+bb2:                                              ; preds = %entry, %bb1
+  %.0.in = phi double [ %4, %bb1 ], [ %2, %entry ] ; <double> [#uses=1]
+  %.0 = fptrunc double %.0.in to float            ; <float> [#uses=1]
+  ret float %.0
+}




From evan.cheng at apple.com  Tue Apr 13 13:54:04 2010
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 13 Apr 2010 18:54:04 -0000
Subject: [llvm-commits] [llvm] r101163 -
	/llvm/trunk/test/CodeGen/X86/brcond.ll
Message-ID: <20100413185404.ABAFC2A6C12C@llvm.org>

Author: evancheng
Date: Tue Apr 13 13:54:04 2010
New Revision: 101163

URL: http://llvm.org/viewvc/llvm-project?rev=101163&view=rev
Log:
Fix test on non-x86 hosts.

Modified:
    llvm/trunk/test/CodeGen/X86/brcond.ll

Modified: llvm/trunk/test/CodeGen/X86/brcond.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/brcond.ll?rev=101163&r1=101162&r2=101163&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/brcond.ll (original)
+++ llvm/trunk/test/CodeGen/X86/brcond.ll Tue Apr 13 13:54:04 2010
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin10 | FileCheck %s
+; RUN: llc < %s -mtriple=i386-apple-darwin10 -mcpu=core2 | FileCheck %s
 ; rdar://7475489
 
 define i32 @test1(i32 %a, i32 %b) nounwind ssp {




From isanbard at gmail.com  Tue Apr 13 13:57:16 2010
From: isanbard at gmail.com (Bill Wendling)
Date: Tue, 13 Apr 2010 11:57:16 -0700
Subject: [llvm-commits] [llvm] r101075 - in /llvm/trunk:
	lib/Target/X86/X86InstrInfo.cpp test/CodeGen/X86/brcond.ll
In-Reply-To: <35DC7D63-E50B-4BD1-9EC0-E998BC677B0B@apple.com>
References: <20100412221957.EBF8A2A6C12C@llvm.org>
	<000E7360-B5FF-460E-80EF-F8A69D74C0DF@apple.com>
	<26E362DF-1C47-4A0C-B259-0A6AFC5E5B37@apple.com>
	<FCDEA618-97D0-457D-AB36-E695A89C0D62@apple.com>
	<1670CEA8-B035-4FCA-B5A6-549664FC826C@apple.com>
	<C39AC7F0-E69E-491F-A65E-FE5CFC9ED74E@apple.com>
	<667DBFC7-8ED4-4C68-AC13-9468E25031EB@gmail.com>
	<FB543B92-067C-4DC9-B92C-7C91959CE4C9@apple.com>
	<EDBE6564-41D5-434E-A1AE-11C089E34F1C@gmail.com>
	<35DC7D63-E50B-4BD1-9EC0-E998BC677B0B@apple.com>
Message-ID: <4375B5D6-166A-444B-A52D-61C9EC264DCF@gmail.com>

On Apr 13, 2010, at 11:15 AM, Dan Gohman wrote:

>> Then we generate this for the "fcmp une ..."
>> 
>> 	%AL<def> = SETNPr %EFLAGS<imp-use>
>> 	%CL<def> = SETEr %EFLAGS<imp-use,kill>
>> 	TEST8rr %CL<kill>, %AL<kill>, %EFLAGS<imp-def>
>> 	JE_4 <BB#2>, %EFLAGS<imp-use>
>> 
>> Ick. I suppose we should instead be generating?
>> 
>> 	JNP_4 <BB#2>, %EFLAGS<imp-use>
>> 	JE_4 <BB#2>, %EFLAGS<imp-use>
> 
> This isn't equivalent. The first version jumps only if both conditions are
> true, the second if either one is true.
> 
Yeah, I thought about that right after I sent it. However, it seems that going from:

  JNE  L1  // Jump if not equal or
  JP   L1  // NaN
  JMP  L2
L1:

to 

  JNP  L2  // Jump if not NaN or
  JE   L2  // is equal
L1:

is okay.

-bw




From stoklund at 2pi.dk  Tue Apr 13 14:06:14 2010
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Tue, 13 Apr 2010 19:06:14 -0000
Subject: [llvm-commits] [llvm] r101165 -
	/llvm/trunk/lib/CodeGen/MachineSink.cpp
Message-ID: <20100413190614.9A85D2A6C12C@llvm.org>

Author: stoklund
Date: Tue Apr 13 14:06:14 2010
New Revision: 101165

URL: http://llvm.org/viewvc/llvm-project?rev=101165&view=rev
Log:
Teach MachineSinking to handle easy critical edges.

Sometimes it is desirable to sink instructions along a critical edge:

x = ...
if (a && b) ...
else use(x);

The 'a && b' condition creates a critical edge to the else block, but we still
want to sink the computation of x into the block. The else block is dominated by
the parent block, so we are not pushing instructions into new code paths.

Modified:
    llvm/trunk/lib/CodeGen/MachineSink.cpp

Modified: llvm/trunk/lib/CodeGen/MachineSink.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineSink.cpp?rev=101165&r1=101164&r2=101165&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineSink.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineSink.cpp Tue Apr 13 14:06:14 2010
@@ -276,8 +276,23 @@
   // but for now we just punt.
   // FIXME: Split critical edges if not backedges.
   if (SuccToSinkTo->pred_size() > 1) {
-    DEBUG(dbgs() << " *** PUNTING: Critical edge found\n");
-    return false;
+    // We cannot sink a load across a critical edge - there may be stores in
+    // other code paths.
+    bool store = true;
+    if (!MI->isSafeToMove(TII, AA, store)) {
+      DEBUG(dbgs() << " *** PUNTING: Wont sink load along critical edge.\n");
+      return false;
+    }
+
+    // We don't want to sink across a critical edge if we don't dominate the
+    // successor. We could be introducing calculations to new code paths.
+    if (!DT->dominates(ParentBlock, SuccToSinkTo)) {
+      DEBUG(dbgs() << " *** PUNTING: Critical edge found\n");
+      return false;
+    }
+
+    // Otherwise we are OK with sinking along a critical edge.
+    DEBUG(dbgs() << "Sinking along critical edge.\n");
   }
   
   // Determine where to insert into.  Skip phi nodes.




From dalej at apple.com  Tue Apr 13 14:10:17 2010
From: dalej at apple.com (Dale Johannesen)
Date: Tue, 13 Apr 2010 12:10:17 -0700
Subject: [llvm-commits] [llvm] r101075 - in /llvm/trunk:
	lib/Target/X86/X86InstrInfo.cpp test/CodeGen/X86/brcond.ll
In-Reply-To: <4375B5D6-166A-444B-A52D-61C9EC264DCF@gmail.com>
References: <20100412221957.EBF8A2A6C12C@llvm.org>
	<000E7360-B5FF-460E-80EF-F8A69D74C0DF@apple.com>
	<26E362DF-1C47-4A0C-B259-0A6AFC5E5B37@apple.com>
	<FCDEA618-97D0-457D-AB36-E695A89C0D62@apple.com>
	<1670CEA8-B035-4FCA-B5A6-549664FC826C@apple.com>
	<C39AC7F0-E69E-491F-A65E-FE5CFC9ED74E@apple.com>
	<667DBFC7-8ED4-4C68-AC13-9468E25031EB@gmail.com>
	<FB543B92-067C-4DC9-B92C-7C91959CE4C9@apple.com>
	<EDBE6564-41D5-434E-A1AE-11C089E34F1C@gmail.com>
	<35DC7D63-E50B-4BD1-9EC0-E998BC677B0B@apple.com>
	<4375B5D6-166A-444B-A52D-61C9EC264DCF@gmail.com>
Message-ID: <D71F0578-54A8-4AC6-9400-3D799489054F@apple.com>


On Apr 13, 2010, at 11:57 AMPDT, Bill Wendling wrote:

> On Apr 13, 2010, at 11:15 AM, Dan Gohman wrote:
> 
>>> Then we generate this for the "fcmp une ..."
>>> 
>>> 	%AL<def> = SETNPr %EFLAGS<imp-use>
>>> 	%CL<def> = SETEr %EFLAGS<imp-use,kill>
>>> 	TEST8rr %CL<kill>, %AL<kill>, %EFLAGS<imp-def>
>>> 	JE_4 <BB#2>, %EFLAGS<imp-use>
>>> 
>>> Ick. I suppose we should instead be generating?
>>> 
>>> 	JNP_4 <BB#2>, %EFLAGS<imp-use>
>>> 	JE_4 <BB#2>, %EFLAGS<imp-use>
>> 
>> This isn't equivalent. The first version jumps only if both conditions are
>> true, the second if either one is true.
>> 
> Yeah, I thought about that right after I sent it. However, it seems that going from:
> 
>  JNE  L1  // Jump if not equal or
>  JP   L1  // NaN
>  JMP  L2
> L1:
> 
> to 
> 
>  JNP  L2  // Jump if not NaN or
>  JE   L2  // is equal
> L1:
> 
> is okay.

No, if E==0 & P==0 you wind up in different places.  (I think the case E==1, P==1 should not happen; you may be able to take advantage of that.)





From evan.cheng at apple.com  Tue Apr 13 15:21:06 2010
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 13 Apr 2010 20:21:06 -0000
Subject: [llvm-commits] [llvm] r101167 -
	/llvm/trunk/lib/CodeGen/MachineLICM.cpp
Message-ID: <20100413202106.298EC2A6C12C@llvm.org>

Author: evancheng
Date: Tue Apr 13 15:21:05 2010
New Revision: 101167

URL: http://llvm.org/viewvc/llvm-project?rev=101167&view=rev
Log:
Expand postra machine licm's capability a little more. If an instruction's register operands are all loop invariants, then it's safe to hoist it.

Modified:
    llvm/trunk/lib/CodeGen/MachineLICM.cpp

Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=101167&r1=101166&r2=101167&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Tue Apr 13 15:21:05 2010
@@ -276,7 +276,7 @@
                             SmallSet<int, 32> &StoredFIs,
                             SmallVector<CandidateInfo, 32> &Candidates) {
   bool RuledOut = false;
-  bool HasRegFIUse = false;
+  bool HasNonInvariantUse = false;
   unsigned Def = 0;
   for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
     const MachineOperand &MO = MI->getOperand(i);
@@ -287,7 +287,7 @@
           MFI->isSpillSlotObjectIndex(FI) &&
           InstructionStoresToFI(MI, FI))
         StoredFIs.insert(FI);
-      HasRegFIUse = true;
+      HasNonInvariantUse = true;
       continue;
     }
 
@@ -300,7 +300,10 @@
            "Not expecting virtual register!");
 
     if (!MO.isDef()) {
-      HasRegFIUse = true;
+      if (PhysRegDefs[Reg])
+        // If it's using a non-loop-invariant register, then it's obviously not
+        // safe to hoist.
+        HasNonInvariantUse = true;
       continue;
     }
 
@@ -338,9 +341,7 @@
   // operands. FIXME: Consider unfold load folding instructions.
   if (Def && !RuledOut) {
     int FI = INT_MIN;
-    // FIXME: Also hoist instructions if all source operands are live in
-    // to the loop.
-    if ((!HasRegFIUse && IsLICMCandidate(*MI)) ||
+    if ((!HasNonInvariantUse && IsLICMCandidate(*MI)) ||
         (TII->isLoadFromStackSlot(MI, FI) && MFI->isSpillSlotObjectIndex(FI)))
       Candidates.push_back(CandidateInfo(MI, Def, FI));
   }
@@ -400,8 +401,23 @@
         StoredFIs.count(Candidates[i].FI))
       continue;
 
-    if (PhysRegDefs[Candidates[i].Def] == 1)
-      HoistPostRA(Candidates[i].MI, Candidates[i].Def);
+    if (PhysRegDefs[Candidates[i].Def] == 1) {
+      bool Safe = true;
+      MachineInstr *MI = Candidates[i].MI;
+      for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
+        const MachineOperand &MO = MI->getOperand(i);
+        if (!MO.isReg() || MO.isDef())
+          continue;
+        if (PhysRegDefs[MO.getReg()]) {
+          // If it's using a non-loop-invariant register, then it's obviously
+          // not safe to hoist.
+          Safe = false;
+          break;
+        }
+      }
+      if (Safe)
+        HoistPostRA(MI, Candidates[i].Def);
+    }
   }
 
   delete[] PhysRegDefs;




From evan.cheng at apple.com  Tue Apr 13 15:25:29 2010
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 13 Apr 2010 20:25:29 -0000
Subject: [llvm-commits] [llvm] r101170 -
	/llvm/trunk/lib/CodeGen/MachineLICM.cpp
Message-ID: <20100413202529.4E6A62A6C12C@llvm.org>

Author: evancheng
Date: Tue Apr 13 15:25:29 2010
New Revision: 101170

URL: http://llvm.org/viewvc/llvm-project?rev=101170&view=rev
Log:
Avoid variable shadowing.

Modified:
    llvm/trunk/lib/CodeGen/MachineLICM.cpp

Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=101170&r1=101169&r2=101170&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Tue Apr 13 15:25:29 2010
@@ -404,8 +404,8 @@
     if (PhysRegDefs[Candidates[i].Def] == 1) {
       bool Safe = true;
       MachineInstr *MI = Candidates[i].MI;
-      for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
-        const MachineOperand &MO = MI->getOperand(i);
+      for (unsigned j = 0, ee = MI->getNumOperands(); j != ee; ++j) {
+        const MachineOperand &MO = MI->getOperand(j);
         if (!MO.isReg() || MO.isDef())
           continue;
         if (PhysRegDefs[MO.getReg()]) {




From aaronngray.lists at googlemail.com  Tue Apr 13 15:26:27 2010
From: aaronngray.lists at googlemail.com (Aaron Gray)
Date: Tue, 13 Apr 2010 21:26:27 +0100
Subject: [llvm-commits] [llvm] r97884 - in /llvm/trunk/lib/Target/X86:
	X86ISelLowering.cpp X86ISelLowering.h X86InstrInfo.td
	X86RegisterInfo.cpp
In-Reply-To: <20100306193230.3B36F2A6C12C@llvm.org>
References: <20100306193230.3B36F2A6C12C@llvm.org>
Message-ID: <k2j9719867c1004131326na5ace047s97ee986df539e6e2@mail.gmail.com>

On 6 March 2010 20:32, Anton Korobeynikov <asl at math.spbu.ru> wrote:

> Author: asl
> Date: Sat Mar  6 13:32:29 2010
> New Revision: 97884
>
> URL: http://llvm.org/viewvc/llvm-project?rev=97884&view=rev
> Log:
> Lower dynamic stack allocation on mingw32 to separate instruction.
> We cannot use a normal call here since it has extra unmodelled side
> effects (it changes stack pointer). This should fix PR5292.
>
> Modified:
>    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
>    llvm/trunk/lib/Target/X86/X86ISelLowering.h
>    llvm/trunk/lib/Target/X86/X86InstrInfo.td
>    llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp
>
>
Anton,

AFAICT this has broken Cygwin LLVM-GCC in a strange way. I have bisected it
down to this revision change.

Basically some typedef's in stddef.h when
compiling gcc/config/i386/cygming-crtbegin.c are not being parsed properly,
very strange I know.

Would you be able to look in to this please as I don't understand the
ISelection area. Hopefully it is something simple.

~~~~
        /bin/sh /home/ang/svn/llvm-gcc-97884/gcc/mkconfig.sh tconfig.h
/home/ang/build/llvm-gcc-97884/./gcc/xgcc
-B/home/ang/build/llvm-gcc-97884/./gcc
/ -B/home/ang/llvm-gcc-97884/i686-pc-cygwin/bin/
-B/home/ang/llvm-gcc-97884/i686
-pc-cygwin/lib/ -isystem /home/ang/llvm-gcc-97884/i686-pc-cygwin/include
-isyste
m /home/ang/llvm-gcc-97884/i686-pc-cygwin/sys-include -O2 -O2 -g -O2
 -DIN_GCC
  -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes
-Wold-style-
definition  -isystem ./include  -I. -I. -I/home/ang/svn/llvm-gcc-97884/gcc
-I/ho
me/ang/svn/llvm-gcc-97884/gcc/.
-I/home/ang/svn/llvm-gcc-97884/gcc/../include -I
/home/ang/svn/llvm-gcc-97884/gcc/../libcpp/include
 -I/home/ang/svn/llvm-gcc-978
84/gcc/../libdecnumber -I../libdecnumber
-I/home/ang/build/llvm-97884/include -I
/home/ang/svn/llvm-97884/include  -g0 -finhibit-size-directive
-fno-inline-funct
ions -fno-exceptions -fno-zero-initialized-in-bss -fno-toplevel-reorder  -c
-o c
rtbegin.o \
        /home/ang/svn/llvm-gcc-97884/gcc/config/i386/cygming-crtbegin.c
In file included from /home/ang/svn/llvm-gcc-97884/gcc/tsystem.h:47,
                 from
/home/ang/svn/llvm-gcc-97884/gcc/config/i386/cygming-crtbegin.c:37:
/home/ang/build/llvm-gcc-97884/./gcc/include/stddef.h:152: error: expected
ident
ifier or '(' before string constant
/home/ang/build/llvm-gcc-97884/./gcc/include/stddef.h:214: error: expected
ident
ifier or '(' before string constant
/home/ang/build/llvm-gcc-97884/./gcc/include/stddef.h:326: error: expected
ident
ifier or '(' before string constant
In file included from /usr/include/sys/_types.h:63,
                 from /usr/include/sys/reent.h:14,
                 from /usr/include/stdio.h:45,
                 from /home/ang/svn/llvm-gcc-97884/gcc/tsystem.h:90,
                 from
/home/ang/svn/llvm-gcc-97884/gcc/config/i386/cygming-crtbe
gin.c:37:
/home/ang/build/llvm-gcc-97884/./gcc/include/stddef.h:355: error: expected
ident
ifier or '(' before string constant
In file included from /usr/include/sys/reent.h:14,
                 from /usr/include/stdio.h:45,
                 from /home/ang/svn/llvm-gcc-97884/gcc/tsystem.h:90,
                 from
/home/ang/svn/llvm-gcc-97884/gcc/config/i386/cygming-crtbe
gin.c:37:
/usr/include/sys/_types.h:72: error: expected specifier-qualifier-list
before 'w
int_t'
In file included from /usr/include/stdio.h:65,
                 from /home/ang/svn/llvm-gcc-97884/gcc/tsystem.h:90,
                 from
/home/ang/svn/llvm-gcc-97884/gcc/config/i386/cygming-crtbe
gin.c:37:
/usr/include/sys/stdio.h:38: error: expected declaration specifiers or '...'
bef
ore 'size_t'
/usr/include/sys/stdio.h:39: error: expected declaration specifiers or '...'
bef
ore 'size_t'
In file included from /home/ang/svn/llvm-gcc-97884/gcc/tsystem.h:90,
                 from
/home/ang/svn/llvm-gcc-97884/gcc/config/i386/cygming-crtbe
gin.c:37:
/usr/include/stdio.h:181: error: expected declaration specifiers or '...'
before
 'size_t'
/usr/include/stdio.h:209: error: expected ',' or ';' before 'fread'
/usr/include/stdio.h:210: error: expected ',' or ';' before 'fwrite'
/usr/include/stdio.h:248: error: expected declaration specifiers or '...'
before
 'size_t'
/usr/include/stdio.h:248: error: format string argument not a string type
/usr/include/stdio.h:250: error: expected declaration specifiers or '...'
before
 'size_t'
/usr/include/stdio.h:250: error: format string argument not a string type
/usr/include/stdio.h:271: error: expected declaration specifiers or '...'
before
 'size_t'
~~~~

If you could give me a yay or nay as soon as is possible as this is a show
stopper for Cygwin getting into the 2.7 release.

Thanks,

Aaron
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From asl at math.spbu.ru  Tue Apr 13 15:35:01 2010
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Wed, 14 Apr 2010 00:35:01 +0400
Subject: [llvm-commits] [llvm] r97884 - in /llvm/trunk/lib/Target/X86:
	X86ISelLowering.cpp X86ISelLowering.h X86InstrInfo.td
	X86RegisterInfo.cpp
In-Reply-To: <k2j9719867c1004131326na5ace047s97ee986df539e6e2@mail.gmail.com>
References: <20100306193230.3B36F2A6C12C@llvm.org>
	<k2j9719867c1004131326na5ace047s97ee986df539e6e2@mail.gmail.com>
Message-ID: <y2tb087fca01004131335xa1634941w72d5bee9b49cf6be@mail.gmail.com>

Hello, Aaron

> AFAICT this has broken Cygwin LLVM-GCC in a strange way. I have bisected it
> down to this revision change.
> Basically some typedef's in stddef.h when
> compiling?gcc/config/i386/cygming-crtbegin.c?are not being parsed properly,
> very strange I know.
> Would you be able to look in to this please as I don't understand the
> ISelection area. Hopefully it is something simple.
No idea, the code looks correct to me (and before it was definitely incorrect).
You might want to compare the object files before and after this
revision to find a difference.

-- 
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University



From dpatel at apple.com  Tue Apr 13 15:35:04 2010
From: dpatel at apple.com (Devang Patel)
Date: Tue, 13 Apr 2010 20:35:04 -0000
Subject: [llvm-commits] [llvm] r101171 - in /llvm/trunk:
 lib/CodeGen/AsmPrinter/DwarfDebug.cpp test/DebugInfo/2010-04-13-PubType.ll
Message-ID: <20100413203504.422D22A6C12C@llvm.org>

Author: dpatel
Date: Tue Apr 13 15:35:04 2010
New Revision: 101171

URL: http://llvm.org/viewvc/llvm-project?rev=101171&view=rev
Log:
Do not include types without any definition in pubtypes list.

Added:
    llvm/trunk/test/DebugInfo/2010-04-13-PubType.ll
Modified:
    llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp

Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp?rev=101171&r1=101170&r2=101171&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp (original)
+++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp Tue Apr 13 15:35:04 2010
@@ -1612,7 +1612,8 @@
     if (!ATy.isValid())
       continue;
     DICompositeType CATy = getDICompositeType(ATy);
-    if (DIDescriptor(CATy.getNode()).Verify() && !CATy.getName().empty()) {
+    if (DIDescriptor(CATy.getNode()).Verify() && !CATy.getName().empty()
+        && !CATy.isForwardDecl()) {
       if (DIEEntry *Entry = ModuleCU->getDIEEntry(CATy.getNode()))
         ModuleCU->addGlobalType(CATy.getName(), Entry->getEntry());
     }
@@ -1804,7 +1805,8 @@
   ModuleCU->addGlobal(DI_GV.getName(), VariableDie);
 
   DIType GTy = DI_GV.getType();
-  if (GTy.isCompositeType() && !GTy.getName().empty()) {
+  if (GTy.isCompositeType() && !GTy.getName().empty()
+      && !GTy.isForwardDecl()) {
     DIEEntry *Entry = ModuleCU->getDIEEntry(GTy.getNode());
     assert(Entry && "Missing global type!");
     ModuleCU->addGlobalType(GTy.getName(), Entry->getEntry());

Added: llvm/trunk/test/DebugInfo/2010-04-13-PubType.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/2010-04-13-PubType.ll?rev=101171&view=auto
==============================================================================
--- llvm/trunk/test/DebugInfo/2010-04-13-PubType.ll (added)
+++ llvm/trunk/test/DebugInfo/2010-04-13-PubType.ll Tue Apr 13 15:35:04 2010
@@ -0,0 +1,48 @@
+; RUN: llc -O0 -asm-verbose < %s > %t
+; RUN: grep "External Name" %t | grep -v X
+; RUN: grep "External Name" %t | grep Y | count 1
+; Test to check type with no defintion is listed in pubtypes section.
+
+%struct.X = type opaque
+%struct.Y = type { i32 }
+
+define i32 @foo(%struct.X* %x, %struct.Y* %y) nounwind ssp {
+entry:
+  %x_addr = alloca %struct.X*                     ; <%struct.X**> [#uses=1]
+  %y_addr = alloca %struct.Y*                     ; <%struct.Y**> [#uses=1]
+  %retval = alloca i32                            ; <i32*> [#uses=2]
+  %0 = alloca i32                                 ; <i32*> [#uses=2]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  call void @llvm.dbg.declare(metadata !{%struct.X** %x_addr}, metadata !0), !dbg !13
+  store %struct.X* %x, %struct.X** %x_addr
+  call void @llvm.dbg.declare(metadata !{%struct.Y** %y_addr}, metadata !14), !dbg !13
+  store %struct.Y* %y, %struct.Y** %y_addr
+  store i32 0, i32* %0, align 4, !dbg !13
+  %1 = load i32* %0, align 4, !dbg !13            ; <i32> [#uses=1]
+  store i32 %1, i32* %retval, align 4, !dbg !13
+  br label %return, !dbg !13
+
+return:                                           ; preds = %entry
+  %retval1 = load i32* %retval, !dbg !13          ; <i32> [#uses=1]
+  ret i32 %retval1, !dbg !15
+}
+
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+
+!0 = metadata !{i32 524545, metadata !1, metadata !"x", metadata !2, i32 7, metadata !7} ; [ DW_TAG_arg_variable ]
+!1 = metadata !{i32 524334, i32 0, metadata !2, metadata !"foo", metadata !"foo", metadata !"foo", metadata !2, i32 7, metadata !4, i1 false, i1 true, i32 0, i32 0, null, i1 false} ; [ DW_TAG_subprogram ]
+!2 = metadata !{i32 524329, metadata !"a.c", metadata !"/tmp/", metadata !3} ; [ DW_TAG_file_type ]
+!3 = metadata !{i32 524305, i32 0, i32 1, metadata !"a.c", metadata !"/tmp/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ]
+!4 = metadata !{i32 524309, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !5, i32 0, null} ; [ DW_TAG_subroutine_type ]
+!5 = metadata !{metadata !6, metadata !7, metadata !9}
+!6 = metadata !{i32 524324, metadata !2, metadata !"int", metadata !2, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ]
+!7 = metadata !{i32 524303, metadata !2, metadata !"", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !8} ; [ DW_TAG_pointer_type ]
+!8 = metadata !{i32 524307, metadata !2, metadata !"X", metadata !2, i32 3, i64 0, i64 0, i64 0, i32 4, null, null, i32 0, null} ; [ DW_TAG_structure_type ]
+!9 = metadata !{i32 524303, metadata !2, metadata !"", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !10} ; [ DW_TAG_pointer_type ]
+!10 = metadata !{i32 524307, metadata !2, metadata !"Y", metadata !2, i32 4, i64 32, i64 32, i64 0, i32 0, null, metadata !11, i32 0, null} ; [ DW_TAG_structure_type ]
+!11 = metadata !{metadata !12}
+!12 = metadata !{i32 524301, metadata !10, metadata !"x", metadata !2, i32 5, i64 32, i64 32, i64 0, i32 0, metadata !6} ; [ DW_TAG_member ]
+!13 = metadata !{i32 7, i32 0, metadata !1, null}
+!14 = metadata !{i32 524545, metadata !1, metadata !"y", metadata !2, i32 7, metadata !9} ; [ DW_TAG_arg_variable ]
+!15 = metadata !{i32 7, i32 0, metadata !16, null}
+!16 = metadata !{i32 524299, metadata !1, i32 7, i32 0} ; [ DW_TAG_lexical_block ]




From johnny.chen at apple.com  Tue Apr 13 15:35:17 2010
From: johnny.chen at apple.com (Johnny Chen)
Date: Tue, 13 Apr 2010 20:35:17 -0000
Subject: [llvm-commits] [llvm] r101172 -
	/llvm/trunk/lib/Target/ARM/ARMAddressingModes.h
Message-ID: <20100413203517.1CE022A6C12C@llvm.org>

Author: johnny
Date: Tue Apr 13 15:35:16 2010
New Revision: 101172

URL: http://llvm.org/viewvc/llvm-project?rev=101172&view=rev
Log:
Changed getSOImmValRotate()'s hunt retry logic to ignore the low order 6 bits,
instead of 7, because we are only looking for even rotate amount.

Modified:
    llvm/trunk/lib/Target/ARM/ARMAddressingModes.h

Modified: llvm/trunk/lib/Target/ARM/ARMAddressingModes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAddressingModes.h?rev=101172&r1=101171&r2=101172&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMAddressingModes.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMAddressingModes.h Tue Apr 13 15:35:16 2010
@@ -151,10 +151,10 @@
     if ((rotr32(Imm, RotAmt) & ~255U) == 0)
       return (32-RotAmt)&31;  // HW rotates right, not left.
 
-    // For values like 0xF000000F, we should ignore the low 7 bits, then
+    // For values like 0xF000000F, we should ignore the low 6 bits, then
     // retry the hunt.
-    if (Imm & 127U) {
-      unsigned TZ2 = CountTrailingZeros_32(Imm & ~127U);
+    if (Imm & 63U) {
+      unsigned TZ2 = CountTrailingZeros_32(Imm & ~63U);
       unsigned RotAmt2 = TZ2 & ~1;
       if ((rotr32(Imm, RotAmt2) & ~255U) == 0)
         return (32-RotAmt2)&31;  // HW rotates right, not left.




From kremenek at apple.com  Tue Apr 13 15:52:50 2010
From: kremenek at apple.com (Ted Kremenek)
Date: Tue, 13 Apr 2010 20:52:50 -0000
Subject: [llvm-commits] [llvm] r101177 - in /llvm/trunk/tools:
 CMakeLists.txt edis/CMakeLists.txt edis/EDInfo.td llvm-mc/CMakeLists.txt
Message-ID: <20100413205250.BFC062A6C12C@llvm.org>

Author: kremenek
Date: Tue Apr 13 15:52:50 2010
New Revision: 101177

URL: http://llvm.org/viewvc/llvm-project?rev=101177&view=rev
Log:
Add CMake support for 'edis'.

Added:
    llvm/trunk/tools/edis/CMakeLists.txt
    llvm/trunk/tools/edis/EDInfo.td
Modified:
    llvm/trunk/tools/CMakeLists.txt
    llvm/trunk/tools/llvm-mc/CMakeLists.txt

Modified: llvm/trunk/tools/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/CMakeLists.txt?rev=101177&r1=101176&r2=101177&view=diff
==============================================================================
--- llvm/trunk/tools/CMakeLists.txt (original)
+++ llvm/trunk/tools/CMakeLists.txt Tue Apr 13 15:52:50 2010
@@ -31,6 +31,7 @@
 add_subdirectory(bugpoint)
 add_subdirectory(llvm-bcanalyzer)
 add_subdirectory(llvm-stub)
+add_subdirectory(edis)
 add_subdirectory(llvmc)
 
 if( EXISTS ${CMAKE_CURRENT_SOURCE_DIR}/clang/CMakeLists.txt )

Added: llvm/trunk/tools/edis/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/edis/CMakeLists.txt?rev=101177&view=auto
==============================================================================
--- llvm/trunk/tools/edis/CMakeLists.txt (added)
+++ llvm/trunk/tools/edis/CMakeLists.txt Tue Apr 13 15:52:50 2010
@@ -0,0 +1,41 @@
+set(SHARED_LIBRARY TRUE)
+set(LLVM_NO_RTTI 1)
+
+add_custom_command(OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/EDInfo.inc
+  COMMAND ${LLVM_TABLEGEN_EXE} -o ${CMAKE_CURRENT_BINARY_DIR}/EDInfo.inc
+          -gen-enhanced-disassembly-header ${CMAKE_CURRENT_SOURCE_DIR}/EDInfo.td
+  DEPENDS tblgen
+  COMMENT "Building enhanced disassembly semantic information header (EDInfo.inc)")
+set_source_files_properties(${CMAKE_CURRENT_BINARY_DIR}/EDInfo.inc PROPERTIES GENERATED 1)
+
+include_directories(${CMAKE_CURRENT_BINARY_DIR})
+
+add_llvm_library(EnhancedDisassembly
+  EDDisassembler.cpp
+  EDInst.cpp
+  EDMain.cpp
+  EDOperand.cpp
+  EDToken.cpp
+  ../../include/llvm-c/EnhancedDisassembly.h
+  ${CMAKE_CURRENT_BINARY_DIR}/EDInfo.inc
+)
+
+if(${CMAKE_SYSTEM_NAME} MATCHES "Darwin")
+  # FIXME: Deal with EDIS version?
+  set_target_properties(EnhancedDisassembly
+    PROPERTIES
+    LINK_FLAGS "-avoid-version -Wl,-exported_symbols_list -Wl,${CMAKE_CURRENT_SOURCE_DIR}/EnhancedDisassembly.exports -Wl,-dead_strip -Wl"
+    )
+endif()
+
+if(MSVC)
+  # windows.h doesn't compile with /Za
+  get_target_property(NON_ANSI_COMPILE_FLAGS CIndex COMPILE_FLAGS)
+  string(REPLACE /Za "" NON_ANSI_COMPILE_FLAGS ${NON_ANSI_COMPILE_FLAGS})
+  set_target_properties(EnhancedDisassembly PROPERTIES COMPILE_FLAGS ${NON_ANSI_COMPILE_FLAGS})
+endif(MSVC)
+
+set_target_properties(EnhancedDisassembly
+  PROPERTIES
+  LINKER_LANGUAGE CXX)
+  
\ No newline at end of file

Added: llvm/trunk/tools/edis/EDInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/edis/EDInfo.td?rev=101177&view=auto
==============================================================================
--- llvm/trunk/tools/edis/EDInfo.td (added)
+++ llvm/trunk/tools/edis/EDInfo.td Tue Apr 13 15:52:50 2010
@@ -0,0 +1 @@
+// Intentionally empty.

Modified: llvm/trunk/tools/llvm-mc/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/CMakeLists.txt?rev=101177&r1=101176&r2=101177&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-mc/CMakeLists.txt (original)
+++ llvm/trunk/tools/llvm-mc/CMakeLists.txt Tue Apr 13 15:52:50 2010
@@ -1,3 +1,4 @@
+set( LLVM_USED_LIBS EnhancedDisassembly)
 set(LLVM_LINK_COMPONENTS ${LLVM_TARGETS_TO_BUILD} support MC MCParser)
 
 add_llvm_tool(llvm-mc




From wendling at apple.com  Tue Apr 13 16:03:37 2010
From: wendling at apple.com (Bill Wendling)
Date: Tue, 13 Apr 2010 14:03:37 -0700
Subject: [llvm-commits] [llvm-gcc-4.2] r100149	-
	/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
In-Reply-To: <4BB59A6B.2050601@free.fr>
References: <20100401230827.A409D2A6C12C@llvm.org> <4BB59A6B.2050601@free.fr>
Message-ID: <D8C64E37-9E8E-4F6B-9520-A1ED2DF3ADAD@apple.com>

On Apr 2, 2010, at 12:19 AM, Duncan Sands wrote:

> Hi Bill,
> 
>> Set the proper linkage for the ".llvm.eh.catch.all.value" variable.
> 
> while you are there, maybe you can fix the problem that this variable breaks
> LTO with multi-language programs.  For example, if I compile some C++ then
> .llvm.eh.catch.all.value is set to null; with Ada it is to set some different
> Ada value.  If I link the bitcode for these two together than the result won't
> work, either because the Ada value will be used for the C++, or because the
> C++ value will be used with the Ada.  This variable should really be some kind
> of map from the personality function to the catch-all.
> 
Hi Duncan,

That's a longer-term goal of mine. Right now, it's dangerous to mix Ada, C++, etc. methods which could throw exceptions, because if they're inlined then they won't use the correct personality functions anyway.

But there is a bug in here...It's keeping this weak external around. I need to mark it as "private" or something...

-bw




From scallanan at apple.com  Tue Apr 13 16:21:57 2010
From: scallanan at apple.com (Sean Callanan)
Date: Tue, 13 Apr 2010 21:21:57 -0000
Subject: [llvm-commits] [llvm] r101179 - in /llvm/trunk:
 include/llvm/MC/EDInstInfo.h include/llvm/MC/MCDisassembler.h
 lib/Target/ARM/Disassembler/ARMDisassembler.cpp
 lib/Target/ARM/Disassembler/ARMDisassembler.h
 lib/Target/X86/Disassembler/X86Disassembler.cpp
 lib/Target/X86/Disassembler/X86Disassembler.h tools/edis/EDDisassembler.cpp
 tools/edis/EDDisassembler.h tools/edis/EDInst.cpp tools/edis/EDInst.h
 tools/edis/EDOperand.cpp tools/edis/Makefile utils/TableGen/EDEmitter.cpp
Message-ID: <20100413212157.D4E5B2A6C12C@llvm.org>

Author: spyffe
Date: Tue Apr 13 16:21:57 2010
New Revision: 101179

URL: http://llvm.org/viewvc/llvm-project?rev=101179&view=rev
Log:
Fixed a nasty layering violation in the edis source
code.  It used to #include the enhanced disassembly
information for the targets it supported straight
out of lib/Target/{X86,ARM,...} but now it uses a
new interface provided by MCDisassembler, and (so
far) implemented by X86 and ARM.

Also removed hacky #define-controlled initialization
of targets in edis.  If clients only want edis to
initialize a limited set of targets, they can set
--enable-targets on the configure command line.

Added:
    llvm/trunk/include/llvm/MC/EDInstInfo.h
Modified:
    llvm/trunk/include/llvm/MC/MCDisassembler.h
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.h
    llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp
    llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.h
    llvm/trunk/tools/edis/EDDisassembler.cpp
    llvm/trunk/tools/edis/EDDisassembler.h
    llvm/trunk/tools/edis/EDInst.cpp
    llvm/trunk/tools/edis/EDInst.h
    llvm/trunk/tools/edis/EDOperand.cpp
    llvm/trunk/tools/edis/Makefile
    llvm/trunk/utils/TableGen/EDEmitter.cpp

Added: llvm/trunk/include/llvm/MC/EDInstInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/EDInstInfo.h?rev=101179&view=auto
==============================================================================
--- llvm/trunk/include/llvm/MC/EDInstInfo.h (added)
+++ llvm/trunk/include/llvm/MC/EDInstInfo.h Tue Apr 13 16:21:57 2010
@@ -0,0 +1,29 @@
+//===-- llvm/MC/EDInstInfo.h - EDis instruction info ------------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+#ifndef EDINSTINFO_H
+#define EDINSTINFO_H
+
+#include "llvm/System/DataTypes.h"
+
+namespace llvm {
+  
+#define EDIS_MAX_OPERANDS 13
+#define EDIS_MAX_SYNTAXES 2
+
+struct EDInstInfo {
+  uint8_t       instructionType;
+  uint8_t       numOperands;
+  uint8_t       operandTypes[EDIS_MAX_OPERANDS];
+  uint8_t       operandFlags[EDIS_MAX_OPERANDS];
+  const char    operandOrders[EDIS_MAX_SYNTAXES][EDIS_MAX_OPERANDS];
+};
+  
+} // namespace llvm
+
+#endif

Modified: llvm/trunk/include/llvm/MC/MCDisassembler.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCDisassembler.h?rev=101179&r1=101178&r2=101179&view=diff
==============================================================================
--- llvm/trunk/include/llvm/MC/MCDisassembler.h (original)
+++ llvm/trunk/include/llvm/MC/MCDisassembler.h Tue Apr 13 16:21:57 2010
@@ -16,6 +16,8 @@
 class MCInst;
 class MemoryObject;
 class raw_ostream;
+  
+struct EDInstInfo;
 
 /// MCDisassembler - Superclass for all disassemblers.  Consumes a memory region
 ///   and provides an array of assembly instructions.
@@ -43,7 +45,15 @@
                                        const MemoryObject &region,
                                        uint64_t address,
                                        raw_ostream &vStream) const = 0;
-};  
+
+  /// getEDInfo - Returns the enhanced insturction information corresponding to
+  ///   the disassembler.
+  ///
+  /// @return         - An array of instruction information, with one entry for
+  ///                   each MCInst opcode this disassembler returns.
+  ///                   NULL if there is no info for this target.
+  virtual EDInstInfo   *getEDInfo() const { return NULL; }
+};
 
 } // namespace llvm
 

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp?rev=101179&r1=101178&r2=101179&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp Tue Apr 13 16:21:57 2010
@@ -18,6 +18,7 @@
 #include "ARMDisassembler.h"
 #include "ARMDisassemblerCore.h"
 
+#include "llvm/MC/EDInstInfo.h"
 #include "llvm/MC/MCInst.h"
 #include "llvm/Target/TargetRegistry.h"
 #include "llvm/Support/Debug.h"
@@ -38,7 +39,9 @@
 ///
 #include "../ARMGenDecoderTables.inc"
 
-namespace llvm {
+#include "../ARMGenEDInfo.inc"
+
+using namespace llvm;
 
 /// showBitVector - Use the raw_ostream to log a diagnostic message describing
 /// the inidividual bits of the instruction.
@@ -547,4 +550,10 @@
                                          createThumbDisassembler);
 }
 
-} // namespace llvm
+EDInstInfo *ARMDisassembler::getEDInfo() const {
+  return instInfoARM;
+}
+
+EDInstInfo *ThumbDisassembler::getEDInfo() const {
+  return instInfoARM;
+}

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.h?rev=101179&r1=101178&r2=101179&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.h (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.h Tue Apr 13 16:21:57 2010
@@ -24,6 +24,8 @@
 class MemoryObject;
 class raw_ostream;
   
+struct EDInstInfo;
+  
 /// ARMDisassembler - ARM disassembler for all ARM platforms.
 class ARMDisassembler : public MCDisassembler {
 public:
@@ -42,6 +44,9 @@
                       const MemoryObject &region,
                       uint64_t address,
                       raw_ostream &vStream) const;
+  
+  /// getEDInfo - See MCDisassembler.
+  EDInstInfo *getEDInfo() const;
 private:
 };
 
@@ -82,6 +87,9 @@
                       const MemoryObject &region,
                       uint64_t address,
                       raw_ostream &vStream) const;
+  
+  /// getEDInfo - See MCDisassembler.
+  EDInstInfo *getEDInfo() const;
 private:
   Session SO;
 };

Modified: llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp?rev=101179&r1=101178&r2=101179&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp (original)
+++ llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp Tue Apr 13 16:21:57 2010
@@ -17,6 +17,7 @@
 #include "X86Disassembler.h"
 #include "X86DisassemblerDecoder.h"
 
+#include "llvm/MC/EDInstInfo.h"
 #include "llvm/MC/MCDisassembler.h"
 #include "llvm/MC/MCDisassembler.h"
 #include "llvm/MC/MCInst.h"
@@ -26,6 +27,7 @@
 #include "llvm/Support/raw_ostream.h"
 
 #include "X86GenRegisterNames.inc"
+#include "X86GenEDInfo.inc"
 
 using namespace llvm;
 using namespace llvm::X86Disassembler;
@@ -69,6 +71,10 @@
 X86GenericDisassembler::~X86GenericDisassembler() {
 }
 
+EDInstInfo *X86GenericDisassembler::getEDInfo() const {
+  return instInfoX86;
+}
+
 /// regionReader - a callback function that wraps the readByte method from
 ///   MemoryObject.
 ///

Modified: llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.h?rev=101179&r1=101178&r2=101179&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.h (original)
+++ llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.h Tue Apr 13 16:21:57 2010
@@ -94,6 +94,8 @@
 class MCInst;
 class MemoryObject;
 class raw_ostream;
+
+struct EDInstInfo;
   
 namespace X86Disassembler {
 
@@ -115,6 +117,9 @@
                       const MemoryObject &region,
                       uint64_t address,
                       raw_ostream &vStream) const;
+
+  /// getEDInfo - See MCDisassembler.
+  EDInstInfo *getEDInfo() const;
 private:
   DisassemblerMode              fMode;
 };

Modified: llvm/trunk/tools/edis/EDDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/edis/EDDisassembler.cpp?rev=101179&r1=101178&r2=101179&view=diff
==============================================================================
--- llvm/trunk/tools/edis/EDDisassembler.cpp (original)
+++ llvm/trunk/tools/edis/EDDisassembler.cpp Tue Apr 13 16:21:57 2010
@@ -18,6 +18,7 @@
 
 #include "llvm/ADT/OwningPtr.h"
 #include "llvm/ADT/SmallVector.h"
+#include "llvm/MC/EDInstInfo.h"
 #include "llvm/MC/MCAsmInfo.h"
 #include "llvm/MC/MCContext.h"
 #include "llvm/MC/MCDisassembler.h"
@@ -39,47 +40,34 @@
 #include "llvm/Target/TargetRegisterInfo.h"
 #include "llvm/Target/TargetSelect.h"
 
-#ifdef EDIS_X86
-#include "../../lib/Target/X86/X86GenEDInfo.inc"
-#endif
-
-#ifdef EDIS_ARM
-#include "../../lib/Target/ARM/ARMGenEDInfo.inc"
-#endif
-
 using namespace llvm;
 
 bool EDDisassembler::sInitialized = false;
 EDDisassembler::DisassemblerMap_t EDDisassembler::sDisassemblers;
 
-struct InfoMap {
+struct TripleMap {
   Triple::ArchType Arch;
   const char *String;
-  const InstInfo *Info;
 };
 
-static struct InfoMap infomap[] = {
-#ifdef EDIS_X86
-  { Triple::x86,          "i386-unknown-unknown",   instInfoX86 },
-  { Triple::x86_64,       "x86_64-unknown-unknown", instInfoX86 },
-#endif
-#ifdef EDIS_ARM
-  { Triple::arm,          "arm-unknown-unknown",    instInfoARM },
-  { Triple::thumb,        "thumb-unknown-unknown",  instInfoARM },
-#endif
-  { Triple::InvalidArch,  NULL,                     NULL        }
+static struct TripleMap triplemap[] = {
+  { Triple::x86,          "i386-unknown-unknown"    },
+  { Triple::x86_64,       "x86_64-unknown-unknown"  },
+  { Triple::arm,          "arm-unknown-unknown"     },
+  { Triple::thumb,        "thumb-unknown-unknown"   },
+  { Triple::InvalidArch,  NULL,                     }
 };
 
-/// infoFromArch - Returns the InfoMap corresponding to a given architecture,
+/// infoFromArch - Returns the TripleMap corresponding to a given architecture,
 ///   or NULL if there is an error
 ///
 /// @arg arch - The Triple::ArchType for the desired architecture
-static const InfoMap *infoFromArch(Triple::ArchType arch) {
+static const char *tripleFromArch(Triple::ArchType arch) {
   unsigned int infoIndex;
   
-  for (infoIndex = 0; infomap[infoIndex].String != NULL; ++infoIndex) {
-    if (arch == infomap[infoIndex].Arch)
-      return &infomap[infoIndex];
+  for (infoIndex = 0; triplemap[infoIndex].String != NULL; ++infoIndex) {
+    if (arch == triplemap[infoIndex].Arch)
+      return triplemap[infoIndex].String;
   }
   
   return NULL;
@@ -115,25 +103,17 @@
   }
 }
 
-#define BRINGUP_TARGET(tgt)           \
-  LLVMInitialize##tgt##TargetInfo();  \
-  LLVMInitialize##tgt##Target();      \
-  LLVMInitialize##tgt##AsmPrinter();  \
-  LLVMInitialize##tgt##AsmParser();   \
-  LLVMInitialize##tgt##Disassembler();
-
 void EDDisassembler::initialize() {
   if (sInitialized)
     return;
   
   sInitialized = true;
   
-#ifdef EDIS_X86
-  BRINGUP_TARGET(X86)
-#endif
-#ifdef EDIS_ARM
-  BRINGUP_TARGET(ARM)
-#endif
+  InitializeAllTargetInfos();
+  InitializeAllTargets();
+  InitializeAllAsmPrinters();
+  InitializeAllAsmParsers();
+  InitializeAllDisassemblers();
 }
 
 #undef BRINGUP_TARGET
@@ -175,14 +155,10 @@
   HasSemantics(false), 
   ErrorStream(nulls()), 
   Key(key) {
-  const InfoMap *infoMap = infoFromArch(key.Arch);
-  
-  if (!infoMap)
-    return;
+  const char *triple = tripleFromArch(key.Arch);
     
-  InstInfos = infoMap->Info;
-  
-  const char *triple = infoMap->String;
+  if (!triple)
+    return;
   
   LLVMSyntaxVariant = getLLVMSyntaxVariant(key.Arch, key.Syntax);
   
@@ -220,6 +196,8 @@
   
   if (!Disassembler)
     return;
+    
+  InstInfos = Disassembler->getEDInfo();
   
   InstString.reset(new std::string);
   InstStream.reset(new raw_string_ostream(*InstString));
@@ -231,8 +209,6 @@
   GenericAsmLexer.reset(new AsmLexer(*AsmInfo));
   SpecificAsmLexer.reset(Tgt->createAsmLexer(*AsmInfo));
   SpecificAsmLexer->InstallLexer(*GenericAsmLexer);
-                          
-  InstInfos = infoMap->Info;
   
   initMaps(*targetMachine->getRegisterInfo());
     
@@ -285,7 +261,7 @@
     delete inst;
     return NULL;
   } else {
-    const InstInfo *thisInstInfo;
+    const llvm::EDInstInfo *thisInstInfo;
 
     thisInstInfo = &InstInfos[inst->getOpcode()];
     
@@ -308,7 +284,6 @@
   switch (Key.Arch) {
   default:
     break;
-#ifdef EDIS_X86
   case Triple::x86:
   case Triple::x86_64:
     stackPointers.insert(registerIDWithName("SP"));
@@ -319,15 +294,12 @@
     programCounters.insert(registerIDWithName("EIP"));
     programCounters.insert(registerIDWithName("RIP"));
     break;
-#endif
-#ifdef EDIS_ARM
   case Triple::arm:
   case Triple::thumb:
     stackPointers.insert(registerIDWithName("SP"));
     
     programCounters.insert(registerIDWithName("PC"));
     break;  
-#endif
   }
 }
 

Modified: llvm/trunk/tools/edis/EDDisassembler.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/edis/EDDisassembler.h?rev=101179&r1=101178&r2=101179&view=diff
==============================================================================
--- llvm/trunk/tools/edis/EDDisassembler.h (original)
+++ llvm/trunk/tools/edis/EDDisassembler.h Tue Apr 13 16:21:57 2010
@@ -48,6 +48,8 @@
 class SourceMgr;
 class Target;
 class TargetRegisterInfo;
+
+struct EDInstInfo;
 }
 
 /// EDDisassembler - Encapsulates a disassembler for a single architecture and
@@ -143,7 +145,7 @@
   llvm::sys::Mutex PrinterMutex;
   /// The array of instruction information provided by the TableGen backend for
   ///   the target architecture
-  const InstInfo *InstInfos;
+  const llvm::EDInstInfo *InstInfos;
   /// The target-specific lexer for use in tokenizing strings, in
   ///   target-independent and target-specific portions
   llvm::OwningPtr<llvm::AsmLexer> GenericAsmLexer;

Modified: llvm/trunk/tools/edis/EDInst.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/edis/EDInst.cpp?rev=101179&r1=101178&r2=101179&view=diff
==============================================================================
--- llvm/trunk/tools/edis/EDInst.cpp (original)
+++ llvm/trunk/tools/edis/EDInst.cpp Tue Apr 13 16:21:57 2010
@@ -18,6 +18,7 @@
 #include "EDOperand.h"
 #include "EDToken.h"
 
+#include "llvm/MC/EDInstInfo.h"
 #include "llvm/MC/MCInst.h"
 
 using namespace llvm;
@@ -25,7 +26,7 @@
 EDInst::EDInst(llvm::MCInst *inst,
                uint64_t byteSize, 
                EDDisassembler &disassembler,
-               const InstInfo *info) :
+               const llvm::EDInstInfo *info) :
   Disassembler(disassembler),
   Inst(inst),
   ThisInstInfo(info),

Modified: llvm/trunk/tools/edis/EDInst.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/edis/EDInst.h?rev=101179&r1=101178&r2=101179&view=diff
==============================================================================
--- llvm/trunk/tools/edis/EDInst.h (original)
+++ llvm/trunk/tools/edis/EDInst.h Tue Apr 13 16:21:57 2010
@@ -23,6 +23,10 @@
 #include <string>
 #include <vector>
 
+namespace llvm {
+  struct EDInstInfo;
+}
+
 /// CachedResult - Encapsulates the result of a function along with the validity
 ///   of that result, so that slow functions don't need to run twice
 struct CachedResult {
@@ -54,7 +58,7 @@
   /// The containing MCInst
   llvm::MCInst *Inst;
   /// The instruction information provided by TableGen for this instruction
-  const InstInfo *ThisInstInfo;
+  const llvm::EDInstInfo *ThisInstInfo;
   /// The number of bytes for the machine code representation of the instruction
   uint64_t ByteSize;
   
@@ -95,7 +99,7 @@
   EDInst(llvm::MCInst *inst,
          uint64_t byteSize,
          EDDisassembler &disassembler,
-         const InstInfo *instInfo);
+         const llvm::EDInstInfo *instInfo);
   ~EDInst();
   
   /// byteSize - returns the number of bytes consumed by the machine code

Modified: llvm/trunk/tools/edis/EDOperand.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/edis/EDOperand.cpp?rev=101179&r1=101178&r2=101179&view=diff
==============================================================================
--- llvm/trunk/tools/edis/EDOperand.cpp (original)
+++ llvm/trunk/tools/edis/EDOperand.cpp Tue Apr 13 16:21:57 2010
@@ -17,6 +17,7 @@
 #include "EDInst.h"
 #include "EDOperand.h"
 
+#include "llvm/MC/EDInstInfo.h"
 #include "llvm/MC/MCInst.h"
 
 using namespace llvm;

Modified: llvm/trunk/tools/edis/Makefile
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/edis/Makefile?rev=101179&r1=101178&r2=101179&view=diff
==============================================================================
--- llvm/trunk/tools/edis/Makefile (original)
+++ llvm/trunk/tools/edis/Makefile Tue Apr 13 16:21:57 2010
@@ -49,18 +49,6 @@
     endif
 endif
 
-EDIS_DEFINES = 
-
-ifneq (,$(findstring X86,$(TARGETS_TO_BUILD)))
-	EDIS_DEFINES := $(EDIS_DEFINES) -DEDIS_X86
-endif
-
-ifneq (,$(findstring ARM,$(TARGETS_TO_BUILD)))
-	EDIS_DEFINES := $(EDIS_DEFINES) -DEDIS_ARM
-endif
-
-CXXFLAGS := $(CXXFLAGS) $(EDIS_DEFINES)
-
 EDInfo.inc:	$(TBLGEN)
 	$(Echo) "Building semantic information header"
 	$(Verb) $(TableGen) -o $(call SYSPATH, $@) -gen-enhanced-disassembly-header /dev/null

Modified: llvm/trunk/utils/TableGen/EDEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/EDEmitter.cpp?rev=101179&r1=101178&r2=101179&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/EDEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/EDEmitter.cpp Tue Apr 13 16:21:57 2010
@@ -19,6 +19,7 @@
 #include "CodeGenTarget.h"
 #include "Record.h"
 
+#include "llvm/MC/EDInstInfo.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/Format.h"
 #include "llvm/Support/raw_ostream.h"
@@ -27,9 +28,6 @@
 #include <string>
 #include <vector>
 
-#define MAX_OPERANDS 13
-#define MAX_SYNTAXES 2
-
 using namespace llvm;
 
 ///////////////////////////////////////////////////////////
@@ -376,7 +374,7 @@
 /// @operandFlags - A reference the array of operand flag objects
 /// @inst         - The instruction to use as a source of information
 static void X86PopulateOperands(
-  LiteralConstantEmitter *(&operandTypes)[MAX_OPERANDS],
+  LiteralConstantEmitter *(&operandTypes)[EDIS_MAX_OPERANDS],
   const CodeGenInstruction &inst) {
   if (!inst.TheDef->isSubClassOf("X86Inst"))
     return;
@@ -406,7 +404,7 @@
 /// @opName       - The name of the operand
 /// @flag         - The name of the flag to add
 static inline void decorate1(
-  FlagsConstantEmitter *(&operandFlags)[MAX_OPERANDS],
+  FlagsConstantEmitter *(&operandFlags)[EDIS_MAX_OPERANDS],
   const CodeGenInstruction &inst,
   const char *opName,
   const char *opFlag) {
@@ -458,7 +456,7 @@
 /// @arg inst         - A reference to the original instruction
 static void X86ExtractSemantics(
   LiteralConstantEmitter &instType,
-  FlagsConstantEmitter *(&operandFlags)[MAX_OPERANDS],
+  FlagsConstantEmitter *(&operandFlags)[EDIS_MAX_OPERANDS],
   const CodeGenInstruction &inst) {
   const std::string &name = inst.TheDef->getName();
     
@@ -655,7 +653,7 @@
 /// @operandFlags - A reference the array of operand flag objects
 /// @inst         - The instruction to use as a source of information
 static void ARMPopulateOperands(
-  LiteralConstantEmitter *(&operandTypes)[MAX_OPERANDS],
+  LiteralConstantEmitter *(&operandTypes)[EDIS_MAX_OPERANDS],
   const CodeGenInstruction &inst) {
   if (!inst.TheDef->isSubClassOf("InstARM") &&
       !inst.TheDef->isSubClassOf("InstThumb"))
@@ -664,8 +662,9 @@
   unsigned int index;
   unsigned int numOperands = inst.OperandList.size();
   
-  if (numOperands > MAX_OPERANDS) {
-    errs() << "numOperands == " << numOperands << " > " << MAX_OPERANDS << '\n';
+  if (numOperands > EDIS_MAX_OPERANDS) {
+    errs() << "numOperands == " << numOperands << " > " << 
+      EDIS_MAX_OPERANDS << '\n';
     llvm_unreachable("Too many operands");
   }
   
@@ -698,8 +697,8 @@
 /// @arg inst         - A reference to the original instruction
 static void ARMExtractSemantics(
   LiteralConstantEmitter &instType,
-  LiteralConstantEmitter *(&operandTypes)[MAX_OPERANDS],
-  FlagsConstantEmitter *(&operandFlags)[MAX_OPERANDS],
+  LiteralConstantEmitter *(&operandTypes)[EDIS_MAX_OPERANDS],
+  FlagsConstantEmitter *(&operandFlags)[EDIS_MAX_OPERANDS],
   const CodeGenInstruction &inst) {
   const std::string &name = inst.TheDef->getName();
   
@@ -759,15 +758,15 @@
     CompoundConstantEmitter *operandTypeArray = new CompoundConstantEmitter;
     infoStruct->addEntry(operandTypeArray);
     
-    LiteralConstantEmitter *operandTypes[MAX_OPERANDS];
+    LiteralConstantEmitter *operandTypes[EDIS_MAX_OPERANDS];
                          
     CompoundConstantEmitter *operandFlagArray = new CompoundConstantEmitter;
     infoStruct->addEntry(operandFlagArray);
         
-    FlagsConstantEmitter *operandFlags[MAX_OPERANDS];
+    FlagsConstantEmitter *operandFlags[EDIS_MAX_OPERANDS];
     
     for (unsigned operandIndex = 0; 
-         operandIndex < MAX_OPERANDS; 
+         operandIndex < EDIS_MAX_OPERANDS; 
          ++operandIndex) {
       operandTypes[operandIndex] = new LiteralConstantEmitter;
       operandTypeArray->addEntry(operandTypes[operandIndex]);
@@ -793,9 +792,11 @@
     
     infoStruct->addEntry(operandOrderArray);
     
-    for (unsigned syntaxIndex = 0; syntaxIndex < MAX_SYNTAXES; ++syntaxIndex) {
+    for (unsigned syntaxIndex = 0; 
+         syntaxIndex < EDIS_MAX_SYNTAXES; 
+         ++syntaxIndex) {
       CompoundConstantEmitter *operandOrder = 
-        new CompoundConstantEmitter(MAX_OPERANDS);
+        new CompoundConstantEmitter(EDIS_MAX_OPERANDS);
       
       operandOrderArray->addEntry(operandOrder);
       
@@ -808,33 +809,7 @@
   }
 }
 
-void EDEmitter::run(raw_ostream &o) {
-  unsigned int i = 0;
-  
-  CompoundConstantEmitter infoArray;
-  CodeGenTarget target;
-  
-  populateInstInfo(infoArray, target);
-  
-  o << "InstInfo instInfo" << target.getName().c_str() << "[] = ";
-  infoArray.emit(o, i);
-  o << ";" << "\n";
-}
-
-void EDEmitter::runHeader(raw_ostream &o) {
-  EmitSourceFileHeader("Enhanced Disassembly Info Header", o);
-  
-  o << "#ifndef EDInfo_" << "\n";
-  o << "#define EDInfo_" << "\n";
-  o << "\n";
-  o << "#include <inttypes.h>" << "\n";
-  o << "\n";
-  o << "#define MAX_OPERANDS " << format("%d", MAX_OPERANDS) << "\n";
-  o << "#define MAX_SYNTAXES " << format("%d", MAX_SYNTAXES) << "\n";
-  o << "\n";
-  
-  unsigned int i = 0;
-  
+static void emitCommonEnums(raw_ostream &o, unsigned int &i) {
   EnumEmitter operandTypes("OperandTypes");
   operandTypes.addEntry("kOperandTypeNone");
   operandTypes.addEntry("kOperandTypeImmediate");
@@ -872,7 +847,6 @@
   operandTypes.addEntry("kOperandTypeThumb2AddrModeSoReg");
   operandTypes.addEntry("kOperandTypeThumb2AddrModeImm8s4");
   operandTypes.addEntry("kOperandTypeThumb2AddrModeImm8s4Offset");
-  
   operandTypes.emit(o, i);
   
   o << "\n";
@@ -895,14 +869,42 @@
   instructionTypes.emit(o, i);
   
   o << "\n";
+}
+
+void EDEmitter::run(raw_ostream &o) {
+  unsigned int i = 0;
+  
+  CompoundConstantEmitter infoArray;
+  CodeGenTarget target;
+  
+  populateInstInfo(infoArray, target);
+  
+  emitCommonEnums(o, i);
+  
+  o << "namespace {\n";
+  
+  o << "llvm::EDInstInfo instInfo" << target.getName().c_str() << "[] = ";
+  infoArray.emit(o, i);
+  o << ";" << "\n";
+  
+  o << "}\n";
+}
+
+void EDEmitter::runHeader(raw_ostream &o) {
+  EmitSourceFileHeader("Enhanced Disassembly Info Header", o);
+  
+  o << "#ifndef EDInfo_" << "\n";
+  o << "#define EDInfo_" << "\n";
+  o << "\n";
+  o << "#include <inttypes.h>" << "\n";
+  o << "\n";
+  o << "#define EDIS_MAX_OPERANDS " << format("%d", EDIS_MAX_OPERANDS) << "\n";
+  o << "#define EDIS_MAX_SYNTAXES " << format("%d", EDIS_MAX_SYNTAXES) << "\n";
+  o << "\n";
+  
+  unsigned int i = 0;
   
-  StructEmitter instInfo("InstInfo");
-  instInfo.addMember("uint8_t", "instructionType");
-  instInfo.addMember("uint8_t", "numOperands");
-  instInfo.addMember("uint8_t", "operandTypes[MAX_OPERANDS]");
-  instInfo.addMember("uint8_t", "operandFlags[MAX_OPERANDS]");
-  instInfo.addMember("const char", "operandOrders[MAX_SYNTAXES][MAX_OPERANDS]");
-  instInfo.emit(o, i);
+  emitCommonEnums(o, i);
   
   o << "\n";
   o << "#endif" << "\n";




From scallanan at apple.com  Tue Apr 13 16:36:35 2010
From: scallanan at apple.com (Sean Callanan)
Date: Tue, 13 Apr 2010 21:36:35 -0000
Subject: [llvm-commits] [llvm] r101180 -
	/llvm/trunk/include/llvm/MC/MCDisassembler.h
Message-ID: <20100413213635.A57A02A6C12C@llvm.org>

Author: spyffe
Date: Tue Apr 13 16:36:35 2010
New Revision: 101180

URL: http://llvm.org/viewvc/llvm-project?rev=101180&view=rev
Log:
Quick fix for build errors caused by undefined
NULL.

Modified:
    llvm/trunk/include/llvm/MC/MCDisassembler.h

Modified: llvm/trunk/include/llvm/MC/MCDisassembler.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCDisassembler.h?rev=101180&r1=101179&r2=101180&view=diff
==============================================================================
--- llvm/trunk/include/llvm/MC/MCDisassembler.h (original)
+++ llvm/trunk/include/llvm/MC/MCDisassembler.h Tue Apr 13 16:36:35 2010
@@ -52,7 +52,7 @@
   /// @return         - An array of instruction information, with one entry for
   ///                   each MCInst opcode this disassembler returns.
   ///                   NULL if there is no info for this target.
-  virtual EDInstInfo   *getEDInfo() const { return NULL; }
+  virtual EDInstInfo   *getEDInfo() const { return (EDInstInfo*)0; }
 };
 
 } // namespace llvm




From bob.wilson at apple.com  Tue Apr 13 17:03:22 2010
From: bob.wilson at apple.com (Bob Wilson)
Date: Tue, 13 Apr 2010 22:03:22 -0000
Subject: [llvm-commits] [llvm] r101181 - in /llvm/trunk:
 lib/Target/ARM/ARMISelLowering.cpp
 test/CodeGen/ARM/2010-04-13-v2f64SplitArg.ll
Message-ID: <20100413220322.7D4062A6C12C@llvm.org>

Author: bwilson
Date: Tue Apr 13 17:03:22 2010
New Revision: 101181

URL: http://llvm.org/viewvc/llvm-project?rev=101181&view=rev
Log:
Handle a v2f64 formal parameter that is split between registers and memory
such that the entire second half is in memory.  Radar 7855014.

Added:
    llvm/trunk/test/CodeGen/ARM/2010-04-13-v2f64SplitArg.ll
Modified:
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=101181&r1=101180&r2=101181&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Tue Apr 13 17:03:22 2010
@@ -1613,10 +1613,8 @@
 
   SDValue ArgValue2;
   if (NextVA.isMemLoc()) {
-    unsigned ArgSize = NextVA.getLocVT().getSizeInBits()/8;
     MachineFrameInfo *MFI = MF.getFrameInfo();
-    int FI = MFI->CreateFixedObject(ArgSize, NextVA.getLocMemOffset(),
-                                    true, false);
+    int FI = MFI->CreateFixedObject(4, NextVA.getLocMemOffset(), true, false);
 
     // Create load node to retrieve arguments from the stack.
     SDValue FIN = DAG.getFrameIndex(FI, getPointerTy());
@@ -1665,14 +1663,22 @@
       if (VA.needsCustom()) {
         // f64 and vector types are split up into multiple registers or
         // combinations of registers and stack slots.
-        RegVT = MVT::i32;
-
         if (VA.getLocVT() == MVT::v2f64) {
           SDValue ArgValue1 = GetF64FormalArgument(VA, ArgLocs[++i],
                                                    Chain, DAG, dl);
           VA = ArgLocs[++i]; // skip ahead to next loc
-          SDValue ArgValue2 = GetF64FormalArgument(VA, ArgLocs[++i],
-                                                   Chain, DAG, dl);
+          SDValue ArgValue2;
+          if (VA.isMemLoc()) {
+            int FI = MFI->CreateFixedObject(8, VA.getLocMemOffset(),
+                                            true, false);
+            SDValue FIN = DAG.getFrameIndex(FI, getPointerTy());
+            ArgValue2 = DAG.getLoad(MVT::f64, dl, Chain, FIN,
+                                    PseudoSourceValue::getFixedStack(FI), 0,
+                                    false, false, 0);
+          } else {
+            ArgValue2 = GetF64FormalArgument(VA, ArgLocs[++i],
+                                             Chain, DAG, dl);
+          }
           ArgValue = DAG.getNode(ISD::UNDEF, dl, MVT::v2f64);
           ArgValue = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64,
                                  ArgValue, ArgValue1, DAG.getIntPtrConstant(0));

Added: llvm/trunk/test/CodeGen/ARM/2010-04-13-v2f64SplitArg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2010-04-13-v2f64SplitArg.ll?rev=101181&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/2010-04-13-v2f64SplitArg.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/2010-04-13-v2f64SplitArg.ll Tue Apr 13 17:03:22 2010
@@ -0,0 +1,7 @@
+; RUN: llc < %s -mtriple=arm-apple-darwin -mcpu=cortex-a8
+; Radar 7855014
+
+define arm_apcscc void @test1(i32 %f0, i32 %f1, i32 %f2, <4 x i32> %f3) nounwind {
+entry:
+  unreachable
+}




From evan.cheng at apple.com  Tue Apr 13 17:10:03 2010
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 13 Apr 2010 22:10:03 -0000
Subject: [llvm-commits] [llvm] r101182 -
	/llvm/trunk/test/CodeGen/X86/postra-licm.ll
Message-ID: <20100413221003.59EAF2A6C12C@llvm.org>

Author: evancheng
Date: Tue Apr 13 17:10:03 2010
New Revision: 101182

URL: http://llvm.org/viewvc/llvm-project?rev=101182&view=rev
Log:
Add test for post-ra machine licm.

Modified:
    llvm/trunk/test/CodeGen/X86/postra-licm.ll

Modified: llvm/trunk/test/CodeGen/X86/postra-licm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/postra-licm.ll?rev=101182&r1=101181&r2=101182&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/postra-licm.ll (original)
+++ llvm/trunk/test/CodeGen/X86/postra-licm.ll Tue Apr 13 17:10:03 2010
@@ -1,4 +1,5 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=pic -disable-fp-elim | FileCheck %s
+; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=pic -disable-fp-elim | FileCheck %s -check-prefix=X86-32
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -relocation-model=pic -disable-fp-elim | FileCheck %s -check-prefix=X86-64
 
 ; MachineLICM should be able to hoist loop invariant reload out of the loop.
 ; rdar://7233099
@@ -13,8 +14,8 @@
 @.str19 = external constant [7 x i8], align 1     ; <[7 x i8]*> [#uses=1]
 @.str24 = external constant [4 x i8], align 1     ; <[4 x i8]*> [#uses=1]
 
-define i32 @main(i32 %c, i8** nocapture %v) nounwind ssp {
-; CHECK: main:
+define i32 @t1(i32 %c, i8** nocapture %v) nounwind ssp {
+; X86-32: t1:
 entry:
   br i1 undef, label %bb, label %bb3
 
@@ -67,10 +68,10 @@
 
 bb23:                                             ; preds = %imix_test.exit
   unreachable
-; CHECK: %bb26.preheader.bb28_crit_edge
-; CHECK: movl -16(%ebp),
-; CHECK-NEXT: .align 4
-; CHECK-NEXT: %bb28
+; X86-32: %bb26.preheader.bb28_crit_edge
+; X86-32: movl -16(%ebp),
+; X86-32-NEXT: .align 4
+; X86-32-NEXT: %bb28
 
 bb28:                                             ; preds = %bb28, %bb26.preheader
   %counter.035 = phi i32 [ %3, %bb28 ], [ 0, %bb26.preheader ] ; <i32> [#uses=2]
@@ -138,3 +139,48 @@
 declare i32 @feof(%struct.FILE* nocapture) nounwind
 
 declare i32 @strcmp(i8* nocapture, i8* nocapture) nounwind readonly
+
+ at map_4_to_16 = external constant [16 x i16], align 32 ; <[16 x i16]*> [#uses=2]
+
+define void @t2(i8* nocapture %bufp, i8* nocapture %data, i32 %dsize) nounwind ssp {
+; X86-64: t2:
+entry:
+  br i1 undef, label %return, label %bb.nph
+
+bb.nph:                                           ; preds = %entry
+; X86-64: movq _map_4_to_16 at GOTPCREL(%rip)
+; X86-64: movq _map_4_to_16 at GOTPCREL(%rip)
+; X86-64: .align 4
+  %tmp5 = zext i32 undef to i64                   ; <i64> [#uses=1]
+  %tmp6 = add i64 %tmp5, 1                        ; <i64> [#uses=1]
+  %tmp11 = shl i64 undef, 1                       ; <i64> [#uses=1]
+  %tmp14 = mul i64 undef, 3                       ; <i64> [#uses=1]
+  br label %bb
+
+bb:                                               ; preds = %bb, %bb.nph
+  %tmp9 = mul i64 undef, undef                    ; <i64> [#uses=2]
+  %tmp12 = add i64 %tmp11, %tmp9                  ; <i64> [#uses=1]
+  %scevgep13 = getelementptr i8* %bufp, i64 %tmp12 ; <i8*> [#uses=1]
+  %tmp15 = add i64 %tmp14, %tmp9                  ; <i64> [#uses=1]
+  %scevgep16 = getelementptr i8* %bufp, i64 %tmp15 ; <i8*> [#uses=1]
+  %0 = load i8* undef, align 1                    ; <i8> [#uses=1]
+  %1 = zext i8 %0 to i32                          ; <i32> [#uses=1]
+  %2 = getelementptr inbounds [16 x i16]* @map_4_to_16, i64 0, i64 0 ; <i16*> [#uses=1]
+  %3 = load i16* %2, align 2                      ; <i16> [#uses=1]
+  %4 = trunc i16 %3 to i8                         ; <i8> [#uses=1]
+  store i8 %4, i8* undef, align 1
+  %5 = and i32 %1, 15                             ; <i32> [#uses=1]
+  %6 = zext i32 %5 to i64                         ; <i64> [#uses=1]
+  %7 = getelementptr inbounds [16 x i16]* @map_4_to_16, i64 0, i64 %6 ; <i16*> [#uses=1]
+  %8 = load i16* %7, align 2                      ; <i16> [#uses=2]
+  %9 = lshr i16 %8, 8                             ; <i16> [#uses=1]
+  %10 = trunc i16 %9 to i8                        ; <i8> [#uses=1]
+  store i8 %10, i8* %scevgep13, align 1
+  %11 = trunc i16 %8 to i8                        ; <i8> [#uses=1]
+  store i8 %11, i8* %scevgep16, align 1
+  %exitcond = icmp eq i64 undef, %tmp6            ; <i1> [#uses=1]
+  br i1 %exitcond, label %return, label %bb
+
+return:                                           ; preds = %bb, %entry
+  ret void
+}




From evan.cheng at apple.com  Tue Apr 13 17:13:34 2010
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 13 Apr 2010 22:13:34 -0000
Subject: [llvm-commits] [llvm] r101183 -
	/llvm/trunk/lib/CodeGen/MachineLICM.cpp
Message-ID: <20100413221334.EBFEF2A6C12C@llvm.org>

Author: evancheng
Date: Tue Apr 13 17:13:34 2010
New Revision: 101183

URL: http://llvm.org/viewvc/llvm-project?rev=101183&view=rev
Log:
Fast path implicit_def check.

Modified:
    llvm/trunk/lib/CodeGen/MachineLICM.cpp

Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=101183&r1=101182&r2=101183&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Tue Apr 13 17:13:34 2010
@@ -300,7 +300,7 @@
            "Not expecting virtual register!");
 
     if (!MO.isDef()) {
-      if (PhysRegDefs[Reg])
+      if (Reg && PhysRegDefs[Reg])
         // If it's using a non-loop-invariant register, then it's obviously not
         // safe to hoist.
         HasNonInvariantUse = true;
@@ -406,7 +406,7 @@
       MachineInstr *MI = Candidates[i].MI;
       for (unsigned j = 0, ee = MI->getNumOperands(); j != ee; ++j) {
         const MachineOperand &MO = MI->getOperand(j);
-        if (!MO.isReg() || MO.isDef())
+        if (!MO.isReg() || MO.isDef() || !MO.getReg())
           continue;
         if (PhysRegDefs[MO.getReg()]) {
           // If it's using a non-loop-invariant register, then it's obviously
@@ -502,6 +502,9 @@
 /// candidate for LICM. e.g. If the instruction is a call, then it's obviously
 /// not safe to hoist it.
 bool MachineLICM::IsLICMCandidate(MachineInstr &I) {
+  if (I.isImplicitDef())
+    return false;
+
   const TargetInstrDesc &TID = I.getDesc();
   
   // Ignore stuff that we obviously can't hoist.
@@ -620,9 +623,6 @@
 /// IsProfitableToHoist - Return true if it is potentially profitable to hoist
 /// the given loop invariant.
 bool MachineLICM::IsProfitableToHoist(MachineInstr &MI) {
-  if (MI.isImplicitDef())
-    return false;
-
   // FIXME: For now, only hoist re-materilizable instructions. LICM will
   // increase register pressure. We want to make sure it doesn't increase
   // spilling.




From clattner at apple.com  Tue Apr 13 17:42:06 2010
From: clattner at apple.com (Chris Lattner)
Date: Tue, 13 Apr 2010 15:42:06 -0700
Subject: [llvm-commits] [llvm] r101165
	-	/llvm/trunk/lib/CodeGen/MachineSink.cpp
In-Reply-To: <20100413190614.9A85D2A6C12C@llvm.org>
References: <20100413190614.9A85D2A6C12C@llvm.org>
Message-ID: <00CFD8B9-3735-408A-BD48-4D41BD1F1629@apple.com>


On Apr 13, 2010, at 12:06 PM, Jakob Stoklund Olesen wrote:

> Author: stoklund
> Date: Tue Apr 13 14:06:14 2010
> New Revision: 101165
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=101165&view=rev
> Log:
> Teach MachineSinking to handle easy critical edges.
> 
> Sometimes it is desirable to sink instructions along a critical edge:
> 
> x = ...
> if (a && b) ...
> else use(x);
> 
> The 'a && b' condition creates a critical edge to the else block, but we still
> want to sink the computation of x into the block. The else block is dominated by
> the parent block, so we are not pushing instructions into new code paths.

Nice, testcase? :)

-Chris

> 
> Modified:
>    llvm/trunk/lib/CodeGen/MachineSink.cpp
> 
> Modified: llvm/trunk/lib/CodeGen/MachineSink.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineSink.cpp?rev=101165&r1=101164&r2=101165&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/MachineSink.cpp (original)
> +++ llvm/trunk/lib/CodeGen/MachineSink.cpp Tue Apr 13 14:06:14 2010
> @@ -276,8 +276,23 @@
>   // but for now we just punt.
>   // FIXME: Split critical edges if not backedges.
>   if (SuccToSinkTo->pred_size() > 1) {
> -    DEBUG(dbgs() << " *** PUNTING: Critical edge found\n");
> -    return false;
> +    // We cannot sink a load across a critical edge - there may be stores in
> +    // other code paths.
> +    bool store = true;
> +    if (!MI->isSafeToMove(TII, AA, store)) {
> +      DEBUG(dbgs() << " *** PUNTING: Wont sink load along critical edge.\n");
> +      return false;
> +    }
> +
> +    // We don't want to sink across a critical edge if we don't dominate the
> +    // successor. We could be introducing calculations to new code paths.
> +    if (!DT->dominates(ParentBlock, SuccToSinkTo)) {
> +      DEBUG(dbgs() << " *** PUNTING: Critical edge found\n");
> +      return false;
> +    }
> +
> +    // Otherwise we are OK with sinking along a critical edge.
> +    DEBUG(dbgs() << "Sinking along critical edge.\n");
>   }
> 
>   // Determine where to insert into.  Skip phi nodes.
> 
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits




From dgregor at apple.com  Tue Apr 13 17:47:43 2010
From: dgregor at apple.com (Douglas Gregor)
Date: Tue, 13 Apr 2010 22:47:43 -0000
Subject: [llvm-commits] [llvm] r101188 - in /llvm/trunk:
 lib/Target/ARM/CMakeLists.txt lib/Target/X86/CMakeLists.txt
 tools/edis/CMakeLists.txt
Message-ID: <20100413224743.50E5E2A6C12C@llvm.org>

Author: dgregor
Date: Tue Apr 13 17:47:43 2010
New Revision: 101188

URL: http://llvm.org/viewvc/llvm-project?rev=101188&view=rev
Log:
Unbreak CMake build by improving the EnhancedDisassembly makefile a
bit (we're not trying to build a shared library yet) and generating
the X86GenEDInfo.inc and ARMGenEDInfo.inc files as necessary.

Modified:
    llvm/trunk/lib/Target/ARM/CMakeLists.txt
    llvm/trunk/lib/Target/X86/CMakeLists.txt
    llvm/trunk/tools/edis/CMakeLists.txt

Modified: llvm/trunk/lib/Target/ARM/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/CMakeLists.txt?rev=101188&r1=101187&r2=101188&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/CMakeLists.txt (original)
+++ llvm/trunk/lib/Target/ARM/CMakeLists.txt Tue Apr 13 17:47:43 2010
@@ -10,6 +10,7 @@
 tablegen(ARMGenDAGISel.inc -gen-dag-isel)
 tablegen(ARMGenCallingConv.inc -gen-callingconv)
 tablegen(ARMGenSubtarget.inc -gen-subtarget)
+tablegen(ARMGenEDInfo.inc -gen-enhanced-disassembly-info)
 
 add_llvm_target(ARMCodeGen
   ARMBaseInstrInfo.cpp

Modified: llvm/trunk/lib/Target/X86/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/CMakeLists.txt?rev=101188&r1=101187&r2=101188&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/CMakeLists.txt (original)
+++ llvm/trunk/lib/Target/X86/CMakeLists.txt Tue Apr 13 17:47:43 2010
@@ -13,6 +13,7 @@
 tablegen(X86GenFastISel.inc -gen-fast-isel)
 tablegen(X86GenCallingConv.inc -gen-callingconv)
 tablegen(X86GenSubtarget.inc -gen-subtarget)
+tablegen(X86GenEDInfo.inc -gen-enhanced-disassembly-info)
 
 set(sources
   SSEDomainFix.cpp

Modified: llvm/trunk/tools/edis/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/edis/CMakeLists.txt?rev=101188&r1=101187&r2=101188&view=diff
==============================================================================
--- llvm/trunk/tools/edis/CMakeLists.txt (original)
+++ llvm/trunk/tools/edis/CMakeLists.txt Tue Apr 13 17:47:43 2010
@@ -1,4 +1,3 @@
-set(SHARED_LIBRARY TRUE)
 set(LLVM_NO_RTTI 1)
 
 add_custom_command(OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/EDInfo.inc
@@ -20,22 +19,7 @@
   ${CMAKE_CURRENT_BINARY_DIR}/EDInfo.inc
 )
 
-if(${CMAKE_SYSTEM_NAME} MATCHES "Darwin")
-  # FIXME: Deal with EDIS version?
-  set_target_properties(EnhancedDisassembly
-    PROPERTIES
-    LINK_FLAGS "-avoid-version -Wl,-exported_symbols_list -Wl,${CMAKE_CURRENT_SOURCE_DIR}/EnhancedDisassembly.exports -Wl,-dead_strip -Wl"
-    )
-endif()
-
-if(MSVC)
-  # windows.h doesn't compile with /Za
-  get_target_property(NON_ANSI_COMPILE_FLAGS CIndex COMPILE_FLAGS)
-  string(REPLACE /Za "" NON_ANSI_COMPILE_FLAGS ${NON_ANSI_COMPILE_FLAGS})
-  set_target_properties(EnhancedDisassembly PROPERTIES COMPILE_FLAGS ${NON_ANSI_COMPILE_FLAGS})
-endif(MSVC)
-
 set_target_properties(EnhancedDisassembly
   PROPERTIES
   LINKER_LANGUAGE CXX)
-  
\ No newline at end of file
+




From stoklund at 2pi.dk  Tue Apr 13 17:52:12 2010
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Tue, 13 Apr 2010 15:52:12 -0700
Subject: [llvm-commits] [llvm] r101165
	-	/llvm/trunk/lib/CodeGen/MachineSink.cpp
In-Reply-To: <00CFD8B9-3735-408A-BD48-4D41BD1F1629@apple.com>
References: <20100413190614.9A85D2A6C12C@llvm.org>
	<00CFD8B9-3735-408A-BD48-4D41BD1F1629@apple.com>
Message-ID: <ED432039-8214-4CF3-BAFA-F96CB553967A@2pi.dk>


On Apr 13, 2010, at 3:42 PM, Chris Lattner wrote:

> 
> On Apr 13, 2010, at 12:06 PM, Jakob Stoklund Olesen wrote:
> 
>> Author: stoklund
>> Date: Tue Apr 13 14:06:14 2010
>> New Revision: 101165
>> 
>> URL: http://llvm.org/viewvc/llvm-project?rev=101165&view=rev
>> Log:
>> Teach MachineSinking to handle easy critical edges.
>> 
>> Sometimes it is desirable to sink instructions along a critical edge:
>> 
>> x = ...
>> if (a && b) ...
>> else use(x);
>> 
>> The 'a && b' condition creates a critical edge to the else block, but we still
>> want to sink the computation of x into the block. The else block is dominated by
>> the parent block, so we are not pushing instructions into new code paths.
> 
> Nice, testcase? :)

Sure, I'll cook one up.

BTW, do we need a code sinking pass at the IR level?

Machine sinking is easily intimidated by physical register defines, and it currently cannot move code below if/else diamonds and simple loops.

/jakob




From dpatel at apple.com  Tue Apr 13 18:23:10 2010
From: dpatel at apple.com (Devang Patel)
Date: Tue, 13 Apr 2010 23:23:10 -0000
Subject: [llvm-commits] [llvm] r101190 -
	/llvm/trunk/test/DebugInfo/2010-04-13-PubType.ll
Message-ID: <20100413232310.13E7D2A6C12C@llvm.org>

Author: dpatel
Date: Tue Apr 13 18:23:09 2010
New Revision: 101190

URL: http://llvm.org/viewvc/llvm-project?rev=101190&view=rev
Log:
XFAIL this test for powerpc. 
This test relies on iSel lowering dbg_declare intrinsic when CodeGen::OptLevel is None. On PPC side, CodeGen::OptLevel stays to default when -O0 is used on the command line.

Modified:
    llvm/trunk/test/DebugInfo/2010-04-13-PubType.ll

Modified: llvm/trunk/test/DebugInfo/2010-04-13-PubType.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/2010-04-13-PubType.ll?rev=101190&r1=101189&r2=101190&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/2010-04-13-PubType.ll (original)
+++ llvm/trunk/test/DebugInfo/2010-04-13-PubType.ll Tue Apr 13 18:23:09 2010
@@ -2,7 +2,7 @@
 ; RUN: grep "External Name" %t | grep -v X
 ; RUN: grep "External Name" %t | grep Y | count 1
 ; Test to check type with no defintion is listed in pubtypes section.
-
+; XFAIL: powerpc
 %struct.X = type opaque
 %struct.Y = type { i32 }
 




From daniel at zuster.org  Tue Apr 13 18:34:11 2010
From: daniel at zuster.org (Daniel Dunbar)
Date: Tue, 13 Apr 2010 23:34:11 -0000
Subject: [llvm-commits] [llvm] r101191 - in /llvm/trunk:
 include/llvm/ADT/ImmutableSet.h
 utils/unittest/googletest/include/gtest/internal/gtest-linked_ptr.h
Message-ID: <20100413233411.C966B2A6C12C@llvm.org>

Author: ddunbar
Date: Tue Apr 13 18:34:11 2010
New Revision: 101191

URL: http://llvm.org/viewvc/llvm-project?rev=101191&view=rev
Log:
Fix -Asserts warnings.

Modified:
    llvm/trunk/include/llvm/ADT/ImmutableSet.h
    llvm/trunk/utils/unittest/googletest/include/gtest/internal/gtest-linked_ptr.h

Modified: llvm/trunk/include/llvm/ADT/ImmutableSet.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/ImmutableSet.h?rev=101191&r1=101190&r2=101191&view=diff
==============================================================================
--- llvm/trunk/include/llvm/ADT/ImmutableSet.h (original)
+++ llvm/trunk/include/llvm/ADT/ImmutableSet.h Tue Apr 13 18:34:11 2010
@@ -189,6 +189,8 @@
   unsigned verify() const {
     unsigned HL = getLeft() ? getLeft()->verify() : 0;
     unsigned HR = getRight() ? getRight()->verify() : 0;
+    (void) HL;
+    (void) HR;
 
     assert(getHeight() == ( HL > HR ? HL : HR ) + 1
             && "Height calculation wrong");

Modified: llvm/trunk/utils/unittest/googletest/include/gtest/internal/gtest-linked_ptr.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/unittest/googletest/include/gtest/internal/gtest-linked_ptr.h?rev=101191&r1=101190&r2=101191&view=diff
==============================================================================
--- llvm/trunk/utils/unittest/googletest/include/gtest/internal/gtest-linked_ptr.h (original)
+++ llvm/trunk/utils/unittest/googletest/include/gtest/internal/gtest-linked_ptr.h Tue Apr 13 18:34:11 2010
@@ -176,6 +176,7 @@
   // Sole ownership by this linked_ptr object is required.
   T* release() {
     bool last = link_.depart();
+    (void) last;
     assert(last);
     T* v = value_;
     value_ = NULL;




From clattner at apple.com  Tue Apr 13 19:13:01 2010
From: clattner at apple.com (Chris Lattner)
Date: Tue, 13 Apr 2010 17:13:01 -0700
Subject: [llvm-commits] [llvm] r101165 -
	/llvm/trunk/lib/CodeGen/MachineSink.cpp
In-Reply-To: <ED432039-8214-4CF3-BAFA-F96CB553967A@2pi.dk>
References: <20100413190614.9A85D2A6C12C@llvm.org>
	<00CFD8B9-3735-408A-BD48-4D41BD1F1629@apple.com>
	<ED432039-8214-4CF3-BAFA-F96CB553967A@2pi.dk>
Message-ID: <F9A99615-8812-4924-9995-483136B388B8@apple.com>


On Apr 13, 2010, at 3:52 PM, Jakob Stoklund Olesen wrote:

>>> The 'a && b' condition creates a critical edge to the else block, but we still
>>> want to sink the computation of x into the block. The else block is dominated by
>>> the parent block, so we are not pushing instructions into new code paths.
>> 
>> Nice, testcase? :)
> 
> Sure, I'll cook one up.
> 
> BTW, do we need a code sinking pass at the IR level?
> 
> Machine sinking is easily intimidated by physical register defines, and it currently cannot move code below if/else diamonds and simple loops.

I'm not opposed to it!  instcombine does some limited stuff, but it might make sense to make it a full on pass if it requires signficant analysis or dom info.

-Chris


From ggreif at gmail.com  Tue Apr 13 20:06:13 2010
From: ggreif at gmail.com (Gabor Greif)
Date: Tue, 13 Apr 2010 18:06:13 -0700 (PDT)
Subject: [llvm-commits] [llvm] r101180 -
	/llvm/trunk/include/llvm/MC/MCDisassembler.h
In-Reply-To: <20100413213635.A57A02A6C12C@llvm.org>
References: <20100413213635.A57A02A6C12C@llvm.org>
Message-ID: <9494ed58-53d4-469f-86be-bbcd5b39b248@j21g2000yqh.googlegroups.com>

On 13 Apr., 23:36, Sean Callanan <scalla... at apple.com> wrote:
> Author: spyffe
> Date: Tue Apr 13 16:36:35 2010
> New Revision: 101180
>
> URL:http://llvm.org/viewvc/llvm-project?rev=101180&view=rev
> Log:
> Quick fix for build errors caused by undefined
> NULL.
>
> Modified:
> ? ? llvm/trunk/include/llvm/MC/MCDisassembler.h
>
> Modified: llvm/trunk/include/llvm/MC/MCDisassembler.h
> URL:http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCDisa...
> =========================================================================== ===
> --- llvm/trunk/include/llvm/MC/MCDisassembler.h (original)
> +++ llvm/trunk/include/llvm/MC/MCDisassembler.h Tue Apr 13 16:36:35 2010
> @@ -52,7 +52,7 @@
> ? ?/// @return ? ? ? ? - An array of instruction information, with one entry for
> ? ?/// ? ? ? ? ? ? ? ? ? each MCInst opcode this disassembler returns.
> ? ?/// ? ? ? ? ? ? ? ? ? NULL if there is no info for this target.
> - ?virtual EDInstInfo ? *getEDInfo() const { return NULL; }
> + ?virtual EDInstInfo ? *getEDInfo() const { return (EDInstInfo*)0; }

Hi Sean,

IIRC the cast is not needed here, "return 0;" will do perfectly well.

Cheers,

    Gabor

> ?};
>
> ?} // namespace llvm
>
> _______________________________________________
> llvm-commits mailing list
> llvm-comm... at cs.uiuc.eduhttp://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From isanbard at gmail.com  Tue Apr 13 20:10:28 2010
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 14 Apr 2010 01:10:28 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r101199 -
	/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
Message-ID: <20100414011028.310A12A6C12C@llvm.org>

Author: void
Date: Tue Apr 13 20:10:27 2010
New Revision: 101199

URL: http://llvm.org/viewvc/llvm-project?rev=101199&view=rev
Log:
Give .llvm.eh.catch.all.value private linkage so that it goes away after
linking.

Modified:
    llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp

Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=101199&r1=101198&r2=101199&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Tue Apr 13 20:10:27 2010
@@ -2069,6 +2069,8 @@
   std::vector<Value*> Args;
   std::vector<struct eh_region *> Handlers;
 
+  static Value *CatchAll = 0;
+
   for (unsigned i = 1; i < LandingPads.size(); ++i) {
     BasicBlock *LandingPad = LandingPads[i];
 
@@ -2096,8 +2098,6 @@
     foreach_reachable_handler(i, false, AddHandler, &Handlers);
 
     bool HasCleanup = false;
-    static Value *CatchAll = 0;
-
     for (std::vector<struct eh_region *>::iterator I = Handlers.begin(),
          E = Handlers.end(); I != E; ++I) {
       struct eh_region *region = *I;
@@ -2129,7 +2129,7 @@
               Constant::getNullValue(Type::getInt8PtrTy(Context));
 
             CatchAll = new GlobalVariable(*TheModule, Init->getType(), true,
-                                          GlobalVariable::LinkOnceAnyLinkage,
+                                          GlobalVariable::PrivateLinkage,
                                           Init, ".llvm.eh.catch.all.value");
           }
 
@@ -2171,7 +2171,7 @@
               Init = cast<Constant>(Emit(catch_all_type, 0));
 
             CatchAll = new GlobalVariable(*TheModule, Init->getType(), true,
-                                          GlobalVariable::LinkOnceAnyLinkage,
+                                          GlobalVariable::PrivateLinkage,
                                           Init, ".llvm.eh.catch.all.value");
           }
 




From johnny.chen at apple.com  Tue Apr 13 20:17:37 2010
From: johnny.chen at apple.com (Johnny Chen)
Date: Wed, 14 Apr 2010 01:17:37 -0000
Subject: [llvm-commits] [llvm] r101201 - in
 /llvm/trunk/lib/Target/ARM/Disassembler: ARMDisassemblerCore.cpp
 ARMDisassemblerCore.h
Message-ID: <20100414011737.695AF2A6C12C@llvm.org>

Author: johnny
Date: Tue Apr 13 20:17:37 2010
New Revision: 101201

URL: http://llvm.org/viewvc/llvm-project?rev=101201&view=rev
Log:
Fixed an assert() exposed by fuzzing.  Now, instead of assert when an invalid
instruction encoding is encountered, we just return a NULL ARMBasicMCBuilder
instance and the client just returns false to indicate disassembly error.

Modified:
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp?rev=101201&r1=101200&r2=101201&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp Tue Apr 13 20:17:37 2010
@@ -3257,6 +3257,9 @@
 /// are responsible for freeing up of the allocated memory.  Cacheing can be
 /// performed by the API clients to improve performance.
 ARMBasicMCBuilder *llvm::CreateMCBuilder(unsigned Opcode, ARMFormat Format) {
+  // For "Unknown format", fail by returning a NULL pointer.
+  if ((unsigned)Format >= (array_lengthof(FuncPtrs) - 1))
+    return 0;
 
   return new ARMBasicMCBuilder(Opcode, Format,
                                ARMInsts[Opcode].getNumOperands());

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h?rev=101201&r1=101200&r2=101201&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h Tue Apr 13 20:17:37 2010
@@ -171,24 +171,33 @@
 typedef bool (*DisassembleFP)(MCInst &MI, unsigned Opcode, uint32_t insn,
     unsigned short NumOps, unsigned &NumOpsAdded, BO Builder);
 
+/// CreateMCBuilder - Return an ARMBasicMCBuilder that can build up the MC
+/// infrastructure of an MCInst given the Opcode and Format of the instr.
+/// Return NULL if it fails to create/return a proper builder.  API clients
+/// are responsible for freeing up of the allocated memory.  Cacheing can be
+/// performed by the API clients to improve performance.
+extern ARMBasicMCBuilder *CreateMCBuilder(unsigned Opcode, ARMFormat Format);
+
 /// ARMBasicMCBuilder - ARMBasicMCBuilder represents an ARM MCInst builder that
 /// knows how to build up the MCOperand list.
 class ARMBasicMCBuilder {
+  friend ARMBasicMCBuilder *CreateMCBuilder(unsigned Opcode, ARMFormat Format);
   unsigned Opcode;
   ARMFormat Format;
   unsigned short NumOps;
   DisassembleFP Disasm;
   Session *SP;
 
+private:
+  /// Opcode, Format, and NumOperands make up an ARM Basic MCBuilder.
+  ARMBasicMCBuilder(unsigned opc, ARMFormat format, unsigned short num);
+
 public:
   ARMBasicMCBuilder(ARMBasicMCBuilder &B)
     : Opcode(B.Opcode), Format(B.Format), NumOps(B.NumOps), Disasm(B.Disasm),
       SP(B.SP)
   {}
 
-  /// Opcode, Format, and NumOperands make up an ARM Basic MCBuilder.
-  ARMBasicMCBuilder(unsigned opc, ARMFormat format, unsigned short num);
-
   virtual ~ARMBasicMCBuilder() {}
 
   void setSession(Session *sp) {
@@ -236,13 +245,6 @@
   }
 };
 
-/// CreateMCBuilder - Return an ARMBasicMCBuilder that can build up the MC
-/// infrastructure of an MCInst given the Opcode and Format of the instr.
-/// Return NULL if it fails to create/return a proper builder.  API clients
-/// are responsible for freeing up of the allocated memory.  Cacheing can be
-/// performed by the API clients to improve performance.
-extern ARMBasicMCBuilder *CreateMCBuilder(unsigned Opcode, ARMFormat Format);
-
 } // namespace llvm
 
 #endif




From dpatel at apple.com  Tue Apr 13 20:18:29 2010
From: dpatel at apple.com (Devang Patel)
Date: Wed, 14 Apr 2010 01:18:29 -0000
Subject: [llvm-commits] [llvm] r101202 -
	/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
Message-ID: <20100414011829.1B7A32A6C12C@llvm.org>

Author: dpatel
Date: Tue Apr 13 20:18:28 2010
New Revision: 101202

URL: http://llvm.org/viewvc/llvm-project?rev=101202&view=rev
Log:
Clear MachineInstr->MCSymbol maps at the end of a function.


Modified:
    llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp

Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp?rev=101202&r1=101201&r2=101202&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp (original)
+++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp Tue Apr 13 20:18:28 2010
@@ -2351,6 +2351,8 @@
   DeleteContainerSeconds(AbstractScopes);
   AbstractScopesList.clear();
   AbstractVariables.clear();
+  InsnBeforeLabelMap.clear();
+  InsnAfterLabelMap.clear();
   Lines.clear();
 }
 




From stuart at apple.com  Tue Apr 13 20:31:38 2010
From: stuart at apple.com (Stuart Hastings)
Date: Wed, 14 Apr 2010 01:31:38 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r101204 -
	/llvm-gcc-4.2/trunk/gcc/cp/decl.c
Message-ID: <20100414013138.6A0492A6C12C@llvm.org>

Author: stuart
Date: Tue Apr 13 20:31:38 2010
New Revision: 101204

URL: http://llvm.org/viewvc/llvm-project?rev=101204&view=rev
Log:
Prevent a very unlikely ICE in the presence of an ungrammatical test fragment.  Radar 7212824.

Modified:
    llvm-gcc-4.2/trunk/gcc/cp/decl.c

Modified: llvm-gcc-4.2/trunk/gcc/cp/decl.c
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/cp/decl.c?rev=101204&r1=101203&r2=101204&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/gcc/cp/decl.c (original)
+++ llvm-gcc-4.2/trunk/gcc/cp/decl.c Tue Apr 13 20:31:38 2010
@@ -2210,9 +2210,11 @@
 	   union { int i; };
 
 	   is invalid.  */
-      if (DECL_ANON_UNION_VAR_P (newdecl)
-	  || DECL_ANON_UNION_VAR_P (olddecl))
-	return "redeclaration of %q#D";
+      if (TREE_CODE (olddecl) == VAR_DECL
+          && TREE_CODE (newdecl) == VAR_DECL
+          && (DECL_ANON_UNION_VAR_P (newdecl)
+              || DECL_ANON_UNION_VAR_P (olddecl)))
+          return "redeclaration of %q#D";
       /* If at least one declaration is a reference, there is no
 	 conflict.  For example:
 




From johnny.chen at apple.com  Tue Apr 13 21:05:29 2010
From: johnny.chen at apple.com (Johnny Chen)
Date: Wed, 14 Apr 2010 02:05:29 -0000
Subject: [llvm-commits] [llvm] r101205 -
 /llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
Message-ID: <20100414020529.70A2A2A6C12C@llvm.org>

Author: johnny
Date: Tue Apr 13 21:05:29 2010
New Revision: 101205

URL: http://llvm.org/viewvc/llvm-project?rev=101205&view=rev
Log:
Fixed another assert exposed by fuzzing.  Now, when an encoding error occurs
involing getBFCInvMask() where lsb <= msb does not hold true, the disassembler
just returns false, instead of assert, to indicate disassembly error.

Modified:
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp?rev=101205&r1=101204&r2=101205&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp Tue Apr 13 21:05:29 2010
@@ -15,6 +15,7 @@
 
 #include "ARMDisassemblerCore.h"
 #include "ARMAddressingModes.h"
+#include "llvm/Support/raw_ostream.h"
 
 /// ARMGenInstrInfo.inc - ARMGenInstrInfo.inc contains the static const
 /// TargetInstrDesc ARMInsts[] definition and the TargetOperandInfo[]'s
@@ -885,14 +886,19 @@
   return false;
 }
 
-static inline uint32_t getBFCInvMask(uint32_t insn) {
+static inline bool getBFCInvMask(uint32_t insn, uint32_t &mask) {
   uint32_t lsb = slice(insn, 11, 7);
   uint32_t msb = slice(insn, 20, 16);
   uint32_t Val = 0;
-  assert(lsb <= msb && "Encoding error: lsb > msb");
+  if (lsb > msb) {
+    errs() << "Encoding error: lsb > msb\n";
+    return false;
+  }
+
   for (uint32_t i = lsb; i <= msb; ++i)
     Val |= (1 << i);
-  return ~Val;
+  mask = ~Val;
+  return true;
 }
 
 static inline bool SaturateOpcode(unsigned Opcode) {
@@ -982,7 +988,11 @@
     MI.addOperand(MCOperand::CreateReg(Opcode == ARM::BFC ? 0
                                        : getRegisterEnum(ARM::GPRRegClassID,
                                                          decodeRm(insn))));
-    MI.addOperand(MCOperand::CreateImm(getBFCInvMask(insn)));
+    uint32_t mask = 0;
+    if (!getBFCInvMask(insn, mask))
+      return false;
+
+    MI.addOperand(MCOperand::CreateImm(mask));
     OpIdx += 2;
     return true;
   }




From gohman at apple.com  Tue Apr 13 21:09:45 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 02:09:45 -0000
Subject: [llvm-commits] [llvm] r101206 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.h
Message-ID: <20100414020945.470D12A6C12C@llvm.org>

Author: djg
Date: Tue Apr 13 21:09:45 2010
New Revision: 101206

URL: http://llvm.org/viewvc/llvm-project?rev=101206&view=rev
Log:
Reorder the methods of this class to be a little more organized.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.h

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.h?rev=101206&r1=101205&r2=101206&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.h (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.h Tue Apr 13 21:09:45 2010
@@ -57,13 +57,6 @@
   /// allocated to hold a pointer to the hidden sret parameter.
   unsigned DemoteRegister;
 
-  explicit FunctionLoweringInfo(TargetLowering &TLI);
-
-  /// set - Initialize this FunctionLoweringInfo with the given Function
-  /// and its associated MachineFunction.
-  ///
-  void set(Function &Fn, MachineFunction &MF, bool EnableFastISel);
-
   /// MBBMap - A mapping from LLVM basic blocks to their machine code entry.
   DenseMap<const BasicBlock*, MachineBasicBlock *> MBBMap;
 
@@ -82,6 +75,28 @@
   SmallSet<Instruction*, 8> CatchInfoFound;
 #endif
 
+  struct LiveOutInfo {
+    unsigned NumSignBits;
+    APInt KnownOne, KnownZero;
+    LiveOutInfo() : NumSignBits(0), KnownOne(1, 0), KnownZero(1, 0) {}
+  };
+  
+  /// LiveOutRegInfo - Information about live out vregs, indexed by their
+  /// register number offset by 'FirstVirtualRegister'.
+  std::vector<LiveOutInfo> LiveOutRegInfo;
+
+  explicit FunctionLoweringInfo(TargetLowering &TLI);
+
+  /// set - Initialize this FunctionLoweringInfo with the given Function
+  /// and its associated MachineFunction.
+  ///
+  void set(Function &Fn, MachineFunction &MF, bool EnableFastISel);
+
+  /// clear - Clear out all the function-specific state. This returns this
+  /// FunctionLoweringInfo to an empty state, ready to be used for a
+  /// different function.
+  void clear();
+
   unsigned MakeReg(EVT VT);
   
   /// isExportedInst - Return true if the specified value is an instruction
@@ -97,21 +112,6 @@
     assert(R == 0 && "Already initialized this value register!");
     return R = CreateRegForValue(V);
   }
-  
-  struct LiveOutInfo {
-    unsigned NumSignBits;
-    APInt KnownOne, KnownZero;
-    LiveOutInfo() : NumSignBits(0), KnownOne(1, 0), KnownZero(1, 0) {}
-  };
-  
-  /// LiveOutRegInfo - Information about live out vregs, indexed by their
-  /// register number offset by 'FirstVirtualRegister'.
-  std::vector<LiveOutInfo> LiveOutRegInfo;
-
-  /// clear - Clear out all the function-specific state. This returns this
-  /// FunctionLoweringInfo to an empty state, ready to be used for a
-  /// different function.
-  void clear();
 };
 
 /// ComputeLinearIndex - Given an LLVM IR aggregate type and a sequence




From isanbard at gmail.com  Tue Apr 13 21:23:19 2010
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 14 Apr 2010 02:23:19 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r101208 -
	/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
Message-ID: <20100414022319.B41F52A6C12C@llvm.org>

Author: void
Date: Tue Apr 13 21:23:19 2010
New Revision: 101208

URL: http://llvm.org/viewvc/llvm-project?rev=101208&view=rev
Log:
Revert r101199. It's breaking MultiSource/Applications/kimwitu++/kc.

Modified:
    llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp

Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=101208&r1=101207&r2=101208&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Tue Apr 13 21:23:19 2010
@@ -2069,8 +2069,6 @@
   std::vector<Value*> Args;
   std::vector<struct eh_region *> Handlers;
 
-  static Value *CatchAll = 0;
-
   for (unsigned i = 1; i < LandingPads.size(); ++i) {
     BasicBlock *LandingPad = LandingPads[i];
 
@@ -2098,6 +2096,8 @@
     foreach_reachable_handler(i, false, AddHandler, &Handlers);
 
     bool HasCleanup = false;
+    static Value *CatchAll = 0;
+
     for (std::vector<struct eh_region *>::iterator I = Handlers.begin(),
          E = Handlers.end(); I != E; ++I) {
       struct eh_region *region = *I;
@@ -2129,7 +2129,7 @@
               Constant::getNullValue(Type::getInt8PtrTy(Context));
 
             CatchAll = new GlobalVariable(*TheModule, Init->getType(), true,
-                                          GlobalVariable::PrivateLinkage,
+                                          GlobalVariable::LinkOnceAnyLinkage,
                                           Init, ".llvm.eh.catch.all.value");
           }
 
@@ -2171,7 +2171,7 @@
               Init = cast<Constant>(Emit(catch_all_type, 0));
 
             CatchAll = new GlobalVariable(*TheModule, Init->getType(), true,
-                                          GlobalVariable::PrivateLinkage,
+                                          GlobalVariable::LinkOnceAnyLinkage,
                                           Init, ".llvm.eh.catch.all.value");
           }
 




From gohman at apple.com  Tue Apr 13 21:33:23 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 02:33:23 -0000
Subject: [llvm-commits] [llvm] r101210 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
Message-ID: <20100414023323.E2B082A6C12C@llvm.org>

Author: djg
Date: Tue Apr 13 21:33:23 2010
New Revision: 101210

URL: http://llvm.org/viewvc/llvm-project?rev=101210&view=rev
Log:
Generalize this code to handle Instructions in addition to ConstantExprs.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp?rev=101210&r1=101209&r2=101210&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp Tue Apr 13 21:33:23 2010
@@ -116,9 +116,9 @@
           Reg = FastEmit_r(IntVT.getSimpleVT(), VT, ISD::SINT_TO_FP, IntegerReg);
       }
     }
-  } else if (ConstantExpr *CE = dyn_cast<ConstantExpr>(V)) {
-    if (!SelectOperator(CE, CE->getOpcode())) return 0;
-    Reg = LocalValueMap[CE];
+  } else if (Operator *Op = dyn_cast<Operator>(V)) {
+    if (!SelectOperator(Op, Op->getOpcode())) return 0;
+    Reg = LocalValueMap[Op];
   } else if (isa<UndefValue>(V)) {
     Reg = createResultReg(TLI.getRegClassFor(VT));
     BuildMI(MBB, DL, TII.get(TargetOpcode::IMPLICIT_DEF), Reg);




From nicholas at mxc.ca  Tue Apr 13 22:38:11 2010
From: nicholas at mxc.ca (Nick Lewycky)
Date: Wed, 14 Apr 2010 03:38:11 -0000
Subject: [llvm-commits] [llvm] r101213 -
	/llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp
Message-ID: <20100414033811.CB3932A6C12C@llvm.org>

Author: nicholas
Date: Tue Apr 13 22:38:11 2010
New Revision: 101213

URL: http://llvm.org/viewvc/llvm-project?rev=101213&view=rev
Log:
While DAE can't modify the function signature of an externally visible function,
it can check whether the visible direct callers are passing in parameters to
dead arguments and replace those with undef.

This reinstates r94322 with bugs fixed.

Modified:
    llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp

Modified: llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp?rev=101213&r1=101212&r2=101213&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp Tue Apr 13 22:38:11 2010
@@ -30,6 +30,7 @@
 #include "llvm/Support/CallSite.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/raw_ostream.h"
+#include "llvm/Transforms/Utils/Local.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/Statistic.h"
 #include "llvm/ADT/StringExtras.h"
@@ -37,8 +38,9 @@
 #include <set>
 using namespace llvm;
 
-STATISTIC(NumArgumentsEliminated, "Number of unread args removed");
-STATISTIC(NumRetValsEliminated  , "Number of unused return values removed");
+STATISTIC(NumArgumentsEliminated , "Number of unread args removed");
+STATISTIC(NumRetValsEliminated   , "Number of unused return values removed");
+STATISTIC(NumParametersEliminated, "Number of parameters replaced with undef");
 
 namespace {
   /// DAE - The dead argument elimination pass.
@@ -140,6 +142,7 @@
     void MarkLive(const Function &F);
     void PropagateLiveness(const RetOrArg &RA);
     bool RemoveDeadStuffFromFunction(Function *F);
+    bool RemoveDeadParamsFromCallersOf(Function *F);
     bool DeleteDeadVarargs(Function &Fn);
   };
 }
@@ -397,7 +400,9 @@
 // map.
 //
 // We consider arguments of non-internal functions to be intrinsically alive as
-// well as arguments to functions which have their "address taken".
+// well as arguments to functions which have their "address taken". Externally
+// visible functions are assumed to only have their return values intrinsically
+// alive, permitting removal of parameters to unused arguments in callers.
 //
 void DAE::SurveyFunction(const Function &F) {
   unsigned RetCount = NumRetVals(&F);
@@ -420,7 +425,14 @@
         return;
       }
 
-  if (!F.hasLocalLinkage() && (!ShouldHackArguments() || F.isIntrinsic())) {
+  if (F.hasExternalLinkage() && !F.isDeclaration()) {
+    DEBUG(dbgs() << "DAE - Intrinsically live return from " << F.getName()
+                 << "\n");
+    // Mark the return values alive.
+    for (unsigned i = 0, e = NumRetVals(&F); i != e; ++i)
+      MarkLive(CreateRet(&F, i));
+  } else if (!F.hasLocalLinkage() &&
+             (!ShouldHackArguments() || F.isIntrinsic())) {
     MarkLive(F);
     return;
   }
@@ -532,14 +544,14 @@
 /// values (according to Uses) live as well.
 void DAE::MarkLive(const Function &F) {
   DEBUG(dbgs() << "DAE - Intrinsically live fn: " << F.getName() << "\n");
-    // Mark the function as live.
-    LiveFunctions.insert(&F);
-    // Mark all arguments as live.
-    for (unsigned i = 0, e = F.arg_size(); i != e; ++i)
-      PropagateLiveness(CreateArg(&F, i));
-    // Mark all return values as live.
-    for (unsigned i = 0, e = NumRetVals(&F); i != e; ++i)
-      PropagateLiveness(CreateRet(&F, i));
+  // Mark the function as live.
+  LiveFunctions.insert(&F);
+  // Mark all arguments as live.
+  for (unsigned i = 0, e = F.arg_size(); i != e; ++i)
+    PropagateLiveness(CreateArg(&F, i));
+  // Mark all return values as live.
+  for (unsigned i = 0, e = NumRetVals(&F); i != e; ++i)
+    PropagateLiveness(CreateRet(&F, i));
 }
 
 /// MarkLive - Mark the given return value or argument as live. Additionally,
@@ -853,7 +865,7 @@
       if (ReturnInst *RI = dyn_cast<ReturnInst>(BB->getTerminator())) {
         Value *RetVal;
 
-        if (NFTy->getReturnType() == Type::getVoidTy(F->getContext())) {
+        if (NFTy->getReturnType()->isVoidTy()) {
           RetVal = 0;
         } else {
           assert (RetTy->isStructTy());
@@ -894,6 +906,43 @@
   return true;
 }
 
+bool DAE::RemoveDeadParamsFromCallersOf(Function *F) {
+  // Don't modify fully live functions
+  if (LiveFunctions.count(F))
+    return false;
+
+  // Make a list of the dead arguments.
+  SmallVector<int, 10> ArgDead;
+  unsigned i = 0;
+  for (Function::arg_iterator I = F->arg_begin(), E = F->arg_end();
+       I != E; ++I, ++i) {
+    RetOrArg Arg = CreateArg(F, i);
+    if (!LiveValues.count(Arg))
+      ArgDead.push_back(i);
+  }
+  if (ArgDead.empty())
+    return false;
+
+  bool MadeChange = false;
+  for (Function::use_iterator I = F->use_begin(), E = F->use_end();
+       I != E; ++I) {
+    CallSite CS = CallSite::get(*I);
+    if (CS.getInstruction() && CS.isCallee(I)) {
+      for (unsigned i = 0, e = ArgDead.size(); i != e; ++i) {
+        Value *A = CS.getArgument(ArgDead[i]);
+        if (!isa<UndefValue>(A)) {
+	  ++NumParametersEliminated;
+          MadeChange = true;
+          CS.setArgument(ArgDead[i], UndefValue::get(A->getType()));
+          RecursivelyDeleteTriviallyDeadInstructions(A);
+        }
+      }
+    }
+  }
+
+  return MadeChange;
+}
+
 bool DAE::runOnModule(Module &M) {
   bool Changed = false;
 
@@ -922,7 +971,10 @@
     // Increment now, because the function will probably get removed (ie.
     // replaced by a new one).
     Function *F = I++;
-    Changed |= RemoveDeadStuffFromFunction(F);
+    if (F->hasExternalLinkage() && !F->isDeclaration())
+      Changed |= RemoveDeadParamsFromCallersOf(F);
+    else
+      Changed |= RemoveDeadStuffFromFunction(F);
   }
   return Changed;
 }




From nicholas at mxc.ca  Tue Apr 13 22:46:42 2010
From: nicholas at mxc.ca (Nick Lewycky)
Date: Wed, 14 Apr 2010 03:46:42 -0000
Subject: [llvm-commits] [llvm] r101214 -
	/llvm/trunk/test/Transforms/DeadArgElim/deadexternal.ll
Message-ID: <20100414034642.B81CE2A6C12C@llvm.org>

Author: nicholas
Date: Tue Apr 13 22:46:42 2010
New Revision: 101214

URL: http://llvm.org/viewvc/llvm-project?rev=101214&view=rev
Log:
Commit testcase for r101213.

Added:
    llvm/trunk/test/Transforms/DeadArgElim/deadexternal.ll

Added: llvm/trunk/test/Transforms/DeadArgElim/deadexternal.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/DeadArgElim/deadexternal.ll?rev=101214&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/DeadArgElim/deadexternal.ll (added)
+++ llvm/trunk/test/Transforms/DeadArgElim/deadexternal.ll Tue Apr 13 22:46:42 2010
@@ -0,0 +1,12 @@
+; RUN: opt -deadargelim -S %s | FileCheck %s
+
+define void @test(i32) {
+  ret void
+}
+
+define void @foo() {
+  call void @test(i32 0)
+  ret void
+; CHECK: @foo
+; CHECK: i32 undef
+}




From isanbard at gmail.com  Tue Apr 13 22:55:34 2010
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 14 Apr 2010 03:55:34 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r101216 -
	/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
Message-ID: <20100414035534.1CF692A6C12C@llvm.org>

Author: void
Date: Tue Apr 13 22:55:33 2010
New Revision: 101216

URL: http://llvm.org/viewvc/llvm-project?rev=101216&view=rev
Log:
Put the magic EH variable into the llvm.metadata section so that the ASM printer
doesn't output it ever.

Modified:
    llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp

Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=101216&r1=101215&r2=101216&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Tue Apr 13 22:55:33 2010
@@ -2096,7 +2096,7 @@
     foreach_reachable_handler(i, false, AddHandler, &Handlers);
 
     bool HasCleanup = false;
-    static Value *CatchAll = 0;
+    static GlobalVariable *CatchAll = 0;
 
     for (std::vector<struct eh_region *>::iterator I = Handlers.begin(),
          E = Handlers.end(); I != E; ++I) {
@@ -2131,6 +2131,7 @@
             CatchAll = new GlobalVariable(*TheModule, Init->getType(), true,
                                           GlobalVariable::LinkOnceAnyLinkage,
                                           Init, ".llvm.eh.catch.all.value");
+            CatchAll->setSection("llvm.metadata");
           }
 
           Args.push_back(CatchAll);
@@ -2173,6 +2174,7 @@
             CatchAll = new GlobalVariable(*TheModule, Init->getType(), true,
                                           GlobalVariable::LinkOnceAnyLinkage,
                                           Init, ".llvm.eh.catch.all.value");
+            CatchAll->setSection("llvm.metadata");
           }
 
           Args.push_back(CatchAll);




From nicholas at mxc.ca  Tue Apr 13 23:19:05 2010
From: nicholas at mxc.ca (Nick Lewycky)
Date: Wed, 14 Apr 2010 04:19:05 -0000
Subject: [llvm-commits] [llvm] r101223 -
	/llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp
Message-ID: <20100414041905.B1F612A6C12C@llvm.org>

Author: nicholas
Date: Tue Apr 13 23:19:05 2010
New Revision: 101223

URL: http://llvm.org/viewvc/llvm-project?rev=101223&view=rev
Log:
Remove tab.

Modified:
    llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp

Modified: llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp?rev=101223&r1=101222&r2=101223&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp Tue Apr 13 23:19:05 2010
@@ -931,7 +931,7 @@
       for (unsigned i = 0, e = ArgDead.size(); i != e; ++i) {
         Value *A = CS.getArgument(ArgDead[i]);
         if (!isa<UndefValue>(A)) {
-	  ++NumParametersEliminated;
+          ++NumParametersEliminated;
           MadeChange = true;
           CS.setArgument(ArgDead[i], UndefValue::get(A->getType()));
           RecursivelyDeleteTriviallyDeadInstructions(A);




From sabre at nondot.org  Tue Apr 13 23:40:28 2010
From: sabre at nondot.org (Chris Lattner)
Date: Wed, 14 Apr 2010 04:40:28 -0000
Subject: [llvm-commits] [llvm] r101227 - in /llvm/trunk:
 include/llvm/MC/MCParser/MCAsmLexer.h lib/MC/MCParser/AsmLexer.cpp
 lib/MC/MCParser/AsmParser.cpp test/MC/AsmParser/exprs.s
Message-ID: <20100414044028.38CB02A6C12C@llvm.org>

Author: lattner
Date: Tue Apr 13 23:40:28 2010
New Revision: 101227

URL: http://llvm.org/viewvc/llvm-project?rev=101227&view=rev
Log:
implement mc asmparser support for '.', which gets the
current PC.  rdar://7834775

We now produce an identical .o file compared to the cctools
assembler for something like this:

_f0:
L0:
        jmp L1
        .long . - L0
L1:
        jmp A
        .long . - L1

        .zerofill __DATA,_bss,A,0


Modified:
    llvm/trunk/include/llvm/MC/MCParser/MCAsmLexer.h
    llvm/trunk/lib/MC/MCParser/AsmLexer.cpp
    llvm/trunk/lib/MC/MCParser/AsmParser.cpp
    llvm/trunk/test/MC/AsmParser/exprs.s

Modified: llvm/trunk/include/llvm/MC/MCParser/MCAsmLexer.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCParser/MCAsmLexer.h?rev=101227&r1=101226&r2=101227&view=diff
==============================================================================
--- llvm/trunk/include/llvm/MC/MCParser/MCAsmLexer.h (original)
+++ llvm/trunk/include/llvm/MC/MCParser/MCAsmLexer.h Tue Apr 13 23:40:28 2010
@@ -42,7 +42,7 @@
     Plus, Minus, Tilde,
     Slash,    // '/'
     LParen, RParen, LBrac, RBrac, LCurly, RCurly,
-    Star, Comma, Dollar, Equal, EqualEqual,
+    Star, Dot, Comma, Dollar, Equal, EqualEqual,
     
     Pipe, PipePipe, Caret, 
     Amp, AmpAmp, Exclaim, ExclaimEqual, Percent, Hash,

Modified: llvm/trunk/lib/MC/MCParser/AsmLexer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCParser/AsmLexer.cpp?rev=101227&r1=101226&r2=101227&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCParser/AsmLexer.cpp (original)
+++ llvm/trunk/lib/MC/MCParser/AsmLexer.cpp Tue Apr 13 23:40:28 2010
@@ -74,6 +74,11 @@
   while (isalnum(*CurPtr) || *CurPtr == '_' || *CurPtr == '$' ||
          *CurPtr == '.' || *CurPtr == '@')
     ++CurPtr;
+  
+  // Handle . as a special case.
+  if (CurPtr == TokStart+1 && TokStart[0] == '.')
+    return AsmToken(AsmToken::Dot, StringRef(TokStart, 1));
+  
   return AsmToken(AsmToken::Identifier, StringRef(TokStart, CurPtr - TokStart));
 }
 

Modified: llvm/trunk/lib/MC/MCParser/AsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCParser/AsmParser.cpp?rev=101227&r1=101226&r2=101227&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCParser/AsmParser.cpp (original)
+++ llvm/trunk/lib/MC/MCParser/AsmParser.cpp Tue Apr 13 23:40:28 2010
@@ -209,6 +209,7 @@
 ///  primaryexpr ::= (parenexpr
 ///  primaryexpr ::= symbol
 ///  primaryexpr ::= number
+///  primaryexpr ::= '.'
 ///  primaryexpr ::= ~,+,- primaryexpr
 bool AsmParser::ParsePrimaryExpr(const MCExpr *&Res, SMLoc &EndLoc) {
   switch (Lexer.getKind()) {
@@ -253,6 +254,17 @@
     EndLoc = Lexer.getLoc();
     Lex(); // Eat token.
     return false;
+  case AsmToken::Dot: {
+    // This is a '.' reference, which references the current PC.  Emit a
+    // temporary label to the streamer and refer to it.
+    MCSymbol *Sym = Ctx.CreateTempSymbol();
+    Out.EmitLabel(Sym);
+    Res = MCSymbolRefExpr::Create(Sym, MCSymbolRefExpr::VK_None, getContext());
+    EndLoc = Lexer.getLoc();
+    Lex(); // Eat identifier.
+    return false;
+  }
+      
   case AsmToken::LParen:
     Lex(); // Eat the '('.
     return ParseParenExpr(Res, EndLoc);

Modified: llvm/trunk/test/MC/AsmParser/exprs.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AsmParser/exprs.s?rev=101227&r1=101226&r2=101227&view=diff
==============================================================================
--- llvm/trunk/test/MC/AsmParser/exprs.s (original)
+++ llvm/trunk/test/MC/AsmParser/exprs.s Tue Apr 13 23:40:28 2010
@@ -61,3 +61,14 @@
         
         
         movw	$8, (42)+66(%eax)
+
+// "." support:
+_f0:
+L0:
+        jmp L1
+        .long . - L0
+L1:
+        jmp A
+        .long . - L1
+
+        .zerofill __DATA,_bss,A,0




From nicholas at mxc.ca  Tue Apr 13 23:40:32 2010
From: nicholas at mxc.ca (Nick Lewycky)
Date: Wed, 14 Apr 2010 04:40:32 -0000
Subject: [llvm-commits] [llvm] r101228 - in /llvm/trunk/tools/bugpoint:
	BugDriver.h Makefile
Message-ID: <20100414044032.0969C2A6C12D@llvm.org>

Author: nicholas
Date: Tue Apr 13 23:40:31 2010
New Revision: 101228

URL: http://llvm.org/viewvc/llvm-project?rev=101228&view=rev
Log:
Bugpoint no longer uses exceptions.

Modified:
    llvm/trunk/tools/bugpoint/BugDriver.h
    llvm/trunk/tools/bugpoint/Makefile

Modified: llvm/trunk/tools/bugpoint/BugDriver.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/BugDriver.h?rev=101228&r1=101227&r2=101228&view=diff
==============================================================================
--- llvm/trunk/tools/bugpoint/BugDriver.h (original)
+++ llvm/trunk/tools/bugpoint/BugDriver.h Tue Apr 13 23:40:31 2010
@@ -17,9 +17,12 @@
 #define BUGDRIVER_H
 
 #include "llvm/ADT/DenseMap.h"
+#include "llvm/Support/CommandLine.h"
 #include <vector>
 #include <string>
 
+extern llvm::cl::opt<bool> StripDebug;
+
 namespace llvm {
 
 class Value;
@@ -172,9 +175,7 @@
   void compileProgram(Module *M, std::string *Error);
 
   /// executeProgram - This method runs "Program", capturing the output of the
-  /// program to a file.  The recommended filename will be filled in with the
-  /// name of the file with the captured output.  If there is a problem with
-  /// the code generator (e.g., llc crashes), this will throw an exception.
+  /// program to a file.  A recommended filename may be optionally specified.
   ///
   std::string executeProgram(std::string OutputFilename,
                              std::string Bitcode,

Modified: llvm/trunk/tools/bugpoint/Makefile
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/Makefile?rev=101228&r1=101227&r2=101228&view=diff
==============================================================================
--- llvm/trunk/tools/bugpoint/Makefile (original)
+++ llvm/trunk/tools/bugpoint/Makefile Tue Apr 13 23:40:31 2010
@@ -12,6 +12,5 @@
 
 LINK_COMPONENTS := asmparser instrumentation scalaropts ipo \
                    linker bitreader bitwriter
-REQUIRES_EH := 1
 
 include $(LEVEL)/Makefile.common




From nicholas at mxc.ca  Tue Apr 13 23:40:36 2010
From: nicholas at mxc.ca (Nick Lewycky)
Date: Wed, 14 Apr 2010 04:40:36 -0000
Subject: [llvm-commits] [llvm] r101229 - /llvm/trunk/lib/VMCore/Makefile
Message-ID: <20100414044036.17C102A6C12C@llvm.org>

Author: nicholas
Date: Tue Apr 13 23:40:35 2010
New Revision: 101229

URL: http://llvm.org/viewvc/llvm-project?rev=101229&view=rev
Log:
Fix 80 column ruler.

Modified:
    llvm/trunk/lib/VMCore/Makefile

Modified: llvm/trunk/lib/VMCore/Makefile
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Makefile?rev=101229&r1=101228&r2=101229&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/Makefile (original)
+++ llvm/trunk/lib/VMCore/Makefile Tue Apr 13 23:40:35 2010
@@ -1,4 +1,4 @@
-##===- lib/VMCore/Makefile ------------------------------*- Makefile -*-===##
+##===- lib/VMCore/Makefile ---------------------------------*- Makefile -*-===##
 #
 #                     The LLVM Compiler Infrastructure
 #




From clattner at apple.com  Tue Apr 13 23:44:51 2010
From: clattner at apple.com (Chris Lattner)
Date: Tue, 13 Apr 2010 21:44:51 -0700
Subject: [llvm-commits] [llvm] r101228 - in /llvm/trunk/tools/bugpoint:
	BugDriver.h Makefile
In-Reply-To: <20100414044032.0969C2A6C12D@llvm.org>
References: <20100414044032.0969C2A6C12D@llvm.org>
Message-ID: <E6B49EC5-AD82-48C3-B40C-F4CF88D8403E@apple.com>


On Apr 13, 2010, at 9:40 PM, Nick Lewycky wrote:

> Author: nicholas
> Date: Tue Apr 13 23:40:31 2010
> New Revision: 101228
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=101228&view=rev
> Log:
> Bugpoint no longer uses exceptions.

Nice!

> +++ llvm/trunk/tools/bugpoint/BugDriver.h Tue Apr 13 23:40:31 2010
> @@ -17,9 +17,12 @@
> #define BUGDRIVER_H
> 
> #include "llvm/ADT/DenseMap.h"
> +#include "llvm/Support/CommandLine.h"
> #include <vector>
> #include <string>
> 
> +extern llvm::cl::opt<bool> StripDebug;

I don't think this is needed?

-Chris

> +
> namespace llvm {
> 
> class Value;
> @@ -172,9 +175,7 @@
>   void compileProgram(Module *M, std::string *Error);
> 
>   /// executeProgram - This method runs "Program", capturing the output of the
> -  /// program to a file.  The recommended filename will be filled in with the
> -  /// name of the file with the captured output.  If there is a problem with
> -  /// the code generator (e.g., llc crashes), this will throw an exception.
> +  /// program to a file.  A recommended filename may be optionally specified.
>   ///
>   std::string executeProgram(std::string OutputFilename,
>                              std::string Bitcode,
> 
> Modified: llvm/trunk/tools/bugpoint/Makefile
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/Makefile?rev=101228&r1=101227&r2=101228&view=diff
> ==============================================================================
> --- llvm/trunk/tools/bugpoint/Makefile (original)
> +++ llvm/trunk/tools/bugpoint/Makefile Tue Apr 13 23:40:31 2010
> @@ -12,6 +12,5 @@
> 
> LINK_COMPONENTS := asmparser instrumentation scalaropts ipo \
>                    linker bitreader bitwriter
> -REQUIRES_EH := 1
> 
> include $(LEVEL)/Makefile.common
> 
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits




From nicholas at mxc.ca  Tue Apr 13 23:46:11 2010
From: nicholas at mxc.ca (Nick Lewycky)
Date: Wed, 14 Apr 2010 04:46:11 -0000
Subject: [llvm-commits] [llvm] r101230 -
	/llvm/trunk/tools/bugpoint/BugDriver.h
Message-ID: <20100414044611.47FDB2A6C12C@llvm.org>

Author: nicholas
Date: Tue Apr 13 23:46:11 2010
New Revision: 101230

URL: http://llvm.org/viewvc/llvm-project?rev=101230&view=rev
Log:
Remove accidentally committed cruft.

Modified:
    llvm/trunk/tools/bugpoint/BugDriver.h

Modified: llvm/trunk/tools/bugpoint/BugDriver.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/BugDriver.h?rev=101230&r1=101229&r2=101230&view=diff
==============================================================================
--- llvm/trunk/tools/bugpoint/BugDriver.h (original)
+++ llvm/trunk/tools/bugpoint/BugDriver.h Tue Apr 13 23:46:11 2010
@@ -17,12 +17,9 @@
 #define BUGDRIVER_H
 
 #include "llvm/ADT/DenseMap.h"
-#include "llvm/Support/CommandLine.h"
 #include <vector>
 #include <string>
 
-extern llvm::cl::opt<bool> StripDebug;
-
 namespace llvm {
 
 class Value;




From nicholas at mxc.ca  Tue Apr 13 23:47:36 2010
From: nicholas at mxc.ca (Nick Lewycky)
Date: Tue, 13 Apr 2010 21:47:36 -0700
Subject: [llvm-commits] [llvm] r101228 - in /llvm/trunk/tools/bugpoint:
 BugDriver.h Makefile
In-Reply-To: <E6B49EC5-AD82-48C3-B40C-F4CF88D8403E@apple.com>
References: <20100414044032.0969C2A6C12D@llvm.org>
	<E6B49EC5-AD82-48C3-B40C-F4CF88D8403E@apple.com>
Message-ID: <4BC548E8.805@mxc.ca>

Chris Lattner wrote:
>
> On Apr 13, 2010, at 9:40 PM, Nick Lewycky wrote:
>
>> Author: nicholas
>> Date: Tue Apr 13 23:40:31 2010
>> New Revision: 101228
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=101228&view=rev
>> Log:
>> Bugpoint no longer uses exceptions.
>
> Nice!
>
>> +++ llvm/trunk/tools/bugpoint/BugDriver.h Tue Apr 13 23:40:31 2010
>> @@ -17,9 +17,12 @@
>> #define BUGDRIVER_H
>>
>> #include "llvm/ADT/DenseMap.h"
>> +#include "llvm/Support/CommandLine.h"
>> #include<vector>
>> #include<string>
>>
>> +extern llvm::cl::opt<bool>  StripDebug;
>
> I don't think this is needed?

Whoops, how'd that slip in there? Fixed, thanks.

> -Chris
>
>> +
>> namespace llvm {
>>
>> class Value;
>> @@ -172,9 +175,7 @@
>>    void compileProgram(Module *M, std::string *Error);
>>
>>    /// executeProgram - This method runs "Program", capturing the output of the
>> -  /// program to a file.  The recommended filename will be filled in with the
>> -  /// name of the file with the captured output.  If there is a problem with
>> -  /// the code generator (e.g., llc crashes), this will throw an exception.
>> +  /// program to a file.  A recommended filename may be optionally specified.
>>    ///
>>    std::string executeProgram(std::string OutputFilename,
>>                               std::string Bitcode,
>>
>> Modified: llvm/trunk/tools/bugpoint/Makefile
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/Makefile?rev=101228&r1=101227&r2=101228&view=diff
>> ==============================================================================
>> --- llvm/trunk/tools/bugpoint/Makefile (original)
>> +++ llvm/trunk/tools/bugpoint/Makefile Tue Apr 13 23:40:31 2010
>> @@ -12,6 +12,5 @@
>>
>> LINK_COMPONENTS := asmparser instrumentation scalaropts ipo \
>>                     linker bitreader bitwriter
>> -REQUIRES_EH := 1
>>
>> include $(LEVEL)/Makefile.common
>>
>>
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
>



From nicholas at mxc.ca  Tue Apr 13 23:51:58 2010
From: nicholas at mxc.ca (Nick Lewycky)
Date: Wed, 14 Apr 2010 04:51:58 -0000
Subject: [llvm-commits] [llvm] r101231 - in /llvm/trunk:
 lib/Transforms/IPO/DeadArgumentElimination.cpp
 test/Transforms/DeadArgElim/deadexternal.ll
Message-ID: <20100414045158.49C082A6C12C@llvm.org>

Author: nicholas
Date: Tue Apr 13 23:51:58 2010
New Revision: 101231

URL: http://llvm.org/viewvc/llvm-project?rev=101231&view=rev
Log:
Revert r101213.

Modified:
    llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp
    llvm/trunk/test/Transforms/DeadArgElim/deadexternal.ll

Modified: llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp?rev=101231&r1=101230&r2=101231&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp Tue Apr 13 23:51:58 2010
@@ -30,7 +30,6 @@
 #include "llvm/Support/CallSite.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/raw_ostream.h"
-#include "llvm/Transforms/Utils/Local.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/Statistic.h"
 #include "llvm/ADT/StringExtras.h"
@@ -38,9 +37,8 @@
 #include <set>
 using namespace llvm;
 
-STATISTIC(NumArgumentsEliminated , "Number of unread args removed");
-STATISTIC(NumRetValsEliminated   , "Number of unused return values removed");
-STATISTIC(NumParametersEliminated, "Number of parameters replaced with undef");
+STATISTIC(NumArgumentsEliminated, "Number of unread args removed");
+STATISTIC(NumRetValsEliminated  , "Number of unused return values removed");
 
 namespace {
   /// DAE - The dead argument elimination pass.
@@ -142,7 +140,6 @@
     void MarkLive(const Function &F);
     void PropagateLiveness(const RetOrArg &RA);
     bool RemoveDeadStuffFromFunction(Function *F);
-    bool RemoveDeadParamsFromCallersOf(Function *F);
     bool DeleteDeadVarargs(Function &Fn);
   };
 }
@@ -400,9 +397,7 @@
 // map.
 //
 // We consider arguments of non-internal functions to be intrinsically alive as
-// well as arguments to functions which have their "address taken". Externally
-// visible functions are assumed to only have their return values intrinsically
-// alive, permitting removal of parameters to unused arguments in callers.
+// well as arguments to functions which have their "address taken".
 //
 void DAE::SurveyFunction(const Function &F) {
   unsigned RetCount = NumRetVals(&F);
@@ -425,14 +420,7 @@
         return;
       }
 
-  if (F.hasExternalLinkage() && !F.isDeclaration()) {
-    DEBUG(dbgs() << "DAE - Intrinsically live return from " << F.getName()
-                 << "\n");
-    // Mark the return values alive.
-    for (unsigned i = 0, e = NumRetVals(&F); i != e; ++i)
-      MarkLive(CreateRet(&F, i));
-  } else if (!F.hasLocalLinkage() &&
-             (!ShouldHackArguments() || F.isIntrinsic())) {
+  if (!F.hasLocalLinkage() && (!ShouldHackArguments() || F.isIntrinsic())) {
     MarkLive(F);
     return;
   }
@@ -544,14 +532,14 @@
 /// values (according to Uses) live as well.
 void DAE::MarkLive(const Function &F) {
   DEBUG(dbgs() << "DAE - Intrinsically live fn: " << F.getName() << "\n");
-  // Mark the function as live.
-  LiveFunctions.insert(&F);
-  // Mark all arguments as live.
-  for (unsigned i = 0, e = F.arg_size(); i != e; ++i)
-    PropagateLiveness(CreateArg(&F, i));
-  // Mark all return values as live.
-  for (unsigned i = 0, e = NumRetVals(&F); i != e; ++i)
-    PropagateLiveness(CreateRet(&F, i));
+    // Mark the function as live.
+    LiveFunctions.insert(&F);
+    // Mark all arguments as live.
+    for (unsigned i = 0, e = F.arg_size(); i != e; ++i)
+      PropagateLiveness(CreateArg(&F, i));
+    // Mark all return values as live.
+    for (unsigned i = 0, e = NumRetVals(&F); i != e; ++i)
+      PropagateLiveness(CreateRet(&F, i));
 }
 
 /// MarkLive - Mark the given return value or argument as live. Additionally,
@@ -865,7 +853,7 @@
       if (ReturnInst *RI = dyn_cast<ReturnInst>(BB->getTerminator())) {
         Value *RetVal;
 
-        if (NFTy->getReturnType()->isVoidTy()) {
+        if (NFTy->getReturnType() == Type::getVoidTy(F->getContext())) {
           RetVal = 0;
         } else {
           assert (RetTy->isStructTy());
@@ -971,10 +959,7 @@
     // Increment now, because the function will probably get removed (ie.
     // replaced by a new one).
     Function *F = I++;
-    if (F->hasExternalLinkage() && !F->isDeclaration())
-      Changed |= RemoveDeadParamsFromCallersOf(F);
-    else
-      Changed |= RemoveDeadStuffFromFunction(F);
+    Changed |= RemoveDeadStuffFromFunction(F);
   }
   return Changed;
 }

Modified: llvm/trunk/test/Transforms/DeadArgElim/deadexternal.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/DeadArgElim/deadexternal.ll?rev=101231&r1=101230&r2=101231&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/DeadArgElim/deadexternal.ll (original)
+++ llvm/trunk/test/Transforms/DeadArgElim/deadexternal.ll Tue Apr 13 23:51:58 2010
@@ -1,4 +1,5 @@
 ; RUN: opt -deadargelim -S %s | FileCheck %s
+; XFAIL: *
 
 define void @test(i32) {
   ret void




From nicholas at mxc.ca  Wed Apr 14 00:03:50 2010
From: nicholas at mxc.ca (Nick Lewycky)
Date: Wed, 14 Apr 2010 05:03:50 -0000
Subject: [llvm-commits] [llvm] r101232 -
	/llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp
Message-ID: <20100414050350.E8FF92A6C12C@llvm.org>

Author: nicholas
Date: Wed Apr 14 00:03:50 2010
New Revision: 101232

URL: http://llvm.org/viewvc/llvm-project?rev=101232&view=rev
Log:
I don't know how, but I managed to goof the revert. Remove function that should
have been removed in r101231.

Modified:
    llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp

Modified: llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp?rev=101232&r1=101231&r2=101232&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp Wed Apr 14 00:03:50 2010
@@ -894,43 +894,6 @@
   return true;
 }
 
-bool DAE::RemoveDeadParamsFromCallersOf(Function *F) {
-  // Don't modify fully live functions
-  if (LiveFunctions.count(F))
-    return false;
-
-  // Make a list of the dead arguments.
-  SmallVector<int, 10> ArgDead;
-  unsigned i = 0;
-  for (Function::arg_iterator I = F->arg_begin(), E = F->arg_end();
-       I != E; ++I, ++i) {
-    RetOrArg Arg = CreateArg(F, i);
-    if (!LiveValues.count(Arg))
-      ArgDead.push_back(i);
-  }
-  if (ArgDead.empty())
-    return false;
-
-  bool MadeChange = false;
-  for (Function::use_iterator I = F->use_begin(), E = F->use_end();
-       I != E; ++I) {
-    CallSite CS = CallSite::get(*I);
-    if (CS.getInstruction() && CS.isCallee(I)) {
-      for (unsigned i = 0, e = ArgDead.size(); i != e; ++i) {
-        Value *A = CS.getArgument(ArgDead[i]);
-        if (!isa<UndefValue>(A)) {
-          ++NumParametersEliminated;
-          MadeChange = true;
-          CS.setArgument(ArgDead[i], UndefValue::get(A->getType()));
-          RecursivelyDeleteTriviallyDeadInstructions(A);
-        }
-      }
-    }
-  }
-
-  return MadeChange;
-}
-
 bool DAE::runOnModule(Module &M) {
   bool Changed = false;
 




From nicholas at mxc.ca  Wed Apr 14 00:30:13 2010
From: nicholas at mxc.ca (Nick Lewycky)
Date: Wed, 14 Apr 2010 05:30:13 -0000
Subject: [llvm-commits] [llvm] r101233 - /llvm/trunk/lib/VMCore/Makefile
Message-ID: <20100414053013.586E92A6C12C@llvm.org>

Author: nicholas
Date: Wed Apr 14 00:30:13 2010
New Revision: 101233

URL: http://llvm.org/viewvc/llvm-project?rev=101233&view=rev
Log:
Turn off RTTI for VMCore. Yay!

Modified:
    llvm/trunk/lib/VMCore/Makefile

Modified: llvm/trunk/lib/VMCore/Makefile
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Makefile?rev=101233&r1=101232&r2=101233&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/Makefile (original)
+++ llvm/trunk/lib/VMCore/Makefile Wed Apr 14 00:30:13 2010
@@ -9,7 +9,6 @@
 LEVEL = ../..
 LIBRARYNAME = LLVMCore
 BUILD_ARCHIVE = 1
-REQUIRES_RTTI = 1
 
 BUILT_SOURCES = $(PROJ_OBJ_ROOT)/include/llvm/Intrinsics.gen
 




From nicholas at mxc.ca  Wed Apr 14 00:35:20 2010
From: nicholas at mxc.ca (Nick Lewycky)
Date: Wed, 14 Apr 2010 05:35:20 -0000
Subject: [llvm-commits] [llvm] r101234 -
	/llvm/trunk/tools/bugpoint/CMakeLists.txt
Message-ID: <20100414053520.8B57C2A6C12C@llvm.org>

Author: nicholas
Date: Wed Apr 14 00:35:20 2010
New Revision: 101234

URL: http://llvm.org/viewvc/llvm-project?rev=101234&view=rev
Log:
Don't forget cmake!

Modified:
    llvm/trunk/tools/bugpoint/CMakeLists.txt

Modified: llvm/trunk/tools/bugpoint/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/CMakeLists.txt?rev=101234&r1=101233&r2=101234&view=diff
==============================================================================
--- llvm/trunk/tools/bugpoint/CMakeLists.txt (original)
+++ llvm/trunk/tools/bugpoint/CMakeLists.txt Wed Apr 14 00:35:20 2010
@@ -1,6 +1,5 @@
 set(LLVM_LINK_COMPONENTS asmparser instrumentation scalaropts ipo
   linker bitreader bitwriter)
-set(LLVM_REQUIRES_EH 1)
 
 add_llvm_tool(bugpoint
   BugDriver.cpp




From nicholas at mxc.ca  Wed Apr 14 00:51:59 2010
From: nicholas at mxc.ca (Nick Lewycky)
Date: Wed, 14 Apr 2010 05:51:59 -0000
Subject: [llvm-commits] [llvm] r101237 - /llvm/trunk/lib/VMCore/Makefile
Message-ID: <20100414055159.E9AE82A6C12C@llvm.org>

Author: nicholas
Date: Wed Apr 14 00:51:59 2010
New Revision: 101237

URL: http://llvm.org/viewvc/llvm-project?rev=101237&view=rev
Log:
Enable RTTI again. While this works fine for LLVM, it creates an ABI
incompatibility with some clients covered by the buildbots, such as llvm-gcc.

Modified:
    llvm/trunk/lib/VMCore/Makefile

Modified: llvm/trunk/lib/VMCore/Makefile
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Makefile?rev=101237&r1=101236&r2=101237&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/Makefile (original)
+++ llvm/trunk/lib/VMCore/Makefile Wed Apr 14 00:51:59 2010
@@ -9,6 +9,7 @@
 LEVEL = ../..
 LIBRARYNAME = LLVMCore
 BUILD_ARCHIVE = 1
+REQUIRES_RTTI = 1
 
 BUILT_SOURCES = $(PROJ_OBJ_ROOT)/include/llvm/Intrinsics.gen
 




From baldrick at free.fr  Wed Apr 14 01:10:51 2010
From: baldrick at free.fr (Duncan Sands)
Date: Wed, 14 Apr 2010 08:10:51 +0200
Subject: [llvm-commits] [llvm-gcc-4.2] r100149	-
	/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
In-Reply-To: <D8C64E37-9E8E-4F6B-9520-A1ED2DF3ADAD@apple.com>
References: <20100401230827.A409D2A6C12C@llvm.org> <4BB59A6B.2050601@free.fr>
	<D8C64E37-9E8E-4F6B-9520-A1ED2DF3ADAD@apple.com>
Message-ID: <4BC55C6B.40103@free.fr>

Hi Bill,

>> while you are there, maybe you can fix the problem that this variable breaks
>> LTO with multi-language programs.  For example, if I compile some C++ then
>> .llvm.eh.catch.all.value is set to null; with Ada it is to set some different
>> Ada value.  If I link the bitcode for these two together than the result won't
>> work, either because the Ada value will be used for the C++, or because the
>> C++ value will be used with the Ada.  This variable should really be some kind
>> of map from the personality function to the catch-all.
>>
> Hi Duncan,
>
> That's a longer-term goal of mine. Right now, it's dangerous to mix Ada, C++, etc. methods which could throw exceptions, because if they're inlined then they won't use the correct personality functions anyway.
>
> But there is a bug in here...It's keeping this weak external around. I need to mark it as "private" or something...

I had an idea which (if it works out) means that we don't need to do any of
these tricks, and should solve all of the traditional problems we have with
exception handling.  I will try to whip up some proof of concept code.

Ciao,

Duncan.


From baldrick at free.fr  Wed Apr 14 06:05:01 2010
From: baldrick at free.fr (Duncan Sands)
Date: Wed, 14 Apr 2010 11:05:01 -0000
Subject: [llvm-commits] [dragonegg] r101240 - /dragonegg/trunk/Makefile
Message-ID: <20100414110501.DDDB62A6C12C@llvm.org>

Author: baldrick
Date: Wed Apr 14 06:05:01 2010
New Revision: 101240

URL: http://llvm.org/viewvc/llvm-project?rev=101240&view=rev
Log:
Use -dumpmachine to get the target, rather than using -v and
pattern matching.

Modified:
    dragonegg/trunk/Makefile

Modified: dragonegg/trunk/Makefile
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/Makefile?rev=101240&r1=101239&r2=101240&view=diff
==============================================================================
--- dragonegg/trunk/Makefile (original)
+++ dragonegg/trunk/Makefile Wed Apr 14 06:05:01 2010
@@ -26,8 +26,8 @@
 LOADABLE_MODULE_OPTIONS=-shared
 endif
 
-GCC_PLUGIN_DIR=$(shell $(GCC) -print-file-name=plugin)
-TARGET_TRIPLE:=$(shell $(GCC) -v 2>&1 | grep "^Target:" | sed -e "s/^Target: *//")
+GCC_PLUGIN_DIR:=$(shell $(GCC) -print-file-name=plugin)
+TARGET_TRIPLE:=$(shell $(GCC) -dumpmachine)
 
 # NOTE: replace with an informative string when doing a release.
 REVISION:=$(shell svnversion -n $(SRC_DIR))




From grosser at fim.uni-passau.de  Wed Apr 14 08:50:45 2010
From: grosser at fim.uni-passau.de (Tobias Grosser)
Date: Wed, 14 Apr 2010 15:50:45 +0200
Subject: [llvm-commits] [PATCH] Missing libraries in cmake build?
In-Reply-To: <11256_1271105138_4BC38671_11256_2193_1_CE253174-14BA-407B-AB39-17947E61D557@apple.com>
References: <4BC368E2.3040400@fim.uni-passau.de>
	<11256_1271105138_4BC38671_11256_2193_1_CE253174-14BA-407B-AB39-17947E61D557@apple.com>
Message-ID: <4BC5C835.2010604@fim.uni-passau.de>

On 04/12/10 22:44, Chris Lattner wrote:
> On Apr 12, 2010, at 11:39 AM, Tobias Grosser wrote:
>
>> Hi,
>>
>> I get this error using cmake and BUILD_SHARED_LIBS=1 on a build using LLVM trunk + one additional pass added by me.
>
> Hi Tobias,
>
> IPO depending on scalaropts seems fine, but I don't think scalaropts should depend on instcombine.

OK. I analyzed the bug a little bit more.

This commit broke LLVM build with BUILD_SHARED_LIBS=1 (on plain trunk):
-----------------------------------------------------------------------
Author: Wesley Peck <peckw at wesleypeck.com>
Date:   Fri Apr 9 20:43:20 2010 +0000

     Adding IPSCCP and Internalize passes to the C-bindings
-----------------------------------------------------------------------

The issues can be solved by adding this to CMAKE:

target_link_libraries (LLVMipo LLVMScalarOpts LLVMInstCombine)

So scalaropts will not depend on instcombine, however IPO will. This 
sounds OK to me.

I attached a patch. OK to commit?

Tobi
> -Chris
>
>>
>> Linking CXX executable ../../bin/llvm-extract
>> ../../lib/libLLVMipo.so: undefined reference to `llvm::createIPSCCPPass()'
>> collect2: ld returned 1 exit status
>> gmake[2]: *** [bin/llvm-extract] Error 1
>> gmake[1]: *** [tools/llvm-extract/CMakeFiles/llvm-extract.dir/all] Error 2
>> gmake: *** [all] Error 2
>>
>> For me it seems there are some libraries missing in the CMakeLists.txt
>> files. The problem does not appear neither with a clean trunk nor with LLVM + my patches build using the autotools infrastructure.
>>
>> However the patch solves the build issues on my side and they seem to be consistent as IPO really uses a function defined in ScalarOpt.
>>
>> Therefore I believe this is correct and propose this patch for LLVM trunk.
>>
>> OK to commit?
>>
>> Thanks
>>
>> Tobi
>> <llvm_Add-missing-libraries-to-cmake.patch>_______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits

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From benny.kra at googlemail.com  Wed Apr 14 08:56:38 2010
From: benny.kra at googlemail.com (Benjamin Kramer)
Date: Wed, 14 Apr 2010 13:56:38 -0000
Subject: [llvm-commits] [llvm] r101241 -
	/llvm/trunk/utils/TableGen/EDEmitter.cpp
Message-ID: <20100414135638.B4C572A6C12C@llvm.org>

Author: d0k
Date: Wed Apr 14 08:56:38 2010
New Revision: 101241

URL: http://llvm.org/viewvc/llvm-project?rev=101241&view=rev
Log:
EDis: Don't include inttypes.h. We support compilers which don't provide it. It was unused anyways.

Modified:
    llvm/trunk/utils/TableGen/EDEmitter.cpp

Modified: llvm/trunk/utils/TableGen/EDEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/EDEmitter.cpp?rev=101241&r1=101240&r2=101241&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/EDEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/EDEmitter.cpp Wed Apr 14 08:56:38 2010
@@ -896,8 +896,6 @@
   o << "#ifndef EDInfo_" << "\n";
   o << "#define EDInfo_" << "\n";
   o << "\n";
-  o << "#include <inttypes.h>" << "\n";
-  o << "\n";
   o << "#define EDIS_MAX_OPERANDS " << format("%d", EDIS_MAX_OPERANDS) << "\n";
   o << "#define EDIS_MAX_SYNTAXES " << format("%d", EDIS_MAX_SYNTAXES) << "\n";
   o << "\n";




From baldrick at free.fr  Wed Apr 14 09:53:31 2010
From: baldrick at free.fr (Duncan Sands)
Date: Wed, 14 Apr 2010 14:53:31 -0000
Subject: [llvm-commits] [dragonegg] r101242 -
	/dragonegg/trunk/extras/buildbot_self_strap
Message-ID: <20100414145331.BF7DA2A6C12C@llvm.org>

Author: baldrick
Date: Wed Apr 14 09:53:31 2010
New Revision: 101242

URL: http://llvm.org/viewvc/llvm-project?rev=101242&view=rev
Log:
Experiment with having the buildbot build more languages.

Modified:
    dragonegg/trunk/extras/buildbot_self_strap

Modified: dragonegg/trunk/extras/buildbot_self_strap
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/extras/buildbot_self_strap?rev=101242&r1=101241&r2=101242&view=diff
==============================================================================
--- dragonegg/trunk/extras/buildbot_self_strap (original)
+++ dragonegg/trunk/extras/buildbot_self_strap Wed Apr 14 09:53:31 2010
@@ -11,7 +11,7 @@
 ln -sf $DRAGONEGG_SOURCE $BUILD_DIR/dragonegg
 
 export CPPFLAGS="-I/opt/cfarm/mpfr-2.4.1/include -I/opt/cfarm/gmp-4.2.4/include/ -I /opt/cfarm/mpc-0.8/include/"
-export GCC_OPTIONS="--with-mpfr=/opt/cfarm/mpfr-2.4.1 --with-gmp=/opt/cfarm/gmp-4.2.4 --with-mpc=/opt/cfarm/mpc-0.8 --with-libelf=/opt/cfarm/libelf-0.8.12"
+export GCC_OPTIONS="--enable-languages=c,c++,fortran,objc,obj-c++ --with-mpfr=/opt/cfarm/mpfr-2.4.1 --with-gmp=/opt/cfarm/gmp-4.2.4 --with-mpc=/opt/cfarm/mpc-0.8 --with-libelf=/opt/cfarm/libelf-0.8.12"
 
 cd $BUILD_DIR
 $DRAGONEGG_SOURCE/extras/do_self_strap




From gohman at apple.com  Wed Apr 14 10:33:04 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 15:33:04 -0000
Subject: [llvm-commits] [llvm] r101243 -
	/llvm/trunk/include/llvm/Support/CFG.h
Message-ID: <20100414153304.B7E5F2A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 10:33:04 2010
New Revision: 101243

URL: http://llvm.org/viewvc/llvm-project?rev=101243&view=rev
Log:
Make helper utility members private.

Modified:
    llvm/trunk/include/llvm/Support/CFG.h

Modified: llvm/trunk/include/llvm/Support/CFG.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/CFG.h?rev=101243&r1=101242&r2=101243&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/CFG.h (original)
+++ llvm/trunk/include/llvm/Support/CFG.h Wed Apr 14 10:33:04 2010
@@ -29,10 +29,8 @@
 class PredIterator : public std::iterator<std::forward_iterator_tag,
                                           _Ptr, ptrdiff_t> {
   typedef std::iterator<std::forward_iterator_tag, _Ptr, ptrdiff_t> super;
-  _USE_iterator It;
-public:
   typedef PredIterator<_Ptr,_USE_iterator> _Self;
-  typedef typename super::pointer pointer;
+  _USE_iterator It;
 
   inline void advancePastNonTerminators() {
     // Loop to ignore non terminator uses (for example PHI nodes)...
@@ -40,6 +38,9 @@
       ++It;
   }
 
+public:
+  typedef typename super::pointer pointer;
+
   inline PredIterator(_Ptr *bb) : It(bb->use_begin()) {
     advancePastNonTerminators();
   }




From gohman at apple.com  Wed Apr 14 10:38:15 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 15:38:15 -0000
Subject: [llvm-commits] [llvm] r101244 -
	/llvm/trunk/include/llvm/Support/CFG.h
Message-ID: <20100414153815.4011C2A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 10:38:15 2010
New Revision: 101244

URL: http://llvm.org/viewvc/llvm-project?rev=101244&view=rev
Log:
Make SuccIterator's private parts private too.

Modified:
    llvm/trunk/include/llvm/Support/CFG.h

Modified: llvm/trunk/include/llvm/Support/CFG.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/CFG.h?rev=101244&r1=101243&r2=101244&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/CFG.h (original)
+++ llvm/trunk/include/llvm/Support/CFG.h Wed Apr 14 10:38:15 2010
@@ -91,8 +91,13 @@
   const Term_ Term;
   unsigned idx;
   typedef std::iterator<std::bidirectional_iterator_tag, BB_, ptrdiff_t> super;
-public:
   typedef SuccIterator<Term_, BB_> _Self;
+
+  inline bool index_is_valid(int idx) {
+    return idx >= 0 && (unsigned) idx < Term->getNumSuccessors();
+  }
+
+public:
   typedef typename super::pointer pointer;
   // TODO: This can be random access iterator, only operator[] missing.
 
@@ -110,10 +115,6 @@
     return *this;
   }
 
-  inline bool index_is_valid (int idx) {
-    return idx >= 0 && (unsigned) idx < Term->getNumSuccessors();
-  }
-
   /// getSuccessorIndex - This is used to interface between code that wants to
   /// operate on terminator instructions directly.
   unsigned getSuccessorIndex() const { return idx; }




From gohman at apple.com  Wed Apr 14 10:41:50 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 15:41:50 -0000
Subject: [llvm-commits] [llvm] r101245 -
	/llvm/trunk/include/llvm/Support/CFG.h
Message-ID: <20100414154150.7AFE22A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 10:41:50 2010
New Revision: 101245

URL: http://llvm.org/viewvc/llvm-project?rev=101245&view=rev
Log:
Use C++, not C++-standard-library-internals-ese.

Modified:
    llvm/trunk/include/llvm/Support/CFG.h

Modified: llvm/trunk/include/llvm/Support/CFG.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/CFG.h?rev=101245&r1=101244&r2=101245&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/CFG.h (original)
+++ llvm/trunk/include/llvm/Support/CFG.h Wed Apr 14 10:41:50 2010
@@ -25,12 +25,12 @@
 // BasicBlock pred_iterator definition
 //===----------------------------------------------------------------------===//
 
-template <class _Ptr,  class _USE_iterator> // Predecessor Iterator
+template <class Ptr,  class USE_iterator> // Predecessor Iterator
 class PredIterator : public std::iterator<std::forward_iterator_tag,
-                                          _Ptr, ptrdiff_t> {
-  typedef std::iterator<std::forward_iterator_tag, _Ptr, ptrdiff_t> super;
-  typedef PredIterator<_Ptr,_USE_iterator> _Self;
-  _USE_iterator It;
+                                          Ptr, ptrdiff_t> {
+  typedef std::iterator<std::forward_iterator_tag, Ptr, ptrdiff_t> super;
+  typedef PredIterator<Ptr, USE_iterator> Self;
+  USE_iterator It;
 
   inline void advancePastNonTerminators() {
     // Loop to ignore non terminator uses (for example PHI nodes)...
@@ -41,13 +41,13 @@
 public:
   typedef typename super::pointer pointer;
 
-  inline PredIterator(_Ptr *bb) : It(bb->use_begin()) {
+  inline PredIterator(Ptr *bb) : It(bb->use_begin()) {
     advancePastNonTerminators();
   }
-  inline PredIterator(_Ptr *bb, bool) : It(bb->use_end()) {}
+  inline PredIterator(Ptr *bb, bool) : It(bb->use_end()) {}
 
-  inline bool operator==(const _Self& x) const { return It == x.It; }
-  inline bool operator!=(const _Self& x) const { return !operator==(x); }
+  inline bool operator==(const Self& x) const { return It == x.It; }
+  inline bool operator!=(const Self& x) const { return !operator==(x); }
 
   inline pointer operator*() const {
     assert(!It.atEnd() && "pred_iterator out of range!");
@@ -55,14 +55,14 @@
   }
   inline pointer *operator->() const { return &(operator*()); }
 
-  inline _Self& operator++() {   // Preincrement
+  inline Self& operator++() {   // Preincrement
     assert(!It.atEnd() && "pred_iterator out of range!");
     ++It; advancePastNonTerminators();
     return *this;
   }
 
-  inline _Self operator++(int) { // Postincrement
-    _Self tmp = *this; ++*this; return tmp;
+  inline Self operator++(int) { // Postincrement
+    Self tmp = *this; ++*this; return tmp;
   }
 };
 
@@ -91,7 +91,7 @@
   const Term_ Term;
   unsigned idx;
   typedef std::iterator<std::bidirectional_iterator_tag, BB_, ptrdiff_t> super;
-  typedef SuccIterator<Term_, BB_> _Self;
+  typedef SuccIterator<Term_, BB_> Self;
 
   inline bool index_is_valid(int idx) {
     return idx >= 0 && (unsigned) idx < Term->getNumSuccessors();
@@ -109,7 +109,7 @@
     assert(T && "getTerminator returned null!");
   }
 
-  inline const _Self &operator=(const _Self &I) {
+  inline const Self &operator=(const Self &I) {
     assert(Term == I.Term &&"Cannot assign iterators to two different blocks!");
     idx = I.idx;
     return *this;
@@ -119,64 +119,64 @@
   /// operate on terminator instructions directly.
   unsigned getSuccessorIndex() const { return idx; }
 
-  inline bool operator==(const _Self& x) const { return idx == x.idx; }
-  inline bool operator!=(const _Self& x) const { return !operator==(x); }
+  inline bool operator==(const Self& x) const { return idx == x.idx; }
+  inline bool operator!=(const Self& x) const { return !operator==(x); }
 
   inline pointer operator*() const { return Term->getSuccessor(idx); }
   inline pointer operator->() const { return operator*(); }
 
-  inline _Self& operator++() { ++idx; return *this; } // Preincrement
+  inline Self& operator++() { ++idx; return *this; } // Preincrement
 
-  inline _Self operator++(int) { // Postincrement
-    _Self tmp = *this; ++*this; return tmp;
+  inline Self operator++(int) { // Postincrement
+    Self tmp = *this; ++*this; return tmp;
   }
 
-  inline _Self& operator--() { --idx; return *this; }  // Predecrement
-  inline _Self operator--(int) { // Postdecrement
-    _Self tmp = *this; --*this; return tmp;
+  inline Self& operator--() { --idx; return *this; }  // Predecrement
+  inline Self operator--(int) { // Postdecrement
+    Self tmp = *this; --*this; return tmp;
   }
 
-  inline bool operator<(const _Self& x) const {
+  inline bool operator<(const Self& x) const {
     assert(Term == x.Term && "Cannot compare iterators of different blocks!");
     return idx < x.idx;
   }
 
-  inline bool operator<=(const _Self& x) const {
+  inline bool operator<=(const Self& x) const {
     assert(Term == x.Term && "Cannot compare iterators of different blocks!");
     return idx <= x.idx;
   }
-  inline bool operator>=(const _Self& x) const {
+  inline bool operator>=(const Self& x) const {
     assert(Term == x.Term && "Cannot compare iterators of different blocks!");
     return idx >= x.idx;
   }
 
-  inline bool operator>(const _Self& x) const {
+  inline bool operator>(const Self& x) const {
     assert(Term == x.Term && "Cannot compare iterators of different blocks!");
     return idx > x.idx;
   }
 
-  inline _Self& operator+=(int Right) {
+  inline Self& operator+=(int Right) {
     unsigned new_idx = idx + Right;
     assert(index_is_valid(new_idx) && "Iterator index out of bound");
     idx = new_idx;
     return *this;
   }
 
-  inline _Self operator+(int Right) {
-    _Self tmp = *this;
+  inline Self operator+(int Right) {
+    Self tmp = *this;
     tmp += Right;
     return tmp;
   }
 
-  inline _Self& operator-=(int Right) {
+  inline Self& operator-=(int Right) {
     return operator+=(-Right);
   }
 
-  inline _Self operator-(int Right) {
+  inline Self operator-(int Right) {
     return operator+(-Right);
   }
 
-  inline int operator-(const _Self& x) {
+  inline int operator-(const Self& x) {
     assert(Term == x.Term && "Cannot work on iterators of different blocks!");
     int distance = idx - x.idx;
     return distance;
@@ -187,7 +187,7 @@
   // be modified are not available.
   //
   // inline pointer operator[](int offset) {
-  //  _Self tmp = *this;
+  //  Self tmp = *this;
   //  tmp += offset;
   //  return tmp.operator*();
   // }




From gohman at apple.com  Wed Apr 14 10:50:02 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 15:50:02 -0000
Subject: [llvm-commits] [llvm] r101246 -
	/llvm/trunk/include/llvm/Support/CFG.h
Message-ID: <20100414155002.AC57C2A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 10:50:02 2010
New Revision: 101246

URL: http://llvm.org/viewvc/llvm-project?rev=101246&view=rev
Log:
Add explicit keywords.

Modified:
    llvm/trunk/include/llvm/Support/CFG.h

Modified: llvm/trunk/include/llvm/Support/CFG.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/CFG.h?rev=101246&r1=101245&r2=101246&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/CFG.h (original)
+++ llvm/trunk/include/llvm/Support/CFG.h Wed Apr 14 10:50:02 2010
@@ -41,7 +41,7 @@
 public:
   typedef typename super::pointer pointer;
 
-  inline PredIterator(Ptr *bb) : It(bb->use_begin()) {
+  explicit inline PredIterator(Ptr *bb) : It(bb->use_begin()) {
     advancePastNonTerminators();
   }
   inline PredIterator(Ptr *bb, bool) : It(bb->use_end()) {}
@@ -101,7 +101,7 @@
   typedef typename super::pointer pointer;
   // TODO: This can be random access iterator, only operator[] missing.
 
-  inline SuccIterator(Term_ T) : Term(T), idx(0) {         // begin iterator
+  explicit inline SuccIterator(Term_ T) : Term(T), idx(0) {// begin iterator
     assert(T && "getTerminator returned null!");
   }
   inline SuccIterator(Term_ T, bool)                       // end iterator




From gohman at apple.com  Wed Apr 14 10:59:02 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 15:59:02 -0000
Subject: [llvm-commits] [llvm] r101247 -
	/llvm/trunk/include/llvm/Support/CFG.h
Message-ID: <20100414155902.DC7A02A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 10:59:02 2010
New Revision: 101247

URL: http://llvm.org/viewvc/llvm-project?rev=101247&view=rev
Log:
Fix whitespace, comments.

Modified:
    llvm/trunk/include/llvm/Support/CFG.h

Modified: llvm/trunk/include/llvm/Support/CFG.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/CFG.h?rev=101247&r1=101246&r2=101247&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/CFG.h (original)
+++ llvm/trunk/include/llvm/Support/CFG.h Wed Apr 14 10:59:02 2010
@@ -25,7 +25,7 @@
 // BasicBlock pred_iterator definition
 //===----------------------------------------------------------------------===//
 
-template <class Ptr,  class USE_iterator> // Predecessor Iterator
+template <class Ptr, class USE_iterator> // Predecessor Iterator
 class PredIterator : public std::iterator<std::forward_iterator_tag,
                                           Ptr, ptrdiff_t> {
   typedef std::iterator<std::forward_iterator_tag, Ptr, ptrdiff_t> super;
@@ -33,7 +33,7 @@
   USE_iterator It;
 
   inline void advancePastNonTerminators() {
-    // Loop to ignore non terminator uses (for example PHI nodes)...
+    // Loop to ignore non terminator uses (for example PHI nodes).
     while (!It.atEnd() && !isa<TerminatorInst>(*It))
       ++It;
   }
@@ -194,7 +194,7 @@
 
   /// Get the source BB of this iterator.
   inline BB_ *getSource() {
-      return Term->getParent();
+    return Term->getParent();
   }
 };
 




From gohman at apple.com  Wed Apr 14 11:08:56 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 16:08:56 -0000
Subject: [llvm-commits] [llvm] r101248 -
	/llvm/trunk/lib/Analysis/ScalarEvolution.cpp
Message-ID: <20100414160856.DEA242A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 11:08:56 2010
New Revision: 101248

URL: http://llvm.org/viewvc/llvm-project?rev=101248&view=rev
Log:
Add a comment.

Modified:
    llvm/trunk/lib/Analysis/ScalarEvolution.cpp

Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=101248&r1=101247&r2=101248&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original)
+++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Wed Apr 14 11:08:56 2010
@@ -4634,6 +4634,8 @@
 
 /// getLoopPredecessor - If the given loop's header has exactly one unique
 /// predecessor outside the loop, return it. Otherwise return null.
+/// This is less strict that the loop "preheader" concept, which requires
+/// the predecessor to have only one single successor.
 ///
 BasicBlock *ScalarEvolution::getLoopPredecessor(const Loop *L) {
   BasicBlock *Header = L->getHeader();




From ggreif at gmail.com  Wed Apr 14 11:13:56 2010
From: ggreif at gmail.com (Gabor Greif)
Date: Wed, 14 Apr 2010 16:13:56 -0000
Subject: [llvm-commits] [llvm] r101250 -
	/llvm/trunk/lib/Transforms/Scalar/LICM.cpp
Message-ID: <20100414161356.AF3702A6C12C@llvm.org>

Author: ggreif
Date: Wed Apr 14 11:13:56 2010
New Revision: 101250

URL: http://llvm.org/viewvc/llvm-project?rev=101250&view=rev
Log:
performance: cache the dereferenced use_iterator

Modified:
    llvm/trunk/lib/Transforms/Scalar/LICM.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/LICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LICM.cpp?rev=101250&r1=101249&r2=101250&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LICM.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LICM.cpp Wed Apr 14 11:13:56 2010
@@ -683,16 +683,18 @@
       // to LI as we are loading or storing.  Since we know that the value is
       // stored in this loop, this will always succeed.
       for (Value::use_iterator UI = Ptr->use_begin(), E = Ptr->use_end();
-           UI != E; ++UI)
-        if (LoadInst *LI = dyn_cast<LoadInst>(*UI)) {
+           UI != E; ++UI) {
+        User *U = *UI;
+        if (LoadInst *LI = dyn_cast<LoadInst>(U)) {
           LoadValue = LI;
           break;
-        } else if (StoreInst *SI = dyn_cast<StoreInst>(*UI)) {
+        } else if (StoreInst *SI = dyn_cast<StoreInst>(U)) {
           if (SI->getOperand(1) == Ptr) {
             LoadValue = SI->getOperand(0);
             break;
           }
         }
+      }
       assert(LoadValue && "No store through the pointer found!");
       PointerValueNumbers.push_back(LoadValue);  // Remember this for later.
     }




From gohman at apple.com  Wed Apr 14 11:30:40 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 16:30:40 -0000
Subject: [llvm-commits] [llvm] r101251 -
 /llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
Message-ID: <20100414163040.D227C2A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 11:30:40 2010
New Revision: 101251

URL: http://llvm.org/viewvc/llvm-project?rev=101251&view=rev
Log:
It's not necessary to recompute EB here.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp?rev=101251&r1=101250&r2=101251&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp Wed Apr 14 11:30:40 2010
@@ -196,7 +196,7 @@
   // Create an initial MachineBasicBlock for each LLVM BasicBlock in F.  This
   // also creates the initial PHI MachineInstrs, though none of the input
   // operands are populated.
-  for (BB = Fn->begin(), EB = Fn->end(); BB != EB; ++BB) {
+  for (BB = Fn->begin(); BB != EB; ++BB) {
     MachineBasicBlock *MBB = mf.CreateMachineBasicBlock(BB);
     MBBMap[BB] = MBB;
     MF->push_back(MBB);




From gohman at apple.com  Wed Apr 14 11:32:57 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 16:32:57 -0000
Subject: [llvm-commits] [llvm] r101252 - in
 /llvm/trunk/lib/CodeGen/SelectionDAG: FunctionLoweringInfo.cpp
 SelectionDAGISel.cpp
Message-ID: <20100414163257.18F622A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 11:32:56 2010
New Revision: 101252

URL: http://llvm.org/viewvc/llvm-project?rev=101252&view=rev
Log:
Sink landing-pad marking code out of
SelectionDAGISel::runOnMachineFunction into FunctionLowering.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp?rev=101252&r1=101251&r2=101252&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp Wed Apr 14 11:32:56 2010
@@ -232,6 +232,11 @@
       }
     }
   }
+
+  // Mark landing pad blocks.
+  for (BB = Fn->begin(); BB != EB; ++BB)
+    if (InvokeInst *Invoke = dyn_cast<InvokeInst>(BB->getTerminator()))
+      MBBMap[Invoke->getSuccessor(1)]->setIsLandingPad();
 }
 
 /// clear - Clear out all the function-specific state. This returns this

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=101252&r1=101251&r2=101252&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Wed Apr 14 11:32:56 2010
@@ -332,11 +332,6 @@
   FuncInfo->set(Fn, *MF, EnableFastISel);
   SDB->init(GFI, *AA);
 
-  for (Function::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I)
-    if (InvokeInst *Invoke = dyn_cast<InvokeInst>(I->getTerminator()))
-      // Mark landing pad.
-      FuncInfo->MBBMap[Invoke->getSuccessor(1)]->setIsLandingPad();
-
   SelectAllBasicBlocks(Fn, *MF, TII);
 
   // If the first basic block in the function has live ins that need to be




From ggreif at gmail.com  Wed Apr 14 11:48:56 2010
From: ggreif at gmail.com (Gabor Greif)
Date: Wed, 14 Apr 2010 16:48:56 -0000
Subject: [llvm-commits] [llvm] r101253 -
	/llvm/trunk/lib/Transforms/Scalar/Reg2Mem.cpp
Message-ID: <20100414164856.51A132A6C12C@llvm.org>

Author: ggreif
Date: Wed Apr 14 11:48:56 2010
New Revision: 101253

URL: http://llvm.org/viewvc/llvm-project?rev=101253&view=rev
Log:
performance: cache the dereferenced use_iterator

Modified:
    llvm/trunk/lib/Transforms/Scalar/Reg2Mem.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/Reg2Mem.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/Reg2Mem.cpp?rev=101253&r1=101252&r2=101253&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/Reg2Mem.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/Reg2Mem.cpp Wed Apr 14 11:48:56 2010
@@ -46,10 +46,11 @@
    bool valueEscapes(const Instruction *Inst) const {
      const BasicBlock *BB = Inst->getParent();
       for (Value::const_use_iterator UI = Inst->use_begin(),E = Inst->use_end();
-           UI != E; ++UI)
-        if (cast<Instruction>(*UI)->getParent() != BB ||
-            isa<PHINode>(*UI))
+           UI != E; ++UI) {
+        const Instruction *I = cast<Instruction>(*UI);
+        if (I->getParent() != BB || isa<PHINode>(I))
           return true;
+      }
       return false;
     }
 




From gohman at apple.com  Wed Apr 14 11:51:49 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 16:51:49 -0000
Subject: [llvm-commits] [llvm] r101254 - in /llvm/trunk:
 include/llvm/CodeGen/MachineRegisterInfo.h
 lib/CodeGen/MachineRegisterInfo.cpp
 lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Message-ID: <20100414165149.7D17D2A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 11:51:49 2010
New Revision: 101254

URL: http://llvm.org/viewvc/llvm-project?rev=101254&view=rev
Log:
Move the code for emitting livein copies out of SelectionDAGISel.

Modified:
    llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h
    llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Modified: llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h?rev=101254&r1=101253&r2=101254&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h Wed Apr 14 11:51:49 2010
@@ -261,6 +261,12 @@
   bool isLiveIn(unsigned Reg) const;
   bool isLiveOut(unsigned Reg) const;
 
+  /// EmitLiveInCopies - Emit copies to initialize livein virtual registers
+  /// into the given entry block.
+  void EmitLiveInCopies(MachineBasicBlock *EntryMBB,
+                        const TargetRegisterInfo &TRI,
+                        const TargetInstrInfo &TII);
+
 private:
   void HandleVRegListReallocation();
   

Modified: llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp?rev=101254&r1=101253&r2=101254&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp Wed Apr 14 11:51:49 2010
@@ -12,6 +12,8 @@
 //===----------------------------------------------------------------------===//
 
 #include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/Support/CommandLine.h"
+#include "llvm/Target/TargetInstrInfo.h"
 using namespace llvm;
 
 MachineRegisterInfo::MachineRegisterInfo(const TargetRegisterInfo &TRI) {
@@ -144,6 +146,110 @@
   return false;
 }
 
+static cl::opt<bool>
+SchedLiveInCopies("schedule-livein-copies", cl::Hidden,
+                  cl::desc("Schedule copies of livein registers"),
+                  cl::init(false));
+
+/// EmitLiveInCopy - Emit a copy for a live in physical register. If the
+/// physical register has only a single copy use, then coalesced the copy
+/// if possible.
+static void EmitLiveInCopy(MachineBasicBlock *MBB,
+                           MachineBasicBlock::iterator &InsertPos,
+                           unsigned VirtReg, unsigned PhysReg,
+                           const TargetRegisterClass *RC,
+                           DenseMap<MachineInstr*, unsigned> &CopyRegMap,
+                           const MachineRegisterInfo &MRI,
+                           const TargetRegisterInfo &TRI,
+                           const TargetInstrInfo &TII) {
+  unsigned NumUses = 0;
+  MachineInstr *UseMI = NULL;
+  for (MachineRegisterInfo::use_iterator UI = MRI.use_begin(VirtReg),
+         UE = MRI.use_end(); UI != UE; ++UI) {
+    UseMI = &*UI;
+    if (++NumUses > 1)
+      break;
+  }
+
+  // If the number of uses is not one, or the use is not a move instruction,
+  // don't coalesce. Also, only coalesce away a virtual register to virtual
+  // register copy.
+  bool Coalesced = false;
+  unsigned SrcReg, DstReg, SrcSubReg, DstSubReg;
+  if (NumUses == 1 &&
+      TII.isMoveInstr(*UseMI, SrcReg, DstReg, SrcSubReg, DstSubReg) &&
+      TargetRegisterInfo::isVirtualRegister(DstReg)) {
+    VirtReg = DstReg;
+    Coalesced = true;
+  }
+
+  // Now find an ideal location to insert the copy.
+  MachineBasicBlock::iterator Pos = InsertPos;
+  while (Pos != MBB->begin()) {
+    MachineInstr *PrevMI = prior(Pos);
+    DenseMap<MachineInstr*, unsigned>::iterator RI = CopyRegMap.find(PrevMI);
+    // copyRegToReg might emit multiple instructions to do a copy.
+    unsigned CopyDstReg = (RI == CopyRegMap.end()) ? 0 : RI->second;
+    if (CopyDstReg && !TRI.regsOverlap(CopyDstReg, PhysReg))
+      // This is what the BB looks like right now:
+      // r1024 = mov r0
+      // ...
+      // r1    = mov r1024
+      //
+      // We want to insert "r1025 = mov r1". Inserting this copy below the
+      // move to r1024 makes it impossible for that move to be coalesced.
+      //
+      // r1025 = mov r1
+      // r1024 = mov r0
+      // ...
+      // r1    = mov 1024
+      // r2    = mov 1025
+      break; // Woot! Found a good location.
+    --Pos;
+  }
+
+  bool Emitted = TII.copyRegToReg(*MBB, Pos, VirtReg, PhysReg, RC, RC);
+  assert(Emitted && "Unable to issue a live-in copy instruction!\n");
+  (void) Emitted;
+
+  CopyRegMap.insert(std::make_pair(prior(Pos), VirtReg));
+  if (Coalesced) {
+    if (&*InsertPos == UseMI) ++InsertPos;
+    MBB->erase(UseMI);
+  }
+}
+
+/// EmitLiveInCopies - Emit copies to initialize livein virtual registers
+/// into the given entry block.
+void
+MachineRegisterInfo::EmitLiveInCopies(MachineBasicBlock *EntryMBB,
+                                      const TargetRegisterInfo &TRI,
+                                      const TargetInstrInfo &TII) {
+  if (SchedLiveInCopies) {
+    // Emit the copies at a heuristically-determined location in the block.
+    DenseMap<MachineInstr*, unsigned> CopyRegMap;
+    MachineBasicBlock::iterator InsertPos = EntryMBB->begin();
+    for (MachineRegisterInfo::livein_iterator LI = livein_begin(),
+           E = livein_end(); LI != E; ++LI)
+      if (LI->second) {
+        const TargetRegisterClass *RC = getRegClass(LI->second);
+        EmitLiveInCopy(EntryMBB, InsertPos, LI->second, LI->first,
+                       RC, CopyRegMap, *this, TRI, TII);
+      }
+  } else {
+    // Emit the copies into the top of the block.
+    for (MachineRegisterInfo::livein_iterator LI = livein_begin(),
+           E = livein_end(); LI != E; ++LI)
+      if (LI->second) {
+        const TargetRegisterClass *RC = getRegClass(LI->second);
+        bool Emitted = TII.copyRegToReg(*EntryMBB, EntryMBB->begin(),
+                                        LI->second, LI->first, RC, RC);
+        assert(Emitted && "Unable to issue a live-in copy instruction!\n");
+        (void) Emitted;
+      }
+  }
+}
+
 #ifndef NDEBUG
 void MachineRegisterInfo::dumpUses(unsigned Reg) const {
   for (use_iterator I = use_begin(Reg), E = use_end(); I != E; ++I)

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=101254&r1=101253&r2=101254&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Wed Apr 14 11:51:49 2010
@@ -69,10 +69,6 @@
 static cl::opt<bool>
 EnableFastISelAbort("fast-isel-abort", cl::Hidden,
           cl::desc("Enable abort calls when \"fast\" instruction fails"));
-static cl::opt<bool>
-SchedLiveInCopies("schedule-livein-copies", cl::Hidden,
-                  cl::desc("Schedule copies of livein registers"),
-                  cl::init(false));
 
 #ifndef NDEBUG
 static cl::opt<bool>
@@ -173,106 +169,6 @@
   return 0;
 }
 
-/// EmitLiveInCopy - Emit a copy for a live in physical register. If the
-/// physical register has only a single copy use, then coalesced the copy
-/// if possible.
-static void EmitLiveInCopy(MachineBasicBlock *MBB,
-                           MachineBasicBlock::iterator &InsertPos,
-                           unsigned VirtReg, unsigned PhysReg,
-                           const TargetRegisterClass *RC,
-                           DenseMap<MachineInstr*, unsigned> &CopyRegMap,
-                           const MachineRegisterInfo &MRI,
-                           const TargetRegisterInfo &TRI,
-                           const TargetInstrInfo &TII) {
-  unsigned NumUses = 0;
-  MachineInstr *UseMI = NULL;
-  for (MachineRegisterInfo::use_iterator UI = MRI.use_begin(VirtReg),
-         UE = MRI.use_end(); UI != UE; ++UI) {
-    UseMI = &*UI;
-    if (++NumUses > 1)
-      break;
-  }
-
-  // If the number of uses is not one, or the use is not a move instruction,
-  // don't coalesce. Also, only coalesce away a virtual register to virtual
-  // register copy.
-  bool Coalesced = false;
-  unsigned SrcReg, DstReg, SrcSubReg, DstSubReg;
-  if (NumUses == 1 &&
-      TII.isMoveInstr(*UseMI, SrcReg, DstReg, SrcSubReg, DstSubReg) &&
-      TargetRegisterInfo::isVirtualRegister(DstReg)) {
-    VirtReg = DstReg;
-    Coalesced = true;
-  }
-
-  // Now find an ideal location to insert the copy.
-  MachineBasicBlock::iterator Pos = InsertPos;
-  while (Pos != MBB->begin()) {
-    MachineInstr *PrevMI = prior(Pos);
-    DenseMap<MachineInstr*, unsigned>::iterator RI = CopyRegMap.find(PrevMI);
-    // copyRegToReg might emit multiple instructions to do a copy.
-    unsigned CopyDstReg = (RI == CopyRegMap.end()) ? 0 : RI->second;
-    if (CopyDstReg && !TRI.regsOverlap(CopyDstReg, PhysReg))
-      // This is what the BB looks like right now:
-      // r1024 = mov r0
-      // ...
-      // r1    = mov r1024
-      //
-      // We want to insert "r1025 = mov r1". Inserting this copy below the
-      // move to r1024 makes it impossible for that move to be coalesced.
-      //
-      // r1025 = mov r1
-      // r1024 = mov r0
-      // ...
-      // r1    = mov 1024
-      // r2    = mov 1025
-      break; // Woot! Found a good location.
-    --Pos;
-  }
-
-  bool Emitted = TII.copyRegToReg(*MBB, Pos, VirtReg, PhysReg, RC, RC);
-  assert(Emitted && "Unable to issue a live-in copy instruction!\n");
-  (void) Emitted;
-
-  CopyRegMap.insert(std::make_pair(prior(Pos), VirtReg));
-  if (Coalesced) {
-    if (&*InsertPos == UseMI) ++InsertPos;
-    MBB->erase(UseMI);
-  }
-}
-
-/// EmitLiveInCopies - If this is the first basic block in the function,
-/// and if it has live ins that need to be copied into vregs, emit the
-/// copies into the block.
-static void EmitLiveInCopies(MachineBasicBlock *EntryMBB,
-                             const MachineRegisterInfo &MRI,
-                             const TargetRegisterInfo &TRI,
-                             const TargetInstrInfo &TII) {
-  if (SchedLiveInCopies) {
-    // Emit the copies at a heuristically-determined location in the block.
-    DenseMap<MachineInstr*, unsigned> CopyRegMap;
-    MachineBasicBlock::iterator InsertPos = EntryMBB->begin();
-    for (MachineRegisterInfo::livein_iterator LI = MRI.livein_begin(),
-           E = MRI.livein_end(); LI != E; ++LI)
-      if (LI->second) {
-        const TargetRegisterClass *RC = MRI.getRegClass(LI->second);
-        EmitLiveInCopy(EntryMBB, InsertPos, LI->second, LI->first,
-                       RC, CopyRegMap, MRI, TRI, TII);
-      }
-  } else {
-    // Emit the copies into the top of the block.
-    for (MachineRegisterInfo::livein_iterator LI = MRI.livein_begin(),
-           E = MRI.livein_end(); LI != E; ++LI)
-      if (LI->second) {
-        const TargetRegisterClass *RC = MRI.getRegClass(LI->second);
-        bool Emitted = TII.copyRegToReg(*EntryMBB, EntryMBB->begin(),
-                                        LI->second, LI->first, RC, RC);
-        assert(Emitted && "Unable to issue a live-in copy instruction!\n");
-        (void) Emitted;
-      }
-  }
-}
-
 //===----------------------------------------------------------------------===//
 // SelectionDAGISel code
 //===----------------------------------------------------------------------===//
@@ -337,7 +233,7 @@
   // If the first basic block in the function has live ins that need to be
   // copied into vregs, emit the copies into the top of the block before
   // emitting the code for the block.
-  EmitLiveInCopies(MF->begin(), *RegInfo, TRI, TII);
+  RegInfo->EmitLiveInCopies(MF->begin(), TRI, TII);
 
   // Add function live-ins to entry block live-in set.
   for (MachineRegisterInfo::livein_iterator I = RegInfo->livein_begin(),




From gohman at apple.com  Wed Apr 14 11:54:39 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 16:54:39 -0000
Subject: [llvm-commits] [llvm] r101255 - in /llvm/trunk:
 include/llvm/CodeGen/SelectionDAGISel.h
 lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Message-ID: <20100414165439.8052B2A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 11:54:39 2010
New Revision: 101255

URL: http://llvm.org/viewvc/llvm-project?rev=101255&view=rev
Log:
Trim #includes.

Modified:
    llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h?rev=101255&r1=101254&r2=101255&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h Wed Apr 14 11:54:39 2010
@@ -17,7 +17,6 @@
 
 #include "llvm/BasicBlock.h"
 #include "llvm/Pass.h"
-#include "llvm/Constant.h"
 #include "llvm/CodeGen/SelectionDAG.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=101255&r1=101254&r2=101255&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Wed Apr 14 11:54:39 2010
@@ -19,10 +19,7 @@
 #include "llvm/Analysis/AliasAnalysis.h"
 #include "llvm/Analysis/DebugInfo.h"
 #include "llvm/Constants.h"
-#include "llvm/CallingConv.h"
-#include "llvm/DerivedTypes.h"
 #include "llvm/Function.h"
-#include "llvm/GlobalVariable.h"
 #include "llvm/InlineAsm.h"
 #include "llvm/Instructions.h"
 #include "llvm/Intrinsics.h"
@@ -32,18 +29,13 @@
 #include "llvm/CodeGen/GCStrategy.h"
 #include "llvm/CodeGen/GCMetadata.h"
 #include "llvm/CodeGen/MachineFunction.h"
-#include "llvm/CodeGen/MachineFunctionAnalysis.h"
-#include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
-#include "llvm/CodeGen/MachineJumpTableInfo.h"
 #include "llvm/CodeGen/MachineModuleInfo.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/ScheduleHazardRecognizer.h"
 #include "llvm/CodeGen/SchedulerRegistry.h"
 #include "llvm/CodeGen/SelectionDAG.h"
 #include "llvm/Target/TargetRegisterInfo.h"
-#include "llvm/Target/TargetData.h"
-#include "llvm/Target/TargetFrameInfo.h"
 #include "llvm/Target/TargetIntrinsicInfo.h"
 #include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/TargetLowering.h"
@@ -52,7 +44,6 @@
 #include "llvm/Support/Compiler.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/ErrorHandling.h"
-#include "llvm/Support/MathExtras.h"
 #include "llvm/Support/Timer.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/ADT/Statistic.h"




From gohman at apple.com  Wed Apr 14 12:02:07 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 17:02:07 -0000
Subject: [llvm-commits] [llvm] r101256 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Message-ID: <20100414170208.0481B2A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 12:02:07 2010
New Revision: 101256

URL: http://llvm.org/viewvc/llvm-project?rev=101256&view=rev
Log:
Reorgnaize this code to be more tidy and readable.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=101256&r1=101255&r2=101256&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Wed Apr 14 12:02:07 2010
@@ -193,26 +193,21 @@
 }
 
 bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
-  Function &Fn = *mf.getFunction();
-
   // Do some sanity-checking on the command-line options.
   assert((!EnableFastISelVerbose || EnableFastISel) &&
          "-fast-isel-verbose requires -fast-isel");
   assert((!EnableFastISelAbort || EnableFastISel) &&
          "-fast-isel-abort requires -fast-isel");
 
-  // Get alias analysis for load/store combining.
-  AA = &getAnalysis<AliasAnalysis>();
-
-  MF = &mf;
+  Function &Fn = *mf.getFunction();
   const TargetInstrInfo &TII = *TM.getInstrInfo();
   const TargetRegisterInfo &TRI = *TM.getRegisterInfo();
 
-  if (Fn.hasGC())
-    GFI = &getAnalysis<GCModuleInfo>().getFunctionInfo(Fn);
-  else
-    GFI = 0;
+  MF = &mf;
   RegInfo = &MF->getRegInfo();
+  AA = &getAnalysis<AliasAnalysis>();
+  GFI = Fn.hasGC() ? &getAnalysis<GCModuleInfo>().getFunctionInfo(Fn) : 0;
+
   DEBUG(dbgs() << "\n\n\n=== " << Fn.getName() << "\n");
 
   CurDAG->init(*MF);




From gohman at apple.com  Wed Apr 14 12:05:00 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 17:05:00 -0000
Subject: [llvm-commits] [llvm] r101258 - in /llvm/trunk/lib/CodeGen:
 MachineRegisterInfo.cpp SelectionDAG/SelectionDAGISel.cpp
Message-ID: <20100414170501.0FDDD2A6C12D@llvm.org>

Author: djg
Date: Wed Apr 14 12:05:00 2010
New Revision: 101258

URL: http://llvm.org/viewvc/llvm-project?rev=101258&view=rev
Log:
Move the code for initialing the entry block livein set out of
SelectionDAGISel.

Modified:
    llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Modified: llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp?rev=101258&r1=101257&r2=101258&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp Wed Apr 14 12:05:00 2010
@@ -248,6 +248,11 @@
         (void) Emitted;
       }
   }
+
+  // Add function live-ins to entry block live-in set.
+  for (MachineRegisterInfo::livein_iterator I = livein_begin(),
+       E = livein_end(); I != E; ++I)
+    EntryMBB->addLiveIn(I->first);
 }
 
 #ifndef NDEBUG

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=101258&r1=101257&r2=101258&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Wed Apr 14 12:05:00 2010
@@ -221,11 +221,6 @@
   // emitting the code for the block.
   RegInfo->EmitLiveInCopies(MF->begin(), TRI, TII);
 
-  // Add function live-ins to entry block live-in set.
-  for (MachineRegisterInfo::livein_iterator I = RegInfo->livein_begin(),
-         E = RegInfo->livein_end(); I != E; ++I)
-    MF->begin()->addLiveIn(I->first);
-
 #ifndef NDEBUG
   assert(FuncInfo->CatchInfoFound.size() == FuncInfo->CatchInfoLost.size() &&
          "Not all catch info was assigned to a landing pad!");




From gohman at apple.com  Wed Apr 14 12:09:37 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 17:09:37 -0000
Subject: [llvm-commits] [llvm] r101260 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Message-ID: <20100414170938.020F52A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 12:09:37 2010
New Revision: 101260

URL: http://llvm.org/viewvc/llvm-project?rev=101260&view=rev
Log:
Add a comment.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=101260&r1=101259&r2=101260&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Wed Apr 14 12:09:37 2010
@@ -226,6 +226,8 @@
          "Not all catch info was assigned to a landing pad!");
 #endif
 
+  // Release function-specific state. SDB and CurDAG are already cleared
+  // at this point.
   FuncInfo->clear();
 
   return true;




From gohman at apple.com  Wed Apr 14 12:11:23 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 17:11:23 -0000
Subject: [llvm-commits] [llvm] r101261 - in
 /llvm/trunk/lib/CodeGen/SelectionDAG: FunctionLoweringInfo.cpp
 SelectionDAGISel.cpp
Message-ID: <20100414171123.3160E2A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 12:11:23 2010
New Revision: 101261

URL: http://llvm.org/viewvc/llvm-project?rev=101261&view=rev
Log:
Move this assert out of SelectionDAGISel into FunctionLoweringInfo, and
drop the redundant #ifndef NDEBUG.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp?rev=101261&r1=101260&r2=101261&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp Wed Apr 14 12:11:23 2010
@@ -243,6 +243,9 @@
 /// FunctionLoweringInfo to an empty state, ready to be used for a
 /// different function.
 void FunctionLoweringInfo::clear() {
+  assert(CatchInfoFound.size() == CatchInfoLost.size() &&
+         "Not all catch info was assigned to a landing pad!");
+
   MBBMap.clear();
   ValueMap.clear();
   StaticAllocaMap.clear();

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=101261&r1=101260&r2=101261&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Wed Apr 14 12:11:23 2010
@@ -221,11 +221,6 @@
   // emitting the code for the block.
   RegInfo->EmitLiveInCopies(MF->begin(), TRI, TII);
 
-#ifndef NDEBUG
-  assert(FuncInfo->CatchInfoFound.size() == FuncInfo->CatchInfoLost.size() &&
-         "Not all catch info was assigned to a landing pad!");
-#endif
-
   // Release function-specific state. SDB and CurDAG are already cleared
   // at this point.
   FuncInfo->clear();




From gohman at apple.com  Wed Apr 14 12:13:16 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 17:13:16 -0000
Subject: [llvm-commits] [llvm] r101262 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Message-ID: <20100414171316.BB08C2A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 12:13:16 2010
New Revision: 101262

URL: http://llvm.org/viewvc/llvm-project?rev=101262&view=rev
Log:
Clear the FunctionLoweringInfo object before doing other things that
don't need it.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=101262&r1=101261&r2=101262&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Wed Apr 14 12:13:16 2010
@@ -216,15 +216,15 @@
 
   SelectAllBasicBlocks(Fn, *MF, TII);
 
+  // Release function-specific state. SDB and CurDAG are already cleared
+  // at this point.
+  FuncInfo->clear();
+
   // If the first basic block in the function has live ins that need to be
   // copied into vregs, emit the copies into the top of the block before
   // emitting the code for the block.
   RegInfo->EmitLiveInCopies(MF->begin(), TRI, TII);
 
-  // Release function-specific state. SDB and CurDAG are already cleared
-  // at this point.
-  FuncInfo->clear();
-
   return true;
 }
 




From gohman at apple.com  Wed Apr 14 12:22:02 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 17:22:02 -0000
Subject: [llvm-commits] [llvm] r101263 - in /llvm/trunk:
 include/llvm/CodeGen/SelectionDAGISel.h
 lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Message-ID: <20100414172202.6E1712A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 12:22:02 2010
New Revision: 101263

URL: http://llvm.org/viewvc/llvm-project?rev=101263&view=rev
Log:
Delete an unused function.

Modified:
    llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h?rev=101263&r1=101262&r2=101263&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h Wed Apr 14 12:22:02 2010
@@ -62,8 +62,6 @@
 
   virtual bool runOnMachineFunction(MachineFunction &MF);
 
-  unsigned MakeReg(EVT VT);
-
   virtual void EmitFunctionEntryCode(Function &Fn, MachineFunction &MF) {}
   
   /// PreprocessISelDAG - This hook allows targets to hack on the graph before

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=101263&r1=101262&r2=101263&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Wed Apr 14 12:22:02 2010
@@ -180,10 +180,6 @@
   delete FuncInfo;
 }
 
-unsigned SelectionDAGISel::MakeReg(EVT VT) {
-  return RegInfo->createVirtualRegister(TLI.getRegClassFor(VT));
-}
-
 void SelectionDAGISel::getAnalysisUsage(AnalysisUsage &AU) const {
   AU.addRequired<AliasAnalysis>();
   AU.addPreserved<AliasAnalysis>();




From gohman at apple.com  Wed Apr 14 12:40:25 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 17:40:25 -0000
Subject: [llvm-commits] [llvm] r101264 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
Message-ID: <20100414174025.B787B2A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 12:40:25 2010
New Revision: 101264

URL: http://llvm.org/viewvc/llvm-project?rev=101264&view=rev
Log:
Delete an obsolete comment.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h?rev=101264&r1=101263&r2=101264&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h Wed Apr 14 12:40:25 2010
@@ -80,7 +80,6 @@
 //===----------------------------------------------------------------------===//
 /// SelectionDAGBuilder - This is the common target-independent lowering
 /// implementation that is parameterized by a TargetLowering object.
-/// Also, targets can overload any lowering method.
 ///
 class SelectionDAGBuilder {
   MachineBasicBlock *CurMBB;




From ggreif at gmail.com  Wed Apr 14 13:13:29 2010
From: ggreif at gmail.com (Gabor Greif)
Date: Wed, 14 Apr 2010 18:13:29 -0000
Subject: [llvm-commits] [llvm] r101265 -
	/llvm/trunk/lib/Analysis/InlineCost.cpp
Message-ID: <20100414181329.DC9CE2A6C12C@llvm.org>

Author: ggreif
Date: Wed Apr 14 13:13:29 2010
New Revision: 101265

URL: http://llvm.org/viewvc/llvm-project?rev=101265&view=rev
Log:
performance: cache the dereferenced use_iterator

Modified:
    llvm/trunk/lib/Analysis/InlineCost.cpp

Modified: llvm/trunk/lib/Analysis/InlineCost.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/InlineCost.cpp?rev=101265&r1=101264&r2=101265&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/InlineCost.cpp (original)
+++ llvm/trunk/lib/Analysis/InlineCost.cpp Wed Apr 14 13:13:29 2010
@@ -24,28 +24,29 @@
 unsigned InlineCostAnalyzer::FunctionInfo::
 CountCodeReductionForConstant(Value *V) {
   unsigned Reduction = 0;
-  for (Value::use_iterator UI = V->use_begin(), E = V->use_end(); UI != E; ++UI)
-    if (isa<BranchInst>(*UI) || isa<SwitchInst>(*UI)) {
+  for (Value::use_iterator UI = V->use_begin(), E = V->use_end(); UI != E;++UI){
+    User *U = *UI;
+    if (isa<BranchInst>(U) || isa<SwitchInst>(U)) {
       // We will be able to eliminate all but one of the successors.
-      const TerminatorInst &TI = cast<TerminatorInst>(**UI);
+      const TerminatorInst &TI = cast<TerminatorInst>(*U);
       const unsigned NumSucc = TI.getNumSuccessors();
       unsigned Instrs = 0;
       for (unsigned I = 0; I != NumSucc; ++I)
         Instrs += Metrics.NumBBInsts[TI.getSuccessor(I)];
       // We don't know which blocks will be eliminated, so use the average size.
       Reduction += InlineConstants::InstrCost*Instrs*(NumSucc-1)/NumSucc;
-    } else if (CallInst *CI = dyn_cast<CallInst>(*UI)) {
+    } else if (CallInst *CI = dyn_cast<CallInst>(U)) {
       // Turning an indirect call into a direct call is a BIG win
       if (CI->getCalledValue() == V)
         Reduction += InlineConstants::IndirectCallBonus;
-    } else if (InvokeInst *II = dyn_cast<InvokeInst>(*UI)) {
+    } else if (InvokeInst *II = dyn_cast<InvokeInst>(U)) {
       // Turning an indirect call into a direct call is a BIG win
       if (II->getCalledValue() == V)
         Reduction += InlineConstants::IndirectCallBonus;
     } else {
       // Figure out if this instruction will be removed due to simple constant
       // propagation.
-      Instruction &Inst = cast<Instruction>(**UI);
+      Instruction &Inst = cast<Instruction>(*U);
 
       // We can't constant propagate instructions which have effects or
       // read memory.
@@ -74,7 +75,7 @@
         Reduction += CountCodeReductionForConstant(&Inst);
       }
     }
-
+  }
   return Reduction;
 }
 




From gohman at apple.com  Wed Apr 14 13:24:06 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 18:24:06 -0000
Subject: [llvm-commits] [llvm] r101266 - in
 /llvm/trunk/lib/CodeGen/SelectionDAG: SelectionDAGBuilder.cpp
 SelectionDAGBuilder.h
Message-ID: <20100414182406.E390E2A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 13:24:06 2010
New Revision: 101266

URL: http://llvm.org/viewvc/llvm-project?rev=101266&view=rev
Log:
Fix typos in comments.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=101266&r1=101265&r2=101266&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Wed Apr 14 13:24:06 2010
@@ -534,7 +534,7 @@
   TD = DAG.getTarget().getTargetData();
 }
 
-/// clear - Clear out the curret SelectionDAG and the associated
+/// clear - Clear out the current SelectionDAG and the associated
 /// state and prepare this SelectionDAGBuilder object to be used
 /// for a new block. This doesn't clear out information about
 /// additional blocks that are needed to complete switch lowering

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h?rev=101266&r1=101265&r2=101266&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h Wed Apr 14 13:24:06 2010
@@ -310,7 +310,7 @@
 
   void init(GCFunctionInfo *gfi, AliasAnalysis &aa);
 
-  /// clear - Clear out the curret SelectionDAG and the associated
+  /// clear - Clear out the current SelectionDAG and the associated
   /// state and prepare this SelectionDAGBuilder object to be used
   /// for a new block. This doesn't clear out information about
   /// additional blocks that are needed to complete switch lowering




From gohman at apple.com  Wed Apr 14 13:31:02 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 18:31:02 -0000
Subject: [llvm-commits] [llvm] r101267 - in
 /llvm/trunk/lib/CodeGen/SelectionDAG: FunctionLoweringInfo.cpp
 FunctionLoweringInfo.h SelectionDAGBuilder.cpp
Message-ID: <20100414183102.E38A52A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 13:31:02 2010
New Revision: 101267

URL: http://llvm.org/viewvc/llvm-project?rev=101267&view=rev
Log:
Pull utility routines with no SelectionDAG dependence out of
SelectionDAGBuilder. FunctionLoweringInfo isn't an ideal place for
them to live, but it's better than SelectionDAGBuilder for now.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.h
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp?rev=101267&r1=101266&r2=101267&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp Wed Apr 14 13:31:02 2010
@@ -369,3 +369,79 @@
 #endif
     }
 }
+
+/// hasInlineAsmMemConstraint - Return true if the inline asm instruction being
+/// processed uses a memory 'm' constraint.
+bool
+llvm::hasInlineAsmMemConstraint(std::vector<InlineAsm::ConstraintInfo> &CInfos,
+                                const TargetLowering &TLI) {
+  for (unsigned i = 0, e = CInfos.size(); i != e; ++i) {
+    InlineAsm::ConstraintInfo &CI = CInfos[i];
+    for (unsigned j = 0, ee = CI.Codes.size(); j != ee; ++j) {
+      TargetLowering::ConstraintType CType = TLI.getConstraintType(CI.Codes[j]);
+      if (CType == TargetLowering::C_Memory)
+        return true;
+    }
+
+    // Indirect operand accesses access memory.
+    if (CI.isIndirect)
+      return true;
+  }
+
+  return false;
+}
+
+/// getFCmpCondCode - Return the ISD condition code corresponding to
+/// the given LLVM IR floating-point condition code.  This includes
+/// consideration of global floating-point math flags.
+///
+ISD::CondCode llvm::getFCmpCondCode(FCmpInst::Predicate Pred) {
+  ISD::CondCode FPC, FOC;
+  switch (Pred) {
+  case FCmpInst::FCMP_FALSE: FOC = FPC = ISD::SETFALSE; break;
+  case FCmpInst::FCMP_OEQ:   FOC = ISD::SETEQ; FPC = ISD::SETOEQ; break;
+  case FCmpInst::FCMP_OGT:   FOC = ISD::SETGT; FPC = ISD::SETOGT; break;
+  case FCmpInst::FCMP_OGE:   FOC = ISD::SETGE; FPC = ISD::SETOGE; break;
+  case FCmpInst::FCMP_OLT:   FOC = ISD::SETLT; FPC = ISD::SETOLT; break;
+  case FCmpInst::FCMP_OLE:   FOC = ISD::SETLE; FPC = ISD::SETOLE; break;
+  case FCmpInst::FCMP_ONE:   FOC = ISD::SETNE; FPC = ISD::SETONE; break;
+  case FCmpInst::FCMP_ORD:   FOC = FPC = ISD::SETO;   break;
+  case FCmpInst::FCMP_UNO:   FOC = FPC = ISD::SETUO;  break;
+  case FCmpInst::FCMP_UEQ:   FOC = ISD::SETEQ; FPC = ISD::SETUEQ; break;
+  case FCmpInst::FCMP_UGT:   FOC = ISD::SETGT; FPC = ISD::SETUGT; break;
+  case FCmpInst::FCMP_UGE:   FOC = ISD::SETGE; FPC = ISD::SETUGE; break;
+  case FCmpInst::FCMP_ULT:   FOC = ISD::SETLT; FPC = ISD::SETULT; break;
+  case FCmpInst::FCMP_ULE:   FOC = ISD::SETLE; FPC = ISD::SETULE; break;
+  case FCmpInst::FCMP_UNE:   FOC = ISD::SETNE; FPC = ISD::SETUNE; break;
+  case FCmpInst::FCMP_TRUE:  FOC = FPC = ISD::SETTRUE; break;
+  default:
+    llvm_unreachable("Invalid FCmp predicate opcode!");
+    FOC = FPC = ISD::SETFALSE;
+    break;
+  }
+  if (FiniteOnlyFPMath())
+    return FOC;
+  else
+    return FPC;
+}
+
+/// getICmpCondCode - Return the ISD condition code corresponding to
+/// the given LLVM IR integer condition code.
+///
+ISD::CondCode llvm::getICmpCondCode(ICmpInst::Predicate Pred) {
+  switch (Pred) {
+  case ICmpInst::ICMP_EQ:  return ISD::SETEQ;
+  case ICmpInst::ICMP_NE:  return ISD::SETNE;
+  case ICmpInst::ICMP_SLE: return ISD::SETLE;
+  case ICmpInst::ICMP_ULE: return ISD::SETULE;
+  case ICmpInst::ICMP_SGE: return ISD::SETGE;
+  case ICmpInst::ICMP_UGE: return ISD::SETUGE;
+  case ICmpInst::ICMP_SLT: return ISD::SETLT;
+  case ICmpInst::ICMP_ULT: return ISD::SETULT;
+  case ICmpInst::ICMP_SGT: return ISD::SETGT;
+  case ICmpInst::ICMP_UGT: return ISD::SETUGT;
+  default:
+    llvm_unreachable("Invalid ICmp predicate opcode!");
+    return ISD::SETNE;
+  }
+}

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.h?rev=101267&r1=101266&r2=101267&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.h (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.h Wed Apr 14 13:31:02 2010
@@ -15,12 +15,15 @@
 #ifndef FUNCTIONLOWERINGINFO_H
 #define FUNCTIONLOWERINGINFO_H
 
+#include "llvm/InlineAsm.h"
+#include "llvm/Instructions.h"
 #include "llvm/ADT/APInt.h"
 #include "llvm/ADT/DenseMap.h"
 #ifndef NDEBUG
 #include "llvm/ADT/SmallSet.h"
 #endif
 #include "llvm/CodeGen/ValueTypes.h"
+#include "llvm/CodeGen/SelectionDAGNodes.h"
 #include <vector>
 
 namespace llvm {
@@ -146,6 +149,22 @@
 void CopyCatchInfo(BasicBlock *SrcBB, BasicBlock *DestBB,
                    MachineModuleInfo *MMI, FunctionLoweringInfo &FLI);
 
+/// hasInlineAsmMemConstraint - Return true if the inline asm instruction being
+/// processed uses a memory 'm' constraint.
+bool hasInlineAsmMemConstraint(std::vector<InlineAsm::ConstraintInfo> &CInfos,
+                               const TargetLowering &TLI);
+
+/// getFCmpCondCode - Return the ISD condition code corresponding to
+/// the given LLVM IR floating-point condition code.  This includes
+/// consideration of global floating-point math flags.
+///
+ISD::CondCode getFCmpCondCode(FCmpInst::Predicate Pred);
+
+/// getICmpCondCode - Return the ISD condition code corresponding to
+/// the given LLVM IR integer condition code.
+///
+ISD::CondCode getICmpCondCode(ICmpInst::Predicate Pred);
+
 } // end namespace llvm
 
 #endif

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=101267&r1=101266&r2=101267&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Wed Apr 14 13:31:02 2010
@@ -972,61 +972,6 @@
   return true;
 }
 
-/// getFCmpCondCode - Return the ISD condition code corresponding to
-/// the given LLVM IR floating-point condition code.  This includes
-/// consideration of global floating-point math flags.
-///
-static ISD::CondCode getFCmpCondCode(FCmpInst::Predicate Pred) {
-  ISD::CondCode FPC, FOC;
-  switch (Pred) {
-  case FCmpInst::FCMP_FALSE: FOC = FPC = ISD::SETFALSE; break;
-  case FCmpInst::FCMP_OEQ:   FOC = ISD::SETEQ; FPC = ISD::SETOEQ; break;
-  case FCmpInst::FCMP_OGT:   FOC = ISD::SETGT; FPC = ISD::SETOGT; break;
-  case FCmpInst::FCMP_OGE:   FOC = ISD::SETGE; FPC = ISD::SETOGE; break;
-  case FCmpInst::FCMP_OLT:   FOC = ISD::SETLT; FPC = ISD::SETOLT; break;
-  case FCmpInst::FCMP_OLE:   FOC = ISD::SETLE; FPC = ISD::SETOLE; break;
-  case FCmpInst::FCMP_ONE:   FOC = ISD::SETNE; FPC = ISD::SETONE; break;
-  case FCmpInst::FCMP_ORD:   FOC = FPC = ISD::SETO;   break;
-  case FCmpInst::FCMP_UNO:   FOC = FPC = ISD::SETUO;  break;
-  case FCmpInst::FCMP_UEQ:   FOC = ISD::SETEQ; FPC = ISD::SETUEQ; break;
-  case FCmpInst::FCMP_UGT:   FOC = ISD::SETGT; FPC = ISD::SETUGT; break;
-  case FCmpInst::FCMP_UGE:   FOC = ISD::SETGE; FPC = ISD::SETUGE; break;
-  case FCmpInst::FCMP_ULT:   FOC = ISD::SETLT; FPC = ISD::SETULT; break;
-  case FCmpInst::FCMP_ULE:   FOC = ISD::SETLE; FPC = ISD::SETULE; break;
-  case FCmpInst::FCMP_UNE:   FOC = ISD::SETNE; FPC = ISD::SETUNE; break;
-  case FCmpInst::FCMP_TRUE:  FOC = FPC = ISD::SETTRUE; break;
-  default:
-    llvm_unreachable("Invalid FCmp predicate opcode!");
-    FOC = FPC = ISD::SETFALSE;
-    break;
-  }
-  if (FiniteOnlyFPMath())
-    return FOC;
-  else
-    return FPC;
-}
-
-/// getICmpCondCode - Return the ISD condition code corresponding to
-/// the given LLVM IR integer condition code.
-///
-static ISD::CondCode getICmpCondCode(ICmpInst::Predicate Pred) {
-  switch (Pred) {
-  case ICmpInst::ICMP_EQ:  return ISD::SETEQ;
-  case ICmpInst::ICMP_NE:  return ISD::SETNE;
-  case ICmpInst::ICMP_SLE: return ISD::SETLE;
-  case ICmpInst::ICMP_ULE: return ISD::SETULE;
-  case ICmpInst::ICMP_SGE: return ISD::SETGE;
-  case ICmpInst::ICMP_UGE: return ISD::SETUGE;
-  case ICmpInst::ICMP_SLT: return ISD::SETLT;
-  case ICmpInst::ICMP_ULT: return ISD::SETULT;
-  case ICmpInst::ICMP_SGT: return ISD::SETGT;
-  case ICmpInst::ICMP_UGT: return ISD::SETUGT;
-  default:
-    llvm_unreachable("Invalid ICmp predicate opcode!");
-    return ISD::SETNE;
-  }
-}
-
 /// EmitBranchForMergedCondition - Helper method for FindMergedConditions.
 /// This function emits a branch and is used at the leaves of an OR or an
 /// AND operator tree.
@@ -5213,27 +5158,6 @@
   // Otherwise, we couldn't allocate enough registers for this.
 }
 
-/// hasInlineAsmMemConstraint - Return true if the inline asm instruction being
-/// processed uses a memory 'm' constraint.
-static bool
-hasInlineAsmMemConstraint(std::vector<InlineAsm::ConstraintInfo> &CInfos,
-                          const TargetLowering &TLI) {
-  for (unsigned i = 0, e = CInfos.size(); i != e; ++i) {
-    InlineAsm::ConstraintInfo &CI = CInfos[i];
-    for (unsigned j = 0, ee = CI.Codes.size(); j != ee; ++j) {
-      TargetLowering::ConstraintType CType = TLI.getConstraintType(CI.Codes[j]);
-      if (CType == TargetLowering::C_Memory)
-        return true;
-    }
-
-    // Indirect operand accesses access memory.
-    if (CI.isIndirect)
-      return true;
-  }
-
-  return false;
-}
-
 /// visitInlineAsm - Handle a call to an InlineAsm object.
 ///
 void SelectionDAGBuilder::visitInlineAsm(CallSite CS) {




From gohman at apple.com  Wed Apr 14 13:44:34 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 18:44:34 -0000
Subject: [llvm-commits] [llvm] r101268 - in
 /llvm/trunk/include/llvm/CodeGen: ISDOpcodes.h SelectionDAGNodes.h
Message-ID: <20100414184434.40C292A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 13:44:34 2010
New Revision: 101268

URL: http://llvm.org/viewvc/llvm-project?rev=101268&view=rev
Log:
Split ISD::NodeType and a few related items out of SelectionDAGNodes.h
into a separate header to allow clients to use them without pulling in
SelectionDAG-specific declarations.

Added:
    llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h
      - copied, changed from r101240, llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
Modified:
    llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h

Copied: llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h (from r101240, llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h?p2=llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h&p1=llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h&r1=101240&r2=101268&rev=101268&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h Wed Apr 14 13:44:34 2010
@@ -1,4 +1,4 @@
-//===-- llvm/CodeGen/SelectionDAGNodes.h - SelectionDAG Nodes ---*- C++ -*-===//
+//===-- llvm/CodeGen/ISDOpcodes.h - CodeGen opcodes -------------*- C++ -*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -7,55 +7,15 @@
 //
 //===----------------------------------------------------------------------===//
 //
-// This file declares the SDNode class and derived classes, which are used to
-// represent the nodes and operations present in a SelectionDAG.  These nodes
-// and operations are machine code level operations, with some similarities to
-// the GCC RTL representation.
-//
-// Clients should include the SelectionDAG.h file instead of this file directly.
+// This file declares codegen opcodes and related utilities.
 //
 //===----------------------------------------------------------------------===//
 
-#ifndef LLVM_CODEGEN_SELECTIONDAGNODES_H
-#define LLVM_CODEGEN_SELECTIONDAGNODES_H
-
-#include "llvm/Constants.h"
-#include "llvm/ADT/FoldingSet.h"
-#include "llvm/ADT/GraphTraits.h"
-#include "llvm/ADT/ilist_node.h"
-#include "llvm/ADT/SmallVector.h"
-#include "llvm/ADT/STLExtras.h"
-#include "llvm/CodeGen/ValueTypes.h"
-#include "llvm/CodeGen/MachineMemOperand.h"
-#include "llvm/Support/MathExtras.h"
-#include "llvm/System/DataTypes.h"
-#include "llvm/Support/DebugLoc.h"
-#include <cassert>
+#ifndef LLVM_CODEGEN_ISDOPCODES_H
+#define LLVM_CODEGEN_ISDOPCODES_H
 
 namespace llvm {
 
-class SelectionDAG;
-class GlobalValue;
-class MachineBasicBlock;
-class MachineConstantPoolValue;
-class SDNode;
-class Value;
-class MCSymbol;
-template <typename T> struct DenseMapInfo;
-template <typename T> struct simplify_type;
-template <typename T> struct ilist_traits;
-
-void checkForCycles(const SDNode *N);
-  
-/// SDVTList - This represents a list of ValueType's that has been intern'd by
-/// a SelectionDAG.  Instances of this simple value class are returned by
-/// SelectionDAG::getVTList(...).
-///
-struct SDVTList {
-  const EVT *VTs;
-  unsigned int NumVTs;
-};
-
 /// ISD namespace - This namespace contains an enum which represents all of the
 /// SelectionDAG node types and value types.
 ///
@@ -629,21 +589,6 @@
   /// be used with SelectionDAG::getMemIntrinsicNode.
   static const int FIRST_TARGET_MEMORY_OPCODE = BUILTIN_OP_END+100;
 
-  /// Node predicates
-
-  /// isBuildVectorAllOnes - Return true if the specified node is a
-  /// BUILD_VECTOR where all of the elements are ~0 or undef.
-  bool isBuildVectorAllOnes(const SDNode *N);
-
-  /// isBuildVectorAllZeros - Return true if the specified node is a
-  /// BUILD_VECTOR where all of the elements are 0 or undef.
-  bool isBuildVectorAllZeros(const SDNode *N);
-
-  /// isScalarToVector - Return true if the specified node is a
-  /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
-  /// element is not an undef.
-  bool isScalarToVector(const SDNode *N);
-
   //===--------------------------------------------------------------------===//
   /// MemIndexedMode enum - This enum defines the load / store indexed
   /// addressing modes.
@@ -809,1811 +754,8 @@
     CVT_UU,     // Unsigned from Unsigned
     CVT_INVALID // Marker - Invalid opcode
   };
-}  // end llvm::ISD namespace
-
-
-//===----------------------------------------------------------------------===//
-/// SDValue - Unlike LLVM values, Selection DAG nodes may return multiple
-/// values as the result of a computation.  Many nodes return multiple values,
-/// from loads (which define a token and a return value) to ADDC (which returns
-/// a result and a carry value), to calls (which may return an arbitrary number
-/// of values).
-///
-/// As such, each use of a SelectionDAG computation must indicate the node that
-/// computes it as well as which return value to use from that node.  This pair
-/// of information is represented with the SDValue value type.
-///
-class SDValue {
-  SDNode *Node;       // The node defining the value we are using.
-  unsigned ResNo;     // Which return value of the node we are using.
-public:
-  SDValue() : Node(0), ResNo(0) {}
-  SDValue(SDNode *node, unsigned resno) : Node(node), ResNo(resno) {}
-
-  /// get the index which selects a specific result in the SDNode
-  unsigned getResNo() const { return ResNo; }
-
-  /// get the SDNode which holds the desired result
-  SDNode *getNode() const { return Node; }
-
-  /// set the SDNode
-  void setNode(SDNode *N) { Node = N; }
-
-  inline SDNode *operator->() const { return Node; }
-  
-  bool operator==(const SDValue &O) const {
-    return Node == O.Node && ResNo == O.ResNo;
-  }
-  bool operator!=(const SDValue &O) const {
-    return !operator==(O);
-  }
-  bool operator<(const SDValue &O) const {
-    return Node < O.Node || (Node == O.Node && ResNo < O.ResNo);
-  }
-
-  SDValue getValue(unsigned R) const {
-    return SDValue(Node, R);
-  }
-
-  // isOperandOf - Return true if this node is an operand of N.
-  bool isOperandOf(SDNode *N) const;
-
-  /// getValueType - Return the ValueType of the referenced return value.
-  ///
-  inline EVT getValueType() const;
-
-  /// getValueSizeInBits - Returns the size of the value in bits.
-  ///
-  unsigned getValueSizeInBits() const {
-    return getValueType().getSizeInBits();
-  }
-
-  // Forwarding methods - These forward to the corresponding methods in SDNode.
-  inline unsigned getOpcode() const;
-  inline unsigned getNumOperands() const;
-  inline const SDValue &getOperand(unsigned i) const;
-  inline uint64_t getConstantOperandVal(unsigned i) const;
-  inline bool isTargetMemoryOpcode() const;
-  inline bool isTargetOpcode() const;
-  inline bool isMachineOpcode() const;
-  inline unsigned getMachineOpcode() const;
-  inline const DebugLoc getDebugLoc() const;
-
-
-  /// reachesChainWithoutSideEffects - Return true if this operand (which must
-  /// be a chain) reaches the specified operand without crossing any
-  /// side-effecting instructions.  In practice, this looks through token
-  /// factors and non-volatile loads.  In order to remain efficient, this only
-  /// looks a couple of nodes in, it does not do an exhaustive search.
-  bool reachesChainWithoutSideEffects(SDValue Dest,
-                                      unsigned Depth = 2) const;
-
-  /// use_empty - Return true if there are no nodes using value ResNo
-  /// of Node.
-  ///
-  inline bool use_empty() const;
-
-  /// hasOneUse - Return true if there is exactly one node using value
-  /// ResNo of Node.
-  ///
-  inline bool hasOneUse() const;
-};
-
-
-template<> struct DenseMapInfo<SDValue> {
-  static inline SDValue getEmptyKey() {
-    return SDValue((SDNode*)-1, -1U);
-  }
-  static inline SDValue getTombstoneKey() {
-    return SDValue((SDNode*)-1, 0);
-  }
-  static unsigned getHashValue(const SDValue &Val) {
-    return ((unsigned)((uintptr_t)Val.getNode() >> 4) ^
-            (unsigned)((uintptr_t)Val.getNode() >> 9)) + Val.getResNo();
-  }
-  static bool isEqual(const SDValue &LHS, const SDValue &RHS) {
-    return LHS == RHS;
-  }
-};
-template <> struct isPodLike<SDValue> { static const bool value = true; };
-
-
-/// simplify_type specializations - Allow casting operators to work directly on
-/// SDValues as if they were SDNode*'s.
-template<> struct simplify_type<SDValue> {
-  typedef SDNode* SimpleType;
-  static SimpleType getSimplifiedValue(const SDValue &Val) {
-    return static_cast<SimpleType>(Val.getNode());
-  }
-};
-template<> struct simplify_type<const SDValue> {
-  typedef SDNode* SimpleType;
-  static SimpleType getSimplifiedValue(const SDValue &Val) {
-    return static_cast<SimpleType>(Val.getNode());
-  }
-};
-
-/// SDUse - Represents a use of a SDNode. This class holds an SDValue,
-/// which records the SDNode being used and the result number, a
-/// pointer to the SDNode using the value, and Next and Prev pointers,
-/// which link together all the uses of an SDNode.
-///
-class SDUse {
-  /// Val - The value being used.
-  SDValue Val;
-  /// User - The user of this value.
-  SDNode *User;
-  /// Prev, Next - Pointers to the uses list of the SDNode referred by
-  /// this operand.
-  SDUse **Prev, *Next;
-
-  SDUse(const SDUse &U);          // Do not implement
-  void operator=(const SDUse &U); // Do not implement
-
-public:
-  SDUse() : Val(), User(NULL), Prev(NULL), Next(NULL) {}
-
-  /// Normally SDUse will just implicitly convert to an SDValue that it holds.
-  operator const SDValue&() const { return Val; }
-
-  /// If implicit conversion to SDValue doesn't work, the get() method returns
-  /// the SDValue.
-  const SDValue &get() const { return Val; }
-
-  /// getUser - This returns the SDNode that contains this Use.
-  SDNode *getUser() { return User; }
-
-  /// getNext - Get the next SDUse in the use list.
-  SDUse *getNext() const { return Next; }
-
-  /// getNode - Convenience function for get().getNode().
-  SDNode *getNode() const { return Val.getNode(); }
-  /// getResNo - Convenience function for get().getResNo().
-  unsigned getResNo() const { return Val.getResNo(); }
-  /// getValueType - Convenience function for get().getValueType().
-  EVT getValueType() const { return Val.getValueType(); }
-
-  /// operator== - Convenience function for get().operator==
-  bool operator==(const SDValue &V) const {
-    return Val == V;
-  }
-
-  /// operator!= - Convenience function for get().operator!=
-  bool operator!=(const SDValue &V) const {
-    return Val != V;
-  }
-
-  /// operator< - Convenience function for get().operator<
-  bool operator<(const SDValue &V) const {
-    return Val < V;
-  }
-
-private:
-  friend class SelectionDAG;
-  friend class SDNode;
-
-  void setUser(SDNode *p) { User = p; }
-
-  /// set - Remove this use from its existing use list, assign it the
-  /// given value, and add it to the new value's node's use list.
-  inline void set(const SDValue &V);
-  /// setInitial - like set, but only supports initializing a newly-allocated
-  /// SDUse with a non-null value.
-  inline void setInitial(const SDValue &V);
-  /// setNode - like set, but only sets the Node portion of the value,
-  /// leaving the ResNo portion unmodified.
-  inline void setNode(SDNode *N);
-
-  void addToList(SDUse **List) {
-    Next = *List;
-    if (Next) Next->Prev = &Next;
-    Prev = List;
-    *List = this;
-  }
-
-  void removeFromList() {
-    *Prev = Next;
-    if (Next) Next->Prev = Prev;
-  }
-};
-
-/// simplify_type specializations - Allow casting operators to work directly on
-/// SDValues as if they were SDNode*'s.
-template<> struct simplify_type<SDUse> {
-  typedef SDNode* SimpleType;
-  static SimpleType getSimplifiedValue(const SDUse &Val) {
-    return static_cast<SimpleType>(Val.getNode());
-  }
-};
-template<> struct simplify_type<const SDUse> {
-  typedef SDNode* SimpleType;
-  static SimpleType getSimplifiedValue(const SDUse &Val) {
-    return static_cast<SimpleType>(Val.getNode());
-  }
-};
-
-
-/// SDNode - Represents one node in the SelectionDAG.
-///
-class SDNode : public FoldingSetNode, public ilist_node<SDNode> {
-private:
-  /// NodeType - The operation that this node performs.
-  ///
-  int16_t NodeType;
-
-  /// OperandsNeedDelete - This is true if OperandList was new[]'d.  If true,
-  /// then they will be delete[]'d when the node is destroyed.
-  uint16_t OperandsNeedDelete : 1;
-
-  /// HasDebugValue - This tracks whether this node has one or more dbg_value
-  /// nodes corresponding to it.
-  uint16_t HasDebugValue : 1;
-
-protected:
-  /// SubclassData - This member is defined by this class, but is not used for
-  /// anything.  Subclasses can use it to hold whatever state they find useful.
-  /// This field is initialized to zero by the ctor.
-  uint16_t SubclassData : 14;
-
-private:
-  /// NodeId - Unique id per SDNode in the DAG.
-  int NodeId;
-
-  /// OperandList - The values that are used by this operation.
-  ///
-  SDUse *OperandList;
-
-  /// ValueList - The types of the values this node defines.  SDNode's may
-  /// define multiple values simultaneously.
-  const EVT *ValueList;
-
-  /// UseList - List of uses for this SDNode.
-  SDUse *UseList;
-
-  /// NumOperands/NumValues - The number of entries in the Operand/Value list.
-  unsigned short NumOperands, NumValues;
-
-  /// debugLoc - source line information.
-  DebugLoc debugLoc;
-
-  /// getValueTypeList - Return a pointer to the specified value type.
-  static const EVT *getValueTypeList(EVT VT);
-
-  friend class SelectionDAG;
-  friend struct ilist_traits<SDNode>;
-
-public:
-  //===--------------------------------------------------------------------===//
-  //  Accessors
-  //
-
-  /// getOpcode - Return the SelectionDAG opcode value for this node. For
-  /// pre-isel nodes (those for which isMachineOpcode returns false), these
-  /// are the opcode values in the ISD and <target>ISD namespaces. For
-  /// post-isel opcodes, see getMachineOpcode.
-  unsigned getOpcode()  const { return (unsigned short)NodeType; }
-
-  /// isTargetOpcode - Test if this node has a target-specific opcode (in the
-  /// \<target\>ISD namespace).
-  bool isTargetOpcode() const { return NodeType >= ISD::BUILTIN_OP_END; }
-
-  /// isTargetMemoryOpcode - Test if this node has a target-specific 
-  /// memory-referencing opcode (in the \<target\>ISD namespace and
-  /// greater than FIRST_TARGET_MEMORY_OPCODE).
-  bool isTargetMemoryOpcode() const {
-    return NodeType >= ISD::FIRST_TARGET_MEMORY_OPCODE;
-  }
-
-  /// isMachineOpcode - Test if this node has a post-isel opcode, directly
-  /// corresponding to a MachineInstr opcode.
-  bool isMachineOpcode() const { return NodeType < 0; }
-
-  /// getMachineOpcode - This may only be called if isMachineOpcode returns
-  /// true. It returns the MachineInstr opcode value that the node's opcode
-  /// corresponds to.
-  unsigned getMachineOpcode() const {
-    assert(isMachineOpcode() && "Not a MachineInstr opcode!");
-    return ~NodeType;
-  }
-
-  /// getHasDebugValue - get this bit.
-  bool getHasDebugValue() const { return HasDebugValue; }
-
-  /// setHasDebugValue - set this bit.
-  void setHasDebugValue(bool b) { HasDebugValue = b; }
-
-  /// use_empty - Return true if there are no uses of this node.
-  ///
-  bool use_empty() const { return UseList == NULL; }
-
-  /// hasOneUse - Return true if there is exactly one use of this node.
-  ///
-  bool hasOneUse() const {
-    return !use_empty() && llvm::next(use_begin()) == use_end();
-  }
-
-  /// use_size - Return the number of uses of this node. This method takes
-  /// time proportional to the number of uses.
-  ///
-  size_t use_size() const { return std::distance(use_begin(), use_end()); }
-
-  /// getNodeId - Return the unique node id.
-  ///
-  int getNodeId() const { return NodeId; }
-
-  /// setNodeId - Set unique node id.
-  void setNodeId(int Id) { NodeId = Id; }
-
-  /// getDebugLoc - Return the source location info.
-  const DebugLoc getDebugLoc() const { return debugLoc; }
-
-  /// setDebugLoc - Set source location info.  Try to avoid this, putting
-  /// it in the constructor is preferable.
-  void setDebugLoc(const DebugLoc dl) { debugLoc = dl; }
-
-  /// use_iterator - This class provides iterator support for SDUse
-  /// operands that use a specific SDNode.
-  class use_iterator
-    : public std::iterator<std::forward_iterator_tag, SDUse, ptrdiff_t> {
-    SDUse *Op;
-    explicit use_iterator(SDUse *op) : Op(op) {
-    }
-    friend class SDNode;
-  public:
-    typedef std::iterator<std::forward_iterator_tag,
-                          SDUse, ptrdiff_t>::reference reference;
-    typedef std::iterator<std::forward_iterator_tag,
-                          SDUse, ptrdiff_t>::pointer pointer;
-
-    use_iterator(const use_iterator &I) : Op(I.Op) {}
-    use_iterator() : Op(0) {}
-
-    bool operator==(const use_iterator &x) const {
-      return Op == x.Op;
-    }
-    bool operator!=(const use_iterator &x) const {
-      return !operator==(x);
-    }
-
-    /// atEnd - return true if this iterator is at the end of uses list.
-    bool atEnd() const { return Op == 0; }
-
-    // Iterator traversal: forward iteration only.
-    use_iterator &operator++() {          // Preincrement
-      assert(Op && "Cannot increment end iterator!");
-      Op = Op->getNext();
-      return *this;
-    }
-
-    use_iterator operator++(int) {        // Postincrement
-      use_iterator tmp = *this; ++*this; return tmp;
-    }
-
-    /// Retrieve a pointer to the current user node.
-    SDNode *operator*() const {
-      assert(Op && "Cannot dereference end iterator!");
-      return Op->getUser();
-    }
-
-    SDNode *operator->() const { return operator*(); }
-
-    SDUse &getUse() const { return *Op; }
-
-    /// getOperandNo - Retrieve the operand # of this use in its user.
-    ///
-    unsigned getOperandNo() const {
-      assert(Op && "Cannot dereference end iterator!");
-      return (unsigned)(Op - Op->getUser()->OperandList);
-    }
-  };
-
-  /// use_begin/use_end - Provide iteration support to walk over all uses
-  /// of an SDNode.
-
-  use_iterator use_begin() const {
-    return use_iterator(UseList);
-  }
-
-  static use_iterator use_end() { return use_iterator(0); }
-
-
-  /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
-  /// indicated value.  This method ignores uses of other values defined by this
-  /// operation.
-  bool hasNUsesOfValue(unsigned NUses, unsigned Value) const;
-
-  /// hasAnyUseOfValue - Return true if there are any use of the indicated
-  /// value. This method ignores uses of other values defined by this operation.
-  bool hasAnyUseOfValue(unsigned Value) const;
-
-  /// isOnlyUserOf - Return true if this node is the only use of N.
-  ///
-  bool isOnlyUserOf(SDNode *N) const;
-
-  /// isOperandOf - Return true if this node is an operand of N.
-  ///
-  bool isOperandOf(SDNode *N) const;
-
-  /// isPredecessorOf - Return true if this node is a predecessor of N. This
-  /// node is either an operand of N or it can be reached by recursively
-  /// traversing up the operands.
-  /// NOTE: this is an expensive method. Use it carefully.
-  bool isPredecessorOf(SDNode *N) const;
-
-  /// getNumOperands - Return the number of values used by this operation.
-  ///
-  unsigned getNumOperands() const { return NumOperands; }
-
-  /// getConstantOperandVal - Helper method returns the integer value of a
-  /// ConstantSDNode operand.
-  uint64_t getConstantOperandVal(unsigned Num) const;
-
-  const SDValue &getOperand(unsigned Num) const {
-    assert(Num < NumOperands && "Invalid child # of SDNode!");
-    return OperandList[Num];
-  }
-
-  typedef SDUse* op_iterator;
-  op_iterator op_begin() const { return OperandList; }
-  op_iterator op_end() const { return OperandList+NumOperands; }
-
-  SDVTList getVTList() const {
-    SDVTList X = { ValueList, NumValues };
-    return X;
-  }
-
-  /// getFlaggedNode - If this node has a flag operand, return the node
-  /// to which the flag operand points. Otherwise return NULL.
-  SDNode *getFlaggedNode() const {
-    if (getNumOperands() != 0 &&
-      getOperand(getNumOperands()-1).getValueType().getSimpleVT() == MVT::Flag)
-      return getOperand(getNumOperands()-1).getNode();
-    return 0;
-  }
-
-  // If this is a pseudo op, like copyfromreg, look to see if there is a
-  // real target node flagged to it.  If so, return the target node.
-  const SDNode *getFlaggedMachineNode() const {
-    const SDNode *FoundNode = this;
-
-    // Climb up flag edges until a machine-opcode node is found, or the
-    // end of the chain is reached.
-    while (!FoundNode->isMachineOpcode()) {
-      const SDNode *N = FoundNode->getFlaggedNode();
-      if (!N) break;
-      FoundNode = N;
-    }
-
-    return FoundNode;
-  }
-
-  /// getNumValues - Return the number of values defined/returned by this
-  /// operator.
-  ///
-  unsigned getNumValues() const { return NumValues; }
-
-  /// getValueType - Return the type of a specified result.
-  ///
-  EVT getValueType(unsigned ResNo) const {
-    assert(ResNo < NumValues && "Illegal result number!");
-    return ValueList[ResNo];
-  }
-
-  /// getValueSizeInBits - Returns MVT::getSizeInBits(getValueType(ResNo)).
-  ///
-  unsigned getValueSizeInBits(unsigned ResNo) const {
-    return getValueType(ResNo).getSizeInBits();
-  }
-
-  typedef const EVT* value_iterator;
-  value_iterator value_begin() const { return ValueList; }
-  value_iterator value_end() const { return ValueList+NumValues; }
-
-  /// getOperationName - Return the opcode of this operation for printing.
-  ///
-  std::string getOperationName(const SelectionDAG *G = 0) const;
-  static const char* getIndexedModeName(ISD::MemIndexedMode AM);
-  void print_types(raw_ostream &OS, const SelectionDAG *G) const;
-  void print_details(raw_ostream &OS, const SelectionDAG *G) const;
-  void print(raw_ostream &OS, const SelectionDAG *G = 0) const;
-  void printr(raw_ostream &OS, const SelectionDAG *G = 0) const;
-
-  /// printrFull - Print a SelectionDAG node and all children down to
-  /// the leaves.  The given SelectionDAG allows target-specific nodes
-  /// to be printed in human-readable form.  Unlike printr, this will
-  /// print the whole DAG, including children that appear multiple
-  /// times.
-  ///
-  void printrFull(raw_ostream &O, const SelectionDAG *G = 0) const;
-
-  /// printrWithDepth - Print a SelectionDAG node and children up to
-  /// depth "depth."  The given SelectionDAG allows target-specific
-  /// nodes to be printed in human-readable form.  Unlike printr, this
-  /// will print children that appear multiple times wherever they are
-  /// used.
-  ///
-  void printrWithDepth(raw_ostream &O, const SelectionDAG *G = 0,
-                       unsigned depth = 100) const;
-
-
-  /// dump - Dump this node, for debugging.
-  void dump() const;
-
-  /// dumpr - Dump (recursively) this node and its use-def subgraph.
-  void dumpr() const;
-
-  /// dump - Dump this node, for debugging.
-  /// The given SelectionDAG allows target-specific nodes to be printed
-  /// in human-readable form.
-  void dump(const SelectionDAG *G) const;
-
-  /// dumpr - Dump (recursively) this node and its use-def subgraph.
-  /// The given SelectionDAG allows target-specific nodes to be printed
-  /// in human-readable form.
-  void dumpr(const SelectionDAG *G) const;
-
-  /// dumprFull - printrFull to dbgs().  The given SelectionDAG allows
-  /// target-specific nodes to be printed in human-readable form.
-  /// Unlike dumpr, this will print the whole DAG, including children
-  /// that appear multiple times.
-  ///
-  void dumprFull(const SelectionDAG *G = 0) const;
-
-  /// dumprWithDepth - printrWithDepth to dbgs().  The given
-  /// SelectionDAG allows target-specific nodes to be printed in
-  /// human-readable form.  Unlike dumpr, this will print children
-  /// that appear multiple times wherever they are used.
-  ///
-  void dumprWithDepth(const SelectionDAG *G = 0, unsigned depth = 100) const;
-
-
-  static bool classof(const SDNode *) { return true; }
-
-  /// Profile - Gather unique data for the node.
-  ///
-  void Profile(FoldingSetNodeID &ID) const;
-
-  /// addUse - This method should only be used by the SDUse class.
-  ///
-  void addUse(SDUse &U) { U.addToList(&UseList); }
-
-protected:
-  static SDVTList getSDVTList(EVT VT) {
-    SDVTList Ret = { getValueTypeList(VT), 1 };
-    return Ret;
-  }
-
-  SDNode(unsigned Opc, const DebugLoc dl, SDVTList VTs, const SDValue *Ops,
-         unsigned NumOps)
-    : NodeType(Opc), OperandsNeedDelete(true), HasDebugValue(false),
-      SubclassData(0), NodeId(-1),
-      OperandList(NumOps ? new SDUse[NumOps] : 0),
-      ValueList(VTs.VTs), UseList(NULL),
-      NumOperands(NumOps), NumValues(VTs.NumVTs),
-      debugLoc(dl) {
-    for (unsigned i = 0; i != NumOps; ++i) {
-      OperandList[i].setUser(this);
-      OperandList[i].setInitial(Ops[i]);
-    }
-    checkForCycles(this);
-  }
-
-  /// This constructor adds no operands itself; operands can be
-  /// set later with InitOperands.
-  SDNode(unsigned Opc, const DebugLoc dl, SDVTList VTs)
-    : NodeType(Opc), OperandsNeedDelete(false), HasDebugValue(false),
-      SubclassData(0), NodeId(-1), OperandList(0), ValueList(VTs.VTs),
-      UseList(NULL), NumOperands(0), NumValues(VTs.NumVTs),
-      debugLoc(dl) {}
-
-  /// InitOperands - Initialize the operands list of this with 1 operand.
-  void InitOperands(SDUse *Ops, const SDValue &Op0) {
-    Ops[0].setUser(this);
-    Ops[0].setInitial(Op0);
-    NumOperands = 1;
-    OperandList = Ops;
-    checkForCycles(this);
-  }
-
-  /// InitOperands - Initialize the operands list of this with 2 operands.
-  void InitOperands(SDUse *Ops, const SDValue &Op0, const SDValue &Op1) {
-    Ops[0].setUser(this);
-    Ops[0].setInitial(Op0);
-    Ops[1].setUser(this);
-    Ops[1].setInitial(Op1);
-    NumOperands = 2;
-    OperandList = Ops;
-    checkForCycles(this);
-  }
-
-  /// InitOperands - Initialize the operands list of this with 3 operands.
-  void InitOperands(SDUse *Ops, const SDValue &Op0, const SDValue &Op1,
-                    const SDValue &Op2) {
-    Ops[0].setUser(this);
-    Ops[0].setInitial(Op0);
-    Ops[1].setUser(this);
-    Ops[1].setInitial(Op1);
-    Ops[2].setUser(this);
-    Ops[2].setInitial(Op2);
-    NumOperands = 3;
-    OperandList = Ops;
-    checkForCycles(this);
-  }
-
-  /// InitOperands - Initialize the operands list of this with 4 operands.
-  void InitOperands(SDUse *Ops, const SDValue &Op0, const SDValue &Op1,
-                    const SDValue &Op2, const SDValue &Op3) {
-    Ops[0].setUser(this);
-    Ops[0].setInitial(Op0);
-    Ops[1].setUser(this);
-    Ops[1].setInitial(Op1);
-    Ops[2].setUser(this);
-    Ops[2].setInitial(Op2);
-    Ops[3].setUser(this);
-    Ops[3].setInitial(Op3);
-    NumOperands = 4;
-    OperandList = Ops;
-    checkForCycles(this);
-  }
-
-  /// InitOperands - Initialize the operands list of this with N operands.
-  void InitOperands(SDUse *Ops, const SDValue *Vals, unsigned N) {
-    for (unsigned i = 0; i != N; ++i) {
-      Ops[i].setUser(this);
-      Ops[i].setInitial(Vals[i]);
-    }
-    NumOperands = N;
-    OperandList = Ops;
-    checkForCycles(this);
-  }
-
-  /// DropOperands - Release the operands and set this node to have
-  /// zero operands.
-  void DropOperands();
-};
-
-
-// Define inline functions from the SDValue class.
-
-inline unsigned SDValue::getOpcode() const {
-  return Node->getOpcode();
-}
-inline EVT SDValue::getValueType() const {
-  return Node->getValueType(ResNo);
-}
-inline unsigned SDValue::getNumOperands() const {
-  return Node->getNumOperands();
-}
-inline const SDValue &SDValue::getOperand(unsigned i) const {
-  return Node->getOperand(i);
-}
-inline uint64_t SDValue::getConstantOperandVal(unsigned i) const {
-  return Node->getConstantOperandVal(i);
-}
-inline bool SDValue::isTargetOpcode() const {
-  return Node->isTargetOpcode();
-}
-inline bool SDValue::isTargetMemoryOpcode() const {
-  return Node->isTargetMemoryOpcode();
-}
-inline bool SDValue::isMachineOpcode() const {
-  return Node->isMachineOpcode();
-}
-inline unsigned SDValue::getMachineOpcode() const {
-  return Node->getMachineOpcode();
-}
-inline bool SDValue::use_empty() const {
-  return !Node->hasAnyUseOfValue(ResNo);
-}
-inline bool SDValue::hasOneUse() const {
-  return Node->hasNUsesOfValue(1, ResNo);
-}
-inline const DebugLoc SDValue::getDebugLoc() const {
-  return Node->getDebugLoc();
-}
-
-// Define inline functions from the SDUse class.
-
-inline void SDUse::set(const SDValue &V) {
-  if (Val.getNode()) removeFromList();
-  Val = V;
-  if (V.getNode()) V.getNode()->addUse(*this);
-}
-
-inline void SDUse::setInitial(const SDValue &V) {
-  Val = V;
-  V.getNode()->addUse(*this);
-}
-
-inline void SDUse::setNode(SDNode *N) {
-  if (Val.getNode()) removeFromList();
-  Val.setNode(N);
-  if (N) N->addUse(*this);
-}
-
-/// UnarySDNode - This class is used for single-operand SDNodes.  This is solely
-/// to allow co-allocation of node operands with the node itself.
-class UnarySDNode : public SDNode {
-  SDUse Op;
-public:
-  UnarySDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, SDValue X)
-    : SDNode(Opc, dl, VTs) {
-    InitOperands(&Op, X);
-  }
-};
-
-/// BinarySDNode - This class is used for two-operand SDNodes.  This is solely
-/// to allow co-allocation of node operands with the node itself.
-class BinarySDNode : public SDNode {
-  SDUse Ops[2];
-public:
-  BinarySDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, SDValue X, SDValue Y)
-    : SDNode(Opc, dl, VTs) {
-    InitOperands(Ops, X, Y);
-  }
-};
-
-/// TernarySDNode - This class is used for three-operand SDNodes. This is solely
-/// to allow co-allocation of node operands with the node itself.
-class TernarySDNode : public SDNode {
-  SDUse Ops[3];
-public:
-  TernarySDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, SDValue X, SDValue Y,
-                SDValue Z)
-    : SDNode(Opc, dl, VTs) {
-    InitOperands(Ops, X, Y, Z);
-  }
-};
-
-
-/// HandleSDNode - This class is used to form a handle around another node that
-/// is persistant and is updated across invocations of replaceAllUsesWith on its
-/// operand.  This node should be directly created by end-users and not added to
-/// the AllNodes list.
-class HandleSDNode : public SDNode {
-  SDUse Op;
-public:
-  // FIXME: Remove the "noinline" attribute once <rdar://problem/5852746> is
-  // fixed.
-#if __GNUC__==4 && __GNUC_MINOR__==2 && defined(__APPLE__) && !defined(__llvm__)
-  explicit __attribute__((__noinline__)) HandleSDNode(SDValue X)
-#else
-  explicit HandleSDNode(SDValue X)
-#endif
-    : SDNode(ISD::HANDLENODE, DebugLoc(), getSDVTList(MVT::Other)) {
-    InitOperands(&Op, X);
-  }
-  ~HandleSDNode();
-  const SDValue &getValue() const { return Op; }
-};
-
-/// Abstact virtual class for operations for memory operations
-class MemSDNode : public SDNode {
-private:
-  // MemoryVT - VT of in-memory value.
-  EVT MemoryVT;
-
-protected:
-  /// MMO - Memory reference information.
-  MachineMemOperand *MMO;
-
-public:
-  MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT MemoryVT,
-            MachineMemOperand *MMO);
-
-  MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, const SDValue *Ops,
-            unsigned NumOps, EVT MemoryVT, MachineMemOperand *MMO);
-
-  bool readMem() const { return MMO->isLoad(); }
-  bool writeMem() const { return MMO->isStore(); }
-
-  /// Returns alignment and volatility of the memory access
-  unsigned getOriginalAlignment() const { 
-    return MMO->getBaseAlignment();
-  }
-  unsigned getAlignment() const {
-    return MMO->getAlignment();
-  }
-
-  /// getRawSubclassData - Return the SubclassData value, which contains an
-  /// encoding of the volatile flag, as well as bits used by subclasses. This
-  /// function should only be used to compute a FoldingSetNodeID value.
-  unsigned getRawSubclassData() const {
-    return SubclassData;
-  }
-
-  // We access subclass data here so that we can check consistency
-  // with MachineMemOperand information.
-  bool isVolatile() const { return (SubclassData >> 5) & 1; }
-  bool isNonTemporal() const { return (SubclassData >> 6) & 1; }
-
-  /// Returns the SrcValue and offset that describes the location of the access
-  const Value *getSrcValue() const { return MMO->getValue(); }
-  int64_t getSrcValueOffset() const { return MMO->getOffset(); }
-
-  /// getMemoryVT - Return the type of the in-memory value.
-  EVT getMemoryVT() const { return MemoryVT; }
-
-  /// getMemOperand - Return a MachineMemOperand object describing the memory
-  /// reference performed by operation.
-  MachineMemOperand *getMemOperand() const { return MMO; }
-
-  /// refineAlignment - Update this MemSDNode's MachineMemOperand information
-  /// to reflect the alignment of NewMMO, if it has a greater alignment.
-  /// This must only be used when the new alignment applies to all users of
-  /// this MachineMemOperand.
-  void refineAlignment(const MachineMemOperand *NewMMO) {
-    MMO->refineAlignment(NewMMO);
-  }
-
-  const SDValue &getChain() const { return getOperand(0); }
-  const SDValue &getBasePtr() const {
-    return getOperand(getOpcode() == ISD::STORE ? 2 : 1);
-  }
-
-  // Methods to support isa and dyn_cast
-  static bool classof(const MemSDNode *) { return true; }
-  static bool classof(const SDNode *N) {
-    // For some targets, we lower some target intrinsics to a MemIntrinsicNode
-    // with either an intrinsic or a target opcode.
-    return N->getOpcode() == ISD::LOAD                ||
-           N->getOpcode() == ISD::STORE               ||
-           N->getOpcode() == ISD::ATOMIC_CMP_SWAP     ||
-           N->getOpcode() == ISD::ATOMIC_SWAP         ||
-           N->getOpcode() == ISD::ATOMIC_LOAD_ADD     ||
-           N->getOpcode() == ISD::ATOMIC_LOAD_SUB     ||
-           N->getOpcode() == ISD::ATOMIC_LOAD_AND     ||
-           N->getOpcode() == ISD::ATOMIC_LOAD_OR      ||
-           N->getOpcode() == ISD::ATOMIC_LOAD_XOR     ||
-           N->getOpcode() == ISD::ATOMIC_LOAD_NAND    ||
-           N->getOpcode() == ISD::ATOMIC_LOAD_MIN     ||
-           N->getOpcode() == ISD::ATOMIC_LOAD_MAX     ||
-           N->getOpcode() == ISD::ATOMIC_LOAD_UMIN    ||
-           N->getOpcode() == ISD::ATOMIC_LOAD_UMAX    ||
-           N->isTargetMemoryOpcode();
-  }
-};
-
-/// AtomicSDNode - A SDNode reprenting atomic operations.
-///
-class AtomicSDNode : public MemSDNode {
-  SDUse Ops[4];
-
-public:
-  // Opc:   opcode for atomic
-  // VTL:    value type list
-  // Chain:  memory chain for operaand
-  // Ptr:    address to update as a SDValue
-  // Cmp:    compare value
-  // Swp:    swap value
-  // SrcVal: address to update as a Value (used for MemOperand)
-  // Align:  alignment of memory
-  AtomicSDNode(unsigned Opc, DebugLoc dl, SDVTList VTL, EVT MemVT,
-               SDValue Chain, SDValue Ptr,
-               SDValue Cmp, SDValue Swp, MachineMemOperand *MMO)
-    : MemSDNode(Opc, dl, VTL, MemVT, MMO) {
-    assert(readMem() && "Atomic MachineMemOperand is not a load!");
-    assert(writeMem() && "Atomic MachineMemOperand is not a store!");
-    InitOperands(Ops, Chain, Ptr, Cmp, Swp);
-  }
-  AtomicSDNode(unsigned Opc, DebugLoc dl, SDVTList VTL, EVT MemVT,
-               SDValue Chain, SDValue Ptr,
-               SDValue Val, MachineMemOperand *MMO)
-    : MemSDNode(Opc, dl, VTL, MemVT, MMO) {
-    assert(readMem() && "Atomic MachineMemOperand is not a load!");
-    assert(writeMem() && "Atomic MachineMemOperand is not a store!");
-    InitOperands(Ops, Chain, Ptr, Val);
-  }
-
-  const SDValue &getBasePtr() const { return getOperand(1); }
-  const SDValue &getVal() const { return getOperand(2); }
-
-  bool isCompareAndSwap() const {
-    unsigned Op = getOpcode();
-    return Op == ISD::ATOMIC_CMP_SWAP;
-  }
-
-  // Methods to support isa and dyn_cast
-  static bool classof(const AtomicSDNode *) { return true; }
-  static bool classof(const SDNode *N) {
-    return N->getOpcode() == ISD::ATOMIC_CMP_SWAP     ||
-           N->getOpcode() == ISD::ATOMIC_SWAP         ||
-           N->getOpcode() == ISD::ATOMIC_LOAD_ADD     ||
-           N->getOpcode() == ISD::ATOMIC_LOAD_SUB     ||
-           N->getOpcode() == ISD::ATOMIC_LOAD_AND     ||
-           N->getOpcode() == ISD::ATOMIC_LOAD_OR      ||
-           N->getOpcode() == ISD::ATOMIC_LOAD_XOR     ||
-           N->getOpcode() == ISD::ATOMIC_LOAD_NAND    ||
-           N->getOpcode() == ISD::ATOMIC_LOAD_MIN     ||
-           N->getOpcode() == ISD::ATOMIC_LOAD_MAX     ||
-           N->getOpcode() == ISD::ATOMIC_LOAD_UMIN    ||
-           N->getOpcode() == ISD::ATOMIC_LOAD_UMAX;
-  }
-};
-
-/// MemIntrinsicSDNode - This SDNode is used for target intrinsics that touch
-/// memory and need an associated MachineMemOperand. Its opcode may be
-/// INTRINSIC_VOID, INTRINSIC_W_CHAIN, or a target-specific opcode with a
-/// value not less than FIRST_TARGET_MEMORY_OPCODE.
-class MemIntrinsicSDNode : public MemSDNode {
-public:
-  MemIntrinsicSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
-                     const SDValue *Ops, unsigned NumOps,
-                     EVT MemoryVT, MachineMemOperand *MMO)
-    : MemSDNode(Opc, dl, VTs, Ops, NumOps, MemoryVT, MMO) {
-  }
-
-  // Methods to support isa and dyn_cast
-  static bool classof(const MemIntrinsicSDNode *) { return true; }
-  static bool classof(const SDNode *N) {
-    // We lower some target intrinsics to their target opcode
-    // early a node with a target opcode can be of this class
-    return N->getOpcode() == ISD::INTRINSIC_W_CHAIN ||
-           N->getOpcode() == ISD::INTRINSIC_VOID ||
-           N->isTargetMemoryOpcode();
-  }
-};
-
-/// ShuffleVectorSDNode - This SDNode is used to implement the code generator
-/// support for the llvm IR shufflevector instruction.  It combines elements
-/// from two input vectors into a new input vector, with the selection and
-/// ordering of elements determined by an array of integers, referred to as
-/// the shuffle mask.  For input vectors of width N, mask indices of 0..N-1
-/// refer to elements from the LHS input, and indices from N to 2N-1 the RHS.
-/// An index of -1 is treated as undef, such that the code generator may put
-/// any value in the corresponding element of the result.
-class ShuffleVectorSDNode : public SDNode {
-  SDUse Ops[2];
-
-  // The memory for Mask is owned by the SelectionDAG's OperandAllocator, and
-  // is freed when the SelectionDAG object is destroyed.
-  const int *Mask;
-protected:
-  friend class SelectionDAG;
-  ShuffleVectorSDNode(EVT VT, DebugLoc dl, SDValue N1, SDValue N2, 
-                      const int *M)
-    : SDNode(ISD::VECTOR_SHUFFLE, dl, getSDVTList(VT)), Mask(M) {
-    InitOperands(Ops, N1, N2);
-  }
-public:
-
-  void getMask(SmallVectorImpl<int> &M) const {
-    EVT VT = getValueType(0);
-    M.clear();
-    for (unsigned i = 0, e = VT.getVectorNumElements(); i != e; ++i)
-      M.push_back(Mask[i]);
-  }
-  int getMaskElt(unsigned Idx) const {
-    assert(Idx < getValueType(0).getVectorNumElements() && "Idx out of range!");
-    return Mask[Idx];
-  }
-  
-  bool isSplat() const { return isSplatMask(Mask, getValueType(0)); }
-  int  getSplatIndex() const { 
-    assert(isSplat() && "Cannot get splat index for non-splat!");
-    EVT VT = getValueType(0);
-    for (unsigned i = 0, e = VT.getVectorNumElements(); i != e; ++i) {
-      if (Mask[i] != -1)
-        return Mask[i];
-    }
-    return -1;
-  }
-  static bool isSplatMask(const int *Mask, EVT VT);
-
-  static bool classof(const ShuffleVectorSDNode *) { return true; }
-  static bool classof(const SDNode *N) {
-    return N->getOpcode() == ISD::VECTOR_SHUFFLE;
-  }
-};
-  
-class ConstantSDNode : public SDNode {
-  const ConstantInt *Value;
-  friend class SelectionDAG;
-  ConstantSDNode(bool isTarget, const ConstantInt *val, EVT VT)
-    : SDNode(isTarget ? ISD::TargetConstant : ISD::Constant,
-             DebugLoc(), getSDVTList(VT)), Value(val) {
-  }
-public:
-
-  const ConstantInt *getConstantIntValue() const { return Value; }
-  const APInt &getAPIntValue() const { return Value->getValue(); }
-  uint64_t getZExtValue() const { return Value->getZExtValue(); }
-  int64_t getSExtValue() const { return Value->getSExtValue(); }
-
-  bool isNullValue() const { return Value->isNullValue(); }
-  bool isAllOnesValue() const { return Value->isAllOnesValue(); }
-
-  static bool classof(const ConstantSDNode *) { return true; }
-  static bool classof(const SDNode *N) {
-    return N->getOpcode() == ISD::Constant ||
-           N->getOpcode() == ISD::TargetConstant;
-  }
-};
-
-class ConstantFPSDNode : public SDNode {
-  const ConstantFP *Value;
-  friend class SelectionDAG;
-  ConstantFPSDNode(bool isTarget, const ConstantFP *val, EVT VT)
-    : SDNode(isTarget ? ISD::TargetConstantFP : ISD::ConstantFP,
-             DebugLoc(), getSDVTList(VT)), Value(val) {
-  }
-public:
-
-  const APFloat& getValueAPF() const { return Value->getValueAPF(); }
-  const ConstantFP *getConstantFPValue() const { return Value; }
-
-  /// isZero - Return true if the value is positive or negative zero.
-  bool isZero() const { return Value->isZero(); }
-
-  /// isNaN - Return true if the value is a NaN.
-  bool isNaN() const { return Value->isNaN(); }
-
-  /// isExactlyValue - We don't rely on operator== working on double values, as
-  /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
-  /// As such, this method can be used to do an exact bit-for-bit comparison of
-  /// two floating point values.
-
-  /// We leave the version with the double argument here because it's just so
-  /// convenient to write "2.0" and the like.  Without this function we'd
-  /// have to duplicate its logic everywhere it's called.
-  bool isExactlyValue(double V) const {
-    bool ignored;
-    // convert is not supported on this type
-    if (&Value->getValueAPF().getSemantics() == &APFloat::PPCDoubleDouble)
-      return false;
-    APFloat Tmp(V);
-    Tmp.convert(Value->getValueAPF().getSemantics(),
-                APFloat::rmNearestTiesToEven, &ignored);
-    return isExactlyValue(Tmp);
-  }
-  bool isExactlyValue(const APFloat& V) const;
-
-  bool isValueValidForType(EVT VT, const APFloat& Val);
-
-  static bool classof(const ConstantFPSDNode *) { return true; }
-  static bool classof(const SDNode *N) {
-    return N->getOpcode() == ISD::ConstantFP ||
-           N->getOpcode() == ISD::TargetConstantFP;
-  }
-};
-
-class GlobalAddressSDNode : public SDNode {
-  GlobalValue *TheGlobal;
-  int64_t Offset;
-  unsigned char TargetFlags;
-  friend class SelectionDAG;
-  GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA, EVT VT,
-                      int64_t o, unsigned char TargetFlags);
-public:
-
-  GlobalValue *getGlobal() const { return TheGlobal; }
-  int64_t getOffset() const { return Offset; }
-  unsigned char getTargetFlags() const { return TargetFlags; }
-  // Return the address space this GlobalAddress belongs to.
-  unsigned getAddressSpace() const;
-
-  static bool classof(const GlobalAddressSDNode *) { return true; }
-  static bool classof(const SDNode *N) {
-    return N->getOpcode() == ISD::GlobalAddress ||
-           N->getOpcode() == ISD::TargetGlobalAddress ||
-           N->getOpcode() == ISD::GlobalTLSAddress ||
-           N->getOpcode() == ISD::TargetGlobalTLSAddress;
-  }
-};
-
-class FrameIndexSDNode : public SDNode {
-  int FI;
-  friend class SelectionDAG;
-  FrameIndexSDNode(int fi, EVT VT, bool isTarg)
-    : SDNode(isTarg ? ISD::TargetFrameIndex : ISD::FrameIndex,
-      DebugLoc(), getSDVTList(VT)), FI(fi) {
-  }
-public:
-
-  int getIndex() const { return FI; }
-
-  static bool classof(const FrameIndexSDNode *) { return true; }
-  static bool classof(const SDNode *N) {
-    return N->getOpcode() == ISD::FrameIndex ||
-           N->getOpcode() == ISD::TargetFrameIndex;
-  }
-};
-
-class JumpTableSDNode : public SDNode {
-  int JTI;
-  unsigned char TargetFlags;
-  friend class SelectionDAG;
-  JumpTableSDNode(int jti, EVT VT, bool isTarg, unsigned char TF)
-    : SDNode(isTarg ? ISD::TargetJumpTable : ISD::JumpTable,
-      DebugLoc(), getSDVTList(VT)), JTI(jti), TargetFlags(TF) {
-  }
-public:
-
-  int getIndex() const { return JTI; }
-  unsigned char getTargetFlags() const { return TargetFlags; }
-
-  static bool classof(const JumpTableSDNode *) { return true; }
-  static bool classof(const SDNode *N) {
-    return N->getOpcode() == ISD::JumpTable ||
-           N->getOpcode() == ISD::TargetJumpTable;
-  }
-};
-
-class ConstantPoolSDNode : public SDNode {
-  union {
-    Constant *ConstVal;
-    MachineConstantPoolValue *MachineCPVal;
-  } Val;
-  int Offset;  // It's a MachineConstantPoolValue if top bit is set.
-  unsigned Alignment;  // Minimum alignment requirement of CP (not log2 value).
-  unsigned char TargetFlags;
-  friend class SelectionDAG;
-  ConstantPoolSDNode(bool isTarget, Constant *c, EVT VT, int o, unsigned Align,
-                     unsigned char TF)
-    : SDNode(isTarget ? ISD::TargetConstantPool : ISD::ConstantPool,
-             DebugLoc(),
-             getSDVTList(VT)), Offset(o), Alignment(Align), TargetFlags(TF) {
-    assert((int)Offset >= 0 && "Offset is too large");
-    Val.ConstVal = c;
-  }
-  ConstantPoolSDNode(bool isTarget, MachineConstantPoolValue *v,
-                     EVT VT, int o, unsigned Align, unsigned char TF)
-    : SDNode(isTarget ? ISD::TargetConstantPool : ISD::ConstantPool,
-             DebugLoc(),
-             getSDVTList(VT)), Offset(o), Alignment(Align), TargetFlags(TF) {
-    assert((int)Offset >= 0 && "Offset is too large");
-    Val.MachineCPVal = v;
-    Offset |= 1 << (sizeof(unsigned)*CHAR_BIT-1);
-  }
-public:
-  
-
-  bool isMachineConstantPoolEntry() const {
-    return (int)Offset < 0;
-  }
-
-  Constant *getConstVal() const {
-    assert(!isMachineConstantPoolEntry() && "Wrong constantpool type");
-    return Val.ConstVal;
-  }
-
-  MachineConstantPoolValue *getMachineCPVal() const {
-    assert(isMachineConstantPoolEntry() && "Wrong constantpool type");
-    return Val.MachineCPVal;
-  }
-
-  int getOffset() const {
-    return Offset & ~(1 << (sizeof(unsigned)*CHAR_BIT-1));
-  }
-
-  // Return the alignment of this constant pool object, which is either 0 (for
-  // default alignment) or the desired value.
-  unsigned getAlignment() const { return Alignment; }
-  unsigned char getTargetFlags() const { return TargetFlags; }
-
-  const Type *getType() const;
-
-  static bool classof(const ConstantPoolSDNode *) { return true; }
-  static bool classof(const SDNode *N) {
-    return N->getOpcode() == ISD::ConstantPool ||
-           N->getOpcode() == ISD::TargetConstantPool;
-  }
-};
-
-class BasicBlockSDNode : public SDNode {
-  MachineBasicBlock *MBB;
-  friend class SelectionDAG;
-  /// Debug info is meaningful and potentially useful here, but we create
-  /// blocks out of order when they're jumped to, which makes it a bit
-  /// harder.  Let's see if we need it first.
-  explicit BasicBlockSDNode(MachineBasicBlock *mbb)
-    : SDNode(ISD::BasicBlock, DebugLoc(), getSDVTList(MVT::Other)), MBB(mbb) {
-  }
-public:
-
-  MachineBasicBlock *getBasicBlock() const { return MBB; }
-
-  static bool classof(const BasicBlockSDNode *) { return true; }
-  static bool classof(const SDNode *N) {
-    return N->getOpcode() == ISD::BasicBlock;
-  }
-};
-
-/// BuildVectorSDNode - A "pseudo-class" with methods for operating on
-/// BUILD_VECTORs.
-class BuildVectorSDNode : public SDNode {
-  // These are constructed as SDNodes and then cast to BuildVectorSDNodes.
-  explicit BuildVectorSDNode();        // Do not implement
-public:
-  /// isConstantSplat - Check if this is a constant splat, and if so, find the
-  /// smallest element size that splats the vector.  If MinSplatBits is
-  /// nonzero, the element size must be at least that large.  Note that the
-  /// splat element may be the entire vector (i.e., a one element vector).
-  /// Returns the splat element value in SplatValue.  Any undefined bits in
-  /// that value are zero, and the corresponding bits in the SplatUndef mask
-  /// are set.  The SplatBitSize value is set to the splat element size in
-  /// bits.  HasAnyUndefs is set to true if any bits in the vector are
-  /// undefined.  isBigEndian describes the endianness of the target.
-  bool isConstantSplat(APInt &SplatValue, APInt &SplatUndef,
-                       unsigned &SplatBitSize, bool &HasAnyUndefs,
-                       unsigned MinSplatBits = 0, bool isBigEndian = false);
-
-  static inline bool classof(const BuildVectorSDNode *) { return true; }
-  static inline bool classof(const SDNode *N) {
-    return N->getOpcode() == ISD::BUILD_VECTOR;
-  }
-};
-
-/// SrcValueSDNode - An SDNode that holds an arbitrary LLVM IR Value. This is
-/// used when the SelectionDAG needs to make a simple reference to something
-/// in the LLVM IR representation.
-///
-class SrcValueSDNode : public SDNode {
-  const Value *V;
-  friend class SelectionDAG;
-  /// Create a SrcValue for a general value.
-  explicit SrcValueSDNode(const Value *v)
-    : SDNode(ISD::SRCVALUE, DebugLoc(), getSDVTList(MVT::Other)), V(v) {}
-
-public:
-  /// getValue - return the contained Value.
-  const Value *getValue() const { return V; }
-
-  static bool classof(const SrcValueSDNode *) { return true; }
-  static bool classof(const SDNode *N) {
-    return N->getOpcode() == ISD::SRCVALUE;
-  }
-};
-  
-class MDNodeSDNode : public SDNode {
-  const MDNode *MD;
-  friend class SelectionDAG;
-  explicit MDNodeSDNode(const MDNode *md)
-  : SDNode(ISD::MDNODE_SDNODE, DebugLoc(), getSDVTList(MVT::Other)), MD(md) {}
-public:
-  
-  const MDNode *getMD() const { return MD; }
-  
-  static bool classof(const MDNodeSDNode *) { return true; }
-  static bool classof(const SDNode *N) {
-    return N->getOpcode() == ISD::MDNODE_SDNODE;
-  }
-};
-
-
-class RegisterSDNode : public SDNode {
-  unsigned Reg;
-  friend class SelectionDAG;
-  RegisterSDNode(unsigned reg, EVT VT)
-    : SDNode(ISD::Register, DebugLoc(), getSDVTList(VT)), Reg(reg) {
-  }
-public:
-
-  unsigned getReg() const { return Reg; }
-
-  static bool classof(const RegisterSDNode *) { return true; }
-  static bool classof(const SDNode *N) {
-    return N->getOpcode() == ISD::Register;
-  }
-};
-
-class BlockAddressSDNode : public SDNode {
-  BlockAddress *BA;
-  unsigned char TargetFlags;
-  friend class SelectionDAG;
-  BlockAddressSDNode(unsigned NodeTy, EVT VT, BlockAddress *ba,
-                     unsigned char Flags)
-    : SDNode(NodeTy, DebugLoc(), getSDVTList(VT)),
-             BA(ba), TargetFlags(Flags) {
-  }
-public:
-  BlockAddress *getBlockAddress() const { return BA; }
-  unsigned char getTargetFlags() const { return TargetFlags; }
-
-  static bool classof(const BlockAddressSDNode *) { return true; }
-  static bool classof(const SDNode *N) {
-    return N->getOpcode() == ISD::BlockAddress ||
-           N->getOpcode() == ISD::TargetBlockAddress;
-  }
-};
-
-class EHLabelSDNode : public SDNode {
-  SDUse Chain;
-  MCSymbol *Label;
-  friend class SelectionDAG;
-  EHLabelSDNode(DebugLoc dl, SDValue ch, MCSymbol *L)
-    : SDNode(ISD::EH_LABEL, dl, getSDVTList(MVT::Other)), Label(L) {
-    InitOperands(&Chain, ch);
-  }
-public:
-  MCSymbol *getLabel() const { return Label; }
-
-  static bool classof(const EHLabelSDNode *) { return true; }
-  static bool classof(const SDNode *N) {
-    return N->getOpcode() == ISD::EH_LABEL;
-  }
-};
-
-class ExternalSymbolSDNode : public SDNode {
-  const char *Symbol;
-  unsigned char TargetFlags;
-  
-  friend class SelectionDAG;
-  ExternalSymbolSDNode(bool isTarget, const char *Sym, unsigned char TF, EVT VT)
-    : SDNode(isTarget ? ISD::TargetExternalSymbol : ISD::ExternalSymbol,
-             DebugLoc(), getSDVTList(VT)), Symbol(Sym), TargetFlags(TF) {
-  }
-public:
-
-  const char *getSymbol() const { return Symbol; }
-  unsigned char getTargetFlags() const { return TargetFlags; }
-
-  static bool classof(const ExternalSymbolSDNode *) { return true; }
-  static bool classof(const SDNode *N) {
-    return N->getOpcode() == ISD::ExternalSymbol ||
-           N->getOpcode() == ISD::TargetExternalSymbol;
-  }
-};
-
-class CondCodeSDNode : public SDNode {
-  ISD::CondCode Condition;
-  friend class SelectionDAG;
-  explicit CondCodeSDNode(ISD::CondCode Cond)
-    : SDNode(ISD::CONDCODE, DebugLoc(), getSDVTList(MVT::Other)),
-      Condition(Cond) {
-  }
-public:
-
-  ISD::CondCode get() const { return Condition; }
-
-  static bool classof(const CondCodeSDNode *) { return true; }
-  static bool classof(const SDNode *N) {
-    return N->getOpcode() == ISD::CONDCODE;
-  }
-};
-  
-/// CvtRndSatSDNode - NOTE: avoid using this node as this may disappear in the
-/// future and most targets don't support it.
-class CvtRndSatSDNode : public SDNode {
-  ISD::CvtCode CvtCode;
-  friend class SelectionDAG;
-  explicit CvtRndSatSDNode(EVT VT, DebugLoc dl, const SDValue *Ops,
-                           unsigned NumOps, ISD::CvtCode Code)
-    : SDNode(ISD::CONVERT_RNDSAT, dl, getSDVTList(VT), Ops, NumOps),
-      CvtCode(Code) {
-    assert(NumOps == 5 && "wrong number of operations");
-  }
-public:
-  ISD::CvtCode getCvtCode() const { return CvtCode; }
-
-  static bool classof(const CvtRndSatSDNode *) { return true; }
-  static bool classof(const SDNode *N) {
-    return N->getOpcode() == ISD::CONVERT_RNDSAT;
-  }
-};
-
-namespace ISD {
-  struct ArgFlagsTy {
-  private:
-    static const uint64_t NoFlagSet      = 0ULL;
-    static const uint64_t ZExt           = 1ULL<<0;  ///< Zero extended
-    static const uint64_t ZExtOffs       = 0;
-    static const uint64_t SExt           = 1ULL<<1;  ///< Sign extended
-    static const uint64_t SExtOffs       = 1;
-    static const uint64_t InReg          = 1ULL<<2;  ///< Passed in register
-    static const uint64_t InRegOffs      = 2;
-    static const uint64_t SRet           = 1ULL<<3;  ///< Hidden struct-ret ptr
-    static const uint64_t SRetOffs       = 3;
-    static const uint64_t ByVal          = 1ULL<<4;  ///< Struct passed by value
-    static const uint64_t ByValOffs      = 4;
-    static const uint64_t Nest           = 1ULL<<5;  ///< Nested fn static chain
-    static const uint64_t NestOffs       = 5;
-    static const uint64_t ByValAlign     = 0xFULL << 6; //< Struct alignment
-    static const uint64_t ByValAlignOffs = 6;
-    static const uint64_t Split          = 1ULL << 10;
-    static const uint64_t SplitOffs      = 10;
-    static const uint64_t OrigAlign      = 0x1FULL<<27;
-    static const uint64_t OrigAlignOffs  = 27;
-    static const uint64_t ByValSize      = 0xffffffffULL << 32; //< Struct size
-    static const uint64_t ByValSizeOffs  = 32;
-
-    static const uint64_t One            = 1ULL; //< 1 of this type, for shifts
-
-    uint64_t Flags;
-  public:
-    ArgFlagsTy() : Flags(0) { }
-
-    bool isZExt()   const { return Flags & ZExt; }
-    void setZExt()  { Flags |= One << ZExtOffs; }
-
-    bool isSExt()   const { return Flags & SExt; }
-    void setSExt()  { Flags |= One << SExtOffs; }
-
-    bool isInReg()  const { return Flags & InReg; }
-    void setInReg() { Flags |= One << InRegOffs; }
-
-    bool isSRet()   const { return Flags & SRet; }
-    void setSRet()  { Flags |= One << SRetOffs; }
-
-    bool isByVal()  const { return Flags & ByVal; }
-    void setByVal() { Flags |= One << ByValOffs; }
-
-    bool isNest()   const { return Flags & Nest; }
-    void setNest()  { Flags |= One << NestOffs; }
-
-    unsigned getByValAlign() const {
-      return (unsigned)
-        ((One << ((Flags & ByValAlign) >> ByValAlignOffs)) / 2);
-    }
-    void setByValAlign(unsigned A) {
-      Flags = (Flags & ~ByValAlign) |
-        (uint64_t(Log2_32(A) + 1) << ByValAlignOffs);
-    }
-
-    bool isSplit()   const { return Flags & Split; }
-    void setSplit()  { Flags |= One << SplitOffs; }
-
-    unsigned getOrigAlign() const {
-      return (unsigned)
-        ((One << ((Flags & OrigAlign) >> OrigAlignOffs)) / 2);
-    }
-    void setOrigAlign(unsigned A) {
-      Flags = (Flags & ~OrigAlign) |
-        (uint64_t(Log2_32(A) + 1) << OrigAlignOffs);
-    }
-
-    unsigned getByValSize() const {
-      return (unsigned)((Flags & ByValSize) >> ByValSizeOffs);
-    }
-    void setByValSize(unsigned S) {
-      Flags = (Flags & ~ByValSize) | (uint64_t(S) << ByValSizeOffs);
-    }
-
-    /// getArgFlagsString - Returns the flags as a string, eg: "zext align:4".
-    std::string getArgFlagsString();
-
-    /// getRawBits - Represent the flags as a bunch of bits.
-    uint64_t getRawBits() const { return Flags; }
-  };
-
-  /// InputArg - This struct carries flags and type information about a
-  /// single incoming (formal) argument or incoming (from the perspective
-  /// of the caller) return value virtual register.
-  ///
-  struct InputArg {
-    ArgFlagsTy Flags;
-    EVT VT;
-    bool Used;
-
-    InputArg() : VT(MVT::Other), Used(false) {}
-    InputArg(ISD::ArgFlagsTy flags, EVT vt, bool used)
-      : Flags(flags), VT(vt), Used(used) {
-      assert(VT.isSimple() &&
-             "InputArg value type must be Simple!");
-    }
-  };
-
-  /// OutputArg - This struct carries flags and a value for a
-  /// single outgoing (actual) argument or outgoing (from the perspective
-  /// of the caller) return value virtual register.
-  ///
-  struct OutputArg {
-    ArgFlagsTy Flags;
-    SDValue Val;
-    bool IsFixed;
-
-    OutputArg() : IsFixed(false) {}
-    OutputArg(ISD::ArgFlagsTy flags, SDValue val, bool isfixed)
-      : Flags(flags), Val(val), IsFixed(isfixed) {
-      assert(Val.getValueType().isSimple() &&
-             "OutputArg value type must be Simple!");
-    }
-  };
-}
-
-/// VTSDNode - This class is used to represent EVT's, which are used
-/// to parameterize some operations.
-class VTSDNode : public SDNode {
-  EVT ValueType;
-  friend class SelectionDAG;
-  explicit VTSDNode(EVT VT)
-    : SDNode(ISD::VALUETYPE, DebugLoc(), getSDVTList(MVT::Other)),
-      ValueType(VT) {
-  }
-public:
-
-  EVT getVT() const { return ValueType; }
-
-  static bool classof(const VTSDNode *) { return true; }
-  static bool classof(const SDNode *N) {
-    return N->getOpcode() == ISD::VALUETYPE;
-  }
-};
-
-/// LSBaseSDNode - Base class for LoadSDNode and StoreSDNode
-///
-class LSBaseSDNode : public MemSDNode {
-  //! Operand array for load and store
-  /*!
-    \note Moving this array to the base class captures more
-    common functionality shared between LoadSDNode and
-    StoreSDNode
-   */
-  SDUse Ops[4];
-public:
-  LSBaseSDNode(ISD::NodeType NodeTy, DebugLoc dl, SDValue *Operands,
-               unsigned numOperands, SDVTList VTs, ISD::MemIndexedMode AM,
-               EVT MemVT, MachineMemOperand *MMO)
-    : MemSDNode(NodeTy, dl, VTs, MemVT, MMO) {
-    SubclassData |= AM << 2;
-    assert(getAddressingMode() == AM && "MemIndexedMode encoding error!");
-    InitOperands(Ops, Operands, numOperands);
-    assert((getOffset().getOpcode() == ISD::UNDEF || isIndexed()) &&
-           "Only indexed loads and stores have a non-undef offset operand");
-  }
-
-  const SDValue &getOffset() const {
-    return getOperand(getOpcode() == ISD::LOAD ? 2 : 3);
-  }
-
-  /// getAddressingMode - Return the addressing mode for this load or store:
-  /// unindexed, pre-inc, pre-dec, post-inc, or post-dec.
-  ISD::MemIndexedMode getAddressingMode() const {
-    return ISD::MemIndexedMode((SubclassData >> 2) & 7);
-  }
-
-  /// isIndexed - Return true if this is a pre/post inc/dec load/store.
-  bool isIndexed() const { return getAddressingMode() != ISD::UNINDEXED; }
-
-  /// isUnindexed - Return true if this is NOT a pre/post inc/dec load/store.
-  bool isUnindexed() const { return getAddressingMode() == ISD::UNINDEXED; }
-
-  static bool classof(const LSBaseSDNode *) { return true; }
-  static bool classof(const SDNode *N) {
-    return N->getOpcode() == ISD::LOAD ||
-           N->getOpcode() == ISD::STORE;
-  }
-};
-
-/// LoadSDNode - This class is used to represent ISD::LOAD nodes.
-///
-class LoadSDNode : public LSBaseSDNode {
-  friend class SelectionDAG;
-  LoadSDNode(SDValue *ChainPtrOff, DebugLoc dl, SDVTList VTs,
-             ISD::MemIndexedMode AM, ISD::LoadExtType ETy, EVT MemVT,
-             MachineMemOperand *MMO)
-    : LSBaseSDNode(ISD::LOAD, dl, ChainPtrOff, 3,
-                   VTs, AM, MemVT, MMO) {
-    SubclassData |= (unsigned short)ETy;
-    assert(getExtensionType() == ETy && "LoadExtType encoding error!");
-    assert(readMem() && "Load MachineMemOperand is not a load!");
-    assert(!writeMem() && "Load MachineMemOperand is a store!");
-  }
-public:
-
-  /// getExtensionType - Return whether this is a plain node,
-  /// or one of the varieties of value-extending loads.
-  ISD::LoadExtType getExtensionType() const {
-    return ISD::LoadExtType(SubclassData & 3);
-  }
-
-  const SDValue &getBasePtr() const { return getOperand(1); }
-  const SDValue &getOffset() const { return getOperand(2); }
-
-  static bool classof(const LoadSDNode *) { return true; }
-  static bool classof(const SDNode *N) {
-    return N->getOpcode() == ISD::LOAD;
-  }
-};
-
-/// StoreSDNode - This class is used to represent ISD::STORE nodes.
-///
-class StoreSDNode : public LSBaseSDNode {
-  friend class SelectionDAG;
-  StoreSDNode(SDValue *ChainValuePtrOff, DebugLoc dl, SDVTList VTs,
-              ISD::MemIndexedMode AM, bool isTrunc, EVT MemVT,
-              MachineMemOperand *MMO)
-    : LSBaseSDNode(ISD::STORE, dl, ChainValuePtrOff, 4,
-                   VTs, AM, MemVT, MMO) {
-    SubclassData |= (unsigned short)isTrunc;
-    assert(isTruncatingStore() == isTrunc && "isTrunc encoding error!");
-    assert(!readMem() && "Store MachineMemOperand is a load!");
-    assert(writeMem() && "Store MachineMemOperand is not a store!");
-  }
-public:
-
-  /// isTruncatingStore - Return true if the op does a truncation before store.
-  /// For integers this is the same as doing a TRUNCATE and storing the result.
-  /// For floats, it is the same as doing an FP_ROUND and storing the result.
-  bool isTruncatingStore() const { return SubclassData & 1; }
-
-  const SDValue &getValue() const { return getOperand(1); }
-  const SDValue &getBasePtr() const { return getOperand(2); }
-  const SDValue &getOffset() const { return getOperand(3); }
-
-  static bool classof(const StoreSDNode *) { return true; }
-  static bool classof(const SDNode *N) {
-    return N->getOpcode() == ISD::STORE;
-  }
-};
-
-/// MachineSDNode - An SDNode that represents everything that will be needed
-/// to construct a MachineInstr. These nodes are created during the
-/// instruction selection proper phase.
-///
-class MachineSDNode : public SDNode {
-public:
-  typedef MachineMemOperand **mmo_iterator;
-
-private:
-  friend class SelectionDAG;
-  MachineSDNode(unsigned Opc, const DebugLoc DL, SDVTList VTs)
-    : SDNode(Opc, DL, VTs), MemRefs(0), MemRefsEnd(0) {}
-
-  /// LocalOperands - Operands for this instruction, if they fit here. If
-  /// they don't, this field is unused.
-  SDUse LocalOperands[4];
-
-  /// MemRefs - Memory reference descriptions for this instruction.
-  mmo_iterator MemRefs;
-  mmo_iterator MemRefsEnd;
-
-public:
-  mmo_iterator memoperands_begin() const { return MemRefs; }
-  mmo_iterator memoperands_end() const { return MemRefsEnd; }
-  bool memoperands_empty() const { return MemRefsEnd == MemRefs; }
-
-  /// setMemRefs - Assign this MachineSDNodes's memory reference descriptor
-  /// list. This does not transfer ownership.
-  void setMemRefs(mmo_iterator NewMemRefs, mmo_iterator NewMemRefsEnd) {
-    MemRefs = NewMemRefs;
-    MemRefsEnd = NewMemRefsEnd;
-  }
-
-  static bool classof(const MachineSDNode *) { return true; }
-  static bool classof(const SDNode *N) {
-    return N->isMachineOpcode();
-  }
-};
-
-class SDNodeIterator : public std::iterator<std::forward_iterator_tag,
-                                            SDNode, ptrdiff_t> {
-  SDNode *Node;
-  unsigned Operand;
-
-  SDNodeIterator(SDNode *N, unsigned Op) : Node(N), Operand(Op) {}
-public:
-  bool operator==(const SDNodeIterator& x) const {
-    return Operand == x.Operand;
-  }
-  bool operator!=(const SDNodeIterator& x) const { return !operator==(x); }
-
-  const SDNodeIterator &operator=(const SDNodeIterator &I) {
-    assert(I.Node == Node && "Cannot assign iterators to two different nodes!");
-    Operand = I.Operand;
-    return *this;
-  }
-
-  pointer operator*() const {
-    return Node->getOperand(Operand).getNode();
-  }
-  pointer operator->() const { return operator*(); }
-
-  SDNodeIterator& operator++() {                // Preincrement
-    ++Operand;
-    return *this;
-  }
-  SDNodeIterator operator++(int) { // Postincrement
-    SDNodeIterator tmp = *this; ++*this; return tmp;
-  }
-  size_t operator-(SDNodeIterator Other) const {
-    assert(Node == Other.Node &&
-           "Cannot compare iterators of two different nodes!");
-    return Operand - Other.Operand;
-  }
-
-  static SDNodeIterator begin(SDNode *N) { return SDNodeIterator(N, 0); }
-  static SDNodeIterator end  (SDNode *N) {
-    return SDNodeIterator(N, N->getNumOperands());
-  }
-
-  unsigned getOperand() const { return Operand; }
-  const SDNode *getNode() const { return Node; }
-};
-
-template <> struct GraphTraits<SDNode*> {
-  typedef SDNode NodeType;
-  typedef SDNodeIterator ChildIteratorType;
-  static inline NodeType *getEntryNode(SDNode *N) { return N; }
-  static inline ChildIteratorType child_begin(NodeType *N) {
-    return SDNodeIterator::begin(N);
-  }
-  static inline ChildIteratorType child_end(NodeType *N) {
-    return SDNodeIterator::end(N);
-  }
-};
-
-/// LargestSDNode - The largest SDNode class.
-///
-typedef LoadSDNode LargestSDNode;
-
-/// MostAlignedSDNode - The SDNode class with the greatest alignment
-/// requirement.
-///
-typedef GlobalAddressSDNode MostAlignedSDNode;
-
-namespace ISD {
-  /// isNormalLoad - Returns true if the specified node is a non-extending
-  /// and unindexed load.
-  inline bool isNormalLoad(const SDNode *N) {
-    const LoadSDNode *Ld = dyn_cast<LoadSDNode>(N);
-    return Ld && Ld->getExtensionType() == ISD::NON_EXTLOAD &&
-      Ld->getAddressingMode() == ISD::UNINDEXED;
-  }
-
-  /// isNON_EXTLoad - Returns true if the specified node is a non-extending
-  /// load.
-  inline bool isNON_EXTLoad(const SDNode *N) {
-    return isa<LoadSDNode>(N) &&
-      cast<LoadSDNode>(N)->getExtensionType() == ISD::NON_EXTLOAD;
-  }
-
-  /// isEXTLoad - Returns true if the specified node is a EXTLOAD.
-  ///
-  inline bool isEXTLoad(const SDNode *N) {
-    return isa<LoadSDNode>(N) &&
-      cast<LoadSDNode>(N)->getExtensionType() == ISD::EXTLOAD;
-  }
-
-  /// isSEXTLoad - Returns true if the specified node is a SEXTLOAD.
-  ///
-  inline bool isSEXTLoad(const SDNode *N) {
-    return isa<LoadSDNode>(N) &&
-      cast<LoadSDNode>(N)->getExtensionType() == ISD::SEXTLOAD;
-  }
-
-  /// isZEXTLoad - Returns true if the specified node is a ZEXTLOAD.
-  ///
-  inline bool isZEXTLoad(const SDNode *N) {
-    return isa<LoadSDNode>(N) &&
-      cast<LoadSDNode>(N)->getExtensionType() == ISD::ZEXTLOAD;
-  }
-
-  /// isUNINDEXEDLoad - Returns true if the specified node is an unindexed load.
-  ///
-  inline bool isUNINDEXEDLoad(const SDNode *N) {
-    return isa<LoadSDNode>(N) &&
-      cast<LoadSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
-  }
-
-  /// isNormalStore - Returns true if the specified node is a non-truncating
-  /// and unindexed store.
-  inline bool isNormalStore(const SDNode *N) {
-    const StoreSDNode *St = dyn_cast<StoreSDNode>(N);
-    return St && !St->isTruncatingStore() &&
-      St->getAddressingMode() == ISD::UNINDEXED;
-  }
-
-  /// isNON_TRUNCStore - Returns true if the specified node is a non-truncating
-  /// store.
-  inline bool isNON_TRUNCStore(const SDNode *N) {
-    return isa<StoreSDNode>(N) && !cast<StoreSDNode>(N)->isTruncatingStore();
-  }
-
-  /// isTRUNCStore - Returns true if the specified node is a truncating
-  /// store.
-  inline bool isTRUNCStore(const SDNode *N) {
-    return isa<StoreSDNode>(N) && cast<StoreSDNode>(N)->isTruncatingStore();
-  }
-
-  /// isUNINDEXEDStore - Returns true if the specified node is an
-  /// unindexed store.
-  inline bool isUNINDEXEDStore(const SDNode *N) {
-    return isa<StoreSDNode>(N) &&
-      cast<StoreSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
-  }
-}
 
+} // end llvm::ISD namespace
 
 } // end llvm namespace
 

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=101268&r1=101267&r2=101268&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Wed Apr 14 13:44:34 2010
@@ -25,6 +25,7 @@
 #include "llvm/ADT/ilist_node.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/STLExtras.h"
+#include "llvm/CodeGen/ISDOpcodes.h"
 #include "llvm/CodeGen/ValueTypes.h"
 #include "llvm/CodeGen/MachineMemOperand.h"
 #include "llvm/Support/MathExtras.h"
@@ -56,579 +57,7 @@
   unsigned int NumVTs;
 };
 
-/// ISD namespace - This namespace contains an enum which represents all of the
-/// SelectionDAG node types and value types.
-///
 namespace ISD {
-
-  //===--------------------------------------------------------------------===//
-  /// ISD::NodeType enum - This enum defines the target-independent operators
-  /// for a SelectionDAG.
-  ///
-  /// Targets may also define target-dependent operator codes for SDNodes. For
-  /// example, on x86, these are the enum values in the X86ISD namespace.
-  /// Targets should aim to use target-independent operators to model their
-  /// instruction sets as much as possible, and only use target-dependent
-  /// operators when they have special requirements.
-  ///
-  /// Finally, during and after selection proper, SNodes may use special
-  /// operator codes that correspond directly with MachineInstr opcodes. These
-  /// are used to represent selected instructions. See the isMachineOpcode()
-  /// and getMachineOpcode() member functions of SDNode.
-  ///
-  enum NodeType {
-    // DELETED_NODE - This is an illegal value that is used to catch
-    // errors.  This opcode is not a legal opcode for any node.
-    DELETED_NODE,
-
-    // EntryToken - This is the marker used to indicate the start of the region.
-    EntryToken,
-
-    // TokenFactor - This node takes multiple tokens as input and produces a
-    // single token result.  This is used to represent the fact that the operand
-    // operators are independent of each other.
-    TokenFactor,
-
-    // AssertSext, AssertZext - These nodes record if a register contains a
-    // value that has already been zero or sign extended from a narrower type.
-    // These nodes take two operands.  The first is the node that has already
-    // been extended, and the second is a value type node indicating the width
-    // of the extension
-    AssertSext, AssertZext,
-
-    // Various leaf nodes.
-    BasicBlock, VALUETYPE, CONDCODE, Register,
-    Constant, ConstantFP,
-    GlobalAddress, GlobalTLSAddress, FrameIndex,
-    JumpTable, ConstantPool, ExternalSymbol, BlockAddress,
-
-    // The address of the GOT
-    GLOBAL_OFFSET_TABLE,
-
-    // FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and
-    // llvm.returnaddress on the DAG.  These nodes take one operand, the index
-    // of the frame or return address to return.  An index of zero corresponds
-    // to the current function's frame or return address, an index of one to the
-    // parent's frame or return address, and so on.
-    FRAMEADDR, RETURNADDR,
-
-    // FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to
-    // first (possible) on-stack argument. This is needed for correct stack
-    // adjustment during unwind.
-    FRAME_TO_ARGS_OFFSET,
-
-    // RESULT, OUTCHAIN = EXCEPTIONADDR(INCHAIN) - This node represents the
-    // address of the exception block on entry to an landing pad block.
-    EXCEPTIONADDR,
-
-    // RESULT, OUTCHAIN = LSDAADDR(INCHAIN) - This node represents the
-    // address of the Language Specific Data Area for the enclosing function.
-    LSDAADDR,
-
-    // RESULT, OUTCHAIN = EHSELECTION(INCHAIN, EXCEPTION) - This node represents
-    // the selection index of the exception thrown.
-    EHSELECTION,
-
-    // OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents
-    // 'eh_return' gcc dwarf builtin, which is used to return from
-    // exception. The general meaning is: adjust stack by OFFSET and pass
-    // execution to HANDLER. Many platform-related details also :)
-    EH_RETURN,
-
-    // TargetConstant* - Like Constant*, but the DAG does not do any folding or
-    // simplification of the constant.
-    TargetConstant,
-    TargetConstantFP,
-
-    // TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or
-    // anything else with this node, and this is valid in the target-specific
-    // dag, turning into a GlobalAddress operand.
-    TargetGlobalAddress,
-    TargetGlobalTLSAddress,
-    TargetFrameIndex,
-    TargetJumpTable,
-    TargetConstantPool,
-    TargetExternalSymbol,
-    TargetBlockAddress,
-
-    /// RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...)
-    /// This node represents a target intrinsic function with no side effects.
-    /// The first operand is the ID number of the intrinsic from the
-    /// llvm::Intrinsic namespace.  The operands to the intrinsic follow.  The
-    /// node has returns the result of the intrinsic.
-    INTRINSIC_WO_CHAIN,
-
-    /// RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...)
-    /// This node represents a target intrinsic function with side effects that
-    /// returns a result.  The first operand is a chain pointer.  The second is
-    /// the ID number of the intrinsic from the llvm::Intrinsic namespace.  The
-    /// operands to the intrinsic follow.  The node has two results, the result
-    /// of the intrinsic and an output chain.
-    INTRINSIC_W_CHAIN,
-
-    /// OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...)
-    /// This node represents a target intrinsic function with side effects that
-    /// does not return a result.  The first operand is a chain pointer.  The
-    /// second is the ID number of the intrinsic from the llvm::Intrinsic
-    /// namespace.  The operands to the intrinsic follow.
-    INTRINSIC_VOID,
-
-    // CopyToReg - This node has three operands: a chain, a register number to
-    // set to this value, and a value.
-    CopyToReg,
-
-    // CopyFromReg - This node indicates that the input value is a virtual or
-    // physical register that is defined outside of the scope of this
-    // SelectionDAG.  The register is available from the RegisterSDNode object.
-    CopyFromReg,
-
-    // UNDEF - An undefined node
-    UNDEF,
-
-    // EXTRACT_ELEMENT - This is used to get the lower or upper (determined by
-    // a Constant, which is required to be operand #1) half of the integer or
-    // float value specified as operand #0.  This is only for use before
-    // legalization, for values that will be broken into multiple registers.
-    EXTRACT_ELEMENT,
-
-    // BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways.  Given
-    // two values of the same integer value type, this produces a value twice as
-    // big.  Like EXTRACT_ELEMENT, this can only be used before legalization.
-    BUILD_PAIR,
-
-    // MERGE_VALUES - This node takes multiple discrete operands and returns
-    // them all as its individual results.  This nodes has exactly the same
-    // number of inputs and outputs. This node is useful for some pieces of the
-    // code generator that want to think about a single node with multiple
-    // results, not multiple nodes.
-    MERGE_VALUES,
-
-    // Simple integer binary arithmetic operators.
-    ADD, SUB, MUL, SDIV, UDIV, SREM, UREM,
-
-    // SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing
-    // a signed/unsigned value of type i[2*N], and return the full value as
-    // two results, each of type iN.
-    SMUL_LOHI, UMUL_LOHI,
-
-    // SDIVREM/UDIVREM - Divide two integers and produce both a quotient and
-    // remainder result.
-    SDIVREM, UDIVREM,
-
-    // CARRY_FALSE - This node is used when folding other nodes,
-    // like ADDC/SUBC, which indicate the carry result is always false.
-    CARRY_FALSE,
-
-    // Carry-setting nodes for multiple precision addition and subtraction.
-    // These nodes take two operands of the same value type, and produce two
-    // results.  The first result is the normal add or sub result, the second
-    // result is the carry flag result.
-    ADDC, SUBC,
-
-    // Carry-using nodes for multiple precision addition and subtraction.  These
-    // nodes take three operands: The first two are the normal lhs and rhs to
-    // the add or sub, and the third is the input carry flag.  These nodes
-    // produce two results; the normal result of the add or sub, and the output
-    // carry flag.  These nodes both read and write a carry flag to allow them
-    // to them to be chained together for add and sub of arbitrarily large
-    // values.
-    ADDE, SUBE,
-
-    // RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
-    // These nodes take two operands: the normal LHS and RHS to the add. They
-    // produce two results: the normal result of the add, and a boolean that
-    // indicates if an overflow occured (*not* a flag, because it may be stored
-    // to memory, etc.).  If the type of the boolean is not i1 then the high
-    // bits conform to getBooleanContents.
-    // These nodes are generated from the llvm.[su]add.with.overflow intrinsics.
-    SADDO, UADDO,
-
-    // Same for subtraction
-    SSUBO, USUBO,
-
-    // Same for multiplication
-    SMULO, UMULO,
-
-    // Simple binary floating point operators.
-    FADD, FSUB, FMUL, FDIV, FREM,
-
-    // FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.  NOTE: This
-    // DAG node does not require that X and Y have the same type, just that they
-    // are both floating point.  X and the result must have the same type.
-    // FCOPYSIGN(f32, f64) is allowed.
-    FCOPYSIGN,
-
-    // INT = FGETSIGN(FP) - Return the sign bit of the specified floating point
-    // value as an integer 0/1 value.
-    FGETSIGN,
-
-    /// BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a vector with the
-    /// specified, possibly variable, elements.  The number of elements is
-    /// required to be a power of two.  The types of the operands must all be
-    /// the same and must match the vector element type, except that integer
-    /// types are allowed to be larger than the element type, in which case
-    /// the operands are implicitly truncated.
-    BUILD_VECTOR,
-
-    /// INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element
-    /// at IDX replaced with VAL.  If the type of VAL is larger than the vector
-    /// element type then VAL is truncated before replacement.
-    INSERT_VECTOR_ELT,
-
-    /// EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR
-    /// identified by the (potentially variable) element number IDX.  If the
-    /// return type is an integer type larger than the element type of the
-    /// vector, the result is extended to the width of the return type.
-    EXTRACT_VECTOR_ELT,
-
-    /// CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of
-    /// vector type with the same length and element type, this produces a
-    /// concatenated vector result value, with length equal to the sum of the
-    /// lengths of the input vectors.
-    CONCAT_VECTORS,
-
-    /// EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR (an
-    /// vector value) starting with the (potentially variable) element number
-    /// IDX, which must be a multiple of the result vector length.
-    EXTRACT_SUBVECTOR,
-
-    /// VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as 
-    /// VEC1/VEC2.  A VECTOR_SHUFFLE node also contains an array of constant int
-    /// values that indicate which value (or undef) each result element will
-    /// get.  These constant ints are accessible through the 
-    /// ShuffleVectorSDNode class.  This is quite similar to the Altivec 
-    /// 'vperm' instruction, except that the indices must be constants and are
-    /// in terms of the element size of VEC1/VEC2, not in terms of bytes.
-    VECTOR_SHUFFLE,
-
-    /// SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a
-    /// scalar value into element 0 of the resultant vector type.  The top
-    /// elements 1 to N-1 of the N-element vector are undefined.  The type
-    /// of the operand must match the vector element type, except when they
-    /// are integer types.  In this case the operand is allowed to be wider
-    /// than the vector element type, and is implicitly truncated to it.
-    SCALAR_TO_VECTOR,
-
-    // MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing
-    // an unsigned/signed value of type i[2*N], then return the top part.
-    MULHU, MULHS,
-
-    // Bitwise operators - logical and, logical or, logical xor, shift left,
-    // shift right algebraic (shift in sign bits), shift right logical (shift in
-    // zeroes), rotate left, rotate right, and byteswap.
-    AND, OR, XOR, SHL, SRA, SRL, ROTL, ROTR, BSWAP,
-
-    // Counting operators
-    CTTZ, CTLZ, CTPOP,
-
-    // Select(COND, TRUEVAL, FALSEVAL).  If the type of the boolean COND is not
-    // i1 then the high bits must conform to getBooleanContents.
-    SELECT,
-
-    // Select with condition operator - This selects between a true value and
-    // a false value (ops #2 and #3) based on the boolean result of comparing
-    // the lhs and rhs (ops #0 and #1) of a conditional expression with the
-    // condition code in op #4, a CondCodeSDNode.
-    SELECT_CC,
-
-    // SetCC operator - This evaluates to a true value iff the condition is
-    // true.  If the result value type is not i1 then the high bits conform
-    // to getBooleanContents.  The operands to this are the left and right
-    // operands to compare (ops #0, and #1) and the condition code to compare
-    // them with (op #2) as a CondCodeSDNode.
-    SETCC,
-
-    // RESULT = VSETCC(LHS, RHS, COND) operator - This evaluates to a vector of
-    // integer elements with all bits of the result elements set to true if the
-    // comparison is true or all cleared if the comparison is false.  The
-    // operands to this are the left and right operands to compare (LHS/RHS) and
-    // the condition code to compare them with (COND) as a CondCodeSDNode.
-    VSETCC,
-
-    // SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded
-    // integer shift operations, just like ADD/SUB_PARTS.  The operation
-    // ordering is:
-    //       [Lo,Hi] = op [LoLHS,HiLHS], Amt
-    SHL_PARTS, SRA_PARTS, SRL_PARTS,
-
-    // Conversion operators.  These are all single input single output
-    // operations.  For all of these, the result type must be strictly
-    // wider or narrower (depending on the operation) than the source
-    // type.
-
-    // SIGN_EXTEND - Used for integer types, replicating the sign bit
-    // into new bits.
-    SIGN_EXTEND,
-
-    // ZERO_EXTEND - Used for integer types, zeroing the new bits.
-    ZERO_EXTEND,
-
-    // ANY_EXTEND - Used for integer types.  The high bits are undefined.
-    ANY_EXTEND,
-
-    // TRUNCATE - Completely drop the high bits.
-    TRUNCATE,
-
-    // [SU]INT_TO_FP - These operators convert integers (whose interpreted sign
-    // depends on the first letter) to floating point.
-    SINT_TO_FP,
-    UINT_TO_FP,
-
-    // SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to
-    // sign extend a small value in a large integer register (e.g. sign
-    // extending the low 8 bits of a 32-bit register to fill the top 24 bits
-    // with the 7th bit).  The size of the smaller type is indicated by the 1th
-    // operand, a ValueType node.
-    SIGN_EXTEND_INREG,
-
-    /// FP_TO_[US]INT - Convert a floating point value to a signed or unsigned
-    /// integer.
-    FP_TO_SINT,
-    FP_TO_UINT,
-
-    /// X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type
-    /// down to the precision of the destination VT.  TRUNC is a flag, which is
-    /// always an integer that is zero or one.  If TRUNC is 0, this is a
-    /// normal rounding, if it is 1, this FP_ROUND is known to not change the
-    /// value of Y.
-    ///
-    /// The TRUNC = 1 case is used in cases where we know that the value will
-    /// not be modified by the node, because Y is not using any of the extra
-    /// precision of source type.  This allows certain transformations like
-    /// FP_EXTEND(FP_ROUND(X,1)) -> X which are not safe for
-    /// FP_EXTEND(FP_ROUND(X,0)) because the extra bits aren't removed.
-    FP_ROUND,
-
-    // FLT_ROUNDS_ - Returns current rounding mode:
-    // -1 Undefined
-    //  0 Round to 0
-    //  1 Round to nearest
-    //  2 Round to +inf
-    //  3 Round to -inf
-    FLT_ROUNDS_,
-
-    /// X = FP_ROUND_INREG(Y, VT) - This operator takes an FP register, and
-    /// rounds it to a floating point value.  It then promotes it and returns it
-    /// in a register of the same size.  This operation effectively just
-    /// discards excess precision.  The type to round down to is specified by
-    /// the VT operand, a VTSDNode.
-    FP_ROUND_INREG,
-
-    /// X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
-    FP_EXTEND,
-
-    // BIT_CONVERT - This operator converts between integer, vector and FP
-    // values, as if the value was stored to memory with one type and loaded
-    // from the same address with the other type (or equivalently for vector
-    // format conversions, etc).  The source and result are required to have
-    // the same bit size (e.g.  f32 <-> i32).  This can also be used for
-    // int-to-int or fp-to-fp conversions, but that is a noop, deleted by
-    // getNode().
-    BIT_CONVERT,
-
-    // CONVERT_RNDSAT - This operator is used to support various conversions
-    // between various types (float, signed, unsigned and vectors of those
-    // types) with rounding and saturation. NOTE: Avoid using this operator as
-    // most target don't support it and the operator might be removed in the
-    // future. It takes the following arguments:
-    //   0) value
-    //   1) dest type (type to convert to)
-    //   2) src type (type to convert from)
-    //   3) rounding imm
-    //   4) saturation imm
-    //   5) ISD::CvtCode indicating the type of conversion to do
-    CONVERT_RNDSAT,
-
-    // FP16_TO_FP32, FP32_TO_FP16 - These operators are used to perform
-    // promotions and truncation for half-precision (16 bit) floating
-    // numbers. We need special nodes since FP16 is a storage-only type with
-    // special semantics of operations.
-    FP16_TO_FP32, FP32_TO_FP16,
-
-    // FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,
-    // FLOG, FLOG2, FLOG10, FEXP, FEXP2,
-    // FCEIL, FTRUNC, FRINT, FNEARBYINT, FFLOOR - Perform various unary floating
-    // point operations. These are inspired by libm.
-    FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,
-    FLOG, FLOG2, FLOG10, FEXP, FEXP2,
-    FCEIL, FTRUNC, FRINT, FNEARBYINT, FFLOOR,
-
-    // LOAD and STORE have token chains as their first operand, then the same
-    // operands as an LLVM load/store instruction, then an offset node that
-    // is added / subtracted from the base pointer to form the address (for
-    // indexed memory ops).
-    LOAD, STORE,
-
-    // DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned
-    // to a specified boundary.  This node always has two return values: a new
-    // stack pointer value and a chain. The first operand is the token chain,
-    // the second is the number of bytes to allocate, and the third is the
-    // alignment boundary.  The size is guaranteed to be a multiple of the stack
-    // alignment, and the alignment is guaranteed to be bigger than the stack
-    // alignment (if required) or 0 to get standard stack alignment.
-    DYNAMIC_STACKALLOC,
-
-    // Control flow instructions.  These all have token chains.
-
-    // BR - Unconditional branch.  The first operand is the chain
-    // operand, the second is the MBB to branch to.
-    BR,
-
-    // BRIND - Indirect branch.  The first operand is the chain, the second
-    // is the value to branch to, which must be of the same type as the target's
-    // pointer type.
-    BRIND,
-
-    // BR_JT - Jumptable branch. The first operand is the chain, the second
-    // is the jumptable index, the last one is the jumptable entry index.
-    BR_JT,
-
-    // BRCOND - Conditional branch.  The first operand is the chain, the
-    // second is the condition, the third is the block to branch to if the
-    // condition is true.  If the type of the condition is not i1, then the
-    // high bits must conform to getBooleanContents.
-    BRCOND,
-
-    // BR_CC - Conditional branch.  The behavior is like that of SELECT_CC, in
-    // that the condition is represented as condition code, and two nodes to
-    // compare, rather than as a combined SetCC node.  The operands in order are
-    // chain, cc, lhs, rhs, block to branch to if condition is true.
-    BR_CC,
-
-    // INLINEASM - Represents an inline asm block.  This node always has two
-    // return values: a chain and a flag result.  The inputs are as follows:
-    //   Operand #0   : Input chain.
-    //   Operand #1   : a ExternalSymbolSDNode with a pointer to the asm string.
-    //   Operand #2   : a MDNodeSDNode with the !srcloc metadata.
-    //   After this, it is followed by a list of operands with this format:
-    //     ConstantSDNode: Flags that encode whether it is a mem or not, the
-    //                     of operands that follow, etc.  See InlineAsm.h.
-    //     ... however many operands ...
-    //   Operand #last: Optional, an incoming flag.
-    //
-    // The variable width operands are required to represent target addressing
-    // modes as a single "operand", even though they may have multiple
-    // SDOperands.
-    INLINEASM,
-
-    // EH_LABEL - Represents a label in mid basic block used to track
-    // locations needed for debug and exception handling tables.  These nodes
-    // take a chain as input and return a chain.
-    EH_LABEL,
-
-    // STACKSAVE - STACKSAVE has one operand, an input chain.  It produces a
-    // value, the same type as the pointer type for the system, and an output
-    // chain.
-    STACKSAVE,
-
-    // STACKRESTORE has two operands, an input chain and a pointer to restore to
-    // it returns an output chain.
-    STACKRESTORE,
-
-    // CALLSEQ_START/CALLSEQ_END - These operators mark the beginning and end of
-    // a call sequence, and carry arbitrary information that target might want
-    // to know.  The first operand is a chain, the rest are specified by the
-    // target and not touched by the DAG optimizers.
-    // CALLSEQ_START..CALLSEQ_END pairs may not be nested.
-    CALLSEQ_START,  // Beginning of a call sequence
-    CALLSEQ_END,    // End of a call sequence
-
-    // VAARG - VAARG has three operands: an input chain, a pointer, and a
-    // SRCVALUE.  It returns a pair of values: the vaarg value and a new chain.
-    VAARG,
-
-    // VACOPY - VACOPY has five operands: an input chain, a destination pointer,
-    // a source pointer, a SRCVALUE for the destination, and a SRCVALUE for the
-    // source.
-    VACOPY,
-
-    // VAEND, VASTART - VAEND and VASTART have three operands: an input chain, a
-    // pointer, and a SRCVALUE.
-    VAEND, VASTART,
-
-    // SRCVALUE - This is a node type that holds a Value* that is used to
-    // make reference to a value in the LLVM IR.
-    SRCVALUE,
-    
-    // MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to
-    // reference metadata in the IR.
-    MDNODE_SDNODE,
-
-    // PCMARKER - This corresponds to the pcmarker intrinsic.
-    PCMARKER,
-
-    // READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic.
-    // The only operand is a chain and a value and a chain are produced.  The
-    // value is the contents of the architecture specific cycle counter like
-    // register (or other high accuracy low latency clock source)
-    READCYCLECOUNTER,
-
-    // HANDLENODE node - Used as a handle for various purposes.
-    HANDLENODE,
-
-    // TRAMPOLINE - This corresponds to the init_trampoline intrinsic.
-    // It takes as input a token chain, the pointer to the trampoline,
-    // the pointer to the nested function, the pointer to pass for the
-    // 'nest' parameter, a SRCVALUE for the trampoline and another for
-    // the nested function (allowing targets to access the original
-    // Function*).  It produces the result of the intrinsic and a token
-    // chain as output.
-    TRAMPOLINE,
-
-    // TRAP - Trapping instruction
-    TRAP,
-
-    // PREFETCH - This corresponds to a prefetch intrinsic. It takes chains are
-    // their first operand. The other operands are the address to prefetch,
-    // read / write specifier, and locality specifier.
-    PREFETCH,
-
-    // OUTCHAIN = MEMBARRIER(INCHAIN, load-load, load-store, store-load,
-    //                       store-store, device)
-    // This corresponds to the memory.barrier intrinsic.
-    // it takes an input chain, 4 operands to specify the type of barrier, an
-    // operand specifying if the barrier applies to device and uncached memory
-    // and produces an output chain.
-    MEMBARRIER,
-
-    // Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap)
-    // this corresponds to the atomic.lcs intrinsic.
-    // cmp is compared to *ptr, and if equal, swap is stored in *ptr.
-    // the return is always the original value in *ptr
-    ATOMIC_CMP_SWAP,
-
-    // Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt)
-    // this corresponds to the atomic.swap intrinsic.
-    // amt is stored to *ptr atomically.
-    // the return is always the original value in *ptr
-    ATOMIC_SWAP,
-
-    // Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt)
-    // this corresponds to the atomic.load.[OpName] intrinsic.
-    // op(*ptr, amt) is stored to *ptr atomically.
-    // the return is always the original value in *ptr
-    ATOMIC_LOAD_ADD,
-    ATOMIC_LOAD_SUB,
-    ATOMIC_LOAD_AND,
-    ATOMIC_LOAD_OR,
-    ATOMIC_LOAD_XOR,
-    ATOMIC_LOAD_NAND,
-    ATOMIC_LOAD_MIN,
-    ATOMIC_LOAD_MAX,
-    ATOMIC_LOAD_UMIN,
-    ATOMIC_LOAD_UMAX,
-
-    /// BUILTIN_OP_END - This must be the last enum value in this list.
-    /// The target-specific pre-isel opcode values start here.
-    BUILTIN_OP_END
-  };
-
-  /// FIRST_TARGET_MEMORY_OPCODE - Target-specific pre-isel operations
-  /// which do not reference a specific memory location should be less than
-  /// this value. Those that do must not be less than this value, and can
-  /// be used with SelectionDAG::getMemIntrinsicNode.
-  static const int FIRST_TARGET_MEMORY_OPCODE = BUILTIN_OP_END+100;
-
   /// Node predicates
 
   /// isBuildVectorAllOnes - Return true if the specified node is a
@@ -643,174 +72,7 @@
   /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
   /// element is not an undef.
   bool isScalarToVector(const SDNode *N);
-
-  //===--------------------------------------------------------------------===//
-  /// MemIndexedMode enum - This enum defines the load / store indexed
-  /// addressing modes.
-  ///
-  /// UNINDEXED    "Normal" load / store. The effective address is already
-  ///              computed and is available in the base pointer. The offset
-  ///              operand is always undefined. In addition to producing a
-  ///              chain, an unindexed load produces one value (result of the
-  ///              load); an unindexed store does not produce a value.
-  ///
-  /// PRE_INC      Similar to the unindexed mode where the effective address is
-  /// PRE_DEC      the value of the base pointer add / subtract the offset.
-  ///              It considers the computation as being folded into the load /
-  ///              store operation (i.e. the load / store does the address
-  ///              computation as well as performing the memory transaction).
-  ///              The base operand is always undefined. In addition to
-  ///              producing a chain, pre-indexed load produces two values
-  ///              (result of the load and the result of the address
-  ///              computation); a pre-indexed store produces one value (result
-  ///              of the address computation).
-  ///
-  /// POST_INC     The effective address is the value of the base pointer. The
-  /// POST_DEC     value of the offset operand is then added to / subtracted
-  ///              from the base after memory transaction. In addition to
-  ///              producing a chain, post-indexed load produces two values
-  ///              (the result of the load and the result of the base +/- offset
-  ///              computation); a post-indexed store produces one value (the
-  ///              the result of the base +/- offset computation).
-  ///
-  enum MemIndexedMode {
-    UNINDEXED = 0,
-    PRE_INC,
-    PRE_DEC,
-    POST_INC,
-    POST_DEC,
-    LAST_INDEXED_MODE
-  };
-
-  //===--------------------------------------------------------------------===//
-  /// LoadExtType enum - This enum defines the three variants of LOADEXT
-  /// (load with extension).
-  ///
-  /// SEXTLOAD loads the integer operand and sign extends it to a larger
-  ///          integer result type.
-  /// ZEXTLOAD loads the integer operand and zero extends it to a larger
-  ///          integer result type.
-  /// EXTLOAD  is used for three things: floating point extending loads,
-  ///          integer extending loads [the top bits are undefined], and vector
-  ///          extending loads [load into low elt].
-  ///
-  enum LoadExtType {
-    NON_EXTLOAD = 0,
-    EXTLOAD,
-    SEXTLOAD,
-    ZEXTLOAD,
-    LAST_LOADEXT_TYPE
-  };
-
-  //===--------------------------------------------------------------------===//
-  /// ISD::CondCode enum - These are ordered carefully to make the bitfields
-  /// below work out, when considering SETFALSE (something that never exists
-  /// dynamically) as 0.  "U" -> Unsigned (for integer operands) or Unordered
-  /// (for floating point), "L" -> Less than, "G" -> Greater than, "E" -> Equal
-  /// to.  If the "N" column is 1, the result of the comparison is undefined if
-  /// the input is a NAN.
-  ///
-  /// All of these (except for the 'always folded ops') should be handled for
-  /// floating point.  For integer, only the SETEQ,SETNE,SETLT,SETLE,SETGT,
-  /// SETGE,SETULT,SETULE,SETUGT, and SETUGE opcodes are used.
-  ///
-  /// Note that these are laid out in a specific order to allow bit-twiddling
-  /// to transform conditions.
-  enum CondCode {
-    // Opcode          N U L G E       Intuitive operation
-    SETFALSE,      //    0 0 0 0       Always false (always folded)
-    SETOEQ,        //    0 0 0 1       True if ordered and equal
-    SETOGT,        //    0 0 1 0       True if ordered and greater than
-    SETOGE,        //    0 0 1 1       True if ordered and greater than or equal
-    SETOLT,        //    0 1 0 0       True if ordered and less than
-    SETOLE,        //    0 1 0 1       True if ordered and less than or equal
-    SETONE,        //    0 1 1 0       True if ordered and operands are unequal
-    SETO,          //    0 1 1 1       True if ordered (no nans)
-    SETUO,         //    1 0 0 0       True if unordered: isnan(X) | isnan(Y)
-    SETUEQ,        //    1 0 0 1       True if unordered or equal
-    SETUGT,        //    1 0 1 0       True if unordered or greater than
-    SETUGE,        //    1 0 1 1       True if unordered, greater than, or equal
-    SETULT,        //    1 1 0 0       True if unordered or less than
-    SETULE,        //    1 1 0 1       True if unordered, less than, or equal
-    SETUNE,        //    1 1 1 0       True if unordered or not equal
-    SETTRUE,       //    1 1 1 1       Always true (always folded)
-    // Don't care operations: undefined if the input is a nan.
-    SETFALSE2,     //  1 X 0 0 0       Always false (always folded)
-    SETEQ,         //  1 X 0 0 1       True if equal
-    SETGT,         //  1 X 0 1 0       True if greater than
-    SETGE,         //  1 X 0 1 1       True if greater than or equal
-    SETLT,         //  1 X 1 0 0       True if less than
-    SETLE,         //  1 X 1 0 1       True if less than or equal
-    SETNE,         //  1 X 1 1 0       True if not equal
-    SETTRUE2,      //  1 X 1 1 1       Always true (always folded)
-
-    SETCC_INVALID       // Marker value.
-  };
-
-  /// isSignedIntSetCC - Return true if this is a setcc instruction that
-  /// performs a signed comparison when used with integer operands.
-  inline bool isSignedIntSetCC(CondCode Code) {
-    return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE;
-  }
-
-  /// isUnsignedIntSetCC - Return true if this is a setcc instruction that
-  /// performs an unsigned comparison when used with integer operands.
-  inline bool isUnsignedIntSetCC(CondCode Code) {
-    return Code == SETUGT || Code == SETUGE || Code == SETULT || Code == SETULE;
-  }
-
-  /// isTrueWhenEqual - Return true if the specified condition returns true if
-  /// the two operands to the condition are equal.  Note that if one of the two
-  /// operands is a NaN, this value is meaningless.
-  inline bool isTrueWhenEqual(CondCode Cond) {
-    return ((int)Cond & 1) != 0;
-  }
-
-  /// getUnorderedFlavor - This function returns 0 if the condition is always
-  /// false if an operand is a NaN, 1 if the condition is always true if the
-  /// operand is a NaN, and 2 if the condition is undefined if the operand is a
-  /// NaN.
-  inline unsigned getUnorderedFlavor(CondCode Cond) {
-    return ((int)Cond >> 3) & 3;
-  }
-
-  /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
-  /// 'op' is a valid SetCC operation.
-  CondCode getSetCCInverse(CondCode Operation, bool isInteger);
-
-  /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
-  /// when given the operation for (X op Y).
-  CondCode getSetCCSwappedOperands(CondCode Operation);
-
-  /// getSetCCOrOperation - Return the result of a logical OR between different
-  /// comparisons of identical values: ((X op1 Y) | (X op2 Y)).  This
-  /// function returns SETCC_INVALID if it is not possible to represent the
-  /// resultant comparison.
-  CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, bool isInteger);
-
-  /// getSetCCAndOperation - Return the result of a logical AND between
-  /// different comparisons of identical values: ((X op1 Y) & (X op2 Y)).  This
-  /// function returns SETCC_INVALID if it is not possible to represent the
-  /// resultant comparison.
-  CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, bool isInteger);
-
-  //===--------------------------------------------------------------------===//
-  /// CvtCode enum - This enum defines the various converts CONVERT_RNDSAT
-  /// supports.
-  enum CvtCode {
-    CVT_FF,     // Float from Float
-    CVT_FS,     // Float from Signed
-    CVT_FU,     // Float from Unsigned
-    CVT_SF,     // Signed from Float
-    CVT_UF,     // Unsigned from Float
-    CVT_SS,     // Signed from Signed
-    CVT_SU,     // Signed from Unsigned
-    CVT_US,     // Unsigned from Signed
-    CVT_UU,     // Unsigned from Unsigned
-    CVT_INVALID // Marker - Invalid opcode
-  };
-}  // end llvm::ISD namespace
-
+}  // end llvm:ISD namespace
 
 //===----------------------------------------------------------------------===//
 /// SDValue - Unlike LLVM values, Selection DAG nodes may return multiple
@@ -2614,7 +1876,6 @@
   }
 }
 
-
 } // end llvm namespace
 
 #endif




From gohman at apple.com  Wed Apr 14 13:49:18 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 18:49:18 -0000
Subject: [llvm-commits] [llvm] r101269 - in /llvm/trunk:
 include/llvm/CodeGen/FastISel.h
 lib/CodeGen/SelectionDAG/FunctionLoweringInfo.h
Message-ID: <20100414184918.11DF22A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 13:49:17 2010
New Revision: 101269

URL: http://llvm.org/viewvc/llvm-project?rev=101269&view=rev
Log:
Refine #includes.

Modified:
    llvm/trunk/include/llvm/CodeGen/FastISel.h
    llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.h

Modified: llvm/trunk/include/llvm/CodeGen/FastISel.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/FastISel.h?rev=101269&r1=101268&r2=101269&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/FastISel.h (original)
+++ llvm/trunk/include/llvm/CodeGen/FastISel.h Wed Apr 14 13:49:17 2010
@@ -15,8 +15,9 @@
 #define LLVM_CODEGEN_FASTISEL_H
 
 #include "llvm/ADT/DenseMap.h"
+#ifndef NDEBUG
 #include "llvm/ADT/SmallSet.h"
-#include "llvm/CodeGen/SelectionDAGNodes.h"
+#endif
 
 namespace llvm {
 

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.h?rev=101269&r1=101268&r2=101269&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.h (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.h Wed Apr 14 13:49:17 2010
@@ -23,7 +23,7 @@
 #include "llvm/ADT/SmallSet.h"
 #endif
 #include "llvm/CodeGen/ValueTypes.h"
-#include "llvm/CodeGen/SelectionDAGNodes.h"
+#include "llvm/CodeGen/ISDOpcodes.h"
 #include <vector>
 
 namespace llvm {




From gohman at apple.com  Wed Apr 14 13:57:18 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 18:57:18 -0000
Subject: [llvm-commits] [llvm] r101270 -
	/llvm/trunk/include/llvm/CodeGen/FastISel.h
Message-ID: <20100414185718.426DC2A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 13:57:18 2010
New Revision: 101270

URL: http://llvm.org/viewvc/llvm-project?rev=101270&view=rev
Log:
Fix a missing #include.

Modified:
    llvm/trunk/include/llvm/CodeGen/FastISel.h

Modified: llvm/trunk/include/llvm/CodeGen/FastISel.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/FastISel.h?rev=101270&r1=101269&r2=101270&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/FastISel.h (original)
+++ llvm/trunk/include/llvm/CodeGen/FastISel.h Wed Apr 14 13:57:18 2010
@@ -18,6 +18,7 @@
 #ifndef NDEBUG
 #include "llvm/ADT/SmallSet.h"
 #endif
+#include "llvm/CodeGen/ValueTypes.h"
 
 namespace llvm {
 




From baldrick at free.fr  Wed Apr 14 14:00:08 2010
From: baldrick at free.fr (Duncan Sands)
Date: Wed, 14 Apr 2010 19:00:08 -0000
Subject: [llvm-commits] [dragonegg] r101271 -
	/dragonegg/trunk/gcc_revision_tested_with
Message-ID: <20100414190008.70D412A6C12C@llvm.org>

Author: baldrick
Date: Wed Apr 14 14:00:08 2010
New Revision: 101271

URL: http://llvm.org/viewvc/llvm-project?rev=101271&view=rev
Log:
New tested gcc revision.

Modified:
    dragonegg/trunk/gcc_revision_tested_with

Modified: dragonegg/trunk/gcc_revision_tested_with
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/gcc_revision_tested_with?rev=101271&r1=101270&r2=101271&view=diff
==============================================================================
--- dragonegg/trunk/gcc_revision_tested_with (original)
+++ dragonegg/trunk/gcc_revision_tested_with Wed Apr 14 14:00:08 2010
@@ -1 +1 @@
-158181
+158344




From gohman at apple.com  Wed Apr 14 14:30:02 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 19:30:02 -0000
Subject: [llvm-commits] [llvm] r101272 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Message-ID: <20100414193002.8CBFB2A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 14:30:02 2010
New Revision: 101272

URL: http://llvm.org/viewvc/llvm-project?rev=101272&view=rev
Log:
Reset the debug location even if the instruction was a terminator.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=101272&r1=101271&r2=101272&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Wed Apr 14 14:30:02 2010
@@ -260,13 +260,11 @@
   for (BasicBlock::iterator I = Begin; I != End && !SDB->HasTailCall; ++I) {
     SetDebugLoc(I, SDB, 0, MF);
 
-    if (!isa<TerminatorInst>(I)) {
+    // Visit the instruction. Terminators are handled below.
+    if (!isa<TerminatorInst>(I))
       SDB->visit(*I);
 
-      // Set the current debug location back to "unknown" so that it doesn't
-      // spuriously apply to subsequent instructions.
-      ResetDebugLoc(SDB, 0);
-    }
+    ResetDebugLoc(SDB, 0);
   }
 
   if (!SDB->HasTailCall) {




From gohman at apple.com  Wed Apr 14 14:53:32 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 19:53:32 -0000
Subject: [llvm-commits] [llvm] r101273 - in /llvm/trunk:
 include/llvm/CodeGen/FastISel.h include/llvm/CodeGen/SelectionDAGISel.h
 include/llvm/Target/TargetLowering.h lib/CodeGen/SelectionDAG/FastISel.cpp
 lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
 lib/CodeGen/SelectionDAG/FunctionLoweringInfo.h
 lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
 lib/Target/X86/X86FastISel.cpp lib/Target/X86/X86ISelLowering.cpp
 lib/Target/X86/X86ISelLowering.h
Message-ID: <20100414195332.5136C2A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 14:53:31 2010
New Revision: 101273

URL: http://llvm.org/viewvc/llvm-project?rev=101273&view=rev
Log:
Factor out EH landing pad code into a separate function, and constify
a bunch of stuff to support it.

Modified:
    llvm/trunk/include/llvm/CodeGen/FastISel.h
    llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
    llvm/trunk/include/llvm/Target/TargetLowering.h
    llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.h
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
    llvm/trunk/lib/Target/X86/X86FastISel.cpp
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/lib/Target/X86/X86ISelLowering.h

Modified: llvm/trunk/include/llvm/CodeGen/FastISel.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/FastISel.h?rev=101273&r1=101272&r2=101273&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/FastISel.h (original)
+++ llvm/trunk/include/llvm/CodeGen/FastISel.h Wed Apr 14 14:53:31 2010
@@ -47,7 +47,7 @@
   DenseMap<const BasicBlock *, MachineBasicBlock *> &MBBMap;
   DenseMap<const AllocaInst *, int> &StaticAllocaMap;
 #ifndef NDEBUG
-  SmallSet<Instruction*, 8> &CatchInfoLost;
+  SmallSet<const Instruction *, 8> &CatchInfoLost;
 #endif
   MachineFunction &MF;
   MachineRegisterInfo &MRI;
@@ -118,7 +118,7 @@
            DenseMap<const BasicBlock *, MachineBasicBlock *> &bm,
            DenseMap<const AllocaInst *, int> &am
 #ifndef NDEBUG
-           , SmallSet<Instruction*, 8> &cil
+           , SmallSet<const Instruction *, 8> &cil
 #endif
            );
 

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h?rev=101273&r1=101272&r2=101273&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h Wed Apr 14 14:53:31 2010
@@ -278,6 +278,7 @@
   SDNode *MorphNode(SDNode *Node, unsigned TargetOpc, SDVTList VTs,
                     const SDValue *Ops, unsigned NumOps, unsigned EmitNodeInfo);
   
+  void PrepareEHLandingPad(MachineBasicBlock *BB);
   void SelectAllBasicBlocks(Function &Fn, MachineFunction &MF,
                             const TargetInstrInfo &TII);
   void FinishBasicBlock();

Modified: llvm/trunk/include/llvm/Target/TargetLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=101273&r1=101272&r2=101273&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetLowering.h (original)
+++ llvm/trunk/include/llvm/Target/TargetLowering.h Wed Apr 14 14:53:31 2010
@@ -1278,7 +1278,7 @@
                  DenseMap<const BasicBlock *, MachineBasicBlock *> &,
                  DenseMap<const AllocaInst *, int> &
 #ifndef NDEBUG
-                 , SmallSet<Instruction*, 8> &CatchInfoLost
+                 , SmallSet<const Instruction *, 8> &CatchInfoLost
 #endif
                  ) {
     return 0;

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp?rev=101273&r1=101272&r2=101273&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp Wed Apr 14 14:53:31 2010
@@ -739,7 +739,7 @@
                    DenseMap<const BasicBlock *, MachineBasicBlock *> &bm,
                    DenseMap<const AllocaInst *, int> &am
 #ifndef NDEBUG
-                   , SmallSet<Instruction*, 8> &cil
+                   , SmallSet<const Instruction *, 8> &cil
 #endif
                    )
   : MBB(0),

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp?rev=101273&r1=101272&r2=101273&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp Wed Apr 14 14:53:31 2010
@@ -305,10 +305,10 @@
 
 /// AddCatchInfo - Extract the personality and type infos from an eh.selector
 /// call, and add them to the specified machine basic block.
-void llvm::AddCatchInfo(CallInst &I, MachineModuleInfo *MMI,
+void llvm::AddCatchInfo(const CallInst &I, MachineModuleInfo *MMI,
                         MachineBasicBlock *MBB) {
   // Inform the MachineModuleInfo of the personality for this landing pad.
-  ConstantExpr *CE = cast<ConstantExpr>(I.getOperand(2));
+  const ConstantExpr *CE = cast<ConstantExpr>(I.getOperand(2));
   assert(CE->getOpcode() == Instruction::BitCast &&
          isa<Function>(CE->getOperand(0)) &&
          "Personality should be a function");
@@ -320,7 +320,7 @@
   unsigned N = I.getNumOperands();
 
   for (unsigned i = N - 1; i > 2; --i) {
-    if (ConstantInt *CI = dyn_cast<ConstantInt>(I.getOperand(i))) {
+    if (const ConstantInt *CI = dyn_cast<ConstantInt>(I.getOperand(i))) {
       unsigned FilterLength = CI->getZExtValue();
       unsigned FirstCatch = i + FilterLength + !FilterLength;
       assert (FirstCatch <= N && "Invalid filter length");
@@ -357,10 +357,11 @@
   }
 }
 
-void llvm::CopyCatchInfo(BasicBlock *SrcBB, BasicBlock *DestBB,
+void llvm::CopyCatchInfo(const BasicBlock *SrcBB, const BasicBlock *DestBB,
                          MachineModuleInfo *MMI, FunctionLoweringInfo &FLI) {
-  for (BasicBlock::iterator I = SrcBB->begin(), E = --SrcBB->end(); I != E; ++I)
-    if (EHSelectorInst *EHSel = dyn_cast<EHSelectorInst>(I)) {
+  for (BasicBlock::const_iterator I = SrcBB->begin(), E = --SrcBB->end();
+       I != E; ++I)
+    if (const EHSelectorInst *EHSel = dyn_cast<EHSelectorInst>(I)) {
       // Apply the catch info to DestBB.
       AddCatchInfo(*EHSel, MMI, FLI.MBBMap[DestBB]);
 #ifndef NDEBUG

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.h?rev=101273&r1=101272&r2=101273&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.h (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.h Wed Apr 14 14:53:31 2010
@@ -74,8 +74,8 @@
   DenseMap<const AllocaInst*, int> StaticAllocaMap;
 
 #ifndef NDEBUG
-  SmallSet<Instruction*, 8> CatchInfoLost;
-  SmallSet<Instruction*, 8> CatchInfoFound;
+  SmallSet<const Instruction *, 8> CatchInfoLost;
+  SmallSet<const Instruction *, 8> CatchInfoFound;
 #endif
 
   struct LiveOutInfo {
@@ -143,10 +143,11 @@
 
 /// AddCatchInfo - Extract the personality and type infos from an eh.selector
 /// call, and add them to the specified machine basic block.
-void AddCatchInfo(CallInst &I, MachineModuleInfo *MMI, MachineBasicBlock *MBB);
+void AddCatchInfo(const CallInst &I,
+                  MachineModuleInfo *MMI, MachineBasicBlock *MBB);
 
 /// CopyCatchInfo - Copy catch information from DestBB to SrcBB.
-void CopyCatchInfo(BasicBlock *SrcBB, BasicBlock *DestBB,
+void CopyCatchInfo(const BasicBlock *SrcBB, const BasicBlock *DestBB,
                    MachineModuleInfo *MMI, FunctionLoweringInfo &FLI);
 
 /// hasInlineAsmMemConstraint - Return true if the inline asm instruction being

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=101273&r1=101272&r2=101273&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Wed Apr 14 14:53:31 2010
@@ -699,6 +699,50 @@
   PostprocessISelDAG();
 }
 
+/// PrepareEHLandingPad - Emit an EH_LABEL, set up live-in registers, and
+/// do other setup for EH landing-pad blocks.
+void SelectionDAGISel::PrepareEHLandingPad(MachineBasicBlock *BB) {
+  // Add a label to mark the beginning of the landing pad.  Deletion of the
+  // landing pad can thus be detected via the MachineModuleInfo.
+  MCSymbol *Label = MF->getMMI().addLandingPad(BB);
+
+  const TargetInstrDesc &II =
+    TLI.getTargetMachine().getInstrInfo()->get(TargetOpcode::EH_LABEL);
+  BuildMI(BB, SDB->getCurDebugLoc(), II).addSym(Label);
+
+  // Mark exception register as live in.
+  unsigned Reg = TLI.getExceptionAddressRegister();
+  if (Reg) BB->addLiveIn(Reg);
+
+  // Mark exception selector register as live in.
+  Reg = TLI.getExceptionSelectorRegister();
+  if (Reg) BB->addLiveIn(Reg);
+
+  // FIXME: Hack around an exception handling flaw (PR1508): the personality
+  // function and list of typeids logically belong to the invoke (or, if you
+  // like, the basic block containing the invoke), and need to be associated
+  // with it in the dwarf exception handling tables.  Currently however the
+  // information is provided by an intrinsic (eh.selector) that can be moved
+  // to unexpected places by the optimizers: if the unwind edge is critical,
+  // then breaking it can result in the intrinsics being in the successor of
+  // the landing pad, not the landing pad itself.  This results
+  // in exceptions not being caught because no typeids are associated with
+  // the invoke.  This may not be the only way things can go wrong, but it
+  // is the only way we try to work around for the moment.
+  const BasicBlock *LLVMBB = BB->getBasicBlock();
+  const BranchInst *Br = dyn_cast<BranchInst>(LLVMBB->getTerminator());
+
+  if (Br && Br->isUnconditional()) { // Critical edge?
+    BasicBlock::const_iterator I, E;
+    for (I = LLVMBB->begin(), E = --LLVMBB->end(); I != E; ++I)
+      if (isa<EHSelectorInst>(I))
+        break;
+
+    if (I == E)
+      // No catch info found - try to extract some from the successor.
+      CopyCatchInfo(Br->getSuccessor(0), LLVMBB, &MF->getMMI(), *FuncInfo);
+  }
+}
 
 void SelectionDAGISel::SelectAllBasicBlocks(Function &Fn,
                                             MachineFunction &MF,
@@ -742,47 +786,10 @@
       }
     }
 
-    if (BB->isLandingPad()) {
-      // Add a label to mark the beginning of the landing pad.  Deletion of the
-      // landing pad can thus be detected via the MachineModuleInfo.
-      MCSymbol *Label = MF.getMMI().addLandingPad(BB);
-
-      const TargetInstrDesc &II = TII.get(TargetOpcode::EH_LABEL);
-      BuildMI(BB, SDB->getCurDebugLoc(), II).addSym(Label);
-
-      // Mark exception register as live in.
-      unsigned Reg = TLI.getExceptionAddressRegister();
-      if (Reg) BB->addLiveIn(Reg);
-
-      // Mark exception selector register as live in.
-      Reg = TLI.getExceptionSelectorRegister();
-      if (Reg) BB->addLiveIn(Reg);
-
-      // FIXME: Hack around an exception handling flaw (PR1508): the personality
-      // function and list of typeids logically belong to the invoke (or, if you
-      // like, the basic block containing the invoke), and need to be associated
-      // with it in the dwarf exception handling tables.  Currently however the
-      // information is provided by an intrinsic (eh.selector) that can be moved
-      // to unexpected places by the optimizers: if the unwind edge is critical,
-      // then breaking it can result in the intrinsics being in the successor of
-      // the landing pad, not the landing pad itself.  This results
-      // in exceptions not being caught because no typeids are associated with
-      // the invoke.  This may not be the only way things can go wrong, but it
-      // is the only way we try to work around for the moment.
-      BranchInst *Br = dyn_cast<BranchInst>(LLVMBB->getTerminator());
-
-      if (Br && Br->isUnconditional()) { // Critical edge?
-        BasicBlock::iterator I, E;
-        for (I = LLVMBB->begin(), E = --LLVMBB->end(); I != E; ++I)
-          if (isa<EHSelectorInst>(I))
-            break;
-
-        if (I == E)
-          // No catch info found - try to extract some from the successor.
-          CopyCatchInfo(Br->getSuccessor(0), LLVMBB, &MF.getMMI(), *FuncInfo);
-      }
-    }
-
+    // Setup an EH landing-pad block.
+    if (BB->isLandingPad())
+      PrepareEHLandingPad(BB);
+    
     // Before doing SelectionDAG ISel, see if FastISel has been requested.
     if (FastIS && !SuppressFastISel) {
       // Emit code for any incoming arguments. This must happen before

Modified: llvm/trunk/lib/Target/X86/X86FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FastISel.cpp?rev=101273&r1=101272&r2=101273&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86FastISel.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86FastISel.cpp Wed Apr 14 14:53:31 2010
@@ -58,7 +58,7 @@
                        DenseMap<const BasicBlock *, MachineBasicBlock *> &bm,
                        DenseMap<const AllocaInst *, int> &am
 #ifndef NDEBUG
-                       , SmallSet<Instruction*, 8> &cil
+                       , SmallSet<const Instruction *, 8> &cil
 #endif
                        )
     : FastISel(mf, vm, bm, am
@@ -1755,7 +1755,7 @@
                         DenseMap<const BasicBlock *, MachineBasicBlock *> &bm,
                         DenseMap<const AllocaInst *, int> &am
 #ifndef NDEBUG
-                        , SmallSet<Instruction*, 8> &cil
+                        , SmallSet<const Instruction *, 8> &cil
 #endif
                         ) {
     return new X86FastISel(mf, vm, bm, am

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=101273&r1=101272&r2=101273&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Apr 14 14:53:31 2010
@@ -2410,7 +2410,7 @@
                             DenseMap<const BasicBlock*, MachineBasicBlock*> &bm,
                             DenseMap<const AllocaInst *, int> &am
 #ifndef NDEBUG
-                          , SmallSet<Instruction*, 8> &cil
+                          , SmallSet<const Instruction *, 8> &cil
 #endif
                                   ) {
   return X86::createFastISel(mf, vm, bm, am

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=101273&r1=101272&r2=101273&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Wed Apr 14 14:53:31 2010
@@ -581,7 +581,7 @@
                    DenseMap<const BasicBlock *, MachineBasicBlock *> &,
                    DenseMap<const AllocaInst *, int> &
 #ifndef NDEBUG
-                   , SmallSet<Instruction*, 8> &
+                   , SmallSet<const Instruction *, 8> &
 #endif
                    );
 
@@ -821,7 +821,7 @@
                            DenseMap<const BasicBlock *, MachineBasicBlock *> &,
                            DenseMap<const AllocaInst *, int> &
 #ifndef NDEBUG
-                           , SmallSet<Instruction*, 8> &
+                           , SmallSet<const Instruction*, 8> &
 #endif
                            );
   }




From gohman at apple.com  Wed Apr 14 15:05:01 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 20:05:01 -0000
Subject: [llvm-commits] [llvm] r101275 - in /llvm/trunk:
 include/llvm/CodeGen/SelectionDAGISel.h
 lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Message-ID: <20100414200501.13EC12A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 15:05:00 2010
New Revision: 101275

URL: http://llvm.org/viewvc/llvm-project?rev=101275&view=rev
Log:
Delete unused arguments.

Modified:
    llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h?rev=101275&r1=101274&r2=101275&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h Wed Apr 14 15:05:00 2010
@@ -279,8 +279,7 @@
                     const SDValue *Ops, unsigned NumOps, unsigned EmitNodeInfo);
   
   void PrepareEHLandingPad(MachineBasicBlock *BB);
-  void SelectAllBasicBlocks(Function &Fn, MachineFunction &MF,
-                            const TargetInstrInfo &TII);
+  void SelectAllBasicBlocks(Function &Fn);
   void FinishBasicBlock();
 
   void SelectBasicBlock(BasicBlock *LLVMBB,

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=101275&r1=101274&r2=101275&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Wed Apr 14 15:05:00 2010
@@ -210,7 +210,7 @@
   FuncInfo->set(Fn, *MF, EnableFastISel);
   SDB->init(GFI, *AA);
 
-  SelectAllBasicBlocks(Fn, *MF, TII);
+  SelectAllBasicBlocks(Fn);
 
   // Release function-specific state. SDB and CurDAG are already cleared
   // at this point.
@@ -744,13 +744,11 @@
   }
 }
 
-void SelectionDAGISel::SelectAllBasicBlocks(Function &Fn,
-                                            MachineFunction &MF,
-                                            const TargetInstrInfo &TII) {
+void SelectionDAGISel::SelectAllBasicBlocks(Function &Fn) {
   // Initialize the Fast-ISel state, if needed.
   FastISel *FastIS = 0;
   if (EnableFastISel)
-    FastIS = TLI.createFastISel(MF, FuncInfo->ValueMap, FuncInfo->MBBMap,
+    FastIS = TLI.createFastISel(*MF, FuncInfo->ValueMap, FuncInfo->MBBMap,
                                 FuncInfo->StaticAllocaMap
 #ifndef NDEBUG
                                 , FuncInfo->CatchInfoLost
@@ -817,7 +815,7 @@
             break;
           }
 
-        SetDebugLoc(BI, SDB, FastIS, &MF);
+        SetDebugLoc(BI, SDB, FastIS, MF);
 
         // Try to select the instruction with FastISel.
         if (FastIS->SelectInstruction(BI)) {




From gohman at apple.com  Wed Apr 14 15:17:22 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 20:17:22 -0000
Subject: [llvm-commits] [llvm] r101276 - in /llvm/trunk:
 include/llvm/CodeGen/SelectionDAGISel.h
 lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
 lib/Target/X86/X86ISelDAGToDAG.cpp
Message-ID: <20100414201722.EF4082A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 15:17:22 2010
New Revision: 101276

URL: http://llvm.org/viewvc/llvm-project?rev=101276&view=rev
Log:
Delete unneeeded arguments.

Modified:
    llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h?rev=101276&r1=101275&r2=101276&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h Wed Apr 14 15:17:22 2010
@@ -62,7 +62,7 @@
 
   virtual bool runOnMachineFunction(MachineFunction &MF);
 
-  virtual void EmitFunctionEntryCode(Function &Fn, MachineFunction &MF) {}
+  virtual void EmitFunctionEntryCode() {}
   
   /// PreprocessISelDAG - This hook allows targets to hack on the graph before
   /// instruction selection starts.

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=101276&r1=101275&r2=101276&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Wed Apr 14 15:17:22 2010
@@ -6001,7 +6001,7 @@
 
   // Finally, if the target has anything special to do, allow it to do so.
   // FIXME: this should insert code into the DAG!
-  EmitFunctionEntryCode(F, SDB->DAG.getMachineFunction());
+  EmitFunctionEntryCode();
 }
 
 /// Handle PHI nodes in successor blocks.  Emit code into the SelectionDAG to

Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=101276&r1=101275&r2=101276&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Wed Apr 14 15:17:22 2010
@@ -183,7 +183,7 @@
       return "X86 DAG->DAG Instruction Selection";
     }
 
-    virtual void EmitFunctionEntryCode(Function &Fn, MachineFunction &MF);
+    virtual void EmitFunctionEntryCode();
 
     virtual bool IsProfitableToFold(SDValue N, SDNode *U, SDNode *Root) const;
 
@@ -546,11 +546,11 @@
             TII->get(X86::CALLpcrel32)).addExternalSymbol("__main");
 }
 
-void X86DAGToDAGISel::EmitFunctionEntryCode(Function &Fn, MachineFunction &MF) {
+void X86DAGToDAGISel::EmitFunctionEntryCode() {
   // If this is main, emit special code for main.
-  MachineBasicBlock *BB = MF.begin();
-  if (Fn.hasExternalLinkage() && Fn.getName() == "main")
-    EmitSpecialCodeForMain(BB, MF.getFrameInfo());
+  if (const Function *Fn = MF->getFunction())
+    if (Fn->hasExternalLinkage() && Fn->getName() == "main")
+      EmitSpecialCodeForMain(MF->begin(), MF->getFrameInfo());
 }
 
 




From evan.cheng at apple.com  Wed Apr 14 15:22:17 2010
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 14 Apr 2010 20:22:17 -0000
Subject: [llvm-commits] [llvm] r101277 - in
 /llvm/trunk/test/Transforms/GlobalOpt: malloc-promote-2.ll
 malloc-promote-3.ll
Message-ID: <20100414202217.BCC152A6C12C@llvm.org>

Author: evancheng
Date: Wed Apr 14 15:22:17 2010
New Revision: 101277

URL: http://llvm.org/viewvc/llvm-project?rev=101277&view=rev
Log:
Trim tests and convert to FileCheck.

Removed:
    llvm/trunk/test/Transforms/GlobalOpt/malloc-promote-3.ll
Modified:
    llvm/trunk/test/Transforms/GlobalOpt/malloc-promote-2.ll

Modified: llvm/trunk/test/Transforms/GlobalOpt/malloc-promote-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GlobalOpt/malloc-promote-2.ll?rev=101277&r1=101276&r2=101277&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/GlobalOpt/malloc-promote-2.ll (original)
+++ llvm/trunk/test/Transforms/GlobalOpt/malloc-promote-2.ll Wed Apr 14 15:22:17 2010
@@ -1,24 +1,19 @@
-; RUN: opt < %s -globalopt -globaldce -S | not grep malloc
+; RUN: opt < %s -globalopt -S | FileCheck %s
 target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
 
- at G = internal global i32* null          ; <i32**> [#uses=3]
+ at G = internal global i32* null
 
-define void @init() {
-        %malloccall = tail call i8* @malloc(i64 mul (i64 100, i64 4)) ; <i8*> [#uses=1]
-        %P = bitcast i8* %malloccall to i32*            ; <i32*> [#uses=1]
-        store i32* %P, i32** @G
-        %GV = load i32** @G             ; <i32*> [#uses=1]
-        %GVe = getelementptr i32* %GV, i32 40           ; <i32*> [#uses=1]
-        store i32 20, i32* %GVe
-        ret void
+define void @t() {
+; CHECK: @t()
+; CHECK-NOT: call i8* @malloc
+; CHECK-NEXT: ret void
+  %malloccall = tail call i8* @malloc(i64 mul (i64 100, i64 4))
+  %P = bitcast i8* %malloccall to i32*
+  store i32* %P, i32** @G
+  %GV = load i32** @G
+  %GVe = getelementptr i32* %GV, i32 40
+  store i32 20, i32* %GVe
+  ret void
 }
 
 declare noalias i8* @malloc(i64)
-
-define i32 @get() {
-        %GV = load i32** @G             ; <i32*> [#uses=1]
-        %GVe = getelementptr i32* %GV, i32 40           ; <i32*> [#uses=1]
-        %V = load i32* %GVe             ; <i32> [#uses=1]
-        ret i32 %V
-}
-

Removed: llvm/trunk/test/Transforms/GlobalOpt/malloc-promote-3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GlobalOpt/malloc-promote-3.ll?rev=101276&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/GlobalOpt/malloc-promote-3.ll (original)
+++ llvm/trunk/test/Transforms/GlobalOpt/malloc-promote-3.ll (removed)
@@ -1,30 +0,0 @@
-; RUN: opt < %s -globalopt -globaldce -S | not grep malloc
-target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
-
- at G = internal global i32* null          ; <i32**> [#uses=4]
-
-define void @init() {
-        %malloccall = tail call i8* @malloc(i64 mul (i64 100, i64 4)) ; <i8*> [#uses=1]
-        %P = bitcast i8* %malloccall to i32*            ; <i32*> [#uses=1]
-        store i32* %P, i32** @G
-        %GV = load i32** @G             ; <i32*> [#uses=1]
-        %GVe = getelementptr i32* %GV, i32 40           ; <i32*> [#uses=1]
-        store i32 20, i32* %GVe
-        ret void
-}
-
-declare noalias i8* @malloc(i64)
-
-define i32 @get() {
-        %GV = load i32** @G             ; <i32*> [#uses=1]
-        %GVe = getelementptr i32* %GV, i32 40           ; <i32*> [#uses=1]
-        %V = load i32* %GVe             ; <i32> [#uses=1]
-        ret i32 %V
-}
-
-define i1 @check() {
-        %GV = load i32** @G             ; <i32*> [#uses=1]
-        %V = icmp eq i32* %GV, null             ; <i1> [#uses=1]
-        ret i1 %V
-}
-




From gohman at apple.com  Wed Apr 14 15:28:44 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 20:28:44 -0000
Subject: [llvm-commits] [llvm] r101279 -
	/llvm/trunk/include/llvm/Support/CallSite.h
Message-ID: <20100414202844.F1EB52A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 15:28:44 2010
New Revision: 101279

URL: http://llvm.org/viewvc/llvm-project?rev=101279&view=rev
Log:
Move getType() and getCaller() into CallSiteBase so that
ImmutableCallSite can use them too.

Modified:
    llvm/trunk/include/llvm/Support/CallSite.h

Modified: llvm/trunk/include/llvm/Support/CallSite.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/CallSite.h?rev=101279&r1=101278&r2=101279&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/CallSite.h (original)
+++ llvm/trunk/include/llvm/Support/CallSite.h Wed Apr 14 15:28:44 2010
@@ -175,6 +175,14 @@
     else
       return getInstruction()->op_end() - 3; // Skip BB, BB, Function
   }
+
+  /// getType - Return the type of the instruction that generated this call site
+  ///
+  const Type *getType() const { return (*this)->getType(); }
+
+  /// getCaller - Return the caller function for this call site
+  ///
+  Function *getCaller() const { return (*this)->getParent()->getParent(); }
 };
 
 /// ImmutableCallSite - establish a view to a call site for examination
@@ -246,14 +254,6 @@
   bool doesNotThrow() const;
   void setDoesNotThrow(bool doesNotThrow = true);
 
-  /// getType - Return the type of the instruction that generated this call site
-  ///
-  const Type *getType() const { return (*this)->getType(); }
-
-  /// getCaller - Return the caller function for this call site
-  ///
-  Function *getCaller() const { return (*this)->getParent()->getParent(); }
-
   /// hasArgument - Returns true if this CallSite passes the given Value* as an
   /// argument to the called function.
   bool hasArgument(const Value *Arg) const;




From gohman at apple.com  Wed Apr 14 15:31:28 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 20:31:28 -0000
Subject: [llvm-commits] [llvm] r101280 -
	/llvm/trunk/include/llvm/Support/CallSite.h
Message-ID: <20100414203128.847342A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 15:31:28 2010
New Revision: 101280

URL: http://llvm.org/viewvc/llvm-project?rev=101280&view=rev
Log:
Oops, make these public.

Modified:
    llvm/trunk/include/llvm/Support/CallSite.h

Modified: llvm/trunk/include/llvm/Support/CallSite.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/CallSite.h?rev=101280&r1=101279&r2=101280&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/CallSite.h (original)
+++ llvm/trunk/include/llvm/Support/CallSite.h Wed Apr 14 15:31:28 2010
@@ -150,6 +150,14 @@
   bool arg_empty() const { return arg_end() == arg_begin(); }
   unsigned arg_size() const { return unsigned(arg_end() - arg_begin()); }
   
+  /// getType - Return the type of the instruction that generated this call site
+  ///
+  const Type *getType() const { return (*this)->getType(); }
+
+  /// getCaller - Return the caller function for this call site
+  ///
+  Function *getCaller() const { return (*this)->getParent()->getParent(); }
+
 private:
   /// Returns the operand number of the first argument
   unsigned getArgumentOffset() const {
@@ -175,14 +183,6 @@
     else
       return getInstruction()->op_end() - 3; // Skip BB, BB, Function
   }
-
-  /// getType - Return the type of the instruction that generated this call site
-  ///
-  const Type *getType() const { return (*this)->getType(); }
-
-  /// getCaller - Return the caller function for this call site
-  ///
-  Function *getCaller() const { return (*this)->getParent()->getParent(); }
 };
 
 /// ImmutableCallSite - establish a view to a call site for examination




From bob.wilson at apple.com  Wed Apr 14 15:45:23 2010
From: bob.wilson at apple.com (Bob Wilson)
Date: Wed, 14 Apr 2010 20:45:23 -0000
Subject: [llvm-commits] [llvm] r101282 - in /llvm/trunk:
 lib/Target/ARM/ARMISelLowering.cpp
 test/CodeGen/ARM/2010-04-14-SplitVector.ll
Message-ID: <20100414204523.50EC72A6C12C@llvm.org>

Author: bwilson
Date: Wed Apr 14 15:45:23 2010
New Revision: 101282

URL: http://llvm.org/viewvc/llvm-project?rev=101282&view=rev
Log:
Don't custom lower bit converts to ARM VMOVDRRD or VMOVDRR when the operand
does not have a legal type.  The legalizer does not know how to handle those
nodes.  Radar 7854640.

Added:
    llvm/trunk/test/CodeGen/ARM/2010-04-14-SplitVector.ll
Modified:
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=101282&r1=101281&r2=101282&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Wed Apr 14 15:45:23 2010
@@ -2167,6 +2167,13 @@
 
 static SDValue ExpandBIT_CONVERT(SDNode *N, SelectionDAG &DAG) {
   SDValue Op = N->getOperand(0);
+
+  // Do not create a VMOVDRR or VMOVRRD node if the operand type is not
+  // legal.  The legalizer won't know what to do with that.
+  const TargetLowering &TLI = DAG.getTargetLoweringInfo();
+  if (!TLI.isTypeLegal(Op.getValueType()))
+    return SDValue();
+
   DebugLoc dl = N->getDebugLoc();
   if (N->getValueType(0) == MVT::f64) {
     // Turn i64->f64 into VMOVDRR.
@@ -3114,21 +3121,21 @@
 void ARMTargetLowering::ReplaceNodeResults(SDNode *N,
                                            SmallVectorImpl<SDValue>&Results,
                                            SelectionDAG &DAG) {
+  SDValue Res;
   switch (N->getOpcode()) {
   default:
     llvm_unreachable("Don't know how to custom expand this!");
-    return;
+    break;
   case ISD::BIT_CONVERT:
-    Results.push_back(ExpandBIT_CONVERT(N, DAG));
-    return;
+    Res = ExpandBIT_CONVERT(N, DAG);
+    break;
   case ISD::SRL:
-  case ISD::SRA: {
-    SDValue Res = LowerShift(N, DAG, Subtarget);
-    if (Res.getNode())
-      Results.push_back(Res);
-    return;
-  }
+  case ISD::SRA:
+    Res = LowerShift(N, DAG, Subtarget);
+    break;
   }
+  if (Res.getNode())
+    Results.push_back(Res);
 }
 
 //===----------------------------------------------------------------------===//

Added: llvm/trunk/test/CodeGen/ARM/2010-04-14-SplitVector.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2010-04-14-SplitVector.ll?rev=101282&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/2010-04-14-SplitVector.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/2010-04-14-SplitVector.ll Wed Apr 14 15:45:23 2010
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=arm -mcpu=arm1136jf-s
+; Radar 7854640
+
+define arm_apcscc void @test() nounwind {
+bb:
+  br i1 undef, label %bb9, label %bb10
+
+bb9:
+  %tmp63 = bitcast <4 x float> zeroinitializer to i128
+  %tmp64 = trunc i128 %tmp63 to i32
+  br label %bb10
+
+bb10:
+  %0 = phi i32 [ %tmp64, %bb9 ], [ undef, %bb ]
+  ret void
+}




From gohman at apple.com  Wed Apr 14 15:49:44 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 20:49:44 -0000
Subject: [llvm-commits] [llvm] r101283 -
	/llvm/trunk/include/llvm/Support/CallSite.h
Message-ID: <20100414204944.C6CED2A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 15:49:44 2010
New Revision: 101283

URL: http://llvm.org/viewvc/llvm-project?rev=101283&view=rev
Log:
Use FunTy instead of hard-coding Function.

Modified:
    llvm/trunk/include/llvm/Support/CallSite.h

Modified: llvm/trunk/include/llvm/Support/CallSite.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/CallSite.h?rev=101283&r1=101282&r2=101283&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/CallSite.h (original)
+++ llvm/trunk/include/llvm/Support/CallSite.h Wed Apr 14 15:49:44 2010
@@ -156,7 +156,7 @@
 
   /// getCaller - Return the caller function for this call site
   ///
-  Function *getCaller() const { return (*this)->getParent()->getParent(); }
+  FunTy *getCaller() const { return (*this)->getParent()->getParent(); }
 
 private:
   /// Returns the operand number of the first argument




From evan.cheng at apple.com  Wed Apr 14 15:52:55 2010
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 14 Apr 2010 20:52:55 -0000
Subject: [llvm-commits] [llvm] r101285 -
	/llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp
Message-ID: <20100414205255.EF2462A6C12C@llvm.org>

Author: evancheng
Date: Wed Apr 14 15:52:55 2010
New Revision: 101285

URL: http://llvm.org/viewvc/llvm-project?rev=101285&view=rev
Log:
- Code clean up to reduce indentation.
- TryToOptimizeStoreOfMallocToGlobal should check if TargetData is available and bail out if it is not. The transformations being done requires TD.

Modified:
    llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp

Modified: llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp?rev=101285&r1=101284&r2=101285&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp Wed Apr 14 15:52:55 2010
@@ -1462,6 +1462,9 @@
                                                const Type *AllocTy,
                                                Module::global_iterator &GVI,
                                                TargetData *TD) {
+  if (!TD)
+    return false;
+          
   // If this is a malloc of an abstract type, don't touch it.
   if (!AllocTy->isSized())
     return false;
@@ -1480,66 +1483,66 @@
   // malloc to be stored into the specified global, loaded setcc'd, and
   // GEP'd.  These are all things we could transform to using the global
   // for.
-  {
-    SmallPtrSet<const PHINode*, 8> PHIs;
-    if (!ValueIsOnlyUsedLocallyOrStoredToOneGlobal(CI, GV, PHIs))
-      return false;
-  }  
+  SmallPtrSet<const PHINode*, 8> PHIs;
+  if (!ValueIsOnlyUsedLocallyOrStoredToOneGlobal(CI, GV, PHIs))
+    return false;
 
   // If we have a global that is only initialized with a fixed size malloc,
   // transform the program to use global memory instead of malloc'd memory.
   // This eliminates dynamic allocation, avoids an indirection accessing the
   // data, and exposes the resultant global to further GlobalOpt.
   // We cannot optimize the malloc if we cannot determine malloc array size.
-  if (Value *NElems = getMallocArraySize(CI, TD, true)) {
-    if (ConstantInt *NElements = dyn_cast<ConstantInt>(NElems))
-      // Restrict this transformation to only working on small allocations
-      // (2048 bytes currently), as we don't want to introduce a 16M global or
-      // something.
-      if (TD && 
-          NElements->getZExtValue() * TD->getTypeAllocSize(AllocTy) < 2048) {
-        GVI = OptimizeGlobalAddressOfMalloc(GV, CI, AllocTy, NElements, TD);
-        return true;
-      }
+  Value *NElems = getMallocArraySize(CI, TD, true);
+  if (!NElems)
+    return false;
+
+  if (ConstantInt *NElements = dyn_cast<ConstantInt>(NElems))
+    // Restrict this transformation to only working on small allocations
+    // (2048 bytes currently), as we don't want to introduce a 16M global or
+    // something.
+    if (NElements->getZExtValue() * TD->getTypeAllocSize(AllocTy) < 2048) {
+      GVI = OptimizeGlobalAddressOfMalloc(GV, CI, AllocTy, NElements, TD);
+      return true;
+    }
   
-    // If the allocation is an array of structures, consider transforming this
-    // into multiple malloc'd arrays, one for each field.  This is basically
-    // SRoA for malloc'd memory.
-
-    // If this is an allocation of a fixed size array of structs, analyze as a
-    // variable size array.  malloc [100 x struct],1 -> malloc struct, 100
-    if (NElems == ConstantInt::get(CI->getOperand(1)->getType(), 1))
-      if (const ArrayType *AT = dyn_cast<ArrayType>(AllocTy))
-        AllocTy = AT->getElementType();
-  
-    if (const StructType *AllocSTy = dyn_cast<StructType>(AllocTy)) {
-      // This the structure has an unreasonable number of fields, leave it
-      // alone.
-      if (AllocSTy->getNumElements() <= 16 && AllocSTy->getNumElements() != 0 &&
-          AllGlobalLoadUsesSimpleEnoughForHeapSRA(GV, CI)) {
-
-        // If this is a fixed size array, transform the Malloc to be an alloc of
-        // structs.  malloc [100 x struct],1 -> malloc struct, 100
-        if (const ArrayType *AT =
-                              dyn_cast<ArrayType>(getMallocAllocatedType(CI))) {
-          const Type *IntPtrTy = TD->getIntPtrType(CI->getContext());
-          unsigned TypeSize = TD->getStructLayout(AllocSTy)->getSizeInBytes();
-          Value *AllocSize = ConstantInt::get(IntPtrTy, TypeSize);
-          Value *NumElements = ConstantInt::get(IntPtrTy, AT->getNumElements());
-          Instruction *Malloc = CallInst::CreateMalloc(CI, IntPtrTy, AllocSTy,
-                                                       AllocSize, NumElements,
-                                                       CI->getName());
-          Instruction *Cast = new BitCastInst(Malloc, CI->getType(), "tmp", CI);
-          CI->replaceAllUsesWith(Cast);
-          CI->eraseFromParent();
-          CI = dyn_cast<BitCastInst>(Malloc) ?
-               extractMallocCallFromBitCast(Malloc) : cast<CallInst>(Malloc);
-        }
-      
-        GVI = PerformHeapAllocSRoA(GV, CI, getMallocArraySize(CI, TD, true),TD);
-        return true;
-      }
+  // If the allocation is an array of structures, consider transforming this
+  // into multiple malloc'd arrays, one for each field.  This is basically
+  // SRoA for malloc'd memory.
+
+  // If this is an allocation of a fixed size array of structs, analyze as a
+  // variable size array.  malloc [100 x struct],1 -> malloc struct, 100
+  if (NElems == ConstantInt::get(CI->getOperand(1)->getType(), 1))
+    if (const ArrayType *AT = dyn_cast<ArrayType>(AllocTy))
+      AllocTy = AT->getElementType();
+  
+  const StructType *AllocSTy = dyn_cast<StructType>(AllocTy);
+  if (!AllocSTy)
+    return false;
+
+  // This the structure has an unreasonable number of fields, leave it
+  // alone.
+  if (AllocSTy->getNumElements() <= 16 && AllocSTy->getNumElements() != 0 &&
+      AllGlobalLoadUsesSimpleEnoughForHeapSRA(GV, CI)) {
+
+    // If this is a fixed size array, transform the Malloc to be an alloc of
+    // structs.  malloc [100 x struct],1 -> malloc struct, 100
+    if (const ArrayType *AT = dyn_cast<ArrayType>(getMallocAllocatedType(CI))) {
+      const Type *IntPtrTy = TD->getIntPtrType(CI->getContext());
+      unsigned TypeSize = TD->getStructLayout(AllocSTy)->getSizeInBytes();
+      Value *AllocSize = ConstantInt::get(IntPtrTy, TypeSize);
+      Value *NumElements = ConstantInt::get(IntPtrTy, AT->getNumElements());
+      Instruction *Malloc = CallInst::CreateMalloc(CI, IntPtrTy, AllocSTy,
+                                                   AllocSize, NumElements,
+                                                   CI->getName());
+      Instruction *Cast = new BitCastInst(Malloc, CI->getType(), "tmp", CI);
+      CI->replaceAllUsesWith(Cast);
+      CI->eraseFromParent();
+      CI = dyn_cast<BitCastInst>(Malloc) ?
+        extractMallocCallFromBitCast(Malloc) : cast<CallInst>(Malloc);
     }
+      
+    GVI = PerformHeapAllocSRoA(GV, CI, getMallocArraySize(CI, TD, true),TD);
+    return true;
   }
   
   return false;




From stoklund at 2pi.dk  Wed Apr 14 15:56:09 2010
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Wed, 14 Apr 2010 20:56:09 -0000
Subject: [llvm-commits] [llvm] r101286 -
	/llvm/trunk/test/CodeGen/X86/2010-04-06-SSEDomainFixCrash.ll
Message-ID: <20100414205609.B87D72A6C12C@llvm.org>

Author: stoklund
Date: Wed Apr 14 15:56:09 2010
New Revision: 101286

URL: http://llvm.org/viewvc/llvm-project?rev=101286&view=rev
Log:
Remove unneeded types from test.

Modified:
    llvm/trunk/test/CodeGen/X86/2010-04-06-SSEDomainFixCrash.ll

Modified: llvm/trunk/test/CodeGen/X86/2010-04-06-SSEDomainFixCrash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-04-06-SSEDomainFixCrash.ll?rev=101286&r1=101285&r2=101286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-04-06-SSEDomainFixCrash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2010-04-06-SSEDomainFixCrash.ll Wed Apr 14 15:56:09 2010
@@ -5,80 +5,14 @@
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
 target triple = "i386-apple-darwin10.0"
 
-%struct.CONTACT_KEY_TOKEN_COMP = type <{ i8 }>
-%struct.GIM_AABB = type { %struct.btSimdScalar, %struct.btSimdScalar }
-%struct.HullDesc = type { i32, i32, %struct.btSimdScalar*, i32, float, i32, i32 }
-%struct.HullLibrary = type { %"struct.btAlignedObjectArray<btHullTriangle*>", %"struct.btAlignedObjectArray<btSoftBody::ePSolver::_>" }
-%struct.HullResult = type { i8, i32, %"struct.btAlignedObjectArray<btVector3>", i32, i32, %"struct.btAlignedObjectArray<btSoftBody::ePSolver::_>" }
-%struct.btActionInterface = type { i32 (...)** }
-%"struct.btAlignedObjectArray<bool>" = type { %struct.CONTACT_KEY_TOKEN_COMP, i32, i32, i8*, i8 }
-%"struct.btAlignedObjectArray<btCollisionObject*>" = type { %struct.CONTACT_KEY_TOKEN_COMP, i32, i32, %struct.btCollisionObject**, i8 }
-%"struct.btAlignedObjectArray<btDbvt::sStkCLN>" = type { %struct.CONTACT_KEY_TOKEN_COMP, i32, i32, %"struct.btDbvt::sStkCLN"*, i8 }
-%"struct.btAlignedObjectArray<btHullTriangle*>" = type { %struct.CONTACT_KEY_TOKEN_COMP, i32, i32, %struct.btHullTriangle**, i8 }
-%"struct.btAlignedObjectArray<btSoftBody::Anchor>" = type { %struct.CONTACT_KEY_TOKEN_COMP, i32, i32, %"struct.btSoftBody::Anchor"*, i8 }
-%"struct.btAlignedObjectArray<btSoftBody::Cluster*>" = type { %struct.CONTACT_KEY_TOKEN_COMP, i32, i32, %"struct.btSoftBody::Cluster"**, i8 }
-%"struct.btAlignedObjectArray<btSoftBody::Face>" = type { %struct.CONTACT_KEY_TOKEN_COMP, i32, i32, %"struct.btSoftBody::Face"*, i8 }
-%"struct.btAlignedObjectArray<btSoftBody::Joint*>" = type { %struct.CONTACT_KEY_TOKEN_COMP, i32, i32, %"struct.btSoftBody::Joint"**, i8 }
-%"struct.btAlignedObjectArray<btSoftBody::Link>" = type { %struct.CONTACT_KEY_TOKEN_COMP, i32, i32, %"struct.btSoftBody::Link"*, i8 }
-%"struct.btAlignedObjectArray<btSoftBody::Material*>" = type { %struct.CONTACT_KEY_TOKEN_COMP, i32, i32, %"struct.btSoftBody::Material"**, i8 }
-%"struct.btAlignedObjectArray<btSoftBody::Node*>" = type { %struct.CONTACT_KEY_TOKEN_COMP, i32, i32, %"struct.btSoftBody::Node"**, i8 }
-%"struct.btAlignedObjectArray<btSoftBody::Node>" = type { %struct.CONTACT_KEY_TOKEN_COMP, i32, i32, %"struct.btSoftBody::Node"*, i8 }
-%"struct.btAlignedObjectArray<btSoftBody::Note>" = type { %struct.CONTACT_KEY_TOKEN_COMP, i32, i32, %"struct.btSoftBody::Note"*, i8 }
-%"struct.btAlignedObjectArray<btSoftBody::RContact>" = type { %struct.CONTACT_KEY_TOKEN_COMP, i32, i32, %"struct.btSoftBody::RContact"*, i8 }
-%"struct.btAlignedObjectArray<btSoftBody::SContact>" = type { %struct.CONTACT_KEY_TOKEN_COMP, i32, i32, %"struct.btSoftBody::SContact"*, i8 }
-%"struct.btAlignedObjectArray<btSoftBody::Tetra>" = type { %struct.CONTACT_KEY_TOKEN_COMP, i32, i32, %"struct.btSoftBody::Tetra"*, i8 }
-%"struct.btAlignedObjectArray<btSoftBody::ePSolver::_>" = type { %struct.CONTACT_KEY_TOKEN_COMP, i32, i32, i32*, i8 }
-%"struct.btAlignedObjectArray<btSparseSdf<3>::Cell*>" = type { %struct.CONTACT_KEY_TOKEN_COMP, i32, i32, %"struct.btSparseSdf<3>::Cell"**, i8 }
-%"struct.btAlignedObjectArray<btTypedConstraint*>" = type { %struct.CONTACT_KEY_TOKEN_COMP, i32, i32, %struct.btTypedConstraint**, i8 }
-%"struct.btAlignedObjectArray<btVector3>" = type { %struct.CONTACT_KEY_TOKEN_COMP, i32, i32, %struct.btSimdScalar*, i8 }
-%"struct.btAlignedObjectArray<float>" = type { %struct.CONTACT_KEY_TOKEN_COMP, i32, i32, float*, i8 }
-%struct.btBroadphaseProxy = type { i8*, i16, i16, i8*, i32, %struct.btSimdScalar, %struct.btSimdScalar }
-%struct.btCollisionObject = type { i32 (...)**, %struct.btTransform, %struct.btTransform, %struct.btSimdScalar, %struct.btSimdScalar, %struct.btSimdScalar, i8, float, %struct.btBroadphaseProxy*, %struct.btCollisionShape*, %struct.btCollisionShape*, i32, i32, i32, i32, float, float, float, i8*, i32, float, float, float, i8, [7 x i8] }
-%struct.btCollisionShape = type { i32 (...)**, i32, i8* }
-%struct.btDbvt = type { %struct.btDbvtNode*, %struct.btDbvtNode*, i32, i32, i32, %"struct.btAlignedObjectArray<btDbvt::sStkCLN>" }
-%"struct.btDbvt::sStkCLN" = type { %struct.btDbvtNode*, %struct.btDbvtNode* }
-%struct.btDbvtNode = type { %struct.GIM_AABB, %struct.btDbvtNode*, %"union.btDbvtNode::$_12" }
-%"struct.btHashKey<btTriIndex>" = type { i32 }
-%struct.btHullTriangle = type { %struct.int3, %struct.int3, i32, i32, float }
-%struct.btMatrix3x3 = type { [3 x %struct.btSimdScalar] }
-%"struct.btRaycastVehicle::btVehicleTuning" = type { float, float, float, float, float }
-%struct.btRigidBody = type { %struct.btCollisionObject, %struct.btMatrix3x3, %struct.btSimdScalar, %struct.btSimdScalar, float, %struct.btSimdScalar, %struct.btSimdScalar, %struct.btSimdScalar, %struct.btSimdScalar, %struct.btSimdScalar, %struct.btSimdScalar, %struct.btSimdScalar, float, float, i8, float, float, float, float, float, float, %struct.btActionInterface*, %"struct.btAlignedObjectArray<btTypedConstraint*>", i32, i32, i32 }
-%struct.btSimdScalar = type { %"union.btSimdScalar::$_13" }
-%struct.btSoftBody = type { [268 x i8], %"struct.btAlignedObjectArray<btCollisionObject*>", %"struct.btSoftBody::Config", %"struct.btRaycastVehicle::btVehicleTuning", %"struct.btSoftBody::Pose", i8*, %struct.btSoftBodyWorldInfo*, %"struct.btAlignedObjectArray<btSoftBody::Note>", %"struct.btAlignedObjectArray<btSoftBody::Node>", %"struct.btAlignedObjectArray<btSoftBody::Link>", %"struct.btAlignedObjectArray<btSoftBody::Face>", %"struct.btAlignedObjectArray<btSoftBody::Tetra>", %"struct.btAlignedObjectArray<btSoftBody::Anchor>", %"struct.btAlignedObjectArray<btSoftBody::RContact>", %"struct.btAlignedObjectArray<btSoftBody::SContact>", %"struct.btAlignedObjectArray<btSoftBody::Joint*>", %"struct.btAlignedObjectArray<btSoftBody::Material*>", float, [2 x %struct.btSimdScalar], i8, %struct.btDbvt, %struct.btDbvt, %struct.btDbvt, %"struct.btAlignedObjectArray<btSoftBody::Cluster*>", %"struct.btAlignedObjectArray<bool>", %struct.btTransform, %"struct.btAlignedObjectArray<btSoftBody:
 :ePSolver::_>" }
-%"struct.btSoftBody::Anchor" = type { %"struct.btSoftBody::Node"*, %struct.btSimdScalar, %struct.btRigidBody*, %struct.btMatrix3x3, %struct.btSimdScalar, float }
-%"struct.btSoftBody::Body" = type { %"struct.btSoftBody::Cluster"*, %struct.btRigidBody*, %struct.btCollisionObject* }
-%"struct.btSoftBody::Cluster" = type { %"struct.btAlignedObjectArray<btSoftBody::Node*>", %"struct.btAlignedObjectArray<float>", %"struct.btAlignedObjectArray<btVector3>", %struct.btTransform, float, float, %struct.btMatrix3x3, %struct.btMatrix3x3, %struct.btSimdScalar, [2 x %struct.btSimdScalar], [2 x %struct.btSimdScalar], i32, i32, %struct.btSimdScalar, %struct.btSimdScalar, %struct.btDbvtNode*, float, float, float, float, float, float, i8, i8, i32 }
-%"struct.btSoftBody::Config" = type { i32, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, i32, i32, i32, i32, i32, %"struct.btAlignedObjectArray<btSoftBody::ePSolver::_>", %"struct.btAlignedObjectArray<btSoftBody::ePSolver::_>", %"struct.btAlignedObjectArray<btSoftBody::ePSolver::_>" }
-%"struct.btSoftBody::Element" = type { i8* }
-%"struct.btSoftBody::Face" = type { %"struct.btSoftBody::Feature", [3 x %"struct.btSoftBody::Node"*], %struct.btSimdScalar, float, %struct.btDbvtNode* }
-%"struct.btSoftBody::Feature" = type { %"struct.btSoftBody::Element", %"struct.btSoftBody::Material"* }
-%"struct.btSoftBody::Joint" = type { i32 (...)**, [2 x %"struct.btSoftBody::Body"], [2 x %struct.btSimdScalar], float, float, float, %struct.btSimdScalar, %struct.btSimdScalar, %struct.btMatrix3x3, i8 }
-%"struct.btSoftBody::Link" = type { %"struct.btSoftBody::Feature", [2 x %"struct.btSoftBody::Node"*], float, i8, float, float, float, %struct.btSimdScalar }
-%"struct.btSoftBody::Material" = type { %"struct.btSoftBody::Element", float, float, float, i32 }
-%"struct.btSoftBody::Node" = type { %"struct.btSoftBody::Feature", %struct.btSimdScalar, %struct.btSimdScalar, %struct.btSimdScalar, %struct.btSimdScalar, %struct.btSimdScalar, float, float, %struct.btDbvtNode*, i8 }
-%"struct.btSoftBody::Note" = type { %"struct.btSoftBody::Element", i8*, %struct.btSimdScalar, i32, [4 x %"struct.btSoftBody::Node"*], [4 x float] }
-%"struct.btSoftBody::Pose" = type { i8, i8, float, %"struct.btAlignedObjectArray<btVector3>", %"struct.btAlignedObjectArray<float>", %struct.btSimdScalar, %struct.btMatrix3x3, %struct.btMatrix3x3, %struct.btMatrix3x3 }
-%"struct.btSoftBody::RContact" = type { %"struct.btSoftBody::sCti", %"struct.btSoftBody::Node"*, %struct.btMatrix3x3, %struct.btSimdScalar, float, float, float }
-%"struct.btSoftBody::SContact" = type { %"struct.btSoftBody::Node"*, %"struct.btSoftBody::Face"*, %struct.btSimdScalar, %struct.btSimdScalar, float, float, [2 x float] }
-%"struct.btSoftBody::Tetra" = type { %"struct.btSoftBody::Feature", [4 x %"struct.btSoftBody::Node"*], float, %struct.btDbvtNode*, [4 x %struct.btSimdScalar], float, float }
-%"struct.btSoftBody::sCti" = type { %struct.btCollisionObject*, %struct.btSimdScalar, float }
-%struct.btSoftBodyWorldInfo = type { float, float, float, %struct.btSimdScalar, %struct.btActionInterface*, %struct.btActionInterface*, %struct.btSimdScalar, %"struct.btSparseSdf<3>" }
-%"struct.btSparseSdf<3>" = type { %"struct.btAlignedObjectArray<btSparseSdf<3>::Cell*>", float, i32, i32, i32, i32 }
-%"struct.btSparseSdf<3>::Cell" = type { [4 x [4 x [4 x float]]], [3 x i32], i32, i32, %struct.btCollisionShape*, %"struct.btSparseSdf<3>::Cell"* }
-%struct.btTransform = type { %struct.btMatrix3x3, %struct.btSimdScalar }
-%struct.btTypedConstraint = type { i32 (...)**, %"struct.btHashKey<btTriIndex>", i32, i32, i8, %struct.btRigidBody*, %struct.btRigidBody*, float, float, %struct.btSimdScalar, %struct.btSimdScalar, %struct.btSimdScalar }
-%struct.int3 = type { i32, i32, i32 }
-%"union.btDbvtNode::$_12" = type { [2 x %struct.btDbvtNode*] }
-%"union.btSimdScalar::$_13" = type { <4 x float> }
+declare i32 @_ZN11HullLibrary16CreateConvexHullERK8HullDescR10HullResult(i8*, i8* nocapture, i8* nocapture) ssp align 2
 
-declare i32 @_ZN11HullLibrary16CreateConvexHullERK8HullDescR10HullResult(%struct.HullLibrary*, %struct.HullDesc* nocapture, %struct.HullResult* nocapture) ssp align 2
-
-define void @_ZN17btSoftBodyHelpers4DrawEP10btSoftBodyP12btIDebugDrawi(%struct.btSoftBody* %psb, %struct.btActionInterface* %idraw, i32 %drawflags) ssp align 2 {
+define void @_ZN17btSoftBodyHelpers4DrawEP10btSoftBodyP12btIDebugDrawi(i8* %psb, i8* %idraw, i32 %drawflags) ssp align 2 {
 entry:
   br i1 undef, label %bb92, label %bb58
 
 bb58:                                             ; preds = %entry
-  %0 = invoke i32 @_ZN11HullLibrary16CreateConvexHullERK8HullDescR10HullResult(%struct.HullLibrary* undef, %struct.HullDesc* undef, %struct.HullResult* undef)
+  %0 = invoke i32 @_ZN11HullLibrary16CreateConvexHullERK8HullDescR10HullResult(i8* undef, i8* undef, i8* undef)
           to label %invcont64 unwind label %lpad159 ; <i32> [#uses=0]
 
 invcont64:                                        ; preds = %bb58




From stoklund at 2pi.dk  Wed Apr 14 15:57:52 2010
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Wed, 14 Apr 2010 13:57:52 -0700
Subject: [llvm-commits] [llvm] r100553 - in /llvm/trunk:
	lib/Target/X86/SSEDomainFix.cpp
	test/CodeGen/X86/2010-04-06-SSEDomainFixCrash.ll
In-Reply-To: <4BBC306E.8020801@mxc.ca>
References: <20100406194856.D28562A6C12C@llvm.org> <4BBC306E.8020801@mxc.ca>
Message-ID: <3C96BCCE-433E-40FF-A9BE-E70E34EAEDF2@2pi.dk>


On Apr 7, 2010, at 12:12 AM, Nick Lewycky wrote:
> 
> Jakob, is %struct.HullLibrary* relevant to the bug? It'd be great if you could reduce it out and lose all these types!

Fixed in r101286.

Thanks, Nick





From johnny.chen at apple.com  Wed Apr 14 16:03:14 2010
From: johnny.chen at apple.com (Johnny Chen)
Date: Wed, 14 Apr 2010 21:03:14 -0000
Subject: [llvm-commits] [llvm] r101290 - in
 /llvm/trunk/lib/Target/ARM/Disassembler: ARMDisassembler.cpp
 ARMDisassemblerCore.cpp ARMDisassemblerCore.h ThumbDisassemblerCore.h
Message-ID: <20100414210314.338412A6C12C@llvm.org>

Author: johnny
Date: Wed Apr 14 16:03:13 2010
New Revision: 101290

URL: http://llvm.org/viewvc/llvm-project?rev=101290&view=rev
Log:
Fixed another assert exposed by fuzzing.  The utility function getRegisterEnum()
was asserting because the (RegClass, RegNum) combination doesn't make sense from
an encoding point of view.

Since getRegisterEnum() is used all over the place, to change the code to check
for encoding error after each call would not only bloat the code, but also make
it less readable.  An Err flag is added to the ARMBasicMCBuilder where a client
can set a non-zero value to indicate some kind of error condition while building
up the MCInst.  ARMBasicMCBuilder::BuildIt() checks this flag and returns false
if a non-zero value is detected.

Modified:
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h
    llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp?rev=101290&r1=101289&r2=101290&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp Wed Apr 14 16:03:13 2010
@@ -495,7 +495,7 @@
     });
 
   ARMBasicMCBuilder *Builder = CreateMCBuilder(Opcode, Format);
-  Builder->setSession(const_cast<Session *>(&SO));
+  Builder->SetSession(const_cast<Session *>(&SO));
 
   if (!Builder)
     return false;

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp?rev=101290&r1=101289&r2=101290&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp Wed Apr 14 16:03:13 2010
@@ -76,7 +76,7 @@
 // Return the register enum Based on RegClass and the raw register number.
 // For DRegPair, see comments below.
 // FIXME: Auto-gened?
-static unsigned getRegisterEnum(unsigned RegClassID, unsigned RawRegister,
+static unsigned getRegisterEnum(BO B, unsigned RegClassID, unsigned RawRegister,
                                 bool DRegPair = false) {
 
   if (DRegPair && RegClassID == ARM::QPRRegClassID) {
@@ -346,7 +346,9 @@
     }
     break;
   }
-  assert(0 && "Invalid (RegClassID, RawRegister) combination");
+  errs() << "Invalid (RegClassID, RawRegister) combination\n";
+  // Encoding error.  Mark the builder with error code != 0.
+  B->SetErr(-1);
   return 0;
 }
 
@@ -510,7 +512,7 @@
 // Inst{3-0} => Rm
 // Inst{11-8} => Rs
 static bool DisassembleMulFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   const TargetInstrDesc &TID = ARMInsts[Opcode];
   unsigned short NumDefs = TID.getNumDefs();
@@ -530,26 +532,26 @@
   if (NumDefs == 2) {
     assert(NumOps >= 4 && OpInfo[3].RegClass == ARM::GPRRegClassID &&
            "Expect 4th register operand");
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRd(insn))));
     ++OpIdx;
   }
 
   // The destination register: RdHi{19-16} or Rd{19-16}.
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRn(insn))));
 
   // The two src regsiters: Rn{3-0}, then Rm{11-8}.
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRm(insn))));
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRs(insn))));
   OpIdx += 3;
 
   // Many multiply instructions (e.g., MLA) have three src registers.
   // The third register operand is Ra{15-12}.
   if (OpIdx < NumOps && OpInfo[OpIdx].RegClass == ARM::GPRRegClassID) {
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRd(insn))));
     ++OpIdx;
   }
@@ -611,7 +613,7 @@
 // and friends
 //
 static bool DisassembleCoprocessor(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   assert(NumOps >= 5 && "Num of operands >= 5 for coprocessor instr");
 
@@ -632,7 +634,7 @@
 
     MI.addOperand(MCOperand::CreateImm(decodeRd(insn)));
 
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRn(insn))));
 
     if (PW) {
@@ -652,11 +654,11 @@
 
     MI.addOperand(NoGPR ? MCOperand::CreateImm(decodeRd(insn))
                         : MCOperand::CreateReg(
-                            getRegisterEnum(ARM::GPRRegClassID,
+                            getRegisterEnum(B, ARM::GPRRegClassID,
                                             decodeRd(insn))));
 
     MI.addOperand(OneCopOpc ? MCOperand::CreateReg(
-                                getRegisterEnum(ARM::GPRRegClassID,
+                                getRegisterEnum(B, ARM::GPRRegClassID,
                                                 decodeRn(insn)))
                             : MCOperand::CreateImm(decodeRn(insn)));
 
@@ -689,10 +691,10 @@
 // SRSW/SRS: addrmode4:$addr mode_imm
 // RFEW/RFE: addrmode4:$addr Rn
 static bool DisassembleBrFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   if (CoprocessorOpcode(Opcode))
-    return DisassembleCoprocessor(MI, Opcode, insn, NumOps, NumOpsAdded);
+    return DisassembleCoprocessor(MI, Opcode, insn, NumOps, NumOpsAdded, B);
 
   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
   if (!OpInfo) return false;
@@ -701,7 +703,7 @@
   if (Opcode == ARM::MRS || Opcode == ARM::MRSsys) {
     assert(NumOps >= 1 && OpInfo[0].RegClass == ARM::GPRRegClassID &&
            "Reg operand expected");
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRd(insn))));
     NumOpsAdded = 1;
     return true;
@@ -710,7 +712,7 @@
   if (Opcode == ARM::BXJ) {
     assert(NumOps >= 1 && OpInfo[0].RegClass == ARM::GPRRegClassID &&
            "Reg operand expected");
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRm(insn))));
     NumOpsAdded = 1;
     return true;
@@ -719,7 +721,7 @@
   if (Opcode == ARM::MSR || Opcode == ARM::MSRsys) {
     assert(NumOps >= 1 && OpInfo[0].RegClass == ARM::GPRRegClassID &&
            "Reg operand expected");
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRm(insn))));
     MI.addOperand(MCOperand::CreateImm(slice(insn, 19, 16)));
     NumOpsAdded = 2;
@@ -750,7 +752,7 @@
     if (Opcode == ARM::SRSW || Opcode == ARM::SRS)
       MI.addOperand(MCOperand::CreateImm(slice(insn, 4, 0)));
     else
-      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                          decodeRn(insn))));
     NumOpsAdded = 3;
     return true;
@@ -793,7 +795,7 @@
 // BLXr9, BXr9
 // BRIND, BX_RET
 static bool DisassembleBrMiscFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
   if (!OpInfo) return false;
@@ -810,7 +812,7 @@
   if (Opcode == ARM::BLXr9 || Opcode == ARM::BRIND) {
     assert(NumOps >= 1 && OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
            "Reg operand expected");
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRm(insn))));
     OpIdx = 1;
     return true;
@@ -821,9 +823,9 @@
     // InOperandList with GPR:$target and GPR:$idx regs.
 
     assert(NumOps == 4 && "Expect 4 operands");
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRn(insn))));
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRm(insn))));
 
     // Fill in the two remaining imm operands to signify build completion.
@@ -839,7 +841,7 @@
     // InOperandList with GPR::$target reg.
 
     assert(NumOps == 3 && "Expect 3 operands");
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRm(insn))));
 
     // Fill in the two remaining imm operands to signify build completion.
@@ -856,13 +858,13 @@
     // See also ARMAddressingModes.h (Addressing Mode #2).
 
     assert(NumOps == 5 && getIBit(insn) == 1 && "Expect 5 operands && I-bit=1");
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRn(insn))));
 
     ARM_AM::AddrOpc AddrOpcode = getUBit(insn) ? ARM_AM::add : ARM_AM::sub;
 
     // Disassemble the offset reg (Rm), shift type, and immediate shift length.
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRm(insn))));
     // Inst{6-5} encodes the shift opcode.
     ARM_AM::ShiftOpc ShOp = getShiftOpcForBits(slice(insn, 6, 5));
@@ -933,7 +935,7 @@
 // operations have Rd Rm Rn, instead of the "normal" Rd Rn Rm.
 // They are QADD, QDADD, QDSUB, and QSUB.
 static bool DisassembleDPFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   const TargetInstrDesc &TID = ARMInsts[Opcode];
   unsigned short NumDefs = TID.getNumDefs();
@@ -945,7 +947,7 @@
 
   // Disassemble register def if there is one.
   if (NumDefs && (OpInfo[OpIdx].RegClass == ARM::GPRRegClassID)) {
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRd(insn))));
     ++OpIdx;
   }
@@ -958,7 +960,7 @@
   if (SaturateOpcode(Opcode)) {
     MI.addOperand(MCOperand::CreateImm(decodeSaturatePos(Opcode, insn)));
 
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRm(insn))));
 
     if (Opcode == ARM::SSAT16 || Opcode == ARM::USAT16) {
@@ -986,7 +988,7 @@
   if (Opcode == ARM::BFC || Opcode == ARM::BFI) {
     // TIED_TO operand skipped for BFC and Inst{3-0} (Reg) for BFI.
     MI.addOperand(MCOperand::CreateReg(Opcode == ARM::BFC ? 0
-                                       : getRegisterEnum(ARM::GPRRegClassID,
+                                       : getRegisterEnum(B, ARM::GPRRegClassID,
                                                          decodeRm(insn))));
     uint32_t mask = 0;
     if (!getBFCInvMask(insn, mask))
@@ -997,7 +999,7 @@
     return true;
   }
   if (Opcode == ARM::SBFX || Opcode == ARM::UBFX) {
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRm(insn))));
     MI.addOperand(MCOperand::CreateImm(slice(insn, 11, 7)));
     MI.addOperand(MCOperand::CreateImm(slice(insn, 20, 16) + 1));
@@ -1013,7 +1015,7 @@
     assert(OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
            "Reg operand expected");
     MI.addOperand(MCOperand::CreateReg(
-                    getRegisterEnum(ARM::GPRRegClassID,
+                    getRegisterEnum(B, ARM::GPRRegClassID,
                                     RmRn ? decodeRm(insn) : decodeRn(insn))));
     ++OpIdx;
   }
@@ -1034,7 +1036,7 @@
     // routed here as well.
     // assert(getIBit(insn) == 0 && "I_Bit != '0' reg/reg form");
     MI.addOperand(MCOperand::CreateReg(
-                    getRegisterEnum(ARM::GPRRegClassID,
+                    getRegisterEnum(B, ARM::GPRRegClassID,
                                     RmRn? decodeRn(insn) : decodeRm(insn))));
     ++OpIdx;
   } else if (Opcode == ARM::MOVi16 || Opcode == ARM::MOVTi16) {
@@ -1059,7 +1061,7 @@
 }
 
 static bool DisassembleDPSoRegFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   const TargetInstrDesc &TID = ARMInsts[Opcode];
   unsigned short NumDefs = TID.getNumDefs();
@@ -1071,7 +1073,7 @@
 
   // Disassemble register def if there is one.
   if (NumDefs && (OpInfo[OpIdx].RegClass == ARM::GPRRegClassID)) {
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRd(insn))));
     ++OpIdx;
   }
@@ -1084,7 +1086,7 @@
   if (!isUnary) {
     assert(OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
            "Reg operand expected");
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRn(insn))));
     ++OpIdx;
   }
@@ -1107,11 +1109,11 @@
   // Register-controlled shifts have Inst{7} = 0 and Inst{4} = 1.
   unsigned Rs = slice(insn, 4, 4);
 
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRm(insn))));
   if (Rs) {
     // Register-controlled shifts: [Rm, Rs, shift].
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRs(insn))));
     // Inst{6-5} encodes the shift opcode.
     ARM_AM::ShiftOpc ShOp = getShiftOpcForBits(slice(insn, 6, 5));
@@ -1134,7 +1136,7 @@
 }
 
 static bool DisassembleLdStFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, bool isStore) {
+    unsigned short NumOps, unsigned &NumOpsAdded, bool isStore, BO B) {
 
   const TargetInstrDesc &TID = ARMInsts[Opcode];
   bool isPrePost = isPrePostLdSt(TID.TSFlags);
@@ -1153,7 +1155,7 @@
   if (isPrePost && isStore) {
     assert(OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
            "Reg operand expected");
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRn(insn))));
     ++OpIdx;
   }
@@ -1164,7 +1166,7 @@
 
   assert(OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
          "Reg operand expected");
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRd(insn))));
   ++OpIdx;
 
@@ -1172,7 +1174,7 @@
   if (isPrePost && !isStore) {
     assert(OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
            "Reg operand expected");
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRn(insn))));
     ++OpIdx;
   }
@@ -1185,7 +1187,7 @@
          "Reg operand expected");
   assert((!isPrePost || (TID.getOperandConstraint(OpIdx, TOI::TIED_TO) != -1))
          && "Index mode or tied_to operand expected");
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRn(insn))));
   ++OpIdx;
 
@@ -1209,7 +1211,7 @@
     MI.addOperand(MCOperand::CreateImm(Offset));
   } else {
     // Disassemble the offset reg (Rm), shift type, and immediate shift length.
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRm(insn))));
     // Inst{6-5} encodes the shift opcode.
     ARM_AM::ShiftOpc ShOp = getShiftOpcForBits(slice(insn, 6, 5));
@@ -1227,13 +1229,13 @@
 }
 
 static bool DisassembleLdFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
-  return DisassembleLdStFrm(MI, Opcode, insn, NumOps, NumOpsAdded, false);
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
+  return DisassembleLdStFrm(MI, Opcode, insn, NumOps, NumOpsAdded, false, B);
 }
 
 static bool DisassembleStFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
-  return DisassembleLdStFrm(MI, Opcode, insn, NumOps, NumOpsAdded, true);
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
+  return DisassembleLdStFrm(MI, Opcode, insn, NumOps, NumOpsAdded, true, B);
 }
 
 static bool HasDualReg(unsigned Opcode) {
@@ -1247,7 +1249,7 @@
 }
 
 static bool DisassembleLdStMiscFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, bool isStore) {
+    unsigned short NumOps, unsigned &NumOpsAdded, bool isStore, BO B) {
 
   const TargetInstrDesc &TID = ARMInsts[Opcode];
   bool isPrePost = isPrePostLdSt(TID.TSFlags);
@@ -1266,7 +1268,7 @@
   if (isPrePost && isStore) {
     assert(OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
            "Reg operand expected");
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRn(insn))));
     ++OpIdx;
   }
@@ -1279,13 +1281,13 @@
 
   assert(OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
          "Reg operand expected");
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRd(insn))));
   ++OpIdx;
 
   // Fill in LDRD and STRD's second operand.
   if (DualReg) {
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRd(insn) + 1)));
     ++OpIdx;
   }
@@ -1294,7 +1296,7 @@
   if (isPrePost && !isStore) {
     assert(OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
            "Reg operand expected");
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRn(insn))));
     ++OpIdx;
   }
@@ -1307,7 +1309,7 @@
          "Reg operand expected");
   assert((!isPrePost || (TID.getOperandConstraint(OpIdx, TOI::TIED_TO) != -1))
          && "Index mode or tied_to operand expected");
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRn(insn))));
   ++OpIdx;
 
@@ -1332,7 +1334,7 @@
     MI.addOperand(MCOperand::CreateImm(Offset));
   } else {
     // Disassemble the offset reg (Rm).
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRm(insn))));
     unsigned Offset = ARM_AM::getAM3Opc(AddrOpcode, 0);
     MI.addOperand(MCOperand::CreateImm(Offset));
@@ -1343,13 +1345,14 @@
 }
 
 static bool DisassembleLdMiscFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
-  return DisassembleLdStMiscFrm(MI, Opcode, insn, NumOps, NumOpsAdded, false);
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
+  return DisassembleLdStMiscFrm(MI, Opcode, insn, NumOps, NumOpsAdded, false,
+                                B);
 }
 
 static bool DisassembleStMiscFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
-  return DisassembleLdStMiscFrm(MI, Opcode, insn, NumOps, NumOpsAdded, true);
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
+  return DisassembleLdStMiscFrm(MI, Opcode, insn, NumOps, NumOpsAdded, true, B);
 }
 
 // The algorithm for disassembly of LdStMulFrm is different from others because
@@ -1357,7 +1360,7 @@
 // and operand 1 (the AM4 mode imm).  After operand 3, we need to populate the
 // reglist with each affected register encoded as an MCOperand.
 static bool DisassembleLdStMulFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   assert(NumOps >= 5 && "LdStMulFrm expects NumOps >= 5");
 
@@ -1365,7 +1368,7 @@
 
   OpIdx = 0;
 
-  unsigned Base = getRegisterEnum(ARM::GPRRegClassID, decodeRn(insn));
+  unsigned Base = getRegisterEnum(B, ARM::GPRRegClassID, decodeRn(insn));
 
   // Writeback to base, if necessary.
   if (Opcode == ARM::LDM_UPD || Opcode == ARM::STM_UPD) {
@@ -1389,7 +1392,7 @@
   unsigned RegListBits = insn & ((1 << 16) - 1);
   for (unsigned i = 0; i < 16; ++i) {
     if ((RegListBits >> i) & 1) {
-      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                          i)));
       ++OpIdx;
     }
@@ -1405,7 +1408,7 @@
 //
 // SWP, SWPB:             Rd Rm Rn
 static bool DisassembleLdStExFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
   if (!OpInfo) return false;
@@ -1423,29 +1426,29 @@
   bool isDW = (Opcode == ARM::LDREXD || Opcode == ARM::STREXD);
 
   // Add the destination operand.
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRd(insn))));
   ++OpIdx;
 
   // Store register Exclusive needs a source operand.
   if (isStore) {
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRm(insn))));
     ++OpIdx;
 
     if (isDW) {
-      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                          decodeRm(insn)+1)));
       ++OpIdx;
     }
   } else if (isDW) {
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRd(insn)+1)));
     ++OpIdx;
   }
 
   // Finally add the pointer operand.
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRn(insn))));
   ++OpIdx;
 
@@ -1457,7 +1460,7 @@
 // PKHBT, PKHTB: Rd Rn Rm , LSL/ASR #imm5
 // RBIT, REV, REV16, REVSH: Rd Rm
 static bool DisassembleArithMiscFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
   unsigned &OpIdx = NumOpsAdded;
@@ -1471,18 +1474,18 @@
 
   bool ThreeReg = NumOps > 2 && OpInfo[2].RegClass == ARM::GPRRegClassID;
 
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRd(insn))));
   ++OpIdx;
 
   if (ThreeReg) {
     assert(NumOps >= 4 && "Expect >= 4 operands");
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRn(insn))));
     ++OpIdx;
   }
 
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRm(insn))));
   ++OpIdx;
 
@@ -1504,7 +1507,7 @@
 // The 2nd operand register is Rn and the 3rd operand regsiter is Rm for the
 // three register operand form.  Otherwise, Rn=0b1111 and only Rm is used.
 static bool DisassembleExtFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
   unsigned &OpIdx = NumOpsAdded;
@@ -1518,17 +1521,17 @@
 
   bool ThreeReg = NumOps > 2 && OpInfo[2].RegClass == ARM::GPRRegClassID;
 
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRd(insn))));
   ++OpIdx;
 
   if (ThreeReg) {
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRn(insn))));
     ++OpIdx;
   }
 
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRm(insn))));
   ++OpIdx;
 
@@ -1610,7 +1613,7 @@
 // VCVTDS, VCVTSD: converts between double-precision and single-precision
 // The rest of the instructions have homogeneous [VFP]Rd and [VFP]Rm registers.
 static bool DisassembleVFPUnaryFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   assert(NumOps >= 1 && "VFPUnaryFrm expects NumOps >= 1");
 
@@ -1625,7 +1628,7 @@
   bool isSP = (RegClass == ARM::SPRRegClassID);
 
   MI.addOperand(MCOperand::CreateReg(
-                  getRegisterEnum(RegClass, decodeVFPRd(insn, isSP))));
+                  getRegisterEnum(B, RegClass, decodeVFPRd(insn, isSP))));
   ++OpIdx;
 
   // Early return for compare with zero instructions.
@@ -1639,7 +1642,7 @@
   isSP = (RegClass == ARM::SPRRegClassID);
 
   MI.addOperand(MCOperand::CreateReg(
-                  getRegisterEnum(RegClass, decodeVFPRm(insn, isSP))));
+                  getRegisterEnum(B, RegClass, decodeVFPRm(insn, isSP))));
   ++OpIdx;
 
   return true;
@@ -1650,7 +1653,7 @@
 // InOperandList to that of the dst.  As far as asm printing is concerned, this
 // tied_to operand is simply skipped.
 static bool DisassembleVFPBinaryFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   assert(NumOps >= 3 && "VFPBinaryFrm expects NumOps >= 3");
 
@@ -1666,7 +1669,7 @@
   bool isSP = (RegClass == ARM::SPRRegClassID);
 
   MI.addOperand(MCOperand::CreateReg(
-                  getRegisterEnum(RegClass, decodeVFPRd(insn, isSP))));
+                  getRegisterEnum(B, RegClass, decodeVFPRd(insn, isSP))));
   ++OpIdx;
 
   // Skip tied_to operand constraint.
@@ -1677,11 +1680,11 @@
   }
 
   MI.addOperand(MCOperand::CreateReg(
-                  getRegisterEnum(RegClass, decodeVFPRn(insn, isSP))));
+                  getRegisterEnum(B, RegClass, decodeVFPRn(insn, isSP))));
   ++OpIdx;
 
   MI.addOperand(MCOperand::CreateReg(
-                  getRegisterEnum(RegClass, decodeVFPRm(insn, isSP))));
+                  getRegisterEnum(B, RegClass, decodeVFPRm(insn, isSP))));
   ++OpIdx;
 
   return true;
@@ -1694,7 +1697,7 @@
 // A8.6.297 vcvt (floating-point and fixed-point)
 // Dd|Sd Dd|Sd(TIED_TO) #fbits(= 16|32 - UInt(imm4:i))
 static bool DisassembleVFPConv1Frm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   assert(NumOps >= 2 && "VFPConv1Frm expects NumOps >= 2");
 
@@ -1712,7 +1715,7 @@
     int size = slice(insn, 7, 7) == 0 ? 16 : 32;
     int fbits = size - (slice(insn,3,0) << 1 | slice(insn,5,5));
     MI.addOperand(MCOperand::CreateReg(
-                    getRegisterEnum(RegClassID,
+                    getRegisterEnum(B, RegClassID,
                                     decodeVFPRd(insn, SP))));
 
     assert(TID.getOperandConstraint(1, TOI::TIED_TO) != -1 &&
@@ -1732,15 +1735,15 @@
     if (slice(insn, 18, 18) == 1) { // to_integer operation
       d = decodeVFPRd(insn, true /* Is Single Precision */);
       MI.addOperand(MCOperand::CreateReg(
-                      getRegisterEnum(ARM::SPRRegClassID, d)));
+                      getRegisterEnum(B, ARM::SPRRegClassID, d)));
       m = decodeVFPRm(insn, SP);
-      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(RegClassID, m)));
+      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, RegClassID, m)));
     } else {
       d = decodeVFPRd(insn, SP);
-      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(RegClassID, d)));
+      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, RegClassID, d)));
       m = decodeVFPRm(insn, true /* Is Single Precision */);
       MI.addOperand(MCOperand::CreateReg(
-                      getRegisterEnum(ARM::SPRRegClassID, m)));
+                      getRegisterEnum(B, ARM::SPRRegClassID, m)));
     }
     NumOpsAdded = 2;
   }
@@ -1751,13 +1754,13 @@
 // VMOVRS - A8.6.330
 // Rt => Rd; Sn => UInt(Vn:N)
 static bool DisassembleVFPConv2Frm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   assert(NumOps >= 2 && "VFPConv2Frm expects NumOps >= 2");
 
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRd(insn))));
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::SPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::SPRRegClassID,
                                                      decodeVFPRn(insn, true))));
   NumOpsAdded = 2;
   return true;
@@ -1769,29 +1772,29 @@
 // VMOVRRS - A8.6.331
 // Rt => Rd; Rt2 => Rn; Sm => UInt(Vm:M); Sm1 = Sm+1
 static bool DisassembleVFPConv3Frm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   assert(NumOps >= 3 && "VFPConv3Frm expects NumOps >= 3");
 
   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
   unsigned &OpIdx = NumOpsAdded;
 
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRd(insn))));
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRn(insn))));
   OpIdx = 2;
 
   if (OpInfo[OpIdx].RegClass == ARM::SPRRegClassID) {
     unsigned Sm = decodeVFPRm(insn, true);
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::SPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::SPRRegClassID,
                                                        Sm)));
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::SPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::SPRRegClassID,
                                                        Sm+1)));
     OpIdx += 2;
   } else {
     MI.addOperand(MCOperand::CreateReg(
-                    getRegisterEnum(ARM::DPRRegClassID,
+                    getRegisterEnum(B, ARM::DPRRegClassID,
                                     decodeVFPRm(insn, false))));
     ++OpIdx;
   }
@@ -1801,13 +1804,13 @@
 // VMOVSR - A8.6.330
 // Rt => Rd; Sn => UInt(Vn:N)
 static bool DisassembleVFPConv4Frm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   assert(NumOps >= 2 && "VFPConv4Frm expects NumOps >= 2");
 
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::SPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::SPRRegClassID,
                                                      decodeVFPRn(insn, true))));
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRd(insn))));
   NumOpsAdded = 2;
   return true;
@@ -1819,7 +1822,7 @@
 // VMOVRRS - A8.6.331
 // Rt => Rd; Rt2 => Rn; Sm => UInt(Vm:M); Sm1 = Sm+1
 static bool DisassembleVFPConv5Frm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   assert(NumOps >= 3 && "VFPConv5Frm expects NumOps >= 3");
 
@@ -1830,21 +1833,21 @@
 
   if (OpInfo[OpIdx].RegClass == ARM::SPRRegClassID) {
     unsigned Sm = decodeVFPRm(insn, true);
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::SPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::SPRRegClassID,
                                                        Sm)));
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::SPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::SPRRegClassID,
                                                        Sm+1)));
     OpIdx += 2;
   } else {
     MI.addOperand(MCOperand::CreateReg(
-                    getRegisterEnum(ARM::DPRRegClassID,
+                    getRegisterEnum(B, ARM::DPRRegClassID,
                                     decodeVFPRm(insn, false))));
     ++OpIdx;
   }
 
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRd(insn))));
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRn(insn))));
   OpIdx += 2;
   return true;
@@ -1853,7 +1856,7 @@
 // VFP Load/Store Instructions.
 // VLDRD, VLDRS, VSTRD, VSTRS
 static bool DisassembleVFPLdStFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   assert(NumOps >= 3 && "VFPLdStFrm expects NumOps >= 3");
 
@@ -1863,9 +1866,9 @@
   // Extract Dd/Sd for operand 0.
   unsigned RegD = decodeVFPRd(insn, isSPVFP);
 
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(RegClassID, RegD)));
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, RegClassID, RegD)));
 
-  unsigned Base = getRegisterEnum(ARM::GPRRegClassID, decodeRn(insn));
+  unsigned Base = getRegisterEnum(B, ARM::GPRRegClassID, decodeRn(insn));
   MI.addOperand(MCOperand::CreateReg(Base));
 
   // Next comes the AM5 Opcode.
@@ -1885,7 +1888,7 @@
 //
 // VLDMD[_UPD], VLDMS[_UPD], VSTMD[_UPD], VSTMS[_UPD]
 static bool DisassembleVFPLdStMulFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   assert(NumOps >= 5 && "VFPLdStMulFrm expects NumOps >= 5");
 
@@ -1893,7 +1896,7 @@
 
   OpIdx = 0;
 
-  unsigned Base = getRegisterEnum(ARM::GPRRegClassID, decodeRn(insn));
+  unsigned Base = getRegisterEnum(B, ARM::GPRRegClassID, decodeRn(insn));
 
   // Writeback to base, if necessary.
   if (Opcode == ARM::VLDMD_UPD || Opcode == ARM::VLDMS_UPD ||
@@ -1926,7 +1929,7 @@
   // Fill the variadic part of reglist.
   unsigned Regs = isSPVFP ? Imm8 : Imm8/2;
   for (unsigned i = 0; i < Regs; ++i) {
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(RegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, RegClassID,
                                                        RegD + i)));
     ++OpIdx;
   }
@@ -1940,7 +1943,7 @@
 // FCONSTS (SPR and a VFPf32Imm operand)
 // VMRS/VMSR (GPR operand)
 static bool DisassembleVFPMiscFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
   unsigned &OpIdx = NumOpsAdded;
@@ -1955,13 +1958,13 @@
   unsigned RegEnum = 0;
   switch (OpInfo[0].RegClass) {
   case ARM::DPRRegClassID:
-    RegEnum = getRegisterEnum(ARM::DPRRegClassID, decodeVFPRd(insn, false));
+    RegEnum = getRegisterEnum(B, ARM::DPRRegClassID, decodeVFPRd(insn, false));
     break;
   case ARM::SPRRegClassID:
-    RegEnum = getRegisterEnum(ARM::SPRRegClassID, decodeVFPRd(insn, true));
+    RegEnum = getRegisterEnum(B, ARM::SPRRegClassID, decodeVFPRd(insn, true));
     break;
   case ARM::GPRRegClassID:
-    RegEnum = getRegisterEnum(ARM::GPRRegClassID, decodeRd(insn));
+    RegEnum = getRegisterEnum(B, ARM::GPRRegClassID, decodeRd(insn));
     break;
   default:
     assert(0 && "Invalid reg class id");
@@ -2231,7 +2234,8 @@
 //
 // Correctly set VLD*/VST*'s TIED_TO GPR, as the asm printer needs it.
 static bool DisassembleNLdSt0(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, bool Store, bool DblSpaced) {
+    unsigned short NumOps, unsigned &NumOpsAdded, bool Store, bool DblSpaced,
+    BO B) {
 
   const TargetInstrDesc &TID = ARMInsts[Opcode];
   const TargetOperandInfo *OpInfo = TID.OpInfo;
@@ -2259,7 +2263,7 @@
   // LLVM Addressing Mode #6.
   unsigned RmEnum = 0;
   if (WB && Rm != 13)
-    RmEnum = getRegisterEnum(ARM::GPRRegClassID, Rm);
+    RmEnum = getRegisterEnum(B, ARM::GPRRegClassID, Rm);
 
   if (Store) {
     // Consume possible WB, AddrMode6, possible increment reg, the DPR/QPR's,
@@ -2268,14 +2272,14 @@
            "Reg operand expected");
 
     if (WB) {
-      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                          Rn)));
       ++OpIdx;
     }
 
     assert((OpIdx+1) < NumOps && OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
            OpInfo[OpIdx + 1].RegClass == 0 && "Addrmode #6 Operands expected");
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        Rn)));
     MI.addOperand(MCOperand::CreateImm(0)); // Alignment ignored?
     OpIdx += 2;
@@ -2293,9 +2297,10 @@
     RegClass = OpInfo[OpIdx].RegClass;
     while (OpIdx < NumOps && OpInfo[OpIdx].RegClass == RegClass) {
       if (Opcode >= ARM::VST1q16 && Opcode <= ARM::VST1q8)
-        MI.addOperand(MCOperand::CreateReg(getRegisterEnum(RegClass,Rd,true)));
+        MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, RegClass, Rd,
+                                                           true)));
       else
-        MI.addOperand(MCOperand::CreateReg(getRegisterEnum(RegClass,Rd)));
+        MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, RegClass,Rd)));
       Rd += Inc;
       ++OpIdx;
     }
@@ -2314,22 +2319,23 @@
 
     while (OpIdx < NumOps && OpInfo[OpIdx].RegClass == RegClass) {
       if (Opcode >= ARM::VLD1q16 && Opcode <= ARM::VLD1q8)
-        MI.addOperand(MCOperand::CreateReg(getRegisterEnum(RegClass,Rd,true)));
+        MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, RegClass, Rd,
+                                                           true)));
       else
-        MI.addOperand(MCOperand::CreateReg(getRegisterEnum(RegClass,Rd)));
+        MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, RegClass, Rd)));
       Rd += Inc;
       ++OpIdx;
     }
 
     if (WB) {
-      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                          Rn)));
       ++OpIdx;
     }
 
     assert((OpIdx+1) < NumOps && OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
            OpInfo[OpIdx + 1].RegClass == 0 && "Addrmode #6 Operands expected");
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        Rn)));
     MI.addOperand(MCOperand::CreateImm(0)); // Alignment ignored?
     OpIdx += 2;
@@ -2362,7 +2368,7 @@
 // Find out about double-spaced-ness of the Opcode and pass it on to
 // DisassembleNLdSt0().
 static bool DisassembleNLdSt(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   const StringRef Name = ARMInsts[Opcode].Name;
   bool DblSpaced = false;
@@ -2397,13 +2403,13 @@
     
   }
   return DisassembleNLdSt0(MI, Opcode, insn, NumOps, NumOpsAdded,
-                           slice(insn, 21, 21) == 0, DblSpaced);
+                           slice(insn, 21, 21) == 0, DblSpaced, B);
 }
 
 // VMOV (immediate)
 //   Qd/Dd imm
 static bool DisassembleN1RegModImmFrm(MCInst &MI, unsigned Opcode,
-    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   const TargetInstrDesc &TID = ARMInsts[Opcode];
   const TargetOperandInfo *OpInfo = TID.OpInfo;
@@ -2415,7 +2421,7 @@
          "Expect 1 reg operand followed by 1 imm operand");
 
   // Qd/Dd = Inst{22:15-12} => NEON Rd
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(OpInfo[0].RegClass,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, OpInfo[0].RegClass,
                                                      decodeNEONRd(insn))));
 
   ElemSize esize = ESizeNA;
@@ -2471,7 +2477,7 @@
 //
 // Others
 static bool DisassembleNVdVmOptImm(MCInst &MI, unsigned Opc, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, N2VFlag Flag = N2V_None) {
+    unsigned short NumOps, unsigned &NumOpsAdded, N2VFlag Flag, BO B) {
 
   const TargetInstrDesc &TID = ARMInsts[Opc];
   const TargetOperandInfo *OpInfo = TID.OpInfo;
@@ -2498,7 +2504,7 @@
   }
 
   // Qd/Dd = Inst{22:15-12} => NEON Rd
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(OpInfo[OpIdx].RegClass,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, OpInfo[OpIdx].RegClass,
                                                      decodeNEONRd(insn))));
   ++OpIdx;
 
@@ -2510,7 +2516,7 @@
   }
 
   // Dm = Inst{5:3-0} => NEON Rm
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(OpInfo[OpIdx].RegClass,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, OpInfo[OpIdx].RegClass,
                                                      decodeNEONRm(insn))));
   ++OpIdx;
 
@@ -2543,21 +2549,22 @@
 }
 
 static bool DisassembleN2RegFrm(MCInst &MI, unsigned Opc, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
-  return DisassembleNVdVmOptImm(MI, Opc, insn, NumOps, NumOpsAdded);
+  return DisassembleNVdVmOptImm(MI, Opc, insn, NumOps, NumOpsAdded,
+                                N2V_None, B);
 }
 static bool DisassembleNVCVTFrm(MCInst &MI, unsigned Opc, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   return DisassembleNVdVmOptImm(MI, Opc, insn, NumOps, NumOpsAdded,
-                                N2V_VectorConvert_Between_Float_Fixed);
+                                N2V_VectorConvert_Between_Float_Fixed, B);
 }
 static bool DisassembleNVecDupLnFrm(MCInst &MI, unsigned Opc, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   return DisassembleNVdVmOptImm(MI, Opc, insn, NumOps, NumOpsAdded,
-                                N2V_VectorDupLane);
+                                N2V_VectorDupLane, B);
 }
 
 // Vector Shift [Accumulate] Instructions.
@@ -2567,7 +2574,7 @@
 // VSHLLi16, VSHLLi32, VSHLLi8: Qd Dm imm (== size)
 //
 static bool DisassembleNVectorShift(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, bool LeftShift) {
+    unsigned short NumOps, unsigned &NumOpsAdded, bool LeftShift, BO B) {
 
   const TargetInstrDesc &TID = ARMInsts[Opcode];
   const TargetOperandInfo *OpInfo = TID.OpInfo;
@@ -2584,7 +2591,7 @@
   OpIdx = 0;
 
   // Qd/Dd = Inst{22:15-12} => NEON Rd
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(OpInfo[OpIdx].RegClass,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, OpInfo[OpIdx].RegClass,
                                                      decodeNEONRd(insn))));
   ++OpIdx;
 
@@ -2599,7 +2606,7 @@
          "Reg operand expected");
 
   // Qm/Dm = Inst{5:3-0} => NEON Rm
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(OpInfo[OpIdx].RegClass,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, OpInfo[OpIdx].RegClass,
                                                      decodeNEONRm(insn))));
   ++OpIdx;
 
@@ -2631,15 +2638,17 @@
 
 // Left shift instructions.
 static bool DisassembleN2RegVecShLFrm(MCInst &MI, unsigned Opcode,
-    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
-  return DisassembleNVectorShift(MI, Opcode, insn, NumOps, NumOpsAdded, true);
+  return DisassembleNVectorShift(MI, Opcode, insn, NumOps, NumOpsAdded, true,
+                                 B);
 }
 // Right shift instructions have different shift amount interpretation.
 static bool DisassembleN2RegVecShRFrm(MCInst &MI, unsigned Opcode,
-    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
-  return DisassembleNVectorShift(MI, Opcode, insn, NumOps, NumOpsAdded, false);
+  return DisassembleNVectorShift(MI, Opcode, insn, NumOps, NumOpsAdded, false,
+                                 B);
 }
 
 namespace {
@@ -2664,7 +2673,7 @@
 //
 // Others
 static bool DisassembleNVdVnVmOptImm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, N3VFlag Flag = N3V_None) {
+    unsigned short NumOps, unsigned &NumOpsAdded, N3VFlag Flag, BO B) {
 
   const TargetInstrDesc &TID = ARMInsts[Opcode];
   const TargetOperandInfo *OpInfo = TID.OpInfo;
@@ -2693,7 +2702,7 @@
   }
 
   // Qd/Dd = Inst{22:15-12} => NEON Rd
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(OpInfo[OpIdx].RegClass,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, OpInfo[OpIdx].RegClass,
                                                      decodeNEONRd(insn))));
   ++OpIdx;
 
@@ -2708,7 +2717,7 @@
   // or
   // Dm = Inst{5:3-0} => NEON Rm
   MI.addOperand(MCOperand::CreateReg(
-                  getRegisterEnum(OpInfo[OpIdx].RegClass,
+                  getRegisterEnum(B, OpInfo[OpIdx].RegClass,
                                   VdVnVm ? decodeNEONRn(insn)
                                          : decodeNEONRm(insn))));
   ++OpIdx;
@@ -2728,7 +2737,7 @@
                       : decodeNEONRn(insn);
 
   MI.addOperand(MCOperand::CreateReg(
-                  getRegisterEnum(OpInfo[OpIdx].RegClass, m)));
+                  getRegisterEnum(B, OpInfo[OpIdx].RegClass, m)));
   ++OpIdx;
 
   if (OpIdx < NumOps && OpInfo[OpIdx].RegClass == 0
@@ -2752,27 +2761,28 @@
 }
 
 static bool DisassembleN3RegFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
-  return DisassembleNVdVnVmOptImm(MI, Opcode, insn, NumOps, NumOpsAdded);
+  return DisassembleNVdVnVmOptImm(MI, Opcode, insn, NumOps, NumOpsAdded,
+                                  N3V_None, B);
 }
 static bool DisassembleN3RegVecShFrm(MCInst &MI, unsigned Opcode,
-    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   return DisassembleNVdVnVmOptImm(MI, Opcode, insn, NumOps, NumOpsAdded,
-                                  N3V_VectorShift);
+                                  N3V_VectorShift, B);
 }
 static bool DisassembleNVecExtractFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   return DisassembleNVdVnVmOptImm(MI, Opcode, insn, NumOps, NumOpsAdded,
-                                  N3V_VectorExtract);
+                                  N3V_VectorExtract, B);
 }
 static bool DisassembleNVecMulScalarFrm(MCInst &MI, unsigned Opcode,
-    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   return DisassembleNVdVnVmOptImm(MI, Opcode, insn, NumOps, NumOpsAdded,
-                                  N3V_Multiply_By_Scalar);
+                                  N3V_Multiply_By_Scalar, B);
 }
 
 // Vector Table Lookup
@@ -2782,7 +2792,7 @@
 // VTBL3, VTBX3: Dd [Dd(TIED_TO)] Dn Dn+1 Dn+2 Dm
 // VTBL4, VTBX4: Dd [Dd(TIED_TO)] Dn Dn+1 Dn+2 Dn+3 Dm
 static bool DisassembleNVTBLFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   const TargetInstrDesc &TID = ARMInsts[Opcode];
   const TargetOperandInfo *OpInfo = TID.OpInfo;
@@ -2807,7 +2817,7 @@
   unsigned Len = slice(insn, 9, 8) + 1;
 
   // Dd (the destination vector)
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::DPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::DPRRegClassID,
                                                      decodeNEONRd(insn))));
   ++OpIdx;
 
@@ -2822,7 +2832,7 @@
   for (unsigned i = 0; i < Len; ++i) {
     assert(OpIdx < NumOps && OpInfo[OpIdx].RegClass == ARM::DPRRegClassID &&
            "Reg operand expected");
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::DPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::DPRRegClassID,
                                                        Rn + i)));
     ++OpIdx;
   }
@@ -2830,7 +2840,7 @@
   // Dm (the index vector)
   assert(OpIdx < NumOps && OpInfo[OpIdx].RegClass == ARM::DPRRegClassID &&
          "Reg operand (index vector) expected");
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::DPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::DPRRegClassID,
                                                      decodeNEONRm(insn))));
   ++OpIdx;
 
@@ -2846,7 +2856,7 @@
 // Vector Get Lane (move scalar to ARM core register) Instructions.
 // VGETLNi32, VGETLNs16, VGETLNs8, VGETLNu16, VGETLNu8: Rt Dn index
 static bool DisassembleNEONGetLnFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   const TargetInstrDesc &TID = ARMInsts[Opcode];
   const TargetOperandInfo *OpInfo = TID.OpInfo;
@@ -2864,11 +2874,11 @@
                                                                 : ESize32);
 
   // Rt = Inst{15-12} => ARM Rd
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRd(insn))));
 
   // Dn = Inst{7:19-16} => NEON Rn
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::DPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::DPRRegClassID,
                                                      decodeNEONRn(insn))));
 
   MI.addOperand(MCOperand::CreateImm(decodeNVLaneOpIndex(insn, esize)));
@@ -2880,7 +2890,7 @@
 // Vector Set Lane (move ARM core register to scalar) Instructions.
 // VSETLNi16, VSETLNi32, VSETLNi8: Dd Dd (TIED_TO) Rt index
 static bool DisassembleNEONSetLnFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   const TargetInstrDesc &TID = ARMInsts[Opcode];
   const TargetOperandInfo *OpInfo = TID.OpInfo;
@@ -2900,14 +2910,14 @@
                                                         : ESize32);
 
   // Dd = Inst{7:19-16} => NEON Rn
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::DPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::DPRRegClassID,
                                                      decodeNEONRn(insn))));
 
   // TIED_TO operand.
   MI.addOperand(MCOperand::CreateReg(0));
 
   // Rt = Inst{15-12} => ARM Rd
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRd(insn))));
 
   MI.addOperand(MCOperand::CreateImm(decodeNVLaneOpIndex(insn, esize)));
@@ -2919,7 +2929,7 @@
 // Vector Duplicate Instructions (from ARM core register to all elements).
 // VDUP8d, VDUP16d, VDUP32d, VDUP8q, VDUP16q, VDUP32q: Qd/Dd Rt
 static bool DisassembleNEONDupFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
 
@@ -2932,11 +2942,11 @@
   unsigned RegClass = OpInfo[0].RegClass;
 
   // Qd/Dd = Inst{7:19-16} => NEON Rn
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(RegClass,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, RegClass,
                                                      decodeNEONRn(insn))));
 
   // Rt = Inst{15-12} => ARM Rd
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRd(insn))));
 
   NumOpsAdded = 2;
@@ -2966,13 +2976,13 @@
 }
 
 static bool DisassemblePreLoadFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   // Preload Data/Instruction requires either 2 or 4 operands.
   // PLDi, PLDWi, PLIi:                Rn [+/-]imm12 add = (U == '1')
   // PLDr[a|m], PLDWr[a|m], PLIr[a|m]: Rn Rm addrmode2_opc
 
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRn(insn))));
 
   if (Opcode == ARM::PLDi || Opcode == ARM::PLDWi || Opcode == ARM::PLIi) {
@@ -2982,7 +2992,7 @@
     MI.addOperand(MCOperand::CreateImm(Offset));
     NumOpsAdded = 2;
   } else {
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRm(insn))));
 
     ARM_AM::AddrOpc AddrOpcode = getUBit(insn) ? ARM_AM::add : ARM_AM::sub;
@@ -3003,7 +3013,7 @@
 }
 
 static bool DisassembleMiscFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   if (MemBarrierInstr(insn))
     return true;
@@ -3052,7 +3062,7 @@
   }
 
   if (PreLoadOpcode(Opcode))
-    return DisassemblePreLoadFrm(MI, Opcode, insn, NumOps, NumOpsAdded);
+    return DisassemblePreLoadFrm(MI, Opcode, insn, NumOps, NumOpsAdded, B);
 
   assert(0 && "Unexpected misc instruction!");
   return false;
@@ -3168,7 +3178,7 @@
   unsigned NumOpsAdded = 0;
   bool OK = (*Disasm)(MI, Opcode, insn, NumOps, NumOpsAdded, this);
 
-  if (!OK) return false;
+  if (!OK || this->Err != 0) return false;
   if (NumOpsAdded >= NumOps)
     return true;
 
@@ -3255,7 +3265,7 @@
 /// Opcode, Format, and NumOperands make up an ARM Basic MCBuilder.
 ARMBasicMCBuilder::ARMBasicMCBuilder(unsigned opc, ARMFormat format,
                                      unsigned short num)
-  : Opcode(opc), Format(format), NumOps(num), SP(0) {
+  : Opcode(opc), Format(format), NumOps(num), SP(0), Err(0) {
   unsigned Idx = (unsigned)format;
   assert(Idx < (array_lengthof(FuncPtrs) - 1) && "Unknown format");
   Disasm = FuncPtrs[Idx];

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h?rev=101290&r1=101289&r2=101290&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h Wed Apr 14 16:03:13 2010
@@ -187,6 +187,7 @@
   unsigned short NumOps;
   DisassembleFP Disasm;
   Session *SP;
+  int Err; // !=0 if the builder encounters some error condition during build.
 
 private:
   /// Opcode, Format, and NumOperands make up an ARM Basic MCBuilder.
@@ -195,15 +196,20 @@
 public:
   ARMBasicMCBuilder(ARMBasicMCBuilder &B)
     : Opcode(B.Opcode), Format(B.Format), NumOps(B.NumOps), Disasm(B.Disasm),
-      SP(B.SP)
-  {}
+      SP(B.SP) {
+    Err = 0;
+  }
 
   virtual ~ARMBasicMCBuilder() {}
 
-  void setSession(Session *sp) {
+  void SetSession(Session *sp) {
     SP = sp;
   }
 
+  void SetErr(int ErrCode) {
+    Err = ErrCode;
+  }
+
   /// TryPredicateAndSBitModifier - TryPredicateAndSBitModifier tries to process
   /// the possible Predicate and SBitModifier, to build the remaining MCOperand
   /// constituents.

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h?rev=101290&r1=101289&r2=101290&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h Wed Apr 14 16:03:13 2010
@@ -342,7 +342,7 @@
 // Special case:
 // tMOVSr:                  tRd tRn
 static bool DisassembleThumb1General(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO Builder) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
   unsigned &OpIdx = NumOpsAdded;
@@ -360,14 +360,14 @@
 
   // Add the destination operand.
   MI.addOperand(MCOperand::CreateReg(
-                  getRegisterEnum(ARM::tGPRRegClassID,
+                  getRegisterEnum(B, ARM::tGPRRegClassID,
                                   UseRt ? getT1tRt(insn) : getT1tRd(insn))));
   ++OpIdx;
 
   // Check whether the next operand to be added is a CCR Register.
   if (OpInfo[OpIdx].RegClass == ARM::CCRRegClassID) {
     assert(OpInfo[OpIdx].isOptionalDef() && "Optional def operand expected");
-    MI.addOperand(MCOperand::CreateReg(Builder->InITBlock() ? 0 : ARM::CPSR));
+    MI.addOperand(MCOperand::CreateReg(B->InITBlock() ? 0 : ARM::CPSR));
     ++OpIdx;
   }
 
@@ -376,7 +376,7 @@
   if (OpInfo[OpIdx].RegClass == ARM::tGPRRegClassID) {
     // For UseRt, the reg operand is tied to the first reg operand.
     MI.addOperand(MCOperand::CreateReg(
-                    getRegisterEnum(ARM::tGPRRegClassID,
+                    getRegisterEnum(B, ARM::tGPRRegClassID,
                                     UseRt ? getT1tRt(insn) : getT1tRn(insn))));
     ++OpIdx;
   }
@@ -388,7 +388,7 @@
   // The next available operand is either a reg operand or an imm operand.
   if (OpInfo[OpIdx].RegClass == ARM::tGPRRegClassID) {
     // Three register operand instructions.
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
                                                        getT1tRm(insn))));
   } else {
     assert(OpInfo[OpIdx].RegClass == 0 &&
@@ -409,7 +409,7 @@
 // tMVN, tRSB:        tRd CPSR tRn
 // Others:            tRd CPSR tRd(TIED_TO) tRn
 static bool DisassembleThumb1DP(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO Builder) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   const TargetInstrDesc &TID = ARMInsts[Opcode];
   const TargetOperandInfo *OpInfo = TID.OpInfo;
@@ -423,14 +423,14 @@
          && "Invalid arguments");
 
   // Add the destination operand.
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
                                                      getT1tRd(insn))));
   ++OpIdx;
 
   // Check whether the next operand to be added is a CCR Register.
   if (OpInfo[OpIdx].RegClass == ARM::CCRRegClassID) {
     assert(OpInfo[OpIdx].isOptionalDef() && "Optional def operand expected");
-    MI.addOperand(MCOperand::CreateReg(Builder->InITBlock() ? 0 : ARM::CPSR));
+    MI.addOperand(MCOperand::CreateReg(B->InITBlock() ? 0 : ARM::CPSR));
     ++OpIdx;
   }
 
@@ -449,7 +449,7 @@
   // Process possible next reg operand.
   if (OpIdx < NumOps && OpInfo[OpIdx].RegClass == ARM::tGPRRegClassID) {
     // Add tRn operand.
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
                                                        getT1tRn(insn))));
     ++OpIdx;
   }
@@ -466,7 +466,7 @@
 // tBX_RET_vararg: Rm
 // tBLXr_r9: Rm
 static bool DisassembleThumb1Special(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   // tBX_RET has 0 operand.
   if (NumOps == 0)
@@ -474,7 +474,7 @@
 
   // BX/BLX has 1 reg operand: Rm.
   if (NumOps == 1) {
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        getT1Rm(insn))));
     NumOpsAdded = 1;
     return true;
@@ -489,7 +489,7 @@
   // Add the destination operand.
   unsigned RegClass = OpInfo[OpIdx].RegClass;
   MI.addOperand(MCOperand::CreateReg(
-                  getRegisterEnum(RegClass,
+                  getRegisterEnum(B, RegClass,
                                   IsGPR(RegClass) ? getT1Rd(insn)
                                                   : getT1tRd(insn))));
   ++OpIdx;
@@ -509,7 +509,7 @@
   assert(OpIdx < NumOps && "More operands expected");
   RegClass = OpInfo[OpIdx].RegClass;
   MI.addOperand(MCOperand::CreateReg(
-                  getRegisterEnum(RegClass,
+                  getRegisterEnum(B, RegClass,
                                   IsGPR(RegClass) ? getT1Rm(insn)
                                                   : getT1tRn(insn))));
   ++OpIdx;
@@ -521,7 +521,7 @@
 //
 // tLDRpci: tRt imm8*4
 static bool DisassembleThumb1LdPC(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
   if (!OpInfo) return false;
@@ -533,7 +533,7 @@
          && "Invalid arguments");
 
   // Add the destination operand.
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
                                                      getT1tRt(insn))));
 
   // And the (imm8 << 2) operand.
@@ -565,7 +565,7 @@
 // Load/Store Register (reg|imm):      tRd tRn imm5 tRm
 // Load Register Signed Byte|Halfword: tRd tRn tRm
 static bool DisassembleThumb1LdSt(unsigned opA, MCInst &MI, unsigned Opcode,
-    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded) {
+    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   const TargetInstrDesc &TID = ARMInsts[Opcode];
   const TargetOperandInfo *OpInfo = TID.OpInfo;
@@ -582,9 +582,9 @@
          && "Expect >= 2 operands and first two as thumb reg operands");
 
   // Add the destination reg and the base reg.
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
                                                      getT1tRd(insn))));
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
                                                      getT1tRn(insn))));
   OpIdx = 2;
 
@@ -604,9 +604,10 @@
   // The next reg operand is tRm, the offset.
   assert(OpIdx < NumOps && OpInfo[OpIdx].RegClass == ARM::tGPRRegClassID
          && "Thumb reg operand expected");
-  MI.addOperand(MCOperand::CreateReg(Imm5 ? 0
-                                          : getRegisterEnum(ARM::tGPRRegClassID,
-                                                            getT1tRm(insn))));
+  MI.addOperand(MCOperand::CreateReg(
+                  Imm5 ? 0
+                       : getRegisterEnum(B, ARM::tGPRRegClassID,
+                                         getT1tRm(insn))));
   ++OpIdx;
 
   return true;
@@ -616,7 +617,7 @@
 //
 // Load/Store Register SP relative: tRt ARM::SP imm8
 static bool DisassembleThumb1LdStSP(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   assert((Opcode == ARM::tLDRspi || Opcode == ARM::tSTRspi)
          && "Invalid opcode");
@@ -632,7 +633,7 @@
           !OpInfo[2].isOptionalDef())
          && "Invalid arguments");
 
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
                                                      getT1tRt(insn))));
   MI.addOperand(MCOperand::CreateReg(ARM::SP));
   MI.addOperand(MCOperand::CreateImm(getT1Imm8(insn)));
@@ -645,7 +646,7 @@
 //
 // tADDrPCi: tRt imm8
 static bool DisassembleThumb1AddPCi(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   assert(Opcode == ARM::tADDrPCi && "Invalid opcode");
 
@@ -658,7 +659,7 @@
           !OpInfo[1].isOptionalDef())
          && "Invalid arguments");
 
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
                                                      getT1tRt(insn))));
   MI.addOperand(MCOperand::CreateImm(getT1Imm8(insn)));
   NumOpsAdded = 2;
@@ -670,7 +671,7 @@
 //
 // tADDrSPi: tRt ARM::SP imm8
 static bool DisassembleThumb1AddSPi(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   assert(Opcode == ARM::tADDrSPi && "Invalid opcode");
 
@@ -685,7 +686,7 @@
           !OpInfo[2].isOptionalDef())
          && "Invalid arguments");
 
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
                                                      getT1tRt(insn))));
   MI.addOperand(MCOperand::CreateReg(ARM::SP));
   MI.addOperand(MCOperand::CreateImm(getT1Imm8(insn)));
@@ -701,7 +702,7 @@
 // "low registers" is specified by Inst{7-0}
 // lr|pc is specified by Inst{8}
 static bool DisassembleThumb1PushPop(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   assert((Opcode == ARM::tPUSH || Opcode == ARM::tPOP) && "Invalid opcode");
 
@@ -717,7 +718,7 @@
     | slice(insn, 7, 0);
   for (unsigned i = 0; i < 16; ++i) {
     if ((RegListBits >> i) & 1) {
-      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                          i)));
       ++OpIdx;
     }
@@ -739,13 +740,13 @@
 //   no operand
 // Others:           tRd tRn
 static bool DisassembleThumb1Misc(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   if (NumOps == 0)
     return true;
 
   if (Opcode == ARM::tPUSH || Opcode == ARM::tPOP)
-    return DisassembleThumb1PushPop(MI, Opcode, insn, NumOps, NumOpsAdded);
+    return DisassembleThumb1PushPop(MI, Opcode, insn, NumOps, NumOpsAdded, B);
 
   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
 
@@ -803,12 +804,12 @@
          && "Expect >=2 operands");
 
   // Add the destination operand.
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
                                                      getT1tRd(insn))));
 
   if (OpInfo[1].RegClass == ARM::tGPRRegClassID) {
     // Two register instructions.
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
                                                        getT1tRn(insn))));
   } else {
     // CBNZ, CBZ
@@ -827,7 +828,7 @@
 // tLDM_UPD/tSTM_UPD: tRt tRt AM4ModeImm Pred-Imm Pred-CCR register_list
 // tLDM:              tRt AM4ModeImm Pred-Imm Pred-CCR register_list
 static bool DisassembleThumb1LdStMul(bool Ld, MCInst &MI, unsigned Opcode,
-    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded) {
+    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   assert((Opcode == ARM::tLDM || Opcode == ARM::tLDM_UPD ||
           Opcode == ARM::tSTM_UPD) && "Invalid opcode");
@@ -841,12 +842,12 @@
 
   // WB register, if necessary.
   if (Opcode == ARM::tLDM_UPD || Opcode == ARM::tSTM_UPD) {
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        tRt)));
     ++OpIdx;
   }
 
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      tRt)));
   ++OpIdx;
 
@@ -862,7 +863,7 @@
   // Fill the variadic part of reglist.
   for (unsigned i = 0; i < 8; ++i) {
     if ((RegListBits >> i) & 1) {
-      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
+      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
                                                          i)));
       ++OpIdx;
     }
@@ -872,13 +873,15 @@
 }
 
 static bool DisassembleThumb1LdMul(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded) {
-  return DisassembleThumb1LdStMul(true, MI, Opcode, insn, NumOps, NumOpsAdded);
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
+  return DisassembleThumb1LdStMul(true, MI, Opcode, insn, NumOps, NumOpsAdded,
+                                  B);
 }
 
 static bool DisassembleThumb1StMul(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded) {
-  return DisassembleThumb1LdStMul(false, MI, Opcode, insn, NumOps, NumOpsAdded);
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
+  return DisassembleThumb1LdStMul(false, MI, Opcode, insn, NumOps, NumOpsAdded,
+                                  B);
 }
 
 // A8.6.16 B Encoding T1
@@ -889,7 +892,7 @@
 // tSVC: imm8 Pred-Imm Pred-CCR
 // tTRAP: 0 operand (early return)
 static bool DisassembleThumb1CondBr(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
 
   if (Opcode == ARM::tTRAP)
     return true;
@@ -918,7 +921,7 @@
 //
 // tB: offset
 static bool DisassembleThumb1Br(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
 
   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
   if (!OpInfo) return false;
@@ -960,9 +963,8 @@
 // 1101xx	Conditional branch, and Supervisor Call on page A6-13
 // 11100x	Unconditional Branch, see B on page A8-44
 //
-static bool DisassembleThumb1(uint16_t op,
-    MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded, BO Builder) {
+static bool DisassembleThumb1(uint16_t op, MCInst &MI, unsigned Opcode,
+    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   unsigned op1 = slice(op, 5, 4);
   unsigned op2 = slice(op, 3, 2);
@@ -971,27 +973,27 @@
   switch (op1) {
   case 0:
     // A6.2.1 Shift (immediate), add, subtract, move, and compare
-    return DisassembleThumb1General(MI, Opcode, insn, NumOps, NumOpsAdded,
-                                    Builder);
+    return DisassembleThumb1General(MI, Opcode, insn, NumOps, NumOpsAdded, B);
   case 1:
     switch (op2) {
     case 0:
       switch (op3) {
       case 0:
         // A6.2.2 Data-processing
-        return DisassembleThumb1DP(MI, Opcode, insn, NumOps, NumOpsAdded,
-                                   Builder);
+        return DisassembleThumb1DP(MI, Opcode, insn, NumOps, NumOpsAdded, B);
       case 1:
         // A6.2.3 Special data instructions and branch and exchange
-        return DisassembleThumb1Special(MI, Opcode, insn, NumOps, NumOpsAdded);
+        return DisassembleThumb1Special(MI, Opcode, insn, NumOps, NumOpsAdded,
+                                        B);
       default:
         // A8.6.59 LDR (literal)
-        return DisassembleThumb1LdPC(MI, Opcode, insn, NumOps, NumOpsAdded);
+        return DisassembleThumb1LdPC(MI, Opcode, insn, NumOps, NumOpsAdded, B);
       }
       break;
     default:
       // A6.2.4 Load/store single data item
-      return DisassembleThumb1LdSt(opA, MI, Opcode, insn, NumOps, NumOpsAdded);
+      return DisassembleThumb1LdSt(opA, MI, Opcode, insn, NumOps, NumOpsAdded,
+                                   B);
       break;
     }
     break;
@@ -999,21 +1001,24 @@
     switch (op2) {
     case 0:
       // A6.2.4 Load/store single data item
-      return DisassembleThumb1LdSt(opA, MI, Opcode, insn, NumOps, NumOpsAdded);
+      return DisassembleThumb1LdSt(opA, MI, Opcode, insn, NumOps, NumOpsAdded,
+                                   B);
     case 1:
       // A6.2.4 Load/store single data item
-      return DisassembleThumb1LdStSP(MI, Opcode, insn, NumOps, NumOpsAdded);
+      return DisassembleThumb1LdStSP(MI, Opcode, insn, NumOps, NumOpsAdded, B);
     case 2:
       if (op3 <= 1) {
         // A8.6.10 ADR
-        return DisassembleThumb1AddPCi(MI, Opcode, insn, NumOps, NumOpsAdded);
+        return DisassembleThumb1AddPCi(MI, Opcode, insn, NumOps, NumOpsAdded,
+                                       B);
       } else {
         // A8.6.8 ADD (SP plus immediate)
-        return DisassembleThumb1AddSPi(MI, Opcode, insn, NumOps, NumOpsAdded);
+        return DisassembleThumb1AddSPi(MI, Opcode, insn, NumOps, NumOpsAdded,
+                                       B);
       }
     default:
       // A6.2.5 Miscellaneous 16-bit instructions
-      return DisassembleThumb1Misc(MI, Opcode, insn, NumOps, NumOpsAdded);
+      return DisassembleThumb1Misc(MI, Opcode, insn, NumOps, NumOpsAdded, B);
     }
     break;
   case 3:
@@ -1021,17 +1026,17 @@
     case 0:
       if (op3 <= 1) {
         // A8.6.189 STM / STMIA / STMEA
-        return DisassembleThumb1StMul(MI, Opcode, insn, NumOps, NumOpsAdded);
+        return DisassembleThumb1StMul(MI, Opcode, insn, NumOps, NumOpsAdded, B);
       } else {
         // A8.6.53 LDM / LDMIA / LDMFD
-        return DisassembleThumb1LdMul(MI, Opcode, insn, NumOps, NumOpsAdded);
+        return DisassembleThumb1LdMul(MI, Opcode, insn, NumOps, NumOpsAdded, B);
       }
     case 1:
       // A6.2.6 Conditional branch, and Supervisor Call
-      return DisassembleThumb1CondBr(MI, Opcode, insn, NumOps, NumOpsAdded);
+      return DisassembleThumb1CondBr(MI, Opcode, insn, NumOps, NumOpsAdded, B);
     case 2:
       // Unconditional Branch, see B on page A8-44
-      return DisassembleThumb1Br(MI, Opcode, insn, NumOps, NumOpsAdded);
+      return DisassembleThumb1Br(MI, Opcode, insn, NumOps, NumOpsAdded, B);
     default:
       assert(0 && "Unreachable code");
       break;
@@ -1087,21 +1092,21 @@
 
 // t2RFE[IA|DB]W/t2RFE[IA|DB]: Rn
 static bool DisassembleThumb2RFE(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded) {
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRn(insn))));
   NumOpsAdded = 1;
   return true;
 }
 
 static bool DisassembleThumb2LdStMul(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   if (Thumb2SRSOpcode(Opcode))
     return DisassembleThumb2SRS(MI, Opcode, insn, NumOps, NumOpsAdded);
 
   if (Thumb2RFEOpcode(Opcode))
-    return DisassembleThumb2RFE(MI, Opcode, insn, NumOps, NumOpsAdded);
+    return DisassembleThumb2RFE(MI, Opcode, insn, NumOps, NumOpsAdded, B);
 
   assert((Opcode == ARM::t2LDM || Opcode == ARM::t2LDM_UPD ||
           Opcode == ARM::t2STM || Opcode == ARM::t2STM_UPD)
@@ -1112,7 +1117,7 @@
 
   OpIdx = 0;
 
-  unsigned Base = getRegisterEnum(ARM::GPRRegClassID, decodeRn(insn));
+  unsigned Base = getRegisterEnum(B, ARM::GPRRegClassID, decodeRn(insn));
 
   // Writeback to base.
   if (Opcode == ARM::t2LDM_UPD || Opcode == ARM::t2STM_UPD) {
@@ -1136,7 +1141,7 @@
   unsigned RegListBits = insn & ((1 << 16) - 1);
   for (unsigned i = 0; i < 16; ++i) {
     if ((RegListBits >> i) & 1) {
-      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                          i)));
       ++OpIdx;
     }
@@ -1152,7 +1157,7 @@
 // t2STREXD: Rm Rd Rs Rn
 // t2STREXB, t2STREXH: Rm Rd Rn
 static bool DisassembleThumb2LdStEx(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
   if (!OpInfo) return false;
@@ -1173,25 +1178,25 @@
   // Add the destination operand for store.
   if (isStore) {
     MI.addOperand(MCOperand::CreateReg(
-                    getRegisterEnum(ARM::GPRRegClassID,
+                    getRegisterEnum(B, ARM::GPRRegClassID,
                                     isSW ? decodeRs(insn) : decodeRm(insn))));
     ++OpIdx;
   }
 
   // Source operand for store and destination operand for load.
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRd(insn))));
   ++OpIdx;
 
   // Thumb2 doubleword complication: with an extra source/destination operand.
   if (isDW) {
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRs(insn))));
     ++OpIdx;
   }
 
   // Finally add the pointer operand.
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRn(insn))));
   ++OpIdx;
 
@@ -1208,7 +1213,7 @@
 // Ditto for t2LDRD_PRE, t2LDRD_POST, t2STRD_PRE, t2STRD_POST, which are for
 // disassembly only and do not have a tied_to writeback base register operand.
 static bool DisassembleThumb2LdStDual(MCInst &MI, unsigned Opcode,
-    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded) {
+    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
   if (!OpInfo) return false;
@@ -1221,11 +1226,11 @@
          && "Expect >= 4 operands and first 3 as reg operands");
 
   // Add the <Rt> <Rt2> operands.
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRd(insn))));
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRs(insn))));
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRn(insn))));
 
   // Finally add (+/-)imm8*4, depending on the U bit.
@@ -1246,15 +1251,15 @@
 //
 // t2TBBgen, t2TBHgen: Rn Rm Pred-Imm Pred-CCR
 static bool DisassembleThumb2TB(MCInst &MI, unsigned Opcode,
-    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded) {
+    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   assert(NumOps >= 2 && "Expect >= 2 operands");
 
   // The generic version of TBB/TBH needs a base register.
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRn(insn))));
   // Add the index register.
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRm(insn))));
   NumOpsAdded = 2;
 
@@ -1289,7 +1294,7 @@
 // nothing else, because the shift amount is already specified.
 // Similar case holds for t2MOVrx, t2ADDrr, ..., etc.
 static bool DisassembleThumb2DPSoReg(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   const TargetInstrDesc &TID = ARMInsts[Opcode];
   const TargetOperandInfo *OpInfo = TID.OpInfo;
@@ -1304,7 +1309,7 @@
            && OpInfo[3].RegClass == 0
            && "Exactlt 4 operands expect and first two as reg operands");
     // Only need to populate the src reg operand.
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRm(insn))));
     MI.addOperand(MCOperand::CreateReg(0));
     MI.addOperand(MCOperand::CreateImm(0));
@@ -1326,7 +1331,7 @@
   // Build the register operands, followed by the constant shift specifier.
 
   MI.addOperand(MCOperand::CreateReg(
-                  getRegisterEnum(ARM::GPRRegClassID,
+                  getRegisterEnum(B, ARM::GPRRegClassID,
                                   NoDstReg ? decodeRn(insn) : decodeRs(insn))));
   ++OpIdx;
 
@@ -1337,13 +1342,13 @@
       MI.addOperand(MI.getOperand(Idx));
     } else {
       assert(!NoDstReg && "Internal error");
-      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                          decodeRn(insn))));
     }
     ++OpIdx;
   }
 
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRm(insn))));
   ++OpIdx;
 
@@ -1384,7 +1389,7 @@
 //
 // ModImm = ThumbExpandImm(i:imm3:imm8)
 static bool DisassembleThumb2DPModImm(MCInst &MI, unsigned Opcode,
-    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded) {
+    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
   unsigned &OpIdx = NumOpsAdded;
@@ -1400,13 +1405,13 @@
   // Build the register operands, followed by the modified immediate.
 
   MI.addOperand(MCOperand::CreateReg(
-                  getRegisterEnum(ARM::GPRRegClassID,
+                  getRegisterEnum(B, ARM::GPRRegClassID,
                                   NoDstReg ? decodeRn(insn) : decodeRs(insn))));
   ++OpIdx;
 
   if (TwoReg) {
     assert(!NoDstReg && "Internal error");
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRn(insn))));
     ++OpIdx;
   }
@@ -1470,7 +1475,7 @@
 // o t2SSAT[lsl|asr], t2USAT[lsl|asr]: Rs sat_pos Rn shamt
 // o t2SSAT16, t2USAT16: Rs sat_pos Rn
 static bool DisassembleThumb2DPBinImm(MCInst &MI, unsigned Opcode,
-    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded) {
+    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   const TargetInstrDesc &TID = ARMInsts[Opcode];
   const TargetOperandInfo *OpInfo = TID.OpInfo;
@@ -1485,7 +1490,7 @@
 
   // Build the register operand(s), followed by the immediate(s).
 
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRs(insn))));
   ++OpIdx;
 
@@ -1493,7 +1498,7 @@
   if (Thumb2SaturateOpcode(Opcode)) {
     MI.addOperand(MCOperand::CreateImm(decodeThumb2SaturatePos(Opcode, insn)));
 
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRn(insn))));
 
     if (Opcode == ARM::t2SSAT16 || Opcode == ARM::t2USAT16) {
@@ -1521,7 +1526,7 @@
       MI.addOperand(MI.getOperand(Idx));
     } else {
       // Add src reg operand.
-      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                          decodeRn(insn))));
     }
     ++OpIdx;
@@ -1596,7 +1601,7 @@
 // t2MSR/t2MSRsys -> Rn mask=Inst{11-8}
 // t2SMC -> imm4 = Inst{19-16}
 static bool DisassembleThumb2BrMiscCtrl(MCInst &MI, unsigned Opcode,
-    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded) {
+    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   if (NumOps == 0)
     return true;
@@ -1638,21 +1643,21 @@
 
   // MRS and MRSsys take one GPR reg Rs.
   if (Opcode == ARM::t2MRS || Opcode == ARM::t2MRSsys) {
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRs(insn))));
     NumOpsAdded = 1;
     return true;
   }
   // BXJ takes one GPR reg Rn.
   if (Opcode == ARM::t2BXJ) {
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRn(insn))));
     NumOpsAdded = 1;
     return true;
   }
   // MSR and MSRsys take one GPR reg Rn, followed by the mask.
   if (Opcode == ARM::t2MSR || Opcode == ARM::t2MSRsys || Opcode == ARM::t2BXJ) {
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRn(insn))));
     MI.addOperand(MCOperand::CreateImm(slice(insn, 11, 8)));
     NumOpsAdded = 2;
@@ -1711,7 +1716,7 @@
 }
 
 static bool DisassembleThumb2PreLoad(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   // Preload Data/Instruction requires either 2 or 3 operands.
   // t2PLDi12, t2PLDi8, t2PLDpci: Rn [+/-]imm12/imm8
@@ -1729,12 +1734,12 @@
          OpInfo[0].RegClass == ARM::GPRRegClassID &&
          "Expect >= 2 operands and first one as reg operand");
 
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRn(insn))));
   ++OpIdx;
 
   if (OpInfo[OpIdx].RegClass == ARM::GPRRegClassID) {
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRm(insn))));
   } else {
     assert(OpInfo[OpIdx].RegClass == 0 && !OpInfo[OpIdx].isPredicate()
@@ -1776,7 +1781,7 @@
 // These instrs calculate an address from the PC value and an immediate offset.
 // Rd Rn=PC (+/-)imm12 (+ if Inst{23} == 0b1)
 static bool DisassembleThumb2Ldpci(MCInst &MI, unsigned Opcode,
-    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded) {
+    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
   if (!OpInfo) return false;
@@ -1788,7 +1793,7 @@
 
   // Build the register operand, followed by the (+/-)imm12 immediate.
 
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRd(insn))));
 
   MI.addOperand(MCOperand::CreateImm(decodeImm12(insn)));
@@ -1824,16 +1829,16 @@
 // Delegates to DisassembleThumb2PreLoad() for preload data/instruction.
 // Delegates to DisassembleThumb2Ldpci() for load * literal operations.
 static bool DisassembleThumb2LdSt(bool Load, MCInst &MI, unsigned Opcode,
-    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded) {
+    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   unsigned Rn = decodeRn(insn);
 
   if (Thumb2PreloadOpcode(Opcode))
-    return DisassembleThumb2PreLoad(MI, Opcode, insn, NumOps, NumOpsAdded);
+    return DisassembleThumb2PreLoad(MI, Opcode, insn, NumOps, NumOpsAdded, B);
 
   // See, for example, A6.3.7 Load word: Table A6-18 Load word.
   if (Load && Rn == 15)
-    return DisassembleThumb2Ldpci(MI, Opcode, insn, NumOps, NumOpsAdded);
+    return DisassembleThumb2Ldpci(MI, Opcode, insn, NumOps, NumOpsAdded, B);
 
   const TargetInstrDesc &TID = ARMInsts[Opcode];
   const TargetOperandInfo *OpInfo = TID.OpInfo;
@@ -1882,13 +1887,16 @@
       Imm = decodeImm8(insn);
   }
   
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID, R0)));
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
+                                                     R0)));
   ++OpIdx;
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID, R1)));
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
+                                                     R1)));
   ++OpIdx;
 
   if (ThreeReg) {
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,R2)));
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
+                                                       R2)));
     ++OpIdx;
   }
 
@@ -1912,7 +1920,7 @@
 //
 // Miscellaneous operations: Rs [Rn] Rm
 static bool DisassembleThumb2DPReg(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   const TargetInstrDesc &TID = ARMInsts[Opcode];
   const TargetOperandInfo *OpInfo = TID.OpInfo;
@@ -1929,17 +1937,17 @@
 
   bool ThreeReg = NumOps > 2 && OpInfo[2].RegClass == ARM::GPRRegClassID;
 
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRs(insn))));
   ++OpIdx;
 
   if (ThreeReg) {
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRn(insn))));
     ++OpIdx;
   }
 
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRm(insn))));
   ++OpIdx;
 
@@ -1966,7 +1974,7 @@
 // Unsigned Sum of Absolute Differences [and Accumulate]
 //    Rs Rn Rm [Ra=Inst{15-12}]
 static bool DisassembleThumb2Mul(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
 
@@ -1980,17 +1988,17 @@
 
   bool FourReg = NumOps > 3 && OpInfo[3].RegClass == ARM::GPRRegClassID;
 
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRs(insn))));
 
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRn(insn))));
 
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRm(insn))));
 
   if (FourReg)
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRd(insn))));
 
   NumOpsAdded = FourReg ? 4 : 3;
@@ -2011,7 +2019,7 @@
 //
 // Signed/Unsigned divide: t2SDIV, t2UDIV: Rs Rn Rm
 static bool DisassembleThumb2LongMul(MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded) {
+    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
 
   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
 
@@ -2026,16 +2034,16 @@
   // Build the register operands.
 
   if (FourReg)
-    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                        decodeRd(insn))));
 
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRs(insn))));
 
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRn(insn))));
 
-  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
+  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
                                                      decodeRm(insn))));
 
   if (FourReg)
@@ -2071,15 +2079,16 @@
 // 		1xxxxxx	-	Coprocessor instructions on page A6-40
 //
 static bool DisassembleThumb2(uint16_t op1, uint16_t op2, uint16_t op,
-    MCInst &MI, unsigned Opcode, uint32_t insn,
-    unsigned short NumOps, unsigned &NumOpsAdded) {
+    MCInst &MI, unsigned Opcode, uint32_t insn, unsigned short NumOps,
+    unsigned &NumOpsAdded, BO B) {
 
   switch (op1) {
   case 1:
     if (slice(op2, 6, 5) == 0) {
       if (slice(op2, 2, 2) == 0) {
         // Load/store multiple.
-        return DisassembleThumb2LdStMul(MI, Opcode, insn, NumOps, NumOpsAdded);
+        return DisassembleThumb2LdStMul(MI, Opcode, insn, NumOps, NumOpsAdded,
+                                        B);
       }
 
       // Load/store dual, load/store exclusive, table branch, otherwise.
@@ -2087,22 +2096,24 @@
       if ((ARM::t2LDREX <= Opcode && Opcode <= ARM::t2LDREXH) ||
           (ARM::t2STREX <= Opcode && Opcode <= ARM::t2STREXH)) {
         // Load/store exclusive.
-        return DisassembleThumb2LdStEx(MI, Opcode, insn, NumOps, NumOpsAdded);
+        return DisassembleThumb2LdStEx(MI, Opcode, insn, NumOps, NumOpsAdded,
+                                       B);
       }
       if (Opcode == ARM::t2LDRDi8 ||
           Opcode == ARM::t2LDRD_PRE || Opcode == ARM::t2LDRD_POST ||
           Opcode == ARM::t2STRDi8 ||
           Opcode == ARM::t2STRD_PRE || Opcode == ARM::t2STRD_POST) {
         // Load/store dual.
-        return DisassembleThumb2LdStDual(MI, Opcode, insn, NumOps, NumOpsAdded);
+        return DisassembleThumb2LdStDual(MI, Opcode, insn, NumOps, NumOpsAdded,
+                                         B);
       }
       if (Opcode == ARM::t2TBBgen || Opcode == ARM::t2TBHgen) {
         // Table branch.
-        return DisassembleThumb2TB(MI, Opcode, insn, NumOps, NumOpsAdded);
+        return DisassembleThumb2TB(MI, Opcode, insn, NumOps, NumOpsAdded, B);
       }
     } else if (slice(op2, 6, 5) == 1) {
       // Data-processing (shifted register).
-      return DisassembleThumb2DPSoReg(MI, Opcode, insn, NumOps, NumOpsAdded);
+      return DisassembleThumb2DPSoReg(MI, Opcode, insn, NumOps, NumOpsAdded, B);
     }
 
     // FIXME: A6.3.18 Coprocessor instructions
@@ -2113,14 +2124,17 @@
     if (op == 0) {
       if (slice(op2, 5, 5) == 0) {
         // Data-processing (modified immediate)
-        return DisassembleThumb2DPModImm(MI, Opcode, insn, NumOps, NumOpsAdded);
+        return DisassembleThumb2DPModImm(MI, Opcode, insn, NumOps, NumOpsAdded,
+                                         B);
       } else {
         // Data-processing (plain binary immediate)
-        return DisassembleThumb2DPBinImm(MI, Opcode, insn, NumOps, NumOpsAdded);
+        return DisassembleThumb2DPBinImm(MI, Opcode, insn, NumOps, NumOpsAdded,
+                                         B);
       }
     } else {
       // Branches and miscellaneous control on page A6-20.
-      return DisassembleThumb2BrMiscCtrl(MI, Opcode, insn, NumOps, NumOpsAdded);
+      return DisassembleThumb2BrMiscCtrl(MI, Opcode, insn, NumOps, NumOpsAdded,
+                                         B);
     }
 
     break;
@@ -2131,7 +2145,8 @@
       if (slice(op2, 0, 0) == 0) {
         if (slice(op2, 4, 4) == 0) {
           // Store single data item on page A6-30
-          return DisassembleThumb2LdSt(false, MI,Opcode,insn,NumOps,NumOpsAdded);
+          return DisassembleThumb2LdSt(false, MI,Opcode,insn,NumOps,NumOpsAdded,
+                                       B);
         } else {
           // FIXME: Advanced SIMD element or structure load/store instructions.
           // But see ThumbDisassembler::getInstruction().
@@ -2139,19 +2154,20 @@
         }
       } else {
         // Table A6-9 32-bit Thumb instruction encoding: Load byte|halfword|word
-        return DisassembleThumb2LdSt(true, MI,Opcode,insn,NumOps,NumOpsAdded);
+        return DisassembleThumb2LdSt(true, MI,Opcode,insn,NumOps,NumOpsAdded, B);
       }
       break;
     case 1:
       if (slice(op2, 4, 4) == 0) {
         // A6.3.12 Data-processing (register)
-        return DisassembleThumb2DPReg(MI, Opcode, insn, NumOps, NumOpsAdded);
+        return DisassembleThumb2DPReg(MI, Opcode, insn, NumOps, NumOpsAdded, B);
       } else if (slice(op2, 3, 3) == 0) {
         // A6.3.16 Multiply, multiply accumulate, and absolute difference
-        return DisassembleThumb2Mul(MI, Opcode, insn, NumOps, NumOpsAdded);
+        return DisassembleThumb2Mul(MI, Opcode, insn, NumOps, NumOpsAdded, B);
       } else {
         // A6.3.17 Long multiply, long multiply accumulate, and divide
-        return DisassembleThumb2LongMul(MI, Opcode, insn, NumOps, NumOpsAdded);
+        return DisassembleThumb2LongMul(MI, Opcode, insn, NumOps, NumOpsAdded,
+                                        B);
       }
       break;
     default:
@@ -2197,5 +2213,6 @@
   uint16_t op2 = slice(HalfWord, 10, 4);
   uint16_t op = slice(insn, 15, 15);
 
-  return DisassembleThumb2(op1, op2, op, MI, Opcode, insn, NumOps, NumOpsAdded);
+  return DisassembleThumb2(op1, op2, op, MI, Opcode, insn, NumOps, NumOpsAdded,
+                           Builder);
 }




From gohman at apple.com  Wed Apr 14 16:47:32 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 21:47:32 -0000
Subject: [llvm-commits] [llvm] r101292 - in /llvm/trunk:
 include/llvm/Support/CallSite.h lib/VMCore/Instructions.cpp
Message-ID: <20100414214732.C19322A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 16:47:32 2010
New Revision: 101292

URL: http://llvm.org/viewvc/llvm-project?rev=101292&view=rev
Log:
Move a bunch of methods from CallSite to CallSiteBase, so that they can
be used in ImmutableCallSite too.

Modified:
    llvm/trunk/include/llvm/Support/CallSite.h
    llvm/trunk/lib/VMCore/Instructions.cpp

Modified: llvm/trunk/include/llvm/Support/CallSite.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/CallSite.h?rev=101292&r1=101291&r2=101292&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/CallSite.h (original)
+++ llvm/trunk/include/llvm/Support/CallSite.h Wed Apr 14 16:47:32 2010
@@ -30,7 +30,7 @@
 #include "llvm/ADT/PointerIntPair.h"
 #include "llvm/BasicBlock.h"
 #include "llvm/CallingConv.h"
-#include "llvm/Instruction.h"
+#include "llvm/Instructions.h"
 
 namespace llvm {
 
@@ -158,6 +158,100 @@
   ///
   FunTy *getCaller() const { return (*this)->getParent()->getParent(); }
 
+#define CALLSITE_DELEGATE_GETTER(METHOD) \
+  InstrTy *II = getInstruction();    \
+  return isCall()                        \
+    ? cast<CallInst>(II)->METHOD         \
+    : cast<InvokeInst>(II)->METHOD
+
+#define CALLSITE_DELEGATE_SETTER(METHOD) \
+  InstrTy *II = getInstruction();    \
+  if (isCall())                          \
+    cast<CallInst>(II)->METHOD;          \
+  else                                   \
+    cast<InvokeInst>(II)->METHOD
+
+  /// getCallingConv/setCallingConv - get or set the calling convention of the
+  /// call.
+  CallingConv::ID getCallingConv() const {
+    CALLSITE_DELEGATE_GETTER(getCallingConv());
+  }
+  void setCallingConv(CallingConv::ID CC) {
+    CALLSITE_DELEGATE_SETTER(setCallingConv(CC));
+  }
+
+  /// getAttributes/setAttributes - get or set the parameter attributes of
+  /// the call.
+  const AttrListPtr &getAttributes() const {
+    CALLSITE_DELEGATE_GETTER(getAttributes());
+  }
+  void setAttributes(const AttrListPtr &PAL) {
+    CALLSITE_DELEGATE_SETTER(setAttributes(PAL));
+  }
+
+  /// paramHasAttr - whether the call or the callee has the given attribute.
+  bool paramHasAttr(uint16_t i, Attributes attr) const {
+    CALLSITE_DELEGATE_GETTER(paramHasAttr(i, attr));
+  }
+
+  /// @brief Extract the alignment for a call or parameter (0=unknown).
+  uint16_t getParamAlignment(uint16_t i) const {
+    CALLSITE_DELEGATE_GETTER(getParamAlignment(i));
+  }
+
+  /// @brief Return true if the call should not be inlined.
+  bool isNoInline() const {
+    CALLSITE_DELEGATE_GETTER(isNoInline());
+  }
+  void setIsNoInline(bool Value = true) {
+    CALLSITE_DELEGATE_GETTER(setIsNoInline(Value));
+  }
+  
+  /// @brief Determine if the call does not access memory.
+  bool doesNotAccessMemory() const {
+    CALLSITE_DELEGATE_GETTER(doesNotAccessMemory());
+  }
+  void setDoesNotAccessMemory(bool doesNotAccessMemory = true) {
+    CALLSITE_DELEGATE_SETTER(setDoesNotAccessMemory(doesNotAccessMemory));
+  }
+
+  /// @brief Determine if the call does not access or only reads memory.
+  bool onlyReadsMemory() const {
+    CALLSITE_DELEGATE_GETTER(onlyReadsMemory());
+  }
+  void setOnlyReadsMemory(bool onlyReadsMemory = true) {
+    CALLSITE_DELEGATE_SETTER(setOnlyReadsMemory(onlyReadsMemory));
+  }
+
+  /// @brief Determine if the call cannot return.
+  bool doesNotReturn() const {
+    CALLSITE_DELEGATE_GETTER(doesNotReturn());
+  }
+  void setDoesNotReturn(bool doesNotReturn = true) {
+    CALLSITE_DELEGATE_SETTER(setDoesNotReturn(doesNotReturn));
+  }
+
+  /// @brief Determine if the call cannot unwind.
+  bool doesNotThrow() const {
+    CALLSITE_DELEGATE_GETTER(doesNotThrow());
+  }
+  void setDoesNotThrow(bool doesNotThrow = true) {
+    CALLSITE_DELEGATE_SETTER(setDoesNotThrow(doesNotThrow));
+  }
+
+#undef CALLSITE_DELEGATE_GETTER
+#undef CALLSITE_DELEGATE_SETTER
+
+  /// hasArgument - Returns true if this CallSite passes the given Value* as an
+  /// argument to the called function.
+  bool hasArgument(const Value *Arg) const {
+    for (arg_iterator AI = this->arg_begin(), E = this->arg_end(); AI != E;
+         ++AI)
+      if (AI->get() == Arg)
+        return true;
+    return false;
+  }
+
 private:
   /// Returns the operand number of the first argument
   unsigned getArgumentOffset() const {
@@ -218,46 +312,6 @@
     return Base::get(V);
   }
 
-  /// getCallingConv/setCallingConv - get or set the calling convention of the
-  /// call.
-  CallingConv::ID getCallingConv() const;
-  void setCallingConv(CallingConv::ID CC);
-
-  /// getAttributes/setAttributes - get or set the parameter attributes of
-  /// the call.
-  const AttrListPtr &getAttributes() const;
-  void setAttributes(const AttrListPtr &PAL);
-
-  /// paramHasAttr - whether the call or the callee has the given attribute.
-  bool paramHasAttr(uint16_t i, Attributes attr) const;
-
-  /// @brief Extract the alignment for a call or parameter (0=unknown).
-  uint16_t getParamAlignment(uint16_t i) const;
-
-  /// @brief Return true if the call should not be inlined.
-  bool isNoInline() const;
-  void setIsNoInline(bool Value = true);
-  
-  /// @brief Determine if the call does not access memory.
-  bool doesNotAccessMemory() const;
-  void setDoesNotAccessMemory(bool doesNotAccessMemory = true);
-
-  /// @brief Determine if the call does not access or only reads memory.
-  bool onlyReadsMemory() const;
-  void setOnlyReadsMemory(bool onlyReadsMemory = true);
-
-  /// @brief Determine if the call cannot return.
-  bool doesNotReturn() const;
-  void setDoesNotReturn(bool doesNotReturn = true);
-
-  /// @brief Determine if the call cannot unwind.
-  bool doesNotThrow() const;
-  void setDoesNotThrow(bool doesNotThrow = true);
-
-  /// hasArgument - Returns true if this CallSite passes the given Value* as an
-  /// argument to the called function.
-  bool hasArgument(const Value *Arg) const;
-
   bool operator<(const CallSite &CS) const {
     return getInstruction() < CS.getInstruction();
   }

Modified: llvm/trunk/lib/VMCore/Instructions.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Instructions.cpp?rev=101292&r1=101291&r2=101292&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/Instructions.cpp (original)
+++ llvm/trunk/lib/VMCore/Instructions.cpp Wed Apr 14 16:47:32 2010
@@ -30,80 +30,6 @@
 //                            CallSite Class
 //===----------------------------------------------------------------------===//
 
-#define CALLSITE_DELEGATE_GETTER(METHOD) \
-  Instruction *II = getInstruction();    \
-  return isCall()                        \
-    ? cast<CallInst>(II)->METHOD         \
-    : cast<InvokeInst>(II)->METHOD
-
-#define CALLSITE_DELEGATE_SETTER(METHOD) \
-  Instruction *II = getInstruction();    \
-  if (isCall())                          \
-    cast<CallInst>(II)->METHOD;          \
-  else                                   \
-    cast<InvokeInst>(II)->METHOD
-
-CallingConv::ID CallSite::getCallingConv() const {
-  CALLSITE_DELEGATE_GETTER(getCallingConv());
-}
-void CallSite::setCallingConv(CallingConv::ID CC) {
-  CALLSITE_DELEGATE_SETTER(setCallingConv(CC));
-}
-const AttrListPtr &CallSite::getAttributes() const {
-  CALLSITE_DELEGATE_GETTER(getAttributes());
-}
-void CallSite::setAttributes(const AttrListPtr &PAL) {
-  CALLSITE_DELEGATE_SETTER(setAttributes(PAL));
-}
-bool CallSite::paramHasAttr(uint16_t i, Attributes attr) const {
-  CALLSITE_DELEGATE_GETTER(paramHasAttr(i, attr));
-}
-uint16_t CallSite::getParamAlignment(uint16_t i) const {
-  CALLSITE_DELEGATE_GETTER(getParamAlignment(i));
-}
-
-/// @brief Return true if the call should not be inlined.
-bool CallSite::isNoInline() const {
-  CALLSITE_DELEGATE_GETTER(isNoInline());
-}
-
-void CallSite::setIsNoInline(bool Value) {
-  CALLSITE_DELEGATE_GETTER(setIsNoInline(Value));
-}
-
-
-bool CallSite::doesNotAccessMemory() const {
-  CALLSITE_DELEGATE_GETTER(doesNotAccessMemory());
-}
-void CallSite::setDoesNotAccessMemory(bool doesNotAccessMemory) {
-  CALLSITE_DELEGATE_SETTER(setDoesNotAccessMemory(doesNotAccessMemory));
-}
-bool CallSite::onlyReadsMemory() const {
-  CALLSITE_DELEGATE_GETTER(onlyReadsMemory());
-}
-void CallSite::setOnlyReadsMemory(bool onlyReadsMemory) {
-  CALLSITE_DELEGATE_SETTER(setOnlyReadsMemory(onlyReadsMemory));
-}
-bool CallSite::doesNotReturn() const {
- CALLSITE_DELEGATE_GETTER(doesNotReturn());
-}
-void CallSite::setDoesNotReturn(bool doesNotReturn) {
-  CALLSITE_DELEGATE_SETTER(setDoesNotReturn(doesNotReturn));
-}
-bool CallSite::doesNotThrow() const {
-  CALLSITE_DELEGATE_GETTER(doesNotThrow());
-}
-void CallSite::setDoesNotThrow(bool doesNotThrow) {
-  CALLSITE_DELEGATE_SETTER(setDoesNotThrow(doesNotThrow));
-}
-
-bool CallSite::hasArgument(const Value *Arg) const {
-  for (arg_iterator AI = this->arg_begin(), E = this->arg_end(); AI != E; ++AI)
-    if (AI->get() == Arg)
-      return true;
-  return false;
-}
-
 User::op_iterator CallSite::getCallee() const {
   Instruction *II(getInstruction());
   return isCall()
@@ -111,9 +37,6 @@
     : cast<InvokeInst>(II)->op_end() - 3; // Skip BB, BB, Function
 }
 
-#undef CALLSITE_DELEGATE_GETTER
-#undef CALLSITE_DELEGATE_SETTER
-
 //===----------------------------------------------------------------------===//
 //                            TerminatorInst Class
 //===----------------------------------------------------------------------===//




From johnny.chen at apple.com  Wed Apr 14 17:04:45 2010
From: johnny.chen at apple.com (Johnny Chen)
Date: Wed, 14 Apr 2010 22:04:45 -0000
Subject: [llvm-commits] [llvm] r101293 - in
 /llvm/trunk/lib/Target/ARM/Disassembler: ARMDisassemblerCore.cpp
 ThumbDisassemblerCore.h
Message-ID: <20100414220445.86C462A6C12C@llvm.org>

Author: johnny
Date: Wed Apr 14 17:04:45 2010
New Revision: 101293

URL: http://llvm.org/viewvc/llvm-project?rev=101293&view=rev
Log:
For t2BFI disassembly, apply the same error checking as in r101205.
Change the error msg to read "Encoding error: msb < lsb".

Modified:
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
    llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp?rev=101293&r1=101292&r2=101293&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp Wed Apr 14 17:04:45 2010
@@ -892,8 +892,8 @@
   uint32_t lsb = slice(insn, 11, 7);
   uint32_t msb = slice(insn, 20, 16);
   uint32_t Val = 0;
-  if (lsb > msb) {
-    errs() << "Encoding error: lsb > msb\n";
+  if (msb < lsb) {
+    errs() << "Encoding error: msb < lsb\n";
     return false;
   }
 

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h?rev=101293&r1=101292&r2=101293&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h Wed Apr 14 17:04:45 2010
@@ -1552,7 +1552,10 @@
             Opcode == ARM::t2BFI) && "Invalid opcode");
     MI.addOperand(MCOperand::CreateImm(getLsb(insn)));
     if (Opcode == ARM::t2BFI) {
-      assert(getMsb(insn) >= getLsb(insn) && "Encoding error");
+      if (getMsb(insn) < getLsb(insn)) {
+        errs() << "Encoding error: msb < lsb\n";
+        return false;
+      }
       MI.addOperand(MCOperand::CreateImm(getMsb(insn) - getLsb(insn) + 1));
     } else
       MI.addOperand(MCOperand::CreateImm(getWidthMinus1(insn) + 1));




From nicolas.geoffray at lip6.fr  Wed Apr 14 17:06:38 2010
From: nicolas.geoffray at lip6.fr (Nicolas Geoffray)
Date: Wed, 14 Apr 2010 22:06:38 -0000
Subject: [llvm-commits] [llvm] r101294 -
	/llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp
Message-ID: <20100414220638.1A3EB2A6C12C@llvm.org>

Author: geoffray
Date: Wed Apr 14 17:06:37 2010
New Revision: 101294

URL: http://llvm.org/viewvc/llvm-project?rev=101294&view=rev
Log:
Don't use DILocation when processing a DebugLoc.


Modified:
    llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp

Modified: llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp?rev=101294&r1=101293&r2=101294&view=diff
==============================================================================
--- llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp Wed Apr 14 17:06:37 2010
@@ -369,7 +369,7 @@
     ValueMap<const Function *, EmittedCode,
              EmittedFunctionConfig> EmittedFunctions;
 
-    DILocation PrevDLT;
+    DebugLoc PrevDL;
 
     /// Instance of the JIT
     JIT *TheJIT;
@@ -377,7 +377,7 @@
   public:
     JITEmitter(JIT &jit, JITMemoryManager *JMM, TargetMachine &TM)
       : SizeEstimate(0), Resolver(jit, *this), MMI(0), CurFn(0),
-        EmittedFunctions(this), PrevDLT(NULL), TheJIT(&jit) {
+        EmittedFunctions(this), TheJIT(&jit) {
       MemMgr = JMM ? JMM : JITMemoryManager::CreateDefaultMemManager();
       if (jit.getJITInfo().needsGOT()) {
         MemMgr->AllocateGOT();
@@ -823,19 +823,17 @@
 void JITEmitter::processDebugLoc(DebugLoc DL, bool BeforePrintingInsn) {
   if (DL.isUnknown()) return;
   if (!BeforePrintingInsn) return;
-
-  // FIXME: This is horribly inefficient.
-  DILocation CurDLT(DL.getAsMDNode(
-    EmissionDetails.MF->getFunction()->getContext()));
   
-  if (CurDLT.getScope().getNode() != 0 && PrevDLT.getNode() !=CurDLT.getNode()){
+  const LLVMContext& Context = EmissionDetails.MF->getFunction()->getContext();
+
+  if (DL.getScope(Context) != 0 && PrevDL != DL) {
     JITEvent_EmittedFunctionDetails::LineStart NextLine;
     NextLine.Address = getCurrentPCValue();
     NextLine.Loc = DL;
     EmissionDetails.LineStarts.push_back(NextLine);
   }
 
-  PrevDLT = CurDLT;
+  PrevDL = DL;
 }
 
 static unsigned GetConstantPoolSizeInBytes(MachineConstantPool *MCP,
@@ -1212,6 +1210,9 @@
   TheJIT->NotifyFunctionEmitted(*F.getFunction(), FnStart, FnEnd-FnStart,
                                 EmissionDetails);
 
+  // Reset the previous debug location.
+  PrevDL = DebugLoc();
+
   DEBUG(dbgs() << "JIT: Finished CodeGen of [" << (void*)FnStart
         << "] Function: " << F.getFunction()->getName()
         << ": " << (FnEnd-FnStart) << " bytes of text, "




From gohman at apple.com  Wed Apr 14 17:20:45 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 22:20:45 -0000
Subject: [llvm-commits] [llvm] r101298 - in /llvm/trunk:
 include/llvm/Analysis/ValueTracking.h lib/Analysis/ValueTracking.cpp
Message-ID: <20100414222045.AE13C2A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 17:20:45 2010
New Revision: 101298

URL: http://llvm.org/viewvc/llvm-project?rev=101298&view=rev
Log:
Constify GetConstantStringInfo.

Modified:
    llvm/trunk/include/llvm/Analysis/ValueTracking.h
    llvm/trunk/lib/Analysis/ValueTracking.cpp

Modified: llvm/trunk/include/llvm/Analysis/ValueTracking.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ValueTracking.h?rev=101298&r1=101297&r2=101298&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/ValueTracking.h (original)
+++ llvm/trunk/include/llvm/Analysis/ValueTracking.h Wed Apr 14 17:20:45 2010
@@ -122,7 +122,8 @@
   /// StopAtNul is set to true (the default), the returned string is truncated
   /// by a nul character in the global.  If StopAtNul is false, the nul
   /// character is included in the result string.
-  bool GetConstantStringInfo(Value *V, std::string &Str, uint64_t Offset = 0,
+  bool GetConstantStringInfo(const Value *V, std::string &Str,
+                             uint64_t Offset = 0,
                              bool StopAtNul = true);
                         
   /// GetStringLength - If we can compute the length of the string pointed to by

Modified: llvm/trunk/lib/Analysis/ValueTracking.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ValueTracking.cpp?rev=101298&r1=101297&r2=101298&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ValueTracking.cpp (original)
+++ llvm/trunk/lib/Analysis/ValueTracking.cpp Wed Apr 14 17:20:45 2010
@@ -1342,22 +1342,23 @@
 /// GetConstantStringInfo - This function computes the length of a
 /// null-terminated C string pointed to by V.  If successful, it returns true
 /// and returns the string in Str.  If unsuccessful, it returns false.
-bool llvm::GetConstantStringInfo(Value *V, std::string &Str, uint64_t Offset,
+bool llvm::GetConstantStringInfo(const Value *V, std::string &Str,
+                                 uint64_t Offset,
                                  bool StopAtNul) {
   // If V is NULL then return false;
   if (V == NULL) return false;
 
   // Look through bitcast instructions.
-  if (BitCastInst *BCI = dyn_cast<BitCastInst>(V))
+  if (const BitCastInst *BCI = dyn_cast<BitCastInst>(V))
     return GetConstantStringInfo(BCI->getOperand(0), Str, Offset, StopAtNul);
   
   // If the value is not a GEP instruction nor a constant expression with a
   // GEP instruction, then return false because ConstantArray can't occur
   // any other way
-  User *GEP = 0;
-  if (GetElementPtrInst *GEPI = dyn_cast<GetElementPtrInst>(V)) {
+  const User *GEP = 0;
+  if (const GetElementPtrInst *GEPI = dyn_cast<GetElementPtrInst>(V)) {
     GEP = GEPI;
-  } else if (ConstantExpr *CE = dyn_cast<ConstantExpr>(V)) {
+  } else if (const ConstantExpr *CE = dyn_cast<ConstantExpr>(V)) {
     if (CE->getOpcode() == Instruction::BitCast)
       return GetConstantStringInfo(CE->getOperand(0), Str, Offset, StopAtNul);
     if (CE->getOpcode() != Instruction::GetElementPtr)
@@ -1378,7 +1379,7 @@
     
     // Check to make sure that the first operand of the GEP is an integer and
     // has value 0 so that we are sure we're indexing into the initializer.
-    ConstantInt *FirstIdx = dyn_cast<ConstantInt>(GEP->getOperand(1));
+    const ConstantInt *FirstIdx = dyn_cast<ConstantInt>(GEP->getOperand(1));
     if (FirstIdx == 0 || !FirstIdx->isZero())
       return false;
     
@@ -1386,7 +1387,7 @@
     // into the array.  If this occurs, we can't say anything meaningful about
     // the string.
     uint64_t StartIdx = 0;
-    if (ConstantInt *CI = dyn_cast<ConstantInt>(GEP->getOperand(2)))
+    if (const ConstantInt *CI = dyn_cast<ConstantInt>(GEP->getOperand(2)))
       StartIdx = CI->getZExtValue();
     else
       return false;
@@ -1397,10 +1398,10 @@
   // The GEP instruction, constant or instruction, must reference a global
   // variable that is a constant and is initialized. The referenced constant
   // initializer is the array that we'll use for optimization.
-  GlobalVariable* GV = dyn_cast<GlobalVariable>(V);
+  const GlobalVariable* GV = dyn_cast<GlobalVariable>(V);
   if (!GV || !GV->isConstant() || !GV->hasDefinitiveInitializer())
     return false;
-  Constant *GlobalInit = GV->getInitializer();
+  const Constant *GlobalInit = GV->getInitializer();
   
   // Handle the ConstantAggregateZero case
   if (isa<ConstantAggregateZero>(GlobalInit)) {
@@ -1411,7 +1412,7 @@
   }
   
   // Must be a Constant Array
-  ConstantArray *Array = dyn_cast<ConstantArray>(GlobalInit);
+  const ConstantArray *Array = dyn_cast<ConstantArray>(GlobalInit);
   if (Array == 0 || !Array->getType()->getElementType()->isIntegerTy(8))
     return false;
   
@@ -1425,8 +1426,8 @@
   // to in the array.
   Str.reserve(NumElts-Offset);
   for (unsigned i = Offset; i != NumElts; ++i) {
-    Constant *Elt = Array->getOperand(i);
-    ConstantInt *CI = dyn_cast<ConstantInt>(Elt);
+    const Constant *Elt = Array->getOperand(i);
+    const ConstantInt *CI = dyn_cast<ConstantInt>(Elt);
     if (!CI) // This array isn't suitable, non-int initializer.
       return false;
     if (StopAtNul && CI->isZero())




From gohman at apple.com  Wed Apr 14 17:23:05 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 22:23:05 -0000
Subject: [llvm-commits] [llvm] r101299 -
	/llvm/trunk/include/llvm/IntrinsicInst.h
Message-ID: <20100414222305.594372A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 17:23:05 2010
New Revision: 101299

URL: http://llvm.org/viewvc/llvm-project?rev=101299&view=rev
Log:
Remove a const here. This makes this function consistent with all the
other getOperand wrappers, and it makes it easier to use with DebugInfo
code, which isn't currently prepared to see const MDNode *.

Modified:
    llvm/trunk/include/llvm/IntrinsicInst.h

Modified: llvm/trunk/include/llvm/IntrinsicInst.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IntrinsicInst.h?rev=101299&r1=101298&r2=101299&view=diff
==============================================================================
--- llvm/trunk/include/llvm/IntrinsicInst.h (original)
+++ llvm/trunk/include/llvm/IntrinsicInst.h Wed Apr 14 17:23:05 2010
@@ -105,8 +105,7 @@
       return cast<ConstantInt>(
                              const_cast<Value*>(getOperand(2)))->getZExtValue();
     }
-    const MDNode *getVariable() const { return cast<MDNode>(getOperand(3)); }
-    MDNode *getVariable() { return cast<MDNode>(getOperand(3)); }
+    MDNode *getVariable() const { return cast<MDNode>(getOperand(3)); }
 
     // Methods for support type inquiry through isa, cast, and dyn_cast:
     static inline bool classof(const DbgValueInst *) { return true; }




From gohman at apple.com  Wed Apr 14 17:24:25 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 22:24:25 -0000
Subject: [llvm-commits] [llvm] r101300 -
	/llvm/trunk/include/llvm/Support/ValueHandle.h
Message-ID: <20100414222425.AE6142A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 17:24:25 2010
New Revision: 101300

URL: http://llvm.org/viewvc/llvm-project?rev=101300&view=rev
Log:
Fix TrackingVH to handle const Value subclasses.

Modified:
    llvm/trunk/include/llvm/Support/ValueHandle.h

Modified: llvm/trunk/include/llvm/Support/ValueHandle.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/ValueHandle.h?rev=101300&r1=101299&r2=101300&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/ValueHandle.h (original)
+++ llvm/trunk/include/llvm/Support/ValueHandle.h Wed Apr 14 17:24:25 2010
@@ -315,7 +315,7 @@
 
 public:
   TrackingVH() : ValueHandleBase(Tracking) {}
-  TrackingVH(ValueTy *P) : ValueHandleBase(Tracking, P) {}
+  TrackingVH(ValueTy *P) : ValueHandleBase(Tracking, GetAsValue(P)) {}
   TrackingVH(const TrackingVH &RHS) : ValueHandleBase(Tracking, RHS) {}
 
   operator ValueTy*() const {




From dpatel at apple.com  Wed Apr 14 17:26:20 2010
From: dpatel at apple.com (Devang Patel)
Date: Wed, 14 Apr 2010 22:26:20 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r101302 -
	/llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp
Message-ID: <20100414222620.D405F2A6C12C@llvm.org>

Author: dpatel
Date: Wed Apr 14 17:26:20 2010
New Revision: 101302

URL: http://llvm.org/viewvc/llvm-project?rev=101302&view=rev
Log:
Enable local variable debug info at -O1+. Take2.

Modified:
    llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp

Modified: llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp?rev=101302&r1=101301&r2=101302&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp Wed Apr 14 17:26:20 2010
@@ -445,10 +445,6 @@
 void DebugInfo::EmitDeclare(tree decl, unsigned Tag, const char *Name,
                             tree type, Value *AI, LLVMBuilder &Builder) {
 
-  // Do not emit variable declaration info, for now.
-  if (optimize)
-    return;
-
   // Ignore compiler generated temporaries.
   if (DECL_IGNORED_P(decl))
     return;




From dalej at apple.com  Wed Apr 14 17:27:18 2010
From: dalej at apple.com (Dale Johannesen)
Date: Wed, 14 Apr 2010 15:27:18 -0700
Subject: [llvm-commits] [llvm] r101299 -
	/llvm/trunk/include/llvm/IntrinsicInst.h
In-Reply-To: <20100414222305.594372A6C12C@llvm.org>
References: <20100414222305.594372A6C12C@llvm.org>
Message-ID: <C3D7693D-DB68-465B-82F4-D59611BFA0FE@apple.com>


On Apr 14, 2010, at 3:23 PMPDT, Dan Gohman wrote:

> Author: djg
> Date: Wed Apr 14 17:23:05 2010
> New Revision: 101299
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=101299&view=rev
> Log:
> Remove a const here. This makes this function consistent with all the
> other getOperand wrappers, and it makes it easier to use with DebugInfo
> code, which isn't currently prepared to see const MDNode *.

Please don't do this.  The MDNode is not changing any more by the time we get here, and should be referenced through const*; it's a useful precaution.

> Modified:
>    llvm/trunk/include/llvm/IntrinsicInst.h
> 
> Modified: llvm/trunk/include/llvm/IntrinsicInst.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IntrinsicInst.h?rev=101299&r1=101298&r2=101299&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/IntrinsicInst.h (original)
> +++ llvm/trunk/include/llvm/IntrinsicInst.h Wed Apr 14 17:23:05 2010
> @@ -105,8 +105,7 @@
>       return cast<ConstantInt>(
>                              const_cast<Value*>(getOperand(2)))->getZExtValue();
>     }
> -    const MDNode *getVariable() const { return cast<MDNode>(getOperand(3)); }
> -    MDNode *getVariable() { return cast<MDNode>(getOperand(3)); }
> +    MDNode *getVariable() const { return cast<MDNode>(getOperand(3)); }
> 
>     // Methods for support type inquiry through isa, cast, and dyn_cast:
>     static inline bool classof(const DbgValueInst *) { return true; }
> 
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits




From grosbach at apple.com  Wed Apr 14 17:28:31 2010
From: grosbach at apple.com (Jim Grosbach)
Date: Wed, 14 Apr 2010 22:28:31 -0000
Subject: [llvm-commits] [llvm] r101303 -
	/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
Message-ID: <20100414222831.ECC772A6C12C@llvm.org>

Author: grosbach
Date: Wed Apr 14 17:28:31 2010
New Revision: 101303

URL: http://llvm.org/viewvc/llvm-project?rev=101303&view=rev
Log:
Add -arm-long-calls option to force calls to be indirect. This makes the
kernel linker happier when dealing with kexts.

Radar 7805069


Modified:
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=101303&r1=101302&r2=101303&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Wed Apr 14 17:28:31 2010
@@ -40,12 +40,18 @@
 #include "llvm/MC/MCSectionMachO.h"
 #include "llvm/Target/TargetOptions.h"
 #include "llvm/ADT/VectorExtras.h"
+#include "llvm/Support/CommandLine.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/MathExtras.h"
 #include "llvm/Support/raw_ostream.h"
 #include <sstream>
 using namespace llvm;
 
+static cl::opt<bool>
+EnableARMLongCalls("arm-long-calls", cl::Hidden,
+  cl::desc("Generate calls via indirect call instructions."),
+  cl::init(false));
+
 static bool CC_ARM_APCS_Custom_f64(unsigned &ValNo, EVT &ValVT, EVT &LocVT,
                                    CCValAssign::LocInfo &LocInfo,
                                    ISD::ArgFlagsTy &ArgFlags,
@@ -1027,7 +1033,43 @@
   bool isLocalARMFunc = false;
   MachineFunction &MF = DAG.getMachineFunction();
   ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
-  if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) {
+
+  if (EnableARMLongCalls) {
+    assert (getTargetMachine().getRelocationModel() == Reloc::Static
+            && "long-calls with non-static relocation model!");
+    // Handle a global address or an external symbol. If it's not one of
+    // those, the target's already in a register, so we don't need to do
+    // anything extra.
+    if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) {
+      GlobalValue *GV = G->getGlobal();
+      // Create a constant pool entry for the callee address
+      unsigned ARMPCLabelIndex = AFI->createConstPoolEntryUId();
+      ARMConstantPoolValue *CPV = new ARMConstantPoolValue(GV,
+                                                           ARMPCLabelIndex,
+                                                           ARMCP::CPValue, 0);
+      // Get the address of the callee into a register
+      SDValue CPAddr = DAG.getTargetConstantPool(CPV, getPointerTy(), 4);
+      CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr);
+      Callee = DAG.getLoad(getPointerTy(), dl,
+                           DAG.getEntryNode(), CPAddr,
+                           PseudoSourceValue::getConstantPool(), 0,
+                           false, false, 0);
+    } else if (ExternalSymbolSDNode *S=dyn_cast<ExternalSymbolSDNode>(Callee)) {
+      const char *Sym = S->getSymbol();
+
+      // Create a constant pool entry for the callee address
+      unsigned ARMPCLabelIndex = AFI->createConstPoolEntryUId();
+      ARMConstantPoolValue *CPV = new ARMConstantPoolValue(*DAG.getContext(),
+                                                       Sym, ARMPCLabelIndex, 0);
+      // Get the address of the callee into a register
+      SDValue CPAddr = DAG.getTargetConstantPool(CPV, getPointerTy(), 4);
+      CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr);
+      Callee = DAG.getLoad(getPointerTy(), dl,
+                           DAG.getEntryNode(), CPAddr,
+                           PseudoSourceValue::getConstantPool(), 0,
+                           false, false, 0);
+    }
+  } else if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) {
     GlobalValue *GV = G->getGlobal();
     isDirect = true;
     bool isExt = GV->isDeclaration() || GV->isWeakForLinker();
@@ -1051,7 +1093,7 @@
       SDValue PICLabel = DAG.getConstant(ARMPCLabelIndex, MVT::i32);
       Callee = DAG.getNode(ARMISD::PIC_ADD, dl,
                            getPointerTy(), Callee, PICLabel);
-   } else
+    } else
       Callee = DAG.getTargetGlobalAddress(GV, getPointerTy());
   } else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee)) {
     isDirect = true;




From grosbach at apple.com  Wed Apr 14 17:29:40 2010
From: grosbach at apple.com (Jim Grosbach)
Date: Wed, 14 Apr 2010 22:29:40 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r101304 -
	/llvm-gcc-4.2/trunk/gcc/config/arm/arm.h
Message-ID: <20100414222940.213E92A6C12C@llvm.org>

Author: grosbach
Date: Wed Apr 14 17:29:39 2010
New Revision: 101304

URL: http://llvm.org/viewvc/llvm-project?rev=101304&view=rev
Log:
When building a kext, enable -arm-long-calls.


Modified:
    llvm-gcc-4.2/trunk/gcc/config/arm/arm.h

Modified: llvm-gcc-4.2/trunk/gcc/config/arm/arm.h
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/arm/arm.h?rev=101304&r1=101303&r2=101304&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/gcc/config/arm/arm.h (original)
+++ llvm-gcc-4.2/trunk/gcc/config/arm/arm.h Wed Apr 14 17:29:39 2010
@@ -3552,7 +3552,9 @@
   if (TARGET_SOFT_FLOAT)                               \
     argvec.push_back("-soft-float");                   \
   if (TARGET_HARD_FLOAT_ABI)                           \
-    argvec.push_back("-float-abi=hard");
+    argvec.push_back("-float-abi=hard");               \
+  if (flag_mkernel || flag_apple_kext) \
+    argvec.push_back("-arm-long-calls");
 
 /* Doing struct copy by partial-word loads and stores is not a good idea on ARM. */
 #define TARGET_LLVM_MIN_BYTES_COPY_BY_MEMCPY 4




From johnny.chen at apple.com  Wed Apr 14 17:37:17 2010
From: johnny.chen at apple.com (Johnny Chen)
Date: Wed, 14 Apr 2010 22:37:17 -0000
Subject: [llvm-commits] [llvm] r101306 -
 /llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
Message-ID: <20100414223717.D182B2A6C12C@llvm.org>

Author: johnny
Date: Wed Apr 14 17:37:17 2010
New Revision: 101306

URL: http://llvm.org/viewvc/llvm-project?rev=101306&view=rev
Log:
Fixed another assert exposed by fuzzing.  Now, the DisassembleVFPLdStMulFrm()
function checks whether we have a valid submode for VLDM/VSTM (must be either
"ia" or "db") before calling ARM_AM::getAM5Opc(AMSubMode, unsigned char).

Modified:
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp?rev=101306&r1=101305&r2=101306&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp Wed Apr 14 17:37:17 2010
@@ -1909,6 +1909,12 @@
 
   // Next comes the AM5 Opcode.
   ARM_AM::AMSubMode SubMode = getAMSubModeForBits(getPUBits(insn));
+  // Must be either "ia" or "db" submode.
+  if (SubMode != ARM_AM::ia && SubMode != ARM_AM::db) {
+    errs() << "Illegal addressing mode 5 sub-mode!\n";
+    return false;
+  }
+
   unsigned char Imm8 = insn & 0xFF;
   MI.addOperand(MCOperand::CreateImm(ARM_AM::getAM5Opc(SubMode, Imm8)));
 




From clattner at apple.com  Wed Apr 14 18:15:12 2010
From: clattner at apple.com (Chris Lattner)
Date: Wed, 14 Apr 2010 16:15:12 -0700
Subject: [llvm-commits] [llvm] r101290 - in
	/llvm/trunk/lib/Target/ARM/Disassembler: ARMDisassembler.cpp
	ARMDisassemblerCore.cpp ARMDisassemblerCore.h
	ThumbDisassemblerCore.h
In-Reply-To: <20100414210314.338412A6C12C@llvm.org>
References: <20100414210314.338412A6C12C@llvm.org>
Message-ID: <2CEC50F4-471E-4B8A-9422-996AF5BC67C7@apple.com>


On Apr 14, 2010, at 2:03 PM, Johnny Chen wrote:

> Author: johnny
> Date: Wed Apr 14 16:03:13 2010
> New Revision: 101290
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=101290&view=rev
> Log:
> Fixed another assert exposed by fuzzing.  The utility function getRegisterEnum()
> was asserting because the (RegClass, RegNum) combination doesn't make sense from
> an encoding point of view.
> 
> Since getRegisterEnum() is used all over the place, to change the code to check
> for encoding error after each call would not only bloat the code, but also make
> it less readable.  An Err flag is added to the ARMBasicMCBuilder where a client
> can set a non-zero value to indicate some kind of error condition while building
> up the MCInst.  ARMBasicMCBuilder::BuildIt() checks this flag and returns false
> if a non-zero value is detected.

Hi Johnny,

> +  errs() << "Invalid (RegClassID, RawRegister) combination\n";

The disassembler should not report errors to cerr() / errs().  Sean recently added an API for this on the X86 disassembler side, can this use the same approach?  This error message wouldn't make sense to a user of this library.

-Chris

> 
> Modified:
>    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
>    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
>    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h
>    llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h
> 
> Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp?rev=101290&r1=101289&r2=101290&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp Wed Apr 14 16:03:13 2010
> @@ -495,7 +495,7 @@
>     });
> 
>   ARMBasicMCBuilder *Builder = CreateMCBuilder(Opcode, Format);
> -  Builder->setSession(const_cast<Session *>(&SO));
> +  Builder->SetSession(const_cast<Session *>(&SO));
> 
>   if (!Builder)
>     return false;
> 
> Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp?rev=101290&r1=101289&r2=101290&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp Wed Apr 14 16:03:13 2010
> @@ -76,7 +76,7 @@
> // Return the register enum Based on RegClass and the raw register number.
> // For DRegPair, see comments below.
> // FIXME: Auto-gened?
> -static unsigned getRegisterEnum(unsigned RegClassID, unsigned RawRegister,
> +static unsigned getRegisterEnum(BO B, unsigned RegClassID, unsigned RawRegister,
>                                 bool DRegPair = false) {
> 
>   if (DRegPair && RegClassID == ARM::QPRRegClassID) {
> @@ -346,7 +346,9 @@
>     }
>     break;
>   }
> -  assert(0 && "Invalid (RegClassID, RawRegister) combination");
> +  errs() << "Invalid (RegClassID, RawRegister) combination\n";
> +  // Encoding error.  Mark the builder with error code != 0.
> +  B->SetErr(-1);
>   return 0;
> }
> 
> @@ -510,7 +512,7 @@
> // Inst{3-0} => Rm
> // Inst{11-8} => Rs
> static bool DisassembleMulFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   const TargetInstrDesc &TID = ARMInsts[Opcode];
>   unsigned short NumDefs = TID.getNumDefs();
> @@ -530,26 +532,26 @@
>   if (NumDefs == 2) {
>     assert(NumOps >= 4 && OpInfo[3].RegClass == ARM::GPRRegClassID &&
>            "Expect 4th register operand");
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRd(insn))));
>     ++OpIdx;
>   }
> 
>   // The destination register: RdHi{19-16} or Rd{19-16}.
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRn(insn))));
> 
>   // The two src regsiters: Rn{3-0}, then Rm{11-8}.
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRm(insn))));
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRs(insn))));
>   OpIdx += 3;
> 
>   // Many multiply instructions (e.g., MLA) have three src registers.
>   // The third register operand is Ra{15-12}.
>   if (OpIdx < NumOps && OpInfo[OpIdx].RegClass == ARM::GPRRegClassID) {
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRd(insn))));
>     ++OpIdx;
>   }
> @@ -611,7 +613,7 @@
> // and friends
> //
> static bool DisassembleCoprocessor(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   assert(NumOps >= 5 && "Num of operands >= 5 for coprocessor instr");
> 
> @@ -632,7 +634,7 @@
> 
>     MI.addOperand(MCOperand::CreateImm(decodeRd(insn)));
> 
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRn(insn))));
> 
>     if (PW) {
> @@ -652,11 +654,11 @@
> 
>     MI.addOperand(NoGPR ? MCOperand::CreateImm(decodeRd(insn))
>                         : MCOperand::CreateReg(
> -                            getRegisterEnum(ARM::GPRRegClassID,
> +                            getRegisterEnum(B, ARM::GPRRegClassID,
>                                             decodeRd(insn))));
> 
>     MI.addOperand(OneCopOpc ? MCOperand::CreateReg(
> -                                getRegisterEnum(ARM::GPRRegClassID,
> +                                getRegisterEnum(B, ARM::GPRRegClassID,
>                                                 decodeRn(insn)))
>                             : MCOperand::CreateImm(decodeRn(insn)));
> 
> @@ -689,10 +691,10 @@
> // SRSW/SRS: addrmode4:$addr mode_imm
> // RFEW/RFE: addrmode4:$addr Rn
> static bool DisassembleBrFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   if (CoprocessorOpcode(Opcode))
> -    return DisassembleCoprocessor(MI, Opcode, insn, NumOps, NumOpsAdded);
> +    return DisassembleCoprocessor(MI, Opcode, insn, NumOps, NumOpsAdded, B);
> 
>   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
>   if (!OpInfo) return false;
> @@ -701,7 +703,7 @@
>   if (Opcode == ARM::MRS || Opcode == ARM::MRSsys) {
>     assert(NumOps >= 1 && OpInfo[0].RegClass == ARM::GPRRegClassID &&
>            "Reg operand expected");
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRd(insn))));
>     NumOpsAdded = 1;
>     return true;
> @@ -710,7 +712,7 @@
>   if (Opcode == ARM::BXJ) {
>     assert(NumOps >= 1 && OpInfo[0].RegClass == ARM::GPRRegClassID &&
>            "Reg operand expected");
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRm(insn))));
>     NumOpsAdded = 1;
>     return true;
> @@ -719,7 +721,7 @@
>   if (Opcode == ARM::MSR || Opcode == ARM::MSRsys) {
>     assert(NumOps >= 1 && OpInfo[0].RegClass == ARM::GPRRegClassID &&
>            "Reg operand expected");
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRm(insn))));
>     MI.addOperand(MCOperand::CreateImm(slice(insn, 19, 16)));
>     NumOpsAdded = 2;
> @@ -750,7 +752,7 @@
>     if (Opcode == ARM::SRSW || Opcode == ARM::SRS)
>       MI.addOperand(MCOperand::CreateImm(slice(insn, 4, 0)));
>     else
> -      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                          decodeRn(insn))));
>     NumOpsAdded = 3;
>     return true;
> @@ -793,7 +795,7 @@
> // BLXr9, BXr9
> // BRIND, BX_RET
> static bool DisassembleBrMiscFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
>   if (!OpInfo) return false;
> @@ -810,7 +812,7 @@
>   if (Opcode == ARM::BLXr9 || Opcode == ARM::BRIND) {
>     assert(NumOps >= 1 && OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
>            "Reg operand expected");
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRm(insn))));
>     OpIdx = 1;
>     return true;
> @@ -821,9 +823,9 @@
>     // InOperandList with GPR:$target and GPR:$idx regs.
> 
>     assert(NumOps == 4 && "Expect 4 operands");
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRn(insn))));
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRm(insn))));
> 
>     // Fill in the two remaining imm operands to signify build completion.
> @@ -839,7 +841,7 @@
>     // InOperandList with GPR::$target reg.
> 
>     assert(NumOps == 3 && "Expect 3 operands");
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRm(insn))));
> 
>     // Fill in the two remaining imm operands to signify build completion.
> @@ -856,13 +858,13 @@
>     // See also ARMAddressingModes.h (Addressing Mode #2).
> 
>     assert(NumOps == 5 && getIBit(insn) == 1 && "Expect 5 operands && I-bit=1");
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRn(insn))));
> 
>     ARM_AM::AddrOpc AddrOpcode = getUBit(insn) ? ARM_AM::add : ARM_AM::sub;
> 
>     // Disassemble the offset reg (Rm), shift type, and immediate shift length.
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRm(insn))));
>     // Inst{6-5} encodes the shift opcode.
>     ARM_AM::ShiftOpc ShOp = getShiftOpcForBits(slice(insn, 6, 5));
> @@ -933,7 +935,7 @@
> // operations have Rd Rm Rn, instead of the "normal" Rd Rn Rm.
> // They are QADD, QDADD, QDSUB, and QSUB.
> static bool DisassembleDPFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   const TargetInstrDesc &TID = ARMInsts[Opcode];
>   unsigned short NumDefs = TID.getNumDefs();
> @@ -945,7 +947,7 @@
> 
>   // Disassemble register def if there is one.
>   if (NumDefs && (OpInfo[OpIdx].RegClass == ARM::GPRRegClassID)) {
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRd(insn))));
>     ++OpIdx;
>   }
> @@ -958,7 +960,7 @@
>   if (SaturateOpcode(Opcode)) {
>     MI.addOperand(MCOperand::CreateImm(decodeSaturatePos(Opcode, insn)));
> 
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRm(insn))));
> 
>     if (Opcode == ARM::SSAT16 || Opcode == ARM::USAT16) {
> @@ -986,7 +988,7 @@
>   if (Opcode == ARM::BFC || Opcode == ARM::BFI) {
>     // TIED_TO operand skipped for BFC and Inst{3-0} (Reg) for BFI.
>     MI.addOperand(MCOperand::CreateReg(Opcode == ARM::BFC ? 0
> -                                       : getRegisterEnum(ARM::GPRRegClassID,
> +                                       : getRegisterEnum(B, ARM::GPRRegClassID,
>                                                          decodeRm(insn))));
>     uint32_t mask = 0;
>     if (!getBFCInvMask(insn, mask))
> @@ -997,7 +999,7 @@
>     return true;
>   }
>   if (Opcode == ARM::SBFX || Opcode == ARM::UBFX) {
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRm(insn))));
>     MI.addOperand(MCOperand::CreateImm(slice(insn, 11, 7)));
>     MI.addOperand(MCOperand::CreateImm(slice(insn, 20, 16) + 1));
> @@ -1013,7 +1015,7 @@
>     assert(OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
>            "Reg operand expected");
>     MI.addOperand(MCOperand::CreateReg(
> -                    getRegisterEnum(ARM::GPRRegClassID,
> +                    getRegisterEnum(B, ARM::GPRRegClassID,
>                                     RmRn ? decodeRm(insn) : decodeRn(insn))));
>     ++OpIdx;
>   }
> @@ -1034,7 +1036,7 @@
>     // routed here as well.
>     // assert(getIBit(insn) == 0 && "I_Bit != '0' reg/reg form");
>     MI.addOperand(MCOperand::CreateReg(
> -                    getRegisterEnum(ARM::GPRRegClassID,
> +                    getRegisterEnum(B, ARM::GPRRegClassID,
>                                     RmRn? decodeRn(insn) : decodeRm(insn))));
>     ++OpIdx;
>   } else if (Opcode == ARM::MOVi16 || Opcode == ARM::MOVTi16) {
> @@ -1059,7 +1061,7 @@
> }
> 
> static bool DisassembleDPSoRegFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   const TargetInstrDesc &TID = ARMInsts[Opcode];
>   unsigned short NumDefs = TID.getNumDefs();
> @@ -1071,7 +1073,7 @@
> 
>   // Disassemble register def if there is one.
>   if (NumDefs && (OpInfo[OpIdx].RegClass == ARM::GPRRegClassID)) {
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRd(insn))));
>     ++OpIdx;
>   }
> @@ -1084,7 +1086,7 @@
>   if (!isUnary) {
>     assert(OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
>            "Reg operand expected");
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRn(insn))));
>     ++OpIdx;
>   }
> @@ -1107,11 +1109,11 @@
>   // Register-controlled shifts have Inst{7} = 0 and Inst{4} = 1.
>   unsigned Rs = slice(insn, 4, 4);
> 
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRm(insn))));
>   if (Rs) {
>     // Register-controlled shifts: [Rm, Rs, shift].
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRs(insn))));
>     // Inst{6-5} encodes the shift opcode.
>     ARM_AM::ShiftOpc ShOp = getShiftOpcForBits(slice(insn, 6, 5));
> @@ -1134,7 +1136,7 @@
> }
> 
> static bool DisassembleLdStFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, bool isStore) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, bool isStore, BO B) {
> 
>   const TargetInstrDesc &TID = ARMInsts[Opcode];
>   bool isPrePost = isPrePostLdSt(TID.TSFlags);
> @@ -1153,7 +1155,7 @@
>   if (isPrePost && isStore) {
>     assert(OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
>            "Reg operand expected");
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRn(insn))));
>     ++OpIdx;
>   }
> @@ -1164,7 +1166,7 @@
> 
>   assert(OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
>          "Reg operand expected");
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRd(insn))));
>   ++OpIdx;
> 
> @@ -1172,7 +1174,7 @@
>   if (isPrePost && !isStore) {
>     assert(OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
>            "Reg operand expected");
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRn(insn))));
>     ++OpIdx;
>   }
> @@ -1185,7 +1187,7 @@
>          "Reg operand expected");
>   assert((!isPrePost || (TID.getOperandConstraint(OpIdx, TOI::TIED_TO) != -1))
>          && "Index mode or tied_to operand expected");
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRn(insn))));
>   ++OpIdx;
> 
> @@ -1209,7 +1211,7 @@
>     MI.addOperand(MCOperand::CreateImm(Offset));
>   } else {
>     // Disassemble the offset reg (Rm), shift type, and immediate shift length.
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRm(insn))));
>     // Inst{6-5} encodes the shift opcode.
>     ARM_AM::ShiftOpc ShOp = getShiftOpcForBits(slice(insn, 6, 5));
> @@ -1227,13 +1229,13 @@
> }
> 
> static bool DisassembleLdFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> -  return DisassembleLdStFrm(MI, Opcode, insn, NumOps, NumOpsAdded, false);
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> +  return DisassembleLdStFrm(MI, Opcode, insn, NumOps, NumOpsAdded, false, B);
> }
> 
> static bool DisassembleStFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> -  return DisassembleLdStFrm(MI, Opcode, insn, NumOps, NumOpsAdded, true);
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> +  return DisassembleLdStFrm(MI, Opcode, insn, NumOps, NumOpsAdded, true, B);
> }
> 
> static bool HasDualReg(unsigned Opcode) {
> @@ -1247,7 +1249,7 @@
> }
> 
> static bool DisassembleLdStMiscFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, bool isStore) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, bool isStore, BO B) {
> 
>   const TargetInstrDesc &TID = ARMInsts[Opcode];
>   bool isPrePost = isPrePostLdSt(TID.TSFlags);
> @@ -1266,7 +1268,7 @@
>   if (isPrePost && isStore) {
>     assert(OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
>            "Reg operand expected");
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRn(insn))));
>     ++OpIdx;
>   }
> @@ -1279,13 +1281,13 @@
> 
>   assert(OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
>          "Reg operand expected");
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRd(insn))));
>   ++OpIdx;
> 
>   // Fill in LDRD and STRD's second operand.
>   if (DualReg) {
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRd(insn) + 1)));
>     ++OpIdx;
>   }
> @@ -1294,7 +1296,7 @@
>   if (isPrePost && !isStore) {
>     assert(OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
>            "Reg operand expected");
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRn(insn))));
>     ++OpIdx;
>   }
> @@ -1307,7 +1309,7 @@
>          "Reg operand expected");
>   assert((!isPrePost || (TID.getOperandConstraint(OpIdx, TOI::TIED_TO) != -1))
>          && "Index mode or tied_to operand expected");
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRn(insn))));
>   ++OpIdx;
> 
> @@ -1332,7 +1334,7 @@
>     MI.addOperand(MCOperand::CreateImm(Offset));
>   } else {
>     // Disassemble the offset reg (Rm).
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRm(insn))));
>     unsigned Offset = ARM_AM::getAM3Opc(AddrOpcode, 0);
>     MI.addOperand(MCOperand::CreateImm(Offset));
> @@ -1343,13 +1345,14 @@
> }
> 
> static bool DisassembleLdMiscFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> -  return DisassembleLdStMiscFrm(MI, Opcode, insn, NumOps, NumOpsAdded, false);
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> +  return DisassembleLdStMiscFrm(MI, Opcode, insn, NumOps, NumOpsAdded, false,
> +                                B);
> }
> 
> static bool DisassembleStMiscFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> -  return DisassembleLdStMiscFrm(MI, Opcode, insn, NumOps, NumOpsAdded, true);
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> +  return DisassembleLdStMiscFrm(MI, Opcode, insn, NumOps, NumOpsAdded, true, B);
> }
> 
> // The algorithm for disassembly of LdStMulFrm is different from others because
> @@ -1357,7 +1360,7 @@
> // and operand 1 (the AM4 mode imm).  After operand 3, we need to populate the
> // reglist with each affected register encoded as an MCOperand.
> static bool DisassembleLdStMulFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   assert(NumOps >= 5 && "LdStMulFrm expects NumOps >= 5");
> 
> @@ -1365,7 +1368,7 @@
> 
>   OpIdx = 0;
> 
> -  unsigned Base = getRegisterEnum(ARM::GPRRegClassID, decodeRn(insn));
> +  unsigned Base = getRegisterEnum(B, ARM::GPRRegClassID, decodeRn(insn));
> 
>   // Writeback to base, if necessary.
>   if (Opcode == ARM::LDM_UPD || Opcode == ARM::STM_UPD) {
> @@ -1389,7 +1392,7 @@
>   unsigned RegListBits = insn & ((1 << 16) - 1);
>   for (unsigned i = 0; i < 16; ++i) {
>     if ((RegListBits >> i) & 1) {
> -      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                          i)));
>       ++OpIdx;
>     }
> @@ -1405,7 +1408,7 @@
> //
> // SWP, SWPB:             Rd Rm Rn
> static bool DisassembleLdStExFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
>   if (!OpInfo) return false;
> @@ -1423,29 +1426,29 @@
>   bool isDW = (Opcode == ARM::LDREXD || Opcode == ARM::STREXD);
> 
>   // Add the destination operand.
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRd(insn))));
>   ++OpIdx;
> 
>   // Store register Exclusive needs a source operand.
>   if (isStore) {
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRm(insn))));
>     ++OpIdx;
> 
>     if (isDW) {
> -      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                          decodeRm(insn)+1)));
>       ++OpIdx;
>     }
>   } else if (isDW) {
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRd(insn)+1)));
>     ++OpIdx;
>   }
> 
>   // Finally add the pointer operand.
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRn(insn))));
>   ++OpIdx;
> 
> @@ -1457,7 +1460,7 @@
> // PKHBT, PKHTB: Rd Rn Rm , LSL/ASR #imm5
> // RBIT, REV, REV16, REVSH: Rd Rm
> static bool DisassembleArithMiscFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
>   unsigned &OpIdx = NumOpsAdded;
> @@ -1471,18 +1474,18 @@
> 
>   bool ThreeReg = NumOps > 2 && OpInfo[2].RegClass == ARM::GPRRegClassID;
> 
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRd(insn))));
>   ++OpIdx;
> 
>   if (ThreeReg) {
>     assert(NumOps >= 4 && "Expect >= 4 operands");
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRn(insn))));
>     ++OpIdx;
>   }
> 
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRm(insn))));
>   ++OpIdx;
> 
> @@ -1504,7 +1507,7 @@
> // The 2nd operand register is Rn and the 3rd operand regsiter is Rm for the
> // three register operand form.  Otherwise, Rn=0b1111 and only Rm is used.
> static bool DisassembleExtFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
>   unsigned &OpIdx = NumOpsAdded;
> @@ -1518,17 +1521,17 @@
> 
>   bool ThreeReg = NumOps > 2 && OpInfo[2].RegClass == ARM::GPRRegClassID;
> 
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRd(insn))));
>   ++OpIdx;
> 
>   if (ThreeReg) {
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRn(insn))));
>     ++OpIdx;
>   }
> 
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRm(insn))));
>   ++OpIdx;
> 
> @@ -1610,7 +1613,7 @@
> // VCVTDS, VCVTSD: converts between double-precision and single-precision
> // The rest of the instructions have homogeneous [VFP]Rd and [VFP]Rm registers.
> static bool DisassembleVFPUnaryFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   assert(NumOps >= 1 && "VFPUnaryFrm expects NumOps >= 1");
> 
> @@ -1625,7 +1628,7 @@
>   bool isSP = (RegClass == ARM::SPRRegClassID);
> 
>   MI.addOperand(MCOperand::CreateReg(
> -                  getRegisterEnum(RegClass, decodeVFPRd(insn, isSP))));
> +                  getRegisterEnum(B, RegClass, decodeVFPRd(insn, isSP))));
>   ++OpIdx;
> 
>   // Early return for compare with zero instructions.
> @@ -1639,7 +1642,7 @@
>   isSP = (RegClass == ARM::SPRRegClassID);
> 
>   MI.addOperand(MCOperand::CreateReg(
> -                  getRegisterEnum(RegClass, decodeVFPRm(insn, isSP))));
> +                  getRegisterEnum(B, RegClass, decodeVFPRm(insn, isSP))));
>   ++OpIdx;
> 
>   return true;
> @@ -1650,7 +1653,7 @@
> // InOperandList to that of the dst.  As far as asm printing is concerned, this
> // tied_to operand is simply skipped.
> static bool DisassembleVFPBinaryFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   assert(NumOps >= 3 && "VFPBinaryFrm expects NumOps >= 3");
> 
> @@ -1666,7 +1669,7 @@
>   bool isSP = (RegClass == ARM::SPRRegClassID);
> 
>   MI.addOperand(MCOperand::CreateReg(
> -                  getRegisterEnum(RegClass, decodeVFPRd(insn, isSP))));
> +                  getRegisterEnum(B, RegClass, decodeVFPRd(insn, isSP))));
>   ++OpIdx;
> 
>   // Skip tied_to operand constraint.
> @@ -1677,11 +1680,11 @@
>   }
> 
>   MI.addOperand(MCOperand::CreateReg(
> -                  getRegisterEnum(RegClass, decodeVFPRn(insn, isSP))));
> +                  getRegisterEnum(B, RegClass, decodeVFPRn(insn, isSP))));
>   ++OpIdx;
> 
>   MI.addOperand(MCOperand::CreateReg(
> -                  getRegisterEnum(RegClass, decodeVFPRm(insn, isSP))));
> +                  getRegisterEnum(B, RegClass, decodeVFPRm(insn, isSP))));
>   ++OpIdx;
> 
>   return true;
> @@ -1694,7 +1697,7 @@
> // A8.6.297 vcvt (floating-point and fixed-point)
> // Dd|Sd Dd|Sd(TIED_TO) #fbits(= 16|32 - UInt(imm4:i))
> static bool DisassembleVFPConv1Frm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   assert(NumOps >= 2 && "VFPConv1Frm expects NumOps >= 2");
> 
> @@ -1712,7 +1715,7 @@
>     int size = slice(insn, 7, 7) == 0 ? 16 : 32;
>     int fbits = size - (slice(insn,3,0) << 1 | slice(insn,5,5));
>     MI.addOperand(MCOperand::CreateReg(
> -                    getRegisterEnum(RegClassID,
> +                    getRegisterEnum(B, RegClassID,
>                                     decodeVFPRd(insn, SP))));
> 
>     assert(TID.getOperandConstraint(1, TOI::TIED_TO) != -1 &&
> @@ -1732,15 +1735,15 @@
>     if (slice(insn, 18, 18) == 1) { // to_integer operation
>       d = decodeVFPRd(insn, true /* Is Single Precision */);
>       MI.addOperand(MCOperand::CreateReg(
> -                      getRegisterEnum(ARM::SPRRegClassID, d)));
> +                      getRegisterEnum(B, ARM::SPRRegClassID, d)));
>       m = decodeVFPRm(insn, SP);
> -      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(RegClassID, m)));
> +      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, RegClassID, m)));
>     } else {
>       d = decodeVFPRd(insn, SP);
> -      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(RegClassID, d)));
> +      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, RegClassID, d)));
>       m = decodeVFPRm(insn, true /* Is Single Precision */);
>       MI.addOperand(MCOperand::CreateReg(
> -                      getRegisterEnum(ARM::SPRRegClassID, m)));
> +                      getRegisterEnum(B, ARM::SPRRegClassID, m)));
>     }
>     NumOpsAdded = 2;
>   }
> @@ -1751,13 +1754,13 @@
> // VMOVRS - A8.6.330
> // Rt => Rd; Sn => UInt(Vn:N)
> static bool DisassembleVFPConv2Frm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   assert(NumOps >= 2 && "VFPConv2Frm expects NumOps >= 2");
> 
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRd(insn))));
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::SPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::SPRRegClassID,
>                                                      decodeVFPRn(insn, true))));
>   NumOpsAdded = 2;
>   return true;
> @@ -1769,29 +1772,29 @@
> // VMOVRRS - A8.6.331
> // Rt => Rd; Rt2 => Rn; Sm => UInt(Vm:M); Sm1 = Sm+1
> static bool DisassembleVFPConv3Frm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   assert(NumOps >= 3 && "VFPConv3Frm expects NumOps >= 3");
> 
>   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
>   unsigned &OpIdx = NumOpsAdded;
> 
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRd(insn))));
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRn(insn))));
>   OpIdx = 2;
> 
>   if (OpInfo[OpIdx].RegClass == ARM::SPRRegClassID) {
>     unsigned Sm = decodeVFPRm(insn, true);
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::SPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::SPRRegClassID,
>                                                        Sm)));
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::SPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::SPRRegClassID,
>                                                        Sm+1)));
>     OpIdx += 2;
>   } else {
>     MI.addOperand(MCOperand::CreateReg(
> -                    getRegisterEnum(ARM::DPRRegClassID,
> +                    getRegisterEnum(B, ARM::DPRRegClassID,
>                                     decodeVFPRm(insn, false))));
>     ++OpIdx;
>   }
> @@ -1801,13 +1804,13 @@
> // VMOVSR - A8.6.330
> // Rt => Rd; Sn => UInt(Vn:N)
> static bool DisassembleVFPConv4Frm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   assert(NumOps >= 2 && "VFPConv4Frm expects NumOps >= 2");
> 
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::SPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::SPRRegClassID,
>                                                      decodeVFPRn(insn, true))));
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRd(insn))));
>   NumOpsAdded = 2;
>   return true;
> @@ -1819,7 +1822,7 @@
> // VMOVRRS - A8.6.331
> // Rt => Rd; Rt2 => Rn; Sm => UInt(Vm:M); Sm1 = Sm+1
> static bool DisassembleVFPConv5Frm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   assert(NumOps >= 3 && "VFPConv5Frm expects NumOps >= 3");
> 
> @@ -1830,21 +1833,21 @@
> 
>   if (OpInfo[OpIdx].RegClass == ARM::SPRRegClassID) {
>     unsigned Sm = decodeVFPRm(insn, true);
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::SPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::SPRRegClassID,
>                                                        Sm)));
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::SPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::SPRRegClassID,
>                                                        Sm+1)));
>     OpIdx += 2;
>   } else {
>     MI.addOperand(MCOperand::CreateReg(
> -                    getRegisterEnum(ARM::DPRRegClassID,
> +                    getRegisterEnum(B, ARM::DPRRegClassID,
>                                     decodeVFPRm(insn, false))));
>     ++OpIdx;
>   }
> 
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRd(insn))));
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRn(insn))));
>   OpIdx += 2;
>   return true;
> @@ -1853,7 +1856,7 @@
> // VFP Load/Store Instructions.
> // VLDRD, VLDRS, VSTRD, VSTRS
> static bool DisassembleVFPLdStFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   assert(NumOps >= 3 && "VFPLdStFrm expects NumOps >= 3");
> 
> @@ -1863,9 +1866,9 @@
>   // Extract Dd/Sd for operand 0.
>   unsigned RegD = decodeVFPRd(insn, isSPVFP);
> 
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(RegClassID, RegD)));
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, RegClassID, RegD)));
> 
> -  unsigned Base = getRegisterEnum(ARM::GPRRegClassID, decodeRn(insn));
> +  unsigned Base = getRegisterEnum(B, ARM::GPRRegClassID, decodeRn(insn));
>   MI.addOperand(MCOperand::CreateReg(Base));
> 
>   // Next comes the AM5 Opcode.
> @@ -1885,7 +1888,7 @@
> //
> // VLDMD[_UPD], VLDMS[_UPD], VSTMD[_UPD], VSTMS[_UPD]
> static bool DisassembleVFPLdStMulFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   assert(NumOps >= 5 && "VFPLdStMulFrm expects NumOps >= 5");
> 
> @@ -1893,7 +1896,7 @@
> 
>   OpIdx = 0;
> 
> -  unsigned Base = getRegisterEnum(ARM::GPRRegClassID, decodeRn(insn));
> +  unsigned Base = getRegisterEnum(B, ARM::GPRRegClassID, decodeRn(insn));
> 
>   // Writeback to base, if necessary.
>   if (Opcode == ARM::VLDMD_UPD || Opcode == ARM::VLDMS_UPD ||
> @@ -1926,7 +1929,7 @@
>   // Fill the variadic part of reglist.
>   unsigned Regs = isSPVFP ? Imm8 : Imm8/2;
>   for (unsigned i = 0; i < Regs; ++i) {
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(RegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, RegClassID,
>                                                        RegD + i)));
>     ++OpIdx;
>   }
> @@ -1940,7 +1943,7 @@
> // FCONSTS (SPR and a VFPf32Imm operand)
> // VMRS/VMSR (GPR operand)
> static bool DisassembleVFPMiscFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
>   unsigned &OpIdx = NumOpsAdded;
> @@ -1955,13 +1958,13 @@
>   unsigned RegEnum = 0;
>   switch (OpInfo[0].RegClass) {
>   case ARM::DPRRegClassID:
> -    RegEnum = getRegisterEnum(ARM::DPRRegClassID, decodeVFPRd(insn, false));
> +    RegEnum = getRegisterEnum(B, ARM::DPRRegClassID, decodeVFPRd(insn, false));
>     break;
>   case ARM::SPRRegClassID:
> -    RegEnum = getRegisterEnum(ARM::SPRRegClassID, decodeVFPRd(insn, true));
> +    RegEnum = getRegisterEnum(B, ARM::SPRRegClassID, decodeVFPRd(insn, true));
>     break;
>   case ARM::GPRRegClassID:
> -    RegEnum = getRegisterEnum(ARM::GPRRegClassID, decodeRd(insn));
> +    RegEnum = getRegisterEnum(B, ARM::GPRRegClassID, decodeRd(insn));
>     break;
>   default:
>     assert(0 && "Invalid reg class id");
> @@ -2231,7 +2234,8 @@
> //
> // Correctly set VLD*/VST*'s TIED_TO GPR, as the asm printer needs it.
> static bool DisassembleNLdSt0(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, bool Store, bool DblSpaced) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, bool Store, bool DblSpaced,
> +    BO B) {
> 
>   const TargetInstrDesc &TID = ARMInsts[Opcode];
>   const TargetOperandInfo *OpInfo = TID.OpInfo;
> @@ -2259,7 +2263,7 @@
>   // LLVM Addressing Mode #6.
>   unsigned RmEnum = 0;
>   if (WB && Rm != 13)
> -    RmEnum = getRegisterEnum(ARM::GPRRegClassID, Rm);
> +    RmEnum = getRegisterEnum(B, ARM::GPRRegClassID, Rm);
> 
>   if (Store) {
>     // Consume possible WB, AddrMode6, possible increment reg, the DPR/QPR's,
> @@ -2268,14 +2272,14 @@
>            "Reg operand expected");
> 
>     if (WB) {
> -      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                          Rn)));
>       ++OpIdx;
>     }
> 
>     assert((OpIdx+1) < NumOps && OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
>            OpInfo[OpIdx + 1].RegClass == 0 && "Addrmode #6 Operands expected");
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        Rn)));
>     MI.addOperand(MCOperand::CreateImm(0)); // Alignment ignored?
>     OpIdx += 2;
> @@ -2293,9 +2297,10 @@
>     RegClass = OpInfo[OpIdx].RegClass;
>     while (OpIdx < NumOps && OpInfo[OpIdx].RegClass == RegClass) {
>       if (Opcode >= ARM::VST1q16 && Opcode <= ARM::VST1q8)
> -        MI.addOperand(MCOperand::CreateReg(getRegisterEnum(RegClass,Rd,true)));
> +        MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, RegClass, Rd,
> +                                                           true)));
>       else
> -        MI.addOperand(MCOperand::CreateReg(getRegisterEnum(RegClass,Rd)));
> +        MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, RegClass,Rd)));
>       Rd += Inc;
>       ++OpIdx;
>     }
> @@ -2314,22 +2319,23 @@
> 
>     while (OpIdx < NumOps && OpInfo[OpIdx].RegClass == RegClass) {
>       if (Opcode >= ARM::VLD1q16 && Opcode <= ARM::VLD1q8)
> -        MI.addOperand(MCOperand::CreateReg(getRegisterEnum(RegClass,Rd,true)));
> +        MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, RegClass, Rd,
> +                                                           true)));
>       else
> -        MI.addOperand(MCOperand::CreateReg(getRegisterEnum(RegClass,Rd)));
> +        MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, RegClass, Rd)));
>       Rd += Inc;
>       ++OpIdx;
>     }
> 
>     if (WB) {
> -      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                          Rn)));
>       ++OpIdx;
>     }
> 
>     assert((OpIdx+1) < NumOps && OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
>            OpInfo[OpIdx + 1].RegClass == 0 && "Addrmode #6 Operands expected");
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        Rn)));
>     MI.addOperand(MCOperand::CreateImm(0)); // Alignment ignored?
>     OpIdx += 2;
> @@ -2362,7 +2368,7 @@
> // Find out about double-spaced-ness of the Opcode and pass it on to
> // DisassembleNLdSt0().
> static bool DisassembleNLdSt(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   const StringRef Name = ARMInsts[Opcode].Name;
>   bool DblSpaced = false;
> @@ -2397,13 +2403,13 @@
> 
>   }
>   return DisassembleNLdSt0(MI, Opcode, insn, NumOps, NumOpsAdded,
> -                           slice(insn, 21, 21) == 0, DblSpaced);
> +                           slice(insn, 21, 21) == 0, DblSpaced, B);
> }
> 
> // VMOV (immediate)
> //   Qd/Dd imm
> static bool DisassembleN1RegModImmFrm(MCInst &MI, unsigned Opcode,
> -    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   const TargetInstrDesc &TID = ARMInsts[Opcode];
>   const TargetOperandInfo *OpInfo = TID.OpInfo;
> @@ -2415,7 +2421,7 @@
>          "Expect 1 reg operand followed by 1 imm operand");
> 
>   // Qd/Dd = Inst{22:15-12} => NEON Rd
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(OpInfo[0].RegClass,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, OpInfo[0].RegClass,
>                                                      decodeNEONRd(insn))));
> 
>   ElemSize esize = ESizeNA;
> @@ -2471,7 +2477,7 @@
> //
> // Others
> static bool DisassembleNVdVmOptImm(MCInst &MI, unsigned Opc, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, N2VFlag Flag = N2V_None) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, N2VFlag Flag, BO B) {
> 
>   const TargetInstrDesc &TID = ARMInsts[Opc];
>   const TargetOperandInfo *OpInfo = TID.OpInfo;
> @@ -2498,7 +2504,7 @@
>   }
> 
>   // Qd/Dd = Inst{22:15-12} => NEON Rd
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(OpInfo[OpIdx].RegClass,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, OpInfo[OpIdx].RegClass,
>                                                      decodeNEONRd(insn))));
>   ++OpIdx;
> 
> @@ -2510,7 +2516,7 @@
>   }
> 
>   // Dm = Inst{5:3-0} => NEON Rm
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(OpInfo[OpIdx].RegClass,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, OpInfo[OpIdx].RegClass,
>                                                      decodeNEONRm(insn))));
>   ++OpIdx;
> 
> @@ -2543,21 +2549,22 @@
> }
> 
> static bool DisassembleN2RegFrm(MCInst &MI, unsigned Opc, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
> -  return DisassembleNVdVmOptImm(MI, Opc, insn, NumOps, NumOpsAdded);
> +  return DisassembleNVdVmOptImm(MI, Opc, insn, NumOps, NumOpsAdded,
> +                                N2V_None, B);
> }
> static bool DisassembleNVCVTFrm(MCInst &MI, unsigned Opc, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   return DisassembleNVdVmOptImm(MI, Opc, insn, NumOps, NumOpsAdded,
> -                                N2V_VectorConvert_Between_Float_Fixed);
> +                                N2V_VectorConvert_Between_Float_Fixed, B);
> }
> static bool DisassembleNVecDupLnFrm(MCInst &MI, unsigned Opc, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   return DisassembleNVdVmOptImm(MI, Opc, insn, NumOps, NumOpsAdded,
> -                                N2V_VectorDupLane);
> +                                N2V_VectorDupLane, B);
> }
> 
> // Vector Shift [Accumulate] Instructions.
> @@ -2567,7 +2574,7 @@
> // VSHLLi16, VSHLLi32, VSHLLi8: Qd Dm imm (== size)
> //
> static bool DisassembleNVectorShift(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, bool LeftShift) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, bool LeftShift, BO B) {
> 
>   const TargetInstrDesc &TID = ARMInsts[Opcode];
>   const TargetOperandInfo *OpInfo = TID.OpInfo;
> @@ -2584,7 +2591,7 @@
>   OpIdx = 0;
> 
>   // Qd/Dd = Inst{22:15-12} => NEON Rd
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(OpInfo[OpIdx].RegClass,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, OpInfo[OpIdx].RegClass,
>                                                      decodeNEONRd(insn))));
>   ++OpIdx;
> 
> @@ -2599,7 +2606,7 @@
>          "Reg operand expected");
> 
>   // Qm/Dm = Inst{5:3-0} => NEON Rm
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(OpInfo[OpIdx].RegClass,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, OpInfo[OpIdx].RegClass,
>                                                      decodeNEONRm(insn))));
>   ++OpIdx;
> 
> @@ -2631,15 +2638,17 @@
> 
> // Left shift instructions.
> static bool DisassembleN2RegVecShLFrm(MCInst &MI, unsigned Opcode,
> -    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
> -  return DisassembleNVectorShift(MI, Opcode, insn, NumOps, NumOpsAdded, true);
> +  return DisassembleNVectorShift(MI, Opcode, insn, NumOps, NumOpsAdded, true,
> +                                 B);
> }
> // Right shift instructions have different shift amount interpretation.
> static bool DisassembleN2RegVecShRFrm(MCInst &MI, unsigned Opcode,
> -    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
> -  return DisassembleNVectorShift(MI, Opcode, insn, NumOps, NumOpsAdded, false);
> +  return DisassembleNVectorShift(MI, Opcode, insn, NumOps, NumOpsAdded, false,
> +                                 B);
> }
> 
> namespace {
> @@ -2664,7 +2673,7 @@
> //
> // Others
> static bool DisassembleNVdVnVmOptImm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, N3VFlag Flag = N3V_None) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, N3VFlag Flag, BO B) {
> 
>   const TargetInstrDesc &TID = ARMInsts[Opcode];
>   const TargetOperandInfo *OpInfo = TID.OpInfo;
> @@ -2693,7 +2702,7 @@
>   }
> 
>   // Qd/Dd = Inst{22:15-12} => NEON Rd
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(OpInfo[OpIdx].RegClass,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, OpInfo[OpIdx].RegClass,
>                                                      decodeNEONRd(insn))));
>   ++OpIdx;
> 
> @@ -2708,7 +2717,7 @@
>   // or
>   // Dm = Inst{5:3-0} => NEON Rm
>   MI.addOperand(MCOperand::CreateReg(
> -                  getRegisterEnum(OpInfo[OpIdx].RegClass,
> +                  getRegisterEnum(B, OpInfo[OpIdx].RegClass,
>                                   VdVnVm ? decodeNEONRn(insn)
>                                          : decodeNEONRm(insn))));
>   ++OpIdx;
> @@ -2728,7 +2737,7 @@
>                       : decodeNEONRn(insn);
> 
>   MI.addOperand(MCOperand::CreateReg(
> -                  getRegisterEnum(OpInfo[OpIdx].RegClass, m)));
> +                  getRegisterEnum(B, OpInfo[OpIdx].RegClass, m)));
>   ++OpIdx;
> 
>   if (OpIdx < NumOps && OpInfo[OpIdx].RegClass == 0
> @@ -2752,27 +2761,28 @@
> }
> 
> static bool DisassembleN3RegFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
> -  return DisassembleNVdVnVmOptImm(MI, Opcode, insn, NumOps, NumOpsAdded);
> +  return DisassembleNVdVnVmOptImm(MI, Opcode, insn, NumOps, NumOpsAdded,
> +                                  N3V_None, B);
> }
> static bool DisassembleN3RegVecShFrm(MCInst &MI, unsigned Opcode,
> -    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   return DisassembleNVdVnVmOptImm(MI, Opcode, insn, NumOps, NumOpsAdded,
> -                                  N3V_VectorShift);
> +                                  N3V_VectorShift, B);
> }
> static bool DisassembleNVecExtractFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   return DisassembleNVdVnVmOptImm(MI, Opcode, insn, NumOps, NumOpsAdded,
> -                                  N3V_VectorExtract);
> +                                  N3V_VectorExtract, B);
> }
> static bool DisassembleNVecMulScalarFrm(MCInst &MI, unsigned Opcode,
> -    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   return DisassembleNVdVnVmOptImm(MI, Opcode, insn, NumOps, NumOpsAdded,
> -                                  N3V_Multiply_By_Scalar);
> +                                  N3V_Multiply_By_Scalar, B);
> }
> 
> // Vector Table Lookup
> @@ -2782,7 +2792,7 @@
> // VTBL3, VTBX3: Dd [Dd(TIED_TO)] Dn Dn+1 Dn+2 Dm
> // VTBL4, VTBX4: Dd [Dd(TIED_TO)] Dn Dn+1 Dn+2 Dn+3 Dm
> static bool DisassembleNVTBLFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   const TargetInstrDesc &TID = ARMInsts[Opcode];
>   const TargetOperandInfo *OpInfo = TID.OpInfo;
> @@ -2807,7 +2817,7 @@
>   unsigned Len = slice(insn, 9, 8) + 1;
> 
>   // Dd (the destination vector)
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::DPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::DPRRegClassID,
>                                                      decodeNEONRd(insn))));
>   ++OpIdx;
> 
> @@ -2822,7 +2832,7 @@
>   for (unsigned i = 0; i < Len; ++i) {
>     assert(OpIdx < NumOps && OpInfo[OpIdx].RegClass == ARM::DPRRegClassID &&
>            "Reg operand expected");
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::DPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::DPRRegClassID,
>                                                        Rn + i)));
>     ++OpIdx;
>   }
> @@ -2830,7 +2840,7 @@
>   // Dm (the index vector)
>   assert(OpIdx < NumOps && OpInfo[OpIdx].RegClass == ARM::DPRRegClassID &&
>          "Reg operand (index vector) expected");
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::DPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::DPRRegClassID,
>                                                      decodeNEONRm(insn))));
>   ++OpIdx;
> 
> @@ -2846,7 +2856,7 @@
> // Vector Get Lane (move scalar to ARM core register) Instructions.
> // VGETLNi32, VGETLNs16, VGETLNs8, VGETLNu16, VGETLNu8: Rt Dn index
> static bool DisassembleNEONGetLnFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   const TargetInstrDesc &TID = ARMInsts[Opcode];
>   const TargetOperandInfo *OpInfo = TID.OpInfo;
> @@ -2864,11 +2874,11 @@
>                                                                 : ESize32);
> 
>   // Rt = Inst{15-12} => ARM Rd
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRd(insn))));
> 
>   // Dn = Inst{7:19-16} => NEON Rn
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::DPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::DPRRegClassID,
>                                                      decodeNEONRn(insn))));
> 
>   MI.addOperand(MCOperand::CreateImm(decodeNVLaneOpIndex(insn, esize)));
> @@ -2880,7 +2890,7 @@
> // Vector Set Lane (move ARM core register to scalar) Instructions.
> // VSETLNi16, VSETLNi32, VSETLNi8: Dd Dd (TIED_TO) Rt index
> static bool DisassembleNEONSetLnFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   const TargetInstrDesc &TID = ARMInsts[Opcode];
>   const TargetOperandInfo *OpInfo = TID.OpInfo;
> @@ -2900,14 +2910,14 @@
>                                                         : ESize32);
> 
>   // Dd = Inst{7:19-16} => NEON Rn
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::DPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::DPRRegClassID,
>                                                      decodeNEONRn(insn))));
> 
>   // TIED_TO operand.
>   MI.addOperand(MCOperand::CreateReg(0));
> 
>   // Rt = Inst{15-12} => ARM Rd
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRd(insn))));
> 
>   MI.addOperand(MCOperand::CreateImm(decodeNVLaneOpIndex(insn, esize)));
> @@ -2919,7 +2929,7 @@
> // Vector Duplicate Instructions (from ARM core register to all elements).
> // VDUP8d, VDUP16d, VDUP32d, VDUP8q, VDUP16q, VDUP32q: Qd/Dd Rt
> static bool DisassembleNEONDupFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
> 
> @@ -2932,11 +2942,11 @@
>   unsigned RegClass = OpInfo[0].RegClass;
> 
>   // Qd/Dd = Inst{7:19-16} => NEON Rn
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(RegClass,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, RegClass,
>                                                      decodeNEONRn(insn))));
> 
>   // Rt = Inst{15-12} => ARM Rd
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRd(insn))));
> 
>   NumOpsAdded = 2;
> @@ -2966,13 +2976,13 @@
> }
> 
> static bool DisassemblePreLoadFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   // Preload Data/Instruction requires either 2 or 4 operands.
>   // PLDi, PLDWi, PLIi:                Rn [+/-]imm12 add = (U == '1')
>   // PLDr[a|m], PLDWr[a|m], PLIr[a|m]: Rn Rm addrmode2_opc
> 
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRn(insn))));
> 
>   if (Opcode == ARM::PLDi || Opcode == ARM::PLDWi || Opcode == ARM::PLIi) {
> @@ -2982,7 +2992,7 @@
>     MI.addOperand(MCOperand::CreateImm(Offset));
>     NumOpsAdded = 2;
>   } else {
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRm(insn))));
> 
>     ARM_AM::AddrOpc AddrOpcode = getUBit(insn) ? ARM_AM::add : ARM_AM::sub;
> @@ -3003,7 +3013,7 @@
> }
> 
> static bool DisassembleMiscFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   if (MemBarrierInstr(insn))
>     return true;
> @@ -3052,7 +3062,7 @@
>   }
> 
>   if (PreLoadOpcode(Opcode))
> -    return DisassemblePreLoadFrm(MI, Opcode, insn, NumOps, NumOpsAdded);
> +    return DisassemblePreLoadFrm(MI, Opcode, insn, NumOps, NumOpsAdded, B);
> 
>   assert(0 && "Unexpected misc instruction!");
>   return false;
> @@ -3168,7 +3178,7 @@
>   unsigned NumOpsAdded = 0;
>   bool OK = (*Disasm)(MI, Opcode, insn, NumOps, NumOpsAdded, this);
> 
> -  if (!OK) return false;
> +  if (!OK || this->Err != 0) return false;
>   if (NumOpsAdded >= NumOps)
>     return true;
> 
> @@ -3255,7 +3265,7 @@
> /// Opcode, Format, and NumOperands make up an ARM Basic MCBuilder.
> ARMBasicMCBuilder::ARMBasicMCBuilder(unsigned opc, ARMFormat format,
>                                      unsigned short num)
> -  : Opcode(opc), Format(format), NumOps(num), SP(0) {
> +  : Opcode(opc), Format(format), NumOps(num), SP(0), Err(0) {
>   unsigned Idx = (unsigned)format;
>   assert(Idx < (array_lengthof(FuncPtrs) - 1) && "Unknown format");
>   Disasm = FuncPtrs[Idx];
> 
> Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h?rev=101290&r1=101289&r2=101290&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h (original)
> +++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h Wed Apr 14 16:03:13 2010
> @@ -187,6 +187,7 @@
>   unsigned short NumOps;
>   DisassembleFP Disasm;
>   Session *SP;
> +  int Err; // !=0 if the builder encounters some error condition during build.
> 
> private:
>   /// Opcode, Format, and NumOperands make up an ARM Basic MCBuilder.
> @@ -195,15 +196,20 @@
> public:
>   ARMBasicMCBuilder(ARMBasicMCBuilder &B)
>     : Opcode(B.Opcode), Format(B.Format), NumOps(B.NumOps), Disasm(B.Disasm),
> -      SP(B.SP)
> -  {}
> +      SP(B.SP) {
> +    Err = 0;
> +  }
> 
>   virtual ~ARMBasicMCBuilder() {}
> 
> -  void setSession(Session *sp) {
> +  void SetSession(Session *sp) {
>     SP = sp;
>   }
> 
> +  void SetErr(int ErrCode) {
> +    Err = ErrCode;
> +  }
> +
>   /// TryPredicateAndSBitModifier - TryPredicateAndSBitModifier tries to process
>   /// the possible Predicate and SBitModifier, to build the remaining MCOperand
>   /// constituents.
> 
> Modified: llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h?rev=101290&r1=101289&r2=101290&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h (original)
> +++ llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h Wed Apr 14 16:03:13 2010
> @@ -342,7 +342,7 @@
> // Special case:
> // tMOVSr:                  tRd tRn
> static bool DisassembleThumb1General(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO Builder) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
>   unsigned &OpIdx = NumOpsAdded;
> @@ -360,14 +360,14 @@
> 
>   // Add the destination operand.
>   MI.addOperand(MCOperand::CreateReg(
> -                  getRegisterEnum(ARM::tGPRRegClassID,
> +                  getRegisterEnum(B, ARM::tGPRRegClassID,
>                                   UseRt ? getT1tRt(insn) : getT1tRd(insn))));
>   ++OpIdx;
> 
>   // Check whether the next operand to be added is a CCR Register.
>   if (OpInfo[OpIdx].RegClass == ARM::CCRRegClassID) {
>     assert(OpInfo[OpIdx].isOptionalDef() && "Optional def operand expected");
> -    MI.addOperand(MCOperand::CreateReg(Builder->InITBlock() ? 0 : ARM::CPSR));
> +    MI.addOperand(MCOperand::CreateReg(B->InITBlock() ? 0 : ARM::CPSR));
>     ++OpIdx;
>   }
> 
> @@ -376,7 +376,7 @@
>   if (OpInfo[OpIdx].RegClass == ARM::tGPRRegClassID) {
>     // For UseRt, the reg operand is tied to the first reg operand.
>     MI.addOperand(MCOperand::CreateReg(
> -                    getRegisterEnum(ARM::tGPRRegClassID,
> +                    getRegisterEnum(B, ARM::tGPRRegClassID,
>                                     UseRt ? getT1tRt(insn) : getT1tRn(insn))));
>     ++OpIdx;
>   }
> @@ -388,7 +388,7 @@
>   // The next available operand is either a reg operand or an imm operand.
>   if (OpInfo[OpIdx].RegClass == ARM::tGPRRegClassID) {
>     // Three register operand instructions.
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
>                                                        getT1tRm(insn))));
>   } else {
>     assert(OpInfo[OpIdx].RegClass == 0 &&
> @@ -409,7 +409,7 @@
> // tMVN, tRSB:        tRd CPSR tRn
> // Others:            tRd CPSR tRd(TIED_TO) tRn
> static bool DisassembleThumb1DP(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO Builder) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   const TargetInstrDesc &TID = ARMInsts[Opcode];
>   const TargetOperandInfo *OpInfo = TID.OpInfo;
> @@ -423,14 +423,14 @@
>          && "Invalid arguments");
> 
>   // Add the destination operand.
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
>                                                      getT1tRd(insn))));
>   ++OpIdx;
> 
>   // Check whether the next operand to be added is a CCR Register.
>   if (OpInfo[OpIdx].RegClass == ARM::CCRRegClassID) {
>     assert(OpInfo[OpIdx].isOptionalDef() && "Optional def operand expected");
> -    MI.addOperand(MCOperand::CreateReg(Builder->InITBlock() ? 0 : ARM::CPSR));
> +    MI.addOperand(MCOperand::CreateReg(B->InITBlock() ? 0 : ARM::CPSR));
>     ++OpIdx;
>   }
> 
> @@ -449,7 +449,7 @@
>   // Process possible next reg operand.
>   if (OpIdx < NumOps && OpInfo[OpIdx].RegClass == ARM::tGPRRegClassID) {
>     // Add tRn operand.
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
>                                                        getT1tRn(insn))));
>     ++OpIdx;
>   }
> @@ -466,7 +466,7 @@
> // tBX_RET_vararg: Rm
> // tBLXr_r9: Rm
> static bool DisassembleThumb1Special(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   // tBX_RET has 0 operand.
>   if (NumOps == 0)
> @@ -474,7 +474,7 @@
> 
>   // BX/BLX has 1 reg operand: Rm.
>   if (NumOps == 1) {
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        getT1Rm(insn))));
>     NumOpsAdded = 1;
>     return true;
> @@ -489,7 +489,7 @@
>   // Add the destination operand.
>   unsigned RegClass = OpInfo[OpIdx].RegClass;
>   MI.addOperand(MCOperand::CreateReg(
> -                  getRegisterEnum(RegClass,
> +                  getRegisterEnum(B, RegClass,
>                                   IsGPR(RegClass) ? getT1Rd(insn)
>                                                   : getT1tRd(insn))));
>   ++OpIdx;
> @@ -509,7 +509,7 @@
>   assert(OpIdx < NumOps && "More operands expected");
>   RegClass = OpInfo[OpIdx].RegClass;
>   MI.addOperand(MCOperand::CreateReg(
> -                  getRegisterEnum(RegClass,
> +                  getRegisterEnum(B, RegClass,
>                                   IsGPR(RegClass) ? getT1Rm(insn)
>                                                   : getT1tRn(insn))));
>   ++OpIdx;
> @@ -521,7 +521,7 @@
> //
> // tLDRpci: tRt imm8*4
> static bool DisassembleThumb1LdPC(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
>   if (!OpInfo) return false;
> @@ -533,7 +533,7 @@
>          && "Invalid arguments");
> 
>   // Add the destination operand.
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
>                                                      getT1tRt(insn))));
> 
>   // And the (imm8 << 2) operand.
> @@ -565,7 +565,7 @@
> // Load/Store Register (reg|imm):      tRd tRn imm5 tRm
> // Load Register Signed Byte|Halfword: tRd tRn tRm
> static bool DisassembleThumb1LdSt(unsigned opA, MCInst &MI, unsigned Opcode,
> -    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded) {
> +    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   const TargetInstrDesc &TID = ARMInsts[Opcode];
>   const TargetOperandInfo *OpInfo = TID.OpInfo;
> @@ -582,9 +582,9 @@
>          && "Expect >= 2 operands and first two as thumb reg operands");
> 
>   // Add the destination reg and the base reg.
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
>                                                      getT1tRd(insn))));
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
>                                                      getT1tRn(insn))));
>   OpIdx = 2;
> 
> @@ -604,9 +604,10 @@
>   // The next reg operand is tRm, the offset.
>   assert(OpIdx < NumOps && OpInfo[OpIdx].RegClass == ARM::tGPRRegClassID
>          && "Thumb reg operand expected");
> -  MI.addOperand(MCOperand::CreateReg(Imm5 ? 0
> -                                          : getRegisterEnum(ARM::tGPRRegClassID,
> -                                                            getT1tRm(insn))));
> +  MI.addOperand(MCOperand::CreateReg(
> +                  Imm5 ? 0
> +                       : getRegisterEnum(B, ARM::tGPRRegClassID,
> +                                         getT1tRm(insn))));
>   ++OpIdx;
> 
>   return true;
> @@ -616,7 +617,7 @@
> //
> // Load/Store Register SP relative: tRt ARM::SP imm8
> static bool DisassembleThumb1LdStSP(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   assert((Opcode == ARM::tLDRspi || Opcode == ARM::tSTRspi)
>          && "Invalid opcode");
> @@ -632,7 +633,7 @@
>           !OpInfo[2].isOptionalDef())
>          && "Invalid arguments");
> 
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
>                                                      getT1tRt(insn))));
>   MI.addOperand(MCOperand::CreateReg(ARM::SP));
>   MI.addOperand(MCOperand::CreateImm(getT1Imm8(insn)));
> @@ -645,7 +646,7 @@
> //
> // tADDrPCi: tRt imm8
> static bool DisassembleThumb1AddPCi(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   assert(Opcode == ARM::tADDrPCi && "Invalid opcode");
> 
> @@ -658,7 +659,7 @@
>           !OpInfo[1].isOptionalDef())
>          && "Invalid arguments");
> 
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
>                                                      getT1tRt(insn))));
>   MI.addOperand(MCOperand::CreateImm(getT1Imm8(insn)));
>   NumOpsAdded = 2;
> @@ -670,7 +671,7 @@
> //
> // tADDrSPi: tRt ARM::SP imm8
> static bool DisassembleThumb1AddSPi(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   assert(Opcode == ARM::tADDrSPi && "Invalid opcode");
> 
> @@ -685,7 +686,7 @@
>           !OpInfo[2].isOptionalDef())
>          && "Invalid arguments");
> 
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
>                                                      getT1tRt(insn))));
>   MI.addOperand(MCOperand::CreateReg(ARM::SP));
>   MI.addOperand(MCOperand::CreateImm(getT1Imm8(insn)));
> @@ -701,7 +702,7 @@
> // "low registers" is specified by Inst{7-0}
> // lr|pc is specified by Inst{8}
> static bool DisassembleThumb1PushPop(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   assert((Opcode == ARM::tPUSH || Opcode == ARM::tPOP) && "Invalid opcode");
> 
> @@ -717,7 +718,7 @@
>     | slice(insn, 7, 0);
>   for (unsigned i = 0; i < 16; ++i) {
>     if ((RegListBits >> i) & 1) {
> -      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                          i)));
>       ++OpIdx;
>     }
> @@ -739,13 +740,13 @@
> //   no operand
> // Others:           tRd tRn
> static bool DisassembleThumb1Misc(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   if (NumOps == 0)
>     return true;
> 
>   if (Opcode == ARM::tPUSH || Opcode == ARM::tPOP)
> -    return DisassembleThumb1PushPop(MI, Opcode, insn, NumOps, NumOpsAdded);
> +    return DisassembleThumb1PushPop(MI, Opcode, insn, NumOps, NumOpsAdded, B);
> 
>   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
> 
> @@ -803,12 +804,12 @@
>          && "Expect >=2 operands");
> 
>   // Add the destination operand.
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
>                                                      getT1tRd(insn))));
> 
>   if (OpInfo[1].RegClass == ARM::tGPRRegClassID) {
>     // Two register instructions.
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
>                                                        getT1tRn(insn))));
>   } else {
>     // CBNZ, CBZ
> @@ -827,7 +828,7 @@
> // tLDM_UPD/tSTM_UPD: tRt tRt AM4ModeImm Pred-Imm Pred-CCR register_list
> // tLDM:              tRt AM4ModeImm Pred-Imm Pred-CCR register_list
> static bool DisassembleThumb1LdStMul(bool Ld, MCInst &MI, unsigned Opcode,
> -    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded) {
> +    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   assert((Opcode == ARM::tLDM || Opcode == ARM::tLDM_UPD ||
>           Opcode == ARM::tSTM_UPD) && "Invalid opcode");
> @@ -841,12 +842,12 @@
> 
>   // WB register, if necessary.
>   if (Opcode == ARM::tLDM_UPD || Opcode == ARM::tSTM_UPD) {
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        tRt)));
>     ++OpIdx;
>   }
> 
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      tRt)));
>   ++OpIdx;
> 
> @@ -862,7 +863,7 @@
>   // Fill the variadic part of reglist.
>   for (unsigned i = 0; i < 8; ++i) {
>     if ((RegListBits >> i) & 1) {
> -      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
> +      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
>                                                          i)));
>       ++OpIdx;
>     }
> @@ -872,13 +873,15 @@
> }
> 
> static bool DisassembleThumb1LdMul(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded) {
> -  return DisassembleThumb1LdStMul(true, MI, Opcode, insn, NumOps, NumOpsAdded);
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> +  return DisassembleThumb1LdStMul(true, MI, Opcode, insn, NumOps, NumOpsAdded,
> +                                  B);
> }
> 
> static bool DisassembleThumb1StMul(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded) {
> -  return DisassembleThumb1LdStMul(false, MI, Opcode, insn, NumOps, NumOpsAdded);
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> +  return DisassembleThumb1LdStMul(false, MI, Opcode, insn, NumOps, NumOpsAdded,
> +                                  B);
> }
> 
> // A8.6.16 B Encoding T1
> @@ -889,7 +892,7 @@
> // tSVC: imm8 Pred-Imm Pred-CCR
> // tTRAP: 0 operand (early return)
> static bool DisassembleThumb1CondBr(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> 
>   if (Opcode == ARM::tTRAP)
>     return true;
> @@ -918,7 +921,7 @@
> //
> // tB: offset
> static bool DisassembleThumb1Br(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
> 
>   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
>   if (!OpInfo) return false;
> @@ -960,9 +963,8 @@
> // 1101xx	Conditional branch, and Supervisor Call on page A6-13
> // 11100x	Unconditional Branch, see B on page A8-44
> //
> -static bool DisassembleThumb1(uint16_t op,
> -    MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded, BO Builder) {
> +static bool DisassembleThumb1(uint16_t op, MCInst &MI, unsigned Opcode,
> +    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   unsigned op1 = slice(op, 5, 4);
>   unsigned op2 = slice(op, 3, 2);
> @@ -971,27 +973,27 @@
>   switch (op1) {
>   case 0:
>     // A6.2.1 Shift (immediate), add, subtract, move, and compare
> -    return DisassembleThumb1General(MI, Opcode, insn, NumOps, NumOpsAdded,
> -                                    Builder);
> +    return DisassembleThumb1General(MI, Opcode, insn, NumOps, NumOpsAdded, B);
>   case 1:
>     switch (op2) {
>     case 0:
>       switch (op3) {
>       case 0:
>         // A6.2.2 Data-processing
> -        return DisassembleThumb1DP(MI, Opcode, insn, NumOps, NumOpsAdded,
> -                                   Builder);
> +        return DisassembleThumb1DP(MI, Opcode, insn, NumOps, NumOpsAdded, B);
>       case 1:
>         // A6.2.3 Special data instructions and branch and exchange
> -        return DisassembleThumb1Special(MI, Opcode, insn, NumOps, NumOpsAdded);
> +        return DisassembleThumb1Special(MI, Opcode, insn, NumOps, NumOpsAdded,
> +                                        B);
>       default:
>         // A8.6.59 LDR (literal)
> -        return DisassembleThumb1LdPC(MI, Opcode, insn, NumOps, NumOpsAdded);
> +        return DisassembleThumb1LdPC(MI, Opcode, insn, NumOps, NumOpsAdded, B);
>       }
>       break;
>     default:
>       // A6.2.4 Load/store single data item
> -      return DisassembleThumb1LdSt(opA, MI, Opcode, insn, NumOps, NumOpsAdded);
> +      return DisassembleThumb1LdSt(opA, MI, Opcode, insn, NumOps, NumOpsAdded,
> +                                   B);
>       break;
>     }
>     break;
> @@ -999,21 +1001,24 @@
>     switch (op2) {
>     case 0:
>       // A6.2.4 Load/store single data item
> -      return DisassembleThumb1LdSt(opA, MI, Opcode, insn, NumOps, NumOpsAdded);
> +      return DisassembleThumb1LdSt(opA, MI, Opcode, insn, NumOps, NumOpsAdded,
> +                                   B);
>     case 1:
>       // A6.2.4 Load/store single data item
> -      return DisassembleThumb1LdStSP(MI, Opcode, insn, NumOps, NumOpsAdded);
> +      return DisassembleThumb1LdStSP(MI, Opcode, insn, NumOps, NumOpsAdded, B);
>     case 2:
>       if (op3 <= 1) {
>         // A8.6.10 ADR
> -        return DisassembleThumb1AddPCi(MI, Opcode, insn, NumOps, NumOpsAdded);
> +        return DisassembleThumb1AddPCi(MI, Opcode, insn, NumOps, NumOpsAdded,
> +                                       B);
>       } else {
>         // A8.6.8 ADD (SP plus immediate)
> -        return DisassembleThumb1AddSPi(MI, Opcode, insn, NumOps, NumOpsAdded);
> +        return DisassembleThumb1AddSPi(MI, Opcode, insn, NumOps, NumOpsAdded,
> +                                       B);
>       }
>     default:
>       // A6.2.5 Miscellaneous 16-bit instructions
> -      return DisassembleThumb1Misc(MI, Opcode, insn, NumOps, NumOpsAdded);
> +      return DisassembleThumb1Misc(MI, Opcode, insn, NumOps, NumOpsAdded, B);
>     }
>     break;
>   case 3:
> @@ -1021,17 +1026,17 @@
>     case 0:
>       if (op3 <= 1) {
>         // A8.6.189 STM / STMIA / STMEA
> -        return DisassembleThumb1StMul(MI, Opcode, insn, NumOps, NumOpsAdded);
> +        return DisassembleThumb1StMul(MI, Opcode, insn, NumOps, NumOpsAdded, B);
>       } else {
>         // A8.6.53 LDM / LDMIA / LDMFD
> -        return DisassembleThumb1LdMul(MI, Opcode, insn, NumOps, NumOpsAdded);
> +        return DisassembleThumb1LdMul(MI, Opcode, insn, NumOps, NumOpsAdded, B);
>       }
>     case 1:
>       // A6.2.6 Conditional branch, and Supervisor Call
> -      return DisassembleThumb1CondBr(MI, Opcode, insn, NumOps, NumOpsAdded);
> +      return DisassembleThumb1CondBr(MI, Opcode, insn, NumOps, NumOpsAdded, B);
>     case 2:
>       // Unconditional Branch, see B on page A8-44
> -      return DisassembleThumb1Br(MI, Opcode, insn, NumOps, NumOpsAdded);
> +      return DisassembleThumb1Br(MI, Opcode, insn, NumOps, NumOpsAdded, B);
>     default:
>       assert(0 && "Unreachable code");
>       break;
> @@ -1087,21 +1092,21 @@
> 
> // t2RFE[IA|DB]W/t2RFE[IA|DB]: Rn
> static bool DisassembleThumb2RFE(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded) {
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRn(insn))));
>   NumOpsAdded = 1;
>   return true;
> }
> 
> static bool DisassembleThumb2LdStMul(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   if (Thumb2SRSOpcode(Opcode))
>     return DisassembleThumb2SRS(MI, Opcode, insn, NumOps, NumOpsAdded);
> 
>   if (Thumb2RFEOpcode(Opcode))
> -    return DisassembleThumb2RFE(MI, Opcode, insn, NumOps, NumOpsAdded);
> +    return DisassembleThumb2RFE(MI, Opcode, insn, NumOps, NumOpsAdded, B);
> 
>   assert((Opcode == ARM::t2LDM || Opcode == ARM::t2LDM_UPD ||
>           Opcode == ARM::t2STM || Opcode == ARM::t2STM_UPD)
> @@ -1112,7 +1117,7 @@
> 
>   OpIdx = 0;
> 
> -  unsigned Base = getRegisterEnum(ARM::GPRRegClassID, decodeRn(insn));
> +  unsigned Base = getRegisterEnum(B, ARM::GPRRegClassID, decodeRn(insn));
> 
>   // Writeback to base.
>   if (Opcode == ARM::t2LDM_UPD || Opcode == ARM::t2STM_UPD) {
> @@ -1136,7 +1141,7 @@
>   unsigned RegListBits = insn & ((1 << 16) - 1);
>   for (unsigned i = 0; i < 16; ++i) {
>     if ((RegListBits >> i) & 1) {
> -      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                          i)));
>       ++OpIdx;
>     }
> @@ -1152,7 +1157,7 @@
> // t2STREXD: Rm Rd Rs Rn
> // t2STREXB, t2STREXH: Rm Rd Rn
> static bool DisassembleThumb2LdStEx(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
>   if (!OpInfo) return false;
> @@ -1173,25 +1178,25 @@
>   // Add the destination operand for store.
>   if (isStore) {
>     MI.addOperand(MCOperand::CreateReg(
> -                    getRegisterEnum(ARM::GPRRegClassID,
> +                    getRegisterEnum(B, ARM::GPRRegClassID,
>                                     isSW ? decodeRs(insn) : decodeRm(insn))));
>     ++OpIdx;
>   }
> 
>   // Source operand for store and destination operand for load.
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRd(insn))));
>   ++OpIdx;
> 
>   // Thumb2 doubleword complication: with an extra source/destination operand.
>   if (isDW) {
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRs(insn))));
>     ++OpIdx;
>   }
> 
>   // Finally add the pointer operand.
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRn(insn))));
>   ++OpIdx;
> 
> @@ -1208,7 +1213,7 @@
> // Ditto for t2LDRD_PRE, t2LDRD_POST, t2STRD_PRE, t2STRD_POST, which are for
> // disassembly only and do not have a tied_to writeback base register operand.
> static bool DisassembleThumb2LdStDual(MCInst &MI, unsigned Opcode,
> -    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded) {
> +    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
>   if (!OpInfo) return false;
> @@ -1221,11 +1226,11 @@
>          && "Expect >= 4 operands and first 3 as reg operands");
> 
>   // Add the <Rt> <Rt2> operands.
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRd(insn))));
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRs(insn))));
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRn(insn))));
> 
>   // Finally add (+/-)imm8*4, depending on the U bit.
> @@ -1246,15 +1251,15 @@
> //
> // t2TBBgen, t2TBHgen: Rn Rm Pred-Imm Pred-CCR
> static bool DisassembleThumb2TB(MCInst &MI, unsigned Opcode,
> -    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded) {
> +    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   assert(NumOps >= 2 && "Expect >= 2 operands");
> 
>   // The generic version of TBB/TBH needs a base register.
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRn(insn))));
>   // Add the index register.
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRm(insn))));
>   NumOpsAdded = 2;
> 
> @@ -1289,7 +1294,7 @@
> // nothing else, because the shift amount is already specified.
> // Similar case holds for t2MOVrx, t2ADDrr, ..., etc.
> static bool DisassembleThumb2DPSoReg(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   const TargetInstrDesc &TID = ARMInsts[Opcode];
>   const TargetOperandInfo *OpInfo = TID.OpInfo;
> @@ -1304,7 +1309,7 @@
>            && OpInfo[3].RegClass == 0
>            && "Exactlt 4 operands expect and first two as reg operands");
>     // Only need to populate the src reg operand.
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRm(insn))));
>     MI.addOperand(MCOperand::CreateReg(0));
>     MI.addOperand(MCOperand::CreateImm(0));
> @@ -1326,7 +1331,7 @@
>   // Build the register operands, followed by the constant shift specifier.
> 
>   MI.addOperand(MCOperand::CreateReg(
> -                  getRegisterEnum(ARM::GPRRegClassID,
> +                  getRegisterEnum(B, ARM::GPRRegClassID,
>                                   NoDstReg ? decodeRn(insn) : decodeRs(insn))));
>   ++OpIdx;
> 
> @@ -1337,13 +1342,13 @@
>       MI.addOperand(MI.getOperand(Idx));
>     } else {
>       assert(!NoDstReg && "Internal error");
> -      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                          decodeRn(insn))));
>     }
>     ++OpIdx;
>   }
> 
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRm(insn))));
>   ++OpIdx;
> 
> @@ -1384,7 +1389,7 @@
> //
> // ModImm = ThumbExpandImm(i:imm3:imm8)
> static bool DisassembleThumb2DPModImm(MCInst &MI, unsigned Opcode,
> -    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded) {
> +    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
>   unsigned &OpIdx = NumOpsAdded;
> @@ -1400,13 +1405,13 @@
>   // Build the register operands, followed by the modified immediate.
> 
>   MI.addOperand(MCOperand::CreateReg(
> -                  getRegisterEnum(ARM::GPRRegClassID,
> +                  getRegisterEnum(B, ARM::GPRRegClassID,
>                                   NoDstReg ? decodeRn(insn) : decodeRs(insn))));
>   ++OpIdx;
> 
>   if (TwoReg) {
>     assert(!NoDstReg && "Internal error");
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRn(insn))));
>     ++OpIdx;
>   }
> @@ -1470,7 +1475,7 @@
> // o t2SSAT[lsl|asr], t2USAT[lsl|asr]: Rs sat_pos Rn shamt
> // o t2SSAT16, t2USAT16: Rs sat_pos Rn
> static bool DisassembleThumb2DPBinImm(MCInst &MI, unsigned Opcode,
> -    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded) {
> +    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   const TargetInstrDesc &TID = ARMInsts[Opcode];
>   const TargetOperandInfo *OpInfo = TID.OpInfo;
> @@ -1485,7 +1490,7 @@
> 
>   // Build the register operand(s), followed by the immediate(s).
> 
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRs(insn))));
>   ++OpIdx;
> 
> @@ -1493,7 +1498,7 @@
>   if (Thumb2SaturateOpcode(Opcode)) {
>     MI.addOperand(MCOperand::CreateImm(decodeThumb2SaturatePos(Opcode, insn)));
> 
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRn(insn))));
> 
>     if (Opcode == ARM::t2SSAT16 || Opcode == ARM::t2USAT16) {
> @@ -1521,7 +1526,7 @@
>       MI.addOperand(MI.getOperand(Idx));
>     } else {
>       // Add src reg operand.
> -      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                          decodeRn(insn))));
>     }
>     ++OpIdx;
> @@ -1596,7 +1601,7 @@
> // t2MSR/t2MSRsys -> Rn mask=Inst{11-8}
> // t2SMC -> imm4 = Inst{19-16}
> static bool DisassembleThumb2BrMiscCtrl(MCInst &MI, unsigned Opcode,
> -    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded) {
> +    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   if (NumOps == 0)
>     return true;
> @@ -1638,21 +1643,21 @@
> 
>   // MRS and MRSsys take one GPR reg Rs.
>   if (Opcode == ARM::t2MRS || Opcode == ARM::t2MRSsys) {
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRs(insn))));
>     NumOpsAdded = 1;
>     return true;
>   }
>   // BXJ takes one GPR reg Rn.
>   if (Opcode == ARM::t2BXJ) {
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRn(insn))));
>     NumOpsAdded = 1;
>     return true;
>   }
>   // MSR and MSRsys take one GPR reg Rn, followed by the mask.
>   if (Opcode == ARM::t2MSR || Opcode == ARM::t2MSRsys || Opcode == ARM::t2BXJ) {
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRn(insn))));
>     MI.addOperand(MCOperand::CreateImm(slice(insn, 11, 8)));
>     NumOpsAdded = 2;
> @@ -1711,7 +1716,7 @@
> }
> 
> static bool DisassembleThumb2PreLoad(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   // Preload Data/Instruction requires either 2 or 3 operands.
>   // t2PLDi12, t2PLDi8, t2PLDpci: Rn [+/-]imm12/imm8
> @@ -1729,12 +1734,12 @@
>          OpInfo[0].RegClass == ARM::GPRRegClassID &&
>          "Expect >= 2 operands and first one as reg operand");
> 
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRn(insn))));
>   ++OpIdx;
> 
>   if (OpInfo[OpIdx].RegClass == ARM::GPRRegClassID) {
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRm(insn))));
>   } else {
>     assert(OpInfo[OpIdx].RegClass == 0 && !OpInfo[OpIdx].isPredicate()
> @@ -1776,7 +1781,7 @@
> // These instrs calculate an address from the PC value and an immediate offset.
> // Rd Rn=PC (+/-)imm12 (+ if Inst{23} == 0b1)
> static bool DisassembleThumb2Ldpci(MCInst &MI, unsigned Opcode,
> -    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded) {
> +    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
>   if (!OpInfo) return false;
> @@ -1788,7 +1793,7 @@
> 
>   // Build the register operand, followed by the (+/-)imm12 immediate.
> 
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRd(insn))));
> 
>   MI.addOperand(MCOperand::CreateImm(decodeImm12(insn)));
> @@ -1824,16 +1829,16 @@
> // Delegates to DisassembleThumb2PreLoad() for preload data/instruction.
> // Delegates to DisassembleThumb2Ldpci() for load * literal operations.
> static bool DisassembleThumb2LdSt(bool Load, MCInst &MI, unsigned Opcode,
> -    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded) {
> +    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   unsigned Rn = decodeRn(insn);
> 
>   if (Thumb2PreloadOpcode(Opcode))
> -    return DisassembleThumb2PreLoad(MI, Opcode, insn, NumOps, NumOpsAdded);
> +    return DisassembleThumb2PreLoad(MI, Opcode, insn, NumOps, NumOpsAdded, B);
> 
>   // See, for example, A6.3.7 Load word: Table A6-18 Load word.
>   if (Load && Rn == 15)
> -    return DisassembleThumb2Ldpci(MI, Opcode, insn, NumOps, NumOpsAdded);
> +    return DisassembleThumb2Ldpci(MI, Opcode, insn, NumOps, NumOpsAdded, B);
> 
>   const TargetInstrDesc &TID = ARMInsts[Opcode];
>   const TargetOperandInfo *OpInfo = TID.OpInfo;
> @@ -1882,13 +1887,16 @@
>       Imm = decodeImm8(insn);
>   }
> 
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID, R0)));
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
> +                                                     R0)));
>   ++OpIdx;
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID, R1)));
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
> +                                                     R1)));
>   ++OpIdx;
> 
>   if (ThreeReg) {
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,R2)));
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
> +                                                       R2)));
>     ++OpIdx;
>   }
> 
> @@ -1912,7 +1920,7 @@
> //
> // Miscellaneous operations: Rs [Rn] Rm
> static bool DisassembleThumb2DPReg(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   const TargetInstrDesc &TID = ARMInsts[Opcode];
>   const TargetOperandInfo *OpInfo = TID.OpInfo;
> @@ -1929,17 +1937,17 @@
> 
>   bool ThreeReg = NumOps > 2 && OpInfo[2].RegClass == ARM::GPRRegClassID;
> 
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRs(insn))));
>   ++OpIdx;
> 
>   if (ThreeReg) {
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRn(insn))));
>     ++OpIdx;
>   }
> 
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRm(insn))));
>   ++OpIdx;
> 
> @@ -1966,7 +1974,7 @@
> // Unsigned Sum of Absolute Differences [and Accumulate]
> //    Rs Rn Rm [Ra=Inst{15-12}]
> static bool DisassembleThumb2Mul(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
> 
> @@ -1980,17 +1988,17 @@
> 
>   bool FourReg = NumOps > 3 && OpInfo[3].RegClass == ARM::GPRRegClassID;
> 
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRs(insn))));
> 
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRn(insn))));
> 
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRm(insn))));
> 
>   if (FourReg)
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRd(insn))));
> 
>   NumOpsAdded = FourReg ? 4 : 3;
> @@ -2011,7 +2019,7 @@
> //
> // Signed/Unsigned divide: t2SDIV, t2UDIV: Rs Rn Rm
> static bool DisassembleThumb2LongMul(MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded) {
> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
> 
>   const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
> 
> @@ -2026,16 +2034,16 @@
>   // Build the register operands.
> 
>   if (FourReg)
> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                        decodeRd(insn))));
> 
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRs(insn))));
> 
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRn(insn))));
> 
> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>                                                      decodeRm(insn))));
> 
>   if (FourReg)
> @@ -2071,15 +2079,16 @@
> // 		1xxxxxx	-	Coprocessor instructions on page A6-40
> //
> static bool DisassembleThumb2(uint16_t op1, uint16_t op2, uint16_t op,
> -    MCInst &MI, unsigned Opcode, uint32_t insn,
> -    unsigned short NumOps, unsigned &NumOpsAdded) {
> +    MCInst &MI, unsigned Opcode, uint32_t insn, unsigned short NumOps,
> +    unsigned &NumOpsAdded, BO B) {
> 
>   switch (op1) {
>   case 1:
>     if (slice(op2, 6, 5) == 0) {
>       if (slice(op2, 2, 2) == 0) {
>         // Load/store multiple.
> -        return DisassembleThumb2LdStMul(MI, Opcode, insn, NumOps, NumOpsAdded);
> +        return DisassembleThumb2LdStMul(MI, Opcode, insn, NumOps, NumOpsAdded,
> +                                        B);
>       }
> 
>       // Load/store dual, load/store exclusive, table branch, otherwise.
> @@ -2087,22 +2096,24 @@
>       if ((ARM::t2LDREX <= Opcode && Opcode <= ARM::t2LDREXH) ||
>           (ARM::t2STREX <= Opcode && Opcode <= ARM::t2STREXH)) {
>         // Load/store exclusive.
> -        return DisassembleThumb2LdStEx(MI, Opcode, insn, NumOps, NumOpsAdded);
> +        return DisassembleThumb2LdStEx(MI, Opcode, insn, NumOps, NumOpsAdded,
> +                                       B);
>       }
>       if (Opcode == ARM::t2LDRDi8 ||
>           Opcode == ARM::t2LDRD_PRE || Opcode == ARM::t2LDRD_POST ||
>           Opcode == ARM::t2STRDi8 ||
>           Opcode == ARM::t2STRD_PRE || Opcode == ARM::t2STRD_POST) {
>         // Load/store dual.
> -        return DisassembleThumb2LdStDual(MI, Opcode, insn, NumOps, NumOpsAdded);
> +        return DisassembleThumb2LdStDual(MI, Opcode, insn, NumOps, NumOpsAdded,
> +                                         B);
>       }
>       if (Opcode == ARM::t2TBBgen || Opcode == ARM::t2TBHgen) {
>         // Table branch.
> -        return DisassembleThumb2TB(MI, Opcode, insn, NumOps, NumOpsAdded);
> +        return DisassembleThumb2TB(MI, Opcode, insn, NumOps, NumOpsAdded, B);
>       }
>     } else if (slice(op2, 6, 5) == 1) {
>       // Data-processing (shifted register).
> -      return DisassembleThumb2DPSoReg(MI, Opcode, insn, NumOps, NumOpsAdded);
> +      return DisassembleThumb2DPSoReg(MI, Opcode, insn, NumOps, NumOpsAdded, B);
>     }
> 
>     // FIXME: A6.3.18 Coprocessor instructions
> @@ -2113,14 +2124,17 @@
>     if (op == 0) {
>       if (slice(op2, 5, 5) == 0) {
>         // Data-processing (modified immediate)
> -        return DisassembleThumb2DPModImm(MI, Opcode, insn, NumOps, NumOpsAdded);
> +        return DisassembleThumb2DPModImm(MI, Opcode, insn, NumOps, NumOpsAdded,
> +                                         B);
>       } else {
>         // Data-processing (plain binary immediate)
> -        return DisassembleThumb2DPBinImm(MI, Opcode, insn, NumOps, NumOpsAdded);
> +        return DisassembleThumb2DPBinImm(MI, Opcode, insn, NumOps, NumOpsAdded,
> +                                         B);
>       }
>     } else {
>       // Branches and miscellaneous control on page A6-20.
> -      return DisassembleThumb2BrMiscCtrl(MI, Opcode, insn, NumOps, NumOpsAdded);
> +      return DisassembleThumb2BrMiscCtrl(MI, Opcode, insn, NumOps, NumOpsAdded,
> +                                         B);
>     }
> 
>     break;
> @@ -2131,7 +2145,8 @@
>       if (slice(op2, 0, 0) == 0) {
>         if (slice(op2, 4, 4) == 0) {
>           // Store single data item on page A6-30
> -          return DisassembleThumb2LdSt(false, MI,Opcode,insn,NumOps,NumOpsAdded);
> +          return DisassembleThumb2LdSt(false, MI,Opcode,insn,NumOps,NumOpsAdded,
> +                                       B);
>         } else {
>           // FIXME: Advanced SIMD element or structure load/store instructions.
>           // But see ThumbDisassembler::getInstruction().
> @@ -2139,19 +2154,20 @@
>         }
>       } else {
>         // Table A6-9 32-bit Thumb instruction encoding: Load byte|halfword|word
> -        return DisassembleThumb2LdSt(true, MI,Opcode,insn,NumOps,NumOpsAdded);
> +        return DisassembleThumb2LdSt(true, MI,Opcode,insn,NumOps,NumOpsAdded, B);
>       }
>       break;
>     case 1:
>       if (slice(op2, 4, 4) == 0) {
>         // A6.3.12 Data-processing (register)
> -        return DisassembleThumb2DPReg(MI, Opcode, insn, NumOps, NumOpsAdded);
> +        return DisassembleThumb2DPReg(MI, Opcode, insn, NumOps, NumOpsAdded, B);
>       } else if (slice(op2, 3, 3) == 0) {
>         // A6.3.16 Multiply, multiply accumulate, and absolute difference
> -        return DisassembleThumb2Mul(MI, Opcode, insn, NumOps, NumOpsAdded);
> +        return DisassembleThumb2Mul(MI, Opcode, insn, NumOps, NumOpsAdded, B);
>       } else {
>         // A6.3.17 Long multiply, long multiply accumulate, and divide
> -        return DisassembleThumb2LongMul(MI, Opcode, insn, NumOps, NumOpsAdded);
> +        return DisassembleThumb2LongMul(MI, Opcode, insn, NumOps, NumOpsAdded,
> +                                        B);
>       }
>       break;
>     default:
> @@ -2197,5 +2213,6 @@
>   uint16_t op2 = slice(HalfWord, 10, 4);
>   uint16_t op = slice(insn, 15, 15);
> 
> -  return DisassembleThumb2(op1, op2, op, MI, Opcode, insn, NumOps, NumOpsAdded);
> +  return DisassembleThumb2(op1, op2, op, MI, Opcode, insn, NumOps, NumOpsAdded,
> +                           Builder);
> }
> 
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits




From clattner at apple.com  Wed Apr 14 18:15:38 2010
From: clattner at apple.com (Chris Lattner)
Date: Wed, 14 Apr 2010 16:15:38 -0700
Subject: [llvm-commits] [llvm] r101294 -
	/llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp
In-Reply-To: <20100414220638.1A3EB2A6C12C@llvm.org>
References: <20100414220638.1A3EB2A6C12C@llvm.org>
Message-ID: <0AF59178-B7FD-4E56-B82A-562ADA11F1DB@apple.com>


On Apr 14, 2010, at 3:06 PM, Nicolas Geoffray wrote:

> Author: geoffray
> Date: Wed Apr 14 17:06:37 2010
> New Revision: 101294
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=101294&view=rev
> Log:
> Don't use DILocation when processing a DebugLoc.

Nice, thanks!


From clattner at apple.com  Wed Apr 14 18:16:49 2010
From: clattner at apple.com (Chris Lattner)
Date: Wed, 14 Apr 2010 16:16:49 -0700
Subject: [llvm-commits] [llvm] r101306 -
	/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
In-Reply-To: <20100414223717.D182B2A6C12C@llvm.org>
References: <20100414223717.D182B2A6C12C@llvm.org>
Message-ID: <22A06822-E414-43D0-A738-978A9B2C6F2C@apple.com>


On Apr 14, 2010, at 3:37 PM, Johnny Chen wrote:

> Author: johnny
> Date: Wed Apr 14 17:37:17 2010
> New Revision: 101306
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=101306&view=rev
> Log:
> Fixed another assert exposed by fuzzing.  Now, the DisassembleVFPLdStMulFrm()
> function checks whether we have a valid submode for VLDM/VSTM (must be either
> "ia" or "db") before calling ARM_AM::getAM5Opc(AMSubMode, unsigned char).

Same comment, this should not print an error message.

-Chris

> 
> Modified:
>    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
> 
> Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp?rev=101306&r1=101305&r2=101306&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp Wed Apr 14 17:37:17 2010
> @@ -1909,6 +1909,12 @@
> 
>   // Next comes the AM5 Opcode.
>   ARM_AM::AMSubMode SubMode = getAMSubModeForBits(getPUBits(insn));
> +  // Must be either "ia" or "db" submode.
> +  if (SubMode != ARM_AM::ia && SubMode != ARM_AM::db) {
> +    errs() << "Illegal addressing mode 5 sub-mode!\n";
> +    return false;
> +  }
> +
>   unsigned char Imm8 = insn & 0xFF;
>   MI.addOperand(MCOperand::CreateImm(ARM_AM::getAM5Opc(SubMode, Imm8)));
> 
> 
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits




From clattner at apple.com  Wed Apr 14 18:17:26 2010
From: clattner at apple.com (Chris Lattner)
Date: Wed, 14 Apr 2010 16:17:26 -0700
Subject: [llvm-commits] [PATCH] Missing libraries in cmake build?
In-Reply-To: <4BC5C835.2010604@fim.uni-passau.de>
References: <4BC368E2.3040400@fim.uni-passau.de>
	<11256_1271105138_4BC38671_11256_2193_1_CE253174-14BA-407B-AB39-17947E61D557@apple.com>
	<4BC5C835.2010604@fim.uni-passau.de>
Message-ID: <F01EF288-8841-4A99-9247-A1B7D9A11795@apple.com>


On Apr 14, 2010, at 6:50 AM, Tobias Grosser wrote:

> 
> The issues can be solved by adding this to CMAKE:
> 
> target_link_libraries (LLVMipo LLVMScalarOpts LLVMInstCombine)
> 
> So scalaropts will not depend on instcombine, however IPO will. This sounds OK to me.
> 
> I attached a patch. OK to commit?

Sure, go for it, thanks.

-Chris


From grosser at fim.uni-passau.de  Wed Apr 14 18:42:23 2010
From: grosser at fim.uni-passau.de (Tobias Grosser)
Date: Wed, 14 Apr 2010 23:42:23 -0000
Subject: [llvm-commits] [llvm] r101313 -
	/llvm/trunk/lib/Transforms/IPO/CMakeLists.txt
Message-ID: <20100414234223.44D062A6C12C@llvm.org>

Author: grosser
Date: Wed Apr 14 18:42:23 2010
New Revision: 101313

URL: http://llvm.org/viewvc/llvm-project?rev=101313&view=rev
Log:
IPO needs ScalarOpts and InstCombine in its libs

The commit "Adding IPSCCP and Internalize passes to the C-bindings" introduced
new dependencies for IPO. Add these to the CMAKE build as otherwise the
BUILD_SHARED_LIBS=1 build fails.

Modified:
    llvm/trunk/lib/Transforms/IPO/CMakeLists.txt

Modified: llvm/trunk/lib/Transforms/IPO/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/CMakeLists.txt?rev=101313&r1=101312&r2=101313&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/CMakeLists.txt (original)
+++ llvm/trunk/lib/Transforms/IPO/CMakeLists.txt Wed Apr 14 18:42:23 2010
@@ -23,3 +23,5 @@
   StripSymbols.cpp
   StructRetPromotion.cpp
   )
+
+target_link_libraries (LLVMipo LLVMScalarOpts LLVMInstCombine)




From johnny.chen at apple.com  Wed Apr 14 18:51:07 2010
From: johnny.chen at apple.com (Johnny Chen)
Date: Wed, 14 Apr 2010 16:51:07 -0700
Subject: [llvm-commits] [llvm] r101290 - in
	/llvm/trunk/lib/Target/ARM/Disassembler: ARMDisassembler.cpp
	ARMDisassemblerCore.cpp ARMDisassemblerCore.h
	ThumbDisassemblerCore.h
In-Reply-To: <2CEC50F4-471E-4B8A-9422-996AF5BC67C7@apple.com>
References: <20100414210314.338412A6C12C@llvm.org>
	<2CEC50F4-471E-4B8A-9422-996AF5BC67C7@apple.com>
Message-ID: <A94FA0F5-8CD3-464C-9245-D31F50D020BC@apple.com>

I'll modify so that the error msgs only get put out for DEBUG build.
Thanks.

On Apr 14, 2010, at 4:15 PM, Chris Lattner wrote:

> 
> On Apr 14, 2010, at 2:03 PM, Johnny Chen wrote:
> 
>> Author: johnny
>> Date: Wed Apr 14 16:03:13 2010
>> New Revision: 101290
>> 
>> URL: http://llvm.org/viewvc/llvm-project?rev=101290&view=rev
>> Log:
>> Fixed another assert exposed by fuzzing.  The utility function getRegisterEnum()
>> was asserting because the (RegClass, RegNum) combination doesn't make sense from
>> an encoding point of view.
>> 
>> Since getRegisterEnum() is used all over the place, to change the code to check
>> for encoding error after each call would not only bloat the code, but also make
>> it less readable.  An Err flag is added to the ARMBasicMCBuilder where a client
>> can set a non-zero value to indicate some kind of error condition while building
>> up the MCInst.  ARMBasicMCBuilder::BuildIt() checks this flag and returns false
>> if a non-zero value is detected.
> 
> Hi Johnny,
> 
>> +  errs() << "Invalid (RegClassID, RawRegister) combination\n";
> 
> The disassembler should not report errors to cerr() / errs().  Sean recently added an API for this on the X86 disassembler side, can this use the same approach?  This error message wouldn't make sense to a user of this library.
> 
> -Chris
> 
>> 
>> Modified:
>>   llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
>>   llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
>>   llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h
>>   llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h
>> 
>> Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp?rev=101290&r1=101289&r2=101290&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp (original)
>> +++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp Wed Apr 14 16:03:13 2010
>> @@ -495,7 +495,7 @@
>>    });
>> 
>>  ARMBasicMCBuilder *Builder = CreateMCBuilder(Opcode, Format);
>> -  Builder->setSession(const_cast<Session *>(&SO));
>> +  Builder->SetSession(const_cast<Session *>(&SO));
>> 
>>  if (!Builder)
>>    return false;
>> 
>> Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp?rev=101290&r1=101289&r2=101290&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp (original)
>> +++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp Wed Apr 14 16:03:13 2010
>> @@ -76,7 +76,7 @@
>> // Return the register enum Based on RegClass and the raw register number.
>> // For DRegPair, see comments below.
>> // FIXME: Auto-gened?
>> -static unsigned getRegisterEnum(unsigned RegClassID, unsigned RawRegister,
>> +static unsigned getRegisterEnum(BO B, unsigned RegClassID, unsigned RawRegister,
>>                                bool DRegPair = false) {
>> 
>>  if (DRegPair && RegClassID == ARM::QPRRegClassID) {
>> @@ -346,7 +346,9 @@
>>    }
>>    break;
>>  }
>> -  assert(0 && "Invalid (RegClassID, RawRegister) combination");
>> +  errs() << "Invalid (RegClassID, RawRegister) combination\n";
>> +  // Encoding error.  Mark the builder with error code != 0.
>> +  B->SetErr(-1);
>>  return 0;
>> }
>> 
>> @@ -510,7 +512,7 @@
>> // Inst{3-0} => Rm
>> // Inst{11-8} => Rs
>> static bool DisassembleMulFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  const TargetInstrDesc &TID = ARMInsts[Opcode];
>>  unsigned short NumDefs = TID.getNumDefs();
>> @@ -530,26 +532,26 @@
>>  if (NumDefs == 2) {
>>    assert(NumOps >= 4 && OpInfo[3].RegClass == ARM::GPRRegClassID &&
>>           "Expect 4th register operand");
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRd(insn))));
>>    ++OpIdx;
>>  }
>> 
>>  // The destination register: RdHi{19-16} or Rd{19-16}.
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRn(insn))));
>> 
>>  // The two src regsiters: Rn{3-0}, then Rm{11-8}.
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRm(insn))));
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRs(insn))));
>>  OpIdx += 3;
>> 
>>  // Many multiply instructions (e.g., MLA) have three src registers.
>>  // The third register operand is Ra{15-12}.
>>  if (OpIdx < NumOps && OpInfo[OpIdx].RegClass == ARM::GPRRegClassID) {
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRd(insn))));
>>    ++OpIdx;
>>  }
>> @@ -611,7 +613,7 @@
>> // and friends
>> //
>> static bool DisassembleCoprocessor(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  assert(NumOps >= 5 && "Num of operands >= 5 for coprocessor instr");
>> 
>> @@ -632,7 +634,7 @@
>> 
>>    MI.addOperand(MCOperand::CreateImm(decodeRd(insn)));
>> 
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRn(insn))));
>> 
>>    if (PW) {
>> @@ -652,11 +654,11 @@
>> 
>>    MI.addOperand(NoGPR ? MCOperand::CreateImm(decodeRd(insn))
>>                        : MCOperand::CreateReg(
>> -                            getRegisterEnum(ARM::GPRRegClassID,
>> +                            getRegisterEnum(B, ARM::GPRRegClassID,
>>                                            decodeRd(insn))));
>> 
>>    MI.addOperand(OneCopOpc ? MCOperand::CreateReg(
>> -                                getRegisterEnum(ARM::GPRRegClassID,
>> +                                getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                decodeRn(insn)))
>>                            : MCOperand::CreateImm(decodeRn(insn)));
>> 
>> @@ -689,10 +691,10 @@
>> // SRSW/SRS: addrmode4:$addr mode_imm
>> // RFEW/RFE: addrmode4:$addr Rn
>> static bool DisassembleBrFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  if (CoprocessorOpcode(Opcode))
>> -    return DisassembleCoprocessor(MI, Opcode, insn, NumOps, NumOpsAdded);
>> +    return DisassembleCoprocessor(MI, Opcode, insn, NumOps, NumOpsAdded, B);
>> 
>>  const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
>>  if (!OpInfo) return false;
>> @@ -701,7 +703,7 @@
>>  if (Opcode == ARM::MRS || Opcode == ARM::MRSsys) {
>>    assert(NumOps >= 1 && OpInfo[0].RegClass == ARM::GPRRegClassID &&
>>           "Reg operand expected");
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRd(insn))));
>>    NumOpsAdded = 1;
>>    return true;
>> @@ -710,7 +712,7 @@
>>  if (Opcode == ARM::BXJ) {
>>    assert(NumOps >= 1 && OpInfo[0].RegClass == ARM::GPRRegClassID &&
>>           "Reg operand expected");
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRm(insn))));
>>    NumOpsAdded = 1;
>>    return true;
>> @@ -719,7 +721,7 @@
>>  if (Opcode == ARM::MSR || Opcode == ARM::MSRsys) {
>>    assert(NumOps >= 1 && OpInfo[0].RegClass == ARM::GPRRegClassID &&
>>           "Reg operand expected");
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRm(insn))));
>>    MI.addOperand(MCOperand::CreateImm(slice(insn, 19, 16)));
>>    NumOpsAdded = 2;
>> @@ -750,7 +752,7 @@
>>    if (Opcode == ARM::SRSW || Opcode == ARM::SRS)
>>      MI.addOperand(MCOperand::CreateImm(slice(insn, 4, 0)));
>>    else
>> -      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                         decodeRn(insn))));
>>    NumOpsAdded = 3;
>>    return true;
>> @@ -793,7 +795,7 @@
>> // BLXr9, BXr9
>> // BRIND, BX_RET
>> static bool DisassembleBrMiscFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
>>  if (!OpInfo) return false;
>> @@ -810,7 +812,7 @@
>>  if (Opcode == ARM::BLXr9 || Opcode == ARM::BRIND) {
>>    assert(NumOps >= 1 && OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
>>           "Reg operand expected");
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRm(insn))));
>>    OpIdx = 1;
>>    return true;
>> @@ -821,9 +823,9 @@
>>    // InOperandList with GPR:$target and GPR:$idx regs.
>> 
>>    assert(NumOps == 4 && "Expect 4 operands");
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRn(insn))));
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRm(insn))));
>> 
>>    // Fill in the two remaining imm operands to signify build completion.
>> @@ -839,7 +841,7 @@
>>    // InOperandList with GPR::$target reg.
>> 
>>    assert(NumOps == 3 && "Expect 3 operands");
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRm(insn))));
>> 
>>    // Fill in the two remaining imm operands to signify build completion.
>> @@ -856,13 +858,13 @@
>>    // See also ARMAddressingModes.h (Addressing Mode #2).
>> 
>>    assert(NumOps == 5 && getIBit(insn) == 1 && "Expect 5 operands && I-bit=1");
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRn(insn))));
>> 
>>    ARM_AM::AddrOpc AddrOpcode = getUBit(insn) ? ARM_AM::add : ARM_AM::sub;
>> 
>>    // Disassemble the offset reg (Rm), shift type, and immediate shift length.
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRm(insn))));
>>    // Inst{6-5} encodes the shift opcode.
>>    ARM_AM::ShiftOpc ShOp = getShiftOpcForBits(slice(insn, 6, 5));
>> @@ -933,7 +935,7 @@
>> // operations have Rd Rm Rn, instead of the "normal" Rd Rn Rm.
>> // They are QADD, QDADD, QDSUB, and QSUB.
>> static bool DisassembleDPFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  const TargetInstrDesc &TID = ARMInsts[Opcode];
>>  unsigned short NumDefs = TID.getNumDefs();
>> @@ -945,7 +947,7 @@
>> 
>>  // Disassemble register def if there is one.
>>  if (NumDefs && (OpInfo[OpIdx].RegClass == ARM::GPRRegClassID)) {
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRd(insn))));
>>    ++OpIdx;
>>  }
>> @@ -958,7 +960,7 @@
>>  if (SaturateOpcode(Opcode)) {
>>    MI.addOperand(MCOperand::CreateImm(decodeSaturatePos(Opcode, insn)));
>> 
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRm(insn))));
>> 
>>    if (Opcode == ARM::SSAT16 || Opcode == ARM::USAT16) {
>> @@ -986,7 +988,7 @@
>>  if (Opcode == ARM::BFC || Opcode == ARM::BFI) {
>>    // TIED_TO operand skipped for BFC and Inst{3-0} (Reg) for BFI.
>>    MI.addOperand(MCOperand::CreateReg(Opcode == ARM::BFC ? 0
>> -                                       : getRegisterEnum(ARM::GPRRegClassID,
>> +                                       : getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                         decodeRm(insn))));
>>    uint32_t mask = 0;
>>    if (!getBFCInvMask(insn, mask))
>> @@ -997,7 +999,7 @@
>>    return true;
>>  }
>>  if (Opcode == ARM::SBFX || Opcode == ARM::UBFX) {
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRm(insn))));
>>    MI.addOperand(MCOperand::CreateImm(slice(insn, 11, 7)));
>>    MI.addOperand(MCOperand::CreateImm(slice(insn, 20, 16) + 1));
>> @@ -1013,7 +1015,7 @@
>>    assert(OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
>>           "Reg operand expected");
>>    MI.addOperand(MCOperand::CreateReg(
>> -                    getRegisterEnum(ARM::GPRRegClassID,
>> +                    getRegisterEnum(B, ARM::GPRRegClassID,
>>                                    RmRn ? decodeRm(insn) : decodeRn(insn))));
>>    ++OpIdx;
>>  }
>> @@ -1034,7 +1036,7 @@
>>    // routed here as well.
>>    // assert(getIBit(insn) == 0 && "I_Bit != '0' reg/reg form");
>>    MI.addOperand(MCOperand::CreateReg(
>> -                    getRegisterEnum(ARM::GPRRegClassID,
>> +                    getRegisterEnum(B, ARM::GPRRegClassID,
>>                                    RmRn? decodeRn(insn) : decodeRm(insn))));
>>    ++OpIdx;
>>  } else if (Opcode == ARM::MOVi16 || Opcode == ARM::MOVTi16) {
>> @@ -1059,7 +1061,7 @@
>> }
>> 
>> static bool DisassembleDPSoRegFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  const TargetInstrDesc &TID = ARMInsts[Opcode];
>>  unsigned short NumDefs = TID.getNumDefs();
>> @@ -1071,7 +1073,7 @@
>> 
>>  // Disassemble register def if there is one.
>>  if (NumDefs && (OpInfo[OpIdx].RegClass == ARM::GPRRegClassID)) {
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRd(insn))));
>>    ++OpIdx;
>>  }
>> @@ -1084,7 +1086,7 @@
>>  if (!isUnary) {
>>    assert(OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
>>           "Reg operand expected");
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRn(insn))));
>>    ++OpIdx;
>>  }
>> @@ -1107,11 +1109,11 @@
>>  // Register-controlled shifts have Inst{7} = 0 and Inst{4} = 1.
>>  unsigned Rs = slice(insn, 4, 4);
>> 
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRm(insn))));
>>  if (Rs) {
>>    // Register-controlled shifts: [Rm, Rs, shift].
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRs(insn))));
>>    // Inst{6-5} encodes the shift opcode.
>>    ARM_AM::ShiftOpc ShOp = getShiftOpcForBits(slice(insn, 6, 5));
>> @@ -1134,7 +1136,7 @@
>> }
>> 
>> static bool DisassembleLdStFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, bool isStore) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, bool isStore, BO B) {
>> 
>>  const TargetInstrDesc &TID = ARMInsts[Opcode];
>>  bool isPrePost = isPrePostLdSt(TID.TSFlags);
>> @@ -1153,7 +1155,7 @@
>>  if (isPrePost && isStore) {
>>    assert(OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
>>           "Reg operand expected");
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRn(insn))));
>>    ++OpIdx;
>>  }
>> @@ -1164,7 +1166,7 @@
>> 
>>  assert(OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
>>         "Reg operand expected");
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRd(insn))));
>>  ++OpIdx;
>> 
>> @@ -1172,7 +1174,7 @@
>>  if (isPrePost && !isStore) {
>>    assert(OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
>>           "Reg operand expected");
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRn(insn))));
>>    ++OpIdx;
>>  }
>> @@ -1185,7 +1187,7 @@
>>         "Reg operand expected");
>>  assert((!isPrePost || (TID.getOperandConstraint(OpIdx, TOI::TIED_TO) != -1))
>>         && "Index mode or tied_to operand expected");
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRn(insn))));
>>  ++OpIdx;
>> 
>> @@ -1209,7 +1211,7 @@
>>    MI.addOperand(MCOperand::CreateImm(Offset));
>>  } else {
>>    // Disassemble the offset reg (Rm), shift type, and immediate shift length.
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRm(insn))));
>>    // Inst{6-5} encodes the shift opcode.
>>    ARM_AM::ShiftOpc ShOp = getShiftOpcForBits(slice(insn, 6, 5));
>> @@ -1227,13 +1229,13 @@
>> }
>> 
>> static bool DisassembleLdFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> -  return DisassembleLdStFrm(MI, Opcode, insn, NumOps, NumOpsAdded, false);
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> +  return DisassembleLdStFrm(MI, Opcode, insn, NumOps, NumOpsAdded, false, B);
>> }
>> 
>> static bool DisassembleStFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> -  return DisassembleLdStFrm(MI, Opcode, insn, NumOps, NumOpsAdded, true);
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> +  return DisassembleLdStFrm(MI, Opcode, insn, NumOps, NumOpsAdded, true, B);
>> }
>> 
>> static bool HasDualReg(unsigned Opcode) {
>> @@ -1247,7 +1249,7 @@
>> }
>> 
>> static bool DisassembleLdStMiscFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, bool isStore) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, bool isStore, BO B) {
>> 
>>  const TargetInstrDesc &TID = ARMInsts[Opcode];
>>  bool isPrePost = isPrePostLdSt(TID.TSFlags);
>> @@ -1266,7 +1268,7 @@
>>  if (isPrePost && isStore) {
>>    assert(OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
>>           "Reg operand expected");
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRn(insn))));
>>    ++OpIdx;
>>  }
>> @@ -1279,13 +1281,13 @@
>> 
>>  assert(OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
>>         "Reg operand expected");
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRd(insn))));
>>  ++OpIdx;
>> 
>>  // Fill in LDRD and STRD's second operand.
>>  if (DualReg) {
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRd(insn) + 1)));
>>    ++OpIdx;
>>  }
>> @@ -1294,7 +1296,7 @@
>>  if (isPrePost && !isStore) {
>>    assert(OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
>>           "Reg operand expected");
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRn(insn))));
>>    ++OpIdx;
>>  }
>> @@ -1307,7 +1309,7 @@
>>         "Reg operand expected");
>>  assert((!isPrePost || (TID.getOperandConstraint(OpIdx, TOI::TIED_TO) != -1))
>>         && "Index mode or tied_to operand expected");
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRn(insn))));
>>  ++OpIdx;
>> 
>> @@ -1332,7 +1334,7 @@
>>    MI.addOperand(MCOperand::CreateImm(Offset));
>>  } else {
>>    // Disassemble the offset reg (Rm).
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRm(insn))));
>>    unsigned Offset = ARM_AM::getAM3Opc(AddrOpcode, 0);
>>    MI.addOperand(MCOperand::CreateImm(Offset));
>> @@ -1343,13 +1345,14 @@
>> }
>> 
>> static bool DisassembleLdMiscFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> -  return DisassembleLdStMiscFrm(MI, Opcode, insn, NumOps, NumOpsAdded, false);
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> +  return DisassembleLdStMiscFrm(MI, Opcode, insn, NumOps, NumOpsAdded, false,
>> +                                B);
>> }
>> 
>> static bool DisassembleStMiscFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> -  return DisassembleLdStMiscFrm(MI, Opcode, insn, NumOps, NumOpsAdded, true);
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> +  return DisassembleLdStMiscFrm(MI, Opcode, insn, NumOps, NumOpsAdded, true, B);
>> }
>> 
>> // The algorithm for disassembly of LdStMulFrm is different from others because
>> @@ -1357,7 +1360,7 @@
>> // and operand 1 (the AM4 mode imm).  After operand 3, we need to populate the
>> // reglist with each affected register encoded as an MCOperand.
>> static bool DisassembleLdStMulFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  assert(NumOps >= 5 && "LdStMulFrm expects NumOps >= 5");
>> 
>> @@ -1365,7 +1368,7 @@
>> 
>>  OpIdx = 0;
>> 
>> -  unsigned Base = getRegisterEnum(ARM::GPRRegClassID, decodeRn(insn));
>> +  unsigned Base = getRegisterEnum(B, ARM::GPRRegClassID, decodeRn(insn));
>> 
>>  // Writeback to base, if necessary.
>>  if (Opcode == ARM::LDM_UPD || Opcode == ARM::STM_UPD) {
>> @@ -1389,7 +1392,7 @@
>>  unsigned RegListBits = insn & ((1 << 16) - 1);
>>  for (unsigned i = 0; i < 16; ++i) {
>>    if ((RegListBits >> i) & 1) {
>> -      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                         i)));
>>      ++OpIdx;
>>    }
>> @@ -1405,7 +1408,7 @@
>> //
>> // SWP, SWPB:             Rd Rm Rn
>> static bool DisassembleLdStExFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
>>  if (!OpInfo) return false;
>> @@ -1423,29 +1426,29 @@
>>  bool isDW = (Opcode == ARM::LDREXD || Opcode == ARM::STREXD);
>> 
>>  // Add the destination operand.
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRd(insn))));
>>  ++OpIdx;
>> 
>>  // Store register Exclusive needs a source operand.
>>  if (isStore) {
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRm(insn))));
>>    ++OpIdx;
>> 
>>    if (isDW) {
>> -      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                         decodeRm(insn)+1)));
>>      ++OpIdx;
>>    }
>>  } else if (isDW) {
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRd(insn)+1)));
>>    ++OpIdx;
>>  }
>> 
>>  // Finally add the pointer operand.
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRn(insn))));
>>  ++OpIdx;
>> 
>> @@ -1457,7 +1460,7 @@
>> // PKHBT, PKHTB: Rd Rn Rm , LSL/ASR #imm5
>> // RBIT, REV, REV16, REVSH: Rd Rm
>> static bool DisassembleArithMiscFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
>>  unsigned &OpIdx = NumOpsAdded;
>> @@ -1471,18 +1474,18 @@
>> 
>>  bool ThreeReg = NumOps > 2 && OpInfo[2].RegClass == ARM::GPRRegClassID;
>> 
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRd(insn))));
>>  ++OpIdx;
>> 
>>  if (ThreeReg) {
>>    assert(NumOps >= 4 && "Expect >= 4 operands");
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRn(insn))));
>>    ++OpIdx;
>>  }
>> 
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRm(insn))));
>>  ++OpIdx;
>> 
>> @@ -1504,7 +1507,7 @@
>> // The 2nd operand register is Rn and the 3rd operand regsiter is Rm for the
>> // three register operand form.  Otherwise, Rn=0b1111 and only Rm is used.
>> static bool DisassembleExtFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
>>  unsigned &OpIdx = NumOpsAdded;
>> @@ -1518,17 +1521,17 @@
>> 
>>  bool ThreeReg = NumOps > 2 && OpInfo[2].RegClass == ARM::GPRRegClassID;
>> 
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRd(insn))));
>>  ++OpIdx;
>> 
>>  if (ThreeReg) {
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRn(insn))));
>>    ++OpIdx;
>>  }
>> 
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRm(insn))));
>>  ++OpIdx;
>> 
>> @@ -1610,7 +1613,7 @@
>> // VCVTDS, VCVTSD: converts between double-precision and single-precision
>> // The rest of the instructions have homogeneous [VFP]Rd and [VFP]Rm registers.
>> static bool DisassembleVFPUnaryFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  assert(NumOps >= 1 && "VFPUnaryFrm expects NumOps >= 1");
>> 
>> @@ -1625,7 +1628,7 @@
>>  bool isSP = (RegClass == ARM::SPRRegClassID);
>> 
>>  MI.addOperand(MCOperand::CreateReg(
>> -                  getRegisterEnum(RegClass, decodeVFPRd(insn, isSP))));
>> +                  getRegisterEnum(B, RegClass, decodeVFPRd(insn, isSP))));
>>  ++OpIdx;
>> 
>>  // Early return for compare with zero instructions.
>> @@ -1639,7 +1642,7 @@
>>  isSP = (RegClass == ARM::SPRRegClassID);
>> 
>>  MI.addOperand(MCOperand::CreateReg(
>> -                  getRegisterEnum(RegClass, decodeVFPRm(insn, isSP))));
>> +                  getRegisterEnum(B, RegClass, decodeVFPRm(insn, isSP))));
>>  ++OpIdx;
>> 
>>  return true;
>> @@ -1650,7 +1653,7 @@
>> // InOperandList to that of the dst.  As far as asm printing is concerned, this
>> // tied_to operand is simply skipped.
>> static bool DisassembleVFPBinaryFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  assert(NumOps >= 3 && "VFPBinaryFrm expects NumOps >= 3");
>> 
>> @@ -1666,7 +1669,7 @@
>>  bool isSP = (RegClass == ARM::SPRRegClassID);
>> 
>>  MI.addOperand(MCOperand::CreateReg(
>> -                  getRegisterEnum(RegClass, decodeVFPRd(insn, isSP))));
>> +                  getRegisterEnum(B, RegClass, decodeVFPRd(insn, isSP))));
>>  ++OpIdx;
>> 
>>  // Skip tied_to operand constraint.
>> @@ -1677,11 +1680,11 @@
>>  }
>> 
>>  MI.addOperand(MCOperand::CreateReg(
>> -                  getRegisterEnum(RegClass, decodeVFPRn(insn, isSP))));
>> +                  getRegisterEnum(B, RegClass, decodeVFPRn(insn, isSP))));
>>  ++OpIdx;
>> 
>>  MI.addOperand(MCOperand::CreateReg(
>> -                  getRegisterEnum(RegClass, decodeVFPRm(insn, isSP))));
>> +                  getRegisterEnum(B, RegClass, decodeVFPRm(insn, isSP))));
>>  ++OpIdx;
>> 
>>  return true;
>> @@ -1694,7 +1697,7 @@
>> // A8.6.297 vcvt (floating-point and fixed-point)
>> // Dd|Sd Dd|Sd(TIED_TO) #fbits(= 16|32 - UInt(imm4:i))
>> static bool DisassembleVFPConv1Frm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  assert(NumOps >= 2 && "VFPConv1Frm expects NumOps >= 2");
>> 
>> @@ -1712,7 +1715,7 @@
>>    int size = slice(insn, 7, 7) == 0 ? 16 : 32;
>>    int fbits = size - (slice(insn,3,0) << 1 | slice(insn,5,5));
>>    MI.addOperand(MCOperand::CreateReg(
>> -                    getRegisterEnum(RegClassID,
>> +                    getRegisterEnum(B, RegClassID,
>>                                    decodeVFPRd(insn, SP))));
>> 
>>    assert(TID.getOperandConstraint(1, TOI::TIED_TO) != -1 &&
>> @@ -1732,15 +1735,15 @@
>>    if (slice(insn, 18, 18) == 1) { // to_integer operation
>>      d = decodeVFPRd(insn, true /* Is Single Precision */);
>>      MI.addOperand(MCOperand::CreateReg(
>> -                      getRegisterEnum(ARM::SPRRegClassID, d)));
>> +                      getRegisterEnum(B, ARM::SPRRegClassID, d)));
>>      m = decodeVFPRm(insn, SP);
>> -      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(RegClassID, m)));
>> +      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, RegClassID, m)));
>>    } else {
>>      d = decodeVFPRd(insn, SP);
>> -      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(RegClassID, d)));
>> +      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, RegClassID, d)));
>>      m = decodeVFPRm(insn, true /* Is Single Precision */);
>>      MI.addOperand(MCOperand::CreateReg(
>> -                      getRegisterEnum(ARM::SPRRegClassID, m)));
>> +                      getRegisterEnum(B, ARM::SPRRegClassID, m)));
>>    }
>>    NumOpsAdded = 2;
>>  }
>> @@ -1751,13 +1754,13 @@
>> // VMOVRS - A8.6.330
>> // Rt => Rd; Sn => UInt(Vn:N)
>> static bool DisassembleVFPConv2Frm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  assert(NumOps >= 2 && "VFPConv2Frm expects NumOps >= 2");
>> 
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRd(insn))));
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::SPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::SPRRegClassID,
>>                                                     decodeVFPRn(insn, true))));
>>  NumOpsAdded = 2;
>>  return true;
>> @@ -1769,29 +1772,29 @@
>> // VMOVRRS - A8.6.331
>> // Rt => Rd; Rt2 => Rn; Sm => UInt(Vm:M); Sm1 = Sm+1
>> static bool DisassembleVFPConv3Frm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  assert(NumOps >= 3 && "VFPConv3Frm expects NumOps >= 3");
>> 
>>  const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
>>  unsigned &OpIdx = NumOpsAdded;
>> 
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRd(insn))));
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRn(insn))));
>>  OpIdx = 2;
>> 
>>  if (OpInfo[OpIdx].RegClass == ARM::SPRRegClassID) {
>>    unsigned Sm = decodeVFPRm(insn, true);
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::SPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::SPRRegClassID,
>>                                                       Sm)));
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::SPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::SPRRegClassID,
>>                                                       Sm+1)));
>>    OpIdx += 2;
>>  } else {
>>    MI.addOperand(MCOperand::CreateReg(
>> -                    getRegisterEnum(ARM::DPRRegClassID,
>> +                    getRegisterEnum(B, ARM::DPRRegClassID,
>>                                    decodeVFPRm(insn, false))));
>>    ++OpIdx;
>>  }
>> @@ -1801,13 +1804,13 @@
>> // VMOVSR - A8.6.330
>> // Rt => Rd; Sn => UInt(Vn:N)
>> static bool DisassembleVFPConv4Frm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  assert(NumOps >= 2 && "VFPConv4Frm expects NumOps >= 2");
>> 
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::SPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::SPRRegClassID,
>>                                                     decodeVFPRn(insn, true))));
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRd(insn))));
>>  NumOpsAdded = 2;
>>  return true;
>> @@ -1819,7 +1822,7 @@
>> // VMOVRRS - A8.6.331
>> // Rt => Rd; Rt2 => Rn; Sm => UInt(Vm:M); Sm1 = Sm+1
>> static bool DisassembleVFPConv5Frm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  assert(NumOps >= 3 && "VFPConv5Frm expects NumOps >= 3");
>> 
>> @@ -1830,21 +1833,21 @@
>> 
>>  if (OpInfo[OpIdx].RegClass == ARM::SPRRegClassID) {
>>    unsigned Sm = decodeVFPRm(insn, true);
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::SPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::SPRRegClassID,
>>                                                       Sm)));
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::SPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::SPRRegClassID,
>>                                                       Sm+1)));
>>    OpIdx += 2;
>>  } else {
>>    MI.addOperand(MCOperand::CreateReg(
>> -                    getRegisterEnum(ARM::DPRRegClassID,
>> +                    getRegisterEnum(B, ARM::DPRRegClassID,
>>                                    decodeVFPRm(insn, false))));
>>    ++OpIdx;
>>  }
>> 
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRd(insn))));
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRn(insn))));
>>  OpIdx += 2;
>>  return true;
>> @@ -1853,7 +1856,7 @@
>> // VFP Load/Store Instructions.
>> // VLDRD, VLDRS, VSTRD, VSTRS
>> static bool DisassembleVFPLdStFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  assert(NumOps >= 3 && "VFPLdStFrm expects NumOps >= 3");
>> 
>> @@ -1863,9 +1866,9 @@
>>  // Extract Dd/Sd for operand 0.
>>  unsigned RegD = decodeVFPRd(insn, isSPVFP);
>> 
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(RegClassID, RegD)));
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, RegClassID, RegD)));
>> 
>> -  unsigned Base = getRegisterEnum(ARM::GPRRegClassID, decodeRn(insn));
>> +  unsigned Base = getRegisterEnum(B, ARM::GPRRegClassID, decodeRn(insn));
>>  MI.addOperand(MCOperand::CreateReg(Base));
>> 
>>  // Next comes the AM5 Opcode.
>> @@ -1885,7 +1888,7 @@
>> //
>> // VLDMD[_UPD], VLDMS[_UPD], VSTMD[_UPD], VSTMS[_UPD]
>> static bool DisassembleVFPLdStMulFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  assert(NumOps >= 5 && "VFPLdStMulFrm expects NumOps >= 5");
>> 
>> @@ -1893,7 +1896,7 @@
>> 
>>  OpIdx = 0;
>> 
>> -  unsigned Base = getRegisterEnum(ARM::GPRRegClassID, decodeRn(insn));
>> +  unsigned Base = getRegisterEnum(B, ARM::GPRRegClassID, decodeRn(insn));
>> 
>>  // Writeback to base, if necessary.
>>  if (Opcode == ARM::VLDMD_UPD || Opcode == ARM::VLDMS_UPD ||
>> @@ -1926,7 +1929,7 @@
>>  // Fill the variadic part of reglist.
>>  unsigned Regs = isSPVFP ? Imm8 : Imm8/2;
>>  for (unsigned i = 0; i < Regs; ++i) {
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(RegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, RegClassID,
>>                                                       RegD + i)));
>>    ++OpIdx;
>>  }
>> @@ -1940,7 +1943,7 @@
>> // FCONSTS (SPR and a VFPf32Imm operand)
>> // VMRS/VMSR (GPR operand)
>> static bool DisassembleVFPMiscFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
>>  unsigned &OpIdx = NumOpsAdded;
>> @@ -1955,13 +1958,13 @@
>>  unsigned RegEnum = 0;
>>  switch (OpInfo[0].RegClass) {
>>  case ARM::DPRRegClassID:
>> -    RegEnum = getRegisterEnum(ARM::DPRRegClassID, decodeVFPRd(insn, false));
>> +    RegEnum = getRegisterEnum(B, ARM::DPRRegClassID, decodeVFPRd(insn, false));
>>    break;
>>  case ARM::SPRRegClassID:
>> -    RegEnum = getRegisterEnum(ARM::SPRRegClassID, decodeVFPRd(insn, true));
>> +    RegEnum = getRegisterEnum(B, ARM::SPRRegClassID, decodeVFPRd(insn, true));
>>    break;
>>  case ARM::GPRRegClassID:
>> -    RegEnum = getRegisterEnum(ARM::GPRRegClassID, decodeRd(insn));
>> +    RegEnum = getRegisterEnum(B, ARM::GPRRegClassID, decodeRd(insn));
>>    break;
>>  default:
>>    assert(0 && "Invalid reg class id");
>> @@ -2231,7 +2234,8 @@
>> //
>> // Correctly set VLD*/VST*'s TIED_TO GPR, as the asm printer needs it.
>> static bool DisassembleNLdSt0(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, bool Store, bool DblSpaced) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, bool Store, bool DblSpaced,
>> +    BO B) {
>> 
>>  const TargetInstrDesc &TID = ARMInsts[Opcode];
>>  const TargetOperandInfo *OpInfo = TID.OpInfo;
>> @@ -2259,7 +2263,7 @@
>>  // LLVM Addressing Mode #6.
>>  unsigned RmEnum = 0;
>>  if (WB && Rm != 13)
>> -    RmEnum = getRegisterEnum(ARM::GPRRegClassID, Rm);
>> +    RmEnum = getRegisterEnum(B, ARM::GPRRegClassID, Rm);
>> 
>>  if (Store) {
>>    // Consume possible WB, AddrMode6, possible increment reg, the DPR/QPR's,
>> @@ -2268,14 +2272,14 @@
>>           "Reg operand expected");
>> 
>>    if (WB) {
>> -      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                         Rn)));
>>      ++OpIdx;
>>    }
>> 
>>    assert((OpIdx+1) < NumOps && OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
>>           OpInfo[OpIdx + 1].RegClass == 0 && "Addrmode #6 Operands expected");
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       Rn)));
>>    MI.addOperand(MCOperand::CreateImm(0)); // Alignment ignored?
>>    OpIdx += 2;
>> @@ -2293,9 +2297,10 @@
>>    RegClass = OpInfo[OpIdx].RegClass;
>>    while (OpIdx < NumOps && OpInfo[OpIdx].RegClass == RegClass) {
>>      if (Opcode >= ARM::VST1q16 && Opcode <= ARM::VST1q8)
>> -        MI.addOperand(MCOperand::CreateReg(getRegisterEnum(RegClass,Rd,true)));
>> +        MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, RegClass, Rd,
>> +                                                           true)));
>>      else
>> -        MI.addOperand(MCOperand::CreateReg(getRegisterEnum(RegClass,Rd)));
>> +        MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, RegClass,Rd)));
>>      Rd += Inc;
>>      ++OpIdx;
>>    }
>> @@ -2314,22 +2319,23 @@
>> 
>>    while (OpIdx < NumOps && OpInfo[OpIdx].RegClass == RegClass) {
>>      if (Opcode >= ARM::VLD1q16 && Opcode <= ARM::VLD1q8)
>> -        MI.addOperand(MCOperand::CreateReg(getRegisterEnum(RegClass,Rd,true)));
>> +        MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, RegClass, Rd,
>> +                                                           true)));
>>      else
>> -        MI.addOperand(MCOperand::CreateReg(getRegisterEnum(RegClass,Rd)));
>> +        MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, RegClass, Rd)));
>>      Rd += Inc;
>>      ++OpIdx;
>>    }
>> 
>>    if (WB) {
>> -      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                         Rn)));
>>      ++OpIdx;
>>    }
>> 
>>    assert((OpIdx+1) < NumOps && OpInfo[OpIdx].RegClass == ARM::GPRRegClassID &&
>>           OpInfo[OpIdx + 1].RegClass == 0 && "Addrmode #6 Operands expected");
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       Rn)));
>>    MI.addOperand(MCOperand::CreateImm(0)); // Alignment ignored?
>>    OpIdx += 2;
>> @@ -2362,7 +2368,7 @@
>> // Find out about double-spaced-ness of the Opcode and pass it on to
>> // DisassembleNLdSt0().
>> static bool DisassembleNLdSt(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  const StringRef Name = ARMInsts[Opcode].Name;
>>  bool DblSpaced = false;
>> @@ -2397,13 +2403,13 @@
>> 
>>  }
>>  return DisassembleNLdSt0(MI, Opcode, insn, NumOps, NumOpsAdded,
>> -                           slice(insn, 21, 21) == 0, DblSpaced);
>> +                           slice(insn, 21, 21) == 0, DblSpaced, B);
>> }
>> 
>> // VMOV (immediate)
>> //   Qd/Dd imm
>> static bool DisassembleN1RegModImmFrm(MCInst &MI, unsigned Opcode,
>> -    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  const TargetInstrDesc &TID = ARMInsts[Opcode];
>>  const TargetOperandInfo *OpInfo = TID.OpInfo;
>> @@ -2415,7 +2421,7 @@
>>         "Expect 1 reg operand followed by 1 imm operand");
>> 
>>  // Qd/Dd = Inst{22:15-12} => NEON Rd
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(OpInfo[0].RegClass,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, OpInfo[0].RegClass,
>>                                                     decodeNEONRd(insn))));
>> 
>>  ElemSize esize = ESizeNA;
>> @@ -2471,7 +2477,7 @@
>> //
>> // Others
>> static bool DisassembleNVdVmOptImm(MCInst &MI, unsigned Opc, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, N2VFlag Flag = N2V_None) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, N2VFlag Flag, BO B) {
>> 
>>  const TargetInstrDesc &TID = ARMInsts[Opc];
>>  const TargetOperandInfo *OpInfo = TID.OpInfo;
>> @@ -2498,7 +2504,7 @@
>>  }
>> 
>>  // Qd/Dd = Inst{22:15-12} => NEON Rd
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(OpInfo[OpIdx].RegClass,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, OpInfo[OpIdx].RegClass,
>>                                                     decodeNEONRd(insn))));
>>  ++OpIdx;
>> 
>> @@ -2510,7 +2516,7 @@
>>  }
>> 
>>  // Dm = Inst{5:3-0} => NEON Rm
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(OpInfo[OpIdx].RegClass,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, OpInfo[OpIdx].RegClass,
>>                                                     decodeNEONRm(insn))));
>>  ++OpIdx;
>> 
>> @@ -2543,21 +2549,22 @@
>> }
>> 
>> static bool DisassembleN2RegFrm(MCInst &MI, unsigned Opc, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>> -  return DisassembleNVdVmOptImm(MI, Opc, insn, NumOps, NumOpsAdded);
>> +  return DisassembleNVdVmOptImm(MI, Opc, insn, NumOps, NumOpsAdded,
>> +                                N2V_None, B);
>> }
>> static bool DisassembleNVCVTFrm(MCInst &MI, unsigned Opc, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  return DisassembleNVdVmOptImm(MI, Opc, insn, NumOps, NumOpsAdded,
>> -                                N2V_VectorConvert_Between_Float_Fixed);
>> +                                N2V_VectorConvert_Between_Float_Fixed, B);
>> }
>> static bool DisassembleNVecDupLnFrm(MCInst &MI, unsigned Opc, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  return DisassembleNVdVmOptImm(MI, Opc, insn, NumOps, NumOpsAdded,
>> -                                N2V_VectorDupLane);
>> +                                N2V_VectorDupLane, B);
>> }
>> 
>> // Vector Shift [Accumulate] Instructions.
>> @@ -2567,7 +2574,7 @@
>> // VSHLLi16, VSHLLi32, VSHLLi8: Qd Dm imm (== size)
>> //
>> static bool DisassembleNVectorShift(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, bool LeftShift) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, bool LeftShift, BO B) {
>> 
>>  const TargetInstrDesc &TID = ARMInsts[Opcode];
>>  const TargetOperandInfo *OpInfo = TID.OpInfo;
>> @@ -2584,7 +2591,7 @@
>>  OpIdx = 0;
>> 
>>  // Qd/Dd = Inst{22:15-12} => NEON Rd
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(OpInfo[OpIdx].RegClass,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, OpInfo[OpIdx].RegClass,
>>                                                     decodeNEONRd(insn))));
>>  ++OpIdx;
>> 
>> @@ -2599,7 +2606,7 @@
>>         "Reg operand expected");
>> 
>>  // Qm/Dm = Inst{5:3-0} => NEON Rm
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(OpInfo[OpIdx].RegClass,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, OpInfo[OpIdx].RegClass,
>>                                                     decodeNEONRm(insn))));
>>  ++OpIdx;
>> 
>> @@ -2631,15 +2638,17 @@
>> 
>> // Left shift instructions.
>> static bool DisassembleN2RegVecShLFrm(MCInst &MI, unsigned Opcode,
>> -    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>> -  return DisassembleNVectorShift(MI, Opcode, insn, NumOps, NumOpsAdded, true);
>> +  return DisassembleNVectorShift(MI, Opcode, insn, NumOps, NumOpsAdded, true,
>> +                                 B);
>> }
>> // Right shift instructions have different shift amount interpretation.
>> static bool DisassembleN2RegVecShRFrm(MCInst &MI, unsigned Opcode,
>> -    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>> -  return DisassembleNVectorShift(MI, Opcode, insn, NumOps, NumOpsAdded, false);
>> +  return DisassembleNVectorShift(MI, Opcode, insn, NumOps, NumOpsAdded, false,
>> +                                 B);
>> }
>> 
>> namespace {
>> @@ -2664,7 +2673,7 @@
>> //
>> // Others
>> static bool DisassembleNVdVnVmOptImm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, N3VFlag Flag = N3V_None) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, N3VFlag Flag, BO B) {
>> 
>>  const TargetInstrDesc &TID = ARMInsts[Opcode];
>>  const TargetOperandInfo *OpInfo = TID.OpInfo;
>> @@ -2693,7 +2702,7 @@
>>  }
>> 
>>  // Qd/Dd = Inst{22:15-12} => NEON Rd
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(OpInfo[OpIdx].RegClass,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, OpInfo[OpIdx].RegClass,
>>                                                     decodeNEONRd(insn))));
>>  ++OpIdx;
>> 
>> @@ -2708,7 +2717,7 @@
>>  // or
>>  // Dm = Inst{5:3-0} => NEON Rm
>>  MI.addOperand(MCOperand::CreateReg(
>> -                  getRegisterEnum(OpInfo[OpIdx].RegClass,
>> +                  getRegisterEnum(B, OpInfo[OpIdx].RegClass,
>>                                  VdVnVm ? decodeNEONRn(insn)
>>                                         : decodeNEONRm(insn))));
>>  ++OpIdx;
>> @@ -2728,7 +2737,7 @@
>>                      : decodeNEONRn(insn);
>> 
>>  MI.addOperand(MCOperand::CreateReg(
>> -                  getRegisterEnum(OpInfo[OpIdx].RegClass, m)));
>> +                  getRegisterEnum(B, OpInfo[OpIdx].RegClass, m)));
>>  ++OpIdx;
>> 
>>  if (OpIdx < NumOps && OpInfo[OpIdx].RegClass == 0
>> @@ -2752,27 +2761,28 @@
>> }
>> 
>> static bool DisassembleN3RegFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>> -  return DisassembleNVdVnVmOptImm(MI, Opcode, insn, NumOps, NumOpsAdded);
>> +  return DisassembleNVdVnVmOptImm(MI, Opcode, insn, NumOps, NumOpsAdded,
>> +                                  N3V_None, B);
>> }
>> static bool DisassembleN3RegVecShFrm(MCInst &MI, unsigned Opcode,
>> -    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  return DisassembleNVdVnVmOptImm(MI, Opcode, insn, NumOps, NumOpsAdded,
>> -                                  N3V_VectorShift);
>> +                                  N3V_VectorShift, B);
>> }
>> static bool DisassembleNVecExtractFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  return DisassembleNVdVnVmOptImm(MI, Opcode, insn, NumOps, NumOpsAdded,
>> -                                  N3V_VectorExtract);
>> +                                  N3V_VectorExtract, B);
>> }
>> static bool DisassembleNVecMulScalarFrm(MCInst &MI, unsigned Opcode,
>> -    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  return DisassembleNVdVnVmOptImm(MI, Opcode, insn, NumOps, NumOpsAdded,
>> -                                  N3V_Multiply_By_Scalar);
>> +                                  N3V_Multiply_By_Scalar, B);
>> }
>> 
>> // Vector Table Lookup
>> @@ -2782,7 +2792,7 @@
>> // VTBL3, VTBX3: Dd [Dd(TIED_TO)] Dn Dn+1 Dn+2 Dm
>> // VTBL4, VTBX4: Dd [Dd(TIED_TO)] Dn Dn+1 Dn+2 Dn+3 Dm
>> static bool DisassembleNVTBLFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  const TargetInstrDesc &TID = ARMInsts[Opcode];
>>  const TargetOperandInfo *OpInfo = TID.OpInfo;
>> @@ -2807,7 +2817,7 @@
>>  unsigned Len = slice(insn, 9, 8) + 1;
>> 
>>  // Dd (the destination vector)
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::DPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::DPRRegClassID,
>>                                                     decodeNEONRd(insn))));
>>  ++OpIdx;
>> 
>> @@ -2822,7 +2832,7 @@
>>  for (unsigned i = 0; i < Len; ++i) {
>>    assert(OpIdx < NumOps && OpInfo[OpIdx].RegClass == ARM::DPRRegClassID &&
>>           "Reg operand expected");
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::DPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::DPRRegClassID,
>>                                                       Rn + i)));
>>    ++OpIdx;
>>  }
>> @@ -2830,7 +2840,7 @@
>>  // Dm (the index vector)
>>  assert(OpIdx < NumOps && OpInfo[OpIdx].RegClass == ARM::DPRRegClassID &&
>>         "Reg operand (index vector) expected");
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::DPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::DPRRegClassID,
>>                                                     decodeNEONRm(insn))));
>>  ++OpIdx;
>> 
>> @@ -2846,7 +2856,7 @@
>> // Vector Get Lane (move scalar to ARM core register) Instructions.
>> // VGETLNi32, VGETLNs16, VGETLNs8, VGETLNu16, VGETLNu8: Rt Dn index
>> static bool DisassembleNEONGetLnFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  const TargetInstrDesc &TID = ARMInsts[Opcode];
>>  const TargetOperandInfo *OpInfo = TID.OpInfo;
>> @@ -2864,11 +2874,11 @@
>>                                                                : ESize32);
>> 
>>  // Rt = Inst{15-12} => ARM Rd
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRd(insn))));
>> 
>>  // Dn = Inst{7:19-16} => NEON Rn
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::DPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::DPRRegClassID,
>>                                                     decodeNEONRn(insn))));
>> 
>>  MI.addOperand(MCOperand::CreateImm(decodeNVLaneOpIndex(insn, esize)));
>> @@ -2880,7 +2890,7 @@
>> // Vector Set Lane (move ARM core register to scalar) Instructions.
>> // VSETLNi16, VSETLNi32, VSETLNi8: Dd Dd (TIED_TO) Rt index
>> static bool DisassembleNEONSetLnFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  const TargetInstrDesc &TID = ARMInsts[Opcode];
>>  const TargetOperandInfo *OpInfo = TID.OpInfo;
>> @@ -2900,14 +2910,14 @@
>>                                                        : ESize32);
>> 
>>  // Dd = Inst{7:19-16} => NEON Rn
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::DPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::DPRRegClassID,
>>                                                     decodeNEONRn(insn))));
>> 
>>  // TIED_TO operand.
>>  MI.addOperand(MCOperand::CreateReg(0));
>> 
>>  // Rt = Inst{15-12} => ARM Rd
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRd(insn))));
>> 
>>  MI.addOperand(MCOperand::CreateImm(decodeNVLaneOpIndex(insn, esize)));
>> @@ -2919,7 +2929,7 @@
>> // Vector Duplicate Instructions (from ARM core register to all elements).
>> // VDUP8d, VDUP16d, VDUP32d, VDUP8q, VDUP16q, VDUP32q: Qd/Dd Rt
>> static bool DisassembleNEONDupFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
>> 
>> @@ -2932,11 +2942,11 @@
>>  unsigned RegClass = OpInfo[0].RegClass;
>> 
>>  // Qd/Dd = Inst{7:19-16} => NEON Rn
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(RegClass,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, RegClass,
>>                                                     decodeNEONRn(insn))));
>> 
>>  // Rt = Inst{15-12} => ARM Rd
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRd(insn))));
>> 
>>  NumOpsAdded = 2;
>> @@ -2966,13 +2976,13 @@
>> }
>> 
>> static bool DisassemblePreLoadFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  // Preload Data/Instruction requires either 2 or 4 operands.
>>  // PLDi, PLDWi, PLIi:                Rn [+/-]imm12 add = (U == '1')
>>  // PLDr[a|m], PLDWr[a|m], PLIr[a|m]: Rn Rm addrmode2_opc
>> 
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRn(insn))));
>> 
>>  if (Opcode == ARM::PLDi || Opcode == ARM::PLDWi || Opcode == ARM::PLIi) {
>> @@ -2982,7 +2992,7 @@
>>    MI.addOperand(MCOperand::CreateImm(Offset));
>>    NumOpsAdded = 2;
>>  } else {
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRm(insn))));
>> 
>>    ARM_AM::AddrOpc AddrOpcode = getUBit(insn) ? ARM_AM::add : ARM_AM::sub;
>> @@ -3003,7 +3013,7 @@
>> }
>> 
>> static bool DisassembleMiscFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  if (MemBarrierInstr(insn))
>>    return true;
>> @@ -3052,7 +3062,7 @@
>>  }
>> 
>>  if (PreLoadOpcode(Opcode))
>> -    return DisassemblePreLoadFrm(MI, Opcode, insn, NumOps, NumOpsAdded);
>> +    return DisassemblePreLoadFrm(MI, Opcode, insn, NumOps, NumOpsAdded, B);
>> 
>>  assert(0 && "Unexpected misc instruction!");
>>  return false;
>> @@ -3168,7 +3178,7 @@
>>  unsigned NumOpsAdded = 0;
>>  bool OK = (*Disasm)(MI, Opcode, insn, NumOps, NumOpsAdded, this);
>> 
>> -  if (!OK) return false;
>> +  if (!OK || this->Err != 0) return false;
>>  if (NumOpsAdded >= NumOps)
>>    return true;
>> 
>> @@ -3255,7 +3265,7 @@
>> /// Opcode, Format, and NumOperands make up an ARM Basic MCBuilder.
>> ARMBasicMCBuilder::ARMBasicMCBuilder(unsigned opc, ARMFormat format,
>>                                     unsigned short num)
>> -  : Opcode(opc), Format(format), NumOps(num), SP(0) {
>> +  : Opcode(opc), Format(format), NumOps(num), SP(0), Err(0) {
>>  unsigned Idx = (unsigned)format;
>>  assert(Idx < (array_lengthof(FuncPtrs) - 1) && "Unknown format");
>>  Disasm = FuncPtrs[Idx];
>> 
>> Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h?rev=101290&r1=101289&r2=101290&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h (original)
>> +++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h Wed Apr 14 16:03:13 2010
>> @@ -187,6 +187,7 @@
>>  unsigned short NumOps;
>>  DisassembleFP Disasm;
>>  Session *SP;
>> +  int Err; // !=0 if the builder encounters some error condition during build.
>> 
>> private:
>>  /// Opcode, Format, and NumOperands make up an ARM Basic MCBuilder.
>> @@ -195,15 +196,20 @@
>> public:
>>  ARMBasicMCBuilder(ARMBasicMCBuilder &B)
>>    : Opcode(B.Opcode), Format(B.Format), NumOps(B.NumOps), Disasm(B.Disasm),
>> -      SP(B.SP)
>> -  {}
>> +      SP(B.SP) {
>> +    Err = 0;
>> +  }
>> 
>>  virtual ~ARMBasicMCBuilder() {}
>> 
>> -  void setSession(Session *sp) {
>> +  void SetSession(Session *sp) {
>>    SP = sp;
>>  }
>> 
>> +  void SetErr(int ErrCode) {
>> +    Err = ErrCode;
>> +  }
>> +
>>  /// TryPredicateAndSBitModifier - TryPredicateAndSBitModifier tries to process
>>  /// the possible Predicate and SBitModifier, to build the remaining MCOperand
>>  /// constituents.
>> 
>> Modified: llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h?rev=101290&r1=101289&r2=101290&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h (original)
>> +++ llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h Wed Apr 14 16:03:13 2010
>> @@ -342,7 +342,7 @@
>> // Special case:
>> // tMOVSr:                  tRd tRn
>> static bool DisassembleThumb1General(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO Builder) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
>>  unsigned &OpIdx = NumOpsAdded;
>> @@ -360,14 +360,14 @@
>> 
>>  // Add the destination operand.
>>  MI.addOperand(MCOperand::CreateReg(
>> -                  getRegisterEnum(ARM::tGPRRegClassID,
>> +                  getRegisterEnum(B, ARM::tGPRRegClassID,
>>                                  UseRt ? getT1tRt(insn) : getT1tRd(insn))));
>>  ++OpIdx;
>> 
>>  // Check whether the next operand to be added is a CCR Register.
>>  if (OpInfo[OpIdx].RegClass == ARM::CCRRegClassID) {
>>    assert(OpInfo[OpIdx].isOptionalDef() && "Optional def operand expected");
>> -    MI.addOperand(MCOperand::CreateReg(Builder->InITBlock() ? 0 : ARM::CPSR));
>> +    MI.addOperand(MCOperand::CreateReg(B->InITBlock() ? 0 : ARM::CPSR));
>>    ++OpIdx;
>>  }
>> 
>> @@ -376,7 +376,7 @@
>>  if (OpInfo[OpIdx].RegClass == ARM::tGPRRegClassID) {
>>    // For UseRt, the reg operand is tied to the first reg operand.
>>    MI.addOperand(MCOperand::CreateReg(
>> -                    getRegisterEnum(ARM::tGPRRegClassID,
>> +                    getRegisterEnum(B, ARM::tGPRRegClassID,
>>                                    UseRt ? getT1tRt(insn) : getT1tRn(insn))));
>>    ++OpIdx;
>>  }
>> @@ -388,7 +388,7 @@
>>  // The next available operand is either a reg operand or an imm operand.
>>  if (OpInfo[OpIdx].RegClass == ARM::tGPRRegClassID) {
>>    // Three register operand instructions.
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
>>                                                       getT1tRm(insn))));
>>  } else {
>>    assert(OpInfo[OpIdx].RegClass == 0 &&
>> @@ -409,7 +409,7 @@
>> // tMVN, tRSB:        tRd CPSR tRn
>> // Others:            tRd CPSR tRd(TIED_TO) tRn
>> static bool DisassembleThumb1DP(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO Builder) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  const TargetInstrDesc &TID = ARMInsts[Opcode];
>>  const TargetOperandInfo *OpInfo = TID.OpInfo;
>> @@ -423,14 +423,14 @@
>>         && "Invalid arguments");
>> 
>>  // Add the destination operand.
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
>>                                                     getT1tRd(insn))));
>>  ++OpIdx;
>> 
>>  // Check whether the next operand to be added is a CCR Register.
>>  if (OpInfo[OpIdx].RegClass == ARM::CCRRegClassID) {
>>    assert(OpInfo[OpIdx].isOptionalDef() && "Optional def operand expected");
>> -    MI.addOperand(MCOperand::CreateReg(Builder->InITBlock() ? 0 : ARM::CPSR));
>> +    MI.addOperand(MCOperand::CreateReg(B->InITBlock() ? 0 : ARM::CPSR));
>>    ++OpIdx;
>>  }
>> 
>> @@ -449,7 +449,7 @@
>>  // Process possible next reg operand.
>>  if (OpIdx < NumOps && OpInfo[OpIdx].RegClass == ARM::tGPRRegClassID) {
>>    // Add tRn operand.
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
>>                                                       getT1tRn(insn))));
>>    ++OpIdx;
>>  }
>> @@ -466,7 +466,7 @@
>> // tBX_RET_vararg: Rm
>> // tBLXr_r9: Rm
>> static bool DisassembleThumb1Special(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  // tBX_RET has 0 operand.
>>  if (NumOps == 0)
>> @@ -474,7 +474,7 @@
>> 
>>  // BX/BLX has 1 reg operand: Rm.
>>  if (NumOps == 1) {
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       getT1Rm(insn))));
>>    NumOpsAdded = 1;
>>    return true;
>> @@ -489,7 +489,7 @@
>>  // Add the destination operand.
>>  unsigned RegClass = OpInfo[OpIdx].RegClass;
>>  MI.addOperand(MCOperand::CreateReg(
>> -                  getRegisterEnum(RegClass,
>> +                  getRegisterEnum(B, RegClass,
>>                                  IsGPR(RegClass) ? getT1Rd(insn)
>>                                                  : getT1tRd(insn))));
>>  ++OpIdx;
>> @@ -509,7 +509,7 @@
>>  assert(OpIdx < NumOps && "More operands expected");
>>  RegClass = OpInfo[OpIdx].RegClass;
>>  MI.addOperand(MCOperand::CreateReg(
>> -                  getRegisterEnum(RegClass,
>> +                  getRegisterEnum(B, RegClass,
>>                                  IsGPR(RegClass) ? getT1Rm(insn)
>>                                                  : getT1tRn(insn))));
>>  ++OpIdx;
>> @@ -521,7 +521,7 @@
>> //
>> // tLDRpci: tRt imm8*4
>> static bool DisassembleThumb1LdPC(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
>>  if (!OpInfo) return false;
>> @@ -533,7 +533,7 @@
>>         && "Invalid arguments");
>> 
>>  // Add the destination operand.
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
>>                                                     getT1tRt(insn))));
>> 
>>  // And the (imm8 << 2) operand.
>> @@ -565,7 +565,7 @@
>> // Load/Store Register (reg|imm):      tRd tRn imm5 tRm
>> // Load Register Signed Byte|Halfword: tRd tRn tRm
>> static bool DisassembleThumb1LdSt(unsigned opA, MCInst &MI, unsigned Opcode,
>> -    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded) {
>> +    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  const TargetInstrDesc &TID = ARMInsts[Opcode];
>>  const TargetOperandInfo *OpInfo = TID.OpInfo;
>> @@ -582,9 +582,9 @@
>>         && "Expect >= 2 operands and first two as thumb reg operands");
>> 
>>  // Add the destination reg and the base reg.
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
>>                                                     getT1tRd(insn))));
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
>>                                                     getT1tRn(insn))));
>>  OpIdx = 2;
>> 
>> @@ -604,9 +604,10 @@
>>  // The next reg operand is tRm, the offset.
>>  assert(OpIdx < NumOps && OpInfo[OpIdx].RegClass == ARM::tGPRRegClassID
>>         && "Thumb reg operand expected");
>> -  MI.addOperand(MCOperand::CreateReg(Imm5 ? 0
>> -                                          : getRegisterEnum(ARM::tGPRRegClassID,
>> -                                                            getT1tRm(insn))));
>> +  MI.addOperand(MCOperand::CreateReg(
>> +                  Imm5 ? 0
>> +                       : getRegisterEnum(B, ARM::tGPRRegClassID,
>> +                                         getT1tRm(insn))));
>>  ++OpIdx;
>> 
>>  return true;
>> @@ -616,7 +617,7 @@
>> //
>> // Load/Store Register SP relative: tRt ARM::SP imm8
>> static bool DisassembleThumb1LdStSP(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  assert((Opcode == ARM::tLDRspi || Opcode == ARM::tSTRspi)
>>         && "Invalid opcode");
>> @@ -632,7 +633,7 @@
>>          !OpInfo[2].isOptionalDef())
>>         && "Invalid arguments");
>> 
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
>>                                                     getT1tRt(insn))));
>>  MI.addOperand(MCOperand::CreateReg(ARM::SP));
>>  MI.addOperand(MCOperand::CreateImm(getT1Imm8(insn)));
>> @@ -645,7 +646,7 @@
>> //
>> // tADDrPCi: tRt imm8
>> static bool DisassembleThumb1AddPCi(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  assert(Opcode == ARM::tADDrPCi && "Invalid opcode");
>> 
>> @@ -658,7 +659,7 @@
>>          !OpInfo[1].isOptionalDef())
>>         && "Invalid arguments");
>> 
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
>>                                                     getT1tRt(insn))));
>>  MI.addOperand(MCOperand::CreateImm(getT1Imm8(insn)));
>>  NumOpsAdded = 2;
>> @@ -670,7 +671,7 @@
>> //
>> // tADDrSPi: tRt ARM::SP imm8
>> static bool DisassembleThumb1AddSPi(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  assert(Opcode == ARM::tADDrSPi && "Invalid opcode");
>> 
>> @@ -685,7 +686,7 @@
>>          !OpInfo[2].isOptionalDef())
>>         && "Invalid arguments");
>> 
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
>>                                                     getT1tRt(insn))));
>>  MI.addOperand(MCOperand::CreateReg(ARM::SP));
>>  MI.addOperand(MCOperand::CreateImm(getT1Imm8(insn)));
>> @@ -701,7 +702,7 @@
>> // "low registers" is specified by Inst{7-0}
>> // lr|pc is specified by Inst{8}
>> static bool DisassembleThumb1PushPop(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  assert((Opcode == ARM::tPUSH || Opcode == ARM::tPOP) && "Invalid opcode");
>> 
>> @@ -717,7 +718,7 @@
>>    | slice(insn, 7, 0);
>>  for (unsigned i = 0; i < 16; ++i) {
>>    if ((RegListBits >> i) & 1) {
>> -      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                         i)));
>>      ++OpIdx;
>>    }
>> @@ -739,13 +740,13 @@
>> //   no operand
>> // Others:           tRd tRn
>> static bool DisassembleThumb1Misc(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  if (NumOps == 0)
>>    return true;
>> 
>>  if (Opcode == ARM::tPUSH || Opcode == ARM::tPOP)
>> -    return DisassembleThumb1PushPop(MI, Opcode, insn, NumOps, NumOpsAdded);
>> +    return DisassembleThumb1PushPop(MI, Opcode, insn, NumOps, NumOpsAdded, B);
>> 
>>  const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
>> 
>> @@ -803,12 +804,12 @@
>>         && "Expect >=2 operands");
>> 
>>  // Add the destination operand.
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
>>                                                     getT1tRd(insn))));
>> 
>>  if (OpInfo[1].RegClass == ARM::tGPRRegClassID) {
>>    // Two register instructions.
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
>>                                                       getT1tRn(insn))));
>>  } else {
>>    // CBNZ, CBZ
>> @@ -827,7 +828,7 @@
>> // tLDM_UPD/tSTM_UPD: tRt tRt AM4ModeImm Pred-Imm Pred-CCR register_list
>> // tLDM:              tRt AM4ModeImm Pred-Imm Pred-CCR register_list
>> static bool DisassembleThumb1LdStMul(bool Ld, MCInst &MI, unsigned Opcode,
>> -    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded) {
>> +    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  assert((Opcode == ARM::tLDM || Opcode == ARM::tLDM_UPD ||
>>          Opcode == ARM::tSTM_UPD) && "Invalid opcode");
>> @@ -841,12 +842,12 @@
>> 
>>  // WB register, if necessary.
>>  if (Opcode == ARM::tLDM_UPD || Opcode == ARM::tSTM_UPD) {
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       tRt)));
>>    ++OpIdx;
>>  }
>> 
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     tRt)));
>>  ++OpIdx;
>> 
>> @@ -862,7 +863,7 @@
>>  // Fill the variadic part of reglist.
>>  for (unsigned i = 0; i < 8; ++i) {
>>    if ((RegListBits >> i) & 1) {
>> -      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::tGPRRegClassID,
>> +      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::tGPRRegClassID,
>>                                                         i)));
>>      ++OpIdx;
>>    }
>> @@ -872,13 +873,15 @@
>> }
>> 
>> static bool DisassembleThumb1LdMul(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded) {
>> -  return DisassembleThumb1LdStMul(true, MI, Opcode, insn, NumOps, NumOpsAdded);
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> +  return DisassembleThumb1LdStMul(true, MI, Opcode, insn, NumOps, NumOpsAdded,
>> +                                  B);
>> }
>> 
>> static bool DisassembleThumb1StMul(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded) {
>> -  return DisassembleThumb1LdStMul(false, MI, Opcode, insn, NumOps, NumOpsAdded);
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> +  return DisassembleThumb1LdStMul(false, MI, Opcode, insn, NumOps, NumOpsAdded,
>> +                                  B);
>> }
>> 
>> // A8.6.16 B Encoding T1
>> @@ -889,7 +892,7 @@
>> // tSVC: imm8 Pred-Imm Pred-CCR
>> // tTRAP: 0 operand (early return)
>> static bool DisassembleThumb1CondBr(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> 
>>  if (Opcode == ARM::tTRAP)
>>    return true;
>> @@ -918,7 +921,7 @@
>> //
>> // tB: offset
>> static bool DisassembleThumb1Br(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO) {
>> 
>>  const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
>>  if (!OpInfo) return false;
>> @@ -960,9 +963,8 @@
>> // 1101xx	Conditional branch, and Supervisor Call on page A6-13
>> // 11100x	Unconditional Branch, see B on page A8-44
>> //
>> -static bool DisassembleThumb1(uint16_t op,
>> -    MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded, BO Builder) {
>> +static bool DisassembleThumb1(uint16_t op, MCInst &MI, unsigned Opcode,
>> +    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  unsigned op1 = slice(op, 5, 4);
>>  unsigned op2 = slice(op, 3, 2);
>> @@ -971,27 +973,27 @@
>>  switch (op1) {
>>  case 0:
>>    // A6.2.1 Shift (immediate), add, subtract, move, and compare
>> -    return DisassembleThumb1General(MI, Opcode, insn, NumOps, NumOpsAdded,
>> -                                    Builder);
>> +    return DisassembleThumb1General(MI, Opcode, insn, NumOps, NumOpsAdded, B);
>>  case 1:
>>    switch (op2) {
>>    case 0:
>>      switch (op3) {
>>      case 0:
>>        // A6.2.2 Data-processing
>> -        return DisassembleThumb1DP(MI, Opcode, insn, NumOps, NumOpsAdded,
>> -                                   Builder);
>> +        return DisassembleThumb1DP(MI, Opcode, insn, NumOps, NumOpsAdded, B);
>>      case 1:
>>        // A6.2.3 Special data instructions and branch and exchange
>> -        return DisassembleThumb1Special(MI, Opcode, insn, NumOps, NumOpsAdded);
>> +        return DisassembleThumb1Special(MI, Opcode, insn, NumOps, NumOpsAdded,
>> +                                        B);
>>      default:
>>        // A8.6.59 LDR (literal)
>> -        return DisassembleThumb1LdPC(MI, Opcode, insn, NumOps, NumOpsAdded);
>> +        return DisassembleThumb1LdPC(MI, Opcode, insn, NumOps, NumOpsAdded, B);
>>      }
>>      break;
>>    default:
>>      // A6.2.4 Load/store single data item
>> -      return DisassembleThumb1LdSt(opA, MI, Opcode, insn, NumOps, NumOpsAdded);
>> +      return DisassembleThumb1LdSt(opA, MI, Opcode, insn, NumOps, NumOpsAdded,
>> +                                   B);
>>      break;
>>    }
>>    break;
>> @@ -999,21 +1001,24 @@
>>    switch (op2) {
>>    case 0:
>>      // A6.2.4 Load/store single data item
>> -      return DisassembleThumb1LdSt(opA, MI, Opcode, insn, NumOps, NumOpsAdded);
>> +      return DisassembleThumb1LdSt(opA, MI, Opcode, insn, NumOps, NumOpsAdded,
>> +                                   B);
>>    case 1:
>>      // A6.2.4 Load/store single data item
>> -      return DisassembleThumb1LdStSP(MI, Opcode, insn, NumOps, NumOpsAdded);
>> +      return DisassembleThumb1LdStSP(MI, Opcode, insn, NumOps, NumOpsAdded, B);
>>    case 2:
>>      if (op3 <= 1) {
>>        // A8.6.10 ADR
>> -        return DisassembleThumb1AddPCi(MI, Opcode, insn, NumOps, NumOpsAdded);
>> +        return DisassembleThumb1AddPCi(MI, Opcode, insn, NumOps, NumOpsAdded,
>> +                                       B);
>>      } else {
>>        // A8.6.8 ADD (SP plus immediate)
>> -        return DisassembleThumb1AddSPi(MI, Opcode, insn, NumOps, NumOpsAdded);
>> +        return DisassembleThumb1AddSPi(MI, Opcode, insn, NumOps, NumOpsAdded,
>> +                                       B);
>>      }
>>    default:
>>      // A6.2.5 Miscellaneous 16-bit instructions
>> -      return DisassembleThumb1Misc(MI, Opcode, insn, NumOps, NumOpsAdded);
>> +      return DisassembleThumb1Misc(MI, Opcode, insn, NumOps, NumOpsAdded, B);
>>    }
>>    break;
>>  case 3:
>> @@ -1021,17 +1026,17 @@
>>    case 0:
>>      if (op3 <= 1) {
>>        // A8.6.189 STM / STMIA / STMEA
>> -        return DisassembleThumb1StMul(MI, Opcode, insn, NumOps, NumOpsAdded);
>> +        return DisassembleThumb1StMul(MI, Opcode, insn, NumOps, NumOpsAdded, B);
>>      } else {
>>        // A8.6.53 LDM / LDMIA / LDMFD
>> -        return DisassembleThumb1LdMul(MI, Opcode, insn, NumOps, NumOpsAdded);
>> +        return DisassembleThumb1LdMul(MI, Opcode, insn, NumOps, NumOpsAdded, B);
>>      }
>>    case 1:
>>      // A6.2.6 Conditional branch, and Supervisor Call
>> -      return DisassembleThumb1CondBr(MI, Opcode, insn, NumOps, NumOpsAdded);
>> +      return DisassembleThumb1CondBr(MI, Opcode, insn, NumOps, NumOpsAdded, B);
>>    case 2:
>>      // Unconditional Branch, see B on page A8-44
>> -      return DisassembleThumb1Br(MI, Opcode, insn, NumOps, NumOpsAdded);
>> +      return DisassembleThumb1Br(MI, Opcode, insn, NumOps, NumOpsAdded, B);
>>    default:
>>      assert(0 && "Unreachable code");
>>      break;
>> @@ -1087,21 +1092,21 @@
>> 
>> // t2RFE[IA|DB]W/t2RFE[IA|DB]: Rn
>> static bool DisassembleThumb2RFE(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded) {
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRn(insn))));
>>  NumOpsAdded = 1;
>>  return true;
>> }
>> 
>> static bool DisassembleThumb2LdStMul(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  if (Thumb2SRSOpcode(Opcode))
>>    return DisassembleThumb2SRS(MI, Opcode, insn, NumOps, NumOpsAdded);
>> 
>>  if (Thumb2RFEOpcode(Opcode))
>> -    return DisassembleThumb2RFE(MI, Opcode, insn, NumOps, NumOpsAdded);
>> +    return DisassembleThumb2RFE(MI, Opcode, insn, NumOps, NumOpsAdded, B);
>> 
>>  assert((Opcode == ARM::t2LDM || Opcode == ARM::t2LDM_UPD ||
>>          Opcode == ARM::t2STM || Opcode == ARM::t2STM_UPD)
>> @@ -1112,7 +1117,7 @@
>> 
>>  OpIdx = 0;
>> 
>> -  unsigned Base = getRegisterEnum(ARM::GPRRegClassID, decodeRn(insn));
>> +  unsigned Base = getRegisterEnum(B, ARM::GPRRegClassID, decodeRn(insn));
>> 
>>  // Writeback to base.
>>  if (Opcode == ARM::t2LDM_UPD || Opcode == ARM::t2STM_UPD) {
>> @@ -1136,7 +1141,7 @@
>>  unsigned RegListBits = insn & ((1 << 16) - 1);
>>  for (unsigned i = 0; i < 16; ++i) {
>>    if ((RegListBits >> i) & 1) {
>> -      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                         i)));
>>      ++OpIdx;
>>    }
>> @@ -1152,7 +1157,7 @@
>> // t2STREXD: Rm Rd Rs Rn
>> // t2STREXB, t2STREXH: Rm Rd Rn
>> static bool DisassembleThumb2LdStEx(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
>>  if (!OpInfo) return false;
>> @@ -1173,25 +1178,25 @@
>>  // Add the destination operand for store.
>>  if (isStore) {
>>    MI.addOperand(MCOperand::CreateReg(
>> -                    getRegisterEnum(ARM::GPRRegClassID,
>> +                    getRegisterEnum(B, ARM::GPRRegClassID,
>>                                    isSW ? decodeRs(insn) : decodeRm(insn))));
>>    ++OpIdx;
>>  }
>> 
>>  // Source operand for store and destination operand for load.
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRd(insn))));
>>  ++OpIdx;
>> 
>>  // Thumb2 doubleword complication: with an extra source/destination operand.
>>  if (isDW) {
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRs(insn))));
>>    ++OpIdx;
>>  }
>> 
>>  // Finally add the pointer operand.
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRn(insn))));
>>  ++OpIdx;
>> 
>> @@ -1208,7 +1213,7 @@
>> // Ditto for t2LDRD_PRE, t2LDRD_POST, t2STRD_PRE, t2STRD_POST, which are for
>> // disassembly only and do not have a tied_to writeback base register operand.
>> static bool DisassembleThumb2LdStDual(MCInst &MI, unsigned Opcode,
>> -    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded) {
>> +    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
>>  if (!OpInfo) return false;
>> @@ -1221,11 +1226,11 @@
>>         && "Expect >= 4 operands and first 3 as reg operands");
>> 
>>  // Add the <Rt> <Rt2> operands.
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRd(insn))));
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRs(insn))));
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRn(insn))));
>> 
>>  // Finally add (+/-)imm8*4, depending on the U bit.
>> @@ -1246,15 +1251,15 @@
>> //
>> // t2TBBgen, t2TBHgen: Rn Rm Pred-Imm Pred-CCR
>> static bool DisassembleThumb2TB(MCInst &MI, unsigned Opcode,
>> -    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded) {
>> +    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  assert(NumOps >= 2 && "Expect >= 2 operands");
>> 
>>  // The generic version of TBB/TBH needs a base register.
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRn(insn))));
>>  // Add the index register.
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRm(insn))));
>>  NumOpsAdded = 2;
>> 
>> @@ -1289,7 +1294,7 @@
>> // nothing else, because the shift amount is already specified.
>> // Similar case holds for t2MOVrx, t2ADDrr, ..., etc.
>> static bool DisassembleThumb2DPSoReg(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  const TargetInstrDesc &TID = ARMInsts[Opcode];
>>  const TargetOperandInfo *OpInfo = TID.OpInfo;
>> @@ -1304,7 +1309,7 @@
>>           && OpInfo[3].RegClass == 0
>>           && "Exactlt 4 operands expect and first two as reg operands");
>>    // Only need to populate the src reg operand.
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRm(insn))));
>>    MI.addOperand(MCOperand::CreateReg(0));
>>    MI.addOperand(MCOperand::CreateImm(0));
>> @@ -1326,7 +1331,7 @@
>>  // Build the register operands, followed by the constant shift specifier.
>> 
>>  MI.addOperand(MCOperand::CreateReg(
>> -                  getRegisterEnum(ARM::GPRRegClassID,
>> +                  getRegisterEnum(B, ARM::GPRRegClassID,
>>                                  NoDstReg ? decodeRn(insn) : decodeRs(insn))));
>>  ++OpIdx;
>> 
>> @@ -1337,13 +1342,13 @@
>>      MI.addOperand(MI.getOperand(Idx));
>>    } else {
>>      assert(!NoDstReg && "Internal error");
>> -      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                         decodeRn(insn))));
>>    }
>>    ++OpIdx;
>>  }
>> 
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRm(insn))));
>>  ++OpIdx;
>> 
>> @@ -1384,7 +1389,7 @@
>> //
>> // ModImm = ThumbExpandImm(i:imm3:imm8)
>> static bool DisassembleThumb2DPModImm(MCInst &MI, unsigned Opcode,
>> -    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded) {
>> +    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
>>  unsigned &OpIdx = NumOpsAdded;
>> @@ -1400,13 +1405,13 @@
>>  // Build the register operands, followed by the modified immediate.
>> 
>>  MI.addOperand(MCOperand::CreateReg(
>> -                  getRegisterEnum(ARM::GPRRegClassID,
>> +                  getRegisterEnum(B, ARM::GPRRegClassID,
>>                                  NoDstReg ? decodeRn(insn) : decodeRs(insn))));
>>  ++OpIdx;
>> 
>>  if (TwoReg) {
>>    assert(!NoDstReg && "Internal error");
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRn(insn))));
>>    ++OpIdx;
>>  }
>> @@ -1470,7 +1475,7 @@
>> // o t2SSAT[lsl|asr], t2USAT[lsl|asr]: Rs sat_pos Rn shamt
>> // o t2SSAT16, t2USAT16: Rs sat_pos Rn
>> static bool DisassembleThumb2DPBinImm(MCInst &MI, unsigned Opcode,
>> -    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded) {
>> +    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  const TargetInstrDesc &TID = ARMInsts[Opcode];
>>  const TargetOperandInfo *OpInfo = TID.OpInfo;
>> @@ -1485,7 +1490,7 @@
>> 
>>  // Build the register operand(s), followed by the immediate(s).
>> 
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRs(insn))));
>>  ++OpIdx;
>> 
>> @@ -1493,7 +1498,7 @@
>>  if (Thumb2SaturateOpcode(Opcode)) {
>>    MI.addOperand(MCOperand::CreateImm(decodeThumb2SaturatePos(Opcode, insn)));
>> 
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRn(insn))));
>> 
>>    if (Opcode == ARM::t2SSAT16 || Opcode == ARM::t2USAT16) {
>> @@ -1521,7 +1526,7 @@
>>      MI.addOperand(MI.getOperand(Idx));
>>    } else {
>>      // Add src reg operand.
>> -      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +      MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                         decodeRn(insn))));
>>    }
>>    ++OpIdx;
>> @@ -1596,7 +1601,7 @@
>> // t2MSR/t2MSRsys -> Rn mask=Inst{11-8}
>> // t2SMC -> imm4 = Inst{19-16}
>> static bool DisassembleThumb2BrMiscCtrl(MCInst &MI, unsigned Opcode,
>> -    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded) {
>> +    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  if (NumOps == 0)
>>    return true;
>> @@ -1638,21 +1643,21 @@
>> 
>>  // MRS and MRSsys take one GPR reg Rs.
>>  if (Opcode == ARM::t2MRS || Opcode == ARM::t2MRSsys) {
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRs(insn))));
>>    NumOpsAdded = 1;
>>    return true;
>>  }
>>  // BXJ takes one GPR reg Rn.
>>  if (Opcode == ARM::t2BXJ) {
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRn(insn))));
>>    NumOpsAdded = 1;
>>    return true;
>>  }
>>  // MSR and MSRsys take one GPR reg Rn, followed by the mask.
>>  if (Opcode == ARM::t2MSR || Opcode == ARM::t2MSRsys || Opcode == ARM::t2BXJ) {
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRn(insn))));
>>    MI.addOperand(MCOperand::CreateImm(slice(insn, 11, 8)));
>>    NumOpsAdded = 2;
>> @@ -1711,7 +1716,7 @@
>> }
>> 
>> static bool DisassembleThumb2PreLoad(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  // Preload Data/Instruction requires either 2 or 3 operands.
>>  // t2PLDi12, t2PLDi8, t2PLDpci: Rn [+/-]imm12/imm8
>> @@ -1729,12 +1734,12 @@
>>         OpInfo[0].RegClass == ARM::GPRRegClassID &&
>>         "Expect >= 2 operands and first one as reg operand");
>> 
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRn(insn))));
>>  ++OpIdx;
>> 
>>  if (OpInfo[OpIdx].RegClass == ARM::GPRRegClassID) {
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRm(insn))));
>>  } else {
>>    assert(OpInfo[OpIdx].RegClass == 0 && !OpInfo[OpIdx].isPredicate()
>> @@ -1776,7 +1781,7 @@
>> // These instrs calculate an address from the PC value and an immediate offset.
>> // Rd Rn=PC (+/-)imm12 (+ if Inst{23} == 0b1)
>> static bool DisassembleThumb2Ldpci(MCInst &MI, unsigned Opcode,
>> -    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded) {
>> +    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
>>  if (!OpInfo) return false;
>> @@ -1788,7 +1793,7 @@
>> 
>>  // Build the register operand, followed by the (+/-)imm12 immediate.
>> 
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRd(insn))));
>> 
>>  MI.addOperand(MCOperand::CreateImm(decodeImm12(insn)));
>> @@ -1824,16 +1829,16 @@
>> // Delegates to DisassembleThumb2PreLoad() for preload data/instruction.
>> // Delegates to DisassembleThumb2Ldpci() for load * literal operations.
>> static bool DisassembleThumb2LdSt(bool Load, MCInst &MI, unsigned Opcode,
>> -    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded) {
>> +    uint32_t insn, unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  unsigned Rn = decodeRn(insn);
>> 
>>  if (Thumb2PreloadOpcode(Opcode))
>> -    return DisassembleThumb2PreLoad(MI, Opcode, insn, NumOps, NumOpsAdded);
>> +    return DisassembleThumb2PreLoad(MI, Opcode, insn, NumOps, NumOpsAdded, B);
>> 
>>  // See, for example, A6.3.7 Load word: Table A6-18 Load word.
>>  if (Load && Rn == 15)
>> -    return DisassembleThumb2Ldpci(MI, Opcode, insn, NumOps, NumOpsAdded);
>> +    return DisassembleThumb2Ldpci(MI, Opcode, insn, NumOps, NumOpsAdded, B);
>> 
>>  const TargetInstrDesc &TID = ARMInsts[Opcode];
>>  const TargetOperandInfo *OpInfo = TID.OpInfo;
>> @@ -1882,13 +1887,16 @@
>>      Imm = decodeImm8(insn);
>>  }
>> 
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID, R0)));
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>> +                                                     R0)));
>>  ++OpIdx;
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID, R1)));
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>> +                                                     R1)));
>>  ++OpIdx;
>> 
>>  if (ThreeReg) {
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,R2)));
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>> +                                                       R2)));
>>    ++OpIdx;
>>  }
>> 
>> @@ -1912,7 +1920,7 @@
>> //
>> // Miscellaneous operations: Rs [Rn] Rm
>> static bool DisassembleThumb2DPReg(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  const TargetInstrDesc &TID = ARMInsts[Opcode];
>>  const TargetOperandInfo *OpInfo = TID.OpInfo;
>> @@ -1929,17 +1937,17 @@
>> 
>>  bool ThreeReg = NumOps > 2 && OpInfo[2].RegClass == ARM::GPRRegClassID;
>> 
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRs(insn))));
>>  ++OpIdx;
>> 
>>  if (ThreeReg) {
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRn(insn))));
>>    ++OpIdx;
>>  }
>> 
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRm(insn))));
>>  ++OpIdx;
>> 
>> @@ -1966,7 +1974,7 @@
>> // Unsigned Sum of Absolute Differences [and Accumulate]
>> //    Rs Rn Rm [Ra=Inst{15-12}]
>> static bool DisassembleThumb2Mul(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
>> 
>> @@ -1980,17 +1988,17 @@
>> 
>>  bool FourReg = NumOps > 3 && OpInfo[3].RegClass == ARM::GPRRegClassID;
>> 
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRs(insn))));
>> 
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRn(insn))));
>> 
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRm(insn))));
>> 
>>  if (FourReg)
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRd(insn))));
>> 
>>  NumOpsAdded = FourReg ? 4 : 3;
>> @@ -2011,7 +2019,7 @@
>> //
>> // Signed/Unsigned divide: t2SDIV, t2UDIV: Rs Rn Rm
>> static bool DisassembleThumb2LongMul(MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded) {
>> +    unsigned short NumOps, unsigned &NumOpsAdded, BO B) {
>> 
>>  const TargetOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo;
>> 
>> @@ -2026,16 +2034,16 @@
>>  // Build the register operands.
>> 
>>  if (FourReg)
>> -    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +    MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                       decodeRd(insn))));
>> 
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRs(insn))));
>> 
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRn(insn))));
>> 
>> -  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(ARM::GPRRegClassID,
>> +  MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID,
>>                                                     decodeRm(insn))));
>> 
>>  if (FourReg)
>> @@ -2071,15 +2079,16 @@
>> // 		1xxxxxx	-	Coprocessor instructions on page A6-40
>> //
>> static bool DisassembleThumb2(uint16_t op1, uint16_t op2, uint16_t op,
>> -    MCInst &MI, unsigned Opcode, uint32_t insn,
>> -    unsigned short NumOps, unsigned &NumOpsAdded) {
>> +    MCInst &MI, unsigned Opcode, uint32_t insn, unsigned short NumOps,
>> +    unsigned &NumOpsAdded, BO B) {
>> 
>>  switch (op1) {
>>  case 1:
>>    if (slice(op2, 6, 5) == 0) {
>>      if (slice(op2, 2, 2) == 0) {
>>        // Load/store multiple.
>> -        return DisassembleThumb2LdStMul(MI, Opcode, insn, NumOps, NumOpsAdded);
>> +        return DisassembleThumb2LdStMul(MI, Opcode, insn, NumOps, NumOpsAdded,
>> +                                        B);
>>      }
>> 
>>      // Load/store dual, load/store exclusive, table branch, otherwise.
>> @@ -2087,22 +2096,24 @@
>>      if ((ARM::t2LDREX <= Opcode && Opcode <= ARM::t2LDREXH) ||
>>          (ARM::t2STREX <= Opcode && Opcode <= ARM::t2STREXH)) {
>>        // Load/store exclusive.
>> -        return DisassembleThumb2LdStEx(MI, Opcode, insn, NumOps, NumOpsAdded);
>> +        return DisassembleThumb2LdStEx(MI, Opcode, insn, NumOps, NumOpsAdded,
>> +                                       B);
>>      }
>>      if (Opcode == ARM::t2LDRDi8 ||
>>          Opcode == ARM::t2LDRD_PRE || Opcode == ARM::t2LDRD_POST ||
>>          Opcode == ARM::t2STRDi8 ||
>>          Opcode == ARM::t2STRD_PRE || Opcode == ARM::t2STRD_POST) {
>>        // Load/store dual.
>> -        return DisassembleThumb2LdStDual(MI, Opcode, insn, NumOps, NumOpsAdded);
>> +        return DisassembleThumb2LdStDual(MI, Opcode, insn, NumOps, NumOpsAdded,
>> +                                         B);
>>      }
>>      if (Opcode == ARM::t2TBBgen || Opcode == ARM::t2TBHgen) {
>>        // Table branch.
>> -        return DisassembleThumb2TB(MI, Opcode, insn, NumOps, NumOpsAdded);
>> +        return DisassembleThumb2TB(MI, Opcode, insn, NumOps, NumOpsAdded, B);
>>      }
>>    } else if (slice(op2, 6, 5) == 1) {
>>      // Data-processing (shifted register).
>> -      return DisassembleThumb2DPSoReg(MI, Opcode, insn, NumOps, NumOpsAdded);
>> +      return DisassembleThumb2DPSoReg(MI, Opcode, insn, NumOps, NumOpsAdded, B);
>>    }
>> 
>>    // FIXME: A6.3.18 Coprocessor instructions
>> @@ -2113,14 +2124,17 @@
>>    if (op == 0) {
>>      if (slice(op2, 5, 5) == 0) {
>>        // Data-processing (modified immediate)
>> -        return DisassembleThumb2DPModImm(MI, Opcode, insn, NumOps, NumOpsAdded);
>> +        return DisassembleThumb2DPModImm(MI, Opcode, insn, NumOps, NumOpsAdded,
>> +                                         B);
>>      } else {
>>        // Data-processing (plain binary immediate)
>> -        return DisassembleThumb2DPBinImm(MI, Opcode, insn, NumOps, NumOpsAdded);
>> +        return DisassembleThumb2DPBinImm(MI, Opcode, insn, NumOps, NumOpsAdded,
>> +                                         B);
>>      }
>>    } else {
>>      // Branches and miscellaneous control on page A6-20.
>> -      return DisassembleThumb2BrMiscCtrl(MI, Opcode, insn, NumOps, NumOpsAdded);
>> +      return DisassembleThumb2BrMiscCtrl(MI, Opcode, insn, NumOps, NumOpsAdded,
>> +                                         B);
>>    }
>> 
>>    break;
>> @@ -2131,7 +2145,8 @@
>>      if (slice(op2, 0, 0) == 0) {
>>        if (slice(op2, 4, 4) == 0) {
>>          // Store single data item on page A6-30
>> -          return DisassembleThumb2LdSt(false, MI,Opcode,insn,NumOps,NumOpsAdded);
>> +          return DisassembleThumb2LdSt(false, MI,Opcode,insn,NumOps,NumOpsAdded,
>> +                                       B);
>>        } else {
>>          // FIXME: Advanced SIMD element or structure load/store instructions.
>>          // But see ThumbDisassembler::getInstruction().
>> @@ -2139,19 +2154,20 @@
>>        }
>>      } else {
>>        // Table A6-9 32-bit Thumb instruction encoding: Load byte|halfword|word
>> -        return DisassembleThumb2LdSt(true, MI,Opcode,insn,NumOps,NumOpsAdded);
>> +        return DisassembleThumb2LdSt(true, MI,Opcode,insn,NumOps,NumOpsAdded, B);
>>      }
>>      break;
>>    case 1:
>>      if (slice(op2, 4, 4) == 0) {
>>        // A6.3.12 Data-processing (register)
>> -        return DisassembleThumb2DPReg(MI, Opcode, insn, NumOps, NumOpsAdded);
>> +        return DisassembleThumb2DPReg(MI, Opcode, insn, NumOps, NumOpsAdded, B);
>>      } else if (slice(op2, 3, 3) == 0) {
>>        // A6.3.16 Multiply, multiply accumulate, and absolute difference
>> -        return DisassembleThumb2Mul(MI, Opcode, insn, NumOps, NumOpsAdded);
>> +        return DisassembleThumb2Mul(MI, Opcode, insn, NumOps, NumOpsAdded, B);
>>      } else {
>>        // A6.3.17 Long multiply, long multiply accumulate, and divide
>> -        return DisassembleThumb2LongMul(MI, Opcode, insn, NumOps, NumOpsAdded);
>> +        return DisassembleThumb2LongMul(MI, Opcode, insn, NumOps, NumOpsAdded,
>> +                                        B);
>>      }
>>      break;
>>    default:
>> @@ -2197,5 +2213,6 @@
>>  uint16_t op2 = slice(HalfWord, 10, 4);
>>  uint16_t op = slice(insn, 15, 15);
>> 
>> -  return DisassembleThumb2(op1, op2, op, MI, Opcode, insn, NumOps, NumOpsAdded);
>> +  return DisassembleThumb2(op1, op2, op, MI, Opcode, insn, NumOps, NumOpsAdded,
>> +                           Builder);
>> }
>> 
>> 
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
> 




From dpatel at apple.com  Wed Apr 14 18:54:13 2010
From: dpatel at apple.com (Devang Patel)
Date: Wed, 14 Apr 2010 23:54:13 -0000
Subject: [llvm-commits] [llvm] r101314 -
	/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h
Message-ID: <20100414235413.EF2CA2A6C12C@llvm.org>

Author: dpatel
Date: Wed Apr 14 18:54:13 2010
New Revision: 101314

URL: http://llvm.org/viewvc/llvm-project?rev=101314&view=rev
Log:
Remove dead code.

Modified:
    llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h

Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h?rev=101314&r1=101313&r2=101314&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h (original)
+++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h Wed Apr 14 18:54:13 2010
@@ -175,11 +175,7 @@
 
   DenseMap<DIE *, MDNode *> ContainingTypeMap;
 
-  /// AbstractSubprogramDIEs - Collection of abstruct subprogram DIEs.
-  SmallPtrSet<DIE *, 4> AbstractSubprogramDIEs;
-
   typedef SmallVector<DbgScope *, 2> ScopeVector;
-
   SmallPtrSet<const MachineInstr *, 8> InsnsBeginScopeSet;
   SmallPtrSet<const MachineInstr *, 8> InsnsEndScopeSet;
 




From dpatel at apple.com  Wed Apr 14 18:56:24 2010
From: dpatel at apple.com (Devang Patel)
Date: Wed, 14 Apr 2010 23:56:24 -0000
Subject: [llvm-commits] [llvm] r101315 - in
 /llvm/trunk/lib/CodeGen/AsmPrinter: DwarfDebug.cpp DwarfDebug.h
Message-ID: <20100414235624.9C9602A6C12C@llvm.org>

Author: dpatel
Date: Wed Apr 14 18:56:24 2010
New Revision: 101315

URL: http://llvm.org/viewvc/llvm-project?rev=101315&view=rev
Log:
There is no need to track compile unit offsets if there is only one compile unit.

Modified:
    llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
    llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h

Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp?rev=101315&r1=101314&r2=101315&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp (original)
+++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp Wed Apr 14 18:56:24 2010
@@ -2450,7 +2450,6 @@
     sizeof(int8_t);   // Pointer Size (in bytes)
 
   computeSizeAndOffset(ModuleCU->getCUDie(), Offset, true);
-  CompileUnitOffsets[ModuleCU] = 0;
 }
 
 /// EmitSectionSym - Switch to the specified MCSection and emit an assembler

Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h?rev=101315&r1=101314&r2=101315&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h (original)
+++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h Wed Apr 14 18:56:24 2010
@@ -193,11 +193,6 @@
   /// instruction.
   DenseMap<const MachineInstr *, MCSymbol *> InsnAfterLabelMap;
 
-  /// CompileUnitOffsets - A vector of the offsets of the compile units. This is
-  /// used when calculating the "origin" of a concrete instance of an inlined
-  /// function.
-  DenseMap<CompileUnit *, unsigned> CompileUnitOffsets;
-
   /// Previous instruction's location information. This is used to determine
   /// label location to indicate scope boundries in dwarf debug info.
   DebugLoc PrevInstLoc;




From dpatel at apple.com  Wed Apr 14 19:02:49 2010
From: dpatel at apple.com (Devang Patel)
Date: Thu, 15 Apr 2010 00:02:49 -0000
Subject: [llvm-commits] [llvm] r101317 -
	/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h
Message-ID: <20100415000249.3AF652A6C12C@llvm.org>

Author: dpatel
Date: Wed Apr 14 19:02:49 2010
New Revision: 101317

URL: http://llvm.org/viewvc/llvm-project?rev=101317&view=rev
Log:
Add comment.

Modified:
    llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h

Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h?rev=101317&r1=101316&r2=101317&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h (original)
+++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h Wed Apr 14 19:02:49 2010
@@ -173,6 +173,9 @@
   /// (at the end of the module) as DW_AT_inline.
   SmallPtrSet<DIE *, 4> InlinedSubprogramDIEs;
 
+  /// ContainingTypeMap - This map is used to keep track of subprogram DIEs that
+  /// need DW_AT_containing_type attribute. This attribute points to a DIE that
+  /// corresponds to the MDNode mapped with the subprogram DIE.
   DenseMap<DIE *, MDNode *> ContainingTypeMap;
 
   typedef SmallVector<DbgScope *, 2> ScopeVector;




From gohman at apple.com  Wed Apr 14 18:43:06 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 14 Apr 2010 16:43:06 -0700
Subject: [llvm-commits] [llvm] r101299 -
 /llvm/trunk/include/llvm/IntrinsicInst.h
In-Reply-To: <C3D7693D-DB68-465B-82F4-D59611BFA0FE@apple.com>
References: <20100414222305.594372A6C12C@llvm.org>
	<C3D7693D-DB68-465B-82F4-D59611BFA0FE@apple.com>
Message-ID: <07CD445B-B26C-4B57-BA50-63E484AB66FF@apple.com>



On Apr 14, 2010, at 3:27 PM, Dale Johannesen <dalej at apple.com> wrote:

>
> On Apr 14, 2010, at 3:23 PMPDT, Dan Gohman wrote:
>
>> Author: djg
>> Date: Wed Apr 14 17:23:05 2010
>> New Revision: 101299
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=101299&view=rev
>> Log:
>> Remove a const here. This makes this function consistent with all the
>> other getOperand wrappers, and it makes it easier to use with  
>> DebugInfo
>> code, which isn't currently prepared to see const MDNode *.
>
> Please don't do this.  The MDNode is not changing any more by the  
> time we get here, and should be referenced through const*; it's a  
> useful precaution.

DebugInfo does not use const on any of its MDNodes.  Should someone  
fix that, I'd happily revert this patch.

Dan



From dalej at apple.com  Wed Apr 14 19:22:53 2010
From: dalej at apple.com (Dale Johannesen)
Date: Wed, 14 Apr 2010 17:22:53 -0700
Subject: [llvm-commits] [llvm] r101299 -
	/llvm/trunk/include/llvm/IntrinsicInst.h
In-Reply-To: <07CD445B-B26C-4B57-BA50-63E484AB66FF@apple.com>
References: <20100414222305.594372A6C12C@llvm.org>
	<C3D7693D-DB68-465B-82F4-D59611BFA0FE@apple.com>
	<07CD445B-B26C-4B57-BA50-63E484AB66FF@apple.com>
Message-ID: <8873FE28-283D-4EB6-BFAD-BF3EBA5B5038@apple.com>


On Apr 14, 2010, at 4:43 PMPDT, Dan Gohman wrote:

> 
> 
> On Apr 14, 2010, at 3:27 PM, Dale Johannesen <dalej at apple.com> wrote:
> 
>> 
>> On Apr 14, 2010, at 3:23 PMPDT, Dan Gohman wrote:
>> 
>>> Author: djg
>>> Date: Wed Apr 14 17:23:05 2010
>>> New Revision: 101299
>>> 
>>> URL: http://llvm.org/viewvc/llvm-project?rev=101299&view=rev
>>> Log:
>>> Remove a const here. This makes this function consistent with all the
>>> other getOperand wrappers, and it makes it easier to use with DebugInfo
>>> code, which isn't currently prepared to see const MDNode *.
>> 
>> Please don't do this.  The MDNode is not changing any more by the time we get here, and should be referenced through const*; it's a useful precaution.
> 
> DebugInfo does not use const on any of its MDNodes.  Should someone fix that, I'd happily revert this patch.

Right, there's a PR for that.  It doesn't mean we should do the wrong thing somewhere else to compensate.




From evan.cheng at apple.com  Wed Apr 14 20:01:55 2010
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 15 Apr 2010 01:01:55 -0000
Subject: [llvm-commits] [llvm] r101325 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
Message-ID: <20100415010155.C647E2A6C12C@llvm.org>

Author: evancheng
Date: Wed Apr 14 20:01:55 2010
New Revision: 101325

URL: http://llvm.org/viewvc/llvm-project?rev=101325&view=rev
Log:
80 col violations.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp?rev=101325&r1=101324&r2=101325&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp Wed Apr 14 20:01:55 2010
@@ -721,7 +721,8 @@
 }
 
 void DAGTypeLegalizer::SetPromotedInteger(SDValue Op, SDValue Result) {
-  assert(Result.getValueType() == TLI.getTypeToTransformTo(*DAG.getContext(), Op.getValueType()) &&
+  assert(Result.getValueType() ==
+         TLI.getTypeToTransformTo(*DAG.getContext(), Op.getValueType()) &&
          "Invalid type for promoted integer");
   AnalyzeNewValue(Result);
 
@@ -731,7 +732,8 @@
 }
 
 void DAGTypeLegalizer::SetSoftenedFloat(SDValue Op, SDValue Result) {
-  assert(Result.getValueType() == TLI.getTypeToTransformTo(*DAG.getContext(), Op.getValueType()) &&
+  assert(Result.getValueType() ==
+         TLI.getTypeToTransformTo(*DAG.getContext(), Op.getValueType()) &&
          "Invalid type for softened float");
   AnalyzeNewValue(Result);
 
@@ -762,7 +764,8 @@
 
 void DAGTypeLegalizer::SetExpandedInteger(SDValue Op, SDValue Lo,
                                           SDValue Hi) {
-  assert(Lo.getValueType() == TLI.getTypeToTransformTo(*DAG.getContext(), Op.getValueType()) &&
+  assert(Lo.getValueType() ==
+         TLI.getTypeToTransformTo(*DAG.getContext(), Op.getValueType()) &&
          Hi.getValueType() == Lo.getValueType() &&
          "Invalid type for expanded integer");
   // Lo/Hi may have been newly allocated, if so, add nodeid's as relevant.
@@ -788,7 +791,8 @@
 
 void DAGTypeLegalizer::SetExpandedFloat(SDValue Op, SDValue Lo,
                                         SDValue Hi) {
-  assert(Lo.getValueType() == TLI.getTypeToTransformTo(*DAG.getContext(), Op.getValueType()) &&
+  assert(Lo.getValueType() ==
+         TLI.getTypeToTransformTo(*DAG.getContext(), Op.getValueType()) &&
          Hi.getValueType() == Lo.getValueType() &&
          "Invalid type for expanded float");
   // Lo/Hi may have been newly allocated, if so, add nodeid's as relevant.
@@ -832,7 +836,8 @@
 }
 
 void DAGTypeLegalizer::SetWidenedVector(SDValue Op, SDValue Result) {
-  assert(Result.getValueType() == TLI.getTypeToTransformTo(*DAG.getContext(), Op.getValueType()) &&
+  assert(Result.getValueType() ==
+         TLI.getTypeToTransformTo(*DAG.getContext(), Op.getValueType()) &&
          "Invalid type for widened vector");
   AnalyzeNewValue(Result);
 
@@ -940,7 +945,8 @@
   } else {
     unsigned NumElements = InVT.getVectorNumElements();
     assert(!(NumElements & 1) && "Splitting vector, but not in half!");
-    LoVT = HiVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(), NumElements/2);
+    LoVT = HiVT = EVT::getVectorVT(*DAG.getContext(),
+                                   InVT.getVectorElementType(), NumElements/2);
   }
 }
 
@@ -980,7 +986,8 @@
   DebugLoc dlLo = Lo.getDebugLoc();
   EVT LVT = Lo.getValueType();
   EVT HVT = Hi.getValueType();
-  EVT NVT = EVT::getIntegerVT(*DAG.getContext(), LVT.getSizeInBits() + HVT.getSizeInBits());
+  EVT NVT = EVT::getIntegerVT(*DAG.getContext(),
+                              LVT.getSizeInBits() + HVT.getSizeInBits());
 
   Lo = DAG.getNode(ISD::ZERO_EXTEND, dlLo, NVT, Lo);
   Hi = DAG.getNode(ISD::ANY_EXTEND, dlHi, NVT, Hi);
@@ -1082,7 +1089,8 @@
 /// type half the size of Op's.
 void DAGTypeLegalizer::SplitInteger(SDValue Op,
                                     SDValue &Lo, SDValue &Hi) {
-  EVT HalfVT = EVT::getIntegerVT(*DAG.getContext(), Op.getValueType().getSizeInBits()/2);
+  EVT HalfVT = EVT::getIntegerVT(*DAG.getContext(),
+                                 Op.getValueType().getSizeInBits()/2);
   SplitInteger(Op, HalfVT, HalfVT, Lo, Hi);
 }
 




From johnny.chen at apple.com  Wed Apr 14 20:20:56 2010
From: johnny.chen at apple.com (Johnny Chen)
Date: Thu, 15 Apr 2010 01:20:56 -0000
Subject: [llvm-commits] [llvm] r101329 - in
 /llvm/trunk/lib/Target/ARM/Disassembler: ARMDisassemblerCore.cpp
 ThumbDisassemblerCore.h
Message-ID: <20100415012056.424B82A6C12C@llvm.org>

Author: johnny
Date: Wed Apr 14 20:20:56 2010
New Revision: 101329

URL: http://llvm.org/viewvc/llvm-project?rev=101329&view=rev
Log:
Wrap the error msgs in DEBUG() macro so that they won't appear in NDEBUG build.

Modified:
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
    llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp?rev=101329&r1=101328&r2=101329&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp Wed Apr 14 20:20:56 2010
@@ -13,8 +13,11 @@
 //
 //===----------------------------------------------------------------------===//
 
+#define DEBUG_TYPE "arm-disassembler"
+
 #include "ARMDisassemblerCore.h"
 #include "ARMAddressingModes.h"
+#include "llvm/Support/Debug.h"
 #include "llvm/Support/raw_ostream.h"
 
 /// ARMGenInstrInfo.inc - ARMGenInstrInfo.inc contains the static const
@@ -346,7 +349,7 @@
     }
     break;
   }
-  errs() << "Invalid (RegClassID, RawRegister) combination\n";
+  DEBUG(errs() << "Invalid (RegClassID, RawRegister) combination\n");
   // Encoding error.  Mark the builder with error code != 0.
   B->SetErr(-1);
   return 0;
@@ -893,7 +896,7 @@
   uint32_t msb = slice(insn, 20, 16);
   uint32_t Val = 0;
   if (msb < lsb) {
-    errs() << "Encoding error: msb < lsb\n";
+    DEBUG(errs() << "Encoding error: msb < lsb\n");
     return false;
   }
 
@@ -1911,7 +1914,7 @@
   ARM_AM::AMSubMode SubMode = getAMSubModeForBits(getPUBits(insn));
   // Must be either "ia" or "db" submode.
   if (SubMode != ARM_AM::ia && SubMode != ARM_AM::db) {
-    errs() << "Illegal addressing mode 5 sub-mode!\n";
+    DEBUG(errs() << "Illegal addressing mode 5 sub-mode!\n");
     return false;
   }
 

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h?rev=101329&r1=101328&r2=101329&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h Wed Apr 14 20:20:56 2010
@@ -1553,7 +1553,7 @@
     MI.addOperand(MCOperand::CreateImm(getLsb(insn)));
     if (Opcode == ARM::t2BFI) {
       if (getMsb(insn) < getLsb(insn)) {
-        errs() << "Encoding error: msb < lsb\n";
+        DEBUG(errs() << "Encoding error: msb < lsb\n");
         return false;
       }
       MI.addOperand(MCOperand::CreateImm(getMsb(insn) - getLsb(insn) + 1));




From evan.cheng at apple.com  Wed Apr 14 20:25:27 2010
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 15 Apr 2010 01:25:27 -0000
Subject: [llvm-commits] [llvm] r101330 - in
 /llvm/trunk/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp
 LegalizeFloatTypes.cpp LegalizeIntegerTypes.cpp LegalizeTypesGeneric.cpp
 LegalizeVectorTypes.cpp
Message-ID: <20100415012527.499C42A6C12C@llvm.org>

Author: evancheng
Date: Wed Apr 14 20:25:27 2010
New Revision: 101330

URL: http://llvm.org/viewvc/llvm-project?rev=101330&view=rev
Log:
More 80 violations.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=101330&r1=101329&r2=101330&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Wed Apr 14 20:25:27 2010
@@ -407,7 +407,9 @@
       // to the final destination using (unaligned) integer loads and stores.
       EVT StoredVT = ST->getMemoryVT();
       EVT RegVT =
-        TLI.getRegisterType(*DAG.getContext(), EVT::getIntegerVT(*DAG.getContext(), StoredVT.getSizeInBits()));
+        TLI.getRegisterType(*DAG.getContext(),
+                            EVT::getIntegerVT(*DAG.getContext(),
+                                              StoredVT.getSizeInBits()));
       unsigned StoredBytes = StoredVT.getSizeInBits() / 8;
       unsigned RegBytes = RegVT.getSizeInBits() / 8;
       unsigned NumRegs = (StoredBytes + RegBytes - 1) / RegBytes;
@@ -443,7 +445,8 @@
       // The last store may be partial.  Do a truncating store.  On big-endian
       // machines this requires an extending load from the stack slot to ensure
       // that the bits are in the right place.
-      EVT MemVT = EVT::getIntegerVT(*DAG.getContext(), 8 * (StoredBytes - Offset));
+      EVT MemVT = EVT::getIntegerVT(*DAG.getContext(),
+                                    8 * (StoredBytes - Offset));
 
       // Load from the stack slot.
       SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, dl, RegVT, Store, StackPtr,
@@ -546,7 +549,8 @@
       }
 
       // The last copy may be partial.  Do an extending load.
-      EVT MemVT = EVT::getIntegerVT(*DAG.getContext(), 8 * (LoadedBytes - Offset));
+      EVT MemVT = EVT::getIntegerVT(*DAG.getContext(),
+                                    8 * (LoadedBytes - Offset));
       SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, dl, RegVT, Chain, Ptr,
                                     LD->getSrcValue(), SVOffset + Offset,
                                     MemVT, LD->isVolatile(),
@@ -1392,7 +1396,8 @@
         // Promote to a byte-sized store with upper bits zero if not
         // storing an integral number of bytes.  For example, promote
         // TRUNCSTORE:i1 X -> TRUNCSTORE:i8 (and X, 1)
-        EVT NVT = EVT::getIntegerVT(*DAG.getContext(), StVT.getStoreSizeInBits());
+        EVT NVT = EVT::getIntegerVT(*DAG.getContext(),
+                                    StVT.getStoreSizeInBits());
         Tmp3 = DAG.getZeroExtendInReg(Tmp3, dl, StVT);
         Result = DAG.getTruncStore(Tmp1, dl, Tmp3, Tmp2, ST->getSrcValue(),
                                    SVOffset, NVT, isVolatile, isNonTemporal,
@@ -1736,8 +1741,8 @@
   unsigned SrcSize = SrcOp.getValueType().getSizeInBits();
   unsigned SlotSize = SlotVT.getSizeInBits();
   unsigned DestSize = DestVT.getSizeInBits();
-  unsigned DestAlign =
-    TLI.getTargetData()->getPrefTypeAlignment(DestVT.getTypeForEVT(*DAG.getContext()));
+  const Type *DestType = DestVT.getTypeForEVT(*DAG.getContext());
+  unsigned DestAlign = TLI.getTargetData()->getPrefTypeAlignment(DestType);
 
   // Emit a store to the stack slot.  Use a truncstore if the input value is
   // later than DestVT.
@@ -2429,7 +2434,7 @@
     // Increment the pointer, VAList, to the next vaarg
     Tmp3 = DAG.getNode(ISD::ADD, dl, TLI.getPointerTy(), VAList,
                        DAG.getConstant(TLI.getTargetData()->
-                                       getTypeAllocSize(VT.getTypeForEVT(*DAG.getContext())),
+                          getTypeAllocSize(VT.getTypeForEVT(*DAG.getContext())),
                                        TLI.getPointerTy()));
     // Store the incremented VAList to the legalized pointer
     Tmp3 = DAG.getStore(VAList.getValue(1), dl, Tmp3, Tmp2, V, 0,

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp?rev=101330&r1=101329&r2=101330&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp Wed Apr 14 20:25:27 2010
@@ -109,14 +109,16 @@
 SDValue DAGTypeLegalizer::SoftenFloatRes_BUILD_PAIR(SDNode *N) {
   // Convert the inputs to integers, and build a new pair out of them.
   return DAG.getNode(ISD::BUILD_PAIR, N->getDebugLoc(),
-                     TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)),
+                     TLI.getTypeToTransformTo(*DAG.getContext(),
+                                              N->getValueType(0)),
                      BitConvertToInteger(N->getOperand(0)),
                      BitConvertToInteger(N->getOperand(1)));
 }
 
 SDValue DAGTypeLegalizer::SoftenFloatRes_ConstantFP(ConstantFPSDNode *N) {
   return DAG.getConstant(N->getValueAPF().bitcastToAPInt(),
-                         TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)));
+                         TLI.getTypeToTransformTo(*DAG.getContext(),
+                                                  N->getValueType(0)));
 }
 
 SDValue DAGTypeLegalizer::SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N) {
@@ -338,7 +340,8 @@
 SDValue DAGTypeLegalizer::SoftenFloatRes_FP16_TO_FP32(SDNode *N) {
   EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
   SDValue Op = N->getOperand(0);
-  return MakeLibCall(RTLIB::FPEXT_F16_F32, NVT, &Op, 1, false, N->getDebugLoc());
+  return MakeLibCall(RTLIB::FPEXT_F16_F32, NVT, &Op, 1, false,
+                     N->getDebugLoc());
 }
 
 SDValue DAGTypeLegalizer::SoftenFloatRes_FP_ROUND(SDNode *N) {
@@ -489,7 +492,8 @@
 }
 
 SDValue DAGTypeLegalizer::SoftenFloatRes_UNDEF(SDNode *N) {
-  return DAG.getUNDEF(TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)));
+  return DAG.getUNDEF(TLI.getTypeToTransformTo(*DAG.getContext(),
+                                               N->getValueType(0)));
 }
 
 SDValue DAGTypeLegalizer::SoftenFloatRes_VAARG(SDNode *N) {
@@ -531,7 +535,8 @@
   // Sign/zero extend the argument if the libcall takes a larger type.
   SDValue Op = DAG.getNode(Signed ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, dl,
                            NVT, N->getOperand(0));
-  return MakeLibCall(LC, TLI.getTypeToTransformTo(*DAG.getContext(), RVT), &Op, 1, false, dl);
+  return MakeLibCall(LC, TLI.getTypeToTransformTo(*DAG.getContext(), RVT),
+                     &Op, 1, false, dl);
 }
 
 
@@ -1403,7 +1408,8 @@
   SDValue Chain = ST->getChain();
   SDValue Ptr = ST->getBasePtr();
 
-  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), ST->getValue().getValueType());
+  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(),
+                                     ST->getValue().getValueType());
   assert(NVT.isByteSized() && "Expanded type not byte sized!");
   assert(ST->getMemoryVT().bitsLE(NVT) && "Float type not round?");
 

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=101330&r1=101329&r2=101330&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Wed Apr 14 20:25:27 2010
@@ -204,7 +204,8 @@
       std::swap(Lo, Hi);
 
     InOp = DAG.getNode(ISD::ANY_EXTEND, dl,
-                       EVT::getIntegerVT(*DAG.getContext(), NOutVT.getSizeInBits()),
+                       EVT::getIntegerVT(*DAG.getContext(),
+                                         NOutVT.getSizeInBits()),
                        JoinIntegers(Lo, Hi));
     return DAG.getNode(ISD::BIT_CONVERT, dl, NOutVT, InOp);
   }
@@ -1968,7 +1969,8 @@
     SplitInteger(Res, Lo, Hi);
     unsigned ExcessBits =
       Op.getValueType().getSizeInBits() - NVT.getSizeInBits();
-    Hi = DAG.getZeroExtendInReg(Hi, dl, EVT::getIntegerVT(*DAG.getContext(), ExcessBits));
+    Hi = DAG.getZeroExtendInReg(Hi, dl,
+                                EVT::getIntegerVT(*DAG.getContext(), ExcessBits));
   }
 }
 
@@ -2269,7 +2271,8 @@
     unsigned EBytes = ExtVT.getStoreSize();
     unsigned IncrementSize = NVT.getSizeInBits()/8;
     unsigned ExcessBits = (EBytes - IncrementSize)*8;
-    EVT HiVT = EVT::getIntegerVT(*DAG.getContext(), ExtVT.getSizeInBits() - ExcessBits);
+    EVT HiVT = EVT::getIntegerVT(*DAG.getContext(),
+                                 ExtVT.getSizeInBits() - ExcessBits);
 
     if (ExcessBits < NVT.getSizeInBits()) {
       // Transfer high bits from the top of Lo to the bottom of Hi.

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp?rev=101330&r1=101329&r2=101330&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp Wed Apr 14 20:25:27 2010
@@ -173,8 +173,9 @@
   EVT NewVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldVT);
 
   SDValue NewVec = DAG.getNode(ISD::BIT_CONVERT, dl,
-                                 EVT::getVectorVT(*DAG.getContext(), NewVT, 2*OldElts),
-                                 OldVec);
+                               EVT::getVectorVT(*DAG.getContext(),
+                                                NewVT, 2*OldElts),
+                               OldVec);
 
   // Extract the elements at 2 * Idx and 2 * Idx + 1 from the new vector.
   SDValue Idx = N->getOperand(1);
@@ -268,7 +269,9 @@
     // is no point, and it might create expansion loops).  For example, on
     // x86 this turns v1i64 = BIT_CONVERT i64 into v1i64 = BIT_CONVERT v2i32.
     EVT OVT = N->getOperand(0).getValueType();
-    EVT NVT = EVT::getVectorVT(*DAG.getContext(), TLI.getTypeToTransformTo(*DAG.getContext(), OVT), 2);
+    EVT NVT = EVT::getVectorVT(*DAG.getContext(),
+                               TLI.getTypeToTransformTo(*DAG.getContext(), OVT),
+                               2);
 
     if (isTypeLegal(NVT)) {
       SDValue Parts[2];
@@ -312,8 +315,9 @@
   }
 
   SDValue NewVec = DAG.getNode(ISD::BUILD_VECTOR, dl,
-                                 EVT::getVectorVT(*DAG.getContext(), NewVT, NewElts.size()),
-                                 &NewElts[0], NewElts.size());
+                               EVT::getVectorVT(*DAG.getContext(),
+                                                NewVT, NewElts.size()),
+                               &NewElts[0], NewElts.size());
 
   // Convert the new vector to the old vector type.
   return DAG.getNode(ISD::BIT_CONVERT, dl, VecVT, NewVec);
@@ -380,7 +384,8 @@
   DebugLoc dl = N->getDebugLoc();
 
   StoreSDNode *St = cast<StoreSDNode>(N);
-  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), St->getValue().getValueType());
+  EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(),
+                                     St->getValue().getValueType());
   SDValue Chain = St->getChain();
   SDValue Ptr = St->getBasePtr();
   int SVOffset = St->getSrcValueOffset();

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp?rev=101330&r1=101329&r2=101330&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp Wed Apr 14 20:25:27 2010
@@ -705,8 +705,9 @@
   // Store the new element.  This may be larger than the vector element type,
   // so use a truncating store.
   SDValue EltPtr = GetVectorElementPointer(StackPtr, EltVT, Idx);
+  const Type *VecType = VecVT.getTypeForEVT(*DAG.getContext());
   unsigned Alignment =
-    TLI.getTargetData()->getPrefTypeAlignment(VecVT.getTypeForEVT(*DAG.getContext()));
+    TLI.getTargetData()->getPrefTypeAlignment(VecType);
   Store = DAG.getTruncStore(Store, dl, Elt, EltPtr, NULL, 0, EltVT,
                             false, false, 0);
 
@@ -1419,7 +1420,8 @@
     ShOp = GetWidenedVector(ShOp);
     ShVT = ShOp.getValueType();
   }
-  EVT ShWidenVT = EVT::getVectorVT(*DAG.getContext(), ShVT.getVectorElementType(),
+  EVT ShWidenVT = EVT::getVectorVT(*DAG.getContext(),
+                                   ShVT.getVectorElementType(),
                                    WidenVT.getVectorNumElements());
   if (ShVT != ShWidenVT)
     ShOp = ModifyToType(ShOp, ShWidenVT);
@@ -1493,7 +1495,8 @@
     unsigned NewNumElts = WidenSize / InSize;
     if (InVT.isVector()) {
       EVT InEltVT = InVT.getVectorElementType();
-      NewInVT= EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenSize / InEltVT.getSizeInBits());
+      NewInVT= EVT::getVectorVT(*DAG.getContext(), InEltVT,
+                                WidenSize / InEltVT.getSizeInBits());
     } else {
       NewInVT = EVT::getVectorVT(*DAG.getContext(), InVT, NewNumElts);
     }
@@ -1617,7 +1620,8 @@
   SDValue RndOp = N->getOperand(3);
   SDValue SatOp = N->getOperand(4);
 
-  EVT      WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
+  EVT      WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),
+                                              N->getValueType(0));
   unsigned WidenNumElts = WidenVT.getVectorNumElements();
 
   EVT InVT = InOp.getValueType();
@@ -1791,7 +1795,8 @@
   EVT CondVT = Cond1.getValueType();
   if (CondVT.isVector()) {
     EVT CondEltVT = CondVT.getVectorElementType();
-    EVT CondWidenVT =  EVT::getVectorVT(*DAG.getContext(), CondEltVT, WidenNumElts);
+    EVT CondWidenVT =  EVT::getVectorVT(*DAG.getContext(),
+                                        CondEltVT, WidenNumElts);
     if (getTypeAction(CondVT) == WidenVector)
       Cond1 = GetWidenedVector(Cond1);
 
@@ -1859,7 +1864,8 @@
   SDValue InOp1 = N->getOperand(0);
   EVT InVT = InOp1.getValueType();
   assert(InVT.isVector() && "can not widen non vector type");
-  EVT WidenInVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(), WidenNumElts);
+  EVT WidenInVT = EVT::getVectorVT(*DAG.getContext(),
+                                   InVT.getVectorElementType(), WidenNumElts);
   InOp1 = GetWidenedVector(InOp1);
   SDValue InOp2 = GetWidenedVector(N->getOperand(1));
 
@@ -2124,7 +2130,7 @@
   // The routines chops the vector into the largest vector loads with the same
   // element type or scalar loads and then recombines it to the widen vector
   // type.
-  EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), LD->getValueType(0));
+  EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0));
   unsigned WidenWidth = WidenVT.getSizeInBits();
   EVT LdVT    = LD->getMemoryVT();
   DebugLoc dl = LD->getDebugLoc();




From echristo at apple.com  Wed Apr 14 20:40:20 2010
From: echristo at apple.com (Eric Christopher)
Date: Thu, 15 Apr 2010 01:40:20 -0000
Subject: [llvm-commits] [llvm] r101331 - in /llvm/trunk/lib/Target/X86:
 X86ISelLowering.cpp X86InstrSSE.td
Message-ID: <20100415014021.204C02A6C12C@llvm.org>

Author: echristo
Date: Wed Apr 14 20:40:20 2010
New Revision: 101331

URL: http://llvm.org/viewvc/llvm-project?rev=101331&view=rev
Log:
Allow lowering for palignr instructions for mmx sized vectors.  Add
patterns to handle the lowering.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/lib/Target/X86/X86InstrSSE.td

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=101331&r1=101330&r2=101331&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Apr 14 20:40:20 2010
@@ -7949,9 +7949,9 @@
 bool
 X86TargetLowering::isShuffleMaskLegal(const SmallVectorImpl<int> &M,
                                       EVT VT) const {
-  // Only do shuffles on 128-bit vector types for now.
+  // Very little shuffling can be done for 64-bit vectors right now.
   if (VT.getSizeInBits() == 64)
-    return false;
+    return isPALIGNRMask(M, VT, Subtarget->hasSSSE3());
 
   // FIXME: pshufb, blends, shifts.
   return (VT.getVectorNumElements() == 2 ||

Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=101331&r1=101330&r2=101331&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Wed Apr 14 20:40:20 2010
@@ -2915,6 +2915,7 @@
                                         int_x86_ssse3_psign_d,
                                         int_x86_ssse3_psign_d_128>;
 
+// palignr patterns.
 let Constraints = "$src1 = $dst" in {
   def PALIGNR64rr  : SS3AI<0x0F, MRMSrcReg, (outs VR64:$dst),
                            (ins VR64:$src1, VR64:$src2, i8imm:$src3),
@@ -2935,7 +2936,6 @@
                            []>, OpSize;
 }
 
-// palignr patterns.
 def : Pat<(int_x86_ssse3_palign_r VR64:$src1, VR64:$src2, (i8 imm:$src3)),
           (PALIGNR64rr VR64:$src1, VR64:$src2, (BYTE_imm imm:$src3))>,
           Requires<[HasSSSE3]>;
@@ -2944,6 +2944,26 @@
                                       (i8 imm:$src3)),
           (PALIGNR64rm VR64:$src1, addr:$src2, (BYTE_imm imm:$src3))>,
           Requires<[HasSSSE3]>;
+def : Pat<(v1i64 (palign:$src3 VR64:$src1, VR64:$src2)),
+          (PALIGNR64rr VR64:$src2, VR64:$src1,
+                       (SHUFFLE_get_palign_imm VR64:$src3))>,
+          Requires<[HasSSSE3]>;
+def : Pat<(v2i32 (palign:$src3 VR64:$src1, VR64:$src2)),
+          (PALIGNR64rr VR64:$src2, VR64:$src1,
+                       (SHUFFLE_get_palign_imm VR64:$src3))>,
+          Requires<[HasSSSE3]>;
+def : Pat<(v2f32 (palign:$src3 VR64:$src1, VR64:$src2)),
+          (PALIGNR64rr VR64:$src2, VR64:$src1,
+                       (SHUFFLE_get_palign_imm VR64:$src3))>,
+          Requires<[HasSSSE3]>;
+def : Pat<(v4i16 (palign:$src3 VR64:$src1, VR64:$src2)),
+          (PALIGNR64rr VR64:$src2, VR64:$src1,
+                       (SHUFFLE_get_palign_imm VR64:$src3))>,
+          Requires<[HasSSSE3]>;
+def : Pat<(v8i8 (palign:$src3 VR64:$src1, VR64:$src2)),
+          (PALIGNR64rr VR64:$src2, VR64:$src1,
+                       (SHUFFLE_get_palign_imm VR64:$src3))>,
+          Requires<[HasSSSE3]>;
 
 def : Pat<(int_x86_ssse3_palign_r_128 VR128:$src1, VR128:$src2, (i8 imm:$src3)),
           (PALIGNR128rr VR128:$src1, VR128:$src2, (BYTE_imm imm:$src3))>,




From clattner at apple.com  Wed Apr 14 20:44:47 2010
From: clattner at apple.com (Chris Lattner)
Date: Wed, 14 Apr 2010 18:44:47 -0700
Subject: [llvm-commits] [llvm] r101290 - in
	/llvm/trunk/lib/Target/ARM/Disassembler: ARMDisassembler.cpp
	ARMDisassemblerCore.cpp ARMDisassemblerCore.h
	ThumbDisassemblerCore.h
In-Reply-To: <A94FA0F5-8CD3-464C-9245-D31F50D020BC@apple.com>
References: <20100414210314.338412A6C12C@llvm.org>
	<2CEC50F4-471E-4B8A-9422-996AF5BC67C7@apple.com>
	<A94FA0F5-8CD3-464C-9245-D31F50D020BC@apple.com>
Message-ID: <4578A9F1-BACB-49B8-854C-9C6FA9D4ACD6@apple.com>


On Apr 14, 2010, at 4:51 PM, Johnny Chen wrote:

> I'll modify so that the error msgs only get put out for DEBUG build.
> Thanks.

Great, thanks!

-Chris


From echristo at apple.com  Wed Apr 14 20:44:18 2010
From: echristo at apple.com (Eric Christopher)
Date: Thu, 15 Apr 2010 01:44:18 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r101333 -
	/llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp
Message-ID: <20100415014418.9C56F2A6C12C@llvm.org>

Author: echristo
Date: Wed Apr 14 20:44:18 2010
New Revision: 101333

URL: http://llvm.org/viewvc/llvm-project?rev=101333&view=rev
Log:
Rewrite palignr and palignr128 handling to use vector shuffle if possible
instead of intrinsic.

Modified:
    llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp

Modified: llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp?rev=101333&r1=101332&r2=101333&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp Wed Apr 14 20:44:18 2010
@@ -607,16 +607,100 @@
     Result = Builder.CreateLoad(Ptr);
     return true;
   }
-  case IX86_BUILTIN_PALIGNR:
+  case IX86_BUILTIN_PALIGNR: {
+    if (ConstantInt *Elt = dyn_cast<ConstantInt>(Ops[2])) {
+
+      // In the header we multiply by 8, correct that back now.
+      unsigned shiftVal = (cast<ConstantInt>(Ops[2])->getZExtValue())/8;
+    
+      // If palignr is shifting the pair of input vectors less than 9 bytes,
+      // emit a shuffle instruction.
+      if (shiftVal <= 8) {
+        const llvm::Type *IntTy = Type::getInt32Ty(Context);
+        const llvm::Type *EltTy = Type::getInt8Ty(Context);
+        const llvm::Type *VecTy = VectorType::get(EltTy, 8);
+        
+        Ops[1] = Builder.CreateBitCast(Ops[1], VecTy);
+        Ops[0] = Builder.CreateBitCast(Ops[0], VecTy);
+
+        SmallVector<Constant*, 8> Indices;
+        for (unsigned i = 0; i != 8; ++i)
+          Indices.push_back(ConstantInt::get(IntTy, shiftVal + i));
+      
+        Value* SV = ConstantVector::get(Indices.begin(), Indices.size());
+        Result = Builder.CreateShuffleVector(Ops[1], Ops[0], SV, "palignr");
+        return true;
+      }
+    
+      // If palignr is shifting the pair of input vectors more than 8 but less
+      // than 16 bytes, emit a logical right shift of the destination.
+      if (shiftVal < 16) {
+        // MMX has these as 1 x i64 vectors for some odd optimization reasons.
+        const llvm::Type *EltTy = Type::getInt64Ty(Context);
+        const llvm::Type *VecTy = VectorType::get(EltTy, 1);
+      
+        Ops[0] = Builder.CreateBitCast(Ops[0], VecTy, "cast");
+        Ops[1] = ConstantInt::get(VecTy, (shiftVal-8) * 8);
+      
+        // create i32 constant
+        Function *F = Intrinsic::getDeclaration(TheModule,
+                                                Intrinsic::x86_mmx_psrl_q);
+        Result = Builder.CreateCall(F, &Ops[0], &Ops[0] + 2, "palignr");
+        return true;
+      }
+    
+      // If palignr is shifting the pair of vectors more than 32 bytes,
+      // emit zero.
+      Result = Constant::getNullValue(ResultType);
+      return true;
+    } else {
+      error("%Hmask must be an immediate", &EXPR_LOCATION(exp));
+      Result = Ops[0];
+      return true;
+    }
+  }
   case IX86_BUILTIN_PALIGNR128: {
     if (ConstantInt *Elt = dyn_cast<ConstantInt>(Ops[2])) {
-      Function *palignr =
-	Intrinsic::getDeclaration(TheModule, FnCode == IX86_BUILTIN_PALIGNR ?
-				  Intrinsic::x86_ssse3_palign_r :
-				  Intrinsic::x86_ssse3_palign_r_128);
-      Value *Op2 = Builder.CreateTrunc(Ops[2], Type::getInt8Ty(Context));
-      Value *CallOps[3] = { Ops[0], Ops[1], Op2 };
-      Result = Builder.CreateCall(palignr, CallOps, CallOps+3);
+      unsigned shiftVal = cast<ConstantInt>(Ops[2])->getZExtValue();
+
+      // If palignr is shifting the pair of input vectors less than 17 bytes,
+      // emit a shuffle instruction.
+      if (shiftVal <= 16) {
+        const llvm::Type *IntTy = Type::getInt32Ty(Context);
+        const llvm::Type *EltTy = Type::getInt8Ty(Context);
+        const llvm::Type *VecTy = VectorType::get(EltTy, 16);
+        
+        Ops[1] = Builder.CreateBitCast(Ops[1], VecTy);
+        Ops[0] = Builder.CreateBitCast(Ops[0], VecTy);
+
+        llvm::SmallVector<Constant*, 16> Indices;
+        for (unsigned i = 0; i != 16; ++i)
+          Indices.push_back(ConstantInt::get(IntTy, shiftVal + i));
+
+        Value* SV = ConstantVector::get(Indices.begin(), Indices.size());
+        Result = Builder.CreateShuffleVector(Ops[1], Ops[0], SV, "palignr");
+        return true;
+      }
+
+      // If palignr is shifting the pair of input vectors more than 16 but less
+      // than 32 bytes, emit a logical right shift of the destination.
+      if (shiftVal < 32) {
+        const llvm::Type *EltTy = Type::getInt64Ty(Context);
+        const llvm::Type *VecTy = VectorType::get(EltTy, 2);
+        const llvm::Type *IntTy = Type::getInt32Ty(Context);
+
+        Ops[0] = Builder.CreateBitCast(Ops[0], VecTy, "cast");
+        Ops[1] = ConstantInt::get(IntTy, (shiftVal-16) * 8);
+
+        // create i32 constant
+        llvm::Function *F = Intrinsic::getDeclaration(TheModule,
+                                                  Intrinsic::x86_sse2_psrl_dq);        
+        Result = Builder.CreateCall(F, &Ops[0], &Ops[0] + 2, "palignr");
+        return true;
+      }
+
+      // If palignr is shifting the pair of vectors more than 32 bytes, emit zero.
+      Result = Constant::getNullValue(ResultType);
       return true;
     } else {
       error("%Hmask must be an immediate", &EXPR_LOCATION(exp));




From gohman at apple.com  Wed Apr 14 20:51:59 2010
From: gohman at apple.com (Dan Gohman)
Date: Thu, 15 Apr 2010 01:51:59 -0000
Subject: [llvm-commits] [llvm] r101334 - in /llvm/trunk:
 include/llvm/CodeGen/ include/llvm/Target/ lib/CodeGen/
 lib/CodeGen/AsmPrinter/ lib/CodeGen/SelectionDAG/ lib/ExecutionEngine/JIT/
 lib/Target/ARM/ lib/Target/ARM/AsmPrinter/ lib/Target/Alpha/
 lib/Target/Blackfin/ lib/Target/CellSPU/ lib/Target/CellSPU/AsmPrinter/
 lib/Target/MBlaze/ lib/Target/MSP430/ lib/Target/Mips/ lib/Target/PIC16/
 lib/Target/PIC16/PIC16Passes/ lib/Target/PowerPC/
 lib/Target/PowerPC/AsmPrinter/ lib/Target/Sparc/ lib/Target/SystemZ/
 lib/Target/X86/ lib/...
Message-ID: <20100415015200.E3CF02A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 20:51:59 2010
New Revision: 101334

URL: http://llvm.org/viewvc/llvm-project?rev=101334&view=rev
Log:
Add const qualifiers to CodeGen's use of LLVM IR constructs.

Modified:
    llvm/trunk/include/llvm/CodeGen/FastISel.h
    llvm/trunk/include/llvm/CodeGen/GCMetadata.h
    llvm/trunk/include/llvm/CodeGen/MachineConstantPool.h
    llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h
    llvm/trunk/include/llvm/CodeGen/MachineModuleInfo.h
    llvm/trunk/include/llvm/CodeGen/MachineOperand.h
    llvm/trunk/include/llvm/CodeGen/SelectionDAG.h
    llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
    llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
    llvm/trunk/include/llvm/Target/TargetLowering.h
    llvm/trunk/lib/CodeGen/AsmPrinter/DwarfException.cpp
    llvm/trunk/lib/CodeGen/IntrinsicLowering.cpp
    llvm/trunk/lib/CodeGen/MachineFunction.cpp
    llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    llvm/trunk/lib/ExecutionEngine/JIT/JITDwarfEmitter.cpp
    llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp
    llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp
    llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
    llvm/trunk/lib/Target/ARM/ARMConstantPoolValue.cpp
    llvm/trunk/lib/Target/ARM/ARMConstantPoolValue.h
    llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
    llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp
    llvm/trunk/lib/Target/ARM/ARMSubtarget.h
    llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
    llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.cpp
    llvm/trunk/lib/Target/ARM/Thumb2RegisterInfo.cpp
    llvm/trunk/lib/Target/Alpha/AlphaCodeEmitter.cpp
    llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp
    llvm/trunk/lib/Target/Blackfin/BlackfinISelLowering.cpp
    llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
    llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
    llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp
    llvm/trunk/lib/Target/MBlaze/MBlazeISelLowering.cpp
    llvm/trunk/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
    llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
    llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp
    llvm/trunk/lib/Target/PIC16/PIC16Passes/PIC16Cloner.cpp
    llvm/trunk/lib/Target/PIC16/PIC16TargetObjectFile.cpp
    llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
    llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp
    llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
    llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp
    llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp
    llvm/trunk/lib/Target/SystemZ/SystemZInstrBuilder.h
    llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
    llvm/trunk/lib/Target/X86/X86FastISel.cpp
    llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/lib/Target/X86/X86ISelLowering.h
    llvm/trunk/lib/Target/X86/X86InstrBuilder.h
    llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
    llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp
    llvm/trunk/lib/Target/XCore/XCoreISelLowering.h

Modified: llvm/trunk/include/llvm/CodeGen/FastISel.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/FastISel.h?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/FastISel.h (original)
+++ llvm/trunk/include/llvm/CodeGen/FastISel.h Wed Apr 14 20:51:59 2010
@@ -87,28 +87,28 @@
   /// LLVM IR instruction, and append generated machine instructions to
   /// the current block. Return true if selection was successful.
   ///
-  bool SelectInstruction(Instruction *I);
+  bool SelectInstruction(const Instruction *I);
 
   /// SelectOperator - Do "fast" instruction selection for the given
   /// LLVM IR operator (Instruction or ConstantExpr), and append
   /// generated machine instructions to the current block. Return true
   /// if selection was successful.
   ///
-  bool SelectOperator(User *I, unsigned Opcode);
+  bool SelectOperator(const User *I, unsigned Opcode);
 
   /// getRegForValue - Create a virtual register and arrange for it to
   /// be assigned the value for the given LLVM value.
-  unsigned getRegForValue(Value *V);
+  unsigned getRegForValue(const Value *V);
 
   /// lookUpRegForValue - Look up the value to see if its value is already
   /// cached in a register. It may be defined by instructions across blocks or
   /// defined locally.
-  unsigned lookUpRegForValue(Value *V);
+  unsigned lookUpRegForValue(const Value *V);
 
   /// getRegForGEPIndex - This is a wrapper around getRegForValue that also
   /// takes care of truncating or sign-extending the given getelementptr
   /// index value.
-  unsigned getRegForGEPIndex(Value *V);
+  unsigned getRegForGEPIndex(const Value *V);
 
   virtual ~FastISel();
 
@@ -128,7 +128,7 @@
   /// fit into FastISel's framework. It returns true if it was successful.
   ///
   virtual bool
-  TargetSelectInstruction(Instruction *I) = 0;
+  TargetSelectInstruction(const Instruction *I) = 0;
 
   /// FastEmit_r - This method is called by target-independent code
   /// to request that an instruction with the given type and opcode
@@ -170,7 +170,7 @@
   virtual unsigned FastEmit_rf(MVT VT,
                                MVT RetVT,
                                unsigned Opcode,
-                               unsigned Op0, ConstantFP *FPImm);
+                               unsigned Op0, const ConstantFP *FPImm);
 
   /// FastEmit_rri - This method is called by target-independent code
   /// to request that an instruction with the given type, opcode, and
@@ -196,7 +196,7 @@
   /// FastEmit_rr instead.
   unsigned FastEmit_rf_(MVT VT,
                         unsigned Opcode,
-                        unsigned Op0, ConstantFP *FPImm,
+                        unsigned Op0, const ConstantFP *FPImm,
                         MVT ImmType);
   
   /// FastEmit_i - This method is called by target-independent code
@@ -213,7 +213,7 @@
   virtual unsigned FastEmit_f(MVT VT,
                               MVT RetVT,
                               unsigned Opcode,
-                              ConstantFP *FPImm);
+                              const ConstantFP *FPImm);
 
   /// FastEmitInst_ - Emit a MachineInstr with no operands and a
   /// result register in the given register class.
@@ -247,7 +247,7 @@
   ///
   unsigned FastEmitInst_rf(unsigned MachineInstOpcode,
                            const TargetRegisterClass *RC,
-                           unsigned Op0, ConstantFP *FPImm);
+                           unsigned Op0, const ConstantFP *FPImm);
 
   /// FastEmitInst_rri - Emit a MachineInstr with two register operands,
   /// an immediate, and a result register in the given register class.
@@ -277,34 +277,34 @@
   /// the CFG.
   void FastEmitBranch(MachineBasicBlock *MBB);
 
-  unsigned UpdateValueMap(Value* I, unsigned Reg);
+  unsigned UpdateValueMap(const Value* I, unsigned Reg);
 
   unsigned createResultReg(const TargetRegisterClass *RC);
   
   /// TargetMaterializeConstant - Emit a constant in a register using 
   /// target-specific logic, such as constant pool loads.
-  virtual unsigned TargetMaterializeConstant(Constant* C) {
+  virtual unsigned TargetMaterializeConstant(const Constant* C) {
     return 0;
   }
 
   /// TargetMaterializeAlloca - Emit an alloca address in a register using
   /// target-specific logic.
-  virtual unsigned TargetMaterializeAlloca(AllocaInst* C) {
+  virtual unsigned TargetMaterializeAlloca(const AllocaInst* C) {
     return 0;
   }
 
 private:
-  bool SelectBinaryOp(User *I, unsigned ISDOpcode);
+  bool SelectBinaryOp(const User *I, unsigned ISDOpcode);
 
-  bool SelectFNeg(User *I);
+  bool SelectFNeg(const User *I);
 
-  bool SelectGetElementPtr(User *I);
+  bool SelectGetElementPtr(const User *I);
 
-  bool SelectCall(User *I);
+  bool SelectCall(const User *I);
 
-  bool SelectBitCast(User *I);
+  bool SelectBitCast(const User *I);
   
-  bool SelectCast(User *I, unsigned Opcode);
+  bool SelectCast(const User *I, unsigned Opcode);
 };
 
 }

Modified: llvm/trunk/include/llvm/CodeGen/GCMetadata.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/GCMetadata.h?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/GCMetadata.h (original)
+++ llvm/trunk/include/llvm/CodeGen/GCMetadata.h Wed Apr 14 20:51:59 2010
@@ -68,9 +68,9 @@
   struct GCRoot {
     int Num;            //< Usually a frame index.
     int StackOffset;    //< Offset from the stack pointer.
-    Constant *Metadata; //< Metadata straight from the call to llvm.gcroot.
+    const Constant *Metadata;//< Metadata straight from the call to llvm.gcroot.
     
-    GCRoot(int N, Constant *MD) : Num(N), StackOffset(-1), Metadata(MD) {}
+    GCRoot(int N, const Constant *MD) : Num(N), StackOffset(-1), Metadata(MD) {}
   };
   
   
@@ -114,7 +114,7 @@
     /// addStackRoot - Registers a root that lives on the stack. Num is the
     ///                stack object ID for the alloca (if the code generator is
     //                 using  MachineFrameInfo).
-    void addStackRoot(int Num, Constant *Metadata) {
+    void addStackRoot(int Num, const Constant *Metadata) {
       Roots.push_back(GCRoot(Num, Metadata));
     }
     

Modified: llvm/trunk/include/llvm/CodeGen/MachineConstantPool.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineConstantPool.h?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineConstantPool.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineConstantPool.h Wed Apr 14 20:51:59 2010
@@ -74,7 +74,7 @@
 public:
   /// The constant itself.
   union {
-    Constant *ConstVal;
+    const Constant *ConstVal;
     MachineConstantPoolValue *MachineCPVal;
   } Val;
 
@@ -82,7 +82,7 @@
   /// a MachineConstantPoolValue.
   unsigned Alignment;
 
-  MachineConstantPoolEntry(Constant *V, unsigned A)
+  MachineConstantPoolEntry(const Constant *V, unsigned A)
     : Alignment(A) {
     Val.ConstVal = V;
   }
@@ -143,7 +143,7 @@
   /// getConstantPoolIndex - Create a new entry in the constant pool or return
   /// an existing one.  User must specify the minimum required alignment for
   /// the object.
-  unsigned getConstantPoolIndex(Constant *C, unsigned Alignment);
+  unsigned getConstantPoolIndex(const Constant *C, unsigned Alignment);
   unsigned getConstantPoolIndex(MachineConstantPoolValue *V,unsigned Alignment);
   
   /// isEmpty - Return true if this constant pool contains no constants.

Modified: llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h Wed Apr 14 20:51:59 2010
@@ -104,7 +104,7 @@
     return *this;
   }
 
-  const MachineInstrBuilder &addGlobalAddress(GlobalValue *GV,
+  const MachineInstrBuilder &addGlobalAddress(const GlobalValue *GV,
                                               int64_t Offset = 0,
                                           unsigned char TargetFlags = 0) const {
     MI->addOperand(MachineOperand::CreateGA(GV, Offset, TargetFlags));

Modified: llvm/trunk/include/llvm/CodeGen/MachineModuleInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineModuleInfo.h?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineModuleInfo.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineModuleInfo.h Wed Apr 14 20:51:59 2010
@@ -82,7 +82,7 @@
   SmallVector<MCSymbol*, 1> BeginLabels; // Labels prior to invoke.
   SmallVector<MCSymbol*, 1> EndLabels;   // Labels after invoke.
   MCSymbol *LandingPadLabel;             // Label at beginning of landing pad.
-  Function *Personality;                 // Personality function.
+  const Function *Personality;           // Personality function.
   std::vector<int> TypeIds;              // List of type ids (filters negative)
 
   explicit LandingPadInfo(MachineBasicBlock *MBB)
@@ -101,7 +101,7 @@
   MCContext Context;
   
   /// TheModule - This is the LLVM Module being worked on.
-  Module *TheModule;
+  const Module *TheModule;
   
   /// ObjFileMMI - This is the object-file-format-specific implementation of
   /// MachineModuleInfoImpl, which lets targets accumulate whatever info they
@@ -125,7 +125,7 @@
 
   // TypeInfos - List of C++ TypeInfo used in the current function.
   //
-  std::vector<GlobalVariable *> TypeInfos;
+  std::vector<const GlobalVariable *> TypeInfos;
 
   // FilterIds - List of typeids encoding filters used in the current function.
   //
@@ -138,7 +138,7 @@
 
   // Personalities - Vector of all personality functions ever seen. Used to emit
   // common EH frames.
-  std::vector<Function *> Personalities;
+  std::vector<const Function *> Personalities;
 
   /// UsedFunctions - The functions in the @llvm.used list in a more easily
   /// searchable format.  This does not include the functions in
@@ -179,8 +179,8 @@
   const MCContext &getContext() const { return Context; }
   MCContext &getContext() { return Context; }
 
-  void setModule(Module *M) { TheModule = M; }
-  Module *getModule() const { return TheModule; }
+  void setModule(const Module *M) { TheModule = M; }
+  const Module *getModule() const { return TheModule; }
   
   /// getInfo - Keep track of various per-function pieces of information for
   /// backends that would like to do so.
@@ -199,7 +199,7 @@
   
   /// AnalyzeModule - Scan the module for global debug information.
   ///
-  void AnalyzeModule(Module &M);
+  void AnalyzeModule(const Module &M);
   
   /// hasDebugInfo - Returns true if valid debug info is present.
   ///
@@ -252,14 +252,15 @@
   
   /// addPersonality - Provide the personality function for the exception
   /// information.
-  void addPersonality(MachineBasicBlock *LandingPad, Function *Personality);
+  void addPersonality(MachineBasicBlock *LandingPad,
+                      const Function *Personality);
 
   /// getPersonalityIndex - Get index of the current personality function inside
   /// Personalitites array
   unsigned getPersonalityIndex() const;
 
   /// getPersonalities - Return array of personality functions ever seen.
-  const std::vector<Function *>& getPersonalities() const {
+  const std::vector<const Function *>& getPersonalities() const {
     return Personalities;
   }
 
@@ -273,12 +274,12 @@
   /// addCatchTypeInfo - Provide the catch typeinfo for a landing pad.
   ///
   void addCatchTypeInfo(MachineBasicBlock *LandingPad,
-                        std::vector<GlobalVariable *> &TyInfo);
+                        std::vector<const GlobalVariable *> &TyInfo);
 
   /// addFilterTypeInfo - Provide the filter typeinfo for a landing pad.
   ///
   void addFilterTypeInfo(MachineBasicBlock *LandingPad,
-                         std::vector<GlobalVariable *> &TyInfo);
+                         std::vector<const GlobalVariable *> &TyInfo);
 
   /// addCleanup - Add a cleanup action for a landing pad.
   ///
@@ -286,7 +287,7 @@
 
   /// getTypeIDFor - Return the type id for the specified typeinfo.  This is 
   /// function wide.
-  unsigned getTypeIDFor(GlobalVariable *TI);
+  unsigned getTypeIDFor(const GlobalVariable *TI);
 
   /// getFilterIDFor - Return the id of the filter encoded by TyIds.  This is
   /// function wide.
@@ -323,7 +324,7 @@
 
   /// getTypeInfos - Return a reference to the C++ typeinfo for the current
   /// function.
-  const std::vector<GlobalVariable *> &getTypeInfos() const {
+  const std::vector<const GlobalVariable *> &getTypeInfos() const {
     return TypeInfos;
   }
 
@@ -335,7 +336,7 @@
 
   /// getPersonality - Return a personality function if available.  The presence
   /// of one is required to emit exception handling info.
-  Function *getPersonality() const;
+  const Function *getPersonality() const;
 
   /// setVariableDbgInfo - Collect information used to emit debugging
   /// information of a variable.

Modified: llvm/trunk/include/llvm/CodeGen/MachineOperand.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineOperand.h?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineOperand.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineOperand.h Wed Apr 14 20:51:59 2010
@@ -117,8 +117,8 @@
       union {
         int Index;                // For MO_*Index - The index itself.
         const char *SymbolName;   // For MO_ExternalSymbol.
-        GlobalValue *GV;          // For MO_GlobalAddress.
-        BlockAddress *BA;         // For MO_BlockAddress.
+        const GlobalValue *GV;    // For MO_GlobalAddress.
+        const BlockAddress *BA;   // For MO_BlockAddress.
       } Val;
       int64_t Offset;             // An offset from the object.
     } OffsetedInfo;
@@ -315,12 +315,12 @@
     return Contents.OffsetedInfo.Val.Index;
   }
   
-  GlobalValue *getGlobal() const {
+  const GlobalValue *getGlobal() const {
     assert(isGlobal() && "Wrong MachineOperand accessor");
     return Contents.OffsetedInfo.Val.GV;
   }
 
-  BlockAddress *getBlockAddress() const {
+  const BlockAddress *getBlockAddress() const {
     assert(isBlockAddress() && "Wrong MachineOperand accessor");
     return Contents.OffsetedInfo.Val.BA;
   }
@@ -457,7 +457,7 @@
     Op.setTargetFlags(TargetFlags);
     return Op;
   }
-  static MachineOperand CreateGA(GlobalValue *GV, int64_t Offset,
+  static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset,
                                  unsigned char TargetFlags = 0) {
     MachineOperand Op(MachineOperand::MO_GlobalAddress);
     Op.Contents.OffsetedInfo.Val.GV = GV;
@@ -473,7 +473,7 @@
     Op.setTargetFlags(TargetFlags);
     return Op;
   }
-  static MachineOperand CreateBA(BlockAddress *BA,
+  static MachineOperand CreateBA(const BlockAddress *BA,
                                  unsigned char TargetFlags = 0) {
     MachineOperand Op(MachineOperand::MO_BlockAddress);
     Op.Contents.OffsetedInfo.Val.BA = BA;

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAG.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAG.h?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAG.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAG.h Wed Apr 14 20:51:59 2010
@@ -350,10 +350,10 @@
   SDValue getTargetJumpTable(int JTI, EVT VT, unsigned char TargetFlags = 0) {
     return getJumpTable(JTI, VT, true, TargetFlags);
   }
-  SDValue getConstantPool(Constant *C, EVT VT,
+  SDValue getConstantPool(const Constant *C, EVT VT,
                           unsigned Align = 0, int Offs = 0, bool isT=false,
                           unsigned char TargetFlags = 0);
-  SDValue getTargetConstantPool(Constant *C, EVT VT,
+  SDValue getTargetConstantPool(const Constant *C, EVT VT,
                                 unsigned Align = 0, int Offset = 0,
                                 unsigned char TargetFlags = 0) {
     return getConstantPool(C, VT, Align, Offset, true, TargetFlags);
@@ -377,7 +377,7 @@
   SDValue getValueType(EVT);
   SDValue getRegister(unsigned Reg, EVT VT);
   SDValue getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label);
-  SDValue getBlockAddress(BlockAddress *BA, EVT VT,
+  SDValue getBlockAddress(const BlockAddress *BA, EVT VT,
                           bool isTarget = false, unsigned char TargetFlags = 0);
 
   SDValue getCopyToReg(SDValue Chain, DebugLoc dl, unsigned Reg, SDValue N) {
@@ -767,7 +767,7 @@
   ///
   SDDbgValue *getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
                           DebugLoc DL, unsigned O);
-  SDDbgValue *getDbgValue(MDNode *MDPtr, Value *C, uint64_t Off,
+  SDDbgValue *getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
                           DebugLoc DL, unsigned O);
   SDDbgValue *getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
                           DebugLoc DL, unsigned O);

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h Wed Apr 14 20:51:59 2010
@@ -279,22 +279,23 @@
                     const SDValue *Ops, unsigned NumOps, unsigned EmitNodeInfo);
   
   void PrepareEHLandingPad(MachineBasicBlock *BB);
-  void SelectAllBasicBlocks(Function &Fn);
+  void SelectAllBasicBlocks(const Function &Fn);
   void FinishBasicBlock();
 
-  void SelectBasicBlock(BasicBlock *LLVMBB,
-                        BasicBlock::iterator Begin,
-                        BasicBlock::iterator End,
+  void SelectBasicBlock(const BasicBlock *LLVMBB,
+                        BasicBlock::const_iterator Begin,
+                        BasicBlock::const_iterator End,
                         bool &HadTailCall);
   void CodeGenAndEmitDAG();
-  void LowerArguments(BasicBlock *BB);
+  void LowerArguments(const BasicBlock *BB);
   
   void ShrinkDemandedOps();
   void ComputeLiveOutVRegInfo();
 
-  void HandlePHINodesInSuccessorBlocks(BasicBlock *LLVMBB);
+  void HandlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB);
 
-  bool HandlePHINodesInSuccessorBlocksFast(BasicBlock *LLVMBB, FastISel *F);
+  bool HandlePHINodesInSuccessorBlocksFast(const BasicBlock *LLVMBB,
+                                           FastISel *F);
 
   /// Create the scheduler. If a specific scheduler was specified
   /// via the SchedulerRegistry, use it, otherwise select the

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Wed Apr 14 20:51:59 2010
@@ -1140,7 +1140,7 @@
 };
 
 class GlobalAddressSDNode : public SDNode {
-  GlobalValue *TheGlobal;
+  const GlobalValue *TheGlobal;
   int64_t Offset;
   unsigned char TargetFlags;
   friend class SelectionDAG;
@@ -1148,7 +1148,7 @@
                       int64_t o, unsigned char TargetFlags);
 public:
 
-  GlobalValue *getGlobal() const { return TheGlobal; }
+  const GlobalValue *getGlobal() const { return TheGlobal; }
   int64_t getOffset() const { return Offset; }
   unsigned char getTargetFlags() const { return TargetFlags; }
   // Return the address space this GlobalAddress belongs to.
@@ -1203,15 +1203,15 @@
 
 class ConstantPoolSDNode : public SDNode {
   union {
-    Constant *ConstVal;
+    const Constant *ConstVal;
     MachineConstantPoolValue *MachineCPVal;
   } Val;
   int Offset;  // It's a MachineConstantPoolValue if top bit is set.
   unsigned Alignment;  // Minimum alignment requirement of CP (not log2 value).
   unsigned char TargetFlags;
   friend class SelectionDAG;
-  ConstantPoolSDNode(bool isTarget, Constant *c, EVT VT, int o, unsigned Align,
-                     unsigned char TF)
+  ConstantPoolSDNode(bool isTarget, const Constant *c, EVT VT, int o,
+                     unsigned Align, unsigned char TF)
     : SDNode(isTarget ? ISD::TargetConstantPool : ISD::ConstantPool,
              DebugLoc(),
              getSDVTList(VT)), Offset(o), Alignment(Align), TargetFlags(TF) {
@@ -1234,7 +1234,7 @@
     return (int)Offset < 0;
   }
 
-  Constant *getConstVal() const {
+  const Constant *getConstVal() const {
     assert(!isMachineConstantPoolEntry() && "Wrong constantpool type");
     return Val.ConstVal;
   }
@@ -1360,16 +1360,16 @@
 };
 
 class BlockAddressSDNode : public SDNode {
-  BlockAddress *BA;
+  const BlockAddress *BA;
   unsigned char TargetFlags;
   friend class SelectionDAG;
-  BlockAddressSDNode(unsigned NodeTy, EVT VT, BlockAddress *ba,
+  BlockAddressSDNode(unsigned NodeTy, EVT VT, const BlockAddress *ba,
                      unsigned char Flags)
     : SDNode(NodeTy, DebugLoc(), getSDVTList(VT)),
              BA(ba), TargetFlags(Flags) {
   }
 public:
-  BlockAddress *getBlockAddress() const { return BA; }
+  const BlockAddress *getBlockAddress() const { return BA; }
   unsigned char getTargetFlags() const { return TargetFlags; }
 
   static bool classof(const BlockAddressSDNode *) { return true; }

Modified: llvm/trunk/include/llvm/Target/TargetLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetLowering.h (original)
+++ llvm/trunk/include/llvm/Target/TargetLowering.h Wed Apr 14 20:51:59 2010
@@ -317,7 +317,7 @@
   };
 
   virtual bool getTgtMemIntrinsic(IntrinsicInfo &Info,
-                                  CallInst &I, unsigned Intrinsic) {
+                                  const CallInst &I, unsigned Intrinsic) {
     return false;
   }
 
@@ -864,7 +864,7 @@
   /// isGAPlusOffset - Returns true (and the GlobalValue and the offset) if the
   /// node is a GlobalAddress + offset.
   virtual bool
-  isGAPlusOffset(SDNode *N, GlobalValue* &GA, int64_t &Offset) const;
+  isGAPlusOffset(SDNode *N, const GlobalValue* &GA, int64_t &Offset) const;
 
   /// PerformDAGCombine - This method will be invoked for all target nodes and
   /// for any target-independent nodes that the target has registered with

Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfException.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfException.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfException.cpp (original)
+++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfException.cpp Wed Apr 14 20:51:59 2010
@@ -425,7 +425,7 @@
 
     if (!MO.isGlobal()) continue;
     
-    Function *F = dyn_cast<Function>(MO.getGlobal());
+    const Function *F = dyn_cast<Function>(MO.getGlobal());
     if (F == 0) continue;
 
     if (SawFunc) {
@@ -579,7 +579,7 @@
 ///  3. Type ID table contains references to all the C++ typeinfo for all
 ///     catches in the function.  This tables is reverse indexed base 1.
 void DwarfException::EmitExceptionTable() {
-  const std::vector<GlobalVariable *> &TypeInfos = MMI->getTypeInfos();
+  const std::vector<const GlobalVariable *> &TypeInfos = MMI->getTypeInfos();
   const std::vector<unsigned> &FilterIds = MMI->getFilterIds();
   const std::vector<LandingPadInfo> &PadInfos = MMI->getLandingPads();
 
@@ -861,7 +861,7 @@
     Asm->OutStreamer.AddComment("-- Catch TypeInfos --");
     Asm->OutStreamer.AddBlankLine();
   }
-  for (std::vector<GlobalVariable *>::const_reverse_iterator
+  for (std::vector<const GlobalVariable *>::const_reverse_iterator
          I = TypeInfos.rbegin(), E = TypeInfos.rend(); I != E; ++I) {
     const GlobalVariable *GV = *I;
 
@@ -896,7 +896,7 @@
   if (!shouldEmitMovesModule && !shouldEmitTableModule)
     return;
 
-  const std::vector<Function *> Personalities = MMI->getPersonalities();
+  const std::vector<const Function *> Personalities = MMI->getPersonalities();
 
   for (unsigned I = 0, E = Personalities.size(); I < E; ++I)
     EmitCIE(Personalities[I], I);

Modified: llvm/trunk/lib/CodeGen/IntrinsicLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/IntrinsicLowering.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/IntrinsicLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/IntrinsicLowering.cpp Wed Apr 14 20:51:59 2010
@@ -331,7 +331,7 @@
   IRBuilder<> Builder(CI->getParent(), CI);
   LLVMContext &Context = CI->getContext();
 
-  Function *Callee = CI->getCalledFunction();
+  const Function *Callee = CI->getCalledFunction();
   assert(Callee && "Cannot lower an indirect call!");
 
   switch (Callee->getIntrinsicID()) {

Modified: llvm/trunk/lib/CodeGen/MachineFunction.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineFunction.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineFunction.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineFunction.cpp Wed Apr 14 20:51:59 2010
@@ -630,7 +630,7 @@
 
 /// CanShareConstantPoolEntry - Test whether the given two constants
 /// can be allocated the same constant pool entry.
-static bool CanShareConstantPoolEntry(Constant *A, Constant *B,
+static bool CanShareConstantPoolEntry(const Constant *A, const Constant *B,
                                       const TargetData *TD) {
   // Handle the trivial case quickly.
   if (A == B) return true;
@@ -645,17 +645,17 @@
 
   // If a floating-point value and an integer value have the same encoding,
   // they can share a constant-pool entry.
-  if (ConstantFP *AFP = dyn_cast<ConstantFP>(A))
-    if (ConstantInt *BI = dyn_cast<ConstantInt>(B))
+  if (const ConstantFP *AFP = dyn_cast<ConstantFP>(A))
+    if (const ConstantInt *BI = dyn_cast<ConstantInt>(B))
       return AFP->getValueAPF().bitcastToAPInt() == BI->getValue();
-  if (ConstantFP *BFP = dyn_cast<ConstantFP>(B))
-    if (ConstantInt *AI = dyn_cast<ConstantInt>(A))
+  if (const ConstantFP *BFP = dyn_cast<ConstantFP>(B))
+    if (const ConstantInt *AI = dyn_cast<ConstantInt>(A))
       return BFP->getValueAPF().bitcastToAPInt() == AI->getValue();
 
   // Two vectors can share an entry if each pair of corresponding
   // elements could.
-  if (ConstantVector *AV = dyn_cast<ConstantVector>(A))
-    if (ConstantVector *BV = dyn_cast<ConstantVector>(B)) {
+  if (const ConstantVector *AV = dyn_cast<ConstantVector>(A))
+    if (const ConstantVector *BV = dyn_cast<ConstantVector>(B)) {
       if (AV->getType()->getNumElements() != BV->getType()->getNumElements())
         return false;
       for (unsigned i = 0, e = AV->getType()->getNumElements(); i != e; ++i)
@@ -674,7 +674,7 @@
 /// an existing one.  User must specify the log2 of the minimum required
 /// alignment for the object.
 ///
-unsigned MachineConstantPool::getConstantPoolIndex(Constant *C, 
+unsigned MachineConstantPool::getConstantPoolIndex(const Constant *C, 
                                                    unsigned Alignment) {
   assert(Alignment && "Alignment must be specified!");
   if (Alignment > PoolAlignment) PoolAlignment = Alignment;

Modified: llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp Wed Apr 14 20:51:59 2010
@@ -315,18 +315,18 @@
 
 /// AnalyzeModule - Scan the module for global debug information.
 ///
-void MachineModuleInfo::AnalyzeModule(Module &M) {
+void MachineModuleInfo::AnalyzeModule(const Module &M) {
   // Insert functions in the llvm.used array (but not llvm.compiler.used) into
   // UsedFunctions.
-  GlobalVariable *GV = M.getGlobalVariable("llvm.used");
+  const GlobalVariable *GV = M.getGlobalVariable("llvm.used");
   if (!GV || !GV->hasInitializer()) return;
 
   // Should be an array of 'i8*'.
-  ConstantArray *InitList = dyn_cast<ConstantArray>(GV->getInitializer());
+  const ConstantArray *InitList = dyn_cast<ConstantArray>(GV->getInitializer());
   if (InitList == 0) return;
 
   for (unsigned i = 0, e = InitList->getNumOperands(); i != e; ++i)
-    if (Function *F =
+    if (const Function *F =
           dyn_cast<Function>(InitList->getOperand(i)->stripPointerCasts()))
       UsedFunctions.insert(F);
 }
@@ -407,7 +407,7 @@
 /// addPersonality - Provide the personality function for the exception
 /// information.
 void MachineModuleInfo::addPersonality(MachineBasicBlock *LandingPad,
-                                       Function *Personality) {
+                                       const Function *Personality) {
   LandingPadInfo &LP = getOrCreateLandingPadInfo(LandingPad);
   LP.Personality = Personality;
 
@@ -426,7 +426,7 @@
 /// addCatchTypeInfo - Provide the catch typeinfo for a landing pad.
 ///
 void MachineModuleInfo::addCatchTypeInfo(MachineBasicBlock *LandingPad,
-                                        std::vector<GlobalVariable *> &TyInfo) {
+                                  std::vector<const GlobalVariable *> &TyInfo) {
   LandingPadInfo &LP = getOrCreateLandingPadInfo(LandingPad);
   for (unsigned N = TyInfo.size(); N; --N)
     LP.TypeIds.push_back(getTypeIDFor(TyInfo[N - 1]));
@@ -435,7 +435,7 @@
 /// addFilterTypeInfo - Provide the filter typeinfo for a landing pad.
 ///
 void MachineModuleInfo::addFilterTypeInfo(MachineBasicBlock *LandingPad,
-                                        std::vector<GlobalVariable *> &TyInfo) {
+                                  std::vector<const GlobalVariable *> &TyInfo) {
   LandingPadInfo &LP = getOrCreateLandingPadInfo(LandingPad);
   std::vector<unsigned> IdsInFilter(TyInfo.size());
   for (unsigned I = 0, E = TyInfo.size(); I != E; ++I)
@@ -492,7 +492,7 @@
 
 /// getTypeIDFor - Return the type id for the specified typeinfo.  This is
 /// function wide.
-unsigned MachineModuleInfo::getTypeIDFor(GlobalVariable *TI) {
+unsigned MachineModuleInfo::getTypeIDFor(const GlobalVariable *TI) {
   for (unsigned i = 0, N = TypeInfos.size(); i != N; ++i)
     if (TypeInfos[i] == TI) return i + 1;
 
@@ -532,7 +532,7 @@
 }
 
 /// getPersonality - Return the personality function for the current function.
-Function *MachineModuleInfo::getPersonality() const {
+const Function *MachineModuleInfo::getPersonality() const {
   // FIXME: Until PR1414 will be fixed, we're using 1 personality function per
   // function
   return !LandingPads.empty() ? LandingPads[0].Personality : NULL;

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Wed Apr 14 20:51:59 2010
@@ -6288,7 +6288,7 @@
 /// FindBaseOffset - Return true if base is a frame index, which is known not
 // to alias with anything but itself.  Provides base object and offset as results.
 static bool FindBaseOffset(SDValue Ptr, SDValue &Base, int64_t &Offset,
-                           GlobalValue *&GV, void *&CV) {
+                           const GlobalValue *&GV, void *&CV) {
   // Assume it is a primitive operation.
   Base = Ptr; Offset = 0; GV = 0; CV = 0;
 
@@ -6336,7 +6336,7 @@
   // Gather base node and offset information.
   SDValue Base1, Base2;
   int64_t Offset1, Offset2;
-  GlobalValue *GV1, *GV2;
+  const GlobalValue *GV1, *GV2;
   void *CV1, *CV2;
   bool isFrameIndex1 = FindBaseOffset(Ptr1, Base1, Offset1, GV1, CV1);
   bool isFrameIndex2 = FindBaseOffset(Ptr2, Base2, Offset2, GV2, CV2);

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp Wed Apr 14 20:51:59 2010
@@ -55,7 +55,7 @@
 #include "FunctionLoweringInfo.h"
 using namespace llvm;
 
-unsigned FastISel::getRegForValue(Value *V) {
+unsigned FastISel::getRegForValue(const Value *V) {
   EVT RealVT = TLI.getValueType(V->getType(), /*AllowUnknown=*/true);
   // Don't handle non-simple values in FastISel.
   if (!RealVT.isSimple())
@@ -83,7 +83,7 @@
   if (Reg != 0)
     return Reg;
 
-  if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
+  if (const ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
     if (CI->getValue().getActiveBits() <= 64)
       Reg = FastEmit_i(VT, VT, ISD::Constant, CI->getZExtValue());
   } else if (isa<AllocaInst>(V)) {
@@ -93,7 +93,7 @@
     // local-CSE'd with actual integer zeros.
     Reg =
       getRegForValue(Constant::getNullValue(TD.getIntPtrType(V->getContext())));
-  } else if (ConstantFP *CF = dyn_cast<ConstantFP>(V)) {
+  } else if (const ConstantFP *CF = dyn_cast<ConstantFP>(V)) {
     // Try to emit the constant directly.
     Reg = FastEmit_f(VT, VT, ISD::ConstantFP, CF);
 
@@ -116,7 +116,7 @@
           Reg = FastEmit_r(IntVT.getSimpleVT(), VT, ISD::SINT_TO_FP, IntegerReg);
       }
     }
-  } else if (Operator *Op = dyn_cast<Operator>(V)) {
+  } else if (const Operator *Op = dyn_cast<Operator>(V)) {
     if (!SelectOperator(Op, Op->getOpcode())) return 0;
     Reg = LocalValueMap[Op];
   } else if (isa<UndefValue>(V)) {
@@ -136,7 +136,7 @@
   return Reg;
 }
 
-unsigned FastISel::lookUpRegForValue(Value *V) {
+unsigned FastISel::lookUpRegForValue(const Value *V) {
   // Look up the value to see if we already have a register for it. We
   // cache values defined by Instructions across blocks, and other values
   // only locally. This is because Instructions already have the SSA
@@ -152,7 +152,7 @@
 /// NOTE: This is only necessary because we might select a block that uses
 /// a value before we select the block that defines the value.  It might be
 /// possible to fix this by selecting blocks in reverse postorder.
-unsigned FastISel::UpdateValueMap(Value* I, unsigned Reg) {
+unsigned FastISel::UpdateValueMap(const Value *I, unsigned Reg) {
   if (!isa<Instruction>(I)) {
     LocalValueMap[I] = Reg;
     return Reg;
@@ -169,7 +169,7 @@
   return AssignedReg;
 }
 
-unsigned FastISel::getRegForGEPIndex(Value *Idx) {
+unsigned FastISel::getRegForGEPIndex(const Value *Idx) {
   unsigned IdxN = getRegForValue(Idx);
   if (IdxN == 0)
     // Unhandled operand. Halt "fast" selection and bail.
@@ -188,7 +188,7 @@
 /// SelectBinaryOp - Select and emit code for a binary operator instruction,
 /// which has an opcode which directly corresponds to the given ISD opcode.
 ///
-bool FastISel::SelectBinaryOp(User *I, unsigned ISDOpcode) {
+bool FastISel::SelectBinaryOp(const User *I, unsigned ISDOpcode) {
   EVT VT = EVT::getEVT(I->getType(), /*HandleUnknown=*/true);
   if (VT == MVT::Other || !VT.isSimple())
     // Unhandled type. Halt "fast" selection and bail.
@@ -254,7 +254,7 @@
   return true;
 }
 
-bool FastISel::SelectGetElementPtr(User *I) {
+bool FastISel::SelectGetElementPtr(const User *I) {
   unsigned N = getRegForValue(I->getOperand(0));
   if (N == 0)
     // Unhandled operand. Halt "fast" selection and bail.
@@ -262,9 +262,9 @@
 
   const Type *Ty = I->getOperand(0)->getType();
   MVT VT = TLI.getPointerTy();
-  for (GetElementPtrInst::op_iterator OI = I->op_begin()+1, E = I->op_end();
-       OI != E; ++OI) {
-    Value *Idx = *OI;
+  for (GetElementPtrInst::const_op_iterator OI = I->op_begin()+1,
+       E = I->op_end(); OI != E; ++OI) {
+    const Value *Idx = *OI;
     if (const StructType *StTy = dyn_cast<StructType>(Ty)) {
       unsigned Field = cast<ConstantInt>(Idx)->getZExtValue();
       if (Field) {
@@ -282,7 +282,7 @@
       Ty = cast<SequentialType>(Ty)->getElementType();
 
       // If this is a constant subscript, handle it quickly.
-      if (ConstantInt *CI = dyn_cast<ConstantInt>(Idx)) {
+      if (const ConstantInt *CI = dyn_cast<ConstantInt>(Idx)) {
         if (CI->getZExtValue() == 0) continue;
         uint64_t Offs = 
           TD.getTypeAllocSize(Ty)*cast<ConstantInt>(CI)->getSExtValue();
@@ -318,8 +318,8 @@
   return true;
 }
 
-bool FastISel::SelectCall(User *I) {
-  Function *F = cast<CallInst>(I)->getCalledFunction();
+bool FastISel::SelectCall(const User *I) {
+  const Function *F = cast<CallInst>(I)->getCalledFunction();
   if (!F) return false;
 
   // Handle selected intrinsic function calls.
@@ -327,17 +327,17 @@
   switch (IID) {
   default: break;
   case Intrinsic::dbg_declare: {
-    DbgDeclareInst *DI = cast<DbgDeclareInst>(I);
+    const DbgDeclareInst *DI = cast<DbgDeclareInst>(I);
     if (!DIDescriptor::ValidDebugInfo(DI->getVariable(), CodeGenOpt::None) ||
         !MF.getMMI().hasDebugInfo())
       return true;
 
-    Value *Address = DI->getAddress();
+    const Value *Address = DI->getAddress();
     if (!Address)
       return true;
     if (isa<UndefValue>(Address))
       return true;
-    AllocaInst *AI = dyn_cast<AllocaInst>(Address);
+    const AllocaInst *AI = dyn_cast<AllocaInst>(Address);
     // Don't handle byval struct arguments or VLAs, for example.
     if (!AI) break;
     DenseMap<const AllocaInst*, int>::iterator SI =
@@ -354,18 +354,18 @@
   }
   case Intrinsic::dbg_value: {
     // This form of DBG_VALUE is target-independent.
-    DbgValueInst *DI = cast<DbgValueInst>(I);
+    const DbgValueInst *DI = cast<DbgValueInst>(I);
     const TargetInstrDesc &II = TII.get(TargetOpcode::DBG_VALUE);
-    Value *V = DI->getValue();
+    const Value *V = DI->getValue();
     if (!V) {
       // Currently the optimizer can produce this; insert an undef to
       // help debugging.  Probably the optimizer should not do this.
       BuildMI(MBB, DL, II).addReg(0U).addImm(DI->getOffset()).
                                      addMetadata(DI->getVariable());
-    } else if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
+    } else if (const ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
       BuildMI(MBB, DL, II).addImm(CI->getZExtValue()).addImm(DI->getOffset()).
                                      addMetadata(DI->getVariable());
-    } else if (ConstantFP *CF = dyn_cast<ConstantFP>(V)) {
+    } else if (const ConstantFP *CF = dyn_cast<ConstantFP>(V)) {
       BuildMI(MBB, DL, II).addFPImm(CF).addImm(DI->getOffset()).
                                      addMetadata(DI->getVariable());
     } else if (unsigned Reg = lookUpRegForValue(V)) {
@@ -448,7 +448,7 @@
   return false;
 }
 
-bool FastISel::SelectCast(User *I, unsigned Opcode) {
+bool FastISel::SelectCast(const User *I, unsigned Opcode) {
   EVT SrcVT = TLI.getValueType(I->getOperand(0)->getType());
   EVT DstVT = TLI.getValueType(I->getType());
     
@@ -500,7 +500,7 @@
   return true;
 }
 
-bool FastISel::SelectBitCast(User *I) {
+bool FastISel::SelectBitCast(const User *I) {
   // If the bitcast doesn't change the type, just use the operand value.
   if (I->getType() == I->getOperand(0)->getType()) {
     unsigned Reg = getRegForValue(I->getOperand(0));
@@ -551,7 +551,7 @@
 }
 
 bool
-FastISel::SelectInstruction(Instruction *I) {
+FastISel::SelectInstruction(const Instruction *I) {
   // First, try doing target-independent selection.
   if (SelectOperator(I, I->getOpcode()))
     return true;
@@ -580,7 +580,7 @@
 /// SelectFNeg - Emit an FNeg operation.
 ///
 bool
-FastISel::SelectFNeg(User *I) {
+FastISel::SelectFNeg(const User *I) {
   unsigned OpReg = getRegForValue(BinaryOperator::getFNegArgument(I));
   if (OpReg == 0) return false;
 
@@ -621,7 +621,7 @@
 }
 
 bool
-FastISel::SelectOperator(User *I, unsigned Opcode) {
+FastISel::SelectOperator(const User *I, unsigned Opcode) {
   switch (Opcode) {
   case Instruction::Add:
     return SelectBinaryOp(I, ISD::ADD);
@@ -667,10 +667,10 @@
     return SelectGetElementPtr(I);
 
   case Instruction::Br: {
-    BranchInst *BI = cast<BranchInst>(I);
+    const BranchInst *BI = cast<BranchInst>(I);
 
     if (BI->isUnconditional()) {
-      BasicBlock *LLVMSucc = BI->getSuccessor(0);
+      const BasicBlock *LLVMSucc = BI->getSuccessor(0);
       MachineBasicBlock *MSucc = MBBMap[LLVMSucc];
       FastEmitBranch(MSucc);
       return true;
@@ -782,7 +782,7 @@
 }
 
 unsigned FastISel::FastEmit_f(MVT, MVT,
-                              unsigned, ConstantFP * /*FPImm*/) {
+                              unsigned, const ConstantFP * /*FPImm*/) {
   return 0;
 }
 
@@ -794,7 +794,7 @@
 
 unsigned FastISel::FastEmit_rf(MVT, MVT,
                                unsigned, unsigned /*Op0*/,
-                               ConstantFP * /*FPImm*/) {
+                               const ConstantFP * /*FPImm*/) {
   return 0;
 }
 
@@ -827,7 +827,7 @@
 /// FastEmit_rf. If that fails, it materializes the immediate into a register
 /// and try FastEmit_rr instead.
 unsigned FastISel::FastEmit_rf_(MVT VT, unsigned Opcode,
-                                unsigned Op0, ConstantFP *FPImm,
+                                unsigned Op0, const ConstantFP *FPImm,
                                 MVT ImmType) {
   // First check if immediate type is legal. If not, we can't use the rf form.
   unsigned ResultReg = FastEmit_rf(VT, VT, Opcode, Op0, FPImm);
@@ -937,7 +937,7 @@
 
 unsigned FastISel::FastEmitInst_rf(unsigned MachineInstOpcode,
                                    const TargetRegisterClass *RC,
-                                   unsigned Op0, ConstantFP *FPImm) {
+                                   unsigned Op0, const ConstantFP *FPImm) {
   unsigned ResultReg = createResultReg(RC);
   const TargetInstrDesc &II = TII.get(MachineInstOpcode);
 

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp Wed Apr 14 20:51:59 2010
@@ -316,7 +316,7 @@
 
   // Gather all the type infos for this landing pad and pass them along to
   // MachineModuleInfo.
-  std::vector<GlobalVariable *> TyInfo;
+  std::vector<const GlobalVariable *> TyInfo;
   unsigned N = I.getNumOperands();
 
   for (unsigned i = N - 1; i > 2; --i) {

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp Wed Apr 14 20:51:59 2010
@@ -531,10 +531,10 @@
       AddOperand(&*MIB, Op, (*MIB).getNumOperands(), &II, VRBaseMap,
                  true /*IsDebug*/);
   } else if (SD->getKind() == SDDbgValue::CONST) {
-    Value *V = SD->getConst();
-    if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
+    const Value *V = SD->getConst();
+    if (const ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
       MIB.addImm(CI->getSExtValue());
-    } else if (ConstantFP *CF = dyn_cast<ConstantFP>(V)) {
+    } else if (const ConstantFP *CF = dyn_cast<ConstantFP>(V)) {
       MIB.addFPImm(CF);
     } else {
       // Could be an Undef.  In any case insert an Undef so we can see what we

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h Wed Apr 14 20:51:59 2010
@@ -41,7 +41,7 @@
       SDNode *Node;         // valid for expressions
       unsigned ResNo;       // valid for expressions
     } s;
-    Value *Const;           // valid for constants
+    const Value *Const;     // valid for constants
     unsigned FrameIx;       // valid for stack objects
   } u;
   MDNode *mdPtr;
@@ -60,7 +60,8 @@
   }
 
   // Constructor for constants.
-  SDDbgValue(MDNode *mdP, Value *C, uint64_t off, DebugLoc dl, unsigned O) : 
+  SDDbgValue(MDNode *mdP, const Value *C, uint64_t off, DebugLoc dl,
+             unsigned O) : 
     mdPtr(mdP), Offset(off), DL(dl), Order(O), Invalid(false) {
     kind = CONST;
     u.Const = C;
@@ -86,7 +87,7 @@
   unsigned getResNo() { assert (kind==SDNODE); return u.s.ResNo; }
 
   // Returns the Value* for a constant
-  Value *getConst() { assert (kind==CONST); return u.Const; }
+  const Value *getConst() { assert (kind==CONST); return u.Const; }
 
   // Returns the FrameIx for a stack object
   unsigned getFrameIx() { assert (kind==FRAMEIX); return u.FrameIx; }

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Wed Apr 14 20:51:59 2010
@@ -1048,7 +1048,7 @@
   return SDValue(N, 0);
 }
 
-SDValue SelectionDAG::getConstantPool(Constant *C, EVT VT,
+SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
                                       unsigned Alignment, int Offset,
                                       bool isTarget,
                                       unsigned char TargetFlags) {
@@ -1319,7 +1319,7 @@
 }
 
 
-SDValue SelectionDAG::getBlockAddress(BlockAddress *BA, EVT VT,
+SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
                                       bool isTarget,
                                       unsigned char TargetFlags) {
   unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
@@ -2270,7 +2270,7 @@
   GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
   if (!GA) return false;
   if (GA->getOffset() != 0) return false;
-  GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
+  const GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
   if (!GV) return false;
   return MF->getMMI().hasDebugInfo();
 }
@@ -3195,7 +3195,7 @@
   if (!G)
     return false;
 
-  GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
+  const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
   if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
     return true;
 
@@ -4935,7 +4935,7 @@
 }
 
 SDDbgValue *
-SelectionDAG::getDbgValue(MDNode *MDPtr, Value *C, uint64_t Off,
+SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
                           DebugLoc DL, unsigned O) {
   return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
 }
@@ -6169,8 +6169,8 @@
       return true;
   }
 
-  GlobalValue *GV1 = NULL;
-  GlobalValue *GV2 = NULL;
+  const GlobalValue *GV1 = NULL;
+  const GlobalValue *GV2 = NULL;
   int64_t Offset1 = 0;
   int64_t Offset2 = 0;
   bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
@@ -6185,14 +6185,14 @@
 /// it cannot be inferred.
 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
   // If this is a GlobalAddress + cst, return the alignment.
-  GlobalValue *GV;
+  const GlobalValue *GV;
   int64_t GVOffset = 0;
   if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
     // If GV has specified alignment, then use it. Otherwise, use the preferred
     // alignment.
     unsigned Align = GV->getAlignment();
     if (!Align) {
-      if (GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) {
+      if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) {
         if (GVar->hasInitializer()) {
           const TargetData *TD = TLI.getTargetData();
           Align = TD->getPreferredAlignment(GVar);

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Wed Apr 14 20:51:59 2010
@@ -613,11 +613,11 @@
     AssignOrderingToNode(Node->getOperand(I).getNode());
 }
 
-void SelectionDAGBuilder::visit(Instruction &I) {
+void SelectionDAGBuilder::visit(const Instruction &I) {
   visit(I.getOpcode(), I);
 }
 
-void SelectionDAGBuilder::visit(unsigned Opcode, User &I) {
+void SelectionDAGBuilder::visit(unsigned Opcode, const User &I) {
   // Note: this doesn't use InstVisitor, because it has to work with
   // ConstantExpr's in addition to instructions.
   switch (Opcode) {
@@ -812,7 +812,7 @@
   }
 }
 
-void SelectionDAGBuilder::visitRet(ReturnInst &I) {
+void SelectionDAGBuilder::visitRet(const ReturnInst &I) {
   SDValue Chain = getControlRoot();
   SmallVector<ISD::OutputArg, 8> Outs;
   FunctionLoweringInfo &FLI = DAG.getFunctionLoweringInfo();
@@ -917,7 +917,7 @@
 /// CopyToExportRegsIfNeeded - If the given value has virtual registers
 /// created for it, emit nodes to copy the value into the virtual
 /// registers.
-void SelectionDAGBuilder::CopyToExportRegsIfNeeded(Value *V) {
+void SelectionDAGBuilder::CopyToExportRegsIfNeeded(const Value *V) {
   if (!V->use_empty()) {
     DenseMap<const Value *, unsigned>::iterator VMI = FuncInfo.ValueMap.find(V);
     if (VMI != FuncInfo.ValueMap.end())
@@ -928,7 +928,7 @@
 /// ExportFromCurrentBlock - If this condition isn't known to be exported from
 /// the current basic block, add it to ValueMap now so that we'll get a
 /// CopyTo/FromReg.
-void SelectionDAGBuilder::ExportFromCurrentBlock(Value *V) {
+void SelectionDAGBuilder::ExportFromCurrentBlock(const Value *V) {
   // No need to export constants.
   if (!isa<Instruction>(V) && !isa<Argument>(V)) return;
 
@@ -939,11 +939,11 @@
   CopyValueToVirtualRegister(V, Reg);
 }
 
-bool SelectionDAGBuilder::isExportableFromCurrentBlock(Value *V,
+bool SelectionDAGBuilder::isExportableFromCurrentBlock(const Value *V,
                                                      const BasicBlock *FromBB) {
   // The operands of the setcc have to be in this block.  We don't know
   // how to export them from some other block.
-  if (Instruction *VI = dyn_cast<Instruction>(V)) {
+  if (const Instruction *VI = dyn_cast<Instruction>(V)) {
     // Can export from current BB.
     if (VI->getParent() == FromBB)
       return true;
@@ -977,7 +977,7 @@
 /// AND operator tree.
 ///
 void
-SelectionDAGBuilder::EmitBranchForMergedCondition(Value *Cond,
+SelectionDAGBuilder::EmitBranchForMergedCondition(const Value *Cond,
                                                   MachineBasicBlock *TBB,
                                                   MachineBasicBlock *FBB,
                                                   MachineBasicBlock *CurBB) {
@@ -985,7 +985,7 @@
 
   // If the leaf of the tree is a comparison, merge the condition into
   // the caseblock.
-  if (CmpInst *BOp = dyn_cast<CmpInst>(Cond)) {
+  if (const CmpInst *BOp = dyn_cast<CmpInst>(Cond)) {
     // The operands of the cmp have to be in this block.  We don't know
     // how to export them from some other block.  If this is the first block
     // of the sequence, no exporting is needed.
@@ -993,9 +993,9 @@
         (isExportableFromCurrentBlock(BOp->getOperand(0), BB) &&
          isExportableFromCurrentBlock(BOp->getOperand(1), BB))) {
       ISD::CondCode Condition;
-      if (ICmpInst *IC = dyn_cast<ICmpInst>(Cond)) {
+      if (const ICmpInst *IC = dyn_cast<ICmpInst>(Cond)) {
         Condition = getICmpCondCode(IC->getPredicate());
-      } else if (FCmpInst *FC = dyn_cast<FCmpInst>(Cond)) {
+      } else if (const FCmpInst *FC = dyn_cast<FCmpInst>(Cond)) {
         Condition = getFCmpCondCode(FC->getPredicate());
       } else {
         Condition = ISD::SETEQ; // silence warning.
@@ -1016,13 +1016,13 @@
 }
 
 /// FindMergedConditions - If Cond is an expression like
-void SelectionDAGBuilder::FindMergedConditions(Value *Cond,
+void SelectionDAGBuilder::FindMergedConditions(const Value *Cond,
                                                MachineBasicBlock *TBB,
                                                MachineBasicBlock *FBB,
                                                MachineBasicBlock *CurBB,
                                                unsigned Opc) {
   // If this node is not part of the or/and tree, emit it as a branch.
-  Instruction *BOp = dyn_cast<Instruction>(Cond);
+  const Instruction *BOp = dyn_cast<Instruction>(Cond);
   if (!BOp || !(isa<BinaryOperator>(BOp) || isa<CmpInst>(BOp)) ||
       (unsigned)BOp->getOpcode() != Opc || !BOp->hasOneUse() ||
       BOp->getParent() != CurBB->getBasicBlock() ||
@@ -1102,7 +1102,7 @@
   return true;
 }
 
-void SelectionDAGBuilder::visitBr(BranchInst &I) {
+void SelectionDAGBuilder::visitBr(const BranchInst &I) {
   // Update machine-CFG edges.
   MachineBasicBlock *Succ0MBB = FuncInfo.MBBMap[I.getSuccessor(0)];
 
@@ -1127,7 +1127,7 @@
 
   // If this condition is one of the special cases we handle, do special stuff
   // now.
-  Value *CondVal = I.getCondition();
+  const Value *CondVal = I.getCondition();
   MachineBasicBlock *Succ1MBB = FuncInfo.MBBMap[I.getSuccessor(1)];
 
   // If this is a series of conditions that are or'd or and'd together, emit
@@ -1145,7 +1145,7 @@
   //     cmp D, E
   //     jle foo
   //
-  if (BinaryOperator *BOp = dyn_cast<BinaryOperator>(CondVal)) {
+  if (const BinaryOperator *BOp = dyn_cast<BinaryOperator>(CondVal)) {
     if (BOp->hasOneUse() &&
         (BOp->getOpcode() == Instruction::And ||
          BOp->getOpcode() == Instruction::Or)) {
@@ -1417,7 +1417,7 @@
   DAG.setRoot(BrAnd);
 }
 
-void SelectionDAGBuilder::visitInvoke(InvokeInst &I) {
+void SelectionDAGBuilder::visitInvoke(const InvokeInst &I) {
   // Retrieve successors.
   MachineBasicBlock *Return = FuncInfo.MBBMap[I.getSuccessor(0)];
   MachineBasicBlock *LandingPad = FuncInfo.MBBMap[I.getSuccessor(1)];
@@ -1442,14 +1442,14 @@
                           DAG.getBasicBlock(Return)));
 }
 
-void SelectionDAGBuilder::visitUnwind(UnwindInst &I) {
+void SelectionDAGBuilder::visitUnwind(const UnwindInst &I) {
 }
 
 /// handleSmallSwitchCaseRange - Emit a series of specific tests (suitable for
 /// small case ranges).
 bool SelectionDAGBuilder::handleSmallSwitchRange(CaseRec& CR,
                                                  CaseRecVector& WorkList,
-                                                 Value* SV,
+                                                 const Value* SV,
                                                  MachineBasicBlock* Default) {
   Case& BackCase  = *(CR.Range.second-1);
 
@@ -1503,7 +1503,7 @@
       FallThrough = Default;
     }
 
-    Value *RHS, *LHS, *MHS;
+    const Value *RHS, *LHS, *MHS;
     ISD::CondCode CC;
     if (I->High == I->Low) {
       // This is just small small case range :) containing exactly 1 case
@@ -1546,7 +1546,7 @@
 /// handleJTSwitchCase - Emit jumptable for current switch case range
 bool SelectionDAGBuilder::handleJTSwitchCase(CaseRec& CR,
                                              CaseRecVector& WorkList,
-                                             Value* SV,
+                                             const Value* SV,
                                              MachineBasicBlock* Default) {
   Case& FrontCase = *CR.Range.first;
   Case& BackCase  = *(CR.Range.second-1);
@@ -1641,7 +1641,7 @@
 /// 2 subtrees.
 bool SelectionDAGBuilder::handleBTSplitSwitchCase(CaseRec& CR,
                                                   CaseRecVector& WorkList,
-                                                  Value* SV,
+                                                  const Value* SV,
                                                   MachineBasicBlock* Default) {
   // Get the MachineFunction which holds the current MBB.  This is used when
   // inserting any additional MBBs necessary to represent the switch.
@@ -1769,7 +1769,7 @@
 /// of masks and emit bit tests with these masks.
 bool SelectionDAGBuilder::handleBitTestsSwitchCase(CaseRec& CR,
                                                    CaseRecVector& WorkList,
-                                                   Value* SV,
+                                                   const Value* SV,
                                                    MachineBasicBlock* Default){
   EVT PTy = TLI.getPointerTy();
   unsigned IntPtrBits = PTy.getSizeInBits();
@@ -1939,7 +1939,7 @@
   return numCmps;
 }
 
-void SelectionDAGBuilder::visitSwitch(SwitchInst &SI) {
+void SelectionDAGBuilder::visitSwitch(const SwitchInst &SI) {
   // Figure out which block is immediately after the current one.
   MachineBasicBlock *NextBlock = 0;
   MachineBasicBlock *Default = FuncInfo.MBBMap[SI.getDefaultDest()];
@@ -1971,7 +1971,7 @@
   // Get the Value to be switched on and default basic blocks, which will be
   // inserted into CaseBlock records, representing basic blocks in the binary
   // search tree.
-  Value *SV = SI.getOperand(0);
+  const Value *SV = SI.getOperand(0);
 
   // Push the initial CaseRec onto the worklist
   CaseRecVector WorkList;
@@ -2002,7 +2002,7 @@
   }
 }
 
-void SelectionDAGBuilder::visitIndirectBr(IndirectBrInst &I) {
+void SelectionDAGBuilder::visitIndirectBr(const IndirectBrInst &I) {
   // Update machine-CFG edges with unique successors.
   SmallVector<BasicBlock*, 32> succs;
   succs.reserve(I.getNumSuccessors());
@@ -2018,7 +2018,7 @@
                           getValue(I.getAddress())));
 }
 
-void SelectionDAGBuilder::visitFSub(User &I) {
+void SelectionDAGBuilder::visitFSub(const User &I) {
   // -0.0 - X --> fneg
   const Type *Ty = I.getType();
   if (Ty->isVectorTy()) {
@@ -2048,14 +2048,14 @@
   visitBinary(I, ISD::FSUB);
 }
 
-void SelectionDAGBuilder::visitBinary(User &I, unsigned OpCode) {
+void SelectionDAGBuilder::visitBinary(const User &I, unsigned OpCode) {
   SDValue Op1 = getValue(I.getOperand(0));
   SDValue Op2 = getValue(I.getOperand(1));
   setValue(&I, DAG.getNode(OpCode, getCurDebugLoc(),
                            Op1.getValueType(), Op1, Op2));
 }
 
-void SelectionDAGBuilder::visitShift(User &I, unsigned Opcode) {
+void SelectionDAGBuilder::visitShift(const User &I, unsigned Opcode) {
   SDValue Op1 = getValue(I.getOperand(0));
   SDValue Op2 = getValue(I.getOperand(1));
   if (!I.getType()->isVectorTy() &&
@@ -2089,11 +2089,11 @@
                            Op1.getValueType(), Op1, Op2));
 }
 
-void SelectionDAGBuilder::visitICmp(User &I) {
+void SelectionDAGBuilder::visitICmp(const User &I) {
   ICmpInst::Predicate predicate = ICmpInst::BAD_ICMP_PREDICATE;
-  if (ICmpInst *IC = dyn_cast<ICmpInst>(&I))
+  if (const ICmpInst *IC = dyn_cast<ICmpInst>(&I))
     predicate = IC->getPredicate();
-  else if (ConstantExpr *IC = dyn_cast<ConstantExpr>(&I))
+  else if (const ConstantExpr *IC = dyn_cast<ConstantExpr>(&I))
     predicate = ICmpInst::Predicate(IC->getPredicate());
   SDValue Op1 = getValue(I.getOperand(0));
   SDValue Op2 = getValue(I.getOperand(1));
@@ -2103,11 +2103,11 @@
   setValue(&I, DAG.getSetCC(getCurDebugLoc(), DestVT, Op1, Op2, Opcode));
 }
 
-void SelectionDAGBuilder::visitFCmp(User &I) {
+void SelectionDAGBuilder::visitFCmp(const User &I) {
   FCmpInst::Predicate predicate = FCmpInst::BAD_FCMP_PREDICATE;
-  if (FCmpInst *FC = dyn_cast<FCmpInst>(&I))
+  if (const FCmpInst *FC = dyn_cast<FCmpInst>(&I))
     predicate = FC->getPredicate();
-  else if (ConstantExpr *FC = dyn_cast<ConstantExpr>(&I))
+  else if (const ConstantExpr *FC = dyn_cast<ConstantExpr>(&I))
     predicate = FCmpInst::Predicate(FC->getPredicate());
   SDValue Op1 = getValue(I.getOperand(0));
   SDValue Op2 = getValue(I.getOperand(1));
@@ -2116,7 +2116,7 @@
   setValue(&I, DAG.getSetCC(getCurDebugLoc(), DestVT, Op1, Op2, Condition));
 }
 
-void SelectionDAGBuilder::visitSelect(User &I) {
+void SelectionDAGBuilder::visitSelect(const User &I) {
   SmallVector<EVT, 4> ValueVTs;
   ComputeValueVTs(TLI, I.getType(), ValueVTs);
   unsigned NumValues = ValueVTs.size();
@@ -2141,14 +2141,14 @@
                            &Values[0], NumValues));
 }
 
-void SelectionDAGBuilder::visitTrunc(User &I) {
+void SelectionDAGBuilder::visitTrunc(const User &I) {
   // TruncInst cannot be a no-op cast because sizeof(src) > sizeof(dest).
   SDValue N = getValue(I.getOperand(0));
   EVT DestVT = TLI.getValueType(I.getType());
   setValue(&I, DAG.getNode(ISD::TRUNCATE, getCurDebugLoc(), DestVT, N));
 }
 
-void SelectionDAGBuilder::visitZExt(User &I) {
+void SelectionDAGBuilder::visitZExt(const User &I) {
   // ZExt cannot be a no-op cast because sizeof(src) < sizeof(dest).
   // ZExt also can't be a cast to bool for same reason. So, nothing much to do
   SDValue N = getValue(I.getOperand(0));
@@ -2156,7 +2156,7 @@
   setValue(&I, DAG.getNode(ISD::ZERO_EXTEND, getCurDebugLoc(), DestVT, N));
 }
 
-void SelectionDAGBuilder::visitSExt(User &I) {
+void SelectionDAGBuilder::visitSExt(const User &I) {
   // SExt cannot be a no-op cast because sizeof(src) < sizeof(dest).
   // SExt also can't be a cast to bool for same reason. So, nothing much to do
   SDValue N = getValue(I.getOperand(0));
@@ -2164,7 +2164,7 @@
   setValue(&I, DAG.getNode(ISD::SIGN_EXTEND, getCurDebugLoc(), DestVT, N));
 }
 
-void SelectionDAGBuilder::visitFPTrunc(User &I) {
+void SelectionDAGBuilder::visitFPTrunc(const User &I) {
   // FPTrunc is never a no-op cast, no need to check
   SDValue N = getValue(I.getOperand(0));
   EVT DestVT = TLI.getValueType(I.getType());
@@ -2172,42 +2172,42 @@
                            DestVT, N, DAG.getIntPtrConstant(0)));
 }
 
-void SelectionDAGBuilder::visitFPExt(User &I){
+void SelectionDAGBuilder::visitFPExt(const User &I){
   // FPTrunc is never a no-op cast, no need to check
   SDValue N = getValue(I.getOperand(0));
   EVT DestVT = TLI.getValueType(I.getType());
   setValue(&I, DAG.getNode(ISD::FP_EXTEND, getCurDebugLoc(), DestVT, N));
 }
 
-void SelectionDAGBuilder::visitFPToUI(User &I) {
+void SelectionDAGBuilder::visitFPToUI(const User &I) {
   // FPToUI is never a no-op cast, no need to check
   SDValue N = getValue(I.getOperand(0));
   EVT DestVT = TLI.getValueType(I.getType());
   setValue(&I, DAG.getNode(ISD::FP_TO_UINT, getCurDebugLoc(), DestVT, N));
 }
 
-void SelectionDAGBuilder::visitFPToSI(User &I) {
+void SelectionDAGBuilder::visitFPToSI(const User &I) {
   // FPToSI is never a no-op cast, no need to check
   SDValue N = getValue(I.getOperand(0));
   EVT DestVT = TLI.getValueType(I.getType());
   setValue(&I, DAG.getNode(ISD::FP_TO_SINT, getCurDebugLoc(), DestVT, N));
 }
 
-void SelectionDAGBuilder::visitUIToFP(User &I) {
+void SelectionDAGBuilder::visitUIToFP(const User &I) {
   // UIToFP is never a no-op cast, no need to check
   SDValue N = getValue(I.getOperand(0));
   EVT DestVT = TLI.getValueType(I.getType());
   setValue(&I, DAG.getNode(ISD::UINT_TO_FP, getCurDebugLoc(), DestVT, N));
 }
 
-void SelectionDAGBuilder::visitSIToFP(User &I){
+void SelectionDAGBuilder::visitSIToFP(const User &I){
   // SIToFP is never a no-op cast, no need to check
   SDValue N = getValue(I.getOperand(0));
   EVT DestVT = TLI.getValueType(I.getType());
   setValue(&I, DAG.getNode(ISD::SINT_TO_FP, getCurDebugLoc(), DestVT, N));
 }
 
-void SelectionDAGBuilder::visitPtrToInt(User &I) {
+void SelectionDAGBuilder::visitPtrToInt(const User &I) {
   // What to do depends on the size of the integer and the size of the pointer.
   // We can either truncate, zero extend, or no-op, accordingly.
   SDValue N = getValue(I.getOperand(0));
@@ -2216,7 +2216,7 @@
   setValue(&I, DAG.getZExtOrTrunc(N, getCurDebugLoc(), DestVT));
 }
 
-void SelectionDAGBuilder::visitIntToPtr(User &I) {
+void SelectionDAGBuilder::visitIntToPtr(const User &I) {
   // What to do depends on the size of the integer and the size of the pointer.
   // We can either truncate, zero extend, or no-op, accordingly.
   SDValue N = getValue(I.getOperand(0));
@@ -2225,7 +2225,7 @@
   setValue(&I, DAG.getZExtOrTrunc(N, getCurDebugLoc(), DestVT));
 }
 
-void SelectionDAGBuilder::visitBitCast(User &I) {
+void SelectionDAGBuilder::visitBitCast(const User &I) {
   SDValue N = getValue(I.getOperand(0));
   EVT DestVT = TLI.getValueType(I.getType());
 
@@ -2238,7 +2238,7 @@
     setValue(&I, N);            // noop cast.
 }
 
-void SelectionDAGBuilder::visitInsertElement(User &I) {
+void SelectionDAGBuilder::visitInsertElement(const User &I) {
   SDValue InVec = getValue(I.getOperand(0));
   SDValue InVal = getValue(I.getOperand(1));
   SDValue InIdx = DAG.getNode(ISD::ZERO_EXTEND, getCurDebugLoc(),
@@ -2249,7 +2249,7 @@
                            InVec, InVal, InIdx));
 }
 
-void SelectionDAGBuilder::visitExtractElement(User &I) {
+void SelectionDAGBuilder::visitExtractElement(const User &I) {
   SDValue InVec = getValue(I.getOperand(0));
   SDValue InIdx = DAG.getNode(ISD::ZERO_EXTEND, getCurDebugLoc(),
                               TLI.getPointerTy(),
@@ -2268,7 +2268,7 @@
   return true;
 }
 
-void SelectionDAGBuilder::visitShuffleVector(User &I) {
+void SelectionDAGBuilder::visitShuffleVector(const User &I) {
   SmallVector<int, 8> Mask;
   SDValue Src1 = getValue(I.getOperand(0));
   SDValue Src2 = getValue(I.getOperand(1));
@@ -2449,7 +2449,7 @@
                            VT, &Ops[0], Ops.size()));
 }
 
-void SelectionDAGBuilder::visitInsertValue(InsertValueInst &I) {
+void SelectionDAGBuilder::visitInsertValue(const InsertValueInst &I) {
   const Value *Op0 = I.getOperand(0);
   const Value *Op1 = I.getOperand(1);
   const Type *AggTy = I.getType();
@@ -2490,7 +2490,7 @@
                            &Values[0], NumAggValues));
 }
 
-void SelectionDAGBuilder::visitExtractValue(ExtractValueInst &I) {
+void SelectionDAGBuilder::visitExtractValue(const ExtractValueInst &I) {
   const Value *Op0 = I.getOperand(0);
   const Type *AggTy = Op0->getType();
   const Type *ValTy = I.getType();
@@ -2518,13 +2518,13 @@
                            &Values[0], NumValValues));
 }
 
-void SelectionDAGBuilder::visitGetElementPtr(User &I) {
+void SelectionDAGBuilder::visitGetElementPtr(const User &I) {
   SDValue N = getValue(I.getOperand(0));
   const Type *Ty = I.getOperand(0)->getType();
 
-  for (GetElementPtrInst::op_iterator OI = I.op_begin()+1, E = I.op_end();
+  for (GetElementPtrInst::const_op_iterator OI = I.op_begin()+1, E = I.op_end();
        OI != E; ++OI) {
-    Value *Idx = *OI;
+    const Value *Idx = *OI;
     if (const StructType *StTy = dyn_cast<StructType>(Ty)) {
       unsigned Field = cast<ConstantInt>(Idx)->getZExtValue();
       if (Field) {
@@ -2544,7 +2544,7 @@
       Ty = cast<SequentialType>(Ty)->getElementType();
 
       // If this is a constant subscript, handle it quickly.
-      if (ConstantInt *CI = dyn_cast<ConstantInt>(Idx)) {
+      if (const ConstantInt *CI = dyn_cast<ConstantInt>(Idx)) {
         if (CI->getZExtValue() == 0) continue;
         uint64_t Offs =
             TD->getTypeAllocSize(Ty)*cast<ConstantInt>(CI)->getSExtValue();
@@ -2595,7 +2595,7 @@
   setValue(&I, N);
 }
 
-void SelectionDAGBuilder::visitAlloca(AllocaInst &I) {
+void SelectionDAGBuilder::visitAlloca(const AllocaInst &I) {
   // If this is a fixed sized alloca in the entry block of the function,
   // allocate it statically on the stack.
   if (FuncInfo.StaticAllocaMap.count(&I))
@@ -2647,7 +2647,7 @@
   FuncInfo.MF->getFrameInfo()->CreateVariableSizedObject();
 }
 
-void SelectionDAGBuilder::visitLoad(LoadInst &I) {
+void SelectionDAGBuilder::visitLoad(const LoadInst &I) {
   const Value *SV = I.getOperand(0);
   SDValue Ptr = getValue(SV);
 
@@ -2707,9 +2707,9 @@
                            &Values[0], NumValues));
 }
 
-void SelectionDAGBuilder::visitStore(StoreInst &I) {
-  Value *SrcV = I.getOperand(0);
-  Value *PtrV = I.getOperand(1);
+void SelectionDAGBuilder::visitStore(const StoreInst &I) {
+  const Value *SrcV = I.getOperand(0);
+  const Value *PtrV = I.getOperand(1);
 
   SmallVector<EVT, 4> ValueVTs;
   SmallVector<uint64_t, 4> Offsets;
@@ -2746,7 +2746,7 @@
 
 /// visitTargetIntrinsic - Lower a call of a target intrinsic to an INTRINSIC
 /// node.
-void SelectionDAGBuilder::visitTargetIntrinsic(CallInst &I,
+void SelectionDAGBuilder::visitTargetIntrinsic(const CallInst &I,
                                                unsigned Intrinsic) {
   bool HasChain = !I.doesNotAccessMemory();
   bool OnlyLoad = HasChain && I.onlyReadsMemory();
@@ -2872,7 +2872,8 @@
 /// visitIntrinsicCall: I is a call instruction
 ///                     Op is the associated NodeType for I
 const char *
-SelectionDAGBuilder::implVisitBinaryAtomic(CallInst& I, ISD::NodeType Op) {
+SelectionDAGBuilder::implVisitBinaryAtomic(const CallInst& I,
+                                           ISD::NodeType Op) {
   SDValue Root = getRoot();
   SDValue L =
     DAG.getAtomic(Op, getCurDebugLoc(),
@@ -2888,7 +2889,7 @@
 
 // implVisitAluOverflow - Lower arithmetic overflow instrinsics.
 const char *
-SelectionDAGBuilder::implVisitAluOverflow(CallInst &I, ISD::NodeType Op) {
+SelectionDAGBuilder::implVisitAluOverflow(const CallInst &I, ISD::NodeType Op) {
   SDValue Op1 = getValue(I.getOperand(1));
   SDValue Op2 = getValue(I.getOperand(2));
 
@@ -2900,7 +2901,7 @@
 /// visitExp - Lower an exp intrinsic. Handles the special sequences for
 /// limited-precision mode.
 void
-SelectionDAGBuilder::visitExp(CallInst &I) {
+SelectionDAGBuilder::visitExp(const CallInst &I) {
   SDValue result;
   DebugLoc dl = getCurDebugLoc();
 
@@ -3026,7 +3027,7 @@
 /// visitLog - Lower a log intrinsic. Handles the special sequences for
 /// limited-precision mode.
 void
-SelectionDAGBuilder::visitLog(CallInst &I) {
+SelectionDAGBuilder::visitLog(const CallInst &I) {
   SDValue result;
   DebugLoc dl = getCurDebugLoc();
 
@@ -3136,7 +3137,7 @@
 /// visitLog2 - Lower a log2 intrinsic. Handles the special sequences for
 /// limited-precision mode.
 void
-SelectionDAGBuilder::visitLog2(CallInst &I) {
+SelectionDAGBuilder::visitLog2(const CallInst &I) {
   SDValue result;
   DebugLoc dl = getCurDebugLoc();
 
@@ -3245,7 +3246,7 @@
 /// visitLog10 - Lower a log10 intrinsic. Handles the special sequences for
 /// limited-precision mode.
 void
-SelectionDAGBuilder::visitLog10(CallInst &I) {
+SelectionDAGBuilder::visitLog10(const CallInst &I) {
   SDValue result;
   DebugLoc dl = getCurDebugLoc();
 
@@ -3347,7 +3348,7 @@
 /// visitExp2 - Lower an exp2 intrinsic. Handles the special sequences for
 /// limited-precision mode.
 void
-SelectionDAGBuilder::visitExp2(CallInst &I) {
+SelectionDAGBuilder::visitExp2(const CallInst &I) {
   SDValue result;
   DebugLoc dl = getCurDebugLoc();
 
@@ -3461,9 +3462,9 @@
 /// visitPow - Lower a pow intrinsic. Handles the special sequences for
 /// limited-precision mode with x == 10.0f.
 void
-SelectionDAGBuilder::visitPow(CallInst &I) {
+SelectionDAGBuilder::visitPow(const CallInst &I) {
   SDValue result;
-  Value *Val = I.getOperand(1);
+  const Value *Val = I.getOperand(1);
   DebugLoc dl = getCurDebugLoc();
   bool IsExp10 = false;
 
@@ -3650,7 +3651,7 @@
 /// we want to emit this as a call to a named external function, return the name
 /// otherwise lower it and return null.
 const char *
-SelectionDAGBuilder::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) {
+SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, unsigned Intrinsic) {
   DebugLoc dl = getCurDebugLoc();
   SDValue Res;
 
@@ -3742,17 +3743,17 @@
     if (OptLevel != CodeGenOpt::None)
       // FIXME: Variable debug info is not supported here.
       return 0;
-    DbgDeclareInst &DI = cast<DbgDeclareInst>(I);
+    const DbgDeclareInst &DI = cast<DbgDeclareInst>(I);
     if (!DIDescriptor::ValidDebugInfo(DI.getVariable(), CodeGenOpt::None))
       return 0;
 
     MDNode *Variable = DI.getVariable();
-    Value *Address = DI.getAddress();
+    const Value *Address = DI.getAddress();
     if (!Address)
       return 0;
-    if (BitCastInst *BCI = dyn_cast<BitCastInst>(Address))
+    if (const BitCastInst *BCI = dyn_cast<BitCastInst>(Address))
       Address = BCI->getOperand(0);
-    AllocaInst *AI = dyn_cast<AllocaInst>(Address);
+    const AllocaInst *AI = dyn_cast<AllocaInst>(Address);
     // Don't handle byval struct arguments or VLAs, for example.
     if (!AI)
       return 0;
@@ -3768,13 +3769,13 @@
     return 0;
   }
   case Intrinsic::dbg_value: {
-    DbgValueInst &DI = cast<DbgValueInst>(I);
+    const DbgValueInst &DI = cast<DbgValueInst>(I);
     if (!DIDescriptor::ValidDebugInfo(DI.getVariable(), CodeGenOpt::None))
       return 0;
 
     MDNode *Variable = DI.getVariable();
     uint64_t Offset = DI.getOffset();
-    Value *V = DI.getValue();
+    const Value *V = DI.getValue();
     if (!V)
       return 0;
 
@@ -3800,9 +3801,9 @@
     }
 
     // Build a debug info table entry.
-    if (BitCastInst *BCI = dyn_cast<BitCastInst>(V))
+    if (const BitCastInst *BCI = dyn_cast<BitCastInst>(V))
       V = BCI->getOperand(0);
-    AllocaInst *AI = dyn_cast<AllocaInst>(V);
+    const AllocaInst *AI = dyn_cast<AllocaInst>(V);
     // Don't handle byval struct arguments or VLAs, for example.
     if (!AI)
       return 0;
@@ -3922,7 +3923,7 @@
     case Intrinsic::convertuu:  Code = ISD::CVT_UU; break;
     }
     EVT DestVT = TLI.getValueType(I.getType());
-    Value *Op1 = I.getOperand(1);
+    const Value *Op1 = I.getOperand(1);
     Res = DAG.getConvertRndSat(DestVT, getCurDebugLoc(), getValue(Op1),
                                DAG.getValueType(DestVT),
                                DAG.getValueType(getValue(Op1).getValueType()),
@@ -4091,8 +4092,8 @@
   }
   case Intrinsic::gcroot:
     if (GFI) {
-      Value *Alloca = I.getOperand(1);
-      Constant *TypeMap = cast<Constant>(I.getOperand(2));
+      const Value *Alloca = I.getOperand(1);
+      const Constant *TypeMap = cast<Constant>(I.getOperand(2));
 
       FrameIndexSDNode *FI = cast<FrameIndexSDNode>(getValue(Alloca).getNode());
       GFI->addStackRoot(FI->getIndex(), TypeMap);
@@ -4196,7 +4197,7 @@
 ///
 /// This function only tests target-independent requirements.
 static bool
-isInTailCallPosition(CallSite CS, Attributes CalleeRetAttr,
+isInTailCallPosition(ImmutableCallSite CS, Attributes CalleeRetAttr,
                      const TargetLowering &TLI) {
   const Instruction *I = CS.getInstruction();
   const BasicBlock *ExitBB = I->getParent();
@@ -4275,7 +4276,7 @@
   return true;
 }
 
-void SelectionDAGBuilder::LowerCallTo(CallSite CS, SDValue Callee,
+void SelectionDAGBuilder::LowerCallTo(ImmutableCallSite CS, SDValue Callee,
                                       bool isTailCall,
                                       MachineBasicBlock *LandingPad) {
   const PointerType *PT = cast<PointerType>(CS.getCalledValue()->getType());
@@ -4323,7 +4324,7 @@
     RetTy = Type::getVoidTy(FTy->getContext());
   }
 
-  for (CallSite::arg_iterator i = CS.arg_begin(), e = CS.arg_end();
+  for (ImmutableCallSite::arg_iterator i = CS.arg_begin(), e = CS.arg_end();
        i != e; ++i) {
     SDValue ArgNode = getValue(*i);
     Entry.Node = ArgNode; Entry.Ty = (*i)->getType();
@@ -4454,12 +4455,12 @@
 
 /// IsOnlyUsedInZeroEqualityComparison - Return true if it only matters that the
 /// value is equal or not-equal to zero.
-static bool IsOnlyUsedInZeroEqualityComparison(Value *V) {
-  for (Value::use_iterator UI = V->use_begin(), E = V->use_end();
+static bool IsOnlyUsedInZeroEqualityComparison(const Value *V) {
+  for (Value::const_use_iterator UI = V->use_begin(), E = V->use_end();
        UI != E; ++UI) {
-    if (ICmpInst *IC = dyn_cast<ICmpInst>(*UI))
+    if (const ICmpInst *IC = dyn_cast<ICmpInst>(*UI))
       if (IC->isEquality())
-        if (Constant *C = dyn_cast<Constant>(IC->getOperand(1)))
+        if (const Constant *C = dyn_cast<Constant>(IC->getOperand(1)))
           if (C->isNullValue())
             continue;
     // Unknown instruction.
@@ -4468,17 +4469,20 @@
   return true;
 }
 
-static SDValue getMemCmpLoad(Value *PtrVal, MVT LoadVT, const Type *LoadTy,
+static SDValue getMemCmpLoad(const Value *PtrVal, MVT LoadVT,
+                             const Type *LoadTy,
                              SelectionDAGBuilder &Builder) {
 
   // Check to see if this load can be trivially constant folded, e.g. if the
   // input is from a string literal.
-  if (Constant *LoadInput = dyn_cast<Constant>(PtrVal)) {
+  if (const Constant *LoadInput = dyn_cast<Constant>(PtrVal)) {
     // Cast pointer to the type we really want to load.
-    LoadInput = ConstantExpr::getBitCast(LoadInput,
+    LoadInput = ConstantExpr::getBitCast(const_cast<Constant *>(LoadInput),
                                          PointerType::getUnqual(LoadTy));
 
-    if (Constant *LoadCst = ConstantFoldLoadFromConstPtr(LoadInput, Builder.TD))
+    if (const Constant *LoadCst =
+          ConstantFoldLoadFromConstPtr(const_cast<Constant *>(LoadInput),
+                                       Builder.TD))
       return Builder.getValue(LoadCst);
   }
 
@@ -4511,18 +4515,18 @@
 /// visitMemCmpCall - See if we can lower a call to memcmp in an optimized form.
 /// If so, return true and lower it, otherwise return false and it will be
 /// lowered like a normal call.
-bool SelectionDAGBuilder::visitMemCmpCall(CallInst &I) {
+bool SelectionDAGBuilder::visitMemCmpCall(const CallInst &I) {
   // Verify that the prototype makes sense.  int memcmp(void*,void*,size_t)
   if (I.getNumOperands() != 4)
     return false;
 
-  Value *LHS = I.getOperand(1), *RHS = I.getOperand(2);
+  const Value *LHS = I.getOperand(1), *RHS = I.getOperand(2);
   if (!LHS->getType()->isPointerTy() || !RHS->getType()->isPointerTy() ||
       !I.getOperand(3)->getType()->isIntegerTy() ||
       !I.getType()->isIntegerTy())
     return false;
 
-  ConstantInt *Size = dyn_cast<ConstantInt>(I.getOperand(3));
+  const ConstantInt *Size = dyn_cast<ConstantInt>(I.getOperand(3));
 
   // memcmp(S1,S2,2) != 0 -> (*(short*)LHS != *(short*)RHS)  != 0
   // memcmp(S1,S2,4) != 0 -> (*(int*)LHS != *(int*)RHS)  != 0
@@ -4588,7 +4592,7 @@
 }
 
 
-void SelectionDAGBuilder::visitCall(CallInst &I) {
+void SelectionDAGBuilder::visitCall(const CallInst &I) {
   const char *RenameFn = 0;
   if (Function *F = I.getCalledFunction()) {
     if (F->isDeclaration()) {
@@ -5160,8 +5164,8 @@
 
 /// visitInlineAsm - Handle a call to an InlineAsm object.
 ///
-void SelectionDAGBuilder::visitInlineAsm(CallSite CS) {
-  InlineAsm *IA = cast<InlineAsm>(CS.getCalledValue());
+void SelectionDAGBuilder::visitInlineAsm(ImmutableCallSite CS) {
+  const InlineAsm *IA = cast<InlineAsm>(CS.getCalledValue());
 
   /// ConstraintOperands - Information about all of the constraints.
   std::vector<SDISelAsmOperandInfo> ConstraintOperands;
@@ -5197,7 +5201,7 @@
     case InlineAsm::isOutput:
       // Indirect outputs just consume an argument.
       if (OpInfo.isIndirect) {
-        OpInfo.CallOperandVal = CS.getArgument(ArgNo++);
+        OpInfo.CallOperandVal = const_cast<Value *>(CS.getArgument(ArgNo++));
         break;
       }
 
@@ -5214,7 +5218,7 @@
       ++ResNo;
       break;
     case InlineAsm::isInput:
-      OpInfo.CallOperandVal = CS.getArgument(ArgNo++);
+      OpInfo.CallOperandVal = const_cast<Value *>(CS.getArgument(ArgNo++));
       break;
     case InlineAsm::isClobber:
       // Nothing to do.
@@ -5227,7 +5231,7 @@
       // Strip bitcasts, if any.  This mostly comes up for functions.
       OpInfo.CallOperandVal = OpInfo.CallOperandVal->stripPointerCasts();
 
-      if (BasicBlock *BB = dyn_cast<BasicBlock>(OpInfo.CallOperandVal)) {
+      if (const BasicBlock *BB = dyn_cast<BasicBlock>(OpInfo.CallOperandVal)) {
         OpInfo.CallOperand = DAG.getBasicBlock(FuncInfo.MBBMap[BB]);
       } else {
         OpInfo.CallOperand = getValue(OpInfo.CallOperandVal);
@@ -5280,7 +5284,7 @@
 
       // If the operand is a float, integer, or vector constant, spill to a
       // constant pool entry to get its address.
-      Value *OpVal = OpInfo.CallOperandVal;
+      const Value *OpVal = OpInfo.CallOperandVal;
       if (isa<ConstantFP>(OpVal) || isa<ConstantInt>(OpVal) ||
           isa<ConstantVector>(OpVal)) {
         OpInfo.CallOperand = DAG.getConstantPool(cast<Constant>(OpVal),
@@ -5572,17 +5576,16 @@
       return;
   }
 
-  std::vector<std::pair<SDValue, Value*> > StoresToEmit;
+  std::vector<std::pair<SDValue, const Value *> > StoresToEmit;
 
   // Process indirect outputs, first output all of the flagged copies out of
   // physregs.
   for (unsigned i = 0, e = IndirectStoresToEmit.size(); i != e; ++i) {
     RegsForValue &OutRegs = IndirectStoresToEmit[i].first;
-    Value *Ptr = IndirectStoresToEmit[i].second;
+    const Value *Ptr = IndirectStoresToEmit[i].second;
     SDValue OutVal = OutRegs.getCopyFromRegs(DAG, getCurDebugLoc(),
                                              Chain, &Flag);
     StoresToEmit.push_back(std::make_pair(OutVal, Ptr));
-
   }
 
   // Emit the non-flagged stores from the physregs.
@@ -5603,14 +5606,14 @@
   DAG.setRoot(Chain);
 }
 
-void SelectionDAGBuilder::visitVAStart(CallInst &I) {
+void SelectionDAGBuilder::visitVAStart(const CallInst &I) {
   DAG.setRoot(DAG.getNode(ISD::VASTART, getCurDebugLoc(),
                           MVT::Other, getRoot(),
                           getValue(I.getOperand(1)),
                           DAG.getSrcValue(I.getOperand(1))));
 }
 
-void SelectionDAGBuilder::visitVAArg(VAArgInst &I) {
+void SelectionDAGBuilder::visitVAArg(const VAArgInst &I) {
   SDValue V = DAG.getVAArg(TLI.getValueType(I.getType()), getCurDebugLoc(),
                            getRoot(), getValue(I.getOperand(0)),
                            DAG.getSrcValue(I.getOperand(0)));
@@ -5618,14 +5621,14 @@
   DAG.setRoot(V.getValue(1));
 }
 
-void SelectionDAGBuilder::visitVAEnd(CallInst &I) {
+void SelectionDAGBuilder::visitVAEnd(const CallInst &I) {
   DAG.setRoot(DAG.getNode(ISD::VAEND, getCurDebugLoc(),
                           MVT::Other, getRoot(),
                           getValue(I.getOperand(1)),
                           DAG.getSrcValue(I.getOperand(1))));
 }
 
-void SelectionDAGBuilder::visitVACopy(CallInst &I) {
+void SelectionDAGBuilder::visitVACopy(const CallInst &I) {
   DAG.setRoot(DAG.getNode(ISD::VACOPY, getCurDebugLoc(),
                           MVT::Other, getRoot(),
                           getValue(I.getOperand(1)),
@@ -5807,7 +5810,8 @@
   return SDValue();
 }
 
-void SelectionDAGBuilder::CopyValueToVirtualRegister(Value *V, unsigned Reg) {
+void
+SelectionDAGBuilder::CopyValueToVirtualRegister(const Value *V, unsigned Reg) {
   SDValue Op = getValue(V);
   assert((Op.getOpcode() != ISD::CopyFromReg ||
           cast<RegisterSDNode>(Op.getOperand(1))->getReg() != Reg) &&
@@ -5822,9 +5826,9 @@
 
 #include "llvm/CodeGen/SelectionDAGISel.h"
 
-void SelectionDAGISel::LowerArguments(BasicBlock *LLVMBB) {
+void SelectionDAGISel::LowerArguments(const BasicBlock *LLVMBB) {
   // If this is the entry block, emit arguments.
-  Function &F = *LLVMBB->getParent();
+  const Function &F = *LLVMBB->getParent();
   SelectionDAG &DAG = SDB->DAG;
   SDValue OldRoot = DAG.getRoot();
   DebugLoc dl = SDB->getCurDebugLoc();
@@ -5856,7 +5860,7 @@
 
   // Set up the incoming argument description vector.
   unsigned Idx = 1;
-  for (Function::arg_iterator I = F.arg_begin(), E = F.arg_end();
+  for (Function::const_arg_iterator I = F.arg_begin(), E = F.arg_end();
        I != E; ++I, ++Idx) {
     SmallVector<EVT, 4> ValueVTs;
     ComputeValueVTs(TLI, I->getType(), ValueVTs);
@@ -5958,7 +5962,7 @@
     ++i;
   }
 
-  for (Function::arg_iterator I = F.arg_begin(), E = F.arg_end(); I != E;
+  for (Function::const_arg_iterator I = F.arg_begin(), E = F.arg_end(); I != E;
       ++I, ++Idx) {
     SmallVector<SDValue, 4> ArgValues;
     SmallVector<EVT, 4> ValueVTs;
@@ -6012,15 +6016,15 @@
 /// the end.
 ///
 void
-SelectionDAGISel::HandlePHINodesInSuccessorBlocks(BasicBlock *LLVMBB) {
-  TerminatorInst *TI = LLVMBB->getTerminator();
+SelectionDAGISel::HandlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB) {
+  const TerminatorInst *TI = LLVMBB->getTerminator();
 
   SmallPtrSet<MachineBasicBlock *, 4> SuccsHandled;
 
   // Check successor nodes' PHI nodes that expect a constant to be available
   // from this block.
   for (unsigned succ = 0, e = TI->getNumSuccessors(); succ != e; ++succ) {
-    BasicBlock *SuccBB = TI->getSuccessor(succ);
+    const BasicBlock *SuccBB = TI->getSuccessor(succ);
     if (!isa<PHINode>(SuccBB->begin())) continue;
     MachineBasicBlock *SuccMBB = FuncInfo->MBBMap[SuccBB];
 
@@ -6029,20 +6033,19 @@
     if (!SuccsHandled.insert(SuccMBB)) continue;
 
     MachineBasicBlock::iterator MBBI = SuccMBB->begin();
-    PHINode *PN;
 
     // At this point we know that there is a 1-1 correspondence between LLVM PHI
     // nodes and Machine PHI nodes, but the incoming operands have not been
     // emitted yet.
-    for (BasicBlock::iterator I = SuccBB->begin();
-         (PN = dyn_cast<PHINode>(I)); ++I) {
+    for (BasicBlock::const_iterator I = SuccBB->begin();
+         const PHINode *PN = dyn_cast<PHINode>(I); ++I) {
       // Ignore dead phi's.
       if (PN->use_empty()) continue;
 
       unsigned Reg;
-      Value *PHIOp = PN->getIncomingValueForBlock(LLVMBB);
+      const Value *PHIOp = PN->getIncomingValueForBlock(LLVMBB);
 
-      if (Constant *C = dyn_cast<Constant>(PHIOp)) {
+      if (const Constant *C = dyn_cast<Constant>(PHIOp)) {
         unsigned &RegOut = SDB->ConstantsOut[C];
         if (RegOut == 0) {
           RegOut = FuncInfo->CreateRegForValue(C);
@@ -6081,9 +6084,9 @@
 /// creating SelectionDAG nodes.
 ///
 bool
-SelectionDAGISel::HandlePHINodesInSuccessorBlocksFast(BasicBlock *LLVMBB,
+SelectionDAGISel::HandlePHINodesInSuccessorBlocksFast(const BasicBlock *LLVMBB,
                                                       FastISel *F) {
-  TerminatorInst *TI = LLVMBB->getTerminator();
+  const TerminatorInst *TI = LLVMBB->getTerminator();
 
   SmallPtrSet<MachineBasicBlock *, 4> SuccsHandled;
   unsigned OrigNumPHINodesToUpdate = SDB->PHINodesToUpdate.size();
@@ -6091,7 +6094,7 @@
   // Check successor nodes' PHI nodes that expect a constant to be available
   // from this block.
   for (unsigned succ = 0, e = TI->getNumSuccessors(); succ != e; ++succ) {
-    BasicBlock *SuccBB = TI->getSuccessor(succ);
+    const BasicBlock *SuccBB = TI->getSuccessor(succ);
     if (!isa<PHINode>(SuccBB->begin())) continue;
     MachineBasicBlock *SuccMBB = FuncInfo->MBBMap[SuccBB];
 
@@ -6100,13 +6103,12 @@
     if (!SuccsHandled.insert(SuccMBB)) continue;
 
     MachineBasicBlock::iterator MBBI = SuccMBB->begin();
-    PHINode *PN;
 
     // At this point we know that there is a 1-1 correspondence between LLVM PHI
     // nodes and Machine PHI nodes, but the incoming operands have not been
     // emitted yet.
-    for (BasicBlock::iterator I = SuccBB->begin();
-         (PN = dyn_cast<PHINode>(I)); ++I) {
+    for (BasicBlock::const_iterator I = SuccBB->begin();
+         const PHINode *PN = dyn_cast<PHINode>(I); ++I) {
       // Ignore dead phi's.
       if (PN->use_empty()) continue;
 
@@ -6127,7 +6129,7 @@
         }
       }
 
-      Value *PHIOp = PN->getIncomingValueForBlock(LLVMBB);
+      const Value *PHIOp = PN->getIncomingValueForBlock(LLVMBB);
 
       unsigned Reg = F->getRegForValue(PHIOp);
       if (Reg == 0) {

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h Wed Apr 14 20:51:59 2010
@@ -142,15 +142,16 @@
   /// CaseRec - A struct with ctor used in lowering switches to a binary tree
   /// of conditional branches.
   struct CaseRec {
-    CaseRec(MachineBasicBlock *bb, Constant *lt, Constant *ge, CaseRange r) :
+    CaseRec(MachineBasicBlock *bb, const Constant *lt, const Constant *ge,
+            CaseRange r) :
     CaseBB(bb), LT(lt), GE(ge), Range(r) {}
 
     /// CaseBB - The MBB in which to emit the compare and branch
     MachineBasicBlock *CaseBB;
     /// LT, GE - If nonzero, we know the current case value must be less-than or
     /// greater-than-or-equal-to these Constants.
-    Constant *LT;
-    Constant *GE;
+    const Constant *LT;
+    const Constant *GE;
     /// Range - A pair of iterators representing the range of case values to be
     /// processed at this point in the binary search tree.
     CaseRange Range;
@@ -181,7 +182,8 @@
   /// SelectionDAGBuilder and SDISel for the code generation of additional basic
   /// blocks needed by multi-case switch statements.
   struct CaseBlock {
-    CaseBlock(ISD::CondCode cc, Value *cmplhs, Value *cmprhs, Value *cmpmiddle,
+    CaseBlock(ISD::CondCode cc, const Value *cmplhs, const Value *cmprhs,
+              const Value *cmpmiddle,
               MachineBasicBlock *truebb, MachineBasicBlock *falsebb,
               MachineBasicBlock *me)
       : CC(cc), CmpLHS(cmplhs), CmpMHS(cmpmiddle), CmpRHS(cmprhs),
@@ -191,7 +193,7 @@
     // CmpLHS/CmpRHS/CmpMHS - The LHS/MHS/RHS of the comparison to emit.
     // Emit by default LHS op RHS. MHS is used for range comparisons:
     // If MHS is not null: (LHS <= MHS) and (MHS <= RHS).
-    Value *CmpLHS, *CmpMHS, *CmpRHS;
+    const Value *CmpLHS, *CmpMHS, *CmpRHS;
     // TrueBB/FalseBB - the block to branch to if the setcc is true/false.
     MachineBasicBlock *TrueBB, *FalseBB;
     // ThisBB - the block into which to emit the code for the setcc and branches
@@ -213,12 +215,12 @@
     MachineBasicBlock *Default;
   };
   struct JumpTableHeader {
-    JumpTableHeader(APInt F, APInt L, Value *SV, MachineBasicBlock *H,
+    JumpTableHeader(APInt F, APInt L, const Value *SV, MachineBasicBlock *H,
                     bool E = false):
       First(F), Last(L), SValue(SV), HeaderBB(H), Emitted(E) {}
     APInt First;
     APInt Last;
-    Value *SValue;
+    const Value *SValue;
     MachineBasicBlock *HeaderBB;
     bool Emitted;
   };
@@ -235,7 +237,7 @@
   typedef SmallVector<BitTestCase, 3> BitTestInfo;
 
   struct BitTestBlock {
-    BitTestBlock(APInt F, APInt R, Value* SV,
+    BitTestBlock(APInt F, APInt R, const Value* SV,
                  unsigned Rg, bool E,
                  MachineBasicBlock* P, MachineBasicBlock* D,
                  const BitTestInfo& C):
@@ -243,7 +245,7 @@
       Parent(P), Default(D), Cases(C) { }
     APInt First;
     APInt Range;
-    Value  *SValue;
+    const Value *SValue;
     unsigned Reg;
     bool Emitted;
     MachineBasicBlock *Parent;
@@ -280,7 +282,7 @@
 
   // Emit PHI-node-operand constants only once even if used by multiple
   // PHI nodes.
-  DenseMap<Constant*, unsigned> ConstantsOut;
+  DenseMap<const Constant *, unsigned> ConstantsOut;
 
   /// FuncInfo - Information about the function as a whole.
   ///
@@ -336,16 +338,16 @@
 
   unsigned getSDNodeOrder() const { return SDNodeOrder; }
 
-  void CopyValueToVirtualRegister(Value *V, unsigned Reg);
+  void CopyValueToVirtualRegister(const Value *V, unsigned Reg);
 
   /// AssignOrderingToNode - Assign an ordering to the node. The order is gotten
   /// from how the code appeared in the source. The ordering is used by the
   /// scheduler to effectively turn off scheduling.
   void AssignOrderingToNode(const SDNode *Node);
 
-  void visit(Instruction &I);
+  void visit(const Instruction &I);
 
-  void visit(unsigned Opcode, User &I);
+  void visit(unsigned Opcode, const User &I);
 
   void setCurrentBasicBlock(MachineBasicBlock *MBB) { CurMBB = MBB; }
 
@@ -361,43 +363,43 @@
                             std::set<unsigned> &OutputRegs, 
                             std::set<unsigned> &InputRegs);
 
-  void FindMergedConditions(Value *Cond, MachineBasicBlock *TBB,
+  void FindMergedConditions(const Value *Cond, MachineBasicBlock *TBB,
                             MachineBasicBlock *FBB, MachineBasicBlock *CurBB,
                             unsigned Opc);
-  void EmitBranchForMergedCondition(Value *Cond, MachineBasicBlock *TBB,
+  void EmitBranchForMergedCondition(const Value *Cond, MachineBasicBlock *TBB,
                                     MachineBasicBlock *FBB,
                                     MachineBasicBlock *CurBB);
   bool ShouldEmitAsBranches(const std::vector<CaseBlock> &Cases);
-  bool isExportableFromCurrentBlock(Value *V, const BasicBlock *FromBB);
-  void CopyToExportRegsIfNeeded(Value *V);
-  void ExportFromCurrentBlock(Value *V);
-  void LowerCallTo(CallSite CS, SDValue Callee, bool IsTailCall,
+  bool isExportableFromCurrentBlock(const Value *V, const BasicBlock *FromBB);
+  void CopyToExportRegsIfNeeded(const Value *V);
+  void ExportFromCurrentBlock(const Value *V);
+  void LowerCallTo(ImmutableCallSite CS, SDValue Callee, bool IsTailCall,
                    MachineBasicBlock *LandingPad = NULL);
 
 private:
   // Terminator instructions.
-  void visitRet(ReturnInst &I);
-  void visitBr(BranchInst &I);
-  void visitSwitch(SwitchInst &I);
-  void visitIndirectBr(IndirectBrInst &I);
-  void visitUnreachable(UnreachableInst &I) { /* noop */ }
+  void visitRet(const ReturnInst &I);
+  void visitBr(const BranchInst &I);
+  void visitSwitch(const SwitchInst &I);
+  void visitIndirectBr(const IndirectBrInst &I);
+  void visitUnreachable(const UnreachableInst &I) { /* noop */ }
 
   // Helpers for visitSwitch
   bool handleSmallSwitchRange(CaseRec& CR,
                               CaseRecVector& WorkList,
-                              Value* SV,
+                              const Value* SV,
                               MachineBasicBlock* Default);
   bool handleJTSwitchCase(CaseRec& CR,
                           CaseRecVector& WorkList,
-                          Value* SV,
+                          const Value* SV,
                           MachineBasicBlock* Default);
   bool handleBTSplitSwitchCase(CaseRec& CR,
                                CaseRecVector& WorkList,
-                               Value* SV,
+                               const Value* SV,
                                MachineBasicBlock* Default);
   bool handleBitTestsSwitchCase(CaseRec& CR,
                                 CaseRecVector& WorkList,
-                                Value* SV,
+                                const Value* SV,
                                 MachineBasicBlock* Default);  
 public:
   void visitSwitchCase(CaseBlock &CB);
@@ -410,87 +412,87 @@
   
 private:
   // These all get lowered before this pass.
-  void visitInvoke(InvokeInst &I);
-  void visitUnwind(UnwindInst &I);
+  void visitInvoke(const InvokeInst &I);
+  void visitUnwind(const UnwindInst &I);
 
-  void visitBinary(User &I, unsigned OpCode);
-  void visitShift(User &I, unsigned Opcode);
-  void visitAdd(User &I)  { visitBinary(I, ISD::ADD); }
-  void visitFAdd(User &I) { visitBinary(I, ISD::FADD); }
-  void visitSub(User &I)  { visitBinary(I, ISD::SUB); }
-  void visitFSub(User &I);
-  void visitMul(User &I)  { visitBinary(I, ISD::MUL); }
-  void visitFMul(User &I) { visitBinary(I, ISD::FMUL); }
-  void visitURem(User &I) { visitBinary(I, ISD::UREM); }
-  void visitSRem(User &I) { visitBinary(I, ISD::SREM); }
-  void visitFRem(User &I) { visitBinary(I, ISD::FREM); }
-  void visitUDiv(User &I) { visitBinary(I, ISD::UDIV); }
-  void visitSDiv(User &I) { visitBinary(I, ISD::SDIV); }
-  void visitFDiv(User &I) { visitBinary(I, ISD::FDIV); }
-  void visitAnd (User &I) { visitBinary(I, ISD::AND); }
-  void visitOr  (User &I) { visitBinary(I, ISD::OR); }
-  void visitXor (User &I) { visitBinary(I, ISD::XOR); }
-  void visitShl (User &I) { visitShift(I, ISD::SHL); }
-  void visitLShr(User &I) { visitShift(I, ISD::SRL); }
-  void visitAShr(User &I) { visitShift(I, ISD::SRA); }
-  void visitICmp(User &I);
-  void visitFCmp(User &I);
+  void visitBinary(const User &I, unsigned OpCode);
+  void visitShift(const User &I, unsigned Opcode);
+  void visitAdd(const User &I)  { visitBinary(I, ISD::ADD); }
+  void visitFAdd(const User &I) { visitBinary(I, ISD::FADD); }
+  void visitSub(const User &I)  { visitBinary(I, ISD::SUB); }
+  void visitFSub(const User &I);
+  void visitMul(const User &I)  { visitBinary(I, ISD::MUL); }
+  void visitFMul(const User &I) { visitBinary(I, ISD::FMUL); }
+  void visitURem(const User &I) { visitBinary(I, ISD::UREM); }
+  void visitSRem(const User &I) { visitBinary(I, ISD::SREM); }
+  void visitFRem(const User &I) { visitBinary(I, ISD::FREM); }
+  void visitUDiv(const User &I) { visitBinary(I, ISD::UDIV); }
+  void visitSDiv(const User &I) { visitBinary(I, ISD::SDIV); }
+  void visitFDiv(const User &I) { visitBinary(I, ISD::FDIV); }
+  void visitAnd (const User &I) { visitBinary(I, ISD::AND); }
+  void visitOr  (const User &I) { visitBinary(I, ISD::OR); }
+  void visitXor (const User &I) { visitBinary(I, ISD::XOR); }
+  void visitShl (const User &I) { visitShift(I, ISD::SHL); }
+  void visitLShr(const User &I) { visitShift(I, ISD::SRL); }
+  void visitAShr(const User &I) { visitShift(I, ISD::SRA); }
+  void visitICmp(const User &I);
+  void visitFCmp(const User &I);
   // Visit the conversion instructions
-  void visitTrunc(User &I);
-  void visitZExt(User &I);
-  void visitSExt(User &I);
-  void visitFPTrunc(User &I);
-  void visitFPExt(User &I);
-  void visitFPToUI(User &I);
-  void visitFPToSI(User &I);
-  void visitUIToFP(User &I);
-  void visitSIToFP(User &I);
-  void visitPtrToInt(User &I);
-  void visitIntToPtr(User &I);
-  void visitBitCast(User &I);
-
-  void visitExtractElement(User &I);
-  void visitInsertElement(User &I);
-  void visitShuffleVector(User &I);
-
-  void visitExtractValue(ExtractValueInst &I);
-  void visitInsertValue(InsertValueInst &I);
-
-  void visitGetElementPtr(User &I);
-  void visitSelect(User &I);
-
-  void visitAlloca(AllocaInst &I);
-  void visitLoad(LoadInst &I);
-  void visitStore(StoreInst &I);
-  void visitPHI(PHINode &I) { } // PHI nodes are handled specially.
-  void visitCall(CallInst &I);
-  bool visitMemCmpCall(CallInst &I);
+  void visitTrunc(const User &I);
+  void visitZExt(const User &I);
+  void visitSExt(const User &I);
+  void visitFPTrunc(const User &I);
+  void visitFPExt(const User &I);
+  void visitFPToUI(const User &I);
+  void visitFPToSI(const User &I);
+  void visitUIToFP(const User &I);
+  void visitSIToFP(const User &I);
+  void visitPtrToInt(const User &I);
+  void visitIntToPtr(const User &I);
+  void visitBitCast(const User &I);
+
+  void visitExtractElement(const User &I);
+  void visitInsertElement(const User &I);
+  void visitShuffleVector(const User &I);
+
+  void visitExtractValue(const ExtractValueInst &I);
+  void visitInsertValue(const InsertValueInst &I);
+
+  void visitGetElementPtr(const User &I);
+  void visitSelect(const User &I);
+
+  void visitAlloca(const AllocaInst &I);
+  void visitLoad(const LoadInst &I);
+  void visitStore(const StoreInst &I);
+  void visitPHI(const PHINode &I) { } // PHI nodes are handled specially.
+  void visitCall(const CallInst &I);
+  bool visitMemCmpCall(const CallInst &I);
   
-  void visitInlineAsm(CallSite CS);
-  const char *visitIntrinsicCall(CallInst &I, unsigned Intrinsic);
-  void visitTargetIntrinsic(CallInst &I, unsigned Intrinsic);
-
-  void visitPow(CallInst &I);
-  void visitExp2(CallInst &I);
-  void visitExp(CallInst &I);
-  void visitLog(CallInst &I);
-  void visitLog2(CallInst &I);
-  void visitLog10(CallInst &I);
-
-  void visitVAStart(CallInst &I);
-  void visitVAArg(VAArgInst &I);
-  void visitVAEnd(CallInst &I);
-  void visitVACopy(CallInst &I);
+  void visitInlineAsm(ImmutableCallSite CS);
+  const char *visitIntrinsicCall(const CallInst &I, unsigned Intrinsic);
+  void visitTargetIntrinsic(const CallInst &I, unsigned Intrinsic);
+
+  void visitPow(const CallInst &I);
+  void visitExp2(const CallInst &I);
+  void visitExp(const CallInst &I);
+  void visitLog(const CallInst &I);
+  void visitLog2(const CallInst &I);
+  void visitLog10(const CallInst &I);
+
+  void visitVAStart(const CallInst &I);
+  void visitVAArg(const VAArgInst &I);
+  void visitVAEnd(const CallInst &I);
+  void visitVACopy(const CallInst &I);
 
-  void visitUserOp1(Instruction &I) {
+  void visitUserOp1(const Instruction &I) {
     llvm_unreachable("UserOp1 should not exist at instruction selection time!");
   }
-  void visitUserOp2(Instruction &I) {
+  void visitUserOp2(const Instruction &I) {
     llvm_unreachable("UserOp2 should not exist at instruction selection time!");
   }
   
-  const char *implVisitBinaryAtomic(CallInst& I, ISD::NodeType Op);
-  const char *implVisitAluOverflow(CallInst &I, ISD::NodeType Op);
+  const char *implVisitBinaryAtomic(const CallInst& I, ISD::NodeType Op);
+  const char *implVisitAluOverflow(const CallInst &I, ISD::NodeType Op);
 };
 
 } // end namespace llvm

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Wed Apr 14 20:51:59 2010
@@ -226,7 +226,7 @@
 
 /// SetDebugLoc - Update MF's and SDB's DebugLocs if debug information is
 /// attached with this instruction.
-static void SetDebugLoc(Instruction *I, SelectionDAGBuilder *SDB,
+static void SetDebugLoc(const Instruction *I, SelectionDAGBuilder *SDB,
                         FastISel *FastIS, MachineFunction *MF) {
   DebugLoc DL = I->getDebugLoc();
   if (DL.isUnknown()) return;
@@ -249,15 +249,16 @@
     FastIS->setCurDebugLoc(DebugLoc());
 }
 
-void SelectionDAGISel::SelectBasicBlock(BasicBlock *LLVMBB,
-                                        BasicBlock::iterator Begin,
-                                        BasicBlock::iterator End,
+void SelectionDAGISel::SelectBasicBlock(const BasicBlock *LLVMBB,
+                                        BasicBlock::const_iterator Begin,
+                                        BasicBlock::const_iterator End,
                                         bool &HadTailCall) {
   SDB->setCurrentBasicBlock(BB);
 
   // Lower all of the non-terminator instructions. If a call is emitted
   // as a tail call, cease emitting nodes for this block.
-  for (BasicBlock::iterator I = Begin; I != End && !SDB->HasTailCall; ++I) {
+  for (BasicBlock::const_iterator I = Begin;
+       I != End && !SDB->HasTailCall; ++I) {
     SetDebugLoc(I, SDB, 0, MF);
 
     // Visit the instruction. Terminators are handled below.
@@ -270,7 +271,7 @@
   if (!SDB->HasTailCall) {
     // Ensure that all instructions which are used outside of their defining
     // blocks are available as virtual registers.  Invoke is handled elsewhere.
-    for (BasicBlock::iterator I = Begin; I != End; ++I)
+    for (BasicBlock::const_iterator I = Begin; I != End; ++I)
       if (!isa<PHINode>(I) && !isa<InvokeInst>(I))
         SDB->CopyToExportRegsIfNeeded(I);
 
@@ -744,7 +745,7 @@
   }
 }
 
-void SelectionDAGISel::SelectAllBasicBlocks(Function &Fn) {
+void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) {
   // Initialize the Fast-ISel state, if needed.
   FastISel *FastIS = 0;
   if (EnableFastISel)
@@ -756,13 +757,13 @@
                                 );
 
   // Iterate over all basic blocks in the function.
-  for (Function::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) {
-    BasicBlock *LLVMBB = &*I;
+  for (Function::const_iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) {
+    const BasicBlock *LLVMBB = &*I;
     BB = FuncInfo->MBBMap[LLVMBB];
 
-    BasicBlock::iterator const Begin = LLVMBB->begin();
-    BasicBlock::iterator const End = LLVMBB->end();
-    BasicBlock::iterator BI = Begin;
+    BasicBlock::const_iterator const Begin = LLVMBB->begin();
+    BasicBlock::const_iterator const End = LLVMBB->end();
+    BasicBlock::const_iterator BI = Begin;
 
     // Lower any arguments needed in this block if this is the entry block.
     bool SuppressFastISel = false;
@@ -773,7 +774,7 @@
       // fast-isel in the entry block.
       if (FastIS) {
         unsigned j = 1;
-        for (Function::arg_iterator I = Fn.arg_begin(), E = Fn.arg_end();
+        for (Function::const_arg_iterator I = Fn.arg_begin(), E = Fn.arg_end();
              I != E; ++I, ++j)
           if (Fn.paramHasAttr(j, Attribute::ByVal)) {
             if (EnableFastISelVerbose || EnableFastISelAbort)

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Wed Apr 14 20:51:59 2010
@@ -2245,7 +2245,7 @@
 
 /// isGAPlusOffset - Returns true (and the GlobalValue and the offset) if the
 /// node is a GlobalAddress + offset.
-bool TargetLowering::isGAPlusOffset(SDNode *N, GlobalValue* &GA,
+bool TargetLowering::isGAPlusOffset(SDNode *N, const GlobalValue* &GA,
                                     int64_t &Offset) const {
   if (isa<GlobalAddressSDNode>(N)) {
     GlobalAddressSDNode *GASD = cast<GlobalAddressSDNode>(N);

Modified: llvm/trunk/lib/ExecutionEngine/JIT/JITDwarfEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/JIT/JITDwarfEmitter.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/ExecutionEngine/JIT/JITDwarfEmitter.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/JIT/JITDwarfEmitter.cpp Wed Apr 14 20:51:59 2010
@@ -52,7 +52,7 @@
       
   unsigned char* Result = 0;
 
-  const std::vector<Function *> Personalities = MMI->getPersonalities();
+  const std::vector<const Function *> Personalities = MMI->getPersonalities();
   EHFramePtr = EmitCommonEHFrame(Personalities[MMI->getPersonalityIndex()]);
 
   Result = EmitEHFrame(Personalities[MMI->getPersonalityIndex()], EHFramePtr,
@@ -201,7 +201,7 @@
   // Map all labels and get rid of any dead landing pads.
   MMI->TidyLandingPads();
 
-  const std::vector<GlobalVariable *> &TypeInfos = MMI->getTypeInfos();
+  const std::vector<const GlobalVariable *> &TypeInfos = MMI->getTypeInfos();
   const std::vector<unsigned> &FilterIds = MMI->getFilterIds();
   const std::vector<LandingPadInfo> &PadInfos = MMI->getLandingPads();
   if (PadInfos.empty()) return 0;
@@ -450,7 +450,7 @@
 
   // Emit the type ids.
   for (unsigned M = TypeInfos.size(); M; --M) {
-    GlobalVariable *GV = TypeInfos[M - 1];
+    const GlobalVariable *GV = TypeInfos[M - 1];
     
     if (GV) {
       if (TD->getPointerSize() == sizeof(int32_t))
@@ -609,7 +609,7 @@
   
   FinalSize += GetExceptionTableSizeInBytes(&F);
       
-  const std::vector<Function *> Personalities = MMI->getPersonalities();
+  const std::vector<const Function *> Personalities = MMI->getPersonalities();
   FinalSize += 
     GetCommonEHFrameSizeInBytes(Personalities[MMI->getPersonalityIndex()]);
 
@@ -782,7 +782,7 @@
   // Map all labels and get rid of any dead landing pads.
   MMI->TidyLandingPads();
 
-  const std::vector<GlobalVariable *> &TypeInfos = MMI->getTypeInfos();
+  const std::vector<const GlobalVariable *> &TypeInfos = MMI->getTypeInfos();
   const std::vector<unsigned> &FilterIds = MMI->getFilterIds();
   const std::vector<LandingPadInfo> &PadInfos = MMI->getLandingPads();
   if (PadInfos.empty()) return 0;

Modified: llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp Wed Apr 14 20:51:59 2010
@@ -995,12 +995,13 @@
       for (unsigned CurOp = 0; CurOp < NumOps; CurOp++) {
         const MachineOperand &MO = MI.getOperand(CurOp);
         if (MO.isGlobal()) {
-          GlobalValue* V = MO.getGlobal();
+          const GlobalValue* V = MO.getGlobal();
           const GlobalVariable *GV = dyn_cast<const GlobalVariable>(V);
           if (!GV)
             continue;
           // If seen in previous function, it will have an entry here.
-          if (TheJIT->getPointerToGlobalIfAvailable(GV))
+          if (TheJIT->getPointerToGlobalIfAvailable(
+                const_cast<GlobalVariable *>(GV)))
             continue;
           // If seen earlier in this function, it will have an entry here.
           // FIXME: it should be possible to combine these tables, by

Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Wed Apr 14 20:51:59 2010
@@ -1050,7 +1050,7 @@
                   unsigned PredReg) const {
   MachineFunction &MF = *MBB.getParent();
   MachineConstantPool *ConstantPool = MF.getConstantPool();
-  Constant *C =
+  const Constant *C =
         ConstantInt::get(Type::getInt32Ty(MF.getFunction()->getContext()), Val);
   unsigned Idx = ConstantPool->getConstantPoolIndex(C, 4);
 

Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Wed Apr 14 20:51:59 2010
@@ -150,7 +150,7 @@
 
     /// Routines that handle operands which add machine relocations which are
     /// fixed up by the relocation stage.
-    void emitGlobalAddress(GlobalValue *GV, unsigned Reloc,
+    void emitGlobalAddress(const GlobalValue *GV, unsigned Reloc,
                            bool MayNeedFarStub,  bool Indirect,
                            intptr_t ACPV = 0);
     void emitExternalSymbolAddress(const char *ES, unsigned Reloc);
@@ -249,14 +249,16 @@
 
 /// emitGlobalAddress - Emit the specified address to the code stream.
 ///
-void ARMCodeEmitter::emitGlobalAddress(GlobalValue *GV, unsigned Reloc,
+void ARMCodeEmitter::emitGlobalAddress(const GlobalValue *GV, unsigned Reloc,
                                        bool MayNeedFarStub, bool Indirect,
                                        intptr_t ACPV) {
   MachineRelocation MR = Indirect
     ? MachineRelocation::getIndirectSymbol(MCE.getCurrentPCOffset(), Reloc,
-                                           GV, ACPV, MayNeedFarStub)
+                                           const_cast<GlobalValue *>(GV),
+                                           ACPV, MayNeedFarStub)
     : MachineRelocation::getGV(MCE.getCurrentPCOffset(), Reloc,
-                               GV, ACPV, MayNeedFarStub);
+                               const_cast<GlobalValue *>(GV), ACPV,
+                               MayNeedFarStub);
   MCE.addRelocation(MR);
 }
 
@@ -391,7 +393,7 @@
           << (void*)MCE.getCurrentPCValue() << " " << *ACPV << '\n');
 
     assert(ACPV->isGlobalValue() && "unsupported constant pool value");
-    GlobalValue *GV = ACPV->getGV();
+    const GlobalValue *GV = ACPV->getGV();
     if (GV) {
       Reloc::Model RelocM = TM.getRelocationModel();
       emitGlobalAddress(GV, ARM::reloc_arm_machine_cp_entry,
@@ -403,7 +405,7 @@
     }
     emitWordLE(0);
   } else {
-    Constant *CV = MCPE.Val.ConstVal;
+    const Constant *CV = MCPE.Val.ConstVal;
 
     DEBUG({
         errs() << "  ** Constant pool #" << CPI << " @ "
@@ -415,7 +417,7 @@
         errs() << '\n';
       });
 
-    if (GlobalValue *GV = dyn_cast<GlobalValue>(CV)) {
+    if (const GlobalValue *GV = dyn_cast<GlobalValue>(CV)) {
       emitGlobalAddress(GV, ARM::reloc_arm_absolute, isa<Function>(GV), false);
       emitWordLE(0);
     } else if (const ConstantInt *CI = dyn_cast<ConstantInt>(CV)) {

Modified: llvm/trunk/lib/Target/ARM/ARMConstantPoolValue.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMConstantPoolValue.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMConstantPoolValue.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMConstantPoolValue.cpp Wed Apr 14 20:51:59 2010
@@ -21,7 +21,7 @@
 #include <cstdlib>
 using namespace llvm;
 
-ARMConstantPoolValue::ARMConstantPoolValue(Constant *cval, unsigned id,
+ARMConstantPoolValue::ARMConstantPoolValue(const Constant *cval, unsigned id,
                                            ARMCP::ARMCPKind K,
                                            unsigned char PCAdj,
                                            const char *Modif,
@@ -39,16 +39,17 @@
     CVal(NULL), S(strdup(s)), LabelId(id), Kind(ARMCP::CPExtSymbol),
     PCAdjust(PCAdj), Modifier(Modif), AddCurrentAddress(AddCA) {}
 
-ARMConstantPoolValue::ARMConstantPoolValue(GlobalValue *gv, const char *Modif)
+ARMConstantPoolValue::ARMConstantPoolValue(const GlobalValue *gv,
+                                           const char *Modif)
   : MachineConstantPoolValue((const Type*)Type::getInt32Ty(gv->getContext())),
     CVal(gv), S(NULL), LabelId(0), Kind(ARMCP::CPValue), PCAdjust(0),
     Modifier(Modif) {}
 
-GlobalValue *ARMConstantPoolValue::getGV() const {
+const GlobalValue *ARMConstantPoolValue::getGV() const {
   return dyn_cast_or_null<GlobalValue>(CVal);
 }
 
-BlockAddress *ARMConstantPoolValue::getBlockAddress() const {
+const BlockAddress *ARMConstantPoolValue::getBlockAddress() const {
   return dyn_cast_or_null<BlockAddress>(CVal);
 }
 

Modified: llvm/trunk/lib/Target/ARM/ARMConstantPoolValue.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMConstantPoolValue.h?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMConstantPoolValue.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMConstantPoolValue.h Wed Apr 14 20:51:59 2010
@@ -36,7 +36,7 @@
 /// represent PC-relative displacement between the address of the load
 /// instruction and the constant being loaded, i.e. (&GV-(LPIC+8)).
 class ARMConstantPoolValue : public MachineConstantPoolValue {
-  Constant *CVal;          // Constant being loaded.
+  const Constant *CVal;    // Constant being loaded.
   const char *S;           // ExtSymbol being loaded.
   unsigned LabelId;        // Label id of the load.
   ARMCP::ARMCPKind Kind;   // Kind of constant.
@@ -46,20 +46,20 @@
   bool AddCurrentAddress;
 
 public:
-  ARMConstantPoolValue(Constant *cval, unsigned id,
+  ARMConstantPoolValue(const Constant *cval, unsigned id,
                        ARMCP::ARMCPKind Kind = ARMCP::CPValue,
                        unsigned char PCAdj = 0, const char *Modifier = NULL,
                        bool AddCurrentAddress = false);
   ARMConstantPoolValue(LLVMContext &C, const char *s, unsigned id,
                        unsigned char PCAdj = 0, const char *Modifier = NULL,
                        bool AddCurrentAddress = false);
-  ARMConstantPoolValue(GlobalValue *GV, const char *Modifier);
+  ARMConstantPoolValue(const GlobalValue *GV, const char *Modifier);
   ARMConstantPoolValue();
   ~ARMConstantPoolValue();
 
-  GlobalValue *getGV() const;
+  const GlobalValue *getGV() const;
   const char *getSymbol() const { return S; }
-  BlockAddress *getBlockAddress() const;
+  const BlockAddress *getBlockAddress() const;
   const char *getModifier() const { return Modifier; }
   bool hasModifier() const { return Modifier != NULL; }
   bool mustAddCurrentAddress() const { return AddCurrentAddress; }

Modified: llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp Wed Apr 14 20:51:59 2010
@@ -91,7 +91,7 @@
           LO16 = LO16.addImm(Lo16);
           HI16 = HI16.addImm(Hi16);
         } else {
-          GlobalValue *GV = MO.getGlobal();
+          const GlobalValue *GV = MO.getGlobal();
           unsigned TF = MO.getTargetFlags();
           LO16 = LO16.addGlobalAddress(GV, MO.getOffset(), TF | ARMII::MO_LO16);
           HI16 = HI16.addGlobalAddress(GV, MO.getOffset(), TF | ARMII::MO_HI16);

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Wed Apr 14 20:51:59 2010
@@ -1070,7 +1070,7 @@
                            false, false, 0);
     }
   } else if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) {
-    GlobalValue *GV = G->getGlobal();
+    const GlobalValue *GV = G->getGlobal();
     isDirect = true;
     bool isExt = GV->isDeclaration() || GV->isWeakForLinker();
     bool isStub = (isExt && Subtarget->isTargetDarwin()) &&
@@ -1282,7 +1282,7 @@
   unsigned ARMPCLabelIndex = 0;
   DebugLoc DL = Op.getDebugLoc();
   EVT PtrVT = getPointerTy();
-  BlockAddress *BA = cast<BlockAddressSDNode>(Op)->getBlockAddress();
+  const BlockAddress *BA = cast<BlockAddressSDNode>(Op)->getBlockAddress();
   Reloc::Model RelocM = getTargetMachine().getRelocationModel();
   SDValue CPAddr;
   if (RelocM == Reloc::Static) {
@@ -1348,7 +1348,7 @@
 SDValue
 ARMTargetLowering::LowerToTLSExecModels(GlobalAddressSDNode *GA,
                                         SelectionDAG &DAG) {
-  GlobalValue *GV = GA->getGlobal();
+  const GlobalValue *GV = GA->getGlobal();
   DebugLoc dl = GA->getDebugLoc();
   SDValue Offset;
   SDValue Chain = DAG.getEntryNode();
@@ -1411,7 +1411,7 @@
                                                  SelectionDAG &DAG) {
   EVT PtrVT = getPointerTy();
   DebugLoc dl = Op.getDebugLoc();
-  GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal();
+  const GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal();
   Reloc::Model RelocM = getTargetMachine().getRelocationModel();
   if (RelocM == Reloc::PIC_) {
     bool UseGOTOFF = GV->hasLocalLinkage() || GV->hasHiddenVisibility();
@@ -1454,7 +1454,7 @@
   unsigned ARMPCLabelIndex = 0;
   EVT PtrVT = getPointerTy();
   DebugLoc dl = Op.getDebugLoc();
-  GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal();
+  const GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal();
   Reloc::Model RelocM = getTargetMachine().getRelocationModel();
   SDValue CPAddr;
   if (RelocM == Reloc::Static)
@@ -1850,7 +1850,7 @@
     if (Op.getOperand(1).getOpcode() == ARMISD::Wrapper) {
       SDValue WrapperOp = Op.getOperand(1).getOperand(0);
       if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(WrapperOp))
-        if (ConstantFP *CFP = dyn_cast<ConstantFP>(CP->getConstVal()))
+        if (const ConstantFP *CFP = dyn_cast<ConstantFP>(CP->getConstVal()))
           return CFP->getValueAPF().isPosZero();
     }
   }

Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp Wed Apr 14 20:51:59 2010
@@ -116,7 +116,8 @@
 
 /// GVIsIndirectSymbol - true if the GV will be accessed via an indirect symbol.
 bool
-ARMSubtarget::GVIsIndirectSymbol(GlobalValue *GV, Reloc::Model RelocM) const {
+ARMSubtarget::GVIsIndirectSymbol(const GlobalValue *GV,
+                                 Reloc::Model RelocM) const {
   if (RelocM == Reloc::Static)
     return false;
 

Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.h?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMSubtarget.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMSubtarget.h Wed Apr 14 20:51:59 2010
@@ -160,7 +160,7 @@
 
   /// GVIsIndirectSymbol - true if the GV will be accessed via an indirect
   /// symbol.
-  bool GVIsIndirectSymbol(GlobalValue *GV, Reloc::Model RelocM) const;
+  bool GVIsIndirectSymbol(const GlobalValue *GV, Reloc::Model RelocM) const;
 };
 } // End llvm namespace
 

Modified: llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp Wed Apr 14 20:51:59 2010
@@ -239,7 +239,7 @@
       } else if (ACPV->isBlockAddress()) {
         O << *GetBlockAddressSymbol(ACPV->getBlockAddress());
       } else if (ACPV->isGlobalValue()) {
-        GlobalValue *GV = ACPV->getGV();
+        const GlobalValue *GV = ACPV->getGV();
         bool isIndirect = Subtarget->isTargetDarwin() &&
           Subtarget->GVIsIndirectSymbol(GV, TM.getRelocationModel());
         if (!isIndirect)
@@ -352,7 +352,7 @@
     return;
   case MachineOperand::MO_GlobalAddress: {
     bool isCallOp = Modifier && !strcmp(Modifier, "call");
-    GlobalValue *GV = MO.getGlobal();
+    const GlobalValue *GV = MO.getGlobal();
 
     if ((Modifier && strcmp(Modifier, "lo16") == 0) ||
         (TF & ARMII::MO_LO16))

Modified: llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.cpp Wed Apr 14 20:51:59 2010
@@ -56,7 +56,7 @@
                                            unsigned PredReg) const {
   MachineFunction &MF = *MBB.getParent();
   MachineConstantPool *ConstantPool = MF.getConstantPool();
-  Constant *C = ConstantInt::get(
+  const Constant *C = ConstantInt::get(
           Type::getInt32Ty(MBB.getParent()->getFunction()->getContext()), Val);
   unsigned Idx = ConstantPool->getConstantPoolIndex(C, 4);
 

Modified: llvm/trunk/lib/Target/ARM/Thumb2RegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Thumb2RegisterInfo.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Thumb2RegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Thumb2RegisterInfo.cpp Wed Apr 14 20:51:59 2010
@@ -52,7 +52,7 @@
                                            unsigned PredReg) const {
   MachineFunction &MF = *MBB.getParent();
   MachineConstantPool *ConstantPool = MF.getConstantPool();
-  Constant *C = ConstantInt::get(
+  const Constant *C = ConstantInt::get(
            Type::getInt32Ty(MBB.getParent()->getFunction()->getContext()), Val);
   unsigned Idx = ConstantPool->getConstantPoolIndex(C, 4);
 

Modified: llvm/trunk/lib/Target/Alpha/AlphaCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaCodeEmitter.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Alpha/AlphaCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/Alpha/AlphaCodeEmitter.cpp Wed Apr 14 20:51:59 2010
@@ -192,10 +192,13 @@
       llvm_unreachable("unknown relocatable instruction");
     }
     if (MO.isGlobal())
-      MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(),
-                                                 Reloc, MO.getGlobal(), Offset,
-                                                 isa<Function>(MO.getGlobal()),
-                                                 useGOT));
+      MCE.addRelocation(MachineRelocation::getGV(
+            MCE.getCurrentPCOffset(),
+            Reloc,
+            const_cast<GlobalValue *>(MO.getGlobal()),
+            Offset,
+            isa<Function>(MO.getGlobal()),
+            useGOT));
     else if (MO.isSymbol())
       MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
                                                      Reloc, MO.getSymbolName(),

Modified: llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp Wed Apr 14 20:51:59 2010
@@ -624,7 +624,7 @@
   }
   case ISD::ConstantPool: {
     ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(Op);
-    Constant *C = CP->getConstVal();
+    const Constant *C = CP->getConstVal();
     SDValue CPI = DAG.getTargetConstantPool(C, MVT::i64, CP->getAlignment());
     // FIXME there isn't really any debug info here
 
@@ -637,7 +637,7 @@
     llvm_unreachable("TLS not implemented for Alpha.");
   case ISD::GlobalAddress: {
     GlobalAddressSDNode *GSDN = cast<GlobalAddressSDNode>(Op);
-    GlobalValue *GV = GSDN->getGlobal();
+    const GlobalValue *GV = GSDN->getGlobal();
     SDValue GA = DAG.getTargetGlobalAddress(GV, MVT::i64, GSDN->getOffset());
     // FIXME there isn't really any debug info here
 

Modified: llvm/trunk/lib/Target/Blackfin/BlackfinISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Blackfin/BlackfinISelLowering.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Blackfin/BlackfinISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Blackfin/BlackfinISelLowering.cpp Wed Apr 14 20:51:59 2010
@@ -141,7 +141,7 @@
 SDValue BlackfinTargetLowering::LowerGlobalAddress(SDValue Op,
                                                    SelectionDAG &DAG) {
   DebugLoc DL = Op.getDebugLoc();
-  GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal();
+  const GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal();
 
   Op = DAG.getTargetGlobalAddress(GV, MVT::i32);
   return DAG.getNode(BFISD::Wrapper, DL, MVT::i32, Op);

Modified: llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp Wed Apr 14 20:51:59 2010
@@ -307,7 +307,7 @@
     // External or weakly linked global variables need non-lazily-resolved
     // stubs
     if (TM.getRelocationModel() != Reloc::Static) {
-      GlobalValue *GV = MO.getGlobal();
+      const GlobalValue *GV = MO.getGlobal();
       if (((GV->isDeclaration() || GV->hasWeakLinkage() ||
             GV->hasLinkOnceLinkage() || GV->hasCommonLinkage()))) {
         O << *GetSymbolWithGlobalValueBase(GV, "$non_lazy_ptr");

Modified: llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp Wed Apr 14 20:51:59 2010
@@ -306,7 +306,7 @@
         CV.push_back(const_cast<ConstantInt *>(V->getConstantIntValue()));
       }
 
-      Constant *CP = ConstantVector::get(CV);
+      const Constant *CP = ConstantVector::get(CV);
       SDValue CPIdx = CurDAG->getConstantPool(CP, SPUtli.getPointerTy());
       unsigned Alignment = cast<ConstantPoolSDNode>(CPIdx)->getAlignment();
       SDValue CGPoolOffset =
@@ -454,7 +454,7 @@
 
       case ISD::TargetGlobalAddress: {
         GlobalAddressSDNode *GSDN = cast<GlobalAddressSDNode>(Op0);
-        GlobalValue *GV = GSDN->getGlobal();
+        const GlobalValue *GV = GSDN->getGlobal();
         if (GV->getAlignment() == 16) {
           Base = Op0;
           Index = Zero;

Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Wed Apr 14 20:51:59 2010
@@ -893,7 +893,7 @@
 LowerConstantPool(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) {
   EVT PtrVT = Op.getValueType();
   ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(Op);
-  Constant *C = CP->getConstVal();
+  const Constant *C = CP->getConstVal();
   SDValue CPI = DAG.getTargetConstantPool(C, PtrVT, CP->getAlignment());
   SDValue Zero = DAG.getConstant(0, PtrVT);
   const TargetMachine &TM = DAG.getTarget();
@@ -951,7 +951,7 @@
 LowerGlobalAddress(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) {
   EVT PtrVT = Op.getValueType();
   GlobalAddressSDNode *GSDN = cast<GlobalAddressSDNode>(Op);
-  GlobalValue *GV = GSDN->getGlobal();
+  const GlobalValue *GV = GSDN->getGlobal();
   SDValue GA = DAG.getTargetGlobalAddress(GV, PtrVT, GSDN->getOffset());
   const TargetMachine &TM = DAG.getTarget();
   SDValue Zero = DAG.getConstant(0, PtrVT);
@@ -1242,7 +1242,7 @@
   // direct call is) turn it into a TargetGlobalAddress/TargetExternalSymbol
   // node so that legalize doesn't hack it.
   if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) {
-    GlobalValue *GV = G->getGlobal();
+    const GlobalValue *GV = G->getGlobal();
     EVT CalleeVT = Callee.getValueType();
     SDValue Zero = DAG.getConstant(0, PtrVT);
     SDValue GA = DAG.getTargetGlobalAddress(GV, CalleeVT);

Modified: llvm/trunk/lib/Target/MBlaze/MBlazeISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeISelLowering.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeISelLowering.cpp Wed Apr 14 20:51:59 2010
@@ -412,7 +412,7 @@
 LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) {
   // FIXME there isn't actually debug info here
   DebugLoc dl = Op.getDebugLoc();
-  GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal();
+  const GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal();
   SDValue GA = DAG.getTargetGlobalAddress(GV, MVT::i32);
 
   return DAG.getNode(MBlazeISD::Wrap, dl, MVT::i32, GA);
@@ -446,7 +446,7 @@
   SDValue ResNode;
   EVT PtrVT = Op.getValueType();
   ConstantPoolSDNode *N = cast<ConstantPoolSDNode>(Op);
-  Constant *C = N->getConstVal();
+  const Constant *C = N->getConstVal();
   SDValue Zero = DAG.getConstant(0, PtrVT);
   DebugLoc dl = Op.getDebugLoc();
 

Modified: llvm/trunk/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp Wed Apr 14 20:51:59 2010
@@ -45,9 +45,9 @@
     } Base;
 
     int16_t Disp;
-    GlobalValue *GV;
-    Constant *CP;
-    BlockAddress *BlockAddr;
+    const GlobalValue *GV;
+    const Constant *CP;
+    const BlockAddress *BlockAddr;
     const char *ES;
     int JT;
     unsigned Align;    // CP alignment.

Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Wed Apr 14 20:51:59 2010
@@ -484,7 +484,7 @@
 SDValue MipsTargetLowering::LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) {
   // FIXME there isn't actually debug info here
   DebugLoc dl = Op.getDebugLoc();
-  GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal();
+  const GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal();
 
   if (getTargetMachine().getRelocationModel() != Reloc::PIC_) {
     SDVTList VTs = DAG.getVTList(MVT::i32);
@@ -564,7 +564,7 @@
 {
   SDValue ResNode;
   ConstantPoolSDNode *N = cast<ConstantPoolSDNode>(Op);
-  Constant *C = N->getConstVal();
+  const Constant *C = N->getConstVal();
   // FIXME there isn't actually debug info here
   DebugLoc dl = Op.getDebugLoc();
 

Modified: llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp Wed Apr 14 20:51:59 2010
@@ -1409,7 +1409,7 @@
     if (IsDirectCall) { 
        // Considering the GlobalAddressNode case here.
        if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) {
-          GlobalValue *GV = G->getGlobal();
+          const GlobalValue *GV = G->getGlobal();
           Callee = DAG.getTargetGlobalAddress(GV, MVT::i8);
           Name = G->getGlobal()->getName();
        } else {// Considering the ExternalSymbol case here

Modified: llvm/trunk/lib/Target/PIC16/PIC16Passes/PIC16Cloner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16Passes/PIC16Cloner.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PIC16/PIC16Passes/PIC16Cloner.cpp (original)
+++ llvm/trunk/lib/Target/PIC16/PIC16Passes/PIC16Cloner.cpp Wed Apr 14 20:51:59 2010
@@ -172,7 +172,7 @@
     VarName = I->getName().str();
     if (PAN::isLocalToFunc(FnName, VarName)) {
       // Auto variable for current function found. Clone it.
-      GlobalVariable *GV = I;
+      const GlobalVariable *GV = I;
 
       const Type *InitTy = GV->getInitializer()->getType();
       GlobalVariable *ClonedGV = 

Modified: llvm/trunk/lib/Target/PIC16/PIC16TargetObjectFile.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16TargetObjectFile.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PIC16/PIC16TargetObjectFile.cpp (original)
+++ llvm/trunk/lib/Target/PIC16/PIC16TargetObjectFile.cpp Wed Apr 14 20:51:59 2010
@@ -134,7 +134,7 @@
 const MCSection *
 PIC16TargetObjectFile::allocateUDATA(const GlobalVariable *GV) const {
   assert(GV->hasInitializer() && "This global doesn't need space");
-  Constant *C = GV->getInitializer();
+  const Constant *C = GV->getInitializer();
   assert(C->isNullValue() && "Unitialized globals has non-zero initializer");
 
   // Find how much space this global needs.
@@ -169,7 +169,7 @@
 const MCSection *
 PIC16TargetObjectFile::allocateIDATA(const GlobalVariable *GV) const{
   assert(GV->hasInitializer() && "This global doesn't need space");
-  Constant *C = GV->getInitializer();
+  const Constant *C = GV->getInitializer();
   assert(!C->isNullValue() && "initialized globals has zero initializer");
   assert(GV->getType()->getAddressSpace() == PIC16ISD::RAM_SPACE &&
          "can allocate initialized RAM data only");

Modified: llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp Wed Apr 14 20:51:59 2010
@@ -200,7 +200,7 @@
       const MachineOperand &MO = MI->getOperand(OpNo);
       if (TM.getRelocationModel() != Reloc::Static) {
         if (MO.getType() == MachineOperand::MO_GlobalAddress) {
-          GlobalValue *GV = MO.getGlobal();
+          const GlobalValue *GV = MO.getGlobal();
           if (GV->isDeclaration() || GV->isWeakForLinker()) {
             // Dynamically-resolved functions need a stub for the function.
             MCSymbol *Sym = GetSymbolWithGlobalValueBase(GV, "$stub");
@@ -405,7 +405,7 @@
   }
   case MachineOperand::MO_GlobalAddress: {
     // Computing the address of a global symbol, not calling it.
-    GlobalValue *GV = MO.getGlobal();
+    const GlobalValue *GV = MO.getGlobal();
     MCSymbol *SymToPrint;
 
     // External or weakly linked global variables need non-lazily-resolved stubs
@@ -794,8 +794,8 @@
   if (MAI->doesSupportExceptionHandling() && MMI) {
     // Add the (possibly multiple) personalities to the set of global values.
     // Only referenced functions get into the Personalities list.
-    const std::vector<Function *> &Personalities = MMI->getPersonalities();
-    for (std::vector<Function *>::const_iterator I = Personalities.begin(),
+    const std::vector<const Function*> &Personalities = MMI->getPersonalities();
+    for (std::vector<const Function*>::const_iterator I = Personalities.begin(),
          E = Personalities.end(); I != E; ++I) {
       if (*I) {
         MCSymbol *NLPSym = GetSymbolWithGlobalValueBase(*I, "$non_lazy_ptr");

Modified: llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp Wed Apr 14 20:51:59 2010
@@ -202,7 +202,7 @@
     MachineRelocation R;
     if (MO.isGlobal()) {
       R = MachineRelocation::getGV(MCE.getCurrentPCOffset(), Reloc,
-                                   MO.getGlobal(), 0,
+                                   const_cast<GlobalValue *>(MO.getGlobal()), 0,
                                    isa<Function>(MO.getGlobal()));
     } else if (MO.isSymbol()) {
       R = MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),

Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Wed Apr 14 20:51:59 2010
@@ -476,7 +476,7 @@
   else if (ISD::isEXTLoad(Op.getNode()) || ISD::isNON_EXTLoad(Op.getNode())) {
     // Maybe this has already been legalized into the constant pool?
     if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(Op.getOperand(1)))
-      if (ConstantFP *CFP = dyn_cast<ConstantFP>(CP->getConstVal()))
+      if (const ConstantFP *CFP = dyn_cast<ConstantFP>(CP->getConstVal()))
         return CFP->getValueAPF().isZero();
   }
   return false;
@@ -1098,7 +1098,7 @@
                                              SelectionDAG &DAG) {
   EVT PtrVT = Op.getValueType();
   ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(Op);
-  Constant *C = CP->getConstVal();
+  const Constant *C = CP->getConstVal();
   SDValue CPI = DAG.getTargetConstantPool(C, PtrVT, CP->getAlignment());
   SDValue Zero = DAG.getConstant(0, PtrVT);
   // FIXME there isn't really any debug info here
@@ -1172,7 +1172,7 @@
   EVT PtrVT = Op.getValueType();
   DebugLoc DL = Op.getDebugLoc();
 
-  BlockAddress *BA = cast<BlockAddressSDNode>(Op)->getBlockAddress();
+  const BlockAddress *BA = cast<BlockAddressSDNode>(Op)->getBlockAddress();
   SDValue TgtBA = DAG.getBlockAddress(BA, PtrVT, /*isTarget=*/true);
   SDValue Zero = DAG.getConstant(0, PtrVT);
   SDValue Hi = DAG.getNode(PPCISD::Hi, DL, PtrVT, TgtBA, Zero);
@@ -1202,7 +1202,7 @@
                                               SelectionDAG &DAG) {
   EVT PtrVT = Op.getValueType();
   GlobalAddressSDNode *GSDN = cast<GlobalAddressSDNode>(Op);
-  GlobalValue *GV = GSDN->getGlobal();
+  const GlobalValue *GV = GSDN->getGlobal();
   SDValue GA = DAG.getTargetGlobalAddress(GV, PtrVT, GSDN->getOffset());
   SDValue Zero = DAG.getConstant(0, PtrVT);
   // FIXME there isn't really any debug info here

Modified: llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp Wed Apr 14 20:51:59 2010
@@ -753,7 +753,7 @@
 
 SDValue SparcTargetLowering::LowerGlobalAddress(SDValue Op, 
                                                 SelectionDAG &DAG) {
-  GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal();
+  const GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal();
   // FIXME there isn't really any debug info here
   DebugLoc dl = Op.getDebugLoc();
   SDValue GA = DAG.getTargetGlobalAddress(GV, MVT::i32);
@@ -777,7 +777,7 @@
   ConstantPoolSDNode *N = cast<ConstantPoolSDNode>(Op);
   // FIXME there isn't really any debug info here
   DebugLoc dl = Op.getDebugLoc();
-  Constant *C = N->getConstVal();
+  const Constant *C = N->getConstVal();
   SDValue CP = DAG.getTargetConstantPool(C, MVT::i32, N->getAlignment());
   SDValue Hi = DAG.getNode(SPISD::Hi, dl, MVT::i32, CP);
   SDValue Lo = DAG.getNode(SPISD::Lo, dl, MVT::i32, CP);

Modified: llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp Wed Apr 14 20:51:59 2010
@@ -716,7 +716,7 @@
 SDValue SystemZTargetLowering::LowerGlobalAddress(SDValue Op,
                                                   SelectionDAG &DAG) {
   DebugLoc dl = Op.getDebugLoc();
-  GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal();
+  const GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal();
   int64_t Offset = cast<GlobalAddressSDNode>(Op)->getOffset();
 
   bool IsPic = getTargetMachine().getRelocationModel() == Reloc::PIC_;

Modified: llvm/trunk/lib/Target/SystemZ/SystemZInstrBuilder.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZInstrBuilder.h?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZInstrBuilder.h (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZInstrBuilder.h Wed Apr 14 20:51:59 2010
@@ -44,7 +44,7 @@
 
   unsigned IndexReg;
   int32_t Disp;
-  GlobalValue *GV;
+  const GlobalValue *GV;
 
   SystemZAddressMode() : BaseType(RegBase), IndexReg(0), Disp(0) {
     Base.Reg = 0;

Modified: llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp Wed Apr 14 20:51:59 2010
@@ -79,7 +79,7 @@
 
   private:
     void emitPCRelativeBlockAddress(MachineBasicBlock *MBB);
-    void emitGlobalAddress(GlobalValue *GV, unsigned Reloc,
+    void emitGlobalAddress(const GlobalValue *GV, unsigned Reloc,
                            intptr_t Disp = 0, intptr_t PCAdj = 0,
                            bool Indirect = false);
     void emitExternalSymbolAddress(const char *ES, unsigned Reloc);
@@ -163,7 +163,8 @@
 /// this is part of a "take the address of a global" instruction.
 ///
 template<class CodeEmitter>
-void Emitter<CodeEmitter>::emitGlobalAddress(GlobalValue *GV, unsigned Reloc,
+void Emitter<CodeEmitter>::emitGlobalAddress(const GlobalValue *GV,
+                                unsigned Reloc,
                                 intptr_t Disp /* = 0 */,
                                 intptr_t PCAdj /* = 0 */,
                                 bool Indirect /* = false */) {
@@ -174,9 +175,10 @@
     RelocCST = PCAdj;
   MachineRelocation MR = Indirect
     ? MachineRelocation::getIndirectSymbol(MCE.getCurrentPCOffset(), Reloc,
-                                           GV, RelocCST, false)
+                                           const_cast<GlobalValue *>(GV),
+                                           RelocCST, false)
     : MachineRelocation::getGV(MCE.getCurrentPCOffset(), Reloc,
-                               GV, RelocCST, false);
+                               const_cast<GlobalValue *>(GV), RelocCST, false);
   MCE.addRelocation(MR);
   // The relocated value will be added to the displacement
   if (Reloc == X86::reloc_absolute_dword)

Modified: llvm/trunk/lib/Target/X86/X86FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FastISel.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86FastISel.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86FastISel.cpp Wed Apr 14 20:51:59 2010
@@ -72,16 +72,16 @@
     X86ScalarSSEf32 = Subtarget->hasSSE1();
   }
 
-  virtual bool TargetSelectInstruction(Instruction *I);
+  virtual bool TargetSelectInstruction(const Instruction *I);
 
 #include "X86GenFastISel.inc"
 
 private:
-  bool X86FastEmitCompare(Value *LHS, Value *RHS, EVT VT);
+  bool X86FastEmitCompare(const Value *LHS, const Value *RHS, EVT VT);
   
   bool X86FastEmitLoad(EVT VT, const X86AddressMode &AM, unsigned &RR);
 
-  bool X86FastEmitStore(EVT VT, Value *Val,
+  bool X86FastEmitStore(EVT VT, const Value *Val,
                         const X86AddressMode &AM);
   bool X86FastEmitStore(EVT VT, unsigned Val,
                         const X86AddressMode &AM);
@@ -89,32 +89,32 @@
   bool X86FastEmitExtend(ISD::NodeType Opc, EVT DstVT, unsigned Src, EVT SrcVT,
                          unsigned &ResultReg);
   
-  bool X86SelectAddress(Value *V, X86AddressMode &AM);
-  bool X86SelectCallAddress(Value *V, X86AddressMode &AM);
+  bool X86SelectAddress(const Value *V, X86AddressMode &AM);
+  bool X86SelectCallAddress(const Value *V, X86AddressMode &AM);
 
-  bool X86SelectLoad(Instruction *I);
+  bool X86SelectLoad(const Instruction *I);
   
-  bool X86SelectStore(Instruction *I);
+  bool X86SelectStore(const Instruction *I);
 
-  bool X86SelectCmp(Instruction *I);
+  bool X86SelectCmp(const Instruction *I);
 
-  bool X86SelectZExt(Instruction *I);
+  bool X86SelectZExt(const Instruction *I);
 
-  bool X86SelectBranch(Instruction *I);
+  bool X86SelectBranch(const Instruction *I);
 
-  bool X86SelectShift(Instruction *I);
+  bool X86SelectShift(const Instruction *I);
 
-  bool X86SelectSelect(Instruction *I);
+  bool X86SelectSelect(const Instruction *I);
 
-  bool X86SelectTrunc(Instruction *I);
+  bool X86SelectTrunc(const Instruction *I);
  
-  bool X86SelectFPExt(Instruction *I);
-  bool X86SelectFPTrunc(Instruction *I);
+  bool X86SelectFPExt(const Instruction *I);
+  bool X86SelectFPTrunc(const Instruction *I);
 
-  bool X86SelectExtractValue(Instruction *I);
+  bool X86SelectExtractValue(const Instruction *I);
 
-  bool X86VisitIntrinsicCall(IntrinsicInst &I);
-  bool X86SelectCall(Instruction *I);
+  bool X86VisitIntrinsicCall(const IntrinsicInst &I);
+  bool X86SelectCall(const Instruction *I);
 
   CCAssignFn *CCAssignFnForCall(CallingConv::ID CC, bool isTailCall = false);
 
@@ -125,9 +125,9 @@
     return static_cast<const X86TargetMachine *>(&TM);
   }
 
-  unsigned TargetMaterializeConstant(Constant *C);
+  unsigned TargetMaterializeConstant(const Constant *C);
 
-  unsigned TargetMaterializeAlloca(AllocaInst *C);
+  unsigned TargetMaterializeAlloca(const AllocaInst *C);
 
   /// isScalarFPTypeInSSEReg - Return true if the specified scalar FP type is
   /// computed in an SSE register, not on the X87 floating point stack.
@@ -280,14 +280,14 @@
   return true;
 }
 
-bool X86FastISel::X86FastEmitStore(EVT VT, Value *Val,
+bool X86FastISel::X86FastEmitStore(EVT VT, const Value *Val,
                                    const X86AddressMode &AM) {
   // Handle 'null' like i32/i64 0.
   if (isa<ConstantPointerNull>(Val))
     Val = Constant::getNullValue(TD.getIntPtrType(Val->getContext()));
   
   // If this is a store of a simple constant, fold the constant into the store.
-  if (ConstantInt *CI = dyn_cast<ConstantInt>(Val)) {
+  if (const ConstantInt *CI = dyn_cast<ConstantInt>(Val)) {
     unsigned Opc = 0;
     bool Signed = true;
     switch (VT.getSimpleVT().SimpleTy) {
@@ -335,13 +335,13 @@
 
 /// X86SelectAddress - Attempt to fill in an address from the given value.
 ///
-bool X86FastISel::X86SelectAddress(Value *V, X86AddressMode &AM) {
-  User *U = NULL;
+bool X86FastISel::X86SelectAddress(const Value *V, X86AddressMode &AM) {
+  const User *U = NULL;
   unsigned Opcode = Instruction::UserOp1;
-  if (Instruction *I = dyn_cast<Instruction>(V)) {
+  if (const Instruction *I = dyn_cast<Instruction>(V)) {
     Opcode = I->getOpcode();
     U = I;
-  } else if (ConstantExpr *C = dyn_cast<ConstantExpr>(V)) {
+  } else if (const ConstantExpr *C = dyn_cast<ConstantExpr>(V)) {
     Opcode = C->getOpcode();
     U = C;
   }
@@ -378,7 +378,7 @@
 
   case Instruction::Add: {
     // Adds of constants are common and easy enough.
-    if (ConstantInt *CI = dyn_cast<ConstantInt>(U->getOperand(1))) {
+    if (const ConstantInt *CI = dyn_cast<ConstantInt>(U->getOperand(1))) {
       uint64_t Disp = (int32_t)AM.Disp + (uint64_t)CI->getSExtValue();
       // They have to fit in the 32-bit signed displacement field though.
       if (isInt<32>(Disp)) {
@@ -399,16 +399,16 @@
     gep_type_iterator GTI = gep_type_begin(U);
     // Iterate through the indices, folding what we can. Constants can be
     // folded, and one dynamic index can be handled, if the scale is supported.
-    for (User::op_iterator i = U->op_begin() + 1, e = U->op_end();
+    for (User::const_op_iterator i = U->op_begin() + 1, e = U->op_end();
          i != e; ++i, ++GTI) {
-      Value *Op = *i;
+      const Value *Op = *i;
       if (const StructType *STy = dyn_cast<StructType>(*GTI)) {
         const StructLayout *SL = TD.getStructLayout(STy);
         unsigned Idx = cast<ConstantInt>(Op)->getZExtValue();
         Disp += SL->getElementOffset(Idx);
       } else {
         uint64_t S = TD.getTypeAllocSize(GTI.getIndexedType());
-        if (ConstantInt *CI = dyn_cast<ConstantInt>(Op)) {
+        if (const ConstantInt *CI = dyn_cast<ConstantInt>(Op)) {
           // Constant-offset addressing.
           Disp += CI->getSExtValue() * S;
         } else if (IndexReg == 0 &&
@@ -446,7 +446,7 @@
   }
 
   // Handle constant address.
-  if (GlobalValue *GV = dyn_cast<GlobalValue>(V)) {
+  if (const GlobalValue *GV = dyn_cast<GlobalValue>(V)) {
     // Can't handle alternate code models yet.
     if (TM.getCodeModel() != CodeModel::Small)
       return false;
@@ -457,7 +457,7 @@
       return false;
 
     // Can't handle TLS yet.
-    if (GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV))
+    if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV))
       if (GVar->isThreadLocal())
         return false;
 
@@ -544,13 +544,13 @@
 
 /// X86SelectCallAddress - Attempt to fill in an address from the given value.
 ///
-bool X86FastISel::X86SelectCallAddress(Value *V, X86AddressMode &AM) {
-  User *U = NULL;
+bool X86FastISel::X86SelectCallAddress(const Value *V, X86AddressMode &AM) {
+  const User *U = NULL;
   unsigned Opcode = Instruction::UserOp1;
-  if (Instruction *I = dyn_cast<Instruction>(V)) {
+  if (const Instruction *I = dyn_cast<Instruction>(V)) {
     Opcode = I->getOpcode();
     U = I;
-  } else if (ConstantExpr *C = dyn_cast<ConstantExpr>(V)) {
+  } else if (const ConstantExpr *C = dyn_cast<ConstantExpr>(V)) {
     Opcode = C->getOpcode();
     U = C;
   }
@@ -575,7 +575,7 @@
   }
 
   // Handle constant address.
-  if (GlobalValue *GV = dyn_cast<GlobalValue>(V)) {
+  if (const GlobalValue *GV = dyn_cast<GlobalValue>(V)) {
     // Can't handle alternate code models yet.
     if (TM.getCodeModel() != CodeModel::Small)
       return false;
@@ -586,7 +586,7 @@
       return false;
 
     // Can't handle TLS or DLLImport.
-    if (GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV))
+    if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV))
       if (GVar->isThreadLocal() || GVar->hasDLLImportLinkage())
         return false;
 
@@ -627,7 +627,7 @@
 
 
 /// X86SelectStore - Select and emit code to implement store instructions.
-bool X86FastISel::X86SelectStore(Instruction* I) {
+bool X86FastISel::X86SelectStore(const Instruction *I) {
   EVT VT;
   if (!isTypeLegal(I->getOperand(0)->getType(), VT, /*AllowI1=*/true))
     return false;
@@ -641,7 +641,7 @@
 
 /// X86SelectLoad - Select and emit code to implement load instructions.
 ///
-bool X86FastISel::X86SelectLoad(Instruction *I)  {
+bool X86FastISel::X86SelectLoad(const Instruction *I)  {
   EVT VT;
   if (!isTypeLegal(I->getType(), VT, /*AllowI1=*/true))
     return false;
@@ -673,7 +673,7 @@
 /// X86ChooseCmpImmediateOpcode - If we have a comparison with RHS as the RHS
 /// of the comparison, return an opcode that works for the compare (e.g.
 /// CMP32ri) otherwise return 0.
-static unsigned X86ChooseCmpImmediateOpcode(EVT VT, ConstantInt *RHSC) {
+static unsigned X86ChooseCmpImmediateOpcode(EVT VT, const ConstantInt *RHSC) {
   switch (VT.getSimpleVT().SimpleTy) {
   // Otherwise, we can't fold the immediate into this comparison.
   default: return 0;
@@ -689,7 +689,8 @@
   }
 }
 
-bool X86FastISel::X86FastEmitCompare(Value *Op0, Value *Op1, EVT VT) {
+bool X86FastISel::X86FastEmitCompare(const Value *Op0, const Value *Op1,
+                                     EVT VT) {
   unsigned Op0Reg = getRegForValue(Op0);
   if (Op0Reg == 0) return false;
   
@@ -700,7 +701,7 @@
   // We have two options: compare with register or immediate.  If the RHS of
   // the compare is an immediate that we can fold into this compare, use
   // CMPri, otherwise use CMPrr.
-  if (ConstantInt *Op1C = dyn_cast<ConstantInt>(Op1)) {
+  if (const ConstantInt *Op1C = dyn_cast<ConstantInt>(Op1)) {
     if (unsigned CompareImmOpc = X86ChooseCmpImmediateOpcode(VT, Op1C)) {
       BuildMI(MBB, DL, TII.get(CompareImmOpc)).addReg(Op0Reg)
                                           .addImm(Op1C->getSExtValue());
@@ -718,8 +719,8 @@
   return true;
 }
 
-bool X86FastISel::X86SelectCmp(Instruction *I) {
-  CmpInst *CI = cast<CmpInst>(I);
+bool X86FastISel::X86SelectCmp(const Instruction *I) {
+  const CmpInst *CI = cast<CmpInst>(I);
 
   EVT VT;
   if (!isTypeLegal(I->getOperand(0)->getType(), VT))
@@ -781,7 +782,7 @@
     return false;
   }
 
-  Value *Op0 = CI->getOperand(0), *Op1 = CI->getOperand(1);
+  const Value *Op0 = CI->getOperand(0), *Op1 = CI->getOperand(1);
   if (SwapArgs)
     std::swap(Op0, Op1);
 
@@ -794,7 +795,7 @@
   return true;
 }
 
-bool X86FastISel::X86SelectZExt(Instruction *I) {
+bool X86FastISel::X86SelectZExt(const Instruction *I) {
   // Handle zero-extension from i1 to i8, which is common.
   if (I->getType()->isIntegerTy(8) &&
       I->getOperand(0)->getType()->isIntegerTy(1)) {
@@ -811,15 +812,15 @@
 }
 
 
-bool X86FastISel::X86SelectBranch(Instruction *I) {
+bool X86FastISel::X86SelectBranch(const Instruction *I) {
   // Unconditional branches are selected by tablegen-generated code.
   // Handle a conditional branch.
-  BranchInst *BI = cast<BranchInst>(I);
+  const BranchInst *BI = cast<BranchInst>(I);
   MachineBasicBlock *TrueMBB = MBBMap[BI->getSuccessor(0)];
   MachineBasicBlock *FalseMBB = MBBMap[BI->getSuccessor(1)];
 
   // Fold the common case of a conditional branch with a comparison.
-  if (CmpInst *CI = dyn_cast<CmpInst>(BI->getCondition())) {
+  if (const CmpInst *CI = dyn_cast<CmpInst>(BI->getCondition())) {
     if (CI->hasOneUse()) {
       EVT VT = TLI.getValueType(CI->getOperand(0)->getType());
 
@@ -866,7 +867,7 @@
         return false;
       }
       
-      Value *Op0 = CI->getOperand(0), *Op1 = CI->getOperand(1);
+      const Value *Op0 = CI->getOperand(0), *Op1 = CI->getOperand(1);
       if (SwapArgs)
         std::swap(Op0, Op1);
 
@@ -901,7 +902,8 @@
     // looking for the SETO/SETB instruction. If an instruction modifies the
     // EFLAGS register before we reach the SETO/SETB instruction, then we can't
     // convert the branch into a JO/JB instruction.
-    if (IntrinsicInst *CI = dyn_cast<IntrinsicInst>(EI->getAggregateOperand())){
+    if (const IntrinsicInst *CI =
+          dyn_cast<IntrinsicInst>(EI->getAggregateOperand())){
       if (CI->getIntrinsicID() == Intrinsic::sadd_with_overflow ||
           CI->getIntrinsicID() == Intrinsic::uadd_with_overflow) {
         const MachineInstr *SetMI = 0;
@@ -956,7 +958,7 @@
   return true;
 }
 
-bool X86FastISel::X86SelectShift(Instruction *I) {
+bool X86FastISel::X86SelectShift(const Instruction *I) {
   unsigned CReg = 0, OpReg = 0, OpImm = 0;
   const TargetRegisterClass *RC = NULL;
   if (I->getType()->isIntegerTy(8)) {
@@ -1007,7 +1009,7 @@
   if (Op0Reg == 0) return false;
   
   // Fold immediate in shl(x,3).
-  if (ConstantInt *CI = dyn_cast<ConstantInt>(I->getOperand(1))) {
+  if (const ConstantInt *CI = dyn_cast<ConstantInt>(I->getOperand(1))) {
     unsigned ResultReg = createResultReg(RC);
     BuildMI(MBB, DL, TII.get(OpImm), 
             ResultReg).addReg(Op0Reg).addImm(CI->getZExtValue() & 0xff);
@@ -1032,7 +1034,7 @@
   return true;
 }
 
-bool X86FastISel::X86SelectSelect(Instruction *I) {
+bool X86FastISel::X86SelectSelect(const Instruction *I) {
   EVT VT = TLI.getValueType(I->getType(), /*HandleUnknown=*/true);
   if (VT == MVT::Other || !isTypeLegal(I->getType(), VT))
     return false;
@@ -1066,11 +1068,11 @@
   return true;
 }
 
-bool X86FastISel::X86SelectFPExt(Instruction *I) {
+bool X86FastISel::X86SelectFPExt(const Instruction *I) {
   // fpext from float to double.
   if (Subtarget->hasSSE2() &&
       I->getType()->isDoubleTy()) {
-    Value *V = I->getOperand(0);
+    const Value *V = I->getOperand(0);
     if (V->getType()->isFloatTy()) {
       unsigned OpReg = getRegForValue(V);
       if (OpReg == 0) return false;
@@ -1084,10 +1086,10 @@
   return false;
 }
 
-bool X86FastISel::X86SelectFPTrunc(Instruction *I) {
+bool X86FastISel::X86SelectFPTrunc(const Instruction *I) {
   if (Subtarget->hasSSE2()) {
     if (I->getType()->isFloatTy()) {
-      Value *V = I->getOperand(0);
+      const Value *V = I->getOperand(0);
       if (V->getType()->isDoubleTy()) {
         unsigned OpReg = getRegForValue(V);
         if (OpReg == 0) return false;
@@ -1102,7 +1104,7 @@
   return false;
 }
 
-bool X86FastISel::X86SelectTrunc(Instruction *I) {
+bool X86FastISel::X86SelectTrunc(const Instruction *I) {
   if (Subtarget->is64Bit())
     // All other cases should be handled by the tblgen generated code.
     return false;
@@ -1139,11 +1141,11 @@
   return true;
 }
 
-bool X86FastISel::X86SelectExtractValue(Instruction *I) {
-  ExtractValueInst *EI = cast<ExtractValueInst>(I);
-  Value *Agg = EI->getAggregateOperand();
+bool X86FastISel::X86SelectExtractValue(const Instruction *I) {
+  const ExtractValueInst *EI = cast<ExtractValueInst>(I);
+  const Value *Agg = EI->getAggregateOperand();
 
-  if (IntrinsicInst *CI = dyn_cast<IntrinsicInst>(Agg)) {
+  if (const IntrinsicInst *CI = dyn_cast<IntrinsicInst>(Agg)) {
     switch (CI->getIntrinsicID()) {
     default: break;
     case Intrinsic::sadd_with_overflow:
@@ -1160,7 +1162,7 @@
   return false;
 }
 
-bool X86FastISel::X86VisitIntrinsicCall(IntrinsicInst &I) {
+bool X86FastISel::X86VisitIntrinsicCall(const IntrinsicInst &I) {
   // FIXME: Handle more intrinsics.
   switch (I.getIntrinsicID()) {
   default: return false;
@@ -1168,8 +1170,8 @@
     // Emit code inline code to store the stack guard onto the stack.
     EVT PtrTy = TLI.getPointerTy();
 
-    Value *Op1 = I.getOperand(1); // The guard's value.
-    AllocaInst *Slot = cast<AllocaInst>(I.getOperand(2));
+    const Value *Op1 = I.getOperand(1); // The guard's value.
+    const AllocaInst *Slot = cast<AllocaInst>(I.getOperand(2));
 
     // Grab the frame index.
     X86AddressMode AM;
@@ -1204,7 +1206,7 @@
     return true;
   }
   case Intrinsic::dbg_declare: {
-    DbgDeclareInst *DI = cast<DbgDeclareInst>(&I);
+    const DbgDeclareInst *DI = cast<DbgDeclareInst>(&I);
     X86AddressMode AM;
     assert(DI->getAddress() && "Null address should be checked earlier!");
     if (!X86SelectAddress(DI->getAddress(), AM))
@@ -1235,8 +1237,8 @@
     if (!isTypeLegal(RetTy, VT))
       return false;
 
-    Value *Op1 = I.getOperand(1);
-    Value *Op2 = I.getOperand(2);
+    const Value *Op1 = I.getOperand(1);
+    const Value *Op2 = I.getOperand(2);
     unsigned Reg1 = getRegForValue(Op1);
     unsigned Reg2 = getRegForValue(Op2);
 
@@ -1277,20 +1279,20 @@
   }
 }
 
-bool X86FastISel::X86SelectCall(Instruction *I) {
-  CallInst *CI = cast<CallInst>(I);
-  Value *Callee = I->getOperand(0);
+bool X86FastISel::X86SelectCall(const Instruction *I) {
+  const CallInst *CI = cast<CallInst>(I);
+  const Value *Callee = I->getOperand(0);
 
   // Can't handle inline asm yet.
   if (isa<InlineAsm>(Callee))
     return false;
 
   // Handle intrinsic calls.
-  if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(CI))
+  if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(CI))
     return X86VisitIntrinsicCall(*II);
 
   // Handle only C and fastcc calling conventions for now.
-  CallSite CS(CI);
+  ImmutableCallSite CS(CI);
   CallingConv::ID CC = CS.getCallingConv();
   if (CC != CallingConv::C &&
       CC != CallingConv::Fast &&
@@ -1322,7 +1324,7 @@
   if (!X86SelectCallAddress(Callee, CalleeAM))
     return false;
   unsigned CalleeOp = 0;
-  GlobalValue *GV = 0;
+  const GlobalValue *GV = 0;
   if (CalleeAM.GV != 0) {
     GV = CalleeAM.GV;
   } else if (CalleeAM.Base.Reg != 0) {
@@ -1338,7 +1340,7 @@
   }
 
   // Deal with call operands first.
-  SmallVector<Value*, 8> ArgVals;
+  SmallVector<const Value *, 8> ArgVals;
   SmallVector<unsigned, 8> Args;
   SmallVector<EVT, 8> ArgVTs;
   SmallVector<ISD::ArgFlagsTy, 8> ArgFlags;
@@ -1346,7 +1348,7 @@
   ArgVals.reserve(CS.arg_size());
   ArgVTs.reserve(CS.arg_size());
   ArgFlags.reserve(CS.arg_size());
-  for (CallSite::arg_iterator i = CS.arg_begin(), e = CS.arg_end();
+  for (ImmutableCallSite::arg_iterator i = CS.arg_begin(), e = CS.arg_end();
        i != e; ++i) {
     unsigned Arg = getRegForValue(*i);
     if (Arg == 0)
@@ -1454,7 +1456,7 @@
       X86AddressMode AM;
       AM.Base.Reg = StackPtr;
       AM.Disp = LocMemOffset;
-      Value *ArgVal = ArgVals[VA.getValNo()];
+      const Value *ArgVal = ArgVals[VA.getValNo()];
       
       // If this is a really simple value, emit this with the Value* version of
       // X86FastEmitStore.  If it isn't simple, we don't want to do this, as it
@@ -1585,7 +1587,7 @@
 
 
 bool
-X86FastISel::TargetSelectInstruction(Instruction *I)  {
+X86FastISel::TargetSelectInstruction(const Instruction *I)  {
   switch (I->getOpcode()) {
   default: break;
   case Instruction::Load:
@@ -1633,7 +1635,7 @@
   return false;
 }
 
-unsigned X86FastISel::TargetMaterializeConstant(Constant *C) {
+unsigned X86FastISel::TargetMaterializeConstant(const Constant *C) {
   EVT VT;
   if (!isTypeLegal(C->getType(), VT))
     return false;
@@ -1728,7 +1730,7 @@
   return ResultReg;
 }
 
-unsigned X86FastISel::TargetMaterializeAlloca(AllocaInst *C) {
+unsigned X86FastISel::TargetMaterializeAlloca(const AllocaInst *C) {
   // Fail on dynamic allocas. At this point, getRegForValue has already
   // checked its CSE maps, so if we're here trying to handle a dynamic
   // alloca, we're not going to succeed. X86SelectAddress has a

Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Wed Apr 14 20:51:59 2010
@@ -20,7 +20,6 @@
 #include "X86RegisterInfo.h"
 #include "X86Subtarget.h"
 #include "X86TargetMachine.h"
-#include "llvm/GlobalValue.h"
 #include "llvm/Instructions.h"
 #include "llvm/Intrinsics.h"
 #include "llvm/Support/CFG.h"
@@ -66,9 +65,9 @@
     SDValue IndexReg; 
     int32_t Disp;
     SDValue Segment;
-    GlobalValue *GV;
-    Constant *CP;
-    BlockAddress *BlockAddr;
+    const GlobalValue *GV;
+    const Constant *CP;
+    const BlockAddress *BlockAddr;
     const char *ES;
     int JT;
     unsigned Align;    // CP alignment.

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Apr 14 20:51:59 2010
@@ -2067,7 +2067,7 @@
 
     // We should use extra load for direct calls to dllimported functions in
     // non-JIT mode.
-    GlobalValue *GV = G->getGlobal();
+    const GlobalValue *GV = G->getGlobal();
     if (!GV->hasDLLImportLinkage()) {
       unsigned char OpFlags = 0;
 
@@ -5149,7 +5149,7 @@
   unsigned char OpFlags =
     Subtarget->ClassifyBlockAddressReference();
   CodeModel::Model M = getTargetMachine().getCodeModel();
-  BlockAddress *BA = cast<BlockAddressSDNode>(Op)->getBlockAddress();
+  const BlockAddress *BA = cast<BlockAddressSDNode>(Op)->getBlockAddress();
   DebugLoc dl = Op.getDebugLoc();
   SDValue Result = DAG.getBlockAddress(BA, getPointerTy(),
                                        /*isTarget=*/true, OpFlags);
@@ -8882,7 +8882,8 @@
 /// isGAPlusOffset - Returns true (and the GlobalValue and the offset) if the
 /// node is a GlobalAddress + offset.
 bool X86TargetLowering::isGAPlusOffset(SDNode *N,
-                                       GlobalValue* &GA, int64_t &Offset) const{
+                                       const GlobalValue* &GA,
+                                       int64_t &Offset) const {
   if (N->getOpcode() == X86ISD::Wrapper) {
     if (isa<GlobalAddressSDNode>(N->getOperand(0))) {
       GA = cast<GlobalAddressSDNode>(N->getOperand(0))->getGlobal();
@@ -10167,7 +10168,7 @@
       return;
     }
 
-    GlobalValue *GV = GA->getGlobal();
+    const GlobalValue *GV = GA->getGlobal();
     // If we require an extra load to get this address, as in PIC mode, we
     // can't accept it.
     if (isGlobalStubReference(Subtarget->ClassifyGlobalReference(GV,

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Wed Apr 14 20:51:59 2010
@@ -475,7 +475,7 @@
                                                 unsigned Depth = 0) const;
 
     virtual bool
-    isGAPlusOffset(SDNode *N, GlobalValue* &GA, int64_t &Offset) const;
+    isGAPlusOffset(SDNode *N, const GlobalValue* &GA, int64_t &Offset) const;
     
     SDValue getReturnAddressFrameIndex(SelectionDAG &DAG);
 

Modified: llvm/trunk/lib/Target/X86/X86InstrBuilder.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrBuilder.h?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrBuilder.h (original)
+++ llvm/trunk/lib/Target/X86/X86InstrBuilder.h Wed Apr 14 20:51:59 2010
@@ -49,7 +49,7 @@
   unsigned Scale;
   unsigned IndexReg;
   int Disp;
-  GlobalValue *GV;
+  const GlobalValue *GV;
   unsigned GVOpFlags;
 
   X86AddressMode()

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Wed Apr 14 20:51:59 2010
@@ -2629,7 +2629,7 @@
       Ty = Type::getDoubleTy(MF.getFunction()->getContext());
     else
       Ty = VectorType::get(Type::getInt32Ty(MF.getFunction()->getContext()), 4);
-    Constant *C = LoadMI->getOpcode() == X86::V_SETALLONES ?
+    const Constant *C = LoadMI->getOpcode() == X86::V_SETALLONES ?
                     Constant::getAllOnesValue(Ty) :
                     Constant::getNullValue(Ty);
     unsigned CPI = MCP.getConstantPoolIndex(C, Alignment);

Modified: llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp Wed Apr 14 20:51:59 2010
@@ -220,7 +220,7 @@
 }
 
 SDValue XCoreTargetLowering::
-getGlobalAddressWrapper(SDValue GA, GlobalValue *GV, SelectionDAG &DAG)
+getGlobalAddressWrapper(SDValue GA, const GlobalValue *GV, SelectionDAG &DAG)
 {
   // FIXME there is no actual debug info here
   DebugLoc dl = GA.getDebugLoc();
@@ -243,7 +243,7 @@
 SDValue XCoreTargetLowering::
 LowerGlobalAddress(SDValue Op, SelectionDAG &DAG)
 {
-  GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal();
+  const GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal();
   SDValue GA = DAG.getTargetGlobalAddress(GV, MVT::i32);
   // If it's a debug information descriptor, don't mess with it.
   if (DAG.isVerifiedDebugInfoDesc(Op))
@@ -267,7 +267,7 @@
   // FIXME there isn't really debug info here
   DebugLoc dl = Op.getDebugLoc();
   // transform to label + getid() * size
-  GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal();
+  const GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal();
   SDValue GA = DAG.getTargetGlobalAddress(GV, MVT::i32);
   const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
   if (!GVar) {
@@ -300,7 +300,7 @@
 {
   DebugLoc DL = Op.getDebugLoc();
 
-  BlockAddress *BA = cast<BlockAddressSDNode>(Op)->getBlockAddress();
+  const BlockAddress *BA = cast<BlockAddressSDNode>(Op)->getBlockAddress();
   SDValue Result = DAG.getBlockAddress(BA, getPointerTy(), /*isTarget=*/true);
 
   return DAG.getNode(XCoreISD::PCRelativeWrapper, DL, getPointerTy(), Result);

Modified: llvm/trunk/lib/Target/XCore/XCoreISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreISelLowering.h?rev=101334&r1=101333&r2=101334&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreISelLowering.h (original)
+++ llvm/trunk/lib/Target/XCore/XCoreISelLowering.h Wed Apr 14 20:51:59 2010
@@ -129,7 +129,7 @@
                             DebugLoc dl, SelectionDAG &DAG,
                             SmallVectorImpl<SDValue> &InVals);
     SDValue getReturnAddressFrameIndex(SelectionDAG &DAG);
-    SDValue getGlobalAddressWrapper(SDValue GA, GlobalValue *GV,
+    SDValue getGlobalAddressWrapper(SDValue GA, const GlobalValue *GV,
                                     SelectionDAG &DAG);
 
     // Lower Operand specifics




From andersca at mac.com  Wed Apr 14 22:11:29 2010
From: andersca at mac.com (Anders Carlsson)
Date: Thu, 15 Apr 2010 03:11:29 -0000
Subject: [llvm-commits] [llvm] r101335 -
	/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
Message-ID: <20100415031129.2525C2A6C12C@llvm.org>

Author: andersca
Date: Wed Apr 14 22:11:28 2010
New Revision: 101335

URL: http://llvm.org/viewvc/llvm-project?rev=101335&view=rev
Log:
Fix build.

Modified:
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=101335&r1=101334&r2=101335&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Wed Apr 14 22:11:28 2010
@@ -1041,7 +1041,7 @@
     // those, the target's already in a register, so we don't need to do
     // anything extra.
     if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) {
-      GlobalValue *GV = G->getGlobal();
+      const GlobalValue *GV = G->getGlobal();
       // Create a constant pool entry for the callee address
       unsigned ARMPCLabelIndex = AFI->createConstPoolEntryUId();
       ARMConstantPoolValue *CPV = new ARMConstantPoolValue(GV,




From sabre at nondot.org  Wed Apr 14 22:32:19 2010
From: sabre at nondot.org (Chris Lattner)
Date: Thu, 15 Apr 2010 03:32:19 -0000
Subject: [llvm-commits] [llvm] r101336 - /llvm/trunk/tools/lli/lli.cpp
Message-ID: <20100415033219.3030A2A6C12C@llvm.org>

Author: lattner
Date: Wed Apr 14 22:32:19 2010
New Revision: 101336

URL: http://llvm.org/viewvc/llvm-project?rev=101336&view=rev
Log:
fix a crash on "lli ex" or any other file whose name is exactly two
characters long.

Modified:
    llvm/trunk/tools/lli/lli.cpp

Modified: llvm/trunk/tools/lli/lli.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lli/lli.cpp?rev=101336&r1=101335&r2=101336&view=diff
==============================================================================
--- llvm/trunk/tools/lli/lli.cpp (original)
+++ llvm/trunk/tools/lli/lli.cpp Wed Apr 14 22:32:19 2010
@@ -192,7 +192,8 @@
   } else {
     // Otherwise, if there is a .bc suffix on the executable strip it off, it
     // might confuse the program.
-    if (InputFile.rfind(".bc") == InputFile.length() - 3)
+    if (InputFile.size() > 3 && 
+        InputFile.rfind(".bc") == InputFile.length() - 3)
       InputFile.erase(InputFile.length() - 3);
   }
 




From daniel at zuster.org  Wed Apr 14 22:47:20 2010
From: daniel at zuster.org (Daniel Dunbar)
Date: Thu, 15 Apr 2010 03:47:20 -0000
Subject: [llvm-commits] [llvm] r101337 -
	/llvm/trunk/test/MC/Disassembler/dg.exp
Message-ID: <20100415034720.6EA902A6C12C@llvm.org>

Author: ddunbar
Date: Wed Apr 14 22:47:20 2010
New Revision: 101337

URL: http://llvm.org/viewvc/llvm-project?rev=101337&view=rev
Log:
tests: MC/Disassembler tests depend on ARM support being compiler in.

Modified:
    llvm/trunk/test/MC/Disassembler/dg.exp

Modified: llvm/trunk/test/MC/Disassembler/dg.exp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/dg.exp?rev=101337&r1=101336&r2=101337&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/dg.exp (original)
+++ llvm/trunk/test/MC/Disassembler/dg.exp Wed Apr 14 22:47:20 2010
@@ -1,4 +1,6 @@
 load_lib llvm.exp
 
-RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{txt}]]
+if { [llvm_supports_target ARM] } {
+  RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{txt}]]
+}
 




From daniel at zuster.org  Wed Apr 14 22:47:24 2010
From: daniel at zuster.org (Daniel Dunbar)
Date: Thu, 15 Apr 2010 03:47:24 -0000
Subject: [llvm-commits] [llvm] r101338 - in /llvm/trunk:
 tools/opt/AnalysisWrappers.cpp tools/opt/GraphPrinters.cpp
 utils/fpcmp/fpcmp.cpp
Message-ID: <20100415034724.CD6732A6C12D@llvm.org>

Author: ddunbar
Date: Wed Apr 14 22:47:24 2010
New Revision: 101338

URL: http://llvm.org/viewvc/llvm-project?rev=101338&view=rev
Log:
Remove unnecessary uses of <iostream>.

Modified:
    llvm/trunk/tools/opt/AnalysisWrappers.cpp
    llvm/trunk/tools/opt/GraphPrinters.cpp
    llvm/trunk/utils/fpcmp/fpcmp.cpp

Modified: llvm/trunk/tools/opt/AnalysisWrappers.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/opt/AnalysisWrappers.cpp?rev=101338&r1=101337&r2=101338&view=diff
==============================================================================
--- llvm/trunk/tools/opt/AnalysisWrappers.cpp (original)
+++ llvm/trunk/tools/opt/AnalysisWrappers.cpp Wed Apr 14 22:47:24 2010
@@ -22,7 +22,6 @@
 #include "llvm/Support/CallSite.h"
 #include "llvm/Analysis/CallGraph.h"
 #include "llvm/Support/raw_ostream.h"
-#include <iostream>
 using namespace llvm;
 
 namespace {

Modified: llvm/trunk/tools/opt/GraphPrinters.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/opt/GraphPrinters.cpp?rev=101338&r1=101337&r2=101338&view=diff
==============================================================================
--- llvm/trunk/tools/opt/GraphPrinters.cpp (original)
+++ llvm/trunk/tools/opt/GraphPrinters.cpp Wed Apr 14 22:47:24 2010
@@ -19,12 +19,11 @@
 #include "llvm/Value.h"
 #include "llvm/Analysis/CallGraph.h"
 #include "llvm/Analysis/Dominators.h"
-#include <iostream>
-#include <fstream>
+#include "llvm/Support/raw_ostream.h"
 using namespace llvm;
 
 template<typename GraphType>
-static void WriteGraphToFile(std::ostream &O, const std::string &GraphName,
+static void WriteGraphToFile(raw_ostream &O, const std::string &GraphName,
                              const GraphType &GT) {
   std::string Filename = GraphName + ".dot";
   O << "Writing '" << Filename << "'...";
@@ -69,7 +68,7 @@
     CallGraphPrinter() : ModulePass(&ID) {}
 
     virtual bool runOnModule(Module &M) {
-      WriteGraphToFile(std::cerr, "callgraph", &getAnalysis<CallGraph>());
+      WriteGraphToFile(llvm::errs(), "callgraph", &getAnalysis<CallGraph>());
       return false;
     }
 

Modified: llvm/trunk/utils/fpcmp/fpcmp.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/fpcmp/fpcmp.cpp?rev=101338&r1=101337&r2=101338&view=diff
==============================================================================
--- llvm/trunk/utils/fpcmp/fpcmp.cpp (original)
+++ llvm/trunk/utils/fpcmp/fpcmp.cpp Wed Apr 14 22:47:24 2010
@@ -14,7 +14,7 @@
 
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/FileUtilities.h"
-#include <iostream>
+#include "llvm/Support/raw_ostream.h"
 using namespace llvm;
 
 namespace {
@@ -37,7 +37,7 @@
                                   sys::PathWithStatus(File2),
                                   AbsTolerance, RelTolerance, &ErrorMsg);
   if (!ErrorMsg.empty())
-    std::cerr << argv[0] << ": " << ErrorMsg << "\n";
+    errs() << argv[0] << ": " << ErrorMsg << "\n";
   return DF;
 }
 




From sabre at nondot.org  Wed Apr 14 23:30:20 2010
From: sabre at nondot.org (Chris Lattner)
Date: Thu, 15 Apr 2010 04:30:20 -0000
Subject: [llvm-commits] [llvm] r101340 -
	/llvm/trunk/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll
Message-ID: <20100415043020.1F4C12A6C12C@llvm.org>

Author: lattner
Date: Wed Apr 14 23:30:19 2010
New Revision: 101340

URL: http://llvm.org/viewvc/llvm-project?rev=101340&view=rev
Log:
remove undef control flow.

Modified:
    llvm/trunk/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll

Modified: llvm/trunk/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll?rev=101340&r1=101339&r2=101340&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll Wed Apr 14 23:30:19 2010
@@ -4,21 +4,9 @@
 
 define fastcc signext i8 @S_next_symbol(%struct.tempsym_t* %symptr) nounwind ssp {
 entry:
-	br label %bb116
-
-bb:		; preds = %bb116
-	switch i8 undef, label %bb14 [
-		i8 9, label %bb116
-		i8 32, label %bb116
-		i8 10, label %bb116
-		i8 13, label %bb116
-		i8 12, label %bb116
-	]
+	br label %bb14
 
 bb14:		; preds = %bb
-	br i1 undef, label %bb75, label %bb115
-
-bb75:		; preds = %bb14
 	%srcval16 = load i448* null, align 8		; <i448> [#uses=1]
 	%tmp = zext i32 undef to i448		; <i448> [#uses=1]
 	%tmp15 = shl i448 %tmp, 288		; <i448> [#uses=1]
@@ -26,13 +14,4 @@
 	%ins = or i448 %tmp15, %mask		; <i448> [#uses=1]
 	store i448 %ins, i448* null, align 8
 	ret i8 1
-
-bb115:		; preds = %bb14
-	ret i8 1
-
-bb116:		; preds = %bb, %bb, %bb, %bb, %bb, %entry
-	br i1 undef, label %bb, label %bb117
-
-bb117:		; preds = %bb116
-	ret i8 0
 }




From sabre at nondot.org  Wed Apr 14 23:31:42 2010
From: sabre at nondot.org (Chris Lattner)
Date: Thu, 15 Apr 2010 04:31:42 -0000
Subject: [llvm-commits] [llvm] r101341 -
	/llvm/trunk/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll
Message-ID: <20100415043142.E832A2A6C12C@llvm.org>

Author: lattner
Date: Wed Apr 14 23:31:42 2010
New Revision: 101341

URL: http://llvm.org/viewvc/llvm-project?rev=101341&view=rev
Log:
further tweak this to do something useful.

Modified:
    llvm/trunk/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll

Modified: llvm/trunk/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll?rev=101341&r1=101340&r2=101341&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll Wed Apr 14 23:31:42 2010
@@ -1,17 +1,15 @@
 ; RUN: llc < %s -march=x86-64
 
-	%struct.tempsym_t = type { i8*, i8*, i8*, i8*, i32, i32, i32, i32, i32 }
-
-define fastcc signext i8 @S_next_symbol(%struct.tempsym_t* %symptr) nounwind ssp {
+define fastcc void @S_next_symbol(i448* %P) nounwind ssp {
 entry:
 	br label %bb14
 
 bb14:		; preds = %bb
-	%srcval16 = load i448* null, align 8		; <i448> [#uses=1]
+	%srcval16 = load i448* %P, align 8		; <i448> [#uses=1]
 	%tmp = zext i32 undef to i448		; <i448> [#uses=1]
 	%tmp15 = shl i448 %tmp, 288		; <i448> [#uses=1]
 	%mask = and i448 %srcval16, -2135987035423586845985235064014169866455883682256196619149693890381755748887481053010428711403521		; <i448> [#uses=1]
 	%ins = or i448 %tmp15, %mask		; <i448> [#uses=1]
-	store i448 %ins, i448* null, align 8
-	ret i8 1
+	store i448 %ins, i448* %P, align 8
+	ret void
 }




From gohman at apple.com  Wed Apr 14 23:33:49 2010
From: gohman at apple.com (Dan Gohman)
Date: Thu, 15 Apr 2010 04:33:49 -0000
Subject: [llvm-commits] [llvm] r101342 - in /llvm/trunk:
 include/llvm/CodeGen/MachineFunction.h lib/CodeGen/ELFWriter.cpp
 lib/CodeGen/ELFWriter.h lib/CodeGen/MachineFunction.cpp
 lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
 lib/CodeGen/SelectionDAG/FunctionLoweringInfo.h
 lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
 lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
 lib/Target/ARM/ARMLoadStoreOptimizer.cpp
Message-ID: <20100415043349.956122A6C12C@llvm.org>

Author: djg
Date: Wed Apr 14 23:33:49 2010
New Revision: 101342

URL: http://llvm.org/viewvc/llvm-project?rev=101342&view=rev
Log:
Add more const qualifiers for LLVM IR pointers in CodeGen.

Modified:
    llvm/trunk/include/llvm/CodeGen/MachineFunction.h
    llvm/trunk/lib/CodeGen/ELFWriter.cpp
    llvm/trunk/lib/CodeGen/ELFWriter.h
    llvm/trunk/lib/CodeGen/MachineFunction.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.h
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
    llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp

Modified: llvm/trunk/include/llvm/CodeGen/MachineFunction.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineFunction.h?rev=101342&r1=101341&r2=101342&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineFunction.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineFunction.h Wed Apr 14 23:33:49 2010
@@ -70,7 +70,7 @@
 };
 
 class MachineFunction {
-  Function *Fn;
+  const Function *Fn;
   const TargetMachine &Target;
   MCContext &Ctx;
   MachineModuleInfo &MMI;
@@ -124,8 +124,8 @@
   MachineFunction(const MachineFunction &); // DO NOT IMPLEMENT
   void operator=(const MachineFunction&);   // DO NOT IMPLEMENT
 public:
-  MachineFunction(Function *Fn, const TargetMachine &TM, unsigned FunctionNum,
-                  MachineModuleInfo &MMI);
+  MachineFunction(const Function *Fn, const TargetMachine &TM,
+                  unsigned FunctionNum, MachineModuleInfo &MMI);
   ~MachineFunction();
 
   MachineModuleInfo &getMMI() const { return MMI; }
@@ -133,7 +133,7 @@
   
   /// getFunction - Return the LLVM function that this machine code represents
   ///
-  Function *getFunction() const { return Fn; }
+  const Function *getFunction() const { return Fn; }
 
   /// getFunctionNumber - Return a unique ID for the current function.
   ///

Modified: llvm/trunk/lib/CodeGen/ELFWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ELFWriter.cpp?rev=101342&r1=101341&r2=101342&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/ELFWriter.cpp (original)
+++ llvm/trunk/lib/CodeGen/ELFWriter.cpp Wed Apr 14 23:33:49 2010
@@ -208,7 +208,7 @@
 }
 
 // getTextSection - Get the text section for the specified function
-ELFSection &ELFWriter::getTextSection(Function *F) {
+ELFSection &ELFWriter::getTextSection(const Function *F) {
   const MCSectionELF *Text = 
     (const MCSectionELF *)TLOF.SectionForGlobal(F, Mang, TM);
   return getSection(Text->getSectionName(), Text->getType(), Text->getFlags());

Modified: llvm/trunk/lib/CodeGen/ELFWriter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ELFWriter.h?rev=101342&r1=101341&r2=101342&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/ELFWriter.h (original)
+++ llvm/trunk/lib/CodeGen/ELFWriter.h Wed Apr 14 23:33:49 2010
@@ -191,7 +191,7 @@
     ELFSection &getDtorSection();
     ELFSection &getJumpTableSection();
     ELFSection &getConstantPoolSection(MachineConstantPoolEntry &CPE);
-    ELFSection &getTextSection(Function *F);
+    ELFSection &getTextSection(const Function *F);
     ELFSection &getRelocSection(ELFSection &S);
 
     // Helpers for obtaining ELF specific info.

Modified: llvm/trunk/lib/CodeGen/MachineFunction.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineFunction.cpp?rev=101342&r1=101341&r2=101342&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineFunction.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineFunction.cpp Wed Apr 14 23:33:49 2010
@@ -51,7 +51,7 @@
   MBB->getParent()->DeleteMachineBasicBlock(MBB);
 }
 
-MachineFunction::MachineFunction(Function *F, const TargetMachine &TM,
+MachineFunction::MachineFunction(const Function *F, const TargetMachine &TM,
                                  unsigned FunctionNum, MachineModuleInfo &mmi)
   : Fn(F), Target(TM), Ctx(mmi.getContext()), MMI(mmi) {
   if (TM.getRegisterInfo())

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp?rev=101342&r1=101341&r2=101342&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp Wed Apr 14 23:33:49 2010
@@ -123,10 +123,11 @@
 /// isUsedOutsideOfDefiningBlock - Return true if this instruction is used by
 /// PHI nodes or outside of the basic block that defines it, or used by a
 /// switch or atomic instruction, which may expand to multiple basic blocks.
-static bool isUsedOutsideOfDefiningBlock(Instruction *I) {
+static bool isUsedOutsideOfDefiningBlock(const Instruction *I) {
   if (isa<PHINode>(I)) return true;
-  BasicBlock *BB = I->getParent();
-  for (Value::use_iterator UI = I->use_begin(), E = I->use_end(); UI != E; ++UI)
+  const BasicBlock *BB = I->getParent();
+  for (Value::const_use_iterator UI = I->use_begin(), E = I->use_end();
+        UI != E; ++UI)
     if (cast<Instruction>(*UI)->getParent() != BB || isa<PHINode>(*UI))
       return true;
   return false;
@@ -135,7 +136,7 @@
 /// isOnlyUsedInEntryBlock - If the specified argument is only used in the
 /// entry block, return true.  This includes arguments used by switches, since
 /// the switch may expand into multiple basic blocks.
-static bool isOnlyUsedInEntryBlock(Argument *A, bool EnableFastISel) {
+static bool isOnlyUsedInEntryBlock(const Argument *A, bool EnableFastISel) {
   // With FastISel active, we may be splitting blocks, so force creation
   // of virtual registers for all non-dead arguments.
   // Don't force virtual registers for byval arguments though, because
@@ -143,8 +144,9 @@
   if (EnableFastISel && !A->hasByValAttr())
     return A->use_empty();
 
-  BasicBlock *Entry = A->getParent()->begin();
-  for (Value::use_iterator UI = A->use_begin(), E = A->use_end(); UI != E; ++UI)
+  const BasicBlock *Entry = A->getParent()->begin();
+  for (Value::const_use_iterator UI = A->use_begin(), E = A->use_end();
+       UI != E; ++UI)
     if (cast<Instruction>(*UI)->getParent() != Entry || isa<SwitchInst>(*UI))
       return false;  // Use not in entry block.
   return true;
@@ -154,7 +156,7 @@
   : TLI(tli) {
 }
 
-void FunctionLoweringInfo::set(Function &fn, MachineFunction &mf,
+void FunctionLoweringInfo::set(const Function &fn, MachineFunction &mf,
                                bool EnableFastISel) {
   Fn = &fn;
   MF = &mf;
@@ -162,7 +164,7 @@
 
   // Create a vreg for each argument register that is not dead and is used
   // outside of the entry block for the function.
-  for (Function::arg_iterator AI = Fn->arg_begin(), E = Fn->arg_end();
+  for (Function::const_arg_iterator AI = Fn->arg_begin(), E = Fn->arg_end();
        AI != E; ++AI)
     if (!isOnlyUsedInEntryBlock(AI, EnableFastISel))
       InitializeRegForValue(AI);
@@ -170,10 +172,10 @@
   // Initialize the mapping of values to registers.  This is only set up for
   // instruction values that are used outside of the block that defines
   // them.
-  Function::iterator BB = Fn->begin(), EB = Fn->end();
-  for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ++I)
-    if (AllocaInst *AI = dyn_cast<AllocaInst>(I))
-      if (ConstantInt *CUI = dyn_cast<ConstantInt>(AI->getArraySize())) {
+  Function::const_iterator BB = Fn->begin(), EB = Fn->end();
+  for (BasicBlock::const_iterator I = BB->begin(), E = BB->end(); I != E; ++I)
+    if (const AllocaInst *AI = dyn_cast<AllocaInst>(I))
+      if (const ConstantInt *CUI = dyn_cast<ConstantInt>(AI->getArraySize())) {
         const Type *Ty = AI->getAllocatedType();
         uint64_t TySize = TLI.getTargetData()->getTypeAllocSize(Ty);
         unsigned Align =
@@ -187,7 +189,7 @@
       }
 
   for (; BB != EB; ++BB)
-    for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ++I)
+    for (BasicBlock::const_iterator I = BB->begin(), E = BB->end(); I != E; ++I)
       if (!I->use_empty() && isUsedOutsideOfDefiningBlock(I))
         if (!isa<AllocaInst>(I) ||
             !StaticAllocaMap.count(cast<AllocaInst>(I)))
@@ -209,9 +211,9 @@
 
     // Create Machine PHI nodes for LLVM PHI nodes, lowering them as
     // appropriate.
-    PHINode *PN;
+    const PHINode *PN;
     DebugLoc DL;
-    for (BasicBlock::iterator
+    for (BasicBlock::const_iterator
            I = BB->begin(), E = BB->end(); I != E; ++I) {
 
       PN = dyn_cast<PHINode>(I);
@@ -235,7 +237,7 @@
 
   // Mark landing pad blocks.
   for (BB = Fn->begin(); BB != EB; ++BB)
-    if (InvokeInst *Invoke = dyn_cast<InvokeInst>(BB->getTerminator()))
+    if (const InvokeInst *Invoke = dyn_cast<InvokeInst>(BB->getTerminator()))
       MBBMap[Invoke->getSuccessor(1)]->setIsLandingPad();
 }
 

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.h?rev=101342&r1=101341&r2=101342&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.h (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.h Wed Apr 14 23:33:49 2010
@@ -48,7 +48,7 @@
 class FunctionLoweringInfo {
 public:
   TargetLowering &TLI;
-  Function *Fn;
+  const Function *Fn;
   MachineFunction *MF;
   MachineRegisterInfo *RegInfo;
 
@@ -93,7 +93,7 @@
   /// set - Initialize this FunctionLoweringInfo with the given Function
   /// and its associated MachineFunction.
   ///
-  void set(Function &Fn, MachineFunction &MF, bool EnableFastISel);
+  void set(const Function &Fn, MachineFunction &MF, bool EnableFastISel);
 
   /// clear - Clear out all the function-specific state. This returns this
   /// FunctionLoweringInfo to an empty state, ready to be used for a

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=101342&r1=101341&r2=101342&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Wed Apr 14 23:33:49 2010
@@ -3610,7 +3610,7 @@
     if (Val == 0)
       return DAG.getConstantFP(1.0, LHS.getValueType());
 
-    Function *F = DAG.getMachineFunction().getFunction();
+    const Function *F = DAG.getMachineFunction().getFunction();
     if (!F->hasFnAttr(Attribute::OptimizeForSize) ||
         // If optimizing for size, don't insert too many multiplies.  This
         // inserts up to 5 multiplies.

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=101342&r1=101341&r2=101342&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Wed Apr 14 23:33:49 2010
@@ -195,7 +195,7 @@
   assert((!EnableFastISelAbort || EnableFastISel) &&
          "-fast-isel-abort requires -fast-isel");
 
-  Function &Fn = *mf.getFunction();
+  const Function &Fn = *mf.getFunction();
   const TargetInstrInfo &TII = *TM.getInstrInfo();
   const TargetRegisterInfo &TRI = *TM.getRegisterInfo();
 

Modified: llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp?rev=101342&r1=101341&r2=101342&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Wed Apr 14 23:33:49 2010
@@ -1358,7 +1358,7 @@
     return false;
 
   unsigned Align = (*Op0->memoperands_begin())->getAlignment();
-  Function *Func = MF->getFunction();
+  const Function *Func = MF->getFunction();
   unsigned ReqAlign = STI->hasV6Ops()
     ? TD->getPrefTypeAlignment(Type::getInt64Ty(Func->getContext())) 
     : 8;  // Pre-v6 need 8-byte align




From sabre at nondot.org  Wed Apr 14 23:48:01 2010
From: sabre at nondot.org (Chris Lattner)
Date: Thu, 15 Apr 2010 04:48:01 -0000
Subject: [llvm-commits] [llvm] r101343 - in /llvm/trunk:
 lib/CodeGen/SelectionDAG/DAGCombiner.cpp lib/Target/README.txt
 test/CodeGen/X86/store-narrow.ll
Message-ID: <20100415044801.E3CBA2A6C12C@llvm.org>

Author: lattner
Date: Wed Apr 14 23:48:01 2010
New Revision: 101343

URL: http://llvm.org/viewvc/llvm-project?rev=101343&view=rev
Log:
Implement rdar://7860110 (also in target/readme.txt) narrowing
a load/or/and/store sequence into a narrower store when it is
safe.  Daniel tells me that clang will start producing this sort
of thing with bitfields, and this does  trigger a few dozen times
on 176.gcc produced by llvm-gcc even now.

This compiles code like CodeGen/X86/2009-05-28-DAGCombineCrash.ll 
into:

        movl    %eax, 36(%rdi)

instead of:

        movl    $4294967295, %eax       ## imm = 0xFFFFFFFF
        andq    32(%rdi), %rax
        shlq    $32, %rcx
        addq    %rax, %rcx
        movq    %rcx, 32(%rdi)

and each of the testcases into a single store.  Each of them used
to compile into craziness like this:

_test4:
	movl	$65535, %eax            ## imm = 0xFFFF
	andl	(%rdi), %eax
	shll	$16, %esi
	addl	%eax, %esi
	movl	%esi, (%rdi)
	ret



Added:
    llvm/trunk/test/CodeGen/X86/store-narrow.ll
Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    llvm/trunk/lib/Target/README.txt

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=101343&r1=101342&r2=101343&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Wed Apr 14 23:48:01 2010
@@ -254,24 +254,28 @@
     /// looking for a better chain (aliasing node.)
     SDValue FindBetterChain(SDNode *N, SDValue Chain);
 
-    /// getShiftAmountTy - Returns a type large enough to hold any valid
-    /// shift amount - before type legalization these can be huge.
-    EVT getShiftAmountTy() {
-      return LegalTypes ?  TLI.getShiftAmountTy() : TLI.getPointerTy();
-    }
-
-public:
+  public:
     DAGCombiner(SelectionDAG &D, AliasAnalysis &A, CodeGenOpt::Level OL)
-      : DAG(D),
-        TLI(D.getTargetLoweringInfo()),
-        Level(Unrestricted),
-        OptLevel(OL),
-        LegalOperations(false),
-        LegalTypes(false),
-        AA(A) {}
+      : DAG(D), TLI(D.getTargetLoweringInfo()), Level(Unrestricted),
+        OptLevel(OL), LegalOperations(false), LegalTypes(false), AA(A) {}
 
     /// Run - runs the dag combiner on all nodes in the work list
     void Run(CombineLevel AtLevel);
+    
+    SelectionDAG &getDAG() const { return DAG; }
+    
+    /// getShiftAmountTy - Returns a type large enough to hold any valid
+    /// shift amount - before type legalization these can be huge.
+    EVT getShiftAmountTy() {
+      return LegalTypes ? TLI.getShiftAmountTy() : TLI.getPointerTy();
+    }
+    
+    /// isTypeLegal - This method returns true if we are running before type
+    /// legalization or if the specified VT is legal.
+    bool isTypeLegal(const EVT &VT) {
+      if (!LegalTypes) return true;
+      return TLI.isTypeLegal(VT);
+    }
   };
 }
 
@@ -3950,7 +3954,7 @@
       VT.isInteger() && !VT.isVector()) {
     unsigned OrigXWidth = N0.getOperand(1).getValueType().getSizeInBits();
     EVT IntXVT = EVT::getIntegerVT(*DAG.getContext(), OrigXWidth);
-    if (TLI.isTypeLegal(IntXVT) || !LegalTypes) {
+    if (isTypeLegal(IntXVT)) {
       SDValue X = DAG.getNode(ISD::BIT_CONVERT, N0.getDebugLoc(),
                               IntXVT, N0.getOperand(1));
       AddToWorkList(X.getNode());
@@ -4465,7 +4469,7 @@
   ConstantFPSDNode *N0CFP = dyn_cast<ConstantFPSDNode>(N0);
 
   // fold (fp_round_inreg c1fp) -> c1fp
-  if (N0CFP && (TLI.isTypeLegal(EVT) || !LegalTypes)) {
+  if (N0CFP && isTypeLegal(EVT)) {
     SDValue Round = DAG.getConstantFP(*N0CFP->getConstantFPValue(), EVT);
     return DAG.getNode(ISD::FP_EXTEND, N->getDebugLoc(), VT, Round);
   }
@@ -5146,6 +5150,123 @@
   return SDValue();
 }
 
+/// CheckForMaskedLoad - Check to see if V is (and load (ptr), imm), where the
+/// load is having specific bytes cleared out.  If so, return the byte size
+/// being masked out and the shift amount.
+static std::pair<unsigned, unsigned>
+CheckForMaskedLoad(SDValue V, SDValue Ptr, SDValue Chain) {
+  std::pair<unsigned, unsigned> Result(0, 0);
+  
+  // Check for the structure we're looking for.
+  if (V->getOpcode() != ISD::AND ||
+      !isa<ConstantSDNode>(V->getOperand(1)) ||
+      !ISD::isNormalLoad(V->getOperand(0).getNode()))
+    return Result;
+  
+  // Check the chain and pointer.  The store should be chained directly to the
+  // load (TODO: Or through a TF node!) since it's to the same address.
+  LoadSDNode *LD = cast<LoadSDNode>(V->getOperand(0));
+  if (LD->getBasePtr() != Ptr ||
+      V->getOperand(0).getNode() != Chain.getNode())
+    return Result;
+  
+  // This only handles simple types.
+  if (V.getValueType() != MVT::i16 &&
+      V.getValueType() != MVT::i32 &&
+      V.getValueType() != MVT::i64)
+    return Result;
+
+  // Check the constant mask.  Invert it so that the bits being masked out are
+  // 0 and the bits being kept are 1.  Use getSExtValue so that leading bits
+  // follow the sign bit for uniformity.
+  uint64_t NotMask = ~cast<ConstantSDNode>(V->getOperand(1))->getSExtValue();
+  unsigned NotMaskLZ = CountLeadingZeros_64(NotMask);
+  if (NotMaskLZ & 7) return Result;  // Must be multiple of a byte.
+  unsigned NotMaskTZ = CountTrailingZeros_64(NotMask);
+  if (NotMaskTZ & 7) return Result;  // Must be multiple of a byte.
+  if (NotMaskLZ == 64) return Result;  // All zero mask.
+  
+  // See if we have a continuous run of bits.  If so, we have 0*1+0*
+  if (CountTrailingOnes_64(NotMask >> NotMaskTZ)+NotMaskTZ+NotMaskLZ != 64)
+    return Result;
+
+  // Adjust NotMaskLZ down to be from the actual size of the int instead of i64.
+  if (V.getValueType() != MVT::i64 && NotMaskLZ)
+    NotMaskLZ -= 64-V.getValueSizeInBits();
+  
+  unsigned MaskedBytes = (V.getValueSizeInBits()-NotMaskLZ-NotMaskTZ)/8;
+  switch (MaskedBytes) {
+  case 1: 
+  case 2: 
+  case 4: break;
+  default: return Result; // All one mask, or 5-byte mask.
+  }
+  
+  // Verify that the first bit starts at a multiple of mask so that the access
+  // is aligned the same as the access width.
+  if (NotMaskTZ && NotMaskTZ/8 % MaskedBytes) return Result;
+  
+  Result.first = MaskedBytes;
+  Result.second = NotMaskTZ/8;
+  return Result;
+}
+
+
+/// ShrinkLoadReplaceStoreWithStore - Check to see if IVal is something that
+/// provides a value as specified by MaskInfo.  If so, replace the specified
+/// store with a narrower store of truncated IVal.
+static SDNode *
+ShrinkLoadReplaceStoreWithStore(const std::pair<unsigned, unsigned> &MaskInfo,
+                                SDValue IVal, StoreSDNode *St,
+                                DAGCombiner *DC) {
+  unsigned NumBytes = MaskInfo.first;
+  unsigned ByteShift = MaskInfo.second;
+  SelectionDAG &DAG = DC->getDAG();
+  
+  // Check to see if IVal is all zeros in the part being masked in by the 'or'
+  // that uses this.  If not, this is not a replacement.
+  APInt Mask = ~APInt::getBitsSet(IVal.getValueSizeInBits(),
+                                  ByteShift*8, (ByteShift+NumBytes)*8);
+  if (!DAG.MaskedValueIsZero(IVal, Mask)) return 0;
+  
+  // Check that it is legal on the target to do this.  It is legal if the new
+  // VT we're shrinking to (i8/i16/i32) is legal or we're still before type
+  // legalization.
+  MVT VT = MVT::getIntegerVT(NumBytes*8);
+  if (!DC->isTypeLegal(VT))
+    return 0;
+  
+  // Okay, we can do this!  Replace the 'St' store with a store of IVal that is
+  // shifted by ByteShift and truncated down to NumBytes.
+  if (ByteShift)
+    IVal = DAG.getNode(ISD::SRL, IVal->getDebugLoc(), IVal.getValueType(), IVal,
+                       DAG.getConstant(ByteShift*8, DC->getShiftAmountTy()));
+
+  // Figure out the offset for the store and the alignment of the access.
+  unsigned StOffset;
+  unsigned NewAlign = St->getAlignment();
+
+  if (DAG.getTargetLoweringInfo().isLittleEndian())
+    StOffset = ByteShift;
+  else
+    StOffset = IVal.getValueType().getStoreSize() - ByteShift - NumBytes;
+  
+  SDValue Ptr = St->getBasePtr();
+  if (StOffset) {
+    Ptr = DAG.getNode(ISD::ADD, IVal->getDebugLoc(), Ptr.getValueType(),
+                      Ptr, DAG.getConstant(StOffset, Ptr.getValueType()));
+    NewAlign = MinAlign(NewAlign, StOffset);
+  }
+  
+  // Truncate down to the new size.
+  IVal = DAG.getNode(ISD::TRUNCATE, IVal->getDebugLoc(), VT, IVal);
+  
+  ++OpsNarrowed;
+  return DAG.getStore(St->getChain(), St->getDebugLoc(), IVal, Ptr, 
+                      St->getSrcValue(), St->getSrcValueOffset()+StOffset,
+                      false, false, NewAlign).getNode();
+}
+
 
 /// ReduceLoadOpStoreWidth - Look for sequence of load / op / store where op is
 /// one of 'or', 'xor', and 'and' of immediates. If 'op' is only touching some
@@ -5165,6 +5286,28 @@
     return SDValue();
 
   unsigned Opc = Value.getOpcode();
+  
+  // If this is "store (or X, Y), P" and X is "(and (load P), cst)", where cst
+  // is a byte mask indicating a consecutive number of bytes, check to see if
+  // Y is known to provide just those bytes.  If so, we try to replace the
+  // load + replace + store sequence with a single (narrower) store, which makes
+  // the load dead.
+  if (Opc == ISD::OR) {
+    std::pair<unsigned, unsigned> MaskedLoad;
+    MaskedLoad = CheckForMaskedLoad(Value.getOperand(0), Ptr, Chain);
+    if (MaskedLoad.first)
+      if (SDNode *NewST = ShrinkLoadReplaceStoreWithStore(MaskedLoad,
+                                                  Value.getOperand(1), ST,this))
+        return SDValue(NewST, 0);
+                                           
+    // Or is commutative, so try swapping X and Y.
+    MaskedLoad = CheckForMaskedLoad(Value.getOperand(1), Ptr, Chain);
+    if (MaskedLoad.first)
+      if (SDNode *NewST = ShrinkLoadReplaceStoreWithStore(MaskedLoad,
+                                                  Value.getOperand(0), ST,this))
+        return SDValue(NewST, 0);
+  }
+  
   if ((Opc != ISD::OR && Opc != ISD::XOR && Opc != ISD::AND) ||
       Value.getOperand(1).getOpcode() != ISD::Constant)
     return SDValue();
@@ -5212,8 +5355,8 @@
         PtrOff = (BitWidth + 7 - NewBW) / 8 - PtrOff;
 
       unsigned NewAlign = MinAlign(LD->getAlignment(), PtrOff);
-      if (NewAlign <
-          TLI.getTargetData()->getABITypeAlignment(NewVT.getTypeForEVT(*DAG.getContext())))
+      const Type *NewVTTy = NewVT.getTypeForEVT(*DAG.getContext());
+      if (NewAlign < TLI.getTargetData()->getABITypeAlignment(NewVTTy))
         return SDValue();
 
       SDValue NewPtr = DAG.getNode(ISD::ADD, LD->getDebugLoc(),
@@ -5283,8 +5426,7 @@
       case MVT::ppcf128:
         break;
       case MVT::f32:
-        if (((TLI.isTypeLegal(MVT::i32) || !LegalTypes) && !LegalOperations &&
-             !ST->isVolatile()) ||
+        if ((isTypeLegal(MVT::i32) && !LegalOperations && !ST->isVolatile()) ||
             TLI.isOperationLegalOrCustom(ISD::STORE, MVT::i32)) {
           Tmp = DAG.getConstant((uint32_t)CFP->getValueAPF().
                               bitcastToAPInt().getZExtValue(), MVT::i32);
@@ -5295,7 +5437,7 @@
         }
         break;
       case MVT::f64:
-        if (((TLI.isTypeLegal(MVT::i64) || !LegalTypes) && !LegalOperations &&
+        if ((TLI.isTypeLegal(MVT::i64) && !LegalOperations &&
              !ST->isVolatile()) ||
             TLI.isOperationLegalOrCustom(ISD::STORE, MVT::i64)) {
           Tmp = DAG.getConstant(CFP->getValueAPF().bitcastToAPInt().
@@ -5660,7 +5802,7 @@
     }
 
     // Add count and size info.
-    if (!TLI.isTypeLegal(VT) && LegalTypes)
+    if (!isTypeLegal(VT))
       return SDValue();
 
     // Return the new VECTOR_SHUFFLE node.

Modified: llvm/trunk/lib/Target/README.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/README.txt?rev=101343&r1=101342&r2=101343&view=diff
==============================================================================
--- llvm/trunk/lib/Target/README.txt (original)
+++ llvm/trunk/lib/Target/README.txt Wed Apr 14 23:48:01 2010
@@ -263,19 +263,6 @@
 
 //===---------------------------------------------------------------------===//
 
-Turn this into a single byte store with no load (the other 3 bytes are
-unmodified):
-
-define void @test(i32* %P) {
-	%tmp = load i32* %P
-        %tmp14 = or i32 %tmp, 3305111552
-        %tmp15 = and i32 %tmp14, 3321888767
-        store i32 %tmp15, i32* %P
-        ret void
-}
-
-//===---------------------------------------------------------------------===//
-
 quantum_sigma_x in 462.libquantum contains the following loop:
 
       for(i=0; i<reg->size; i++)

Added: llvm/trunk/test/CodeGen/X86/store-narrow.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/store-narrow.ll?rev=101343&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/store-narrow.ll (added)
+++ llvm/trunk/test/CodeGen/X86/store-narrow.ll Wed Apr 14 23:48:01 2010
@@ -0,0 +1,81 @@
+; rdar://7860110
+; RUN: llc < %s | FileCheck %s
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
+target triple = "x86_64-apple-darwin10.2"
+
+define void @test1(i32* nocapture %a0, i8 zeroext %a1) nounwind ssp {
+entry:
+  %A = load i32* %a0, align 4
+  %B = and i32 %A, -256     ; 0xFFFFFF00
+  %C = zext i8 %a1 to i32
+  %D = or i32 %C, %B
+  store i32 %D, i32* %a0, align 4
+  ret void
+  
+; CHECK: test1:
+; CHECK: movb	%sil, (%rdi)
+}
+
+define void @test2(i32* nocapture %a0, i8 zeroext %a1) nounwind ssp {
+entry:
+  %A = load i32* %a0, align 4
+  %B = and i32 %A, -65281    ; 0xFFFF00FF
+  %C = zext i8 %a1 to i32
+  %CS = shl i32 %C, 8
+  %D = or i32 %B, %CS
+  store i32 %D, i32* %a0, align 4
+  ret void
+; CHECK: test2:
+; CHECK: movb	%sil, 1(%rdi)
+}
+
+define void @test3(i32* nocapture %a0, i16 zeroext %a1) nounwind ssp {
+entry:
+  %A = load i32* %a0, align 4
+  %B = and i32 %A, -65536    ; 0xFFFF0000
+  %C = zext i16 %a1 to i32
+  %D = or i32 %B, %C
+  store i32 %D, i32* %a0, align 4
+  ret void
+; CHECK: test3:
+; CHECK: movw	%si, (%rdi)
+}
+
+define void @test4(i32* nocapture %a0, i16 zeroext %a1) nounwind ssp {
+entry:
+  %A = load i32* %a0, align 4
+  %B = and i32 %A, 65535    ; 0x0000FFFF
+  %C = zext i16 %a1 to i32
+  %CS = shl i32 %C, 16
+  %D = or i32 %B, %CS
+  store i32 %D, i32* %a0, align 4
+  ret void
+; CHECK: test4:
+; CHECK: movw	%si, 2(%rdi)
+}
+
+define void @test5(i64* nocapture %a0, i16 zeroext %a1) nounwind ssp {
+entry:
+  %A = load i64* %a0, align 4
+  %B = and i64 %A, -4294901761    ; 0xFFFFFFFF0000FFFF
+  %C = zext i16 %a1 to i64
+  %CS = shl i64 %C, 16
+  %D = or i64 %B, %CS
+  store i64 %D, i64* %a0, align 4
+  ret void
+; CHECK: test5:
+; CHECK: movw	%si, 2(%rdi)
+}
+
+define void @test6(i64* nocapture %a0, i8 zeroext %a1) nounwind ssp {
+entry:
+  %A = load i64* %a0, align 4
+  %B = and i64 %A, -280375465082881    ; 0xFFFF00FFFFFFFFFF
+  %C = zext i8 %a1 to i64
+  %CS = shl i64 %C, 40
+  %D = or i64 %B, %CS
+  store i64 %D, i64* %a0, align 4
+  ret void
+; CHECK: test6:
+; CHECK: movb	%sil, 5(%rdi)
+}




From sabre at nondot.org  Thu Apr 15 00:28:43 2010
From: sabre at nondot.org (Chris Lattner)
Date: Thu, 15 Apr 2010 05:28:43 -0000
Subject: [llvm-commits] [llvm] r101348 - in /llvm/trunk:
 lib/CodeGen/SelectionDAG/DAGCombiner.cpp test/CodeGen/ARM/sbfx.ll
Message-ID: <20100415052843.E5D112A6C12C@llvm.org>

Author: lattner
Date: Thu Apr 15 00:28:43 2010
New Revision: 101348

URL: http://llvm.org/viewvc/llvm-project?rev=101348&view=rev
Log:
add a simple dag combine to replace trivial shl+lshr with
and.  This happens with the store->load narrowing stuff.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    llvm/trunk/test/CodeGen/ARM/sbfx.ll

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=101348&r1=101347&r2=101348&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Thu Apr 15 00:28:43 2010
@@ -2735,6 +2735,15 @@
     return DAG.getNode(ISD::SRL, N->getDebugLoc(), VT, N0.getOperand(0),
                        DAG.getConstant(c1 + c2, N1.getValueType()));
   }
+  
+  // fold (srl (shl x, c), c) -> (and x, cst2)
+  if (N1C && N0.getOpcode() == ISD::SHL && N0.getOperand(1) == N1 &&
+      N0.getValueSizeInBits() <= 64) {
+    uint64_t ShAmt = N1C->getZExtValue()+64-N0.getValueSizeInBits();
+    return DAG.getNode(ISD::AND, N->getDebugLoc(), VT, N0.getOperand(0),
+                       DAG.getConstant(~0ULL >> ShAmt, VT));
+  }
+  
 
   // fold (srl (anyextend x), c) -> (anyextend (srl x, c))
   if (N1C && N0.getOpcode() == ISD::ANY_EXTEND) {

Modified: llvm/trunk/test/CodeGen/ARM/sbfx.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/sbfx.ll?rev=101348&r1=101347&r2=101348&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/sbfx.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/sbfx.ll Thu Apr 15 00:28:43 2010
@@ -12,7 +12,7 @@
 define i32 @f2(i32 %a) {
 entry:
 ; CHECK: f2:
-; CHECK: ubfx r0, r0, #0, #20
+; CHECK: bfc	r0, #20, #12
     %tmp = shl i32 %a, 12
     %tmp2 = lshr i32 %tmp, 12
     ret i32 %tmp2




From sabre at nondot.org  Thu Apr 15 00:40:59 2010
From: sabre at nondot.org (Chris Lattner)
Date: Thu, 15 Apr 2010 05:40:59 -0000
Subject: [llvm-commits] [llvm] r101350 - in /llvm/trunk:
 lib/CodeGen/SelectionDAG/DAGCombiner.cpp test/CodeGen/X86/store-narrow.ll
Message-ID: <20100415054059.55F2E2A6C12C@llvm.org>

Author: lattner
Date: Thu Apr 15 00:40:59 2010
New Revision: 101350

URL: http://llvm.org/viewvc/llvm-project?rev=101350&view=rev
Log:
teach codegen to turn trunc(zextload) into load when possible.
This doesn't occur much at all, it only seems to formed in the case
when the trunc optimization kicks in due to phase ordering.  In that
case it is saves a few bytes on x86-32.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    llvm/trunk/test/CodeGen/X86/store-narrow.ll

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=101350&r1=101349&r2=101350&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Thu Apr 15 00:40:59 2010
@@ -3637,7 +3637,7 @@
   // Do not generate loads of non-round integer types since these can
   // be expensive (and would be wrong if the type is not byte sized).
   if (isa<LoadSDNode>(N0) && N0.hasOneUse() && ExtVT.isRound() &&
-      cast<LoadSDNode>(N0)->getMemoryVT().getSizeInBits() > EVTBits &&
+      cast<LoadSDNode>(N0)->getMemoryVT().getSizeInBits() >= EVTBits &&
       // Do not change the width of a volatile load.
       !cast<LoadSDNode>(N0)->isVolatile()) {
     LoadSDNode *LN0 = cast<LoadSDNode>(N0);

Modified: llvm/trunk/test/CodeGen/X86/store-narrow.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/store-narrow.ll?rev=101350&r1=101349&r2=101350&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/store-narrow.ll (original)
+++ llvm/trunk/test/CodeGen/X86/store-narrow.ll Thu Apr 15 00:40:59 2010
@@ -1,5 +1,6 @@
 ; rdar://7860110
-; RUN: llc < %s | FileCheck %s
+; RUN: llc < %s | FileCheck %s -check-prefix=X64
+; RUN: llc -march=x86 < %s | FileCheck %s -check-prefix=X32
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
 target triple = "x86_64-apple-darwin10.2"
 
@@ -12,8 +13,12 @@
   store i32 %D, i32* %a0, align 4
   ret void
   
-; CHECK: test1:
-; CHECK: movb	%sil, (%rdi)
+; X64: test1:
+; X64: movb	%sil, (%rdi)
+
+; X32: test1:
+; X32: movb	8(%esp), %al
+; X32: movb	%al, (%{{.*}})
 }
 
 define void @test2(i32* nocapture %a0, i8 zeroext %a1) nounwind ssp {
@@ -25,8 +30,12 @@
   %D = or i32 %B, %CS
   store i32 %D, i32* %a0, align 4
   ret void
-; CHECK: test2:
-; CHECK: movb	%sil, 1(%rdi)
+; X64: test2:
+; X64: movb	%sil, 1(%rdi)
+
+; X32: test2:
+; X32: movb	8(%esp), %al
+; X32: movb	%al, 1(%{{.*}})
 }
 
 define void @test3(i32* nocapture %a0, i16 zeroext %a1) nounwind ssp {
@@ -37,8 +46,12 @@
   %D = or i32 %B, %C
   store i32 %D, i32* %a0, align 4
   ret void
-; CHECK: test3:
-; CHECK: movw	%si, (%rdi)
+; X64: test3:
+; X64: movw	%si, (%rdi)
+
+; X32: test3:
+; X32: movw	8(%esp), %ax
+; X32: movw	%ax, (%{{.*}})
 }
 
 define void @test4(i32* nocapture %a0, i16 zeroext %a1) nounwind ssp {
@@ -50,8 +63,12 @@
   %D = or i32 %B, %CS
   store i32 %D, i32* %a0, align 4
   ret void
-; CHECK: test4:
-; CHECK: movw	%si, 2(%rdi)
+; X64: test4:
+; X64: movw	%si, 2(%rdi)
+
+; X32: test4:
+; X32: movw	8(%esp), %ax
+; X32: movw	%ax, 2(%{{.*}})
 }
 
 define void @test5(i64* nocapture %a0, i16 zeroext %a1) nounwind ssp {
@@ -63,8 +80,12 @@
   %D = or i64 %B, %CS
   store i64 %D, i64* %a0, align 4
   ret void
-; CHECK: test5:
-; CHECK: movw	%si, 2(%rdi)
+; X64: test5:
+; X64: movw	%si, 2(%rdi)
+
+; X32: test5:
+; X32: movw	8(%esp), %ax
+; X32: movw	%ax, 2(%{{.*}})
 }
 
 define void @test6(i64* nocapture %a0, i8 zeroext %a1) nounwind ssp {
@@ -76,6 +97,11 @@
   %D = or i64 %B, %CS
   store i64 %D, i64* %a0, align 4
   ret void
-; CHECK: test6:
-; CHECK: movb	%sil, 5(%rdi)
+; X64: test6:
+; X64: movb	%sil, 5(%rdi)
+
+
+; X32: test6:
+; X32: movb	8(%esp), %al
+; X32: movb	%al, 5(%{{.*}})
 }




From sabre at nondot.org  Thu Apr 15 01:10:50 2010
From: sabre at nondot.org (Chris Lattner)
Date: Thu, 15 Apr 2010 06:10:50 -0000
Subject: [llvm-commits] [llvm] r101355 - in /llvm/trunk:
 lib/CodeGen/SelectionDAG/DAGCombiner.cpp test/CodeGen/X86/store-narrow.ll
Message-ID: <20100415061050.2024C2A6C12C@llvm.org>

Author: lattner
Date: Thu Apr 15 01:10:49 2010
New Revision: 101355

URL: http://llvm.org/viewvc/llvm-project?rev=101355&view=rev
Log:
enhance the load/store narrowing optimization to handle a
tokenfactor in between the load/store.  This allows us to 
optimize test7 into:

_test7:                                 ## @test7
## BB#0:                                ## %entry
	movl	(%rdx), %eax
                                        ## kill: SIL<def> ESI<kill>
	movb	%sil, 5(%rdi)
	ret

instead of:

_test7:                                 ## @test7
## BB#0:                                ## %entry
	movl	4(%esp), %ecx
	movl	$-65281, %eax           ## imm = 0xFFFFFFFFFFFF00FF
	andl	4(%ecx), %eax
	movzbl	8(%esp), %edx
	shll	$8, %edx
	addl	%eax, %edx
	movl	12(%esp), %eax
	movl	(%eax), %eax
	movl	%edx, 4(%ecx)
	ret


Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    llvm/trunk/test/CodeGen/X86/store-narrow.ll

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=101355&r1=101354&r2=101355&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Thu Apr 15 01:10:49 2010
@@ -5172,12 +5172,25 @@
       !ISD::isNormalLoad(V->getOperand(0).getNode()))
     return Result;
   
-  // Check the chain and pointer.  The store should be chained directly to the
-  // load (TODO: Or through a TF node!) since it's to the same address.
+  // Check the chain and pointer.
   LoadSDNode *LD = cast<LoadSDNode>(V->getOperand(0));
-  if (LD->getBasePtr() != Ptr ||
-      V->getOperand(0).getNode() != Chain.getNode())
-    return Result;
+  if (LD->getBasePtr() != Ptr) return Result;  // Not from same pointer.
+  
+  // The store should be chained directly to the load or be an operand of a
+  // tokenfactor.
+  if (LD == Chain.getNode())
+    ; // ok.
+  else if (Chain->getOpcode() != ISD::TokenFactor)
+    return Result; // Fail.
+  else {
+    bool isOk = false;
+    for (unsigned i = 0, e = Chain->getNumOperands(); i != e; ++i)
+      if (Chain->getOperand(i).getNode() == LD) {
+        isOk = true;
+        break;
+      }
+    if (!isOk) return Result;
+  }
   
   // This only handles simple types.
   if (V.getValueType() != MVT::i16 &&

Modified: llvm/trunk/test/CodeGen/X86/store-narrow.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/store-narrow.ll?rev=101355&r1=101354&r2=101355&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/store-narrow.ll (original)
+++ llvm/trunk/test/CodeGen/X86/store-narrow.ll Thu Apr 15 01:10:49 2010
@@ -105,3 +105,23 @@
 ; X32: movb	8(%esp), %al
 ; X32: movb	%al, 5(%{{.*}})
 }
+
+define i32 @test7(i64* nocapture %a0, i8 zeroext %a1, i32* %P2) nounwind {
+entry:
+  %OtherLoad = load i32 *%P2
+  %A = load i64* %a0, align 4
+  %B = and i64 %A, -280375465082881    ; 0xFFFF00FFFFFFFFFF
+  %C = zext i8 %a1 to i64
+  %CS = shl i64 %C, 40
+  %D = or i64 %B, %CS
+  store i64 %D, i64* %a0, align 4
+  ret i32 %OtherLoad
+; X64: test7:
+; X64: movb	%sil, 5(%rdi)
+
+
+; X32: test7:
+; X32: movb	8(%esp), %cl
+; X32: movb	%cl, 5(%{{.*}})
+}
+




From baldrick at free.fr  Thu Apr 15 01:55:46 2010
From: baldrick at free.fr (Duncan Sands)
Date: Thu, 15 Apr 2010 06:55:46 -0000
Subject: [llvm-commits] [dragonegg] r101360 - in /dragonegg/trunk:
	llvm-convert.cpp llvm-internal.h
Message-ID: <20100415065546.33B6B2A6C12C@llvm.org>

Author: baldrick
Date: Thu Apr 15 01:55:46 2010
New Revision: 101360

URL: http://llvm.org/viewvc/llvm-project?rev=101360&view=rev
Log:
If an exception is thrown in a must-not-throw region, then arrange
for control to branch to the block calling std::terminate (or the
language equivalent).

Modified:
    dragonegg/trunk/llvm-convert.cpp
    dragonegg/trunk/llvm-internal.h

Modified: dragonegg/trunk/llvm-convert.cpp
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/llvm-convert.cpp?rev=101360&r1=101359&r2=101360&view=diff
==============================================================================
--- dragonegg/trunk/llvm-convert.cpp (original)
+++ dragonegg/trunk/llvm-convert.cpp Thu Apr 15 01:55:46 2010
@@ -991,7 +991,7 @@
 
   // Now that phi nodes have been output, emit pending exception handling code.
   EmitLandingPads();
-  EmitFailureCode();
+  EmitFailureBlocks();
   EmitRewindBlock();
 
 #ifndef NDEBUG
@@ -1872,19 +1872,33 @@
   return ExceptionFilter;
 }
 
+/// getFailureBlock - Return the basic block containing the failure code for
+/// the given exception handling region, creating it if necessary.
+BasicBlock *TreeToLLVM::getFailureBlock(unsigned RegionNo) {
+  if (RegionNo >= FailureBlocks.size())
+    FailureBlocks.resize(RegionNo + 1, 0);
+
+  BasicBlock *&FailureBlock = FailureBlocks[RegionNo];
+
+  if (!FailureBlock)
+    FailureBlock = BasicBlock::Create(Context, "fail");
+
+  return FailureBlock;
+}
+
 /// EmitLandingPads - Emit EH landing pads.
 void TreeToLLVM::EmitLandingPads() {
   // If there are no invokes then there is nothing to do.
-  if (Invokes.empty())
+  if (NormalInvokes.empty())
     return;
 
   // If a GCC post landing pad is shared by several exception handling regions,
   // or if there is a normal edge to it, then create LLVM landing pads for each
   // eh region.  Calls to eh.exception and eh.selector will then go in the LLVM
   // landing pad, which branches to the GCC post landing pad.
-  for (unsigned LPadNo = 1; LPadNo < Invokes.size(); ++LPadNo) {
+  for (unsigned LPadNo = 1; LPadNo < NormalInvokes.size(); ++LPadNo) {
     // Get the list of invokes for this GCC landing pad.
-    SmallVector<InvokeInst *, 8> &InvokesForPad = Invokes[LPadNo];
+    SmallVector<InvokeInst *, 8> &InvokesForPad = NormalInvokes[LPadNo];
 
     if (InvokesForPad.empty())
       continue;
@@ -1955,11 +1969,11 @@
   std::vector<Value*> Args;
   Function *ExcIntr = Intrinsic::getDeclaration(TheModule,
                                                 Intrinsic::eh_exception);
-  Function *SelectorIntr = Intrinsic::getDeclaration(TheModule,
-                                                     Intrinsic::eh_selector);
-  for (unsigned LPadNo = 1; LPadNo < Invokes.size(); ++LPadNo) {
+  Function *SlctrIntr = Intrinsic::getDeclaration(TheModule,
+                                                  Intrinsic::eh_selector);
+  for (unsigned LPadNo = 1; LPadNo < NormalInvokes.size(); ++LPadNo) {
     // Get the list of invokes for this GCC landing pad.
-    SmallVector<InvokeInst *, 8> &InvokesForPad = Invokes[LPadNo];
+    SmallVector<InvokeInst *, 8> &InvokesForPad = NormalInvokes[LPadNo];
 
     if (InvokesForPad.empty())
       continue;
@@ -2084,7 +2098,7 @@
       Args.push_back(CatchAll);
 
     // Emit the selector call.
-    Value *Filter = Builder.CreateCall(SelectorIntr, Args.begin(), Args.end(),
+    Value *Filter = Builder.CreateCall(SlctrIntr, Args.begin(), Args.end(),
                                        "filter");
 
     // Store it if made use of elsewhere.
@@ -2094,24 +2108,97 @@
     Args.clear();
   }
 
-  Invokes.clear();
+  NormalInvokes.clear();
 }
 
-/// EmitFailureCode - Emit the blocks containing failure code executed when
+/// EmitFailureBlocks - Emit the blocks containing failure code executed when
 /// an exception is thrown in a must-not-throw region.
-void TreeToLLVM::EmitFailureCode() {
-  for (DenseMap<tree, BasicBlock *>::iterator I = FailureCode.begin(),
-       E = FailureCode.end(); I != E; ++I) {
-    BeginBlock(I->second);
+void TreeToLLVM::EmitFailureBlocks() {
+  for (unsigned RegionNo = 1; RegionNo < FailureBlocks.size(); ++RegionNo) {
+    BasicBlock *FailureBlock = FailureBlocks[RegionNo];
+
+    if (!FailureBlock)
+      continue;
+
+    eh_region region = get_eh_region_from_number(RegionNo);
+    assert(region->type == ERT_MUST_NOT_THROW && "Unexpected region type!");
+
+    // Check whether all predecessors are invokes or not.  Nothing exotic can
+    // occur here, only direct branches and unwinding via an invoke.
+    bool hasBranchPred = false;
+    bool hasInvokePred = false;
+    for (pred_iterator I = pred_begin(FailureBlock), E = pred_end(FailureBlock);
+         I != E && (!hasInvokePred || !hasBranchPred); ++I) {
+      TerminatorInst *T = (*I)->getTerminator();
+      if (isa<InvokeInst>(T)) {
+        assert(FailureBlock != T->getSuccessor(0) && "Expected unwind target!");
+        hasInvokePred = true;
+      } else {
+        assert(isa<BranchInst>(T) && "Wrong kind of failure predecessor!");
+        hasBranchPred = true;
+      }
+    }
+    assert((hasBranchPred || hasInvokePred) && "No predecessors!");
+
+    // Determine the landing pad that invokes will unwind to.  If there are no
+    // invokes, then there is no landing pad.
+    BasicBlock *LandingPad = NULL;
+    if (hasInvokePred) {
+      // If all predecessors are invokes, then the failure block can be used as
+      // the landing pad.  Otherwise, create a landing pad.
+      if (hasBranchPred)
+        LandingPad = BasicBlock::Create(Context, "pad");
+      else
+        LandingPad = FailureBlock;
+    }
+
+    if (LandingPad) {
+      BeginBlock(LandingPad);
+
+      // Generate an empty (i.e. catch-all) filter in the landing pad.
+      Function *ExcIntr = Intrinsic::getDeclaration(TheModule,
+                                                    Intrinsic::eh_exception);
+      Function *SlctrIntr = Intrinsic::getDeclaration(TheModule,
+                                                      Intrinsic::eh_selector);
+      Value *Args[3];
+      // The exception pointer.
+      Args[0] = Builder.CreateCall(ExcIntr, "exc_ptr");
+      // The personality function.
+      tree personality = DECL_FUNCTION_PERSONALITY(FnDecl);
+      assert(personality && "No-throw region but no personality function!");
+      Args[1] = Builder.CreateBitCast(DECL_LLVM(personality),
+                                      Type::getInt8PtrTy(Context));
+      // One more than the filter length.
+      Args[2] = ConstantInt::get(Type::getInt32Ty(Context), 1);
+      // Create the selector call.
+      Builder.CreateCall(SlctrIntr, Args, Args + 3, "filter");
+
+      if (LandingPad != FailureBlock) {
+        // Make sure all invokes unwind to the new landing pad.
+        for (pred_iterator I = pred_begin(FailureBlock),
+             E = pred_end(FailureBlock); I != E; ) {
+          TerminatorInst *T = (*I++)->getTerminator();
+          if (isa<InvokeInst>(T))
+            T->setSuccessor(1, LandingPad);
+        }
+
+        // Branch to the failure block at the end of the landing pad.
+        Builder.CreateBr(FailureBlock);
+      }
+    }
+
+    if (LandingPad != FailureBlock)
+      BeginBlock(FailureBlock);
 
     // Determine the failure function to call.
-    Value *FailFunc = DECL_LLVM(I->first);
+    Value *FailFunc = DECL_LLVM(region->u.must_not_throw.failure_decl);
 
     // Make sure it has the right type.
     FunctionType *FTy = FunctionType::get(Type::getVoidTy(Context), false);
     FailFunc = Builder.CreateBitCast(FailFunc, FTy->getPointerTo());
 
     // Spank the user for being naughty.
+    // TODO: Set the correct debug location.
     CallInst *FailCall = Builder.CreateCall(FailFunc);
 
     // This is always fatal.
@@ -2650,8 +2737,8 @@
     // an invoke rather than a simple call.
     LPadNo = lookup_stmt_eh_lp(stmt);
 
-    // Is the call in an exception handling region with a landing pad?
     if (LPadNo > 0) {
+      // The call is in an exception handling region with a landing pad.
       // Generate an invoke, with the GCC landing pad as the unwind destination.
       // The destination may change to an LLVM only landing pad,  which precedes
       // the GCC one, after phi nodes have been populated (doing things this way
@@ -2659,6 +2746,14 @@
       eh_landing_pad lp = get_eh_landing_pad_from_number(LPadNo);
       assert(lp && "Post landing pad not found!");
       LandingPad = getLabelDeclBlock(lp->post_landing_pad);
+    } else if (LPadNo < 0) {
+      eh_region region = get_eh_region_from_lp_number(LPadNo);
+      // The call is in a must-not-throw region.  Generate an invoke that causes
+      // the region's failure code to be run if an exception is thrown.
+      assert(region->type == ERT_MUST_NOT_THROW && "Unexpected region type!");
+
+      // Unwind to the block containing the failure code.
+      LandingPad = getFailureBlock(region->index);
     }
   }
 
@@ -2776,14 +2871,15 @@
     cast<InvokeInst>(Call)->setCallingConv(CallingConvention);
     cast<InvokeInst>(Call)->setAttributes(PAL);
 
-    // The invoke's destination may change to an LLVM only landing pad, which
-    // precedes the GCC one, after phi nodes have been populated (doing things
-    // this way simplifies the generation of phi nodes).  Record the invoke as
-    // well as the GCC exception handling region.
-    assert(LPadNo > 0 && "Invoke but no GCC landing pad?");
-    if ((unsigned)LPadNo >= Invokes.size())
-      Invokes.resize(LPadNo + 1);
-    Invokes[LPadNo].push_back(cast<InvokeInst>(Call));
+    if (LPadNo > 0) {
+      // The invoke's destination may change to an LLVM only landing pad, which
+      // precedes the GCC one, after phi nodes have been populated (doing things
+      // this way simplifies the generation of phi nodes).  Record the invoke as
+      // well as the GCC exception handling region.
+      if ((unsigned)LPadNo >= NormalInvokes.size())
+        NormalInvokes.resize(LPadNo + 1);
+      NormalInvokes[LPadNo].push_back(cast<InvokeInst>(Call));
+    }
 
     BeginBlock(NextBlock);
   }
@@ -7149,14 +7245,8 @@
       // call to the failure routine (eg: std::terminate).
       assert(dst_rgn->type == ERT_MUST_NOT_THROW && "Unexpected region type!");
 
-      // Look up the block containing the failure code.
-      tree failfunc = dst_rgn->u.must_not_throw.failure_decl;
-      BasicBlock *&FailureBlock = FailureCode[failfunc];
-      if (!FailureBlock)
-        FailureBlock = BasicBlock::Create(Context, "fail");
-
-      // Branch to it.
-      Builder.CreateBr(FailureBlock);
+      // Branch to the block containing the failure code.
+      Builder.CreateBr(getFailureBlock(dst_rgn->index));
       return;
     }
 

Modified: dragonegg/trunk/llvm-internal.h
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/llvm-internal.h?rev=101360&r1=101359&r2=101360&view=diff
==============================================================================
--- dragonegg/trunk/llvm-internal.h (original)
+++ dragonegg/trunk/llvm-internal.h Thu Apr 15 01:55:46 2010
@@ -422,19 +422,22 @@
 
   //===---------------------- Exception Handling --------------------------===//
 
-  /// Invokes - The list of invoke instructions for a given landing pad.
-  SmallVector<SmallVector<InvokeInst *, 8>, 16> Invokes;
+  /// NormalInvokes - Mapping from landing pad number to the set of invoke
+  /// instructions that unwind to that landing pad.
+  SmallVector<SmallVector<InvokeInst *, 8>, 16> NormalInvokes;
 
-  /// ExceptionPtrs - The local holding the exception pointer for an EH region.
+  /// ExceptionPtrs - Mapping from EH region index to the local holding the
+  /// exception pointer for that region.
   SmallVector<AllocaInst *, 16> ExceptionPtrs;
 
-  /// ExceptionFilters - The local holding the filter value for an EH region.
+  /// ExceptionFilters - Mapping from EH region index to the local holding the
+  /// filter value for that region.
   SmallVector<AllocaInst *, 16> ExceptionFilters;
 
-  /// FailureCode - The block holding the failure call for the given failure
-  /// function declaration (for must-not-throw regions - this is what is called
-  /// if an exception is nonetheless thrown).
-  DenseMap<tree_node *, BasicBlock *> FailureCode;
+  /// FailureBlocks - Mapping from the index of a must-not-throw EH region to
+  /// the block containing the failure code for the region (the code that is
+  /// run if an exception is thrown in this region).
+  SmallVector<BasicBlock *, 16> FailureBlocks;
 
   /// RewindBB - Block containing code that continues unwinding an exception.
   BasicBlock *RewindBB;
@@ -554,9 +557,9 @@
   /// EmitLandingPads - Emit EH landing pads.
   void EmitLandingPads();
 
-  /// EmitFailureCode - Emit the blocks containing failure code executed when
+  /// EmitFailureBlocks - Emit the blocks containing failure code executed when
   /// an exception is thrown in a must-not-throw region.
-  void EmitFailureCode();
+  void EmitFailureBlocks();
 
   /// EmitRewindBlock - Emit the block containing code to continue unwinding an
   /// exception.
@@ -580,6 +583,10 @@
   /// given exception handling region, creating it if necessary.
   AllocaInst *getExceptionFilter(unsigned RegionNo);
 
+  /// getFailureBlock - Return the basic block containing the failure code for
+  /// the given exception handling region, creating it if necessary.
+  BasicBlock *getFailureBlock(unsigned RegionNo);
+
 private:
   void EmitAutomaticVariableDecl(tree_node *decl);
 




From baldrick at free.fr  Thu Apr 15 02:45:15 2010
From: baldrick at free.fr (Duncan Sands)
Date: Thu, 15 Apr 2010 07:45:15 -0000
Subject: [llvm-commits] [dragonegg] r101361 - /dragonegg/trunk/README
Message-ID: <20100415074515.EE9792A6C12D@llvm.org>

Author: baldrick
Date: Thu Apr 15 02:45:15 2010
New Revision: 101361

URL: http://llvm.org/viewvc/llvm-project?rev=101361&view=rev
Log:
Tweak the build instructions.

Modified:
    dragonegg/trunk/README

Modified: dragonegg/trunk/README
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/README?rev=101361&r1=101360&r2=101361&view=diff
==============================================================================
--- dragonegg/trunk/README (original)
+++ dragonegg/trunk/README Thu Apr 15 02:45:15 2010
@@ -11,34 +11,45 @@
 Step 1: Build gcc
 -----------------
 
-Check out gcc from the gcc subversion repository:
+Check out gcc from the gcc subversion repository, either gcc mainline:
   svn checkout svn://gcc.gnu.org/svn/gcc/trunk SomeLocalDir
+or the gcc-4.5 branch:
+  svn checkout svn://gcc.gnu.org/svn/gcc/branches/gcc-4_5-branch SomeLocalDir
+
 Apply the patches in the gcc-patches subdirectory, if any.  The following
 command should do the trick ("SomeLocalDir" is where you checked out gcc):
   cat gcc-patches/*.diff | patch -d SomeLocalDir -p1
-Hopefully one day the plugin will work with an unpatched gcc, but for the
-moment a small patch needs to be applied.  Configure gcc with your favorite
-options and also with --enable-plugin and --enable-lto.  Build gcc and install
-it somewhere.  If you don't have libelf installed then the build will fail,
-because gcc's LTO code makes use of it, see
+
+Configure gcc with your favorite options and also with --enable-plugin and
+--enable-lto.  Build gcc and install it somewhere.  If you don't have libelf
+installed then the build will fail, because gcc's LTO code makes use of it,
+see
   http://gcc.gnu.org/wiki/LinkTimeOptimization#Building_the_branch
+In theory the gcc you build can be a cross-compiler, and the plugin should work
+and build code for the targetted platform.  I don't think anyone has ever tried
+this though.
 
 Darwin special: the gcc configure script thinks darwin doesn't support dynamic
-libraries and concludes that plugins won't work.  Delete or improve the check.
-If you improve it, please send your patch to the gcc developers!
+libraries and concludes that plugins won't work.  You can find patches to fix
+this here:
+http://gcc.gnu.org/ml/gcc-patches/2010-04/msg00610.html
 
 Step 2: Build the plugin
 ------------------------
 
 Build the plugin like this:
   GCC=PATH_TO_JUST_INSTALLED_GCC make
-If the gcc installed in step 1 occurs in your path with the name gcc-4.5 (maybe
-via a symbolic link) then you can build the plugin like this:
+The plugin needs to know about the version of gcc it will be loaded into, which
+is why you need to specify the gcc installed in step 1 via the GCC variable like
+this.  If you have arranged for the new gcc to occur in your path with the name
+gcc-4.5 (using a symbolic link for example) then you can build the plugin using:
   make
+The plugin is compiled using the system compiler, and not with the gcc specified
+in the GCC variable (which wouldn't work if you built a cross compiler).  If you
+want to also compile the plugin with the new gcc, you can do:
+  CC=PATH_TO_JUST_INSTALLED_GCC CXX=PATH_TO_JUST_INSTALLED_GCC GCC=PATH_TO_JUST_INSTALLED_GCC make
 The end result of the build is a shared library, dragonegg.so.
 
-Darwin special: "-shared" doesn't result in a correct dynamic library on darwin,
-use "-Wl,-flat_namespace -Wl,-undefined -Wl,suppress -dynamiclib" instead.
 
 ----------------------
 - USAGE INSTRUCTIONS -




From baldrick at free.fr  Thu Apr 15 02:47:23 2010
From: baldrick at free.fr (Duncan Sands)
Date: Thu, 15 Apr 2010 07:47:23 -0000
Subject: [llvm-commits] [dragonegg] r101362 - /dragonegg/trunk/www/index.html
Message-ID: <20100415074723.891B12A6C12D@llvm.org>

Author: baldrick
Date: Thu Apr 15 02:47:23 2010
New Revision: 101362

URL: http://llvm.org/viewvc/llvm-project?rev=101362&view=rev
Log:
Exception handling has been implemented.  It has only been lightly
tested so far, but all the necessary pieces are in place.

Modified:
    dragonegg/trunk/www/index.html

Modified: dragonegg/trunk/www/index.html
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/www/index.html?rev=101362&r1=101361&r2=101362&view=diff
==============================================================================
--- dragonegg/trunk/www/index.html (original)
+++ dragonegg/trunk/www/index.html Thu Apr 15 02:47:23 2010
@@ -42,15 +42,14 @@
   boost actually works)</li>
   <li>A lot of Fortran compiles, but the compiled code has not been tested for
   correctness</li>
-  <li>It can compile quite a lot of Ada, but the compiled code may not work
-  right</li>
+  <li>It can compile quite a lot of Ada, and the compiled code mostly seems to
+  work</li>
   <li>It can compile a small amount of Obj-C and Obj-C++</li>
   <li>It fails to compile any Java</li>
-  <li>Exception handling does not work</li>
   <li>Limited debug info</li>
   <li>Requires one gcc patch</li>
   <li>Only supports x86-32 and x86-64</li>
-  <li>Only supports linux and darwin (darwin hasn't been tested recently though)</li>
+  <li>Only supports linux and darwin</li>
   </ul>
 
   <p><a href="http://dragonegg.llvm.org/">DragonEgg</a> is under heavy




From baldrick at free.fr  Thu Apr 15 03:44:53 2010
From: baldrick at free.fr (Duncan Sands)
Date: Thu, 15 Apr 2010 08:44:53 -0000
Subject: [llvm-commits] [dragonegg] r101363 - /dragonegg/trunk/www/index.html
Message-ID: <20100415084453.AEC192A6C12C@llvm.org>

Author: baldrick
Date: Thu Apr 15 03:44:53 2010
New Revision: 101363

URL: http://llvm.org/viewvc/llvm-project?rev=101363&view=rev
Log:
gcc-4.5 is close to being released.

Modified:
    dragonegg/trunk/www/index.html

Modified: dragonegg/trunk/www/index.html
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/www/index.html?rev=101363&r1=101362&r2=101363&view=diff
==============================================================================
--- dragonegg/trunk/www/index.html (original)
+++ dragonegg/trunk/www/index.html Thu Apr 15 03:44:53 2010
@@ -54,9 +54,8 @@
 
   <p><a href="http://dragonegg.llvm.org/">DragonEgg</a> is under heavy
   development and is not mature - it may crash or produce wrong code.  It works
-  with <a href="http://gcc.gnu.org">gcc-4.5</a> which is nowhere near being
-  released yet and is changing rapidly.  This is an additional source of
-  instability, and means that
+  with <a href="http://gcc.gnu.org">gcc-4.5</a> which hasn't been released yet.
+  This is an additional source of instability, and means that
   <a href="http://dragonegg.llvm.org/">DragonEgg</a> may fail to build from
   time-to-time if it has not caught up with the latest gcc changes.
   <a href="http://dragonegg.llvm.org/">DragonEgg</a> uses the development




From ggreif at gmail.com  Thu Apr 15 05:49:53 2010
From: ggreif at gmail.com (Gabor Greif)
Date: Thu, 15 Apr 2010 10:49:53 -0000
Subject: [llvm-commits] [llvm] r101364 - in /llvm/trunk: ./ include/llvm/
 include/llvm/Support/ lib/Analysis/ lib/Analysis/IPA/ lib/Bitcode/Writer/
 lib/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/CBackend/
 lib/Target/CppBackend/ lib/Target/X86/ lib/Transforms/IPO/
 lib/Transforms/InstCombine/ lib/Transforms/Instrumentation/
 lib/Transforms/Scalar/ lib/Transforms/Utils/ lib/VMCore/
Message-ID: <20100415104954.1F92A2A6C12C@llvm.org>

Author: ggreif
Date: Thu Apr 15 05:49:53 2010
New Revision: 101364

URL: http://llvm.org/viewvc/llvm-project?rev=101364&view=rev
Log:
rotate CallInst operands, i.e. move callee to the back
of the operand array

the motivation for this patch are laid out in my mail to llvm-commits:
more efficient access to operands and callee, faster callgraph-construction,
smaller compiler binary

Modified:
    llvm/trunk/   (props changed)
    llvm/trunk/include/llvm/Instructions.h
    llvm/trunk/include/llvm/IntrinsicInst.h
    llvm/trunk/include/llvm/Support/CallSite.h
    llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp
    llvm/trunk/lib/Analysis/ConstantFolding.cpp
    llvm/trunk/lib/Analysis/IPA/GlobalsModRef.cpp
    llvm/trunk/lib/Analysis/MemoryBuiltins.cpp
    llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp
    llvm/trunk/lib/Analysis/ValueTracking.cpp
    llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp
    llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp
    llvm/trunk/lib/CodeGen/GCStrategy.cpp
    llvm/trunk/lib/CodeGen/IntrinsicLowering.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    llvm/trunk/lib/CodeGen/ShadowStackGC.cpp
    llvm/trunk/lib/CodeGen/SjLjEHPrepare.cpp
    llvm/trunk/lib/Target/CBackend/CBackend.cpp
    llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp
    llvm/trunk/lib/Target/X86/X86FastISel.cpp
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp
    llvm/trunk/lib/Transforms/IPO/LowerSetJmp.cpp
    llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp
    llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp
    llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp
    llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
    llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp
    llvm/trunk/lib/Transforms/Instrumentation/ProfilingUtils.cpp
    llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp
    llvm/trunk/lib/Transforms/Scalar/GVN.cpp
    llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp
    llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp
    llvm/trunk/lib/Transforms/Scalar/SimplifyLibCalls.cpp
    llvm/trunk/lib/Transforms/Scalar/TailRecursionElimination.cpp
    llvm/trunk/lib/Transforms/Utils/AddrModeMatcher.cpp
    llvm/trunk/lib/Transforms/Utils/BuildLibCalls.cpp
    llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp
    llvm/trunk/lib/VMCore/AsmWriter.cpp
    llvm/trunk/lib/VMCore/AutoUpgrade.cpp
    llvm/trunk/lib/VMCore/Instructions.cpp
    llvm/trunk/lib/VMCore/IntrinsicInst.cpp
    llvm/trunk/lib/VMCore/Verifier.cpp

Propchange: llvm/trunk/
------------------------------------------------------------------------------
    svn:mergeinfo = /llvm/branches/ggreif/CallInst-operands:100911-101130

Modified: llvm/trunk/include/llvm/Instructions.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Instructions.h?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Instructions.h (original)
+++ llvm/trunk/include/llvm/Instructions.h Thu Apr 15 05:49:53 2010
@@ -1031,17 +1031,17 @@
   /// indirect function invocation.
   ///
   Function *getCalledFunction() const {
-    return dyn_cast<Function>(Op<0>());
+    return dyn_cast<Function>(Op<-1>());
   }
 
   /// getCalledValue - Get a pointer to the function that is invoked by this
   /// instruction.
-  const Value *getCalledValue() const { return Op<0>(); }
-        Value *getCalledValue()       { return Op<0>(); }
+  const Value *getCalledValue() const { return Op<-1>(); }
+        Value *getCalledValue()       { return Op<-1>(); }
 
   /// setCalledFunction - Set the function called.
   void setCalledFunction(Value* Fn) {
-    Op<0>() = Fn;
+    Op<-1>() = Fn;
   }
 
   // Methods for support type inquiry through isa, cast, and dyn_cast:
@@ -1071,7 +1071,7 @@
                                    ->getElementType())->getReturnType(),
                 Instruction::Call,
                 OperandTraits<CallInst>::op_end(this) - (ArgEnd - ArgBegin + 1),
-                (unsigned)(ArgEnd - ArgBegin + 1), InsertAtEnd) {
+                unsigned(ArgEnd - ArgBegin + 1), InsertAtEnd) {
   init(Func, ArgBegin, ArgEnd, NameStr,
        typename std::iterator_traits<InputIterator>::iterator_category());
 }

Modified: llvm/trunk/include/llvm/IntrinsicInst.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IntrinsicInst.h?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/include/llvm/IntrinsicInst.h (original)
+++ llvm/trunk/include/llvm/IntrinsicInst.h Thu Apr 15 05:49:53 2010
@@ -43,7 +43,7 @@
     Intrinsic::ID getIntrinsicID() const {
       return (Intrinsic::ID)getCalledFunction()->getIntrinsicID();
     }
-    
+
     // Methods for support type inquiry through isa, cast, and dyn_cast:
     static inline bool classof(const IntrinsicInst *) { return true; }
     static inline bool classof(const CallInst *I) {
@@ -74,7 +74,7 @@
     static inline bool classof(const Value *V) {
       return isa<IntrinsicInst>(V) && classof(cast<IntrinsicInst>(V));
     }
-    
+
     static Value *StripCast(Value *C);
   };
 
@@ -83,7 +83,7 @@
   class DbgDeclareInst : public DbgInfoIntrinsic {
   public:
     Value *getAddress() const;
-    MDNode *getVariable() const { return cast<MDNode>(getOperand(2)); }
+    MDNode *getVariable() const { return cast<MDNode>(getOperand(1)); }
 
     // Methods for support type inquiry through isa, cast, and dyn_cast:
     static inline bool classof(const DbgDeclareInst *) { return true; }
@@ -103,9 +103,9 @@
     Value *getValue();
     uint64_t getOffset() const {
       return cast<ConstantInt>(
-                             const_cast<Value*>(getOperand(2)))->getZExtValue();
+                             const_cast<Value*>(getOperand(1)))->getZExtValue();
     }
-    MDNode *getVariable() const { return cast<MDNode>(getOperand(3)); }
+    MDNode *getVariable() const { return cast<MDNode>(getOperand(2)); }
 
     // Methods for support type inquiry through isa, cast, and dyn_cast:
     static inline bool classof(const DbgValueInst *) { return true; }
@@ -121,19 +121,19 @@
   ///
   class MemIntrinsic : public IntrinsicInst {
   public:
-    Value *getRawDest() const { return const_cast<Value*>(getOperand(1)); }
+    Value *getRawDest() const { return const_cast<Value*>(getOperand(0)); }
 
-    Value *getLength() const { return const_cast<Value*>(getOperand(3)); }
+    Value *getLength() const { return const_cast<Value*>(getOperand(2)); }
     ConstantInt *getAlignmentCst() const {
-      return cast<ConstantInt>(const_cast<Value*>(getOperand(4)));
+      return cast<ConstantInt>(const_cast<Value*>(getOperand(3)));
     }
-    
+
     unsigned getAlignment() const {
       return getAlignmentCst()->getZExtValue();
     }
 
     ConstantInt *getVolatileCst() const {
-      return cast<ConstantInt>(const_cast<Value*>(getOperand(5)));
+      return cast<ConstantInt>(const_cast<Value*>(getOperand(4)));
     }
     bool isVolatile() const {
       return getVolatileCst()->getZExtValue() != 0;
@@ -149,27 +149,27 @@
     void setDest(Value *Ptr) {
       assert(getRawDest()->getType() == Ptr->getType() &&
              "setDest called with pointer of wrong type!");
-      setOperand(1, Ptr);
+      setOperand(0, Ptr);
     }
 
     void setLength(Value *L) {
       assert(getLength()->getType() == L->getType() &&
              "setLength called with value of wrong type!");
-      setOperand(3, L);
+      setOperand(2, L);
     }
-    
+
     void setAlignment(Constant* A) {
-      setOperand(4, A);
+      setOperand(3, A);
     }
 
     void setVolatile(Constant* V) {
-      setOperand(5, V);
+      setOperand(4, V);
     }
 
     const Type *getAlignmentType() const {
-      return getOperand(4)->getType();
+      return getOperand(3)->getType();
     }
-    
+
     // Methods for support type inquiry through isa, cast, and dyn_cast:
     static inline bool classof(const MemIntrinsic *) { return true; }
     static inline bool classof(const IntrinsicInst *I) {
@@ -192,14 +192,14 @@
   public:
     /// get* - Return the arguments to the instruction.
     ///
-    Value *getValue() const { return const_cast<Value*>(getOperand(2)); }
-    
+    Value *getValue() const { return const_cast<Value*>(getOperand(1)); }
+
     void setValue(Value *Val) {
       assert(getValue()->getType() == Val->getType() &&
-             "setSource called with pointer of wrong type!");
-      setOperand(2, Val);
+             "setValue called with value of wrong type!");
+      setOperand(1, Val);
     }
-    
+
     // Methods for support type inquiry through isa, cast, and dyn_cast:
     static inline bool classof(const MemSetInst *) { return true; }
     static inline bool classof(const IntrinsicInst *I) {
@@ -209,26 +209,26 @@
       return isa<IntrinsicInst>(V) && classof(cast<IntrinsicInst>(V));
     }
   };
-  
+
   /// MemTransferInst - This class wraps the llvm.memcpy/memmove intrinsics.
   ///
   class MemTransferInst : public MemIntrinsic {
   public:
     /// get* - Return the arguments to the instruction.
     ///
-    Value *getRawSource() const { return const_cast<Value*>(getOperand(2)); }
-    
+    Value *getRawSource() const { return const_cast<Value*>(getOperand(1)); }
+
     /// getSource - This is just like getRawSource, but it strips off any cast
     /// instructions that feed it, giving the original input.  The returned
     /// value is guaranteed to be a pointer.
     Value *getSource() const { return getRawSource()->stripPointerCasts(); }
-    
+
     void setSource(Value *Ptr) {
       assert(getRawSource()->getType() == Ptr->getType() &&
              "setSource called with pointer of wrong type!");
-      setOperand(2, Ptr);
+      setOperand(1, Ptr);
     }
-    
+
     // Methods for support type inquiry through isa, cast, and dyn_cast:
     static inline bool classof(const MemTransferInst *) { return true; }
     static inline bool classof(const IntrinsicInst *I) {
@@ -239,8 +239,8 @@
       return isa<IntrinsicInst>(V) && classof(cast<IntrinsicInst>(V));
     }
   };
-  
-  
+
+
   /// MemCpyInst - This class wraps the llvm.memcpy intrinsic.
   ///
   class MemCpyInst : public MemTransferInst {
@@ -282,7 +282,7 @@
       return isa<IntrinsicInst>(V) && classof(cast<IntrinsicInst>(V));
     }
   };
-  
+
   /// MemoryUseIntrinsic - This is the common base class for the memory use
   /// marker intrinsics.
   ///

Modified: llvm/trunk/include/llvm/Support/CallSite.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/CallSite.h?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/CallSite.h (original)
+++ llvm/trunk/include/llvm/Support/CallSite.h Thu Apr 15 05:49:53 2010
@@ -255,27 +255,21 @@
 private:
   /// Returns the operand number of the first argument
   unsigned getArgumentOffset() const {
-    if (isCall())
-      return 1; // Skip Function (ATM)
-    else
       return 0; // Args are at the front
   }
 
   unsigned getArgumentEndOffset() const {
     if (isCall())
-      return 0; // Unchanged (ATM)
+      return 1; // Skip Function
     else
       return 3; // Skip BB, BB, Function
   }
 
   IterTy getCallee() const {
-      // FIXME: this is slow, since we do not have the fast versions
-      // of the op_*() functions here. See CallSite::getCallee.
-      //
-    if (isCall())
-      return getInstruction()->op_begin(); // Unchanged (ATM)
-    else
-      return getInstruction()->op_end() - 3; // Skip BB, BB, Function
+    // FIXME: this is slow, since we do not have the fast versions
+		// of the op_*() functions here. See CallSite::getCallee.
+		//
+    return arg_end();
   }
 };
 

Modified: llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp Thu Apr 15 05:49:53 2010
@@ -94,7 +94,7 @@
   } else if (const CallInst* CI = extractMallocCall(V)) {
     if (!isArrayMalloc(V, &TD))
       // The size is the argument to the malloc call.
-      if (const ConstantInt* C = dyn_cast<ConstantInt>(CI->getOperand(1)))
+      if (const ConstantInt* C = dyn_cast<ConstantInt>(CI->getOperand(0)))
         return (C->getZExtValue() < Size);
     return false;
   } else if (const Argument *A = dyn_cast<Argument>(V)) {
@@ -318,10 +318,10 @@
   case Intrinsic::memcpy:
   case Intrinsic::memmove: {
     unsigned Len = ~0U;
-    if (ConstantInt *LenCI = dyn_cast<ConstantInt>(II->getOperand(3)))
+    if (ConstantInt *LenCI = dyn_cast<ConstantInt>(II->getOperand(2)))
       Len = LenCI->getZExtValue();
-    Value *Dest = II->getOperand(1);
-    Value *Src = II->getOperand(2);
+    Value *Dest = II->getOperand(0);
+    Value *Src = II->getOperand(1);
     if (isNoAlias(Dest, Len, P, Size)) {
       if (isNoAlias(Src, Len, P, Size))
         return NoModRef;
@@ -332,9 +332,9 @@
   case Intrinsic::memset:
     // Since memset is 'accesses arguments' only, the AliasAnalysis base class
     // will handle it for the variable length case.
-    if (ConstantInt *LenCI = dyn_cast<ConstantInt>(II->getOperand(3))) {
+    if (ConstantInt *LenCI = dyn_cast<ConstantInt>(II->getOperand(2))) {
       unsigned Len = LenCI->getZExtValue();
-      Value *Dest = II->getOperand(1);
+      Value *Dest = II->getOperand(0);
       if (isNoAlias(Dest, Len, P, Size))
         return NoModRef;
     }
@@ -352,7 +352,7 @@
   case Intrinsic::atomic_load_umax:
   case Intrinsic::atomic_load_umin:
     if (TD) {
-      Value *Op1 = II->getOperand(1);
+      Value *Op1 = II->getOperand(0);
       unsigned Op1Size = TD->getTypeStoreSize(Op1->getType());
       if (isNoAlias(Op1, Op1Size, P, Size))
         return NoModRef;
@@ -361,14 +361,14 @@
   case Intrinsic::lifetime_start:
   case Intrinsic::lifetime_end:
   case Intrinsic::invariant_start: {
-    unsigned PtrSize = cast<ConstantInt>(II->getOperand(1))->getZExtValue();
-    if (isNoAlias(II->getOperand(2), PtrSize, P, Size))
+    unsigned PtrSize = cast<ConstantInt>(II->getOperand(0))->getZExtValue();
+    if (isNoAlias(II->getOperand(1), PtrSize, P, Size))
       return NoModRef;
     break;
   }
   case Intrinsic::invariant_end: {
-    unsigned PtrSize = cast<ConstantInt>(II->getOperand(2))->getZExtValue();
-    if (isNoAlias(II->getOperand(3), PtrSize, P, Size))
+    unsigned PtrSize = cast<ConstantInt>(II->getOperand(1))->getZExtValue();
+    if (isNoAlias(II->getOperand(2), PtrSize, P, Size))
       return NoModRef;
     break;
   }

Modified: llvm/trunk/lib/Analysis/ConstantFolding.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ConstantFolding.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ConstantFolding.cpp (original)
+++ llvm/trunk/lib/Analysis/ConstantFolding.cpp Thu Apr 15 05:49:53 2010
@@ -772,9 +772,9 @@
   case Instruction::ICmp:
   case Instruction::FCmp: assert(0 && "Invalid for compares");
   case Instruction::Call:
-    if (Function *F = dyn_cast<Function>(Ops[0]))
+    if (Function *F = dyn_cast<Function>(Ops[NumOps - 1]))
       if (canConstantFoldCallTo(F))
-        return ConstantFoldCall(F, Ops+1, NumOps-1);
+        return ConstantFoldCall(F, Ops, NumOps - 1);
     return 0;
   case Instruction::PtrToInt:
     // If the input is a inttoptr, eliminate the pair.  This requires knowing

Modified: llvm/trunk/lib/Analysis/IPA/GlobalsModRef.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/IPA/GlobalsModRef.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/IPA/GlobalsModRef.cpp (original)
+++ llvm/trunk/lib/Analysis/IPA/GlobalsModRef.cpp Thu Apr 15 05:49:53 2010
@@ -252,7 +252,7 @@
     } else if (CallInst *CI = dyn_cast<CallInst>(*UI)) {
       // Make sure that this is just the function being called, not that it is
       // passing into the function.
-      for (unsigned i = 1, e = CI->getNumOperands(); i != e; ++i)
+      for (unsigned i = 0, e = CI->getNumOperands() - 1; i != e; ++i)
         if (CI->getOperand(i) == V) return true;
     } else if (InvokeInst *II = dyn_cast<InvokeInst>(*UI)) {
       // Make sure that this is just the function being called, not that it is

Modified: llvm/trunk/lib/Analysis/MemoryBuiltins.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/MemoryBuiltins.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/MemoryBuiltins.cpp (original)
+++ llvm/trunk/lib/Analysis/MemoryBuiltins.cpp Thu Apr 15 05:49:53 2010
@@ -103,7 +103,7 @@
 
   // If malloc calls' arg can be determined to be a multiple of ElementSize,
   // return the multiple.  Otherwise, return NULL.
-  Value *MallocArg = CI->getOperand(1);
+  Value *MallocArg = CI->getOperand(0);
   Value *Multiple = NULL;
   if (ComputeMultiple(MallocArg, ElementSize, Multiple,
                       LookThroughSExt))
@@ -120,7 +120,7 @@
   Value *ArraySize = computeArraySize(CI, TD);
 
   if (ArraySize &&
-      ArraySize != ConstantInt::get(CI->getOperand(1)->getType(), 1))
+      ArraySize != ConstantInt::get(CI->getOperand(0)->getType(), 1))
     return CI;
 
   // CI is a non-array malloc or we can't figure out that it is an array malloc.

Modified: llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp Thu Apr 15 05:49:53 2010
@@ -117,7 +117,7 @@
       Pointer = V->getOperand(0);
       PointerSize = AA->getTypeStoreSize(V->getType());
     } else if (isFreeCall(Inst)) {
-      Pointer = Inst->getOperand(1);
+      Pointer = Inst->getOperand(0);
       // calls to free() erase the entire structure
       PointerSize = ~0ULL;
     } else if (isa<CallInst>(Inst) || isa<InvokeInst>(Inst)) {
@@ -197,9 +197,9 @@
         // pointer, not on query pointers that are indexed off of them.  It'd
         // be nice to handle that at some point.
         AliasAnalysis::AliasResult R = 
-          AA->alias(II->getOperand(3), ~0U, MemPtr, ~0U);
+          AA->alias(II->getOperand(2), ~0U, MemPtr, ~0U);
         if (R == AliasAnalysis::MustAlias) {
-          InvariantTag = II->getOperand(1);
+          InvariantTag = II->getOperand(0);
           continue;
         }
       
@@ -210,7 +210,7 @@
         // pointer, not on query pointers that are indexed off of them.  It'd
         // be nice to handle that at some point.
         AliasAnalysis::AliasResult R =
-          AA->alias(II->getOperand(2), ~0U, MemPtr, ~0U);
+          AA->alias(II->getOperand(1), ~0U, MemPtr, ~0U);
         if (R == AliasAnalysis::MustAlias)
           return MemDepResult::getDef(II);
       }
@@ -366,7 +366,7 @@
       MemSize = AA->getTypeStoreSize(LI->getType());
     }
   } else if (isFreeCall(QueryInst)) {
-    MemPtr = QueryInst->getOperand(1);
+    MemPtr = QueryInst->getOperand(0);
     // calls to free() erase the entire structure, not just a field.
     MemSize = ~0UL;
   } else if (isa<CallInst>(QueryInst) || isa<InvokeInst>(QueryInst)) {
@@ -378,12 +378,12 @@
     case Intrinsic::lifetime_start:
     case Intrinsic::lifetime_end:
     case Intrinsic::invariant_start:
-      MemPtr = QueryInst->getOperand(2);
-      MemSize = cast<ConstantInt>(QueryInst->getOperand(1))->getZExtValue();
+      MemPtr = QueryInst->getOperand(1);
+      MemSize = cast<ConstantInt>(QueryInst->getOperand(0))->getZExtValue();
       break;
     case Intrinsic::invariant_end:
-      MemPtr = QueryInst->getOperand(3);
-      MemSize = cast<ConstantInt>(QueryInst->getOperand(2))->getZExtValue();
+      MemPtr = QueryInst->getOperand(2);
+      MemSize = cast<ConstantInt>(QueryInst->getOperand(1))->getZExtValue();
       break;
     default:
       CallSite QueryCS = CallSite::get(QueryInst);

Modified: llvm/trunk/lib/Analysis/ValueTracking.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ValueTracking.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ValueTracking.cpp (original)
+++ llvm/trunk/lib/Analysis/ValueTracking.cpp Thu Apr 15 05:49:53 2010
@@ -953,7 +953,7 @@
   if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(I))
     // sqrt(-0.0) = -0.0, no other negative results are possible.
     if (II->getIntrinsicID() == Intrinsic::sqrt)
-      return CannotBeNegativeZero(II->getOperand(1), Depth+1);
+      return CannotBeNegativeZero(II->getOperand(0), Depth+1);
   
   if (const CallInst *CI = dyn_cast<CallInst>(I))
     if (const Function *F = CI->getCalledFunction()) {
@@ -966,7 +966,7 @@
         if (F->getName() == "fabsl") return true;
         if (F->getName() == "sqrt" || F->getName() == "sqrtf" ||
             F->getName() == "sqrtl")
-          return CannotBeNegativeZero(CI->getOperand(1), Depth+1);
+          return CannotBeNegativeZero(CI->getOperand(0), Depth+1);
       }
     }
   

Modified: llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp (original)
+++ llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp Thu Apr 15 05:49:53 2010
@@ -1134,24 +1134,23 @@
     Vals.push_back(cast<StoreInst>(I).isVolatile());
     break;
   case Instruction::Call: {
-    const PointerType *PTy = cast<PointerType>(I.getOperand(0)->getType());
+    const CallInst &CI = cast<CallInst>(I);
+    const PointerType *PTy = cast<PointerType>(CI.getCalledValue()->getType());
     const FunctionType *FTy = cast<FunctionType>(PTy->getElementType());
 
     Code = bitc::FUNC_CODE_INST_CALL;
 
-    const CallInst *CI = cast<CallInst>(&I);
-    Vals.push_back(VE.getAttributeID(CI->getAttributes()));
-    Vals.push_back((CI->getCallingConv() << 1) | unsigned(CI->isTailCall()));
-    PushValueAndType(CI->getOperand(0), InstID, Vals, VE);  // Callee
+    Vals.push_back(VE.getAttributeID(CI.getAttributes()));
+    Vals.push_back((CI.getCallingConv() << 1) | unsigned(CI.isTailCall()));
+    PushValueAndType(CI.getCalledValue(), InstID, Vals, VE);  // Callee
 
     // Emit value #'s for the fixed parameters.
     for (unsigned i = 0, e = FTy->getNumParams(); i != e; ++i)
-      Vals.push_back(VE.getValueID(I.getOperand(i+1)));  // fixed param.
+      Vals.push_back(VE.getValueID(I.getOperand(i)));  // fixed param.
 
     // Emit type/value pairs for varargs params.
     if (FTy->isVarArg()) {
-      unsigned NumVarargs = I.getNumOperands()-1-FTy->getNumParams();
-      for (unsigned i = I.getNumOperands()-NumVarargs, e = I.getNumOperands();
+      for (unsigned i = FTy->getNumParams(), e = I.getNumOperands()-1;
            i != e; ++i)
         PushValueAndType(I.getOperand(i), InstID, Vals, VE);  // varargs
     }

Modified: llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp (original)
+++ llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp Thu Apr 15 05:49:53 2010
@@ -198,7 +198,7 @@
     bool IsCleanUp = (NumOps == 3);
 
     if (!IsCleanUp)
-      if (ConstantInt *CI = dyn_cast<ConstantInt>(SI->getOperand(3)))
+      if (ConstantInt *CI = dyn_cast<ConstantInt>(SI->getOperand(2)))
         IsCleanUp = (CI->getZExtValue() == 0);
 
     if (IsCleanUp)
@@ -237,7 +237,7 @@
     if (!Sel || Sel->getParent()->getParent() != F) continue;
 
     // Index of the ".llvm.eh.catch.all.value" variable.
-    unsigned OpIdx = Sel->getNumOperands() - 1;
+    unsigned OpIdx = Sel->getNumOperands() - 2;
     GlobalVariable *GV = dyn_cast<GlobalVariable>(Sel->getOperand(OpIdx));
     if (GV != EHCatchAllValue) continue;
     Sel->setOperand(OpIdx, EHCatchAllValue->getInitializer());
@@ -366,7 +366,7 @@
             bool IsCleanUp = (NumOps == 3);
 
             if (!IsCleanUp)
-              if (ConstantInt *CI = dyn_cast<ConstantInt>(II->getOperand(3)))
+              if (ConstantInt *CI = dyn_cast<ConstantInt>(II->getOperand(2)))
                 IsCleanUp = (CI->getZExtValue() == 0);
 
             if (IsCleanUp)
@@ -390,8 +390,8 @@
 
       // Use the exception object pointer and the personality function
       // from the original selector.
-      Args.push_back(II->getOperand(1)); // Exception object pointer.
-      Args.push_back(II->getOperand(2)); // Personality function.
+      Args.push_back(II->getOperand(0)); // Exception object pointer.
+      Args.push_back(II->getOperand(1)); // Personality function.
       Args.push_back(EHCatchAllValue->getInitializer()); // Catch-all indicator.
 
       CallInst *NewSelector =

Modified: llvm/trunk/lib/CodeGen/GCStrategy.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GCStrategy.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GCStrategy.cpp (original)
+++ llvm/trunk/lib/CodeGen/GCStrategy.cpp Thu Apr 15 05:49:53 2010
@@ -270,7 +270,7 @@
         case Intrinsic::gcwrite:
           if (LowerWr) {
             // Replace a write barrier with a simple store.
-            Value *St = new StoreInst(CI->getOperand(1), CI->getOperand(3), CI);
+            Value *St = new StoreInst(CI->getOperand(0), CI->getOperand(2), CI);
             CI->replaceAllUsesWith(St);
             CI->eraseFromParent();
           }
@@ -278,7 +278,7 @@
         case Intrinsic::gcread:
           if (LowerRd) {
             // Replace a read barrier with a simple load.
-            Value *Ld = new LoadInst(CI->getOperand(2), "", CI);
+            Value *Ld = new LoadInst(CI->getOperand(1), "", CI);
             Ld->takeName(CI);
             CI->replaceAllUsesWith(Ld);
             CI->eraseFromParent();
@@ -289,7 +289,7 @@
             // Initialize the GC root, but do not delete the intrinsic. The
             // backend needs the intrinsic to flag the stack slot.
             Roots.push_back(cast<AllocaInst>(
-                              CI->getOperand(1)->stripPointerCasts()));
+                              CI->getOperand(0)->stripPointerCasts()));
           }
           break;
         default:

Modified: llvm/trunk/lib/CodeGen/IntrinsicLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/IntrinsicLowering.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/IntrinsicLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/IntrinsicLowering.cpp Thu Apr 15 05:49:53 2010
@@ -308,21 +308,21 @@
 static void ReplaceFPIntrinsicWithCall(CallInst *CI, const char *Fname,
                                        const char *Dname,
                                        const char *LDname) {
-  switch (CI->getOperand(1)->getType()->getTypeID()) {
+  switch (CI->getOperand(0)->getType()->getTypeID()) {
   default: llvm_unreachable("Invalid type in intrinsic");
   case Type::FloatTyID:
-    ReplaceCallWith(Fname, CI, CI->op_begin() + 1, CI->op_end(),
+    ReplaceCallWith(Fname, CI, CI->op_begin(), CI->op_end() - 1,
                   Type::getFloatTy(CI->getContext()));
     break;
   case Type::DoubleTyID:
-    ReplaceCallWith(Dname, CI, CI->op_begin() + 1, CI->op_end(),
+    ReplaceCallWith(Dname, CI, CI->op_begin(), CI->op_end() - 1,
                   Type::getDoubleTy(CI->getContext()));
     break;
   case Type::X86_FP80TyID:
   case Type::FP128TyID:
   case Type::PPC_FP128TyID:
-    ReplaceCallWith(LDname, CI, CI->op_begin() + 1, CI->op_end(),
-                  CI->getOperand(1)->getType());
+    ReplaceCallWith(LDname, CI, CI->op_begin(), CI->op_end() - 1,
+                  CI->getOperand(0)->getType());
     break;
   }
 }
@@ -347,7 +347,7 @@
     // by the lowerinvoke pass.  In both cases, the right thing to do is to
     // convert the call to an explicit setjmp or longjmp call.
   case Intrinsic::setjmp: {
-    Value *V = ReplaceCallWith("setjmp", CI, CI->op_begin() + 1, CI->op_end(),
+    Value *V = ReplaceCallWith("setjmp", CI, CI->op_begin(), CI->op_end() - 1,
                                Type::getInt32Ty(Context));
     if (!CI->getType()->isVoidTy())
       CI->replaceAllUsesWith(V);
@@ -359,7 +359,7 @@
      break;
 
   case Intrinsic::longjmp: {
-    ReplaceCallWith("longjmp", CI, CI->op_begin() + 1, CI->op_end(),
+    ReplaceCallWith("longjmp", CI, CI->op_begin(), CI->op_end() - 1,
                     Type::getVoidTy(Context));
     break;
   }
@@ -371,20 +371,20 @@
     break;
   }
   case Intrinsic::ctpop:
-    CI->replaceAllUsesWith(LowerCTPOP(Context, CI->getOperand(1), CI));
+    CI->replaceAllUsesWith(LowerCTPOP(Context, CI->getOperand(0), CI));
     break;
 
   case Intrinsic::bswap:
-    CI->replaceAllUsesWith(LowerBSWAP(Context, CI->getOperand(1), CI));
+    CI->replaceAllUsesWith(LowerBSWAP(Context, CI->getOperand(0), CI));
     break;
     
   case Intrinsic::ctlz:
-    CI->replaceAllUsesWith(LowerCTLZ(Context, CI->getOperand(1), CI));
+    CI->replaceAllUsesWith(LowerCTLZ(Context, CI->getOperand(0), CI));
     break;
 
   case Intrinsic::cttz: {
     // cttz(x) -> ctpop(~X & (X-1))
-    Value *Src = CI->getOperand(1);
+    Value *Src = CI->getOperand(0);
     Value *NotSrc = Builder.CreateNot(Src);
     NotSrc->setName(Src->getName() + ".not");
     Value *SrcM1 = ConstantInt::get(Src->getType(), 1);
@@ -445,37 +445,37 @@
     
   case Intrinsic::memcpy: {
     const IntegerType *IntPtr = TD.getIntPtrType(Context);
-    Value *Size = Builder.CreateIntCast(CI->getOperand(3), IntPtr,
+    Value *Size = Builder.CreateIntCast(CI->getOperand(2), IntPtr,
                                         /* isSigned */ false);
     Value *Ops[3];
-    Ops[0] = CI->getOperand(1);
-    Ops[1] = CI->getOperand(2);
+    Ops[0] = CI->getOperand(0);
+    Ops[1] = CI->getOperand(1);
     Ops[2] = Size;
-    ReplaceCallWith("memcpy", CI, Ops, Ops+3, CI->getOperand(1)->getType());
+    ReplaceCallWith("memcpy", CI, Ops, Ops+3, CI->getOperand(0)->getType());
     break;
   }
   case Intrinsic::memmove: {
     const IntegerType *IntPtr = TD.getIntPtrType(Context);
-    Value *Size = Builder.CreateIntCast(CI->getOperand(3), IntPtr,
+    Value *Size = Builder.CreateIntCast(CI->getOperand(2), IntPtr,
                                         /* isSigned */ false);
     Value *Ops[3];
-    Ops[0] = CI->getOperand(1);
-    Ops[1] = CI->getOperand(2);
+    Ops[0] = CI->getOperand(0);
+    Ops[1] = CI->getOperand(1);
     Ops[2] = Size;
-    ReplaceCallWith("memmove", CI, Ops, Ops+3, CI->getOperand(1)->getType());
+    ReplaceCallWith("memmove", CI, Ops, Ops+3, CI->getOperand(0)->getType());
     break;
   }
   case Intrinsic::memset: {
     const IntegerType *IntPtr = TD.getIntPtrType(Context);
-    Value *Size = Builder.CreateIntCast(CI->getOperand(3), IntPtr,
+    Value *Size = Builder.CreateIntCast(CI->getOperand(2), IntPtr,
                                         /* isSigned */ false);
     Value *Ops[3];
-    Ops[0] = CI->getOperand(1);
+    Ops[0] = CI->getOperand(0);
     // Extend the amount to i32.
-    Ops[1] = Builder.CreateIntCast(CI->getOperand(2), Type::getInt32Ty(Context),
+    Ops[1] = Builder.CreateIntCast(CI->getOperand(1), Type::getInt32Ty(Context),
                                    /* isSigned */ false);
     Ops[2] = Size;
-    ReplaceCallWith("memset", CI, Ops, Ops+3, CI->getOperand(1)->getType());
+    ReplaceCallWith("memset", CI, Ops, Ops+3, CI->getOperand(0)->getType());
     break;
   }
   case Intrinsic::sqrt: {

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp Thu Apr 15 05:49:53 2010
@@ -31,7 +31,6 @@
 #include "llvm/Target/TargetData.h"
 #include "llvm/Target/TargetFrameInfo.h"
 #include "llvm/Target/TargetInstrInfo.h"
-#include "llvm/Target/TargetIntrinsicInfo.h"
 #include "llvm/Target/TargetLowering.h"
 #include "llvm/Target/TargetOptions.h"
 #include "llvm/Support/Compiler.h"
@@ -310,7 +309,7 @@
 void llvm::AddCatchInfo(const CallInst &I, MachineModuleInfo *MMI,
                         MachineBasicBlock *MBB) {
   // Inform the MachineModuleInfo of the personality for this landing pad.
-  const ConstantExpr *CE = cast<ConstantExpr>(I.getOperand(2));
+  const ConstantExpr *CE = cast<ConstantExpr>(I.getOperand(1));
   assert(CE->getOpcode() == Instruction::BitCast &&
          isa<Function>(CE->getOperand(0)) &&
          "Personality should be a function");
@@ -319,9 +318,9 @@
   // Gather all the type infos for this landing pad and pass them along to
   // MachineModuleInfo.
   std::vector<const GlobalVariable *> TyInfo;
-  unsigned N = I.getNumOperands();
+  unsigned N = I.getNumOperands() - 1;
 
-  for (unsigned i = N - 1; i > 2; --i) {
+  for (unsigned i = N - 1; i > 1; --i) {
     if (const ConstantInt *CI = dyn_cast<ConstantInt>(I.getOperand(i))) {
       unsigned FilterLength = CI->getZExtValue();
       unsigned FirstCatch = i + FilterLength + !FilterLength;
@@ -351,9 +350,9 @@
     }
   }
 
-  if (N > 3) {
-    TyInfo.reserve(N - 3);
-    for (unsigned j = 3; j < N; ++j)
+  if (N > 2) {
+    TyInfo.reserve(N - 2);
+    for (unsigned j = 2; j < N - 1; ++j)
       TyInfo.push_back(ExtractTypeInfo(I.getOperand(j)));
     MMI->addCatchTypeInfo(MBB, TyInfo);
   }

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Thu Apr 15 05:49:53 2010
@@ -2771,7 +2771,7 @@
     Ops.push_back(DAG.getConstant(Intrinsic, TLI.getPointerTy()));
 
   // Add all operands of the call to the operand list.
-  for (unsigned i = 1, e = I.getNumOperands(); i != e; ++i) {
+  for (unsigned i = 0, e = I.getNumOperands()-1; i != e; ++i) {
     SDValue Op = getValue(I.getOperand(i));
     assert(TLI.isTypeLegal(Op.getValueType()) &&
            "Intrinsic uses a non-legal type?");
@@ -2877,11 +2877,11 @@
   SDValue Root = getRoot();
   SDValue L =
     DAG.getAtomic(Op, getCurDebugLoc(),
-                  getValue(I.getOperand(2)).getValueType().getSimpleVT(),
+                  getValue(I.getOperand(1)).getValueType().getSimpleVT(),
                   Root,
+                  getValue(I.getOperand(0)),
                   getValue(I.getOperand(1)),
-                  getValue(I.getOperand(2)),
-                  I.getOperand(1));
+                  I.getOperand(0));
   setValue(&I, L);
   DAG.setRoot(L.getValue(1));
   return 0;
@@ -2890,8 +2890,8 @@
 // implVisitAluOverflow - Lower arithmetic overflow instrinsics.
 const char *
 SelectionDAGBuilder::implVisitAluOverflow(const CallInst &I, ISD::NodeType Op) {
-  SDValue Op1 = getValue(I.getOperand(1));
-  SDValue Op2 = getValue(I.getOperand(2));
+  SDValue Op1 = getValue(I.getOperand(0));
+  SDValue Op2 = getValue(I.getOperand(1));
 
   SDVTList VTs = DAG.getVTList(Op1.getValueType(), MVT::i1);
   setValue(&I, DAG.getNode(Op, getCurDebugLoc(), VTs, Op1, Op2));
@@ -2905,9 +2905,9 @@
   SDValue result;
   DebugLoc dl = getCurDebugLoc();
 
-  if (getValue(I.getOperand(1)).getValueType() == MVT::f32 &&
+  if (getValue(I.getOperand(0)).getValueType() == MVT::f32 &&
       LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
-    SDValue Op = getValue(I.getOperand(1));
+    SDValue Op = getValue(I.getOperand(0));
 
     // Put the exponent in the right bit position for later addition to the
     // final result:
@@ -3017,8 +3017,8 @@
   } else {
     // No special expansion.
     result = DAG.getNode(ISD::FEXP, dl,
-                         getValue(I.getOperand(1)).getValueType(),
-                         getValue(I.getOperand(1)));
+                         getValue(I.getOperand(0)).getValueType(),
+                         getValue(I.getOperand(0)));
   }
 
   setValue(&I, result);
@@ -3031,9 +3031,9 @@
   SDValue result;
   DebugLoc dl = getCurDebugLoc();
 
-  if (getValue(I.getOperand(1)).getValueType() == MVT::f32 &&
+  if (getValue(I.getOperand(0)).getValueType() == MVT::f32 &&
       LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
-    SDValue Op = getValue(I.getOperand(1));
+    SDValue Op = getValue(I.getOperand(0));
     SDValue Op1 = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i32, Op);
 
     // Scale the exponent by log(2) [0.69314718f].
@@ -3127,8 +3127,8 @@
   } else {
     // No special expansion.
     result = DAG.getNode(ISD::FLOG, dl,
-                         getValue(I.getOperand(1)).getValueType(),
-                         getValue(I.getOperand(1)));
+                         getValue(I.getOperand(0)).getValueType(),
+                         getValue(I.getOperand(0)));
   }
 
   setValue(&I, result);
@@ -3141,9 +3141,9 @@
   SDValue result;
   DebugLoc dl = getCurDebugLoc();
 
-  if (getValue(I.getOperand(1)).getValueType() == MVT::f32 &&
+  if (getValue(I.getOperand(0)).getValueType() == MVT::f32 &&
       LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
-    SDValue Op = getValue(I.getOperand(1));
+    SDValue Op = getValue(I.getOperand(0));
     SDValue Op1 = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i32, Op);
 
     // Get the exponent.
@@ -3236,8 +3236,8 @@
   } else {
     // No special expansion.
     result = DAG.getNode(ISD::FLOG2, dl,
-                         getValue(I.getOperand(1)).getValueType(),
-                         getValue(I.getOperand(1)));
+                         getValue(I.getOperand(0)).getValueType(),
+                         getValue(I.getOperand(0)));
   }
 
   setValue(&I, result);
@@ -3250,9 +3250,9 @@
   SDValue result;
   DebugLoc dl = getCurDebugLoc();
 
-  if (getValue(I.getOperand(1)).getValueType() == MVT::f32 &&
+  if (getValue(I.getOperand(0)).getValueType() == MVT::f32 &&
       LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
-    SDValue Op = getValue(I.getOperand(1));
+    SDValue Op = getValue(I.getOperand(0));
     SDValue Op1 = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i32, Op);
 
     // Scale the exponent by log10(2) [0.30102999f].
@@ -3338,8 +3338,8 @@
   } else {
     // No special expansion.
     result = DAG.getNode(ISD::FLOG10, dl,
-                         getValue(I.getOperand(1)).getValueType(),
-                         getValue(I.getOperand(1)));
+                         getValue(I.getOperand(0)).getValueType(),
+                         getValue(I.getOperand(0)));
   }
 
   setValue(&I, result);
@@ -3352,9 +3352,9 @@
   SDValue result;
   DebugLoc dl = getCurDebugLoc();
 
-  if (getValue(I.getOperand(1)).getValueType() == MVT::f32 &&
+  if (getValue(I.getOperand(0)).getValueType() == MVT::f32 &&
       LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
-    SDValue Op = getValue(I.getOperand(1));
+    SDValue Op = getValue(I.getOperand(0));
 
     SDValue IntegerPartOfX = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::i32, Op);
 
@@ -3452,8 +3452,8 @@
   } else {
     // No special expansion.
     result = DAG.getNode(ISD::FEXP2, dl,
-                         getValue(I.getOperand(1)).getValueType(),
-                         getValue(I.getOperand(1)));
+                         getValue(I.getOperand(0)).getValueType(),
+                         getValue(I.getOperand(0)));
   }
 
   setValue(&I, result);
@@ -3464,12 +3464,12 @@
 void
 SelectionDAGBuilder::visitPow(const CallInst &I) {
   SDValue result;
-  const Value *Val = I.getOperand(1);
+  const Value *Val = I.getOperand(0);
   DebugLoc dl = getCurDebugLoc();
   bool IsExp10 = false;
 
   if (getValue(Val).getValueType() == MVT::f32 &&
-      getValue(I.getOperand(2)).getValueType() == MVT::f32 &&
+      getValue(I.getOperand(1)).getValueType() == MVT::f32 &&
       LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
     if (Constant *C = const_cast<Constant*>(dyn_cast<Constant>(Val))) {
       if (ConstantFP *CFP = dyn_cast<ConstantFP>(C)) {
@@ -3480,7 +3480,7 @@
   }
 
   if (IsExp10 && LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
-    SDValue Op = getValue(I.getOperand(2));
+    SDValue Op = getValue(I.getOperand(1));
 
     // Put the exponent in the right bit position for later addition to the
     // final result:
@@ -3585,9 +3585,9 @@
   } else {
     // No special expansion.
     result = DAG.getNode(ISD::FPOW, dl,
-                         getValue(I.getOperand(1)).getValueType(),
-                         getValue(I.getOperand(1)),
-                         getValue(I.getOperand(2)));
+                         getValue(I.getOperand(0)).getValueType(),
+                         getValue(I.getOperand(0)),
+                         getValue(I.getOperand(1)));
   }
 
   setValue(&I, result);
@@ -3665,11 +3665,11 @@
   case Intrinsic::vacopy:   visitVACopy(I); return 0;
   case Intrinsic::returnaddress:
     setValue(&I, DAG.getNode(ISD::RETURNADDR, dl, TLI.getPointerTy(),
-                             getValue(I.getOperand(1))));
+                             getValue(I.getOperand(0))));
     return 0;
   case Intrinsic::frameaddress:
     setValue(&I, DAG.getNode(ISD::FRAMEADDR, dl, TLI.getPointerTy(),
-                             getValue(I.getOperand(1))));
+                             getValue(I.getOperand(0))));
     return 0;
   case Intrinsic::setjmp:
     return "_setjmp"+!TLI.usesUnderscoreSetJmp();
@@ -3678,63 +3678,63 @@
   case Intrinsic::memcpy: {
     // Assert for address < 256 since we support only user defined address
     // spaces.
-    assert(cast<PointerType>(I.getOperand(1)->getType())->getAddressSpace()
+    assert(cast<PointerType>(I.getOperand(0)->getType())->getAddressSpace()
            < 256 &&
-           cast<PointerType>(I.getOperand(2)->getType())->getAddressSpace()
+           cast<PointerType>(I.getOperand(1)->getType())->getAddressSpace()
            < 256 &&
            "Unknown address space");
-    SDValue Op1 = getValue(I.getOperand(1));
-    SDValue Op2 = getValue(I.getOperand(2));
-    SDValue Op3 = getValue(I.getOperand(3));
-    unsigned Align = cast<ConstantInt>(I.getOperand(4))->getZExtValue();
-    bool isVol = cast<ConstantInt>(I.getOperand(5))->getZExtValue();
+    SDValue Op1 = getValue(I.getOperand(0));
+    SDValue Op2 = getValue(I.getOperand(1));
+    SDValue Op3 = getValue(I.getOperand(2));
+    unsigned Align = cast<ConstantInt>(I.getOperand(3))->getZExtValue();
+    bool isVol = cast<ConstantInt>(I.getOperand(4))->getZExtValue();
     DAG.setRoot(DAG.getMemcpy(getRoot(), dl, Op1, Op2, Op3, Align, isVol, false,
-                              I.getOperand(1), 0, I.getOperand(2), 0));
+                              I.getOperand(0), 0, I.getOperand(1), 0));
     return 0;
   }
   case Intrinsic::memset: {
     // Assert for address < 256 since we support only user defined address
     // spaces.
-    assert(cast<PointerType>(I.getOperand(1)->getType())->getAddressSpace()
+    assert(cast<PointerType>(I.getOperand(0)->getType())->getAddressSpace()
            < 256 &&
            "Unknown address space");
-    SDValue Op1 = getValue(I.getOperand(1));
-    SDValue Op2 = getValue(I.getOperand(2));
-    SDValue Op3 = getValue(I.getOperand(3));
-    unsigned Align = cast<ConstantInt>(I.getOperand(4))->getZExtValue();
-    bool isVol = cast<ConstantInt>(I.getOperand(5))->getZExtValue();
+    SDValue Op1 = getValue(I.getOperand(0));
+    SDValue Op2 = getValue(I.getOperand(1));
+    SDValue Op3 = getValue(I.getOperand(2));
+    unsigned Align = cast<ConstantInt>(I.getOperand(3))->getZExtValue();
+    bool isVol = cast<ConstantInt>(I.getOperand(4))->getZExtValue();
     DAG.setRoot(DAG.getMemset(getRoot(), dl, Op1, Op2, Op3, Align, isVol,
-                              I.getOperand(1), 0));
+                              I.getOperand(0), 0));
     return 0;
   }
   case Intrinsic::memmove: {
     // Assert for address < 256 since we support only user defined address
     // spaces.
-    assert(cast<PointerType>(I.getOperand(1)->getType())->getAddressSpace()
+    assert(cast<PointerType>(I.getOperand(0)->getType())->getAddressSpace()
            < 256 &&
-           cast<PointerType>(I.getOperand(2)->getType())->getAddressSpace()
+           cast<PointerType>(I.getOperand(1)->getType())->getAddressSpace()
            < 256 &&
            "Unknown address space");
-    SDValue Op1 = getValue(I.getOperand(1));
-    SDValue Op2 = getValue(I.getOperand(2));
-    SDValue Op3 = getValue(I.getOperand(3));
-    unsigned Align = cast<ConstantInt>(I.getOperand(4))->getZExtValue();
-    bool isVol = cast<ConstantInt>(I.getOperand(5))->getZExtValue();
+    SDValue Op1 = getValue(I.getOperand(0));
+    SDValue Op2 = getValue(I.getOperand(1));
+    SDValue Op3 = getValue(I.getOperand(2));
+    unsigned Align = cast<ConstantInt>(I.getOperand(3))->getZExtValue();
+    bool isVol = cast<ConstantInt>(I.getOperand(4))->getZExtValue();
 
     // If the source and destination are known to not be aliases, we can
     // lower memmove as memcpy.
     uint64_t Size = -1ULL;
     if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op3))
       Size = C->getZExtValue();
-    if (AA->alias(I.getOperand(1), Size, I.getOperand(2), Size) ==
+    if (AA->alias(I.getOperand(0), Size, I.getOperand(1), Size) ==
         AliasAnalysis::NoAlias) {
       DAG.setRoot(DAG.getMemcpy(getRoot(), dl, Op1, Op2, Op3, Align, isVol, 
-                                false, I.getOperand(1), 0, I.getOperand(2), 0));
+                                false, I.getOperand(0), 0, I.getOperand(1), 0));
       return 0;
     }
 
     DAG.setRoot(DAG.getMemmove(getRoot(), dl, Op1, Op2, Op3, Align, isVol,
-                               I.getOperand(1), 0, I.getOperand(2), 0));
+                               I.getOperand(0), 0, I.getOperand(1), 0));
     return 0;
   }
   case Intrinsic::dbg_declare: {
@@ -3846,7 +3846,7 @@
     // Insert the EHSELECTION instruction.
     SDVTList VTs = DAG.getVTList(TLI.getPointerTy(), MVT::Other);
     SDValue Ops[2];
-    Ops[0] = getValue(I.getOperand(1));
+    Ops[0] = getValue(I.getOperand(0));
     Ops[1] = getRoot();
     SDValue Op = DAG.getNode(ISD::EHSELECTION, dl, VTs, Ops, 2);
     DAG.setRoot(Op.getValue(1));
@@ -3856,7 +3856,7 @@
 
   case Intrinsic::eh_typeid_for: {
     // Find the type id for the given typeinfo.
-    GlobalVariable *GV = ExtractTypeInfo(I.getOperand(1));
+    GlobalVariable *GV = ExtractTypeInfo(I.getOperand(0));
     unsigned TypeID = DAG.getMachineFunction().getMMI().getTypeIDFor(GV);
     Res = DAG.getConstant(TypeID, MVT::i32);
     setValue(&I, Res);
@@ -3869,15 +3869,15 @@
     DAG.setRoot(DAG.getNode(ISD::EH_RETURN, dl,
                             MVT::Other,
                             getControlRoot(),
-                            getValue(I.getOperand(1)),
-                            getValue(I.getOperand(2))));
+                            getValue(I.getOperand(0)),
+                            getValue(I.getOperand(1))));
     return 0;
   case Intrinsic::eh_unwind_init:
     DAG.getMachineFunction().getMMI().setCallsUnwindInit(true);
     return 0;
   case Intrinsic::eh_dwarf_cfa: {
-    EVT VT = getValue(I.getOperand(1)).getValueType();
-    SDValue CfaArg = DAG.getSExtOrTrunc(getValue(I.getOperand(1)), dl,
+    EVT VT = getValue(I.getOperand(0)).getValueType();
+    SDValue CfaArg = DAG.getSExtOrTrunc(getValue(I.getOperand(0)), dl,
                                         TLI.getPointerTy());
     SDValue Offset = DAG.getNode(ISD::ADD, dl,
                                  TLI.getPointerTy(),
@@ -3893,7 +3893,7 @@
   }
   case Intrinsic::eh_sjlj_callsite: {
     MachineModuleInfo &MMI = DAG.getMachineFunction().getMMI();
-    ConstantInt *CI = dyn_cast<ConstantInt>(I.getOperand(1));
+    ConstantInt *CI = dyn_cast<ConstantInt>(I.getOperand(0));
     assert(CI && "Non-constant call site value in eh.sjlj.callsite!");
     assert(MMI.getCurrentCallSite() == 0 && "Overlapping call sites!");
 
@@ -3923,34 +3923,34 @@
     case Intrinsic::convertuu:  Code = ISD::CVT_UU; break;
     }
     EVT DestVT = TLI.getValueType(I.getType());
-    const Value *Op1 = I.getOperand(1);
+    const Value *Op1 = I.getOperand(0);
     Res = DAG.getConvertRndSat(DestVT, getCurDebugLoc(), getValue(Op1),
                                DAG.getValueType(DestVT),
                                DAG.getValueType(getValue(Op1).getValueType()),
+                               getValue(I.getOperand(1)),
                                getValue(I.getOperand(2)),
-                               getValue(I.getOperand(3)),
                                Code);
     setValue(&I, Res);
     return 0;
   }
   case Intrinsic::sqrt:
     setValue(&I, DAG.getNode(ISD::FSQRT, dl,
-                             getValue(I.getOperand(1)).getValueType(),
-                             getValue(I.getOperand(1))));
+                             getValue(I.getOperand(0)).getValueType(),
+                             getValue(I.getOperand(0))));
     return 0;
   case Intrinsic::powi:
-    setValue(&I, ExpandPowI(dl, getValue(I.getOperand(1)),
-                            getValue(I.getOperand(2)), DAG));
+    setValue(&I, ExpandPowI(dl, getValue(I.getOperand(0)),
+                            getValue(I.getOperand(1)), DAG));
     return 0;
   case Intrinsic::sin:
     setValue(&I, DAG.getNode(ISD::FSIN, dl,
-                             getValue(I.getOperand(1)).getValueType(),
-                             getValue(I.getOperand(1))));
+                             getValue(I.getOperand(0)).getValueType(),
+                             getValue(I.getOperand(0))));
     return 0;
   case Intrinsic::cos:
     setValue(&I, DAG.getNode(ISD::FCOS, dl,
-                             getValue(I.getOperand(1)).getValueType(),
-                             getValue(I.getOperand(1))));
+                             getValue(I.getOperand(0)).getValueType(),
+                             getValue(I.getOperand(0))));
     return 0;
   case Intrinsic::log:
     visitLog(I);
@@ -3972,14 +3972,14 @@
     return 0;
   case Intrinsic::convert_to_fp16:
     setValue(&I, DAG.getNode(ISD::FP32_TO_FP16, dl,
-                             MVT::i16, getValue(I.getOperand(1))));
+                             MVT::i16, getValue(I.getOperand(0))));
     return 0;
   case Intrinsic::convert_from_fp16:
     setValue(&I, DAG.getNode(ISD::FP16_TO_FP32, dl,
-                             MVT::f32, getValue(I.getOperand(1))));
+                             MVT::f32, getValue(I.getOperand(0))));
     return 0;
   case Intrinsic::pcmarker: {
-    SDValue Tmp = getValue(I.getOperand(1));
+    SDValue Tmp = getValue(I.getOperand(0));
     DAG.setRoot(DAG.getNode(ISD::PCMARKER, dl, MVT::Other, getRoot(), Tmp));
     return 0;
   }
@@ -3994,23 +3994,23 @@
   }
   case Intrinsic::bswap:
     setValue(&I, DAG.getNode(ISD::BSWAP, dl,
-                             getValue(I.getOperand(1)).getValueType(),
-                             getValue(I.getOperand(1))));
+                             getValue(I.getOperand(0)).getValueType(),
+                             getValue(I.getOperand(0))));
     return 0;
   case Intrinsic::cttz: {
-    SDValue Arg = getValue(I.getOperand(1));
+    SDValue Arg = getValue(I.getOperand(0));
     EVT Ty = Arg.getValueType();
     setValue(&I, DAG.getNode(ISD::CTTZ, dl, Ty, Arg));
     return 0;
   }
   case Intrinsic::ctlz: {
-    SDValue Arg = getValue(I.getOperand(1));
+    SDValue Arg = getValue(I.getOperand(0));
     EVT Ty = Arg.getValueType();
     setValue(&I, DAG.getNode(ISD::CTLZ, dl, Ty, Arg));
     return 0;
   }
   case Intrinsic::ctpop: {
-    SDValue Arg = getValue(I.getOperand(1));
+    SDValue Arg = getValue(I.getOperand(0));
     EVT Ty = Arg.getValueType();
     setValue(&I, DAG.getNode(ISD::CTPOP, dl, Ty, Arg));
     return 0;
@@ -4024,7 +4024,7 @@
     return 0;
   }
   case Intrinsic::stackrestore: {
-    Res = getValue(I.getOperand(1));
+    Res = getValue(I.getOperand(0));
     DAG.setRoot(DAG.getNode(ISD::STACKRESTORE, dl, MVT::Other, getRoot(), Res));
     return 0;
   }
@@ -4034,8 +4034,8 @@
     MachineFrameInfo *MFI = MF.getFrameInfo();
     EVT PtrTy = TLI.getPointerTy();
 
-    SDValue Src = getValue(I.getOperand(1));   // The guard's value.
-    AllocaInst *Slot = cast<AllocaInst>(I.getOperand(2));
+    SDValue Src = getValue(I.getOperand(0));   // The guard's value.
+    AllocaInst *Slot = cast<AllocaInst>(I.getOperand(1));
 
     int FI = FuncInfo.StaticAllocaMap[Slot];
     MFI->setStackProtectorIndex(FI);
@@ -4072,14 +4072,14 @@
     return 0;
 
   case Intrinsic::init_trampoline: {
-    const Function *F = cast<Function>(I.getOperand(2)->stripPointerCasts());
+    const Function *F = cast<Function>(I.getOperand(1)->stripPointerCasts());
 
     SDValue Ops[6];
     Ops[0] = getRoot();
-    Ops[1] = getValue(I.getOperand(1));
-    Ops[2] = getValue(I.getOperand(2));
-    Ops[3] = getValue(I.getOperand(3));
-    Ops[4] = DAG.getSrcValue(I.getOperand(1));
+    Ops[1] = getValue(I.getOperand(0));
+    Ops[2] = getValue(I.getOperand(1));
+    Ops[3] = getValue(I.getOperand(2));
+    Ops[4] = DAG.getSrcValue(I.getOperand(0));
     Ops[5] = DAG.getSrcValue(F);
 
     Res = DAG.getNode(ISD::TRAMPOLINE, dl,
@@ -4092,8 +4092,8 @@
   }
   case Intrinsic::gcroot:
     if (GFI) {
-      const Value *Alloca = I.getOperand(1);
-      const Constant *TypeMap = cast<Constant>(I.getOperand(2));
+      const Value *Alloca = I.getOperand(0);
+      const Constant *TypeMap = cast<Constant>(I.getOperand(1));
 
       FrameIndexSDNode *FI = cast<FrameIndexSDNode>(getValue(Alloca).getNode());
       GFI->addStackRoot(FI->getIndex(), TypeMap);
@@ -4125,9 +4125,9 @@
   case Intrinsic::prefetch: {
     SDValue Ops[4];
     Ops[0] = getRoot();
-    Ops[1] = getValue(I.getOperand(1));
-    Ops[2] = getValue(I.getOperand(2));
-    Ops[3] = getValue(I.getOperand(3));
+    Ops[1] = getValue(I.getOperand(0));
+    Ops[2] = getValue(I.getOperand(1));
+    Ops[3] = getValue(I.getOperand(2));
     DAG.setRoot(DAG.getNode(ISD::PREFETCH, dl, MVT::Other, &Ops[0], 4));
     return 0;
   }
@@ -4136,7 +4136,7 @@
     SDValue Ops[6];
     Ops[0] = getRoot();
     for (int x = 1; x < 6; ++x)
-      Ops[x] = getValue(I.getOperand(x));
+      Ops[x] = getValue(I.getOperand(x - 1));
 
     DAG.setRoot(DAG.getNode(ISD::MEMBARRIER, dl, MVT::Other, &Ops[0], 6));
     return 0;
@@ -4145,12 +4145,12 @@
     SDValue Root = getRoot();
     SDValue L =
       DAG.getAtomic(ISD::ATOMIC_CMP_SWAP, getCurDebugLoc(),
-                    getValue(I.getOperand(2)).getValueType().getSimpleVT(),
+                    getValue(I.getOperand(1)).getValueType().getSimpleVT(),
                     Root,
+                    getValue(I.getOperand(0)),
                     getValue(I.getOperand(1)),
                     getValue(I.getOperand(2)),
-                    getValue(I.getOperand(3)),
-                    I.getOperand(1));
+                    I.getOperand(0));
     setValue(&I, L);
     DAG.setRoot(L.getValue(1));
     return 0;
@@ -4520,13 +4520,13 @@
   if (I.getNumOperands() != 4)
     return false;
 
-  const Value *LHS = I.getOperand(1), *RHS = I.getOperand(2);
+  const Value *LHS = I.getOperand(0), *RHS = I.getOperand(1);
   if (!LHS->getType()->isPointerTy() || !RHS->getType()->isPointerTy() ||
-      !I.getOperand(3)->getType()->isIntegerTy() ||
+      !I.getOperand(2)->getType()->isIntegerTy() ||
       !I.getType()->isIntegerTy())
     return false;
 
-  const ConstantInt *Size = dyn_cast<ConstantInt>(I.getOperand(3));
+  const ConstantInt *Size = dyn_cast<ConstantInt>(I.getOperand(2));
 
   // memcmp(S1,S2,2) != 0 -> (*(short*)LHS != *(short*)RHS)  != 0
   // memcmp(S1,S2,4) != 0 -> (*(int*)LHS != *(int*)RHS)  != 0
@@ -4617,50 +4617,50 @@
       StringRef Name = F->getName();
       if (Name == "copysign" || Name == "copysignf" || Name == "copysignl") {
         if (I.getNumOperands() == 3 &&   // Basic sanity checks.
-            I.getOperand(1)->getType()->isFloatingPointTy() &&
-            I.getType() == I.getOperand(1)->getType() &&
-            I.getType() == I.getOperand(2)->getType()) {
-          SDValue LHS = getValue(I.getOperand(1));
-          SDValue RHS = getValue(I.getOperand(2));
+            I.getOperand(0)->getType()->isFloatingPointTy() &&
+            I.getType() == I.getOperand(0)->getType() &&
+            I.getType() == I.getOperand(1)->getType()) {
+          SDValue LHS = getValue(I.getOperand(0));
+          SDValue RHS = getValue(I.getOperand(1));
           setValue(&I, DAG.getNode(ISD::FCOPYSIGN, getCurDebugLoc(),
                                    LHS.getValueType(), LHS, RHS));
           return;
         }
       } else if (Name == "fabs" || Name == "fabsf" || Name == "fabsl") {
         if (I.getNumOperands() == 2 &&   // Basic sanity checks.
-            I.getOperand(1)->getType()->isFloatingPointTy() &&
-            I.getType() == I.getOperand(1)->getType()) {
-          SDValue Tmp = getValue(I.getOperand(1));
+            I.getOperand(0)->getType()->isFloatingPointTy() &&
+            I.getType() == I.getOperand(0)->getType()) {
+          SDValue Tmp = getValue(I.getOperand(0));
           setValue(&I, DAG.getNode(ISD::FABS, getCurDebugLoc(),
                                    Tmp.getValueType(), Tmp));
           return;
         }
       } else if (Name == "sin" || Name == "sinf" || Name == "sinl") {
         if (I.getNumOperands() == 2 &&   // Basic sanity checks.
-            I.getOperand(1)->getType()->isFloatingPointTy() &&
-            I.getType() == I.getOperand(1)->getType() &&
+            I.getOperand(0)->getType()->isFloatingPointTy() &&
+            I.getType() == I.getOperand(0)->getType() &&
             I.onlyReadsMemory()) {
-          SDValue Tmp = getValue(I.getOperand(1));
+          SDValue Tmp = getValue(I.getOperand(0));
           setValue(&I, DAG.getNode(ISD::FSIN, getCurDebugLoc(),
                                    Tmp.getValueType(), Tmp));
           return;
         }
       } else if (Name == "cos" || Name == "cosf" || Name == "cosl") {
         if (I.getNumOperands() == 2 &&   // Basic sanity checks.
-            I.getOperand(1)->getType()->isFloatingPointTy() &&
-            I.getType() == I.getOperand(1)->getType() &&
+            I.getOperand(0)->getType()->isFloatingPointTy() &&
+            I.getType() == I.getOperand(0)->getType() &&
             I.onlyReadsMemory()) {
-          SDValue Tmp = getValue(I.getOperand(1));
+          SDValue Tmp = getValue(I.getOperand(0));
           setValue(&I, DAG.getNode(ISD::FCOS, getCurDebugLoc(),
                                    Tmp.getValueType(), Tmp));
           return;
         }
       } else if (Name == "sqrt" || Name == "sqrtf" || Name == "sqrtl") {
         if (I.getNumOperands() == 2 &&   // Basic sanity checks.
-            I.getOperand(1)->getType()->isFloatingPointTy() &&
-            I.getType() == I.getOperand(1)->getType() &&
+            I.getOperand(0)->getType()->isFloatingPointTy() &&
+            I.getType() == I.getOperand(0)->getType() &&
             I.onlyReadsMemory()) {
-          SDValue Tmp = getValue(I.getOperand(1));
+          SDValue Tmp = getValue(I.getOperand(0));
           setValue(&I, DAG.getNode(ISD::FSQRT, getCurDebugLoc(),
                                    Tmp.getValueType(), Tmp));
           return;
@@ -4670,14 +4670,14 @@
           return;
       }
     }
-  } else if (isa<InlineAsm>(I.getOperand(0))) {
+  } else if (isa<InlineAsm>(I.getCalledValue())) {
     visitInlineAsm(&I);
     return;
   }
 
   SDValue Callee;
   if (!RenameFn)
-    Callee = getValue(I.getOperand(0));
+    Callee = getValue(I.getCalledValue());
   else
     Callee = DAG.getExternalSymbol(RenameFn, TLI.getPointerTy());
 
@@ -5609,8 +5609,8 @@
 void SelectionDAGBuilder::visitVAStart(const CallInst &I) {
   DAG.setRoot(DAG.getNode(ISD::VASTART, getCurDebugLoc(),
                           MVT::Other, getRoot(),
-                          getValue(I.getOperand(1)),
-                          DAG.getSrcValue(I.getOperand(1))));
+                          getValue(I.getOperand(0)),
+                          DAG.getSrcValue(I.getOperand(0))));
 }
 
 void SelectionDAGBuilder::visitVAArg(const VAArgInst &I) {
@@ -5624,17 +5624,17 @@
 void SelectionDAGBuilder::visitVAEnd(const CallInst &I) {
   DAG.setRoot(DAG.getNode(ISD::VAEND, getCurDebugLoc(),
                           MVT::Other, getRoot(),
-                          getValue(I.getOperand(1)),
-                          DAG.getSrcValue(I.getOperand(1))));
+                          getValue(I.getOperand(0)),
+                          DAG.getSrcValue(I.getOperand(0))));
 }
 
 void SelectionDAGBuilder::visitVACopy(const CallInst &I) {
   DAG.setRoot(DAG.getNode(ISD::VACOPY, getCurDebugLoc(),
                           MVT::Other, getRoot(),
+                          getValue(I.getOperand(0)),
                           getValue(I.getOperand(1)),
-                          getValue(I.getOperand(2)),
-                          DAG.getSrcValue(I.getOperand(1)),
-                          DAG.getSrcValue(I.getOperand(2))));
+                          DAG.getSrcValue(I.getOperand(0)),
+                          DAG.getSrcValue(I.getOperand(1))));
 }
 
 /// TargetLowering::LowerCallTo - This is the default LowerCallTo

Modified: llvm/trunk/lib/CodeGen/ShadowStackGC.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ShadowStackGC.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/ShadowStackGC.cpp (original)
+++ llvm/trunk/lib/CodeGen/ShadowStackGC.cpp Thu Apr 15 05:49:53 2010
@@ -158,9 +158,9 @@
 
           // Create a new invoke instruction.
           Args.clear();
-          Args.append(CI->op_begin() + 1, CI->op_end());
+          Args.append(CI->op_begin(), CI->op_end() - 1);
 
-          InvokeInst *II = InvokeInst::Create(CI->getOperand(0),
+          InvokeInst *II = InvokeInst::Create(CI->getCalledValue(),
                                               NewBB, CleanupBB,
                                               Args.begin(), Args.end(),
                                               CI->getName(), CallBB);
@@ -194,7 +194,7 @@
   unsigned NumMeta = 0;
   SmallVector<Constant*,16> Metadata;
   for (unsigned I = 0; I != Roots.size(); ++I) {
-    Constant *C = cast<Constant>(Roots[I].first->getOperand(2));
+    Constant *C = cast<Constant>(Roots[I].first->getOperand(1));
     if (!C->isNullValue())
       NumMeta = I + 1;
     Metadata.push_back(ConstantExpr::getBitCast(C, VoidPtr));
@@ -322,16 +322,16 @@
 
   assert(Roots.empty() && "Not cleaned up?");
 
-  SmallVector<std::pair<CallInst*,AllocaInst*>,16> MetaRoots;
+  SmallVector<std::pair<CallInst*, AllocaInst*>,16> MetaRoots;
 
   for (Function::iterator BB = F.begin(), E = F.end(); BB != E; ++BB)
     for (BasicBlock::iterator II = BB->begin(), E = BB->end(); II != E;)
       if (IntrinsicInst *CI = dyn_cast<IntrinsicInst>(II++))
         if (Function *F = CI->getCalledFunction())
           if (F->getIntrinsicID() == Intrinsic::gcroot) {
-            std::pair<CallInst*,AllocaInst*> Pair = std::make_pair(
-              CI, cast<AllocaInst>(CI->getOperand(1)->stripPointerCasts()));
-            if (IsNullValue(CI->getOperand(2)))
+            std::pair<CallInst*, AllocaInst*> Pair = std::make_pair(
+              CI, cast<AllocaInst>(CI->getOperand(0)->stripPointerCasts()));
+            if (IsNullValue(CI->getOperand(1)))
               Roots.push_back(Pair);
             else
               MetaRoots.push_back(Pair);

Modified: llvm/trunk/lib/CodeGen/SjLjEHPrepare.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SjLjEHPrepare.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SjLjEHPrepare.cpp (original)
+++ llvm/trunk/lib/CodeGen/SjLjEHPrepare.cpp Thu Apr 15 05:49:53 2010
@@ -305,7 +305,7 @@
     for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ++I) {
       if (CallInst *CI = dyn_cast<CallInst>(I)) {
         if (CI->getCalledFunction() == SelectorFn) {
-          if (!PersonalityFn) PersonalityFn = CI->getOperand(2);
+          if (!PersonalityFn) PersonalityFn = CI->getOperand(1);
           EH_Selectors.push_back(CI);
         } else if (CI->getCalledFunction() == ExceptionFn) {
           EH_Exceptions.push_back(CI);

Modified: llvm/trunk/lib/Target/CBackend/CBackend.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CBackend/CBackend.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CBackend/CBackend.cpp (original)
+++ llvm/trunk/lib/Target/CBackend/CBackend.cpp Thu Apr 15 05:49:53 2010
@@ -2886,7 +2886,7 @@
   bool hasByVal = I.hasByValArgument();
   bool isStructRet = I.hasStructRetAttr();
   if (isStructRet) {
-    writeOperandDeref(I.getOperand(1));
+    writeOperandDeref(I.getOperand(0));
     Out << " = ";
   }
   
@@ -2942,7 +2942,7 @@
 
   unsigned NumDeclaredParams = FTy->getNumParams();
 
-  CallSite::arg_iterator AI = I.op_begin()+1, AE = I.op_end();
+  CallInst::op_iterator AI = I.op_begin(), AE = I.op_end() - 1;
   unsigned ArgNo = 0;
   if (isStructRet) {   // Skip struct return argument.
     ++AI;
@@ -2996,7 +2996,7 @@
     Out << "0; ";
       
     Out << "va_start(*(va_list*)";
-    writeOperand(I.getOperand(1));
+    writeOperand(I.getOperand(0));
     Out << ", ";
     // Output the last argument to the enclosing function.
     if (I.getParent()->getParent()->arg_empty())
@@ -3006,9 +3006,9 @@
     Out << ')';
     return true;
   case Intrinsic::vaend:
-    if (!isa<ConstantPointerNull>(I.getOperand(1))) {
+    if (!isa<ConstantPointerNull>(I.getOperand(0))) {
       Out << "0; va_end(*(va_list*)";
-      writeOperand(I.getOperand(1));
+      writeOperand(I.getOperand(0));
       Out << ')';
     } else {
       Out << "va_end(*(va_list*)0)";
@@ -3017,47 +3017,47 @@
   case Intrinsic::vacopy:
     Out << "0; ";
     Out << "va_copy(*(va_list*)";
-    writeOperand(I.getOperand(1));
+    writeOperand(I.getOperand(0));
     Out << ", *(va_list*)";
-    writeOperand(I.getOperand(2));
+    writeOperand(I.getOperand(1));
     Out << ')';
     return true;
   case Intrinsic::returnaddress:
     Out << "__builtin_return_address(";
-    writeOperand(I.getOperand(1));
+    writeOperand(I.getOperand(0));
     Out << ')';
     return true;
   case Intrinsic::frameaddress:
     Out << "__builtin_frame_address(";
-    writeOperand(I.getOperand(1));
+    writeOperand(I.getOperand(0));
     Out << ')';
     return true;
   case Intrinsic::powi:
     Out << "__builtin_powi(";
-    writeOperand(I.getOperand(1));
+    writeOperand(I.getOperand(0));
     Out << ", ";
-    writeOperand(I.getOperand(2));
+    writeOperand(I.getOperand(1));
     Out << ')';
     return true;
   case Intrinsic::setjmp:
     Out << "setjmp(*(jmp_buf*)";
-    writeOperand(I.getOperand(1));
+    writeOperand(I.getOperand(0));
     Out << ')';
     return true;
   case Intrinsic::longjmp:
     Out << "longjmp(*(jmp_buf*)";
-    writeOperand(I.getOperand(1));
+    writeOperand(I.getOperand(0));
     Out << ", ";
-    writeOperand(I.getOperand(2));
+    writeOperand(I.getOperand(1));
     Out << ')';
     return true;
   case Intrinsic::prefetch:
     Out << "LLVM_PREFETCH((const void *)";
+    writeOperand(I.getOperand(0));
+    Out << ", ";
     writeOperand(I.getOperand(1));
     Out << ", ";
     writeOperand(I.getOperand(2));
-    Out << ", ";
-    writeOperand(I.getOperand(3));
     Out << ")";
     return true;
   case Intrinsic::stacksave:
@@ -3074,7 +3074,7 @@
     printType(Out, I.getType());
     Out << ')';  
     // Multiple GCC builtins multiplex onto this intrinsic.
-    switch (cast<ConstantInt>(I.getOperand(3))->getZExtValue()) {
+    switch (cast<ConstantInt>(I.getOperand(2))->getZExtValue()) {
     default: llvm_unreachable("Invalid llvm.x86.sse.cmp!");
     case 0: Out << "__builtin_ia32_cmpeq"; break;
     case 1: Out << "__builtin_ia32_cmplt"; break;
@@ -3095,9 +3095,9 @@
       Out << 'd';
       
     Out << "(";
-    writeOperand(I.getOperand(1));
+    writeOperand(I.getOperand(0));
     Out << ", ";
-    writeOperand(I.getOperand(2));
+    writeOperand(I.getOperand(1));
     Out << ")";
     return true;
   case Intrinsic::ppc_altivec_lvsl:
@@ -3105,7 +3105,7 @@
     printType(Out, I.getType());
     Out << ')';  
     Out << "__builtin_altivec_lvsl(0, (void*)";
-    writeOperand(I.getOperand(1));
+    writeOperand(I.getOperand(0));
     Out << ")";
     return true;
   }
@@ -3218,7 +3218,7 @@
       DestVal = ResultVals[ValueCount].first;
       DestValNo = ResultVals[ValueCount].second;
     } else
-      DestVal = CI.getOperand(ValueCount-ResultVals.size()+1);
+      DestVal = CI.getOperand(ValueCount-ResultVals.size());
 
     if (I->isEarlyClobber)
       C = "&"+C;
@@ -3252,7 +3252,7 @@
     }
     
     assert(ValueCount >= ResultVals.size() && "Input can't refer to result");
-    Value *SrcVal = CI.getOperand(ValueCount-ResultVals.size()+1);
+    Value *SrcVal = CI.getOperand(ValueCount-ResultVals.size());
     
     Out << "\"" << C << "\"(";
     if (!I->isIndirect)

Modified: llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp (original)
+++ llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp Thu Apr 15 05:49:53 2010
@@ -1082,8 +1082,9 @@
 
     // Before we emit this instruction, we need to take care of generating any
     // forward references. So, we get the names of all the operands in advance
-    std::string* opNames = new std::string[I->getNumOperands()];
-    for (unsigned i = 0; i < I->getNumOperands(); i++) {
+    const unsigned Ops(I->getNumOperands());
+    std::string* opNames = new std::string[Ops];
+    for (unsigned i = 0; i < Ops; i++) {
       opNames[i] = getOpName(I->getOperand(i));
     }
 
@@ -1144,15 +1145,15 @@
       const InvokeInst* inv = cast<InvokeInst>(I);
       Out << "std::vector<Value*> " << iName << "_params;";
       nl(Out);
-      for (unsigned i = 3; i < inv->getNumOperands(); ++i) {
+      for (unsigned i = 0; i < inv->getNumOperands() - 3; ++i) {
         Out << iName << "_params.push_back("
             << opNames[i] << ");";
         nl(Out);
       }
       Out << "InvokeInst *" << iName << " = InvokeInst::Create("
-          << opNames[0] << ", "
-          << opNames[1] << ", "
-          << opNames[2] << ", "
+          << opNames[Ops - 3] << ", "
+          << opNames[Ops - 2] << ", "
+          << opNames[Ops - 1] << ", "
           << iName << "_params.begin(), " << iName << "_params.end(), \"";
       printEscapedString(inv->getName());
       Out << "\", " << bbname << ");";
@@ -1388,18 +1389,18 @@
       if (call->getNumOperands() > 2) {
         Out << "std::vector<Value*> " << iName << "_params;";
         nl(Out);
-        for (unsigned i = 1; i < call->getNumOperands(); ++i) {
+        for (unsigned i = 0; i < call->getNumOperands() - 1; ++i) {
           Out << iName << "_params.push_back(" << opNames[i] << ");";
           nl(Out);
         }
         Out << "CallInst* " << iName << " = CallInst::Create("
-            << opNames[0] << ", " << iName << "_params.begin(), "
+            << opNames[Ops - 1] << ", " << iName << "_params.begin(), "
             << iName << "_params.end(), \"";
       } else if (call->getNumOperands() == 2) {
         Out << "CallInst* " << iName << " = CallInst::Create("
-            << opNames[0] << ", " << opNames[1] << ", \"";
+            << opNames[Ops - 1] << ", " << opNames[0] << ", \"";
       } else {
-        Out << "CallInst* " << iName << " = CallInst::Create(" << opNames[0]
+        Out << "CallInst* " << iName << " = CallInst::Create(" << opNames[Ops - 1]
             << ", \"";
       }
       printEscapedString(call->getName());

Modified: llvm/trunk/lib/Target/X86/X86FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FastISel.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86FastISel.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86FastISel.cpp Thu Apr 15 05:49:53 2010
@@ -1170,8 +1170,8 @@
     // Emit code inline code to store the stack guard onto the stack.
     EVT PtrTy = TLI.getPointerTy();
 
-    const Value *Op1 = I.getOperand(1); // The guard's value.
-    const AllocaInst *Slot = cast<AllocaInst>(I.getOperand(2));
+    const Value *Op1 = I.getOperand(0); // The guard's value.
+    const AllocaInst *Slot = cast<AllocaInst>(I.getOperand(1));
 
     // Grab the frame index.
     X86AddressMode AM;
@@ -1182,7 +1182,7 @@
     return true;
   }
   case Intrinsic::objectsize: {
-    ConstantInt *CI = dyn_cast<ConstantInt>(I.getOperand(2));
+    ConstantInt *CI = dyn_cast<ConstantInt>(I.getOperand(1));
     const Type *Ty = I.getCalledFunction()->getReturnType();
     
     assert(CI && "Non-constant type in Intrinsic::objectsize?");
@@ -1237,8 +1237,8 @@
     if (!isTypeLegal(RetTy, VT))
       return false;
 
-    const Value *Op1 = I.getOperand(1);
-    const Value *Op2 = I.getOperand(2);
+    const Value *Op1 = I.getOperand(0);
+    const Value *Op2 = I.getOperand(1);
     unsigned Reg1 = getRegForValue(Op1);
     unsigned Reg2 = getRegForValue(Op2);
 
@@ -1281,7 +1281,7 @@
 
 bool X86FastISel::X86SelectCall(const Instruction *I) {
   const CallInst *CI = cast<CallInst>(I);
-  const Value *Callee = I->getOperand(0);
+  const Value *Callee = CI->getCalledValue();
 
   // Can't handle inline asm yet.
   if (isa<InlineAsm>(Callee))

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Apr 15 05:49:53 2010
@@ -9918,7 +9918,7 @@
 
   // Verify this is a simple bswap.
   if (CI->getNumOperands() != 2 ||
-      CI->getType() != CI->getOperand(1)->getType() ||
+      CI->getType() != CI->getOperand(0)->getType() ||
       !CI->getType()->isIntegerTy())
     return false;
 
@@ -9931,7 +9931,7 @@
   Module *M = CI->getParent()->getParent()->getParent();
   Constant *Int = Intrinsic::getDeclaration(M, Intrinsic::bswap, Tys, 1);
 
-  Value *Op = CI->getOperand(1);
+  Value *Op = CI->getOperand(0);
   Op = CallInst::Create(Int, Op, CI->getName(), CI);
 
   CI->replaceAllUsesWith(Op);

Modified: llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp Thu Apr 15 05:49:53 2010
@@ -222,12 +222,12 @@
         GS.HasPHIUser = true;
       } else if (isa<CmpInst>(I)) {
       } else if (isa<MemTransferInst>(I)) {
-        if (I->getOperand(1) == V)
+        if (I->getOperand(0) == V)
           GS.StoredType = GlobalStatus::isStored;
-        if (I->getOperand(2) == V)
+        if (I->getOperand(1) == V)
           GS.isLoaded = true;
       } else if (isa<MemSetInst>(I)) {
-        assert(I->getOperand(1) == V && "Memset only takes one pointer!");
+        assert(I->getOperand(0) == V && "Memset only takes one pointer!");
         GS.StoredType = GlobalStatus::isStored;
       } else {
         return true;  // Any other non-load instruction might take address!
@@ -1323,8 +1323,8 @@
   //      if (F2) { free(F2); F2 = 0; }
   //    }
   // The malloc can also fail if its argument is too large.
-  Constant *ConstantZero = ConstantInt::get(CI->getOperand(1)->getType(), 0);
-  Value *RunningOr = new ICmpInst(CI, ICmpInst::ICMP_SLT, CI->getOperand(1),
+  Constant *ConstantZero = ConstantInt::get(CI->getOperand(0)->getType(), 0);
+  Value *RunningOr = new ICmpInst(CI, ICmpInst::ICMP_SLT, CI->getOperand(0),
                                   ConstantZero, "isneg");
   for (unsigned i = 0, e = FieldMallocs.size(); i != e; ++i) {
     Value *Cond = new ICmpInst(CI, ICmpInst::ICMP_EQ, FieldMallocs[i],
@@ -1511,10 +1511,10 @@
 
   // If this is an allocation of a fixed size array of structs, analyze as a
   // variable size array.  malloc [100 x struct],1 -> malloc struct, 100
-  if (NElems == ConstantInt::get(CI->getOperand(1)->getType(), 1))
+  if (NElems == ConstantInt::get(CI->getOperand(0)->getType(), 1))
     if (const ArrayType *AT = dyn_cast<ArrayType>(AllocTy))
       AllocTy = AT->getElementType();
-  
+
   const StructType *AllocSTy = dyn_cast<StructType>(AllocTy);
   if (!AllocSTy)
     return false;
@@ -1641,7 +1641,7 @@
         // bool.
         Instruction *StoredVal = cast<Instruction>(SI->getOperand(0));
 
-        // If we're already replaced the input, StoredVal will be a cast or
+        // If we've already replaced the input, StoredVal will be a cast or
         // select instruction.  If not, it will be a load of the original
         // global.
         if (LoadInst *LI = dyn_cast<LoadInst>(StoredVal)) {
@@ -2262,8 +2262,8 @@
     } else if (SelectInst *SI = dyn_cast<SelectInst>(CurInst)) {
       InstResult =
             ConstantExpr::getSelect(getVal(Values, SI->getOperand(0)),
-                                           getVal(Values, SI->getOperand(1)),
-                                           getVal(Values, SI->getOperand(2)));
+                                    getVal(Values, SI->getOperand(1)),
+                                    getVal(Values, SI->getOperand(2)));
     } else if (GetElementPtrInst *GEP = dyn_cast<GetElementPtrInst>(CurInst)) {
       Constant *P = getVal(Values, GEP->getOperand(0));
       SmallVector<Constant*, 8> GEPOps;
@@ -2295,14 +2295,14 @@
       }
 
       // Cannot handle inline asm.
-      if (isa<InlineAsm>(CI->getOperand(0))) return false;
+      if (isa<InlineAsm>(CI->getCalledValue())) return false;
 
       // Resolve function pointers.
-      Function *Callee = dyn_cast<Function>(getVal(Values, CI->getOperand(0)));
+      Function *Callee = dyn_cast<Function>(getVal(Values, CI->getCalledValue()));
       if (!Callee) return false;  // Cannot resolve.
 
       SmallVector<Constant*, 8> Formals;
-      for (User::op_iterator i = CI->op_begin() + 1, e = CI->op_end();
+      for (User::op_iterator i = CI->op_begin(), e = CI->op_end() - 1;
            i != e; ++i)
         Formals.push_back(getVal(Values, *i));
 

Modified: llvm/trunk/lib/Transforms/IPO/LowerSetJmp.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/LowerSetJmp.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/LowerSetJmp.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/LowerSetJmp.cpp Thu Apr 15 05:49:53 2010
@@ -262,8 +262,8 @@
   // char*. It returns "void", so it doesn't need to replace any of
   // Inst's uses and doesn't get a name.
   CastInst* CI = 
-    new BitCastInst(Inst->getOperand(1), SBPTy, "LJBuf", Inst);
-  Value *Args[] = { CI, Inst->getOperand(2) };
+    new BitCastInst(Inst->getOperand(0), SBPTy, "LJBuf", Inst);
+  Value *Args[] = { CI, Inst->getOperand(1) };
   CallInst::Create(ThrowLongJmp, Args, Args + 2, "", Inst);
 
   SwitchValuePair& SVP = SwitchValMap[Inst->getParent()->getParent()];
@@ -378,7 +378,7 @@
   const Type* SBPTy =
           Type::getInt8PtrTy(Inst->getContext());
   CastInst* BufPtr = 
-    new BitCastInst(Inst->getOperand(1), SBPTy, "SBJmpBuf", Inst);
+    new BitCastInst(Inst->getOperand(0), SBPTy, "SBJmpBuf", Inst);
   Value *Args[] = {
     GetSetJmpMap(Func), BufPtr,
     ConstantInt::get(Type::getInt32Ty(Inst->getContext()), SetJmpIDMap[Func]++)
@@ -473,7 +473,7 @@
 
   // Construct the new "invoke" instruction.
   TerminatorInst* Term = OldBB->getTerminator();
-  std::vector<Value*> Params(CI.op_begin() + 1, CI.op_end());
+  std::vector<Value*> Params(CI.op_begin(), CI.op_end() - 1);
   InvokeInst* II =
     InvokeInst::Create(CI.getCalledValue(), NewBB, PrelimBBMap[Func],
                        Params.begin(), Params.end(), CI.getName(), Term);

Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp Thu Apr 15 05:49:53 2010
@@ -109,8 +109,8 @@
 }
 
 Instruction *InstCombiner::SimplifyMemTransfer(MemIntrinsic *MI) {
-  unsigned DstAlign = GetOrEnforceKnownAlignment(MI->getOperand(1));
-  unsigned SrcAlign = GetOrEnforceKnownAlignment(MI->getOperand(2));
+  unsigned DstAlign = GetOrEnforceKnownAlignment(MI->getOperand(0));
+  unsigned SrcAlign = GetOrEnforceKnownAlignment(MI->getOperand(1));
   unsigned MinAlign = std::min(DstAlign, SrcAlign);
   unsigned CopyAlign = MI->getAlignment();
 
@@ -122,7 +122,7 @@
   
   // If MemCpyInst length is 1/2/4/8 bytes then replace memcpy with
   // load/store.
-  ConstantInt *MemOpLength = dyn_cast<ConstantInt>(MI->getOperand(3));
+  ConstantInt *MemOpLength = dyn_cast<ConstantInt>(MI->getOperand(2));
   if (MemOpLength == 0) return 0;
   
   // Source and destination pointer types are always "i8*" for intrinsic.  See
@@ -137,9 +137,9 @@
   
   // Use an integer load+store unless we can find something better.
   unsigned SrcAddrSp =
-    cast<PointerType>(MI->getOperand(2)->getType())->getAddressSpace();
-  unsigned DstAddrSp =
     cast<PointerType>(MI->getOperand(1)->getType())->getAddressSpace();
+  unsigned DstAddrSp =
+    cast<PointerType>(MI->getOperand(0)->getType())->getAddressSpace();
 
   const IntegerType* IntType = IntegerType::get(MI->getContext(), Size<<3);
   Type *NewSrcPtrTy = PointerType::get(IntType, SrcAddrSp);
@@ -151,8 +151,8 @@
   // an i64 load+store, here because this improves the odds that the source or
   // dest address will be promotable.  See if we can find a better type than the
   // integer datatype.
-  Value *StrippedDest = MI->getOperand(1)->stripPointerCasts();
-  if (StrippedDest != MI->getOperand(1)) {
+  Value *StrippedDest = MI->getOperand(0)->stripPointerCasts();
+  if (StrippedDest != MI->getOperand(0)) {
     const Type *SrcETy = cast<PointerType>(StrippedDest->getType())
                                     ->getElementType();
     if (TD && SrcETy->isSized() && TD->getTypeStoreSize(SrcETy) == Size) {
@@ -186,15 +186,15 @@
   SrcAlign = std::max(SrcAlign, CopyAlign);
   DstAlign = std::max(DstAlign, CopyAlign);
   
-  Value *Src = Builder->CreateBitCast(MI->getOperand(2), NewSrcPtrTy);
-  Value *Dest = Builder->CreateBitCast(MI->getOperand(1), NewDstPtrTy);
+  Value *Src = Builder->CreateBitCast(MI->getOperand(1), NewSrcPtrTy);
+  Value *Dest = Builder->CreateBitCast(MI->getOperand(0), NewDstPtrTy);
   Instruction *L = new LoadInst(Src, "tmp", MI->isVolatile(), SrcAlign);
   InsertNewInstBefore(L, *MI);
   InsertNewInstBefore(new StoreInst(L, Dest, MI->isVolatile(), DstAlign),
                       *MI);
 
   // Set the size of the copy to 0, it will be deleted on the next iteration.
-  MI->setOperand(3, Constant::getNullValue(MemOpLength->getType()));
+  MI->setOperand(2, Constant::getNullValue(MemOpLength->getType()));
   return MI;
 }
 
@@ -258,7 +258,7 @@
   
   IntrinsicInst *II = dyn_cast<IntrinsicInst>(&CI);
   if (!II) return visitCallSite(&CI);
-  
+
   // Intrinsics cannot occur in an invoke, so handle them here instead of in
   // visitCallSite.
   if (MemIntrinsic *MI = dyn_cast<MemIntrinsic>(II)) {
@@ -282,12 +282,12 @@
     if (MemMoveInst *MMI = dyn_cast<MemMoveInst>(MI)) {
       if (GlobalVariable *GVSrc = dyn_cast<GlobalVariable>(MMI->getSource()))
         if (GVSrc->isConstant()) {
-          Module *M = CI.getParent()->getParent()->getParent();
+          Module *M = MMI->getParent()->getParent()->getParent();
           Intrinsic::ID MemCpyID = Intrinsic::memcpy;
-          const Type *Tys[3] = { CI.getOperand(1)->getType(),
-                                 CI.getOperand(2)->getType(),
-                                 CI.getOperand(3)->getType() };
-          CI.setOperand(0, 
+          const Type *Tys[3] = { CI.getOperand(0)->getType(),
+                                 CI.getOperand(1)->getType(),
+                                 CI.getOperand(2)->getType() };
+          MMI->setCalledFunction(
                         Intrinsic::getDeclaration(M, MemCpyID, Tys, 3));
           Changed = true;
         }
@@ -297,21 +297,19 @@
       // memmove(x,x,size) -> noop.
       if (MTI->getSource() == MTI->getDest())
         return EraseInstFromFunction(CI);
-    }
 
-    // If we can determine a pointer alignment that is bigger than currently
-    // set, update the alignment.
-    if (isa<MemTransferInst>(MI)) {
-      if (Instruction *I = SimplifyMemTransfer(MI))
+      // If we can determine a pointer alignment that is bigger than currently
+      // set, update the alignment.
+      if (Instruction *I = SimplifyMemTransfer(MTI))
         return I;
     } else if (MemSetInst *MSI = dyn_cast<MemSetInst>(MI)) {
       if (Instruction *I = SimplifyMemSet(MSI))
         return I;
     }
-          
+
     if (Changed) return II;
   }
-  
+
   switch (II->getIntrinsicID()) {
   default: break;
   case Intrinsic::objectsize: {
@@ -319,10 +317,10 @@
     if (!TD) break;
     
     const Type *ReturnTy = CI.getType();
-    bool Min = (cast<ConstantInt>(II->getOperand(2))->getZExtValue() == 1);
+    bool Min = (cast<ConstantInt>(II->getOperand(1))->getZExtValue() == 1);
 
     // Get to the real allocated thing and offset as fast as possible.
-    Value *Op1 = II->getOperand(1)->stripPointerCasts();
+    Value *Op1 = II->getOperand(0)->stripPointerCasts();
     
     // If we've stripped down to a single global variable that we
     // can know the size of then just return that.
@@ -390,7 +388,6 @@
       
       Constant *RetVal = ConstantInt::get(ReturnTy, Size-Offset);
       return ReplaceInstUsesWith(CI, RetVal);
-      
     } 
 
     // Do not return "I don't know" here. Later optimization passes could
@@ -399,45 +396,45 @@
   }
   case Intrinsic::bswap:
     // bswap(bswap(x)) -> x
-    if (IntrinsicInst *Operand = dyn_cast<IntrinsicInst>(II->getOperand(1)))
+    if (IntrinsicInst *Operand = dyn_cast<IntrinsicInst>(II->getOperand(0)))
       if (Operand->getIntrinsicID() == Intrinsic::bswap)
-        return ReplaceInstUsesWith(CI, Operand->getOperand(1));
+        return ReplaceInstUsesWith(CI, Operand->getOperand(0));
       
     // bswap(trunc(bswap(x))) -> trunc(lshr(x, c))
-    if (TruncInst *TI = dyn_cast<TruncInst>(II->getOperand(1))) {
+    if (TruncInst *TI = dyn_cast<TruncInst>(II->getOperand(0))) {
       if (IntrinsicInst *Operand = dyn_cast<IntrinsicInst>(TI->getOperand(0)))
         if (Operand->getIntrinsicID() == Intrinsic::bswap) {
           unsigned C = Operand->getType()->getPrimitiveSizeInBits() -
                        TI->getType()->getPrimitiveSizeInBits();
           Value *CV = ConstantInt::get(Operand->getType(), C);
-          Value *V = Builder->CreateLShr(Operand->getOperand(1), CV);
+          Value *V = Builder->CreateLShr(Operand->getOperand(0), CV);
           return new TruncInst(V, TI->getType());
         }
     }
       
     break;
   case Intrinsic::powi:
-    if (ConstantInt *Power = dyn_cast<ConstantInt>(II->getOperand(2))) {
+    if (ConstantInt *Power = dyn_cast<ConstantInt>(II->getOperand(1))) {
       // powi(x, 0) -> 1.0
       if (Power->isZero())
         return ReplaceInstUsesWith(CI, ConstantFP::get(CI.getType(), 1.0));
       // powi(x, 1) -> x
       if (Power->isOne())
-        return ReplaceInstUsesWith(CI, II->getOperand(1));
+        return ReplaceInstUsesWith(CI, II->getOperand(0));
       // powi(x, -1) -> 1/x
       if (Power->isAllOnesValue())
         return BinaryOperator::CreateFDiv(ConstantFP::get(CI.getType(), 1.0),
-                                          II->getOperand(1));
+                                          II->getOperand(0));
     }
     break;
   case Intrinsic::cttz: {
     // If all bits below the first known one are known zero,
     // this value is constant.
-    const IntegerType *IT = cast<IntegerType>(II->getOperand(1)->getType());
+    const IntegerType *IT = cast<IntegerType>(II->getOperand(0)->getType());
     uint32_t BitWidth = IT->getBitWidth();
     APInt KnownZero(BitWidth, 0);
     APInt KnownOne(BitWidth, 0);
-    ComputeMaskedBits(II->getOperand(1), APInt::getAllOnesValue(BitWidth),
+    ComputeMaskedBits(II->getOperand(0), APInt::getAllOnesValue(BitWidth),
                       KnownZero, KnownOne);
     unsigned TrailingZeros = KnownOne.countTrailingZeros();
     APInt Mask(APInt::getLowBitsSet(BitWidth, TrailingZeros));
@@ -450,11 +447,11 @@
   case Intrinsic::ctlz: {
     // If all bits above the first known one are known zero,
     // this value is constant.
-    const IntegerType *IT = cast<IntegerType>(II->getOperand(1)->getType());
+    const IntegerType *IT = cast<IntegerType>(II->getOperand(0)->getType());
     uint32_t BitWidth = IT->getBitWidth();
     APInt KnownZero(BitWidth, 0);
     APInt KnownOne(BitWidth, 0);
-    ComputeMaskedBits(II->getOperand(1), APInt::getAllOnesValue(BitWidth),
+    ComputeMaskedBits(II->getOperand(0), APInt::getAllOnesValue(BitWidth),
                       KnownZero, KnownOne);
     unsigned LeadingZeros = KnownOne.countLeadingZeros();
     APInt Mask(APInt::getHighBitsSet(BitWidth, LeadingZeros));
@@ -465,8 +462,8 @@
     }
     break;
   case Intrinsic::uadd_with_overflow: {
-    Value *LHS = II->getOperand(1), *RHS = II->getOperand(2);
-    const IntegerType *IT = cast<IntegerType>(II->getOperand(1)->getType());
+    Value *LHS = II->getOperand(0), *RHS = II->getOperand(1);
+    const IntegerType *IT = cast<IntegerType>(II->getOperand(0)->getType());
     uint32_t BitWidth = IT->getBitWidth();
     APInt Mask = APInt::getSignBit(BitWidth);
     APInt LHSKnownZero(BitWidth, 0);
@@ -510,19 +507,19 @@
   // FALL THROUGH uadd into sadd
   case Intrinsic::sadd_with_overflow:
     // Canonicalize constants into the RHS.
-    if (isa<Constant>(II->getOperand(1)) &&
-        !isa<Constant>(II->getOperand(2))) {
-      Value *LHS = II->getOperand(1);
-      II->setOperand(1, II->getOperand(2));
-      II->setOperand(2, LHS);
+    if (isa<Constant>(II->getOperand(0)) &&
+        !isa<Constant>(II->getOperand(1))) {
+      Value *LHS = II->getOperand(0);
+      II->setOperand(0, II->getOperand(1));
+      II->setOperand(1, LHS);
       return II;
     }
 
     // X + undef -> undef
-    if (isa<UndefValue>(II->getOperand(2)))
+    if (isa<UndefValue>(II->getOperand(1)))
       return ReplaceInstUsesWith(CI, UndefValue::get(II->getType()));
       
-    if (ConstantInt *RHS = dyn_cast<ConstantInt>(II->getOperand(2))) {
+    if (ConstantInt *RHS = dyn_cast<ConstantInt>(II->getOperand(1))) {
       // X + 0 -> {X, false}
       if (RHS->isZero()) {
         Constant *V[] = {
@@ -530,7 +527,7 @@
           ConstantInt::getFalse(II->getContext())
         };
         Constant *Struct = ConstantStruct::get(II->getContext(), V, 2, false);
-        return InsertValueInst::Create(Struct, II->getOperand(1), 0);
+        return InsertValueInst::Create(Struct, II->getOperand(0), 0);
       }
     }
     break;
@@ -538,38 +535,38 @@
   case Intrinsic::ssub_with_overflow:
     // undef - X -> undef
     // X - undef -> undef
-    if (isa<UndefValue>(II->getOperand(1)) ||
-        isa<UndefValue>(II->getOperand(2)))
+    if (isa<UndefValue>(II->getOperand(0)) ||
+        isa<UndefValue>(II->getOperand(1)))
       return ReplaceInstUsesWith(CI, UndefValue::get(II->getType()));
       
-    if (ConstantInt *RHS = dyn_cast<ConstantInt>(II->getOperand(2))) {
+    if (ConstantInt *RHS = dyn_cast<ConstantInt>(II->getOperand(1))) {
       // X - 0 -> {X, false}
       if (RHS->isZero()) {
         Constant *V[] = {
-          UndefValue::get(II->getOperand(1)->getType()),
+          UndefValue::get(II->getOperand(0)->getType()),
           ConstantInt::getFalse(II->getContext())
         };
         Constant *Struct = ConstantStruct::get(II->getContext(), V, 2, false);
-        return InsertValueInst::Create(Struct, II->getOperand(1), 0);
+        return InsertValueInst::Create(Struct, II->getOperand(0), 0);
       }
     }
     break;
   case Intrinsic::umul_with_overflow:
   case Intrinsic::smul_with_overflow:
     // Canonicalize constants into the RHS.
-    if (isa<Constant>(II->getOperand(1)) &&
-        !isa<Constant>(II->getOperand(2))) {
-      Value *LHS = II->getOperand(1);
-      II->setOperand(1, II->getOperand(2));
-      II->setOperand(2, LHS);
+    if (isa<Constant>(II->getOperand(0)) &&
+        !isa<Constant>(II->getOperand(1))) {
+      Value *LHS = II->getOperand(0);
+      II->setOperand(0, II->getOperand(1));
+      II->setOperand(1, LHS);
       return II;
     }
 
     // X * undef -> undef
-    if (isa<UndefValue>(II->getOperand(2)))
+    if (isa<UndefValue>(II->getOperand(1)))
       return ReplaceInstUsesWith(CI, UndefValue::get(II->getType()));
       
-    if (ConstantInt *RHSI = dyn_cast<ConstantInt>(II->getOperand(2))) {
+    if (ConstantInt *RHSI = dyn_cast<ConstantInt>(II->getOperand(1))) {
       // X*0 -> {0, false}
       if (RHSI->isZero())
         return ReplaceInstUsesWith(CI, Constant::getNullValue(II->getType()));
@@ -577,11 +574,11 @@
       // X * 1 -> {X, false}
       if (RHSI->equalsInt(1)) {
         Constant *V[] = {
-          UndefValue::get(II->getOperand(1)->getType()),
+          UndefValue::get(II->getOperand(0)->getType()),
           ConstantInt::getFalse(II->getContext())
         };
         Constant *Struct = ConstantStruct::get(II->getContext(), V, 2, false);
-        return InsertValueInst::Create(Struct, II->getOperand(1), 0);
+        return InsertValueInst::Create(Struct, II->getOperand(0), 0);
       }
     }
     break;
@@ -592,8 +589,8 @@
   case Intrinsic::x86_sse2_loadu_dq:
     // Turn PPC lvx     -> load if the pointer is known aligned.
     // Turn X86 loadups -> load if the pointer is known aligned.
-    if (GetOrEnforceKnownAlignment(II->getOperand(1), 16) >= 16) {
-      Value *Ptr = Builder->CreateBitCast(II->getOperand(1),
+    if (GetOrEnforceKnownAlignment(II->getOperand(0), 16) >= 16) {
+      Value *Ptr = Builder->CreateBitCast(II->getOperand(0),
                                          PointerType::getUnqual(II->getType()));
       return new LoadInst(Ptr);
     }
@@ -601,22 +598,22 @@
   case Intrinsic::ppc_altivec_stvx:
   case Intrinsic::ppc_altivec_stvxl:
     // Turn stvx -> store if the pointer is known aligned.
-    if (GetOrEnforceKnownAlignment(II->getOperand(2), 16) >= 16) {
+    if (GetOrEnforceKnownAlignment(II->getOperand(1), 16) >= 16) {
       const Type *OpPtrTy = 
-        PointerType::getUnqual(II->getOperand(1)->getType());
-      Value *Ptr = Builder->CreateBitCast(II->getOperand(2), OpPtrTy);
-      return new StoreInst(II->getOperand(1), Ptr);
+        PointerType::getUnqual(II->getOperand(0)->getType());
+      Value *Ptr = Builder->CreateBitCast(II->getOperand(1), OpPtrTy);
+      return new StoreInst(II->getOperand(0), Ptr);
     }
     break;
   case Intrinsic::x86_sse_storeu_ps:
   case Intrinsic::x86_sse2_storeu_pd:
   case Intrinsic::x86_sse2_storeu_dq:
     // Turn X86 storeu -> store if the pointer is known aligned.
-    if (GetOrEnforceKnownAlignment(II->getOperand(1), 16) >= 16) {
+    if (GetOrEnforceKnownAlignment(II->getOperand(0), 16) >= 16) {
       const Type *OpPtrTy = 
-        PointerType::getUnqual(II->getOperand(2)->getType());
-      Value *Ptr = Builder->CreateBitCast(II->getOperand(1), OpPtrTy);
-      return new StoreInst(II->getOperand(2), Ptr);
+        PointerType::getUnqual(II->getOperand(1)->getType());
+      Value *Ptr = Builder->CreateBitCast(II->getOperand(0), OpPtrTy);
+      return new StoreInst(II->getOperand(1), Ptr);
     }
     break;
     
@@ -624,12 +621,12 @@
     // These intrinsics only demands the 0th element of its input vector.  If
     // we can simplify the input based on that, do so now.
     unsigned VWidth =
-      cast<VectorType>(II->getOperand(1)->getType())->getNumElements();
+      cast<VectorType>(II->getOperand(0)->getType())->getNumElements();
     APInt DemandedElts(VWidth, 1);
     APInt UndefElts(VWidth, 0);
-    if (Value *V = SimplifyDemandedVectorElts(II->getOperand(1), DemandedElts,
+    if (Value *V = SimplifyDemandedVectorElts(II->getOperand(0), DemandedElts,
                                               UndefElts)) {
-      II->setOperand(1, V);
+      II->setOperand(0, V);
       return II;
     }
     break;
@@ -637,7 +634,7 @@
     
   case Intrinsic::ppc_altivec_vperm:
     // Turn vperm(V1,V2,mask) -> shuffle(V1,V2,mask) if mask is a constant.
-    if (ConstantVector *Mask = dyn_cast<ConstantVector>(II->getOperand(3))) {
+    if (ConstantVector *Mask = dyn_cast<ConstantVector>(II->getOperand(2))) {
       assert(Mask->getNumOperands() == 16 && "Bad type for intrinsic!");
       
       // Check that all of the elements are integer constants or undefs.
@@ -652,8 +649,8 @@
       
       if (AllEltsOk) {
         // Cast the input vectors to byte vectors.
-        Value *Op0 = Builder->CreateBitCast(II->getOperand(1), Mask->getType());
-        Value *Op1 = Builder->CreateBitCast(II->getOperand(2), Mask->getType());
+        Value *Op0 = Builder->CreateBitCast(II->getOperand(0), Mask->getType());
+        Value *Op1 = Builder->CreateBitCast(II->getOperand(1), Mask->getType());
         Value *Result = UndefValue::get(Op0->getType());
         
         // Only extract each element once.
@@ -686,7 +683,7 @@
   case Intrinsic::stackrestore: {
     // If the save is right next to the restore, remove the restore.  This can
     // happen when variable allocas are DCE'd.
-    if (IntrinsicInst *SS = dyn_cast<IntrinsicInst>(II->getOperand(1))) {
+    if (IntrinsicInst *SS = dyn_cast<IntrinsicInst>(II->getOperand(0))) {
       if (SS->getIntrinsicID() == Intrinsic::stacksave) {
         BasicBlock::iterator BI = SS;
         if (&*++BI == II)
@@ -843,7 +840,7 @@
                UndefValue::get(Type::getInt1PtrTy(Callee->getContext())),
                   CS.getInstruction());
 
-    // If CS dues not return void then replaceAllUsesWith undef.
+    // If CS does not return void then replaceAllUsesWith undef.
     // This allows ValueHandlers and custom metadata to adjust itself.
     if (!CS.getInstruction()->getType()->isVoidTy())
       CS.getInstruction()->
@@ -1137,7 +1134,7 @@
   IntrinsicInst *Tramp =
     cast<IntrinsicInst>(cast<BitCastInst>(Callee)->getOperand(0));
 
-  Function *NestF = cast<Function>(Tramp->getOperand(2)->stripPointerCasts());
+  Function *NestF = cast<Function>(Tramp->getOperand(1)->stripPointerCasts());
   const PointerType *NestFPTy = cast<PointerType>(NestF->getType());
   const FunctionType *NestFTy = cast<FunctionType>(NestFPTy->getElementType());
 
@@ -1178,7 +1175,7 @@
         do {
           if (Idx == NestIdx) {
             // Add the chain argument and attributes.
-            Value *NestVal = Tramp->getOperand(3);
+            Value *NestVal = Tramp->getOperand(2);
             if (NestVal->getType() != NestTy)
               NestVal = new BitCastInst(NestVal, NestTy, "nest", Caller);
             NewArgs.push_back(NestVal);

Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp Thu Apr 15 05:49:53 2010
@@ -1423,7 +1423,7 @@
       switch (II->getIntrinsicID()) {
       case Intrinsic::bswap:
         Worklist.Add(II);
-        ICI.setOperand(0, II->getOperand(1));
+        ICI.setOperand(0, II->getOperand(0));
         ICI.setOperand(1, ConstantInt::get(II->getContext(), RHSV.byteSwap()));
         return &ICI;
       case Intrinsic::ctlz:
@@ -1431,7 +1431,7 @@
         // ctz(A) == bitwidth(a)  ->  A == 0 and likewise for !=
         if (RHSV == RHS->getType()->getBitWidth()) {
           Worklist.Add(II);
-          ICI.setOperand(0, II->getOperand(1));
+          ICI.setOperand(0, II->getOperand(0));
           ICI.setOperand(1, ConstantInt::get(RHS->getType(), 0));
           return &ICI;
         }
@@ -1440,7 +1440,7 @@
         // popcount(A) == 0  ->  A == 0 and likewise for !=
         if (RHS->isZero()) {
           Worklist.Add(II);
-          ICI.setOperand(0, II->getOperand(1));
+          ICI.setOperand(0, II->getOperand(0));
           ICI.setOperand(1, RHS);
           return &ICI;
         }

Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp Thu Apr 15 05:49:53 2010
@@ -404,7 +404,7 @@
           isPowerOf2_32(BitWidth) && Log2_32(BitWidth) == Op1C->getZExtValue()){
         bool isCtPop = II->getIntrinsicID() == Intrinsic::ctpop;
         Constant *RHS = ConstantInt::getSigned(Op0->getType(), isCtPop ? -1:0);
-        Value *Cmp = Builder->CreateICmpEQ(II->getOperand(1), RHS);
+        Value *Cmp = Builder->CreateICmpEQ(II->getOperand(0), RHS);
         return new ZExtInst(Cmp, II->getType());
       }
     }

Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp Thu Apr 15 05:49:53 2010
@@ -732,10 +732,10 @@
           // the right place.
           Instruction *NewVal;
           if (InputBit > ResultBit)
-            NewVal = BinaryOperator::CreateLShr(I->getOperand(1),
+            NewVal = BinaryOperator::CreateLShr(II->getOperand(0),
                     ConstantInt::get(I->getType(), InputBit-ResultBit));
           else
-            NewVal = BinaryOperator::CreateShl(I->getOperand(1),
+            NewVal = BinaryOperator::CreateShl(II->getOperand(0),
                     ConstantInt::get(I->getType(), ResultBit-InputBit));
           NewVal->takeName(I);
           return InsertNewInstBefore(NewVal, *I);
@@ -1052,12 +1052,12 @@
     case Intrinsic::x86_sse2_mul_sd:
     case Intrinsic::x86_sse2_min_sd:
     case Intrinsic::x86_sse2_max_sd:
-      TmpV = SimplifyDemandedVectorElts(II->getOperand(1), DemandedElts,
+      TmpV = SimplifyDemandedVectorElts(II->getOperand(0), DemandedElts,
                                         UndefElts, Depth+1);
-      if (TmpV) { II->setOperand(1, TmpV); MadeChange = true; }
-      TmpV = SimplifyDemandedVectorElts(II->getOperand(2), DemandedElts,
+      if (TmpV) { II->setOperand(0, TmpV); MadeChange = true; }
+      TmpV = SimplifyDemandedVectorElts(II->getOperand(1), DemandedElts,
                                         UndefElts2, Depth+1);
-      if (TmpV) { II->setOperand(2, TmpV); MadeChange = true; }
+      if (TmpV) { II->setOperand(1, TmpV); MadeChange = true; }
 
       // If only the low elt is demanded and this is a scalarizable intrinsic,
       // scalarize it now.
@@ -1069,8 +1069,8 @@
         case Intrinsic::x86_sse2_sub_sd:
         case Intrinsic::x86_sse2_mul_sd:
           // TODO: Lower MIN/MAX/ABS/etc
-          Value *LHS = II->getOperand(1);
-          Value *RHS = II->getOperand(2);
+          Value *LHS = II->getOperand(0);
+          Value *RHS = II->getOperand(1);
           // Extract the element as scalars.
           LHS = InsertNewInstBefore(ExtractElementInst::Create(LHS, 
             ConstantInt::get(Type::getInt32Ty(I->getContext()), 0U)), *II);

Modified: llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp Thu Apr 15 05:49:53 2010
@@ -711,7 +711,7 @@
 }
 
 Instruction *InstCombiner::visitFree(Instruction &FI) {
-  Value *Op = FI.getOperand(1);
+  Value *Op = FI.getOperand(0);
 
   // free undef -> unreachable.
   if (isa<UndefValue>(Op)) {
@@ -896,7 +896,7 @@
   if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(Agg)) {
     // We're extracting from an intrinsic, see if we're the only user, which
     // allows us to simplify multiple result intrinsics to simpler things that
-    // just get one value..
+    // just get one value.
     if (II->hasOneUse()) {
       // Check if we're grabbing the overflow bit or the result of a 'with
       // overflow' intrinsic.  If it's the latter we can remove the intrinsic
@@ -905,7 +905,7 @@
       case Intrinsic::uadd_with_overflow:
       case Intrinsic::sadd_with_overflow:
         if (*EV.idx_begin() == 0) {  // Normal result.
-          Value *LHS = II->getOperand(1), *RHS = II->getOperand(2);
+          Value *LHS = II->getOperand(0), *RHS = II->getOperand(1);
           II->replaceAllUsesWith(UndefValue::get(II->getType()));
           EraseInstFromFunction(*II);
           return BinaryOperator::CreateAdd(LHS, RHS);
@@ -914,7 +914,7 @@
       case Intrinsic::usub_with_overflow:
       case Intrinsic::ssub_with_overflow:
         if (*EV.idx_begin() == 0) {  // Normal result.
-          Value *LHS = II->getOperand(1), *RHS = II->getOperand(2);
+          Value *LHS = II->getOperand(0), *RHS = II->getOperand(1);
           II->replaceAllUsesWith(UndefValue::get(II->getType()));
           EraseInstFromFunction(*II);
           return BinaryOperator::CreateSub(LHS, RHS);
@@ -923,7 +923,7 @@
       case Intrinsic::umul_with_overflow:
       case Intrinsic::smul_with_overflow:
         if (*EV.idx_begin() == 0) {  // Normal result.
-          Value *LHS = II->getOperand(1), *RHS = II->getOperand(2);
+          Value *LHS = II->getOperand(0), *RHS = II->getOperand(1);
           II->replaceAllUsesWith(UndefValue::get(II->getType()));
           EraseInstFromFunction(*II);
           return BinaryOperator::CreateMul(LHS, RHS);

Modified: llvm/trunk/lib/Transforms/Instrumentation/ProfilingUtils.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Instrumentation/ProfilingUtils.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Instrumentation/ProfilingUtils.cpp (original)
+++ llvm/trunk/lib/Transforms/Instrumentation/ProfilingUtils.cpp Thu Apr 15 05:49:53 2010
@@ -73,10 +73,10 @@
     if (AI->getType() != ArgVTy) {
       Instruction::CastOps opcode = CastInst::getCastOpcode(AI, false, ArgVTy, 
                                                             false);
-      InitCall->setOperand(2, 
+      InitCall->setOperand(1, 
           CastInst::Create(opcode, AI, ArgVTy, "argv.cast", InitCall));
     } else {
-      InitCall->setOperand(2, AI);
+      InitCall->setOperand(1, AI);
     }
     /* FALL THROUGH */
 
@@ -93,12 +93,12 @@
       }
       opcode = CastInst::getCastOpcode(AI, true,
                                        Type::getInt32Ty(Context), true);
-      InitCall->setOperand(1, 
+      InitCall->setOperand(0, 
           CastInst::Create(opcode, AI, Type::getInt32Ty(Context),
                            "argc.cast", InitCall));
     } else {
       AI->replaceAllUsesWith(InitCall);
-      InitCall->setOperand(1, AI);
+      InitCall->setOperand(0, AI);
     }
 
   case 0: break;

Modified: llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp Thu Apr 15 05:49:53 2010
@@ -123,14 +123,14 @@
   if (StoreInst *SI = dyn_cast<StoreInst>(I))
     return SI->getPointerOperand();
   if (MemIntrinsic *MI = dyn_cast<MemIntrinsic>(I))
-    return MI->getOperand(1);
+    return MI->getOperand(0);
   
   switch (cast<IntrinsicInst>(I)->getIntrinsicID()) {
   default: assert(false && "Unexpected intrinsic!");
   case Intrinsic::init_trampoline:
-    return I->getOperand(1);
+    return I->getOperand(0);
   case Intrinsic::lifetime_end:
-    return I->getOperand(2);
+    return I->getOperand(1);
   }
 }
 
@@ -152,7 +152,7 @@
     case Intrinsic::init_trampoline:
       return -1u;
     case Intrinsic::lifetime_end:
-      Len = I->getOperand(1);
+      Len = I->getOperand(0);
       break;
     }
   }
@@ -287,7 +287,7 @@
 
 /// handleFreeWithNonTrivialDependency - Handle frees of entire structures whose
 /// dependency is a store to a field of that structure.
-bool DSE::handleFreeWithNonTrivialDependency(Instruction *F, MemDepResult Dep) {
+bool DSE::handleFreeWithNonTrivialDependency(/*FIXME: Call*/Instruction *F, MemDepResult Dep) {
   AliasAnalysis &AA = getAnalysis<AliasAnalysis>();
   
   Instruction *Dependency = Dep.getInst();
@@ -297,7 +297,7 @@
   Value *DepPointer = getPointerOperand(Dependency)->getUnderlyingObject();
 
   // Check for aliasing.
-  if (AA.alias(F->getOperand(1), 1, DepPointer, 1) !=
+  if (AA.alias(F->getOperand(0), 1, DepPointer, 1) !=
          AliasAnalysis::MustAlias)
     return false;
   

Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Thu Apr 15 05:49:53 2010
@@ -271,7 +271,7 @@
   e.function = C->getCalledFunction();
   e.opcode = Expression::CALL;
 
-  for (CallInst::op_iterator I = C->op_begin()+1, E = C->op_end();
+  for (CallInst::op_iterator I = C->op_begin(), E = C->op_end() - 1;
        I != E; ++I)
     e.varargs.push_back(lookup_or_add(*I));
 
@@ -452,7 +452,7 @@
         return nextValueNumber++;
       }
 
-      for (unsigned i = 1; i < C->getNumOperands(); ++i) {
+      for (unsigned i = 0, e = C->getNumOperands() - 1; i < e; ++i) {
         uint32_t c_vn = lookup_or_add(C->getOperand(i));
         uint32_t cd_vn = lookup_or_add(local_cdep->getOperand(i));
         if (c_vn != cd_vn) {
@@ -508,7 +508,7 @@
       valueNumbering[C] = nextValueNumber;
       return nextValueNumber++;
     }
-    for (unsigned i = 1; i < C->getNumOperands(); ++i) {
+    for (unsigned i = 0, e = C->getNumOperands() - 1; i < e; ++i) {
       uint32_t c_vn = lookup_or_add(C->getOperand(i));
       uint32_t cd_vn = lookup_or_add(cdep->getOperand(i));
       if (c_vn != cd_vn) {

Modified: llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp Thu Apr 15 05:49:53 2010
@@ -744,7 +744,7 @@
   const Type *ArgTys[3] = { M->getRawDest()->getType(),
                             M->getRawSource()->getType(),
                             M->getLength()->getType() };
-  M->setOperand(0,Intrinsic::getDeclaration(Mod, Intrinsic::memcpy, ArgTys, 3));
+  M->setCalledFunction(Intrinsic::getDeclaration(Mod, Intrinsic::memcpy, ArgTys, 3));
 
   // MemDep may have over conservative information about this instruction, just
   // conservatively flush it from the cache.

Modified: llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp Thu Apr 15 05:49:53 2010
@@ -254,7 +254,7 @@
     if (Instruction *TheCopy = isOnlyCopiedFromConstantGlobal(AI)) {
       DEBUG(dbgs() << "Found alloca equal to global: " << *AI << '\n');
       DEBUG(dbgs() << "  memcpy = " << *TheCopy << '\n');
-      Constant *TheSrc = cast<Constant>(TheCopy->getOperand(2));
+      Constant *TheSrc = cast<Constant>(TheCopy->getOperand(1));
       AI->replaceAllUsesWith(ConstantExpr::getBitCast(TheSrc, AI->getType()));
       TheCopy->eraseFromParent();  // Don't mutate the global.
       AI->eraseFromParent();
@@ -404,11 +404,11 @@
       isSafeGEP(GEPI, AI, GEPOffset, Info);
       if (!Info.isUnsafe)
         isSafeForScalarRepl(GEPI, AI, GEPOffset, Info);
-    } else if (MemIntrinsic *MI = dyn_cast<MemIntrinsic>(UI)) {
+    } else if (MemIntrinsic *MI = dyn_cast<MemIntrinsic>(User)) {
       ConstantInt *Length = dyn_cast<ConstantInt>(MI->getLength());
       if (Length)
         isSafeMemAccess(AI, Offset, Length->getZExtValue(), 0,
-                        UI.getOperandNo() == 1, Info);
+                        UI.getOperandNo() == 0, Info);
       else
         MarkUnsafe(Info);
     } else if (LoadInst *LI = dyn_cast<LoadInst>(User)) {
@@ -756,7 +756,7 @@
   }
   
   // Process each element of the aggregate.
-  Value *TheFn = MI->getOperand(0);
+  Value *TheFn = MI->getCalledValue();
   const Type *BytePtrTy = MI->getRawDest()->getType();
   bool SROADest = MI->getRawDest() == Inst;
   
@@ -814,7 +814,7 @@
       // If the stored element is zero (common case), just store a null
       // constant.
       Constant *StoreVal;
-      if (ConstantInt *CI = dyn_cast<ConstantInt>(MI->getOperand(2))) {
+      if (ConstantInt *CI = dyn_cast<ConstantInt>(MI->getOperand(1))) {
         if (CI->isZero()) {
           StoreVal = Constant::getNullValue(EltTy);  // 0.0, null, 0, <0,0>
         } else {
@@ -877,7 +877,7 @@
       Value *Ops[] = {
         SROADest ? EltPtr : OtherElt,  // Dest ptr
         SROADest ? OtherElt : EltPtr,  // Src ptr
-        ConstantInt::get(MI->getOperand(3)->getType(), EltSize), // Size
+        ConstantInt::get(MI->getOperand(2)->getType(), EltSize), // Size
         // Align
         ConstantInt::get(Type::getInt32Ty(MI->getContext()), OtherEltAlign),
         MI->getVolatileCst()
@@ -892,8 +892,8 @@
     } else {
       assert(isa<MemSetInst>(MI));
       Value *Ops[] = {
-        EltPtr, MI->getOperand(2),  // Dest, Value,
-        ConstantInt::get(MI->getOperand(3)->getType(), EltSize), // Size
+        EltPtr, MI->getOperand(1),  // Dest, Value,
+        ConstantInt::get(MI->getOperand(2)->getType(), EltSize), // Size
         Zero,  // Align
         ConstantInt::get(Type::getInt1Ty(MI->getContext()), 0) // isVolatile
       };
@@ -1737,12 +1737,12 @@
     if (isOffset) return false;
 
     // If the memintrinsic isn't using the alloca as the dest, reject it.
-    if (UI.getOperandNo() != 1) return false;
+    if (UI.getOperandNo() != 0) return false;
     
     MemIntrinsic *MI = cast<MemIntrinsic>(U);
     
     // If the source of the memcpy/move is not a constant global, reject it.
-    if (!PointsToConstantGlobal(MI->getOperand(2)))
+    if (!PointsToConstantGlobal(MI->getOperand(1)))
       return false;
     
     // Otherwise, the transform is safe.  Remember the copy instruction.

Modified: llvm/trunk/lib/Transforms/Scalar/SimplifyLibCalls.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/SimplifyLibCalls.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/SimplifyLibCalls.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/SimplifyLibCalls.cpp Thu Apr 15 05:49:53 2010
@@ -110,8 +110,8 @@
       return 0;
 
     // Extract some information from the instruction
-    Value *Dst = CI->getOperand(1);
-    Value *Src = CI->getOperand(2);
+    Value *Dst = CI->getOperand(0);
+    Value *Src = CI->getOperand(1);
 
     // See if we can get the length of the input string.
     uint64_t Len = GetStringLength(Src);
@@ -162,12 +162,12 @@
       return 0;
 
     // Extract some information from the instruction
-    Value *Dst = CI->getOperand(1);
-    Value *Src = CI->getOperand(2);
+    Value *Dst = CI->getOperand(0);
+    Value *Src = CI->getOperand(1);
     uint64_t Len;
 
     // We don't do anything if length is not constant
-    if (ConstantInt *LengthArg = dyn_cast<ConstantInt>(CI->getOperand(3)))
+    if (ConstantInt *LengthArg = dyn_cast<ConstantInt>(CI->getOperand(2)))
       Len = LengthArg->getZExtValue();
     else
       return 0;
@@ -207,11 +207,11 @@
         FT->getParamType(0) != FT->getReturnType())
       return 0;
 
-    Value *SrcStr = CI->getOperand(1);
+    Value *SrcStr = CI->getOperand(0);
 
     // If the second operand is non-constant, see if we can compute the length
     // of the input string and turn this into memchr.
-    ConstantInt *CharC = dyn_cast<ConstantInt>(CI->getOperand(2));
+    ConstantInt *CharC = dyn_cast<ConstantInt>(CI->getOperand(1));
     if (CharC == 0) {
       // These optimizations require TargetData.
       if (!TD) return 0;
@@ -220,7 +220,7 @@
       if (Len == 0 || !FT->getParamType(1)->isIntegerTy(32))// memchr needs i32.
         return 0;
 
-      return EmitMemChr(SrcStr, CI->getOperand(2), // include nul.
+      return EmitMemChr(SrcStr, CI->getOperand(1), // include nul.
                         ConstantInt::get(TD->getIntPtrType(*Context), Len),
                         B, TD);
     }
@@ -265,7 +265,7 @@
         FT->getParamType(0) != Type::getInt8PtrTy(*Context))
       return 0;
 
-    Value *Str1P = CI->getOperand(1), *Str2P = CI->getOperand(2);
+    Value *Str1P = CI->getOperand(0), *Str2P = CI->getOperand(1);
     if (Str1P == Str2P)      // strcmp(x,x)  -> 0
       return ConstantInt::get(CI->getType(), 0);
 
@@ -314,13 +314,13 @@
         !FT->getParamType(2)->isIntegerTy())
       return 0;
 
-    Value *Str1P = CI->getOperand(1), *Str2P = CI->getOperand(2);
+    Value *Str1P = CI->getOperand(0), *Str2P = CI->getOperand(1);
     if (Str1P == Str2P)      // strncmp(x,x,n)  -> 0
       return ConstantInt::get(CI->getType(), 0);
 
     // Get the length argument if it is constant.
     uint64_t Length;
-    if (ConstantInt *LengthArg = dyn_cast<ConstantInt>(CI->getOperand(3)))
+    if (ConstantInt *LengthArg = dyn_cast<ConstantInt>(CI->getOperand(2)))
       Length = LengthArg->getZExtValue();
     else
       return 0;
@@ -365,7 +365,7 @@
         FT->getParamType(0) != Type::getInt8PtrTy(*Context))
       return 0;
 
-    Value *Dst = CI->getOperand(1), *Src = CI->getOperand(2);
+    Value *Dst = CI->getOperand(0), *Src = CI->getOperand(1);
     if (Dst == Src)      // strcpy(x,x)  -> x
       return Src;
 
@@ -381,7 +381,7 @@
     if (OptChkCall)
       EmitMemCpyChk(Dst, Src,
                     ConstantInt::get(TD->getIntPtrType(*Context), Len),
-                    CI->getOperand(3), B, TD);
+                    CI->getOperand(2), B, TD);
     else
       EmitMemCpy(Dst, Src,
                  ConstantInt::get(TD->getIntPtrType(*Context), Len),
@@ -402,9 +402,9 @@
         !FT->getParamType(2)->isIntegerTy())
       return 0;
 
-    Value *Dst = CI->getOperand(1);
-    Value *Src = CI->getOperand(2);
-    Value *LenOp = CI->getOperand(3);
+    Value *Dst = CI->getOperand(0);
+    Value *Src = CI->getOperand(1);
+    Value *LenOp = CI->getOperand(2);
 
     // See if we can get the length of the input string.
     uint64_t SrcLen = GetStringLength(Src);
@@ -452,7 +452,7 @@
         !FT->getReturnType()->isIntegerTy())
       return 0;
 
-    Value *Src = CI->getOperand(1);
+    Value *Src = CI->getOperand(0);
 
     // Constant folding: strlen("xyz") -> 3
     if (uint64_t Len = GetStringLength(Src))
@@ -477,7 +477,7 @@
         !FT->getParamType(1)->isPointerTy())
       return 0;
 
-    Value *EndPtr = CI->getOperand(2);
+    Value *EndPtr = CI->getOperand(1);
     if (isa<ConstantPointerNull>(EndPtr)) {
       CI->setOnlyReadsMemory();
       CI->addAttribute(1, Attribute::NoCapture);
@@ -500,17 +500,17 @@
       return 0;
 
     // fold strstr(x, x) -> x.
-    if (CI->getOperand(1) == CI->getOperand(2))
-      return B.CreateBitCast(CI->getOperand(1), CI->getType());
+    if (CI->getOperand(0) == CI->getOperand(1))
+      return B.CreateBitCast(CI->getOperand(0), CI->getType());
 
     // See if either input string is a constant string.
     std::string SearchStr, ToFindStr;
-    bool HasStr1 = GetConstantStringInfo(CI->getOperand(1), SearchStr);
-    bool HasStr2 = GetConstantStringInfo(CI->getOperand(2), ToFindStr);
+    bool HasStr1 = GetConstantStringInfo(CI->getOperand(0), SearchStr);
+    bool HasStr2 = GetConstantStringInfo(CI->getOperand(1), ToFindStr);
 
     // fold strstr(x, "") -> x.
     if (HasStr2 && ToFindStr.empty())
-      return B.CreateBitCast(CI->getOperand(1), CI->getType());
+      return B.CreateBitCast(CI->getOperand(0), CI->getType());
 
     // If both strings are known, constant fold it.
     if (HasStr1 && HasStr2) {
@@ -520,14 +520,14 @@
         return Constant::getNullValue(CI->getType());
 
       // strstr("abcd", "bc") -> gep((char*)"abcd", 1)
-      Value *Result = CastToCStr(CI->getOperand(1), B);
+      Value *Result = CastToCStr(CI->getOperand(0), B);
       Result = B.CreateConstInBoundsGEP1_64(Result, Offset, "strstr");
       return B.CreateBitCast(Result, CI->getType());
     }
 
     // fold strstr(x, "y") -> strchr(x, 'y').
     if (HasStr2 && ToFindStr.size() == 1)
-      return B.CreateBitCast(EmitStrChr(CI->getOperand(1), ToFindStr[0], B, TD),
+      return B.CreateBitCast(EmitStrChr(CI->getOperand(0), ToFindStr[0], B, TD),
                              CI->getType());
     return 0;
   }
@@ -545,13 +545,13 @@
         !FT->getReturnType()->isIntegerTy(32))
       return 0;
 
-    Value *LHS = CI->getOperand(1), *RHS = CI->getOperand(2);
+    Value *LHS = CI->getOperand(0), *RHS = CI->getOperand(1);
 
     if (LHS == RHS)  // memcmp(s,s,x) -> 0
       return Constant::getNullValue(CI->getType());
 
     // Make sure we have a constant length.
-    ConstantInt *LenC = dyn_cast<ConstantInt>(CI->getOperand(3));
+    ConstantInt *LenC = dyn_cast<ConstantInt>(CI->getOperand(2));
     if (!LenC) return 0;
     uint64_t Len = LenC->getZExtValue();
 
@@ -595,9 +595,9 @@
       return 0;
 
     // memcpy(x, y, n) -> llvm.memcpy(x, y, n, 1)
-    EmitMemCpy(CI->getOperand(1), CI->getOperand(2),
-               CI->getOperand(3), 1, false, B, TD);
-    return CI->getOperand(1);
+    EmitMemCpy(CI->getOperand(0), CI->getOperand(1),
+               CI->getOperand(2), 1, false, B, TD);
+    return CI->getOperand(0);
   }
 };
 
@@ -617,9 +617,9 @@
       return 0;
 
     // memmove(x, y, n) -> llvm.memmove(x, y, n, 1)
-    EmitMemMove(CI->getOperand(1), CI->getOperand(2),
-                CI->getOperand(3), 1, false, B, TD);
-    return CI->getOperand(1);
+    EmitMemMove(CI->getOperand(0), CI->getOperand(1),
+                CI->getOperand(2), 1, false, B, TD);
+    return CI->getOperand(0);
   }
 };
 
@@ -639,10 +639,10 @@
       return 0;
 
     // memset(p, v, n) -> llvm.memset(p, v, n, 1)
-    Value *Val = B.CreateIntCast(CI->getOperand(2), Type::getInt8Ty(*Context),
-                                 false);
-    EmitMemSet(CI->getOperand(1), Val,  CI->getOperand(3), false, B, TD);
-    return CI->getOperand(1);
+    Value *Val = B.CreateIntCast(CI->getOperand(1), Type::getInt8Ty(*Context),
+				 false);
+    EmitMemSet(CI->getOperand(0), Val,  CI->getOperand(2), false, B, TD);
+    return CI->getOperand(0);
   }
 };
 
@@ -663,7 +663,7 @@
         !FT->getParamType(0)->isFloatingPointTy())
       return 0;
 
-    Value *Op1 = CI->getOperand(1), *Op2 = CI->getOperand(2);
+    Value *Op1 = CI->getOperand(0), *Op2 = CI->getOperand(1);
     if (ConstantFP *Op1C = dyn_cast<ConstantFP>(Op1)) {
       if (Op1C->isExactlyValue(1.0))  // pow(1.0, x) -> 1.0
         return Op1C;
@@ -717,7 +717,7 @@
         !FT->getParamType(0)->isFloatingPointTy())
       return 0;
 
-    Value *Op = CI->getOperand(1);
+    Value *Op = CI->getOperand(0);
     // Turn exp2(sitofp(x)) -> ldexp(1.0, sext(x))  if sizeof(x) <= 32
     // Turn exp2(uitofp(x)) -> ldexp(1.0, zext(x))  if sizeof(x) < 32
     Value *LdExpArg = 0;
@@ -769,7 +769,7 @@
       return 0;
 
     // If this is something like 'floor((double)floatval)', convert to floorf.
-    FPExtInst *Cast = dyn_cast<FPExtInst>(CI->getOperand(1));
+    FPExtInst *Cast = dyn_cast<FPExtInst>(CI->getOperand(0));
     if (Cast == 0 || !Cast->getOperand(0)->getType()->isFloatTy())
       return 0;
 
@@ -798,7 +798,7 @@
         !FT->getParamType(0)->isIntegerTy())
       return 0;
 
-    Value *Op = CI->getOperand(1);
+    Value *Op = CI->getOperand(0);
 
     // Constant fold.
     if (ConstantInt *CI = dyn_cast<ConstantInt>(Op)) {
@@ -834,7 +834,7 @@
       return 0;
 
     // isdigit(c) -> (c-'0') <u 10
-    Value *Op = CI->getOperand(1);
+    Value *Op = CI->getOperand(0);
     Op = B.CreateSub(Op, ConstantInt::get(Type::getInt32Ty(*Context), '0'),
                      "isdigittmp");
     Op = B.CreateICmpULT(Op, ConstantInt::get(Type::getInt32Ty(*Context), 10),
@@ -855,7 +855,7 @@
       return 0;
 
     // isascii(c) -> c <u 128
-    Value *Op = CI->getOperand(1);
+    Value *Op = CI->getOperand(0);
     Op = B.CreateICmpULT(Op, ConstantInt::get(Type::getInt32Ty(*Context), 128),
                          "isascii");
     return B.CreateZExt(Op, CI->getType());
@@ -874,7 +874,7 @@
       return 0;
 
     // abs(x) -> x >s -1 ? x : -x
-    Value *Op = CI->getOperand(1);
+    Value *Op = CI->getOperand(0);
     Value *Pos = B.CreateICmpSGT(Op,
                              Constant::getAllOnesValue(Op->getType()),
                                  "ispos");
@@ -896,7 +896,7 @@
       return 0;
 
     // isascii(c) -> c & 0x7f
-    return B.CreateAnd(CI->getOperand(1),
+    return B.CreateAnd(CI->getOperand(0),
                        ConstantInt::get(CI->getType(),0x7F));
   }
 };
@@ -919,7 +919,7 @@
 
     // Check for a fixed format string.
     std::string FormatStr;
-    if (!GetConstantStringInfo(CI->getOperand(1), FormatStr))
+    if (!GetConstantStringInfo(CI->getOperand(0), FormatStr))
       return 0;
 
     // Empty format string -> noop.
@@ -951,10 +951,10 @@
     }
 
     // Optimize specific format strings.
-    // printf("%c", chr) --> putchar(*(i8*)dst)
+    // printf("%c", chr) --> putchar(chr)
     if (FormatStr == "%c" && CI->getNumOperands() > 2 &&
-        CI->getOperand(2)->getType()->isIntegerTy()) {
-      Value *Res = EmitPutChar(CI->getOperand(2), B, TD);
+        CI->getOperand(1)->getType()->isIntegerTy()) {
+      Value *Res = EmitPutChar(CI->getOperand(1), B, TD);
 
       if (CI->use_empty()) return CI;
       return B.CreateIntCast(Res, CI->getType(), true);
@@ -962,9 +962,9 @@
 
     // printf("%s\n", str) --> puts(str)
     if (FormatStr == "%s\n" && CI->getNumOperands() > 2 &&
-        CI->getOperand(2)->getType()->isPointerTy() &&
+        CI->getOperand(1)->getType()->isPointerTy() &&
         CI->use_empty()) {
-      EmitPutS(CI->getOperand(2), B, TD);
+      EmitPutS(CI->getOperand(1), B, TD);
       return CI;
     }
     return 0;
@@ -985,7 +985,7 @@
 
     // Check for a fixed format string.
     std::string FormatStr;
-    if (!GetConstantStringInfo(CI->getOperand(2), FormatStr))
+    if (!GetConstantStringInfo(CI->getOperand(1), FormatStr))
       return 0;
 
     // If we just have a format string (nothing else crazy) transform it.
@@ -1000,7 +1000,7 @@
       if (!TD) return 0;
 
       // sprintf(str, fmt) -> llvm.memcpy(str, fmt, strlen(fmt)+1, 1)
-      EmitMemCpy(CI->getOperand(1), CI->getOperand(2), // Copy the nul byte.
+      EmitMemCpy(CI->getOperand(0), CI->getOperand(1), // Copy the nul byte.
                  ConstantInt::get(TD->getIntPtrType(*Context),
                  FormatStr.size()+1), 1, false, B, TD);
       return ConstantInt::get(CI->getType(), FormatStr.size());
@@ -1014,10 +1014,10 @@
     // Decode the second character of the format string.
     if (FormatStr[1] == 'c') {
       // sprintf(dst, "%c", chr) --> *(i8*)dst = chr; *((i8*)dst+1) = 0
-      if (!CI->getOperand(3)->getType()->isIntegerTy()) return 0;
-      Value *V = B.CreateTrunc(CI->getOperand(3),
+      if (!CI->getOperand(2)->getType()->isIntegerTy()) return 0;
+      Value *V = B.CreateTrunc(CI->getOperand(2),
                                Type::getInt8Ty(*Context), "char");
-      Value *Ptr = CastToCStr(CI->getOperand(1), B);
+      Value *Ptr = CastToCStr(CI->getOperand(0), B);
       B.CreateStore(V, Ptr);
       Ptr = B.CreateGEP(Ptr, ConstantInt::get(Type::getInt32Ty(*Context), 1),
                         "nul");
@@ -1031,13 +1031,13 @@
       if (!TD) return 0;
 
       // sprintf(dest, "%s", str) -> llvm.memcpy(dest, str, strlen(str)+1, 1)
-      if (!CI->getOperand(3)->getType()->isPointerTy()) return 0;
+      if (!CI->getOperand(2)->getType()->isPointerTy()) return 0;
 
-      Value *Len = EmitStrLen(CI->getOperand(3), B, TD);
+      Value *Len = EmitStrLen(CI->getOperand(2), B, TD);
       Value *IncLen = B.CreateAdd(Len,
                                   ConstantInt::get(Len->getType(), 1),
                                   "leninc");
-      EmitMemCpy(CI->getOperand(1), CI->getOperand(3), IncLen, 1, false, B, TD);
+      EmitMemCpy(CI->getOperand(0), CI->getOperand(2), IncLen, 1, false, B, TD);
 
       // The sprintf result is the unincremented number of bytes in the string.
       return B.CreateIntCast(Len, CI->getType(), false);
@@ -1061,8 +1061,8 @@
       return 0;
 
     // Get the element size and count.
-    ConstantInt *SizeC = dyn_cast<ConstantInt>(CI->getOperand(2));
-    ConstantInt *CountC = dyn_cast<ConstantInt>(CI->getOperand(3));
+    ConstantInt *SizeC = dyn_cast<ConstantInt>(CI->getOperand(1));
+    ConstantInt *CountC = dyn_cast<ConstantInt>(CI->getOperand(2));
     if (!SizeC || !CountC) return 0;
     uint64_t Bytes = SizeC->getZExtValue()*CountC->getZExtValue();
 
@@ -1072,8 +1072,8 @@
 
     // If this is writing one byte, turn it into fputc.
     if (Bytes == 1) {  // fwrite(S,1,1,F) -> fputc(S[0],F)
-      Value *Char = B.CreateLoad(CastToCStr(CI->getOperand(1), B), "char");
-      EmitFPutC(Char, CI->getOperand(4), B, TD);
+      Value *Char = B.CreateLoad(CastToCStr(CI->getOperand(0), B), "char");
+      EmitFPutC(Char, CI->getOperand(3), B, TD);
       return ConstantInt::get(CI->getType(), 1);
     }
 
@@ -1097,11 +1097,11 @@
       return 0;
 
     // fputs(s,F) --> fwrite(s,1,strlen(s),F)
-    uint64_t Len = GetStringLength(CI->getOperand(1));
+    uint64_t Len = GetStringLength(CI->getOperand(0));
     if (!Len) return 0;
-    EmitFWrite(CI->getOperand(1),
+    EmitFWrite(CI->getOperand(0),
                ConstantInt::get(TD->getIntPtrType(*Context), Len-1),
-               CI->getOperand(2), B, TD);
+               CI->getOperand(1), B, TD);
     return CI;  // Known to have no uses (see above).
   }
 };
@@ -1120,7 +1120,7 @@
 
     // All the optimizations depend on the format string.
     std::string FormatStr;
-    if (!GetConstantStringInfo(CI->getOperand(2), FormatStr))
+    if (!GetConstantStringInfo(CI->getOperand(1), FormatStr))
       return 0;
 
     // fprintf(F, "foo") --> fwrite("foo", 3, 1, F)
@@ -1132,10 +1132,10 @@
       // These optimizations require TargetData.
       if (!TD) return 0;
 
-      EmitFWrite(CI->getOperand(2),
+      EmitFWrite(CI->getOperand(1),
                  ConstantInt::get(TD->getIntPtrType(*Context),
                                   FormatStr.size()),
-                 CI->getOperand(1), B, TD);
+                 CI->getOperand(0), B, TD);
       return ConstantInt::get(CI->getType(), FormatStr.size());
     }
 
@@ -1146,17 +1146,17 @@
 
     // Decode the second character of the format string.
     if (FormatStr[1] == 'c') {
-      // fprintf(F, "%c", chr) --> *(i8*)dst = chr
-      if (!CI->getOperand(3)->getType()->isIntegerTy()) return 0;
-      EmitFPutC(CI->getOperand(3), CI->getOperand(1), B, TD);
+      // fprintf(F, "%c", chr) --> fputc(chr, F)
+      if (!CI->getOperand(2)->getType()->isIntegerTy()) return 0;
+      EmitFPutC(CI->getOperand(2), CI->getOperand(0), B, TD);
       return ConstantInt::get(CI->getType(), 1);
     }
 
     if (FormatStr[1] == 's') {
-      // fprintf(F, "%s", str) -> fputs(str, F)
-      if (!CI->getOperand(3)->getType()->isPointerTy() || !CI->use_empty())
+      // fprintf(F, "%s", str) --> fputs(str, F)
+      if (!CI->getOperand(2)->getType()->isPointerTy() || !CI->use_empty())
         return 0;
-      EmitFPutS(CI->getOperand(3), CI->getOperand(1), B, TD);
+      EmitFPutS(CI->getOperand(2), CI->getOperand(0), B, TD);
       return CI;
     }
     return 0;

Modified: llvm/trunk/lib/Transforms/Scalar/TailRecursionElimination.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/TailRecursionElimination.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/TailRecursionElimination.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/TailRecursionElimination.cpp Thu Apr 15 05:49:53 2010
@@ -250,7 +250,7 @@
     // If we are passing this argument into call as the corresponding
     // argument operand, then the argument is dynamically constant.
     // Otherwise, we cannot transform this function safely.
-    if (CI->getOperand(ArgNo+1) == Arg)
+    if (CI->getOperand(ArgNo) == Arg)
       return true;
   }
 
@@ -442,7 +442,7 @@
   // required PHI nodes, add entries into the PHI node for the actual
   // parameters passed into the tail-recursive call.
   for (unsigned i = 0, e = CI->getNumOperands()-1; i != e; ++i)
-    ArgumentPHIs[i]->addIncoming(CI->getOperand(i+1), BB);
+    ArgumentPHIs[i]->addIncoming(CI->getOperand(i), BB);
 
   // If we are introducing an accumulator variable to eliminate the recursion,
   // do so now.  Note that we _know_ that no subsequent tail recursion

Modified: llvm/trunk/lib/Transforms/Utils/AddrModeMatcher.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/AddrModeMatcher.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Utils/AddrModeMatcher.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/AddrModeMatcher.cpp Thu Apr 15 05:49:53 2010
@@ -382,7 +382,7 @@
   std::vector<InlineAsm::ConstraintInfo>
   Constraints = IA->ParseConstraints();
   
-  unsigned ArgNo = 1;   // ArgNo - The operand of the CallInst.
+  unsigned ArgNo = 0;   // ArgNo - The operand of the CallInst.
   for (unsigned i = 0, e = Constraints.size(); i != e; ++i) {
     TargetLowering::AsmOperandInfo OpInfo(Constraints[i]);
     
@@ -450,7 +450,7 @@
     
     if (CallInst *CI = dyn_cast<CallInst>(U)) {
       InlineAsm *IA = dyn_cast<InlineAsm>(CI->getCalledValue());
-      if (IA == 0) return true;
+      if (!IA) return true;
       
       // If this is a memory operand, we're cool, otherwise bail out.
       if (!IsOperandAMemoryOperand(CI, IA, I, TLI))

Modified: llvm/trunk/lib/Transforms/Utils/BuildLibCalls.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/BuildLibCalls.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Utils/BuildLibCalls.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/BuildLibCalls.cpp Thu Apr 15 05:49:53 2010
@@ -395,11 +395,11 @@
         FT->getParamType(2) != TD->getIntPtrType(Context) ||
         FT->getParamType(3) != TD->getIntPtrType(Context))
       return false;
-    
-    if (isFoldable(4, 3, false)) {
-      EmitMemCpy(CI->getOperand(1), CI->getOperand(2), CI->getOperand(3),
+
+    if (isFoldable(3, 2, false)) {
+      EmitMemCpy(CI->getOperand(0), CI->getOperand(1), CI->getOperand(2),
                  1, false, B, TD);
-      replaceCall(CI->getOperand(1));
+      replaceCall(CI->getOperand(0));
       return true;
     }
     return false;
@@ -418,11 +418,11 @@
         FT->getParamType(2) != TD->getIntPtrType(Context) ||
         FT->getParamType(3) != TD->getIntPtrType(Context))
       return false;
-    
-    if (isFoldable(4, 3, false)) {
-      EmitMemMove(CI->getOperand(1), CI->getOperand(2), CI->getOperand(3),
+
+    if (isFoldable(3, 2, false)) {
+      EmitMemMove(CI->getOperand(0), CI->getOperand(1), CI->getOperand(2),
                   1, false, B, TD);
-      replaceCall(CI->getOperand(1));
+      replaceCall(CI->getOperand(0));
       return true;
     }
     return false;
@@ -436,12 +436,12 @@
         FT->getParamType(2) != TD->getIntPtrType(Context) ||
         FT->getParamType(3) != TD->getIntPtrType(Context))
       return false;
-    
-    if (isFoldable(4, 3, false)) {
-      Value *Val = B.CreateIntCast(CI->getOperand(2), B.getInt8Ty(),
+
+    if (isFoldable(3, 2, false)) {
+      Value *Val = B.CreateIntCast(CI->getOperand(1), B.getInt8Ty(),
                                    false);
-      EmitMemSet(CI->getOperand(1), Val,  CI->getOperand(3), false, B, TD);
-      replaceCall(CI->getOperand(1));
+      EmitMemSet(CI->getOperand(0), Val,  CI->getOperand(2), false, B, TD);
+      replaceCall(CI->getOperand(0));
       return true;
     }
     return false;
@@ -462,8 +462,8 @@
     // st[rp]cpy_chk call which may fail at runtime if the size is too long.
     // TODO: It might be nice to get a maximum length out of the possible
     // string lengths for varying.
-    if (isFoldable(3, 2, true)) {
-      Value *Ret = EmitStrCpy(CI->getOperand(1), CI->getOperand(2), B, TD,
+    if (isFoldable(2, 1, true)) {
+      Value *Ret = EmitStrCpy(CI->getOperand(0), CI->getOperand(1), B, TD,
                               Name.substr(2, 6));
       replaceCall(Ret);
       return true;
@@ -479,10 +479,10 @@
         !FT->getParamType(2)->isIntegerTy() ||
         FT->getParamType(3) != TD->getIntPtrType(Context))
       return false;
-    
-    if (isFoldable(4, 3, false)) {
-      Value *Ret = EmitStrNCpy(CI->getOperand(1), CI->getOperand(2),
-                               CI->getOperand(3), B, TD, Name.substr(2, 7));
+
+    if (isFoldable(3, 2, false)) {
+      Value *Ret = EmitStrNCpy(CI->getOperand(0), CI->getOperand(1),
+                               CI->getOperand(2), B, TD, Name.substr(2, 7));
       replaceCall(Ret);
       return true;
     }

Modified: llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp Thu Apr 15 05:49:53 2010
@@ -66,7 +66,7 @@
     
     // Next, create the new invoke instruction, inserting it at the end
     // of the old basic block.
-    SmallVector<Value*, 8> InvokeArgs(CI->op_begin()+1, CI->op_end());
+    SmallVector<Value*, 8> InvokeArgs(CI->op_begin(), CI->op_end() - 1);
     InvokeInst *II =
       InvokeInst::Create(CI->getCalledValue(), Split, InvokeDest,
                          InvokeArgs.begin(), InvokeArgs.end(),

Modified: llvm/trunk/lib/VMCore/AsmWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/AsmWriter.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/AsmWriter.cpp (original)
+++ llvm/trunk/lib/VMCore/AsmWriter.cpp Thu Apr 15 05:49:53 2010
@@ -1847,6 +1847,7 @@
     default: Out << " cc" << CI->getCallingConv(); break;
     }
 
+    Operand = CI->getCalledValue();
     const PointerType    *PTy = cast<PointerType>(Operand->getType());
     const FunctionType   *FTy = cast<FunctionType>(PTy->getElementType());
     const Type         *RetTy = FTy->getReturnType();
@@ -1870,10 +1871,10 @@
       writeOperand(Operand, true);
     }
     Out << '(';
-    for (unsigned op = 1, Eop = I.getNumOperands(); op < Eop; ++op) {
-      if (op > 1)
+    for (unsigned op = 0, Eop = CI->getNumOperands() - 1; op < Eop; ++op) {
+      if (op > 0)
         Out << ", ";
-      writeParamOperand(I.getOperand(op), PAL.getParamAttributes(op));
+      writeParamOperand(CI->getOperand(op), PAL.getParamAttributes(op + 1));
     }
     Out << ')';
     if (PAL.getFnAttributes() != Attribute::None)
@@ -1917,10 +1918,10 @@
       writeOperand(Operand, true);
     }
     Out << '(';
-    for (unsigned op = 0, Eop = I.getNumOperands() - 3; op < Eop; ++op) {
+    for (unsigned op = 0, Eop = II->getNumOperands() - 3; op < Eop; ++op) {
       if (op)
         Out << ", ";
-      writeParamOperand(I.getOperand(op), PAL.getParamAttributes(op + 1));
+      writeParamOperand(II->getOperand(op), PAL.getParamAttributes(op + 1));
     }
 
     Out << ')';

Modified: llvm/trunk/lib/VMCore/AutoUpgrade.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/AutoUpgrade.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/AutoUpgrade.cpp (original)
+++ llvm/trunk/lib/VMCore/AutoUpgrade.cpp Thu Apr 15 05:49:53 2010
@@ -338,11 +338,11 @@
     if (isLoadH || isLoadL || isMovL || isMovSD || isShufPD ||
         isUnpckhPD || isUnpcklPD || isPunpckhQPD || isPunpcklQPD) {
       std::vector<Constant*> Idxs;
-      Value *Op0 = CI->getOperand(1);
+      Value *Op0 = CI->getOperand(0);
       ShuffleVectorInst *SI = NULL;
       if (isLoadH || isLoadL) {
         Value *Op1 = UndefValue::get(Op0->getType());
-        Value *Addr = new BitCastInst(CI->getOperand(2), 
+        Value *Addr = new BitCastInst(CI->getOperand(1), 
                                   Type::getDoublePtrTy(C),
                                       "upgraded.", CI);
         Value *Load = new LoadInst(Addr, "upgraded.", false, 8, CI);
@@ -375,7 +375,7 @@
         SI = new ShuffleVectorInst(ZeroV, Op0, Mask, "upgraded.", CI);
       } else if (isMovSD ||
                  isUnpckhPD || isUnpcklPD || isPunpckhQPD || isPunpcklQPD) {
-        Value *Op1 = CI->getOperand(2);
+        Value *Op1 = CI->getOperand(1);
         if (isMovSD) {
           Idxs.push_back(ConstantInt::get(Type::getInt32Ty(C), 2));
           Idxs.push_back(ConstantInt::get(Type::getInt32Ty(C), 1));
@@ -389,8 +389,8 @@
         Value *Mask = ConstantVector::get(Idxs);
         SI = new ShuffleVectorInst(Op0, Op1, Mask, "upgraded.", CI);
       } else if (isShufPD) {
-        Value *Op1 = CI->getOperand(2);
-        unsigned MaskVal = cast<ConstantInt>(CI->getOperand(3))->getZExtValue();
+        Value *Op1 = CI->getOperand(1);
+        unsigned MaskVal = cast<ConstantInt>(CI->getOperand(2))->getZExtValue();
         Idxs.push_back(ConstantInt::get(Type::getInt32Ty(C), MaskVal & 1));
         Idxs.push_back(ConstantInt::get(Type::getInt32Ty(C),
                                                ((MaskVal >> 1) & 1)+2));
@@ -410,8 +410,8 @@
       CI->eraseFromParent();
     } else if (F->getName() == "llvm.x86.sse41.pmulld") {
       // Upgrade this set of intrinsics into vector multiplies.
-      Instruction *Mul = BinaryOperator::CreateMul(CI->getOperand(1),
-                                                   CI->getOperand(2),
+      Instruction *Mul = BinaryOperator::CreateMul(CI->getOperand(0),
+                                                   CI->getOperand(1),
                                                    CI->getName(),
                                                    CI);
       // Fix up all the uses with our new multiply.
@@ -438,10 +438,10 @@
   case Intrinsic::x86_mmx_psrl_w: {
     Value *Operands[2];
     
-    Operands[0] = CI->getOperand(1);
+    Operands[0] = CI->getOperand(0);
     
     // Cast the second parameter to the correct type.
-    BitCastInst *BC = new BitCastInst(CI->getOperand(2), 
+    BitCastInst *BC = new BitCastInst(CI->getOperand(1), 
                                       NewFn->getFunctionType()->getParamType(1),
                                       "upgraded.", CI);
     Operands[1] = BC;
@@ -465,9 +465,9 @@
   case Intrinsic::ctlz:
   case Intrinsic::ctpop:
   case Intrinsic::cttz: {
-    //  Build a small vector of the 1..(N-1) operands, which are the 
+    //  Build a small vector of the 0..(N-1) operands, which are the 
     //  parameters.
-    SmallVector<Value*, 8> Operands(CI->op_begin()+1, CI->op_end());
+    SmallVector<Value*, 8> Operands(CI->op_begin(), CI->op_end() - 1);
 
     //  Construct a new CallInst
     CallInst *NewCI = CallInst::Create(NewFn, Operands.begin(), Operands.end(),
@@ -502,7 +502,7 @@
   case Intrinsic::eh_selector:
   case Intrinsic::eh_typeid_for: {
     // Only the return type changed.
-    SmallVector<Value*, 8> Operands(CI->op_begin() + 1, CI->op_end());
+    SmallVector<Value*, 8> Operands(CI->op_begin(), CI->op_end() - 1);
     CallInst *NewCI = CallInst::Create(NewFn, Operands.begin(), Operands.end(),
                                        "upgraded." + CI->getName(), CI);
     NewCI->setTailCall(CI->isTailCall());
@@ -525,8 +525,8 @@
   case Intrinsic::memset: {
     // Add isVolatile
     const llvm::Type *I1Ty = llvm::Type::getInt1Ty(CI->getContext());
-    Value *Operands[5] = { CI->getOperand(1), CI->getOperand(2),
-                           CI->getOperand(3), CI->getOperand(4),
+    Value *Operands[5] = { CI->getOperand(0), CI->getOperand(1),
+                           CI->getOperand(2), CI->getOperand(3),
                            llvm::ConstantInt::get(I1Ty, 0) };
     CallInst *NewCI = CallInst::Create(NewFn, Operands, Operands+5,
                                        CI->getName(), CI);
@@ -608,7 +608,8 @@
   if (Function *Declare = M->getFunction("llvm.dbg.declare")) {
     if (!Declare->use_empty()) {
       DbgDeclareInst *DDI = cast<DbgDeclareInst>(Declare->use_back());
-      if (!isa<MDNode>(DDI->getOperand(1)) ||!isa<MDNode>(DDI->getOperand(2))) {
+      if (!isa<MDNode>(DDI->getOperand(0)) ||
+          !isa<MDNode>(DDI->getOperand(1))) {
         while (!Declare->use_empty()) {
           CallInst *CI = cast<CallInst>(Declare->use_back());
           CI->eraseFromParent();

Modified: llvm/trunk/lib/VMCore/Instructions.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Instructions.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/Instructions.cpp (original)
+++ llvm/trunk/lib/VMCore/Instructions.cpp Thu Apr 15 05:49:53 2010
@@ -33,7 +33,7 @@
 User::op_iterator CallSite::getCallee() const {
   Instruction *II(getInstruction());
   return isCall()
-    ? cast<CallInst>(II)->op_begin()
+    ? cast<CallInst>(II)->op_end() - 1 // Skip Function
     : cast<InvokeInst>(II)->op_end() - 3; // Skip BB, BB, Function
 }
 
@@ -231,8 +231,7 @@
 
 void CallInst::init(Value *Func, Value* const *Params, unsigned NumParams) {
   assert(NumOperands == NumParams+1 && "NumOperands not set up?");
-  Use *OL = OperandList;
-  OL[0] = Func;
+  Op<-1>() = Func;
 
   const FunctionType *FTy =
     cast<FunctionType>(cast<PointerType>(Func->getType())->getElementType());
@@ -241,20 +240,21 @@
   assert((NumParams == FTy->getNumParams() ||
           (FTy->isVarArg() && NumParams > FTy->getNumParams())) &&
          "Calling a function with bad signature!");
+
+  Use *OL = OperandList;
   for (unsigned i = 0; i != NumParams; ++i) {
     assert((i >= FTy->getNumParams() || 
             FTy->getParamType(i) == Params[i]->getType()) &&
            "Calling a function with a bad signature!");
-    OL[i+1] = Params[i];
+    OL[i] = Params[i];
   }
 }
 
 void CallInst::init(Value *Func, Value *Actual1, Value *Actual2) {
   assert(NumOperands == 3 && "NumOperands not set up?");
-  Use *OL = OperandList;
-  OL[0] = Func;
-  OL[1] = Actual1;
-  OL[2] = Actual2;
+  Op<-1>() = Func;
+  Op<0>() = Actual1;
+  Op<1>() = Actual2;
 
   const FunctionType *FTy =
     cast<FunctionType>(cast<PointerType>(Func->getType())->getElementType());
@@ -273,9 +273,8 @@
 
 void CallInst::init(Value *Func, Value *Actual) {
   assert(NumOperands == 2 && "NumOperands not set up?");
-  Use *OL = OperandList;
-  OL[0] = Func;
-  OL[1] = Actual;
+  Op<-1>() = Func;
+  Op<0>() = Actual;
 
   const FunctionType *FTy =
     cast<FunctionType>(cast<PointerType>(Func->getType())->getElementType());
@@ -291,8 +290,7 @@
 
 void CallInst::init(Value *Func) {
   assert(NumOperands == 1 && "NumOperands not set up?");
-  Use *OL = OperandList;
-  OL[0] = Func;
+  Op<-1>() = Func;
 
   const FunctionType *FTy =
     cast<FunctionType>(cast<PointerType>(Func->getType())->getElementType());

Modified: llvm/trunk/lib/VMCore/IntrinsicInst.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/IntrinsicInst.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/IntrinsicInst.cpp (original)
+++ llvm/trunk/lib/VMCore/IntrinsicInst.cpp Thu Apr 15 05:49:53 2010
@@ -54,7 +54,7 @@
 ///
 
 Value *DbgDeclareInst::getAddress() const {
-  if (MDNode* MD = cast_or_null<MDNode>(getOperand(1)))
+  if (MDNode* MD = cast_or_null<MDNode>(getOperand(0)))
     return MD->getOperand(0);
   else
     return NULL;
@@ -65,9 +65,9 @@
 ///
 
 const Value *DbgValueInst::getValue() const {
-  return cast<MDNode>(getOperand(1))->getOperand(0);
+  return cast<MDNode>(getOperand(0))->getOperand(0);
 }
 
 Value *DbgValueInst::getValue() {
-  return cast<MDNode>(getOperand(1))->getOperand(0);
+  return cast<MDNode>(getOperand(0))->getOperand(0);
 }

Modified: llvm/trunk/lib/VMCore/Verifier.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Verifier.cpp?rev=101364&r1=101363&r2=101364&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/Verifier.cpp (original)
+++ llvm/trunk/lib/VMCore/Verifier.cpp Thu Apr 15 05:49:53 2010
@@ -1396,7 +1396,7 @@
     if (Function *F = dyn_cast<Function>(I.getOperand(i))) {
       // Check to make sure that the "address of" an intrinsic function is never
       // taken.
-      Assert1(!F->isIntrinsic() || (i == 0 && isa<CallInst>(I)),
+      Assert1(!F->isIntrinsic() || (i + 1 == e && isa<CallInst>(I)),
               "Cannot take the address of an intrinsic!", &I);
       Assert1(F->getParent() == Mod, "Referencing function in another module!",
               &I);
@@ -1479,7 +1479,8 @@
                 "Instruction does not dominate all uses!", Op, &I);
       }
     } else if (isa<InlineAsm>(I.getOperand(i))) {
-      Assert1((i == 0 && isa<CallInst>(I)) || (i + 3 == e && isa<InvokeInst>(I)),
+      Assert1((i + 1 == e && isa<CallInst>(I)) ||
+              (i + 3 == e && isa<InvokeInst>(I)),
               "Cannot take the address of an inline asm!", &I);
     }
   }
@@ -1614,16 +1615,16 @@
   default:
     break;
   case Intrinsic::dbg_declare: {  // llvm.dbg.declare
-    Assert1(CI.getOperand(1) && isa<MDNode>(CI.getOperand(1)),
+    Assert1(CI.getOperand(0) && isa<MDNode>(CI.getOperand(0)),
                 "invalid llvm.dbg.declare intrinsic call 1", &CI);
-    MDNode *MD = cast<MDNode>(CI.getOperand(1));
+    MDNode *MD = cast<MDNode>(CI.getOperand(0));
     Assert1(MD->getNumOperands() == 1,
                 "invalid llvm.dbg.declare intrinsic call 2", &CI);
   } break;
   case Intrinsic::memcpy:
   case Intrinsic::memmove:
   case Intrinsic::memset:
-    Assert1(isa<ConstantInt>(CI.getOperand(4)),
+    Assert1(isa<ConstantInt>(CI.getOperand(3)),
             "alignment argument of memory intrinsics must be a constant int",
             &CI);
     break;
@@ -1632,10 +1633,10 @@
   case Intrinsic::gcread:
     if (ID == Intrinsic::gcroot) {
       AllocaInst *AI =
-        dyn_cast<AllocaInst>(CI.getOperand(1)->stripPointerCasts());
+        dyn_cast<AllocaInst>(CI.getOperand(0)->stripPointerCasts());
       Assert1(AI && AI->getType()->getElementType()->isPointerTy(),
               "llvm.gcroot parameter #1 must be a pointer alloca.", &CI);
-      Assert1(isa<Constant>(CI.getOperand(2)),
+      Assert1(isa<Constant>(CI.getOperand(1)),
               "llvm.gcroot parameter #2 must be a constant.", &CI);
     }
 
@@ -1643,32 +1644,32 @@
             "Enclosing function does not use GC.", &CI);
     break;
   case Intrinsic::init_trampoline:
-    Assert1(isa<Function>(CI.getOperand(2)->stripPointerCasts()),
+    Assert1(isa<Function>(CI.getOperand(1)->stripPointerCasts()),
             "llvm.init_trampoline parameter #2 must resolve to a function.",
             &CI);
     break;
   case Intrinsic::prefetch:
-    Assert1(isa<ConstantInt>(CI.getOperand(2)) &&
-            isa<ConstantInt>(CI.getOperand(3)) &&
-            cast<ConstantInt>(CI.getOperand(2))->getZExtValue() < 2 &&
-            cast<ConstantInt>(CI.getOperand(3))->getZExtValue() < 4,
+    Assert1(isa<ConstantInt>(CI.getOperand(1)) &&
+            isa<ConstantInt>(CI.getOperand(2)) &&
+            cast<ConstantInt>(CI.getOperand(1))->getZExtValue() < 2 &&
+            cast<ConstantInt>(CI.getOperand(2))->getZExtValue() < 4,
             "invalid arguments to llvm.prefetch",
             &CI);
     break;
   case Intrinsic::stackprotector:
-    Assert1(isa<AllocaInst>(CI.getOperand(2)->stripPointerCasts()),
+    Assert1(isa<AllocaInst>(CI.getOperand(1)->stripPointerCasts()),
             "llvm.stackprotector parameter #2 must resolve to an alloca.",
             &CI);
     break;
   case Intrinsic::lifetime_start:
   case Intrinsic::lifetime_end:
   case Intrinsic::invariant_start:
-    Assert1(isa<ConstantInt>(CI.getOperand(1)),
+    Assert1(isa<ConstantInt>(CI.getOperand(0)),
             "size argument of memory use markers must be a constant integer",
             &CI);
     break;
   case Intrinsic::invariant_end:
-    Assert1(isa<ConstantInt>(CI.getOperand(2)),
+    Assert1(isa<ConstantInt>(CI.getOperand(1)),
             "llvm.invariant.end parameter #2 must be a constant integer", &CI);
     break;
   }




From benny.kra at googlemail.com  Thu Apr 15 06:33:14 2010
From: benny.kra at googlemail.com (Benjamin Kramer)
Date: Thu, 15 Apr 2010 11:33:14 -0000
Subject: [llvm-commits] [llvm] r101365 - /llvm/trunk/tools/lli/lli.cpp
Message-ID: <20100415113314.6F2B12A6C12C@llvm.org>

Author: d0k
Date: Thu Apr 15 06:33:14 2010
New Revision: 101365

URL: http://llvm.org/viewvc/llvm-project?rev=101365&view=rev
Log:
Simplify ".bc" detection.

Modified:
    llvm/trunk/tools/lli/lli.cpp

Modified: llvm/trunk/tools/lli/lli.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lli/lli.cpp?rev=101365&r1=101364&r2=101365&view=diff
==============================================================================
--- llvm/trunk/tools/lli/lli.cpp (original)
+++ llvm/trunk/tools/lli/lli.cpp Thu Apr 15 06:33:14 2010
@@ -192,8 +192,7 @@
   } else {
     // Otherwise, if there is a .bc suffix on the executable strip it off, it
     // might confuse the program.
-    if (InputFile.size() > 3 && 
-        InputFile.rfind(".bc") == InputFile.length() - 3)
+    if (StringRef(InputFile).endswith(".bc"))
       InputFile.erase(InputFile.length() - 3);
   }
 




From ggreif at gmail.com  Thu Apr 15 06:36:12 2010
From: ggreif at gmail.com (Gabor Greif)
Date: Thu, 15 Apr 2010 11:36:12 -0000
Subject: [llvm-commits] [llvm] r101366 - /llvm/trunk/
Message-ID: <20100415113612.7F6E62A6C12C@llvm.org>

Author: ggreif
Date: Thu Apr 15 06:36:12 2010
New Revision: 101366

URL: http://llvm.org/viewvc/llvm-project?rev=101366&view=rev
Log:
zap mergeinfo

Modified:
    llvm/trunk/   (props changed)

Propchange: llvm/trunk/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo (removed)
@@ -1 +0,0 @@
-/llvm/branches/ggreif/CallInst-operands:100911-101130




From baldrick at free.fr  Thu Apr 15 06:44:49 2010
From: baldrick at free.fr (Duncan Sands)
Date: Thu, 15 Apr 2010 11:44:49 -0000
Subject: [llvm-commits] [dragonegg] r101367 -
	/dragonegg/trunk/llvm-backend.cpp
Message-ID: <20100415114449.BB90F2A6C12C@llvm.org>

Author: baldrick
Date: Thu Apr 15 06:44:49 2010
New Revision: 101367

URL: http://llvm.org/viewvc/llvm-project?rev=101367&view=rev
Log:
The plugin's code is licensed under the GPLv2 or (at the users option)
any later version.  Add a small note about this.

Modified:
    dragonegg/trunk/llvm-backend.cpp

Modified: dragonegg/trunk/llvm-backend.cpp
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/llvm-backend.cpp?rev=101367&r1=101366&r2=101367&view=diff
==============================================================================
--- dragonegg/trunk/llvm-backend.cpp (original)
+++ dragonegg/trunk/llvm-backend.cpp Thu Apr 15 06:44:49 2010
@@ -1519,8 +1519,8 @@
 //                             Plugin interface
 //===----------------------------------------------------------------------===//
 
-// This plugin's code is licensed under the GPLv2.  The LLVM libraries use
-// the GPL compatible University of Illinois/NCSA Open Source License.
+// This plugin's code is licensed under the GPLv2 or later.  The LLVM libraries
+// use the GPL compatible University of Illinois/NCSA Open Source License.
 int plugin_is_GPL_compatible; // This plugin is GPL compatible.
 
 




From ggreif at gmail.com  Thu Apr 15 07:20:18 2010
From: ggreif at gmail.com (Gabor Greif)
Date: Thu, 15 Apr 2010 05:20:18 -0700 (PDT)
Subject: [llvm-commits] [PATCH] Rotate CallInst operands -- HEADS UP
In-Reply-To: <x2q6a8523d61004130918y7a79b03bkf838fb62b7c2f461@mail.gmail.com>
References: <4BC492BE.8040205@mac.com>
	<x2q6a8523d61004130918y7a79b03bkf838fb62b7c2f461@mail.gmail.com>
Message-ID: <c1733b52-cd94-466b-bad0-2ac5bc230e90@11g2000yqr.googlegroups.com>

On Apr 13, 6:18?pm, Daniel Dunbar <dan... at zuster.org> wrote:
> Hi Gabor,
>
> What is the measured performance impact of this change?
>
> ?- Daniel
>

Hi Daniel,

I have constructed a testcase with 26000 callsites, and the "opt -
inline" times
are unchanged (still trying to get gnuplot to visualize). Anyway, it
gets lost in the noise.
I did not expect much more, since the win per callsite is in the
50-100 instructions range
which means 26,000,000 instructions on a modern processor putting it
in the 10 ms range.

However the stripped binaries get 4k smaller for opt, clang lli etc.
on x86_64 linux.

Cheers,

    Gabor



From ggreif at gmail.com  Thu Apr 15 07:46:56 2010
From: ggreif at gmail.com (Gabor Greif)
Date: Thu, 15 Apr 2010 12:46:56 -0000
Subject: [llvm-commits] [llvm] r101368 - in /llvm/trunk: include/llvm/
 include/llvm/Support/ lib/Analysis/ lib/Analysis/IPA/ lib/Bitcode/Writer/
 lib/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/CBackend/
 lib/Target/CppBackend/ lib/Target/X86/ lib/Transforms/IPO/
 lib/Transforms/InstCombine/ lib/Transforms/Instrumentation/
 lib/Transforms/Scalar/ lib/Transforms/Utils/ lib/VMCore/
Message-ID: <20100415124657.45D1A2A6C12C@llvm.org>

Author: ggreif
Date: Thu Apr 15 07:46:56 2010
New Revision: 101368

URL: http://llvm.org/viewvc/llvm-project?rev=101368&view=rev
Log:
back out r101364, as it trips the linux nightlybot on some clang C++ tests

Modified:
    llvm/trunk/include/llvm/Instructions.h
    llvm/trunk/include/llvm/IntrinsicInst.h
    llvm/trunk/include/llvm/Support/CallSite.h
    llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp
    llvm/trunk/lib/Analysis/ConstantFolding.cpp
    llvm/trunk/lib/Analysis/IPA/GlobalsModRef.cpp
    llvm/trunk/lib/Analysis/MemoryBuiltins.cpp
    llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp
    llvm/trunk/lib/Analysis/ValueTracking.cpp
    llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp
    llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp
    llvm/trunk/lib/CodeGen/GCStrategy.cpp
    llvm/trunk/lib/CodeGen/IntrinsicLowering.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    llvm/trunk/lib/CodeGen/ShadowStackGC.cpp
    llvm/trunk/lib/CodeGen/SjLjEHPrepare.cpp
    llvm/trunk/lib/Target/CBackend/CBackend.cpp
    llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp
    llvm/trunk/lib/Target/X86/X86FastISel.cpp
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp
    llvm/trunk/lib/Transforms/IPO/LowerSetJmp.cpp
    llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp
    llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp
    llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp
    llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
    llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp
    llvm/trunk/lib/Transforms/Instrumentation/ProfilingUtils.cpp
    llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp
    llvm/trunk/lib/Transforms/Scalar/GVN.cpp
    llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp
    llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp
    llvm/trunk/lib/Transforms/Scalar/SimplifyLibCalls.cpp
    llvm/trunk/lib/Transforms/Scalar/TailRecursionElimination.cpp
    llvm/trunk/lib/Transforms/Utils/AddrModeMatcher.cpp
    llvm/trunk/lib/Transforms/Utils/BuildLibCalls.cpp
    llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp
    llvm/trunk/lib/VMCore/AsmWriter.cpp
    llvm/trunk/lib/VMCore/AutoUpgrade.cpp
    llvm/trunk/lib/VMCore/Instructions.cpp
    llvm/trunk/lib/VMCore/IntrinsicInst.cpp
    llvm/trunk/lib/VMCore/Verifier.cpp

Modified: llvm/trunk/include/llvm/Instructions.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Instructions.h?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Instructions.h (original)
+++ llvm/trunk/include/llvm/Instructions.h Thu Apr 15 07:46:56 2010
@@ -1031,17 +1031,17 @@
   /// indirect function invocation.
   ///
   Function *getCalledFunction() const {
-    return dyn_cast<Function>(Op<-1>());
+    return dyn_cast<Function>(Op<0>());
   }
 
   /// getCalledValue - Get a pointer to the function that is invoked by this
   /// instruction.
-  const Value *getCalledValue() const { return Op<-1>(); }
-        Value *getCalledValue()       { return Op<-1>(); }
+  const Value *getCalledValue() const { return Op<0>(); }
+        Value *getCalledValue()       { return Op<0>(); }
 
   /// setCalledFunction - Set the function called.
   void setCalledFunction(Value* Fn) {
-    Op<-1>() = Fn;
+    Op<0>() = Fn;
   }
 
   // Methods for support type inquiry through isa, cast, and dyn_cast:
@@ -1071,7 +1071,7 @@
                                    ->getElementType())->getReturnType(),
                 Instruction::Call,
                 OperandTraits<CallInst>::op_end(this) - (ArgEnd - ArgBegin + 1),
-                unsigned(ArgEnd - ArgBegin + 1), InsertAtEnd) {
+                (unsigned)(ArgEnd - ArgBegin + 1), InsertAtEnd) {
   init(Func, ArgBegin, ArgEnd, NameStr,
        typename std::iterator_traits<InputIterator>::iterator_category());
 }

Modified: llvm/trunk/include/llvm/IntrinsicInst.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IntrinsicInst.h?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/include/llvm/IntrinsicInst.h (original)
+++ llvm/trunk/include/llvm/IntrinsicInst.h Thu Apr 15 07:46:56 2010
@@ -43,7 +43,7 @@
     Intrinsic::ID getIntrinsicID() const {
       return (Intrinsic::ID)getCalledFunction()->getIntrinsicID();
     }
-
+    
     // Methods for support type inquiry through isa, cast, and dyn_cast:
     static inline bool classof(const IntrinsicInst *) { return true; }
     static inline bool classof(const CallInst *I) {
@@ -74,7 +74,7 @@
     static inline bool classof(const Value *V) {
       return isa<IntrinsicInst>(V) && classof(cast<IntrinsicInst>(V));
     }
-
+    
     static Value *StripCast(Value *C);
   };
 
@@ -83,7 +83,7 @@
   class DbgDeclareInst : public DbgInfoIntrinsic {
   public:
     Value *getAddress() const;
-    MDNode *getVariable() const { return cast<MDNode>(getOperand(1)); }
+    MDNode *getVariable() const { return cast<MDNode>(getOperand(2)); }
 
     // Methods for support type inquiry through isa, cast, and dyn_cast:
     static inline bool classof(const DbgDeclareInst *) { return true; }
@@ -103,9 +103,9 @@
     Value *getValue();
     uint64_t getOffset() const {
       return cast<ConstantInt>(
-                             const_cast<Value*>(getOperand(1)))->getZExtValue();
+                             const_cast<Value*>(getOperand(2)))->getZExtValue();
     }
-    MDNode *getVariable() const { return cast<MDNode>(getOperand(2)); }
+    MDNode *getVariable() const { return cast<MDNode>(getOperand(3)); }
 
     // Methods for support type inquiry through isa, cast, and dyn_cast:
     static inline bool classof(const DbgValueInst *) { return true; }
@@ -121,19 +121,19 @@
   ///
   class MemIntrinsic : public IntrinsicInst {
   public:
-    Value *getRawDest() const { return const_cast<Value*>(getOperand(0)); }
+    Value *getRawDest() const { return const_cast<Value*>(getOperand(1)); }
 
-    Value *getLength() const { return const_cast<Value*>(getOperand(2)); }
+    Value *getLength() const { return const_cast<Value*>(getOperand(3)); }
     ConstantInt *getAlignmentCst() const {
-      return cast<ConstantInt>(const_cast<Value*>(getOperand(3)));
+      return cast<ConstantInt>(const_cast<Value*>(getOperand(4)));
     }
-
+    
     unsigned getAlignment() const {
       return getAlignmentCst()->getZExtValue();
     }
 
     ConstantInt *getVolatileCst() const {
-      return cast<ConstantInt>(const_cast<Value*>(getOperand(4)));
+      return cast<ConstantInt>(const_cast<Value*>(getOperand(5)));
     }
     bool isVolatile() const {
       return getVolatileCst()->getZExtValue() != 0;
@@ -149,27 +149,27 @@
     void setDest(Value *Ptr) {
       assert(getRawDest()->getType() == Ptr->getType() &&
              "setDest called with pointer of wrong type!");
-      setOperand(0, Ptr);
+      setOperand(1, Ptr);
     }
 
     void setLength(Value *L) {
       assert(getLength()->getType() == L->getType() &&
              "setLength called with value of wrong type!");
-      setOperand(2, L);
+      setOperand(3, L);
     }
-
+    
     void setAlignment(Constant* A) {
-      setOperand(3, A);
+      setOperand(4, A);
     }
 
     void setVolatile(Constant* V) {
-      setOperand(4, V);
+      setOperand(5, V);
     }
 
     const Type *getAlignmentType() const {
-      return getOperand(3)->getType();
+      return getOperand(4)->getType();
     }
-
+    
     // Methods for support type inquiry through isa, cast, and dyn_cast:
     static inline bool classof(const MemIntrinsic *) { return true; }
     static inline bool classof(const IntrinsicInst *I) {
@@ -192,14 +192,14 @@
   public:
     /// get* - Return the arguments to the instruction.
     ///
-    Value *getValue() const { return const_cast<Value*>(getOperand(1)); }
-
+    Value *getValue() const { return const_cast<Value*>(getOperand(2)); }
+    
     void setValue(Value *Val) {
       assert(getValue()->getType() == Val->getType() &&
-             "setValue called with value of wrong type!");
-      setOperand(1, Val);
+             "setSource called with pointer of wrong type!");
+      setOperand(2, Val);
     }
-
+    
     // Methods for support type inquiry through isa, cast, and dyn_cast:
     static inline bool classof(const MemSetInst *) { return true; }
     static inline bool classof(const IntrinsicInst *I) {
@@ -209,26 +209,26 @@
       return isa<IntrinsicInst>(V) && classof(cast<IntrinsicInst>(V));
     }
   };
-
+  
   /// MemTransferInst - This class wraps the llvm.memcpy/memmove intrinsics.
   ///
   class MemTransferInst : public MemIntrinsic {
   public:
     /// get* - Return the arguments to the instruction.
     ///
-    Value *getRawSource() const { return const_cast<Value*>(getOperand(1)); }
-
+    Value *getRawSource() const { return const_cast<Value*>(getOperand(2)); }
+    
     /// getSource - This is just like getRawSource, but it strips off any cast
     /// instructions that feed it, giving the original input.  The returned
     /// value is guaranteed to be a pointer.
     Value *getSource() const { return getRawSource()->stripPointerCasts(); }
-
+    
     void setSource(Value *Ptr) {
       assert(getRawSource()->getType() == Ptr->getType() &&
              "setSource called with pointer of wrong type!");
-      setOperand(1, Ptr);
+      setOperand(2, Ptr);
     }
-
+    
     // Methods for support type inquiry through isa, cast, and dyn_cast:
     static inline bool classof(const MemTransferInst *) { return true; }
     static inline bool classof(const IntrinsicInst *I) {
@@ -239,8 +239,8 @@
       return isa<IntrinsicInst>(V) && classof(cast<IntrinsicInst>(V));
     }
   };
-
-
+  
+  
   /// MemCpyInst - This class wraps the llvm.memcpy intrinsic.
   ///
   class MemCpyInst : public MemTransferInst {
@@ -282,7 +282,7 @@
       return isa<IntrinsicInst>(V) && classof(cast<IntrinsicInst>(V));
     }
   };
-
+  
   /// MemoryUseIntrinsic - This is the common base class for the memory use
   /// marker intrinsics.
   ///

Modified: llvm/trunk/include/llvm/Support/CallSite.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/CallSite.h?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/CallSite.h (original)
+++ llvm/trunk/include/llvm/Support/CallSite.h Thu Apr 15 07:46:56 2010
@@ -255,21 +255,27 @@
 private:
   /// Returns the operand number of the first argument
   unsigned getArgumentOffset() const {
+    if (isCall())
+      return 1; // Skip Function (ATM)
+    else
       return 0; // Args are at the front
   }
 
   unsigned getArgumentEndOffset() const {
     if (isCall())
-      return 1; // Skip Function
+      return 0; // Unchanged (ATM)
     else
       return 3; // Skip BB, BB, Function
   }
 
   IterTy getCallee() const {
-    // FIXME: this is slow, since we do not have the fast versions
-		// of the op_*() functions here. See CallSite::getCallee.
-		//
-    return arg_end();
+      // FIXME: this is slow, since we do not have the fast versions
+      // of the op_*() functions here. See CallSite::getCallee.
+      //
+    if (isCall())
+      return getInstruction()->op_begin(); // Unchanged (ATM)
+    else
+      return getInstruction()->op_end() - 3; // Skip BB, BB, Function
   }
 };
 

Modified: llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp Thu Apr 15 07:46:56 2010
@@ -94,7 +94,7 @@
   } else if (const CallInst* CI = extractMallocCall(V)) {
     if (!isArrayMalloc(V, &TD))
       // The size is the argument to the malloc call.
-      if (const ConstantInt* C = dyn_cast<ConstantInt>(CI->getOperand(0)))
+      if (const ConstantInt* C = dyn_cast<ConstantInt>(CI->getOperand(1)))
         return (C->getZExtValue() < Size);
     return false;
   } else if (const Argument *A = dyn_cast<Argument>(V)) {
@@ -318,10 +318,10 @@
   case Intrinsic::memcpy:
   case Intrinsic::memmove: {
     unsigned Len = ~0U;
-    if (ConstantInt *LenCI = dyn_cast<ConstantInt>(II->getOperand(2)))
+    if (ConstantInt *LenCI = dyn_cast<ConstantInt>(II->getOperand(3)))
       Len = LenCI->getZExtValue();
-    Value *Dest = II->getOperand(0);
-    Value *Src = II->getOperand(1);
+    Value *Dest = II->getOperand(1);
+    Value *Src = II->getOperand(2);
     if (isNoAlias(Dest, Len, P, Size)) {
       if (isNoAlias(Src, Len, P, Size))
         return NoModRef;
@@ -332,9 +332,9 @@
   case Intrinsic::memset:
     // Since memset is 'accesses arguments' only, the AliasAnalysis base class
     // will handle it for the variable length case.
-    if (ConstantInt *LenCI = dyn_cast<ConstantInt>(II->getOperand(2))) {
+    if (ConstantInt *LenCI = dyn_cast<ConstantInt>(II->getOperand(3))) {
       unsigned Len = LenCI->getZExtValue();
-      Value *Dest = II->getOperand(0);
+      Value *Dest = II->getOperand(1);
       if (isNoAlias(Dest, Len, P, Size))
         return NoModRef;
     }
@@ -352,7 +352,7 @@
   case Intrinsic::atomic_load_umax:
   case Intrinsic::atomic_load_umin:
     if (TD) {
-      Value *Op1 = II->getOperand(0);
+      Value *Op1 = II->getOperand(1);
       unsigned Op1Size = TD->getTypeStoreSize(Op1->getType());
       if (isNoAlias(Op1, Op1Size, P, Size))
         return NoModRef;
@@ -361,14 +361,14 @@
   case Intrinsic::lifetime_start:
   case Intrinsic::lifetime_end:
   case Intrinsic::invariant_start: {
-    unsigned PtrSize = cast<ConstantInt>(II->getOperand(0))->getZExtValue();
-    if (isNoAlias(II->getOperand(1), PtrSize, P, Size))
+    unsigned PtrSize = cast<ConstantInt>(II->getOperand(1))->getZExtValue();
+    if (isNoAlias(II->getOperand(2), PtrSize, P, Size))
       return NoModRef;
     break;
   }
   case Intrinsic::invariant_end: {
-    unsigned PtrSize = cast<ConstantInt>(II->getOperand(1))->getZExtValue();
-    if (isNoAlias(II->getOperand(2), PtrSize, P, Size))
+    unsigned PtrSize = cast<ConstantInt>(II->getOperand(2))->getZExtValue();
+    if (isNoAlias(II->getOperand(3), PtrSize, P, Size))
       return NoModRef;
     break;
   }

Modified: llvm/trunk/lib/Analysis/ConstantFolding.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ConstantFolding.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ConstantFolding.cpp (original)
+++ llvm/trunk/lib/Analysis/ConstantFolding.cpp Thu Apr 15 07:46:56 2010
@@ -772,9 +772,9 @@
   case Instruction::ICmp:
   case Instruction::FCmp: assert(0 && "Invalid for compares");
   case Instruction::Call:
-    if (Function *F = dyn_cast<Function>(Ops[NumOps - 1]))
+    if (Function *F = dyn_cast<Function>(Ops[0]))
       if (canConstantFoldCallTo(F))
-        return ConstantFoldCall(F, Ops, NumOps - 1);
+        return ConstantFoldCall(F, Ops+1, NumOps-1);
     return 0;
   case Instruction::PtrToInt:
     // If the input is a inttoptr, eliminate the pair.  This requires knowing

Modified: llvm/trunk/lib/Analysis/IPA/GlobalsModRef.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/IPA/GlobalsModRef.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/IPA/GlobalsModRef.cpp (original)
+++ llvm/trunk/lib/Analysis/IPA/GlobalsModRef.cpp Thu Apr 15 07:46:56 2010
@@ -252,7 +252,7 @@
     } else if (CallInst *CI = dyn_cast<CallInst>(*UI)) {
       // Make sure that this is just the function being called, not that it is
       // passing into the function.
-      for (unsigned i = 0, e = CI->getNumOperands() - 1; i != e; ++i)
+      for (unsigned i = 1, e = CI->getNumOperands(); i != e; ++i)
         if (CI->getOperand(i) == V) return true;
     } else if (InvokeInst *II = dyn_cast<InvokeInst>(*UI)) {
       // Make sure that this is just the function being called, not that it is

Modified: llvm/trunk/lib/Analysis/MemoryBuiltins.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/MemoryBuiltins.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/MemoryBuiltins.cpp (original)
+++ llvm/trunk/lib/Analysis/MemoryBuiltins.cpp Thu Apr 15 07:46:56 2010
@@ -103,7 +103,7 @@
 
   // If malloc calls' arg can be determined to be a multiple of ElementSize,
   // return the multiple.  Otherwise, return NULL.
-  Value *MallocArg = CI->getOperand(0);
+  Value *MallocArg = CI->getOperand(1);
   Value *Multiple = NULL;
   if (ComputeMultiple(MallocArg, ElementSize, Multiple,
                       LookThroughSExt))
@@ -120,7 +120,7 @@
   Value *ArraySize = computeArraySize(CI, TD);
 
   if (ArraySize &&
-      ArraySize != ConstantInt::get(CI->getOperand(0)->getType(), 1))
+      ArraySize != ConstantInt::get(CI->getOperand(1)->getType(), 1))
     return CI;
 
   // CI is a non-array malloc or we can't figure out that it is an array malloc.

Modified: llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp Thu Apr 15 07:46:56 2010
@@ -117,7 +117,7 @@
       Pointer = V->getOperand(0);
       PointerSize = AA->getTypeStoreSize(V->getType());
     } else if (isFreeCall(Inst)) {
-      Pointer = Inst->getOperand(0);
+      Pointer = Inst->getOperand(1);
       // calls to free() erase the entire structure
       PointerSize = ~0ULL;
     } else if (isa<CallInst>(Inst) || isa<InvokeInst>(Inst)) {
@@ -197,9 +197,9 @@
         // pointer, not on query pointers that are indexed off of them.  It'd
         // be nice to handle that at some point.
         AliasAnalysis::AliasResult R = 
-          AA->alias(II->getOperand(2), ~0U, MemPtr, ~0U);
+          AA->alias(II->getOperand(3), ~0U, MemPtr, ~0U);
         if (R == AliasAnalysis::MustAlias) {
-          InvariantTag = II->getOperand(0);
+          InvariantTag = II->getOperand(1);
           continue;
         }
       
@@ -210,7 +210,7 @@
         // pointer, not on query pointers that are indexed off of them.  It'd
         // be nice to handle that at some point.
         AliasAnalysis::AliasResult R =
-          AA->alias(II->getOperand(1), ~0U, MemPtr, ~0U);
+          AA->alias(II->getOperand(2), ~0U, MemPtr, ~0U);
         if (R == AliasAnalysis::MustAlias)
           return MemDepResult::getDef(II);
       }
@@ -366,7 +366,7 @@
       MemSize = AA->getTypeStoreSize(LI->getType());
     }
   } else if (isFreeCall(QueryInst)) {
-    MemPtr = QueryInst->getOperand(0);
+    MemPtr = QueryInst->getOperand(1);
     // calls to free() erase the entire structure, not just a field.
     MemSize = ~0UL;
   } else if (isa<CallInst>(QueryInst) || isa<InvokeInst>(QueryInst)) {
@@ -378,13 +378,13 @@
     case Intrinsic::lifetime_start:
     case Intrinsic::lifetime_end:
     case Intrinsic::invariant_start:
-      MemPtr = QueryInst->getOperand(1);
-      MemSize = cast<ConstantInt>(QueryInst->getOperand(0))->getZExtValue();
-      break;
-    case Intrinsic::invariant_end:
       MemPtr = QueryInst->getOperand(2);
       MemSize = cast<ConstantInt>(QueryInst->getOperand(1))->getZExtValue();
       break;
+    case Intrinsic::invariant_end:
+      MemPtr = QueryInst->getOperand(3);
+      MemSize = cast<ConstantInt>(QueryInst->getOperand(2))->getZExtValue();
+      break;
     default:
       CallSite QueryCS = CallSite::get(QueryInst);
       bool isReadOnly = AA->onlyReadsMemory(QueryCS);

Modified: llvm/trunk/lib/Analysis/ValueTracking.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ValueTracking.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ValueTracking.cpp (original)
+++ llvm/trunk/lib/Analysis/ValueTracking.cpp Thu Apr 15 07:46:56 2010
@@ -953,7 +953,7 @@
   if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(I))
     // sqrt(-0.0) = -0.0, no other negative results are possible.
     if (II->getIntrinsicID() == Intrinsic::sqrt)
-      return CannotBeNegativeZero(II->getOperand(0), Depth+1);
+      return CannotBeNegativeZero(II->getOperand(1), Depth+1);
   
   if (const CallInst *CI = dyn_cast<CallInst>(I))
     if (const Function *F = CI->getCalledFunction()) {
@@ -966,7 +966,7 @@
         if (F->getName() == "fabsl") return true;
         if (F->getName() == "sqrt" || F->getName() == "sqrtf" ||
             F->getName() == "sqrtl")
-          return CannotBeNegativeZero(CI->getOperand(0), Depth+1);
+          return CannotBeNegativeZero(CI->getOperand(1), Depth+1);
       }
     }
   

Modified: llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp (original)
+++ llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp Thu Apr 15 07:46:56 2010
@@ -1134,23 +1134,24 @@
     Vals.push_back(cast<StoreInst>(I).isVolatile());
     break;
   case Instruction::Call: {
-    const CallInst &CI = cast<CallInst>(I);
-    const PointerType *PTy = cast<PointerType>(CI.getCalledValue()->getType());
+    const PointerType *PTy = cast<PointerType>(I.getOperand(0)->getType());
     const FunctionType *FTy = cast<FunctionType>(PTy->getElementType());
 
     Code = bitc::FUNC_CODE_INST_CALL;
 
-    Vals.push_back(VE.getAttributeID(CI.getAttributes()));
-    Vals.push_back((CI.getCallingConv() << 1) | unsigned(CI.isTailCall()));
-    PushValueAndType(CI.getCalledValue(), InstID, Vals, VE);  // Callee
+    const CallInst *CI = cast<CallInst>(&I);
+    Vals.push_back(VE.getAttributeID(CI->getAttributes()));
+    Vals.push_back((CI->getCallingConv() << 1) | unsigned(CI->isTailCall()));
+    PushValueAndType(CI->getOperand(0), InstID, Vals, VE);  // Callee
 
     // Emit value #'s for the fixed parameters.
     for (unsigned i = 0, e = FTy->getNumParams(); i != e; ++i)
-      Vals.push_back(VE.getValueID(I.getOperand(i)));  // fixed param.
+      Vals.push_back(VE.getValueID(I.getOperand(i+1)));  // fixed param.
 
     // Emit type/value pairs for varargs params.
     if (FTy->isVarArg()) {
-      for (unsigned i = FTy->getNumParams(), e = I.getNumOperands()-1;
+      unsigned NumVarargs = I.getNumOperands()-1-FTy->getNumParams();
+      for (unsigned i = I.getNumOperands()-NumVarargs, e = I.getNumOperands();
            i != e; ++i)
         PushValueAndType(I.getOperand(i), InstID, Vals, VE);  // varargs
     }

Modified: llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp (original)
+++ llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp Thu Apr 15 07:46:56 2010
@@ -198,7 +198,7 @@
     bool IsCleanUp = (NumOps == 3);
 
     if (!IsCleanUp)
-      if (ConstantInt *CI = dyn_cast<ConstantInt>(SI->getOperand(2)))
+      if (ConstantInt *CI = dyn_cast<ConstantInt>(SI->getOperand(3)))
         IsCleanUp = (CI->getZExtValue() == 0);
 
     if (IsCleanUp)
@@ -237,7 +237,7 @@
     if (!Sel || Sel->getParent()->getParent() != F) continue;
 
     // Index of the ".llvm.eh.catch.all.value" variable.
-    unsigned OpIdx = Sel->getNumOperands() - 2;
+    unsigned OpIdx = Sel->getNumOperands() - 1;
     GlobalVariable *GV = dyn_cast<GlobalVariable>(Sel->getOperand(OpIdx));
     if (GV != EHCatchAllValue) continue;
     Sel->setOperand(OpIdx, EHCatchAllValue->getInitializer());
@@ -366,7 +366,7 @@
             bool IsCleanUp = (NumOps == 3);
 
             if (!IsCleanUp)
-              if (ConstantInt *CI = dyn_cast<ConstantInt>(II->getOperand(2)))
+              if (ConstantInt *CI = dyn_cast<ConstantInt>(II->getOperand(3)))
                 IsCleanUp = (CI->getZExtValue() == 0);
 
             if (IsCleanUp)
@@ -390,8 +390,8 @@
 
       // Use the exception object pointer and the personality function
       // from the original selector.
-      Args.push_back(II->getOperand(0)); // Exception object pointer.
-      Args.push_back(II->getOperand(1)); // Personality function.
+      Args.push_back(II->getOperand(1)); // Exception object pointer.
+      Args.push_back(II->getOperand(2)); // Personality function.
       Args.push_back(EHCatchAllValue->getInitializer()); // Catch-all indicator.
 
       CallInst *NewSelector =

Modified: llvm/trunk/lib/CodeGen/GCStrategy.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GCStrategy.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GCStrategy.cpp (original)
+++ llvm/trunk/lib/CodeGen/GCStrategy.cpp Thu Apr 15 07:46:56 2010
@@ -270,7 +270,7 @@
         case Intrinsic::gcwrite:
           if (LowerWr) {
             // Replace a write barrier with a simple store.
-            Value *St = new StoreInst(CI->getOperand(0), CI->getOperand(2), CI);
+            Value *St = new StoreInst(CI->getOperand(1), CI->getOperand(3), CI);
             CI->replaceAllUsesWith(St);
             CI->eraseFromParent();
           }
@@ -278,7 +278,7 @@
         case Intrinsic::gcread:
           if (LowerRd) {
             // Replace a read barrier with a simple load.
-            Value *Ld = new LoadInst(CI->getOperand(1), "", CI);
+            Value *Ld = new LoadInst(CI->getOperand(2), "", CI);
             Ld->takeName(CI);
             CI->replaceAllUsesWith(Ld);
             CI->eraseFromParent();
@@ -289,7 +289,7 @@
             // Initialize the GC root, but do not delete the intrinsic. The
             // backend needs the intrinsic to flag the stack slot.
             Roots.push_back(cast<AllocaInst>(
-                              CI->getOperand(0)->stripPointerCasts()));
+                              CI->getOperand(1)->stripPointerCasts()));
           }
           break;
         default:

Modified: llvm/trunk/lib/CodeGen/IntrinsicLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/IntrinsicLowering.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/IntrinsicLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/IntrinsicLowering.cpp Thu Apr 15 07:46:56 2010
@@ -308,21 +308,21 @@
 static void ReplaceFPIntrinsicWithCall(CallInst *CI, const char *Fname,
                                        const char *Dname,
                                        const char *LDname) {
-  switch (CI->getOperand(0)->getType()->getTypeID()) {
+  switch (CI->getOperand(1)->getType()->getTypeID()) {
   default: llvm_unreachable("Invalid type in intrinsic");
   case Type::FloatTyID:
-    ReplaceCallWith(Fname, CI, CI->op_begin(), CI->op_end() - 1,
+    ReplaceCallWith(Fname, CI, CI->op_begin() + 1, CI->op_end(),
                   Type::getFloatTy(CI->getContext()));
     break;
   case Type::DoubleTyID:
-    ReplaceCallWith(Dname, CI, CI->op_begin(), CI->op_end() - 1,
+    ReplaceCallWith(Dname, CI, CI->op_begin() + 1, CI->op_end(),
                   Type::getDoubleTy(CI->getContext()));
     break;
   case Type::X86_FP80TyID:
   case Type::FP128TyID:
   case Type::PPC_FP128TyID:
-    ReplaceCallWith(LDname, CI, CI->op_begin(), CI->op_end() - 1,
-                  CI->getOperand(0)->getType());
+    ReplaceCallWith(LDname, CI, CI->op_begin() + 1, CI->op_end(),
+                  CI->getOperand(1)->getType());
     break;
   }
 }
@@ -347,7 +347,7 @@
     // by the lowerinvoke pass.  In both cases, the right thing to do is to
     // convert the call to an explicit setjmp or longjmp call.
   case Intrinsic::setjmp: {
-    Value *V = ReplaceCallWith("setjmp", CI, CI->op_begin(), CI->op_end() - 1,
+    Value *V = ReplaceCallWith("setjmp", CI, CI->op_begin() + 1, CI->op_end(),
                                Type::getInt32Ty(Context));
     if (!CI->getType()->isVoidTy())
       CI->replaceAllUsesWith(V);
@@ -359,7 +359,7 @@
      break;
 
   case Intrinsic::longjmp: {
-    ReplaceCallWith("longjmp", CI, CI->op_begin(), CI->op_end() - 1,
+    ReplaceCallWith("longjmp", CI, CI->op_begin() + 1, CI->op_end(),
                     Type::getVoidTy(Context));
     break;
   }
@@ -371,20 +371,20 @@
     break;
   }
   case Intrinsic::ctpop:
-    CI->replaceAllUsesWith(LowerCTPOP(Context, CI->getOperand(0), CI));
+    CI->replaceAllUsesWith(LowerCTPOP(Context, CI->getOperand(1), CI));
     break;
 
   case Intrinsic::bswap:
-    CI->replaceAllUsesWith(LowerBSWAP(Context, CI->getOperand(0), CI));
+    CI->replaceAllUsesWith(LowerBSWAP(Context, CI->getOperand(1), CI));
     break;
     
   case Intrinsic::ctlz:
-    CI->replaceAllUsesWith(LowerCTLZ(Context, CI->getOperand(0), CI));
+    CI->replaceAllUsesWith(LowerCTLZ(Context, CI->getOperand(1), CI));
     break;
 
   case Intrinsic::cttz: {
     // cttz(x) -> ctpop(~X & (X-1))
-    Value *Src = CI->getOperand(0);
+    Value *Src = CI->getOperand(1);
     Value *NotSrc = Builder.CreateNot(Src);
     NotSrc->setName(Src->getName() + ".not");
     Value *SrcM1 = ConstantInt::get(Src->getType(), 1);
@@ -445,37 +445,37 @@
     
   case Intrinsic::memcpy: {
     const IntegerType *IntPtr = TD.getIntPtrType(Context);
-    Value *Size = Builder.CreateIntCast(CI->getOperand(2), IntPtr,
+    Value *Size = Builder.CreateIntCast(CI->getOperand(3), IntPtr,
                                         /* isSigned */ false);
     Value *Ops[3];
-    Ops[0] = CI->getOperand(0);
-    Ops[1] = CI->getOperand(1);
+    Ops[0] = CI->getOperand(1);
+    Ops[1] = CI->getOperand(2);
     Ops[2] = Size;
-    ReplaceCallWith("memcpy", CI, Ops, Ops+3, CI->getOperand(0)->getType());
+    ReplaceCallWith("memcpy", CI, Ops, Ops+3, CI->getOperand(1)->getType());
     break;
   }
   case Intrinsic::memmove: {
     const IntegerType *IntPtr = TD.getIntPtrType(Context);
-    Value *Size = Builder.CreateIntCast(CI->getOperand(2), IntPtr,
+    Value *Size = Builder.CreateIntCast(CI->getOperand(3), IntPtr,
                                         /* isSigned */ false);
     Value *Ops[3];
-    Ops[0] = CI->getOperand(0);
-    Ops[1] = CI->getOperand(1);
+    Ops[0] = CI->getOperand(1);
+    Ops[1] = CI->getOperand(2);
     Ops[2] = Size;
-    ReplaceCallWith("memmove", CI, Ops, Ops+3, CI->getOperand(0)->getType());
+    ReplaceCallWith("memmove", CI, Ops, Ops+3, CI->getOperand(1)->getType());
     break;
   }
   case Intrinsic::memset: {
     const IntegerType *IntPtr = TD.getIntPtrType(Context);
-    Value *Size = Builder.CreateIntCast(CI->getOperand(2), IntPtr,
+    Value *Size = Builder.CreateIntCast(CI->getOperand(3), IntPtr,
                                         /* isSigned */ false);
     Value *Ops[3];
-    Ops[0] = CI->getOperand(0);
+    Ops[0] = CI->getOperand(1);
     // Extend the amount to i32.
-    Ops[1] = Builder.CreateIntCast(CI->getOperand(1), Type::getInt32Ty(Context),
+    Ops[1] = Builder.CreateIntCast(CI->getOperand(2), Type::getInt32Ty(Context),
                                    /* isSigned */ false);
     Ops[2] = Size;
-    ReplaceCallWith("memset", CI, Ops, Ops+3, CI->getOperand(0)->getType());
+    ReplaceCallWith("memset", CI, Ops, Ops+3, CI->getOperand(1)->getType());
     break;
   }
   case Intrinsic::sqrt: {

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp Thu Apr 15 07:46:56 2010
@@ -31,6 +31,7 @@
 #include "llvm/Target/TargetData.h"
 #include "llvm/Target/TargetFrameInfo.h"
 #include "llvm/Target/TargetInstrInfo.h"
+#include "llvm/Target/TargetIntrinsicInfo.h"
 #include "llvm/Target/TargetLowering.h"
 #include "llvm/Target/TargetOptions.h"
 #include "llvm/Support/Compiler.h"
@@ -309,7 +310,7 @@
 void llvm::AddCatchInfo(const CallInst &I, MachineModuleInfo *MMI,
                         MachineBasicBlock *MBB) {
   // Inform the MachineModuleInfo of the personality for this landing pad.
-  const ConstantExpr *CE = cast<ConstantExpr>(I.getOperand(1));
+  const ConstantExpr *CE = cast<ConstantExpr>(I.getOperand(2));
   assert(CE->getOpcode() == Instruction::BitCast &&
          isa<Function>(CE->getOperand(0)) &&
          "Personality should be a function");
@@ -318,9 +319,9 @@
   // Gather all the type infos for this landing pad and pass them along to
   // MachineModuleInfo.
   std::vector<const GlobalVariable *> TyInfo;
-  unsigned N = I.getNumOperands() - 1;
+  unsigned N = I.getNumOperands();
 
-  for (unsigned i = N - 1; i > 1; --i) {
+  for (unsigned i = N - 1; i > 2; --i) {
     if (const ConstantInt *CI = dyn_cast<ConstantInt>(I.getOperand(i))) {
       unsigned FilterLength = CI->getZExtValue();
       unsigned FirstCatch = i + FilterLength + !FilterLength;
@@ -350,9 +351,9 @@
     }
   }
 
-  if (N > 2) {
-    TyInfo.reserve(N - 2);
-    for (unsigned j = 2; j < N - 1; ++j)
+  if (N > 3) {
+    TyInfo.reserve(N - 3);
+    for (unsigned j = 3; j < N; ++j)
       TyInfo.push_back(ExtractTypeInfo(I.getOperand(j)));
     MMI->addCatchTypeInfo(MBB, TyInfo);
   }

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Thu Apr 15 07:46:56 2010
@@ -2771,7 +2771,7 @@
     Ops.push_back(DAG.getConstant(Intrinsic, TLI.getPointerTy()));
 
   // Add all operands of the call to the operand list.
-  for (unsigned i = 0, e = I.getNumOperands()-1; i != e; ++i) {
+  for (unsigned i = 1, e = I.getNumOperands(); i != e; ++i) {
     SDValue Op = getValue(I.getOperand(i));
     assert(TLI.isTypeLegal(Op.getValueType()) &&
            "Intrinsic uses a non-legal type?");
@@ -2877,11 +2877,11 @@
   SDValue Root = getRoot();
   SDValue L =
     DAG.getAtomic(Op, getCurDebugLoc(),
-                  getValue(I.getOperand(1)).getValueType().getSimpleVT(),
+                  getValue(I.getOperand(2)).getValueType().getSimpleVT(),
                   Root,
-                  getValue(I.getOperand(0)),
                   getValue(I.getOperand(1)),
-                  I.getOperand(0));
+                  getValue(I.getOperand(2)),
+                  I.getOperand(1));
   setValue(&I, L);
   DAG.setRoot(L.getValue(1));
   return 0;
@@ -2890,8 +2890,8 @@
 // implVisitAluOverflow - Lower arithmetic overflow instrinsics.
 const char *
 SelectionDAGBuilder::implVisitAluOverflow(const CallInst &I, ISD::NodeType Op) {
-  SDValue Op1 = getValue(I.getOperand(0));
-  SDValue Op2 = getValue(I.getOperand(1));
+  SDValue Op1 = getValue(I.getOperand(1));
+  SDValue Op2 = getValue(I.getOperand(2));
 
   SDVTList VTs = DAG.getVTList(Op1.getValueType(), MVT::i1);
   setValue(&I, DAG.getNode(Op, getCurDebugLoc(), VTs, Op1, Op2));
@@ -2905,9 +2905,9 @@
   SDValue result;
   DebugLoc dl = getCurDebugLoc();
 
-  if (getValue(I.getOperand(0)).getValueType() == MVT::f32 &&
+  if (getValue(I.getOperand(1)).getValueType() == MVT::f32 &&
       LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
-    SDValue Op = getValue(I.getOperand(0));
+    SDValue Op = getValue(I.getOperand(1));
 
     // Put the exponent in the right bit position for later addition to the
     // final result:
@@ -3017,8 +3017,8 @@
   } else {
     // No special expansion.
     result = DAG.getNode(ISD::FEXP, dl,
-                         getValue(I.getOperand(0)).getValueType(),
-                         getValue(I.getOperand(0)));
+                         getValue(I.getOperand(1)).getValueType(),
+                         getValue(I.getOperand(1)));
   }
 
   setValue(&I, result);
@@ -3031,9 +3031,9 @@
   SDValue result;
   DebugLoc dl = getCurDebugLoc();
 
-  if (getValue(I.getOperand(0)).getValueType() == MVT::f32 &&
+  if (getValue(I.getOperand(1)).getValueType() == MVT::f32 &&
       LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
-    SDValue Op = getValue(I.getOperand(0));
+    SDValue Op = getValue(I.getOperand(1));
     SDValue Op1 = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i32, Op);
 
     // Scale the exponent by log(2) [0.69314718f].
@@ -3127,8 +3127,8 @@
   } else {
     // No special expansion.
     result = DAG.getNode(ISD::FLOG, dl,
-                         getValue(I.getOperand(0)).getValueType(),
-                         getValue(I.getOperand(0)));
+                         getValue(I.getOperand(1)).getValueType(),
+                         getValue(I.getOperand(1)));
   }
 
   setValue(&I, result);
@@ -3141,9 +3141,9 @@
   SDValue result;
   DebugLoc dl = getCurDebugLoc();
 
-  if (getValue(I.getOperand(0)).getValueType() == MVT::f32 &&
+  if (getValue(I.getOperand(1)).getValueType() == MVT::f32 &&
       LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
-    SDValue Op = getValue(I.getOperand(0));
+    SDValue Op = getValue(I.getOperand(1));
     SDValue Op1 = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i32, Op);
 
     // Get the exponent.
@@ -3236,8 +3236,8 @@
   } else {
     // No special expansion.
     result = DAG.getNode(ISD::FLOG2, dl,
-                         getValue(I.getOperand(0)).getValueType(),
-                         getValue(I.getOperand(0)));
+                         getValue(I.getOperand(1)).getValueType(),
+                         getValue(I.getOperand(1)));
   }
 
   setValue(&I, result);
@@ -3250,9 +3250,9 @@
   SDValue result;
   DebugLoc dl = getCurDebugLoc();
 
-  if (getValue(I.getOperand(0)).getValueType() == MVT::f32 &&
+  if (getValue(I.getOperand(1)).getValueType() == MVT::f32 &&
       LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
-    SDValue Op = getValue(I.getOperand(0));
+    SDValue Op = getValue(I.getOperand(1));
     SDValue Op1 = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i32, Op);
 
     // Scale the exponent by log10(2) [0.30102999f].
@@ -3338,8 +3338,8 @@
   } else {
     // No special expansion.
     result = DAG.getNode(ISD::FLOG10, dl,
-                         getValue(I.getOperand(0)).getValueType(),
-                         getValue(I.getOperand(0)));
+                         getValue(I.getOperand(1)).getValueType(),
+                         getValue(I.getOperand(1)));
   }
 
   setValue(&I, result);
@@ -3352,9 +3352,9 @@
   SDValue result;
   DebugLoc dl = getCurDebugLoc();
 
-  if (getValue(I.getOperand(0)).getValueType() == MVT::f32 &&
+  if (getValue(I.getOperand(1)).getValueType() == MVT::f32 &&
       LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
-    SDValue Op = getValue(I.getOperand(0));
+    SDValue Op = getValue(I.getOperand(1));
 
     SDValue IntegerPartOfX = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::i32, Op);
 
@@ -3452,8 +3452,8 @@
   } else {
     // No special expansion.
     result = DAG.getNode(ISD::FEXP2, dl,
-                         getValue(I.getOperand(0)).getValueType(),
-                         getValue(I.getOperand(0)));
+                         getValue(I.getOperand(1)).getValueType(),
+                         getValue(I.getOperand(1)));
   }
 
   setValue(&I, result);
@@ -3464,12 +3464,12 @@
 void
 SelectionDAGBuilder::visitPow(const CallInst &I) {
   SDValue result;
-  const Value *Val = I.getOperand(0);
+  const Value *Val = I.getOperand(1);
   DebugLoc dl = getCurDebugLoc();
   bool IsExp10 = false;
 
   if (getValue(Val).getValueType() == MVT::f32 &&
-      getValue(I.getOperand(1)).getValueType() == MVT::f32 &&
+      getValue(I.getOperand(2)).getValueType() == MVT::f32 &&
       LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
     if (Constant *C = const_cast<Constant*>(dyn_cast<Constant>(Val))) {
       if (ConstantFP *CFP = dyn_cast<ConstantFP>(C)) {
@@ -3480,7 +3480,7 @@
   }
 
   if (IsExp10 && LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
-    SDValue Op = getValue(I.getOperand(1));
+    SDValue Op = getValue(I.getOperand(2));
 
     // Put the exponent in the right bit position for later addition to the
     // final result:
@@ -3585,9 +3585,9 @@
   } else {
     // No special expansion.
     result = DAG.getNode(ISD::FPOW, dl,
-                         getValue(I.getOperand(0)).getValueType(),
-                         getValue(I.getOperand(0)),
-                         getValue(I.getOperand(1)));
+                         getValue(I.getOperand(1)).getValueType(),
+                         getValue(I.getOperand(1)),
+                         getValue(I.getOperand(2)));
   }
 
   setValue(&I, result);
@@ -3665,11 +3665,11 @@
   case Intrinsic::vacopy:   visitVACopy(I); return 0;
   case Intrinsic::returnaddress:
     setValue(&I, DAG.getNode(ISD::RETURNADDR, dl, TLI.getPointerTy(),
-                             getValue(I.getOperand(0))));
+                             getValue(I.getOperand(1))));
     return 0;
   case Intrinsic::frameaddress:
     setValue(&I, DAG.getNode(ISD::FRAMEADDR, dl, TLI.getPointerTy(),
-                             getValue(I.getOperand(0))));
+                             getValue(I.getOperand(1))));
     return 0;
   case Intrinsic::setjmp:
     return "_setjmp"+!TLI.usesUnderscoreSetJmp();
@@ -3678,63 +3678,63 @@
   case Intrinsic::memcpy: {
     // Assert for address < 256 since we support only user defined address
     // spaces.
-    assert(cast<PointerType>(I.getOperand(0)->getType())->getAddressSpace()
+    assert(cast<PointerType>(I.getOperand(1)->getType())->getAddressSpace()
            < 256 &&
-           cast<PointerType>(I.getOperand(1)->getType())->getAddressSpace()
+           cast<PointerType>(I.getOperand(2)->getType())->getAddressSpace()
            < 256 &&
            "Unknown address space");
-    SDValue Op1 = getValue(I.getOperand(0));
-    SDValue Op2 = getValue(I.getOperand(1));
-    SDValue Op3 = getValue(I.getOperand(2));
-    unsigned Align = cast<ConstantInt>(I.getOperand(3))->getZExtValue();
-    bool isVol = cast<ConstantInt>(I.getOperand(4))->getZExtValue();
+    SDValue Op1 = getValue(I.getOperand(1));
+    SDValue Op2 = getValue(I.getOperand(2));
+    SDValue Op3 = getValue(I.getOperand(3));
+    unsigned Align = cast<ConstantInt>(I.getOperand(4))->getZExtValue();
+    bool isVol = cast<ConstantInt>(I.getOperand(5))->getZExtValue();
     DAG.setRoot(DAG.getMemcpy(getRoot(), dl, Op1, Op2, Op3, Align, isVol, false,
-                              I.getOperand(0), 0, I.getOperand(1), 0));
+                              I.getOperand(1), 0, I.getOperand(2), 0));
     return 0;
   }
   case Intrinsic::memset: {
     // Assert for address < 256 since we support only user defined address
     // spaces.
-    assert(cast<PointerType>(I.getOperand(0)->getType())->getAddressSpace()
+    assert(cast<PointerType>(I.getOperand(1)->getType())->getAddressSpace()
            < 256 &&
            "Unknown address space");
-    SDValue Op1 = getValue(I.getOperand(0));
-    SDValue Op2 = getValue(I.getOperand(1));
-    SDValue Op3 = getValue(I.getOperand(2));
-    unsigned Align = cast<ConstantInt>(I.getOperand(3))->getZExtValue();
-    bool isVol = cast<ConstantInt>(I.getOperand(4))->getZExtValue();
+    SDValue Op1 = getValue(I.getOperand(1));
+    SDValue Op2 = getValue(I.getOperand(2));
+    SDValue Op3 = getValue(I.getOperand(3));
+    unsigned Align = cast<ConstantInt>(I.getOperand(4))->getZExtValue();
+    bool isVol = cast<ConstantInt>(I.getOperand(5))->getZExtValue();
     DAG.setRoot(DAG.getMemset(getRoot(), dl, Op1, Op2, Op3, Align, isVol,
-                              I.getOperand(0), 0));
+                              I.getOperand(1), 0));
     return 0;
   }
   case Intrinsic::memmove: {
     // Assert for address < 256 since we support only user defined address
     // spaces.
-    assert(cast<PointerType>(I.getOperand(0)->getType())->getAddressSpace()
+    assert(cast<PointerType>(I.getOperand(1)->getType())->getAddressSpace()
            < 256 &&
-           cast<PointerType>(I.getOperand(1)->getType())->getAddressSpace()
+           cast<PointerType>(I.getOperand(2)->getType())->getAddressSpace()
            < 256 &&
            "Unknown address space");
-    SDValue Op1 = getValue(I.getOperand(0));
-    SDValue Op2 = getValue(I.getOperand(1));
-    SDValue Op3 = getValue(I.getOperand(2));
-    unsigned Align = cast<ConstantInt>(I.getOperand(3))->getZExtValue();
-    bool isVol = cast<ConstantInt>(I.getOperand(4))->getZExtValue();
+    SDValue Op1 = getValue(I.getOperand(1));
+    SDValue Op2 = getValue(I.getOperand(2));
+    SDValue Op3 = getValue(I.getOperand(3));
+    unsigned Align = cast<ConstantInt>(I.getOperand(4))->getZExtValue();
+    bool isVol = cast<ConstantInt>(I.getOperand(5))->getZExtValue();
 
     // If the source and destination are known to not be aliases, we can
     // lower memmove as memcpy.
     uint64_t Size = -1ULL;
     if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op3))
       Size = C->getZExtValue();
-    if (AA->alias(I.getOperand(0), Size, I.getOperand(1), Size) ==
+    if (AA->alias(I.getOperand(1), Size, I.getOperand(2), Size) ==
         AliasAnalysis::NoAlias) {
       DAG.setRoot(DAG.getMemcpy(getRoot(), dl, Op1, Op2, Op3, Align, isVol, 
-                                false, I.getOperand(0), 0, I.getOperand(1), 0));
+                                false, I.getOperand(1), 0, I.getOperand(2), 0));
       return 0;
     }
 
     DAG.setRoot(DAG.getMemmove(getRoot(), dl, Op1, Op2, Op3, Align, isVol,
-                               I.getOperand(0), 0, I.getOperand(1), 0));
+                               I.getOperand(1), 0, I.getOperand(2), 0));
     return 0;
   }
   case Intrinsic::dbg_declare: {
@@ -3846,7 +3846,7 @@
     // Insert the EHSELECTION instruction.
     SDVTList VTs = DAG.getVTList(TLI.getPointerTy(), MVT::Other);
     SDValue Ops[2];
-    Ops[0] = getValue(I.getOperand(0));
+    Ops[0] = getValue(I.getOperand(1));
     Ops[1] = getRoot();
     SDValue Op = DAG.getNode(ISD::EHSELECTION, dl, VTs, Ops, 2);
     DAG.setRoot(Op.getValue(1));
@@ -3856,7 +3856,7 @@
 
   case Intrinsic::eh_typeid_for: {
     // Find the type id for the given typeinfo.
-    GlobalVariable *GV = ExtractTypeInfo(I.getOperand(0));
+    GlobalVariable *GV = ExtractTypeInfo(I.getOperand(1));
     unsigned TypeID = DAG.getMachineFunction().getMMI().getTypeIDFor(GV);
     Res = DAG.getConstant(TypeID, MVT::i32);
     setValue(&I, Res);
@@ -3869,15 +3869,15 @@
     DAG.setRoot(DAG.getNode(ISD::EH_RETURN, dl,
                             MVT::Other,
                             getControlRoot(),
-                            getValue(I.getOperand(0)),
-                            getValue(I.getOperand(1))));
+                            getValue(I.getOperand(1)),
+                            getValue(I.getOperand(2))));
     return 0;
   case Intrinsic::eh_unwind_init:
     DAG.getMachineFunction().getMMI().setCallsUnwindInit(true);
     return 0;
   case Intrinsic::eh_dwarf_cfa: {
-    EVT VT = getValue(I.getOperand(0)).getValueType();
-    SDValue CfaArg = DAG.getSExtOrTrunc(getValue(I.getOperand(0)), dl,
+    EVT VT = getValue(I.getOperand(1)).getValueType();
+    SDValue CfaArg = DAG.getSExtOrTrunc(getValue(I.getOperand(1)), dl,
                                         TLI.getPointerTy());
     SDValue Offset = DAG.getNode(ISD::ADD, dl,
                                  TLI.getPointerTy(),
@@ -3893,7 +3893,7 @@
   }
   case Intrinsic::eh_sjlj_callsite: {
     MachineModuleInfo &MMI = DAG.getMachineFunction().getMMI();
-    ConstantInt *CI = dyn_cast<ConstantInt>(I.getOperand(0));
+    ConstantInt *CI = dyn_cast<ConstantInt>(I.getOperand(1));
     assert(CI && "Non-constant call site value in eh.sjlj.callsite!");
     assert(MMI.getCurrentCallSite() == 0 && "Overlapping call sites!");
 
@@ -3923,34 +3923,34 @@
     case Intrinsic::convertuu:  Code = ISD::CVT_UU; break;
     }
     EVT DestVT = TLI.getValueType(I.getType());
-    const Value *Op1 = I.getOperand(0);
+    const Value *Op1 = I.getOperand(1);
     Res = DAG.getConvertRndSat(DestVT, getCurDebugLoc(), getValue(Op1),
                                DAG.getValueType(DestVT),
                                DAG.getValueType(getValue(Op1).getValueType()),
-                               getValue(I.getOperand(1)),
                                getValue(I.getOperand(2)),
+                               getValue(I.getOperand(3)),
                                Code);
     setValue(&I, Res);
     return 0;
   }
   case Intrinsic::sqrt:
     setValue(&I, DAG.getNode(ISD::FSQRT, dl,
-                             getValue(I.getOperand(0)).getValueType(),
-                             getValue(I.getOperand(0))));
+                             getValue(I.getOperand(1)).getValueType(),
+                             getValue(I.getOperand(1))));
     return 0;
   case Intrinsic::powi:
-    setValue(&I, ExpandPowI(dl, getValue(I.getOperand(0)),
-                            getValue(I.getOperand(1)), DAG));
+    setValue(&I, ExpandPowI(dl, getValue(I.getOperand(1)),
+                            getValue(I.getOperand(2)), DAG));
     return 0;
   case Intrinsic::sin:
     setValue(&I, DAG.getNode(ISD::FSIN, dl,
-                             getValue(I.getOperand(0)).getValueType(),
-                             getValue(I.getOperand(0))));
+                             getValue(I.getOperand(1)).getValueType(),
+                             getValue(I.getOperand(1))));
     return 0;
   case Intrinsic::cos:
     setValue(&I, DAG.getNode(ISD::FCOS, dl,
-                             getValue(I.getOperand(0)).getValueType(),
-                             getValue(I.getOperand(0))));
+                             getValue(I.getOperand(1)).getValueType(),
+                             getValue(I.getOperand(1))));
     return 0;
   case Intrinsic::log:
     visitLog(I);
@@ -3972,14 +3972,14 @@
     return 0;
   case Intrinsic::convert_to_fp16:
     setValue(&I, DAG.getNode(ISD::FP32_TO_FP16, dl,
-                             MVT::i16, getValue(I.getOperand(0))));
+                             MVT::i16, getValue(I.getOperand(1))));
     return 0;
   case Intrinsic::convert_from_fp16:
     setValue(&I, DAG.getNode(ISD::FP16_TO_FP32, dl,
-                             MVT::f32, getValue(I.getOperand(0))));
+                             MVT::f32, getValue(I.getOperand(1))));
     return 0;
   case Intrinsic::pcmarker: {
-    SDValue Tmp = getValue(I.getOperand(0));
+    SDValue Tmp = getValue(I.getOperand(1));
     DAG.setRoot(DAG.getNode(ISD::PCMARKER, dl, MVT::Other, getRoot(), Tmp));
     return 0;
   }
@@ -3994,23 +3994,23 @@
   }
   case Intrinsic::bswap:
     setValue(&I, DAG.getNode(ISD::BSWAP, dl,
-                             getValue(I.getOperand(0)).getValueType(),
-                             getValue(I.getOperand(0))));
+                             getValue(I.getOperand(1)).getValueType(),
+                             getValue(I.getOperand(1))));
     return 0;
   case Intrinsic::cttz: {
-    SDValue Arg = getValue(I.getOperand(0));
+    SDValue Arg = getValue(I.getOperand(1));
     EVT Ty = Arg.getValueType();
     setValue(&I, DAG.getNode(ISD::CTTZ, dl, Ty, Arg));
     return 0;
   }
   case Intrinsic::ctlz: {
-    SDValue Arg = getValue(I.getOperand(0));
+    SDValue Arg = getValue(I.getOperand(1));
     EVT Ty = Arg.getValueType();
     setValue(&I, DAG.getNode(ISD::CTLZ, dl, Ty, Arg));
     return 0;
   }
   case Intrinsic::ctpop: {
-    SDValue Arg = getValue(I.getOperand(0));
+    SDValue Arg = getValue(I.getOperand(1));
     EVT Ty = Arg.getValueType();
     setValue(&I, DAG.getNode(ISD::CTPOP, dl, Ty, Arg));
     return 0;
@@ -4024,7 +4024,7 @@
     return 0;
   }
   case Intrinsic::stackrestore: {
-    Res = getValue(I.getOperand(0));
+    Res = getValue(I.getOperand(1));
     DAG.setRoot(DAG.getNode(ISD::STACKRESTORE, dl, MVT::Other, getRoot(), Res));
     return 0;
   }
@@ -4034,8 +4034,8 @@
     MachineFrameInfo *MFI = MF.getFrameInfo();
     EVT PtrTy = TLI.getPointerTy();
 
-    SDValue Src = getValue(I.getOperand(0));   // The guard's value.
-    AllocaInst *Slot = cast<AllocaInst>(I.getOperand(1));
+    SDValue Src = getValue(I.getOperand(1));   // The guard's value.
+    AllocaInst *Slot = cast<AllocaInst>(I.getOperand(2));
 
     int FI = FuncInfo.StaticAllocaMap[Slot];
     MFI->setStackProtectorIndex(FI);
@@ -4072,14 +4072,14 @@
     return 0;
 
   case Intrinsic::init_trampoline: {
-    const Function *F = cast<Function>(I.getOperand(1)->stripPointerCasts());
+    const Function *F = cast<Function>(I.getOperand(2)->stripPointerCasts());
 
     SDValue Ops[6];
     Ops[0] = getRoot();
-    Ops[1] = getValue(I.getOperand(0));
-    Ops[2] = getValue(I.getOperand(1));
-    Ops[3] = getValue(I.getOperand(2));
-    Ops[4] = DAG.getSrcValue(I.getOperand(0));
+    Ops[1] = getValue(I.getOperand(1));
+    Ops[2] = getValue(I.getOperand(2));
+    Ops[3] = getValue(I.getOperand(3));
+    Ops[4] = DAG.getSrcValue(I.getOperand(1));
     Ops[5] = DAG.getSrcValue(F);
 
     Res = DAG.getNode(ISD::TRAMPOLINE, dl,
@@ -4092,8 +4092,8 @@
   }
   case Intrinsic::gcroot:
     if (GFI) {
-      const Value *Alloca = I.getOperand(0);
-      const Constant *TypeMap = cast<Constant>(I.getOperand(1));
+      const Value *Alloca = I.getOperand(1);
+      const Constant *TypeMap = cast<Constant>(I.getOperand(2));
 
       FrameIndexSDNode *FI = cast<FrameIndexSDNode>(getValue(Alloca).getNode());
       GFI->addStackRoot(FI->getIndex(), TypeMap);
@@ -4125,9 +4125,9 @@
   case Intrinsic::prefetch: {
     SDValue Ops[4];
     Ops[0] = getRoot();
-    Ops[1] = getValue(I.getOperand(0));
-    Ops[2] = getValue(I.getOperand(1));
-    Ops[3] = getValue(I.getOperand(2));
+    Ops[1] = getValue(I.getOperand(1));
+    Ops[2] = getValue(I.getOperand(2));
+    Ops[3] = getValue(I.getOperand(3));
     DAG.setRoot(DAG.getNode(ISD::PREFETCH, dl, MVT::Other, &Ops[0], 4));
     return 0;
   }
@@ -4136,7 +4136,7 @@
     SDValue Ops[6];
     Ops[0] = getRoot();
     for (int x = 1; x < 6; ++x)
-      Ops[x] = getValue(I.getOperand(x - 1));
+      Ops[x] = getValue(I.getOperand(x));
 
     DAG.setRoot(DAG.getNode(ISD::MEMBARRIER, dl, MVT::Other, &Ops[0], 6));
     return 0;
@@ -4145,12 +4145,12 @@
     SDValue Root = getRoot();
     SDValue L =
       DAG.getAtomic(ISD::ATOMIC_CMP_SWAP, getCurDebugLoc(),
-                    getValue(I.getOperand(1)).getValueType().getSimpleVT(),
+                    getValue(I.getOperand(2)).getValueType().getSimpleVT(),
                     Root,
-                    getValue(I.getOperand(0)),
                     getValue(I.getOperand(1)),
                     getValue(I.getOperand(2)),
-                    I.getOperand(0));
+                    getValue(I.getOperand(3)),
+                    I.getOperand(1));
     setValue(&I, L);
     DAG.setRoot(L.getValue(1));
     return 0;
@@ -4520,13 +4520,13 @@
   if (I.getNumOperands() != 4)
     return false;
 
-  const Value *LHS = I.getOperand(0), *RHS = I.getOperand(1);
+  const Value *LHS = I.getOperand(1), *RHS = I.getOperand(2);
   if (!LHS->getType()->isPointerTy() || !RHS->getType()->isPointerTy() ||
-      !I.getOperand(2)->getType()->isIntegerTy() ||
+      !I.getOperand(3)->getType()->isIntegerTy() ||
       !I.getType()->isIntegerTy())
     return false;
 
-  const ConstantInt *Size = dyn_cast<ConstantInt>(I.getOperand(2));
+  const ConstantInt *Size = dyn_cast<ConstantInt>(I.getOperand(3));
 
   // memcmp(S1,S2,2) != 0 -> (*(short*)LHS != *(short*)RHS)  != 0
   // memcmp(S1,S2,4) != 0 -> (*(int*)LHS != *(int*)RHS)  != 0
@@ -4617,50 +4617,50 @@
       StringRef Name = F->getName();
       if (Name == "copysign" || Name == "copysignf" || Name == "copysignl") {
         if (I.getNumOperands() == 3 &&   // Basic sanity checks.
-            I.getOperand(0)->getType()->isFloatingPointTy() &&
-            I.getType() == I.getOperand(0)->getType() &&
-            I.getType() == I.getOperand(1)->getType()) {
-          SDValue LHS = getValue(I.getOperand(0));
-          SDValue RHS = getValue(I.getOperand(1));
+            I.getOperand(1)->getType()->isFloatingPointTy() &&
+            I.getType() == I.getOperand(1)->getType() &&
+            I.getType() == I.getOperand(2)->getType()) {
+          SDValue LHS = getValue(I.getOperand(1));
+          SDValue RHS = getValue(I.getOperand(2));
           setValue(&I, DAG.getNode(ISD::FCOPYSIGN, getCurDebugLoc(),
                                    LHS.getValueType(), LHS, RHS));
           return;
         }
       } else if (Name == "fabs" || Name == "fabsf" || Name == "fabsl") {
         if (I.getNumOperands() == 2 &&   // Basic sanity checks.
-            I.getOperand(0)->getType()->isFloatingPointTy() &&
-            I.getType() == I.getOperand(0)->getType()) {
-          SDValue Tmp = getValue(I.getOperand(0));
+            I.getOperand(1)->getType()->isFloatingPointTy() &&
+            I.getType() == I.getOperand(1)->getType()) {
+          SDValue Tmp = getValue(I.getOperand(1));
           setValue(&I, DAG.getNode(ISD::FABS, getCurDebugLoc(),
                                    Tmp.getValueType(), Tmp));
           return;
         }
       } else if (Name == "sin" || Name == "sinf" || Name == "sinl") {
         if (I.getNumOperands() == 2 &&   // Basic sanity checks.
-            I.getOperand(0)->getType()->isFloatingPointTy() &&
-            I.getType() == I.getOperand(0)->getType() &&
+            I.getOperand(1)->getType()->isFloatingPointTy() &&
+            I.getType() == I.getOperand(1)->getType() &&
             I.onlyReadsMemory()) {
-          SDValue Tmp = getValue(I.getOperand(0));
+          SDValue Tmp = getValue(I.getOperand(1));
           setValue(&I, DAG.getNode(ISD::FSIN, getCurDebugLoc(),
                                    Tmp.getValueType(), Tmp));
           return;
         }
       } else if (Name == "cos" || Name == "cosf" || Name == "cosl") {
         if (I.getNumOperands() == 2 &&   // Basic sanity checks.
-            I.getOperand(0)->getType()->isFloatingPointTy() &&
-            I.getType() == I.getOperand(0)->getType() &&
+            I.getOperand(1)->getType()->isFloatingPointTy() &&
+            I.getType() == I.getOperand(1)->getType() &&
             I.onlyReadsMemory()) {
-          SDValue Tmp = getValue(I.getOperand(0));
+          SDValue Tmp = getValue(I.getOperand(1));
           setValue(&I, DAG.getNode(ISD::FCOS, getCurDebugLoc(),
                                    Tmp.getValueType(), Tmp));
           return;
         }
       } else if (Name == "sqrt" || Name == "sqrtf" || Name == "sqrtl") {
         if (I.getNumOperands() == 2 &&   // Basic sanity checks.
-            I.getOperand(0)->getType()->isFloatingPointTy() &&
-            I.getType() == I.getOperand(0)->getType() &&
+            I.getOperand(1)->getType()->isFloatingPointTy() &&
+            I.getType() == I.getOperand(1)->getType() &&
             I.onlyReadsMemory()) {
-          SDValue Tmp = getValue(I.getOperand(0));
+          SDValue Tmp = getValue(I.getOperand(1));
           setValue(&I, DAG.getNode(ISD::FSQRT, getCurDebugLoc(),
                                    Tmp.getValueType(), Tmp));
           return;
@@ -4670,14 +4670,14 @@
           return;
       }
     }
-  } else if (isa<InlineAsm>(I.getCalledValue())) {
+  } else if (isa<InlineAsm>(I.getOperand(0))) {
     visitInlineAsm(&I);
     return;
   }
 
   SDValue Callee;
   if (!RenameFn)
-    Callee = getValue(I.getCalledValue());
+    Callee = getValue(I.getOperand(0));
   else
     Callee = DAG.getExternalSymbol(RenameFn, TLI.getPointerTy());
 
@@ -5609,8 +5609,8 @@
 void SelectionDAGBuilder::visitVAStart(const CallInst &I) {
   DAG.setRoot(DAG.getNode(ISD::VASTART, getCurDebugLoc(),
                           MVT::Other, getRoot(),
-                          getValue(I.getOperand(0)),
-                          DAG.getSrcValue(I.getOperand(0))));
+                          getValue(I.getOperand(1)),
+                          DAG.getSrcValue(I.getOperand(1))));
 }
 
 void SelectionDAGBuilder::visitVAArg(const VAArgInst &I) {
@@ -5624,17 +5624,17 @@
 void SelectionDAGBuilder::visitVAEnd(const CallInst &I) {
   DAG.setRoot(DAG.getNode(ISD::VAEND, getCurDebugLoc(),
                           MVT::Other, getRoot(),
-                          getValue(I.getOperand(0)),
-                          DAG.getSrcValue(I.getOperand(0))));
+                          getValue(I.getOperand(1)),
+                          DAG.getSrcValue(I.getOperand(1))));
 }
 
 void SelectionDAGBuilder::visitVACopy(const CallInst &I) {
   DAG.setRoot(DAG.getNode(ISD::VACOPY, getCurDebugLoc(),
                           MVT::Other, getRoot(),
-                          getValue(I.getOperand(0)),
                           getValue(I.getOperand(1)),
-                          DAG.getSrcValue(I.getOperand(0)),
-                          DAG.getSrcValue(I.getOperand(1))));
+                          getValue(I.getOperand(2)),
+                          DAG.getSrcValue(I.getOperand(1)),
+                          DAG.getSrcValue(I.getOperand(2))));
 }
 
 /// TargetLowering::LowerCallTo - This is the default LowerCallTo

Modified: llvm/trunk/lib/CodeGen/ShadowStackGC.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ShadowStackGC.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/ShadowStackGC.cpp (original)
+++ llvm/trunk/lib/CodeGen/ShadowStackGC.cpp Thu Apr 15 07:46:56 2010
@@ -158,9 +158,9 @@
 
           // Create a new invoke instruction.
           Args.clear();
-          Args.append(CI->op_begin(), CI->op_end() - 1);
+          Args.append(CI->op_begin() + 1, CI->op_end());
 
-          InvokeInst *II = InvokeInst::Create(CI->getCalledValue(),
+          InvokeInst *II = InvokeInst::Create(CI->getOperand(0),
                                               NewBB, CleanupBB,
                                               Args.begin(), Args.end(),
                                               CI->getName(), CallBB);
@@ -194,7 +194,7 @@
   unsigned NumMeta = 0;
   SmallVector<Constant*,16> Metadata;
   for (unsigned I = 0; I != Roots.size(); ++I) {
-    Constant *C = cast<Constant>(Roots[I].first->getOperand(1));
+    Constant *C = cast<Constant>(Roots[I].first->getOperand(2));
     if (!C->isNullValue())
       NumMeta = I + 1;
     Metadata.push_back(ConstantExpr::getBitCast(C, VoidPtr));
@@ -322,16 +322,16 @@
 
   assert(Roots.empty() && "Not cleaned up?");
 
-  SmallVector<std::pair<CallInst*, AllocaInst*>,16> MetaRoots;
+  SmallVector<std::pair<CallInst*,AllocaInst*>,16> MetaRoots;
 
   for (Function::iterator BB = F.begin(), E = F.end(); BB != E; ++BB)
     for (BasicBlock::iterator II = BB->begin(), E = BB->end(); II != E;)
       if (IntrinsicInst *CI = dyn_cast<IntrinsicInst>(II++))
         if (Function *F = CI->getCalledFunction())
           if (F->getIntrinsicID() == Intrinsic::gcroot) {
-            std::pair<CallInst*, AllocaInst*> Pair = std::make_pair(
-              CI, cast<AllocaInst>(CI->getOperand(0)->stripPointerCasts()));
-            if (IsNullValue(CI->getOperand(1)))
+            std::pair<CallInst*,AllocaInst*> Pair = std::make_pair(
+              CI, cast<AllocaInst>(CI->getOperand(1)->stripPointerCasts()));
+            if (IsNullValue(CI->getOperand(2)))
               Roots.push_back(Pair);
             else
               MetaRoots.push_back(Pair);

Modified: llvm/trunk/lib/CodeGen/SjLjEHPrepare.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SjLjEHPrepare.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SjLjEHPrepare.cpp (original)
+++ llvm/trunk/lib/CodeGen/SjLjEHPrepare.cpp Thu Apr 15 07:46:56 2010
@@ -305,7 +305,7 @@
     for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ++I) {
       if (CallInst *CI = dyn_cast<CallInst>(I)) {
         if (CI->getCalledFunction() == SelectorFn) {
-          if (!PersonalityFn) PersonalityFn = CI->getOperand(1);
+          if (!PersonalityFn) PersonalityFn = CI->getOperand(2);
           EH_Selectors.push_back(CI);
         } else if (CI->getCalledFunction() == ExceptionFn) {
           EH_Exceptions.push_back(CI);

Modified: llvm/trunk/lib/Target/CBackend/CBackend.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CBackend/CBackend.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CBackend/CBackend.cpp (original)
+++ llvm/trunk/lib/Target/CBackend/CBackend.cpp Thu Apr 15 07:46:56 2010
@@ -2886,7 +2886,7 @@
   bool hasByVal = I.hasByValArgument();
   bool isStructRet = I.hasStructRetAttr();
   if (isStructRet) {
-    writeOperandDeref(I.getOperand(0));
+    writeOperandDeref(I.getOperand(1));
     Out << " = ";
   }
   
@@ -2942,7 +2942,7 @@
 
   unsigned NumDeclaredParams = FTy->getNumParams();
 
-  CallInst::op_iterator AI = I.op_begin(), AE = I.op_end() - 1;
+  CallSite::arg_iterator AI = I.op_begin()+1, AE = I.op_end();
   unsigned ArgNo = 0;
   if (isStructRet) {   // Skip struct return argument.
     ++AI;
@@ -2996,7 +2996,7 @@
     Out << "0; ";
       
     Out << "va_start(*(va_list*)";
-    writeOperand(I.getOperand(0));
+    writeOperand(I.getOperand(1));
     Out << ", ";
     // Output the last argument to the enclosing function.
     if (I.getParent()->getParent()->arg_empty())
@@ -3006,9 +3006,9 @@
     Out << ')';
     return true;
   case Intrinsic::vaend:
-    if (!isa<ConstantPointerNull>(I.getOperand(0))) {
+    if (!isa<ConstantPointerNull>(I.getOperand(1))) {
       Out << "0; va_end(*(va_list*)";
-      writeOperand(I.getOperand(0));
+      writeOperand(I.getOperand(1));
       Out << ')';
     } else {
       Out << "va_end(*(va_list*)0)";
@@ -3017,47 +3017,47 @@
   case Intrinsic::vacopy:
     Out << "0; ";
     Out << "va_copy(*(va_list*)";
-    writeOperand(I.getOperand(0));
-    Out << ", *(va_list*)";
     writeOperand(I.getOperand(1));
+    Out << ", *(va_list*)";
+    writeOperand(I.getOperand(2));
     Out << ')';
     return true;
   case Intrinsic::returnaddress:
     Out << "__builtin_return_address(";
-    writeOperand(I.getOperand(0));
+    writeOperand(I.getOperand(1));
     Out << ')';
     return true;
   case Intrinsic::frameaddress:
     Out << "__builtin_frame_address(";
-    writeOperand(I.getOperand(0));
+    writeOperand(I.getOperand(1));
     Out << ')';
     return true;
   case Intrinsic::powi:
     Out << "__builtin_powi(";
-    writeOperand(I.getOperand(0));
-    Out << ", ";
     writeOperand(I.getOperand(1));
+    Out << ", ";
+    writeOperand(I.getOperand(2));
     Out << ')';
     return true;
   case Intrinsic::setjmp:
     Out << "setjmp(*(jmp_buf*)";
-    writeOperand(I.getOperand(0));
+    writeOperand(I.getOperand(1));
     Out << ')';
     return true;
   case Intrinsic::longjmp:
     Out << "longjmp(*(jmp_buf*)";
-    writeOperand(I.getOperand(0));
-    Out << ", ";
     writeOperand(I.getOperand(1));
+    Out << ", ";
+    writeOperand(I.getOperand(2));
     Out << ')';
     return true;
   case Intrinsic::prefetch:
     Out << "LLVM_PREFETCH((const void *)";
-    writeOperand(I.getOperand(0));
-    Out << ", ";
     writeOperand(I.getOperand(1));
     Out << ", ";
     writeOperand(I.getOperand(2));
+    Out << ", ";
+    writeOperand(I.getOperand(3));
     Out << ")";
     return true;
   case Intrinsic::stacksave:
@@ -3074,7 +3074,7 @@
     printType(Out, I.getType());
     Out << ')';  
     // Multiple GCC builtins multiplex onto this intrinsic.
-    switch (cast<ConstantInt>(I.getOperand(2))->getZExtValue()) {
+    switch (cast<ConstantInt>(I.getOperand(3))->getZExtValue()) {
     default: llvm_unreachable("Invalid llvm.x86.sse.cmp!");
     case 0: Out << "__builtin_ia32_cmpeq"; break;
     case 1: Out << "__builtin_ia32_cmplt"; break;
@@ -3095,9 +3095,9 @@
       Out << 'd';
       
     Out << "(";
-    writeOperand(I.getOperand(0));
-    Out << ", ";
     writeOperand(I.getOperand(1));
+    Out << ", ";
+    writeOperand(I.getOperand(2));
     Out << ")";
     return true;
   case Intrinsic::ppc_altivec_lvsl:
@@ -3105,7 +3105,7 @@
     printType(Out, I.getType());
     Out << ')';  
     Out << "__builtin_altivec_lvsl(0, (void*)";
-    writeOperand(I.getOperand(0));
+    writeOperand(I.getOperand(1));
     Out << ")";
     return true;
   }
@@ -3218,7 +3218,7 @@
       DestVal = ResultVals[ValueCount].first;
       DestValNo = ResultVals[ValueCount].second;
     } else
-      DestVal = CI.getOperand(ValueCount-ResultVals.size());
+      DestVal = CI.getOperand(ValueCount-ResultVals.size()+1);
 
     if (I->isEarlyClobber)
       C = "&"+C;
@@ -3252,7 +3252,7 @@
     }
     
     assert(ValueCount >= ResultVals.size() && "Input can't refer to result");
-    Value *SrcVal = CI.getOperand(ValueCount-ResultVals.size());
+    Value *SrcVal = CI.getOperand(ValueCount-ResultVals.size()+1);
     
     Out << "\"" << C << "\"(";
     if (!I->isIndirect)

Modified: llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp (original)
+++ llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp Thu Apr 15 07:46:56 2010
@@ -1082,9 +1082,8 @@
 
     // Before we emit this instruction, we need to take care of generating any
     // forward references. So, we get the names of all the operands in advance
-    const unsigned Ops(I->getNumOperands());
-    std::string* opNames = new std::string[Ops];
-    for (unsigned i = 0; i < Ops; i++) {
+    std::string* opNames = new std::string[I->getNumOperands()];
+    for (unsigned i = 0; i < I->getNumOperands(); i++) {
       opNames[i] = getOpName(I->getOperand(i));
     }
 
@@ -1145,15 +1144,15 @@
       const InvokeInst* inv = cast<InvokeInst>(I);
       Out << "std::vector<Value*> " << iName << "_params;";
       nl(Out);
-      for (unsigned i = 0; i < inv->getNumOperands() - 3; ++i) {
+      for (unsigned i = 3; i < inv->getNumOperands(); ++i) {
         Out << iName << "_params.push_back("
             << opNames[i] << ");";
         nl(Out);
       }
       Out << "InvokeInst *" << iName << " = InvokeInst::Create("
-          << opNames[Ops - 3] << ", "
-          << opNames[Ops - 2] << ", "
-          << opNames[Ops - 1] << ", "
+          << opNames[0] << ", "
+          << opNames[1] << ", "
+          << opNames[2] << ", "
           << iName << "_params.begin(), " << iName << "_params.end(), \"";
       printEscapedString(inv->getName());
       Out << "\", " << bbname << ");";
@@ -1389,18 +1388,18 @@
       if (call->getNumOperands() > 2) {
         Out << "std::vector<Value*> " << iName << "_params;";
         nl(Out);
-        for (unsigned i = 0; i < call->getNumOperands() - 1; ++i) {
+        for (unsigned i = 1; i < call->getNumOperands(); ++i) {
           Out << iName << "_params.push_back(" << opNames[i] << ");";
           nl(Out);
         }
         Out << "CallInst* " << iName << " = CallInst::Create("
-            << opNames[Ops - 1] << ", " << iName << "_params.begin(), "
+            << opNames[0] << ", " << iName << "_params.begin(), "
             << iName << "_params.end(), \"";
       } else if (call->getNumOperands() == 2) {
         Out << "CallInst* " << iName << " = CallInst::Create("
-            << opNames[Ops - 1] << ", " << opNames[0] << ", \"";
+            << opNames[0] << ", " << opNames[1] << ", \"";
       } else {
-        Out << "CallInst* " << iName << " = CallInst::Create(" << opNames[Ops - 1]
+        Out << "CallInst* " << iName << " = CallInst::Create(" << opNames[0]
             << ", \"";
       }
       printEscapedString(call->getName());

Modified: llvm/trunk/lib/Target/X86/X86FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FastISel.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86FastISel.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86FastISel.cpp Thu Apr 15 07:46:56 2010
@@ -1170,8 +1170,8 @@
     // Emit code inline code to store the stack guard onto the stack.
     EVT PtrTy = TLI.getPointerTy();
 
-    const Value *Op1 = I.getOperand(0); // The guard's value.
-    const AllocaInst *Slot = cast<AllocaInst>(I.getOperand(1));
+    const Value *Op1 = I.getOperand(1); // The guard's value.
+    const AllocaInst *Slot = cast<AllocaInst>(I.getOperand(2));
 
     // Grab the frame index.
     X86AddressMode AM;
@@ -1182,7 +1182,7 @@
     return true;
   }
   case Intrinsic::objectsize: {
-    ConstantInt *CI = dyn_cast<ConstantInt>(I.getOperand(1));
+    ConstantInt *CI = dyn_cast<ConstantInt>(I.getOperand(2));
     const Type *Ty = I.getCalledFunction()->getReturnType();
     
     assert(CI && "Non-constant type in Intrinsic::objectsize?");
@@ -1237,8 +1237,8 @@
     if (!isTypeLegal(RetTy, VT))
       return false;
 
-    const Value *Op1 = I.getOperand(0);
-    const Value *Op2 = I.getOperand(1);
+    const Value *Op1 = I.getOperand(1);
+    const Value *Op2 = I.getOperand(2);
     unsigned Reg1 = getRegForValue(Op1);
     unsigned Reg2 = getRegForValue(Op2);
 
@@ -1281,7 +1281,7 @@
 
 bool X86FastISel::X86SelectCall(const Instruction *I) {
   const CallInst *CI = cast<CallInst>(I);
-  const Value *Callee = CI->getCalledValue();
+  const Value *Callee = I->getOperand(0);
 
   // Can't handle inline asm yet.
   if (isa<InlineAsm>(Callee))

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Apr 15 07:46:56 2010
@@ -9918,7 +9918,7 @@
 
   // Verify this is a simple bswap.
   if (CI->getNumOperands() != 2 ||
-      CI->getType() != CI->getOperand(0)->getType() ||
+      CI->getType() != CI->getOperand(1)->getType() ||
       !CI->getType()->isIntegerTy())
     return false;
 
@@ -9931,7 +9931,7 @@
   Module *M = CI->getParent()->getParent()->getParent();
   Constant *Int = Intrinsic::getDeclaration(M, Intrinsic::bswap, Tys, 1);
 
-  Value *Op = CI->getOperand(0);
+  Value *Op = CI->getOperand(1);
   Op = CallInst::Create(Int, Op, CI->getName(), CI);
 
   CI->replaceAllUsesWith(Op);

Modified: llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp Thu Apr 15 07:46:56 2010
@@ -222,12 +222,12 @@
         GS.HasPHIUser = true;
       } else if (isa<CmpInst>(I)) {
       } else if (isa<MemTransferInst>(I)) {
-        if (I->getOperand(0) == V)
-          GS.StoredType = GlobalStatus::isStored;
         if (I->getOperand(1) == V)
+          GS.StoredType = GlobalStatus::isStored;
+        if (I->getOperand(2) == V)
           GS.isLoaded = true;
       } else if (isa<MemSetInst>(I)) {
-        assert(I->getOperand(0) == V && "Memset only takes one pointer!");
+        assert(I->getOperand(1) == V && "Memset only takes one pointer!");
         GS.StoredType = GlobalStatus::isStored;
       } else {
         return true;  // Any other non-load instruction might take address!
@@ -1323,8 +1323,8 @@
   //      if (F2) { free(F2); F2 = 0; }
   //    }
   // The malloc can also fail if its argument is too large.
-  Constant *ConstantZero = ConstantInt::get(CI->getOperand(0)->getType(), 0);
-  Value *RunningOr = new ICmpInst(CI, ICmpInst::ICMP_SLT, CI->getOperand(0),
+  Constant *ConstantZero = ConstantInt::get(CI->getOperand(1)->getType(), 0);
+  Value *RunningOr = new ICmpInst(CI, ICmpInst::ICMP_SLT, CI->getOperand(1),
                                   ConstantZero, "isneg");
   for (unsigned i = 0, e = FieldMallocs.size(); i != e; ++i) {
     Value *Cond = new ICmpInst(CI, ICmpInst::ICMP_EQ, FieldMallocs[i],
@@ -1511,10 +1511,10 @@
 
   // If this is an allocation of a fixed size array of structs, analyze as a
   // variable size array.  malloc [100 x struct],1 -> malloc struct, 100
-  if (NElems == ConstantInt::get(CI->getOperand(0)->getType(), 1))
+  if (NElems == ConstantInt::get(CI->getOperand(1)->getType(), 1))
     if (const ArrayType *AT = dyn_cast<ArrayType>(AllocTy))
       AllocTy = AT->getElementType();
-
+  
   const StructType *AllocSTy = dyn_cast<StructType>(AllocTy);
   if (!AllocSTy)
     return false;
@@ -1641,7 +1641,7 @@
         // bool.
         Instruction *StoredVal = cast<Instruction>(SI->getOperand(0));
 
-        // If we've already replaced the input, StoredVal will be a cast or
+        // If we're already replaced the input, StoredVal will be a cast or
         // select instruction.  If not, it will be a load of the original
         // global.
         if (LoadInst *LI = dyn_cast<LoadInst>(StoredVal)) {
@@ -2262,8 +2262,8 @@
     } else if (SelectInst *SI = dyn_cast<SelectInst>(CurInst)) {
       InstResult =
             ConstantExpr::getSelect(getVal(Values, SI->getOperand(0)),
-                                    getVal(Values, SI->getOperand(1)),
-                                    getVal(Values, SI->getOperand(2)));
+                                           getVal(Values, SI->getOperand(1)),
+                                           getVal(Values, SI->getOperand(2)));
     } else if (GetElementPtrInst *GEP = dyn_cast<GetElementPtrInst>(CurInst)) {
       Constant *P = getVal(Values, GEP->getOperand(0));
       SmallVector<Constant*, 8> GEPOps;
@@ -2295,14 +2295,14 @@
       }
 
       // Cannot handle inline asm.
-      if (isa<InlineAsm>(CI->getCalledValue())) return false;
+      if (isa<InlineAsm>(CI->getOperand(0))) return false;
 
       // Resolve function pointers.
-      Function *Callee = dyn_cast<Function>(getVal(Values, CI->getCalledValue()));
+      Function *Callee = dyn_cast<Function>(getVal(Values, CI->getOperand(0)));
       if (!Callee) return false;  // Cannot resolve.
 
       SmallVector<Constant*, 8> Formals;
-      for (User::op_iterator i = CI->op_begin(), e = CI->op_end() - 1;
+      for (User::op_iterator i = CI->op_begin() + 1, e = CI->op_end();
            i != e; ++i)
         Formals.push_back(getVal(Values, *i));
 

Modified: llvm/trunk/lib/Transforms/IPO/LowerSetJmp.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/LowerSetJmp.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/LowerSetJmp.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/LowerSetJmp.cpp Thu Apr 15 07:46:56 2010
@@ -262,8 +262,8 @@
   // char*. It returns "void", so it doesn't need to replace any of
   // Inst's uses and doesn't get a name.
   CastInst* CI = 
-    new BitCastInst(Inst->getOperand(0), SBPTy, "LJBuf", Inst);
-  Value *Args[] = { CI, Inst->getOperand(1) };
+    new BitCastInst(Inst->getOperand(1), SBPTy, "LJBuf", Inst);
+  Value *Args[] = { CI, Inst->getOperand(2) };
   CallInst::Create(ThrowLongJmp, Args, Args + 2, "", Inst);
 
   SwitchValuePair& SVP = SwitchValMap[Inst->getParent()->getParent()];
@@ -378,7 +378,7 @@
   const Type* SBPTy =
           Type::getInt8PtrTy(Inst->getContext());
   CastInst* BufPtr = 
-    new BitCastInst(Inst->getOperand(0), SBPTy, "SBJmpBuf", Inst);
+    new BitCastInst(Inst->getOperand(1), SBPTy, "SBJmpBuf", Inst);
   Value *Args[] = {
     GetSetJmpMap(Func), BufPtr,
     ConstantInt::get(Type::getInt32Ty(Inst->getContext()), SetJmpIDMap[Func]++)
@@ -473,7 +473,7 @@
 
   // Construct the new "invoke" instruction.
   TerminatorInst* Term = OldBB->getTerminator();
-  std::vector<Value*> Params(CI.op_begin(), CI.op_end() - 1);
+  std::vector<Value*> Params(CI.op_begin() + 1, CI.op_end());
   InvokeInst* II =
     InvokeInst::Create(CI.getCalledValue(), NewBB, PrelimBBMap[Func],
                        Params.begin(), Params.end(), CI.getName(), Term);

Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp Thu Apr 15 07:46:56 2010
@@ -109,8 +109,8 @@
 }
 
 Instruction *InstCombiner::SimplifyMemTransfer(MemIntrinsic *MI) {
-  unsigned DstAlign = GetOrEnforceKnownAlignment(MI->getOperand(0));
-  unsigned SrcAlign = GetOrEnforceKnownAlignment(MI->getOperand(1));
+  unsigned DstAlign = GetOrEnforceKnownAlignment(MI->getOperand(1));
+  unsigned SrcAlign = GetOrEnforceKnownAlignment(MI->getOperand(2));
   unsigned MinAlign = std::min(DstAlign, SrcAlign);
   unsigned CopyAlign = MI->getAlignment();
 
@@ -122,7 +122,7 @@
   
   // If MemCpyInst length is 1/2/4/8 bytes then replace memcpy with
   // load/store.
-  ConstantInt *MemOpLength = dyn_cast<ConstantInt>(MI->getOperand(2));
+  ConstantInt *MemOpLength = dyn_cast<ConstantInt>(MI->getOperand(3));
   if (MemOpLength == 0) return 0;
   
   // Source and destination pointer types are always "i8*" for intrinsic.  See
@@ -137,9 +137,9 @@
   
   // Use an integer load+store unless we can find something better.
   unsigned SrcAddrSp =
-    cast<PointerType>(MI->getOperand(1)->getType())->getAddressSpace();
+    cast<PointerType>(MI->getOperand(2)->getType())->getAddressSpace();
   unsigned DstAddrSp =
-    cast<PointerType>(MI->getOperand(0)->getType())->getAddressSpace();
+    cast<PointerType>(MI->getOperand(1)->getType())->getAddressSpace();
 
   const IntegerType* IntType = IntegerType::get(MI->getContext(), Size<<3);
   Type *NewSrcPtrTy = PointerType::get(IntType, SrcAddrSp);
@@ -151,8 +151,8 @@
   // an i64 load+store, here because this improves the odds that the source or
   // dest address will be promotable.  See if we can find a better type than the
   // integer datatype.
-  Value *StrippedDest = MI->getOperand(0)->stripPointerCasts();
-  if (StrippedDest != MI->getOperand(0)) {
+  Value *StrippedDest = MI->getOperand(1)->stripPointerCasts();
+  if (StrippedDest != MI->getOperand(1)) {
     const Type *SrcETy = cast<PointerType>(StrippedDest->getType())
                                     ->getElementType();
     if (TD && SrcETy->isSized() && TD->getTypeStoreSize(SrcETy) == Size) {
@@ -186,15 +186,15 @@
   SrcAlign = std::max(SrcAlign, CopyAlign);
   DstAlign = std::max(DstAlign, CopyAlign);
   
-  Value *Src = Builder->CreateBitCast(MI->getOperand(1), NewSrcPtrTy);
-  Value *Dest = Builder->CreateBitCast(MI->getOperand(0), NewDstPtrTy);
+  Value *Src = Builder->CreateBitCast(MI->getOperand(2), NewSrcPtrTy);
+  Value *Dest = Builder->CreateBitCast(MI->getOperand(1), NewDstPtrTy);
   Instruction *L = new LoadInst(Src, "tmp", MI->isVolatile(), SrcAlign);
   InsertNewInstBefore(L, *MI);
   InsertNewInstBefore(new StoreInst(L, Dest, MI->isVolatile(), DstAlign),
                       *MI);
 
   // Set the size of the copy to 0, it will be deleted on the next iteration.
-  MI->setOperand(2, Constant::getNullValue(MemOpLength->getType()));
+  MI->setOperand(3, Constant::getNullValue(MemOpLength->getType()));
   return MI;
 }
 
@@ -258,7 +258,7 @@
   
   IntrinsicInst *II = dyn_cast<IntrinsicInst>(&CI);
   if (!II) return visitCallSite(&CI);
-
+  
   // Intrinsics cannot occur in an invoke, so handle them here instead of in
   // visitCallSite.
   if (MemIntrinsic *MI = dyn_cast<MemIntrinsic>(II)) {
@@ -282,12 +282,12 @@
     if (MemMoveInst *MMI = dyn_cast<MemMoveInst>(MI)) {
       if (GlobalVariable *GVSrc = dyn_cast<GlobalVariable>(MMI->getSource()))
         if (GVSrc->isConstant()) {
-          Module *M = MMI->getParent()->getParent()->getParent();
+          Module *M = CI.getParent()->getParent()->getParent();
           Intrinsic::ID MemCpyID = Intrinsic::memcpy;
-          const Type *Tys[3] = { CI.getOperand(0)->getType(),
-                                 CI.getOperand(1)->getType(),
-                                 CI.getOperand(2)->getType() };
-          MMI->setCalledFunction(
+          const Type *Tys[3] = { CI.getOperand(1)->getType(),
+                                 CI.getOperand(2)->getType(),
+                                 CI.getOperand(3)->getType() };
+          CI.setOperand(0, 
                         Intrinsic::getDeclaration(M, MemCpyID, Tys, 3));
           Changed = true;
         }
@@ -297,19 +297,21 @@
       // memmove(x,x,size) -> noop.
       if (MTI->getSource() == MTI->getDest())
         return EraseInstFromFunction(CI);
+    }
 
-      // If we can determine a pointer alignment that is bigger than currently
-      // set, update the alignment.
-      if (Instruction *I = SimplifyMemTransfer(MTI))
+    // If we can determine a pointer alignment that is bigger than currently
+    // set, update the alignment.
+    if (isa<MemTransferInst>(MI)) {
+      if (Instruction *I = SimplifyMemTransfer(MI))
         return I;
     } else if (MemSetInst *MSI = dyn_cast<MemSetInst>(MI)) {
       if (Instruction *I = SimplifyMemSet(MSI))
         return I;
     }
-
+          
     if (Changed) return II;
   }
-
+  
   switch (II->getIntrinsicID()) {
   default: break;
   case Intrinsic::objectsize: {
@@ -317,10 +319,10 @@
     if (!TD) break;
     
     const Type *ReturnTy = CI.getType();
-    bool Min = (cast<ConstantInt>(II->getOperand(1))->getZExtValue() == 1);
+    bool Min = (cast<ConstantInt>(II->getOperand(2))->getZExtValue() == 1);
 
     // Get to the real allocated thing and offset as fast as possible.
-    Value *Op1 = II->getOperand(0)->stripPointerCasts();
+    Value *Op1 = II->getOperand(1)->stripPointerCasts();
     
     // If we've stripped down to a single global variable that we
     // can know the size of then just return that.
@@ -388,6 +390,7 @@
       
       Constant *RetVal = ConstantInt::get(ReturnTy, Size-Offset);
       return ReplaceInstUsesWith(CI, RetVal);
+      
     } 
 
     // Do not return "I don't know" here. Later optimization passes could
@@ -396,45 +399,45 @@
   }
   case Intrinsic::bswap:
     // bswap(bswap(x)) -> x
-    if (IntrinsicInst *Operand = dyn_cast<IntrinsicInst>(II->getOperand(0)))
+    if (IntrinsicInst *Operand = dyn_cast<IntrinsicInst>(II->getOperand(1)))
       if (Operand->getIntrinsicID() == Intrinsic::bswap)
-        return ReplaceInstUsesWith(CI, Operand->getOperand(0));
+        return ReplaceInstUsesWith(CI, Operand->getOperand(1));
       
     // bswap(trunc(bswap(x))) -> trunc(lshr(x, c))
-    if (TruncInst *TI = dyn_cast<TruncInst>(II->getOperand(0))) {
+    if (TruncInst *TI = dyn_cast<TruncInst>(II->getOperand(1))) {
       if (IntrinsicInst *Operand = dyn_cast<IntrinsicInst>(TI->getOperand(0)))
         if (Operand->getIntrinsicID() == Intrinsic::bswap) {
           unsigned C = Operand->getType()->getPrimitiveSizeInBits() -
                        TI->getType()->getPrimitiveSizeInBits();
           Value *CV = ConstantInt::get(Operand->getType(), C);
-          Value *V = Builder->CreateLShr(Operand->getOperand(0), CV);
+          Value *V = Builder->CreateLShr(Operand->getOperand(1), CV);
           return new TruncInst(V, TI->getType());
         }
     }
       
     break;
   case Intrinsic::powi:
-    if (ConstantInt *Power = dyn_cast<ConstantInt>(II->getOperand(1))) {
+    if (ConstantInt *Power = dyn_cast<ConstantInt>(II->getOperand(2))) {
       // powi(x, 0) -> 1.0
       if (Power->isZero())
         return ReplaceInstUsesWith(CI, ConstantFP::get(CI.getType(), 1.0));
       // powi(x, 1) -> x
       if (Power->isOne())
-        return ReplaceInstUsesWith(CI, II->getOperand(0));
+        return ReplaceInstUsesWith(CI, II->getOperand(1));
       // powi(x, -1) -> 1/x
       if (Power->isAllOnesValue())
         return BinaryOperator::CreateFDiv(ConstantFP::get(CI.getType(), 1.0),
-                                          II->getOperand(0));
+                                          II->getOperand(1));
     }
     break;
   case Intrinsic::cttz: {
     // If all bits below the first known one are known zero,
     // this value is constant.
-    const IntegerType *IT = cast<IntegerType>(II->getOperand(0)->getType());
+    const IntegerType *IT = cast<IntegerType>(II->getOperand(1)->getType());
     uint32_t BitWidth = IT->getBitWidth();
     APInt KnownZero(BitWidth, 0);
     APInt KnownOne(BitWidth, 0);
-    ComputeMaskedBits(II->getOperand(0), APInt::getAllOnesValue(BitWidth),
+    ComputeMaskedBits(II->getOperand(1), APInt::getAllOnesValue(BitWidth),
                       KnownZero, KnownOne);
     unsigned TrailingZeros = KnownOne.countTrailingZeros();
     APInt Mask(APInt::getLowBitsSet(BitWidth, TrailingZeros));
@@ -447,11 +450,11 @@
   case Intrinsic::ctlz: {
     // If all bits above the first known one are known zero,
     // this value is constant.
-    const IntegerType *IT = cast<IntegerType>(II->getOperand(0)->getType());
+    const IntegerType *IT = cast<IntegerType>(II->getOperand(1)->getType());
     uint32_t BitWidth = IT->getBitWidth();
     APInt KnownZero(BitWidth, 0);
     APInt KnownOne(BitWidth, 0);
-    ComputeMaskedBits(II->getOperand(0), APInt::getAllOnesValue(BitWidth),
+    ComputeMaskedBits(II->getOperand(1), APInt::getAllOnesValue(BitWidth),
                       KnownZero, KnownOne);
     unsigned LeadingZeros = KnownOne.countLeadingZeros();
     APInt Mask(APInt::getHighBitsSet(BitWidth, LeadingZeros));
@@ -462,8 +465,8 @@
     }
     break;
   case Intrinsic::uadd_with_overflow: {
-    Value *LHS = II->getOperand(0), *RHS = II->getOperand(1);
-    const IntegerType *IT = cast<IntegerType>(II->getOperand(0)->getType());
+    Value *LHS = II->getOperand(1), *RHS = II->getOperand(2);
+    const IntegerType *IT = cast<IntegerType>(II->getOperand(1)->getType());
     uint32_t BitWidth = IT->getBitWidth();
     APInt Mask = APInt::getSignBit(BitWidth);
     APInt LHSKnownZero(BitWidth, 0);
@@ -507,19 +510,19 @@
   // FALL THROUGH uadd into sadd
   case Intrinsic::sadd_with_overflow:
     // Canonicalize constants into the RHS.
-    if (isa<Constant>(II->getOperand(0)) &&
-        !isa<Constant>(II->getOperand(1))) {
-      Value *LHS = II->getOperand(0);
-      II->setOperand(0, II->getOperand(1));
-      II->setOperand(1, LHS);
+    if (isa<Constant>(II->getOperand(1)) &&
+        !isa<Constant>(II->getOperand(2))) {
+      Value *LHS = II->getOperand(1);
+      II->setOperand(1, II->getOperand(2));
+      II->setOperand(2, LHS);
       return II;
     }
 
     // X + undef -> undef
-    if (isa<UndefValue>(II->getOperand(1)))
+    if (isa<UndefValue>(II->getOperand(2)))
       return ReplaceInstUsesWith(CI, UndefValue::get(II->getType()));
       
-    if (ConstantInt *RHS = dyn_cast<ConstantInt>(II->getOperand(1))) {
+    if (ConstantInt *RHS = dyn_cast<ConstantInt>(II->getOperand(2))) {
       // X + 0 -> {X, false}
       if (RHS->isZero()) {
         Constant *V[] = {
@@ -527,7 +530,7 @@
           ConstantInt::getFalse(II->getContext())
         };
         Constant *Struct = ConstantStruct::get(II->getContext(), V, 2, false);
-        return InsertValueInst::Create(Struct, II->getOperand(0), 0);
+        return InsertValueInst::Create(Struct, II->getOperand(1), 0);
       }
     }
     break;
@@ -535,38 +538,38 @@
   case Intrinsic::ssub_with_overflow:
     // undef - X -> undef
     // X - undef -> undef
-    if (isa<UndefValue>(II->getOperand(0)) ||
-        isa<UndefValue>(II->getOperand(1)))
+    if (isa<UndefValue>(II->getOperand(1)) ||
+        isa<UndefValue>(II->getOperand(2)))
       return ReplaceInstUsesWith(CI, UndefValue::get(II->getType()));
       
-    if (ConstantInt *RHS = dyn_cast<ConstantInt>(II->getOperand(1))) {
+    if (ConstantInt *RHS = dyn_cast<ConstantInt>(II->getOperand(2))) {
       // X - 0 -> {X, false}
       if (RHS->isZero()) {
         Constant *V[] = {
-          UndefValue::get(II->getOperand(0)->getType()),
+          UndefValue::get(II->getOperand(1)->getType()),
           ConstantInt::getFalse(II->getContext())
         };
         Constant *Struct = ConstantStruct::get(II->getContext(), V, 2, false);
-        return InsertValueInst::Create(Struct, II->getOperand(0), 0);
+        return InsertValueInst::Create(Struct, II->getOperand(1), 0);
       }
     }
     break;
   case Intrinsic::umul_with_overflow:
   case Intrinsic::smul_with_overflow:
     // Canonicalize constants into the RHS.
-    if (isa<Constant>(II->getOperand(0)) &&
-        !isa<Constant>(II->getOperand(1))) {
-      Value *LHS = II->getOperand(0);
-      II->setOperand(0, II->getOperand(1));
-      II->setOperand(1, LHS);
+    if (isa<Constant>(II->getOperand(1)) &&
+        !isa<Constant>(II->getOperand(2))) {
+      Value *LHS = II->getOperand(1);
+      II->setOperand(1, II->getOperand(2));
+      II->setOperand(2, LHS);
       return II;
     }
 
     // X * undef -> undef
-    if (isa<UndefValue>(II->getOperand(1)))
+    if (isa<UndefValue>(II->getOperand(2)))
       return ReplaceInstUsesWith(CI, UndefValue::get(II->getType()));
       
-    if (ConstantInt *RHSI = dyn_cast<ConstantInt>(II->getOperand(1))) {
+    if (ConstantInt *RHSI = dyn_cast<ConstantInt>(II->getOperand(2))) {
       // X*0 -> {0, false}
       if (RHSI->isZero())
         return ReplaceInstUsesWith(CI, Constant::getNullValue(II->getType()));
@@ -574,11 +577,11 @@
       // X * 1 -> {X, false}
       if (RHSI->equalsInt(1)) {
         Constant *V[] = {
-          UndefValue::get(II->getOperand(0)->getType()),
+          UndefValue::get(II->getOperand(1)->getType()),
           ConstantInt::getFalse(II->getContext())
         };
         Constant *Struct = ConstantStruct::get(II->getContext(), V, 2, false);
-        return InsertValueInst::Create(Struct, II->getOperand(0), 0);
+        return InsertValueInst::Create(Struct, II->getOperand(1), 0);
       }
     }
     break;
@@ -589,8 +592,8 @@
   case Intrinsic::x86_sse2_loadu_dq:
     // Turn PPC lvx     -> load if the pointer is known aligned.
     // Turn X86 loadups -> load if the pointer is known aligned.
-    if (GetOrEnforceKnownAlignment(II->getOperand(0), 16) >= 16) {
-      Value *Ptr = Builder->CreateBitCast(II->getOperand(0),
+    if (GetOrEnforceKnownAlignment(II->getOperand(1), 16) >= 16) {
+      Value *Ptr = Builder->CreateBitCast(II->getOperand(1),
                                          PointerType::getUnqual(II->getType()));
       return new LoadInst(Ptr);
     }
@@ -598,22 +601,22 @@
   case Intrinsic::ppc_altivec_stvx:
   case Intrinsic::ppc_altivec_stvxl:
     // Turn stvx -> store if the pointer is known aligned.
-    if (GetOrEnforceKnownAlignment(II->getOperand(1), 16) >= 16) {
+    if (GetOrEnforceKnownAlignment(II->getOperand(2), 16) >= 16) {
       const Type *OpPtrTy = 
-        PointerType::getUnqual(II->getOperand(0)->getType());
-      Value *Ptr = Builder->CreateBitCast(II->getOperand(1), OpPtrTy);
-      return new StoreInst(II->getOperand(0), Ptr);
+        PointerType::getUnqual(II->getOperand(1)->getType());
+      Value *Ptr = Builder->CreateBitCast(II->getOperand(2), OpPtrTy);
+      return new StoreInst(II->getOperand(1), Ptr);
     }
     break;
   case Intrinsic::x86_sse_storeu_ps:
   case Intrinsic::x86_sse2_storeu_pd:
   case Intrinsic::x86_sse2_storeu_dq:
     // Turn X86 storeu -> store if the pointer is known aligned.
-    if (GetOrEnforceKnownAlignment(II->getOperand(0), 16) >= 16) {
+    if (GetOrEnforceKnownAlignment(II->getOperand(1), 16) >= 16) {
       const Type *OpPtrTy = 
-        PointerType::getUnqual(II->getOperand(1)->getType());
-      Value *Ptr = Builder->CreateBitCast(II->getOperand(0), OpPtrTy);
-      return new StoreInst(II->getOperand(1), Ptr);
+        PointerType::getUnqual(II->getOperand(2)->getType());
+      Value *Ptr = Builder->CreateBitCast(II->getOperand(1), OpPtrTy);
+      return new StoreInst(II->getOperand(2), Ptr);
     }
     break;
     
@@ -621,12 +624,12 @@
     // These intrinsics only demands the 0th element of its input vector.  If
     // we can simplify the input based on that, do so now.
     unsigned VWidth =
-      cast<VectorType>(II->getOperand(0)->getType())->getNumElements();
+      cast<VectorType>(II->getOperand(1)->getType())->getNumElements();
     APInt DemandedElts(VWidth, 1);
     APInt UndefElts(VWidth, 0);
-    if (Value *V = SimplifyDemandedVectorElts(II->getOperand(0), DemandedElts,
+    if (Value *V = SimplifyDemandedVectorElts(II->getOperand(1), DemandedElts,
                                               UndefElts)) {
-      II->setOperand(0, V);
+      II->setOperand(1, V);
       return II;
     }
     break;
@@ -634,7 +637,7 @@
     
   case Intrinsic::ppc_altivec_vperm:
     // Turn vperm(V1,V2,mask) -> shuffle(V1,V2,mask) if mask is a constant.
-    if (ConstantVector *Mask = dyn_cast<ConstantVector>(II->getOperand(2))) {
+    if (ConstantVector *Mask = dyn_cast<ConstantVector>(II->getOperand(3))) {
       assert(Mask->getNumOperands() == 16 && "Bad type for intrinsic!");
       
       // Check that all of the elements are integer constants or undefs.
@@ -649,8 +652,8 @@
       
       if (AllEltsOk) {
         // Cast the input vectors to byte vectors.
-        Value *Op0 = Builder->CreateBitCast(II->getOperand(0), Mask->getType());
-        Value *Op1 = Builder->CreateBitCast(II->getOperand(1), Mask->getType());
+        Value *Op0 = Builder->CreateBitCast(II->getOperand(1), Mask->getType());
+        Value *Op1 = Builder->CreateBitCast(II->getOperand(2), Mask->getType());
         Value *Result = UndefValue::get(Op0->getType());
         
         // Only extract each element once.
@@ -683,7 +686,7 @@
   case Intrinsic::stackrestore: {
     // If the save is right next to the restore, remove the restore.  This can
     // happen when variable allocas are DCE'd.
-    if (IntrinsicInst *SS = dyn_cast<IntrinsicInst>(II->getOperand(0))) {
+    if (IntrinsicInst *SS = dyn_cast<IntrinsicInst>(II->getOperand(1))) {
       if (SS->getIntrinsicID() == Intrinsic::stacksave) {
         BasicBlock::iterator BI = SS;
         if (&*++BI == II)
@@ -840,7 +843,7 @@
                UndefValue::get(Type::getInt1PtrTy(Callee->getContext())),
                   CS.getInstruction());
 
-    // If CS does not return void then replaceAllUsesWith undef.
+    // If CS dues not return void then replaceAllUsesWith undef.
     // This allows ValueHandlers and custom metadata to adjust itself.
     if (!CS.getInstruction()->getType()->isVoidTy())
       CS.getInstruction()->
@@ -1134,7 +1137,7 @@
   IntrinsicInst *Tramp =
     cast<IntrinsicInst>(cast<BitCastInst>(Callee)->getOperand(0));
 
-  Function *NestF = cast<Function>(Tramp->getOperand(1)->stripPointerCasts());
+  Function *NestF = cast<Function>(Tramp->getOperand(2)->stripPointerCasts());
   const PointerType *NestFPTy = cast<PointerType>(NestF->getType());
   const FunctionType *NestFTy = cast<FunctionType>(NestFPTy->getElementType());
 
@@ -1175,7 +1178,7 @@
         do {
           if (Idx == NestIdx) {
             // Add the chain argument and attributes.
-            Value *NestVal = Tramp->getOperand(2);
+            Value *NestVal = Tramp->getOperand(3);
             if (NestVal->getType() != NestTy)
               NestVal = new BitCastInst(NestVal, NestTy, "nest", Caller);
             NewArgs.push_back(NestVal);

Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp Thu Apr 15 07:46:56 2010
@@ -1423,7 +1423,7 @@
       switch (II->getIntrinsicID()) {
       case Intrinsic::bswap:
         Worklist.Add(II);
-        ICI.setOperand(0, II->getOperand(0));
+        ICI.setOperand(0, II->getOperand(1));
         ICI.setOperand(1, ConstantInt::get(II->getContext(), RHSV.byteSwap()));
         return &ICI;
       case Intrinsic::ctlz:
@@ -1431,7 +1431,7 @@
         // ctz(A) == bitwidth(a)  ->  A == 0 and likewise for !=
         if (RHSV == RHS->getType()->getBitWidth()) {
           Worklist.Add(II);
-          ICI.setOperand(0, II->getOperand(0));
+          ICI.setOperand(0, II->getOperand(1));
           ICI.setOperand(1, ConstantInt::get(RHS->getType(), 0));
           return &ICI;
         }
@@ -1440,7 +1440,7 @@
         // popcount(A) == 0  ->  A == 0 and likewise for !=
         if (RHS->isZero()) {
           Worklist.Add(II);
-          ICI.setOperand(0, II->getOperand(0));
+          ICI.setOperand(0, II->getOperand(1));
           ICI.setOperand(1, RHS);
           return &ICI;
         }

Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp Thu Apr 15 07:46:56 2010
@@ -404,7 +404,7 @@
           isPowerOf2_32(BitWidth) && Log2_32(BitWidth) == Op1C->getZExtValue()){
         bool isCtPop = II->getIntrinsicID() == Intrinsic::ctpop;
         Constant *RHS = ConstantInt::getSigned(Op0->getType(), isCtPop ? -1:0);
-        Value *Cmp = Builder->CreateICmpEQ(II->getOperand(0), RHS);
+        Value *Cmp = Builder->CreateICmpEQ(II->getOperand(1), RHS);
         return new ZExtInst(Cmp, II->getType());
       }
     }

Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp Thu Apr 15 07:46:56 2010
@@ -732,10 +732,10 @@
           // the right place.
           Instruction *NewVal;
           if (InputBit > ResultBit)
-            NewVal = BinaryOperator::CreateLShr(II->getOperand(0),
+            NewVal = BinaryOperator::CreateLShr(I->getOperand(1),
                     ConstantInt::get(I->getType(), InputBit-ResultBit));
           else
-            NewVal = BinaryOperator::CreateShl(II->getOperand(0),
+            NewVal = BinaryOperator::CreateShl(I->getOperand(1),
                     ConstantInt::get(I->getType(), ResultBit-InputBit));
           NewVal->takeName(I);
           return InsertNewInstBefore(NewVal, *I);
@@ -1052,12 +1052,12 @@
     case Intrinsic::x86_sse2_mul_sd:
     case Intrinsic::x86_sse2_min_sd:
     case Intrinsic::x86_sse2_max_sd:
-      TmpV = SimplifyDemandedVectorElts(II->getOperand(0), DemandedElts,
-                                        UndefElts, Depth+1);
-      if (TmpV) { II->setOperand(0, TmpV); MadeChange = true; }
       TmpV = SimplifyDemandedVectorElts(II->getOperand(1), DemandedElts,
-                                        UndefElts2, Depth+1);
+                                        UndefElts, Depth+1);
       if (TmpV) { II->setOperand(1, TmpV); MadeChange = true; }
+      TmpV = SimplifyDemandedVectorElts(II->getOperand(2), DemandedElts,
+                                        UndefElts2, Depth+1);
+      if (TmpV) { II->setOperand(2, TmpV); MadeChange = true; }
 
       // If only the low elt is demanded and this is a scalarizable intrinsic,
       // scalarize it now.
@@ -1069,8 +1069,8 @@
         case Intrinsic::x86_sse2_sub_sd:
         case Intrinsic::x86_sse2_mul_sd:
           // TODO: Lower MIN/MAX/ABS/etc
-          Value *LHS = II->getOperand(0);
-          Value *RHS = II->getOperand(1);
+          Value *LHS = II->getOperand(1);
+          Value *RHS = II->getOperand(2);
           // Extract the element as scalars.
           LHS = InsertNewInstBefore(ExtractElementInst::Create(LHS, 
             ConstantInt::get(Type::getInt32Ty(I->getContext()), 0U)), *II);

Modified: llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp Thu Apr 15 07:46:56 2010
@@ -711,7 +711,7 @@
 }
 
 Instruction *InstCombiner::visitFree(Instruction &FI) {
-  Value *Op = FI.getOperand(0);
+  Value *Op = FI.getOperand(1);
 
   // free undef -> unreachable.
   if (isa<UndefValue>(Op)) {
@@ -896,7 +896,7 @@
   if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(Agg)) {
     // We're extracting from an intrinsic, see if we're the only user, which
     // allows us to simplify multiple result intrinsics to simpler things that
-    // just get one value.
+    // just get one value..
     if (II->hasOneUse()) {
       // Check if we're grabbing the overflow bit or the result of a 'with
       // overflow' intrinsic.  If it's the latter we can remove the intrinsic
@@ -905,7 +905,7 @@
       case Intrinsic::uadd_with_overflow:
       case Intrinsic::sadd_with_overflow:
         if (*EV.idx_begin() == 0) {  // Normal result.
-          Value *LHS = II->getOperand(0), *RHS = II->getOperand(1);
+          Value *LHS = II->getOperand(1), *RHS = II->getOperand(2);
           II->replaceAllUsesWith(UndefValue::get(II->getType()));
           EraseInstFromFunction(*II);
           return BinaryOperator::CreateAdd(LHS, RHS);
@@ -914,7 +914,7 @@
       case Intrinsic::usub_with_overflow:
       case Intrinsic::ssub_with_overflow:
         if (*EV.idx_begin() == 0) {  // Normal result.
-          Value *LHS = II->getOperand(0), *RHS = II->getOperand(1);
+          Value *LHS = II->getOperand(1), *RHS = II->getOperand(2);
           II->replaceAllUsesWith(UndefValue::get(II->getType()));
           EraseInstFromFunction(*II);
           return BinaryOperator::CreateSub(LHS, RHS);
@@ -923,7 +923,7 @@
       case Intrinsic::umul_with_overflow:
       case Intrinsic::smul_with_overflow:
         if (*EV.idx_begin() == 0) {  // Normal result.
-          Value *LHS = II->getOperand(0), *RHS = II->getOperand(1);
+          Value *LHS = II->getOperand(1), *RHS = II->getOperand(2);
           II->replaceAllUsesWith(UndefValue::get(II->getType()));
           EraseInstFromFunction(*II);
           return BinaryOperator::CreateMul(LHS, RHS);

Modified: llvm/trunk/lib/Transforms/Instrumentation/ProfilingUtils.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Instrumentation/ProfilingUtils.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Instrumentation/ProfilingUtils.cpp (original)
+++ llvm/trunk/lib/Transforms/Instrumentation/ProfilingUtils.cpp Thu Apr 15 07:46:56 2010
@@ -73,10 +73,10 @@
     if (AI->getType() != ArgVTy) {
       Instruction::CastOps opcode = CastInst::getCastOpcode(AI, false, ArgVTy, 
                                                             false);
-      InitCall->setOperand(1, 
+      InitCall->setOperand(2, 
           CastInst::Create(opcode, AI, ArgVTy, "argv.cast", InitCall));
     } else {
-      InitCall->setOperand(1, AI);
+      InitCall->setOperand(2, AI);
     }
     /* FALL THROUGH */
 
@@ -93,12 +93,12 @@
       }
       opcode = CastInst::getCastOpcode(AI, true,
                                        Type::getInt32Ty(Context), true);
-      InitCall->setOperand(0, 
+      InitCall->setOperand(1, 
           CastInst::Create(opcode, AI, Type::getInt32Ty(Context),
                            "argc.cast", InitCall));
     } else {
       AI->replaceAllUsesWith(InitCall);
-      InitCall->setOperand(0, AI);
+      InitCall->setOperand(1, AI);
     }
 
   case 0: break;

Modified: llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp Thu Apr 15 07:46:56 2010
@@ -123,14 +123,14 @@
   if (StoreInst *SI = dyn_cast<StoreInst>(I))
     return SI->getPointerOperand();
   if (MemIntrinsic *MI = dyn_cast<MemIntrinsic>(I))
-    return MI->getOperand(0);
+    return MI->getOperand(1);
   
   switch (cast<IntrinsicInst>(I)->getIntrinsicID()) {
   default: assert(false && "Unexpected intrinsic!");
   case Intrinsic::init_trampoline:
-    return I->getOperand(0);
-  case Intrinsic::lifetime_end:
     return I->getOperand(1);
+  case Intrinsic::lifetime_end:
+    return I->getOperand(2);
   }
 }
 
@@ -152,7 +152,7 @@
     case Intrinsic::init_trampoline:
       return -1u;
     case Intrinsic::lifetime_end:
-      Len = I->getOperand(0);
+      Len = I->getOperand(1);
       break;
     }
   }
@@ -287,7 +287,7 @@
 
 /// handleFreeWithNonTrivialDependency - Handle frees of entire structures whose
 /// dependency is a store to a field of that structure.
-bool DSE::handleFreeWithNonTrivialDependency(/*FIXME: Call*/Instruction *F, MemDepResult Dep) {
+bool DSE::handleFreeWithNonTrivialDependency(Instruction *F, MemDepResult Dep) {
   AliasAnalysis &AA = getAnalysis<AliasAnalysis>();
   
   Instruction *Dependency = Dep.getInst();
@@ -297,7 +297,7 @@
   Value *DepPointer = getPointerOperand(Dependency)->getUnderlyingObject();
 
   // Check for aliasing.
-  if (AA.alias(F->getOperand(0), 1, DepPointer, 1) !=
+  if (AA.alias(F->getOperand(1), 1, DepPointer, 1) !=
          AliasAnalysis::MustAlias)
     return false;
   

Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Thu Apr 15 07:46:56 2010
@@ -271,7 +271,7 @@
   e.function = C->getCalledFunction();
   e.opcode = Expression::CALL;
 
-  for (CallInst::op_iterator I = C->op_begin(), E = C->op_end() - 1;
+  for (CallInst::op_iterator I = C->op_begin()+1, E = C->op_end();
        I != E; ++I)
     e.varargs.push_back(lookup_or_add(*I));
 
@@ -452,7 +452,7 @@
         return nextValueNumber++;
       }
 
-      for (unsigned i = 0, e = C->getNumOperands() - 1; i < e; ++i) {
+      for (unsigned i = 1; i < C->getNumOperands(); ++i) {
         uint32_t c_vn = lookup_or_add(C->getOperand(i));
         uint32_t cd_vn = lookup_or_add(local_cdep->getOperand(i));
         if (c_vn != cd_vn) {
@@ -508,7 +508,7 @@
       valueNumbering[C] = nextValueNumber;
       return nextValueNumber++;
     }
-    for (unsigned i = 0, e = C->getNumOperands() - 1; i < e; ++i) {
+    for (unsigned i = 1; i < C->getNumOperands(); ++i) {
       uint32_t c_vn = lookup_or_add(C->getOperand(i));
       uint32_t cd_vn = lookup_or_add(cdep->getOperand(i));
       if (c_vn != cd_vn) {

Modified: llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp Thu Apr 15 07:46:56 2010
@@ -744,7 +744,7 @@
   const Type *ArgTys[3] = { M->getRawDest()->getType(),
                             M->getRawSource()->getType(),
                             M->getLength()->getType() };
-  M->setCalledFunction(Intrinsic::getDeclaration(Mod, Intrinsic::memcpy, ArgTys, 3));
+  M->setOperand(0,Intrinsic::getDeclaration(Mod, Intrinsic::memcpy, ArgTys, 3));
 
   // MemDep may have over conservative information about this instruction, just
   // conservatively flush it from the cache.

Modified: llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp Thu Apr 15 07:46:56 2010
@@ -254,7 +254,7 @@
     if (Instruction *TheCopy = isOnlyCopiedFromConstantGlobal(AI)) {
       DEBUG(dbgs() << "Found alloca equal to global: " << *AI << '\n');
       DEBUG(dbgs() << "  memcpy = " << *TheCopy << '\n');
-      Constant *TheSrc = cast<Constant>(TheCopy->getOperand(1));
+      Constant *TheSrc = cast<Constant>(TheCopy->getOperand(2));
       AI->replaceAllUsesWith(ConstantExpr::getBitCast(TheSrc, AI->getType()));
       TheCopy->eraseFromParent();  // Don't mutate the global.
       AI->eraseFromParent();
@@ -404,11 +404,11 @@
       isSafeGEP(GEPI, AI, GEPOffset, Info);
       if (!Info.isUnsafe)
         isSafeForScalarRepl(GEPI, AI, GEPOffset, Info);
-    } else if (MemIntrinsic *MI = dyn_cast<MemIntrinsic>(User)) {
+    } else if (MemIntrinsic *MI = dyn_cast<MemIntrinsic>(UI)) {
       ConstantInt *Length = dyn_cast<ConstantInt>(MI->getLength());
       if (Length)
         isSafeMemAccess(AI, Offset, Length->getZExtValue(), 0,
-                        UI.getOperandNo() == 0, Info);
+                        UI.getOperandNo() == 1, Info);
       else
         MarkUnsafe(Info);
     } else if (LoadInst *LI = dyn_cast<LoadInst>(User)) {
@@ -756,7 +756,7 @@
   }
   
   // Process each element of the aggregate.
-  Value *TheFn = MI->getCalledValue();
+  Value *TheFn = MI->getOperand(0);
   const Type *BytePtrTy = MI->getRawDest()->getType();
   bool SROADest = MI->getRawDest() == Inst;
   
@@ -814,7 +814,7 @@
       // If the stored element is zero (common case), just store a null
       // constant.
       Constant *StoreVal;
-      if (ConstantInt *CI = dyn_cast<ConstantInt>(MI->getOperand(1))) {
+      if (ConstantInt *CI = dyn_cast<ConstantInt>(MI->getOperand(2))) {
         if (CI->isZero()) {
           StoreVal = Constant::getNullValue(EltTy);  // 0.0, null, 0, <0,0>
         } else {
@@ -877,7 +877,7 @@
       Value *Ops[] = {
         SROADest ? EltPtr : OtherElt,  // Dest ptr
         SROADest ? OtherElt : EltPtr,  // Src ptr
-        ConstantInt::get(MI->getOperand(2)->getType(), EltSize), // Size
+        ConstantInt::get(MI->getOperand(3)->getType(), EltSize), // Size
         // Align
         ConstantInt::get(Type::getInt32Ty(MI->getContext()), OtherEltAlign),
         MI->getVolatileCst()
@@ -892,8 +892,8 @@
     } else {
       assert(isa<MemSetInst>(MI));
       Value *Ops[] = {
-        EltPtr, MI->getOperand(1),  // Dest, Value,
-        ConstantInt::get(MI->getOperand(2)->getType(), EltSize), // Size
+        EltPtr, MI->getOperand(2),  // Dest, Value,
+        ConstantInt::get(MI->getOperand(3)->getType(), EltSize), // Size
         Zero,  // Align
         ConstantInt::get(Type::getInt1Ty(MI->getContext()), 0) // isVolatile
       };
@@ -1737,12 +1737,12 @@
     if (isOffset) return false;
 
     // If the memintrinsic isn't using the alloca as the dest, reject it.
-    if (UI.getOperandNo() != 0) return false;
+    if (UI.getOperandNo() != 1) return false;
     
     MemIntrinsic *MI = cast<MemIntrinsic>(U);
     
     // If the source of the memcpy/move is not a constant global, reject it.
-    if (!PointsToConstantGlobal(MI->getOperand(1)))
+    if (!PointsToConstantGlobal(MI->getOperand(2)))
       return false;
     
     // Otherwise, the transform is safe.  Remember the copy instruction.

Modified: llvm/trunk/lib/Transforms/Scalar/SimplifyLibCalls.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/SimplifyLibCalls.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/SimplifyLibCalls.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/SimplifyLibCalls.cpp Thu Apr 15 07:46:56 2010
@@ -110,8 +110,8 @@
       return 0;
 
     // Extract some information from the instruction
-    Value *Dst = CI->getOperand(0);
-    Value *Src = CI->getOperand(1);
+    Value *Dst = CI->getOperand(1);
+    Value *Src = CI->getOperand(2);
 
     // See if we can get the length of the input string.
     uint64_t Len = GetStringLength(Src);
@@ -162,12 +162,12 @@
       return 0;
 
     // Extract some information from the instruction
-    Value *Dst = CI->getOperand(0);
-    Value *Src = CI->getOperand(1);
+    Value *Dst = CI->getOperand(1);
+    Value *Src = CI->getOperand(2);
     uint64_t Len;
 
     // We don't do anything if length is not constant
-    if (ConstantInt *LengthArg = dyn_cast<ConstantInt>(CI->getOperand(2)))
+    if (ConstantInt *LengthArg = dyn_cast<ConstantInt>(CI->getOperand(3)))
       Len = LengthArg->getZExtValue();
     else
       return 0;
@@ -207,11 +207,11 @@
         FT->getParamType(0) != FT->getReturnType())
       return 0;
 
-    Value *SrcStr = CI->getOperand(0);
+    Value *SrcStr = CI->getOperand(1);
 
     // If the second operand is non-constant, see if we can compute the length
     // of the input string and turn this into memchr.
-    ConstantInt *CharC = dyn_cast<ConstantInt>(CI->getOperand(1));
+    ConstantInt *CharC = dyn_cast<ConstantInt>(CI->getOperand(2));
     if (CharC == 0) {
       // These optimizations require TargetData.
       if (!TD) return 0;
@@ -220,7 +220,7 @@
       if (Len == 0 || !FT->getParamType(1)->isIntegerTy(32))// memchr needs i32.
         return 0;
 
-      return EmitMemChr(SrcStr, CI->getOperand(1), // include nul.
+      return EmitMemChr(SrcStr, CI->getOperand(2), // include nul.
                         ConstantInt::get(TD->getIntPtrType(*Context), Len),
                         B, TD);
     }
@@ -265,7 +265,7 @@
         FT->getParamType(0) != Type::getInt8PtrTy(*Context))
       return 0;
 
-    Value *Str1P = CI->getOperand(0), *Str2P = CI->getOperand(1);
+    Value *Str1P = CI->getOperand(1), *Str2P = CI->getOperand(2);
     if (Str1P == Str2P)      // strcmp(x,x)  -> 0
       return ConstantInt::get(CI->getType(), 0);
 
@@ -314,13 +314,13 @@
         !FT->getParamType(2)->isIntegerTy())
       return 0;
 
-    Value *Str1P = CI->getOperand(0), *Str2P = CI->getOperand(1);
+    Value *Str1P = CI->getOperand(1), *Str2P = CI->getOperand(2);
     if (Str1P == Str2P)      // strncmp(x,x,n)  -> 0
       return ConstantInt::get(CI->getType(), 0);
 
     // Get the length argument if it is constant.
     uint64_t Length;
-    if (ConstantInt *LengthArg = dyn_cast<ConstantInt>(CI->getOperand(2)))
+    if (ConstantInt *LengthArg = dyn_cast<ConstantInt>(CI->getOperand(3)))
       Length = LengthArg->getZExtValue();
     else
       return 0;
@@ -365,7 +365,7 @@
         FT->getParamType(0) != Type::getInt8PtrTy(*Context))
       return 0;
 
-    Value *Dst = CI->getOperand(0), *Src = CI->getOperand(1);
+    Value *Dst = CI->getOperand(1), *Src = CI->getOperand(2);
     if (Dst == Src)      // strcpy(x,x)  -> x
       return Src;
 
@@ -381,7 +381,7 @@
     if (OptChkCall)
       EmitMemCpyChk(Dst, Src,
                     ConstantInt::get(TD->getIntPtrType(*Context), Len),
-                    CI->getOperand(2), B, TD);
+                    CI->getOperand(3), B, TD);
     else
       EmitMemCpy(Dst, Src,
                  ConstantInt::get(TD->getIntPtrType(*Context), Len),
@@ -402,9 +402,9 @@
         !FT->getParamType(2)->isIntegerTy())
       return 0;
 
-    Value *Dst = CI->getOperand(0);
-    Value *Src = CI->getOperand(1);
-    Value *LenOp = CI->getOperand(2);
+    Value *Dst = CI->getOperand(1);
+    Value *Src = CI->getOperand(2);
+    Value *LenOp = CI->getOperand(3);
 
     // See if we can get the length of the input string.
     uint64_t SrcLen = GetStringLength(Src);
@@ -452,7 +452,7 @@
         !FT->getReturnType()->isIntegerTy())
       return 0;
 
-    Value *Src = CI->getOperand(0);
+    Value *Src = CI->getOperand(1);
 
     // Constant folding: strlen("xyz") -> 3
     if (uint64_t Len = GetStringLength(Src))
@@ -477,7 +477,7 @@
         !FT->getParamType(1)->isPointerTy())
       return 0;
 
-    Value *EndPtr = CI->getOperand(1);
+    Value *EndPtr = CI->getOperand(2);
     if (isa<ConstantPointerNull>(EndPtr)) {
       CI->setOnlyReadsMemory();
       CI->addAttribute(1, Attribute::NoCapture);
@@ -500,17 +500,17 @@
       return 0;
 
     // fold strstr(x, x) -> x.
-    if (CI->getOperand(0) == CI->getOperand(1))
-      return B.CreateBitCast(CI->getOperand(0), CI->getType());
+    if (CI->getOperand(1) == CI->getOperand(2))
+      return B.CreateBitCast(CI->getOperand(1), CI->getType());
 
     // See if either input string is a constant string.
     std::string SearchStr, ToFindStr;
-    bool HasStr1 = GetConstantStringInfo(CI->getOperand(0), SearchStr);
-    bool HasStr2 = GetConstantStringInfo(CI->getOperand(1), ToFindStr);
+    bool HasStr1 = GetConstantStringInfo(CI->getOperand(1), SearchStr);
+    bool HasStr2 = GetConstantStringInfo(CI->getOperand(2), ToFindStr);
 
     // fold strstr(x, "") -> x.
     if (HasStr2 && ToFindStr.empty())
-      return B.CreateBitCast(CI->getOperand(0), CI->getType());
+      return B.CreateBitCast(CI->getOperand(1), CI->getType());
 
     // If both strings are known, constant fold it.
     if (HasStr1 && HasStr2) {
@@ -520,14 +520,14 @@
         return Constant::getNullValue(CI->getType());
 
       // strstr("abcd", "bc") -> gep((char*)"abcd", 1)
-      Value *Result = CastToCStr(CI->getOperand(0), B);
+      Value *Result = CastToCStr(CI->getOperand(1), B);
       Result = B.CreateConstInBoundsGEP1_64(Result, Offset, "strstr");
       return B.CreateBitCast(Result, CI->getType());
     }
 
     // fold strstr(x, "y") -> strchr(x, 'y').
     if (HasStr2 && ToFindStr.size() == 1)
-      return B.CreateBitCast(EmitStrChr(CI->getOperand(0), ToFindStr[0], B, TD),
+      return B.CreateBitCast(EmitStrChr(CI->getOperand(1), ToFindStr[0], B, TD),
                              CI->getType());
     return 0;
   }
@@ -545,13 +545,13 @@
         !FT->getReturnType()->isIntegerTy(32))
       return 0;
 
-    Value *LHS = CI->getOperand(0), *RHS = CI->getOperand(1);
+    Value *LHS = CI->getOperand(1), *RHS = CI->getOperand(2);
 
     if (LHS == RHS)  // memcmp(s,s,x) -> 0
       return Constant::getNullValue(CI->getType());
 
     // Make sure we have a constant length.
-    ConstantInt *LenC = dyn_cast<ConstantInt>(CI->getOperand(2));
+    ConstantInt *LenC = dyn_cast<ConstantInt>(CI->getOperand(3));
     if (!LenC) return 0;
     uint64_t Len = LenC->getZExtValue();
 
@@ -595,9 +595,9 @@
       return 0;
 
     // memcpy(x, y, n) -> llvm.memcpy(x, y, n, 1)
-    EmitMemCpy(CI->getOperand(0), CI->getOperand(1),
-               CI->getOperand(2), 1, false, B, TD);
-    return CI->getOperand(0);
+    EmitMemCpy(CI->getOperand(1), CI->getOperand(2),
+               CI->getOperand(3), 1, false, B, TD);
+    return CI->getOperand(1);
   }
 };
 
@@ -617,9 +617,9 @@
       return 0;
 
     // memmove(x, y, n) -> llvm.memmove(x, y, n, 1)
-    EmitMemMove(CI->getOperand(0), CI->getOperand(1),
-                CI->getOperand(2), 1, false, B, TD);
-    return CI->getOperand(0);
+    EmitMemMove(CI->getOperand(1), CI->getOperand(2),
+                CI->getOperand(3), 1, false, B, TD);
+    return CI->getOperand(1);
   }
 };
 
@@ -639,10 +639,10 @@
       return 0;
 
     // memset(p, v, n) -> llvm.memset(p, v, n, 1)
-    Value *Val = B.CreateIntCast(CI->getOperand(1), Type::getInt8Ty(*Context),
-				 false);
-    EmitMemSet(CI->getOperand(0), Val,  CI->getOperand(2), false, B, TD);
-    return CI->getOperand(0);
+    Value *Val = B.CreateIntCast(CI->getOperand(2), Type::getInt8Ty(*Context),
+                                 false);
+    EmitMemSet(CI->getOperand(1), Val,  CI->getOperand(3), false, B, TD);
+    return CI->getOperand(1);
   }
 };
 
@@ -663,7 +663,7 @@
         !FT->getParamType(0)->isFloatingPointTy())
       return 0;
 
-    Value *Op1 = CI->getOperand(0), *Op2 = CI->getOperand(1);
+    Value *Op1 = CI->getOperand(1), *Op2 = CI->getOperand(2);
     if (ConstantFP *Op1C = dyn_cast<ConstantFP>(Op1)) {
       if (Op1C->isExactlyValue(1.0))  // pow(1.0, x) -> 1.0
         return Op1C;
@@ -717,7 +717,7 @@
         !FT->getParamType(0)->isFloatingPointTy())
       return 0;
 
-    Value *Op = CI->getOperand(0);
+    Value *Op = CI->getOperand(1);
     // Turn exp2(sitofp(x)) -> ldexp(1.0, sext(x))  if sizeof(x) <= 32
     // Turn exp2(uitofp(x)) -> ldexp(1.0, zext(x))  if sizeof(x) < 32
     Value *LdExpArg = 0;
@@ -769,7 +769,7 @@
       return 0;
 
     // If this is something like 'floor((double)floatval)', convert to floorf.
-    FPExtInst *Cast = dyn_cast<FPExtInst>(CI->getOperand(0));
+    FPExtInst *Cast = dyn_cast<FPExtInst>(CI->getOperand(1));
     if (Cast == 0 || !Cast->getOperand(0)->getType()->isFloatTy())
       return 0;
 
@@ -798,7 +798,7 @@
         !FT->getParamType(0)->isIntegerTy())
       return 0;
 
-    Value *Op = CI->getOperand(0);
+    Value *Op = CI->getOperand(1);
 
     // Constant fold.
     if (ConstantInt *CI = dyn_cast<ConstantInt>(Op)) {
@@ -834,7 +834,7 @@
       return 0;
 
     // isdigit(c) -> (c-'0') <u 10
-    Value *Op = CI->getOperand(0);
+    Value *Op = CI->getOperand(1);
     Op = B.CreateSub(Op, ConstantInt::get(Type::getInt32Ty(*Context), '0'),
                      "isdigittmp");
     Op = B.CreateICmpULT(Op, ConstantInt::get(Type::getInt32Ty(*Context), 10),
@@ -855,7 +855,7 @@
       return 0;
 
     // isascii(c) -> c <u 128
-    Value *Op = CI->getOperand(0);
+    Value *Op = CI->getOperand(1);
     Op = B.CreateICmpULT(Op, ConstantInt::get(Type::getInt32Ty(*Context), 128),
                          "isascii");
     return B.CreateZExt(Op, CI->getType());
@@ -874,7 +874,7 @@
       return 0;
 
     // abs(x) -> x >s -1 ? x : -x
-    Value *Op = CI->getOperand(0);
+    Value *Op = CI->getOperand(1);
     Value *Pos = B.CreateICmpSGT(Op,
                              Constant::getAllOnesValue(Op->getType()),
                                  "ispos");
@@ -896,7 +896,7 @@
       return 0;
 
     // isascii(c) -> c & 0x7f
-    return B.CreateAnd(CI->getOperand(0),
+    return B.CreateAnd(CI->getOperand(1),
                        ConstantInt::get(CI->getType(),0x7F));
   }
 };
@@ -919,7 +919,7 @@
 
     // Check for a fixed format string.
     std::string FormatStr;
-    if (!GetConstantStringInfo(CI->getOperand(0), FormatStr))
+    if (!GetConstantStringInfo(CI->getOperand(1), FormatStr))
       return 0;
 
     // Empty format string -> noop.
@@ -951,10 +951,10 @@
     }
 
     // Optimize specific format strings.
-    // printf("%c", chr) --> putchar(chr)
+    // printf("%c", chr) --> putchar(*(i8*)dst)
     if (FormatStr == "%c" && CI->getNumOperands() > 2 &&
-        CI->getOperand(1)->getType()->isIntegerTy()) {
-      Value *Res = EmitPutChar(CI->getOperand(1), B, TD);
+        CI->getOperand(2)->getType()->isIntegerTy()) {
+      Value *Res = EmitPutChar(CI->getOperand(2), B, TD);
 
       if (CI->use_empty()) return CI;
       return B.CreateIntCast(Res, CI->getType(), true);
@@ -962,9 +962,9 @@
 
     // printf("%s\n", str) --> puts(str)
     if (FormatStr == "%s\n" && CI->getNumOperands() > 2 &&
-        CI->getOperand(1)->getType()->isPointerTy() &&
+        CI->getOperand(2)->getType()->isPointerTy() &&
         CI->use_empty()) {
-      EmitPutS(CI->getOperand(1), B, TD);
+      EmitPutS(CI->getOperand(2), B, TD);
       return CI;
     }
     return 0;
@@ -985,7 +985,7 @@
 
     // Check for a fixed format string.
     std::string FormatStr;
-    if (!GetConstantStringInfo(CI->getOperand(1), FormatStr))
+    if (!GetConstantStringInfo(CI->getOperand(2), FormatStr))
       return 0;
 
     // If we just have a format string (nothing else crazy) transform it.
@@ -1000,7 +1000,7 @@
       if (!TD) return 0;
 
       // sprintf(str, fmt) -> llvm.memcpy(str, fmt, strlen(fmt)+1, 1)
-      EmitMemCpy(CI->getOperand(0), CI->getOperand(1), // Copy the nul byte.
+      EmitMemCpy(CI->getOperand(1), CI->getOperand(2), // Copy the nul byte.
                  ConstantInt::get(TD->getIntPtrType(*Context),
                  FormatStr.size()+1), 1, false, B, TD);
       return ConstantInt::get(CI->getType(), FormatStr.size());
@@ -1014,10 +1014,10 @@
     // Decode the second character of the format string.
     if (FormatStr[1] == 'c') {
       // sprintf(dst, "%c", chr) --> *(i8*)dst = chr; *((i8*)dst+1) = 0
-      if (!CI->getOperand(2)->getType()->isIntegerTy()) return 0;
-      Value *V = B.CreateTrunc(CI->getOperand(2),
+      if (!CI->getOperand(3)->getType()->isIntegerTy()) return 0;
+      Value *V = B.CreateTrunc(CI->getOperand(3),
                                Type::getInt8Ty(*Context), "char");
-      Value *Ptr = CastToCStr(CI->getOperand(0), B);
+      Value *Ptr = CastToCStr(CI->getOperand(1), B);
       B.CreateStore(V, Ptr);
       Ptr = B.CreateGEP(Ptr, ConstantInt::get(Type::getInt32Ty(*Context), 1),
                         "nul");
@@ -1031,13 +1031,13 @@
       if (!TD) return 0;
 
       // sprintf(dest, "%s", str) -> llvm.memcpy(dest, str, strlen(str)+1, 1)
-      if (!CI->getOperand(2)->getType()->isPointerTy()) return 0;
+      if (!CI->getOperand(3)->getType()->isPointerTy()) return 0;
 
-      Value *Len = EmitStrLen(CI->getOperand(2), B, TD);
+      Value *Len = EmitStrLen(CI->getOperand(3), B, TD);
       Value *IncLen = B.CreateAdd(Len,
                                   ConstantInt::get(Len->getType(), 1),
                                   "leninc");
-      EmitMemCpy(CI->getOperand(0), CI->getOperand(2), IncLen, 1, false, B, TD);
+      EmitMemCpy(CI->getOperand(1), CI->getOperand(3), IncLen, 1, false, B, TD);
 
       // The sprintf result is the unincremented number of bytes in the string.
       return B.CreateIntCast(Len, CI->getType(), false);
@@ -1061,8 +1061,8 @@
       return 0;
 
     // Get the element size and count.
-    ConstantInt *SizeC = dyn_cast<ConstantInt>(CI->getOperand(1));
-    ConstantInt *CountC = dyn_cast<ConstantInt>(CI->getOperand(2));
+    ConstantInt *SizeC = dyn_cast<ConstantInt>(CI->getOperand(2));
+    ConstantInt *CountC = dyn_cast<ConstantInt>(CI->getOperand(3));
     if (!SizeC || !CountC) return 0;
     uint64_t Bytes = SizeC->getZExtValue()*CountC->getZExtValue();
 
@@ -1072,8 +1072,8 @@
 
     // If this is writing one byte, turn it into fputc.
     if (Bytes == 1) {  // fwrite(S,1,1,F) -> fputc(S[0],F)
-      Value *Char = B.CreateLoad(CastToCStr(CI->getOperand(0), B), "char");
-      EmitFPutC(Char, CI->getOperand(3), B, TD);
+      Value *Char = B.CreateLoad(CastToCStr(CI->getOperand(1), B), "char");
+      EmitFPutC(Char, CI->getOperand(4), B, TD);
       return ConstantInt::get(CI->getType(), 1);
     }
 
@@ -1097,11 +1097,11 @@
       return 0;
 
     // fputs(s,F) --> fwrite(s,1,strlen(s),F)
-    uint64_t Len = GetStringLength(CI->getOperand(0));
+    uint64_t Len = GetStringLength(CI->getOperand(1));
     if (!Len) return 0;
-    EmitFWrite(CI->getOperand(0),
+    EmitFWrite(CI->getOperand(1),
                ConstantInt::get(TD->getIntPtrType(*Context), Len-1),
-               CI->getOperand(1), B, TD);
+               CI->getOperand(2), B, TD);
     return CI;  // Known to have no uses (see above).
   }
 };
@@ -1120,7 +1120,7 @@
 
     // All the optimizations depend on the format string.
     std::string FormatStr;
-    if (!GetConstantStringInfo(CI->getOperand(1), FormatStr))
+    if (!GetConstantStringInfo(CI->getOperand(2), FormatStr))
       return 0;
 
     // fprintf(F, "foo") --> fwrite("foo", 3, 1, F)
@@ -1132,10 +1132,10 @@
       // These optimizations require TargetData.
       if (!TD) return 0;
 
-      EmitFWrite(CI->getOperand(1),
+      EmitFWrite(CI->getOperand(2),
                  ConstantInt::get(TD->getIntPtrType(*Context),
                                   FormatStr.size()),
-                 CI->getOperand(0), B, TD);
+                 CI->getOperand(1), B, TD);
       return ConstantInt::get(CI->getType(), FormatStr.size());
     }
 
@@ -1146,17 +1146,17 @@
 
     // Decode the second character of the format string.
     if (FormatStr[1] == 'c') {
-      // fprintf(F, "%c", chr) --> fputc(chr, F)
-      if (!CI->getOperand(2)->getType()->isIntegerTy()) return 0;
-      EmitFPutC(CI->getOperand(2), CI->getOperand(0), B, TD);
+      // fprintf(F, "%c", chr) --> *(i8*)dst = chr
+      if (!CI->getOperand(3)->getType()->isIntegerTy()) return 0;
+      EmitFPutC(CI->getOperand(3), CI->getOperand(1), B, TD);
       return ConstantInt::get(CI->getType(), 1);
     }
 
     if (FormatStr[1] == 's') {
-      // fprintf(F, "%s", str) --> fputs(str, F)
-      if (!CI->getOperand(2)->getType()->isPointerTy() || !CI->use_empty())
+      // fprintf(F, "%s", str) -> fputs(str, F)
+      if (!CI->getOperand(3)->getType()->isPointerTy() || !CI->use_empty())
         return 0;
-      EmitFPutS(CI->getOperand(2), CI->getOperand(0), B, TD);
+      EmitFPutS(CI->getOperand(3), CI->getOperand(1), B, TD);
       return CI;
     }
     return 0;

Modified: llvm/trunk/lib/Transforms/Scalar/TailRecursionElimination.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/TailRecursionElimination.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/TailRecursionElimination.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/TailRecursionElimination.cpp Thu Apr 15 07:46:56 2010
@@ -250,7 +250,7 @@
     // If we are passing this argument into call as the corresponding
     // argument operand, then the argument is dynamically constant.
     // Otherwise, we cannot transform this function safely.
-    if (CI->getOperand(ArgNo) == Arg)
+    if (CI->getOperand(ArgNo+1) == Arg)
       return true;
   }
 
@@ -442,7 +442,7 @@
   // required PHI nodes, add entries into the PHI node for the actual
   // parameters passed into the tail-recursive call.
   for (unsigned i = 0, e = CI->getNumOperands()-1; i != e; ++i)
-    ArgumentPHIs[i]->addIncoming(CI->getOperand(i), BB);
+    ArgumentPHIs[i]->addIncoming(CI->getOperand(i+1), BB);
 
   // If we are introducing an accumulator variable to eliminate the recursion,
   // do so now.  Note that we _know_ that no subsequent tail recursion

Modified: llvm/trunk/lib/Transforms/Utils/AddrModeMatcher.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/AddrModeMatcher.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Utils/AddrModeMatcher.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/AddrModeMatcher.cpp Thu Apr 15 07:46:56 2010
@@ -382,7 +382,7 @@
   std::vector<InlineAsm::ConstraintInfo>
   Constraints = IA->ParseConstraints();
   
-  unsigned ArgNo = 0;   // ArgNo - The operand of the CallInst.
+  unsigned ArgNo = 1;   // ArgNo - The operand of the CallInst.
   for (unsigned i = 0, e = Constraints.size(); i != e; ++i) {
     TargetLowering::AsmOperandInfo OpInfo(Constraints[i]);
     
@@ -450,7 +450,7 @@
     
     if (CallInst *CI = dyn_cast<CallInst>(U)) {
       InlineAsm *IA = dyn_cast<InlineAsm>(CI->getCalledValue());
-      if (!IA) return true;
+      if (IA == 0) return true;
       
       // If this is a memory operand, we're cool, otherwise bail out.
       if (!IsOperandAMemoryOperand(CI, IA, I, TLI))

Modified: llvm/trunk/lib/Transforms/Utils/BuildLibCalls.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/BuildLibCalls.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Utils/BuildLibCalls.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/BuildLibCalls.cpp Thu Apr 15 07:46:56 2010
@@ -395,11 +395,11 @@
         FT->getParamType(2) != TD->getIntPtrType(Context) ||
         FT->getParamType(3) != TD->getIntPtrType(Context))
       return false;
-
-    if (isFoldable(3, 2, false)) {
-      EmitMemCpy(CI->getOperand(0), CI->getOperand(1), CI->getOperand(2),
+    
+    if (isFoldable(4, 3, false)) {
+      EmitMemCpy(CI->getOperand(1), CI->getOperand(2), CI->getOperand(3),
                  1, false, B, TD);
-      replaceCall(CI->getOperand(0));
+      replaceCall(CI->getOperand(1));
       return true;
     }
     return false;
@@ -418,11 +418,11 @@
         FT->getParamType(2) != TD->getIntPtrType(Context) ||
         FT->getParamType(3) != TD->getIntPtrType(Context))
       return false;
-
-    if (isFoldable(3, 2, false)) {
-      EmitMemMove(CI->getOperand(0), CI->getOperand(1), CI->getOperand(2),
+    
+    if (isFoldable(4, 3, false)) {
+      EmitMemMove(CI->getOperand(1), CI->getOperand(2), CI->getOperand(3),
                   1, false, B, TD);
-      replaceCall(CI->getOperand(0));
+      replaceCall(CI->getOperand(1));
       return true;
     }
     return false;
@@ -436,12 +436,12 @@
         FT->getParamType(2) != TD->getIntPtrType(Context) ||
         FT->getParamType(3) != TD->getIntPtrType(Context))
       return false;
-
-    if (isFoldable(3, 2, false)) {
-      Value *Val = B.CreateIntCast(CI->getOperand(1), B.getInt8Ty(),
+    
+    if (isFoldable(4, 3, false)) {
+      Value *Val = B.CreateIntCast(CI->getOperand(2), B.getInt8Ty(),
                                    false);
-      EmitMemSet(CI->getOperand(0), Val,  CI->getOperand(2), false, B, TD);
-      replaceCall(CI->getOperand(0));
+      EmitMemSet(CI->getOperand(1), Val,  CI->getOperand(3), false, B, TD);
+      replaceCall(CI->getOperand(1));
       return true;
     }
     return false;
@@ -462,8 +462,8 @@
     // st[rp]cpy_chk call which may fail at runtime if the size is too long.
     // TODO: It might be nice to get a maximum length out of the possible
     // string lengths for varying.
-    if (isFoldable(2, 1, true)) {
-      Value *Ret = EmitStrCpy(CI->getOperand(0), CI->getOperand(1), B, TD,
+    if (isFoldable(3, 2, true)) {
+      Value *Ret = EmitStrCpy(CI->getOperand(1), CI->getOperand(2), B, TD,
                               Name.substr(2, 6));
       replaceCall(Ret);
       return true;
@@ -479,10 +479,10 @@
         !FT->getParamType(2)->isIntegerTy() ||
         FT->getParamType(3) != TD->getIntPtrType(Context))
       return false;
-
-    if (isFoldable(3, 2, false)) {
-      Value *Ret = EmitStrNCpy(CI->getOperand(0), CI->getOperand(1),
-                               CI->getOperand(2), B, TD, Name.substr(2, 7));
+    
+    if (isFoldable(4, 3, false)) {
+      Value *Ret = EmitStrNCpy(CI->getOperand(1), CI->getOperand(2),
+                               CI->getOperand(3), B, TD, Name.substr(2, 7));
       replaceCall(Ret);
       return true;
     }

Modified: llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp Thu Apr 15 07:46:56 2010
@@ -66,7 +66,7 @@
     
     // Next, create the new invoke instruction, inserting it at the end
     // of the old basic block.
-    SmallVector<Value*, 8> InvokeArgs(CI->op_begin(), CI->op_end() - 1);
+    SmallVector<Value*, 8> InvokeArgs(CI->op_begin()+1, CI->op_end());
     InvokeInst *II =
       InvokeInst::Create(CI->getCalledValue(), Split, InvokeDest,
                          InvokeArgs.begin(), InvokeArgs.end(),

Modified: llvm/trunk/lib/VMCore/AsmWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/AsmWriter.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/AsmWriter.cpp (original)
+++ llvm/trunk/lib/VMCore/AsmWriter.cpp Thu Apr 15 07:46:56 2010
@@ -1847,7 +1847,6 @@
     default: Out << " cc" << CI->getCallingConv(); break;
     }
 
-    Operand = CI->getCalledValue();
     const PointerType    *PTy = cast<PointerType>(Operand->getType());
     const FunctionType   *FTy = cast<FunctionType>(PTy->getElementType());
     const Type         *RetTy = FTy->getReturnType();
@@ -1871,10 +1870,10 @@
       writeOperand(Operand, true);
     }
     Out << '(';
-    for (unsigned op = 0, Eop = CI->getNumOperands() - 1; op < Eop; ++op) {
-      if (op > 0)
+    for (unsigned op = 1, Eop = I.getNumOperands(); op < Eop; ++op) {
+      if (op > 1)
         Out << ", ";
-      writeParamOperand(CI->getOperand(op), PAL.getParamAttributes(op + 1));
+      writeParamOperand(I.getOperand(op), PAL.getParamAttributes(op));
     }
     Out << ')';
     if (PAL.getFnAttributes() != Attribute::None)
@@ -1918,10 +1917,10 @@
       writeOperand(Operand, true);
     }
     Out << '(';
-    for (unsigned op = 0, Eop = II->getNumOperands() - 3; op < Eop; ++op) {
+    for (unsigned op = 0, Eop = I.getNumOperands() - 3; op < Eop; ++op) {
       if (op)
         Out << ", ";
-      writeParamOperand(II->getOperand(op), PAL.getParamAttributes(op + 1));
+      writeParamOperand(I.getOperand(op), PAL.getParamAttributes(op + 1));
     }
 
     Out << ')';

Modified: llvm/trunk/lib/VMCore/AutoUpgrade.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/AutoUpgrade.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/AutoUpgrade.cpp (original)
+++ llvm/trunk/lib/VMCore/AutoUpgrade.cpp Thu Apr 15 07:46:56 2010
@@ -338,11 +338,11 @@
     if (isLoadH || isLoadL || isMovL || isMovSD || isShufPD ||
         isUnpckhPD || isUnpcklPD || isPunpckhQPD || isPunpcklQPD) {
       std::vector<Constant*> Idxs;
-      Value *Op0 = CI->getOperand(0);
+      Value *Op0 = CI->getOperand(1);
       ShuffleVectorInst *SI = NULL;
       if (isLoadH || isLoadL) {
         Value *Op1 = UndefValue::get(Op0->getType());
-        Value *Addr = new BitCastInst(CI->getOperand(1), 
+        Value *Addr = new BitCastInst(CI->getOperand(2), 
                                   Type::getDoublePtrTy(C),
                                       "upgraded.", CI);
         Value *Load = new LoadInst(Addr, "upgraded.", false, 8, CI);
@@ -375,7 +375,7 @@
         SI = new ShuffleVectorInst(ZeroV, Op0, Mask, "upgraded.", CI);
       } else if (isMovSD ||
                  isUnpckhPD || isUnpcklPD || isPunpckhQPD || isPunpcklQPD) {
-        Value *Op1 = CI->getOperand(1);
+        Value *Op1 = CI->getOperand(2);
         if (isMovSD) {
           Idxs.push_back(ConstantInt::get(Type::getInt32Ty(C), 2));
           Idxs.push_back(ConstantInt::get(Type::getInt32Ty(C), 1));
@@ -389,8 +389,8 @@
         Value *Mask = ConstantVector::get(Idxs);
         SI = new ShuffleVectorInst(Op0, Op1, Mask, "upgraded.", CI);
       } else if (isShufPD) {
-        Value *Op1 = CI->getOperand(1);
-        unsigned MaskVal = cast<ConstantInt>(CI->getOperand(2))->getZExtValue();
+        Value *Op1 = CI->getOperand(2);
+        unsigned MaskVal = cast<ConstantInt>(CI->getOperand(3))->getZExtValue();
         Idxs.push_back(ConstantInt::get(Type::getInt32Ty(C), MaskVal & 1));
         Idxs.push_back(ConstantInt::get(Type::getInt32Ty(C),
                                                ((MaskVal >> 1) & 1)+2));
@@ -410,8 +410,8 @@
       CI->eraseFromParent();
     } else if (F->getName() == "llvm.x86.sse41.pmulld") {
       // Upgrade this set of intrinsics into vector multiplies.
-      Instruction *Mul = BinaryOperator::CreateMul(CI->getOperand(0),
-                                                   CI->getOperand(1),
+      Instruction *Mul = BinaryOperator::CreateMul(CI->getOperand(1),
+                                                   CI->getOperand(2),
                                                    CI->getName(),
                                                    CI);
       // Fix up all the uses with our new multiply.
@@ -438,10 +438,10 @@
   case Intrinsic::x86_mmx_psrl_w: {
     Value *Operands[2];
     
-    Operands[0] = CI->getOperand(0);
+    Operands[0] = CI->getOperand(1);
     
     // Cast the second parameter to the correct type.
-    BitCastInst *BC = new BitCastInst(CI->getOperand(1), 
+    BitCastInst *BC = new BitCastInst(CI->getOperand(2), 
                                       NewFn->getFunctionType()->getParamType(1),
                                       "upgraded.", CI);
     Operands[1] = BC;
@@ -465,9 +465,9 @@
   case Intrinsic::ctlz:
   case Intrinsic::ctpop:
   case Intrinsic::cttz: {
-    //  Build a small vector of the 0..(N-1) operands, which are the 
+    //  Build a small vector of the 1..(N-1) operands, which are the 
     //  parameters.
-    SmallVector<Value*, 8> Operands(CI->op_begin(), CI->op_end() - 1);
+    SmallVector<Value*, 8> Operands(CI->op_begin()+1, CI->op_end());
 
     //  Construct a new CallInst
     CallInst *NewCI = CallInst::Create(NewFn, Operands.begin(), Operands.end(),
@@ -502,7 +502,7 @@
   case Intrinsic::eh_selector:
   case Intrinsic::eh_typeid_for: {
     // Only the return type changed.
-    SmallVector<Value*, 8> Operands(CI->op_begin(), CI->op_end() - 1);
+    SmallVector<Value*, 8> Operands(CI->op_begin() + 1, CI->op_end());
     CallInst *NewCI = CallInst::Create(NewFn, Operands.begin(), Operands.end(),
                                        "upgraded." + CI->getName(), CI);
     NewCI->setTailCall(CI->isTailCall());
@@ -525,8 +525,8 @@
   case Intrinsic::memset: {
     // Add isVolatile
     const llvm::Type *I1Ty = llvm::Type::getInt1Ty(CI->getContext());
-    Value *Operands[5] = { CI->getOperand(0), CI->getOperand(1),
-                           CI->getOperand(2), CI->getOperand(3),
+    Value *Operands[5] = { CI->getOperand(1), CI->getOperand(2),
+                           CI->getOperand(3), CI->getOperand(4),
                            llvm::ConstantInt::get(I1Ty, 0) };
     CallInst *NewCI = CallInst::Create(NewFn, Operands, Operands+5,
                                        CI->getName(), CI);
@@ -608,8 +608,7 @@
   if (Function *Declare = M->getFunction("llvm.dbg.declare")) {
     if (!Declare->use_empty()) {
       DbgDeclareInst *DDI = cast<DbgDeclareInst>(Declare->use_back());
-      if (!isa<MDNode>(DDI->getOperand(0)) ||
-          !isa<MDNode>(DDI->getOperand(1))) {
+      if (!isa<MDNode>(DDI->getOperand(1)) ||!isa<MDNode>(DDI->getOperand(2))) {
         while (!Declare->use_empty()) {
           CallInst *CI = cast<CallInst>(Declare->use_back());
           CI->eraseFromParent();

Modified: llvm/trunk/lib/VMCore/Instructions.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Instructions.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/Instructions.cpp (original)
+++ llvm/trunk/lib/VMCore/Instructions.cpp Thu Apr 15 07:46:56 2010
@@ -33,7 +33,7 @@
 User::op_iterator CallSite::getCallee() const {
   Instruction *II(getInstruction());
   return isCall()
-    ? cast<CallInst>(II)->op_end() - 1 // Skip Function
+    ? cast<CallInst>(II)->op_begin()
     : cast<InvokeInst>(II)->op_end() - 3; // Skip BB, BB, Function
 }
 
@@ -231,7 +231,8 @@
 
 void CallInst::init(Value *Func, Value* const *Params, unsigned NumParams) {
   assert(NumOperands == NumParams+1 && "NumOperands not set up?");
-  Op<-1>() = Func;
+  Use *OL = OperandList;
+  OL[0] = Func;
 
   const FunctionType *FTy =
     cast<FunctionType>(cast<PointerType>(Func->getType())->getElementType());
@@ -240,21 +241,20 @@
   assert((NumParams == FTy->getNumParams() ||
           (FTy->isVarArg() && NumParams > FTy->getNumParams())) &&
          "Calling a function with bad signature!");
-
-  Use *OL = OperandList;
   for (unsigned i = 0; i != NumParams; ++i) {
     assert((i >= FTy->getNumParams() || 
             FTy->getParamType(i) == Params[i]->getType()) &&
            "Calling a function with a bad signature!");
-    OL[i] = Params[i];
+    OL[i+1] = Params[i];
   }
 }
 
 void CallInst::init(Value *Func, Value *Actual1, Value *Actual2) {
   assert(NumOperands == 3 && "NumOperands not set up?");
-  Op<-1>() = Func;
-  Op<0>() = Actual1;
-  Op<1>() = Actual2;
+  Use *OL = OperandList;
+  OL[0] = Func;
+  OL[1] = Actual1;
+  OL[2] = Actual2;
 
   const FunctionType *FTy =
     cast<FunctionType>(cast<PointerType>(Func->getType())->getElementType());
@@ -273,8 +273,9 @@
 
 void CallInst::init(Value *Func, Value *Actual) {
   assert(NumOperands == 2 && "NumOperands not set up?");
-  Op<-1>() = Func;
-  Op<0>() = Actual;
+  Use *OL = OperandList;
+  OL[0] = Func;
+  OL[1] = Actual;
 
   const FunctionType *FTy =
     cast<FunctionType>(cast<PointerType>(Func->getType())->getElementType());
@@ -290,7 +291,8 @@
 
 void CallInst::init(Value *Func) {
   assert(NumOperands == 1 && "NumOperands not set up?");
-  Op<-1>() = Func;
+  Use *OL = OperandList;
+  OL[0] = Func;
 
   const FunctionType *FTy =
     cast<FunctionType>(cast<PointerType>(Func->getType())->getElementType());

Modified: llvm/trunk/lib/VMCore/IntrinsicInst.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/IntrinsicInst.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/IntrinsicInst.cpp (original)
+++ llvm/trunk/lib/VMCore/IntrinsicInst.cpp Thu Apr 15 07:46:56 2010
@@ -54,7 +54,7 @@
 ///
 
 Value *DbgDeclareInst::getAddress() const {
-  if (MDNode* MD = cast_or_null<MDNode>(getOperand(0)))
+  if (MDNode* MD = cast_or_null<MDNode>(getOperand(1)))
     return MD->getOperand(0);
   else
     return NULL;
@@ -65,9 +65,9 @@
 ///
 
 const Value *DbgValueInst::getValue() const {
-  return cast<MDNode>(getOperand(0))->getOperand(0);
+  return cast<MDNode>(getOperand(1))->getOperand(0);
 }
 
 Value *DbgValueInst::getValue() {
-  return cast<MDNode>(getOperand(0))->getOperand(0);
+  return cast<MDNode>(getOperand(1))->getOperand(0);
 }

Modified: llvm/trunk/lib/VMCore/Verifier.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Verifier.cpp?rev=101368&r1=101367&r2=101368&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/Verifier.cpp (original)
+++ llvm/trunk/lib/VMCore/Verifier.cpp Thu Apr 15 07:46:56 2010
@@ -1396,7 +1396,7 @@
     if (Function *F = dyn_cast<Function>(I.getOperand(i))) {
       // Check to make sure that the "address of" an intrinsic function is never
       // taken.
-      Assert1(!F->isIntrinsic() || (i + 1 == e && isa<CallInst>(I)),
+      Assert1(!F->isIntrinsic() || (i == 0 && isa<CallInst>(I)),
               "Cannot take the address of an intrinsic!", &I);
       Assert1(F->getParent() == Mod, "Referencing function in another module!",
               &I);
@@ -1479,8 +1479,7 @@
                 "Instruction does not dominate all uses!", Op, &I);
       }
     } else if (isa<InlineAsm>(I.getOperand(i))) {
-      Assert1((i + 1 == e && isa<CallInst>(I)) ||
-              (i + 3 == e && isa<InvokeInst>(I)),
+      Assert1((i == 0 && isa<CallInst>(I)) || (i + 3 == e && isa<InvokeInst>(I)),
               "Cannot take the address of an inline asm!", &I);
     }
   }
@@ -1615,16 +1614,16 @@
   default:
     break;
   case Intrinsic::dbg_declare: {  // llvm.dbg.declare
-    Assert1(CI.getOperand(0) && isa<MDNode>(CI.getOperand(0)),
+    Assert1(CI.getOperand(1) && isa<MDNode>(CI.getOperand(1)),
                 "invalid llvm.dbg.declare intrinsic call 1", &CI);
-    MDNode *MD = cast<MDNode>(CI.getOperand(0));
+    MDNode *MD = cast<MDNode>(CI.getOperand(1));
     Assert1(MD->getNumOperands() == 1,
                 "invalid llvm.dbg.declare intrinsic call 2", &CI);
   } break;
   case Intrinsic::memcpy:
   case Intrinsic::memmove:
   case Intrinsic::memset:
-    Assert1(isa<ConstantInt>(CI.getOperand(3)),
+    Assert1(isa<ConstantInt>(CI.getOperand(4)),
             "alignment argument of memory intrinsics must be a constant int",
             &CI);
     break;
@@ -1633,10 +1632,10 @@
   case Intrinsic::gcread:
     if (ID == Intrinsic::gcroot) {
       AllocaInst *AI =
-        dyn_cast<AllocaInst>(CI.getOperand(0)->stripPointerCasts());
+        dyn_cast<AllocaInst>(CI.getOperand(1)->stripPointerCasts());
       Assert1(AI && AI->getType()->getElementType()->isPointerTy(),
               "llvm.gcroot parameter #1 must be a pointer alloca.", &CI);
-      Assert1(isa<Constant>(CI.getOperand(1)),
+      Assert1(isa<Constant>(CI.getOperand(2)),
               "llvm.gcroot parameter #2 must be a constant.", &CI);
     }
 
@@ -1644,32 +1643,32 @@
             "Enclosing function does not use GC.", &CI);
     break;
   case Intrinsic::init_trampoline:
-    Assert1(isa<Function>(CI.getOperand(1)->stripPointerCasts()),
+    Assert1(isa<Function>(CI.getOperand(2)->stripPointerCasts()),
             "llvm.init_trampoline parameter #2 must resolve to a function.",
             &CI);
     break;
   case Intrinsic::prefetch:
-    Assert1(isa<ConstantInt>(CI.getOperand(1)) &&
-            isa<ConstantInt>(CI.getOperand(2)) &&
-            cast<ConstantInt>(CI.getOperand(1))->getZExtValue() < 2 &&
-            cast<ConstantInt>(CI.getOperand(2))->getZExtValue() < 4,
+    Assert1(isa<ConstantInt>(CI.getOperand(2)) &&
+            isa<ConstantInt>(CI.getOperand(3)) &&
+            cast<ConstantInt>(CI.getOperand(2))->getZExtValue() < 2 &&
+            cast<ConstantInt>(CI.getOperand(3))->getZExtValue() < 4,
             "invalid arguments to llvm.prefetch",
             &CI);
     break;
   case Intrinsic::stackprotector:
-    Assert1(isa<AllocaInst>(CI.getOperand(1)->stripPointerCasts()),
+    Assert1(isa<AllocaInst>(CI.getOperand(2)->stripPointerCasts()),
             "llvm.stackprotector parameter #2 must resolve to an alloca.",
             &CI);
     break;
   case Intrinsic::lifetime_start:
   case Intrinsic::lifetime_end:
   case Intrinsic::invariant_start:
-    Assert1(isa<ConstantInt>(CI.getOperand(0)),
+    Assert1(isa<ConstantInt>(CI.getOperand(1)),
             "size argument of memory use markers must be a constant integer",
             &CI);
     break;
   case Intrinsic::invariant_end:
-    Assert1(isa<ConstantInt>(CI.getOperand(1)),
+    Assert1(isa<ConstantInt>(CI.getOperand(2)),
             "llvm.invariant.end parameter #2 must be a constant integer", &CI);
     break;
   }




From ggreif at gmail.com  Thu Apr 15 10:14:47 2010
From: ggreif at gmail.com (Gabor Greif)
Date: Thu, 15 Apr 2010 15:14:47 -0000
Subject: [llvm-commits] [llvm] r101371 -
	/llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp
Message-ID: <20100415151447.1F4692A6C12C@llvm.org>

Author: ggreif
Date: Thu Apr 15 10:14:46 2010
New Revision: 101371

URL: http://llvm.org/viewvc/llvm-project?rev=101371&view=rev
Log:
typos

Modified:
    llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp

Modified: llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp?rev=101371&r1=101370&r2=101371&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp (original)
+++ llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp Thu Apr 15 10:14:46 2010
@@ -84,7 +84,7 @@
     }
 
     /// CleanupSelectors - Any remaining eh.selector intrinsic calls which still
-    /// use the ".llvm.eh.catch.all.value" call need to convert to using it's
+    /// use the ".llvm.eh.catch.all.value" call need to convert to using its
     /// initializer instead.
     bool CleanupSelectors();
 
@@ -218,7 +218,7 @@
 }
 
 /// CleanupSelectors - Any remaining eh.selector intrinsic calls which still use
-/// the ".llvm.eh.catch.all.value" call need to convert to using it's
+/// the ".llvm.eh.catch.all.value" call need to convert to using its
 /// initializer instead.
 bool DwarfEHPrepare::CleanupSelectors() {
   if (!EHCatchAllValue) return false;




From snhjordy at gmail.com  Thu Apr 15 05:35:15 2010
From: snhjordy at gmail.com (Jordy)
Date: Thu, 15 Apr 2010 03:35:15 -0700
Subject: [llvm-commits] [patch] v7M architecture and Cortex-M3 instructions
Message-ID: <m2med92f861004150335w269a39a8t84d31f65c821af71@mail.gmail.com>

This patch implements a separate architecture for v7M and support for
the Cortex-M3 processor. LLVM should no longer generate invalid v7M
instructions, and it now generates the v7M-only sdiv and udiv
instructions.

clang requires a separate patch so it doesn't think the Cortex-M3 is a
v7A processor.
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From gohman at apple.com  Thu Apr 15 11:19:09 2010
From: gohman at apple.com (Dan Gohman)
Date: Thu, 15 Apr 2010 16:19:09 -0000
Subject: [llvm-commits] [llvm] r101374 - in /llvm/trunk:
 include/llvm/Analysis/ScalarEvolution.h lib/Analysis/ScalarEvolution.cpp
Message-ID: <20100415161909.1B4F32A6C12C@llvm.org>

Author: djg
Date: Thu Apr 15 11:19:08 2010
New Revision: 101374

URL: http://llvm.org/viewvc/llvm-project?rev=101374&view=rev
Log:
Make getPredecessorWithUniqueSuccessorForBB return the unique successor
in addition to the predecessor.

Modified:
    llvm/trunk/include/llvm/Analysis/ScalarEvolution.h
    llvm/trunk/lib/Analysis/ScalarEvolution.cpp

Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolution.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ScalarEvolution.h?rev=101374&r1=101373&r2=101374&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/ScalarEvolution.h (original)
+++ llvm/trunk/include/llvm/Analysis/ScalarEvolution.h Thu Apr 15 11:19:08 2010
@@ -351,7 +351,8 @@
     /// (which may not be an immediate predecessor) which has exactly one
     /// successor from which BB is reachable, or null if no such block is
     /// found.
-    BasicBlock* getPredecessorWithUniqueSuccessorForBB(BasicBlock *BB);
+    std::pair<BasicBlock *, BasicBlock *>
+    getPredecessorWithUniqueSuccessorForBB(BasicBlock *BB);
 
     /// isImpliedCond - Test whether the condition described by Pred, LHS,
     /// and RHS is true whenever the given Cond value evaluates to true.

Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=101374&r1=101373&r2=101374&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original)
+++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Thu Apr 15 11:19:08 2010
@@ -4654,21 +4654,21 @@
 /// successor from which BB is reachable, or null if no such block is
 /// found.
 ///
-BasicBlock *
+std::pair<BasicBlock *, BasicBlock *>
 ScalarEvolution::getPredecessorWithUniqueSuccessorForBB(BasicBlock *BB) {
   // If the block has a unique predecessor, then there is no path from the
   // predecessor to the block that does not go through the direct edge
   // from the predecessor to the block.
   if (BasicBlock *Pred = BB->getSinglePredecessor())
-    return Pred;
+    return std::make_pair(Pred, BB);
 
   // A loop's header is defined to be a block that dominates the loop.
   // If the header has a unique predecessor outside the loop, it must be
   // a block that has exactly one successor that can reach the loop.
   if (Loop *L = LI->getLoopFor(BB))
-    return getLoopPredecessor(L);
+    return std::make_pair(getLoopPredecessor(L), L->getHeader());
 
-  return 0;
+  return std::pair<BasicBlock *, BasicBlock *>();
 }
 
 /// HasSameValue - SCEV structural equivalence is usually sufficient for
@@ -4852,24 +4852,22 @@
   // (interprocedural conditions notwithstanding).
   if (!L) return false;
 
-  BasicBlock *Predecessor = getLoopPredecessor(L);
-  BasicBlock *PredecessorDest = L->getHeader();
-
   // Starting at the loop predecessor, climb up the predecessor chain, as long
   // as there are predecessors that can be found that have unique successors
   // leading to the original header.
-  for (; Predecessor;
-       PredecessorDest = Predecessor,
-       Predecessor = getPredecessorWithUniqueSuccessorForBB(Predecessor)) {
+  for (std::pair<BasicBlock *, BasicBlock *>
+         Pair(getLoopPredecessor(L), L->getHeader());
+       Pair.first;
+       Pair = getPredecessorWithUniqueSuccessorForBB(Pair.first)) {
 
     BranchInst *LoopEntryPredicate =
-      dyn_cast<BranchInst>(Predecessor->getTerminator());
+      dyn_cast<BranchInst>(Pair.first->getTerminator());
     if (!LoopEntryPredicate ||
         LoopEntryPredicate->isUnconditional())
       continue;
 
     if (isImpliedCond(LoopEntryPredicate->getCondition(), Pred, LHS, RHS,
-                      LoopEntryPredicate->getSuccessor(0) != PredecessorDest))
+                      LoopEntryPredicate->getSuccessor(0) != Pair.second))
       return true;
   }
 




From gohman at apple.com  Thu Apr 15 11:23:27 2010
From: gohman at apple.com (Dan Gohman)
Date: Thu, 15 Apr 2010 16:23:27 -0000
Subject: [llvm-commits] [llvm] r101375 - /llvm/trunk/lib/VMCore/Pass.cpp
Message-ID: <20100415162327.4C0DD2A6C12C@llvm.org>

Author: djg
Date: Thu Apr 15 11:23:27 2010
New Revision: 101375

URL: http://llvm.org/viewvc/llvm-project?rev=101375&view=rev
Log:
Fix namespace polution.

Modified:
    llvm/trunk/lib/VMCore/Pass.cpp

Modified: llvm/trunk/lib/VMCore/Pass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Pass.cpp?rev=101375&r1=101374&r2=101375&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/Pass.cpp (original)
+++ llvm/trunk/lib/VMCore/Pass.cpp Thu Apr 15 11:23:27 2010
@@ -318,6 +318,8 @@
   return PassRegistrarObj;
 }
 
+namespace {
+
 // FIXME: We use ManagedCleanup to erase the pass registrar on shutdown.
 // Unfortunately, passes are registered with static ctors, and having
 // llvm_shutdown clear this map prevents successful ressurection after 
@@ -331,6 +333,8 @@
 }
 ManagedCleanup<&cleanupPassRegistrar> registrarCleanup;
 
+}
+
 // getPassInfo - Return the PassInfo data structure that corresponds to this
 // pass...
 const PassInfo *Pass::getPassInfo() const {




From gohman at apple.com  Thu Apr 15 12:08:50 2010
From: gohman at apple.com (Dan Gohman)
Date: Thu, 15 Apr 2010 17:08:50 -0000
Subject: [llvm-commits] [llvm] r101376 - in /llvm/trunk: lib/Analysis/
 lib/CodeGen/ lib/CodeGen/AsmPrinter/ lib/CodeGen/SelectionDAG/ lib/Support/
 lib/System/ lib/Target/ARM/ lib/Target/PowerPC/ lib/Transforms/Scalar/
 lib/VMCore/ utils/TableGen/
Message-ID: <20100415170850.86B862A6C12C@llvm.org>

Author: djg
Date: Thu Apr 15 12:08:50 2010
New Revision: 101376

URL: http://llvm.org/viewvc/llvm-project?rev=101376&view=rev
Log:
Fix a bunch of namespace polution.

Modified:
    llvm/trunk/lib/Analysis/LoopInfo.cpp
    llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp
    llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
    llvm/trunk/lib/CodeGen/MachineVerifier.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
    llvm/trunk/lib/Support/Debug.cpp
    llvm/trunk/lib/Support/Timer.cpp
    llvm/trunk/lib/System/DynamicLibrary.cpp
    llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp
    llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp
    llvm/trunk/lib/Transforms/Scalar/GVN.cpp
    llvm/trunk/lib/VMCore/Dominators.cpp
    llvm/trunk/lib/VMCore/LLVMContextImpl.cpp
    llvm/trunk/lib/VMCore/LeaksContext.h
    llvm/trunk/utils/TableGen/X86DisassemblerTables.cpp

Modified: llvm/trunk/lib/Analysis/LoopInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/LoopInfo.cpp?rev=101376&r1=101375&r2=101376&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/LoopInfo.cpp (original)
+++ llvm/trunk/lib/Analysis/LoopInfo.cpp Thu Apr 15 12:08:50 2010
@@ -29,9 +29,9 @@
 
 // Always verify loopinfo if expensive checking is enabled.
 #ifdef XDEBUG
-bool VerifyLoopInfo = true;
+static bool VerifyLoopInfo = true;
 #else
-bool VerifyLoopInfo = false;
+static bool VerifyLoopInfo = false;
 #endif
 static cl::opt<bool,true>
 VerifyLoopInfoX("verify-loop-info", cl::location(VerifyLoopInfo),

Modified: llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp?rev=101376&r1=101375&r2=101376&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp (original)
+++ llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp Thu Apr 15 12:08:50 2010
@@ -642,6 +642,8 @@
   llvm_unreachable("Unexpected SCEV type!");
 }
 
+namespace {
+
 /// LoopCompare - Compare loops by PickMostRelevantLoop.
 class LoopCompare {
   DominatorTree &DT;
@@ -668,6 +670,8 @@
   }
 };
 
+}
+
 Value *SCEVExpander::visitAddExpr(const SCEVAddExpr *S) {
   const Type *Ty = SE.getEffectiveSCEVType(S->getType());
 

Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp?rev=101376&r1=101375&r2=101376&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp (original)
+++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp Thu Apr 15 12:08:50 2010
@@ -1331,7 +1331,7 @@
 
 /// isSubprogramContext - Return true if Context is either a subprogram
 /// or another context nested inside a subprogram.
-bool isSubprogramContext(MDNode *Context) {
+static bool isSubprogramContext(MDNode *Context) {
   if (!Context)
     return false;
   DIDescriptor D(Context);

Modified: llvm/trunk/lib/CodeGen/MachineVerifier.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineVerifier.cpp?rev=101376&r1=101375&r2=101376&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineVerifier.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineVerifier.cpp Thu Apr 15 12:08:50 2010
@@ -351,8 +351,8 @@
 }
 
 // Does iterator point to a and b as the first two elements?
-bool matchPair(MachineBasicBlock::const_succ_iterator i,
-               const MachineBasicBlock *a, const MachineBasicBlock *b) {
+static bool matchPair(MachineBasicBlock::const_succ_iterator i,
+                      const MachineBasicBlock *a, const MachineBasicBlock *b) {
   if (*i == a)
     return *++i == b;
   if (*i == b)

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=101376&r1=101375&r2=101376&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Thu Apr 15 12:08:50 2010
@@ -1881,6 +1881,7 @@
   }
 }
 
+namespace {
 
 struct MatchScope {
   /// FailIndex - If this match fails, this is the index to continue with.
@@ -1902,6 +1903,8 @@
   bool HasChainNodesMatched, HasFlagResultNodesMatched;
 };
 
+}
+
 SDNode *SelectionDAGISel::
 SelectCodeCommon(SDNode *NodeToMatch, const unsigned char *MatcherTable,
                  unsigned TableSize) {

Modified: llvm/trunk/lib/Support/Debug.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Debug.cpp?rev=101376&r1=101375&r2=101376&view=diff
==============================================================================
--- llvm/trunk/lib/Support/Debug.cpp (original)
+++ llvm/trunk/lib/Support/Debug.cpp Thu Apr 15 12:08:50 2010
@@ -51,12 +51,19 @@
                 cl::init(0));
 
 static std::string CurrentDebugType;
-static struct DebugOnlyOpt {
+
+namespace {
+
+struct DebugOnlyOpt {
   void operator=(const std::string &Val) const {
     DebugFlag |= !Val.empty();
     CurrentDebugType = Val;
   }
-} DebugOnlyOptLoc;
+};
+
+}
+
+static DebugOnlyOpt DebugOnlyOptLoc;
 
 static cl::opt<DebugOnlyOpt, true, cl::parser<std::string> >
 DebugOnly("debug-only", cl::desc("Enable a specific type of debug output"),

Modified: llvm/trunk/lib/Support/Timer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Timer.cpp?rev=101376&r1=101375&r2=101376&view=diff
==============================================================================
--- llvm/trunk/lib/Support/Timer.cpp (original)
+++ llvm/trunk/lib/Support/Timer.cpp Thu Apr 15 12:08:50 2010
@@ -190,6 +190,8 @@
 //   NamedRegionTimer Implementation
 //===----------------------------------------------------------------------===//
 
+namespace {
+
 typedef StringMap<Timer> Name2TimerMap;
 
 class Name2PairMap {
@@ -216,6 +218,8 @@
   }
 };
 
+}
+
 static ManagedStatic<Name2TimerMap> NamedTimers;
 static ManagedStatic<Name2PairMap> NamedGroupedTimers;
 

Modified: llvm/trunk/lib/System/DynamicLibrary.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/DynamicLibrary.cpp?rev=101376&r1=101375&r2=101376&view=diff
==============================================================================
--- llvm/trunk/lib/System/DynamicLibrary.cpp (original)
+++ llvm/trunk/lib/System/DynamicLibrary.cpp Thu Apr 15 12:08:50 2010
@@ -24,12 +24,18 @@
 // Collection of symbol name/value pairs to be searched prior to any libraries.
 static std::map<std::string, void*> *ExplicitSymbols = 0;
 
-static struct ExplicitSymbolsDeleter {
+namespace {
+
+struct ExplicitSymbolsDeleter {
   ~ExplicitSymbolsDeleter() {
     if (ExplicitSymbols)
       delete ExplicitSymbols;
   }
-} Dummy;
+};
+
+}
+
+static ExplicitSymbolsDeleter Dummy;
 
 void llvm::sys::DynamicLibrary::AddSymbol(const char* symbolName,
                                           void *symbolValue) {

Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp?rev=101376&r1=101375&r2=101376&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Thu Apr 15 12:08:50 2010
@@ -40,7 +40,7 @@
 #include "llvm/Support/CommandLine.h"
 using namespace llvm;
 
-cl::opt<bool>
+static cl::opt<bool>
 ReuseFrameIndexVals("arm-reuse-frame-index-vals", cl::Hidden, cl::init(true),
           cl::desc("Reuse repeated frame index values"));
 

Modified: llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp?rev=101376&r1=101375&r2=101376&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp Thu Apr 15 12:08:50 2010
@@ -56,14 +56,14 @@
 #define ALIGN_STACK 0
 
 // FIXME (64-bit): Eventually enable by default.
-cl::opt<bool> EnablePPC32RS("enable-ppc32-regscavenger",
-                            cl::init(false),
-                            cl::desc("Enable PPC32 register scavenger"),
-                            cl::Hidden);
-cl::opt<bool> EnablePPC64RS("enable-ppc64-regscavenger",
-                            cl::init(false),
-                            cl::desc("Enable PPC64 register scavenger"),
-                            cl::Hidden);
+static cl::opt<bool> EnablePPC32RS("enable-ppc32-regscavenger",
+                                   cl::init(false),
+                                   cl::desc("Enable PPC32 register scavenger"),
+                                   cl::Hidden);
+static cl::opt<bool> EnablePPC64RS("enable-ppc64-regscavenger",
+                                   cl::init(false),
+                                   cl::desc("Enable PPC64 register scavenger"),
+                                   cl::Hidden);
 #define EnableRegisterScavenging \
   ((EnablePPC32RS && !Subtarget.isPPC64()) || \
    (EnablePPC64RS && Subtarget.isPPC64()))

Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=101376&r1=101375&r2=101376&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Thu Apr 15 12:08:50 2010
@@ -1217,7 +1217,7 @@
   return ConstantFoldLoadFromConstPtr(Src, &TD);
 }
 
-
+namespace {
 
 struct AvailableValueInBlock {
   /// BB - The basic block in question.
@@ -1291,6 +1291,8 @@
   }
 };
 
+}
+
 /// ConstructSSAForLoadSet - Given a set of loads specified by ValuesPerBlock,
 /// construct SSA form, allowing us to eliminate LI.  This returns the value
 /// that should be used at LI's definition site.

Modified: llvm/trunk/lib/VMCore/Dominators.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Dominators.cpp?rev=101376&r1=101375&r2=101376&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/Dominators.cpp (original)
+++ llvm/trunk/lib/VMCore/Dominators.cpp Thu Apr 15 12:08:50 2010
@@ -30,9 +30,9 @@
 
 // Always verify dominfo if expensive checking is enabled.
 #ifdef XDEBUG
-bool VerifyDomInfo = true;
+static bool VerifyDomInfo = true;
 #else
-bool VerifyDomInfo = false;
+static bool VerifyDomInfo = false;
 #endif
 static cl::opt<bool,true>
 VerifyDomInfoX("verify-dom-info", cl::location(VerifyDomInfo),

Modified: llvm/trunk/lib/VMCore/LLVMContextImpl.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/LLVMContextImpl.cpp?rev=101376&r1=101375&r2=101376&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/LLVMContextImpl.cpp (original)
+++ llvm/trunk/lib/VMCore/LLVMContextImpl.cpp Thu Apr 15 12:08:50 2010
@@ -13,6 +13,7 @@
 
 #include "LLVMContextImpl.h"
 #include <algorithm>
+using namespace llvm;
 
 LLVMContextImpl::LLVMContextImpl(LLVMContext &C)
   : TheTrueVal(0), TheFalseVal(0),

Modified: llvm/trunk/lib/VMCore/LeaksContext.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/LeaksContext.h?rev=101376&r1=101375&r2=101376&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/LeaksContext.h (original)
+++ llvm/trunk/lib/VMCore/LeaksContext.h Thu Apr 15 12:08:50 2010
@@ -14,7 +14,8 @@
 
 #include "llvm/Value.h"
 #include "llvm/ADT/SmallPtrSet.h"
-using namespace llvm;
+
+namespace llvm {
 
 template <class T>
 struct PrinterTrait {
@@ -87,3 +88,5 @@
   const T* Cache;
   const char* Name;
 };
+
+}

Modified: llvm/trunk/utils/TableGen/X86DisassemblerTables.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/X86DisassemblerTables.cpp?rev=101376&r1=101375&r2=101376&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/X86DisassemblerTables.cpp (original)
+++ llvm/trunk/utils/TableGen/X86DisassemblerTables.cpp Thu Apr 15 12:08:50 2010
@@ -161,7 +161,7 @@
 /// @param i        - The indentation level for that output stream.
 static void emitEmptyTable(raw_ostream &o, uint32_t &i)
 {
-  o.indent(i * 2) << "InstrUID modRMEmptyTable[1] = { 0 };" << "\n";
+  o.indent(i * 2) << "static InstrUID modRMEmptyTable[1] = { 0 };" << "\n";
   o << "\n";
 }
 
@@ -275,7 +275,7 @@
     return;
   }
     
-  o1.indent(i1) << "InstrUID modRMTable" << thisTableNumber;
+  o1.indent(i1) << "static InstrUID modRMTable" << thisTableNumber;
     
   switch (dt) {
     default:




From gohman at apple.com  Thu Apr 15 12:20:57 2010
From: gohman at apple.com (Dan Gohman)
Date: Thu, 15 Apr 2010 17:20:57 -0000
Subject: [llvm-commits] [llvm] r101377 - in /llvm/trunk/lib/Target/PowerPC:
 PPCInstrInfo.cpp PPCRegisterInfo.cpp
Message-ID: <20100415172057.71C302A6C12C@llvm.org>

Author: djg
Date: Thu Apr 15 12:20:57 2010
New Revision: 101377

URL: http://llvm.org/viewvc/llvm-project?rev=101377&view=rev
Log:
EnablePPC64RS and EnablePPC32RS are used in multiple files, so they
can't be static.

Modified:
    llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp
    llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp

Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp?rev=101377&r1=101376&r2=101377&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp Thu Apr 15 12:20:57 2010
@@ -24,10 +24,13 @@
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/MC/MCAsmInfo.h"
-using namespace llvm;
 
+namespace llvm {
 extern cl::opt<bool> EnablePPC32RS;  // FIXME (64-bit): See PPCRegisterInfo.cpp.
 extern cl::opt<bool> EnablePPC64RS;  // FIXME (64-bit): See PPCRegisterInfo.cpp.
+}
+
+using namespace llvm;
 
 PPCInstrInfo::PPCInstrInfo(PPCTargetMachine &tm)
   : TargetInstrInfoImpl(PPCInsts, array_lengthof(PPCInsts)), TM(tm),

Modified: llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp?rev=101377&r1=101376&r2=101377&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp Thu Apr 15 12:20:57 2010
@@ -43,7 +43,6 @@
 #include "llvm/ADT/BitVector.h"
 #include "llvm/ADT/STLExtras.h"
 #include <cstdlib>
-using namespace llvm;
 
 // FIXME This disables some code that aligns the stack to a boundary
 // bigger than the default (16 bytes on Darwin) when there is a stack local
@@ -56,14 +55,19 @@
 #define ALIGN_STACK 0
 
 // FIXME (64-bit): Eventually enable by default.
-static cl::opt<bool> EnablePPC32RS("enable-ppc32-regscavenger",
+namespace llvm {
+cl::opt<bool> EnablePPC32RS("enable-ppc32-regscavenger",
                                    cl::init(false),
                                    cl::desc("Enable PPC32 register scavenger"),
                                    cl::Hidden);
-static cl::opt<bool> EnablePPC64RS("enable-ppc64-regscavenger",
+cl::opt<bool> EnablePPC64RS("enable-ppc64-regscavenger",
                                    cl::init(false),
                                    cl::desc("Enable PPC64 register scavenger"),
                                    cl::Hidden);
+}
+
+using namespace llvm;
+
 #define EnableRegisterScavenging \
   ((EnablePPC32RS && !Subtarget.isPPC64()) || \
    (EnablePPC64RS && Subtarget.isPPC64()))




From gohman at apple.com  Thu Apr 15 12:34:58 2010
From: gohman at apple.com (Dan Gohman)
Date: Thu, 15 Apr 2010 17:34:58 -0000
Subject: [llvm-commits] [llvm] r101379 - in /llvm/trunk/lib/Target/ARM:
 ARMBaseRegisterInfo.cpp Thumb1RegisterInfo.cpp
Message-ID: <20100415173458.9BE4E2A6C12C@llvm.org>

Author: djg
Date: Thu Apr 15 12:34:58 2010
New Revision: 101379

URL: http://llvm.org/viewvc/llvm-project?rev=101379&view=rev
Log:
ReuseFrameIndexVals is used in multiple files, so it can't be static.

Modified:
    llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp
    llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp?rev=101379&r1=101378&r2=101379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Thu Apr 15 12:34:58 2010
@@ -38,11 +38,14 @@
 #include "llvm/ADT/BitVector.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/Support/CommandLine.h"
-using namespace llvm;
 
-static cl::opt<bool>
+namespace llvm {
+cl::opt<bool>
 ReuseFrameIndexVals("arm-reuse-frame-index-vals", cl::Hidden, cl::init(true),
           cl::desc("Reuse repeated frame index values"));
+}
+
+using namespace llvm;
 
 unsigned ARMBaseRegisterInfo::getRegisterNumbering(unsigned RegEnum,
                                                    bool *isSPVFP) {

Modified: llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.cpp?rev=101379&r1=101378&r2=101379&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.cpp Thu Apr 15 12:34:58 2010
@@ -36,9 +36,12 @@
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/raw_ostream.h"
-using namespace llvm;
 
+namespace llvm {
 extern cl::opt<bool> ReuseFrameIndexVals;
+}
+
+using namespace llvm;
 
 Thumb1RegisterInfo::Thumb1RegisterInfo(const ARMBaseInstrInfo &tii,
                                        const ARMSubtarget &sti)




From johnny.chen at apple.com  Thu Apr 15 13:13:51 2010
From: johnny.chen at apple.com (Johnny Chen)
Date: Thu, 15 Apr 2010 18:13:51 -0000
Subject: [llvm-commits] [llvm] r101382 -
 /llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
Message-ID: <20100415181351.55E2E2A6C12C@llvm.org>

Author: johnny
Date: Thu Apr 15 13:13:51 2010
New Revision: 101382

URL: http://llvm.org/viewvc/llvm-project?rev=101382&view=rev
Log:
DEBUG() print out "Unknown format" msg.

Modified:
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp?rev=101382&r1=101381&r2=101382&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp Thu Apr 15 13:13:51 2010
@@ -3287,8 +3287,10 @@
 /// performed by the API clients to improve performance.
 ARMBasicMCBuilder *llvm::CreateMCBuilder(unsigned Opcode, ARMFormat Format) {
   // For "Unknown format", fail by returning a NULL pointer.
-  if ((unsigned)Format >= (array_lengthof(FuncPtrs) - 1))
+  if ((unsigned)Format >= (array_lengthof(FuncPtrs) - 1)) {
+    DEBUG(errs() << "Unknown format\n");
     return 0;
+  }
 
   return new ARMBasicMCBuilder(Opcode, Format,
                                ARMInsts[Opcode].getNumOperands());




From gohman at apple.com  Thu Apr 15 13:34:30 2010
From: gohman at apple.com (Dan Gohman)
Date: Thu, 15 Apr 2010 11:34:30 -0700
Subject: [llvm-commits] [llvm] r101299 -
	/llvm/trunk/include/llvm/IntrinsicInst.h
In-Reply-To: <8873FE28-283D-4EB6-BFAD-BF3EBA5B5038@apple.com>
References: <20100414222305.594372A6C12C@llvm.org>
	<C3D7693D-DB68-465B-82F4-D59611BFA0FE@apple.com>
	<07CD445B-B26C-4B57-BA50-63E484AB66FF@apple.com>
	<8873FE28-283D-4EB6-BFAD-BF3EBA5B5038@apple.com>
Message-ID: <9BAAE121-9F0C-4492-9889-E8113B34DBBD@apple.com>


On Apr 14, 2010, at 5:22 PM, Dale Johannesen wrote:

> 
> On Apr 14, 2010, at 4:43 PMPDT, Dan Gohman wrote:
> 
>> 
>> 
>> On Apr 14, 2010, at 3:27 PM, Dale Johannesen <dalej at apple.com> wrote:
>> 
>>> 
>>> On Apr 14, 2010, at 3:23 PMPDT, Dan Gohman wrote:
>>> 
>>>> Author: djg
>>>> Date: Wed Apr 14 17:23:05 2010
>>>> New Revision: 101299
>>>> 
>>>> URL: http://llvm.org/viewvc/llvm-project?rev=101299&view=rev
>>>> Log:
>>>> Remove a const here. This makes this function consistent with all the
>>>> other getOperand wrappers, and it makes it easier to use with DebugInfo
>>>> code, which isn't currently prepared to see const MDNode *.
>>> 
>>> Please don't do this.  The MDNode is not changing any more by the time we get here, and should be referenced through const*; it's a useful precaution.
>> 
>> DebugInfo does not use const on any of its MDNodes.  Should someone fix that, I'd happily revert this patch.
> 
> Right, there's a PR for that.  It doesn't mean we should do the wrong thing somewhere else to compensate.

I made this change in order to allow me to add a lot of const
qualifiers elsewhere. The changes are now checked in, so if you
still believe 101299 is wrong, please suggest how to fix, given
the other changes.

Dan




From evan.cheng at apple.com  Thu Apr 15 13:42:28 2010
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 15 Apr 2010 18:42:28 -0000
Subject: [llvm-commits] [llvm] r101383 - in /llvm/trunk:
 lib/Target/ARM/ARMISelDAGToDAG.cpp
 test/CodeGen/Thumb2/2010-04-15-DynAllocBug.ll
Message-ID: <20100415184228.DF54F2A6C12C@llvm.org>

Author: evancheng
Date: Thu Apr 15 13:42:28 2010
New Revision: 101383

URL: http://llvm.org/viewvc/llvm-project?rev=101383&view=rev
Log:
ARM SelectDYN_ALLOC should emit a copy from SP rather than referencing SP directly. In cases where there are two dyn_alloc in the same BB it would have caused the old SP value to be reused and badness ensues. rdar://7493908

llvm is generating poor code for dynamic alloca, I'll fix that later.

Added:
    llvm/trunk/test/CodeGen/Thumb2/2010-04-15-DynAllocBug.ll
Modified:
    llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp?rev=101383&r1=101382&r2=101383&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp Thu Apr 15 13:42:28 2010
@@ -945,7 +945,7 @@
   SDValue Chain = N->getOperand(0);
   SDValue Size = N->getOperand(1);
   SDValue Align = N->getOperand(2);
-  SDValue SP = CurDAG->getRegister(ARM::SP, MVT::i32);
+  SDValue SP = CurDAG->getCopyFromReg(Chain, dl, ARM::SP, MVT::i32);
   int32_t AlignVal = cast<ConstantSDNode>(Align)->getSExtValue();
   if (AlignVal < 0)
     // We need to align the stack. Use Thumb1 tAND which is the only thumb

Added: llvm/trunk/test/CodeGen/Thumb2/2010-04-15-DynAllocBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/2010-04-15-DynAllocBug.ll?rev=101383&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/2010-04-15-DynAllocBug.ll (added)
+++ llvm/trunk/test/CodeGen/Thumb2/2010-04-15-DynAllocBug.ll Thu Apr 15 13:42:28 2010
@@ -0,0 +1,23 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -O3 | FileCheck %s
+; rdar://7493908
+
+; Make sure the result of the first dynamic_alloc isn't copied back to sp more
+; than once. We'll deal with poor codegen later.
+
+define arm_apcscc void @t() nounwind ssp {
+entry:
+; CHECK: t:
+; CHECK: mvn r0, #7
+; CHECK: ands sp, r0
+; CHECK: mov r1, sp
+; CHECK: mov sp, r1
+; Yes, this is stupid codegen, but it's correct.
+; CHECK: sub sp, #16
+; CHECK: mov r1, sp
+; CHECK: mov sp, r1
+; CHECK: ands sp, r0
+  %size = mul i32 8, 2
+  %vla_a = alloca i8, i32 %size, align 8
+  %vla_b = alloca i8, i32 %size, align 8
+  unreachable
+}




From ggreif at gmail.com  Thu Apr 15 14:44:21 2010
From: ggreif at gmail.com (Gabor Greif)
Date: Thu, 15 Apr 2010 19:44:21 -0000
Subject: [llvm-commits] [llvm] r101385 -
	/llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp
Message-ID: <20100415194421.C78C82A6C12C@llvm.org>

Author: ggreif
Date: Thu Apr 15 14:44:21 2010
New Revision: 101385

URL: http://llvm.org/viewvc/llvm-project?rev=101385&view=rev
Log:
prune includes

Modified:
    llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp

Modified: llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp?rev=101385&r1=101384&r2=101385&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp Thu Apr 15 14:44:21 2010
@@ -12,8 +12,6 @@
 #include "llvm/Constants.h"
 #include "llvm/DerivedTypes.h"
 #include "llvm/GlobalVariable.h"
-#include "llvm/Intrinsics.h"
-#include "llvm/Instructions.h"
 #include "llvm/Module.h"
 #include "llvm/Analysis/ValueTracking.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"




From anton at korobeynikov.info  Thu Apr 15 14:47:15 2010
From: anton at korobeynikov.info (Anton Korobeynikov)
Date: Thu, 15 Apr 2010 23:47:15 +0400
Subject: [llvm-commits] [llvm] r101007 - /llvm/trunk/Makefile.config.in
In-Reply-To: <20100412022138.E53732A6C12C@llvm.org>
References: <20100412022138.E53732A6C12C@llvm.org>
Message-ID: <o2jb087fca01004151247rb8626c90oc7ace45ae9fad698@mail.gmail.com>

> whether we enable dylibs or not depends on the host, not the target.
>
> Modified:
> ? ?llvm/trunk/Makefile.config.in
>
> Modified: llvm/trunk/Makefile.config.in
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/Makefile.config.in?rev=101007&r1=101006&r2=101007&view=diff
> ==============================================================================
> --- llvm/trunk/Makefile.config.in (original)
> +++ llvm/trunk/Makefile.config.in Sun Apr 11 21:21:38 2010
> @@ -323,7 +323,7 @@
>
> ?# TARGET_HAS_DYNAMIC_LIBS - This is set if the target supports dynamic linking
> ?# .dylib or .so files.
> -ifeq ($(TARGET_OS), $(filter $(TARGET_OS), Cygwin MingW Minix))
> +ifeq ($(HOST_OS), $(filter $(HOST_OS), Cygwin MingW Minix))
> ?TARGET_HAS_DYNAMIC_LIBS := 1
> ?endif
It doesn't seem to help the buildbot... I'll revert these commits for now.

-- 
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University



From asl at math.spbu.ru  Thu Apr 15 14:51:42 2010
From: asl at math.spbu.ru (Anton Korobeynikov)
Date: Thu, 15 Apr 2010 19:51:42 -0000
Subject: [llvm-commits] [llvm] r101387 - in /llvm/trunk: Makefile.config.in
 lib/Transforms/Makefile runtime/Makefile
Message-ID: <20100415195142.6FBD92A6C12C@llvm.org>

Author: asl
Date: Thu Apr 15 14:51:42 2010
New Revision: 101387

URL: http://llvm.org/viewvc/llvm-project?rev=101387&view=rev
Log:
Revert r100896 and around - this breaks the only mingw32 buildbot we have.

Modified:
    llvm/trunk/Makefile.config.in
    llvm/trunk/lib/Transforms/Makefile
    llvm/trunk/runtime/Makefile

Modified: llvm/trunk/Makefile.config.in
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/Makefile.config.in?rev=101387&r1=101386&r2=101387&view=diff
==============================================================================
--- llvm/trunk/Makefile.config.in (original)
+++ llvm/trunk/Makefile.config.in Thu Apr 15 14:51:42 2010
@@ -321,12 +321,6 @@
 CXX_INCLUDE_32BIT_DIR = @CXX_INCLUDE_32BIT_DIR@
 CXX_INCLUDE_64BIT_DIR = @CXX_INCLUDE_64BIT_DIR@
 
-# TARGET_HAS_DYNAMIC_LIBS - This is set if the target supports dynamic linking
-# .dylib or .so files.
-ifeq ($(HOST_OS), $(filter $(HOST_OS), Cygwin MingW Minix))
-TARGET_HAS_DYNAMIC_LIBS := 1
-endif
-
 # When ENABLE_LLVMC_DYNAMIC is enabled, LLVMC will link libCompilerDriver
 # dynamically. This is needed to make dynamic plugins work on some targets
 # (Windows).

Modified: llvm/trunk/lib/Transforms/Makefile
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Makefile?rev=101387&r1=101386&r2=101387&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Makefile (original)
+++ llvm/trunk/lib/Transforms/Makefile Thu Apr 15 14:51:42 2010
@@ -12,8 +12,8 @@
 
 include $(LEVEL)/Makefile.config
 
-# Some targets don't support plugins
-ifdef $(TARGET_HAS_DYNAMIC_LIBS)
+# No support for plugins on windows targets
+ifeq ($(HOST_OS), $(filter $(HOST_OS), Cygwin MingW Minix))
   PARALLEL_DIRS := $(filter-out Hello, $(PARALLEL_DIRS))
 endif
 

Modified: llvm/trunk/runtime/Makefile
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/runtime/Makefile?rev=101387&r1=101386&r2=101387&view=diff
==============================================================================
--- llvm/trunk/runtime/Makefile (original)
+++ llvm/trunk/runtime/Makefile Thu Apr 15 14:51:42 2010
@@ -20,7 +20,7 @@
 PARALLEL_DIRS := $(filter-out libprofile, $(PARALLEL_DIRS))
 endif
 
-ifdef $(TARGET_HAS_DYNAMIC_LIBS)
+ifeq ($(TARGET_OS), $(filter $(TARGET_OS), Cygwin MingW Minix))
 PARALLEL_DIRS := $(filter-out libprofile, $(PARALLEL_DIRS))
 endif
 




From nicolas.geoffray at lip6.fr  Thu Apr 15 14:53:35 2010
From: nicolas.geoffray at lip6.fr (Nicolas Geoffray)
Date: Thu, 15 Apr 2010 19:53:35 -0000
Subject: [llvm-commits] [llvm] r101388 -
	/llvm/trunk/lib/CodeGen/GCStrategy.cpp
Message-ID: <20100415195335.7FC082A6C12C@llvm.org>

Author: geoffray
Date: Thu Apr 15 14:53:35 2010
New Revision: 101388

URL: http://llvm.org/viewvc/llvm-project?rev=101388&view=rev
Log:
Make sure the initialization of a GC root is after its definition.


Modified:
    llvm/trunk/lib/CodeGen/GCStrategy.cpp

Modified: llvm/trunk/lib/CodeGen/GCStrategy.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GCStrategy.cpp?rev=101388&r1=101387&r2=101388&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GCStrategy.cpp (original)
+++ llvm/trunk/lib/CodeGen/GCStrategy.cpp Thu Apr 15 14:53:35 2010
@@ -181,9 +181,10 @@
   
   for (AllocaInst **I = Roots, **E = Roots + Count; I != E; ++I)
     if (!InitedRoots.count(*I)) {
-      new StoreInst(ConstantPointerNull::get(cast<PointerType>(
-                      cast<PointerType>((*I)->getType())->getElementType())),
-                    *I, IP);
+      StoreInst* SI = new StoreInst(ConstantPointerNull::get(cast<PointerType>(
+                        cast<PointerType>((*I)->getType())->getElementType())),
+                        *I);
+      SI->insertAfter(*I);
       MadeChange = true;
     }
   




From stoklund at 2pi.dk  Thu Apr 15 15:28:40 2010
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Thu, 15 Apr 2010 20:28:40 -0000
Subject: [llvm-commits] [llvm] r101392 - in /llvm/trunk:
 lib/CodeGen/RegisterScavenging.cpp
 test/CodeGen/ARM/2010-04-15-ScavengerDebugValue.ll
Message-ID: <20100415202840.2527F2A6C12C@llvm.org>

Author: stoklund
Date: Thu Apr 15 15:28:39 2010
New Revision: 101392

URL: http://llvm.org/viewvc/llvm-project?rev=101392&view=rev
Log:
Fix PR6847. RegScavenger should ignore DebugValues.

Added:
    llvm/trunk/test/CodeGen/ARM/2010-04-15-ScavengerDebugValue.ll
Modified:
    llvm/trunk/lib/CodeGen/RegisterScavenging.cpp

Modified: llvm/trunk/lib/CodeGen/RegisterScavenging.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterScavenging.cpp?rev=101392&r1=101391&r2=101392&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegisterScavenging.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Thu Apr 15 15:28:39 2010
@@ -136,6 +136,9 @@
     ScavengeRestore = NULL;
   }
 
+  if (MI->isDebugValue())
+    return;
+
   // Find out which registers are early clobbered, killed, defined, and marked
   // def-dead in this instruction.
   BitVector EarlyClobberRegs(NumPhysRegs);

Added: llvm/trunk/test/CodeGen/ARM/2010-04-15-ScavengerDebugValue.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2010-04-15-ScavengerDebugValue.ll?rev=101392&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/2010-04-15-ScavengerDebugValue.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/2010-04-15-ScavengerDebugValue.ll Thu Apr 15 15:28:39 2010
@@ -0,0 +1,26 @@
+; RUN: llc < %s
+; PR6847
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64-n32"
+target triple = "armv4t-apple-darwin10"
+
+define hidden arm_apcscc i32 @__addvsi3(i32 %a, i32 %b) nounwind {
+entry:
+  tail call void @llvm.dbg.value(metadata !{i32 %b}, i64 0, metadata !0)
+  %0 = add nsw i32 %b, %a, !dbg !9                ; <i32> [#uses=1]
+  ret i32 %0, !dbg !11
+}
+
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
+
+!0 = metadata !{i32 524545, metadata !1, metadata !"b", metadata !2, i32 93, metadata !6} ; [ DW_TAG_arg_variable ]
+!1 = metadata !{i32 524334, i32 0, metadata !2, metadata !"__addvsi3", metadata !"__addvsi3", metadata !"__addvsi3", metadata !2, i32 94, metadata !4, i1 false, i1 true, i32 0, i32 0, null, i1 false} ; [ DW_TAG_subprogram ]
+!2 = metadata !{i32 524329, metadata !"libgcc2.c", metadata !"/Users/bwilson/local/nightly/test-2010-04-14/build/llvmgcc.roots/llvmgcc~obj/src/gcc", metadata !3} ; [ DW_TAG_file_type ]
+!3 = metadata !{i32 524305, i32 0, i32 1, metadata !"libgcc2.c", metadata !"/Users/bwilson/local/nightly/test-2010-04-14/build/llvmgcc.roots/llvmgcc~obj/src/gcc", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build 00)", i1 true, i1 true, metadata !"", i32 0} ; [ DW_TAG_compile_unit ]
+!4 = metadata !{i32 524309, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !5, i32 0, null} ; [ DW_TAG_subroutine_type ]
+!5 = metadata !{metadata !6, metadata !6, metadata !6}
+!6 = metadata !{i32 524310, metadata !2, metadata !"SItype", metadata !7, i32 152, i64 0, i64 0, i64 0, i32 0, metadata !8} ; [ DW_TAG_typedef ]
+!7 = metadata !{i32 524329, metadata !"libgcc2.h", metadata !"/Users/bwilson/local/nightly/test-2010-04-14/build/llvmgcc.roots/llvmgcc~obj/src/gcc", metadata !3} ; [ DW_TAG_file_type ]
+!8 = metadata !{i32 524324, metadata !2, metadata !"int", metadata !2, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ]
+!9 = metadata !{i32 95, i32 0, metadata !10, null}
+!10 = metadata !{i32 524299, metadata !1, i32 94, i32 0} ; [ DW_TAG_lexical_block ]
+!11 = metadata !{i32 100, i32 0, metadata !10, null}




From baldrick at free.fr  Thu Apr 15 15:34:45 2010
From: baldrick at free.fr (Duncan Sands)
Date: Thu, 15 Apr 2010 20:34:45 -0000
Subject: [llvm-commits] [dragonegg] r101394 -
	/dragonegg/trunk/extras/buildbot_self_strap-32
Message-ID: <20100415203445.A3BD82A6C12C@llvm.org>

Author: baldrick
Date: Thu Apr 15 15:34:45 2010
New Revision: 101394

URL: http://llvm.org/viewvc/llvm-project?rev=101394&view=rev
Log:
Script for doing a 32 bit self-host on a 64 bit machine.

Added:
    dragonegg/trunk/extras/buildbot_self_strap-32   (with props)

Added: dragonegg/trunk/extras/buildbot_self_strap-32
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/extras/buildbot_self_strap-32?rev=101394&view=auto
==============================================================================
--- dragonegg/trunk/extras/buildbot_self_strap-32 (added)
+++ dragonegg/trunk/extras/buildbot_self_strap-32 Thu Apr 15 15:34:45 2010
@@ -0,0 +1,21 @@
+#!/bin/bash
+
+set -o errexit	# Exit if any command fails
+set -x		# Print commands executed
+
+LLVM_SOURCE=$1
+DRAGONEGG_SOURCE=$2
+BUILD_DIR=$3
+
+ln -sf $LLVM_SOURCE $BUILD_DIR/llvm
+ln -sf $DRAGONEGG_SOURCE $BUILD_DIR/dragonegg
+
+export CC="gcc -m32"
+export CXX="g++ -m32"
+export LD_LIBRARY_PATH=$HOME/cfarm-32/lib:$LD_LIBRARY_PATH
+export CPPFLAGS="-I/$HOME/cfarm-32/include"
+export GCC_OPTIONS="--build=i686-pc-linux-gnu --disable-multilib --enable-targets=all --with-mpfr=$HOME/cfarm-32/ --with-gmp=$HOME/cfarm-32/ --with-mpc=$HOME/cfarm-32/ --with-libelf=$HOME/cfarm-32/"
+export LLVM_OPTIONS="--build=i686-pc-linux-gnu"
+
+cd $BUILD_DIR
+$DRAGONEGG_SOURCE/extras/do_self_strap

Propchange: dragonegg/trunk/extras/buildbot_self_strap-32
------------------------------------------------------------------------------
    svn:executable = *




From baldrick at free.fr  Thu Apr 15 15:35:54 2010
From: baldrick at free.fr (Duncan Sands)
Date: Thu, 15 Apr 2010 20:35:54 -0000
Subject: [llvm-commits] [llvm] r101395 - /llvm/trunk/docs/LangRef.html
Message-ID: <20100415203555.45C3D2A6C12C@llvm.org>

Author: baldrick
Date: Thu Apr 15 15:35:54 2010
New Revision: 101395

URL: http://llvm.org/viewvc/llvm-project?rev=101395&view=rev
Log:
Pointed out by housel on #llvm.

Modified:
    llvm/trunk/docs/LangRef.html

Modified: llvm/trunk/docs/LangRef.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/LangRef.html?rev=101395&r1=101394&r2=101395&view=diff
==============================================================================
--- llvm/trunk/docs/LangRef.html (original)
+++ llvm/trunk/docs/LangRef.html Thu Apr 15 15:35:54 2010
@@ -2707,7 +2707,7 @@
    control flow, not values (the one exception being the
    '<a href="#i_invoke"><tt>invoke</tt></a>' instruction).</p>
 
-<p>There are six different terminator instructions: the
+<p>There are seven different terminator instructions: the
    '<a href="#i_ret"><tt>ret</tt></a>' instruction, the
    '<a href="#i_br"><tt>br</tt></a>' instruction, the
    '<a href="#i_switch"><tt>switch</tt></a>' instruction, the




From kledzik at apple.com  Thu Apr 15 15:37:56 2010
From: kledzik at apple.com (Nick Kledzik)
Date: Thu, 15 Apr 2010 20:37:56 -0000
Subject: [llvm-commits] [compiler-rt] r101396 - in /compiler-rt/trunk/lib:
 gcc_personality_v0.c trampoline_setup.c
Message-ID: <20100415203756.6DA242A6C12C@llvm.org>

Author: kledzik
Date: Thu Apr 15 15:37:56 2010
New Revision: 101396

URL: http://llvm.org/viewvc/llvm-project?rev=101396&view=rev
Log:
add include of int_lib.h to match change to use compilerrt_abort()

Modified:
    compiler-rt/trunk/lib/gcc_personality_v0.c
    compiler-rt/trunk/lib/trampoline_setup.c

Modified: compiler-rt/trunk/lib/gcc_personality_v0.c
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/gcc_personality_v0.c?rev=101396&r1=101395&r2=101396&view=diff
==============================================================================
--- compiler-rt/trunk/lib/gcc_personality_v0.c (original)
+++ compiler-rt/trunk/lib/gcc_personality_v0.c Thu Apr 15 15:37:56 2010
@@ -13,6 +13,8 @@
 #include <stdio.h>
 #include <stdlib.h>
 
+#include "int_lib.h"
+
 /*
  * _Unwind_* stuff based on C++ ABI public documentation
  * http://refspecs.freestandards.org/abi-eh-1.21.html

Modified: compiler-rt/trunk/lib/trampoline_setup.c
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/trampoline_setup.c?rev=101396&r1=101395&r2=101396&view=diff
==============================================================================
--- compiler-rt/trunk/lib/trampoline_setup.c (original)
+++ compiler-rt/trunk/lib/trampoline_setup.c Thu Apr 15 15:37:56 2010
@@ -11,6 +11,8 @@
 #include <stdint.h>
 #include <stdlib.h>
 
+#include "int_lib.h"
+
 extern void __clear_cache(void* start, void* end);
 
 /*




From ggreif at gmail.com  Thu Apr 15 15:51:14 2010
From: ggreif at gmail.com (Gabor Greif)
Date: Thu, 15 Apr 2010 20:51:14 -0000
Subject: [llvm-commits] [llvm] r101397 - in /llvm/trunk: ./ include/llvm/
 include/llvm/Support/ lib/Analysis/ lib/Analysis/IPA/ lib/Bitcode/Writer/
 lib/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/CBackend/
 lib/Target/CppBackend/ lib/Target/X86/ lib/Transforms/IPO/
 lib/Transforms/InstCombine/ lib/Transforms/Instrumentation/
 lib/Transforms/Scalar/ lib/Transforms/Utils/ lib/VMCore/
Message-ID: <20100415205114.C49F72A6C12C@llvm.org>

Author: ggreif
Date: Thu Apr 15 15:51:13 2010
New Revision: 101397

URL: http://llvm.org/viewvc/llvm-project?rev=101397&view=rev
Log:
reapply r101364, which has been backed out in r101368
with a fix

rotate CallInst operands, i.e. move callee to the back
of the operand array

the motivation for this patch are laid out in my mail to llvm-commits:
more efficient access to operands and callee, faster callgraph-construction,
smaller compiler binary

Modified:
    llvm/trunk/   (props changed)
    llvm/trunk/include/llvm/Instructions.h
    llvm/trunk/include/llvm/IntrinsicInst.h
    llvm/trunk/include/llvm/Support/CallSite.h
    llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp
    llvm/trunk/lib/Analysis/ConstantFolding.cpp
    llvm/trunk/lib/Analysis/IPA/GlobalsModRef.cpp
    llvm/trunk/lib/Analysis/MemoryBuiltins.cpp
    llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp
    llvm/trunk/lib/Analysis/ValueTracking.cpp
    llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp
    llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp
    llvm/trunk/lib/CodeGen/GCStrategy.cpp
    llvm/trunk/lib/CodeGen/IntrinsicLowering.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    llvm/trunk/lib/CodeGen/ShadowStackGC.cpp
    llvm/trunk/lib/CodeGen/SjLjEHPrepare.cpp
    llvm/trunk/lib/Target/CBackend/CBackend.cpp
    llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp
    llvm/trunk/lib/Target/X86/X86FastISel.cpp
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp
    llvm/trunk/lib/Transforms/IPO/LowerSetJmp.cpp
    llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp
    llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp
    llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp
    llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
    llvm/trunk/lib/Transforms/InstCombine/InstructionCombining.cpp
    llvm/trunk/lib/Transforms/Instrumentation/ProfilingUtils.cpp
    llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp
    llvm/trunk/lib/Transforms/Scalar/GVN.cpp
    llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp
    llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp
    llvm/trunk/lib/Transforms/Scalar/SimplifyLibCalls.cpp
    llvm/trunk/lib/Transforms/Scalar/TailRecursionElimination.cpp
    llvm/trunk/lib/Transforms/Utils/AddrModeMatcher.cpp
    llvm/trunk/lib/Transforms/Utils/BuildLibCalls.cpp
    llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp
    llvm/trunk/lib/VMCore/AsmWriter.cpp
    llvm/trunk/lib/VMCore/AutoUpgrade.cpp
    llvm/trunk/lib/VMCore/Instructions.cpp
    llvm/trunk/lib/VMCore/IntrinsicInst.cpp
    llvm/trunk/lib/VMCore/Verifier.cpp

Propchange: llvm/trunk/
------------------------------------------------------------------------------
    svn:mergeinfo = /llvm/branches/ggreif/CallInst-operands:101367-101396

Modified: llvm/trunk/include/llvm/Instructions.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Instructions.h?rev=101397&r1=101396&r2=101397&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Instructions.h (original)
+++ llvm/trunk/include/llvm/Instructions.h Thu Apr 15 15:51:13 2010
@@ -1031,17 +1031,17 @@
   /// indirect function invocation.
   ///
   Function *getCalledFunction() const {
-    return dyn_cast<Function>(Op<0>());
+    return dyn_cast<Function>(Op<-1>());
   }
 
   /// getCalledValue - Get a pointer to the function that is invoked by this
   /// instruction.
-  const Value *getCalledValue() const { return Op<0>(); }
-        Value *getCalledValue()       { return Op<0>(); }
+  const Value *getCalledValue() const { return Op<-1>(); }
+        Value *getCalledValue()       { return Op<-1>(); }
 
   /// setCalledFunction - Set the function called.
   void setCalledFunction(Value* Fn) {
-    Op<0>() = Fn;
+    Op<-1>() = Fn;
   }
 
   // Methods for support type inquiry through isa, cast, and dyn_cast:
@@ -1071,7 +1071,7 @@
                                    ->getElementType())->getReturnType(),
                 Instruction::Call,
                 OperandTraits<CallInst>::op_end(this) - (ArgEnd - ArgBegin + 1),
-                (unsigned)(ArgEnd - ArgBegin + 1), InsertAtEnd) {
+                unsigned(ArgEnd - ArgBegin + 1), InsertAtEnd) {
   init(Func, ArgBegin, ArgEnd, NameStr,
        typename std::iterator_traits<InputIterator>::iterator_category());
 }

Modified: llvm/trunk/include/llvm/IntrinsicInst.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IntrinsicInst.h?rev=101397&r1=101396&r2=101397&view=diff
==============================================================================
--- llvm/trunk/include/llvm/IntrinsicInst.h (original)
+++ llvm/trunk/include/llvm/IntrinsicInst.h Thu Apr 15 15:51:13 2010
@@ -43,7 +43,7 @@
     Intrinsic::ID getIntrinsicID() const {
       return (Intrinsic::ID)getCalledFunction()->getIntrinsicID();
     }
-    
+
     // Methods for support type inquiry through isa, cast, and dyn_cast:
     static inline bool classof(const IntrinsicInst *) { return true; }
     static inline bool classof(const CallInst *I) {
@@ -74,7 +74,7 @@
     static inline bool classof(const Value *V) {
       return isa<IntrinsicInst>(V) && classof(cast<IntrinsicInst>(V));
     }
-    
+
     static Value *StripCast(Value *C);
   };
 
@@ -83,7 +83,7 @@
   class DbgDeclareInst : public DbgInfoIntrinsic {
   public:
     Value *getAddress() const;
-    MDNode *getVariable() const { return cast<MDNode>(getOperand(2)); }
+    MDNode *getVariable() const { return cast<MDNode>(getOperand(1)); }
 
     // Methods for support type inquiry through isa, cast, and dyn_cast:
     static inline bool classof(const DbgDeclareInst *) { return true; }
@@ -103,9 +103,9 @@
     Value *getValue();
     uint64_t getOffset() const {
       return cast<ConstantInt>(
-                             const_cast<Value*>(getOperand(2)))->getZExtValue();
+                             const_cast<Value*>(getOperand(1)))->getZExtValue();
     }
-    MDNode *getVariable() const { return cast<MDNode>(getOperand(3)); }
+    MDNode *getVariable() const { return cast<MDNode>(getOperand(2)); }
 
     // Methods for support type inquiry through isa, cast, and dyn_cast:
     static inline bool classof(const DbgValueInst *) { return true; }
@@ -121,19 +121,19 @@
   ///
   class MemIntrinsic : public IntrinsicInst {
   public:
-    Value *getRawDest() const { return const_cast<Value*>(getOperand(1)); }
+    Value *getRawDest() const { return const_cast<Value*>(getOperand(0)); }
 
-    Value *getLength() const { return const_cast<Value*>(getOperand(3)); }
+    Value *getLength() const { return const_cast<Value*>(getOperand(2)); }
     ConstantInt *getAlignmentCst() const {
-      return cast<ConstantInt>(const_cast<Value*>(getOperand(4)));
+      return cast<ConstantInt>(const_cast<Value*>(getOperand(3)));
     }
-    
+
     unsigned getAlignment() const {
       return getAlignmentCst()->getZExtValue();
     }
 
     ConstantInt *getVolatileCst() const {
-      return cast<ConstantInt>(const_cast<Value*>(getOperand(5)));
+      return cast<ConstantInt>(const_cast<Value*>(getOperand(4)));
     }
     bool isVolatile() const {
       return getVolatileCst()->getZExtValue() != 0;
@@ -149,27 +149,27 @@
     void setDest(Value *Ptr) {
       assert(getRawDest()->getType() == Ptr->getType() &&
              "setDest called with pointer of wrong type!");
-      setOperand(1, Ptr);
+      setOperand(0, Ptr);
     }
 
     void setLength(Value *L) {
       assert(getLength()->getType() == L->getType() &&
              "setLength called with value of wrong type!");
-      setOperand(3, L);
+      setOperand(2, L);
     }
-    
+
     void setAlignment(Constant* A) {
-      setOperand(4, A);
+      setOperand(3, A);
     }
 
     void setVolatile(Constant* V) {
-      setOperand(5, V);
+      setOperand(4, V);
     }
 
     const Type *getAlignmentType() const {
-      return getOperand(4)->getType();
+      return getOperand(3)->getType();
     }
-    
+
     // Methods for support type inquiry through isa, cast, and dyn_cast:
     static inline bool classof(const MemIntrinsic *) { return true; }
     static inline bool classof(const IntrinsicInst *I) {
@@ -192,14 +192,14 @@
   public:
     /// get* - Return the arguments to the instruction.
     ///
-    Value *getValue() const { return const_cast<Value*>(getOperand(2)); }
-    
+    Value *getValue() const { return const_cast<Value*>(getOperand(1)); }
+
     void setValue(Value *Val) {
       assert(getValue()->getType() == Val->getType() &&
-             "setSource called with pointer of wrong type!");
-      setOperand(2, Val);
+             "setValue called with value of wrong type!");
+      setOperand(1, Val);
     }
-    
+
     // Methods for support type inquiry through isa, cast, and dyn_cast:
     static inline bool classof(const MemSetInst *) { return true; }
     static inline bool classof(const IntrinsicInst *I) {
@@ -209,26 +209,26 @@
       return isa<IntrinsicInst>(V) && classof(cast<IntrinsicInst>(V));
     }
   };
-  
+
   /// MemTransferInst - This class wraps the llvm.memcpy/memmove intrinsics.
   ///
   class MemTransferInst : public MemIntrinsic {
   public:
     /// get* - Return the arguments to the instruction.
     ///
-    Value *getRawSource() const { return const_cast<Value*>(getOperand(2)); }
-    
+    Value *getRawSource() const { return const_cast<Value*>(getOperand(1)); }
+
     /// getSource - This is just like getRawSource, but it strips off any cast
     /// instructions that feed it, giving the original input.  The returned
     /// value is guaranteed to be a pointer.
     Value *getSource() const { return getRawSource()->stripPointerCasts(); }
-    
+
     void setSource(Value *Ptr) {
       assert(getRawSource()->getType() == Ptr->getType() &&
              "setSource called with pointer of wrong type!");
-      setOperand(2, Ptr);
+      setOperand(1, Ptr);
     }
-    
+
     // Methods for support type inquiry through isa, cast, and dyn_cast:
     static inline bool classof(const MemTransferInst *) { return true; }
     static inline bool classof(const IntrinsicInst *I) {
@@ -239,8 +239,8 @@
       return isa<IntrinsicInst>(V) && classof(cast<IntrinsicInst>(V));
     }
   };
-  
-  
+
+
   /// MemCpyInst - This class wraps the llvm.memcpy intrinsic.
   ///
   class MemCpyInst : public MemTransferInst {
@@ -282,7 +282,7 @@
       return isa<IntrinsicInst>(V) && classof(cast<IntrinsicInst>(V));
     }
   };
-  
+
   /// MemoryUseIntrinsic - This is the common base class for the memory use
   /// marker intrinsics.
   ///

Modified: llvm/trunk/include/llvm/Support/CallSite.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/CallSite.h?rev=101397&r1=101396&r2=101397&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/CallSite.h (original)
+++ llvm/trunk/include/llvm/Support/CallSite.h Thu Apr 15 15:51:13 2010
@@ -255,27 +255,21 @@
 private:
   /// Returns the operand number of the first argument
   unsigned getArgumentOffset() const {
-    if (isCall())
-      return 1; // Skip Function (ATM)
-    else
       return 0; // Args are at the front
   }
 
   unsigned getArgumentEndOffset() const {
     if (isCall())
-      return 0; // Unchanged (ATM)
+      return 1; // Skip Function
     else
       return 3; // Skip BB, BB, Function
   }
 
   IterTy getCallee() const {
-      // FIXME: this is slow, since we do not have the fast versions
-      // of the op_*() functions here. See CallSite::getCallee.
-      //
-    if (isCall())
-      return getInstruction()->op_begin(); // Unchanged (ATM)
-    else
-      return getInstruction()->op_end() - 3; // Skip BB, BB, Function
+    // FIXME: this is slow, since we do not have the fast versions
+		// of the op_*() functions here. See CallSite::getCallee.
+		//
+    return arg_end();
   }
 };
 

Modified: llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp?rev=101397&r1=101396&r2=101397&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp Thu Apr 15 15:51:13 2010
@@ -94,7 +94,7 @@
   } else if (const CallInst* CI = extractMallocCall(V)) {
     if (!isArrayMalloc(V, &TD))
       // The size is the argument to the malloc call.
-      if (const ConstantInt* C = dyn_cast<ConstantInt>(CI->getOperand(1)))
+      if (const ConstantInt* C = dyn_cast<ConstantInt>(CI->getOperand(0)))
         return (C->getZExtValue() < Size);
     return false;
   } else if (const Argument *A = dyn_cast<Argument>(V)) {
@@ -318,10 +318,10 @@
   case Intrinsic::memcpy:
   case Intrinsic::memmove: {
     unsigned Len = ~0U;
-    if (ConstantInt *LenCI = dyn_cast<ConstantInt>(II->getOperand(3)))
+    if (ConstantInt *LenCI = dyn_cast<ConstantInt>(II->getOperand(2)))
       Len = LenCI->getZExtValue();
-    Value *Dest = II->getOperand(1);
-    Value *Src = II->getOperand(2);
+    Value *Dest = II->getOperand(0);
+    Value *Src = II->getOperand(1);
     if (isNoAlias(Dest, Len, P, Size)) {
       if (isNoAlias(Src, Len, P, Size))
         return NoModRef;
@@ -332,9 +332,9 @@
   case Intrinsic::memset:
     // Since memset is 'accesses arguments' only, the AliasAnalysis base class
     // will handle it for the variable length case.
-    if (ConstantInt *LenCI = dyn_cast<ConstantInt>(II->getOperand(3))) {
+    if (ConstantInt *LenCI = dyn_cast<ConstantInt>(II->getOperand(2))) {
       unsigned Len = LenCI->getZExtValue();
-      Value *Dest = II->getOperand(1);
+      Value *Dest = II->getOperand(0);
       if (isNoAlias(Dest, Len, P, Size))
         return NoModRef;
     }
@@ -352,7 +352,7 @@
   case Intrinsic::atomic_load_umax:
   case Intrinsic::atomic_load_umin:
     if (TD) {
-      Value *Op1 = II->getOperand(1);
+      Value *Op1 = II->getOperand(0);
       unsigned Op1Size = TD->getTypeStoreSize(Op1->getType());
       if (isNoAlias(Op1, Op1Size, P, Size))
         return NoModRef;
@@ -361,14 +361,14 @@
   case Intrinsic::lifetime_start:
   case Intrinsic::lifetime_end:
   case Intrinsic::invariant_start: {
-    unsigned PtrSize = cast<ConstantInt>(II->getOperand(1))->getZExtValue();
-    if (isNoAlias(II->getOperand(2), PtrSize, P, Size))
+    unsigned PtrSize = cast<ConstantInt>(II->getOperand(0))->getZExtValue();
+    if (isNoAlias(II->getOperand(1), PtrSize, P, Size))
       return NoModRef;
     break;
   }
   case Intrinsic::invariant_end: {
-    unsigned PtrSize = cast<ConstantInt>(II->getOperand(2))->getZExtValue();
-    if (isNoAlias(II->getOperand(3), PtrSize, P, Size))
+    unsigned PtrSize = cast<ConstantInt>(II->getOperand(1))->getZExtValue();
+    if (isNoAlias(II->getOperand(2), PtrSize, P, Size))
       return NoModRef;
     break;
   }

Modified: llvm/trunk/lib/Analysis/ConstantFolding.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ConstantFolding.cpp?rev=101397&r1=101396&r2=101397&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ConstantFolding.cpp (original)
+++ llvm/trunk/lib/Analysis/ConstantFolding.cpp Thu Apr 15 15:51:13 2010
@@ -772,9 +772,9 @@
   case Instruction::ICmp:
   case Instruction::FCmp: assert(0 && "Invalid for compares");
   case Instruction::Call:
-    if (Function *F = dyn_cast<Function>(Ops[0]))
+    if (Function *F = dyn_cast<Function>(Ops[NumOps - 1]))
       if (canConstantFoldCallTo(F))
-        return ConstantFoldCall(F, Ops+1, NumOps-1);
+        return ConstantFoldCall(F, Ops, NumOps - 1);
     return 0;
   case Instruction::PtrToInt:
     // If the input is a inttoptr, eliminate the pair.  This requires knowing

Modified: llvm/trunk/lib/Analysis/IPA/GlobalsModRef.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/IPA/GlobalsModRef.cpp?rev=101397&r1=101396&r2=101397&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/IPA/GlobalsModRef.cpp (original)
+++ llvm/trunk/lib/Analysis/IPA/GlobalsModRef.cpp Thu Apr 15 15:51:13 2010
@@ -252,7 +252,7 @@
     } else if (CallInst *CI = dyn_cast<CallInst>(*UI)) {
       // Make sure that this is just the function being called, not that it is
       // passing into the function.
-      for (unsigned i = 1, e = CI->getNumOperands(); i != e; ++i)
+      for (unsigned i = 0, e = CI->getNumOperands() - 1; i != e; ++i)
         if (CI->getOperand(i) == V) return true;
     } else if (InvokeInst *II = dyn_cast<InvokeInst>(*UI)) {
       // Make sure that this is just the function being called, not that it is

Modified: llvm/trunk/lib/Analysis/MemoryBuiltins.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/MemoryBuiltins.cpp?rev=101397&r1=101396&r2=101397&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/MemoryBuiltins.cpp (original)
+++ llvm/trunk/lib/Analysis/MemoryBuiltins.cpp Thu Apr 15 15:51:13 2010
@@ -103,7 +103,7 @@
 
   // If malloc calls' arg can be determined to be a multiple of ElementSize,
   // return the multiple.  Otherwise, return NULL.
-  Value *MallocArg = CI->getOperand(1);
+  Value *MallocArg = CI->getOperand(0);
   Value *Multiple = NULL;
   if (ComputeMultiple(MallocArg, ElementSize, Multiple,
                       LookThroughSExt))
@@ -120,7 +120,7 @@
   Value *ArraySize = computeArraySize(CI, TD);
 
   if (ArraySize &&
-      ArraySize != ConstantInt::get(CI->getOperand(1)->getType(), 1))
+      ArraySize != ConstantInt::get(CI->getOperand(0)->getType(), 1))
     return CI;
 
   // CI is a non-array malloc or we can't figure out that it is an array malloc.

Modified: llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp?rev=101397&r1=101396&r2=101397&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp Thu Apr 15 15:51:13 2010
@@ -117,7 +117,7 @@
       Pointer = V->getOperand(0);
       PointerSize = AA->getTypeStoreSize(V->getType());
     } else if (isFreeCall(Inst)) {
-      Pointer = Inst->getOperand(1);
+      Pointer = Inst->getOperand(0);
       // calls to free() erase the entire structure
       PointerSize = ~0ULL;
     } else if (isa<CallInst>(Inst) || isa<InvokeInst>(Inst)) {
@@ -197,9 +197,9 @@
         // pointer, not on query pointers that are indexed off of them.  It'd
         // be nice to handle that at some point.
         AliasAnalysis::AliasResult R = 
-          AA->alias(II->getOperand(3), ~0U, MemPtr, ~0U);
+          AA->alias(II->getOperand(2), ~0U, MemPtr, ~0U);
         if (R == AliasAnalysis::MustAlias) {
-          InvariantTag = II->getOperand(1);
+          InvariantTag = II->getOperand(0);
           continue;
         }
       
@@ -210,7 +210,7 @@
         // pointer, not on query pointers that are indexed off of them.  It'd
         // be nice to handle that at some point.
         AliasAnalysis::AliasResult R =
-          AA->alias(II->getOperand(2), ~0U, MemPtr, ~0U);
+          AA->alias(II->getOperand(1), ~0U, MemPtr, ~0U);
         if (R == AliasAnalysis::MustAlias)
           return MemDepResult::getDef(II);
       }
@@ -366,7 +366,7 @@
       MemSize = AA->getTypeStoreSize(LI->getType());
     }
   } else if (isFreeCall(QueryInst)) {
-    MemPtr = QueryInst->getOperand(1);
+    MemPtr = QueryInst->getOperand(0);
     // calls to free() erase the entire structure, not just a field.
     MemSize = ~0UL;
   } else if (isa<CallInst>(QueryInst) || isa<InvokeInst>(QueryInst)) {
@@ -378,12 +378,12 @@
     case Intrinsic::lifetime_start:
     case Intrinsic::lifetime_end:
     case Intrinsic::invariant_start:
-      MemPtr = QueryInst->getOperand(2);
-      MemSize = cast<ConstantInt>(QueryInst->getOperand(1))->getZExtValue();
+      MemPtr = QueryInst->getOperand(1);
+      MemSize = cast<ConstantInt>(QueryInst->getOperand(0))->getZExtValue();
       break;
     case Intrinsic::invariant_end:
-      MemPtr = QueryInst->getOperand(3);
-      MemSize = cast<ConstantInt>(QueryInst->getOperand(2))->getZExtValue();
+      MemPtr = QueryInst->getOperand(2);
+      MemSize = cast<ConstantInt>(QueryInst->getOperand(1))->getZExtValue();
       break;
     default:
       CallSite QueryCS = CallSite::get(QueryInst);

Modified: llvm/trunk/lib/Analysis/ValueTracking.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ValueTracking.cpp?rev=101397&r1=101396&r2=101397&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ValueTracking.cpp (original)
+++ llvm/trunk/lib/Analysis/ValueTracking.cpp Thu Apr 15 15:51:13 2010
@@ -953,7 +953,7 @@
   if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(I))
     // sqrt(-0.0) = -0.0, no other negative results are possible.
     if (II->getIntrinsicID() == Intrinsic::sqrt)
-      return CannotBeNegativeZero(II->getOperand(1), Depth+1);
+      return CannotBeNegativeZero(II->getOperand(0), Depth+1);
   
   if (const CallInst *CI = dyn_cast<CallInst>(I))
     if (const Function *F = CI->getCalledFunction()) {
@@ -966,7 +966,7 @@
         if (F->getName() == "fabsl") return true;
         if (F->getName() == "sqrt" || F->getName() == "sqrtf" ||
             F->getName() == "sqrtl")
-          return CannotBeNegativeZero(CI->getOperand(1), Depth+1);
+          return CannotBeNegativeZero(CI->getOperand(0), Depth+1);
       }
     }
   

Modified: llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp?rev=101397&r1=101396&r2=101397&view=diff
==============================================================================
--- llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp (original)
+++ llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp Thu Apr 15 15:51:13 2010
@@ -1134,24 +1134,23 @@
     Vals.push_back(cast<StoreInst>(I).isVolatile());
     break;
   case Instruction::Call: {
-    const PointerType *PTy = cast<PointerType>(I.getOperand(0)->getType());
+    const CallInst &CI = cast<CallInst>(I);
+    const PointerType *PTy = cast<PointerType>(CI.getCalledValue()->getType());
     const FunctionType *FTy = cast<FunctionType>(PTy->getElementType());
 
     Code = bitc::FUNC_CODE_INST_CALL;
 
-    const CallInst *CI = cast<CallInst>(&I);
-    Vals.push_back(VE.getAttributeID(CI->getAttributes()));
-    Vals.push_back((CI->getCallingConv() << 1) | unsigned(CI->isTailCall()));
-    PushValueAndType(CI->getOperand(0), InstID, Vals, VE);  // Callee
+    Vals.push_back(VE.getAttributeID(CI.getAttributes()));
+    Vals.push_back((CI.getCallingConv() << 1) | unsigned(CI.isTailCall()));
+    PushValueAndType(CI.getCalledValue(), InstID, Vals, VE);  // Callee
 
     // Emit value #'s for the fixed parameters.
     for (unsigned i = 0, e = FTy->getNumParams(); i != e; ++i)
-      Vals.push_back(VE.getValueID(I.getOperand(i+1)));  // fixed param.
+      Vals.push_back(VE.getValueID(I.getOperand(i)));  // fixed param.
 
     // Emit type/value pairs for varargs params.
     if (FTy->isVarArg()) {
-      unsigned NumVarargs = I.getNumOperands()-1-FTy->getNumParams();
-      for (unsigned i = I.getNumOperands()-NumVarargs, e = I.getNumOperands();
+      for (unsigned i = FTy->getNumParams(), e = I.getNumOperands()-1;
            i != e; ++i)
         PushValueAndType(I.getOperand(i), InstID, Vals, VE);  // varargs
     }

Modified: llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp?rev=101397&r1=101396&r2=101397&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp (original)
+++ llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp Thu Apr 15 15:51:13 2010
@@ -198,7 +198,7 @@
     bool IsCleanUp = (NumOps == 3);
 
     if (!IsCleanUp)
-      if (ConstantInt *CI = dyn_cast<ConstantInt>(SI->getOperand(3)))
+      if (ConstantInt *CI = dyn_cast<ConstantInt>(SI->getOperand(2)))
         IsCleanUp = (CI->getZExtValue() == 0);
 
     if (IsCleanUp)
@@ -237,7 +237,7 @@
     if (!Sel || Sel->getParent()->getParent() != F) continue;
 
     // Index of the ".llvm.eh.catch.all.value" variable.
-    unsigned OpIdx = Sel->getNumOperands() - 1;
+    unsigned OpIdx = Sel->getNumOperands() - 2;
     GlobalVariable *GV = dyn_cast<GlobalVariable>(Sel->getOperand(OpIdx));
     if (GV != EHCatchAllValue) continue;
     Sel->setOperand(OpIdx, EHCatchAllValue->getInitializer());
@@ -366,7 +366,7 @@
             bool IsCleanUp = (NumOps == 3);
 
             if (!IsCleanUp)
-              if (ConstantInt *CI = dyn_cast<ConstantInt>(II->getOperand(3)))
+              if (ConstantInt *CI = dyn_cast<ConstantInt>(II->getOperand(2)))
                 IsCleanUp = (CI->getZExtValue() == 0);
 
             if (IsCleanUp)
@@ -390,8 +390,8 @@
 
       // Use the exception object pointer and the personality function
       // from the original selector.
-      Args.push_back(II->getOperand(1)); // Exception object pointer.
-      Args.push_back(II->getOperand(2)); // Personality function.
+      Args.push_back(II->getOperand(0)); // Exception object pointer.
+      Args.push_back(II->getOperand(1)); // Personality function.
       Args.push_back(EHCatchAllValue->getInitializer()); // Catch-all indicator.
 
       CallInst *NewSelector =

Modified: llvm/trunk/lib/CodeGen/GCStrategy.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GCStrategy.cpp?rev=101397&r1=101396&r2=101397&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GCStrategy.cpp (original)
+++ llvm/trunk/lib/CodeGen/GCStrategy.cpp Thu Apr 15 15:51:13 2010
@@ -271,7 +271,7 @@
         case Intrinsic::gcwrite:
           if (LowerWr) {
             // Replace a write barrier with a simple store.
-            Value *St = new StoreInst(CI->getOperand(1), CI->getOperand(3), CI);
+            Value *St = new StoreInst(CI->getOperand(0), CI->getOperand(2), CI);
             CI->replaceAllUsesWith(St);
             CI->eraseFromParent();
           }
@@ -279,7 +279,7 @@
         case Intrinsic::gcread:
           if (LowerRd) {
             // Replace a read barrier with a simple load.
-            Value *Ld = new LoadInst(CI->getOperand(2), "", CI);
+            Value *Ld = new LoadInst(CI->getOperand(1), "", CI);
             Ld->takeName(CI);
             CI->replaceAllUsesWith(Ld);
             CI->eraseFromParent();
@@ -290,7 +290,7 @@
             // Initialize the GC root, but do not delete the intrinsic. The
             // backend needs the intrinsic to flag the stack slot.
             Roots.push_back(cast<AllocaInst>(
-                              CI->getOperand(1)->stripPointerCasts()));
+                              CI->getOperand(0)->stripPointerCasts()));
           }
           break;
         default:

Modified: llvm/trunk/lib/CodeGen/IntrinsicLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/IntrinsicLowering.cpp?rev=101397&r1=101396&r2=101397&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/IntrinsicLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/IntrinsicLowering.cpp Thu Apr 15 15:51:13 2010
@@ -308,21 +308,21 @@
 static void ReplaceFPIntrinsicWithCall(CallInst *CI, const char *Fname,
                                        const char *Dname,
                                        const char *LDname) {
-  switch (CI->getOperand(1)->getType()->getTypeID()) {
+  switch (CI->getOperand(0)->getType()->getTypeID()) {
   default: llvm_unreachable("Invalid type in intrinsic");
   case Type::FloatTyID:
-    ReplaceCallWith(Fname, CI, CI->op_begin() + 1, CI->op_end(),
+    ReplaceCallWith(Fname, CI, CI->op_begin(), CI->op_end() - 1,
                   Type::getFloatTy(CI->getContext()));
     break;
   case Type::DoubleTyID:
-    ReplaceCallWith(Dname, CI, CI->op_begin() + 1, CI->op_end(),
+    ReplaceCallWith(Dname, CI, CI->op_begin(), CI->op_end() - 1,
                   Type::getDoubleTy(CI->getContext()));
     break;
   case Type::X86_FP80TyID:
   case Type::FP128TyID:
   case Type::PPC_FP128TyID:
-    ReplaceCallWith(LDname, CI, CI->op_begin() + 1, CI->op_end(),
-                  CI->getOperand(1)->getType());
+    ReplaceCallWith(LDname, CI, CI->op_begin(), CI->op_end() - 1,
+                  CI->getOperand(0)->getType());
     break;
   }
 }
@@ -347,7 +347,7 @@
     // by the lowerinvoke pass.  In both cases, the right thing to do is to
     // convert the call to an explicit setjmp or longjmp call.
   case Intrinsic::setjmp: {
-    Value *V = ReplaceCallWith("setjmp", CI, CI->op_begin() + 1, CI->op_end(),
+    Value *V = ReplaceCallWith("setjmp", CI, CI->op_begin(), CI->op_end() - 1,
                                Type::getInt32Ty(Context));
     if (!CI->getType()->isVoidTy())
       CI->replaceAllUsesWith(V);
@@ -359,7 +359,7 @@
      break;
 
   case Intrinsic::longjmp: {
-    ReplaceCallWith("longjmp", CI, CI->op_begin() + 1, CI->op_end(),
+    ReplaceCallWith("longjmp", CI, CI->op_begin(), CI->op_end() - 1,
                     Type::getVoidTy(Context));
     break;
   }
@@ -371,20 +371,20 @@
     break;
   }
   case Intrinsic::ctpop:
-    CI->replaceAllUsesWith(LowerCTPOP(Context, CI->getOperand(1), CI));
+    CI->replaceAllUsesWith(LowerCTPOP(Context, CI->getOperand(0), CI));
     break;
 
   case Intrinsic::bswap:
-    CI->replaceAllUsesWith(LowerBSWAP(Context, CI->getOperand(1), CI));
+    CI->replaceAllUsesWith(LowerBSWAP(Context, CI->getOperand(0), CI));
     break;
     
   case Intrinsic::ctlz:
-    CI->replaceAllUsesWith(LowerCTLZ(Context, CI->getOperand(1), CI));
+    CI->replaceAllUsesWith(LowerCTLZ(Context, CI->getOperand(0), CI));
     break;
 
   case Intrinsic::cttz: {
     // cttz(x) -> ctpop(~X & (X-1))
-    Value *Src = CI->getOperand(1);
+    Value *Src = CI->getOperand(0);
     Value *NotSrc = Builder.CreateNot(Src);
     NotSrc->setName(Src->getName() + ".not");
     Value *SrcM1 = ConstantInt::get(Src->getType(), 1);
@@ -445,37 +445,37 @@
     
   case Intrinsic::memcpy: {
     const IntegerType *IntPtr = TD.getIntPtrType(Context);
-    Value *Size = Builder.CreateIntCast(CI->getOperand(3), IntPtr,
+    Value *Size = Builder.CreateIntCast(CI->getOperand(2), IntPtr,
                                         /* isSigned */ false);
     Value *Ops[3];
-    Ops[0] = CI->getOperand(1);
-    Ops[1] = CI->getOperand(2);
+    Ops[0] = CI->getOperand(0);
+    Ops[1] = CI->getOperand(1);
     Ops[2] = Size;
-    ReplaceCallWith("memcpy", CI, Ops, Ops+3, CI->getOperand(1)->getType());
+    ReplaceCallWith("memcpy", CI, Ops, Ops+3, CI->getOperand(0)->getType());
     break;
   }
   case Intrinsic::memmove: {
     const IntegerType *IntPtr = TD.getIntPtrType(Context);
-    Value *Size = Builder.CreateIntCast(CI->getOperand(3), IntPtr,
+    Value *Size = Builder.CreateIntCast(CI->getOperand(2), IntPtr,
                                         /* isSigned */ false);
     Value *Ops[3];
-    Ops[0] = CI->getOperand(1);
-    Ops[1] = CI->getOperand(2);
+    Ops[0] = CI->getOperand(0);
+    Ops[1] = CI->getOperand(1);
     Ops[2] = Size;
-    ReplaceCallWith("memmove", CI, Ops, Ops+3, CI->getOperand(1)->getType());
+    ReplaceCallWith("memmove", CI, Ops, Ops+3, CI->getOperand(0)->getType());
     break;
   }
   case Intrinsic::memset: {
     const IntegerType *IntPtr = TD.getIntPtrType(Context);
-    Value *Size = Builder.CreateIntCast(CI->getOperand(3), IntPtr,
+    Value *Size = Builder.CreateIntCast(CI->getOperand(2), IntPtr,
                                         /* isSigned */ false);
     Value *Ops[3];
-    Ops[0] = CI->getOperand(1);
+    Ops[0] = CI->getOperand(0);
     // Extend the amount to i32.
-    Ops[1] = Builder.CreateIntCast(CI->getOperand(2), Type::getInt32Ty(Context),
+    Ops[1] = Builder.CreateIntCast(CI->getOperand(1), Type::getInt32Ty(Context),
                                    /* isSigned */ false);
     Ops[2] = Size;
-    ReplaceCallWith("memset", CI, Ops, Ops+3, CI->getOperand(1)->getType());
+    ReplaceCallWith("memset", CI, Ops, Ops+3, CI->getOperand(0)->getType());
     break;
   }
   case Intrinsic::sqrt: {

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp?rev=101397&r1=101396&r2=101397&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp Thu Apr 15 15:51:13 2010
@@ -31,7 +31,6 @@
 #include "llvm/Target/TargetData.h"
 #include "llvm/Target/TargetFrameInfo.h"
 #include "llvm/Target/TargetInstrInfo.h"
-#include "llvm/Target/TargetIntrinsicInfo.h"
 #include "llvm/Target/TargetLowering.h"
 #include "llvm/Target/TargetOptions.h"
 #include "llvm/Support/Compiler.h"
@@ -310,7 +309,7 @@
 void llvm::AddCatchInfo(const CallInst &I, MachineModuleInfo *MMI,
                         MachineBasicBlock *MBB) {
   // Inform the MachineModuleInfo of the personality for this landing pad.
-  const ConstantExpr *CE = cast<ConstantExpr>(I.getOperand(2));
+  const ConstantExpr *CE = cast<ConstantExpr>(I.getOperand(1));
   assert(CE->getOpcode() == Instruction::BitCast &&
          isa<Function>(CE->getOperand(0)) &&
          "Personality should be a function");
@@ -319,9 +318,9 @@
   // Gather all the type infos for this landing pad and pass them along to
   // MachineModuleInfo.
   std::vector<const GlobalVariable *> TyInfo;
-  unsigned N = I.getNumOperands();
+  unsigned N = I.getNumOperands() - 1;
 
-  for (unsigned i = N - 1; i > 2; --i) {
+  for (unsigned i = N - 1; i > 1; --i) {
     if (const ConstantInt *CI = dyn_cast<ConstantInt>(I.getOperand(i))) {
       unsigned FilterLength = CI->getZExtValue();
       unsigned FirstCatch = i + FilterLength + !FilterLength;
@@ -351,9 +350,9 @@
     }
   }
 
-  if (N > 3) {
-    TyInfo.reserve(N - 3);
-    for (unsigned j = 3; j < N; ++j)
+  if (N > 2) {
+    TyInfo.reserve(N - 2);
+    for (unsigned j = 2; j < N; ++j)
       TyInfo.push_back(ExtractTypeInfo(I.getOperand(j)));
     MMI->addCatchTypeInfo(MBB, TyInfo);
   }

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=101397&r1=101396&r2=101397&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Thu Apr 15 15:51:13 2010
@@ -2771,7 +2771,7 @@
     Ops.push_back(DAG.getConstant(Intrinsic, TLI.getPointerTy()));
 
   // Add all operands of the call to the operand list.
-  for (unsigned i = 1, e = I.getNumOperands(); i != e; ++i) {
+  for (unsigned i = 0, e = I.getNumOperands()-1; i != e; ++i) {
     SDValue Op = getValue(I.getOperand(i));
     assert(TLI.isTypeLegal(Op.getValueType()) &&
            "Intrinsic uses a non-legal type?");
@@ -2877,11 +2877,11 @@
   SDValue Root = getRoot();
   SDValue L =
     DAG.getAtomic(Op, getCurDebugLoc(),
-                  getValue(I.getOperand(2)).getValueType().getSimpleVT(),
+                  getValue(I.getOperand(1)).getValueType().getSimpleVT(),
                   Root,
+                  getValue(I.getOperand(0)),
                   getValue(I.getOperand(1)),
-                  getValue(I.getOperand(2)),
-                  I.getOperand(1));
+                  I.getOperand(0));
   setValue(&I, L);
   DAG.setRoot(L.getValue(1));
   return 0;
@@ -2890,8 +2890,8 @@
 // implVisitAluOverflow - Lower arithmetic overflow instrinsics.
 const char *
 SelectionDAGBuilder::implVisitAluOverflow(const CallInst &I, ISD::NodeType Op) {
-  SDValue Op1 = getValue(I.getOperand(1));
-  SDValue Op2 = getValue(I.getOperand(2));
+  SDValue Op1 = getValue(I.getOperand(0));
+  SDValue Op2 = getValue(I.getOperand(1));
 
   SDVTList VTs = DAG.getVTList(Op1.getValueType(), MVT::i1);
   setValue(&I, DAG.getNode(Op, getCurDebugLoc(), VTs, Op1, Op2));
@@ -2905,9 +2905,9 @@
   SDValue result;
   DebugLoc dl = getCurDebugLoc();
 
-  if (getValue(I.getOperand(1)).getValueType() == MVT::f32 &&
+  if (getValue(I.getOperand(0)).getValueType() == MVT::f32 &&
       LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
-    SDValue Op = getValue(I.getOperand(1));
+    SDValue Op = getValue(I.getOperand(0));
 
     // Put the exponent in the right bit position for later addition to the
     // final result:
@@ -3017,8 +3017,8 @@
   } else {
     // No special expansion.
     result = DAG.getNode(ISD::FEXP, dl,
-                         getValue(I.getOperand(1)).getValueType(),
-                         getValue(I.getOperand(1)));
+                         getValue(I.getOperand(0)).getValueType(),
+                         getValue(I.getOperand(0)));
   }
 
   setValue(&I, result);
@@ -3031,9 +3031,9 @@
   SDValue result;
   DebugLoc dl = getCurDebugLoc();
 
-  if (getValue(I.getOperand(1)).getValueType() == MVT::f32 &&
+  if (getValue(I.getOperand(0)).getValueType() == MVT::f32 &&
       LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
-    SDValue Op = getValue(I.getOperand(1));
+    SDValue Op = getValue(I.getOperand(0));
     SDValue Op1 = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i32, Op);
 
     // Scale the exponent by log(2) [0.69314718f].
@@ -3127,8 +3127,8 @@
   } else {
     // No special expansion.
     result = DAG.getNode(ISD::FLOG, dl,
-                         getValue(I.getOperand(1)).getValueType(),
-                         getValue(I.getOperand(1)));
+                         getValue(I.getOperand(0)).getValueType(),
+                         getValue(I.getOperand(0)));
   }
 
   setValue(&I, result);
@@ -3141,9 +3141,9 @@
   SDValue result;
   DebugLoc dl = getCurDebugLoc();
 
-  if (getValue(I.getOperand(1)).getValueType() == MVT::f32 &&
+  if (getValue(I.getOperand(0)).getValueType() == MVT::f32 &&
       LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
-    SDValue Op = getValue(I.getOperand(1));
+    SDValue Op = getValue(I.getOperand(0));
     SDValue Op1 = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i32, Op);
 
     // Get the exponent.
@@ -3236,8 +3236,8 @@
   } else {
     // No special expansion.
     result = DAG.getNode(ISD::FLOG2, dl,
-                         getValue(I.getOperand(1)).getValueType(),
-                         getValue(I.getOperand(1)));
+                         getValue(I.getOperand(0)).getValueType(),
+                         getValue(I.getOperand(0)));
   }
 
   setValue(&I, result);
@@ -3250,9 +3250,9 @@
   SDValue result;
   DebugLoc dl = getCurDebugLoc();
 
-  if (getValue(I.getOperand(1)).getValueType() == MVT::f32 &&
+  if (getValue(I.getOperand(0)).getValueType() == MVT::f32 &&
       LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
-    SDValue Op = getValue(I.getOperand(1));
+    SDValue Op = getValue(I.getOperand(0));
     SDValue Op1 = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i32, Op);
 
     // Scale the exponent by log10(2) [0.30102999f].
@@ -3338,8 +3338,8 @@
   } else {
     // No special expansion.
     result = DAG.getNode(ISD::FLOG10, dl,
-                         getValue(I.getOperand(1)).getValueType(),
-                         getValue(I.getOperand(1)));
+                         getValue(I.getOperand(0)).getValueType(),
+                         getValue(I.getOperand(0)));
   }
 
   setValue(&I, result);
@@ -3352,9 +3352,9 @@
   SDValue result;
   DebugLoc dl = getCurDebugLoc();
 
-  if (getValue(I.getOperand(1)).getValueType() == MVT::f32 &&
+  if (getValue(I.getOperand(0)).getValueType() == MVT::f32 &&
       LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
-    SDValue Op = getValue(I.getOperand(1));
+    SDValue Op = getValue(I.getOperand(0));
 
     SDValue IntegerPartOfX = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::i32, Op);
 
@@ -3452,8 +3452,8 @@
   } else {
     // No special expansion.
     result = DAG.getNode(ISD::FEXP2, dl,
-                         getValue(I.getOperand(1)).getValueType(),
-                         getValue(I.getOperand(1)));
+                         getValue(I.getOperand(0)).getValueType(),
+                         getValue(I.getOperand(0)));
   }
 
   setValue(&I, result);
@@ -3464,12 +3464,12 @@
 void
 SelectionDAGBuilder::visitPow(const CallInst &I) {
   SDValue result;
-  const Value *Val = I.getOperand(1);
+  const Value *Val = I.getOperand(0);
   DebugLoc dl = getCurDebugLoc();
   bool IsExp10 = false;
 
   if (getValue(Val).getValueType() == MVT::f32 &&
-      getValue(I.getOperand(2)).getValueType() == MVT::f32 &&
+      getValue(I.getOperand(1)).getValueType() == MVT::f32 &&
       LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
     if (Constant *C = const_cast<Constant*>(dyn_cast<Constant>(Val))) {
       if (ConstantFP *CFP = dyn_cast<ConstantFP>(C)) {
@@ -3480,7 +3480,7 @@
   }
 
   if (IsExp10 && LimitFloatPrecision > 0 && LimitFloatPrecision <= 18) {
-    SDValue Op = getValue(I.getOperand(2));
+    SDValue Op = getValue(I.getOperand(1));
 
     // Put the exponent in the right bit position for later addition to the
     // final result:
@@ -3585,9 +3585,9 @@
   } else {
     // No special expansion.
     result = DAG.getNode(ISD::FPOW, dl,
-                         getValue(I.getOperand(1)).getValueType(),
-                         getValue(I.getOperand(1)),
-                         getValue(I.getOperand(2)));
+                         getValue(I.getOperand(0)).getValueType(),
+                         getValue(I.getOperand(0)),
+                         getValue(I.getOperand(1)));
   }
 
   setValue(&I, result);
@@ -3665,11 +3665,11 @@
   case Intrinsic::vacopy:   visitVACopy(I); return 0;
   case Intrinsic::returnaddress:
     setValue(&I, DAG.getNode(ISD::RETURNADDR, dl, TLI.getPointerTy(),
-                             getValue(I.getOperand(1))));
+                             getValue(I.getOperand(0))));
     return 0;
   case Intrinsic::frameaddress:
     setValue(&I, DAG.getNode(ISD::FRAMEADDR, dl, TLI.getPointerTy(),
-                             getValue(I.getOperand(1))));
+                             getValue(I.getOperand(0))));
     return 0;
   case Intrinsic::setjmp:
     return "_setjmp"+!TLI.usesUnderscoreSetJmp();
@@ -3678,63 +3678,63 @@
   case Intrinsic::memcpy: {
     // Assert for address < 256 since we support only user defined address
     // spaces.
-    assert(cast<PointerType>(I.getOperand(1)->getType())->getAddressSpace()
+    assert(cast<PointerType>(I.getOperand(0)->getType())->getAddressSpace()
            < 256 &&
-           cast<PointerType>(I.getOperand(2)->getType())->getAddressSpace()
+           cast<PointerType>(I.getOperand(1)->getType())->getAddressSpace()
            < 256 &&
            "Unknown address space");
-    SDValue Op1 = getValue(I.getOperand(1));
-    SDValue Op2 = getValue(I.getOperand(2));
-    SDValue Op3 = getValue(I.getOperand(3));
-    unsigned Align = cast<ConstantInt>(I.getOperand(4))->getZExtValue();
-    bool isVol = cast<ConstantInt>(I.getOperand(5))->getZExtValue();
+    SDValue Op1 = getValue(I.getOperand(0));
+    SDValue Op2 = getValue(I.getOperand(1));
+    SDValue Op3 = getValue(I.getOperand(2));
+    unsigned Align = cast<ConstantInt>(I.getOperand(3))->getZExtValue();
+    bool isVol = cast<ConstantInt>(I.getOperand(4))->getZExtValue();
     DAG.setRoot(DAG.getMemcpy(getRoot(), dl, Op1, Op2, Op3, Align, isVol, false,
-                              I.getOperand(1), 0, I.getOperand(2), 0));
+                              I.getOperand(0), 0, I.getOperand(1), 0));
     return 0;
   }
   case Intrinsic::memset: {
     // Assert for address < 256 since we support only user defined address
     // spaces.
-    assert(cast<PointerType>(I.getOperand(1)->getType())->getAddressSpace()
+    assert(cast<PointerType>(I.getOperand(0)->getType())->getAddressSpace()
            < 256 &&
            "Unknown address space");
-    SDValue Op1 = getValue(I.getOperand(1));
-    SDValue Op2 = getValue(I.getOperand(2));
-    SDValue Op3 = getValue(I.getOperand(3));
-    unsigned Align = cast<ConstantInt>(I.getOperand(4))->getZExtValue();
-    bool isVol = cast<ConstantInt>(I.getOperand(5))->getZExtValue();
+    SDValue Op1 = getValue(I.getOperand(0));
+    SDValue Op2 = getValue(I.getOperand(1));
+    SDValue Op3 = getValue(I.getOperand(2));
+    unsigned Align = cast<ConstantInt>(I.getOperand(3))->getZExtValue();
+    bool isVol = cast<ConstantInt>(I.getOperand(4))->getZExtValue();
     DAG.setRoot(DAG.getMemset(getRoot(), dl, Op1, Op2, Op3, Align, isVol,
-                              I.getOperand(1), 0));
+                              I.getOperand(0), 0));
     return 0;
   }
   case Intrinsic::memmove: {
     // Assert for address < 256 since we support only user defined address
     // spaces.
-    assert(cast<PointerType>(I.getOperand(1)->getType())->getAddressSpace()
+    assert(cast<PointerType>(I.getOperand(0)->getType())->getAddressSpace()
            < 256 &&
-           cast<PointerType>(I.getOperand(2)->getType())->getAddressSpace()
+           cast<PointerType>(I.getOperand(1)->getType())->getAddressSpace()
            < 256 &&
            "Unknown address space");
-    SDValue Op1 = getValue(I.getOperand(1));
-    SDValue Op2 = getValue(I.getOperand(2));
-    SDValue Op3 = getValue(I.getOperand(3));
-    unsigned Align = cast<ConstantInt>(I.getOperand(4))->getZExtValue();
-    bool isVol = cast<ConstantInt>(I.getOperand(5))->getZExtValue();
+    SDValue Op1 = getValue(I.getOperand(0));
+    SDValue Op2 = getValue(I.getOperand(1));
+    SDValue Op3 = getValue(I.getOperand(2));
+    unsigned Align = cast<ConstantInt>(I.getOperand(3))->getZExtValue();
+    bool isVol = cast<ConstantInt>(I.getOperand(4))->getZExtValue();
 
     // If the source and destination are known to not be aliases, we can
     // lower memmove as memcpy.
     uint64_t Size = -1ULL;
     if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op3))
       Size = C->getZExtValue();
-    if (AA->alias(I.getOperand(1), Size, I.getOperand(2), Size) ==
+    if (AA->alias(I.getOperand(0), Size, I.getOperand(1), Size) ==
         AliasAnalysis::NoAlias) {
       DAG.setRoot(DAG.getMemcpy(getRoot(), dl, Op1, Op2, Op3, Align, isVol, 
-                                false, I.getOperand(1), 0, I.getOperand(2), 0));
+                                false, I.getOperand(0), 0, I.getOperand(1), 0));
       return 0;
     }
 
     DAG.setRoot(DAG.getMemmove(getRoot(), dl, Op1, Op2, Op3, Align, isVol,
-                               I.getOperand(1), 0, I.getOperand(2), 0));
+                               I.getOperand(0), 0, I.getOperand(1), 0));
     return 0;
   }
   case Intrinsic::dbg_declare: {
@@ -3846,7 +3846,7 @@
     // Insert the EHSELECTION instruction.
     SDVTList VTs = DAG.getVTList(TLI.getPointerTy(), MVT::Other);
     SDValue Ops[2];
-    Ops[0] = getValue(I.getOperand(1));
+    Ops[0] = getValue(I.getOperand(0));
     Ops[1] = getRoot();
     SDValue Op = DAG.getNode(ISD::EHSELECTION, dl, VTs, Ops, 2);
     DAG.setRoot(Op.getValue(1));
@@ -3856,7 +3856,7 @@
 
   case Intrinsic::eh_typeid_for: {
     // Find the type id for the given typeinfo.
-    GlobalVariable *GV = ExtractTypeInfo(I.getOperand(1));
+    GlobalVariable *GV = ExtractTypeInfo(I.getOperand(0));
     unsigned TypeID = DAG.getMachineFunction().getMMI().getTypeIDFor(GV);
     Res = DAG.getConstant(TypeID, MVT::i32);
     setValue(&I, Res);
@@ -3869,15 +3869,15 @@
     DAG.setRoot(DAG.getNode(ISD::EH_RETURN, dl,
                             MVT::Other,
                             getControlRoot(),
-                            getValue(I.getOperand(1)),
-                            getValue(I.getOperand(2))));
+                            getValue(I.getOperand(0)),
+                            getValue(I.getOperand(1))));