From bigcheesegs at gmail.com Mon Aug 23 00:25:23 2010 From: bigcheesegs at gmail.com (Michael J. Spencer) Date: Mon, 23 Aug 2010 05:25:23 -0000 Subject: [llvm-commits] [llvm] r111793 - /llvm/trunk/lib/MC/MCAsmInfoCOFF.cpp Message-ID: <20100823052523.38C972A6C12C@llvm.org> Author: mspencer Date: Mon Aug 23 00:25:23 2010 New Revision: 111793 URL: http://llvm.org/viewvc/llvm-project?rev=111793&view=rev Log: Revert part of my last commit. the mingw32 build bot doesn't seem to like it. Modified: llvm/trunk/lib/MC/MCAsmInfoCOFF.cpp Modified: llvm/trunk/lib/MC/MCAsmInfoCOFF.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCAsmInfoCOFF.cpp?rev=111793&r1=111792&r2=111793&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCAsmInfoCOFF.cpp (original) +++ llvm/trunk/lib/MC/MCAsmInfoCOFF.cpp Mon Aug 23 00:25:23 2010 @@ -20,7 +20,6 @@ GlobalPrefix = "_"; COMMDirectiveAlignmentIsInBytes = false; HasLCOMMDirective = true; - HasSetDirective = false; HasDotTypeDotSizeDirective = false; HasSingleParameterDotFile = false; PrivateGlobalPrefix = "L"; // Prefix for private global symbols From clattner at apple.com Mon Aug 23 00:35:21 2010 From: clattner at apple.com (Chris Lattner) Date: Sun, 22 Aug 2010 22:35:21 -0700 Subject: [llvm-commits] [llvm] r111684 - in /llvm/trunk: docs/LangRef.html include/llvm-c/Core.h include/llvm/GlobalValue.h lib/AsmParser/LLLexer.cpp lib/AsmParser/LLParser.cpp lib/AsmParser/LLToken.h lib/Bitcode/Reader/BitcodeReader.cpp lib/Bitcode/Write In-Reply-To: <81607DD2-DD6C-4E14-8769-882545BFD736@gmail.com> References: <81607DD2-DD6C-4E14-8769-882545BFD736@gmail.com> Message-ID: On Aug 22, 2010, at 3:43 PM, Bill Wendling wrote: > On Aug 20, 2010, at 3:14 PM, Anton Korobeynikov wrote: > >>> Create the new linker type "linker_private_weak_def_auto". >> Maybe we should put a temporary veto on adding new linkage types? >> Or at least such patches deserve some discussion? >> Why is it not possible to emulate the behavior with some current >> linkage type and e.g. visibility setting? >> > Possibly? Though they do have differing semantics, so it could get confusing. How about this radical idea: > > We have a "linker_private" linkage type. Then there could be a few sub-linkage types: default, weak, weak_def_auto, some-other-crazy-sub-type, etc. Does that sound vaguely plausible? This doesn't seem like a very well formed proposal. It's hard to comment on it without substantially more details. -Chris From clattner at apple.com Mon Aug 23 00:36:14 2010 From: clattner at apple.com (Chris Lattner) Date: Sun, 22 Aug 2010 22:36:14 -0700 Subject: [llvm-commits] [PATCH] Bugpoint/Support: Fix llvm::FindExecutable not looking for files ending with .exe In-Reply-To: References: Message-ID: <4CAB5B77-B4EB-4E91-B861-D9DE27867AE7@apple.com> Works for me, go for it. -Chris On Aug 21, 2010, at 6:37 PM, Michael Spencer wrote: > llvm::FindExecutable was used in BugPoint with exe names that did not > end in .exe (which makes sense). To make this work on Windows I made > Path::canExecute check to see if there's a file with .exe appended > that can execute. > > - Michael Spencer > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From isanbard at gmail.com Mon Aug 23 01:55:48 2010 From: isanbard at gmail.com (Bill Wendling) Date: Sun, 22 Aug 2010 23:55:48 -0700 Subject: [llvm-commits] [llvm] r111684 - in /llvm/trunk: docs/LangRef.html include/llvm-c/Core.h include/llvm/GlobalValue.h lib/AsmParser/LLLexer.cpp lib/AsmParser/LLParser.cpp lib/AsmParser/LLToken.h lib/Bitcode/Reader/BitcodeReader.cpp lib/Bitcode/Write In-Reply-To: References: <81607DD2-DD6C-4E14-8769-882545BFD736@gmail.com> Message-ID: <38324D3F-BAF7-4577-B0FE-C321EE926691@gmail.com> On Aug 22, 2010, at 10:35 PM, Chris Lattner wrote: > On Aug 22, 2010, at 3:43 PM, Bill Wendling wrote: > >> On Aug 20, 2010, at 3:14 PM, Anton Korobeynikov wrote: >> >>>> Create the new linker type "linker_private_weak_def_auto". >>> Maybe we should put a temporary veto on adding new linkage types? >>> Or at least such patches deserve some discussion? >>> Why is it not possible to emulate the behavior with some current >>> linkage type and e.g. visibility setting? >>> >> Possibly? Though they do have differing semantics, so it could get confusing. How about this radical idea: >> >> We have a "linker_private" linkage type. Then there could be a few sub-linkage types: default, weak, weak_def_auto, some-other-crazy-sub-type, etc. Does that sound vaguely plausible? > > This doesn't seem like a very well formed proposal. It's hard to comment on it without substantially more details. > It wasn't meant to be, and I don't care enough about it to produce one. For me it's a non-issue. We've decided that adding new linkage types is the proper course of action for these types of optimizations, even if they're used on only one platform. -bw From nicholas at mxc.ca Mon Aug 23 02:23:24 2010 From: nicholas at mxc.ca (Nick Lewycky) Date: Mon, 23 Aug 2010 07:23:24 -0000 Subject: [llvm-commits] [www-pubs] r111799 - in /www-pubs/trunk: 2010-08-SBLP-SSI.html 2010-08-SBLP-SSI.pdf pubs.js Message-ID: <20100823072325.0E8F42A6C12C@llvm.org> Author: nicholas Date: Mon Aug 23 02:23:24 2010 New Revision: 111799 URL: http://llvm.org/viewvc/llvm-project?rev=111799&view=rev Log: Add a paper from the upcoming Brazilian Symposium on Programming Languages. Thanks to Andr? Tavares! Added: www-pubs/trunk/2010-08-SBLP-SSI.html www-pubs/trunk/2010-08-SBLP-SSI.pdf (with props) Modified: www-pubs/trunk/pubs.js Added: www-pubs/trunk/2010-08-SBLP-SSI.html URL: http://llvm.org/viewvc/llvm-project/www-pubs/trunk/2010-08-SBLP-SSI.html?rev=111799&view=auto ============================================================================== --- www-pubs/trunk/2010-08-SBLP-SSI.html (added) +++ www-pubs/trunk/2010-08-SBLP-SSI.html Mon Aug 23 02:23:24 2010 @@ -0,0 +1,101 @@ + + + + + + Efficient SSI Conversion + + + +
+ Efficient SSI Conversion +
+
+ André Tavares, Fernando Magno Pereira, Mariza Bigonha and +Roberto Bigonha +
+ +

Abstract:

+
+

+Static Single Information form (SSI) is a program +representation that enables optimizations such as array bound checking +elimination and conditional constant propagation. Transforming a program +into SSI form has a non-negligible impact on compilation time; but, only +a few SSI clients, that is, optimizations that use SSI, require a full +conversion. This paper describes the SSI framework we have implemented +for the LLVM compiler, and that is now part of this compiler's standard +distribution. In our design, optimizing passes inform the compiler a list +of variables of interest, which are then transformed to present, fully +or partially, the SSI properties. It is provided to each client only the +subset of SSI that the client needs. Our implementation orchestrates the +execution of clients in sequence, avoiding redundant work when two +clients request the conversion of the same variable. As empirically +demonstrated, in the context of an industrial strength compiler, our +approach saves compilation time and keeps the program representation +small, while enabling a vast array of code optimizations. +

+
+ +

Published:

+
+ "Efficient SSI Conversion" +
+ André Tavares and Fernando Magno Pereira and Mariza Bigonha and +Roberto Bigonha +
+ +In Proceedings of the 14th Brazilian Symposium on Programming Languages, + Salvador, Brazil, September 2010. +
+

Download:

+

Paper:

+ + +

BibTeX Entry:

+
+ at INPROCEEDINGS{x:2010,
+ AUTHOR="André Tavares and Fernando Magno Pereira and Mariza Bigonha and
+  Roberto Bigonha",
+ TITLE="Efficient SSI Conversion",
+ BOOKTITLE="SBLP 2010",
+ ADDRESS="",
+ DAYS="27-29",
+ MONTH="sep",
+ YEAR="2010",
+ ABSTRACT="Static Single Information form (SSI) is a program
+  representation that enables optimizations such as array bound checking
+  elimination and conditional constant propagation. Transforming a program
+  into SSI form has a non-negligible impact on compilation time; but, only
+  a few SSI clients, that is, optimizations that use SSI, require a full
+  conversion. This paper describes the SSI framework we have implemented
+  for the LLVM compiler, and that is now part of this compiler's standard
+  distribution.In our design, optimizing passes inform the compiler a list
+  of variables of interest, which are then transformed to present, fully
+  or partially, the SSI properties. It is provided to each client only the
+  subset of SSI that the client needs. Our implementation orchestrates the
+  execution of clients in sequence, avoiding redundant work when two
+  clients request the conversion of the same variable. As empirically
+  demonstrated, in the context of an industrial strength compiler, our
+  approach saves compilation time and keeps the program representation
+  small, while enabling a vast array of code optimizations.",
+ KEYWORDS="Program transformations; Program analysis and verification;
+  Compilation and interpretation techniques",
+ URL="http://llvm.org/pubs/2010-08-SBLP-SSI.pdf",
+ }
+
+ + + +
+ Valid CSS! + Valid HTML 4.01! + + + Added: www-pubs/trunk/2010-08-SBLP-SSI.pdf URL: http://llvm.org/viewvc/llvm-project/www-pubs/trunk/2010-08-SBLP-SSI.pdf?rev=111799&view=auto ============================================================================== Binary file - no diff available. Propchange: www-pubs/trunk/2010-08-SBLP-SSI.pdf ------------------------------------------------------------------------------ svn:mime-type = application/octet-stream Modified: www-pubs/trunk/pubs.js URL: http://llvm.org/viewvc/llvm-project/www-pubs/trunk/pubs.js?rev=111799&r1=111798&r2=111799&view=diff ============================================================================== --- www-pubs/trunk/pubs.js (original) +++ www-pubs/trunk/pubs.js Mon Aug 23 02:23:24 2010 @@ -1,6 +1,13 @@ // The array should be sorted reverse-chronologically, and will be displayed on // the page in the order listed. var PUBS = [ + {url: "2010-08-SBLP-SSI.html", + title: "Efficient SSI Conversion", + published: "Brazilian Symposium on Programming Languages 2010", + location: "Salvador, Brazil", + author: "André Tavares, Fernando Magno Pereira, Mariza Bigonha and Roberto Bigonha", + month: 9, + year: 2010}, {url: "2010-06-ISMM-CETS.html", title: "CETS: Compiler Enforced Temporal Safety for C", published: "International Conference on Memory Management 2010", From anton at korobeynikov.info Mon Aug 23 02:28:06 2010 From: anton at korobeynikov.info (Anton Korobeynikov) Date: Mon, 23 Aug 2010 11:28:06 +0400 Subject: [llvm-commits] [llvm] r111792 - in /llvm/trunk/lib: MC/MCAsmInfoCOFF.cpp Target/X86/X86ISelLowering.cpp In-Reply-To: <20100823044537.51C592A6C12C@llvm.org> References: <20100823044537.51C592A6C12C@llvm.org> Message-ID: > + ?// FIXME: Jump tables are currently broken for 64 bit COFF. > + ?// See PR7960. They are not. The problem is with coff emitter. Please revert. -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University From asl at math.spbu.ru Mon Aug 23 02:38:51 2010 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Mon, 23 Aug 2010 07:38:51 -0000 Subject: [llvm-commits] [llvm] r111801 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Message-ID: <20100823073851.A3E3F2A6C12D@llvm.org> Author: asl Date: Mon Aug 23 02:38:51 2010 New Revision: 111801 URL: http://llvm.org/viewvc/llvm-project?rev=111801&view=rev Log: Revert invalid r111792. Jump tables are not broken on x86-64 / coff, it's COFF emitter which does not support differences of two symbols (and needs to be fixed). GAS is pretty fine with code produced. Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=111801&r1=111800&r2=111801&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Aug 23 02:38:51 2010 @@ -1029,12 +1029,6 @@ maxStoresPerMemmove = 3; // For @llvm.memmove -> sequence of stores setPrefLoopAlignment(16); benefitFromCodePlacementOpt = true; - - // FIXME: Jump tables are currently broken for 64 bit COFF. - // See PR7960. - if (Subtarget->is64Bit() && Subtarget->isTargetCOFF()) { - DisableJumpTables = true; - } } From chandlerc at gmail.com Mon Aug 23 03:25:07 2010 From: chandlerc at gmail.com (Chandler Carruth) Date: Mon, 23 Aug 2010 08:25:07 -0000 Subject: [llvm-commits] [llvm] r111803 - in /llvm/trunk: lib/CodeGen/SelectionDAG/LegalizeDAG.cpp utils/TableGen/ClangAttrEmitter.cpp Message-ID: <20100823082507.5E8802A6C12C@llvm.org> Author: chandlerc Date: Mon Aug 23 03:25:07 2010 New Revision: 111803 URL: http://llvm.org/viewvc/llvm-project?rev=111803&view=rev Log: Fix some GCC warnings by providing a virtual destructor in the base of a class hierarchy with virtual methods and using llvm_unreachable to properly indicate unreachable states which would otherwise leave variables uninitialized. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp llvm/trunk/utils/TableGen/ClangAttrEmitter.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=111803&r1=111802&r2=111803&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Mon Aug 23 03:25:07 2010 @@ -1327,7 +1327,7 @@ break; case ISD::SEXTLOAD: ExtendOp = ISD::SIGN_EXTEND; break; case ISD::ZEXTLOAD: ExtendOp = ISD::ZERO_EXTEND; break; - default: assert(0 && "Unexpected extend load type!"); + default: llvm_unreachable("Unexpected extend load type!"); } Result = DAG.getNode(ExtendOp, dl, Node->getValueType(0), Load); Tmp1 = LegalizeOp(Result); // Relegalize new nodes. Modified: llvm/trunk/utils/TableGen/ClangAttrEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/ClangAttrEmitter.cpp?rev=111803&r1=111802&r2=111803&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/ClangAttrEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/ClangAttrEmitter.cpp Mon Aug 23 03:25:07 2010 @@ -71,6 +71,7 @@ upperName[0] = std::toupper(upperName[0]); } } + virtual ~Argument() {} StringRef getLowerName() const { return lowerName; } StringRef getUpperName() const { return upperName; } From chandlerc at gmail.com Mon Aug 23 03:54:19 2010 From: chandlerc at gmail.com (Chandler Carruth) Date: Mon, 23 Aug 2010 08:54:19 -0000 Subject: [llvm-commits] [llvm] r111805 - /llvm/trunk/test/Other/close-stderr.ll Message-ID: <20100823085419.780EF2A6C12C@llvm.org> Author: chandlerc Date: Mon Aug 23 03:54:19 2010 New Revision: 111805 URL: http://llvm.org/viewvc/llvm-project?rev=111805&view=rev Log: Try to escape the '$'s in these so they reach the underlying 'sh' invocation. I have no idea how lit did the right thing here, but other test runners don't. Modified: llvm/trunk/test/Other/close-stderr.ll Modified: llvm/trunk/test/Other/close-stderr.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Other/close-stderr.ll?rev=111805&r1=111804&r2=111805&view=diff ============================================================================== --- llvm/trunk/test/Other/close-stderr.ll (original) +++ llvm/trunk/test/Other/close-stderr.ll Mon Aug 23 03:54:19 2010 @@ -1,6 +1,6 @@ ; RUN: sh -c "\ -; RUN: opt --reject-this-option 2>&-; echo $?; \ -; RUN: opt -o /dev/null /dev/null 2>&-; echo $?; \ +; RUN: opt --reject-this-option 2>&-; echo \$?; \ +; RUN: opt -o /dev/null /dev/null 2>&-; echo \$?; \ ; RUN: " | FileCheck %s ; CHECK: {{^1$}} ; CHECK: {{^0$}} From geek4civic at gmail.com Mon Aug 23 05:06:53 2010 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Mon, 23 Aug 2010 19:06:53 +0900 Subject: [llvm-commits] [PATCH] Bugpoint/Support: Fix llvm::FindExecutable not looking for files ending with .exe In-Reply-To: <4CAB5B77-B4EB-4E91-B861-D9DE27867AE7@apple.com> References: <4CAB5B77-B4EB-4E91-B861-D9DE27867AE7@apple.com> Message-ID: Michael-san, Chris-san, An alternative patch is attached. Would you like a look into this? I thought that patch was incomplete. for example, assume path="c:/path/to/foo" and the executable "c:/path/to/foo.exe" exists. With that patch, path.canExecute() returns true. But Win32 CreateProcess("c:/path/to/foo", ...) fails even if "c:/path/to/foo.exe" exists. (CreateProcess does not add suffix.exe when directory part exists) I got succeeded to let test/BugPoint pass on mingw. Thank you in advance, ... Takumi ps. feel free to rewrite or modify my comments in this patch. -------------- next part -------------- diff --git a/lib/Support/SystemUtils.cpp b/lib/Support/SystemUtils.cpp index 299032f..609c98b 100644 --- a/lib/Support/SystemUtils.cpp +++ b/lib/Support/SystemUtils.cpp @@ -49,6 +49,11 @@ sys::Path llvm::FindExecutable(const std::string &ExeName, Result.appendComponent(ExeName); if (Result.canExecute()) return Result; + // Expect to retrieve the pathname with suffix .exe. + // It does not seek in PATH because Result has directory part. + sys::Path FoundPath = sys::Program::FindProgramByName(Result.str()); + if (FoundPath.canExecute()) + return FoundPath; } return sys::Path(); From jyasskin at google.com Mon Aug 23 06:46:25 2010 From: jyasskin at google.com (Jeffrey Yasskin) Date: Mon, 23 Aug 2010 12:46:25 +0100 Subject: [llvm-commits] JIT: Emitting a debug location after an instruction In-Reply-To: References: Message-ID: What problem are you trying to solve here? This patch looks like it'll assign the wrong line number to first instruction of any line, except when doing a backtrace. I'm not sure how existing debuggers assign line numbers to backtrace frames, but one simple fix might be to look up the line of the address before the one stored as the return address. Devang, why does this argument to processDebugLoc even exist? I don't see it used anywhere, you didn't update the MachineCodeEmitter.h comment to mention it, and your commit adding it only says "Update processDebugLoc() so that it can be used to process debug info before and after printing an instruction." On Sun, Aug 22, 2010 at 11:04 PM, nicolas geoffray wrote: > Hi, > The attached patch adds a flags to TargetOptions to control when a debug > location must be emitted when jitting. As of today, it could only be emitted > before the instruction was emitted. Because, at runtime, when walking the > call stack, return instructions point to the next instruction after the > call, I would like to emit a debug information after a call instruction. > I haven't found any alternative or existing approach in LLVM. Please let me > know if you know one, and/or what you think about the patch. > Thanks! > Nicolas > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > From nicolas.geoffray at gmail.com Mon Aug 23 06:51:59 2010 From: nicolas.geoffray at gmail.com (nicolas geoffray) Date: Mon, 23 Aug 2010 13:51:59 +0200 Subject: [llvm-commits] JIT: Emitting a debug location after an instruction In-Reply-To: References: Message-ID: On Mon, Aug 23, 2010 at 1:46 PM, Jeffrey Yasskin wrote: > What problem are you trying to solve here? This patch looks like it'll > assign the wrong line number to first instruction of any line, except > when doing a backtrace. The backtrace is exactly what I want to solve here :). Don't think lines, but PC. > I'm not sure how existing debuggers assign > line numbers to backtrace frames, but one simple fix might be to look > up the line of the address before the one stored as the return > address. > This does not work if I want precise information: I don't want the PC before or after and then do some kind of magic computation, but the exact one. Nicolas > Devang, why does this argument to processDebugLoc even exist? I don't > see it used anywhere, you didn't update the MachineCodeEmitter.h > comment to mention it, and your commit adding it only says "Update > processDebugLoc() so that it can be used to process debug info before > and after printing an instruction." > > On Sun, Aug 22, 2010 at 11:04 PM, nicolas geoffray > wrote: > > Hi, > > The attached patch adds a flags to TargetOptions to control when a debug > > location must be emitted when jitting. As of today, it could only be > emitted > > before the instruction was emitted. Because, at runtime, when walking the > > call stack, return instructions point to the next instruction after the > > call, I would like to emit a debug information after a call instruction. > > I haven't found any alternative or existing approach in LLVM. Please let > me > > know if you know one, and/or what you think about the patch. > > Thanks! > > Nicolas > > _______________________________________________ > > llvm-commits mailing list > > llvm-commits at cs.uiuc.edu > > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > > > > -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20100823/aab98a79/attachment.html From jyasskin at google.com Mon Aug 23 07:13:44 2010 From: jyasskin at google.com (Jeffrey Yasskin) Date: Mon, 23 Aug 2010 13:13:44 +0100 Subject: [llvm-commits] JIT: Emitting a debug location after an instruction In-Reply-To: References: Message-ID: On Mon, Aug 23, 2010 at 12:51 PM, nicolas geoffray wrote: > On Mon, Aug 23, 2010 at 1:46 PM, Jeffrey Yasskin > wrote: >> >> What problem are you trying to solve here? This patch looks like it'll >> assign the wrong line number to first instruction of any line, except >> when doing a backtrace. > > The backtrace is exactly what I want to solve here :). Don't think lines, > but PC. processDebugLoc() matches a line to a PC, so I'm not sure how to avoid thinking about lines. What bad behavior are you seeing? The wrong line assigned to a backtrace frame? Or something else? >> I'm not sure how existing debuggers assign >> line numbers to backtrace frames, but one simple fix might be to look >> up the line of the address before the one stored as the return >> address. > > This does not work if I want precise information: I don't want the PC before > or after and then do some kind of magic computation, but the exact one. A line number always applies to a range (or several ranges) of addresses. You can look up any address in that range, and get the precise line number. I guess I'm missing what information you need to be precise. From nicolas.geoffray at gmail.com Mon Aug 23 07:23:13 2010 From: nicolas.geoffray at gmail.com (nicolas geoffray) Date: Mon, 23 Aug 2010 14:23:13 +0200 Subject: [llvm-commits] JIT: Emitting a debug location after an instruction In-Reply-To: References: Message-ID: Sorry for not being clear: when JIT compiling I attach line information to calls. At runtime, when walking the stack, I have the return addresses and hence the instruction *after* the call. So currently, I do some computation magic to find the line number, but I would like the line information to be attached to the next machine instruction after the call. If I attach the line number information to another LLVM instruction (say the one next to the call), who knows where that instruction may end up after LLVM optimizations. So this is not an option. Nicolas On Mon, Aug 23, 2010 at 2:13 PM, Jeffrey Yasskin wrote: > On Mon, Aug 23, 2010 at 12:51 PM, nicolas geoffray > wrote: > > On Mon, Aug 23, 2010 at 1:46 PM, Jeffrey Yasskin > > wrote: > >> > >> What problem are you trying to solve here? This patch looks like it'll > >> assign the wrong line number to first instruction of any line, except > >> when doing a backtrace. > > > > The backtrace is exactly what I want to solve here :). Don't think lines, > > but PC. > > processDebugLoc() matches a line to a PC, so I'm not sure how to avoid > thinking about lines. What bad behavior are you seeing? The wrong line > assigned to a backtrace frame? Or something else? > > >> I'm not sure how existing debuggers assign > >> line numbers to backtrace frames, but one simple fix might be to look > >> up the line of the address before the one stored as the return > >> address. > > > > This does not work if I want precise information: I don't want the PC > before > > or after and then do some kind of magic computation, but the exact one. > > A line number always applies to a range (or several ranges) of > addresses. You can look up any address in that range, and get the > precise line number. I guess I'm missing what information you need to > be precise. > -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20100823/b1fdd865/attachment.html From jyasskin at google.com Mon Aug 23 07:57:20 2010 From: jyasskin at google.com (Jeffrey Yasskin) Date: Mon, 23 Aug 2010 13:57:20 +0100 Subject: [llvm-commits] JIT: Emitting a debug location after an instruction In-Reply-To: References: Message-ID: On Mon, Aug 23, 2010 at 1:23 PM, nicolas geoffray wrote: > Sorry for not being clear: when JIT compiling I attach line information to > calls. At runtime, when walking the stack, I have the return addresses and > hence the instruction *after* the call. So currently, I do some computation > magic to find the line number, but I would like the line information to be > attached to the next machine instruction after the call. Do you _only_ attach line information to calls, or also to each other instruction? If it's only to the calls, do you just not provide line numbers for the leaf frame? If you do provide line numbers for the leaf frame, are you worried about providing the wrong number just after returning from a call? The line number debug information is generally compressed into a table of (address, line) pairs, sorted by the address. Then you search the leaf frame using "std::upper_bound(table, PC)-1". This lets you transform (a1, 15), (a2, 15), (a3, 15), (a4, 16) into (a1, 15), (a4 16) because looking up a3 using upper_bound will still find line 15, and JITEmitter::processDebugLoc does this for you with the "PrevDL != DL" check. For non-leaf frames, you'd search with "std::upper_bound(table, PC-1)-1" instead. Using "PC-1" for non-leaf frames doesn't seem terribly magic to me. Am I still misunderstanding? > If I attach the line number information to another LLVM instruction (say the > one next to the call), who knows where that instruction may end up after > LLVM optimizations. So this is not an option. Yes, putting an incorrect line number on IR-level instructions wouldn't work reliably. > On Mon, Aug 23, 2010 at 2:13 PM, Jeffrey Yasskin > wrote: >> >> On Mon, Aug 23, 2010 at 12:51 PM, nicolas geoffray >> wrote: >> > On Mon, Aug 23, 2010 at 1:46 PM, Jeffrey Yasskin >> > wrote: >> >> >> >> What problem are you trying to solve here? This patch looks like it'll >> >> assign the wrong line number to first instruction of any line, except >> >> when doing a backtrace. >> > >> > The backtrace is exactly what I want to solve here :). Don't think >> > lines, >> > but PC. >> >> processDebugLoc() matches a line to a PC, so I'm not sure how to avoid >> thinking about lines. What bad behavior are you seeing? The wrong line >> assigned to a backtrace frame? Or something else? >> >> >> I'm not sure how existing debuggers assign >> >> line numbers to backtrace frames, but one simple fix might be to look >> >> up the line of the address before the one stored as the return >> >> address. >> > >> > This does not work if I want precise information: I don't want the PC >> > before >> > or after and then do some kind of magic computation, but the exact one. >> >> A line number always applies to a range (or several ranges) of >> addresses. You can look up any address in that range, and get the >> precise line number. I guess I'm missing what information you need to >> be precise. > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > From bigcheesegs at gmail.com Mon Aug 23 08:28:40 2010 From: bigcheesegs at gmail.com (Michael Spencer) Date: Mon, 23 Aug 2010 09:28:40 -0400 Subject: [llvm-commits] [PATCH] Bugpoint/Support: Fix llvm::FindExecutable not looking for files ending with .exe In-Reply-To: References: <4CAB5B77-B4EB-4E91-B861-D9DE27867AE7@apple.com> Message-ID: On Mon, Aug 23, 2010 at 6:06 AM, NAKAMURA Takumi wrote: > Michael-san, > Chris-san, > > An alternative patch is attached. Would you like a look into this? > > I thought that patch was incomplete. > for example, assume path="c:/path/to/foo" and the executable > "c:/path/to/foo.exe" exists. > > With that patch, path.canExecute() returns true. > But Win32 CreateProcess("c:/path/to/foo", ...) fails even if > "c:/path/to/foo.exe" exists. > (CreateProcess does not add suffix.exe when directory part exists) > > I got succeeded to let test/BugPoint pass on mingw. > > > Thank you in advance, ... Takumi > > > ps. feel free to rewrite or modify my comments in this patch. > Takumi is correct that my patch is not complete. It fails on windows also if the llvm tools are not in PATH. I'll take a look at your patch and thanks for finding this problem and fixing it. - Michael Spencer From bigcheesegs at gmail.com Mon Aug 23 08:34:37 2010 From: bigcheesegs at gmail.com (Michael Spencer) Date: Mon, 23 Aug 2010 09:34:37 -0400 Subject: [llvm-commits] [llvm] r111792 - in /llvm/trunk/lib: MC/MCAsmInfoCOFF.cpp Target/X86/X86ISelLowering.cpp In-Reply-To: References: <20100823044537.51C592A6C12C@llvm.org> Message-ID: On Mon, Aug 23, 2010 at 3:28 AM, Anton Korobeynikov wrote: >> + ?// FIXME: Jump tables are currently broken for 64 bit COFF. >> + ?// See PR7960. > They are not. The problem is with coff emitter. Please revert. > > -- > With best regards, Anton Korobeynikov > Faculty of Mathematics and Mechanics, Saint Petersburg State University Posting the discussion we had on IRC for future reference. [09:13] aKor: how is it the COFF emitter? x86-64 COFF cannot represent any of the available jump table methods. It is a limitation of the file format. [09:13] Bigcheese: given that you can compile stuff with gas... [09:17] The alternative is to leave x86-64 COFF broken. I don't agree that it is the responsibility of the COFF backend to take invalid relocations and force them to work. [09:17] I'll revert it because it affects mingw64 [09:18] right, there should be proper fix [09:18] not just "disable all jump tables" [09:19] gas is doing some weird crap with COFF. [09:19] given that coff emitter is wip it's not a problem to have it not handle some cases [09:19] the set directive shouldn't work either. From anton at korobeynikov.info Mon Aug 23 08:38:56 2010 From: anton at korobeynikov.info (Anton Korobeynikov) Date: Mon, 23 Aug 2010 17:38:56 +0400 Subject: [llvm-commits] [llvm] r111792 - in /llvm/trunk/lib: MC/MCAsmInfoCOFF.cpp Target/X86/X86ISelLowering.cpp In-Reply-To: References: <20100823044537.51C592A6C12C@llvm.org> Message-ID: > [09:13] aKor: how is it the COFF emitter? x86-64 COFF > cannot represent any of the available jump table methods. It is a > limitation of the file format. > [09:13] Bigcheese: given that you can compile stuff with gas... > [09:17] The alternative is to leave x86-64 COFF broken. I > don't agree that it is the responsibility of the COFF backend to take > invalid relocations and force them to work. > [09:17] I'll revert it because it affects mingw64 > [09:18] right, there should be proper fix > [09:18] not just "disable all jump tables" > [09:19] gas is doing some weird crap with COFF. > [09:19] given that coff emitter is wip it's not a problem to > have it not handle some cases > [09:19] the set directive shouldn't work either. Just some follow-up: the problem is that is seems COFF emitter does not support symbol differences. I agree this big problem when two symbols are located in different sections: quite few object file formats can tolerate this. However, in the case in question, the difference is made from the symbols located in the same section. This should be not so hard to support. -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University From nicolas.geoffray at gmail.com Mon Aug 23 09:28:18 2010 From: nicolas.geoffray at gmail.com (nicolas geoffray) Date: Mon, 23 Aug 2010 16:28:18 +0200 Subject: [llvm-commits] JIT: Emitting a debug location after an instruction In-Reply-To: References: Message-ID: On Mon, Aug 23, 2010 at 2:57 PM, Jeffrey Yasskin wrote: > > Do you _only_ attach line information to calls, or also to each other > instruction? I only attach line (or more precisely metadata) information to calls. > If it's only to the calls, do you just not provide line > numbers for the leaf frame? If you do provide line numbers for the > leaf frame, are you worried about providing the wrong number just > after returning from a call? > I don't have leaf frames. > > The line number debug information is generally compressed into a table > of (address, line) pairs, sorted by the address. Then you search the > leaf frame using "std::upper_bound(table, PC)-1". The code that looks up the method from the PC is performance sensitive, so using upper_bound is not ideal. Nicolas -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20100823/73731557/attachment.html From geek4civic at gmail.com Mon Aug 23 09:37:11 2010 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Mon, 23 Aug 2010 23:37:11 +0900 Subject: [llvm-commits] [PATCH] Win32's Hybrid path separator in argv[0] should be accepted to bugpoint Message-ID: Hello guys, I saw argv[0], as below, with mingw-configured Python/w32 lit. "c:/path/to/build/Release+Asserts/bin\bugpoint.exe" Bugpoint assumes path separator consists only with '/' to extract directory as "c:/path/to/build/Release+Asserts". (w/o "bin") My patch, attached, canonicalize BugDriver::ToolName(==argv[0]) with llvm::sys::Path. confirmed on cygwin and ppc-f12. Please take a look into my patch, thank you. ...Takumi -------------- next part -------------- diff --git a/tools/bugpoint/BugDriver.cpp b/tools/bugpoint/BugDriver.cpp index 6966671..211ce70 100644 --- a/tools/bugpoint/BugDriver.cpp +++ b/tools/bugpoint/BugDriver.cpp @@ -128,7 +128,8 @@ bool BugDriver::addSources(const std::vector &Filenames) { outs() << "Linking in input file: '" << Filenames[i] << "'\n"; std::string ErrorMessage; if (Linker::LinkModules(Program, M.get(), &ErrorMessage)) { - errs() << ToolName << ": error linking in '" << Filenames[i] << "': " + errs() << ToolName.str() + << ": error linking in '" << Filenames[i] << "': " << ErrorMessage << '\n'; return true; } diff --git a/tools/bugpoint/BugDriver.h b/tools/bugpoint/BugDriver.h index e48806a..ce0d495 100644 --- a/tools/bugpoint/BugDriver.h +++ b/tools/bugpoint/BugDriver.h @@ -17,6 +17,7 @@ #define BUGDRIVER_H #include "llvm/ADT/ValueMap.h" +#include "llvm/System/Path.h" #include #include @@ -44,7 +45,7 @@ extern bool BugpointIsInterrupted; class BugDriver { LLVMContext& Context; - const char *ToolName; // argv[0] of bugpoint + const sys::Path ToolName; // argv[0] of bugpoint std::string ReferenceOutputFile; // Name of `good' output file Module *Program; // The raw program, linked together std::vector PassesToRun; @@ -66,7 +67,7 @@ public: LLVMContext& ctxt); ~BugDriver(); - const char *getToolName() const { return ToolName; } + const char *getToolName() const { return ToolName.str().c_str(); } LLVMContext& getContext() const { return Context; } diff --git a/tools/bugpoint/ExecutionDriver.cpp b/tools/bugpoint/ExecutionDriver.cpp index 7312484..c9b5908 100644 --- a/tools/bugpoint/ExecutionDriver.cpp +++ b/tools/bugpoint/ExecutionDriver.cpp @@ -298,12 +298,12 @@ void BugDriver::compileProgram(Module *M, std::string *Error) const { sys::Path BitcodeFile (OutputPrefix + "-test-program.bc"); std::string ErrMsg; if (BitcodeFile.makeUnique(true, &ErrMsg)) { - errs() << ToolName << ": Error making unique filename: " << ErrMsg + errs() << ToolName.str() << ": Error making unique filename: " << ErrMsg << "\n"; exit(1); } if (writeProgramToFile(BitcodeFile.str(), M)) { - errs() << ToolName << ": Error emitting bitcode to file '" + errs() << ToolName.str() << ": Error emitting bitcode to file '" << BitcodeFile.str() << "'!\n"; exit(1); } @@ -334,14 +334,14 @@ std::string BugDriver::executeProgram(const Module *Program, // Emit the program to a bitcode file... sys::Path uniqueFilename(OutputPrefix + "-test-program.bc"); if (uniqueFilename.makeUnique(true, &ErrMsg)) { - errs() << ToolName << ": Error making unique filename: " + errs() << ToolName.str() << ": Error making unique filename: " << ErrMsg << "!\n"; exit(1); } BitcodeFile = uniqueFilename.str(); if (writeProgramToFile(BitcodeFile, Program)) { - errs() << ToolName << ": Error emitting bitcode to file '" + errs() << ToolName.str() << ": Error emitting bitcode to file '" << BitcodeFile << "'!\n"; exit(1); } @@ -357,7 +357,7 @@ std::string BugDriver::executeProgram(const Module *Program, // Check to see if this is a valid output filename... sys::Path uniqueFile(OutputFile); if (uniqueFile.makeUnique(true, &ErrMsg)) { - errs() << ToolName << ": Error making unique filename: " + errs() << ToolName.str() << ": Error making unique filename: " << ErrMsg << "\n"; exit(1); } diff --git a/tools/bugpoint/OptimizerDriver.cpp b/tools/bugpoint/OptimizerDriver.cpp index ffd4099..e0b3862 100644 --- a/tools/bugpoint/OptimizerDriver.cpp +++ b/tools/bugpoint/OptimizerDriver.cpp @@ -139,12 +139,11 @@ bool BugDriver::runPasses(Module *Program, // setup the child process' arguments SmallVector Args; std::string Opt; - llvm::StringRef TN(ToolName); + llvm::StringRef TN(ToolName.str()); if (TN.find('/') == llvm::StringRef::npos) { Opt = "opt"; } else { - std::pair P = TN.rsplit('/'); - Opt = P.first.str() + "/" + "opt"; + Opt = ToolName.getDirname().str() + "/" + "opt"; } sys::Path tool = sys::Program::FindProgramByName(Opt); From criswell at uiuc.edu Mon Aug 23 10:41:30 2010 From: criswell at uiuc.edu (John Criswell) Date: Mon, 23 Aug 2010 15:41:30 -0000 Subject: [llvm-commits] [poolalloc] r111810 - in /poolalloc/trunk: include/dsa/DataStructure.h lib/DSA/CompleteBottomUp.cpp lib/DSA/EquivClassGraphs.cpp Message-ID: <20100823154130.104582A6C12C@llvm.org> Author: criswell Date: Mon Aug 23 10:41:29 2010 New Revision: 111810 URL: http://llvm.org/viewvc/llvm-project?rev=111810&view=rev Log: Fixed a bug in CBU in which subsequent call sites would not be processed after a particular call site was not processed. Removed a dead argument fro the buildIndirectFunctionSets() method. Added more comments to the CBU code. Modified: poolalloc/trunk/include/dsa/DataStructure.h poolalloc/trunk/lib/DSA/CompleteBottomUp.cpp poolalloc/trunk/lib/DSA/EquivClassGraphs.cpp Modified: poolalloc/trunk/include/dsa/DataStructure.h URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/dsa/DataStructure.h?rev=111810&r1=111809&r2=111810&view=diff ============================================================================== --- poolalloc/trunk/include/dsa/DataStructure.h (original) +++ poolalloc/trunk/include/dsa/DataStructure.h Mon Aug 23 10:41:29 2010 @@ -262,7 +262,7 @@ /// class CompleteBUDataStructures : public BUDataStructures { protected: - void buildIndirectFunctionSets(Module &M); + void buildIndirectFunctionSets (void); public: static char ID; CompleteBUDataStructures(intptr_t CID = (intptr_t)&ID, Modified: poolalloc/trunk/lib/DSA/CompleteBottomUp.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/CompleteBottomUp.cpp?rev=111810&r1=111809&r2=111810&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/CompleteBottomUp.cpp (original) +++ poolalloc/trunk/lib/DSA/CompleteBottomUp.cpp Mon Aug 23 10:41:29 2010 @@ -28,13 +28,22 @@ char CompleteBUDataStructures::ID; -// run - Calculate the bottom up data structure graphs for each function in the -// program. // -bool CompleteBUDataStructures::runOnModule(Module &M) { +// Method: runOnModule() +// +// Description: +// Entry point for this pass. Calculate the bottom up data structure graphs +// for each function in the program. +// +// Return value: +// true - The module was modified. +// false - The module was not modified. +// +bool +CompleteBUDataStructures::runOnModule (Module &M) { init(&getAnalysis(), false, true, false, true); - buildIndirectFunctionSets(M); + buildIndirectFunctionSets(); formGlobalECs(); // @@ -55,11 +64,20 @@ return modified; } -void CompleteBUDataStructures::buildIndirectFunctionSets(Module &M) { +// +// Method: buildIndirectFunctionSets() +// +// Description: +// For every indirect call site, ensure that every function target is +// associated with a single DSNode. +// +void +CompleteBUDataStructures::buildIndirectFunctionSets (void) { + // // Loop over all of the indirect calls in the program. If a call site can // call multiple different functions, we need to unify all of the callees into // the same equivalence class. - + // DSGraph* G = getGlobalsGraph(); DSGraph::ScalarMapTy& SM = G->getScalarMap(); @@ -90,8 +108,21 @@ } #endif + // + // Note: The code above and below is dealing with the fact that the targets + // of *direct* function calls do not show up in the Scalar Map of the + // globals graph. The above assertion simply verifies that all targets of + // indirect function calls show up in the Scalar Map of the globals graph, + // and then the code below can just check the scalar map to see if the + // call needs to be processed because it is an indirect function call. + // + // I suspect that this code is designed this way more for historical + // reasons than for simplicity. We should simplify the code is possible at + // a future date. + // // FIXME: Given the above is a valid assertion, we could probably replace - // this code with something that *assumes* we have entries. However because + // this code with something that *assumes* we have entries in the Scalar + // Map. However, because // I'm not convinced that we can just *skip* direct calls in this function // this code is careful to handle callees not existing in the globals graph // In other words what we have here should be correct, but might be overkill @@ -104,8 +135,10 @@ while (csi != cse && !SM.count(*csi)) ++csi; - // If we have no entries, we're done. - if (csi == cse) break; + // + // If we have no entries, we're done. Move on to the next call site. + // + if (csi == cse) continue; DSNodeHandle& SrcNH = SM.find(*csi)->second; Modified: poolalloc/trunk/lib/DSA/EquivClassGraphs.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/EquivClassGraphs.cpp?rev=111810&r1=111809&r2=111810&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/EquivClassGraphs.cpp (original) +++ poolalloc/trunk/lib/DSA/EquivClassGraphs.cpp Mon Aug 23 10:41:29 2010 @@ -42,7 +42,7 @@ init(&getAnalysis(), false, true, false, true); //update the EQ class from indirect calls - buildIndirectFunctionSets(M); + buildIndirectFunctionSets(); mergeGraphsByGlobalECs(); From sabre at nondot.org Mon Aug 23 12:30:29 2010 From: sabre at nondot.org (Chris Lattner) Date: Mon, 23 Aug 2010 17:30:29 -0000 Subject: [llvm-commits] [llvm] r111813 - /llvm/trunk/lib/Target/X86/README-SSE.txt Message-ID: <20100823173029.911E52A6C12D@llvm.org> Author: lattner Date: Mon Aug 23 12:30:29 2010 New Revision: 111813 URL: http://llvm.org/viewvc/llvm-project?rev=111813&view=rev Log: random improvement for variable shift codegen. Modified: llvm/trunk/lib/Target/X86/README-SSE.txt Modified: llvm/trunk/lib/Target/X86/README-SSE.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README-SSE.txt?rev=111813&r1=111812&r2=111813&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/README-SSE.txt (original) +++ llvm/trunk/lib/Target/X86/README-SSE.txt Mon Aug 23 12:30:29 2010 @@ -2,8 +2,20 @@ // Random ideas for the X86 backend: SSE-specific stuff. //===---------------------------------------------------------------------===// -- Consider eliminating the unaligned SSE load intrinsics, replacing them with - unaligned LLVM load instructions. +//===---------------------------------------------------------------------===// + +SSE Variable shift can be custom lowered to something like this, which uses a +small table + unaligned load + shuffle instead of going through memory. + +__m128i_shift_right: + .byte 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 + .byte -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 + +... +__m128i shift_right(__m128i value, unsigned long offset) { + return _mm_shuffle_epi8(value, + _mm_loadu_si128((__m128 *) (___m128i_shift_right + offset))); +} //===---------------------------------------------------------------------===// From benny.kra at googlemail.com Mon Aug 23 12:44:13 2010 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Mon, 23 Aug 2010 17:44:13 -0000 Subject: [llvm-commits] [llvm] r111814 - /llvm/trunk/include/llvm/ADT/StringRef.h Message-ID: <20100823174413.C7BD62A6C12C@llvm.org> Author: d0k Date: Mon Aug 23 12:44:13 2010 New Revision: 111814 URL: http://llvm.org/viewvc/llvm-project?rev=111814&view=rev Log: StringRef tweaks: - Respect find_first_of(char's From parameter instead of silently dropping it. - Prefer std::string() to std::string("") Modified: llvm/trunk/include/llvm/ADT/StringRef.h Modified: llvm/trunk/include/llvm/ADT/StringRef.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/StringRef.h?rev=111814&r1=111813&r2=111814&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/StringRef.h (original) +++ llvm/trunk/include/llvm/ADT/StringRef.h Mon Aug 23 12:44:13 2010 @@ -150,7 +150,7 @@ /// str - Get the contents as an std::string. std::string str() const { - if (Data == 0) return ""; + if (Data == 0) return std::string(); return std::string(Data, Length); } @@ -231,7 +231,9 @@ /// find_first_of - Find the first character in the string that is \arg C, /// or npos if not found. Same as find. - size_type find_first_of(char C, size_t = 0) const { return find(C); } + size_type find_first_of(char C, size_t From = 0) const { + return find(C, From); + } /// find_first_of - Find the first character in the string that is in \arg /// Chars, or npos if not found. From resistor at mac.com Mon Aug 23 12:52:01 2010 From: resistor at mac.com (Owen Anderson) Date: Mon, 23 Aug 2010 17:52:01 -0000 Subject: [llvm-commits] [llvm] r111815 - in /llvm/trunk/lib: Analysis/ Analysis/IPA/ CodeGen/ Transforms/Scalar/ Transforms/Utils/ VMCore/ Message-ID: <20100823175201.D34F52A6C12C@llvm.org> Author: resistor Date: Mon Aug 23 12:52:01 2010 New Revision: 111815 URL: http://llvm.org/viewvc/llvm-project?rev=111815&view=rev Log: Now that PassInfo and Pass::ID have been separated, move the rest of the passes over to the new registration API. Modified: llvm/trunk/lib/Analysis/CFGPrinter.cpp llvm/trunk/lib/Analysis/IPA/GlobalsModRef.cpp llvm/trunk/lib/Analysis/ProfileEstimatorPass.cpp llvm/trunk/lib/Analysis/ProfileInfoLoaderPass.cpp llvm/trunk/lib/CodeGen/MachineDominators.cpp llvm/trunk/lib/CodeGen/MachineLoopInfo.cpp llvm/trunk/lib/CodeGen/MachineVerifier.cpp llvm/trunk/lib/CodeGen/PHIElimination.cpp llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp llvm/trunk/lib/CodeGen/UnreachableBlockElim.cpp llvm/trunk/lib/Transforms/Scalar/LowerAtomic.cpp llvm/trunk/lib/Transforms/Scalar/Reg2Mem.cpp llvm/trunk/lib/Transforms/Utils/BreakCriticalEdges.cpp llvm/trunk/lib/Transforms/Utils/InstructionNamer.cpp llvm/trunk/lib/Transforms/Utils/LCSSA.cpp llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp llvm/trunk/lib/Transforms/Utils/LowerInvoke.cpp llvm/trunk/lib/Transforms/Utils/LowerSwitch.cpp llvm/trunk/lib/Transforms/Utils/Mem2Reg.cpp llvm/trunk/lib/VMCore/Verifier.cpp Modified: llvm/trunk/lib/Analysis/CFGPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/CFGPrinter.cpp?rev=111815&r1=111814&r2=111815&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/CFGPrinter.cpp (original) +++ llvm/trunk/lib/Analysis/CFGPrinter.cpp Mon Aug 23 12:52:01 2010 @@ -95,8 +95,8 @@ } char CFGPrinter::ID = 0; -static RegisterPass -P1("dot-cfg", "Print CFG of function to 'dot' file", false, true); +INITIALIZE_PASS(CFGPrinter, "dot-cfg", "Print CFG of function to 'dot' file", + false, true); namespace { struct CFGOnlyPrinter : public FunctionPass { @@ -126,9 +126,9 @@ } char CFGOnlyPrinter::ID = 0; -static RegisterPass -P2("dot-cfg-only", - "Print CFG of function to 'dot' file (with no function bodies)", false, true); +INITIALIZE_PASS(CFGOnlyPrinter, "dot-cfg-only", + "Print CFG of function to 'dot' file (with no function bodies)", + false, true); /// viewCFG - This function is meant for use from the debugger. You can just /// say 'call F->viewCFG()' and a ghostview window should pop up from the Modified: llvm/trunk/lib/Analysis/IPA/GlobalsModRef.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/IPA/GlobalsModRef.cpp?rev=111815&r1=111814&r2=111815&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/IPA/GlobalsModRef.cpp (original) +++ llvm/trunk/lib/Analysis/IPA/GlobalsModRef.cpp Mon Aug 23 12:52:01 2010 @@ -177,9 +177,9 @@ } char GlobalsModRef::ID = 0; -static RegisterPass -X("globalsmodref-aa", "Simple mod/ref analysis for globals", false, true); -static RegisterAnalysisGroup Y(X); +INITIALIZE_AG_PASS(GlobalsModRef, AliasAnalysis, + "globalsmodref-aa", "Simple mod/ref analysis for globals", + false, true, false); Pass *llvm::createGlobalsModRefPass() { return new GlobalsModRef(); } Modified: llvm/trunk/lib/Analysis/ProfileEstimatorPass.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ProfileEstimatorPass.cpp?rev=111815&r1=111814&r2=111815&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ProfileEstimatorPass.cpp (original) +++ llvm/trunk/lib/Analysis/ProfileEstimatorPass.cpp Mon Aug 23 12:52:01 2010 @@ -72,10 +72,8 @@ } // End of anonymous namespace char ProfileEstimatorPass::ID = 0; -static RegisterPass -X("profile-estimator", "Estimate profiling information", false, true); - -static RegisterAnalysisGroup Y(X); +INITIALIZE_AG_PASS(ProfileEstimatorPass, ProfileInfo, "profile-estimator", + "Estimate profiling information", false, true, false); namespace llvm { char &ProfileEstimatorPassID = ProfileEstimatorPass::ID; Modified: llvm/trunk/lib/Analysis/ProfileInfoLoaderPass.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ProfileInfoLoaderPass.cpp?rev=111815&r1=111814&r2=111815&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ProfileInfoLoaderPass.cpp (original) +++ llvm/trunk/lib/Analysis/ProfileInfoLoaderPass.cpp Mon Aug 23 12:52:01 2010 @@ -79,10 +79,8 @@ } // End of anonymous namespace char LoaderPass::ID = 0; -static RegisterPass -X("profile-loader", "Load profile information from llvmprof.out", false, true); - -static RegisterAnalysisGroup Y(X); +INITIALIZE_AG_PASS(LoaderPass, ProfileInfo, "profile-loader", + "Load profile information from llvmprof.out", false, true, false); char &llvm::ProfileLoaderPassID = LoaderPass::ID; Modified: llvm/trunk/lib/CodeGen/MachineDominators.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineDominators.cpp?rev=111815&r1=111814&r2=111815&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineDominators.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineDominators.cpp Mon Aug 23 12:52:01 2010 @@ -24,8 +24,8 @@ char MachineDominatorTree::ID = 0; -static RegisterPass -E("machinedomtree", "MachineDominator Tree Construction", true); +INITIALIZE_PASS(MachineDominatorTree, "machinedomtree", + "MachineDominator Tree Construction", true, true); char &llvm::MachineDominatorsID = MachineDominatorTree::ID; Modified: llvm/trunk/lib/CodeGen/MachineLoopInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLoopInfo.cpp?rev=111815&r1=111814&r2=111815&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineLoopInfo.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineLoopInfo.cpp Mon Aug 23 12:52:01 2010 @@ -30,8 +30,8 @@ } char MachineLoopInfo::ID = 0; -static RegisterPass -X("machine-loops", "Machine Natural Loop Construction", true); +INITIALIZE_PASS(MachineLoopInfo, "machine-loops", + "Machine Natural Loop Construction", true, true); char &llvm::MachineLoopInfoID = MachineLoopInfo::ID; Modified: llvm/trunk/lib/CodeGen/MachineVerifier.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineVerifier.cpp?rev=111815&r1=111814&r2=111815&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineVerifier.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineVerifier.cpp Mon Aug 23 12:52:01 2010 @@ -211,9 +211,8 @@ } char MachineVerifierPass::ID = 0; -static RegisterPass -MachineVer("machineverifier", "Verify generated machine code"); -static const PassInfo *const MachineVerifyID = &MachineVer; +INITIALIZE_PASS(MachineVerifierPass, "machineverifier", + "Verify generated machine code", false, false); FunctionPass *llvm::createMachineVerifierPass() { return new MachineVerifierPass(); Modified: llvm/trunk/lib/CodeGen/PHIElimination.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PHIElimination.cpp?rev=111815&r1=111814&r2=111815&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/PHIElimination.cpp (original) +++ llvm/trunk/lib/CodeGen/PHIElimination.cpp Mon Aug 23 12:52:01 2010 @@ -38,8 +38,8 @@ STATISTIC(NumReused, "Number of reused lowered phis"); char PHIElimination::ID = 0; -static RegisterPass -X("phi-node-elimination", "Eliminate PHI nodes for register allocation"); +INITIALIZE_PASS(PHIElimination, "phi-node-elimination", + "Eliminate PHI nodes for register allocation", false, false); char &llvm::PHIEliminationID = PHIElimination::ID; Modified: llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp?rev=111815&r1=111814&r2=111815&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp (original) +++ llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp Mon Aug 23 12:52:01 2010 @@ -203,8 +203,9 @@ char PreAllocSplitting::ID = 0; -static RegisterPass -X("pre-alloc-splitting", "Pre-Register Allocation Live Interval Splitting"); +INITIALIZE_PASS(PreAllocSplitting, "pre-alloc-splitting", + "Pre-Register Allocation Live Interval Splitting", + false, false); char &llvm::PreAllocSplittingID = PreAllocSplitting::ID; Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=111815&r1=111814&r2=111815&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original) +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Mon Aug 23 12:52:01 2010 @@ -59,11 +59,9 @@ cl::desc("Avoid coalescing cross register class copies"), cl::init(false), cl::Hidden); -static RegisterPass -X("simple-register-coalescing", "Simple Register Coalescing"); - -// Declare that we implement the RegisterCoalescer interface -static RegisterAnalysisGroup V(X); +INITIALIZE_AG_PASS(SimpleRegisterCoalescing, RegisterCoalescer, + "simple-register-coalescing", "Simple Register Coalescing", + false, false, true); char &llvm::SimpleRegisterCoalescingID = SimpleRegisterCoalescing::ID; Modified: llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp?rev=111815&r1=111814&r2=111815&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp (original) +++ llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp Mon Aug 23 12:52:01 2010 @@ -150,9 +150,8 @@ } char StrongPHIElimination::ID = 0; -static RegisterPass -X("strong-phi-node-elimination", - "Eliminate PHI nodes for register allocation, intelligently"); +INITIALIZE_PASS(StrongPHIElimination, "strong-phi-node-elimination", + "Eliminate PHI nodes for register allocation, intelligently", false, false); char &llvm::StrongPHIEliminationID = StrongPHIElimination::ID; Modified: llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp?rev=111815&r1=111814&r2=111815&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp (original) +++ llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp Mon Aug 23 12:52:01 2010 @@ -159,8 +159,8 @@ } char TwoAddressInstructionPass::ID = 0; -static RegisterPass -X("twoaddressinstruction", "Two-Address instruction pass"); +INITIALIZE_PASS(TwoAddressInstructionPass, "twoaddressinstruction", + "Two-Address instruction pass", false, false); char &llvm::TwoAddressInstructionPassID = TwoAddressInstructionPass::ID; Modified: llvm/trunk/lib/CodeGen/UnreachableBlockElim.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/UnreachableBlockElim.cpp?rev=111815&r1=111814&r2=111815&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/UnreachableBlockElim.cpp (original) +++ llvm/trunk/lib/CodeGen/UnreachableBlockElim.cpp Mon Aug 23 12:52:01 2010 @@ -105,9 +105,8 @@ } char UnreachableMachineBlockElim::ID = 0; -static RegisterPass -Y("unreachable-mbb-elimination", - "Remove unreachable machine basic blocks"); +INITIALIZE_PASS(UnreachableMachineBlockElim, "unreachable-mbb-elimination", + "Remove unreachable machine basic blocks", false, false); char &llvm::UnreachableMachineBlockElimID = UnreachableMachineBlockElim::ID; Modified: llvm/trunk/lib/Transforms/Scalar/LowerAtomic.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LowerAtomic.cpp?rev=111815&r1=111814&r2=111815&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/LowerAtomic.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/LowerAtomic.cpp Mon Aug 23 12:52:01 2010 @@ -154,7 +154,8 @@ } char LowerAtomic::ID = 0; -static RegisterPass -X("loweratomic", "Lower atomic intrinsics to non-atomic form"); +INITIALIZE_PASS(LowerAtomic, "loweratomic", + "Lower atomic intrinsics to non-atomic form", + false, false); Pass *llvm::createLowerAtomicPass() { return new LowerAtomic(); } Modified: llvm/trunk/lib/Transforms/Scalar/Reg2Mem.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/Reg2Mem.cpp?rev=111815&r1=111814&r2=111815&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/Reg2Mem.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/Reg2Mem.cpp Mon Aug 23 12:52:01 2010 @@ -59,8 +59,8 @@ } char RegToMem::ID = 0; -static RegisterPass -X("reg2mem", "Demote all values to stack slots"); +INITIALIZE_PASS(RegToMem, "reg2mem", "Demote all values to stack slots", + false, false); bool RegToMem::runOnFunction(Function &F) { Modified: llvm/trunk/lib/Transforms/Utils/BreakCriticalEdges.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/BreakCriticalEdges.cpp?rev=111815&r1=111814&r2=111815&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/BreakCriticalEdges.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/BreakCriticalEdges.cpp Mon Aug 23 12:52:01 2010 @@ -53,8 +53,8 @@ } char BreakCriticalEdges::ID = 0; -static RegisterPass -X("break-crit-edges", "Break critical edges in CFG"); +INITIALIZE_PASS(BreakCriticalEdges, "break-crit-edges", + "Break critical edges in CFG", false, false); // Publically exposed interface to pass... char &llvm::BreakCriticalEdgesID = BreakCriticalEdges::ID; Modified: llvm/trunk/lib/Transforms/Utils/InstructionNamer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/InstructionNamer.cpp?rev=111815&r1=111814&r2=111815&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/InstructionNamer.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/InstructionNamer.cpp Mon Aug 23 12:52:01 2010 @@ -48,8 +48,8 @@ }; char InstNamer::ID = 0; - static RegisterPass X("instnamer", - "Assign names to anonymous instructions"); + INITIALIZE_PASS(InstNamer, "instnamer", + "Assign names to anonymous instructions", false, false); } Modified: llvm/trunk/lib/Transforms/Utils/LCSSA.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/LCSSA.cpp?rev=111815&r1=111814&r2=111815&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/LCSSA.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/LCSSA.cpp Mon Aug 23 12:52:01 2010 @@ -90,7 +90,7 @@ } char LCSSA::ID = 0; -static RegisterPass X("lcssa", "Loop-Closed SSA Form Pass"); +INITIALIZE_PASS(LCSSA, "lcssa", "Loop-Closed SSA Form Pass", false, false); Pass *llvm::createLCSSAPass() { return new LCSSA(); } char &llvm::LCSSAID = LCSSA::ID; Modified: llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp?rev=111815&r1=111814&r2=111815&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp Mon Aug 23 12:52:01 2010 @@ -105,8 +105,8 @@ } char LoopSimplify::ID = 0; -static RegisterPass -X("loopsimplify", "Canonicalize natural loops", true); +INITIALIZE_PASS(LoopSimplify, "loopsimplify", + "Canonicalize natural loops", true, false); // Publically exposed interface to pass... char &llvm::LoopSimplifyID = LoopSimplify::ID; Modified: llvm/trunk/lib/Transforms/Utils/LowerInvoke.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/LowerInvoke.cpp?rev=111815&r1=111814&r2=111815&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/LowerInvoke.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/LowerInvoke.cpp Mon Aug 23 12:52:01 2010 @@ -100,8 +100,9 @@ } char LowerInvoke::ID = 0; -static RegisterPass -X("lowerinvoke", "Lower invoke and unwind, for unwindless code generators"); +INITIALIZE_PASS(LowerInvoke, "lowerinvoke", + "Lower invoke and unwind, for unwindless code generators", + false, false); char &llvm::LowerInvokePassID = LowerInvoke::ID; Modified: llvm/trunk/lib/Transforms/Utils/LowerSwitch.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/LowerSwitch.cpp?rev=111815&r1=111814&r2=111815&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/LowerSwitch.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/LowerSwitch.cpp Mon Aug 23 12:52:01 2010 @@ -79,8 +79,8 @@ } char LowerSwitch::ID = 0; -static RegisterPass -X("lowerswitch", "Lower SwitchInst's to branches"); +INITIALIZE_PASS(LowerSwitch, "lowerswitch", + "Lower SwitchInst's to branches", false, false); // Publically exposed interface to pass... char &llvm::LowerSwitchID = LowerSwitch::ID; Modified: llvm/trunk/lib/Transforms/Utils/Mem2Reg.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/Mem2Reg.cpp?rev=111815&r1=111814&r2=111815&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/Mem2Reg.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/Mem2Reg.cpp Mon Aug 23 12:52:01 2010 @@ -49,7 +49,8 @@ } // end of anonymous namespace char PromotePass::ID = 0; -static RegisterPass X("mem2reg", "Promote Memory to Register"); +INITIALIZE_PASS(PromotePass, "mem2reg", "Promote Memory to Register", + false, false); bool PromotePass::runOnFunction(Function &F) { std::vector Allocas; Modified: llvm/trunk/lib/VMCore/Verifier.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Verifier.cpp?rev=111815&r1=111814&r2=111815&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Verifier.cpp (original) +++ llvm/trunk/lib/VMCore/Verifier.cpp Mon Aug 23 12:52:01 2010 @@ -102,8 +102,8 @@ } char PreVerifier::ID = 0; -static RegisterPass -PreVer("preverify", "Preliminary module verification"); +INITIALIZE_PASS(PreVerifier, "preverify", "Preliminary module verification", + false, false); char &PreVerifyID = PreVerifier::ID; namespace { @@ -403,7 +403,7 @@ } // End anonymous namespace char Verifier::ID = 0; -static RegisterPass X("verify", "Module Verifier"); +INITIALIZE_PASS(Verifier, "verify", "Module Verifier", false, false); // Assert - We know that cond should be true, if not print an error message. #define Assert(C, M) \ From resistor at mac.com Mon Aug 23 13:12:23 2010 From: resistor at mac.com (Owen Anderson) Date: Mon, 23 Aug 2010 18:12:23 -0000 Subject: [llvm-commits] [llvm] r111816 - /llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp Message-ID: <20100823181223.4CE2F2A6C12C@llvm.org> Author: resistor Date: Mon Aug 23 13:12:23 2010 New Revision: 111816 URL: http://llvm.org/viewvc/llvm-project?rev=111816&view=rev Log: Re-enable LazyValueInfo. Monitoring for failures. Modified: llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp Modified: llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp?rev=111816&r1=111815&r2=111816&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp Mon Aug 23 13:12:23 2010 @@ -47,7 +47,7 @@ static cl::opt EnableLVI("enable-jump-threading-lvi", cl::desc("Use LVI for jump threading"), - cl::init(false), + cl::init(true), cl::ReallyHidden); From benny.kra at googlemail.com Mon Aug 23 13:16:09 2010 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Mon, 23 Aug 2010 18:16:09 -0000 Subject: [llvm-commits] [llvm] r111817 - in /llvm/trunk: include/llvm/ADT/StringRef.h lib/Support/StringRef.cpp Message-ID: <20100823181609.140C52A6C12C@llvm.org> Author: d0k Date: Mon Aug 23 13:16:08 2010 New Revision: 111817 URL: http://llvm.org/viewvc/llvm-project?rev=111817&view=rev Log: Avoid O(n*m) complexity in StringRef::find_first(_not)_of(StringRef). - Cache used characters in a bitset to reduce memory overhead to just 32 bytes. - On my core2 this code is faster except when the checked string was very short (smaller than the list of delimiters). Modified: llvm/trunk/include/llvm/ADT/StringRef.h llvm/trunk/lib/Support/StringRef.cpp Modified: llvm/trunk/include/llvm/ADT/StringRef.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/StringRef.h?rev=111817&r1=111816&r2=111817&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/StringRef.h (original) +++ llvm/trunk/include/llvm/ADT/StringRef.h Mon Aug 23 13:16:08 2010 @@ -238,7 +238,7 @@ /// find_first_of - Find the first character in the string that is in \arg /// Chars, or npos if not found. /// - /// Note: O(size() * Chars.size()) + /// Note: O(size() + Chars.size()) size_type find_first_of(StringRef Chars, size_t From = 0) const; /// find_first_not_of - Find the first character in the string that is not @@ -248,7 +248,7 @@ /// find_first_not_of - Find the first character in the string that is not /// in the string \arg Chars, or npos if not found. /// - /// Note: O(size() * Chars.size()) + /// Note: O(size() + Chars.size()) size_type find_first_not_of(StringRef Chars, size_t From = 0) const; /// @} Modified: llvm/trunk/lib/Support/StringRef.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/StringRef.cpp?rev=111817&r1=111816&r2=111817&view=diff ============================================================================== --- llvm/trunk/lib/Support/StringRef.cpp (original) +++ llvm/trunk/lib/Support/StringRef.cpp Mon Aug 23 13:16:08 2010 @@ -9,6 +9,7 @@ #include "llvm/ADT/StringRef.h" #include "llvm/ADT/APInt.h" +#include using namespace llvm; @@ -153,11 +154,15 @@ /// find_first_of - Find the first character in the string that is in \arg /// Chars, or npos if not found. /// -/// Note: O(size() * Chars.size()) +/// Note: O(size() + Chars.size()) StringRef::size_type StringRef::find_first_of(StringRef Chars, size_t From) const { + std::bitset<1 << CHAR_BIT> CharBits; + for (size_type i = 0; i != Chars.size(); ++i) + CharBits.set((unsigned char)Chars[i]); + for (size_type i = min(From, Length), e = Length; i != e; ++i) - if (Chars.find(Data[i]) != npos) + if (CharBits.test((unsigned char)Data[i])) return i; return npos; } @@ -174,11 +179,15 @@ /// find_first_not_of - Find the first character in the string that is not /// in the string \arg Chars, or npos if not found. /// -/// Note: O(size() * Chars.size()) +/// Note: O(size() + Chars.size()) StringRef::size_type StringRef::find_first_not_of(StringRef Chars, size_t From) const { + std::bitset<1 << CHAR_BIT> CharBits; + for (size_type i = 0; i != Chars.size(); ++i) + CharBits.set((unsigned char)Chars[i]); + for (size_type i = min(From, Length), e = Length; i != e; ++i) - if (Chars.find(Data[i]) == npos) + if (!CharBits.test((unsigned char)Data[i])) return i; return npos; } From gohman at apple.com Mon Aug 23 13:23:24 2010 From: gohman at apple.com (Dan Gohman) Date: Mon, 23 Aug 2010 11:23:24 -0700 Subject: [llvm-commits] [llvm] r111595 - in /llvm/trunk: include/llvm/Support/FormattedStream.h include/llvm/Support/raw_ostream.h lib/Support/FormattedStream.cpp lib/Support/raw_ostream.cpp In-Reply-To: References: <20100820004810.878BF2A6C12C@llvm.org> Message-ID: <73E8C607-635F-4F08-8C91-D9EC1D607844@apple.com> On Aug 21, 2010, at 5:15 AM, Kenneth Uildriks wrote: > Can it be configurable? Sometimes it's helpful to see what the tool > managed to output before it got an error. It's pretty easy to achieve this in a debugger; just break at the point where the stream is closed, call flush() on the stream, and then rescue the file before letting the program continue. Dan From benny.kra at googlemail.com Mon Aug 23 13:24:21 2010 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Mon, 23 Aug 2010 18:24:21 -0000 Subject: [llvm-commits] [llvm] r111819 - /llvm/trunk/lib/MC/ELFObjectWriter.cpp Message-ID: <20100823182421.1B7212A6C12C@llvm.org> Author: d0k Date: Mon Aug 23 13:24:20 2010 New Revision: 111819 URL: http://llvm.org/viewvc/llvm-project?rev=111819&view=rev Log: Use the proper relocation section + cleanup, from Roman Divacky. Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=111819&r1=111818&r2=111819&view=diff ============================================================================== --- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original) +++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Mon Aug 23 13:24:20 2010 @@ -511,7 +511,10 @@ const MCSymbolData *Base = Asm.getAtom(Layout, &SD); if (Base) { - Index = getSymbolIndexInSymbolTable(const_cast(Asm), &Base->getSymbol()); + if (MCFragment *F = SD.getFragment()) + Index = F->getParent()->getOrdinal() + getNumOfLocalSymbols(Asm) + 1; + else + Index = getSymbolIndexInSymbolTable(const_cast(Asm), Symbol); if (Base != &SD) Value += Layout.getSymbolAddress(&SD) - Layout.getSymbolAddress(Base); Addend = Value; @@ -521,8 +524,7 @@ if (F) { // Index of the section in .symtab against this symbol // is being relocated + 2 (empty section + abs. symbols). - Index = SD.getFragment()->getParent()->getOrdinal() + - getNumOfLocalSymbols(Asm) + 1; + Index = F->getParent()->getOrdinal() + getNumOfLocalSymbols(Asm) + 1; MCSectionData *FSD = F->getParent(); // Offset of the symbol in the section From dpatel at apple.com Mon Aug 23 13:25:56 2010 From: dpatel at apple.com (Devang Patel) Date: Mon, 23 Aug 2010 18:25:56 -0000 Subject: [llvm-commits] [llvm] r111820 - in /llvm/trunk: include/llvm/Analysis/DebugInfo.h lib/Analysis/DebugInfo.cpp lib/CodeGen/AsmPrinter/DwarfDebug.cpp Message-ID: <20100823182556.35EAF2A6C12C@llvm.org> Author: dpatel Date: Mon Aug 23 13:25:56 2010 New Revision: 111820 URL: http://llvm.org/viewvc/llvm-project?rev=111820&view=rev Log: Handle qualified constants that are directly folded by FE. PR 7920. Modified: llvm/trunk/include/llvm/Analysis/DebugInfo.h llvm/trunk/lib/Analysis/DebugInfo.cpp llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp Modified: llvm/trunk/include/llvm/Analysis/DebugInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/DebugInfo.h?rev=111820&r1=111819&r2=111820&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/DebugInfo.h (original) +++ llvm/trunk/include/llvm/Analysis/DebugInfo.h Mon Aug 23 13:25:56 2010 @@ -290,6 +290,9 @@ unsigned getEncoding() const { return getUnsignedField(9); } + /// Verify - Verify that a basic type descriptor is well formed. + bool Verify() const; + /// print - print basic type. void print(raw_ostream &OS) const; @@ -313,6 +316,9 @@ /// return base type size. uint64_t getOriginalTypeSize() const; + /// Verify - Verify that a derived type descriptor is well formed. + bool Verify() const; + /// print - print derived type. void print(raw_ostream &OS) const; Modified: llvm/trunk/lib/Analysis/DebugInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/DebugInfo.cpp?rev=111820&r1=111819&r2=111820&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/DebugInfo.cpp (original) +++ llvm/trunk/lib/Analysis/DebugInfo.cpp Mon Aug 23 13:25:56 2010 @@ -303,6 +303,16 @@ return true; } +/// Verify - Verify that a basic type descriptor is well formed. +bool DIBasicType::Verify() const { + return isBasicType(); +} + +/// Verify - Verify that a derived type descriptor is well formed. +bool DIDerivedType::Verify() const { + return isDerivedType(); +} + /// Verify - Verify that a composite type descriptor is well formed. bool DICompositeType::Verify() const { if (!DbgNode) Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp?rev=111820&r1=111819&r2=111820&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp (original) +++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp Mon Aug 23 13:25:56 2010 @@ -1861,6 +1861,21 @@ return I->second; } +/// isUnsignedDIType - Return true if type encoding is unsigned. +static bool isUnsignedDIType(DIType Ty) { + DIDerivedType DTy(Ty); + if (DTy.Verify()) + return isUnsignedDIType(DTy.getTypeDerivedFrom()); + + DIBasicType BTy(Ty); + if (BTy.Verify()) { + unsigned Encoding = BTy.getEncoding(); + if (Encoding == dwarf::DW_ATE_unsigned || + Encoding == dwarf::DW_ATE_unsigned_char) + return true; + } + return false; +} /// constructGlobalVariableDIE - Construct global variable DIE. void DwarfDebug::constructGlobalVariableDIE(const MDNode *N) { @@ -1930,17 +1945,12 @@ } } else if (Constant *C = GV.getConstant()) { if (ConstantInt *CI = dyn_cast(C)) { - DIBasicType BTy(GTy); - if (BTy.Verify()) { - unsigned Encoding = BTy.getEncoding(); - if (Encoding == dwarf::DW_ATE_unsigned || - Encoding == dwarf::DW_ATE_unsigned_char) + if (isUnsignedDIType(GTy)) addUInt(VariableDIE, dwarf::DW_AT_const_value, dwarf::DW_FORM_udata, CI->getZExtValue()); else addSInt(VariableDIE, dwarf::DW_AT_const_value, dwarf::DW_FORM_sdata, CI->getSExtValue()); - } } } return; From gohman at apple.com Mon Aug 23 13:43:24 2010 From: gohman at apple.com (Dan Gohman) Date: Mon, 23 Aug 2010 18:43:24 -0000 Subject: [llvm-commits] [llvm] r111822 - /llvm/trunk/include/llvm/Support/FormattedStream.h Message-ID: <20100823184324.A28AD2A6C12C@llvm.org> Author: djg Date: Mon Aug 23 13:43:24 2010 New Revision: 111822 URL: http://llvm.org/viewvc/llvm-project?rev=111822&view=rev Log: formatted_tool_output_file::close needs to flush its buffer before closing the underlying stream. Modified: llvm/trunk/include/llvm/Support/FormattedStream.h Modified: llvm/trunk/include/llvm/Support/FormattedStream.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/FormattedStream.h?rev=111822&r1=111821&r2=111822&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/FormattedStream.h (original) +++ llvm/trunk/include/llvm/Support/FormattedStream.h Mon Aug 23 13:43:24 2010 @@ -164,7 +164,12 @@ void keep() { return get_tool_output_file().keep(); } bool has_error() const { return get_tool_output_file().has_error(); } void clear_error() { return get_tool_output_file().clear_error(); } - void close() { return get_tool_output_file().close(); } + void close() { + // The inner stream is unbuffered; flush the outer stream's buffer. + flush(); + // The inner stream can close its file descriptor now. + return get_tool_output_file().close(); + } }; /// fouts() - This returns a reference to a formatted_raw_ostream for From jyasskin at google.com Mon Aug 23 13:57:47 2010 From: jyasskin at google.com (Jeffrey Yasskin) Date: Mon, 23 Aug 2010 19:57:47 +0100 Subject: [llvm-commits] JIT: Emitting a debug location after an instruction In-Reply-To: References: Message-ID: On Mon, Aug 23, 2010 at 3:28 PM, nicolas geoffray wrote: > On Mon, Aug 23, 2010 at 2:57 PM, Jeffrey Yasskin > wrote: >> >> Do you _only_ attach line information to calls, or also to each other >> instruction? > > I only attach line (or more precisely metadata) information to calls. > >> >> If it's only to the calls, do you just not provide line >> numbers for the leaf frame? If you do provide line numbers for the >> leaf frame, are you worried about providing the wrong number just >> after returning from a call? > > I don't have leaf frames. > >> >> The line number debug information is generally compressed into a table >> of (address, line) pairs, sorted by the address. Then you search the >> leaf frame using "std::upper_bound(table, PC)-1". > > The code that looks up the method from the PC is performance sensitive, so > using upper_bound is not ideal. I'm not sure processDebugLoc does what you need it to, even with your changes. It only records an address when the DebugLoc changes, and that's not guaranteed to happen exactly on the call MachineInstruction. (Unless you've done something to ensure it does?) Do you have a unit test that shows this works in all cases? Mapping return addresses to metadata seems like more of a job for the GC system, but that's not implemented for the JIT, so I can't very well say to use it instead. :-/ From benny.kra at googlemail.com Mon Aug 23 14:05:46 2010 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Mon, 23 Aug 2010 19:05:46 -0000 Subject: [llvm-commits] [llvm] r111824 - /llvm/trunk/lib/MC/ELFObjectWriter.cpp Message-ID: <20100823190546.83EFC2A6C12E@llvm.org> Author: d0k Date: Mon Aug 23 14:05:46 2010 New Revision: 111824 URL: http://llvm.org/viewvc/llvm-project?rev=111824&view=rev Log: Add the symbol offset to the relocation value when we relocate against section. By Roman Divacky. Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=111824&r1=111823&r2=111824&view=diff ============================================================================== --- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original) +++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Mon Aug 23 14:05:46 2010 @@ -511,9 +511,10 @@ const MCSymbolData *Base = Asm.getAtom(Layout, &SD); if (Base) { - if (MCFragment *F = SD.getFragment()) + if (MCFragment *F = SD.getFragment()) { Index = F->getParent()->getOrdinal() + getNumOfLocalSymbols(Asm) + 1; - else + Value += Layout.getSymbolAddress(&SD); + } else Index = getSymbolIndexInSymbolTable(const_cast(Asm), Symbol); if (Base != &SD) Value += Layout.getSymbolAddress(&SD) - Layout.getSymbolAddress(Base); From devang.patel at gmail.com Mon Aug 23 14:10:36 2010 From: devang.patel at gmail.com (Devang Patel) Date: Mon, 23 Aug 2010 12:10:36 -0700 Subject: [llvm-commits] JIT: Emitting a debug location after an instruction In-Reply-To: References: Message-ID: On Mon, Aug 23, 2010 at 4:46 AM, Jeffrey Yasskin wrote: > > Devang, why does this argument to processDebugLoc even exist? I don't > see it used anywhere, you didn't update the MachineCodeEmitter.h > comment to mention it, and your commit adding it only says "Update > processDebugLoc() so that it can be used to process debug info before > and after printing an instruction." > > Imagine a lexical scope represented by a single machine instruction. You want to emit a label before and after the instruction to record instruction range for the scope. - Devang -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20100823/551cd6b1/attachment.html From foldr at codedgers.com Mon Aug 23 14:23:54 2010 From: foldr at codedgers.com (Mikhail Glushenkov) Date: Mon, 23 Aug 2010 19:23:54 -0000 Subject: [llvm-commits] [llvm] r111825 - /llvm/trunk/include/llvm/Support/raw_ostream.h Message-ID: <20100823192354.C46C82A6C12C@llvm.org> Author: foldr Date: Mon Aug 23 14:23:54 2010 New Revision: 111825 URL: http://llvm.org/viewvc/llvm-project?rev=111825&view=rev Log: Trailing whitespace. Modified: llvm/trunk/include/llvm/Support/raw_ostream.h Modified: llvm/trunk/include/llvm/Support/raw_ostream.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/raw_ostream.h?rev=111825&r1=111824&r2=111825&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/raw_ostream.h (original) +++ llvm/trunk/include/llvm/Support/raw_ostream.h Mon Aug 23 14:23:54 2010 @@ -215,7 +215,7 @@ /// @param bold bold/brighter text, default false /// @param bg if true change the background, default: change foreground /// @returns itself so it can be used within << invocations - virtual raw_ostream &changeColor(enum Colors, bool = false, bool = false) { + virtual raw_ostream &changeColor(enum Colors, bool = false, bool = false) { return *this; } /// Resets the colors to terminal defaults. Call this when you are done @@ -455,7 +455,7 @@ /// outside of the raw_svector_ostream's control. It is only safe to do this /// if the raw_svector_ostream has previously been flushed. void resync(); - + /// str - Flushes the stream contents to the target vector and return a /// StringRef for the vector contents. StringRef str(); From foldr at codedgers.com Mon Aug 23 14:24:01 2010 From: foldr at codedgers.com (Mikhail Glushenkov) Date: Mon, 23 Aug 2010 19:24:01 -0000 Subject: [llvm-commits] [llvm] r111826 - in /llvm/trunk: tools/llvmc/examples/Hello/Makefile utils/TableGen/LLVMCConfigurationEmitter.cpp Message-ID: <20100823192401.1D5022A6C12D@llvm.org> Author: foldr Date: Mon Aug 23 14:24:00 2010 New Revision: 111826 URL: http://llvm.org/viewvc/llvm-project?rev=111826&view=rev Log: llvmc: Do not mention plugins in the code. Modified: llvm/trunk/tools/llvmc/examples/Hello/Makefile llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp Modified: llvm/trunk/tools/llvmc/examples/Hello/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/examples/Hello/Makefile?rev=111826&r1=111825&r2=111826&view=diff ============================================================================== --- llvm/trunk/tools/llvmc/examples/Hello/Makefile (original) +++ llvm/trunk/tools/llvmc/examples/Hello/Makefile Mon Aug 23 14:24:00 2010 @@ -1,4 +1,4 @@ -##===- tools/llvmc/plugins/Hello/Makefile ------------------*- Makefile -*-===## +##===- tools/llvmc/examples/Hello/Makefile -----------------*- Makefile -*-===## # # The LLVM Compiler Infrastructure # Modified: llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp?rev=111826&r1=111825&r2=111826&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp Mon Aug 23 14:24:00 2010 @@ -1094,9 +1094,7 @@ } /// TypecheckGraph - Check that names for output and input languages -/// on all edges do match. This doesn't do much when the information -/// about the whole graph is not available (i.e. when compiling most -/// plugins). +/// on all edges do match. void TypecheckGraph (const RecordVector& EdgeVector, const ToolDescriptions& ToolDescs) { StringMap > ToolToInLang; @@ -2628,9 +2626,7 @@ // TODO: change this to getAllDerivedDefinitions. const Record* LangMapRecord = Records.getDef("LanguageMap"); - // It is allowed for a plugin to have no language map. if (LangMapRecord) { - ListInit* LangsToSuffixesList = LangMapRecord->getValueAsListInit("map"); if (!LangsToSuffixesList) throw "Error in the language map definition!"; @@ -2964,12 +2960,12 @@ } -/// PluginData - Holds all information about a plugin. -struct PluginData { +/// DriverData - Holds all information about the driver. +struct DriverData { OptionDescriptions OptDescs; - bool HasSink; ToolDescriptions ToolDescs; RecordVector Edges; + bool HasSink; }; /// HasSink - Go through the list of tool descriptions and check if @@ -2983,9 +2979,9 @@ return false; } -/// CollectPluginData - Collect compilation graph edges, tool properties and +/// CollectDriverData - Collect compilation graph edges, tool properties and /// option properties from the parse tree. -void CollectPluginData (const RecordKeeper& Records, PluginData& Data) { +void CollectDriverData (const RecordKeeper& Records, DriverData& Data) { // Collect option properties. const RecordVector& OptionLists = Records.getAllDerivedDefinitions("OptionList"); @@ -3004,8 +3000,8 @@ Data.Edges); } -/// CheckPluginData - Perform some sanity checks on the collected data. -void CheckPluginData(PluginData& Data) { +/// CheckDriverData - Perform some sanity checks on the collected data. +void CheckDriverData(DriverData& Data) { // Filter out all tools not mentioned in the compilation graph. FilterNotInGraph(Data.Edges, Data.ToolDescs); @@ -3017,7 +3013,7 @@ CheckForSuperfluousOptions(Data.Edges, Data.ToolDescs, Data.OptDescs); } -void EmitPluginCode(const PluginData& Data, raw_ostream& O) { +void EmitDriverCode(const DriverData& Data, raw_ostream& O) { // Emit file header. EmitIncludes(O); @@ -3072,13 +3068,13 @@ /// run - The back-end entry point. void LLVMCConfigurationEmitter::run (raw_ostream &O) { try { - PluginData Data; + DriverData Data; - CollectPluginData(Records, Data); - CheckPluginData(Data); + CollectDriverData(Records, Data); + CheckDriverData(Data); - this->EmitSourceFileHeader("LLVMC Configuration Library", O); - EmitPluginCode(Data, O); + this->EmitSourceFileHeader("llvmc-based driver: auto-generated code", O); + EmitDriverCode(Data, O); } catch (std::exception& Error) { throw Error.what() + std::string(" - usually this means a syntax error."); From foldr at codedgers.com Mon Aug 23 14:24:08 2010 From: foldr at codedgers.com (Mikhail Glushenkov) Date: Mon, 23 Aug 2010 19:24:08 -0000 Subject: [llvm-commits] [llvm] r111827 - in /llvm/trunk: include/llvm/CompilerDriver/Common.td include/llvm/CompilerDriver/CompilationGraph.h lib/CompilerDriver/CompilationGraph.cpp utils/TableGen/LLVMCConfigurationEmitter.cpp Message-ID: <20100823192408.B70C62A6C12C@llvm.org> Author: foldr Date: Mon Aug 23 14:24:08 2010 New Revision: 111827 URL: http://llvm.org/viewvc/llvm-project?rev=111827&view=rev Log: llvmc: Properly handle (error) in edge properties. Modified: llvm/trunk/include/llvm/CompilerDriver/Common.td llvm/trunk/include/llvm/CompilerDriver/CompilationGraph.h llvm/trunk/lib/CompilerDriver/CompilationGraph.cpp llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp Modified: llvm/trunk/include/llvm/CompilerDriver/Common.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CompilerDriver/Common.td?rev=111827&r1=111826&r2=111827&view=diff ============================================================================== --- llvm/trunk/include/llvm/CompilerDriver/Common.td (original) +++ llvm/trunk/include/llvm/CompilerDriver/Common.td Mon Aug 23 14:24:08 2010 @@ -93,9 +93,8 @@ def set_option; def unset_option; -// Increase/decrease the edge weight. +// Increase the edge weight. def inc_weight; -def dec_weight; // Empty DAG marker. def empty_dag_marker; Modified: llvm/trunk/include/llvm/CompilerDriver/CompilationGraph.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CompilerDriver/CompilationGraph.h?rev=111827&r1=111826&r2=111827&view=diff ============================================================================== --- llvm/trunk/include/llvm/CompilerDriver/CompilationGraph.h (original) +++ llvm/trunk/include/llvm/CompilerDriver/CompilationGraph.h Mon Aug 23 14:24:08 2010 @@ -46,7 +46,7 @@ virtual ~Edge() {} const std::string& ToolName() const { return ToolName_; } - virtual unsigned Weight(const InputLanguagesSet& InLangs) const = 0; + virtual int Weight(const InputLanguagesSet& InLangs) const = 0; private: std::string ToolName_; }; @@ -55,7 +55,7 @@ class SimpleEdge : public Edge { public: SimpleEdge(const std::string& T) : Edge(T) {} - unsigned Weight(const InputLanguagesSet&) const { return 1; } + int Weight(const InputLanguagesSet&) const { return 1; } }; /// Node - A node (vertex) of the compilation graph. Modified: llvm/trunk/lib/CompilerDriver/CompilationGraph.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CompilerDriver/CompilationGraph.cpp?rev=111827&r1=111826&r2=111827&view=diff ============================================================================== --- llvm/trunk/lib/CompilerDriver/CompilationGraph.cpp (original) +++ llvm/trunk/lib/CompilerDriver/CompilationGraph.cpp Mon Aug 23 14:24:08 2010 @@ -46,19 +46,24 @@ namespace { - /// ChooseEdge - Return the edge with the maximum weight. + /// ChooseEdge - Return the edge with the maximum weight. Returns 0 on error. template const Edge* ChooseEdge(const C& EdgesContainer, const InputLanguagesSet& InLangs, const std::string& NodeName = "root") { const Edge* MaxEdge = 0; - unsigned MaxWeight = 0; + int MaxWeight = 0; bool SingleMax = true; for (typename C::const_iterator B = EdgesContainer.begin(), E = EdgesContainer.end(); B != E; ++B) { const Edge* e = B->getPtr(); - unsigned EW = e->Weight(InLangs); + int EW = e->Weight(InLangs); + if (EW < 0) { + // (error) invocation in TableGen -> we don't need to print an error + // message. + return 0; + } if (EW > MaxWeight) { MaxEdge = e; MaxWeight = EW; @@ -474,7 +479,7 @@ for (const_nodes_iterator B = this->NodesMap.begin(), E = this->NodesMap.end(); B != E; ++B) { const Node& N = B->second; - unsigned MaxWeight = 0; + int MaxWeight = 0; // Ignore the root node. if (!N.ToolPtr) @@ -482,7 +487,7 @@ for (Node::const_iterator EB = N.EdgesBegin(), EE = N.EdgesEnd(); EB != EE; ++EB) { - unsigned EdgeWeight = (*EB)->Weight(Dummy); + int EdgeWeight = (*EB)->Weight(Dummy); if (EdgeWeight > MaxWeight) { MaxWeight = EdgeWeight; } Modified: llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp?rev=111827&r1=111826&r2=111827&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp Mon Aug 23 14:24:08 2010 @@ -1950,7 +1950,6 @@ /// EmitActionHandlersCallback - Emit code that handles actions. Used by /// EmitGenerateActionMethod() as an argument to EmitCaseConstructHandler(). - class EmitActionHandlersCallback; typedef void (EmitActionHandlersCallback::* EmitActionHandlersCallbackHandler) @@ -2649,21 +2648,18 @@ O << "}\n\n"; } -/// IncDecWeight - Helper function passed to EmitCaseConstructHandler() -/// by EmitEdgeClass(). -void IncDecWeight (const Init* i, unsigned IndentLevel, - raw_ostream& O) { +/// EmitEdgePropertyHandlerCallback - Emits code that handles edge +/// properties. Helper function passed to EmitCaseConstructHandler() by +/// EmitEdgeClass(). +void EmitEdgePropertyHandlerCallback (const Init* i, unsigned IndentLevel, + raw_ostream& O) { const DagInit& d = InitPtrToDag(i); const std::string& OpName = GetOperatorName(d); if (OpName == "inc_weight") { O.indent(IndentLevel) << "ret += "; } - else if (OpName == "dec_weight") { - O.indent(IndentLevel) << "ret -= "; - } else if (OpName == "error") { - // TODO: fix this CheckNumberOfArguments(d, 1); O.indent(IndentLevel) << "PrintError(\"" << InitPtrToString(d.getArg(0)) @@ -2696,11 +2692,12 @@ // Function Weight(). O.indent(Indent1) - << "unsigned Weight(const InputLanguagesSet& InLangs) const {\n"; + << "int Weight(const InputLanguagesSet& InLangs) const {\n"; O.indent(Indent2) << "unsigned ret = 0;\n"; // Handle the 'case' construct. - EmitCaseConstructHandler(Case, Indent2, IncDecWeight, false, OptDescs, O); + EmitCaseConstructHandler(Case, Indent2, EmitEdgePropertyHandlerCallback, + false, OptDescs, O); O.indent(Indent2) << "return ret;\n"; O.indent(Indent1) << "}\n\n};\n\n"; From foldr at codedgers.com Mon Aug 23 14:24:12 2010 From: foldr at codedgers.com (Mikhail Glushenkov) Date: Mon, 23 Aug 2010 19:24:12 -0000 Subject: [llvm-commits] [llvm] r111828 - /llvm/trunk/lib/CompilerDriver/CompilationGraph.cpp Message-ID: <20100823192412.CFAA22A6C12D@llvm.org> Author: foldr Date: Mon Aug 23 14:24:12 2010 New Revision: 111828 URL: http://llvm.org/viewvc/llvm-project?rev=111828&view=rev Log: Add a TODO. Modified: llvm/trunk/lib/CompilerDriver/CompilationGraph.cpp Modified: llvm/trunk/lib/CompilerDriver/CompilationGraph.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CompilerDriver/CompilationGraph.cpp?rev=111828&r1=111827&r2=111828&view=diff ============================================================================== --- llvm/trunk/lib/CompilerDriver/CompilationGraph.cpp (original) +++ llvm/trunk/lib/CompilerDriver/CompilationGraph.cpp Mon Aug 23 14:24:12 2010 @@ -55,6 +55,7 @@ int MaxWeight = 0; bool SingleMax = true; + // TODO: fix calculation of SingleMax. for (typename C::const_iterator B = EdgesContainer.begin(), E = EdgesContainer.end(); B != E; ++B) { const Edge* e = B->getPtr(); From foldr at codedgers.com Mon Aug 23 14:24:16 2010 From: foldr at codedgers.com (Mikhail Glushenkov) Date: Mon, 23 Aug 2010 19:24:16 -0000 Subject: [llvm-commits] [llvm] r111829 - /llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp Message-ID: <20100823192416.EB8692A6C12C@llvm.org> Author: foldr Date: Mon Aug 23 14:24:16 2010 New Revision: 111829 URL: http://llvm.org/viewvc/llvm-project?rev=111829&view=rev Log: llvmc: Allow multiple LanguageMaps. Modified: llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp Modified: llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp?rev=111829&r1=111828&r2=111829&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp Mon Aug 23 14:24:16 2010 @@ -2621,12 +2621,12 @@ { O << "int PopulateLanguageMap (LanguageMap& langMap) {\n"; - // Get the relevant field out of RecordKeeper - // TODO: change this to getAllDerivedDefinitions. - const Record* LangMapRecord = Records.getDef("LanguageMap"); + const RecordVector& LanguageMaps = + Records.getAllDerivedDefinitions("LanguageMap"); - if (LangMapRecord) { - ListInit* LangsToSuffixesList = LangMapRecord->getValueAsListInit("map"); + for (RecordVector::const_iterator B = LanguageMaps.begin(), + E = LanguageMaps.end(); B!=E; ++B) { + ListInit* LangsToSuffixesList = (*B)->getValueAsListInit("map"); if (!LangsToSuffixesList) throw "Error in the language map definition!"; From sabre at nondot.org Mon Aug 23 14:39:25 2010 From: sabre at nondot.org (Chris Lattner) Date: Mon, 23 Aug 2010 19:39:25 -0000 Subject: [llvm-commits] [llvm] r111831 - in /llvm/trunk: include/llvm/IntrinsicsX86.td lib/Target/X86/X86InstrInfo.td test/CodeGen/X86/int-intrinsic.ll Message-ID: <20100823193925.CBDB62A6C12C@llvm.org> Author: lattner Date: Mon Aug 23 14:39:25 2010 New Revision: 111831 URL: http://llvm.org/viewvc/llvm-project?rev=111831&view=rev Log: Add a new llvm.x86.int intrinsic, allowing access to the x86 int and int3 instructions. Patch by Peter Housel! Added: llvm/trunk/test/CodeGen/X86/int-intrinsic.ll Modified: llvm/trunk/include/llvm/IntrinsicsX86.td llvm/trunk/lib/Target/X86/X86InstrInfo.td Modified: llvm/trunk/include/llvm/IntrinsicsX86.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IntrinsicsX86.td?rev=111831&r1=111830&r2=111831&view=diff ============================================================================== --- llvm/trunk/include/llvm/IntrinsicsX86.td (original) +++ llvm/trunk/include/llvm/IntrinsicsX86.td Mon Aug 23 14:39:25 2010 @@ -11,6 +11,11 @@ // //===----------------------------------------------------------------------===// +//===----------------------------------------------------------------------===// +// Interrupt traps +let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". + def int_x86_int : Intrinsic<[], [llvm_i8_ty]>; +} //===----------------------------------------------------------------------===// // SSE1 Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=111831&r1=111830&r2=111831&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Mon Aug 23 14:39:25 2010 @@ -595,10 +595,14 @@ } // Trap -def INTO : I<0xce, RawFrm, (outs), (ins), "into", []>; -def INT3 : I<0xcc, RawFrm, (outs), (ins), "int3", []>; +let Uses = [EFLAGS] in { + def INTO : I<0xce, RawFrm, (outs), (ins), "into", []>; +} +def INT3 : I<0xcc, RawFrm, (outs), (ins), "int3", + [(int_x86_int (i8 3))]>; // FIXME: need to make sure that "int $3" matches int3 -def INT : Ii8<0xcd, RawFrm, (outs), (ins i8imm:$trap), "int\t$trap", []>; +def INT : Ii8<0xcd, RawFrm, (outs), (ins i8imm:$trap), "int\t$trap", + [(int_x86_int imm:$trap)]>; def IRET16 : I<0xcf, RawFrm, (outs), (ins), "iret{w}", []>, OpSize; def IRET32 : I<0xcf, RawFrm, (outs), (ins), "iret{l}", []>; Added: llvm/trunk/test/CodeGen/X86/int-intrinsic.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/int-intrinsic.ll?rev=111831&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/int-intrinsic.ll (added) +++ llvm/trunk/test/CodeGen/X86/int-intrinsic.ll Mon Aug 23 14:39:25 2010 @@ -0,0 +1,20 @@ +; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -march=x86-64 | FileCheck %s + +declare void @llvm.x86.int(i8) nounwind + +; CHECK: int3 +; CHECK: ret +define void @primitive_int3 () { +bb.entry: + call void @llvm.x86.int(i8 3) nounwind + ret void +} + +; CHECK: int $-128 +; CHECK: ret +define void @primitive_int128 () { +bb.entry: + call void @llvm.x86.int(i8 128) nounwind + ret void +} From clattner at apple.com Mon Aug 23 14:57:51 2010 From: clattner at apple.com (Chris Lattner) Date: Mon, 23 Aug 2010 12:57:51 -0700 Subject: [llvm-commits] [PATCH] Win32's Hybrid path separator in argv[0] should be accepted to bugpoint In-Reply-To: References: Message-ID: On Aug 23, 2010, at 7:37 AM, NAKAMURA Takumi wrote: > Hello guys, > > I saw argv[0], as below, with mingw-configured Python/w32 lit. > > "c:/path/to/build/Release+Asserts/bin\bugpoint.exe" > > Bugpoint assumes path separator consists only with '/' > to extract directory as "c:/path/to/build/Release+Asserts". (w/o "bin") > > My patch, attached, canonicalize BugDriver::ToolName(==argv[0]) > with llvm::sys::Path. > confirmed on cygwin and ppc-f12. > > Please take a look into my patch, thank you. This patch looks functionally fine, but I'd prefer if you could change OptimizerDriver.cpp to use sys::path locally, instead of changing the BugDriver class to contain a sys::Path. This will reduce the amount of change, and will make it easier when we eventually eliminate sys::Path in the future. -Chris From resistor at mac.com Mon Aug 23 14:59:28 2010 From: resistor at mac.com (Owen Anderson) Date: Mon, 23 Aug 2010 19:59:28 -0000 Subject: [llvm-commits] [llvm] r111834 - /llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp Message-ID: <20100823195928.288272A6C12C@llvm.org> Author: resistor Date: Mon Aug 23 14:59:27 2010 New Revision: 111834 URL: http://llvm.org/viewvc/llvm-project?rev=111834&view=rev Log: Turn LVI back off, I have a testcase now. Modified: llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp Modified: llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp?rev=111834&r1=111833&r2=111834&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp Mon Aug 23 14:59:27 2010 @@ -47,7 +47,7 @@ static cl::opt EnableLVI("enable-jump-threading-lvi", cl::desc("Use LVI for jump threading"), - cl::init(true), + cl::init(false), cl::ReallyHidden); From ggreif at gmail.com Mon Aug 23 15:30:51 2010 From: ggreif at gmail.com (Gabor Greif) Date: Mon, 23 Aug 2010 20:30:51 -0000 Subject: [llvm-commits] [llvm] r111835 - in /llvm/trunk/lib/Target: MSP430/MSP430BranchSelector.cpp PowerPC/PPCBranchSelector.cpp X86/X86CodeEmitter.cpp Message-ID: <20100823203052.007B92A6C12C@llvm.org> Author: ggreif Date: Mon Aug 23 15:30:51 2010 New Revision: 111835 URL: http://llvm.org/viewvc/llvm-project?rev=111835&view=rev Log: tyops Modified: llvm/trunk/lib/Target/MSP430/MSP430BranchSelector.cpp llvm/trunk/lib/Target/PowerPC/PPCBranchSelector.cpp llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp Modified: llvm/trunk/lib/Target/MSP430/MSP430BranchSelector.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430BranchSelector.cpp?rev=111835&r1=111834&r2=111835&view=diff ============================================================================== --- llvm/trunk/lib/Target/MSP430/MSP430BranchSelector.cpp (original) +++ llvm/trunk/lib/Target/MSP430/MSP430BranchSelector.cpp Mon Aug 23 15:30:51 2010 @@ -10,7 +10,7 @@ // This file contains a pass that scans a machine function to determine which // conditional branches need more than 10 bits of displacement to reach their // target basic block. It does this in two passes; a calculation of basic block -// positions pass, and a branch psuedo op to machine branch opcode pass. This +// positions pass, and a branch pseudo op to machine branch opcode pass. This // pass should be run last, just before the assembly printer. // //===----------------------------------------------------------------------===// Modified: llvm/trunk/lib/Target/PowerPC/PPCBranchSelector.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCBranchSelector.cpp?rev=111835&r1=111834&r2=111835&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCBranchSelector.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCBranchSelector.cpp Mon Aug 23 15:30:51 2010 @@ -10,7 +10,7 @@ // This file contains a pass that scans a machine function to determine which // conditional branches need more than 16 bits of displacement to reach their // target basic block. It does this in two passes; a calculation of basic block -// positions pass, and a branch psuedo op to machine branch opcode pass. This +// positions pass, and a branch pseudo op to machine branch opcode pass. This // pass should be run last, just before the assembly printer. // //===----------------------------------------------------------------------===// Modified: llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp?rev=111835&r1=111834&r2=111835&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp Mon Aug 23 15:30:51 2010 @@ -702,7 +702,7 @@ // base address. switch (Opcode) { default: - llvm_unreachable("psuedo instructions should be removed before code" + llvm_unreachable("pseudo instructions should be removed before code" " emission"); break; // Do nothing for Int_MemBarrier - it's just a comment. Add a debug From nicolas.geoffray at gmail.com Mon Aug 23 15:37:14 2010 From: nicolas.geoffray at gmail.com (nicolas geoffray) Date: Mon, 23 Aug 2010 22:37:14 +0200 Subject: [llvm-commits] JIT: Emitting a debug location after an instruction In-Reply-To: References: Message-ID: On Mon, Aug 23, 2010 at 8:57 PM, Jeffrey Yasskin wrote: > > I'm not sure processDebugLoc does what you need it to, even with your > changes. It only records an address when the DebugLoc changes, and > that's not guaranteed to happen exactly on the call > MachineInstruction. (Unless you've done something to ensure it does?) > Each call instruction and only call instructions have metadata associated to it. So I am sure emitting the debug location after emitting the call instructions work for my case. > Do you have a unit test that shows this works in all cases? > Not sure about the "all cases", but at least it is working as intended for me and these hooks (emitting before or after) were already present before my changes. > > Mapping return addresses to metadata seems like more of a job for the > GC system, but that's not implemented for the JIT, so I can't very > well say to use it instead. :-/ > Indeed, doing it in the GC system would also work, but the changes would be way less straightforward than this simple change in the JITemitter. Nicolas -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20100823/a0692559/attachment.html From bruno.cardoso at gmail.com Mon Aug 23 15:41:02 2010 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Mon, 23 Aug 2010 20:41:02 -0000 Subject: [llvm-commits] [llvm] r111837 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Message-ID: <20100823204102.710122A6C12F@llvm.org> Author: bruno Date: Mon Aug 23 15:41:02 2010 New Revision: 111837 URL: http://llvm.org/viewvc/llvm-project?rev=111837&view=rev Log: Start using target speficic nodes for shuffles: pshufhw and pshuflw Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=111837&r1=111836&r2=111837&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Aug 23 15:41:02 2010 @@ -2558,6 +2558,18 @@ // Other Lowering Hooks //===----------------------------------------------------------------------===// +static SDValue getTargetShuffleNode(unsigned Opc, DebugLoc dl, EVT VT, + SDValue V1, SDValue V2, unsigned TargetMask, SelectionDAG &DAG) { + + switch(Opc) { + default: llvm_unreachable("Unknown x86 shuffle node"); + case X86ISD::PSHUFHW: + case X86ISD::PSHUFLW: + return DAG.getNode(Opc, dl, VT, V1, DAG.getConstant(TargetMask, MVT::i8)); + } + + return SDValue(); +} SDValue X86TargetLowering::getReturnAddressFrameIndex(SelectionDAG &DAG) const { MachineFunction &MF = DAG.getMachineFunction(); @@ -4266,8 +4278,14 @@ // If we've eliminated the use of V2, and the new mask is a pshuflw or // pshufhw, that's as cheap as it gets. Return the new shuffle. if ((pshufhw && InOrder[0]) || (pshuflw && InOrder[1])) { - return DAG.getVectorShuffle(MVT::v8i16, dl, NewV, + unsigned Opc = pshufhw ? X86ISD::PSHUFHW : X86ISD::PSHUFLW; + unsigned TargetMask = 0; + NewV = DAG.getVectorShuffle(MVT::v8i16, dl, NewV, DAG.getUNDEF(MVT::v8i16), &MaskVals[0]); + TargetMask = pshufhw ? X86::getShufflePSHUFHWImmediate(NewV.getNode()): + X86::getShufflePSHUFLWImmediate(NewV.getNode()); + V1 = NewV.getOperand(0); + return getTargetShuffleNode(Opc, dl, MVT::v8i16, V1, V1, TargetMask, DAG); } } From grosbach at apple.com Mon Aug 23 15:40:38 2010 From: grosbach at apple.com (Jim Grosbach) Date: Mon, 23 Aug 2010 20:40:38 -0000 Subject: [llvm-commits] [llvm] r111836 - in /llvm/trunk/lib/CodeGen: LocalStackSlotAllocation.cpp PrologEpilogInserter.cpp Message-ID: <20100823204038.AD4BC2A6C12E@llvm.org> Author: grosbach Date: Mon Aug 23 15:40:38 2010 New Revision: 111836 URL: http://llvm.org/viewvc/llvm-project?rev=111836&view=rev Log: Better handling of local offsets for downwards growing stacks. This corrects relative offsets when there are offsets encoded in the instructions and simplifies final allocation in PEI. rdar://8277890 Modified: llvm/trunk/lib/CodeGen/LocalStackSlotAllocation.cpp llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Modified: llvm/trunk/lib/CodeGen/LocalStackSlotAllocation.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LocalStackSlotAllocation.cpp?rev=111836&r1=111835&r2=111836&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LocalStackSlotAllocation.cpp (original) +++ llvm/trunk/lib/CodeGen/LocalStackSlotAllocation.cpp Mon Aug 23 15:40:38 2010 @@ -46,7 +46,7 @@ SmallVector LocalOffsets; void AdjustStackOffset(MachineFrameInfo *MFI, int FrameIdx, int64_t &Offset, - unsigned &MaxAlign); + bool StackGrowsDown, unsigned &MaxAlign); void calculateFrameObjectOffsets(MachineFunction &Fn); bool insertFrameReferenceRegisters(MachineFunction &Fn); public: @@ -102,7 +102,12 @@ /// AdjustStackOffset - Helper function used to adjust the stack frame offset. void LocalStackSlotPass::AdjustStackOffset(MachineFrameInfo *MFI, int FrameIdx, int64_t &Offset, + bool StackGrowsDown, unsigned &MaxAlign) { + // If the stack grows down, add the object size to find the lowest address. + if (StackGrowsDown) + Offset += MFI->getObjectSize(FrameIdx); + unsigned Align = MFI->getObjectAlignment(FrameIdx); // If the alignment of this object is greater than that of the stack, then @@ -112,13 +117,16 @@ // Adjust to alignment boundary. Offset = (Offset + Align - 1) / Align * Align; + int64_t LocalOffset = StackGrowsDown ? -Offset : Offset; DEBUG(dbgs() << "Allocate FI(" << FrameIdx << ") to local offset " - << Offset << "\n"); + << LocalOffset << "\n"); // Keep the offset available for base register allocation - LocalOffsets[FrameIdx] = Offset; + LocalOffsets[FrameIdx] = LocalOffset; // And tell MFI about it for PEI to use later - MFI->mapLocalFrameObject(FrameIdx, Offset); - Offset += MFI->getObjectSize(FrameIdx); + MFI->mapLocalFrameObject(FrameIdx, LocalOffset); + + if (!StackGrowsDown) + Offset += MFI->getObjectSize(FrameIdx); ++NumAllocations; } @@ -129,6 +137,9 @@ void LocalStackSlotPass::calculateFrameObjectOffsets(MachineFunction &Fn) { // Loop over all of the stack objects, assigning sequential addresses... MachineFrameInfo *MFI = Fn.getFrameInfo(); + const TargetFrameInfo &TFI = *Fn.getTarget().getFrameInfo(); + bool StackGrowsDown = + TFI.getStackGrowthDirection() == TargetFrameInfo::StackGrowsDown; int64_t Offset = 0; unsigned MaxAlign = 0; @@ -136,7 +147,8 @@ // stack. SmallSet LargeStackObjs; if (MFI->getStackProtectorIndex() >= 0) { - AdjustStackOffset(MFI, MFI->getStackProtectorIndex(), Offset, MaxAlign); + AdjustStackOffset(MFI, MFI->getStackProtectorIndex(), Offset, + StackGrowsDown, MaxAlign); // Assign large stack objects first. for (unsigned i = 0, e = MFI->getObjectIndexEnd(); i != e; ++i) { @@ -147,7 +159,7 @@ if (!MFI->MayNeedStackProtector(i)) continue; - AdjustStackOffset(MFI, i, Offset, MaxAlign); + AdjustStackOffset(MFI, i, Offset, StackGrowsDown, MaxAlign); LargeStackObjs.insert(i); } } @@ -162,7 +174,7 @@ if (LargeStackObjs.count(i)) continue; - AdjustStackOffset(MFI, i, Offset, MaxAlign); + AdjustStackOffset(MFI, i, Offset, StackGrowsDown, MaxAlign); } // Remember how big this blob of stack space is @@ -173,8 +185,8 @@ static inline bool lookupCandidateBaseReg(const SmallVector, 8> &Regs, std::pair &RegOffset, + int64_t FrameSizeAdjust, int64_t LocalFrameOffset, - bool StackGrowsDown, const MachineInstr *MI, const TargetRegisterInfo *TRI) { unsigned e = Regs.size(); @@ -182,9 +194,7 @@ RegOffset = Regs[i]; // Check if the relative offset from the where the base register references // to the target address is in range for the instruction. - int64_t Offset = LocalFrameOffset - RegOffset.second; - if (StackGrowsDown) - Offset = -Offset; + int64_t Offset = FrameSizeAdjust + LocalFrameOffset - RegOffset.second; if (TRI->isFrameOffsetLegal(MI, Offset)) return true; } @@ -241,6 +251,8 @@ if (TRI->needsFrameBaseReg(MI, i)) { unsigned BaseReg = 0; int64_t Offset = 0; + int64_t FrameSizeAdjust = StackGrowsDown ? MFI->getLocalFrameSize() + : 0; DEBUG(dbgs() << " Replacing FI in: " << *MI); @@ -251,15 +263,15 @@ // register. std::pair RegOffset; if (lookupCandidateBaseReg(BaseRegisters, RegOffset, + FrameSizeAdjust, LocalOffsets[FrameIdx], - StackGrowsDown, MI, TRI)) { + MI, TRI)) { DEBUG(dbgs() << " Reusing base register " << RegOffset.first << "\n"); // We found a register to reuse. BaseReg = RegOffset.first; - Offset = LocalOffsets[FrameIdx] - RegOffset.second; - if (StackGrowsDown) - Offset = -Offset; + Offset = FrameSizeAdjust + LocalOffsets[FrameIdx] - + RegOffset.second; } else { // No previously defined register was in range, so create a // new one. @@ -280,9 +292,10 @@ // applied twice. Offset = -InstrOffset; + int64_t BaseOffset = FrameSizeAdjust + LocalOffsets[FrameIdx] + + InstrOffset; BaseRegisters.push_back( - std::pair(BaseReg, - LocalOffsets[FrameIdx] + InstrOffset)); + std::pair(BaseReg, BaseOffset)); ++NumBaseRegisters; UsedBaseReg = true; } @@ -295,7 +308,6 @@ ++NumReplacements; } - } } } Modified: llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp?rev=111836&r1=111835&r2=111836&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp (original) +++ llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Mon Aug 23 15:40:38 2010 @@ -572,16 +572,18 @@ DEBUG(dbgs() << "Local frame base offset: " << Offset << "\n"); - // Allocate the local block - Offset += MFI->getLocalFrameSize(); - // Resolve offsets for objects in the local block. for (unsigned i = 0, e = MFI->getLocalFrameObjectCount(); i != e; ++i) { std::pair Entry = MFI->getLocalFrameObjectMap(i); - int64_t FIOffset = MFI->getLocalFrameBaseOffset() + Entry.second; - - AdjustStackOffset(MFI, Entry.first, StackGrowsDown, FIOffset, MaxAlign); + int64_t FIOffset = (StackGrowsDown ? -Offset : Offset) + Entry.second; + DEBUG(dbgs() << "alloc FI(" << Entry.first << ") at SP[" << + FIOffset << "]\n"); + MFI->setObjectOffset(Entry.first, FIOffset); } + // Allocate the local block + Offset += MFI->getLocalFrameSize(); + + MaxAlign = std::max(Align, MaxAlign); } // Make sure that the stack protector comes before the local variables on the From gohman at apple.com Mon Aug 23 16:14:06 2010 From: gohman at apple.com (Dan Gohman) Date: Mon, 23 Aug 2010 21:14:06 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r111841 - /llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp Message-ID: <20100823211406.724272A6C12C@llvm.org> Author: djg Date: Mon Aug 23 16:14:06 2010 New Revision: 111841 URL: http://llvm.org/viewvc/llvm-project?rev=111841&view=rev Log: Reinstate the code for emitting an initial debug type for a struct, to handle the case where the struct is only forward-declared. In this case, a temporary MDNode is not needed and not desired. Modified: llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp?rev=111841&r1=111840&r2=111841&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp Mon Aug 23 16:14:06 2010 @@ -1007,11 +1007,22 @@ if (MDNode *TN = dyn_cast_or_null(I->second)) return DIType(TN); - llvm::DIType FwdDecl = DebugFactory.CreateTemporaryType(); - // forward declaration, - if (TYPE_SIZE(type) == 0) + if (TYPE_SIZE(type) == 0) { + llvm::DICompositeType FwdDecl = + DebugFactory.CreateCompositeType(Tag, + TyContext, + GetNodeName(type), + getOrCreateFile(Loc.file), + Loc.line, + 0, 0, 0, + SFlags | llvm::DIType::FlagFwdDecl, + llvm::DIType(), llvm::DIArray(), + RunTimeLang); return FwdDecl; + } + + llvm::DIType FwdDecl = DebugFactory.CreateTemporaryType(); // Insert into the TypeCache so that recursive uses will find it. llvm::MDNode *FDN = FwdDecl; From benny.kra at googlemail.com Mon Aug 23 16:19:37 2010 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Mon, 23 Aug 2010 21:19:37 -0000 Subject: [llvm-commits] [llvm] r111844 - /llvm/trunk/lib/MC/ELFObjectWriter.cpp Message-ID: <20100823211937.6E91A2A6C12C@llvm.org> Author: d0k Date: Mon Aug 23 16:19:37 2010 New Revision: 111844 URL: http://llvm.org/viewvc/llvm-project?rev=111844&view=rev Log: ELFObjectWriter: Run ComputeSymbolTable before recording relocations. This way we can use the information it has computed and don't have to recompute the same stuff over and over again. Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=111844&r1=111843&r2=111844&view=diff ============================================================================== --- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original) +++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Mon Aug 23 16:19:37 2010 @@ -228,29 +228,8 @@ const MCFragment *Fragment, const MCFixup &Fixup, MCValue Target, uint64_t &FixedValue); - // XXX-PERF: this should be cached - uint64_t getNumOfLocalSymbols(const MCAssembler &Asm) { - std::vector Local; - - uint64_t Index = 0; - for (MCAssembler::const_symbol_iterator it = Asm.symbol_begin(), - ie = Asm.symbol_end(); it != ie; ++it) { - const MCSymbol &Symbol = it->getSymbol(); - - // Ignore non-linker visible symbols. - if (!Asm.isSymbolLinkerVisible(Symbol)) - continue; - - if (it->isExternal() || Symbol.isUndefined()) - continue; - - Index++; - } - - return Index; - } - - uint64_t getSymbolIndexInSymbolTable(MCAssembler &Asm, const MCSymbol *S); + uint64_t getSymbolIndexInSymbolTable(const MCAssembler &Asm, + const MCSymbol *S); /// ComputeSymbolTable - Compute the symbol table data /// @@ -271,7 +250,10 @@ void CreateMetadataSections(MCAssembler &Asm, MCAsmLayout &Layout); - void ExecutePostLayoutBinding(MCAssembler &Asm) {} + void ExecutePostLayoutBinding(MCAssembler &Asm) { + // Compute symbol table information. + ComputeSymbolTable(Asm); + } void WriteSecHdrEntry(uint32_t Name, uint32_t Type, uint64_t Flags, uint64_t Address, uint64_t Offset, @@ -512,10 +494,10 @@ if (Base) { if (MCFragment *F = SD.getFragment()) { - Index = F->getParent()->getOrdinal() + getNumOfLocalSymbols(Asm) + 1; + Index = F->getParent()->getOrdinal() + LocalSymbolData.size() + 1; Value += Layout.getSymbolAddress(&SD); } else - Index = getSymbolIndexInSymbolTable(const_cast(Asm), Symbol); + Index = getSymbolIndexInSymbolTable(Asm, Symbol); if (Base != &SD) Value += Layout.getSymbolAddress(&SD) - Layout.getSymbolAddress(Base); Addend = Value; @@ -525,7 +507,7 @@ if (F) { // Index of the section in .symtab against this symbol // is being relocated + 2 (empty section + abs. symbols). - Index = F->getParent()->getOrdinal() + getNumOfLocalSymbols(Asm) + 1; + Index = F->getParent()->getOrdinal() + LocalSymbolData.size() + 1; MCSectionData *FSD = F->getParent(); // Offset of the symbol in the section @@ -597,62 +579,19 @@ Relocations[Fragment->getParent()].push_back(ERE); } -// XXX-PERF: this should be cached -uint64_t ELFObjectWriterImpl::getSymbolIndexInSymbolTable(MCAssembler &Asm, - const MCSymbol *S) { - std::vector Local; - std::vector External; - std::vector Undefined; - - for (MCAssembler::symbol_iterator it = Asm.symbol_begin(), - ie = Asm.symbol_end(); it != ie; ++it) { - const MCSymbol &Symbol = it->getSymbol(); - - // Ignore non-linker visible symbols. - if (!Asm.isSymbolLinkerVisible(Symbol)) - continue; - - if (it->isExternal() || Symbol.isUndefined()) - continue; - - ELFSymbolData MSD; - MSD.SymbolData = it; - - Local.push_back(MSD); - } - for (MCAssembler::symbol_iterator it = Asm.symbol_begin(), - ie = Asm.symbol_end(); it != ie; ++it) { - const MCSymbol &Symbol = it->getSymbol(); - - // Ignore non-linker visible symbols. - if (!Asm.isSymbolLinkerVisible(Symbol)) - continue; - - if (!it->isExternal() && !Symbol.isUndefined()) - continue; - - ELFSymbolData MSD; - MSD.SymbolData = it; - - if (Symbol.isUndefined()) - Undefined.push_back(MSD); - else - External.push_back(MSD); - } - - array_pod_sort(Local.begin(), Local.end()); - array_pod_sort(External.begin(), External.end()); - array_pod_sort(Undefined.begin(), Undefined.end()); - - for (unsigned i = 0, e = Local.size(); i != e; ++i) - if (&Local[i].SymbolData->getSymbol() == S) +uint64_t +ELFObjectWriterImpl::getSymbolIndexInSymbolTable(const MCAssembler &Asm, + const MCSymbol *S) { + for (unsigned i = 0, e = LocalSymbolData.size(); i != e; ++i) + if (&LocalSymbolData[i].SymbolData->getSymbol() == S) return i + /* empty symbol */ 1; - for (unsigned i = 0, e = External.size(); i != e; ++i) - if (&External[i].SymbolData->getSymbol() == S) - return i + Local.size() + Asm.size() + /* empty symbol */ 1; - for (unsigned i = 0, e = Undefined.size(); i != e; ++i) - if (&Undefined[i].SymbolData->getSymbol() == S) - return i + Local.size() + External.size() + Asm.size() + /* empty symbol */ 1; + for (unsigned i = 0, e = ExternalSymbolData.size(); i != e; ++i) + if (&ExternalSymbolData[i].SymbolData->getSymbol() == S) + return i + LocalSymbolData.size() + Asm.size() + /* empty symbol */ 1; + for (unsigned i = 0, e = UndefinedSymbolData.size(); i != e; ++i) + if (&UndefinedSymbolData[i].SymbolData->getSymbol() == S) + return i + LocalSymbolData.size() + ExternalSymbolData.size() + + Asm.size() + /* empty symbol */ 1; llvm_unreachable("Cannot find symbol which should exist!"); } @@ -908,9 +847,6 @@ void ELFObjectWriterImpl::WriteObject(const MCAssembler &Asm, const MCAsmLayout &Layout) { - // Compute symbol table information. - ComputeSymbolTable(const_cast(Asm)); - CreateMetadataSections(const_cast(Asm), const_cast(Layout)); From benny.kra at googlemail.com Mon Aug 23 16:23:52 2010 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Mon, 23 Aug 2010 21:23:52 -0000 Subject: [llvm-commits] [llvm] r111846 - /llvm/trunk/lib/MC/ELFObjectWriter.cpp Message-ID: <20100823212352.7FE2F2A6C12C@llvm.org> Author: d0k Date: Mon Aug 23 16:23:52 2010 New Revision: 111846 URL: http://llvm.org/viewvc/llvm-project?rev=111846&view=rev Log: Reduce code duplication. Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=111846&r1=111845&r2=111846&view=diff ============================================================================== --- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original) +++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Mon Aug 23 16:23:52 2010 @@ -64,8 +64,8 @@ // Support lexicographic sorting. bool operator<(const ELFSymbolData &RHS) const { - const std::string &Name = SymbolData->getSymbol().getName(); - return Name < RHS.SymbolData->getSymbol().getName(); + return SymbolData->getSymbol().getName() < + RHS.SymbolData->getSymbol().getName(); } }; @@ -151,21 +151,13 @@ } void StringLE32(char *buf, uint32_t Value) { - buf[0] = char(Value >> 0); - buf[1] = char(Value >> 8); - buf[2] = char(Value >> 16); - buf[3] = char(Value >> 24); + StringLE16(buf, uint16_t(Value >> 0)); + StringLE16(buf, uint16_t(Value >> 16)); } void StringLE64(char *buf, uint64_t Value) { - buf[0] = char(Value >> 0); - buf[1] = char(Value >> 8); - buf[2] = char(Value >> 16); - buf[3] = char(Value >> 24); - buf[4] = char(Value >> 32); - buf[5] = char(Value >> 40); - buf[6] = char(Value >> 48); - buf[7] = char(Value >> 56); + StringLE32(buf, uint32_t(Value >> 0)); + StringLE32(buf, uint32_t(Value >> 32)); } void StringBE16(char *buf ,uint16_t Value) { @@ -174,21 +166,13 @@ } void StringBE32(char *buf, uint32_t Value) { - buf[0] = char(Value >> 24); - buf[1] = char(Value >> 16); - buf[2] = char(Value >> 8); - buf[3] = char(Value >> 0); + StringBE16(buf, uint16_t(Value >> 16)); + StringBE16(buf, uint16_t(Value >> 0)); } void StringBE64(char *buf, uint64_t Value) { - buf[0] = char(Value >> 56); - buf[1] = char(Value >> 48); - buf[2] = char(Value >> 40); - buf[3] = char(Value >> 32); - buf[4] = char(Value >> 24); - buf[5] = char(Value >> 16); - buf[6] = char(Value >> 8); - buf[7] = char(Value >> 0); + StringBE32(buf, uint32_t(Value >> 32)); + StringBE32(buf, uint32_t(Value >> 0)); } void String16(char *buf, uint16_t Value) { From grosbach at apple.com Mon Aug 23 16:29:29 2010 From: grosbach at apple.com (Jim Grosbach) Date: Mon, 23 Aug 2010 21:29:29 -0000 Subject: [llvm-commits] [llvm] r111847 - in /llvm/trunk: include/llvm/CodeGen/MachineFrameInfo.h lib/CodeGen/PrologEpilogInserter.cpp Message-ID: <20100823212929.D2F552A6C12C@llvm.org> Author: grosbach Date: Mon Aug 23 16:29:29 2010 New Revision: 111847 URL: http://llvm.org/viewvc/llvm-project?rev=111847&view=rev Log: Remove the MFI storage of the local allocation block size. It's not needed. Modified: llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Modified: llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h?rev=111847&r1=111846&r2=111847&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h (original) +++ llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h Mon Aug 23 16:29:29 2010 @@ -207,11 +207,6 @@ /// LocalFrameSize - Size of the pre-allocated local frame block. int64_t LocalFrameSize; - /// LocalFrameBaseOffset - The base offset from the stack pointer at - /// function entry of the local frame blob. Set by PEI for use by - /// target in eliminateFrameIndex(). - int64_t LocalFrameBaseOffset; - /// Required alignment of the local object blob, which is the strictest /// alignment of any object in it. unsigned LocalFrameMaxAlign; @@ -233,7 +228,6 @@ MaxCallFrameSize = 0; CSIValid = false; LocalFrameSize = 0; - LocalFrameBaseOffset = 0; LocalFrameMaxAlign = 0; UseLocalStackAllocationBlock = false; } @@ -299,14 +293,6 @@ /// the local object block. int64_t getLocalFrameObjectCount() { return LocalFrameObjects.size(); } - /// setLocalFrameBaseOffset - Set the base SP offset of the local frame - /// blob. - void setLocalFrameBaseOffset(int64_t o) { LocalFrameBaseOffset = o; } - - /// getLocalFrameBaseOffset - Get the base SP offset of the local frame - /// blob. - int64_t getLocalFrameBaseOffset() const { return LocalFrameBaseOffset; } - /// setLocalFrameSize - Set the size of the local object blob. void setLocalFrameSize(int64_t sz) { LocalFrameSize = sz; } Modified: llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp?rev=111847&r1=111846&r2=111847&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp (original) +++ llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Mon Aug 23 16:29:29 2010 @@ -566,10 +566,6 @@ // Adjust to alignment boundary. Offset = (Offset + Align - 1) / Align * Align; - // Store the offset of the start of the local allocation block. This - // will be used later when resolving frame base virtual register pseudos. - MFI->setLocalFrameBaseOffset(Offset); - DEBUG(dbgs() << "Local frame base offset: " << Offset << "\n"); // Resolve offsets for objects in the local block. From benny.kra at googlemail.com Mon Aug 23 16:32:00 2010 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Mon, 23 Aug 2010 21:32:00 -0000 Subject: [llvm-commits] [llvm] r111848 - /llvm/trunk/lib/MC/ELFObjectWriter.cpp Message-ID: <20100823213200.36D7C2A6C12C@llvm.org> Author: d0k Date: Mon Aug 23 16:32:00 2010 New Revision: 111848 URL: http://llvm.org/viewvc/llvm-project?rev=111848&view=rev Log: Fix thinko. Having no tests is great ... Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=111848&r1=111847&r2=111848&view=diff ============================================================================== --- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original) +++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Mon Aug 23 16:32:00 2010 @@ -152,12 +152,12 @@ void StringLE32(char *buf, uint32_t Value) { StringLE16(buf, uint16_t(Value >> 0)); - StringLE16(buf, uint16_t(Value >> 16)); + StringLE16(buf + 2, uint16_t(Value >> 16)); } void StringLE64(char *buf, uint64_t Value) { StringLE32(buf, uint32_t(Value >> 0)); - StringLE32(buf, uint32_t(Value >> 32)); + StringLE32(buf + 4, uint32_t(Value >> 32)); } void StringBE16(char *buf ,uint16_t Value) { @@ -167,12 +167,12 @@ void StringBE32(char *buf, uint32_t Value) { StringBE16(buf, uint16_t(Value >> 16)); - StringBE16(buf, uint16_t(Value >> 0)); + StringBE16(buf + 2, uint16_t(Value >> 0)); } void StringBE64(char *buf, uint64_t Value) { StringBE32(buf, uint32_t(Value >> 32)); - StringBE32(buf, uint32_t(Value >> 0)); + StringBE32(buf + 4, uint32_t(Value >> 0)); } void String16(char *buf, uint16_t Value) { From clattner at apple.com Mon Aug 23 16:36:06 2010 From: clattner at apple.com (Chris Lattner) Date: Mon, 23 Aug 2010 14:36:06 -0700 Subject: [llvm-commits] [llvm] r111837 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp In-Reply-To: <20100823204102.710122A6C12F@llvm.org> References: <20100823204102.710122A6C12F@llvm.org> Message-ID: <81751397-40B6-4056-B357-0AB7C5421105@apple.com> On Aug 23, 2010, at 1:41 PM, Bruno Cardoso Lopes wrote: > URL: http://llvm.org/viewvc/llvm-project?rev=111837&view=rev > Log: > Start using target speficic nodes for shuffles: pshufhw and pshuflw Cool! > +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Aug 23 15:41:02 2010 > @@ -2558,6 +2558,18 @@ > // Other Lowering Hooks > //===----------------------------------------------------------------------===// > > +static SDValue getTargetShuffleNode(unsigned Opc, DebugLoc dl, EVT VT, > + SDValue V1, SDValue V2, unsigned TargetMask, SelectionDAG &DAG) { Should this be named something like "getPSHUF" or do you plan to expand this to other shuffle nodes that take an i8 immediate? getTargetShuffleNode seems like an overly generic name. -Chris > + > + switch(Opc) { > + default: llvm_unreachable("Unknown x86 shuffle node"); > + case X86ISD::PSHUFHW: > + case X86ISD::PSHUFLW: > + return DAG.getNode(Opc, dl, VT, V1, DAG.getConstant(TargetMask, MVT::i8)); > + } > + > + return SDValue(); > +} > > SDValue X86TargetLowering::getReturnAddressFrameIndex(SelectionDAG &DAG) const { > MachineFunction &MF = DAG.getMachineFunction(); > @@ -4266,8 +4278,14 @@ > // If we've eliminated the use of V2, and the new mask is a pshuflw or > // pshufhw, that's as cheap as it gets. Return the new shuffle. > if ((pshufhw && InOrder[0]) || (pshuflw && InOrder[1])) { > - return DAG.getVectorShuffle(MVT::v8i16, dl, NewV, > + unsigned Opc = pshufhw ? X86ISD::PSHUFHW : X86ISD::PSHUFLW; > + unsigned TargetMask = 0; > + NewV = DAG.getVectorShuffle(MVT::v8i16, dl, NewV, > DAG.getUNDEF(MVT::v8i16), &MaskVals[0]); > + TargetMask = pshufhw ? X86::getShufflePSHUFHWImmediate(NewV.getNode()): > + X86::getShufflePSHUFLWImmediate(NewV.getNode()); > + V1 = NewV.getOperand(0); > + return getTargetShuffleNode(Opc, dl, MVT::v8i16, V1, V1, TargetMask, DAG); > } > } > > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From bruno.cardoso at gmail.com Mon Aug 23 16:40:51 2010 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Mon, 23 Aug 2010 14:40:51 -0700 Subject: [llvm-commits] [llvm] r111837 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp In-Reply-To: <81751397-40B6-4056-B357-0AB7C5421105@apple.com> References: <20100823204102.710122A6C12F@llvm.org> <81751397-40B6-4056-B357-0AB7C5421105@apple.com> Message-ID: On Mon, Aug 23, 2010 at 2:36 PM, Chris Lattner wrote: > On Aug 23, 2010, at 1:41 PM, Bruno Cardoso Lopes wrote: >> URL: http://llvm.org/viewvc/llvm-project?rev=111837&view=rev >> Log: >> Start using target speficic nodes for shuffles: pshufhw and pshuflw > > Cool! > >> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Aug 23 15:41:02 2010 >> @@ -2558,6 +2558,18 @@ >> // ? ? ? ? ? ? ? ? ? ? ? ? ? Other Lowering Hooks >> //===----------------------------------------------------------------------===// >> >> +static SDValue getTargetShuffleNode(unsigned Opc, DebugLoc dl, EVT VT, >> + ? ? ? ? ? ? ?SDValue V1, SDValue V2, unsigned TargetMask, SelectionDAG &DAG) { > > Should this be named something like "getPSHUF" or do you plan to expand this to other shuffle nodes that take an i8 immediate? ?getTargetShuffleNode seems like an overly generic name. I'm open to better names, but the idea is to have something that would match several types of x86 "shuffle capable" instructions: static SDValue getTargetShuffleNode(unsigned Opc, DebugLoc dl, EVT VT, SDValue V1, SDValue V2, unsigned TargetMask, SelectionDAG &DAG) { switch(Opc) { case X86ISD::PSHUFD: case X86ISD::PSHUFHW: case X86ISD::PSHUFHW_LD: case X86ISD::PSHUFLW: case X86ISD::PSHUFLW_LD: return DAG.getNode(Opc, dl, VT, V1, DAG.getConstant(TargetMask, MVT::i8)); case X86ISD::PALIGN: case X86ISD::SHUFPD: case X86ISD::SHUFPS: return DAG.getNode(Opc, dl, VT, V1, V2, DAG.getConstant(TargetMask, MVT::i8)); case X86ISD::MOVLHPS: case X86ISD::MOVHLPS: case X86ISD::MOVLHPD: case X86ISD::MOVHLPD: case X86ISD::MOVHPS: case X86ISD::MOVLPS: case X86ISD::MOVHPD: case X86ISD::MOVLPD: case X86ISD::MOVSD: case X86ISD::MOVSS: case X86ISD::UNPCKLPS: case X86ISD::UNPCKLPD: case X86ISD::UNPCKHPS: case X86ISD::UNPCKHPD: case X86ISD::PUNPCKLBW: case X86ISD::PUNPCKLWD: case X86ISD::PUNPCKLDQ: case X86ISD::PUNPCKLQDQ: case X86ISD::PUNPCKHBW: case X86ISD::PUNPCKHWD: case X86ISD::PUNPCKHDQ: case X86ISD::PUNPCKHQDQ: return DAG.getNode(Opc, dl, VT, V1, V2); case X86ISD::MOVDDUP: case X86ISD::MOVSHDUP: case X86ISD::MOVSLDUP: case X86ISD::MOVSHDUP_LD: case X86ISD::MOVSLDUP_LD: return DAG.getNode(Opc, dl, VT, V1); default: assert(false && "Unknown x86 target specific shuffle node."); } return SDValue(); } -- Bruno Cardoso Lopes http://www.brunocardoso.cc From echristo at apple.com Mon Aug 23 16:44:13 2010 From: echristo at apple.com (Eric Christopher) Date: Mon, 23 Aug 2010 21:44:13 -0000 Subject: [llvm-commits] [llvm] r111850 - /llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Message-ID: <20100823214413.127502A6C12C@llvm.org> Author: echristo Date: Mon Aug 23 16:44:12 2010 New Revision: 111850 URL: http://llvm.org/viewvc/llvm-project?rev=111850&view=rev Log: Start getting ARM loads/address computation going. Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=111850&r1=111849&r2=111850&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Mon Aug 23 16:44:12 2010 @@ -101,8 +101,14 @@ virtual bool TargetSelectInstruction(const Instruction *I); #include "ARMGenFastISel.inc" + + // Instruction selection routines. + virtual bool ARMSelectLoad(const Instruction *I); + // Utility routines. private: + bool ARMComputeRegOffset(const Instruction *I, unsigned &Reg, int &Offset); + bool DefinesOptionalPredicate(MachineInstr *MI, bool *CPSR); const MachineInstrBuilder &AddOptionalDefs(const MachineInstrBuilder &MIB); }; @@ -301,8 +307,75 @@ return ResultReg; } +bool ARMFastISel::ARMComputeRegOffset(const Instruction *I, unsigned &Reg, + int &Offset) { + // Some boilerplate from the X86 FastISel. + const User *U = NULL; + Value *Op1 = I->getOperand(0); + unsigned Opcode = Instruction::UserOp1; + if (const Instruction *I = dyn_cast(Op1)) { + // Don't walk into other basic blocks; it's possible we haven't + // visited them yet, so the instructions may not yet be assigned + // virtual registers. + if (FuncInfo.MBBMap[I->getParent()] != FuncInfo.MBB) + return false; + + Opcode = I->getOpcode(); + U = I; + } else if (const ConstantExpr *C = dyn_cast(Op1)) { + Opcode = C->getOpcode(); + U = C; + } + + if (const PointerType *Ty = dyn_cast(Op1->getType())) + if (Ty->getAddressSpace() > 255) + // Fast instruction selection doesn't support the special + // address spaces. + return false; + + switch (Opcode) { + default: + //errs() << "Failing Opcode is: " << *Op1 << "\n"; + break; + case Instruction::Alloca: { + // Do static allocas. + const AllocaInst *A = cast(Op1); + DenseMap::iterator SI = + FuncInfo.StaticAllocaMap.find(A); + if (SI != FuncInfo.StaticAllocaMap.end()) + Offset = + TM.getRegisterInfo()->getFrameIndexReference(*FuncInfo.MF, + SI->second, Reg); + else + return false; + return true; + } + } + return false; +} + +bool ARMFastISel::ARMSelectLoad(const Instruction *I) { + + unsigned Reg; + int Offset; + + // See if we can handle this as Reg + Offset + if (!ARMComputeRegOffset(I, Reg, Offset)) + return false; + + + unsigned ResultReg = createResultReg(ARM::GPRRegisterClass); + AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, + TII.get(ARM::LDR), ResultReg) + .addImm(0).addReg(Reg).addImm(Offset)); + + return true; +} + bool ARMFastISel::TargetSelectInstruction(const Instruction *I) { switch (I->getOpcode()) { + case Instruction::Load: + return ARMSelectLoad(I); default: break; } return false; From gohman at apple.com Mon Aug 23 17:32:06 2010 From: gohman at apple.com (Dan Gohman) Date: Mon, 23 Aug 2010 22:32:06 -0000 Subject: [llvm-commits] [llvm] r111853 - /llvm/trunk/lib/VMCore/Metadata.cpp Message-ID: <20100823223206.12B322A6C12C@llvm.org> Author: djg Date: Mon Aug 23 17:32:05 2010 New Revision: 111853 URL: http://llvm.org/viewvc/llvm-project?rev=111853&view=rev Log: Verify that a non-uniqued non-temporary MDNode is not deleted via MDNode::deleteTemporary. Modified: llvm/trunk/lib/VMCore/Metadata.cpp Modified: llvm/trunk/lib/VMCore/Metadata.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Metadata.cpp?rev=111853&r1=111852&r2=111853&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Metadata.cpp (original) +++ llvm/trunk/lib/VMCore/Metadata.cpp Mon Aug 23 17:32:05 2010 @@ -258,7 +258,9 @@ void MDNode::deleteTemporary(MDNode *N) { assert(N->use_empty() && "Temporary MDNode has uses!"); assert(!N->getContext().pImpl->MDNodeSet.RemoveNode(N) && - "Deleting a non-temporary node!"); + "Deleting a non-temporary uniqued node!"); + assert(!N->getContext().pImpl->NonUniquedMDNodes.erase(N) && + "Deleting a non-temporary non-uniqued node!"); assert((N->getSubclassDataFromValue() & NotUniquedBit) && "Temporary MDNode does not have NotUniquedBit set!"); assert((N->getSubclassDataFromValue() & DestroyFlag) == 0 && From echristo at apple.com Mon Aug 23 17:32:45 2010 From: echristo at apple.com (Eric Christopher) Date: Mon, 23 Aug 2010 22:32:45 -0000 Subject: [llvm-commits] [llvm] r111854 - /llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Message-ID: <20100823223245.383052A6C12C@llvm.org> Author: echristo Date: Mon Aug 23 17:32:45 2010 New Revision: 111854 URL: http://llvm.org/viewvc/llvm-project?rev=111854&view=rev Log: Add an ARMFunctionInfo member and use it. Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=111854&r1=111853&r2=111854&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Mon Aug 23 17:32:45 2010 @@ -57,6 +57,7 @@ const TargetMachine &TM; const TargetInstrInfo &TII; const TargetLowering &TLI; + const ARMFunctionInfo *AFI; public: explicit ARMFastISel(FunctionLoweringInfo &funcInfo) @@ -65,6 +66,7 @@ TII(*TM.getInstrInfo()), TLI(*TM.getTargetLowering()) { Subtarget = &TM.getSubtarget(); + AFI = funcInfo.MF->getInfo(); } // Code from FastISel.cpp. @@ -363,7 +365,6 @@ if (!ARMComputeRegOffset(I, Reg, Offset)) return false; - unsigned ResultReg = createResultReg(ARM::GPRRegisterClass); AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(ARM::LDR), ResultReg) @@ -373,6 +374,9 @@ } bool ARMFastISel::TargetSelectInstruction(const Instruction *I) { + // No Thumb-1 for now. + if (AFI->isThumbFunction() && !AFI->isThumb2Function()) return false; + switch (I->getOpcode()) { case Instruction::Load: return ARMSelectLoad(I); From grosbach at apple.com Mon Aug 23 17:52:36 2010 From: grosbach at apple.com (Jim Grosbach) Date: Mon, 23 Aug 2010 15:52:36 -0700 Subject: [llvm-commits] [llvm] r111850 - /llvm/trunk/lib/Target/ARM/ARMFastISel.cpp In-Reply-To: <20100823214413.127502A6C12C@llvm.org> References: <20100823214413.127502A6C12C@llvm.org> Message-ID: <2C0D1EA5-D870-496B-8FD2-88C0AE3E3832@apple.com> Hey Eric, Glad to see this making progress. Loads and stores will likely be some of the more obnoxious pieces to deal with. I was going to ask, "Is there a check somewhere to make sure we don't try to get here in Thumb or Thumb2 mode?" but you've already checked in exactly that. So moving on... getFrameIndexReference() doesn't check whether the reg/offset will be in range for an instruction, but rather just returns the appropriate base register and the offset from it for a frame index reference. The LDR instruction generated here may thus have an out-of-range offset in the case of large (> 4k) stack frames. At least for now, it may be reasonable to just punt for offsets that don't fit in the immediate. Similarly, is there are check above this to make sure we're only dealing with GPR register class loads? Even in ARM mode, there's a number of others (see loadRegFromStackSlot() in ARMBaseInstrInfo.cpp for examples) that may need to be handled. Like the above, though, it's not unreasonable to just detect them and punt for now. You're resolving frame index references directly. Is this happening after register allocation? I don't see how it can be, but could be wrong. If it's pre-regalloc, those offsets will be incorrect, as the code won't know how many callee-saved register slots are allocated for the function, nor how many spill slots. Perhaps you can use loadRegFromStackSlot() and storeRegToStackSlot() directly and the use the normal PEI code? -Jim On Aug 23, 2010, at 2:44 PM, Eric Christopher wrote: > Author: echristo > Date: Mon Aug 23 16:44:12 2010 > New Revision: 111850 > > URL: http://llvm.org/viewvc/llvm-project?rev=111850&view=rev > Log: > Start getting ARM loads/address computation going. > > Modified: > llvm/trunk/lib/Target/ARM/ARMFastISel.cpp > > Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=111850&r1=111849&r2=111850&view=diff > ============================================================================== > --- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original) > +++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Mon Aug 23 16:44:12 2010 > @@ -101,8 +101,14 @@ > virtual bool TargetSelectInstruction(const Instruction *I); > > #include "ARMGenFastISel.inc" > + > + // Instruction selection routines. > + virtual bool ARMSelectLoad(const Instruction *I); > > + // Utility routines. > private: > + bool ARMComputeRegOffset(const Instruction *I, unsigned &Reg, int &Offset); > + > bool DefinesOptionalPredicate(MachineInstr *MI, bool *CPSR); > const MachineInstrBuilder &AddOptionalDefs(const MachineInstrBuilder &MIB); > }; > @@ -301,8 +307,75 @@ > return ResultReg; > } > > +bool ARMFastISel::ARMComputeRegOffset(const Instruction *I, unsigned &Reg, > + int &Offset) { > + // Some boilerplate from the X86 FastISel. > + const User *U = NULL; > + Value *Op1 = I->getOperand(0); > + unsigned Opcode = Instruction::UserOp1; > + if (const Instruction *I = dyn_cast(Op1)) { > + // Don't walk into other basic blocks; it's possible we haven't > + // visited them yet, so the instructions may not yet be assigned > + // virtual registers. > + if (FuncInfo.MBBMap[I->getParent()] != FuncInfo.MBB) > + return false; > + > + Opcode = I->getOpcode(); > + U = I; > + } else if (const ConstantExpr *C = dyn_cast(Op1)) { > + Opcode = C->getOpcode(); > + U = C; > + } > + > + if (const PointerType *Ty = dyn_cast(Op1->getType())) > + if (Ty->getAddressSpace() > 255) > + // Fast instruction selection doesn't support the special > + // address spaces. > + return false; > + > + switch (Opcode) { > + default: > + //errs() << "Failing Opcode is: " << *Op1 << "\n"; > + break; > + case Instruction::Alloca: { > + // Do static allocas. > + const AllocaInst *A = cast(Op1); > + DenseMap::iterator SI = > + FuncInfo.StaticAllocaMap.find(A); > + if (SI != FuncInfo.StaticAllocaMap.end()) > + Offset = > + TM.getRegisterInfo()->getFrameIndexReference(*FuncInfo.MF, > + SI->second, Reg); > + else > + return false; > + return true; > + } > + } > + return false; > +} > + > +bool ARMFastISel::ARMSelectLoad(const Instruction *I) { > + > + unsigned Reg; > + int Offset; > + > + // See if we can handle this as Reg + Offset > + if (!ARMComputeRegOffset(I, Reg, Offset)) > + return false; > + > + > + unsigned ResultReg = createResultReg(ARM::GPRRegisterClass); > + AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, > + TII.get(ARM::LDR), ResultReg) > + .addImm(0).addReg(Reg).addImm(Offset)); > + > + return true; > +} > + > bool ARMFastISel::TargetSelectInstruction(const Instruction *I) { > switch (I->getOpcode()) { > + case Instruction::Load: > + return ARMSelectLoad(I); > default: break; > } > return false; > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From clattner at apple.com Mon Aug 23 17:54:34 2010 From: clattner at apple.com (Chris Lattner) Date: Mon, 23 Aug 2010 15:54:34 -0700 Subject: [llvm-commits] [llvm] r111837 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp In-Reply-To: References: <20100823204102.710122A6C12F@llvm.org> <81751397-40B6-4056-B357-0AB7C5421105@apple.com> Message-ID: On Aug 23, 2010, at 2:40 PM, Bruno Cardoso Lopes wrote: > On Mon, Aug 23, 2010 at 2:36 PM, Chris Lattner wrote: >> On Aug 23, 2010, at 1:41 PM, Bruno Cardoso Lopes wrote: >>> URL: http://llvm.org/viewvc/llvm-project?rev=111837&view=rev >>> Log: >>> Start using target speficic nodes for shuffles: pshufhw and pshuflw >> >> Cool! >> >>> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Aug 23 15:41:02 2010 >>> @@ -2558,6 +2558,18 @@ >>> // Other Lowering Hooks >>> //===----------------------------------------------------------------------===// >>> >>> +static SDValue getTargetShuffleNode(unsigned Opc, DebugLoc dl, EVT VT, >>> + SDValue V1, SDValue V2, unsigned TargetMask, SelectionDAG &DAG) { >> >> Should this be named something like "getPSHUF" or do you plan to expand this to other shuffle nodes that take an i8 immediate? getTargetShuffleNode seems like an overly generic name. > > I'm open to better names, but the idea is to have something that would > match several types of x86 "shuffle capable" instructions: > > static SDValue getTargetShuffleNode(unsigned Opc, DebugLoc dl, EVT VT, > SDValue V1, SDValue V2, unsigned TargetMask, SelectionDAG &DAG) { I think it would make sense to have one method that handles shuffles that take an immediate, one that makes shuffles with one vector, one with shuffles that have two vectors etc. Basically, one per prototype :) -Chris > > switch(Opc) { > case X86ISD::PSHUFD: > case X86ISD::PSHUFHW: > case X86ISD::PSHUFHW_LD: > case X86ISD::PSHUFLW: > case X86ISD::PSHUFLW_LD: > return DAG.getNode(Opc, dl, VT, V1, DAG.getConstant(TargetMask, MVT::i8)); > case X86ISD::PALIGN: > case X86ISD::SHUFPD: > case X86ISD::SHUFPS: > return DAG.getNode(Opc, dl, VT, V1, V2, > DAG.getConstant(TargetMask, MVT::i8)); > case X86ISD::MOVLHPS: > case X86ISD::MOVHLPS: > case X86ISD::MOVLHPD: > case X86ISD::MOVHLPD: > case X86ISD::MOVHPS: > case X86ISD::MOVLPS: > case X86ISD::MOVHPD: > case X86ISD::MOVLPD: > case X86ISD::MOVSD: > case X86ISD::MOVSS: > case X86ISD::UNPCKLPS: > case X86ISD::UNPCKLPD: > case X86ISD::UNPCKHPS: > case X86ISD::UNPCKHPD: > case X86ISD::PUNPCKLBW: > case X86ISD::PUNPCKLWD: > case X86ISD::PUNPCKLDQ: > case X86ISD::PUNPCKLQDQ: > case X86ISD::PUNPCKHBW: > case X86ISD::PUNPCKHWD: > case X86ISD::PUNPCKHDQ: > case X86ISD::PUNPCKHQDQ: > return DAG.getNode(Opc, dl, VT, V1, V2); > case X86ISD::MOVDDUP: > case X86ISD::MOVSHDUP: > case X86ISD::MOVSLDUP: > case X86ISD::MOVSHDUP_LD: > case X86ISD::MOVSLDUP_LD: > return DAG.getNode(Opc, dl, VT, V1); > default: > assert(false && "Unknown x86 target specific shuffle node."); > } > > return SDValue(); > } > > > > -- > Bruno Cardoso Lopes > http://www.brunocardoso.cc From echristo at apple.com Mon Aug 23 17:56:43 2010 From: echristo at apple.com (Eric Christopher) Date: Mon, 23 Aug 2010 15:56:43 -0700 Subject: [llvm-commits] [llvm] r111850 - /llvm/trunk/lib/Target/ARM/ARMFastISel.cpp In-Reply-To: <2C0D1EA5-D870-496B-8FD2-88C0AE3E3832@apple.com> References: <20100823214413.127502A6C12C@llvm.org> <2C0D1EA5-D870-496B-8FD2-88C0AE3E3832@apple.com> Message-ID: > > I was going to ask, "Is there a check somewhere to make sure we don't try to get here in Thumb or Thumb2 mode?" but you've already checked in exactly that. So moving on... > :) > getFrameIndexReference() doesn't check whether the reg/offset will be in range for an instruction, but rather just returns the appropriate base register and the offset from it for a frame index reference. The LDR instruction generated here may thus have an out-of-range offset in the case of large (> 4k) stack frames. At least for now, it may be reasonable to just punt for offsets that don't fit in the immediate. > Current in development patch :) > Similarly, is there are check above this to make sure we're only dealing with GPR register class loads? Even in ARM mode, there's a number of others (see loadRegFromStackSlot() in ARMBaseInstrInfo.cpp for examples) that may need to be handled. Like the above, though, it's not unreasonable to just detect them and punt for now. Not yet. I think that's Now+1 in my plans. > > You're resolving frame index references directly. Is this happening after register allocation? I don't see how it can be, but could be wrong. If it's pre-regalloc, those offsets will be incorrect, as the code won't know how many callee-saved register slots are allocated for the function, nor how many spill slots. Perhaps you can use loadRegFromStackSlot() and storeRegToStackSlot() directly and the use the normal PEI code? I've worried about this, but it seems to work for X86 and it would have the same problems of spill code so I'm not worrying about it overly at the moment. I don't promise any of this will work at the moment past not segfaulting :) -eric From grosbach at apple.com Mon Aug 23 18:05:37 2010 From: grosbach at apple.com (Jim Grosbach) Date: Mon, 23 Aug 2010 16:05:37 -0700 Subject: [llvm-commits] [llvm] r111850 - /llvm/trunk/lib/Target/ARM/ARMFastISel.cpp In-Reply-To: References: <20100823214413.127502A6C12C@llvm.org> <2C0D1EA5-D870-496B-8FD2-88C0AE3E3832@apple.com> Message-ID: <393D531A-0D1E-420C-B736-F0B6BDC5978A@apple.com> On Aug 23, 2010, at 3:56 PM, Eric Christopher wrote: >> >> I was going to ask, "Is there a check somewhere to make sure we don't try to get here in Thumb or Thumb2 mode?" but you've already checked in exactly that. So moving on... >> > > :) > >> getFrameIndexReference() doesn't check whether the reg/offset will be in range for an instruction, but rather just returns the appropriate base register and the offset from it for a frame index reference. The LDR instruction generated here may thus have an out-of-range offset in the case of large (> 4k) stack frames. At least for now, it may be reasonable to just punt for offsets that don't fit in the immediate. >> > > Current in development patch :) > >> Similarly, is there are check above this to make sure we're only dealing with GPR register class loads? Even in ARM mode, there's a number of others (see loadRegFromStackSlot() in ARMBaseInstrInfo.cpp for examples) that may need to be handled. Like the above, though, it's not unreasonable to just detect them and punt for now. > > Not yet. I think that's Now+1 in my plans. > Coolness. Sounds good. >> >> You're resolving frame index references directly. Is this happening after register allocation? I don't see how it can be, but could be wrong. If it's pre-regalloc, those offsets will be incorrect, as the code won't know how many callee-saved register slots are allocated for the function, nor how many spill slots. Perhaps you can use loadRegFromStackSlot() and storeRegToStackSlot() directly and the use the normal PEI code? > > I've worried about this, but it seems to work for X86 and it would have the same problems of spill code so I'm not worrying about it overly at the moment. I don't promise any of this will work at the moment past not segfaulting :) I suspect x86 is doing things like "always push all callee saved regs whether we used them or not" and always referencing from the frame pointer. That way it can always have a fixed offset from EBP and not worry about how many spills there are. I.e., it's doing custom PEI that allows much stronger assumptions about frame layout much earlier in the compilation. ARM could do similar things if the full-force PEI is too much of a performance hit. In which case, you'd want to use a different "get me the reg+offset info" for frame index references, as the current one looks at the frame info populated by PEI to determine that stuff. My naive thought is to give the "real" PEI a shot to get things up and running, and then revisit that if it ends up being too much of a compile-time hit. -Jim From echristo at apple.com Mon Aug 23 18:06:27 2010 From: echristo at apple.com (Eric Christopher) Date: Mon, 23 Aug 2010 16:06:27 -0700 Subject: [llvm-commits] [llvm] r111850 - /llvm/trunk/lib/Target/ARM/ARMFastISel.cpp In-Reply-To: <393D531A-0D1E-420C-B736-F0B6BDC5978A@apple.com> References: <20100823214413.127502A6C12C@llvm.org> <2C0D1EA5-D870-496B-8FD2-88C0AE3E3832@apple.com> <393D531A-0D1E-420C-B736-F0B6BDC5978A@apple.com> Message-ID: <1AE122F9-5437-457C-A078-AFC56185C31F@apple.com> On Aug 23, 2010, at 4:05 PM, Jim Grosbach wrote: > > I suspect x86 is doing things like "always push all callee saved regs whether we used them or not" and always referencing from the frame pointer. That way it can always have a fixed offset from EBP and not worry about how many spills there are. I.e., it's doing custom PEI that allows much stronger assumptions about frame layout much earlier in the compilation. ARM could do similar things if the full-force PEI is too much of a performance hit. In which case, you'd want to use a different "get me the reg+offset info" for frame index references, as the current one looks at the frame info populated by PEI to determine that stuff. > > My naive thought is to give the "real" PEI a shot to get things up and running, and then revisit that if it ends up being too much of a compile-time hit. It's a good thought, I'll see what I can do :) -eric From echristo at apple.com Mon Aug 23 18:14:31 2010 From: echristo at apple.com (Eric Christopher) Date: Mon, 23 Aug 2010 23:14:31 -0000 Subject: [llvm-commits] [llvm] r111860 - /llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Message-ID: <20100823231431.A70C92A6C12C@llvm.org> Author: echristo Date: Mon Aug 23 18:14:31 2010 New Revision: 111860 URL: http://llvm.org/viewvc/llvm-project?rev=111860&view=rev Log: Add some more "get address into register" code and a more TODOs/FIXMEs. Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=111860&r1=111859&r2=111860&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Mon Aug 23 18:14:31 2010 @@ -361,10 +361,32 @@ unsigned Reg; int Offset; + // TODO: Think about using loadRegFromStackSlot() here when we can. + // See if we can handle this as Reg + Offset if (!ARMComputeRegOffset(I, Reg, Offset)) return false; + // Since the offset may be too large for the load instruction + // get the reg+offset into a register. + // TODO: Optimize this somewhat. + // FIXME: There is more than one register class in the world... + unsigned ScratchReg + = FuncInfo.MF->getRegInfo().createVirtualRegister(ARM::GPRRegisterClass); + ARMCC::CondCodes Pred = ARMCC::AL; + unsigned PredReg = 0; + + if (!AFI->isThumbFunction()) + emitARMRegPlusImmediate(*FuncInfo.MBB, FuncInfo.InsertPt, DL, + ScratchReg, Reg, Offset, Pred, PredReg, + static_cast(TII)); + else { + assert(AFI->isThumb2Function()); + emitT2RegPlusImmediate(*FuncInfo.MBB, FuncInfo.InsertPt, DL, + ScratchReg, Reg, Offset, Pred, PredReg, + static_cast(TII)); + } + unsigned ResultReg = createResultReg(ARM::GPRRegisterClass); AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(ARM::LDR), ResultReg) From dpatel at apple.com Mon Aug 23 18:16:25 2010 From: dpatel at apple.com (Devang Patel) Date: Mon, 23 Aug 2010 23:16:25 -0000 Subject: [llvm-commits] [llvm] r111861 - /llvm/trunk/lib/Analysis/DebugInfo.cpp Message-ID: <20100823231625.B88782A6C12C@llvm.org> Author: dpatel Date: Mon Aug 23 18:16:25 2010 New Revision: 111861 URL: http://llvm.org/viewvc/llvm-project?rev=111861&view=rev Log: Let FE use derived types for DW_TAG_friend. Patch by Alexander Herz! Modified: llvm/trunk/lib/Analysis/DebugInfo.cpp Modified: llvm/trunk/lib/Analysis/DebugInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/DebugInfo.cpp?rev=111861&r1=111860&r2=111861&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/DebugInfo.cpp (original) +++ llvm/trunk/lib/Analysis/DebugInfo.cpp Mon Aug 23 18:16:25 2010 @@ -135,6 +135,7 @@ case dwarf::DW_TAG_restrict_type: case dwarf::DW_TAG_member: case dwarf::DW_TAG_inheritance: + case dwarf::DW_TAG_friend: return true; default: // CompositeTypes are currently modelled as DerivedTypes. From foldr at codedgers.com Mon Aug 23 18:21:23 2010 From: foldr at codedgers.com (Mikhail Glushenkov) Date: Mon, 23 Aug 2010 23:21:23 -0000 Subject: [llvm-commits] [llvm] r111862 - in /llvm/trunk: include/llvm/CompilerDriver/ test/LLVMC/ tools/llvmc/examples/Simple/ tools/llvmc/examples/mcc16/ tools/llvmc/src/ utils/TableGen/ Message-ID: <20100823232123.D64692A6C12C@llvm.org> Author: foldr Date: Mon Aug 23 18:21:23 2010 New Revision: 111862 URL: http://llvm.org/viewvc/llvm-project?rev=111862&view=rev Log: llvmc: Make syntax more consistent. CompilationGraph and LanguageMap definitions do not use special syntax anymore. Added: llvm/trunk/test/LLVMC/LanguageMap.td Modified: llvm/trunk/include/llvm/CompilerDriver/Common.td llvm/trunk/test/LLVMC/Alias.td llvm/trunk/test/LLVMC/AppendCmdHook.td llvm/trunk/test/LLVMC/EnvParentheses.td llvm/trunk/test/LLVMC/ForwardAs.td llvm/trunk/test/LLVMC/ForwardTransformedValue.td llvm/trunk/test/LLVMC/ForwardValue.td llvm/trunk/test/LLVMC/HookWithArguments.td llvm/trunk/test/LLVMC/HookWithInFile.td llvm/trunk/test/LLVMC/Init.td llvm/trunk/test/LLVMC/MultiValuedOption.td llvm/trunk/test/LLVMC/NoActions.td llvm/trunk/test/LLVMC/OneOrMore.td llvm/trunk/test/LLVMC/OptionPreprocessor.td llvm/trunk/test/LLVMC/OutputSuffixHook.td llvm/trunk/tools/llvmc/examples/Simple/Simple.td llvm/trunk/tools/llvmc/examples/mcc16/PIC16.td llvm/trunk/tools/llvmc/src/Base.td.in llvm/trunk/tools/llvmc/src/Clang.td llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp Modified: llvm/trunk/include/llvm/CompilerDriver/Common.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CompilerDriver/Common.td?rev=111862&r1=111861&r2=111862&view=diff ============================================================================== --- llvm/trunk/include/llvm/CompilerDriver/Common.td (original) +++ llvm/trunk/include/llvm/CompilerDriver/Common.td Mon Aug 23 18:21:23 2010 @@ -96,9 +96,6 @@ // Increase the edge weight. def inc_weight; -// Empty DAG marker. -def empty_dag_marker; - // Option list - a single place to specify options. class OptionList l> { list options = l; @@ -111,31 +108,17 @@ // Map from suffixes to language names -class LangToSuffixes lst> { - string lang = str; - list suffixes = lst; -} +def lang_to_suffixes; -class LanguageMap lst> { - list map = lst; +class LanguageMap l> { + list map = l; } // Compilation graph -class EdgeBase { - string a = t1; - string b = t2; - dag weight = d; -} - -class Edge : EdgeBase; - -// Edge and SimpleEdge are synonyms. -class SimpleEdge : EdgeBase; - -// Optionally enabled edge. -class OptionalEdge : EdgeBase; +def edge; +def optional_edge; -class CompilationGraph lst> { - list edges = lst; +class CompilationGraph l> { + list edges = l; } Modified: llvm/trunk/test/LLVMC/Alias.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/Alias.td?rev=111862&r1=111861&r2=111862&view=diff ============================================================================== --- llvm/trunk/test/LLVMC/Alias.td (original) +++ llvm/trunk/test/LLVMC/Alias.td Mon Aug 23 18:21:23 2010 @@ -21,4 +21,4 @@ (switch_on "dummy1"), (forward "dummy1"))) ]>; -def DummyGraph : CompilationGraph<[SimpleEdge<"root", "dummy_tool">]>; +def DummyGraph : CompilationGraph<[(edge "root", "dummy_tool")]>; Modified: llvm/trunk/test/LLVMC/AppendCmdHook.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/AppendCmdHook.td?rev=111862&r1=111861&r2=111862&view=diff ============================================================================== --- llvm/trunk/test/LLVMC/AppendCmdHook.td (original) +++ llvm/trunk/test/LLVMC/AppendCmdHook.td Mon Aug 23 18:21:23 2010 @@ -26,4 +26,4 @@ (switch_on "dummy2"), (append_cmd "-arg3 $CALL(MyHook)"))) ]>; -def DummyGraph : CompilationGraph<[SimpleEdge<"root", "dummy_tool">]>; +def DummyGraph : CompilationGraph<[(edge "root", "dummy_tool")]>; Modified: llvm/trunk/test/LLVMC/EnvParentheses.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/EnvParentheses.td?rev=111862&r1=111861&r2=111862&view=diff ============================================================================== --- llvm/trunk/test/LLVMC/EnvParentheses.td (original) +++ llvm/trunk/test/LLVMC/EnvParentheses.td Mon Aug 23 18:21:23 2010 @@ -13,6 +13,6 @@ (out_language "dummy") ]>; -def DummyGraph : CompilationGraph<[SimpleEdge<"root", "dummy_tool">]>; +def DummyGraph : CompilationGraph<[(edge "root", "dummy_tool")]>; def Graph : CompilationGraph<[]>; Modified: llvm/trunk/test/LLVMC/ForwardAs.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/ForwardAs.td?rev=111862&r1=111861&r2=111862&view=diff ============================================================================== --- llvm/trunk/test/LLVMC/ForwardAs.td (original) +++ llvm/trunk/test/LLVMC/ForwardAs.td Mon Aug 23 18:21:23 2010 @@ -18,4 +18,4 @@ (not_empty "dummy"), (forward_as "dummy", "unique_name"))) ]>; -def DummyGraph : CompilationGraph<[SimpleEdge<"root", "dummy_tool">]>; +def DummyGraph : CompilationGraph<[(edge "root", "dummy_tool")]>; Modified: llvm/trunk/test/LLVMC/ForwardTransformedValue.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/ForwardTransformedValue.td?rev=111862&r1=111861&r2=111862&view=diff ============================================================================== --- llvm/trunk/test/LLVMC/ForwardTransformedValue.td (original) +++ llvm/trunk/test/LLVMC/ForwardTransformedValue.td Mon Aug 23 18:21:23 2010 @@ -24,4 +24,4 @@ (not_empty "b"), (forward_transformed_value "b", "HookB"))) ]>; -def DummyGraph : CompilationGraph<[SimpleEdge<"root", "dummy_tool">]>; +def DummyGraph : CompilationGraph<[(edge "root", "dummy_tool")]>; Modified: llvm/trunk/test/LLVMC/ForwardValue.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/ForwardValue.td?rev=111862&r1=111861&r2=111862&view=diff ============================================================================== --- llvm/trunk/test/LLVMC/ForwardValue.td (original) +++ llvm/trunk/test/LLVMC/ForwardValue.td Mon Aug 23 18:21:23 2010 @@ -21,4 +21,4 @@ (not_empty "b"), (forward_value "b"))) ]>; -def DummyGraph : CompilationGraph<[SimpleEdge<"root", "dummy_tool">]>; +def DummyGraph : CompilationGraph<[(edge "root", "dummy_tool")]>; Modified: llvm/trunk/test/LLVMC/HookWithArguments.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/HookWithArguments.td?rev=111862&r1=111861&r2=111862&view=diff ============================================================================== --- llvm/trunk/test/LLVMC/HookWithArguments.td (original) +++ llvm/trunk/test/LLVMC/HookWithArguments.td Mon Aug 23 18:21:23 2010 @@ -17,4 +17,4 @@ (out_language "dummy") ]>; -def DummyGraph : CompilationGraph<[SimpleEdge<"root", "dummy_tool">]>; +def DummyGraph : CompilationGraph<[(edge "root", "dummy_tool")]>; Modified: llvm/trunk/test/LLVMC/HookWithInFile.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/HookWithInFile.td?rev=111862&r1=111861&r2=111862&view=diff ============================================================================== --- llvm/trunk/test/LLVMC/HookWithInFile.td (original) +++ llvm/trunk/test/LLVMC/HookWithInFile.td Mon Aug 23 18:21:23 2010 @@ -13,4 +13,4 @@ (out_language "dummy") ]>; -def DummyGraph : CompilationGraph<[SimpleEdge<"root", "dummy_tool">]>; +def DummyGraph : CompilationGraph<[(edge "root", "dummy_tool")]>; Modified: llvm/trunk/test/LLVMC/Init.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/Init.td?rev=111862&r1=111861&r2=111862&view=diff ============================================================================== --- llvm/trunk/test/LLVMC/Init.td (original) +++ llvm/trunk/test/LLVMC/Init.td Mon Aug 23 18:21:23 2010 @@ -22,4 +22,4 @@ (not_empty "dummy2"), (forward "dummy2"))) ]>; -def DummyGraph : CompilationGraph<[SimpleEdge<"root", "dummy_tool">]>; +def DummyGraph : CompilationGraph<[(edge "root", "dummy_tool")]>; Added: llvm/trunk/test/LLVMC/LanguageMap.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/LanguageMap.td?rev=111862&view=auto ============================================================================== --- llvm/trunk/test/LLVMC/LanguageMap.td (added) +++ llvm/trunk/test/LLVMC/LanguageMap.td Mon Aug 23 18:21:23 2010 @@ -0,0 +1,29 @@ +// Check that LanguageMap is processed properly. +// RUN: tblgen -I %p/../../include --gen-llvmc %s -o %t +// RUN: FileCheck -input-file %t %s +// RUN: %compile_cxx -x c++ %t +// XFAIL: vg_leak + +include "llvm/CompilerDriver/Common.td" + +def OptList : OptionList<[ +(switch_option "dummy1", (help "none")) +]>; + +def dummy_tool : Tool<[ +(command "dummy_cmd"), +(in_language "dummy_lang"), +(out_language "dummy_lang"), +(actions (case + (switch_on "dummy1"), (forward "dummy1"))) +]>; + +def lang_map : LanguageMap<[ + // CHECK: langMap["dummy"] = "dummy_lang" + // CHECK: langMap["DUM"] = "dummy_lang" + (lang_to_suffixes "dummy_lang", ["dummy", "DUM"]), + // CHECK: langMap["DUM2"] = "dummy_lang_2" + (lang_to_suffixes "dummy_lang_2", "DUM2") +]>; + +def DummyGraph : CompilationGraph<[(edge "root", "dummy_tool")]>; Modified: llvm/trunk/test/LLVMC/MultiValuedOption.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/MultiValuedOption.td?rev=111862&r1=111861&r2=111862&view=diff ============================================================================== --- llvm/trunk/test/LLVMC/MultiValuedOption.td (original) +++ llvm/trunk/test/LLVMC/MultiValuedOption.td Mon Aug 23 18:21:23 2010 @@ -21,4 +21,4 @@ (not_empty "baz"), (forward "baz"))) ]>; -def DummyGraph : CompilationGraph<[SimpleEdge<"root", "dummy_tool">]>; +def DummyGraph : CompilationGraph<[(edge "root", "dummy_tool")]>; Modified: llvm/trunk/test/LLVMC/NoActions.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/NoActions.td?rev=111862&r1=111861&r2=111862&view=diff ============================================================================== --- llvm/trunk/test/LLVMC/NoActions.td (original) +++ llvm/trunk/test/LLVMC/NoActions.td Mon Aug 23 18:21:23 2010 @@ -13,4 +13,4 @@ (out_language "dummy") ]>; -def DummyGraph : CompilationGraph<[SimpleEdge<"root", "dummy_tool">]>; +def DummyGraph : CompilationGraph<[(edge "root", "dummy_tool")]>; Modified: llvm/trunk/test/LLVMC/OneOrMore.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/OneOrMore.td?rev=111862&r1=111861&r2=111862&view=diff ============================================================================== --- llvm/trunk/test/LLVMC/OneOrMore.td (original) +++ llvm/trunk/test/LLVMC/OneOrMore.td Mon Aug 23 18:21:23 2010 @@ -22,4 +22,4 @@ (not_empty "baz"), (forward "baz"))) ]>; -def DummyGraph : CompilationGraph<[SimpleEdge<"root", "dummy_tool">]>; +def DummyGraph : CompilationGraph<[(edge "root", "dummy_tool")]>; Modified: llvm/trunk/test/LLVMC/OptionPreprocessor.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/OptionPreprocessor.td?rev=111862&r1=111861&r2=111862&view=diff ============================================================================== --- llvm/trunk/test/LLVMC/OptionPreprocessor.td (original) +++ llvm/trunk/test/LLVMC/OptionPreprocessor.td Mon Aug 23 18:21:23 2010 @@ -63,5 +63,5 @@ (not_empty "foo_l"), (error))) ]>; -def Graph : CompilationGraph<[Edge<"root", "dummy">]>; +def Graph : CompilationGraph<[(edge "root", "dummy")]>; Modified: llvm/trunk/test/LLVMC/OutputSuffixHook.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/LLVMC/OutputSuffixHook.td?rev=111862&r1=111861&r2=111862&view=diff ============================================================================== --- llvm/trunk/test/LLVMC/OutputSuffixHook.td (original) +++ llvm/trunk/test/LLVMC/OutputSuffixHook.td Mon Aug 23 18:21:23 2010 @@ -21,4 +21,4 @@ (switch_on "dummy1"), (output_suffix "$CALL(MyHook)"))) ]>; -def DummyGraph : CompilationGraph<[SimpleEdge<"root", "dummy_tool">]>; +def DummyGraph : CompilationGraph<[(edge "root", "dummy_tool")]>; Modified: llvm/trunk/tools/llvmc/examples/Simple/Simple.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/examples/Simple/Simple.td?rev=111862&r1=111861&r2=111862&view=diff ============================================================================== --- llvm/trunk/tools/llvmc/examples/Simple/Simple.td (original) +++ llvm/trunk/tools/llvmc/examples/Simple/Simple.td Mon Aug 23 18:21:23 2010 @@ -36,6 +36,6 @@ (out_file_option "-o") ]>; -def LanguageMap : LanguageMap<[LangToSuffixes<"c", ["c"]>]>; +def LanguageMap : LanguageMap<[(lang_to_suffixes "c", "c")]>; -def CompilationGraph : CompilationGraph<[Edge<"root", "gcc">]>; +def CompilationGraph : CompilationGraph<[(edge "root", "gcc")]>; Modified: llvm/trunk/tools/llvmc/examples/mcc16/PIC16.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/examples/mcc16/PIC16.td?rev=111862&r1=111861&r2=111862&view=diff ============================================================================== --- llvm/trunk/tools/llvmc/examples/mcc16/PIC16.td (original) +++ llvm/trunk/tools/llvmc/examples/mcc16/PIC16.td Mon Aug 23 18:21:23 2010 @@ -202,33 +202,33 @@ // Language map def LanguageMap : LanguageMap<[ - LangToSuffixes<"c", ["c"]>, - LangToSuffixes<"c-cpp-output", ["i"]>, - LangToSuffixes<"assembler", ["s"]>, - LangToSuffixes<"assembler-with-cpp", ["S"]>, - LangToSuffixes<"llvm-assembler", ["ll"]>, - LangToSuffixes<"llvm-bitcode", ["bc"]>, - LangToSuffixes<"object-code", ["o"]>, - LangToSuffixes<"executable", ["cof"]> + (lang_to_suffixes "c", "c"), + (lang_to_suffixes "c-cpp-output", "i"), + (lang_to_suffixes "assembler", "s"), + (lang_to_suffixes "assembler-with-cpp", "S"), + (lang_to_suffixes "llvm-assembler", "ll"), + (lang_to_suffixes "llvm-bitcode", "bc"), + (lang_to_suffixes "object-code", "o"), + (lang_to_suffixes "executable", "cof") ]>; // Compilation graph def CompilationGraph : CompilationGraph<[ - Edge<"root", "clang_cc">, - Edge<"root", "llvm_ld">, - OptionalEdge<"root", "llvm_ld_optimizer", (case - (switch_on "S"), (inc_weight), - (switch_on "c"), (inc_weight))>, - Edge<"root", "gpasm">, - Edge<"root", "mplink">, - Edge<"clang_cc", "llvm_ld">, - OptionalEdge<"clang_cc", "llvm_ld_optimizer", (case - (switch_on "S"), (inc_weight), - (switch_on "c"), (inc_weight))>, - Edge<"llvm_ld", "pic16passes">, - Edge<"llvm_ld_optimizer", "pic16passes">, - Edge<"pic16passes", "llc">, - Edge<"llc", "gpasm">, - Edge<"gpasm", "mplink"> + (edge "root", "clang_cc"), + (edge "root", "llvm_ld"), + (optional_edge "root", "llvm_ld_optimizer", + (case (switch_on "S"), (inc_weight), + (switch_on "c"), (inc_weight))), + (edge "root", "gpasm"), + (edge "root", "mplink"), + (edge "clang_cc", "llvm_ld"), + (optional_edge "clang_cc", "llvm_ld_optimizer", + (case (switch_on "S"), (inc_weight), + (switch_on "c"), (inc_weight))), + (edge "llvm_ld", "pic16passes"), + (edge "llvm_ld_optimizer", "pic16passes"), + (edge "pic16passes", "llc"), + (edge "llc", "gpasm"), + (edge "gpasm", "mplink") ]>; Modified: llvm/trunk/tools/llvmc/src/Base.td.in URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/src/Base.td.in?rev=111862&r1=111861&r2=111862&view=diff ============================================================================== --- llvm/trunk/tools/llvmc/src/Base.td.in (original) +++ llvm/trunk/tools/llvmc/src/Base.td.in Mon Aug 23 18:21:23 2010 @@ -304,73 +304,78 @@ // Language map -def LanguageMap : LanguageMap< - [LangToSuffixes<"c++", ["cc", "cp", "cxx", "cpp", "CPP", "c++", "C"]>, - LangToSuffixes<"c++-header", ["hpp"]>, - LangToSuffixes<"c", ["c"]>, - LangToSuffixes<"c-header", ["h"]>, - LangToSuffixes<"c-cpp-output", ["i"]>, - LangToSuffixes<"objective-c-cpp-output", ["mi"]>, - LangToSuffixes<"objective-c++", ["mm"]>, - LangToSuffixes<"objective-c++-header", ["hmm"]>, - LangToSuffixes<"objective-c", ["m"]>, - LangToSuffixes<"objective-c-header", ["hm"]>, - LangToSuffixes<"assembler", ["s"]>, - LangToSuffixes<"assembler-with-cpp", ["S"]>, - LangToSuffixes<"llvm-assembler", ["ll"]>, - LangToSuffixes<"llvm-bitcode", ["bc"]>, - LangToSuffixes<"object-code", ["o", "*empty*"]>, - LangToSuffixes<"static-library", ["a", "lib"]>, - LangToSuffixes<"executable", ["out"]> - ]>; +def LanguageMap : LanguageMap<[ + (lang_to_suffixes "c++", ["cc", "cp", "cxx", "cpp", "CPP", "c++", "C"]), + (lang_to_suffixes "c++-header", "hpp"), + (lang_to_suffixes "c", "c"), + (lang_to_suffixes "c-header", "h"), + (lang_to_suffixes "c-cpp-output", "i"), + (lang_to_suffixes "objective-c-cpp-output", "mi"), + (lang_to_suffixes "objective-c++", "mm"), + (lang_to_suffixes "objective-c++-header", "hmm"), + (lang_to_suffixes "objective-c", "m"), + (lang_to_suffixes "objective-c-header", "hm"), + (lang_to_suffixes "assembler", "s"), + (lang_to_suffixes "assembler-with-cpp", "S"), + (lang_to_suffixes "llvm-assembler", "ll"), + (lang_to_suffixes "llvm-bitcode", "bc"), + (lang_to_suffixes "object-code", ["o", "*empty*"]), + (lang_to_suffixes "static-library", ["a", "lib"]), + (lang_to_suffixes "executable", ["out"]) +]>; // Compilation graph def CompilationGraph : CompilationGraph<[ - Edge<"root", "llvm_gcc_c">, - Edge<"root", "llvm_gcc_assembler">, - Edge<"root", "llvm_gcc_cpp">, - Edge<"root", "llvm_gcc_m">, - Edge<"root", "llvm_gcc_mxx">, - Edge<"root", "llc">, - - Edge<"root", "llvm_gcc_c_pch">, - Edge<"root", "llvm_gcc_cpp_pch">, - Edge<"root", "llvm_gcc_m_pch">, - Edge<"root", "llvm_gcc_mxx_pch">, - - Edge<"llvm_gcc_c", "llc">, - Edge<"llvm_gcc_cpp", "llc">, - Edge<"llvm_gcc_m", "llc">, - Edge<"llvm_gcc_mxx", "llc">, - Edge<"llvm_as", "llc">, - - OptionalEdge<"root", "llvm_as", - (case (switch_on "emit-llvm"), (inc_weight))>, - OptionalEdge<"llvm_gcc_c", "opt", (case (switch_on "opt"), (inc_weight))>, - OptionalEdge<"llvm_gcc_cpp", "opt", (case (switch_on "opt"), (inc_weight))>, - OptionalEdge<"llvm_gcc_m", "opt", (case (switch_on "opt"), (inc_weight))>, - OptionalEdge<"llvm_gcc_mxx", "opt", (case (switch_on "opt"), (inc_weight))>, - OptionalEdge<"llvm_as", "opt", (case (switch_on "opt"), (inc_weight))>, - Edge<"opt", "llc">, - - Edge<"llc", "llvm_gcc_assembler">, - Edge<"llvm_gcc_assembler", "llvm_gcc_linker">, - OptionalEdge<"llvm_gcc_assembler", "llvm_gcc_cpp_linker", + (edge "root", "llvm_gcc_c"), + (edge "root", "llvm_gcc_assembler"), + (edge "root", "llvm_gcc_cpp"), + (edge "root", "llvm_gcc_m"), + (edge "root", "llvm_gcc_mxx"), + (edge "root", "llc"), + + (edge "root", "llvm_gcc_c_pch"), + (edge "root", "llvm_gcc_cpp_pch"), + (edge "root", "llvm_gcc_m_pch"), + (edge "root", "llvm_gcc_mxx_pch"), + + (edge "llvm_gcc_c", "llc"), + (edge "llvm_gcc_cpp", "llc"), + (edge "llvm_gcc_m", "llc"), + (edge "llvm_gcc_mxx", "llc"), + (edge "llvm_as", "llc"), + + (optional_edge "root", "llvm_as", + (case (switch_on "emit-llvm"), (inc_weight))), + (optional_edge "llvm_gcc_c", "opt", + (case (switch_on "opt"), (inc_weight))), + (optional_edge "llvm_gcc_cpp", "opt", + (case (switch_on "opt"), (inc_weight))), + (optional_edge "llvm_gcc_m", "opt", + (case (switch_on "opt"), (inc_weight))), + (optional_edge "llvm_gcc_mxx", "opt", + (case (switch_on "opt"), (inc_weight))), + (optional_edge "llvm_as", "opt", + (case (switch_on "opt"), (inc_weight))), + (edge "opt", "llc"), + + (edge "llc", "llvm_gcc_assembler"), + (edge "llvm_gcc_assembler", "llvm_gcc_linker"), + (optional_edge "llvm_gcc_assembler", "llvm_gcc_cpp_linker", (case (or (input_languages_contain "c++"), (input_languages_contain "objective-c++")), (inc_weight), (or (parameter_equals "linker", "g++"), - (parameter_equals "linker", "c++")), (inc_weight))>, + (parameter_equals "linker", "c++")), (inc_weight))), - Edge<"root", "llvm_gcc_linker">, - OptionalEdge<"root", "llvm_gcc_cpp_linker", + (edge "root", "llvm_gcc_linker"), + (optional_edge "root", "llvm_gcc_cpp_linker", (case (or (input_languages_contain "c++"), (input_languages_contain "objective-c++")), (inc_weight), (or (parameter_equals "linker", "g++"), - (parameter_equals "linker", "c++")), (inc_weight))> - ]>; + (parameter_equals "linker", "c++")), (inc_weight))) +]>; Modified: llvm/trunk/tools/llvmc/src/Clang.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvmc/src/Clang.td?rev=111862&r1=111861&r2=111862&view=diff ============================================================================== --- llvm/trunk/tools/llvmc/src/Clang.td (original) +++ llvm/trunk/tools/llvmc/src/Clang.td Mon Aug 23 18:21:23 2010 @@ -70,18 +70,18 @@ // Compilation graph def ClangCompilationGraph : CompilationGraph<[ - OptionalEdge<"root", "clang_c", - (case (switch_on "clang"), (inc_weight))>, - OptionalEdge<"root", "clang_cpp", - (case (switch_on "clang"), (inc_weight))>, - OptionalEdge<"root", "clang_objective_c", - (case (switch_on "clang"), (inc_weight))>, - OptionalEdge<"root", "clang_objective_cpp", - (case (switch_on "clang"), (inc_weight))>, - Edge<"clang_c", "llc">, - Edge<"clang_cpp", "llc">, - Edge<"clang_objective_c", "llc">, - Edge<"clang_objective_cpp", "llc">, - OptionalEdge<"llc", "as", (case (switch_on "clang"), (inc_weight))>, - Edge<"as", "llvm_ld"> + (optional_edge "root", "clang_c", + (case (switch_on "clang"), (inc_weight))), + (optional_edge "root", "clang_cpp", + (case (switch_on "clang"), (inc_weight))), + (optional_edge "root", "clang_objective_c", + (case (switch_on "clang"), (inc_weight))), + (optional_edge "root", "clang_objective_cpp", + (case (switch_on "clang"), (inc_weight))), + (edge "clang_c", "llc"), + (edge "clang_cpp", "llc"), + (edge "clang_objective_c", "llc"), + (edge "clang_objective_cpp", "llc"), + (optional_edge "llc", "as", (case (switch_on "clang"), (inc_weight))), + (edge "as", "llvm_ld") ]>; Modified: llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp?rev=111862&r1=111861&r2=111862&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp Mon Aug 23 18:21:23 2010 @@ -33,6 +33,7 @@ /// Typedefs typedef std::vector RecordVector; +typedef std::vector DagVector; typedef std::vector StrVector; //===----------------------------------------------------------------------===// @@ -109,11 +110,6 @@ throw GetOperatorName(d) + ": too few arguments!"; } -// IsDagEmpty - is this DAG marked with an empty marker? -bool IsDagEmpty (const DagInit& d) { - return GetOperatorName(d) == "empty_dag_marker"; -} - // EscapeVariableName - Escape commas and other symbols not allowed // in the C++ variable names. Makes it possible to use options named // like "Wa," (useful for prefix options). @@ -622,7 +618,6 @@ ((Obj)->*(h))(Dag, IndentLevel, O); } - template typename HandlerTable::HandlerMap HandlerTable::Handlers_; @@ -791,7 +786,6 @@ OptionDescription OD(Type, Name); - CheckNumberOfArguments(d, 2); if (OD.isAlias()) { @@ -820,15 +814,14 @@ /// CollectOptionDescriptions - Collects option properties from all /// OptionLists. -void CollectOptionDescriptions (RecordVector::const_iterator B, - RecordVector::const_iterator E, +void CollectOptionDescriptions (const RecordVector& V, OptionDescriptions& OptDescs) { // For every OptionList: - for (; B!=E; ++B) { - RecordVector::value_type T = *B; + for (RecordVector::const_iterator B = V.begin(), + E = V.end(); B!=E; ++B) { // Throws an exception if the value does not exist. - ListInit* PropList = T->getValueAsListInit("options"); + ListInit* PropList = (*B)->getValueAsListInit("options"); // For every option description in this list: // collect the information and @@ -1005,12 +998,12 @@ /// CollectToolDescriptions - Gather information about tool properties /// from the parsed TableGen data (basically a wrapper for the /// CollectToolProperties function object). -void CollectToolDescriptions (RecordVector::const_iterator B, - RecordVector::const_iterator E, +void CollectToolDescriptions (const RecordVector& Tools, ToolDescriptions& ToolDescs) { // Iterate over a properties list of every Tool definition - for (;B!=E;++B) { + for (RecordVector::const_iterator B = Tools.begin(), + E = Tools.end(); B!=E; ++B) { const Record* T = *B; // Throws an exception if the value does not exist. ListInit* PropList = T->getValueAsListInit("properties"); @@ -1026,13 +1019,16 @@ /// FillInEdgeVector - Merge all compilation graph definitions into /// one single edge list. -void FillInEdgeVector(RecordVector::const_iterator B, - RecordVector::const_iterator E, RecordVector& Out) { - for (; B != E; ++B) { - const ListInit* edges = (*B)->getValueAsListInit("edges"); - - for (unsigned i = 0; i < edges->size(); ++i) - Out.push_back(edges->getElementAsRecord(i)); +void FillInEdgeVector(const RecordVector& CompilationGraphs, + DagVector& Out) { + for (RecordVector::const_iterator B = CompilationGraphs.begin(), + E = CompilationGraphs.end(); B != E; ++B) { + const ListInit* Edges = (*B)->getValueAsListInit("edges"); + + for (ListInit::const_iterator B = Edges->begin(), + E = Edges->end(); B != E; ++B) { + Out.push_back(&InitPtrToDag(*B)); + } } } @@ -1053,18 +1049,18 @@ /// FilterNotInGraph - Filter out from ToolDescs all Tools not /// mentioned in the compilation graph definition. -void FilterNotInGraph (const RecordVector& EdgeVector, +void FilterNotInGraph (const DagVector& EdgeVector, ToolDescriptions& ToolDescs) { // List all tools mentioned in the graph. llvm::StringSet<> ToolsInGraph; - for (RecordVector::const_iterator B = EdgeVector.begin(), + for (DagVector::const_iterator B = EdgeVector.begin(), E = EdgeVector.end(); B != E; ++B) { - const Record* Edge = *B; - const std::string& NodeA = Edge->getValueAsString("a"); - const std::string& NodeB = Edge->getValueAsString("b"); + const DagInit* Edge = *B; + const std::string& NodeA = InitPtrToString(Edge->getArg(0)); + const std::string& NodeB = InitPtrToString(Edge->getArg(1)); if (NodeA != "root") ToolsInGraph.insert(NodeA); @@ -1095,7 +1091,7 @@ /// TypecheckGraph - Check that names for output and input languages /// on all edges do match. -void TypecheckGraph (const RecordVector& EdgeVector, +void TypecheckGraph (const DagVector& EdgeVector, const ToolDescriptions& ToolDescs) { StringMap > ToolToInLang; StringMap ToolToOutLang; @@ -1104,11 +1100,11 @@ StringMap::iterator IAE = ToolToOutLang.end(); StringMap >::iterator IBE = ToolToInLang.end(); - for (RecordVector::const_iterator B = EdgeVector.begin(), + for (DagVector::const_iterator B = EdgeVector.begin(), E = EdgeVector.end(); B != E; ++B) { - const Record* Edge = *B; - const std::string& NodeA = Edge->getValueAsString("a"); - const std::string& NodeB = Edge->getValueAsString("b"); + const DagInit* Edge = *B; + const std::string& NodeA = InitPtrToString(Edge->getArg(0)); + const std::string& NodeB = InitPtrToString(Edge->getArg(1)); StringMap::iterator IA = ToolToOutLang.find(NodeA); StringMap >::iterator IB = ToolToInLang.find(NodeB); @@ -1250,7 +1246,7 @@ /// CheckForSuperfluousOptions - Check that there are no side /// effect-free options (specified only in the OptionList). Otherwise, /// output a warning. -void CheckForSuperfluousOptions (const RecordVector& Edges, +void CheckForSuperfluousOptions (const DagVector& EdgeVector, const ToolDescriptions& ToolDescs, const OptionDescriptions& OptDescs) { llvm::StringSet<> nonSuperfluousOptions; @@ -1268,13 +1264,13 @@ // Add all options mentioned in the 'case' clauses of the // OptionalEdges of the compilation graph to the set of // non-superfluous options. - for (RecordVector::const_iterator B = Edges.begin(), E = Edges.end(); - B != E; ++B) { - const Record* Edge = *B; - DagInit& Weight = *Edge->getValueAsDag("weight"); - - if (!IsDagEmpty(Weight)) + for (DagVector::const_iterator B = EdgeVector.begin(), + E = EdgeVector.end(); B != E; ++B) { + const DagInit* Edge = *B; + if (Edge->getNumArgs() > 2) { + const DagInit& Weight = InitPtrToDag(Edge->getArg(2)); WalkCase(&Weight, ExtractOptionNames(nonSuperfluousOptions), Id()); + } } // Check that all options in OptDescs belong to the set of @@ -2616,31 +2612,72 @@ O << "}\n\n"; } +class DoEmitPopulateLanguageMap; +typedef void (DoEmitPopulateLanguageMap::* DoEmitPopulateLanguageMapHandler) +(const DagInit& D); + +class DoEmitPopulateLanguageMap +: public HandlerTable +{ +private: + raw_ostream& O_; + +public: + + explicit DoEmitPopulateLanguageMap (raw_ostream& O) : O_(O) { + if (!staticMembersInitialized_) { + AddHandler("lang_to_suffixes", + &DoEmitPopulateLanguageMap::onLangToSuffixes); + + staticMembersInitialized_ = true; + } + } + + void operator() (Init* I) { + InvokeDagInitHandler(this, I); + } + +private: + + void onLangToSuffixes (const DagInit& d) { + CheckNumberOfArguments(d, 2); + + const std::string& Lang = InitPtrToString(d.getArg(0)); + Init* Suffixes = d.getArg(1); + + // Second argument to lang_to_suffixes is either a single string... + if (typeid(*Suffixes) == typeid(StringInit)) { + O_.indent(Indent1) << "langMap[\"" << InitPtrToString(Suffixes) + << "\"] = \"" << Lang << "\";\n"; + } + // ...or a list of strings. + else { + const ListInit& Lst = InitPtrToList(Suffixes); + assert(Lst.size() != 0); + for (ListInit::const_iterator B = Lst.begin(), E = Lst.end(); + B != E; ++B) { + O_.indent(Indent1) << "langMap[\"" << InitPtrToString(*B) + << "\"] = \"" << Lang << "\";\n"; + } + } + } + +}; + /// EmitPopulateLanguageMap - Emit the PopulateLanguageMap() function. void EmitPopulateLanguageMap (const RecordKeeper& Records, raw_ostream& O) { O << "int PopulateLanguageMap (LanguageMap& langMap) {\n"; - const RecordVector& LanguageMaps = + // For each LangMap: + const RecordVector& LangMaps = Records.getAllDerivedDefinitions("LanguageMap"); - for (RecordVector::const_iterator B = LanguageMaps.begin(), - E = LanguageMaps.end(); B!=E; ++B) { - ListInit* LangsToSuffixesList = (*B)->getValueAsListInit("map"); - if (!LangsToSuffixesList) - throw "Error in the language map definition!"; - - for (unsigned i = 0; i < LangsToSuffixesList->size(); ++i) { - const Record* LangToSuffixes = LangsToSuffixesList->getElementAsRecord(i); - - const std::string& Lang = LangToSuffixes->getValueAsString("lang"); - const ListInit* Suffixes = LangToSuffixes->getValueAsListInit("suffixes"); - - for (unsigned i = 0; i < Suffixes->size(); ++i) - O.indent(Indent1) << "langMap[\"" - << InitPtrToString(Suffixes->getElement(i)) - << "\"] = \"" << Lang << "\";\n"; - } + for (RecordVector::const_iterator B = LangMaps.begin(), + E = LangMaps.end(); B!=E; ++B) { + ListInit* LangMap = (*B)->getValueAsListInit("map"); + std::for_each(LangMap->begin(), LangMap->end(), + DoEmitPopulateLanguageMap(O)); } O << '\n'; @@ -2681,7 +2718,7 @@ /// EmitEdgeClass - Emit a single Edge# class. void EmitEdgeClass (unsigned N, const std::string& Target, - DagInit* Case, const OptionDescriptions& OptDescs, + const DagInit* Case, const OptionDescriptions& OptDescs, raw_ostream& O) { // Class constructor. @@ -2704,24 +2741,26 @@ } /// EmitEdgeClasses - Emit Edge* classes that represent graph edges. -void EmitEdgeClasses (const RecordVector& EdgeVector, +void EmitEdgeClasses (const DagVector& EdgeVector, const OptionDescriptions& OptDescs, raw_ostream& O) { int i = 0; - for (RecordVector::const_iterator B = EdgeVector.begin(), + for (DagVector::const_iterator B = EdgeVector.begin(), E = EdgeVector.end(); B != E; ++B) { - const Record* Edge = *B; - const std::string& NodeB = Edge->getValueAsString("b"); - DagInit& Weight = *Edge->getValueAsDag("weight"); + const DagInit* Edge = *B; + const std::string& NodeB = InitPtrToString(Edge->getArg(1)); + + if (Edge->getNumArgs() > 2) { + const DagInit* Weight = &InitPtrToDag(Edge->getArg(2)); + EmitEdgeClass(i, NodeB, Weight, OptDescs, O); + } - if (!IsDagEmpty(Weight)) - EmitEdgeClass(i, NodeB, &Weight, OptDescs, O); ++i; } } /// EmitPopulateCompilationGraph - Emit the PopulateCompilationGraph() function. -void EmitPopulateCompilationGraph (const RecordVector& EdgeVector, +void EmitPopulateCompilationGraph (const DagVector& EdgeVector, const ToolDescriptions& ToolDescs, raw_ostream& O) { @@ -2736,19 +2775,18 @@ // Insert edges. int i = 0; - for (RecordVector::const_iterator B = EdgeVector.begin(), + for (DagVector::const_iterator B = EdgeVector.begin(), E = EdgeVector.end(); B != E; ++B) { - const Record* Edge = *B; - const std::string& NodeA = Edge->getValueAsString("a"); - const std::string& NodeB = Edge->getValueAsString("b"); - DagInit& Weight = *Edge->getValueAsDag("weight"); + const DagInit* Edge = *B; + const std::string& NodeA = InitPtrToString(Edge->getArg(0)); + const std::string& NodeB = InitPtrToString(Edge->getArg(1)); O.indent(Indent1) << "if (int ret = G.insertEdge(\"" << NodeA << "\", "; - if (IsDagEmpty(Weight)) - O << "new SimpleEdge(\"" << NodeB << "\")"; - else + if (Edge->getNumArgs() > 2) O << "new Edge" << i << "()"; + else + O << "new SimpleEdge(\"" << NodeB << "\")"; O << "))\n"; O.indent(Indent2) << "return ret;\n"; @@ -2961,7 +2999,7 @@ struct DriverData { OptionDescriptions OptDescs; ToolDescriptions ToolDescs; - RecordVector Edges; + DagVector Edges; bool HasSink; }; @@ -2982,19 +3020,17 @@ // Collect option properties. const RecordVector& OptionLists = Records.getAllDerivedDefinitions("OptionList"); - CollectOptionDescriptions(OptionLists.begin(), OptionLists.end(), - Data.OptDescs); + CollectOptionDescriptions(OptionLists, Data.OptDescs); // Collect tool properties. const RecordVector& Tools = Records.getAllDerivedDefinitions("Tool"); - CollectToolDescriptions(Tools.begin(), Tools.end(), Data.ToolDescs); + CollectToolDescriptions(Tools, Data.ToolDescs); Data.HasSink = HasSink(Data.ToolDescs); // Collect compilation graph edges. const RecordVector& CompilationGraphs = Records.getAllDerivedDefinitions("CompilationGraph"); - FillInEdgeVector(CompilationGraphs.begin(), CompilationGraphs.end(), - Data.Edges); + FillInEdgeVector(CompilationGraphs, Data.Edges); } /// CheckDriverData - Perform some sanity checks on the collected data. @@ -3035,6 +3071,7 @@ EmitToolClassDefinition(*(*B), Data.OptDescs, O); // Emit Edge# classes. + // TODO: check for edge/optional_edge dag markers. EmitEdgeClasses(Data.Edges, Data.OptDescs, O); O << "} // End anonymous namespace.\n\n"; From echristo at apple.com Mon Aug 23 18:28:04 2010 From: echristo at apple.com (Eric Christopher) Date: Mon, 23 Aug 2010 23:28:04 -0000 Subject: [llvm-commits] [llvm] r111864 - /llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Message-ID: <20100823232804.BBE072A6C12C@llvm.org> Author: echristo Date: Mon Aug 23 18:28:04 2010 New Revision: 111864 URL: http://llvm.org/viewvc/llvm-project?rev=111864&view=rev Log: Don't need the extra register here. Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=111864&r1=111863&r2=111864&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Mon Aug 23 18:28:04 2010 @@ -370,23 +370,21 @@ // Since the offset may be too large for the load instruction // get the reg+offset into a register. // TODO: Optimize this somewhat. - // FIXME: There is more than one register class in the world... - unsigned ScratchReg - = FuncInfo.MF->getRegInfo().createVirtualRegister(ARM::GPRRegisterClass); ARMCC::CondCodes Pred = ARMCC::AL; unsigned PredReg = 0; if (!AFI->isThumbFunction()) emitARMRegPlusImmediate(*FuncInfo.MBB, FuncInfo.InsertPt, DL, - ScratchReg, Reg, Offset, Pred, PredReg, + Reg, Reg, Offset, Pred, PredReg, static_cast(TII)); else { assert(AFI->isThumb2Function()); emitT2RegPlusImmediate(*FuncInfo.MBB, FuncInfo.InsertPt, DL, - ScratchReg, Reg, Offset, Pred, PredReg, + Reg, Reg, Offset, Pred, PredReg, static_cast(TII)); } - + + // FIXME: There is more than one register class in the world... unsigned ResultReg = createResultReg(ARM::GPRRegisterClass); AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(ARM::LDR), ResultReg) From bruno.cardoso at gmail.com Mon Aug 23 18:38:23 2010 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Mon, 23 Aug 2010 16:38:23 -0700 Subject: [llvm-commits] [llvm] r111837 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp In-Reply-To: References: <20100823204102.710122A6C12F@llvm.org> <81751397-40B6-4056-B357-0AB7C5421105@apple.com> Message-ID: On Mon, Aug 23, 2010 at 3:54 PM, Chris Lattner wrote: > > On Aug 23, 2010, at 2:40 PM, Bruno Cardoso Lopes wrote: > >> On Mon, Aug 23, 2010 at 2:36 PM, Chris Lattner wrote: >>> On Aug 23, 2010, at 1:41 PM, Bruno Cardoso Lopes wrote: >>>> URL: http://llvm.org/viewvc/llvm-project?rev=111837&view=rev >>>> Log: >>>> Start using target speficic nodes for shuffles: pshufhw and pshuflw >>> >>> Cool! >>> >>>> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Aug 23 15:41:02 2010 >>>> @@ -2558,6 +2558,18 @@ >>>> // ? ? ? ? ? ? ? ? ? ? ? ? ? Other Lowering Hooks >>>> //===----------------------------------------------------------------------===// >>>> >>>> +static SDValue getTargetShuffleNode(unsigned Opc, DebugLoc dl, EVT VT, >>>> + ? ? ? ? ? ? ?SDValue V1, SDValue V2, unsigned TargetMask, SelectionDAG &DAG) { >>> >>> Should this be named something like "getPSHUF" or do you plan to expand this to other shuffle nodes that take an i8 immediate? ?getTargetShuffleNode seems like an overly generic name. >> >> I'm open to better names, but the idea is to have something that would >> match several types of x86 "shuffle capable" instructions: >> >> static SDValue getTargetShuffleNode(unsigned Opc, DebugLoc dl, EVT VT, >> ? ? ? ? ?SDValue V1, SDValue V2, unsigned TargetMask, SelectionDAG &DAG) { > > I think it would make sense to have one method that handles shuffles that take an immediate, one that makes shuffles with one vector, one with shuffles that have two vectors etc. ?Basically, one per prototype :) Sounds better indeed! Will follow that! :) > -Chris > >> >> ?switch(Opc) { >> ?case X86ISD::PSHUFD: >> ?case X86ISD::PSHUFHW: >> ?case X86ISD::PSHUFHW_LD: >> ?case X86ISD::PSHUFLW: >> ?case X86ISD::PSHUFLW_LD: >> ? ?return DAG.getNode(Opc, dl, VT, V1, DAG.getConstant(TargetMask, MVT::i8)); >> ?case X86ISD::PALIGN: >> ?case X86ISD::SHUFPD: >> ?case X86ISD::SHUFPS: >> ? ?return DAG.getNode(Opc, dl, VT, V1, V2, >> ? ? ? ? ? ? ? ? ? ? ? ? ? ?DAG.getConstant(TargetMask, MVT::i8)); >> ?case X86ISD::MOVLHPS: >> ?case X86ISD::MOVHLPS: >> ?case X86ISD::MOVLHPD: >> ?case X86ISD::MOVHLPD: >> ?case X86ISD::MOVHPS: >> ?case X86ISD::MOVLPS: >> ?case X86ISD::MOVHPD: >> ?case X86ISD::MOVLPD: >> ?case X86ISD::MOVSD: >> ?case X86ISD::MOVSS: >> ?case X86ISD::UNPCKLPS: >> ?case X86ISD::UNPCKLPD: >> ?case X86ISD::UNPCKHPS: >> ?case X86ISD::UNPCKHPD: >> ?case X86ISD::PUNPCKLBW: >> ?case X86ISD::PUNPCKLWD: >> ?case X86ISD::PUNPCKLDQ: >> ?case X86ISD::PUNPCKLQDQ: >> ?case X86ISD::PUNPCKHBW: >> ?case X86ISD::PUNPCKHWD: >> ?case X86ISD::PUNPCKHDQ: >> ?case X86ISD::PUNPCKHQDQ: >> ? ?return DAG.getNode(Opc, dl, VT, V1, V2); >> ?case X86ISD::MOVDDUP: >> ?case X86ISD::MOVSHDUP: >> ?case X86ISD::MOVSLDUP: >> ?case X86ISD::MOVSHDUP_LD: >> ?case X86ISD::MOVSLDUP_LD: >> ? ?return DAG.getNode(Opc, dl, VT, V1); >> ?default: >> ? ?assert(false && "Unknown x86 target specific shuffle node."); >> ?} >> >> ?return SDValue(); >> } >> >> >> >> -- >> Bruno Cardoso Lopes >> http://www.brunocardoso.cc > > -- Bruno Cardoso Lopes http://www.brunocardoso.cc From wdietz2 at illinois.edu Mon Aug 23 18:56:36 2010 From: wdietz2 at illinois.edu (Will Dietz) Date: Mon, 23 Aug 2010 23:56:36 -0000 Subject: [llvm-commits] [poolalloc] r111869 - /poolalloc/trunk/test/dsa/regression/2010-08-23-InlineCallersSegfault.ll Message-ID: <20100823235636.11BC02A6C12C@llvm.org> Author: wdietz2 Date: Mon Aug 23 18:56:35 2010 New Revision: 111869 URL: http://llvm.org/viewvc/llvm-project?rev=111869&view=rev Log: Added test that caues TD to segfault. Unsure of cause presently. Reduced from 252.eon. Added: poolalloc/trunk/test/dsa/regression/2010-08-23-InlineCallersSegfault.ll Added: poolalloc/trunk/test/dsa/regression/2010-08-23-InlineCallersSegfault.ll URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/test/dsa/regression/2010-08-23-InlineCallersSegfault.ll?rev=111869&view=auto ============================================================================== --- poolalloc/trunk/test/dsa/regression/2010-08-23-InlineCallersSegfault.ll (added) +++ poolalloc/trunk/test/dsa/regression/2010-08-23-InlineCallersSegfault.ll Mon Aug 23 18:56:35 2010 @@ -0,0 +1,228 @@ +; ModuleID = 'bugpoint-reduced-simplified.bc' +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-unknown-linux-gnu" +;This presently causes td to segfault +;RUN: dsaopt %s -dsa-bu -disable-output +;RUN: dsaopt %s -dsa-td -disable-output +;RUN: dsaopt %s -dsa-eqtd -disable-output + +%struct..0__pthread_mutex_s = type { i32, i32, i32, i32, i32, i32, %struct.__pthread_list_t } +%struct.__locale_struct = type { [13 x %struct.locale_data*], i16*, i32*, i32*, [13 x i8*] } +%struct.__pthread_list_t = type { %struct.__pthread_list_t*, %struct.__pthread_list_t* } +%struct.__si_class_type_info_pseudo = type { %struct.__type_info_pseudo, %"struct.std::type_info"* } +%struct.__type_info_pseudo = type { i8*, i8* } +%struct.ggBRDF = type { i32 (...)** } +%"struct.ggBST" = type { %"struct.ggBSTNode"*, i32 } +%"struct.ggBST" = type { %"struct.ggBSTNode"*, i32 } +%"struct.ggBST" = type { %"struct.ggBSTNode"*, i32 } +%"struct.ggBST" = type { %"struct.ggBSTNode"*, i32 } +%"struct.ggBST" = type { %"struct.ggBSTNode"*, i32 } +%"struct.ggBSTNode" = type { %"struct.ggBSTNode"*, %"struct.ggBSTNode"*, %struct.ggString, %struct.ggMaterial* } +%"struct.ggBSTNode" = type { %"struct.ggBSTNode"*, %"struct.ggBSTNode"*, %struct.ggString, %struct.ggRasterSurfaceTexture* } +%"struct.ggBSTNode" = type { %"struct.ggBSTNode"*, %"struct.ggBSTNode"*, %struct.ggString, %struct.ggBRDF* } +%"struct.ggBSTNode" = type { %"struct.ggBSTNode"*, %"struct.ggBSTNode"*, %struct.ggString, %struct.ggSpectrum* } +%"struct.ggBSTNode" = type { %"struct.ggBSTNode"*, %"struct.ggBSTNode"*, %struct.ggString, %struct.mrObjectRecord* } +%struct.ggBox3 = type { %struct.ggPoint3, %struct.ggPoint3 } +%"struct.ggDictionary" = type { %"struct.ggBST" } +%"struct.ggDictionary" = type { %"struct.ggBST" } +%"struct.ggDictionary" = type { %"struct.ggBST" } +%"struct.ggDictionary" = type { %"struct.ggBST" } +%"struct.ggDictionary" = type { %"struct.ggBST" } +%struct.ggHAffineMatrix3 = type { %struct.ggHMatrix3 } +%struct.ggHBoxMatrix3 = type { %struct.ggHAffineMatrix3 } +%struct.ggHMatrix3 = type { [4 x [4 x double]] } +%struct.ggMaterial = type { i32 (...)**, %struct.ggBRDF* } +%struct.ggMaterialRecord = type { %struct.ggPoint2, %struct.ggBox3, %struct.ggBox3, %struct.ggSpectrum, %struct.ggSpectrum, %struct.ggSpectrum, %struct.ggBRDF*, i32, i32, i32, i32 } +%struct.ggONB3 = type { %struct.ggPoint3, %struct.ggPoint3, %struct.ggPoint3 } +%struct.ggPoint2 = type { [2 x double] } +%struct.ggPoint3 = type { [3 x double] } +%"struct.ggRGBPixel" = type { [3 x i8], i8 } +%"struct.ggRaster >" = type { i32, i32, %"struct.ggRGBPixel"* } +%struct.ggRasterSurfaceTexture = type { %"struct.ggRaster >"* } +%struct.ggSpectrum = type { [8 x float] } +%struct.ggString = type { %"struct.ggString::StringRep"* } +%"struct.ggString::StringRep" = type { i32, i32, [1 x i8] } +%"struct.ggTrain" = type { %struct.ggBRDF**, i32, i32 } +%struct.locale_data = type opaque +%struct.mrObjectRecord = type { %struct.ggHBoxMatrix3, %struct.ggHBoxMatrix3, %struct.mrSurfaceList, %struct.ggMaterial*, i32, %struct.ggRasterSurfaceTexture*, %struct.ggBRDF*, i32, i32 } +%struct.mrScene = type { %struct.ggSpectrum, %struct.ggSpectrum, %struct.ggBRDF*, %struct.ggBRDF*, %struct.ggBRDF*, i32, double, %"struct.ggDictionary", %"struct.ggDictionary", %"struct.ggDictionary", %"struct.ggDictionary", %"struct.ggDictionary" } +%struct.mrSurfaceList = type { %struct.ggBRDF, %"struct.ggTrain" } +%struct.mrSurfaceTexture = type { %struct.ggBRDF, %struct.ggBRDF*, %struct.ggSpectrum, %struct.ggSpectrum, %struct.ggSpectrum, %struct.ggRasterSurfaceTexture*, double, double } +%struct.mrViewingHitRecord = type { double, %struct.ggPoint3, %struct.ggONB3, %struct.ggPoint2, double, %struct.ggSpectrum, %struct.ggSpectrum, i32, i32, i32, i32 } +%"struct.std::__codecvt_abstract_base.base.64" = type { %"struct.std::locale::facet" } +%"struct.std::basic_ios >" = type { %"struct.std::ios_base", %"struct.std::basic_ostream >"*, i8, i8, %"struct.std::basic_streambuf >"*, %"struct.std::ctype"*, %"struct.std::__codecvt_abstract_base.base.64"*, %"struct.std::__codecvt_abstract_base.base.64"* } +%"struct.std::basic_istream >" = type { i32 (...)**, i64, %"struct.std::basic_ios >" } +%"struct.std::basic_ostream >" = type { i32 (...)**, %"struct.std::basic_ios >" } +%"struct.std::basic_streambuf >" = type { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, %"struct.std::locale" } +%"struct.std::ctype" = type { %"struct.std::locale::facet", %struct.__locale_struct*, i8, i32*, i32*, i16*, i8, [256 x i8], [256 x i8], i8 } +%"struct.std::ios_base" = type { i32 (...)**, i64, i64, i32, i32, i32, %"struct.std::ios_base::_Callback_list"*, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, %"struct.std::ios_base::_Words"*, %"struct.std::locale" } +%"struct.std::ios_base::_Callback_list" = type { %"struct.std::ios_base::_Callback_list"*, void (i32, %"struct.std::ios_base"*, i32)*, i32, i32 } +%"struct.std::ios_base::_Words" = type { i8*, i64 } +%"struct.std::locale" = type { %"struct.std::locale::_Impl"* } +%"struct.std::locale::_Impl" = type { i32, %"struct.std::locale::facet"**, i64, %"struct.std::locale::facet"**, i8** } +%"struct.std::locale::facet" = type { i32 (...)**, i32 } +%"struct.std::type_info" = type { i32 (...)**, i8* } +%"union.__mbstate_t::._2" = type { i32 } +%union.pthread_attr_t = type { i64, [12 x i32] } +%union.pthread_mutex_t = type { %struct..0__pthread_mutex_s } + + at _ZTV16mrSurfaceTexture = internal constant [9 x i32 (...)*] [i32 (...)* null, i32 (...)* bitcast (%struct.__si_class_type_info_pseudo* @_ZTI16mrSurfaceTexture to i32 (...)*), i32 (...)* bitcast (i32 (%struct.mrSurfaceTexture*, %"struct.std::basic_ostream >"*)* @_ZNK16mrSurfaceTexture5printERSo to i32 (...)*), i32 (...)* bitcast (i32 (%struct.mrSurfaceTexture*, %struct.ggBox3*, double, double, double, double*, %struct.ggPoint3*, i32*, %struct.ggSpectrum*)* @_ZNK16mrSurfaceTexture9shadowHitERK6ggRay3dddRdR9ggVector3RiR10ggSpectrum to i32 (...)*), i32 (...)* bitcast (i32 (%struct.mrSurfaceTexture*, %struct.ggBox3*, double, double, double, %struct.mrViewingHitRecord*, %struct.ggMaterialRecord*)* @_ZNK16mrSurfaceTexture10viewingHitERK6ggRay3dddR18mrViewingHitRecordR16ggMaterialRecord to i32 (...)*), i32 (...)* bitcast (i32 (%struct.mrSurfaceTexture*, double, double, %struct.ggBox3*)* @_ZNK16mrSurfaceTexture11boundingBoxEddR6ggBox3 to i32 (...)*), i32 (...)* bitcast (i32 (%struct.ggBRDF*, double, double, %struct.ggBox3*)* @_ZNK9mrSurface11overlapsBoxEddRK6ggBox3 to i32 (...)*), i32 (...)* bitcast (i32 (%struct.mrSurfaceTexture*, %struct.ggPoint3*, %struct.ggPoint3*, %struct.ggPoint2*, double, %struct.ggPoint3*, double*)* @_ZNK16mrSurfaceTexture18selectVisiblePointERK8ggPoint3RK9ggVector3RK8ggPoint2dRS0_Rd to i32 (...)*), i32 (...)* bitcast (i32 (%struct.ggBRDF*, %struct.ggPoint3*, %struct.ggPoint3*, double, %struct.ggSpectrum*)* @_ZNK9mrSurface25approximateDirectRadianceERK8ggPoint3RK9ggVector3dR10ggSpectrum to i32 (...)*)], align 32 ; <[9 x i32 (...)*]*> [#uses=1] + at _ZTI16mrSurfaceTexture = external constant %struct.__si_class_type_info_pseudo, align 16 ; <%struct.__si_class_type_info_pseudo*> [#uses=1] + + at _ZL20__gthrw_pthread_oncePiPFvvE = alias weak i32 (i32*, void ()*)* @pthread_once ; [#uses=0] + at _ZL27__gthrw_pthread_getspecificj = alias weak i8* (i32)* @pthread_getspecific ; [#uses=0] + at _ZL27__gthrw_pthread_setspecificjPKv = alias weak i32 (i32, i8*)* @pthread_setspecific ; [#uses=0] + at _ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_ = alias weak i32 (i64*, %union.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; [#uses=0] + at _ZL22__gthrw_pthread_cancelm = alias weak i32 (i64)* @pthread_cancel ; [#uses=0] + at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t = alias weak i32 (%union.pthread_mutex_t*)* @pthread_mutex_lock ; [#uses=0] + at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t = alias weak i32 (%union.pthread_mutex_t*)* @pthread_mutex_trylock ; [#uses=0] + at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t = alias weak i32 (%union.pthread_mutex_t*)* @pthread_mutex_unlock ; [#uses=0] + at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t = alias weak i32 (%union.pthread_mutex_t*, %"union.__mbstate_t::._2"*)* @pthread_mutex_init ; [#uses=0] + at _ZL26__gthrw_pthread_key_createPjPFvPvE = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; [#uses=0] + at _ZL26__gthrw_pthread_key_deletej = alias weak i32 (i32)* @pthread_key_delete ; [#uses=0] + at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t = alias weak i32 (%"union.__mbstate_t::._2"*)* @pthread_mutexattr_init ; [#uses=0] + at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti = alias weak i32 (%"union.__mbstate_t::._2"*, i32)* @pthread_mutexattr_settype ; [#uses=0] + at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t = alias weak i32 (%"union.__mbstate_t::._2"*)* @pthread_mutexattr_destroy ; [#uses=0] + +declare i8* @_Znwm(i64) + +define fastcc void @_ZN7mrScene4ReadERSi(%struct.mrScene* %this, %"struct.std::basic_istream >"* %surfaces) nounwind align 2 { +entry: + br i1 undef, label %_ZrsRSiR8ggString.exit794, label %bb.i792 + +bb.i792: ; preds = %entry + br label %_ZrsRSiR8ggString.exit794 + +_ZrsRSiR8ggString.exit794: ; preds = %bb.i792, %entry + br i1 undef, label %bb445.preheader, label %bb + +bb445.preheader: ; preds = %_ZrsRSiR8ggString.exit794 + br i1 undef, label %_ZrsRSiR8ggString.exit, label %bb.i61 + +bb: ; preds = %_ZrsRSiR8ggString.exit794 + unreachable + +bb1: ; preds = %_ZrsRSiR8ggString.exit + unreachable + +bb.i61: ; preds = %bb445.preheader + unreachable + +_ZrsRSiR8ggString.exit: ; preds = %bb445.preheader + br i1 undef, label %bb447, label %bb1 + +bb447: ; preds = %_ZrsRSiR8ggString.exit + br i1 undef, label %_ZNK12ggDictionaryI14mrObjectRecordE9fillTrainER7ggTrainIPS0_E.exit.i, label %bb.i.i.i + +bb.i.i.i: ; preds = %bb447 + unreachable + +_ZNK12ggDictionaryI14mrObjectRecordE9fillTrainER7ggTrainIPS0_E.exit.i: ; preds = %bb447 + br i1 undef, label %_ZN8ggStringD1Ev.exit50.i, label %_ZN8ggString9StringRepD1Ev.exit.i48.i + +_ZN8ggString9StringRepD1Ev.exit.i48.i: ; preds = %_ZNK12ggDictionaryI14mrObjectRecordE9fillTrainER7ggTrainIPS0_E.exit.i + unreachable + +_ZN8ggStringD1Ev.exit50.i: ; preds = %_ZNK12ggDictionaryI14mrObjectRecordE9fillTrainER7ggTrainIPS0_E.exit.i + br i1 undef, label %_ZN8ggStringD1Ev.exit44.i, label %_ZN8ggString9StringRepD1Ev.exit.i42.i + +_ZN8ggString9StringRepD1Ev.exit.i42.i: ; preds = %_ZN8ggStringD1Ev.exit50.i + unreachable + +_ZN8ggStringD1Ev.exit44.i: ; preds = %_ZN8ggStringD1Ev.exit50.i + br i1 undef, label %_ZN8ggStringD1Ev.exit.i, label %_ZN8ggString9StringRepD1Ev.exit.i.i + +_ZN8ggString9StringRepD1Ev.exit.i.i: ; preds = %_ZN8ggStringD1Ev.exit44.i + br label %_ZN8ggStringD1Ev.exit.i + +_ZN8ggStringD1Ev.exit.i: ; preds = %_ZN8ggString9StringRepD1Ev.exit.i.i, %_ZN8ggStringD1Ev.exit44.i + br i1 undef, label %bb.nph65.i, label %bb30.i + +bb.nph65.i: ; preds = %_ZN8ggStringD1Ev.exit.i + br i1 undef, label %bb12.i, label %bb10.loopexit.i + +bb10.loopexit.i: ; preds = %bb.nph65.i + unreachable + +bb12.i: ; preds = %bb.nph65.i + %0 = call i8* @_Znwm(i64 320) nounwind ; [#uses=2] + %1 = getelementptr inbounds i8* %0, i64 264 ; [#uses=1] + %2 = bitcast i8* %1 to %struct.ggBRDF** ; <%struct.ggBRDF**> [#uses=1] + %3 = load %struct.ggBRDF** %2, align 8 ; <%struct.ggBRDF*> [#uses=2] + %4 = getelementptr inbounds %struct.ggBRDF* %3, i64 0, i32 0 ; [#uses=1] + %5 = load i32 (...)*** %4, align 8 ; [#uses=1] + %6 = getelementptr inbounds i32 (...)** %5, i64 3 ; [#uses=1] + %7 = load i32 (...)** %6, align 8 ; [#uses=1] + %8 = bitcast i32 (...)* %7 to i32 (%struct.ggBRDF*, double, double, %struct.ggBox3*)* ; [#uses=1] + %9 = call i32 %8(%struct.ggBRDF* %3, double 0.000000e+00, double 0.000000e+00, %struct.ggBox3* undef) nounwind ; [#uses=0] + br i1 undef, label %_ZN10mrInstance9SetMatrixERK19ggHRigidBodyMatrix3S2_.exit.i, label %bb.nph89.bb.nph89.split_crit_edge.i.i + +bb.nph89.bb.nph89.split_crit_edge.i.i: ; preds = %bb12.i + unreachable + +_ZN10mrInstance9SetMatrixERK19ggHRigidBodyMatrix3S2_.exit.i: ; preds = %bb12.i + %10 = bitcast i8* %0 to %struct.ggBRDF* ; <%struct.ggBRDF*> [#uses=2] + br i1 undef, label %bb19.i, label %bb16.i + +bb16.i: ; preds = %_ZN10mrInstance9SetMatrixERK19ggHRigidBodyMatrix3S2_.exit.i + %11 = call i8* @_Znwm(i64 136) nounwind ; [#uses=3] + %12 = bitcast i8* %11 to i32 (...)*** ; [#uses=1] + store i32 (...)** getelementptr inbounds ([9 x i32 (...)*]* @_ZTV16mrSurfaceTexture, i64 0, i64 2), i32 (...)*** %12, align 8 + %13 = getelementptr inbounds i8* %11, i64 8 ; [#uses=1] + %14 = bitcast i8* %13 to %struct.ggBRDF** ; <%struct.ggBRDF**> [#uses=1] + store %struct.ggBRDF* %10, %struct.ggBRDF** %14, align 8 + %15 = bitcast i8* %11 to %struct.ggBRDF* ; <%struct.ggBRDF*> [#uses=1] + br label %bb19.i + +bb19.i: ; preds = %bb16.i, %_ZN10mrInstance9SetMatrixERK19ggHRigidBodyMatrix3S2_.exit.i + %surfPtr15.0.i = phi %struct.ggBRDF* [ %10, %_ZN10mrInstance9SetMatrixERK19ggHRigidBodyMatrix3S2_.exit.i ], [ %15, %bb16.i ] ; <%struct.ggBRDF*> [#uses=0] + unreachable + +bb30.i: ; preds = %_ZN8ggStringD1Ev.exit.i + br label %bb2.i2.i.i.i.i + +bb2.i2.i.i.i.i: ; preds = %bb2.i2.i.i.i.i, %bb30.i + br label %bb2.i2.i.i.i.i +} + +declare i32 @_ZNK9mrSurface11overlapsBoxEddRK6ggBox3(%struct.ggBRDF*, double, double, %struct.ggBox3* nocapture) nounwind align 2 + +declare i32 @_ZNK9mrSurface25approximateDirectRadianceERK8ggPoint3RK9ggVector3dR10ggSpectrum(%struct.ggBRDF* nocapture, %struct.ggPoint3* nocapture, %struct.ggPoint3* nocapture, double, %struct.ggSpectrum* nocapture) nounwind align 2 + +declare i32 @_ZNK16mrSurfaceTexture5printERSo(%struct.mrSurfaceTexture*, %"struct.std::basic_ostream >"*) nounwind align 2 + +declare i32 @_ZNK16mrSurfaceTexture9shadowHitERK6ggRay3dddRdR9ggVector3RiR10ggSpectrum(%struct.mrSurfaceTexture* nocapture, %struct.ggBox3*, double, double, double, double*, %struct.ggPoint3*, i32*, %struct.ggSpectrum*) nounwind align 2 + +declare i32 @_ZNK16mrSurfaceTexture11boundingBoxEddR6ggBox3(%struct.mrSurfaceTexture* nocapture, double, double, %struct.ggBox3*) nounwind align 2 + +declare i32 @_ZNK16mrSurfaceTexture18selectVisiblePointERK8ggPoint3RK9ggVector3RK8ggPoint2dRS0_Rd(%struct.mrSurfaceTexture* nocapture, %struct.ggPoint3*, %struct.ggPoint3*, %struct.ggPoint2*, double, %struct.ggPoint3*, double*) nounwind align 2 + +declare i32 @_ZNK16mrSurfaceTexture10viewingHitERK6ggRay3dddR18mrViewingHitRecordR16ggMaterialRecord(%struct.mrSurfaceTexture*, %struct.ggBox3*, double, double, double, %struct.mrViewingHitRecord*, %struct.ggMaterialRecord*) nounwind align 2 + +declare i32 @pthread_once(i32*, void ()*) + +declare i8* @pthread_getspecific(i32) + +declare i32 @pthread_setspecific(i32, i8*) + +declare i32 @pthread_create(i64*, %union.pthread_attr_t*, i8* (i8*)*, i8*) + +declare i32 @pthread_cancel(i64) + +declare i32 @pthread_mutex_lock(%union.pthread_mutex_t*) + +declare i32 @pthread_mutex_trylock(%union.pthread_mutex_t*) + +declare i32 @pthread_mutex_unlock(%union.pthread_mutex_t*) + +declare i32 @pthread_mutex_init(%union.pthread_mutex_t*, %"union.__mbstate_t::._2"*) + +declare i32 @pthread_key_create(i32*, void (i8*)*) + +declare i32 @pthread_key_delete(i32) + +declare i32 @pthread_mutexattr_init(%"union.__mbstate_t::._2"*) + +declare i32 @pthread_mutexattr_settype(%"union.__mbstate_t::._2"*, i32) + +declare i32 @pthread_mutexattr_destroy(%"union.__mbstate_t::._2"*) From dpatel at apple.com Mon Aug 23 19:06:13 2010 From: dpatel at apple.com (Devang Patel) Date: Tue, 24 Aug 2010 00:06:13 -0000 Subject: [llvm-commits] [llvm] r111870 - in /llvm/trunk/lib/CodeGen/AsmPrinter: DwarfDebug.cpp DwarfDebug.h Message-ID: <20100824000613.1EC722A6C12C@llvm.org> Author: dpatel Date: Mon Aug 23 19:06:12 2010 New Revision: 111870 URL: http://llvm.org/viewvc/llvm-project?rev=111870&view=rev Log: Revert r107202. It is not adding any value. Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp?rev=111870&r1=111869&r2=111870&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp (original) +++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp Mon Aug 23 19:06:12 2010 @@ -388,7 +388,6 @@ DwarfFrameSectionSym = DwarfInfoSectionSym = DwarfAbbrevSectionSym = 0; DwarfStrSectionSym = TextSectionSym = 0; DwarfDebugRangeSectionSym = DwarfDebugLocSectionSym = 0; - DwarfDebugLineSectionSym = CurrentLineSectionSym = 0; FunctionBeginSym = FunctionEndSym = 0; DIEIntegerOne = new (DIEValueAllocator) DIEInteger(1); { @@ -1808,9 +1807,8 @@ // simplifies debug range entries. addUInt(Die, dwarf::DW_AT_entry_pc, dwarf::DW_FORM_addr, 0); // DW_AT_stmt_list is a offset of line number information for this - // compile unit in debug_line section. This offset is calculated - // during endMoudle(). - addLabel(Die, dwarf::DW_AT_stmt_list, dwarf::DW_FORM_data4, 0); + // compile unit in debug_line section. + addUInt(Die, dwarf::DW_AT_stmt_list, dwarf::DW_FORM_data4, 0); if (!Dir.empty()) addString(Die, dwarf::DW_AT_comp_dir, dwarf::DW_FORM_string, Dir); @@ -2137,15 +2135,15 @@ // Compute DIE offsets and sizes. computeSizeAndOffsets(); - // Emit source line correspondence into a debug line section. - emitDebugLines(); - // Emit all the DIEs into a debug info section emitDebugInfo(); // Corresponding abbreviations into a abbrev section. emitAbbreviations(); + // Emit source line correspondence into a debug line section. + emitDebugLines(); + // Emit info into a debug pubnames section. emitDebugPubNames(); @@ -3064,8 +3062,7 @@ if (const MCSection *MacroInfo = TLOF.getDwarfMacroInfoSection()) EmitSectionSym(Asm, MacroInfo); - DwarfDebugLineSectionSym = - EmitSectionSym(Asm, TLOF.getDwarfLineSection(), "section_line"); + EmitSectionSym(Asm, TLOF.getDwarfLineSection(), "section_line"); EmitSectionSym(Asm, TLOF.getDwarfLocSection()); EmitSectionSym(Asm, TLOF.getDwarfPubNamesSection()); EmitSectionSym(Asm, TLOF.getDwarfPubTypesSection()); @@ -3128,11 +3125,6 @@ 4); break; } - case dwarf::DW_AT_stmt_list: { - Asm->EmitLabelDifference(CurrentLineSectionSym, - DwarfDebugLineSectionSym, 4); - break; - } case dwarf::DW_AT_location: { if (UseDotDebugLocEntry.count(Die) != 0) { DIELabel *L = cast(Values[i]); @@ -3278,8 +3270,6 @@ Asm->getObjFileLowering().getDwarfLineSection()); // Construct the section header. - CurrentLineSectionSym = Asm->GetTempSymbol("section_line_begin"); - Asm->OutStreamer.EmitLabel(CurrentLineSectionSym); Asm->OutStreamer.AddComment("Length of Source Line Info"); Asm->EmitLabelDifference(Asm->GetTempSymbol("line_end"), Asm->GetTempSymbol("line_begin"), 4); Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h?rev=111870&r1=111869&r2=111870&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h (original) +++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.h Mon Aug 23 19:06:12 2010 @@ -261,7 +261,6 @@ MCSymbol *DwarfFrameSectionSym, *DwarfInfoSectionSym, *DwarfAbbrevSectionSym; MCSymbol *DwarfStrSectionSym, *TextSectionSym, *DwarfDebugRangeSectionSym; MCSymbol *DwarfDebugLocSectionSym; - MCSymbol *DwarfDebugLineSectionSym, *CurrentLineSectionSym; MCSymbol *FunctionBeginSym, *FunctionEndSym; DIEInteger *DIEIntegerOne; From echristo at apple.com Mon Aug 23 19:07:24 2010 From: echristo at apple.com (Eric Christopher) Date: Tue, 24 Aug 2010 00:07:24 -0000 Subject: [llvm-commits] [llvm] r111871 - /llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Message-ID: <20100824000724.C6FFF2A6C12C@llvm.org> Author: echristo Date: Mon Aug 23 19:07:24 2010 New Revision: 111871 URL: http://llvm.org/viewvc/llvm-project?rev=111871&view=rev Log: Add some more debugging code, make it more obvious that RegOffset is getting an address for an object and select some default values. Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=111871&r1=111870&r2=111871&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Mon Aug 23 19:07:24 2010 @@ -109,7 +109,7 @@ // Utility routines. private: - bool ARMComputeRegOffset(const Instruction *I, unsigned &Reg, int &Offset); + bool ARMComputeRegOffset(const Value *Obj, unsigned &Reg, int &Offset); bool DefinesOptionalPredicate(MachineInstr *MI, bool *CPSR); const MachineInstrBuilder &AddOptionalDefs(const MachineInstrBuilder &MIB); @@ -309,13 +309,13 @@ return ResultReg; } -bool ARMFastISel::ARMComputeRegOffset(const Instruction *I, unsigned &Reg, +// Computes the Reg+Offset to get to an object. +bool ARMFastISel::ARMComputeRegOffset(const Value *Obj, unsigned &Reg, int &Offset) { // Some boilerplate from the X86 FastISel. const User *U = NULL; - Value *Op1 = I->getOperand(0); unsigned Opcode = Instruction::UserOp1; - if (const Instruction *I = dyn_cast(Op1)) { + if (const Instruction *I = dyn_cast(Obj)) { // Don't walk into other basic blocks; it's possible we haven't // visited them yet, so the instructions may not yet be assigned // virtual registers. @@ -324,12 +324,12 @@ Opcode = I->getOpcode(); U = I; - } else if (const ConstantExpr *C = dyn_cast(Op1)) { + } else if (const ConstantExpr *C = dyn_cast(Obj)) { Opcode = C->getOpcode(); U = C; } - if (const PointerType *Ty = dyn_cast(Op1->getType())) + if (const PointerType *Ty = dyn_cast(Obj->getType())) if (Ty->getAddressSpace() > 255) // Fast instruction selection doesn't support the special // address spaces. @@ -341,7 +341,7 @@ break; case Instruction::Alloca: { // Do static allocas. - const AllocaInst *A = cast(Op1); + const AllocaInst *A = cast(Obj); DenseMap::iterator SI = FuncInfo.StaticAllocaMap.find(A); if (SI != FuncInfo.StaticAllocaMap.end()) @@ -353,18 +353,26 @@ return true; } } - return false; + + if (const GlobalValue *GV = dyn_cast(Obj)) { + //errs() << "Failing GV is: " << GV << "\n"; + return false; + } + + // Try to get this in a register if nothing else has worked. + Reg = getRegForValue(Obj); + return Reg != 0; } bool ARMFastISel::ARMSelectLoad(const Instruction *I) { - - unsigned Reg; - int Offset; + // Our register and offset with innocuous defaults. + unsigned Reg = 0; + int Offset = 0; // TODO: Think about using loadRegFromStackSlot() here when we can. // See if we can handle this as Reg + Offset - if (!ARMComputeRegOffset(I, Reg, Offset)) + if (!ARMComputeRegOffset(I->getOperand(0), Reg, Offset)) return false; // Since the offset may be too large for the load instruction From wdietz2 at illinois.edu Mon Aug 23 19:23:58 2010 From: wdietz2 at illinois.edu (Will Dietz) Date: Tue, 24 Aug 2010 00:23:58 -0000 Subject: [llvm-commits] [poolalloc] r111872 - in /poolalloc/trunk: include/dsa/DSGraph.h include/dsa/DataStructure.h lib/DSA/BottomUpClosure.cpp lib/DSA/DSGraph.cpp lib/DSA/Local.cpp Message-ID: <20100824002358.C72122A6C12C@llvm.org> Author: wdietz2 Date: Mon Aug 23 19:23:58 2010 New Revision: 111872 URL: http://llvm.org/viewvc/llvm-project?rev=111872&view=rev Log: Filter callsites when evaluting termination condition of BU. Filter callsites in the same manner across BU. Filter callsites when building callgraph in local. /Don't/ filter callsites in runOnModuleInternal or when building callgraphs while running CBU or EQBU/EQTD. This fixes PR7929, and test case 2010-08-19-SimpleCallGraph.ll. Modified: poolalloc/trunk/include/dsa/DSGraph.h poolalloc/trunk/include/dsa/DataStructure.h poolalloc/trunk/lib/DSA/BottomUpClosure.cpp poolalloc/trunk/lib/DSA/DSGraph.cpp poolalloc/trunk/lib/DSA/Local.cpp Modified: poolalloc/trunk/include/dsa/DSGraph.h URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/dsa/DSGraph.h?rev=111872&r1=111871&r2=111872&view=diff ============================================================================== --- poolalloc/trunk/include/dsa/DSGraph.h (original) +++ poolalloc/trunk/include/dsa/DSGraph.h Mon Aug 23 19:23:58 2010 @@ -337,7 +337,7 @@ // addAuxFunctionCall - Add a call site to the AuxFunctionCallList void addAuxFunctionCall(DSCallSite D) { AuxFunctionCalls.push_front(D); } - void buildCallGraph(DSCallGraph& DCG) const; + void buildCallGraph(DSCallGraph& DCG, bool filter) const; /// removeFunction - Specify that all call sites to the function have been /// fully specified by a pass such as StdLibPass. Modified: poolalloc/trunk/include/dsa/DataStructure.h URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/dsa/DataStructure.h?rev=111872&r1=111871&r2=111872&view=diff ============================================================================== --- poolalloc/trunk/include/dsa/DataStructure.h (original) +++ poolalloc/trunk/include/dsa/DataStructure.h Mon Aug 23 19:23:58 2010 @@ -212,14 +212,21 @@ EntryPointAnalysis* EP; void cloneIntoGlobals(DSGraph* G); + + // filterCallees -- Whether or not we filter out illegal callees + // from the CallGraph. This is useful while doing original BU, + // but might be undesirable in other passes such as CBU/EQBU. + bool filterCallees; public: static char ID; //Child constructor (CBU) - BUDataStructures(intptr_t CID, const char* name, const char* printname) - : DataStructures(CID, printname), debugname(name) {} + BUDataStructures(intptr_t CID, const char* name, const char* printname, + bool filter) + : DataStructures(CID, printname), debugname(name), filterCallees(filter) {} //main constructor - BUDataStructures() - : DataStructures((intptr_t)&ID, "bu."), debugname("dsa-bu") {} + BUDataStructures() + : DataStructures((intptr_t)&ID, "bu."), debugname("dsa-bu"), + filterCallees(true) {} ~BUDataStructures() { releaseMemory(); } virtual bool runOnModule(Module &M); @@ -253,6 +260,12 @@ void CloneAuxIntoGlobal(DSGraph* G); void cloneGlobalsInto(DSGraph* G); void finalizeGlobals(void); + + void getAllCallees(const DSCallSite &CS, + std::vector &Callees); + void getAllAuxCallees (DSGraph* G, std::vector & Callees); + void applyCallsiteFilter(const DSCallSite &DCS, + std::vector &Callees); }; /// CompleteBUDataStructures - This is the exact same as the bottom-up graphs, @@ -268,7 +281,7 @@ CompleteBUDataStructures(intptr_t CID = (intptr_t)&ID, const char* name = "dsa-cbu", const char* printname = "cbu.") - : BUDataStructures(CID, name, printname) {} + : BUDataStructures(CID, name, printname, false) {} ~CompleteBUDataStructures() { releaseMemory(); } virtual bool runOnModule(Module &M); Modified: poolalloc/trunk/lib/DSA/BottomUpClosure.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/BottomUpClosure.cpp?rev=111872&r1=111871&r2=111872&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/BottomUpClosure.cpp (original) +++ poolalloc/trunk/lib/DSA/BottomUpClosure.cpp Mon Aug 23 19:23:58 2010 @@ -209,14 +209,41 @@ } // -// Function: GetAllCallees() +// Function: applyCallsiteFilter +// +// Description: +// Given a DSCallSite, and a list of functions, filter out the ones +// that aren't callable from the given Callsite. +// +// Does no filtering if 'filterCallees' is set to false. +// +void BUDataStructures:: +applyCallsiteFilter(const DSCallSite &DCS, std::vector &Callees) { + + if (!filterCallees) return; + + std::vector::iterator I = Callees.begin(); + CallSite CS = DCS.getCallSite(); + while(I != Callees.end()) { + if (functionIsCallable(CS, *I)) { + ++I; + } + else { + I = Callees.erase(I); + } + } +} + +// +// Function: getAllCallees() // // Description: // Given a DSCallSite, add to the list the functions that can be called by -// the call site *if* it is resolvable. +// the call site *if* it is resolvable. Uses 'applyCallsiteFilter' to +// only add the functions that are valid targets of this callsite. // -static void -GetAllCallees(const DSCallSite &CS, std::vector &Callees) { +void BUDataStructures:: +getAllCallees(const DSCallSite &CS, std::vector &Callees) { // // FIXME: Should we check for the Unknown flag on indirect call sites? // @@ -230,13 +257,22 @@ Callees.push_back(CS.getCalleeFunc()); } else if (!CS.getCalleeNode()->isIncompleteNode()) { // Get all callees. - if (!CS.getCalleeNode()->isExternFuncNode()) - CS.getCalleeNode()->addFullFunctionList(Callees); + if (!CS.getCalleeNode()->isExternFuncNode()) { + // Get all the callees for this callsite + std::vector tempCallees; + CS.getCalleeNode()->addFullFunctionList(tempCallees); + // Filter out the ones that are invalid targets with respect + // to this particular callsite. + applyCallsiteFilter(CS, tempCallees); + // Insert the remaining callees (legal ones, if we're filtering) + // into the master 'Callees' list + Callees.insert(Callees.end(),tempCallees.begin(),tempCallees.end()); + } } } // -// Function: GetAllAuxCallees() +// Function: getAllAuxCallees() // // Description: // Return a list containing all of the resolvable callees in the auxiliary @@ -251,14 +287,14 @@ // sites. This list is always cleared by this function before any // functions are added to it. // -static void -GetAllAuxCallees (DSGraph* G, std::vector & Callees) { +void BUDataStructures:: +getAllAuxCallees (DSGraph* G, std::vector & Callees) { // // Clear out the list of callees. // Callees.clear(); for (DSGraph::afc_iterator I = G->afc_begin(), E = G->afc_end(); I != E; ++I) - GetAllCallees(*I, Callees); + getAllCallees(*I, Callees); } // @@ -349,7 +385,7 @@ // graph (DSCallgraph) as we're still in the process of constructing it). // std::vector CalleeFunctions; - GetAllAuxCallees(Graph, CalleeFunctions); + getAllAuxCallees(Graph, CalleeFunctions); // // Iterate through each call target (these are the edges out of the current @@ -404,7 +440,7 @@ // // Should we revisit the graph? Only do it if there are now new resolvable // callees. - GetAllAuxCallees (Graph, CalleeFunctions); + getAllAuxCallees (Graph, CalleeFunctions); if (!CalleeFunctions.empty()) { DEBUG(errs() << "Recalculating " << F->getName() << " due to new knowledge\n"); ValMap.erase(F); @@ -535,7 +571,7 @@ // Now that we have new information merged into the function's DSGraph, // update the call graph using this new information. // - G->buildCallGraph(callgraph); + G->buildCallGraph(callgraph,filterCallees); // // Return the DSGraph associated with this function. @@ -770,7 +806,7 @@ // // Update the callgraph with the new information that we have gleaned. // - Graph->buildCallGraph(callgraph); + Graph->buildCallGraph(callgraph,filterCallees); } //For Entry Points Modified: poolalloc/trunk/lib/DSA/DSGraph.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/DSGraph.cpp?rev=111872&r1=111871&r2=111872&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/DSGraph.cpp (original) +++ poolalloc/trunk/lib/DSA/DSGraph.cpp Mon Aug 23 19:23:58 2010 @@ -1463,7 +1463,10 @@ // of function calls that can be inferred from the unresolved call sites // within the DSGraph. // -void DSGraph::buildCallGraph(DSCallGraph& DCG) const { +// The parameter 'filter' determines if we should attempt to prune callees +// that are illegal to be called from the callsite. +// +void DSGraph::buildCallGraph(DSCallGraph& DCG, bool filter) const { // // Get the list of unresolved call sites. // @@ -1497,7 +1500,7 @@ // for (std::vector::iterator Fi = MaybeTargets.begin(), Fe = MaybeTargets.end(); Fi != Fe; ++Fi) - if (functionIsCallable(CS, *Fi)) + if (!filter || functionIsCallable(CS, *Fi)) DCG.insert(CS, *Fi); else ++NumFiltered; Modified: poolalloc/trunk/lib/DSA/Local.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/Local.cpp?rev=111872&r1=111871&r2=111872&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/Local.cpp (original) +++ poolalloc/trunk/lib/DSA/Local.cpp Mon Aug 23 19:23:58 2010 @@ -1203,7 +1203,7 @@ setDSGraph(*I, G); propagateUnknownFlag(G); callgraph.insureEntry(I); - G->buildCallGraph(callgraph); + G->buildCallGraph(callgraph, true); } GlobalsGraph->removeTriviallyDeadNodes(); From sabre at nondot.org Mon Aug 23 19:43:25 2010 From: sabre at nondot.org (Chris Lattner) Date: Tue, 24 Aug 2010 00:43:25 -0000 Subject: [llvm-commits] [llvm] r111876 - in /llvm/trunk: lib/MC/MCParser/AsmLexer.cpp test/MC/AsmParser/directive_values.s Message-ID: <20100824004325.B3EB42A6C12C@llvm.org> Author: lattner Date: Mon Aug 23 19:43:25 2010 New Revision: 111876 URL: http://llvm.org/viewvc/llvm-project?rev=111876&view=rev Log: fix rdar://7997827 - Accept and ignore LL and ULL suffixes on integer literals. Also fix 0b010 syntax to actually work while we're at it :-) Modified: llvm/trunk/lib/MC/MCParser/AsmLexer.cpp llvm/trunk/test/MC/AsmParser/directive_values.s Modified: llvm/trunk/lib/MC/MCParser/AsmLexer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCParser/AsmLexer.cpp?rev=111876&r1=111875&r2=111876&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCParser/AsmLexer.cpp (original) +++ llvm/trunk/lib/MC/MCParser/AsmLexer.cpp Mon Aug 23 19:43:25 2010 @@ -117,6 +117,13 @@ return AsmToken(AsmToken::EndOfStatement, StringRef(CurPtr, 0)); } +static void SkipIgnoredIntegerSuffix(const char *&CurPtr) { + if (CurPtr[0] == 'L' && CurPtr[1] == 'L') + CurPtr += 2; + if (CurPtr[0] == 'U' && CurPtr[1] == 'L' && CurPtr[2] == 'L') + CurPtr += 3; +} + /// LexDigit: First character is [0-9]. /// Local Label: [0-9][:] @@ -133,7 +140,7 @@ ++CurPtr; StringRef Result(TokStart, CurPtr - TokStart); - + long long Value; if (Result.getAsInteger(10, Value)) { // We have to handle minint_as_a_positive_value specially, because @@ -143,6 +150,11 @@ else return ReturnError(TokStart, "Invalid decimal number"); } + + // The darwin/x86 (and x86-64) assembler accepts and ignores ULL and LL + // suffixes on integer literals. + SkipIgnoredIntegerSuffix(CurPtr); + return AsmToken(AsmToken::Integer, Result, Value); } @@ -165,9 +177,13 @@ StringRef Result(TokStart, CurPtr - TokStart); long long Value; - if (Result.getAsInteger(2, Value)) + if (Result.substr(2).getAsInteger(2, Value)) return ReturnError(TokStart, "Invalid binary number"); + // The darwin/x86 (and x86-64) assembler accepts and ignores ULL and LL + // suffixes on integer literals. + SkipIgnoredIntegerSuffix(CurPtr); + return AsmToken(AsmToken::Integer, Result, Value); } @@ -185,6 +201,10 @@ if (StringRef(TokStart, CurPtr - TokStart).getAsInteger(0, Result)) return ReturnError(TokStart, "Invalid hexadecimal number"); + // The darwin/x86 (and x86-64) assembler accepts and ignores ULL and LL + // suffixes on integer literals. + SkipIgnoredIntegerSuffix(CurPtr); + return AsmToken(AsmToken::Integer, StringRef(TokStart, CurPtr - TokStart), (int64_t)Result); } @@ -198,6 +218,10 @@ if (Result.getAsInteger(8, Value)) return ReturnError(TokStart, "Invalid octal number"); + // The darwin/x86 (and x86-64) assembler accepts and ignores ULL and LL + // suffixes on integer literals. + SkipIgnoredIntegerSuffix(CurPtr); + return AsmToken(AsmToken::Integer, Result, Value); } Modified: llvm/trunk/test/MC/AsmParser/directive_values.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AsmParser/directive_values.s?rev=111876&r1=111875&r2=111876&view=diff ============================================================================== --- llvm/trunk/test/MC/AsmParser/directive_values.s (original) +++ llvm/trunk/test/MC/AsmParser/directive_values.s Mon Aug 23 19:43:25 2010 @@ -19,3 +19,20 @@ # CHECK: .quad 9 TEST3: .quad 9 + + +# rdar://7997827 +TEST4: + .quad 0b0100 + .quad 4294967295 + .quad 4294967295+1 + .quad 4294967295LL+1 + .quad 0b10LL + 07ULL + 0x42AULL +# CHECK: TEST4 +# CHECK: .quad 4 +# CHECK: .quad 4294967295 +# CHECK: .quad 4294967296 +# CHECK: .quad 4294967296 +# CHECK: .quad 1075 + + From echristo at apple.com Mon Aug 23 19:50:47 2010 From: echristo at apple.com (Eric Christopher) Date: Tue, 24 Aug 2010 00:50:47 -0000 Subject: [llvm-commits] [llvm] r111883 - /llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Message-ID: <20100824005047.B254A2A6C12C@llvm.org> Author: echristo Date: Mon Aug 23 19:50:47 2010 New Revision: 111883 URL: http://llvm.org/viewvc/llvm-project?rev=111883&view=rev Log: Add register class hack that needs to go away, but makes it more obvious that it needs to go away. Use loadRegFromStackSlot where possible. Also, remember to update the value map. Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=111883&r1=111882&r2=111883&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Mon Aug 23 19:50:47 2010 @@ -58,6 +58,9 @@ const TargetInstrInfo &TII; const TargetLowering &TLI; const ARMFunctionInfo *AFI; + + // FIXME: Remove this and replace it with queries. + const TargetRegisterClass *FixedRC; public: explicit ARMFastISel(FunctionLoweringInfo &funcInfo) @@ -67,6 +70,7 @@ TLI(*TM.getTargetLowering()) { Subtarget = &TM.getSubtarget(); AFI = funcInfo.MF->getInfo(); + FixedRC = ARM::GPRRegisterClass; } // Code from FastISel.cpp. @@ -109,6 +113,7 @@ // Utility routines. private: + bool ARMLoadAlloca(const Instruction *I); bool ARMComputeRegOffset(const Value *Obj, unsigned &Reg, int &Offset); bool DefinesOptionalPredicate(MachineInstr *MI, bool *CPSR); @@ -340,22 +345,14 @@ //errs() << "Failing Opcode is: " << *Op1 << "\n"; break; case Instruction::Alloca: { - // Do static allocas. - const AllocaInst *A = cast(Obj); - DenseMap::iterator SI = - FuncInfo.StaticAllocaMap.find(A); - if (SI != FuncInfo.StaticAllocaMap.end()) - Offset = - TM.getRegisterInfo()->getFrameIndexReference(*FuncInfo.MF, - SI->second, Reg); - else - return false; - return true; + assert(false && "Alloca should have been handled earlier!"); + return false; } } if (const GlobalValue *GV = dyn_cast(Obj)) { //errs() << "Failing GV is: " << GV << "\n"; + (void)GV; return false; } @@ -364,12 +361,37 @@ return Reg != 0; } +bool ARMFastISel::ARMLoadAlloca(const Instruction *I) { + Value *Op0 = I->getOperand(0); + + // Verify it's an alloca. + const Instruction *Inst = dyn_cast(Op0); + if (!Inst || Inst->getOpcode() != Instruction::Alloca) return false; + + const AllocaInst *AI = cast(Op0); + DenseMap::iterator SI = + FuncInfo.StaticAllocaMap.find(AI); + + if (SI != FuncInfo.StaticAllocaMap.end()) { + unsigned ResultReg = createResultReg(FixedRC); + TII.loadRegFromStackSlot(*FuncInfo.MBB, *FuncInfo.InsertPt, + ResultReg, SI->second, FixedRC, + TM.getRegisterInfo()); + UpdateValueMap(I, ResultReg); + return true; + } + + return false; +} + bool ARMFastISel::ARMSelectLoad(const Instruction *I) { // Our register and offset with innocuous defaults. unsigned Reg = 0; int Offset = 0; // TODO: Think about using loadRegFromStackSlot() here when we can. + if (ARMLoadAlloca(I)) + return true; // See if we can handle this as Reg + Offset if (!ARMComputeRegOffset(I->getOperand(0), Reg, Offset)) @@ -393,10 +415,11 @@ } // FIXME: There is more than one register class in the world... - unsigned ResultReg = createResultReg(ARM::GPRRegisterClass); + unsigned ResultReg = createResultReg(FixedRC); AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(ARM::LDR), ResultReg) .addImm(0).addReg(Reg).addImm(Offset)); + UpdateValueMap(I, ResultReg); return true; } From echristo at apple.com Mon Aug 23 20:10:04 2010 From: echristo at apple.com (Eric Christopher) Date: Tue, 24 Aug 2010 01:10:04 -0000 Subject: [llvm-commits] [llvm] r111885 - /llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Message-ID: <20100824011004.401DB2A6C12C@llvm.org> Author: echristo Date: Mon Aug 23 20:10:04 2010 New Revision: 111885 URL: http://llvm.org/viewvc/llvm-project?rev=111885&view=rev Log: Fix the opcode and the operands for the load instruction. Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=111885&r1=111884&r2=111885&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Mon Aug 23 20:10:04 2010 @@ -415,10 +415,13 @@ } // FIXME: There is more than one register class in the world... + // TODO: Verify the additions above work, otherwise we'll need to add the + // offset instead of 0 and do all sorts of operand munging. unsigned ResultReg = createResultReg(FixedRC); + unsigned Opc = AFI->isThumb2Function() ? ARM::tLDR : ARM::LDR; AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, - TII.get(ARM::LDR), ResultReg) - .addImm(0).addReg(Reg).addImm(Offset)); + TII.get(Opc), ResultReg) + .addReg(Reg).addReg(0).addImm(0)); UpdateValueMap(I, ResultReg); return true; From foldr at codedgers.com Mon Aug 23 20:10:22 2010 From: foldr at codedgers.com (Mikhail Glushenkov) Date: Tue, 24 Aug 2010 01:10:22 -0000 Subject: [llvm-commits] [llvm] r111886 - /llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp Message-ID: <20100824011022.E8E812A6C12C@llvm.org> Author: foldr Date: Mon Aug 23 20:10:22 2010 New Revision: 111886 URL: http://llvm.org/viewvc/llvm-project?rev=111886&view=rev Log: llvmc: Improve error handling in EmitEdgeClasses(). Modified: llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp Modified: llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp?rev=111886&r1=111885&r2=111886&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp Mon Aug 23 20:10:22 2010 @@ -1243,6 +1243,11 @@ } }; +/// IsOptionalEdge - Validate that the 'optional_edge' has proper structure. +bool IsOptionalEdge (const DagInit& Edg) { + return (GetOperatorName(Edg) == "optional_edge") && (Edg.getNumArgs() > 2); +} + /// CheckForSuperfluousOptions - Check that there are no side /// effect-free options (specified only in the OptionList). Otherwise, /// output a warning. @@ -1266,9 +1271,9 @@ // non-superfluous options. for (DagVector::const_iterator B = EdgeVector.begin(), E = EdgeVector.end(); B != E; ++B) { - const DagInit* Edge = *B; - if (Edge->getNumArgs() > 2) { - const DagInit& Weight = InitPtrToDag(Edge->getArg(2)); + const DagInit& Edge = **B; + if (IsOptionalEdge(Edge)) { + const DagInit& Weight = InitPtrToDag(Edge.getArg(2)); WalkCase(&Weight, ExtractOptionNames(nonSuperfluousOptions), Id()); } } @@ -2718,7 +2723,7 @@ /// EmitEdgeClass - Emit a single Edge# class. void EmitEdgeClass (unsigned N, const std::string& Target, - const DagInit* Case, const OptionDescriptions& OptDescs, + const DagInit& Case, const OptionDescriptions& OptDescs, raw_ostream& O) { // Class constructor. @@ -2733,7 +2738,7 @@ O.indent(Indent2) << "unsigned ret = 0;\n"; // Handle the 'case' construct. - EmitCaseConstructHandler(Case, Indent2, EmitEdgePropertyHandlerCallback, + EmitCaseConstructHandler(&Case, Indent2, EmitEdgePropertyHandlerCallback, false, OptDescs, O); O.indent(Indent2) << "return ret;\n"; @@ -2747,13 +2752,19 @@ int i = 0; for (DagVector::const_iterator B = EdgeVector.begin(), E = EdgeVector.end(); B != E; ++B) { - const DagInit* Edge = *B; - const std::string& NodeB = InitPtrToString(Edge->getArg(1)); + const DagInit& Edge = **B; + const std::string& Name = GetOperatorName(Edge); - if (Edge->getNumArgs() > 2) { - const DagInit* Weight = &InitPtrToDag(Edge->getArg(2)); + if (Name == "optional_edge") { + assert(IsOptionalEdge(Edge)); + const std::string& NodeB = InitPtrToString(Edge.getArg(1)); + + const DagInit& Weight = InitPtrToDag(Edge.getArg(2)); EmitEdgeClass(i, NodeB, Weight, OptDescs, O); } + else if (Name != "edge") { + throw "Unknown edge class: '" + Name + "'!"; + } ++i; } @@ -2777,13 +2788,13 @@ int i = 0; for (DagVector::const_iterator B = EdgeVector.begin(), E = EdgeVector.end(); B != E; ++B) { - const DagInit* Edge = *B; - const std::string& NodeA = InitPtrToString(Edge->getArg(0)); - const std::string& NodeB = InitPtrToString(Edge->getArg(1)); + const DagInit& Edge = **B; + const std::string& NodeA = InitPtrToString(Edge.getArg(0)); + const std::string& NodeB = InitPtrToString(Edge.getArg(1)); O.indent(Indent1) << "if (int ret = G.insertEdge(\"" << NodeA << "\", "; - if (Edge->getNumArgs() > 2) + if (IsOptionalEdge(Edge)) O << "new Edge" << i << "()"; else O << "new SimpleEdge(\"" << NodeB << "\")"; @@ -3071,7 +3082,6 @@ EmitToolClassDefinition(*(*B), Data.OptDescs, O); // Emit Edge# classes. - // TODO: check for edge/optional_edge dag markers. EmitEdgeClasses(Data.Edges, Data.OptDescs, O); O << "} // End anonymous namespace.\n\n"; From echristo at apple.com Mon Aug 23 20:10:52 2010 From: echristo at apple.com (Eric Christopher) Date: Tue, 24 Aug 2010 01:10:52 -0000 Subject: [llvm-commits] [llvm] r111887 - /llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Message-ID: <20100824011052.B9B122A6C12C@llvm.org> Author: echristo Date: Mon Aug 23 20:10:52 2010 New Revision: 111887 URL: http://llvm.org/viewvc/llvm-project?rev=111887&view=rev Log: Update comment. Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=111887&r1=111886&r2=111887&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Mon Aug 23 20:10:52 2010 @@ -389,7 +389,8 @@ unsigned Reg = 0; int Offset = 0; - // TODO: Think about using loadRegFromStackSlot() here when we can. + // If we're an alloca we know we have a frame index and can emit the load + // directly in short order. if (ARMLoadAlloca(I)) return true; From isanbard at gmail.com Mon Aug 23 20:11:30 2010 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 24 Aug 2010 01:11:30 -0000 Subject: [llvm-commits] [llvm] r111889 - /llvm/trunk/lib/Target/ARM/ARM.h Message-ID: <20100824011130.972682A6C12C@llvm.org> Author: void Date: Mon Aug 23 20:11:30 2010 New Revision: 111889 URL: http://llvm.org/viewvc/llvm-project?rev=111889&view=rev Log: Add comments for what the condition code symbols mean. Modified: llvm/trunk/lib/Target/ARM/ARM.h Modified: llvm/trunk/lib/Target/ARM/ARM.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARM.h?rev=111889&r1=111888&r2=111889&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARM.h (original) +++ llvm/trunk/lib/Target/ARM/ARM.h Mon Aug 23 20:11:30 2010 @@ -30,22 +30,22 @@ namespace ARMCC { // The CondCodes constants map directly to the 4-bit encoding of the // condition field for predicated instructions. - enum CondCodes { - EQ, - NE, - HS, - LO, - MI, - PL, - VS, - VC, - HI, - LS, - GE, - LT, - GT, - LE, - AL + enum CondCodes { // Meaning (integer) Meaning (floating-point) + EQ, // Equal Equal + NE, // Not equal Not equal, or unordered + HS, // Carry set >, ==, or unordered + LO, // Carry clear Less than + MI, // Minus, negative Less than + PL, // Plus, positive or zero >, ==, or unordered + VS, // Overflow Unordered + VC, // No overflow Not unordered + HI, // Unsigned higher Greater than, or unordered + LS, // Unsigned lower or same Less than or equal + GE, // Greater than or equal Greater than or equal + LT, // Less than Less than, or unordered + GT, // Greater than Greater than + LE, // Less than or equal <, ==, or unordered + AL // Always (unconditional) Always (unconditional) }; inline static CondCodes getOppositeCondition(CondCodes CC) { From bruno.cardoso at gmail.com Mon Aug 23 20:16:16 2010 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Tue, 24 Aug 2010 01:16:16 -0000 Subject: [llvm-commits] [llvm] r111890 - in /llvm/trunk/lib/Target/X86: X86ISelLowering.cpp X86InstrSSE.td Message-ID: <20100824011616.5901C2A6C12C@llvm.org> Author: bruno Date: Mon Aug 23 20:16:15 2010 New Revision: 111890 URL: http://llvm.org/viewvc/llvm-project?rev=111890&view=rev Log: Use pshufhw and pshuflw in more cases and fix getTargetShuffleNode number of arguments Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/lib/Target/X86/X86InstrSSE.td Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=111890&r1=111889&r2=111890&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Aug 23 20:16:15 2010 @@ -2559,7 +2559,7 @@ //===----------------------------------------------------------------------===// static SDValue getTargetShuffleNode(unsigned Opc, DebugLoc dl, EVT VT, - SDValue V1, SDValue V2, unsigned TargetMask, SelectionDAG &DAG) { + SDValue V1, unsigned TargetMask, SelectionDAG &DAG) { switch(Opc) { default: llvm_unreachable("Unknown x86 shuffle node"); @@ -4285,7 +4285,7 @@ TargetMask = pshufhw ? X86::getShufflePSHUFHWImmediate(NewV.getNode()): X86::getShufflePSHUFLWImmediate(NewV.getNode()); V1 = NewV.getOperand(0); - return getTargetShuffleNode(Opc, dl, MVT::v8i16, V1, V1, TargetMask, DAG); + return getTargetShuffleNode(Opc, dl, MVT::v8i16, V1, TargetMask, DAG); } } @@ -4359,6 +4359,12 @@ MaskV.push_back(i); NewV = DAG.getVectorShuffle(MVT::v8i16, dl, NewV, DAG.getUNDEF(MVT::v8i16), &MaskV[0]); + + if (NewV.getOpcode() == ISD::VECTOR_SHUFFLE && Subtarget->hasSSSE3()) + NewV = getTargetShuffleNode(X86ISD::PSHUFLW, dl, MVT::v8i16, + NewV.getOperand(0), + X86::getShufflePSHUFLWImmediate(NewV.getNode()), + DAG); } // If BestHi >= 0, generate a pshufhw to put the high elements in order, @@ -4381,6 +4387,12 @@ } NewV = DAG.getVectorShuffle(MVT::v8i16, dl, NewV, DAG.getUNDEF(MVT::v8i16), &MaskV[0]); + + if (NewV.getOpcode() == ISD::VECTOR_SHUFFLE && Subtarget->hasSSSE3()) + NewV = getTargetShuffleNode(X86ISD::PSHUFHW, dl, MVT::v8i16, + NewV.getOperand(0), + X86::getShufflePSHUFHWImmediate(NewV.getNode()), + DAG); } // In case BestHi & BestLo were both -1, which means each quadword has a word Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=111890&r1=111889&r2=111890&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Mon Aug 23 20:16:15 2010 @@ -5890,12 +5890,16 @@ (PSHUFHWmi addr:$src, imm:$imm)>; def : Pat<(v8i16 (X86PShufhw VR128:$src, (i8 imm:$imm))), (PSHUFHWri VR128:$src, imm:$imm)>; +def : Pat<(v8i16 (X86PShufhw (bc_v8i16 (memopv2i64 addr:$src)), (i8 imm:$imm))), + (PSHUFHWmi addr:$src, imm:$imm)>; // Shuffle with PSHUFLW def : Pat<(v8i16 (X86PShuflwLd addr:$src, (i8 imm:$imm))), (PSHUFLWmi addr:$src, imm:$imm)>; def : Pat<(v8i16 (X86PShuflw VR128:$src, (i8 imm:$imm))), (PSHUFLWri VR128:$src, imm:$imm)>; +def : Pat<(v8i16 (X86PShuflw (bc_v8i16 (memopv2i64 addr:$src)), (i8 imm:$imm))), + (PSHUFLWmi addr:$src, imm:$imm)>; // Shuffle with PALIGN def : Pat<(v1i64 (X86PAlign VR64:$src1, VR64:$src2, (i8 imm:$imm))), From jyasskin at google.com Mon Aug 23 20:37:07 2010 From: jyasskin at google.com (Jeffrey Yasskin) Date: Tue, 24 Aug 2010 02:37:07 +0100 Subject: [llvm-commits] JIT: Emitting a debug location after an instruction In-Reply-To: References: Message-ID: On Mon, Aug 23, 2010 at 8:10 PM, Devang Patel wrote: > > > On Mon, Aug 23, 2010 at 4:46 AM, Jeffrey Yasskin > wrote: >> >> Devang, why does this argument to processDebugLoc even exist? I don't >> see it used anywhere, you didn't update the MachineCodeEmitter.h >> comment to mention it, and your commit adding it only says "Update >> processDebugLoc() so that it can be used to process debug info before >> and after printing an instruction." >> > > Imagine a lexical scope represented by a single machine instruction. You > want to emit a label before and after the instruction to record instruction > range for the scope. When you get the call to processDebugLoc(..., false), you don't know that the next instruction will have a different DebugLoc or, if it does, that the new DebugLoc will be part of a different scope, so you can't actually emit the label in the processDebugLoc(..., false) invocation. Can you point me to code that runs when BeforePrintingInsn==false so I can see what I'm missing? From gohman at apple.com Mon Aug 23 21:01:24 2010 From: gohman at apple.com (Dan Gohman) Date: Tue, 24 Aug 2010 02:01:24 -0000 Subject: [llvm-commits] [llvm] r111892 - /llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp Message-ID: <20100824020124.BC9CE2A6C12C@llvm.org> Author: djg Date: Mon Aug 23 21:01:24 2010 New Revision: 111892 URL: http://llvm.org/viewvc/llvm-project?rev=111892&view=rev Log: Simplify this code. NamedMDNode operands are MDNodes. Modified: llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp Modified: llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp?rev=111892&r1=111891&r2=111892&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp (original) +++ llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp Mon Aug 23 21:01:24 2010 @@ -217,8 +217,7 @@ void ValueEnumerator::EnumerateNamedMDNode(const NamedMDNode *MD) { for (unsigned i = 0, e = MD->getNumOperands(); i != e; ++i) - if (MDNode *E = MD->getOperand(i)) - EnumerateValue(E); + EnumerateMetadata(MD->getOperand(i)); } void ValueEnumerator::EnumerateMetadata(const Value *MD) { From gohman at apple.com Mon Aug 23 21:05:17 2010 From: gohman at apple.com (Dan Gohman) Date: Tue, 24 Aug 2010 02:05:17 -0000 Subject: [llvm-commits] [llvm] r111893 - in /llvm/trunk/lib/AsmParser: LLParser.cpp LLParser.h Message-ID: <20100824020517.BE3CE2A6C12C@llvm.org> Author: djg Date: Mon Aug 23 21:05:17 2010 New Revision: 111893 URL: http://llvm.org/viewvc/llvm-project?rev=111893&view=rev Log: Give ParseInstructionMetadata access to the PerFunctionState object. This is in preparation for generalizing its parsing of function-local values. Modified: llvm/trunk/lib/AsmParser/LLParser.cpp llvm/trunk/lib/AsmParser/LLParser.h Modified: llvm/trunk/lib/AsmParser/LLParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/LLParser.cpp?rev=111893&r1=111892&r2=111893&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/LLParser.cpp (original) +++ llvm/trunk/lib/AsmParser/LLParser.cpp Mon Aug 23 21:05:17 2010 @@ -1117,7 +1117,8 @@ /// ParseInstructionMetadata /// ::= !dbg !42 (',' !dbg !57)* -bool LLParser::ParseInstructionMetadata(Instruction *Inst) { +bool LLParser::ParseInstructionMetadata(Instruction *Inst, + PerFunctionState *PFS) { do { if (Lex.getKind() != lltok::MetadataVar) return TokError("expected metadata after comma"); @@ -2981,7 +2982,7 @@ // With a normal result, we check to see if the instruction is followed by // a comma and metadata. if (EatIfPresent(lltok::comma)) - if (ParseInstructionMetadata(Inst)) + if (ParseInstructionMetadata(Inst, &PFS)) return true; break; case InstExtraComma: @@ -2989,7 +2990,7 @@ // If the instruction parser ate an extra comma at the end of it, it // *must* be followed by metadata. - if (ParseInstructionMetadata(Inst)) + if (ParseInstructionMetadata(Inst, &PFS)) return true; break; } Modified: llvm/trunk/lib/AsmParser/LLParser.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/LLParser.h?rev=111893&r1=111892&r2=111893&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/LLParser.h (original) +++ llvm/trunk/lib/AsmParser/LLParser.h Mon Aug 23 21:05:17 2010 @@ -180,7 +180,6 @@ bool ParseOptionalCallingConv(CallingConv::ID &CC); bool ParseOptionalAlignment(unsigned &Alignment); bool ParseOptionalStackAlignment(unsigned &Alignment); - bool ParseInstructionMetadata(Instruction *Inst); bool ParseOptionalCommaAlign(unsigned &Alignment, bool &AteExtraComma); bool ParseIndexList(SmallVectorImpl &Indices,bool &AteExtraComma); bool ParseIndexList(SmallVectorImpl &Indices) { @@ -310,6 +309,7 @@ bool ParseGlobalValueVector(SmallVectorImpl &Elts); bool ParseMetadataValue(ValID &ID, PerFunctionState *PFS); bool ParseMDNodeVector(SmallVectorImpl &, PerFunctionState *PFS); + bool ParseInstructionMetadata(Instruction *Inst, PerFunctionState *PFS); // Function Parsing. struct ArgInfo { From jyasskin at google.com Mon Aug 23 21:08:32 2010 From: jyasskin at google.com (Jeffrey Yasskin) Date: Tue, 24 Aug 2010 03:08:32 +0100 Subject: [llvm-commits] JIT: Emitting a debug location after an instruction In-Reply-To: References: Message-ID: On Mon, Aug 23, 2010 at 9:37 PM, nicolas geoffray wrote: > > > On Mon, Aug 23, 2010 at 8:57 PM, Jeffrey Yasskin > wrote: >> >> I'm not sure processDebugLoc does what you need it to, even with your >> changes. It only records an address when the DebugLoc changes, and >> that's not guaranteed to happen exactly on the call >> MachineInstruction. (Unless you've done something to ensure it does?) > > Each call instruction and only call instructions have metadata associated to > it. So I am sure emitting the debug location after emitting the call > instructions work for my case. A CallInst in the IR expands to several MachineInstructions, all of which have the same DebugLoc (and which may be rearranged/interleaved with other DebugLoc'ed MIs by the SelectionDAG (ScheduleDAG?)). For example, the following IR: @.str = private constant [12 x i8] c"Hello World\00" ; <[12 x i8]*> [#uses=1] define i32 @main() nounwind { entry: %call = tail call i32 @puts(i8* getelementptr inbounds ([12 x i8]* @.str, i32 0, i32 0)) nounwind, !dbg !6 ; [#uses=0] ret i32 0, !dbg !8 } declare i32 @puts(i8* nocapture) nounwind !llvm.dbg.sp = !{!0} !0 = metadata !{i32 524334, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"main", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, null} ; [ DW_TAG_subprogram ] !1 = metadata !{i32 524329, metadata !"test.c", metadata !"/Users/jyasskin/tmp", metadata !2} ; [ DW_TAG_file_type ] !2 = metadata !{i32 524305, i32 0, i32 12, metadata !"test.c", metadata !"/Users/jyasskin/tmp", metadata !"clang 2.8", i1 true, i1 true, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] !3 = metadata !{i32 524309, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] !4 = metadata !{metadata !5} !5 = metadata !{i32 524324, metadata !1, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] !6 = metadata !{i32 3, i32 3, metadata !7, null} !7 = metadata !{i32 524299, metadata !0, i32 2, i32 12} ; [ DW_TAG_lexical_block ] !8 = metadata !{i32 4, i32 1, metadata !7, null} Produces the following MachineFunction: BB#0: derived from LLVM BB %entry %ESP = SUB32ri8 %ESP, 12, %EFLAGS; dbg:test.c:3:3 MOV32mi %ESP, 1, %reg0, 0, %reg0, ; mem:ST4[Stack] dbg:test.c:3:3 CALLpcrel32 , %EAX, %ESP, ...; dbg:test.c:3:3 %EAX = MOV32r0 %EFLAGS %ESP = ADD32ri8 %ESP, 12, %EFLAGS; dbg:test.c:4:1 RET %EAX; dbg:test.c:4:1 and saves addresses in processDebugLoc at the following MachineInstructions: %ESP = SUB32ri8 %ESP, 12, %EFLAGS; dbg:test.c:3:3 %ESP = ADD32ri8 %ESP, 12, %EFLAGS; dbg:test.c:4:1 That is, not the call instruction. So, I'm not sure why this is working for you... >> Do you have a unit test that shows this works in all cases? > > Not sure about the "all cases", but at least it is working as intended for > me and these hooks (emitting before or after) were already present before my > changes. > >> >> Mapping return addresses to metadata seems like more of a job for the >> GC system, but that's not implemented for the JIT, so I can't very >> well say to use it instead. :-/ > > Indeed, doing it in the GC system would also work, but the changes would be > way less straightforward than this simple change in the JITemitter. > Nicolas > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > From gohman at apple.com Mon Aug 23 21:10:53 2010 From: gohman at apple.com (Dan Gohman) Date: Tue, 24 Aug 2010 02:10:53 -0000 Subject: [llvm-commits] [llvm] r111894 - /llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp Message-ID: <20100824021053.2A0D72A6C12C@llvm.org> Author: djg Date: Mon Aug 23 21:10:52 2010 New Revision: 111894 URL: http://llvm.org/viewvc/llvm-project?rev=111894&view=rev Log: When we know we have an MDValue or MDString, call EnumerateMetadata directly instead of going through EnumerateValue. Modified: llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp Modified: llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp?rev=111894&r1=111893&r2=111894&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp (original) +++ llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp Mon Aug 23 21:10:52 2010 @@ -352,7 +352,7 @@ EnumerateOperandType(Elem); } } else if (isa(V) || isa(V)) - EnumerateValue(V); + EnumerateMetadata(V); } void ValueEnumerator::EnumerateAttributes(const AttrListPtr &PAL) { From gohman at apple.com Mon Aug 23 21:24:03 2010 From: gohman at apple.com (Dan Gohman) Date: Tue, 24 Aug 2010 02:24:03 -0000 Subject: [llvm-commits] [llvm] r111895 - in /llvm/trunk: lib/AsmParser/LLParser.cpp lib/AsmParser/LLParser.h lib/Bitcode/Writer/ValueEnumerator.cpp lib/Bitcode/Writer/ValueEnumerator.h test/Feature/metadata.ll Message-ID: <20100824022403.E65C92A6C12C@llvm.org> Author: djg Date: Mon Aug 23 21:24:03 2010 New Revision: 111895 URL: http://llvm.org/viewvc/llvm-project?rev=111895&view=rev Log: Extend function-local metadata to be usable as attachments. Modified: llvm/trunk/lib/AsmParser/LLParser.cpp llvm/trunk/lib/AsmParser/LLParser.h llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.h llvm/trunk/test/Feature/metadata.ll Modified: llvm/trunk/lib/AsmParser/LLParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/LLParser.cpp?rev=111895&r1=111894&r2=111895&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/LLParser.cpp (original) +++ llvm/trunk/lib/AsmParser/LLParser.cpp Mon Aug 23 21:24:03 2010 @@ -1124,23 +1124,33 @@ return TokError("expected metadata after comma"); std::string Name = Lex.getStrVal(); + unsigned MDK = M->getMDKindID(Name.c_str()); Lex.Lex(); MDNode *Node; unsigned NodeID; SMLoc Loc = Lex.getLoc(); - if (ParseToken(lltok::exclaim, "expected '!' here") || - ParseMDNodeID(Node, NodeID)) + + if (ParseToken(lltok::exclaim, "expected '!' here")) return true; - unsigned MDK = M->getMDKindID(Name.c_str()); - if (Node) { - // If we got the node, add it to the instruction. - Inst->setMetadata(MDK, Node); + if (Lex.getKind() == lltok::lbrace) { + ValID ID; + if (ParseMetadataListValue(ID, PFS)) + return true; + assert(ID.Kind == ValID::t_MDNode); + Inst->setMetadata(MDK, ID.MDNodeVal); } else { - MDRef R = { Loc, MDK, NodeID }; - // Otherwise, remember that this should be resolved later. - ForwardRefInstMetadata[Inst].push_back(R); + if (ParseMDNodeID(Node, NodeID)) + return true; + if (Node) { + // If we got the node, add it to the instruction. + Inst->setMetadata(MDK, Node); + } else { + MDRef R = { Loc, MDK, NodeID }; + // Otherwise, remember that this should be resolved later. + ForwardRefInstMetadata[Inst].push_back(R); + } } // If this is the end of the list, we're done. @@ -2505,6 +2515,20 @@ return false; } +bool LLParser::ParseMetadataListValue(ValID &ID, PerFunctionState *PFS) { + assert(Lex.getKind() == lltok::lbrace); + Lex.Lex(); + + SmallVector Elts; + if (ParseMDNodeVector(Elts, PFS) || + ParseToken(lltok::rbrace, "expected end of metadata node")) + return true; + + ID.MDNodeVal = MDNode::get(Context, Elts.data(), Elts.size()); + ID.Kind = ValID::t_MDNode; + return false; +} + /// ParseMetadataValue /// ::= !42 /// ::= !{...} @@ -2515,16 +2539,8 @@ // MDNode: // !{ ... } - if (EatIfPresent(lltok::lbrace)) { - SmallVector Elts; - if (ParseMDNodeVector(Elts, PFS) || - ParseToken(lltok::rbrace, "expected end of metadata node")) - return true; - - ID.MDNodeVal = MDNode::get(Context, Elts.data(), Elts.size()); - ID.Kind = ValID::t_MDNode; - return false; - } + if (Lex.getKind() == lltok::lbrace) + return ParseMetadataListValue(ID, PFS); // Standalone metadata reference // !42 Modified: llvm/trunk/lib/AsmParser/LLParser.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/LLParser.h?rev=111895&r1=111894&r2=111895&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/LLParser.h (original) +++ llvm/trunk/lib/AsmParser/LLParser.h Mon Aug 23 21:24:03 2010 @@ -307,6 +307,7 @@ bool ParseGlobalValue(const Type *Ty, Constant *&V); bool ParseGlobalTypeAndValue(Constant *&V); bool ParseGlobalValueVector(SmallVectorImpl &Elts); + bool ParseMetadataListValue(ValID &ID, PerFunctionState *PFS); bool ParseMetadataValue(ValID &ID, PerFunctionState *PFS); bool ParseMDNodeVector(SmallVectorImpl &, PerFunctionState *PFS); bool ParseInstructionMetadata(Instruction *Inst, PerFunctionState *PFS); Modified: llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp?rev=111895&r1=111894&r2=111895&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp (original) +++ llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp Mon Aug 23 21:24:03 2010 @@ -220,8 +220,35 @@ EnumerateMetadata(MD->getOperand(i)); } +/// EnumerateMDNodeOperands - Enumerate all non-function-local values +/// and types referenced by the given MDNode. +void ValueEnumerator::EnumerateMDNodeOperands(const MDNode *N) { + for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { + if (Value *V = N->getOperand(i)) { + if (isa(V) || isa(V)) + EnumerateMetadata(V); + else if (!isa(V) && !isa(V)) + EnumerateValue(V); + } else + EnumerateType(Type::getVoidTy(N->getContext())); + } +} + void ValueEnumerator::EnumerateMetadata(const Value *MD) { assert((isa(MD) || isa(MD)) && "Invalid metadata kind"); + + // Enumerate the type of this value. + EnumerateType(MD->getType()); + + const MDNode *N = dyn_cast(MD); + + // In the module-level pass, skip function-local nodes themselves, but + // do walk their operands. + if (N && N->isFunctionLocal() && N->getFunction()) { + EnumerateMDNodeOperands(N); + return; + } + // Check to see if it's already in! unsigned &MDValueID = MDValueMap[MD]; if (MDValueID) { @@ -229,35 +256,52 @@ MDValues[MDValueID-1].second++; return; } + MDValues.push_back(std::make_pair(MD, 1U)); + MDValueID = MDValues.size(); + + // Enumerate all non-function-local operands. + if (N) + EnumerateMDNodeOperands(N); +} + +/// EnumerateFunctionLocalMetadataa - Incorporate function-local metadata +/// information reachable from the given MDNode. +void ValueEnumerator::EnumerateFunctionLocalMetadata(const MDNode *N) { + assert(N->isFunctionLocal() && N->getFunction() && + "EnumerateFunctionLocalMetadata called on non-function-local mdnode!"); // Enumerate the type of this value. - EnumerateType(MD->getType()); + EnumerateType(N->getType()); - if (const MDNode *N = dyn_cast(MD)) { - MDValues.push_back(std::make_pair(MD, 1U)); - MDValueMap[MD] = MDValues.size(); - MDValueID = MDValues.size(); - for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { - if (Value *V = N->getOperand(i)) - EnumerateValue(V); - else - EnumerateType(Type::getVoidTy(MD->getContext())); - } - if (N->isFunctionLocal() && N->getFunction()) - FunctionLocalMDs.push_back(N); + // Check to see if it's already in! + unsigned &MDValueID = MDValueMap[N]; + if (MDValueID) { + // Increment use count. + MDValues[MDValueID-1].second++; return; } - - // Add the value. - assert(isa(MD) && "Unknown metadata kind"); - MDValues.push_back(std::make_pair(MD, 1U)); + MDValues.push_back(std::make_pair(N, 1U)); MDValueID = MDValues.size(); + + // To incoroporate function-local information visit all function-local + // MDNodes and all function-local values they reference. + for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) + if (Value *V = N->getOperand(i)) { + if (MDNode *O = dyn_cast(V)) + if (O->isFunctionLocal() && O->getFunction()) + EnumerateFunctionLocalMetadata(O); + else if (isa(V) || isa(V)) + EnumerateValue(V); + } + + // Also, collect all function-local MDNodes for easy access. + FunctionLocalMDs.push_back(N); } void ValueEnumerator::EnumerateValue(const Value *V) { assert(!V->getType()->isVoidTy() && "Can't insert void values!"); - if (isa(V) || isa(V)) - return EnumerateMetadata(V); + assert(!isa(V) && !isa(V) && + "EnumerateValue doesn't handle Metadata!"); // Check to see if it's already in! unsigned &ValueID = ValueMap[V]; @@ -370,6 +414,7 @@ void ValueEnumerator::incorporateFunction(const Function &F) { InstructionCount = 0; NumModuleValues = Values.size(); + NumModuleMDValues = MDValues.size(); // Adding function arguments to the value table. for (Function::const_arg_iterator I = F.arg_begin(), E = F.arg_end(); @@ -412,6 +457,15 @@ // Enumerate metadata after the instructions they might refer to. FnLocalMDVector.push_back(MD); } + + SmallVector, 8> MDs; + I->getAllMetadataOtherThanDebugLoc(MDs); + for (unsigned i = 0, e = MDs.size(); i != e; ++i) { + MDNode *N = MDs[i].second; + if (N->isFunctionLocal() && N->getFunction()) + FnLocalMDVector.push_back(N); + } + if (!I->getType()->isVoidTy()) EnumerateValue(I); } @@ -419,17 +473,20 @@ // Add all of the function-local metadata. for (unsigned i = 0, e = FnLocalMDVector.size(); i != e; ++i) - EnumerateOperandType(FnLocalMDVector[i]); + EnumerateFunctionLocalMetadata(FnLocalMDVector[i]); } void ValueEnumerator::purgeFunction() { /// Remove purged values from the ValueMap. for (unsigned i = NumModuleValues, e = Values.size(); i != e; ++i) ValueMap.erase(Values[i].first); + for (unsigned i = NumModuleMDValues, e = MDValues.size(); i != e; ++i) + MDValueMap.erase(MDValues[i].first); for (unsigned i = 0, e = BasicBlocks.size(); i != e; ++i) ValueMap.erase(BasicBlocks[i]); Values.resize(NumModuleValues); + MDValues.resize(NumModuleMDValues); BasicBlocks.clear(); } Modified: llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.h?rev=111895&r1=111894&r2=111895&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.h (original) +++ llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.h Mon Aug 23 21:24:03 2010 @@ -72,6 +72,11 @@ /// When a function is incorporated, this is the size of the Values list /// before incorporation. unsigned NumModuleValues; + + /// When a function is incorporated, this is the size of the MDValues list + /// before incorporation. + unsigned NumModuleMDValues; + unsigned FirstFuncConstantID; unsigned FirstInstID; @@ -132,7 +137,9 @@ private: void OptimizeConstants(unsigned CstStart, unsigned CstEnd); + void EnumerateMDNodeOperands(const MDNode *N); void EnumerateMetadata(const Value *MD); + void EnumerateFunctionLocalMetadata(const MDNode *N); void EnumerateNamedMDNode(const NamedMDNode *NMD); void EnumerateValue(const Value *V); void EnumerateType(const Type *T); Modified: llvm/trunk/test/Feature/metadata.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Feature/metadata.ll?rev=111895&r1=111894&r2=111895&view=diff ============================================================================== --- llvm/trunk/test/Feature/metadata.ll (original) +++ llvm/trunk/test/Feature/metadata.ll Mon Aug 23 21:24:03 2010 @@ -1,9 +1,11 @@ ; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis ; PR7105 -define void @foo() { +define void @foo(i32 %x) { call void @llvm.zonk(metadata !1, i64 0, metadata !1) - ret void + store i32 0, i32* null, !whatever !0, !whatever_else !{}, !more !{metadata !"hello"} + store i32 0, i32* null, !whatever !{i32 %x, metadata !"hello", metadata !1, metadata !{}, metadata !2} + ret void, !whatever !{i32 %x} } declare void @llvm.zonk(metadata, i64, metadata) nounwind readnone From gohman at apple.com Mon Aug 23 21:40:27 2010 From: gohman at apple.com (Dan Gohman) Date: Tue, 24 Aug 2010 02:40:27 -0000 Subject: [llvm-commits] [llvm] r111896 - /llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp Message-ID: <20100824024027.B14022A6C12C@llvm.org> Author: djg Date: Mon Aug 23 21:40:27 2010 New Revision: 111896 URL: http://llvm.org/viewvc/llvm-project?rev=111896&view=rev Log: Add braces to fix dangling else. Modified: llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp Modified: llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp?rev=111896&r1=111895&r2=111896&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp (original) +++ llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp Mon Aug 23 21:40:27 2010 @@ -287,10 +287,10 @@ // MDNodes and all function-local values they reference. for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) if (Value *V = N->getOperand(i)) { - if (MDNode *O = dyn_cast(V)) + if (MDNode *O = dyn_cast(V)) { if (O->isFunctionLocal() && O->getFunction()) EnumerateFunctionLocalMetadata(O); - else if (isa(V) || isa(V)) + } else if (isa(V) || isa(V)) EnumerateValue(V); } From geek4civic at gmail.com Mon Aug 23 22:51:32 2010 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Tue, 24 Aug 2010 12:51:32 +0900 Subject: [llvm-commits] [llvm] r111487 - /llvm/trunk/utils/lit/lit/TestFormats.py In-Reply-To: <20100819002245.B37032A6C12C@llvm.org> References: <20100819002245.B37032A6C12C@llvm.org> Message-ID: Hi, ddunbar. It does not detect Cygwin and fails to pick up unittests. Would you like to check my patch attached, please? I checked it on mingw(Python-2.7/w32) and cygwin-1.7. thank you...Takumi -------------- next part -------------- diff --git a/utils/lit/lit/TestFormats.py b/utils/lit/lit/TestFormats.py index 7ffbd2b..c047ea8 100644 --- a/utils/lit/lit/TestFormats.py +++ b/utils/lit/lit/TestFormats.py @@ -1,11 +1,11 @@ import os -import platform +import sys import Test import TestRunner import Util -kIsWindows = platform.system() == 'Windows' +kIsWindows = sys.platform in ['win32', 'cygwin'] class GoogleTest(object): def __init__(self, test_sub_dir, test_suffix): From geek4civic at gmail.com Mon Aug 23 23:04:01 2010 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Tue, 24 Aug 2010 13:04:01 +0900 Subject: [llvm-commits] [PATCH] lit: makes 'where' available on cygwin Message-ID: Hello, This patch makes lit available to clang-test on cygwin. - on cygwin, os.pathsep==':' but Cygwin does not modify the variable PATHEXT. it might be enough separator is ';' with PATHEXT because PATHEXT is, AFAIK, Win32-specific. - When PATHEXT exists, it makes seek suffix-less file. on cygwin, "/path/to/a" hits to "/path/to/a.exe". I quoted 2 lines from http://bugs.python.org/file16459/which.py Please take a look, thank you! ...Takumi -------------- next part -------------- diff --git a/utils/lit/lit/Util.py b/utils/lit/lit/Util.py index 414b714..c758871 100644 --- a/utils/lit/lit/Util.py +++ b/utils/lit/lit/Util.py @@ -64,7 +64,11 @@ def which(command, paths = None): paths = os.defpath # Get suffixes to search. - pathext = os.environ.get('PATHEXT', '').split(os.pathsep) + pathext = os.environ.get('PATHEXT', '').split(';') + + # always check command without extension, even for custom pathext + if not '' in pathext: + pathext.insert(0, '') # Search the paths... for path in paths.split(os.pathsep): From nicholas at mxc.ca Tue Aug 24 02:36:00 2010 From: nicholas at mxc.ca (Nick Lewycky) Date: Tue, 24 Aug 2010 00:36:00 -0700 Subject: [llvm-commits] [llvm] r111895 - in /llvm/trunk: lib/AsmParser/LLParser.cpp lib/AsmParser/LLParser.h lib/Bitcode/Writer/ValueEnumerator.cpp lib/Bitcode/Writer/ValueEnumerator.h test/Feature/metadata.ll In-Reply-To: <20100824022403.E65C92A6C12C@llvm.org> References: <20100824022403.E65C92A6C12C@llvm.org> Message-ID: <4C737660.4010309@mxc.ca> Dan Gohman wrote: > Author: djg > Date: Mon Aug 23 21:24:03 2010 > New Revision: 111895 > > URL: http://llvm.org/viewvc/llvm-project?rev=111895&view=rev > Log: > Extend function-local metadata to be usable as attachments. Dan, does this work with existing .bc files? It's not immediately obvious to me whether this will affect the numbering used for metadata which needs to match the numbering used when writing them. Nick > Modified: > llvm/trunk/lib/AsmParser/LLParser.cpp > llvm/trunk/lib/AsmParser/LLParser.h > llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp > llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.h > llvm/trunk/test/Feature/metadata.ll > > Modified: llvm/trunk/lib/AsmParser/LLParser.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/LLParser.cpp?rev=111895&r1=111894&r2=111895&view=diff > ============================================================================== > --- llvm/trunk/lib/AsmParser/LLParser.cpp (original) > +++ llvm/trunk/lib/AsmParser/LLParser.cpp Mon Aug 23 21:24:03 2010 > @@ -1124,23 +1124,33 @@ > return TokError("expected metadata after comma"); > > std::string Name = Lex.getStrVal(); > + unsigned MDK = M->getMDKindID(Name.c_str()); > Lex.Lex(); > > MDNode *Node; > unsigned NodeID; > SMLoc Loc = Lex.getLoc(); > - if (ParseToken(lltok::exclaim, "expected '!' here") || > - ParseMDNodeID(Node, NodeID)) > + > + if (ParseToken(lltok::exclaim, "expected '!' here")) > return true; > > - unsigned MDK = M->getMDKindID(Name.c_str()); > - if (Node) { > - // If we got the node, add it to the instruction. > - Inst->setMetadata(MDK, Node); > + if (Lex.getKind() == lltok::lbrace) { > + ValID ID; > + if (ParseMetadataListValue(ID, PFS)) > + return true; > + assert(ID.Kind == ValID::t_MDNode); > + Inst->setMetadata(MDK, ID.MDNodeVal); > } else { > - MDRef R = { Loc, MDK, NodeID }; > - // Otherwise, remember that this should be resolved later. > - ForwardRefInstMetadata[Inst].push_back(R); > + if (ParseMDNodeID(Node, NodeID)) > + return true; > + if (Node) { > + // If we got the node, add it to the instruction. > + Inst->setMetadata(MDK, Node); > + } else { > + MDRef R = { Loc, MDK, NodeID }; > + // Otherwise, remember that this should be resolved later. > + ForwardRefInstMetadata[Inst].push_back(R); > + } > } > > // If this is the end of the list, we're done. > @@ -2505,6 +2515,20 @@ > return false; > } > > +bool LLParser::ParseMetadataListValue(ValID&ID, PerFunctionState *PFS) { > + assert(Lex.getKind() == lltok::lbrace); > + Lex.Lex(); > + > + SmallVector Elts; > + if (ParseMDNodeVector(Elts, PFS) || > + ParseToken(lltok::rbrace, "expected end of metadata node")) > + return true; > + > + ID.MDNodeVal = MDNode::get(Context, Elts.data(), Elts.size()); > + ID.Kind = ValID::t_MDNode; > + return false; > +} > + > /// ParseMetadataValue > /// ::= !42 > /// ::= !{...} > @@ -2515,16 +2539,8 @@ > > // MDNode: > // !{ ... } > - if (EatIfPresent(lltok::lbrace)) { > - SmallVector Elts; > - if (ParseMDNodeVector(Elts, PFS) || > - ParseToken(lltok::rbrace, "expected end of metadata node")) > - return true; > - > - ID.MDNodeVal = MDNode::get(Context, Elts.data(), Elts.size()); > - ID.Kind = ValID::t_MDNode; > - return false; > - } > + if (Lex.getKind() == lltok::lbrace) > + return ParseMetadataListValue(ID, PFS); > > // Standalone metadata reference > // !42 > > Modified: llvm/trunk/lib/AsmParser/LLParser.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/LLParser.h?rev=111895&r1=111894&r2=111895&view=diff > ============================================================================== > --- llvm/trunk/lib/AsmParser/LLParser.h (original) > +++ llvm/trunk/lib/AsmParser/LLParser.h Mon Aug 23 21:24:03 2010 > @@ -307,6 +307,7 @@ > bool ParseGlobalValue(const Type *Ty, Constant *&V); > bool ParseGlobalTypeAndValue(Constant *&V); > bool ParseGlobalValueVector(SmallVectorImpl &Elts); > + bool ParseMetadataListValue(ValID&ID, PerFunctionState *PFS); > bool ParseMetadataValue(ValID&ID, PerFunctionState *PFS); > bool ParseMDNodeVector(SmallVectorImpl &, PerFunctionState *PFS); > bool ParseInstructionMetadata(Instruction *Inst, PerFunctionState *PFS); > > Modified: llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp?rev=111895&r1=111894&r2=111895&view=diff > ============================================================================== > --- llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp (original) > +++ llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp Mon Aug 23 21:24:03 2010 > @@ -220,8 +220,35 @@ > EnumerateMetadata(MD->getOperand(i)); > } > > +/// EnumerateMDNodeOperands - Enumerate all non-function-local values > +/// and types referenced by the given MDNode. > +void ValueEnumerator::EnumerateMDNodeOperands(const MDNode *N) { > + for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { > + if (Value *V = N->getOperand(i)) { > + if (isa(V) || isa(V)) > + EnumerateMetadata(V); > + else if (!isa(V)&& !isa(V)) > + EnumerateValue(V); > + } else > + EnumerateType(Type::getVoidTy(N->getContext())); > + } > +} > + > void ValueEnumerator::EnumerateMetadata(const Value *MD) { > assert((isa(MD) || isa(MD))&& "Invalid metadata kind"); > + > + // Enumerate the type of this value. > + EnumerateType(MD->getType()); > + > + const MDNode *N = dyn_cast(MD); > + > + // In the module-level pass, skip function-local nodes themselves, but > + // do walk their operands. > + if (N&& N->isFunctionLocal()&& N->getFunction()) { > + EnumerateMDNodeOperands(N); > + return; > + } > + > // Check to see if it's already in! > unsigned&MDValueID = MDValueMap[MD]; > if (MDValueID) { > @@ -229,35 +256,52 @@ > MDValues[MDValueID-1].second++; > return; > } > + MDValues.push_back(std::make_pair(MD, 1U)); > + MDValueID = MDValues.size(); > + > + // Enumerate all non-function-local operands. > + if (N) > + EnumerateMDNodeOperands(N); > +} > + > +/// EnumerateFunctionLocalMetadataa - Incorporate function-local metadata > +/// information reachable from the given MDNode. > +void ValueEnumerator::EnumerateFunctionLocalMetadata(const MDNode *N) { > + assert(N->isFunctionLocal()&& N->getFunction()&& > + "EnumerateFunctionLocalMetadata called on non-function-local mdnode!"); > > // Enumerate the type of this value. > - EnumerateType(MD->getType()); > + EnumerateType(N->getType()); > > - if (const MDNode *N = dyn_cast(MD)) { > - MDValues.push_back(std::make_pair(MD, 1U)); > - MDValueMap[MD] = MDValues.size(); > - MDValueID = MDValues.size(); > - for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { > - if (Value *V = N->getOperand(i)) > - EnumerateValue(V); > - else > - EnumerateType(Type::getVoidTy(MD->getContext())); > - } > - if (N->isFunctionLocal()&& N->getFunction()) > - FunctionLocalMDs.push_back(N); > + // Check to see if it's already in! > + unsigned&MDValueID = MDValueMap[N]; > + if (MDValueID) { > + // Increment use count. > + MDValues[MDValueID-1].second++; > return; > } > - > - // Add the value. > - assert(isa(MD)&& "Unknown metadata kind"); > - MDValues.push_back(std::make_pair(MD, 1U)); > + MDValues.push_back(std::make_pair(N, 1U)); > MDValueID = MDValues.size(); > + > + // To incoroporate function-local information visit all function-local > + // MDNodes and all function-local values they reference. > + for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) > + if (Value *V = N->getOperand(i)) { > + if (MDNode *O = dyn_cast(V)) > + if (O->isFunctionLocal()&& O->getFunction()) > + EnumerateFunctionLocalMetadata(O); > + else if (isa(V) || isa(V)) > + EnumerateValue(V); > + } > + > + // Also, collect all function-local MDNodes for easy access. > + FunctionLocalMDs.push_back(N); > } > > void ValueEnumerator::EnumerateValue(const Value *V) { > assert(!V->getType()->isVoidTy()&& "Can't insert void values!"); > - if (isa(V) || isa(V)) > - return EnumerateMetadata(V); > + assert(!isa(V)&& !isa(V)&& > + "EnumerateValue doesn't handle Metadata!"); > > // Check to see if it's already in! > unsigned&ValueID = ValueMap[V]; > @@ -370,6 +414,7 @@ > void ValueEnumerator::incorporateFunction(const Function&F) { > InstructionCount = 0; > NumModuleValues = Values.size(); > + NumModuleMDValues = MDValues.size(); > > // Adding function arguments to the value table. > for (Function::const_arg_iterator I = F.arg_begin(), E = F.arg_end(); > @@ -412,6 +457,15 @@ > // Enumerate metadata after the instructions they might refer to. > FnLocalMDVector.push_back(MD); > } > + > + SmallVector, 8> MDs; > + I->getAllMetadataOtherThanDebugLoc(MDs); > + for (unsigned i = 0, e = MDs.size(); i != e; ++i) { > + MDNode *N = MDs[i].second; > + if (N->isFunctionLocal()&& N->getFunction()) > + FnLocalMDVector.push_back(N); > + } > + > if (!I->getType()->isVoidTy()) > EnumerateValue(I); > } > @@ -419,17 +473,20 @@ > > // Add all of the function-local metadata. > for (unsigned i = 0, e = FnLocalMDVector.size(); i != e; ++i) > - EnumerateOperandType(FnLocalMDVector[i]); > + EnumerateFunctionLocalMetadata(FnLocalMDVector[i]); > } > > void ValueEnumerator::purgeFunction() { > /// Remove purged values from the ValueMap. > for (unsigned i = NumModuleValues, e = Values.size(); i != e; ++i) > ValueMap.erase(Values[i].first); > + for (unsigned i = NumModuleMDValues, e = MDValues.size(); i != e; ++i) > + MDValueMap.erase(MDValues[i].first); > for (unsigned i = 0, e = BasicBlocks.size(); i != e; ++i) > ValueMap.erase(BasicBlocks[i]); > > Values.resize(NumModuleValues); > + MDValues.resize(NumModuleMDValues); > BasicBlocks.clear(); > } > > > Modified: llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.h?rev=111895&r1=111894&r2=111895&view=diff > ============================================================================== > --- llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.h (original) > +++ llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.h Mon Aug 23 21:24:03 2010 > @@ -72,6 +72,11 @@ > /// When a function is incorporated, this is the size of the Values list > /// before incorporation. > unsigned NumModuleValues; > + > + /// When a function is incorporated, this is the size of the MDValues list > + /// before incorporation. > + unsigned NumModuleMDValues; > + > unsigned FirstFuncConstantID; > unsigned FirstInstID; > > @@ -132,7 +137,9 @@ > private: > void OptimizeConstants(unsigned CstStart, unsigned CstEnd); > > + void EnumerateMDNodeOperands(const MDNode *N); > void EnumerateMetadata(const Value *MD); > + void EnumerateFunctionLocalMetadata(const MDNode *N); > void EnumerateNamedMDNode(const NamedMDNode *NMD); > void EnumerateValue(const Value *V); > void EnumerateType(const Type *T); > > Modified: llvm/trunk/test/Feature/metadata.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Feature/metadata.ll?rev=111895&r1=111894&r2=111895&view=diff > ============================================================================== > --- llvm/trunk/test/Feature/metadata.ll (original) > +++ llvm/trunk/test/Feature/metadata.ll Mon Aug 23 21:24:03 2010 > @@ -1,9 +1,11 @@ > ; RUN: llvm-as< %s | llvm-dis | llvm-as | llvm-dis > ; PR7105 > > -define void @foo() { > +define void @foo(i32 %x) { > call void @llvm.zonk(metadata !1, i64 0, metadata !1) > - ret void > + store i32 0, i32* null, !whatever !0, !whatever_else !{}, !more !{metadata !"hello"} > + store i32 0, i32* null, !whatever !{i32 %x, metadata !"hello", metadata !1, metadata !{}, metadata !2} > + ret void, !whatever !{i32 %x} > } > > declare void @llvm.zonk(metadata, i64, metadata) nounwind readnone > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From resistor at mac.com Tue Aug 24 02:55:44 2010 From: resistor at mac.com (Owen Anderson) Date: Tue, 24 Aug 2010 07:55:44 -0000 Subject: [llvm-commits] [llvm] r111906 - /llvm/trunk/lib/Analysis/LazyValueInfo.cpp Message-ID: <20100824075544.E88752A6C12D@llvm.org> Author: resistor Date: Tue Aug 24 02:55:44 2010 New Revision: 111906 URL: http://llvm.org/viewvc/llvm-project?rev=111906&view=rev Log: Don't assume that all constants with integer types are ConstantInts. Modified: llvm/trunk/lib/Analysis/LazyValueInfo.cpp Modified: llvm/trunk/lib/Analysis/LazyValueInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/LazyValueInfo.cpp?rev=111906&r1=111905&r2=111906&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/LazyValueInfo.cpp (original) +++ llvm/trunk/lib/Analysis/LazyValueInfo.cpp Tue Aug 24 02:55:44 2010 @@ -216,6 +216,8 @@ return markOverdefined(); else return markConstantRange(NewR); + } else if (!isUndefined()) { + return markOverdefined(); } assert(isUndefined() && "Unexpected lattice"); @@ -541,7 +543,12 @@ ConstantRange RHSRange(1); const IntegerType *ResultTy = cast(BBI->getType()); if (isa(BBI)) { - RHS = cast(BBI->getOperand(1)); + RHS = dyn_cast(BBI->getOperand(1)); + if (!RHS) { + Result.markOverdefined(); + return Result; + } + RHSRange = ConstantRange(RHS->getValue(), RHS->getValue()+1); } @@ -842,7 +849,9 @@ } if (Result.isConstantRange()) { - ConstantInt *CI = cast(C); + ConstantInt *CI = dyn_cast(C); + if (!CI) return Unknown; + ConstantRange CR = Result.getConstantRange(); if (Pred == ICmpInst::ICMP_EQ) { if (!CR.contains(CI->getValue())) From rjmccall at apple.com Tue Aug 24 04:16:51 2010 From: rjmccall at apple.com (John McCall) Date: Tue, 24 Aug 2010 09:16:51 -0000 Subject: [llvm-commits] [llvm] r111909 - in /llvm/trunk/tools: CMakeLists.txt Makefile llvm-diff/DifferenceEngine.cpp llvm-diff/llvm-diff.cpp Message-ID: <20100824091651.E68032A6C12C@llvm.org> Author: rjmccall Date: Tue Aug 24 04:16:51 2010 New Revision: 111909 URL: http://llvm.org/viewvc/llvm-project?rev=111909&view=rev Log: Check in a couple of changes that I apparently never committed: - teach DifferenceEngine to unify successors of calls and invokes in certain circumstances - basic blocks actually don't have their own numbering; did that change? - add llvm-diff to the Makefile and CMake build systems Modified: llvm/trunk/tools/CMakeLists.txt llvm/trunk/tools/Makefile llvm/trunk/tools/llvm-diff/DifferenceEngine.cpp llvm/trunk/tools/llvm-diff/llvm-diff.cpp Modified: llvm/trunk/tools/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/CMakeLists.txt?rev=111909&r1=111908&r2=111909&view=diff ============================================================================== --- llvm/trunk/tools/CMakeLists.txt (original) +++ llvm/trunk/tools/CMakeLists.txt Tue Aug 24 04:16:51 2010 @@ -27,6 +27,7 @@ add_subdirectory(lli) add_subdirectory(llvm-extract) +add_subdirectory(llvm-diff) add_subdirectory(bugpoint) add_subdirectory(bugpoint-passes) Modified: llvm/trunk/tools/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/Makefile?rev=111909&r1=111908&r2=111909&view=diff ============================================================================== --- llvm/trunk/tools/Makefile (original) +++ llvm/trunk/tools/Makefile Tue Aug 24 04:16:51 2010 @@ -21,7 +21,7 @@ llvm-ld llvm-prof llvm-link \ lli llvm-extract llvm-mc \ bugpoint llvm-bcanalyzer llvm-stub \ - llvmc + llvmc llvm-diff # Let users override the set of tools to build from the command line. ifdef ONLY_TOOLS Modified: llvm/trunk/tools/llvm-diff/DifferenceEngine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-diff/DifferenceEngine.cpp?rev=111909&r1=111908&r2=111909&view=diff ============================================================================== --- llvm/trunk/tools/llvm-diff/DifferenceEngine.cpp (original) +++ llvm/trunk/tools/llvm-diff/DifferenceEngine.cpp Tue Aug 24 04:16:51 2010 @@ -590,6 +590,39 @@ unify(&*LI, &*RI); ++LI, ++RI; } + + // If the terminators have different kinds, but one is an invoke and the + // other is an unconditional branch immediately following a call, unify + // the results and the destinations. + TerminatorInst *LTerm = LStart->getParent()->getTerminator(); + TerminatorInst *RTerm = RStart->getParent()->getTerminator(); + if (isa(LTerm) && isa(RTerm)) { + if (cast(LTerm)->isConditional()) return; + BasicBlock::iterator I = LTerm; + if (I == LStart->getParent()->begin()) return; + --I; + if (!isa(*I)) return; + CallInst *LCall = cast(&*I); + InvokeInst *RInvoke = cast(RTerm); + if (!equivalentAsOperands(LCall->getCalledValue(), RInvoke->getCalledValue())) + return; + if (!LCall->use_empty()) + Values[LCall] = RInvoke; + tryUnify(LTerm->getSuccessor(0), RInvoke->getNormalDest()); + } else if (isa(LTerm) && isa(RTerm)) { + if (cast(RTerm)->isConditional()) return; + BasicBlock::iterator I = RTerm; + if (I == RStart->getParent()->begin()) return; + --I; + if (!isa(*I)) return; + CallInst *RCall = cast(I); + InvokeInst *LInvoke = cast(LTerm); + if (!equivalentAsOperands(LInvoke->getCalledValue(), RCall->getCalledValue())) + return; + if (!LInvoke->use_empty()) + Values[LInvoke] = RCall; + tryUnify(LInvoke->getNormalDest(), RTerm->getSuccessor(0)); + } } } Modified: llvm/trunk/tools/llvm-diff/llvm-diff.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-diff/llvm-diff.cpp?rev=111909&r1=111908&r2=111909&view=diff ============================================================================== --- llvm/trunk/tools/llvm-diff/llvm-diff.cpp (original) +++ llvm/trunk/tools/llvm-diff/llvm-diff.cpp Tue Aug 24 04:16:51 2010 @@ -75,7 +75,6 @@ }; void ComputeNumbering(Function *F, DenseMap &Numbering) { - unsigned BBN = 0; unsigned IN = 0; // Arguments get the first numbers. @@ -86,9 +85,8 @@ // Walk the basic blocks in order. for (Function::iterator FI = F->begin(), FE = F->end(); FI != FE; ++FI) { - // Basic blocks have their own 'namespace'. if (!FI->hasName()) - Numbering[&*FI] = BBN++; + Numbering[&*FI] = IN++; // Walk the instructions in order. for (BasicBlock::iterator BI = FI->begin(), BE = FI->end(); BI != BE; ++BI) From geek4civic at gmail.com Tue Aug 24 04:56:09 2010 From: geek4civic at gmail.com (NAKAMURA Takumi) Date: Tue, 24 Aug 2010 18:56:09 +0900 Subject: [llvm-commits] [PATCH] Win32's Hybrid path separator in argv[0] should be accepted to bugpoint In-Reply-To: References: Message-ID: Hello, Chris, Okay, I made a simplified patch, referred to ToolRunner.cpp, confirmed on cygwin, mingw and ppc-f12. I am worried whether 3rd parameter of llvm::FindExecutable() would be valid or not. I don't have any environments 3rd parameter is effective on. I will wait for sys::Path 2.0 XD thank you, ... Takumi 2010/8/24 Chris Lattner : > > On Aug 23, 2010, at 7:37 AM, NAKAMURA Takumi wrote: > >> Hello guys, >> >> I saw argv[0], as below, with mingw-configured Python/w32 lit. >> >> ? ?"c:/path/to/build/Release+Asserts/bin\bugpoint.exe" >> >> Bugpoint assumes path separator consists only with '/' >> to extract directory as "c:/path/to/build/Release+Asserts". (w/o "bin") >> >> My patch, attached, canonicalize BugDriver::ToolName(==argv[0]) >> with llvm::sys::Path. >> confirmed on cygwin and ppc-f12. >> >> Please take a look into my patch, thank you. > > This patch looks functionally fine, but I'd prefer if you could change OptimizerDriver.cpp to use sys::path locally, instead of changing the BugDriver class to contain a sys::Path. ?This will reduce the amount of change, and will make it easier when we eventually eliminate sys::Path in the future. > > -Chris -------------- next part -------------- diff --git a/tools/bugpoint/OptimizerDriver.cpp b/tools/bugpoint/OptimizerDriver.cpp index ffd4099..6b360a6 100644 --- a/tools/bugpoint/OptimizerDriver.cpp +++ b/tools/bugpoint/OptimizerDriver.cpp @@ -27,6 +27,7 @@ #include "llvm/Target/TargetData.h" #include "llvm/Support/FileUtilities.h" #include "llvm/Support/CommandLine.h" +#include "llvm/Support/SystemUtils.h" #include "llvm/Support/Debug.h" #include "llvm/Support/raw_ostream.h" #include "llvm/System/Path.h" @@ -138,16 +139,8 @@ bool BugDriver::runPasses(Module *Program, // setup the child process' arguments SmallVector Args; - std::string Opt; - llvm::StringRef TN(ToolName); - if (TN.find('/') == llvm::StringRef::npos) { - Opt = "opt"; - } else { - std::pair P = TN.rsplit('/'); - Opt = P.first.str() + "/" + "opt"; - } - - sys::Path tool = sys::Program::FindProgramByName(Opt); + sys::Path tool = FindExecutable("opt", getToolName(), (void*)"opt"); + std::string Opt = tool.str(); if (UseValgrind) { Args.push_back("valgrind"); Args.push_back("--error-exitcode=1"); From nicolas.geoffray at gmail.com Tue Aug 24 05:58:26 2010 From: nicolas.geoffray at gmail.com (nicolas geoffray) Date: Tue, 24 Aug 2010 12:58:26 +0200 Subject: [llvm-commits] JIT: Emitting a debug location after an instruction In-Reply-To: References: Message-ID: You are right. My changes would not work (the test I had was too simple). So I should probably hook that up with the GC. Sounds fun! Thanks Jeffrey for the explanations. Nicolas On Tue, Aug 24, 2010 at 4:08 AM, Jeffrey Yasskin wrote: > On Mon, Aug 23, 2010 at 9:37 PM, nicolas geoffray > wrote: > > > > > > On Mon, Aug 23, 2010 at 8:57 PM, Jeffrey Yasskin > > wrote: > >> > >> I'm not sure processDebugLoc does what you need it to, even with your > >> changes. It only records an address when the DebugLoc changes, and > >> that's not guaranteed to happen exactly on the call > >> MachineInstruction. (Unless you've done something to ensure it does?) > > > > Each call instruction and only call instructions have metadata associated > to > > it. So I am sure emitting the debug location after emitting the call > > instructions work for my case. > > A CallInst in the IR expands to several MachineInstructions, all of > which have the same DebugLoc (and which may be rearranged/interleaved > with other DebugLoc'ed MIs by the SelectionDAG (ScheduleDAG?)). For > example, the following IR: > > @.str = private constant [12 x i8] c"Hello World\00" ; <[12 x i8]*> > [#uses=1] > > define i32 @main() nounwind { > entry: > %call = tail call i32 @puts(i8* getelementptr inbounds ([12 x i8]* > @.str, i32 0, i32 0)) nounwind, !dbg !6 ; [#uses=0] > ret i32 0, !dbg !8 > } > > declare i32 @puts(i8* nocapture) nounwind > > !llvm.dbg.sp = !{!0} > > !0 = metadata !{i32 524334, i32 0, metadata !1, metadata !"main", > metadata !"main", metadata !"main", metadata !1, i32 2, metadata !3, > i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, null} ; [ > DW_TAG_subprogram ] > !1 = metadata !{i32 524329, metadata !"test.c", metadata > !"/Users/jyasskin/tmp", metadata !2} ; [ DW_TAG_file_type ] > !2 = metadata !{i32 524305, i32 0, i32 12, metadata !"test.c", > metadata !"/Users/jyasskin/tmp", metadata !"clang 2.8", i1 true, i1 > true, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] > !3 = metadata !{i32 524309, metadata !1, metadata !"", metadata !1, > i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ > DW_TAG_subroutine_type ] > !4 = metadata !{metadata !5} > !5 = metadata !{i32 524324, metadata !1, metadata !"int", metadata !1, > i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] > !6 = metadata !{i32 3, i32 3, metadata !7, null} > !7 = metadata !{i32 524299, metadata !0, i32 2, i32 12} ; [ > DW_TAG_lexical_block ] > !8 = metadata !{i32 4, i32 1, metadata !7, null} > > > Produces the following MachineFunction: > > BB#0: derived from LLVM BB %entry > %ESP = SUB32ri8 %ESP, 12, %EFLAGS; dbg:test.c:3:3 > MOV32mi %ESP, 1, %reg0, 0, %reg0, ; mem:ST4[Stack] > dbg:test.c:3:3 > CALLpcrel32 , %EAX, %ESP, ...; > dbg:test.c:3:3 > %EAX = MOV32r0 %EFLAGS > %ESP = ADD32ri8 %ESP, 12, %EFLAGS; dbg:test.c:4:1 > RET %EAX; dbg:test.c:4:1 > > and saves addresses in processDebugLoc at the following > MachineInstructions: > > %ESP = SUB32ri8 %ESP, 12, %EFLAGS; dbg:test.c:3:3 > %ESP = ADD32ri8 %ESP, 12, %EFLAGS; dbg:test.c:4:1 > > That is, not the call instruction. So, I'm not sure why this is > working for you... > > >> Do you have a unit test that shows this works in all cases? > > > > Not sure about the "all cases", but at least it is working as intended > for > > me and these hooks (emitting before or after) were already present before > my > > changes. > > > >> > >> Mapping return addresses to metadata seems like more of a job for the > >> GC system, but that's not implemented for the JIT, so I can't very > >> well say to use it instead. :-/ > > > > Indeed, doing it in the GC system would also work, but the changes would > be > > way less straightforward than this simple change in the JITemitter. > > Nicolas > > _______________________________________________ > > llvm-commits mailing list > > llvm-commits at cs.uiuc.edu > > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > > > > -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20100824/eb940c3b/attachment.html From kalle.raiskila at nokia.com Tue Aug 24 06:05:51 2010 From: kalle.raiskila at nokia.com (Kalle Raiskila) Date: Tue, 24 Aug 2010 11:05:51 -0000 Subject: [llvm-commits] [llvm] r111910 - in /llvm/trunk/lib/Target/CellSPU: SPUISelLowering.cpp SPUISelLowering.h SPUNodes.td Message-ID: <20100824110551.9F1052A6C12C@llvm.org> Author: kraiskil Date: Tue Aug 24 06:05:51 2010 New Revision: 111910 URL: http://llvm.org/viewvc/llvm-project?rev=111910&view=rev Log: Remove some dead code from SPU BE that remained from 64bit vector support. Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp llvm/trunk/lib/Target/CellSPU/SPUISelLowering.h llvm/trunk/lib/Target/CellSPU/SPUNodes.td Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp?rev=111910&r1=111909&r2=111910&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Tue Aug 24 06:05:51 2010 @@ -514,8 +514,6 @@ node_names[(unsigned) SPUISD::ADD64_MARKER] = "SPUISD::ADD64_MARKER"; node_names[(unsigned) SPUISD::SUB64_MARKER] = "SPUISD::SUB64_MARKER"; node_names[(unsigned) SPUISD::MUL64_MARKER] = "SPUISD::MUL64_MARKER"; - node_names[(unsigned) SPUISD::HALF2VEC] = "SPUISD::HALF2VEC"; - node_names[(unsigned) SPUISD::VEC2HALF] = "SPUISD::VEC2HALF"; } std::map::iterator i = node_names.find(Opcode); @@ -736,14 +734,12 @@ EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); DebugLoc dl = Op.getDebugLoc(); unsigned alignment = SN->getAlignment(); - const bool isVec = VT.isVector(); - EVT eltTy = isVec ? VT.getVectorElementType(): VT; switch (SN->getAddressingMode()) { case ISD::UNINDEXED: { // The vector type we really want to load from the 16-byte chunk. EVT vecVT = EVT::getVectorVT(*DAG.getContext(), - eltTy, (128 / eltTy.getSizeInBits())); + VT, (128 / VT.getSizeInBits())); SDValue alignLoadVec; SDValue basePtr = SN->getBasePtr(); @@ -846,19 +842,11 @@ } #endif - SDValue insertEltOp; - SDValue vectorizeOp; - if (isVec) - { - // FIXME: this works only if the vector is 64bit! - insertEltOp = DAG.getNode(SPUISD::SHUFFLE_MASK, dl, MVT::v2i64, insertEltOffs); - vectorizeOp = DAG.getNode(SPUISD::HALF2VEC, dl, vecVT, theValue); - } - else - { - insertEltOp = DAG.getNode(SPUISD::SHUFFLE_MASK, dl, vecVT, insertEltOffs); - vectorizeOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, vecVT, theValue); - } + SDValue insertEltOp = DAG.getNode(SPUISD::SHUFFLE_MASK, dl, vecVT, + insertEltOffs); + SDValue vectorizeOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, vecVT, + theValue); + result = DAG.getNode(SPUISD::SHUFB, dl, vecVT, vectorizeOp, alignLoadVec, DAG.getNode(ISD::BIT_CONVERT, dl, Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.h?rev=111910&r1=111909&r2=111910&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.h (original) +++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.h Tue Aug 24 06:05:51 2010 @@ -54,8 +54,6 @@ ADD64_MARKER, ///< i64 addition marker SUB64_MARKER, ///< i64 subtraction marker MUL64_MARKER, ///< i64 multiply marker - HALF2VEC, ///< Promote 64 bit vector to 128 bits - VEC2HALF, ///< Extract first 64 bits from 128 bit vector LAST_SPUISD ///< Last user-defined instruction }; } Modified: llvm/trunk/lib/Target/CellSPU/SPUNodes.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUNodes.td?rev=111910&r1=111909&r2=111910&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUNodes.td (original) +++ llvm/trunk/lib/Target/CellSPU/SPUNodes.td Tue Aug 24 06:05:51 2010 @@ -117,12 +117,6 @@ def SPU_vec_demote : SDTypeProfile<1, 1, []>; def SPUvec2prefslot: SDNode<"SPUISD::VEC2PREFSLOT", SPU_vec_demote, []>; -def SPU_half_2_vec : SDTypeProfile<1, 1, []>; -def SPUhalf2vec: SDNode<"SPUISD::HALF2VEC", SPU_half_2_vec, []>; - -def SPU_vec_2_half : SDTypeProfile<1, 1, []>; -def SPUvec2half: SDNode<"SPUISD::VEC2HALF", SPU_vec_2_half, []>; - // Address high and low components, used for [r+r] type addressing def SPUhi : SDNode<"SPUISD::Hi", SDTIntBinOp, []>; def SPUlo : SDNode<"SPUISD::Lo", SDTIntBinOp, []>; From kalle.raiskila at nokia.com Tue Aug 24 06:50:48 2010 From: kalle.raiskila at nokia.com (Kalle Raiskila) Date: Tue, 24 Aug 2010 11:50:48 -0000 Subject: [llvm-commits] [llvm] r111911 - in /llvm/trunk: lib/Target/CellSPU/SPUISelLowering.cpp test/CodeGen/CellSPU/call.ll Message-ID: <20100824115048.60C1F2A6C12C@llvm.org> Author: kraiskil Date: Tue Aug 24 06:50:48 2010 New Revision: 111911 URL: http://llvm.org/viewvc/llvm-project?rev=111911&view=rev Log: Fix SPU BE to use all the available return registers. llc used to assert on the added testcase. Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp llvm/trunk/test/CodeGen/CellSPU/call.ll Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp?rev=111911&r1=111910&r2=111911&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Tue Aug 24 06:50:48 2010 @@ -1324,41 +1324,23 @@ if (Ins.empty()) return Chain; + // Now handle the return value(s) + SmallVector RVLocs; + CCState CCRetInfo(CallConv, isVarArg, getTargetMachine(), + RVLocs, *DAG.getContext()); + CCRetInfo.AnalyzeCallResult(Ins, CCC_SPU); + + // If the call has results, copy the values out of the ret val registers. - switch (Ins[0].VT.getSimpleVT().SimpleTy) { - default: llvm_unreachable("Unexpected ret value!"); - case MVT::Other: break; - case MVT::i32: - if (Ins.size() > 1 && Ins[1].VT == MVT::i32) { - Chain = DAG.getCopyFromReg(Chain, dl, SPU::R4, - MVT::i32, InFlag).getValue(1); - InVals.push_back(Chain.getValue(0)); - Chain = DAG.getCopyFromReg(Chain, dl, SPU::R3, MVT::i32, - Chain.getValue(2)).getValue(1); - InVals.push_back(Chain.getValue(0)); - } else { - Chain = DAG.getCopyFromReg(Chain, dl, SPU::R3, MVT::i32, - InFlag).getValue(1); - InVals.push_back(Chain.getValue(0)); - } - break; - case MVT::i8: - case MVT::i16: - case MVT::i64: - case MVT::i128: - case MVT::f32: - case MVT::f64: - case MVT::v2f64: - case MVT::v2i64: - case MVT::v4f32: - case MVT::v4i32: - case MVT::v8i16: - case MVT::v16i8: - Chain = DAG.getCopyFromReg(Chain, dl, SPU::R3, Ins[0].VT, - InFlag).getValue(1); - InVals.push_back(Chain.getValue(0)); - break; - } + for (unsigned i = 0; i != RVLocs.size(); ++i) { + CCValAssign VA = RVLocs[i]; + + SDValue Val = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), VA.getLocVT(), + InFlag); + Chain = Val.getValue(1); + InFlag = Val.getValue(2); + InVals.push_back(Val); + } return Chain; } Modified: llvm/trunk/test/CodeGen/CellSPU/call.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/call.ll?rev=111911&r1=111910&r2=111911&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/CellSPU/call.ll (original) +++ llvm/trunk/test/CodeGen/CellSPU/call.ll Tue Aug 24 06:50:48 2010 @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=cellspu -regalloc=linearscan > %t1.s ; RUN: grep brsl %t1.s | count 1 -; RUN: grep brasl %t1.s | count 1 -; RUN: grep stqd %t1.s | count 80 +; RUN: grep brasl %t1.s | count 2 +; RUN: grep stqd %t1.s | count 82 ; RUN: llc < %s -march=cellspu | FileCheck %s target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128" @@ -29,3 +29,25 @@ entry: ret i32 0 } + +; check that struct is passed in r3-> +; assert this by changing the second field in the struct +%0 = type { i32, i32, i32 } +declare %0 @callee() +define %0 @test_structret() +{ +;CHECK: stqd $lr, 16($sp) +;CHECK: stqd $sp, -48($sp) +;CHECK: ai $sp, $sp, -48 +;CHECK: brasl $lr, callee + %rv = call %0 @callee() +;CHECK: ai $4, $4, 1 +;CHECK: lqd $lr, 64($sp) +;CHECK: ai $sp, $sp, 48 +;CHECK: bi $lr + %oldval = extractvalue %0 %rv, 1 + %newval = add i32 %oldval,1 + %newrv = insertvalue %0 %rv, i32 %newval, 1 + ret %0 %newrv +} + From dirty at apple.com Tue Aug 24 07:03:51 2010 From: dirty at apple.com (Cameron Esfahani) Date: Tue, 24 Aug 2010 05:03:51 -0700 Subject: [llvm-commits] [PATCH] Add support for copying between VR128/VR64 and GR64 Message-ID: <81A6750F-8ABC-4EB2-B695-D2FB9B03D1CC@apple.com> Attached is a patch based on subversion revision 111911 that attempts to fix two problems I've seen while working on Win64 var args. According to Microsoft, if you're passing parameters in XMM registers to a var arg function, they need to be copied to the integer register they share the same slot with. When I added that functionality, it emerged that there was no support for copying from VR128/VR64 to GR64 -------------- next part -------------- A non-text attachment was scrubbed... Name: llvm.patch Type: application/octet-stream Size: 2672 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20100824/dbda1c78/attachment.obj -------------- next part -------------- Cameron Esfahani dirty at apple.com "Even paranoids have enemies." Henry Kissinger From jyasskin at google.com Tue Aug 24 07:10:15 2010 From: jyasskin at google.com (Jeffrey Yasskin) Date: Tue, 24 Aug 2010 13:10:15 +0100 Subject: [llvm-commits] JIT: Emitting a debug location after an instruction In-Reply-To: References: Message-ID: No problem. Thanks for working on this! On Tue, Aug 24, 2010 at 11:58 AM, nicolas geoffray wrote: > You are right. My changes would not work (the test I had was too simple). > So I should probably hook that up with the GC. Sounds fun! > Thanks Jeffrey for the explanations. > Nicolas > > On Tue, Aug 24, 2010 at 4:08 AM, Jeffrey Yasskin > wrote: >> >> On Mon, Aug 23, 2010 at 9:37 PM, nicolas geoffray >> wrote: >> > >> > >> > On Mon, Aug 23, 2010 at 8:57 PM, Jeffrey Yasskin >> > wrote: >> >> >> >> I'm not sure processDebugLoc does what you need it to, even with your >> >> changes. It only records an address when the DebugLoc changes, and >> >> that's not guaranteed to happen exactly on the call >> >> MachineInstruction. (Unless you've done something to ensure it does?) >> > >> > Each call instruction and only call instructions have metadata >> > associated to >> > it. So I am sure emitting the debug location after emitting the call >> > instructions work for my case. >> >> A CallInst in the IR expands to several MachineInstructions, all of >> which have the same DebugLoc (and which may be rearranged/interleaved >> with other DebugLoc'ed MIs by the SelectionDAG (ScheduleDAG?)). For >> example, the following IR: >> >> @.str = private constant [12 x i8] c"Hello World\00" ; <[12 x i8]*> >> [#uses=1] >> >> define i32 @main() nounwind { >> entry: >> ?%call = tail call i32 @puts(i8* getelementptr inbounds ([12 x i8]* >> @.str, i32 0, i32 0)) nounwind, !dbg !6 ; [#uses=0] >> ?ret i32 0, !dbg !8 >> } >> >> declare i32 @puts(i8* nocapture) nounwind >> >> !llvm.dbg.sp = !{!0} >> >> !0 = metadata !{i32 524334, i32 0, metadata !1, metadata !"main", >> metadata !"main", metadata !"main", metadata !1, i32 2, metadata !3, >> i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, null} ; [ >> DW_TAG_subprogram ] >> !1 = metadata !{i32 524329, metadata !"test.c", metadata >> !"/Users/jyasskin/tmp", metadata !2} ; [ DW_TAG_file_type ] >> !2 = metadata !{i32 524305, i32 0, i32 12, metadata !"test.c", >> metadata !"/Users/jyasskin/tmp", metadata !"clang 2.8", i1 true, i1 >> true, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] >> !3 = metadata !{i32 524309, metadata !1, metadata !"", metadata !1, >> i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ >> DW_TAG_subroutine_type ] >> !4 = metadata !{metadata !5} >> !5 = metadata !{i32 524324, metadata !1, metadata !"int", metadata !1, >> i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] >> !6 = metadata !{i32 3, i32 3, metadata !7, null} >> !7 = metadata !{i32 524299, metadata !0, i32 2, i32 12} ; [ >> DW_TAG_lexical_block ] >> !8 = metadata !{i32 4, i32 1, metadata !7, null} >> >> >> Produces the following MachineFunction: >> >> BB#0: derived from LLVM BB %entry >> ? ? ? ?%ESP = SUB32ri8 %ESP, 12, %EFLAGS; >> dbg:test.c:3:3 >> ? ? ? ?MOV32mi %ESP, 1, %reg0, 0, %reg0, ; mem:ST4[Stack] >> dbg:test.c:3:3 >> ? ? ? ?CALLpcrel32 , %EAX, %ESP, ...; >> dbg:test.c:3:3 >> ? ? ? ?%EAX = MOV32r0 %EFLAGS >> ? ? ? ?%ESP = ADD32ri8 %ESP, 12, %EFLAGS; >> dbg:test.c:4:1 >> ? ? ? ?RET %EAX; dbg:test.c:4:1 >> >> and saves addresses in processDebugLoc at the following >> MachineInstructions: >> >> ?%ESP = SUB32ri8 %ESP, 12, %EFLAGS; dbg:test.c:3:3 >> ?%ESP = ADD32ri8 %ESP, 12, %EFLAGS; dbg:test.c:4:1 >> >> That is, not the call instruction. So, I'm not sure why this is >> working for you... >> >> >> Do you have a unit test that shows this works in all cases? >> > >> > Not sure about the "all cases", but at least it is working as intended >> > for >> > me and these hooks (emitting before or after) were already present >> > before my >> > changes. >> > >> >> >> >> Mapping return addresses to metadata seems like more of a job for the >> >> GC system, but that's not implemented for the JIT, so I can't very >> >> well say to use it instead. :-/ >> > >> > Indeed, doing it in the GC system would also work, but the changes would >> > be >> > way less straightforward than this simple change in the JITemitter. >> > Nicolas >> > _______________________________________________ >> > llvm-commits mailing list >> > llvm-commits at cs.uiuc.edu >> > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >> > >> > > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > From gohman at apple.com Tue Aug 24 09:18:32 2010 From: gohman at apple.com (Dan Gohman) Date: Tue, 24 Aug 2010 07:18:32 -0700 Subject: [llvm-commits] [llvm] r111895 - in /llvm/trunk: lib/AsmParser/LLParser.cpp lib/AsmParser/LLParser.h lib/Bitcode/Writer/ValueEnumerator.cpp lib/Bitcode/Writer/ValueEnumerator.h test/Feature/metadata.ll In-Reply-To: <4C737660.4010309@mxc.ca> References: <20100824022403.E65C92A6C12C@llvm.org> <4C737660.4010309@mxc.ca> Message-ID: <50DD89F9-D5B3-486F-9A5F-671737152852@apple.com> On Aug 24, 2010, at 12:36 AM, Nick Lewycky wrote: > Dan Gohman wrote: >> Author: djg >> Date: Mon Aug 23 21:24:03 2010 >> New Revision: 111895 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=111895&view=rev >> Log: >> Extend function-local metadata to be usable as attachments. > > Dan, does this work with existing .bc files? It's not immediately obvious to me whether this will affect the numbering used for metadata which needs to match the numbering used when writing them. The bitcode reader didn't change here, so it's unlikely to have become backwards-incompatible here. Dan > > Nick > >> Modified: >> llvm/trunk/lib/AsmParser/LLParser.cpp >> llvm/trunk/lib/AsmParser/LLParser.h >> llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp >> llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.h >> llvm/trunk/test/Feature/metadata.ll From gohman at apple.com Tue Aug 24 09:31:06 2010 From: gohman at apple.com (Dan Gohman) Date: Tue, 24 Aug 2010 14:31:06 -0000 Subject: [llvm-commits] [llvm] r111913 - /llvm/trunk/lib/AsmParser/LLParser.h Message-ID: <20100824143106.989582A6C12C@llvm.org> Author: djg Date: Tue Aug 24 09:31:06 2010 New Revision: 111913 URL: http://llvm.org/viewvc/llvm-project?rev=111913&view=rev Log: Add a comment explaining why this code is more complex than it initially seems it should require. Modified: llvm/trunk/lib/AsmParser/LLParser.h Modified: llvm/trunk/lib/AsmParser/LLParser.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/LLParser.h?rev=111913&r1=111912&r2=111913&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/LLParser.h (original) +++ llvm/trunk/lib/AsmParser/LLParser.h Tue Aug 24 09:31:06 2010 @@ -80,6 +80,14 @@ // Instruction metadata resolution. Each instruction can have a list of // MDRef info associated with them. + // + // The simpler approach of just creating temporary MDNodes and then calling + // RAUW on them when the definition is processed doesn't work because some + // instruction metadata kinds, such as dbg, get stored in the IR in an + // "optimized" format which doesn't participate in the normal value use + // lists. This means that RAUW doesn't work, even on temporary MDNodes + // which otherwise support RAUW. Instead, we defer resolving MDNode + // references until the definitions have been processed. struct MDRef { SMLoc Loc; unsigned MDKind, MDSlot; From gohman at apple.com Tue Aug 24 09:35:45 2010 From: gohman at apple.com (Dan Gohman) Date: Tue, 24 Aug 2010 14:35:45 -0000 Subject: [llvm-commits] [llvm] r111914 - /llvm/trunk/lib/AsmParser/LLParser.cpp Message-ID: <20100824143545.62AF42A6C12C@llvm.org> Author: djg Date: Tue Aug 24 09:35:45 2010 New Revision: 111914 URL: http://llvm.org/viewvc/llvm-project?rev=111914&view=rev Log: Add a comment explaining why this code doesn't just call ParseMetadataValue. Modified: llvm/trunk/lib/AsmParser/LLParser.cpp Modified: llvm/trunk/lib/AsmParser/LLParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/LLParser.cpp?rev=111914&r1=111913&r2=111914&view=diff ============================================================================== --- llvm/trunk/lib/AsmParser/LLParser.cpp (original) +++ llvm/trunk/lib/AsmParser/LLParser.cpp Tue Aug 24 09:35:45 2010 @@ -1134,6 +1134,10 @@ if (ParseToken(lltok::exclaim, "expected '!' here")) return true; + // This code is similar to that of ParseMetadataValue, however it needs to + // have special-case code for a forward reference; see the comments on + // ForwardRefInstMetadata for details. Also, MDStrings are not supported + // at the top level here. if (Lex.getKind() == lltok::lbrace) { ValID ID; if (ParseMetadataListValue(ID, PFS)) From gohman at apple.com Tue Aug 24 10:34:03 2010 From: gohman at apple.com (Dan Gohman) Date: Tue, 24 Aug 2010 15:34:03 -0000 Subject: [llvm-commits] [llvm] r111915 - /llvm/trunk/include/llvm/Metadata.h Message-ID: <20100824153403.F0B242A6C12C@llvm.org> Author: djg Date: Tue Aug 24 10:34:03 2010 New Revision: 111915 URL: http://llvm.org/viewvc/llvm-project?rev=111915&view=rev Log: MDNode, MDString, and NamedMDNode are not meant to be subclassed; make their protected members private. And remove an unnecessary explicit keyword. Modified: llvm/trunk/include/llvm/Metadata.h Modified: llvm/trunk/include/llvm/Metadata.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Metadata.h?rev=111915&r1=111914&r2=111915&view=diff ============================================================================== --- llvm/trunk/include/llvm/Metadata.h (original) +++ llvm/trunk/include/llvm/Metadata.h Tue Aug 24 10:34:03 2010 @@ -38,7 +38,6 @@ MDString(const MDString &); // DO NOT IMPLEMENT StringRef Str; -protected: explicit MDString(LLVMContext &C, StringRef S); public: @@ -111,9 +110,8 @@ void replaceOperand(MDNodeOperand *Op, Value *NewVal); ~MDNode(); -protected: - explicit MDNode(LLVMContext &C, Value *const *Vals, unsigned NumVals, - bool isFunctionLocal); + MDNode(LLVMContext &C, Value *const *Vals, unsigned NumVals, + bool isFunctionLocal); static MDNode *getMDNode(LLVMContext &C, Value *const *Vals, unsigned NumVals, FunctionLocalness FL, bool Insert = true); @@ -201,7 +199,6 @@ void setParent(Module *M) { Parent = M; } -protected: explicit NamedMDNode(const Twine &N); public: From hvdieren at elis.ugent.be Tue Aug 24 09:28:01 2010 From: hvdieren at elis.ugent.be (Hans Vandierendonck) Date: Tue, 24 Aug 2010 16:28:01 +0200 Subject: [llvm-commits] bug fix proposal Message-ID: <39F68BE0-3D08-4673-A842-4D05E3E82EB2@elis.ugent.be> Hi, The attached patch fixes a bug in lib/VMCore/Instructions.cpp, createMalloc() routine, where a BitCastInst is not inserted in any BasicBlock. Kind regards, Hans. -------------- next part -------------- A non-text attachment was scrubbed... Name: patch.insn_not_in_bb Type: application/octet-stream Size: 556 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20100824/703f4029/attachment.obj -------------- next part -------------- ==== Hans Vandierendonck Post-doctoral Fellow FWO Department of Electronics and Information Systems Ghent University http://www.elis.ugent.be/~hvdieren/ From gohman at apple.com Tue Aug 24 10:55:12 2010 From: gohman at apple.com (Dan Gohman) Date: Tue, 24 Aug 2010 15:55:12 -0000 Subject: [llvm-commits] [llvm] r111917 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/lsr-static-addr.ll Message-ID: <20100824155512.903202A6C12C@llvm.org> Author: djg Date: Tue Aug 24 10:55:12 2010 New Revision: 111917 URL: http://llvm.org/viewvc/llvm-project?rev=111917&view=rev Log: Fix X86's isLegalAddressingMode to recognize that static addresses need not be RIP-relative in small mode. Added: llvm/trunk/test/CodeGen/X86/lsr-static-addr.ll Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=111917&r1=111916&r2=111917&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Aug 24 10:55:12 2010 @@ -8171,6 +8171,7 @@ const Type *Ty) const { // X86 supports extremely general addressing modes. CodeModel::Model M = getTargetMachine().getCodeModel(); + Reloc::Model R = getTargetMachine().getRelocationModel(); // X86 allows a sign-extended 32-bit immediate field as a displacement. if (!X86::isOffsetSuitableForCodeModel(AM.BaseOffs, M, AM.BaseGV != NULL)) @@ -8190,7 +8191,8 @@ return false; // If lower 4G is not available, then we must use rip-relative addressing. - if (Subtarget->is64Bit() && (AM.BaseOffs || AM.Scale > 1)) + if ((M != CodeModel::Small || R != Reloc::Static) && + Subtarget->is64Bit() && (AM.BaseOffs || AM.Scale > 1)) return false; } Added: llvm/trunk/test/CodeGen/X86/lsr-static-addr.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/lsr-static-addr.ll?rev=111917&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/lsr-static-addr.ll (added) +++ llvm/trunk/test/CodeGen/X86/lsr-static-addr.ll Tue Aug 24 10:55:12 2010 @@ -0,0 +1,31 @@ +; RUN: llc -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -relocation-model=static -asm-verbose=false < %s | FileCheck %s + +; CHECK: xorl %eax, %eax +; CHECK: movsd .LCPI0_0(%rip), %xmm0 +; CHECK: align +; CHECK-NEXT: BB0_2: +; CHECK-NEXT: movsd A(,%rax,8) +; CHECK-NEXT: mulsd +; CHECK-NEXT: movsd +; CHECK-NEXT: incq %rax + + at A = external global [0 x double] + +define void @foo(i64 %n) nounwind { +entry: + %cmp5 = icmp sgt i64 %n, 0 + br i1 %cmp5, label %for.body, label %for.end + +for.body: + %i.06 = phi i64 [ %inc, %for.body ], [ 0, %entry ] + %arrayidx = getelementptr [0 x double]* @A, i64 0, i64 %i.06 + %tmp3 = load double* %arrayidx, align 8 + %mul = fmul double %tmp3, 2.300000e+00 + store double %mul, double* %arrayidx, align 8 + %inc = add nsw i64 %i.06, 1 + %exitcond = icmp eq i64 %inc, %n + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret void +} From nicholas at mxc.ca Tue Aug 24 12:04:53 2010 From: nicholas at mxc.ca (Nick Lewycky) Date: Tue, 24 Aug 2010 10:04:53 -0700 Subject: [llvm-commits] bug fix proposal In-Reply-To: <39F68BE0-3D08-4673-A842-4D05E3E82EB2@elis.ugent.be> References: <39F68BE0-3D08-4673-A842-4D05E3E82EB2@elis.ugent.be> Message-ID: <4C73FBB5.7080101@mxc.ca> Hans Vandierendonck wrote: > Hi, > > The attached patch fixes a bug in lib/VMCore/Instructions.cpp, > createMalloc() routine, where a BitCastInst is not inserted in any > BasicBlock. Did you run 'make check' after writing this patch? I saw a lot of failing unit tests that weren't failing before. I suspect you need to audit the callers of createMalloc and make sure they aren't re-inserting the resulting malloc, maybe? Nick From gohman at apple.com Tue Aug 24 12:10:10 2010 From: gohman at apple.com (Dan Gohman) Date: Tue, 24 Aug 2010 17:10:10 -0000 Subject: [llvm-commits] [llvm] r111922 - /llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp Message-ID: <20100824171010.EBFEE2A6C12C@llvm.org> Author: djg Date: Tue Aug 24 12:10:10 2010 New Revision: 111922 URL: http://llvm.org/viewvc/llvm-project?rev=111922&view=rev Log: MapValue support for MDNodes. This is similar to r109117, except that it avoids a lot of unnecessary cloning by avoiding remapping MDNode cycles when none of the nodes in the cycle actually need to be remapped. Also it uses the new temporary MDNode mechanism. Modified: llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp Modified: llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp?rev=111922&r1=111921&r2=111922&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp Tue Aug 24 12:10:10 2010 @@ -27,17 +27,36 @@ // NOTE: VMSlot can be invalidated by any reference to VM, which can grow the // DenseMap. This includes any recursive calls to MapValue. - // Global values and non-function-local metadata do not need to be seeded into - // the VM if they are using the identity mapping. - if (isa(V) || isa(V) || isa(V) || - (isa(V) && !cast(V)->isFunctionLocal())) + // Global values do not need to be seeded into the VM if they + // are using the identity mapping. + if (isa(V) || isa(V) || isa(V)) return VMSlot = const_cast(V); if (const MDNode *MD = dyn_cast(V)) { - SmallVector Elts; - for (unsigned i = 0, e = MD->getNumOperands(); i != e; ++i) - Elts.push_back(MD->getOperand(i) ? MapValue(MD->getOperand(i), VM) : 0); - return VM[V] = MDNode::get(V->getContext(), Elts.data(), Elts.size()); + // Start by assuming that we'll use the identity mapping. + VMSlot = const_cast(V); + + // Check all operands to see if any need to be remapped. + for (unsigned i = 0, e = MD->getNumOperands(); i != e; ++i) { + Value *OP = MD->getOperand(i); + if (!OP || MapValue(OP, VM) == OP) continue; + + // Ok, at least one operand needs remapping. + MDNode *Dummy = MDNode::getTemporary(V->getContext(), 0, 0); + VM[V] = Dummy; + SmallVector Elts; + Elts.reserve(MD->getNumOperands()); + for (i = 0; i != e; ++i) + Elts.push_back(MD->getOperand(i) ? + MapValue(MD->getOperand(i), VM) : 0); + MDNode *NewMD = MDNode::get(V->getContext(), Elts.data(), Elts.size()); + Dummy->replaceAllUsesWith(NewMD); + MDNode::deleteTemporary(Dummy); + return VM[V] = NewMD; + } + + // No operands needed remapping; keep the identity map. + return const_cast(V); } Constant *C = const_cast(dyn_cast(V)); From resistor at mac.com Tue Aug 24 12:21:18 2010 From: resistor at mac.com (Owen Anderson) Date: Tue, 24 Aug 2010 17:21:18 -0000 Subject: [llvm-commits] [llvm] r111923 - /llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp Message-ID: <20100824172118.AB65F2A6C12C@llvm.org> Author: resistor Date: Tue Aug 24 12:21:18 2010 New Revision: 111923 URL: http://llvm.org/viewvc/llvm-project?rev=111923&view=rev Log: Turn LVI on, previously detected failures should be fixed now. Modified: llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp Modified: llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp?rev=111923&r1=111922&r2=111923&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp Tue Aug 24 12:21:18 2010 @@ -47,7 +47,7 @@ static cl::opt EnableLVI("enable-jump-threading-lvi", cl::desc("Use LVI for jump threading"), - cl::init(false), + cl::init(true), cl::ReallyHidden); From wdietz2 at illinois.edu Tue Aug 24 12:23:53 2010 From: wdietz2 at illinois.edu (Will Dietz) Date: Tue, 24 Aug 2010 17:23:53 -0000 Subject: [llvm-commits] [poolalloc] r111924 - /poolalloc/trunk/test/dsa/regression/2010-07-16.CBU_MissingGraph.ll Message-ID: <20100824172353.876FC2A6C12C@llvm.org> Author: wdietz2 Date: Tue Aug 24 12:23:53 2010 New Revision: 111924 URL: http://llvm.org/viewvc/llvm-project?rev=111924&view=rev Log: Extend test to try with and without filtering. Fails both ways presently, but doesn't hurt to check both. Modified: poolalloc/trunk/test/dsa/regression/2010-07-16.CBU_MissingGraph.ll Modified: poolalloc/trunk/test/dsa/regression/2010-07-16.CBU_MissingGraph.ll URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/test/dsa/regression/2010-07-16.CBU_MissingGraph.ll?rev=111924&r1=111923&r2=111924&view=diff ============================================================================== --- poolalloc/trunk/test/dsa/regression/2010-07-16.CBU_MissingGraph.ll (original) +++ poolalloc/trunk/test/dsa/regression/2010-07-16.CBU_MissingGraph.ll Tue Aug 24 12:23:53 2010 @@ -1,7 +1,14 @@ ;This test presently fails because cbu isn't robust to callee's not being in ; the globals graph... which happens all the time--direct call's callees ; don't get entries, for example. +;--verify this works without filtering +;RUN: dsaopt %s -dsa-cbu -disable-output \ +;RUN: -dsa-no-filter-callcc=true \ +;RUN: -dsa-no-filter-vararg=true \ +;RUN: -dsa-no-filter-intfp=true ;RUN: dsaopt %s -dsa-cbu -disable-output +;--verify this works with filtering +;RUN: daopt %s -dsa-cbu -disable-output ; ModuleID = 'bugpoint-reduced-simplified.bc' target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target triple = "x86_64-apple-darwin10.4" From clattner at apple.com Tue Aug 24 12:33:35 2010 From: clattner at apple.com (Chris Lattner) Date: Tue, 24 Aug 2010 10:33:35 -0700 Subject: [llvm-commits] bug fix proposal In-Reply-To: <39F68BE0-3D08-4673-A842-4D05E3E82EB2@elis.ugent.be> References: <39F68BE0-3D08-4673-A842-4D05E3E82EB2@elis.ugent.be> Message-ID: <9C2980BC-7038-4533-AB51-1BED7585D873@apple.com> On Aug 24, 2010, at 7:28 AM, Hans Vandierendonck wrote: > Hi, > > The attached patch fixes a bug in lib/VMCore/Instructions.cpp, createMalloc() routine, where a BitCastInst is not inserted in any BasicBlock. This is not correct, because of an incredibly poor design of CreateMalloc: it looks like the "InsertAtEnd" version does not insert the final instruction into the specified block! This is terrible, but you'd need to fix the callers before this patch will work. -Chris From benny.kra at googlemail.com Tue Aug 24 12:34:39 2010 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Tue, 24 Aug 2010 17:34:39 -0000 Subject: [llvm-commits] [llvm] r111925 - /llvm/trunk/lib/MC/ELFObjectWriter.cpp Message-ID: <20100824173440.0583C2A6C12C@llvm.org> Author: d0k Date: Tue Aug 24 12:34:39 2010 New Revision: 111925 URL: http://llvm.org/viewvc/llvm-project?rev=111925&view=rev Log: Relocate against parent if the symbol is not in section or it's a common symbol, from Roman Divacky. Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=111925&r1=111924&r2=111925&view=diff ============================================================================== --- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original) +++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Tue Aug 24 12:34:39 2010 @@ -477,7 +477,8 @@ const MCSymbolData *Base = Asm.getAtom(Layout, &SD); if (Base) { - if (MCFragment *F = SD.getFragment()) { + MCFragment *F = SD.getFragment(); + if (F && (!Symbol->isInSection() || SD.isCommon())) { Index = F->getParent()->getOrdinal() + LocalSymbolData.size() + 1; Value += Layout.getSymbolAddress(&SD); } else From hvdieren at elis.ugent.be Tue Aug 24 12:37:16 2010 From: hvdieren at elis.ugent.be (Hans Vandierendonck) Date: Tue, 24 Aug 2010 19:37:16 +0200 Subject: [llvm-commits] bug fix proposal In-Reply-To: <4C73FBB5.7080101@mxc.ca> References: <39F68BE0-3D08-4673-A842-4D05E3E82EB2@elis.ugent.be> <4C73FBB5.7080101@mxc.ca> Message-ID: <69BEF77D-EF13-42C1-8602-1838B1F95F5E@elis.ugent.be> Hi, I admit, I did not check. My client code wrongfully assumes that the malloc is inserted by CreateMalloc(). But on the other hand, what is the rationale for correctly inserting in place all but the last of the created instructions (allocation size computation, call inst to malloc, cast inst)? And what is the rationale for doing things differently with InsertBefore semantics, i.e. all instructions are inserted? Is this an artifact remaining from the previously existing MallocInst? If so, would it be acceptable to change the semantics of CreateMalloc() to always insert all instructions at the location requested? Hans. On Aug 24, 2010, at 7:04 PM, Nick Lewycky wrote: > Hans Vandierendonck wrote: >> Hi, >> >> The attached patch fixes a bug in lib/VMCore/Instructions.cpp, >> createMalloc() routine, where a BitCastInst is not inserted in any >> BasicBlock. > > Did you run 'make check' after writing this patch? I saw a lot of > failing unit tests that weren't failing before. I suspect you need > to audit the callers of createMalloc and make sure they aren't re- > inserting the resulting malloc, maybe? > > Nick ==== Hans Vandierendonck Post-doctoral Fellow FWO Department of Electronics and Information Systems Ghent University http://www.elis.ugent.be/~hvdieren/ From dpatel at apple.com Tue Aug 24 12:42:50 2010 From: dpatel at apple.com (Devang Patel) Date: Tue, 24 Aug 2010 10:42:50 -0700 Subject: [llvm-commits] JIT: Emitting a debug location after an instruction In-Reply-To: References: Message-ID: <73F2F1FB-60CD-4F07-BDC0-91D5495D7896@apple.com> On Aug 23, 2010, at 6:37 PM, Jeffrey Yasskin wrote: > On Mon, Aug 23, 2010 at 8:10 PM, Devang Patel wrote: >> >> >> On Mon, Aug 23, 2010 at 4:46 AM, Jeffrey Yasskin >> wrote: >>> >>> Devang, why does this argument to processDebugLoc even exist? I don't >>> see it used anywhere, you didn't update the MachineCodeEmitter.h >>> comment to mention it, and your commit adding it only says "Update >>> processDebugLoc() so that it can be used to process debug info before >>> and after printing an instruction." >>> >> >> Imagine a lexical scope represented by a single machine instruction. You >> want to emit a label before and after the instruction to record instruction >> range for the scope. > > When you get the call to processDebugLoc(..., false), you don't know > that the next instruction will have a different DebugLoc or, if it > does, that the new DebugLoc will be part of a different scope, DwarfDebug::extractScopeInformation() collects this information in advance during beginFunction(). > so you > can't actually emit the label in the processDebugLoc(..., false) > invocation. Can you point me to code that runs when > BeforePrintingInsn==false so I can see what I'm missing? AsmPrinter.cpp used to call processDebugLoc() but the code was inlined and simplified in r100339. - Devang From sabre at nondot.org Tue Aug 24 12:44:07 2010 From: sabre at nondot.org (Chris Lattner) Date: Tue, 24 Aug 2010 17:44:07 -0000 Subject: [llvm-commits] [llvm] r111929 - /llvm/trunk/tools/bugpoint/OptimizerDriver.cpp Message-ID: <20100824174407.444DA2A6C12C@llvm.org> Author: lattner Date: Tue Aug 24 12:44:07 2010 New Revision: 111929 URL: http://llvm.org/viewvc/llvm-project?rev=111929&view=rev Log: Apply "Win32's Hybrid path separator in argv[0] should be accepted to bugpoint", patch by NAKAMURA Takumi! Modified: llvm/trunk/tools/bugpoint/OptimizerDriver.cpp Modified: llvm/trunk/tools/bugpoint/OptimizerDriver.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/OptimizerDriver.cpp?rev=111929&r1=111928&r2=111929&view=diff ============================================================================== --- llvm/trunk/tools/bugpoint/OptimizerDriver.cpp (original) +++ llvm/trunk/tools/bugpoint/OptimizerDriver.cpp Tue Aug 24 12:44:07 2010 @@ -27,6 +27,7 @@ #include "llvm/Target/TargetData.h" #include "llvm/Support/FileUtilities.h" #include "llvm/Support/CommandLine.h" +#include "llvm/Support/SystemUtils.h" #include "llvm/Support/Debug.h" #include "llvm/Support/raw_ostream.h" #include "llvm/System/Path.h" @@ -150,16 +151,8 @@ // setup the child process' arguments SmallVector Args; - std::string Opt; - llvm::StringRef TN(ToolName); - if (TN.find('/') == llvm::StringRef::npos) { - Opt = "opt"; - } else { - std::pair P = TN.rsplit('/'); - Opt = P.first.str() + "/" + "opt"; - } - - sys::Path tool = sys::Program::FindProgramByName(Opt); + sys::Path tool = FindExecutable("opt", getToolName(), (void*)"opt"); + std::string Opt = tool.str(); if (UseValgrind) { Args.push_back("valgrind"); Args.push_back("--error-exitcode=1"); From clattner at apple.com Tue Aug 24 12:44:51 2010 From: clattner at apple.com (Chris Lattner) Date: Tue, 24 Aug 2010 10:44:51 -0700 Subject: [llvm-commits] [PATCH] Win32's Hybrid path separator in argv[0] should be accepted to bugpoint In-Reply-To: References: Message-ID: <340DA01D-F25F-478F-BAE2-ADB74996BB22@apple.com> Looks great, applied in r111929, thanks! -Chris On Aug 24, 2010, at 2:56 AM, NAKAMURA Takumi wrote: > Hello, Chris, > > Okay, I made a simplified patch, referred to ToolRunner.cpp, > confirmed on cygwin, mingw and ppc-f12. > > I am worried whether 3rd parameter of llvm::FindExecutable() would be > valid or not. > I don't have any environments 3rd parameter is effective on. > > I will wait for sys::Path 2.0 XD > > thank you, ... Takumi > > > 2010/8/24 Chris Lattner : >> >> On Aug 23, 2010, at 7:37 AM, NAKAMURA Takumi wrote: >> >>> Hello guys, >>> >>> I saw argv[0], as below, with mingw-configured Python/w32 lit. >>> >>> "c:/path/to/build/Release+Asserts/bin\bugpoint.exe" >>> >>> Bugpoint assumes path separator consists only with '/' >>> to extract directory as "c:/path/to/build/Release+Asserts". (w/o "bin") >>> >>> My patch, attached, canonicalize BugDriver::ToolName(==argv[0]) >>> with llvm::sys::Path. >>> confirmed on cygwin and ppc-f12. >>> >>> Please take a look into my patch, thank you. >> >> This patch looks functionally fine, but I'd prefer if you could change OptimizerDriver.cpp to use sys::path locally, instead of changing the BugDriver class to contain a sys::Path. This will reduce the amount of change, and will make it easier when we eventually eliminate sys::Path in the future. >> >> -Chris > From hvdieren at elis.UGent.be Tue Aug 24 13:03:19 2010 From: hvdieren at elis.UGent.be (Hans Vandierendonck) Date: Tue, 24 Aug 2010 20:03:19 +0200 Subject: [llvm-commits] bug fix proposal In-Reply-To: <9C2980BC-7038-4533-AB51-1BED7585D873@apple.com> References: <39F68BE0-3D08-4673-A842-4D05E3E82EB2@elis.ugent.be> <9C2980BC-7038-4533-AB51-1BED7585D873@apple.com> Message-ID: <556DDF06-41C6-4052-A3C5-8E6106641DE6@elis.UGent.be> I am looking into this. I find one difficulty in LLParser.cpp, where the convention is that all ParseXXX() functions return an instruction that must still be inserted in the BB's instruction list. The actual insertion is done once for all ParseXXX() results. I see 2 options: 1) add InstNormalNoInsert and InstExtraCommaNoInsert enum values to bypass the insertion 2) remove the instruction in this case only after the CreateMalloc() call Neither of them is satisfactory. Any suggestions? Hans. On Aug 24, 2010, at 7:33 PM, Chris Lattner wrote: > > On Aug 24, 2010, at 7:28 AM, Hans Vandierendonck wrote: > >> Hi, >> >> The attached patch fixes a bug in lib/VMCore/Instructions.cpp, >> createMalloc() routine, where a BitCastInst is not inserted in any >> BasicBlock. > > This is not correct, because of an incredibly poor design of > CreateMalloc: it looks like the "InsertAtEnd" version does not > insert the final instruction into the specified block! This is > terrible, but you'd need to fix the callers before this patch will > work. > > -Chris ==== Hans Vandierendonck Post-doctoral Fellow FWO Department of Electronics and Information Systems Ghent University http://www.elis.ugent.be/~hvdieren/ From grosbach at apple.com Tue Aug 24 13:04:52 2010 From: grosbach at apple.com (Jim Grosbach) Date: Tue, 24 Aug 2010 18:04:52 -0000 Subject: [llvm-commits] [llvm] r111930 - /llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Message-ID: <20100824180452.2F5A12A6C12C@llvm.org> Author: grosbach Date: Tue Aug 24 13:04:52 2010 New Revision: 111930 URL: http://llvm.org/viewvc/llvm-project?rev=111930&view=rev Log: add ARM cmd line option to force always using virtual base regs when possible. Intended to help ease reproducing problems by increasing base register usage after heuristics for only using the when needed are in place. Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp?rev=111930&r1=111929&r2=111930&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Tue Aug 24 13:04:52 2010 @@ -43,6 +43,9 @@ cl::opt ReuseFrameIndexVals("arm-reuse-frame-index-vals", cl::Hidden, cl::init(true), cl::desc("Reuse repeated frame index values")); +cl::opt +ForceAllBaseRegAlloc("arm-force-base-reg-alloc", cl::Hidden, cl::init(true), + cl::desc("Force use of virtual base registers for stack load/store")); } using namespace llvm; @@ -1436,10 +1439,9 @@ // we don't know everything for certain yet) whether this offset is likely // to be out of range of the immediate. Return true if so. - // FIXME: For testing, return true for all loads/stores and false for - // everything else. We want to create lots of base regs to shake out bugs. + // We only generate virtual base registers for loads and stores, so + // return false for everything else. unsigned Opc = MI->getOpcode(); - switch (Opc) { case ARM::LDR: case ARM::LDRH: case ARM::LDRB: case ARM::STR: case ARM::STRH: case ARM::STRB: @@ -1448,10 +1450,20 @@ case ARM::VLDRS: case ARM::VLDRD: case ARM::VSTRS: case ARM::VSTRD: case ARM::tSTRspi: case ARM::tLDRspi: - return true; + if (ForceAllBaseRegAlloc) + return true; + break; default: return false; } + + // FIXME: TODO + // Without a virtual base register, if the function has variable sized + // objects, all fixed-size local references will be via the frame pointer, + // otherwise via the stack pointer. Approximate the offset and see if it's + // legal for the instruction. + + return true; } /// materializeFrameBaseRegister - Insert defining instruction(s) for From gohman at apple.com Tue Aug 24 13:09:44 2010 From: gohman at apple.com (Dan Gohman) Date: Tue, 24 Aug 2010 18:09:44 -0000 Subject: [llvm-commits] [llvm] r111933 - /llvm/trunk/lib/Linker/LinkModules.cpp Message-ID: <20100824180944.742FA2A6C12C@llvm.org> Author: djg Date: Tue Aug 24 13:09:44 2010 New Revision: 111933 URL: http://llvm.org/viewvc/llvm-project?rev=111933&view=rev Log: Don't cast away qualifiers with C-style casts. Modified: llvm/trunk/lib/Linker/LinkModules.cpp Modified: llvm/trunk/lib/Linker/LinkModules.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Linker/LinkModules.cpp?rev=111933&r1=111932&r2=111933&view=diff ============================================================================== --- llvm/trunk/lib/Linker/LinkModules.cpp (original) +++ llvm/trunk/lib/Linker/LinkModules.cpp Tue Aug 24 13:09:44 2010 @@ -338,9 +338,9 @@ static void PrintMap(const std::map &M) { for (std::map::const_iterator I = M.begin(), E =M.end(); I != E; ++I) { - dbgs() << " Fr: " << (void*)I->first << " "; + dbgs() << " Fr: " << (const void*)I->first << " "; I->first->dump(); - dbgs() << " To: " << (void*)I->second << " "; + dbgs() << " To: " << (const void*)I->second << " "; I->second->dump(); dbgs() << "\n"; } @@ -419,7 +419,7 @@ dbgs() << "LinkModules ValueMap: \n"; PrintMap(ValueMap); - dbgs() << "Couldn't remap value: " << (void*)In << " " << *In << "\n"; + dbgs() << "Couldn't remap value: " << (const void*)In << " " << *In << "\n"; llvm_unreachable("Couldn't remap value!"); #endif return 0; From daniel at zuster.org Tue Aug 24 13:12:12 2010 From: daniel at zuster.org (Daniel Dunbar) Date: Tue, 24 Aug 2010 18:12:12 -0000 Subject: [llvm-commits] [llvm] r111934 - in /llvm/trunk: lib/MC/MCParser/AsmParser.cpp test/MC/AsmParser/dollars-in-identifiers.s Message-ID: <20100824181212.58D3F2A6C12C@llvm.org> Author: ddunbar Date: Tue Aug 24 13:12:12 2010 New Revision: 111934 URL: http://llvm.org/viewvc/llvm-project?rev=111934&view=rev Log: MC/Parser: Accept leading dollar signs in identifiers. - Implemented by manually splicing the tokens. If this turns out to be problematically platform specific, a more elegant solution would be to implement some context dependent lexing support. Added: llvm/trunk/test/MC/AsmParser/dollars-in-identifiers.s Modified: llvm/trunk/lib/MC/MCParser/AsmParser.cpp Modified: llvm/trunk/lib/MC/MCParser/AsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCParser/AsmParser.cpp?rev=111934&r1=111933&r2=111934&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCParser/AsmParser.cpp (original) +++ llvm/trunk/lib/MC/MCParser/AsmParser.cpp Tue Aug 24 13:12:12 2010 @@ -1127,6 +1127,30 @@ /// ::= identifier /// ::= string bool AsmParser::ParseIdentifier(StringRef &Res) { + // The assembler has relaxed rules for accepting identifiers, in particular we + // allow things like '.globl $foo', which would normally be separate + // tokens. At this level, we have already lexed so we cannot (currently) + // handle this as a context dependent token, instead we detect adjacent tokens + // and return the combined identifier. + if (Lexer.is(AsmToken::Dollar)) { + SMLoc DollarLoc = getLexer().getLoc(); + + // Consume the dollar sign, and check for a following identifier. + Lex(); + if (Lexer.isNot(AsmToken::Identifier)) + return true; + + // We have a '$' followed by an identifier, make sure they are adjacent. + if (DollarLoc.getPointer() + 1 != getTok().getLoc().getPointer()) + return true; + + // Construct the joined identifier and consume the token. + Res = StringRef(DollarLoc.getPointer(), + getTok().getIdentifier().size() + 1); + Lex(); + return false; + } + if (Lexer.isNot(AsmToken::Identifier) && Lexer.isNot(AsmToken::String)) return true; Added: llvm/trunk/test/MC/AsmParser/dollars-in-identifiers.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AsmParser/dollars-in-identifiers.s?rev=111934&view=auto ============================================================================== --- llvm/trunk/test/MC/AsmParser/dollars-in-identifiers.s (added) +++ llvm/trunk/test/MC/AsmParser/dollars-in-identifiers.s Tue Aug 24 13:12:12 2010 @@ -0,0 +1,5 @@ +# RUN: llvm-mc -triple i386-unknown-unknown %s > %t +# RUN: FileCheck < %t %s + +// CHECK: .globl $foo +.globl $foo From dpatel at apple.com Tue Aug 24 13:21:00 2010 From: dpatel at apple.com (Devang Patel) Date: Tue, 24 Aug 2010 11:21:00 -0700 Subject: [llvm-commits] [llvm] r111895 - in /llvm/trunk: lib/AsmParser/LLParser.cpp lib/AsmParser/LLParser.h lib/Bitcode/Writer/ValueEnumerator.cpp lib/Bitcode/Writer/ValueEnumerator.h test/Feature/metadata.ll In-Reply-To: <20100824022403.E65C92A6C12C@llvm.org> References: <20100824022403.E65C92A6C12C@llvm.org> Message-ID: Dan, I expected parser to reject following but it does not. define void @foo(i32 %x) { store i32 0, i32* null, !whatever !{i32 %tmp} %tmp = add i32 %x, %x ret void } - Devang On Aug 23, 2010, at 7:24 PM, Dan Gohman wrote: > Author: djg > Date: Mon Aug 23 21:24:03 2010 > New Revision: 111895 > > URL: http://llvm.org/viewvc/llvm-project?rev=111895&view=rev > Log: > Extend function-local metadata to be usable as attachments. > > Modified: > llvm/trunk/lib/AsmParser/LLParser.cpp > llvm/trunk/lib/AsmParser/LLParser.h > llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp > llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.h > llvm/trunk/test/Feature/metadata.ll > > Modified: llvm/trunk/lib/AsmParser/LLParser.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/LLParser.cpp?rev=111895&r1=111894&r2=111895&view=diff > ============================================================================== > --- llvm/trunk/lib/AsmParser/LLParser.cpp (original) > +++ llvm/trunk/lib/AsmParser/LLParser.cpp Mon Aug 23 21:24:03 2010 > @@ -1124,23 +1124,33 @@ > return TokError("expected metadata after comma"); > > std::string Name = Lex.getStrVal(); > + unsigned MDK = M->getMDKindID(Name.c_str()); > Lex.Lex(); > > MDNode *Node; > unsigned NodeID; > SMLoc Loc = Lex.getLoc(); > - if (ParseToken(lltok::exclaim, "expected '!' here") || > - ParseMDNodeID(Node, NodeID)) > + > + if (ParseToken(lltok::exclaim, "expected '!' here")) > return true; > > - unsigned MDK = M->getMDKindID(Name.c_str()); > - if (Node) { > - // If we got the node, add it to the instruction. > - Inst->setMetadata(MDK, Node); > + if (Lex.getKind() == lltok::lbrace) { > + ValID ID; > + if (ParseMetadataListValue(ID, PFS)) > + return true; > + assert(ID.Kind == ValID::t_MDNode); > + Inst->setMetadata(MDK, ID.MDNodeVal); > } else { > - MDRef R = { Loc, MDK, NodeID }; > - // Otherwise, remember that this should be resolved later. > - ForwardRefInstMetadata[Inst].push_back(R); > + if (ParseMDNodeID(Node, NodeID)) > + return true; > + if (Node) { > + // If we got the node, add it to the instruction. > + Inst->setMetadata(MDK, Node); > + } else { > + MDRef R = { Loc, MDK, NodeID }; > + // Otherwise, remember that this should be resolved later. > + ForwardRefInstMetadata[Inst].push_back(R); > + } > } > > // If this is the end of the list, we're done. > @@ -2505,6 +2515,20 @@ > return false; > } > > +bool LLParser::ParseMetadataListValue(ValID &ID, PerFunctionState *PFS) { > + assert(Lex.getKind() == lltok::lbrace); > + Lex.Lex(); > + > + SmallVector Elts; > + if (ParseMDNodeVector(Elts, PFS) || > + ParseToken(lltok::rbrace, "expected end of metadata node")) > + return true; > + > + ID.MDNodeVal = MDNode::get(Context, Elts.data(), Elts.size()); > + ID.Kind = ValID::t_MDNode; > + return false; > +} > + > /// ParseMetadataValue > /// ::= !42 > /// ::= !{...} > @@ -2515,16 +2539,8 @@ > > // MDNode: > // !{ ... } > - if (EatIfPresent(lltok::lbrace)) { > - SmallVector Elts; > - if (ParseMDNodeVector(Elts, PFS) || > - ParseToken(lltok::rbrace, "expected end of metadata node")) > - return true; > - > - ID.MDNodeVal = MDNode::get(Context, Elts.data(), Elts.size()); > - ID.Kind = ValID::t_MDNode; > - return false; > - } > + if (Lex.getKind() == lltok::lbrace) > + return ParseMetadataListValue(ID, PFS); > > // Standalone metadata reference > // !42 > > Modified: llvm/trunk/lib/AsmParser/LLParser.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/LLParser.h?rev=111895&r1=111894&r2=111895&view=diff > ============================================================================== > --- llvm/trunk/lib/AsmParser/LLParser.h (original) > +++ llvm/trunk/lib/AsmParser/LLParser.h Mon Aug 23 21:24:03 2010 > @@ -307,6 +307,7 @@ > bool ParseGlobalValue(const Type *Ty, Constant *&V); > bool ParseGlobalTypeAndValue(Constant *&V); > bool ParseGlobalValueVector(SmallVectorImpl &Elts); > + bool ParseMetadataListValue(ValID &ID, PerFunctionState *PFS); > bool ParseMetadataValue(ValID &ID, PerFunctionState *PFS); > bool ParseMDNodeVector(SmallVectorImpl &, PerFunctionState *PFS); > bool ParseInstructionMetadata(Instruction *Inst, PerFunctionState *PFS); > > Modified: llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp?rev=111895&r1=111894&r2=111895&view=diff > ============================================================================== > --- llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp (original) > +++ llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp Mon Aug 23 21:24:03 2010 > @@ -220,8 +220,35 @@ > EnumerateMetadata(MD->getOperand(i)); > } > > +/// EnumerateMDNodeOperands - Enumerate all non-function-local values > +/// and types referenced by the given MDNode. > +void ValueEnumerator::EnumerateMDNodeOperands(const MDNode *N) { > + for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { > + if (Value *V = N->getOperand(i)) { > + if (isa(V) || isa(V)) > + EnumerateMetadata(V); > + else if (!isa(V) && !isa(V)) > + EnumerateValue(V); > + } else > + EnumerateType(Type::getVoidTy(N->getContext())); > + } > +} > + > void ValueEnumerator::EnumerateMetadata(const Value *MD) { > assert((isa(MD) || isa(MD)) && "Invalid metadata kind"); > + > + // Enumerate the type of this value. > + EnumerateType(MD->getType()); > + > + const MDNode *N = dyn_cast(MD); > + > + // In the module-level pass, skip function-local nodes themselves, but > + // do walk their operands. > + if (N && N->isFunctionLocal() && N->getFunction()) { > + EnumerateMDNodeOperands(N); > + return; > + } > + > // Check to see if it's already in! > unsigned &MDValueID = MDValueMap[MD]; > if (MDValueID) { > @@ -229,35 +256,52 @@ > MDValues[MDValueID-1].second++; > return; > } > + MDValues.push_back(std::make_pair(MD, 1U)); > + MDValueID = MDValues.size(); > + > + // Enumerate all non-function-local operands. > + if (N) > + EnumerateMDNodeOperands(N); > +} > + > +/// EnumerateFunctionLocalMetadataa - Incorporate function-local metadata > +/// information reachable from the given MDNode. > +void ValueEnumerator::EnumerateFunctionLocalMetadata(const MDNode *N) { > + assert(N->isFunctionLocal() && N->getFunction() && > + "EnumerateFunctionLocalMetadata called on non-function-local mdnode!"); > > // Enumerate the type of this value. > - EnumerateType(MD->getType()); > + EnumerateType(N->getType()); > > - if (const MDNode *N = dyn_cast(MD)) { > - MDValues.push_back(std::make_pair(MD, 1U)); > - MDValueMap[MD] = MDValues.size(); > - MDValueID = MDValues.size(); > - for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { > - if (Value *V = N->getOperand(i)) > - EnumerateValue(V); > - else > - EnumerateType(Type::getVoidTy(MD->getContext())); > - } > - if (N->isFunctionLocal() && N->getFunction()) > - FunctionLocalMDs.push_back(N); > + // Check to see if it's already in! > + unsigned &MDValueID = MDValueMap[N]; > + if (MDValueID) { > + // Increment use count. > + MDValues[MDValueID-1].second++; > return; > } > - > - // Add the value. > - assert(isa(MD) && "Unknown metadata kind"); > - MDValues.push_back(std::make_pair(MD, 1U)); > + MDValues.push_back(std::make_pair(N, 1U)); > MDValueID = MDValues.size(); > + > + // To incoroporate function-local information visit all function-local > + // MDNodes and all function-local values they reference. > + for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) > + if (Value *V = N->getOperand(i)) { > + if (MDNode *O = dyn_cast(V)) > + if (O->isFunctionLocal() && O->getFunction()) > + EnumerateFunctionLocalMetadata(O); > + else if (isa(V) || isa(V)) > + EnumerateValue(V); > + } > + > + // Also, collect all function-local MDNodes for easy access. > + FunctionLocalMDs.push_back(N); > } > > void ValueEnumerator::EnumerateValue(const Value *V) { > assert(!V->getType()->isVoidTy() && "Can't insert void values!"); > - if (isa(V) || isa(V)) > - return EnumerateMetadata(V); > + assert(!isa(V) && !isa(V) && > + "EnumerateValue doesn't handle Metadata!"); > > // Check to see if it's already in! > unsigned &ValueID = ValueMap[V]; > @@ -370,6 +414,7 @@ > void ValueEnumerator::incorporateFunction(const Function &F) { > InstructionCount = 0; > NumModuleValues = Values.size(); > + NumModuleMDValues = MDValues.size(); > > // Adding function arguments to the value table. > for (Function::const_arg_iterator I = F.arg_begin(), E = F.arg_end(); > @@ -412,6 +457,15 @@ > // Enumerate metadata after the instructions they might refer to. > FnLocalMDVector.push_back(MD); > } > + > + SmallVector, 8> MDs; > + I->getAllMetadataOtherThanDebugLoc(MDs); > + for (unsigned i = 0, e = MDs.size(); i != e; ++i) { > + MDNode *N = MDs[i].second; > + if (N->isFunctionLocal() && N->getFunction()) > + FnLocalMDVector.push_back(N); > + } > + > if (!I->getType()->isVoidTy()) > EnumerateValue(I); > } > @@ -419,17 +473,20 @@ > > // Add all of the function-local metadata. > for (unsigned i = 0, e = FnLocalMDVector.size(); i != e; ++i) > - EnumerateOperandType(FnLocalMDVector[i]); > + EnumerateFunctionLocalMetadata(FnLocalMDVector[i]); > } > > void ValueEnumerator::purgeFunction() { > /// Remove purged values from the ValueMap. > for (unsigned i = NumModuleValues, e = Values.size(); i != e; ++i) > ValueMap.erase(Values[i].first); > + for (unsigned i = NumModuleMDValues, e = MDValues.size(); i != e; ++i) > + MDValueMap.erase(MDValues[i].first); > for (unsigned i = 0, e = BasicBlocks.size(); i != e; ++i) > ValueMap.erase(BasicBlocks[i]); > > Values.resize(NumModuleValues); > + MDValues.resize(NumModuleMDValues); > BasicBlocks.clear(); > } > > > Modified: llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.h?rev=111895&r1=111894&r2=111895&view=diff > ============================================================================== > --- llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.h (original) > +++ llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.h Mon Aug 23 21:24:03 2010 > @@ -72,6 +72,11 @@ > /// When a function is incorporated, this is the size of the Values list > /// before incorporation. > unsigned NumModuleValues; > + > + /// When a function is incorporated, this is the size of the MDValues list > + /// before incorporation. > + unsigned NumModuleMDValues; > + > unsigned FirstFuncConstantID; > unsigned FirstInstID; > > @@ -132,7 +137,9 @@ > private: > void OptimizeConstants(unsigned CstStart, unsigned CstEnd); > > + void EnumerateMDNodeOperands(const MDNode *N); > void EnumerateMetadata(const Value *MD); > + void EnumerateFunctionLocalMetadata(const MDNode *N); > void EnumerateNamedMDNode(const NamedMDNode *NMD); > void EnumerateValue(const Value *V); > void EnumerateType(const Type *T); > > Modified: llvm/trunk/test/Feature/metadata.ll > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Feature/metadata.ll?rev=111895&r1=111894&r2=111895&view=diff > ============================================================================== > --- llvm/trunk/test/Feature/metadata.ll (original) > +++ llvm/trunk/test/Feature/metadata.ll Mon Aug 23 21:24:03 2010 > @@ -1,9 +1,11 @@ > ; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis > ; PR7105 > > -define void @foo() { > +define void @foo(i32 %x) { > call void @llvm.zonk(metadata !1, i64 0, metadata !1) > - ret void > + store i32 0, i32* null, !whatever !0, !whatever_else !{}, !more !{metadata !"hello"} > + store i32 0, i32* null, !whatever !{i32 %x, metadata !"hello", metadata !1, metadata !{}, metadata !2} > + ret void, !whatever !{i32 %x} > } > > declare void @llvm.zonk(metadata, i64, metadata) nounwind readnone > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From dpatel at apple.com Tue Aug 24 13:25:38 2010 From: dpatel at apple.com (Devang Patel) Date: Tue, 24 Aug 2010 11:25:38 -0700 Subject: [llvm-commits] [llvm] r111922 - /llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp In-Reply-To: <20100824171010.EBFEE2A6C12C@llvm.org> References: <20100824171010.EBFEE2A6C12C@llvm.org> Message-ID: On Aug 24, 2010, at 10:10 AM, Dan Gohman wrote: > Author: djg > Date: Tue Aug 24 12:10:10 2010 > New Revision: 111922 > > URL: http://llvm.org/viewvc/llvm-project?rev=111922&view=rev > Log: > MapValue support for MDNodes. This is similar to r109117, except > that it avoids a lot of unnecessary cloning by avoiding remapping > MDNode cycles when none of the nodes in the cycle actually need to > be remapped. Also it uses the new temporary MDNode mechanism. Yay! Does this fix PR 7700 and PR 7689 ? - Devang -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20100824/23565cc4/attachment.html From gohman at apple.com Tue Aug 24 13:30:45 2010 From: gohman at apple.com (Dan Gohman) Date: Tue, 24 Aug 2010 11:30:45 -0700 Subject: [llvm-commits] [llvm] r111895 - in /llvm/trunk: lib/AsmParser/LLParser.cpp lib/AsmParser/LLParser.h lib/Bitcode/Writer/ValueEnumerator.cpp lib/Bitcode/Writer/ValueEnumerator.h test/Feature/metadata.ll In-Reply-To: References: <20100824022403.E65C92A6C12C@llvm.org> Message-ID: On Aug 24, 2010, at 11:21 AM, Devang Patel wrote: > Dan, > > I expected parser to reject following but it does not. > > define void @foo(i32 %x) { > store i32 0, i32* null, !whatever !{i32 %tmp} > %tmp = add i32 %x, %x > ret void > } It doesn't reject this either: define void @foo() { entry: call void @llvm.dbg.value(metadata !{i32* %t}, i64 0, metadata !"hello") %t = alloca i32 ret void } declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone Should it? Dan From dpatel at apple.com Tue Aug 24 13:33:28 2010 From: dpatel at apple.com (Devang Patel) Date: Tue, 24 Aug 2010 11:33:28 -0700 Subject: [llvm-commits] [llvm] r111895 - in /llvm/trunk: lib/AsmParser/LLParser.cpp lib/AsmParser/LLParser.h lib/Bitcode/Writer/ValueEnumerator.cpp lib/Bitcode/Writer/ValueEnumerator.h test/Feature/metadata.ll In-Reply-To: References: <20100824022403.E65C92A6C12C@llvm.org> Message-ID: <9B67017B-2CCB-44B1-B5C2-09725677FCFE@apple.com> On Aug 24, 2010, at 11:30 AM, Dan Gohman wrote: > > On Aug 24, 2010, at 11:21 AM, Devang Patel wrote: > >> Dan, >> >> I expected parser to reject following but it does not. >> >> define void @foo(i32 %x) { >> store i32 0, i32* null, !whatever !{i32 %tmp} >> %tmp = add i32 %x, %x >> ret void >> } > > It doesn't reject this either: > > define void @foo() { > entry: > call void @llvm.dbg.value(metadata !{i32* %t}, i64 0, metadata !"hello") > %t = alloca i32 > ret void > } > > declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone > > Should it? IMO, yes. - Devang From gohman at apple.com Tue Aug 24 13:50:07 2010 From: gohman at apple.com (Dan Gohman) Date: Tue, 24 Aug 2010 18:50:07 -0000 Subject: [llvm-commits] [llvm] r111941 - in /llvm/trunk: include/llvm/Transforms/Utils/ValueMapper.h lib/Linker/LinkModules.cpp lib/Transforms/Utils/CloneFunction.cpp lib/Transforms/Utils/CloneModule.cpp lib/Transforms/Utils/ValueMapper.cpp lib/Transforms/Utils/ValueMapper.h Message-ID: <20100824185007.3C2D02A6C12C@llvm.org> Author: djg Date: Tue Aug 24 13:50:07 2010 New Revision: 111941 URL: http://llvm.org/viewvc/llvm-project?rev=111941&view=rev Log: Use MapValue in the Linker instead of having a private function which does the same thing. This eliminates redundant code and handles MDNodes better. MDNode linking still doesn't fully work yet though. Added: llvm/trunk/include/llvm/Transforms/Utils/ValueMapper.h - copied, changed from r111917, llvm/trunk/lib/Transforms/Utils/ValueMapper.h Removed: llvm/trunk/lib/Transforms/Utils/ValueMapper.h Modified: llvm/trunk/lib/Linker/LinkModules.cpp llvm/trunk/lib/Transforms/Utils/CloneFunction.cpp llvm/trunk/lib/Transforms/Utils/CloneModule.cpp llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp Copied: llvm/trunk/include/llvm/Transforms/Utils/ValueMapper.h (from r111917, llvm/trunk/lib/Transforms/Utils/ValueMapper.h) URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Transforms/Utils/ValueMapper.h?p2=llvm/trunk/include/llvm/Transforms/Utils/ValueMapper.h&p1=llvm/trunk/lib/Transforms/Utils/ValueMapper.h&r1=111917&r2=111941&rev=111941&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/ValueMapper.h (original) +++ llvm/trunk/include/llvm/Transforms/Utils/ValueMapper.h Tue Aug 24 13:50:07 2010 @@ -1,4 +1,4 @@ -//===- ValueMapper.h - Interface shared by lib/Transforms/Utils -*- C++ -*-===// +//===- ValueMapper.h - Remapping for constants and metadata -----*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -12,8 +12,8 @@ // //===----------------------------------------------------------------------===// -#ifndef VALUEMAPPER_H -#define VALUEMAPPER_H +#ifndef LLVM_TRANSFORMS_UTILS_VALUEMAPPER_H +#define LLVM_TRANSFORMS_UTILS_VALUEMAPPER_H #include "llvm/ADT/ValueMap.h" Modified: llvm/trunk/lib/Linker/LinkModules.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Linker/LinkModules.cpp?rev=111941&r1=111940&r2=111941&view=diff ============================================================================== --- llvm/trunk/lib/Linker/LinkModules.cpp (original) +++ llvm/trunk/lib/Linker/LinkModules.cpp Tue Aug 24 13:50:07 2010 @@ -29,6 +29,7 @@ #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/raw_ostream.h" #include "llvm/System/Path.h" +#include "llvm/Transforms/Utils/ValueMapper.h" #include "llvm/ADT/DenseMap.h" using namespace llvm; @@ -334,97 +335,6 @@ return false; } -#ifndef NDEBUG -static void PrintMap(const std::map &M) { - for (std::map::const_iterator I = M.begin(), E =M.end(); - I != E; ++I) { - dbgs() << " Fr: " << (const void*)I->first << " "; - I->first->dump(); - dbgs() << " To: " << (const void*)I->second << " "; - I->second->dump(); - dbgs() << "\n"; - } -} -#endif - - -// RemapOperand - Use ValueMap to convert constants from one module to another. -static Value *RemapOperand(const Value *In, - std::map &ValueMap) { - std::map::const_iterator I = ValueMap.find(In); - if (I != ValueMap.end()) - return I->second; - - // Check to see if it's a constant that we are interested in transforming. - Value *Result = 0; - if (const Constant *CPV = dyn_cast(In)) { - if ((!isa(CPV->getType()) && !isa(CPV)) || - isa(CPV) || isa(CPV)) - return const_cast(CPV); // Simple constants stay identical. - - if (const ConstantArray *CPA = dyn_cast(CPV)) { - std::vector Operands(CPA->getNumOperands()); - for (unsigned i = 0, e = CPA->getNumOperands(); i != e; ++i) - Operands[i] =cast(RemapOperand(CPA->getOperand(i), ValueMap)); - Result = ConstantArray::get(cast(CPA->getType()), Operands); - } else if (const ConstantStruct *CPS = dyn_cast(CPV)) { - std::vector Operands(CPS->getNumOperands()); - for (unsigned i = 0, e = CPS->getNumOperands(); i != e; ++i) - Operands[i] =cast(RemapOperand(CPS->getOperand(i), ValueMap)); - Result = ConstantStruct::get(cast(CPS->getType()), Operands); - } else if (isa(CPV) || isa(CPV)) { - Result = const_cast(CPV); - } else if (const ConstantVector *CP = dyn_cast(CPV)) { - std::vector Operands(CP->getNumOperands()); - for (unsigned i = 0, e = CP->getNumOperands(); i != e; ++i) - Operands[i] = cast(RemapOperand(CP->getOperand(i), ValueMap)); - Result = ConstantVector::get(Operands); - } else if (const ConstantExpr *CE = dyn_cast(CPV)) { - std::vector Ops; - for (unsigned i = 0, e = CE->getNumOperands(); i != e; ++i) - Ops.push_back(cast(RemapOperand(CE->getOperand(i),ValueMap))); - Result = CE->getWithOperands(Ops); - } else if (const BlockAddress *CE = dyn_cast(CPV)) { - Result = BlockAddress::get( - cast(RemapOperand(CE->getFunction(), ValueMap)), - CE->getBasicBlock()); - } else { - assert(!isa(CPV) && "Unmapped global?"); - llvm_unreachable("Unknown type of derived type constant value!"); - } - } else if (const MDNode *MD = dyn_cast(In)) { - if (MD->isFunctionLocal()) { - SmallVector Elts; - for (unsigned i = 0, e = MD->getNumOperands(); i != e; ++i) { - if (MD->getOperand(i)) - Elts.push_back(RemapOperand(MD->getOperand(i), ValueMap)); - else - Elts.push_back(NULL); - } - Result = MDNode::get(In->getContext(), Elts.data(), MD->getNumOperands()); - } else { - Result = const_cast(In); - } - } else if (isa(In) || isa(In) || isa(In)) { - Result = const_cast(In); - } - - // Cache the mapping in our local map structure - if (Result) { - ValueMap[In] = Result; - return Result; - } - -#ifndef NDEBUG - dbgs() << "LinkModules ValueMap: \n"; - PrintMap(ValueMap); - - dbgs() << "Couldn't remap value: " << (const void*)In << " " << *In << "\n"; - llvm_unreachable("Couldn't remap value!"); -#endif - return 0; -} - /// ForceRenaming - The LLVM SymbolTable class autorenames globals that conflict /// in the symbol table. This is good for all clients except for us. Go /// through the trouble to force this back. @@ -555,7 +465,7 @@ // LinkGlobals - Loop through the global variables in the src module and merge // them into the dest module. static bool LinkGlobals(Module *Dest, const Module *Src, - std::map &ValueMap, + ValueToValueMapTy &ValueMap, std::multimap &AppendingVars, std::string *Err) { ValueSymbolTable &DestSymTab = Dest->getValueSymbolTable(); @@ -742,7 +652,7 @@ // dest module. We're assuming, that all functions/global variables were already // linked in. static bool LinkAlias(Module *Dest, const Module *Src, - std::map &ValueMap, + ValueToValueMapTy &ValueMap, std::string *Err) { // Loop over all alias in the src module for (Module::const_alias_iterator I = Src->alias_begin(), @@ -753,7 +663,7 @@ // Globals were already linked, thus we can just query ValueMap for variant // of SAliasee in Dest. - std::map::const_iterator VMI = ValueMap.find(SAliasee); + ValueToValueMapTy::const_iterator VMI = ValueMap.find(SAliasee); assert(VMI != ValueMap.end() && "Aliasee not linked"); GlobalValue* DAliasee = cast(VMI->second); GlobalValue* DGV = NULL; @@ -884,7 +794,7 @@ ForceRenaming(NewGA, SGA->getName()); // Remember this mapping so uses in the source module get remapped - // later by RemapOperand. + // later by MapValue. ValueMap[SGA] = NewGA; } @@ -895,7 +805,7 @@ // LinkGlobalInits - Update the initializers in the Dest module now that all // globals that may be referenced are in Dest. static bool LinkGlobalInits(Module *Dest, const Module *Src, - std::map &ValueMap, + ValueToValueMapTy &ValueMap, std::string *Err) { // Loop over all of the globals in the src module, mapping them over as we go for (Module::const_global_iterator I = Src->global_begin(), @@ -905,7 +815,7 @@ if (SGV->hasInitializer()) { // Only process initialized GV's // Figure out what the initializer looks like in the dest module... Constant *SInit = - cast(RemapOperand(SGV->getInitializer(), ValueMap)); + cast(MapValue(SGV->getInitializer(), ValueMap)); // Grab destination global variable or alias. GlobalValue *DGV = cast(ValueMap[SGV]->stripPointerCasts()); @@ -950,7 +860,7 @@ // to the Dest function... // static bool LinkFunctionProtos(Module *Dest, const Module *Src, - std::map &ValueMap, + ValueToValueMapTy &ValueMap, std::string *Err) { ValueSymbolTable &DestSymTab = Dest->getValueSymbolTable(); @@ -1035,7 +945,7 @@ ForceRenaming(NewDF, SF->getName()); // Remember this mapping so uses in the source module get remapped - // later by RemapOperand. + // later by MapValue. ValueMap[SF] = NewDF; continue; } @@ -1065,7 +975,7 @@ // fix up references to values. At this point we know that Dest is an external // function, and that Src is not. static bool LinkFunctionBody(Function *Dest, Function *Src, - std::map &ValueMap, + ValueToValueMapTy &ValueMap, std::string *Err) { assert(Src && Dest && Dest->isDeclaration() && !Src->isDeclaration()); @@ -1092,7 +1002,7 @@ for (Instruction::op_iterator OI = I->op_begin(), OE = I->op_end(); OI != OE; ++OI) if (!isa(*OI) && !isa(*OI)) - *OI = RemapOperand(*OI, ValueMap); + *OI = MapValue(*OI, ValueMap); // There is no need to map the arguments anymore. for (Function::arg_iterator I = Src->arg_begin(), E = Src->arg_end(); @@ -1107,7 +1017,7 @@ // source module into the DestModule. This consists basically of copying the // function over and fixing up references to values. static bool LinkFunctionBodies(Module *Dest, Module *Src, - std::map &ValueMap, + ValueToValueMapTy &ValueMap, std::string *Err) { // Loop over all of the functions in the src module, mapping them over as we @@ -1315,8 +1225,10 @@ return true; // ValueMap - Mapping of values from what they used to be in Src, to what they - // are now in Dest. - std::map ValueMap; + // are now in Dest. ValueToValueMapTy is a ValueMap, which involves some + // overhead due to the use of Value handles which the Linker doesn't actually + // need, but this allows us to reuse the ValueMapper code. + ValueToValueMapTy ValueMap; // AppendingVars - Keep track of global variables in the destination module // with appending linkage. After the module is linked together, they are Modified: llvm/trunk/lib/Transforms/Utils/CloneFunction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/CloneFunction.cpp?rev=111941&r1=111940&r2=111941&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/CloneFunction.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/CloneFunction.cpp Tue Aug 24 13:50:07 2010 @@ -23,7 +23,7 @@ #include "llvm/LLVMContext.h" #include "llvm/Metadata.h" #include "llvm/Support/CFG.h" -#include "ValueMapper.h" +#include "llvm/Transforms/Utils/ValueMapper.h" #include "llvm/Analysis/ConstantFolding.h" #include "llvm/Analysis/DebugInfo.h" #include "llvm/ADT/SmallVector.h" Modified: llvm/trunk/lib/Transforms/Utils/CloneModule.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/CloneModule.cpp?rev=111941&r1=111940&r2=111941&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/CloneModule.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/CloneModule.cpp Tue Aug 24 13:50:07 2010 @@ -17,7 +17,7 @@ #include "llvm/DerivedTypes.h" #include "llvm/TypeSymbolTable.h" #include "llvm/Constant.h" -#include "ValueMapper.h" +#include "llvm/Transforms/Utils/ValueMapper.h" using namespace llvm; /// CloneModule - Return an exact copy of the specified module. This is not as Modified: llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp?rev=111941&r1=111940&r2=111941&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp Tue Aug 24 13:50:07 2010 @@ -12,7 +12,7 @@ // //===----------------------------------------------------------------------===// -#include "ValueMapper.h" +#include "llvm/Transforms/Utils/ValueMapper.h" #include "llvm/Type.h" #include "llvm/Constants.h" #include "llvm/Function.h" Removed: llvm/trunk/lib/Transforms/Utils/ValueMapper.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/ValueMapper.h?rev=111940&view=auto ============================================================================== --- llvm/trunk/lib/Transforms/Utils/ValueMapper.h (original) +++ llvm/trunk/lib/Transforms/Utils/ValueMapper.h (removed) @@ -1,29 +0,0 @@ -//===- ValueMapper.h - Interface shared by lib/Transforms/Utils -*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file defines the MapValue interface which is used by various parts of -// the Transforms/Utils library to implement cloning and linking facilities. -// -//===----------------------------------------------------------------------===// - -#ifndef VALUEMAPPER_H -#define VALUEMAPPER_H - -#include "llvm/ADT/ValueMap.h" - -namespace llvm { - class Value; - class Instruction; - typedef ValueMap ValueToValueMapTy; - - Value *MapValue(const Value *V, ValueToValueMapTy &VM); - void RemapInstruction(Instruction *I, ValueToValueMapTy &VM); -} // End llvm namespace - -#endif From grosbach at apple.com Tue Aug 24 14:05:43 2010 From: grosbach at apple.com (Jim Grosbach) Date: Tue, 24 Aug 2010 19:05:43 -0000 Subject: [llvm-commits] [llvm] r111942 - in /llvm/trunk: include/llvm/Target/TargetRegisterInfo.h lib/CodeGen/LLVMTargetMachine.cpp lib/CodeGen/LocalStackSlotAllocation.cpp lib/CodeGen/PrologEpilogInserter.cpp lib/Target/ARM/ARMBaseRegisterInfo.cpp lib/Target/ARM/ARMBaseRegisterInfo.h Message-ID: <20100824190543.88AD32A6C12C@llvm.org> Author: grosbach Date: Tue Aug 24 14:05:43 2010 New Revision: 111942 URL: http://llvm.org/viewvc/llvm-project?rev=111942&view=rev Log: Move enabling the local stack allocation pass into the target where it belongs. For now it's still a command line option, but the interface to the generic code doesn't need to know that. Modified: llvm/trunk/include/llvm/Target/TargetRegisterInfo.h llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp llvm/trunk/lib/CodeGen/LocalStackSlotAllocation.cpp llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h Modified: llvm/trunk/include/llvm/Target/TargetRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetRegisterInfo.h?rev=111942&r1=111941&r2=111942&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetRegisterInfo.h (original) +++ llvm/trunk/include/llvm/Target/TargetRegisterInfo.h Tue Aug 24 14:05:43 2010 @@ -593,6 +593,13 @@ return false; } + /// requiresVirtualBaseRegisters - Returns true if the target wants the + /// LocalStackAllocation pass to be run and virtual base registers + /// used for more efficient stack access. + virtual bool requiresVirtualBaseRegisters(const MachineFunction &MF) const { + return false; + } + /// hasFP - Return true if the specified function should have a dedicated /// frame pointer register. For most targets this is true only if the function /// has variable sized allocas or if frame pointer elimination is disabled. Modified: llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp?rev=111942&r1=111941&r2=111942&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp (original) +++ llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp Tue Aug 24 14:05:43 2010 @@ -74,16 +74,6 @@ static cl::opt VerifyMachineCode("verify-machineinstrs", cl::Hidden, cl::desc("Verify generated machine code"), cl::init(getenv("LLVM_VERIFY_MACHINEINSTRS")!=NULL)); -// Enabled or disable local stack object block allocation. This is an -// experimental pass that allocates locals relative to one another before -// register allocation and then assigns them to actual stack slots as a block -// later in PEI. This will eventually allow targets with limited index offset -// range to allocate additional base registers (not just FP and SP) to -// more efficiently reference locals, as well as handle situations where -// locals cannot be referenced via SP or FP at all (dynamic stack realignment -// together with variable sized objects, for example). -cl::opt EnableLocalStackAlloc("enable-local-stack-alloc", cl::init(false), - cl::Hidden, cl::desc("Enable pre-regalloc stack frame index allocation")); static cl::opt AsmVerbose("asm-verbose", cl::desc("Add comments to directives."), @@ -354,11 +344,9 @@ if (OptLevel != CodeGenOpt::None) PM.add(createOptimizePHIsPass()); - // Assign local variables to stack slots relative to one another and simplify - // frame index references where possible. Final stack slot locations will be - // assigned in PEI. - if (EnableLocalStackAlloc) - PM.add(createLocalStackSlotAllocationPass()); + // If the target requests it, assign local variables to stack slots relative + // to one another and simplify frame index references where possible. + PM.add(createLocalStackSlotAllocationPass()); if (OptLevel != CodeGenOpt::None) { // With optimization, dead code should already be eliminated. However Modified: llvm/trunk/lib/CodeGen/LocalStackSlotAllocation.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LocalStackSlotAllocation.cpp?rev=111942&r1=111941&r2=111942&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LocalStackSlotAllocation.cpp (original) +++ llvm/trunk/lib/CodeGen/LocalStackSlotAllocation.cpp Tue Aug 24 14:05:43 2010 @@ -74,10 +74,12 @@ bool LocalStackSlotPass::runOnMachineFunction(MachineFunction &MF) { MachineFrameInfo *MFI = MF.getFrameInfo(); + const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo(); unsigned LocalObjectCount = MFI->getObjectIndexEnd(); - // Early exit if there are no locals to consider - if (!LocalObjectCount) + // If the target doesn't want/need this pass, or if there are no locals + // to consider, early exit. + if (!TRI->requiresVirtualBaseRegisters(MF) || LocalObjectCount == 0) return true; // Make sure we have enough space to store the local offsets. Modified: llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp?rev=111942&r1=111941&r2=111942&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp (original) +++ llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Tue Aug 24 14:05:43 2010 @@ -41,10 +41,6 @@ using namespace llvm; -// FIXME: For testing purposes only. Remove once the pre-allocation pass -// is done. -extern cl::opt EnableLocalStackAlloc; - char PEI::ID = 0; INITIALIZE_PASS(PEI, "prologepilog", @@ -560,7 +556,7 @@ // check for whether the frame is large enough to want to use virtual // frame index registers. Functions which don't want/need this optimization // will continue to use the existing code path. - if (EnableLocalStackAlloc && MFI->getUseLocalStackAllocationBlock()) { + if (MFI->getUseLocalStackAllocationBlock()) { unsigned Align = MFI->getLocalFrameMaxAlign(); // Adjust to alignment boundary. Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp?rev=111942&r1=111941&r2=111942&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Tue Aug 24 14:05:43 2010 @@ -43,9 +43,12 @@ cl::opt ReuseFrameIndexVals("arm-reuse-frame-index-vals", cl::Hidden, cl::init(true), cl::desc("Reuse repeated frame index values")); -cl::opt +static cl::opt ForceAllBaseRegAlloc("arm-force-base-reg-alloc", cl::Hidden, cl::init(true), cl::desc("Force use of virtual base registers for stack load/store")); +static cl::opt +EnableLocalStackAlloc("enable-local-stack-alloc", cl::init(false), cl::Hidden, + cl::desc("Enable pre-regalloc stack frame index allocation")); } using namespace llvm; @@ -1285,6 +1288,11 @@ return true; } +bool ARMBaseRegisterInfo:: +requiresVirtualBaseRegisters(const MachineFunction &MF) const { + return EnableLocalStackAlloc; +} + // hasReservedCallFrame - Under normal circumstances, when a frame pointer is // not required, we reserve argument space for call sites in the function // immediately on entry to the current function. This eliminates the need for Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h?rev=111942&r1=111941&r2=111942&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h (original) +++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h Tue Aug 24 14:05:43 2010 @@ -154,6 +154,8 @@ virtual bool requiresFrameIndexScavenging(const MachineFunction &MF) const; + virtual bool requiresVirtualBaseRegisters(const MachineFunction &MF) const; + virtual bool hasReservedCallFrame(const MachineFunction &MF) const; virtual bool canSimplifyCallFramePseudos(const MachineFunction &MF) const; From wdietz2 at illinois.edu Tue Aug 24 14:08:35 2010 From: wdietz2 at illinois.edu (Will Dietz) Date: Tue, 24 Aug 2010 19:08:35 -0000 Subject: [llvm-commits] [poolalloc] r111944 - /poolalloc/trunk/lib/DSA/BottomUpClosure.cpp Message-ID: <20100824190835.9D23B2A6C12C@llvm.org> Author: wdietz2 Date: Tue Aug 24 14:08:35 2010 New Revision: 111944 URL: http://llvm.org/viewvc/llvm-project?rev=111944&view=rev Log: Filter callsites on complete callsites nodes when determining if we're done with them. Modified: poolalloc/trunk/lib/DSA/BottomUpClosure.cpp Modified: poolalloc/trunk/lib/DSA/BottomUpClosure.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/BottomUpClosure.cpp?rev=111944&r1=111943&r2=111944&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/BottomUpClosure.cpp (original) +++ poolalloc/trunk/lib/DSA/BottomUpClosure.cpp Tue Aug 24 14:08:35 2010 @@ -737,6 +737,13 @@ std::mem_fun(&Function::isDeclaration)); NodeCallees.erase(ErasePoint, NodeCallees.end()); + // Remove callees that aren't legally called from this callsite. + // We're done with the callsite if all /legal/ callees have been + // taken care of already. We remove them because they won't + // be part of the callgraph (not because of this callsite anyway) + // and so we shouldn't expect them to be. + applyCallsiteFilter(CS,NodeCallees); + // // Only erase this call site if there's nothing left to do for it. // This means that all of the function targets recorded in the DSNode From daniel at zuster.org Tue Aug 24 14:13:38 2010 From: daniel at zuster.org (Daniel Dunbar) Date: Tue, 24 Aug 2010 19:13:38 -0000 Subject: [llvm-commits] [llvm] r111945 - in /llvm/trunk: lib/Target/X86/AsmParser/X86AsmParser.cpp test/MC/AsmParser/X86/x86_instructions.s Message-ID: <20100824191339.06DB02A6C12C@llvm.org> Author: ddunbar Date: Tue Aug 24 14:13:38 2010 New Revision: 111945 URL: http://llvm.org/viewvc/llvm-project?rev=111945&view=rev Log: MC/X86: Warn on scale factors > 1 without index register, instead of erroring, for 'as' compatibility. Modified: llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp llvm/trunk/test/MC/AsmParser/X86/x86_instructions.s Modified: llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp?rev=111945&r1=111944&r2=111945&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp (original) +++ llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp Tue Aug 24 14:13:38 2010 @@ -588,7 +588,7 @@ } } } else if (getLexer().isNot(AsmToken::RParen)) { - // Otherwise we have the unsupported form of a scale amount without an + // A scale amount without an index is ignored. // index. SMLoc Loc = Parser.getTok().getLoc(); @@ -596,8 +596,9 @@ if (getParser().ParseAbsoluteExpression(Value)) return 0; - Error(Loc, "cannot have scale factor without index register"); - return 0; + if (Value != 1) + Warning(Loc, "scale factor without index register is ignored"); + Scale = 1; } } Modified: llvm/trunk/test/MC/AsmParser/X86/x86_instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AsmParser/X86/x86_instructions.s?rev=111945&r1=111944&r2=111945&view=diff ============================================================================== --- llvm/trunk/test/MC/AsmParser/X86/x86_instructions.s (original) +++ llvm/trunk/test/MC/AsmParser/X86/x86_instructions.s Tue Aug 24 14:13:38 2010 @@ -1,4 +1,6 @@ -// RUN: llvm-mc -triple x86_64-unknown-unknown %s | FileCheck %s +// RUN: llvm-mc -triple x86_64-unknown-unknown %s > %t 2> %t.err +// RUN: FileCheck < %t %s +// RUN: FileCheck --check-prefix=CHECK-STDERR < %t.err %s // CHECK: subb %al, %al subb %al, %al @@ -151,3 +153,8 @@ // CHECK: int3 INT3 + +// Allow scale factor without index register. +// CHECK: movaps %xmm3, (%esi) +// CHECK-STDERR: warning: scale factor without index register is ignored +movaps %xmm3, (%esi, 2) From daniel at zuster.org Tue Aug 24 14:13:42 2010 From: daniel at zuster.org (Daniel Dunbar) Date: Tue, 24 Aug 2010 19:13:42 -0000 Subject: [llvm-commits] [llvm] r111946 - in /llvm/trunk: lib/MC/MCParser/AsmParser.cpp test/MC/AsmParser/dollars-in-identifiers.s Message-ID: <20100824191342.621C82A6C12D@llvm.org> Author: ddunbar Date: Tue Aug 24 14:13:42 2010 New Revision: 111946 URL: http://llvm.org/viewvc/llvm-project?rev=111946&view=rev Log: MC/AsmParser: Change ParseExpression to use ParseIdentifier(), to support dollars in identifiers. Modified: llvm/trunk/lib/MC/MCParser/AsmParser.cpp llvm/trunk/test/MC/AsmParser/dollars-in-identifiers.s Modified: llvm/trunk/lib/MC/MCParser/AsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCParser/AsmParser.cpp?rev=111946&r1=111945&r2=111946&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCParser/AsmParser.cpp (original) +++ llvm/trunk/lib/MC/MCParser/AsmParser.cpp Tue Aug 24 14:13:42 2010 @@ -449,10 +449,17 @@ return true; Res = MCUnaryExpr::CreateLNot(Res, getContext()); return false; + case AsmToken::Dollar: case AsmToken::String: case AsmToken::Identifier: { + EndLoc = Lexer.getLoc(); + + StringRef Identifier; + if (ParseIdentifier(Identifier)) + return false; + // This is a symbol reference. - std::pair Split = getTok().getIdentifier().split('@'); + std::pair Split = Identifier.split('@'); MCSymbol *Sym = getContext().GetOrCreateSymbol(Split.first); // Mark the symbol as used in an expression. @@ -460,12 +467,9 @@ // Lookup the symbol variant if used. MCSymbolRefExpr::VariantKind Variant = MCSymbolRefExpr::VK_None; - if (Split.first.size() != getTok().getIdentifier().size()) + if (Split.first.size() != Identifier.size()) Variant = MCSymbolRefExpr::getVariantKindForName(Split.second); - EndLoc = Lexer.getLoc(); - Lex(); // Eat identifier. - // If this is an absolute variable reference, substitute it now to preserve // semantics in the face of reassignment. if (Sym->isVariable() && isa(Sym->getVariableValue())) { Modified: llvm/trunk/test/MC/AsmParser/dollars-in-identifiers.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AsmParser/dollars-in-identifiers.s?rev=111946&r1=111945&r2=111946&view=diff ============================================================================== --- llvm/trunk/test/MC/AsmParser/dollars-in-identifiers.s (original) +++ llvm/trunk/test/MC/AsmParser/dollars-in-identifiers.s Tue Aug 24 14:13:42 2010 @@ -3,3 +3,5 @@ // CHECK: .globl $foo .globl $foo +// CHECK: .long ($foo) +.long ($foo) From grosbach at apple.com Tue Aug 24 14:18:43 2010 From: grosbach at apple.com (Jim Grosbach) Date: Tue, 24 Aug 2010 12:18:43 -0700 Subject: [llvm-commits] [llvm] r111885 - /llvm/trunk/lib/Target/ARM/ARMFastISel.cpp In-Reply-To: <20100824011004.401DB2A6C12C@llvm.org> References: <20100824011004.401DB2A6C12C@llvm.org> Message-ID: On Aug 23, 2010, at 6:10 PM, Eric Christopher wrote: > Author: echristo > Date: Mon Aug 23 20:10:04 2010 > New Revision: 111885 > > URL: http://llvm.org/viewvc/llvm-project?rev=111885&view=rev > Log: > Fix the opcode and the operands for the load instruction. > > Modified: > llvm/trunk/lib/Target/ARM/ARMFastISel.cpp > > Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=111885&r1=111884&r2=111885&view=diff > ============================================================================== > --- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original) > +++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Mon Aug 23 20:10:04 2010 > @@ -415,10 +415,13 @@ > } > > // FIXME: There is more than one register class in the world... > + // TODO: Verify the additions above work, otherwise we'll need to add the > + // offset instead of 0 and do all sorts of operand munging. > unsigned ResultReg = createResultReg(FixedRC); > + unsigned Opc = AFI->isThumb2Function() ? ARM::tLDR : ARM::LDR; You probably want ARM::t2LDR for the Thumb2 side. tLDR will work, but is the Thumb1 (16-bit wide) encoding and has more restrictive encodings. > AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, > - TII.get(ARM::LDR), ResultReg) > - .addImm(0).addReg(Reg).addImm(Offset)); > + TII.get(Opc), ResultReg) > + .addReg(Reg).addReg(0).addImm(0)); > UpdateValueMap(I, ResultReg); > > return true; > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From grosbach at apple.com Tue Aug 24 14:22:36 2010 From: grosbach at apple.com (Jim Grosbach) Date: Tue, 24 Aug 2010 12:22:36 -0700 Subject: [llvm-commits] [llvm] r111883 - /llvm/trunk/lib/Target/ARM/ARMFastISel.cpp In-Reply-To: <20100824005047.B254A2A6C12C@llvm.org> References: <20100824005047.B254A2A6C12C@llvm.org> Message-ID: On Aug 23, 2010, at 5:50 PM, Eric Christopher wrote: > Author: echristo > Date: Mon Aug 23 19:50:47 2010 > New Revision: 111883 > > URL: http://llvm.org/viewvc/llvm-project?rev=111883&view=rev > Log: > Add register class hack that needs to go away, but makes it more obvious > that it needs to go away. Use loadRegFromStackSlot where possible. > > Also, remember to update the value map. > > Modified: > llvm/trunk/lib/Target/ARM/ARMFastISel.cpp > > Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=111883&r1=111882&r2=111883&view=diff > ============================================================================== > --- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original) > +++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Mon Aug 23 19:50:47 2010 > @@ -58,6 +58,9 @@ > const TargetInstrInfo &TII; > const TargetLowering &TLI; > const ARMFunctionInfo *AFI; > + > + // FIXME: Remove this and replace it with queries. > + const TargetRegisterClass *FixedRC; > > public: > explicit ARMFastISel(FunctionLoweringInfo &funcInfo) > @@ -67,6 +70,7 @@ > TLI(*TM.getTargetLowering()) { > Subtarget = &TM.getSubtarget(); > AFI = funcInfo.MF->getInfo(); > + FixedRC = ARM::GPRRegisterClass; > } > > // Code from FastISel.cpp. > @@ -109,6 +113,7 @@ > > // Utility routines. > private: > + bool ARMLoadAlloca(const Instruction *I); > bool ARMComputeRegOffset(const Value *Obj, unsigned &Reg, int &Offset); > > bool DefinesOptionalPredicate(MachineInstr *MI, bool *CPSR); > @@ -340,22 +345,14 @@ > //errs() << "Failing Opcode is: " << *Op1 << "\n"; > break; > case Instruction::Alloca: { > - // Do static allocas. > - const AllocaInst *A = cast(Obj); > - DenseMap::iterator SI = > - FuncInfo.StaticAllocaMap.find(A); > - if (SI != FuncInfo.StaticAllocaMap.end()) > - Offset = > - TM.getRegisterInfo()->getFrameIndexReference(*FuncInfo.MF, > - SI->second, Reg); > - else > - return false; > - return true; > + assert(false && "Alloca should have been handled earlier!"); > + return false; > } > } > > if (const GlobalValue *GV = dyn_cast(Obj)) { > //errs() << "Failing GV is: " << GV << "\n"; > + (void)GV; > return false; > } > > @@ -364,12 +361,37 @@ > return Reg != 0; > } > > +bool ARMFastISel::ARMLoadAlloca(const Instruction *I) { > + Value *Op0 = I->getOperand(0); > + > + // Verify it's an alloca. > + const Instruction *Inst = dyn_cast(Op0); > + if (!Inst || Inst->getOpcode() != Instruction::Alloca) return false; > + > + const AllocaInst *AI = cast(Op0); You can combine these checks and the following cast to AllocaInst with: if (const AllocaInst *AI = dyn_cast(Op0) { ... > + DenseMap::iterator SI = > + FuncInfo.StaticAllocaMap.find(AI); > + > + if (SI != FuncInfo.StaticAllocaMap.end()) { > + unsigned ResultReg = createResultReg(FixedRC); > + TII.loadRegFromStackSlot(*FuncInfo.MBB, *FuncInfo.InsertPt, > + ResultReg, SI->second, FixedRC, > + TM.getRegisterInfo()); > + UpdateValueMap(I, ResultReg); > + return true; > + } > + > + return false; > +} > + > bool ARMFastISel::ARMSelectLoad(const Instruction *I) { > // Our register and offset with innocuous defaults. > unsigned Reg = 0; > int Offset = 0; > > // TODO: Think about using loadRegFromStackSlot() here when we can. > + if (ARMLoadAlloca(I)) > + return true; > > // See if we can handle this as Reg + Offset > if (!ARMComputeRegOffset(I->getOperand(0), Reg, Offset)) > @@ -393,10 +415,11 @@ > } > > // FIXME: There is more than one register class in the world... > - unsigned ResultReg = createResultReg(ARM::GPRRegisterClass); > + unsigned ResultReg = createResultReg(FixedRC); > AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, > TII.get(ARM::LDR), ResultReg) > .addImm(0).addReg(Reg).addImm(Offset)); > + UpdateValueMap(I, ResultReg); > > return true; > } > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From daniel at zuster.org Tue Aug 24 14:24:18 2010 From: daniel at zuster.org (Daniel Dunbar) Date: Tue, 24 Aug 2010 19:24:18 -0000 Subject: [llvm-commits] [llvm] r111947 - in /llvm/trunk: lib/Target/X86/AsmParser/X86AsmParser.cpp test/MC/AsmParser/X86/x86_instructions.s Message-ID: <20100824192418.D58C02A6C12C@llvm.org> Author: ddunbar Date: Tue Aug 24 14:24:18 2010 New Revision: 111947 URL: http://llvm.org/viewvc/llvm-project?rev=111947&view=rev Log: MC/X86: Add custom hack for recognizing "imul $12, %eax" and friends. Modified: llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp llvm/trunk/test/MC/AsmParser/X86/x86_instructions.s Modified: llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp?rev=111947&r1=111946&r2=111947&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp (original) +++ llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp Tue Aug 24 14:24:18 2010 @@ -826,6 +826,14 @@ Operands.erase(Operands.begin() + 2); } + // FIXME: Hack to handle "imul A, B" which is an alias for "imul A, B, B". + if (Name.startswith("imul") && Operands.size() == 3 && + static_cast(Operands.back())->isReg()) { + X86Operand *Op = static_cast(Operands.back()); + Operands.push_back(X86Operand::CreateReg(Op->getReg(), Op->getStartLoc(), + Op->getEndLoc())); + } + return false; } Modified: llvm/trunk/test/MC/AsmParser/X86/x86_instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AsmParser/X86/x86_instructions.s?rev=111947&r1=111946&r2=111947&view=diff ============================================================================== --- llvm/trunk/test/MC/AsmParser/X86/x86_instructions.s (original) +++ llvm/trunk/test/MC/AsmParser/X86/x86_instructions.s Tue Aug 24 14:24:18 2010 @@ -158,3 +158,6 @@ // CHECK: movaps %xmm3, (%esi) // CHECK-STDERR: warning: scale factor without index register is ignored movaps %xmm3, (%esi, 2) + +// CHECK: imull $12, %eax, %eax +imul $12, %eax From gohman at apple.com Tue Aug 24 14:31:04 2010 From: gohman at apple.com (Dan Gohman) Date: Tue, 24 Aug 2010 19:31:04 -0000 Subject: [llvm-commits] [llvm] r111948 - /llvm/trunk/lib/Linker/LinkModules.cpp Message-ID: <20100824193104.904302A6C12C@llvm.org> Author: djg Date: Tue Aug 24 14:31:04 2010 New Revision: 111948 URL: http://llvm.org/viewvc/llvm-project?rev=111948&view=rev Log: When linking NamedMDNodes, remap their operands. Modified: llvm/trunk/lib/Linker/LinkModules.cpp Modified: llvm/trunk/lib/Linker/LinkModules.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Linker/LinkModules.cpp?rev=111948&r1=111947&r2=111948&view=diff ============================================================================== --- llvm/trunk/lib/Linker/LinkModules.cpp (original) +++ llvm/trunk/lib/Linker/LinkModules.cpp Tue Aug 24 14:31:04 2010 @@ -451,14 +451,16 @@ } // Insert all of the named mdnoes in Src into the Dest module. -static void LinkNamedMDNodes(Module *Dest, Module *Src) { +static void LinkNamedMDNodes(Module *Dest, Module *Src, + ValueToValueMapTy &ValueMap) { for (Module::const_named_metadata_iterator I = Src->named_metadata_begin(), E = Src->named_metadata_end(); I != E; ++I) { const NamedMDNode *SrcNMD = I; NamedMDNode *DestNMD = Dest->getOrInsertNamedMetadata(SrcNMD->getName()); // Add Src elements into Dest node. for (unsigned i = 0, e = SrcNMD->getNumOperands(); i != e; ++i) - DestNMD->addOperand(SrcNMD->getOperand(i)); + DestNMD->addOperand(cast(MapValue(SrcNMD->getOperand(i), + ValueMap))); } } @@ -1243,7 +1245,7 @@ } // Insert all of the named mdnoes in Src into the Dest module. - LinkNamedMDNodes(Dest, Src); + LinkNamedMDNodes(Dest, Src, ValueMap); // Insert all of the globals in src into the Dest module... without linking // initializers (which could refer to functions not yet mapped over). From gohman at apple.com Tue Aug 24 14:37:11 2010 From: gohman at apple.com (Dan Gohman) Date: Tue, 24 Aug 2010 19:37:11 -0000 Subject: [llvm-commits] [llvm] r111949 - /llvm/trunk/lib/Linker/LinkModules.cpp Message-ID: <20100824193711.B58CD2A6C12C@llvm.org> Author: djg Date: Tue Aug 24 14:37:11 2010 New Revision: 111949 URL: http://llvm.org/viewvc/llvm-project?rev=111949&view=rev Log: Link NamedMDNodes after linking GlobalValues, so that MDNodes which reference GlobalValues are properly remapped. Modified: llvm/trunk/lib/Linker/LinkModules.cpp Modified: llvm/trunk/lib/Linker/LinkModules.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Linker/LinkModules.cpp?rev=111949&r1=111948&r2=111949&view=diff ============================================================================== --- llvm/trunk/lib/Linker/LinkModules.cpp (original) +++ llvm/trunk/lib/Linker/LinkModules.cpp Tue Aug 24 14:37:11 2010 @@ -1244,9 +1244,6 @@ AppendingVars.insert(std::make_pair(I->getName(), I)); } - // Insert all of the named mdnoes in Src into the Dest module. - LinkNamedMDNodes(Dest, Src, ValueMap); - // Insert all of the globals in src into the Dest module... without linking // initializers (which could refer to functions not yet mapped over). if (LinkGlobals(Dest, Src, ValueMap, AppendingVars, ErrorMsg)) @@ -1280,6 +1277,11 @@ // Resolve all uses of aliases with aliasees if (ResolveAliases(Dest)) return true; + // Remap all of the named mdnoes in Src into the Dest module. We do this + // after linking GlobalValues so that MDNodes that reference GlobalValues + // are properly remapped. + LinkNamedMDNodes(Dest, Src, ValueMap); + // If the source library's module id is in the dependent library list of the // destination library, remove it since that module is now linked in. sys::Path modId; From daniel at zuster.org Tue Aug 24 14:37:56 2010 From: daniel at zuster.org (Daniel Dunbar) Date: Tue, 24 Aug 2010 19:37:56 -0000 Subject: [llvm-commits] [llvm] r111950 - in /llvm/trunk: lib/Target/X86/AsmParser/X86AsmParser.cpp test/MC/AsmParser/X86/x86_instructions.s Message-ID: <20100824193756.3FB062A6C12D@llvm.org> Author: ddunbar Date: Tue Aug 24 14:37:56 2010 New Revision: 111950 URL: http://llvm.org/viewvc/llvm-project?rev=111950&view=rev Log: MC/X86: Tweak imul recognition, previous hack only applies for the imul form taking immediates. Modified: llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp llvm/trunk/test/MC/AsmParser/X86/x86_instructions.s Modified: llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp?rev=111950&r1=111949&r2=111950&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp (original) +++ llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp Tue Aug 24 14:37:56 2010 @@ -826,8 +826,10 @@ Operands.erase(Operands.begin() + 2); } - // FIXME: Hack to handle "imul A, B" which is an alias for "imul A, B, B". + // FIXME: Hack to handle "imul , B" which is an alias for "imul , B, + // B". if (Name.startswith("imul") && Operands.size() == 3 && + static_cast(Operands[1])->isImm() && static_cast(Operands.back())->isReg()) { X86Operand *Op = static_cast(Operands.back()); Operands.push_back(X86Operand::CreateReg(Op->getReg(), Op->getStartLoc(), Modified: llvm/trunk/test/MC/AsmParser/X86/x86_instructions.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AsmParser/X86/x86_instructions.s?rev=111950&r1=111949&r2=111950&view=diff ============================================================================== --- llvm/trunk/test/MC/AsmParser/X86/x86_instructions.s (original) +++ llvm/trunk/test/MC/AsmParser/X86/x86_instructions.s Tue Aug 24 14:37:56 2010 @@ -161,3 +161,6 @@ // CHECK: imull $12, %eax, %eax imul $12, %eax + +// CHECK: imull %ecx, %eax +imull %ecx, %eax From clattner at apple.com Tue Aug 24 14:39:12 2010 From: clattner at apple.com (Chris Lattner) Date: Tue, 24 Aug 2010 12:39:12 -0700 Subject: [llvm-commits] [llvm] r111895 - in /llvm/trunk: lib/AsmParser/LLParser.cpp lib/AsmParser/LLParser.h lib/Bitcode/Writer/ValueEnumerator.cpp lib/Bitcode/Writer/ValueEnumerator.h test/Feature/metadata.ll In-Reply-To: <9B67017B-2CCB-44B1-B5C2-09725677FCFE@apple.com> References: <20100824022403.E65C92A6C12C@llvm.org> <9B67017B-2CCB-44B1-B5C2-09725677FCFE@apple.com> Message-ID: <6D09339F-2027-4850-BD09-7399A3526F18@apple.com> >> >> It doesn't reject this either: >> >> define void @foo() { >> entry: >> call void @llvm.dbg.value(metadata !{i32* %t}, i64 0, metadata !"hello") >> %t = alloca i32 >> ret void >> } >> >> declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone >> >> Should it? > > IMO, yes. IMO, both should be accepted. metadata isn't a use, and doesn't follow dominance properties. -Chris From clattner at apple.com Tue Aug 24 14:40:51 2010 From: clattner at apple.com (Chris Lattner) Date: Tue, 24 Aug 2010 12:40:51 -0700 Subject: [llvm-commits] [llvm] r111945 - in /llvm/trunk: lib/Target/X86/AsmParser/X86AsmParser.cpp test/MC/AsmParser/X86/x86_instructions.s In-Reply-To: <20100824191339.06DB02A6C12C@llvm.org> References: <20100824191339.06DB02A6C12C@llvm.org> Message-ID: <2C619559-8272-4F95-81D0-27D6EBA9C53F@apple.com> On Aug 24, 2010, at 12:13 PM, Daniel Dunbar wrote: > Author: ddunbar > Date: Tue Aug 24 14:13:38 2010 > New Revision: 111945 > > URL: http://llvm.org/viewvc/llvm-project?rev=111945&view=rev > Log: > MC/X86: Warn on scale factors > 1 without index register, instead of erroring, > for 'as' compatibility. Is there a legitimate use for this? Why not reject it? -Chris From isanbard at gmail.com Tue Aug 24 15:00:52 2010 From: isanbard at gmail.com (Bill Wendling) Date: Tue, 24 Aug 2010 20:00:52 -0000 Subject: [llvm-commits] [llvm] r111952 - in /llvm/trunk: bindings/ada/llvm/llvm.ads lib/Linker/LinkModules.cpp tools/llvm-nm/llvm-nm.cpp Message-ID: <20100824200052.481642A6C12C@llvm.org> Author: void Date: Tue Aug 24 15:00:52 2010 New Revision: 111952 URL: http://llvm.org/viewvc/llvm-project?rev=111952&view=rev Log: - Add the LinkerPrivateWeakDefAutoLinkage to the Ada bindings. - Support the LinkerWeak*Linkage types in llvm-nm and in LinkModules.cpp. Modified: llvm/trunk/bindings/ada/llvm/llvm.ads llvm/trunk/lib/Linker/LinkModules.cpp llvm/trunk/tools/llvm-nm/llvm-nm.cpp Modified: llvm/trunk/bindings/ada/llvm/llvm.ads URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ada/llvm/llvm.ads?rev=111952&r1=111951&r2=111952&view=diff ============================================================================== --- llvm/trunk/bindings/ada/llvm/llvm.ads (original) +++ llvm/trunk/bindings/ada/llvm/llvm.ads Tue Aug 24 15:00:52 2010 @@ -317,25 +317,27 @@ LLVMGhostLinkage, LLVMCommonLinkage, LLVMLinkerPrivateLinkage, - LLVMLinkerPrivateWeakLinkage); + LLVMLinkerPrivateWeakLinkage, + LinkerPrivateWeakDefAutoLinkage); for LLVMLinkage use - (LLVMExternalLinkage => 0, - LLVMAvailableExternallyLinkage => 1, - LLVMLinkOnceAnyLinkage => 2, - LLVMLinkOnceODRLinkage => 3, - LLVMWeakAnyLinkage => 4, - LLVMWeakODRLinkage => 5, - LLVMAppendingLinkage => 6, - LLVMInternalLinkage => 7, - LLVMPrivateLinkage => 8, - LLVMDLLImportLinkage => 9, - LLVMDLLExportLinkage => 10, - LLVMExternalWeakLinkage => 11, - LLVMGhostLinkage => 12, - LLVMCommonLinkage => 13, - LLVMLinkerPrivateLinkage => 14, - LLVMLinkerPrivateWeakLinkage => 15); + (LLVMExternalLinkage => 0, + LLVMAvailableExternallyLinkage => 1, + LLVMLinkOnceAnyLinkage => 2, + LLVMLinkOnceODRLinkage => 3, + LLVMWeakAnyLinkage => 4, + LLVMWeakODRLinkage => 5, + LLVMAppendingLinkage => 6, + LLVMInternalLinkage => 7, + LLVMPrivateLinkage => 8, + LLVMDLLImportLinkage => 9, + LLVMDLLExportLinkage => 10, + LLVMExternalWeakLinkage => 11, + LLVMGhostLinkage => 12, + LLVMCommonLinkage => 13, + LLVMLinkerPrivateLinkage => 14, + LLVMLinkerPrivateWeakLinkage => 15, + LinkerPrivateWeakDefAutoLinkage => 16); pragma Convention (C, LLVMLinkage); Modified: llvm/trunk/lib/Linker/LinkModules.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Linker/LinkModules.cpp?rev=111952&r1=111951&r2=111952&view=diff ============================================================================== --- llvm/trunk/lib/Linker/LinkModules.cpp (original) +++ llvm/trunk/lib/Linker/LinkModules.cpp Tue Aug 24 15:00:52 2010 @@ -643,6 +643,12 @@ else if (SL == GlobalValue::LinkerPrivateLinkage && DL == GlobalValue::LinkerPrivateLinkage) return GlobalValue::LinkerPrivateLinkage; + else if (SL == GlobalValue::LinkerPrivateWeakLinkage && + DL == GlobalValue::LinkerPrivateWeakLinkage) + return GlobalValue::LinkerPrivateWeakLinkage; + else if (SL == GlobalValue::LinkerPrivateWeakDefAutoLinkage && + DL == GlobalValue::LinkerPrivateWeakDefAutoLinkage) + return GlobalValue::LinkerPrivateWeakDefAutoLinkage; else { assert (SL == GlobalValue::PrivateLinkage && DL == GlobalValue::PrivateLinkage && "Unexpected linkage type"); Modified: llvm/trunk/tools/llvm-nm/llvm-nm.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-nm/llvm-nm.cpp?rev=111952&r1=111951&r2=111952&view=diff ============================================================================== --- llvm/trunk/tools/llvm-nm/llvm-nm.cpp (original) +++ llvm/trunk/tools/llvm-nm/llvm-nm.cpp Tue Aug 24 15:00:52 2010 @@ -88,8 +88,11 @@ static void DumpSymbolNameForGlobalValue(GlobalValue &GV) { // Private linkage and available_externally linkage don't exist in symtab. - if (GV.hasPrivateLinkage() || GV.hasLinkerPrivateLinkage() || - GV.hasLinkerPrivateWeakLinkage() || GV.hasAvailableExternallyLinkage()) + if (GV.hasPrivateLinkage() || + GV.hasLinkerPrivateLinkage() || + GV.hasLinkerPrivateWeakLinkage() || + GV.hasLinkerPrivateWeakDefAutoLinkage() || + GV.hasAvailableExternallyLinkage()) return; const std::string SymbolAddrStr = " "; // Not used yet... From bruno.cardoso at gmail.com Tue Aug 24 15:17:13 2010 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Tue, 24 Aug 2010 13:17:13 -0700 Subject: [llvm-commits] [llvm] r111945 - in /llvm/trunk: lib/Target/X86/AsmParser/X86AsmParser.cpp test/MC/AsmParser/X86/x86_instructions.s In-Reply-To: <2C619559-8272-4F95-81D0-27D6EBA9C53F@apple.com> References: <20100824191339.06DB02A6C12C@llvm.org> <2C619559-8272-4F95-81D0-27D6EBA9C53F@apple.com> Message-ID: On Tue, Aug 24, 2010 at 12:40 PM, Chris Lattner wrote: > > On Aug 24, 2010, at 12:13 PM, Daniel Dunbar wrote: > >> Author: ddunbar >> Date: Tue Aug 24 14:13:38 2010 >> New Revision: 111945 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=111945&view=rev >> Log: >> MC/X86: Warn on scale factors > 1 without index register, instead of erroring, >> for 'as' compatibility. > > Is there a legitimate use for this? ?Why not reject it? Another approach would be to only accept these cases when the instruction explicitly use "eiz" and "riz" pseudo index registers (introduced in r109295). -- Bruno Cardoso Lopes http://www.brunocardoso.cc From gohman at apple.com Tue Aug 24 15:23:51 2010 From: gohman at apple.com (Dan Gohman) Date: Tue, 24 Aug 2010 20:23:51 -0000 Subject: [llvm-commits] [llvm] r111955 - /llvm/trunk/test/BugPoint/metadata.ll Message-ID: <20100824202351.D582B2A6C12C@llvm.org> Author: djg Date: Tue Aug 24 15:23:51 2010 New Revision: 111955 URL: http://llvm.org/viewvc/llvm-project?rev=111955&view=rev Log: Add a testcase for basic bugpointing in the presence of metadata. Added: llvm/trunk/test/BugPoint/metadata.ll Added: llvm/trunk/test/BugPoint/metadata.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/BugPoint/metadata.ll?rev=111955&view=auto ============================================================================== --- llvm/trunk/test/BugPoint/metadata.ll (added) +++ llvm/trunk/test/BugPoint/metadata.ll Tue Aug 24 15:23:51 2010 @@ -0,0 +1,34 @@ +; RUN: bugpoint -load %llvmlibsdir/BugpointPasses%shlibext %s -output-prefix %t -bugpoint-crashcalls -silence-passes > /dev/null +; RUN: llvm-dis %t-reduced-simplified.bc -o - | FileCheck %s + +; Bugpoint should keep the call's metadata attached to the call. + +; CHECK: call void @foo(), !dbg !0, !attach !2 +; CHECK: !0 = metadata !{i32 104, i32 105, metadata !1, metadata !1} +; CHECK: !1 = metadata !{i32 0, i32 0, i32 0, metadata !"source.c", metadata !"/dir", metadata !"me", i1 true, i1 false, metadata !"", i32 0} +; CHECK: !2 = metadata !{metadata !"the call to foo"} + +%rust_task = type {} +define void @test(i32* %a, i8* %b) { + %s = mul i8 22, 9, !attach !0, !dbg !10 + store i8 %s, i8* %b, !attach !1, !dbg !11 + call void @foo(), !attach !2, !dbg !12 + store i32 7, i32* %a, !attach !3, !dbg !13 + %t = add i32 0, 5, !attach !4, !dbg !14 + ret void +} + +declare void @foo() + +!0 = metadata !{metadata !"boring"} +!1 = metadata !{metadata !"uninteresting"} +!2 = metadata !{metadata !"the call to foo"} +!3 = metadata !{metadata !"noise"} +!4 = metadata !{metadata !"filler"} + +!9 = metadata !{i32 0, i32 0, i32 0, metadata !"source.c", metadata !"/dir", metadata !"me", i1 true, i1 false, metadata !"", i32 0} +!10 = metadata !{i32 100, i32 101, metadata !9, metadata !9} +!11 = metadata !{i32 102, i32 103, metadata !9, metadata !9} +!12 = metadata !{i32 104, i32 105, metadata !9, metadata !9} +!13 = metadata !{i32 106, i32 107, metadata !9, metadata !9} +!14 = metadata !{i32 108, i32 109, metadata !9, metadata !9} From enderby at apple.com Tue Aug 24 15:32:42 2010 From: enderby at apple.com (Kevin Enderby) Date: Tue, 24 Aug 2010 20:32:42 -0000 Subject: [llvm-commits] [llvm] r111956 - in /llvm/trunk: include/llvm/MC/MCContext.h include/llvm/MC/MCDwarf.h lib/MC/MCContext.cpp lib/MC/MCParser/AsmParser.cpp Message-ID: <20100824203242.425262A6C12C@llvm.org> Author: enderby Date: Tue Aug 24 15:32:42 2010 New Revision: 111956 URL: http://llvm.org/viewvc/llvm-project?rev=111956&view=rev Log: First bit of support for the dwarf .loc directive. This patch updates the needed parsing for the .loc directive and saves the current info from that into the context. The next patch will take the current loc info after an instruction is assembled and save that info into a vector for each section for use to build the line number tables. The patch after that will encode the info from those vectors into the output file as the dwarf line tables. Modified: llvm/trunk/include/llvm/MC/MCContext.h llvm/trunk/include/llvm/MC/MCDwarf.h llvm/trunk/lib/MC/MCContext.cpp llvm/trunk/lib/MC/MCParser/AsmParser.cpp Modified: llvm/trunk/include/llvm/MC/MCContext.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCContext.h?rev=111956&r1=111955&r2=111956&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCContext.h (original) +++ llvm/trunk/include/llvm/MC/MCContext.h Tue Aug 24 15:32:42 2010 @@ -11,6 +11,7 @@ #define LLVM_MC_MCCONTEXT_H #include "llvm/MC/SectionKind.h" +#include "llvm/MC/MCDwarf.h" #include "llvm/ADT/DenseMap.h" #include "llvm/ADT/StringMap.h" #include "llvm/Support/Allocator.h" @@ -24,6 +25,7 @@ class MCSymbol; class MCLabel; class MCDwarfFile; + class MCDwarfLoc; class StringRef; class Twine; class MCSectionMachO; @@ -69,6 +71,10 @@ std::vector MCDwarfFiles; std::vector MCDwarfDirs; + /// The current dwarf line information from the last dwarf .loc directive. + MCDwarfLoc CurrentDwarfLoc; + bool DwarfLocSeen; + /// Allocator - Allocator object used for creating machine code objects. /// /// We use a bump pointer allocator to avoid the need to track all allocated @@ -149,6 +155,8 @@ /// GetDwarfFile - creates an entry in the dwarf file and directory tables. unsigned GetDwarfFile(StringRef FileName, unsigned FileNumber); + bool ValidateDwarfFileNumber(unsigned FileNumber); + const std::vector &getMCDwarfFiles() { return MCDwarfFiles; } @@ -156,6 +164,19 @@ return MCDwarfDirs; } + /// setCurrentDwarfLoc - saves the information from the currently parsed + /// dwarf .loc directive and sets DwarfLocSeen. When the next instruction /// is assembled an entry in the line number table with this information and + /// the address of the instruction will be created. + void setCurrentDwarfLoc(unsigned FileNum, unsigned Line, unsigned Column, + unsigned Flags, unsigned Isa) { + CurrentDwarfLoc.setFileNum(FileNum); + CurrentDwarfLoc.setLine(Line); + CurrentDwarfLoc.setColumn(Column); + CurrentDwarfLoc.setFlags(Flags); + CurrentDwarfLoc.setIsa(Isa); + DwarfLocSeen = true; + } + /// @} char *getSecureLogFile() { return SecureLogFile; } Modified: llvm/trunk/include/llvm/MC/MCDwarf.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCDwarf.h?rev=111956&r1=111955&r2=111956&view=diff ============================================================================== --- llvm/trunk/include/llvm/MC/MCDwarf.h (original) +++ llvm/trunk/include/llvm/MC/MCDwarf.h Tue Aug 24 15:32:42 2010 @@ -57,6 +57,50 @@ void dump() const; }; + /// MCDwarfLoc - Instances of this class represent the information from a + /// dwarf .loc directive. + class MCDwarfLoc { + // FileNum - the file number. + unsigned FileNum; + // Line - the line number. + unsigned Line; + // Column - the column position. + unsigned Column; + // Flags (see #define's below) + unsigned Flags; + // Isa + unsigned Isa; + +#define DWARF2_FLAG_IS_STMT (1 << 0) +#define DWARF2_FLAG_BASIC_BLOCK (1 << 1) +#define DWARF2_FLAG_PROLOGUE_END (1 << 2) +#define DWARF2_FLAG_EPILOGUE_BEGIN (1 << 3) + + private: // MCContext manages these + friend class MCContext; + MCDwarfLoc(unsigned fileNum, unsigned line, unsigned column, unsigned flags, + unsigned isa) + : FileNum(fileNum), Line(line), Column(column), Flags(flags), Isa(isa) {} + + MCDwarfLoc(const MCDwarfLoc&); // DO NOT IMPLEMENT + void operator=(const MCDwarfLoc&); // DO NOT IMPLEMENT + public: + /// setFileNum - Set the FileNum of this MCDwarfLoc. + void setFileNum(unsigned fileNum) { FileNum = fileNum; } + + /// setLine - Set the Line of this MCDwarfLoc. + void setLine(unsigned line) { Line = line; } + + /// setColumn - Set the Column of this MCDwarfLoc. + void setColumn(unsigned column) { Column = column; } + + /// setFlags - Set the Flags of this MCDwarfLoc. + void setFlags(unsigned flags) { Flags = flags; } + + /// setIsa - Set the Isa of this MCDwarfLoc. + void setIsa(unsigned isa) { Isa = isa; } + }; + inline raw_ostream &operator<<(raw_ostream &OS, const MCDwarfFile &DwarfFile){ DwarfFile.print(OS); return OS; Modified: llvm/trunk/lib/MC/MCContext.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCContext.cpp?rev=111956&r1=111955&r2=111956&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCContext.cpp (original) +++ llvm/trunk/lib/MC/MCContext.cpp Tue Aug 24 15:32:42 2010 @@ -24,7 +24,8 @@ typedef StringMap COFFUniqueMapTy; -MCContext::MCContext(const MCAsmInfo &mai) : MAI(mai), NextUniqueID(0) { +MCContext::MCContext(const MCAsmInfo &mai) : MAI(mai), NextUniqueID(0), + CurrentDwarfLoc(0,0,0,0,0) { MachOUniquingMap = 0; ELFUniquingMap = 0; COFFUniquingMap = 0; @@ -32,6 +33,8 @@ SecureLogFile = getenv("AS_SECURE_LOG_FILE"); SecureLog = 0; SecureLogUsed = false; + + DwarfLocSeen = false; } MCContext::~MCContext() { @@ -247,3 +250,16 @@ // return the allocated FileNumber. return FileNumber; } + +/// ValidateDwarfFileNumber - takes a dwarf file number and returns true if it +/// currently is assigned and false otherwise. +bool MCContext::ValidateDwarfFileNumber(unsigned FileNumber) { + if(FileNumber == 0 || FileNumber >= MCDwarfFiles.size()) + return false; + + MCDwarfFile *&ExistingFile = MCDwarfFiles[FileNumber]; + if (ExistingFile) + return true; + else + return false; +} Modified: llvm/trunk/lib/MC/MCParser/AsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCParser/AsmParser.cpp?rev=111956&r1=111955&r2=111956&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCParser/AsmParser.cpp (original) +++ llvm/trunk/lib/MC/MCParser/AsmParser.cpp Tue Aug 24 15:32:42 2010 @@ -1838,39 +1838,101 @@ /// ParseDirectiveLoc -/// ::= .loc number [number [number]] +/// ::= .loc FileNumber LineNumber [ColumnPos] [basic_block] [prologue_end] +/// [epilogue_begin] [is_stmt VALUE] [isa VALUE] +/// The first number is a file number, must have been previously assigned with +/// a .file directive, the second number is the line number and optionally the +/// third number is a column position (zero if not specified). The remaining +/// optional items are .loc sub-directives. bool GenericAsmParser::ParseDirectiveLoc(StringRef, SMLoc DirectiveLoc) { + if (getLexer().isNot(AsmToken::Integer)) return TokError("unexpected token in '.loc' directive"); - - // FIXME: What are these fields? int64_t FileNumber = getTok().getIntVal(); - (void) FileNumber; - // FIXME: Validate file. + if (FileNumber < 1) + return TokError("file number less than one in '.loc' directive"); + if (!getContext().ValidateDwarfFileNumber(FileNumber)) + return TokError("unassigned file number in '.loc' directive"); + Lex(); + if (getLexer().isNot(AsmToken::Integer)) + return TokError("unexpected token in '.loc' directive"); + int64_t LineNumber = getTok().getIntVal(); + if (LineNumber < 1) + return TokError("line number less than one in '.loc' directive"); Lex(); - if (getLexer().isNot(AsmToken::EndOfStatement)) { - if (getLexer().isNot(AsmToken::Integer)) - return TokError("unexpected token in '.loc' directive"); - int64_t Param2 = getTok().getIntVal(); - (void) Param2; + int64_t ColumnPos = 0; + if (getLexer().is(AsmToken::Integer)) { + ColumnPos = getTok().getIntVal(); + if (ColumnPos < 0) + return TokError("column position less than zero in '.loc' directive"); Lex(); + } - if (getLexer().isNot(AsmToken::EndOfStatement)) { - if (getLexer().isNot(AsmToken::Integer)) + unsigned Flags = 0; + unsigned Isa = 0; + if (getLexer().isNot(AsmToken::EndOfStatement)) { + for (;;) { + if (getLexer().is(AsmToken::EndOfStatement)) + break; + + StringRef Name; + SMLoc Loc = getTok().getLoc(); + if (getParser().ParseIdentifier(Name)) return TokError("unexpected token in '.loc' directive"); - int64_t Param3 = getTok().getIntVal(); - (void) Param3; - Lex(); + if (Name == "basic_block") + Flags |= DWARF2_FLAG_BASIC_BLOCK; + else if (Name == "prologue_end") + Flags |= DWARF2_FLAG_PROLOGUE_END; + else if (Name == "epilogue_begin") + Flags |= DWARF2_FLAG_EPILOGUE_BEGIN; + else if (Name == "is_stmt") { + SMLoc Loc = getTok().getLoc(); + const MCExpr *Value; + if (getParser().ParseExpression(Value)) + return true; + // The expression must be the constant 0 or 1. + if (const MCConstantExpr *MCE = dyn_cast(Value)) { + int Value = MCE->getValue(); + if (Value == 0) + Flags &= ~DWARF2_FLAG_IS_STMT; + else if (Value == 1) + Flags |= DWARF2_FLAG_IS_STMT; + else + return Error(Loc, "is_stmt value not 0 or 1"); + } + else { + return Error(Loc, "is_stmt value not the constant value of 0 or 1"); + } + } + else if (Name == "isa") { + SMLoc Loc = getTok().getLoc(); + const MCExpr *Value; + if (getParser().ParseExpression(Value)) + return true; + // The expression must be a constant greater or equal to 0. + if (const MCConstantExpr *MCE = dyn_cast(Value)) { + int Value = MCE->getValue(); + if (Value < 0) + return Error(Loc, "isa number less than zero"); + Isa = Value; + } + else { + return Error(Loc, "isa number not a constant value"); + } + } + else { + return Error(Loc, "unknown sub-directive in '.loc' directive"); + } - // FIXME: Do something with the .loc. + if (getLexer().is(AsmToken::EndOfStatement)) + break; } } - if (getLexer().isNot(AsmToken::EndOfStatement)) - return TokError("unexpected token in '.file' directive"); + getContext().setCurrentDwarfLoc(FileNumber, LineNumber, ColumnPos, Flags,Isa); return false; } From resistor at mac.com Tue Aug 24 15:47:29 2010 From: resistor at mac.com (Owen Anderson) Date: Tue, 24 Aug 2010 20:47:29 -0000 Subject: [llvm-commits] [llvm] r111959 - /llvm/trunk/lib/Analysis/LazyValueInfo.cpp Message-ID: <20100824204729.481222A6C12C@llvm.org> Author: resistor Date: Tue Aug 24 15:47:29 2010 New Revision: 111959 URL: http://llvm.org/viewvc/llvm-project?rev=111959&view=rev Log: Add support for inferring that a load from a pointer implies that it is not null. Modified: llvm/trunk/lib/Analysis/LazyValueInfo.cpp Modified: llvm/trunk/lib/Analysis/LazyValueInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/LazyValueInfo.cpp?rev=111959&r1=111958&r2=111959&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/LazyValueInfo.cpp (original) +++ llvm/trunk/lib/Analysis/LazyValueInfo.cpp Tue Aug 24 15:47:29 2010 @@ -367,6 +367,7 @@ /// NewBlocks - This is a mapping of the new BasicBlocks which have been /// added to cache but that are not in sorted order. DenseSet NewBlockInfo; + public: LVIQuery(Value *V, LazyValueInfoCache &P, @@ -448,12 +449,24 @@ BBLV.markOverdefined(); Cache[BB] = BBLV; - // If V is live into BB, see if our predecessors know anything about it. Instruction *BBI = dyn_cast(Val); if (BBI == 0 || BBI->getParent() != BB) { LVILatticeVal Result; // Start Undefined. - unsigned NumPreds = 0; + // If this is a pointer, and there's a load from that pointer in this BB, + // then we know that the pointer can't be NULL. + if (Val->getType()->isPointerTy()) { + const PointerType *PTy = cast(Val->getType()); + for (Value::use_iterator UI = Val->use_begin(), UE = Val->use_end(); + UI != UE; ++UI) { + LoadInst *L = dyn_cast(*UI); + if (L && L->getParent() == BB) { + return LVILatticeVal::getNot(ConstantPointerNull::get(PTy)); + } + } + } + + unsigned NumPreds = 0; // Loop over all of our predecessors, merging what we know from them into // result. for (pred_iterator PI = pred_begin(BB), E = pred_end(BB); PI != E; ++PI) { @@ -694,8 +707,8 @@ << BB->getName() << "'\n"); LVILatticeVal Result = LVIQuery(V, *this, - ValueCache[LVIValueHandle(V, this)], - OverDefinedCache).getBlockValue(BB); + ValueCache[LVIValueHandle(V, this)], + OverDefinedCache).getBlockValue(BB); DEBUG(dbgs() << " Result = " << Result << "\n"); return Result; From gohman at apple.com Tue Aug 24 15:54:50 2010 From: gohman at apple.com (Dan Gohman) Date: Tue, 24 Aug 2010 20:54:50 -0000 Subject: [llvm-commits] [llvm] r111962 - /llvm/trunk/test/BugPoint/metadata.ll Message-ID: <20100824205450.B76582A6C12C@llvm.org> Author: djg Date: Tue Aug 24 15:54:50 2010 New Revision: 111962 URL: http://llvm.org/viewvc/llvm-project?rev=111962&view=rev Log: XFAIL this on mingw, following remove_arguments_test.ll. Modified: llvm/trunk/test/BugPoint/metadata.ll Modified: llvm/trunk/test/BugPoint/metadata.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/BugPoint/metadata.ll?rev=111962&r1=111961&r2=111962&view=diff ============================================================================== --- llvm/trunk/test/BugPoint/metadata.ll (original) +++ llvm/trunk/test/BugPoint/metadata.ll Tue Aug 24 15:54:50 2010 @@ -1,5 +1,6 @@ ; RUN: bugpoint -load %llvmlibsdir/BugpointPasses%shlibext %s -output-prefix %t -bugpoint-crashcalls -silence-passes > /dev/null ; RUN: llvm-dis %t-reduced-simplified.bc -o - | FileCheck %s +; XFAIL: mingw ; Bugpoint should keep the call's metadata attached to the call. From bigcheesegs at gmail.com Tue Aug 24 16:04:52 2010 From: bigcheesegs at gmail.com (Michael J. Spencer) Date: Tue, 24 Aug 2010 21:04:52 -0000 Subject: [llvm-commits] [llvm] r111963 - in /llvm/trunk: lib/MC/WinCOFFObjectWriter.cpp test/MC/COFF/basic-coff.ll test/MC/COFF/switch-relocations.ll test/MC/COFF/symbol-fragment-offset.ll Message-ID: <20100824210452.604492A6C12C@llvm.org> Author: mspencer Date: Tue Aug 24 16:04:52 2010 New Revision: 111963 URL: http://llvm.org/viewvc/llvm-project?rev=111963&view=rev Log: Fix COFF x86-64 relocations. PR7960. Multiple symbol reloc handling part of the patch by Cameron Esfahani. Added: llvm/trunk/test/MC/COFF/switch-relocations.ll Modified: llvm/trunk/lib/MC/WinCOFFObjectWriter.cpp llvm/trunk/test/MC/COFF/basic-coff.ll llvm/trunk/test/MC/COFF/symbol-fragment-offset.ll Modified: llvm/trunk/lib/MC/WinCOFFObjectWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/WinCOFFObjectWriter.cpp?rev=111963&r1=111962&r2=111963&view=diff ============================================================================== --- llvm/trunk/lib/MC/WinCOFFObjectWriter.cpp (original) +++ llvm/trunk/lib/MC/WinCOFFObjectWriter.cpp Tue Aug 24 16:04:52 2010 @@ -125,6 +125,7 @@ typedef DenseMap section_map; // Root level file contents. + bool Is64Bit; COFF::header Header; sections Sections; symbols Symbols; @@ -274,10 +275,11 @@ // WinCOFFObjectWriter class implementation WinCOFFObjectWriter::WinCOFFObjectWriter(raw_ostream &OS, bool is64Bit) - : MCObjectWriter(OS, true) { + : MCObjectWriter(OS, true) + , Is64Bit(is64Bit) { memset(&Header, 0, sizeof(Header)); - is64Bit ? Header.Machine = COFF::IMAGE_FILE_MACHINE_AMD64 + Is64Bit ? Header.Machine = COFF::IMAGE_FILE_MACHINE_AMD64 : Header.Machine = COFF::IMAGE_FILE_MACHINE_I386; } @@ -565,22 +567,34 @@ MCValue Target, uint64_t &FixedValue) { assert(Target.getSymA() != NULL && "Relocation must reference a symbol!"); - assert(Target.getSymB() == NULL && - "Relocation must reference only one symbol!"); + + const MCSymbol *A = &Target.getSymA()->getSymbol(); + MCSymbolData &A_SD = Asm.getSymbolData(*A); MCSectionData const *SectionData = Fragment->getParent(); - MCSymbolData const *SymbolData = - &Asm.getSymbolData(Target.getSymA()->getSymbol()); + // Mark this symbol as requiring an entry in the symbol table. assert(SectionMap.find(SectionData) != SectionMap.end() && "Section must already have been defined in ExecutePostLayoutBinding!"); - assert(SymbolMap.find(SymbolData) != SymbolMap.end() && + assert(SymbolMap.find(&A_SD) != SymbolMap.end() && "Symbol must already have been defined in ExecutePostLayoutBinding!"); COFFSection *coff_section = SectionMap[SectionData]; - COFFSymbol *coff_symbol = SymbolMap[SymbolData]; + COFFSymbol *coff_symbol = SymbolMap[&A_SD]; - FixedValue = Target.getConstant(); + if (Target.getSymB()) { + const MCSymbol *B = &Target.getSymB()->getSymbol(); + MCSymbolData &B_SD = Asm.getSymbolData(*B); + + FixedValue = Layout.getSymbolAddress(&A_SD) - Layout.getSymbolAddress(&B_SD); + + // In the case where we have SymbA and SymB, we just need to store the delta + // between the two symbols. Update FixedValue to account for the delta, and + // skip recording the relocation. + return; + } else { + FixedValue = Target.getConstant(); + } COFFRelocation Reloc; @@ -590,40 +604,29 @@ Reloc.Data.VirtualAddress += Fixup.getOffset(); - COFF::RelocationTypeX86 Type; - - if (Header.Machine == COFF::IMAGE_FILE_MACHINE_I386) { - switch (Fixup.getKind()) { - case X86::reloc_pcrel_4byte: - Type = COFF::IMAGE_REL_I386_REL32; - FixedValue += 4; - break; - case FK_Data_4: - Type = COFF::IMAGE_REL_I386_DIR32; - break; - default: + switch (Fixup.getKind()) { + case X86::reloc_pcrel_4byte: + case X86::reloc_riprel_4byte: + case X86::reloc_riprel_4byte_movq_load: + Reloc.Data.Type = Is64Bit ? COFF::IMAGE_REL_AMD64_REL32 + : COFF::IMAGE_REL_I386_REL32; + // FIXME: Can anyone explain what this does other than adjust for the size + // of the offset? + FixedValue += 4; + break; + case FK_Data_4: + Reloc.Data.Type = Is64Bit ? COFF::IMAGE_REL_AMD64_ADDR32 + : COFF::IMAGE_REL_I386_DIR32; + break; + case FK_Data_8: + if (Is64Bit) + Reloc.Data.Type = COFF::IMAGE_REL_AMD64_ADDR64; + else llvm_unreachable("unsupported relocation type"); - } - } else if (Header.Machine == COFF::IMAGE_FILE_MACHINE_AMD64) { - switch (Fixup.getKind()) { - case FK_Data_8: - Type = COFF::IMAGE_REL_AMD64_ADDR64; - break; - case X86::reloc_pcrel_4byte: - case X86::reloc_riprel_4byte: - Type = COFF::IMAGE_REL_AMD64_REL32; - FixedValue += 4; - break; - case FK_Data_4: - Type = COFF::IMAGE_REL_AMD64_ADDR32; - break; - default: - llvm_unreachable("unsupported relocation type"); - } - } else - llvm_unreachable("unknown target architecture"); - - Reloc.Data.Type = Type; + break; + default: + llvm_unreachable("unsupported relocation type"); + } coff_section->Relocations.push_back(Reloc); } Modified: llvm/trunk/test/MC/COFF/basic-coff.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/COFF/basic-coff.ll?rev=111963&r1=111962&r2=111963&view=diff ============================================================================== --- llvm/trunk/test/MC/COFF/basic-coff.ll (original) +++ llvm/trunk/test/MC/COFF/basic-coff.ll Tue Aug 24 16:04:52 2010 @@ -1,9 +1,9 @@ -; RUN: llc -filetype=obj %s -o %t -; RUN: coff-dump.py %abs_tmp | FileCheck %s +; This test checks that the COFF object emitter works for the most basic +; programs. -; ModuleID = '-' -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" -target triple = "i686-pc-win32" +; RUN: llc -filetype=obj -mtriple i686-pc-win32 %s -o %t +; RUN: coff-dump.py %abs_tmp | FileCheck %s +; RUN: llc -filetype=obj -mtriple x86_64-pc-win32 %s -o %t @.str = private constant [12 x i8] c"Hello World\00" ; <[12 x i8]*> [#uses=1] Added: llvm/trunk/test/MC/COFF/switch-relocations.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/COFF/switch-relocations.ll?rev=111963&view=auto ============================================================================== --- llvm/trunk/test/MC/COFF/switch-relocations.ll (added) +++ llvm/trunk/test/MC/COFF/switch-relocations.ll Tue Aug 24 16:04:52 2010 @@ -0,0 +1,34 @@ +; The purpose of this test is to see if the COFF object writer can properly +; relax the fixups that are created for jump tables on x86-64. See PR7960. + +; This test case was reduced from Lua/lapi.c. + +; RUN: llc -filetype=obj -mtriple i686-pc-win32 %s -o %t +; RUN: llc -filetype=obj -mtriple x86_64-pc-win32 %s -o %t + +define void @lua_gc(i32 %what) nounwind { +entry: + switch i32 %what, label %sw.epilog [ + i32 0, label %sw.bb + i32 1, label %sw.bb + i32 2, label %sw.bb + i32 3, label %sw.bb14 + i32 4, label %sw.bb18 + i32 6, label %sw.bb57 + ] + +sw.bb: ; preds = %entry, %entry, %entry + ret void + +sw.bb14: ; preds = %entry + ret void + +sw.bb18: ; preds = %entry + ret void + +sw.bb57: ; preds = %entry + ret void + +sw.epilog: ; preds = %entry + ret void +} Modified: llvm/trunk/test/MC/COFF/symbol-fragment-offset.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/COFF/symbol-fragment-offset.ll?rev=111963&r1=111962&r2=111963&view=diff ============================================================================== --- llvm/trunk/test/MC/COFF/symbol-fragment-offset.ll (original) +++ llvm/trunk/test/MC/COFF/symbol-fragment-offset.ll Tue Aug 24 16:04:52 2010 @@ -1,9 +1,9 @@ -; RUN: llc -filetype=obj %s -o %t -; RUN: coff-dump.py %abs_tmp | FileCheck %s +; The purpose of this test is to see if the COFF object writer is emitting the +; proper relocations for multiple pieces of data in a single data fragment. -; ModuleID = 'coff-fragment-test.c' -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" -target triple = "i686-pc-win32" +; RUN: llc -filetype=obj -mtriple i686-pc-win32 %s -o %t +; RUN: coff-dump.py %abs_tmp | FileCheck %s +; RUN: llc -filetype=obj -mtriple x86_64-pc-win32 %s -o %t @.str = private constant [7 x i8] c"Hello \00" ; <[7 x i8]*> [#uses=1] @str = internal constant [7 x i8] c"World!\00" ; <[7 x i8]*> [#uses=1] From enderby at apple.com Tue Aug 24 16:14:48 2010 From: enderby at apple.com (Kevin Enderby) Date: Tue, 24 Aug 2010 21:14:48 -0000 Subject: [llvm-commits] [llvm] r111967 - /llvm/trunk/lib/MC/MCParser/AsmParser.cpp Message-ID: <20100824211448.0EAF22A6C12C@llvm.org> Author: enderby Date: Tue Aug 24 16:14:47 2010 New Revision: 111967 URL: http://llvm.org/viewvc/llvm-project?rev=111967&view=rev Log: Change the parsing of .loc back to allow the LineNumber field to be optional as it is with other assemblers. Modified: llvm/trunk/lib/MC/MCParser/AsmParser.cpp Modified: llvm/trunk/lib/MC/MCParser/AsmParser.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCParser/AsmParser.cpp?rev=111967&r1=111966&r2=111967&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCParser/AsmParser.cpp (original) +++ llvm/trunk/lib/MC/MCParser/AsmParser.cpp Tue Aug 24 16:14:47 2010 @@ -1838,7 +1838,7 @@ /// ParseDirectiveLoc -/// ::= .loc FileNumber LineNumber [ColumnPos] [basic_block] [prologue_end] +/// ::= .loc FileNumber [LineNumber] [ColumnPos] [basic_block] [prologue_end] /// [epilogue_begin] [is_stmt VALUE] [isa VALUE] /// The first number is a file number, must have been previously assigned with /// a .file directive, the second number is the line number and optionally the @@ -1855,12 +1855,13 @@ return TokError("unassigned file number in '.loc' directive"); Lex(); - if (getLexer().isNot(AsmToken::Integer)) - return TokError("unexpected token in '.loc' directive"); - int64_t LineNumber = getTok().getIntVal(); - if (LineNumber < 1) - return TokError("line number less than one in '.loc' directive"); - Lex(); + int64_t LineNumber = 0; + if (getLexer().is(AsmToken::Integer)) { + LineNumber = getTok().getIntVal(); + if (LineNumber < 1) + return TokError("line number less than one in '.loc' directive"); + Lex(); + } int64_t ColumnPos = 0; if (getLexer().is(AsmToken::Integer)) { From grosbach at apple.com Tue Aug 24 16:19:33 2010 From: grosbach at apple.com (Jim Grosbach) Date: Tue, 24 Aug 2010 21:19:33 -0000 Subject: [llvm-commits] [llvm] r111968 - in /llvm/trunk: include/llvm/Target/TargetRegisterInfo.h lib/CodeGen/LocalStackSlotAllocation.cpp lib/Target/ARM/ARMBaseRegisterInfo.cpp lib/Target/ARM/ARMBaseRegisterInfo.h Message-ID: <20100824211933.90A322A6C12C@llvm.org> Author: grosbach Date: Tue Aug 24 16:19:33 2010 New Revision: 111968 URL: http://llvm.org/viewvc/llvm-project?rev=111968&view=rev Log: Add ARM heuristic for when to allocate a virtual base register for stack access. rdar://8277890&7352504 Modified: llvm/trunk/include/llvm/Target/TargetRegisterInfo.h llvm/trunk/lib/CodeGen/LocalStackSlotAllocation.cpp llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h Modified: llvm/trunk/include/llvm/Target/TargetRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetRegisterInfo.h?rev=111968&r1=111967&r2=111968&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetRegisterInfo.h (original) +++ llvm/trunk/include/llvm/Target/TargetRegisterInfo.h Tue Aug 24 16:19:33 2010 @@ -653,7 +653,7 @@ /// reference would be better served by a base register other than FP /// or SP. Used by LocalStackFrameAllocation to determine which frame index /// references it should create new base registers for. - virtual bool needsFrameBaseReg(MachineInstr *MI, unsigned operand) const { + virtual bool needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const { return false; } Modified: llvm/trunk/lib/CodeGen/LocalStackSlotAllocation.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LocalStackSlotAllocation.cpp?rev=111968&r1=111967&r2=111968&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/LocalStackSlotAllocation.cpp (original) +++ llvm/trunk/lib/CodeGen/LocalStackSlotAllocation.cpp Tue Aug 24 16:19:33 2010 @@ -250,7 +250,7 @@ continue; DEBUG(dbgs() << "Considering: " << *MI); - if (TRI->needsFrameBaseReg(MI, i)) { + if (TRI->needsFrameBaseReg(MI, LocalOffsets[FrameIdx])) { unsigned BaseReg = 0; int64_t Offset = 0; int64_t FrameSizeAdjust = StackGrowsDown ? MFI->getLocalFrameSize() Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp?rev=111968&r1=111967&r2=111968&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Tue Aug 24 16:19:33 2010 @@ -44,7 +44,7 @@ ReuseFrameIndexVals("arm-reuse-frame-index-vals", cl::Hidden, cl::init(true), cl::desc("Reuse repeated frame index values")); static cl::opt -ForceAllBaseRegAlloc("arm-force-base-reg-alloc", cl::Hidden, cl::init(true), +ForceAllBaseRegAlloc("arm-force-base-reg-alloc", cl::Hidden, cl::init(false), cl::desc("Force use of virtual base registers for stack load/store")); static cl::opt EnableLocalStackAlloc("enable-local-stack-alloc", cl::init(false), cl::Hidden, @@ -1436,9 +1436,10 @@ /// or SP. Used by LocalStackFrameAllocation to determine which frame index /// references it should create new base registers for. bool ARMBaseRegisterInfo:: -needsFrameBaseReg(MachineInstr *MI, unsigned operand) const { - assert (MI->getOperand(operand).isFI() && - "needsFrameBaseReg() called on non Frame Index operand!"); +needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const { + for (unsigned i = 0; !MI->getOperand(i).isFI(); ++i) { + assert(i < MI->getNumOperands() &&"Instr doesn't have FrameIndex operand!"); + } // It's the load/store FI references that cause issues, as it can be difficult // to materialize the offset if it won't fit in the literal field. Estimate @@ -1465,12 +1466,49 @@ return false; } - // FIXME: TODO // Without a virtual base register, if the function has variable sized // objects, all fixed-size local references will be via the frame pointer, - // otherwise via the stack pointer. Approximate the offset and see if it's - // legal for the instruction. + // Approximate the offset and see if it's legal for the instruction. + // Note that the incoming offset is based on the SP value at function entry, + // so it'll be negative. + MachineFunction &MF = *MI->getParent()->getParent(); + MachineFrameInfo *MFI = MF.getFrameInfo(); + ARMFunctionInfo *AFI = MF.getInfo(); + + // Estimate an offset from the frame pointer. + // Conservatively assume all callee-saved registers get pushed. R4-R6 + // will be earlier than the FP, so we ignore those. + // R7, LR + int64_t FPOffset = Offset - 8; + // ARM and Thumb2 functions also need to consider R8-R11 and D8-D15 + if (!AFI->isThumbFunction() || !AFI->isThumb1OnlyFunction()) + FPOffset -= 80; + // Estimate an offset from the stack pointer. + Offset = -Offset; + // Assume that we'll have at least some spill slots allocated. + // FIXME: This is a total SWAG number. We should run some statistics + // and pick a real one. + Offset += 128; // 128 bytes of spill slots + + // If there is a frame pointer, try using it. + // The FP is only available if there is no dynamic realignment. We + // don't know for sure yet whether we'll need that, so we guess based + // on whether there are any local variables that would trigger it. + unsigned StackAlign = MF.getTarget().getFrameInfo()->getStackAlignment(); + if (hasFP(MF) && + !((MFI->getLocalFrameMaxAlign() > StackAlign) && canRealignStack(MF))) { + if (isFrameOffsetLegal(MI, FPOffset)) + return false; + } + // If we can reference via the stack pointer, try that. + // FIXME: This (and the code that resolves the references) can be improved + // to only disallow SP relative references in the live range of + // the VLA(s). In practice, it's unclear how much difference that + // would make, but it may be worth doing. + if (!MFI->hasVarSizedObjects() && isFrameOffsetLegal(MI, Offset)) + return false; + // The offset likely isn't legal, we want to allocate a virtual base register. return true; } Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h?rev=111968&r1=111967&r2=111968&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h (original) +++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h Tue Aug 24 16:19:33 2010 @@ -106,7 +106,7 @@ bool canRealignStack(const MachineFunction &MF) const; bool needsStackRealignment(const MachineFunction &MF) const; int64_t getFrameIndexInstrOffset(MachineInstr *MI, int Idx) const; - bool needsFrameBaseReg(MachineInstr *MI, unsigned operand) const; + bool needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const; void materializeFrameBaseRegister(MachineBasicBlock::iterator I, unsigned BaseReg, int FrameIdx, int64_t Offset) const; From resistor at mac.com Tue Aug 24 16:59:43 2010 From: resistor at mac.com (Owen Anderson) Date: Tue, 24 Aug 2010 21:59:43 -0000 Subject: [llvm-commits] [llvm] r111971 - /llvm/trunk/lib/Analysis/LazyValueInfo.cpp Message-ID: <20100824215943.160D52A6C12C@llvm.org> Author: resistor Date: Tue Aug 24 16:59:42 2010 New Revision: 111971 URL: http://llvm.org/viewvc/llvm-project?rev=111971&view=rev Log: Add support for inferring values for the default cases of switches. Modified: llvm/trunk/lib/Analysis/LazyValueInfo.cpp Modified: llvm/trunk/lib/Analysis/LazyValueInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/LazyValueInfo.cpp?rev=111971&r1=111970&r2=111971&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/LazyValueInfo.cpp (original) +++ llvm/trunk/lib/Analysis/LazyValueInfo.cpp Tue Aug 24 16:59:42 2010 @@ -671,9 +671,28 @@ // If the edge was formed by a switch on the value, then we may know exactly // what it is. if (SwitchInst *SI = dyn_cast(BBFrom->getTerminator())) { - // If BBTo is the default destination of the switch, we don't know anything. - // Given a more powerful range analysis we could know stuff. - if (SI->getCondition() == Val && SI->getDefaultDest() != BBTo) { + // If BBTo is the default destination of the switch, we know that it + // doesn't have the same value as any of the cases. + if (SI->getCondition() == Val) { + if (SI->getDefaultDest() == BBTo) { + const IntegerType *IT = cast(Val->getType()); + ConstantRange CR(IT->getBitWidth()); + + for (unsigned i = 1, e = SI->getNumSuccessors(); i != e; ++i) { + const APInt CaseVal = SI->getCaseValue(i)->getValue(); + ConstantRange CaseRange(CaseVal, CaseVal+1); + CaseRange = CaseRange.inverse(); + CR = CR.intersectWith(CaseRange); + } + + LVILatticeVal Result; + if (CR.isFullSet() || CR.isEmptySet()) + Result.markOverdefined(); + else + Result.markConstantRange(CR); + return Result; + } + // We only know something if there is exactly one value that goes from // BBFrom to BBTo. unsigned NumEdges = 0; From resistor at mac.com Tue Aug 24 17:00:55 2010 From: resistor at mac.com (Owen Anderson) Date: Tue, 24 Aug 2010 22:00:55 -0000 Subject: [llvm-commits] [llvm] r111972 - /llvm/trunk/lib/Analysis/LazyValueInfo.cpp Message-ID: <20100824220055.9F37B2A6C12C@llvm.org> Author: resistor Date: Tue Aug 24 17:00:55 2010 New Revision: 111972 URL: http://llvm.org/viewvc/llvm-project?rev=111972&view=rev Log: NULL loads are only invalid in the default address space. Modified: llvm/trunk/lib/Analysis/LazyValueInfo.cpp Modified: llvm/trunk/lib/Analysis/LazyValueInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/LazyValueInfo.cpp?rev=111972&r1=111971&r2=111972&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/LazyValueInfo.cpp (original) +++ llvm/trunk/lib/Analysis/LazyValueInfo.cpp Tue Aug 24 17:00:55 2010 @@ -460,7 +460,7 @@ for (Value::use_iterator UI = Val->use_begin(), UE = Val->use_end(); UI != UE; ++UI) { LoadInst *L = dyn_cast(*UI); - if (L && L->getParent() == BB) { + if (L && L->getParent() == BB && L->getPointerAddressSpace() == 0) { return LVILatticeVal::getNot(ConstantPointerNull::get(PTy)); } } From echristo at apple.com Tue Aug 24 17:03:02 2010 From: echristo at apple.com (Eric Christopher) Date: Tue, 24 Aug 2010 22:03:02 -0000 Subject: [llvm-commits] [llvm] r111973 - /llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Message-ID: <20100824220302.C9EEA2A6C12C@llvm.org> Author: echristo Date: Tue Aug 24 17:03:02 2010 New Revision: 111973 URL: http://llvm.org/viewvc/llvm-project?rev=111973&view=rev Log: Fix thumb2 mode loads to have the correct operand ordering. Add a todo to fix this in the port. Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=111973&r1=111972&r2=111973&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Tue Aug 24 17:03:02 2010 @@ -419,10 +419,15 @@ // TODO: Verify the additions above work, otherwise we'll need to add the // offset instead of 0 and do all sorts of operand munging. unsigned ResultReg = createResultReg(FixedRC); - unsigned Opc = AFI->isThumb2Function() ? ARM::tLDR : ARM::LDR; - AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, - TII.get(Opc), ResultReg) - .addReg(Reg).addReg(0).addImm(0)); + // TODO: Fix the Addressing modes so that these can share some code. + if (AFI->isThumb2Function()) + AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, + TII.get(ARM::tLDR), ResultReg) + .addReg(Reg).addImm(0).addReg(0)); + else + AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, + TII.get(ARM::LDR), ResultReg) + .addReg(Reg).addReg(0).addImm(0)); UpdateValueMap(I, ResultReg); return true; From echristo at apple.com Tue Aug 24 17:07:27 2010 From: echristo at apple.com (Eric Christopher) Date: Tue, 24 Aug 2010 22:07:27 -0000 Subject: [llvm-commits] [llvm] r111974 - /llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Message-ID: <20100824220727.33A5E2A6C12C@llvm.org> Author: echristo Date: Tue Aug 24 17:07:27 2010 New Revision: 111974 URL: http://llvm.org/viewvc/llvm-project?rev=111974&view=rev Log: Rework braindead conditionals I put in yesterday. Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=111974&r1=111973&r2=111974&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Tue Aug 24 17:07:27 2010 @@ -365,20 +365,18 @@ Value *Op0 = I->getOperand(0); // Verify it's an alloca. - const Instruction *Inst = dyn_cast(Op0); - if (!Inst || Inst->getOpcode() != Instruction::Alloca) return false; + if (const AllocaInst *AI = dyn_cast(Op0)) { + DenseMap::iterator SI = + FuncInfo.StaticAllocaMap.find(AI); - const AllocaInst *AI = cast(Op0); - DenseMap::iterator SI = - FuncInfo.StaticAllocaMap.find(AI); - - if (SI != FuncInfo.StaticAllocaMap.end()) { - unsigned ResultReg = createResultReg(FixedRC); - TII.loadRegFromStackSlot(*FuncInfo.MBB, *FuncInfo.InsertPt, - ResultReg, SI->second, FixedRC, - TM.getRegisterInfo()); - UpdateValueMap(I, ResultReg); - return true; + if (SI != FuncInfo.StaticAllocaMap.end()) { + unsigned ResultReg = createResultReg(FixedRC); + TII.loadRegFromStackSlot(*FuncInfo.MBB, *FuncInfo.InsertPt, + ResultReg, SI->second, FixedRC, + TM.getRegisterInfo()); + UpdateValueMap(I, ResultReg); + return true; + } } return false; From bob.wilson at apple.com Tue Aug 24 17:28:57 2010 From: bob.wilson at apple.com (Bob Wilson) Date: Tue, 24 Aug 2010 15:28:57 -0700 Subject: [llvm-commits] [llvm] r111973 - /llvm/trunk/lib/Target/ARM/ARMFastISel.cpp In-Reply-To: <20100824220302.C9EEA2A6C12C@llvm.org> References: <20100824220302.C9EEA2A6C12C@llvm.org> Message-ID: On Aug 24, 2010, at 3:03 PM, Eric Christopher wrote: > Author: echristo > Date: Tue Aug 24 17:03:02 2010 > New Revision: 111973 > > URL: http://llvm.org/viewvc/llvm-project?rev=111973&view=rev > Log: > Fix thumb2 mode loads to have the correct operand ordering. Add a todo > to fix this in the port. > > Modified: > llvm/trunk/lib/Target/ARM/ARMFastISel.cpp > > Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=111973&r1=111972&r2=111973&view=diff > ============================================================================== > --- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original) > +++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Tue Aug 24 17:03:02 2010 > @@ -419,10 +419,15 @@ > // TODO: Verify the additions above work, otherwise we'll need to add the > // offset instead of 0 and do all sorts of operand munging. > unsigned ResultReg = createResultReg(FixedRC); > - unsigned Opc = AFI->isThumb2Function() ? ARM::tLDR : ARM::LDR; > - AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, > - TII.get(Opc), ResultReg) > - .addReg(Reg).addReg(0).addImm(0)); > + // TODO: Fix the Addressing modes so that these can share some code. > + if (AFI->isThumb2Function()) > + AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, > + TII.get(ARM::tLDR), ResultReg) > + .addReg(Reg).addImm(0).addReg(0)); You're checking for Thumb2 but then generating a Thumb1 LDR. That doesn't seem right. > + else > + AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, > + TII.get(ARM::LDR), ResultReg) > + .addReg(Reg).addReg(0).addImm(0)); > UpdateValueMap(I, ResultReg); > > return true; > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From echristo at apple.com Tue Aug 24 17:30:10 2010 From: echristo at apple.com (Eric Christopher) Date: Tue, 24 Aug 2010 15:30:10 -0700 Subject: [llvm-commits] [llvm] r111973 - /llvm/trunk/lib/Target/ARM/ARMFastISel.cpp In-Reply-To: References: <20100824220302.C9EEA2A6C12C@llvm.org> Message-ID: On Aug 24, 2010, at 3:28 PM, Bob Wilson wrote: > > On Aug 24, 2010, at 3:03 PM, Eric Christopher wrote: > >> Author: echristo >> Date: Tue Aug 24 17:03:02 2010 >> New Revision: 111973 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=111973&view=rev >> Log: >> Fix thumb2 mode loads to have the correct operand ordering. Add a todo >> to fix this in the port. >> >> Modified: >> llvm/trunk/lib/Target/ARM/ARMFastISel.cpp >> >> Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp >> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=111973&r1=111972&r2=111973&view=diff >> ============================================================================== >> --- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original) >> +++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Tue Aug 24 17:03:02 2010 >> @@ -419,10 +419,15 @@ >> // TODO: Verify the additions above work, otherwise we'll need to add the >> // offset instead of 0 and do all sorts of operand munging. >> unsigned ResultReg = createResultReg(FixedRC); >> - unsigned Opc = AFI->isThumb2Function() ? ARM::tLDR : ARM::LDR; >> - AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, >> - TII.get(Opc), ResultReg) >> - .addReg(Reg).addReg(0).addImm(0)); >> + // TODO: Fix the Addressing modes so that these can share some code. >> + if (AFI->isThumb2Function()) >> + AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, >> + TII.get(ARM::tLDR), ResultReg) >> + .addReg(Reg).addImm(0).addReg(0)); > > You're checking for Thumb2 but then generating a Thumb1 LDR. That doesn't seem right. It's just a more restricted instruction afaict. It seems to exist from my reading of things and the optimization passes that handle it. (Thumb2SizeReduction etc). -eric From echristo at apple.com Tue Aug 24 17:34:11 2010 From: echristo at apple.com (Eric Christopher) Date: Tue, 24 Aug 2010 22:34:11 -0000 Subject: [llvm-commits] [llvm] r111981 - /llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Message-ID: <20100824223411.DE6572A6C12C@llvm.org> Author: echristo Date: Tue Aug 24 17:34:11 2010 New Revision: 111981 URL: http://llvm.org/viewvc/llvm-project?rev=111981&view=rev Log: Fix predicate and add a comment. Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=111981&r1=111980&r2=111981&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Tue Aug 24 17:34:11 2010 @@ -418,7 +418,8 @@ // offset instead of 0 and do all sorts of operand munging. unsigned ResultReg = createResultReg(FixedRC); // TODO: Fix the Addressing modes so that these can share some code. - if (AFI->isThumb2Function()) + // Since this is a Thumb1 load this will work in Thumb1 or 2 mode. + if (AFI->isThumbFunction()) AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(ARM::tLDR), ResultReg) .addReg(Reg).addImm(0).addReg(0)); From echristo at apple.com Tue Aug 24 17:35:18 2010 From: echristo at apple.com (Eric Christopher) Date: Tue, 24 Aug 2010 15:35:18 -0700 Subject: [llvm-commits] [llvm] r111973 - /llvm/trunk/lib/Target/ARM/ARMFastISel.cpp In-Reply-To: References: <20100824220302.C9EEA2A6C12C@llvm.org> Message-ID: >>> >> >> You're checking for Thumb2 but then generating a Thumb1 LDR. That doesn't seem right. > > It's just a more restricted instruction afaict. It seems to exist from my reading of things and the optimization passes that handle it. (Thumb2SizeReduction etc). *small conversation later* Ooooooo! Fixed. :) -eric From grosbach at apple.com Tue Aug 24 17:38:45 2010 From: grosbach at apple.com (Jim Grosbach) Date: Tue, 24 Aug 2010 15:38:45 -0700 Subject: [llvm-commits] [llvm] r111973 - /llvm/trunk/lib/Target/ARM/ARMFastISel.cpp In-Reply-To: References: <20100824220302.C9EEA2A6C12C@llvm.org> Message-ID: <46704F9F-F5FE-4BCF-9900-21A16DFB64B1@apple.com> On Aug 24, 2010, at 3:30 PM, Eric Christopher wrote: > > On Aug 24, 2010, at 3:28 PM, Bob Wilson wrote: > >> >> On Aug 24, 2010, at 3:03 PM, Eric Christopher wrote: >> >>> Author: echristo >>> Date: Tue Aug 24 17:03:02 2010 >>> New Revision: 111973 >>> >>> URL: http://llvm.org/viewvc/llvm-project?rev=111973&view=rev >>> Log: >>> Fix thumb2 mode loads to have the correct operand ordering. Add a todo >>> to fix this in the port. >>> >>> Modified: >>> llvm/trunk/lib/Target/ARM/ARMFastISel.cpp >>> >>> Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp >>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=111973&r1=111972&r2=111973&view=diff >>> ============================================================================== >>> --- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original) >>> +++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Tue Aug 24 17:03:02 2010 >>> @@ -419,10 +419,15 @@ >>> // TODO: Verify the additions above work, otherwise we'll need to add the >>> // offset instead of 0 and do all sorts of operand munging. >>> unsigned ResultReg = createResultReg(FixedRC); >>> - unsigned Opc = AFI->isThumb2Function() ? ARM::tLDR : ARM::LDR; >>> - AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, >>> - TII.get(Opc), ResultReg) >>> - .addReg(Reg).addReg(0).addImm(0)); >>> + // TODO: Fix the Addressing modes so that these can share some code. >>> + if (AFI->isThumb2Function()) >>> + AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, >>> + TII.get(ARM::tLDR), ResultReg) >>> + .addReg(Reg).addImm(0).addReg(0)); >> >> You're checking for Thumb2 but then generating a Thumb1 LDR. That doesn't seem right. > > It's just a more restricted instruction afaict. It seems to exist from my reading of things and the optimization passes that handle it. (Thumb2SizeReduction etc). Basically, yeah. It's very restrictive on immediate offset (multiples of 4, 0-124). Since it's known here that the immediate is zero, that should be fine, if a bit off. As a side note, if you use t2LDRi12 here, the Thumb2SizeReduction pass should be able to auto-magically shrink it to the 16-bit instruction. -Jim From echristo at apple.com Tue Aug 24 17:39:30 2010 From: echristo at apple.com (Eric Christopher) Date: Tue, 24 Aug 2010 15:39:30 -0700 Subject: [llvm-commits] [llvm] r111973 - /llvm/trunk/lib/Target/ARM/ARMFastISel.cpp In-Reply-To: <46704F9F-F5FE-4BCF-9900-21A16DFB64B1@apple.com> References: <20100824220302.C9EEA2A6C12C@llvm.org> <46704F9F-F5FE-4BCF-9900-21A16DFB64B1@apple.com> Message-ID: <4364BBA1-B386-449D-8A8E-957FA533D0E9@apple.com> >> > > Basically, yeah. It's very restrictive on immediate offset (multiples of 4, 0-124). Since it's known here that the immediate is zero, that should be fine, if a bit off. > > As a side note, if you use t2LDRi12 here, the Thumb2SizeReduction pass should be able to auto-magically shrink it to the 16-bit instruction. Nifty. OK. -eric From sabre at nondot.org Tue Aug 24 17:43:11 2010 From: sabre at nondot.org (Chris Lattner) Date: Tue, 24 Aug 2010 22:43:11 -0000 Subject: [llvm-commits] [llvm] r111982 - in /llvm/trunk/lib/CodeGen/SelectionDAG: LegalizeTypes.h LegalizeVectorTypes.cpp Message-ID: <20100824224312.065972A6C12C@llvm.org> Author: lattner Date: Tue Aug 24 17:43:11 2010 New Revision: 111982 URL: http://llvm.org/viewvc/llvm-project?rev=111982&view=rev Log: tidy up, reduce indentation Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=111982&r1=111981&r2=111982&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h Tue Aug 24 17:43:11 2010 @@ -86,8 +86,7 @@ // 2) For vectors, use a wider vector type (e.g. v3i32 -> v4i32). if (!VT.isVector()) return PromoteInteger; - else - return WidenVector; + return WidenVector; case TargetLowering::Expand: // Expand can mean // 1) split scalar in half, 2) convert a float to an integer, @@ -95,16 +94,15 @@ if (!VT.isVector()) { if (VT.isInteger()) return ExpandInteger; - else if (VT.getSizeInBits() == - TLI.getTypeToTransformTo(*DAG.getContext(), VT).getSizeInBits()) + if (VT.getSizeInBits() == + TLI.getTypeToTransformTo(*DAG.getContext(), VT).getSizeInBits()) return SoftenFloat; - else - return ExpandFloat; - } else if (VT.getVectorNumElements() == 1) { - return ScalarizeVector; - } else { - return SplitVector; + return ExpandFloat; } + + if (VT.getVectorNumElements() == 1) + return ScalarizeVector; + return SplitVector; } } Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp?rev=111982&r1=111981&r2=111982&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp Tue Aug 24 17:43:11 2010 @@ -1274,8 +1274,8 @@ EVT VT = WidenVT; unsigned NumElts = VT.getVectorNumElements(); while (!TLI.isTypeSynthesizable(VT) && NumElts != 1) { - NumElts = NumElts / 2; - VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts); + NumElts = NumElts / 2; + VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts); } if (NumElts != 1 && !TLI.canOpTrap(N->getOpcode(), VT)) { @@ -1283,124 +1283,123 @@ SDValue InOp1 = GetWidenedVector(N->getOperand(0)); SDValue InOp2 = GetWidenedVector(N->getOperand(1)); return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2); - } else if (NumElts == 1) { - // No legal vector version so unroll the vector operation and then widen. + } + + // No legal vector version so unroll the vector operation and then widen. + if (NumElts == 1) return DAG.UnrollVectorOp(N, WidenVT.getVectorNumElements()); - } else { - // Since the operation can trap, apply operation on the original vector. - EVT MaxVT = VT; - SDValue InOp1 = GetWidenedVector(N->getOperand(0)); - SDValue InOp2 = GetWidenedVector(N->getOperand(1)); - unsigned CurNumElts = N->getValueType(0).getVectorNumElements(); + + // Since the operation can trap, apply operation on the original vector. + EVT MaxVT = VT; + SDValue InOp1 = GetWidenedVector(N->getOperand(0)); + SDValue InOp2 = GetWidenedVector(N->getOperand(1)); + unsigned CurNumElts = N->getValueType(0).getVectorNumElements(); - SmallVector ConcatOps(CurNumElts); - unsigned ConcatEnd = 0; // Current ConcatOps index. - int Idx = 0; // Current Idx into input vectors. - - // NumElts := greatest synthesizable vector size (at most WidenVT) - // while (orig. vector has unhandled elements) { - // take munches of size NumElts from the beginning and add to ConcatOps - // NumElts := next smaller supported vector size or 1 - // } - while (CurNumElts != 0) { - while (CurNumElts >= NumElts) { - SDValue EOp1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp1, - DAG.getIntPtrConstant(Idx)); - SDValue EOp2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp2, - DAG.getIntPtrConstant(Idx)); - ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, VT, EOp1, EOp2); - Idx += NumElts; - CurNumElts -= NumElts; - } - do { - NumElts = NumElts / 2; - VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts); - } while (!TLI.isTypeSynthesizable(VT) && NumElts != 1); - - if (NumElts == 1) { - for (unsigned i = 0; i != CurNumElts; ++i, ++Idx) { - SDValue EOp1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT, - InOp1, DAG.getIntPtrConstant(Idx)); - SDValue EOp2 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT, - InOp2, DAG.getIntPtrConstant(Idx)); - ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, WidenEltVT, - EOp1, EOp2); - } - CurNumElts = 0; + SmallVector ConcatOps(CurNumElts); + unsigned ConcatEnd = 0; // Current ConcatOps index. + int Idx = 0; // Current Idx into input vectors. + + // NumElts := greatest synthesizable vector size (at most WidenVT) + // while (orig. vector has unhandled elements) { + // take munches of size NumElts from the beginning and add to ConcatOps + // NumElts := next smaller supported vector size or 1 + // } + while (CurNumElts != 0) { + while (CurNumElts >= NumElts) { + SDValue EOp1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp1, + DAG.getIntPtrConstant(Idx)); + SDValue EOp2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp2, + DAG.getIntPtrConstant(Idx)); + ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, VT, EOp1, EOp2); + Idx += NumElts; + CurNumElts -= NumElts; + } + do { + NumElts = NumElts / 2; + VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts); + } while (!TLI.isTypeSynthesizable(VT) && NumElts != 1); + + if (NumElts == 1) { + for (unsigned i = 0; i != CurNumElts; ++i, ++Idx) { + SDValue EOp1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT, + InOp1, DAG.getIntPtrConstant(Idx)); + SDValue EOp2 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT, + InOp2, DAG.getIntPtrConstant(Idx)); + ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, WidenEltVT, + EOp1, EOp2); } + CurNumElts = 0; } + } - // Check to see if we have a single operation with the widen type. - if (ConcatEnd == 1) { - VT = ConcatOps[0].getValueType(); - if (VT == WidenVT) - return ConcatOps[0]; - } - - // while (Some element of ConcatOps is not of type MaxVT) { - // From the end of ConcatOps, collect elements of the same type and put - // them into an op of the next larger supported type - // } - while (ConcatOps[ConcatEnd-1].getValueType() != MaxVT) { - Idx = ConcatEnd - 1; - VT = ConcatOps[Idx--].getValueType(); - while (Idx >= 0 && ConcatOps[Idx].getValueType() == VT) - Idx--; - - int NextSize = VT.isVector() ? VT.getVectorNumElements() : 1; - EVT NextVT; - do { - NextSize *= 2; - NextVT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NextSize); - } while (!TLI.isTypeSynthesizable(NextVT)); - - if (!VT.isVector()) { - // Scalar type, create an INSERT_VECTOR_ELEMENT of type NextVT - SDValue VecOp = DAG.getUNDEF(NextVT); - unsigned NumToInsert = ConcatEnd - Idx - 1; - for (unsigned i = 0, OpIdx = Idx+1; i < NumToInsert; i++, OpIdx++) { - VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NextVT, VecOp, - ConcatOps[OpIdx], DAG.getIntPtrConstant(i)); - } - ConcatOps[Idx+1] = VecOp; - ConcatEnd = Idx + 2; - } - else { - // Vector type, create a CONCAT_VECTORS of type NextVT - SDValue undefVec = DAG.getUNDEF(VT); - unsigned OpsToConcat = NextSize/VT.getVectorNumElements(); - SmallVector SubConcatOps(OpsToConcat); - unsigned RealVals = ConcatEnd - Idx - 1; - unsigned SubConcatEnd = 0; - unsigned SubConcatIdx = Idx + 1; - while (SubConcatEnd < RealVals) - SubConcatOps[SubConcatEnd++] = ConcatOps[++Idx]; - while (SubConcatEnd < OpsToConcat) - SubConcatOps[SubConcatEnd++] = undefVec; - ConcatOps[SubConcatIdx] = DAG.getNode(ISD::CONCAT_VECTORS, dl, - NextVT, &SubConcatOps[0], - OpsToConcat); - ConcatEnd = SubConcatIdx + 1; + // Check to see if we have a single operation with the widen type. + if (ConcatEnd == 1) { + VT = ConcatOps[0].getValueType(); + if (VT == WidenVT) + return ConcatOps[0]; + } + + // while (Some element of ConcatOps is not of type MaxVT) { + // From the end of ConcatOps, collect elements of the same type and put + // them into an op of the next larger supported type + // } + while (ConcatOps[ConcatEnd-1].getValueType() != MaxVT) { + Idx = ConcatEnd - 1; + VT = ConcatOps[Idx--].getValueType(); + while (Idx >= 0 && ConcatOps[Idx].getValueType() == VT) + Idx--; + + int NextSize = VT.isVector() ? VT.getVectorNumElements() : 1; + EVT NextVT; + do { + NextSize *= 2; + NextVT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NextSize); + } while (!TLI.isTypeSynthesizable(NextVT)); + + if (!VT.isVector()) { + // Scalar type, create an INSERT_VECTOR_ELEMENT of type NextVT + SDValue VecOp = DAG.getUNDEF(NextVT); + unsigned NumToInsert = ConcatEnd - Idx - 1; + for (unsigned i = 0, OpIdx = Idx+1; i < NumToInsert; i++, OpIdx++) { + VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NextVT, VecOp, + ConcatOps[OpIdx], DAG.getIntPtrConstant(i)); } + ConcatOps[Idx+1] = VecOp; + ConcatEnd = Idx + 2; + } else { + // Vector type, create a CONCAT_VECTORS of type NextVT + SDValue undefVec = DAG.getUNDEF(VT); + unsigned OpsToConcat = NextSize/VT.getVectorNumElements(); + SmallVector SubConcatOps(OpsToConcat); + unsigned RealVals = ConcatEnd - Idx - 1; + unsigned SubConcatEnd = 0; + unsigned SubConcatIdx = Idx + 1; + while (SubConcatEnd < RealVals) + SubConcatOps[SubConcatEnd++] = ConcatOps[++Idx]; + while (SubConcatEnd < OpsToConcat) + SubConcatOps[SubConcatEnd++] = undefVec; + ConcatOps[SubConcatIdx] = DAG.getNode(ISD::CONCAT_VECTORS, dl, + NextVT, &SubConcatOps[0], + OpsToConcat); + ConcatEnd = SubConcatIdx + 1; } + } - // Check to see if we have a single operation with the widen type. - if (ConcatEnd == 1) { - VT = ConcatOps[0].getValueType(); - if (VT == WidenVT) - return ConcatOps[0]; - } - - // add undefs of size MaxVT until ConcatOps grows to length of WidenVT - unsigned NumOps = - WidenVT.getVectorNumElements()/MaxVT.getVectorNumElements(); - if (NumOps != ConcatEnd ) { - SDValue UndefVal = DAG.getUNDEF(MaxVT); - for (unsigned j = ConcatEnd; j < NumOps; ++j) - ConcatOps[j] = UndefVal; - } - return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0], NumOps); + // Check to see if we have a single operation with the widen type. + if (ConcatEnd == 1) { + VT = ConcatOps[0].getValueType(); + if (VT == WidenVT) + return ConcatOps[0]; } + + // add undefs of size MaxVT until ConcatOps grows to length of WidenVT + unsigned NumOps = WidenVT.getVectorNumElements()/MaxVT.getVectorNumElements(); + if (NumOps != ConcatEnd ) { + SDValue UndefVal = DAG.getUNDEF(MaxVT); + for (unsigned j = ConcatEnd; j < NumOps; ++j) + ConcatOps[j] = UndefVal; + } + return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0], NumOps); } SDValue DAGTypeLegalizer::WidenVecRes_Convert(SDNode *N) { @@ -1561,8 +1560,8 @@ unsigned NewNumElts = WidenSize / InSize; if (InVT.isVector()) { EVT InEltVT = InVT.getVectorElementType(); - NewInVT= EVT::getVectorVT(*DAG.getContext(), InEltVT, - WidenSize / InEltVT.getSizeInBits()); + NewInVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, + WidenSize / InEltVT.getSizeInBits()); } else { NewInVT = EVT::getVectorVT(*DAG.getContext(), InVT, NewNumElts); } @@ -1686,8 +1685,7 @@ SDValue RndOp = N->getOperand(3); SDValue SatOp = N->getOperand(4); - EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), - N->getValueType(0)); + EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); unsigned WidenNumElts = WidenVT.getVectorNumElements(); EVT InVT = InOp.getValueType(); @@ -1720,9 +1718,9 @@ SmallVector Ops(NumConcat); Ops[0] = InOp; SDValue UndefVal = DAG.getUNDEF(InVT); - for (unsigned i = 1; i != NumConcat; ++i) { + for (unsigned i = 1; i != NumConcat; ++i) Ops[i] = UndefVal; - } + InOp = DAG.getNode(ISD::CONCAT_VECTORS, dl, InWidenVT, &Ops[0],NumConcat); return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp, SatOp, CvtCode); From sabre at nondot.org Tue Aug 24 18:10:06 2010 From: sabre at nondot.org (Chris Lattner) Date: Tue, 24 Aug 2010 23:10:06 -0000 Subject: [llvm-commits] [llvm] r111990 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Message-ID: <20100824231006.3B5562A6C12C@llvm.org> Author: lattner Date: Tue Aug 24 18:10:06 2010 New Revision: 111990 URL: http://llvm.org/viewvc/llvm-project?rev=111990&view=rev Log: split the vector case out of getCopyToParts into its own function. No functionality change. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=111990&r1=111989&r2=111990&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Tue Aug 24 18:10:06 2010 @@ -241,175 +241,181 @@ return SDValue(); } + +static void getCopyToPartsVector(SelectionDAG &DAG, DebugLoc dl, + SDValue Val, SDValue *Parts, unsigned NumParts, + EVT PartVT); + /// getCopyToParts - Create a series of nodes that contain the specified value /// split into legal parts. If the parts contain more bits than Val, then, for /// integers, ExtendKind can be used to specify how to generate the extra bits. -static void getCopyToParts(SelectionDAG &DAG, DebugLoc dl, +static void getCopyToParts(SelectionDAG &DAG, DebugLoc DL, SDValue Val, SDValue *Parts, unsigned NumParts, EVT PartVT, ISD::NodeType ExtendKind = ISD::ANY_EXTEND) { - const TargetLowering &TLI = DAG.getTargetLoweringInfo(); - EVT PtrVT = TLI.getPointerTy(); EVT ValueVT = Val.getValueType(); + + // Handle the vector case separately. + if (ValueVT.isVector()) + return getCopyToPartsVector(DAG, DL, Val, Parts, NumParts, PartVT); + + const TargetLowering &TLI = DAG.getTargetLoweringInfo(); unsigned PartBits = PartVT.getSizeInBits(); unsigned OrigNumParts = NumParts; assert(TLI.isTypeLegal(PartVT) && "Copying to an illegal type!"); - if (!NumParts) + if (NumParts == 0) return; - if (!ValueVT.isVector()) { - if (PartVT == ValueVT) { - assert(NumParts == 1 && "No-op copy with multiple parts!"); - Parts[0] = Val; - return; - } + assert(!ValueVT.isVector() && "Vector case handled elsewhere"); + if (PartVT == ValueVT) { + assert(NumParts == 1 && "No-op copy with multiple parts!"); + Parts[0] = Val; + return; + } - if (NumParts * PartBits > ValueVT.getSizeInBits()) { - // If the parts cover more bits than the value has, promote the value. - if (PartVT.isFloatingPoint() && ValueVT.isFloatingPoint()) { - assert(NumParts == 1 && "Do not know what to promote to!"); - Val = DAG.getNode(ISD::FP_EXTEND, dl, PartVT, Val); - } else if (PartVT.isInteger() && ValueVT.isInteger()) { - ValueVT = EVT::getIntegerVT(*DAG.getContext(), NumParts * PartBits); - Val = DAG.getNode(ExtendKind, dl, ValueVT, Val); - } else { - llvm_unreachable("Unknown mismatch!"); - } - } else if (PartBits == ValueVT.getSizeInBits()) { - // Different types of the same size. - assert(NumParts == 1 && PartVT != ValueVT); - Val = DAG.getNode(ISD::BIT_CONVERT, dl, PartVT, Val); - } else if (NumParts * PartBits < ValueVT.getSizeInBits()) { - // If the parts cover less bits than value has, truncate the value. - if (PartVT.isInteger() && ValueVT.isInteger()) { - ValueVT = EVT::getIntegerVT(*DAG.getContext(), NumParts * PartBits); - Val = DAG.getNode(ISD::TRUNCATE, dl, ValueVT, Val); - } else { - llvm_unreachable("Unknown mismatch!"); - } + if (NumParts * PartBits > ValueVT.getSizeInBits()) { + // If the parts cover more bits than the value has, promote the value. + if (PartVT.isFloatingPoint() && ValueVT.isFloatingPoint()) { + assert(NumParts == 1 && "Do not know what to promote to!"); + Val = DAG.getNode(ISD::FP_EXTEND, DL, PartVT, Val); + } else { + assert(PartVT.isInteger() && ValueVT.isInteger() && + "Unknown mismatch!"); + ValueVT = EVT::getIntegerVT(*DAG.getContext(), NumParts * PartBits); + Val = DAG.getNode(ExtendKind, DL, ValueVT, Val); } + } else if (PartBits == ValueVT.getSizeInBits()) { + // Different types of the same size. + assert(NumParts == 1 && PartVT != ValueVT); + Val = DAG.getNode(ISD::BIT_CONVERT, DL, PartVT, Val); + } else if (NumParts * PartBits < ValueVT.getSizeInBits()) { + // If the parts cover less bits than value has, truncate the value. + assert(PartVT.isInteger() && ValueVT.isInteger() && + "Unknown mismatch!"); + ValueVT = EVT::getIntegerVT(*DAG.getContext(), NumParts * PartBits); + Val = DAG.getNode(ISD::TRUNCATE, DL, ValueVT, Val); + } + + // The value may have changed - recompute ValueVT. + ValueVT = Val.getValueType(); + assert(NumParts * PartBits == ValueVT.getSizeInBits() && + "Failed to tile the value with PartVT!"); - // The value may have changed - recompute ValueVT. - ValueVT = Val.getValueType(); - assert(NumParts * PartBits == ValueVT.getSizeInBits() && - "Failed to tile the value with PartVT!"); + if (NumParts == 1) { + assert(PartVT == ValueVT && "Type conversion failed!"); + Parts[0] = Val; + return; + } - if (NumParts == 1) { - assert(PartVT == ValueVT && "Type conversion failed!"); - Parts[0] = Val; - return; - } + // Expand the value into multiple parts. + if (NumParts & (NumParts - 1)) { + // The number of parts is not a power of 2. Split off and copy the tail. + assert(PartVT.isInteger() && ValueVT.isInteger() && + "Do not know what to expand to!"); + unsigned RoundParts = 1 << Log2_32(NumParts); + unsigned RoundBits = RoundParts * PartBits; + unsigned OddParts = NumParts - RoundParts; + SDValue OddVal = DAG.getNode(ISD::SRL, DL, ValueVT, Val, + DAG.getIntPtrConstant(RoundBits)); + getCopyToParts(DAG, DL, OddVal, Parts + RoundParts, OddParts, PartVT); - // Expand the value into multiple parts. - if (NumParts & (NumParts - 1)) { - // The number of parts is not a power of 2. Split off and copy the tail. - assert(PartVT.isInteger() && ValueVT.isInteger() && - "Do not know what to expand to!"); - unsigned RoundParts = 1 << Log2_32(NumParts); - unsigned RoundBits = RoundParts * PartBits; - unsigned OddParts = NumParts - RoundParts; - SDValue OddVal = DAG.getNode(ISD::SRL, dl, ValueVT, Val, - DAG.getConstant(RoundBits, - TLI.getPointerTy())); - getCopyToParts(DAG, dl, OddVal, Parts + RoundParts, - OddParts, PartVT); - - if (TLI.isBigEndian()) - // The odd parts were reversed by getCopyToParts - unreverse them. - std::reverse(Parts + RoundParts, Parts + NumParts); + if (TLI.isBigEndian()) + // The odd parts were reversed by getCopyToParts - unreverse them. + std::reverse(Parts + RoundParts, Parts + NumParts); - NumParts = RoundParts; - ValueVT = EVT::getIntegerVT(*DAG.getContext(), NumParts * PartBits); - Val = DAG.getNode(ISD::TRUNCATE, dl, ValueVT, Val); - } + NumParts = RoundParts; + ValueVT = EVT::getIntegerVT(*DAG.getContext(), NumParts * PartBits); + Val = DAG.getNode(ISD::TRUNCATE, DL, ValueVT, Val); + } - // The number of parts is a power of 2. Repeatedly bisect the value using - // EXTRACT_ELEMENT. - Parts[0] = DAG.getNode(ISD::BIT_CONVERT, dl, - EVT::getIntegerVT(*DAG.getContext(), - ValueVT.getSizeInBits()), - Val); - - for (unsigned StepSize = NumParts; StepSize > 1; StepSize /= 2) { - for (unsigned i = 0; i < NumParts; i += StepSize) { - unsigned ThisBits = StepSize * PartBits / 2; - EVT ThisVT = EVT::getIntegerVT(*DAG.getContext(), ThisBits); - SDValue &Part0 = Parts[i]; - SDValue &Part1 = Parts[i+StepSize/2]; - - Part1 = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, - ThisVT, Part0, - DAG.getConstant(1, PtrVT)); - Part0 = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, - ThisVT, Part0, - DAG.getConstant(0, PtrVT)); - - if (ThisBits == PartBits && ThisVT != PartVT) { - Part0 = DAG.getNode(ISD::BIT_CONVERT, dl, - PartVT, Part0); - Part1 = DAG.getNode(ISD::BIT_CONVERT, dl, - PartVT, Part1); - } + // The number of parts is a power of 2. Repeatedly bisect the value using + // EXTRACT_ELEMENT. + Parts[0] = DAG.getNode(ISD::BIT_CONVERT, DL, + EVT::getIntegerVT(*DAG.getContext(), + ValueVT.getSizeInBits()), + Val); + + for (unsigned StepSize = NumParts; StepSize > 1; StepSize /= 2) { + for (unsigned i = 0; i < NumParts; i += StepSize) { + unsigned ThisBits = StepSize * PartBits / 2; + EVT ThisVT = EVT::getIntegerVT(*DAG.getContext(), ThisBits); + SDValue &Part0 = Parts[i]; + SDValue &Part1 = Parts[i+StepSize/2]; + + Part1 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, + ThisVT, Part0, DAG.getIntPtrConstant(1)); + Part0 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, + ThisVT, Part0, DAG.getIntPtrConstant(0)); + + if (ThisBits == PartBits && ThisVT != PartVT) { + Part0 = DAG.getNode(ISD::BIT_CONVERT, DL, PartVT, Part0); + Part1 = DAG.getNode(ISD::BIT_CONVERT, DL, PartVT, Part1); } } + } - if (TLI.isBigEndian()) - std::reverse(Parts, Parts + OrigNumParts); + if (TLI.isBigEndian()) + std::reverse(Parts, Parts + OrigNumParts); +} - return; - } - // Vector ValueVT. +/// getCopyToPartsVector - Create a series of nodes that contain the specified +/// value split into legal parts. +static void getCopyToPartsVector(SelectionDAG &DAG, DebugLoc DL, + SDValue Val, SDValue *Parts, unsigned NumParts, + EVT PartVT) { + EVT ValueVT = Val.getValueType(); + assert(ValueVT.isVector() && "Not a vector"); + const TargetLowering &TLI = DAG.getTargetLoweringInfo(); + if (NumParts == 1) { if (PartVT != ValueVT) { if (PartVT.getSizeInBits() == ValueVT.getSizeInBits()) { - Val = DAG.getNode(ISD::BIT_CONVERT, dl, PartVT, Val); + Val = DAG.getNode(ISD::BIT_CONVERT, DL, PartVT, Val); } else { assert(ValueVT.getVectorElementType() == PartVT && ValueVT.getVectorNumElements() == 1 && "Only trivial vector-to-scalar conversions should get here!"); - Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, - PartVT, Val, - DAG.getConstant(0, PtrVT)); + Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, + PartVT, Val, DAG.getIntPtrConstant(0)); } } - + Parts[0] = Val; return; } - + // Handle a multi-element vector. EVT IntermediateVT, RegisterVT; unsigned NumIntermediates; unsigned NumRegs = TLI.getVectorTypeBreakdown(*DAG.getContext(), ValueVT, - IntermediateVT, NumIntermediates, RegisterVT); + IntermediateVT, NumIntermediates, RegisterVT); unsigned NumElements = ValueVT.getVectorNumElements(); - + assert(NumRegs == NumParts && "Part count doesn't match vector breakdown!"); NumParts = NumRegs; // Silence a compiler warning. assert(RegisterVT == PartVT && "Part type doesn't match vector breakdown!"); - + // Split the vector into intermediate operands. SmallVector Ops(NumIntermediates); for (unsigned i = 0; i != NumIntermediates; ++i) { if (IntermediateVT.isVector()) - Ops[i] = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, + Ops[i] = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, IntermediateVT, Val, - DAG.getConstant(i * (NumElements / NumIntermediates), - PtrVT)); + DAG.getIntPtrConstant(i * (NumElements / NumIntermediates))); else - Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, + Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, IntermediateVT, Val, - DAG.getConstant(i, PtrVT)); + DAG.getIntPtrConstant(i)); } - + // Split the intermediate operands into legal parts. if (NumParts == NumIntermediates) { // If the register was not expanded, promote or copy the value, // as appropriate. for (unsigned i = 0; i != NumParts; ++i) - getCopyToParts(DAG, dl, Ops[i], &Parts[i], 1, PartVT); + getCopyToParts(DAG, DL, Ops[i], &Parts[i], 1, PartVT); } else if (NumParts > 0) { // If the intermediate type was expanded, split each the value into // legal parts. @@ -417,10 +423,13 @@ "Must expand into a divisible number of parts!"); unsigned Factor = NumParts / NumIntermediates; for (unsigned i = 0; i != NumIntermediates; ++i) - getCopyToParts(DAG, dl, Ops[i], &Parts[i*Factor], Factor, PartVT); + getCopyToParts(DAG, DL, Ops[i], &Parts[i*Factor], Factor, PartVT); } } + + + namespace { /// RegsForValue - This struct represents the registers (physical or virtual) /// that a particular set of values is assigned, and the type information @@ -1020,10 +1029,10 @@ unsigned NumValues = ValueVTs.size(); SmallVector Chains(NumValues); - EVT PtrVT = PtrValueVTs[0]; for (unsigned i = 0; i != NumValues; ++i) { - SDValue Add = DAG.getNode(ISD::ADD, getCurDebugLoc(), PtrVT, RetPtr, - DAG.getConstant(Offsets[i], PtrVT)); + SDValue Add = DAG.getNode(ISD::ADD, getCurDebugLoc(), + RetPtr.getValueType(), RetPtr, + DAG.getIntPtrConstant(Offsets[i])); Chains[i] = DAG.getStore(Chain, getCurDebugLoc(), SDValue(RetOp.getNode(), RetOp.getResNo() + i), From gohman at apple.com Tue Aug 24 18:16:53 2010 From: gohman at apple.com (Dan Gohman) Date: Tue, 24 Aug 2010 23:16:53 -0000 Subject: [llvm-commits] [llvm] r111993 - /llvm/trunk/lib/Support/FoldingSet.cpp Message-ID: <20100824231653.711032A6C12C@llvm.org> Author: djg Date: Tue Aug 24 18:16:53 2010 New Revision: 111993 URL: http://llvm.org/viewvc/llvm-project?rev=111993&view=rev Log: Use Bits.data() instead of &Bits[0]. Modified: llvm/trunk/lib/Support/FoldingSet.cpp Modified: llvm/trunk/lib/Support/FoldingSet.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/FoldingSet.cpp?rev=111993&r1=111992&r2=111993&view=diff ============================================================================== --- llvm/trunk/lib/Support/FoldingSet.cpp (original) +++ llvm/trunk/lib/Support/FoldingSet.cpp Tue Aug 24 18:16:53 2010 @@ -135,19 +135,19 @@ /// ComputeHash - Compute a strong hash value for this FoldingSetNodeID, used to /// lookup the node in the FoldingSetImpl. unsigned FoldingSetNodeID::ComputeHash() const { - return FoldingSetNodeIDRef(&Bits[0], Bits.size()).ComputeHash(); + return FoldingSetNodeIDRef(Bits.data(), Bits.size()).ComputeHash(); } /// operator== - Used to compare two nodes to each other. /// bool FoldingSetNodeID::operator==(const FoldingSetNodeID &RHS)const{ - return *this == FoldingSetNodeIDRef(&RHS.Bits[0], RHS.Bits.size()); + return *this == FoldingSetNodeIDRef(RHS.Bits.data(), RHS.Bits.size()); } /// operator== - Used to compare two nodes to each other. /// bool FoldingSetNodeID::operator==(FoldingSetNodeIDRef RHS) const { - return FoldingSetNodeIDRef(&Bits[0], Bits.size()) == RHS; + return FoldingSetNodeIDRef(Bits.data(), Bits.size()) == RHS; } /// Intern - Copy this node's data to a memory region allocated from the From sabre at nondot.org Tue Aug 24 18:20:40 2010 From: sabre at nondot.org (Chris Lattner) Date: Tue, 24 Aug 2010 23:20:40 -0000 Subject: [llvm-commits] [llvm] r111994 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Message-ID: <20100824232041.014D72A6C12C@llvm.org> Author: lattner Date: Tue Aug 24 18:20:40 2010 New Revision: 111994 URL: http://llvm.org/viewvc/llvm-project?rev=111994&view=rev Log: split the vector case of getCopyFromParts out to its own function, no functionality change. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=111994&r1=111993&r2=111994&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Tue Aug 24 18:20:40 2010 @@ -70,22 +70,29 @@ cl::location(LimitFloatPrecision), cl::init(0)); +static SDValue getCopyFromPartsVector(SelectionDAG &DAG, DebugLoc DL, + const SDValue *Parts, unsigned NumParts, + EVT PartVT, EVT ValueVT); + /// getCopyFromParts - Create a value that contains the specified legal parts /// combined into the value they represent. If the parts combine to a type /// larger then ValueVT then AssertOp can be used to specify whether the extra /// bits are known to be zero (ISD::AssertZext) or sign extended from ValueVT /// (ISD::AssertSext). -static SDValue getCopyFromParts(SelectionDAG &DAG, DebugLoc dl, +static SDValue getCopyFromParts(SelectionDAG &DAG, DebugLoc DL, const SDValue *Parts, unsigned NumParts, EVT PartVT, EVT ValueVT, ISD::NodeType AssertOp = ISD::DELETED_NODE) { + if (ValueVT.isVector()) + return getCopyFromPartsVector(DAG, DL, Parts, NumParts, PartVT, ValueVT); + assert(NumParts > 0 && "No parts to assemble!"); const TargetLowering &TLI = DAG.getTargetLoweringInfo(); SDValue Val = Parts[0]; if (NumParts > 1) { // Assemble the value from multiple parts. - if (!ValueVT.isVector() && ValueVT.isInteger()) { + if (ValueVT.isInteger()) { unsigned PartBits = PartVT.getSizeInBits(); unsigned ValueBits = ValueVT.getSizeInBits(); @@ -100,25 +107,25 @@ EVT HalfVT = EVT::getIntegerVT(*DAG.getContext(), RoundBits/2); if (RoundParts > 2) { - Lo = getCopyFromParts(DAG, dl, Parts, RoundParts / 2, + Lo = getCopyFromParts(DAG, DL, Parts, RoundParts / 2, PartVT, HalfVT); - Hi = getCopyFromParts(DAG, dl, Parts + RoundParts / 2, + Hi = getCopyFromParts(DAG, DL, Parts + RoundParts / 2, RoundParts / 2, PartVT, HalfVT); } else { - Lo = DAG.getNode(ISD::BIT_CONVERT, dl, HalfVT, Parts[0]); - Hi = DAG.getNode(ISD::BIT_CONVERT, dl, HalfVT, Parts[1]); + Lo = DAG.getNode(ISD::BIT_CONVERT, DL, HalfVT, Parts[0]); + Hi = DAG.getNode(ISD::BIT_CONVERT, DL, HalfVT, Parts[1]); } if (TLI.isBigEndian()) std::swap(Lo, Hi); - Val = DAG.getNode(ISD::BUILD_PAIR, dl, RoundVT, Lo, Hi); + Val = DAG.getNode(ISD::BUILD_PAIR, DL, RoundVT, Lo, Hi); if (RoundParts < NumParts) { // Assemble the trailing non-power-of-2 part. unsigned OddParts = NumParts - RoundParts; EVT OddVT = EVT::getIntegerVT(*DAG.getContext(), OddParts * PartBits); - Hi = getCopyFromParts(DAG, dl, + Hi = getCopyFromParts(DAG, DL, Parts + RoundParts, OddParts, PartVT, OddVT); // Combine the round and odd parts. @@ -126,68 +133,29 @@ if (TLI.isBigEndian()) std::swap(Lo, Hi); EVT TotalVT = EVT::getIntegerVT(*DAG.getContext(), NumParts * PartBits); - Hi = DAG.getNode(ISD::ANY_EXTEND, dl, TotalVT, Hi); - Hi = DAG.getNode(ISD::SHL, dl, TotalVT, Hi, + Hi = DAG.getNode(ISD::ANY_EXTEND, DL, TotalVT, Hi); + Hi = DAG.getNode(ISD::SHL, DL, TotalVT, Hi, DAG.getConstant(Lo.getValueType().getSizeInBits(), TLI.getPointerTy())); - Lo = DAG.getNode(ISD::ZERO_EXTEND, dl, TotalVT, Lo); - Val = DAG.getNode(ISD::OR, dl, TotalVT, Lo, Hi); + Lo = DAG.getNode(ISD::ZERO_EXTEND, DL, TotalVT, Lo); + Val = DAG.getNode(ISD::OR, DL, TotalVT, Lo, Hi); } - } else if (ValueVT.isVector()) { - // Handle a multi-element vector. - EVT IntermediateVT, RegisterVT; - unsigned NumIntermediates; - unsigned NumRegs = - TLI.getVectorTypeBreakdown(*DAG.getContext(), ValueVT, IntermediateVT, - NumIntermediates, RegisterVT); - assert(NumRegs == NumParts - && "Part count doesn't match vector breakdown!"); - NumParts = NumRegs; // Silence a compiler warning. - assert(RegisterVT == PartVT - && "Part type doesn't match vector breakdown!"); - assert(RegisterVT == Parts[0].getValueType() && - "Part type doesn't match part!"); - - // Assemble the parts into intermediate operands. - SmallVector Ops(NumIntermediates); - if (NumIntermediates == NumParts) { - // If the register was not expanded, truncate or copy the value, - // as appropriate. - for (unsigned i = 0; i != NumParts; ++i) - Ops[i] = getCopyFromParts(DAG, dl, &Parts[i], 1, - PartVT, IntermediateVT); - } else if (NumParts > 0) { - // If the intermediate type was expanded, build the intermediate - // operands from the parts. - assert(NumParts % NumIntermediates == 0 && - "Must expand into a divisible number of parts!"); - unsigned Factor = NumParts / NumIntermediates; - for (unsigned i = 0; i != NumIntermediates; ++i) - Ops[i] = getCopyFromParts(DAG, dl, &Parts[i * Factor], Factor, - PartVT, IntermediateVT); - } - - // Build a vector with BUILD_VECTOR or CONCAT_VECTORS from the - // intermediate operands. - Val = DAG.getNode(IntermediateVT.isVector() ? - ISD::CONCAT_VECTORS : ISD::BUILD_VECTOR, dl, - ValueVT, &Ops[0], NumIntermediates); } else if (PartVT.isFloatingPoint()) { // FP split into multiple FP parts (for ppcf128) assert(ValueVT == EVT(MVT::ppcf128) && PartVT == EVT(MVT::f64) && "Unexpected split"); SDValue Lo, Hi; - Lo = DAG.getNode(ISD::BIT_CONVERT, dl, EVT(MVT::f64), Parts[0]); - Hi = DAG.getNode(ISD::BIT_CONVERT, dl, EVT(MVT::f64), Parts[1]); + Lo = DAG.getNode(ISD::BIT_CONVERT, DL, EVT(MVT::f64), Parts[0]); + Hi = DAG.getNode(ISD::BIT_CONVERT, DL, EVT(MVT::f64), Parts[1]); if (TLI.isBigEndian()) std::swap(Lo, Hi); - Val = DAG.getNode(ISD::BUILD_PAIR, dl, ValueVT, Lo, Hi); + Val = DAG.getNode(ISD::BUILD_PAIR, DL, ValueVT, Lo, Hi); } else { // FP split into integer parts (soft fp) assert(ValueVT.isFloatingPoint() && PartVT.isInteger() && !PartVT.isVector() && "Unexpected split"); EVT IntVT = EVT::getIntegerVT(*DAG.getContext(), ValueVT.getSizeInBits()); - Val = getCopyFromParts(DAG, dl, Parts, NumParts, PartVT, IntVT); + Val = getCopyFromParts(DAG, DL, Parts, NumParts, PartVT, IntVT); } } @@ -197,50 +165,104 @@ if (PartVT == ValueVT) return Val; - if (PartVT.isVector()) { - assert(ValueVT.isVector() && "Unknown vector conversion!"); - return DAG.getNode(ISD::BIT_CONVERT, dl, ValueVT, Val); - } - - if (ValueVT.isVector()) { - assert(ValueVT.getVectorElementType() == PartVT && - ValueVT.getVectorNumElements() == 1 && - "Only trivial scalar-to-vector conversions should get here!"); - return DAG.getNode(ISD::BUILD_VECTOR, dl, ValueVT, Val); - } - - if (PartVT.isInteger() && - ValueVT.isInteger()) { + if (PartVT.isInteger() && ValueVT.isInteger()) { if (ValueVT.bitsLT(PartVT)) { // For a truncate, see if we have any information to // indicate whether the truncated bits will always be // zero or sign-extension. if (AssertOp != ISD::DELETED_NODE) - Val = DAG.getNode(AssertOp, dl, PartVT, Val, + Val = DAG.getNode(AssertOp, DL, PartVT, Val, DAG.getValueType(ValueVT)); - return DAG.getNode(ISD::TRUNCATE, dl, ValueVT, Val); - } else { - return DAG.getNode(ISD::ANY_EXTEND, dl, ValueVT, Val); + return DAG.getNode(ISD::TRUNCATE, DL, ValueVT, Val); } + return DAG.getNode(ISD::ANY_EXTEND, DL, ValueVT, Val); } if (PartVT.isFloatingPoint() && ValueVT.isFloatingPoint()) { - if (ValueVT.bitsLT(Val.getValueType())) { - // FP_ROUND's are always exact here. - return DAG.getNode(ISD::FP_ROUND, dl, ValueVT, Val, + // FP_ROUND's are always exact here. + if (ValueVT.bitsLT(Val.getValueType())) + return DAG.getNode(ISD::FP_ROUND, DL, ValueVT, Val, DAG.getIntPtrConstant(1)); - } - return DAG.getNode(ISD::FP_EXTEND, dl, ValueVT, Val); + return DAG.getNode(ISD::FP_EXTEND, DL, ValueVT, Val); } if (PartVT.getSizeInBits() == ValueVT.getSizeInBits()) - return DAG.getNode(ISD::BIT_CONVERT, dl, ValueVT, Val); + return DAG.getNode(ISD::BIT_CONVERT, DL, ValueVT, Val); llvm_unreachable("Unknown mismatch!"); return SDValue(); } +/// getCopyFromParts - Create a value that contains the specified legal parts +/// combined into the value they represent. If the parts combine to a type +/// larger then ValueVT then AssertOp can be used to specify whether the extra +/// bits are known to be zero (ISD::AssertZext) or sign extended from ValueVT +/// (ISD::AssertSext). +static SDValue getCopyFromPartsVector(SelectionDAG &DAG, DebugLoc DL, + const SDValue *Parts, unsigned NumParts, + EVT PartVT, EVT ValueVT) { + assert(ValueVT.isVector() && "Not a vector value"); + assert(NumParts > 0 && "No parts to assemble!"); + const TargetLowering &TLI = DAG.getTargetLoweringInfo(); + SDValue Val = Parts[0]; + + // Handle a multi-element vector. + if (NumParts > 1) { + EVT IntermediateVT, RegisterVT; + unsigned NumIntermediates; + unsigned NumRegs = + TLI.getVectorTypeBreakdown(*DAG.getContext(), ValueVT, IntermediateVT, + NumIntermediates, RegisterVT); + assert(NumRegs == NumParts && "Part count doesn't match vector breakdown!"); + NumParts = NumRegs; // Silence a compiler warning. + assert(RegisterVT == PartVT && "Part type doesn't match vector breakdown!"); + assert(RegisterVT == Parts[0].getValueType() && + "Part type doesn't match part!"); + + // Assemble the parts into intermediate operands. + SmallVector Ops(NumIntermediates); + if (NumIntermediates == NumParts) { + // If the register was not expanded, truncate or copy the value, + // as appropriate. + for (unsigned i = 0; i != NumParts; ++i) + Ops[i] = getCopyFromParts(DAG, DL, &Parts[i], 1, + PartVT, IntermediateVT); + } else if (NumParts > 0) { + // If the intermediate type was expanded, build the intermediate + // operands from the parts. + assert(NumParts % NumIntermediates == 0 && + "Must expand into a divisible number of parts!"); + unsigned Factor = NumParts / NumIntermediates; + for (unsigned i = 0; i != NumIntermediates; ++i) + Ops[i] = getCopyFromParts(DAG, DL, &Parts[i * Factor], Factor, + PartVT, IntermediateVT); + } + + // Build a vector with BUILD_VECTOR or CONCAT_VECTORS from the + // intermediate operands. + Val = DAG.getNode(IntermediateVT.isVector() ? + ISD::CONCAT_VECTORS : ISD::BUILD_VECTOR, DL, + ValueVT, &Ops[0], NumIntermediates); + } + + // There is now one part, held in Val. Correct it to match ValueVT. + PartVT = Val.getValueType(); + + if (PartVT == ValueVT) + return Val; + + if (PartVT.isVector()) // Vector/Vector bitcast. + return DAG.getNode(ISD::BIT_CONVERT, DL, ValueVT, Val); + + assert(ValueVT.getVectorElementType() == PartVT && + ValueVT.getVectorNumElements() == 1 && + "Only trivial scalar-to-vector conversions should get here!"); + return DAG.getNode(ISD::BUILD_VECTOR, DL, ValueVT, Val); +} + + + static void getCopyToPartsVector(SelectionDAG &DAG, DebugLoc dl, SDValue Val, SDValue *Parts, unsigned NumParts, @@ -636,8 +658,7 @@ unsigned NumParts = TLI.getNumRegisters(*DAG.getContext(), ValueVT); EVT RegisterVT = RegVTs[Value]; - getCopyToParts(DAG, dl, - Val.getValue(Val.getResNo() + Value), + getCopyToParts(DAG, dl, Val.getValue(Val.getResNo() + Value), &Parts[Part], NumParts, RegisterVT); Part += NumParts; } From gohman at apple.com Tue Aug 24 18:21:12 2010 From: gohman at apple.com (Dan Gohman) Date: Tue, 24 Aug 2010 23:21:12 -0000 Subject: [llvm-commits] [llvm] r111995 - /llvm/trunk/lib/VMCore/Metadata.cpp Message-ID: <20100824232112.69C102A6C12C@llvm.org> Author: djg Date: Tue Aug 24 18:21:12 2010 New Revision: 111995 URL: http://llvm.org/viewvc/llvm-project?rev=111995&view=rev Log: Don't include the is-function-local bit in the FoldingSetNodeID for MDNodes, since this information is effectively implied by the operands. This allow allows the code to avoid doing a recursive is-it-really-function-local check in some cases. Modified: llvm/trunk/lib/VMCore/Metadata.cpp Modified: llvm/trunk/lib/VMCore/Metadata.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Metadata.cpp?rev=111995&r1=111994&r2=111995&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Metadata.cpp (original) +++ llvm/trunk/lib/VMCore/Metadata.cpp Tue Aug 24 18:21:12 2010 @@ -187,6 +187,19 @@ unsigned NumVals, FunctionLocalness FL, bool Insert) { LLVMContextImpl *pImpl = Context.pImpl; + + // Add all the operand pointers. Note that we don't have to add the + // isFunctionLocal bit because that's implied by the operands. + FoldingSetNodeID ID; + for (unsigned i = 0; i != NumVals; ++i) + ID.AddPointer(Vals[i]); + + void *InsertPoint; + MDNode *N = NULL; + + if ((N = pImpl->MDNodeSet.FindNodeOrInsertPos(ID, InsertPoint))) + return N; + bool isFunctionLocal = false; switch (FL) { case FL_Unknown: @@ -207,20 +220,6 @@ break; } - FoldingSetNodeID ID; - for (unsigned i = 0; i != NumVals; ++i) - ID.AddPointer(Vals[i]); - ID.AddBoolean(isFunctionLocal); - - void *InsertPoint; - MDNode *N = NULL; - - if ((N = pImpl->MDNodeSet.FindNodeOrInsertPos(ID, InsertPoint))) - return N; - - if (!Insert) - return NULL; - // Coallocate space for the node and Operands together, then placement new. void *Ptr = malloc(sizeof(MDNode)+NumVals*sizeof(MDNodeOperand)); N = new (Ptr) MDNode(Context, Vals, NumVals, isFunctionLocal); @@ -275,9 +274,10 @@ } void MDNode::Profile(FoldingSetNodeID &ID) const { + // Add all the operand pointers. Note that we don't have to add the + // isFunctionLocal bit because that's implied by the operands. for (unsigned i = 0, e = getNumOperands(); i != e; ++i) ID.AddPointer(getOperand(i)); - ID.AddBoolean(isFunctionLocal()); } void MDNode::setIsNotUniqued() { From echristo at apple.com Tue Aug 24 18:21:59 2010 From: echristo at apple.com (Eric Christopher) Date: Tue, 24 Aug 2010 23:21:59 -0000 Subject: [llvm-commits] [llvm] r111996 - /llvm/trunk/utils/TableGen/FastISelEmitter.cpp Message-ID: <20100824232159.61B662A6C12C@llvm.org> Author: echristo Date: Tue Aug 24 18:21:59 2010 New Revision: 111996 URL: http://llvm.org/viewvc/llvm-project?rev=111996&view=rev Log: Fix comment. Modified: llvm/trunk/utils/TableGen/FastISelEmitter.cpp Modified: llvm/trunk/utils/TableGen/FastISelEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/FastISelEmitter.cpp?rev=111996&r1=111995&r2=111996&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/FastISelEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/FastISelEmitter.cpp Tue Aug 24 18:21:59 2010 @@ -108,10 +108,10 @@ else return false; - // For now, require the register operands' register classes to all - // be the same. + // For now, this needs to be a register class of some sort. if (!RC) return false; + // For now, all the operands must have the same register class. if (DstRC) { if (DstRC != RC) From clattner at apple.com Tue Aug 24 18:33:04 2010 From: clattner at apple.com (Chris Lattner) Date: Tue, 24 Aug 2010 16:33:04 -0700 Subject: [llvm-commits] [llvm] r111995 - /llvm/trunk/lib/VMCore/Metadata.cpp In-Reply-To: <20100824232112.69C102A6C12C@llvm.org> References: <20100824232112.69C102A6C12C@llvm.org> Message-ID: <92ADEEF9-682F-4740-9FA1-F606F2977CDB@apple.com> On Aug 24, 2010, at 4:21 PM, Dan Gohman wrote: > Author: djg > Date: Tue Aug 24 18:21:12 2010 > New Revision: 111995 > > URL: http://llvm.org/viewvc/llvm-project?rev=111995&view=rev > Log: > Don't include the is-function-local bit in the FoldingSetNodeID > for MDNodes, since this information is effectively implied by > the operands. This allow allows the code to avoid doing a > recursive is-it-really-function-local check in some cases. One trick with this: if the function local operand of a local md node drops to null, the node stays function local. -Chris > > Modified: > llvm/trunk/lib/VMCore/Metadata.cpp > > Modified: llvm/trunk/lib/VMCore/Metadata.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Metadata.cpp?rev=111995&r1=111994&r2=111995&view=diff > ============================================================================== > --- llvm/trunk/lib/VMCore/Metadata.cpp (original) > +++ llvm/trunk/lib/VMCore/Metadata.cpp Tue Aug 24 18:21:12 2010 > @@ -187,6 +187,19 @@ > unsigned NumVals, FunctionLocalness FL, > bool Insert) { > LLVMContextImpl *pImpl = Context.pImpl; > + > + // Add all the operand pointers. Note that we don't have to add the > + // isFunctionLocal bit because that's implied by the operands. > + FoldingSetNodeID ID; > + for (unsigned i = 0; i != NumVals; ++i) > + ID.AddPointer(Vals[i]); > + > + void *InsertPoint; > + MDNode *N = NULL; > + > + if ((N = pImpl->MDNodeSet.FindNodeOrInsertPos(ID, InsertPoint))) > + return N; > + > bool isFunctionLocal = false; > switch (FL) { > case FL_Unknown: > @@ -207,20 +220,6 @@ > break; > } > > - FoldingSetNodeID ID; > - for (unsigned i = 0; i != NumVals; ++i) > - ID.AddPointer(Vals[i]); > - ID.AddBoolean(isFunctionLocal); > - > - void *InsertPoint; > - MDNode *N = NULL; > - > - if ((N = pImpl->MDNodeSet.FindNodeOrInsertPos(ID, InsertPoint))) > - return N; > - > - if (!Insert) > - return NULL; > - > // Coallocate space for the node and Operands together, then placement new. > void *Ptr = malloc(sizeof(MDNode)+NumVals*sizeof(MDNodeOperand)); > N = new (Ptr) MDNode(Context, Vals, NumVals, isFunctionLocal); > @@ -275,9 +274,10 @@ > } > > void MDNode::Profile(FoldingSetNodeID &ID) const { > + // Add all the operand pointers. Note that we don't have to add the > + // isFunctionLocal bit because that's implied by the operands. > for (unsigned i = 0, e = getNumOperands(); i != e; ++i) > ID.AddPointer(getOperand(i)); > - ID.AddBoolean(isFunctionLocal()); > } > > void MDNode::setIsNotUniqued() { > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From echristo at apple.com Tue Aug 24 19:41:18 2010 From: echristo at apple.com (Eric Christopher) Date: Wed, 25 Aug 2010 00:41:18 -0000 Subject: [llvm-commits] [llvm] r112008 - in /llvm/trunk/utils/TableGen: CodeGenRegisters.h RegisterInfoEmitter.cpp Message-ID: <20100825004118.95F732A6C12C@llvm.org> Author: echristo Date: Tue Aug 24 19:41:18 2010 New Revision: 112008 URL: http://llvm.org/viewvc/llvm-project?rev=112008&view=rev Log: Split out register class subclassing to a separate function and clean up accordingly. No functional change. Modified: llvm/trunk/utils/TableGen/CodeGenRegisters.h llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp Modified: llvm/trunk/utils/TableGen/CodeGenRegisters.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenRegisters.h?rev=112008&r1=112007&r2=112008&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/CodeGenRegisters.h (original) +++ llvm/trunk/utils/TableGen/CodeGenRegisters.h Tue Aug 24 19:41:18 2010 @@ -19,6 +19,7 @@ #include "llvm/ADT/DenseMap.h" #include #include +#include #include namespace llvm { @@ -55,6 +56,37 @@ assert(0 && "VTNum greater than number of ValueTypes in RegClass!"); abort(); } + + // Returns true if RC is a strict subclass. + // RC is a sub-class of this class if it is a valid replacement for any + // instruction operand where a register of this classis required. It must + // satisfy these conditions: + // + // 1. All RC registers are also in this. + // 2. The RC spill size must not be smaller than our spill size. + // 3. RC spill alignment must be compatible with ours. + // + bool hasSubClass(const CodeGenRegisterClass *RC) const { + + if (RC->Elements.size() > Elements.size() || + (SpillAlignment && RC->SpillAlignment % SpillAlignment) || + SpillSize > RC->SpillSize) + return false; + + std::set RegSet; + for (unsigned i = 0, e = Elements.size(); i != e; ++i) { + Record *Reg = Elements[i]; + RegSet.insert(Reg); + } + + for (unsigned i = 0, e = RC->Elements.size(); i != e; ++i) { + Record *Reg = RC->Elements[i]; + if (!RegSet.count(Reg)) + return false; + } + + return true; + } CodeGenRegisterClass(Record *R); }; Modified: llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp?rev=112008&r1=112007&r2=112008&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp Tue Aug 24 19:41:18 2010 @@ -119,16 +119,6 @@ OS << "} // End llvm namespace \n"; } -bool isSubRegisterClass(const CodeGenRegisterClass &RC, - std::set &RegSet) { - for (unsigned i = 0, e = RC.Elements.size(); i != e; ++i) { - Record *Reg = RC.Elements[i]; - if (!RegSet.count(Reg)) - return false; - } - return true; -} - static void addSuperReg(Record *R, Record *S, std::map, LessRecord> &SubRegs, std::map, LessRecord> &SuperRegs, @@ -498,12 +488,6 @@ // Give the register class a legal C name if it's anonymous. std::string Name = RC.TheDef->getName(); - std::set RegSet; - for (unsigned i = 0, e = RC.Elements.size(); i != e; ++i) { - Record *Reg = RC.Elements[i]; - RegSet.insert(Reg); - } - OS << " // " << Name << " Register Class sub-classes...\n" << " static const TargetRegisterClass* const " @@ -513,21 +497,9 @@ for (unsigned rc2 = 0, e2 = RegisterClasses.size(); rc2 != e2; ++rc2) { const CodeGenRegisterClass &RC2 = RegisterClasses[rc2]; - // RC2 is a sub-class of RC if it is a valid replacement for any - // instruction operand where an RC register is required. It must satisfy - // these conditions: - // - // 1. All RC2 registers are also in RC. - // 2. The RC2 spill size must not be smaller that the RC spill size. - // 3. RC2 spill alignment must be compatible with RC. - // // Sub-classes are used to determine if a virtual register can be used // as an instruction operand, or if it must be copied first. - - if (rc == rc2 || RC2.Elements.size() > RC.Elements.size() || - (RC.SpillAlignment && RC2.SpillAlignment % RC.SpillAlignment) || - RC.SpillSize > RC2.SpillSize || !isSubRegisterClass(RC2, RegSet)) - continue; + if (rc == rc2 || !RC.hasSubClass(&RC2)) continue; if (!Empty) OS << ", "; OS << "&" << getQualifiedName(RC2.TheDef) << "RegClass"; From gohman at apple.com Tue Aug 24 20:15:21 2010 From: gohman at apple.com (Dan Gohman) Date: Tue, 24 Aug 2010 18:15:21 -0700 Subject: [llvm-commits] [llvm] r111995 - /llvm/trunk/lib/VMCore/Metadata.cpp In-Reply-To: <92ADEEF9-682F-4740-9FA1-F606F2977CDB@apple.com> References: <20100824232112.69C102A6C12C@llvm.org> <92ADEEF9-682F-4740-9FA1-F606F2977CDB@apple.com> Message-ID: On Aug 24, 2010, at 4:33 PM, Chris Lattner wrote: > > On Aug 24, 2010, at 4:21 PM, Dan Gohman wrote: > >> Author: djg >> Date: Tue Aug 24 18:21:12 2010 >> New Revision: 111995 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=111995&view=rev >> Log: >> Don't include the is-function-local bit in the FoldingSetNodeID >> for MDNodes, since this information is effectively implied by >> the operands. This allow allows the code to avoid doing a >> recursive is-it-really-function-local check in some cases. > > One trick with this: if the function local operand of a local md > node drops to null, the node stays function local. When an operand drops to null, we also take the node out of the uniquing map. I'll add some comments about this. Dan From resistor at mac.com Tue Aug 24 20:16:47 2010 From: resistor at mac.com (Owen Anderson) Date: Wed, 25 Aug 2010 01:16:47 -0000 Subject: [llvm-commits] [llvm] r112015 - in /llvm/trunk: lib/Analysis/LazyValueInfo.cpp test/Transforms/JumpThreading/lvi-load.ll Message-ID: <20100825011647.72FAD2A6C12C@llvm.org> Author: resistor Date: Tue Aug 24 20:16:47 2010 New Revision: 112015 URL: http://llvm.org/viewvc/llvm-project?rev=112015&view=rev Log: In the default address space, any GEP off of null results in a trap value if you try to load it. Thus, any load in the default address space that completes implies that the base value that it GEP'd from was not null. Added: llvm/trunk/test/Transforms/JumpThreading/lvi-load.ll Modified: llvm/trunk/lib/Analysis/LazyValueInfo.cpp Modified: llvm/trunk/lib/Analysis/LazyValueInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/LazyValueInfo.cpp?rev=112015&r1=112014&r2=112015&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/LazyValueInfo.cpp (original) +++ llvm/trunk/lib/Analysis/LazyValueInfo.cpp Tue Aug 24 20:16:47 2010 @@ -457,10 +457,11 @@ // then we know that the pointer can't be NULL. if (Val->getType()->isPointerTy()) { const PointerType *PTy = cast(Val->getType()); - for (Value::use_iterator UI = Val->use_begin(), UE = Val->use_end(); - UI != UE; ++UI) { - LoadInst *L = dyn_cast(*UI); - if (L && L->getParent() == BB && L->getPointerAddressSpace() == 0) { + for (BasicBlock::iterator BI = BB->begin(), BE = BB->end();BI != BE;++BI){ + LoadInst *L = dyn_cast(BI); + if (L && L->getPointerAddressSpace() == 0 && + L->getPointerOperand()->getUnderlyingObject() == + Val->getUnderlyingObject()) { return LVILatticeVal::getNot(ConstantPointerNull::get(PTy)); } } Added: llvm/trunk/test/Transforms/JumpThreading/lvi-load.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/JumpThreading/lvi-load.ll?rev=112015&view=auto ============================================================================== --- llvm/trunk/test/Transforms/JumpThreading/lvi-load.ll (added) +++ llvm/trunk/test/Transforms/JumpThreading/lvi-load.ll Tue Aug 24 20:16:47 2010 @@ -0,0 +1,48 @@ +; RUN: opt -S -jump-threading -enable-jump-threading-lvi < %s | FileCheck %s +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin10.4" + +%"struct.llvm::PATypeHolder" = type { %"struct.llvm::Type"* } +%"struct.llvm::PointerIntPair >" = type { i64 } +%"struct.llvm::Type" = type opaque +%"struct.llvm::Use" = type { %"struct.llvm::Value"*, %"struct.llvm::Use"*, %"struct.llvm::PointerIntPair >" } +%"struct.llvm::Value" = type { i32 (...)**, i8, i8, i16, %"struct.llvm::PATypeHolder", %"struct.llvm::Use"*, %"struct.llvm::ValueName"* } +%"struct.llvm::ValueName" = type opaque + + at _ZZN4llvm4castINS_11InstructionEPNS_5ValueEEENS_10cast_rettyIT_T0_E8ret_typeERKS6_E8__func__ = internal constant [5 x i8] c"cast\00", align 8 ; <[5 x i8]*> [#uses=1] + at .str = private constant [31 x i8] c"include/llvm/Support/Casting.h\00", align 8 ; <[31 x i8]*> [#uses=1] + at .str1 = private constant [59 x i8] c"isa(Val) && \22cast() argument of incompatible type!\22\00", align 8 ; <[59 x i8]*> [#uses=1] + +; CHECK: Z3fooPN4llvm5ValueE +define zeroext i8 @_Z3fooPN4llvm5ValueE(%"struct.llvm::Value"* %V) ssp { +entry: + %0 = getelementptr inbounds %"struct.llvm::Value"* %V, i64 0, i32 1 ; [#uses=1] + %1 = load i8* %0, align 8 ; [#uses=2] + %2 = icmp ugt i8 %1, 20 ; [#uses=1] + br i1 %2, label %bb.i, label %bb2 + +bb.i: ; preds = %entry + %toBoolnot.i.i = icmp ult i8 %1, 21 ; [#uses=1] + br i1 %toBoolnot.i.i, label %bb6.i.i, label %_ZN4llvm8dyn_castINS_11InstructionEPNS_5ValueEEENS_10cast_rettyIT_T0_E8ret_typeERKS6_.exit + +bb6.i.i: ; preds = %bb.i + tail call void @__assert_rtn(i8* getelementptr inbounds ([5 x i8]* @_ZZN4llvm4castINS_11InstructionEPNS_5ValueEEENS_10cast_rettyIT_T0_E8ret_typeERKS6_E8__func__, i64 0, i64 0), i8* getelementptr inbounds ([31 x i8]* @.str, i64 0, i64 0), i32 202, i8* getelementptr inbounds ([59 x i8]* @.str1, i64 0, i64 0)) noreturn + unreachable + +_ZN4llvm8dyn_castINS_11InstructionEPNS_5ValueEEENS_10cast_rettyIT_T0_E8ret_typeERKS6_.exit: ; preds = %bb.i +; CHECK-NOT: null + %3 = icmp eq %"struct.llvm::Value"* %V, null ; [#uses=1] + br i1 %3, label %bb2, label %bb + +bb: ; preds = %_ZN4llvm8dyn_castINS_11InstructionEPNS_5ValueEEENS_10cast_rettyIT_T0_E8ret_typeERKS6_.exit + tail call void @_ZNK4llvm5Value4dumpEv(%"struct.llvm::Value"* %V) +; CHECK: ret + ret i8 1 + +bb2: ; preds = %entry, %_ZN4llvm8dyn_castINS_11InstructionEPNS_5ValueEEENS_10cast_rettyIT_T0_E8ret_typeERKS6_.exit + ret i8 0 +} + +declare void @__assert_rtn(i8*, i8*, i32, i8*) noreturn + +declare void @_ZNK4llvm5Value4dumpEv(%"struct.llvm::Value"*) From bruno.cardoso at gmail.com Tue Aug 24 20:47:17 2010 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Wed, 25 Aug 2010 01:47:17 -0000 Subject: [llvm-commits] [llvm] r112016 - /llvm/trunk/test/CodeGen/X86/vec_shuffle-24.ll Message-ID: <20100825014717.1AD0C2A6C12C@llvm.org> Author: bruno Date: Tue Aug 24 20:47:16 2010 New Revision: 112016 URL: http://llvm.org/viewvc/llvm-project?rev=112016&view=rev Log: Convert test to use filecheck and make it more specific Modified: llvm/trunk/test/CodeGen/X86/vec_shuffle-24.ll Modified: llvm/trunk/test/CodeGen/X86/vec_shuffle-24.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_shuffle-24.ll?rev=112016&r1=112015&r2=112016&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/vec_shuffle-24.ll (original) +++ llvm/trunk/test/CodeGen/X86/vec_shuffle-24.ll Tue Aug 24 20:47:16 2010 @@ -1,7 +1,8 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 | grep punpck +; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s define i32 @t() nounwind optsize { entry: +; CHECK: punpckldq %a = alloca <4 x i32> ; <<4 x i32>*> [#uses=2] %b = alloca <4 x i32> ; <<4 x i32>*> [#uses=5] volatile store <4 x i32> < i32 0, i32 1, i32 2, i32 3 >, <4 x i32>* %a From bruno.cardoso at gmail.com Tue Aug 24 21:35:37 2010 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Wed, 25 Aug 2010 02:35:37 -0000 Subject: [llvm-commits] [llvm] r112017 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Message-ID: <20100825023537.8EB932A6C12C@llvm.org> Author: bruno Date: Tue Aug 24 21:35:37 2010 New Revision: 112017 URL: http://llvm.org/viewvc/llvm-project?rev=112017&view=rev Log: teach lowering to get target specific nodes for pshufd, emulating the same isel behavior for now, so we can pass all vector shuffle tests Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=112017&r1=112016&r2=112017&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Aug 24 21:35:37 2010 @@ -2560,9 +2560,9 @@ static SDValue getTargetShuffleNode(unsigned Opc, DebugLoc dl, EVT VT, SDValue V1, unsigned TargetMask, SelectionDAG &DAG) { - switch(Opc) { default: llvm_unreachable("Unknown x86 shuffle node"); + case X86ISD::PSHUFD: case X86ISD::PSHUFHW: case X86ISD::PSHUFLW: return DAG.getNode(Opc, dl, VT, V1, DAG.getConstant(TargetMask, MVT::i8)); @@ -2571,6 +2571,29 @@ return SDValue(); } +static SDValue getTargetShuffleNode(unsigned Opc, DebugLoc dl, EVT VT, + SDValue V1, SDValue V2, unsigned TargetMask, SelectionDAG &DAG) { + switch(Opc) { + default: llvm_unreachable("Unknown x86 shuffle node"); + case X86ISD::SHUFPD: + case X86ISD::SHUFPS: + return DAG.getNode(Opc, dl, VT, V1, V2, + DAG.getConstant(TargetMask, MVT::i8)); + } + return SDValue(); +} + +static SDValue getTargetShuffleNode(unsigned Opc, DebugLoc dl, EVT VT, + SDValue V1, SDValue V2, SelectionDAG &DAG) { + switch(Opc) { + default: llvm_unreachable("Unknown x86 shuffle node"); + case X86ISD::MOVLHPS: + case X86ISD::PUNPCKLDQ: + return DAG.getNode(Opc, dl, VT, V1, V2); + } + return SDValue(); +} + SDValue X86TargetLowering::getReturnAddressFrameIndex(SelectionDAG &DAG) const { MachineFunction &MF = DAG.getMachineFunction(); X86MachineFunctionInfo *FuncInfo = MF.getInfo(); @@ -4239,8 +4262,6 @@ NewV = DAG.getVectorShuffle(MVT::v2i64, dl, DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v2i64, V1), DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v2i64, V2), &MaskV[0]); - if (NewV.getOpcode() == ISD::VECTOR_SHUFFLE) - NewV = LowerVECTOR_SHUFFLE(NewV, DAG); NewV = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v8i16, NewV); // Rewrite the MaskVals and assign NewV to V1 if NewV now contains all the @@ -4819,6 +4840,9 @@ bool V2IsUndef = V2.getOpcode() == ISD::UNDEF; bool V1IsSplat = false; bool V2IsSplat = false; + bool HasSSE2 = Subtarget->hasSSE2() || Subtarget->hasAVX(); + MachineFunction &MF = DAG.getMachineFunction(); + bool OptForSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); if (isZeroShuffle(SVOp)) return getZeroVector(VT, Subtarget->hasSSE2(), DAG, dl); @@ -4855,8 +4879,30 @@ } } - if (X86::isPSHUFDMask(SVOp)) - return Op; + if (X86::isPSHUFDMask(SVOp)) { + // The actual implementation will match the mask in the if above and then + // during isel it can match several different instructions, not only pshufd + // as its name says, sad but true, emulate the behavior for now... + if (X86::isMOVDDUPMask(SVOp) && ((VT == MVT::v4f32 || VT == MVT::v2i64))) + return getTargetShuffleNode(X86ISD::MOVLHPS, dl, VT, V1, V1, DAG); + + if (OptForSize && HasSSE2 && X86::isUNPCKL_v_undef_Mask(SVOp) && + VT == MVT::v4i32) + return getTargetShuffleNode(X86ISD::PUNPCKLDQ, dl, VT, V1, V1, DAG); + + unsigned TargetMask = X86::getShuffleSHUFImmediate(SVOp); + + if (HasSSE2 && (VT == MVT::v4f32 || VT == MVT::v4i32)) + return getTargetShuffleNode(X86ISD::PSHUFD, dl, VT, V1, TargetMask, DAG); + + if (HasSSE2 && (VT == MVT::v2i64 || VT == MVT::v2f64)) + return getTargetShuffleNode(X86ISD::SHUFPD, dl, VT, V1, V1, + TargetMask, DAG); + + if (VT == MVT::v4f32) + return getTargetShuffleNode(X86ISD::SHUFPS, dl, VT, V1, V1, + TargetMask, DAG); + } // Check if this can be converted into a logical shift. bool isLeft = false; From bruno.cardoso at gmail.com Tue Aug 24 21:55:41 2010 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Wed, 25 Aug 2010 02:55:41 -0000 Subject: [llvm-commits] [llvm] r112020 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Message-ID: <20100825025541.322812A6C12C@llvm.org> Author: bruno Date: Tue Aug 24 21:55:40 2010 New Revision: 112020 URL: http://llvm.org/viewvc/llvm-project?rev=112020&view=rev Log: PUNPCKLDQ should also be used for v4f32 Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=112020&r1=112019&r2=112020&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Aug 24 21:55:40 2010 @@ -4887,7 +4887,7 @@ return getTargetShuffleNode(X86ISD::MOVLHPS, dl, VT, V1, V1, DAG); if (OptForSize && HasSSE2 && X86::isUNPCKL_v_undef_Mask(SVOp) && - VT == MVT::v4i32) + (VT == MVT::v4i32 || VT == MVT::v4f32)) return getTargetShuffleNode(X86ISD::PUNPCKLDQ, dl, VT, V1, V1, DAG); unsigned TargetMask = X86::getShuffleSHUFImmediate(SVOp); From daniel at zuster.org Tue Aug 24 22:40:20 2010 From: daniel at zuster.org (Daniel Dunbar) Date: Wed, 25 Aug 2010 03:40:20 -0000 Subject: [llvm-commits] [llvm] r112022 - in /llvm/trunk/utils/valgrind: i386-pc-linux-gnu.supp x86_64-pc-linux-gnu.supp Message-ID: <20100825034020.572F82A6C12C@llvm.org> Author: ddunbar Date: Tue Aug 24 22:40:20 2010 New Revision: 112022 URL: http://llvm.org/viewvc/llvm-project?rev=112022&view=rev Log: buildbot/valgrind: Ignore leaks in /usr/bin/as. Modified: llvm/trunk/utils/valgrind/i386-pc-linux-gnu.supp llvm/trunk/utils/valgrind/x86_64-pc-linux-gnu.supp Modified: llvm/trunk/utils/valgrind/i386-pc-linux-gnu.supp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/valgrind/i386-pc-linux-gnu.supp?rev=112022&r1=112021&r2=112022&view=diff ============================================================================== --- llvm/trunk/utils/valgrind/i386-pc-linux-gnu.supp (original) +++ llvm/trunk/utils/valgrind/i386-pc-linux-gnu.supp Tue Aug 24 22:40:20 2010 @@ -28,6 +28,12 @@ } { + We don't care if as leaks + Memcheck:Leak + obj:/usr/bin/as +} + +{ We don't care if python leaks Memcheck:Leak fun:malloc Modified: llvm/trunk/utils/valgrind/x86_64-pc-linux-gnu.supp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/valgrind/x86_64-pc-linux-gnu.supp?rev=112022&r1=112021&r2=112022&view=diff ============================================================================== --- llvm/trunk/utils/valgrind/x86_64-pc-linux-gnu.supp (original) +++ llvm/trunk/utils/valgrind/x86_64-pc-linux-gnu.supp Tue Aug 24 22:40:20 2010 @@ -27,6 +27,12 @@ } { + We don't care if as leaks + Memcheck:Leak + obj:/usr/bin/as +} + +{ We don't care if grep leaks Memcheck:Leak obj:/bin/grep From echristo at apple.com Tue Aug 24 23:58:56 2010 From: echristo at apple.com (Eric Christopher) Date: Wed, 25 Aug 2010 04:58:56 -0000 Subject: [llvm-commits] [llvm] r112025 - /llvm/trunk/utils/TableGen/FastISelEmitter.cpp Message-ID: <20100825045856.6E9142A6C12C@llvm.org> Author: echristo Date: Tue Aug 24 23:58:56 2010 New Revision: 112025 URL: http://llvm.org/viewvc/llvm-project?rev=112025&view=rev Log: Allow strict subclasses of register classes, this way we can handle ARM instructions with: foo GPR, rGPR which happens a lot. Modified: llvm/trunk/utils/TableGen/FastISelEmitter.cpp Modified: llvm/trunk/utils/TableGen/FastISelEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/FastISelEmitter.cpp?rev=112025&r1=112024&r2=112025&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/FastISelEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/FastISelEmitter.cpp Tue Aug 24 23:58:56 2010 @@ -112,9 +112,10 @@ if (!RC) return false; - // For now, all the operands must have the same register class. + // For now, all the operands must have the same register class or be + // a strict subclass of the destination. if (DstRC) { - if (DstRC != RC) + if (DstRC != RC && !DstRC->hasSubClass(RC)) return false; } else DstRC = RC; From pichet2000 at gmail.com Wed Aug 25 01:41:03 2010 From: pichet2000 at gmail.com (Francois Pichet) Date: Wed, 25 Aug 2010 02:41:03 -0400 Subject: [llvm-commits] [llvm] r111941 - in /llvm/trunk: include/llvm/Transforms/Utils/ValueMapper.h lib/Linker/LinkModules.cpp lib/Transforms/Utils/CloneFunction.cpp lib/Transforms/Utils/CloneModule.cpp lib/Transforms/Utils/ValueMapper.cpp lib/Transforms Message-ID: hi This is breaking the CMake build. llvm-link doesn't link anymore. Please update \tools\llvm-link\CMakeLists.txt and add the transformutils dependency: set(LLVM_LINK_COMPONENTS linker bitreader bitwriter asmparser transformutils) On Tue, Aug 24, 2010 at 2:50 PM, Dan Gohman wrote: > Author: djg > Date: Tue Aug 24 13:50:07 2010 > New Revision: 111941 > > URL: http://llvm.org/viewvc/llvm-project?rev=111941&view=rev > Log: > Use MapValue in the Linker instead of having a private function > which does the same thing. This eliminates redundant code and > handles MDNodes better. MDNode linking still doesn't fully > work yet though. > > Added: > ? ?llvm/trunk/include/llvm/Transforms/Utils/ValueMapper.h > ? ? ?- copied, changed from r111917, llvm/trunk/lib/Transforms/Utils/ValueMapper.h > Removed: > ? ?llvm/trunk/lib/Transforms/Utils/ValueMapper.h > Modified: > ? ?llvm/trunk/lib/Linker/LinkModules.cpp > ? ?llvm/trunk/lib/Transforms/Utils/CloneFunction.cpp > ? ?llvm/trunk/lib/Transforms/Utils/CloneModule.cpp > ? ?llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp > > Copied: llvm/trunk/include/llvm/Transforms/Utils/ValueMapper.h (from r111917, llvm/trunk/lib/Transforms/Utils/ValueMapper.h) > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Transforms/Utils/ValueMapper.h?p2=llvm/trunk/include/llvm/Transforms/Utils/ValueMapper.h&p1=llvm/trunk/lib/Transforms/Utils/ValueMapper.h&r1=111917&r2=111941&rev=111941&view=diff > ============================================================================== > --- llvm/trunk/lib/Transforms/Utils/ValueMapper.h (original) > +++ llvm/trunk/include/llvm/Transforms/Utils/ValueMapper.h Tue Aug 24 13:50:07 2010 > @@ -1,4 +1,4 @@ > -//===- ValueMapper.h - Interface shared by lib/Transforms/Utils -*- C++ -*-===// > +//===- ValueMapper.h - Remapping for constants and metadata -----*- C++ -*-===// > ?// > ?// ? ? ? ? ? ? ? ? ? ? The LLVM Compiler Infrastructure > ?// > @@ -12,8 +12,8 @@ > ?// > ?//===----------------------------------------------------------------------===// > > -#ifndef VALUEMAPPER_H > -#define VALUEMAPPER_H > +#ifndef LLVM_TRANSFORMS_UTILS_VALUEMAPPER_H > +#define LLVM_TRANSFORMS_UTILS_VALUEMAPPER_H > > ?#include "llvm/ADT/ValueMap.h" > > > Modified: llvm/trunk/lib/Linker/LinkModules.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Linker/LinkModules.cpp?rev=111941&r1=111940&r2=111941&view=diff > ============================================================================== > --- llvm/trunk/lib/Linker/LinkModules.cpp (original) > +++ llvm/trunk/lib/Linker/LinkModules.cpp Tue Aug 24 13:50:07 2010 > @@ -29,6 +29,7 @@ > ?#include "llvm/Support/ErrorHandling.h" > ?#include "llvm/Support/raw_ostream.h" > ?#include "llvm/System/Path.h" > +#include "llvm/Transforms/Utils/ValueMapper.h" > ?#include "llvm/ADT/DenseMap.h" > ?using namespace llvm; > > @@ -334,97 +335,6 @@ > ? return false; > ?} > > -#ifndef NDEBUG > -static void PrintMap(const std::map &M) { > - ?for (std::map::const_iterator I = M.begin(), E =M.end(); > - ? ? ? I != E; ++I) { > - ? ?dbgs() << " Fr: " << (const void*)I->first << " "; > - ? ?I->first->dump(); > - ? ?dbgs() << " To: " << (const void*)I->second << " "; > - ? ?I->second->dump(); > - ? ?dbgs() << "\n"; > - ?} > -} > -#endif > - > - > -// RemapOperand - Use ValueMap to convert constants from one module to another. > -static Value *RemapOperand(const Value *In, > - ? ? ? ? ? ? ? ? ? ? ? ? ? std::map &ValueMap) { > - ?std::map::const_iterator I = ValueMap.find(In); > - ?if (I != ValueMap.end()) > - ? ?return I->second; > - > - ?// Check to see if it's a constant that we are interested in transforming. > - ?Value *Result = 0; > - ?if (const Constant *CPV = dyn_cast(In)) { > - ? ?if ((!isa(CPV->getType()) && !isa(CPV)) || > - ? ? ? ?isa(CPV) || isa(CPV)) > - ? ? ?return const_cast(CPV); ? // Simple constants stay identical. > - > - ? ?if (const ConstantArray *CPA = dyn_cast(CPV)) { > - ? ? ?std::vector Operands(CPA->getNumOperands()); > - ? ? ?for (unsigned i = 0, e = CPA->getNumOperands(); i != e; ++i) > - ? ? ? ?Operands[i] =cast(RemapOperand(CPA->getOperand(i), ValueMap)); > - ? ? ?Result = ConstantArray::get(cast(CPA->getType()), Operands); > - ? ?} else if (const ConstantStruct *CPS = dyn_cast(CPV)) { > - ? ? ?std::vector Operands(CPS->getNumOperands()); > - ? ? ?for (unsigned i = 0, e = CPS->getNumOperands(); i != e; ++i) > - ? ? ? ?Operands[i] =cast(RemapOperand(CPS->getOperand(i), ValueMap)); > - ? ? ?Result = ConstantStruct::get(cast(CPS->getType()), Operands); > - ? ?} else if (isa(CPV) || isa(CPV)) { > - ? ? ?Result = const_cast(CPV); > - ? ?} else if (const ConstantVector *CP = dyn_cast(CPV)) { > - ? ? ?std::vector Operands(CP->getNumOperands()); > - ? ? ?for (unsigned i = 0, e = CP->getNumOperands(); i != e; ++i) > - ? ? ? ?Operands[i] = cast(RemapOperand(CP->getOperand(i), ValueMap)); > - ? ? ?Result = ConstantVector::get(Operands); > - ? ?} else if (const ConstantExpr *CE = dyn_cast(CPV)) { > - ? ? ?std::vector Ops; > - ? ? ?for (unsigned i = 0, e = CE->getNumOperands(); i != e; ++i) > - ? ? ? ?Ops.push_back(cast(RemapOperand(CE->getOperand(i),ValueMap))); > - ? ? ?Result = CE->getWithOperands(Ops); > - ? ?} else if (const BlockAddress *CE = dyn_cast(CPV)) { > - ? ? ?Result = BlockAddress::get( > - ? ? ? ? ? ? ? ? cast(RemapOperand(CE->getFunction(), ValueMap)), > - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? CE->getBasicBlock()); > - ? ?} else { > - ? ? ?assert(!isa(CPV) && "Unmapped global?"); > - ? ? ?llvm_unreachable("Unknown type of derived type constant value!"); > - ? ?} > - ?} else if (const MDNode *MD = dyn_cast(In)) { > - ? ?if (MD->isFunctionLocal()) { > - ? ? ?SmallVector Elts; > - ? ? ?for (unsigned i = 0, e = MD->getNumOperands(); i != e; ++i) { > - ? ? ? ?if (MD->getOperand(i)) > - ? ? ? ? ?Elts.push_back(RemapOperand(MD->getOperand(i), ValueMap)); > - ? ? ? ?else > - ? ? ? ? ?Elts.push_back(NULL); > - ? ? ?} > - ? ? ?Result = MDNode::get(In->getContext(), Elts.data(), MD->getNumOperands()); > - ? ?} else { > - ? ? ?Result = const_cast(In); > - ? ?} > - ?} else if (isa(In) || isa(In) || isa(In)) { > - ? ?Result = const_cast(In); > - ?} > - > - ?// Cache the mapping in our local map structure > - ?if (Result) { > - ? ?ValueMap[In] = Result; > - ? ?return Result; > - ?} > - > -#ifndef NDEBUG > - ?dbgs() << "LinkModules ValueMap: \n"; > - ?PrintMap(ValueMap); > - > - ?dbgs() << "Couldn't remap value: " << (const void*)In << " " << *In << "\n"; > - ?llvm_unreachable("Couldn't remap value!"); > -#endif > - ?return 0; > -} > - > ?/// ForceRenaming - The LLVM SymbolTable class autorenames globals that conflict > ?/// in the symbol table. ?This is good for all clients except for us. ?Go > ?/// through the trouble to force this back. > @@ -555,7 +465,7 @@ > ?// LinkGlobals - Loop through the global variables in the src module and merge > ?// them into the dest module. > ?static bool LinkGlobals(Module *Dest, const Module *Src, > - ? ? ? ? ? ? ? ? ? ? ? ?std::map &ValueMap, > + ? ? ? ? ? ? ? ? ? ? ? ?ValueToValueMapTy &ValueMap, > ? ? ? ? ? ? ? ? ? ? std::multimap &AppendingVars, > ? ? ? ? ? ? ? ? ? ? ? ? std::string *Err) { > ? ValueSymbolTable &DestSymTab = Dest->getValueSymbolTable(); > @@ -742,7 +652,7 @@ > ?// dest module. We're assuming, that all functions/global variables were already > ?// linked in. > ?static bool LinkAlias(Module *Dest, const Module *Src, > - ? ? ? ? ? ? ? ? ? ? ?std::map &ValueMap, > + ? ? ? ? ? ? ? ? ? ? ?ValueToValueMapTy &ValueMap, > ? ? ? ? ? ? ? ? ? ? ? std::string *Err) { > ? // Loop over all alias in the src module > ? for (Module::const_alias_iterator I = Src->alias_begin(), > @@ -753,7 +663,7 @@ > > ? ? // Globals were already linked, thus we can just query ValueMap for variant > ? ? // of SAliasee in Dest. > - ? ?std::map::const_iterator VMI = ValueMap.find(SAliasee); > + ? ?ValueToValueMapTy::const_iterator VMI = ValueMap.find(SAliasee); > ? ? assert(VMI != ValueMap.end() && "Aliasee not linked"); > ? ? GlobalValue* DAliasee = cast(VMI->second); > ? ? GlobalValue* DGV = NULL; > @@ -884,7 +794,7 @@ > ? ? ? ForceRenaming(NewGA, SGA->getName()); > > ? ? // Remember this mapping so uses in the source module get remapped > - ? ?// later by RemapOperand. > + ? ?// later by MapValue. > ? ? ValueMap[SGA] = NewGA; > ? } > > @@ -895,7 +805,7 @@ > ?// LinkGlobalInits - Update the initializers in the Dest module now that all > ?// globals that may be referenced are in Dest. > ?static bool LinkGlobalInits(Module *Dest, const Module *Src, > - ? ? ? ? ? ? ? ? ? ? ? ? ? ?std::map &ValueMap, > + ? ? ? ? ? ? ? ? ? ? ? ? ? ?ValueToValueMapTy &ValueMap, > ? ? ? ? ? ? ? ? ? ? ? ? ? ? std::string *Err) { > ? // Loop over all of the globals in the src module, mapping them over as we go > ? for (Module::const_global_iterator I = Src->global_begin(), > @@ -905,7 +815,7 @@ > ? ? if (SGV->hasInitializer()) { ? ? ?// Only process initialized GV's > ? ? ? // Figure out what the initializer looks like in the dest module... > ? ? ? Constant *SInit = > - ? ? ? ?cast(RemapOperand(SGV->getInitializer(), ValueMap)); > + ? ? ? ?cast(MapValue(SGV->getInitializer(), ValueMap)); > ? ? ? // Grab destination global variable or alias. > ? ? ? GlobalValue *DGV = cast(ValueMap[SGV]->stripPointerCasts()); > > @@ -950,7 +860,7 @@ > ?// to the Dest function... > ?// > ?static bool LinkFunctionProtos(Module *Dest, const Module *Src, > - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? std::map &ValueMap, > + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ValueToValueMapTy &ValueMap, > ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?std::string *Err) { > ? ValueSymbolTable &DestSymTab = Dest->getValueSymbolTable(); > > @@ -1035,7 +945,7 @@ > ? ? ? ? ForceRenaming(NewDF, SF->getName()); > > ? ? ? // Remember this mapping so uses in the source module get remapped > - ? ? ?// later by RemapOperand. > + ? ? ?// later by MapValue. > ? ? ? ValueMap[SF] = NewDF; > ? ? ? continue; > ? ? } > @@ -1065,7 +975,7 @@ > ?// fix up references to values. ?At this point we know that Dest is an external > ?// function, and that Src is not. > ?static bool LinkFunctionBody(Function *Dest, Function *Src, > - ? ? ? ? ? ? ? ? ? ? ? ? ? ? std::map &ValueMap, > + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ValueToValueMapTy &ValueMap, > ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?std::string *Err) { > ? assert(Src && Dest && Dest->isDeclaration() && !Src->isDeclaration()); > > @@ -1092,7 +1002,7 @@ > ? ? ? for (Instruction::op_iterator OI = I->op_begin(), OE = I->op_end(); > ? ? ? ? ? ?OI != OE; ++OI) > ? ? ? ? if (!isa(*OI) && !isa(*OI)) > - ? ? ? ? ?*OI = RemapOperand(*OI, ValueMap); > + ? ? ? ? ?*OI = MapValue(*OI, ValueMap); > > ? // There is no need to map the arguments anymore. > ? for (Function::arg_iterator I = Src->arg_begin(), E = Src->arg_end(); > @@ -1107,7 +1017,7 @@ > ?// source module into the DestModule. ?This consists basically of copying the > ?// function over and fixing up references to values. > ?static bool LinkFunctionBodies(Module *Dest, Module *Src, > - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? std::map &ValueMap, > + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ValueToValueMapTy &ValueMap, > ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?std::string *Err) { > > ? // Loop over all of the functions in the src module, mapping them over as we > @@ -1315,8 +1225,10 @@ > ? ? return true; > > ? // ValueMap - Mapping of values from what they used to be in Src, to what they > - ?// are now in Dest. > - ?std::map ValueMap; > + ?// are now in Dest. ?ValueToValueMapTy is a ValueMap, which involves some > + ?// overhead due to the use of Value handles which the Linker doesn't actually > + ?// need, but this allows us to reuse the ValueMapper code. > + ?ValueToValueMapTy ValueMap; > > ? // AppendingVars - Keep track of global variables in the destination module > ? // with appending linkage. ?After the module is linked together, they are > > Modified: llvm/trunk/lib/Transforms/Utils/CloneFunction.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/CloneFunction.cpp?rev=111941&r1=111940&r2=111941&view=diff > ============================================================================== > --- llvm/trunk/lib/Transforms/Utils/CloneFunction.cpp (original) > +++ llvm/trunk/lib/Transforms/Utils/CloneFunction.cpp Tue Aug 24 13:50:07 2010 > @@ -23,7 +23,7 @@ > ?#include "llvm/LLVMContext.h" > ?#include "llvm/Metadata.h" > ?#include "llvm/Support/CFG.h" > -#include "ValueMapper.h" > +#include "llvm/Transforms/Utils/ValueMapper.h" > ?#include "llvm/Analysis/ConstantFolding.h" > ?#include "llvm/Analysis/DebugInfo.h" > ?#include "llvm/ADT/SmallVector.h" > > Modified: llvm/trunk/lib/Transforms/Utils/CloneModule.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/CloneModule.cpp?rev=111941&r1=111940&r2=111941&view=diff > ============================================================================== > --- llvm/trunk/lib/Transforms/Utils/CloneModule.cpp (original) > +++ llvm/trunk/lib/Transforms/Utils/CloneModule.cpp Tue Aug 24 13:50:07 2010 > @@ -17,7 +17,7 @@ > ?#include "llvm/DerivedTypes.h" > ?#include "llvm/TypeSymbolTable.h" > ?#include "llvm/Constant.h" > -#include "ValueMapper.h" > +#include "llvm/Transforms/Utils/ValueMapper.h" > ?using namespace llvm; > > ?/// CloneModule - Return an exact copy of the specified module. ?This is not as > > Modified: llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp?rev=111941&r1=111940&r2=111941&view=diff > ============================================================================== > --- llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp (original) > +++ llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp Tue Aug 24 13:50:07 2010 > @@ -12,7 +12,7 @@ > ?// > ?//===----------------------------------------------------------------------===// > > -#include "ValueMapper.h" > +#include "llvm/Transforms/Utils/ValueMapper.h" > ?#include "llvm/Type.h" > ?#include "llvm/Constants.h" > ?#include "llvm/Function.h" > > Removed: llvm/trunk/lib/Transforms/Utils/ValueMapper.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/ValueMapper.h?rev=111940&view=auto > ============================================================================== > --- llvm/trunk/lib/Transforms/Utils/ValueMapper.h (original) > +++ llvm/trunk/lib/Transforms/Utils/ValueMapper.h (removed) > @@ -1,29 +0,0 @@ > -//===- ValueMapper.h - Interface shared by lib/Transforms/Utils -*- C++ -*-===// > -// > -// ? ? ? ? ? ? ? ? ? ? The LLVM Compiler Infrastructure > -// > -// This file is distributed under the University of Illinois Open Source > -// License. See LICENSE.TXT for details. > -// > -//===----------------------------------------------------------------------===// > -// > -// This file defines the MapValue interface which is used by various parts of > -// the Transforms/Utils library to implement cloning and linking facilities. > -// > -//===----------------------------------------------------------------------===// > - > -#ifndef VALUEMAPPER_H > -#define VALUEMAPPER_H > - > -#include "llvm/ADT/ValueMap.h" > - > -namespace llvm { > - ?class Value; > - ?class Instruction; > - ?typedef ValueMap ValueToValueMapTy; > - > - ?Value *MapValue(const Value *V, ValueToValueMapTy &VM); > - ?void RemapInstruction(Instruction *I, ValueToValueMapTy &VM); > -} // End llvm namespace > - > -#endif > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > From echristo at apple.com Wed Aug 25 01:45:22 2010 From: echristo at apple.com (Eric Christopher) Date: Wed, 25 Aug 2010 06:45:22 -0000 Subject: [llvm-commits] [llvm] r112029 - /llvm/trunk/tools/llvm-link/CMakeLists.txt Message-ID: <20100825064522.F01AF2A6C12C@llvm.org> Author: echristo Date: Wed Aug 25 01:45:22 2010 New Revision: 112029 URL: http://llvm.org/viewvc/llvm-project?rev=112029&view=rev Log: Apparently this is needed for llvm-link to link. Untested. Modified: llvm/trunk/tools/llvm-link/CMakeLists.txt Modified: llvm/trunk/tools/llvm-link/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-link/CMakeLists.txt?rev=112029&r1=112028&r2=112029&view=diff ============================================================================== --- llvm/trunk/tools/llvm-link/CMakeLists.txt (original) +++ llvm/trunk/tools/llvm-link/CMakeLists.txt Wed Aug 25 01:45:22 2010 @@ -1,4 +1,4 @@ -set(LLVM_LINK_COMPONENTS linker bitreader bitwriter asmparser) +set(LLVM_LINK_COMPONENTS linker bitreader bitwriter asmparser transformutils) add_llvm_tool(llvm-link llvm-link.cpp From echristo at apple.com Wed Aug 25 01:46:22 2010 From: echristo at apple.com (Eric Christopher) Date: Tue, 24 Aug 2010 23:46:22 -0700 Subject: [llvm-commits] [llvm] r111941 - in /llvm/trunk: include/llvm/Transforms/Utils/ValueMapper.h lib/Linker/LinkModules.cpp lib/Transforms/Utils/CloneFunction.cpp lib/Transforms/Utils/CloneModule.cpp lib/Transforms/Utils/ValueMapper.cpp lib/Transforms In-Reply-To: References: Message-ID: <0F069BAA-4256-40A5-BF29-1236A8E7075E@apple.com> On Aug 24, 2010, at 11:41 PM, Francois Pichet wrote: > hi > > This is breaking the CMake build. llvm-link doesn't link anymore. > Please update \tools\llvm-link\CMakeLists.txt and add the > transformutils dependency: > > set(LLVM_LINK_COMPONENTS linker bitreader bitwriter asmparser transformutils) > I did this here: [issola:llvm/tools/llvm-link] echristo% svn ci Sending llvm-link/CMakeLists.txt Transmitting file data . Committed revision 112029. Does it work for you? -eric From pichet2000 at gmail.com Wed Aug 25 01:54:19 2010 From: pichet2000 at gmail.com (Francois Pichet) Date: Wed, 25 Aug 2010 02:54:19 -0400 Subject: [llvm-commits] [llvm] r111941 - in /llvm/trunk: include/llvm/Transforms/Utils/ValueMapper.h lib/Linker/LinkModules.cpp lib/Transforms/Utils/CloneFunction.cpp lib/Transforms/Utils/CloneModule.cpp lib/Transforms/Utils/ValueMapper.cpp lib/Transforms In-Reply-To: <0F069BAA-4256-40A5-BF29-1236A8E7075E@apple.com> References: <0F069BAA-4256-40A5-BF29-1236A8E7075E@apple.com> Message-ID: yes it works. On Wed, Aug 25, 2010 at 2:46 AM, Eric Christopher wrote: > > On Aug 24, 2010, at 11:41 PM, Francois Pichet wrote: > >> hi >> >> This is breaking the CMake build. llvm-link doesn't link anymore. >> Please update \tools\llvm-link\CMakeLists.txt and add the >> transformutils dependency: >> >> set(LLVM_LINK_COMPONENTS linker bitreader bitwriter asmparser transformutils) >> > > I did this here: > > [issola:llvm/tools/llvm-link] echristo% svn ci > Sending ? ? ? ?llvm-link/CMakeLists.txt > Transmitting file data . > Committed revision 112029. > > Does it work for you? > > -eric > > From echristo at apple.com Wed Aug 25 02:23:49 2010 From: echristo at apple.com (Eric Christopher) Date: Wed, 25 Aug 2010 07:23:49 -0000 Subject: [llvm-commits] [llvm] r112031 - /llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Message-ID: <20100825072349.5E6472A6C12C@llvm.org> Author: echristo Date: Wed Aug 25 02:23:49 2010 New Revision: 112031 URL: http://llvm.org/viewvc/llvm-project?rev=112031&view=rev Log: Reorganize load mechanisms. Handle types in a little less fixed way. Fix some todos. No functional change. Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=112031&r1=112030&r2=112031&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Wed Aug 25 02:23:49 2010 @@ -58,9 +58,6 @@ const TargetInstrInfo &TII; const TargetLowering &TLI; const ARMFunctionInfo *AFI; - - // FIXME: Remove this and replace it with queries. - const TargetRegisterClass *FixedRC; public: explicit ARMFastISel(FunctionLoweringInfo &funcInfo) @@ -70,7 +67,6 @@ TLI(*TM.getTargetLowering()) { Subtarget = &TM.getSubtarget(); AFI = funcInfo.MF->getInfo(); - FixedRC = ARM::GPRRegisterClass; } // Code from FastISel.cpp. @@ -113,6 +109,8 @@ // Utility routines. private: + bool isTypeLegal(const Type *Ty, EVT &VT); + bool ARMEmitLoad(EVT VT, unsigned &ResultReg, unsigned Reg, int Offset); bool ARMLoadAlloca(const Instruction *I); bool ARMComputeRegOffset(const Value *Obj, unsigned &Reg, int &Offset); @@ -314,6 +312,16 @@ return ResultReg; } +bool ARMFastISel::isTypeLegal(const Type *Ty, EVT &VT) { + VT = TLI.getValueType(Ty, true); + + // Only handle simple types. + if (VT == MVT::Other || !VT.isSimple()) return false; + + // For now, only handle 32-bit types. + return VT == MVT::i32; +} + // Computes the Reg+Offset to get to an object. bool ARMFastISel::ARMComputeRegOffset(const Value *Obj, unsigned &Reg, int &Offset) { @@ -370,9 +378,10 @@ FuncInfo.StaticAllocaMap.find(AI); if (SI != FuncInfo.StaticAllocaMap.end()) { - unsigned ResultReg = createResultReg(FixedRC); + TargetRegisterClass* RC = TLI.getRegClassFor(TLI.getPointerTy()); + unsigned ResultReg = createResultReg(RC); TII.loadRegFromStackSlot(*FuncInfo.MBB, *FuncInfo.InsertPt, - ResultReg, SI->second, FixedRC, + ResultReg, SI->second, RC, TM.getRegisterInfo()); UpdateValueMap(I, ResultReg); return true; @@ -382,6 +391,29 @@ return false; } +bool ARMFastISel::ARMEmitLoad(EVT VT, unsigned &ResultReg, + unsigned Reg, int Offset) { + + assert(VT.isSimple() && "Non-simple types are invalid here!"); + switch (VT.getSimpleVT().SimpleTy) { + default: return false; + case MVT::i32: { + ResultReg = createResultReg(ARM::GPRRegisterClass); + // TODO: Fix the Addressing modes so that these can share some code. + // Since this is a Thumb1 load this will work in Thumb1 or 2 mode. + if (AFI->isThumbFunction()) + AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, + TII.get(ARM::tLDR), ResultReg) + .addReg(Reg).addImm(Offset).addReg(0)); + else + AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, + TII.get(ARM::LDR), ResultReg) + .addReg(Reg).addReg(0).addImm(Offset)); + return true; + } + } +} + bool ARMFastISel::ARMSelectLoad(const Instruction *I) { // Our register and offset with innocuous defaults. unsigned Reg = 0; @@ -413,22 +445,16 @@ static_cast(TII)); } - // FIXME: There is more than one register class in the world... + EVT VT; + if (!isTypeLegal(I->getType(), VT)) + return false; + + unsigned ResultReg; // TODO: Verify the additions above work, otherwise we'll need to add the // offset instead of 0 and do all sorts of operand munging. - unsigned ResultReg = createResultReg(FixedRC); - // TODO: Fix the Addressing modes so that these can share some code. - // Since this is a Thumb1 load this will work in Thumb1 or 2 mode. - if (AFI->isThumbFunction()) - AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, - TII.get(ARM::tLDR), ResultReg) - .addReg(Reg).addImm(0).addReg(0)); - else - AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, - TII.get(ARM::LDR), ResultReg) - .addReg(Reg).addReg(0).addImm(0)); + if (!ARMEmitLoad(VT, ResultReg, Reg, 0)) return false; + UpdateValueMap(I, ResultReg); - return true; } From echristo at apple.com Wed Aug 25 02:47:00 2010 From: echristo at apple.com (Eric Christopher) Date: Wed, 25 Aug 2010 07:47:00 -0000 Subject: [llvm-commits] [llvm] r112033 - /llvm/trunk/test/CodeGen/ARM/fast-isel.ll Message-ID: <20100825074700.39A002A6C12D@llvm.org> Author: echristo Date: Wed Aug 25 02:47:00 2010 New Revision: 112033 URL: http://llvm.org/viewvc/llvm-project?rev=112033&view=rev Log: Make this testcase actually executed with fast-isel on arm. Modified: llvm/trunk/test/CodeGen/ARM/fast-isel.ll Modified: llvm/trunk/test/CodeGen/ARM/fast-isel.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fast-isel.ll?rev=112033&r1=112032&r2=112033&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/fast-isel.ll (original) +++ llvm/trunk/test/CodeGen/ARM/fast-isel.ll Wed Aug 25 02:47:00 2010 @@ -1,4 +1,4 @@ -; RUN: llc < %s -fast-isel -fast-isel-abort -march=arm +; RUN: llc < %s -O0 -arm-fast-isel -fast-isel-abort -mtriple=armv7-apple-darwin ; Very basic fast-isel functionality. From bigcheesegs at gmail.com Wed Aug 25 02:48:18 2010 From: bigcheesegs at gmail.com (Michael Spencer) Date: Wed, 25 Aug 2010 03:48:18 -0400 Subject: [llvm-commits] [PATCH] Fix broken test on windows. Message-ID: This patch fixes a test on windows. I could not figure out what the problem with the grep line was. I could make it work by simply saving the file with VS, but that doesn't make any sense because I checkout unix line endings and VS will use unix line endings if that's what the file has. There are other tests that use this exact same pattern (including the trailing \ and new line with grep) that pass on windows. The FileCheck lines are much clearer anyway (damn TCL). It also doesn't include the embedded tab. I'm posting this for review mainly because I'm not 100% sure the check line is correct. I don't get why the %'s were in []'s in the grep line. Was that just to make TCL happy? - Michael Spencer -------------- next part -------------- A non-text attachment was scrubbed... Name: fix-windows-test.patch Type: application/octet-stream Size: 611 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20100825/6da1c65c/attachment.obj From asl at math.spbu.ru Wed Aug 25 02:50:11 2010 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Wed, 25 Aug 2010 07:50:11 -0000 Subject: [llvm-commits] [llvm] r112034 - in /llvm/trunk/lib/Target/X86: X86ISelLowering.cpp X86InstrInfo.td X86RegisterInfo.cpp Message-ID: <20100825075011.F14702A6C12D@llvm.org> Author: asl Date: Wed Aug 25 02:50:11 2010 New Revision: 112034 URL: http://llvm.org/viewvc/llvm-project?rev=112034&view=rev Log: Fix nasty mingw32 bug, which e.g. prevented llvm-gcc bootstrap there. Mark _alloca call as clobberring EFLAGS, otherwise some DCE might remove other flags-clobberring stuff (e.g. cmp instructions) occuring after _alloca call. Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/lib/Target/X86/X86InstrInfo.td llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=112034&r1=112033&r2=112034&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Aug 25 02:50:11 2010 @@ -8930,7 +8930,8 @@ .addReg(X86::EAX, RegState::Implicit) .addReg(X86::ESP, RegState::Implicit) .addReg(X86::EAX, RegState::Define | RegState::Implicit) - .addReg(X86::ESP, RegState::Define | RegState::Implicit); + .addReg(X86::ESP, RegState::Define | RegState::Implicit) + .addReg(X86::EFLAGS, RegState::Define | RegState::Implicit); MI->eraseFromParent(); // The pseudo instruction is gone now. return BB; Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=112034&r1=112033&r2=112034&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Wed Aug 25 02:50:11 2010 @@ -580,9 +580,10 @@ // The main point of having separate instruction are extra unmodelled effects // (compared to ordinary calls) like stack pointer change. -def MINGW_ALLOCA : I<0, Pseudo, (outs), (ins), - "# dynamic stack allocation", - [(X86MingwAlloca)]>; +let Defs = [EAX, ESP, EFLAGS], Uses = [ESP] in + def MINGW_ALLOCA : I<0, Pseudo, (outs), (ins), + "# dynamic stack allocation", + [(X86MingwAlloca)]>; } // Nop Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp?rev=112034&r1=112033&r2=112034&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp Wed Aug 25 02:50:11 2010 @@ -1109,7 +1109,8 @@ .addImm(NumBytes); BuildMI(MBB, MBBI, DL, TII.get(X86::CALLpcrel32)) .addExternalSymbol("_alloca") - .addReg(StackPtr, RegState::Define | RegState::Implicit); + .addReg(StackPtr, RegState::Define | RegState::Implicit) + .addReg(X86::EFLAGS, RegState::Define | RegState::Implicit); } else { // Save EAX BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH32r)) @@ -1121,7 +1122,8 @@ .addImm(NumBytes - 4); BuildMI(MBB, MBBI, DL, TII.get(X86::CALLpcrel32)) .addExternalSymbol("_alloca") - .addReg(StackPtr, RegState::Define | RegState::Implicit); + .addReg(StackPtr, RegState::Define | RegState::Implicit) + .addReg(X86::EFLAGS, RegState::Define | RegState::Implicit); // Restore EAX MachineInstr *MI = addRegOffset(BuildMI(MF, DL, TII.get(X86::MOV32rm), From echristo at apple.com Wed Aug 25 02:53:15 2010 From: echristo at apple.com (Eric Christopher) Date: Wed, 25 Aug 2010 07:53:15 -0000 Subject: [llvm-commits] [llvm] r112035 - /llvm/trunk/test/CodeGen/ARM/fast-isel.ll Message-ID: <20100825075315.ECFA32A6C12D@llvm.org> Author: echristo Date: Wed Aug 25 02:53:15 2010 New Revision: 112035 URL: http://llvm.org/viewvc/llvm-project?rev=112035&view=rev Log: Run this on thumb and arm. Modified: llvm/trunk/test/CodeGen/ARM/fast-isel.ll Modified: llvm/trunk/test/CodeGen/ARM/fast-isel.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fast-isel.ll?rev=112035&r1=112034&r2=112035&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/fast-isel.ll (original) +++ llvm/trunk/test/CodeGen/ARM/fast-isel.ll Wed Aug 25 02:53:15 2010 @@ -1,4 +1,5 @@ ; RUN: llc < %s -O0 -arm-fast-isel -fast-isel-abort -mtriple=armv7-apple-darwin +; RUN: llc < %s -O0 -arm-fast-isel -fast-isel-abort -mtriple=thumbv7-apple-darwin ; Very basic fast-isel functionality. From echristo at apple.com Wed Aug 25 02:57:29 2010 From: echristo at apple.com (Eric Christopher) Date: Wed, 25 Aug 2010 07:57:29 -0000 Subject: [llvm-commits] [llvm] r112036 - /llvm/trunk/test/CodeGen/ARM/fast-isel.ll Message-ID: <20100825075729.41F592A6C12D@llvm.org> Author: echristo Date: Wed Aug 25 02:57:29 2010 New Revision: 112036 URL: http://llvm.org/viewvc/llvm-project?rev=112036&view=rev Log: Add another basic test cribbed from the x86 fast-isel tests. Modified: llvm/trunk/test/CodeGen/ARM/fast-isel.ll Modified: llvm/trunk/test/CodeGen/ARM/fast-isel.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fast-isel.ll?rev=112036&r1=112035&r2=112036&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/fast-isel.ll (original) +++ llvm/trunk/test/CodeGen/ARM/fast-isel.ll Wed Aug 25 02:57:29 2010 @@ -14,3 +14,26 @@ %add = add nsw i32 %tmp, %tmp1 ret i32 %add } + +define i32* @foo(i32* %p, i32* %q, i32** %z) nounwind { +entry: + %r = load i32* %p + %s = load i32* %q + %y = load i32** %z + br label %fast + +fast: + %t0 = add i32 %r, %s + %t1 = mul i32 %t0, %s + %t2 = sub i32 %t1, %s + %t3 = and i32 %t2, %s + %t4 = xor i32 %t3, 3 + %t5 = xor i32 %t4, %s + %t6 = add i32 %t5, 2 + %t7 = getelementptr i32* %y, i32 1 + %t8 = getelementptr i32* %t7, i32 %t6 + br label %exit + +exit: + ret i32* %t8 +} From echristo at apple.com Wed Aug 25 03:43:57 2010 From: echristo at apple.com (Eric Christopher) Date: Wed, 25 Aug 2010 08:43:57 -0000 Subject: [llvm-commits] [llvm] r112039 - /llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Message-ID: <20100825084357.BAE162A6C12C@llvm.org> Author: echristo Date: Wed Aug 25 03:43:57 2010 New Revision: 112039 URL: http://llvm.org/viewvc/llvm-project?rev=112039&view=rev Log: Do type checks before we bother to do everything else. Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=112039&r1=112038&r2=112039&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Wed Aug 25 03:43:57 2010 @@ -415,14 +415,19 @@ } bool ARMFastISel::ARMSelectLoad(const Instruction *I) { - // Our register and offset with innocuous defaults. - unsigned Reg = 0; - int Offset = 0; - // If we're an alloca we know we have a frame index and can emit the load // directly in short order. if (ARMLoadAlloca(I)) return true; + + // Verify we have a legal type before going any further. + EVT VT; + if (!isTypeLegal(I->getType(), VT)) + return false; + + // Our register and offset with innocuous defaults. + unsigned Reg = 0; + int Offset = 0; // See if we can handle this as Reg + Offset if (!ARMComputeRegOffset(I->getOperand(0), Reg, Offset)) @@ -445,10 +450,6 @@ static_cast(TII)); } - EVT VT; - if (!isTypeLegal(I->getType(), VT)) - return false; - unsigned ResultReg; // TODO: Verify the additions above work, otherwise we'll need to add the // offset instead of 0 and do all sorts of operand munging. From echristo at apple.com Wed Aug 25 03:44:54 2010 From: echristo at apple.com (Eric Christopher) Date: Wed, 25 Aug 2010 08:44:54 -0000 Subject: [llvm-commits] [llvm] r112041 - /llvm/trunk/autoconf/configure.ac Message-ID: <20100825084454.968342A6C12C@llvm.org> Author: echristo Date: Wed Aug 25 03:44:54 2010 New Revision: 112041 URL: http://llvm.org/viewvc/llvm-project?rev=112041&view=rev Log: Remove getsect checks, the result is unused and is broken anyhow. Fixes PR7967. Owen: You added these, any reason? Modified: llvm/trunk/autoconf/configure.ac Modified: llvm/trunk/autoconf/configure.ac URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/autoconf/configure.ac?rev=112041&r1=112040&r2=112041&view=diff ============================================================================== --- llvm/trunk/autoconf/configure.ac (original) +++ llvm/trunk/autoconf/configure.ac Wed Aug 25 03:44:54 2010 @@ -1269,9 +1269,6 @@ dnl Try to find Darwin specific crash reporting library. AC_CHECK_HEADERS([CrashReporterClient.h]) -dnl Try to find Darwin specific linker-section library. -AC_CHECK_HEADERS([mach-o/getsect.h]) - dnl===-----------------------------------------------------------------------=== dnl=== dnl=== SECTION 7: Check for types and structures @@ -1351,23 +1348,6 @@ AC_DEFINE(LLVM_MULTITHREADED, 0, Build multithreading support into LLVM) AC_MSG_WARN([LLVM will be built thread-unsafe because atomic builtins are missing])) -dnl Check for Darwin-specific getsect(). -AC_MSG_CHECKING(for getsect()) -AC_COMPILE_IFELSE( - AC_LANG_SOURCE( - [[#include - int main() { - unsigned long p; - return (int)getsect("__DATA","__pass_info", &p); - } - ]]), - AC_MSG_RESULT(yes) - AC_DEFINE(HAVE_GETSECT, 1, Have Darwin getsect() support), - AC_MSG_RESULT(no) - AC_DEFINE(HAVE_GETSECT, 1, Have Darwin getsect() support) -) - - dnl===-----------------------------------------------------------------------=== dnl=== dnl=== SECTION 9: Additional checks, variables, etc. From echristo at apple.com Wed Aug 25 03:45:06 2010 From: echristo at apple.com (Eric Christopher) Date: Wed, 25 Aug 2010 08:45:06 -0000 Subject: [llvm-commits] [llvm] r112042 - in /llvm/trunk: configure include/llvm/Config/config.h.in Message-ID: <20100825084506.EE0252A6C12C@llvm.org> Author: echristo Date: Wed Aug 25 03:45:06 2010 New Revision: 112042 URL: http://llvm.org/viewvc/llvm-project?rev=112042&view=rev Log: Regenerate. Modified: llvm/trunk/configure llvm/trunk/include/llvm/Config/config.h.in Modified: llvm/trunk/configure URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/configure?rev=112042&r1=112041&r2=112042&view=diff ============================================================================== --- llvm/trunk/configure (original) +++ llvm/trunk/configure Wed Aug 25 03:45:06 2010 @@ -17111,176 +17111,6 @@ -for ac_header in mach-o/getsect.h -do -as_ac_Header=`echo "ac_cv_header_$ac_header" | $as_tr_sh` -if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then - { echo "$as_me:$LINENO: checking for $ac_header" >&5 -echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6; } -if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then - echo $ECHO_N "(cached) $ECHO_C" >&6 -fi -ac_res=`eval echo '${'$as_ac_Header'}'` - { echo "$as_me:$LINENO: result: $ac_res" >&5 -echo "${ECHO_T}$ac_res" >&6; } -else - # Is the header compilable? -{ echo "$as_me:$LINENO: checking $ac_header usability" >&5 -echo $ECHO_N "checking $ac_header usability... $ECHO_C" >&6; } -cat >conftest.$ac_ext <<_ACEOF -/* confdefs.h. */ -_ACEOF -cat confdefs.h >>conftest.$ac_ext -cat >>conftest.$ac_ext <<_ACEOF -/* end confdefs.h. */ -$ac_includes_default -#include <$ac_header> -_ACEOF -rm -f conftest.$ac_objext -if { (ac_try="$ac_compile" -case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_compile") 2>conftest.er1 - ac_status=$? - grep -v '^ *+' conftest.er1 >conftest.err - rm -f conftest.er1 - cat conftest.err >&5 - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest.$ac_objext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then - ac_header_compiler=yes -else - echo "$as_me: failed program was:" >&5 -sed 's/^/| /' conftest.$ac_ext >&5 - - ac_header_compiler=no -fi - -rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -{ echo "$as_me:$LINENO: result: $ac_header_compiler" >&5 -echo "${ECHO_T}$ac_header_compiler" >&6; } - -# Is the header present? -{ echo "$as_me:$LINENO: checking $ac_header presence" >&5 -echo $ECHO_N "checking $ac_header presence... $ECHO_C" >&6; } -cat >conftest.$ac_ext <<_ACEOF -/* confdefs.h. */ -_ACEOF -cat confdefs.h >>conftest.$ac_ext -cat >>conftest.$ac_ext <<_ACEOF -/* end confdefs.h. */ -#include <$ac_header> -_ACEOF -if { (ac_try="$ac_cpp conftest.$ac_ext" -case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1 - ac_status=$? - grep -v '^ *+' conftest.er1 >conftest.err - rm -f conftest.er1 - cat conftest.err >&5 - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } >/dev/null; then - if test -s conftest.err; then - ac_cpp_err=$ac_c_preproc_warn_flag - ac_cpp_err=$ac_cpp_err$ac_c_werror_flag - else - ac_cpp_err= - fi -else - ac_cpp_err=yes -fi -if test -z "$ac_cpp_err"; then - ac_header_preproc=yes -else - echo "$as_me: failed program was:" >&5 -sed 's/^/| /' conftest.$ac_ext >&5 - - ac_header_preproc=no -fi - -rm -f conftest.err conftest.$ac_ext -{ echo "$as_me:$LINENO: result: $ac_header_preproc" >&5 -echo "${ECHO_T}$ac_header_preproc" >&6; } - -# So? What about this header? -case $ac_header_compiler:$ac_header_preproc:$ac_c_preproc_warn_flag in - yes:no: ) - { echo "$as_me:$LINENO: WARNING: $ac_header: accepted by the compiler, rejected by the preprocessor!" >&5 -echo "$as_me: WARNING: $ac_header: accepted by the compiler, rejected by the preprocessor!" >&2;} - { echo "$as_me:$LINENO: WARNING: $ac_header: proceeding with the compiler's result" >&5 -echo "$as_me: WARNING: $ac_header: proceeding with the compiler's result" >&2;} - ac_header_preproc=yes - ;; - no:yes:* ) - { echo "$as_me:$LINENO: WARNING: $ac_header: present but cannot be compiled" >&5 -echo "$as_me: WARNING: $ac_header: present but cannot be compiled" >&2;} - { echo "$as_me:$LINENO: WARNING: $ac_header: check for missing prerequisite headers?" >&5 -echo "$as_me: WARNING: $ac_header: check for missing prerequisite headers?" >&2;} - { echo "$as_me:$LINENO: WARNING: $ac_header: see the Autoconf documentation" >&5 -echo "$as_me: WARNING: $ac_header: see the Autoconf documentation" >&2;} - { echo "$as_me:$LINENO: WARNING: $ac_header: section \"Present But Cannot Be Compiled\"" >&5 -echo "$as_me: WARNING: $ac_header: section \"Present But Cannot Be Compiled\"" >&2;} - { echo "$as_me:$LINENO: WARNING: $ac_header: proceeding with the preprocessor's result" >&5 -echo "$as_me: WARNING: $ac_header: proceeding with the preprocessor's result" >&2;} - { echo "$as_me:$LINENO: WARNING: $ac_header: in the future, the compiler will take precedence" >&5 -echo "$as_me: WARNING: $ac_header: in the future, the compiler will take precedence" >&2;} - ( cat <<\_ASBOX -## ----------------------------------- ## -## Report this to llvmbugs at cs.uiuc.edu ## -## ----------------------------------- ## -_ASBOX - ) | sed "s/^/$as_me: WARNING: /" >&2 - ;; -esac -{ echo "$as_me:$LINENO: checking for $ac_header" >&5 -echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6; } -if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then - echo $ECHO_N "(cached) $ECHO_C" >&6 -else - eval "$as_ac_Header=\$ac_header_preproc" -fi -ac_res=`eval echo '${'$as_ac_Header'}'` - { echo "$as_me:$LINENO: result: $ac_res" >&5 -echo "${ECHO_T}$ac_res" >&6; } - -fi -if test `eval echo '${'$as_ac_Header'}'` = yes; then - cat >>confdefs.h <<_ACEOF -#define `echo "HAVE_$ac_header" | $as_tr_cpp` 1 -_ACEOF - -fi - -done - - - { echo "$as_me:$LINENO: checking for HUGE_VAL sanity" >&5 @@ -20239,79 +20069,6 @@ rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext -{ echo "$as_me:$LINENO: checking for getsect()" >&5 -echo $ECHO_N "checking for getsect()... $ECHO_C" >&6; } -cat >conftest.$ac_ext <<_ACEOF -/* confdefs.h. */ -_ACEOF -cat confdefs.h >>conftest.$ac_ext -cat >>conftest.$ac_ext <<_ACEOF -/* end confdefs.h. */ -#include - int main() { - unsigned long p; - return (int)getsect("__DATA","__pass_info", &p); - } - -_ACEOF -rm -f conftest.$ac_objext -if { (ac_try="$ac_compile" -case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_compile") 2>conftest.er1 - ac_status=$? - grep -v '^ *+' conftest.er1 >conftest.err - rm -f conftest.er1 - cat conftest.err >&5 - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); } && - { ac_try='test -z "$ac_c_werror_flag" || test ! -s conftest.err' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; } && - { ac_try='test -s conftest.$ac_objext' - { (case "(($ac_try" in - *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; - *) ac_try_echo=$ac_try;; -esac -eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 - (eval "$ac_try") 2>&5 - ac_status=$? - echo "$as_me:$LINENO: \$? = $ac_status" >&5 - (exit $ac_status); }; }; then - { echo "$as_me:$LINENO: result: yes" >&5 -echo "${ECHO_T}yes" >&6; } - -cat >>confdefs.h <<\_ACEOF -#define HAVE_GETSECT 1 -_ACEOF - -else - echo "$as_me: failed program was:" >&5 -sed 's/^/| /' conftest.$ac_ext >&5 - - { echo "$as_me:$LINENO: result: no" >&5 -echo "${ECHO_T}no" >&6; } - -cat >>confdefs.h <<\_ACEOF -#define HAVE_GETSECT 1 -_ACEOF - - -fi - -rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext - - if test "$llvm_cv_os_type" = "Linux" -a "$llvm_cv_target_arch" = "x86_64" ; then { echo "$as_me:$LINENO: checking for 32-bit userspace on 64-bit system" >&5 Modified: llvm/trunk/include/llvm/Config/config.h.in URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Config/config.h.in?rev=112042&r1=112041&r2=112042&view=diff ============================================================================== --- llvm/trunk/include/llvm/Config/config.h.in (original) +++ llvm/trunk/include/llvm/Config/config.h.in Wed Aug 25 03:45:06 2010 @@ -148,9 +148,6 @@ /* Define to 1 if you have the `getrusage' function. */ #undef HAVE_GETRUSAGE -/* Have Darwin getsect() support */ -#undef HAVE_GETSECT - /* Define to 1 if you have the `gettimeofday' function. */ #undef HAVE_GETTIMEOFDAY @@ -224,9 +221,6 @@ /* Define to 1 if you have the header file. */ #undef HAVE_MACH_O_DYLD_H -/* Define to 1 if you have the header file. */ -#undef HAVE_MACH_O_GETSECT_H - /* Define if mallinfo() is available on this platform. */ #undef HAVE_MALLINFO From daniel at zuster.org Wed Aug 25 11:58:05 2010 From: daniel at zuster.org (Daniel Dunbar) Date: Wed, 25 Aug 2010 16:58:05 -0000 Subject: [llvm-commits] [llvm] r112053 - in /llvm/trunk: lib/Target/ARM/ARMISelLowering.cpp test/CodeGen/Thumb2/thumb2-cmp.ll Message-ID: <20100825165805.4F8252A6C12C@llvm.org> Author: ddunbar Date: Wed Aug 25 11:58:05 2010 New Revision: 112053 URL: http://llvm.org/viewvc/llvm-project?rev=112053&view=rev Log: ARM/Thumb2: Fix a misselect in getARMCmp, when attempting to adjust a signed comparison that would overflow. - The other under/overflow cases can't actually happen because the immediates which would trigger them are legal (so we don't enter this code), but adjusted the style to make it clear the transform is always valid. Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp llvm/trunk/test/CodeGen/Thumb2/thumb2-cmp.ll Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=112053&r1=112052&r2=112053&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Wed Aug 25 11:58:05 2010 @@ -2271,28 +2271,28 @@ default: break; case ISD::SETLT: case ISD::SETGE: - if (isLegalICmpImmediate(C-1)) { + if (C != 0x80000000 && isLegalICmpImmediate(C-1)) { CC = (CC == ISD::SETLT) ? ISD::SETLE : ISD::SETGT; RHS = DAG.getConstant(C-1, MVT::i32); } break; case ISD::SETULT: case ISD::SETUGE: - if (C > 0 && isLegalICmpImmediate(C-1)) { + if (C != 0 && isLegalICmpImmediate(C-1)) { CC = (CC == ISD::SETULT) ? ISD::SETULE : ISD::SETUGT; RHS = DAG.getConstant(C-1, MVT::i32); } break; case ISD::SETLE: case ISD::SETGT: - if (isLegalICmpImmediate(C+1)) { + if (C != 0x7fffffff && isLegalICmpImmediate(C+1)) { CC = (CC == ISD::SETLE) ? ISD::SETLT : ISD::SETGE; RHS = DAG.getConstant(C+1, MVT::i32); } break; case ISD::SETULE: case ISD::SETUGT: - if (C < 0xffffffff && isLegalICmpImmediate(C+1)) { + if (C != 0xffffffff && isLegalICmpImmediate(C+1)) { CC = (CC == ISD::SETULE) ? ISD::SETULT : ISD::SETUGE; RHS = DAG.getConstant(C+1, MVT::i32); } Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-cmp.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-cmp.ll?rev=112053&r1=112052&r2=112053&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-cmp.ll (original) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-cmp.ll Wed Aug 25 11:58:05 2010 @@ -39,3 +39,17 @@ %tmp = icmp eq i32 %a, 1114112 ret i1 %tmp } + +; Check that we don't do an invalid (a > b) --> !(a < b + 1) transform. +; +; CHECK: f6: +; CHECK-NOT: cmp.w r0, #-2147483648 +; CHECK: bx lr +define i32 @f6(i32 %a) { + %tmp = icmp sgt i32 %a, 2147483647 + br i1 %tmp, label %true, label %false +true: + ret i32 2 +false: + ret i32 0 +} From gohman at apple.com Wed Aug 25 12:09:03 2010 From: gohman at apple.com (Dan Gohman) Date: Wed, 25 Aug 2010 17:09:03 -0000 Subject: [llvm-commits] [llvm] r112055 - /llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp Message-ID: <20100825170903.4306B2A6C12C@llvm.org> Author: djg Date: Wed Aug 25 12:09:03 2010 New Revision: 112055 URL: http://llvm.org/viewvc/llvm-project?rev=112055&view=rev Log: Eliminate an unnecessary cast. Modified: llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp Modified: llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp?rev=112055&r1=112054&r2=112055&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp (original) +++ llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp Wed Aug 25 12:09:03 2010 @@ -387,7 +387,7 @@ // blockaddress. if (isa(Op)) continue; - EnumerateOperandType(cast(Op)); + EnumerateOperandType(Op); } if (const MDNode *N = dyn_cast(V)) { From gohman at apple.com Wed Aug 25 12:09:50 2010 From: gohman at apple.com (Dan Gohman) Date: Wed, 25 Aug 2010 17:09:50 -0000 Subject: [llvm-commits] [llvm] r112056 - /llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp Message-ID: <20100825170950.618A12A6C12C@llvm.org> Author: djg Date: Wed Aug 25 12:09:50 2010 New Revision: 112056 URL: http://llvm.org/viewvc/llvm-project?rev=112056&view=rev Log: Fix whitespace. Modified: llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp Modified: llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp?rev=112056&r1=112055&r2=112056&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp (original) +++ llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp Wed Aug 25 12:09:50 2010 @@ -137,7 +137,7 @@ unsigned ValueEnumerator::getInstructionID(const Instruction *Inst) const { InstructionMapType::const_iterator I = InstructionMap.find(Inst); assert (I != InstructionMap.end() && "Instruction is not mapped!"); - return I->second; + return I->second; } void ValueEnumerator::setInstructionID(const Instruction *I) { From gohman at apple.com Wed Aug 25 12:11:16 2010 From: gohman at apple.com (Dan Gohman) Date: Wed, 25 Aug 2010 17:11:16 -0000 Subject: [llvm-commits] [llvm] r112058 - /llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp Message-ID: <20100825171116.44C282A6C12C@llvm.org> Author: djg Date: Wed Aug 25 12:11:16 2010 New Revision: 112058 URL: http://llvm.org/viewvc/llvm-project?rev=112058&view=rev Log: Clear FunctionLocalMDs in purgeFunction along with the rest of the function-specific state. Modified: llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp Modified: llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp?rev=112058&r1=112057&r2=112058&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp (original) +++ llvm/trunk/lib/Bitcode/Writer/ValueEnumerator.cpp Wed Aug 25 12:11:16 2010 @@ -445,7 +445,6 @@ FirstInstID = Values.size(); - FunctionLocalMDs.clear(); SmallVector FnLocalMDVector; // Add all of the instructions. for (Function::const_iterator BB = F.begin(), E = F.end(); BB != E; ++BB) { @@ -488,6 +487,7 @@ Values.resize(NumModuleValues); MDValues.resize(NumModuleMDValues); BasicBlocks.clear(); + FunctionLocalMDs.clear(); } static void IncorporateFunctionInfoGlobalBBIDs(const Function *F, From benny.kra at googlemail.com Wed Aug 25 12:27:59 2010 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Wed, 25 Aug 2010 17:27:59 -0000 Subject: [llvm-commits] [llvm] r112060 - /llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Message-ID: <20100825172759.234132A6C12C@llvm.org> Author: d0k Date: Wed Aug 25 12:27:58 2010 New Revision: 112060 URL: http://llvm.org/viewvc/llvm-project?rev=112060&view=rev Log: Remove dead recursive function. Yay for clang -Wunused-function. Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=112060&r1=112059&r2=112060&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Wed Aug 25 12:27:58 2010 @@ -1312,13 +1312,6 @@ return CurDAG->getRegister(GlobalBaseReg, TLI.getPointerTy()).getNode(); } -static SDNode *FindCallStartFromCall(SDNode *Node) { - if (Node->getOpcode() == ISD::CALLSEQ_START) return Node; - assert(Node->getOperand(0).getValueType() == MVT::Other && - "Node doesn't have a token chain argument!"); - return FindCallStartFromCall(Node->getOperand(0).getNode()); -} - SDNode *X86DAGToDAGISel::SelectAtomic64(SDNode *Node, unsigned Opc) { SDValue Chain = Node->getOperand(0); SDValue In1 = Node->getOperand(1); From gohman at apple.com Wed Aug 25 13:22:12 2010 From: gohman at apple.com (Dan Gohman) Date: Wed, 25 Aug 2010 18:22:12 -0000 Subject: [llvm-commits] [llvm] r112068 - /llvm/trunk/tools/lto/lto.exports Message-ID: <20100825182212.4B7202A6C12C@llvm.org> Author: djg Date: Wed Aug 25 13:22:12 2010 New Revision: 112068 URL: http://llvm.org/viewvc/llvm-project?rev=112068&view=rev Log: Fix a few missing entries in lto.exports. Modified: llvm/trunk/tools/lto/lto.exports Modified: llvm/trunk/tools/lto/lto.exports URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto/lto.exports?rev=112068&r1=112067&r2=112068&view=diff ============================================================================== --- llvm/trunk/tools/lto/lto.exports (original) +++ llvm/trunk/tools/lto/lto.exports Wed Aug 25 13:22:12 2010 @@ -21,4 +21,7 @@ lto_codegen_set_pic_model lto_codegen_write_merged_modules lto_codegen_debug_options +lto_codegen_set_assembler_args lto_codegen_set_assembler_path +lto_codegen_set_cpu +lto_codegen_set_gcc_path From gohman at apple.com Wed Aug 25 13:37:04 2010 From: gohman at apple.com (Dan Gohman) Date: Wed, 25 Aug 2010 18:37:04 -0000 Subject: [llvm-commits] [llvm] r112069 - in /llvm/trunk: include/llvm-c/lto.h tools/lto/lto.exports Message-ID: <20100825183704.D5B382A6C12C@llvm.org> Author: djg Date: Wed Aug 25 13:37:04 2010 New Revision: 112069 URL: http://llvm.org/viewvc/llvm-project?rev=112069&view=rev Log: lto_codegen_set_gcc_path was removed. Modified: llvm/trunk/include/llvm-c/lto.h llvm/trunk/tools/lto/lto.exports Modified: llvm/trunk/include/llvm-c/lto.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm-c/lto.h?rev=112069&r1=112068&r2=112069&view=diff ============================================================================== --- llvm/trunk/include/llvm-c/lto.h (original) +++ llvm/trunk/include/llvm-c/lto.h Wed Aug 25 13:37:04 2010 @@ -213,14 +213,6 @@ /** - * Sets the location of the "gcc" to run. If not set, libLTO will search for - * "gcc" on the path. - */ -extern void -lto_codegen_set_gcc_path(lto_code_gen_t cg, const char* path); - - -/** * Sets the location of the assembler tool to run. If not set, libLTO * will use gcc to invoke the assembler. */ Modified: llvm/trunk/tools/lto/lto.exports URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto/lto.exports?rev=112069&r1=112068&r2=112069&view=diff ============================================================================== --- llvm/trunk/tools/lto/lto.exports (original) +++ llvm/trunk/tools/lto/lto.exports Wed Aug 25 13:37:04 2010 @@ -24,4 +24,3 @@ lto_codegen_set_assembler_args lto_codegen_set_assembler_path lto_codegen_set_cpu -lto_codegen_set_gcc_path From dpatel at apple.com Wed Aug 25 13:52:02 2010 From: dpatel at apple.com (Devang Patel) Date: Wed, 25 Aug 2010 18:52:02 -0000 Subject: [llvm-commits] [llvm] r112072 - in /llvm/trunk: lib/Transforms/IPO/StripSymbols.cpp test/Transforms/StripSymbols/2010-08-25-crash.ll Message-ID: <20100825185202.C454B2A6C12C@llvm.org> Author: dpatel Date: Wed Aug 25 13:52:02 2010 New Revision: 112072 URL: http://llvm.org/viewvc/llvm-project?rev=112072&view=rev Log: DIGlobalVariable can be used to encode debug info for globals that are directly folded into a constant by FE. Added: llvm/trunk/test/Transforms/StripSymbols/2010-08-25-crash.ll Modified: llvm/trunk/lib/Transforms/IPO/StripSymbols.cpp Modified: llvm/trunk/lib/Transforms/IPO/StripSymbols.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/StripSymbols.cpp?rev=112072&r1=112071&r2=112072&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/StripSymbols.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/StripSymbols.cpp Wed Aug 25 13:52:02 2010 @@ -350,8 +350,8 @@ for (SmallVector::iterator I = MDs.begin(), E = MDs.end(); I != E; ++I) { - if (M.getGlobalVariable(DIGlobalVariable(*I).getGlobal()->getName(), - true)) { + GlobalVariable *GV = DIGlobalVariable(*I).getGlobal(); + if (GV && M.getGlobalVariable(GV->getName(), true)) { if (!NMD) NMD = M.getOrInsertNamedMetadata("llvm.dbg.gv"); NMD->addOperand(*I); Added: llvm/trunk/test/Transforms/StripSymbols/2010-08-25-crash.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/StripSymbols/2010-08-25-crash.ll?rev=112072&view=auto ============================================================================== --- llvm/trunk/test/Transforms/StripSymbols/2010-08-25-crash.ll (added) +++ llvm/trunk/test/Transforms/StripSymbols/2010-08-25-crash.ll Wed Aug 25 13:52:02 2010 @@ -0,0 +1,19 @@ +; RUN: opt -strip-dead-debug-info -disable-output %s +define i32 @foo() nounwind ssp { +entry: + ret i32 0, !dbg !8 +} + +!llvm.dbg.sp = !{!0} +!llvm.dbg.gv = !{!6} + +!0 = metadata !{i32 524334, i32 0, metadata !1, metadata !"foo", metadata !"foo", metadata !"foo", metadata !1, i32 3, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, i32 ()* @foo} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 524329, metadata !"/tmp/a.c", metadata !"/Volumes/Lalgate/clean/D.CW", metadata !2} ; [ DW_TAG_file_type ] +!2 = metadata !{i32 524305, i32 0, i32 12, metadata !"/tmp/a.c", metadata !"/Volumes/Lalgate/clean/D.CW", metadata !"clang version 2.8 (trunk 112062)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 524309, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{metadata !5} +!5 = metadata !{i32 524324, metadata !1, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 524340, i32 0, metadata !1, metadata !"i", metadata !"i", metadata !"i", metadata !1, i32 2, metadata !7, i1 true, i1 true, i32 0} ; [ DW_TAG_variable ] +!7 = metadata !{i32 524326, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !5} ; [ DW_TAG_const_type ] +!8 = metadata !{i32 3, i32 13, metadata !9, null} +!9 = metadata !{i32 524299, metadata !0, i32 3, i32 11, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] From sabre at nondot.org Wed Aug 25 14:00:00 2010 From: sabre at nondot.org (Chris Lattner) Date: Wed, 25 Aug 2010 19:00:00 -0000 Subject: [llvm-commits] [llvm] r112073 - /llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp Message-ID: <20100825190000.DF4922A6C12C@llvm.org> Author: lattner Date: Wed Aug 25 14:00:00 2010 New Revision: 112073 URL: http://llvm.org/viewvc/llvm-project?rev=112073&view=rev Log: zap dead code Modified: llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp Modified: llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp?rev=112073&r1=112072&r2=112073&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPUISelDAGToDAG.cpp Wed Aug 25 14:00:00 2010 @@ -67,14 +67,6 @@ return isInt<10>(CN->getSExtValue()); } - //! SDNode predicate for i16 sign-extended, 10-bit immediate values - bool - isI16IntS10Immediate(SDNode *N) - { - ConstantSDNode *CN = dyn_cast(N); - return (CN != 0 && isI16IntS10Immediate(CN)); - } - //! ConstantSDNode predicate for i16 unsigned 10-bit immediate values bool isI16IntU10Immediate(ConstantSDNode *CN) @@ -82,14 +74,6 @@ return isUInt<10>((short) CN->getZExtValue()); } - //! SDNode predicate for i16 sign-extended, 10-bit immediate values - bool - isI16IntU10Immediate(SDNode *N) - { - return (N->getOpcode() == ISD::Constant - && isI16IntU10Immediate(cast(N))); - } - //! ConstantSDNode predicate for signed 16-bit values /*! \arg CN The constant SelectionDAG node holding the value @@ -119,14 +103,6 @@ return false; } - //! SDNode predicate for signed 16-bit values. - bool - isIntS16Immediate(SDNode *N, short &Imm) - { - return (N->getOpcode() == ISD::Constant - && isIntS16Immediate(cast(N), Imm)); - } - //! ConstantFPSDNode predicate for representing floats as 16-bit sign ext. static bool isFPS16Immediate(ConstantFPSDNode *FPN, short &Imm) @@ -142,16 +118,6 @@ return false; } - bool - isHighLow(const SDValue &Op) - { - return (Op.getOpcode() == SPUISD::IndirectAddr - && ((Op.getOperand(0).getOpcode() == SPUISD::Hi - && Op.getOperand(1).getOpcode() == SPUISD::Lo) - || (Op.getOperand(0).getOpcode() == SPUISD::Lo - && Op.getOperand(1).getOpcode() == SPUISD::Hi))); - } - //===------------------------------------------------------------------===// //! EVT to "useful stuff" mapping structure: From grosbach at apple.com Wed Aug 25 14:11:34 2010 From: grosbach at apple.com (Jim Grosbach) Date: Wed, 25 Aug 2010 19:11:34 -0000 Subject: [llvm-commits] [llvm] r112075 - /llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Message-ID: <20100825191134.ABEB82A6C12C@llvm.org> Author: grosbach Date: Wed Aug 25 14:11:34 2010 New Revision: 112075 URL: http://llvm.org/viewvc/llvm-project?rev=112075&view=rev Log: Don't override the var from the enclosing scope. When doing copy/paste/modify, it's apparently rather important to remember the 'modify' bit... Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp?rev=112075&r1=112074&r2=112075&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Wed Aug 25 14:11:34 2010 @@ -1397,7 +1397,7 @@ case ARMII::AddrMode5: { // VFP address mode. const MachineOperand &OffOp = MI->getOperand(Idx+1); - int InstrOffs = ARM_AM::getAM5Offset(OffOp.getImm()); + InstrOffs = ARM_AM::getAM5Offset(OffOp.getImm()); if (ARM_AM::getAM5Op(OffOp.getImm()) == ARM_AM::sub) InstrOffs = -InstrOffs; Scale = 4; @@ -1593,7 +1593,7 @@ case ARMII::AddrMode5: { // VFP address mode. const MachineOperand &OffOp = MI->getOperand(i+1); - int InstrOffs = ARM_AM::getAM5Offset(OffOp.getImm()); + InstrOffs = ARM_AM::getAM5Offset(OffOp.getImm()); if (ARM_AM::getAM5Op(OffOp.getImm()) == ARM_AM::sub) InstrOffs = -InstrOffs; NumBits = 8; From bigcheesegs at gmail.com Wed Aug 25 14:27:27 2010 From: bigcheesegs at gmail.com (Michael J. Spencer) Date: Wed, 25 Aug 2010 19:27:27 -0000 Subject: [llvm-commits] [llvm] r112076 - /llvm/trunk/lib/MC/WinCOFFStreamer.cpp Message-ID: <20100825192727.50F592A6C12C@llvm.org> Author: mspencer Date: Wed Aug 25 14:27:27 2010 New Revision: 112076 URL: http://llvm.org/viewvc/llvm-project?rev=112076&view=rev Log: MC: Fix inconsistant naming in COFF object writer. Patch by Cameron Esfahani. Modified: llvm/trunk/lib/MC/WinCOFFStreamer.cpp Modified: llvm/trunk/lib/MC/WinCOFFStreamer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/WinCOFFStreamer.cpp?rev=112076&r1=112075&r2=112076&view=diff ============================================================================== --- llvm/trunk/lib/MC/WinCOFFStreamer.cpp (original) +++ llvm/trunk/lib/MC/WinCOFFStreamer.cpp Wed Aug 25 14:27:27 2010 @@ -141,10 +141,11 @@ // fragment. Instead, we should mark the symbol as pointing into the data // fragment if it exists, otherwise we should just queue the label and set its // fragment pointer when we emit the next fragment. - MCDataFragment *F = getOrCreateDataFragment(); + MCDataFragment *DF = getOrCreateDataFragment(); + assert(!SD.getFragment() && "Unexpected fragment on symbol data!"); - SD.setFragment(F); - SD.setOffset(F->getContents().size()); + SD.setFragment(DF); + SD.setOffset(DF->getContents().size()); } void WinCOFFStreamer::EmitAssemblerFlag(MCAssemblerFlag Flag) { From echristo at apple.com Wed Aug 25 14:28:39 2010 From: echristo at apple.com (Eric Christopher) Date: Wed, 25 Aug 2010 19:28:39 -0000 Subject: [llvm-commits] [llvm] r112077 - /llvm/trunk/include/llvm/Analysis/LazyValueInfo.h Message-ID: <20100825192839.993362A6C12C@llvm.org> Author: echristo Date: Wed Aug 25 14:28:39 2010 New Revision: 112077 URL: http://llvm.org/viewvc/llvm-project?rev=112077&view=rev Log: Fix header define to reflect the name of the file. Patch by Adam Treat! Modified: llvm/trunk/include/llvm/Analysis/LazyValueInfo.h Modified: llvm/trunk/include/llvm/Analysis/LazyValueInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/LazyValueInfo.h?rev=112077&r1=112076&r2=112077&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/LazyValueInfo.h (original) +++ llvm/trunk/include/llvm/Analysis/LazyValueInfo.h Wed Aug 25 14:28:39 2010 @@ -12,8 +12,8 @@ // //===----------------------------------------------------------------------===// -#ifndef LLVM_ANALYSIS_LIVEVALUES_H -#define LLVM_ANALYSIS_LIVEVALUES_H +#ifndef LLVM_ANALYSIS_LAZYVALUEINFO_H +#define LLVM_ANALYSIS_LAZYVALUEINFO_H #include "llvm/Pass.h" From benny.kra at googlemail.com Wed Aug 25 15:09:43 2010 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Wed, 25 Aug 2010 20:09:43 -0000 Subject: [llvm-commits] [llvm] r112079 - /llvm/trunk/lib/MC/ELFObjectWriter.cpp Message-ID: <20100825200943.3935C2A6C12C@llvm.org> Author: d0k Date: Wed Aug 25 15:09:43 2010 New Revision: 112079 URL: http://llvm.org/viewvc/llvm-project?rev=112079&view=rev Log: MCELF: Use precomputed symbol indices, patch by Roman Divacky. Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=112079&r1=112078&r2=112079&view=diff ============================================================================== --- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original) +++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Wed Aug 25 15:09:43 2010 @@ -567,18 +567,14 @@ uint64_t ELFObjectWriterImpl::getSymbolIndexInSymbolTable(const MCAssembler &Asm, const MCSymbol *S) { - for (unsigned i = 0, e = LocalSymbolData.size(); i != e; ++i) - if (&LocalSymbolData[i].SymbolData->getSymbol() == S) - return i + /* empty symbol */ 1; - for (unsigned i = 0, e = ExternalSymbolData.size(); i != e; ++i) - if (&ExternalSymbolData[i].SymbolData->getSymbol() == S) - return i + LocalSymbolData.size() + Asm.size() + /* empty symbol */ 1; - for (unsigned i = 0, e = UndefinedSymbolData.size(); i != e; ++i) - if (&UndefinedSymbolData[i].SymbolData->getSymbol() == S) - return i + LocalSymbolData.size() + ExternalSymbolData.size() + - Asm.size() + /* empty symbol */ 1; + MCSymbolData &SD = Asm.getSymbolData(*S); + + // Local symbol. + if (!SD.isExternal() && !S->isUndefined()) + return SD.getIndex() + /* empty symbol */ 1; - llvm_unreachable("Cannot find symbol which should exist!"); + // External or undefined symbol. + return SD.getIndex() + Asm.size() + /* empty symbol */ 1; } void ELFObjectWriterImpl::ComputeSymbolTable(MCAssembler &Asm) { From gohman at apple.com Wed Aug 25 15:17:19 2010 From: gohman at apple.com (Dan Gohman) Date: Wed, 25 Aug 2010 20:17:19 -0000 Subject: [llvm-commits] [llvm] r112080 - /llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Message-ID: <20100825201719.2E0672A6C12C@llvm.org> Author: djg Date: Wed Aug 25 15:17:19 2010 New Revision: 112080 URL: http://llvm.org/viewvc/llvm-project?rev=112080&view=rev Log: Add a comment. Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp?rev=112080&r1=112079&r2=112080&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp (original) +++ llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Wed Aug 25 15:17:19 2010 @@ -1986,6 +1986,7 @@ } while(OpNum != Record.size()); const Type *ReturnType = F->getReturnType(); + // Handle multiple return values. FIXME: Remove in LLVM 3.0. if (Vs.size() > 1 || (ReturnType->isStructTy() && (Vs.empty() || Vs[0]->getType() != ReturnType))) { From gohman at apple.com Wed Aug 25 15:20:21 2010 From: gohman at apple.com (Dan Gohman) Date: Wed, 25 Aug 2010 20:20:21 -0000 Subject: [llvm-commits] [llvm] r112081 - /llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Message-ID: <20100825202021.EADC92A6C12D@llvm.org> Author: djg Date: Wed Aug 25 15:20:21 2010 New Revision: 112081 URL: http://llvm.org/viewvc/llvm-project?rev=112081&view=rev Log: Fix a bug found by inspection. Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp?rev=112081&r1=112080&r2=112081&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp (original) +++ llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Wed Aug 25 15:20:21 2010 @@ -2323,7 +2323,7 @@ if (A->getParent() == 0) { // We found at least one unresolved value. Nuke them all to avoid leaks. for (unsigned i = ModuleValueListSize, e = ValueList.size(); i != e; ++i){ - if ((A = dyn_cast(ValueList.back())) && A->getParent() == 0) { + if ((A = dyn_cast(ValueList[i])) && A->getParent() == 0) { A->replaceAllUsesWith(UndefValue::get(A->getType())); delete A; } From gohman at apple.com Wed Aug 25 15:22:53 2010 From: gohman at apple.com (Dan Gohman) Date: Wed, 25 Aug 2010 20:22:53 -0000 Subject: [llvm-commits] [llvm] r112082 - /llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Message-ID: <20100825202253.3A0D62A6C12D@llvm.org> Author: djg Date: Wed Aug 25 15:22:53 2010 New Revision: 112082 URL: http://llvm.org/viewvc/llvm-project?rev=112082&view=rev Log: Fix the bitcode reader to clear out function-specific state from MDValueList between each function, now that the bitcode writer is reusing the index space for function-local metadata. Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp?rev=112082&r1=112081&r2=112082&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp (original) +++ llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Wed Aug 25 15:22:53 2010 @@ -1636,6 +1636,7 @@ InstructionList.clear(); unsigned ModuleValueListSize = ValueList.size(); + unsigned ModuleMDValueListSize = MDValueList.size(); // Add all the function arguments to the value table. for(Function::arg_iterator I = F->arg_begin(), E = F->arg_end(); I != E; ++I) @@ -2353,6 +2354,7 @@ // Trim the value list down to the size it was before we parsed this function. ValueList.shrinkTo(ModuleValueListSize); + MDValueList.shrinkTo(ModuleMDValueListSize); std::vector().swap(FunctionBBs); return false; From gohman at apple.com Wed Aug 25 15:23:38 2010 From: gohman at apple.com (Dan Gohman) Date: Wed, 25 Aug 2010 20:23:38 -0000 Subject: [llvm-commits] [llvm] r112083 - /llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Message-ID: <20100825202338.2D87F2A6C12D@llvm.org> Author: djg Date: Wed Aug 25 15:23:38 2010 New Revision: 112083 URL: http://llvm.org/viewvc/llvm-project?rev=112083&view=rev Log: Add a FIXME comment. Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp?rev=112083&r1=112082&r2=112083&view=diff ============================================================================== --- llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp (original) +++ llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Wed Aug 25 15:23:38 2010 @@ -2333,6 +2333,9 @@ } } + // FIXME: Check for unresolved forward-declared metadata references + // and clean up leaks. + // See if anything took the address of blocks in this function. If so, // resolve them now. DenseMap >::iterator BAFRI = From grosbach at apple.com Wed Aug 25 15:34:29 2010 From: grosbach at apple.com (Jim Grosbach) Date: Wed, 25 Aug 2010 20:34:29 -0000 Subject: [llvm-commits] [llvm] r112084 - /llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Message-ID: <20100825203429.16FC62A6C12D@llvm.org> Author: grosbach Date: Wed Aug 25 15:34:28 2010 New Revision: 112084 URL: http://llvm.org/viewvc/llvm-project?rev=112084&view=rev Log: Add some statistics for PEI register scavenging Modified: llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Modified: llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp?rev=112084&r1=112083&r2=112084&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp (original) +++ llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Wed Aug 25 15:34:28 2010 @@ -36,6 +36,7 @@ #include "llvm/Support/Debug.h" #include "llvm/ADT/IndexedMap.h" #include "llvm/ADT/SmallSet.h" +#include "llvm/ADT/Statistic.h" #include "llvm/ADT/STLExtras.h" #include @@ -46,6 +47,9 @@ INITIALIZE_PASS(PEI, "prologepilog", "Prologue/Epilogue Insertion", false, false); +STATISTIC(NumVirtualFrameRegs, "Number of virtual frame regs encountered"); +STATISTIC(NumScavengedRegs, "Number of frame index regs scavenged"); + /// createPrologEpilogCodeInserter - This function returns a pass that inserts /// prolog and epilog code, and eliminates abstract frame references. /// @@ -873,6 +877,8 @@ } continue; } + ++NumVirtualFrameRegs; + // If this is a def, remember that this insn defines the value. // This lets us properly consider insns which re-use the scratch // register, such as r2 = sub r2, #imm, in the middle of the @@ -945,6 +951,7 @@ const TargetRegisterClass *RC = Fn.getRegInfo().getRegClass(Reg); CurrentScratchReg = RS->scavengeRegister(RC, I, SPAdj); PrevValue = Value; + ++NumScavengedRegs; } // replace this reference to the virtual register with the // scratch register. From dpatel at apple.com Wed Aug 25 15:39:26 2010 From: dpatel at apple.com (Devang Patel) Date: Wed, 25 Aug 2010 20:39:26 -0000 Subject: [llvm-commits] [llvm] r112085 - in /llvm/trunk/lib/CodeGen/SelectionDAG: SelectionDAGBuilder.cpp SelectionDAGBuilder.h Message-ID: <20100825203926.37DD02A6C12D@llvm.org> Author: dpatel Date: Wed Aug 25 15:39:26 2010 New Revision: 112085 URL: http://llvm.org/viewvc/llvm-project?rev=112085&view=rev Log: Remove dead argument. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=112085&r1=112084&r2=112085&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Wed Aug 25 15:39:26 2010 @@ -853,7 +853,7 @@ uint64_t Offset = DI->getOffset(); SDDbgValue *SDV; if (Val.getNode()) { - if (!EmitFuncArgumentDbgValue(*DI, V, Variable, Offset, Val)) { + if (!EmitFuncArgumentDbgValue(V, Variable, Offset, Val)) { SDV = DAG.getDbgValue(Variable, Val.getNode(), Val.getResNo(), Offset, dl, DbgSDNodeOrder); DAG.AddDbgValue(SDV, Val.getNode(), false); @@ -3888,8 +3888,7 @@ /// argument, create the corresponding DBG_VALUE machine instruction for it now. /// At the end of instruction selection, they will be inserted to the entry BB. bool -SelectionDAGBuilder::EmitFuncArgumentDbgValue(const DbgValueInst &DI, - const Value *V, MDNode *Variable, +SelectionDAGBuilder::EmitFuncArgumentDbgValue(const Value *V, MDNode *Variable, uint64_t Offset, const SDValue &N) { if (!isa(V)) @@ -4106,7 +4105,7 @@ // Check unused arguments map. N = UnusedArgNodeMap[V]; if (N.getNode()) { - if (!EmitFuncArgumentDbgValue(DI, V, Variable, Offset, N)) { + if (!EmitFuncArgumentDbgValue(V, Variable, Offset, N)) { SDV = DAG.getDbgValue(Variable, N.getNode(), N.getResNo(), Offset, dl, SDNodeOrder); DAG.AddDbgValue(SDV, N.getNode(), false); Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h?rev=112085&r1=112084&r2=112085&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h Wed Aug 25 15:39:26 2010 @@ -532,8 +532,7 @@ /// function argument, create the corresponding DBG_VALUE machine instruction /// for it now. At the end of instruction selection, they will be inserted to /// the entry BB. - bool EmitFuncArgumentDbgValue(const DbgValueInst &DI, - const Value *V, MDNode *Variable, + bool EmitFuncArgumentDbgValue(const Value *V, MDNode *Variable, uint64_t Offset, const SDValue &N); }; From dpatel at apple.com Wed Aug 25 15:41:24 2010 From: dpatel at apple.com (Devang Patel) Date: Wed, 25 Aug 2010 20:41:24 -0000 Subject: [llvm-commits] [llvm] r112086 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h Message-ID: <20100825204124.CBFDC2A6C12D@llvm.org> Author: dpatel Date: Wed Aug 25 15:41:24 2010 New Revision: 112086 URL: http://llvm.org/viewvc/llvm-project?rev=112086&view=rev Log: Fix comment. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h?rev=112086&r1=112085&r2=112086&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h Wed Aug 25 15:41:24 2010 @@ -528,10 +528,9 @@ void HandlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB); - /// EmitFuncArgumentDbgValue - If the DbgValueInst is a dbg_value of a - /// function argument, create the corresponding DBG_VALUE machine instruction - /// for it now. At the end of instruction selection, they will be inserted to - /// the entry BB. + /// EmitFuncArgumentDbgValue - If V is an function argument then create + /// corresponding DBG_VALUE machine instruction for it now. At the end of + /// instruction selection, they will be inserted to the entry BB. bool EmitFuncArgumentDbgValue(const Value *V, MDNode *Variable, uint64_t Offset, const SDValue &N); }; From daniel at zuster.org Wed Aug 25 16:09:31 2010 From: daniel at zuster.org (Daniel Dunbar) Date: Wed, 25 Aug 2010 21:09:31 -0000 Subject: [llvm-commits] [test-suite] r112087 - /test-suite/trunk/MultiSource/Applications/OpenSSL/speed.c Message-ID: <20100825210931.ABC2D2A6C12C@llvm.org> Author: ddunbar Date: Wed Aug 25 16:09:31 2010 New Revision: 112087 URL: http://llvm.org/viewvc/llvm-project?rev=112087&view=rev Log: OpenSSL: Add some additional logging. Modified: test-suite/trunk/MultiSource/Applications/OpenSSL/speed.c Modified: test-suite/trunk/MultiSource/Applications/OpenSSL/speed.c URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/MultiSource/Applications/OpenSSL/speed.c?rev=112087&r1=112086&r2=112087&view=diff ============================================================================== --- test-suite/trunk/MultiSource/Applications/OpenSSL/speed.c (original) +++ test-suite/trunk/MultiSource/Applications/OpenSSL/speed.c Wed Aug 25 16:09:31 2010 @@ -432,11 +432,16 @@ result |= test_func(); double time = Time_F(STOP); fprintf(out, "%s: %.2f\n", string, time); + if (result) + fprintf(stderr, "error: %s failed!\n", string); return result; } int main(int argc, char **argv) { - assert(argc == 2); + if (argc != 2) { + fprintf(stderr, "usage: %s \n", argv[0]); + return 1; + } int ret = 0; FILE *f = fopen(argv[1], "w"); From daniel at zuster.org Wed Aug 25 16:10:02 2010 From: daniel at zuster.org (Daniel Dunbar) Date: Wed, 25 Aug 2010 21:10:02 -0000 Subject: [llvm-commits] [test-suite] r112088 - /test-suite/trunk/MultiSource/Applications/OpenSSL/speed.c Message-ID: <20100825211002.30EA92A6C12C@llvm.org> Author: ddunbar Date: Wed Aug 25 16:10:02 2010 New Revision: 112088 URL: http://llvm.org/viewvc/llvm-project?rev=112088&view=rev Log: OpenSSL: Honor SMALL_PROBLEM_SIZE. Modified: test-suite/trunk/MultiSource/Applications/OpenSSL/speed.c Modified: test-suite/trunk/MultiSource/Applications/OpenSSL/speed.c URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/MultiSource/Applications/OpenSSL/speed.c?rev=112088&r1=112087&r2=112088&view=diff ============================================================================== --- test-suite/trunk/MultiSource/Applications/OpenSSL/speed.c (original) +++ test-suite/trunk/MultiSource/Applications/OpenSSL/speed.c Wed Aug 25 16:10:02 2010 @@ -443,26 +443,31 @@ return 1; } +#ifdef SMALL_PROBLEM_SIZE + int small = 1; +#else + int small = 0; +#endif int ret = 0; FILE *f = fopen(argv[1], "w"); double time; - ret |= run_test(&bf_test, f, "Result-Blowfish", 750); - //ret |= run_test(&cast_test, f, "Result-CAST", 2); - ret |= run_test(&dsa_test, f, "Result-DSA", 50); - ret |= run_test(&ecdh_test, f, "Result-ECDH", 15); - ret |= run_test(&ec_test, f, "Result-EC", 2); - ret |= run_test(&hmac_test, f, "Result-HMAC", 70000); - ret |= run_test(&idea_test, f, "Result-IDEA", 300000); - ret |= run_test(&md4_test, f, "Result-MD4", 70000); - ret |= run_test(&md5_test, f, "Result-MD5", 70000); - ret |= run_test(&mdc2_test, f, "Result-MDC2", 300000); - ret |= run_test(&rc2_test, f, "Result-RC2", 700000); - ret |= run_test(&rc4_test, f, "Result-RC4", 200); - ret |= run_test(&rmd_test, f, "Result-RipeMD", 40000); - ret |= run_test(&rsa_test, f, "Result-RSA", 6); - ret |= run_test(&sha_test, f, "Result-SHA", 400); - ret |= run_test(&wp_test, f, "Result-WHRLPOOL", 100); + ret |= run_test(&bf_test, f, "Result-Blowfish", small ? 100 : 750); + //ret |= run_test(&cast_test, f, "Result-CAST", small ? 1 : 2); + ret |= run_test(&dsa_test, f, "Result-DSA", small ? 10 : 50); + ret |= run_test(&ecdh_test, f, "Result-ECDH", small ? 3 : 15); + ret |= run_test(&ec_test, f, "Result-EC", small ? 1 : 2); + ret |= run_test(&hmac_test, f, "Result-HMAC", small ? 10000 : 70000); + ret |= run_test(&idea_test, f, "Result-IDEA", small ? 6000 : 300000); + ret |= run_test(&md4_test, f, "Result-MD4", small ? 10000 : 70000); + ret |= run_test(&md5_test, f, "Result-MD5", small ? 10000 : 70000); + ret |= run_test(&mdc2_test, f, "Result-MDC2", small ? 6000 : 300000); + ret |= run_test(&rc2_test, f, "Result-RC2", small ? 100000 : 700000); + ret |= run_test(&rc4_test, f, "Result-RC4", small ? 40 : 200); + ret |= run_test(&rmd_test, f, "Result-RipeMD", small ? 8000 : 40000); + ret |= run_test(&rsa_test, f, "Result-RSA", small ? 1 : 6); + ret |= run_test(&sha_test, f, "Result-SHA", small ? 80 : 400); + ret |= run_test(&wp_test, f, "Result-WHRLPOOL", small ? 20 : 100); fclose(f); From daniel at zuster.org Wed Aug 25 16:11:03 2010 From: daniel at zuster.org (Daniel Dunbar) Date: Wed, 25 Aug 2010 21:11:03 -0000 Subject: [llvm-commits] [llvm] r112089 - in /llvm/trunk: lib/Target/X86/X86Instr64bit.td test/MC/AsmParser/X86/x86_64-new-encoder.s Message-ID: <20100825211103.24CFC2A6C12C@llvm.org> Author: ddunbar Date: Wed Aug 25 16:11:02 2010 New Revision: 112089 URL: http://llvm.org/viewvc/llvm-project?rev=112089&view=rev Log: X86: Fix misencode of RI64mi8. This fixes OpenSSL / x86_64-apple-darwin10 / clang -O3. Modified: llvm/trunk/lib/Target/X86/X86Instr64bit.td llvm/trunk/test/MC/AsmParser/X86/x86_64-new-encoder.s Modified: llvm/trunk/lib/Target/X86/X86Instr64bit.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Instr64bit.td?rev=112089&r1=112088&r2=112089&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86Instr64bit.td (original) +++ llvm/trunk/lib/Target/X86/X86Instr64bit.td Wed Aug 25 16:11:02 2010 @@ -1325,14 +1325,13 @@ [] >, TB; -def BT64ri8 : Ii8<0xBA, MRM4r, (outs), (ins GR64:$src1, i64i8imm:$src2), +def BT64ri8 : RIi8<0xBA, MRM4r, (outs), (ins GR64:$src1, i64i8imm:$src2), "bt{q}\t{$src2, $src1|$src1, $src2}", - [(set EFLAGS, (X86bt GR64:$src1, i64immSExt8:$src2))]>, TB, - REX_W; + [(set EFLAGS, (X86bt GR64:$src1, i64immSExt8:$src2))]>, TB; // Note that these instructions don't need FastBTMem because that // only applies when the other operand is in a register. When it's // an immediate, bt is still fast. -def BT64mi8 : Ii8<0xBA, MRM4m, (outs), (ins i64mem:$src1, i64i8imm:$src2), +def BT64mi8 : RIi8<0xBA, MRM4m, (outs), (ins i64mem:$src1, i64i8imm:$src2), "bt{q}\t{$src2, $src1|$src1, $src2}", [(set EFLAGS, (X86bt (loadi64 addr:$src1), i64immSExt8:$src2))]>, TB; Modified: llvm/trunk/test/MC/AsmParser/X86/x86_64-new-encoder.s URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AsmParser/X86/x86_64-new-encoder.s?rev=112089&r1=112088&r2=112089&view=diff ============================================================================== --- llvm/trunk/test/MC/AsmParser/X86/x86_64-new-encoder.s (original) +++ llvm/trunk/test/MC/AsmParser/X86/x86_64-new-encoder.s Wed Aug 25 16:11:02 2010 @@ -153,3 +153,7 @@ // CHECK: jmpq *8(%rax) // CHECK: encoding: [0xff,0x60,0x08] jmp *8(%rax) + +// CHECK: btq $61, -216(%rbp) +// CHECK: encoding: [0x48,0x0f,0xba,0xa5,0x28,0xff,0xff,0xff,0x3d] + btq $61, -216(%rbp) From bruno.cardoso at gmail.com Wed Aug 25 16:26:37 2010 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Wed, 25 Aug 2010 21:26:37 -0000 Subject: [llvm-commits] [llvm] r112090 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Message-ID: <20100825212637.718682A6C12C@llvm.org> Author: bruno Date: Wed Aug 25 16:26:37 2010 New Revision: 112090 URL: http://llvm.org/viewvc/llvm-project?rev=112090&view=rev Log: Revert this for now, PUNPCKLDQ dont operate on v4f32 Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=112090&r1=112089&r2=112090&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Aug 25 16:26:37 2010 @@ -4887,7 +4887,7 @@ return getTargetShuffleNode(X86ISD::MOVLHPS, dl, VT, V1, V1, DAG); if (OptForSize && HasSSE2 && X86::isUNPCKL_v_undef_Mask(SVOp) && - (VT == MVT::v4i32 || VT == MVT::v4f32)) + VT == MVT::v4i32) return getTargetShuffleNode(X86ISD::PUNPCKLDQ, dl, VT, V1, V1, DAG); unsigned TargetMask = X86::getShuffleSHUFImmediate(SVOp); From gohman at apple.com Wed Aug 25 16:36:50 2010 From: gohman at apple.com (Dan Gohman) Date: Wed, 25 Aug 2010 21:36:50 -0000 Subject: [llvm-commits] [llvm] r112091 - in /llvm/trunk: lib/Linker/LinkModules.cpp lib/Transforms/Utils/CloneModule.cpp lib/Transforms/Utils/ValueMapper.cpp test/Linker/metadata-a.ll test/Linker/metadata-b.ll Message-ID: <20100825213650.F08102A6C12C@llvm.org> Author: djg Date: Wed Aug 25 16:36:50 2010 New Revision: 112091 URL: http://llvm.org/viewvc/llvm-project?rev=112091&view=rev Log: Remap metadata attached to instructions when remapping individual instructions, not when remapping modules. Added: llvm/trunk/test/Linker/metadata-a.ll llvm/trunk/test/Linker/metadata-b.ll Modified: llvm/trunk/lib/Linker/LinkModules.cpp llvm/trunk/lib/Transforms/Utils/CloneModule.cpp llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp Modified: llvm/trunk/lib/Linker/LinkModules.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Linker/LinkModules.cpp?rev=112091&r1=112090&r2=112091&view=diff ============================================================================== --- llvm/trunk/lib/Linker/LinkModules.cpp (original) +++ llvm/trunk/lib/Linker/LinkModules.cpp Wed Aug 25 16:36:50 2010 @@ -1005,13 +1005,31 @@ // the Source function as operands. Loop through all of the operands of the // functions and patch them up to point to the local versions... // + // This is the same as RemapInstruction, except that it avoids remapping + // instruction and basic block operands. + // for (Function::iterator BB = Dest->begin(), BE = Dest->end(); BB != BE; ++BB) - for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ++I) + for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ++I) { + // Remap operands. for (Instruction::op_iterator OI = I->op_begin(), OE = I->op_end(); OI != OE; ++OI) if (!isa(*OI) && !isa(*OI)) *OI = MapValue(*OI, ValueMap); + // Remap attached metadata. + SmallVector, 4> MDs; + I->getAllMetadata(MDs); + for (SmallVectorImpl >::iterator + MI = MDs.begin(), ME = MDs.end(); MI != ME; ++MI) { + Value *Old = MI->second; + if (!isa(Old) && !isa(Old)) { + Value *New = MapValue(Old, ValueMap); + if (New != Old) + I->setMetadata(MI->first, cast(New)); + } + } + } + // There is no need to map the arguments anymore. for (Function::arg_iterator I = Src->arg_begin(), E = Src->arg_end(); I != E; ++I) Modified: llvm/trunk/lib/Transforms/Utils/CloneModule.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/CloneModule.cpp?rev=112091&r1=112090&r2=112091&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/CloneModule.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/CloneModule.cpp Wed Aug 25 16:36:50 2010 @@ -132,20 +132,5 @@ NewNMD->addOperand(cast(MapValue(NMD.getOperand(i), VMap))); } - // Update metadata attach with instructions. - for (Module::iterator MI = New->begin(), ME = New->end(); MI != ME; ++MI) - for (Function::iterator FI = MI->begin(), FE = MI->end(); - FI != FE; ++FI) - for (BasicBlock::iterator BI = FI->begin(), BE = FI->end(); - BI != BE; ++BI) { - SmallVector, 4 > MDs; - BI->getAllMetadata(MDs); - for (SmallVector, 4>::iterator - MDI = MDs.begin(), MDE = MDs.end(); MDI != MDE; ++MDI) { - Value *MappedValue = MapValue(MDI->second, VMap); - if (MDI->second != MappedValue && MappedValue) - BI->setMetadata(MDI->first, cast(MappedValue)); - } - } return New; } Modified: llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp?rev=112091&r1=112090&r2=112091&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp Wed Aug 25 16:36:50 2010 @@ -147,10 +147,21 @@ /// current values into those specified by VMap. /// void llvm::RemapInstruction(Instruction *I, ValueToValueMapTy &VMap) { + // Remap operands. for (User::op_iterator op = I->op_begin(), E = I->op_end(); op != E; ++op) { Value *V = MapValue(*op, VMap); assert(V && "Referenced value not in value map!"); *op = V; } -} + // Remap attached metadata. + SmallVector, 4> MDs; + I->getAllMetadata(MDs); + for (SmallVectorImpl >::iterator + MI = MDs.begin(), ME = MDs.end(); MI != ME; ++MI) { + Value *Old = MI->second; + Value *New = MapValue(Old, VMap); + if (New != Old) + I->setMetadata(MI->first, cast(New)); + } +} Added: llvm/trunk/test/Linker/metadata-a.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Linker/metadata-a.ll?rev=112091&view=auto ============================================================================== --- llvm/trunk/test/Linker/metadata-a.ll (added) +++ llvm/trunk/test/Linker/metadata-a.ll Wed Aug 25 16:36:50 2010 @@ -0,0 +1,15 @@ +; RUN: llvm-link %s %p/metadata-b.ll -S -o - | FileCheck %s + +; CHECK: define void @foo(i32 %a) +; CHECK: ret void, !attach !0, !also !{i32 %a} +; CHECK: define void @goo(i32 %b) +; CHECK: ret void, !attach !1, !and !{i32 %b} +; CHECK: !0 = metadata !{i32 524334, void (i32)* @foo} +; CHECK: !1 = metadata !{i32 524334, void (i32)* @goo} + +define void @foo(i32 %a) nounwind { +entry: + ret void, !attach !0, !also !{ i32 %a } +} + +!0 = metadata !{i32 524334, void (i32)* @foo} Added: llvm/trunk/test/Linker/metadata-b.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Linker/metadata-b.ll?rev=112091&view=auto ============================================================================== --- llvm/trunk/test/Linker/metadata-b.ll (added) +++ llvm/trunk/test/Linker/metadata-b.ll Wed Aug 25 16:36:50 2010 @@ -0,0 +1,9 @@ +; This file is for use with metadata-a.ll +; RUN: true + +define void @goo(i32 %b) nounwind { +entry: + ret void, !attach !0, !and !{ i32 %b } +} + +!0 = metadata !{i32 524334, void (i32)* @goo} From clattner at apple.com Wed Aug 25 17:16:18 2010 From: clattner at apple.com (Chris Lattner) Date: Wed, 25 Aug 2010 15:16:18 -0700 Subject: [llvm-commits] [llvm] r111995 - /llvm/trunk/lib/VMCore/Metadata.cpp In-Reply-To: References: <20100824232112.69C102A6C12C@llvm.org> <92ADEEF9-682F-4740-9FA1-F606F2977CDB@apple.com> Message-ID: Ok, thanks! On Aug 24, 2010, at 6:15 PM, Dan Gohman wrote: > > > On Aug 24, 2010, at 4:33 PM, Chris Lattner wrote: > >> >> On Aug 24, 2010, at 4:21 PM, Dan Gohman wrote: >> >>> Author: djg >>> Date: Tue Aug 24 18:21:12 2010 >>> New Revision: 111995 >>> >>> URL: http://llvm.org/viewvc/llvm-project?rev=111995&view=rev >>> Log: >>> Don't include the is-function-local bit in the FoldingSetNodeID >>> for MDNodes, since this information is effectively implied by >>> the operands. This allow allows the code to avoid doing a >>> recursive is-it-really-function-local check in some cases. >> >> One trick with this: if the function local operand of a local md node drops to null, the node stays function local. > > When an operand drops to null, we also take the node out of the uniquing map. I'll add some comments about this. > > Dan From sabre at nondot.org Wed Aug 25 17:45:53 2010 From: sabre at nondot.org (Chris Lattner) Date: Wed, 25 Aug 2010 22:45:53 -0000 Subject: [llvm-commits] [llvm] r112099 - /llvm/trunk/include/llvm/CodeGen/ValueTypes.h Message-ID: <20100825224553.8FD0C2A6C12C@llvm.org> Author: lattner Date: Wed Aug 25 17:45:53 2010 New Revision: 112099 URL: http://llvm.org/viewvc/llvm-project?rev=112099&view=rev Log: tidy up Modified: llvm/trunk/include/llvm/CodeGen/ValueTypes.h Modified: llvm/trunk/include/llvm/CodeGen/ValueTypes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ValueTypes.h?rev=112099&r1=112098&r2=112099&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/ValueTypes.h (original) +++ llvm/trunk/include/llvm/CodeGen/ValueTypes.h Wed Aug 25 17:45:53 2010 @@ -159,14 +159,12 @@ /// getPow2VectorType - Widens the length of the given vector EVT up to /// the nearest power of 2 and returns that type. MVT getPow2VectorType() const { - if (!isPow2VectorType()) { - unsigned NElts = getVectorNumElements(); - unsigned Pow2NElts = 1 << Log2_32_Ceil(NElts); - return MVT::getVectorVT(getVectorElementType(), Pow2NElts); - } - else { + if (isPow2VectorType()) return *this; - } + + unsigned NElts = getVectorNumElements(); + unsigned Pow2NElts = 1 << Log2_32_Ceil(NElts); + return MVT::getVectorVT(getVectorElementType(), Pow2NElts); } /// getScalarType - If this is a vector type, return the element type, @@ -350,7 +348,7 @@ } return (MVT::SimpleValueType)(MVT::INVALID_SIMPLE_VALUE_TYPE); } - + static MVT getIntVectorWithNumElements(unsigned NumElts) { switch (NumElts) { default: return (MVT::SimpleValueType)(MVT::INVALID_SIMPLE_VALUE_TYPE); @@ -374,22 +372,16 @@ EVT(MVT::SimpleValueType SVT) : V(SVT), LLVMTy(0) { } EVT(MVT S) : V(S), LLVMTy(0) {} - bool operator==(const EVT VT) const { - if (V.SimpleTy == VT.V.SimpleTy) { - if (V.SimpleTy == MVT::INVALID_SIMPLE_VALUE_TYPE) - return LLVMTy == VT.LLVMTy; + bool operator==(EVT VT) const { + return !(*this != VT); + } + bool operator!=(EVT VT) const { + if (V.SimpleTy != VT.V.SimpleTy) return true; - } + if (V.SimpleTy == MVT::INVALID_SIMPLE_VALUE_TYPE) + return LLVMTy != VT.LLVMTy; return false; } - bool operator!=(const EVT VT) const { - if (V.SimpleTy == VT.V.SimpleTy) { - if (V.SimpleTy == MVT::INVALID_SIMPLE_VALUE_TYPE) - return LLVMTy != VT.LLVMTy; - return false; - } - return true; - } /// getFloatingPointVT - Returns the EVT that represents a floating point /// type with the given number of bits. There are two floating point types @@ -402,30 +394,27 @@ /// number of bits. static EVT getIntegerVT(LLVMContext &Context, unsigned BitWidth) { MVT M = MVT::getIntegerVT(BitWidth); - if (M.SimpleTy == MVT::INVALID_SIMPLE_VALUE_TYPE) - return getExtendedIntegerVT(Context, BitWidth); - else + if (M.SimpleTy != MVT::INVALID_SIMPLE_VALUE_TYPE) return M; + return getExtendedIntegerVT(Context, BitWidth); } /// getVectorVT - Returns the EVT that represents a vector NumElements in /// length, where each element is of type VT. static EVT getVectorVT(LLVMContext &Context, EVT VT, unsigned NumElements) { MVT M = MVT::getVectorVT(VT.V, NumElements); - if (M.SimpleTy == MVT::INVALID_SIMPLE_VALUE_TYPE) - return getExtendedVectorVT(Context, VT, NumElements); - else + if (M.SimpleTy != MVT::INVALID_SIMPLE_VALUE_TYPE) return M; + return getExtendedVectorVT(Context, VT, NumElements); } /// getIntVectorWithNumElements - Return any integer vector type that has /// the specified number of elements. static EVT getIntVectorWithNumElements(LLVMContext &C, unsigned NumElts) { MVT M = MVT::getIntVectorWithNumElements(NumElts); - if (M.SimpleTy == MVT::INVALID_SIMPLE_VALUE_TYPE) - return getVectorVT(C, MVT::i8, NumElts); - else + if (M.SimpleTy != MVT::INVALID_SIMPLE_VALUE_TYPE) return M; + return getVectorVT(C, MVT::i8, NumElts); } /// isSimple - Test if the given EVT is simple (as opposed to being @@ -457,26 +446,27 @@ /// is64BitVector - Return true if this is a 64-bit vector type. bool is64BitVector() const { - return isSimple() ? - (V==MVT::v8i8 || V==MVT::v4i16 || V==MVT::v2i32 || - V==MVT::v1i64 || V==MVT::v2f32) : - isExtended64BitVector(); + if (!isSimple()) + return isExtended64BitVector(); + + return (V == MVT::v8i8 || V==MVT::v4i16 || V==MVT::v2i32 || + V == MVT::v1i64 || V==MVT::v2f32); } /// is128BitVector - Return true if this is a 128-bit vector type. bool is128BitVector() const { - return isSimple() ? - (V==MVT::v16i8 || V==MVT::v8i16 || V==MVT::v4i32 || - V==MVT::v2i64 || V==MVT::v4f32 || V==MVT::v2f64) : - isExtended128BitVector(); + if (!isSimple()) + return isExtended128BitVector(); + return (V==MVT::v16i8 || V==MVT::v8i16 || V==MVT::v4i32 || + V==MVT::v2i64 || V==MVT::v4f32 || V==MVT::v2f64); } /// is256BitVector - Return true if this is a 256-bit vector type. inline bool is256BitVector() const { - return isSimple() - ? (V==MVT::v8f32 || V==MVT::v4f64 || V==MVT::v32i8 || - V==MVT::v16i16 || V==MVT::v8i32 || V==MVT::v4i64) - : isExtended256BitVector(); + if (!isSimple()) + return isExtended256BitVector(); + return (V == MVT::v8f32 || V == MVT::v4f64 || V == MVT::v32i8 || + V == MVT::v16i16 || V == MVT::v8i32 || V == MVT::v4i64); } /// is512BitVector - Return true if this is a 512-bit vector type. @@ -550,8 +540,7 @@ assert(isVector() && "Invalid vector type!"); if (isSimple()) return V.getVectorElementType(); - else - return getExtendedVectorElementType(); + return getExtendedVectorElementType(); } /// getVectorNumElements - Given a vector type, return the number of @@ -560,16 +549,14 @@ assert(isVector() && "Invalid vector type!"); if (isSimple()) return V.getVectorNumElements(); - else - return getExtendedVectorNumElements(); + return getExtendedVectorNumElements(); } /// getSizeInBits - Return the size of the specified value type in bits. unsigned getSizeInBits() const { if (isSimple()) return V.getSizeInBits(); - else - return getExtendedSizeInBits(); + return getExtendedSizeInBits(); } /// getStoreSize - Return the number of bytes overwritten by a store @@ -592,8 +579,7 @@ unsigned BitWidth = getSizeInBits(); if (BitWidth <= 8) return EVT(MVT::i8); - else - return getIntegerVT(Context, 1 << Log2_32_Ceil(BitWidth)); + return getIntegerVT(Context, 1 << Log2_32_Ceil(BitWidth)); } /// getHalfSizedIntegerVT - Finds the smallest simple value type that is @@ -604,12 +590,10 @@ assert(isInteger() && !isVector() && "Invalid integer type!"); unsigned EVTSize = getSizeInBits(); for (unsigned IntVT = MVT::FIRST_INTEGER_VALUETYPE; - IntVT <= MVT::LAST_INTEGER_VALUETYPE; - ++IntVT) { + IntVT <= MVT::LAST_INTEGER_VALUETYPE; ++IntVT) { EVT HalfVT = EVT((MVT::SimpleValueType)IntVT); - if(HalfVT.getSizeInBits() * 2 >= EVTSize) { + if (HalfVT.getSizeInBits() * 2 >= EVTSize) return HalfVT; - } } return getIntegerVT(Context, (EVTSize + 1) / 2); } From sabre at nondot.org Wed Aug 25 17:49:25 2010 From: sabre at nondot.org (Chris Lattner) Date: Wed, 25 Aug 2010 22:49:25 -0000 Subject: [llvm-commits] [llvm] r112101 - in /llvm/trunk: include/llvm/Target/TargetLowering.h lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp lib/CodeGen/SelectionDAG/TargetLowering.cpp test/CodeGen/X86/v2f32.ll test/CodeGen/X86/widen_shuffle-1.ll Message-ID: <20100825224925.E58F62A6C12C@llvm.org> Author: lattner Date: Wed Aug 25 17:49:25 2010 New Revision: 112101 URL: http://llvm.org/viewvc/llvm-project?rev=112101&view=rev Log: Change handling of illegal vector types to widen when possible instead of expanding: e.g. <2 x float> -> <4 x float> instead of -> 2 floats. This affects two places in the code: handling cross block values and handling function return and arguments. Since vectors are already widened by legalizetypes, this gives us much better code and unblocks x86-64 abi and SPU abi work. For example, this (which is a silly example of a cross-block value): define <4 x float> @test2(<4 x float> %A) nounwind { %B = shufflevector <4 x float> %A, <4 x float> undef, <2 x i32> %C = fadd <2 x float> %B, %B br label %BB BB: %D = fadd <2 x float> %C, %C %E = shufflevector <2 x float> %D, <2 x float> undef, <4 x i32> ret <4 x float> %E } Now compiles into: _test2: ## @test2 ## BB#0: addps %xmm0, %xmm0 addps %xmm0, %xmm0 ret previously it compiled into: _test2: ## @test2 ## BB#0: addps %xmm0, %xmm0 pshufd $1, %xmm0, %xmm1 ## kill: XMM0 XMM0 XMM0 insertps $0, %xmm0, %xmm0 insertps $16, %xmm1, %xmm0 addps %xmm0, %xmm0 ret This implements rdar://8230384 Modified: llvm/trunk/include/llvm/Target/TargetLowering.h llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp llvm/trunk/test/CodeGen/X86/v2f32.ll llvm/trunk/test/CodeGen/X86/widen_shuffle-1.ll Modified: llvm/trunk/include/llvm/Target/TargetLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=112101&r1=112100&r2=112101&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetLowering.h (original) +++ llvm/trunk/include/llvm/Target/TargetLowering.h Wed Aug 25 17:49:25 2010 @@ -214,24 +214,59 @@ /// ValueTypeActions - For each value type, keep a LegalizeAction enum /// that indicates how instruction selection should deal with the type. uint8_t ValueTypeActions[MVT::LAST_VALUETYPE]; + + LegalizeAction getExtendedTypeAction(EVT VT) const { + // Handle non-vector integers. + if (!VT.isVector()) { + assert(VT.isInteger() && "Unsupported extended type!"); + unsigned BitSize = VT.getSizeInBits(); + // First promote to a power-of-two size, then expand if necessary. + if (BitSize < 8 || !isPowerOf2_32(BitSize)) + return Promote; + return Expand; + } + + // If this is a type smaller than a legal vector type, promote to that + // type, e.g. <2 x float> -> <4 x float>. + if (VT.getVectorElementType().isSimple() && + VT.getVectorNumElements() != 1) { + MVT EltType = VT.getVectorElementType().getSimpleVT(); + unsigned NumElts = VT.getVectorNumElements(); + while (1) { + // Round up to the nearest power of 2. + NumElts = (unsigned)NextPowerOf2(NumElts); + + MVT LargerVector = MVT::getVectorVT(EltType, NumElts); + if (LargerVector == MVT()) break; + + // If this the larger type is legal, promote to it. + if (getTypeAction(LargerVector) == Legal) return Promote; + } + } + + return VT.isPow2VectorType() ? Expand : Promote; + } public: ValueTypeActionImpl() { std::fill(ValueTypeActions, array_endof(ValueTypeActions), 0); } + + /// FIXME: This Context argument is now dead, zap it. LegalizeAction getTypeAction(LLVMContext &Context, EVT VT) const { - if (VT.isExtended()) { - if (VT.isVector()) { - return VT.isPow2VectorType() ? Expand : Promote; - } - if (VT.isInteger()) - // First promote to a power-of-two size, then expand if necessary. - return VT == VT.getRoundIntegerType(Context) ? Expand : Promote; - assert(0 && "Unsupported extended type!"); - return Legal; - } - unsigned I = VT.getSimpleVT().SimpleTy; - return (LegalizeAction)ValueTypeActions[I]; + return getTypeAction(VT); + } + + LegalizeAction getTypeAction(EVT VT) const { + if (!VT.isExtended()) + return getTypeAction(VT.getSimpleVT()); + return getExtendedTypeAction(VT); + } + + LegalizeAction getTypeAction(MVT VT) const { + return (LegalizeAction)ValueTypeActions[VT.SimpleTy]; } + + void setTypeAction(EVT VT, LegalizeAction Action) { unsigned I = VT.getSimpleVT().SimpleTy; ValueTypeActions[I] = Action; Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=112101&r1=112100&r2=112101&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Wed Aug 25 17:49:25 2010 @@ -252,8 +252,21 @@ if (PartVT == ValueVT) return Val; - if (PartVT.isVector()) // Vector/Vector bitcast. + if (PartVT.isVector()) { + // If the element type of the source/dest vectors are the same, but the + // parts vector has more elements than the value vector, then we have a + // vector widening case (e.g. <2 x float> -> <4 x float>). Extract the + // elements we want. + if (PartVT.getVectorElementType() == ValueVT.getVectorElementType()) { + assert(PartVT.getVectorNumElements() > ValueVT.getVectorNumElements() && + "Cannot narrow, it would be a lossy transformation"); + return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, ValueVT, Val, + DAG.getIntPtrConstant(0)); + } + + // Vector/Vector bitcast. return DAG.getNode(ISD::BIT_CONVERT, DL, ValueVT, Val); + } assert(ValueVT.getVectorElementType() == PartVT && ValueVT.getVectorNumElements() == 1 && @@ -392,16 +405,39 @@ const TargetLowering &TLI = DAG.getTargetLoweringInfo(); if (NumParts == 1) { - if (PartVT != ValueVT) { - if (PartVT.getSizeInBits() == ValueVT.getSizeInBits()) { - Val = DAG.getNode(ISD::BIT_CONVERT, DL, PartVT, Val); - } else { - assert(ValueVT.getVectorElementType() == PartVT && - ValueVT.getVectorNumElements() == 1 && - "Only trivial vector-to-scalar conversions should get here!"); - Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, - PartVT, Val, DAG.getIntPtrConstant(0)); - } + if (PartVT == ValueVT) { + // Nothing to do. + } else if (PartVT.getSizeInBits() == ValueVT.getSizeInBits()) { + // Bitconvert vector->vector case. + Val = DAG.getNode(ISD::BIT_CONVERT, DL, PartVT, Val); + } else if (PartVT.isVector() && + PartVT.getVectorElementType() == ValueVT.getVectorElementType()&& + PartVT.getVectorNumElements() > ValueVT.getVectorNumElements()) { + EVT ElementVT = PartVT.getVectorElementType(); + // Vector widening case, e.g. <2 x float> -> <4 x float>. Shuffle in + // undef elements. + SmallVector Ops; + for (unsigned i = 0, e = ValueVT.getVectorNumElements(); i != e; ++i) + Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, + ElementVT, Val, DAG.getIntPtrConstant(i))); + + for (unsigned i = ValueVT.getVectorNumElements(), + e = PartVT.getVectorNumElements(); i != e; ++i) + Ops.push_back(DAG.getUNDEF(ElementVT)); + + Val = DAG.getNode(ISD::BUILD_VECTOR, DL, PartVT, &Ops[0], Ops.size()); + + // FIXME: Use CONCAT for 2x -> 4x. + + //SDValue UndefElts = DAG.getUNDEF(VectorTy); + //Val = DAG.getNode(ISD::CONCAT_VECTORS, DL, PartVT, Val, UndefElts); + } else { + // Vector -> scalar conversion. + assert(ValueVT.getVectorElementType() == PartVT && + ValueVT.getVectorNumElements() == 1 && + "Only trivial vector-to-scalar conversions should get here!"); + Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, + PartVT, Val, DAG.getIntPtrConstant(0)); } Parts[0] = Val; @@ -428,8 +464,7 @@ DAG.getIntPtrConstant(i * (NumElements / NumIntermediates))); else Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, - IntermediateVT, Val, - DAG.getIntPtrConstant(i)); + IntermediateVT, Val, DAG.getIntPtrConstant(i)); } // Split the intermediate operands into legal parts. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=112101&r1=112100&r2=112101&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Wed Aug 25 17:49:25 2010 @@ -697,6 +697,7 @@ return std::make_pair(BestRC, 1); } + /// computeRegisterProperties - Once all of the register classes are added, /// this allows us to compute derived properties we expose. void TargetLowering::computeRegisterProperties() { @@ -782,6 +783,28 @@ MVT VT = (MVT::SimpleValueType)i; if (isTypeLegal(VT)) continue; + // Determine if there is a legal wider type. If so, we should promote to + // that wider vector type. + EVT EltVT = VT.getVectorElementType(); + unsigned NElts = VT.getVectorNumElements(); + if (NElts != 1) { + bool IsLegalWiderType = false; + for (unsigned nVT = i+1; nVT <= MVT::LAST_VECTOR_VALUETYPE; ++nVT) { + EVT SVT = (MVT::SimpleValueType)nVT; + if (SVT.getVectorElementType() == EltVT && + SVT.getVectorNumElements() > NElts && + isTypeSynthesizable(SVT)) { + TransformToType[i] = SVT; + RegisterTypeForVT[i] = SVT; + NumRegistersForVT[i] = 1; + ValueTypeActions.setTypeAction(VT, Promote); + IsLegalWiderType = true; + break; + } + } + if (IsLegalWiderType) continue; + } + MVT IntermediateVT; EVT RegisterVT; unsigned NumIntermediates; @@ -790,30 +813,14 @@ RegisterVT, this); RegisterTypeForVT[i] = RegisterVT; - // Determine if there is a legal wider type. - bool IsLegalWiderType = false; - EVT EltVT = VT.getVectorElementType(); - unsigned NElts = VT.getVectorNumElements(); - for (unsigned nVT = i+1; nVT <= MVT::LAST_VECTOR_VALUETYPE; ++nVT) { - EVT SVT = (MVT::SimpleValueType)nVT; - if (isTypeSynthesizable(SVT) && SVT.getVectorElementType() == EltVT && - SVT.getVectorNumElements() > NElts && NElts != 1) { - TransformToType[i] = SVT; - ValueTypeActions.setTypeAction(VT, Promote); - IsLegalWiderType = true; - break; - } - } - if (!IsLegalWiderType) { - EVT NVT = VT.getPow2VectorType(); - if (NVT == VT) { - // Type is already a power of 2. The default action is to split. - TransformToType[i] = MVT::Other; - ValueTypeActions.setTypeAction(VT, Expand); - } else { - TransformToType[i] = NVT; - ValueTypeActions.setTypeAction(VT, Promote); - } + EVT NVT = VT.getPow2VectorType(); + if (NVT == VT) { + // Type is already a power of 2. The default action is to split. + TransformToType[i] = MVT::Other; + ValueTypeActions.setTypeAction(VT, Expand); + } else { + TransformToType[i] = NVT; + ValueTypeActions.setTypeAction(VT, Promote); } } @@ -857,8 +864,21 @@ EVT &IntermediateVT, unsigned &NumIntermediates, EVT &RegisterVT) const { - // Figure out the right, legal destination reg to copy into. unsigned NumElts = VT.getVectorNumElements(); + + // If there is a wider vector type with the same element type as this one, + // we should widen to that legal vector type. This handles things like + // <2 x float> -> <4 x float>. + if (NumElts != 1 && getTypeAction(Context, VT) == Promote) { + RegisterVT = getTypeToTransformTo(Context, VT); + if (isTypeLegal(RegisterVT)) { + IntermediateVT = RegisterVT; + NumIntermediates = 1; + return 1; + } + } + + // Figure out the right, legal destination reg to copy into. EVT EltTy = VT.getVectorElementType(); unsigned NumVectorRegs = 1; @@ -887,16 +907,12 @@ EVT DestVT = getRegisterType(Context, NewVT); RegisterVT = DestVT; - if (DestVT.bitsLT(NewVT)) { - // Value is expanded, e.g. i64 -> i16. + if (DestVT.bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16. return NumVectorRegs*(NewVT.getSizeInBits()/DestVT.getSizeInBits()); - } else { - // Otherwise, promotion or legal types use the same number of registers as - // the vector decimated to the appropriate level. - return NumVectorRegs; - } - return 1; + // Otherwise, promotion or legal types use the same number of registers as + // the vector decimated to the appropriate level. + return NumVectorRegs; } /// Get the EVTs and ArgFlags collections that represent the legalized return Modified: llvm/trunk/test/CodeGen/X86/v2f32.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/v2f32.ll?rev=112101&r1=112100&r2=112101&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/v2f32.ll (original) +++ llvm/trunk/test/CodeGen/X86/v2f32.ll Wed Aug 25 17:49:25 2010 @@ -10,15 +10,16 @@ store float %c, float* %P2 ret void ; X64: test1: -; X64-NEXT: addss %xmm1, %xmm0 -; X64-NEXT: movss %xmm0, (%rdi) +; X64-NEXT: pshufd $1, %xmm0, %xmm1 +; X64-NEXT: addss %xmm0, %xmm1 +; X64-NEXT: movss %xmm1, (%rdi) ; X64-NEXT: ret ; X32: test1: -; X32-NEXT: movss 4(%esp), %xmm0 -; X32-NEXT: addss 8(%esp), %xmm0 -; X32-NEXT: movl 12(%esp), %eax -; X32-NEXT: movss %xmm0, (%eax) +; X32-NEXT: pshufd $1, %xmm0, %xmm1 +; X32-NEXT: addss %xmm0, %xmm1 +; X32-NEXT: movl 4(%esp), %eax +; X32-NEXT: movss %xmm1, (%eax) ; X32-NEXT: ret } @@ -28,12 +29,42 @@ ret <2 x float> %Z ; X64: test2: -; X64-NEXT: insertps $0 -; X64-NEXT: insertps $16 -; X64-NEXT: insertps $0 -; X64-NEXT: insertps $16 -; X64-NEXT: addps -; X64-NEXT: movaps -; X64-NEXT: pshufd +; X64-NEXT: addps %xmm1, %xmm0 ; X64-NEXT: ret } + + +define <2 x float> @test3(<4 x float> %A) nounwind { + %B = shufflevector <4 x float> %A, <4 x float> undef, <2 x i32> + %C = fadd <2 x float> %B, %B + ret <2 x float> %C +; CHECK: test3: +; CHECK-NEXT: addps %xmm0, %xmm0 +; CHECK-NEXT: ret +} + +define <2 x float> @test4(<2 x float> %A) nounwind { + %C = fadd <2 x float> %A, %A + ret <2 x float> %C +; CHECK: test4: +; CHECK-NEXT: addps %xmm0, %xmm0 +; CHECK-NEXT: ret +} + +define <4 x float> @test5(<4 x float> %A) nounwind { + %B = shufflevector <4 x float> %A, <4 x float> undef, <2 x i32> + %C = fadd <2 x float> %B, %B + br label %BB + +BB: + %D = fadd <2 x float> %C, %C + %E = shufflevector <2 x float> %D, <2 x float> undef, <4 x i32> + ret <4 x float> %E + +; CHECK: _test5: +; CHECK-NEXT: addps %xmm0, %xmm0 +; CHECK-NEXT: addps %xmm0, %xmm0 +; CHECK-NEXT: ret +} + + Modified: llvm/trunk/test/CodeGen/X86/widen_shuffle-1.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/widen_shuffle-1.ll?rev=112101&r1=112100&r2=112101&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/widen_shuffle-1.ll (original) +++ llvm/trunk/test/CodeGen/X86/widen_shuffle-1.ll Wed Aug 25 17:49:25 2010 @@ -3,7 +3,8 @@ ; widening shuffle v3float and then a add define void @shuf(<3 x float>* %dst.addr, <3 x float> %src1,<3 x float> %src2) nounwind { entry: -; CHECK: insertps +; CHECK: shuf: +; CHECK: extractps ; CHECK: extractps %x = shufflevector <3 x float> %src1, <3 x float> %src2, <3 x i32> < i32 0, i32 1, i32 2> %val = fadd <3 x float> %x, %src2 @@ -15,7 +16,8 @@ ; widening shuffle v3float with a different mask and then a add define void @shuf2(<3 x float>* %dst.addr, <3 x float> %src1,<3 x float> %src2) nounwind { entry: -; CHECK: insertps +; CHECK: shuf2: +; CHECK: extractps ; CHECK: extractps %x = shufflevector <3 x float> %src1, <3 x float> %src2, <3 x i32> < i32 0, i32 4, i32 2> %val = fadd <3 x float> %x, %src2 @@ -26,7 +28,7 @@ ; Example of when widening a v3float operation causes the DAG to replace a node ; with the operation that we are currently widening, i.e. when replacing ; opA with opB, the DAG will produce new operations with opA. -define void @shuf3(<4 x float> %tmp10, <4 x float> %vecinit15, <4 x float>* %dst) { +define void @shuf3(<4 x float> %tmp10, <4 x float> %vecinit15, <4 x float>* %dst) nounwind { entry: ; CHECK: pshufd %shuffle.i.i.i12 = shufflevector <4 x float> %tmp10, <4 x float> %vecinit15, <4 x i32> From sabre at nondot.org Wed Aug 25 18:00:45 2010 From: sabre at nondot.org (Chris Lattner) Date: Wed, 25 Aug 2010 23:00:45 -0000 Subject: [llvm-commits] [llvm] r112104 - in /llvm/trunk: include/llvm/Target/TargetLowering.h lib/CodeGen/SelectionDAG/LegalizeDAG.cpp lib/CodeGen/SelectionDAG/LegalizeTypes.h lib/CodeGen/SelectionDAG/TargetLowering.cpp lib/Transforms/Scalar/CodeGenPrepare.cpp Message-ID: <20100825230045.84F962A6C12C@llvm.org> Author: lattner Date: Wed Aug 25 18:00:45 2010 New Revision: 112104 URL: http://llvm.org/viewvc/llvm-project?rev=112104&view=rev Log: remove some llvmcontext arguments that are now dead post-refactoring. Modified: llvm/trunk/include/llvm/Target/TargetLowering.h llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp Modified: llvm/trunk/include/llvm/Target/TargetLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=112104&r1=112103&r2=112104&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetLowering.h (original) +++ llvm/trunk/include/llvm/Target/TargetLowering.h Wed Aug 25 18:00:45 2010 @@ -251,11 +251,6 @@ std::fill(ValueTypeActions, array_endof(ValueTypeActions), 0); } - /// FIXME: This Context argument is now dead, zap it. - LegalizeAction getTypeAction(LLVMContext &Context, EVT VT) const { - return getTypeAction(VT); - } - LegalizeAction getTypeAction(EVT VT) const { if (!VT.isExtended()) return getTypeAction(VT.getSimpleVT()); @@ -281,8 +276,8 @@ /// it is already legal (return 'Legal') or we need to promote it to a larger /// type (return 'Promote'), or we need to expand it into multiple registers /// of smaller integer type (return 'Expand'). 'Custom' is not an option. - LegalizeAction getTypeAction(LLVMContext &Context, EVT VT) const { - return ValueTypeActions.getTypeAction(Context, VT); + LegalizeAction getTypeAction(EVT VT) const { + return ValueTypeActions.getTypeAction(VT); } /// getTypeToTransformTo - For types supported by the target, this is an @@ -296,7 +291,7 @@ assert((unsigned)VT.getSimpleVT().SimpleTy < array_lengthof(TransformToType)); EVT NVT = TransformToType[VT.getSimpleVT().SimpleTy]; - assert(getTypeAction(Context, NVT) != Promote && + assert(getTypeAction(NVT) != Promote && "Promote may not follow Expand or Promote"); return NVT; } @@ -311,17 +306,16 @@ EltVT : EVT::getVectorVT(Context, EltVT, NumElts / 2); } // Promote to a power of two size, avoiding multi-step promotion. - return getTypeAction(Context, NVT) == Promote ? + return getTypeAction(NVT) == Promote ? getTypeToTransformTo(Context, NVT) : NVT; } else if (VT.isInteger()) { EVT NVT = VT.getRoundIntegerType(Context); - if (NVT == VT) - // Size is a power of two - expand to half the size. + if (NVT == VT) // Size is a power of two - expand to half the size. return EVT::getIntegerVT(Context, VT.getSizeInBits() / 2); - else - // Promote to a power of two size, avoiding multi-step promotion. - return getTypeAction(Context, NVT) == Promote ? - getTypeToTransformTo(Context, NVT) : NVT; + + // Promote to a power of two size, avoiding multi-step promotion. + return getTypeAction(NVT) == Promote ? + getTypeToTransformTo(Context, NVT) : NVT; } assert(0 && "Unsupported extended type!"); return MVT(MVT::Other); // Not reached @@ -334,7 +328,7 @@ EVT getTypeToExpandTo(LLVMContext &Context, EVT VT) const { assert(!VT.isVector()); while (true) { - switch (getTypeAction(Context, VT)) { + switch (getTypeAction(VT)) { case Legal: return VT; case Expand: Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=112104&r1=112103&r2=112104&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Wed Aug 25 18:00:45 2010 @@ -100,8 +100,7 @@ /// it is already legal or we need to expand it into multiple registers of /// smaller integer type, or we need to promote it to a larger type. LegalizeAction getTypeAction(EVT VT) const { - return - (LegalizeAction)ValueTypeActions.getTypeAction(*DAG.getContext(), VT); + return (LegalizeAction)ValueTypeActions.getTypeAction(VT); } /// isTypeLegal - Return true if this type is legal on this target. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=112104&r1=112103&r2=112104&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h Wed Aug 25 18:00:45 2010 @@ -75,7 +75,7 @@ /// getTypeAction - Return how we should legalize values of this type. LegalizeAction getTypeAction(EVT VT) const { - switch (ValueTypeActions.getTypeAction(*DAG.getContext(), VT)) { + switch (ValueTypeActions.getTypeAction(VT)) { default: assert(false && "Unknown legalize action!"); case TargetLowering::Legal: @@ -108,8 +108,7 @@ /// isTypeLegal - Return true if this type is legal on this target. bool isTypeLegal(EVT VT) const { - return (ValueTypeActions.getTypeAction(*DAG.getContext(), VT) == - TargetLowering::Legal); + return ValueTypeActions.getTypeAction(VT) == TargetLowering::Legal; } /// IgnoreNodeResults - Pretend all of this node's results are legal. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=112104&r1=112103&r2=112104&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Wed Aug 25 18:00:45 2010 @@ -869,7 +869,7 @@ // If there is a wider vector type with the same element type as this one, // we should widen to that legal vector type. This handles things like // <2 x float> -> <4 x float>. - if (NumElts != 1 && getTypeAction(Context, VT) == Promote) { + if (NumElts != 1 && getTypeAction(VT) == Promote) { RegisterVT = getTypeToTransformTo(Context, VT); if (isTypeLegal(RegisterVT)) { IntermediateVT = RegisterVT; Modified: llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp?rev=112104&r1=112103&r2=112104&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp Wed Aug 25 18:00:45 2010 @@ -433,9 +433,9 @@ // If these values will be promoted, find out what they will be promoted // to. This helps us consider truncates on PPC as noop copies when they // are. - if (TLI.getTypeAction(CI->getContext(), SrcVT) == TargetLowering::Promote) + if (TLI.getTypeAction(SrcVT) == TargetLowering::Promote) SrcVT = TLI.getTypeToTransformTo(CI->getContext(), SrcVT); - if (TLI.getTypeAction(CI->getContext(), DstVT) == TargetLowering::Promote) + if (TLI.getTypeAction(DstVT) == TargetLowering::Promote) DstVT = TLI.getTypeToTransformTo(CI->getContext(), DstVT); // If, after promotion, these are the same types, this is a noop copy. From sabre at nondot.org Wed Aug 25 18:05:45 2010 From: sabre at nondot.org (Chris Lattner) Date: Wed, 25 Aug 2010 23:05:45 -0000 Subject: [llvm-commits] [llvm] r112105 - /llvm/trunk/include/llvm/Target/TargetLowering.h Message-ID: <20100825230545.651302A6C12C@llvm.org> Author: lattner Date: Wed Aug 25 18:05:45 2010 New Revision: 112105 URL: http://llvm.org/viewvc/llvm-project?rev=112105&view=rev Log: add a specialization for the MVT form of getTypeAction, since it is trivial. Modified: llvm/trunk/include/llvm/Target/TargetLowering.h Modified: llvm/trunk/include/llvm/Target/TargetLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=112105&r1=112104&r2=112105&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetLowering.h (original) +++ llvm/trunk/include/llvm/Target/TargetLowering.h Wed Aug 25 18:05:45 2010 @@ -261,7 +261,6 @@ return (LegalizeAction)ValueTypeActions[VT.SimpleTy]; } - void setTypeAction(EVT VT, LegalizeAction Action) { unsigned I = VT.getSimpleVT().SimpleTy; ValueTypeActions[I] = Action; @@ -279,7 +278,10 @@ LegalizeAction getTypeAction(EVT VT) const { return ValueTypeActions.getTypeAction(VT); } - + LegalizeAction getTypeAction(MVT VT) const { + return ValueTypeActions.getTypeAction(VT); + } + /// getTypeToTransformTo - For types supported by the target, this is an /// identity function. For types that must be promoted to larger types, this /// returns the larger type to promote to. For integer types that are larger From rjmccall at apple.com Wed Aug 25 18:11:24 2010 From: rjmccall at apple.com (John McCall) Date: Wed, 25 Aug 2010 23:11:24 -0000 Subject: [llvm-commits] [llvm] r112106 - /llvm/trunk/include/llvm/ADT/SmallVector.h Message-ID: <20100825231124.AF0212A6C12C@llvm.org> Author: rjmccall Date: Wed Aug 25 18:11:24 2010 New Revision: 112106 URL: http://llvm.org/viewvc/llvm-project?rev=112106&view=rev Log: Provide an explicit specialization of SmallVector at N=0 which does not require its type argument to be complete if no members are actually used. Modified: llvm/trunk/include/llvm/ADT/SmallVector.h Modified: llvm/trunk/include/llvm/ADT/SmallVector.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/SmallVector.h?rev=112106&r1=112105&r2=112106&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/SmallVector.h (original) +++ llvm/trunk/include/llvm/ADT/SmallVector.h Wed Aug 25 18:11:24 2010 @@ -707,6 +707,39 @@ }; +/// Specialize SmallVector at N=0. This specialization guarantees +/// that it can be instantiated at an incomplete T if none of its +/// members are required. +template +class SmallVector : public SmallVectorImpl { +public: + SmallVector() : SmallVectorImpl(0) { + } + + explicit SmallVector(unsigned Size, const T &Value = T()) + : SmallVectorImpl(0) { + this->reserve(Size); + while (Size--) + this->push_back(Value); + } + + template + SmallVector(ItTy S, ItTy E) : SmallVectorImpl(0) { + this->append(S, E); + } + + SmallVector(const SmallVector &RHS) : SmallVectorImpl(0) { + if (!RHS.empty()) + SmallVectorImpl::operator=(RHS); + } + + const SmallVector &operator=(const SmallVector &RHS) { + SmallVectorImpl::operator=(RHS); + return *this; + } + +}; + } // End llvm namespace namespace std { From bob.wilson at apple.com Wed Aug 25 18:27:42 2010 From: bob.wilson at apple.com (Bob Wilson) Date: Wed, 25 Aug 2010 23:27:42 -0000 Subject: [llvm-commits] [llvm] r112108 - in /llvm/trunk/lib/Target/ARM: ARMExpandPseudoInsts.cpp ARMISelDAGToDAG.cpp ARMInstrFormats.td ARMInstrNEON.td NEONPreAllocPass.cpp Message-ID: <20100825232742.EE9F62A6C12C@llvm.org> Author: bwilson Date: Wed Aug 25 18:27:42 2010 New Revision: 112108 URL: http://llvm.org/viewvc/llvm-project?rev=112108&view=rev Log: Start converting NEON load/stores to use pseudo instructions, beginning here with the VST4 instructions. Until after register allocation, we want to represent sets of adjacent registers by a single super-register. These VST4 pseudo instructions have a single QQ or QQQQ source register operand. They get expanded to the real VST4 instructions with 4 separate D register operands. Once this conversion is complete, we'll be able to remove the NEONPreAllocPass and avoid some fragile and hacky code elsewhere. Modified: llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp llvm/trunk/lib/Target/ARM/ARMInstrFormats.td llvm/trunk/lib/Target/ARM/ARMInstrNEON.td llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp Modified: llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp?rev=112108&r1=112107&r2=112108&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp Wed Aug 25 18:27:42 2010 @@ -24,6 +24,13 @@ namespace { class ARMExpandPseudo : public MachineFunctionPass { + // Constants for register spacing in NEON load/store instructions. + enum NEONRegSpacing { + SingleSpc, + EvenDblSpc, + OddDblSpc + }; + public: static char ID; ARMExpandPseudo() : MachineFunctionPass(ID) {} @@ -41,6 +48,8 @@ void TransferImpOps(MachineInstr &OldMI, MachineInstrBuilder &UseMI, MachineInstrBuilder &DefMI); bool ExpandMBB(MachineBasicBlock &MBB); + void ExpandVST4(MachineBasicBlock::iterator &MBBI, unsigned Opc, + bool hasWriteBack, NEONRegSpacing RegSpc); }; char ARMExpandPseudo::ID = 0; } @@ -63,6 +72,61 @@ } } +/// ExpandVST4 - Translate VST4 pseudo instructions with QQ or QQQQ register +/// operands to real VST4 instructions with 4 D register operands. +void ARMExpandPseudo::ExpandVST4(MachineBasicBlock::iterator &MBBI, + unsigned Opc, bool hasWriteBack, + NEONRegSpacing RegSpc) { + MachineInstr &MI = *MBBI; + MachineBasicBlock &MBB = *MI.getParent(); + + MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc)); + unsigned OpIdx = 0; + if (hasWriteBack) { + bool DstIsDead = MI.getOperand(OpIdx).isDead(); + unsigned DstReg = MI.getOperand(OpIdx++).getReg(); + MIB.addReg(DstReg, getDefRegState(true) | getDeadRegState(DstIsDead)); + } + // Copy the addrmode6 operands. + bool AddrIsKill = MI.getOperand(OpIdx).isKill(); + MIB.addReg(MI.getOperand(OpIdx++).getReg(), getKillRegState(AddrIsKill)); + MIB.addImm(MI.getOperand(OpIdx++).getImm()); + if (hasWriteBack) { + // Copy the am6offset operand. + bool OffsetIsKill = MI.getOperand(OpIdx).isKill(); + MIB.addReg(MI.getOperand(OpIdx++).getReg(), getKillRegState(OffsetIsKill)); + } + + bool SrcIsKill = MI.getOperand(OpIdx).isKill(); + unsigned SrcReg = MI.getOperand(OpIdx).getReg(); + unsigned D0, D1, D2, D3; + if (RegSpc == SingleSpc) { + D0 = TRI->getSubReg(SrcReg, ARM::dsub_0); + D1 = TRI->getSubReg(SrcReg, ARM::dsub_1); + D2 = TRI->getSubReg(SrcReg, ARM::dsub_2); + D3 = TRI->getSubReg(SrcReg, ARM::dsub_3); + } else if (RegSpc == EvenDblSpc) { + D0 = TRI->getSubReg(SrcReg, ARM::dsub_0); + D1 = TRI->getSubReg(SrcReg, ARM::dsub_2); + D2 = TRI->getSubReg(SrcReg, ARM::dsub_4); + D3 = TRI->getSubReg(SrcReg, ARM::dsub_6); + } else { + assert(RegSpc == OddDblSpc && "unknown register spacing for VST4"); + D0 = TRI->getSubReg(SrcReg, ARM::dsub_1); + D1 = TRI->getSubReg(SrcReg, ARM::dsub_3); + D2 = TRI->getSubReg(SrcReg, ARM::dsub_5); + D3 = TRI->getSubReg(SrcReg, ARM::dsub_7); + } + + MIB.addReg(D0, getKillRegState(SrcIsKill)) + .addReg(D1, getKillRegState(SrcIsKill)) + .addReg(D2, getKillRegState(SrcIsKill)) + .addReg(D3, getKillRegState(SrcIsKill)); + MIB = AddDefaultPred(MIB); + TransferImpOps(MI, MIB, MIB); + MI.eraseFromParent(); +} + bool ARMExpandPseudo::ExpandMBB(MachineBasicBlock &MBB) { bool Modified = false; @@ -71,9 +135,13 @@ MachineInstr &MI = *MBBI; MachineBasicBlock::iterator NMBBI = llvm::next(MBBI); + bool ModifiedOp = true; unsigned Opcode = MI.getOpcode(); switch (Opcode) { - default: break; + default: + ModifiedOp = false; + break; + case ARM::tLDRpci_pic: case ARM::t2LDRpci_pic: { unsigned NewLdOpc = (Opcode == ARM::tLDRpci_pic) @@ -92,7 +160,6 @@ .addOperand(MI.getOperand(2)); TransferImpOps(MI, MIB1, MIB2); MI.eraseFromParent(); - Modified = true; break; } @@ -128,7 +195,6 @@ HI16.addImm(Pred).addReg(PredReg); TransferImpOps(MI, LO16, HI16); MI.eraseFromParent(); - Modified = true; break; } @@ -155,9 +221,37 @@ .addReg(OddSrc, getKillRegState(SrcIsKill))); TransferImpOps(MI, Even, Odd); MI.eraseFromParent(); - Modified = true; } + + case ARM::VST4d8Pseudo: + ExpandVST4(MBBI, ARM::VST4d8, false, SingleSpc); break; + case ARM::VST4d16Pseudo: + ExpandVST4(MBBI, ARM::VST4d16, false, SingleSpc); break; + case ARM::VST4d32Pseudo: + ExpandVST4(MBBI, ARM::VST4d32, false, SingleSpc); break; + case ARM::VST4d8Pseudo_UPD: + ExpandVST4(MBBI, ARM::VST4d8_UPD, true, SingleSpc); break; + case ARM::VST4d16Pseudo_UPD: + ExpandVST4(MBBI, ARM::VST4d16_UPD, true, SingleSpc); break; + case ARM::VST4d32Pseudo_UPD: + ExpandVST4(MBBI, ARM::VST4d32_UPD, true, SingleSpc); break; + case ARM::VST4q8Pseudo_UPD: + ExpandVST4(MBBI, ARM::VST4q8_UPD, true, EvenDblSpc); break; + case ARM::VST4q16Pseudo_UPD: + ExpandVST4(MBBI, ARM::VST4q16_UPD, true, EvenDblSpc); break; + case ARM::VST4q32Pseudo_UPD: + ExpandVST4(MBBI, ARM::VST4q32_UPD, true, EvenDblSpc); break; + case ARM::VST4q8oddPseudo_UPD: + ExpandVST4(MBBI, ARM::VST4q8_UPD, true, OddDblSpc); break; + case ARM::VST4q16oddPseudo_UPD: + ExpandVST4(MBBI, ARM::VST4q16_UPD, true, OddDblSpc); break; + case ARM::VST4q32oddPseudo_UPD: + ExpandVST4(MBBI, ARM::VST4q32_UPD, true, OddDblSpc); break; + break; } + + if (ModifiedOp) + Modified = true; MBBI = NMBBI; } Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp?rev=112108&r1=112107&r2=112108&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp Wed Aug 25 18:27:42 2010 @@ -1260,6 +1260,11 @@ Ops.push_back(MemAddr); Ops.push_back(Align); + // FIXME: This is a temporary flag to distinguish VSTs that have been + // converted to pseudo instructions. + bool usePseudoInstrs = (NumVecs == 4 && + VT.getSimpleVT().SimpleTy != MVT::v1i64); + if (is64BitVector) { if (NumVecs >= 2) { SDValue RegSeq; @@ -1278,6 +1283,9 @@ : N->getOperand(3+3); RegSeq = SDValue(QuadDRegs(MVT::v4i64, V0, V1, V2, V3), 0); } + if (usePseudoInstrs) + Ops.push_back(RegSeq); + else { // Now extract the D registers back out. Ops.push_back(CurDAG->getTargetExtractSubreg(ARM::dsub_0, dl, VT, @@ -1290,15 +1298,16 @@ if (NumVecs > 3) Ops.push_back(CurDAG->getTargetExtractSubreg(ARM::dsub_3, dl, VT, RegSeq)); + } } else { - for (unsigned Vec = 0; Vec < NumVecs; ++Vec) - Ops.push_back(N->getOperand(Vec+3)); + Ops.push_back(N->getOperand(3)); } Ops.push_back(Pred); Ops.push_back(Reg0); // predicate register Ops.push_back(Chain); unsigned Opc = DOpcodes[OpcodeIndex]; - return CurDAG->getMachineNode(Opc, dl, MVT::Other, Ops.data(), NumVecs+5); + return CurDAG->getMachineNode(Opc, dl, MVT::Other, Ops.data(), + usePseudoInstrs ? 6 : NumVecs+5); } EVT RegVT = GetNEONSubregVT(VT); @@ -1363,6 +1372,9 @@ // Store the even D registers. assert(ARM::dsub_7 == ARM::dsub_0+7 && "Unexpected subreg numbering"); Ops.push_back(Reg0); // post-access address offset + if (usePseudoInstrs) + Ops.push_back(RegSeq); + else for (unsigned Vec = 0; Vec < NumVecs; ++Vec) Ops.push_back(CurDAG->getTargetExtractSubreg(ARM::dsub_0+Vec*2, dl, RegVT, RegSeq)); @@ -1371,18 +1383,24 @@ Ops.push_back(Chain); unsigned Opc = QOpcodes0[OpcodeIndex]; SDNode *VStA = CurDAG->getMachineNode(Opc, dl, MemAddr.getValueType(), - MVT::Other, Ops.data(), NumVecs+6); + MVT::Other, Ops.data(), + usePseudoInstrs ? 7 : NumVecs+6); Chain = SDValue(VStA, 1); // Store the odd D registers. Ops[0] = SDValue(VStA, 0); // MemAddr + if (usePseudoInstrs) + Ops[6] = Chain; + else { for (unsigned Vec = 0; Vec < NumVecs; ++Vec) Ops[Vec+3] = CurDAG->getTargetExtractSubreg(ARM::dsub_1+Vec*2, dl, RegVT, RegSeq); Ops[NumVecs+5] = Chain; + } Opc = QOpcodes1[OpcodeIndex]; SDNode *VStB = CurDAG->getMachineNode(Opc, dl, MemAddr.getValueType(), - MVT::Other, Ops.data(), NumVecs+6); + MVT::Other, Ops.data(), + usePseudoInstrs ? 7 : NumVecs+6); Chain = SDValue(VStB, 1); ReplaceUses(SDValue(N, 0), Chain); return NULL; @@ -2312,14 +2330,14 @@ } case Intrinsic::arm_neon_vst4: { - unsigned DOpcodes[] = { ARM::VST4d8, ARM::VST4d16, - ARM::VST4d32, ARM::VST1d64Q }; - unsigned QOpcodes0[] = { ARM::VST4q8_UPD, - ARM::VST4q16_UPD, - ARM::VST4q32_UPD }; - unsigned QOpcodes1[] = { ARM::VST4q8odd_UPD, - ARM::VST4q16odd_UPD, - ARM::VST4q32odd_UPD }; + unsigned DOpcodes[] = { ARM::VST4d8Pseudo, ARM::VST4d16Pseudo, + ARM::VST4d32Pseudo, ARM::VST1d64Q }; + unsigned QOpcodes0[] = { ARM::VST4q8Pseudo_UPD, + ARM::VST4q16Pseudo_UPD, + ARM::VST4q32Pseudo_UPD }; + unsigned QOpcodes1[] = { ARM::VST4q8oddPseudo_UPD, + ARM::VST4q16oddPseudo_UPD, + ARM::VST4q32oddPseudo_UPD }; return SelectVST(N, 4, DOpcodes, QOpcodes0, QOpcodes1); } Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=112108&r1=112107&r2=112108&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Wed Aug 25 18:27:42 2010 @@ -1534,6 +1534,14 @@ let Inst{7-4} = op7_4; } +class PseudoNLdSt + : InstARM { + let OutOperandList = oops; + let InOperandList = !con(iops, (ins pred:$p)); + list Predicates = [HasNEON]; +} + class NDataI pattern> : NeonI; +class VSTQQWBPseudo + : PseudoNLdSt<(outs GPR:$wb), + (ins addrmode6:$addr, am6offset:$offset, QQPR:$src), IIC_VST, + "$addr.addr = $wb">; +class VSTQQQQWBPseudo + : PseudoNLdSt<(outs GPR:$wb), + (ins addrmode6:$addr, am6offset:$offset, QQQQPR:$src), IIC_VST, + "$addr.addr = $wb">; + // VST1 : Vector Store (multiple single elements) class VST1D op7_4, string Dt> : NLdSt<0,0b00,0b0111,op7_4, (outs), (ins addrmode6:$addr, DPR:$src), IIC_VST, @@ -664,6 +677,10 @@ def VST4d16 : VST4D<0b0000, 0b0100, "16">; def VST4d32 : VST4D<0b0000, 0b1000, "32">; +def VST4d8Pseudo : VSTQQPseudo; +def VST4d16Pseudo : VSTQQPseudo; +def VST4d32Pseudo : VSTQQPseudo; + // ...with address register writeback: class VST4DWB op11_8, bits<4> op7_4, string Dt> : NLdSt<0, 0b00, op11_8, op7_4, (outs GPR:$wb), @@ -676,6 +693,10 @@ def VST4d16_UPD : VST4DWB<0b0000, 0b0100, "16">; def VST4d32_UPD : VST4DWB<0b0000, 0b1000, "32">; +def VST4d8Pseudo_UPD : VSTQQWBPseudo; +def VST4d16Pseudo_UPD : VSTQQWBPseudo; +def VST4d32Pseudo_UPD : VSTQQWBPseudo; + // ...with double-spaced registers (non-updating versions for disassembly only): def VST4q8 : VST4D<0b0001, 0b0000, "8">; def VST4q16 : VST4D<0b0001, 0b0100, "16">; @@ -684,10 +705,14 @@ def VST4q16_UPD : VST4DWB<0b0001, 0b0100, "16">; def VST4q32_UPD : VST4DWB<0b0001, 0b1000, "32">; +def VST4q8Pseudo_UPD : VSTQQQQWBPseudo; +def VST4q16Pseudo_UPD : VSTQQQQWBPseudo; +def VST4q32Pseudo_UPD : VSTQQQQWBPseudo; + // ...alternate versions to be allocated odd register numbers: -def VST4q8odd_UPD : VST4DWB<0b0001, 0b0000, "8">; -def VST4q16odd_UPD : VST4DWB<0b0001, 0b0100, "16">; -def VST4q32odd_UPD : VST4DWB<0b0001, 0b1000, "32">; +def VST4q8oddPseudo_UPD : VSTQQQQWBPseudo; +def VST4q16oddPseudo_UPD : VSTQQQQWBPseudo; +def VST4q32oddPseudo_UPD : VSTQQQQWBPseudo; // VST1LN : Vector Store (single element from one lane) // FIXME: Not yet implemented. Modified: llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp?rev=112108&r1=112107&r2=112108&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp (original) +++ llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp Wed Aug 25 18:27:42 2010 @@ -260,9 +260,6 @@ Stride = 2; return true; - case ARM::VST4d8: - case ARM::VST4d16: - case ARM::VST4d32: case ARM::VST1d64Q: case ARM::VST4LNd8: case ARM::VST4LNd16: @@ -271,24 +268,6 @@ NumRegs = 4; return true; - case ARM::VST4q8_UPD: - case ARM::VST4q16_UPD: - case ARM::VST4q32_UPD: - FirstOpnd = 4; - NumRegs = 4; - Offset = 0; - Stride = 2; - return true; - - case ARM::VST4q8odd_UPD: - case ARM::VST4q16odd_UPD: - case ARM::VST4q32odd_UPD: - FirstOpnd = 4; - NumRegs = 4; - Offset = 1; - Stride = 2; - return true; - case ARM::VST4LNq16: case ARM::VST4LNq32: FirstOpnd = 2; From sabre at nondot.org Wed Aug 25 18:31:42 2010 From: sabre at nondot.org (Chris Lattner) Date: Wed, 25 Aug 2010 23:31:42 -0000 Subject: [llvm-commits] [llvm] r112109 - /llvm/trunk/lib/Target/X86/README-SSE.txt Message-ID: <20100825233142.4D5642A6C12C@llvm.org> Author: lattner Date: Wed Aug 25 18:31:42 2010 New Revision: 112109 URL: http://llvm.org/viewvc/llvm-project?rev=112109&view=rev Log: we should pattern match the SSE complex arithmetic ops. Modified: llvm/trunk/lib/Target/X86/README-SSE.txt Modified: llvm/trunk/lib/Target/X86/README-SSE.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README-SSE.txt?rev=112109&r1=112108&r2=112109&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/README-SSE.txt (original) +++ llvm/trunk/lib/Target/X86/README-SSE.txt Wed Aug 25 18:31:42 2010 @@ -19,6 +19,32 @@ //===---------------------------------------------------------------------===// +SSE has instructions for doing operations on complex numbers, we should pattern +match them. Compiling this: + +_Complex float f32(_Complex float A, _Complex float B) { + return A+B; +} + +into: + +_f32: + movdqa %xmm0, %xmm2 + addss %xmm1, %xmm2 + pshufd $16, %xmm2, %xmm2 + pshufd $1, %xmm1, %xmm1 + pshufd $1, %xmm0, %xmm0 + addss %xmm1, %xmm0 + pshufd $16, %xmm0, %xmm1 + movdqa %xmm2, %xmm0 + unpcklps %xmm1, %xmm0 + ret + +seems silly. + + +//===---------------------------------------------------------------------===// + Expand libm rounding functions inline: Significant speedups possible. http://gcc.gnu.org/ml/gcc-patches/2006-10/msg00909.html From gohman at apple.com Wed Aug 25 18:33:07 2010 From: gohman at apple.com (Dan Gohman) Date: Wed, 25 Aug 2010 23:33:07 -0000 Subject: [llvm-commits] [llvm] r112110 - /llvm/trunk/tools/llvm-extract/llvm-extract.cpp Message-ID: <20100825233307.5A6CC2A6C12C@llvm.org> Author: djg Date: Wed Aug 25 18:33:07 2010 New Revision: 112110 URL: http://llvm.org/viewvc/llvm-project?rev=112110&view=rev Log: Convert llvm-extract to use lazy loading. This makes it substantially faster on large modules. Modified: llvm/trunk/tools/llvm-extract/llvm-extract.cpp Modified: llvm/trunk/tools/llvm-extract/llvm-extract.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-extract/llvm-extract.cpp?rev=112110&r1=112109&r2=112110&view=diff ============================================================================== --- llvm/trunk/tools/llvm-extract/llvm-extract.cpp (original) +++ llvm/trunk/tools/llvm-extract/llvm-extract.cpp Wed Aug 25 18:33:07 2010 @@ -71,9 +71,10 @@ llvm_shutdown_obj Y; // Call llvm_shutdown() on exit. cl::ParseCommandLineOptions(argc, argv, "llvm extractor\n"); + // Use lazy loading, since we only care about selected global values. SMDiagnostic Err; std::auto_ptr M; - M.reset(ParseIRFile(InputFilename, Err, Context)); + M.reset(getLazyIRFileModule(InputFilename, Err, Context)); if (M.get() == 0) { Err.Print(argv[0], errs()); @@ -104,6 +105,18 @@ GVs.push_back(GV); } + // Materialize requisite global values. + for (size_t i = 0, e = GVs.size(); i != e; ++i) { + GlobalValue *GV = GVs[i]; + if (GV->isMaterializable()) { + std::string ErrInfo; + if (GV->Materialize(&ErrInfo)) { + errs() << argv[0] << ": error reading input: " << ErrInfo << "\n"; + return 1; + } + } + } + // In addition to deleting all other functions, we also want to spiff it // up a little bit. Do this now. PassManager Passes; From sabre at nondot.org Wed Aug 25 18:43:15 2010 From: sabre at nondot.org (Chris Lattner) Date: Wed, 25 Aug 2010 23:43:15 -0000 Subject: [llvm-commits] [llvm] r112113 - /llvm/trunk/test/CodeGen/X86/vec_cast.ll Message-ID: <20100825234315.0A4C42A6C12C@llvm.org> Author: lattner Date: Wed Aug 25 18:43:14 2010 New Revision: 112113 URL: http://llvm.org/viewvc/llvm-project?rev=112113&view=rev Log: temporarily disable this, which started failing on the llvm-i686-linux builder. I will investigate tonight. Modified: llvm/trunk/test/CodeGen/X86/vec_cast.ll Modified: llvm/trunk/test/CodeGen/X86/vec_cast.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_cast.ll?rev=112113&r1=112112&r2=112113&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/vec_cast.ll (original) +++ llvm/trunk/test/CodeGen/X86/vec_cast.ll Wed Aug 25 18:43:14 2010 @@ -1,5 +1,7 @@ -; RUN: llc < %s -march=x86-64 -; RUN: llc < %s -march=x86-64 -disable-mmx +; RUN: true +; llc < %s -march=x86-64 +; RUN: true +;llc < %s -march=x86-64 -disable-mmx define <8 x i32> @a(<8 x i16> %a) nounwind { %c = sext <8 x i16> %a to <8 x i32> From bob.wilson at apple.com Wed Aug 25 19:13:36 2010 From: bob.wilson at apple.com (Bob Wilson) Date: Thu, 26 Aug 2010 00:13:36 -0000 Subject: [llvm-commits] [llvm] r112118 - in /llvm/trunk: lib/Target/ARM/NEONPreAllocPass.cpp test/CodeGen/ARM/vld1.ll Message-ID: <20100826001336.644512A6C12C@llvm.org> Author: bwilson Date: Wed Aug 25 19:13:36 2010 New Revision: 112118 URL: http://llvm.org/viewvc/llvm-project?rev=112118&view=rev Log: Revert svn 107892 (with changes to work with trunk). It caused a crash if a VLD result was not used (Radar 8355607). It should also fix pr7988, but I haven't verified that yet. Modified: llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp llvm/trunk/test/CodeGen/ARM/vld1.ll Modified: llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp?rev=112118&r1=112117&r2=112118&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp (original) +++ llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp Wed Aug 25 19:13:36 2010 @@ -447,7 +447,34 @@ continue; if (FormsRegSequence(MI, FirstOpnd, NumRegs, Offset, Stride)) continue; - llvm_unreachable("expected a REG_SEQUENCE"); + + MachineBasicBlock::iterator NextI = llvm::next(MBBI); + for (unsigned R = 0; R < NumRegs; ++R) { + MachineOperand &MO = MI->getOperand(FirstOpnd + R); + assert(MO.isReg() && MO.getSubReg() == 0 && "unexpected operand"); + unsigned VirtReg = MO.getReg(); + assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && + "expected a virtual register"); + + // For now, just assign a fixed set of adjacent registers. + // This leaves plenty of room for future improvements. + static const unsigned NEONDRegs[] = { + ARM::D0, ARM::D1, ARM::D2, ARM::D3, + ARM::D4, ARM::D5, ARM::D6, ARM::D7 + }; + MO.setReg(NEONDRegs[Offset + R * Stride]); + + if (MO.isUse()) { + // Insert a copy from VirtReg. + BuildMI(MBB, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY),MO.getReg()) + .addReg(VirtReg, getKillRegState(MO.isKill())); + MO.setIsKill(); + } else if (MO.isDef() && !MO.isDead()) { + // Add a copy to VirtReg. + BuildMI(MBB, NextI, DebugLoc(), TII->get(TargetOpcode::COPY), VirtReg) + .addReg(MO.getReg()); + } + } } return Modified; Modified: llvm/trunk/test/CodeGen/ARM/vld1.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vld1.ll?rev=112118&r1=112117&r2=112118&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/vld1.ll (original) +++ llvm/trunk/test/CodeGen/ARM/vld1.ll Wed Aug 25 19:13:36 2010 @@ -89,3 +89,17 @@ declare <4 x i32> @llvm.arm.neon.vld1.v4i32(i8*) nounwind readonly declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*) nounwind readonly declare <2 x i64> @llvm.arm.neon.vld1.v2i64(i8*) nounwind readonly + +; Radar 8355607 +; Do not crash if the vld1 result is not used. +define void @unused_vld1_result() { +entry: +;CHECK: unused_vld1_result +;CHECK: vld1.32 + %0 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef) + call void @llvm.trap() + unreachable +} + +declare void @llvm.trap() nounwind + From gohman at apple.com Wed Aug 25 19:22:55 2010 From: gohman at apple.com (Dan Gohman) Date: Thu, 26 Aug 2010 00:22:55 -0000 Subject: [llvm-commits] [llvm] r112120 - in /llvm/trunk: include/llvm/Transforms/IPO.h lib/Transforms/IPO/ExtractGV.cpp tools/llvm-extract/llvm-extract.cpp Message-ID: <20100826002255.51A942A6C12C@llvm.org> Author: djg Date: Wed Aug 25 19:22:55 2010 New Revision: 112120 URL: http://llvm.org/viewvc/llvm-project?rev=112120&view=rev Log: Rewrite ExtractGV, removing a bunch of stuff that didn't fully work, and was over-complicated, and replacing it with a simple implementation. Modified: llvm/trunk/include/llvm/Transforms/IPO.h llvm/trunk/lib/Transforms/IPO/ExtractGV.cpp llvm/trunk/tools/llvm-extract/llvm-extract.cpp Modified: llvm/trunk/include/llvm/Transforms/IPO.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Transforms/IPO.h?rev=112120&r1=112119&r2=112120&view=diff ============================================================================== --- llvm/trunk/include/llvm/Transforms/IPO.h (original) +++ llvm/trunk/include/llvm/Transforms/IPO.h Wed Aug 25 19:22:55 2010 @@ -93,8 +93,7 @@ /// possible, except for the global values specified. /// ModulePass *createGVExtractionPass(std::vector& GVs, bool - deleteFn = false, - bool relinkCallees = false); + deleteFn = false); //===----------------------------------------------------------------------===// /// createFunctionInliningPass - Return a new pass object that uses a heuristic Modified: llvm/trunk/lib/Transforms/IPO/ExtractGV.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/ExtractGV.cpp?rev=112120&r1=112119&r2=112120&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/ExtractGV.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/ExtractGV.cpp Wed Aug 25 19:22:55 2010 @@ -17,15 +17,15 @@ #include "llvm/Pass.h" #include "llvm/Constants.h" #include "llvm/Transforms/IPO.h" +#include "llvm/ADT/SetVector.h" #include using namespace llvm; namespace { /// @brief A pass to extract specific functions and their dependencies. class GVExtractorPass : public ModulePass { - std::vector Named; + SetVector Named; bool deleteStuff; - bool reLink; public: static char ID; // Pass identification, replacement for typeid @@ -33,134 +33,41 @@ /// specified function. Otherwise, it deletes as much of the module as /// possible, except for the function specified. /// - explicit GVExtractorPass(std::vector& GVs, bool deleteS = true, - bool relinkCallees = false) - : ModulePass(ID), Named(GVs), deleteStuff(deleteS), - reLink(relinkCallees) {} + explicit GVExtractorPass(std::vector& GVs, bool deleteS = true) + : ModulePass(ID), Named(GVs.begin(), GVs.end()), deleteStuff(deleteS) {} bool runOnModule(Module &M) { - if (Named.size() == 0) { - return false; // Nothing to extract - } - - - if (deleteStuff) - return deleteGV(); - M.setModuleInlineAsm(""); - return isolateGV(M); - } - - bool deleteGV() { - for (std::vector::iterator GI = Named.begin(), - GE = Named.end(); GI != GE; ++GI) { - if (Function* NamedFunc = dyn_cast(*GI)) { - // If we're in relinking mode, set linkage of all internal callees to - // external. This will allow us extract function, and then - link - // everything together - if (reLink) { - for (Function::iterator B = NamedFunc->begin(), BE = NamedFunc->end(); - B != BE; ++B) { - for (BasicBlock::iterator I = B->begin(), E = B->end(); - I != E; ++I) { - if (CallInst* callInst = dyn_cast(&*I)) { - Function* Callee = callInst->getCalledFunction(); - if (Callee && Callee->hasLocalLinkage()) - Callee->setLinkage(GlobalValue::ExternalLinkage); - } - } - } - } - - NamedFunc->setLinkage(GlobalValue::ExternalLinkage); - NamedFunc->deleteBody(); - assert(NamedFunc->isDeclaration() && "This didn't make the function external!"); - } else { - if (!(*GI)->isDeclaration()) { - cast(*GI)->setInitializer(0); //clear the initializer - (*GI)->setLinkage(GlobalValue::ExternalLinkage); - } - } - } - return true; - } - - bool isolateGV(Module &M) { - // Mark all globals internal - // FIXME: what should we do with private linkage? - for (Module::global_iterator I = M.global_begin(), E = M.global_end(); I != E; ++I) + // Visit the global inline asm. + if (!deleteStuff) + M.setModuleInlineAsm(""); + + // For simplicity, just give all GlobalValues ExternalLinkage. A trickier + // implementation could figure out which GlobalValues are actually + // referenced by the Named set, and which GlobalValues in the rest of + // the module are referenced by the NamedSet, and get away with leaving + // more internal and private things internal and private. But for now, + // be conservative and simple. + + // Visit the GlobalVariables. + for (Module::global_iterator I = M.global_begin(), E = M.global_end(); + I != E; ++I) if (!I->isDeclaration()) { - I->setLinkage(GlobalValue::InternalLinkage); + if (I->hasLocalLinkage()) + I->setVisibility(GlobalValue::HiddenVisibility); + I->setLinkage(GlobalValue::ExternalLinkage); + if (deleteStuff == Named.count(I)) + I->setInitializer(0); } + + // Visit the Functions. for (Module::iterator I = M.begin(), E = M.end(); I != E; ++I) if (!I->isDeclaration()) { - I->setLinkage(GlobalValue::InternalLinkage); - } - - // Make sure our result is globally accessible... - // by putting them in the used array - { - std::vector AUGs; - const Type *SBP= - Type::getInt8PtrTy(M.getContext()); - for (std::vector::iterator GI = Named.begin(), - GE = Named.end(); GI != GE; ++GI) { - (*GI)->setLinkage(GlobalValue::ExternalLinkage); - AUGs.push_back(ConstantExpr::getBitCast(*GI, SBP)); + if (I->hasLocalLinkage()) + I->setVisibility(GlobalValue::HiddenVisibility); + I->setLinkage(GlobalValue::ExternalLinkage); + if (deleteStuff == Named.count(I)) + I->deleteBody(); } - ArrayType *AT = ArrayType::get(SBP, AUGs.size()); - Constant *Init = ConstantArray::get(AT, AUGs); - GlobalValue *gv = new GlobalVariable(M, AT, false, - GlobalValue::AppendingLinkage, - Init, "llvm.used"); - gv->setSection("llvm.metadata"); - } - - // All of the functions may be used by global variables or the named - // globals. Loop through them and create a new, external functions that - // can be "used", instead of ones with bodies. - std::vector NewFunctions; - - Function *Last = --M.end(); // Figure out where the last real fn is. - - for (Module::iterator I = M.begin(); ; ++I) { - if (std::find(Named.begin(), Named.end(), &*I) == Named.end()) { - Function *New = Function::Create(I->getFunctionType(), - GlobalValue::ExternalLinkage); - New->copyAttributesFrom(I); - - // If it's not the named function, delete the body of the function - I->dropAllReferences(); - - M.getFunctionList().push_back(New); - NewFunctions.push_back(New); - New->takeName(I); - } - - if (&*I == Last) break; // Stop after processing the last function - } - - // Now that we have replacements all set up, loop through the module, - // deleting the old functions, replacing them with the newly created - // functions. - if (!NewFunctions.empty()) { - unsigned FuncNum = 0; - Module::iterator I = M.begin(); - do { - if (std::find(Named.begin(), Named.end(), &*I) == Named.end()) { - // Make everything that uses the old function use the new dummy fn - I->replaceAllUsesWith(NewFunctions[FuncNum++]); - - Function *Old = I; - ++I; // Move the iterator to the new function - - // Delete the old function! - M.getFunctionList().erase(Old); - - } else { - ++I; // Skip the function we are extracting - } - } while (&*I != NewFunctions[0]); - } return true; } @@ -170,6 +77,6 @@ } ModulePass *llvm::createGVExtractionPass(std::vector& GVs, - bool deleteFn, bool relinkCallees) { - return new GVExtractorPass(GVs, deleteFn, relinkCallees); + bool deleteFn) { + return new GVExtractorPass(GVs, deleteFn); } Modified: llvm/trunk/tools/llvm-extract/llvm-extract.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-extract/llvm-extract.cpp?rev=112120&r1=112119&r2=112120&view=diff ============================================================================== --- llvm/trunk/tools/llvm-extract/llvm-extract.cpp (original) +++ llvm/trunk/tools/llvm-extract/llvm-extract.cpp Wed Aug 25 19:22:55 2010 @@ -44,10 +44,6 @@ static cl::opt DeleteFn("delete", cl::desc("Delete specified Globals from Module")); -static cl::opt -Relink("relink", - cl::desc("Turn external linkage for callees of function to delete")); - // ExtractFuncs - The functions to extract from the module... static cl::list ExtractFuncs("func", cl::desc("Specify function to extract"), @@ -122,7 +118,7 @@ PassManager Passes; Passes.add(new TargetData(M.get())); // Use correct TargetData - Passes.add(createGVExtractionPass(GVs, DeleteFn, Relink)); + Passes.add(createGVExtractionPass(GVs, DeleteFn)); if (!DeleteFn) Passes.add(createGlobalDCEPass()); // Delete unreachable globals Passes.add(createStripDeadDebugInfoPass()); // Remove dead debug info From eli.friedman at gmail.com Wed Aug 25 19:56:46 2010 From: eli.friedman at gmail.com (Eli Friedman) Date: Wed, 25 Aug 2010 17:56:46 -0700 Subject: [llvm-commits] [llvm] r112109 - /llvm/trunk/lib/Target/X86/README-SSE.txt In-Reply-To: <20100825233142.4D5642A6C12C@llvm.org> References: <20100825233142.4D5642A6C12C@llvm.org> Message-ID: On Wed, Aug 25, 2010 at 4:31 PM, Chris Lattner wrote: > +SSE has instructions for doing operations on complex numbers, we should pattern > +match them. ?Compiling this: > + > +_Complex float f32(_Complex float A, _Complex float B) { > + ?return A+B; > +} > + > +into: > + > +_f32: > + ? ? ? movdqa ?%xmm0, %xmm2 > + ? ? ? addss ? %xmm1, %xmm2 > + ? ? ? pshufd ?$16, %xmm2, %xmm2 > + ? ? ? pshufd ?$1, %xmm1, %xmm1 > + ? ? ? pshufd ?$1, %xmm0, %xmm0 > + ? ? ? addss ? %xmm1, %xmm0 > + ? ? ? pshufd ?$16, %xmm0, %xmm1 > + ? ? ? movdqa ?%xmm2, %xmm0 > + ? ? ? unpcklps ? ? ? ?%xmm1, %xmm0 > + ? ? ? ret > + > +seems silly. Err, just checking: you're suggesting this should turn into an addps? This seems like just "we don't have a straight-line vectorization pass". -Eli From grosbach at apple.com Wed Aug 25 19:58:06 2010 From: grosbach at apple.com (Jim Grosbach) Date: Thu, 26 Aug 2010 00:58:06 -0000 Subject: [llvm-commits] [llvm] r112127 - in /llvm/trunk: lib/Target/ARM/ARMBaseRegisterInfo.cpp test/CodeGen/Thumb/large-stack.ll Message-ID: <20100826005806.980B72A6C12C@llvm.org> Author: grosbach Date: Wed Aug 25 19:58:06 2010 New Revision: 112127 URL: http://llvm.org/viewvc/llvm-project?rev=112127&view=rev Log: Enable pre-RA virtual frame base register allocation. rdar://8277890 Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp llvm/trunk/test/CodeGen/Thumb/large-stack.ll Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp?rev=112127&r1=112126&r2=112127&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Wed Aug 25 19:58:06 2010 @@ -47,7 +47,7 @@ ForceAllBaseRegAlloc("arm-force-base-reg-alloc", cl::Hidden, cl::init(false), cl::desc("Force use of virtual base registers for stack load/store")); static cl::opt -EnableLocalStackAlloc("enable-local-stack-alloc", cl::init(false), cl::Hidden, +EnableLocalStackAlloc("enable-local-stack-alloc", cl::init(true), cl::Hidden, cl::desc("Enable pre-regalloc stack frame index allocation")); } Modified: llvm/trunk/test/CodeGen/Thumb/large-stack.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb/large-stack.ll?rev=112127&r1=112126&r2=112127&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb/large-stack.ll (original) +++ llvm/trunk/test/CodeGen/Thumb/large-stack.ll Wed Aug 25 19:58:06 2010 @@ -20,8 +20,8 @@ define i32 @test3() { ; CHECK: test3: -; CHECK: ldr r1, LCPI -; CHECK: add sp, r1 +; CHECK: ldr r2, LCPI +; CHECK: add sp, r2 ; CHECK: ldr r1, LCPI ; CHECK: add r1, sp ; CHECK: mov sp, r7 From bruno.cardoso at gmail.com Wed Aug 25 20:02:53 2010 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Thu, 26 Aug 2010 01:02:53 -0000 Subject: [llvm-commits] [llvm] r112128 - in /llvm/trunk/lib/Target/X86: X86InstrInfo.h X86MCCodeEmitter.cpp Message-ID: <20100826010253.C45DA2A6C12C@llvm.org> Author: bruno Date: Wed Aug 25 20:02:53 2010 New Revision: 112128 URL: http://llvm.org/viewvc/llvm-project?rev=112128&view=rev Log: Fix PR7748 without using microsoft extensions Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.h llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.h?rev=112128&r1=112127&r2=112128&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.h (original) +++ llvm/trunk/lib/Target/X86/X86InstrInfo.h Wed Aug 25 20:02:53 2010 @@ -445,27 +445,27 @@ //===------------------------------------------------------------------===// // VEX - The opcode prefix used by AVX instructions - VEX = 1ULL << 32, + VEX = 1U << 0, // VEX_W - Has a opcode specific functionality, but is used in the same // way as REX_W is for regular SSE instructions. - VEX_W = 1ULL << 33, + VEX_W = 1U << 1, // VEX_4V - Used to specify an additional AVX/SSE register. Several 2 // address instructions in SSE are represented as 3 address ones in AVX // and the additional register is encoded in VEX_VVVV prefix. - VEX_4V = 1ULL << 34, + VEX_4V = 1U << 2, // VEX_I8IMM - Specifies that the last register used in a AVX instruction, // must be encoded in the i8 immediate field. This usually happens in // instructions with 4 operands. - VEX_I8IMM = 1ULL << 35, + VEX_I8IMM = 1U << 3, // VEX_L - Stands for a bit in the VEX opcode prefix meaning the current // instruction uses 256-bit wide registers. This is usually auto detected if // a VR256 register is used, but some AVX instructions also have this field // marked when using a f256 memory references. - VEX_L = 1ULL << 36 + VEX_L = 1U << 4 }; // getBaseOpcodeFor - This function returns the "base" X86 opcode for the @@ -533,7 +533,7 @@ case X86II::MRMDestMem: return 0; case X86II::MRMSrcMem: { - bool HasVEX_4V = TSFlags & X86II::VEX_4V; + bool HasVEX_4V = (TSFlags >> 32) & X86II::VEX_4V; unsigned FirstMemOp = 1; if (HasVEX_4V) ++FirstMemOp;// Skip the register source (which is encoded in VEX_VVVV). Modified: llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp?rev=112128&r1=112127&r2=112128&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp Wed Aug 25 20:02:53 2010 @@ -365,7 +365,7 @@ const TargetInstrDesc &Desc, raw_ostream &OS) const { bool HasVEX_4V = false; - if (TSFlags & X86II::VEX_4V) + if ((TSFlags >> 32) & X86II::VEX_4V) HasVEX_4V = true; // VEX_R: opcode externsion equivalent to REX.R in @@ -429,10 +429,10 @@ if (TSFlags & X86II::OpSize) VEX_PP = 0x01; - if (TSFlags & X86II::VEX_W) + if ((TSFlags >> 32) & X86II::VEX_W) VEX_W = 1; - if (TSFlags & X86II::VEX_L) + if ((TSFlags >> 32) & X86II::VEX_L) VEX_L = 1; switch (TSFlags & X86II::Op0Mask) { @@ -501,7 +501,7 @@ // If the last register should be encoded in the immediate field // do not use any bit from VEX prefix to this register, ignore it - if (TSFlags & X86II::VEX_I8IMM) + if ((TSFlags >> 32) & X86II::VEX_I8IMM) NumOps--; for (; CurOp != NumOps; ++CurOp) { @@ -801,9 +801,9 @@ // It uses the VEX.VVVV field? bool HasVEX_4V = false; - if (TSFlags & X86II::VEX) + if ((TSFlags >> 32) & X86II::VEX) HasVEXPrefix = true; - if (TSFlags & X86II::VEX_4V) + if ((TSFlags >> 32) & X86II::VEX_4V) HasVEX_4V = true; // Determine where the memory operand starts, if present. @@ -955,7 +955,7 @@ if (CurOp != NumOps) { // The last source register of a 4 operand instruction in AVX is encoded // in bits[7:4] of a immediate byte, and bits[3:0] are ignored. - if (TSFlags & X86II::VEX_I8IMM) { + if ((TSFlags >> 32) & X86II::VEX_I8IMM) { const MCOperand &MO = MI.getOperand(CurOp++); bool IsExtReg = X86InstrInfo::isX86_64ExtendedReg(MO.getReg()); From bruno.cardoso at gmail.com Wed Aug 25 20:07:20 2010 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Wed, 25 Aug 2010 18:07:20 -0700 Subject: [llvm-commits] [llvm] r112128 - in /llvm/trunk/lib/Target/X86: X86InstrInfo.h X86MCCodeEmitter.cpp In-Reply-To: <20100826010253.C45DA2A6C12C@llvm.org> References: <20100826010253.C45DA2A6C12C@llvm.org> Message-ID: Forgot to mention, patch by Dimitry Andric! On Wed, Aug 25, 2010 at 6:02 PM, Bruno Cardoso Lopes wrote: > Author: bruno > Date: Wed Aug 25 20:02:53 2010 > New Revision: 112128 > > URL: http://llvm.org/viewvc/llvm-project?rev=112128&view=rev > Log: > Fix PR7748 without using microsoft extensions > > Modified: > ? ?llvm/trunk/lib/Target/X86/X86InstrInfo.h > ? ?llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp > > Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.h > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.h?rev=112128&r1=112127&r2=112128&view=diff > ============================================================================== > --- llvm/trunk/lib/Target/X86/X86InstrInfo.h (original) > +++ llvm/trunk/lib/Target/X86/X86InstrInfo.h Wed Aug 25 20:02:53 2010 > @@ -445,27 +445,27 @@ > > ? ? //===------------------------------------------------------------------===// > ? ? // VEX - The opcode prefix used by AVX instructions > - ? ?VEX ? ? ? ? = 1ULL << 32, > + ? ?VEX ? ? ? ? = 1U << 0, > > ? ? // VEX_W - Has a opcode specific functionality, but is used in the same > ? ? // way as REX_W is for regular SSE instructions. > - ? ?VEX_W ? ? ? = 1ULL << 33, > + ? ?VEX_W ? ? ? = 1U << 1, > > ? ? // VEX_4V - Used to specify an additional AVX/SSE register. Several 2 > ? ? // address instructions in SSE are represented as 3 address ones in AVX > ? ? // and the additional register is encoded in VEX_VVVV prefix. > - ? ?VEX_4V ? ? ?= 1ULL << 34, > + ? ?VEX_4V ? ? ?= 1U << 2, > > ? ? // VEX_I8IMM - Specifies that the last register used in a AVX instruction, > ? ? // must be encoded in the i8 immediate field. This usually happens in > ? ? // instructions with 4 operands. > - ? ?VEX_I8IMM ? = 1ULL << 35, > + ? ?VEX_I8IMM ? = 1U << 3, > > ? ? // VEX_L - Stands for a bit in the VEX opcode prefix meaning the current > ? ? // instruction uses 256-bit wide registers. This is usually auto detected if > ? ? // a VR256 register is used, but some AVX instructions also have this field > ? ? // marked when using a f256 memory references. > - ? ?VEX_L ? ? ? = 1ULL << 36 > + ? ?VEX_L ? ? ? = 1U << 4 > ? }; > > ? // getBaseOpcodeFor - This function returns the "base" X86 opcode for the > @@ -533,7 +533,7 @@ > ? ? case X86II::MRMDestMem: > ? ? ? return 0; > ? ? case X86II::MRMSrcMem: { > - ? ? ?bool HasVEX_4V = TSFlags & X86II::VEX_4V; > + ? ? ?bool HasVEX_4V = (TSFlags >> 32) & X86II::VEX_4V; > ? ? ? unsigned FirstMemOp = 1; > ? ? ? if (HasVEX_4V) > ? ? ? ? ++FirstMemOp;// Skip the register source (which is encoded in VEX_VVVV). > > Modified: llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp?rev=112128&r1=112127&r2=112128&view=diff > ============================================================================== > --- llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp (original) > +++ llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp Wed Aug 25 20:02:53 2010 > @@ -365,7 +365,7 @@ > ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?const TargetInstrDesc &Desc, > ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?raw_ostream &OS) const { > ? bool HasVEX_4V = false; > - ?if (TSFlags & X86II::VEX_4V) > + ?if ((TSFlags >> 32) & X86II::VEX_4V) > ? ? HasVEX_4V = true; > > ? // VEX_R: opcode externsion equivalent to REX.R in > @@ -429,10 +429,10 @@ > ? if (TSFlags & X86II::OpSize) > ? ? VEX_PP = 0x01; > > - ?if (TSFlags & X86II::VEX_W) > + ?if ((TSFlags >> 32) & X86II::VEX_W) > ? ? VEX_W = 1; > > - ?if (TSFlags & X86II::VEX_L) > + ?if ((TSFlags >> 32) & X86II::VEX_L) > ? ? VEX_L = 1; > > ? switch (TSFlags & X86II::Op0Mask) { > @@ -501,7 +501,7 @@ > > ? ? // If the last register should be encoded in the immediate field > ? ? // do not use any bit from VEX prefix to this register, ignore it > - ? ?if (TSFlags & X86II::VEX_I8IMM) > + ? ?if ((TSFlags >> 32) & X86II::VEX_I8IMM) > ? ? ? NumOps--; > > ? ? for (; CurOp != NumOps; ++CurOp) { > @@ -801,9 +801,9 @@ > ? // It uses the VEX.VVVV field? > ? bool HasVEX_4V = false; > > - ?if (TSFlags & X86II::VEX) > + ?if ((TSFlags >> 32) & X86II::VEX) > ? ? HasVEXPrefix = true; > - ?if (TSFlags & X86II::VEX_4V) > + ?if ((TSFlags >> 32) & X86II::VEX_4V) > ? ? HasVEX_4V = true; > > ? // Determine where the memory operand starts, if present. > @@ -955,7 +955,7 @@ > ? if (CurOp != NumOps) { > ? ? // The last source register of a 4 operand instruction in AVX is encoded > ? ? // in bits[7:4] of a immediate byte, and bits[3:0] are ignored. > - ? ?if (TSFlags & X86II::VEX_I8IMM) { > + ? ?if ((TSFlags >> 32) & X86II::VEX_I8IMM) { > ? ? ? const MCOperand &MO = MI.getOperand(CurOp++); > ? ? ? bool IsExtReg = > ? ? ? ? X86InstrInfo::isX86_64ExtendedReg(MO.getReg()); > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > -- Bruno Cardoso Lopes http://www.brunocardoso.cc From wdietz2 at illinois.edu Wed Aug 25 20:07:19 2010 From: wdietz2 at illinois.edu (Will Dietz) Date: Thu, 26 Aug 2010 01:07:19 -0000 Subject: [llvm-commits] [poolalloc] r112129 - /poolalloc/trunk/test/TEST.dsgraph.Makefile Message-ID: <20100826010719.685322A6C12C@llvm.org> Author: wdietz2 Date: Wed Aug 25 20:07:19 2010 New Revision: 112129 URL: http://llvm.org/viewvc/llvm-project?rev=112129&view=rev Log: Run opt with 'RunToolSafely' so memory limits work on non-mac architectures. Modified: poolalloc/trunk/test/TEST.dsgraph.Makefile Modified: poolalloc/trunk/test/TEST.dsgraph.Makefile URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/test/TEST.dsgraph.Makefile?rev=112129&r1=112128&r2=112129&view=diff ============================================================================== --- poolalloc/trunk/test/TEST.dsgraph.Makefile (original) +++ poolalloc/trunk/test/TEST.dsgraph.Makefile Wed Aug 25 20:07:19 2010 @@ -17,7 +17,7 @@ DSA_SO := $(PADIR)/$(CONFIGURATION)/lib/libLLVMDataStructure$(SHLIBEXT) # Command for running the opt program -RUNOPT := $(LLVM_OBJ_ROOT)/projects/poolalloc/$(CONFIGURATION)/bin/watchdog $(LOPT) -load $(DSA_SO) +RUNOPT := $(RUNTOOLSAFELY) $(LLVM_OBJ_ROOT)/projects/poolalloc/$(CONFIGURATION)/bin/watchdog $(LOPT) -load $(DSA_SO) # PASS - The dsgraph pass to run: ds, bu, td PASS := td From sabre at nondot.org Wed Aug 25 20:13:54 2010 From: sabre at nondot.org (Chris Lattner) Date: Thu, 26 Aug 2010 01:13:54 -0000 Subject: [llvm-commits] [llvm] r112130 - /llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Message-ID: <20100826011354.521412A6C12C@llvm.org> Author: lattner Date: Wed Aug 25 20:13:54 2010 New Revision: 112130 URL: http://llvm.org/viewvc/llvm-project?rev=112130&view=rev Log: zap dead code. Modified: llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Modified: llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp?rev=112130&r1=112129&r2=112130&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Wed Aug 25 20:13:54 2010 @@ -1,4 +1,4 @@ -//===-- StructRetPromotion.cpp - Promote sret arguments ------------------===// +//===-- StructRetPromotion.cpp - Promote sret arguments -------------------===// // // The LLVM Compiler Infrastructure // @@ -57,7 +57,6 @@ bool isSafeToUpdateAllCallers(Function *F); Function *cloneFunctionBody(Function *F, const StructType *STy); CallGraphNode *updateCallSites(Function *F, Function *NF); - bool nestedStructType(const StructType *STy); }; } @@ -351,14 +350,3 @@ return NF_CGN; } -/// nestedStructType - Return true if STy includes any -/// other aggregate types -bool SRETPromotion::nestedStructType(const StructType *STy) { - unsigned Num = STy->getNumElements(); - for (unsigned i = 0; i < Num; i++) { - const Type *Ty = STy->getElementType(i); - if (!Ty->isSingleValueType() && !Ty->isVoidTy()) - return true; - } - return false; -} From sabre at nondot.org Wed Aug 25 20:14:38 2010 From: sabre at nondot.org (Chris Lattner) Date: Thu, 26 Aug 2010 01:14:38 -0000 Subject: [llvm-commits] [llvm] r112131 - /llvm/trunk/lib/Target/CBackend/CBackend.cpp Message-ID: <20100826011438.115F32A6C12C@llvm.org> Author: lattner Date: Wed Aug 25 20:14:37 2010 New Revision: 112131 URL: http://llvm.org/viewvc/llvm-project?rev=112131&view=rev Log: remove dead proto Modified: llvm/trunk/lib/Target/CBackend/CBackend.cpp Modified: llvm/trunk/lib/Target/CBackend/CBackend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CBackend/CBackend.cpp?rev=112131&r1=112130&r2=112131&view=diff ============================================================================== --- llvm/trunk/lib/Target/CBackend/CBackend.cpp (original) +++ llvm/trunk/lib/Target/CBackend/CBackend.cpp Wed Aug 25 20:14:37 2010 @@ -199,7 +199,6 @@ void lowerIntrinsics(Function &F); - void printModule(Module *M); void printModuleTypes(const TypeSymbolTable &ST); void printContainedStructs(const Type *Ty, std::set &); void printFloatingPointConstants(Function &F); From rjmccall at apple.com Wed Aug 25 21:11:48 2010 From: rjmccall at apple.com (John McCall) Date: Thu, 26 Aug 2010 02:11:48 -0000 Subject: [llvm-commits] [llvm] r112147 - /llvm/trunk/include/llvm/ADT/SmallVector.h Message-ID: <20100826021148.8349A2A6C12C@llvm.org> Author: rjmccall Date: Wed Aug 25 21:11:48 2010 New Revision: 112147 URL: http://llvm.org/viewvc/llvm-project?rev=112147&view=rev Log: SmallVector's growth policies don't like starting from zero capacity. I think there are good reasons to change this, but in the interests of short-term stability, make SmallVector<...,0> reserve non-zero capacity in its constructors. This means that SmallVector<...,0> uses more memory than SmallVector<...,1> and should really only be used (unless/until this workaround is removed) by clients that care about using SmallVector with an incomplete type. Modified: llvm/trunk/include/llvm/ADT/SmallVector.h Modified: llvm/trunk/include/llvm/ADT/SmallVector.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/SmallVector.h?rev=112147&r1=112146&r2=112147&view=diff ============================================================================== --- llvm/trunk/include/llvm/ADT/SmallVector.h (original) +++ llvm/trunk/include/llvm/ADT/SmallVector.h Wed Aug 25 21:11:48 2010 @@ -712,25 +712,33 @@ /// members are required. template class SmallVector : public SmallVectorImpl { + // SmallVector doesn't like growing from zero capacity. As a + // temporary workaround, avoid changing the growth algorithm by + // forcing capacity to be at least 1 in the constructors. + public: SmallVector() : SmallVectorImpl(0) { + this->reserve(1); // workaround } explicit SmallVector(unsigned Size, const T &Value = T()) : SmallVectorImpl(0) { - this->reserve(Size); + this->reserve(Size ? Size : 1); // workaround while (Size--) this->push_back(Value); } template SmallVector(ItTy S, ItTy E) : SmallVectorImpl(0) { + if (S == E) this->reserve(1); // workaround this->append(S, E); } SmallVector(const SmallVector &RHS) : SmallVectorImpl(0) { if (!RHS.empty()) SmallVectorImpl::operator=(RHS); + else + this->reserve(1); // workaround } const SmallVector &operator=(const SmallVector &RHS) { From wdietz2 at illinois.edu Wed Aug 25 21:26:30 2010 From: wdietz2 at illinois.edu (Will Dietz) Date: Thu, 26 Aug 2010 02:26:30 -0000 Subject: [llvm-commits] [poolalloc] r112150 - /poolalloc/trunk/lib/DSA/BottomUpClosure.cpp Message-ID: <20100826022630.BFC7C2A6C12C@llvm.org> Author: wdietz2 Date: Wed Aug 25 21:26:30 2010 New Revision: 112150 URL: http://llvm.org/viewvc/llvm-project?rev=112150&view=rev Log: Fixed bug where BU used the callgraph to discover callees for inlining. This was an artifact from the work on partial inlining (see r98921), and enabled situations where BU would try to inline the graph for an unvisited function. (Which can easily result in all kinds of badness) This fixes the infinite recursion in calculateGraph triggered by sqlite3. Finally, I believe this means we can also remove the eraseCS stuff, since if we get callees for a site it is because we are able to resolve it (and so should remove it). Will visit this later, I believe present behavior isn't *wrong*. Modified: poolalloc/trunk/lib/DSA/BottomUpClosure.cpp Modified: poolalloc/trunk/lib/DSA/BottomUpClosure.cpp URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/BottomUpClosure.cpp?rev=112150&r1=112149&r2=112150&view=diff ============================================================================== --- poolalloc/trunk/lib/DSA/BottomUpClosure.cpp (original) +++ poolalloc/trunk/lib/DSA/BottomUpClosure.cpp Wed Aug 25 21:26:30 2010 @@ -691,23 +691,11 @@ continue; } - // - // Find all called functions called by this call site. Remove from the - // list all calls to external functions (functions with no bodies). - // + // Find all callees for this callsite, according to the DSGraph! + // Do *not* use the callgraph, because we're updating that as we go! std::vector CalledFuncs; - { - // Get the callees from the callgraph - std::copy(callgraph.callee_begin(CS.getCallSite()), - callgraph.callee_end(CS.getCallSite()), - std::back_inserter(CalledFuncs)); - - // Remove calls to external functions - std::vector::iterator ErasePoint = - std::remove_if(CalledFuncs.begin(), CalledFuncs.end(), - std::mem_fun(&Function::isDeclaration)); - CalledFuncs.erase(ErasePoint, CalledFuncs.end()); - } + getAllCallees(CS,CalledFuncs); + if (CalledFuncs.empty()) { ++NumEmptyCalls; From ofv at wanadoo.es Wed Aug 25 21:29:54 2010 From: ofv at wanadoo.es (Oscar Fuentes) Date: Thu, 26 Aug 2010 02:29:54 -0000 Subject: [llvm-commits] [llvm] r112153 - in /llvm/trunk: cmake/modules/LLVMLibDeps.cmake tools/llvm-link/CMakeLists.txt Message-ID: <20100826022954.20F632A6C12C@llvm.org> Author: ofv Date: Wed Aug 25 21:29:53 2010 New Revision: 112153 URL: http://llvm.org/viewvc/llvm-project?rev=112153&view=rev Log: Updated CMake library dependencies. Removed unnecessary component name from llvm-link/CMakeLists.txt Modified: llvm/trunk/cmake/modules/LLVMLibDeps.cmake llvm/trunk/tools/llvm-link/CMakeLists.txt Modified: llvm/trunk/cmake/modules/LLVMLibDeps.cmake URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/cmake/modules/LLVMLibDeps.cmake?rev=112153&r1=112152&r2=112153&view=diff ============================================================================== --- llvm/trunk/cmake/modules/LLVMLibDeps.cmake (original) +++ llvm/trunk/cmake/modules/LLVMLibDeps.cmake Wed Aug 25 21:29:53 2010 @@ -28,7 +28,7 @@ set(MSVC_LIB_DEPS_LLVMInstrumentation LLVMAnalysis LLVMCore LLVMSupport LLVMSystem LLVMTransformUtils) set(MSVC_LIB_DEPS_LLVMInterpreter LLVMCodeGen LLVMCore LLVMExecutionEngine LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMJIT LLVMCodeGen LLVMCore LLVMExecutionEngine LLVMMC LLVMSupport LLVMSystem LLVMTarget) -set(MSVC_LIB_DEPS_LLVMLinker LLVMArchive LLVMBitReader LLVMCore LLVMSupport LLVMSystem) +set(MSVC_LIB_DEPS_LLVMLinker LLVMArchive LLVMBitReader LLVMCore LLVMSupport LLVMSystem LLVMTransformUtils) set(MSVC_LIB_DEPS_LLVMMBlazeAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMBlazeCodeGen LLVMMBlazeInfo LLVMMC LLVMSupport LLVMTarget) set(MSVC_LIB_DEPS_LLVMMBlazeCodeGen LLVMCodeGen LLVMCore LLVMMBlazeInfo LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget) set(MSVC_LIB_DEPS_LLVMMBlazeInfo LLVMSupport) Modified: llvm/trunk/tools/llvm-link/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-link/CMakeLists.txt?rev=112153&r1=112152&r2=112153&view=diff ============================================================================== --- llvm/trunk/tools/llvm-link/CMakeLists.txt (original) +++ llvm/trunk/tools/llvm-link/CMakeLists.txt Wed Aug 25 21:29:53 2010 @@ -1,4 +1,4 @@ -set(LLVM_LINK_COMPONENTS linker bitreader bitwriter asmparser transformutils) +set(LLVM_LINK_COMPONENTS linker bitreader bitwriter asmparser) add_llvm_tool(llvm-link llvm-link.cpp From ofv at wanadoo.es Wed Aug 25 21:44:42 2010 From: ofv at wanadoo.es (=?utf-8?Q?=C3=93scar_Fuentes?=) Date: Thu, 26 Aug 2010 04:44:42 +0200 Subject: [llvm-commits] [llvm] r112029 - /llvm/trunk/tools/llvm-link/CMakeLists.txt In-Reply-To: <20100825064522.F01AF2A6C12C@llvm.org> (Eric Christopher's message of "Wed, 25 Aug 2010 06:45:22 -0000") References: <20100825064522.F01AF2A6C12C@llvm.org> Message-ID: <871v9mf5yd.fsf@telefonica.net> Eric Christopher writes: > Apparently this is needed for llvm-link to link. > > --- llvm/trunk/tools/llvm-link/CMakeLists.txt (original) > +++ llvm/trunk/tools/llvm-link/CMakeLists.txt Wed Aug 25 01:45:22 2010 > @@ -1,4 +1,4 @@ > -set(LLVM_LINK_COMPONENTS linker bitreader bitwriter asmparser) > +set(LLVM_LINK_COMPONENTS linker bitreader bitwriter asmparser transformutils) I've reverted this change and committed updated library dependencies. Usually the problem you found is caused by obsolete library dependencies. Just restarting the build is enough for fixing the problem *if* you are building all LLVM targets. cmake/modules/LLVMLibDeps.cmake is regenerated every time a build that includes all LLVM targets finishes building the libraries. However, the tools keep using the old library dependencies until the next build. You can see LLVMLibDeps.cmake as a modified file on `svn status'. The right thing to do in this case is: 1. Delete all libraries from the build directory. 2. `make' again. 3. Check that LLVMLibDeps.cmake was really changed. 4. Commit it. The first two steps are necessary just in case some library was renamed or removed. The script that generates the library dependencies work on existing library files on the $BUILD/lib directory, so any stale file there will be included on its output. From echristo at apple.com Wed Aug 25 21:47:02 2010 From: echristo at apple.com (Eric Christopher) Date: Wed, 25 Aug 2010 19:47:02 -0700 Subject: [llvm-commits] [llvm] r112029 - /llvm/trunk/tools/llvm-link/CMakeLists.txt In-Reply-To: <871v9mf5yd.fsf@telefonica.net> References: <20100825064522.F01AF2A6C12C@llvm.org> <871v9mf5yd.fsf@telefonica.net> Message-ID: <115C9A50-B690-4EBB-A47C-D9EB3AC0561F@apple.com> On Aug 25, 2010, at 7:44 PM, ?scar Fuentes wrote: > Eric Christopher > writes: > >> Apparently this is needed for llvm-link to link. >> >> --- llvm/trunk/tools/llvm-link/CMakeLists.txt (original) >> +++ llvm/trunk/tools/llvm-link/CMakeLists.txt Wed Aug 25 01:45:22 2010 >> @@ -1,4 +1,4 @@ >> -set(LLVM_LINK_COMPONENTS linker bitreader bitwriter asmparser) >> +set(LLVM_LINK_COMPONENTS linker bitreader bitwriter asmparser transformutils) > > I've reverted this change and committed updated library dependencies. > > Usually the problem you found is caused by obsolete library > dependencies. Just restarting the build is enough for fixing the problem > *if* you are building all LLVM targets. > > cmake/modules/LLVMLibDeps.cmake is regenerated every time a build that > includes all LLVM targets finishes building the libraries. However, the > tools keep using the old library dependencies until the next build. You > can see LLVMLibDeps.cmake as a modified file on `svn status'. The right > thing to do in this case is: > > 1. Delete all libraries from the build directory. > 2. `make' again. > 3. Check that LLVMLibDeps.cmake was really changed. > 4. Commit it. > > The first two steps are necessary just in case some library was renamed > or removed. The script that generates the library dependencies work on > existing library files on the $BUILD/lib directory, so any stale file > there will be included on its output. Yeah, I'm not using CMake but wanted to unblock people. Thanks for the work and the explanation! -eric From sabre at nondot.org Wed Aug 25 21:55:43 2010 From: sabre at nondot.org (Chris Lattner) Date: Wed, 25 Aug 2010 19:55:43 -0700 Subject: [llvm-commits] [llvm] r112109 - /llvm/trunk/lib/Target/X86/README-SSE.txt In-Reply-To: References: <20100825233142.4D5642A6C12C@llvm.org> Message-ID: On Aug 25, 2010, at 5:56 PM, Eli Friedman wrote: >> + pshufd $16, %xmm0, %xmm1 >> + movdqa %xmm2, %xmm0 >> + unpcklps %xmm1, %xmm0 >> + ret >> + >> +seems silly. > > Err, just checking: you're suggesting this should turn into an addps? > This seems like just "we don't have a straight-line vectorization > pass". Yeah that. :) Actually it looks like it is just a couple of nice little instcombines away. -Chris From sabre at nondot.org Wed Aug 25 21:57:35 2010 From: sabre at nondot.org (Chris Lattner) Date: Thu, 26 Aug 2010 02:57:35 -0000 Subject: [llvm-commits] [llvm] r112155 - in /llvm/trunk/lib/CodeGen/SelectionDAG: SelectionDAGBuilder.cpp SelectionDAGISel.cpp Message-ID: <20100826025735.607D42A6C12C@llvm.org> Author: lattner Date: Wed Aug 25 21:57:35 2010 New Revision: 112155 URL: http://llvm.org/viewvc/llvm-project?rev=112155&view=rev Log: zap dead code. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=112155&r1=112154&r2=112155&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Wed Aug 25 21:57:35 2010 @@ -526,11 +526,6 @@ EVT regvt, EVT valuevt) : ValueVTs(1, valuevt), RegVTs(1, regvt), Regs(regs) {} - RegsForValue(const SmallVector ®s, - const SmallVector ®vts, - const SmallVector &valuevts) - : ValueVTs(valuevts), RegVTs(regvts), Regs(regs) {} - RegsForValue(LLVMContext &Context, const TargetLowering &tli, unsigned Reg, const Type *Ty) { ComputeValueVTs(tli, Ty, ValueVTs); Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=112155&r1=112154&r2=112155&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Wed Aug 25 21:57:35 2010 @@ -364,38 +364,6 @@ CodeGenAndEmitDAG(); } -namespace { -/// WorkListRemover - This class is a DAGUpdateListener that removes any deleted -/// nodes from the worklist. -class SDOPsWorkListRemover : public SelectionDAG::DAGUpdateListener { - SmallVector &Worklist; - SmallPtrSet &InWorklist; -public: - SDOPsWorkListRemover(SmallVector &wl, - SmallPtrSet &inwl) - : Worklist(wl), InWorklist(inwl) {} - - void RemoveFromWorklist(SDNode *N) { - if (!InWorklist.erase(N)) return; - - SmallVector::iterator I = - std::find(Worklist.begin(), Worklist.end(), N); - assert(I != Worklist.end() && "Not in worklist"); - - *I = Worklist.back(); - Worklist.pop_back(); - } - - virtual void NodeDeleted(SDNode *N, SDNode *E) { - RemoveFromWorklist(N); - } - - virtual void NodeUpdated(SDNode *N) { - // Ignore updates. - } -}; -} - void SelectionDAGISel::ComputeLiveOutVRegInfo() { SmallPtrSet VisitedNodes; SmallVector Worklist; From daniel at zuster.org Wed Aug 25 22:48:08 2010 From: daniel at zuster.org (Daniel Dunbar) Date: Thu, 26 Aug 2010 03:48:08 -0000 Subject: [llvm-commits] [llvm] r112157 - in /llvm/trunk: lib/Linker/LinkModules.cpp lib/Transforms/Utils/CloneModule.cpp lib/Transforms/Utils/ValueMapper.cpp test/Linker/metadata-a.ll test/Linker/metadata-b.ll Message-ID: <20100826034808.BB3AA2A6C12C@llvm.org> Author: ddunbar Date: Wed Aug 25 22:48:08 2010 New Revision: 112157 URL: http://llvm.org/viewvc/llvm-project?rev=112157&view=rev Log: Revert r112091, "Remap metadata attached to instructions when remapping individual ...", which depends on r111922, which I am reverting. Removed: llvm/trunk/test/Linker/metadata-a.ll llvm/trunk/test/Linker/metadata-b.ll Modified: llvm/trunk/lib/Linker/LinkModules.cpp llvm/trunk/lib/Transforms/Utils/CloneModule.cpp llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp Modified: llvm/trunk/lib/Linker/LinkModules.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Linker/LinkModules.cpp?rev=112157&r1=112156&r2=112157&view=diff ============================================================================== --- llvm/trunk/lib/Linker/LinkModules.cpp (original) +++ llvm/trunk/lib/Linker/LinkModules.cpp Wed Aug 25 22:48:08 2010 @@ -1005,31 +1005,13 @@ // the Source function as operands. Loop through all of the operands of the // functions and patch them up to point to the local versions... // - // This is the same as RemapInstruction, except that it avoids remapping - // instruction and basic block operands. - // for (Function::iterator BB = Dest->begin(), BE = Dest->end(); BB != BE; ++BB) - for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ++I) { - // Remap operands. + for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ++I) for (Instruction::op_iterator OI = I->op_begin(), OE = I->op_end(); OI != OE; ++OI) if (!isa(*OI) && !isa(*OI)) *OI = MapValue(*OI, ValueMap); - // Remap attached metadata. - SmallVector, 4> MDs; - I->getAllMetadata(MDs); - for (SmallVectorImpl >::iterator - MI = MDs.begin(), ME = MDs.end(); MI != ME; ++MI) { - Value *Old = MI->second; - if (!isa(Old) && !isa(Old)) { - Value *New = MapValue(Old, ValueMap); - if (New != Old) - I->setMetadata(MI->first, cast(New)); - } - } - } - // There is no need to map the arguments anymore. for (Function::arg_iterator I = Src->arg_begin(), E = Src->arg_end(); I != E; ++I) Modified: llvm/trunk/lib/Transforms/Utils/CloneModule.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/CloneModule.cpp?rev=112157&r1=112156&r2=112157&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/CloneModule.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/CloneModule.cpp Wed Aug 25 22:48:08 2010 @@ -132,5 +132,20 @@ NewNMD->addOperand(cast(MapValue(NMD.getOperand(i), VMap))); } + // Update metadata attach with instructions. + for (Module::iterator MI = New->begin(), ME = New->end(); MI != ME; ++MI) + for (Function::iterator FI = MI->begin(), FE = MI->end(); + FI != FE; ++FI) + for (BasicBlock::iterator BI = FI->begin(), BE = FI->end(); + BI != BE; ++BI) { + SmallVector, 4 > MDs; + BI->getAllMetadata(MDs); + for (SmallVector, 4>::iterator + MDI = MDs.begin(), MDE = MDs.end(); MDI != MDE; ++MDI) { + Value *MappedValue = MapValue(MDI->second, VMap); + if (MDI->second != MappedValue && MappedValue) + BI->setMetadata(MDI->first, cast(MappedValue)); + } + } return New; } Modified: llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp?rev=112157&r1=112156&r2=112157&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp Wed Aug 25 22:48:08 2010 @@ -147,21 +147,10 @@ /// current values into those specified by VMap. /// void llvm::RemapInstruction(Instruction *I, ValueToValueMapTy &VMap) { - // Remap operands. for (User::op_iterator op = I->op_begin(), E = I->op_end(); op != E; ++op) { Value *V = MapValue(*op, VMap); assert(V && "Referenced value not in value map!"); *op = V; } - - // Remap attached metadata. - SmallVector, 4> MDs; - I->getAllMetadata(MDs); - for (SmallVectorImpl >::iterator - MI = MDs.begin(), ME = MDs.end(); MI != ME; ++MI) { - Value *Old = MI->second; - Value *New = MapValue(Old, VMap); - if (New != Old) - I->setMetadata(MI->first, cast(New)); - } } + Removed: llvm/trunk/test/Linker/metadata-a.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Linker/metadata-a.ll?rev=112156&view=auto ============================================================================== --- llvm/trunk/test/Linker/metadata-a.ll (original) +++ llvm/trunk/test/Linker/metadata-a.ll (removed) @@ -1,15 +0,0 @@ -; RUN: llvm-link %s %p/metadata-b.ll -S -o - | FileCheck %s - -; CHECK: define void @foo(i32 %a) -; CHECK: ret void, !attach !0, !also !{i32 %a} -; CHECK: define void @goo(i32 %b) -; CHECK: ret void, !attach !1, !and !{i32 %b} -; CHECK: !0 = metadata !{i32 524334, void (i32)* @foo} -; CHECK: !1 = metadata !{i32 524334, void (i32)* @goo} - -define void @foo(i32 %a) nounwind { -entry: - ret void, !attach !0, !also !{ i32 %a } -} - -!0 = metadata !{i32 524334, void (i32)* @foo} Removed: llvm/trunk/test/Linker/metadata-b.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Linker/metadata-b.ll?rev=112156&view=auto ============================================================================== --- llvm/trunk/test/Linker/metadata-b.ll (original) +++ llvm/trunk/test/Linker/metadata-b.ll (removed) @@ -1,9 +0,0 @@ -; This file is for use with metadata-a.ll -; RUN: true - -define void @goo(i32 %b) nounwind { -entry: - ret void, !attach !0, !and !{ i32 %b } -} - -!0 = metadata !{i32 524334, void (i32)* @goo} From daniel at zuster.org Wed Aug 25 22:48:12 2010 From: daniel at zuster.org (Daniel Dunbar) Date: Thu, 26 Aug 2010 03:48:12 -0000 Subject: [llvm-commits] [llvm] r112158 - /llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp Message-ID: <20100826034812.1DAF22A6C12D@llvm.org> Author: ddunbar Date: Wed Aug 25 22:48:11 2010 New Revision: 112158 URL: http://llvm.org/viewvc/llvm-project?rev=112158&view=rev Log: Revert r111922, "MapValue support for MDNodes. This is similar to r109117, except ...", it is causing *massive* performance regressions when building Clang with itself (-O3 -g). Modified: llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp Modified: llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp?rev=112158&r1=112157&r2=112158&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp Wed Aug 25 22:48:11 2010 @@ -27,36 +27,17 @@ // NOTE: VMSlot can be invalidated by any reference to VM, which can grow the // DenseMap. This includes any recursive calls to MapValue. - // Global values do not need to be seeded into the VM if they - // are using the identity mapping. - if (isa(V) || isa(V) || isa(V)) + // Global values and non-function-local metadata do not need to be seeded into + // the VM if they are using the identity mapping. + if (isa(V) || isa(V) || isa(V) || + (isa(V) && !cast(V)->isFunctionLocal())) return VMSlot = const_cast(V); if (const MDNode *MD = dyn_cast(V)) { - // Start by assuming that we'll use the identity mapping. - VMSlot = const_cast(V); - - // Check all operands to see if any need to be remapped. - for (unsigned i = 0, e = MD->getNumOperands(); i != e; ++i) { - Value *OP = MD->getOperand(i); - if (!OP || MapValue(OP, VM) == OP) continue; - - // Ok, at least one operand needs remapping. - MDNode *Dummy = MDNode::getTemporary(V->getContext(), 0, 0); - VM[V] = Dummy; - SmallVector Elts; - Elts.reserve(MD->getNumOperands()); - for (i = 0; i != e; ++i) - Elts.push_back(MD->getOperand(i) ? - MapValue(MD->getOperand(i), VM) : 0); - MDNode *NewMD = MDNode::get(V->getContext(), Elts.data(), Elts.size()); - Dummy->replaceAllUsesWith(NewMD); - MDNode::deleteTemporary(Dummy); - return VM[V] = NewMD; - } - - // No operands needed remapping; keep the identity map. - return const_cast(V); + SmallVector Elts; + for (unsigned i = 0, e = MD->getNumOperands(); i != e; ++i) + Elts.push_back(MD->getOperand(i) ? MapValue(MD->getOperand(i), VM) : 0); + return VM[V] = MDNode::get(V->getContext(), Elts.data(), Elts.size()); } Constant *C = const_cast(dyn_cast(V)); From sabre at nondot.org Thu Aug 26 00:24:29 2010 From: sabre at nondot.org (Chris Lattner) Date: Thu, 26 Aug 2010 05:24:29 -0000 Subject: [llvm-commits] [llvm] r112168 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/sse1.ll Message-ID: <20100826052430.1042D2A6C12C@llvm.org> Author: lattner Date: Thu Aug 26 00:24:29 2010 New Revision: 112168 URL: http://llvm.org/viewvc/llvm-project?rev=112168&view=rev Log: fix sse1 only codegen in x86-64 mode, which is something we apparently try to support. Added: llvm/trunk/test/CodeGen/X86/sse1.ll Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=112168&r1=112167&r2=112168&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Aug 26 00:24:29 2010 @@ -1342,12 +1342,18 @@ if (Subtarget->is64Bit()) { if (ValVT.isVector() && ValVT.getSizeInBits() == 64) { ValToCopy = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i64, ValToCopy); - if (VA.getLocReg() == X86::XMM0 || VA.getLocReg() == X86::XMM1) + if (VA.getLocReg() == X86::XMM0 || VA.getLocReg() == X86::XMM1) { ValToCopy = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2i64, ValToCopy); + + // If we don't have SSE2 available, convert to v4f32 so the generated + // register is legal. + if (!Subtarget->hasSSE2()) + ValToCopy = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v4f32,ValToCopy); + } } } - + Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), ValToCopy, Flag); Flag = Chain.getValue(1); } @@ -3931,10 +3937,9 @@ } } - if (NumNonZero == 0) { - // All undef vector. Return an UNDEF. All zero vectors were handled above. + // All undef vector. Return an UNDEF. All zero vectors were handled above. + if (NumNonZero == 0) return DAG.getUNDEF(VT); - } // Special case for single non-zero, non-undef, element. if (NumNonZero == 1) { @@ -4072,7 +4077,7 @@ if (EVTBits == 16 && NumElems == 8) { SDValue V = LowerBuildVectorv8i16(Op, NonZeros,NumNonZero,NumZero, DAG, - *this); + *this); if (V.getNode()) return V; } Added: llvm/trunk/test/CodeGen/X86/sse1.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse1.ll?rev=112168&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/sse1.ll (added) +++ llvm/trunk/test/CodeGen/X86/sse1.ll Thu Aug 26 00:24:29 2010 @@ -0,0 +1,7 @@ +; Tests for SSE1 and below, without SSE2+. +; RUN: llc < %s -mcpu=pentium3 -O3 | FileCheck %s + +define <8 x i16> @test1(<8 x i32> %a) nounwind { +; CHECK: test1 + ret <8 x i16> zeroinitializer +} From sabre at nondot.org Thu Aug 26 00:25:05 2010 From: sabre at nondot.org (Chris Lattner) Date: Thu, 26 Aug 2010 05:25:05 -0000 Subject: [llvm-commits] [llvm] r112169 - /llvm/trunk/test/CodeGen/X86/sse1.ll Message-ID: <20100826052505.BC7B92A6C12C@llvm.org> Author: lattner Date: Thu Aug 26 00:25:05 2010 New Revision: 112169 URL: http://llvm.org/viewvc/llvm-project?rev=112169&view=rev Log: Make sure this forces the x86 targets Modified: llvm/trunk/test/CodeGen/X86/sse1.ll Modified: llvm/trunk/test/CodeGen/X86/sse1.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse1.ll?rev=112169&r1=112168&r2=112169&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/sse1.ll (original) +++ llvm/trunk/test/CodeGen/X86/sse1.ll Thu Aug 26 00:25:05 2010 @@ -1,5 +1,6 @@ ; Tests for SSE1 and below, without SSE2+. -; RUN: llc < %s -mcpu=pentium3 -O3 | FileCheck %s +; RUN: llc < %s -march=x86 -mcpu=pentium3 -O3 | FileCheck %s +; RUN: llc < %s -march=x86-64 -mcpu=pentium3 -O3 | FileCheck %s define <8 x i16> @test1(<8 x i32> %a) nounwind { ; CHECK: test1 From kuwerty at gmail.com Thu Aug 26 00:26:05 2010 From: kuwerty at gmail.com (Krister Wombell) Date: Thu, 26 Aug 2010 13:26:05 +0800 Subject: [llvm-commits] [PATCH] fix debug_ranges for ELF targets Message-ID: Some (all binutils?) based ELF assemblers treat expressions like: (.Ldebug_ranges + 48) - .Ldebug_ranges as a constant and won't emit a relocation. When the debug_ranges sections are finally linked then DIE's that have a reference to an offset in the debug_ranges section won't be correct (they'll all point to the first compilation unit encountered by the linker). gdb doesn't like this. This form of expression is emitted by AsmPrinter::EmitLabelOffsetDifference. It'd be difficult to encode this form of expression in ELF and because the only caller of this function actually called it with the same symbol for the Lo and Hi args it can be represented as 'label + offset' instead. Replaced the entire function with something called EmitLabelPlusOffset. Ran make in tests directory, no unexpected failures. -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20100826/3b7a49af/attachment.html -------------- next part -------------- A non-text attachment was scrubbed... Name: debug_ranges.patch Type: text/x-patch Size: 4035 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20100826/3b7a49af/attachment.bin From bob.wilson at apple.com Thu Aug 26 00:33:30 2010 From: bob.wilson at apple.com (Bob Wilson) Date: Thu, 26 Aug 2010 05:33:30 -0000 Subject: [llvm-commits] [llvm] r112170 - in /llvm/trunk/lib/Target/ARM: ARMExpandPseudoInsts.cpp ARMISelDAGToDAG.cpp ARMInstrNEON.td NEONPreAllocPass.cpp Message-ID: <20100826053330.602772A6C12C@llvm.org> Author: bwilson Date: Thu Aug 26 00:33:30 2010 New Revision: 112170 URL: http://llvm.org/viewvc/llvm-project?rev=112170&view=rev Log: Use pseudo instructions for VST1d64Q. Modified: llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp llvm/trunk/lib/Target/ARM/ARMInstrNEON.td llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp Modified: llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp?rev=112170&r1=112169&r2=112170&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp Thu Aug 26 00:33:30 2010 @@ -229,12 +229,16 @@ ExpandVST4(MBBI, ARM::VST4d16, false, SingleSpc); break; case ARM::VST4d32Pseudo: ExpandVST4(MBBI, ARM::VST4d32, false, SingleSpc); break; + case ARM::VST1d64QPseudo: + ExpandVST4(MBBI, ARM::VST1d64Q, false, SingleSpc); break; case ARM::VST4d8Pseudo_UPD: ExpandVST4(MBBI, ARM::VST4d8_UPD, true, SingleSpc); break; case ARM::VST4d16Pseudo_UPD: ExpandVST4(MBBI, ARM::VST4d16_UPD, true, SingleSpc); break; case ARM::VST4d32Pseudo_UPD: ExpandVST4(MBBI, ARM::VST4d32_UPD, true, SingleSpc); break; + case ARM::VST1d64QPseudo_UPD: + ExpandVST4(MBBI, ARM::VST1d64Q_UPD, true, SingleSpc); break; case ARM::VST4q8Pseudo_UPD: ExpandVST4(MBBI, ARM::VST4q8_UPD, true, EvenDblSpc); break; case ARM::VST4q16Pseudo_UPD: Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp?rev=112170&r1=112169&r2=112170&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp Thu Aug 26 00:33:30 2010 @@ -1262,8 +1262,7 @@ // FIXME: This is a temporary flag to distinguish VSTs that have been // converted to pseudo instructions. - bool usePseudoInstrs = (NumVecs == 4 && - VT.getSimpleVT().SimpleTy != MVT::v1i64); + bool usePseudoInstrs = (NumVecs == 4); if (is64BitVector) { if (NumVecs >= 2) { @@ -2331,7 +2330,7 @@ case Intrinsic::arm_neon_vst4: { unsigned DOpcodes[] = { ARM::VST4d8Pseudo, ARM::VST4d16Pseudo, - ARM::VST4d32Pseudo, ARM::VST1d64Q }; + ARM::VST4d32Pseudo, ARM::VST1d64QPseudo }; unsigned QOpcodes0[] = { ARM::VST4q8Pseudo_UPD, ARM::VST4q16Pseudo_UPD, ARM::VST4q32Pseudo_UPD }; Modified: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrNEON.td?rev=112170&r1=112169&r2=112170&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrNEON.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Thu Aug 26 00:33:30 2010 @@ -583,6 +583,9 @@ def VST1d32Q_UPD : VST1D4WB<0b1000, "32">; def VST1d64Q_UPD : VST1D4WB<0b1100, "64">; +def VST1d64QPseudo : VSTQQPseudo; +def VST1d64QPseudo_UPD : VSTQQWBPseudo; + // VST2 : Vector Store (multiple 2-element structures) class VST2D op11_8, bits<4> op7_4, string Dt> : NLdSt<0, 0b00, op11_8, op7_4, (outs), Modified: llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp?rev=112170&r1=112169&r2=112170&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp (original) +++ llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp Thu Aug 26 00:33:30 2010 @@ -260,7 +260,6 @@ Stride = 2; return true; - case ARM::VST1d64Q: case ARM::VST4LNd8: case ARM::VST4LNd16: case ARM::VST4LNd32: From sabre at nondot.org Thu Aug 26 00:51:23 2010 From: sabre at nondot.org (Chris Lattner) Date: Thu, 26 Aug 2010 05:51:23 -0000 Subject: [llvm-commits] [llvm] r112171 - in /llvm/trunk: lib/CodeGen/SelectionDAG/LegalizeTypes.h lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/sse1.ll Message-ID: <20100826055123.462D52A6C12C@llvm.org> Author: lattner Date: Thu Aug 26 00:51:22 2010 New Revision: 112171 URL: http://llvm.org/viewvc/llvm-project?rev=112171&view=rev Log: implement SplitVecOp_CONCAT_VECTORS, fixing the included testcase with SSE1. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/test/CodeGen/X86/sse1.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=112171&r1=112170&r2=112171&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h Thu Aug 26 00:51:22 2010 @@ -581,6 +581,7 @@ SDValue SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N); SDValue SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N); SDValue SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo); + SDValue SplitVecOp_CONCAT_VECTORS(SDNode *N); //===--------------------------------------------------------------------===// // Vector Widening Support: LegalizeVectorTypes.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp?rev=112171&r1=112170&r2=112171&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp Thu Aug 26 00:51:22 2010 @@ -983,6 +983,7 @@ case ISD::BIT_CONVERT: Res = SplitVecOp_BIT_CONVERT(N); break; case ISD::EXTRACT_SUBVECTOR: Res = SplitVecOp_EXTRACT_SUBVECTOR(N); break; case ISD::EXTRACT_VECTOR_ELT:Res = SplitVecOp_EXTRACT_VECTOR_ELT(N); break; + case ISD::CONCAT_VECTORS: Res = SplitVecOp_CONCAT_VECTORS(N); break; case ISD::STORE: Res = SplitVecOp_STORE(cast(N), OpNo); break; @@ -1091,8 +1092,7 @@ return SDValue(DAG.UpdateNodeOperands(N, Lo, Idx), 0); return SDValue(DAG.UpdateNodeOperands(N, Hi, DAG.getConstant(IdxVal - LoElts, - Idx.getValueType())), - 0); + Idx.getValueType())), 0); } // Store the vector to the stack. @@ -1113,7 +1113,7 @@ SDValue DAGTypeLegalizer::SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo) { assert(N->isUnindexed() && "Indexed store of vector?"); assert(OpNo == 1 && "Can only split the stored value"); - DebugLoc dl = N->getDebugLoc(); + DebugLoc DL = N->getDebugLoc(); bool isTruncating = N->isTruncatingStore(); SDValue Ch = N->getChain(); @@ -1132,25 +1132,49 @@ unsigned IncrementSize = LoMemVT.getSizeInBits()/8; if (isTruncating) - Lo = DAG.getTruncStore(Ch, dl, Lo, Ptr, N->getSrcValue(), SVOffset, + Lo = DAG.getTruncStore(Ch, DL, Lo, Ptr, N->getSrcValue(), SVOffset, LoMemVT, isVol, isNT, Alignment); else - Lo = DAG.getStore(Ch, dl, Lo, Ptr, N->getSrcValue(), SVOffset, + Lo = DAG.getStore(Ch, DL, Lo, Ptr, N->getSrcValue(), SVOffset, isVol, isNT, Alignment); // Increment the pointer to the other half. - Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, + Ptr = DAG.getNode(ISD::ADD, DL, Ptr.getValueType(), Ptr, DAG.getIntPtrConstant(IncrementSize)); SVOffset += IncrementSize; if (isTruncating) - Hi = DAG.getTruncStore(Ch, dl, Hi, Ptr, N->getSrcValue(), SVOffset, + Hi = DAG.getTruncStore(Ch, DL, Hi, Ptr, N->getSrcValue(), SVOffset, HiMemVT, isVol, isNT, Alignment); else - Hi = DAG.getStore(Ch, dl, Hi, Ptr, N->getSrcValue(), SVOffset, + Hi = DAG.getStore(Ch, DL, Hi, Ptr, N->getSrcValue(), SVOffset, isVol, isNT, Alignment); - return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo, Hi); + return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Lo, Hi); +} + +SDValue DAGTypeLegalizer::SplitVecOp_CONCAT_VECTORS(SDNode *N) { + DebugLoc DL = N->getDebugLoc(); + + // The input operands all must have the same type, and we know the result the + // result type is valid. Convert this to a buildvector which extracts all the + // input elements. + // TODO: If the input elements are power-two vectors, we could convert this to + // a new CONCAT_VECTORS node with elements that are half-wide. + SmallVector Elts; + EVT EltVT = N->getValueType(0).getVectorElementType(); + for (unsigned op = 0, e = N->getNumOperands(); op != e; ++op) { + SDValue Op = N->getOperand(op); + for (unsigned i = 0, e = Op.getValueType().getVectorNumElements(); + i != e; ++i) { + Elts.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT, + Op, DAG.getIntPtrConstant(i))); + + } + } + + return DAG.getNode(ISD::BUILD_VECTOR, DL, N->getValueType(0), + &Elts[0], Elts.size()); } @@ -2223,25 +2247,24 @@ // Check if we can load the element with one instruction if (LdWidth <= NewVTWidth) { - if (NewVT.isVector()) { - if (NewVT != WidenVT) { - assert(WidenWidth % NewVTWidth == 0); - unsigned NumConcat = WidenWidth / NewVTWidth; - SmallVector ConcatOps(NumConcat); - SDValue UndefVal = DAG.getUNDEF(NewVT); - ConcatOps[0] = LdOp; - for (unsigned i = 1; i != NumConcat; ++i) - ConcatOps[i] = UndefVal; - return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0], - NumConcat); - } else - return LdOp; - } else { + if (!NewVT.isVector()) { unsigned NumElts = WidenWidth / NewVTWidth; EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts); SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT, LdOp); return DAG.getNode(ISD::BIT_CONVERT, dl, WidenVT, VecOp); } + if (NewVT == WidenVT) + return LdOp; + + assert(WidenWidth % NewVTWidth == 0); + unsigned NumConcat = WidenWidth / NewVTWidth; + SmallVector ConcatOps(NumConcat); + SDValue UndefVal = DAG.getUNDEF(NewVT); + ConcatOps[0] = LdOp; + for (unsigned i = 1; i != NumConcat; ++i) + ConcatOps[i] = UndefVal; + return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0], + NumConcat); } // Load vector by using multiple loads from largest vector to scalar @@ -2274,52 +2297,55 @@ // Build the vector from the loads operations unsigned End = LdOps.size(); - if (LdOps[0].getValueType().isVector()) { - // If the load contains vectors, build the vector using concat vector. - // All of the vectors used to loads are power of 2 and the scalars load - // can be combined to make a power of 2 vector. - SmallVector ConcatOps(End); - int i = End - 1; - int Idx = End; - EVT LdTy = LdOps[i].getValueType(); - // First combine the scalar loads to a vector - if (!LdTy.isVector()) { - for (--i; i >= 0; --i) { - LdTy = LdOps[i].getValueType(); - if (LdTy.isVector()) - break; - } - ConcatOps[--Idx] = BuildVectorFromScalar(DAG, LdTy, LdOps, i+1, End); - } - ConcatOps[--Idx] = LdOps[i]; + if (!LdOps[0].getValueType().isVector()) + // All the loads are scalar loads. + return BuildVectorFromScalar(DAG, WidenVT, LdOps, 0, End); + + // If the load contains vectors, build the vector using concat vector. + // All of the vectors used to loads are power of 2 and the scalars load + // can be combined to make a power of 2 vector. + SmallVector ConcatOps(End); + int i = End - 1; + int Idx = End; + EVT LdTy = LdOps[i].getValueType(); + // First combine the scalar loads to a vector + if (!LdTy.isVector()) { for (--i; i >= 0; --i) { - EVT NewLdTy = LdOps[i].getValueType(); - if (NewLdTy != LdTy) { - // Create a larger vector - ConcatOps[End-1] = DAG.getNode(ISD::CONCAT_VECTORS, dl, NewLdTy, - &ConcatOps[Idx], End - Idx); - Idx = End - 1; - LdTy = NewLdTy; - } - ConcatOps[--Idx] = LdOps[i]; + LdTy = LdOps[i].getValueType(); + if (LdTy.isVector()) + break; + } + ConcatOps[--Idx] = BuildVectorFromScalar(DAG, LdTy, LdOps, i+1, End); + } + ConcatOps[--Idx] = LdOps[i]; + for (--i; i >= 0; --i) { + EVT NewLdTy = LdOps[i].getValueType(); + if (NewLdTy != LdTy) { + // Create a larger vector + ConcatOps[End-1] = DAG.getNode(ISD::CONCAT_VECTORS, dl, NewLdTy, + &ConcatOps[Idx], End - Idx); + Idx = End - 1; + LdTy = NewLdTy; } + ConcatOps[--Idx] = LdOps[i]; + } - if (WidenWidth != LdTy.getSizeInBits()*(End - Idx)) { - // We need to fill the rest with undefs to build the vector - unsigned NumOps = WidenWidth / LdTy.getSizeInBits(); - SmallVector WidenOps(NumOps); - SDValue UndefVal = DAG.getUNDEF(LdTy); - unsigned i = 0; - for (; i != End-Idx; ++i) - WidenOps[i] = ConcatOps[Idx+i]; - for (; i != NumOps; ++i) - WidenOps[i] = UndefVal; - return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &WidenOps[0],NumOps); - } else - return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, - &ConcatOps[Idx], End - Idx); - } else // All the loads are scalar loads. - return BuildVectorFromScalar(DAG, WidenVT, LdOps, 0, End); + if (WidenWidth == LdTy.getSizeInBits()*(End - Idx)) + return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, + &ConcatOps[Idx], End - Idx); + + // We need to fill the rest with undefs to build the vector + unsigned NumOps = WidenWidth / LdTy.getSizeInBits(); + SmallVector WidenOps(NumOps); + SDValue UndefVal = DAG.getUNDEF(LdTy); + { + unsigned i = 0; + for (; i != End-Idx; ++i) + WidenOps[i] = ConcatOps[Idx+i]; + for (; i != NumOps; ++i) + WidenOps[i] = UndefVal; + } + return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &WidenOps[0],NumOps); } SDValue Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=112171&r1=112170&r2=112171&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Aug 26 00:51:22 2010 @@ -1320,9 +1320,8 @@ // llvm-gcc has never done it right and no one has noticed, so this // should be OK for now. if (ValVT == MVT::f64 && - (Subtarget->is64Bit() && !Subtarget->hasSSE2())) { + (Subtarget->is64Bit() && !Subtarget->hasSSE2())) report_fatal_error("SSE2 register return with SSE2 disabled"); - } // Returns in ST0/ST1 are handled specially: these are pushed as operands to // the RET instruction and handled by the FP Stackifier. Modified: llvm/trunk/test/CodeGen/X86/sse1.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse1.ll?rev=112171&r1=112170&r2=112171&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/sse1.ll (original) +++ llvm/trunk/test/CodeGen/X86/sse1.ll Thu Aug 26 00:51:22 2010 @@ -6,3 +6,9 @@ ; CHECK: test1 ret <8 x i16> zeroinitializer } + +define <8 x i16> @test2(<8 x i32> %a) nounwind { +; CHECK: test2 + %c = trunc <8 x i32> %a to <8 x i16> ; <<8 x i16>> [#uses=1] + ret <8 x i16> %c +} From sabre at nondot.org Thu Aug 26 00:52:42 2010 From: sabre at nondot.org (Chris Lattner) Date: Thu, 26 Aug 2010 05:52:42 -0000 Subject: [llvm-commits] [llvm] r112172 - /llvm/trunk/test/CodeGen/X86/vec_cast.ll Message-ID: <20100826055242.BF5422A6C12C@llvm.org> Author: lattner Date: Thu Aug 26 00:52:42 2010 New Revision: 112172 URL: http://llvm.org/viewvc/llvm-project?rev=112172&view=rev Log: I think enough general codegen bugs are fixed to allow this to work on random hosts, lets see! Modified: llvm/trunk/test/CodeGen/X86/vec_cast.ll Modified: llvm/trunk/test/CodeGen/X86/vec_cast.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_cast.ll?rev=112172&r1=112171&r2=112172&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/vec_cast.ll (original) +++ llvm/trunk/test/CodeGen/X86/vec_cast.ll Thu Aug 26 00:52:42 2010 @@ -1,7 +1,5 @@ -; RUN: true -; llc < %s -march=x86-64 -; RUN: true -;llc < %s -march=x86-64 -disable-mmx +; RUN: llc < %s -march=x86-64 +; RUN: llc < %s -march=x86-64 -disable-mmx define <8 x i32> @a(<8 x i16> %a) nounwind { %c = sext <8 x i16> %a to <8 x i32> From sabre at nondot.org Thu Aug 26 01:57:07 2010 From: sabre at nondot.org (Chris Lattner) Date: Thu, 26 Aug 2010 06:57:07 -0000 Subject: [llvm-commits] [llvm] r112175 - in /llvm/trunk: lib/CodeGen/SelectionDAG/LegalizeDAG.cpp test/CodeGen/X86/sse1.ll test/CodeGen/X86/vec_cast.ll Message-ID: <20100826065707.F1D162A6C12C@llvm.org> Author: lattner Date: Thu Aug 26 01:57:07 2010 New Revision: 112175 URL: http://llvm.org/viewvc/llvm-project?rev=112175&view=rev Log: Add a hackaround for PR7993 which is causing failures on x86 builders that lack sse2. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp llvm/trunk/test/CodeGen/X86/sse1.ll llvm/trunk/test/CodeGen/X86/vec_cast.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=112175&r1=112174&r2=112175&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Thu Aug 26 01:57:07 2010 @@ -1314,6 +1314,8 @@ break; case TargetLowering::Expand: if (!TLI.isLoadExtLegal(ISD::EXTLOAD, SrcVT)) { + // FIXME: If SrcVT isn't legal, then this introduces an illegal + // type. SDValue Load = DAG.getLoad(SrcVT, dl, Tmp1, Tmp2, LD->getSrcValue(), LD->getSrcValueOffset(), LD->isVolatile(), LD->isNonTemporal(), Modified: llvm/trunk/test/CodeGen/X86/sse1.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse1.ll?rev=112175&r1=112174&r2=112175&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/sse1.ll (original) +++ llvm/trunk/test/CodeGen/X86/sse1.ll Thu Aug 26 01:57:07 2010 @@ -12,3 +12,9 @@ %c = trunc <8 x i32> %a to <8 x i16> ; <<8 x i16>> [#uses=1] ret <8 x i16> %c } + +; PR7993 +;define <4 x i32> @test3(<4 x i16> %a) nounwind { +; %c = sext <4 x i16> %a to <4 x i32> ; <<4 x i32>> [#uses=1] +; ret <4 x i32> %c +;} Modified: llvm/trunk/test/CodeGen/X86/vec_cast.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_cast.ll?rev=112175&r1=112174&r2=112175&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/vec_cast.ll (original) +++ llvm/trunk/test/CodeGen/X86/vec_cast.ll Thu Aug 26 01:57:07 2010 @@ -1,5 +1,6 @@ -; RUN: llc < %s -march=x86-64 -; RUN: llc < %s -march=x86-64 -disable-mmx +; RUN: llc < %s -march=x86-64 -mcpu=core2 +; RUN: llc < %s -march=x86-64 -mcpu=core2 -disable-mmx + define <8 x i32> @a(<8 x i16> %a) nounwind { %c = sext <8 x i16> %a to <8 x i32> From eli.friedman at gmail.com Thu Aug 26 03:07:55 2010 From: eli.friedman at gmail.com (Eli Friedman) Date: Thu, 26 Aug 2010 01:07:55 -0700 Subject: [llvm-commits] [llvm] r112175 - in /llvm/trunk: lib/CodeGen/SelectionDAG/LegalizeDAG.cpp test/CodeGen/X86/sse1.ll test/CodeGen/X86/vec_cast.ll In-Reply-To: <20100826065707.F1D162A6C12C@llvm.org> References: <20100826065707.F1D162A6C12C@llvm.org> Message-ID: On Wed, Aug 25, 2010 at 11:57 PM, Chris Lattner wrote: > Author: lattner > Date: Thu Aug 26 01:57:07 2010 > New Revision: 112175 > > URL: http://llvm.org/viewvc/llvm-project?rev=112175&view=rev > Log: > Add a hackaround for PR7993 which is causing failures on x86 builders that lack sse2. I'm pretty sure the issue is that it fails with a Linux triple, rather than having anything to do with SSE2. -Eli From kuwerty at gmail.com Thu Aug 26 03:08:18 2010 From: kuwerty at gmail.com (Krister Wombell) Date: Thu, 26 Aug 2010 16:08:18 +0800 Subject: [llvm-commits] [PATCH]: Fix for DW_at_stmt_list offset Message-ID: In the compilation unit DIE, DW_at_stmt_list is supposed to be an offset into the debug_line information where the line program for this compile unit begins. It needs to be a label so that a relocation is emitted and during final linking the offset is adjusted. Without this all CUs contain offset 0 (and only 1 of them will be correct) Mostly been able to debug an ELF program under gdb now. Krister -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20100826/cf71f5db/attachment.html -------------- next part -------------- A non-text attachment was scrubbed... Name: stmt_list.patch Type: text/x-patch Size: 2249 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20100826/cf71f5db/attachment.bin From isanbard at gmail.com Thu Aug 26 04:07:33 2010 From: isanbard at gmail.com (Bill Wendling) Date: Thu, 26 Aug 2010 09:07:33 -0000 Subject: [llvm-commits] [llvm] r112176 - /llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Message-ID: <20100826090733.9D33E2A6C12C@llvm.org> Author: void Date: Thu Aug 26 04:07:33 2010 New Revision: 112176 URL: http://llvm.org/viewvc/llvm-project?rev=112176&view=rev Log: There seems to be a (potential) hardware bug with the CMN instruction and comparison with 0. These two pieces of code should give identical results: rsbs r1, r1, 0 cmp r0, r1 mov r0, #0 it ls mov r0, #1 and: cmn r0, r1 mov r0, #0 it ls mov r0, #1 However, the CMN gives the *opposite* result when r1 is 0. This is because the carry flag is set in the CMP case but not in the CMN case. In short, the CMP instruction doesn't perform a truncate of the (logical) NOT of 0 plus the value of r0 and the carry bit (because the "carry bit" parameter to AddWithCarry is defined as 1 in this case, the carry flag will always be set when r0 >= 0). The CMN instruction doesn't perform a NOT of 0 so there is never a "carry" when this AddWithCarry is performed (because the "carry bit" parameter to AddWithCarry is defined as 0). The AddWithCarry in the CMP case seems to be relying upon the identity: ~x + 1 = -x However when x is 0 and unsigned, this doesn't hold: x = 0 ~x = 0xFFFF FFFF ~x + 1 = 0x1 0000 0000 (-x = 0) != (0x1 0000 0000 = ~x + 1) Therefore, we should disable *all* versions of CMN, especially when comparing against zero, until we can limit when the CMN instruction is used (when we know that the RHS is not 0) or when we have a hardware fix for this. (See the ARM docs for the "AddWithCarry" pseudo-code.) This is related to . Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=112176&r1=112175&r2=112176&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Thu Aug 26 04:07:33 2010 @@ -2141,18 +2141,60 @@ defm t2CMPz : T2I_cmp_irs<0b1101, "cmp", BinOpFrag<(ARMcmpZ node:$LHS, node:$RHS)>>; -//FIXME: Disable CMN, as CCodes are backwards from compare expectations -// Compare-to-zero still works out, just not the relationals +// FIXME: There seems to be a (potential) hardware bug with the CMN instruction +// and comparison with 0. These two pieces of code should give identical +// results: +// +// rsbs r1, r1, 0 +// cmp r0, r1 +// mov r0, #0 +// it ls +// mov r0, #1 +// +// and: +// +// cmn r0, r1 +// mov r0, #0 +// it ls +// mov r0, #1 +// +// However, the CMN gives the *opposite* result when r1 is 0. This is because +// the carry flag is set in the CMP case but not in the CMN case. In short, the +// CMP instruction doesn't perform a truncate of the (logical) NOT of 0 plus the +// value of r0 and the carry bit (because the "carry bit" parameter to +// AddWithCarry is defined as 1 in this case, the carry flag will always be set +// when r0 >= 0). The CMN instruction doesn't perform a NOT of 0 so there is +// never a "carry" when this AddWithCarry is performed (because the "carry bit" +// parameter to AddWithCarry is defined as 0). +// +// The AddWithCarry in the CMP case seems to be relying upon the identity: +// +// ~x + 1 = -x +// +// However when x is 0 and unsigned, this doesn't hold: +// +// x = 0 +// ~x = 0xFFFF FFFF +// ~x + 1 = 0x1 0000 0000 +// (-x = 0) != (0x1 0000 0000 = ~x + 1) +// +// Therefore, we should disable *all* versions of CMN, especially when comparing +// against zero, until we can limit when the CMN instruction is used (when we +// know that the RHS is not 0) or when we have a hardware fix for this. +// +// (See the ARM docs for the "AddWithCarry" pseudo-code.) +// +// This is related to . +// //defm t2CMN : T2I_cmp_irs<0b1000, "cmn", // BinOpFrag<(ARMcmp node:$LHS,(ineg node:$RHS))>>; -defm t2CMNz : T2I_cmp_irs<0b1000, "cmn", - BinOpFrag<(ARMcmpZ node:$LHS,(ineg node:$RHS))>>; - +//defm t2CMNz : T2I_cmp_irs<0b1000, "cmn", +// BinOpFrag<(ARMcmpZ node:$LHS,(ineg node:$RHS))>>; +// //def : T2Pat<(ARMcmp GPR:$src, t2_so_imm_neg:$imm), // (t2CMNri GPR:$src, t2_so_imm_neg:$imm)>; - -def : T2Pat<(ARMcmpZ GPR:$src, t2_so_imm_neg:$imm), - (t2CMNzri GPR:$src, t2_so_imm_neg:$imm)>; +//def : T2Pat<(ARMcmpZ GPR:$src, t2_so_imm_neg:$imm), +// (t2CMNzri GPR:$src, t2_so_imm_neg:$imm)>; defm t2TST : T2I_cmp_irs<0b0000, "tst", BinOpFrag<(ARMcmpZ (and node:$LHS, node:$RHS), 0)>>; From benny.kra at googlemail.com Thu Aug 26 09:21:08 2010 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Thu, 26 Aug 2010 14:21:08 -0000 Subject: [llvm-commits] [llvm] r112185 - in /llvm/trunk: lib/Support/StringRef.cpp unittests/ADT/StringRefTest.cpp Message-ID: <20100826142108.E2EB12A6C12C@llvm.org> Author: d0k Date: Thu Aug 26 09:21:08 2010 New Revision: 112185 URL: http://llvm.org/viewvc/llvm-project?rev=112185&view=rev Log: Do unsigned char comparisons in StringRef::compare_lower to be more consistent with compare in corner cases. Modified: llvm/trunk/lib/Support/StringRef.cpp llvm/trunk/unittests/ADT/StringRefTest.cpp Modified: llvm/trunk/lib/Support/StringRef.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/StringRef.cpp?rev=112185&r1=112184&r2=112185&view=diff ============================================================================== --- llvm/trunk/lib/Support/StringRef.cpp (original) +++ llvm/trunk/lib/Support/StringRef.cpp Thu Aug 26 09:21:08 2010 @@ -31,14 +31,14 @@ /// compare_lower - Compare strings, ignoring case. int StringRef::compare_lower(StringRef RHS) const { for (size_t I = 0, E = min(Length, RHS.Length); I != E; ++I) { - char LHC = ascii_tolower(Data[I]); - char RHC = ascii_tolower(RHS.Data[I]); + unsigned char LHC = ascii_tolower(Data[I]); + unsigned char RHC = ascii_tolower(RHS.Data[I]); if (LHC != RHC) return LHC < RHC ? -1 : 1; } if (Length == RHS.Length) - return 0; + return 0; return Length < RHS.Length ? -1 : 1; } @@ -62,7 +62,7 @@ return Data[I] < RHS.Data[I] ? -1 : 1; } if (Length == RHS.Length) - return 0; + return 0; return Length < RHS.Length ? -1 : 1; } Modified: llvm/trunk/unittests/ADT/StringRefTest.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/ADT/StringRefTest.cpp?rev=112185&r1=112184&r2=112185&view=diff ============================================================================== --- llvm/trunk/unittests/ADT/StringRefTest.cpp (original) +++ llvm/trunk/unittests/ADT/StringRefTest.cpp Thu Aug 26 09:21:08 2010 @@ -53,6 +53,14 @@ EXPECT_EQ( 1, StringRef("aab").compare("aaa")); EXPECT_EQ(-1, StringRef("aab").compare("aabb")); EXPECT_EQ( 1, StringRef("aab").compare("aa")); + EXPECT_EQ( 1, StringRef("\xFF").compare("\1")); + + EXPECT_EQ(-1, StringRef("AaB").compare_lower("aAd")); + EXPECT_EQ( 0, StringRef("AaB").compare_lower("aab")); + EXPECT_EQ( 1, StringRef("AaB").compare_lower("AAA")); + EXPECT_EQ(-1, StringRef("AaB").compare_lower("aaBb")); + EXPECT_EQ( 1, StringRef("AaB").compare_lower("aA")); + EXPECT_EQ( 1, StringRef("\xFF").compare_lower("\1")); EXPECT_EQ(-1, StringRef("aab").compare_numeric("aad")); EXPECT_EQ( 0, StringRef("aab").compare_numeric("aab")); From nicholas at mxc.ca Thu Aug 26 10:22:29 2010 From: nicholas at mxc.ca (Nick Lewycky) Date: Thu, 26 Aug 2010 08:22:29 -0700 Subject: [llvm-commits] PATCH: add ContextualDenseMap Message-ID: <4C7686B5.7060605@mxc.ca> This patch adds a new ContextualDenseMap and sinks most of the dense map logic into DenseMapImpl. A ContextualDenseMap takes a ContextualDenseMapInfo pointer instead of just a typename. I need this for mergefuncs where I want a comparison operation that involves target data. The four map info functions (getTombstoneKey, getEmptyKey, getHashValue and isEqual) are made virtual in DenseMapImpl and then implemented once in DenseMap and again in ContextualDenseMap. This implementation is modelled after the relationship between ContextualFoldingSet and FoldingSet. Please review! Nick -------------- next part -------------- A non-text attachment was scrubbed... Name: contextual-densemap.patch Type: text/x-patch Size: 14616 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20100826/35ed333d/attachment.bin From benny.kra at googlemail.com Thu Aug 26 10:25:35 2010 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Thu, 26 Aug 2010 15:25:35 -0000 Subject: [llvm-commits] [llvm] r112189 - in /llvm/trunk: lib/Support/StringRef.cpp unittests/ADT/StringRefTest.cpp Message-ID: <20100826152535.D0C9C2A6C12C@llvm.org> Author: d0k Date: Thu Aug 26 10:25:35 2010 New Revision: 112189 URL: http://llvm.org/viewvc/llvm-project?rev=112189&view=rev Log: StringRef::compare_numeric also differed from StringRef::compare for characters > 127. Modified: llvm/trunk/lib/Support/StringRef.cpp llvm/trunk/unittests/ADT/StringRefTest.cpp Modified: llvm/trunk/lib/Support/StringRef.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/StringRef.cpp?rev=112189&r1=112188&r2=112189&view=diff ============================================================================== --- llvm/trunk/lib/Support/StringRef.cpp (original) +++ llvm/trunk/lib/Support/StringRef.cpp Thu Aug 26 10:25:35 2010 @@ -59,7 +59,7 @@ break; } } - return Data[I] < RHS.Data[I] ? -1 : 1; + return (unsigned char)Data[I] < (unsigned char)RHS.Data[I] ? -1 : 1; } if (Length == RHS.Length) return 0; Modified: llvm/trunk/unittests/ADT/StringRefTest.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/ADT/StringRefTest.cpp?rev=112189&r1=112188&r2=112189&view=diff ============================================================================== --- llvm/trunk/unittests/ADT/StringRefTest.cpp (original) +++ llvm/trunk/unittests/ADT/StringRefTest.cpp Thu Aug 26 10:25:35 2010 @@ -72,6 +72,7 @@ EXPECT_EQ( 0, StringRef("10a").compare_numeric("10a")); EXPECT_EQ( 1, StringRef("2").compare_numeric("1")); EXPECT_EQ( 0, StringRef("llvm_v1i64_ty").compare_numeric("llvm_v1i64_ty")); + EXPECT_EQ( 1, StringRef("\xFF").compare_numeric("\1")); } TEST(StringRefTest, Operators) { From gohman at apple.com Thu Aug 26 10:41:53 2010 From: gohman at apple.com (Dan Gohman) Date: Thu, 26 Aug 2010 15:41:53 -0000 Subject: [llvm-commits] [llvm] r112190 - in /llvm/trunk: include/llvm/Transforms/Utils/Cloning.h include/llvm/Transforms/Utils/ValueMapper.h lib/Linker/LinkModules.cpp lib/Target/PIC16/PIC16Passes/PIC16Cloner.cpp lib/Transforms/IPO/PartialInlining.cpp lib/Transforms/IPO/PartialSpecialization.cpp lib/Transforms/Utils/CloneFunction.cpp lib/Transforms/Utils/CloneModule.cpp lib/Transforms/Utils/InlineFunction.cpp lib/Transforms/Utils/ValueMapper.cpp test/Linker/metadata-a.ll test/Linker/metadata-b.ll Message-ID: <20100826154153.8A93D2A6C12C@llvm.org> Author: djg Date: Thu Aug 26 10:41:53 2010 New Revision: 112190 URL: http://llvm.org/viewvc/llvm-project?rev=112190&view=rev Log: Reapply r112091 and r111922, support for metadata linking, with a fix: add a flag to MapValue and friends which indicates whether any module-level mappings are being made. In the common case of inlining, no module-level mappings are needed, so MapValue doesn't need to examine non-function-local metadata, which can be very expensive in the case of a large module with really deep metadata (e.g. a large C++ program compiled with -g). This flag is a little awkward; perhaps eventually it can be moved into the ClonedCodeInfo class. Added: llvm/trunk/test/Linker/metadata-a.ll - copied unchanged from r112156, llvm/trunk/test/Linker/metadata-a.ll llvm/trunk/test/Linker/metadata-b.ll - copied unchanged from r112156, llvm/trunk/test/Linker/metadata-b.ll Modified: llvm/trunk/include/llvm/Transforms/Utils/Cloning.h llvm/trunk/include/llvm/Transforms/Utils/ValueMapper.h llvm/trunk/lib/Linker/LinkModules.cpp llvm/trunk/lib/Target/PIC16/PIC16Passes/PIC16Cloner.cpp llvm/trunk/lib/Transforms/IPO/PartialInlining.cpp llvm/trunk/lib/Transforms/IPO/PartialSpecialization.cpp llvm/trunk/lib/Transforms/Utils/CloneFunction.cpp llvm/trunk/lib/Transforms/Utils/CloneModule.cpp llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp Modified: llvm/trunk/include/llvm/Transforms/Utils/Cloning.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Transforms/Utils/Cloning.h?rev=112190&r1=112189&r2=112190&view=diff ============================================================================== --- llvm/trunk/include/llvm/Transforms/Utils/Cloning.h (original) +++ llvm/trunk/include/llvm/Transforms/Utils/Cloning.h Thu Aug 26 10:41:53 2010 @@ -121,8 +121,12 @@ /// the function from their old to new values. The final argument captures /// information about the cloned code if non-null. /// +/// If ModuleLevelChanges is false, VMap contains no non-identity GlobalValue +/// mappings. +/// Function *CloneFunction(const Function *F, ValueMap &VMap, + bool ModuleLevelChanges, ClonedCodeInfo *CodeInfo = 0); /// CloneFunction - Version of the function that doesn't need the VMap. @@ -133,13 +137,17 @@ } /// Clone OldFunc into NewFunc, transforming the old arguments into references -/// to ArgMap values. Note that if NewFunc already has basic blocks, the ones +/// to VMap values. Note that if NewFunc already has basic blocks, the ones /// cloned into it will be added to the end of the function. This function /// fills in a list of return instructions, and can optionally append the /// specified suffix to all values cloned. /// +/// If ModuleLevelChanges is false, VMap contains no non-identity GlobalValue +/// mappings. +/// void CloneFunctionInto(Function *NewFunc, const Function *OldFunc, ValueMap &VMap, + bool ModuleLevelChanges, SmallVectorImpl &Returns, const char *NameSuffix = "", ClonedCodeInfo *CodeInfo = 0); @@ -151,8 +159,13 @@ /// constant arguments cause a significant amount of code in the callee to be /// dead. Since this doesn't produce an exactly copy of the input, it can't be /// used for things like CloneFunction or CloneModule. +/// +/// If ModuleLevelChanges is false, VMap contains no non-identity GlobalValue +/// mappings. +/// void CloneAndPruneFunctionInto(Function *NewFunc, const Function *OldFunc, ValueMap &VMap, + bool ModuleLevelChanges, SmallVectorImpl &Returns, const char *NameSuffix = "", ClonedCodeInfo *CodeInfo = 0, Modified: llvm/trunk/include/llvm/Transforms/Utils/ValueMapper.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Transforms/Utils/ValueMapper.h?rev=112190&r1=112189&r2=112190&view=diff ============================================================================== --- llvm/trunk/include/llvm/Transforms/Utils/ValueMapper.h (original) +++ llvm/trunk/include/llvm/Transforms/Utils/ValueMapper.h Thu Aug 26 10:41:53 2010 @@ -22,8 +22,10 @@ class Instruction; typedef ValueMap ValueToValueMapTy; - Value *MapValue(const Value *V, ValueToValueMapTy &VM); - void RemapInstruction(Instruction *I, ValueToValueMapTy &VM); + Value *MapValue(const Value *V, ValueToValueMapTy &VM, + bool ModuleLevelChanges); + void RemapInstruction(Instruction *I, ValueToValueMapTy &VM, + bool ModuleLevelChanges); } // End llvm namespace #endif Modified: llvm/trunk/lib/Linker/LinkModules.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Linker/LinkModules.cpp?rev=112190&r1=112189&r2=112190&view=diff ============================================================================== --- llvm/trunk/lib/Linker/LinkModules.cpp (original) +++ llvm/trunk/lib/Linker/LinkModules.cpp Thu Aug 26 10:41:53 2010 @@ -460,7 +460,8 @@ // Add Src elements into Dest node. for (unsigned i = 0, e = SrcNMD->getNumOperands(); i != e; ++i) DestNMD->addOperand(cast(MapValue(SrcNMD->getOperand(i), - ValueMap))); + ValueMap, + true))); } } @@ -823,7 +824,7 @@ if (SGV->hasInitializer()) { // Only process initialized GV's // Figure out what the initializer looks like in the dest module... Constant *SInit = - cast(MapValue(SGV->getInitializer(), ValueMap)); + cast(MapValue(SGV->getInitializer(), ValueMap, true)); // Grab destination global variable or alias. GlobalValue *DGV = cast(ValueMap[SGV]->stripPointerCasts()); @@ -1005,12 +1006,30 @@ // the Source function as operands. Loop through all of the operands of the // functions and patch them up to point to the local versions... // + // This is the same as RemapInstruction, except that it avoids remapping + // instruction and basic block operands. + // for (Function::iterator BB = Dest->begin(), BE = Dest->end(); BB != BE; ++BB) - for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ++I) + for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ++I) { + // Remap operands. for (Instruction::op_iterator OI = I->op_begin(), OE = I->op_end(); OI != OE; ++OI) if (!isa(*OI) && !isa(*OI)) - *OI = MapValue(*OI, ValueMap); + *OI = MapValue(*OI, ValueMap, true); + + // Remap attached metadata. + SmallVector, 4> MDs; + I->getAllMetadata(MDs); + for (SmallVectorImpl >::iterator + MI = MDs.begin(), ME = MDs.end(); MI != ME; ++MI) { + Value *Old = MI->second; + if (!isa(Old) && !isa(Old)) { + Value *New = MapValue(Old, ValueMap, true); + if (New != Old) + I->setMetadata(MI->first, cast(New)); + } + } + } // There is no need to map the arguments anymore. for (Function::arg_iterator I = Src->arg_begin(), E = Src->arg_end(); Modified: llvm/trunk/lib/Target/PIC16/PIC16Passes/PIC16Cloner.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16Passes/PIC16Cloner.cpp?rev=112190&r1=112189&r2=112190&view=diff ============================================================================== --- llvm/trunk/lib/Target/PIC16/PIC16Passes/PIC16Cloner.cpp (original) +++ llvm/trunk/lib/Target/PIC16/PIC16Passes/PIC16Cloner.cpp Thu Aug 26 10:41:53 2010 @@ -256,7 +256,7 @@ CloneAutos(OrgF); // Now create the clone. - ClonedF = CloneFunction(OrgF, VMap); + ClonedF = CloneFunction(OrgF, VMap, /*ModuleLevelChanges=*/false); // The new function should be for interrupt line. Therefore should have // the name suffixed with IL and section attribute marked with IL. Modified: llvm/trunk/lib/Transforms/IPO/PartialInlining.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/PartialInlining.cpp?rev=112190&r1=112189&r2=112190&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/PartialInlining.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/PartialInlining.cpp Thu Aug 26 10:41:53 2010 @@ -68,7 +68,8 @@ // Clone the function, so that we can hack away on it. ValueMap VMap; - Function* duplicateFunction = CloneFunction(F, VMap); + Function* duplicateFunction = CloneFunction(F, VMap, + /*ModuleLevelChanges=*/false); duplicateFunction->setLinkage(GlobalValue::InternalLinkage); F->getParent()->getFunctionList().push_back(duplicateFunction); BasicBlock* newEntryBlock = cast(VMap[entryBlock]); Modified: llvm/trunk/lib/Transforms/IPO/PartialSpecialization.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/PartialSpecialization.cpp?rev=112190&r1=112189&r2=112190&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/IPO/PartialSpecialization.cpp (original) +++ llvm/trunk/lib/Transforms/IPO/PartialSpecialization.cpp Thu Aug 26 10:41:53 2010 @@ -74,7 +74,8 @@ deleted[arg->getArgNo()] = arg; } - Function* NF = CloneFunction(F, replacements); + Function* NF = CloneFunction(F, replacements, + /*ModuleLevelChanges=*/false); NF->setLinkage(GlobalValue::InternalLinkage); F->getParent()->getFunctionList().push_back(NF); Modified: llvm/trunk/lib/Transforms/Utils/CloneFunction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/CloneFunction.cpp?rev=112190&r1=112189&r2=112190&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/CloneFunction.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/CloneFunction.cpp Thu Aug 26 10:41:53 2010 @@ -69,10 +69,11 @@ } // Clone OldFunc into NewFunc, transforming the old arguments into references to -// ArgMap values. +// VMap values. // void llvm::CloneFunctionInto(Function *NewFunc, const Function *OldFunc, ValueToValueMapTy &VMap, + bool ModuleLevelChanges, SmallVectorImpl &Returns, const char *NameSuffix, ClonedCodeInfo *CodeInfo) { assert(NameSuffix && "NameSuffix cannot be null!"); @@ -126,7 +127,7 @@ BE = NewFunc->end(); BB != BE; ++BB) // Loop over all instructions, fixing each one as we find it... for (BasicBlock::iterator II = BB->begin(); II != BB->end(); ++II) - RemapInstruction(II, VMap); + RemapInstruction(II, VMap, ModuleLevelChanges); } /// CloneFunction - Return a copy of the specified function, but without @@ -139,6 +140,7 @@ /// Function *llvm::CloneFunction(const Function *F, ValueToValueMapTy &VMap, + bool ModuleLevelChanges, ClonedCodeInfo *CodeInfo) { std::vector ArgTypes; @@ -167,7 +169,7 @@ } SmallVector Returns; // Ignore returns cloned. - CloneFunctionInto(NewF, F, VMap, Returns, "", CodeInfo); + CloneFunctionInto(NewF, F, VMap, ModuleLevelChanges, Returns, "", CodeInfo); return NewF; } @@ -180,6 +182,7 @@ Function *NewFunc; const Function *OldFunc; ValueToValueMapTy &VMap; + bool ModuleLevelChanges; SmallVectorImpl &Returns; const char *NameSuffix; ClonedCodeInfo *CodeInfo; @@ -187,12 +190,14 @@ public: PruningFunctionCloner(Function *newFunc, const Function *oldFunc, ValueToValueMapTy &valueMap, + bool moduleLevelChanges, SmallVectorImpl &returns, const char *nameSuffix, ClonedCodeInfo *codeInfo, const TargetData *td) - : NewFunc(newFunc), OldFunc(oldFunc), VMap(valueMap), Returns(returns), - NameSuffix(nameSuffix), CodeInfo(codeInfo), TD(td) { + : NewFunc(newFunc), OldFunc(oldFunc), + VMap(valueMap), ModuleLevelChanges(moduleLevelChanges), + Returns(returns), NameSuffix(nameSuffix), CodeInfo(codeInfo), TD(td) { } /// CloneBlock - The specified block is found to be reachable, clone it and @@ -313,7 +318,7 @@ SmallVector Ops; for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) if (Constant *Op = dyn_cast_or_null(MapValue(I->getOperand(i), - VMap))) + VMap, ModuleLevelChanges))) Ops.push_back(Op); else return 0; // All operands not constant! @@ -355,6 +360,7 @@ /// used for things like CloneFunction or CloneModule. void llvm::CloneAndPruneFunctionInto(Function *NewFunc, const Function *OldFunc, ValueToValueMapTy &VMap, + bool ModuleLevelChanges, SmallVectorImpl &Returns, const char *NameSuffix, ClonedCodeInfo *CodeInfo, @@ -368,8 +374,8 @@ assert(VMap.count(II) && "No mapping from source argument specified!"); #endif - PruningFunctionCloner PFC(NewFunc, OldFunc, VMap, Returns, - NameSuffix, CodeInfo, TD); + PruningFunctionCloner PFC(NewFunc, OldFunc, VMap, ModuleLevelChanges, + Returns, NameSuffix, CodeInfo, TD); // Clone the entry block, and anything recursively reachable from it. std::vector CloneWorklist; @@ -449,7 +455,7 @@ I->setDebugLoc(DebugLoc()); } } - RemapInstruction(I, VMap); + RemapInstruction(I, VMap, ModuleLevelChanges); } } @@ -471,7 +477,7 @@ if (BasicBlock *MappedBlock = cast_or_null(VMap[PN->getIncomingBlock(pred)])) { Value *InVal = MapValue(PN->getIncomingValue(pred), - VMap); + VMap, ModuleLevelChanges); assert(InVal && "Unknown input value?"); PN->setIncomingValue(pred, InVal); PN->setIncomingBlock(pred, MappedBlock); Modified: llvm/trunk/lib/Transforms/Utils/CloneModule.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/CloneModule.cpp?rev=112190&r1=112189&r2=112190&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/CloneModule.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/CloneModule.cpp Thu Aug 26 10:41:53 2010 @@ -89,7 +89,8 @@ GlobalVariable *GV = cast(VMap[I]); if (I->hasInitializer()) GV->setInitializer(cast(MapValue(I->getInitializer(), - VMap))); + VMap, + true))); GV->setLinkage(I->getLinkage()); GV->setThreadLocal(I->isThreadLocal()); GV->setConstant(I->isConstant()); @@ -108,7 +109,7 @@ } SmallVector Returns; // Ignore returns cloned. - CloneFunctionInto(F, I, VMap, Returns); + CloneFunctionInto(F, I, VMap, /*ModuleLevelChanges=*/true, Returns); } F->setLinkage(I->getLinkage()); @@ -120,7 +121,7 @@ GlobalAlias *GA = cast(VMap[I]); GA->setLinkage(I->getLinkage()); if (const Constant* C = I->getAliasee()) - GA->setAliasee(cast(MapValue(C, VMap))); + GA->setAliasee(cast(MapValue(C, VMap, true))); } // And named metadata.... @@ -129,23 +130,8 @@ const NamedMDNode &NMD = *I; NamedMDNode *NewNMD = New->getOrInsertNamedMetadata(NMD.getName()); for (unsigned i = 0, e = NMD.getNumOperands(); i != e; ++i) - NewNMD->addOperand(cast(MapValue(NMD.getOperand(i), VMap))); + NewNMD->addOperand(cast(MapValue(NMD.getOperand(i), VMap, true))); } - // Update metadata attach with instructions. - for (Module::iterator MI = New->begin(), ME = New->end(); MI != ME; ++MI) - for (Function::iterator FI = MI->begin(), FE = MI->end(); - FI != FE; ++FI) - for (BasicBlock::iterator BI = FI->begin(), BE = FI->end(); - BI != BE; ++BI) { - SmallVector, 4 > MDs; - BI->getAllMetadata(MDs); - for (SmallVector, 4>::iterator - MDI = MDs.begin(), MDE = MDs.end(); MDI != MDE; ++MDI) { - Value *MappedValue = MapValue(MDI->second, VMap); - if (MDI->second != MappedValue && MappedValue) - BI->setMetadata(MDI->first, cast(MappedValue)); - } - } return New; } Modified: llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp?rev=112190&r1=112189&r2=112190&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/InlineFunction.cpp Thu Aug 26 10:41:53 2010 @@ -365,7 +365,8 @@ // have no dead or constant instructions leftover after inlining occurs // (which can happen, e.g., because an argument was constant), but we'll be // happy with whatever the cloner can do. - CloneAndPruneFunctionInto(Caller, CalledFunc, VMap, Returns, ".i", + CloneAndPruneFunctionInto(Caller, CalledFunc, VMap, + /*ModuleLevelChanges=*/false, Returns, ".i", &InlinedFunctionInfo, IFI.TD, TheCall); // Remember the first block that is newly cloned over. Modified: llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp?rev=112190&r1=112189&r2=112190&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/ValueMapper.cpp Thu Aug 26 10:41:53 2010 @@ -20,28 +20,51 @@ #include "llvm/ADT/SmallVector.h" using namespace llvm; -Value *llvm::MapValue(const Value *V, ValueToValueMapTy &VM) { +Value *llvm::MapValue(const Value *V, ValueToValueMapTy &VM, + bool ModuleLevelChanges) { Value *&VMSlot = VM[V]; if (VMSlot) return VMSlot; // Does it exist in the map yet? // NOTE: VMSlot can be invalidated by any reference to VM, which can grow the // DenseMap. This includes any recursive calls to MapValue. - // Global values and non-function-local metadata do not need to be seeded into - // the VM if they are using the identity mapping. + // Global values do not need to be seeded into the VM if they + // are using the identity mapping. if (isa(V) || isa(V) || isa(V) || - (isa(V) && !cast(V)->isFunctionLocal())) + (isa(V) && !cast(V)->isFunctionLocal() && + !ModuleLevelChanges)) return VMSlot = const_cast(V); if (const MDNode *MD = dyn_cast(V)) { - SmallVector Elts; - for (unsigned i = 0, e = MD->getNumOperands(); i != e; ++i) - Elts.push_back(MD->getOperand(i) ? MapValue(MD->getOperand(i), VM) : 0); - return VM[V] = MDNode::get(V->getContext(), Elts.data(), Elts.size()); + // Start by assuming that we'll use the identity mapping. + VMSlot = const_cast(V); + + // Check all operands to see if any need to be remapped. + for (unsigned i = 0, e = MD->getNumOperands(); i != e; ++i) { + Value *OP = MD->getOperand(i); + if (!OP || MapValue(OP, VM, ModuleLevelChanges) == OP) continue; + + // Ok, at least one operand needs remapping. + MDNode *Dummy = MDNode::getTemporary(V->getContext(), 0, 0); + VM[V] = Dummy; + SmallVector Elts; + Elts.reserve(MD->getNumOperands()); + for (i = 0; i != e; ++i) + Elts.push_back(MD->getOperand(i) ? + MapValue(MD->getOperand(i), VM, ModuleLevelChanges) : 0); + MDNode *NewMD = MDNode::get(V->getContext(), Elts.data(), Elts.size()); + Dummy->replaceAllUsesWith(NewMD); + MDNode::deleteTemporary(Dummy); + return VM[V] = NewMD; + } + + // No operands needed remapping; keep the identity map. + return const_cast(V); } Constant *C = const_cast(dyn_cast(V)); - if (C == 0) return 0; + if (C == 0) + return 0; if (isa(C) || isa(C) || isa(C) || isa(C) || @@ -51,7 +74,7 @@ if (ConstantArray *CA = dyn_cast(C)) { for (User::op_iterator b = CA->op_begin(), i = b, e = CA->op_end(); i != e; ++i) { - Value *MV = MapValue(*i, VM); + Value *MV = MapValue(*i, VM, ModuleLevelChanges); if (MV != *i) { // This array must contain a reference to a global, make a new array // and return it. @@ -62,7 +85,8 @@ Values.push_back(cast(*j)); Values.push_back(cast(MV)); for (++i; i != e; ++i) - Values.push_back(cast(MapValue(*i, VM))); + Values.push_back(cast(MapValue(*i, VM, + ModuleLevelChanges))); return VM[V] = ConstantArray::get(CA->getType(), Values); } } @@ -72,7 +96,7 @@ if (ConstantStruct *CS = dyn_cast(C)) { for (User::op_iterator b = CS->op_begin(), i = b, e = CS->op_end(); i != e; ++i) { - Value *MV = MapValue(*i, VM); + Value *MV = MapValue(*i, VM, ModuleLevelChanges); if (MV != *i) { // This struct must contain a reference to a global, make a new struct // and return it. @@ -83,7 +107,8 @@ Values.push_back(cast(*j)); Values.push_back(cast(MV)); for (++i; i != e; ++i) - Values.push_back(cast(MapValue(*i, VM))); + Values.push_back(cast(MapValue(*i, VM, + ModuleLevelChanges))); return VM[V] = ConstantStruct::get(CS->getType(), Values); } } @@ -93,14 +118,14 @@ if (ConstantExpr *CE = dyn_cast(C)) { std::vector Ops; for (User::op_iterator i = CE->op_begin(), e = CE->op_end(); i != e; ++i) - Ops.push_back(cast(MapValue(*i, VM))); + Ops.push_back(cast(MapValue(*i, VM, ModuleLevelChanges))); return VM[V] = CE->getWithOperands(Ops); } if (ConstantVector *CV = dyn_cast(C)) { for (User::op_iterator b = CV->op_begin(), i = b, e = CV->op_end(); i != e; ++i) { - Value *MV = MapValue(*i, VM); + Value *MV = MapValue(*i, VM, ModuleLevelChanges); if (MV != *i) { // This vector value must contain a reference to a global, make a new // vector constant and return it. @@ -111,7 +136,8 @@ Values.push_back(cast(*j)); Values.push_back(cast(MV)); for (++i; i != e; ++i) - Values.push_back(cast(MapValue(*i, VM))); + Values.push_back(cast(MapValue(*i, VM, + ModuleLevelChanges))); return VM[V] = ConstantVector::get(Values); } } @@ -119,19 +145,33 @@ } BlockAddress *BA = cast(C); - Function *F = cast(MapValue(BA->getFunction(), VM)); - BasicBlock *BB = cast_or_null(MapValue(BA->getBasicBlock(),VM)); + Function *F = cast(MapValue(BA->getFunction(), VM, + ModuleLevelChanges)); + BasicBlock *BB = cast_or_null(MapValue(BA->getBasicBlock(),VM, + ModuleLevelChanges)); return VM[V] = BlockAddress::get(F, BB ? BB : BA->getBasicBlock()); } /// RemapInstruction - Convert the instruction operands from referencing the /// current values into those specified by VMap. /// -void llvm::RemapInstruction(Instruction *I, ValueToValueMapTy &VMap) { +void llvm::RemapInstruction(Instruction *I, ValueToValueMapTy &VMap, + bool ModuleLevelChanges) { + // Remap operands. for (User::op_iterator op = I->op_begin(), E = I->op_end(); op != E; ++op) { - Value *V = MapValue(*op, VMap); + Value *V = MapValue(*op, VMap, ModuleLevelChanges); assert(V && "Referenced value not in value map!"); *op = V; } -} + // Remap attached metadata. + SmallVector, 4> MDs; + I->getAllMetadata(MDs); + for (SmallVectorImpl >::iterator + MI = MDs.begin(), ME = MDs.end(); MI != ME; ++MI) { + Value *Old = MI->second; + Value *New = MapValue(Old, VMap, ModuleLevelChanges); + if (New != Old) + I->setMetadata(MI->first, cast(New)); + } +} From gohman at apple.com Thu Aug 26 10:50:25 2010 From: gohman at apple.com (Dan Gohman) Date: Thu, 26 Aug 2010 15:50:25 -0000 Subject: [llvm-commits] [llvm] r112191 - /llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Message-ID: <20100826155025.42FD72A6C12C@llvm.org> Author: djg Date: Thu Aug 26 10:50:25 2010 New Revision: 112191 URL: http://llvm.org/viewvc/llvm-project?rev=112191&view=rev Log: Revert r112176; it broke test/CodeGen/Thumb2/thumb2-cmn.ll. Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=112191&r1=112190&r2=112191&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Thu Aug 26 10:50:25 2010 @@ -2141,60 +2141,18 @@ defm t2CMPz : T2I_cmp_irs<0b1101, "cmp", BinOpFrag<(ARMcmpZ node:$LHS, node:$RHS)>>; -// FIXME: There seems to be a (potential) hardware bug with the CMN instruction -// and comparison with 0. These two pieces of code should give identical -// results: -// -// rsbs r1, r1, 0 -// cmp r0, r1 -// mov r0, #0 -// it ls -// mov r0, #1 -// -// and: -// -// cmn r0, r1 -// mov r0, #0 -// it ls -// mov r0, #1 -// -// However, the CMN gives the *opposite* result when r1 is 0. This is because -// the carry flag is set in the CMP case but not in the CMN case. In short, the -// CMP instruction doesn't perform a truncate of the (logical) NOT of 0 plus the -// value of r0 and the carry bit (because the "carry bit" parameter to -// AddWithCarry is defined as 1 in this case, the carry flag will always be set -// when r0 >= 0). The CMN instruction doesn't perform a NOT of 0 so there is -// never a "carry" when this AddWithCarry is performed (because the "carry bit" -// parameter to AddWithCarry is defined as 0). -// -// The AddWithCarry in the CMP case seems to be relying upon the identity: -// -// ~x + 1 = -x -// -// However when x is 0 and unsigned, this doesn't hold: -// -// x = 0 -// ~x = 0xFFFF FFFF -// ~x + 1 = 0x1 0000 0000 -// (-x = 0) != (0x1 0000 0000 = ~x + 1) -// -// Therefore, we should disable *all* versions of CMN, especially when comparing -// against zero, until we can limit when the CMN instruction is used (when we -// know that the RHS is not 0) or when we have a hardware fix for this. -// -// (See the ARM docs for the "AddWithCarry" pseudo-code.) -// -// This is related to . -// +//FIXME: Disable CMN, as CCodes are backwards from compare expectations +// Compare-to-zero still works out, just not the relationals //defm t2CMN : T2I_cmp_irs<0b1000, "cmn", // BinOpFrag<(ARMcmp node:$LHS,(ineg node:$RHS))>>; -//defm t2CMNz : T2I_cmp_irs<0b1000, "cmn", -// BinOpFrag<(ARMcmpZ node:$LHS,(ineg node:$RHS))>>; -// +defm t2CMNz : T2I_cmp_irs<0b1000, "cmn", + BinOpFrag<(ARMcmpZ node:$LHS,(ineg node:$RHS))>>; + //def : T2Pat<(ARMcmp GPR:$src, t2_so_imm_neg:$imm), // (t2CMNri GPR:$src, t2_so_imm_neg:$imm)>; -//def : T2Pat<(ARMcmpZ GPR:$src, t2_so_imm_neg:$imm), -// (t2CMNzri GPR:$src, t2_so_imm_neg:$imm)>; + +def : T2Pat<(ARMcmpZ GPR:$src, t2_so_imm_neg:$imm), + (t2CMNzri GPR:$src, t2_so_imm_neg:$imm)>; defm t2TST : T2I_cmp_irs<0b0000, "tst", BinOpFrag<(ARMcmpZ (and node:$LHS, node:$RHS), 0)>>; From grosbach at apple.com Thu Aug 26 12:02:47 2010 From: grosbach at apple.com (Jim Grosbach) Date: Thu, 26 Aug 2010 17:02:47 -0000 Subject: [llvm-commits] [llvm] r112195 - /llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Message-ID: <20100826170247.B7F9A2A6C12E@llvm.org> Author: grosbach Date: Thu Aug 26 12:02:47 2010 New Revision: 112195 URL: http://llvm.org/viewvc/llvm-project?rev=112195&view=rev Log: Restrict the register to tGPR to make sure the str instruction will be encodable as a 16-bit wide instruction. Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=112195&r1=112194&r2=112195&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Thu Aug 26 12:02:47 2010 @@ -2407,7 +2407,7 @@ D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, D11, D12, D13, D14, D15, D16, D17, D18, D19, D20, D21, D22, D23, D24, D25, D26, D27, D28, D29, D30, D31 ], hasSideEffects = 1, isBarrier = 1 in { - def t2Int_eh_sjlj_setjmp : Thumb2XI<(outs), (ins GPR:$src, tGPR:$val), + def t2Int_eh_sjlj_setjmp : Thumb2XI<(outs), (ins tGPR:$src, tGPR:$val), AddrModeNone, SizeSpecial, NoItinerary, "mov\t$val, pc\t${:comment} begin eh.setjmp\n\t" "adds\t$val, #7\n\t" @@ -2416,14 +2416,14 @@ "b\t1f\n\t" "movs\tr0, #1\t${:comment} end eh.setjmp\n\t" "1:", "", - [(set R0, (ARMeh_sjlj_setjmp GPR:$src, tGPR:$val))]>, + [(set R0, (ARMeh_sjlj_setjmp tGPR:$src, tGPR:$val))]>, Requires<[IsThumb2, HasVFP2]>; } let Defs = [ R0, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, LR ], hasSideEffects = 1, isBarrier = 1 in { - def t2Int_eh_sjlj_setjmp_nofp : Thumb2XI<(outs), (ins GPR:$src, tGPR:$val), + def t2Int_eh_sjlj_setjmp_nofp : Thumb2XI<(outs), (ins tGPR:$src, tGPR:$val), AddrModeNone, SizeSpecial, NoItinerary, "mov\t$val, pc\t${:comment} begin eh.setjmp\n\t" "adds\t$val, #7\n\t" @@ -2432,7 +2432,7 @@ "b\t1f\n\t" "movs\tr0, #1\t${:comment} end eh.setjmp\n\t" "1:", "", - [(set R0, (ARMeh_sjlj_setjmp GPR:$src, tGPR:$val))]>, + [(set R0, (ARMeh_sjlj_setjmp tGPR:$src, tGPR:$val))]>, Requires<[IsThumb2, NoVFP]>; } From benny.kra at googlemail.com Thu Aug 26 12:23:02 2010 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Thu, 26 Aug 2010 17:23:02 -0000 Subject: [llvm-commits] [llvm] r112197 - /llvm/trunk/lib/MC/ELFObjectWriter.cpp Message-ID: <20100826172302.3121D2A6C12C@llvm.org> Author: d0k Date: Thu Aug 26 12:23:02 2010 New Revision: 112197 URL: http://llvm.org/viewvc/llvm-project?rev=112197&view=rev Log: MCELF: Compensate for the addend on i386. Patch by Roman Divacky, with some cleanups. Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=112197&r1=112196&r2=112197&view=diff ============================================================================== --- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original) +++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Thu Aug 26 12:23:02 2010 @@ -460,24 +460,17 @@ const MCFixup &Fixup, MCValue Target, uint64_t &FixedValue) { - unsigned IsPCRel = isFixupKindX86PCRel(Fixup.getKind()); - - uint64_t FixupOffset = - Layout.getFragmentOffset(Fragment) + Fixup.getOffset(); - int64_t Value; int64_t Addend = 0; unsigned Index = 0; - unsigned Type; - - Value = Target.getConstant(); if (!Target.isAbsolute()) { const MCSymbol *Symbol = &Target.getSymA()->getSymbol(); MCSymbolData &SD = Asm.getSymbolData(*Symbol); const MCSymbolData *Base = Asm.getAtom(Layout, &SD); + MCFragment *F = SD.getFragment(); + int64_t Value = Target.getConstant(); if (Base) { - MCFragment *F = SD.getFragment(); if (F && (!Symbol->isInSection() || SD.isCommon())) { Index = F->getParent()->getOrdinal() + LocalSymbolData.size() + 1; Value += Layout.getSymbolAddress(&SD); @@ -486,9 +479,9 @@ if (Base != &SD) Value += Layout.getSymbolAddress(&SD) - Layout.getSymbolAddress(Base); Addend = Value; - Value = 0; + // Compensate for the addend on i386. + FixedValue = Is64Bit ? 0 : Value; } else { - MCFragment *F = SD.getFragment(); if (F) { // Index of the section in .symtab against this symbol // is being relocated + 2 (empty section + abs. symbols). @@ -505,6 +498,8 @@ } // determine the type of the relocation + bool IsPCRel = isFixupKindX86PCRel(Fixup.getKind()); + unsigned Type; if (Is64Bit) { if (IsPCRel) { Type = ELF::R_X86_64_PC32; @@ -540,8 +535,6 @@ } } - FixedValue = Value; - ELFRelocationEntry ERE; if (Is64Bit) { @@ -554,7 +547,7 @@ ERE.r_info = ERE32.r_info; } - ERE.r_offset = FixupOffset; + ERE.r_offset = Layout.getFragmentOffset(Fragment) + Fixup.getOffset(); if (HasRelocationAddend) ERE.r_addend = Addend; From resistor at mac.com Thu Aug 26 12:40:24 2010 From: resistor at mac.com (Owen Anderson) Date: Thu, 26 Aug 2010 17:40:24 -0000 Subject: [llvm-commits] [llvm] r112198 - in /llvm/trunk: lib/Transforms/Scalar/JumpThreading.cpp test/Transforms/JumpThreading/2010-08-26-and.ll Message-ID: <20100826174024.58E092A6C12C@llvm.org> Author: resistor Date: Thu Aug 26 12:40:24 2010 New Revision: 112198 URL: http://llvm.org/viewvc/llvm-project?rev=112198&view=rev Log: Make JumpThreading smart enough to properly thread StrSwitch when it's compiled with clang++. Added: llvm/trunk/test/Transforms/JumpThreading/2010-08-26-and.ll Modified: llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp Modified: llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp?rev=112198&r1=112197&r2=112198&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp Thu Aug 26 12:40:24 2010 @@ -322,6 +322,12 @@ if (isa(InVal) || isa(InVal)) { ConstantInt *CI = dyn_cast(InVal); Result.push_back(std::make_pair(CI, PN->getIncomingBlock(i))); + } else if (LVI) { + Constant *CI = LVI->getConstantOnEdge(InVal, + PN->getIncomingBlock(i), BB); + ConstantInt *CInt = dyn_cast_or_null(CI); + if (CInt) + Result.push_back(std::make_pair(CInt, PN->getIncomingBlock(i))); } } return !Result.empty(); @@ -367,6 +373,10 @@ } } return !Result.empty(); + + // Try to process a few other binary operator patterns. + } else if (isa(I)) { + } // Handle the NOT form of XOR. @@ -384,6 +394,21 @@ cast(ConstantExpr::getNot(Result[i].first)); return true; } + + // Try to simplify some other binary operator values. + } else if (BinaryOperator *BO = dyn_cast(I)) { + // AND or OR of a value with itself is that value. + ConstantInt *CI = dyn_cast(BO->getOperand(1)); + if (CI && (BO->getOpcode() == Instruction::And || + BO->getOpcode() == Instruction::Or)) { + SmallVector, 8> LHSVals; + ComputeValueKnownInPredecessors(BO->getOperand(0), BB, LHSVals); + for (unsigned i = 0, e = LHSVals.size(); i != e; ++i) + if (LHSVals[i].first == CI) + Result.push_back(std::make_pair(CI, LHSVals[i].second)); + + return !Result.empty(); + } } // Handle compare with phi operand, where the PHI is defined in this block. @@ -423,28 +448,63 @@ // If comparing a live-in value against a constant, see if we know the // live-in value on any predecessors. if (LVI && isa(Cmp->getOperand(1)) && - Cmp->getType()->isIntegerTy() && // Not vector compare. - (!isa(Cmp->getOperand(0)) || - cast(Cmp->getOperand(0))->getParent() != BB)) { - Constant *RHSCst = cast(Cmp->getOperand(1)); + Cmp->getType()->isIntegerTy()) { + if (!isa(Cmp->getOperand(0)) || + cast(Cmp->getOperand(0))->getParent() != BB) { + Constant *RHSCst = cast(Cmp->getOperand(1)); + + for (pred_iterator PI = pred_begin(BB), E = pred_end(BB);PI != E; ++PI){ + BasicBlock *P = *PI; + // If the value is known by LazyValueInfo to be a constant in a + // predecessor, use that information to try to thread this block. + LazyValueInfo::Tristate Res = + LVI->getPredicateOnEdge(Cmp->getPredicate(), Cmp->getOperand(0), + RHSCst, P, BB); + if (Res == LazyValueInfo::Unknown) + continue; - for (pred_iterator PI = pred_begin(BB), E = pred_end(BB); PI != E; ++PI) { - BasicBlock *P = *PI; - // If the value is known by LazyValueInfo to be a constant in a - // predecessor, use that information to try to thread this block. - LazyValueInfo::Tristate - Res = LVI->getPredicateOnEdge(Cmp->getPredicate(), Cmp->getOperand(0), - RHSCst, P, BB); - if (Res == LazyValueInfo::Unknown) - continue; + Constant *ResC = ConstantInt::get(Cmp->getType(), Res); + Result.push_back(std::make_pair(cast(ResC), P)); + } - Constant *ResC = ConstantInt::get(Cmp->getType(), Res); - Result.push_back(std::make_pair(cast(ResC), P)); + return !Result.empty(); + } + + // Try to find a constant value for the LHS of an equality comparison, + // and evaluate it statically if we can. + if (Cmp->getPredicate() == CmpInst::ICMP_EQ || + Cmp->getPredicate() == CmpInst::ICMP_NE) { + SmallVector, 8> LHSVals; + ComputeValueKnownInPredecessors(I->getOperand(0), BB, LHSVals); + + ConstantInt *True = ConstantInt::getTrue(I->getContext()); + ConstantInt *False = ConstantInt::getFalse(I->getContext()); + if (Cmp->getPredicate() == CmpInst::ICMP_NE) std::swap(True, False); + + for (unsigned i = 0, e = LHSVals.size(); i != e; ++i) { + if (LHSVals[i].first == Cmp->getOperand(1)) + Result.push_back(std::make_pair(True, LHSVals[i].second)); + else + Result.push_back(std::make_pair(False, LHSVals[i].second)); + } + + return !Result.empty(); } - - return !Result.empty(); } } + + if (LVI) { + // If all else fails, see if LVI can figure out a constant value for us. + Constant *CI = LVI->getConstant(V, BB); + ConstantInt *CInt = dyn_cast_or_null(CI); + if (CInt) { + for (pred_iterator PI = pred_begin(BB), E = pred_end(BB); PI != E; ++PI) + Result.push_back(std::make_pair(CInt, *PI)); + } + + return !Result.empty(); + } + return false; } Added: llvm/trunk/test/Transforms/JumpThreading/2010-08-26-and.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/JumpThreading/2010-08-26-and.ll?rev=112198&view=auto ============================================================================== --- llvm/trunk/test/Transforms/JumpThreading/2010-08-26-and.ll (added) +++ llvm/trunk/test/Transforms/JumpThreading/2010-08-26-and.ll Thu Aug 26 12:40:24 2010 @@ -0,0 +1,162 @@ +; RUN: opt -jump-threading -enable-jump-threading-lvi -S < %s | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin10.0.0" + +%class.StringSwitch = type { i8*, i32, i32, i8 } + + at .str = private constant [4 x i8] c"red\00" ; <[4 x i8]*> [#uses=1] + at .str1 = private constant [7 x i8] c"orange\00" ; <[7 x i8]*> [#uses=1] + at .str2 = private constant [7 x i8] c"yellow\00" ; <[7 x i8]*> [#uses=1] + at .str3 = private constant [6 x i8] c"green\00" ; <[6 x i8]*> [#uses=1] + at .str4 = private constant [5 x i8] c"blue\00" ; <[5 x i8]*> [#uses=1] + at .str5 = private constant [7 x i8] c"indigo\00" ; <[7 x i8]*> [#uses=1] + at .str6 = private constant [7 x i8] c"violet\00" ; <[7 x i8]*> [#uses=1] + at .str7 = private constant [12 x i8] c"Color = %d\0A\00" ; <[12 x i8]*> [#uses=1] + +define i32 @main(i32 %argc, i8** nocapture %argv) nounwind ssp { +entry: + %cmp142 = icmp sgt i32 %argc, 1 ; [#uses=1] + br i1 %cmp142, label %bb.nph, label %for.end + +bb.nph: ; preds = %entry + %tmp = add i32 %argc, -2 ; [#uses=1] + %tmp144 = zext i32 %tmp to i64 ; [#uses=1] + %tmp145 = add i64 %tmp144, 1 ; [#uses=1] + br label %land.lhs.true.i + +land.lhs.true.i: ; preds = %_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit134, %bb.nph + %retval.0.i.pre161 = phi i32 [ undef, %bb.nph ], [ %retval.0.i.pre, %_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit134 ] ; [#uses=3] + %indvar = phi i64 [ 0, %bb.nph ], [ %tmp146, %_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit134 ] ; [#uses=1] + %tmp146 = add i64 %indvar, 1 ; [#uses=3] + %arrayidx = getelementptr i8** %argv, i64 %tmp146 ; [#uses=1] + %tmp6 = load i8** %arrayidx, align 8 ; [#uses=8] + %call.i.i = call i64 @strlen(i8* %tmp6) nounwind ; [#uses=1] + %conv.i.i = trunc i64 %call.i.i to i32 ; [#uses=6]\ +; CHECK: switch i32 %conv.i.i +; CHECK-NOT: if.then.i40 +; CHECK: } + switch i32 %conv.i.i, label %_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit [ + i32 3, label %land.lhs.true5.i + i32 6, label %land.lhs.true5.i37 + ] + +land.lhs.true5.i: ; preds = %land.lhs.true.i + %call.i = call i32 @memcmp(i8* getelementptr inbounds ([4 x i8]* @.str, i64 0, i64 0), i8* %tmp6, i64 4) nounwind ; [#uses=1] + %cmp9.i = icmp eq i32 %call.i, 0 ; [#uses=1] + br i1 %cmp9.i, label %_ZN12StringSwitchI5ColorE4CaseILj4EEERS1_RAT__KcRKS0_.exit, label %_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit + +_ZN12StringSwitchI5ColorE4CaseILj4EEERS1_RAT__KcRKS0_.exit: ; preds = %land.lhs.true5.i + br label %_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit + +land.lhs.true5.i37: ; preds = %land.lhs.true.i + %call.i35 = call i32 @memcmp(i8* getelementptr inbounds ([7 x i8]* @.str1, i64 0, i64 0), i8* %tmp6, i64 7) nounwind ; [#uses=1] + %cmp9.i36 = icmp eq i32 %call.i35, 0 ; [#uses=1] + br i1 %cmp9.i36, label %if.then.i40, label %_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit + +if.then.i40: ; preds = %land.lhs.true5.i37 + br label %_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit + +_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit: ; preds = %if.then.i40, %land.lhs.true5.i37, %_ZN12StringSwitchI5ColorE4CaseILj4EEERS1_RAT__KcRKS0_.exit, %land.lhs.true5.i, %land.lhs.true.i + %retval.0.i.pre159 = phi i32 [ 1, %_ZN12StringSwitchI5ColorE4CaseILj4EEERS1_RAT__KcRKS0_.exit ], [ %retval.0.i.pre161, %land.lhs.true5.i37 ], [ 2, %if.then.i40 ], [ %retval.0.i.pre161, %land.lhs.true5.i ], [ %retval.0.i.pre161, %land.lhs.true.i ] ; [#uses=2] + %tmp2.i44 = phi i8 [ 1, %_ZN12StringSwitchI5ColorE4CaseILj4EEERS1_RAT__KcRKS0_.exit ], [ 0, %land.lhs.true5.i37 ], [ 1, %if.then.i40 ], [ 0, %land.lhs.true5.i ], [ 0, %land.lhs.true.i ] ; [#uses=3] + %tobool.i46 = icmp eq i8 %tmp2.i44, 0 ; [#uses=1] + %cmp.i49 = icmp eq i32 %conv.i.i, 6 ; [#uses=1] + %or.cond = and i1 %tobool.i46, %cmp.i49 ; [#uses=1] + br i1 %or.cond, label %land.lhs.true5.i55, label %_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit60 + +land.lhs.true5.i55: ; preds = %_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit + %call.i53 = call i32 @memcmp(i8* getelementptr inbounds ([7 x i8]* @.str2, i64 0, i64 0), i8* %tmp6, i64 7) nounwind ; [#uses=1] + %cmp9.i54 = icmp eq i32 %call.i53, 0 ; [#uses=1] + br i1 %cmp9.i54, label %if.then.i58, label %_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit60 + +if.then.i58: ; preds = %land.lhs.true5.i55 + br label %_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit60 + +_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit60: ; preds = %if.then.i58, %land.lhs.true5.i55, %_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit + %retval.0.i.pre158 = phi i32 [ %retval.0.i.pre159, %_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit ], [ %retval.0.i.pre159, %land.lhs.true5.i55 ], [ 3, %if.then.i58 ] ; [#uses=2] + %tmp2.i63 = phi i8 [ %tmp2.i44, %_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit ], [ %tmp2.i44, %land.lhs.true5.i55 ], [ 1, %if.then.i58 ] ; [#uses=3] + %tmp14.i64 = and i8 %tmp2.i63, 1 ; [#uses=1] + %tobool.i65 = icmp eq i8 %tmp14.i64, 0 ; [#uses=1] + %cmp.i68 = icmp eq i32 %conv.i.i, 5 ; [#uses=1] + %or.cond168 = and i1 %tobool.i65, %cmp.i68 ; [#uses=1] + br i1 %or.cond168, label %land.lhs.true5.i74, label %_ZN12StringSwitchI5ColorE4CaseILj6EEERS1_RAT__KcRKS0_.exit + +land.lhs.true5.i74: ; preds = %_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit60 + %call.i72 = call i32 @memcmp(i8* getelementptr inbounds ([6 x i8]* @.str3, i64 0, i64 0), i8* %tmp6, i64 6) nounwind ; [#uses=1] + %cmp9.i73 = icmp eq i32 %call.i72, 0 ; [#uses=1] + br i1 %cmp9.i73, label %if.then.i77, label %_ZN12StringSwitchI5ColorE4CaseILj6EEERS1_RAT__KcRKS0_.exit + +if.then.i77: ; preds = %land.lhs.true5.i74 + br label %_ZN12StringSwitchI5ColorE4CaseILj6EEERS1_RAT__KcRKS0_.exit + +_ZN12StringSwitchI5ColorE4CaseILj6EEERS1_RAT__KcRKS0_.exit: ; preds = %if.then.i77, %land.lhs.true5.i74, %_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit60 + %retval.0.i.pre157 = phi i32 [ %retval.0.i.pre158, %_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit60 ], [ %retval.0.i.pre158, %land.lhs.true5.i74 ], [ 4, %if.then.i77 ] ; [#uses=2] + %tmp2.i81 = phi i8 [ %tmp2.i63, %_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit60 ], [ %tmp2.i63, %land.lhs.true5.i74 ], [ 1, %if.then.i77 ] ; [#uses=3] + %tmp14.i82 = and i8 %tmp2.i81, 1 ; [#uses=1] + %tobool.i83 = icmp eq i8 %tmp14.i82, 0 ; [#uses=1] + %cmp.i86 = icmp eq i32 %conv.i.i, 4 ; [#uses=1] + %or.cond169 = and i1 %tobool.i83, %cmp.i86 ; [#uses=1] + br i1 %or.cond169, label %land.lhs.true5.i92, label %_ZN12StringSwitchI5ColorE4CaseILj5EEERS1_RAT__KcRKS0_.exit + +land.lhs.true5.i92: ; preds = %_ZN12StringSwitchI5ColorE4CaseILj6EEERS1_RAT__KcRKS0_.exit + %call.i90 = call i32 @memcmp(i8* getelementptr inbounds ([5 x i8]* @.str4, i64 0, i64 0), i8* %tmp6, i64 5) nounwind ; [#uses=1] + %cmp9.i91 = icmp eq i32 %call.i90, 0 ; [#uses=1] + br i1 %cmp9.i91, label %if.then.i95, label %_ZN12StringSwitchI5ColorE4CaseILj5EEERS1_RAT__KcRKS0_.exit + +if.then.i95: ; preds = %land.lhs.true5.i92 + br label %_ZN12StringSwitchI5ColorE4CaseILj5EEERS1_RAT__KcRKS0_.exit + +_ZN12StringSwitchI5ColorE4CaseILj5EEERS1_RAT__KcRKS0_.exit: ; preds = %if.then.i95, %land.lhs.true5.i92, %_ZN12StringSwitchI5ColorE4CaseILj6EEERS1_RAT__KcRKS0_.exit + %retval.0.i.pre156 = phi i32 [ %retval.0.i.pre157, %_ZN12StringSwitchI5ColorE4CaseILj6EEERS1_RAT__KcRKS0_.exit ], [ %retval.0.i.pre157, %land.lhs.true5.i92 ], [ 5, %if.then.i95 ] ; [#uses=2] + %tmp2.i99 = phi i8 [ %tmp2.i81, %_ZN12StringSwitchI5ColorE4CaseILj6EEERS1_RAT__KcRKS0_.exit ], [ %tmp2.i81, %land.lhs.true5.i92 ], [ 1, %if.then.i95 ] ; [#uses=3] + %tmp14.i100 = and i8 %tmp2.i99, 1 ; [#uses=1] + %tobool.i101 = icmp eq i8 %tmp14.i100, 0 ; [#uses=1] + %cmp.i104 = icmp eq i32 %conv.i.i, 6 ; [#uses=1] + %or.cond170 = and i1 %tobool.i101, %cmp.i104 ; [#uses=1] + br i1 %or.cond170, label %land.lhs.true5.i110, label %_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit115 + +land.lhs.true5.i110: ; preds = %_ZN12StringSwitchI5ColorE4CaseILj5EEERS1_RAT__KcRKS0_.exit + %call.i108 = call i32 @memcmp(i8* getelementptr inbounds ([7 x i8]* @.str5, i64 0, i64 0), i8* %tmp6, i64 7) nounwind ; [#uses=1] + %cmp9.i109 = icmp eq i32 %call.i108, 0 ; [#uses=1] + br i1 %cmp9.i109, label %if.then.i113, label %_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit115 + +if.then.i113: ; preds = %land.lhs.true5.i110 + br label %_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit115 + +_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit115: ; preds = %if.then.i113, %land.lhs.true5.i110, %_ZN12StringSwitchI5ColorE4CaseILj5EEERS1_RAT__KcRKS0_.exit + %retval.0.i.pre155 = phi i32 [ %retval.0.i.pre156, %_ZN12StringSwitchI5ColorE4CaseILj5EEERS1_RAT__KcRKS0_.exit ], [ %retval.0.i.pre156, %land.lhs.true5.i110 ], [ 6, %if.then.i113 ] ; [#uses=2] + %tmp2.i118 = phi i8 [ %tmp2.i99, %_ZN12StringSwitchI5ColorE4CaseILj5EEERS1_RAT__KcRKS0_.exit ], [ %tmp2.i99, %land.lhs.true5.i110 ], [ 1, %if.then.i113 ] ; [#uses=3] + %tmp14.i119 = and i8 %tmp2.i118, 1 ; [#uses=1] + %tobool.i120 = icmp eq i8 %tmp14.i119, 0 ; [#uses=1] + %cmp.i123 = icmp eq i32 %conv.i.i, 6 ; [#uses=1] + %or.cond171 = and i1 %tobool.i120, %cmp.i123 ; [#uses=1] + br i1 %or.cond171, label %land.lhs.true5.i129, label %_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit134 + +land.lhs.true5.i129: ; preds = %_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit115 + %call.i127 = call i32 @memcmp(i8* getelementptr inbounds ([7 x i8]* @.str6, i64 0, i64 0), i8* %tmp6, i64 7) nounwind ; [#uses=1] + %cmp9.i128 = icmp eq i32 %call.i127, 0 ; [#uses=1] + br i1 %cmp9.i128, label %if.then.i132, label %_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit134 + +if.then.i132: ; preds = %land.lhs.true5.i129 + br label %_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit134 + +_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit134: ; preds = %if.then.i132, %land.lhs.true5.i129, %_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit115 + %retval.0.i.pre = phi i32 [ %retval.0.i.pre155, %_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit115 ], [ %retval.0.i.pre155, %land.lhs.true5.i129 ], [ 7, %if.then.i132 ] ; [#uses=2] + %tmp2.i137 = phi i8 [ %tmp2.i118, %_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit115 ], [ %tmp2.i118, %land.lhs.true5.i129 ], [ 1, %if.then.i132 ] ; [#uses=1] + %tmp7.i138 = and i8 %tmp2.i137, 1 ; [#uses=1] + %tobool.i139 = icmp eq i8 %tmp7.i138, 0 ; [#uses=1] + %retval.0.i = select i1 %tobool.i139, i32 0, i32 %retval.0.i.pre ; [#uses=1] + %call22 = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([12 x i8]* @.str7, i64 0, i64 0), i32 %retval.0.i) ; [#uses=0] + %exitcond = icmp eq i64 %tmp146, %tmp145 ; [#uses=1] + br i1 %exitcond, label %for.end, label %land.lhs.true.i + +for.end: ; preds = %_ZN12StringSwitchI5ColorE4CaseILj7EEERS1_RAT__KcRKS0_.exit134, %entry + ret i32 0 +} + +declare i32 @printf(i8* nocapture, ...) nounwind + +declare i32 @memcmp(i8* nocapture, i8* nocapture, i64) nounwind readonly + +declare i64 @strlen(i8* nocapture) nounwind readonly From dpatel at apple.com Thu Aug 26 12:47:45 2010 From: dpatel at apple.com (Devang Patel) Date: Thu, 26 Aug 2010 17:47:45 -0000 Subject: [llvm-commits] [llvm] r112200 - in /llvm/trunk: include/llvm-c/lto.h tools/lto/lto.cpp Message-ID: <20100826174745.607D02A6C12C@llvm.org> Author: dpatel Date: Thu Aug 26 12:47:45 2010 New Revision: 112200 URL: http://llvm.org/viewvc/llvm-project?rev=112200&view=rev Log: Fix prototypes. Modified: llvm/trunk/include/llvm-c/lto.h llvm/trunk/tools/lto/lto.cpp Modified: llvm/trunk/include/llvm-c/lto.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm-c/lto.h?rev=112200&r1=112199&r2=112200&view=diff ============================================================================== --- llvm/trunk/include/llvm-c/lto.h (original) +++ llvm/trunk/include/llvm-c/lto.h Thu Aug 26 12:47:45 2010 @@ -18,6 +18,7 @@ #include #include +#include "llvm/System/DataTypes.h" #define LTO_API_VERSION 3 @@ -145,7 +146,7 @@ /** * Returns the number of symbols in the object module. */ -extern unsigned int +extern uint32_t lto_module_get_num_symbols(lto_module_t mod); @@ -153,14 +154,14 @@ * Returns the name of the ith symbol in the object module. */ extern const char* -lto_module_get_symbol_name(lto_module_t mod, unsigned int index); +lto_module_get_symbol_name(lto_module_t mod, uint32_t index); /** * Returns the attributes of the ith symbol in the object module. */ extern lto_symbol_attributes -lto_module_get_symbol_attribute(lto_module_t mod, unsigned int index); +lto_module_get_symbol_attribute(lto_module_t mod, uint32_t index); /** Modified: llvm/trunk/tools/lto/lto.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto/lto.cpp?rev=112200&r1=112199&r2=112200&view=diff ============================================================================== --- llvm/trunk/tools/lto/lto.cpp (original) +++ llvm/trunk/tools/lto/lto.cpp Thu Aug 26 12:47:45 2010 @@ -150,7 +150,7 @@ // returns the attributes of the ith symbol in the object module // lto_symbol_attributes lto_module_get_symbol_attribute(lto_module_t mod, - uint32_t index) + uint32_t index) { return mod->getSymbolAttributes(index); } From bob.wilson at apple.com Thu Aug 26 13:08:11 2010 From: bob.wilson at apple.com (Bob Wilson) Date: Thu, 26 Aug 2010 18:08:11 -0000 Subject: [llvm-commits] [llvm] r112202 - in /llvm/trunk/lib/Target: PIC16/PIC16ISelLowering.h X86/X86InstrFPStack.td X86/X86InstrFormats.td Message-ID: <20100826180811.4EFE42A6C12C@llvm.org> Author: bwilson Date: Thu Aug 26 13:08:11 2010 New Revision: 112202 URL: http://llvm.org/viewvc/llvm-project?rev=112202&view=rev Log: Fix comment typos. Modified: llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.h llvm/trunk/lib/Target/X86/X86InstrFPStack.td llvm/trunk/lib/Target/X86/X86InstrFormats.td Modified: llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.h?rev=112202&r1=112201&r2=112202&view=diff ============================================================================== --- llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.h (original) +++ llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.h Thu Aug 26 13:08:11 2010 @@ -50,7 +50,7 @@ CALL, // PIC16 Call instruction CALLW, // PIC16 CALLW instruction SUBCC, // Compare for equality or inequality. - SELECT_ICC, // Psuedo to be caught in schedular and expanded to brcond. + SELECT_ICC, // Pseudo to be caught in scheduler and expanded to brcond. BRCOND, // Conditional branch. RET, // Return. Dummy Modified: llvm/trunk/lib/Target/X86/X86InstrFPStack.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFPStack.td?rev=112202&r1=112201&r2=112202&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrFPStack.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrFPStack.td Thu Aug 26 13:08:11 2010 @@ -153,7 +153,7 @@ def FpSET_ST1_80 : FpI_<(outs), (ins RFP80:$src), SpecialFP, []>; // ST(1) = FPR } -// FpIf32, FpIf64 - Floating Point Psuedo Instruction template. +// FpIf32, FpIf64 - Floating Point Pseudo Instruction template. // f32 instructions can use SSE1 and are predicated on FPStackf32 == !SSE1. // f64 instructions can use SSE2 and are predicated on FPStackf64 == !SSE2. // f80 instructions cannot use SSE and use neither of these. Modified: llvm/trunk/lib/Target/X86/X86InstrFormats.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFormats.td?rev=112202&r1=112201&r2=112202&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrFormats.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrFormats.td Thu Aug 26 13:08:11 2010 @@ -211,7 +211,7 @@ class FPI o, Format F, dag outs, dag ins, string asm> : I {} -// FpI_ - Floating Point Psuedo Instruction template. Not Predicated. +// FpI_ - Floating Point Pseudo Instruction template. Not Predicated. class FpI_ pattern> : X86Inst<0, Pseudo, NoImm, outs, ins, ""> { let FPForm = fp; From benny.kra at googlemail.com Thu Aug 26 13:12:04 2010 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Thu, 26 Aug 2010 18:12:04 -0000 Subject: [llvm-commits] [llvm] r112203 - /llvm/trunk/lib/MC/ELFObjectWriter.cpp Message-ID: <20100826181204.AECE12A6C12C@llvm.org> Author: d0k Date: Thu Aug 26 13:12:04 2010 New Revision: 112203 URL: http://llvm.org/viewvc/llvm-project?rev=112203&view=rev Log: MCELF: Fix a thinko of mine. Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=112203&r1=112202&r2=112203&view=diff ============================================================================== --- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original) +++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Thu Aug 26 13:12:04 2010 @@ -480,7 +480,8 @@ Value += Layout.getSymbolAddress(&SD) - Layout.getSymbolAddress(Base); Addend = Value; // Compensate for the addend on i386. - FixedValue = Is64Bit ? 0 : Value; + if (Is64Bit) + Value = 0; } else { if (F) { // Index of the section in .symtab against this symbol @@ -495,6 +496,7 @@ return; } } + FixedValue = Value; } // determine the type of the relocation From gohman at apple.com Thu Aug 26 13:12:22 2010 From: gohman at apple.com (Dan Gohman) Date: Thu, 26 Aug 2010 18:12:22 -0000 Subject: [llvm-commits] [llvm] r112204 - /llvm/trunk/utils/vim/vimrc Message-ID: <20100826181222.331B12A6C12C@llvm.org> Author: djg Date: Thu Aug 26 13:12:22 2010 New Revision: 112204 URL: http://llvm.org/viewvc/llvm-project?rev=112204&view=rev Log: Experimental clang-based code-completion support for vim. This currently depends on some clang patches which are not yet upstream. Modified: llvm/trunk/utils/vim/vimrc Modified: llvm/trunk/utils/vim/vimrc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/vim/vimrc?rev=112204&r1=112203&r2=112204&view=diff ============================================================================== --- llvm/trunk/utils/vim/vimrc (original) +++ llvm/trunk/utils/vim/vimrc Thu Aug 26 13:12:22 2010 @@ -91,3 +91,127 @@ "set showmode "set incsearch "set ruler + +" Clang code-completion support. This is highly experimental! + +" TODO: code-completing on +" cast_cast< +" turns up some peculiarities -- "asm("? + +" A path to the a executable. +let g:clang_path = "Release/bin/clang++" + +" A list of options to add to the clang commandline, for example to add +" include paths, predefined macros, and language options. +let g:clang_opts = [ + \ "-x","c++", + \ "-D__STDC_LIMIT_MACROS=1","-D__STDC_CONSTANT_MACROS=1", + \ "-Iinclude" ] + +function! ClangComplete(findstart, base) + if a:findstart == 1 + " In findstart mode, look for the beginning of the current identifier. + let l:line = getline('.') + let l:start = col('.') - 1 + while l:start > 0 && l:line[l:start - 1] =~ '\i' + let l:start -= 1 + endwhile + return l:start + endif + + " Get the current line and column numbers. + let l:l = line('.') + let l:c = col('.') + + " Build a clang commandline to do code completion on stdin. + let l:the_command = shellescape(g:clang_path) . + \ " -cc1 -code-completion-at=-:" . l:l . ":" . l:c + for l:opt in g:clang_opts + let l:the_command .= " " . shellescape(l:opt) + endfor + + " Copy the contents of the current buffer into a string for stdin. + " TODO: The extra space at the end is for working around clang's + " apparent inability to do code completion at the very end of the + " input. + " TODO: Is it better to feed clang the entire file instead of truncating + " it at the current line? + let l:process_input = join(getline(1, l:l), "\n") . " " + + " Run it! + let l:input_lines = split(system(l:the_command, l:process_input), "\n") + + " Parse the output. + for l:input_line in l:input_lines + " Vim's substring operator is annoyingly inconsistent with python's. + if l:input_line[:11] == 'COMPLETION: ' + let l:value = l:input_line[12:] + + " Chop off anything after " : ", if present, and move it to the menu. + let l:menu = "" + let l:spacecolonspace = stridx(l:value, " : ") + if l:spacecolonspace != -1 + let l:menu = l:value[l:spacecolonspace+3:] + let l:value = l:value[:l:spacecolonspace-1] + endif + + " Handle Pattern. TODO: Make clang less weird. + if l:value == "Pattern" + let l:value = l:menu + let l:pound = stridx(l:value, "#") + " Truncate the at the first [#, <#, or {#. + if l:pound != -1 + let l:value = l:value[:l:pound-2] + endif + endif + + " Filter out results which don't match the base string. + if a:base != "" + if l:value[:strlen(a:base)-1] != a:base + continue + end + endif + + " TODO: Don't dump the raw input into info, though it's nice for now. + " TODO: The kind string? + let l:item = { + \ "word": l:value, + \ "menu": l:menu, + \ "info": l:input_line, + \ "dup": 1 } + + " Report a result. + if complete_add(l:item) == 0 + return [] + endif + if complete_check() + return [] + endif + + elseif l:input_line[:9] == "OVERLOAD: " + " An overload candidate. Use a crazy hack to get vim to + " display the results. TODO: Make this better. + let l:value = l:input_line[10:] + let l:item = { + \ "word": " ", + \ "menu": l:value, + \ "info": l:input_line, + \ "dup": 1} + + " Report a result. + if complete_add(l:item) == 0 + return [] + endif + if complete_check() + return [] + endif + + endif + endfor + + + return [] +endfunction ClangComplete + +" Uncomment this to enable the highly-broken autocompletion support. +"set omnifunc=ClangComplete From bruno.cardoso at gmail.com Thu Aug 26 13:26:54 2010 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Thu, 26 Aug 2010 11:26:54 -0700 Subject: [llvm-commits] [llvm] r112204 - /llvm/trunk/utils/vim/vimrc In-Reply-To: <20100826181222.331B12A6C12C@llvm.org> References: <20100826181222.331B12A6C12C@llvm.org> Message-ID: yay! that's awesome! can you share those patches? :) On Thu, Aug 26, 2010 at 11:12 AM, Dan Gohman wrote: > Author: djg > Date: Thu Aug 26 13:12:22 2010 > New Revision: 112204 > > URL: http://llvm.org/viewvc/llvm-project?rev=112204&view=rev > Log: > Experimental clang-based code-completion support for vim. This currently > depends on some clang patches which are not yet upstream. > > Modified: > ? ?llvm/trunk/utils/vim/vimrc > > Modified: llvm/trunk/utils/vim/vimrc > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/vim/vimrc?rev=112204&r1=112203&r2=112204&view=diff > ============================================================================== > --- llvm/trunk/utils/vim/vimrc (original) > +++ llvm/trunk/utils/vim/vimrc Thu Aug 26 13:12:22 2010 > @@ -91,3 +91,127 @@ > ?"set showmode > ?"set incsearch > ?"set ruler > + > +" Clang code-completion support. This is highly experimental! > + > +" TODO: code-completing on > +" ? ? ? ? ?cast_cast< > +" turns up some peculiarities -- "asm("? > + > +" A path to the a executable. > +let g:clang_path = "Release/bin/clang++" > + > +" A list of options to add to the clang commandline, for example to add > +" include paths, predefined macros, and language options. > +let g:clang_opts = [ > + ?\ "-x","c++", > + ?\ "-D__STDC_LIMIT_MACROS=1","-D__STDC_CONSTANT_MACROS=1", > + ?\ "-Iinclude" ] > + > +function! ClangComplete(findstart, base) > + ? if a:findstart == 1 > + ? ? ?" In findstart mode, look for the beginning of the current identifier. > + ? ? ?let l:line = getline('.') > + ? ? ?let l:start = col('.') - 1 > + ? ? ?while l:start > 0 && l:line[l:start - 1] =~ '\i' > + ? ? ? ? let l:start -= 1 > + ? ? ?endwhile > + ? ? ?return l:start > + ? endif > + > + ? " Get the current line and column numbers. > + ? let l:l = line('.') > + ? let l:c = col('.') > + > + ? " Build a clang commandline to do code completion on stdin. > + ? let l:the_command = shellescape(g:clang_path) . > + ? ? ? ? ? ? ? ? ? ? \ " -cc1 -code-completion-at=-:" . l:l . ":" . l:c > + ? for l:opt in g:clang_opts > + ? ? ?let l:the_command .= " " . shellescape(l:opt) > + ? endfor > + > + ? " Copy the contents of the current buffer into a string for stdin. > + ? " TODO: The extra space at the end is for working around clang's > + ? " apparent inability to do code completion at the very end of the > + ? " input. > + ? " TODO: Is it better to feed clang the entire file instead of truncating > + ? " it at the current line? > + ? let l:process_input = join(getline(1, l:l), "\n") . " " > + > + ? " Run it! > + ? let l:input_lines = split(system(l:the_command, l:process_input), "\n") > + > + ? " Parse the output. > + ? for l:input_line in l:input_lines > + ? ? ?" Vim's substring operator is annoyingly inconsistent with python's. > + ? ? ?if l:input_line[:11] == 'COMPLETION: ' > + ? ? ? ? let l:value = l:input_line[12:] > + > + ? ? ? ?" Chop off anything after " : ", if present, and move it to the menu. > + ? ? ? ?let l:menu = "" > + ? ? ? ?let l:spacecolonspace = stridx(l:value, " : ") > + ? ? ? ?if l:spacecolonspace != -1 > + ? ? ? ? ? let l:menu = l:value[l:spacecolonspace+3:] > + ? ? ? ? ? let l:value = l:value[:l:spacecolonspace-1] > + ? ? ? ?endif > + > + ? ? ? ?" Handle Pattern. TODO: Make clang less weird. > + ? ? ? ?if l:value == "Pattern" > + ? ? ? ? ? let l:value = l:menu > + ? ? ? ? ? let l:pound = stridx(l:value, "#") > + ? ? ? ? ? " Truncate the at the first [#, <#, or {#. > + ? ? ? ? ? if l:pound != -1 > + ? ? ? ? ? ? ?let l:value = l:value[:l:pound-2] > + ? ? ? ? ? endif > + ? ? ? ?endif > + > + ? ? ? ? " Filter out results which don't match the base string. > + ? ? ? ? if a:base != "" > + ? ? ? ? ? ?if l:value[:strlen(a:base)-1] != a:base > + ? ? ? ? ? ? ? continue > + ? ? ? ? ? ?end > + ? ? ? ? endif > + > + ? ? ? ?" TODO: Don't dump the raw input into info, though it's nice for now. > + ? ? ? ?" TODO: The kind string? > + ? ? ? ?let l:item = { > + ? ? ? ? ?\ "word": l:value, > + ? ? ? ? ?\ "menu": l:menu, > + ? ? ? ? ?\ "info": l:input_line, > + ? ? ? ? ?\ "dup": 1 } > + > + ? ? ? ?" Report a result. > + ? ? ? ?if complete_add(l:item) == 0 > + ? ? ? ? ? return [] > + ? ? ? ?endif > + ? ? ? ?if complete_check() > + ? ? ? ? ? return [] > + ? ? ? ?endif > + > + ? ? ?elseif l:input_line[:9] == "OVERLOAD: " > + ? ? ? ? " An overload candidate. Use a crazy hack to get vim to > + ? ? ? ? " display the results. TODO: Make this better. > + ? ? ? ? let l:value = l:input_line[10:] > + ? ? ? ? let l:item = { > + ? ? ? ? ? \ "word": " ", > + ? ? ? ? ? \ "menu": l:value, > + ? ? ? ? ? \ "info": l:input_line, > + ? ? ? ? ? \ "dup": 1} > + > + ? ? ? ?" Report a result. > + ? ? ? ?if complete_add(l:item) == 0 > + ? ? ? ? ? return [] > + ? ? ? ?endif > + ? ? ? ?if complete_check() > + ? ? ? ? ? return [] > + ? ? ? ?endif > + > + ? ? ?endif > + ? endfor > + > + > + ? return [] > +endfunction ClangComplete > + > +" Uncomment this to enable the highly-broken autocompletion support. > +"set omnifunc=ClangComplete > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > -- Bruno Cardoso Lopes http://www.brunocardoso.cc From isanbard at gmail.com Thu Aug 26 13:33:51 2010 From: isanbard at gmail.com (Bill Wendling) Date: Thu, 26 Aug 2010 18:33:51 -0000 Subject: [llvm-commits] [llvm] r112206 - /llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Message-ID: <20100826183351.7EF4D2A6C12C@llvm.org> Author: void Date: Thu Aug 26 13:33:51 2010 New Revision: 112206 URL: http://llvm.org/viewvc/llvm-project?rev=112206&view=rev Log: Reapply r112176 without removing the other CMN patterns (that was unintentional). Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=112206&r1=112205&r2=112206&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Thu Aug 26 13:33:51 2010 @@ -2297,8 +2297,52 @@ defm CMP : AI1_cmp_irs<0b1010, "cmp", BinOpFrag<(ARMcmp node:$LHS, node:$RHS)>>; -//FIXME: Disable CMN, as CCodes are backwards from compare expectations -// Compare-to-zero still works out, just not the relationals + +// FIXME: There seems to be a (potential) hardware bug with the CMN instruction +// and comparison with 0. These two pieces of code should give identical +// results: +// +// rsbs r1, r1, 0 +// cmp r0, r1 +// mov r0, #0 +// it ls +// mov r0, #1 +// +// and: +// +// cmn r0, r1 +// mov r0, #0 +// it ls +// mov r0, #1 +// +// However, the CMN gives the *opposite* result when r1 is 0. This is because +// the carry flag is set in the CMP case but not in the CMN case. In short, the +// CMP instruction doesn't perform a truncate of the (logical) NOT of 0 plus the +// value of r0 and the carry bit (because the "carry bit" parameter to +// AddWithCarry is defined as 1 in this case, the carry flag will always be set +// when r0 >= 0). The CMN instruction doesn't perform a NOT of 0 so there is +// never a "carry" when this AddWithCarry is performed (because the "carry bit" +// parameter to AddWithCarry is defined as 0). +// +// The AddWithCarry in the CMP case seems to be relying upon the identity: +// +// ~x + 1 = -x +// +// However when x is 0 and unsigned, this doesn't hold: +// +// x = 0 +// ~x = 0xFFFF FFFF +// ~x + 1 = 0x1 0000 0000 +// (-x = 0) != (0x1 0000 0000 = ~x + 1) +// +// Therefore, we should disable *all* versions of CMN, especially when comparing +// against zero, until we can limit when the CMN instruction is used (when we +// know that the RHS is not 0) or when we have a hardware fix for this. +// +// (See the ARM docs for the "AddWithCarry" pseudo-code.) +// +// This is related to . +// //defm CMN : AI1_cmp_irs<0b1011, "cmn", // BinOpFrag<(ARMcmp node:$LHS,(ineg node:$RHS))>>; From dpatel at apple.com Thu Aug 26 13:36:14 2010 From: dpatel at apple.com (Devang Patel) Date: Thu, 26 Aug 2010 18:36:14 -0000 Subject: [llvm-commits] [llvm] r112207 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Message-ID: <20100826183614.9FBBC2A6C12C@llvm.org> Author: dpatel Date: Thu Aug 26 13:36:14 2010 New Revision: 112207 URL: http://llvm.org/viewvc/llvm-project?rev=112207&view=rev Log: Donot forget to resolve dangling debug info in a case where virtual register, used for a value, is initialized after a dbg intrinsic is seen. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=112207&r1=112206&r2=112207&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Thu Aug 26 13:36:14 2010 @@ -912,7 +912,9 @@ unsigned InReg = It->second; RegsForValue RFV(*DAG.getContext(), TLI, InReg, V->getType()); SDValue Chain = DAG.getEntryNode(); - return N = RFV.getCopyFromRegs(DAG, FuncInfo, getCurDebugLoc(), Chain,NULL); + N = RFV.getCopyFromRegs(DAG, FuncInfo, getCurDebugLoc(), Chain,NULL); + resolveDanglingDebugInfo(V, N); + return N; } // Otherwise create a new SDValue and remember it. From grosbach at apple.com Thu Aug 26 13:46:43 2010 From: grosbach at apple.com (Jim Grosbach) Date: Thu, 26 Aug 2010 11:46:43 -0700 Subject: [llvm-commits] [llvm] r112204 - /llvm/trunk/utils/vim/vimrc In-Reply-To: <20100826181222.331B12A6C12C@llvm.org> References: <20100826181222.331B12A6C12C@llvm.org> Message-ID: <3351F11A-DA17-497C-84FB-4C0D93F7C236@apple.com> Oh my.... On Aug 26, 2010, at 11:12 AM, Dan Gohman wrote: > Author: djg > Date: Thu Aug 26 13:12:22 2010 > New Revision: 112204 > > URL: http://llvm.org/viewvc/llvm-project?rev=112204&view=rev > Log: > Experimental clang-based code-completion support for vim. This currently > depends on some clang patches which are not yet upstream. > > Modified: > llvm/trunk/utils/vim/vimrc > > Modified: llvm/trunk/utils/vim/vimrc > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/vim/vimrc?rev=112204&r1=112203&r2=112204&view=diff > ============================================================================== > --- llvm/trunk/utils/vim/vimrc (original) > +++ llvm/trunk/utils/vim/vimrc Thu Aug 26 13:12:22 2010 > @@ -91,3 +91,127 @@ > "set showmode > "set incsearch > "set ruler > + > +" Clang code-completion support. This is highly experimental! > + > +" TODO: code-completing on > +" cast_cast< > +" turns up some peculiarities -- "asm("? > + > +" A path to the a executable. > +let g:clang_path = "Release/bin/clang++" > + > +" A list of options to add to the clang commandline, for example to add > +" include paths, predefined macros, and language options. > +let g:clang_opts = [ > + \ "-x","c++", > + \ "-D__STDC_LIMIT_MACROS=1","-D__STDC_CONSTANT_MACROS=1", > + \ "-Iinclude" ] > + > +function! ClangComplete(findstart, base) > + if a:findstart == 1 > + " In findstart mode, look for the beginning of the current identifier. > + let l:line = getline('.') > + let l:start = col('.') - 1 > + while l:start > 0 && l:line[l:start - 1] =~ '\i' > + let l:start -= 1 > + endwhile > + return l:start > + endif > + > + " Get the current line and column numbers. > + let l:l = line('.') > + let l:c = col('.') > + > + " Build a clang commandline to do code completion on stdin. > + let l:the_command = shellescape(g:clang_path) . > + \ " -cc1 -code-completion-at=-:" . l:l . ":" . l:c > + for l:opt in g:clang_opts > + let l:the_command .= " " . shellescape(l:opt) > + endfor > + > + " Copy the contents of the current buffer into a string for stdin. > + " TODO: The extra space at the end is for working around clang's > + " apparent inability to do code completion at the very end of the > + " input. > + " TODO: Is it better to feed clang the entire file instead of truncating > + " it at the current line? > + let l:process_input = join(getline(1, l:l), "\n") . " " > + > + " Run it! > + let l:input_lines = split(system(l:the_command, l:process_input), "\n") > + > + " Parse the output. > + for l:input_line in l:input_lines > + " Vim's substring operator is annoyingly inconsistent with python's. > + if l:input_line[:11] == 'COMPLETION: ' > + let l:value = l:input_line[12:] > + > + " Chop off anything after " : ", if present, and move it to the menu. > + let l:menu = "" > + let l:spacecolonspace = stridx(l:value, " : ") > + if l:spacecolonspace != -1 > + let l:menu = l:value[l:spacecolonspace+3:] > + let l:value = l:value[:l:spacecolonspace-1] > + endif > + > + " Handle Pattern. TODO: Make clang less weird. > + if l:value == "Pattern" > + let l:value = l:menu > + let l:pound = stridx(l:value, "#") > + " Truncate the at the first [#, <#, or {#. > + if l:pound != -1 > + let l:value = l:value[:l:pound-2] > + endif > + endif > + > + " Filter out results which don't match the base string. > + if a:base != "" > + if l:value[:strlen(a:base)-1] != a:base > + continue > + end > + endif > + > + " TODO: Don't dump the raw input into info, though it's nice for now. > + " TODO: The kind string? > + let l:item = { > + \ "word": l:value, > + \ "menu": l:menu, > + \ "info": l:input_line, > + \ "dup": 1 } > + > + " Report a result. > + if complete_add(l:item) == 0 > + return [] > + endif > + if complete_check() > + return [] > + endif > + > + elseif l:input_line[:9] == "OVERLOAD: " > + " An overload candidate. Use a crazy hack to get vim to > + " display the results. TODO: Make this better. > + let l:value = l:input_line[10:] > + let l:item = { > + \ "word": " ", > + \ "menu": l:value, > + \ "info": l:input_line, > + \ "dup": 1} > + > + " Report a result. > + if complete_add(l:item) == 0 > + return [] > + endif > + if complete_check() > + return [] > + endif > + > + endif > + endfor > + > + > + return [] > +endfunction ClangComplete > + > +" Uncomment this to enable the highly-broken autocompletion support. > +"set omnifunc=ClangComplete > > > _______________________________________________ > llvm-commits mailing list > llvm-commits at cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits From bob.wilson at apple.com Thu Aug 26 13:51:29 2010 From: bob.wilson at apple.com (Bob Wilson) Date: Thu, 26 Aug 2010 18:51:29 -0000 Subject: [llvm-commits] [llvm] r112208 - in /llvm/trunk/lib/Target/ARM: ARMExpandPseudoInsts.cpp ARMISelDAGToDAG.cpp ARMInstrNEON.td NEONPreAllocPass.cpp Message-ID: <20100826185129.4F6942A6C12C@llvm.org> Author: bwilson Date: Thu Aug 26 13:51:29 2010 New Revision: 112208 URL: http://llvm.org/viewvc/llvm-project?rev=112208&view=rev Log: Use pseudo instructions for VST3. Modified: llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp llvm/trunk/lib/Target/ARM/ARMInstrNEON.td llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp Modified: llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp?rev=112208&r1=112207&r2=112208&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp Thu Aug 26 13:51:29 2010 @@ -48,8 +48,8 @@ void TransferImpOps(MachineInstr &OldMI, MachineInstrBuilder &UseMI, MachineInstrBuilder &DefMI); bool ExpandMBB(MachineBasicBlock &MBB); - void ExpandVST4(MachineBasicBlock::iterator &MBBI, unsigned Opc, - bool hasWriteBack, NEONRegSpacing RegSpc); + void ExpandVST(MachineBasicBlock::iterator &MBBI, unsigned Opc, + bool hasWriteBack, NEONRegSpacing RegSpc, unsigned NumRegs); }; char ARMExpandPseudo::ID = 0; } @@ -72,11 +72,11 @@ } } -/// ExpandVST4 - Translate VST4 pseudo instructions with QQ or QQQQ register -/// operands to real VST4 instructions with 4 D register operands. -void ARMExpandPseudo::ExpandVST4(MachineBasicBlock::iterator &MBBI, - unsigned Opc, bool hasWriteBack, - NEONRegSpacing RegSpc) { +/// ExpandVST - Translate VST pseudo instructions with Q, QQ or QQQQ register +/// operands to real VST instructions with D register operands. +void ARMExpandPseudo::ExpandVST(MachineBasicBlock::iterator &MBBI, + unsigned Opc, bool hasWriteBack, + NEONRegSpacing RegSpc, unsigned NumRegs) { MachineInstr &MI = *MBBI; MachineBasicBlock &MBB = *MI.getParent(); @@ -111,7 +111,7 @@ D2 = TRI->getSubReg(SrcReg, ARM::dsub_4); D3 = TRI->getSubReg(SrcReg, ARM::dsub_6); } else { - assert(RegSpc == OddDblSpc && "unknown register spacing for VST4"); + assert(RegSpc == OddDblSpc && "unknown register spacing for VST"); D0 = TRI->getSubReg(SrcReg, ARM::dsub_1); D1 = TRI->getSubReg(SrcReg, ARM::dsub_3); D2 = TRI->getSubReg(SrcReg, ARM::dsub_5); @@ -120,8 +120,9 @@ MIB.addReg(D0, getKillRegState(SrcIsKill)) .addReg(D1, getKillRegState(SrcIsKill)) - .addReg(D2, getKillRegState(SrcIsKill)) - .addReg(D3, getKillRegState(SrcIsKill)); + .addReg(D2, getKillRegState(SrcIsKill)); + if (NumRegs > 3) + MIB.addReg(D3, getKillRegState(SrcIsKill)); MIB = AddDefaultPred(MIB); TransferImpOps(MI, MIB, MIB); MI.eraseFromParent(); @@ -223,35 +224,63 @@ MI.eraseFromParent(); } + case ARM::VST3d8Pseudo: + ExpandVST(MBBI, ARM::VST3d8, false, SingleSpc, 3); break; + case ARM::VST3d16Pseudo: + ExpandVST(MBBI, ARM::VST3d16, false, SingleSpc, 3); break; + case ARM::VST3d32Pseudo: + ExpandVST(MBBI, ARM::VST3d32, false, SingleSpc, 3); break; + case ARM::VST1d64TPseudo: + ExpandVST(MBBI, ARM::VST1d64T, false, SingleSpc, 3); break; + case ARM::VST3d8Pseudo_UPD: + ExpandVST(MBBI, ARM::VST3d8_UPD, true, SingleSpc, 3); break; + case ARM::VST3d16Pseudo_UPD: + ExpandVST(MBBI, ARM::VST3d16_UPD, true, SingleSpc, 3); break; + case ARM::VST3d32Pseudo_UPD: + ExpandVST(MBBI, ARM::VST3d32_UPD, true, SingleSpc, 3); break; + case ARM::VST1d64TPseudo_UPD: + ExpandVST(MBBI, ARM::VST1d64T_UPD, true, SingleSpc, 3); break; + case ARM::VST3q8Pseudo_UPD: + ExpandVST(MBBI, ARM::VST3q8_UPD, true, EvenDblSpc, 3); break; + case ARM::VST3q16Pseudo_UPD: + ExpandVST(MBBI, ARM::VST3q16_UPD, true, EvenDblSpc, 3); break; + case ARM::VST3q32Pseudo_UPD: + ExpandVST(MBBI, ARM::VST3q32_UPD, true, EvenDblSpc, 3); break; + case ARM::VST3q8oddPseudo_UPD: + ExpandVST(MBBI, ARM::VST3q8_UPD, true, OddDblSpc, 3); break; + case ARM::VST3q16oddPseudo_UPD: + ExpandVST(MBBI, ARM::VST3q16_UPD, true, OddDblSpc, 3); break; + case ARM::VST3q32oddPseudo_UPD: + ExpandVST(MBBI, ARM::VST3q32_UPD, true, OddDblSpc, 3); break; + case ARM::VST4d8Pseudo: - ExpandVST4(MBBI, ARM::VST4d8, false, SingleSpc); break; + ExpandVST(MBBI, ARM::VST4d8, false, SingleSpc, 4); break; case ARM::VST4d16Pseudo: - ExpandVST4(MBBI, ARM::VST4d16, false, SingleSpc); break; + ExpandVST(MBBI, ARM::VST4d16, false, SingleSpc, 4); break; case ARM::VST4d32Pseudo: - ExpandVST4(MBBI, ARM::VST4d32, false, SingleSpc); break; + ExpandVST(MBBI, ARM::VST4d32, false, SingleSpc, 4); break; case ARM::VST1d64QPseudo: - ExpandVST4(MBBI, ARM::VST1d64Q, false, SingleSpc); break; + ExpandVST(MBBI, ARM::VST1d64Q, false, SingleSpc, 4); break; case ARM::VST4d8Pseudo_UPD: - ExpandVST4(MBBI, ARM::VST4d8_UPD, true, SingleSpc); break; + ExpandVST(MBBI, ARM::VST4d8_UPD, true, SingleSpc, 4); break; case ARM::VST4d16Pseudo_UPD: - ExpandVST4(MBBI, ARM::VST4d16_UPD, true, SingleSpc); break; + ExpandVST(MBBI, ARM::VST4d16_UPD, true, SingleSpc, 4); break; case ARM::VST4d32Pseudo_UPD: - ExpandVST4(MBBI, ARM::VST4d32_UPD, true, SingleSpc); break; + ExpandVST(MBBI, ARM::VST4d32_UPD, true, SingleSpc, 4); break; case ARM::VST1d64QPseudo_UPD: - ExpandVST4(MBBI, ARM::VST1d64Q_UPD, true, SingleSpc); break; + ExpandVST(MBBI, ARM::VST1d64Q_UPD, true, SingleSpc, 4); break; case ARM::VST4q8Pseudo_UPD: - ExpandVST4(MBBI, ARM::VST4q8_UPD, true, EvenDblSpc); break; + ExpandVST(MBBI, ARM::VST4q8_UPD, true, EvenDblSpc, 4); break; case ARM::VST4q16Pseudo_UPD: - ExpandVST4(MBBI, ARM::VST4q16_UPD, true, EvenDblSpc); break; + ExpandVST(MBBI, ARM::VST4q16_UPD, true, EvenDblSpc, 4); break; case ARM::VST4q32Pseudo_UPD: - ExpandVST4(MBBI, ARM::VST4q32_UPD, true, EvenDblSpc); break; + ExpandVST(MBBI, ARM::VST4q32_UPD, true, EvenDblSpc, 4); break; case ARM::VST4q8oddPseudo_UPD: - ExpandVST4(MBBI, ARM::VST4q8_UPD, true, OddDblSpc); break; + ExpandVST(MBBI, ARM::VST4q8_UPD, true, OddDblSpc, 4); break; case ARM::VST4q16oddPseudo_UPD: - ExpandVST4(MBBI, ARM::VST4q16_UPD, true, OddDblSpc); break; + ExpandVST(MBBI, ARM::VST4q16_UPD, true, OddDblSpc, 4); break; case ARM::VST4q32oddPseudo_UPD: - ExpandVST4(MBBI, ARM::VST4q32_UPD, true, OddDblSpc); break; - break; + ExpandVST(MBBI, ARM::VST4q32_UPD, true, OddDblSpc, 4); break; } if (ModifiedOp) Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp?rev=112208&r1=112207&r2=112208&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp Thu Aug 26 13:51:29 2010 @@ -1262,7 +1262,7 @@ // FIXME: This is a temporary flag to distinguish VSTs that have been // converted to pseudo instructions. - bool usePseudoInstrs = (NumVecs == 4); + bool usePseudoInstrs = (NumVecs >= 3); if (is64BitVector) { if (NumVecs >= 2) { @@ -2317,14 +2317,14 @@ } case Intrinsic::arm_neon_vst3: { - unsigned DOpcodes[] = { ARM::VST3d8, ARM::VST3d16, - ARM::VST3d32, ARM::VST1d64T }; - unsigned QOpcodes0[] = { ARM::VST3q8_UPD, - ARM::VST3q16_UPD, - ARM::VST3q32_UPD }; - unsigned QOpcodes1[] = { ARM::VST3q8odd_UPD, - ARM::VST3q16odd_UPD, - ARM::VST3q32odd_UPD }; + unsigned DOpcodes[] = { ARM::VST3d8Pseudo, ARM::VST3d16Pseudo, + ARM::VST3d32Pseudo, ARM::VST1d64TPseudo }; + unsigned QOpcodes0[] = { ARM::VST3q8Pseudo_UPD, + ARM::VST3q16Pseudo_UPD, + ARM::VST3q32Pseudo_UPD }; + unsigned QOpcodes1[] = { ARM::VST3q8oddPseudo_UPD, + ARM::VST3q16oddPseudo_UPD, + ARM::VST3q32oddPseudo_UPD }; return SelectVST(N, 3, DOpcodes, QOpcodes0, QOpcodes1); } Modified: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrNEON.td?rev=112208&r1=112207&r2=112208&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrNEON.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Thu Aug 26 13:51:29 2010 @@ -560,6 +560,9 @@ def VST1d32T_UPD : VST1D3WB<0b1000, "32">; def VST1d64T_UPD : VST1D3WB<0b1100, "64">; +def VST1d64TPseudo : VSTQQPseudo; +def VST1d64TPseudo_UPD : VSTQQWBPseudo; + // ...with 4 registers (some of these are only for the disassembler): class VST1D4 op7_4, string Dt> : NLdSt<0, 0b00, 0b0010, op7_4, (outs), @@ -644,6 +647,10 @@ def VST3d16 : VST3D<0b0100, 0b0100, "16">; def VST3d32 : VST3D<0b0100, 0b1000, "32">; +def VST3d8Pseudo : VSTQQPseudo; +def VST3d16Pseudo : VSTQQPseudo; +def VST3d32Pseudo : VSTQQPseudo; + // ...with address register writeback: class VST3DWB op11_8, bits<4> op7_4, string Dt> : NLdSt<0, 0b00, op11_8, op7_4, (outs GPR:$wb), @@ -656,6 +663,10 @@ def VST3d16_UPD : VST3DWB<0b0100, 0b0100, "16">; def VST3d32_UPD : VST3DWB<0b0100, 0b1000, "32">; +def VST3d8Pseudo_UPD : VSTQQWBPseudo; +def VST3d16Pseudo_UPD : VSTQQWBPseudo; +def VST3d32Pseudo_UPD : VSTQQWBPseudo; + // ...with double-spaced registers (non-updating versions for disassembly only): def VST3q8 : VST3D<0b0101, 0b0000, "8">; def VST3q16 : VST3D<0b0101, 0b0100, "16">; @@ -664,10 +675,14 @@ def VST3q16_UPD : VST3DWB<0b0101, 0b0100, "16">; def VST3q32_UPD : VST3DWB<0b0101, 0b1000, "32">; +def VST3q8Pseudo_UPD : VSTQQQQWBPseudo; +def VST3q16Pseudo_UPD : VSTQQQQWBPseudo; +def VST3q32Pseudo_UPD : VSTQQQQWBPseudo; + // ...alternate versions to be allocated odd register numbers: -def VST3q8odd_UPD : VST3DWB<0b0101, 0b0000, "8">; -def VST3q16odd_UPD : VST3DWB<0b0101, 0b0100, "16">; -def VST3q32odd_UPD : VST3DWB<0b0101, 0b1000, "32">; +def VST3q8oddPseudo_UPD : VSTQQQQWBPseudo; +def VST3q16oddPseudo_UPD : VSTQQQQWBPseudo; +def VST3q32oddPseudo_UPD : VSTQQQQWBPseudo; // VST4 : Vector Store (multiple 4-element structures) class VST4D op11_8, bits<4> op7_4, string Dt> Modified: llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp?rev=112208&r1=112207&r2=112208&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp (original) +++ llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp Thu Aug 26 13:51:29 2010 @@ -215,10 +215,6 @@ Stride = 2; return true; - case ARM::VST3d8: - case ARM::VST3d16: - case ARM::VST3d32: - case ARM::VST1d64T: case ARM::VST3LNd8: case ARM::VST3LNd16: case ARM::VST3LNd32: @@ -226,24 +222,6 @@ NumRegs = 3; return true; - case ARM::VST3q8_UPD: - case ARM::VST3q16_UPD: - case ARM::VST3q32_UPD: - FirstOpnd = 4; - NumRegs = 3; - Offset = 0; - Stride = 2; - return true; - - case ARM::VST3q8odd_UPD: - case ARM::VST3q16odd_UPD: - case ARM::VST3q32odd_UPD: - FirstOpnd = 4; - NumRegs = 3; - Offset = 1; - Stride = 2; - return true; - case ARM::VST3LNq16: case ARM::VST3LNq32: FirstOpnd = 2; From dpatel at apple.com Thu Aug 26 15:06:46 2010 From: dpatel at apple.com (Devang Patel) Date: Thu, 26 Aug 2010 20:06:46 -0000 Subject: [llvm-commits] [llvm] r112213 - in /llvm/trunk/lib/CodeGen/SelectionDAG: SelectionDAGBuilder.cpp SelectionDAGBuilder.h Message-ID: <20100826200646.E8A792A6C12C@llvm.org> Author: dpatel Date: Thu Aug 26 15:06:46 2010 New Revision: 112213 URL: http://llvm.org/viewvc/llvm-project?rev=112213&view=rev Log: Update DanglingDebugInfo so that it can be used to track llvm.dbg.declare also. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=112213&r1=112212&r2=112213&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Thu Aug 26 15:06:46 2010 @@ -875,12 +875,23 @@ void SelectionDAGBuilder::resolveDanglingDebugInfo(const Value *V, SDValue Val) { DanglingDebugInfo &DDI = DanglingDebugInfoMap[V]; - if (DDI.getDI()) { - const DbgValueInst *DI = DDI.getDI(); + MDNode *Variable = NULL; + uint64_t Offset = 0; + + if (const DbgValueInst *DI = dyn_cast_or_null(DDI.getDI())) { + Variable = DI->getVariable(); + Offset = DI->getOffset(); + } else if (const DbgDeclareInst *DI = + dyn_cast_or_null(DDI.getDI())) + Variable = DI->getVariable(); + else { + assert (DDI.getDI() == NULL && "Invalid debug info intrinsic!"); + return; + } + + if (Variable) { DebugLoc dl = DDI.getdl(); unsigned DbgSDNodeOrder = DDI.getSDNodeOrder(); - MDNode *Variable = DI->getVariable(); - uint64_t Offset = DI->getOffset(); SDDbgValue *SDV; if (Val.getNode()) { if (!EmitFuncArgumentDbgValue(V, Variable, Offset, Val)) { Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h?rev=112213&r1=112212&r2=112213&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h Thu Aug 26 15:06:46 2010 @@ -36,7 +36,7 @@ class BitCastInst; class BranchInst; class CallInst; -class DbgValueInst; +class DbgInfoIntrinsic; class ExtractElementInst; class ExtractValueInst; class FCmpInst; @@ -96,14 +96,14 @@ /// DanglingDebugInfo - Helper type for DanglingDebugInfoMap. class DanglingDebugInfo { - const DbgValueInst* DI; + const DbgInfoIntrinsic* DI; DebugLoc dl; unsigned SDNodeOrder; public: DanglingDebugInfo() : DI(0), dl(DebugLoc()), SDNodeOrder(0) { } - DanglingDebugInfo(const DbgValueInst *di, DebugLoc DL, unsigned SDNO) : + DanglingDebugInfo(const DbgInfoIntrinsic *di, DebugLoc DL, unsigned SDNO) : DI(di), dl(DL), SDNodeOrder(SDNO) { } - const DbgValueInst* getDI() { return DI; } + const DbgInfoIntrinsic* getDI() { return DI; } DebugLoc getdl() { return dl; } unsigned getSDNodeOrder() { return SDNodeOrder; } }; From dpatel at apple.com Thu Aug 26 15:32:32 2010 From: dpatel at apple.com (Devang Patel) Date: Thu, 26 Aug 2010 20:32:32 -0000 Subject: [llvm-commits] [llvm] r112215 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Message-ID: <20100826203232.63AE02A6C12C@llvm.org> Author: dpatel Date: Thu Aug 26 15:32:32 2010 New Revision: 112215 URL: http://llvm.org/viewvc/llvm-project?rev=112215&view=rev Log: 80 col. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=112215&r1=112214&r2=112215&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Thu Aug 26 15:32:32 2010 @@ -448,7 +448,8 @@ EVT IntermediateVT, RegisterVT; unsigned NumIntermediates; unsigned NumRegs = TLI.getVectorTypeBreakdown(*DAG.getContext(), ValueVT, - IntermediateVT, NumIntermediates, RegisterVT); + IntermediateVT, + NumIntermediates, RegisterVT); unsigned NumElements = ValueVT.getVectorNumElements(); assert(NumRegs == NumParts && "Part count doesn't match vector breakdown!"); From dpatel at apple.com Thu Aug 26 15:33:42 2010 From: dpatel at apple.com (Devang Patel) Date: Thu, 26 Aug 2010 20:33:42 -0000 Subject: [llvm-commits] [llvm] r112216 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Message-ID: <20100826203342.C6D542A6C12C@llvm.org> Author: dpatel Date: Thu Aug 26 15:33:42 2010 New Revision: 112216 URL: http://llvm.org/viewvc/llvm-project?rev=112216&view=rev Log: Speculatively revert r112207. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=112216&r1=112215&r2=112216&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Thu Aug 26 15:33:42 2010 @@ -924,9 +924,7 @@ unsigned InReg = It->second; RegsForValue RFV(*DAG.getContext(), TLI, InReg, V->getType()); SDValue Chain = DAG.getEntryNode(); - N = RFV.getCopyFromRegs(DAG, FuncInfo, getCurDebugLoc(), Chain,NULL); - resolveDanglingDebugInfo(V, N); - return N; + return N = RFV.getCopyFromRegs(DAG, FuncInfo, getCurDebugLoc(), Chain,NULL); } // Otherwise create a new SDValue and remember it. From bruno.cardoso at gmail.com Thu Aug 26 15:53:13 2010 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Thu, 26 Aug 2010 20:53:13 -0000 Subject: [llvm-commits] [llvm] r112218 - in /llvm/trunk: include/llvm/CodeGen/ValueTypes.h lib/Target/X86/X86ISelLowering.cpp Message-ID: <20100826205313.3BE272A6C12C@llvm.org> Author: bruno Date: Thu Aug 26 15:53:12 2010 New Revision: 112218 URL: http://llvm.org/viewvc/llvm-project?rev=112218&view=rev Log: zap the now unused MVT::getIntVectorWithNumElements Modified: llvm/trunk/include/llvm/CodeGen/ValueTypes.h llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/include/llvm/CodeGen/ValueTypes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ValueTypes.h?rev=112218&r1=112217&r2=112218&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/ValueTypes.h (original) +++ llvm/trunk/include/llvm/CodeGen/ValueTypes.h Thu Aug 26 15:53:12 2010 @@ -348,17 +348,6 @@ } return (MVT::SimpleValueType)(MVT::INVALID_SIMPLE_VALUE_TYPE); } - - static MVT getIntVectorWithNumElements(unsigned NumElts) { - switch (NumElts) { - default: return (MVT::SimpleValueType)(MVT::INVALID_SIMPLE_VALUE_TYPE); - case 1: return MVT::v1i64; - case 2: return MVT::v2i32; - case 4: return MVT::v4i16; - case 8: return MVT::v8i8; - case 16: return MVT::v16i8; - } - } }; struct EVT { // EVT = Extended Value Type @@ -411,10 +400,15 @@ /// getIntVectorWithNumElements - Return any integer vector type that has /// the specified number of elements. static EVT getIntVectorWithNumElements(LLVMContext &C, unsigned NumElts) { - MVT M = MVT::getIntVectorWithNumElements(NumElts); - if (M.SimpleTy != MVT::INVALID_SIMPLE_VALUE_TYPE) - return M; - return getVectorVT(C, MVT::i8, NumElts); + switch (NumElts) { + default: return getVectorVT(C, MVT::i8, NumElts); + case 1: return MVT::v1i64; + case 2: return MVT::v2i32; + case 4: return MVT::v4i16; + case 8: return MVT::v8i8; + case 16: return MVT::v16i8; + } + return MVT::INVALID_SIMPLE_VALUE_TYPE; } /// isSimple - Test if the given EVT is simple (as opposed to being Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=112218&r1=112217&r2=112218&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Aug 26 15:53:12 2010 @@ -4607,7 +4607,7 @@ SDValue V2 = SVOp->getOperand(1); unsigned NumElems = VT.getVectorNumElements(); unsigned NewWidth = (NumElems == 4) ? 2 : 4; - EVT MaskVT = MVT::getIntVectorWithNumElements(NewWidth); + EVT MaskVT = (NewWidth == 4) ? MVT::v4i16 : MVT::v2i32; EVT NewVT = MaskVT; switch (VT.getSimpleVT().SimpleTy) { default: assert(false && "Unexpected!"); From grosbach at apple.com Thu Aug 26 16:29:54 2010 From: grosbach at apple.com (Jim Grosbach) Date: Thu, 26 Aug 2010 21:29:54 -0000 Subject: [llvm-commits] [llvm] r112220 - /llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Message-ID: <20100826212955.05E382A6C12C@llvm.org> Author: grosbach Date: Thu Aug 26 16:29:54 2010 New Revision: 112220 URL: http://llvm.org/viewvc/llvm-project?rev=112220&view=rev Log: Turn off the scavenging based frame reg reuse briefly to measure whether it's still having a significant effect. It shouldn't be now that the pre-RA virtual base reg stuff is in. Assuming that's valididated by the nightly testers, we can simplify a lot of the PEI frame index code. Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp?rev=112220&r1=112219&r2=112220&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Thu Aug 26 16:29:54 2010 @@ -41,7 +41,7 @@ namespace llvm { cl::opt -ReuseFrameIndexVals("arm-reuse-frame-index-vals", cl::Hidden, cl::init(true), +ReuseFrameIndexVals("arm-reuse-frame-index-vals", cl::Hidden, cl::init(false), cl::desc("Reuse repeated frame index values")); static cl::opt ForceAllBaseRegAlloc("arm-force-base-reg-alloc", cl::Hidden, cl::init(false), From sabre at nondot.org Thu Aug 26 16:35:52 2010 From: sabre at nondot.org (Chris Lattner) Date: Thu, 26 Aug 2010 21:35:52 -0000 Subject: [llvm-commits] [llvm] r112222 - /llvm/trunk/include/llvm/Support/PatternMatch.h Message-ID: <20100826213552.50CD62A6C12C@llvm.org> Author: lattner Date: Thu Aug 26 16:35:52 2010 New Revision: 112222 URL: http://llvm.org/viewvc/llvm-project?rev=112222&view=rev Log: add m_BitCast for matching a bitcast. Modified: llvm/trunk/include/llvm/Support/PatternMatch.h Modified: llvm/trunk/include/llvm/Support/PatternMatch.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/PatternMatch.h?rev=112222&r1=112221&r2=112222&view=diff ============================================================================== --- llvm/trunk/include/llvm/Support/PatternMatch.h (original) +++ llvm/trunk/include/llvm/Support/PatternMatch.h Thu Aug 26 16:35:52 2010 @@ -453,6 +453,13 @@ } }; +/// m_BitCast +template +inline CastClass_match +m_BitCast(const OpTy &Op) { + return CastClass_match(Op); +} + /// m_PtrToInt template inline CastClass_match From sabre at nondot.org Thu Aug 26 16:50:56 2010 From: sabre at nondot.org (Chris Lattner) Date: Thu, 26 Aug 2010 21:50:56 -0000 Subject: [llvm-commits] [llvm] r112224 - in /llvm/trunk/test/Transforms/InstCombine: bitcast-scalar-to-vector.ll bitcast.ll Message-ID: <20100826215056.86D692A6C12F@llvm.org> Author: lattner Date: Thu Aug 26 16:50:56 2010 New Revision: 112224 URL: http://llvm.org/viewvc/llvm-project?rev=112224&view=rev Log: rename test Added: llvm/trunk/test/Transforms/InstCombine/bitcast.ll - copied unchanged from r112213, llvm/trunk/test/Transforms/InstCombine/bitcast-scalar-to-vector.ll Removed: llvm/trunk/test/Transforms/InstCombine/bitcast-scalar-to-vector.ll Removed: llvm/trunk/test/Transforms/InstCombine/bitcast-scalar-to-vector.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/bitcast-scalar-to-vector.ll?rev=112223&view=auto ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/bitcast-scalar-to-vector.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/bitcast-scalar-to-vector.ll (removed) @@ -1,14 +0,0 @@ -; RUN: opt < %s -instcombine -S | grep {ret i32 0} -; PR4487 - -; Bitcasts between vectors and scalars are valid, despite being ill-advised. - -define i32 @test(i64 %a) { -bb20: - %t1 = bitcast i64 %a to <2 x i32> - %t2 = bitcast i64 %a to <2 x i32> - %t3 = xor <2 x i32> %t1, %t2 - %t4 = extractelement <2 x i32> %t3, i32 0 - ret i32 %t4 -} - From sabre at nondot.org Thu Aug 26 16:51:41 2010 From: sabre at nondot.org (Chris Lattner) Date: Thu, 26 Aug 2010 21:51:41 -0000 Subject: [llvm-commits] [llvm] r112225 - /llvm/trunk/test/Transforms/InstCombine/bitcast.ll Message-ID: <20100826215141.6B4752A6C12C@llvm.org> Author: lattner Date: Thu Aug 26 16:51:41 2010 New Revision: 112225 URL: http://llvm.org/viewvc/llvm-project?rev=112225&view=rev Log: filecheckize Modified: llvm/trunk/test/Transforms/InstCombine/bitcast.ll Modified: llvm/trunk/test/Transforms/InstCombine/bitcast.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/bitcast.ll?rev=112225&r1=112224&r2=112225&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/bitcast.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/bitcast.ll Thu Aug 26 16:51:41 2010 @@ -1,14 +1,15 @@ -; RUN: opt < %s -instcombine -S | grep {ret i32 0} -; PR4487 - -; Bitcasts between vectors and scalars are valid, despite being ill-advised. +; RUN: opt < %s -instcombine -S | FileCheck %s -define i32 @test(i64 %a) { -bb20: +; Bitcasts between vectors and scalars are valid. +; PR4487 +define i32 @test1(i64 %a) { %t1 = bitcast i64 %a to <2 x i32> %t2 = bitcast i64 %a to <2 x i32> %t3 = xor <2 x i32> %t1, %t2 %t4 = extractelement <2 x i32> %t3, i32 0 ret i32 %t4 + +; CHECK: @test1 +; CHECK: ret i32 0 } From sabre at nondot.org Thu Aug 26 16:55:42 2010 From: sabre at nondot.org (Chris Lattner) Date: Thu, 26 Aug 2010 21:55:42 -0000 Subject: [llvm-commits] [llvm] r112227 - in /llvm/trunk: lib/Transforms/InstCombine/InstCombineCasts.cpp test/Transforms/InstCombine/bitcast.ll Message-ID: <20100826215542.B15DB2A6C12C@llvm.org> Author: lattner Date: Thu Aug 26 16:55:42 2010 New Revision: 112227 URL: http://llvm.org/viewvc/llvm-project?rev=112227&view=rev Log: optimize bitcast(trunc(bitcast(x))) where the result is a float and 'x' is a vector to be a vector element extraction. This allows clang to compile: struct S { float A, B, C, D; }; float foo(struct S A) { return A.A + A.B+A.C+A.D; } into: _foo: ## @foo ## BB#0: ## %entry movd %xmm0, %rax shrq $32, %rax movd %eax, %xmm2 addss %xmm0, %xmm2 movapd %xmm1, %xmm3 addss %xmm2, %xmm3 movd %xmm1, %rax shrq $32, %rax movd %eax, %xmm0 addss %xmm3, %xmm0 ret instead of: _foo: ## @foo ## BB#0: ## %entry movd %xmm0, %rax movd %eax, %xmm0 shrq $32, %rax movd %eax, %xmm2 addss %xmm0, %xmm2 movd %xmm1, %rax movd %eax, %xmm1 addss %xmm2, %xmm1 shrq $32, %rax movd %eax, %xmm0 addss %xmm1, %xmm0 ret ... eliminating half of the horribleness. Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp llvm/trunk/test/Transforms/InstCombine/bitcast.ll Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp?rev=112227&r1=112226&r2=112227&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp Thu Aug 26 16:55:42 2010 @@ -1335,6 +1335,35 @@ return new ShuffleVectorInst(InVal, V2, Mask); } +/// OptimizeIntToFloatBitCast - See if we can optimize an integer->float/double +/// bitcast. The various long double bitcasts can't get in here. +static Instruction *OptimizeIntToFloatBitCast(BitCastInst &CI,InstCombiner &IC) { + Value *Src = CI.getOperand(0); + + // If this is a bitcast from int to float, check to see if the int is an + // extraction from a vector. + Value *VecInput = 0; + if (match(Src, m_Trunc(m_BitCast(m_Value(VecInput)))) && + isa(VecInput->getType())) { + const VectorType *VecTy = cast(VecInput->getType()); + const Type *DestTy = CI.getType(); + + // If the element type of the vector doesn't match the result type, but the + // vector type's size is a multiple of the result type, bitcast it to be a + // vector type we can extract from. + if (VecTy->getElementType() != DestTy && + VecTy->getPrimitiveSizeInBits() % DestTy->getPrimitiveSizeInBits()==0) { + VecTy = VectorType::get(DestTy, + VecTy->getPrimitiveSizeInBits() / DestTy->getPrimitiveSizeInBits()); + VecInput = IC.Builder->CreateBitCast(VecInput, VecTy); + } + + if (VecTy->getElementType() == DestTy) + return ExtractElementInst::Create(VecInput, IC.Builder->getInt32(0)); + } + + return 0; +} Instruction *InstCombiner::visitBitCast(BitCastInst &CI) { // If the operands are integer typed then apply the integer transforms, @@ -1386,6 +1415,11 @@ ((Instruction*)NULL)); } } + + // Try to optimize int -> float bitcasts. + if ((DestTy->isFloatTy() || DestTy->isDoubleTy()) && isa(SrcTy)) + if (Instruction *I = OptimizeIntToFloatBitCast(CI, *this)) + return I; if (const VectorType *DestVTy = dyn_cast(DestTy)) { if (DestVTy->getNumElements() == 1 && !SrcTy->isVectorTy()) { Modified: llvm/trunk/test/Transforms/InstCombine/bitcast.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/bitcast.ll?rev=112227&r1=112226&r2=112227&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/bitcast.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/bitcast.ll Thu Aug 26 16:55:42 2010 @@ -13,3 +13,25 @@ ; CHECK: ret i32 0 } +; Optimize bitcasts that are extracting low element of vector. This happens +; because of SRoA. +; rdar://7892780 +define float @test2(<2 x float> %A, <2 x i32> %B) { + %tmp28 = bitcast <2 x float> %A to i64 ; [#uses=2] + %tmp23 = trunc i64 %tmp28 to i32 ; [#uses=1] + %tmp24 = bitcast i32 %tmp23 to float ; [#uses=1] + + %tmp = bitcast <2 x i32> %B to i64 + %tmp2 = trunc i64 %tmp to i32 ; [#uses=1] + %tmp4 = bitcast i32 %tmp2 to float ; [#uses=1] + + %add = fadd float %tmp24, %tmp4 + ret float %add + +; CHECK: @test2 +; CHECK-NEXT: %tmp24 = extractelement <2 x float> %A, i32 0 +; CHECK-NEXT: bitcast <2 x i32> %B to <2 x float> +; CHECK-NEXT: %tmp4 = extractelement <2 x float> {{.*}}, i32 0 +; CHECK-NEXT: %add = fadd float %tmp24, %tmp4 +; CHECK-NEXT: ret float %add +} From grosbach at apple.com Thu Aug 26 16:56:30 2010 From: grosbach at apple.com (Jim Grosbach) Date: Thu, 26 Aug 2010 21:56:30 -0000 Subject: [llvm-commits] [llvm] r112228 - in /llvm/trunk: include/llvm/Target/TargetRegisterInfo.h lib/Target/ARM/ARMBaseRegisterInfo.cpp lib/Target/ARM/ARMBaseRegisterInfo.h Message-ID: <20100826215630.A89F22A6C12C@llvm.org> Author: grosbach Date: Thu Aug 26 16:56:30 2010 New Revision: 112228 URL: http://llvm.org/viewvc/llvm-project?rev=112228&view=rev Log: tidy up a bit. no functional change. Modified: llvm/trunk/include/llvm/Target/TargetRegisterInfo.h llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h Modified: llvm/trunk/include/llvm/Target/TargetRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetRegisterInfo.h?rev=112228&r1=112227&r2=112228&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetRegisterInfo.h (original) +++ llvm/trunk/include/llvm/Target/TargetRegisterInfo.h Thu Aug 26 16:56:30 2010 @@ -645,7 +645,8 @@ /// getFrameIndexInstrOffset - Get the offset from the referenced frame /// index in the instruction, if the is one. - virtual int64_t getFrameIndexInstrOffset(MachineInstr *MI, int Idx) const { + virtual int64_t getFrameIndexInstrOffset(const MachineInstr *MI, + int Idx) const { return 0; } Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp?rev=112228&r1=112227&r2=112228&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Thu Aug 26 16:56:30 2010 @@ -1378,15 +1378,14 @@ MBB.erase(I); } - int64_t ARMBaseRegisterInfo:: -getFrameIndexInstrOffset(MachineInstr *MI, int Idx) const { +getFrameIndexInstrOffset(const MachineInstr *MI, int Idx) const { const TargetInstrDesc &Desc = MI->getDesc(); unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); int64_t InstrOffs = 0;; int Scale = 1; unsigned ImmIdx = 0; - switch(AddrMode) { + switch (AddrMode) { case ARMII::AddrModeT2_i8: case ARMII::AddrModeT2_i12: // i8 supports only negative, and i12 supports only positive, so @@ -1573,15 +1572,12 @@ unsigned NumBits = 0; unsigned Scale = 1; - unsigned ImmIdx = 0; - int InstrOffs = 0;; bool isSigned = true; - switch(AddrMode) { + switch (AddrMode) { case ARMII::AddrModeT2_i8: case ARMII::AddrModeT2_i12: // i8 supports only negative, and i12 supports only positive, so // based on Offset sign, consider the appropriate instruction - InstrOffs = MI->getOperand(i+1).getImm(); Scale = 1; if (Offset < 0) { NumBits = 8; @@ -1590,50 +1586,33 @@ NumBits = 12; } break; - case ARMII::AddrMode5: { + case ARMII::AddrMode5: // VFP address mode. - const MachineOperand &OffOp = MI->getOperand(i+1); - InstrOffs = ARM_AM::getAM5Offset(OffOp.getImm()); - if (ARM_AM::getAM5Op(OffOp.getImm()) == ARM_AM::sub) - InstrOffs = -InstrOffs; NumBits = 8; Scale = 4; break; - } - case ARMII::AddrMode2: { - ImmIdx = i+2; - InstrOffs = ARM_AM::getAM2Offset(MI->getOperand(ImmIdx).getImm()); - if (ARM_AM::getAM2Op(MI->getOperand(ImmIdx).getImm()) == ARM_AM::sub) - InstrOffs = -InstrOffs; + case ARMII::AddrMode2: NumBits = 12; break; - } - case ARMII::AddrMode3: { - ImmIdx = i+2; - InstrOffs = ARM_AM::getAM3Offset(MI->getOperand(ImmIdx).getImm()); - if (ARM_AM::getAM3Op(MI->getOperand(ImmIdx).getImm()) == ARM_AM::sub) - InstrOffs = -InstrOffs; + case ARMII::AddrMode3: NumBits = 8; break; - } - case ARMII::AddrModeT1_s: { - ImmIdx = i+1; - InstrOffs = MI->getOperand(ImmIdx).getImm(); + case ARMII::AddrModeT1_s: NumBits = 5; Scale = 4; isSigned = false; break; - } default: llvm_unreachable("Unsupported addressing mode!"); break; } - Offset += InstrOffs * Scale; + Offset += getFrameIndexInstrOffset(MI, i); assert((Offset & (Scale-1)) == 0 && "Can't encode this offset!"); if (isSigned && Offset < 0) Offset = -Offset; + unsigned Mask = (1 << NumBits) - 1; if ((unsigned)Offset <= Mask * Scale) return true; Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h?rev=112228&r1=112227&r2=112228&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h (original) +++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h Thu Aug 26 16:56:30 2010 @@ -105,7 +105,7 @@ bool canRealignStack(const MachineFunction &MF) const; bool needsStackRealignment(const MachineFunction &MF) const; - int64_t getFrameIndexInstrOffset(MachineInstr *MI, int Idx) const; + int64_t getFrameIndexInstrOffset(const MachineInstr *MI, int Idx) const; bool needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const; void materializeFrameBaseRegister(MachineBasicBlock::iterator I, unsigned BaseReg, int FrameIdx, From sabre at nondot.org Thu Aug 26 17:15:00 2010 From: sabre at nondot.org (Chris Lattner) Date: Thu, 26 Aug 2010 22:15:00 -0000 Subject: [llvm-commits] [llvm] r112232 - in /llvm/trunk: lib/Transforms/InstCombine/InstCombineCasts.cpp test/Transforms/InstCombine/bitcast.ll Message-ID: <20100826221500.10D3B2A6C12C@llvm.org> Author: lattner Date: Thu Aug 26 17:14:59 2010 New Revision: 112232 URL: http://llvm.org/viewvc/llvm-project?rev=112232&view=rev Log: optimize "integer extraction out of the middle of a vector" as produced by SRoA. This is part of rdar://7892780, but needs another xform to expose this. Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp llvm/trunk/test/Transforms/InstCombine/bitcast.ll Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp?rev=112232&r1=112231&r2=112232&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp Thu Aug 26 17:14:59 2010 @@ -1337,31 +1337,53 @@ /// OptimizeIntToFloatBitCast - See if we can optimize an integer->float/double /// bitcast. The various long double bitcasts can't get in here. -static Instruction *OptimizeIntToFloatBitCast(BitCastInst &CI,InstCombiner &IC) { +static Instruction *OptimizeIntToFloatBitCast(BitCastInst &CI,InstCombiner &IC){ Value *Src = CI.getOperand(0); + const Type *DestTy = CI.getType(); // If this is a bitcast from int to float, check to see if the int is an // extraction from a vector. Value *VecInput = 0; + // bitcast(trunc(bitcast(somevector))) if (match(Src, m_Trunc(m_BitCast(m_Value(VecInput)))) && isa(VecInput->getType())) { const VectorType *VecTy = cast(VecInput->getType()); - const Type *DestTy = CI.getType(); - - // If the element type of the vector doesn't match the result type, but the - // vector type's size is a multiple of the result type, bitcast it to be a - // vector type we can extract from. - if (VecTy->getElementType() != DestTy && - VecTy->getPrimitiveSizeInBits() % DestTy->getPrimitiveSizeInBits()==0) { - VecTy = VectorType::get(DestTy, - VecTy->getPrimitiveSizeInBits() / DestTy->getPrimitiveSizeInBits()); - VecInput = IC.Builder->CreateBitCast(VecInput, VecTy); - } + unsigned DestWidth = DestTy->getPrimitiveSizeInBits(); + + if (VecTy->getPrimitiveSizeInBits() % DestWidth == 0) { + // If the element type of the vector doesn't match the result type, + // bitcast it to be a vector type we can extract from. + if (VecTy->getElementType() != DestTy) { + VecTy = VectorType::get(DestTy, + VecTy->getPrimitiveSizeInBits() / DestWidth); + VecInput = IC.Builder->CreateBitCast(VecInput, VecTy); + } - if (VecTy->getElementType() == DestTy) return ExtractElementInst::Create(VecInput, IC.Builder->getInt32(0)); + } } + // bitcast(trunc(lshr(bitcast(somevector), cst)) + ConstantInt *ShAmt = 0; + if (match(Src, m_Trunc(m_LShr(m_BitCast(m_Value(VecInput)), + m_ConstantInt(ShAmt)))) && + isa(VecInput->getType())) { + const VectorType *VecTy = cast(VecInput->getType()); + unsigned DestWidth = DestTy->getPrimitiveSizeInBits(); + if (VecTy->getPrimitiveSizeInBits() % DestWidth == 0 && + ShAmt->getZExtValue() % DestWidth == 0) { + // If the element type of the vector doesn't match the result type, + // bitcast it to be a vector type we can extract from. + if (VecTy->getElementType() != DestTy) { + VecTy = VectorType::get(DestTy, + VecTy->getPrimitiveSizeInBits() / DestWidth); + VecInput = IC.Builder->CreateBitCast(VecInput, VecTy); + } + + unsigned Elt = ShAmt->getZExtValue() / DestWidth; + return ExtractElementInst::Create(VecInput, IC.Builder->getInt32(Elt)); + } + } return 0; } Modified: llvm/trunk/test/Transforms/InstCombine/bitcast.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/bitcast.ll?rev=112232&r1=112231&r2=112232&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/bitcast.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/bitcast.ll Thu Aug 26 17:14:59 2010 @@ -35,3 +35,28 @@ ; CHECK-NEXT: %add = fadd float %tmp24, %tmp4 ; CHECK-NEXT: ret float %add } + +; Optimize bitcasts that are extracting other elements of a vector. This +; happens because of SRoA. +; rdar://7892780 +define float @test3(<2 x float> %A, <2 x i64> %B) { + %tmp28 = bitcast <2 x float> %A to i64 + %tmp29 = lshr i64 %tmp28, 32 + %tmp23 = trunc i64 %tmp29 to i32 + %tmp24 = bitcast i32 %tmp23 to float + + %tmp = bitcast <2 x i64> %B to i128 + %tmp1 = lshr i128 %tmp, 64 + %tmp2 = trunc i128 %tmp1 to i32 + %tmp4 = bitcast i32 %tmp2 to float + + %add = fadd float %tmp24, %tmp4 + ret float %add + +; CHECK: @test3 +; CHECK-NEXT: %tmp24 = extractelement <2 x float> %A, i32 1 +; CHECK-NEXT: bitcast <2 x i64> %B to <4 x float> +; CHECK-NEXT: %tmp4 = extractelement <4 x float> {{.*}}, i32 2 +; CHECK-NEXT: %add = fadd float %tmp24, %tmp4 +; CHECK-NEXT: ret float %add +} From sabre at nondot.org Thu Aug 26 17:20:47 2010 From: sabre at nondot.org (Chris Lattner) Date: Thu, 26 Aug 2010 22:20:47 -0000 Subject: [llvm-commits] [llvm] r112234 - in /llvm/trunk/test/Transforms/InstCombine: trunc-mask-ext.ll trunc.ll Message-ID: <20100826222047.B79C42A6C12C@llvm.org> Author: lattner Date: Thu Aug 26 17:20:47 2010 New Revision: 112234 URL: http://llvm.org/viewvc/llvm-project?rev=112234&view=rev Log: rename test. Added: llvm/trunk/test/Transforms/InstCombine/trunc.ll - copied unchanged from r112213, llvm/trunk/test/Transforms/InstCombine/trunc-mask-ext.ll Removed: llvm/trunk/test/Transforms/InstCombine/trunc-mask-ext.ll Removed: llvm/trunk/test/Transforms/InstCombine/trunc-mask-ext.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/trunc-mask-ext.ll?rev=112233&view=auto ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/trunc-mask-ext.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/trunc-mask-ext.ll (removed) @@ -1,38 +0,0 @@ -; RUN: opt < %s -instcombine -S > %t -; RUN: not grep zext %t -; RUN: not grep sext %t - -; Instcombine should be able to eliminate all of these ext casts. - -declare void @use(i32) - -define i64 @foo(i64 %a) { - %b = trunc i64 %a to i32 - %c = and i32 %b, 15 - %d = zext i32 %c to i64 - call void @use(i32 %b) - ret i64 %d -} -define i64 @bar(i64 %a) { - %b = trunc i64 %a to i32 - %c = shl i32 %b, 4 - %q = ashr i32 %c, 4 - %d = sext i32 %q to i64 - call void @use(i32 %b) - ret i64 %d -} -define i64 @goo(i64 %a) { - %b = trunc i64 %a to i32 - %c = and i32 %b, 8 - %d = zext i32 %c to i64 - call void @use(i32 %b) - ret i64 %d -} -define i64 @hoo(i64 %a) { - %b = trunc i64 %a to i32 - %c = and i32 %b, 8 - %x = xor i32 %c, 8 - %d = zext i32 %x to i64 - call void @use(i32 %b) - ret i64 %d -} From sabre at nondot.org Thu Aug 26 17:23:39 2010 From: sabre at nondot.org (Chris Lattner) Date: Thu, 26 Aug 2010 22:23:39 -0000 Subject: [llvm-commits] [llvm] r112235 - /llvm/trunk/test/Transforms/InstCombine/trunc.ll Message-ID: <20100826222339.C71002A6C12C@llvm.org> Author: lattner Date: Thu Aug 26 17:23:39 2010 New Revision: 112235 URL: http://llvm.org/viewvc/llvm-project?rev=112235&view=rev Log: filecheckize Modified: llvm/trunk/test/Transforms/InstCombine/trunc.ll Modified: llvm/trunk/test/Transforms/InstCombine/trunc.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/trunc.ll?rev=112235&r1=112234&r2=112235&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/trunc.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/trunc.ll Thu Aug 26 17:23:39 2010 @@ -1,38 +1,50 @@ -; RUN: opt < %s -instcombine -S > %t -; RUN: not grep zext %t -; RUN: not grep sext %t +; RUN: opt < %s -instcombine -S | FileCheck %s ; Instcombine should be able to eliminate all of these ext casts. declare void @use(i32) -define i64 @foo(i64 %a) { +define i64 @test1(i64 %a) { %b = trunc i64 %a to i32 %c = and i32 %b, 15 %d = zext i32 %c to i64 call void @use(i32 %b) ret i64 %d +; CHECK: @test1 +; CHECK: %d = and i64 %a, 15 +; CHECK: ret i64 %d } -define i64 @bar(i64 %a) { +define i64 @test2(i64 %a) { %b = trunc i64 %a to i32 %c = shl i32 %b, 4 %q = ashr i32 %c, 4 %d = sext i32 %q to i64 call void @use(i32 %b) ret i64 %d +; CHECK: @test2 +; CHECK: shl i64 %a, 36 +; CHECK: %d = ashr i64 {{.*}}, 36 +; CHECK: ret i64 %d } -define i64 @goo(i64 %a) { +define i64 @test3(i64 %a) { %b = trunc i64 %a to i32 %c = and i32 %b, 8 %d = zext i32 %c to i64 call void @use(i32 %b) ret i64 %d +; CHECK: @test3 +; CHECK: %d = and i64 %a, 8 +; CHECK: ret i64 %d } -define i64 @hoo(i64 %a) { +define i64 @test4(i64 %a) { %b = trunc i64 %a to i32 %c = and i32 %b, 8 %x = xor i32 %c, 8 %d = zext i32 %x to i64 call void @use(i32 %b) ret i64 %d +; CHECK: @test4 +; CHECK: = and i64 %a, 8 +; CHECK: %d = xor i64 {{.*}}, 8 +; CHECK: ret i64 %d } From grosbach at apple.com Thu Aug 26 17:42:12 2010 From: grosbach at apple.com (Jim Grosbach) Date: Thu, 26 Aug 2010 22:42:12 -0000 Subject: [llvm-commits] [llvm] r112237 - /llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Message-ID: <20100826224212.B3BEA2A6C12C@llvm.org> Author: grosbach Date: Thu Aug 26 17:42:12 2010 New Revision: 112237 URL: http://llvm.org/viewvc/llvm-project?rev=112237&view=rev Log: Remove the now obsolete frame index virtual re-use algorithm from PEI. Pre-RA virtual base registers handle this function, and more. A bit more cleanup to do on the interface to eliminateFrameIndex() after this. Modified: llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Modified: llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp?rev=112237&r1=112236&r2=112237&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp (original) +++ llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Thu Aug 26 17:42:12 2010 @@ -793,38 +793,6 @@ } } -/// findLastUseReg - find the killing use of the specified register within -/// the instruciton range. Return the operand number of the kill in Operand. -static MachineBasicBlock::iterator -findLastUseReg(MachineBasicBlock::iterator I, MachineBasicBlock::iterator ME, - unsigned Reg) { - // Scan forward to find the last use of this virtual register - for (++I; I != ME; ++I) { - MachineInstr *MI = I; - bool isDefInsn = false; - bool isKillInsn = false; - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) - if (MI->getOperand(i).isReg()) { - unsigned OpReg = MI->getOperand(i).getReg(); - if (OpReg == 0 || !TargetRegisterInfo::isVirtualRegister(OpReg)) - continue; - assert (OpReg == Reg - && "overlapping use of scavenged index register!"); - // If this is the killing use, we have a candidate. - if (MI->getOperand(i).isKill()) - isKillInsn = true; - else if (MI->getOperand(i).isDef()) - isDefInsn = true; - } - if (isKillInsn && !isDefInsn) - return I; - } - // If we hit the end of the basic block, there was no kill of - // the virtual register, which is wrong. - assert (0 && "scavenged index register never killed!"); - return ME; -} - /// scavengeFrameVirtualRegs - Replace all frame index virtual registers /// with physical registers. Use the register scavenger to find an /// appropriate register to use. @@ -834,27 +802,14 @@ E = Fn.end(); BB != E; ++BB) { RS->enterBasicBlock(BB); - // FIXME: The logic flow in this function is still too convoluted. - // It needs a cleanup refactoring. Do that in preparation for tracking - // more than one scratch register value and using ranges to find - // available scratch registers. - unsigned CurrentVirtReg = 0; - unsigned CurrentScratchReg = 0; - bool havePrevValue = false; - TargetRegisterInfo::FrameIndexValue PrevValue(0,0); - TargetRegisterInfo::FrameIndexValue Value(0,0); - MachineInstr *PrevLastUseMI = NULL; - unsigned PrevLastUseOp = 0; - bool trackingCurrentValue = false; + unsigned VirtReg = 0; + unsigned ScratchReg = 0; int SPAdj = 0; // The instruction stream may change in the loop, so check BB->end() // directly. for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) { MachineInstr *MI = I; - bool isDefInsn = false; - bool isKillInsn = false; - bool clobbersScratchReg = false; bool DoIncr = true; for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { if (MI->getOperand(i).isReg()) { @@ -862,124 +817,30 @@ unsigned Reg = MO.getReg(); if (Reg == 0) continue; - if (!TargetRegisterInfo::isVirtualRegister(Reg)) { - // If we have a previous scratch reg, check and see if anything - // here kills whatever value is in there. - if (Reg == CurrentScratchReg) { - if (MO.isUse()) { - // Two-address operands implicitly kill - if (MO.isKill() || MI->isRegTiedToDefOperand(i)) - clobbersScratchReg = true; - } else { - assert (MO.isDef()); - clobbersScratchReg = true; - } - } + if (!TargetRegisterInfo::isVirtualRegister(Reg)) continue; - } - ++NumVirtualFrameRegs; - // If this is a def, remember that this insn defines the value. - // This lets us properly consider insns which re-use the scratch - // register, such as r2 = sub r2, #imm, in the middle of the - // scratch range. - if (MO.isDef()) - isDefInsn = true; + ++NumVirtualFrameRegs; // Have we already allocated a scratch register for this virtual? - if (Reg != CurrentVirtReg) { + if (Reg != VirtReg) { // When we first encounter a new virtual register, it // must be a definition. assert(MI->getOperand(i).isDef() && "frame index virtual missing def!"); - // We can't have nested virtual register live ranges because - // there's only a guarantee of one scavenged register at a time. - assert (CurrentVirtReg == 0 && - "overlapping frame index virtual registers!"); - - // If the target gave us information about what's in the register, - // we can use that to re-use scratch regs. - DenseMap::iterator Entry = - FrameConstantRegMap.find(Reg); - trackingCurrentValue = Entry != FrameConstantRegMap.end(); - if (trackingCurrentValue) { - SPAdj = (*Entry).second.second; - Value = (*Entry).second.first; - } else { - SPAdj = 0; - Value.first = 0; - Value.second = 0; - } - - // If the scratch register from the last allocation is still - // available, see if the value matches. If it does, just re-use it. - if (trackingCurrentValue && havePrevValue && PrevValue == Value) { - // FIXME: This assumes that the instructions in the live range - // for the virtual register are exclusively for the purpose - // of populating the value in the register. That's reasonable - // for these frame index registers, but it's still a very, very - // strong assumption. rdar://7322732. Better would be to - // explicitly check each instruction in the range for references - // to the virtual register. Only delete those insns that - // touch the virtual register. - - // Find the last use of the new virtual register. Remove all - // instruction between here and there, and update the current - // instruction to reference the last use insn instead. - MachineBasicBlock::iterator LastUseMI = - findLastUseReg(I, BB->end(), Reg); - - // Remove all instructions up 'til the last use, since they're - // just calculating the value we already have. - BB->erase(I, LastUseMI); - I = LastUseMI; - - // Extend the live range of the scratch register - PrevLastUseMI->getOperand(PrevLastUseOp).setIsKill(false); - RS->setUsed(CurrentScratchReg); - CurrentVirtReg = Reg; - - // We deleted the instruction we were scanning the operands of. - // Jump back to the instruction iterator loop. Don't increment - // past this instruction since we updated the iterator already. - DoIncr = false; - break; - } - // Scavenge a new scratch register - CurrentVirtReg = Reg; + VirtReg = Reg; const TargetRegisterClass *RC = Fn.getRegInfo().getRegClass(Reg); - CurrentScratchReg = RS->scavengeRegister(RC, I, SPAdj); - PrevValue = Value; + ScratchReg = RS->scavengeRegister(RC, I, SPAdj); ++NumScavengedRegs; } // replace this reference to the virtual register with the // scratch register. - assert (CurrentScratchReg && "Missing scratch register!"); - MI->getOperand(i).setReg(CurrentScratchReg); + assert (ScratchReg && "Missing scratch register!"); + MI->getOperand(i).setReg(ScratchReg); - if (MI->getOperand(i).isKill()) { - isKillInsn = true; - PrevLastUseOp = i; - PrevLastUseMI = MI; - } } } - // If this is the last use of the scratch, stop tracking it. The - // last use will be a kill operand in an instruction that does - // not also define the scratch register. - if (isKillInsn && !isDefInsn) { - CurrentVirtReg = 0; - havePrevValue = trackingCurrentValue; - } - // Similarly, notice if instruction clobbered the value in the - // register we're tracking for possible later reuse. This is noted - // above, but enforced here since the value is still live while we - // process the rest of the operands of the instruction. - if (clobbersScratchReg) { - havePrevValue = false; - CurrentScratchReg = 0; - } if (DoIncr) { RS->forward(I); ++I; From dpatel at apple.com Thu Aug 26 17:53:27 2010 From: dpatel at apple.com (Devang Patel) Date: Thu, 26 Aug 2010 22:53:27 -0000 Subject: [llvm-commits] [llvm] r112238 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Message-ID: <20100826225327.C6FF72A6C12C@llvm.org> Author: dpatel Date: Thu Aug 26 17:53:27 2010 New Revision: 112238 URL: http://llvm.org/viewvc/llvm-project?rev=112238&view=rev Log: If node is not available then use FuncInfo.ValueMap to emit debug info for byval parameter. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=112238&r1=112237&r2=112238&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Thu Aug 26 17:53:27 2010 @@ -3947,7 +3947,7 @@ return false; unsigned Reg = 0; - if (N.getOpcode() == ISD::CopyFromReg) { + if (N.getNode() && N.getOpcode() == ISD::CopyFromReg) { Reg = cast(N.getOperand(1))->getReg(); if (Reg && TargetRegisterInfo::isVirtualRegister(Reg)) { MachineRegisterInfo &RegInfo = MF.getRegInfo(); @@ -4111,10 +4111,14 @@ return 0; DAG.AddDbgValue(SDV, N.getNode(), isParameter); } else { - // This isn't useful, but it shows what we're missing. - SDV = DAG.getDbgValue(Variable, UndefValue::get(Address->getType()), - 0, dl, SDNodeOrder); - DAG.AddDbgValue(SDV, 0, isParameter); + // If Address is an arugment then try to emits its dbg value using + // virtual register info from the FuncInfo.ValueMap. Otherwise add undef + // to help track missing debug info. + if (!EmitFuncArgumentDbgValue(Address, Variable, 0, N)) { + SDV = DAG.getDbgValue(Variable, UndefValue::get(Address->getType()), + 0, dl, SDNodeOrder); + DAG.AddDbgValue(SDV, 0, isParameter); + } } return 0; } From tonic at nondot.org Thu Aug 26 17:59:12 2010 From: tonic at nondot.org (Tanya Lattner) Date: Thu, 26 Aug 2010 22:59:12 -0000 Subject: [llvm-commits] [www] r112240 - in /www/trunk/devmtg/2010-11: ./ index.html Message-ID: <20100826225912.4BD082A6C12C@llvm.org> Author: tbrethou Date: Thu Aug 26 17:59:12 2010 New Revision: 112240 URL: http://llvm.org/viewvc/llvm-project?rev=112240&view=rev Log: Add skeleton for 2010 developer meeting webpage. Added: www/trunk/devmtg/2010-11/ www/trunk/devmtg/2010-11/index.html (with props) Added: www/trunk/devmtg/2010-11/index.html URL: http://llvm.org/viewvc/llvm-project/www/trunk/devmtg/2010-11/index.html?rev=112240&view=auto ============================================================================== --- www/trunk/devmtg/2010-11/index.html (added) +++ www/trunk/devmtg/2010-11/index.html Thu Aug 26 17:59:12 2010 @@ -0,0 +1,46 @@ + + +
2010 LLVM Developers' Meeting
+ +
+
    +
  1. Call for Speakers
    2. +
+		 +
    +
  • What: The fourth general meeting of LLVM Developers and Users. +
    • +
  • Why: To get acquainted, learn how LLVM is used, and exchange + ideas.
    • +
  • When: November X, 2010
    • +
+
+ + +

The meeting serves as a forum for both LLVM +and Clang developers and users to get acquainted, lea +rn how LLVM is used, and +exchange ideas about LLVM and its (potential) applications. More broadly, we +believe the event will be of particular interest to the following people:

+ +
    +
  • Active LLVM and Clang developers and users.
    • +
  • Anyone interested in using LLVM or Clang.
    • +
  • Compiler, programming language, and runtime enthusiasts.
    • +
  • Those interested in using compiler technology in novel and interesting ways.
    • +
+ + +
+
+ Valid CSS! + Valid HTML 4.01! +
Last modified: $Date: 2009/12/01 05:29:47 $ +
+ + Propchange: www/trunk/devmtg/2010-11/index.html ------------------------------------------------------------------------------ svn:executable = * From grosbach at apple.com Thu Aug 26 18:32:16 2010 From: grosbach at apple.com (Jim Grosbach) Date: Thu, 26 Aug 2010 23:32:16 -0000 Subject: [llvm-commits] [llvm] r112241 - in /llvm/trunk: include/llvm/Target/ lib/CodeGen/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/Blackfin/ lib/Target/CellSPU/ lib/Target/MBlaze/ lib/Target/MSP430/ lib/Target/Mips/ lib/Target/PIC16/ lib/Target/PowerPC/ lib/Target/Sparc/ lib/Target/SystemZ/ lib/Target/X86/ lib/Target/XCore/ Message-ID: <20100826233217.0386D2A6C12C@llvm.org> Author: grosbach Date: Thu Aug 26 18:32:16 2010 New Revision: 112241 URL: http://llvm.org/viewvc/llvm-project?rev=112241&view=rev Log: Simplify eliminateFrameIndex() interface back down now that PEI doesn't need to try to re-use scavenged frame index reference registers. rdar://8277890 Modified: llvm/trunk/include/llvm/Target/TargetRegisterInfo.h llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp llvm/trunk/lib/CodeGen/PrologEpilogInserter.h llvm/trunk/lib/CodeGen/RegisterScavenging.cpp llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.cpp llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.h llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.h llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.cpp llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.h llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.h llvm/trunk/lib/Target/MBlaze/MBlazeRegisterInfo.cpp llvm/trunk/lib/Target/MBlaze/MBlazeRegisterInfo.h llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.cpp llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.h llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp llvm/trunk/lib/Target/Mips/MipsRegisterInfo.h llvm/trunk/lib/Target/PIC16/PIC16RegisterInfo.cpp llvm/trunk/lib/Target/PIC16/PIC16RegisterInfo.h llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.h llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.cpp llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.h llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.cpp llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.h llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp llvm/trunk/lib/Target/X86/X86RegisterInfo.h llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.cpp llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.h Modified: llvm/trunk/include/llvm/Target/TargetRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetRegisterInfo.h?rev=112241&r1=112240&r2=112241&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetRegisterInfo.h (original) +++ llvm/trunk/include/llvm/Target/TargetRegisterInfo.h Thu Aug 26 18:32:16 2010 @@ -743,14 +743,8 @@ /// specified instruction, as long as it keeps the iterator pointing at the /// finished product. SPAdj is the SP adjustment due to call frame setup /// instruction. - /// - /// When -enable-frame-index-scavenging is enabled, the virtual register - /// allocated for this frame index is returned and its value is stored in - /// *Value. - typedef std::pair FrameIndexValue; - virtual unsigned eliminateFrameIndex(MachineBasicBlock::iterator MI, - int SPAdj, FrameIndexValue *Value = NULL, - RegScavenger *RS=NULL) const = 0; + virtual void eliminateFrameIndex(MachineBasicBlock::iterator MI, + int SPAdj, RegScavenger *RS=NULL) const = 0; /// emitProlog/emitEpilog - These methods insert prolog and epilog code into /// the function. Modified: llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp?rev=112241&r1=112240&r2=112241&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp (original) +++ llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Thu Aug 26 18:32:16 2010 @@ -63,7 +63,6 @@ const TargetRegisterInfo *TRI = Fn.getTarget().getRegisterInfo(); RS = TRI->requiresRegisterScavenging(Fn) ? new RegScavenger() : NULL; FrameIndexVirtualScavenging = TRI->requiresFrameIndexScavenging(Fn); - FrameConstantRegMap.clear(); // Calculate the MaxCallFrameSize and AdjustsStack variables for the // function's frame information. Also eliminates call frame pseudo @@ -756,16 +755,8 @@ // If this instruction has a FrameIndex operand, we need to // use that target machine register info object to eliminate // it. - TargetRegisterInfo::FrameIndexValue Value; - unsigned VReg = - TRI.eliminateFrameIndex(MI, SPAdj, &Value, + TRI.eliminateFrameIndex(MI, SPAdj, FrameIndexVirtualScavenging ? NULL : RS); - if (VReg) { - assert (FrameIndexVirtualScavenging && - "Not scavenging, but virtual returned from " - "eliminateFrameIndex()!"); - FrameConstantRegMap[VReg] = FrameConstantEntry(Value, SPAdj); - } // Reset the iterator if we were at the beginning of the BB. if (AtBeginning) { Modified: llvm/trunk/lib/CodeGen/PrologEpilogInserter.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PrologEpilogInserter.h?rev=112241&r1=112240&r2=112241&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/PrologEpilogInserter.h (original) +++ llvm/trunk/lib/CodeGen/PrologEpilogInserter.h Thu Aug 26 18:32:16 2010 @@ -99,13 +99,6 @@ // TRI->requiresFrameIndexScavenging() for the curren function. bool FrameIndexVirtualScavenging; - // When using the scavenger post-pass to resolve frame reference - // materialization registers, maintain a map of the registers to - // the constant value and SP adjustment associated with it. - typedef std::pair - FrameConstantEntry; - DenseMap FrameConstantRegMap; - #ifndef NDEBUG // Machine function handle. MachineFunction* MF; Modified: llvm/trunk/lib/CodeGen/RegisterScavenging.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterScavenging.cpp?rev=112241&r1=112240&r2=112241&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/RegisterScavenging.cpp (original) +++ llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Thu Aug 26 18:32:16 2010 @@ -366,12 +366,12 @@ "Cannot scavenge register without an emergency spill slot!"); TII->storeRegToStackSlot(*MBB, I, SReg, true, ScavengingFrameIndex, RC,TRI); MachineBasicBlock::iterator II = prior(I); - TRI->eliminateFrameIndex(II, SPAdj, NULL, this); + TRI->eliminateFrameIndex(II, SPAdj, this); // Restore the scavenged register before its use (or first terminator). TII->loadRegFromStackSlot(*MBB, UseMI, SReg, ScavengingFrameIndex, RC, TRI); II = prior(UseMI); - TRI->eliminateFrameIndex(II, SPAdj, NULL, this); + TRI->eliminateFrameIndex(II, SPAdj, this); } ScavengeRestore = prior(UseMI); Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp?rev=112241&r1=112240&r2=112241&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Thu Aug 26 18:32:16 2010 @@ -40,9 +40,6 @@ #include "llvm/Support/CommandLine.h" namespace llvm { -cl::opt -ReuseFrameIndexVals("arm-reuse-frame-index-vals", cl::Hidden, cl::init(false), - cl::desc("Reuse repeated frame index values")); static cl::opt ForceAllBaseRegAlloc("arm-force-base-reg-alloc", cl::Hidden, cl::init(false), cl::desc("Force use of virtual base registers for stack load/store")); @@ -1620,10 +1617,9 @@ return false; } -unsigned +void ARMBaseRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, - int SPAdj, FrameIndexValue *Value, - RegScavenger *RS) const { + int SPAdj, RegScavenger *RS) const { unsigned i = 0; MachineInstr &MI = *II; MachineBasicBlock &MBB = *MI.getParent(); @@ -1646,7 +1642,7 @@ if (MI.isDebugValue()) { MI.getOperand(i). ChangeToRegister(FrameReg, false /*isDef*/); MI.getOperand(i+1).ChangeToImmediate(Offset); - return 0; + return; } // Modify MI as necessary to handle as much of 'Offset' as possible @@ -1658,7 +1654,7 @@ Done = rewriteT2FrameIndex(MI, i, FrameReg, Offset, TII); } if (Done) - return 0; + return; // If we get here, the immediate doesn't fit into the instruction. We folded // as much as possible above, handle the rest, providing a register that is @@ -1678,10 +1674,6 @@ MI.getOperand(i).ChangeToRegister(FrameReg, false, false, false); else { ScratchReg = MF.getRegInfo().createVirtualRegister(ARM::GPRRegisterClass); - if (Value) { - Value->first = FrameReg; // use the frame register as a kind indicator - Value->second = Offset; - } if (!AFI->isThumbFunction()) emitARMRegPlusImmediate(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg, Offset, Pred, PredReg, TII); @@ -1691,10 +1683,7 @@ Offset, Pred, PredReg, TII); } MI.getOperand(i).ChangeToRegister(ScratchReg, false, false, true); - if (!ReuseFrameIndexVals) - ScratchReg = 0; } - return ScratchReg; } /// Move iterator past the next bunch of callee save load / store ops for Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h?rev=112241&r1=112240&r2=112241&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h (original) +++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.h Thu Aug 26 18:32:16 2010 @@ -163,9 +163,8 @@ MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const; - virtual unsigned eliminateFrameIndex(MachineBasicBlock::iterator II, - int SPAdj, FrameIndexValue *Value = NULL, - RegScavenger *RS = NULL) const; + virtual void eliminateFrameIndex(MachineBasicBlock::iterator II, + int SPAdj, RegScavenger *RS = NULL) const; virtual void emitPrologue(MachineFunction &MF) const; virtual void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; Modified: llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.cpp?rev=112241&r1=112240&r2=112241&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.cpp Thu Aug 26 18:32:16 2010 @@ -576,10 +576,9 @@ return true; } -unsigned +void Thumb1RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, - int SPAdj, FrameIndexValue *Value, - RegScavenger *RS) const{ + int SPAdj, RegScavenger *RS) const { unsigned VReg = 0; unsigned i = 0; MachineInstr &MI = *II; @@ -614,14 +613,14 @@ if (MI.isDebugValue()) { MI.getOperand(i). ChangeToRegister(FrameReg, false /*isDef*/); MI.getOperand(i+1).ChangeToImmediate(Offset); - return 0; + return; } // Modify MI as necessary to handle as much of 'Offset' as possible assert(AFI->isThumbFunction() && "This eliminateFrameIndex only supports Thumb1!"); if (rewriteFrameIndex(MI, i, FrameReg, Offset, TII)) - return 0; + return; // If we get here, the immediate doesn't fit into the instruction. We folded // as much as possible above, handle the rest, providing a register that is @@ -662,11 +661,7 @@ MI.addOperand(MachineOperand::CreateReg(0, false)); } else if (Desc.mayStore()) { VReg = MF.getRegInfo().createVirtualRegister(ARM::tGPRRegisterClass); - assert (Value && "Frame index virtual allocated, but Value arg is NULL!"); bool UseRR = false; - bool TrackVReg = true; - Value->first = FrameReg; // use the frame register as a kind indicator - Value->second = Offset; if (Opcode == ARM::tSpill) { if (FrameReg == ARM::SP) @@ -675,7 +670,6 @@ else { emitLoadConstPool(MBB, II, dl, VReg, 0, Offset); UseRR = true; - TrackVReg = false; } } else emitThumbRegPlusImmediate(MBB, II, VReg, FrameReg, Offset, TII, @@ -686,8 +680,6 @@ MI.addOperand(MachineOperand::CreateReg(FrameReg, false)); else // tSTR has an extra register operand. MI.addOperand(MachineOperand::CreateReg(0, false)); - if (!ReuseFrameIndexVals || !TrackVReg) - VReg = 0; } else assert(false && "Unexpected opcode!"); @@ -696,7 +688,6 @@ MachineInstrBuilder MIB(&MI); AddDefaultPred(MIB); } - return VReg; } void Thumb1RegisterInfo::emitPrologue(MachineFunction &MF) const { Modified: llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.h?rev=112241&r1=112240&r2=112241&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.h (original) +++ llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.h Thu Aug 26 18:32:16 2010 @@ -57,9 +57,8 @@ MachineBasicBlock::iterator &UseMI, const TargetRegisterClass *RC, unsigned Reg) const; - unsigned eliminateFrameIndex(MachineBasicBlock::iterator II, - int SPAdj, FrameIndexValue *Value = NULL, - RegScavenger *RS = NULL) const; + void eliminateFrameIndex(MachineBasicBlock::iterator II, + int SPAdj, RegScavenger *RS = NULL) const; void emitPrologue(MachineFunction &MF) const; void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; Modified: llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp?rev=112241&r1=112240&r2=112241&view=diff ============================================================================== --- llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.cpp Thu Aug 26 18:32:16 2010 @@ -137,10 +137,9 @@ //variable locals //<- SP -unsigned +void AlphaRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, - int SPAdj, FrameIndexValue *Value, - RegScavenger *RS) const { + int SPAdj, RegScavenger *RS) const { assert(SPAdj == 0 && "Unexpected"); unsigned i = 0; @@ -185,7 +184,6 @@ } else { MI.getOperand(i).ChangeToImmediate(Offset); } - return 0; } Modified: llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.h?rev=112241&r1=112240&r2=112241&view=diff ============================================================================== --- llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.h (original) +++ llvm/trunk/lib/Target/Alpha/AlphaRegisterInfo.h Thu Aug 26 18:32:16 2010 @@ -38,9 +38,8 @@ MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const; - unsigned eliminateFrameIndex(MachineBasicBlock::iterator II, - int SPAdj, FrameIndexValue *Value = NULL, - RegScavenger *RS = NULL) const; + void eliminateFrameIndex(MachineBasicBlock::iterator II, + int SPAdj, RegScavenger *RS = NULL) const; //void processFunctionBeforeFrameFinalized(MachineFunction &MF) const; Modified: llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.cpp?rev=112241&r1=112240&r2=112241&view=diff ============================================================================== --- llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.cpp Thu Aug 26 18:32:16 2010 @@ -190,10 +190,9 @@ return Reg; } -unsigned +void BlackfinRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, - int SPAdj, FrameIndexValue *Value, - RegScavenger *RS) const { + int SPAdj, RegScavenger *RS) const { MachineInstr &MI = *II; MachineBasicBlock &MBB = *MI.getParent(); MachineFunction &MF = *MBB.getParent(); @@ -230,20 +229,20 @@ MI.setDesc(TII.get(isStore ? BF::STORE32p_uimm6m4 : BF::LOAD32p_uimm6m4)); - return 0; + return; } if (BaseReg == BF::FP && isUInt<7>(-Offset)) { MI.setDesc(TII.get(isStore ? BF::STORE32fp_nimm7m4 : BF::LOAD32fp_nimm7m4)); MI.getOperand(FIPos+1).setImm(-Offset); - return 0; + return; } if (isInt<18>(Offset)) { MI.setDesc(TII.get(isStore ? BF::STORE32p_imm18m4 : BF::LOAD32p_imm18m4)); - return 0; + return; } // Use RegScavenger to calculate proper offset... MI.dump(); @@ -328,7 +327,6 @@ llvm_unreachable("Cannot eliminate frame index"); break; } - return 0; } void BlackfinRegisterInfo:: Modified: llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.h?rev=112241&r1=112240&r2=112241&view=diff ============================================================================== --- llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.h (original) +++ llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.h Thu Aug 26 18:32:16 2010 @@ -51,9 +51,8 @@ MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const; - unsigned eliminateFrameIndex(MachineBasicBlock::iterator II, - int SPAdj, FrameIndexValue *Value = NULL, - RegScavenger *RS = NULL) const; + void eliminateFrameIndex(MachineBasicBlock::iterator II, + int SPAdj, RegScavenger *RS = NULL) const; void processFunctionBeforeCalleeSavedScan(MachineFunction &MF, RegScavenger *RS) const; Modified: llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp?rev=112241&r1=112240&r2=112241&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.cpp Thu Aug 26 18:32:16 2010 @@ -270,9 +270,8 @@ MBB.erase(I); } -unsigned +void SPURegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, - FrameIndexValue *Value, RegScavenger *RS) const { unsigned i = 0; @@ -328,7 +327,6 @@ } else { MO.ChangeToImmediate(Offset); } - return 0; } /// determineFrameLayout - Determine the size of the frame and maximum call Modified: llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.h?rev=112241&r1=112240&r2=112241&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.h (original) +++ llvm/trunk/lib/Target/CellSPU/SPURegisterInfo.h Thu Aug 26 18:32:16 2010 @@ -63,9 +63,8 @@ MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const; //! Convert frame indicies into machine operands - unsigned eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, - FrameIndexValue *Value = NULL, - RegScavenger *RS = NULL) const; + void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, + RegScavenger *RS = NULL) const; //! Determine the frame's layour void determineFrameLayout(MachineFunction &MF) const; Modified: llvm/trunk/lib/Target/MBlaze/MBlazeRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeRegisterInfo.cpp?rev=112241&r1=112240&r2=112241&view=diff ============================================================================== --- llvm/trunk/lib/Target/MBlaze/MBlazeRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/MBlaze/MBlazeRegisterInfo.cpp Thu Aug 26 18:32:16 2010 @@ -242,9 +242,9 @@ // FrameIndex represent objects inside a abstract stack. // We must replace FrameIndex with an stack/frame pointer // direct reference. -unsigned MBlazeRegisterInfo:: +void MBlazeRegisterInfo:: eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, - FrameIndexValue *Value, RegScavenger *RS) const { + RegScavenger *RS) const { MachineInstr &MI = *II; MachineFunction &MF = *MI.getParent()->getParent(); @@ -277,7 +277,6 @@ MI.getOperand(oi).ChangeToImmediate(Offset); MI.getOperand(i).ChangeToRegister(getFrameRegister(MF), false); - return 0; } void MBlazeRegisterInfo:: Modified: llvm/trunk/lib/Target/MBlaze/MBlazeRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeRegisterInfo.h?rev=112241&r1=112240&r2=112241&view=diff ============================================================================== --- llvm/trunk/lib/Target/MBlaze/MBlazeRegisterInfo.h (original) +++ llvm/trunk/lib/Target/MBlaze/MBlazeRegisterInfo.h Thu Aug 26 18:32:16 2010 @@ -63,9 +63,8 @@ MachineBasicBlock::iterator I) const; /// Stack Frame Processing Methods - unsigned eliminateFrameIndex(MachineBasicBlock::iterator II, - int SPAdj, FrameIndexValue *Value = NULL, - RegScavenger *RS = NULL) const; + void eliminateFrameIndex(MachineBasicBlock::iterator II, + int SPAdj, RegScavenger *RS = NULL) const; void processFunctionBeforeFrameFinalized(MachineFunction &MF) const; Modified: llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.cpp?rev=112241&r1=112240&r2=112241&view=diff ============================================================================== --- llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.cpp Thu Aug 26 18:32:16 2010 @@ -163,10 +163,9 @@ MBB.erase(I); } -unsigned +void MSP430RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, - int SPAdj, FrameIndexValue *Value, - RegScavenger *RS) const { + int SPAdj, RegScavenger *RS) const { assert(SPAdj == 0 && "Unexpected"); unsigned i = 0; @@ -204,7 +203,7 @@ MI.getOperand(i).ChangeToRegister(BasePtr, false); if (Offset == 0) - return 0; + return; // We need to materialize the offset via add instruction. unsigned DstReg = MI.getOperand(0).getReg(); @@ -215,12 +214,11 @@ BuildMI(MBB, llvm::next(II), dl, TII.get(MSP430::ADD16ri), DstReg) .addReg(DstReg).addImm(Offset); - return 0; + return; } MI.getOperand(i).ChangeToRegister(BasePtr, false); MI.getOperand(i+1).ChangeToImmediate(Offset); - return 0; } void Modified: llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.h?rev=112241&r1=112240&r2=112241&view=diff ============================================================================== --- llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.h (original) +++ llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.h Thu Aug 26 18:32:16 2010 @@ -46,9 +46,8 @@ MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const; - unsigned eliminateFrameIndex(MachineBasicBlock::iterator II, - int SPAdj, FrameIndexValue *Value = NULL, - RegScavenger *RS = NULL) const; + void eliminateFrameIndex(MachineBasicBlock::iterator II, + int SPAdj, RegScavenger *RS = NULL) const; void emitPrologue(MachineFunction &MF) const; void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; Modified: llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp?rev=112241&r1=112240&r2=112241&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp Thu Aug 26 18:32:16 2010 @@ -327,10 +327,9 @@ // FrameIndex represent objects inside a abstract stack. // We must replace FrameIndex with an stack/frame pointer // direct reference. -unsigned MipsRegisterInfo:: +void MipsRegisterInfo:: eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, - FrameIndexValue *Value, RegScavenger *RS) const -{ + RegScavenger *RS) const { MachineInstr &MI = *II; MachineFunction &MF = *MI.getParent()->getParent(); @@ -361,7 +360,6 @@ MI.getOperand(i-1).ChangeToImmediate(Offset); MI.getOperand(i).ChangeToRegister(getFrameRegister(MF), false); - return 0; } void MipsRegisterInfo:: Modified: llvm/trunk/lib/Target/Mips/MipsRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsRegisterInfo.h?rev=112241&r1=112240&r2=112241&view=diff ============================================================================== --- llvm/trunk/lib/Target/Mips/MipsRegisterInfo.h (original) +++ llvm/trunk/lib/Target/Mips/MipsRegisterInfo.h Thu Aug 26 18:32:16 2010 @@ -51,9 +51,8 @@ MachineBasicBlock::iterator I) const; /// Stack Frame Processing Methods - unsigned eliminateFrameIndex(MachineBasicBlock::iterator II, - int SPAdj, FrameIndexValue *Value = NULL, - RegScavenger *RS = NULL) const; + void eliminateFrameIndex(MachineBasicBlock::iterator II, + int SPAdj, RegScavenger *RS = NULL) const; void processFunctionBeforeFrameFinalized(MachineFunction &MF) const; Modified: llvm/trunk/lib/Target/PIC16/PIC16RegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16RegisterInfo.cpp?rev=112241&r1=112240&r2=112241&view=diff ============================================================================== --- llvm/trunk/lib/Target/PIC16/PIC16RegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/PIC16/PIC16RegisterInfo.cpp Thu Aug 26 18:32:16 2010 @@ -44,13 +44,10 @@ return false; } -unsigned PIC16RegisterInfo:: +void PIC16RegisterInfo:: eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, - FrameIndexValue *Value, RegScavenger *RS) const -{ - /* NOT YET IMPLEMENTED */ - return 0; -} + RegScavenger *RS) const +{ /* NOT YET IMPLEMENTED */ } void PIC16RegisterInfo::emitPrologue(MachineFunction &MF) const { /* NOT YET IMPLEMENTED */ } Modified: llvm/trunk/lib/Target/PIC16/PIC16RegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16RegisterInfo.h?rev=112241&r1=112240&r2=112241&view=diff ============================================================================== --- llvm/trunk/lib/Target/PIC16/PIC16RegisterInfo.h (original) +++ llvm/trunk/lib/Target/PIC16/PIC16RegisterInfo.h Thu Aug 26 18:32:16 2010 @@ -44,9 +44,8 @@ virtual BitVector getReservedRegs(const MachineFunction &MF) const; virtual bool hasFP(const MachineFunction &MF) const; - virtual unsigned eliminateFrameIndex(MachineBasicBlock::iterator MI, - int SPAdj, FrameIndexValue *Value = NULL, - RegScavenger *RS=NULL) const; + virtual void eliminateFrameIndex(MachineBasicBlock::iterator MI, + int SPAdj, RegScavenger *RS=NULL) const; void eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, Modified: llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp?rev=112241&r1=112240&r2=112241&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp Thu Aug 26 18:32:16 2010 @@ -580,10 +580,9 @@ MBB.erase(II); } -unsigned +void PPCRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, - int SPAdj, FrameIndexValue *Value, - RegScavenger *RS) const { + int SPAdj, RegScavenger *RS) const { assert(SPAdj == 0 && "Unexpected"); // Get the instruction. @@ -622,14 +621,14 @@ if (FPSI && FrameIndex == FPSI && (OpC == PPC::DYNALLOC || OpC == PPC::DYNALLOC8)) { lowerDynamicAlloc(II, SPAdj, RS); - return 0; + return; } // Special case for pseudo-op SPILL_CR. if (EnableRegisterScavenging) // FIXME (64-bit): Enable by default. if (OpC == PPC::SPILL_CR) { lowerCRSpilling(II, FrameIndex, SPAdj, RS); - return 0; + return; } // Replace the FrameIndex with base register with GPR1 (SP) or GPR31 (FP). @@ -674,7 +673,7 @@ if (isIXAddr) Offset >>= 2; // The actual encoded value has the low two bits zero. MI.getOperand(OffsetOperandNo).ChangeToImmediate(Offset); - return 0; + return; } // The offset doesn't fit into a single register, scavenge one to build the @@ -710,11 +709,10 @@ } else { OperandBase = OffsetOperandNo; } - + unsigned StackReg = MI.getOperand(FIOperandNo).getReg(); MI.getOperand(OperandBase).ChangeToRegister(StackReg, false); MI.getOperand(OperandBase + 1).ChangeToRegister(SReg, false); - return 0; } /// VRRegNo - Map from a numbered VR register to its enum value. Modified: llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.h?rev=112241&r1=112240&r2=112241&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.h (original) +++ llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.h Thu Aug 26 18:32:16 2010 @@ -63,9 +63,8 @@ int SPAdj, RegScavenger *RS) const; void lowerCRSpilling(MachineBasicBlock::iterator II, unsigned FrameIndex, int SPAdj, RegScavenger *RS) const; - unsigned eliminateFrameIndex(MachineBasicBlock::iterator II, - int SPAdj, FrameIndexValue *Value = NULL, - RegScavenger *RS = NULL) const; + void eliminateFrameIndex(MachineBasicBlock::iterator II, + int SPAdj, RegScavenger *RS = NULL) const; /// determineFrameLayout - Determine the size of the frame and maximum call /// frame size. Modified: llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.cpp?rev=112241&r1=112240&r2=112241&view=diff ============================================================================== --- llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.cpp Thu Aug 26 18:32:16 2010 @@ -69,10 +69,9 @@ MBB.erase(I); } -unsigned +void SparcRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, - int SPAdj, FrameIndexValue *Value, - RegScavenger *RS) const { + int SPAdj, RegScavenger *RS) const { assert(SPAdj == 0 && "Unexpected"); unsigned i = 0; @@ -108,7 +107,6 @@ MI.getOperand(i).ChangeToRegister(SP::G1, false); MI.getOperand(i+1).ChangeToImmediate(Offset & ((1 << 10)-1)); } - return 0; } void SparcRegisterInfo:: Modified: llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.h?rev=112241&r1=112240&r2=112241&view=diff ============================================================================== --- llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.h (original) +++ llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.h Thu Aug 26 18:32:16 2010 @@ -40,9 +40,8 @@ MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const; - unsigned eliminateFrameIndex(MachineBasicBlock::iterator II, - int SPAdj, FrameIndexValue *Value = NULL, - RegScavenger *RS = NULL) const; + void eliminateFrameIndex(MachineBasicBlock::iterator II, + int SPAdj, RegScavenger *RS = NULL) const; void processFunctionBeforeFrameFinalized(MachineFunction &MF) const; Modified: llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.cpp?rev=112241&r1=112240&r2=112241&view=diff ============================================================================== --- llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.cpp Thu Aug 26 18:32:16 2010 @@ -92,10 +92,9 @@ return Offset; } -unsigned +void SystemZRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, - int SPAdj, FrameIndexValue *Value, - RegScavenger *RS) const { + int SPAdj, RegScavenger *RS) const { assert(SPAdj == 0 && "Unxpected"); unsigned i = 0; @@ -117,13 +116,13 @@ // Offset is a either 12-bit unsigned or 20-bit signed integer. // FIXME: handle "too long" displacements. - int Offset = getFrameIndexOffset(MF, FrameIndex) + MI.getOperand(i+1).getImm(); + int Offset = + getFrameIndexOffset(MF, FrameIndex) + MI.getOperand(i+1).getImm(); // Check whether displacement is too long to fit into 12 bit zext field. MI.setDesc(TII.getMemoryInstr(MI.getOpcode(), Offset)); MI.getOperand(i+1).ChangeToImmediate(Offset); - return 0; } void Modified: llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.h?rev=112241&r1=112240&r2=112241&view=diff ============================================================================== --- llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.h (original) +++ llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.h Thu Aug 26 18:32:16 2010 @@ -43,9 +43,8 @@ MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const; - unsigned eliminateFrameIndex(MachineBasicBlock::iterator II, - int SPAdj, FrameIndexValue *Value = NULL, - RegScavenger *RS = NULL) const; + void eliminateFrameIndex(MachineBasicBlock::iterator II, + int SPAdj, RegScavenger *RS = NULL) const; void processFunctionBeforeCalleeSavedScan(MachineFunction &MF, Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp?rev=112241&r1=112240&r2=112241&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp Thu Aug 26 18:32:16 2010 @@ -626,10 +626,9 @@ MBB.erase(I); } -unsigned +void X86RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, - int SPAdj, FrameIndexValue *Value, - RegScavenger *RS) const{ + int SPAdj, RegScavenger *RS) const{ assert(SPAdj == 0 && "Unexpected"); unsigned i = 0; @@ -676,7 +675,6 @@ uint64_t Offset = FIOffset + (uint64_t)MI.getOperand(i+3).getOffset(); MI.getOperand(i+3).setOffset(Offset); } - return 0; } void Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.h?rev=112241&r1=112240&r2=112241&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86RegisterInfo.h (original) +++ llvm/trunk/lib/Target/X86/X86RegisterInfo.h Thu Aug 26 18:32:16 2010 @@ -126,9 +126,8 @@ MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const; - unsigned eliminateFrameIndex(MachineBasicBlock::iterator MI, - int SPAdj, FrameIndexValue *Value = NULL, - RegScavenger *RS = NULL) const; + void eliminateFrameIndex(MachineBasicBlock::iterator MI, + int SPAdj, RegScavenger *RS = NULL) const; void processFunctionBeforeCalleeSavedScan(MachineFunction &MF, RegScavenger *RS = NULL) const; Modified: llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.cpp?rev=112241&r1=112240&r2=112241&view=diff ============================================================================== --- llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.cpp (original) +++ llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.cpp Thu Aug 26 18:32:16 2010 @@ -155,10 +155,9 @@ MBB.erase(I); } -unsigned +void XCoreRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, - int SPAdj, FrameIndexValue *Value, - RegScavenger *RS) const { + int SPAdj, RegScavenger *RS) const { assert(SPAdj == 0 && "Unexpected"); MachineInstr &MI = *II; DebugLoc dl = MI.getDebugLoc(); @@ -291,7 +290,6 @@ } // Erase old instruction. MBB.erase(II); - return 0; } void Modified: llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.h?rev=112241&r1=112240&r2=112241&view=diff ============================================================================== --- llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.h (original) +++ llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.h Thu Aug 26 18:32:16 2010 @@ -54,9 +54,8 @@ MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const; - unsigned eliminateFrameIndex(MachineBasicBlock::iterator II, - int SPAdj, FrameIndexValue *Value = NULL, - RegScavenger *RS = NULL) const; + void eliminateFrameIndex(MachineBasicBlock::iterator II, + int SPAdj, RegScavenger *RS = NULL) const; void processFunctionBeforeCalleeSavedScan(MachineFunction &MF, RegScavenger *RS = NULL) const; From dpatel at apple.com Thu Aug 26 18:35:15 2010 From: dpatel at apple.com (Devang Patel) Date: Thu, 26 Aug 2010 23:35:15 -0000 Subject: [llvm-commits] [llvm] r112242 - in /llvm/trunk/lib/CodeGen/SelectionDAG: SelectionDAGBuilder.cpp SelectionDAGBuilder.h Message-ID: <20100826233515.D88B92A6C12C@llvm.org> Author: dpatel Date: Thu Aug 26 18:35:15 2010 New Revision: 112242 URL: http://llvm.org/viewvc/llvm-project?rev=112242&view=rev Log: Revert r112213. It is not needed. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=112242&r1=112241&r2=112242&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Thu Aug 26 18:35:15 2010 @@ -876,23 +876,12 @@ void SelectionDAGBuilder::resolveDanglingDebugInfo(const Value *V, SDValue Val) { DanglingDebugInfo &DDI = DanglingDebugInfoMap[V]; - MDNode *Variable = NULL; - uint64_t Offset = 0; - - if (const DbgValueInst *DI = dyn_cast_or_null(DDI.getDI())) { - Variable = DI->getVariable(); - Offset = DI->getOffset(); - } else if (const DbgDeclareInst *DI = - dyn_cast_or_null(DDI.getDI())) - Variable = DI->getVariable(); - else { - assert (DDI.getDI() == NULL && "Invalid debug info intrinsic!"); - return; - } - - if (Variable) { + if (DDI.getDI()) { + const DbgValueInst *DI = DDI.getDI(); DebugLoc dl = DDI.getdl(); unsigned DbgSDNodeOrder = DDI.getSDNodeOrder(); + MDNode *Variable = DI->getVariable(); + uint64_t Offset = DI->getOffset(); SDDbgValue *SDV; if (Val.getNode()) { if (!EmitFuncArgumentDbgValue(V, Variable, Offset, Val)) { Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h?rev=112242&r1=112241&r2=112242&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h Thu Aug 26 18:35:15 2010 @@ -36,7 +36,7 @@ class BitCastInst; class BranchInst; class CallInst; -class DbgInfoIntrinsic; +class DbgValueInst; class ExtractElementInst; class ExtractValueInst; class FCmpInst; @@ -96,14 +96,14 @@ /// DanglingDebugInfo - Helper type for DanglingDebugInfoMap. class DanglingDebugInfo { - const DbgInfoIntrinsic* DI; + const DbgValueInst* DI; DebugLoc dl; unsigned SDNodeOrder; public: DanglingDebugInfo() : DI(0), dl(DebugLoc()), SDNodeOrder(0) { } - DanglingDebugInfo(const DbgInfoIntrinsic *di, DebugLoc DL, unsigned SDNO) : + DanglingDebugInfo(const DbgValueInst *di, DebugLoc DL, unsigned SDNO) : DI(di), dl(DL), SDNodeOrder(SDNO) { } - const DbgInfoIntrinsic* getDI() { return DI; } + const DbgValueInst* getDI() { return DI; } DebugLoc getdl() { return dl; } unsigned getSDNodeOrder() { return SDNodeOrder; } }; From daniel at zuster.org Thu Aug 26 20:30:14 2010 From: daniel at zuster.org (Daniel Dunbar) Date: Fri, 27 Aug 2010 01:30:14 -0000 Subject: [llvm-commits] [llvm] r112250 - in /llvm/trunk: lib/Target/X86/X86Instr64bit.td test/CodeGen/X86/lock-inst-encoding.ll Message-ID: <20100827013014.504B32A6C12C@llvm.org> Author: ddunbar Date: Thu Aug 26 20:30:14 2010 New Revision: 112250 URL: http://llvm.org/viewvc/llvm-project?rev=112250&view=rev Log: X86: Fix an encoding issue with LOCK_ADD64mr, which could lead to very hard to find miscompiles with the integrated assembler. Added: llvm/trunk/test/CodeGen/X86/lock-inst-encoding.ll Modified: llvm/trunk/lib/Target/X86/X86Instr64bit.td Modified: llvm/trunk/lib/Target/X86/X86Instr64bit.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Instr64bit.td?rev=112250&r1=112249&r2=112250&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86Instr64bit.td (original) +++ llvm/trunk/lib/Target/X86/X86Instr64bit.td Thu Aug 26 20:30:14 2010 @@ -1678,7 +1678,7 @@ // Optimized codegen when the non-memory output is not used. let Defs = [EFLAGS], mayLoad = 1, mayStore = 1 in { // FIXME: Use normal add / sub instructions and add lock prefix dynamically. -def LOCK_ADD64mr : RI<0x03, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2), +def LOCK_ADD64mr : RI<0x01, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2), "lock\n\t" "add{q}\t{$src2, $dst|$dst, $src2}", []>, LOCK; def LOCK_ADD64mi8 : RIi8<0x83, MRM0m, (outs), Added: llvm/trunk/test/CodeGen/X86/lock-inst-encoding.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/lock-inst-encoding.ll?rev=112250&view=auto ============================================================================== --- llvm/trunk/test/CodeGen/X86/lock-inst-encoding.ll (added) +++ llvm/trunk/test/CodeGen/X86/lock-inst-encoding.ll Thu Aug 26 20:30:14 2010 @@ -0,0 +1,22 @@ +; RUN: llc -O0 --show-mc-encoding < %s | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin10.0.0" + +; CHECK: f0: +; CHECK: addq %rax, (%rdi) +; CHECK: # encoding: [0xf0,0x48,0x01,0x07] +; CHECK: ret +define void @f0(i64* %a0) { + %t0 = and i64 1, 1 + call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true) nounwind + %1 = call i64 @llvm.atomic.load.add.i64.p0i64(i64* %a0, i64 %t0) nounwind + call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true) nounwind + ret void +} + +declare void @llvm.memory.barrier(i1, i1, i1, i1, i1) nounwind + +declare i32 @llvm.atomic.load.and.i32.p0i32(i32* nocapture, i32) nounwind + +declare i64 @llvm.atomic.load.add.i64.p0i64(i64* nocapture, i64) nounwind From bigcheesegs at gmail.com Thu Aug 26 21:49:45 2010 From: bigcheesegs at gmail.com (Michael J. Spencer) Date: Fri, 27 Aug 2010 02:49:45 -0000 Subject: [llvm-commits] [llvm] r112257 - /llvm/trunk/tools/llvm-diff/DifferenceEngine.h Message-ID: <20100827024945.C5BE52A6C12C@llvm.org> Author: mspencer Date: Thu Aug 26 21:49:45 2010 New Revision: 112257 URL: http://llvm.org/viewvc/llvm-project?rev=112257&view=rev Log: Fix the msvs 2010 build. The Microsoft (R) 32-bit C/C++ Optimizing Compiler Version 16.00.30319.01 implements parts of C++0x based on the draft standard. An old version of the draft had a bug that makes std::pair(something, 0) fail to compile. This is because the template pair(U&& x, V&& y) constructor is selected, even though it later fails to implicitly convert U and V to frist_type and second_type. This has been fixed in n3090, but it seems that Microsoft is not going to update msvc. Modified: llvm/trunk/tools/llvm-diff/DifferenceEngine.h Modified: llvm/trunk/tools/llvm-diff/DifferenceEngine.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-diff/DifferenceEngine.h?rev=112257&r1=112256&r2=112257&view=diff ============================================================================== --- llvm/trunk/tools/llvm-diff/DifferenceEngine.h (original) +++ llvm/trunk/tools/llvm-diff/DifferenceEngine.h Thu Aug 26 21:49:45 2010 @@ -79,8 +79,14 @@ void addMatch(Instruction *L, Instruction *R) { Diff.push_back(DiffRecord(L, R)); } - void addLeft(Instruction *L) { Diff.push_back(DiffRecord(L, 0)); } - void addRight(Instruction *R) { Diff.push_back(DiffRecord(0, R)); } + void addLeft(Instruction *L) { + // HACK: VS 2010 has a bug in the stdlib that requires this. + Diff.push_back(DiffRecord(L, DiffRecord::second_type(0))); + } + void addRight(Instruction *R) { + // HACK: VS 2010 has a bug in the stdlib that requires this. + Diff.push_back(DiffRecord(DiffRecord::first_type(0), R)); + } unsigned getNumLines() const { return Diff.size(); } DiffChange getLineKind(unsigned I) const { From clchiou at gmail.com Fri Aug 27 02:01:14 2010 From: clchiou at gmail.com (Che-Liang Chiou) Date: Fri, 27 Aug 2010 15:01:14 +0800 Subject: [llvm-commits] [patch][Target/PTX] Create PTX backend In-Reply-To: References: Message-ID: SVN revision: r112257 re-generate patch against svn head. On Wed, Aug 11, 2010 at 11:10 AM, Che-Liang Chiou wrote: > SVN revision: 110776 > > This patch is a part of upstream work of a PTX backend using LLVM code > generator. > > Change list summary: > - Add an empty backend that is merely compilable > - Add PTX entry to autoconf/configure.ac and include/llvm/ADT/Triple.h > > Outcome: > $ ./configure --enable-targets=ptx > $ make > $ llc -version | grep ptx > ? ?ptx ? - PTX > > Misc: > - Diff of auto-generated files are put in a separated patch > - The autotool version on my machine is newer than > autoconf/AutoGegen.sh requires, so the diff of auto-gen'd files might > be differ with that on your machine > > Cheers, > Che-Liang > -------------- next part -------------- A non-text attachment was scrubbed... Name: r112257-add-ptx-backend.patch Type: text/x-patch Size: 13937 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20100827/48755903/attachment.bin From benny.kra at googlemail.com Fri Aug 27 05:38:39 2010 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Fri, 27 Aug 2010 10:38:39 -0000 Subject: [llvm-commits] [llvm] r112259 - /llvm/trunk/lib/MC/ELFObjectWriter.cpp Message-ID: <20100827103839.B8E212A6C12C@llvm.org> Author: d0k Date: Fri Aug 27 05:38:39 2010 New Revision: 112259 URL: http://llvm.org/viewvc/llvm-project?rev=112259&view=rev Log: MCELF: Always overwrite FixedValue. Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=112259&r1=112258&r2=112259&view=diff ============================================================================== --- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original) +++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Fri Aug 27 05:38:39 2010 @@ -462,13 +462,13 @@ uint64_t &FixedValue) { int64_t Addend = 0; unsigned Index = 0; + int64_t Value = Target.getConstant(); if (!Target.isAbsolute()) { const MCSymbol *Symbol = &Target.getSymA()->getSymbol(); MCSymbolData &SD = Asm.getSymbolData(*Symbol); const MCSymbolData *Base = Asm.getAtom(Layout, &SD); MCFragment *F = SD.getFragment(); - int64_t Value = Target.getConstant(); if (Base) { if (F && (!Symbol->isInSection() || SD.isCommon())) { @@ -496,9 +496,10 @@ return; } } - FixedValue = Value; } + FixedValue = Value; + // determine the type of the relocation bool IsPCRel = isFixupKindX86PCRel(Fixup.getKind()); unsigned Type; From benny.kra at googlemail.com Fri Aug 27 05:40:51 2010 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Fri, 27 Aug 2010 10:40:51 -0000 Subject: [llvm-commits] [llvm] r112260 - /llvm/trunk/lib/MC/MCELFStreamer.cpp Message-ID: <20100827104051.3BBD22A6C12C@llvm.org> Author: d0k Date: Fri Aug 27 05:40:51 2010 New Revision: 112260 URL: http://llvm.org/viewvc/llvm-project?rev=112260&view=rev Log: MCELF: Port EmitInstruction changes from MachO streamer. Patch by Roman Divacky. Modified: llvm/trunk/lib/MC/MCELFStreamer.cpp Modified: llvm/trunk/lib/MC/MCELFStreamer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCELFStreamer.cpp?rev=112260&r1=112259&r2=112260&view=diff ============================================================================== --- llvm/trunk/lib/MC/MCELFStreamer.cpp (original) +++ llvm/trunk/lib/MC/MCELFStreamer.cpp Fri Aug 27 05:40:51 2010 @@ -34,6 +34,8 @@ namespace { class MCELFStreamer : public MCObjectStreamer { + void EmitInstToFragment(const MCInst &Inst); + void EmitInstToData(const MCInst &Inst); public: MCELFStreamer(MCContext &Context, TargetAsmBackend &TAB, raw_ostream &OS, MCCodeEmitter *Emitter) @@ -328,16 +330,25 @@ SD.setFlags(ELF_STT_File | ELF_STB_Local | ELF_STV_Default); } -void MCELFStreamer::EmitInstruction(const MCInst &Inst) { - // Scan for values. - for (unsigned i = 0; i != Inst.getNumOperands(); ++i) - if (Inst.getOperand(i).isExpr()) - AddValueSymbols(Inst.getOperand(i).getExpr()); +void MCELFStreamer::EmitInstToFragment(const MCInst &Inst) { + MCInstFragment *IF = new MCInstFragment(Inst, getCurrentSectionData()); - getCurrentSectionData()->setHasInstructions(true); + // Add the fixups and data. + // + // FIXME: Revisit this design decision when relaxation is done, we may be + // able to get away with not storing any extra data in the MCInst. + SmallVector Fixups; + SmallString<256> Code; + raw_svector_ostream VecOS(Code); + getAssembler().getEmitter().EncodeInstruction(Inst, VecOS, Fixups); + VecOS.flush(); - // FIXME-PERF: Common case is that we don't need to relax, encode directly - // onto the data fragments buffers. + IF->getCode() = Code; + IF->getFixups() = Fixups; +} + +void MCELFStreamer::EmitInstToData(const MCInst &Inst) { + MCDataFragment *DF = getOrCreateDataFragment(); SmallVector Fixups; SmallString<256> Code; @@ -345,47 +356,41 @@ getAssembler().getEmitter().EncodeInstruction(Inst, VecOS, Fixups); VecOS.flush(); - // FIXME: Eliminate this copy. - SmallVector AsmFixups; + // Add the fixups and data. for (unsigned i = 0, e = Fixups.size(); i != e; ++i) { - MCFixup &F = Fixups[i]; - AsmFixups.push_back(MCFixup::Create(F.getOffset(), F.getValue(), - F.getKind())); + Fixups[i].setOffset(Fixups[i].getOffset() + DF->getContents().size()); + DF->addFixup(Fixups[i]); } + DF->getContents().append(Code.begin(), Code.end()); +} - // See if we might need to relax this instruction, if so it needs its own - // fragment. - // - // FIXME-PERF: Support target hook to do a fast path that avoids the encoder, - // when we can immediately tell that we will get something which might need - // relaxation (and compute its size). - // - // FIXME-PERF: We should also be smart about immediately relaxing instructions - // which we can already show will never possibly fit (we can also do a very - // good job of this before we do the first relaxation pass, because we have - // total knowledge about undefined symbols at that point). Even now, though, - // we can do a decent job, especially on Darwin where scattering means that we - // are going to often know that we can never fully resolve a fixup. - if (getAssembler().getBackend().MayNeedRelaxation(Inst)) { - MCInstFragment *IF = new MCInstFragment(Inst, getCurrentSectionData()); - - // Add the fixups and data. - // - // FIXME: Revisit this design decision when relaxation is done, we may be - // able to get away with not storing any extra data in the MCInst. - IF->getCode() = Code; - IF->getFixups() = AsmFixups; +void MCELFStreamer::EmitInstruction(const MCInst &Inst) { + // Scan for values. + for (unsigned i = 0; i != Inst.getNumOperands(); ++i) + if (Inst.getOperand(i).isExpr()) + AddValueSymbols(Inst.getOperand(i).getExpr()); + + getCurrentSectionData()->setHasInstructions(true); + // If this instruction doesn't need relaxation, just emit it as data. + if (!getAssembler().getBackend().MayNeedRelaxation(Inst)) { + EmitInstToData(Inst); return; } - // Add the fixups and data. - MCDataFragment *DF = getOrCreateDataFragment(); - for (unsigned i = 0, e = AsmFixups.size(); i != e; ++i) { - AsmFixups[i].setOffset(AsmFixups[i].getOffset() + DF->getContents().size()); - DF->addFixup(AsmFixups[i]); + // Otherwise, if we are relaxing everything, relax the instruction as much as + // possible and emit it as data. + if (getAssembler().getRelaxAll()) { + MCInst Relaxed; + getAssembler().getBackend().RelaxInstruction(Inst, Relaxed); + while (getAssembler().getBackend().MayNeedRelaxation(Relaxed)) + getAssembler().getBackend().RelaxInstruction(Relaxed, Relaxed); + EmitInstToData(Relaxed); + return; } - DF->getContents().append(Code.begin(), Code.end()); + + // Otherwise emit to a separate fragment. + EmitInstToFragment(Inst); } void MCELFStreamer::Finish() { From asl at math.spbu.ru Fri Aug 27 09:43:06 2010 From: asl at math.spbu.ru (Anton Korobeynikov) Date: Fri, 27 Aug 2010 14:43:06 -0000 Subject: [llvm-commits] [llvm] r112262 - in /llvm/trunk/lib/Target/X86: X86ISelLowering.cpp X86InstrInfo.cpp Message-ID: <20100827144307.1C0C92A6C12C@llvm.org> Author: asl Date: Fri Aug 27 09:43:06 2010 New Revision: 112262 URL: http://llvm.org/viewvc/llvm-project?rev=112262&view=rev Log: Properly handle passing of FP stuff to varargs function on Win64: value should be copied to the corresponding shadow reg as well. Patch by Cameron Esfahani! Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=112262&r1=112261&r2=112262&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Fri Aug 27 09:43:06 2010 @@ -2008,6 +2008,19 @@ if (VA.isRegLoc()) { RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); + if (isVarArg && Subtarget->isTargetWin64()) { + // Win64 ABI requires argument XMM reg to be copied to the corresponding + // shadow reg if callee is a varargs function. + unsigned ShadowReg = 0; + switch (VA.getLocReg()) { + case X86::XMM0: ShadowReg = X86::RCX; break; + case X86::XMM1: ShadowReg = X86::RDX; break; + case X86::XMM2: ShadowReg = X86::R8; break; + case X86::XMM3: ShadowReg = X86::R9; break; + } + if (ShadowReg) + RegsToPass.push_back(std::make_pair(ShadowReg, Arg)); + } } else if (!IsSibcall && (!isTailCall || isByVal)) { assert(VA.isMemLoc()); if (StackPtr.getNode() == 0) Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=112262&r1=112261&r2=112262&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original) +++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Fri Aug 27 09:43:06 2010 @@ -1845,6 +1845,33 @@ return X86::GR8_ABCD_HRegClass.contains(Reg); } +// Try and copy between VR128/VR64 and GR64 registers. +static unsigned CopyToFromAsymmetricReg(unsigned DestReg, unsigned SrcReg) { + // SrcReg(VR128) -> DestReg(GR64) + // SrcReg(VR64) -> DestReg(GR64) + // SrcReg(GR64) -> DestReg(VR128) + // SrcReg(GR64) -> DestReg(VR64) + + if (X86::GR64RegClass.contains(DestReg)) { + if (X86::VR128RegClass.contains(SrcReg)) { + // Copy from a VR128 register to a GR64 register. + return X86::MOVPQIto64rr; + } else if (X86::VR64RegClass.contains(SrcReg)) { + // Copy from a VR64 register to a GR64 register. + return X86::MOVSDto64rr; + } + } else if (X86::GR64RegClass.contains(SrcReg)) { + // Copy from a GR64 register to a VR128 register. + if (X86::VR128RegClass.contains(DestReg)) + return X86::MOV64toPQIrr; + // Copy from a GR64 register to a VR64 register. + else if (X86::VR64RegClass.contains(DestReg)) + return X86::MOV64toSDrr; + } + + return 0; +} + void X86InstrInfo::copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, DebugLoc DL, unsigned DestReg, unsigned SrcReg, @@ -1869,6 +1896,8 @@ Opc = X86::MOVAPSrr; else if (X86::VR64RegClass.contains(DestReg, SrcReg)) Opc = X86::MMX_MOVQ64rr; + else + Opc = CopyToFromAsymmetricReg(DestReg, SrcReg); if (Opc) { BuildMI(MBB, MI, DL, get(Opc), DestReg) From anton at korobeynikov.info Fri Aug 27 09:48:02 2010 From: anton at korobeynikov.info (Anton Korobeynikov) Date: Fri, 27 Aug 2010 18:48:02 +0400 Subject: [llvm-commits] [PATCH] Add support for copying between VR128/VR64 and GR64 In-Reply-To: <81A6750F-8ABC-4EB2-B695-D2FB9B03D1CC@apple.com> References: <81A6750F-8ABC-4EB2-B695-D2FB9B03D1CC@apple.com> Message-ID: Hello, Cameron, > Attached is a patch based on subversion revision 111911 that attempts to fix two problems I've seen while working on Win64 var args. ?According to Microsoft, if you're passing parameters in XMM registers to a var arg function, they need to be copied to the integer register they share the same slot with. ?When I added that functionality, it emerged that there was no support for copying from VR128/VR64 to GR64 Patch applied, thanks! -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University From gohman at apple.com Fri Aug 27 10:15:31 2010 From: gohman at apple.com (Dan Gohman) Date: Fri, 27 Aug 2010 15:15:31 -0000 Subject: [llvm-commits] [llvm] r112264 - /llvm/trunk/utils/vim/vimrc Message-ID: <20100827151531.51BCD2A6C12C@llvm.org> Author: djg Date: Fri Aug 27 10:15:31 2010 New Revision: 112264 URL: http://llvm.org/viewvc/llvm-project?rev=112264&view=rev Log: Default to looking for clang++ in the PATH, rather than trying to guess a path that will work. Modified: llvm/trunk/utils/vim/vimrc Modified: llvm/trunk/utils/vim/vimrc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/vim/vimrc?rev=112264&r1=112263&r2=112264&view=diff ============================================================================== --- llvm/trunk/utils/vim/vimrc (original) +++ llvm/trunk/utils/vim/vimrc Fri Aug 27 10:15:31 2010 @@ -98,8 +98,8 @@ " cast_cast< " turns up some peculiarities -- "asm("? -" A path to the a executable. -let g:clang_path = "Release/bin/clang++" +" A path to a clang executable. +let g:clang_path = "clang++" " A list of options to add to the clang commandline, for example to add " include paths, predefined macros, and language options. From gohman at apple.com Fri Aug 27 10:16:09 2010 From: gohman at apple.com (Dan Gohman) Date: Fri, 27 Aug 2010 15:16:09 -0000 Subject: [llvm-commits] [llvm] r112265 - /llvm/trunk/utils/vim/vimrc Message-ID: <20100827151609.D3B512A6C12C@llvm.org> Author: djg Date: Fri Aug 27 10:16:09 2010 New Revision: 112265 URL: http://llvm.org/viewvc/llvm-project?rev=112265&view=rev Log: Parse " (Hidden)" and cope with it. Modified: llvm/trunk/utils/vim/vimrc Modified: llvm/trunk/utils/vim/vimrc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/vim/vimrc?rev=112265&r1=112264&r2=112265&view=diff ============================================================================== --- llvm/trunk/utils/vim/vimrc (original) +++ llvm/trunk/utils/vim/vimrc Fri Aug 27 10:16:09 2010 @@ -155,6 +155,13 @@ let l:value = l:value[:l:spacecolonspace-1] endif + " Chop off " (Hidden)", if present, and move it to the menu. + let l:hidden = stridx(l:value, " (Hidden)") + if l:hidden != -1 + let l:menu .= " (Hidden)" + let l:value = l:value[:l:hidden-1] + endif + " Handle Pattern. TODO: Make clang less weird. if l:value == "Pattern" let l:value = l:menu From gohman at apple.com Fri Aug 27 10:16:40 2010 From: gohman at apple.com (Dan Gohman) Date: Fri, 27 Aug 2010 15:16:40 -0000 Subject: [llvm-commits] [llvm] r112266 - /llvm/trunk/utils/vim/vimrc Message-ID: <20100827151640.44B802A6C12C@llvm.org> Author: djg Date: Fri Aug 27 10:16:40 2010 New Revision: 112266 URL: http://llvm.org/viewvc/llvm-project?rev=112266&view=rev Log: Clarify a comment. Modified: llvm/trunk/utils/vim/vimrc Modified: llvm/trunk/utils/vim/vimrc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/vim/vimrc?rev=112266&r1=112265&r2=112266&view=diff ============================================================================== --- llvm/trunk/utils/vim/vimrc (original) +++ llvm/trunk/utils/vim/vimrc Fri Aug 27 10:16:40 2010 @@ -162,7 +162,7 @@ let l:value = l:value[:l:hidden-1] endif - " Handle Pattern. TODO: Make clang less weird. + " Handle "Pattern". TODO: Make clang less weird. if l:value == "Pattern" let l:value = l:menu let l:pound = stridx(l:value, "#") From gohman at apple.com Fri Aug 27 10:26:01 2010 From: gohman at apple.com (Dan Gohman) Date: Fri, 27 Aug 2010 15:26:01 -0000 Subject: [llvm-commits] [llvm] r112267 - /llvm/trunk/lib/Analysis/ScalarEvolution.cpp Message-ID: <20100827152601.655682A6C12C@llvm.org> Author: djg Date: Fri Aug 27 10:26:01 2010 New Revision: 112267 URL: http://llvm.org/viewvc/llvm-project?rev=112267&view=rev Log: Optimize SCEVComplexityCompare. Use a 3-way return instead of a 2-way return to avoid needing two calls to test for equivalence, and sort addrecs by their degree before examining their operands. Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=112267&r1=112266&r2=112267&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original) +++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Fri Aug 27 10:26:01 2010 @@ -523,24 +523,34 @@ public: explicit SCEVComplexityCompare(const LoopInfo *li) : LI(li) {} + // Return true or false if LHS is less than, or at least RHS, respectively. bool operator()(const SCEV *LHS, const SCEV *RHS) const { + return compare(LHS, RHS) < 0; + } + + // Return negative, zero, or positive, if LHS is less than, equal to, or + // greater than RHS, respectively. A three-way result allows recursive + // comparisons to be more efficient. + int compare(const SCEV *LHS, const SCEV *RHS) const { // Fast-path: SCEVs are uniqued so we can do a quick equality check. if (LHS == RHS) - return false; + return 0; // Primarily, sort the SCEVs by their getSCEVType(). unsigned LType = LHS->getSCEVType(), RType = RHS->getSCEVType(); if (LType != RType) - return LType < RType; + return (int)LType - (int)RType; // Aside from the getSCEVType() ordering, the particular ordering // isn't very important except that it's beneficial to be consistent, // so that (a + b) and (b + a) don't end up as different expressions. - - // Sort SCEVUnknown values with some loose heuristics. TODO: This is - // not as complete as it could be. - if (const SCEVUnknown *LU = dyn_cast(LHS)) { + switch (LType) { + case scUnknown: { + const SCEVUnknown *LU = cast(LHS); const SCEVUnknown *RU = cast(RHS); + + // Sort SCEVUnknown values with some loose heuristics. TODO: This is + // not as complete as it could be. const Value *LV = LU->getValue(), *RV = RU->getValue(); // Order pointer values after integer values. This helps SCEVExpander @@ -548,22 +558,23 @@ bool LIsPointer = LV->getType()->isPointerTy(), RIsPointer = RV->getType()->isPointerTy(); if (LIsPointer != RIsPointer) - return RIsPointer; + return (int)LIsPointer - (int)RIsPointer; // Compare getValueID values. unsigned LID = LV->getValueID(), RID = RV->getValueID(); if (LID != RID) - return LID < RID; + return (int)LID - (int)RID; // Sort arguments by their position. if (const Argument *LA = dyn_cast(LV)) { const Argument *RA = cast(RV); - return LA->getArgNo() < RA->getArgNo(); + unsigned LArgNo = LA->getArgNo(), RArgNo = RA->getArgNo(); + return (int)LArgNo - (int)RArgNo; } - // For instructions, compare their loop depth, and their opcode. - // This is pretty loose. + // For instructions, compare their loop depth, and their operand + // count. This is pretty loose. if (const Instruction *LInst = dyn_cast(LV)) { const Instruction *RInst = cast(RV); @@ -574,82 +585,105 @@ unsigned LDepth = LI->getLoopDepth(LParent), RDepth = LI->getLoopDepth(RParent); if (LDepth != RDepth) - return LDepth < RDepth; + return (int)LDepth - (int)RDepth; } // Compare the number of operands. unsigned LNumOps = LInst->getNumOperands(), RNumOps = RInst->getNumOperands(); - if (LNumOps != RNumOps) - return LNumOps < RNumOps; + return (int)LNumOps - (int)RNumOps; } - return false; + return 0; } - // Compare constant values. - if (const SCEVConstant *LC = dyn_cast(LHS)) { + case scConstant: { + const SCEVConstant *LC = cast(LHS); const SCEVConstant *RC = cast(RHS); + + // Compare constant values. const APInt &LA = LC->getValue()->getValue(); const APInt &RA = RC->getValue()->getValue(); unsigned LBitWidth = LA.getBitWidth(), RBitWidth = RA.getBitWidth(); if (LBitWidth != RBitWidth) - return LBitWidth < RBitWidth; - return LA.ult(RA); + return (int)LBitWidth - (int)RBitWidth; + return LA.ult(RA) ? -1 : 1; } - // Compare addrec loop depths. - if (const SCEVAddRecExpr *LA = dyn_cast(LHS)) { + case scAddRecExpr: { + const SCEVAddRecExpr *LA = cast(LHS); const SCEVAddRecExpr *RA = cast(RHS); + + // Compare addrec loop depths. const Loop *LLoop = LA->getLoop(), *RLoop = RA->getLoop(); if (LLoop != RLoop) { unsigned LDepth = LLoop->getLoopDepth(), RDepth = RLoop->getLoopDepth(); if (LDepth != RDepth) - return LDepth < RDepth; + return (int)LDepth - (int)RDepth; } + + // Addrec complexity grows with operand count. + unsigned LNumOps = LA->getNumOperands(), RNumOps = RA->getNumOperands(); + if (LNumOps != RNumOps) + return (int)LNumOps - (int)RNumOps; + + // Lexicographically compare. + for (unsigned i = 0; i != LNumOps; ++i) { + long X = compare(LA->getOperand(i), RA->getOperand(i)); + if (X != 0) + return X; + } + + return 0; } - // Lexicographically compare n-ary expressions. - if (const SCEVNAryExpr *LC = dyn_cast(LHS)) { + case scAddExpr: + case scMulExpr: + case scSMaxExpr: + case scUMaxExpr: { + const SCEVNAryExpr *LC = cast(LHS); const SCEVNAryExpr *RC = cast(RHS); + + // Lexicographically compare n-ary expressions. unsigned LNumOps = LC->getNumOperands(), RNumOps = RC->getNumOperands(); for (unsigned i = 0; i != LNumOps; ++i) { if (i >= RNumOps) - return false; - const SCEV *LOp = LC->getOperand(i), *ROp = RC->getOperand(i); - if (operator()(LOp, ROp)) - return true; - if (operator()(ROp, LOp)) - return false; + return 1; + long X = compare(LC->getOperand(i), RC->getOperand(i)); + if (X != 0) + return X; } - return LNumOps < RNumOps; + return (int)LNumOps - (int)RNumOps; } - // Lexicographically compare udiv expressions. - if (const SCEVUDivExpr *LC = dyn_cast(LHS)) { + case scUDivExpr: { + const SCEVUDivExpr *LC = cast(LHS); const SCEVUDivExpr *RC = cast(RHS); - const SCEV *LL = LC->getLHS(), *LR = LC->getRHS(), - *RL = RC->getLHS(), *RR = RC->getRHS(); - if (operator()(LL, RL)) - return true; - if (operator()(RL, LL)) - return false; - if (operator()(LR, RR)) - return true; - if (operator()(RR, LR)) - return false; - return false; + + // Lexicographically compare udiv expressions. + long X = compare(LC->getLHS(), RC->getLHS()); + if (X != 0) + return X; + return compare(LC->getRHS(), RC->getRHS()); } - // Compare cast expressions by operand. - if (const SCEVCastExpr *LC = dyn_cast(LHS)) { + case scTruncate: + case scZeroExtend: + case scSignExtend: { + const SCEVCastExpr *LC = cast(LHS); const SCEVCastExpr *RC = cast(RHS); - return operator()(LC->getOperand(), RC->getOperand()); + + // Compare cast expressions by operand. + return compare(LC->getOperand(), RC->getOperand()); + } + + default: + break; } llvm_unreachable("Unknown SCEV kind!"); - return false; + return 0; } }; } From resistor at mac.com Fri Aug 27 12:12:30 2010 From: resistor at mac.com (Owen Anderson) Date: Fri, 27 Aug 2010 17:12:30 -0000 Subject: [llvm-commits] [llvm] r112270 - in /llvm/trunk: lib/Analysis/LazyValueInfo.cpp lib/Transforms/Scalar/JumpThreading.cpp test/Transforms/JumpThreading/basic.ll test/Transforms/JumpThreading/lvi-load.ll Message-ID: <20100827171230.148632A6C12C@llvm.org> Author: resistor Date: Fri Aug 27 12:12:29 2010 New Revision: 112270 URL: http://llvm.org/viewvc/llvm-project?rev=112270&view=rev Log: Use LVI to eliminate conditional branches where we've tested a related condition previously. Update tests for this change. This fixes PR5652. Modified: llvm/trunk/lib/Analysis/LazyValueInfo.cpp llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp llvm/trunk/test/Transforms/JumpThreading/basic.ll llvm/trunk/test/Transforms/JumpThreading/lvi-load.ll Modified: llvm/trunk/lib/Analysis/LazyValueInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/LazyValueInfo.cpp?rev=112270&r1=112269&r2=112270&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/LazyValueInfo.cpp (original) +++ llvm/trunk/lib/Analysis/LazyValueInfo.cpp Fri Aug 27 12:12:29 2010 @@ -656,7 +656,8 @@ // Figure out the possible values of the query BEFORE this branch. LVILatticeVal InBlock = getBlockValue(BBFrom); - if (!InBlock.isConstantRange()) return InBlock; + if (!InBlock.isConstantRange()) + return LVILatticeVal::getRange(TrueValues); // Find all potential values that satisfy both the input and output // conditions. Modified: llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp?rev=112270&r1=112269&r2=112270&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp Fri Aug 27 12:12:29 2010 @@ -669,6 +669,45 @@ } } } + + // For a comparison where the LHS is outside this block, it's possible + // that we've branch on it before. Used LVI to see if we can simplify + // the branch based on that. + BranchInst *CondBr = dyn_cast(BB->getTerminator()); + Constant *CondConst = dyn_cast(CondCmp->getOperand(1)); + if (LVI && CondBr && CondConst && CondBr->isConditional() && + (!isa(CondCmp->getOperand(0)) || + cast(CondCmp->getOperand(0))->getParent() != BB)) { + // For predecessor edge, determine if the comparison is true or false + // on that edge. If they're all true or all false, we can simplify the + // branch. + // FIXME: We could handle mixed true/false by duplicating code. + unsigned Trues = 0, Falses = 0, predcount = 0; + for (pred_iterator PI = pred_begin(BB), PE = pred_end(BB);PI != PE; ++PI){ + ++predcount; + LazyValueInfo::Tristate Ret = + LVI->getPredicateOnEdge(CondCmp->getPredicate(), + CondCmp->getOperand(0), CondConst, *PI, BB); + if (Ret == LazyValueInfo::True) + ++Trues; + else if (Ret == LazyValueInfo::False) + ++Falses; + } + + // If we can determine the branch direction statically, converted + // the conditional branch to an unconditional one. + if (Trues && Trues == predcount) { + RemovePredecessorAndSimplify(CondBr->getSuccessor(1), BB, TD); + BranchInst::Create(CondBr->getSuccessor(0), CondBr); + CondBr->eraseFromParent(); + return true; + } else if (Falses && Falses == predcount) { + RemovePredecessorAndSimplify(CondBr->getSuccessor(0), BB, TD); + BranchInst::Create(CondBr->getSuccessor(1), CondBr); + CondBr->eraseFromParent(); + return true; + } + } } // Check for some cases that are worth simplifying. Right now we want to look Modified: llvm/trunk/test/Transforms/JumpThreading/basic.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/JumpThreading/basic.ll?rev=112270&r1=112269&r2=112270&view=diff ============================================================================== --- llvm/trunk/test/Transforms/JumpThreading/basic.ll (original) +++ llvm/trunk/test/Transforms/JumpThreading/basic.ll Fri Aug 27 12:12:29 2010 @@ -147,11 +147,17 @@ ; CHECK: @test6 %tmp455 = icmp eq i32 %A, 42 br i1 %tmp455, label %BB1, label %BB2 - -BB2: + +; CHECK: call i32 @f2() +; CHECK-NEXT: ret i32 3 + ; CHECK: call i32 @f1() -; CHECK-NEXT: call void @f3() -; CHECK-NEXT: ret i32 4 +; CHECK-NOT: br +; CHECK: call void @f3() +; CHECK-NOT: br +; CHECK: ret i32 4 + +BB2: call i32 @f1() br label %BB1 Modified: llvm/trunk/test/Transforms/JumpThreading/lvi-load.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/JumpThreading/lvi-load.ll?rev=112270&r1=112269&r2=112270&view=diff ============================================================================== --- llvm/trunk/test/Transforms/JumpThreading/lvi-load.ll (original) +++ llvm/trunk/test/Transforms/JumpThreading/lvi-load.ll Fri Aug 27 12:12:29 2010 @@ -1,4 +1,4 @@ -; RUN: opt -S -jump-threading -enable-jump-threading-lvi < %s | FileCheck %s +; RUN: opt -S -jump-threading -enable-jump-threading-lvi -dce < %s | FileCheck %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target triple = "x86_64-apple-darwin10.4" @@ -25,6 +25,7 @@ %toBoolnot.i.i = icmp ult i8 %1, 21 ; [#uses=1] br i1 %toBoolnot.i.i, label %bb6.i.i, label %_ZN4llvm8dyn_castINS_11InstructionEPNS_5ValueEEENS_10cast_rettyIT_T0_E8ret_typeERKS6_.exit +; CHECK-NOT: assert bb6.i.i: ; preds = %bb.i tail call void @__assert_rtn(i8* getelementptr inbounds ([5 x i8]* @_ZZN4llvm4castINS_11InstructionEPNS_5ValueEEENS_10cast_rettyIT_T0_E8ret_typeERKS6_E8__func__, i64 0, i64 0), i8* getelementptr inbounds ([31 x i8]* @.str, i64 0, i64 0), i32 202, i8* getelementptr inbounds ([59 x i8]* @.str1, i64 0, i64 0)) noreturn unreachable From bob.wilson at apple.com Fri Aug 27 12:13:24 2010 From: bob.wilson at apple.com (Bob Wilson) Date: Fri, 27 Aug 2010 17:13:24 -0000 Subject: [llvm-commits] [llvm] r112271 - in /llvm/trunk: include/llvm/ lib/VMCore/ test/Bitcode/ test/CodeGen/ARM/ test/CodeGen/Thumb2/ Message-ID: <20100827171324.EB4982A6C12C@llvm.org> Author: bwilson Date: Fri Aug 27 12:13:24 2010 New Revision: 112271 URL: http://llvm.org/viewvc/llvm-project?rev=112271&view=rev Log: Add alignment arguments to all the NEON load/store intrinsics. Update all the tests using those intrinsics and add support for auto-upgrading bitcode files with the old versions of the intrinsics. Modified: llvm/trunk/include/llvm/IntrinsicsARM.td llvm/trunk/lib/VMCore/AutoUpgrade.cpp llvm/trunk/test/Bitcode/neon-intrinsics.ll llvm/trunk/test/Bitcode/neon-intrinsics.ll.bc llvm/trunk/test/CodeGen/ARM/2010-05-20-NEONSpillCrash.ll llvm/trunk/test/CodeGen/ARM/2010-05-21-BuildVector.ll llvm/trunk/test/CodeGen/ARM/2010-06-11-vmovdrr-bitcast.ll llvm/trunk/test/CodeGen/ARM/2010-06-29-PartialRedefFastAlloc.ll llvm/trunk/test/CodeGen/ARM/reg_sequence.ll llvm/trunk/test/CodeGen/ARM/spill-q.ll llvm/trunk/test/CodeGen/ARM/vld1.ll llvm/trunk/test/CodeGen/ARM/vld2.ll llvm/trunk/test/CodeGen/ARM/vld3.ll llvm/trunk/test/CodeGen/ARM/vld4.ll llvm/trunk/test/CodeGen/ARM/vldlane.ll llvm/trunk/test/CodeGen/ARM/vst1.ll llvm/trunk/test/CodeGen/ARM/vst2.ll llvm/trunk/test/CodeGen/ARM/vst3.ll llvm/trunk/test/CodeGen/ARM/vst4.ll llvm/trunk/test/CodeGen/ARM/vstlane.ll llvm/trunk/test/CodeGen/Thumb2/crash.ll llvm/trunk/test/CodeGen/Thumb2/machine-licm-vdup.ll llvm/trunk/test/CodeGen/Thumb2/machine-licm.ll llvm/trunk/test/CodeGen/Thumb2/thumb2-spill-q.ll Modified: llvm/trunk/include/llvm/IntrinsicsARM.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IntrinsicsARM.td?rev=112271&r1=112270&r2=112271&view=diff ============================================================================== --- llvm/trunk/include/llvm/IntrinsicsARM.td (original) +++ llvm/trunk/include/llvm/IntrinsicsARM.td Fri Aug 27 12:13:24 2010 @@ -339,62 +339,76 @@ let TargetPrefix = "arm" in { // De-interleaving vector loads from N-element structures. + // Source operands are the address and alignment. def int_arm_neon_vld1 : Intrinsic<[llvm_anyvector_ty], - [llvm_ptr_ty], [IntrReadArgMem]>; + [llvm_ptr_ty, llvm_i32_ty], + [IntrReadArgMem]>; def int_arm_neon_vld2 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>], - [llvm_ptr_ty], [IntrReadArgMem]>; + [llvm_ptr_ty, llvm_i32_ty], + [IntrReadArgMem]>; def int_arm_neon_vld3 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>, LLVMMatchType<0>], - [llvm_ptr_ty], [IntrReadArgMem]>; + [llvm_ptr_ty, llvm_i32_ty], + [IntrReadArgMem]>; def int_arm_neon_vld4 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>], - [llvm_ptr_ty], [IntrReadArgMem]>; + [llvm_ptr_ty, llvm_i32_ty], + [IntrReadArgMem]>; // Vector load N-element structure to one lane. + // Source operands are: the address, the N input vectors (since only one + // lane is assigned), the lane number, and the alignment. def int_arm_neon_vld2lane : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>], [llvm_ptr_ty, LLVMMatchType<0>, - LLVMMatchType<0>, llvm_i32_ty], - [IntrReadArgMem]>; + LLVMMatchType<0>, llvm_i32_ty, + llvm_i32_ty], [IntrReadArgMem]>; def int_arm_neon_vld3lane : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>, LLVMMatchType<0>], [llvm_ptr_ty, LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>, - llvm_i32_ty], [IntrReadArgMem]>; + llvm_i32_ty, llvm_i32_ty], + [IntrReadArgMem]>; def int_arm_neon_vld4lane : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>], [llvm_ptr_ty, LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>, - LLVMMatchType<0>, llvm_i32_ty], - [IntrReadArgMem]>; + LLVMMatchType<0>, llvm_i32_ty, + llvm_i32_ty], [IntrReadArgMem]>; // Interleaving vector stores from N-element structures. + // Source operands are: the address, the N vectors, and the alignment. def int_arm_neon_vst1 : Intrinsic<[], - [llvm_ptr_ty, llvm_anyvector_ty], - [IntrReadWriteArgMem]>; + [llvm_ptr_ty, llvm_anyvector_ty, + llvm_i32_ty], [IntrReadWriteArgMem]>; def int_arm_neon_vst2 : Intrinsic<[], [llvm_ptr_ty, llvm_anyvector_ty, - LLVMMatchType<0>], [IntrReadWriteArgMem]>; + LLVMMatchType<0>, llvm_i32_ty], + [IntrReadWriteArgMem]>; def int_arm_neon_vst3 : Intrinsic<[], [llvm_ptr_ty, llvm_anyvector_ty, - LLVMMatchType<0>, LLVMMatchType<0>], - [IntrReadWriteArgMem]>; + LLVMMatchType<0>, LLVMMatchType<0>, + llvm_i32_ty], [IntrReadWriteArgMem]>; def int_arm_neon_vst4 : Intrinsic<[], [llvm_ptr_ty, llvm_anyvector_ty, LLVMMatchType<0>, LLVMMatchType<0>, - LLVMMatchType<0>], [IntrReadWriteArgMem]>; + LLVMMatchType<0>, llvm_i32_ty], + [IntrReadWriteArgMem]>; // Vector store N-element structure from one lane. + // Source operands are: the address, the N vectors, the lane number, and + // the alignment. def int_arm_neon_vst2lane : Intrinsic<[], [llvm_ptr_ty, llvm_anyvector_ty, - LLVMMatchType<0>, llvm_i32_ty], - [IntrReadWriteArgMem]>; + LLVMMatchType<0>, llvm_i32_ty, + llvm_i32_ty], [IntrReadWriteArgMem]>; def int_arm_neon_vst3lane : Intrinsic<[], [llvm_ptr_ty, llvm_anyvector_ty, LLVMMatchType<0>, LLVMMatchType<0>, - llvm_i32_ty], [IntrReadWriteArgMem]>; + llvm_i32_ty, llvm_i32_ty], + [IntrReadWriteArgMem]>; def int_arm_neon_vst4lane : Intrinsic<[], [llvm_ptr_ty, llvm_anyvector_ty, LLVMMatchType<0>, LLVMMatchType<0>, - LLVMMatchType<0>, llvm_i32_ty], - [IntrReadWriteArgMem]>; + LLVMMatchType<0>, llvm_i32_ty, + llvm_i32_ty], [IntrReadWriteArgMem]>; } Modified: llvm/trunk/lib/VMCore/AutoUpgrade.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/AutoUpgrade.cpp?rev=112271&r1=112270&r2=112271&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/AutoUpgrade.cpp (original) +++ llvm/trunk/lib/VMCore/AutoUpgrade.cpp Fri Aug 27 12:13:24 2010 @@ -85,6 +85,39 @@ NewFn = 0; return true; } + // Old versions of NEON ld/st intrinsics are missing alignment arguments. + bool isVLd = (Name.compare(14, 3, "vld", 3) == 0); + bool isVSt = (Name.compare(14, 3, "vst", 3) == 0); + if (isVLd || isVSt) { + unsigned NumVecs = Name.at(17) - '0'; + if (NumVecs == 0 || NumVecs > 4) + return false; + bool isLaneOp = (Name.compare(18, 5, "lane.", 5) == 0); + if (!isLaneOp && Name.at(18) != '.') + return false; + unsigned ExpectedArgs = 2; // for the address and alignment + if (isVSt || isLaneOp) + ExpectedArgs += NumVecs; + if (isLaneOp) + ExpectedArgs += 1; // for the lane number + unsigned NumP = FTy->getNumParams(); + if (NumP != ExpectedArgs - 1) + return false; + + // Change the name of the old (bad) intrinsic, because + // its type is incorrect, but we cannot overload that name. + F->setName(""); + + // One argument is missing: add the alignment argument. + std::vector NewParams; + for (unsigned p = 0; p < NumP; ++p) + NewParams.push_back(FTy->getParamType(p)); + NewParams.push_back(Type::getInt32Ty(F->getContext())); + FunctionType *NewFTy = FunctionType::get(FTy->getReturnType(), + NewParams, false); + NewFn = cast(M->getOrInsertFunction(Name, NewFTy)); + return true; + } } break; case 'b': @@ -189,7 +222,6 @@ NewFnName = "llvm.memset.p0i8.i64"; } if (NewFnName) { - const FunctionType *FTy = F->getFunctionType(); NewFn = cast(M->getOrInsertFunction(NewFnName, FTy->getReturnType(), FTy->getParamType(0), @@ -578,6 +610,39 @@ switch (NewFn->getIntrinsicID()) { default: llvm_unreachable("Unknown function for CallInst upgrade."); + case Intrinsic::arm_neon_vld1: + case Intrinsic::arm_neon_vld2: + case Intrinsic::arm_neon_vld3: + case Intrinsic::arm_neon_vld4: + case Intrinsic::arm_neon_vst1: + case Intrinsic::arm_neon_vst2: + case Intrinsic::arm_neon_vst3: + case Intrinsic::arm_neon_vst4: + case Intrinsic::arm_neon_vld2lane: + case Intrinsic::arm_neon_vld3lane: + case Intrinsic::arm_neon_vld4lane: + case Intrinsic::arm_neon_vst2lane: + case Intrinsic::arm_neon_vst3lane: + case Intrinsic::arm_neon_vst4lane: { + // Add a default alignment argument of 1. + SmallVector Operands(CS.arg_begin(), CS.arg_end()); + Operands.push_back(ConstantInt::get(Type::getInt32Ty(C), 1)); + CallInst *NewCI = CallInst::Create(NewFn, Operands.begin(), Operands.end(), + CI->getName(), CI); + NewCI->setTailCall(CI->isTailCall()); + NewCI->setCallingConv(CI->getCallingConv()); + + // Handle any uses of the old CallInst. + if (!CI->use_empty()) + // Replace all uses of the old call with the new cast which has the + // correct type. + CI->replaceAllUsesWith(NewCI); + + // Clean up the old call now that it has been completely upgraded. + CI->eraseFromParent(); + break; + } + case Intrinsic::x86_mmx_psll_d: case Intrinsic::x86_mmx_psll_q: case Intrinsic::x86_mmx_psll_w: Modified: llvm/trunk/test/Bitcode/neon-intrinsics.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Bitcode/neon-intrinsics.ll?rev=112271&r1=112270&r2=112271&view=diff ============================================================================== --- llvm/trunk/test/Bitcode/neon-intrinsics.ll (original) +++ llvm/trunk/test/Bitcode/neon-intrinsics.ll Fri Aug 27 12:13:24 2010 @@ -27,3 +27,37 @@ ; CHECK: vmovlu32 ; CHECK-NOT: arm.neon.vmovlu.v2i64 ; CHECK: zext <2 x i32> + +; vld* and vst* intrinsic calls need an alignment argument (defaulted to 1) + +; CHECK: vld1i8 +; CHECK: i32 1 +; CHECK: vld2Qi16 +; CHECK: i32 1 +; CHECK: vld3i32 +; CHECK: i32 1 +; CHECK: vld4Qf +; CHECK: i32 1 + +; CHECK: vst1i8 +; CHECK: i32 1 +; CHECK: vst2Qi16 +; CHECK: i32 1 +; CHECK: vst3i32 +; CHECK: i32 1 +; CHECK: vst4Qf +; CHECK: i32 1 + +; CHECK: vld2laneQi16 +; CHECK: i32 1 +; CHECK: vld3lanei32 +; CHECK: i32 1 +; CHECK: vld4laneQf +; CHECK: i32 1 + +; CHECK: vst2laneQi16 +; CHECK: i32 1 +; CHECK: vst3lanei32 +; CHECK: i32 1 +; CHECK: vst4laneQf +; CHECK: i32 1 Modified: llvm/trunk/test/Bitcode/neon-intrinsics.ll.bc URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Bitcode/neon-intrinsics.ll.bc?rev=112271&r1=112270&r2=112271&view=diff ============================================================================== Binary files - no diff available. Modified: llvm/trunk/test/CodeGen/ARM/2010-05-20-NEONSpillCrash.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2010-05-20-NEONSpillCrash.ll?rev=112271&r1=112270&r2=112271&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/2010-05-20-NEONSpillCrash.ll (original) +++ llvm/trunk/test/CodeGen/ARM/2010-05-20-NEONSpillCrash.ll Fri Aug 27 12:13:24 2010 @@ -5,32 +5,32 @@ %struct.__neon_int8x8x3_t = type { <8 x i8>, <8 x i8>, <8 x i8> } -declare %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8*) nounwind readonly +declare %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8*, i32) nounwind readonly -declare void @llvm.arm.neon.vst3.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>) nounwind +declare void @llvm.arm.neon.vst3.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, i32) nounwind define <8 x i8> @t3(i8* %A1, i8* %A2, i8* %A3, i8* %A4, i8* %A5, i8* %A6, i8* %A7, i8* %A8, i8* %B) nounwind { - %tmp1b = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8* %A2) ; <%struct.__neon_int8x8x3_t> [#uses=2] + %tmp1b = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8* %A2, i32 1) ; <%struct.__neon_int8x8x3_t> [#uses=2] %tmp2b = extractvalue %struct.__neon_int8x8x3_t %tmp1b, 0 ; <<8 x i8>> [#uses=1] %tmp4b = extractvalue %struct.__neon_int8x8x3_t %tmp1b, 1 ; <<8 x i8>> [#uses=1] - %tmp1d = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8* %A4) ; <%struct.__neon_int8x8x3_t> [#uses=2] + %tmp1d = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8* %A4, i32 1) ; <%struct.__neon_int8x8x3_t> [#uses=2] %tmp2d = extractvalue %struct.__neon_int8x8x3_t %tmp1d, 0 ; <<8 x i8>> [#uses=1] %tmp4d = extractvalue %struct.__neon_int8x8x3_t %tmp1d, 1 ; <<8 x i8>> [#uses=1] - %tmp1e = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8* %A5) ; <%struct.__neon_int8x8x3_t> [#uses=1] + %tmp1e = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8* %A5, i32 1) ; <%struct.__neon_int8x8x3_t> [#uses=1] %tmp2e = extractvalue %struct.__neon_int8x8x3_t %tmp1e, 0 ; <<8 x i8>> [#uses=1] - %tmp1f = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8* %A6) ; <%struct.__neon_int8x8x3_t> [#uses=1] + %tmp1f = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8* %A6, i32 1) ; <%struct.__neon_int8x8x3_t> [#uses=1] %tmp2f = extractvalue %struct.__neon_int8x8x3_t %tmp1f, 0 ; <<8 x i8>> [#uses=1] - %tmp1g = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8* %A7) ; <%struct.__neon_int8x8x3_t> [#uses=2] + %tmp1g = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8* %A7, i32 1) ; <%struct.__neon_int8x8x3_t> [#uses=2] %tmp2g = extractvalue %struct.__neon_int8x8x3_t %tmp1g, 0 ; <<8 x i8>> [#uses=1] %tmp4g = extractvalue %struct.__neon_int8x8x3_t %tmp1g, 1 ; <<8 x i8>> [#uses=1] - %tmp1h = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8* %A8) ; <%struct.__neon_int8x8x3_t> [#uses=2] + %tmp1h = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8* %A8, i32 1) ; <%struct.__neon_int8x8x3_t> [#uses=2] %tmp2h = extractvalue %struct.__neon_int8x8x3_t %tmp1h, 0 ; <<8 x i8>> [#uses=1] %tmp3h = extractvalue %struct.__neon_int8x8x3_t %tmp1h, 2 ; <<8 x i8>> [#uses=1] %tmp2bd = add <8 x i8> %tmp2b, %tmp2d ; <<8 x i8>> [#uses=1] %tmp4bd = add <8 x i8> %tmp4b, %tmp4d ; <<8 x i8>> [#uses=1] %tmp2abcd = mul <8 x i8> undef, %tmp2bd ; <<8 x i8>> [#uses=1] %tmp4abcd = mul <8 x i8> undef, %tmp4bd ; <<8 x i8>> [#uses=2] - call void @llvm.arm.neon.vst3.v8i8(i8* %A1, <8 x i8> %tmp4abcd, <8 x i8> zeroinitializer, <8 x i8> %tmp2abcd) + call void @llvm.arm.neon.vst3.v8i8(i8* %A1, <8 x i8> %tmp4abcd, <8 x i8> zeroinitializer, <8 x i8> %tmp2abcd, i32 1) %tmp2ef = sub <8 x i8> %tmp2e, %tmp2f ; <<8 x i8>> [#uses=1] %tmp2gh = sub <8 x i8> %tmp2g, %tmp2h ; <<8 x i8>> [#uses=1] %tmp3gh = sub <8 x i8> zeroinitializer, %tmp3h ; <<8 x i8>> [#uses=1] @@ -38,8 +38,8 @@ %tmp2efgh = mul <8 x i8> %tmp2ef, %tmp2gh ; <<8 x i8>> [#uses=1] %tmp3efgh = mul <8 x i8> undef, %tmp3gh ; <<8 x i8>> [#uses=1] %tmp4efgh = mul <8 x i8> %tmp4ef, undef ; <<8 x i8>> [#uses=2] - call void @llvm.arm.neon.vst3.v8i8(i8* %A2, <8 x i8> %tmp4efgh, <8 x i8> %tmp3efgh, <8 x i8> %tmp2efgh) + call void @llvm.arm.neon.vst3.v8i8(i8* %A2, <8 x i8> %tmp4efgh, <8 x i8> %tmp3efgh, <8 x i8> %tmp2efgh, i32 1) %tmp4 = sub <8 x i8> %tmp4efgh, %tmp4abcd ; <<8 x i8>> [#uses=1] - tail call void @llvm.arm.neon.vst3.v8i8(i8* %B, <8 x i8> zeroinitializer, <8 x i8> undef, <8 x i8> undef) + tail call void @llvm.arm.neon.vst3.v8i8(i8* %B, <8 x i8> zeroinitializer, <8 x i8> undef, <8 x i8> undef, i32 1) ret <8 x i8> %tmp4 } Modified: llvm/trunk/test/CodeGen/ARM/2010-05-21-BuildVector.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2010-05-21-BuildVector.ll?rev=112271&r1=112270&r2=112271&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/2010-05-21-BuildVector.ll (original) +++ llvm/trunk/test/CodeGen/ARM/2010-05-21-BuildVector.ll Fri Aug 27 12:13:24 2010 @@ -36,8 +36,8 @@ %tmp5 = insertelement <4 x float> %tmp7, float %18, i32 3 %19 = fmul <4 x float> %tmp5, %2 %20 = bitcast float* %fltp to i8* - tail call void @llvm.arm.neon.vst1.v4f32(i8* %20, <4 x float> %19) + tail call void @llvm.arm.neon.vst1.v4f32(i8* %20, <4 x float> %19, i32 1) ret void } -declare void @llvm.arm.neon.vst1.v4f32(i8*, <4 x float>) nounwind +declare void @llvm.arm.neon.vst1.v4f32(i8*, <4 x float>, i32) nounwind Modified: llvm/trunk/test/CodeGen/ARM/2010-06-11-vmovdrr-bitcast.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2010-06-11-vmovdrr-bitcast.ll?rev=112271&r1=112270&r2=112271&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/2010-06-11-vmovdrr-bitcast.ll (original) +++ llvm/trunk/test/CodeGen/ARM/2010-06-11-vmovdrr-bitcast.ll Fri Aug 27 12:13:24 2010 @@ -12,8 +12,8 @@ %tmp9 = trunc i128 %tmp8 to i64 ; [#uses=1] %tmp16.i = bitcast i64 %tmp6 to <8 x i8> ; <<8 x i8>> [#uses=1] %tmp20.i = bitcast i64 %tmp9 to <8 x i8> ; <<8 x i8>> [#uses=1] - tail call void @llvm.arm.neon.vst2.v8i8(i8* %b, <8 x i8> %tmp16.i, <8 x i8> %tmp20.i) nounwind + tail call void @llvm.arm.neon.vst2.v8i8(i8* %b, <8 x i8> %tmp16.i, <8 x i8> %tmp20.i, i32 1) nounwind ret void } -declare void @llvm.arm.neon.vst2.v8i8(i8*, <8 x i8>, <8 x i8>) nounwind +declare void @llvm.arm.neon.vst2.v8i8(i8*, <8 x i8>, <8 x i8>, i32) nounwind Modified: llvm/trunk/test/CodeGen/ARM/2010-06-29-PartialRedefFastAlloc.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2010-06-29-PartialRedefFastAlloc.ll?rev=112271&r1=112270&r2=112271&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/2010-06-29-PartialRedefFastAlloc.ll (original) +++ llvm/trunk/test/CodeGen/ARM/2010-06-29-PartialRedefFastAlloc.ll Fri Aug 27 12:13:24 2010 @@ -16,10 +16,10 @@ define i32 @test(i8* %arg) nounwind { entry: - %0 = call <2 x i64> @llvm.arm.neon.vld1.v2i64(i8* %arg) + %0 = call <2 x i64> @llvm.arm.neon.vld1.v2i64(i8* %arg, i32 1) %1 = shufflevector <2 x i64> undef, <2 x i64> %0, <2 x i32> store <2 x i64> %1, <2 x i64>* undef, align 16 ret i32 undef } -declare <2 x i64> @llvm.arm.neon.vld1.v2i64(i8*) nounwind readonly +declare <2 x i64> @llvm.arm.neon.vld1.v2i64(i8*, i32) nounwind readonly Modified: llvm/trunk/test/CodeGen/ARM/reg_sequence.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/reg_sequence.ll?rev=112271&r1=112270&r2=112271&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/reg_sequence.ll (original) +++ llvm/trunk/test/CodeGen/ARM/reg_sequence.ll Fri Aug 27 12:13:24 2010 @@ -23,7 +23,7 @@ %2 = getelementptr inbounds %struct.int32x4_t* %vT1ptr, i32 0, i32 0 ; <<4 x i32>*> [#uses=1] %3 = load <4 x i32>* %2, align 16 ; <<4 x i32>> [#uses=1] %4 = bitcast i16* %i_ptr to i8* ; [#uses=1] - %5 = tail call <8 x i16> @llvm.arm.neon.vld1.v8i16(i8* %4) ; <<8 x i16>> [#uses=1] + %5 = tail call <8 x i16> @llvm.arm.neon.vld1.v8i16(i8* %4, i32 1) ; <<8 x i16>> [#uses=1] %6 = bitcast <8 x i16> %5 to <2 x double> ; <<2 x double>> [#uses=2] %7 = extractelement <2 x double> %6, i32 0 ; [#uses=1] %8 = bitcast double %7 to <4 x i16> ; <<4 x i16>> [#uses=1] @@ -37,7 +37,7 @@ %16 = tail call <4 x i16> @llvm.arm.neon.vshiftn.v4i16(<4 x i32> %14, <4 x i32> ) ; <<4 x i16>> [#uses=1] %17 = shufflevector <4 x i16> %15, <4 x i16> %16, <8 x i32> ; <<8 x i16>> [#uses=1] %18 = bitcast i16* %o_ptr to i8* ; [#uses=1] - tail call void @llvm.arm.neon.vst1.v8i16(i8* %18, <8 x i16> %17) + tail call void @llvm.arm.neon.vst1.v8i16(i8* %18, <8 x i16> %17, i32 1) ret void } @@ -57,17 +57,17 @@ %2 = getelementptr inbounds %struct.int16x8_t* %vT1ptr, i32 0, i32 0 ; <<8 x i16>*> [#uses=1] %3 = load <8 x i16>* %2, align 16 ; <<8 x i16>> [#uses=1] %4 = bitcast i16* %i_ptr to i8* ; [#uses=1] - %5 = tail call <8 x i16> @llvm.arm.neon.vld1.v8i16(i8* %4) ; <<8 x i16>> [#uses=1] + %5 = tail call <8 x i16> @llvm.arm.neon.vld1.v8i16(i8* %4, i32 1) ; <<8 x i16>> [#uses=1] %6 = getelementptr inbounds i16* %i_ptr, i32 8 ; [#uses=1] %7 = bitcast i16* %6 to i8* ; [#uses=1] - %8 = tail call <8 x i16> @llvm.arm.neon.vld1.v8i16(i8* %7) ; <<8 x i16>> [#uses=1] + %8 = tail call <8 x i16> @llvm.arm.neon.vld1.v8i16(i8* %7, i32 1) ; <<8 x i16>> [#uses=1] %9 = mul <8 x i16> %1, %5 ; <<8 x i16>> [#uses=1] %10 = mul <8 x i16> %3, %8 ; <<8 x i16>> [#uses=1] %11 = bitcast i16* %o_ptr to i8* ; [#uses=1] - tail call void @llvm.arm.neon.vst1.v8i16(i8* %11, <8 x i16> %9) + tail call void @llvm.arm.neon.vst1.v8i16(i8* %11, <8 x i16> %9, i32 1) %12 = getelementptr inbounds i16* %o_ptr, i32 8 ; [#uses=1] %13 = bitcast i16* %12 to i8* ; [#uses=1] - tail call void @llvm.arm.neon.vst1.v8i16(i8* %13, <8 x i16> %10) + tail call void @llvm.arm.neon.vst1.v8i16(i8* %13, <8 x i16> %10, i32 1) ret void } @@ -77,14 +77,14 @@ ; CHECK: vmul.i8 ; CHECK-NOT: vmov ; CHECK: vst3.8 - %tmp1 = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8* %A) ; <%struct.__neon_int8x8x3_t> [#uses=2] + %tmp1 = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8* %A, i32 1) ; <%struct.__neon_int8x8x3_t> [#uses=2] %tmp2 = extractvalue %struct.__neon_int8x8x3_t %tmp1, 0 ; <<8 x i8>> [#uses=1] %tmp3 = extractvalue %struct.__neon_int8x8x3_t %tmp1, 2 ; <<8 x i8>> [#uses=1] %tmp4 = extractvalue %struct.__neon_int8x8x3_t %tmp1, 1 ; <<8 x i8>> [#uses=1] %tmp5 = sub <8 x i8> %tmp3, %tmp4 %tmp6 = add <8 x i8> %tmp2, %tmp3 ; <<8 x i8>> [#uses=1] %tmp7 = mul <8 x i8> %tmp4, %tmp2 - tail call void @llvm.arm.neon.vst3.v8i8(i8* %B, <8 x i8> %tmp5, <8 x i8> %tmp6, <8 x i8> %tmp7) + tail call void @llvm.arm.neon.vst3.v8i8(i8* %B, <8 x i8> %tmp5, <8 x i8> %tmp6, <8 x i8> %tmp7, i32 1) ret <8 x i8> %tmp4 } @@ -97,10 +97,10 @@ ; CHECK-NOT: vmov ; CHECK: bne %tmp1 = bitcast i32* %in to i8* ; [#uses=1] - %tmp2 = tail call %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2.v4i32(i8* %tmp1) ; <%struct.__neon_int32x4x2_t> [#uses=2] + %tmp2 = tail call %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2.v4i32(i8* %tmp1, i32 1) ; <%struct.__neon_int32x4x2_t> [#uses=2] %tmp3 = getelementptr inbounds i32* %in, i32 8 ; [#uses=1] %tmp4 = bitcast i32* %tmp3 to i8* ; [#uses=1] - %tmp5 = tail call %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2.v4i32(i8* %tmp4) ; <%struct.__neon_int32x4x2_t> [#uses=2] + %tmp5 = tail call %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2.v4i32(i8* %tmp4, i32 1) ; <%struct.__neon_int32x4x2_t> [#uses=2] %tmp8 = bitcast i32* %out to i8* ; [#uses=1] br i1 undef, label %return1, label %return2 @@ -116,7 +116,7 @@ %tmp39 = extractvalue %struct.__neon_int32x4x2_t %tmp5, 1 ; <<4 x i32>> [#uses=1] %tmp6 = add <4 x i32> %tmp52, %tmp ; <<4 x i32>> [#uses=1] %tmp7 = add <4 x i32> %tmp57, %tmp39 ; <<4 x i32>> [#uses=1] - tail call void @llvm.arm.neon.vst2.v4i32(i8* %tmp8, <4 x i32> %tmp6, <4 x i32> %tmp7) + tail call void @llvm.arm.neon.vst2.v4i32(i8* %tmp8, <4 x i32> %tmp6, <4 x i32> %tmp7, i32 1) ret void return2: @@ -128,7 +128,7 @@ %tmp100 = extractvalue %struct.__neon_int32x4x2_t %tmp2, 0 ; <<4 x i32>> [#uses=1] %tmp101 = extractvalue %struct.__neon_int32x4x2_t %tmp5, 1 ; <<4 x i32>> [#uses=1] %tmp102 = add <4 x i32> %tmp100, %tmp101 ; <<4 x i32>> [#uses=1] - tail call void @llvm.arm.neon.vst2.v4i32(i8* %tmp8, <4 x i32> %tmp102, <4 x i32> %tmp101) + tail call void @llvm.arm.neon.vst2.v4i32(i8* %tmp8, <4 x i32> %tmp102, <4 x i32> %tmp101, i32 1) call void @llvm.trap() unreachable } @@ -143,7 +143,7 @@ ; CHECK: vadd.i16 %tmp0 = bitcast i16* %A to i8* ; [#uses=1] %tmp1 = load <8 x i16>* %B ; <<8 x i16>> [#uses=2] - %tmp2 = call %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1) ; <%struct.__neon_int16x8x2_t> [#uses=2] + %tmp2 = call %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1, i32 1) ; <%struct.__neon_int16x8x2_t> [#uses=2] %tmp3 = extractvalue %struct.__neon_int16x8x2_t %tmp2, 0 ; <<8 x i16>> [#uses=1] %tmp4 = extractvalue %struct.__neon_int16x8x2_t %tmp2, 1 ; <<8 x i16>> [#uses=1] %tmp5 = add <8 x i16> %tmp3, %tmp4 ; <<8 x i16>> [#uses=1] @@ -156,7 +156,7 @@ ; CHECK: vmov d1, d0 ; CHECK-NEXT: vld2.8 {d0[1], d1[1]} %tmp1 = load <8 x i8>* %B ; <<8 x i8>> [#uses=2] - %tmp2 = call %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1) ; <%struct.__neon_int8x8x2_t> [#uses=2] + %tmp2 = call %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 1) ; <%struct.__neon_int8x8x2_t> [#uses=2] %tmp3 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 0 ; <<8 x i8>> [#uses=1] %tmp4 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 1 ; <<8 x i8>> [#uses=1] %tmp5 = add <8 x i8> %tmp3, %tmp4 ; <<8 x i8>> [#uses=1] @@ -174,14 +174,14 @@ ; CHECK: vuzp.32 q0, q1 ; CHECK: vst1.32 %0 = bitcast i32* %iptr to i8* ; [#uses=2] - %1 = tail call %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2.v4i32(i8* %0) ; <%struct.__neon_int32x4x2_t> [#uses=2] + %1 = tail call %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2.v4i32(i8* %0, i32 1) ; <%struct.__neon_int32x4x2_t> [#uses=2] %tmp57 = extractvalue %struct.__neon_int32x4x2_t %1, 0 ; <<4 x i32>> [#uses=1] %tmp60 = extractvalue %struct.__neon_int32x4x2_t %1, 1 ; <<4 x i32>> [#uses=1] %2 = bitcast i32* %optr to i8* ; [#uses=2] - tail call void @llvm.arm.neon.vst2.v4i32(i8* %2, <4 x i32> %tmp57, <4 x i32> %tmp60) - %3 = tail call <4 x i32> @llvm.arm.neon.vld1.v4i32(i8* %0) ; <<4 x i32>> [#uses=1] + tail call void @llvm.arm.neon.vst2.v4i32(i8* %2, <4 x i32> %tmp57, <4 x i32> %tmp60, i32 1) + %3 = tail call <4 x i32> @llvm.arm.neon.vld1.v4i32(i8* %0, i32 1) ; <<4 x i32>> [#uses=1] %4 = shufflevector <4 x i32> %3, <4 x i32> undef, <4 x i32> ; <<4 x i32>> [#uses=1] - tail call void @llvm.arm.neon.vst1.v4i32(i8* %2, <4 x i32> %4) + tail call void @llvm.arm.neon.vst1.v4i32(i8* %2, <4 x i32> %4, i32 1) ret void } @@ -304,42 +304,43 @@ ; This test crashes the coalescer because live variables were not updated properly. define <8 x i8> @t11(i8* %A1, i8* %A2, i8* %A3, i8* %A4, i8* %A5, i8* %A6, i8* %A7, i8* %A8, i8* %B) nounwind { - %tmp1d = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8* %A4) ; <%struct.__neon_int8x8x3_t> [#uses=1] + %tmp1d = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8* %A4, i32 1) ; <%struct.__neon_int8x8x3_t> [#uses=1] %tmp2d = extractvalue %struct.__neon_int8x8x3_t %tmp1d, 0 ; <<8 x i8>> [#uses=1] - %tmp1f = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8* %A6) ; <%struct.__neon_int8x8x3_t> [#uses=1] + %tmp1f = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8* %A6, i32 1) ; <%struct.__neon_int8x8x3_t> [#uses=1] %tmp2f = extractvalue %struct.__neon_int8x8x3_t %tmp1f, 0 ; <<8 x i8>> [#uses=1] %tmp2bd = add <8 x i8> zeroinitializer, %tmp2d ; <<8 x i8>> [#uses=1] %tmp2abcd = mul <8 x i8> zeroinitializer, %tmp2bd ; <<8 x i8>> [#uses=1] %tmp2ef = sub <8 x i8> zeroinitializer, %tmp2f ; <<8 x i8>> [#uses=1] %tmp2efgh = mul <8 x i8> %tmp2ef, undef ; <<8 x i8>> [#uses=2] - call void @llvm.arm.neon.vst3.v8i8(i8* %A2, <8 x i8> undef, <8 x i8> undef, <8 x i8> %tmp2efgh) + call void @llvm.arm.neon.vst3.v8i8(i8* %A2, <8 x i8> undef, <8 x i8> undef, <8 x i8> %tmp2efgh, i32 1) %tmp2 = sub <8 x i8> %tmp2efgh, %tmp2abcd ; <<8 x i8>> [#uses=1] %tmp7 = mul <8 x i8> undef, %tmp2 ; <<8 x i8>> [#uses=1] - tail call void @llvm.arm.neon.vst3.v8i8(i8* %B, <8 x i8> undef, <8 x i8> undef, <8 x i8> %tmp7) + tail call void @llvm.arm.neon.vst3.v8i8(i8* %B, <8 x i8> undef, <8 x i8> undef, <8 x i8> %tmp7, i32 1) ret <8 x i8> undef } -declare <4 x i32> @llvm.arm.neon.vld1.v4i32(i8*) nounwind readonly +declare <4 x i32> @llvm.arm.neon.vld1.v4i32(i8*, i32) nounwind readonly -declare <8 x i16> @llvm.arm.neon.vld1.v8i16(i8*) nounwind readonly +declare <8 x i16> @llvm.arm.neon.vld1.v8i16(i8*, i32) nounwind readonly declare <4 x i16> @llvm.arm.neon.vshiftn.v4i16(<4 x i32>, <4 x i32>) nounwind readnone -declare void @llvm.arm.neon.vst1.v4i32(i8*, <4 x i32>) nounwind +declare void @llvm.arm.neon.vst1.v4i32(i8*, <4 x i32>, i32) nounwind -declare void @llvm.arm.neon.vst1.v8i16(i8*, <8 x i16>) nounwind +declare void @llvm.arm.neon.vst1.v8i16(i8*, <8 x i16>, i32) nounwind -declare void @llvm.arm.neon.vst3.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>) nounwind +declare void @llvm.arm.neon.vst3.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, i32) +nounwind -declare %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8*) nounwind readonly +declare %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8*, i32) nounwind readonly -declare %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2.v4i32(i8*) nounwind readonly +declare %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2.v4i32(i8*, i32) nounwind readonly -declare %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8*, <8 x i8>, <8 x i8>, i32) nounwind readonly +declare %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8*, <8 x i8>, <8 x i8>, i32, i32) nounwind readonly -declare %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2lane.v8i16(i8*, <8 x i16>, <8 x i16>, i32) nounwind readonly +declare %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2lane.v8i16(i8*, <8 x i16>, <8 x i16>, i32, i32) nounwind readonly -declare void @llvm.arm.neon.vst2.v4i32(i8*, <4 x i32>, <4 x i32>) nounwind +declare void @llvm.arm.neon.vst2.v4i32(i8*, <4 x i32>, <4 x i32>, i32) nounwind declare <4 x float> @llvm.arm.neon.vrsqrte.v4f32(<4 x float>) nounwind readnone Modified: llvm/trunk/test/CodeGen/ARM/spill-q.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/spill-q.ll?rev=112271&r1=112270&r2=112271&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/spill-q.ll (original) +++ llvm/trunk/test/CodeGen/ARM/spill-q.ll Fri Aug 27 12:13:24 2010 @@ -7,7 +7,7 @@ %quux = type { i32 (...)**, %baz*, i32 } %quuz = type { %quux, i32, %bar, [128 x i8], [16 x %foo], %foo, %foo, %foo } -declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*) nounwind readonly +declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*, i32) nounwind readonly define void @aaa(%quuz* %this, i8* %block) { ; CHECK: aaa: @@ -15,11 +15,11 @@ ; CHECK: vst1.64 {{.*}}sp, :128 ; CHECK: vld1.64 {{.*}}sp, :128 entry: - %0 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef) nounwind ; <<4 x float>> [#uses=1] + %0 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind ; <<4 x float>> [#uses=1] store float 6.300000e+01, float* undef, align 4 - %1 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef) nounwind ; <<4 x float>> [#uses=1] + %1 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind ; <<4 x float>> [#uses=1] store float 0.000000e+00, float* undef, align 4 - %2 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef) nounwind ; <<4 x float>> [#uses=1] + %2 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind ; <<4 x float>> [#uses=1] %val173 = load <4 x float>* undef ; <<4 x float>> [#uses=1] br label %bb4 Modified: llvm/trunk/test/CodeGen/ARM/vld1.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vld1.ll?rev=112271&r1=112270&r2=112271&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/vld1.ll (original) +++ llvm/trunk/test/CodeGen/ARM/vld1.ll Fri Aug 27 12:13:24 2010 @@ -3,7 +3,7 @@ define <8 x i8> @vld1i8(i8* %A) nounwind { ;CHECK: vld1i8: ;CHECK: vld1.8 - %tmp1 = call <8 x i8> @llvm.arm.neon.vld1.v8i8(i8* %A) + %tmp1 = call <8 x i8> @llvm.arm.neon.vld1.v8i8(i8* %A, i32 1) ret <8 x i8> %tmp1 } @@ -11,7 +11,7 @@ ;CHECK: vld1i16: ;CHECK: vld1.16 %tmp0 = bitcast i16* %A to i8* - %tmp1 = call <4 x i16> @llvm.arm.neon.vld1.v4i16(i8* %tmp0) + %tmp1 = call <4 x i16> @llvm.arm.neon.vld1.v4i16(i8* %tmp0, i32 1) ret <4 x i16> %tmp1 } @@ -19,7 +19,7 @@ ;CHECK: vld1i32: ;CHECK: vld1.32 %tmp0 = bitcast i32* %A to i8* - %tmp1 = call <2 x i32> @llvm.arm.neon.vld1.v2i32(i8* %tmp0) + %tmp1 = call <2 x i32> @llvm.arm.neon.vld1.v2i32(i8* %tmp0, i32 1) ret <2 x i32> %tmp1 } @@ -27,7 +27,7 @@ ;CHECK: vld1f: ;CHECK: vld1.32 %tmp0 = bitcast float* %A to i8* - %tmp1 = call <2 x float> @llvm.arm.neon.vld1.v2f32(i8* %tmp0) + %tmp1 = call <2 x float> @llvm.arm.neon.vld1.v2f32(i8* %tmp0, i32 1) ret <2 x float> %tmp1 } @@ -35,14 +35,14 @@ ;CHECK: vld1i64: ;CHECK: vld1.64 %tmp0 = bitcast i64* %A to i8* - %tmp1 = call <1 x i64> @llvm.arm.neon.vld1.v1i64(i8* %tmp0) + %tmp1 = call <1 x i64> @llvm.arm.neon.vld1.v1i64(i8* %tmp0, i32 1) ret <1 x i64> %tmp1 } define <16 x i8> @vld1Qi8(i8* %A) nounwind { ;CHECK: vld1Qi8: ;CHECK: vld1.8 - %tmp1 = call <16 x i8> @llvm.arm.neon.vld1.v16i8(i8* %A) + %tmp1 = call <16 x i8> @llvm.arm.neon.vld1.v16i8(i8* %A, i32 1) ret <16 x i8> %tmp1 } @@ -50,7 +50,7 @@ ;CHECK: vld1Qi16: ;CHECK: vld1.16 %tmp0 = bitcast i16* %A to i8* - %tmp1 = call <8 x i16> @llvm.arm.neon.vld1.v8i16(i8* %tmp0) + %tmp1 = call <8 x i16> @llvm.arm.neon.vld1.v8i16(i8* %tmp0, i32 1) ret <8 x i16> %tmp1 } @@ -58,7 +58,7 @@ ;CHECK: vld1Qi32: ;CHECK: vld1.32 %tmp0 = bitcast i32* %A to i8* - %tmp1 = call <4 x i32> @llvm.arm.neon.vld1.v4i32(i8* %tmp0) + %tmp1 = call <4 x i32> @llvm.arm.neon.vld1.v4i32(i8* %tmp0, i32 1) ret <4 x i32> %tmp1 } @@ -66,7 +66,7 @@ ;CHECK: vld1Qf: ;CHECK: vld1.32 %tmp0 = bitcast float* %A to i8* - %tmp1 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* %tmp0) + %tmp1 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* %tmp0, i32 1) ret <4 x float> %tmp1 } @@ -74,21 +74,21 @@ ;CHECK: vld1Qi64: ;CHECK: vld1.64 %tmp0 = bitcast i64* %A to i8* - %tmp1 = call <2 x i64> @llvm.arm.neon.vld1.v2i64(i8* %tmp0) + %tmp1 = call <2 x i64> @llvm.arm.neon.vld1.v2i64(i8* %tmp0, i32 1) ret <2 x i64> %tmp1 } -declare <8 x i8> @llvm.arm.neon.vld1.v8i8(i8*) nounwind readonly -declare <4 x i16> @llvm.arm.neon.vld1.v4i16(i8*) nounwind readonly -declare <2 x i32> @llvm.arm.neon.vld1.v2i32(i8*) nounwind readonly -declare <2 x float> @llvm.arm.neon.vld1.v2f32(i8*) nounwind readonly -declare <1 x i64> @llvm.arm.neon.vld1.v1i64(i8*) nounwind readonly - -declare <16 x i8> @llvm.arm.neon.vld1.v16i8(i8*) nounwind readonly -declare <8 x i16> @llvm.arm.neon.vld1.v8i16(i8*) nounwind readonly -declare <4 x i32> @llvm.arm.neon.vld1.v4i32(i8*) nounwind readonly -declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*) nounwind readonly -declare <2 x i64> @llvm.arm.neon.vld1.v2i64(i8*) nounwind readonly +declare <8 x i8> @llvm.arm.neon.vld1.v8i8(i8*, i32) nounwind readonly +declare <4 x i16> @llvm.arm.neon.vld1.v4i16(i8*, i32) nounwind readonly +declare <2 x i32> @llvm.arm.neon.vld1.v2i32(i8*, i32) nounwind readonly +declare <2 x float> @llvm.arm.neon.vld1.v2f32(i8*, i32) nounwind readonly +declare <1 x i64> @llvm.arm.neon.vld1.v1i64(i8*, i32) nounwind readonly + +declare <16 x i8> @llvm.arm.neon.vld1.v16i8(i8*, i32) nounwind readonly +declare <8 x i16> @llvm.arm.neon.vld1.v8i16(i8*, i32) nounwind readonly +declare <4 x i32> @llvm.arm.neon.vld1.v4i32(i8*, i32) nounwind readonly +declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*, i32) nounwind readonly +declare <2 x i64> @llvm.arm.neon.vld1.v2i64(i8*, i32) nounwind readonly ; Radar 8355607 ; Do not crash if the vld1 result is not used. @@ -96,10 +96,9 @@ entry: ;CHECK: unused_vld1_result ;CHECK: vld1.32 - %0 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef) + %0 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) call void @llvm.trap() unreachable } declare void @llvm.trap() nounwind - Modified: llvm/trunk/test/CodeGen/ARM/vld2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vld2.ll?rev=112271&r1=112270&r2=112271&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/vld2.ll (original) +++ llvm/trunk/test/CodeGen/ARM/vld2.ll Fri Aug 27 12:13:24 2010 @@ -14,7 +14,7 @@ define <8 x i8> @vld2i8(i8* %A) nounwind { ;CHECK: vld2i8: ;CHECK: vld2.8 - %tmp1 = call %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2.v8i8(i8* %A) + %tmp1 = call %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2.v8i8(i8* %A, i32 1) %tmp2 = extractvalue %struct.__neon_int8x8x2_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int8x8x2_t %tmp1, 1 %tmp4 = add <8 x i8> %tmp2, %tmp3 @@ -25,7 +25,7 @@ ;CHECK: vld2i16: ;CHECK: vld2.16 %tmp0 = bitcast i16* %A to i8* - %tmp1 = call %struct.__neon_int16x4x2_t @llvm.arm.neon.vld2.v4i16(i8* %tmp0) + %tmp1 = call %struct.__neon_int16x4x2_t @llvm.arm.neon.vld2.v4i16(i8* %tmp0, i32 1) %tmp2 = extractvalue %struct.__neon_int16x4x2_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int16x4x2_t %tmp1, 1 %tmp4 = add <4 x i16> %tmp2, %tmp3 @@ -36,7 +36,7 @@ ;CHECK: vld2i32: ;CHECK: vld2.32 %tmp0 = bitcast i32* %A to i8* - %tmp1 = call %struct.__neon_int32x2x2_t @llvm.arm.neon.vld2.v2i32(i8* %tmp0) + %tmp1 = call %struct.__neon_int32x2x2_t @llvm.arm.neon.vld2.v2i32(i8* %tmp0, i32 1) %tmp2 = extractvalue %struct.__neon_int32x2x2_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int32x2x2_t %tmp1, 1 %tmp4 = add <2 x i32> %tmp2, %tmp3 @@ -47,7 +47,7 @@ ;CHECK: vld2f: ;CHECK: vld2.32 %tmp0 = bitcast float* %A to i8* - %tmp1 = call %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2.v2f32(i8* %tmp0) + %tmp1 = call %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2.v2f32(i8* %tmp0, i32 1) %tmp2 = extractvalue %struct.__neon_float32x2x2_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_float32x2x2_t %tmp1, 1 %tmp4 = fadd <2 x float> %tmp2, %tmp3 @@ -58,7 +58,7 @@ ;CHECK: vld2i64: ;CHECK: vld1.64 %tmp0 = bitcast i64* %A to i8* - %tmp1 = call %struct.__neon_int64x1x2_t @llvm.arm.neon.vld2.v1i64(i8* %tmp0) + %tmp1 = call %struct.__neon_int64x1x2_t @llvm.arm.neon.vld2.v1i64(i8* %tmp0, i32 1) %tmp2 = extractvalue %struct.__neon_int64x1x2_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int64x1x2_t %tmp1, 1 %tmp4 = add <1 x i64> %tmp2, %tmp3 @@ -68,7 +68,7 @@ define <16 x i8> @vld2Qi8(i8* %A) nounwind { ;CHECK: vld2Qi8: ;CHECK: vld2.8 - %tmp1 = call %struct.__neon_int8x16x2_t @llvm.arm.neon.vld2.v16i8(i8* %A) + %tmp1 = call %struct.__neon_int8x16x2_t @llvm.arm.neon.vld2.v16i8(i8* %A, i32 1) %tmp2 = extractvalue %struct.__neon_int8x16x2_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int8x16x2_t %tmp1, 1 %tmp4 = add <16 x i8> %tmp2, %tmp3 @@ -79,7 +79,7 @@ ;CHECK: vld2Qi16: ;CHECK: vld2.16 %tmp0 = bitcast i16* %A to i8* - %tmp1 = call %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2.v8i16(i8* %tmp0) + %tmp1 = call %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2.v8i16(i8* %tmp0, i32 1) %tmp2 = extractvalue %struct.__neon_int16x8x2_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int16x8x2_t %tmp1, 1 %tmp4 = add <8 x i16> %tmp2, %tmp3 @@ -90,7 +90,7 @@ ;CHECK: vld2Qi32: ;CHECK: vld2.32 %tmp0 = bitcast i32* %A to i8* - %tmp1 = call %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2.v4i32(i8* %tmp0) + %tmp1 = call %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2.v4i32(i8* %tmp0, i32 1) %tmp2 = extractvalue %struct.__neon_int32x4x2_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int32x4x2_t %tmp1, 1 %tmp4 = add <4 x i32> %tmp2, %tmp3 @@ -101,20 +101,20 @@ ;CHECK: vld2Qf: ;CHECK: vld2.32 %tmp0 = bitcast float* %A to i8* - %tmp1 = call %struct.__neon_float32x4x2_t @llvm.arm.neon.vld2.v4f32(i8* %tmp0) + %tmp1 = call %struct.__neon_float32x4x2_t @llvm.arm.neon.vld2.v4f32(i8* %tmp0, i32 1) %tmp2 = extractvalue %struct.__neon_float32x4x2_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_float32x4x2_t %tmp1, 1 %tmp4 = fadd <4 x float> %tmp2, %tmp3 ret <4 x float> %tmp4 } -declare %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2.v8i8(i8*) nounwind readonly -declare %struct.__neon_int16x4x2_t @llvm.arm.neon.vld2.v4i16(i8*) nounwind readonly -declare %struct.__neon_int32x2x2_t @llvm.arm.neon.vld2.v2i32(i8*) nounwind readonly -declare %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2.v2f32(i8*) nounwind readonly -declare %struct.__neon_int64x1x2_t @llvm.arm.neon.vld2.v1i64(i8*) nounwind readonly - -declare %struct.__neon_int8x16x2_t @llvm.arm.neon.vld2.v16i8(i8*) nounwind readonly -declare %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2.v8i16(i8*) nounwind readonly -declare %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2.v4i32(i8*) nounwind readonly -declare %struct.__neon_float32x4x2_t @llvm.arm.neon.vld2.v4f32(i8*) nounwind readonly +declare %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2.v8i8(i8*, i32) nounwind readonly +declare %struct.__neon_int16x4x2_t @llvm.arm.neon.vld2.v4i16(i8*, i32) nounwind readonly +declare %struct.__neon_int32x2x2_t @llvm.arm.neon.vld2.v2i32(i8*, i32) nounwind readonly +declare %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2.v2f32(i8*, i32) nounwind readonly +declare %struct.__neon_int64x1x2_t @llvm.arm.neon.vld2.v1i64(i8*, i32) nounwind readonly + +declare %struct.__neon_int8x16x2_t @llvm.arm.neon.vld2.v16i8(i8*, i32) nounwind readonly +declare %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2.v8i16(i8*, i32) nounwind readonly +declare %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2.v4i32(i8*, i32) nounwind readonly +declare %struct.__neon_float32x4x2_t @llvm.arm.neon.vld2.v4f32(i8*, i32) nounwind readonly Modified: llvm/trunk/test/CodeGen/ARM/vld3.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vld3.ll?rev=112271&r1=112270&r2=112271&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/vld3.ll (original) +++ llvm/trunk/test/CodeGen/ARM/vld3.ll Fri Aug 27 12:13:24 2010 @@ -14,7 +14,7 @@ define <8 x i8> @vld3i8(i8* %A) nounwind { ;CHECK: vld3i8: ;CHECK: vld3.8 - %tmp1 = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8* %A) + %tmp1 = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8* %A, i32 1) %tmp2 = extractvalue %struct.__neon_int8x8x3_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int8x8x3_t %tmp1, 2 %tmp4 = add <8 x i8> %tmp2, %tmp3 @@ -25,7 +25,7 @@ ;CHECK: vld3i16: ;CHECK: vld3.16 %tmp0 = bitcast i16* %A to i8* - %tmp1 = call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3.v4i16(i8* %tmp0) + %tmp1 = call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3.v4i16(i8* %tmp0, i32 1) %tmp2 = extractvalue %struct.__neon_int16x4x3_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int16x4x3_t %tmp1, 2 %tmp4 = add <4 x i16> %tmp2, %tmp3 @@ -36,7 +36,7 @@ ;CHECK: vld3i32: ;CHECK: vld3.32 %tmp0 = bitcast i32* %A to i8* - %tmp1 = call %struct.__neon_int32x2x3_t @llvm.arm.neon.vld3.v2i32(i8* %tmp0) + %tmp1 = call %struct.__neon_int32x2x3_t @llvm.arm.neon.vld3.v2i32(i8* %tmp0, i32 1) %tmp2 = extractvalue %struct.__neon_int32x2x3_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int32x2x3_t %tmp1, 2 %tmp4 = add <2 x i32> %tmp2, %tmp3 @@ -47,7 +47,7 @@ ;CHECK: vld3f: ;CHECK: vld3.32 %tmp0 = bitcast float* %A to i8* - %tmp1 = call %struct.__neon_float32x2x3_t @llvm.arm.neon.vld3.v2f32(i8* %tmp0) + %tmp1 = call %struct.__neon_float32x2x3_t @llvm.arm.neon.vld3.v2f32(i8* %tmp0, i32 1) %tmp2 = extractvalue %struct.__neon_float32x2x3_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_float32x2x3_t %tmp1, 2 %tmp4 = fadd <2 x float> %tmp2, %tmp3 @@ -58,7 +58,7 @@ ;CHECK: vld3i64: ;CHECK: vld1.64 %tmp0 = bitcast i64* %A to i8* - %tmp1 = call %struct.__neon_int64x1x3_t @llvm.arm.neon.vld3.v1i64(i8* %tmp0) + %tmp1 = call %struct.__neon_int64x1x3_t @llvm.arm.neon.vld3.v1i64(i8* %tmp0, i32 1) %tmp2 = extractvalue %struct.__neon_int64x1x3_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int64x1x3_t %tmp1, 2 %tmp4 = add <1 x i64> %tmp2, %tmp3 @@ -69,7 +69,7 @@ ;CHECK: vld3Qi8: ;CHECK: vld3.8 ;CHECK: vld3.8 - %tmp1 = call %struct.__neon_int8x16x3_t @llvm.arm.neon.vld3.v16i8(i8* %A) + %tmp1 = call %struct.__neon_int8x16x3_t @llvm.arm.neon.vld3.v16i8(i8* %A, i32 1) %tmp2 = extractvalue %struct.__neon_int8x16x3_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int8x16x3_t %tmp1, 2 %tmp4 = add <16 x i8> %tmp2, %tmp3 @@ -81,7 +81,7 @@ ;CHECK: vld3.16 ;CHECK: vld3.16 %tmp0 = bitcast i16* %A to i8* - %tmp1 = call %struct.__neon_int16x8x3_t @llvm.arm.neon.vld3.v8i16(i8* %tmp0) + %tmp1 = call %struct.__neon_int16x8x3_t @llvm.arm.neon.vld3.v8i16(i8* %tmp0, i32 1) %tmp2 = extractvalue %struct.__neon_int16x8x3_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int16x8x3_t %tmp1, 2 %tmp4 = add <8 x i16> %tmp2, %tmp3 @@ -93,7 +93,7 @@ ;CHECK: vld3.32 ;CHECK: vld3.32 %tmp0 = bitcast i32* %A to i8* - %tmp1 = call %struct.__neon_int32x4x3_t @llvm.arm.neon.vld3.v4i32(i8* %tmp0) + %tmp1 = call %struct.__neon_int32x4x3_t @llvm.arm.neon.vld3.v4i32(i8* %tmp0, i32 1) %tmp2 = extractvalue %struct.__neon_int32x4x3_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int32x4x3_t %tmp1, 2 %tmp4 = add <4 x i32> %tmp2, %tmp3 @@ -105,20 +105,20 @@ ;CHECK: vld3.32 ;CHECK: vld3.32 %tmp0 = bitcast float* %A to i8* - %tmp1 = call %struct.__neon_float32x4x3_t @llvm.arm.neon.vld3.v4f32(i8* %tmp0) + %tmp1 = call %struct.__neon_float32x4x3_t @llvm.arm.neon.vld3.v4f32(i8* %tmp0, i32 1) %tmp2 = extractvalue %struct.__neon_float32x4x3_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_float32x4x3_t %tmp1, 2 %tmp4 = fadd <4 x float> %tmp2, %tmp3 ret <4 x float> %tmp4 } -declare %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8*) nounwind readonly -declare %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3.v4i16(i8*) nounwind readonly -declare %struct.__neon_int32x2x3_t @llvm.arm.neon.vld3.v2i32(i8*) nounwind readonly -declare %struct.__neon_float32x2x3_t @llvm.arm.neon.vld3.v2f32(i8*) nounwind readonly -declare %struct.__neon_int64x1x3_t @llvm.arm.neon.vld3.v1i64(i8*) nounwind readonly - -declare %struct.__neon_int8x16x3_t @llvm.arm.neon.vld3.v16i8(i8*) nounwind readonly -declare %struct.__neon_int16x8x3_t @llvm.arm.neon.vld3.v8i16(i8*) nounwind readonly -declare %struct.__neon_int32x4x3_t @llvm.arm.neon.vld3.v4i32(i8*) nounwind readonly -declare %struct.__neon_float32x4x3_t @llvm.arm.neon.vld3.v4f32(i8*) nounwind readonly +declare %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8*, i32) nounwind readonly +declare %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3.v4i16(i8*, i32) nounwind readonly +declare %struct.__neon_int32x2x3_t @llvm.arm.neon.vld3.v2i32(i8*, i32) nounwind readonly +declare %struct.__neon_float32x2x3_t @llvm.arm.neon.vld3.v2f32(i8*, i32) nounwind readonly +declare %struct.__neon_int64x1x3_t @llvm.arm.neon.vld3.v1i64(i8*, i32) nounwind readonly + +declare %struct.__neon_int8x16x3_t @llvm.arm.neon.vld3.v16i8(i8*, i32) nounwind readonly +declare %struct.__neon_int16x8x3_t @llvm.arm.neon.vld3.v8i16(i8*, i32) nounwind readonly +declare %struct.__neon_int32x4x3_t @llvm.arm.neon.vld3.v4i32(i8*, i32) nounwind readonly +declare %struct.__neon_float32x4x3_t @llvm.arm.neon.vld3.v4f32(i8*, i32) nounwind readonly Modified: llvm/trunk/test/CodeGen/ARM/vld4.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vld4.ll?rev=112271&r1=112270&r2=112271&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/vld4.ll (original) +++ llvm/trunk/test/CodeGen/ARM/vld4.ll Fri Aug 27 12:13:24 2010 @@ -14,7 +14,7 @@ define <8 x i8> @vld4i8(i8* %A) nounwind { ;CHECK: vld4i8: ;CHECK: vld4.8 - %tmp1 = call %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4.v8i8(i8* %A) + %tmp1 = call %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4.v8i8(i8* %A, i32 1) %tmp2 = extractvalue %struct.__neon_int8x8x4_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int8x8x4_t %tmp1, 2 %tmp4 = add <8 x i8> %tmp2, %tmp3 @@ -25,7 +25,7 @@ ;CHECK: vld4i16: ;CHECK: vld4.16 %tmp0 = bitcast i16* %A to i8* - %tmp1 = call %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4.v4i16(i8* %tmp0) + %tmp1 = call %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4.v4i16(i8* %tmp0, i32 1) %tmp2 = extractvalue %struct.__neon_int16x4x4_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int16x4x4_t %tmp1, 2 %tmp4 = add <4 x i16> %tmp2, %tmp3 @@ -36,7 +36,7 @@ ;CHECK: vld4i32: ;CHECK: vld4.32 %tmp0 = bitcast i32* %A to i8* - %tmp1 = call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4.v2i32(i8* %tmp0) + %tmp1 = call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4.v2i32(i8* %tmp0, i32 1) %tmp2 = extractvalue %struct.__neon_int32x2x4_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int32x2x4_t %tmp1, 2 %tmp4 = add <2 x i32> %tmp2, %tmp3 @@ -47,7 +47,7 @@ ;CHECK: vld4f: ;CHECK: vld4.32 %tmp0 = bitcast float* %A to i8* - %tmp1 = call %struct.__neon_float32x2x4_t @llvm.arm.neon.vld4.v2f32(i8* %tmp0) + %tmp1 = call %struct.__neon_float32x2x4_t @llvm.arm.neon.vld4.v2f32(i8* %tmp0, i32 1) %tmp2 = extractvalue %struct.__neon_float32x2x4_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_float32x2x4_t %tmp1, 2 %tmp4 = fadd <2 x float> %tmp2, %tmp3 @@ -58,7 +58,7 @@ ;CHECK: vld4i64: ;CHECK: vld1.64 %tmp0 = bitcast i64* %A to i8* - %tmp1 = call %struct.__neon_int64x1x4_t @llvm.arm.neon.vld4.v1i64(i8* %tmp0) + %tmp1 = call %struct.__neon_int64x1x4_t @llvm.arm.neon.vld4.v1i64(i8* %tmp0, i32 1) %tmp2 = extractvalue %struct.__neon_int64x1x4_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int64x1x4_t %tmp1, 2 %tmp4 = add <1 x i64> %tmp2, %tmp3 @@ -69,7 +69,7 @@ ;CHECK: vld4Qi8: ;CHECK: vld4.8 ;CHECK: vld4.8 - %tmp1 = call %struct.__neon_int8x16x4_t @llvm.arm.neon.vld4.v16i8(i8* %A) + %tmp1 = call %struct.__neon_int8x16x4_t @llvm.arm.neon.vld4.v16i8(i8* %A, i32 1) %tmp2 = extractvalue %struct.__neon_int8x16x4_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int8x16x4_t %tmp1, 2 %tmp4 = add <16 x i8> %tmp2, %tmp3 @@ -81,7 +81,7 @@ ;CHECK: vld4.16 ;CHECK: vld4.16 %tmp0 = bitcast i16* %A to i8* - %tmp1 = call %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4.v8i16(i8* %tmp0) + %tmp1 = call %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4.v8i16(i8* %tmp0, i32 1) %tmp2 = extractvalue %struct.__neon_int16x8x4_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int16x8x4_t %tmp1, 2 %tmp4 = add <8 x i16> %tmp2, %tmp3 @@ -93,7 +93,7 @@ ;CHECK: vld4.32 ;CHECK: vld4.32 %tmp0 = bitcast i32* %A to i8* - %tmp1 = call %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4.v4i32(i8* %tmp0) + %tmp1 = call %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4.v4i32(i8* %tmp0, i32 1) %tmp2 = extractvalue %struct.__neon_int32x4x4_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_int32x4x4_t %tmp1, 2 %tmp4 = add <4 x i32> %tmp2, %tmp3 @@ -105,20 +105,20 @@ ;CHECK: vld4.32 ;CHECK: vld4.32 %tmp0 = bitcast float* %A to i8* - %tmp1 = call %struct.__neon_float32x4x4_t @llvm.arm.neon.vld4.v4f32(i8* %tmp0) + %tmp1 = call %struct.__neon_float32x4x4_t @llvm.arm.neon.vld4.v4f32(i8* %tmp0, i32 1) %tmp2 = extractvalue %struct.__neon_float32x4x4_t %tmp1, 0 %tmp3 = extractvalue %struct.__neon_float32x4x4_t %tmp1, 2 %tmp4 = fadd <4 x float> %tmp2, %tmp3 ret <4 x float> %tmp4 } -declare %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4.v8i8(i8*) nounwind readonly -declare %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4.v4i16(i8*) nounwind readonly -declare %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4.v2i32(i8*) nounwind readonly -declare %struct.__neon_float32x2x4_t @llvm.arm.neon.vld4.v2f32(i8*) nounwind readonly -declare %struct.__neon_int64x1x4_t @llvm.arm.neon.vld4.v1i64(i8*) nounwind readonly - -declare %struct.__neon_int8x16x4_t @llvm.arm.neon.vld4.v16i8(i8*) nounwind readonly -declare %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4.v8i16(i8*) nounwind readonly -declare %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4.v4i32(i8*) nounwind readonly -declare %struct.__neon_float32x4x4_t @llvm.arm.neon.vld4.v4f32(i8*) nounwind readonly +declare %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4.v8i8(i8*, i32) nounwind readonly +declare %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4.v4i16(i8*, i32) nounwind readonly +declare %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4.v2i32(i8*, i32) nounwind readonly +declare %struct.__neon_float32x2x4_t @llvm.arm.neon.vld4.v2f32(i8*, i32) nounwind readonly +declare %struct.__neon_int64x1x4_t @llvm.arm.neon.vld4.v1i64(i8*, i32) nounwind readonly + +declare %struct.__neon_int8x16x4_t @llvm.arm.neon.vld4.v16i8(i8*, i32) nounwind readonly +declare %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4.v8i16(i8*, i32) nounwind readonly +declare %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4.v4i32(i8*, i32) nounwind readonly +declare %struct.__neon_float32x4x4_t @llvm.arm.neon.vld4.v4f32(i8*, i32) nounwind readonly Modified: llvm/trunk/test/CodeGen/ARM/vldlane.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vldlane.ll?rev=112271&r1=112270&r2=112271&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/vldlane.ll (original) +++ llvm/trunk/test/CodeGen/ARM/vldlane.ll Fri Aug 27 12:13:24 2010 @@ -13,7 +13,7 @@ ;CHECK: vld2lanei8: ;CHECK: vld2.8 %tmp1 = load <8 x i8>* %B - %tmp2 = call %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1) + %tmp2 = call %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 1) %tmp3 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 1 %tmp5 = add <8 x i8> %tmp3, %tmp4 @@ -25,7 +25,7 @@ ;CHECK: vld2.16 %tmp0 = bitcast i16* %A to i8* %tmp1 = load <4 x i16>* %B - %tmp2 = call %struct.__neon_int16x4x2_t @llvm.arm.neon.vld2lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1) + %tmp2 = call %struct.__neon_int16x4x2_t @llvm.arm.neon.vld2lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 1) %tmp3 = extractvalue %struct.__neon_int16x4x2_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_int16x4x2_t %tmp2, 1 %tmp5 = add <4 x i16> %tmp3, %tmp4 @@ -37,7 +37,7 @@ ;CHECK: vld2.32 %tmp0 = bitcast i32* %A to i8* %tmp1 = load <2 x i32>* %B - %tmp2 = call %struct.__neon_int32x2x2_t @llvm.arm.neon.vld2lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1) + %tmp2 = call %struct.__neon_int32x2x2_t @llvm.arm.neon.vld2lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 1) %tmp3 = extractvalue %struct.__neon_int32x2x2_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_int32x2x2_t %tmp2, 1 %tmp5 = add <2 x i32> %tmp3, %tmp4 @@ -49,7 +49,7 @@ ;CHECK: vld2.32 %tmp0 = bitcast float* %A to i8* %tmp1 = load <2 x float>* %B - %tmp2 = call %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2lane.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, i32 1) + %tmp2 = call %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2lane.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, i32 1, i32 1) %tmp3 = extractvalue %struct.__neon_float32x2x2_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_float32x2x2_t %tmp2, 1 %tmp5 = fadd <2 x float> %tmp3, %tmp4 @@ -61,7 +61,7 @@ ;CHECK: vld2.16 %tmp0 = bitcast i16* %A to i8* %tmp1 = load <8 x i16>* %B - %tmp2 = call %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1) + %tmp2 = call %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1, i32 1) %tmp3 = extractvalue %struct.__neon_int16x8x2_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_int16x8x2_t %tmp2, 1 %tmp5 = add <8 x i16> %tmp3, %tmp4 @@ -73,7 +73,7 @@ ;CHECK: vld2.32 %tmp0 = bitcast i32* %A to i8* %tmp1 = load <4 x i32>* %B - %tmp2 = call %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2) + %tmp2 = call %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2, i32 1) %tmp3 = extractvalue %struct.__neon_int32x4x2_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_int32x4x2_t %tmp2, 1 %tmp5 = add <4 x i32> %tmp3, %tmp4 @@ -85,21 +85,21 @@ ;CHECK: vld2.32 %tmp0 = bitcast float* %A to i8* %tmp1 = load <4 x float>* %B - %tmp2 = call %struct.__neon_float32x4x2_t @llvm.arm.neon.vld2lane.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, i32 1) + %tmp2 = call %struct.__neon_float32x4x2_t @llvm.arm.neon.vld2lane.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, i32 1, i32 1) %tmp3 = extractvalue %struct.__neon_float32x4x2_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_float32x4x2_t %tmp2, 1 %tmp5 = fadd <4 x float> %tmp3, %tmp4 ret <4 x float> %tmp5 } -declare %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8*, <8 x i8>, <8 x i8>, i32) nounwind readonly -declare %struct.__neon_int16x4x2_t @llvm.arm.neon.vld2lane.v4i16(i8*, <4 x i16>, <4 x i16>, i32) nounwind readonly -declare %struct.__neon_int32x2x2_t @llvm.arm.neon.vld2lane.v2i32(i8*, <2 x i32>, <2 x i32>, i32) nounwind readonly -declare %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2lane.v2f32(i8*, <2 x float>, <2 x float>, i32) nounwind readonly - -declare %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2lane.v8i16(i8*, <8 x i16>, <8 x i16>, i32) nounwind readonly -declare %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2lane.v4i32(i8*, <4 x i32>, <4 x i32>, i32) nounwind readonly -declare %struct.__neon_float32x4x2_t @llvm.arm.neon.vld2lane.v4f32(i8*, <4 x float>, <4 x float>, i32) nounwind readonly +declare %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8*, <8 x i8>, <8 x i8>, i32, i32) nounwind readonly +declare %struct.__neon_int16x4x2_t @llvm.arm.neon.vld2lane.v4i16(i8*, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly +declare %struct.__neon_int32x2x2_t @llvm.arm.neon.vld2lane.v2i32(i8*, <2 x i32>, <2 x i32>, i32, i32) nounwind readonly +declare %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2lane.v2f32(i8*, <2 x float>, <2 x float>, i32, i32) nounwind readonly + +declare %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2lane.v8i16(i8*, <8 x i16>, <8 x i16>, i32, i32) nounwind readonly +declare %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2lane.v4i32(i8*, <4 x i32>, <4 x i32>, i32, i32) nounwind readonly +declare %struct.__neon_float32x4x2_t @llvm.arm.neon.vld2lane.v4f32(i8*, <4 x float>, <4 x float>, i32, i32) nounwind readonly %struct.__neon_int8x8x3_t = type { <8 x i8>, <8 x i8>, <8 x i8> } %struct.__neon_int16x4x3_t = type { <4 x i16>, <4 x i16>, <4 x i16> } @@ -114,7 +114,7 @@ ;CHECK: vld3lanei8: ;CHECK: vld3.8 %tmp1 = load <8 x i8>* %B - %tmp2 = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1) + %tmp2 = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 1) %tmp3 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 1 %tmp5 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 2 @@ -128,7 +128,7 @@ ;CHECK: vld3.16 %tmp0 = bitcast i16* %A to i8* %tmp1 = load <4 x i16>* %B - %tmp2 = call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1) + %tmp2 = call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 1) %tmp3 = extractvalue %struct.__neon_int16x4x3_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_int16x4x3_t %tmp2, 1 %tmp5 = extractvalue %struct.__neon_int16x4x3_t %tmp2, 2 @@ -142,7 +142,7 @@ ;CHECK: vld3.32 %tmp0 = bitcast i32* %A to i8* %tmp1 = load <2 x i32>* %B - %tmp2 = call %struct.__neon_int32x2x3_t @llvm.arm.neon.vld3lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1) + %tmp2 = call %struct.__neon_int32x2x3_t @llvm.arm.neon.vld3lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 1) %tmp3 = extractvalue %struct.__neon_int32x2x3_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_int32x2x3_t %tmp2, 1 %tmp5 = extractvalue %struct.__neon_int32x2x3_t %tmp2, 2 @@ -156,7 +156,7 @@ ;CHECK: vld3.32 %tmp0 = bitcast float* %A to i8* %tmp1 = load <2 x float>* %B - %tmp2 = call %struct.__neon_float32x2x3_t @llvm.arm.neon.vld3lane.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, i32 1) + %tmp2 = call %struct.__neon_float32x2x3_t @llvm.arm.neon.vld3lane.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, i32 1, i32 1) %tmp3 = extractvalue %struct.__neon_float32x2x3_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_float32x2x3_t %tmp2, 1 %tmp5 = extractvalue %struct.__neon_float32x2x3_t %tmp2, 2 @@ -170,7 +170,7 @@ ;CHECK: vld3.16 %tmp0 = bitcast i16* %A to i8* %tmp1 = load <8 x i16>* %B - %tmp2 = call %struct.__neon_int16x8x3_t @llvm.arm.neon.vld3lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1) + %tmp2 = call %struct.__neon_int16x8x3_t @llvm.arm.neon.vld3lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1, i32 1) %tmp3 = extractvalue %struct.__neon_int16x8x3_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_int16x8x3_t %tmp2, 1 %tmp5 = extractvalue %struct.__neon_int16x8x3_t %tmp2, 2 @@ -184,7 +184,7 @@ ;CHECK: vld3.32 %tmp0 = bitcast i32* %A to i8* %tmp1 = load <4 x i32>* %B - %tmp2 = call %struct.__neon_int32x4x3_t @llvm.arm.neon.vld3lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 3) + %tmp2 = call %struct.__neon_int32x4x3_t @llvm.arm.neon.vld3lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 3, i32 1) %tmp3 = extractvalue %struct.__neon_int32x4x3_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_int32x4x3_t %tmp2, 1 %tmp5 = extractvalue %struct.__neon_int32x4x3_t %tmp2, 2 @@ -198,7 +198,7 @@ ;CHECK: vld3.32 %tmp0 = bitcast float* %A to i8* %tmp1 = load <4 x float>* %B - %tmp2 = call %struct.__neon_float32x4x3_t @llvm.arm.neon.vld3lane.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1) + %tmp2 = call %struct.__neon_float32x4x3_t @llvm.arm.neon.vld3lane.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1, i32 1) %tmp3 = extractvalue %struct.__neon_float32x4x3_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_float32x4x3_t %tmp2, 1 %tmp5 = extractvalue %struct.__neon_float32x4x3_t %tmp2, 2 @@ -207,14 +207,14 @@ ret <4 x float> %tmp7 } -declare %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3lane.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, i32) nounwind readonly -declare %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, i32) nounwind readonly -declare %struct.__neon_int32x2x3_t @llvm.arm.neon.vld3lane.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, i32) nounwind readonly -declare %struct.__neon_float32x2x3_t @llvm.arm.neon.vld3lane.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, i32) nounwind readonly - -declare %struct.__neon_int16x8x3_t @llvm.arm.neon.vld3lane.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, i32) nounwind readonly -declare %struct.__neon_int32x4x3_t @llvm.arm.neon.vld3lane.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, i32) nounwind readonly -declare %struct.__neon_float32x4x3_t @llvm.arm.neon.vld3lane.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, i32) nounwind readonly +declare %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3lane.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, i32, i32) nounwind readonly +declare %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly +declare %struct.__neon_int32x2x3_t @llvm.arm.neon.vld3lane.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, i32, i32) nounwind readonly +declare %struct.__neon_float32x2x3_t @llvm.arm.neon.vld3lane.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, i32, i32) nounwind readonly + +declare %struct.__neon_int16x8x3_t @llvm.arm.neon.vld3lane.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, i32, i32) nounwind readonly +declare %struct.__neon_int32x4x3_t @llvm.arm.neon.vld3lane.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, i32, i32) nounwind readonly +declare %struct.__neon_float32x4x3_t @llvm.arm.neon.vld3lane.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, i32, i32) nounwind readonly %struct.__neon_int8x8x4_t = type { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } %struct.__neon_int16x4x4_t = type { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @@ -229,7 +229,7 @@ ;CHECK: vld4lanei8: ;CHECK: vld4.8 %tmp1 = load <8 x i8>* %B - %tmp2 = call %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1) + %tmp2 = call %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 1) %tmp3 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 1 %tmp5 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 2 @@ -245,7 +245,7 @@ ;CHECK: vld4.16 %tmp0 = bitcast i16* %A to i8* %tmp1 = load <4 x i16>* %B - %tmp2 = call %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1) + %tmp2 = call %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 1) %tmp3 = extractvalue %struct.__neon_int16x4x4_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_int16x4x4_t %tmp2, 1 %tmp5 = extractvalue %struct.__neon_int16x4x4_t %tmp2, 2 @@ -261,7 +261,7 @@ ;CHECK: vld4.32 %tmp0 = bitcast i32* %A to i8* %tmp1 = load <2 x i32>* %B - %tmp2 = call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1) + %tmp2 = call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 1) %tmp3 = extractvalue %struct.__neon_int32x2x4_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_int32x2x4_t %tmp2, 1 %tmp5 = extractvalue %struct.__neon_int32x2x4_t %tmp2, 2 @@ -277,7 +277,7 @@ ;CHECK: vld4.32 %tmp0 = bitcast float* %A to i8* %tmp1 = load <2 x float>* %B - %tmp2 = call %struct.__neon_float32x2x4_t @llvm.arm.neon.vld4lane.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, i32 1) + %tmp2 = call %struct.__neon_float32x2x4_t @llvm.arm.neon.vld4lane.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, i32 1, i32 1) %tmp3 = extractvalue %struct.__neon_float32x2x4_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_float32x2x4_t %tmp2, 1 %tmp5 = extractvalue %struct.__neon_float32x2x4_t %tmp2, 2 @@ -293,7 +293,7 @@ ;CHECK: vld4.16 %tmp0 = bitcast i16* %A to i8* %tmp1 = load <8 x i16>* %B - %tmp2 = call %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1) + %tmp2 = call %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1, i32 1) %tmp3 = extractvalue %struct.__neon_int16x8x4_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_int16x8x4_t %tmp2, 1 %tmp5 = extractvalue %struct.__neon_int16x8x4_t %tmp2, 2 @@ -309,7 +309,7 @@ ;CHECK: vld4.32 %tmp0 = bitcast i32* %A to i8* %tmp1 = load <4 x i32>* %B - %tmp2 = call %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 1) + %tmp2 = call %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 1, i32 1) %tmp3 = extractvalue %struct.__neon_int32x4x4_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_int32x4x4_t %tmp2, 1 %tmp5 = extractvalue %struct.__neon_int32x4x4_t %tmp2, 2 @@ -325,7 +325,7 @@ ;CHECK: vld4.32 %tmp0 = bitcast float* %A to i8* %tmp1 = load <4 x float>* %B - %tmp2 = call %struct.__neon_float32x4x4_t @llvm.arm.neon.vld4lane.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1) + %tmp2 = call %struct.__neon_float32x4x4_t @llvm.arm.neon.vld4lane.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1, i32 1) %tmp3 = extractvalue %struct.__neon_float32x4x4_t %tmp2, 0 %tmp4 = extractvalue %struct.__neon_float32x4x4_t %tmp2, 1 %tmp5 = extractvalue %struct.__neon_float32x4x4_t %tmp2, 2 @@ -336,11 +336,11 @@ ret <4 x float> %tmp9 } -declare %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4lane.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, i32) nounwind readonly -declare %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4lane.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>, i32) nounwind readonly -declare %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32) nounwind readonly -declare %struct.__neon_float32x2x4_t @llvm.arm.neon.vld4lane.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, <2 x float>, i32) nounwind readonly - -declare %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4lane.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, i32) nounwind readonly -declare %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4lane.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, i32) nounwind readonly -declare %struct.__neon_float32x4x4_t @llvm.arm.neon.vld4lane.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, <4 x float>, i32) nounwind readonly +declare %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4lane.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, i32, i32) nounwind readonly +declare %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4lane.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly +declare %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32, i32) nounwind readonly +declare %struct.__neon_float32x2x4_t @llvm.arm.neon.vld4lane.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, <2 x float>, i32, i32) nounwind readonly + +declare %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4lane.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, i32, i32) nounwind readonly +declare %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4lane.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, i32, i32) nounwind readonly +declare %struct.__neon_float32x4x4_t @llvm.arm.neon.vld4lane.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, <4 x float>, i32, i32) nounwind readonly Modified: llvm/trunk/test/CodeGen/ARM/vst1.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vst1.ll?rev=112271&r1=112270&r2=112271&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/vst1.ll (original) +++ llvm/trunk/test/CodeGen/ARM/vst1.ll Fri Aug 27 12:13:24 2010 @@ -4,7 +4,7 @@ ;CHECK: vst1i8: ;CHECK: vst1.8 %tmp1 = load <8 x i8>* %B - call void @llvm.arm.neon.vst1.v8i8(i8* %A, <8 x i8> %tmp1) + call void @llvm.arm.neon.vst1.v8i8(i8* %A, <8 x i8> %tmp1, i32 1) ret void } @@ -13,7 +13,7 @@ ;CHECK: vst1.16 %tmp0 = bitcast i16* %A to i8* %tmp1 = load <4 x i16>* %B - call void @llvm.arm.neon.vst1.v4i16(i8* %tmp0, <4 x i16> %tmp1) + call void @llvm.arm.neon.vst1.v4i16(i8* %tmp0, <4 x i16> %tmp1, i32 1) ret void } @@ -22,7 +22,7 @@ ;CHECK: vst1.32 %tmp0 = bitcast i32* %A to i8* %tmp1 = load <2 x i32>* %B - call void @llvm.arm.neon.vst1.v2i32(i8* %tmp0, <2 x i32> %tmp1) + call void @llvm.arm.neon.vst1.v2i32(i8* %tmp0, <2 x i32> %tmp1, i32 1) ret void } @@ -31,7 +31,7 @@ ;CHECK: vst1.32 %tmp0 = bitcast float* %A to i8* %tmp1 = load <2 x float>* %B - call void @llvm.arm.neon.vst1.v2f32(i8* %tmp0, <2 x float> %tmp1) + call void @llvm.arm.neon.vst1.v2f32(i8* %tmp0, <2 x float> %tmp1, i32 1) ret void } @@ -40,7 +40,7 @@ ;CHECK: vst1.64 %tmp0 = bitcast i64* %A to i8* %tmp1 = load <1 x i64>* %B - call void @llvm.arm.neon.vst1.v1i64(i8* %tmp0, <1 x i64> %tmp1) + call void @llvm.arm.neon.vst1.v1i64(i8* %tmp0, <1 x i64> %tmp1, i32 1) ret void } @@ -48,7 +48,7 @@ ;CHECK: vst1Qi8: ;CHECK: vst1.8 %tmp1 = load <16 x i8>* %B - call void @llvm.arm.neon.vst1.v16i8(i8* %A, <16 x i8> %tmp1) + call void @llvm.arm.neon.vst1.v16i8(i8* %A, <16 x i8> %tmp1, i32 1) ret void } @@ -57,7 +57,7 @@ ;CHECK: vst1.16 %tmp0 = bitcast i16* %A to i8* %tmp1 = load <8 x i16>* %B - call void @llvm.arm.neon.vst1.v8i16(i8* %tmp0, <8 x i16> %tmp1) + call void @llvm.arm.neon.vst1.v8i16(i8* %tmp0, <8 x i16> %tmp1, i32 1) ret void } @@ -66,7 +66,7 @@ ;CHECK: vst1.32 %tmp0 = bitcast i32* %A to i8* %tmp1 = load <4 x i32>* %B - call void @llvm.arm.neon.vst1.v4i32(i8* %tmp0, <4 x i32> %tmp1) + call void @llvm.arm.neon.vst1.v4i32(i8* %tmp0, <4 x i32> %tmp1, i32 1) ret void } @@ -75,7 +75,7 @@ ;CHECK: vst1.32 %tmp0 = bitcast float* %A to i8* %tmp1 = load <4 x float>* %B - call void @llvm.arm.neon.vst1.v4f32(i8* %tmp0, <4 x float> %tmp1) + call void @llvm.arm.neon.vst1.v4f32(i8* %tmp0, <4 x float> %tmp1, i32 1) ret void } @@ -84,18 +84,18 @@ ;CHECK: vst1.64 %tmp0 = bitcast i64* %A to i8* %tmp1 = load <2 x i64>* %B - call void @llvm.arm.neon.vst1.v2i64(i8* %tmp0, <2 x i64> %tmp1) + call void @llvm.arm.neon.vst1.v2i64(i8* %tmp0, <2 x i64> %tmp1, i32 1) ret void } -declare void @llvm.arm.neon.vst1.v8i8(i8*, <8 x i8>) nounwind -declare void @llvm.arm.neon.vst1.v4i16(i8*, <4 x i16>) nounwind -declare void @llvm.arm.neon.vst1.v2i32(i8*, <2 x i32>) nounwind -declare void @llvm.arm.neon.vst1.v2f32(i8*, <2 x float>) nounwind -declare void @llvm.arm.neon.vst1.v1i64(i8*, <1 x i64>) nounwind +declare void @llvm.arm.neon.vst1.v8i8(i8*, <8 x i8>, i32) nounwind +declare void @llvm.arm.neon.vst1.v4i16(i8*, <4 x i16>, i32) nounwind +declare void @llvm.arm.neon.vst1.v2i32(i8*, <2 x i32>, i32) nounwind +declare void @llvm.arm.neon.vst1.v2f32(i8*, <2 x float>, i32) nounwind +declare void @llvm.arm.neon.vst1.v1i64(i8*, <1 x i64>, i32) nounwind -declare void @llvm.arm.neon.vst1.v16i8(i8*, <16 x i8>) nounwind -declare void @llvm.arm.neon.vst1.v8i16(i8*, <8 x i16>) nounwind -declare void @llvm.arm.neon.vst1.v4i32(i8*, <4 x i32>) nounwind -declare void @llvm.arm.neon.vst1.v4f32(i8*, <4 x float>) nounwind -declare void @llvm.arm.neon.vst1.v2i64(i8*, <2 x i64>) nounwind +declare void @llvm.arm.neon.vst1.v16i8(i8*, <16 x i8>, i32) nounwind +declare void @llvm.arm.neon.vst1.v8i16(i8*, <8 x i16>, i32) nounwind +declare void @llvm.arm.neon.vst1.v4i32(i8*, <4 x i32>, i32) nounwind +declare void @llvm.arm.neon.vst1.v4f32(i8*, <4 x float>, i32) nounwind +declare void @llvm.arm.neon.vst1.v2i64(i8*, <2 x i64>, i32) nounwind Modified: llvm/trunk/test/CodeGen/ARM/vst2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vst2.ll?rev=112271&r1=112270&r2=112271&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/vst2.ll (original) +++ llvm/trunk/test/CodeGen/ARM/vst2.ll Fri Aug 27 12:13:24 2010 @@ -4,7 +4,7 @@ ;CHECK: vst2i8: ;CHECK: vst2.8 %tmp1 = load <8 x i8>* %B - call void @llvm.arm.neon.vst2.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1) + call void @llvm.arm.neon.vst2.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1) ret void } @@ -13,7 +13,7 @@ ;CHECK: vst2.16 %tmp0 = bitcast i16* %A to i8* %tmp1 = load <4 x i16>* %B - call void @llvm.arm.neon.vst2.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1) + call void @llvm.arm.neon.vst2.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1) ret void } @@ -22,7 +22,7 @@ ;CHECK: vst2.32 %tmp0 = bitcast i32* %A to i8* %tmp1 = load <2 x i32>* %B - call void @llvm.arm.neon.vst2.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1) + call void @llvm.arm.neon.vst2.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1) ret void } @@ -31,7 +31,7 @@ ;CHECK: vst2.32 %tmp0 = bitcast float* %A to i8* %tmp1 = load <2 x float>* %B - call void @llvm.arm.neon.vst2.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1) + call void @llvm.arm.neon.vst2.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, i32 1) ret void } @@ -40,7 +40,7 @@ ;CHECK: vst1.64 %tmp0 = bitcast i64* %A to i8* %tmp1 = load <1 x i64>* %B - call void @llvm.arm.neon.vst2.v1i64(i8* %tmp0, <1 x i64> %tmp1, <1 x i64> %tmp1) + call void @llvm.arm.neon.vst2.v1i64(i8* %tmp0, <1 x i64> %tmp1, <1 x i64> %tmp1, i32 1) ret void } @@ -48,7 +48,7 @@ ;CHECK: vst2Qi8: ;CHECK: vst2.8 %tmp1 = load <16 x i8>* %B - call void @llvm.arm.neon.vst2.v16i8(i8* %A, <16 x i8> %tmp1, <16 x i8> %tmp1) + call void @llvm.arm.neon.vst2.v16i8(i8* %A, <16 x i8> %tmp1, <16 x i8> %tmp1, i32 1) ret void } @@ -57,7 +57,7 @@ ;CHECK: vst2.16 %tmp0 = bitcast i16* %A to i8* %tmp1 = load <8 x i16>* %B - call void @llvm.arm.neon.vst2.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1) + call void @llvm.arm.neon.vst2.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1) ret void } @@ -66,7 +66,7 @@ ;CHECK: vst2.32 %tmp0 = bitcast i32* %A to i8* %tmp1 = load <4 x i32>* %B - call void @llvm.arm.neon.vst2.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1) + call void @llvm.arm.neon.vst2.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 1) ret void } @@ -75,17 +75,17 @@ ;CHECK: vst2.32 %tmp0 = bitcast float* %A to i8* %tmp1 = load <4 x float>* %B - call void @llvm.arm.neon.vst2.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1) + call void @llvm.arm.neon.vst2.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, i32 1) ret void } -declare void @llvm.arm.neon.vst2.v8i8(i8*, <8 x i8>, <8 x i8>) nounwind -declare void @llvm.arm.neon.vst2.v4i16(i8*, <4 x i16>, <4 x i16>) nounwind -declare void @llvm.arm.neon.vst2.v2i32(i8*, <2 x i32>, <2 x i32>) nounwind -declare void @llvm.arm.neon.vst2.v2f32(i8*, <2 x float>, <2 x float>) nounwind -declare void @llvm.arm.neon.vst2.v1i64(i8*, <1 x i64>, <1 x i64>) nounwind +declare void @llvm.arm.neon.vst2.v8i8(i8*, <8 x i8>, <8 x i8>, i32) nounwind +declare void @llvm.arm.neon.vst2.v4i16(i8*, <4 x i16>, <4 x i16>, i32) nounwind +declare void @llvm.arm.neon.vst2.v2i32(i8*, <2 x i32>, <2 x i32>, i32) nounwind +declare void @llvm.arm.neon.vst2.v2f32(i8*, <2 x float>, <2 x float>, i32) nounwind +declare void @llvm.arm.neon.vst2.v1i64(i8*, <1 x i64>, <1 x i64>, i32) nounwind -declare void @llvm.arm.neon.vst2.v16i8(i8*, <16 x i8>, <16 x i8>) nounwind -declare void @llvm.arm.neon.vst2.v8i16(i8*, <8 x i16>, <8 x i16>) nounwind -declare void @llvm.arm.neon.vst2.v4i32(i8*, <4 x i32>, <4 x i32>) nounwind -declare void @llvm.arm.neon.vst2.v4f32(i8*, <4 x float>, <4 x float>) nounwind +declare void @llvm.arm.neon.vst2.v16i8(i8*, <16 x i8>, <16 x i8>, i32) nounwind +declare void @llvm.arm.neon.vst2.v8i16(i8*, <8 x i16>, <8 x i16>, i32) nounwind +declare void @llvm.arm.neon.vst2.v4i32(i8*, <4 x i32>, <4 x i32>, i32) nounwind +declare void @llvm.arm.neon.vst2.v4f32(i8*, <4 x float>, <4 x float>, i32) nounwind Modified: llvm/trunk/test/CodeGen/ARM/vst3.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vst3.ll?rev=112271&r1=112270&r2=112271&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/vst3.ll (original) +++ llvm/trunk/test/CodeGen/ARM/vst3.ll Fri Aug 27 12:13:24 2010 @@ -4,7 +4,7 @@ ;CHECK: vst3i8: ;CHECK: vst3.8 %tmp1 = load <8 x i8>* %B - call void @llvm.arm.neon.vst3.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1) + call void @llvm.arm.neon.vst3.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1) ret void } @@ -13,7 +13,7 @@ ;CHECK: vst3.16 %tmp0 = bitcast i16* %A to i8* %tmp1 = load <4 x i16>* %B - call void @llvm.arm.neon.vst3.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1) + call void @llvm.arm.neon.vst3.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1) ret void } @@ -22,7 +22,7 @@ ;CHECK: vst3.32 %tmp0 = bitcast i32* %A to i8* %tmp1 = load <2 x i32>* %B - call void @llvm.arm.neon.vst3.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1) + call void @llvm.arm.neon.vst3.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1) ret void } @@ -31,7 +31,7 @@ ;CHECK: vst3.32 %tmp0 = bitcast float* %A to i8* %tmp1 = load <2 x float>* %B - call void @llvm.arm.neon.vst3.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1) + call void @llvm.arm.neon.vst3.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, i32 1) ret void } @@ -40,7 +40,7 @@ ;CHECK: vst1.64 %tmp0 = bitcast i64* %A to i8* %tmp1 = load <1 x i64>* %B - call void @llvm.arm.neon.vst3.v1i64(i8* %tmp0, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1) + call void @llvm.arm.neon.vst3.v1i64(i8* %tmp0, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1, i32 1) ret void } @@ -49,7 +49,7 @@ ;CHECK: vst3.8 ;CHECK: vst3.8 %tmp1 = load <16 x i8>* %B - call void @llvm.arm.neon.vst3.v16i8(i8* %A, <16 x i8> %tmp1, <16 x i8> %tmp1, <16 x i8> %tmp1) + call void @llvm.arm.neon.vst3.v16i8(i8* %A, <16 x i8> %tmp1, <16 x i8> %tmp1, <16 x i8> %tmp1, i32 1) ret void } @@ -59,7 +59,7 @@ ;CHECK: vst3.16 %tmp0 = bitcast i16* %A to i8* %tmp1 = load <8 x i16>* %B - call void @llvm.arm.neon.vst3.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1) + call void @llvm.arm.neon.vst3.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1) ret void } @@ -69,7 +69,7 @@ ;CHECK: vst3.32 %tmp0 = bitcast i32* %A to i8* %tmp1 = load <4 x i32>* %B - call void @llvm.arm.neon.vst3.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1) + call void @llvm.arm.neon.vst3.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 1) ret void } @@ -79,17 +79,17 @@ ;CHECK: vst3.32 %tmp0 = bitcast float* %A to i8* %tmp1 = load <4 x float>* %B - call void @llvm.arm.neon.vst3.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1) + call void @llvm.arm.neon.vst3.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1) ret void } -declare void @llvm.arm.neon.vst3.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>) nounwind -declare void @llvm.arm.neon.vst3.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>) nounwind -declare void @llvm.arm.neon.vst3.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>) nounwind -declare void @llvm.arm.neon.vst3.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>) nounwind -declare void @llvm.arm.neon.vst3.v1i64(i8*, <1 x i64>, <1 x i64>, <1 x i64>) nounwind +declare void @llvm.arm.neon.vst3.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, i32) nounwind +declare void @llvm.arm.neon.vst3.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, i32) nounwind +declare void @llvm.arm.neon.vst3.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, i32) nounwind +declare void @llvm.arm.neon.vst3.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, i32) nounwind +declare void @llvm.arm.neon.vst3.v1i64(i8*, <1 x i64>, <1 x i64>, <1 x i64>, i32) nounwind -declare void @llvm.arm.neon.vst3.v16i8(i8*, <16 x i8>, <16 x i8>, <16 x i8>) nounwind -declare void @llvm.arm.neon.vst3.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>) nounwind -declare void @llvm.arm.neon.vst3.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>) nounwind -declare void @llvm.arm.neon.vst3.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>) nounwind +declare void @llvm.arm.neon.vst3.v16i8(i8*, <16 x i8>, <16 x i8>, <16 x i8>, i32) nounwind +declare void @llvm.arm.neon.vst3.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, i32) nounwind +declare void @llvm.arm.neon.vst3.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, i32) nounwind +declare void @llvm.arm.neon.vst3.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, i32) nounwind Modified: llvm/trunk/test/CodeGen/ARM/vst4.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vst4.ll?rev=112271&r1=112270&r2=112271&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/vst4.ll (original) +++ llvm/trunk/test/CodeGen/ARM/vst4.ll Fri Aug 27 12:13:24 2010 @@ -4,7 +4,7 @@ ;CHECK: vst4i8: ;CHECK: vst4.8 %tmp1 = load <8 x i8>* %B - call void @llvm.arm.neon.vst4.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1) + call void @llvm.arm.neon.vst4.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1) ret void } @@ -13,7 +13,7 @@ ;CHECK: vst4.16 %tmp0 = bitcast i16* %A to i8* %tmp1 = load <4 x i16>* %B - call void @llvm.arm.neon.vst4.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1) + call void @llvm.arm.neon.vst4.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1) ret void } @@ -22,7 +22,7 @@ ;CHECK: vst4.32 %tmp0 = bitcast i32* %A to i8* %tmp1 = load <2 x i32>* %B - call void @llvm.arm.neon.vst4.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1) + call void @llvm.arm.neon.vst4.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1) ret void } @@ -31,7 +31,7 @@ ;CHECK: vst4.32 %tmp0 = bitcast float* %A to i8* %tmp1 = load <2 x float>* %B - call void @llvm.arm.neon.vst4.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1) + call void @llvm.arm.neon.vst4.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, i32 1) ret void } @@ -40,7 +40,7 @@ ;CHECK: vst1.64 %tmp0 = bitcast i64* %A to i8* %tmp1 = load <1 x i64>* %B - call void @llvm.arm.neon.vst4.v1i64(i8* %tmp0, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1) + call void @llvm.arm.neon.vst4.v1i64(i8* %tmp0, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1, i32 1) ret void } @@ -49,7 +49,7 @@ ;CHECK: vst4.8 ;CHECK: vst4.8 %tmp1 = load <16 x i8>* %B - call void @llvm.arm.neon.vst4.v16i8(i8* %A, <16 x i8> %tmp1, <16 x i8> %tmp1, <16 x i8> %tmp1, <16 x i8> %tmp1) + call void @llvm.arm.neon.vst4.v16i8(i8* %A, <16 x i8> %tmp1, <16 x i8> %tmp1, <16 x i8> %tmp1, <16 x i8> %tmp1, i32 1) ret void } @@ -59,7 +59,7 @@ ;CHECK: vst4.16 %tmp0 = bitcast i16* %A to i8* %tmp1 = load <8 x i16>* %B - call void @llvm.arm.neon.vst4.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1) + call void @llvm.arm.neon.vst4.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1) ret void } @@ -69,7 +69,7 @@ ;CHECK: vst4.32 %tmp0 = bitcast i32* %A to i8* %tmp1 = load <4 x i32>* %B - call void @llvm.arm.neon.vst4.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1) + call void @llvm.arm.neon.vst4.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 1) ret void } @@ -79,17 +79,17 @@ ;CHECK: vst4.32 %tmp0 = bitcast float* %A to i8* %tmp1 = load <4 x float>* %B - call void @llvm.arm.neon.vst4.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1) + call void @llvm.arm.neon.vst4.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1) ret void } -declare void @llvm.arm.neon.vst4.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) nounwind -declare void @llvm.arm.neon.vst4.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>) nounwind -declare void @llvm.arm.neon.vst4.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>) nounwind -declare void @llvm.arm.neon.vst4.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, <2 x float>) nounwind -declare void @llvm.arm.neon.vst4.v1i64(i8*, <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64>) nounwind +declare void @llvm.arm.neon.vst4.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, i32) nounwind +declare void @llvm.arm.neon.vst4.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>, i32) nounwind +declare void @llvm.arm.neon.vst4.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32) nounwind +declare void @llvm.arm.neon.vst4.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, <2 x float>, i32) nounwind +declare void @llvm.arm.neon.vst4.v1i64(i8*, <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64>, i32) nounwind -declare void @llvm.arm.neon.vst4.v16i8(i8*, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) nounwind -declare void @llvm.arm.neon.vst4.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) nounwind -declare void @llvm.arm.neon.vst4.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) nounwind -declare void @llvm.arm.neon.vst4.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, <4 x float>) nounwind +declare void @llvm.arm.neon.vst4.v16i8(i8*, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, i32) nounwind +declare void @llvm.arm.neon.vst4.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, i32) nounwind +declare void @llvm.arm.neon.vst4.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, i32) nounwind +declare void @llvm.arm.neon.vst4.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, <4 x float>, i32) nounwind Modified: llvm/trunk/test/CodeGen/ARM/vstlane.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vstlane.ll?rev=112271&r1=112270&r2=112271&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/vstlane.ll (original) +++ llvm/trunk/test/CodeGen/ARM/vstlane.ll Fri Aug 27 12:13:24 2010 @@ -4,7 +4,7 @@ ;CHECK: vst2lanei8: ;CHECK: vst2.8 %tmp1 = load <8 x i8>* %B - call void @llvm.arm.neon.vst2lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1) + call void @llvm.arm.neon.vst2lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 1) ret void } @@ -13,7 +13,7 @@ ;CHECK: vst2.16 %tmp0 = bitcast i16* %A to i8* %tmp1 = load <4 x i16>* %B - call void @llvm.arm.neon.vst2lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1) + call void @llvm.arm.neon.vst2lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 1) ret void } @@ -22,7 +22,7 @@ ;CHECK: vst2.32 %tmp0 = bitcast i32* %A to i8* %tmp1 = load <2 x i32>* %B - call void @llvm.arm.neon.vst2lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1) + call void @llvm.arm.neon.vst2lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 1) ret void } @@ -31,7 +31,7 @@ ;CHECK: vst2.32 %tmp0 = bitcast float* %A to i8* %tmp1 = load <2 x float>* %B - call void @llvm.arm.neon.vst2lane.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, i32 1) + call void @llvm.arm.neon.vst2lane.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, i32 1, i32 1) ret void } @@ -40,7 +40,7 @@ ;CHECK: vst2.16 %tmp0 = bitcast i16* %A to i8* %tmp1 = load <8 x i16>* %B - call void @llvm.arm.neon.vst2lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1) + call void @llvm.arm.neon.vst2lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1, i32 1) ret void } @@ -49,7 +49,7 @@ ;CHECK: vst2.32 %tmp0 = bitcast i32* %A to i8* %tmp1 = load <4 x i32>* %B - call void @llvm.arm.neon.vst2lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2) + call void @llvm.arm.neon.vst2lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2, i32 1) ret void } @@ -58,24 +58,24 @@ ;CHECK: vst2.32 %tmp0 = bitcast float* %A to i8* %tmp1 = load <4 x float>* %B - call void @llvm.arm.neon.vst2lane.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, i32 3) + call void @llvm.arm.neon.vst2lane.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, i32 3, i32 1) ret void } -declare void @llvm.arm.neon.vst2lane.v8i8(i8*, <8 x i8>, <8 x i8>, i32) nounwind -declare void @llvm.arm.neon.vst2lane.v4i16(i8*, <4 x i16>, <4 x i16>, i32) nounwind -declare void @llvm.arm.neon.vst2lane.v2i32(i8*, <2 x i32>, <2 x i32>, i32) nounwind -declare void @llvm.arm.neon.vst2lane.v2f32(i8*, <2 x float>, <2 x float>, i32) nounwind +declare void @llvm.arm.neon.vst2lane.v8i8(i8*, <8 x i8>, <8 x i8>, i32, i32) nounwind +declare void @llvm.arm.neon.vst2lane.v4i16(i8*, <4 x i16>, <4 x i16>, i32, i32) nounwind +declare void @llvm.arm.neon.vst2lane.v2i32(i8*, <2 x i32>, <2 x i32>, i32, i32) nounwind +declare void @llvm.arm.neon.vst2lane.v2f32(i8*, <2 x float>, <2 x float>, i32, i32) nounwind -declare void @llvm.arm.neon.vst2lane.v8i16(i8*, <8 x i16>, <8 x i16>, i32) nounwind -declare void @llvm.arm.neon.vst2lane.v4i32(i8*, <4 x i32>, <4 x i32>, i32) nounwind -declare void @llvm.arm.neon.vst2lane.v4f32(i8*, <4 x float>, <4 x float>, i32) nounwind +declare void @llvm.arm.neon.vst2lane.v8i16(i8*, <8 x i16>, <8 x i16>, i32, i32) nounwind +declare void @llvm.arm.neon.vst2lane.v4i32(i8*, <4 x i32>, <4 x i32>, i32, i32) nounwind +declare void @llvm.arm.neon.vst2lane.v4f32(i8*, <4 x float>, <4 x float>, i32, i32) nounwind define void @vst3lanei8(i8* %A, <8 x i8>* %B) nounwind { ;CHECK: vst3lanei8: ;CHECK: vst3.8 %tmp1 = load <8 x i8>* %B - call void @llvm.arm.neon.vst3lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1) + call void @llvm.arm.neon.vst3lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 1) ret void } @@ -84,7 +84,7 @@ ;CHECK: vst3.16 %tmp0 = bitcast i16* %A to i8* %tmp1 = load <4 x i16>* %B - call void @llvm.arm.neon.vst3lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1) + call void @llvm.arm.neon.vst3lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 1) ret void } @@ -93,7 +93,7 @@ ;CHECK: vst3.32 %tmp0 = bitcast i32* %A to i8* %tmp1 = load <2 x i32>* %B - call void @llvm.arm.neon.vst3lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1) + call void @llvm.arm.neon.vst3lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 1) ret void } @@ -102,7 +102,7 @@ ;CHECK: vst3.32 %tmp0 = bitcast float* %A to i8* %tmp1 = load <2 x float>* %B - call void @llvm.arm.neon.vst3lane.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, i32 1) + call void @llvm.arm.neon.vst3lane.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, i32 1, i32 1) ret void } @@ -111,7 +111,7 @@ ;CHECK: vst3.16 %tmp0 = bitcast i16* %A to i8* %tmp1 = load <8 x i16>* %B - call void @llvm.arm.neon.vst3lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 6) + call void @llvm.arm.neon.vst3lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 6, i32 1) ret void } @@ -120,7 +120,7 @@ ;CHECK: vst3.32 %tmp0 = bitcast i32* %A to i8* %tmp1 = load <4 x i32>* %B - call void @llvm.arm.neon.vst3lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 0) + call void @llvm.arm.neon.vst3lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 0, i32 1) ret void } @@ -129,25 +129,25 @@ ;CHECK: vst3.32 %tmp0 = bitcast float* %A to i8* %tmp1 = load <4 x float>* %B - call void @llvm.arm.neon.vst3lane.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1) + call void @llvm.arm.neon.vst3lane.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1, i32 1) ret void } -declare void @llvm.arm.neon.vst3lane.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, i32) nounwind -declare void @llvm.arm.neon.vst3lane.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, i32) nounwind -declare void @llvm.arm.neon.vst3lane.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, i32) nounwind -declare void @llvm.arm.neon.vst3lane.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, i32) nounwind +declare void @llvm.arm.neon.vst3lane.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, i32, i32) nounwind +declare void @llvm.arm.neon.vst3lane.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, i32, i32) nounwind +declare void @llvm.arm.neon.vst3lane.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, i32, i32) nounwind +declare void @llvm.arm.neon.vst3lane.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, i32, i32) nounwind -declare void @llvm.arm.neon.vst3lane.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, i32) nounwind -declare void @llvm.arm.neon.vst3lane.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, i32) nounwind -declare void @llvm.arm.neon.vst3lane.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, i32) nounwind +declare void @llvm.arm.neon.vst3lane.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, i32, i32) nounwind +declare void @llvm.arm.neon.vst3lane.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, i32, i32) nounwind +declare void @llvm.arm.neon.vst3lane.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, i32, i32) nounwind define void @vst4lanei8(i8* %A, <8 x i8>* %B) nounwind { ;CHECK: vst4lanei8: ;CHECK: vst4.8 %tmp1 = load <8 x i8>* %B - call void @llvm.arm.neon.vst4lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1) + call void @llvm.arm.neon.vst4lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 1) ret void } @@ -156,7 +156,7 @@ ;CHECK: vst4.16 %tmp0 = bitcast i16* %A to i8* %tmp1 = load <4 x i16>* %B - call void @llvm.arm.neon.vst4lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1) + call void @llvm.arm.neon.vst4lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 1) ret void } @@ -165,7 +165,7 @@ ;CHECK: vst4.32 %tmp0 = bitcast i32* %A to i8* %tmp1 = load <2 x i32>* %B - call void @llvm.arm.neon.vst4lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1) + call void @llvm.arm.neon.vst4lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 1) ret void } @@ -174,7 +174,7 @@ ;CHECK: vst4.32 %tmp0 = bitcast float* %A to i8* %tmp1 = load <2 x float>* %B - call void @llvm.arm.neon.vst4lane.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, i32 1) + call void @llvm.arm.neon.vst4lane.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, i32 1, i32 1) ret void } @@ -183,7 +183,7 @@ ;CHECK: vst4.16 %tmp0 = bitcast i16* %A to i8* %tmp1 = load <8 x i16>* %B - call void @llvm.arm.neon.vst4lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 7) + call void @llvm.arm.neon.vst4lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 7, i32 1) ret void } @@ -192,7 +192,7 @@ ;CHECK: vst4.32 %tmp0 = bitcast i32* %A to i8* %tmp1 = load <4 x i32>* %B - call void @llvm.arm.neon.vst4lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2) + call void @llvm.arm.neon.vst4lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2, i32 1) ret void } @@ -201,15 +201,15 @@ ;CHECK: vst4.32 %tmp0 = bitcast float* %A to i8* %tmp1 = load <4 x float>* %B - call void @llvm.arm.neon.vst4lane.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1) + call void @llvm.arm.neon.vst4lane.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1, i32 1) ret void } -declare void @llvm.arm.neon.vst4lane.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, i32) nounwind -declare void @llvm.arm.neon.vst4lane.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>, i32) nounwind -declare void @llvm.arm.neon.vst4lane.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32) nounwind -declare void @llvm.arm.neon.vst4lane.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, <2 x float>, i32) nounwind +declare void @llvm.arm.neon.vst4lane.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, i32, i32) nounwind +declare void @llvm.arm.neon.vst4lane.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>, i32, i32) nounwind +declare void @llvm.arm.neon.vst4lane.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32, i32) nounwind +declare void @llvm.arm.neon.vst4lane.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, <2 x float>, i32, i32) nounwind -declare void @llvm.arm.neon.vst4lane.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, i32) nounwind -declare void @llvm.arm.neon.vst4lane.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, i32) nounwind -declare void @llvm.arm.neon.vst4lane.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, <4 x float>, i32) nounwind +declare void @llvm.arm.neon.vst4lane.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, i32, i32) nounwind +declare void @llvm.arm.neon.vst4lane.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, i32, i32) nounwind +declare void @llvm.arm.neon.vst4lane.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, <4 x float>, i32, i32) nounwind Modified: llvm/trunk/test/CodeGen/Thumb2/crash.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/crash.ll?rev=112271&r1=112270&r2=112271&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/crash.ll (original) +++ llvm/trunk/test/CodeGen/Thumb2/crash.ll Fri Aug 27 12:13:24 2010 @@ -14,11 +14,11 @@ %6 = bitcast i32* %sp3 to <4 x i32>* ; <<4 x i32>*> [#uses=1] %7 = load <4 x i32>* %6, align 16 ; <<4 x i32>> [#uses=1] %8 = bitcast i32* %dp to i8* ; [#uses=1] - tail call void @llvm.arm.neon.vst4.v4i32(i8* %8, <4 x i32> %1, <4 x i32> %3, <4 x i32> %5, <4 x i32> %7) + tail call void @llvm.arm.neon.vst4.v4i32(i8* %8, <4 x i32> %1, <4 x i32> %3, <4 x i32> %5, <4 x i32> %7, i32 1) ret void } -declare void @llvm.arm.neon.vst4.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>) nounwind +declare void @llvm.arm.neon.vst4.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, i32) nounwind @sbuf = common global [16 x i32] zeroinitializer, align 16 ; <[16 x i32]*> [#uses=5] @dbuf = common global [16 x i32] zeroinitializer ; <[16 x i32]*> [#uses=2] @@ -44,6 +44,6 @@ %3 = load <4 x i32>* bitcast (i32* getelementptr inbounds ([16 x i32]* @sbuf, i32 0, i32 4) to <4 x i32>*), align 16 ; <<4 x i32>> [#uses=1] %4 = load <4 x i32>* bitcast (i32* getelementptr inbounds ([16 x i32]* @sbuf, i32 0, i32 8) to <4 x i32>*), align 16 ; <<4 x i32>> [#uses=1] %5 = load <4 x i32>* bitcast (i32* getelementptr inbounds ([16 x i32]* @sbuf, i32 0, i32 12) to <4 x i32>*), align 16 ; <<4 x i32>> [#uses=1] - tail call void @llvm.arm.neon.vst4.v4i32(i8* bitcast ([16 x i32]* @dbuf to i8*), <4 x i32> %2, <4 x i32> %3, <4 x i32> %4, <4 x i32> %5) nounwind + tail call void @llvm.arm.neon.vst4.v4i32(i8* bitcast ([16 x i32]* @dbuf to i8*), <4 x i32> %2, <4 x i32> %3, <4 x i32> %4, <4 x i32> %5, i32 1) nounwind ret i32 0 } Modified: llvm/trunk/test/CodeGen/Thumb2/machine-licm-vdup.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/machine-licm-vdup.ll?rev=112271&r1=112270&r2=112271&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/machine-licm-vdup.ll (original) +++ llvm/trunk/test/CodeGen/Thumb2/machine-licm-vdup.ll Fri Aug 27 12:13:24 2010 @@ -16,10 +16,10 @@ %indvar = phi i32 [ %indvar.next, %bb1 ], [ 0, %entry ] %tmp1 = shl i32 %indvar, 2 %gep1 = getelementptr i8* %ptr1, i32 %tmp1 - %tmp2 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* %gep1) + %tmp2 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* %gep1, i32 1) %tmp3 = call <4 x float> @llvm.arm.neon.vmaxs.v4f32(<4 x float> , <4 x float> %tmp2) %gep2 = getelementptr i8* %ptr2, i32 %tmp1 - call void @llvm.arm.neon.vst1.v4f32(i8* %gep2, <4 x float> %tmp3) + call void @llvm.arm.neon.vst1.v4f32(i8* %gep2, <4 x float> %tmp3, i32 1) %indvar.next = add i32 %indvar, 1 %cond = icmp eq i32 %indvar.next, 10 br i1 %cond, label %bb2, label %bb1 @@ -31,8 +31,8 @@ ; CHECK-NOT: LCPI1_0: ; CHECK: .subsections_via_symbols -declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*) nounwind readonly +declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*, i32) nounwind readonly -declare void @llvm.arm.neon.vst1.v4f32(i8*, <4 x float>) nounwind +declare void @llvm.arm.neon.vst1.v4f32(i8*, <4 x float>, i32) nounwind declare <4 x float> @llvm.arm.neon.vmaxs.v4f32(<4 x float>, <4 x float>) nounwind readnone Modified: llvm/trunk/test/CodeGen/Thumb2/machine-licm.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/machine-licm.ll?rev=112271&r1=112270&r2=112271&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/machine-licm.ll (original) +++ llvm/trunk/test/CodeGen/Thumb2/machine-licm.ll Fri Aug 27 12:13:24 2010 @@ -64,10 +64,10 @@ %indvar = phi i32 [ %indvar.next, %bb1 ], [ 0, %entry ] %tmp1 = shl i32 %indvar, 2 %gep1 = getelementptr i8* %ptr1, i32 %tmp1 - %tmp2 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* %gep1) + %tmp2 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* %gep1, i32 1) %tmp3 = call <4 x float> @llvm.arm.neon.vmaxs.v4f32(<4 x float> , <4 x float> %tmp2) %gep2 = getelementptr i8* %ptr2, i32 %tmp1 - call void @llvm.arm.neon.vst1.v4f32(i8* %gep2, <4 x float> %tmp3) + call void @llvm.arm.neon.vst1.v4f32(i8* %gep2, <4 x float> %tmp3, i32 1) %indvar.next = add i32 %indvar, 1 %cond = icmp eq i32 %indvar.next, 10 br i1 %cond, label %bb2, label %bb1 @@ -79,8 +79,8 @@ ; CHECK: LCPI1_0: ; CHECK: .section -declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*) nounwind readonly +declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*, i32) nounwind readonly -declare void @llvm.arm.neon.vst1.v4f32(i8*, <4 x float>) nounwind +declare void @llvm.arm.neon.vst1.v4f32(i8*, <4 x float>, i32) nounwind declare <4 x float> @llvm.arm.neon.vmaxs.v4f32(<4 x float>, <4 x float>) nounwind readnone Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-spill-q.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-spill-q.ll?rev=112271&r1=112270&r2=112271&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/Thumb2/thumb2-spill-q.ll (original) +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-spill-q.ll Fri Aug 27 12:13:24 2010 @@ -7,7 +7,7 @@ %quux = type { i32 (...)**, %baz*, i32 } %quuz = type { %quux, i32, %bar, [128 x i8], [16 x %foo], %foo, %foo, %foo } -declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*) nounwind readonly +declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*, i32) nounwind readonly define void @aaa(%quuz* %this, i8* %block) { ; CHECK: aaa: @@ -15,11 +15,11 @@ ; CHECK: vst1.64 {{.*}}[{{.*}}, :128] ; CHECK: vld1.64 {{.*}}[{{.*}}, :128] entry: - %0 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef) nounwind ; <<4 x float>> [#uses=1] + %0 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind ; <<4 x float>> [#uses=1] store float 6.300000e+01, float* undef, align 4 - %1 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef) nounwind ; <<4 x float>> [#uses=1] + %1 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind ; <<4 x float>> [#uses=1] store float 0.000000e+00, float* undef, align 4 - %2 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef) nounwind ; <<4 x float>> [#uses=1] + %2 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind ; <<4 x float>> [#uses=1] %val173 = load <4 x float>* undef ; <<4 x float>> [#uses=1] br label %bb4 From bob.wilson at apple.com Fri Aug 27 12:15:02 2010 From: bob.wilson at apple.com (Bob Wilson) Date: Fri, 27 Aug 2010 17:15:02 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r112273 - in /llvm-gcc-4.2/trunk/gcc: config/arm/llvm-arm.cpp llvm-convert.cpp llvm-internal.h Message-ID: <20100827171502.730202A6C12C@llvm.org> Author: bwilson Date: Fri Aug 27 12:15:02 2010 New Revision: 112273 URL: http://llvm.org/viewvc/llvm-project?rev=112273&view=rev Log: Add the new alignment operands for calls to NEON load/store intrinsics. Modified: llvm-gcc-4.2/trunk/gcc/config/arm/llvm-arm.cpp llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp llvm-gcc-4.2/trunk/gcc/llvm-internal.h Modified: llvm-gcc-4.2/trunk/gcc/config/arm/llvm-arm.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/arm/llvm-arm.cpp?rev=112273&r1=112272&r2=112273&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/config/arm/llvm-arm.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/config/arm/llvm-arm.cpp Fri Aug 27 12:15:02 2010 @@ -2010,7 +2010,9 @@ intID = Intrinsic::arm_neon_vld1; intFn = Intrinsic::getDeclaration(TheModule, intID, &ResultType, 1); Type *VPTy = PointerType::getUnqual(Type::getInt8Ty(Context)); - Result = Builder.CreateCall(intFn, BitCastToType(Ops[0], VPTy)); + unsigned Align = getPointerAlignment(TREE_VALUE(TREE_OPERAND(exp, 1))); + Result = Builder.CreateCall2(intFn, BitCastToType(Ops[0], VPTy), + getInt32Const(Align)); break; } @@ -2028,7 +2030,9 @@ } intFn = Intrinsic::getDeclaration(TheModule, intID, &VTy, 1); Type *VPTy = PointerType::getUnqual(Type::getInt8Ty(Context)); - Result = Builder.CreateCall(intFn, BitCastToType(Ops[0], VPTy)); + unsigned Align = getPointerAlignment(TREE_VALUE(TREE_OPERAND(exp, 1))); + Result = Builder.CreateCall2(intFn, BitCastToType(Ops[0], VPTy), + getInt32Const(Align)); Builder.CreateStore(Result, DestLoc->Ptr); Result = 0; break; @@ -2074,6 +2078,8 @@ Args.push_back(Builder.CreateExtractValue(Ops[1], n)); } Args.push_back(Ops[2]); // lane number + unsigned Align = getPointerAlignment(TREE_VALUE(TREE_OPERAND(exp, 1))); + Args.push_back(getInt32Const(Align)); Result = Builder.CreateCall(intFn, Args.begin(), Args.end()); Builder.CreateStore(Result, DestLoc->Ptr); Result = 0; @@ -2103,7 +2109,9 @@ } intFn = Intrinsic::getDeclaration(TheModule, intID, intOpTypes, 1); Type *VPTy = PointerType::getUnqual(Type::getInt8Ty(Context)); - Result = Builder.CreateCall(intFn, BitCastToType(Ops[0], VPTy)); + unsigned Align = getPointerAlignment(TREE_VALUE(TREE_OPERAND(exp, 1))); + Result = Builder.CreateCall2(intFn, BitCastToType(Ops[0], VPTy), + getInt32Const(Align)); Builder.CreateStore(Result, DestLoc->Ptr); Result = 0; break; @@ -2131,6 +2139,8 @@ Args.push_back(UndefValue::get(VTy)); } Args.push_back(getInt32Const(0)); + unsigned Align = getPointerAlignment(TREE_VALUE(TREE_OPERAND(exp, 1))); + Args.push_back(getInt32Const(Align)); Result = Builder.CreateCall(intFn, Args.begin(), Args.end()); // Now splat the values in lane 0 to the rest of the elements. @@ -2150,7 +2160,9 @@ intID = Intrinsic::arm_neon_vst1; intFn = Intrinsic::getDeclaration(TheModule, intID, &VTy, 1); Type *VPTy = PointerType::getUnqual(Type::getInt8Ty(Context)); - Builder.CreateCall2(intFn, BitCastToType(Ops[0], VPTy), Ops[1]); + unsigned Align = getPointerAlignment(TREE_VALUE(TREE_OPERAND(exp, 1))); + Builder.CreateCall3(intFn, BitCastToType(Ops[0], VPTy), Ops[1], + getInt32Const(Align)); Result = 0; break; } @@ -2181,6 +2193,8 @@ for (unsigned n = 0; n != NumVecs; ++n) { Args.push_back(Builder.CreateExtractValue(Ops[1], n)); } + unsigned Align = getPointerAlignment(TREE_VALUE(TREE_OPERAND(exp, 1))); + Args.push_back(getInt32Const(Align)); Builder.CreateCall(intFn, Args.begin(), Args.end()); Result = 0; break; @@ -2226,6 +2240,8 @@ Args.push_back(Builder.CreateExtractValue(Ops[1], n)); } Args.push_back(Ops[2]); // lane number + unsigned Align = getPointerAlignment(TREE_VALUE(TREE_OPERAND(exp, 1))); + Args.push_back(getInt32Const(Align)); Builder.CreateCall(intFn, Args.begin(), Args.end()); Result = 0; break; Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=112273&r1=112272&r2=112273&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Fri Aug 27 12:15:02 2010 @@ -140,7 +140,7 @@ /// getPointerAlignment - Return the alignment in bytes of exp, a pointer valued /// expression, or 1 if the alignment is not known. -static unsigned int getPointerAlignment(tree exp) { +unsigned int getPointerAlignment(tree exp) { assert(POINTER_TYPE_P (TREE_TYPE (exp)) && "Expected a pointer type!"); unsigned int align = get_pointer_alignment(exp, BIGGEST_ALIGNMENT) / 8; return align ? align : 1; Modified: llvm-gcc-4.2/trunk/gcc/llvm-internal.h URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-internal.h?rev=112273&r1=112272&r2=112273&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/llvm-internal.h (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-internal.h Fri Aug 27 12:15:02 2010 @@ -190,6 +190,10 @@ /// overflowed constants. These conditions can be checked by calling isInt64. uint64_t getInt64(tree_node *t, bool Unsigned); +/// getPointerAlignment - Return the alignment in bytes of exp, a pointer valued +/// expression, or 1 if the alignment is not known. +unsigned int getPointerAlignment(tree_node *exp); + /// isPassedByInvisibleReference - Return true if the specified type should be /// passed by 'invisible reference'. In other words, instead of passing the /// thing by value, pass the address of a temporary. From clattner at apple.com Fri Aug 27 12:21:26 2010 From: clattner at apple.com (Chris Lattner) Date: Fri, 27 Aug 2010 10:21:26 -0700 Subject: [llvm-commits] [llvm] r112270 - in /llvm/trunk: lib/Analysis/LazyValueInfo.cpp lib/Transforms/Scalar/JumpThreading.cpp test/Transforms/JumpThreading/basic.ll test/Transforms/JumpThreading/lvi-load.ll In-Reply-To: <20100827171230.148632A6C12C@llvm.org> References: <20100827171230.148632A6C12C@llvm.org> Message-ID: <960526EB-8CC7-478A-B968-359C95FCC4EC@apple.com> On Aug 27, 2010, at 10:12 AM, Owen Anderson wrote: > Author: resistor > Date: Fri Aug 27 12:12:29 2010 > New Revision: 112270 > > URL: http://llvm.org/viewvc/llvm-project?rev=112270&view=rev > Log: > Use LVI to eliminate conditional branches where we've tested a related condition previously. Update tests for this change. > This fixes PR5652. Testcase? I don't think this fixes PR5652, which isn't about deleting a dead condition, it is about *changing* a dominating condition to make one dead. -Chris From resistor at mac.com Fri Aug 27 12:38:09 2010 From: resistor at mac.com (Owen Anderson) Date: Fri, 27 Aug 2010 10:38:09 -0700 Subject: [llvm-commits] [llvm] r112270 - in /llvm/trunk: lib/Analysis/LazyValueInfo.cpp lib/Transforms/Scalar/JumpThreading.cpp test/Transforms/JumpThreading/basic.ll test/Transforms/JumpThreading/lvi-load.ll In-Reply-To: <960526EB-8CC7-478A-B968-359C95FCC4EC@apple.com> References: <20100827171230.148632A6C12C@llvm.org> <960526EB-8CC7-478A-B968-359C95FCC4EC@apple.com> Message-ID: <9ACF30ED-EC71-4FB9-A99C-1CC881E0BBD3@mac.com> On Aug 27, 2010, at 10:21 AM, Chris Lattner wrote: > Testcase? I don't think this fixes PR5652, which isn't about deleting a dead condition, it is about *changing* a dominating condition to make one dead. The test for this is folded into the changes I made to basic.ll, though I can also add an explicit one. As to PR5652, from the commentary: The reduced issue is basically: if (x < 10) if (c) if (x < 21) this can be optimized to: if (x < 21) if (c) This patch does handle that case, and the testcase in the OP (modulo the the comparisons being backwards as the reporter acknowledged). --Owen From sabre at nondot.org Fri Aug 27 13:31:05 2010 From: sabre at nondot.org (Chris Lattner) Date: Fri, 27 Aug 2010 18:31:05 -0000 Subject: [llvm-commits] [llvm] r112278 - in /llvm/trunk: lib/Transforms/InstCombine/InstCombineCasts.cpp test/Transforms/InstCombine/trunc.ll Message-ID: <20100827183105.E40852A6C12C@llvm.org> Author: lattner Date: Fri Aug 27 13:31:05 2010 New Revision: 112278 URL: http://llvm.org/viewvc/llvm-project?rev=112278&view=rev Log: Add an instcombine to clean up a common pattern produced by the SRoA "promote to large integer" code, eliminating some type conversions like this: %94 = zext i16 %93 to i32 ; [#uses=2] %96 = lshr i32 %94, 8 ; [#uses=1] %101 = trunc i32 %96 to i8 ; [#uses=1] This also unblocks other xforms from happening, now clang is able to compile: struct S { float A, B, C, D; }; float foo(struct S A) { return A.A + A.B+A.C+A.D; } into: _foo: ## @foo ## BB#0: ## %entry pshufd $1, %xmm0, %xmm2 addss %xmm0, %xmm2 movdqa %xmm1, %xmm3 addss %xmm2, %xmm3 pshufd $1, %xmm1, %xmm0 addss %xmm3, %xmm0 ret on x86-64, instead of: _foo: ## @foo ## BB#0: ## %entry movd %xmm0, %rax shrq $32, %rax movd %eax, %xmm2 addss %xmm0, %xmm2 movapd %xmm1, %xmm3 addss %xmm2, %xmm3 movd %xmm1, %rax shrq $32, %rax movd %eax, %xmm0 addss %xmm3, %xmm0 ret This seems pretty close to optimal to me, at least without using horizontal adds. This also triggers in lots of other code, including SPEC. Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp llvm/trunk/test/Transforms/InstCombine/trunc.ll Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp?rev=112278&r1=112277&r2=112278&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp Fri Aug 27 13:31:05 2010 @@ -454,6 +454,29 @@ Value *Zero = Constant::getNullValue(Src->getType()); return new ICmpInst(ICmpInst::ICMP_NE, Src, Zero); } + + // Transform trunc(lshr (zext A), Cst) to eliminate one type conversion. + Value *A = 0; ConstantInt *Cst = 0; + if (match(Src, m_LShr(m_ZExt(m_Value(A)), m_ConstantInt(Cst))) && + Src->hasOneUse()) { + // We have three types to worry about here, the type of A, the source of + // the truncate (MidSize), and the destination of the truncate. We know that + // ASize < MidSize and MidSize > ResultSize, but don't know the relation + // between ASize and ResultSize. + unsigned ASize = A->getType()->getPrimitiveSizeInBits(); + + // If the shift amount is larger than the size of A, then the result is + // known to be zero because all the input bits got shifted out. + if (Cst->getZExtValue() >= ASize) + return ReplaceInstUsesWith(CI, Constant::getNullValue(CI.getType())); + + // Since we're doing an lshr and a zero extend, and know that the shift + // amount is smaller than ASize, it is always safe to do the shift in A's + // type, then zero extend or truncate to the result. + Value *Shift = Builder->CreateLShr(A, Cst->getZExtValue()); + Shift->takeName(Src); + return CastInst::CreateIntegerCast(Shift, CI.getType(), false); + } return 0; } Modified: llvm/trunk/test/Transforms/InstCombine/trunc.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/trunc.ll?rev=112278&r1=112277&r2=112278&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/trunc.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/trunc.ll Fri Aug 27 13:31:05 2010 @@ -48,3 +48,35 @@ ; CHECK: %d = xor i64 {{.*}}, 8 ; CHECK: ret i64 %d } + +define i32 @test5(i32 %A) { + %B = zext i32 %A to i128 + %C = lshr i128 %B, 16 + %D = trunc i128 %C to i32 + ret i32 %D +; CHECK: @test5 +; CHECK: %C = lshr i32 %A, 16 +; CHECK: ret i32 %C +} + +define i32 @test6(i64 %A) { + %B = zext i64 %A to i128 + %C = lshr i128 %B, 32 + %D = trunc i128 %C to i32 + ret i32 %D +; CHECK: @test6 +; CHECK: %C = lshr i64 %A, 32 +; CHECK: %D = trunc i64 %C to i32 +; CHECK: ret i32 %D +} + +define i92 @test7(i64 %A) { + %B = zext i64 %A to i128 + %C = lshr i128 %B, 32 + %D = trunc i128 %C to i92 + ret i92 %D +; CHECK: @test7 +; CHECK: %C = lshr i64 %A, 32 +; CHECK: %D = zext i64 %C to i92 +; CHECK: ret i92 %D +} \ No newline at end of file From grosbach at apple.com Fri Aug 27 13:37:05 2010 From: grosbach at apple.com (Jim Grosbach) Date: Fri, 27 Aug 2010 18:37:05 -0000 Subject: [llvm-commits] [llvm-gcc-4.2] r112279 - in /llvm-gcc-4.2/trunk/gcc/objc: ChangeLog.apple objc-act.c Message-ID: <20100827183706.199BA2A6C12C@llvm.org> Author: grosbach Date: Fri Aug 27 13:37:05 2010 New Revision: 112279 URL: http://llvm.org/viewvc/llvm-project?rev=112279&view=rev Log: 2010-08-26 Fariborz Jahanian Radar 8351204 * objc-act.c (objc_resolve_build_property_setter_name): Issue error if receiver type cannot be resolved to a known class type. * objc.dg/property-receiver-id-type.m: New Modified: llvm-gcc-4.2/trunk/gcc/objc/ChangeLog.apple llvm-gcc-4.2/trunk/gcc/objc/objc-act.c Modified: llvm-gcc-4.2/trunk/gcc/objc/ChangeLog.apple URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/objc/ChangeLog.apple?rev=112279&r1=112278&r2=112279&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/objc/ChangeLog.apple (original) +++ llvm-gcc-4.2/trunk/gcc/objc/ChangeLog.apple Fri Aug 27 13:37:05 2010 @@ -1,3 +1,10 @@ +2010-08-26 Fariborz Jahanian + + Radar 8351204 + * objc-act.c (objc_resolve_build_property_setter_name): Issue error + if receiver type cannot be resolved to a known class type. + * objc.dg/property-receiver-id-type.m: New + 2010-07-10 Fariborz Jahanian Radar 8290584 Modified: llvm-gcc-4.2/trunk/gcc/objc/objc-act.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/objc/objc-act.c?rev=112279&r1=112278&r2=112279&view=diff ============================================================================== --- llvm-gcc-4.2/trunk/gcc/objc/objc-act.c (original) +++ llvm-gcc-4.2/trunk/gcc/objc/objc-act.c Fri Aug 27 13:37:05 2010 @@ -1935,6 +1935,14 @@ && CLASS_SUPER_NAME (implementation_template)) class = lookup_interface (CLASS_SUPER_NAME (implementation_template)); } + /* APPLE LOCAL begin radar 8351204 */ + if (!class) { + error ("expression is not assignable - type of receiver is unknown"); + /* recover */ + return objc_build_property_setter_name (property_ident, true); + } + /* APPLE LOCAL end radar 8351204 */ + /* APPLE LOCAL begin radar 8290584 */ else { /* receiver could be of type id find property in From sabre at nondot.org Fri Aug 27 13:49:08 2010 From: sabre at nondot.org (Chris Lattner) Date: Fri, 27 Aug 2010 18:49:08 -0000 Subject: [llvm-commits] [llvm] r112280 - /llvm/trunk/test/CodeGen/X86/vec_cast.ll Message-ID: <20100827184908.CE15B2A6C12C@llvm.org> Author: lattner Date: Fri Aug 27 13:49:08 2010 New Revision: 112280 URL: http://llvm.org/viewvc/llvm-project?rev=112280&view=rev Log: get this test passing on linux builders. Modified: llvm/trunk/test/CodeGen/X86/vec_cast.ll Modified: llvm/trunk/test/CodeGen/X86/vec_cast.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_cast.ll?rev=112280&r1=112279&r2=112280&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/vec_cast.ll (original) +++ llvm/trunk/test/CodeGen/X86/vec_cast.ll Fri Aug 27 13:49:08 2010 @@ -7,10 +7,10 @@ ret <8 x i32> %c } -define <3 x i32> @b(<3 x i16> %a) nounwind { - %c = sext <3 x i16> %a to <3 x i32> - ret <3 x i32> %c -} +;define <3 x i32> @b(<3 x i16> %a) nounwind { +; %c = sext <3 x i16> %a to <3 x i32> +; ret <3 x i32> %c +;} define <1 x i32> @c(<1 x i16> %a) nounwind { %c = sext <1 x i16> %a to <1 x i32> @@ -22,10 +22,10 @@ ret <8 x i32> %c } -define <3 x i32> @e(<3 x i16> %a) nounwind { - %c = zext <3 x i16> %a to <3 x i32> - ret <3 x i32> %c -} +;define <3 x i32> @e(<3 x i16> %a) nounwind { +; %c = zext <3 x i16> %a to <3 x i32> +; ret <3 x i32> %c +;} define <1 x i32> @f(<1 x i16> %a) nounwind { %c = zext <1 x i16> %a to <1 x i32> From gohman at apple.com Fri Aug 27 13:55:03 2010 From: gohman at apple.com (Dan Gohman) Date: Fri, 27 Aug 2010 18:55:03 -0000 Subject: [llvm-commits] [llvm] r112281 - in /llvm/trunk: include/llvm/Analysis/ScalarEvolution.h lib/Analysis/ScalarEvolution.cpp Message-ID: <20100827185503.F28CF2A6C12C@llvm.org> Author: djg Date: Fri Aug 27 13:55:03 2010 New Revision: 112281 URL: http://llvm.org/viewvc/llvm-project?rev=112281&view=rev Log: Switch ScalarEvolution's main Value*->SCEV* map from std::map to DenseMap. Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolution.h llvm/trunk/lib/Analysis/ScalarEvolution.cpp Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolution.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ScalarEvolution.h?rev=112281&r1=112280&r2=112281&view=diff ============================================================================== --- llvm/trunk/include/llvm/Analysis/ScalarEvolution.h (original) +++ llvm/trunk/include/llvm/Analysis/ScalarEvolution.h Fri Aug 27 13:55:03 2010 @@ -214,9 +214,14 @@ /// counts and things. SCEVCouldNotCompute CouldNotCompute; - /// Scalars - This is a cache of the scalars we have analyzed so far. + /// ValueExprMapType - The typedef for ValueExprMap. /// - std::map Scalars; + typedef DenseMap > + ValueExprMapType; + + /// ValueExprMap - This is a cache of the values we have analyzed so far. + /// + ValueExprMapType ValueExprMap; /// BackedgeTakenInfo - Information about the backedge-taken count /// of a loop. This currently includes an exact count and a maximum count. @@ -281,7 +286,7 @@ /// ForgetSymbolicValue - This looks up computed SCEV values for all /// instructions that depend on the given instruction and removes them from - /// the Scalars map if they reference SymName. This is used during PHI + /// the ValueExprMap map if they reference SymName. This is used during PHI /// resolution. void ForgetSymbolicName(Instruction *I, const SCEV *SymName); Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=112281&r1=112280&r2=112281&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original) +++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Fri Aug 27 13:55:03 2010 @@ -2499,15 +2499,15 @@ const SCEV *ScalarEvolution::getSCEV(Value *V) { assert(isSCEVable(V->getType()) && "Value is not SCEVable!"); - std::map::const_iterator I = Scalars.find(V); - if (I != Scalars.end()) return I->second; + ValueExprMapType::const_iterator I = ValueExprMap.find(V); + if (I != ValueExprMap.end()) return I->second; const SCEV *S = createSCEV(V); // The process of creating a SCEV for V may have caused other SCEVs // to have been created, so it's necessary to insert the new entry // from scratch, rather than trying to remember the insert position // above. - Scalars.insert(std::make_pair(SCEVCallbackVH(V, this), S)); + ValueExprMap.insert(std::make_pair(SCEVCallbackVH(V, this), S)); return S; } @@ -2692,7 +2692,7 @@ /// ForgetSymbolicValue - This looks up computed SCEV values for all /// instructions that depend on the given instruction and removes them from -/// the Scalars map if they reference SymName. This is used during PHI +/// the ValueExprMapType map if they reference SymName. This is used during PHI /// resolution. void ScalarEvolution::ForgetSymbolicName(Instruction *PN, const SCEV *SymName) { @@ -2705,9 +2705,9 @@ Instruction *I = Worklist.pop_back_val(); if (!Visited.insert(I)) continue; - std::map::iterator It = - Scalars.find(static_cast(I)); - if (It != Scalars.end()) { + ValueExprMapType::iterator It = + ValueExprMap.find(static_cast(I)); + if (It != ValueExprMap.end()) { // Short-circuit the def-use traversal if the symbolic name // ceases to appear in expressions. if (It->second != SymName && !It->second->hasOperand(SymName)) @@ -2724,7 +2724,7 @@ !isa(It->second) || (I != PN && It->second == SymName)) { ValuesAtScopes.erase(It->second); - Scalars.erase(It); + ValueExprMap.erase(It); } } @@ -2761,9 +2761,9 @@ if (BEValueV && StartValueV) { // While we are analyzing this PHI node, handle its value symbolically. const SCEV *SymbolicName = getUnknown(PN); - assert(Scalars.find(PN) == Scalars.end() && + assert(ValueExprMap.find(PN) == ValueExprMap.end() && "PHI node already processed?"); - Scalars.insert(std::make_pair(SCEVCallbackVH(PN, this), SymbolicName)); + ValueExprMap.insert(std::make_pair(SCEVCallbackVH(PN, this), SymbolicName)); // Using this symbolic name for the PHI, analyze the value coming around // the back-edge. @@ -2824,7 +2824,7 @@ // to be symbolic. We now need to go back and purge all of the // entries for the scalars that use the symbolic expression. ForgetSymbolicName(PN, SymbolicName); - Scalars[SCEVCallbackVH(PN, this)] = PHISCEV; + ValueExprMap[SCEVCallbackVH(PN, this)] = PHISCEV; return PHISCEV; } } @@ -2849,7 +2849,7 @@ // to be symbolic. We now need to go back and purge all of the // entries for the scalars that use the symbolic expression. ForgetSymbolicName(PN, SymbolicName); - Scalars[SCEVCallbackVH(PN, this)] = PHISCEV; + ValueExprMap[SCEVCallbackVH(PN, this)] = PHISCEV; return PHISCEV; } } @@ -3721,9 +3721,9 @@ Instruction *I = Worklist.pop_back_val(); if (!Visited.insert(I)) continue; - std::map::iterator It = - Scalars.find(static_cast(I)); - if (It != Scalars.end()) { + ValueExprMapType::iterator It = + ValueExprMap.find(static_cast(I)); + if (It != ValueExprMap.end()) { // SCEVUnknown for a PHI either means that it has an unrecognized // structure, or it's a PHI that's in the progress of being computed // by createNodeForPHI. In the former case, additional loop trip @@ -3732,7 +3732,7 @@ // own when it gets to that point. if (!isa(I) || !isa(It->second)) { ValuesAtScopes.erase(It->second); - Scalars.erase(It); + ValueExprMap.erase(It); } if (PHINode *PN = dyn_cast(I)) ConstantEvolutionLoopExitValue.erase(PN); @@ -3761,11 +3761,10 @@ Instruction *I = Worklist.pop_back_val(); if (!Visited.insert(I)) continue; - std::map::iterator It = - Scalars.find(static_cast(I)); - if (It != Scalars.end()) { + ValueExprMapType::iterator It = ValueExprMap.find(static_cast(I)); + if (It != ValueExprMap.end()) { ValuesAtScopes.erase(It->second); - Scalars.erase(It); + ValueExprMap.erase(It); if (PHINode *PN = dyn_cast(I)) ConstantEvolutionLoopExitValue.erase(PN); } @@ -3790,11 +3789,10 @@ I = Worklist.pop_back_val(); if (!Visited.insert(I)) continue; - std::map::iterator It = - Scalars.find(static_cast(I)); - if (It != Scalars.end()) { + ValueExprMapType::iterator It = ValueExprMap.find(static_cast(I)); + if (It != ValueExprMap.end()) { ValuesAtScopes.erase(It->second); - Scalars.erase(It); + ValueExprMap.erase(It); if (PHINode *PN = dyn_cast(I)) ConstantEvolutionLoopExitValue.erase(PN); } @@ -5780,7 +5778,7 @@ assert(SE && "SCEVCallbackVH called with a null ScalarEvolution!"); if (PHINode *PN = dyn_cast(getValPtr())) SE->ConstantEvolutionLoopExitValue.erase(PN); - SE->Scalars.erase(getValPtr()); + SE->ValueExprMap.erase(getValPtr()); // this now dangles! } @@ -5806,7 +5804,7 @@ continue; if (PHINode *PN = dyn_cast(U)) SE->ConstantEvolutionLoopExitValue.erase(PN); - SE->Scalars.erase(U); + SE->ValueExprMap.erase(U); for (Value::use_iterator UI = U->use_begin(), UE = U->use_end(); UI != UE; ++UI) Worklist.push_back(*UI); @@ -5814,7 +5812,7 @@ // Delete the Old value. if (PHINode *PN = dyn_cast(Old)) SE->ConstantEvolutionLoopExitValue.erase(PN); - SE->Scalars.erase(Old); + SE->ValueExprMap.erase(Old); // this now dangles! } @@ -5844,7 +5842,7 @@ U->~SCEVUnknown(); FirstUnknown = 0; - Scalars.clear(); + ValueExprMap.clear(); BackedgeTakenCounts.clear(); ConstantEvolutionLoopExitValue.clear(); ValuesAtScopes.clear(); From baldrick at free.fr Fri Aug 27 14:04:17 2010 From: baldrick at free.fr (Duncan Sands) Date: Fri, 27 Aug 2010 21:04:17 +0200 Subject: [llvm-commits] [llvm] r112270 - in /llvm/trunk: lib/Analysis/LazyValueInfo.cpp lib/Transforms/Scalar/JumpThreading.cpp test/Transforms/JumpThreading/basic.ll test/Transforms/JumpThreading/lvi-load.ll In-Reply-To: <20100827171230.148632A6C12C@llvm.org> References: <20100827171230.148632A6C12C@llvm.org> Message-ID: <4C780C31.5000503@free.fr> Hi Owen, > --- llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp (original) > +++ llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp Fri Aug 27 12:12:29 2010 > @@ -669,6 +669,45 @@ > } > } > } > + > + // For a comparison where the LHS is outside this block, it's possible > + // that we've branch on it before. Used LVI to see if we can simplify we've branch on it -> we've branched on it > + // If we can determine the branch direction statically, converted > + // the conditional branch to an unconditional one. converted the conditional branch -> convert the conditional branch Ciao, Duncan. From sabre at nondot.org Fri Aug 27 15:32:06 2010 From: sabre at nondot.org (Chris Lattner) Date: Fri, 27 Aug 2010 20:32:06 -0000 Subject: [llvm-commits] [llvm] r112285 - in /llvm/trunk: lib/Transforms/InstCombine/InstCombineCasts.cpp test/Transforms/InstCombine/trunc.ll Message-ID: <20100827203206.8CE912A6C12C@llvm.org> Author: lattner Date: Fri Aug 27 15:32:06 2010 New Revision: 112285 URL: http://llvm.org/viewvc/llvm-project?rev=112285&view=rev Log: teach the truncation optimization that an entire chain of computation can be truncated if it is fed by a sext/zext that doesn't have to be exactly equal to the truncation result type. Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp llvm/trunk/test/Transforms/InstCombine/trunc.ll Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp?rev=112285&r1=112284&r2=112285&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp Fri Aug 27 15:32:06 2010 @@ -396,6 +396,11 @@ case Instruction::Trunc: // trunc(trunc(x)) -> trunc(x) return true; + case Instruction::ZExt: + case Instruction::SExt: + // trunc(ext(x)) -> ext(x) if the source type is smaller than the new dest + // trunc(ext(x)) -> trunc(x) if the source type is larger than the new dest + return true; case Instruction::Select: { SelectInst *SI = cast(I); return CanEvaluateTruncated(SI->getTrueValue(), Ty) && Modified: llvm/trunk/test/Transforms/InstCombine/trunc.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/trunc.ll?rev=112285&r1=112284&r2=112285&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/trunc.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/trunc.ll Fri Aug 27 15:32:06 2010 @@ -1,4 +1,5 @@ ; RUN: opt < %s -instcombine -S | FileCheck %s +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" ; Instcombine should be able to eliminate all of these ext casts. @@ -76,7 +77,23 @@ %D = trunc i128 %C to i92 ret i92 %D ; CHECK: @test7 -; CHECK: %C = lshr i64 %A, 32 -; CHECK: %D = zext i64 %C to i92 -; CHECK: ret i92 %D -} \ No newline at end of file +; CHECK: %B = zext i64 %A to i92 +; CHECK: %C = lshr i92 %B, 32 +; CHECK: ret i92 %C +} + +define i64 @test8(i32 %A, i32 %B) { + %tmp38 = zext i32 %A to i128 + %tmp32 = zext i32 %B to i128 + %tmp33 = shl i128 %tmp32, 32 + %ins35 = or i128 %tmp33, %tmp38 + %tmp42 = trunc i128 %ins35 to i64 + ret i64 %tmp42 +; CHECK: @test8 +; CHECK: %tmp38 = zext i32 %A to i64 +; CHECK: %tmp32 = zext i32 %B to i64 +; CHECK: %tmp33 = shl i64 %tmp32, 32 +; CHECK: %ins35 = or i64 %tmp33, %tmp38 +; CHECK: ret i64 %ins35 +} + From resistor at mac.com Fri Aug 27 15:32:56 2010 From: resistor at mac.com (Owen Anderson) Date: Fri, 27 Aug 2010 20:32:56 -0000 Subject: [llvm-commits] [llvm] r112286 - /llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp Message-ID: <20100827203256.6BF452A6C12C@llvm.org> Author: resistor Date: Fri Aug 27 15:32:56 2010 New Revision: 112286 URL: http://llvm.org/viewvc/llvm-project?rev=112286&view=rev Log: Fix typos in comments. Modified: llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp Modified: llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp?rev=112286&r1=112285&r2=112286&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp Fri Aug 27 15:32:56 2010 @@ -671,7 +671,7 @@ } // For a comparison where the LHS is outside this block, it's possible - // that we've branch on it before. Used LVI to see if we can simplify + // that we've branched on it before. Used LVI to see if we can simplify // the branch based on that. BranchInst *CondBr = dyn_cast(BB->getTerminator()); Constant *CondConst = dyn_cast(CondCmp->getOperand(1)); @@ -694,7 +694,7 @@ ++Falses; } - // If we can determine the branch direction statically, converted + // If we can determine the branch direction statically, convert // the conditional branch to an unconditional one. if (Trues && Trues == predcount) { RemovePredecessorAndSimplify(CondBr->getSuccessor(1), BB, TD); From isanbard at gmail.com Fri Aug 27 15:39:09 2010 From: isanbard at gmail.com (Bill Wendling) Date: Fri, 27 Aug 2010 20:39:09 -0000 Subject: [llvm-commits] [llvm] r112287 - /llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp Message-ID: <20100827203909.801332A6C12C@llvm.org> Author: void Date: Fri Aug 27 15:39:09 2010 New Revision: 112287 URL: http://llvm.org/viewvc/llvm-project?rev=112287&view=rev Log: Remove now unneeded command line flag that enables 'optimize compares.' Modified: llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp Modified: llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp?rev=112287&r1=112286&r2=112287&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp (original) +++ llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp Fri Aug 27 15:39:09 2010 @@ -50,12 +50,7 @@ Aggressive("aggressive-ext-opt", cl::Hidden, cl::desc("Aggressive extension optimization")); -STATISTIC(NumReuse, "Number of extension results reused"); - -// Optimize Comparisons -static cl::opt -EnableOptCmps("enable-optimize-cmps", cl::init(true), cl::Hidden); - +STATISTIC(NumReuse, "Number of extension results reused"); STATISTIC(NumEliminated, "Number of compares eliminated"); namespace { @@ -238,8 +233,6 @@ /// the flag from the previous instruction. bool PeepholeOptimizer::OptimizeCmpInstr(MachineInstr *MI, MachineBasicBlock *MBB) { - if (!EnableOptCmps) return false; - // If this instruction is a comparison against zero and isn't comparing a // physical register, we can try to optimize it. unsigned SrcReg; From sabre at nondot.org Fri Aug 27 15:42:11 2010 From: sabre at nondot.org (Chris Lattner) Date: Fri, 27 Aug 2010 20:42:11 -0000 Subject: [llvm-commits] [llvm] r112288 - in /llvm/trunk/test/Transforms/InstCombine: shift-trunc-shift.ll shift.ll Message-ID: <20100827204211.1F5422A6C12C@llvm.org> Author: lattner Date: Fri Aug 27 15:42:10 2010 New Revision: 112288 URL: http://llvm.org/viewvc/llvm-project?rev=112288&view=rev Log: merge two tests Removed: llvm/trunk/test/Transforms/InstCombine/shift-trunc-shift.ll Modified: llvm/trunk/test/Transforms/InstCombine/shift.ll Removed: llvm/trunk/test/Transforms/InstCombine/shift-trunc-shift.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/shift-trunc-shift.ll?rev=112287&view=auto ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/shift-trunc-shift.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/shift-trunc-shift.ll (removed) @@ -1,10 +0,0 @@ -; RUN: opt < %s -instcombine -S | grep lshr.*63 - -define i32 @t1(i64 %d18) { -entry: - %tmp916 = lshr i64 %d18, 32 ; [#uses=1] - %tmp917 = trunc i64 %tmp916 to i32 ; [#uses=1] - %tmp10 = lshr i32 %tmp917, 31 ; [#uses=1] - ret i32 %tmp10 -} - Modified: llvm/trunk/test/Transforms/InstCombine/shift.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/shift.ll?rev=112288&r1=112287&r2=112288&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/shift.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/shift.ll Fri Aug 27 15:42:10 2010 @@ -343,3 +343,15 @@ } +define i32 @test29(i64 %d18) { +entry: + %tmp916 = lshr i64 %d18, 32 + %tmp917 = trunc i64 %tmp916 to i32 + %tmp10 = lshr i32 %tmp917, 31 + ret i32 %tmp10 +; CHECK: @test29 +; CHECK: %tmp101 = lshr i64 %d18, 63 +; CHECK: %tmp10 = trunc i64 %tmp101 to i32 +} + + From sabre at nondot.org Fri Aug 27 15:44:45 2010 From: sabre at nondot.org (Chris Lattner) Date: Fri, 27 Aug 2010 20:44:45 -0000 Subject: [llvm-commits] [llvm] r112289 - in /llvm/trunk/test/Transforms/InstCombine: shift-simplify.ll shift.ll Message-ID: <20100827204445.676132A6C12C@llvm.org> Author: lattner Date: Fri Aug 27 15:44:45 2010 New Revision: 112289 URL: http://llvm.org/viewvc/llvm-project?rev=112289&view=rev Log: merge and filecheckize test Removed: llvm/trunk/test/Transforms/InstCombine/shift-simplify.ll Modified: llvm/trunk/test/Transforms/InstCombine/shift.ll Removed: llvm/trunk/test/Transforms/InstCombine/shift-simplify.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/shift-simplify.ll?rev=112288&view=auto ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/shift-simplify.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/shift-simplify.ll (removed) @@ -1,42 +0,0 @@ -; RUN: opt < %s -instcombine -S | \ -; RUN: egrep {shl|lshr|ashr} | count 3 - -define i32 @test0(i32 %A, i32 %B, i32 %C) { - %X = shl i32 %A, %C - %Y = shl i32 %B, %C - %Z = and i32 %X, %Y - ret i32 %Z -} - -define i32 @test1(i32 %A, i32 %B, i32 %C) { - %X = lshr i32 %A, %C - %Y = lshr i32 %B, %C - %Z = or i32 %X, %Y - ret i32 %Z -} - -define i32 @test2(i32 %A, i32 %B, i32 %C) { - %X = ashr i32 %A, %C - %Y = ashr i32 %B, %C - %Z = xor i32 %X, %Y - ret i32 %Z -} - -define i1 @test3(i32 %X) { - %tmp1 = shl i32 %X, 7 - %tmp2 = icmp slt i32 %tmp1, 0 - ret i1 %tmp2 -} - -define i1 @test4(i32 %X) { - %tmp1 = lshr i32 %X, 7 - %tmp2 = icmp slt i32 %tmp1, 0 - ret i1 %tmp2 -} - -define i1 @test5(i32 %X) { - %tmp1 = ashr i32 %X, 7 - %tmp2 = icmp slt i32 %tmp1, 0 - ret i1 %tmp2 -} - Modified: llvm/trunk/test/Transforms/InstCombine/shift.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/shift.ll?rev=112289&r1=112288&r2=112289&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/shift.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/shift.ll Fri Aug 27 15:44:45 2010 @@ -355,3 +355,60 @@ } +define i32 @test30(i32 %A, i32 %B, i32 %C) { + %X = shl i32 %A, %C + %Y = shl i32 %B, %C + %Z = and i32 %X, %Y + ret i32 %Z +; CHECK: @test30 +; CHECK: %X1 = and i32 %A, %B +; CHECK: %Z = shl i32 %X1, %C +} + +define i32 @test31(i32 %A, i32 %B, i32 %C) { + %X = lshr i32 %A, %C + %Y = lshr i32 %B, %C + %Z = or i32 %X, %Y + ret i32 %Z +; CHECK: @test31 +; CHECK: %X1 = or i32 %A, %B +; CHECK: %Z = lshr i32 %X1, %C +} + +define i32 @test32(i32 %A, i32 %B, i32 %C) { + %X = ashr i32 %A, %C + %Y = ashr i32 %B, %C + %Z = xor i32 %X, %Y + ret i32 %Z +; CHECK: @test32 +; CHECK: %X1 = xor i32 %A, %B +; CHECK: %Z = ashr i32 %X1, %C +; CHECK: ret i32 %Z +} + +define i1 @test33(i32 %X) { + %tmp1 = shl i32 %X, 7 + %tmp2 = icmp slt i32 %tmp1, 0 + ret i1 %tmp2 +; CHECK: @test33 +; CHECK: %tmp1.mask = and i32 %X, 16777216 +; CHECK: %tmp2 = icmp ne i32 %tmp1.mask, 0 +} + +define i1 @test34(i32 %X) { + %tmp1 = lshr i32 %X, 7 + %tmp2 = icmp slt i32 %tmp1, 0 + ret i1 %tmp2 +; CHECK: @test34 +; CHECK: ret i1 false +} + +define i1 @test35(i32 %X) { + %tmp1 = ashr i32 %X, 7 + %tmp2 = icmp slt i32 %tmp1, 0 + ret i1 %tmp2 +; CHECK: @test35 +; CHECK: %tmp2 = icmp slt i32 %X, 0 +; CHECK: ret i1 %tmp2 +} + From gohman at apple.com Fri Aug 27 15:45:57 2010 From: gohman at apple.com (Dan Gohman) Date: Fri, 27 Aug 2010 20:45:57 -0000 Subject: [llvm-commits] [llvm] r112290 - /llvm/trunk/lib/Analysis/ScalarEvolution.cpp Message-ID: <20100827204557.2A5062A6C12C@llvm.org> Author: djg Date: Fri Aug 27 15:45:56 2010 New Revision: 112290 URL: http://llvm.org/viewvc/llvm-project?rev=112290&view=rev Log: Make the {A,+,B} + {C,+,D} --> Other + {A+C,+,B+D} transformation collect all the addrecs with the same loop add combine them at once rather than starting everything over at the first chance. Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=112290&r1=112289&r2=112290&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original) +++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Fri Aug 27 15:45:56 2010 @@ -1675,30 +1675,28 @@ // there are multiple AddRec's with the same loop induction variable being // added together. If so, we can fold them. for (unsigned OtherIdx = Idx+1; - OtherIdx < Ops.size() && isa(Ops[OtherIdx]);++OtherIdx) - if (OtherIdx != Idx) { - const SCEVAddRecExpr *OtherAddRec = cast(Ops[OtherIdx]); - if (AddRecLoop == OtherAddRec->getLoop()) { - // Other + {A,+,B} + {C,+,D} --> Other + {A+C,+,B+D} - SmallVector NewOps(AddRec->op_begin(), - AddRec->op_end()); - for (unsigned i = 0, e = OtherAddRec->getNumOperands(); i != e; ++i) { - if (i >= NewOps.size()) { - NewOps.append(OtherAddRec->op_begin()+i, - OtherAddRec->op_end()); - break; + OtherIdx < Ops.size() && isa(Ops[OtherIdx]); + ++OtherIdx) + if (AddRecLoop == cast(Ops[OtherIdx])->getLoop()) { + // Other + {A,+,B} + {C,+,D} --> Other + {A+C,+,B+D} + SmallVector AddRecOps(AddRec->op_begin(), + AddRec->op_end()); + for (; OtherIdx != Ops.size() && isa(Ops[OtherIdx]); + ++OtherIdx) + if (const SCEVAddRecExpr *AR = + dyn_cast(Ops[OtherIdx])) + if (AR->getLoop() == AddRecLoop) { + for (unsigned i = 0, e = AR->getNumOperands(); i != e; ++i) { + if (i >= AddRecOps.size()) { + AddRecOps.append(AR->op_begin()+i, AR->op_end()); + break; + } + AddRecOps[i] = getAddExpr(AddRecOps[i], AR->getOperand(i)); + } + Ops.erase(Ops.begin() + OtherIdx); --OtherIdx; } - NewOps[i] = getAddExpr(NewOps[i], OtherAddRec->getOperand(i)); - } - const SCEV *NewAddRec = getAddRecExpr(NewOps, AddRecLoop); - - if (Ops.size() == 2) return NewAddRec; - - Ops.erase(Ops.begin()+Idx); - Ops.erase(Ops.begin()+OtherIdx-1); - Ops.push_back(NewAddRec); - return getAddExpr(Ops); - } + Ops[Idx] = getAddRecExpr(AddRecOps, AddRecLoop); + return getAddExpr(Ops); } // Otherwise couldn't fold anything into this recurrence. Move onto the From sabre at nondot.org Fri Aug 27 16:04:34 2010 From: sabre at nondot.org (Chris Lattner) Date: Fri, 27 Aug 2010 21:04:34 -0000 Subject: [llvm-commits] [llvm] r112291 - /llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp Message-ID: <20100827210434.431072A6C12C@llvm.org> Author: lattner Date: Fri Aug 27 16:04:34 2010 New Revision: 112291 URL: http://llvm.org/viewvc/llvm-project?rev=112291&view=rev Log: remove some special shift cases that have been subsumed into the more general simplify demanded bits logic. Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp?rev=112291&r1=112290&r2=112291&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp Fri Aug 27 16:04:34 2010 @@ -59,7 +59,7 @@ Instruction *InstCombiner::FoldShiftByConstant(Value *Op0, ConstantInt *Op1, BinaryOperator &I) { bool isLeftShift = I.getOpcode() == Instruction::Shl; - + // See if we can simplify any instructions used by the instruction whose sole // purpose is to compute bits we don't care about. uint32_t TypeBits = Op0->getType()->getScalarSizeInBits(); @@ -288,39 +288,17 @@ ConstantInt::get(Ty, AmtSum)); } - if (ShiftOp->getOpcode() == Instruction::LShr && - I.getOpcode() == Instruction::AShr) { - if (AmtSum >= TypeBits) - return ReplaceInstUsesWith(I, Constant::getNullValue(I.getType())); - - // ((X >>u C1) >>s C2) -> (X >>u (C1+C2)) since C1 != 0. - return BinaryOperator::CreateLShr(X, ConstantInt::get(Ty, AmtSum)); - } - - if (ShiftOp->getOpcode() == Instruction::AShr && - I.getOpcode() == Instruction::LShr) { - // ((X >>s C1) >>u C2) -> ((X >>s (C1+C2)) & mask) since C1 != 0. - if (AmtSum >= TypeBits) - AmtSum = TypeBits-1; - - Value *Shift = Builder->CreateAShr(X, ConstantInt::get(Ty, AmtSum)); - - APInt Mask(APInt::getLowBitsSet(TypeBits, TypeBits - ShiftAmt2)); - return BinaryOperator::CreateAnd(Shift, - ConstantInt::get(I.getContext(), Mask)); - } - - // Okay, if we get here, one shift must be left, and the other shift must be - // right. See if the amounts are equal. if (ShiftAmt1 == ShiftAmt2) { // If we have ((X >>? C) << C), turn this into X & (-1 << C). - if (I.getOpcode() == Instruction::Shl) { + if (I.getOpcode() == Instruction::Shl && + ShiftOp->getOpcode() != Instruction::Shl) { APInt Mask(APInt::getHighBitsSet(TypeBits, TypeBits - ShiftAmt1)); return BinaryOperator::CreateAnd(X, ConstantInt::get(I.getContext(),Mask)); } // If we have ((X << C) >>u C), turn this into X & (-1 >>u C). - if (I.getOpcode() == Instruction::LShr) { + if (I.getOpcode() == Instruction::LShr && + ShiftOp->getOpcode() == Instruction::Shl) { APInt Mask(APInt::getLowBitsSet(TypeBits, TypeBits - ShiftAmt1)); return BinaryOperator::CreateAnd(X, ConstantInt::get(I.getContext(), Mask)); @@ -329,7 +307,8 @@ uint32_t ShiftDiff = ShiftAmt2-ShiftAmt1; // (X >>? C1) << C2 --> X << (C2-C1) & (-1 << C2) - if (I.getOpcode() == Instruction::Shl) { + if (I.getOpcode() == Instruction::Shl && + ShiftOp->getOpcode() != Instruction::Shl) { assert(ShiftOp->getOpcode() == Instruction::LShr || ShiftOp->getOpcode() == Instruction::AShr); Value *Shift = Builder->CreateShl(X, ConstantInt::get(Ty, ShiftDiff)); @@ -340,7 +319,8 @@ } // (X << C1) >>u C2 --> X >>u (C2-C1) & (-1 >> C2) - if (I.getOpcode() == Instruction::LShr) { + if (I.getOpcode() == Instruction::LShr && + ShiftOp->getOpcode() == Instruction::Shl) { assert(ShiftOp->getOpcode() == Instruction::Shl); Value *Shift = Builder->CreateLShr(X, ConstantInt::get(Ty, ShiftDiff)); @@ -355,9 +335,8 @@ uint32_t ShiftDiff = ShiftAmt1-ShiftAmt2; // (X >>? C1) << C2 --> X >>? (C1-C2) & (-1 << C2) - if (I.getOpcode() == Instruction::Shl) { - assert(ShiftOp->getOpcode() == Instruction::LShr || - ShiftOp->getOpcode() == Instruction::AShr); + if (I.getOpcode() == Instruction::Shl && + ShiftOp->getOpcode() != Instruction::Shl) { Value *Shift = Builder->CreateBinOp(ShiftOp->getOpcode(), X, ConstantInt::get(Ty, ShiftDiff)); @@ -367,8 +346,8 @@ } // (X << C1) >>u C2 --> X << (C1-C2) & (-1 >> C2) - if (I.getOpcode() == Instruction::LShr) { - assert(ShiftOp->getOpcode() == Instruction::Shl); + if (I.getOpcode() == Instruction::LShr && + ShiftOp->getOpcode() == Instruction::Shl) { Value *Shift = Builder->CreateShl(X, ConstantInt::get(Ty, ShiftDiff)); APInt Mask(APInt::getLowBitsSet(TypeBits, TypeBits - ShiftAmt2)); From dirty at apple.com Fri Aug 27 16:33:46 2010 From: dirty at apple.com (Cameron Esfahani) Date: Fri, 27 Aug 2010 14:33:46 -0700 Subject: [llvm-commits] [PATCH] Two small typos Message-ID: <5ADC1D54-8EB0-4561-A5E8-C7AAE0AEB854@apple.com> Two small typos I've seen while working on some other stuff... Index: include/llvm/Target/TargetCallingConv.td =================================================================== --- include/llvm/Target/TargetCallingConv.td (revision 112280) +++ include/llvm/Target/TargetCallingConv.td (working copy) @@ -42,7 +42,7 @@ class CCIfByVal : CCIf<"ArgFlags.isByVal()", A> { } -/// CCIfCC - Match of the current calling convention is 'CC'. +/// CCIfCC - Match if the current calling convention is 'CC'. class CCIfCC : CCIf {} Index: include/llvm/CodeGen/MachineFrameInfo.h =================================================================== --- include/llvm/CodeGen/MachineFrameInfo.h (revision 112280) +++ include/llvm/CodeGen/MachineFrameInfo.h (working copy) @@ -31,7 +31,7 @@ class BitVector; /// The CalleeSavedInfo class tracks the information need to locate where a -/// callee saved register in the current frame. +/// callee saved register is in the current frame. class CalleeSavedInfo { unsigned Reg; int FrameIdx; Cameron Esfahani dirty at apple.com "All that is necessary for the triumph of evil is that good men do nothing." Edmund Burke From echristo at apple.com Fri Aug 27 16:38:11 2010 From: echristo at apple.com (Eric Christopher) Date: Fri, 27 Aug 2010 21:38:11 -0000 Subject: [llvm-commits] [llvm] r112297 - in /llvm/trunk/include/llvm: CodeGen/MachineFrameInfo.h Target/TargetCallingConv.td Message-ID: <20100827213811.9D5DD2A6C12C@llvm.org> Author: echristo Date: Fri Aug 27 16:38:11 2010 New Revision: 112297 URL: http://llvm.org/viewvc/llvm-project?rev=112297&view=rev Log: Fix a couple of typos. Patch by Cameron Esfahani! Modified: llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h llvm/trunk/include/llvm/Target/TargetCallingConv.td Modified: llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h?rev=112297&r1=112296&r2=112297&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h (original) +++ llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h Fri Aug 27 16:38:11 2010 @@ -31,7 +31,7 @@ class BitVector; /// The CalleeSavedInfo class tracks the information need to locate where a -/// callee saved register in the current frame. +/// callee saved register is in the current frame. class CalleeSavedInfo { unsigned Reg; int FrameIdx; Modified: llvm/trunk/include/llvm/Target/TargetCallingConv.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetCallingConv.td?rev=112297&r1=112296&r2=112297&view=diff ============================================================================== --- llvm/trunk/include/llvm/Target/TargetCallingConv.td (original) +++ llvm/trunk/include/llvm/Target/TargetCallingConv.td Fri Aug 27 16:38:11 2010 @@ -42,7 +42,7 @@ class CCIfByVal : CCIf<"ArgFlags.isByVal()", A> { } -/// CCIfCC - Match of the current calling convention is 'CC'. +/// CCIfCC - Match if the current calling convention is 'CC'. class CCIfCC : CCIf {} From echristo at apple.com Fri Aug 27 16:39:18 2010 From: echristo at apple.com (Eric Christopher) Date: Fri, 27 Aug 2010 14:39:18 -0700 Subject: [llvm-commits] [PATCH] Two small typos In-Reply-To: <5ADC1D54-8EB0-4561-A5E8-C7AAE0AEB854@apple.com> References: <5ADC1D54-8EB0-4561-A5E8-C7AAE0AEB854@apple.com> Message-ID: <15110C27-BDDE-4142-8D75-638016772790@apple.com> On Aug 27, 2010, at 2:33 PM, Cameron Esfahani wrote: > Two small typos I've seen while working on some other stuff... Applied, thanks! -eric From gohman at apple.com Fri Aug 27 16:39:59 2010 From: gohman at apple.com (Dan Gohman) Date: Fri, 27 Aug 2010 21:39:59 -0000 Subject: [llvm-commits] [llvm] r112299 - /llvm/trunk/lib/Analysis/ScalarEvolution.cpp Message-ID: <20100827214000.1AF262A6C12C@llvm.org> Author: djg Date: Fri Aug 27 16:39:59 2010 New Revision: 112299 URL: http://llvm.org/viewvc/llvm-project?rev=112299&view=rev Log: When merging adjacent operands, scan ahead and merge all equal adjacent operands at once, instead of just two at a time. Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=112299&r1=112298&r2=112299&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original) +++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Fri Aug 27 16:39:59 2010 @@ -1412,22 +1412,25 @@ if (Ops.size() == 1) return Ops[0]; } - // Okay, check to see if the same value occurs in the operand list twice. If - // so, merge them together into an multiply expression. Since we sorted the - // list, these values are required to be adjacent. + // Okay, check to see if the same value occurs in the operand list more than + // once. If so, merge them together into an multiply expression. Since we + // sorted the list, these values are required to be adjacent. const Type *Ty = Ops[0]->getType(); bool FoundMatch = false; - for (unsigned i = 0, e = Ops.size()-1; i != e; ++i) + for (unsigned i = 0, e = Ops.size(); i != e-1; ++i) if (Ops[i] == Ops[i+1]) { // X + Y + Y --> X + Y*2 - // Found a match, merge the two values into a multiply, and add any - // remaining values to the result. - const SCEV *Two = getConstant(Ty, 2); - const SCEV *Mul = getMulExpr(Two, Ops[i]); - if (Ops.size() == 2) + // Scan ahead to count how many equal operands there are. + unsigned Count = 2; + while (i+Count != e && Ops[i+Count] == Ops[i]) + ++Count; + // Merge the values into a multiply. + const SCEV *Scale = getConstant(Ty, Count); + const SCEV *Mul = getMulExpr(Scale, Ops[i]); + if (Ops.size() == Count) return Mul; Ops[i] = Mul; - Ops.erase(Ops.begin()+i+1); - --i; --e; + Ops.erase(Ops.begin()+i+1, Ops.begin()+i+Count); + i -= Count - 1; e -= Count - 1; FoundMatch = true; } if (FoundMatch) From bob.wilson at apple.com Fri Aug 27 16:44:35 2010 From: bob.wilson at apple.com (Bob Wilson) Date: Fri, 27 Aug 2010 21:44:35 -0000 Subject: [llvm-commits] [llvm] r112300 - /llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Message-ID: <20100827214436.02F542A6C12C@llvm.org> Author: bwilson Date: Fri Aug 27 16:44:35 2010 New Revision: 112300 URL: http://llvm.org/viewvc/llvm-project?rev=112300&view=rev Log: Unsigned value cannot be < 0. Modified: llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Modified: llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp?rev=112300&r1=112299&r2=112300&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Fri Aug 27 16:44:35 2010 @@ -409,7 +409,7 @@ return false; // Make sure the offset fits in 8 bits. - if (Bytes <= 0 || (Limit && Bytes >= Limit)) + if (Bytes == 0 || (Limit && Bytes >= Limit)) return false; unsigned Scale = (MI->getOpcode() == ARM::tSUBspi) ? 4 : 1; // FIXME @@ -433,7 +433,7 @@ MI->getOpcode() != ARM::ADDri) return false; - if (Bytes <= 0 || (Limit && Bytes >= Limit)) + if (Bytes == 0 || (Limit && Bytes >= Limit)) // Make sure the offset fits in 8 bits. return false; From bob.wilson at apple.com Fri Aug 27 16:56:59 2010 From: bob.wilson at apple.com (Bob Wilson) Date: Fri, 27 Aug 2010 21:56:59 -0000 Subject: [llvm-commits] [llvm] r112302 - /llvm/trunk/utils/TableGen/ARMDecoderEmitter.cpp Message-ID: <20100827215659.394012A6C12C@llvm.org> Author: bwilson Date: Fri Aug 27 16:56:59 2010 New Revision: 112302 URL: http://llvm.org/viewvc/llvm-project?rev=112302&view=rev Log: Fix a comment typo. Modified: llvm/trunk/utils/TableGen/ARMDecoderEmitter.cpp Modified: llvm/trunk/utils/TableGen/ARMDecoderEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/ARMDecoderEmitter.cpp?rev=112302&r1=112301&r2=112302&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/ARMDecoderEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/ARMDecoderEmitter.cpp Fri Aug 27 16:56:59 2010 @@ -1583,7 +1583,7 @@ Name == "MOVr_TC") return false; - // VLDMQ/VSTMQ can be hanlded with the more generic VLDMD/VSTMD. + // VLDMQ/VSTMQ can be handled with the more generic VLDMD/VSTMD. if (Name == "VLDMQ" || Name == "VLDMQ_UPD" || Name == "VSTMQ" || Name == "VSTMQ_UPD") return false; From sabre at nondot.org Fri Aug 27 17:24:38 2010 From: sabre at nondot.org (Chris Lattner) Date: Fri, 27 Aug 2010 22:24:38 -0000 Subject: [llvm-commits] [llvm] r112304 - in /llvm/trunk: lib/Transforms/InstCombine/InstCombineCasts.cpp lib/Transforms/InstCombine/InstCombineShifts.cpp test/Transforms/InstCombine/shift.ll Message-ID: <20100827222438.8557D2A6C12C@llvm.org> Author: lattner Date: Fri Aug 27 17:24:38 2010 New Revision: 112304 URL: http://llvm.org/viewvc/llvm-project?rev=112304&view=rev Log: Implement a pretty general logical shift propagation framework, which is good at ripping through bitfield operations. This generalize a bunch of the existing xforms that instcombine does, such as (x << c) >> c -> and to handle intermediate logical nodes. This is useful for ripping up the "promote to large integer" code produced by SRoA. Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp llvm/trunk/test/Transforms/InstCombine/shift.ll Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp?rev=112304&r1=112303&r2=112304&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp Fri Aug 27 17:24:38 2010 @@ -566,8 +566,7 @@ if (CI.getType() == In->getType()) return ReplaceInstUsesWith(CI, In); - else - return CastInst::CreateIntegerCast(In, CI.getType(), false/*ZExt*/); + return CastInst::CreateIntegerCast(In, CI.getType(), false/*ZExt*/); } } } Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp?rev=112304&r1=112303&r2=112304&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp Fri Aug 27 17:24:38 2010 @@ -56,10 +56,236 @@ return 0; } +/// CanEvaluateShifted - See if we can compute the specified value, but shifted +/// logically to the left or right by some number of bits. This should return +/// true if the expression can be computed for the same cost as the current +/// expression tree. This is used to eliminate extraneous shifting from things +/// like: +/// %C = shl i128 %A, 64 +/// %D = shl i128 %B, 96 +/// %E = or i128 %C, %D +/// %F = lshr i128 %E, 64 +/// where the client will ask if E can be computed shifted right by 64-bits. If +/// this succeeds, the GetShiftedValue function will be called to produce the +/// value. +static bool CanEvaluateShifted(Value *V, unsigned NumBits, bool isLeftShift, + InstCombiner &IC) { + // We can always evaluate constants shifted. + if (isa(V)) + return true; + + Instruction *I = dyn_cast(V); + if (!I) return false; + + // If this is the opposite shift, we can directly reuse the input of the shift + // if the needed bits are already zero in the input. This allows us to reuse + // the value which means that we don't care if the shift has multiple uses. + // TODO: Handle opposite shift by exact value. + ConstantInt *CI; + if ((isLeftShift && match(I, m_LShr(m_Value(), m_ConstantInt(CI)))) || + (!isLeftShift && match(I, m_Shl(m_Value(), m_ConstantInt(CI))))) { + if (CI->getZExtValue() == NumBits) { + // TODO: Check that the input bits are already zero with MaskedValueIsZero +#if 0 + // If this is a truncate of a logical shr, we can truncate it to a smaller + // lshr iff we know that the bits we would otherwise be shifting in are + // already zeros. + uint32_t OrigBitWidth = OrigTy->getScalarSizeInBits(); + uint32_t BitWidth = Ty->getScalarSizeInBits(); + if (MaskedValueIsZero(I->getOperand(0), + APInt::getHighBitsSet(OrigBitWidth, OrigBitWidth-BitWidth)) && + CI->getLimitedValue(BitWidth) < BitWidth) { + return CanEvaluateTruncated(I->getOperand(0), Ty); + } +#endif + + } + } + + // We can't mutate something that has multiple uses: doing so would + // require duplicating the instruction in general, which isn't profitable. + if (!I->hasOneUse()) return false; + + switch (I->getOpcode()) { + default: return false; + case Instruction::And: + case Instruction::Or: + case Instruction::Xor: + // Bitwise operators can all arbitrarily be arbitrarily evaluated shifted. + return CanEvaluateShifted(I->getOperand(0), NumBits, isLeftShift, IC) && + CanEvaluateShifted(I->getOperand(1), NumBits, isLeftShift, IC); + + case Instruction::Shl: + // We can often fold the shift into shifts-by-a-constant. + CI = dyn_cast(I->getOperand(1)); + if (CI == 0) return false; + + // We can always fold shl(c1)+shl(c2) -> shl(c1+c2). + if (isLeftShift) return true; + + // We can always turn shl(c)+shr(c) -> and(c2). + if (CI->getValue() == NumBits) return true; + // We can always turn shl(c1)+shr(c2) -> shl(c3)+and(c4), but it isn't + // profitable unless we know the and'd out bits are already zero. + return false; + case Instruction::LShr: + // We can often fold the shift into shifts-by-a-constant. + CI = dyn_cast(I->getOperand(1)); + if (CI == 0) return false; + + // We can always fold lshr(c1)+lshr(c2) -> lshr(c1+c2). + if (!isLeftShift) return true; + + // We can always turn lshr(c)+shl(c) -> and(c2). + if (CI->getValue() == NumBits) return true; + + // We can always turn lshr(c1)+shl(c2) -> lshr(c3)+and(c4), but it isn't + // profitable unless we know the and'd out bits are already zero. + return false; + + case Instruction::Select: { + SelectInst *SI = cast(I); + return CanEvaluateShifted(SI->getTrueValue(), NumBits, isLeftShift, IC) && + CanEvaluateShifted(SI->getFalseValue(), NumBits, isLeftShift, IC); + } + case Instruction::PHI: { + // We can change a phi if we can change all operands. Note that we never + // get into trouble with cyclic PHIs here because we only consider + // instructions with a single use. + PHINode *PN = cast(I); + for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i) + if (!CanEvaluateShifted(PN->getIncomingValue(i), NumBits, isLeftShift,IC)) + return false; + return true; + } + } +} + +/// GetShiftedValue - When CanEvaluateShifted returned true for an expression, +/// this value inserts the new computation that produces the shifted value. +static Value *GetShiftedValue(Value *V, unsigned NumBits, bool isLeftShift, + InstCombiner &IC) { + // We can always evaluate constants shifted. + if (Constant *C = dyn_cast(V)) { + if (isLeftShift) + V = IC.Builder->CreateShl(C, NumBits); + else + V = IC.Builder->CreateLShr(C, NumBits); + // If we got a constantexpr back, try to simplify it with TD info. + if (ConstantExpr *CE = dyn_cast(V)) + V = ConstantFoldConstantExpression(CE, IC.getTargetData()); + return V; + } + + Instruction *I = cast(V); + IC.Worklist.Add(I); + + switch (I->getOpcode()) { + default: assert(0 && "Inconsistency with CanEvaluateShifted"); + case Instruction::And: + case Instruction::Or: + case Instruction::Xor: + // Bitwise operators can all arbitrarily be arbitrarily evaluated shifted. + I->setOperand(0, GetShiftedValue(I->getOperand(0), NumBits,isLeftShift,IC)); + I->setOperand(1, GetShiftedValue(I->getOperand(1), NumBits,isLeftShift,IC)); + return I; + + case Instruction::Shl: { + unsigned TypeWidth = I->getType()->getScalarSizeInBits(); + + // We only accept shifts-by-a-constant in CanEvaluateShifted. + ConstantInt *CI = cast(I->getOperand(1)); + + // We can always fold shl(c1)+shl(c2) -> shl(c1+c2). + if (isLeftShift) { + // If this is oversized composite shift, then unsigned shifts get 0. + unsigned NewShAmt = NumBits+CI->getZExtValue(); + if (NewShAmt >= TypeWidth) + return Constant::getNullValue(I->getType()); + + I->setOperand(1, ConstantInt::get(I->getType(), NewShAmt)); + return I; + } + + // We turn shl(c)+lshr(c) -> and(c2) if the input doesn't already have + // zeros. + assert(CI->getValue() == NumBits); + + APInt Mask(APInt::getLowBitsSet(TypeWidth, TypeWidth - NumBits)); + V = IC.Builder->CreateAnd(I->getOperand(0), + ConstantInt::get(I->getContext(), Mask)); + if (Instruction *VI = dyn_cast(V)) { + VI->moveBefore(I); + VI->takeName(I); + } + return V; + } + case Instruction::LShr: { + unsigned TypeWidth = I->getType()->getScalarSizeInBits(); + // We only accept shifts-by-a-constant in CanEvaluateShifted. + ConstantInt *CI = cast(I->getOperand(1)); + + // We can always fold lshr(c1)+lshr(c2) -> lshr(c1+c2). + if (!isLeftShift) { + // If this is oversized composite shift, then unsigned shifts get 0. + unsigned NewShAmt = NumBits+CI->getZExtValue(); + if (NewShAmt >= TypeWidth) + return Constant::getNullValue(I->getType()); + + I->setOperand(1, ConstantInt::get(I->getType(), NewShAmt)); + return I; + } + + // We turn lshr(c)+shl(c) -> and(c2) if the input doesn't already have + // zeros. + assert(CI->getValue() == NumBits); + + APInt Mask(APInt::getHighBitsSet(TypeWidth, TypeWidth - NumBits)); + V = IC.Builder->CreateAnd(I->getOperand(0), + ConstantInt::get(I->getContext(), Mask)); + if (Instruction *VI = dyn_cast(V)) { + VI->moveBefore(I); + VI->takeName(I); + } + return V; + } + + case Instruction::Select: + I->setOperand(1, GetShiftedValue(I->getOperand(1), NumBits,isLeftShift,IC)); + I->setOperand(2, GetShiftedValue(I->getOperand(2), NumBits,isLeftShift,IC)); + return I; + case Instruction::PHI: { + // We can change a phi if we can change all operands. Note that we never + // get into trouble with cyclic PHIs here because we only consider + // instructions with a single use. + PHINode *PN = cast(I); + for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i) + PN->setIncomingValue(i, GetShiftedValue(PN->getIncomingValue(i), + NumBits, isLeftShift, IC)); + return PN; + } + } +} + + + Instruction *InstCombiner::FoldShiftByConstant(Value *Op0, ConstantInt *Op1, BinaryOperator &I) { bool isLeftShift = I.getOpcode() == Instruction::Shl; + + // See if we can propagate this shift into the input, this covers the trivial + // cast of lshr(shl(x,c1),c2) as well as other more complex cases. + if (I.getOpcode() != Instruction::AShr && + CanEvaluateShifted(Op0, Op1->getZExtValue(), isLeftShift, *this)) { + DEBUG(dbgs() << "ICE: GetShiftedValue propagatin shift through expression" + " to eliminate shift:\n IN: " << *Op0 << "\nSH: " << I << "\n"); + + return ReplaceInstUsesWith(I, + GetShiftedValue(Op0, Op1->getZExtValue(), isLeftShift, *this)); + } + + // See if we can simplify any instructions used by the instruction whose sole // purpose is to compute bits we don't care about. uint32_t TypeBits = Op0->getType()->getScalarSizeInBits(); Modified: llvm/trunk/test/Transforms/InstCombine/shift.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/shift.ll?rev=112304&r1=112303&r2=112304&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/shift.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/shift.ll Fri Aug 27 17:24:38 2010 @@ -130,8 +130,8 @@ ;; D = ((B | 1234) << 4) === ((B << 4)|(1234 << 4) define i32 @test14(i32 %A) { ; CHECK: @test14 -; CHECK-NEXT: or i32 %A, 19744 -; CHECK-NEXT: and i32 +; CHECK-NEXT: %B = and i32 %A, -19760 +; CHECK-NEXT: or i32 %B, 19744 ; CHECK-NEXT: ret i32 %B = lshr i32 %A, 4 ; [#uses=1] %C = or i32 %B, 1234 ; [#uses=1] @@ -350,8 +350,8 @@ %tmp10 = lshr i32 %tmp917, 31 ret i32 %tmp10 ; CHECK: @test29 -; CHECK: %tmp101 = lshr i64 %d18, 63 -; CHECK: %tmp10 = trunc i64 %tmp101 to i32 +; CHECK: %tmp916 = lshr i64 %d18, 63 +; CHECK: %tmp10 = trunc i64 %tmp916 to i32 } @@ -412,3 +412,16 @@ ; CHECK: ret i1 %tmp2 } +define i128 @test36(i128 %A, i128 %B) { +entry: + %tmp27 = shl i128 %A, 64 + %tmp23 = shl i128 %B, 64 + %ins = or i128 %tmp23, %tmp27 + %tmp45 = lshr i128 %ins, 64 + ret i128 %tmp45 + +; CHECK: %tmp231 = or i128 %B, %A +; CHECK: %ins = and i128 %tmp231, 18446744073709551615 +; CHECK: ret i128 %ins +} + From dpatel at apple.com Fri Aug 27 17:25:51 2010 From: dpatel at apple.com (Devang Patel) Date: Fri, 27 Aug 2010 22:25:51 -0000 Subject: [llvm-commits] [llvm] r112305 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Message-ID: <20100827222551.643762A6C12C@llvm.org> Author: dpatel Date: Fri Aug 27 17:25:51 2010 New Revision: 112305 URL: http://llvm.org/viewvc/llvm-project?rev=112305&view=rev Log: Simplify. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=112305&r1=112304&r2=112305&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Fri Aug 27 17:25:51 2010 @@ -4132,7 +4132,6 @@ SDV = DAG.getDbgValue(Variable, V, Offset, dl, SDNodeOrder); DAG.AddDbgValue(SDV, 0, false); } else { - bool createUndef = false; // Do not use getValue() in here; we don't want to generate code at // this point if it hasn't been done yet. SDValue N = NodeMap[V]; @@ -4150,9 +4149,7 @@ // Remember it for later. DanglingDebugInfo DDI(&DI, dl, SDNodeOrder); DanglingDebugInfoMap[V] = DDI; - } else - createUndef = true; - if (createUndef) { + } else { // We may expand this to cover more cases. One case where we have no // data available is an unreferenced parameter; we need this fallback. SDV = DAG.getDbgValue(Variable, UndefValue::get(V->getType()), From dirty at apple.com Fri Aug 27 17:36:42 2010 From: dirty at apple.com (Cameron Esfahani) Date: Fri, 27 Aug 2010 15:36:42 -0700 Subject: [llvm-commits] [PATCH] Win64 var arg support Message-ID: Here's the corresponding llvm changes to support the Win64 ABI version of var args. With a test case! -------------- next part -------------- A non-text attachment was scrubbed... Name: llvm_va.patch Type: application/octet-stream Size: 6282 bytes Desc: not available Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20100827/e3231177/attachment.obj -------------- next part -------------- Based on revision 112303 Cameron Esfahani dirty at apple.com "In the elder days of Art, Builders wrought with greatest care each minute and unseen part; For the gods see everywhere." "The Builders", H. W. Longfellow From sabre at nondot.org Fri Aug 27 17:53:44 2010 From: sabre at nondot.org (Chris Lattner) Date: Fri, 27 Aug 2010 22:53:44 -0000 Subject: [llvm-commits] [llvm] r112314 - in /llvm/trunk: lib/Transforms/InstCombine/InstCombineShifts.cpp test/Transforms/InstCombine/shift.ll Message-ID: <20100827225344.569582A6C12C@llvm.org> Author: lattner Date: Fri Aug 27 17:53:44 2010 New Revision: 112314 URL: http://llvm.org/viewvc/llvm-project?rev=112314&view=rev Log: Enhance the shift propagator to handle the case when you have: A = shl x, 42 ... B = lshr ..., 38 which can be transformed into: A = shl x, 4 ... iff we can prove that the would-be-shifted-in bits are already zero. This eliminates two shifts in the testcase and allows eliminate of the whole i128 chain in the real example. Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp llvm/trunk/test/Transforms/InstCombine/shift.ll Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp?rev=112314&r1=112313&r2=112314&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp Fri Aug 27 17:53:44 2010 @@ -115,7 +115,7 @@ return CanEvaluateShifted(I->getOperand(0), NumBits, isLeftShift, IC) && CanEvaluateShifted(I->getOperand(1), NumBits, isLeftShift, IC); - case Instruction::Shl: + case Instruction::Shl: { // We can often fold the shift into shifts-by-a-constant. CI = dyn_cast(I->getOperand(1)); if (CI == 0) return false; @@ -125,10 +125,21 @@ // We can always turn shl(c)+shr(c) -> and(c2). if (CI->getValue() == NumBits) return true; - // We can always turn shl(c1)+shr(c2) -> shl(c3)+and(c4), but it isn't + + unsigned TypeWidth = I->getType()->getScalarSizeInBits(); + + // We can turn shl(c1)+shr(c2) -> shl(c3)+and(c4), but it isn't // profitable unless we know the and'd out bits are already zero. + if (CI->getZExtValue() > NumBits) { + unsigned HighBits = CI->getZExtValue() - NumBits; + if (MaskedValueIsZero(I->getOperand(0), + APInt::getHighBitsSet(TypeWidth, HighBits))) + return true; + } + return false; - case Instruction::LShr: + } + case Instruction::LShr: { // We can often fold the shift into shifts-by-a-constant. CI = dyn_cast(I->getOperand(1)); if (CI == 0) return false; @@ -139,10 +150,19 @@ // We can always turn lshr(c)+shl(c) -> and(c2). if (CI->getValue() == NumBits) return true; + unsigned TypeWidth = I->getType()->getScalarSizeInBits(); + // We can always turn lshr(c1)+shl(c2) -> lshr(c3)+and(c4), but it isn't // profitable unless we know the and'd out bits are already zero. - return false; + if (CI->getZExtValue() > NumBits) { + unsigned LowBits = CI->getZExtValue() - NumBits; + if (MaskedValueIsZero(I->getOperand(0), + APInt::getLowBitsSet(TypeWidth, LowBits))) + return true; + } + return false; + } case Instruction::Select: { SelectInst *SI = cast(I); return CanEvaluateShifted(SI->getTrueValue(), NumBits, isLeftShift, IC) && @@ -209,16 +229,23 @@ // We turn shl(c)+lshr(c) -> and(c2) if the input doesn't already have // zeros. - assert(CI->getValue() == NumBits); - - APInt Mask(APInt::getLowBitsSet(TypeWidth, TypeWidth - NumBits)); - V = IC.Builder->CreateAnd(I->getOperand(0), - ConstantInt::get(I->getContext(), Mask)); - if (Instruction *VI = dyn_cast(V)) { - VI->moveBefore(I); - VI->takeName(I); + if (CI->getValue() == NumBits) { + APInt Mask(APInt::getLowBitsSet(TypeWidth, TypeWidth - NumBits)); + V = IC.Builder->CreateAnd(I->getOperand(0), + ConstantInt::get(I->getContext(), Mask)); + if (Instruction *VI = dyn_cast(V)) { + VI->moveBefore(I); + VI->takeName(I); + } + return V; } - return V; + + // We turn shl(c1)+shr(c2) -> shl(c3)+and(c4), but only when we know that + // the and won't be needed. + assert(CI->getZExtValue() > NumBits); + I->setOperand(1, ConstantInt::get(I->getType(), + CI->getZExtValue() - NumBits)); + return I; } case Instruction::LShr: { unsigned TypeWidth = I->getType()->getScalarSizeInBits(); @@ -238,16 +265,23 @@ // We turn lshr(c)+shl(c) -> and(c2) if the input doesn't already have // zeros. - assert(CI->getValue() == NumBits); - - APInt Mask(APInt::getHighBitsSet(TypeWidth, TypeWidth - NumBits)); - V = IC.Builder->CreateAnd(I->getOperand(0), - ConstantInt::get(I->getContext(), Mask)); - if (Instruction *VI = dyn_cast(V)) { - VI->moveBefore(I); - VI->takeName(I); + if (CI->getValue() == NumBits) { + APInt Mask(APInt::getHighBitsSet(TypeWidth, TypeWidth - NumBits)); + V = IC.Builder->CreateAnd(I->getOperand(0), + ConstantInt::get(I->getContext(), Mask)); + if (Instruction *VI = dyn_cast(V)) { + VI->moveBefore(I); + VI->takeName(I); + } + return V; } - return V; + + // We turn lshr(c1)+shl(c2) -> lshr(c3)+and(c4), but only when we know that + // the and won't be needed. + assert(CI->getZExtValue() > NumBits); + I->setOperand(1, ConstantInt::get(I->getType(), + CI->getZExtValue() - NumBits)); + return I; } case Instruction::Select: Modified: llvm/trunk/test/Transforms/InstCombine/shift.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/shift.ll?rev=112314&r1=112313&r2=112314&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/shift.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/shift.ll Fri Aug 27 17:53:44 2010 @@ -425,3 +425,18 @@ ; CHECK: ret i128 %ins } +define i64 @test37(i128 %A, i32 %B) { +entry: + %tmp27 = shl i128 %A, 64 + %tmp22 = zext i32 %B to i128 + %tmp23 = shl i128 %tmp22, 96 + %ins = or i128 %tmp23, %tmp27 + %tmp45 = lshr i128 %ins, 64 + %tmp46 = trunc i128 %tmp45 to i64 + ret i64 %tmp46 + +; CHECK: %tmp23 = shl i128 %tmp22, 32 +; CHECK: %ins = or i128 %tmp23, %A +; CHECK: %tmp46 = trunc i128 %ins to i64 +} + From sabre at nondot.org Fri Aug 27 18:05:27 2010 From: sabre at nondot.org (Chris Lattner) Date: Fri, 27 Aug 2010 23:05:27 -0000 Subject: [llvm-commits] [llvm] r112316 - /llvm/trunk/test/FrontendC/2008-03-24-BitField-And-Alloca.c Message-ID: <20100827230527.8767F2A6C12C@llvm.org> Author: lattner Date: Fri Aug 27 18:05:27 2010 New Revision: 112316 URL: http://llvm.org/viewvc/llvm-project?rev=112316&view=rev Log: fix this test. It's not clear what it's really testing. Modified: llvm/trunk/test/FrontendC/2008-03-24-BitField-And-Alloca.c Modified: llvm/trunk/test/FrontendC/2008-03-24-BitField-And-Alloca.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2008-03-24-BitField-And-Alloca.c?rev=112316&r1=112315&r2=112316&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2008-03-24-BitField-And-Alloca.c (original) +++ llvm/trunk/test/FrontendC/2008-03-24-BitField-And-Alloca.c Fri Aug 27 18:05:27 2010 @@ -1,5 +1,5 @@ // RUN: %llvmgcc -O2 -S %s -o - | not grep alloca -// RUN: %llvmgcc -m32 -O2 -S %s -o - | not grep store +// RUN: %llvmgcc -m32 -O2 -S %s -o - | not grep 'store ' enum { PP_C, From sabre at nondot.org Fri Aug 27 18:05:55 2010 From: sabre at nondot.org (Chris Lattner) Date: Fri, 27 Aug 2010 23:05:55 -0000 Subject: [llvm-commits] [llvm] r112317 - /llvm/trunk/test/FrontendC/2008-03-24-BitField-And-Alloca.c Message-ID: <20100827230555.134C62A6C12C@llvm.org> Author: lattner Date: Fri Aug 27 18:05:54 2010 New Revision: 112317 URL: http://llvm.org/viewvc/llvm-project?rev=112317&view=rev Log: no really, fix the test. Modified: llvm/trunk/test/FrontendC/2008-03-24-BitField-And-Alloca.c Modified: llvm/trunk/test/FrontendC/2008-03-24-BitField-And-Alloca.c URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendC/2008-03-24-BitField-And-Alloca.c?rev=112317&r1=112316&r2=112317&view=diff ============================================================================== --- llvm/trunk/test/FrontendC/2008-03-24-BitField-And-Alloca.c (original) +++ llvm/trunk/test/FrontendC/2008-03-24-BitField-And-Alloca.c Fri Aug 27 18:05:54 2010 @@ -1,5 +1,5 @@ // RUN: %llvmgcc -O2 -S %s -o - | not grep alloca -// RUN: %llvmgcc -m32 -O2 -S %s -o - | not grep 'store ' +// RUN: %llvmgcc -m32 -O2 -S %s -o - | not grep {store } enum { PP_C, From sabre at nondot.org Fri Aug 27 18:15:21 2010 From: sabre at nondot.org (Chris Lattner) Date: Fri, 27 Aug 2010 23:15:21 -0000 Subject: [llvm-commits] [llvm] r112321 - /llvm/trunk/test/Transforms/InstCombine/shift.ll Message-ID: <20100827231521.35E1E2A6C12C@llvm.org> Author: lattner Date: Fri Aug 27 18:15:21 2010 New Revision: 112321 URL: http://llvm.org/viewvc/llvm-project?rev=112321&view=rev Log: tidy up test. Modified: llvm/trunk/test/Transforms/InstCombine/shift.ll Modified: llvm/trunk/test/Transforms/InstCombine/shift.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/shift.ll?rev=112321&r1=112320&r2=112321&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/shift.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/shift.ll Fri Aug 27 18:15:21 2010 @@ -420,6 +420,7 @@ %tmp45 = lshr i128 %ins, 64 ret i128 %tmp45 +; CHECK: @test36 ; CHECK: %tmp231 = or i128 %B, %A ; CHECK: %ins = and i128 %tmp231, 18446744073709551615 ; CHECK: ret i128 %ins @@ -435,8 +436,8 @@ %tmp46 = trunc i128 %tmp45 to i64 ret i64 %tmp46 +; CHECK: @test37 ; CHECK: %tmp23 = shl i128 %tmp22, 32 ; CHECK: %ins = or i128 %tmp23, %A ; CHECK: %tmp46 = trunc i128 %ins to i64 } - From bob.wilson at apple.com Fri Aug 27 18:18:17 2010 From: bob.wilson at apple.com (Bob Wilson) Date: Fri, 27 Aug 2010 23:18:17 -0000 Subject: [llvm-commits] [llvm] r112322 - in /llvm/trunk: lib/Target/ARM/ARMAddressingModes.h lib/Target/ARM/ARMAsmPrinter.cpp lib/Target/ARM/ARMBaseInstrInfo.cpp lib/Target/ARM/ARMCodeEmitter.cpp lib/Target/ARM/ARMISelDAGToDAG.cpp lib/Target/ARM/ARMInstrNEON.td lib/Target/ARM/ARMInstrVFP.td lib/Target/ARM/ARMLoadStoreOptimizer.cpp lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp test/CodeGen/ARM/vst3.ll Message-ID: <20100827231817.A14EF2A6C12C@llvm.org> Author: bwilson Date: Fri Aug 27 18:18:17 2010 New Revision: 112322 URL: http://llvm.org/viewvc/llvm-project?rev=112322&view=rev Log: Change ARM VFP VLDM/VSTM instructions to use addressing mode #4, just like all the other LDM/STM instructions. This fixes asm printer crashes when compiling with -O0. I've changed one of the NEON tests (vst3.ll) to run with -O0 to check this in the future. Prior to this change VLDM/VSTM used addressing mode #5, but not really. The offset field was used to hold a count of the number of registers being loaded or stored, and the AM5 opcode field was expanded to specify the IA or DB mode, instead of the standard ADD/SUB specifier. Much of the backend was not aware of these special cases. The crashes occured when rewriting a frameindex caused the AM5 offset field to be changed so that it did not have a valid submode. I don't know exactly what changed to expose this now. Maybe we've never done much with -O0 and NEON. Regardless, there's no longer any reason to keep a count of the VLDM/VSTM registers, so we can use addressing mode #4 and clean things up in a lot of places. Modified: llvm/trunk/lib/Target/ARM/ARMAddressingModes.h llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp llvm/trunk/lib/Target/ARM/ARMInstrNEON.td llvm/trunk/lib/Target/ARM/ARMInstrVFP.td llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp llvm/trunk/test/CodeGen/ARM/vst3.ll Modified: llvm/trunk/lib/Target/ARM/ARMAddressingModes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAddressingModes.h?rev=112322&r1=112321&r2=112322&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMAddressingModes.h (original) +++ llvm/trunk/lib/Target/ARM/ARMAddressingModes.h Fri Aug 27 18:18:17 2010 @@ -458,6 +458,7 @@ // IB - Increment before // DA - Decrement after // DB - Decrement before + // For VFP instructions, only the IA and DB modes are valid. static inline AMSubMode getAM4SubMode(unsigned Mode) { return (AMSubMode)(Mode & 0x7); @@ -477,14 +478,6 @@ // // The first operand is always a Reg. The second operand encodes the // operation in bit 8 and the immediate in bits 0-7. - // - // This is also used for FP load/store multiple ops. The second operand - // encodes the number of registers (or 2 times the number of registers - // for DPR ops) in bits 0-7. In addition, bits 8-10 encode one of the - // following two sub-modes: - // - // IA - Increment after - // DB - Decrement before /// getAM5Opc - This function encodes the addrmode5 opc field. static inline unsigned getAM5Opc(AddrOpc Opc, unsigned char Offset) { @@ -498,17 +491,6 @@ return ((AM5Opc >> 8) & 1) ? sub : add; } - /// getAM5Opc - This function encodes the addrmode5 opc field for VLDM and - /// VSTM instructions. - static inline unsigned getAM5Opc(AMSubMode SubMode, unsigned char Offset) { - assert((SubMode == ia || SubMode == db) && - "Illegal addressing mode 5 sub-mode!"); - return ((int)SubMode << 8) | Offset; - } - static inline AMSubMode getAM5SubMode(unsigned AM5Opc) { - return (AMSubMode)((AM5Opc >> 8) & 0x7); - } - //===--------------------------------------------------------------------===// // Addressing Mode #6 //===--------------------------------------------------------------------===// Modified: llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp?rev=112322&r1=112321&r2=112322&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp Fri Aug 27 18:18:17 2010 @@ -607,16 +607,6 @@ assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg())); - if (Modifier && strcmp(Modifier, "submode") == 0) { - ARM_AM::AMSubMode Mode = ARM_AM::getAM5SubMode(MO2.getImm()); - O << ARM_AM::getAMSubModeStr(Mode); - return; - } else if (Modifier && strcmp(Modifier, "base") == 0) { - // Used for FSTM{D|S} and LSTM{D|S} operations. - O << getRegisterName(MO1.getReg()); - return; - } - O << "[" << getRegisterName(MO1.getReg()); if (unsigned ImmOffs = ARM_AM::getAM5Offset(MO2.getImm())) { Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=112322&r1=112321&r2=112322&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Fri Aug 27 18:18:17 2010 @@ -757,7 +757,7 @@ AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VSTMQ)) .addReg(SrcReg, getKillRegState(isKill)) .addFrameIndex(FI) - .addImm(ARM_AM::getAM5Opc(ARM_AM::ia, 4)) + .addImm(ARM_AM::getAM4ModeImm(ARM_AM::ia)) .addMemOperand(MMO)); } break; @@ -777,7 +777,7 @@ MachineInstrBuilder MIB = AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VSTMD)) .addFrameIndex(FI) - .addImm(ARM_AM::getAM5Opc(ARM_AM::ia, 4))) + .addImm(ARM_AM::getAM4ModeImm(ARM_AM::ia))) .addMemOperand(MMO); MIB = AddDReg(MIB, SrcReg, ARM::dsub_0, getKillRegState(isKill), TRI); MIB = AddDReg(MIB, SrcReg, ARM::dsub_1, 0, TRI); @@ -789,7 +789,7 @@ MachineInstrBuilder MIB = AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VSTMD)) .addFrameIndex(FI) - .addImm(ARM_AM::getAM5Opc(ARM_AM::ia, 4))) + .addImm(ARM_AM::getAM4ModeImm(ARM_AM::ia))) .addMemOperand(MMO); MIB = AddDReg(MIB, SrcReg, ARM::dsub_0, getKillRegState(isKill), TRI); MIB = AddDReg(MIB, SrcReg, ARM::dsub_1, 0, TRI); @@ -853,7 +853,7 @@ } else { AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VLDMQ), DestReg) .addFrameIndex(FI) - .addImm(ARM_AM::getAM5Opc(ARM_AM::ia, 4)) + .addImm(ARM_AM::getAM4ModeImm(ARM_AM::ia)) .addMemOperand(MMO)); } break; @@ -870,7 +870,7 @@ MachineInstrBuilder MIB = AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VLDMD)) .addFrameIndex(FI) - .addImm(ARM_AM::getAM5Opc(ARM_AM::ia, 4))) + .addImm(ARM_AM::getAM4ModeImm(ARM_AM::ia))) .addMemOperand(MMO); MIB = AddDReg(MIB, DestReg, ARM::dsub_0, RegState::Define, TRI); MIB = AddDReg(MIB, DestReg, ARM::dsub_1, RegState::Define, TRI); @@ -882,7 +882,7 @@ MachineInstrBuilder MIB = AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VLDMD)) .addFrameIndex(FI) - .addImm(ARM_AM::getAM5Opc(ARM_AM::ia, 4))) + .addImm(ARM_AM::getAM4ModeImm(ARM_AM::ia))) .addMemOperand(MMO); MIB = AddDReg(MIB, DestReg, ARM::dsub_0, RegState::Define, TRI); MIB = AddDReg(MIB, DestReg, ARM::dsub_1, RegState::Define, TRI); Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=112322&r1=112321&r2=112322&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Fri Aug 27 18:18:17 2010 @@ -1549,7 +1549,7 @@ // Set addressing mode by modifying bits U(23) and P(24) const MachineOperand &MO = MI.getOperand(OpIdx++); - Binary |= getAddrModeUPBits(ARM_AM::getAM5SubMode(MO.getImm())); + Binary |= getAddrModeUPBits(ARM_AM::getAM4SubMode(MO.getImm())); // Set bit W(21) if (IsUpdating) @@ -1558,7 +1558,7 @@ // First register is encoded in Dd. Binary |= encodeVFPRd(MI, OpIdx+2); - // Number of registers are encoded in offset field. + // Count the number of registers. unsigned NumRegs = 1; for (unsigned i = OpIdx+3, e = MI.getNumOperands(); i != e; ++i) { const MachineOperand &MO = MI.getOperand(i); Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp?rev=112322&r1=112321&r2=112322&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp Fri Aug 27 18:18:17 2010 @@ -2052,15 +2052,15 @@ if (ResNode) return ResNode; - // VLDMQ must be custom-selected for "v2f64 load" to set the AM5Opc value. + // VLDMQ must be custom-selected for "v2f64 load" to set the AM4 value. if (Subtarget->hasVFP2() && N->getValueType(0).getSimpleVT().SimpleTy == MVT::v2f64) { SDValue Chain = N->getOperand(0); - SDValue AM5Opc = - CurDAG->getTargetConstant(ARM_AM::getAM5Opc(ARM_AM::ia, 4), MVT::i32); + SDValue AM4Imm = + CurDAG->getTargetConstant(ARM_AM::getAM4ModeImm(ARM_AM::ia), MVT::i32); SDValue Pred = getAL(CurDAG); SDValue PredReg = CurDAG->getRegister(0, MVT::i32); - SDValue Ops[] = { N->getOperand(1), AM5Opc, Pred, PredReg, Chain }; + SDValue Ops[] = { N->getOperand(1), AM4Imm, Pred, PredReg, Chain }; MachineSDNode::mmo_iterator MemOp = MF->allocateMemRefsArray(1); MemOp[0] = cast(N)->getMemOperand(); SDNode *Ret = CurDAG->getMachineNode(ARM::VLDMQ, dl, @@ -2072,16 +2072,16 @@ break; } case ISD::STORE: { - // VSTMQ must be custom-selected for "v2f64 store" to set the AM5Opc value. + // VSTMQ must be custom-selected for "v2f64 store" to set the AM4 value. if (Subtarget->hasVFP2() && N->getOperand(1).getValueType().getSimpleVT().SimpleTy == MVT::v2f64) { SDValue Chain = N->getOperand(0); - SDValue AM5Opc = - CurDAG->getTargetConstant(ARM_AM::getAM5Opc(ARM_AM::ia, 4), MVT::i32); + SDValue AM4Imm = + CurDAG->getTargetConstant(ARM_AM::getAM4ModeImm(ARM_AM::ia), MVT::i32); SDValue Pred = getAL(CurDAG); SDValue PredReg = CurDAG->getRegister(0, MVT::i32); SDValue Ops[] = { N->getOperand(1), N->getOperand(2), - AM5Opc, Pred, PredReg, Chain }; + AM4Imm, Pred, PredReg, Chain }; MachineSDNode::mmo_iterator MemOp = MF->allocateMemRefsArray(1); MemOp[0] = cast(N)->getMemOperand(); SDNode *Ret = CurDAG->getMachineNode(ARM::VSTMQ, dl, MVT::Other, Ops, 6); Modified: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrNEON.td?rev=112322&r1=112321&r2=112322&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrNEON.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Fri Aug 27 18:18:17 2010 @@ -129,9 +129,9 @@ // This is equivalent to VLDMD except that it has a Q register operand // instead of a pair of D registers. def VLDMQ - : AXDI5<(outs QPR:$dst), (ins addrmode5:$addr, pred:$p), + : AXDI5<(outs QPR:$dst), (ins addrmode4:$addr, pred:$p), IndexModeNone, IIC_fpLoadm, - "vldm${addr:submode}${p}\t${addr:base}, ${dst:dregpair}", "", []>; + "vldm${addr:submode}${p}\t$addr, ${dst:dregpair}", "", []>; // Use vld1 to load a Q register as a D register pair. // This alternative to VLDMQ allows an alignment to be specified. @@ -146,9 +146,9 @@ // This is equivalent to VSTMD except that it has a Q register operand // instead of a pair of D registers. def VSTMQ - : AXDI5<(outs), (ins QPR:$src, addrmode5:$addr, pred:$p), + : AXDI5<(outs), (ins QPR:$src, addrmode4:$addr, pred:$p), IndexModeNone, IIC_fpStorem, - "vstm${addr:submode}${p}\t${addr:base}, ${src:dregpair}", "", []>; + "vstm${addr:submode}${p}\t$addr, ${src:dregpair}", "", []>; // Use vst1 to store a Q register as a D register pair. // This alternative to VSTMQ allows an alignment to be specified. Modified: llvm/trunk/lib/Target/ARM/ARMInstrVFP.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrVFP.td?rev=112322&r1=112321&r2=112322&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrVFP.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrVFP.td Fri Aug 27 18:18:17 2010 @@ -77,61 +77,61 @@ // let mayLoad = 1, neverHasSideEffects = 1, hasExtraDefRegAllocReq = 1 in { -def VLDMD : AXDI5<(outs), (ins addrmode5:$addr, pred:$p, reglist:$dsts, +def VLDMD : AXDI5<(outs), (ins addrmode4:$addr, pred:$p, reglist:$dsts, variable_ops), IndexModeNone, IIC_fpLoadm, - "vldm${addr:submode}${p}\t${addr:base}, $dsts", "", []> { + "vldm${addr:submode}${p}\t$addr, $dsts", "", []> { let Inst{20} = 1; } -def VLDMS : AXSI5<(outs), (ins addrmode5:$addr, pred:$p, reglist:$dsts, +def VLDMS : AXSI5<(outs), (ins addrmode4:$addr, pred:$p, reglist:$dsts, variable_ops), IndexModeNone, IIC_fpLoadm, - "vldm${addr:submode}${p}\t${addr:base}, $dsts", "", []> { + "vldm${addr:submode}${p}\t$addr, $dsts", "", []> { let Inst{20} = 1; } -def VLDMD_UPD : AXDI5<(outs GPR:$wb), (ins addrmode5:$addr, pred:$p, +def VLDMD_UPD : AXDI5<(outs GPR:$wb), (ins addrmode4:$addr, pred:$p, reglist:$dsts, variable_ops), IndexModeUpd, IIC_fpLoadm, - "vldm${addr:submode}${p}\t${addr:base}!, $dsts", - "$addr.base = $wb", []> { + "vldm${addr:submode}${p}\t$addr!, $dsts", + "$addr.addr = $wb", []> { let Inst{20} = 1; } -def VLDMS_UPD : AXSI5<(outs GPR:$wb), (ins addrmode5:$addr, pred:$p, +def VLDMS_UPD : AXSI5<(outs GPR:$wb), (ins addrmode4:$addr, pred:$p, reglist:$dsts, variable_ops), IndexModeUpd, IIC_fpLoadm, - "vldm${addr:submode}${p}\t${addr:base}!, $dsts", - "$addr.base = $wb", []> { + "vldm${addr:submode}${p}\t$addr!, $dsts", + "$addr.addr = $wb", []> { let Inst{20} = 1; } } // mayLoad, neverHasSideEffects, hasExtraDefRegAllocReq let mayStore = 1, neverHasSideEffects = 1, hasExtraSrcRegAllocReq = 1 in { -def VSTMD : AXDI5<(outs), (ins addrmode5:$addr, pred:$p, reglist:$srcs, +def VSTMD : AXDI5<(outs), (ins addrmode4:$addr, pred:$p, reglist:$srcs, variable_ops), IndexModeNone, IIC_fpStorem, - "vstm${addr:submode}${p}\t${addr:base}, $srcs", "", []> { + "vstm${addr:submode}${p}\t$addr, $srcs", "", []> { let Inst{20} = 0; } -def VSTMS : AXSI5<(outs), (ins addrmode5:$addr, pred:$p, reglist:$srcs, +def VSTMS : AXSI5<(outs), (ins addrmode4:$addr, pred:$p, reglist:$srcs, variable_ops), IndexModeNone, IIC_fpStorem, - "vstm${addr:submode}${p}\t${addr:base}, $srcs", "", []> { + "vstm${addr:submode}${p}\t$addr, $srcs", "", []> { let Inst{20} = 0; } -def VSTMD_UPD : AXDI5<(outs GPR:$wb), (ins addrmode5:$addr, pred:$p, +def VSTMD_UPD : AXDI5<(outs GPR:$wb), (ins addrmode4:$addr, pred:$p, reglist:$srcs, variable_ops), IndexModeUpd, IIC_fpStorem, - "vstm${addr:submode}${p}\t${addr:base}!, $srcs", - "$addr.base = $wb", []> { + "vstm${addr:submode}${p}\t$addr!, $srcs", + "$addr.addr = $wb", []> { let Inst{20} = 0; } -def VSTMS_UPD : AXSI5<(outs GPR:$wb), (ins addrmode5:$addr, pred:$p, +def VSTMS_UPD : AXSI5<(outs GPR:$wb), (ins addrmode4:$addr, pred:$p, reglist:$srcs, variable_ops), IndexModeUpd, IIC_fpStorem, - "vstm${addr:submode}${p}\t${addr:base}!, $srcs", - "$addr.base = $wb", []> { + "vstm${addr:submode}${p}\t$addr!, $srcs", + "$addr.addr = $wb", []> { let Inst{20} = 0; } } // mayStore, neverHasSideEffects, hasExtraSrcRegAllocReq Modified: llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp?rev=112322&r1=112321&r2=112322&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Fri Aug 27 18:18:17 2010 @@ -193,18 +193,18 @@ return false; ARM_AM::AMSubMode Mode = ARM_AM::ia; - bool isAM4 = isi32Load(Opcode) || isi32Store(Opcode); - if (isAM4 && Offset == 4) { + bool isNotVFP = isi32Load(Opcode) || isi32Store(Opcode); + if (isNotVFP && Offset == 4) { if (isThumb2) // Thumb2 does not support ldmib / stmib. return false; Mode = ARM_AM::ib; - } else if (isAM4 && Offset == -4 * (int)NumRegs + 4) { + } else if (isNotVFP && Offset == -4 * (int)NumRegs + 4) { if (isThumb2) // Thumb2 does not support ldmda / stmda. return false; Mode = ARM_AM::da; - } else if (isAM4 && Offset == -4 * (int)NumRegs) { + } else if (isNotVFP && Offset == -4 * (int)NumRegs) { Mode = ARM_AM::db; } else if (Offset != 0) { // If starting offset isn't zero, insert a MI to materialize a new base. @@ -246,18 +246,12 @@ BaseKill = true; // New base is always killed right its use. } - bool isDPR = (Opcode == ARM::VLDRD || Opcode == ARM::VSTRD); bool isDef = (isi32Load(Opcode) || Opcode == ARM::VLDRS || Opcode == ARM::VLDRD); Opcode = getLoadStoreMultipleOpcode(Opcode); - MachineInstrBuilder MIB = (isAM4) - ? BuildMI(MBB, MBBI, dl, TII->get(Opcode)) - .addReg(Base, getKillRegState(BaseKill)) - .addImm(ARM_AM::getAM4ModeImm(Mode)).addImm(Pred).addReg(PredReg) - : BuildMI(MBB, MBBI, dl, TII->get(Opcode)) - .addReg(Base, getKillRegState(BaseKill)) - .addImm(ARM_AM::getAM5Opc(Mode, isDPR ? NumRegs<<1 : NumRegs)) - .addImm(Pred).addReg(PredReg); + MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII->get(Opcode)) + .addReg(Base, getKillRegState(BaseKill)) + .addImm(ARM_AM::getAM4ModeImm(Mode)).addImm(Pred).addReg(PredReg); for (unsigned i = 0; i != NumRegs; ++i) MIB = MIB.addReg(Regs[i].first, getDefRegState(isDef) | getKillRegState(Regs[i].second)); @@ -348,7 +342,7 @@ ARMCC::CondCodes Pred, unsigned PredReg, unsigned Scratch, MemOpQueue &MemOps, SmallVector &Merges) { - bool isAM4 = isi32Load(Opcode) || isi32Store(Opcode); + bool isNotVFP = isi32Load(Opcode) || isi32Store(Opcode); int Offset = MemOps[SIndex].Offset; int SOffset = Offset; unsigned insertAfter = SIndex; @@ -366,12 +360,12 @@ unsigned Reg = MO.getReg(); unsigned RegNum = MO.isUndef() ? UINT_MAX : ARMRegisterInfo::getRegisterNumbering(Reg); - // AM4 - register numbers in ascending order. - // AM5 - consecutive register numbers in ascending order. - // Can only do up to 16 double-word registers per insn. + // Register numbers must be in ascending order. For VFP, the registers + // must also be consecutive and there is a limit of 16 double-word + // registers per instruction. if (Reg != ARM::SP && NewOffset == Offset + (int)Size && - ((isAM4 && RegNum > PRegNum) + ((isNotVFP && RegNum > PRegNum) || ((Size < 8 || Count < 16) && RegNum == PRegNum+1))) { Offset += Size; PRegNum = RegNum; @@ -464,12 +458,11 @@ case ARM::STM: case ARM::t2LDM: case ARM::t2STM: - return (MI->getNumOperands() - 4) * 4; case ARM::VLDMS: case ARM::VSTMS: case ARM::VLDMD: case ARM::VSTMD: - return ARM_AM::getAM5Offset(MI->getOperand(1).getImm()) * 4; + return (MI->getNumOperands() - 4) * 4; } } @@ -512,26 +505,17 @@ ARMCC::CondCodes Pred = llvm::getInstrPredicate(MI, PredReg); int Opcode = MI->getOpcode(); DebugLoc dl = MI->getDebugLoc(); - bool isAM4 = (Opcode == ARM::LDM || Opcode == ARM::t2LDM || - Opcode == ARM::STM || Opcode == ARM::t2STM); bool DoMerge = false; ARM_AM::AMSubMode Mode = ARM_AM::ia; - unsigned Offset = 0; - if (isAM4) { - // Can't use an updating ld/st if the base register is also a dest - // register. e.g. ldmdb r0!, {r0, r1, r2}. The behavior is undefined. - for (unsigned i = 3, e = MI->getNumOperands(); i != e; ++i) { - if (MI->getOperand(i).getReg() == Base) - return false; - } - Mode = ARM_AM::getAM4SubMode(MI->getOperand(1).getImm()); - } else { - // VLDM{D|S}, VSTM{D|S} addressing mode 5 ops. - Mode = ARM_AM::getAM5SubMode(MI->getOperand(1).getImm()); - Offset = ARM_AM::getAM5Offset(MI->getOperand(1).getImm()); + // Can't use an updating ld/st if the base register is also a dest + // register. e.g. ldmdb r0!, {r0, r1, r2}. The behavior is undefined. + for (unsigned i = 3, e = MI->getNumOperands(); i != e; ++i) { + if (MI->getOperand(i).getReg() == Base) + return false; } + Mode = ARM_AM::getAM4SubMode(MI->getOperand(1).getImm()); // Try merging with the previous instruction. MachineBasicBlock::iterator BeginMBBI = MBB.begin(); @@ -539,22 +523,14 @@ MachineBasicBlock::iterator PrevMBBI = prior(MBBI); while (PrevMBBI != BeginMBBI && PrevMBBI->isDebugValue()) --PrevMBBI; - if (isAM4) { - if (Mode == ARM_AM::ia && - isMatchingDecrement(PrevMBBI, Base, Bytes, 0, Pred, PredReg)) { - DoMerge = true; - Mode = ARM_AM::db; - } else if (isAM4 && Mode == ARM_AM::ib && - isMatchingDecrement(PrevMBBI, Base, Bytes, 0, Pred, PredReg)) { - DoMerge = true; - Mode = ARM_AM::da; - } - } else { - if (Mode == ARM_AM::ia && - isMatchingDecrement(PrevMBBI, Base, Bytes, 0, Pred, PredReg)) { - Mode = ARM_AM::db; - DoMerge = true; - } + if (Mode == ARM_AM::ia && + isMatchingDecrement(PrevMBBI, Base, Bytes, 0, Pred, PredReg)) { + Mode = ARM_AM::db; + DoMerge = true; + } else if (Mode == ARM_AM::ib && + isMatchingDecrement(PrevMBBI, Base, Bytes, 0, Pred, PredReg)) { + Mode = ARM_AM::da; + DoMerge = true; } if (DoMerge) MBB.erase(PrevMBBI); @@ -566,19 +542,12 @@ MachineBasicBlock::iterator NextMBBI = llvm::next(MBBI); while (NextMBBI != EndMBBI && NextMBBI->isDebugValue()) ++NextMBBI; - if (isAM4) { - if ((Mode == ARM_AM::ia || Mode == ARM_AM::ib) && - isMatchingIncrement(NextMBBI, Base, Bytes, 0, Pred, PredReg)) { - DoMerge = true; - } else if ((Mode == ARM_AM::da || Mode == ARM_AM::db) && - isMatchingDecrement(NextMBBI, Base, Bytes, 0, Pred, PredReg)) { - DoMerge = true; - } - } else { - if (Mode == ARM_AM::ia && - isMatchingIncrement(NextMBBI, Base, Bytes, 0, Pred, PredReg)) { - DoMerge = true; - } + if ((Mode == ARM_AM::ia || Mode == ARM_AM::ib) && + isMatchingIncrement(NextMBBI, Base, Bytes, 0, Pred, PredReg)) { + DoMerge = true; + } else if ((Mode == ARM_AM::da || Mode == ARM_AM::db) && + isMatchingDecrement(NextMBBI, Base, Bytes, 0, Pred, PredReg)) { + DoMerge = true; } if (DoMerge) { if (NextMBBI == I) { @@ -595,16 +564,9 @@ unsigned NewOpc = getUpdatingLSMultipleOpcode(Opcode); MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII->get(NewOpc)) .addReg(Base, getDefRegState(true)) // WB base register - .addReg(Base, getKillRegState(BaseKill)); - if (isAM4) { - // [t2]LDM_UPD, [t2]STM_UPD - MIB.addImm(ARM_AM::getAM4ModeImm(Mode)) - .addImm(Pred).addReg(PredReg); - } else { - // VLDM[SD}_UPD, VSTM[SD]_UPD - MIB.addImm(ARM_AM::getAM5Opc(Mode, Offset)) - .addImm(Pred).addReg(PredReg); - } + .addReg(Base, getKillRegState(BaseKill)) + .addImm(ARM_AM::getAM4ModeImm(Mode)) + .addImm(Pred).addReg(PredReg); // Transfer the rest of operands. for (unsigned OpNum = 4, e = MI->getNumOperands(); OpNum != e; ++OpNum) MIB.addOperand(MI->getOperand(OpNum)); @@ -736,11 +698,10 @@ if (!DoMerge) return false; - bool isDPR = NewOpc == ARM::VLDMD || NewOpc == ARM::VSTMD; unsigned Offset = 0; if (isAM5) - Offset = ARM_AM::getAM5Opc(AddSub == ARM_AM::sub ? ARM_AM::db : ARM_AM::ia, - (isDPR ? 2 : 1)); + Offset = ARM_AM::getAM4ModeImm(AddSub == ARM_AM::sub ? + ARM_AM::db : ARM_AM::ia); else if (isAM2) Offset = ARM_AM::getAM2Opc(AddSub, Bytes, ARM_AM::no_shift); else @@ -748,6 +709,9 @@ if (isAM5) { // VLDM[SD}_UPD, VSTM[SD]_UPD + // (There are no base-updating versions of VLDR/VSTR instructions, but the + // updating load/store-multiple instructions can be used with only one + // register.) MachineOperand &MO = MI->getOperand(0); BuildMI(MBB, MBBI, dl, TII->get(NewOpc)) .addReg(Base, getDefRegState(true)) // WB base register Modified: llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp?rev=112322&r1=112321&r2=112322&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp (original) +++ llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp Fri Aug 27 18:18:17 2010 @@ -158,7 +158,7 @@ if ((MI->getOpcode() == ARM::VSTMS_UPD || MI->getOpcode() ==ARM::VSTMD_UPD) && MI->getOperand(0).getReg() == ARM::SP) { const MCOperand &MO1 = MI->getOperand(2); - if (ARM_AM::getAM5SubMode(MO1.getImm()) == ARM_AM::db) { + if (ARM_AM::getAM4SubMode(MO1.getImm()) == ARM_AM::db) { O << '\t' << "vpush"; printPredicateOperand(MI, 3, O); O << '\t'; @@ -171,7 +171,7 @@ if ((MI->getOpcode() == ARM::VLDMS_UPD || MI->getOpcode() ==ARM::VLDMD_UPD) && MI->getOperand(0).getReg() == ARM::SP) { const MCOperand &MO1 = MI->getOperand(2); - if (ARM_AM::getAM5SubMode(MO1.getImm()) == ARM_AM::ia) { + if (ARM_AM::getAM4SubMode(MO1.getImm()) == ARM_AM::ia) { O << '\t' << "vpop"; printPredicateOperand(MI, 3, O); O << '\t'; @@ -412,16 +412,6 @@ return; } - if (Modifier && strcmp(Modifier, "submode") == 0) { - ARM_AM::AMSubMode Mode = ARM_AM::getAM5SubMode(MO2.getImm()); - O << ARM_AM::getAMSubModeStr(Mode); - return; - } else if (Modifier && strcmp(Modifier, "base") == 0) { - // Used for FSTM{D|S} and LSTM{D|S} operations. - O << getRegisterName(MO1.getReg()); - return; - } - O << "[" << getRegisterName(MO1.getReg()); if (unsigned ImmOffs = ARM_AM::getAM5Offset(MO2.getImm())) { Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp?rev=112322&r1=112321&r2=112322&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp (original) +++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp Fri Aug 27 18:18:17 2010 @@ -1863,7 +1863,7 @@ assert(NumOps >= 3 && "VFPLdStFrm expects NumOps >= 3"); - bool isSPVFP = (Opcode == ARM::VLDRS || Opcode == ARM::VSTRS) ? true : false; + bool isSPVFP = (Opcode == ARM::VLDRS || Opcode == ARM::VSTRS); unsigned RegClassID = isSPVFP ? ARM::SPRRegClassID : ARM::DPRRegClassID; // Extract Dd/Sd for operand 0. @@ -1886,7 +1886,7 @@ // VFP Load/Store Multiple Instructions. // This is similar to the algorithm for LDM/STM in that operand 0 (the base) and -// operand 1 (the AM5 mode imm) is followed by two predicate operands. It is +// operand 1 (the AM4 mode imm) is followed by two predicate operands. It is // followed by a reglist of either DPR(s) or SPR(s). // // VLDMD[_UPD], VLDMS[_UPD], VSTMD[_UPD], VSTMS[_UPD] @@ -1910,16 +1910,14 @@ MI.addOperand(MCOperand::CreateReg(Base)); - // Next comes the AM5 Opcode. + // Next comes the AM4 Opcode. ARM_AM::AMSubMode SubMode = getAMSubModeForBits(getPUBits(insn)); // Must be either "ia" or "db" submode. if (SubMode != ARM_AM::ia && SubMode != ARM_AM::db) { - DEBUG(errs() << "Illegal addressing mode 5 sub-mode!\n"); + DEBUG(errs() << "Illegal addressing mode 4 sub-mode!\n"); return false; } - - unsigned char Imm8 = insn & 0xFF; - MI.addOperand(MCOperand::CreateImm(ARM_AM::getAM5Opc(SubMode, Imm8))); + MI.addOperand(MCOperand::CreateImm(ARM_AM::getAM4ModeImm(SubMode))); // Handling the two predicate operands before the reglist. int64_t CondVal = insn >> ARMII::CondShift; @@ -1929,13 +1927,14 @@ OpIdx += 4; bool isSPVFP = (Opcode == ARM::VLDMS || Opcode == ARM::VLDMS_UPD || - Opcode == ARM::VSTMS || Opcode == ARM::VSTMS_UPD) ? true : false; + Opcode == ARM::VSTMS || Opcode == ARM::VSTMS_UPD); unsigned RegClassID = isSPVFP ? ARM::SPRRegClassID : ARM::DPRRegClassID; // Extract Dd/Sd. unsigned RegD = decodeVFPRd(insn, isSPVFP); // Fill the variadic part of reglist. + unsigned char Imm8 = insn & 0xFF; unsigned Regs = isSPVFP ? Imm8 : Imm8/2; for (unsigned i = 0; i < Regs; ++i) { MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, RegClassID, Modified: llvm/trunk/test/CodeGen/ARM/vst3.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vst3.ll?rev=112322&r1=112321&r2=112322&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/ARM/vst3.ll (original) +++ llvm/trunk/test/CodeGen/ARM/vst3.ll Fri Aug 27 18:18:17 2010 @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s +; RUN: llc < %s -march=arm -mattr=+neon -O0 | FileCheck %s define void @vst3i8(i8* %A, <8 x i8>* %B) nounwind { ;CHECK: vst3i8: From resistor at mac.com Fri Aug 27 18:29:38 2010 From: resistor at mac.com (Owen Anderson) Date: Fri, 27 Aug 2010 23:29:38 -0000 Subject: [llvm-commits] [llvm] r112323 - /llvm/trunk/lib/Analysis/LazyValueInfo.cpp Message-ID: <20100827232938.7FC082A6C12C@llvm.org> Author: resistor Date: Fri Aug 27 18:29:38 2010 New Revision: 112323 URL: http://llvm.org/viewvc/llvm-project?rev=112323&view=rev Log: Improve the precision of getConstant(). Modified: llvm/trunk/lib/Analysis/LazyValueInfo.cpp Modified: llvm/trunk/lib/Analysis/LazyValueInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/LazyValueInfo.cpp?rev=112323&r1=112322&r2=112323&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/LazyValueInfo.cpp (original) +++ llvm/trunk/lib/Analysis/LazyValueInfo.cpp Fri Aug 27 18:29:38 2010 @@ -846,6 +846,11 @@ if (Result.isConstant()) return Result.getConstant(); + else if (Result.isConstantRange()) { + ConstantRange CR = Result.getConstantRange(); + if (const APInt *SingleVal = CR.getSingleElement()) + return ConstantInt::get(V->getContext(), *SingleVal); + } return 0; } From resistor at mac.com Fri Aug 27 18:31:36 2010 From: resistor at mac.com (Owen Anderson) Date: Fri, 27 Aug 2010 23:31:36 -0000 Subject: [llvm-commits] [llvm] r112325 - in /llvm/trunk: include/llvm/LinkAllPasses.h include/llvm/Transforms/Scalar.h lib/Transforms/Scalar/ValuePropagation.cpp test/Transforms/ValuePropagation/ test/Transforms/ValuePropagation/dg.exp test/Transforms/ValuePropagation/phi.ll test/Transforms/ValuePropagation/select.ll Message-ID: <20100827233136.5F7A72A6C12C@llvm.org> Author: resistor Date: Fri Aug 27 18:31:36 2010 New Revision: 112325 URL: http://llvm.org/viewvc/llvm-project?rev=112325&view=rev Log: Add a prototype of a new peephole optimizing pass that uses LazyValue info to simplify PHIs and select's. This pass addresses the missed optimizations from PR2581 and PR4420. Added: llvm/trunk/lib/Transforms/Scalar/ValuePropagation.cpp llvm/trunk/test/Transforms/ValuePropagation/ llvm/trunk/test/Transforms/ValuePropagation/dg.exp llvm/trunk/test/Transforms/ValuePropagation/phi.ll llvm/trunk/test/Transforms/ValuePropagation/select.ll Modified: llvm/trunk/include/llvm/LinkAllPasses.h llvm/trunk/include/llvm/Transforms/Scalar.h Modified: llvm/trunk/include/llvm/LinkAllPasses.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/LinkAllPasses.h?rev=112325&r1=112324&r2=112325&view=diff ============================================================================== --- llvm/trunk/include/llvm/LinkAllPasses.h (original) +++ llvm/trunk/include/llvm/LinkAllPasses.h Fri Aug 27 18:31:36 2010 @@ -149,6 +149,7 @@ (void) llvm::createLintPass(); (void) llvm::createSinkingPass(); (void) llvm::createLowerAtomicPass(); + (void) llvm::createValuePropagationPass(); (void)new llvm::IntervalPartition(); (void)new llvm::FindUsedTypes(); Modified: llvm/trunk/include/llvm/Transforms/Scalar.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Transforms/Scalar.h?rev=112325&r1=112324&r2=112325&view=diff ============================================================================== --- llvm/trunk/include/llvm/Transforms/Scalar.h (original) +++ llvm/trunk/include/llvm/Transforms/Scalar.h Fri Aug 27 18:31:36 2010 @@ -343,6 +343,12 @@ // Pass *createLowerAtomicPass(); +//===----------------------------------------------------------------------===// +// +// ValuePropagation - Propagate CFG-derived value information +// +Pass *createValuePropagationPass(); + } // End llvm namespace #endif Added: llvm/trunk/lib/Transforms/Scalar/ValuePropagation.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/ValuePropagation.cpp?rev=112325&view=auto ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/ValuePropagation.cpp (added) +++ llvm/trunk/lib/Transforms/Scalar/ValuePropagation.cpp Fri Aug 27 18:31:36 2010 @@ -0,0 +1,113 @@ +//===- ValuePropagation.cpp - Propagate information derived control flow --===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements the Value Propagation pass. +// +//===----------------------------------------------------------------------===// + +#define DEBUG_TYPE "value-propagation" +#include "llvm/Transforms/Scalar.h" +#include "llvm/Function.h" +#include "llvm/Instructions.h" +#include "llvm/Pass.h" +#include "llvm/Analysis/LazyValueInfo.h" +#include "llvm/Transforms/Utils/Local.h" +using namespace llvm; + +namespace { + class ValuePropagation : public FunctionPass { + LazyValueInfo *LVI; + + bool processSelect(SelectInst *SI); + bool processPHI(PHINode *P); + + public: + static char ID; + ValuePropagation(): FunctionPass(ID) { } + + bool runOnFunction(Function &F); + + virtual void getAnalysisUsage(AnalysisUsage &AU) const { + AU.addRequired(); + } + }; +} + +char ValuePropagation::ID = 0; +INITIALIZE_PASS(ValuePropagation, "value-propagation", + "Value Propagation", false, false); + +// Public interface to the Value Propagation pass +Pass *llvm::createValuePropagationPass() { + return new ValuePropagation(); +} + +bool ValuePropagation::processSelect(SelectInst *S) { + Constant *C = LVI->getConstant(S->getOperand(0), S->getParent()); + if (!C) return false; + + ConstantInt *CI = dyn_cast(C); + if (!CI) return false; + + if (CI->isZero()) { + S->replaceAllUsesWith(S->getOperand(2)); + S->eraseFromParent(); + } else if (CI->isOne()) { + S->replaceAllUsesWith(S->getOperand(1)); + S->eraseFromParent(); + } else { + assert(0 && "Select on constant is neither 0 nor 1?"); + } + + return true; +} + +bool ValuePropagation::processPHI(PHINode *P) { + bool changed = false; + + BasicBlock *BB = P->getParent(); + for (unsigned i = 0; i < P->getNumIncomingValues(); ++i) { + Constant *C = LVI->getConstantOnEdge(P->getIncomingValue(i), + P->getIncomingBlock(i), + BB); + if (!C || C == P->getIncomingValue(i)) continue; + + P->setIncomingValue(i, C); + changed = true; + } + + if (Value *ConstVal = P->hasConstantValue()) { + P->replaceAllUsesWith(ConstVal); + P->eraseFromParent(); + changed = true; + } + + return changed; +} + +bool ValuePropagation::runOnFunction(Function &F) { + LVI = &getAnalysis(); + + bool changed = false; + + for (Function::iterator FI = F.begin(), FE = F.end(); FI != FE; ++FI) + for (BasicBlock::iterator BI = FI->begin(), BE = FI->end(); BI != BE; ) { + Instruction *II = BI++; + if (SelectInst *SI = dyn_cast(II)) + changed |= processSelect(SI); + else if (PHINode *P = dyn_cast(II)) + changed |= processPHI(P); + } + + if (changed) + for (Function::iterator FI = F.begin(), FE = F.end(); FI != FE; ++FI) + SimplifyInstructionsInBlock(FI); + + return changed; +} \ No newline at end of file Added: llvm/trunk/test/Transforms/ValuePropagation/dg.exp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/ValuePropagation/dg.exp?rev=112325&view=auto ============================================================================== --- llvm/trunk/test/Transforms/ValuePropagation/dg.exp (added) +++ llvm/trunk/test/Transforms/ValuePropagation/dg.exp Fri Aug 27 18:31:36 2010 @@ -0,0 +1,3 @@ +load_lib llvm.exp + +RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.ll]] Added: llvm/trunk/test/Transforms/ValuePropagation/phi.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/ValuePropagation/phi.ll?rev=112325&view=auto ============================================================================== --- llvm/trunk/test/Transforms/ValuePropagation/phi.ll (added) +++ llvm/trunk/test/Transforms/ValuePropagation/phi.ll Fri Aug 27 18:31:36 2010 @@ -0,0 +1,17 @@ +; RUN: opt < %s -value-propagation -S | FileCheck %s +; PR2581 + +; CHECK: @run +define i32 @run(i1 %C) nounwind { + br i1 %C, label %exit, label %body + +body: ; preds = %0 +; CHECK-NOT: select + %A = select i1 %C, i32 10, i32 11 ; [#uses=1] +; CHECK: ret i32 11 + ret i32 %A + +exit: ; preds = %0 +; CHECK: ret i32 10 + ret i32 10 +} \ No newline at end of file Added: llvm/trunk/test/Transforms/ValuePropagation/select.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/ValuePropagation/select.ll?rev=112325&view=auto ============================================================================== --- llvm/trunk/test/Transforms/ValuePropagation/select.ll (added) +++ llvm/trunk/test/Transforms/ValuePropagation/select.ll Fri Aug 27 18:31:36 2010 @@ -0,0 +1,25 @@ +; RUN: opt < %s -value-propagation -S | FileCheck %s +; PR4420 + +declare i1 @ext() +; CHECK: @foo +define i1 @foo() { +entry: + %cond = tail call i1 @ext() ; [#uses=2] + br i1 %cond, label %bb1, label %bb2 + +bb1: ; preds = %entry + %cond2 = tail call i1 @ext() ; [#uses=1] + br i1 %cond2, label %bb3, label %bb2 + +bb2: ; preds = %bb1, %entry +; CHECK-NOT: phi i1 + %cond_merge = phi i1 [ %cond, %entry ], [ false, %bb1 ] ; [#uses=1] +; CHECK: ret i1 false + ret i1 %cond_merge + +bb3: ; preds = %bb1 + %res = tail call i1 @ext() ; [#uses=1] +; CHECK: ret i1 %res + ret i1 %res +} \ No newline at end of file From bob.wilson at apple.com Fri Aug 27 18:57:52 2010 From: bob.wilson at apple.com (Bob Wilson) Date: Fri, 27 Aug 2010 23:57:52 -0000 Subject: [llvm-commits] [llvm] r112329 - /llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Message-ID: <20100827235752.4A85E2A6C12C@llvm.org> Author: bwilson Date: Fri Aug 27 18:57:52 2010 New Revision: 112329 URL: http://llvm.org/viewvc/llvm-project?rev=112329&view=rev Log: When merging Thumb2 loads/stores, do not give up when the offset is one of the special values that for ARM would be used with IB or DA modes. Fall through and consider materializing a new base address is it would be profitable. Modified: llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Modified: llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp?rev=112329&r1=112328&r2=112329&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Fri Aug 27 18:57:52 2010 @@ -193,20 +193,17 @@ return false; ARM_AM::AMSubMode Mode = ARM_AM::ia; + // VFP and Thumb2 do not support IB or DA modes. bool isNotVFP = isi32Load(Opcode) || isi32Store(Opcode); - if (isNotVFP && Offset == 4) { - if (isThumb2) - // Thumb2 does not support ldmib / stmib. - return false; + bool haveIBAndDA = isNotVFP && !isThumb2; + if (Offset == 4 && haveIBAndDA) Mode = ARM_AM::ib; - } else if (isNotVFP && Offset == -4 * (int)NumRegs + 4) { - if (isThumb2) - // Thumb2 does not support ldmda / stmda. - return false; + else if (Offset == -4 * (int)NumRegs + 4 && haveIBAndDA) Mode = ARM_AM::da; - } else if (isNotVFP && Offset == -4 * (int)NumRegs) { + else if (Offset == -4 * (int)NumRegs && isNotVFP) + // VLDM/VSTM do not support DB mode without also updating the base reg. Mode = ARM_AM::db; - } else if (Offset != 0) { + else if (Offset != 0) { // If starting offset isn't zero, insert a MI to materialize a new base. // But only do so if it is cost effective, i.e. merging more than two // loads / stores. From benny.kra at googlemail.com Fri Aug 27 19:11:12 2010 From: benny.kra at googlemail.com (Benjamin Kramer) Date: Sat, 28 Aug 2010 00:11:12 -0000 Subject: [llvm-commits] [llvm] r112332 - in /llvm/trunk/lib/Transforms/Scalar: CMakeLists.txt ValuePropagation.cpp Message-ID: <20100828001112.EC6402A6C12C@llvm.org> Author: d0k Date: Fri Aug 27 19:11:12 2010 New Revision: 112332 URL: http://llvm.org/viewvc/llvm-project?rev=112332&view=rev Log: Update CMake build. Add newline at end of file. Modified: llvm/trunk/lib/Transforms/Scalar/CMakeLists.txt llvm/trunk/lib/Transforms/Scalar/ValuePropagation.cpp Modified: llvm/trunk/lib/Transforms/Scalar/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/CMakeLists.txt?rev=112332&r1=112331&r2=112332&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/CMakeLists.txt (original) +++ llvm/trunk/lib/Transforms/Scalar/CMakeLists.txt Fri Aug 27 19:11:12 2010 @@ -30,6 +30,7 @@ Sink.cpp TailDuplication.cpp TailRecursionElimination.cpp + ValuePropagation.cpp ) target_link_libraries (LLVMScalarOpts LLVMTransformUtils) Modified: llvm/trunk/lib/Transforms/Scalar/ValuePropagation.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/ValuePropagation.cpp?rev=112332&r1=112331&r2=112332&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/ValuePropagation.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/ValuePropagation.cpp Fri Aug 27 19:11:12 2010 @@ -110,4 +110,4 @@ SimplifyInstructionsInBlock(FI); return changed; -} \ No newline at end of file +} From bob.wilson at apple.com Fri Aug 27 19:20:11 2010 From: bob.wilson at apple.com (Bob Wilson) Date: Sat, 28 Aug 2010 00:20:11 -0000 Subject: [llvm-commits] [llvm] r112336 - in /llvm/trunk/lib/Target/ARM: ARMISelDAGToDAG.cpp ARMInstrNEON.td Message-ID: <20100828002011.77DC12A6C12C@llvm.org> Author: bwilson Date: Fri Aug 27 19:20:11 2010 New Revision: 112336 URL: http://llvm.org/viewvc/llvm-project?rev=112336&view=rev Log: We don't need to custom-select VLDMQ and VSTMQ anymore. Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp?rev=112336&r1=112335&r2=112336&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp (original) +++ llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp Fri Aug 27 19:20:11 2010 @@ -481,7 +481,7 @@ bool ARMDAGToDAGISel::SelectAddrMode4(SDNode *Op, SDValue N, SDValue &Addr, SDValue &Mode) { Addr = N; - Mode = CurDAG->getTargetConstant(0, MVT::i32); + Mode = CurDAG->getTargetConstant(ARM_AM::getAM4ModeImm(ARM_AM::ia), MVT::i32); return true; } @@ -2051,43 +2051,6 @@ ResNode = SelectARMIndexedLoad(N); if (ResNode) return ResNode; - - // VLDMQ must be custom-selected for "v2f64 load" to set the AM4 value. - if (Subtarget->hasVFP2() && - N->getValueType(0).getSimpleVT().SimpleTy == MVT::v2f64) { - SDValue Chain = N->getOperand(0); - SDValue AM4Imm = - CurDAG->getTargetConstant(ARM_AM::getAM4ModeImm(ARM_AM::ia), MVT::i32); - SDValue Pred = getAL(CurDAG); - SDValue PredReg = CurDAG->getRegister(0, MVT::i32); - SDValue Ops[] = { N->getOperand(1), AM4Imm, Pred, PredReg, Chain }; - MachineSDNode::mmo_iterator MemOp = MF->allocateMemRefsArray(1); - MemOp[0] = cast(N)->getMemOperand(); - SDNode *Ret = CurDAG->getMachineNode(ARM::VLDMQ, dl, - MVT::v2f64, MVT::Other, Ops, 5); - cast(Ret)->setMemRefs(MemOp, MemOp + 1); - return Ret; - } - // Other cases are autogenerated. - break; - } - case ISD::STORE: { - // VSTMQ must be custom-selected for "v2f64 store" to set the AM4 value. - if (Subtarget->hasVFP2() && - N->getOperand(1).getValueType().getSimpleVT().SimpleTy == MVT::v2f64) { - SDValue Chain = N->getOperand(0); - SDValue AM4Imm = - CurDAG->getTargetConstant(ARM_AM::getAM4ModeImm(ARM_AM::ia), MVT::i32); - SDValue Pred = getAL(CurDAG); - SDValue PredReg = CurDAG->getRegister(0, MVT::i32); - SDValue Ops[] = { N->getOperand(1), N->getOperand(2), - AM4Imm, Pred, PredReg, Chain }; - MachineSDNode::mmo_iterator MemOp = MF->allocateMemRefsArray(1); - MemOp[0] = cast(N)->getMemOperand(); - SDNode *Ret = CurDAG->getMachineNode(ARM::VSTMQ, dl, MVT::Other, Ops, 6); - cast(Ret)->setMemRefs(MemOp, MemOp + 1); - return Ret; - } // Other cases are autogenerated. break; } Modified: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrNEON.td?rev=112336&r1=112335&r2=112336&view=diff ============================================================================== --- llvm/trunk/lib/Target/ARM/ARMInstrNEON.td (original) +++ llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Fri Aug 27 19:20:11 2010 @@ -124,15 +124,16 @@ // NEON load / store instructions //===----------------------------------------------------------------------===// -let mayLoad = 1, neverHasSideEffects = 1 in { // Use vldmia to load a Q register as a D register pair. // This is equivalent to VLDMD except that it has a Q register operand // instead of a pair of D registers. def VLDMQ : AXDI5<(outs QPR:$dst), (ins addrmode4:$addr, pred:$p), IndexModeNone, IIC_fpLoadm, - "vldm${addr:submode}${p}\t$addr, ${dst:dregpair}", "", []>; + "vldm${addr:submode}${p}\t$addr, ${dst:dregpair}", "", + [(set QPR:$dst, (v2f64 (load addrmode4:$addr)))]>; +let mayLoad = 1, neverHasSideEffects = 1 in { // Use vld1 to load a Q register as a D register pair. // This alternative to VLDMQ allows an alignment to be specified. // This is equivalent to VLD1q64 except that it has a Q register operand. @@ -141,15 +142,16 @@ IIC_VLD1, "vld1", "64", "${dst:dregpair}, $addr", "", []>; } // mayLoad = 1, neverHasSideEffects = 1 -let mayStore = 1, neverHasSideEffects = 1 in { // Use vstmia to store a Q register as a D register pair. // This is equivalent to VSTMD except that it has a Q register operand // instead of a pair of D registers. def VSTMQ : AXDI5<(outs), (ins QPR:$src, addrmode4:$addr, pred:$p), IndexModeNone, IIC_fpStorem, - "vstm${addr:submode}${p}\t$addr, ${src:dregpair}", "", []>; + "vstm${addr:submode}${p}\t$addr, ${src:dregpair}", "", + [(store (v2f64 QPR:$src), addrmode4:$addr)]>; +let mayStore = 1, neverHasSideEffects = 1 in { // Use vst1 to store a Q register as a D register pair. // This alternative to VSTMQ allows an alignment to be specified. // This is equivalent to VST1q64 except that it has a Q register operand. From gohman at apple.com Fri Aug 27 19:39:27 2010 From: gohman at apple.com (Dan Gohman) Date: Sat, 28 Aug 2010 00:39:27 -0000 Subject: [llvm-commits] [llvm] r112337 - /llvm/trunk/lib/Analysis/ScalarEvolution.cpp Message-ID: <20100828003927.A26C82A6C12C@llvm.org> Author: djg Date: Fri Aug 27 19:39:27 2010 New Revision: 112337 URL: http://llvm.org/viewvc/llvm-project?rev=112337&view=rev Log: Fix an index calculation thinko. Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=112337&r1=112336&r2=112337&view=diff ============================================================================== --- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original) +++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Fri Aug 27 19:39:27 2010 @@ -1430,7 +1430,7 @@ return Mul; Ops[i] = Mul; Ops.erase(Ops.begin()+i+1, Ops.begin()+i+Count); - i -= Count - 1; e -= Count - 1; + --i; e -= Count - 1; FoundMatch = true; } if (FoundMatch) From gohman at apple.com Fri Aug 27 19:49:14 2010 From: gohman at apple.com (Dan Gohman) Date: Sat, 28 Aug 2010 00:49:14 -0000 Subject: [llvm-commits] [llvm] r112340 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h Message-ID: <20100828004914.24E372A6C12C@llvm.org> Author: djg Date: Fri Aug 27 19:49:13 2010 New Revision: 112340 URL: http://llvm.org/viewvc/llvm-project?rev=112340&view=rev Log: Trim a #include. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h?rev=112340&r1=112339&r2=112340&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h Fri Aug 27 19:49:13 2010 @@ -18,9 +18,6 @@ #include "llvm/CodeGen/SelectionDAG.h" #include "llvm/ADT/APInt.h" #include "llvm/ADT/DenseMap.h" -#ifndef NDEBUG -#include "llvm/ADT/SmallSet.h" -#endif #include "llvm/CodeGen/SelectionDAGNodes.h" #include "llvm/CodeGen/ValueTypes.h" #include "llvm/Support/CallSite.h" From gohman at apple.com Fri Aug 27 19:51:03 2010 From: gohman at apple.com (Dan Gohman) Date: Sat, 28 Aug 2010 00:51:03 -0000 Subject: [llvm-commits] [llvm] r112341 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp test/CodeGen/X86/tailcall-fastisel.ll Message-ID: <20100828005103.D7F3B2A6C12C@llvm.org> Author: djg Date: Fri Aug 27 19:51:03 2010 New Revision: 112341 URL: http://llvm.org/viewvc/llvm-project?rev=112341&view=rev Log: Completely disable tail calls when fast-isel is enabled, as fast-isel doesn't currently support dealing with this. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp llvm/trunk/test/CodeGen/X86/tailcall-fastisel.ll Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=112341&r1=112340&r2=112341&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Fri Aug 27 19:51:03 2010 @@ -4649,6 +4649,11 @@ !isInTailCallPosition(CS, CS.getAttributes().getRetAttributes(), TLI)) isTailCall = false; + // If there's a possibility that fast-isel has already selected some amount + // of the current basic block, don't emit a tail call. + if (isTailCall && EnableFastISel) + isTailCall = false; + std::pair Result = TLI.LowerCallTo(getRoot(), RetTy, CS.paramHasAttr(0, Attribute::SExt), Modified: llvm/trunk/test/CodeGen/X86/tailcall-fastisel.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tailcall-fastisel.ll?rev=112341&r1=112340&r2=112341&view=diff ============================================================================== --- llvm/trunk/test/CodeGen/X86/tailcall-fastisel.ll (original) +++ llvm/trunk/test/CodeGen/X86/tailcall-fastisel.ll Fri Aug 27 19:51:03 2010 @@ -1,8 +1,6 @@ -; RUN: llc < %s -march=x86-64 -tailcallopt -fast-isel | grep TAILCALL +; RUN: llc < %s -march=x86-64 -tailcallopt -fast-isel | not grep TAILCALL -; Fast-isel shouldn't attempt to handle this tail call, and it should -; cleanly terminate instruction selection in the block after it's -; done to avoid emitting invalid MachineInstrs. +; Fast-isel shouldn't attempt to cope with tail calls. %0 = type { i64, i32, i8* } @@ -11,3 +9,11 @@ %tmp20 = tail call fastcc i8* @"visit_array_aux<`Reference>"(%0 %arg, i32 undef) ; [#uses=1] ret i8* %tmp20 } + +define i32 @foo() nounwind { +entry: + %0 = tail call i32 (...)* @bar() nounwind ; [#uses=1] + ret i32 %0 +} + +declare i32 @bar(...) nounwind From sabre at nondot.org Fri Aug 27 20:20:38 2010 From: sabre at nondot.org (Chris Lattner) Date: Sat, 28 Aug 2010 01:20:38 -0000 Subject: [llvm-commits] [llvm] r112343 - in /llvm/trunk: lib/Transforms/InstCombine/InstCombineCasts.cpp lib/Transforms/InstCombine/InstCombineShifts.cpp test/Transforms/InstCombine/bitcast.ll Message-ID: <20100828012038.7CA0B2A6C12C@llvm.org> Author: lattner Date: Fri Aug 27 20:20:38 2010 New Revision: 112343 URL: http://llvm.org/viewvc/llvm-project?rev=112343&view=rev Log: optimize bitcasts from large integers to vector into vector element insertion from the pieces that feed into the vector. This handles a pattern that occurs frequently due to code generated for the x86-64 abi. We now compile something like this: struct S { float A, B, C, D; }; struct S g; struct S bar() { struct S A = g; ++A.A; ++A.C; return A; } into all nice vector operations: _bar: ## @bar ## BB#0: ## %entry movq _g at GOTPCREL(%rip), %rax movss LCPI1_0(%rip), %xmm1 movss (%rax), %xmm0 addss %xmm1, %xmm0 pshufd $16, %xmm0, %xmm0 movss 4(%rax), %xmm2 movss 12(%rax), %xmm3 pshufd $16, %xmm2, %xmm2 unpcklps %xmm2, %xmm0 addss 8(%rax), %xmm1 pshufd $16, %xmm1, %xmm1 pshufd $16, %xmm3, %xmm2 unpcklps %xmm2, %xmm1 ret instead of icky integer operations: _bar: ## @bar movq _g at GOTPCREL(%rip), %rax movss LCPI1_0(%rip), %xmm1 movss (%rax), %xmm0 addss %xmm1, %xmm0 movd %xmm0, %ecx movl 4(%rax), %edx movl 12(%rax), %esi shlq $32, %rdx addq %rcx, %rdx movd %rdx, %xmm0 addss 8(%rax), %xmm1 movd %xmm1, %eax shlq $32, %rsi addq %rax, %rsi movd %rsi, %xmm1 ret This resolves rdar://8360454 Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp llvm/trunk/test/Transforms/InstCombine/bitcast.ll Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp?rev=112343&r1=112342&r2=112343&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp Fri Aug 27 20:20:38 2010 @@ -1362,6 +1362,116 @@ return new ShuffleVectorInst(InVal, V2, Mask); } +static bool isMultipleOfTypeSize(unsigned Value, const Type *Ty) { + return Value % Ty->getPrimitiveSizeInBits() == 0; +} + +static bool getTypeSizeIndex(unsigned Value, const Type *Ty) { + return Value / Ty->getPrimitiveSizeInBits(); +} + +/// CollectInsertionElements - V is a value which is inserted into a vector of +/// VecEltTy. Look through the value to see if we can decompose it into +/// insertions into the vector. See the example in the comment for +/// OptimizeIntegerToVectorInsertions for the pattern this handles. +/// The type of V is always a non-zero multiple of VecEltTy's size. +/// +/// This returns false if the pattern can't be matched or true if it can, +/// filling in Elements with the elements found here. +static bool CollectInsertionElements(Value *V, unsigned ElementIndex, + SmallVectorImpl &Elements, + const Type *VecEltTy) { + // If we got down to a value of the right type, we win, try inserting into the + // right element. + if (V->getType() == VecEltTy) { + // Fail if multiple elements are inserted into this slot. + if (ElementIndex >= Elements.size() || Elements[ElementIndex] != 0) + return false; + + Elements[ElementIndex] = V; + return true; + } + + //if (Constant *C = dyn_cast(V)) { + // Figure out the # elements this provides, and bitcast it or slice it up + // as required. + //} + + if (!V->hasOneUse()) return false; + + Instruction *I = dyn_cast(V); + if (I == 0) return false; + switch (I->getOpcode()) { + default: return false; // Unhandled case. + case Instruction::BitCast: + return CollectInsertionElements(I->getOperand(0), ElementIndex, + Elements, VecEltTy); + case Instruction::ZExt: + if (!isMultipleOfTypeSize( + I->getOperand(0)->getType()->getPrimitiveSizeInBits(), + VecEltTy)) + return false; + return CollectInsertionElements(I->getOperand(0), ElementIndex, + Elements, VecEltTy); + case Instruction::Or: + return CollectInsertionElements(I->getOperand(0), ElementIndex, + Elements, VecEltTy) && + CollectInsertionElements(I->getOperand(1), ElementIndex, + Elements, VecEltTy); + case Instruction::Shl: { + // Must be shifting by a constant that is a multiple of the element size. + ConstantInt *CI = dyn_cast(I->getOperand(1)); + if (CI == 0) return false; + if (!isMultipleOfTypeSize(CI->getZExtValue(), VecEltTy)) return false; + unsigned IndexShift = getTypeSizeIndex(CI->getZExtValue(), VecEltTy); + + return CollectInsertionElements(I->getOperand(0), ElementIndex+IndexShift, + Elements, VecEltTy); + } + + } +} + + +/// OptimizeIntegerToVectorInsertions - If the input is an 'or' instruction, we +/// may be doing shifts and ors to assemble the elements of the vector manually. +/// Try to rip the code out and replace it with insertelements. This is to +/// optimize code like this: +/// +/// %tmp37 = bitcast float %inc to i32 +/// %tmp38 = zext i32 %tmp37 to i64 +/// %tmp31 = bitcast float %inc5 to i32 +/// %tmp32 = zext i32 %tmp31 to i64 +/// %tmp33 = shl i64 %tmp32, 32 +/// %ins35 = or i64 %tmp33, %tmp38 +/// %tmp43 = bitcast i64 %ins35 to <2 x float> +/// +/// Into two insertelements that do "buildvector{%inc, %inc5}". +static Value *OptimizeIntegerToVectorInsertions(BitCastInst &CI, + InstCombiner &IC) { + const VectorType *DestVecTy = cast(CI.getType()); + Value *IntInput = CI.getOperand(0); + + SmallVector Elements(DestVecTy->getNumElements()); + if (!CollectInsertionElements(IntInput, 0, Elements, + DestVecTy->getElementType())) + return 0; + + // If we succeeded, we know that all of the element are specified by Elements + // or are zero if Elements has a null entry. Recast this as a set of + // insertions. + Value *Result = Constant::getNullValue(CI.getType()); + for (unsigned i = 0, e = Elements.size(); i != e; ++i) { + if (Elements[i] == 0) continue; // Unset element. + + Result = IC.Builder->CreateInsertElement(Result, Elements[i], + IC.Builder->getInt32(i)); + } + + return Result; +} + + /// OptimizeIntToFloatBitCast - See if we can optimize an integer->float/double /// bitcast. The various long double bitcasts can't get in here. static Instruction *OptimizeIntToFloatBitCast(BitCastInst &CI,InstCombiner &IC){ @@ -1478,16 +1588,24 @@ // FIXME: Canonicalize bitcast(insertelement) -> insertelement(bitcast) } - // If this is a cast from an integer to vector, check to see if the input - // is a trunc or zext of a bitcast from vector. If so, we can replace all - // the casts with a shuffle and (potentially) a bitcast. - if (isa(SrcTy) && (isa(Src) || isa(Src))){ - CastInst *SrcCast = cast(Src); - if (BitCastInst *BCIn = dyn_cast(SrcCast->getOperand(0))) - if (isa(BCIn->getOperand(0)->getType())) - if (Instruction *I = OptimizeVectorResize(BCIn->getOperand(0), + if (isa(SrcTy)) { + // If this is a cast from an integer to vector, check to see if the input + // is a trunc or zext of a bitcast from vector. If so, we can replace all + // the casts with a shuffle and (potentially) a bitcast. + if (isa(Src) || isa(Src)) { + CastInst *SrcCast = cast(Src); + if (BitCastInst *BCIn = dyn_cast(SrcCast->getOperand(0))) + if (isa(BCIn->getOperand(0)->getType())) + if (Instruction *I = OptimizeVectorResize(BCIn->getOperand(0), cast(DestTy), *this)) - return I; + return I; + } + + // If the input is an 'or' instruction, we may be doing shifts and ors to + // assemble the elements of the vector manually. Try to rip the code out + // and replace it with insertelements. + if (Value *V = OptimizeIntegerToVectorInsertions(CI, *this)) + return ReplaceInstUsesWith(CI, V); } } Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp?rev=112343&r1=112342&r2=112343&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp Fri Aug 27 20:20:38 2010 @@ -312,8 +312,8 @@ // cast of lshr(shl(x,c1),c2) as well as other more complex cases. if (I.getOpcode() != Instruction::AShr && CanEvaluateShifted(Op0, Op1->getZExtValue(), isLeftShift, *this)) { - DEBUG(dbgs() << "ICE: GetShiftedValue propagatin shift through expression" - " to eliminate shift:\n IN: " << *Op0 << "\nSH: " << I << "\n"); + DEBUG(dbgs() << "ICE: GetShiftedValue propagating shift through expression" + " to eliminate shift:\n IN: " << *Op0 << "\n SH: " << I <<"\n"); return ReplaceInstUsesWith(I, GetShiftedValue(Op0, Op1->getZExtValue(), isLeftShift, *this)); Modified: llvm/trunk/test/Transforms/InstCombine/bitcast.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/bitcast.ll?rev=112343&r1=112342&r2=112343&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/bitcast.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/bitcast.ll Fri Aug 27 20:20:38 2010 @@ -60,3 +60,34 @@ ; CHECK-NEXT: %add = fadd float %tmp24, %tmp4 ; CHECK-NEXT: ret float %add } + + +define <2 x i32> @test4(i32 %A, i32 %B){ + %tmp38 = zext i32 %A to i64 + %tmp32 = zext i32 %B to i64 + %tmp33 = shl i64 %tmp32, 32 + %ins35 = or i64 %tmp33, %tmp38 + %tmp43 = bitcast i64 %ins35 to <2 x i32> + ret <2 x i32> %tmp43 + ; CHECK: @test4 + ; CHECK-NEXT: insertelement <2 x i32> undef, i32 %A, i32 0 + ; CHECK-NEXT: insertelement <2 x i32> {{.*}}, i32 %B, i32 1 + ; CHECK-NEXT: ret <2 x i32> + +} + +; rdar://8360454 +define <2 x float> @test5(float %A, float %B) { + %tmp37 = bitcast float %A to i32 + %tmp38 = zext i32 %tmp37 to i64 + %tmp31 = bitcast float %B to i32 + %tmp32 = zext i32 %tmp31 to i64 + %tmp33 = shl i64 %tmp32, 32 + %ins35 = or i64 %tmp33, %tmp38 + %tmp43 = bitcast i64 %ins35 to <2 x float> + ret <2 x float> %tmp43 + ; CHECK: @test5 + ; CHECK-NEXT: insertelement <2 x float> undef, float %A, i32 0 + ; CHECK-NEXT: insertelement <2 x float> {{.*}}, float %B, i32 1 + ; CHECK-NEXT: ret <2 x float> +} From baldrick at free.fr Fri Aug 27 20:24:54 2010 From: baldrick at free.fr (Duncan Sands) Date: Sat, 28 Aug 2010 03:24:54 +0200 Subject: [llvm-commits] [llvm] r111568 - in /llvm/trunk: lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp test/Transforms/InstCombine/2010-08-19-StoreNarrowing.ll In-Reply-To: <20100819221540.B82312A6C12C@llvm.org> References: <20100819221540.B82312A6C12C@llvm.org> Message-ID: <4C786566.9060107@free.fr> Hi Owen, > + // If we can find a power-of-2 prefix (and if the values we're working with > + // are themselves POT widths), then we can narrow the store. We rely on > + // later iterations of instcombine to propagate the demanded bits to narrow > + // the other computations in the chain. > + if (NewWidth< AndMask.getBitWidth()&& > + isPowerOf2_64(AndMask.getBitWidth())) { > + const Type *NewType = IntegerType::get(Ptr->getContext(), NewWidth); is it possible that you do an i4 store here? That would actually overwrite 8 bits, which would be wrong. Ciao, Duncan. From baldrick at free.fr Fri Aug 27 20:30:02 2010 From: baldrick at free.fr (Duncan Sands) Date: Sat, 28 Aug 2010 01:30:02 -0000 Subject: [llvm-commits] [llvm] r112344 - in /llvm/trunk/tools: bugpoint/bugpoint.cpp llc/llc.cpp lli/lli.cpp llvm-mc/llvm-mc.cpp Message-ID: <20100828013002.606F12A6C12C@llvm.org> Author: baldrick Date: Fri Aug 27 20:30:02 2010 New Revision: 112344 URL: http://llvm.org/viewvc/llvm-project?rev=112344&view=rev Log: Straighten out any triple strings passed on the command line before they hit the rest of the system. Modified: llvm/trunk/tools/bugpoint/bugpoint.cpp llvm/trunk/tools/llc/llc.cpp llvm/trunk/tools/lli/lli.cpp llvm/trunk/tools/llvm-mc/llvm-mc.cpp Modified: llvm/trunk/tools/bugpoint/bugpoint.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/bugpoint.cpp?rev=112344&r1=112343&r2=112344&view=diff ============================================================================== --- llvm/trunk/tools/bugpoint/bugpoint.cpp (original) +++ llvm/trunk/tools/bugpoint/bugpoint.cpp Fri Aug 27 20:30:02 2010 @@ -104,8 +104,8 @@ // If we have an override, set it and then track the triple we want Modules // to use. if (!OverrideTriple.empty()) { - TargetTriple.setTriple(OverrideTriple); - outs() << "Override triple set to '" << OverrideTriple << "'\n"; + TargetTriple.setTriple(Triple::normalize(OverrideTriple)); + outs() << "Override triple set to '" << TargetTriple.getTriple() << "'\n"; } if (MemoryLimit < 0) { Modified: llvm/trunk/tools/llc/llc.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llc/llc.cpp?rev=112344&r1=112343&r2=112344&view=diff ============================================================================== --- llvm/trunk/tools/llc/llc.cpp (original) +++ llvm/trunk/tools/llc/llc.cpp Fri Aug 27 20:30:02 2010 @@ -223,7 +223,7 @@ // If we are supposed to override the target triple, do so now. if (!TargetTriple.empty()) - mod.setTargetTriple(TargetTriple); + mod.setTargetTriple(Triple::normalize(TargetTriple)); Triple TheTriple(mod.getTargetTriple()); if (TheTriple.getTriple().empty()) Modified: llvm/trunk/tools/lli/lli.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lli/lli.cpp?rev=112344&r1=112343&r2=112344&view=diff ============================================================================== --- llvm/trunk/tools/lli/lli.cpp (original) +++ llvm/trunk/tools/lli/lli.cpp Fri Aug 27 20:30:02 2010 @@ -16,6 +16,7 @@ #include "llvm/LLVMContext.h" #include "llvm/Module.h" #include "llvm/Type.h" +#include "llvm/ADT/Triple.h" #include "llvm/Bitcode/ReaderWriter.h" #include "llvm/CodeGen/LinkAllCodegenComponents.h" #include "llvm/ExecutionEngine/GenericValue.h" @@ -157,7 +158,7 @@ // If we are supposed to override the target triple, do so now. if (!TargetTriple.empty()) - Mod->setTargetTriple(TargetTriple); + Mod->setTargetTriple(Triple::normalize(TargetTriple)); CodeGenOpt::Level OLvl = CodeGenOpt::Default; switch (OptLevel) { Modified: llvm/trunk/tools/llvm-mc/llvm-mc.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/llvm-mc.cpp?rev=112344&r1=112343&r2=112344&view=diff ============================================================================== --- llvm/trunk/tools/llvm-mc/llvm-mc.cpp (original) +++ llvm/trunk/tools/llvm-mc/llvm-mc.cpp Fri Aug 27 20:30:02 2010 @@ -390,6 +390,7 @@ llvm::InitializeAllDisassemblers(); cl::ParseCommandLineOptions(argc, argv, "llvm machine code playground\n"); + TripleName = Triple::normalize(TripleName); switch (Action) { default: From baldrick at free.fr Fri Aug 27 20:43:53 2010 From: baldrick at free.fr (Duncan Sands) Date: Sat, 28 Aug 2010 03:43:53 +0200 Subject: [llvm-commits] [llvm] r111663 - /llvm/trunk/include/llvm/Metadata.h In-Reply-To: <20100820182258.29CBF2A6C12E@llvm.org> References: <20100820182258.29CBF2A6C12E@llvm.org> Message-ID: <4C7869D9.4030002@free.fr> Hi Dan, > //===----------------------------------------------------------------------===// > -/// NamedMDNode - a tuple of MDNodes. > -/// NamedMDNode is always named. All NamedMDNode operand has a type of metadata. > +/// NamedMDNode - a tuple of MDNodes. Despite its name, a NamedMDNode isn't > +/// itself an MDNode. NamedMDNodes belong to modules, have names, and contain > +/// lists of MDNodes. how about renaming it to ListOfMDNode or MDTuple or something like that? Ciao, Duncan. From sabre at nondot.org Fri Aug 27 20:50:58 2010 From: sabre at nondot.org (Chris Lattner) Date: Sat, 28 Aug 2010 01:50:58 -0000 Subject: [llvm-commits] [llvm] r112345 - in /llvm/trunk: lib/Transforms/InstCombine/InstCombineCasts.cpp test/Transforms/InstCombine/bitcast.ll Message-ID: <20100828015058.14A1C2A6C12C@llvm.org> Author: lattner Date: Fri Aug 27 20:50:57 2010 New Revision: 112345 URL: http://llvm.org/viewvc/llvm-project?rev=112345&view=rev Log: handle the constant case of vector insertion. For something like this: struct S { float A, B, C, D; }; struct S g; struct S bar() { struct S A = g; ++A.B; A.A = 42; return A; } we now generate: _bar: ## @bar ## BB#0: ## %entry movq _g at GOTPCREL(%rip), %rax movss 12(%rax), %xmm0 pshufd $16, %xmm0, %xmm0 movss 4(%rax), %xmm2 movss 8(%rax), %xmm1 pshufd $16, %xmm1, %xmm1 unpcklps %xmm0, %xmm1 addss LCPI1_0(%rip), %xmm2 pshufd $16, %xmm2, %xmm2 movss LCPI1_1(%rip), %xmm0 pshufd $16, %xmm0, %xmm0 unpcklps %xmm2, %xmm0 ret instead of: _bar: ## @bar ## BB#0: ## %entry movq _g at GOTPCREL(%rip), %rax movss 12(%rax), %xmm0 pshufd $16, %xmm0, %xmm0 movss 4(%rax), %xmm2 movss 8(%rax), %xmm1 pshufd $16, %xmm1, %xmm1 unpcklps %xmm0, %xmm1 addss LCPI1_0(%rip), %xmm2 movd %xmm2, %eax shlq $32, %rax addq $1109917696, %rax ## imm = 0x42280000 movd %rax, %xmm0 ret Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp llvm/trunk/test/Transforms/InstCombine/bitcast.ll Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp?rev=112345&r1=112344&r2=112345&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp Fri Aug 27 20:50:57 2010 @@ -1366,7 +1366,7 @@ return Value % Ty->getPrimitiveSizeInBits() == 0; } -static bool getTypeSizeIndex(unsigned Value, const Type *Ty) { +static unsigned getTypeSizeIndex(unsigned Value, const Type *Ty) { return Value / Ty->getPrimitiveSizeInBits(); } @@ -1384,6 +1384,11 @@ // If we got down to a value of the right type, we win, try inserting into the // right element. if (V->getType() == VecEltTy) { + // Inserting null doesn't actually insert any elements. + if (Constant *C = dyn_cast(V)) + if (C->isNullValue()) + return true; + // Fail if multiple elements are inserted into this slot. if (ElementIndex >= Elements.size() || Elements[ElementIndex] != 0) return false; @@ -1392,10 +1397,34 @@ return true; } - //if (Constant *C = dyn_cast(V)) { + if (Constant *C = dyn_cast(V)) { // Figure out the # elements this provides, and bitcast it or slice it up // as required. - //} + unsigned NumElts = getTypeSizeIndex(C->getType()->getPrimitiveSizeInBits(), + VecEltTy); + // If the constant is the size of a vector element, we just need to bitcast + // it to the right type so it gets properly inserted. + if (NumElts == 1) + return CollectInsertionElements(ConstantExpr::getBitCast(C, VecEltTy), + ElementIndex, Elements, VecEltTy); + + // Okay, this is a constant that covers multiple elements. Slice it up into + // pieces and insert each element-sized piece into the vector. + if (!isa(C->getType())) + C = ConstantExpr::getBitCast(C, IntegerType::get(V->getContext(), + C->getType()->getPrimitiveSizeInBits())); + unsigned ElementSize = VecEltTy->getPrimitiveSizeInBits(); + const Type *ElementIntTy = IntegerType::get(C->getContext(), ElementSize); + + for (unsigned i = 0; i != NumElts; ++i) { + Constant *Piece = ConstantExpr::getLShr(C, ConstantInt::get(C->getType(), + i*ElementSize)); + Piece = ConstantExpr::getTrunc(Piece, ElementIntTy); + if (!CollectInsertionElements(Piece, ElementIndex+i, Elements, VecEltTy)) + return false; + } + return true; + } if (!V->hasOneUse()) return false; Modified: llvm/trunk/test/Transforms/InstCombine/bitcast.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/bitcast.ll?rev=112345&r1=112344&r2=112345&view=diff ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/bitcast.ll (original) +++ llvm/trunk/test/Transforms/InstCombine/bitcast.ll Fri Aug 27 20:50:57 2010 @@ -91,3 +91,15 @@ ; CHECK-NEXT: insertelement <2 x float> {{.*}}, float %B, i32 1 ; CHECK-NEXT: ret <2 x float> } + +define <2 x float> @test6(float %A){ + %tmp23 = bitcast float %A to i32 ; [#uses=1] + %tmp24 = zext i32 %tmp23 to i64 ; [#uses=1] + %tmp25 = shl i64 %tmp24, 32 ; [#uses=1] + %mask20 = or i64 %tmp25, 1109917696 ; [#uses=1] + %tmp35 = bitcast i64 %mask20 to <2 x float> ; <<2 x float>> [#uses=1] + ret <2 x float> %tmp35 +; CHECK: @test6 +; CHECK-NEXT: insertelement <2 x float> , float %A, i32 1 +; CHECK: ret +} From bruno.cardoso at gmail.com Fri Aug 27 21:46:39 2010 From: bruno.cardoso at gmail.com (Bruno Cardoso Lopes) Date: Sat, 28 Aug 2010 02:46:39 -0000 Subject: [llvm-commits] [llvm] r112348 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Message-ID: <20100828024640.19E002A6C12C@llvm.org> Author: bruno Date: Fri Aug 27 21:46:39 2010 New Revision: 112348 URL: http://llvm.org/viewvc/llvm-project?rev=112348&view=rev Log: Clean up the logic of vector shuffles -> vector shifts. Also teach this logic how to handle target specific shuffles if needed, this is necessary while searching recursively for zeroed scalar elements in vector shuffle operands. Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=112348&r1=112347&r2=112348&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Fri Aug 27 21:46:39 2010 @@ -2576,6 +2576,23 @@ // Other Lowering Hooks //===----------------------------------------------------------------------===// +static bool isTargetShuffle(unsigned Opcode) { + switch(Opcode) { + default: return false; + case X86ISD::PSHUFD: + case X86ISD::PSHUFHW: + case X86ISD::PSHUFLW: + case X86ISD::SHUFPD: + case X86ISD::SHUFPS: + case X86ISD::MOVLHPS: + case X86ISD::MOVSS: + case X86ISD::MOVSD: + case X86ISD::PUNPCKLDQ: + return true; + } + return false; +} + static SDValue getTargetShuffleNode(unsigned Opc, DebugLoc dl, EVT VT, SDValue V1, unsigned TargetMask, SelectionDAG &DAG) { switch(Opc) { @@ -2606,6 +2623,8 @@ switch(Opc) { default: llvm_unreachable("Unknown x86 shuffle node"); case X86ISD::MOVLHPS: + case X86ISD::MOVSS: + case X86ISD::MOVSD: case X86ISD::PUNPCKLDQ: return DAG.getNode(Opc, dl, VT, V1, V2); } @@ -3614,68 +3633,184 @@ return DAG.getVectorShuffle(VT, V2.getDebugLoc(), V1, V2, &MaskVec[0]); } -/// getNumOfConsecutiveZeros - Return the number of elements in a result of -/// a shuffle that is zero. -static -unsigned getNumOfConsecutiveZeros(ShuffleVectorSDNode *SVOp, int NumElems, - bool Low, SelectionDAG &DAG) { - unsigned NumZeros = 0; - for (int i = 0; i < NumElems; ++i) { - unsigned Index = Low ? i : NumElems-i-1; - int Idx = SVOp->getMaskElt(Index); - if (Idx < 0) { - ++NumZeros; - continue; +/// getShuffleScalarElt - Returns the scalar element that will make up the ith +/// element of the result of the vector shuffle. +SDValue getShuffleScalarElt(SDNode *N, int Index, SelectionDAG &DAG) { + SDValue V = SDValue(N, 0); + EVT VT = V.getValueType(); + unsigned Opcode = V.getOpcode(); + int NumElems = VT.getVectorNumElements(); + + // Recurse into ISD::VECTOR_SHUFFLE node to find scalars. + if (const ShuffleVectorSDNode *SV = dyn_cast(N)) { + Index = SV->getMaskElt(Index); + + if (Index < 0) + return DAG.getUNDEF(VT.getVectorElementType()); + + SDValue NewV = (Index < NumElems) ? SV->getOperand(0) : SV->getOperand(1); + return getShuffleScalarElt(NewV.getNode(), Index % NumElems, DAG); + } + + // Recurse into target specific vector shuffles to find scalars. + if (isTargetShuffle(Opcode)) { + switch(Opcode) { + case X86ISD::MOVSS: + case X86ISD::MOVSD: + // Only care about the second operand, which can contain + // a scalar_to_vector which we are looking for. + return getShuffleScalarElt(V.getOperand(1).getNode(), + 0 /* Index */, DAG); + default: + assert("not implemented for target shuffle node"); + return SDValue(); } - SDValue Elt = DAG.getShuffleScalarElt(SVOp, Index); - if (Elt.getNode() && X86::isZeroNode(Elt)) - ++NumZeros; - else - break; } - return NumZeros; -} -/// isVectorShift - Returns true if the shuffle can be implemented as a -/// logical left or right shift of a vector. -/// FIXME: split into pslldqi, psrldqi, palignr variants. -static bool isVectorShift(ShuffleVectorSDNode *SVOp, SelectionDAG &DAG, - bool &isLeft, SDValue &ShVal, unsigned &ShAmt) { - unsigned NumElems = SVOp->getValueType(0).getVectorNumElements(); + // Actual nodes that may contain scalar elements + if (Opcode == ISD::BIT_CONVERT) { + V = V.getOperand(0); + EVT SrcVT = V.getValueType(); - isLeft = true; - unsigned NumZeros = getNumOfConsecutiveZeros(SVOp, NumElems, true, DAG); - if (!NumZeros) { - isLeft = false; - NumZeros = getNumOfConsecutiveZeros(SVOp, NumElems, false, DAG); - if (!NumZeros) - return false; + if (!SrcVT.isVector() || SrcVT.getVectorNumElements() != (unsigned)NumElems) + return SDValue(); } + + if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) + return (Index == 0) ? V.getOperand(0) + : DAG.getUNDEF(VT.getVectorElementType()); + + if (V.getOpcode() == ISD::BUILD_VECTOR) + return V.getOperand(Index); + + return SDValue(); +} + +/// getNumOfConsecutiveZeros - Return the number of elements of a vector +/// shuffle operation which come from a consecutively from a zero. The +/// search can start in two diferent directions, from left or right. +static +unsigned getNumOfConsecutiveZeros(SDNode *N, int NumElems, + bool ZerosFromLeft, SelectionDAG &DAG) { + int i = 0; + + while (i < NumElems) { + unsigned Index = ZerosFromLeft ? i : NumElems-i-1; + SDValue Elt = getShuffleScalarElt(N, Index, DAG); + if (!(Elt.getNode() && + (Elt.getOpcode() == ISD::UNDEF || X86::isZeroNode(Elt)))) + break; + ++i; + } + + return i; +} + +/// isShuffleMaskConsecutive - Check if the shuffle mask indicies from MaskI to +/// MaskE correspond consecutively to elements from one of the vector operands, +/// starting from its index OpIdx. Also tell OpNum which source vector operand. +static +bool isShuffleMaskConsecutive(ShuffleVectorSDNode *SVOp, int MaskI, int MaskE, + int OpIdx, int NumElems, unsigned &OpNum) { bool SeenV1 = false; bool SeenV2 = false; - for (unsigned i = NumZeros; i < NumElems; ++i) { - unsigned Val = isLeft ? (i - NumZeros) : i; - int Idx_ = SVOp->getMaskElt(isLeft ? i : (i - NumZeros)); - if (Idx_ < 0) + + for (int i = MaskI; i <= MaskE; ++i, ++OpIdx) { + int Idx = SVOp->getMaskElt(i); + // Ignore undef indicies + if (Idx < 0) continue; - unsigned Idx = (unsigned) Idx_; + if (Idx < NumElems) SeenV1 = true; - else { - Idx -= NumElems; + else SeenV2 = true; - } - if (Idx != Val) + + // Only accept consecutive elements from the same vector + if ((Idx % NumElems != OpIdx) || (SeenV1 && SeenV2)) return false; } - if (SeenV1 && SeenV2) + + OpNum = SeenV1 ? 0 : 1; + return true; +} + +/// isVectorShiftRight - Returns true if the shuffle can be implemented as a +/// logical left shift of a vector. +static bool isVectorShiftRight(ShuffleVectorSDNode *SVOp, SelectionDAG &DAG, + bool &isLeft, SDValue &ShVal, unsigned &ShAmt) { + unsigned NumElems = SVOp->getValueType(0).getVectorNumElements(); + unsigned NumZeros = getNumOfConsecutiveZeros(SVOp, NumElems, + false /* check zeros from right */, DAG); + unsigned OpSrc; + + if (!NumZeros) + return false; + + // Considering the elements in the mask that are not consecutive zeros, + // check if they consecutively come from only one of the source vectors. + // + // V1 = {X, A, B, C} 0 + // \ \ \ / + // vector_shuffle V1, V2 <1, 2, 3, X> + // + if (!isShuffleMaskConsecutive(SVOp, + 0, // Mask Start Index + NumElems-NumZeros-1, // Mask End Index + NumZeros, // Where to start looking in the src vector + NumElems, // Number of elements in vector + OpSrc)) // Which source operand ? return false; - ShVal = SeenV1 ? SVOp->getOperand(0) : SVOp->getOperand(1); + isLeft = false; ShAmt = NumZeros; + ShVal = SVOp->getOperand(OpSrc); return true; } +/// isVectorShiftLeft - Returns true if the shuffle can be implemented as a +/// logical left shift of a vector. +static bool isVectorShiftLeft(ShuffleVectorSDNode *SVOp, SelectionDAG &DAG, + bool &isLeft, SDValue &ShVal, unsigned &ShAmt) { + unsigned NumElems = SVOp->getValueType(0).getVectorNumElements(); + unsigned NumZeros = getNumOfConsecutiveZeros(SVOp, NumElems, + true /* check zeros from left */, DAG); + unsigned OpSrc; + + if (!NumZeros) + return false; + + // Considering the elements in the mask that are not consecutive zeros, + // check if they consecutively come from only one of the source vectors. + // + // 0 { A, B, X, X } = V2 + // / \ / / + // vector_shuffle V1, V2 + // + if (!isShuffleMaskConsecutive(SVOp, + NumZeros, // Mask Start Index + NumElems-1, // Mask End Index + 0, // Where to start looking in the src vector + NumElems, // Number of elements in vector + OpSrc)) // Which source operand ? + return false; + + isLeft = true; + ShAmt = NumZeros; + ShVal = SVOp->getOperand(OpSrc); + return true; +} + +/// isVectorShift - Returns true if the shuffle can be implemented as a +/// logical left or right shift of a vector. +static bool isVectorShift(ShuffleVectorSDNode *SVOp, SelectionDAG &DAG, + bool &isLeft, SDValue &ShVal, unsigned &ShAmt) { + if (isVectorShiftLeft(SVOp, DAG, isLeft, ShVal, ShAmt) || + isVectorShiftRight(SVOp, DAG, isLeft, ShVal, ShAmt)) + return true; + + return false; +} /// LowerBuildVectorv16i8 - Custom lower build_vector of v16i8. /// @@ -9357,15 +9492,14 @@ const TargetLowering &TLI) { DebugLoc dl = N->getDebugLoc(); EVT VT = N->getValueType(0); - ShuffleVectorSDNode *SVN = cast(N); if (VT.getSizeInBits() != 128) return SDValue(); SmallVector Elts; for (unsigned i = 0, e = VT.getVectorNumElements(); i != e; ++i) - Elts.push_back(DAG.getShuffleScalarElt(SVN, i)); - + Elts.push_back(getShuffleScalarElt(N, i, DAG)); + return EltsFromConsecutiveLoads(VT, Elts, dl, DAG); } From sabre at nondot.org Fri Aug 27 22:18:45 2010 From: sabre at nondot.org (Chris Lattner) Date: Sat, 28 Aug 2010 03:18:45 -0000 Subject: [llvm-commits] [llvm] r112349 - /llvm/trunk/lib/VMCore/Verifier.cpp Message-ID: <20100828031845.8CA432A6C12C@llvm.org> Author: lattner Date: Fri Aug 27 22:18:45 2010 New Revision: 112349 URL: http://llvm.org/viewvc/llvm-project?rev=112349&view=rev Log: zap dead code Modified: llvm/trunk/lib/VMCore/Verifier.cpp Modified: llvm/trunk/lib/VMCore/Verifier.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Verifier.cpp?rev=112349&r1=112348&r2=112349&view=diff ============================================================================== --- llvm/trunk/lib/VMCore/Verifier.cpp (original) +++ llvm/trunk/lib/VMCore/Verifier.cpp Fri Aug 27 22:18:45 2010 @@ -189,16 +189,6 @@ : FunctionPass(ID), Broken(false), RealPass(true), action(ctn), Mod(0), Context(0), DT(0), MessagesStr(Messages) {} - explicit Verifier(bool AB) - : FunctionPass(ID), - Broken(false), RealPass(true), - action( AB ? AbortProcessAction : PrintMessageAction), Mod(0), - Context(0), DT(0), MessagesStr(Messages) {} - explicit Verifier(DominatorTree &dt) - : FunctionPass(ID), - Broken(false), RealPass(false), action(PrintMessageAction), Mod(0), - Context(0), DT(&dt), MessagesStr(Messages) {} - bool doInitialization(Module &M) { Mod = &M; From sabre at nondot.org Fri Aug 27 22:21:03 2010 From: sabre at nondot.org (Chris Lattner) Date: Sat, 28 Aug 2010 03:21:03 -0000 Subject: [llvm-commits] [llvm] r112350 - in /llvm/trunk/lib: MC/ELFObjectWriter.cpp Transforms/Scalar/ABCD.cpp Message-ID: <20100828032103.6F6242A6C12C@llvm.org> Author: lattner Date: Fri Aug 27 22:21:03 2010 New Revision: 112350 URL: http://llvm.org/viewvc/llvm-project?rev=112350&view=rev Log: squish dead code. Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp llvm/trunk/lib/Transforms/Scalar/ABCD.cpp Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=112350&r1=112349&r2=112350&view=diff ============================================================================== --- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original) +++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Fri Aug 27 22:21:03 2010 @@ -49,10 +49,10 @@ } } - static bool isFixupKindX86RIPRel(unsigned Kind) { + /*static bool isFixupKindX86RIPRel(unsigned Kind) { return Kind == X86::reloc_riprel_4byte || Kind == X86::reloc_riprel_4byte_movq_load; - } + }*/ /// ELFSymbolData - Helper struct for containing some precomputed information @@ -127,18 +127,17 @@ void Write8(uint8_t Value) { Writer->Write8(Value); } void Write16(uint16_t Value) { Writer->Write16(Value); } void Write32(uint32_t Value) { Writer->Write32(Value); } - void Write64(uint64_t Value) { Writer->Write64(Value); } + //void Write64(uint64_t Value) { Writer->Write64(Value); } void WriteZeros(unsigned N) { Writer->WriteZeros(N); } - void WriteBytes(StringRef Str, unsigned ZeroFillSize = 0) { - Writer->WriteBytes(Str, ZeroFillSize); - } + //void WriteBytes(StringRef Str, unsigned ZeroFillSize = 0) { + // Writer->WriteBytes(Str, ZeroFillSize); + //} void WriteWord(uint64_t W) { - if (Is64Bit) { + if (Is64Bit) Writer->Write64(W); - } else { + else Writer->Write32(W); - } } void String8(char *buf, uint8_t Value) { Modified: llvm/trunk/lib/Transforms/Scalar/ABCD.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/ABCD.cpp?rev=112350&r1=112349&r2=112350&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/ABCD.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/ABCD.cpp Fri Aug 27 22:21:03 2010 @@ -78,8 +78,6 @@ class Bound { public: Bound(APInt v, bool upper) : value(v), upper_bound(upper) {} - Bound(const Bound &b, int cnst) - : value(b.value - cnst), upper_bound(b.upper_bound) {} Bound(const Bound &b, const APInt &cnst) : value(b.value - cnst), upper_bound(b.upper_bound) {} @@ -129,15 +127,10 @@ } /// Test if Bound b is greater then or equal val - static bool geq(const Bound &b, APInt val) { + static bool geq(const Bound &b, const APInt &val) { return leq(val, b); } - /// Test if Bound a is greater then or equal Bound b - static bool geq(const Bound &a, const Bound &b) { - return leq(b, a); - } - private: APInt value; bool upper_bound; @@ -270,9 +263,6 @@ /// Adds an edge from V_from to V_to with weight value void addEdge(Value *V_from, Value *V_to, APInt value, bool upper); - /// Test if there is a node V - bool hasNode(Value *V) const { return graph.count(V); } - /// Test if there is any edge from V in the upper direction bool hasEdge(Value *V, bool upper) const; From sabre at nondot.org Fri Aug 27 22:36:51 2010 From: sabre at nondot.org (Chris Lattner) Date: Sat, 28 Aug 2010 03:36:51 -0000 Subject: [llvm-commits] [llvm] r112351 - /llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp Message-ID: <20100828033651.F182C2A6C12C@llvm.org> Author: lattner Date: Fri Aug 27 22:36:51 2010 New Revision: 112351 URL: http://llvm.org/viewvc/llvm-project?rev=112351&view=rev Log: for completeness, allow undef also. Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp?rev=112351&r1=112350&r2=112351&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp (original) +++ llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp Fri Aug 27 22:36:51 2010 @@ -1381,6 +1381,9 @@ static bool CollectInsertionElements(Value *V, unsigned ElementIndex, SmallVectorImpl &Elements, const Type *VecEltTy) { + // Undef values never contribute useful bits to the result. + if (isa(V)) return true; + // If we got down to a value of the right type, we win, try inserting into the // right element. if (V->getType() == VecEltTy) { From sabre at nondot.org Fri Aug 27 22:42:46 2010 From: sabre at nondot.org (Chris Lattner) Date: Sat, 28 Aug 2010 03:42:46 -0000 Subject: [llvm-commits] [llvm] r112352 - /llvm/trunk/utils/TableGen/ClangAttrEmitter.cpp Message-ID: <20100828034246.25D3D2A6C12C@llvm.org> Author: lattner Date: Fri Aug 27 22:42:45 2010 New Revision: 112352 URL: http://llvm.org/viewvc/llvm-project?rev=112352&view=rev Log: zap dead method Modified: llvm/trunk/utils/TableGen/ClangAttrEmitter.cpp Modified: llvm/trunk/utils/TableGen/ClangAttrEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/ClangAttrEmitter.cpp?rev=112352&r1=112351&r2=112352&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/ClangAttrEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/ClangAttrEmitter.cpp Fri Aug 27 22:42:45 2010 @@ -98,8 +98,6 @@ : Argument(Arg, Attr), type(T) {} - std::string getType() const { return type; } - void writeAccessors(raw_ostream &OS) const { OS << " " << type << " get" << getUpperName() << "() const {\n"; OS << " return " << getLowerName() << ";\n"; From sabre at nondot.org Fri Aug 27 22:43:50 2010 From: sabre at nondot.org (Chris Lattner) Date: Sat, 28 Aug 2010 03:43:50 -0000 Subject: [llvm-commits] [llvm] r112353 - /llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp Message-ID: <20100828034350.564012A6C12C@llvm.org> Author: lattner Date: Fri Aug 27 22:43:50 2010 New Revision: 112353 URL: http://llvm.org/viewvc/llvm-project?rev=112353&view=rev Log: more dead thing zapping. Modified: llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp Modified: llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp?rev=112353&r1=112352&r2=112353&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/LLVMCConfigurationEmitter.cpp Fri Aug 27 22:43:50 2010 @@ -468,7 +468,6 @@ // wrong type. const OptionDescription& FindSwitch(const std::string& OptName) const; const OptionDescription& FindParameter(const std::string& OptName) const; - const OptionDescription& FindList(const std::string& OptName) const; const OptionDescription& FindParameterList(const std::string& OptName) const; const OptionDescription& FindListOrParameter(const std::string& OptName) const; @@ -503,14 +502,6 @@ } const OptionDescription& -OptionDescriptions::FindList(const std::string& OptName) const { - const OptionDescription& OptDesc = this->FindOption(OptName); - if (!OptDesc.isList()) - throw OptName + ": incorrect option type - should be a list!"; - return OptDesc; -} - -const OptionDescription& OptionDescriptions::FindParameterList(const std::string& OptName) const { const OptionDescription& OptDesc = this->FindOption(OptName); if (!OptDesc.isList() || OptDesc.isSwitchList()) @@ -855,11 +846,7 @@ // Default ctor here is needed because StringMap can only store // DefaultConstructible objects - ToolDescription () - : CmdLine(0), Actions(0), OutFileOption("-o"), - Flags(0), OnEmpty(0) - {} - ToolDescription (const std::string& n) + ToolDescription (const std::string &n = "") : Name(n), CmdLine(0), Actions(0), OutFileOption("-o"), Flags(0), OnEmpty(0) {} @@ -2916,9 +2903,6 @@ this->onCmdLine(InitPtrToString(Arg)); } - void operator()(const DagInit* Test, unsigned, bool) { - this->operator()(Test); - } void operator()(const Init* Statement, unsigned) { this->operator()(Statement); } From sabre at nondot.org Fri Aug 27 22:45:04 2010 From: sabre at nondot.org (Chris Lattner) Date: Sat, 28 Aug 2010 03:45:04 -0000 Subject: [llvm-commits] [llvm] r112354 - /llvm/trunk/lib/CodeGen/StackSlotColoring.cpp Message-ID: <20100828034504.09D592A6C12C@llvm.org> Author: lattner Date: Fri Aug 27 22:45:03 2010 New Revision: 112354 URL: http://llvm.org/viewvc/llvm-project?rev=112354&view=rev Log: remove dead proto Modified: llvm/trunk/lib/CodeGen/StackSlotColoring.cpp Modified: llvm/trunk/lib/CodeGen/StackSlotColoring.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StackSlotColoring.cpp?rev=112354&r1=112353&r2=112354&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/StackSlotColoring.cpp (original) +++ llvm/trunk/lib/CodeGen/StackSlotColoring.cpp Fri Aug 27 22:45:03 2010 @@ -119,7 +119,6 @@ private: void InitializeSlots(); - bool CheckForSetJmpCall(const MachineFunction &MF) const; void ScanForSpillSlotRefs(MachineFunction &MF); bool OverlapWithAssignments(LiveInterval *li, int Color) const; int ColorSlot(LiveInterval *li); From sabre at nondot.org Fri Aug 27 22:51:25 2010 From: sabre at nondot.org (Chris Lattner) Date: Sat, 28 Aug 2010 03:51:25 -0000 Subject: [llvm-commits] [llvm] r112355 - in /llvm/trunk: include/llvm/LinkAllPasses.h include/llvm/Transforms/Scalar.h include/llvm/Transforms/Utils/SSI.h lib/Transforms/Scalar/ABCD.cpp lib/Transforms/Scalar/CMakeLists.txt lib/Transforms/Utils/CMakeLists.txt lib/Transforms/Utils/SSI.cpp test/Transforms/ABCD/ test/Transforms/SSI/ Message-ID: <20100828035125.2ECF52A6C12C@llvm.org> Author: lattner Date: Fri Aug 27 22:51:24 2010 New Revision: 112355 URL: http://llvm.org/viewvc/llvm-project?rev=112355&view=rev Log: remove the ABCD and SSI passes. They don't have any clients that I'm aware of, aren't maintained, and LVI will be replacing their value. nlewycky approved this on irc. Removed: llvm/trunk/include/llvm/Transforms/Utils/SSI.h llvm/trunk/lib/Transforms/Scalar/ABCD.cpp llvm/trunk/lib/Transforms/Utils/SSI.cpp llvm/trunk/test/Transforms/ABCD/ llvm/trunk/test/Transforms/SSI/ Modified: llvm/trunk/include/llvm/LinkAllPasses.h llvm/trunk/include/llvm/Transforms/Scalar.h llvm/trunk/lib/Transforms/Scalar/CMakeLists.txt llvm/trunk/lib/Transforms/Utils/CMakeLists.txt Modified: llvm/trunk/include/llvm/LinkAllPasses.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/LinkAllPasses.h?rev=112355&r1=112354&r2=112355&view=diff ============================================================================== --- llvm/trunk/include/llvm/LinkAllPasses.h (original) +++ llvm/trunk/include/llvm/LinkAllPasses.h Fri Aug 27 22:51:24 2010 @@ -142,10 +142,7 @@ (void) llvm::createDbgInfoPrinterPass(); (void) llvm::createModuleDebugInfoPrinterPass(); (void) llvm::createPartialInliningPass(); - (void) llvm::createSSIPass(); - (void) llvm::createSSIEverythingPass(); (void) llvm::createGEPSplitterPass(); - (void) llvm::createABCDPass(); (void) llvm::createLintPass(); (void) llvm::createSinkingPass(); (void) llvm::createLowerAtomicPass(); Modified: llvm/trunk/include/llvm/Transforms/Scalar.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Transforms/Scalar.h?rev=112355&r1=112354&r2=112355&view=diff ============================================================================== --- llvm/trunk/include/llvm/Transforms/Scalar.h (original) +++ llvm/trunk/include/llvm/Transforms/Scalar.h Fri Aug 27 22:51:24 2010 @@ -307,32 +307,12 @@ //===----------------------------------------------------------------------===// // -// SSI - This pass converts instructions to Static Single Information form -// on demand. -// -FunctionPass *createSSIPass(); - -//===----------------------------------------------------------------------===// -// -// SSI - This pass converts every non-void instuction to Static Single -// Information form. -// -FunctionPass *createSSIEverythingPass(); - -//===----------------------------------------------------------------------===// -// // GEPSplitter - Split complex GEPs into simple ones // FunctionPass *createGEPSplitterPass(); //===----------------------------------------------------------------------===// // -// ABCD - Elimination of Array Bounds Checks on Demand -// -FunctionPass *createABCDPass(); - -//===----------------------------------------------------------------------===// -// // Sink - Code Sinking // FunctionPass *createSinkingPass(); Removed: llvm/trunk/include/llvm/Transforms/Utils/SSI.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Transforms/Utils/SSI.h?rev=112354&view=auto ============================================================================== --- llvm/trunk/include/llvm/Transforms/Utils/SSI.h (original) +++ llvm/trunk/include/llvm/Transforms/Utils/SSI.h (removed) @@ -1,93 +0,0 @@ -//===------------------- SSI.h - Creates SSI Representation -----*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This pass converts a list of variables to the Static Single Information -// form. This is a program representation described by Scott Ananian in his -// Master Thesis: "The Static Single Information Form (1999)". -// We are building an on-demand representation, that is, we do not convert -// every single variable in the target function to SSI form. Rather, we receive -// a list of target variables that must be converted. We also do not -// completely convert a target variable to the SSI format. Instead, we only -// change the variable in the points where new information can be attached -// to its live range, that is, at branch points. -// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_TRANSFORMS_UTILS_SSI_H -#define LLVM_TRANSFORMS_UTILS_SSI_H - -#include "llvm/InstrTypes.h" -#include "llvm/Pass.h" -#include "llvm/ADT/DenseMap.h" -#include "llvm/ADT/SmallPtrSet.h" -#include "llvm/ADT/SmallVector.h" - -namespace llvm { - - class DominatorTree; - class PHINode; - class Instruction; - class CmpInst; - - class SSI : public FunctionPass { - public: - static char ID; // Pass identification, replacement for typeid. - SSI() : - FunctionPass(ID) { - } - - void getAnalysisUsage(AnalysisUsage &AU) const; - - bool runOnFunction(Function&); - - void createSSI(SmallVectorImpl &value); - - private: - // Variables always live - DominatorTree *DT_; - - // Stores variables created by SSI - SmallPtrSet created; - - // Phis created by SSI - DenseMap phis; - - // Sigmas created by SSI - DenseMap sigmas; - - // Phi nodes that have a phi as operand and has to be fixed - SmallPtrSet phisToFix; - - // List of definition points for every variable - DenseMap > defsites; - - // Basic Block of the original definition of each variable - DenseMap value_original; - - // Stack of last seen definition of a variable - DenseMap > value_stack; - - void insertSigmaFunctions(SmallPtrSet &value); - void insertSigma(TerminatorInst *TI, Instruction *I); - void insertPhiFunctions(SmallPtrSet &value); - void renameInit(SmallPtrSet &value); - void rename(BasicBlock *BB); - - void substituteUse(Instruction *I); - bool dominateAny(BasicBlock *BB, Instruction *value); - void fixPhis(); - - Instruction* getPositionPhi(PHINode *PN); - Instruction* getPositionSigma(PHINode *PN); - - void init(SmallVectorImpl &value); - void clean(); - }; -} // end namespace -#endif Removed: llvm/trunk/lib/Transforms/Scalar/ABCD.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/ABCD.cpp?rev=112354&view=auto ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/ABCD.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/ABCD.cpp (removed) @@ -1,1103 +0,0 @@ -//===------- ABCD.cpp - Removes redundant conditional branches ------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This pass removes redundant branch instructions. This algorithm was -// described by Rastislav Bodik, Rajiv Gupta and Vivek Sarkar in their paper -// "ABCD: Eliminating Array Bounds Checks on Demand (2000)". The original -// Algorithm was created to remove array bound checks for strongly typed -// languages. This implementation expands the idea and removes any conditional -// branches that can be proved redundant, not only those used in array bound -// checks. With the SSI representation, each variable has a -// constraint. By analyzing these constraints we can prove that a branch is -// redundant. When a branch is proved redundant it means that -// one direction will always be taken; thus, we can change this branch into an -// unconditional jump. -// It is advisable to run SimplifyCFG and Aggressive Dead Code Elimination -// after ABCD to clean up the code. -// This implementation was created based on the implementation of the ABCD -// algorithm implemented for the compiler Jitrino. -// -//===----------------------------------------------------------------------===// - -#define DEBUG_TYPE "abcd" -#include "llvm/ADT/DenseMap.h" -#include "llvm/ADT/OwningPtr.h" -#include "llvm/ADT/SmallPtrSet.h" -#include "llvm/ADT/Statistic.h" -#include "llvm/Constants.h" -#include "llvm/Function.h" -#include "llvm/Instructions.h" -#include "llvm/Pass.h" -#include "llvm/Support/raw_ostream.h" -#include "llvm/Support/Debug.h" -#include "llvm/Transforms/Scalar.h" -#include "llvm/Transforms/Utils/SSI.h" - -using namespace llvm; - -STATISTIC(NumBranchTested, "Number of conditional branches analyzed"); -STATISTIC(NumBranchRemoved, "Number of conditional branches removed"); - -namespace { - -class ABCD : public FunctionPass { - public: - static char ID; // Pass identification, replacement for typeid. - ABCD() : FunctionPass(ID) {} - - void getAnalysisUsage(AnalysisUsage &AU) const { - AU.addRequired(); - } - - bool runOnFunction(Function &F); - - private: - /// Keep track of whether we've modified the program yet. - bool modified; - - enum ProveResult { - False = 0, - Reduced = 1, - True = 2 - }; - - typedef ProveResult (*meet_function)(ProveResult, ProveResult); - static ProveResult max(ProveResult res1, ProveResult res2) { - return (ProveResult) std::max(res1, res2); - } - static ProveResult min(ProveResult res1, ProveResult res2) { - return (ProveResult) std::min(res1, res2); - } - - class Bound { - public: - Bound(APInt v, bool upper) : value(v), upper_bound(upper) {} - Bound(const Bound &b, const APInt &cnst) - : value(b.value - cnst), upper_bound(b.upper_bound) {} - - /// Test if Bound is an upper bound - bool isUpperBound() const { return upper_bound; } - - /// Get the bitwidth of this bound - int32_t getBitWidth() const { return value.getBitWidth(); } - - /// Creates a Bound incrementing the one received - static Bound createIncrement(const Bound &b) { - return Bound(b.isUpperBound() ? b.value+1 : b.value-1, - b.upper_bound); - } - - /// Creates a Bound decrementing the one received - static Bound createDecrement(const Bound &b) { - return Bound(b.isUpperBound() ? b.value-1 : b.value+1, - b.upper_bound); - } - - /// Test if two bounds are equal - static bool eq(const Bound *a, const Bound *b) { - if (!a || !b) return false; - - assert(a->isUpperBound() == b->isUpperBound()); - return a->value == b->value; - } - - /// Test if val is less than or equal to Bound b - static bool leq(APInt val, const Bound &b) { - return b.isUpperBound() ? val.sle(b.value) : val.sge(b.value); - } - - /// Test if Bound a is less then or equal to Bound - static bool leq(const Bound &a, const Bound &b) { - assert(a.isUpperBound() == b.isUpperBound()); - return a.isUpperBound() ? a.value.sle(b.value) : - a.value.sge(b.value); - } - - /// Test if Bound a is less then Bound b - static bool lt(const Bound &a, const Bound &b) { - assert(a.isUpperBound() == b.isUpperBound()); - return a.isUpperBound() ? a.value.slt(b.value) : - a.value.sgt(b.value); - } - - /// Test if Bound b is greater then or equal val - static bool geq(const Bound &b, const APInt &val) { - return leq(val, b); - } - - private: - APInt value; - bool upper_bound; - }; - - /// This class is used to store results some parts of the graph, - /// so information does not need to be recalculated. The maximum false, - /// minimum true and minimum reduced results are stored - class MemoizedResultChart { - public: - MemoizedResultChart() {} - MemoizedResultChart(const MemoizedResultChart &other) { - if (other.max_false) - max_false.reset(new Bound(*other.max_false)); - if (other.min_true) - min_true.reset(new Bound(*other.min_true)); - if (other.min_reduced) - min_reduced.reset(new Bound(*other.min_reduced)); - } - - /// Returns the max false - const Bound *getFalse() const { return max_false.get(); } - - /// Returns the min true - const Bound *getTrue() const { return min_true.get(); } - - /// Returns the min reduced - const Bound *getReduced() const { return min_reduced.get(); } - - /// Return the stored result for this bound - ProveResult getResult(const Bound &bound) const; - - /// Stores a false found - void addFalse(const Bound &bound); - - /// Stores a true found - void addTrue(const Bound &bound); - - /// Stores a Reduced found - void addReduced(const Bound &bound); - - /// Clears redundant reduced - /// If a min_true is smaller than a min_reduced then the min_reduced - /// is unnecessary and then removed. It also works for min_reduced - /// begin smaller than max_false. - void clearRedundantReduced(); - - void clear() { - max_false.reset(); - min_true.reset(); - min_reduced.reset(); - } - - private: - OwningPtr max_false, min_true, min_reduced; - }; - - /// This class stores the result found for a node of the graph, - /// so these results do not need to be recalculated, only searched for. - class MemoizedResult { - public: - /// Test if there is true result stored from b to a - /// that is less then the bound - bool hasTrue(Value *b, const Bound &bound) const { - const Bound *trueBound = map.lookup(b).getTrue(); - return trueBound && Bound::leq(*trueBound, bound); - } - - /// Test if there is false result stored from b to a - /// that is less then the bound - bool hasFalse(Value *b, const Bound &bound) const { - const Bound *falseBound = map.lookup(b).getFalse(); - return falseBound && Bound::leq(*falseBound, bound); - } - - /// Test if there is reduced result stored from b to a - /// that is less then the bound - bool hasReduced(Value *b, const Bound &bound) const { - const Bound *reducedBound = map.lookup(b).getReduced(); - return reducedBound && Bound::leq(*reducedBound, bound); - } - - /// Returns the stored bound for b - ProveResult getBoundResult(Value *b, const Bound &bound) { - return map[b].getResult(bound); - } - - /// Clears the map - void clear() { - DenseMapIterator begin = map.begin(); - DenseMapIterator end = map.end(); - for (; begin != end; ++begin) { - begin->second.clear(); - } - map.clear(); - } - - /// Stores the bound found - void updateBound(Value *b, const Bound &bound, const ProveResult res); - - private: - // Maps a nod in the graph with its results found. - DenseMap map; - }; - - /// This class represents an edge in the inequality graph used by the - /// ABCD algorithm. An edge connects node v to node u with a value c if - /// we could infer a constraint v <= u + c in the source program. - class Edge { - public: - Edge(Value *V, APInt val, bool upper) - : vertex(V), value(val), upper_bound(upper) {} - - Value *getVertex() const { return vertex; } - const APInt &getValue() const { return value; } - bool isUpperBound() const { return upper_bound; } - - private: - Value *vertex; - APInt value; - bool upper_bound; - }; - - /// Weighted and Directed graph to represent constraints. - /// There is one type of constraint, a <= b + X, which will generate an - /// edge from b to a with weight X. - class InequalityGraph { - public: - - /// Adds an edge from V_from to V_to with weight value - void addEdge(Value *V_from, Value *V_to, APInt value, bool upper); - - /// Test if there is any edge from V in the upper direction - bool hasEdge(Value *V, bool upper) const; - - /// Returns all edges pointed by vertex V - SmallVector getEdges(Value *V) const { - return graph.lookup(V); - } - - /// Prints the graph in dot format. - /// Blue edges represent upper bound and Red lower bound. - void printGraph(raw_ostream &OS, Function &F) const { - printHeader(OS, F); - printBody(OS); - printFooter(OS); - } - - /// Clear the graph - void clear() { - graph.clear(); - } - - private: - DenseMap > graph; - - /// Prints the header of the dot file - void printHeader(raw_ostream &OS, Function &F) const; - - /// Prints the footer of the dot file - void printFooter(raw_ostream &OS) const { - OS << "}\n"; - } - - /// Prints the body of the dot file - void printBody(raw_ostream &OS) const; - - /// Prints vertex source to the dot file - void printVertex(raw_ostream &OS, Value *source) const; - - /// Prints the edge to the dot file - void printEdge(raw_ostream &OS, Value *source, const Edge &edge) const; - - void printName(raw_ostream &OS, Value *info) const; - }; - - /// Iterates through all BasicBlocks, if the Terminator Instruction - /// uses an Comparator Instruction, all operands of this comparator - /// are sent to be transformed to SSI. Only Instruction operands are - /// transformed. - void createSSI(Function &F); - - /// Creates the graphs for this function. - /// It will look for all comparators used in branches, and create them. - /// These comparators will create constraints for any instruction as an - /// operand. - void executeABCD(Function &F); - - /// Seeks redundancies in the comparator instruction CI. - /// If the ABCD algorithm can prove that the comparator CI always - /// takes one way, then the Terminator Instruction TI is substituted from - /// a conditional branch to a unconditional one. - /// This code basically receives a comparator, and verifies which kind of - /// instruction it is. Depending on the kind of instruction, we use different - /// strategies to prove its redundancy. - void seekRedundancy(ICmpInst *ICI, TerminatorInst *TI); - - /// Substitutes Terminator Instruction TI, that is a conditional branch, - /// with one unconditional branch. Succ_edge determines if the new - /// unconditional edge will be the first or second edge of the former TI - /// instruction. - void removeRedundancy(TerminatorInst *TI, bool Succ_edge); - - /// When an conditional branch is removed, the BasicBlock that is no longer - /// reachable will have problems in phi functions. This method fixes these - /// phis removing the former BasicBlock from the list of incoming BasicBlocks - /// of all phis. In case the phi remains with no predecessor it will be - /// marked to be removed later. - void fixPhi(BasicBlock *BB, BasicBlock *Succ); - - /// Removes phis that have no predecessor - void removePhis(); - - /// Creates constraints for Instructions. - /// If the constraint for this instruction has already been created - /// nothing is done. - void createConstraintInstruction(Instruction *I); - - /// Creates constraints for Binary Operators. - /// It will create constraints only for addition and subtraction, - /// the other binary operations are not treated by ABCD. - /// For additions in the form a = b + X and a = X + b, where X is a constant, - /// the constraint a <= b + X can be obtained. For this constraint, an edge - /// a->b with weight X is added to the lower bound graph, and an edge - /// b->a with weight -X is added to the upper bound graph. - /// Only subtractions in the format a = b - X is used by ABCD. - /// Edges are created using the same semantic as addition. - void createConstraintBinaryOperator(BinaryOperator *BO); - - /// Creates constraints for Comparator Instructions. - /// Only comparators that have any of the following operators - /// are used to create constraints: >=, >, <=, <. And only if - /// at least one operand is an Instruction. In a Comparator Instruction - /// a op b, there will be 4 sigma functions a_t, a_f, b_t and b_f. Where - /// t and f represent sigma for operands in true and false branches. The - /// following constraints can be obtained. a_t <= a, a_f <= a, b_t <= b and - /// b_f <= b. There are two more constraints that depend on the operator. - /// For the operator <= : a_t <= b_t and b_f <= a_f-1 - /// For the operator < : a_t <= b_t-1 and b_f <= a_f - /// For the operator >= : b_t <= a_t and a_f <= b_f-1 - /// For the operator > : b_t <= a_t-1 and a_f <= b_f - void createConstraintCmpInst(ICmpInst *ICI, TerminatorInst *TI); - - /// Creates constraints for PHI nodes. - /// In a PHI node a = phi(b,c) we can create the constraint - /// a<= max(b,c). With this constraint there will be the edges, - /// b->a and c->a with weight 0 in the lower bound graph, and the edges - /// a->b and a->c with weight 0 in the upper bound graph. - void createConstraintPHINode(PHINode *PN); - - /// Given a binary operator, we are only interest in the case - /// that one operand is an Instruction and the other is a ConstantInt. In - /// this case the method returns true, otherwise false. It also obtains the - /// Instruction and ConstantInt from the BinaryOperator and returns it. - bool createBinaryOperatorInfo(BinaryOperator *BO, Instruction **I1, - Instruction **I2, ConstantInt **C1, - ConstantInt **C2); - - /// This method creates a constraint between a Sigma and an Instruction. - /// These constraints are created as soon as we find a comparator that uses a - /// SSI variable. - void createConstraintSigInst(Instruction *I_op, BasicBlock *BB_succ_t, - BasicBlock *BB_succ_f, PHINode **SIG_op_t, - PHINode **SIG_op_f); - - /// If PN_op1 and PN_o2 are different from NULL, create a constraint - /// PN_op2 -> PN_op1 with value. In case any of them is NULL, replace - /// with the respective V_op#, if V_op# is a ConstantInt. - void createConstraintSigSig(PHINode *SIG_op1, PHINode *SIG_op2, - ConstantInt *V_op1, ConstantInt *V_op2, - APInt value); - - /// Returns the sigma representing the Instruction I in BasicBlock BB. - /// Returns NULL in case there is no sigma for this Instruction in this - /// Basic Block. This methods assume that sigmas are the first instructions - /// in a block, and that there can be only two sigmas in a block. So it will - /// only look on the first two instructions of BasicBlock BB. - PHINode *findSigma(BasicBlock *BB, Instruction *I); - - /// Original ABCD algorithm to prove redundant checks. - /// This implementation works on any kind of inequality branch. - bool demandProve(Value *a, Value *b, int c, bool upper_bound); - - /// Prove that distance between b and a is <= bound - ProveResult prove(Value *a, Value *b, const Bound &bound, unsigned level); - - /// Updates the distance value for a and b - void updateMemDistance(Value *a, Value *b, const Bound &bound, unsigned level, - meet_function meet); - - InequalityGraph inequality_graph; - MemoizedResult mem_result; - DenseMap active; - SmallPtrSet created; - SmallVector phis_to_remove; -}; - -} // end anonymous namespace. - -char ABCD::ID = 0; -INITIALIZE_PASS(ABCD, "abcd", - "ABCD: Eliminating Array Bounds Checks on Demand", - false, false); - -bool ABCD::runOnFunction(Function &F) { - modified = false; - createSSI(F); - executeABCD(F); - DEBUG(inequality_graph.printGraph(dbgs(), F)); - removePhis(); - - inequality_graph.clear(); - mem_result.clear(); - active.clear(); - created.clear(); - phis_to_remove.clear(); - return modified; -} - -/// Iterates through all BasicBlocks, if the Terminator Instruction -/// uses an Comparator Instruction, all operands of this comparator -/// are sent to be transformed to SSI. Only Instruction operands are -/// transformed. -void ABCD::createSSI(Function &F) { - SSI *ssi = &getAnalysis(); - - SmallVector Insts; - - for (Function::iterator begin = F.begin(), end = F.end(); - begin != end; ++begin) { - BasicBlock *BB = begin; - TerminatorInst *TI = BB->getTerminator(); - if (TI->getNumOperands() == 0) - continue; - - if (ICmpInst *ICI = dyn_cast(TI->getOperand(0))) { - if (Instruction *I = dyn_cast(ICI->getOperand(0))) { - modified = true; // XXX: but yet createSSI might do nothing - Insts.push_back(I); - } - if (Instruction *I = dyn_cast(ICI->getOperand(1))) { - modified = true; - Insts.push_back(I); - } - } - } - ssi->createSSI(Insts); -} - -/// Creates the graphs for this function. -/// It will look for all comparators used in branches, and create them. -/// These comparators will create constraints for any instruction as an -/// operand. -void ABCD::executeABCD(Function &F) { - for (Function::iterator begin = F.begin(), end = F.end(); - begin != end; ++begin) { - BasicBlock *BB = begin; - TerminatorInst *TI = BB->getTerminator(); - if (TI->getNumOperands() == 0) - continue; - - ICmpInst *ICI = dyn_cast(TI->getOperand(0)); - if (!ICI || !ICI->getOperand(0)->getType()->isIntegerTy()) - continue; - - createConstraintCmpInst(ICI, TI); - seekRedundancy(ICI, TI); - } -} - -/// Seeks redundancies in the comparator instruction CI. -/// If the ABCD algorithm can prove that the comparator CI always -/// takes one way, then the Terminator Instruction TI is substituted from -/// a conditional branch to a unconditional one. -/// This code basically receives a comparator, and verifies which kind of -/// instruction it is. Depending on the kind of instruction, we use different -/// strategies to prove its redundancy. -void ABCD::seekRedundancy(ICmpInst *ICI, TerminatorInst *TI) { - CmpInst::Predicate Pred = ICI->getPredicate(); - - Value *source, *dest; - int distance1, distance2; - bool upper; - - switch(Pred) { - case CmpInst::ICMP_SGT: // signed greater than - upper = false; - distance1 = 1; - distance2 = 0; - break; - - case CmpInst::ICMP_SGE: // signed greater or equal - upper = false; - distance1 = 0; - distance2 = -1; - break; - - case CmpInst::ICMP_SLT: // signed less than - upper = true; - distance1 = -1; - distance2 = 0; - break; - - case CmpInst::ICMP_SLE: // signed less or equal - upper = true; - distance1 = 0; - distance2 = 1; - break; - - default: - return; - } - - ++NumBranchTested; - source = ICI->getOperand(0); - dest = ICI->getOperand(1); - if (demandProve(dest, source, distance1, upper)) { - removeRedundancy(TI, true); - } else if (demandProve(dest, source, distance2, !upper)) { - removeRedundancy(TI, false); - } -} - -/// Substitutes Terminator Instruction TI, that is a conditional branch, -/// with one unconditional branch. Succ_edge determines if the new -/// unconditional edge will be the first or second edge of the former TI -/// instruction. -void ABCD::removeRedundancy(TerminatorInst *TI, bool Succ_edge) { - BasicBlock *Succ; - if (Succ_edge) { - Succ = TI->getSuccessor(0); - fixPhi(TI->getParent(), TI->getSuccessor(1)); - } else { - Succ = TI->getSuccessor(1); - fixPhi(TI->getParent(), TI->getSuccessor(0)); - } - - BranchInst::Create(Succ, TI); - TI->eraseFromParent(); // XXX: invoke - ++NumBranchRemoved; - modified = true; -} - -/// When an conditional branch is removed, the BasicBlock that is no longer -/// reachable will have problems in phi functions. This method fixes these -/// phis removing the former BasicBlock from the list of incoming BasicBlocks -/// of all phis. In case the phi remains with no predecessor it will be -/// marked to be removed later. -void ABCD::fixPhi(BasicBlock *BB, BasicBlock *Succ) { - BasicBlock::iterator begin = Succ->begin(); - while (PHINode *PN = dyn_cast(begin++)) { - PN->removeIncomingValue(BB, false); - if (PN->getNumIncomingValues() == 0) - phis_to_remove.push_back(PN); - } -} - -/// Removes phis that have no predecessor -void ABCD::removePhis() { - for (unsigned i = 0, e = phis_to_remove.size(); i != e; ++i) { - PHINode *PN = phis_to_remove[i]; - PN->replaceAllUsesWith(UndefValue::get(PN->getType())); - PN->eraseFromParent(); - } -} - -/// Creates constraints for Instructions. -/// If the constraint for this instruction has already been created -/// nothing is done. -void ABCD::createConstraintInstruction(Instruction *I) { - // Test if this instruction has not been created before - if (created.insert(I)) { - if (BinaryOperator *BO = dyn_cast(I)) { - createConstraintBinaryOperator(BO); - } else if (PHINode *PN = dyn_cast(I)) { - createConstraintPHINode(PN); - } - } -} - -/// Creates constraints for Binary Operators. -/// It will create constraints only for addition and subtraction, -/// the other binary operations are not treated by ABCD. -/// For additions in the form a = b + X and a = X + b, where X is a constant, -/// the constraint a <= b + X can be obtained. For this constraint, an edge -/// a->b with weight X is added to the lower bound graph, and an edge -/// b->a with weight -X is added to the upper bound graph. -/// Only subtractions in the format a = b - X is used by ABCD. -/// Edges are created using the same semantic as addition. -void ABCD::createConstraintBinaryOperator(BinaryOperator *BO) { - Instruction *I1 = NULL, *I2 = NULL; - ConstantInt *CI1 = NULL, *CI2 = NULL; - - // Test if an operand is an Instruction and the other is a Constant - if (!createBinaryOperatorInfo(BO, &I1, &I2, &CI1, &CI2)) - return; - - Instruction *I = 0; - APInt value; - - switch (BO->getOpcode()) { - case Instruction::Add: - if (I1) { - I = I1; - value = CI2->getValue(); - } else if (I2) { - I = I2; - value = CI1->getValue(); - } - break; - - case Instruction::Sub: - // Instructions like a = X-b, where X is a constant are not represented - // in the graph. - if (!I1) - return; - - I = I1; - value = -CI2->getValue(); - break; - - default: - return; - } - - inequality_graph.addEdge(I, BO, value, true); - inequality_graph.addEdge(BO, I, -value, false); - createConstraintInstruction(I); -} - -/// Given a binary operator, we are only interest in the case -/// that one operand is an Instruction and the other is a ConstantInt. In -/// this case the method returns true, otherwise false. It also obtains the -/// Instruction and ConstantInt from the BinaryOperator and returns it. -bool ABCD::createBinaryOperatorInfo(BinaryOperator *BO, Instruction **I1, - Instruction **I2, ConstantInt **C1, - ConstantInt **C2) { - Value *op1 = BO->getOperand(0); - Value *op2 = BO->getOperand(1); - - if ((*I1 = dyn_cast(op1))) { - if ((*C2 = dyn_cast(op2))) - return true; // First is Instruction and second ConstantInt - - return false; // Both are Instruction - } else { - if ((*C1 = dyn_cast(op1)) && - (*I2 = dyn_cast(op2))) - return true; // First is ConstantInt and second Instruction - - return false; // Both are not Instruction - } -} - -/// Creates constraints for Comparator Instructions. -/// Only comparators that have any of the following operators -/// are used to create constraints: >=, >, <=, <. And only if -/// at least one operand is an Instruction. In a Comparator Instruction -/// a op b, there will be 4 sigma functions a_t, a_f, b_t and b_f. Where -/// t and f represent sigma for operands in true and false branches. The -/// following constraints can be obtained. a_t <= a, a_f <= a, b_t <= b and -/// b_f <= b. There are two more constraints that depend on the operator. -/// For the operator <= : a_t <= b_t and b_f <= a_f-1 -/// For the operator < : a_t <= b_t-1 and b_f <= a_f -/// For the operator >= : b_t <= a_t and a_f <= b_f-1 -/// For the operator > : b_t <= a_t-1 and a_f <= b_f -void ABCD::createConstraintCmpInst(ICmpInst *ICI, TerminatorInst *TI) { - Value *V_op1 = ICI->getOperand(0); - Value *V_op2 = ICI->getOperand(1); - - if (!V_op1->getType()->isIntegerTy()) - return; - - Instruction *I_op1 = dyn_cast(V_op1); - Instruction *I_op2 = dyn_cast(V_op2); - - // Test if at least one operand is an Instruction - if (!I_op1 && !I_op2) - return; - - BasicBlock *BB_succ_t = TI->getSuccessor(0); - BasicBlock *BB_succ_f = TI->getSuccessor(1); - - PHINode *SIG_op1_t = NULL, *SIG_op1_f = NULL, - *SIG_op2_t = NULL, *SIG_op2_f = NULL; - - createConstraintSigInst(I_op1, BB_succ_t, BB_succ_f, &SIG_op1_t, &SIG_op1_f); - createConstraintSigInst(I_op2, BB_succ_t, BB_succ_f, &SIG_op2_t, &SIG_op2_f); - - int32_t width = cast(V_op1->getType())->getBitWidth(); - APInt MinusOne = APInt::getAllOnesValue(width); - APInt Zero = APInt::getNullValue(width); - - CmpInst::Predicate Pred = ICI->getPredicate(); - ConstantInt *CI1 = dyn_cast(V_op1); - ConstantInt *CI2 = dyn_cast(V_op2); - switch (Pred) { - case CmpInst::ICMP_SGT: // signed greater than - createConstraintSigSig(SIG_op2_t, SIG_op1_t, CI2, CI1, MinusOne); - createConstraintSigSig(SIG_op1_f, SIG_op2_f, CI1, CI2, Zero); - break; - - case CmpInst::ICMP_SGE: // signed greater or equal - createConstraintSigSig(SIG_op2_t, SIG_op1_t, CI2, CI1, Zero); - createConstraintSigSig(SIG_op1_f, SIG_op2_f, CI1, CI2, MinusOne); - break; - - case CmpInst::ICMP_SLT: // signed less than - createConstraintSigSig(SIG_op1_t, SIG_op2_t, CI1, CI2, MinusOne); - createConstraintSigSig(SIG_op2_f, SIG_op1_f, CI2, CI1, Zero); - break; - - case CmpInst::ICMP_SLE: // signed less or equal - createConstraintSigSig(SIG_op1_t, SIG_op2_t, CI1, CI2, Zero); - createConstraintSigSig(SIG_op2_f, SIG_op1_f, CI2, CI1, MinusOne); - break; - - default: - break; - } - - if (I_op1) - createConstraintInstruction(I_op1); - if (I_op2) - createConstraintInstruction(I_op2); -} - -/// Creates constraints for PHI nodes. -/// In a PHI node a = phi(b,c) we can create the constraint -/// a<= max(b,c). With this constraint there will be the edges, -/// b->a and c->a with weight 0 in the lower bound graph, and the edges -/// a->b and a->c with weight 0 in the upper bound graph. -void ABCD::createConstraintPHINode(PHINode *PN) { - // FIXME: We really want to disallow sigma nodes, but I don't know the best - // way to detect the other than this. - if (PN->getNumOperands() == 2) return; - - int32_t width = cast(PN->getType())->getBitWidth(); - for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i) { - Value *V = PN->getIncomingValue(i); - if (Instruction *I = dyn_cast(V)) { - createConstraintInstruction(I); - } - inequality_graph.addEdge(V, PN, APInt(width, 0), true); - inequality_graph.addEdge(V, PN, APInt(width, 0), false); - } -} - -/// This method creates a constraint between a Sigma and an Instruction. -/// These constraints are created as soon as we find a comparator that uses a -/// SSI variable. -void ABCD::createConstraintSigInst(Instruction *I_op, BasicBlock *BB_succ_t, - BasicBlock *BB_succ_f, PHINode **SIG_op_t, - PHINode **SIG_op_f) { - *SIG_op_t = findSigma(BB_succ_t, I_op); - *SIG_op_f = findSigma(BB_succ_f, I_op); - - if (*SIG_op_t) { - int32_t width = cast((*SIG_op_t)->getType())->getBitWidth(); - inequality_graph.addEdge(I_op, *SIG_op_t, APInt(width, 0), true); - inequality_graph.addEdge(*SIG_op_t, I_op, APInt(width, 0), false); - } - if (*SIG_op_f) { - int32_t width = cast((*SIG_op_f)->getType())->getBitWidth(); - inequality_graph.addEdge(I_op, *SIG_op_f, APInt(width, 0), true); - inequality_graph.addEdge(*SIG_op_f, I_op, APInt(width, 0), false); - } -} - -/// If PN_op1 and PN_o2 are different from NULL, create a constraint -/// PN_op2 -> PN_op1 with value. In case any of them is NULL, replace -/// with the respective V_op#, if V_op# is a ConstantInt. -void ABCD::createConstraintSigSig(PHINode *SIG_op1, PHINode *SIG_op2, - ConstantInt *V_op1, ConstantInt *V_op2, - APInt value) { - if (SIG_op1 && SIG_op2) { - inequality_graph.addEdge(SIG_op2, SIG_op1, value, true); - inequality_graph.addEdge(SIG_op1, SIG_op2, -value, false); - } else if (SIG_op1 && V_op2) { - inequality_graph.addEdge(V_op2, SIG_op1, value, true); - inequality_graph.addEdge(SIG_op1, V_op2, -value, false); - } else if (SIG_op2 && V_op1) { - inequality_graph.addEdge(SIG_op2, V_op1, value, true); - inequality_graph.addEdge(V_op1, SIG_op2, -value, false); - } -} - -/// Returns the sigma representing the Instruction I in BasicBlock BB. -/// Returns NULL in case there is no sigma for this Instruction in this -/// Basic Block. This methods assume that sigmas are the first instructions -/// in a block, and that there can be only two sigmas in a block. So it will -/// only look on the first two instructions of BasicBlock BB. -PHINode *ABCD::findSigma(BasicBlock *BB, Instruction *I) { - // BB has more than one predecessor, BB cannot have sigmas. - if (I == NULL || BB->getSinglePredecessor() == NULL) - return NULL; - - BasicBlock::iterator begin = BB->begin(); - BasicBlock::iterator end = BB->end(); - - for (unsigned i = 0; i < 2 && begin != end; ++i, ++begin) { - Instruction *I_succ = begin; - if (PHINode *PN = dyn_cast(I_succ)) - if (PN->getIncomingValue(0) == I) - return PN; - } - - return NULL; -} - -/// Original ABCD algorithm to prove redundant checks. -/// This implementation works on any kind of inequality branch. -bool ABCD::demandProve(Value *a, Value *b, int c, bool upper_bound) { - int32_t width = cast(a->getType())->getBitWidth(); - Bound bound(APInt(width, c), upper_bound); - - mem_result.clear(); - active.clear(); - - ProveResult res = prove(a, b, bound, 0); - return res != False; -} - -/// Prove that distance between b and a is <= bound -ABCD::ProveResult ABCD::prove(Value *a, Value *b, const Bound &bound, - unsigned level) { - // if (C[b-a<=e] == True for some e <= bound - // Same or stronger difference was already proven - if (mem_result.hasTrue(b, bound)) - return True; - - // if (C[b-a<=e] == False for some e >= bound - // Same or weaker difference was already disproved - if (mem_result.hasFalse(b, bound)) - return False; - - // if (C[b-a<=e] == Reduced for some e <= bound - // b is on a cycle that was reduced for same or stronger difference - if (mem_result.hasReduced(b, bound)) - return Reduced; - - // traversal reached the source vertex - if (a == b && Bound::geq(bound, APInt(bound.getBitWidth(), 0, true))) - return True; - - // if b has no predecessor then fail - if (!inequality_graph.hasEdge(b, bound.isUpperBound())) - return False; - - // a cycle was encountered - if (active.count(b)) { - if (Bound::leq(*active.lookup(b), bound)) - return Reduced; // a "harmless" cycle - - return False; // an amplifying cycle - } - - active[b] = &bound; - PHINode *PN = dyn_cast(b); - - // Test if a Value is a Phi. If it is a PHINode with more than 1 incoming - // value, then it is a phi, if it has 1 incoming value it is a sigma. - if (PN && PN->getNumIncomingValues() > 1) - updateMemDistance(a, b, bound, level, min); - else - updateMemDistance(a, b, bound, level, max); - - active.erase(b); - - ABCD::ProveResult res = mem_result.getBoundResult(b, bound); - return res; -} - -/// Updates the distance value for a and b -void ABCD::updateMemDistance(Value *a, Value *b, const Bound &bound, - unsigned level, meet_function meet) { - ABCD::ProveResult res = (meet == max) ? False : True; - - SmallVector Edges = inequality_graph.getEdges(b); - SmallVector::iterator begin = Edges.begin(), end = Edges.end(); - - for (; begin != end ; ++begin) { - if (((res >= Reduced) && (meet == max)) || - ((res == False) && (meet == min))) { - break; - } - const Edge &in = *begin; - if (in.isUpperBound() == bound.isUpperBound()) { - Value *succ = in.getVertex(); - res = meet(res, prove(a, succ, Bound(bound, in.getValue()), - level+1)); - } - } - - mem_result.updateBound(b, bound, res); -} - -/// Return the stored result for this bound -ABCD::ProveResult ABCD::MemoizedResultChart::getResult(const Bound &bound)const{ - if (max_false && Bound::leq(bound, *max_false)) - return False; - if (min_true && Bound::leq(*min_true, bound)) - return True; - if (min_reduced && Bound::leq(*min_reduced, bound)) - return Reduced; - return False; -} - -/// Stores a false found -void ABCD::MemoizedResultChart::addFalse(const Bound &bound) { - if (!max_false || Bound::leq(*max_false, bound)) - max_false.reset(new Bound(bound)); - - if (Bound::eq(max_false.get(), min_reduced.get())) - min_reduced.reset(new Bound(Bound::createIncrement(*min_reduced))); - if (Bound::eq(max_false.get(), min_true.get())) - min_true.reset(new Bound(Bound::createIncrement(*min_true))); - if (Bound::eq(min_reduced.get(), min_true.get())) - min_reduced.reset(); - clearRedundantReduced(); -} - -/// Stores a true found -void ABCD::MemoizedResultChart::addTrue(const Bound &bound) { - if (!min_true || Bound::leq(bound, *min_true)) - min_true.reset(new Bound(bound)); - - if (Bound::eq(min_true.get(), min_reduced.get())) - min_reduced.reset(new Bound(Bound::createDecrement(*min_reduced))); - if (Bound::eq(min_true.get(), max_false.get())) - max_false.reset(new Bound(Bound::createDecrement(*max_false))); - if (Bound::eq(max_false.get(), min_reduced.get())) - min_reduced.reset(); - clearRedundantReduced(); -} - -/// Stores a Reduced found -void ABCD::MemoizedResultChart::addReduced(const Bound &bound) { - if (!min_reduced || Bound::leq(bound, *min_reduced)) - min_reduced.reset(new Bound(bound)); - - if (Bound::eq(min_reduced.get(), min_true.get())) - min_true.reset(new Bound(Bound::createIncrement(*min_true))); - if (Bound::eq(min_reduced.get(), max_false.get())) - max_false.reset(new Bound(Bound::createDecrement(*max_false))); -} - -/// Clears redundant reduced -/// If a min_true is smaller than a min_reduced then the min_reduced -/// is unnecessary and then removed. It also works for min_reduced -/// begin smaller than max_false. -void ABCD::MemoizedResultChart::clearRedundantReduced() { - if (min_true && min_reduced && Bound::lt(*min_true, *min_reduced)) - min_reduced.reset(); - if (max_false && min_reduced && Bound::lt(*min_reduced, *max_false)) - min_reduced.reset(); -} - -/// Stores the bound found -void ABCD::MemoizedResult::updateBound(Value *b, const Bound &bound, - const ProveResult res) { - if (res == False) { - map[b].addFalse(bound); - } else if (res == True) { - map[b].addTrue(bound); - } else { - map[b].addReduced(bound); - } -} - -/// Adds an edge from V_from to V_to with weight value -void ABCD::InequalityGraph::addEdge(Value *V_to, Value *V_from, - APInt value, bool upper) { - assert(V_from->getType() == V_to->getType()); - assert(cast(V_from->getType())->getBitWidth() == - value.getBitWidth()); - - graph[V_from].push_back(Edge(V_to, value, upper)); -} - -/// Test if there is any edge from V in the upper direction -bool ABCD::InequalityGraph::hasEdge(Value *V, bool upper) const { - SmallVector it = graph.lookup(V); - - SmallVector::iterator begin = it.begin(); - SmallVector::iterator end = it.end(); - for (; begin != end; ++begin) { - if (begin->isUpperBound() == upper) { - return true; - } - } - return false; -} - -/// Prints the header of the dot file -void ABCD::InequalityGraph::printHeader(raw_ostream &OS, Function &F) const { - OS << "digraph dotgraph {\n"; - OS << "label=\"Inequality Graph for \'"; - OS << F.getNameStr() << "\' function\";\n"; - OS << "node [shape=record,fontname=\"Times-Roman\",fontsize=14];\n"; -} - -/// Prints the body of the dot file -void ABCD::InequalityGraph::printBody(raw_ostream &OS) const { - DenseMap >::const_iterator begin = - graph.begin(), end = graph.end(); - - for (; begin != end ; ++begin) { - SmallVector::const_iterator begin_par = - begin->second.begin(), end_par = begin->second.end(); - Value *source = begin->first; - - printVertex(OS, source); - - for (; begin_par != end_par ; ++begin_par) { - const Edge &edge = *begin_par; - printEdge(OS, source, edge); - } - } -} - -/// Prints vertex source to the dot file -/// -void ABCD::InequalityGraph::printVertex(raw_ostream &OS, Value *source) const { - OS << "\""; - printName(OS, source); - OS << "\""; - OS << " [label=\"{"; - printName(OS, source); - OS << "}\"];\n"; -} - -/// Prints the edge to the dot file -void ABCD::InequalityGraph::printEdge(raw_ostream &OS, Value *source, - const Edge &edge) const { - Value *dest = edge.getVertex(); - APInt value = edge.getValue(); - bool upper = edge.isUpperBound(); - - OS << "\""; - printName(OS, source); - OS << "\""; - OS << " -> "; - OS << "\""; - printName(OS, dest); - OS << "\""; - OS << " [label=\"" << value << "\""; - if (upper) { - OS << "color=\"blue\""; - } else { - OS << "color=\"red\""; - } - OS << "];\n"; -} - -void ABCD::InequalityGraph::printName(raw_ostream &OS, Value *info) const { - if (ConstantInt *CI = dyn_cast(info)) { - OS << *CI; - } else { - if (!info->hasName()) { - info->setName("V"); - } - OS << info->getNameStr(); - } -} - -/// createABCDPass - The public interface to this file... -FunctionPass *llvm::createABCDPass() { - return new ABCD(); -} Modified: llvm/trunk/lib/Transforms/Scalar/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/CMakeLists.txt?rev=112355&r1=112354&r2=112355&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/CMakeLists.txt (original) +++ llvm/trunk/lib/Transforms/Scalar/CMakeLists.txt Fri Aug 27 22:51:24 2010 @@ -1,5 +1,4 @@ add_llvm_library(LLVMScalarOpts - ABCD.cpp ADCE.cpp BasicBlockPlacement.cpp CodeGenPrepare.cpp Modified: llvm/trunk/lib/Transforms/Utils/CMakeLists.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/CMakeLists.txt?rev=112355&r1=112354&r2=112355&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Utils/CMakeLists.txt (original) +++ llvm/trunk/lib/Transforms/Utils/CMakeLists.txt Fri Aug 27 22:51:24 2010 @@ -20,7 +20,6 @@ Mem2Reg.cpp PromoteMemoryToRegister.cpp SSAUpdater.cpp - SSI.cpp SimplifyCFG.cpp UnifyFunctionExitNodes.cpp ValueMapper.cpp Removed: llvm/trunk/lib/Transforms/Utils/SSI.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/SSI.cpp?rev=112354&view=auto ============================================================================== --- llvm/trunk/lib/Transforms/Utils/SSI.cpp (original) +++ llvm/trunk/lib/Transforms/Utils/SSI.cpp (removed) @@ -1,433 +0,0 @@ -//===------------------- SSI.cpp - Creates SSI Representation -------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This pass converts a list of variables to the Static Single Information -// form. This is a program representation described by Scott Ananian in his -// Master Thesis: "The Static Single Information Form (1999)". -// We are building an on-demand representation, that is, we do not convert -// every single variable in the target function to SSI form. Rather, we receive -// a list of target variables that must be converted. We also do not -// completely convert a target variable to the SSI format. Instead, we only -// change the variable in the points where new information can be attached -// to its live range, that is, at branch points. -// -//===----------------------------------------------------------------------===// - -#define DEBUG_TYPE "ssi" - -#include "llvm/Transforms/Scalar.h" -#include "llvm/Transforms/Utils/SSI.h" -#include "llvm/ADT/Statistic.h" -#include "llvm/Analysis/Dominators.h" - -using namespace llvm; - -static const std::string SSI_PHI = "SSI_phi"; -static const std::string SSI_SIG = "SSI_sigma"; - -STATISTIC(NumSigmaInserted, "Number of sigma functions inserted"); -STATISTIC(NumPhiInserted, "Number of phi functions inserted"); - -void SSI::getAnalysisUsage(AnalysisUsage &AU) const { - AU.addRequiredTransitive(); - AU.addRequiredTransitive(); - AU.setPreservesAll(); -} - -bool SSI::runOnFunction(Function &F) { - DT_ = &getAnalysis(); - return false; -} - -/// This methods creates the SSI representation for the list of values -/// received. It will only create SSI representation if a value is used -/// to decide a branch. Repeated values are created only once. -/// -void SSI::createSSI(SmallVectorImpl &value) { - init(value); - - SmallPtrSet needConstruction; - for (SmallVectorImpl::iterator I = value.begin(), - E = value.end(); I != E; ++I) - if (created.insert(*I)) - needConstruction.insert(*I); - - insertSigmaFunctions(needConstruction); - - // Test if there is a need to transform to SSI - if (!needConstruction.empty()) { - insertPhiFunctions(needConstruction); - renameInit(needConstruction); - rename(DT_->getRoot()); - fixPhis(); - } - - clean(); -} - -/// Insert sigma functions (a sigma function is a phi function with one -/// operator) -/// -void SSI::insertSigmaFunctions(SmallPtrSet &value) { - for (SmallPtrSet::iterator I = value.begin(), - E = value.end(); I != E; ++I) { - for (Value::use_iterator begin = (*I)->use_begin(), - end = (*I)->use_end(); begin != end; ++begin) { - // Test if the Use of the Value is in a comparator - if (CmpInst *CI = dyn_cast(*begin)) { - // Iterates through all uses of CmpInst - for (Value::use_iterator begin_ci = CI->use_begin(), - end_ci = CI->use_end(); begin_ci != end_ci; ++begin_ci) { - // Test if any use of CmpInst is in a Terminator - if (TerminatorInst *TI = dyn_cast(*begin_ci)) { - insertSigma(TI, *I); - } - } - } - } - } -} - -/// Inserts Sigma Functions in every BasicBlock successor to Terminator -/// Instruction TI. All inserted Sigma Function are related to Instruction I. -/// -void SSI::insertSigma(TerminatorInst *TI, Instruction *I) { - // Basic Block of the Terminator Instruction - BasicBlock *BB = TI->getParent(); - for (unsigned i = 0, e = TI->getNumSuccessors(); i < e; ++i) { - // Next Basic Block - BasicBlock *BB_next = TI->getSuccessor(i); - if (BB_next != BB && - BB_next->getSinglePredecessor() != NULL && - dominateAny(BB_next, I)) { - PHINode *PN = PHINode::Create(I->getType(), SSI_SIG, BB_next->begin()); - PN->addIncoming(I, BB); - sigmas[PN] = I; - created.insert(PN); - defsites[I].push_back(BB_next); - ++NumSigmaInserted; - } - } -} - -/// Insert phi functions when necessary -/// -void SSI::insertPhiFunctions(SmallPtrSet &value) { - DominanceFrontier *DF = &getAnalysis(); - for (SmallPtrSet::iterator I = value.begin(), - E = value.end(); I != E; ++I) { - // Test if there were any sigmas for this variable - SmallPtrSet BB_visited; - - // Insert phi functions if there is any sigma function - while (!defsites[*I].empty()) { - - BasicBlock *BB = defsites[*I].back(); - - defsites[*I].pop_back(); - DominanceFrontier::iterator DF_BB = DF->find(BB); - - // The BB is unreachable. Skip it. - if (DF_BB == DF->end()) - continue; - - // Iterates through all the dominance frontier of BB - for (std::set::iterator DF_BB_begin = - DF_BB->second.begin(), DF_BB_end = DF_BB->second.end(); - DF_BB_begin != DF_BB_end; ++DF_BB_begin) { - BasicBlock *BB_dominated = *DF_BB_begin; - - // Test if has not yet visited this node and if the - // original definition dominates this node - if (BB_visited.insert(BB_dominated) && - DT_->properlyDominates(value_original[*I], BB_dominated) && - dominateAny(BB_dominated, *I)) { - PHINode *PN = PHINode::Create( - (*I)->getType(), SSI_PHI, BB_dominated->begin()); - phis.insert(std::make_pair(PN, *I)); - created.insert(PN); - - defsites[*I].push_back(BB_dominated); - ++NumPhiInserted; - } - } - } - BB_visited.clear(); - } -} - -/// Some initialization for the rename part -/// -void SSI::renameInit(SmallPtrSet &value) { - for (SmallPtrSet::iterator I = value.begin(), - E = value.end(); I != E; ++I) - value_stack[*I].push_back(*I); -} - -/// Renames all variables in the specified BasicBlock. -/// Only variables that need to be rename will be. -/// -void SSI::rename(BasicBlock *BB) { - SmallPtrSet defined; - - // Iterate through instructions and make appropriate renaming. - // For SSI_PHI (b = PHI()), store b at value_stack as a new - // definition of the variable it represents. - // For SSI_SIG (b = PHI(a)), substitute a with the current - // value of a, present in the value_stack. - // Then store bin the value_stack as the new definition of a. - // For all other instructions (b = OP(a, c, d, ...)), we need to substitute - // all operands with its current value, present in value_stack. - for (BasicBlock::iterator begin = BB->begin(), end = BB->end(); - begin != end; ++begin) { - Instruction *I = begin; - if (PHINode *PN = dyn_cast(I)) { // Treat PHI functions - Instruction* position; - - // Treat SSI_PHI - if ((position = getPositionPhi(PN))) { - value_stack[position].push_back(PN); - defined.insert(position); - // Treat SSI_SIG - } else if ((position = getPositionSigma(PN))) { - substituteUse(I); - value_stack[position].push_back(PN); - defined.insert(position); - } - - // Treat all other PHI functions - else { - substituteUse(I); - } - } - - // Treat all other functions - else { - substituteUse(I); - } - } - - // This loop iterates in all BasicBlocks that are successors of the current - // BasicBlock. For each SSI_PHI instruction found, insert an operand. - // This operand is the current operand in value_stack for the variable - // in "position". And the BasicBlock this operand represents is the current - // BasicBlock. - for (succ_iterator SI = succ_begin(BB), SE = succ_end(BB); SI != SE; ++SI) { - BasicBlock *BB_succ = *SI; - - for (BasicBlock::iterator begin = BB_succ->begin(), - notPhi = BB_succ->getFirstNonPHI(); begin != *notPhi; ++begin) { - Instruction *I = begin; - PHINode *PN = dyn_cast(I); - Instruction* position; - if (PN && ((position = getPositionPhi(PN)))) { - PN->addIncoming(value_stack[position].back(), BB); - } - } - } - - // This loop calls rename on all children from this block. This time children - // refers to a successor block in the dominance tree. - DomTreeNode *DTN = DT_->getNode(BB); - for (DomTreeNode::iterator begin = DTN->begin(), end = DTN->end(); - begin != end; ++begin) { - DomTreeNodeBase *DTN_children = *begin; - BasicBlock *BB_children = DTN_children->getBlock(); - rename(BB_children); - } - - // Now we remove all inserted definitions of a variable from the top of - // the stack leaving the previous one as the top. - for (SmallPtrSet::iterator DI = defined.begin(), - DE = defined.end(); DI != DE; ++DI) - value_stack[*DI].pop_back(); -} - -/// Substitute any use in this instruction for the last definition of -/// the variable -/// -void SSI::substituteUse(Instruction *I) { - for (unsigned i = 0, e = I->getNumOperands(); i < e; ++i) { - Value *operand = I->getOperand(i); - for (DenseMap >::iterator - VI = value_stack.begin(), VE = value_stack.end(); VI != VE; ++VI) { - if (operand == VI->second.front() && - I != VI->second.back()) { - PHINode *PN_I = dyn_cast(I); - PHINode *PN_vs = dyn_cast(VI->second.back()); - - // If a phi created in a BasicBlock is used as an operand of another - // created in the same BasicBlock, this step marks this second phi, - // to fix this issue later. It cannot be fixed now, because the - // operands of the first phi are not final yet. - if (PN_I && PN_vs && - VI->second.back()->getParent() == I->getParent()) { - - phisToFix.insert(PN_I); - } - - I->setOperand(i, VI->second.back()); - break; - } - } - } -} - -/// Test if the BasicBlock BB dominates any use or definition of value. -/// If it dominates a phi instruction that is on the same BasicBlock, -/// that does not count. -/// -bool SSI::dominateAny(BasicBlock *BB, Instruction *value) { - for (Value::use_iterator begin = value->use_begin(), - end = value->use_end(); begin != end; ++begin) { - Instruction *I = cast(*begin); - BasicBlock *BB_father = I->getParent(); - if (BB == BB_father && isa(I)) - continue; - if (DT_->dominates(BB, BB_father)) { - return true; - } - } - return false; -} - -/// When there is a phi node that is created in a BasicBlock and it is used -/// as an operand of another phi function used in the same BasicBlock, -/// LLVM looks this as an error. So on the second phi, the first phi is called -/// P and the BasicBlock it incomes is B. This P will be replaced by the value -/// it has for BasicBlock B. It also includes undef values for predecessors -/// that were not included in the phi. -/// -void SSI::fixPhis() { - for (SmallPtrSet::iterator begin = phisToFix.begin(), - end = phisToFix.end(); begin != end; ++begin) { - PHINode *PN = *begin; - for (unsigned i = 0, e = PN->getNumIncomingValues(); i < e; ++i) { - PHINode *PN_father = dyn_cast(PN->getIncomingValue(i)); - if (PN_father && PN->getParent() == PN_father->getParent() && - !DT_->dominates(PN->getParent(), PN->getIncomingBlock(i))) { - BasicBlock *BB = PN->getIncomingBlock(i); - int pos = PN_father->getBasicBlockIndex(BB); - PN->setIncomingValue(i, PN_father->getIncomingValue(pos)); - } - } - } - - for (DenseMapIterator begin = phis.begin(), - end = phis.end(); begin != end; ++begin) { - PHINode *PN = begin->first; - BasicBlock *BB = PN->getParent(); - pred_iterator PI = pred_begin(BB), PE = pred_end(BB); - SmallVector Preds(PI, PE); - for (unsigned size = Preds.size(); - PI != PE && PN->getNumIncomingValues() != size; ++PI) { - bool found = false; - for (unsigned i = 0, pn_end = PN->getNumIncomingValues(); - i < pn_end; ++i) { - if (PN->getIncomingBlock(i) == *PI) { - found = true; - break; - } - } - if (!found) { - PN->addIncoming(UndefValue::get(PN->getType()), *PI); - } - } - } -} - -/// Return which variable (position on the vector of variables) this phi -/// represents on the phis list. -/// -Instruction* SSI::getPositionPhi(PHINode *PN) { - DenseMap::iterator val = phis.find(PN); - if (val == phis.end()) - return 0; - else - return val->second; -} - -/// Return which variable (position on the vector of variables) this phi -/// represents on the sigmas list. -/// -Instruction* SSI::getPositionSigma(PHINode *PN) { - DenseMap::iterator val = sigmas.find(PN); - if (val == sigmas.end()) - return 0; - else - return val->second; -} - -/// Initializes -/// -void SSI::init(SmallVectorImpl &value) { - for (SmallVectorImpl::iterator I = value.begin(), - E = value.end(); I != E; ++I) { - value_original[*I] = (*I)->getParent(); - defsites[*I].push_back((*I)->getParent()); - } -} - -/// Clean all used resources in this creation of SSI -/// -void SSI::clean() { - phis.clear(); - sigmas.clear(); - phisToFix.clear(); - - defsites.clear(); - value_stack.clear(); - value_original.clear(); -} - -/// createSSIPass - The public interface to this file... -/// -FunctionPass *llvm::createSSIPass() { return new SSI(); } - -char SSI::ID = 0; -INITIALIZE_PASS(SSI, "ssi", - "Static Single Information Construction", false, false); - -/// SSIEverything - A pass that runs createSSI on every non-void variable, -/// intended for debugging. -namespace { - struct SSIEverything : public FunctionPass { - static char ID; // Pass identification, replacement for typeid - SSIEverything() : FunctionPass(ID) {} - - bool runOnFunction(Function &F); - - virtual void getAnalysisUsage(AnalysisUsage &AU) const { - AU.addRequired(); - } - }; -} - -bool SSIEverything::runOnFunction(Function &F) { - SmallVector Insts; - SSI &ssi = getAnalysis(); - - if (F.isDeclaration() || F.isIntrinsic()) return false; - - for (Function::iterator B = F.begin(), BE = F.end(); B != BE; ++B) - for (BasicBlock::iterator I = B->begin(), E = B->end(); I != E; ++I) - if (!I->getType()->isVoidTy()) - Insts.push_back(I); - - ssi.createSSI(Insts); - return true; -} - -/// createSSIEverythingPass - The public interface to this file... -/// -FunctionPass *llvm::createSSIEverythingPass() { return new SSIEverything(); } - -char SSIEverything::ID = 0; -INITIALIZE_PASS(SSIEverything, "ssi-everything", - "Static Single Information Construction", false, false); From sabre at nondot.org Fri Aug 27 23:09:24 2010 From: sabre at nondot.org (Chris Lattner) Date: Sat, 28 Aug 2010 04:09:24 -0000 Subject: [llvm-commits] [llvm] r112356 - in /llvm/trunk: docs/ include/llvm-c/ include/llvm/ include/llvm/Bitcode/ lib/AsmParser/ lib/Bitcode/Reader/ lib/Bitcode/Writer/ lib/CodeGen/AsmPrinter/ lib/CodeGen/SelectionDAG/ lib/Target/ lib/Transforms/IPO/ lib/VMCore/ test/Assembler/ test/Feature/ test/Other/ Message-ID: <20100828040925.B09CE2A6C12C@llvm.org> Author: lattner Date: Fri Aug 27 23:09:24 2010 New Revision: 112356 URL: http://llvm.org/viewvc/llvm-project?rev=112356&view=rev Log: remove unions from LLVM IR. They are severely buggy and not being actively maintained, improved, or extended. Removed: llvm/trunk/test/Assembler/2010-01-06-UnionType.ll llvm/trunk/test/Feature/unions.ll Modified: llvm/trunk/docs/BitCodeFormat.html llvm/trunk/docs/GetElementPtr.html llvm/trunk/docs/LangRef.html llvm/trunk/docs/ReleaseNotes.html llvm/trunk/include/llvm-c/Core.h llvm/trunk/include/llvm/Bitcode/LLVMBitCodes.h llvm/trunk/include/llvm/Constants.h llvm/trunk/include/llvm/DerivedTypes.h llvm/trunk/include/llvm/Type.h llvm/trunk/include/llvm/Value.h llvm/trunk/lib/AsmParser/LLLexer.cpp llvm/trunk/lib/AsmParser/LLParser.cpp llvm/trunk/lib/AsmParser/LLParser.h llvm/trunk/lib/AsmParser/LLToken.h llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp llvm/trunk/lib/Target/TargetData.cpp llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp llvm/trunk/lib/VMCore/AsmWriter.cpp llvm/trunk/lib/VMCore/ConstantFold.cpp llvm/trunk/lib/VMCore/Constants.cpp llvm/trunk/lib/VMCore/ConstantsContext.h llvm/trunk/lib/VMCore/Core.cpp llvm/trunk/lib/VMCore/LLVMContextImpl.cpp llvm/trunk/lib/VMCore/LLVMContextImpl.h llvm/trunk/lib/VMCore/Type.cpp llvm/trunk/lib/VMCore/TypesContext.h llvm/trunk/lib/VMCore/Verifier.cpp llvm/trunk/test/Other/constant-fold-gep.ll Modified: llvm/trunk/docs/BitCodeFormat.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/BitCodeFormat.html?rev=112356&r1=112355&r2=112356&view=diff ============================================================================== --- llvm/trunk/docs/BitCodeFormat.html (original) +++ llvm/trunk/docs/BitCodeFormat.html Fri Aug 27 23:09:24 2010 @@ -1367,21 +1367,6 @@

- -
TYPE_CODE_UNION Record -
- -
- -

[UNION, ...eltty...]

- -

The UNION record (code 17) adds a union type to -the type table. The eltty operand fields are zero or more type -indices representing the element types of the union. -

- -
-
CONSTANTS_BLOCK Contents
Modified: llvm/trunk/docs/GetElementPtr.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/GetElementPtr.html?rev=112356&r1=112355&r2=112356&view=diff ============================================================================== --- llvm/trunk/docs/GetElementPtr.html (original) +++ llvm/trunk/docs/GetElementPtr.html Fri Aug 27 23:09:24 2010 @@ -26,7 +26,6 @@
  • Why don't GEP x,0,0,1 and GEP x,1 alias?
  • Why do GEP x,1,0,0 and GEP x,1 alias?
  • Can GEP index into vector elements? -
  • Can GEP index into unions?
  • What effect do address spaces have on GEPs?
  • How is GEP different from ptrtoint, arithmetic, and inttoptr?
  • I'm writing a backend for a target which needs custom lowering for GEP. How do I do this? @@ -370,16 +369,6 @@
    - Can GEP index into unions? -
    -
    -

    Unknown.

    - -
    - - - -
    What effect do address spaces have on GEPs?
    Modified: llvm/trunk/docs/LangRef.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/LangRef.html?rev=112356&r1=112355&r2=112356&view=diff ============================================================================== --- llvm/trunk/docs/LangRef.html (original) +++ llvm/trunk/docs/LangRef.html Fri Aug 27 23:09:24 2010 @@ -74,7 +74,6 @@
  • Array Type
  • Structure Type
  • Packed Structure Type
    • -
  • Union Type
  • Vector Type
    • @@ -1475,7 +1474,6 @@ pointer, vector, structure, - union, array, label, metadata. @@ -1495,7 +1493,6 @@ pointer, structure, packed structure, - union, vector, opaque. @@ -1643,8 +1640,8 @@

    Aggregate Types are a subset of derived types that can contain multiple member types. Arrays, - structs, vectors and - unions are aggregate types.

    + structs, and vectors are + aggregate types.

    @@ -1714,9 +1711,7 @@
    Overview:

    The function type can be thought of as a function signature. It consists of a return type and a list of formal parameter types. The return type of a - function type is a scalar type, a void type, a struct type, or a union - type. If the return type is a struct type then all struct elements must be - of first class types, and the struct must have at least one element.

    + function type is a first class type or a void type.

    Syntax:
    @@ -1838,53 +1833,6 @@
 
 
 
-
     Union Type 
    
-
-
    
-
-
    Overview:
    
-
    A union type describes an object with size and alignment suitable for
-   an object of any one of a given set of types (also known as an "untagged"
-   union). It is similar in concept and usage to a
-   struct, except that all members of the union
-   have an offset of zero. The elements of a union may be any type that has a
-   size. Unions must have at least one member - empty unions are not allowed.
-   
    
-
-
    The size of the union as a whole will be the size of its largest member,
-   and the alignment requirements of the union as a whole will be the largest
-   alignment requirement of any member.
    
-
-
    Union members are accessed using 'load and
-   'store' by getting a pointer to a field with
-   the 'getelementptr' instruction.
-   Since all members are at offset zero, the getelementptr instruction does
-   not affect the address, only the type of the resulting pointer.
    
-
-
    Syntax:
    
-
    -  union { <type list> }
-
    
-
-
    Examples:
    
-
-  
-    
-    
-  
-    
-    
-  
-
    union { i32, i32*, float }A union of three types: an i32, a pointer to
-      an i32, and a float.
    
-      union { float, i32 (i32) * }A union, where the first element is a float and the
-      second element is a pointer to a
-      function that takes an i32, returning
-      an i32.
    
-
-
    
-
-
 
     Pointer Type 
    
 
 
    
@@ -2125,14 +2073,6 @@
       the number and types of elements must match those specified by the
       type.
 
-  
    Union constants
    
-  
    Union constants are represented with notation similar to a structure with
-      a single element - that is, a single typed element surrounded
-      by braces ({})).  For example: "{ i32 4 }".  The
-      union type can be initialized with a single-element
-      struct as long as the type of the struct element matches the type of
-      one of the union members.
    
-
   
    Array constants
    
   
    Array constants are represented with notation similar to array type
      definitions (a comma separated list of elements, surrounded by square
@@ -4153,7 +4093,7 @@
 
 
    Arguments:
    
 
    The first operand of an 'extractvalue' instruction is a value
-   of struct, union  or
+   of struct or
    array type.  The operands are constant indices to
    specify which value to extract in a similar manner as indices in a
    'getelementptr' instruction.
    
@@ -4187,7 +4127,7 @@
 
 
    Arguments:
    
 
    The first operand of an 'insertvalue' instruction is a value
-   of struct, union or
+   of struct or
    array type.  The second operand is a first-class
    value to insert.  The following operands are constant indices indicating
    the position at which to insert the value in a similar manner as indices in a
@@ -4420,12 +4360,12 @@
    indexes a value of the type pointed to (not necessarily the value directly
    pointed to, since the first index can be non-zero), etc. The first type
    indexed into must be a pointer value, subsequent types can be arrays,
-   vectors, structs and unions. Note that subsequent types being indexed into
+   vectors, and structs. Note that subsequent types being indexed into
    can never be pointers, since that would require loading the pointer before
    continuing calculation.
    
 
 
    The type of each index argument depends on the type it is indexing into.
-   When indexing into a (optionally packed) structure or union, only i32
+   When indexing into a (optionally packed) structure, only i32
    integer constants are allowed.  When indexing into an array, pointer
    or vector, integers of any width are allowed, and they are not required to be
    constant.
    

Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=112356&r1=112355&r2=112356&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Fri Aug 27 23:09:24 2010
@@ -67,9 +67,8 @@
   include/llvm/Analysis/LiveValues.h => Dan
   lib/Transforms/IPO/MergeFunctions.cpp => consider for 2.8.
   llvm/Analysis/PointerTracking.h => Edwin wants this, consider for 2.8.
-  ABCD, GEPSplitterPass
+  GEPSplitterPass
   MSIL backend?
-  lib/Transforms/Utils/SSI.cpp  -> ABCD depends on it.
 -->
  
    

Modified: llvm/trunk/include/llvm-c/Core.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm-c/Core.h?rev=112356&r1=112355&r2=112356&view=diff
==============================================================================
--- llvm/trunk/include/llvm-c/Core.h (original)
+++ llvm/trunk/include/llvm-c/Core.h Fri Aug 27 23:09:24 2010
@@ -204,8 +204,7 @@
   LLVMPointerTypeKind,     /**< Pointers */
   LLVMOpaqueTypeKind,      /**< Opaque: type with unknown structure */
   LLVMVectorTypeKind,      /**< SIMD 'packed' format, or other vector type */
-  LLVMMetadataTypeKind,    /**< Metadata */
-  LLVMUnionTypeKind        /**< Unions */
+  LLVMMetadataTypeKind     /**< Metadata */
 } LLVMTypeKind;
 
 typedef enum {
@@ -395,13 +394,6 @@
 void LLVMGetStructElementTypes(LLVMTypeRef StructTy, LLVMTypeRef *Dest);
 LLVMBool LLVMIsPackedStruct(LLVMTypeRef StructTy);
 
-/* Operations on union types */
-LLVMTypeRef LLVMUnionTypeInContext(LLVMContextRef C, LLVMTypeRef *ElementTypes,
-                                   unsigned ElementCount);
-LLVMTypeRef LLVMUnionType(LLVMTypeRef *ElementTypes, unsigned ElementCount);
-unsigned LLVMCountUnionElementTypes(LLVMTypeRef UnionTy);
-void LLVMGetUnionElementTypes(LLVMTypeRef UnionTy, LLVMTypeRef *Dest);
-
 /* Operations on array, pointer, and vector types (sequence types) */
 LLVMTypeRef LLVMArrayType(LLVMTypeRef ElementType, unsigned ElementCount);
 LLVMTypeRef LLVMPointerType(LLVMTypeRef ElementType, unsigned AddressSpace);
@@ -574,7 +566,6 @@
 LLVMValueRef LLVMConstStruct(LLVMValueRef *ConstantVals, unsigned Count,
                              LLVMBool Packed);
 LLVMValueRef LLVMConstVector(LLVMValueRef *ScalarConstantVals, unsigned Size);
-LLVMValueRef LLVMConstUnion(LLVMTypeRef Ty, LLVMValueRef Val);
 
 /* Constant expressions */
 LLVMOpcode LLVMGetConstOpcode(LLVMValueRef ConstantVal);

Modified: llvm/trunk/include/llvm/Bitcode/LLVMBitCodes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Bitcode/LLVMBitCodes.h?rev=112356&r1=112355&r2=112356&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Bitcode/LLVMBitCodes.h (original)
+++ llvm/trunk/include/llvm/Bitcode/LLVMBitCodes.h Fri Aug 27 23:09:24 2010
@@ -94,8 +94,7 @@
     TYPE_CODE_FP128    = 14,   // LONG DOUBLE (112 bit mantissa)
     TYPE_CODE_PPC_FP128= 15,   // PPC LONG DOUBLE (2 doubles)
 
-    TYPE_CODE_METADATA = 16,   // METADATA
-    TYPE_CODE_UNION    = 17    // UNION: [eltty x N]
+    TYPE_CODE_METADATA = 16    // METADATA
   };
 
   // The type symbol table only has one code (TST_ENTRY_CODE).

Modified: llvm/trunk/include/llvm/Constants.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Constants.h?rev=112356&r1=112355&r2=112356&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Constants.h (original)
+++ llvm/trunk/include/llvm/Constants.h Fri Aug 27 23:09:24 2010
@@ -33,7 +33,6 @@
 class ArrayType;
 class IntegerType;
 class StructType;
-class UnionType;
 class PointerType;
 class VectorType;
 
@@ -459,49 +458,6 @@
 
 DEFINE_TRANSPARENT_CASTED_OPERAND_ACCESSORS(ConstantStruct, Constant)
 
-//===----------------------------------------------------------------------===//
-// ConstantUnion - Constant Union Declarations
-//
-class ConstantUnion : public Constant {
-  friend struct ConstantCreator;
-  ConstantUnion(const ConstantUnion &);      // DO NOT IMPLEMENT
-protected:
-  ConstantUnion(const UnionType *T, Constant* Val);
-public:
-  // ConstantUnion accessors
-  static Constant *get(const UnionType *T, Constant* V);
-
-  /// Transparently provide more efficient getOperand methods.
-  DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Constant);
-  
-  /// getType() specialization - Reduce amount of casting...
-  ///
-  inline const UnionType *getType() const {
-    return reinterpret_cast(Value::getType());
-  }
-
-  /// isNullValue - Return true if this is the value that would be returned by
-  /// getNullValue.  This always returns false because zero structs are always
-  /// created as ConstantAggregateZero objects.
-  virtual bool isNullValue() const {
-    return false;
-  }
-
-  virtual void destroyConstant();
-  virtual void replaceUsesOfWithOnConstant(Value *From, Value *To, Use *U);
-
-  /// Methods for support type inquiry through isa, cast, and dyn_cast:
-  static inline bool classof(const ConstantUnion *) { return true; }
-  static bool classof(const Value *V) {
-    return V->getValueID() == ConstantUnionVal;
-  }
-};
-
-template <>
-struct OperandTraits : public FixedNumOperandTraits<1> {
-};
-
-DEFINE_TRANSPARENT_CASTED_OPERAND_ACCESSORS(ConstantUnion, Constant)
 
 //===----------------------------------------------------------------------===//
 /// ConstantVector - Constant Vector Declarations

Modified: llvm/trunk/include/llvm/DerivedTypes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/DerivedTypes.h?rev=112356&r1=112355&r2=112356&view=diff
==============================================================================
--- llvm/trunk/include/llvm/DerivedTypes.h (original)
+++ llvm/trunk/include/llvm/DerivedTypes.h Fri Aug 27 23:09:24 2010
@@ -27,7 +27,6 @@
 class FunctionValType;
 class ArrayValType;
 class StructValType;
-class UnionValType;
 class PointerValType;
 class VectorValType;
 class IntegerValType;
@@ -226,8 +225,7 @@
     return T->getTypeID() == ArrayTyID ||
            T->getTypeID() == StructTyID ||
            T->getTypeID() == PointerTyID ||
-           T->getTypeID() == VectorTyID ||
-           T->getTypeID() == UnionTyID;
+           T->getTypeID() == VectorTyID;
   }
 };
 
@@ -298,64 +296,6 @@
   bool isPacked() const { return (0 != getSubclassData()) ? true : false; }
 };
 
-
-/// UnionType - Class to represent union types. A union type is similar to
-/// a structure, except that all member fields begin at offset 0.
-///
-class UnionType : public CompositeType {
-  friend class TypeMap;
-  UnionType(const UnionType &);                   // Do not implement
-  const UnionType &operator=(const UnionType &);  // Do not implement
-  UnionType(LLVMContext &C, const Type* const* Types, unsigned NumTypes);
-public:
-  /// UnionType::get - This static method is the primary way to create a
-  /// UnionType.
-  static UnionType *get(const Type* const* Types, unsigned NumTypes);
-
-  /// UnionType::get - This static method is a convenience method for
-  /// creating union types by specifying the elements as arguments.
-  static UnionType *get(const Type *type, ...) END_WITH_NULL;
-
-  /// isValidElementType - Return true if the specified type is valid as a
-  /// element type.
-  static bool isValidElementType(const Type *ElemTy);
-  
-  /// Given an element type, return the member index of that type, or -1
-  /// if there is no such member type.
-  int getElementTypeIndex(const Type *ElemTy) const;
-
-  // Iterator access to the elements
-  typedef Type::subtype_iterator element_iterator;
-  element_iterator element_begin() const { return ContainedTys; }
-  element_iterator element_end() const { return &ContainedTys[NumContainedTys];}
-
-  // Random access to the elements
-  unsigned getNumElements() const { return NumContainedTys; }
-  const Type *getElementType(unsigned N) const {
-    assert(N < NumContainedTys && "Element number out of range!");
-    return ContainedTys[N];
-  }
-
-  /// getTypeAtIndex - Given an index value into the type, return the type of
-  /// the element.  For a union type, this must be a constant value...
-  ///
-  virtual const Type *getTypeAtIndex(const Value *V) const;
-  virtual const Type *getTypeAtIndex(unsigned Idx) const;
-  virtual bool indexValid(const Value *V) const;
-  virtual bool indexValid(unsigned Idx) const;
-
-  // Implement the AbstractTypeUser interface.
-  virtual void refineAbstractType(const DerivedType *OldTy, const Type *NewTy);
-  virtual void typeBecameConcrete(const DerivedType *AbsTy);
-
-  // Methods for support type inquiry through isa, cast, and dyn_cast:
-  static inline bool classof(const UnionType *) { return true; }
-  static inline bool classof(const Type *T) {
-    return T->getTypeID() == UnionTyID;
-  }
-};
-
-
 /// SequentialType - This is the superclass of the array, pointer and vector
 /// type classes.  All of these represent "arrays" in memory.  The array type
 /// represents a specifically sized array, pointer types are unsized/unknown

Modified: llvm/trunk/include/llvm/Type.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Type.h?rev=112356&r1=112355&r2=112356&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Type.h (original)
+++ llvm/trunk/include/llvm/Type.h Fri Aug 27 23:09:24 2010
@@ -82,11 +82,10 @@
     IntegerTyID,     ///<  8: Arbitrary bit width integers
     FunctionTyID,    ///<  9: Functions
     StructTyID,      ///< 10: Structures
-    UnionTyID,       ///< 11: Unions
-    ArrayTyID,       ///< 12: Arrays
-    PointerTyID,     ///< 13: Pointers
-    OpaqueTyID,      ///< 14: Opaque: type with unknown structure
-    VectorTyID,      ///< 15: SIMD 'packed' format, or other vector type
+    ArrayTyID,       ///< 11: Arrays
+    PointerTyID,     ///< 12: Pointers
+    OpaqueTyID,      ///< 13: Opaque: type with unknown structure
+    VectorTyID,      ///< 14: SIMD 'packed' format, or other vector type
 
     NumTypeIDs,                         // Must remain as last defined ID
     LastPrimitiveTyID = MetadataTyID,
@@ -243,10 +242,6 @@
   ///
   bool isStructTy() const { return ID == StructTyID; }
 
-  /// isUnionTy - True if this is an instance of UnionType.
-  ///
-  bool isUnionTy() const { return ID == UnionTyID; }
-
   /// isArrayTy - True if this is an instance of ArrayType.
   ///
   bool isArrayTy() const { return ID == ArrayTyID; }
@@ -306,7 +301,7 @@
   /// does not include vector types.
   ///
   inline bool isAggregateType() const {
-    return ID == StructTyID || ID == ArrayTyID || ID == UnionTyID;
+    return ID == StructTyID || ID == ArrayTyID;
   }
 
   /// isSized - Return true if it makes sense to take the size of this type.  To
@@ -319,8 +314,7 @@
       return true;
     // If it is not something that can have a size (e.g. a function or label),
     // it doesn't have a size.
-    if (ID != StructTyID && ID != ArrayTyID && ID != VectorTyID &&
-        ID != UnionTyID)
+    if (ID != StructTyID && ID != ArrayTyID && ID != VectorTyID)
       return false;
     // If it is something that can have a size and it's concrete, it definitely
     // has a size, otherwise we have to try harder to decide.

Modified: llvm/trunk/include/llvm/Value.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Value.h?rev=112356&r1=112355&r2=112356&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Value.h (original)
+++ llvm/trunk/include/llvm/Value.h Fri Aug 27 23:09:24 2010
@@ -215,7 +215,6 @@
     ConstantFPVal,            // This is an instance of ConstantFP
     ConstantArrayVal,         // This is an instance of ConstantArray
     ConstantStructVal,        // This is an instance of ConstantStruct
-    ConstantUnionVal,         // This is an instance of ConstantUnion
     ConstantVectorVal,        // This is an instance of ConstantVector
     ConstantPointerNullVal,   // This is an instance of ConstantPointerNull
     MDNodeVal,                // This is an instance of MDNode

Modified: llvm/trunk/lib/AsmParser/LLLexer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/LLLexer.cpp?rev=112356&r1=112355&r2=112356&view=diff
==============================================================================
--- llvm/trunk/lib/AsmParser/LLLexer.cpp (original)
+++ llvm/trunk/lib/AsmParser/LLLexer.cpp Fri Aug 27 23:09:24 2010
@@ -573,7 +573,6 @@
 
   KEYWORD(type);
   KEYWORD(opaque);
-  KEYWORD(union);
 
   KEYWORD(eq); KEYWORD(ne); KEYWORD(slt); KEYWORD(sgt); KEYWORD(sle);
   KEYWORD(sge); KEYWORD(ult); KEYWORD(ugt); KEYWORD(ule); KEYWORD(uge);

Modified: llvm/trunk/lib/AsmParser/LLParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/LLParser.cpp?rev=112356&r1=112355&r2=112356&view=diff
==============================================================================
--- llvm/trunk/lib/AsmParser/LLParser.cpp (original)
+++ llvm/trunk/lib/AsmParser/LLParser.cpp Fri Aug 27 23:09:24 2010
@@ -1359,11 +1359,6 @@
     if (ParseStructType(Result, false))
       return true;
     break;
-  case lltok::kw_union:
-    // TypeRec ::= 'union' '{' ... '}'
-    if (ParseUnionType(Result))
-      return true;
-    break;
   case lltok::lsquare:
     // TypeRec ::= '[' ... ']'
     Lex.Lex(); // eat the lsquare.
@@ -1673,38 +1668,6 @@
   return false;
 }
 
-/// ParseUnionType
-///   TypeRec
-///     ::= 'union' '{' TypeRec (',' TypeRec)* '}'
-bool LLParser::ParseUnionType(PATypeHolder &Result) {
-  assert(Lex.getKind() == lltok::kw_union);
-  Lex.Lex(); // Consume the 'union'
-
-  if (ParseToken(lltok::lbrace, "'{' expected after 'union'")) return true;
-
-  SmallVector ParamsList;
-  do {
-    LocTy EltTyLoc = Lex.getLoc();
-    if (ParseTypeRec(Result)) return true;
-    ParamsList.push_back(Result);
-
-    if (Result->isVoidTy())
-      return Error(EltTyLoc, "union element can not have void type");
-    if (!UnionType::isValidElementType(Result))
-      return Error(EltTyLoc, "invalid element type for union");
-
-  } while (EatIfPresent(lltok::comma)) ;
-
-  if (ParseToken(lltok::rbrace, "expected '}' at end of union"))
-    return true;
-
-  SmallVector ParamsListTy;
-  for (unsigned i = 0, e = ParamsList.size(); i != e; ++i)
-    ParamsListTy.push_back(ParamsList[i].get());
-  Result = HandleUpRefs(UnionType::get(&ParamsListTy[0], ParamsListTy.size()));
-  return false;
-}
-
 /// ParseArrayVectorType - Parse an array or vector type, assuming the first
 /// token has already been consumed.
 ///   TypeRec
@@ -2656,16 +2619,8 @@
     V = Constant::getNullValue(Ty);
     return false;
   case ValID::t_Constant:
-    if (ID.ConstantVal->getType() != Ty) {
-      // Allow a constant struct with a single member to be converted
-      // to a union, if the union has a member which is the same type
-      // as the struct member.
-      if (const UnionType* utype = dyn_cast(Ty)) {
-        return ParseUnionValue(utype, ID, V);
-      }
-
+    if (ID.ConstantVal->getType() != Ty)
       return Error(ID.Loc, "constant expression type mismatch");
-    }
 
     V = ID.ConstantVal;
     return false;
@@ -2696,22 +2651,6 @@
   return false;
 }
 
-bool LLParser::ParseUnionValue(const UnionType* utype, ValID &ID, Value *&V) {
-  if (const StructType* stype = dyn_cast(ID.ConstantVal->getType())) {
-    if (stype->getNumContainedTypes() != 1)
-      return Error(ID.Loc, "constant expression type mismatch");
-    int index = utype->getElementTypeIndex(stype->getContainedType(0));
-    if (index < 0)
-      return Error(ID.Loc, "initializer type is not a member of the union");
-
-    V = ConstantUnion::get(
-        utype, cast(ID.ConstantVal->getOperand(0)));
-    return false;
-  }
-
-  return Error(ID.Loc, "constant expression type mismatch");
-}
-
 
 /// FunctionHeader
 ///   ::= OptionalLinkage OptionalVisibility OptionalCallingConv OptRetAttrs

Modified: llvm/trunk/lib/AsmParser/LLParser.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/LLParser.h?rev=112356&r1=112355&r2=112356&view=diff
==============================================================================
--- llvm/trunk/lib/AsmParser/LLParser.h (original)
+++ llvm/trunk/lib/AsmParser/LLParser.h Fri Aug 27 23:09:24 2010
@@ -32,7 +32,6 @@
   class GlobalValue;
   class MDString;
   class MDNode;
-  class UnionType;
 
   /// ValID - Represents a reference of a definition of some sort with no type.
   /// There are several cases where we have to parse the value but where the
@@ -229,7 +228,6 @@
     }
     bool ParseTypeRec(PATypeHolder &H);
     bool ParseStructType(PATypeHolder &H, bool Packed);
-    bool ParseUnionType(PATypeHolder &H);
     bool ParseArrayVectorType(PATypeHolder &H, bool isVector);
     bool ParseFunctionType(PATypeHolder &Result);
     PATypeHolder HandleUpRefs(const Type *Ty);
@@ -298,7 +296,6 @@
       return ParseTypeAndBasicBlock(BB, Loc, PFS);
     }
 
-    bool ParseUnionValue(const UnionType* utype, ValID &ID, Value *&V);
 
     struct ParamInfo {
       LocTy Loc;

Modified: llvm/trunk/lib/AsmParser/LLToken.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/LLToken.h?rev=112356&r1=112355&r2=112356&view=diff
==============================================================================
--- llvm/trunk/lib/AsmParser/LLToken.h (original)
+++ llvm/trunk/lib/AsmParser/LLToken.h Fri Aug 27 23:09:24 2010
@@ -98,7 +98,6 @@
 
     kw_type,
     kw_opaque,
-    kw_union,
 
     kw_eq, kw_ne, kw_slt, kw_sgt, kw_sle, kw_sge, kw_ult, kw_ugt, kw_ule,
     kw_uge, kw_oeq, kw_one, kw_olt, kw_ogt, kw_ole, kw_oge, kw_ord, kw_uno,

Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp?rev=112356&r1=112355&r2=112356&view=diff
==============================================================================
--- llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp (original)
+++ llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Fri Aug 27 23:09:24 2010
@@ -297,8 +297,6 @@
       } else if (ConstantStruct *UserCS = dyn_cast(UserC)) {
         NewC = ConstantStruct::get(Context, &NewOps[0], NewOps.size(),
                                          UserCS->getType()->isPacked());
-      } else if (ConstantUnion *UserCU = dyn_cast(UserC)) {
-        NewC = ConstantUnion::get(UserCU->getType(), NewOps[0]);
       } else if (isa(UserC)) {
         NewC = ConstantVector::get(&NewOps[0], NewOps.size());
       } else {
@@ -591,13 +589,6 @@
       ResultTy = StructType::get(Context, EltTys, Record[0]);
       break;
     }
-    case bitc::TYPE_CODE_UNION: {  // UNION: [eltty x N]
-      SmallVector EltTys;
-      for (unsigned i = 0, e = Record.size(); i != e; ++i)
-        EltTys.push_back(getTypeByID(Record[i], true));
-      ResultTy = UnionType::get(&EltTys[0], EltTys.size());
-      break;
-    }
     case bitc::TYPE_CODE_ARRAY:     // ARRAY: [numelts, eltty]
       if (Record.size() < 2)
         return Error("Invalid ARRAY type record");
@@ -1014,11 +1005,6 @@
           Elts.push_back(ValueList.getConstantFwdRef(Record[i],
                                                      STy->getElementType(i)));
         V = ConstantStruct::get(STy, Elts);
-      } else if (const UnionType *UnTy = dyn_cast(CurTy)) {
-        uint64_t Index = Record[0];
-        Constant *Val = ValueList.getConstantFwdRef(Record[1],
-                                        UnTy->getElementType(Index));
-        V = ConstantUnion::get(UnTy, Val);
       } else if (const ArrayType *ATy = dyn_cast(CurTy)) {
         const Type *EltTy = ATy->getElementType();
         for (unsigned i = 0; i != Size; ++i)

Modified: llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp?rev=112356&r1=112355&r2=112356&view=diff
==============================================================================
--- llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp (original)
+++ llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp Fri Aug 27 23:09:24 2010
@@ -181,14 +181,6 @@
                             Log2_32_Ceil(VE.getTypes().size()+1)));
   unsigned StructAbbrev = Stream.EmitAbbrev(Abbv);
 
-  // Abbrev for TYPE_CODE_UNION.
-  Abbv = new BitCodeAbbrev();
-  Abbv->Add(BitCodeAbbrevOp(bitc::TYPE_CODE_UNION));
-  Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Array));
-  Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed,
-                            Log2_32_Ceil(VE.getTypes().size()+1)));
-  unsigned UnionAbbrev = Stream.EmitAbbrev(Abbv);
-
   // Abbrev for TYPE_CODE_ARRAY.
   Abbv = new BitCodeAbbrev();
   Abbv->Add(BitCodeAbbrevOp(bitc::TYPE_CODE_ARRAY));
@@ -258,17 +250,6 @@
       AbbrevToUse = StructAbbrev;
       break;
     }
-    case Type::UnionTyID: {
-      const UnionType *UT = cast(T);
-      // UNION: [eltty x N]
-      Code = bitc::TYPE_CODE_UNION;
-      // Output all of the element types.
-      for (UnionType::element_iterator I = UT->element_begin(),
-           E = UT->element_end(); I != E; ++I)
-        TypeVals.push_back(VE.getTypeID(*I));
-      AbbrevToUse = UnionAbbrev;
-      break;
-    }
     case Type::ArrayTyID: {
       const ArrayType *AT = cast(T);
       // ARRAY: [numelts, eltty]
@@ -811,20 +792,6 @@
       for (unsigned i = 0, e = C->getNumOperands(); i != e; ++i)
         Record.push_back(VE.getValueID(C->getOperand(i)));
       AbbrevToUse = AggregateAbbrev;
-    } else if (isa(C)) {
-      Code = bitc::CST_CODE_AGGREGATE;
-
-      // Unions only have one entry but we must send type along with it.
-      const Type *EntryKind = C->getOperand(0)->getType();
-
-      const UnionType *UnTy = cast(C->getType());
-      int UnionIndex = UnTy->getElementTypeIndex(EntryKind);
-      assert(UnionIndex != -1 && "Constant union contains invalid entry");
-
-      Record.push_back(UnionIndex);
-      Record.push_back(VE.getValueID(C->getOperand(0)));
-
-      AbbrevToUse = AggregateAbbrev;
     } else if (const ConstantExpr *CE = dyn_cast(C)) {
       switch (CE->getOpcode()) {
       default:

Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp?rev=112356&r1=112355&r2=112356&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp (original)
+++ llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp Fri Aug 27 23:09:24 2010
@@ -1433,21 +1433,6 @@
          "Layout of constant struct may be incorrect!");
 }
 
-static void EmitGlobalConstantUnion(const ConstantUnion *CU, 
-                                    unsigned AddrSpace, AsmPrinter &AP) {
-  const TargetData *TD = AP.TM.getTargetData();
-  unsigned Size = TD->getTypeAllocSize(CU->getType());
-
-  const Constant *Contents = CU->getOperand(0);
-  unsigned FilledSize = TD->getTypeAllocSize(Contents->getType());
-    
-  // Print the actually filled part
-  EmitGlobalConstantImpl(Contents, AddrSpace, AP);
-
-  // And pad with enough zeroes
-  AP.OutStreamer.EmitZeros(Size-FilledSize, AddrSpace);
-}
-
 static void EmitGlobalConstantFP(const ConstantFP *CFP, unsigned AddrSpace,
                                  AsmPrinter &AP) {
   // FP Constants are printed as integer constants to avoid losing
@@ -1573,9 +1558,6 @@
     return;
   }
   
-  if (const ConstantUnion *CVU = dyn_cast(CV))
-    return EmitGlobalConstantUnion(CVU, AddrSpace, AP);
-  
   if (const ConstantVector *V = dyn_cast(CV))
     return EmitGlobalConstantVector(V, AddrSpace, AP);
   

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=112356&r1=112355&r2=112356&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Fri Aug 27 23:09:24 2010
@@ -2804,11 +2804,6 @@
       }
 
       Ty = StTy->getElementType(Field);
-    } else if (const UnionType *UnTy = dyn_cast(Ty)) {
-      unsigned Field = cast(Idx)->getZExtValue();
-      
-      // Offset canonically 0 for unions, but type changes
-      Ty = UnTy->getElementType(Field);
     } else {
       Ty = cast(Ty)->getElementType();
 

Modified: llvm/trunk/lib/Target/TargetData.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetData.cpp?rev=112356&r1=112355&r2=112356&view=diff
==============================================================================
--- llvm/trunk/lib/Target/TargetData.cpp (original)
+++ llvm/trunk/lib/Target/TargetData.cpp Fri Aug 27 23:09:24 2010
@@ -454,15 +454,6 @@
   case Type::StructTyID:
     // Get the layout annotation... which is lazily created on demand.
     return getStructLayout(cast(Ty))->getSizeInBits();
-  case Type::UnionTyID: {
-    const UnionType *UnTy = cast(Ty);
-    uint64_t Size = 0;
-    for (UnionType::element_iterator i = UnTy->element_begin(),
-             e = UnTy->element_end(); i != e; ++i) {
-      Size = std::max(Size, getTypeSizeInBits(*i));
-    }
-    return Size;
-  }
   case Type::IntegerTyID:
     return cast(Ty)->getBitWidth();
   case Type::VoidTyID:
@@ -519,17 +510,6 @@
     unsigned Align = getAlignmentInfo(AGGREGATE_ALIGN, 0, abi_or_pref, Ty);
     return std::max(Align, Layout->getAlignment());
   }
-  case Type::UnionTyID: {
-    const UnionType *UnTy = cast(Ty);
-    unsigned Align = 1;
-
-    // Unions need the maximum alignment of all their entries
-    for (UnionType::element_iterator i = UnTy->element_begin(), 
-             e = UnTy->element_end(); i != e; ++i) {
-      Align = std::max(Align, getAlignment(*i, abi_or_pref));
-    }
-    return Align;
-  }
   case Type::IntegerTyID:
   case Type::VoidTyID:
     AlignType = INTEGER_ALIGN;
@@ -614,11 +594,6 @@
 
       // Update Ty to refer to current element
       Ty = STy->getElementType(FieldNo);
-    } else if (const UnionType *UnTy = dyn_cast(*TI)) {
-        unsigned FieldNo = cast(Indices[CurIDX])->getZExtValue();
-
-        // Offset into union is canonically 0, but type changes
-        Ty = UnTy->getElementType(FieldNo);
     } else {
       // Update Ty to refer to current element
       Ty = cast(Ty)->getElementType();

Modified: llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp?rev=112356&r1=112355&r2=112356&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp Fri Aug 27 23:09:24 2010
@@ -220,20 +220,6 @@
     return true;
   }
 
-  case Type::UnionTyID: {
-    const UnionType *UTy1 = cast(Ty1);
-    const UnionType *UTy2 = cast(Ty2);
-
-    if (UTy1->getNumElements() != UTy2->getNumElements())
-      return false;
-
-    for (unsigned i = 0, e = UTy1->getNumElements(); i != e; ++i) {
-      if (!isEquivalentType(UTy1->getElementType(i), UTy2->getElementType(i)))
-        return false;
-    }
-    return true;
-  }
-
   case Type::FunctionTyID: {
     const FunctionType *FTy1 = cast(Ty1);
     const FunctionType *FTy2 = cast(Ty2);

Modified: llvm/trunk/lib/VMCore/AsmWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/AsmWriter.cpp?rev=112356&r1=112355&r2=112356&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/AsmWriter.cpp (original)
+++ llvm/trunk/lib/VMCore/AsmWriter.cpp Fri Aug 27 23:09:24 2010
@@ -238,21 +238,6 @@
       OS << '>';
     break;
   }
-  case Type::UnionTyID: {
-    const UnionType *UTy = cast(Ty);
-    OS << "union {";
-    for (StructType::element_iterator I = UTy->element_begin(),
-         E = UTy->element_end(); I != E; ++I) {
-      OS << ' ';
-      CalcTypeName(*I, TypeStack, OS);
-      if (llvm::next(I) == UTy->element_end())
-        OS << ' ';
-      else
-        OS << ',';
-    }
-    OS << '}';
-    break;
-  }
   case Type::PointerTyID: {
     const PointerType *PTy = cast(Ty);
     CalcTypeName(PTy->getElementType(), TypeStack, OS);
@@ -1042,16 +1027,6 @@
     return;
   }
 
-  if (const ConstantUnion *CU = dyn_cast(CV)) {
-    Out << "{ ";
-    TypePrinter.print(CU->getOperand(0)->getType(), Out);
-    Out << ' ';
-    WriteAsOperandInternal(Out, CU->getOperand(0), &TypePrinter, Machine,
-                           Context);
-    Out << " }";
-    return;
-  }
-  
   if (const ConstantVector *CP = dyn_cast(CV)) {
     const Type *ETy = CP->getType()->getElementType();
     assert(CP->getNumOperands() > 0 &&

Modified: llvm/trunk/lib/VMCore/ConstantFold.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/ConstantFold.cpp?rev=112356&r1=112355&r2=112356&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/ConstantFold.cpp (original)
+++ llvm/trunk/lib/VMCore/ConstantFold.cpp Fri Aug 27 23:09:24 2010
@@ -357,22 +357,6 @@
       }
     }
 
-  if (const UnionType *UTy = dyn_cast(Ty)) {
-    unsigned NumElems = UTy->getNumElements();
-    // Check for a union with all members having the same size.
-    Constant *MemberSize =
-      getFoldedSizeOf(UTy->getElementType(0), DestTy, true);
-    bool AllSame = true;
-    for (unsigned i = 1; i != NumElems; ++i)
-      if (MemberSize !=
-          getFoldedSizeOf(UTy->getElementType(i), DestTy, true)) {
-        AllSame = false;
-        break;
-      }
-    if (AllSame)
-      return MemberSize;
-  }
-
   // Pointer size doesn't depend on the pointee type, so canonicalize them
   // to an arbitrary pointee.
   if (const PointerType *PTy = dyn_cast(Ty))
@@ -438,24 +422,6 @@
       return MemberAlign;
   }
 
-  if (const UnionType *UTy = dyn_cast(Ty)) {
-    // Union alignment is the maximum alignment of any member.
-    // Without target data, we can't compare much, but we can check to see
-    // if all the members have the same alignment.
-    unsigned NumElems = UTy->getNumElements();
-    // Check for a union with all members having the same alignment.
-    Constant *MemberAlign =
-      getFoldedAlignOf(UTy->getElementType(0), DestTy, true);
-    bool AllSame = true;
-    for (unsigned i = 1; i != NumElems; ++i)
-      if (MemberAlign != getFoldedAlignOf(UTy->getElementType(i), DestTy, true)) {
-        AllSame = false;
-        break;
-      }
-    if (AllSame)
-      return MemberAlign;
-  }
-
   // Pointer alignment doesn't depend on the pointee type, so canonicalize them
   // to an arbitrary pointee.
   if (const PointerType *PTy = dyn_cast(Ty))
@@ -909,8 +875,6 @@
     unsigned numOps;
     if (const ArrayType *AR = dyn_cast(AggTy))
       numOps = AR->getNumElements();
-    else if (AggTy->isUnionTy())
-      numOps = 1;
     else
       numOps = cast(AggTy)->getNumElements();
     
@@ -927,10 +891,6 @@
     
     if (const StructType* ST = dyn_cast(AggTy))
       return ConstantStruct::get(ST->getContext(), Ops, ST->isPacked());
-    if (const UnionType* UT = dyn_cast(AggTy)) {
-      assert(Ops.size() == 1 && "Union can only contain a single value!");
-      return ConstantUnion::get(UT, Ops[0]);
-    }
     return ConstantArray::get(cast(AggTy), Ops);
   }
   

Modified: llvm/trunk/lib/VMCore/Constants.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Constants.cpp?rev=112356&r1=112355&r2=112356&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/Constants.cpp (original)
+++ llvm/trunk/lib/VMCore/Constants.cpp Fri Aug 27 23:09:24 2010
@@ -59,7 +59,6 @@
   case Type::PointerTyID:
     return ConstantPointerNull::get(cast(Ty));
   case Type::StructTyID:
-  case Type::UnionTyID:
   case Type::ArrayTyID:
   case Type::VectorTyID:
     return ConstantAggregateZero::get(Ty);
@@ -587,27 +586,6 @@
   return get(Context, std::vector(Vals, Vals+NumVals), Packed);
 }
 
-ConstantUnion::ConstantUnion(const UnionType *T, Constant* V)
-  : Constant(T, ConstantUnionVal,
-             OperandTraits::op_end(this) - 1, 1) {
-  Use *OL = OperandList;
-  assert(T->getElementTypeIndex(V->getType()) >= 0 &&
-      "Initializer for union element isn't a member of union type!");
-  *OL = V;
-}
-
-// ConstantUnion accessors.
-Constant* ConstantUnion::get(const UnionType* T, Constant* V) {
-  LLVMContextImpl* pImpl = T->getContext().pImpl;
-  
-  // Create a ConstantAggregateZero value if all elements are zeros...
-  if (!V->isNullValue())
-    return pImpl->UnionConstants.getOrCreate(T, V);
-
-  return ConstantAggregateZero::get(T);
-}
-
-
 ConstantVector::ConstantVector(const VectorType *T,
                                const std::vector &V)
   : Constant(T, ConstantVectorVal,
@@ -946,8 +924,7 @@
 //                      Factory Function Implementation
 
 ConstantAggregateZero* ConstantAggregateZero::get(const Type* Ty) {
-  assert((Ty->isStructTy() || Ty->isUnionTy()
-         || Ty->isArrayTy() || Ty->isVectorTy()) &&
+  assert((Ty->isStructTy() || Ty->isArrayTy() || Ty->isVectorTy()) &&
          "Cannot create an aggregate zero of non-aggregate type!");
   
   LLVMContextImpl *pImpl = Ty->getContext().pImpl;
@@ -1034,13 +1011,6 @@
 
 // destroyConstant - Remove the constant from the constant table...
 //
-void ConstantUnion::destroyConstant() {
-  getRawType()->getContext().pImpl->UnionConstants.remove(this);
-  destroyConstantImpl();
-}
-
-// destroyConstant - Remove the constant from the constant table...
-//
 void ConstantVector::destroyConstant() {
   getRawType()->getContext().pImpl->VectorConstants.remove(this);
   destroyConstantImpl();
@@ -2117,55 +2087,6 @@
   destroyConstant();
 }
 
-void ConstantUnion::replaceUsesOfWithOnConstant(Value *From, Value *To,
-                                                 Use *U) {
-  assert(isa(To) && "Cannot make Constant refer to non-constant!");
-  Constant *ToC = cast(To);
-
-  assert(U == OperandList && "Union constants can only have one use!");
-  assert(getNumOperands() == 1 && "Union constants can only have one use!");
-  assert(getOperand(0) == From && "ReplaceAllUsesWith broken!");
-
-  std::pair Lookup;
-  Lookup.first.first = cast(getRawType());
-  Lookup.second = this;
-  Lookup.first.second = ToC;
-
-  LLVMContextImpl *pImpl = getRawType()->getContext().pImpl;
-
-  Constant *Replacement = 0;
-  if (ToC->isNullValue()) {
-    Replacement = ConstantAggregateZero::get(getRawType());
-  } else {
-    // Check to see if we have this union type already.
-    bool Exists;
-    LLVMContextImpl::UnionConstantsTy::MapTy::iterator I =
-      pImpl->UnionConstants.InsertOrGetItem(Lookup, Exists);
-    
-    if (Exists) {
-      Replacement = I->second;
-    } else {
-      // Okay, the new shape doesn't exist in the system yet.  Instead of
-      // creating a new constant union, inserting it, replaceallusesof'ing the
-      // old with the new, then deleting the old... just update the current one
-      // in place!
-      pImpl->UnionConstants.MoveConstantToNewSlot(this, I);
-      
-      // Update to the new value.
-      setOperand(0, ToC);
-      return;
-    }
-  }
-  
-  assert(Replacement != this && "I didn't contain From!");
-  
-  // Everyone using this now uses the replacement.
-  uncheckedReplaceAllUsesWith(Replacement);
-  
-  // Delete the old constant!
-  destroyConstant();
-}
-
 void ConstantVector::replaceUsesOfWithOnConstant(Value *From, Value *To,
                                                  Use *U) {
   assert(isa(To) && "Cannot make Constant refer to non-constant!");

Modified: llvm/trunk/lib/VMCore/ConstantsContext.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/ConstantsContext.h?rev=112356&r1=112355&r2=112356&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/ConstantsContext.h (original)
+++ llvm/trunk/lib/VMCore/ConstantsContext.h Fri Aug 27 23:09:24 2010
@@ -511,14 +511,6 @@
   }
 };
 
-template<>
-struct ConstantKeyData {
-  typedef Constant* ValType;
-  static ValType getValType(ConstantUnion *CU) {
-    return cast(CU->getOperand(0));
-  }
-};
-
 // ConstantPointerNull does not take extra "value" argument...
 template
 struct ConstantCreator {

Modified: llvm/trunk/lib/VMCore/Core.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Core.cpp?rev=112356&r1=112355&r2=112356&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/Core.cpp (original)
+++ llvm/trunk/lib/VMCore/Core.cpp Fri Aug 27 23:09:24 2010
@@ -156,8 +156,6 @@
     return LLVMFunctionTypeKind;
   case Type::StructTyID:
     return LLVMStructTypeKind;
-  case Type::UnionTyID:
-    return LLVMUnionTypeKind;
   case Type::ArrayTyID:
     return LLVMArrayTypeKind;
   case Type::PointerTyID:
@@ -316,34 +314,6 @@
   return unwrap(StructTy)->isPacked();
 }
 
-/*--.. Operations on union types ..........................................--*/
-
-LLVMTypeRef LLVMUnionTypeInContext(LLVMContextRef C, LLVMTypeRef *ElementTypes,
-                                   unsigned ElementCount) {
-  SmallVector Tys;
-  for (LLVMTypeRef *I = ElementTypes,
-                   *E = ElementTypes + ElementCount; I != E; ++I)
-    Tys.push_back(unwrap(*I));
-  
-  return wrap(UnionType::get(&Tys[0], Tys.size()));
-}
-
-LLVMTypeRef LLVMUnionType(LLVMTypeRef *ElementTypes, unsigned ElementCount) {
-  return LLVMUnionTypeInContext(LLVMGetGlobalContext(), ElementTypes,
-                                ElementCount);
-}
-
-unsigned LLVMCountUnionElementTypes(LLVMTypeRef UnionTy) {
-  return unwrap(UnionTy)->getNumElements();
-}
-
-void LLVMGetUnionElementTypes(LLVMTypeRef UnionTy, LLVMTypeRef *Dest) {
-  UnionType *Ty = unwrap(UnionTy);
-  for (FunctionType::param_iterator I = Ty->element_begin(),
-                                    E = Ty->element_end(); I != E; ++I)
-    *Dest++ = wrap(*I);
-}
-
 /*--.. Operations on array, pointer, and vector types (sequence types) .....--*/
 
 LLVMTypeRef LLVMArrayType(LLVMTypeRef ElementType, unsigned ElementCount) {
@@ -628,10 +598,6 @@
   return wrap(ConstantVector::get(
                             unwrap(ScalarConstantVals, Size), Size));
 }
-LLVMValueRef LLVMConstUnion(LLVMTypeRef Ty, LLVMValueRef Val) {
-  return wrap(ConstantUnion::get(unwrap(Ty), unwrap(Val)));
-}
-
 /*--.. Constant expressions ................................................--*/
 
 LLVMOpcode LLVMGetConstOpcode(LLVMValueRef ConstantVal) {

Modified: llvm/trunk/lib/VMCore/LLVMContextImpl.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/LLVMContextImpl.cpp?rev=112356&r1=112355&r2=112356&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/LLVMContextImpl.cpp (original)
+++ llvm/trunk/lib/VMCore/LLVMContextImpl.cpp Fri Aug 27 23:09:24 2010
@@ -57,14 +57,11 @@
                 DropReferences());
   std::for_each(StructConstants.map_begin(), StructConstants.map_end(),
                 DropReferences());
-  std::for_each(UnionConstants.map_begin(), UnionConstants.map_end(),
-                DropReferences());
   std::for_each(VectorConstants.map_begin(), VectorConstants.map_end(),
                 DropReferences());
   ExprConstants.freeConstants();
   ArrayConstants.freeConstants();
   StructConstants.freeConstants();
-  UnionConstants.freeConstants();
   VectorConstants.freeConstants();
   AggZeroConstants.freeConstants();
   NullPtrConstants.freeConstants();

Modified: llvm/trunk/lib/VMCore/LLVMContextImpl.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/LLVMContextImpl.h?rev=112356&r1=112355&r2=112356&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/LLVMContextImpl.h (original)
+++ llvm/trunk/lib/VMCore/LLVMContextImpl.h Fri Aug 27 23:09:24 2010
@@ -144,10 +144,6 @@
     ConstantStruct, true /*largekey*/> StructConstantsTy;
   StructConstantsTy StructConstants;
   
-  typedef ConstantUniqueMap
-      UnionConstantsTy;
-  UnionConstantsTy UnionConstants;
-  
   typedef ConstantUniqueMap, VectorType,
                             ConstantVector> VectorConstantsTy;
   VectorConstantsTy VectorConstants;
@@ -192,7 +188,6 @@
   TypeMap PointerTypes;
   TypeMap FunctionTypes;
   TypeMap StructTypes;
-  TypeMap UnionTypes;
   TypeMap IntegerTypes;
 
   // Opaque types are not structurally uniqued, so don't use TypeMap.

Modified: llvm/trunk/lib/VMCore/Type.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Type.cpp?rev=112356&r1=112355&r2=112356&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/Type.cpp (original)
+++ llvm/trunk/lib/VMCore/Type.cpp Fri Aug 27 23:09:24 2010
@@ -50,7 +50,7 @@
 
 /// Because of the way Type subclasses are allocated, this function is necessary
 /// to use the correct kind of "delete" operator to deallocate the Type object.
-/// Some type objects (FunctionTy, StructTy, UnionTy) allocate additional space
+/// Some type objects (FunctionTy, StructTy) allocate additional space
 /// after the space for their derived type to hold the contained types array of
 /// PATypeHandles. Using this allocation scheme means all the PATypeHandles are
 /// allocated with the type object, decreasing allocations and eliminating the
@@ -66,8 +66,7 @@
   // Structures and Functions allocate their contained types past the end of
   // the type object itself. These need to be destroyed differently than the
   // other types.
-  if (this->isFunctionTy() || this->isStructTy() ||
-      this->isUnionTy()) {
+  if (this->isFunctionTy() || this->isStructTy()) {
     // First, make sure we destruct any PATypeHandles allocated by these
     // subclasses.  They must be manually destructed. 
     for (unsigned i = 0; i < NumContainedTys; ++i)
@@ -77,10 +76,10 @@
     // to delete this as an array of char.
     if (this->isFunctionTy())
       static_cast(this)->FunctionType::~FunctionType();
-    else if (this->isStructTy())
+    else {
+      assert(isStructTy());
       static_cast(this)->StructType::~StructType();
-    else
-      static_cast(this)->UnionType::~UnionType();
+    }
 
     // Finally, remove the memory as an array deallocation of the chars it was
     // constructed from.
@@ -234,7 +233,7 @@
   if (const VectorType *PTy = dyn_cast(this))
     return PTy->getElementType()->isSized();
 
-  if (!this->isStructTy() && !this->isUnionTy()) 
+  if (!this->isStructTy()) 
     return false;
 
   // Okay, our struct is sized if all of the elements are...
@@ -319,31 +318,6 @@
 }
 
 
-bool UnionType::indexValid(const Value *V) const {
-  // Union indexes require 32-bit integer constants.
-  if (V->getType()->isIntegerTy(32))
-    if (const ConstantInt *CU = dyn_cast(V))
-      return indexValid(CU->getZExtValue());
-  return false;
-}
-
-bool UnionType::indexValid(unsigned V) const {
-  return V < NumContainedTys;
-}
-
-// getTypeAtIndex - Given an index value into the type, return the type of the
-// element.  For a structure type, this must be a constant value...
-//
-const Type *UnionType::getTypeAtIndex(const Value *V) const {
-  unsigned Idx = (unsigned)cast(V)->getZExtValue();
-  return getTypeAtIndex(Idx);
-}
-
-const Type *UnionType::getTypeAtIndex(unsigned Idx) const {
-  assert(indexValid(Idx) && "Invalid structure index!");
-  return ContainedTys[Idx];
-}
-
 //===----------------------------------------------------------------------===//
 //                          Primitive 'Type' data
 //===----------------------------------------------------------------------===//
@@ -507,23 +481,6 @@
   setAbstract(isAbstract);
 }
 
-UnionType::UnionType(LLVMContext &C,const Type* const* Types, unsigned NumTypes)
-  : CompositeType(C, UnionTyID) {
-  ContainedTys = reinterpret_cast(this + 1);
-  NumContainedTys = NumTypes;
-  bool isAbstract = false;
-  for (unsigned i = 0; i < NumTypes; ++i) {
-    assert(Types[i] && " type for union field!");
-    assert(isValidElementType(Types[i]) &&
-           "Invalid type for union element!");
-    new (&ContainedTys[i]) PATypeHandle(Types[i], this);
-    isAbstract |= Types[i]->isAbstract();
-  }
-
-  // Calculate whether or not this type is abstract
-  setAbstract(isAbstract);
-}
-
 ArrayType::ArrayType(const Type *ElType, uint64_t NumEl)
   : SequentialType(ArrayTyID, ElType) {
   NumElements = NumEl;
@@ -711,15 +668,6 @@
     return true;
   }
   
-  if (const UnionType *UTy = dyn_cast(Ty)) {
-    const UnionType *UTy2 = cast(Ty2);
-    if (UTy->getNumElements() != UTy2->getNumElements()) return false;
-    for (unsigned i = 0, e = UTy2->getNumElements(); i != e; ++i)
-      if (!TypesEqual(UTy->getElementType(i), UTy2->getElementType(i), EqTypes))
-        return false;
-    return true;
-  }
-  
   if (const ArrayType *ATy = dyn_cast(Ty)) {
     const ArrayType *ATy2 = cast(Ty2);
     return ATy->getNumElements() == ATy2->getNumElements() &&
@@ -987,60 +935,6 @@
 
 
 //===----------------------------------------------------------------------===//
-// Union Type Factory...
-//
-
-UnionType *UnionType::get(const Type* const* Types, unsigned NumTypes) {
-  assert(NumTypes > 0 && "union must have at least one member type!");
-  UnionValType UTV(Types, NumTypes);
-  UnionType *UT = 0;
-  
-  LLVMContextImpl *pImpl = Types[0]->getContext().pImpl;
-  
-  UT = pImpl->UnionTypes.get(UTV);
-    
-  if (!UT) {
-    // Value not found.  Derive a new type!
-    UT = (UnionType*) operator new(sizeof(UnionType) +
-                                   sizeof(PATypeHandle) * NumTypes);
-    new (UT) UnionType(Types[0]->getContext(), Types, NumTypes);
-    pImpl->UnionTypes.add(UTV, UT);
-  }
-#ifdef DEBUG_MERGE_TYPES
-  DEBUG(dbgs() << "Derived new type: " << *UT << "\n");
-#endif
-  return UT;
-}
-
-UnionType *UnionType::get(const Type *type, ...) {
-  va_list ap;
-  SmallVector UnionFields;
-  va_start(ap, type);
-  while (type) {
-    UnionFields.push_back(type);
-    type = va_arg(ap, llvm::Type*);
-  }
-  unsigned NumTypes = UnionFields.size();
-  assert(NumTypes > 0 && "union must have at least one member type!");
-  return llvm::UnionType::get(&UnionFields[0], NumTypes);
-}
-
-bool UnionType::isValidElementType(const Type *ElemTy) {
-  return !ElemTy->isVoidTy() && !ElemTy->isLabelTy() &&
-         !ElemTy->isMetadataTy() && !ElemTy->isFunctionTy();
-}
-
-int UnionType::getElementTypeIndex(const Type *ElemTy) const {
-  int index = 0;
-  for (UnionType::element_iterator I = element_begin(), E = element_end();
-       I != E; ++I, ++index) {
-     if (ElemTy == *I) return index;
-  }
-  
-  return -1;
-}
-
-//===----------------------------------------------------------------------===//
 // Pointer Type Factory...
 //
 
@@ -1291,21 +1185,6 @@
 // concrete - this could potentially change us from an abstract type to a
 // concrete type.
 //
-void UnionType::refineAbstractType(const DerivedType *OldType,
-                                    const Type *NewType) {
-  LLVMContextImpl *pImpl = OldType->getContext().pImpl;
-  pImpl->UnionTypes.RefineAbstractType(this, OldType, NewType);
-}
-
-void UnionType::typeBecameConcrete(const DerivedType *AbsTy) {
-  LLVMContextImpl *pImpl = AbsTy->getContext().pImpl;
-  pImpl->UnionTypes.TypeBecameConcrete(this, AbsTy);
-}
-
-// refineAbstractType - Called when a contained type is found to be more
-// concrete - this could potentially change us from an abstract type to a
-// concrete type.
-//
 void PointerType::refineAbstractType(const DerivedType *OldType,
                                      const Type *NewType) {
   LLVMContextImpl *pImpl = OldType->getContext().pImpl;

Modified: llvm/trunk/lib/VMCore/TypesContext.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/TypesContext.h?rev=112356&r1=112355&r2=112356&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/TypesContext.h (original)
+++ llvm/trunk/lib/VMCore/TypesContext.h Fri Aug 27 23:09:24 2010
@@ -180,32 +180,6 @@
   }
 };
 
-// UnionValType - Define a class to hold the key that goes into the TypeMap
-//
-class UnionValType {
-  std::vector ElTypes;
-public:
-  UnionValType(const Type* const* Types, unsigned NumTypes)
-    : ElTypes(&Types[0], &Types[NumTypes]) {}
-
-  static UnionValType get(const UnionType *UT) {
-    std::vector ElTypes;
-    ElTypes.reserve(UT->getNumElements());
-    for (unsigned i = 0, e = UT->getNumElements(); i != e; ++i)
-      ElTypes.push_back(UT->getElementType(i));
-
-    return UnionValType(&ElTypes[0], ElTypes.size());
-  }
-
-  static unsigned hashTypeStructure(const UnionType *UT) {
-    return UT->getNumElements();
-  }
-
-  inline bool operator<(const UnionValType &UTV) const {
-    return (ElTypes < UTV.ElTypes);
-  }
-};
-
 // FunctionValType - Define a class to hold the key that goes into the TypeMap
 //
 class FunctionValType {

Modified: llvm/trunk/lib/VMCore/Verifier.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Verifier.cpp?rev=112356&r1=112355&r2=112356&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/Verifier.cpp (original)
+++ llvm/trunk/lib/VMCore/Verifier.cpp Fri Aug 27 23:09:24 2010
@@ -1560,7 +1560,8 @@
               "Function type with invalid parameter type", ElTy, FTy);
       VerifyType(ElTy);
     }
-  } break;
+    break;
+  }
   case Type::StructTyID: {
     const StructType *STy = cast(Ty);
     for (unsigned i = 0, e = STy->getNumElements(); i != e; ++i) {
@@ -1569,34 +1570,29 @@
               "Structure type with invalid element type", ElTy, STy);
       VerifyType(ElTy);
     }
-  } break;
-  case Type::UnionTyID: {
-    const UnionType *UTy = cast(Ty);
-    for (unsigned i = 0, e = UTy->getNumElements(); i != e; ++i) {
-      const Type *ElTy = UTy->getElementType(i);
-      Assert2(UnionType::isValidElementType(ElTy),
-              "Union type with invalid element type", ElTy, UTy);
-      VerifyType(ElTy);
-    }
-  } break;
+    break;
+  }
   case Type::ArrayTyID: {
     const ArrayType *ATy = cast(Ty);
     Assert1(ArrayType::isValidElementType(ATy->getElementType()),
             "Array type with invalid element type", ATy);
     VerifyType(ATy->getElementType());
-  } break;
+    break;
+  }
   case Type::PointerTyID: {
     const PointerType *PTy = cast(Ty);
     Assert1(PointerType::isValidElementType(PTy->getElementType()),
             "Pointer type with invalid element type", PTy);
     VerifyType(PTy->getElementType());
-  } break;
+    break;
+  }
   case Type::VectorTyID: {
     const VectorType *VTy = cast(Ty);
     Assert1(VectorType::isValidElementType(VTy->getElementType()),
             "Vector type with invalid element type", VTy);
     VerifyType(VTy->getElementType());
-  } break;
+    break;
+  }
   default:
     break;
   }

Removed: llvm/trunk/test/Assembler/2010-01-06-UnionType.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Assembler/2010-01-06-UnionType.ll?rev=112355&view=auto
==============================================================================
--- llvm/trunk/test/Assembler/2010-01-06-UnionType.ll (original)
+++ llvm/trunk/test/Assembler/2010-01-06-UnionType.ll (removed)
@@ -1,3 +0,0 @@
-; RUN: llvm-as %s -o /dev/null
-
-%X = type union { i32, i32* }

Removed: llvm/trunk/test/Feature/unions.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Feature/unions.ll?rev=112355&view=auto
==============================================================================
--- llvm/trunk/test/Feature/unions.ll (original)
+++ llvm/trunk/test/Feature/unions.ll (removed)
@@ -1,14 +0,0 @@
-; RUN: llvm-as < %s | llvm-dis > %t1.ll
-; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
-; RUN: diff %t1.ll %t2.ll
-
-%union.anon = type union { i8, i32, float }
-
- at union1 = constant union { i32, i8 } { i32 4 }
- at union2 = constant union { i32, i8 } insertvalue(union { i32, i8 } undef, i32 4, 0)
- at union3 = common global %union.anon zeroinitializer, align 8 
-
-define void @"Unions" () {
-  ret void
-}
-

Modified: llvm/trunk/test/Other/constant-fold-gep.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Other/constant-fold-gep.ll?rev=112356&r1=112355&r2=112356&view=diff
==============================================================================
--- llvm/trunk/test/Other/constant-fold-gep.ll (original)
+++ llvm/trunk/test/Other/constant-fold-gep.ll Fri Aug 27 23:09:24 2010
@@ -71,8 +71,6 @@
 ; PLAIN: @g = constant i64 ptrtoint (double* getelementptr (%0* null, i64 0, i32 1) to i64)
 ; PLAIN: @h = constant i64 ptrtoint (i1** getelementptr (i1** null, i32 1) to i64)
 ; PLAIN: @i = constant i64 ptrtoint (i1** getelementptr (%2* null, i64 0, i32 1) to i64)
-; PLAIN: @j = constant i64 ptrtoint (double* getelementptr (%0* null, i64 0, i32 1) to i64)
-; PLAIN: @k = constant i64 ptrtoint (double* getelementptr (double* null, i32 1) to i64)
 ; OPT: @a = constant i64 mul (i64 ptrtoint (double* getelementptr (double* null, i32 1) to i64), i64 2310)
 ; OPT: @b = constant i64 ptrtoint (double* getelementptr (%0* null, i64 0, i32 1) to i64)
 ; OPT: @c = constant i64 mul (i64 ptrtoint (double* getelementptr (double* null, i32 1) to i64), i64 2)
@@ -82,8 +80,6 @@
 ; OPT: @g = constant i64 ptrtoint (double* getelementptr (%0* null, i64 0, i32 1) to i64)
 ; OPT: @h = constant i64 ptrtoint (i1** getelementptr (i1** null, i32 1) to i64)
 ; OPT: @i = constant i64 ptrtoint (i1** getelementptr (%2* null, i64 0, i32 1) to i64)
-; OPT: @j = constant i64 ptrtoint (double* getelementptr (%0* null, i64 0, i32 1) to i64)
-; OPT: @k = constant i64 ptrtoint (double* getelementptr (double* null, i32 1) to i64)
 ; TO: @a = constant i64 18480
 ; TO: @b = constant i64 8
 ; TO: @c = constant i64 16
@@ -93,8 +89,6 @@
 ; TO: @g = constant i64 8
 ; TO: @h = constant i64 8
 ; TO: @i = constant i64 8
-; TO: @j = constant i64 8
-; TO: @k = constant i64 8
 
 @a = constant i64 mul (i64 3, i64 mul (i64 ptrtoint ({[7 x double], [7 x double]}* getelementptr ({[7 x double], [7 x double]}* null, i64 11) to i64), i64 5))
 @b = constant i64 ptrtoint ([13 x double]* getelementptr ({i1, [13 x double]}* null, i64 0, i32 1) to i64)
@@ -105,8 +99,6 @@
 @g = constant i64 ptrtoint ({double, double}* getelementptr ({i1, {double, double}}* null, i64 0, i32 1) to i64)
 @h = constant i64 ptrtoint (double** getelementptr (double** null, i64 1) to i64)
 @i = constant i64 ptrtoint (double** getelementptr ({i1, double*}* null, i64 0, i32 1) to i64)
- at j = constant i64 ptrtoint (union {double, double}* getelementptr ({i1, union {double, double}}* null, i64 0, i32 1) to i64)
- at k = constant i64 ptrtoint (union {double, double}* getelementptr (union {double, double}* null, i64 1) to i64)
 
 ; The target-dependent folder should cast GEP indices to integer-sized pointers.
 
@@ -275,14 +267,6 @@
 ; PLAIN:   %t = bitcast i64 ptrtoint (i1** getelementptr (%2* null, i64 0, i32 1) to i64) to i64
 ; PLAIN:   ret i64 %t
 ; PLAIN: }
-; PLAIN: define i64 @fj() nounwind {
-; PLAIN:   %t = bitcast i64 ptrtoint (double* getelementptr (%0* null, i64 0, i32 1) to i64) to i64
-; PLAIN:   ret i64 %t
-; PLAIN: }
-; PLAIN: define i64 @fk() nounwind {
-; PLAIN:   %t = bitcast i64 ptrtoint (double* getelementptr (double* null, i32 1) to i64) to i64
-; PLAIN:   ret i64 %t
-; PLAIN: }
 ; OPT: define i64 @fa() nounwind {
 ; OPT:   ret i64 mul (i64 ptrtoint (double* getelementptr (double* null, i32 1) to i64), i64 2310)
 ; OPT: }
@@ -310,12 +294,6 @@
 ; OPT: define i64 @fi() nounwind {
 ; OPT:   ret i64 ptrtoint (i1** getelementptr (%2* null, i64 0, i32 1) to i64)
 ; OPT: }
-; OPT: define i64 @fj() nounwind {
-; OPT:   ret i64 ptrtoint (double* getelementptr (%0* null, i64 0, i32 1) to i64)
-; OPT: }
-; OPT: define i64 @fk() nounwind {
-; OPT:   ret i64 ptrtoint (double* getelementptr (double* null, i32 1) to i64)
-; OPT: }
 ; TO: define i64 @fa() nounwind {
 ; TO:   ret i64 18480
 ; TO: }
@@ -343,12 +321,6 @@
 ; TO: define i64 @fi() nounwind {
 ; TO:   ret i64 8
 ; TO: }
-; TO: define i64 @fj() nounwind {
-; TO:   ret i64 8
-; TO: }
-; TO: define i64 @fk() nounwind {
-; TO:   ret i64 8
-; TO: }
 ; SCEV: Classifying expressions for: @fa
 ; SCEV:   %t = bitcast i64 mul (i64 ptrtoint (double* getelementptr (double* null, i32 1) to i64), i64 2310) to i64 
 ; SCEV:   -->  (2310 * sizeof(double))
@@ -376,12 +348,6 @@
 ; SCEV: Classifying expressions for: @fi
 ; SCEV:   %t = bitcast i64 ptrtoint (i1** getelementptr (%2* null, i64 0, i32 1) to i64) to i64
 ; SCEV:   -->  alignof(i1*)
-; SCEV: Classifying expressions for: @fj
-; SCEV:   %t = bitcast i64 ptrtoint (double* getelementptr (%0* null, i64 0, i32 1) to i64) to i64
-; SCEV:   -->  alignof(double)
-; SCEV: Classifying expressions for: @fk
-; SCEV:   %t = bitcast i64 ptrtoint (double* getelementptr (double* null, i32 1) to i64) to i64
-; SCEV:   -->  sizeof(double)
 
 define i64 @fa() nounwind {
   %t = bitcast i64 mul (i64 3, i64 mul (i64 ptrtoint ({[7 x double], [7 x double]}* getelementptr ({[7 x double], [7 x double]}* null, i64 11) to i64), i64 5)) to i64
@@ -419,14 +385,6 @@
   %t = bitcast i64 ptrtoint (double** getelementptr ({i1, double*}* null, i64 0, i32 1) to i64) to i64
   ret i64 %t
 }
-define i64 @fj() nounwind {
-  %t = bitcast i64 ptrtoint (union {double, double}* getelementptr ({i1, union {double, double}}* null, i64 0, i32 1) to i64) to i64
-  ret i64 %t
-}
-define i64 @fk() nounwind {
-  %t = bitcast i64 ptrtoint (union {double, double}* getelementptr (union {double, double}* null, i64 1) to i64) to i64
-  ret i64 %t
-}
 
 ; PLAIN: define i64* @fM() nounwind {
 ; PLAIN:   %t = bitcast i64* getelementptr (i64* null, i32 1) to i64*




From bob.wilson at apple.com  Sat Aug 28 00:12:57 2010
From: bob.wilson at apple.com (Bob Wilson)
Date: Sat, 28 Aug 2010 05:12:57 -0000
Subject: [llvm-commits] [llvm] r112357 - in /llvm/trunk/lib/Target/ARM:
 ARMExpandPseudoInsts.cpp ARMISelDAGToDAG.cpp ARMInstrNEON.td
 NEONPreAllocPass.cpp
Message-ID: <20100828051258.0B5BA2A6C12C@llvm.org>

Author: bwilson
Date: Sat Aug 28 00:12:57 2010
New Revision: 112357

URL: http://llvm.org/viewvc/llvm-project?rev=112357&view=rev
Log:
Use pseudo instructions for VST1 and VST2.

Modified:
    llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp
    llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
    llvm/trunk/lib/Target/ARM/ARMInstrNEON.td
    llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp?rev=112357&r1=112356&r2=112357&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp Sat Aug 28 00:12:57 2010
@@ -119,8 +119,9 @@
   } 
 
   MIB.addReg(D0, getKillRegState(SrcIsKill))
-    .addReg(D1, getKillRegState(SrcIsKill))
-    .addReg(D2, getKillRegState(SrcIsKill));
+    .addReg(D1, getKillRegState(SrcIsKill));
+  if (NumRegs > 2)
+    MIB.addReg(D2, getKillRegState(SrcIsKill));
   if (NumRegs > 3)
     MIB.addReg(D3, getKillRegState(SrcIsKill));
   MIB = AddDefaultPred(MIB);
@@ -224,6 +225,48 @@
       MI.eraseFromParent();
     }
 
+    case ARM::VST1q8Pseudo:
+      ExpandVST(MBBI, ARM::VST1q8, false, SingleSpc, 2); break;
+    case ARM::VST1q16Pseudo:
+      ExpandVST(MBBI, ARM::VST1q16, false, SingleSpc, 2); break;
+    case ARM::VST1q32Pseudo:
+      ExpandVST(MBBI, ARM::VST1q32, false, SingleSpc, 2); break;
+    case ARM::VST1q64Pseudo:
+      ExpandVST(MBBI, ARM::VST1q64, false, SingleSpc, 2); break;
+    case ARM::VST1q8Pseudo_UPD:
+      ExpandVST(MBBI, ARM::VST1q8_UPD, true, SingleSpc, 2); break;
+    case ARM::VST1q16Pseudo_UPD:
+      ExpandVST(MBBI, ARM::VST1q16_UPD, true, SingleSpc, 2); break;
+    case ARM::VST1q32Pseudo_UPD:
+      ExpandVST(MBBI, ARM::VST1q32_UPD, true, SingleSpc, 2); break;
+    case ARM::VST1q64Pseudo_UPD:
+      ExpandVST(MBBI, ARM::VST1q64_UPD, true, SingleSpc, 2); break;
+
+    case ARM::VST2d8Pseudo:
+      ExpandVST(MBBI, ARM::VST2d8, false, SingleSpc, 2); break;
+    case ARM::VST2d16Pseudo:
+      ExpandVST(MBBI, ARM::VST2d16, false, SingleSpc, 2); break;
+    case ARM::VST2d32Pseudo:
+      ExpandVST(MBBI, ARM::VST2d32, false, SingleSpc, 2); break;
+    case ARM::VST2q8Pseudo:
+      ExpandVST(MBBI, ARM::VST2q8, false, SingleSpc, 4); break;
+    case ARM::VST2q16Pseudo:
+      ExpandVST(MBBI, ARM::VST2q16, false, SingleSpc, 4); break;
+    case ARM::VST2q32Pseudo:
+      ExpandVST(MBBI, ARM::VST2q32, false, SingleSpc, 4); break;
+    case ARM::VST2d8Pseudo_UPD:
+      ExpandVST(MBBI, ARM::VST2d8_UPD, true, SingleSpc, 2); break;
+    case ARM::VST2d16Pseudo_UPD:
+      ExpandVST(MBBI, ARM::VST2d16_UPD, true, SingleSpc, 2); break;
+    case ARM::VST2d32Pseudo_UPD:
+      ExpandVST(MBBI, ARM::VST2d32_UPD, true, SingleSpc, 2); break;
+    case ARM::VST2q8Pseudo_UPD:
+      ExpandVST(MBBI, ARM::VST2q8_UPD, true, SingleSpc, 4); break;
+    case ARM::VST2q16Pseudo_UPD:
+      ExpandVST(MBBI, ARM::VST2q16_UPD, true, SingleSpc, 4); break;
+    case ARM::VST2q32Pseudo_UPD:
+      ExpandVST(MBBI, ARM::VST2q32_UPD, true, SingleSpc, 4); break;
+
     case ARM::VST3d8Pseudo:
       ExpandVST(MBBI, ARM::VST3d8, false, SingleSpc, 3); break;
     case ARM::VST3d16Pseudo:

Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp?rev=112357&r1=112356&r2=112357&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp Sat Aug 28 00:12:57 2010
@@ -1256,16 +1256,14 @@
   SDValue Pred = getAL(CurDAG);
   SDValue Reg0 = CurDAG->getRegister(0, MVT::i32);
 
-  SmallVector Ops;
+  SmallVector Ops;
   Ops.push_back(MemAddr);
   Ops.push_back(Align);
 
-  // FIXME: This is a temporary flag to distinguish VSTs that have been
-  // converted to pseudo instructions.
-  bool usePseudoInstrs = (NumVecs >= 3);
-
   if (is64BitVector) {
-    if (NumVecs >= 2) {
+    if (NumVecs == 1) {
+      Ops.push_back(N->getOperand(3));
+    } else {
       SDValue RegSeq;
       SDValue V0 = N->getOperand(0+3);
       SDValue V1 = N->getOperand(1+3);
@@ -1282,124 +1280,61 @@
           : N->getOperand(3+3);
         RegSeq = SDValue(QuadDRegs(MVT::v4i64, V0, V1, V2, V3), 0);
       }
-      if (usePseudoInstrs)
-        Ops.push_back(RegSeq);
-      else {
-
-      // Now extract the D registers back out.
-      Ops.push_back(CurDAG->getTargetExtractSubreg(ARM::dsub_0, dl, VT,
-                                                   RegSeq));
-      Ops.push_back(CurDAG->getTargetExtractSubreg(ARM::dsub_1, dl, VT,
-                                                   RegSeq));
-      if (NumVecs > 2)
-        Ops.push_back(CurDAG->getTargetExtractSubreg(ARM::dsub_2, dl, VT,
-                                                     RegSeq));
-      if (NumVecs > 3)
-        Ops.push_back(CurDAG->getTargetExtractSubreg(ARM::dsub_3, dl, VT,
-                                                     RegSeq));
-      }
-    } else {
-      Ops.push_back(N->getOperand(3));
+      Ops.push_back(RegSeq);
     }
     Ops.push_back(Pred);
     Ops.push_back(Reg0); // predicate register
     Ops.push_back(Chain);
     unsigned Opc = DOpcodes[OpcodeIndex];
-    return CurDAG->getMachineNode(Opc, dl, MVT::Other, Ops.data(),
-                                  usePseudoInstrs ? 6 : NumVecs+5);
+    return CurDAG->getMachineNode(Opc, dl, MVT::Other, Ops.data(), 6);
   }
 
-  EVT RegVT = GetNEONSubregVT(VT);
   if (NumVecs <= 2) {
-    // Quad registers are directly supported for VST1 and VST2,
-    // storing pairs of D regs.
+    // Quad registers are directly supported for VST1 and VST2.
     unsigned Opc = QOpcodes0[OpcodeIndex];
-    if (NumVecs == 2) {
-      // First extract the pair of Q registers.
+    if (NumVecs == 1) {
+      Ops.push_back(N->getOperand(3));
+    } else {
+      // Form a QQ register.
       SDValue Q0 = N->getOperand(3);
       SDValue Q1 = N->getOperand(4);
-
-      // Form a QQ register.
-      SDValue QQ = SDValue(PairQRegs(MVT::v4i64, Q0, Q1), 0);
-
-      // Now extract the D registers back out.
-      Ops.push_back(CurDAG->getTargetExtractSubreg(ARM::dsub_0, dl, RegVT,
-                                                   QQ));
-      Ops.push_back(CurDAG->getTargetExtractSubreg(ARM::dsub_1, dl, RegVT,
-                                                   QQ));
-      Ops.push_back(CurDAG->getTargetExtractSubreg(ARM::dsub_2, dl, RegVT,
-                                                   QQ));
-      Ops.push_back(CurDAG->getTargetExtractSubreg(ARM::dsub_3, dl, RegVT,
-                                                   QQ));
-      Ops.push_back(Pred);
-      Ops.push_back(Reg0); // predicate register
-      Ops.push_back(Chain);
-      return CurDAG->getMachineNode(Opc, dl, MVT::Other, Ops.data(), 5 + 4);
-    } else {
-      for (unsigned Vec = 0; Vec < NumVecs; ++Vec) {
-        Ops.push_back(CurDAG->getTargetExtractSubreg(ARM::dsub_0, dl, RegVT,
-                                                     N->getOperand(Vec+3)));
-        Ops.push_back(CurDAG->getTargetExtractSubreg(ARM::dsub_1, dl, RegVT,
-                                                     N->getOperand(Vec+3)));
-      }
-      Ops.push_back(Pred);
-      Ops.push_back(Reg0); // predicate register
-      Ops.push_back(Chain);
-      return CurDAG->getMachineNode(Opc, dl, MVT::Other, Ops.data(),
-                                    5 + 2 * NumVecs);
+      Ops.push_back(SDValue(PairQRegs(MVT::v4i64, Q0, Q1), 0));
     }
+    Ops.push_back(Pred);
+    Ops.push_back(Reg0); // predicate register
+    Ops.push_back(Chain);
+    return CurDAG->getMachineNode(Opc, dl, MVT::Other, Ops.data(), 6);
   }
 
   // Otherwise, quad registers are stored with two separate instructions,
   // where one stores the even registers and the other stores the odd registers.
 
   // Form the QQQQ REG_SEQUENCE.
-  SDValue V[8];
-  for (unsigned Vec = 0, i = 0; Vec < NumVecs; ++Vec, i+=2) {
-    V[i]   = CurDAG->getTargetExtractSubreg(ARM::dsub_0, dl, RegVT,
-                                            N->getOperand(Vec+3));
-    V[i+1] = CurDAG->getTargetExtractSubreg(ARM::dsub_1, dl, RegVT,
-                                            N->getOperand(Vec+3));
-  }
-  if (NumVecs == 3)
-    V[6] = V[7] = SDValue(CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF,
-                                                 dl, RegVT), 0);
-
-  SDValue RegSeq = SDValue(OctoDRegs(MVT::v8i64, V[0], V[1], V[2], V[3],
-                                     V[4], V[5], V[6], V[7]), 0);
+  SDValue V0 = N->getOperand(0+3);
+  SDValue V1 = N->getOperand(1+3);
+  SDValue V2 = N->getOperand(2+3);
+  SDValue V3 = (NumVecs == 3)
+    ? SDValue(CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, dl, VT), 0)
+    : N->getOperand(3+3);
+  SDValue RegSeq = SDValue(QuadQRegs(MVT::v8i64, V0, V1, V2, V3), 0);
 
   // Store the even D registers.
-  assert(ARM::dsub_7 == ARM::dsub_0+7 && "Unexpected subreg numbering");
   Ops.push_back(Reg0); // post-access address offset
-  if (usePseudoInstrs)
-    Ops.push_back(RegSeq);
-  else
-  for (unsigned Vec = 0; Vec < NumVecs; ++Vec)
-    Ops.push_back(CurDAG->getTargetExtractSubreg(ARM::dsub_0+Vec*2, dl,
-                                                 RegVT, RegSeq));
+  Ops.push_back(RegSeq);
   Ops.push_back(Pred);
   Ops.push_back(Reg0); // predicate register
   Ops.push_back(Chain);
   unsigned Opc = QOpcodes0[OpcodeIndex];
   SDNode *VStA = CurDAG->getMachineNode(Opc, dl, MemAddr.getValueType(),
-                                        MVT::Other, Ops.data(),
-                                        usePseudoInstrs ? 7 : NumVecs+6);
+                                        MVT::Other, Ops.data(), 7);
   Chain = SDValue(VStA, 1);
 
   // Store the odd D registers.
   Ops[0] = SDValue(VStA, 0); // MemAddr
-  if (usePseudoInstrs)
-    Ops[6] = Chain;
-  else {
-  for (unsigned Vec = 0; Vec < NumVecs; ++Vec)
-    Ops[Vec+3] = CurDAG->getTargetExtractSubreg(ARM::dsub_1+Vec*2, dl,
-                                                RegVT, RegSeq);
-  Ops[NumVecs+5] = Chain;
-  }
+  Ops[6] = Chain;
   Opc = QOpcodes1[OpcodeIndex];
   SDNode *VStB = CurDAG->getMachineNode(Opc, dl, MemAddr.getValueType(),
-                                        MVT::Other, Ops.data(),
-                                        usePseudoInstrs ? 7 : NumVecs+6);
+                                        MVT::Other, Ops.data(), 7);
   Chain = SDValue(VStB, 1);
   ReplaceUses(SDValue(N, 0), Chain);
   return NULL;
@@ -2267,15 +2202,16 @@
     case Intrinsic::arm_neon_vst1: {
       unsigned DOpcodes[] = { ARM::VST1d8, ARM::VST1d16,
                               ARM::VST1d32, ARM::VST1d64 };
-      unsigned QOpcodes[] = { ARM::VST1q8, ARM::VST1q16,
-                              ARM::VST1q32, ARM::VST1q64 };
+      unsigned QOpcodes[] = { ARM::VST1q8Pseudo, ARM::VST1q16Pseudo,
+                              ARM::VST1q32Pseudo, ARM::VST1q64Pseudo };
       return SelectVST(N, 1, DOpcodes, QOpcodes, 0);
     }
 
     case Intrinsic::arm_neon_vst2: {
-      unsigned DOpcodes[] = { ARM::VST2d8, ARM::VST2d16,
-                              ARM::VST2d32, ARM::VST1q64 };
-      unsigned QOpcodes[] = { ARM::VST2q8, ARM::VST2q16, ARM::VST2q32 };
+      unsigned DOpcodes[] = { ARM::VST2d8Pseudo, ARM::VST2d16Pseudo,
+                              ARM::VST2d32Pseudo, ARM::VST1q64Pseudo };
+      unsigned QOpcodes[] = { ARM::VST2q8Pseudo, ARM::VST2q16Pseudo,
+                              ARM::VST2q32Pseudo };
       return SelectVST(N, 2, DOpcodes, QOpcodes, 0);
     }
 

Modified: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrNEON.td?rev=112357&r1=112356&r2=112357&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrNEON.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Sat Aug 28 00:12:57 2010
@@ -490,6 +490,12 @@
 
 // Classes for VST* pseudo-instructions with multi-register operands.
 // These are expanded to real instructions after register allocation.
+class VSTQPseudo
+  : PseudoNLdSt<(outs), (ins addrmode6:$addr, QPR:$src), IIC_VST, "">;
+class VSTQWBPseudo
+  : PseudoNLdSt<(outs GPR:$wb),
+                (ins addrmode6:$addr, am6offset:$offset, QPR:$src), IIC_VST,
+                "$addr.addr = $wb">;
 class VSTQQPseudo
   : PseudoNLdSt<(outs), (ins addrmode6:$addr, QQPR:$src), IIC_VST, "">;
 class VSTQQWBPseudo
@@ -520,6 +526,11 @@
 def  VST1q32  : VST1Q<0b1000, "32">;
 def  VST1q64  : VST1Q<0b1100, "64">;
 
+def VST1q8Pseudo  : VSTQPseudo;
+def VST1q16Pseudo : VSTQPseudo;
+def VST1q32Pseudo : VSTQPseudo;
+def VST1q64Pseudo : VSTQPseudo;
+
 // ...with address register writeback:
 class VST1DWB op7_4, string Dt>
   : NLdSt<0, 0b00, 0b0111, op7_4, (outs GPR:$wb),
@@ -540,6 +551,11 @@
 def VST1q32_UPD : VST1QWB<0b1000, "32">;
 def VST1q64_UPD : VST1QWB<0b1100, "64">;
 
+def VST1q8Pseudo_UPD  : VSTQWBPseudo;
+def VST1q16Pseudo_UPD : VSTQWBPseudo;
+def VST1q32Pseudo_UPD : VSTQWBPseudo;
+def VST1q64Pseudo_UPD : VSTQWBPseudo;
+
 // ...with 3 registers (some of these are only for the disassembler):
 class VST1D3 op7_4, string Dt>
   : NLdSt<0, 0b00, 0b0110, op7_4, (outs),
@@ -610,6 +626,14 @@
 def  VST2q16  : VST2Q<0b0100, "16">;
 def  VST2q32  : VST2Q<0b1000, "32">;
 
+def  VST2d8Pseudo  : VSTQPseudo;
+def  VST2d16Pseudo : VSTQPseudo;
+def  VST2d32Pseudo : VSTQPseudo;
+
+def  VST2q8Pseudo  : VSTQQPseudo;
+def  VST2q16Pseudo : VSTQQPseudo;
+def  VST2q32Pseudo : VSTQQPseudo;
+
 // ...with address register writeback:
 class VST2DWB op11_8, bits<4> op7_4, string Dt>
   : NLdSt<0, 0b00, op11_8, op7_4, (outs GPR:$wb),
@@ -631,6 +655,14 @@
 def VST2q16_UPD : VST2QWB<0b0100, "16">;
 def VST2q32_UPD : VST2QWB<0b1000, "32">;
 
+def VST2d8Pseudo_UPD  : VSTQWBPseudo;
+def VST2d16Pseudo_UPD : VSTQWBPseudo;
+def VST2d32Pseudo_UPD : VSTQWBPseudo;
+
+def VST2q8Pseudo_UPD  : VSTQQWBPseudo;
+def VST2q16Pseudo_UPD : VSTQQWBPseudo;
+def VST2q32Pseudo_UPD : VSTQQWBPseudo;
+
 // ...with double-spaced registers (for disassembly only):
 def VST2b8      : VST2D<0b1001, 0b0000, "8">;
 def VST2b16     : VST2D<0b1001, 0b0100, "16">;

Modified: llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp?rev=112357&r1=112356&r2=112357&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp (original)
+++ llvm/trunk/lib/Target/ARM/NEONPreAllocPass.cpp Sat Aug 28 00:12:57 2010
@@ -178,13 +178,6 @@
     Stride = 2;
     return true;
 
-  case ARM::VST1q8:
-  case ARM::VST1q16:
-  case ARM::VST1q32:
-  case ARM::VST1q64:
-  case ARM::VST2d8:
-  case ARM::VST2d16:
-  case ARM::VST2d32:
   case ARM::VST2LNd8:
   case ARM::VST2LNd16:
   case ARM::VST2LNd32:
@@ -192,13 +185,6 @@
     NumRegs = 2;
     return true;
 
-  case ARM::VST2q8:
-  case ARM::VST2q16:
-  case ARM::VST2q32:
-    FirstOpnd = 2;
-    NumRegs = 4;
-    return true;
-
   case ARM::VST2LNq16:
   case ARM::VST2LNq32:
     FirstOpnd = 2;




From baldrick at free.fr  Sat Aug 28 03:06:15 2010
From: baldrick at free.fr (Duncan Sands)
Date: Sat, 28 Aug 2010 10:06:15 +0200
Subject: [llvm-commits] [llvm] r112355 - in /llvm/trunk:
 include/llvm/LinkAllPasses.h include/llvm/Transforms/Scalar.h
 include/llvm/Transforms/Utils/SSI.h lib/Transforms/Scalar/ABCD.cpp
 lib/Transforms/Scalar/CMakeLists.txt lib/Transforms/Utils/CMakeLists.txt
 lib/Transforms/Utils/SSI.cpp test/Transforms/ABCD/ test/Transforms/SSI/
In-Reply-To: <20100828035125.2ECF52A6C12C@llvm.org>
References: <20100828035125.2ECF52A6C12C@llvm.org>
Message-ID: <4C78C377.8040901@free.fr>

Hi Chris,

> remove the ABCD and SSI passes.  They don't have any clients that
> I'm aware of, aren't maintained, and LVI will be replacing their value.
> nlewycky approved this on irc.

the range analysis GSoC project is using SSI...

Ciao,

Duncan.


From baldrick at free.fr  Sat Aug 28 04:08:54 2010
From: baldrick at free.fr (Duncan Sands)
Date: Sat, 28 Aug 2010 09:08:54 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r112362 - in /llvm-gcc-4.2/trunk/gcc:
	configure configure.ac
Message-ID: <20100828090855.0856A2A6C12C@llvm.org>

Author: baldrick
Date: Sat Aug 28 04:08:54 2010
New Revision: 112362

URL: http://llvm.org/viewvc/llvm-project?rev=112362&view=rev
Log:
Add support for building against an LLVM release+asserts build
with debugging symbols.

Modified:
    llvm-gcc-4.2/trunk/gcc/configure
    llvm-gcc-4.2/trunk/gcc/configure.ac

Modified: llvm-gcc-4.2/trunk/gcc/configure
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/configure?rev=112362&r1=112361&r2=112362&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/gcc/configure (original)
+++ llvm-gcc-4.2/trunk/gcc/configure Sat Aug 28 04:08:54 2010
@@ -8940,6 +8940,9 @@
  elif test -x "$LLVMBASEPATH/Release+Asserts+Checks/bin/llc$EXEEXT"; then
      echo Found Release+Asserts+Checks LLVM Tree in $LLVMBASEPATH
      LLVMBUILDMODE="Release+Asserts+Checks"
+ elif test -x "$LLVMBASEPATH/Release+Debug+Asserts/bin/llc$EXEEXT"; then
+     echo Found Release+Debug+Asserts LLVM Tree in $LLVMBASEPATH
+     LLVMBUILDMODE="Release+Debug+Asserts"
  elif test -x "$LLVMBASEPATH/Debug+Asserts+Checks/bin/llc$EXEEXT"; then
      echo Found Debug+Asserts+Checks LLVM Tree in $LLVMBASEPATH
      LLVMBUILDMODE="Debug+Asserts+Checks"

Modified: llvm-gcc-4.2/trunk/gcc/configure.ac
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/configure.ac?rev=112362&r1=112361&r2=112362&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/gcc/configure.ac (original)
+++ llvm-gcc-4.2/trunk/gcc/configure.ac Sat Aug 28 04:08:54 2010
@@ -873,6 +873,9 @@
  elif test -x "$LLVMBASEPATH/Release+Asserts+Checks/bin/llc$EXEEXT"; then
      echo Found Release+Asserts+Checks LLVM Tree in $LLVMBASEPATH
      LLVMBUILDMODE="Release+Asserts+Checks"
+ elif test -x "$LLVMBASEPATH/Release+Debug+Asserts/bin/llc$EXEEXT"; then
+     echo Found Release+Debug+Asserts LLVM Tree in $LLVMBASEPATH
+     LLVMBUILDMODE="Release+Debug+Asserts"
  elif test -x "$LLVMBASEPATH/Debug+Asserts+Checks/bin/llc$EXEEXT"; then
      echo Found Debug+Asserts+Checks LLVM Tree in $LLVMBASEPATH
      LLVMBUILDMODE="Debug+Asserts+Checks"




From benny.kra at googlemail.com  Sat Aug 28 04:47:42 2010
From: benny.kra at googlemail.com (Benjamin Kramer)
Date: Sat, 28 Aug 2010 09:47:42 -0000
Subject: [llvm-commits] [llvm] r112363 - in /llvm/trunk/bindings/ocaml/llvm:
 llvm.ml llvm.mli llvm_ocaml.c
Message-ID: <20100828094742.C79C02A6C12C@llvm.org>

Author: d0k
Date: Sat Aug 28 04:47:42 2010
New Revision: 112363

URL: http://llvm.org/viewvc/llvm-project?rev=112363&view=rev
Log:
Remove unions from the ocaml bindings.

Modified:
    llvm/trunk/bindings/ocaml/llvm/llvm.ml
    llvm/trunk/bindings/ocaml/llvm/llvm.mli
    llvm/trunk/bindings/ocaml/llvm/llvm_ocaml.c

Modified: llvm/trunk/bindings/ocaml/llvm/llvm.ml
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/llvm/llvm.ml?rev=112363&r1=112362&r2=112363&view=diff
==============================================================================
--- llvm/trunk/bindings/ocaml/llvm/llvm.ml (original)
+++ llvm/trunk/bindings/ocaml/llvm/llvm.ml Sat Aug 28 04:47:42 2010
@@ -35,7 +35,6 @@
   | Opaque
   | Vector
   | Metadata
-  | Union
 end
 
 module Linkage = struct
@@ -210,11 +209,6 @@
                               = "llvm_struct_element_types"
 external is_packed : lltype -> bool = "llvm_is_packed"
 
-(*--... Operations on union types ..........................................--*)
-external union_type : llcontext -> lltype array -> lltype = "llvm_union_type"
-external union_element_types : lltype -> lltype array
-                             = "llvm_union_element_types"
-
 (*--... Operations on pointer, vector, and array types .....................--*)
 external array_type : lltype -> int -> lltype = "llvm_array_type"
 external pointer_type : lltype -> lltype = "llvm_pointer_type"
@@ -321,7 +315,6 @@
 external const_packed_struct : llcontext -> llvalue array -> llvalue
                              = "llvm_const_packed_struct"
 external const_vector : llvalue array -> llvalue = "llvm_const_vector"
-external const_union : lltype -> llvalue -> llvalue = "LLVMConstUnion"
 
 (*--... Constant expressions ...............................................--*)
 external align_of : lltype -> llvalue = "LLVMAlignOf"
@@ -1052,9 +1045,6 @@
       if is_packed ty
         then "<" ^ s ^ ">"
         else s
-  | TypeKind.Union -> "union { " ^ (concat2 ", " (
-                        Array.map string_of_lltype (union_element_types ty)
-                      )) ^ " }"
   | TypeKind.Array -> "["   ^ (string_of_int (array_length ty)) ^
                       " x " ^ (string_of_lltype (element_type ty)) ^ "]"
   | TypeKind.Vector -> "<"   ^ (string_of_int (vector_size ty)) ^

Modified: llvm/trunk/bindings/ocaml/llvm/llvm.mli
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/llvm/llvm.mli?rev=112363&r1=112362&r2=112363&view=diff
==============================================================================
--- llvm/trunk/bindings/ocaml/llvm/llvm.mli (original)
+++ llvm/trunk/bindings/ocaml/llvm/llvm.mli Sat Aug 28 04:47:42 2010
@@ -72,7 +72,6 @@
   | Opaque
   | Vector
   | Metadata
-  | Union
 end
 
 (** The linkage of a global value, accessed with {!linkage} and
@@ -408,19 +407,6 @@
 external is_packed : lltype -> bool = "llvm_is_packed"
 
 
-(** {7 Operations on union types} *)
-
-(** [union_type context tys] returns the union type in the context [context]
-    containing the types in the array [tys]. See the method
-    [llvm::UnionType::get] *)
-external union_type : llcontext -> lltype array -> lltype = "llvm_union_type"
-
-(** [union_element_types uty] returns the constituent types of the union type
-    [uty]. See the method [llvm::UnionType::getElementType]. *)
-external union_element_types : lltype -> lltype array
-                             = "llvm_union_element_types"
-
-
 (** {7 Operations on pointer, vector, and array types} *)
 
 (** [array_type ty n] returns the array type containing [n] elements of type
@@ -697,10 +683,6 @@
     values [elts]. See the method [llvm::ConstantVector::get]. *)
 external const_vector : llvalue array -> llvalue = "llvm_const_vector"
 
-(** [const_union ty v] returns the union constant of type [union_type tys] and
-    containing the value [v]. See the method [llvm::ConstantUnion::get]. *)
-external const_union : lltype -> llvalue -> llvalue = "LLVMConstUnion"
-
 
 (** {7 Constant expressions} *)
 

Modified: llvm/trunk/bindings/ocaml/llvm/llvm_ocaml.c
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/llvm/llvm_ocaml.c?rev=112363&r1=112362&r2=112363&view=diff
==============================================================================
--- llvm/trunk/bindings/ocaml/llvm/llvm_ocaml.c (original)
+++ llvm/trunk/bindings/ocaml/llvm/llvm_ocaml.c Sat Aug 28 04:47:42 2010
@@ -318,21 +318,6 @@
   return Val_bool(LLVMIsPackedStruct(StructTy));
 }
 
-/*--... Operations on union types ..........................................--*/
-
-/* llcontext -> lltype array -> lltype */
-CAMLprim LLVMTypeRef llvm_union_type(LLVMContextRef C, value ElementTypes) {
-  return LLVMUnionTypeInContext(C, (LLVMTypeRef *) ElementTypes,
-                                Wosize_val(ElementTypes));
-}
-
-/* lltype -> lltype array */
-CAMLprim value llvm_union_element_types(LLVMTypeRef UnionTy) {
-  value Tys = alloc(LLVMCountUnionElementTypes(UnionTy), 0);
-  LLVMGetUnionElementTypes(UnionTy, (LLVMTypeRef *) Tys);
-  return Tys;
-}
-
 /*--... Operations on array, pointer, and vector types .....................--*/
 
 /* lltype -> int -> lltype */




From geek4civic at gmail.com  Sat Aug 28 04:54:25 2010
From: geek4civic at gmail.com (NAKAMURA Takumi)
Date: Sat, 28 Aug 2010 18:54:25 +0900
Subject: [llvm-commits] [PATCH] Don't cast Win32 FILETIME structs to
	int64
In-Reply-To: <4C5B2350.2000503@andric.com>
References: <4C5B2350.2000503@andric.com>
Message-ID: 

This looks fine for me.
Confirmed on mingw.


Thank you, ...Takumi


2010/8/6 Dimitry Andric :
> Subject: Don't cast Win32 FILETIME structs to int64
>
> According to the Microsoft documentation here:
> http://msdn.microsoft.com/en-us/library/ms724284%28VS.85%29.aspx
>
> this cast used in lib/System/Win32/Path.inc:
>
> __int64 ft = *reinterpret_cast<__int64*>(&fi.ftLastWriteTime);
>
> should not be done. ?The documentation says: "Do not cast a pointer to a
> FILETIME structure to either a ULARGE_INTEGER* or __int64* value because
> it can cause alignment faults on 64-bit Windows."
>
> When compiling with MinGW gcc 4.5.0, you also get some strict-aliasing
> warnings about those casts:
>
> In file included from lib/System/Path.cpp:262:0:
> lib/System/Win32/Path.inc: In member function 'const llvm::sys::FileStatus* llvm::sys::PathWithStatus::getFileStatus(bool, std::string*) const':
> lib/System/Win32/Path.inc:403:65: warning: dereferencing type-punned pointer will break strict-aliasing rules
> lib/System/Win32/Path.inc: In member function 'bool llvm::sys::Path::setStatusInfoOnDisk(const llvm::sys::FileStatus&, std::string*) const':
> lib/System/Win32/Path.inc:781:14: warning: dereferencing type-punned pointer will break strict-aliasing rules
>
> Attached is a fix that uses the recommended ULARGE_INTEGER structure,
> and fixes the strict-aliasing warnings as a side-effect. ?Please review.
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
>



From benny.kra at googlemail.com  Sat Aug 28 05:29:41 2010
From: benny.kra at googlemail.com (Benjamin Kramer)
Date: Sat, 28 Aug 2010 10:29:41 -0000
Subject: [llvm-commits] [llvm] r112364 -
	/llvm/trunk/test/Bindings/Ocaml/vmcore.ml
Message-ID: <20100828102941.325B22A6C12C@llvm.org>

Author: d0k
Date: Sat Aug 28 05:29:41 2010
New Revision: 112364

URL: http://llvm.org/viewvc/llvm-project?rev=112364&view=rev
Log:
Update ocaml test.

Modified:
    llvm/trunk/test/Bindings/Ocaml/vmcore.ml

Modified: llvm/trunk/test/Bindings/Ocaml/vmcore.ml
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Bindings/Ocaml/vmcore.ml?rev=112364&r1=112363&r2=112364&view=diff
==============================================================================
--- llvm/trunk/test/Bindings/Ocaml/vmcore.ml (original)
+++ llvm/trunk/test/Bindings/Ocaml/vmcore.ml Sat Aug 28 05:29:41 2010
@@ -296,12 +296,6 @@
   insist ((struct_type context [| i16_type; i16_type; i32_type; i32_type |])
         = (type_of c));
 
-  group "union";
-  let t = union_type context [| i1_type; i16_type; i64_type; double_type |] in
-  let c = const_union t one in
-  ignore (define_global "const_union" c m);
-  insist (t = (type_of c));
-  
   (* RUN: grep {const_null.*zeroinit} < %t.ll
    *)
   group "null";




From clattner at apple.com  Sat Aug 28 11:23:10 2010
From: clattner at apple.com (Chris Lattner)
Date: Sat, 28 Aug 2010 09:23:10 -0700
Subject: [llvm-commits] [llvm] r112363 - in
	/llvm/trunk/bindings/ocaml/llvm: llvm.ml llvm.mli llvm_ocaml.c
In-Reply-To: <20100828094742.C79C02A6C12C@llvm.org>
References: <20100828094742.C79C02A6C12C@llvm.org>
Message-ID: 


On Aug 28, 2010, at 2:47 AM, Benjamin Kramer wrote:

> Author: d0k
> Date: Sat Aug 28 04:47:42 2010
> New Revision: 112363
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=112363&view=rev
> Log:
> Remove unions from the ocaml bindings.

Doh, thanks!

-Chris


From clattner at apple.com  Sat Aug 28 11:24:05 2010
From: clattner at apple.com (Chris Lattner)
Date: Sat, 28 Aug 2010 09:24:05 -0700
Subject: [llvm-commits] [llvm] r112355 - in /llvm/trunk:
	include/llvm/LinkAllPasses.h include/llvm/Transforms/Scalar.h
	include/llvm/Transforms/Utils/SSI.h lib/Transforms/Scalar/ABCD.cpp
	lib/Transforms/Scalar/CMakeLists.txt
	lib/Transforms/Utils/CMakeLists.txt
	lib/Transforms/Utils/SSI.cpp test/Transforms/ABCD/
	test/Transforms/SSI/
In-Reply-To: <4C78C377.8040901@free.fr>
References: <20100828035125.2ECF52A6C12C@llvm.org> <4C78C377.8040901@free.fr>
Message-ID: 


On Aug 28, 2010, at 1:06 AM, Duncan Sands wrote:

> Hi Chris,
> 
>> remove the ABCD and SSI passes.  They don't have any clients that
>> I'm aware of, aren't maintained, and LVI will be replacing their value.
>> nlewycky approved this on irc.
> 
> the range analysis GSoC project is using SSI...

The code still exists in svn history, out of tree projects can continue to use it by pulling the code into their tree.

-Chris


From sabre at nondot.org  Sat Aug 28 11:33:36 2010
From: sabre at nondot.org (Chris Lattner)
Date: Sat, 28 Aug 2010 16:33:36 -0000
Subject: [llvm-commits] [llvm] r112375 - in /llvm/trunk:
 autoconf/configure.ac configure docs/ReleaseNotes.html lib/Target/MSIL/
Message-ID: <20100828163336.E3EFD2A6C12C@llvm.org>

Author: lattner
Date: Sat Aug 28 11:33:36 2010
New Revision: 112375

URL: http://llvm.org/viewvc/llvm-project?rev=112375&view=rev
Log:
remove the MSIL backend.  It isn't maintained, is buggy, has no testcases
and hasn't kept up with ToT.  Approved by Anton.

Removed:
    llvm/trunk/lib/Target/MSIL/
Modified:
    llvm/trunk/autoconf/configure.ac
    llvm/trunk/configure
    llvm/trunk/docs/ReleaseNotes.html

Modified: llvm/trunk/autoconf/configure.ac
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/autoconf/configure.ac?rev=112375&r1=112374&r2=112375&view=diff
==============================================================================
--- llvm/trunk/autoconf/configure.ac (original)
+++ llvm/trunk/autoconf/configure.ac Sat Aug 28 11:33:36 2010
@@ -543,13 +543,13 @@
 AC_ARG_ENABLE([targets],AS_HELP_STRING([--enable-targets],
     [Build specific host targets: all or target1,target2,... Valid targets are:
      host, x86, x86_64, sparc, powerpc, alpha, arm, mips, spu, pic16,
-     xcore, msp430, systemz, blackfin, cbe, msil, and cpp (default=all)]),,
+     xcore, msp430, systemz, blackfin, cbe, and cpp (default=all)]),,
     enableval=all)
 if test "$enableval" = host-only ; then
   enableval=host
 fi
 case "$enableval" in
-  all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Mips CellSPU PIC16 XCore MSP430 SystemZ Blackfin CBackend MSIL CppBackend MBlaze" ;;
+  all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Mips CellSPU PIC16 XCore MSP430 SystemZ Blackfin CBackend CppBackend MBlaze" ;;
   *)for a_target in `echo $enableval|sed -e 's/,/ /g' ` ; do
       case "$a_target" in
         x86)      TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
@@ -566,7 +566,6 @@
         systemz)  TARGETS_TO_BUILD="SystemZ $TARGETS_TO_BUILD" ;;
         blackfin) TARGETS_TO_BUILD="Blackfin $TARGETS_TO_BUILD" ;;
         cbe)      TARGETS_TO_BUILD="CBackend $TARGETS_TO_BUILD" ;;
-        msil)     TARGETS_TO_BUILD="MSIL $TARGETS_TO_BUILD" ;;
         cpp)      TARGETS_TO_BUILD="CppBackend $TARGETS_TO_BUILD" ;;
         mblaze)   TARGETS_TO_BUILD="MBlaze $TARGETS_TO_BUILD" ;;
         host) case "$llvm_cv_target_arch" in

Modified: llvm/trunk/configure
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/configure?rev=112375&r1=112374&r2=112375&view=diff
==============================================================================
--- llvm/trunk/configure (original)
+++ llvm/trunk/configure Sat Aug 28 11:33:36 2010
@@ -1414,7 +1414,7 @@
   --enable-targets        Build specific host targets: all or
                           target1,target2,... Valid targets are: host, x86,
                           x86_64, sparc, powerpc, alpha, arm, mips, spu,
-                          pic16, xcore, msp430, systemz, blackfin, cbe, msil,
+                          pic16, xcore, msp430, systemz, blackfin, cbe, 
                           and cpp (default=all)
   --enable-cbe-printf-a   Enable C Backend output with hex floating point via
                           %a (default is YES)
@@ -4955,7 +4955,7 @@
   enableval=host
 fi
 case "$enableval" in
-  all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Mips CellSPU PIC16 XCore MSP430 SystemZ Blackfin CBackend MSIL CppBackend MBlaze" ;;
+  all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Mips CellSPU PIC16 XCore MSP430 SystemZ Blackfin CBackend CppBackend MBlaze" ;;
   *)for a_target in `echo $enableval|sed -e 's/,/ /g' ` ; do
       case "$a_target" in
         x86)      TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
@@ -4972,7 +4972,6 @@
         systemz)  TARGETS_TO_BUILD="SystemZ $TARGETS_TO_BUILD" ;;
         blackfin) TARGETS_TO_BUILD="Blackfin $TARGETS_TO_BUILD" ;;
         cbe)      TARGETS_TO_BUILD="CBackend $TARGETS_TO_BUILD" ;;
-        msil)     TARGETS_TO_BUILD="MSIL $TARGETS_TO_BUILD" ;;
         cpp)      TARGETS_TO_BUILD="CppBackend $TARGETS_TO_BUILD" ;;
         mblaze)   TARGETS_TO_BUILD="MBlaze $TARGETS_TO_BUILD" ;;
         host) case "$llvm_cv_target_arch" in

Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=112375&r1=112374&r2=112375&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Sat Aug 28 11:33:36 2010
@@ -68,7 +68,6 @@
   lib/Transforms/IPO/MergeFunctions.cpp => consider for 2.8.
   llvm/Analysis/PointerTracking.h => Edwin wants this, consider for 2.8.
   GEPSplitterPass
-  MSIL backend?
 -->
  
    
@@ -77,6 +76,7 @@
   strong phi elim
   llvm.dbg.value: variable debug info for optimized code
   loop dependence analysis
+  TBAA
  -->
 
    {A,+,B} * {C,+,D}  -->  {A*C,+,F*D + G*B + B*D}
           const SCEVAddRecExpr *F = AddRec, *G = OtherAddRec;
           const SCEV *NewStart = getMulExpr(F->getStart(), G->getStart());




From gohman at apple.com  Sun Aug 29 10:07:13 2010
From: gohman at apple.com (Dan Gohman)
Date: Sun, 29 Aug 2010 15:07:13 -0000
Subject: [llvm-commits] [llvm] r112431 -
	/llvm/trunk/lib/Analysis/ScalarEvolution.cpp
Message-ID: <20100829150714.1991E2A6C12C@llvm.org>

Author: djg
Date: Sun Aug 29 10:07:13 2010
New Revision: 112431

URL: http://llvm.org/viewvc/llvm-project?rev=112431&view=rev
Log:
Micro-optimize GroupByComplexity.

Modified:
    llvm/trunk/lib/Analysis/ScalarEvolution.cpp

Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=112431&r1=112430&r2=112431&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original)
+++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Sun Aug 29 10:07:13 2010
@@ -704,8 +704,9 @@
   if (Ops.size() == 2) {
     // This is the common case, which also happens to be trivially simple.
     // Special case it.
-    if (SCEVComplexityCompare(LI)(Ops[1], Ops[0]))
-      std::swap(Ops[0], Ops[1]);
+    const SCEV *&LHS = Ops[0], *&RHS = Ops[1];
+    if (SCEVComplexityCompare(LI)(RHS, LHS))
+      std::swap(LHS, RHS);
     return;
   }
 




From gohman at apple.com  Sun Aug 29 10:10:06 2010
From: gohman at apple.com (Dan Gohman)
Date: Sun, 29 Aug 2010 15:10:06 -0000
Subject: [llvm-commits] [llvm] r112432 -
	/llvm/trunk/lib/Analysis/ScalarEvolution.cpp
Message-ID: <20100829151006.EA8C22A6C12C@llvm.org>

Author: djg
Date: Sun Aug 29 10:10:06 2010
New Revision: 112432

URL: http://llvm.org/viewvc/llvm-project?rev=112432&view=rev
Log:
Batch up subtracts along with adds, when analyzing long chains of
operations.

Modified:
    llvm/trunk/lib/Analysis/ScalarEvolution.cpp

Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=112432&r1=112431&r2=112432&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original)
+++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Sun Aug 29 10:10:06 2010
@@ -3332,11 +3332,16 @@
     // LLVM IR canonical form means we need only traverse the left operands.
     SmallVector AddOps;
     AddOps.push_back(getSCEV(U->getOperand(1)));
-    for (Value *Op = U->getOperand(0);
-         Op->getValueID() == Instruction::Add + Value::InstructionVal;
-         Op = U->getOperand(0)) {
+    for (Value *Op = U->getOperand(0); ; Op = U->getOperand(0)) {
+      unsigned Opcode = Op->getValueID() - Value::InstructionVal;
+      if (Opcode != Instruction::Add && Opcode != Instruction::Sub)
+        break;
       U = cast(Op);
-      AddOps.push_back(getSCEV(U->getOperand(1)));
+      const SCEV *Op1 = getSCEV(U->getOperand(1));
+      if (Opcode == Instruction::Sub)
+        AddOps.push_back(getNegativeSCEV(Op1));
+      else
+        AddOps.push_back(Op1);
     }
     AddOps.push_back(getSCEV(U->getOperand(0)));
     return getAddExpr(AddOps);




From gohman at apple.com  Sun Aug 29 10:16:58 2010
From: gohman at apple.com (Dan Gohman)
Date: Sun, 29 Aug 2010 15:16:58 -0000
Subject: [llvm-commits] [llvm] r112433 -
	/llvm/trunk/lib/Analysis/ScalarEvolution.cpp
Message-ID: <20100829151658.430092A6C12C@llvm.org>

Author: djg
Date: Sun Aug 29 10:16:58 2010
New Revision: 112433

URL: http://llvm.org/viewvc/llvm-project?rev=112433&view=rev
Log:
Restructure the {A,+,B} * {C,+,D} folding so that it folds
all applicable addrecs before recursing on getMulExpr, instead of
recursing on getMulExpr for each one.

Modified:
    llvm/trunk/lib/Analysis/ScalarEvolution.cpp

Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=112433&r1=112432&r2=112433&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original)
+++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Sun Aug 29 10:16:58 2010
@@ -1886,27 +1886,30 @@
     // there are multiple AddRec's with the same loop induction variable being
     // multiplied together.  If so, we can fold them.
     for (unsigned OtherIdx = Idx+1;
-         OtherIdx < Ops.size() && isa(Ops[OtherIdx]);++OtherIdx)
-      if (OtherIdx != Idx) {
-        const SCEVAddRecExpr *OtherAddRec = cast(Ops[OtherIdx]);
-        if (AddRecLoop == OtherAddRec->getLoop()) {
-          // F * G  -->  {A,+,B} * {C,+,D}  -->  {A*C,+,F*D + G*B + B*D}
-          const SCEVAddRecExpr *F = AddRec, *G = OtherAddRec;
-          const SCEV *NewStart = getMulExpr(F->getStart(), G->getStart());
-          const SCEV *B = F->getStepRecurrence(*this);
-          const SCEV *D = G->getStepRecurrence(*this);
-          const SCEV *NewStep = getAddExpr(getMulExpr(F, D),
-                                           getMulExpr(G, B),
-                                           getMulExpr(B, D));
-          const SCEV *NewAddRec = getAddRecExpr(NewStart, NewStep,
-                                                F->getLoop());
-          if (Ops.size() == 2) return NewAddRec;
-
-          Ops.erase(Ops.begin()+Idx);
-          Ops.erase(Ops.begin()+OtherIdx-1);
-          Ops.push_back(NewAddRec);
-          return getMulExpr(Ops);
-        }
+         OtherIdx < Ops.size() && isa(Ops[OtherIdx]);
+         ++OtherIdx)
+      if (AddRecLoop == cast(Ops[OtherIdx])->getLoop()) {
+        // F * G, where F = {A,+,B} and G = {C,+,D}  -->
+        // {A*C,+,F*D + G*B + B*D}
+        for (; OtherIdx != Ops.size() && isa(Ops[OtherIdx]);
+             ++OtherIdx)
+          if (const SCEVAddRecExpr *OtherAddRec =
+                dyn_cast(Ops[OtherIdx]))
+            if (OtherAddRec->getLoop() == AddRecLoop) {
+              const SCEVAddRecExpr *F = AddRec, *G = OtherAddRec;
+              const SCEV *NewStart = getMulExpr(F->getStart(), G->getStart());
+              const SCEV *B = F->getStepRecurrence(*this);
+              const SCEV *D = G->getStepRecurrence(*this);
+              const SCEV *NewStep = getAddExpr(getMulExpr(F, D),
+                                               getMulExpr(G, B),
+                                               getMulExpr(B, D));
+              const SCEV *NewAddRec = getAddRecExpr(NewStart, NewStep,
+                                                    F->getLoop());
+              if (Ops.size() == 2) return NewAddRec;
+              Ops[Idx] = AddRec = cast(NewAddRec);
+              Ops.erase(Ops.begin() + OtherIdx); --OtherIdx;
+            }
+        return getMulExpr(Ops);
       }
 
     // Otherwise couldn't fold anything into this recurrence.  Move onto the




From gohman at apple.com  Sun Aug 29 10:18:49 2010
From: gohman at apple.com (Dan Gohman)
Date: Sun, 29 Aug 2010 15:18:49 -0000
Subject: [llvm-commits] [llvm] r112434 -
	/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp
Message-ID: <20100829151849.7F3532A6C12C@llvm.org>

Author: djg
Date: Sun Aug 29 10:18:49 2010
New Revision: 112434

URL: http://llvm.org/viewvc/llvm-project?rev=112434&view=rev
Log:
Do one lookup instead of two.

Modified:
    llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp?rev=112434&r1=112433&r2=112434&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Sun Aug 29 10:18:49 2010
@@ -161,9 +161,10 @@
 
 bool
 RegUseTracker::isRegUsedByUsesOtherThan(const SCEV *Reg, size_t LUIdx) const {
-  if (!RegUsesMap.count(Reg)) return false;
-  const SmallBitVector &UsedByIndices =
-    RegUsesMap.find(Reg)->second.UsedByIndices;
+  RegUsesTy::const_iterator I = RegUsesMap.find(Reg);
+  if (I == RegUsesMap.end())
+    return false;
+  const SmallBitVector &UsedByIndices = I->second.UsedByIndices;
   int i = UsedByIndices.find_first();
   if (i == -1) return false;
   if ((size_t)i != LUIdx) return true;




From gohman at apple.com  Sun Aug 29 10:19:12 2010
From: gohman at apple.com (Dan Gohman)
Date: Sun, 29 Aug 2010 15:19:12 -0000
Subject: [llvm-commits] [llvm] r112435 -
	/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp
Message-ID: <20100829151912.16D3D2A6C12C@llvm.org>

Author: djg
Date: Sun Aug 29 10:19:11 2010
New Revision: 112435

URL: http://llvm.org/viewvc/llvm-project?rev=112435&view=rev
Log:
Delete an unused declaration.

Modified:
    llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp?rev=112435&r1=112434&r2=112435&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Sun Aug 29 10:19:11 2010
@@ -995,8 +995,6 @@
   void DeleteFormula(Formula &F);
   void RecomputeRegs(size_t LUIdx, RegUseTracker &Reguses);
 
-  void check() const;
-
   void print(raw_ostream &OS) const;
   void dump() const;
 };




From gohman at apple.com  Sun Aug 29 10:21:38 2010
From: gohman at apple.com (Dan Gohman)
Date: Sun, 29 Aug 2010 15:21:38 -0000
Subject: [llvm-commits] [llvm] r112436 -
	/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp
Message-ID: <20100829152138.74AC72A6C12C@llvm.org>

Author: djg
Date: Sun Aug 29 10:21:38 2010
New Revision: 112436

URL: http://llvm.org/viewvc/llvm-project?rev=112436&view=rev
Log:
Move this debug output into GenerateAllReuseFormula, to declutter
the high-level logic.

Modified:
    llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp?rev=112436&r1=112435&r2=112436&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Sun Aug 29 10:21:38 2010
@@ -2795,6 +2795,10 @@
   }
 
   GenerateCrossUseConstantOffsets();
+
+  DEBUG(dbgs() << "\n"
+                  "After generating reuse formulae:\n";
+        print_uses(dbgs()));
 }
 
 /// If their are multiple formulae with the same set of registers used
@@ -3631,10 +3635,6 @@
   // to formulate the values needed for the uses.
   GenerateAllReuseFormulae();
 
-  DEBUG(dbgs() << "\n"
-                  "After generating reuse formulae:\n";
-        print_uses(dbgs()));
-
   FilterOutUndesirableDedicatedRegisters();
   NarrowSearchSpaceUsingHeuristics();
 




From gohman at apple.com  Sun Aug 29 10:27:08 2010
From: gohman at apple.com (Dan Gohman)
Date: Sun, 29 Aug 2010 15:27:08 -0000
Subject: [llvm-commits] [llvm] r112437 -
	/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp
Message-ID: <20100829152708.6A4372A6C12C@llvm.org>

Author: djg
Date: Sun Aug 29 10:27:08 2010
New Revision: 112437

URL: http://llvm.org/viewvc/llvm-project?rev=112437&view=rev
Log:
Add some comments.

Modified:
    llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp?rev=112437&r1=112436&r2=112437&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Sun Aug 29 10:27:08 2010
@@ -1932,20 +1932,25 @@
 LSRUse *
 LSRInstance::FindUseWithSimilarFormula(const Formula &OrigF,
                                        const LSRUse &OrigLU) {
-  // Search all uses for the formula. This could be more clever. Ignore
-  // ICmpZero uses because they may contain formulae generated by
-  // GenerateICmpZeroScales, in which case adding fixup offsets may
-  // be invalid.
+  // Search all uses for the formula. This could be more clever.
   for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
     LSRUse &LU = Uses[LUIdx];
+    // Check whether this use is close enough to OrigLU, to see whether it's
+    // worthwhile looking through its formulae.
+    // Ignore ICmpZero uses because they may contain formulae generated by
+    // GenerateICmpZeroScales, in which case adding fixup offsets may
+    // be invalid.
     if (&LU != &OrigLU &&
         LU.Kind != LSRUse::ICmpZero &&
         LU.Kind == OrigLU.Kind && OrigLU.AccessTy == LU.AccessTy &&
         LU.WidestFixupType == OrigLU.WidestFixupType &&
         LU.HasFormulaWithSameRegs(OrigF)) {
+      // Scan through this use's formulae.
       for (SmallVectorImpl::const_iterator I = LU.Formulae.begin(),
            E = LU.Formulae.end(); I != E; ++I) {
         const Formula &F = *I;
+        // Check to see if this formula has the same registers and symbols
+        // as OrigF.
         if (F.BaseRegs == OrigF.BaseRegs &&
             F.ScaledReg == OrigF.ScaledReg &&
             F.AM.BaseGV == OrigF.AM.BaseGV &&
@@ -1953,12 +1958,16 @@
             LU.Kind) {
           if (F.AM.BaseOffs == 0)
             return &LU;
+          // This is the formula where all the registers and symbols matched;
+          // there aren't going to be any others. Since we declined it, we
+          // can skip the rest of the formulae and procede to the next LSRUse.
           break;
         }
       }
     }
   }
 
+  // Nothing looked good.
   return 0;
 }
 




From gohman at apple.com  Sun Aug 29 10:30:29 2010
From: gohman at apple.com (Dan Gohman)
Date: Sun, 29 Aug 2010 15:30:29 -0000
Subject: [llvm-commits] [llvm] r112438 -
	/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp
Message-ID: <20100829153029.426D32A6C12C@llvm.org>

Author: djg
Date: Sun Aug 29 10:30:29 2010
New Revision: 112438

URL: http://llvm.org/viewvc/llvm-project?rev=112438&view=rev
Log:
Delete a bogus check.

Modified:
    llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp?rev=112438&r1=112437&r2=112438&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Sun Aug 29 10:30:29 2010
@@ -1954,8 +1954,7 @@
         if (F.BaseRegs == OrigF.BaseRegs &&
             F.ScaledReg == OrigF.ScaledReg &&
             F.AM.BaseGV == OrigF.AM.BaseGV &&
-            F.AM.Scale == OrigF.AM.Scale &&
-            LU.Kind) {
+            F.AM.Scale == OrigF.AM.Scale) {
           if (F.AM.BaseOffs == 0)
             return &LU;
           // This is the formula where all the registers and symbols matched;




From gohman at apple.com  Sun Aug 29 11:09:42 2010
From: gohman at apple.com (Dan Gohman)
Date: Sun, 29 Aug 2010 16:09:42 -0000
Subject: [llvm-commits] [llvm] r112439 -
	/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp
Message-ID: <20100829160942.457AD2A6C12C@llvm.org>

Author: djg
Date: Sun Aug 29 11:09:42 2010
New Revision: 112439

URL: http://llvm.org/viewvc/llvm-project?rev=112439&view=rev
Log:
Refactor the three main groups of code out of
NarrowSearchSpaceUsingHeuristics into separate functions.

Modified:
    llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp?rev=112439&r1=112438&r2=112439&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Sun Aug 29 11:09:42 2010
@@ -1367,6 +1367,9 @@
   void FilterOutUndesirableDedicatedRegisters();
 
   size_t EstimateSearchSpaceComplexity() const;
+  void NarrowSearchSpaceByDetectingSupersets();
+  void NarrowSearchSpaceByCollapsingUnrolledCode();
+  void NarrowSearchSpaceByPickingWinnerRegs();
   void NarrowSearchSpaceUsingHeuristics();
 
   void SolveRecurse(SmallVectorImpl &Solution,
@@ -2905,11 +2908,11 @@
   return Power;
 }
 
-/// NarrowSearchSpaceUsingHeuristics - If there are an extraordinary number of
-/// formulae to choose from, use some rough heuristics to prune down the number
-/// of formulae. This keeps the main solver from taking an extraordinary amount
-/// of time in some worst-case scenarios.
-void LSRInstance::NarrowSearchSpaceUsingHeuristics() {
+/// NarrowSearchSpaceByDetectingSupersets - When one formula uses a superset
+/// of the registers of another formula, it won't help reduce register
+/// pressure (though it may not necessarily hurt register pressure); remove
+/// it to simplify the system.
+void LSRInstance::NarrowSearchSpaceByDetectingSupersets() {
   if (EstimateSearchSpaceComplexity() >= ComplexityLimit) {
     DEBUG(dbgs() << "The search space is too complex.\n");
 
@@ -2967,7 +2970,12 @@
     DEBUG(dbgs() << "After pre-selection:\n";
           print_uses(dbgs()));
   }
+}
 
+/// NarrowSearchSpaceByCollapsingUnrolledCode - When there are many registers
+/// for expressions like A, A+1, A+2, etc., allocate a single register for
+/// them.
+void LSRInstance::NarrowSearchSpaceByCollapsingUnrolledCode() {
   if (EstimateSearchSpaceComplexity() >= ComplexityLimit) {
     DEBUG(dbgs() << "The search space is too complex.\n");
 
@@ -3038,7 +3046,12 @@
     DEBUG(dbgs() << "After pre-selection:\n";
           print_uses(dbgs()));
   }
+}
 
+/// NarrowSearchSpaceByPickingWinnerRegs - Pick a register which seems likely
+/// to be profitable, and then in any use which has any reference to that
+/// register, delete all formulae which do not reference that register.
+void LSRInstance::NarrowSearchSpaceByPickingWinnerRegs() {
   // With all other options exhausted, loop until the system is simple
   // enough to handle.
   SmallPtrSet Taken;
@@ -3100,6 +3113,16 @@
   }
 }
 
+/// NarrowSearchSpaceUsingHeuristics - If there are an extraordinary number of
+/// formulae to choose from, use some rough heuristics to prune down the number
+/// of formulae. This keeps the main solver from taking an extraordinary amount
+/// of time in some worst-case scenarios.
+void LSRInstance::NarrowSearchSpaceUsingHeuristics() {
+  NarrowSearchSpaceByDetectingSupersets();
+  NarrowSearchSpaceByCollapsingUnrolledCode();
+  NarrowSearchSpaceByPickingWinnerRegs();
+}
+
 /// SolveRecurse - This is the recursive solver.
 void LSRInstance::SolveRecurse(SmallVectorImpl &Solution,
                                Cost &SolutionCost,




From gohman at apple.com  Sun Aug 29 11:32:54 2010
From: gohman at apple.com (Dan Gohman)
Date: Sun, 29 Aug 2010 16:32:54 -0000
Subject: [llvm-commits] [llvm] r112440 -
	/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp
Message-ID: <20100829163254.D33B92A6C12C@llvm.org>

Author: djg
Date: Sun Aug 29 11:32:54 2010
New Revision: 112440

URL: http://llvm.org/viewvc/llvm-project?rev=112440&view=rev
Log:
Fix several areas in LSR to do a better job keeping the main
LSRInstance data structures up to date. This fixes some
pessimizations caused by stale data which will be exposed
in an upcoming change.

Modified:
    llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp?rev=112440&r1=112439&r2=112440&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Sun Aug 29 11:32:54 2010
@@ -113,6 +113,7 @@
 public:
   void CountRegister(const SCEV *Reg, size_t LUIdx);
   void DropRegister(const SCEV *Reg, size_t LUIdx);
+  void DropUse(size_t LUIdx, size_t NewLUIdx);
   void DropUse(size_t LUIdx);
 
   bool isRegUsedByUsesOtherThan(const SCEV *Reg, size_t LUIdx) const;
@@ -151,6 +152,24 @@
   RSD.UsedByIndices.reset(LUIdx);
 }
 
+/// DropUse - Clear out reference by use LUIdx, and prepare for use NewLUIdx
+/// to be swapped into LUIdx's position.
+void
+RegUseTracker::DropUse(size_t LUIdx, size_t NewLUIdx) {
+  // Remove the use index from every register's use list.
+  for (RegUsesTy::iterator I = RegUsesMap.begin(), E = RegUsesMap.end();
+       I != E; ++I) {
+    SmallBitVector &UsedByIndices = I->second.UsedByIndices;
+    UsedByIndices.resize(std::max(UsedByIndices.size(), NewLUIdx + 1));
+    if (LUIdx < UsedByIndices.size()) {
+      UsedByIndices[LUIdx] = UsedByIndices[NewLUIdx];
+      UsedByIndices.reset(NewLUIdx);
+    } else
+      UsedByIndices.reset(LUIdx);
+  }
+}
+
+/// DropUse - Clear out reference by use LUIdx.
 void
 RegUseTracker::DropUse(size_t LUIdx) {
   // Remove the use index from every register's use list.
@@ -1334,7 +1353,9 @@
                    UseMapDenseMapInfo> UseMapTy;
   UseMapTy UseMap;
 
-  bool reconcileNewOffset(LSRUse &LU, int64_t NewOffset, bool HasBaseReg,
+  bool reconcileNewOffset(LSRUse &LU,
+                          int64_t NewMinOffset, int64_t NewMaxOffset,
+                          bool HasBaseReg,
                           LSRUse::KindType Kind, const Type *AccessTy);
 
   std::pair getUse(const SCEV *&Expr,
@@ -1343,7 +1364,8 @@
 
   void DeleteUse(LSRUse &LU);
 
-  LSRUse *FindUseWithSimilarFormula(const Formula &F, const LSRUse &OrigLU);
+  LSRUse *FindUseWithSimilarFormula(const Formula &F, const LSRUse &OrigLU,
+                                    int64_t &NewBaseOffs);
 
 public:
   void InsertInitialFormula(const SCEV *S, LSRUse &LU, size_t LUIdx);
@@ -1843,11 +1865,13 @@
 /// at the given offset and other details. If so, update the use and
 /// return true.
 bool
-LSRInstance::reconcileNewOffset(LSRUse &LU, int64_t NewOffset, bool HasBaseReg,
+LSRInstance::reconcileNewOffset(LSRUse &LU,
+                                int64_t NewMinOffset, int64_t NewMaxOffset,
+                                bool HasBaseReg,
                                 LSRUse::KindType Kind, const Type *AccessTy) {
-  int64_t NewMinOffset = LU.MinOffset;
-  int64_t NewMaxOffset = LU.MaxOffset;
-  const Type *NewAccessTy = AccessTy;
+  int64_t ResultMinOffset = LU.MinOffset;
+  int64_t ResultMaxOffset = LU.MaxOffset;
+  const Type *ResultAccessTy = AccessTy;
 
   // Check for a mismatched kind. It's tempting to collapse mismatched kinds to
   // something conservative, however this can pessimize in the case that one of
@@ -1855,29 +1879,27 @@
   if (LU.Kind != Kind)
     return false;
   // Conservatively assume HasBaseReg is true for now.
-  if (NewOffset < LU.MinOffset) {
-    if (!isAlwaysFoldable(LU.MaxOffset - NewOffset, 0, HasBaseReg,
+  if (NewMinOffset < LU.MinOffset) {
+    if (!isAlwaysFoldable(LU.MaxOffset - NewMinOffset, 0, HasBaseReg,
                           Kind, AccessTy, TLI))
       return false;
-    NewMinOffset = NewOffset;
-  } else if (NewOffset > LU.MaxOffset) {
-    if (!isAlwaysFoldable(NewOffset - LU.MinOffset, 0, HasBaseReg,
+    ResultMinOffset = NewMinOffset;
+  } else if (NewMaxOffset > LU.MaxOffset) {
+    if (!isAlwaysFoldable(NewMaxOffset - LU.MinOffset, 0, HasBaseReg,
                           Kind, AccessTy, TLI))
       return false;
-    NewMaxOffset = NewOffset;
+    ResultMaxOffset = NewMaxOffset;
   }
   // Check for a mismatched access type, and fall back conservatively as needed.
   // TODO: Be less conservative when the type is similar and can use the same
   // addressing modes.
   if (Kind == LSRUse::Address && AccessTy != LU.AccessTy)
-    NewAccessTy = Type::getVoidTy(AccessTy->getContext());
+    ResultAccessTy = Type::getVoidTy(AccessTy->getContext());
 
   // Update the use.
-  LU.MinOffset = NewMinOffset;
-  LU.MaxOffset = NewMaxOffset;
-  LU.AccessTy = NewAccessTy;
-  if (NewOffset != LU.Offsets.back())
-    LU.Offsets.push_back(NewOffset);
+  LU.MinOffset = ResultMinOffset;
+  LU.MaxOffset = ResultMaxOffset;
+  LU.AccessTy = ResultAccessTy;
   return true;
 }
 
@@ -1902,9 +1924,12 @@
     // A use already existed with this base.
     size_t LUIdx = P.first->second;
     LSRUse &LU = Uses[LUIdx];
-    if (reconcileNewOffset(LU, Offset, /*HasBaseReg=*/true, Kind, AccessTy))
+    if (reconcileNewOffset(LU, Offset, Offset,
+                           /*HasBaseReg=*/true, Kind, AccessTy)) {
+      LU.Offsets.push_back(Offset);
       // Reuse this use.
       return std::make_pair(LUIdx, Offset);
+    }
   }
 
   // Create a new use.
@@ -1913,11 +1938,7 @@
   Uses.push_back(LSRUse(Kind, AccessTy));
   LSRUse &LU = Uses[LUIdx];
 
-  // We don't need to track redundant offsets, but we don't need to go out
-  // of our way here to avoid them.
-  if (LU.Offsets.empty() || Offset != LU.Offsets.back())
-    LU.Offsets.push_back(Offset);
-
+  LU.Offsets.push_back(Offset);
   LU.MinOffset = Offset;
   LU.MaxOffset = Offset;
   return std::make_pair(LUIdx, Offset);
@@ -1925,8 +1946,12 @@
 
 /// DeleteUse - Delete the given use from the Uses list.
 void LSRInstance::DeleteUse(LSRUse &LU) {
-  if (&LU != &Uses.back())
+  if (&LU != &Uses.back()) {
     std::swap(LU, Uses.back());
+    RegUses.DropUse(&LU - Uses.begin(), Uses.size() - 1);
+  } else {
+    RegUses.DropUse(&LU - Uses.begin());
+  }
   Uses.pop_back();
 }
 
@@ -1934,8 +1959,9 @@
 /// a formula that has the same registers as the given formula.
 LSRUse *
 LSRInstance::FindUseWithSimilarFormula(const Formula &OrigF,
-                                       const LSRUse &OrigLU) {
-  // Search all uses for the formula. This could be more clever.
+                                       const LSRUse &OrigLU,
+                                       int64_t &NewBaseOffs) {
+  // Search all uses for a formula similar to OrigF. This could be more clever.
   for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
     LSRUse &LU = Uses[LUIdx];
     // Check whether this use is close enough to OrigLU, to see whether it's
@@ -1958,8 +1984,15 @@
             F.ScaledReg == OrigF.ScaledReg &&
             F.AM.BaseGV == OrigF.AM.BaseGV &&
             F.AM.Scale == OrigF.AM.Scale) {
-          if (F.AM.BaseOffs == 0)
+          // Ok, all the registers and symbols matched. Check to see if the
+          // immediate looks nicer than our old one.
+          if (OrigF.AM.BaseOffs == INT64_MIN ||
+              (F.AM.BaseOffs != INT64_MIN &&
+               abs64(F.AM.BaseOffs) < abs64(OrigF.AM.BaseOffs))) {
+            // Looks good. Take it.
+            NewBaseOffs = F.AM.BaseOffs;
             return &LU;
+          }
           // This is the formula where all the registers and symbols matched;
           // there aren't going to be any others. Since we declined it, we
           // can skip the rest of the formulae and procede to the next LSRUse.
@@ -2600,6 +2633,17 @@
   WorkItem(size_t LI, int64_t I, const SCEV *R)
     : LUIdx(LI), Imm(I), OrigReg(R) {}
 
+  bool operator==(const WorkItem &that) const {
+    return LUIdx == that.LUIdx && Imm == that.Imm && OrigReg == that.OrigReg;
+  }
+  bool operator<(const WorkItem &that) const {
+    if (LUIdx != that.LUIdx)
+      return LUIdx < that.LUIdx;
+    if (Imm != that.Imm)
+      return Imm < that.Imm;
+    return OrigReg < that.OrigReg;
+  }
+
   void print(raw_ostream &OS) const;
   void dump() const;
 };
@@ -2639,8 +2683,7 @@
   // Now examine each set of registers with the same base value. Build up
   // a list of work to do and do the work in a separate step so that we're
   // not adding formulae and register counts while we're searching.
-  SmallVector WorkItems;
-  SmallSet, 32> UniqueItems;
+  SmallSetVector WorkItems;
   for (SmallVectorImpl::const_iterator I = Sequence.begin(),
        E = Sequence.end(); I != E; ++I) {
     const SCEV *Reg = *I;
@@ -2683,10 +2726,10 @@
         // Compute the difference between the two.
         int64_t Imm = (uint64_t)JImm - M->first;
         for (int LUIdx = UsedByIndices.find_first(); LUIdx != -1;
-             LUIdx = UsedByIndices.find_next(LUIdx))
+             LUIdx = UsedByIndices.find_next(LUIdx)) {
           // Make a memo of this use, offset, and register tuple.
-          if (UniqueItems.insert(std::make_pair(LUIdx, Imm)))
-            WorkItems.push_back(WorkItem(LUIdx, Imm, OrigReg));
+          WorkItems.insert(WorkItem(LUIdx, Imm, OrigReg));
+        }
       }
     }
   }
@@ -2694,7 +2737,6 @@
   Map.clear();
   Sequence.clear();
   UsedByIndicesMap.clear();
-  UniqueItems.clear();
 
   // Now iterate through the worklist and add new formulae.
   for (SmallVectorImpl::const_iterator I = WorkItems.begin(),
@@ -2991,8 +3033,12 @@
            E = LU.Formulae.end(); I != E; ++I) {
         const Formula &F = *I;
         if (F.AM.BaseOffs != 0 && F.AM.Scale == 0) {
-          if (LSRUse *LUThatHas = FindUseWithSimilarFormula(F, LU)) {
-            if (reconcileNewOffset(*LUThatHas, F.AM.BaseOffs,
+          int64_t NewBaseOffs;
+          if (LSRUse *LUThatHas = FindUseWithSimilarFormula(F, LU,
+                                                            NewBaseOffs)) {
+            if (reconcileNewOffset(*LUThatHas,
+                                   F.AM.BaseOffs + LU.MinOffset - NewBaseOffs,
+                                   F.AM.BaseOffs + LU.MaxOffset - NewBaseOffs,
                                    /*HasBaseReg=*/false,
                                    LU.Kind, LU.AccessTy)) {
               DEBUG(dbgs() << "  Deleting use "; LU.print(dbgs());
@@ -3000,6 +3046,30 @@
 
               LUThatHas->AllFixupsOutsideLoop &= LU.AllFixupsOutsideLoop;
 
+              // Update the relocs to reference the new use.
+              // Do this first so that MinOffset and MaxOffset are updated
+              // before we begin to determine which formulae to delete.
+              for (SmallVectorImpl::iterator I = Fixups.begin(),
+                   E = Fixups.end(); I != E; ++I) {
+                LSRFixup &Fixup = *I;
+                if (Fixup.LUIdx == LUIdx) {
+                  Fixup.LUIdx = LUThatHas - &Uses.front();
+                  Fixup.Offset += F.AM.BaseOffs - NewBaseOffs;
+                  DEBUG(dbgs() << "New fixup has offset "
+                               << Fixup.Offset << '\n');
+                  LUThatHas->Offsets.push_back(Fixup.Offset);
+                  if (Fixup.Offset > LUThatHas->MaxOffset)
+                    LUThatHas->MaxOffset = Fixup.Offset;
+                  if (Fixup.Offset < LUThatHas->MinOffset)
+                    LUThatHas->MinOffset = Fixup.Offset;
+                }
+                // DeleteUse will do a swap+pop_back, so if this fixup is
+                // now pointing to the last LSRUse, update it to point to the
+                // position it'll be swapped to.
+                if (Fixup.LUIdx == NumUses-1)
+                  Fixup.LUIdx = LUIdx;
+              }
+
               // Delete formulae from the new use which are no longer legal.
               bool Any = false;
               for (size_t i = 0, e = LUThatHas->Formulae.size(); i != e; ++i) {
@@ -3018,20 +3088,6 @@
               if (Any)
                 LUThatHas->RecomputeRegs(LUThatHas - &Uses.front(), RegUses);
 
-              // Update the relocs to reference the new use.
-              for (SmallVectorImpl::iterator I = Fixups.begin(),
-                   E = Fixups.end(); I != E; ++I) {
-                LSRFixup &Fixup = *I;
-                if (Fixup.LUIdx == LUIdx) {
-                  Fixup.LUIdx = LUThatHas - &Uses.front();
-                  Fixup.Offset += F.AM.BaseOffs;
-                  DEBUG(dbgs() << "New fixup has offset "
-                               << Fixup.Offset << '\n');
-                }
-                if (Fixup.LUIdx == NumUses-1)
-                  Fixup.LUIdx = LUIdx;
-              }
-
               // Delete the old use.
               DeleteUse(LU);
               --LUIdx;




From gohman at apple.com  Sun Aug 29 11:39:22 2010
From: gohman at apple.com (Dan Gohman)
Date: Sun, 29 Aug 2010 16:39:22 -0000
Subject: [llvm-commits] [llvm] r112441 -
	/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp
Message-ID: <20100829163922.397AE2A6C12C@llvm.org>

Author: djg
Date: Sun Aug 29 11:39:22 2010
New Revision: 112441

URL: http://llvm.org/viewvc/llvm-project?rev=112441&view=rev
Log:
Optionally rerun dedicated-register filtering after applying
other filtering techniques, as those may allow it to filter
out more obviously unprofitable candidates.

Modified:
    llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp?rev=112441&r1=112440&r2=112441&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Sun Aug 29 11:39:22 2010
@@ -1391,6 +1391,7 @@
   size_t EstimateSearchSpaceComplexity() const;
   void NarrowSearchSpaceByDetectingSupersets();
   void NarrowSearchSpaceByCollapsingUnrolledCode();
+  void NarrowSearchSpaceByRefilteringUndesirableDedicatedRegisters();
   void NarrowSearchSpaceByPickingWinnerRegs();
   void NarrowSearchSpaceUsingHeuristics();
 
@@ -3104,6 +3105,24 @@
   }
 }
 
+/// NarrowSearchSpaceByRefilteringUndesirableDedicatedRegisters - Call 
+/// FilterOutUndesirableDedicatedRegisters again, if necessary, now that
+/// we've done more filtering, as it may be able to find more formulae to
+/// eliminate.
+void LSRInstance::NarrowSearchSpaceByRefilteringUndesirableDedicatedRegisters(){
+  if (EstimateSearchSpaceComplexity() >= ComplexityLimit) {
+    DEBUG(dbgs() << "The search space is too complex.\n");
+
+    DEBUG(dbgs() << "Narrowing the search space by re-filtering out "
+                    "undesirable dedicated registers.\n");
+
+    FilterOutUndesirableDedicatedRegisters();
+
+    DEBUG(dbgs() << "After pre-selection:\n";
+          print_uses(dbgs()));
+  }
+}
+
 /// NarrowSearchSpaceByPickingWinnerRegs - Pick a register which seems likely
 /// to be profitable, and then in any use which has any reference to that
 /// register, delete all formulae which do not reference that register.
@@ -3176,6 +3195,7 @@
 void LSRInstance::NarrowSearchSpaceUsingHeuristics() {
   NarrowSearchSpaceByDetectingSupersets();
   NarrowSearchSpaceByCollapsingUnrolledCode();
+  NarrowSearchSpaceByRefilteringUndesirableDedicatedRegisters();
   NarrowSearchSpaceByPickingWinnerRegs();
 }
 




From gohman at apple.com  Sun Aug 29 11:40:03 2010
From: gohman at apple.com (Dan Gohman)
Date: Sun, 29 Aug 2010 16:40:03 -0000
Subject: [llvm-commits] [llvm] r112442 - in /llvm/trunk:
 include/llvm/Analysis/IVUsers.h lib/Analysis/IVUsers.cpp
 test/CodeGen/X86/lsr-reuse.ll
Message-ID: <20100829164003.B2B652A6C12C@llvm.org>

Author: djg
Date: Sun Aug 29 11:40:03 2010
New Revision: 112442

URL: http://llvm.org/viewvc/llvm-project?rev=112442&view=rev
Log:
Make IVUsers iterative instead of recursive.

This has the side effect of reversing the order of most of
IVUser's results.

Modified:
    llvm/trunk/include/llvm/Analysis/IVUsers.h
    llvm/trunk/lib/Analysis/IVUsers.cpp
    llvm/trunk/test/CodeGen/X86/lsr-reuse.ll

Modified: llvm/trunk/include/llvm/Analysis/IVUsers.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/IVUsers.h?rev=112442&r1=112441&r2=112442&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/IVUsers.h (original)
+++ llvm/trunk/include/llvm/Analysis/IVUsers.h Sun Aug 29 11:40:03 2010
@@ -27,6 +27,7 @@
 class IVUsers;
 class ScalarEvolution;
 class SCEV;
+class SCEVAddRecExpr;
 class IVUsers;
 
 /// IVStrideUse - Keep track of one use of a strided induction variable.
@@ -122,7 +123,7 @@
   LoopInfo *LI;
   DominatorTree *DT;
   ScalarEvolution *SE;
-  SmallPtrSet Processed;
+  SmallPtrSet Processed;
 
   /// IVUses - A list of all tracked IV uses of induction variable expressions
   /// we are interested in.
@@ -134,14 +135,16 @@
 
   virtual void releaseMemory();
 
+  const SCEVAddRecExpr *findInterestingAddRec(const SCEV *S) const;
+  bool isInterestingUser(const Instruction *User) const;
+
 public:
   static char ID; // Pass ID, replacement for typeid
   IVUsers();
 
-  /// AddUsersIfInteresting - Inspect the specified Instruction.  If it is a
-  /// reducible SCEV, recursively add its users to the IVUsesByStride set and
-  /// return true.  Otherwise, return false.
-  bool AddUsersIfInteresting(Instruction *I);
+  /// AddUsersIfInteresting - Inspect the def-use graph starting at the
+  /// specified Instruction and add IVUsers.
+  void AddUsersIfInteresting(Instruction *I);
 
   IVStrideUse &AddUser(Instruction *User, Value *Operand);
 

Modified: llvm/trunk/lib/Analysis/IVUsers.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/IVUsers.cpp?rev=112442&r1=112441&r2=112442&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/IVUsers.cpp (original)
+++ llvm/trunk/lib/Analysis/IVUsers.cpp Sun Aug 29 11:40:03 2010
@@ -35,112 +35,123 @@
   return new IVUsers();
 }
 
-/// isInteresting - Test whether the given expression is "interesting" when
-/// used by the given expression, within the context of analyzing the
-/// given loop.
-static bool isInteresting(const SCEV *S, const Instruction *I, const Loop *L,
-                          ScalarEvolution *SE) {
+/// findInterestingAddRec - Test whether the given expression is interesting.
+/// Return the addrec with the current loop which makes it interesting, or
+/// null if it is not interesting.
+const SCEVAddRecExpr *IVUsers::findInterestingAddRec(const SCEV *S) const {
   // An addrec is interesting if it's affine or if it has an interesting start.
   if (const SCEVAddRecExpr *AR = dyn_cast(S)) {
     // Keep things simple. Don't touch loop-variant strides.
     if (AR->getLoop() == L)
-      return AR->isAffine() || !L->contains(I);
-    // Otherwise recurse to see if the start value is interesting, and that
-    // the step value is not interesting, since we don't yet know how to
-    // do effective SCEV expansions for addrecs with interesting steps.
-    return isInteresting(AR->getStart(), I, L, SE) &&
-          !isInteresting(AR->getStepRecurrence(*SE), I, L, SE);
+      return AR;
+    // We don't yet know how to do effective SCEV expansions for addrecs
+    // with interesting steps.
+    if (findInterestingAddRec(AR->getStepRecurrence(*SE)))
+      return 0;
+    // Otherwise recurse to see if the start value is interesting.
+    return findInterestingAddRec(AR->getStart());
   }
 
   // An add is interesting if exactly one of its operands is interesting.
   if (const SCEVAddExpr *Add = dyn_cast(S)) {
-    bool AnyInterestingYet = false;
     for (SCEVAddExpr::op_iterator OI = Add->op_begin(), OE = Add->op_end();
          OI != OE; ++OI)
-      if (isInteresting(*OI, I, L, SE)) {
-        if (AnyInterestingYet)
-          return false;
-        AnyInterestingYet = true;
-      }
-    return AnyInterestingYet;
+      if (const SCEVAddRecExpr *AR = findInterestingAddRec(*OI))
+        return AR;
+    return 0;
   }
 
   // Nothing else is interesting here.
-  return false;
+  return 0;
 }
 
-/// AddUsersIfInteresting - Inspect the specified instruction.  If it is a
-/// reducible SCEV, recursively add its users to the IVUsesByStride set and
-/// return true.  Otherwise, return false.
-bool IVUsers::AddUsersIfInteresting(Instruction *I) {
-  if (!SE->isSCEVable(I->getType()))
-    return false;   // Void and FP expressions cannot be reduced.
+bool IVUsers::isInterestingUser(const Instruction *User) const {
+  // Void and FP expressions cannot be reduced.
+  if (!SE->isSCEVable(User->getType()))
+    return false;
 
   // LSR is not APInt clean, do not touch integers bigger than 64-bits.
-  if (SE->getTypeSizeInBits(I->getType()) > 64)
+  if (SE->getTypeSizeInBits(User->getType()) > 64)
     return false;
 
-  if (!Processed.insert(I))
-    return true;    // Instruction already handled.
+  // Don't descend into PHI nodes outside the current loop.
+  if (LI->getLoopFor(User->getParent()) != L &&
+      isa(User))
+    return false;
 
-  // Get the symbolic expression for this instruction.
-  const SCEV *ISE = SE->getSCEV(I);
+  // Otherwise, it may be interesting.
+  return true;
+}
 
-  // If we've come to an uninteresting expression, stop the traversal and
-  // call this a user.
-  if (!isInteresting(ISE, I, L, SE))
-    return false;
+/// AddUsersIfInteresting - Inspect the specified instruction.  If it is a
+/// reducible SCEV, recursively add its users to the IVUsesByStride set and
+/// return true.  Otherwise, return false.
+void IVUsers::AddUsersIfInteresting(Instruction *I) {
+  // Stop if we've seen this before.
+  if (!Processed.insert(I))
+    return;
 
-  SmallPtrSet UniqueUsers;
-  for (Value::use_iterator UI = I->use_begin(), E = I->use_end();
-       UI != E; ++UI) {
-    Instruction *User = cast(*UI);
-    if (!UniqueUsers.insert(User))
-      continue;
-
-    // Do not infinitely recurse on PHI nodes.
-    if (isa(User) && Processed.count(User))
-      continue;
-
-    // Descend recursively, but not into PHI nodes outside the current loop.
-    // It's important to see the entire expression outside the loop to get
-    // choices that depend on addressing mode use right, although we won't
-    // consider references outside the loop in all cases.
-    // If User is already in Processed, we don't want to recurse into it again,
-    // but do want to record a second reference in the same instruction.
-    bool AddUserToIVUsers = false;
-    if (LI->getLoopFor(User->getParent()) != L) {
-      if (isa(User) || Processed.count(User) ||
-          !AddUsersIfInteresting(User)) {
-        DEBUG(dbgs() << "FOUND USER in other loop: " << *User << '\n'
-                     << "   OF SCEV: " << *ISE << '\n');
-        AddUserToIVUsers = true;
+  // If this PHI node is not SCEVable, ignore it.
+  if (!SE->isSCEVable(I->getType()))
+    return;
+
+  // If this PHI node is not an addrec for this loop, ignore it.
+  const SCEVAddRecExpr *Expr = findInterestingAddRec(SE->getSCEV(I));
+  if (!Expr)
+    return;
+
+  // Walk the def-use graph.
+  SmallVector, 16> Worklist;
+  Worklist.push_back(std::make_pair(I, Expr));
+  do {
+    std::pair P =
+      Worklist.pop_back_val();
+    Instruction *Op = P.first;
+    const SCEVAddRecExpr *OpAR = P.second;
+
+    // Visit Op's users.
+    SmallPtrSet VisitedUsers;
+    for (Value::use_iterator UI = Op->use_begin(), E = Op->use_end();
+         UI != E; ++UI) {
+      // Don't visit any individual user more than once.
+      Instruction *User = cast(*UI);
+      if (!VisitedUsers.insert(User))
+        continue;
+
+      // If it's an affine addrec (which we can pretty safely re-expand) inside
+      // the loop, or a potentially non-affine addrec outside the loop (which
+      // we can evaluate outside of the loop), follow it.
+      if (OpAR->isAffine() || !L->contains(User)) {
+        if (isInterestingUser(User)) {
+          const SCEV *UserExpr = SE->getSCEV(User);
+
+          if (const SCEVAddRecExpr *AR = findInterestingAddRec(UserExpr)) {
+            // Interesting. Keep searching.
+            if (Processed.insert(User))
+              Worklist.push_back(std::make_pair(User, AR));
+            continue;
+          }
+        }
       }
-    } else if (Processed.count(User) ||
-               !AddUsersIfInteresting(User)) {
-      DEBUG(dbgs() << "FOUND USER: " << *User << '\n'
-                   << "   OF SCEV: " << *ISE << '\n');
-      AddUserToIVUsers = true;
-    }
 
-    if (AddUserToIVUsers) {
-      // Okay, we found a user that we cannot reduce.
-      IVUses.push_back(new IVStrideUse(this, User, I));
-      IVStrideUse &NewUse = IVUses.back();
-      // Transform the expression into a normalized form.
-      ISE = TransformForPostIncUse(NormalizeAutodetect,
-                                   ISE, User, I,
-                                   NewUse.PostIncLoops,
-                                   *SE, *DT);
-      DEBUG(dbgs() << "   NORMALIZED TO: " << *ISE << '\n');
+      // Otherwise, this is the point where the def-use chain
+      // becomes uninteresting. Call it an IV User.
+      AddUser(User, Op);
     }
-  }
-  return true;
+  } while (!Worklist.empty());
 }
 
 IVStrideUse &IVUsers::AddUser(Instruction *User, Value *Operand) {
   IVUses.push_back(new IVStrideUse(this, User, Operand));
-  return IVUses.back();
+  IVStrideUse &NewUse = IVUses.back();
+
+  // Auto-detect and remember post-inc loops for this expression.
+  const SCEV *S = SE->getSCEV(Operand);
+  (void)TransformForPostIncUse(NormalizeAutodetect,
+                               S, User, Operand,
+                               NewUse.PostIncLoops,
+                               *SE, *DT);
+  return NewUse;
 }
 
 IVUsers::IVUsers()
@@ -165,7 +176,7 @@
   // them by stride.  Start by finding all of the PHI nodes in the header for
   // this loop.  If they are induction variables, inspect their uses.
   for (BasicBlock::iterator I = L->getHeader()->begin(); isa(I); ++I)
-    (void)AddUsersIfInteresting(I);
+    AddUsersIfInteresting(I);
 
   return false;
 }

Modified: llvm/trunk/test/CodeGen/X86/lsr-reuse.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/lsr-reuse.ll?rev=112442&r1=112441&r2=112442&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/lsr-reuse.ll (original)
+++ llvm/trunk/test/CodeGen/X86/lsr-reuse.ll Sun Aug 29 11:40:03 2010
@@ -452,9 +452,9 @@
 ; CHECK-NEXT:   addss   %xmm{{.*}}, %xmm{{.*}}
 ; CHECK-NEXT:   mulss   (%r{{[^,]*}}), %xmm{{.*}}
 ; CHECK-NEXT:   movss   %xmm{{.*}}, (%r{{[^,]*}})
-; CHECK-NEXT:   addq    $4, %r{{.*}}
 ; CHECK-NEXT:   decq    %r{{.*}}
 ; CHECK-NEXT:   addq    $4, %r{{.*}}
+; CHECK-NEXT:   addq    $4, %r{{.*}}
 ; CHECK-NEXT:   movaps  %xmm{{.*}}, %xmm{{.*}}
 ; CHECK-NEXT: BB10_2:
 ; CHECK-NEXT:   testq   %r{{.*}}, %r{{.*}}




From sabre at nondot.org  Sun Aug 29 12:21:35 2010
From: sabre at nondot.org (Chris Lattner)
Date: Sun, 29 Aug 2010 17:21:35 -0000
Subject: [llvm-commits] [llvm] r112444 -
	/llvm/trunk/lib/Transforms/Scalar/LoopUnrollPass.cpp
Message-ID: <20100829172135.72FF62A6C12C@llvm.org>

Author: lattner
Date: Sun Aug 29 12:21:35 2010
New Revision: 112444

URL: http://llvm.org/viewvc/llvm-project?rev=112444&view=rev
Log:
now that loop passes don't use DomFrontier, there is no reason
for the unroller to pretend it supports updating it.  It still
has a horrible hack for DomTree.

Modified:
    llvm/trunk/lib/Transforms/Scalar/LoopUnrollPass.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/LoopUnrollPass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopUnrollPass.cpp?rev=112444&r1=112443&r2=112444&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LoopUnrollPass.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LoopUnrollPass.cpp Sun Aug 29 12:21:35 2010
@@ -62,13 +62,12 @@
       AU.addPreservedID(LoopSimplifyID);
       AU.addRequiredID(LCSSAID);
       AU.addPreservedID(LCSSAID);
+      AU.addPreserved();
       // FIXME: Loop unroll requires LCSSA. And LCSSA requires dom info.
       // If loop unroll does not preserve dom info then LCSSA pass on next
       // loop will receive invalid dom info.
       // For now, recreate dom info, if loop is unrolled.
       AU.addPreserved();
-      AU.addPreserved();
-      AU.addPreserved();
     }
   };
 }
@@ -148,12 +147,7 @@
     return false;
 
   // FIXME: Reconstruct dom info, because it is not preserved properly.
-  DominatorTree *DT = getAnalysisIfAvailable();
-  if (DT) {
+  if (DominatorTree *DT = getAnalysisIfAvailable())
     DT->runOnFunction(*F);
-    DominanceFrontier *DF = getAnalysisIfAvailable();
-    if (DF)
-      DF->runOnFunction(*F);
-  }
   return true;
 }




From sabre at nondot.org  Sun Aug 29 12:23:19 2010
From: sabre at nondot.org (Chris Lattner)
Date: Sun, 29 Aug 2010 17:23:19 -0000
Subject: [llvm-commits] [llvm] r112445 -
	/llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp
Message-ID: <20100829172319.6655C2A6C12C@llvm.org>

Author: lattner
Date: Sun Aug 29 12:23:19 2010
New Revision: 112445

URL: http://llvm.org/viewvc/llvm-project?rev=112445&view=rev
Log:
apparently unswitch had the same "Feature".  Stop its
claims that it preserves domfrontier if it doesn't really.

Modified:
    llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp?rev=112445&r1=112444&r2=112445&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp Sun Aug 29 12:23:19 2010
@@ -77,7 +77,6 @@
     bool redoLoop;
 
     Loop *currentLoop;
-    DominanceFrontier *DF;
     DominatorTree *DT;
     BasicBlock *loopHeader;
     BasicBlock *loopPreheader;
@@ -93,14 +92,14 @@
     static char ID; // Pass ID, replacement for typeid
     explicit LoopUnswitch(bool Os = false) : 
       LoopPass(ID), OptimizeForSize(Os), redoLoop(false), 
-      currentLoop(NULL), DF(NULL), DT(NULL), loopHeader(NULL),
+      currentLoop(NULL), DT(NULL), loopHeader(NULL),
       loopPreheader(NULL) {}
 
     bool runOnLoop(Loop *L, LPPassManager &LPM);
     bool processCurrentLoop();
 
     /// This transformation requires natural loop information & requires that
-    /// loop preheaders be inserted into the CFG...
+    /// loop preheaders be inserted into the CFG.
     ///
     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
       AU.addRequiredID(LoopSimplifyID);
@@ -110,7 +109,6 @@
       AU.addRequiredID(LCSSAID);
       AU.addPreservedID(LCSSAID);
       AU.addPreserved();
-      AU.addPreserved();
     }
 
   private:
@@ -201,7 +199,6 @@
 bool LoopUnswitch::runOnLoop(Loop *L, LPPassManager &LPM_Ref) {
   LI = &getAnalysis();
   LPM = &LPM_Ref;
-  DF = getAnalysisIfAvailable();
   DT = getAnalysisIfAvailable();
   currentLoop = L;
   Function *F = currentLoop->getHeader()->getParent();
@@ -216,8 +213,6 @@
     // FIXME: Reconstruct dom info, because it is not preserved properly.
     if (DT)
       DT->runOnFunction(*F);
-    if (DF)
-      DF->runOnFunction(*F);
   }
   return Changed;
 }




From sabre at nondot.org  Sun Aug 29 12:46:00 2010
From: sabre at nondot.org (Chris Lattner)
Date: Sun, 29 Aug 2010 17:46:00 -0000
Subject: [llvm-commits] [llvm] r112446 -
	/llvm/trunk/lib/Transforms/Scalar/LICM.cpp
Message-ID: <20100829174600.CBB7E2A6C12C@llvm.org>

Author: lattner
Date: Sun Aug 29 12:46:00 2010
New Revision: 112446

URL: http://llvm.org/viewvc/llvm-project?rev=112446&view=rev
Log:
rework the ownership of subloop alias information: instead of
keeping them around until the pass is destroyed, keep them
around a) just when useful (not for outer loops) and b) destroy
them right after we use them.  This should reduce memory use
and fixes potential bugs where a loop is deleted and another
loop gets allocated to the same address.

Modified:
    llvm/trunk/lib/Transforms/Scalar/LICM.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/LICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LICM.cpp?rev=112446&r1=112445&r2=112446&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LICM.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LICM.cpp Sun Aug 29 12:46:00 2010
@@ -84,27 +84,21 @@
     }
 
     bool doFinalization() {
-      // Free the values stored in the map
-      for (std::map::iterator
-             I = LoopToAliasMap.begin(), E = LoopToAliasMap.end(); I != E; ++I)
-        delete I->second;
-
-      LoopToAliasMap.clear();
+      assert(LoopToAliasSetMap.empty() && "Didn't free loop alias sets");
       return false;
     }
 
   private:
-    // Various analyses that we use...
     AliasAnalysis *AA;       // Current AliasAnalysis information
     LoopInfo      *LI;       // Current LoopInfo
     DominatorTree *DT;       // Dominator Tree for the current Loop.
 
-    // State that is updated as we process loops
+    // State that is updated as we process loops.
     bool Changed;            // Set to true when we change anything.
     BasicBlock *Preheader;   // The preheader block of the current loop...
     Loop *CurLoop;           // The current loop we are working on...
     AliasSetTracker *CurAST; // AliasSet information for the current loop...
-    std::map LoopToAliasMap;
+    DenseMap LoopToAliasSetMap;
 
     /// cloneBasicBlockAnalysis - Simple Analysis hook. Clone alias set info.
     void cloneBasicBlockAnalysis(BasicBlock *From, BasicBlock *To, Loop *L);
@@ -223,15 +217,20 @@
   DT = &getAnalysis();
 
   CurAST = new AliasSetTracker(*AA);
-  // Collect Alias info from subloops
+  // Collect Alias info from subloops.
   for (Loop::iterator LoopItr = L->begin(), LoopItrE = L->end();
        LoopItr != LoopItrE; ++LoopItr) {
     Loop *InnerL = *LoopItr;
-    AliasSetTracker *InnerAST = LoopToAliasMap[InnerL];
-    assert (InnerAST && "Where is my AST?");
+    AliasSetTracker *InnerAST = LoopToAliasSetMap[InnerL];
+    assert(InnerAST && "Where is my AST?");
 
     // What if InnerLoop was modified by other passes ?
     CurAST->add(*InnerAST);
+    
+    // Once we've incorporated the inner loop's AST into ours, we don't need the
+    // subloop's anymore.
+    delete InnerAST;
+    LoopToAliasSetMap.erase(InnerL);
   }
   
   CurLoop = L;
@@ -246,7 +245,7 @@
   for (Loop::block_iterator I = L->block_begin(), E = L->block_end();
        I != E; ++I) {
     BasicBlock *BB = *I;
-    if (LI->getLoopFor(BB) == L)        // Ignore blocks in subloops...
+    if (LI->getLoopFor(BB) == L)        // Ignore blocks in subloops.
       CurAST->add(*BB);                 // Incorporate the specified basic block
   }
 
@@ -278,7 +277,12 @@
   CurLoop = 0;
   Preheader = 0;
 
-  LoopToAliasMap[L] = CurAST;
+  // If this loop is nested inside of another one, save the alias information
+  // for when we process the outer loop.
+  if (L->getParentLoop())
+    LoopToAliasSetMap[L] = CurAST;
+  else
+    delete CurAST;
   return Changed;
 }
 
@@ -473,6 +477,11 @@
       I.removeFromParent();
       BasicBlock::iterator InsertPt = ExitBlocks[0]->getFirstNonPHI();
       ExitBlocks[0]->getInstList().insert(InsertPt, &I);
+
+      // This instruction is no longer in the AST for the current loop, because
+      // we just sunk it out of the loop.  If we just sunk it into an outer
+      // loop, we will rediscover the operation when we process it.
+      CurAST->deleteValue(&I);
     }
     return;
   }
@@ -842,7 +851,7 @@
 
 /// cloneBasicBlockAnalysis - Simple Analysis hook. Clone alias set info.
 void LICM::cloneBasicBlockAnalysis(BasicBlock *From, BasicBlock *To, Loop *L) {
-  AliasSetTracker *AST = LoopToAliasMap[L];
+  AliasSetTracker *AST = LoopToAliasSetMap.lookup(L);
   if (!AST)
     return;
 
@@ -852,7 +861,7 @@
 /// deleteAnalysisValue - Simple Analysis hook. Delete value V from alias
 /// set.
 void LICM::deleteAnalysisValue(Value *V, Loop *L) {
-  AliasSetTracker *AST = LoopToAliasMap[L];
+  AliasSetTracker *AST = LoopToAliasSetMap.lookup(L);
   if (!AST)
     return;
 




From sabre at nondot.org  Sun Aug 29 13:00:00 2010
From: sabre at nondot.org (Chris Lattner)
Date: Sun, 29 Aug 2010 18:00:00 -0000
Subject: [llvm-commits] [llvm] r112447 -
	/llvm/trunk/lib/Transforms/Scalar/LICM.cpp
Message-ID: <20100829180000.71DD72A6C12C@llvm.org>

Author: lattner
Date: Sun Aug 29 13:00:00 2010
New Revision: 112447

URL: http://llvm.org/viewvc/llvm-project?rev=112447&view=rev
Log:
fix some bugs (found by inspection) where LICM would not update
LICM correctly.  When sinking an instruction, it should not add
entries for the sunk instruction to the AST, it should remove
the entry for the sunk instruction.  The blocks being sunk to
are not in the loop, so their instructions shouldn't be in the
AST (yet)!

Modified:
    llvm/trunk/lib/Transforms/Scalar/LICM.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/LICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LICM.cpp?rev=112447&r1=112446&r2=112447&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LICM.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LICM.cpp Sun Aug 29 13:00:00 2010
@@ -530,7 +530,6 @@
       New = &I;
     } else {
       New = I.clone();
-      CurAST->copyValue(&I, New);
       if (!I.getName().empty())
         New->setName(I.getName()+".le");
       ExitBlock->getInstList().insert(InsertPt, New);
@@ -563,6 +562,9 @@
   if (I.getType()->isPointerTy())
     for (unsigned i = 0, e = NewPHIs.size(); i != e; ++i)
       CurAST->copyValue(NewPHIs[i], &I);
+  
+  // Finally, remove the instruction from CurAST.  It is no longer in the loop.
+  CurAST->deleteValue(&I);
 }
 
 /// hoist - When an instruction is found to only use loop invariant operands




From sabre at nondot.org  Sun Aug 29 13:03:33 2010
From: sabre at nondot.org (Chris Lattner)
Date: Sun, 29 Aug 2010 18:03:33 -0000
Subject: [llvm-commits] [llvm] r112448 -
	/llvm/trunk/lib/Transforms/Scalar/LICM.cpp
Message-ID: <20100829180333.BB8D62A6C12C@llvm.org>

Author: lattner
Date: Sun Aug 29 13:03:33 2010
New Revision: 112448

URL: http://llvm.org/viewvc/llvm-project?rev=112448&view=rev
Log:
optimize LICM::hoist to use moveBefore.  Correct its updating
of AST to remove the hoisted instruction from the AST, since it
is no longer in the loop.

Modified:
    llvm/trunk/lib/Transforms/Scalar/LICM.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/LICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LICM.cpp?rev=112448&r1=112447&r2=112448&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LICM.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LICM.cpp Sun Aug 29 13:03:33 2010
@@ -574,12 +574,11 @@
   DEBUG(dbgs() << "LICM hoisting to " << Preheader->getName() << ": "
         << I << "\n");
 
-  // Remove the instruction from its current basic block... but don't delete the
-  // instruction.
-  I.removeFromParent();
-
-  // Insert the new node in Preheader, before the terminator.
-  Preheader->getInstList().insert(Preheader->getTerminator(), &I);
+  // The instruction is no longer in this loop.
+  CurAST->deleteValue(&I);
+  
+  // Move the new node to the Preheader, before its terminator.
+  I.moveBefore(Preheader->getTerminator());
 
   if (isa(I)) ++NumMovedLoads;
   else if (isa(I)) ++NumMovedCalls;




From sabre at nondot.org  Sun Aug 29 13:11:16 2010
From: sabre at nondot.org (Chris Lattner)
Date: Sun, 29 Aug 2010 18:11:16 -0000
Subject: [llvm-commits] [llvm] r112449 -
	/llvm/trunk/lib/Transforms/Scalar/LICM.cpp
Message-ID: <20100829181116.A46FA2A6C12C@llvm.org>

Author: lattner
Date: Sun Aug 29 13:11:16 2010
New Revision: 112449

URL: http://llvm.org/viewvc/llvm-project?rev=112449&view=rev
Log:
revert 112448 for now.

Modified:
    llvm/trunk/lib/Transforms/Scalar/LICM.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/LICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LICM.cpp?rev=112449&r1=112448&r2=112449&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LICM.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LICM.cpp Sun Aug 29 13:11:16 2010
@@ -574,11 +574,12 @@
   DEBUG(dbgs() << "LICM hoisting to " << Preheader->getName() << ": "
         << I << "\n");
 
-  // The instruction is no longer in this loop.
-  CurAST->deleteValue(&I);
-  
-  // Move the new node to the Preheader, before its terminator.
-  I.moveBefore(Preheader->getTerminator());
+  // Remove the instruction from its current basic block... but don't delete the
+  // instruction.
+  I.removeFromParent();
+
+  // Insert the new node in Preheader, before the terminator.
+  Preheader->getInstList().insert(Preheader->getTerminator(), &I);
 
   if (isa(I)) ++NumMovedLoads;
   else if (isa(I)) ++NumMovedCalls;




From sabre at nondot.org  Sun Aug 29 13:18:40 2010
From: sabre at nondot.org (Chris Lattner)
Date: Sun, 29 Aug 2010 18:18:40 -0000
Subject: [llvm-commits] [llvm] r112450 -
	/llvm/trunk/lib/Transforms/Scalar/LICM.cpp
Message-ID: <20100829181840.6CA0F2A6C12C@llvm.org>

Author: lattner
Date: Sun Aug 29 13:18:40 2010
New Revision: 112450

URL: http://llvm.org/viewvc/llvm-project?rev=112450&view=rev
Log:
use moveBefore instead of remove+insert, it avoids some 
symtab manipulation, so its faster (in addition to being
more elegant)

Modified:
    llvm/trunk/lib/Transforms/Scalar/LICM.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/LICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LICM.cpp?rev=112450&r1=112449&r2=112450&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LICM.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LICM.cpp Sun Aug 29 13:18:40 2010
@@ -474,9 +474,7 @@
     } else {
       // Move the instruction to the start of the exit block, after any PHI
       // nodes in it.
-      I.removeFromParent();
-      BasicBlock::iterator InsertPt = ExitBlocks[0]->getFirstNonPHI();
-      ExitBlocks[0]->getInstList().insert(InsertPt, &I);
+      I.moveBefore(ExitBlocks[0]->getFirstNonPHI());
 
       // This instruction is no longer in the AST for the current loop, because
       // we just sunk it out of the loop.  If we just sunk it into an outer
@@ -574,12 +572,8 @@
   DEBUG(dbgs() << "LICM hoisting to " << Preheader->getName() << ": "
         << I << "\n");
 
-  // Remove the instruction from its current basic block... but don't delete the
-  // instruction.
-  I.removeFromParent();
-
-  // Insert the new node in Preheader, before the terminator.
-  Preheader->getInstList().insert(Preheader->getTerminator(), &I);
+  // Move the new node to the Preheader, before its terminator.
+  I.moveBefore(Preheader->getTerminator());
 
   if (isa(I)) ++NumMovedLoads;
   else if (isa(I)) ++NumMovedCalls;




From sabre at nondot.org  Sun Aug 29 13:22:25 2010
From: sabre at nondot.org (Chris Lattner)
Date: Sun, 29 Aug 2010 18:22:25 -0000
Subject: [llvm-commits] [llvm] r112451 - in /llvm/trunk:
 lib/Transforms/Scalar/LICM.cpp test/Transforms/LICM/sinking.ll
Message-ID: <20100829182225.4D8812A6C12C@llvm.org>

Author: lattner
Date: Sun Aug 29 13:22:25 2010
New Revision: 112451

URL: http://llvm.org/viewvc/llvm-project?rev=112451&view=rev
Log:
LICM does get dead instructions input to it. Instead of sinking them
out of loops, just delete them.

Modified:
    llvm/trunk/lib/Transforms/Scalar/LICM.cpp
    llvm/trunk/test/Transforms/LICM/sinking.ll

Modified: llvm/trunk/lib/Transforms/Scalar/LICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LICM.cpp?rev=112451&r1=112450&r2=112451&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LICM.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LICM.cpp Sun Aug 29 13:22:25 2010
@@ -43,6 +43,7 @@
 #include "llvm/Analysis/AliasSetTracker.h"
 #include "llvm/Analysis/Dominators.h"
 #include "llvm/Analysis/ScalarEvolution.h"
+#include "llvm/Transforms/Utils/Local.h"
 #include "llvm/Transforms/Utils/SSAUpdater.h"
 #include "llvm/Support/CFG.h"
 #include "llvm/Support/CommandLine.h"
@@ -299,7 +300,7 @@
   // If this subregion is not in the top level loop at all, exit.
   if (!CurLoop->contains(BB)) return;
 
-  // We are processing blocks in reverse dfo, so process children first...
+  // We are processing blocks in reverse dfo, so process children first.
   const std::vector &Children = N->getChildren();
   for (unsigned i = 0, e = Children.size(); i != e; ++i)
     SinkRegion(Children[i]);
@@ -310,6 +311,16 @@
 
   for (BasicBlock::iterator II = BB->end(); II != BB->begin(); ) {
     Instruction &I = *--II;
+    
+    // If the instruction is dead, we would try to sink it because it isn't used
+    // in the loop, instead, just delete it.
+    if (isInstructionTriviallyDead(&I)) {
+      ++II;
+      CurAST->deleteValue(&I);
+      I.eraseFromParent();
+      Changed = true;
+      continue;
+    }
 
     // Check to see if we can sink this instruction to the exit blocks
     // of the loop.  We can do this if the all users of the instruction are

Modified: llvm/trunk/test/Transforms/LICM/sinking.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LICM/sinking.ll?rev=112451&r1=112450&r2=112451&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/LICM/sinking.ll (original)
+++ llvm/trunk/test/Transforms/LICM/sinking.ll Sun Aug 29 13:22:25 2010
@@ -233,3 +233,17 @@
 ; CHECK-NEXT:  ret i32 %tmp.6
 }
 
+; Should delete, not sink, dead instructions.
+define void @test11() {
+	br label %Loop
+Loop:
+	%dead = getelementptr %Ty* @X2, i64 0, i32 0
+	br i1 false, label %Loop, label %Out
+Out:
+	ret void
+; CHECK: @test11
+; CHECK:     Out:
+; CHECK-NEXT:  ret void
+}
+
+




From sabre at nondot.org  Sun Aug 29 13:42:23 2010
From: sabre at nondot.org (Chris Lattner)
Date: Sun, 29 Aug 2010 18:42:23 -0000
Subject: [llvm-commits] [llvm] r112452 - in /llvm/trunk:
 include/llvm/Analysis/AliasSetTracker.h lib/Analysis/AliasSetTracker.cpp
 lib/Transforms/Scalar/LICM.cpp
Message-ID: <20100829184223.548782A6C12C@llvm.org>

Author: lattner
Date: Sun Aug 29 13:42:23 2010
New Revision: 112452

URL: http://llvm.org/viewvc/llvm-project?rev=112452&view=rev
Log:
two changes: 1) make AliasSet hold the list of call sites with an
assertingvh so we get a violent explosion if the pointer dangles.

2) Fix AliasSetTracker::deleteValue to remove call sites with
   by-pointer comparisons instead of by-alias queries.  Using
   findAliasSetForCallSite can cause alias sets to get merged
   when they shouldn't, and can also miss alias sets when the
   call is readonly.

#2 fixes PR6889, which only repros with a .c file :(

Modified:
    llvm/trunk/include/llvm/Analysis/AliasSetTracker.h
    llvm/trunk/lib/Analysis/AliasSetTracker.cpp
    llvm/trunk/lib/Transforms/Scalar/LICM.cpp

Modified: llvm/trunk/include/llvm/Analysis/AliasSetTracker.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/AliasSetTracker.h?rev=112452&r1=112451&r2=112452&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/AliasSetTracker.h (original)
+++ llvm/trunk/include/llvm/Analysis/AliasSetTracker.h Sun Aug 29 13:42:23 2010
@@ -92,7 +92,8 @@
   AliasSet *Forward;             // Forwarding pointer.
   AliasSet *Next, *Prev;         // Doubly linked list of AliasSets.
 
-  std::vector CallSites; // All calls & invokes in this alias set.
+  // All calls & invokes in this alias set.
+  std::vector > CallSites;
 
   // RefCount - Number of nodes pointing to this AliasSet plus the number of
   // AliasSets forwarding to it.
@@ -127,6 +128,11 @@
       removeFromTracker(AST);
   }
 
+  CallSite getCallSite(unsigned i) const {
+    assert(i < CallSites.size());
+    return CallSite(CallSites[i]);
+  }
+  
 public:
   /// Accessors...
   bool isRef() const { return AccessTy & Refs; }
@@ -229,7 +235,7 @@
   void addCallSite(CallSite CS, AliasAnalysis &AA);
   void removeCallSite(CallSite CS) {
     for (size_t i = 0, e = CallSites.size(); i != e; ++i)
-      if (CallSites[i].getInstruction() == CS.getInstruction()) {
+      if (CallSites[i] == CS.getInstruction()) {
         CallSites[i] = CallSites.back();
         CallSites.pop_back();
       }

Modified: llvm/trunk/lib/Analysis/AliasSetTracker.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/AliasSetTracker.cpp?rev=112452&r1=112451&r2=112452&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/AliasSetTracker.cpp (original)
+++ llvm/trunk/lib/Analysis/AliasSetTracker.cpp Sun Aug 29 13:42:23 2010
@@ -116,7 +116,7 @@
 }
 
 void AliasSet::addCallSite(CallSite CS, AliasAnalysis &AA) {
-  CallSites.push_back(CS);
+  CallSites.push_back(CS.getInstruction());
 
   AliasAnalysis::ModRefBehavior Behavior = AA.getModRefBehavior(CS);
   if (Behavior == AliasAnalysis::DoesNotAccessMemory)
@@ -167,10 +167,11 @@
   if (AA.doesNotAccessMemory(CS))
     return false;
 
-  for (unsigned i = 0, e = CallSites.size(); i != e; ++i)
-    if (AA.getModRefInfo(CallSites[i], CS) != AliasAnalysis::NoModRef ||
-        AA.getModRefInfo(CS, CallSites[i]) != AliasAnalysis::NoModRef)
+  for (unsigned i = 0, e = CallSites.size(); i != e; ++i) {
+    if (AA.getModRefInfo(getCallSite(i), CS) != AliasAnalysis::NoModRef ||
+        AA.getModRefInfo(CS, getCallSite(i)) != AliasAnalysis::NoModRef)
       return true;
+  }
 
   for (iterator I = begin(), E = end(); I != E; ++I)
     if (AA.getModRefInfo(CS, I.getPointer(), I.getSize()) !=
@@ -231,11 +232,10 @@
     if (I->Forward || !I->aliasesCallSite(CS, AA))
       continue;
     
-    if (FoundSet == 0) {  // If this is the first alias set ptr can go into.
-      FoundSet = I;       // Remember it.
-    } else if (!I->Forward) {     // Otherwise, we must merge the sets.
+    if (FoundSet == 0)        // If this is the first alias set ptr can go into.
+      FoundSet = I;           // Remember it.
+    else if (!I->Forward)     // Otherwise, we must merge the sets.
       FoundSet->mergeSetIn(*I, *this);     // Merge in contents.
-    }
   }
   return FoundSet;
 }
@@ -458,11 +458,17 @@
   AA.deleteValue(PtrVal);
 
   // If this is a call instruction, remove the callsite from the appropriate
-  // AliasSet.
-  if (CallSite CS = PtrVal)
-    if (!AA.doesNotAccessMemory(CS))
-      if (AliasSet *AS = findAliasSetForCallSite(CS))
-        AS->removeCallSite(CS);
+  // AliasSet (if present).
+  if (CallSite CS = PtrVal) {
+    if (!AA.doesNotAccessMemory(CS)) {
+      // Scan all the alias sets to see if this call site is contained.
+      for (iterator I = begin(), E = end(); I != E; ++I) {
+        if (I->Forward) continue;
+        
+        I->removeCallSite(CS);
+      }
+    }
+  }
 
   // First, look up the PointerRec for this pointer.
   PointerMapType::iterator I = PointerMap.find(PtrVal);
@@ -538,7 +544,7 @@
     OS << "\n    " << CallSites.size() << " Call Sites: ";
     for (unsigned i = 0, e = CallSites.size(); i != e; ++i) {
       if (i) OS << ", ";
-      WriteAsOperand(OS, CallSites[i].getCalledValue());
+      WriteAsOperand(OS, CallSites[i]);
     }
   }
   OS << "\n";

Modified: llvm/trunk/lib/Transforms/Scalar/LICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LICM.cpp?rev=112452&r1=112451&r2=112452&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LICM.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LICM.cpp Sun Aug 29 13:42:23 2010
@@ -315,6 +315,7 @@
     // If the instruction is dead, we would try to sink it because it isn't used
     // in the loop, instead, just delete it.
     if (isInstructionTriviallyDead(&I)) {
+      DEBUG(dbgs() << "LICM deleting dead inst: " << I << '\n');
       ++II;
       CurAST->deleteValue(&I);
       I.eraseFromParent();




From sabre at nondot.org  Sun Aug 29 14:28:28 2010
From: sabre at nondot.org (Chris Lattner)
Date: Sun, 29 Aug 2010 19:28:28 -0000
Subject: [llvm-commits] [llvm] r112455 -
	/llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp
Message-ID: <20100829192828.8D5842A6C12C@llvm.org>

Author: lattner
Date: Sun Aug 29 14:28:28 2010
New Revision: 112455

URL: http://llvm.org/viewvc/llvm-project?rev=112455&view=rev
Log:
inline function into its only caller.

Modified:
    llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp

Modified: llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp?rev=112455&r1=112454&r2=112455&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp (original)
+++ llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp Sun Aug 29 14:28:28 2010
@@ -112,26 +112,19 @@
     bool FindSelectorAndURoR(Instruction *Inst, bool &URoRInvoke,
                              SmallPtrSet &SelCalls);
       
-    /// DoMem2RegPromotion - Take an alloca call and promote it from memory to a
-    /// register.
-    bool DoMem2RegPromotion(Value *V) {
-      AllocaInst *AI = dyn_cast(V);
+    /// PromoteStoreInst - Perform Mem2Reg on a StoreInst.
+    bool PromoteStoreInst(StoreInst *SI) {
+      if (!SI || !DT || !DF) return false;
+      
+      AllocaInst *AI = dyn_cast(SI->getOperand(1));
       if (!AI || !isAllocaPromotable(AI)) return false;
-
+      
       // Turn the alloca into a register.
       std::vector Allocas(1, AI);
       PromoteMemToReg(Allocas, *DT, *DF);
       return true;
     }
 
-    /// PromoteStoreInst - Perform Mem2Reg on a StoreInst.
-    bool PromoteStoreInst(StoreInst *SI) {
-      if (!SI || !DT || !DF) return false;
-      if (DoMem2RegPromotion(SI->getOperand(1)))
-        return true;
-      return false;
-    }
-
     /// PromoteEHPtrStore - Promote the storing of an EH pointer into a
     /// register. This should get rid of the store and subsequent loads.
     bool PromoteEHPtrStore(IntrinsicInst *II) {




From sabre at nondot.org  Sun Aug 29 14:54:28 2010
From: sabre at nondot.org (Chris Lattner)
Date: Sun, 29 Aug 2010 19:54:28 -0000
Subject: [llvm-commits] [llvm] r112457 - in /llvm/trunk/lib:
 CodeGen/DwarfEHPrepare.cpp Transforms/Scalar/LICM.cpp
Message-ID: <20100829195428.801992A6C12C@llvm.org>

Author: lattner
Date: Sun Aug 29 14:54:28 2010
New Revision: 112457

URL: http://llvm.org/viewvc/llvm-project?rev=112457&view=rev
Log:
rewrite DwarfEHPrepare to use SSAUpdater to promote its allocas
instead of PromoteMemToReg.  This allows it to stop using DF and DT,
eliminating a computation of DT and DF from clang -O3.  Clang is now
down to 2 runs of DomFrontier.

Modified:
    llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp
    llvm/trunk/lib/Transforms/Scalar/LICM.cpp

Modified: llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp?rev=112457&r1=112456&r2=112457&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp (original)
+++ llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp Sun Aug 29 14:54:28 2010
@@ -26,6 +26,7 @@
 #include "llvm/Target/TargetLowering.h"
 #include "llvm/Transforms/Utils/BasicBlockUtils.h"
 #include "llvm/Transforms/Utils/PromoteMemToReg.h"
+#include "llvm/Transforms/Utils/SSAUpdater.h"
 using namespace llvm;
 
 STATISTIC(NumLandingPadsSplit,     "Number of landing pads split");
@@ -33,6 +34,8 @@
 STATISTIC(NumExceptionValuesMoved, "Number of eh.exception calls moved");
 STATISTIC(NumStackTempsIntroduced, "Number of stack temporaries introduced");
 
+static void PromoteAlloca(AllocaInst *AI);
+
 namespace {
   class DwarfEHPrepare : public FunctionPass {
     const TargetMachine *TM;
@@ -56,7 +59,6 @@
 
     // Dominator info is used when turning stack temporaries into registers.
     DominatorTree *DT;
-    DominanceFrontier *DF;
 
     // The function we are running on.
     Function *F;
@@ -114,21 +116,17 @@
       
     /// PromoteStoreInst - Perform Mem2Reg on a StoreInst.
     bool PromoteStoreInst(StoreInst *SI) {
-      if (!SI || !DT || !DF) return false;
-      
       AllocaInst *AI = dyn_cast(SI->getOperand(1));
       if (!AI || !isAllocaPromotable(AI)) return false;
       
-      // Turn the alloca into a register.
-      std::vector Allocas(1, AI);
-      PromoteMemToReg(Allocas, *DT, *DF);
+      PromoteAlloca(AI);
       return true;
     }
 
     /// PromoteEHPtrStore - Promote the storing of an EH pointer into a
     /// register. This should get rid of the store and subsequent loads.
     bool PromoteEHPtrStore(IntrinsicInst *II) {
-      if (!DT || !DF) return false;
+      if (!CompileFast) return false;
 
       bool Changed = false;
       StoreInst *SI;
@@ -141,7 +139,7 @@
           if (SI) break;
         }
 
-        if (!PromoteStoreInst(SI))
+        if (SI && !PromoteStoreInst(SI))
           break;
 
         Changed = true;
@@ -160,14 +158,8 @@
 
     virtual bool runOnFunction(Function &Fn);
 
-    // getAnalysisUsage - We need dominance frontiers for memory promotion.
     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
-      if (!CompileFast)
-        AU.addRequired();
       AU.addPreserved();
-      if (!CompileFast)
-        AU.addRequired();
-      AU.addPreserved();
     }
 
     const char *getPassName() const {
@@ -183,6 +175,128 @@
   return new DwarfEHPrepare(tm, fast);
 }
 
+/// PromoteAlloca - This promotes an alloca to registers when we know that it
+/// only has non-volatile loads and stores to it.
+static void PromoteAlloca(AllocaInst *AI) {
+  assert(isAllocaPromotable(AI));
+  
+  // First step: bucket up uses of the pointers by the block they occur in.
+  // This is important because we have to handle multiple defs/uses in a block
+  // ourselves: SSAUpdater is purely for cross-block references.
+  // FIXME: Want a TinyVector since there is usually 0/1 element.
+  DenseMap > UsesByBlock;
+  for (Value::use_iterator UI = AI->use_begin(), E = AI->use_end();
+       UI != E; ++UI) {
+    Instruction *User = cast(*UI);
+    UsesByBlock[User->getParent()].push_back(User);
+  }
+  
+  SSAUpdater SSA;
+  
+  // It wants to know some value of the same type as what we'll be inserting.
+  Value *SomeValue;
+  if (isa(*AI->use_begin()))
+    SomeValue = *AI->use_begin();
+  else
+    SomeValue = cast(*AI->use_begin())->getOperand(0);
+  SSA.Initialize(SomeValue);
+   
+  // Okay, now we can iterate over all the blocks in the loop with uses,
+  // processing them.  Keep track of which loads are loading a live-in value.
+  SmallVector LiveInLoads;
+  
+  for (Value::use_iterator UI = AI->use_begin(), E = AI->use_end();
+       UI != E; ++UI) {
+    Instruction *User = cast(*UI);
+    std::vector &BlockUses = UsesByBlock[User->getParent()];
+    
+    // If this block has already been processed, ignore this repeat use.
+    if (BlockUses.empty()) continue;
+    
+    // Okay, this is the first use in the block.  If this block just has a
+    // single user in it, we can rewrite it trivially.
+    if (BlockUses.size() == 1) {
+      // If it is a store, it is a trivial def of the value in the block.
+      if (isa(User)) {
+        SSA.AddAvailableValue(User->getParent(),
+                              cast(User)->getOperand(0));
+      } else {
+        // Otherwise it is a load, queue it to rewrite as a live-in load.
+        LiveInLoads.push_back(cast(User));
+      }
+      BlockUses.clear();
+      continue;
+    }
+    
+    // Otherwise, check to see if this block is all loads.  If so, we can queue
+    // them all as live in loads.
+    bool HasStore = false;
+    for (unsigned i = 0, e = BlockUses.size(); i != e; ++i) {
+      if (isa(BlockUses[i])) {
+        HasStore = true;
+        break;
+      }
+    }
+    
+    if (!HasStore) {
+      for (unsigned i = 0, e = BlockUses.size(); i != e; ++i)
+        LiveInLoads.push_back(cast(BlockUses[i]));
+      BlockUses.clear();
+      continue;
+    }
+    
+    // Otherwise, we have mixed loads and stores (or just a bunch of stores).
+    // Since SSAUpdater is purely for cross-block values, we need to determine
+    // the order of these instructions in the block.  If the first use in the
+    // block is a load, then it uses the live in value.  The last store defines
+    // the live out value.  We handle this by doing a linear scan of the block.
+    BasicBlock *BB = User->getParent();
+    Value *StoredValue = 0;
+    for (BasicBlock::iterator II = BB->begin(), E = BB->end(); II != E; ++II) {
+      if (LoadInst *L = dyn_cast(II)) {
+        // If this is a load to an unrelated pointer, ignore it.
+        if (L->getOperand(0) != AI) continue;
+        
+        // If we haven't seen a store yet, this is a live in use, otherwise
+        // use the stored value.
+        if (StoredValue)
+          L->replaceAllUsesWith(StoredValue);
+        else
+          LiveInLoads.push_back(L);
+        continue;
+      }
+      
+      if (StoreInst *S = dyn_cast(II)) {
+        // If this is a store to an unrelated pointer, ignore it.
+        if (S->getOperand(1) != AI) continue;
+        
+        // Remember that this is the active value in the block.
+        StoredValue = S->getOperand(0);
+      }
+    }
+    
+    // The last stored value that happened is the live-out for the block.
+    assert(StoredValue && "Already checked that there is a store in block");
+    SSA.AddAvailableValue(BB, StoredValue);
+    BlockUses.clear();
+  }
+  
+  // Okay, now we rewrite all loads that use live-in values in the loop,
+  // inserting PHI nodes as necessary.
+  for (unsigned i = 0, e = LiveInLoads.size(); i != e; ++i) {
+    LoadInst *ALoad = LiveInLoads[i];
+    ALoad->replaceAllUsesWith(SSA.GetValueInMiddleOfBlock(ALoad->getParent()));
+  }
+  
+  // Now that everything is rewritten, delete the old instructions from the body
+  // of the loop.  They should all be dead now.
+  for (Value::use_iterator UI = AI->use_begin(), E = AI->use_end();
+       UI != E; ++UI)
+    cast(*UI)->eraseFromParent();
+}
+
+
+
 /// HasCatchAllInSelector - Return true if the intrinsic instruction has a
 /// catch-all.
 bool DwarfEHPrepare::HasCatchAllInSelector(IntrinsicInst *II) {
@@ -525,11 +639,9 @@
     // Add a fallthrough from NewBB to the original landing pad.
     BranchInst::Create(LPad, NewBB);
 
-    // Now update DominatorTree and DominanceFrontier analysis information.
+    // Now update DominatorTree analysis information if it is around.
     if (DT)
       DT->splitBlock(NewBB);
-    if (DF)
-      DF->splitBlock(NewBB);
 
     // Remember the newly constructed landing pad.  The original landing pad
     // LPad is no longer a landing pad now that all unwind edges have been
@@ -655,10 +767,9 @@
 /// PromoteStackTemporaries - Turn any stack temporaries we introduced into
 /// registers if possible.
 bool DwarfEHPrepare::PromoteStackTemporaries() {
-  if (ExceptionValueVar && DT && DF && isAllocaPromotable(ExceptionValueVar)) {
-    // Turn the exception temporary into registers and phi nodes if possible.
-    std::vector Allocas(1, ExceptionValueVar);
-    PromoteMemToReg(Allocas, *DT, *DF);
+  // Turn the exception temporary into registers and phi nodes if possible.
+  if (ExceptionValueVar && isAllocaPromotable(ExceptionValueVar)) {
+    PromoteAlloca(ExceptionValueVar);
     return true;
   }
   return false;
@@ -712,7 +823,6 @@
 
   // Initialize internal state.
   DT = getAnalysisIfAvailable();
-  DF = getAnalysisIfAvailable();
   ExceptionValueVar = 0;
   F = &Fn;
 
@@ -731,7 +841,7 @@
   // Initialize any stack temporaries we introduced.
   Changed |= FinishStackTemporaries();
 
-  // Turn any stack temporaries into registers if possible.
+  // Turn any stack temporaries into registers.
   if (!CompileFast)
     Changed |= PromoteStackTemporaries();
 

Modified: llvm/trunk/lib/Transforms/Scalar/LICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LICM.cpp?rev=112457&r1=112456&r2=112457&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LICM.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LICM.cpp Sun Aug 29 14:54:28 2010
@@ -793,7 +793,7 @@
       }
       
       if (StoreInst *S = dyn_cast(II)) {
-        // If this is a load to an unrelated pointer, ignore it.
+        // If this is a store to an unrelated pointer, ignore it.
         if (!PointerMustAliases.count(S->getOperand(1))) continue;
 
         // Remember that this is the active value in the block.




From clattner at apple.com  Sun Aug 29 14:56:47 2010
From: clattner at apple.com (Chris Lattner)
Date: Sun, 29 Aug 2010 12:56:47 -0700
Subject: [llvm-commits] [llvm] r112420 -
	/llvm/trunk/include/llvm/Support/StandardPasses.h
In-Reply-To: 
References: <20100829070551.59E0E2A6C12C@llvm.org> <4C7A0B2D.8040806@free.fr>
	
Message-ID: <185E017A-A97C-42D7-9F77-52F3E786972A@apple.com>


On Aug 29, 2010, at 12:39 AM, Eli Friedman wrote:

>> 
>> I never got around to changing it to use the SSA updator.  That
>> said, I could easily change it to not promote the alloca to a
>> register.  Since it's only used if an exception is raised, that
>> wouldn't be a big loss.

I took care of this.  I need to refactor some code, but it's done.

> Or, we could just rewrite mem2reg to use SSAUpdater :)

Lets not get ahead of ourselves... ;-)

-Chris



From sabre at nondot.org  Sun Aug 29 17:28:18 2010
From: sabre at nondot.org (Chris Lattner)
Date: Sun, 29 Aug 2010 22:28:18 -0000
Subject: [llvm-commits] [llvm] r112459 -
	/llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp
Message-ID: <20100829222818.5ECB92A6C12C@llvm.org>

Author: lattner
Date: Sun Aug 29 17:28:18 2010
New Revision: 112459

URL: http://llvm.org/viewvc/llvm-project?rev=112459&view=rev
Log:
revert 112457, it looks like it broke selfhost.

Modified:
    llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp

Modified: llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp?rev=112459&r1=112458&r2=112459&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp (original)
+++ llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp Sun Aug 29 17:28:18 2010
@@ -26,7 +26,6 @@
 #include "llvm/Target/TargetLowering.h"
 #include "llvm/Transforms/Utils/BasicBlockUtils.h"
 #include "llvm/Transforms/Utils/PromoteMemToReg.h"
-#include "llvm/Transforms/Utils/SSAUpdater.h"
 using namespace llvm;
 
 STATISTIC(NumLandingPadsSplit,     "Number of landing pads split");
@@ -34,8 +33,6 @@
 STATISTIC(NumExceptionValuesMoved, "Number of eh.exception calls moved");
 STATISTIC(NumStackTempsIntroduced, "Number of stack temporaries introduced");
 
-static void PromoteAlloca(AllocaInst *AI);
-
 namespace {
   class DwarfEHPrepare : public FunctionPass {
     const TargetMachine *TM;
@@ -59,6 +56,7 @@
 
     // Dominator info is used when turning stack temporaries into registers.
     DominatorTree *DT;
+    DominanceFrontier *DF;
 
     // The function we are running on.
     Function *F;
@@ -116,17 +114,21 @@
       
     /// PromoteStoreInst - Perform Mem2Reg on a StoreInst.
     bool PromoteStoreInst(StoreInst *SI) {
+      if (!SI || !DT || !DF) return false;
+      
       AllocaInst *AI = dyn_cast(SI->getOperand(1));
       if (!AI || !isAllocaPromotable(AI)) return false;
       
-      PromoteAlloca(AI);
+      // Turn the alloca into a register.
+      std::vector Allocas(1, AI);
+      PromoteMemToReg(Allocas, *DT, *DF);
       return true;
     }
 
     /// PromoteEHPtrStore - Promote the storing of an EH pointer into a
     /// register. This should get rid of the store and subsequent loads.
     bool PromoteEHPtrStore(IntrinsicInst *II) {
-      if (!CompileFast) return false;
+      if (!DT || !DF) return false;
 
       bool Changed = false;
       StoreInst *SI;
@@ -139,7 +141,7 @@
           if (SI) break;
         }
 
-        if (SI && !PromoteStoreInst(SI))
+        if (!PromoteStoreInst(SI))
           break;
 
         Changed = true;
@@ -158,8 +160,14 @@
 
     virtual bool runOnFunction(Function &Fn);
 
+    // getAnalysisUsage - We need dominance frontiers for memory promotion.
     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+      if (!CompileFast)
+        AU.addRequired();
       AU.addPreserved();
+      if (!CompileFast)
+        AU.addRequired();
+      AU.addPreserved();
     }
 
     const char *getPassName() const {
@@ -175,128 +183,6 @@
   return new DwarfEHPrepare(tm, fast);
 }
 
-/// PromoteAlloca - This promotes an alloca to registers when we know that it
-/// only has non-volatile loads and stores to it.
-static void PromoteAlloca(AllocaInst *AI) {
-  assert(isAllocaPromotable(AI));
-  
-  // First step: bucket up uses of the pointers by the block they occur in.
-  // This is important because we have to handle multiple defs/uses in a block
-  // ourselves: SSAUpdater is purely for cross-block references.
-  // FIXME: Want a TinyVector since there is usually 0/1 element.
-  DenseMap > UsesByBlock;
-  for (Value::use_iterator UI = AI->use_begin(), E = AI->use_end();
-       UI != E; ++UI) {
-    Instruction *User = cast(*UI);
-    UsesByBlock[User->getParent()].push_back(User);
-  }
-  
-  SSAUpdater SSA;
-  
-  // It wants to know some value of the same type as what we'll be inserting.
-  Value *SomeValue;
-  if (isa(*AI->use_begin()))
-    SomeValue = *AI->use_begin();
-  else
-    SomeValue = cast(*AI->use_begin())->getOperand(0);
-  SSA.Initialize(SomeValue);
-   
-  // Okay, now we can iterate over all the blocks in the loop with uses,
-  // processing them.  Keep track of which loads are loading a live-in value.
-  SmallVector LiveInLoads;
-  
-  for (Value::use_iterator UI = AI->use_begin(), E = AI->use_end();
-       UI != E; ++UI) {
-    Instruction *User = cast(*UI);
-    std::vector &BlockUses = UsesByBlock[User->getParent()];
-    
-    // If this block has already been processed, ignore this repeat use.
-    if (BlockUses.empty()) continue;
-    
-    // Okay, this is the first use in the block.  If this block just has a
-    // single user in it, we can rewrite it trivially.
-    if (BlockUses.size() == 1) {
-      // If it is a store, it is a trivial def of the value in the block.
-      if (isa(User)) {
-        SSA.AddAvailableValue(User->getParent(),
-                              cast(User)->getOperand(0));
-      } else {
-        // Otherwise it is a load, queue it to rewrite as a live-in load.
-        LiveInLoads.push_back(cast(User));
-      }
-      BlockUses.clear();
-      continue;
-    }
-    
-    // Otherwise, check to see if this block is all loads.  If so, we can queue
-    // them all as live in loads.
-    bool HasStore = false;
-    for (unsigned i = 0, e = BlockUses.size(); i != e; ++i) {
-      if (isa(BlockUses[i])) {
-        HasStore = true;
-        break;
-      }
-    }
-    
-    if (!HasStore) {
-      for (unsigned i = 0, e = BlockUses.size(); i != e; ++i)
-        LiveInLoads.push_back(cast(BlockUses[i]));
-      BlockUses.clear();
-      continue;
-    }
-    
-    // Otherwise, we have mixed loads and stores (or just a bunch of stores).
-    // Since SSAUpdater is purely for cross-block values, we need to determine
-    // the order of these instructions in the block.  If the first use in the
-    // block is a load, then it uses the live in value.  The last store defines
-    // the live out value.  We handle this by doing a linear scan of the block.
-    BasicBlock *BB = User->getParent();
-    Value *StoredValue = 0;
-    for (BasicBlock::iterator II = BB->begin(), E = BB->end(); II != E; ++II) {
-      if (LoadInst *L = dyn_cast(II)) {
-        // If this is a load to an unrelated pointer, ignore it.
-        if (L->getOperand(0) != AI) continue;
-        
-        // If we haven't seen a store yet, this is a live in use, otherwise
-        // use the stored value.
-        if (StoredValue)
-          L->replaceAllUsesWith(StoredValue);
-        else
-          LiveInLoads.push_back(L);
-        continue;
-      }
-      
-      if (StoreInst *S = dyn_cast(II)) {
-        // If this is a store to an unrelated pointer, ignore it.
-        if (S->getOperand(1) != AI) continue;
-        
-        // Remember that this is the active value in the block.
-        StoredValue = S->getOperand(0);
-      }
-    }
-    
-    // The last stored value that happened is the live-out for the block.
-    assert(StoredValue && "Already checked that there is a store in block");
-    SSA.AddAvailableValue(BB, StoredValue);
-    BlockUses.clear();
-  }
-  
-  // Okay, now we rewrite all loads that use live-in values in the loop,
-  // inserting PHI nodes as necessary.
-  for (unsigned i = 0, e = LiveInLoads.size(); i != e; ++i) {
-    LoadInst *ALoad = LiveInLoads[i];
-    ALoad->replaceAllUsesWith(SSA.GetValueInMiddleOfBlock(ALoad->getParent()));
-  }
-  
-  // Now that everything is rewritten, delete the old instructions from the body
-  // of the loop.  They should all be dead now.
-  for (Value::use_iterator UI = AI->use_begin(), E = AI->use_end();
-       UI != E; ++UI)
-    cast(*UI)->eraseFromParent();
-}
-
-
-
 /// HasCatchAllInSelector - Return true if the intrinsic instruction has a
 /// catch-all.
 bool DwarfEHPrepare::HasCatchAllInSelector(IntrinsicInst *II) {
@@ -639,9 +525,11 @@
     // Add a fallthrough from NewBB to the original landing pad.
     BranchInst::Create(LPad, NewBB);
 
-    // Now update DominatorTree analysis information if it is around.
+    // Now update DominatorTree and DominanceFrontier analysis information.
     if (DT)
       DT->splitBlock(NewBB);
+    if (DF)
+      DF->splitBlock(NewBB);
 
     // Remember the newly constructed landing pad.  The original landing pad
     // LPad is no longer a landing pad now that all unwind edges have been
@@ -767,9 +655,10 @@
 /// PromoteStackTemporaries - Turn any stack temporaries we introduced into
 /// registers if possible.
 bool DwarfEHPrepare::PromoteStackTemporaries() {
-  // Turn the exception temporary into registers and phi nodes if possible.
-  if (ExceptionValueVar && isAllocaPromotable(ExceptionValueVar)) {
-    PromoteAlloca(ExceptionValueVar);
+  if (ExceptionValueVar && DT && DF && isAllocaPromotable(ExceptionValueVar)) {
+    // Turn the exception temporary into registers and phi nodes if possible.
+    std::vector Allocas(1, ExceptionValueVar);
+    PromoteMemToReg(Allocas, *DT, *DF);
     return true;
   }
   return false;
@@ -823,6 +712,7 @@
 
   // Initialize internal state.
   DT = getAnalysisIfAvailable();
+  DF = getAnalysisIfAvailable();
   ExceptionValueVar = 0;
   F = &Fn;
 
@@ -841,7 +731,7 @@
   // Initialize any stack temporaries we introduced.
   Changed |= FinishStackTemporaries();
 
-  // Turn any stack temporaries into registers.
+  // Turn any stack temporaries into registers if possible.
   if (!CompileFast)
     Changed |= PromoteStackTemporaries();
 




From isanbard at gmail.com  Sun Aug 29 20:36:05 2010
From: isanbard at gmail.com (Bill Wendling)
Date: Mon, 30 Aug 2010 01:36:05 -0000
Subject: [llvm-commits] [llvm] r112461 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
Message-ID: <20100830013605.CF1B42A6C12C@llvm.org>

Author: void
Date: Sun Aug 29 20:36:05 2010
New Revision: 112461

URL: http://llvm.org/viewvc/llvm-project?rev=112461&view=rev
Log:
When adding a register, we should mark it as "def" if it can optionally define
said (physical) register.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp?rev=112461&r1=112460&r2=112461&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp Sun Aug 29 20:36:05 2010
@@ -253,7 +253,6 @@
   return I->second;
 }
 
-
 /// AddRegisterOperand - Add the specified register as an operand to the
 /// specified machine instr. Insert register copies if the register is
 /// not in the required register class.
@@ -337,7 +336,10 @@
     const ConstantFP *CFP = F->getConstantFPValue();
     MI->addOperand(MachineOperand::CreateFPImm(CFP));
   } else if (RegisterSDNode *R = dyn_cast(Op)) {
-    MI->addOperand(MachineOperand::CreateReg(R->getReg(), false));
+    unsigned Reg = R->getReg();
+    const TargetInstrDesc &TID = MI->getDesc();
+    MI->addOperand(MachineOperand::CreateReg(Reg,
+      (Reg == 0 || !TID.OpInfo) ? false : TID.OpInfo[IIOpNum].isOptionalDef()));
   } else if (GlobalAddressSDNode *TGA = dyn_cast(Op)) {
     MI->addOperand(MachineOperand::CreateGA(TGA->getGlobal(), TGA->getOffset(),
                                             TGA->getTargetFlags()));




From isanbard at gmail.com  Sun Aug 29 20:47:35 2010
From: isanbard at gmail.com (Bill Wendling)
Date: Mon, 30 Aug 2010 01:47:35 -0000
Subject: [llvm-commits] [llvm] r112462 - in /llvm/trunk/lib/Target/ARM:
 ARMInstrFormats.td ARMInstrThumb2.td
Message-ID: <20100830014735.82E892A6C12C@llvm.org>

Author: void
Date: Sun Aug 29 20:47:35 2010
New Revision: 112462

URL: http://llvm.org/viewvc/llvm-project?rev=112462&view=rev
Log:
Create Thumb2sI_cpsr and T2sI_cpsr. These new classes indicate that CPSR is the
optional modified register (instead of reg0). Along with r112461 it will make
sure that the optional define of CPSR is marked as "def" and will thus mark the
instructions using these classes (t2ANDS*) as setting the 's' flag.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
    llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=112462&r1=112461&r2=112462&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Sun Aug 29 20:47:35 2010
@@ -261,9 +261,9 @@
   list Predicates = [IsARM];
 }
 
-// Same as I except it can optionally modify CPSR. Note it's modeled as
-// an input operand since by default it's a zero register. It will
-// become an implicit def once it's "flipped".
+// Same as I except it can optionally modify CPSR. Note it's modeled as an input
+// operand since by default it's a zero register. It will become an implicit def
+// once it's "flipped".
 class sI Predicates = [IsThumb2];
 }
 
+// Same as Thumb2sI except it does modify CPSR. Note it's modeled as an input
+// operand since by default it's a zero register. It will become an implicit def
+// once it's "flipped".
+// FIXME: This uses unified syntax so {s} comes before {p}. We should make it
+// more consistent.
+class Thumb2sI_cpsr pattern>
+  : InstARM {
+  let OutOperandList = oops;
+  let InOperandList = !con(iops, (ins pred:$p, s_cc_out:$s));
+  let AsmString = !strconcat(opc, !strconcat("${s}${p}", asm));
+  let Pattern = pattern;
+  list Predicates = [IsThumb2];
+}
+
 // Special cases
 class Thumb2XI pattern>
   : Thumb2sI;
 
+class T2sI_cpsr pattern>
+  : Thumb2sI_cpsr;
+
 class T2XI pattern>
   : Thumb2XI;

Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=112462&r1=112461&r2=112462&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Sun Aug 29 20:47:35 2010
@@ -214,7 +214,7 @@
 /// binary operation that produces a value. These are predicable and can be
 /// changed to modify CPSR.
 multiclass T2I_bin_irs opcod, string opc, PatFrag opnode,
-                       bit Commutable = 0, string wide = "", bit SBit = 0> {
+                       bit Commutable = 0, string wide = ""> {
    // shifted imm
    def ri : T2sI<(outs rGPR:$dst), (ins rGPR:$lhs, t2_so_imm:$rhs), IIC_iALUi,
                  opc, "\t$dst, $lhs, $rhs",
@@ -222,7 +222,7 @@
      let Inst{31-27} = 0b11110;
      let Inst{25} = 0;
      let Inst{24-21} = opcod;
-     let Inst{20} = SBit; // The S bit.
+     let Inst{20} = ?; // The S bit.
      let Inst{15} = 0;
    }
    // register
@@ -233,7 +233,7 @@
      let Inst{31-27} = 0b11101;
      let Inst{26-25} = 0b01;
      let Inst{24-21} = opcod;
-     let Inst{20} = SBit; // The S bit.
+     let Inst{20} = ?; // The S bit.
      let Inst{14-12} = 0b000; // imm3
      let Inst{7-6} = 0b00; // imm2
      let Inst{5-4} = 0b00; // type
@@ -245,7 +245,46 @@
      let Inst{31-27} = 0b11101;
      let Inst{26-25} = 0b01;
      let Inst{24-21} = opcod;
-     let Inst{20} = SBit; // The S bit.
+     let Inst{20} = ?; // The S bit.
+   }
+}
+
+/// T2I_bin_cpsr_irs - Defines a set of (op reg, {so_imm|r|so_reg}) patterns for
+/// a binary operation that produces a value. These are predicable and modify
+/// CPSR.
+multiclass T2I_bin_cpsr_irs opcod, string opc, PatFrag opnode,
+                            bit Commutable = 0, string wide = ""> {
+   // shifted imm
+   def ri : T2sI_cpsr<(outs rGPR:$dst), (ins rGPR:$lhs, t2_so_imm:$rhs),
+                      IIC_iALUi, opc, "\t$dst, $lhs, $rhs",
+                 [(set rGPR:$dst, (opnode rGPR:$lhs, t2_so_imm:$rhs))]> {
+     let Inst{31-27} = 0b11110;
+     let Inst{25} = 0;
+     let Inst{24-21} = opcod;
+     let Inst{20} = 1; // The S bit.
+     let Inst{15} = 0;
+   }
+   // register
+   def rr : T2sI_cpsr<(outs rGPR:$dst), (ins rGPR:$lhs, rGPR:$rhs),
+                      IIC_iALUr, opc, !strconcat(wide, "\t$dst, $lhs, $rhs"),
+                 [(set rGPR:$dst, (opnode rGPR:$lhs, rGPR:$rhs))]> {
+     let isCommutable = Commutable;
+     let Inst{31-27} = 0b11101;
+     let Inst{26-25} = 0b01;
+     let Inst{24-21} = opcod;
+     let Inst{20} = 1; // The S bit.
+     let Inst{14-12} = 0b000; // imm3
+     let Inst{7-6} = 0b00; // imm2
+     let Inst{5-4} = 0b00; // type
+   }
+   // shifted register
+   def rs : T2sI_cpsr<(outs rGPR:$dst), (ins rGPR:$lhs, t2_so_reg:$rhs),
+                      IIC_iALUsi, opc, !strconcat(wide, "\t$dst, $lhs, $rhs"),
+                 [(set rGPR:$dst, (opnode rGPR:$lhs, t2_so_reg:$rhs))]> {
+     let Inst{31-27} = 0b11101;
+     let Inst{26-25} = 0b01;
+     let Inst{24-21} = opcod;
+     let Inst{20} = 1; // The S bit.
    }
 }
 
@@ -253,13 +292,13 @@
 //  the ".w" prefix to indicate that they are wide.
 multiclass T2I_bin_w_irs opcod, string opc, PatFrag opnode,
                          bit Commutable = 0> :
-    T2I_bin_irs;
+    T2I_bin_irs;
 
 /// T2I_bin_sw_irs - Same as T2I_bin_w_irs except these operations set
 //  the 'S' bit.
 multiclass T2I_bin_sw_irs opcod, string opc, PatFrag opnode,
                          bit Commutable = 0> :
-    T2I_bin_irs;
+    T2I_bin_cpsr_irs;
 
 /// T2I_rbin_is - Same as T2I_bin_irs except the order of operands are
 /// reversed.  The 'rr' form is only defined for the disassembler; for codegen
@@ -1637,7 +1676,7 @@
 defm t2BIC  : T2I_bin_w_irs<0b0001, "bic",
                             BinOpFrag<(and node:$LHS, (not node:$RHS))>>;
 
-let Defs = [CPSR] in
+//let Defs = [CPSR] in
 defm t2ANDS : T2I_bin_sw_irs<0b0000, "and",
                              BinOpFrag<(ARMand node:$LHS, node:$RHS)>, 1>;
 
@@ -1682,7 +1721,7 @@
 }
 
 defm t2ORN  : T2I_bin_irs<0b0011, "orn", BinOpFrag<(or  node:$LHS,
-                          (not node:$RHS))>, 0, "", ?>;
+                          (not node:$RHS))>, 0, "">;
 
 // Prefer over of t2EORri ra, rb, -1 because mvn has 16-bit version
 let AddedComplexity = 1 in




From bigcheesegs at gmail.com  Sun Aug 29 21:01:43 2010
From: bigcheesegs at gmail.com (Michael Spencer)
Date: Sun, 29 Aug 2010 22:01:43 -0400
Subject: [llvm-commits] [patch] Fix LLVMC tests on CMake.
Message-ID: 

The CMake build didn't define TEST_COMPILE_CXX_CMD. The tests assumed
gcc. All of the LLVMC tests now pass on Windows (with VS2010) and on
Linux when built with CMake.

Patch attached. I've updated the autoconf build, but I need someone to
verify it's correct.

- Michael Spencer
-------------- next part --------------
A non-text attachment was scrubbed...
Name: test-fix-llvmc-cmake.patch
Type: application/octet-stream
Size: 11075 bytes
Desc: not available
Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20100829/93a1d3c6/attachment.obj 

From geek4civic at gmail.com  Sun Aug 29 22:23:42 2010
From: geek4civic at gmail.com (NAKAMURA Takumi)
Date: Mon, 30 Aug 2010 12:23:42 +0900
Subject: [llvm-commits] [PATCH] PR3897: suppress invoking __main() from JIT
	on Cygwin and Mingw
Message-ID: 

EE/JIT: We don't want to invoke parent's ctors/dtors from main(), to fix PR3897.

--
http://llvm.org/bugs/show_bug.cgi?id=3897
Please review it. Now I can commit it as chapuni.
Confirmed on Cygwin-1.7-(shared,static) and Cygwin-1.5-static.

...Takumi
-------------- next part --------------
diff --git a/lib/ExecutionEngine/JIT/Intercept.cpp b/lib/ExecutionEngine/JIT/Intercept.cpp
index b367033..6ffec0a 100644
--- a/lib/ExecutionEngine/JIT/Intercept.cpp
+++ b/lib/ExecutionEngine/JIT/Intercept.cpp
@@ -89,6 +89,12 @@ static int jit_atexit(void (*Fn)()) {
   return 0;  // Always successful
 }
 
+#if defined(__CYGWIN__) || defined(__MINGW32__)
+static int jit_noop() {
+  return 0;
+}
+#endif
+
 //===----------------------------------------------------------------------===//
 //
 /// getPointerToNamedFunction - This method returns the address of the specified
@@ -104,6 +110,11 @@ void *JIT::getPointerToNamedFunction(const std::string &Name,
     if (Name == "exit") return (void*)(intptr_t)&jit_exit;
     if (Name == "atexit") return (void*)(intptr_t)&jit_atexit;
 
+    // We don't want to invoke parent's ctors/dtors from main()! (PR3897)
+#if defined(__CYGWIN__) || defined(__MINGW32__)
+    if (Name == "__main") return (void*)(intptr_t)&jit_noop;
+#endif
+
     const char *NameStr = Name.c_str();
     // If this is an asm specifier, skip the sentinal.
     if (NameStr[0] == 1) ++NameStr;

From geek4civic at gmail.com  Sun Aug 29 23:04:27 2010
From: geek4civic at gmail.com (NAKAMURA Takumi)
Date: Mon, 30 Aug 2010 13:04:27 +0900
Subject: [llvm-commits] [patch] Fix LLVMC tests on CMake.
In-Reply-To: 
References: 
Message-ID: 

Michael,

It works on all my platforms, good.

Expected Passes    : 19
Unsupported Tests  : 12

Can you fix "propogate"?

...Takumi


2010/8/30 Michael Spencer :
> The CMake build didn't define TEST_COMPILE_CXX_CMD. The tests assumed
> gcc. All of the LLVMC tests now pass on Windows (with VS2010) and on
> Linux when built with CMake.
>
> Patch attached. I've updated the autoconf build, but I need someone to
> verify it's correct.
>
> - Michael Spencer
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
>


From isanbard at gmail.com  Sun Aug 29 23:36:50 2010
From: isanbard at gmail.com (Bill Wendling)
Date: Mon, 30 Aug 2010 04:36:50 -0000
Subject: [llvm-commits] [llvm] r112463 -
	/llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
Message-ID: <20100830043650.D852F2A6C12C@llvm.org>

Author: void
Date: Sun Aug 29 23:36:50 2010
New Revision: 112463

URL: http://llvm.org/viewvc/llvm-project?rev=112463&view=rev
Log:
Revert r112461. It was failing on PPC...

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp?rev=112463&r1=112462&r2=112463&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp Sun Aug 29 23:36:50 2010
@@ -253,6 +253,7 @@
   return I->second;
 }
 
+
 /// AddRegisterOperand - Add the specified register as an operand to the
 /// specified machine instr. Insert register copies if the register is
 /// not in the required register class.
@@ -336,10 +337,7 @@
     const ConstantFP *CFP = F->getConstantFPValue();
     MI->addOperand(MachineOperand::CreateFPImm(CFP));
   } else if (RegisterSDNode *R = dyn_cast(Op)) {
-    unsigned Reg = R->getReg();
-    const TargetInstrDesc &TID = MI->getDesc();
-    MI->addOperand(MachineOperand::CreateReg(Reg,
-      (Reg == 0 || !TID.OpInfo) ? false : TID.OpInfo[IIOpNum].isOptionalDef()));
+    MI->addOperand(MachineOperand::CreateReg(R->getReg(), false));
   } else if (GlobalAddressSDNode *TGA = dyn_cast(Op)) {
     MI->addOperand(MachineOperand::CreateGA(TGA->getGlobal(), TGA->getOffset(),
                                             TGA->getTargetFlags()));