From isanbard at gmail.com Mon Oct 4 00:33:10 2010
From: isanbard at gmail.com (Bill Wendling)
Date: Mon, 04 Oct 2010 05:33:10 -0000
Subject: [llvm-commits] [www] r115497 - /www/trunk/index.html
Message-ID: <20101004053310.3D7552A6C12E@llvm.org>
Author: void
Date: Mon Oct 4 00:33:10 2010
New Revision: 115497
URL: http://llvm.org/viewvc/llvm-project?rev=115497&view=rev
Log:
Update 2.8 release schedule.
Modified:
www/trunk/index.html
Modified: www/trunk/index.html
URL: http://llvm.org/viewvc/llvm-project/www/trunk/index.html?rev=115497&r1=115496&r2=115497&view=diff
==============================================================================
--- www/trunk/index.html (original)
+++ www/trunk/index.html Mon Oct 4 00:33:10 2010
@@ -136,9 +136,9 @@
9/3 — Branching
9/6 — Pre-release 1 testing begins
9/12 — Pre-release 1 testing ends
-
9/20 — Pre-release 2 testing begins
+
9/20 — Pre-release 2 testing begins
9/26 — Pre-release 2 testing ends
-
9/29 — Release!
+
10/4 — Release!
From stoklund at 2pi.dk Mon Oct 4 00:39:02 2010
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Sun, 3 Oct 2010 22:39:02 -0700
Subject: [llvm-commits] [llvm] r115495 -
/llvm/trunk/docs/ReleaseNotes.html
In-Reply-To: <20101004043925.632362A6C12E@llvm.org>
References: <20101004043925.632362A6C12E@llvm.org>
Message-ID:
On Oct 3, 2010, at 9:39 PM, Chris Lattner wrote:
> +
The new SubRegIndex tablegen class allows subregisters to be indexed
> + symbolically instead of numerically. If your target uses subregisters you
> + will need to adapt to use SubRegIndex when you upgrade to 2.8.
Yup.
>
I don't think this is worth mentioning in the release notes since it doesn't really work yet.
/jakob
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From nlewycky at google.com Mon Oct 4 01:39:49 2010
From: nlewycky at google.com (Nick Lewycky)
Date: Sun, 3 Oct 2010 23:39:49 -0700
Subject: [llvm-commits] [llvm] r115393 - in /llvm/trunk: CMakeLists.txt
lib/Target/MSP430/InstPrinter/CMakeLists.txt
lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp
lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h
lib/Target/MSP430/InstPrinter/Makefi
In-Reply-To:
References:
<07E65C41-D605-4147-B976-1BC502C5BF68@apple.com>
Message-ID:
Here's what the GenLibDeps.pl script thinks is going on.
libLLVMMSP430CodeGen.a uses but does not define symbols:
_ZN4llvm17MSP430InstPrinter15getRegisterNameEj aka.
llvm::MSP430InstPrinter::getRegisterName(unsigned int)
which are provided by libLLVMMSP430AsmPrinter.a. Going in the other
direction, libLLVMMSP430AsmPrinter.a uses symbols:
_ZN4llvm6MSP43011GR8RegClassE aka. llvm::MSP430::GR8RegClass
_ZN4llvm6MSP43012GR16RegClassE aka. llvm::MSP430::GR16RegClass
GR8RegClass and GR16RegClass is defined in MSP430RegisterInfo.o (which is
rolled into ...CodeGen.a). Its only reference in ...AsmPrinter.a is by
MSP430InstPrinter.o.
The getRegisterName function is defined in MSP430InstPrinter.o (part of
...AsmPrinter.a) and its only reference in ...CodeGen.a is by
MSP430AsmPrinter.o.
Is that enough to go on?
Nick
On 1 October 2010 18:43, Nick Lewycky wrote:
> Okay. You can see that almost all of the open-source builders were broken:
>
> http://google1.osuosl.org:8011/console
>
> in that time. It's impossible for
> this particular error to occur in a cmake build because cmake doesn't run
> find-cycles.pl (last i checked). My suspicion is that the cmake builders
> were working fine while configure+make ones were not?
>
> I'm going to wind back to the broken point and try to reproduce the failure
> and see if I can figure out what the cyclic dependency actually was.
>
> Nick
>
>
> On 1 October 2010 18:27, Jim Grosbach wrote:
>
>> That's very strange. I do a configure/make here, and it works, and lots of
>> bots using that were green as well. If there's a case I missed, I'd love to
>> have some help tracking down what it is. Can you try a "make clean" and see
>> if that works? Maybe there's just something stale that the configure portion
>> of the patch needs to clean up.
>>
>> -Jim
>>
>>
>>
>> On Oct 1, 2010, at 6:24 PM, Nick Lewycky wrote:
>>
>> Nope, it broke under a regular configure+make in-srctree incremental build
>> on multiple different machines.
>>
>> On 1 October 2010 18:22, Jim Grosbach wrote:
>>
>>> Nick,
>>>
>>> These only break for you under CMake, right? That's the only place I've
>>> been able to reproduce failures.
>>>
>>> -Jim
>>>
>>>
>>> On Oct 1, 2010, at 6:06 PM, Nick Lewycky wrote:
>>>
>>> > Author: nicholas
>>> > Date: Fri Oct 1 20:06:42 2010
>>> > New Revision: 115393
>>> >
>>> > URL: http://llvm.org/viewvc/llvm-project?rev=115393&view=rev
>>> > Log:
>>> > Revert patches r115363 r115367 r115391 due to build breakage:
>>> > llvm[2]: Updated LibDeps.txt because dependencies changed
>>> > llvm[2]: Checking for cyclic dependencies between LLVM libraries.
>>> > find-cycles.pl: Circular dependency between *.a files:
>>> > find-cycles.pl: libLLVMMSP430AsmPrinter.a libLLVMMSP430CodeGen.a
>>> >
>>> >
>>> > Modified:
>>> > llvm/trunk/CMakeLists.txt
>>> > llvm/trunk/lib/Target/MSP430/InstPrinter/CMakeLists.txt
>>> > llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp
>>> > llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h
>>> > llvm/trunk/lib/Target/MSP430/InstPrinter/Makefile
>>> > llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp
>>> > llvm/trunk/lib/Target/MSP430/MSP430MCInstLower.cpp
>>> > llvm/trunk/lib/Target/MSP430/MSP430MCInstLower.h
>>> > llvm/trunk/lib/Target/MSP430/Makefile
>>> >
>>> > Modified: llvm/trunk/CMakeLists.txt
>>> > URL:
>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/CMakeLists.txt?rev=115393&r1=115392&r2=115393&view=diff
>>> >
>>> ==============================================================================
>>> > --- llvm/trunk/CMakeLists.txt (original)
>>> > +++ llvm/trunk/CMakeLists.txt Fri Oct 1 20:06:42 2010
>>> > @@ -323,10 +323,6 @@
>>> > add_subdirectory(lib/Target/${t}/AsmPrinter)
>>> > set(LLVM_ENUM_ASM_PRINTERS
>>> > "${LLVM_ENUM_ASM_PRINTERS}LLVM_ASM_PRINTER(${t})\n")
>>> > - if( EXISTS
>>> ${LLVM_MAIN_SRC_DIR}/lib/Target/${t}/InstPrinter/CMakeLists.txt )
>>> > - add_subdirectory(lib/Target/${t}/InstPrinter)
>>> > - set(LLVM_ENUM_ASM_PRINTERS
>>> > - "${LLVM_ENUM_ASM_PRINTERS}LLVM_ASM_PRINTER(${t})\n")
>>> > endif( EXISTS
>>> ${LLVM_MAIN_SRC_DIR}/lib/Target/${t}/AsmPrinter/CMakeLists.txt )
>>> > if( EXISTS
>>> ${LLVM_MAIN_SRC_DIR}/lib/Target/${t}/AsmParser/CMakeLists.txt )
>>> > add_subdirectory(lib/Target/${t}/AsmParser)
>>> >
>>> > Modified: llvm/trunk/lib/Target/MSP430/InstPrinter/CMakeLists.txt
>>> > URL:
>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/InstPrinter/CMakeLists.txt?rev=115393&r1=115392&r2=115393&view=diff
>>> >
>>> ==============================================================================
>>> > --- llvm/trunk/lib/Target/MSP430/InstPrinter/CMakeLists.txt (original)
>>> > +++ llvm/trunk/lib/Target/MSP430/InstPrinter/CMakeLists.txt Fri Oct 1
>>> 20:06:42 2010
>>> > @@ -1,6 +0,0 @@
>>> > -include_directories( ${CMAKE_CURRENT_BINARY_DIR}/..
>>> ${CMAKE_CURRENT_SOURCE_DIR}/.. )
>>> > -
>>> > -add_llvm_library(LLVMMSP430AsmPrinter
>>> > - MSP430InstPrinter.cpp
>>> > - )
>>> > -add_dependencies(LLVMMSP430AsmPrinter MSP430CodeGenTable_gen)
>>> >
>>> > Modified:
>>> llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp
>>> > URL:
>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp?rev=115393&r1=115392&r2=115393&view=diff
>>> >
>>> ==============================================================================
>>> > --- llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp
>>> (original)
>>> > +++ llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp Fri
>>> Oct 1 20:06:42 2010
>>> > @@ -1,114 +0,0 @@
>>> > -//===-- MSP430InstPrinter.cpp - Convert MSP430 MCInst to assembly
>>> syntax --===//
>>> > -//
>>> > -// The LLVM Compiler Infrastructure
>>> > -//
>>> > -// This file is distributed under the University of Illinois Open
>>> Source
>>> > -// License. See LICENSE.TXT for details.
>>> > -//
>>> >
>>> -//===----------------------------------------------------------------------===//
>>> > -//
>>> > -// This class prints an MSP430 MCInst to a .s file.
>>> > -//
>>> >
>>> -//===----------------------------------------------------------------------===//
>>> > -
>>> > -#define DEBUG_TYPE "asm-printer"
>>> > -#include "MSP430.h"
>>> > -#include "MSP430InstrInfo.h"
>>> > -#include "MSP430InstPrinter.h"
>>> > -#include "llvm/MC/MCInst.h"
>>> > -#include "llvm/MC/MCAsmInfo.h"
>>> > -#include "llvm/MC/MCExpr.h"
>>> > -#include "llvm/Support/ErrorHandling.h"
>>> > -#include "llvm/Support/FormattedStream.h"
>>> > -using namespace llvm;
>>> > -
>>> > -
>>> > -// Include the auto-generated portion of the assembly writer.
>>> > -#include "MSP430GenAsmWriter.inc"
>>> > -
>>> > -void MSP430InstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
>>> > - printInstruction(MI, O);
>>> > -}
>>> > -
>>> > -void MSP430InstPrinter::printPCRelImmOperand(const MCInst *MI,
>>> unsigned OpNo,
>>> > - raw_ostream &O) {
>>> > - const MCOperand &Op = MI->getOperand(OpNo);
>>> > - if (Op.isImm())
>>> > - O << Op.getImm();
>>> > - else {
>>> > - assert(Op.isExpr() && "unknown pcrel immediate operand");
>>> > - O << *Op.getExpr();
>>> > - }
>>> > -}
>>> > -
>>> > -void MSP430InstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
>>> > - raw_ostream &O, const char
>>> *Modifier) {
>>> > - assert((Modifier == 0 || Modifier[0] == 0) && "No modifiers
>>> supported");
>>> > - const MCOperand &Op = MI->getOperand(OpNo);
>>> > - if (Op.isReg()) {
>>> > - O << getRegisterName(Op.getReg());
>>> > - } else if (Op.isImm()) {
>>> > - O << '#' << Op.getImm();
>>> > - } else {
>>> > - assert(Op.isExpr() && "unknown operand kind in printOperand");
>>> > - O << '#' << *Op.getExpr();
>>> > - }
>>> > -}
>>> > -
>>> > -void MSP430InstPrinter::printSrcMemOperand(const MCInst *MI, unsigned
>>> OpNo,
>>> > - raw_ostream &O,
>>> > - const char *Modifier) {
>>> > - const MCOperand &Base = MI->getOperand(OpNo);
>>> > - const MCOperand &Disp = MI->getOperand(OpNo+1);
>>> > -
>>> > - // Print displacement first
>>> > -
>>> > - // If the global address expression is a part of displacement field
>>> with a
>>> > - // register base, we should not emit any prefix symbol here, e.g.
>>> > - // mov.w &foo, r1
>>> > - // vs
>>> > - // mov.w glb(r1), r2
>>> > - // Otherwise (!) msp430-as will silently miscompile the output :(
>>> > - if (!Base.getReg())
>>> > - O << '&';
>>> > -
>>> > - if (Disp.isExpr())
>>> > - O << *Disp.getExpr();
>>> > - else {
>>> > - assert(Disp.isImm() && "Expected immediate in displacement
>>> field");
>>> > - O << Disp.getImm();
>>> > - }
>>> > -
>>> > - // Print register base field
>>> > - if (Base.getReg())
>>> > - O << '(' << getRegisterName(Base.getReg()) << ')';
>>> > -}
>>> > -
>>> > -void MSP430InstPrinter::printCCOperand(const MCInst *MI, unsigned
>>> OpNo,
>>> > - raw_ostream &O) {
>>> > - unsigned CC = MI->getOperand(OpNo).getImm();
>>> > -
>>> > - switch (CC) {
>>> > - default:
>>> > - llvm_unreachable("Unsupported CC code");
>>> > - break;
>>> > - case MSP430CC::COND_E:
>>> > - O << "eq";
>>> > - break;
>>> > - case MSP430CC::COND_NE:
>>> > - O << "ne";
>>> > - break;
>>> > - case MSP430CC::COND_HS:
>>> > - O << "hs";
>>> > - break;
>>> > - case MSP430CC::COND_LO:
>>> > - O << "lo";
>>> > - break;
>>> > - case MSP430CC::COND_GE:
>>> > - O << "ge";
>>> > - break;
>>> > - case MSP430CC::COND_L:
>>> > - O << 'l';
>>> > - break;
>>> > - }
>>> > -}
>>> >
>>> > Modified: llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h
>>> > URL:
>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h?rev=115393&r1=115392&r2=115393&view=diff
>>> >
>>> ==============================================================================
>>> > --- llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h
>>> (original)
>>> > +++ llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h Fri
>>> Oct 1 20:06:42 2010
>>> > @@ -1,43 +0,0 @@
>>> > -//===-- MSP430InstPrinter.h - Convert MSP430 MCInst to assembly syntax
>>> ----===//
>>> > -//
>>> > -// The LLVM Compiler Infrastructure
>>> > -//
>>> > -// This file is distributed under the University of Illinois Open
>>> Source
>>> > -// License. See LICENSE.TXT for details.
>>> > -//
>>> >
>>> -//===----------------------------------------------------------------------===//
>>> > -//
>>> > -// This class prints a MSP430 MCInst to a .s file.
>>> > -//
>>> >
>>> -//===----------------------------------------------------------------------===//
>>> > -
>>> > -#ifndef MSP430INSTPRINTER_H
>>> > -#define MSP430INSTPRINTER_H
>>> > -
>>> > -#include "llvm/MC/MCInstPrinter.h"
>>> > -
>>> > -namespace llvm {
>>> > - class MCOperand;
>>> > -
>>> > - class MSP430InstPrinter : public MCInstPrinter {
>>> > - public:
>>> > - MSP430InstPrinter(const MCAsmInfo &MAI) : MCInstPrinter(MAI) {
>>> > - }
>>> > -
>>> > - virtual void printInst(const MCInst *MI, raw_ostream &O);
>>> > -
>>> > - // Autogenerated by tblgen.
>>> > - void printInstruction(const MCInst *MI, raw_ostream &O);
>>> > - static const char *getRegisterName(unsigned RegNo);
>>> > -
>>> > - void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O,
>>> > - const char *Modifier = 0);
>>> > - void printPCRelImmOperand(const MCInst *MI, unsigned OpNo,
>>> raw_ostream &O);
>>> > - void printSrcMemOperand(const MCInst *MI, unsigned OpNo,
>>> raw_ostream &O,
>>> > - const char *Modifier = 0);
>>> > - void printCCOperand(const MCInst *MI, unsigned OpNo, raw_ostream
>>> &O);
>>> > -
>>> > - };
>>> > -}
>>> > -
>>> > -#endif
>>> >
>>> > Modified: llvm/trunk/lib/Target/MSP430/InstPrinter/Makefile
>>> > URL:
>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/InstPrinter/Makefile?rev=115393&r1=115392&r2=115393&view=diff
>>> >
>>> ==============================================================================
>>> > --- llvm/trunk/lib/Target/MSP430/InstPrinter/Makefile (original)
>>> > +++ llvm/trunk/lib/Target/MSP430/InstPrinter/Makefile Fri Oct 1
>>> 20:06:42 2010
>>> > @@ -1,15 +0,0 @@
>>> > -##===- lib/Target/MSP430/AsmPrinter/Makefile ---------------*-
>>> Makefile -*-===##
>>> > -#
>>> > -# The LLVM Compiler Infrastructure
>>> > -#
>>> > -# This file is distributed under the University of Illinois Open
>>> Source
>>> > -# License. See LICENSE.TXT for details.
>>> > -#
>>> >
>>> -##===----------------------------------------------------------------------===##
>>> > -LEVEL = ../../../..
>>> > -LIBRARYNAME = LLVMMSP430AsmPrinter
>>> > -
>>> > -# Hack: we need to include 'main' MSP430 target directory to grab
>>> private headers
>>> > -CPP.Flags += -I$(PROJ_OBJ_DIR)/.. -I$(PROJ_SRC_DIR)/..
>>> > -
>>> > -include $(LEVEL)/Makefile.common
>>> >
>>> > Modified: llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp
>>> > URL:
>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp?rev=115393&r1=115392&r2=115393&view=diff
>>> >
>>> ==============================================================================
>>> > --- llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp (original)
>>> > +++ llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp Fri Oct 1
>>> 20:06:42 2010
>>> > @@ -1,179 +0,0 @@
>>> > -//===-- MSP430AsmPrinter.cpp - MSP430 LLVM assembly writer
>>> ----------------===//
>>> > -//
>>> > -// The LLVM Compiler Infrastructure
>>> > -//
>>> > -// This file is distributed under the University of Illinois Open
>>> Source
>>> > -// License. See LICENSE.TXT for details.
>>> > -//
>>> >
>>> -//===----------------------------------------------------------------------===//
>>> > -//
>>> > -// This file contains a printer that converts from our internal
>>> representation
>>> > -// of machine-dependent LLVM code to the MSP430 assembly language.
>>> > -//
>>> >
>>> -//===----------------------------------------------------------------------===//
>>> > -
>>> > -#define DEBUG_TYPE "asm-printer"
>>> > -#include "MSP430.h"
>>> > -#include "MSP430InstrInfo.h"
>>> > -#include "InstPrinter/MSP430InstPrinter.h"
>>> > -#include "MSP430MCAsmInfo.h"
>>> > -#include "MSP430MCInstLower.h"
>>> > -#include "MSP430TargetMachine.h"
>>> > -#include "llvm/Constants.h"
>>> > -#include "llvm/DerivedTypes.h"
>>> > -#include "llvm/Module.h"
>>> > -#include "llvm/Assembly/Writer.h"
>>> > -#include "llvm/CodeGen/AsmPrinter.h"
>>> > -#include "llvm/CodeGen/MachineModuleInfo.h"
>>> > -#include "llvm/CodeGen/MachineFunctionPass.h"
>>> > -#include "llvm/CodeGen/MachineConstantPool.h"
>>> > -#include "llvm/CodeGen/MachineInstr.h"
>>> > -#include "llvm/MC/MCInst.h"
>>> > -#include "llvm/MC/MCStreamer.h"
>>> > -#include "llvm/MC/MCSymbol.h"
>>> > -#include "llvm/Target/Mangler.h"
>>> > -#include "llvm/Target/TargetData.h"
>>> > -#include "llvm/Target/TargetLoweringObjectFile.h"
>>> > -#include "llvm/Target/TargetRegistry.h"
>>> > -#include "llvm/Support/raw_ostream.h"
>>> > -using namespace llvm;
>>> > -
>>> > -namespace {
>>> > - class MSP430AsmPrinter : public AsmPrinter {
>>> > - public:
>>> > - MSP430AsmPrinter(TargetMachine &TM, MCStreamer &Streamer)
>>> > - : AsmPrinter(TM, Streamer) {}
>>> > -
>>> > - virtual const char *getPassName() const {
>>> > - return "MSP430 Assembly Printer";
>>> > - }
>>> > -
>>> > - void printOperand(const MachineInstr *MI, int OpNum,
>>> > - raw_ostream &O, const char* Modifier = 0);
>>> > - void printSrcMemOperand(const MachineInstr *MI, int OpNum,
>>> > - raw_ostream &O);
>>> > - bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
>>> > - unsigned AsmVariant, const char *ExtraCode,
>>> > - raw_ostream &O);
>>> > - bool PrintAsmMemoryOperand(const MachineInstr *MI,
>>> > - unsigned OpNo, unsigned AsmVariant,
>>> > - const char *ExtraCode, raw_ostream &O);
>>> > - void EmitInstruction(const MachineInstr *MI);
>>> > - };
>>> > -} // end of anonymous namespace
>>> > -
>>> > -
>>> > -void MSP430AsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
>>> > - raw_ostream &O, const char
>>> *Modifier) {
>>> > - const MachineOperand &MO = MI->getOperand(OpNum);
>>> > - switch (MO.getType()) {
>>> > - default: assert(0 && "Not implemented yet!");
>>> > - case MachineOperand::MO_Register:
>>> > - O << MSP430InstPrinter::getRegisterName(MO.getReg());
>>> > - return;
>>> > - case MachineOperand::MO_Immediate:
>>> > - if (!Modifier || strcmp(Modifier, "nohash"))
>>> > - O << '#';
>>> > - O << MO.getImm();
>>> > - return;
>>> > - case MachineOperand::MO_MachineBasicBlock:
>>> > - O << *MO.getMBB()->getSymbol();
>>> > - return;
>>> > - case MachineOperand::MO_GlobalAddress: {
>>> > - bool isMemOp = Modifier && !strcmp(Modifier, "mem");
>>> > - uint64_t Offset = MO.getOffset();
>>> > -
>>> > - // If the global address expression is a part of displacement
>>> field with a
>>> > - // register base, we should not emit any prefix symbol here, e.g.
>>> > - // mov.w &foo, r1
>>> > - // vs
>>> > - // mov.w glb(r1), r2
>>> > - // Otherwise (!) msp430-as will silently miscompile the output :(
>>> > - if (!Modifier || strcmp(Modifier, "nohash"))
>>> > - O << (isMemOp ? '&' : '#');
>>> > - if (Offset)
>>> > - O << '(' << Offset << '+';
>>> > -
>>> > - O << *Mang->getSymbol(MO.getGlobal());
>>> > -
>>> > - if (Offset)
>>> > - O << ')';
>>> > -
>>> > - return;
>>> > - }
>>> > - case MachineOperand::MO_ExternalSymbol: {
>>> > - bool isMemOp = Modifier && !strcmp(Modifier, "mem");
>>> > - O << (isMemOp ? '&' : '#');
>>> > - O << MAI->getGlobalPrefix() << MO.getSymbolName();
>>> > - return;
>>> > - }
>>> > - }
>>> > -}
>>> > -
>>> > -void MSP430AsmPrinter::printSrcMemOperand(const MachineInstr *MI, int
>>> OpNum,
>>> > - raw_ostream &O) {
>>> > - const MachineOperand &Base = MI->getOperand(OpNum);
>>> > - const MachineOperand &Disp = MI->getOperand(OpNum+1);
>>> > -
>>> > - // Print displacement first
>>> > -
>>> > - // Imm here is in fact global address - print extra modifier.
>>> > - if (Disp.isImm() && !Base.getReg())
>>> > - O << '&';
>>> > - printOperand(MI, OpNum+1, O, "nohash");
>>> > -
>>> > - // Print register base field
>>> > - if (Base.getReg()) {
>>> > - O << '(';
>>> > - printOperand(MI, OpNum, O);
>>> > - O << ')';
>>> > - }
>>> > -}
>>> > -
>>> > -/// PrintAsmOperand - Print out an operand for an inline asm
>>> expression.
>>> > -///
>>> > -bool MSP430AsmPrinter::PrintAsmOperand(const MachineInstr *MI,
>>> unsigned OpNo,
>>> > - unsigned AsmVariant,
>>> > - const char *ExtraCode,
>>> raw_ostream &O) {
>>> > - // Does this asm operand have a single letter operand modifier?
>>> > - if (ExtraCode && ExtraCode[0])
>>> > - return true; // Unknown modifier.
>>> > -
>>> > - printOperand(MI, OpNo, O);
>>> > - return false;
>>> > -}
>>> > -
>>> > -bool MSP430AsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
>>> > - unsigned OpNo, unsigned
>>> AsmVariant,
>>> > - const char *ExtraCode,
>>> > - raw_ostream &O) {
>>> > - if (ExtraCode && ExtraCode[0]) {
>>> > - return true; // Unknown modifier.
>>> > - }
>>> > - printSrcMemOperand(MI, OpNo, O);
>>> > - return false;
>>> > -}
>>> > -
>>> >
>>> -//===----------------------------------------------------------------------===//
>>> > -void MSP430AsmPrinter::EmitInstruction(const MachineInstr *MI) {
>>> > - MSP430MCInstLower MCInstLowering(OutContext, *Mang, *this);
>>> > -
>>> > - MCInst TmpInst;
>>> > - MCInstLowering.Lower(MI, TmpInst);
>>> > - OutStreamer.EmitInstruction(TmpInst);
>>> > -}
>>> > -
>>> > -static MCInstPrinter *createMSP430MCInstPrinter(const Target &T,
>>> > - unsigned
>>> SyntaxVariant,
>>> > - const MCAsmInfo &MAI)
>>> {
>>> > - if (SyntaxVariant == 0)
>>> > - return new MSP430InstPrinter(MAI);
>>> > - return 0;
>>> > -}
>>> > -
>>> > -// Force static initialization.
>>> > -extern "C" void LLVMInitializeMSP430AsmPrinter() {
>>> > - RegisterAsmPrinter X(TheMSP430Target);
>>> > - TargetRegistry::RegisterMCInstPrinter(TheMSP430Target,
>>> > - createMSP430MCInstPrinter);
>>> > -}
>>> >
>>> > Modified: llvm/trunk/lib/Target/MSP430/MSP430MCInstLower.cpp
>>> > URL:
>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430MCInstLower.cpp?rev=115393&r1=115392&r2=115393&view=diff
>>> >
>>> ==============================================================================
>>> > --- llvm/trunk/lib/Target/MSP430/MSP430MCInstLower.cpp (original)
>>> > +++ llvm/trunk/lib/Target/MSP430/MSP430MCInstLower.cpp Fri Oct 1
>>> 20:06:42 2010
>>> > @@ -1,150 +0,0 @@
>>> > -//===-- MSP430MCInstLower.cpp - Convert MSP430 MachineInstr to an
>>> MCInst---===//
>>> > -//
>>> > -// The LLVM Compiler Infrastructure
>>> > -//
>>> > -// This file is distributed under the University of Illinois Open
>>> Source
>>> > -// License. See LICENSE.TXT for details.
>>> > -//
>>> >
>>> -//===----------------------------------------------------------------------===//
>>> > -//
>>> > -// This file contains code to lower MSP430 MachineInstrs to their
>>> corresponding
>>> > -// MCInst records.
>>> > -//
>>> >
>>> -//===----------------------------------------------------------------------===//
>>> > -
>>> > -#include "MSP430MCInstLower.h"
>>> > -#include "llvm/CodeGen/AsmPrinter.h"
>>> > -#include "llvm/CodeGen/MachineBasicBlock.h"
>>> > -#include "llvm/CodeGen/MachineInstr.h"
>>> > -#include "llvm/MC/MCAsmInfo.h"
>>> > -#include "llvm/MC/MCContext.h"
>>> > -#include "llvm/MC/MCExpr.h"
>>> > -#include "llvm/MC/MCInst.h"
>>> > -#include "llvm/Target/Mangler.h"
>>> > -#include "llvm/Support/raw_ostream.h"
>>> > -#include "llvm/Support/ErrorHandling.h"
>>> > -#include "llvm/ADT/SmallString.h"
>>> > -using namespace llvm;
>>> > -
>>> > -MCSymbol *MSP430MCInstLower::
>>> > -GetGlobalAddressSymbol(const MachineOperand &MO) const {
>>> > - switch (MO.getTargetFlags()) {
>>> > - default: llvm_unreachable("Unknown target flag on GV operand");
>>> > - case 0: break;
>>> > - }
>>> > -
>>> > - return Printer.Mang->getSymbol(MO.getGlobal());
>>> > -}
>>> > -
>>> > -MCSymbol *MSP430MCInstLower::
>>> > -GetExternalSymbolSymbol(const MachineOperand &MO) const {
>>> > - switch (MO.getTargetFlags()) {
>>> > - default: assert(0 && "Unknown target flag on GV operand");
>>> > - case 0: break;
>>> > - }
>>> > -
>>> > - return Printer.GetExternalSymbolSymbol(MO.getSymbolName());
>>> > -}
>>> > -
>>> > -MCSymbol *MSP430MCInstLower::
>>> > -GetJumpTableSymbol(const MachineOperand &MO) const {
>>> > - SmallString<256> Name;
>>> > - raw_svector_ostream(Name) << Printer.MAI->getPrivateGlobalPrefix()
>>> << "JTI"
>>> > - << Printer.getFunctionNumber() << '_'
>>> > - << MO.getIndex();
>>> > -
>>> > - switch (MO.getTargetFlags()) {
>>> > - default: llvm_unreachable("Unknown target flag on GV operand");
>>> > - case 0: break;
>>> > - }
>>> > -
>>> > - // Create a symbol for the name.
>>> > - return Ctx.GetOrCreateSymbol(Name.str());
>>> > -}
>>> > -
>>> > -MCSymbol *MSP430MCInstLower::
>>> > -GetConstantPoolIndexSymbol(const MachineOperand &MO) const {
>>> > - SmallString<256> Name;
>>> > - raw_svector_ostream(Name) << Printer.MAI->getPrivateGlobalPrefix()
>>> << "CPI"
>>> > - << Printer.getFunctionNumber() << '_'
>>> > - << MO.getIndex();
>>> > -
>>> > - switch (MO.getTargetFlags()) {
>>> > - default: llvm_unreachable("Unknown target flag on GV operand");
>>> > - case 0: break;
>>> > - }
>>> > -
>>> > - // Create a symbol for the name.
>>> > - return Ctx.GetOrCreateSymbol(Name.str());
>>> > -}
>>> > -
>>> > -MCSymbol *MSP430MCInstLower::
>>> > -GetBlockAddressSymbol(const MachineOperand &MO) const {
>>> > - switch (MO.getTargetFlags()) {
>>> > - default: assert(0 && "Unknown target flag on GV operand");
>>> > - case 0: break;
>>> > - }
>>> > -
>>> > - return Printer.GetBlockAddressSymbol(MO.getBlockAddress());
>>> > -}
>>> > -
>>> > -MCOperand MSP430MCInstLower::
>>> > -LowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym) const {
>>> > - // FIXME: We would like an efficient form for this, so we don't have
>>> to do a
>>> > - // lot of extra uniquing.
>>> > - const MCExpr *Expr = MCSymbolRefExpr::Create(Sym, Ctx);
>>> > -
>>> > - switch (MO.getTargetFlags()) {
>>> > - default: llvm_unreachable("Unknown target flag on GV operand");
>>> > - case 0: break;
>>> > - }
>>> > -
>>> > - if (!MO.isJTI() && MO.getOffset())
>>> > - Expr = MCBinaryExpr::CreateAdd(Expr,
>>> > -
>>> MCConstantExpr::Create(MO.getOffset(), Ctx),
>>> > - Ctx);
>>> > - return MCOperand::CreateExpr(Expr);
>>> > -}
>>> > -
>>> > -void MSP430MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI)
>>> const {
>>> > - OutMI.setOpcode(MI->getOpcode());
>>> > -
>>> > - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
>>> > - const MachineOperand &MO = MI->getOperand(i);
>>> > -
>>> > - MCOperand MCOp;
>>> > - switch (MO.getType()) {
>>> > - default:
>>> > - MI->dump();
>>> > - assert(0 && "unknown operand type");
>>> > - case MachineOperand::MO_Register:
>>> > - // Ignore all implicit register operands.
>>> > - if (MO.isImplicit()) continue;
>>> > - MCOp = MCOperand::CreateReg(MO.getReg());
>>> > - break;
>>> > - case MachineOperand::MO_Immediate:
>>> > - MCOp = MCOperand::CreateImm(MO.getImm());
>>> > - break;
>>> > - case MachineOperand::MO_MachineBasicBlock:
>>> > - MCOp = MCOperand::CreateExpr(MCSymbolRefExpr::Create(
>>> > - MO.getMBB()->getSymbol(), Ctx));
>>> > - break;
>>> > - case MachineOperand::MO_GlobalAddress:
>>> > - MCOp = LowerSymbolOperand(MO, GetGlobalAddressSymbol(MO));
>>> > - break;
>>> > - case MachineOperand::MO_ExternalSymbol:
>>> > - MCOp = LowerSymbolOperand(MO, GetExternalSymbolSymbol(MO));
>>> > - break;
>>> > - case MachineOperand::MO_JumpTableIndex:
>>> > - MCOp = LowerSymbolOperand(MO, GetJumpTableSymbol(MO));
>>> > - break;
>>> > - case MachineOperand::MO_ConstantPoolIndex:
>>> > - MCOp = LowerSymbolOperand(MO, GetConstantPoolIndexSymbol(MO));
>>> > - break;
>>> > - case MachineOperand::MO_BlockAddress:
>>> > - MCOp = LowerSymbolOperand(MO, GetBlockAddressSymbol(MO));
>>> > - }
>>> > -
>>> > - OutMI.addOperand(MCOp);
>>> > - }
>>> > -}
>>> >
>>> > Modified: llvm/trunk/lib/Target/MSP430/MSP430MCInstLower.h
>>> > URL:
>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430MCInstLower.h?rev=115393&r1=115392&r2=115393&view=diff
>>> >
>>> ==============================================================================
>>> > --- llvm/trunk/lib/Target/MSP430/MSP430MCInstLower.h (original)
>>> > +++ llvm/trunk/lib/Target/MSP430/MSP430MCInstLower.h Fri Oct 1
>>> 20:06:42 2010
>>> > @@ -1,50 +0,0 @@
>>> > -//===-- MSP430MCInstLower.h - Lower MachineInstr to MCInst
>>> ----------------===//
>>> > -//
>>> > -// The LLVM Compiler Infrastructure
>>> > -//
>>> > -// This file is distributed under the University of Illinois Open
>>> Source
>>> > -// License. See LICENSE.TXT for details.
>>> > -//
>>> >
>>> -//===----------------------------------------------------------------------===//
>>> > -
>>> > -#ifndef MSP430_MCINSTLOWER_H
>>> > -#define MSP430_MCINSTLOWER_H
>>> > -
>>> > -#include "llvm/Support/Compiler.h"
>>> > -
>>> > -namespace llvm {
>>> > - class AsmPrinter;
>>> > - class MCAsmInfo;
>>> > - class MCContext;
>>> > - class MCInst;
>>> > - class MCOperand;
>>> > - class MCSymbol;
>>> > - class MachineInstr;
>>> > - class MachineModuleInfoMachO;
>>> > - class MachineOperand;
>>> > - class Mangler;
>>> > -
>>> > - /// MSP430MCInstLower - This class is used to lower an MachineInstr
>>> > - /// into an MCInst.
>>> > -class LLVM_LIBRARY_VISIBILITY MSP430MCInstLower {
>>> > - MCContext &Ctx;
>>> > - Mangler &Mang;
>>> > -
>>> > - AsmPrinter &Printer;
>>> > -public:
>>> > - MSP430MCInstLower(MCContext &ctx, Mangler &mang, AsmPrinter
>>> &printer)
>>> > - : Ctx(ctx), Mang(mang), Printer(printer) {}
>>> > - void Lower(const MachineInstr *MI, MCInst &OutMI) const;
>>> > -
>>> > - MCOperand LowerSymbolOperand(const MachineOperand &MO, MCSymbol
>>> *Sym) const;
>>> > -
>>> > - MCSymbol *GetGlobalAddressSymbol(const MachineOperand &MO) const;
>>> > - MCSymbol *GetExternalSymbolSymbol(const MachineOperand &MO) const;
>>> > - MCSymbol *GetJumpTableSymbol(const MachineOperand &MO) const;
>>> > - MCSymbol *GetConstantPoolIndexSymbol(const MachineOperand &MO)
>>> const;
>>> > - MCSymbol *GetBlockAddressSymbol(const MachineOperand &MO) const;
>>> > -};
>>> > -
>>> > -}
>>> > -
>>> > -#endif
>>> >
>>> > Modified: llvm/trunk/lib/Target/MSP430/Makefile
>>> > URL:
>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/Makefile?rev=115393&r1=115392&r2=115393&view=diff
>>> >
>>> ==============================================================================
>>> > --- llvm/trunk/lib/Target/MSP430/Makefile (original)
>>> > +++ llvm/trunk/lib/Target/MSP430/Makefile Fri Oct 1 20:06:42 2010
>>> > @@ -18,7 +18,7 @@
>>> > MSP430GenDAGISel.inc MSP430GenCallingConv.inc \
>>> > MSP430GenSubtarget.inc
>>> >
>>> > -DIRS = InstPrinter TargetInfo
>>> > +DIRS = AsmPrinter TargetInfo
>>> >
>>> > include $(LEVEL)/Makefile.common
>>> >
>>> >
>>> >
>>> > _______________________________________________
>>> > llvm-commits mailing list
>>> > llvm-commits at cs.uiuc.edu
>>> > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>>
>>>
>>> _______________________________________________
>>> llvm-commits mailing list
>>> llvm-commits at cs.uiuc.edu
>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>>
>>
>>
>>
>
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From geek4civic at gmail.com Mon Oct 4 01:59:01 2010
From: geek4civic at gmail.com (NAKAMURA Takumi)
Date: Mon, 4 Oct 2010 15:59:01 +0900
Subject: [llvm-commits] [PATCH] FileCheck.cpp: made match regex '$' for
DOSish \r\n
Message-ID:
Some tests have CHECK: {{foobar$}} to cause mismatch failure on mingw.
I took the way to eliminate \r on MemoryBuffer.
Is there any better way?
...Takumi
-------------- next part --------------
diff --git a/utils/FileCheck/FileCheck.cpp b/utils/FileCheck/FileCheck.cpp
index cd76d44..2077e09 100644
--- a/utils/FileCheck/FileCheck.cpp
+++ b/utils/FileCheck/FileCheck.cpp
@@ -446,6 +446,11 @@ static MemoryBuffer *CanonicalizeInputFile(MemoryBuffer *MB) {
for (const char *Ptr = MB->getBufferStart(), *End = MB->getBufferEnd();
Ptr != End; ++Ptr) {
+ // Eliminate trailing dosish \r.
+ if (Ptr <= End - 2 && Ptr[0] == '\r' && Ptr[1] == '\n') {
+ continue;
+ }
+
// If C is not a horizontal whitespace, skip it.
if (*Ptr != ' ' && *Ptr != '\t') {
NewFile.push_back(*Ptr);
From dgregor at apple.com Mon Oct 4 02:02:35 2010
From: dgregor at apple.com (Douglas Gregor)
Date: Mon, 04 Oct 2010 07:02:35 -0000
Subject: [llvm-commits] [llvm] r115498 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <20101004070235.86C2D2A6C12C@llvm.org>
Author: dgregor
Date: Mon Oct 4 02:02:35 2010
New Revision: 115498
URL: http://llvm.org/viewvc/llvm-project?rev=115498&view=rev
Log:
Update LLVM 2.8 release notes for Clang
Modified:
llvm/trunk/docs/ReleaseNotes.html
Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=115498&r1=115497&r2=115498&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Mon Oct 4 02:02:35 2010
@@ -119,10 +119,18 @@
In the LLVM 2.8 time-frame, the Clang team has made many improvements:
-
-
Surely these guys have done something
-
X86-64 abi improvements? Did they make it in?
-
+
+
Clang C++ is now feature-complete with respect to the ISO C++ 1998 and 2003 standards.
+
Added support for Objective-C++.
+
Clang now uses LLVM-MC to directly generate object code and to parse inline assembly (on Darwin).
+
Introduced many new warnings, including -Wmissing-field-initializers, -Wshadow, -Wno-protocol, -Wtautological-compare, -Wstrict-selector-match, -Wcast-align, -Wunused improvements, and greatly improved format-string checking.
+
Introduced the "libclang" library, a C interface to Clang intended to support IDE clients.
+
Added support for #pragma GCC visibility, #pragma align, and others.
+
Added support for SSE, ARM NEON, and Altvec.
+
Implemented support for blocks in C++.
+
Implemented precompiled headers for C++.
+
Improved abstract syntax trees to retain more accurate source information.
+
From geek4civic at gmail.com Mon Oct 4 02:22:55 2010
From: geek4civic at gmail.com (NAKAMURA Takumi)
Date: Mon, 4 Oct 2010 16:22:55 +0900
Subject: [llvm-commits] [Review request] lit: cygming support on the
function "which"
Message-ID:
Hello, Daniel.
Please take a look into my patch.
confirmed on cygwin-1.5, cygwin-1.7 and mingw.
* On Windows, os.path.exists(command) matches to directories, too.
(eg. at seeking "bugpoint", the directory "test/BugPoint" matched when
current directory is test/)
* On Windows, unexecutable file matches.
(eg. when "macho-dump" and "macho-dump.bat" exist, "macho-dump.bat" is not hit)
* On Cygwin, the environment variable PATHEXT meddles.
(on cygwin, os.path.exists("/path/to/clang") matches to "/path/to/clang.exe")
In contrast, on win32, which should not seek suffix-less files.
(eg. "test/Scripts/macho-dump" should be ignored)
Thank you, ...Takumi
-------------- next part --------------
diff --git a/utils/lit/lit/Util.py b/utils/lit/lit/Util.py
index 414b714..5dbdd0b 100644
--- a/utils/lit/lit/Util.py
+++ b/utils/lit/lit/Util.py
@@ -56,7 +56,8 @@ def which(command, paths = None):
paths = os.environ.get('PATH','')
# Check for absolute match first.
- if os.path.exists(command):
+ if (command != os.path.basename(command)
+ and os.path.isfile(command)):
return command
# Would be nice if Python had a lib function for this.
@@ -64,7 +65,11 @@ def which(command, paths = None):
paths = os.defpath
# Get suffixes to search.
- pathext = os.environ.get('PATHEXT', '').split(os.pathsep)
+ # On Cygwin, 'PATHEXT' exists but it should not be used.
+ if os.pathsep == ';':
+ pathext = os.environ.get('PATHEXT', '').split(';')
+ else:
+ pathext = ['']
# Search the paths...
for path in paths.split(os.pathsep):
From baldrick at free.fr Mon Oct 4 04:11:50 2010
From: baldrick at free.fr (Duncan Sands)
Date: Mon, 04 Oct 2010 09:11:50 -0000
Subject: [llvm-commits] [llvm] r115499 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <20101004091151.249432A6C12E@llvm.org>
Author: baldrick
Date: Mon Oct 4 04:11:50 2010
New Revision: 115499
URL: http://llvm.org/viewvc/llvm-project?rev=115499&view=rev
Log:
Altvec -> Altivec.
Modified:
llvm/trunk/docs/ReleaseNotes.html
Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=115499&r1=115498&r2=115499&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Mon Oct 4 04:11:50 2010
@@ -126,7 +126,7 @@
Introduced many new warnings, including -Wmissing-field-initializers, -Wshadow, -Wno-protocol, -Wtautological-compare, -Wstrict-selector-match, -Wcast-align, -Wunused improvements, and greatly improved format-string checking.
Introduced the "libclang" library, a C interface to Clang intended to support IDE clients.
Added support for #pragma GCC visibility, #pragma align, and others.
-
Added support for SSE, ARM NEON, and Altvec.
+
Added support for SSE, ARM NEON, and Altivec.
Implemented support for blocks in C++.
Implemented precompiled headers for C++.
Improved abstract syntax trees to retain more accurate source information.
From baldrick at free.fr Mon Oct 4 05:04:14 2010
From: baldrick at free.fr (Duncan Sands)
Date: Mon, 04 Oct 2010 10:04:14 -0000
Subject: [llvm-commits] [llvm] r115500 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <20101004100415.08CF12A6C12E@llvm.org>
Author: baldrick
Date: Mon Oct 4 05:04:14 2010
New Revision: 115500
URL: http://llvm.org/viewvc/llvm-project?rev=115500&view=rev
Log:
Fix a bunch of typos.
Modified:
llvm/trunk/docs/ReleaseNotes.html
Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=115500&r1=115499&r2=115500&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Mon Oct 4 05:04:14 2010
@@ -450,7 +450,7 @@
configurations are designed by MPEG Reconfigurable Video Coding (RVC) committee.
MPEG RVC standard is built on a stream-based dataflow representation of
decoders. It is composed of a standard library of coding tools written in
-RVC-CAL language and a dataflow configuration &emdash; block diagram &emdash;
+RVC-CAL language and a dataflow configuration — block diagram —
of a decoder.
NEON support has been improved to model instructions which operate onto
- multiple consequtive registers more aggressively. This avoids lots of
+ multiple consecutive registers more aggressively. This avoids lots of
extraneous register copies.
The ARM backend now uses a new "ARMGlobalMerge" pass, which merges several
global variables into one, saving extra address computation (all the global
@@ -905,7 +905,7 @@
The build configuration machinery changed the output directory names. It
- wasn't clear to many people that "Release-Asserts" build was a release build
+ wasn't clear to many people that a "Release-Asserts" build was a release build
without asserts. To make this more clear, "Release" does not include
assertions and "Release+Asserts" does (likewise, "Debug" and
"Debug+Asserts").
From baldrick at free.fr Mon Oct 4 05:06:56 2010
From: baldrick at free.fr (Duncan Sands)
Date: Mon, 04 Oct 2010 10:06:56 -0000
Subject: [llvm-commits] [llvm] r115501 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <20101004100656.D65942A6C12E@llvm.org>
Author: baldrick
Date: Mon Oct 4 05:06:56 2010
New Revision: 115501
URL: http://llvm.org/viewvc/llvm-project?rev=115501&view=rev
Log:
Ada support has moved to dragonegg - I am no longer working on
Ada in llvm-gcc.
Modified:
llvm/trunk/docs/ReleaseNotes.html
Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=115501&r1=115500&r2=115501&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Mon Oct 4 05:06:56 2010
@@ -1161,37 +1161,9 @@
4.2. If you are interested in Fortran, we recommend that you consider using
dragonegg instead.
-
The llvm-gcc 4.2 Ada compiler has basic functionality. However, this is not a
-mature technology, and problems should be expected. For example:
-
-
The Ada front-end currently only builds on X86-32. This is mainly due
-to lack of trampoline support (pointers to nested functions) on other platforms.
-However, it also fails to build on X86-64
-which does support trampolines.
-
The Ada front-end fails to bootstrap.
-This is due to lack of LLVM support for setjmp/longjmp style
-exception handling, which is used internally by the compiler.
-Workaround: configure with --disable-bootstrap.
-
The c380004, c393010
-and cxg2021 ACATS tests fail
-(c380004 also fails with gcc-4.2 mainline).
-If the compiler is built with checks disabled then c393010
-causes the compiler to go into an infinite loop, using up all system memory.
-
Some GCC specific Ada tests continue to crash the compiler.
-
The -E binder option (exception backtraces)
-does not work and will result in programs
-crashing if an exception is raised. Workaround: do not use -E.
-
Only discrete types are allowed to start
-or finish at a non-byte offset in a record. Workaround: do not pack records
-or use representation clauses that result in a field of a non-discrete type
-starting or finishing in the middle of a byte.
The llvm-gcc 4.2 Ada compiler has basic functionality, but is no longer being
+actively maintained. If you are interested in Ada, we recommend that you
+consider using dragonegg instead.
From pichet2000 at gmail.com Mon Oct 4 06:44:10 2010
From: pichet2000 at gmail.com (Francois Pichet)
Date: Mon, 4 Oct 2010 07:44:10 -0400
Subject: [llvm-commits] [PATCH[WIN32] fix clang\test\Lexer\preamble.c in
win32
Message-ID:
Hi,
I am investigating all the win32 XFAIL in clang test.
This patch is necessary to remove the XFAIL from Lexer\preamble.c
The failing was due to this:
1. preamble.c contains CR+LF new lines
2. write() is called with a buffer containing the original (CR+LF) to
output the result on the console.
3. In text mode(the default), write() convert LF to CR+LF even if LF
is preceded by CR, hence we have CR+CR+LF which filecheck interprets
as 2 lines.
4. Filecheck fails
Solution: always use binary mode for output stream. Should not affect
unix where O_BINARY is not defined (I believe)
After this patch is accepted, i'll remove the XFAIL from preamble.c in
the clang svn.
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From lhames at gmail.com Mon Oct 4 07:13:07 2010
From: lhames at gmail.com (Lang Hames)
Date: Mon, 04 Oct 2010 12:13:07 -0000
Subject: [llvm-commits] [llvm] r115502 -
/llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp
Message-ID: <20101004121307.75AB42A6C12E@llvm.org>
Author: lhames
Date: Mon Oct 4 07:13:07 2010
New Revision: 115502
URL: http://llvm.org/viewvc/llvm-project?rev=115502&view=rev
Log:
Removed the older style (in-allocator) problem construction system from the PBQP allocator. Problem construction is now done exclusively with the new builders.
Modified:
llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp
Modified: llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp?rev=115502&r1=115501&r2=115502&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp Mon Oct 4 07:13:07 2010
@@ -68,12 +68,6 @@
cl::init(false), cl::Hidden);
static cl::opt
-pbqpBuilder("pbqp-builder",
- cl::desc("Use new builder system."),
- cl::init(true), cl::Hidden);
-
-
-static cl::opt
pbqpPreSplitting("pbqp-pre-splitting",
cl::desc("Pre-split before PBQP register allocation."),
cl::init(false), cl::Hidden);
@@ -129,76 +123,17 @@
LiveStacks *lss;
VirtRegMap *vrm;
- LI2NodeMap li2Node;
- Node2LIMap node2LI;
- AllowedSetMap allowedSets;
RegSet vregsToAlloc, emptyIntervalVRegs;
- NodeVector problemNodes;
-
-
- /// Builds a PBQP cost vector.
- template
- PBQP::Vector buildCostVector(unsigned vReg,
- const RegContainer &allowed,
- const CoalesceMap &cealesces,
- PBQP::PBQPNum spillCost) const;
-
- /// \brief Builds a PBQP interference matrix.
- ///
- /// @return Either a pointer to a non-zero PBQP matrix representing the
- /// allocation option costs, or a null pointer for a zero matrix.
- ///
- /// Expects allowed sets for two interfering LiveIntervals. These allowed
- /// sets should contain only allocable registers from the LiveInterval's
- /// register class, with any interfering pre-colored registers removed.
- template
- PBQP::Matrix* buildInterferenceMatrix(const RegContainer &allowed1,
- const RegContainer &allowed2) const;
-
- ///
- /// Expects allowed sets for two potentially coalescable LiveIntervals,
- /// and an estimated benefit due to coalescing. The allowed sets should
- /// contain only allocable registers from the LiveInterval's register
- /// classes, with any interfering pre-colored registers removed.
- template
- PBQP::Matrix* buildCoalescingMatrix(const RegContainer &allowed1,
- const RegContainer &allowed2,
- PBQP::PBQPNum cBenefit) const;
-
- /// \brief Finds coalescing opportunities and returns them as a map.
- ///
- /// Any entries in the map are guaranteed coalescable, even if their
- /// corresponding live intervals overlap.
- CoalesceMap findCoalesces();
/// \brief Finds the initial set of vreg intervals to allocate.
void findVRegIntervalsToAlloc();
- /// \brief Constructs a PBQP problem representation of the register
- /// allocation problem for this function.
- ///
- /// Old Construction Process - this functionality has been subsumed
- /// by PBQPBuilder. This function will only be hanging around for a little
- /// while until the new system has been fully tested.
- ///
- /// @return a PBQP solver object for the register allocation problem.
- PBQP::Graph constructPBQPProblemOld();
-
/// \brief Adds a stack interval if the given live interval has been
/// spilled. Used to support stack slot coloring.
void addStackInterval(const LiveInterval *spilled,MachineRegisterInfo* mri);
/// \brief Given a solved PBQP problem maps this solution back to a register
/// assignment.
- ///
- /// Old Construction Process - this functionality has been subsumed
- /// by PBQPBuilder. This function will only be hanging around for a little
- /// while until the new system has been fully tested.
- ///
- bool mapPBQPToRegAllocOld(const PBQP::Solution &solution);
-
- /// \brief Given a solved PBQP problem maps this solution back to a register
- /// assignment.
bool mapPBQPToRegAlloc(const PBQPRAProblem &problem,
const PBQP::Solution &solution);
@@ -510,306 +445,6 @@
MachineFunctionPass::getAnalysisUsage(au);
}
-template
-PBQP::Vector RegAllocPBQP::buildCostVector(unsigned vReg,
- const RegContainer &allowed,
- const CoalesceMap &coalesces,
- PBQP::PBQPNum spillCost) const {
-
- typedef typename RegContainer::const_iterator AllowedItr;
-
- // Allocate vector. Additional element (0th) used for spill option
- PBQP::Vector v(allowed.size() + 1, 0);
-
- v[0] = spillCost;
-
- // Iterate over the allowed registers inserting coalesce benefits if there
- // are any.
- unsigned ai = 0;
- for (AllowedItr itr = allowed.begin(), end = allowed.end();
- itr != end; ++itr, ++ai) {
-
- unsigned pReg = *itr;
-
- CoalesceMap::const_iterator cmItr =
- coalesces.find(RegPair(vReg, pReg));
-
- // No coalesce - on to the next preg.
- if (cmItr == coalesces.end())
- continue;
-
- // We have a coalesce - insert the benefit.
- v[ai + 1] = -cmItr->second;
- }
-
- return v;
-}
-
-template
-PBQP::Matrix* RegAllocPBQP::buildInterferenceMatrix(
- const RegContainer &allowed1, const RegContainer &allowed2) const {
-
- typedef typename RegContainer::const_iterator RegContainerIterator;
-
- // Construct a PBQP matrix representing the cost of allocation options. The
- // rows and columns correspond to the allocation options for the two live
- // intervals. Elements will be infinite where corresponding registers alias,
- // since we cannot allocate aliasing registers to interfering live intervals.
- // All other elements (non-aliasing combinations) will have zero cost. Note
- // that the spill option (element 0,0) has zero cost, since we can allocate
- // both intervals to memory safely (the cost for each individual allocation
- // to memory is accounted for by the cost vectors for each live interval).
- PBQP::Matrix *m =
- new PBQP::Matrix(allowed1.size() + 1, allowed2.size() + 1, 0);
-
- // Assume this is a zero matrix until proven otherwise. Zero matrices occur
- // between interfering live ranges with non-overlapping register sets (e.g.
- // non-overlapping reg classes, or disjoint sets of allowed regs within the
- // same class). The term "overlapping" is used advisedly: sets which do not
- // intersect, but contain registers which alias, will have non-zero matrices.
- // We optimize zero matrices away to improve solver speed.
- bool isZeroMatrix = true;
-
-
- // Row index. Starts at 1, since the 0th row is for the spill option, which
- // is always zero.
- unsigned ri = 1;
-
- // Iterate over allowed sets, insert infinities where required.
- for (RegContainerIterator a1Itr = allowed1.begin(), a1End = allowed1.end();
- a1Itr != a1End; ++a1Itr) {
-
- // Column index, starts at 1 as for row index.
- unsigned ci = 1;
- unsigned reg1 = *a1Itr;
-
- for (RegContainerIterator a2Itr = allowed2.begin(), a2End = allowed2.end();
- a2Itr != a2End; ++a2Itr) {
-
- unsigned reg2 = *a2Itr;
-
- // If the row/column regs are identical or alias insert an infinity.
- if (tri->regsOverlap(reg1, reg2)) {
- (*m)[ri][ci] = std::numeric_limits::infinity();
- isZeroMatrix = false;
- }
-
- ++ci;
- }
-
- ++ri;
- }
-
- // If this turns out to be a zero matrix...
- if (isZeroMatrix) {
- // free it and return null.
- delete m;
- return 0;
- }
-
- // ...otherwise return the cost matrix.
- return m;
-}
-
-template
-PBQP::Matrix* RegAllocPBQP::buildCoalescingMatrix(
- const RegContainer &allowed1, const RegContainer &allowed2,
- PBQP::PBQPNum cBenefit) const {
-
- typedef typename RegContainer::const_iterator RegContainerIterator;
-
- // Construct a PBQP Matrix representing the benefits of coalescing. As with
- // interference matrices the rows and columns represent allowed registers
- // for the LiveIntervals which are (potentially) to be coalesced. The amount
- // -cBenefit will be placed in any element representing the same register
- // for both intervals.
- PBQP::Matrix *m =
- new PBQP::Matrix(allowed1.size() + 1, allowed2.size() + 1, 0);
-
- // Reset costs to zero.
- m->reset(0);
-
- // Assume the matrix is zero till proven otherwise. Zero matrices will be
- // optimized away as in the interference case.
- bool isZeroMatrix = true;
-
- // Row index. Starts at 1, since the 0th row is for the spill option, which
- // is always zero.
- unsigned ri = 1;
-
- // Iterate over the allowed sets, insert coalescing benefits where
- // appropriate.
- for (RegContainerIterator a1Itr = allowed1.begin(), a1End = allowed1.end();
- a1Itr != a1End; ++a1Itr) {
-
- // Column index, starts at 1 as for row index.
- unsigned ci = 1;
- unsigned reg1 = *a1Itr;
-
- for (RegContainerIterator a2Itr = allowed2.begin(), a2End = allowed2.end();
- a2Itr != a2End; ++a2Itr) {
-
- // If the row and column represent the same register insert a beneficial
- // cost to preference this allocation - it would allow us to eliminate a
- // move instruction.
- if (reg1 == *a2Itr) {
- (*m)[ri][ci] = -cBenefit;
- isZeroMatrix = false;
- }
-
- ++ci;
- }
-
- ++ri;
- }
-
- // If this turns out to be a zero matrix...
- if (isZeroMatrix) {
- // ...free it and return null.
- delete m;
- return 0;
- }
-
- return m;
-}
-
-RegAllocPBQP::CoalesceMap RegAllocPBQP::findCoalesces() {
-
- typedef MachineFunction::const_iterator MFIterator;
- typedef MachineBasicBlock::const_iterator MBBIterator;
- typedef LiveInterval::const_vni_iterator VNIIterator;
-
- CoalesceMap coalescesFound;
-
- // To find coalesces we need to iterate over the function looking for
- // copy instructions.
- for (MFIterator bbItr = mf->begin(), bbEnd = mf->end();
- bbItr != bbEnd; ++bbItr) {
-
- const MachineBasicBlock *mbb = &*bbItr;
-
- for (MBBIterator iItr = mbb->begin(), iEnd = mbb->end();
- iItr != iEnd; ++iItr) {
-
- const MachineInstr *instr = &*iItr;
-
- // If this isn't a copy then continue to the next instruction.
- if (!instr->isCopy())
- continue;
-
- unsigned srcReg = instr->getOperand(1).getReg();
- unsigned dstReg = instr->getOperand(0).getReg();
-
- // If the registers are already the same our job is nice and easy.
- if (dstReg == srcReg)
- continue;
-
- bool srcRegIsPhysical = TargetRegisterInfo::isPhysicalRegister(srcReg),
- dstRegIsPhysical = TargetRegisterInfo::isPhysicalRegister(dstReg);
-
- // If both registers are physical then we can't coalesce.
- if (srcRegIsPhysical && dstRegIsPhysical)
- continue;
-
- // If it's a copy that includes two virtual register but the source and
- // destination classes differ then we can't coalesce.
- if (!srcRegIsPhysical && !dstRegIsPhysical &&
- mri->getRegClass(srcReg) != mri->getRegClass(dstReg))
- continue;
-
- // If one is physical and one is virtual, check that the physical is
- // allocatable in the class of the virtual.
- if (srcRegIsPhysical && !dstRegIsPhysical) {
- const TargetRegisterClass *dstRegClass = mri->getRegClass(dstReg);
- if (std::find(dstRegClass->allocation_order_begin(*mf),
- dstRegClass->allocation_order_end(*mf), srcReg) ==
- dstRegClass->allocation_order_end(*mf))
- continue;
- }
- if (!srcRegIsPhysical && dstRegIsPhysical) {
- const TargetRegisterClass *srcRegClass = mri->getRegClass(srcReg);
- if (std::find(srcRegClass->allocation_order_begin(*mf),
- srcRegClass->allocation_order_end(*mf), dstReg) ==
- srcRegClass->allocation_order_end(*mf))
- continue;
- }
-
- // If we've made it here we have a copy with compatible register classes.
- // We can probably coalesce, but we need to consider overlap.
- const LiveInterval *srcLI = &lis->getInterval(srcReg),
- *dstLI = &lis->getInterval(dstReg);
-
- if (srcLI->overlaps(*dstLI)) {
- // Even in the case of an overlap we might still be able to coalesce,
- // but we need to make sure that no definition of either range occurs
- // while the other range is live.
-
- // Otherwise start by assuming we're ok.
- bool badDef = false;
-
- // Test all defs of the source range.
- for (VNIIterator
- vniItr = srcLI->vni_begin(), vniEnd = srcLI->vni_end();
- vniItr != vniEnd; ++vniItr) {
-
- // If we find a poorly defined def we err on the side of caution.
- if (!(*vniItr)->def.isValid()) {
- badDef = true;
- break;
- }
-
- // If we find a def that kills the coalescing opportunity then
- // record it and break from the loop.
- if (dstLI->liveAt((*vniItr)->def)) {
- badDef = true;
- break;
- }
- }
-
- // If we have a bad def give up, continue to the next instruction.
- if (badDef)
- continue;
-
- // Otherwise test definitions of the destination range.
- for (VNIIterator
- vniItr = dstLI->vni_begin(), vniEnd = dstLI->vni_end();
- vniItr != vniEnd; ++vniItr) {
-
- // We want to make sure we skip the copy instruction itself.
- if ((*vniItr)->getCopy() == instr)
- continue;
-
- if (!(*vniItr)->def.isValid()) {
- badDef = true;
- break;
- }
-
- if (srcLI->liveAt((*vniItr)->def)) {
- badDef = true;
- break;
- }
- }
-
- // As before a bad def we give up and continue to the next instr.
- if (badDef)
- continue;
- }
-
- // If we make it to here then either the ranges didn't overlap, or they
- // did, but none of their definitions would prevent us from coalescing.
- // We're good to go with the coalesce.
-
- float cBenefit = std::pow(10.0f, (float)loopInfo->getLoopDepth(mbb)) / 5.0;
-
- coalescesFound[RegPair(srcReg, dstReg)] = cBenefit;
- coalescesFound[RegPair(dstReg, srcReg)] = cBenefit;
- }
-
- }
-
- return coalescesFound;
-}
-
void RegAllocPBQP::findVRegIntervalsToAlloc() {
// Iterate over all live ranges.
@@ -834,171 +469,6 @@
}
}
-PBQP::Graph RegAllocPBQP::constructPBQPProblemOld() {
-
- typedef std::vector LIVector;
- typedef std::vector RegVector;
-
- // This will store the physical intervals for easy reference.
- LIVector physIntervals;
-
- // Start by clearing the old node <-> live interval mappings & allowed sets
- li2Node.clear();
- node2LI.clear();
- allowedSets.clear();
-
- // Populate physIntervals, update preg use:
- for (LiveIntervals::iterator itr = lis->begin(), end = lis->end();
- itr != end; ++itr) {
-
- if (TargetRegisterInfo::isPhysicalRegister(itr->first)) {
- physIntervals.push_back(itr->second);
- mri->setPhysRegUsed(itr->second->reg);
- }
- }
-
- // Iterate over vreg intervals, construct live interval <-> node number
- // mappings.
- for (RegSet::const_iterator itr = vregsToAlloc.begin(),
- end = vregsToAlloc.end();
- itr != end; ++itr) {
- const LiveInterval *li = &lis->getInterval(*itr);
-
- li2Node[li] = node2LI.size();
- node2LI.push_back(li);
- }
-
- // Get the set of potential coalesces.
- CoalesceMap coalesces;
-
- if (pbqpCoalescing) {
- coalesces = findCoalesces();
- }
-
- // Construct a PBQP solver for this problem
- PBQP::Graph problem;
- problemNodes.resize(vregsToAlloc.size());
-
- // Resize allowedSets container appropriately.
- allowedSets.resize(vregsToAlloc.size());
-
- BitVector ReservedRegs = tri->getReservedRegs(*mf);
-
- // Iterate over virtual register intervals to compute allowed sets...
- for (unsigned node = 0; node < node2LI.size(); ++node) {
-
- // Grab pointers to the interval and its register class.
- const LiveInterval *li = node2LI[node];
- const TargetRegisterClass *liRC = mri->getRegClass(li->reg);
-
- // Start by assuming all allocable registers in the class are allowed...
- RegVector liAllowed;
- TargetRegisterClass::iterator aob = liRC->allocation_order_begin(*mf);
- TargetRegisterClass::iterator aoe = liRC->allocation_order_end(*mf);
- for (TargetRegisterClass::iterator it = aob; it != aoe; ++it)
- if (!ReservedRegs.test(*it))
- liAllowed.push_back(*it);
-
- // Eliminate the physical registers which overlap with this range, along
- // with all their aliases.
- for (LIVector::iterator pItr = physIntervals.begin(),
- pEnd = physIntervals.end(); pItr != pEnd; ++pItr) {
-
- if (!li->overlaps(**pItr))
- continue;
-
- unsigned pReg = (*pItr)->reg;
-
- // If we get here then the live intervals overlap, but we're still ok
- // if they're coalescable.
- if (coalesces.find(RegPair(li->reg, pReg)) != coalesces.end()) {
- DEBUG(dbgs() << "CoalescingOverride: (" << li->reg << ", " << pReg << ")\n");
- continue;
- }
-
- // If we get here then we have a genuine exclusion.
-
- // Remove the overlapping reg...
- RegVector::iterator eraseItr =
- std::find(liAllowed.begin(), liAllowed.end(), pReg);
-
- if (eraseItr != liAllowed.end())
- liAllowed.erase(eraseItr);
-
- const unsigned *aliasItr = tri->getAliasSet(pReg);
-
- if (aliasItr != 0) {
- // ...and its aliases.
- for (; *aliasItr != 0; ++aliasItr) {
- RegVector::iterator eraseItr =
- std::find(liAllowed.begin(), liAllowed.end(), *aliasItr);
-
- if (eraseItr != liAllowed.end()) {
- liAllowed.erase(eraseItr);
- }
- }
- }
- }
-
- // Copy the allowed set into a member vector for use when constructing cost
- // vectors & matrices, and mapping PBQP solutions back to assignments.
- allowedSets[node] = AllowedSet(liAllowed.begin(), liAllowed.end());
-
- // Set the spill cost to the interval weight, or epsilon if the
- // interval weight is zero
- PBQP::PBQPNum spillCost = (li->weight != 0.0) ?
- li->weight : std::numeric_limits::min();
-
- // Build a cost vector for this interval.
- problemNodes[node] =
- problem.addNode(
- buildCostVector(li->reg, allowedSets[node], coalesces, spillCost));
-
- }
-
-
- // Now add the cost matrices...
- for (unsigned node1 = 0; node1 < node2LI.size(); ++node1) {
- const LiveInterval *li = node2LI[node1];
-
- // Test for live range overlaps and insert interference matrices.
- for (unsigned node2 = node1 + 1; node2 < node2LI.size(); ++node2) {
- const LiveInterval *li2 = node2LI[node2];
-
- CoalesceMap::const_iterator cmItr =
- coalesces.find(RegPair(li->reg, li2->reg));
-
- PBQP::Matrix *m = 0;
-
- if (cmItr != coalesces.end()) {
- m = buildCoalescingMatrix(allowedSets[node1], allowedSets[node2],
- cmItr->second);
- }
- else if (li->overlaps(*li2)) {
- m = buildInterferenceMatrix(allowedSets[node1], allowedSets[node2]);
- }
-
- if (m != 0) {
- problem.addEdge(problemNodes[node1],
- problemNodes[node2],
- *m);
-
- delete m;
- }
- }
- }
-
- assert(problem.getNumNodes() == allowedSets.size());
-/*
- std::cerr << "Allocating for " << problem.getNumNodes() << " nodes, "
- << problem.getNumEdges() << " edges.\n";
-
- problem.printDot(std::cerr);
-*/
- // We're done, PBQP problem constructed - return it.
- return problem;
-}
-
void RegAllocPBQP::addStackInterval(const LiveInterval *spilled,
MachineRegisterInfo* mri) {
int stackSlot = vrm->getStackSlot(spilled->reg);
@@ -1020,77 +490,6 @@
stackInterval.MergeRangesInAsValue(rhsInterval, vni);
}
-bool RegAllocPBQP::mapPBQPToRegAllocOld(const PBQP::Solution &solution) {
-
- // Set to true if we have any spills
- bool anotherRoundNeeded = false;
-
- // Clear the existing allocation.
- vrm->clearAllVirt();
-
- // Iterate over the nodes mapping the PBQP solution to a register assignment.
- for (unsigned node = 0; node < node2LI.size(); ++node) {
- unsigned virtReg = node2LI[node]->reg,
- allocSelection = solution.getSelection(problemNodes[node]);
-
-
- // If the PBQP solution is non-zero it's a physical register...
- if (allocSelection != 0) {
- // Get the physical reg, subtracting 1 to account for the spill option.
- unsigned physReg = allowedSets[node][allocSelection - 1];
-
- DEBUG(dbgs() << "VREG " << virtReg << " -> "
- << tri->getName(physReg) << " (Option: " << allocSelection << ")\n");
-
- assert(physReg != 0);
-
- // Add to the virt reg map and update the used phys regs.
- vrm->assignVirt2Phys(virtReg, physReg);
- }
- // ...Otherwise it's a spill.
- else {
-
- // Make sure we ignore this virtual reg on the next round
- // of allocation
- vregsToAlloc.erase(virtReg);
-
- // Insert spill ranges for this live range
- const LiveInterval *spillInterval = node2LI[node];
- double oldSpillWeight = spillInterval->weight;
- SmallVector spillIs;
- rmf->rememberUseDefs(spillInterval);
- std::vector newSpills =
- lis->addIntervalsForSpills(*spillInterval, spillIs, loopInfo, *vrm);
- addStackInterval(spillInterval, mri);
- rmf->rememberSpills(spillInterval, newSpills);
-
- (void) oldSpillWeight;
- DEBUG(dbgs() << "VREG " << virtReg << " -> SPILLED (Option: 0, Cost: "
- << oldSpillWeight << ", New vregs: ");
-
- // Copy any newly inserted live intervals into the list of regs to
- // allocate.
- for (std::vector::const_iterator
- itr = newSpills.begin(), end = newSpills.end();
- itr != end; ++itr) {
-
- assert(!(*itr)->empty() && "Empty spill range.");
-
- DEBUG(dbgs() << (*itr)->reg << " ");
-
- vregsToAlloc.insert((*itr)->reg);
- }
-
- DEBUG(dbgs() << ")\n");
-
- // We need another round if spill intervals were added.
- anotherRoundNeeded |= !newSpills.empty();
- }
- }
-
- return !anotherRoundNeeded;
-}
-
bool RegAllocPBQP::mapPBQPToRegAlloc(const PBQPRAProblem &problem,
const PBQP::Solution &solution) {
// Set to true if we have any spills
@@ -1255,32 +654,18 @@
bool pbqpAllocComplete = false;
unsigned round = 0;
- if (!pbqpBuilder) {
- while (!pbqpAllocComplete) {
- DEBUG(dbgs() << " PBQP Regalloc round " << round << ":\n");
+ while (!pbqpAllocComplete) {
+ DEBUG(dbgs() << " PBQP Regalloc round " << round << ":\n");
- PBQP::Graph problem = constructPBQPProblemOld();
- PBQP::Solution solution =
- PBQP::HeuristicSolver::solve(problem);
+ std::auto_ptr problem =
+ builder->build(mf, lis, loopInfo, vregsToAlloc);
+ PBQP::Solution solution =
+ PBQP::HeuristicSolver::solve(
+ problem->getGraph());
- pbqpAllocComplete = mapPBQPToRegAllocOld(solution);
+ pbqpAllocComplete = mapPBQPToRegAlloc(*problem, solution);
- ++round;
- }
- } else {
- while (!pbqpAllocComplete) {
- DEBUG(dbgs() << " PBQP Regalloc round " << round << ":\n");
-
- std::auto_ptr problem =
- builder->build(mf, lis, loopInfo, vregsToAlloc);
- PBQP::Solution solution =
- PBQP::HeuristicSolver::solve(
- problem->getGraph());
-
- pbqpAllocComplete = mapPBQPToRegAlloc(*problem, solution);
-
- ++round;
- }
+ ++round;
}
}
@@ -1291,10 +676,6 @@
vregsToAlloc.clear();
emptyIntervalVRegs.clear();
- li2Node.clear();
- node2LI.clear();
- allowedSets.clear();
- problemNodes.clear();
DEBUG(dbgs() << "Post alloc VirtRegMap:\n" << *vrm << "\n");
From pichet2000 at gmail.com Mon Oct 4 07:31:20 2010
From: pichet2000 at gmail.com (Francois Pichet)
Date: Mon, 04 Oct 2010 12:31:20 -0000
Subject: [llvm-commits] [llvm] r115503 -
/llvm/trunk/unittests/Support/System.cpp
Message-ID: <20101004123120.4CCB62A6C130@llvm.org>
Author: fpichet
Date: Mon Oct 4 07:31:20 2010
New Revision: 115503
URL: http://llvm.org/viewvc/llvm-project?rev=115503&view=rev
Log:
static_cast to long, otherwise MSVC 2008 won't compile.
Modified:
llvm/trunk/unittests/Support/System.cpp
Modified: llvm/trunk/unittests/Support/System.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/Support/System.cpp?rev=115503&r1=115502&r2=115503&view=diff
==============================================================================
--- llvm/trunk/unittests/Support/System.cpp (original)
+++ llvm/trunk/unittests/Support/System.cpp Mon Oct 4 07:31:20 2010
@@ -11,6 +11,6 @@
TEST_F(SystemTest, TimeValue) {
sys::TimeValue now = sys::TimeValue::now();
time_t now_t = time(NULL);
- EXPECT_TRUE(abs(static_cast(now_t - now.toEpochTime())) < 2);
+ EXPECT_TRUE(abs(static_cast(now_t - now.toEpochTime())) < 2);
}
}
From bigcheesegs at gmail.com Mon Oct 4 09:45:37 2010
From: bigcheesegs at gmail.com (Michael Spencer)
Date: Mon, 4 Oct 2010 10:45:37 -0400
Subject: [llvm-commits] [Review request] test: adding triplets and
FileCheck-ize for cygming(and msvc)
In-Reply-To:
References:
Message-ID:
On Mon, Oct 4, 2010 at 12:27 AM, NAKAMURA Takumi wrote:
> Good afternoon, guys!
>
> I have many patches for tests. At first, I post 6 patchesets I think
> they would be simpler.
> Please give me any comments.
> Feel free for everyone to improve my patches and commit in yourself.
>
> Thank you in advance, ...Takumi
Thank you for working on all these. The main problem I have is with
changing the tripples. This is not a real fix for the tests. The tests
need to be changed to either support both Windows style x86[-64] code
and Linux/Darwin, or we need separate tests for them. Just changing
the tripple masks the problem.
FileCheck has rather advanced facilities for regular expressions and
variables. Most of the differences seem to be register choice due to
the calling conventions that Windows uses.
> ps. All tests pass on llvm/cygmingw with my other patches remained.
>
>
> * Principle
>
> ?- FileCheck-ize everything I touched.
> ?- Add appropriate triplets as "-mtriple=i686-linux" and
> "-mtriple=x86_64-linux".
>
> * 0001(1 file) -mtriple=i686-linux
>
> ?It was needed for Cygwin and Mingw.
See above, and this test passes for me on pure Windows.
> * 0002(29 files) -mtriple=x86_64-linux
>
> ?It was needed for incompatibility among win64 and others.
> ?They have been already FileCheck-ized.
See above.
> * 0003(18 files) FileCheck-ize
When replacing a grep line followed by count, you need to add a:
CHECK-NOT:
If you don't, you're not checking the greater than case.
> [snip...]
I'll review 4-6 later today, but they have many of the same problems above.
- Michael Spencer
From daniel at zuster.org Mon Oct 4 09:57:59 2010
From: daniel at zuster.org (Daniel Dunbar)
Date: Mon, 04 Oct 2010 14:57:59 -0000
Subject: [llvm-commits] [test-suite] r115505 - in
/test-suite/trunk/SingleSource/UnitTests/ObjC: Makefile
print-class-info-x86-32.m print-class-info-x86-32.reference_output
print-class-info-x86-64.m print-class-info-x86-64.reference_output
Message-ID: <20101004145759.878CA2A6C12E@llvm.org>
Author: ddunbar
Date: Mon Oct 4 09:57:59 2010
New Revision: 115505
URL: http://llvm.org/viewvc/llvm-project?rev=115505&view=rev
Log:
Remove print-class-info tests, they aren't very useful and are too tied to other
platform details (specific Foundation version, etc.)
Removed:
test-suite/trunk/SingleSource/UnitTests/ObjC/print-class-info-x86-32.m
test-suite/trunk/SingleSource/UnitTests/ObjC/print-class-info-x86-32.reference_output
test-suite/trunk/SingleSource/UnitTests/ObjC/print-class-info-x86-64.m
test-suite/trunk/SingleSource/UnitTests/ObjC/print-class-info-x86-64.reference_output
Modified:
test-suite/trunk/SingleSource/UnitTests/ObjC/Makefile
Modified: test-suite/trunk/SingleSource/UnitTests/ObjC/Makefile
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/ObjC/Makefile?rev=115505&r1=115504&r2=115505&view=diff
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/ObjC/Makefile (original)
+++ test-suite/trunk/SingleSource/UnitTests/ObjC/Makefile Mon Oct 4 09:57:59 2010
@@ -8,13 +8,6 @@
LDFLAGS += -lobjc -framework Foundation
PROGRAM_REQUIRED_TO_EXIT_OK := 1
-ifneq ($(ARCH),x86)
-PROGRAMS_TO_SKIP += print-class-info-x86-32
-endif
-ifneq ($(ARCH),x86_64)
-PROGRAMS_TO_SKIP += print-class-info-x86-64
-endif
-
# This is a known gcc / llvm-gcc miscompilation fixed in clang.
ifdef CC_UNDER_TEST_IS_LLVM_GCC
EXEC_XFAILS = dot-syntax-2
Removed: test-suite/trunk/SingleSource/UnitTests/ObjC/print-class-info-x86-32.m
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/UnitTests/ObjC/print-class-info-x86-32.m?rev=115504&view=auto
==============================================================================
--- test-suite/trunk/SingleSource/UnitTests/ObjC/print-class-info-x86-32.m (original)
+++ test-suite/trunk/SingleSource/UnitTests/ObjC/print-class-info-x86-32.m (removed)
@@ -1,422 +0,0 @@
-#include
-#include
-#include
-#include
-
- at protocol UnusedProtocol
-+(void) makeWaffles;
- at end
-
- at protocol P2
- at end
-
- at protocol P
- at required
-+(void) requiredProtocolClassMethod;
--(void) requiredProtocolInstanceMethod;
- at optional
-+(void) optionalProtocolClassMethod;
--(void) optionalProtocolInstanceMethod;
-
- at required
- at property int requiredProtocolProperty;
- at optional
- at property int optionalProtocolProperty; // XXX this is not actually
- // optional in Obj-C 2? or
- // maybe just in old ABI?
- at end
-
- at protocol CategoryProtocol
-+(void) categoryClassMethod;
--(void) categoryInstanceMethod;
- at end
-
- at interface A : NSObject
{
- at private
- int privateVar;
- at protected
- int protectedVar;
- at public
- int publicVar;
- __weak id weakVar;
- __strong id strongVar;
-
- int halfDynamicA, halfDynamicB;
-}
-
- at property(assign) int requiredProtocolProperty;
- at property(assign) int optionalProtocolProperty;
-
- at property(assign) int Ptest_a;
- at property(copy) id Ptest_b;
- at property(retain) id Ptest_c;
-
- at property(getter=iGetThings) int things;
- at property(setter=iSetOtherThings:) int otherThings;
-
- at property(assign) int dynamicNotReally;
- at property(assign) int halfDynamicA;
- at property(assign) int halfDynamicB;
-
-+(void) classMethod;
--(void) instanceMethod;
- at end
-
- at interface A ()
-+(void) extendedClassMethod;
--(void) extendedInstanceMethod;
-+(void) requiredProtocolClassMethod;
--(void) requiredProtocolInstanceMethod;
- at end
-
- at implementation A
- at dynamic Ptest_a, Ptest_b, Ptest_c;
- at dynamic things, otherThings;
-
- at dynamic dynamicNotReally;
--(int) dynamicNotReally {};
--(void) dynamicNotReally: (int) arg {};
-
- at synthesize halfDynamicA;
--(int) halfDynamicA {};
-
- at synthesize halfDynamicB;
--(void) halfDynamicB: (int) arg {};
-
- at synthesize requiredProtocolProperty = privateVar;
-#ifdef ABI2
- at synthesize optionalProtocolProperty = someRandomVar;
-#else
- at synthesize optionalProtocolProperty = publicVar;
-#endif
-
-+(void) classMethod {
- printf("I am a class method\n");
-}
--(void) instanceMethod {
- printf("I am an instance method\n");
-}
-
-+(void) requiredProtocolClassMethod {
- printf("I am a required protocol class method\n");
-}
-
--(void) requiredProtocolInstanceMethod {
- printf("I am a required protocol instance method\n");
-}
-
-+(void) extendedClassMethod {
- printf("I am an extended class method\n");
-}
--(void) extendedInstanceMethod {
- printf("I am an extended instance method\n");
-}
- at end
-
- at interface A ( A_Category )
-+(void) categoryClassMethod;
--(void) categoryInstanceMethod;
-
- at property(assign) int categoryProperty;
- at end
-
- at implementation A ( A_Category )
- at dynamic categoryProperty;
-
-+(void) categoryClassMethod {
-}
--(void) categoryInstanceMethod {
-}
- at end
-
-/***/
-
-int ivar_cmp(const void *av, const void *bv) {
- const Ivar *a = av;
- const Ivar *b = bv;
- return strcmp(ivar_getName(*a), ivar_getName(*b));
-}
-
-int methodDescription_cmp(const void *av, const void *bv) {
- const struct objc_method_description *a = av;
- const struct objc_method_description *b = bv;
- return strcmp(sel_getName(a->name), sel_getName(b->name));
-}
-
-int method_cmp(const void *av, const void *bv) {
- const Method *a = av;
- const Method *b = bv;
- return strcmp(method_getName(*a), method_getName(*b));
-}
-
-int property_cmp(const void *av, const void *bv) {
- const objc_property_t *a = av;
- const objc_property_t *b = bv;
- return strcmp(property_getName(*a), property_getName(*b));
-}
-
-int protocol_cmp(const void *av, const void *bv) {
- Protocol * const *a = av;
- Protocol * const *b = bv;
- return strcmp(protocol_getName(*a), protocol_getName(*b));
-}
-
-void sort_ivars(Ivar *ivars, unsigned numIvars) {
- qsort(ivars, numIvars, sizeof(*ivars), ivar_cmp);
-}
-
-void sort_methodDescriptions(struct objc_method_description *methods, unsigned numMethods) {
- qsort(methods, numMethods, sizeof(*methods), methodDescription_cmp);
-}
-
-void sort_methods(Method *methods, unsigned numMethods) {
- unsigned i;
- qsort(methods, numMethods, sizeof(*methods), method_cmp);
-}
-
-void sort_properties(objc_property_t *properties, unsigned numProperties) {
- qsort(properties, numProperties, sizeof(*properties), property_cmp);
-}
-
-void sort_protocols(Protocol **protocols, unsigned numProtocols) {
- qsort(protocols, numProtocols, sizeof(*protocols), protocol_cmp);
-}
-
-/***/
-
-static int indent = 0;
-#define PRINT1(e0,t0) printf("%*s" #e0 ": %" #t0 "\n", indent*2, "", e0)
-#define PRINT2(e0,t0,e1,t1) printf("%*s" #e0 ": %" #t0 ", " #e1 ": %" #t1 "\n", indent*2, "", e0, e1)
-#define PRINT3(e0,t0,e1,t1,e2,t2) printf("%*s" #e0 ": %" #t0 ", " #e1 ": %" #t1 ", " #e2 ": %" #t2 "\n", indent*2, "", e0, e1, e2)
-#define PRINT4(e0,t0,e1,t1,e2,t2,e3,t3) printf("%*s" #e0 ": %" #t0 ", " #e1 ": %" #t1 ", " #e2 ": %" #t2 ", " #e3 ": %" #t3 "\n", indent*2, "", e0, e1, e2, e3)
-#define PRINT5(e0,t0,e1,t1,e2,t2,e3,t3,e4,t4) printf("%*s" #e0 ": %" #t0 ", " #e1 ": %" #t1 ", " #e2 ": %" #t2 ", " #e3 ": %" #t3 ", " #e4 ": %" #t4 "\n", indent*2, "", e0, e1, e2, e3, e4)
-void printInfo(Class c, int printData) {
- unsigned i;
-
- ++indent;
- PRINT1(c != 0, d);
- PRINT1(class_getName(c), s);
- PRINT1(object_getClassName(c), s);
- PRINT1(objc_getClass(class_getName(c)) == c, d);
- PRINT1(class_conformsToProtocol(c, @protocol(P)), d);
-
- unsigned numIvars;
- Ivar *ivars = class_copyIvarList(c, &numIvars);
- sort_ivars(ivars, numIvars);
- PRINT1(numIvars, d);
- if (printData) {
- ++indent;
- for (i=0; i
-#include
-#include
-#include
-
- at protocol UnusedProtocol
-+(void) makeWaffles;
- at end
-
- at protocol P2
- at end
-
- at protocol P
- at required
-+(void) requiredProtocolClassMethod;
--(void) requiredProtocolInstanceMethod;
- at optional
-+(void) optionalProtocolClassMethod;
--(void) optionalProtocolInstanceMethod;
-
- at required
- at property int requiredProtocolProperty;
- at optional
- at property int optionalProtocolProperty; // XXX this is not actually
- // optional in Obj-C 2? or
- // maybe just in old ABI?
- at end
-
- at protocol CategoryProtocol
-+(void) categoryClassMethod;
--(void) categoryInstanceMethod;
- at end
-
- at interface A : NSObject
{
- at private
- int privateVar;
- at protected
- int protectedVar;
- at public
- int publicVar;
- __weak id weakVar;
- __strong id strongVar;
-
- int halfDynamicA, halfDynamicB;
-}
-
- at property(assign) int requiredProtocolProperty;
- at property(assign) int optionalProtocolProperty;
-
- at property(assign) int Ptest_a;
- at property(copy) id Ptest_b;
- at property(retain) id Ptest_c;
-
- at property(getter=iGetThings) int things;
- at property(setter=iSetOtherThings:) int otherThings;
-
- at property(assign) int dynamicNotReally;
- at property(assign) int halfDynamicA;
- at property(assign) int halfDynamicB;
-
-+(void) classMethod;
--(void) instanceMethod;
- at end
-
- at interface A ()
-+(void) extendedClassMethod;
--(void) extendedInstanceMethod;
-+(void) requiredProtocolClassMethod;
--(void) requiredProtocolInstanceMethod;
- at end
-
- at implementation A
- at dynamic Ptest_a, Ptest_b, Ptest_c;
- at dynamic things, otherThings;
-
- at dynamic dynamicNotReally;
--(int) dynamicNotReally {};
--(void) dynamicNotReally: (int) arg {};
-
- at synthesize halfDynamicA;
--(int) halfDynamicA {};
-
- at synthesize halfDynamicB;
--(void) halfDynamicB: (int) arg {};
-
- at synthesize requiredProtocolProperty = privateVar;
-#ifdef ABI2
- at synthesize optionalProtocolProperty = someRandomVar;
-#else
- at synthesize optionalProtocolProperty = publicVar;
-#endif
-
-+(void) classMethod {
- printf("I am a class method\n");
-}
--(void) instanceMethod {
- printf("I am an instance method\n");
-}
-
-+(void) requiredProtocolClassMethod {
- printf("I am a required protocol class method\n");
-}
-
--(void) requiredProtocolInstanceMethod {
- printf("I am a required protocol instance method\n");
-}
-
-+(void) extendedClassMethod {
- printf("I am an extended class method\n");
-}
--(void) extendedInstanceMethod {
- printf("I am an extended instance method\n");
-}
- at end
-
- at interface A ( A_Category )
-+(void) categoryClassMethod;
--(void) categoryInstanceMethod;
-
- at property(assign) int categoryProperty;
- at end
-
- at implementation A ( A_Category )
- at dynamic categoryProperty;
-
-+(void) categoryClassMethod {
-}
--(void) categoryInstanceMethod {
-}
- at end
-
-/***/
-
-int ivar_cmp(const void *av, const void *bv) {
- const Ivar *a = av;
- const Ivar *b = bv;
- return strcmp(ivar_getName(*a), ivar_getName(*b));
-}
-
-int methodDescription_cmp(const void *av, const void *bv) {
- const struct objc_method_description *a = av;
- const struct objc_method_description *b = bv;
- return strcmp(sel_getName(a->name), sel_getName(b->name));
-}
-
-int method_cmp(const void *av, const void *bv) {
- const Method *a = av;
- const Method *b = bv;
- return strcmp(method_getName(*a), method_getName(*b));
-}
-
-int property_cmp(const void *av, const void *bv) {
- const objc_property_t *a = av;
- const objc_property_t *b = bv;
- return strcmp(property_getName(*a), property_getName(*b));
-}
-
-int protocol_cmp(const void *av, const void *bv) {
- Protocol * const *a = av;
- Protocol * const *b = bv;
- return strcmp(protocol_getName(*a), protocol_getName(*b));
-}
-
-void sort_ivars(Ivar *ivars, unsigned numIvars) {
- qsort(ivars, numIvars, sizeof(*ivars), ivar_cmp);
-}
-
-void sort_methodDescriptions(struct objc_method_description *methods, unsigned numMethods) {
- qsort(methods, numMethods, sizeof(*methods), methodDescription_cmp);
-}
-
-void sort_methods(Method *methods, unsigned numMethods) {
- unsigned i;
- qsort(methods, numMethods, sizeof(*methods), method_cmp);
-}
-
-void sort_properties(objc_property_t *properties, unsigned numProperties) {
- qsort(properties, numProperties, sizeof(*properties), property_cmp);
-}
-
-void sort_protocols(Protocol **protocols, unsigned numProtocols) {
- qsort(protocols, numProtocols, sizeof(*protocols), protocol_cmp);
-}
-
-/***/
-
-static int indent = 0;
-#define PRINT1(e0,t0) printf("%*s" #e0 ": %" #t0 "\n", indent*2, "", e0)
-#define PRINT2(e0,t0,e1,t1) printf("%*s" #e0 ": %" #t0 ", " #e1 ": %" #t1 "\n", indent*2, "", e0, e1)
-#define PRINT3(e0,t0,e1,t1,e2,t2) printf("%*s" #e0 ": %" #t0 ", " #e1 ": %" #t1 ", " #e2 ": %" #t2 "\n", indent*2, "", e0, e1, e2)
-#define PRINT4(e0,t0,e1,t1,e2,t2,e3,t3) printf("%*s" #e0 ": %" #t0 ", " #e1 ": %" #t1 ", " #e2 ": %" #t2 ", " #e3 ": %" #t3 "\n", indent*2, "", e0, e1, e2, e3)
-#define PRINT5(e0,t0,e1,t1,e2,t2,e3,t3,e4,t4) printf("%*s" #e0 ": %" #t0 ", " #e1 ": %" #t1 ", " #e2 ": %" #t2 ", " #e3 ": %" #t3 ", " #e4 ": %" #t4 "\n", indent*2, "", e0, e1, e2, e3, e4)
-void printInfo(Class c, int printData) {
- unsigned i;
-
- ++indent;
- PRINT1(c != 0, d);
- PRINT1(class_getName(c), s);
- PRINT1(object_getClassName(c), s);
- PRINT1(objc_getClass(class_getName(c)) == c, d);
- PRINT1(class_conformsToProtocol(c, @protocol(P)), d);
-
- unsigned numIvars;
- Ivar *ivars = class_copyIvarList(c, &numIvars);
- sort_ivars(ivars, numIvars);
- PRINT1(numIvars, d);
- if (printData) {
- ++indent;
- for (i=0; i
Author: rafael
Date: Mon Oct 4 10:28:43 2010
New Revision: 115506
URL: http://llvm.org/viewvc/llvm-project?rev=115506&view=rev
Log:
Correctly compute the relocation when it is not in the first fragment.
Modified:
llvm/trunk/lib/MC/ELFObjectWriter.cpp
llvm/trunk/test/MC/ELF/pic-diff.s
Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=115506&r1=115505&r2=115506&view=diff
==============================================================================
--- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original)
+++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Mon Oct 4 10:28:43 2010
@@ -539,7 +539,7 @@
const MCSymbol &SymbolB = RefB->getSymbol();
MCSymbolData &SDB = Asm.getSymbolData(SymbolB);
IsPCRel = true;
- Value += Fixup.getOffset() - Layout.getSymbolAddress(&SDB);
+ Value += Layout.getFragmentOffset(Fragment) + Fixup.getOffset() - Layout.getSymbolAddress(&SDB);
}
// Check that this case has already been fully resolved before we get
Modified: llvm/trunk/test/MC/ELF/pic-diff.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/pic-diff.s?rev=115506&r1=115505&r2=115506&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/pic-diff.s (original)
+++ llvm/trunk/test/MC/ELF/pic-diff.s Mon Oct 4 10:28:43 2010
@@ -19,7 +19,8 @@
// CHECK-NEXT: ),
// CHECK-NEXT: ])
-.zero 4
+.zero 1
+.align 4
foo:
.zero 8
.long baz - foo
From baldrick at free.fr Mon Oct 4 10:38:45 2010
From: baldrick at free.fr (Duncan Sands)
Date: Mon, 04 Oct 2010 15:38:45 -0000
Subject: [llvm-commits] [zorg] r115507 - in /zorg/trunk:
buildbot/osuosl/master/config/builders.py
zorg/buildbot/builders/LLVMGCCBuilder.py
Message-ID: <20101004153845.979242A6C12E@llvm.org>
Author: baldrick
Date: Mon Oct 4 10:38:45 2010
New Revision: 115507
URL: http://llvm.org/viewvc/llvm-project?rev=115507&view=rev
Log:
Make it possible to specify extra languages for llvm-gcc. Give
this a whirl by having the i386 buildbot build Fortran as well
as C and C++.
Modified:
zorg/trunk/buildbot/osuosl/master/config/builders.py
zorg/trunk/zorg/buildbot/builders/LLVMGCCBuilder.py
Modified: zorg/trunk/buildbot/osuosl/master/config/builders.py
URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/buildbot/osuosl/master/config/builders.py?rev=115507&r1=115506&r2=115507&view=diff
==============================================================================
--- zorg/trunk/buildbot/osuosl/master/config/builders.py (original)
+++ zorg/trunk/buildbot/osuosl/master/config/builders.py Mon Oct 4 10:38:45 2010
@@ -94,6 +94,7 @@
'slavenames':["gcc11"],
'builddir':"llvm-gcc-i386-linux-selfhost",
'factory':LLVMGCCBuilder.getLLVMGCCBuildFactory(triple='i686-pc-linux-gnu',
+ extra_languages="fortran",
extra_configure_args=['--disable-multilib',
'--enable-targets=all','--with-as=/home/baldrick/bin32/as'])},
]
Modified: zorg/trunk/zorg/buildbot/builders/LLVMGCCBuilder.py
URL: http://llvm.org/viewvc/llvm-project/zorg/trunk/zorg/buildbot/builders/LLVMGCCBuilder.py?rev=115507&r1=115506&r2=115507&view=diff
==============================================================================
--- zorg/trunk/zorg/buildbot/builders/LLVMGCCBuilder.py (original)
+++ zorg/trunk/zorg/buildbot/builders/LLVMGCCBuilder.py Mon Oct 4 10:38:45 2010
@@ -13,8 +13,9 @@
triple=None, build=None, host=None, target=None,
useTwoStage=True, stage1_config='Release+Asserts',
stage2_config='Release+Asserts', make='make',
- extra_configure_args=[], verbose=False, env = {},
- defaultBranch='trunk', timeout=20):
+ extra_configure_args=[], extra_languages=None,
+ verbose=False, env = {}, defaultBranch='trunk',
+ timeout=20):
if build or host or target:
if not build or not host or not target:
raise ValueError,"Must specify all of 'build', 'host', 'target' if used."
@@ -103,8 +104,11 @@
workdir=".", env=env))
# Configure llvm-gcc.
- base_llvmgcc_configure_args = ["../llvm-gcc.src/configure",
- "--enable-languages=c,c++"]
+ base_llvmgcc_configure_args = ["../llvm-gcc.src/configure"]
+ llvmgcc_languages = "--enable-languages=c,c++"
+ if extra_languages:
+ llvmgcc_languages = llvmgcc_languages + "," + extra_languages
+ base_llvmgcc_configure_args.append(llvmgcc_languages)
if gxxincludedir:
base_llvmgcc_configure_args.append('--with-gxx-include-dir=' + gxxincludedir)
base_llvmgcc_configure_args.extend(extra_configure_args)
From grosbach at apple.com Mon Oct 4 10:39:57 2010
From: grosbach at apple.com (Jim Grosbach)
Date: Mon, 4 Oct 2010 08:39:57 -0700
Subject: [llvm-commits] [llvm] r115393 - in /llvm/trunk: CMakeLists.txt
lib/Target/MSP430/InstPrinter/CMakeLists.txt
lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp
lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h
lib/Target/MSP430/InstPrinter/Makefi
In-Reply-To:
References:
<07E65C41-D605-4147-B976-1BC502C5BF68@apple.com>
Message-ID: <512DB063-78F7-4D30-A660-DECA1CC817D2@apple.com>
Hi Nick,
That's a great help, yes. Thank you. I'm hoping to get some time to look at this again this afternoon. It's very odd that this only shows up on Linux. Now that we know that, I should be able to reproduce this issue.
The getRegisterName() reference is expected, but going the other direction (from the instruction printer to codegen) is not, and if there really is such a reference, it's a definite bug that needs cleaned up. I don't see an obvious reference to GR8 or GR16 in the instruction printer source, though. I'll look more closely later.
Thanks again,
Jim
On Oct 3, 2010, at 11:39 PM, Nick Lewycky wrote:
> Here's what the GenLibDeps.pl script thinks is going on.
>
> libLLVMMSP430CodeGen.a uses but does not define symbols:
> _ZN4llvm17MSP430InstPrinter15getRegisterNameEj aka. llvm::MSP430InstPrinter::getRegisterName(unsigned int)
> which are provided by libLLVMMSP430AsmPrinter.a. Going in the other direction, libLLVMMSP430AsmPrinter.a uses symbols:
> _ZN4llvm6MSP43011GR8RegClassE aka. llvm::MSP430::GR8RegClass
> _ZN4llvm6MSP43012GR16RegClassE aka. llvm::MSP430::GR16RegClass
>
> GR8RegClass and GR16RegClass is defined in MSP430RegisterInfo.o (which is rolled into ...CodeGen.a). Its only reference in ...AsmPrinter.a is by MSP430InstPrinter.o.
>
> The getRegisterName function is defined in MSP430InstPrinter.o (part of ...AsmPrinter.a) and its only reference in ...CodeGen.a is by MSP430AsmPrinter.o.
>
> Is that enough to go on?
>
> Nick
>
> On 1 October 2010 18:43, Nick Lewycky wrote:
> Okay. You can see that almost all of the open-source builders were broken:
>
> http://google1.osuosl.org:8011/console
>
> in that time. It's impossible for this particular error to occur in a cmake build because cmake doesn't run find-cycles.pl (last i checked). My suspicion is that the cmake builders were working fine while configure+make ones were not?
>
> I'm going to wind back to the broken point and try to reproduce the failure and see if I can figure out what the cyclic dependency actually was.
>
> Nick
>
>
> On 1 October 2010 18:27, Jim Grosbach wrote:
> That's very strange. I do a configure/make here, and it works, and lots of bots using that were green as well. If there's a case I missed, I'd love to have some help tracking down what it is. Can you try a "make clean" and see if that works? Maybe there's just something stale that the configure portion of the patch needs to clean up.
>
> -Jim
>
>
>
> On Oct 1, 2010, at 6:24 PM, Nick Lewycky wrote:
>
>> Nope, it broke under a regular configure+make in-srctree incremental build on multiple different machines.
>>
>> On 1 October 2010 18:22, Jim Grosbach wrote:
>> Nick,
>>
>> These only break for you under CMake, right? That's the only place I've been able to reproduce failures.
>>
>> -Jim
>>
>>
>> On Oct 1, 2010, at 6:06 PM, Nick Lewycky wrote:
>>
>> > Author: nicholas
>> > Date: Fri Oct 1 20:06:42 2010
>> > New Revision: 115393
>> >
>> > URL: http://llvm.org/viewvc/llvm-project?rev=115393&view=rev
>> > Log:
>> > Revert patches r115363 r115367 r115391 due to build breakage:
>> > llvm[2]: Updated LibDeps.txt because dependencies changed
>> > llvm[2]: Checking for cyclic dependencies between LLVM libraries.
>> > find-cycles.pl: Circular dependency between *.a files:
>> > find-cycles.pl: libLLVMMSP430AsmPrinter.a libLLVMMSP430CodeGen.a
>> >
>> >
>> > Modified:
>> > llvm/trunk/CMakeLists.txt
>> > llvm/trunk/lib/Target/MSP430/InstPrinter/CMakeLists.txt
>> > llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp
>> > llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h
>> > llvm/trunk/lib/Target/MSP430/InstPrinter/Makefile
>> > llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp
>> > llvm/trunk/lib/Target/MSP430/MSP430MCInstLower.cpp
>> > llvm/trunk/lib/Target/MSP430/MSP430MCInstLower.h
>> > llvm/trunk/lib/Target/MSP430/Makefile
>> >
>> > Modified: llvm/trunk/CMakeLists.txt
>> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/CMakeLists.txt?rev=115393&r1=115392&r2=115393&view=diff
>> > ==============================================================================
>> > --- llvm/trunk/CMakeLists.txt (original)
>> > +++ llvm/trunk/CMakeLists.txt Fri Oct 1 20:06:42 2010
>> > @@ -323,10 +323,6 @@
>> > add_subdirectory(lib/Target/${t}/AsmPrinter)
>> > set(LLVM_ENUM_ASM_PRINTERS
>> > "${LLVM_ENUM_ASM_PRINTERS}LLVM_ASM_PRINTER(${t})\n")
>> > - if( EXISTS ${LLVM_MAIN_SRC_DIR}/lib/Target/${t}/InstPrinter/CMakeLists.txt )
>> > - add_subdirectory(lib/Target/${t}/InstPrinter)
>> > - set(LLVM_ENUM_ASM_PRINTERS
>> > - "${LLVM_ENUM_ASM_PRINTERS}LLVM_ASM_PRINTER(${t})\n")
>> > endif( EXISTS ${LLVM_MAIN_SRC_DIR}/lib/Target/${t}/AsmPrinter/CMakeLists.txt )
>> > if( EXISTS ${LLVM_MAIN_SRC_DIR}/lib/Target/${t}/AsmParser/CMakeLists.txt )
>> > add_subdirectory(lib/Target/${t}/AsmParser)
>> >
>> > Modified: llvm/trunk/lib/Target/MSP430/InstPrinter/CMakeLists.txt
>> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/InstPrinter/CMakeLists.txt?rev=115393&r1=115392&r2=115393&view=diff
>> > ==============================================================================
>> > --- llvm/trunk/lib/Target/MSP430/InstPrinter/CMakeLists.txt (original)
>> > +++ llvm/trunk/lib/Target/MSP430/InstPrinter/CMakeLists.txt Fri Oct 1 20:06:42 2010
>> > @@ -1,6 +0,0 @@
>> > -include_directories( ${CMAKE_CURRENT_BINARY_DIR}/.. ${CMAKE_CURRENT_SOURCE_DIR}/.. )
>> > -
>> > -add_llvm_library(LLVMMSP430AsmPrinter
>> > - MSP430InstPrinter.cpp
>> > - )
>> > -add_dependencies(LLVMMSP430AsmPrinter MSP430CodeGenTable_gen)
>> >
>> > Modified: llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp
>> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp?rev=115393&r1=115392&r2=115393&view=diff
>> > ==============================================================================
>> > --- llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp (original)
>> > +++ llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp Fri Oct 1 20:06:42 2010
>> > @@ -1,114 +0,0 @@
>> > -//===-- MSP430InstPrinter.cpp - Convert MSP430 MCInst to assembly syntax --===//
>> > -//
>> > -// The LLVM Compiler Infrastructure
>> > -//
>> > -// This file is distributed under the University of Illinois Open Source
>> > -// License. See LICENSE.TXT for details.
>> > -//
>> > -//===----------------------------------------------------------------------===//
>> > -//
>> > -// This class prints an MSP430 MCInst to a .s file.
>> > -//
>> > -//===----------------------------------------------------------------------===//
>> > -
>> > -#define DEBUG_TYPE "asm-printer"
>> > -#include "MSP430.h"
>> > -#include "MSP430InstrInfo.h"
>> > -#include "MSP430InstPrinter.h"
>> > -#include "llvm/MC/MCInst.h"
>> > -#include "llvm/MC/MCAsmInfo.h"
>> > -#include "llvm/MC/MCExpr.h"
>> > -#include "llvm/Support/ErrorHandling.h"
>> > -#include "llvm/Support/FormattedStream.h"
>> > -using namespace llvm;
>> > -
>> > -
>> > -// Include the auto-generated portion of the assembly writer.
>> > -#include "MSP430GenAsmWriter.inc"
>> > -
>> > -void MSP430InstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
>> > - printInstruction(MI, O);
>> > -}
>> > -
>> > -void MSP430InstPrinter::printPCRelImmOperand(const MCInst *MI, unsigned OpNo,
>> > - raw_ostream &O) {
>> > - const MCOperand &Op = MI->getOperand(OpNo);
>> > - if (Op.isImm())
>> > - O << Op.getImm();
>> > - else {
>> > - assert(Op.isExpr() && "unknown pcrel immediate operand");
>> > - O << *Op.getExpr();
>> > - }
>> > -}
>> > -
>> > -void MSP430InstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
>> > - raw_ostream &O, const char *Modifier) {
>> > - assert((Modifier == 0 || Modifier[0] == 0) && "No modifiers supported");
>> > - const MCOperand &Op = MI->getOperand(OpNo);
>> > - if (Op.isReg()) {
>> > - O << getRegisterName(Op.getReg());
>> > - } else if (Op.isImm()) {
>> > - O << '#' << Op.getImm();
>> > - } else {
>> > - assert(Op.isExpr() && "unknown operand kind in printOperand");
>> > - O << '#' << *Op.getExpr();
>> > - }
>> > -}
>> > -
>> > -void MSP430InstPrinter::printSrcMemOperand(const MCInst *MI, unsigned OpNo,
>> > - raw_ostream &O,
>> > - const char *Modifier) {
>> > - const MCOperand &Base = MI->getOperand(OpNo);
>> > - const MCOperand &Disp = MI->getOperand(OpNo+1);
>> > -
>> > - // Print displacement first
>> > -
>> > - // If the global address expression is a part of displacement field with a
>> > - // register base, we should not emit any prefix symbol here, e.g.
>> > - // mov.w &foo, r1
>> > - // vs
>> > - // mov.w glb(r1), r2
>> > - // Otherwise (!) msp430-as will silently miscompile the output :(
>> > - if (!Base.getReg())
>> > - O << '&';
>> > -
>> > - if (Disp.isExpr())
>> > - O << *Disp.getExpr();
>> > - else {
>> > - assert(Disp.isImm() && "Expected immediate in displacement field");
>> > - O << Disp.getImm();
>> > - }
>> > -
>> > - // Print register base field
>> > - if (Base.getReg())
>> > - O << '(' << getRegisterName(Base.getReg()) << ')';
>> > -}
>> > -
>> > -void MSP430InstPrinter::printCCOperand(const MCInst *MI, unsigned OpNo,
>> > - raw_ostream &O) {
>> > - unsigned CC = MI->getOperand(OpNo).getImm();
>> > -
>> > - switch (CC) {
>> > - default:
>> > - llvm_unreachable("Unsupported CC code");
>> > - break;
>> > - case MSP430CC::COND_E:
>> > - O << "eq";
>> > - break;
>> > - case MSP430CC::COND_NE:
>> > - O << "ne";
>> > - break;
>> > - case MSP430CC::COND_HS:
>> > - O << "hs";
>> > - break;
>> > - case MSP430CC::COND_LO:
>> > - O << "lo";
>> > - break;
>> > - case MSP430CC::COND_GE:
>> > - O << "ge";
>> > - break;
>> > - case MSP430CC::COND_L:
>> > - O << 'l';
>> > - break;
>> > - }
>> > -}
>> >
>> > Modified: llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h
>> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h?rev=115393&r1=115392&r2=115393&view=diff
>> > ==============================================================================
>> > --- llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h (original)
>> > +++ llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h Fri Oct 1 20:06:42 2010
>> > @@ -1,43 +0,0 @@
>> > -//===-- MSP430InstPrinter.h - Convert MSP430 MCInst to assembly syntax ----===//
>> > -//
>> > -// The LLVM Compiler Infrastructure
>> > -//
>> > -// This file is distributed under the University of Illinois Open Source
>> > -// License. See LICENSE.TXT for details.
>> > -//
>> > -//===----------------------------------------------------------------------===//
>> > -//
>> > -// This class prints a MSP430 MCInst to a .s file.
>> > -//
>> > -//===----------------------------------------------------------------------===//
>> > -
>> > -#ifndef MSP430INSTPRINTER_H
>> > -#define MSP430INSTPRINTER_H
>> > -
>> > -#include "llvm/MC/MCInstPrinter.h"
>> > -
>> > -namespace llvm {
>> > - class MCOperand;
>> > -
>> > - class MSP430InstPrinter : public MCInstPrinter {
>> > - public:
>> > - MSP430InstPrinter(const MCAsmInfo &MAI) : MCInstPrinter(MAI) {
>> > - }
>> > -
>> > - virtual void printInst(const MCInst *MI, raw_ostream &O);
>> > -
>> > - // Autogenerated by tblgen.
>> > - void printInstruction(const MCInst *MI, raw_ostream &O);
>> > - static const char *getRegisterName(unsigned RegNo);
>> > -
>> > - void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O,
>> > - const char *Modifier = 0);
>> > - void printPCRelImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
>> > - void printSrcMemOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O,
>> > - const char *Modifier = 0);
>> > - void printCCOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
>> > -
>> > - };
>> > -}
>> > -
>> > -#endif
>> >
>> > Modified: llvm/trunk/lib/Target/MSP430/InstPrinter/Makefile
>> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/InstPrinter/Makefile?rev=115393&r1=115392&r2=115393&view=diff
>> > ==============================================================================
>> > --- llvm/trunk/lib/Target/MSP430/InstPrinter/Makefile (original)
>> > +++ llvm/trunk/lib/Target/MSP430/InstPrinter/Makefile Fri Oct 1 20:06:42 2010
>> > @@ -1,15 +0,0 @@
>> > -##===- lib/Target/MSP430/AsmPrinter/Makefile ---------------*- Makefile -*-===##
>> > -#
>> > -# The LLVM Compiler Infrastructure
>> > -#
>> > -# This file is distributed under the University of Illinois Open Source
>> > -# License. See LICENSE.TXT for details.
>> > -#
>> > -##===----------------------------------------------------------------------===##
>> > -LEVEL = ../../../..
>> > -LIBRARYNAME = LLVMMSP430AsmPrinter
>> > -
>> > -# Hack: we need to include 'main' MSP430 target directory to grab private headers
>> > -CPP.Flags += -I$(PROJ_OBJ_DIR)/.. -I$(PROJ_SRC_DIR)/..
>> > -
>> > -include $(LEVEL)/Makefile.common
>> >
>> > Modified: llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp
>> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp?rev=115393&r1=115392&r2=115393&view=diff
>> > ==============================================================================
>> > --- llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp (original)
>> > +++ llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp Fri Oct 1 20:06:42 2010
>> > @@ -1,179 +0,0 @@
>> > -//===-- MSP430AsmPrinter.cpp - MSP430 LLVM assembly writer ----------------===//
>> > -//
>> > -// The LLVM Compiler Infrastructure
>> > -//
>> > -// This file is distributed under the University of Illinois Open Source
>> > -// License. See LICENSE.TXT for details.
>> > -//
>> > -//===----------------------------------------------------------------------===//
>> > -//
>> > -// This file contains a printer that converts from our internal representation
>> > -// of machine-dependent LLVM code to the MSP430 assembly language.
>> > -//
>> > -//===----------------------------------------------------------------------===//
>> > -
>> > -#define DEBUG_TYPE "asm-printer"
>> > -#include "MSP430.h"
>> > -#include "MSP430InstrInfo.h"
>> > -#include "InstPrinter/MSP430InstPrinter.h"
>> > -#include "MSP430MCAsmInfo.h"
>> > -#include "MSP430MCInstLower.h"
>> > -#include "MSP430TargetMachine.h"
>> > -#include "llvm/Constants.h"
>> > -#include "llvm/DerivedTypes.h"
>> > -#include "llvm/Module.h"
>> > -#include "llvm/Assembly/Writer.h"
>> > -#include "llvm/CodeGen/AsmPrinter.h"
>> > -#include "llvm/CodeGen/MachineModuleInfo.h"
>> > -#include "llvm/CodeGen/MachineFunctionPass.h"
>> > -#include "llvm/CodeGen/MachineConstantPool.h"
>> > -#include "llvm/CodeGen/MachineInstr.h"
>> > -#include "llvm/MC/MCInst.h"
>> > -#include "llvm/MC/MCStreamer.h"
>> > -#include "llvm/MC/MCSymbol.h"
>> > -#include "llvm/Target/Mangler.h"
>> > -#include "llvm/Target/TargetData.h"
>> > -#include "llvm/Target/TargetLoweringObjectFile.h"
>> > -#include "llvm/Target/TargetRegistry.h"
>> > -#include "llvm/Support/raw_ostream.h"
>> > -using namespace llvm;
>> > -
>> > -namespace {
>> > - class MSP430AsmPrinter : public AsmPrinter {
>> > - public:
>> > - MSP430AsmPrinter(TargetMachine &TM, MCStreamer &Streamer)
>> > - : AsmPrinter(TM, Streamer) {}
>> > -
>> > - virtual const char *getPassName() const {
>> > - return "MSP430 Assembly Printer";
>> > - }
>> > -
>> > - void printOperand(const MachineInstr *MI, int OpNum,
>> > - raw_ostream &O, const char* Modifier = 0);
>> > - void printSrcMemOperand(const MachineInstr *MI, int OpNum,
>> > - raw_ostream &O);
>> > - bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
>> > - unsigned AsmVariant, const char *ExtraCode,
>> > - raw_ostream &O);
>> > - bool PrintAsmMemoryOperand(const MachineInstr *MI,
>> > - unsigned OpNo, unsigned AsmVariant,
>> > - const char *ExtraCode, raw_ostream &O);
>> > - void EmitInstruction(const MachineInstr *MI);
>> > - };
>> > -} // end of anonymous namespace
>> > -
>> > -
>> > -void MSP430AsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
>> > - raw_ostream &O, const char *Modifier) {
>> > - const MachineOperand &MO = MI->getOperand(OpNum);
>> > - switch (MO.getType()) {
>> > - default: assert(0 && "Not implemented yet!");
>> > - case MachineOperand::MO_Register:
>> > - O << MSP430InstPrinter::getRegisterName(MO.getReg());
>> > - return;
>> > - case MachineOperand::MO_Immediate:
>> > - if (!Modifier || strcmp(Modifier, "nohash"))
>> > - O << '#';
>> > - O << MO.getImm();
>> > - return;
>> > - case MachineOperand::MO_MachineBasicBlock:
>> > - O << *MO.getMBB()->getSymbol();
>> > - return;
>> > - case MachineOperand::MO_GlobalAddress: {
>> > - bool isMemOp = Modifier && !strcmp(Modifier, "mem");
>> > - uint64_t Offset = MO.getOffset();
>> > -
>> > - // If the global address expression is a part of displacement field with a
>> > - // register base, we should not emit any prefix symbol here, e.g.
>> > - // mov.w &foo, r1
>> > - // vs
>> > - // mov.w glb(r1), r2
>> > - // Otherwise (!) msp430-as will silently miscompile the output :(
>> > - if (!Modifier || strcmp(Modifier, "nohash"))
>> > - O << (isMemOp ? '&' : '#');
>> > - if (Offset)
>> > - O << '(' << Offset << '+';
>> > -
>> > - O << *Mang->getSymbol(MO.getGlobal());
>> > -
>> > - if (Offset)
>> > - O << ')';
>> > -
>> > - return;
>> > - }
>> > - case MachineOperand::MO_ExternalSymbol: {
>> > - bool isMemOp = Modifier && !strcmp(Modifier, "mem");
>> > - O << (isMemOp ? '&' : '#');
>> > - O << MAI->getGlobalPrefix() << MO.getSymbolName();
>> > - return;
>> > - }
>> > - }
>> > -}
>> > -
>> > -void MSP430AsmPrinter::printSrcMemOperand(const MachineInstr *MI, int OpNum,
>> > - raw_ostream &O) {
>> > - const MachineOperand &Base = MI->getOperand(OpNum);
>> > - const MachineOperand &Disp = MI->getOperand(OpNum+1);
>> > -
>> > - // Print displacement first
>> > -
>> > - // Imm here is in fact global address - print extra modifier.
>> > - if (Disp.isImm() && !Base.getReg())
>> > - O << '&';
>> > - printOperand(MI, OpNum+1, O, "nohash");
>> > -
>> > - // Print register base field
>> > - if (Base.getReg()) {
>> > - O << '(';
>> > - printOperand(MI, OpNum, O);
>> > - O << ')';
>> > - }
>> > -}
>> > -
>> > -/// PrintAsmOperand - Print out an operand for an inline asm expression.
>> > -///
>> > -bool MSP430AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
>> > - unsigned AsmVariant,
>> > - const char *ExtraCode, raw_ostream &O) {
>> > - // Does this asm operand have a single letter operand modifier?
>> > - if (ExtraCode && ExtraCode[0])
>> > - return true; // Unknown modifier.
>> > -
>> > - printOperand(MI, OpNo, O);
>> > - return false;
>> > -}
>> > -
>> > -bool MSP430AsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
>> > - unsigned OpNo, unsigned AsmVariant,
>> > - const char *ExtraCode,
>> > - raw_ostream &O) {
>> > - if (ExtraCode && ExtraCode[0]) {
>> > - return true; // Unknown modifier.
>> > - }
>> > - printSrcMemOperand(MI, OpNo, O);
>> > - return false;
>> > -}
>> > -
>> > -//===----------------------------------------------------------------------===//
>> > -void MSP430AsmPrinter::EmitInstruction(const MachineInstr *MI) {
>> > - MSP430MCInstLower MCInstLowering(OutContext, *Mang, *this);
>> > -
>> > - MCInst TmpInst;
>> > - MCInstLowering.Lower(MI, TmpInst);
>> > - OutStreamer.EmitInstruction(TmpInst);
>> > -}
>> > -
>> > -static MCInstPrinter *createMSP430MCInstPrinter(const Target &T,
>> > - unsigned SyntaxVariant,
>> > - const MCAsmInfo &MAI) {
>> > - if (SyntaxVariant == 0)
>> > - return new MSP430InstPrinter(MAI);
>> > - return 0;
>> > -}
>> > -
>> > -// Force static initialization.
>> > -extern "C" void LLVMInitializeMSP430AsmPrinter() {
>> > - RegisterAsmPrinter X(TheMSP430Target);
>> > - TargetRegistry::RegisterMCInstPrinter(TheMSP430Target,
>> > - createMSP430MCInstPrinter);
>> > -}
>> >
>> > Modified: llvm/trunk/lib/Target/MSP430/MSP430MCInstLower.cpp
>> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430MCInstLower.cpp?rev=115393&r1=115392&r2=115393&view=diff
>> > ==============================================================================
>> > --- llvm/trunk/lib/Target/MSP430/MSP430MCInstLower.cpp (original)
>> > +++ llvm/trunk/lib/Target/MSP430/MSP430MCInstLower.cpp Fri Oct 1 20:06:42 2010
>> > @@ -1,150 +0,0 @@
>> > -//===-- MSP430MCInstLower.cpp - Convert MSP430 MachineInstr to an MCInst---===//
>> > -//
>> > -// The LLVM Compiler Infrastructure
>> > -//
>> > -// This file is distributed under the University of Illinois Open Source
>> > -// License. See LICENSE.TXT for details.
>> > -//
>> > -//===----------------------------------------------------------------------===//
>> > -//
>> > -// This file contains code to lower MSP430 MachineInstrs to their corresponding
>> > -// MCInst records.
>> > -//
>> > -//===----------------------------------------------------------------------===//
>> > -
>> > -#include "MSP430MCInstLower.h"
>> > -#include "llvm/CodeGen/AsmPrinter.h"
>> > -#include "llvm/CodeGen/MachineBasicBlock.h"
>> > -#include "llvm/CodeGen/MachineInstr.h"
>> > -#include "llvm/MC/MCAsmInfo.h"
>> > -#include "llvm/MC/MCContext.h"
>> > -#include "llvm/MC/MCExpr.h"
>> > -#include "llvm/MC/MCInst.h"
>> > -#include "llvm/Target/Mangler.h"
>> > -#include "llvm/Support/raw_ostream.h"
>> > -#include "llvm/Support/ErrorHandling.h"
>> > -#include "llvm/ADT/SmallString.h"
>> > -using namespace llvm;
>> > -
>> > -MCSymbol *MSP430MCInstLower::
>> > -GetGlobalAddressSymbol(const MachineOperand &MO) const {
>> > - switch (MO.getTargetFlags()) {
>> > - default: llvm_unreachable("Unknown target flag on GV operand");
>> > - case 0: break;
>> > - }
>> > -
>> > - return Printer.Mang->getSymbol(MO.getGlobal());
>> > -}
>> > -
>> > -MCSymbol *MSP430MCInstLower::
>> > -GetExternalSymbolSymbol(const MachineOperand &MO) const {
>> > - switch (MO.getTargetFlags()) {
>> > - default: assert(0 && "Unknown target flag on GV operand");
>> > - case 0: break;
>> > - }
>> > -
>> > - return Printer.GetExternalSymbolSymbol(MO.getSymbolName());
>> > -}
>> > -
>> > -MCSymbol *MSP430MCInstLower::
>> > -GetJumpTableSymbol(const MachineOperand &MO) const {
>> > - SmallString<256> Name;
>> > - raw_svector_ostream(Name) << Printer.MAI->getPrivateGlobalPrefix() << "JTI"
>> > - << Printer.getFunctionNumber() << '_'
>> > - << MO.getIndex();
>> > -
>> > - switch (MO.getTargetFlags()) {
>> > - default: llvm_unreachable("Unknown target flag on GV operand");
>> > - case 0: break;
>> > - }
>> > -
>> > - // Create a symbol for the name.
>> > - return Ctx.GetOrCreateSymbol(Name.str());
>> > -}
>> > -
>> > -MCSymbol *MSP430MCInstLower::
>> > -GetConstantPoolIndexSymbol(const MachineOperand &MO) const {
>> > - SmallString<256> Name;
>> > - raw_svector_ostream(Name) << Printer.MAI->getPrivateGlobalPrefix() << "CPI"
>> > - << Printer.getFunctionNumber() << '_'
>> > - << MO.getIndex();
>> > -
>> > - switch (MO.getTargetFlags()) {
>> > - default: llvm_unreachable("Unknown target flag on GV operand");
>> > - case 0: break;
>> > - }
>> > -
>> > - // Create a symbol for the name.
>> > - return Ctx.GetOrCreateSymbol(Name.str());
>> > -}
>> > -
>> > -MCSymbol *MSP430MCInstLower::
>> > -GetBlockAddressSymbol(const MachineOperand &MO) const {
>> > - switch (MO.getTargetFlags()) {
>> > - default: assert(0 && "Unknown target flag on GV operand");
>> > - case 0: break;
>> > - }
>> > -
>> > - return Printer.GetBlockAddressSymbol(MO.getBlockAddress());
>> > -}
>> > -
>> > -MCOperand MSP430MCInstLower::
>> > -LowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym) const {
>> > - // FIXME: We would like an efficient form for this, so we don't have to do a
>> > - // lot of extra uniquing.
>> > - const MCExpr *Expr = MCSymbolRefExpr::Create(Sym, Ctx);
>> > -
>> > - switch (MO.getTargetFlags()) {
>> > - default: llvm_unreachable("Unknown target flag on GV operand");
>> > - case 0: break;
>> > - }
>> > -
>> > - if (!MO.isJTI() && MO.getOffset())
>> > - Expr = MCBinaryExpr::CreateAdd(Expr,
>> > - MCConstantExpr::Create(MO.getOffset(), Ctx),
>> > - Ctx);
>> > - return MCOperand::CreateExpr(Expr);
>> > -}
>> > -
>> > -void MSP430MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
>> > - OutMI.setOpcode(MI->getOpcode());
>> > -
>> > - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
>> > - const MachineOperand &MO = MI->getOperand(i);
>> > -
>> > - MCOperand MCOp;
>> > - switch (MO.getType()) {
>> > - default:
>> > - MI->dump();
>> > - assert(0 && "unknown operand type");
>> > - case MachineOperand::MO_Register:
>> > - // Ignore all implicit register operands.
>> > - if (MO.isImplicit()) continue;
>> > - MCOp = MCOperand::CreateReg(MO.getReg());
>> > - break;
>> > - case MachineOperand::MO_Immediate:
>> > - MCOp = MCOperand::CreateImm(MO.getImm());
>> > - break;
>> > - case MachineOperand::MO_MachineBasicBlock:
>> > - MCOp = MCOperand::CreateExpr(MCSymbolRefExpr::Create(
>> > - MO.getMBB()->getSymbol(), Ctx));
>> > - break;
>> > - case MachineOperand::MO_GlobalAddress:
>> > - MCOp = LowerSymbolOperand(MO, GetGlobalAddressSymbol(MO));
>> > - break;
>> > - case MachineOperand::MO_ExternalSymbol:
>> > - MCOp = LowerSymbolOperand(MO, GetExternalSymbolSymbol(MO));
>> > - break;
>> > - case MachineOperand::MO_JumpTableIndex:
>> > - MCOp = LowerSymbolOperand(MO, GetJumpTableSymbol(MO));
>> > - break;
>> > - case MachineOperand::MO_ConstantPoolIndex:
>> > - MCOp = LowerSymbolOperand(MO, GetConstantPoolIndexSymbol(MO));
>> > - break;
>> > - case MachineOperand::MO_BlockAddress:
>> > - MCOp = LowerSymbolOperand(MO, GetBlockAddressSymbol(MO));
>> > - }
>> > -
>> > - OutMI.addOperand(MCOp);
>> > - }
>> > -}
>> >
>> > Modified: llvm/trunk/lib/Target/MSP430/MSP430MCInstLower.h
>> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430MCInstLower.h?rev=115393&r1=115392&r2=115393&view=diff
>> > ==============================================================================
>> > --- llvm/trunk/lib/Target/MSP430/MSP430MCInstLower.h (original)
>> > +++ llvm/trunk/lib/Target/MSP430/MSP430MCInstLower.h Fri Oct 1 20:06:42 2010
>> > @@ -1,50 +0,0 @@
>> > -//===-- MSP430MCInstLower.h - Lower MachineInstr to MCInst ----------------===//
>> > -//
>> > -// The LLVM Compiler Infrastructure
>> > -//
>> > -// This file is distributed under the University of Illinois Open Source
>> > -// License. See LICENSE.TXT for details.
>> > -//
>> > -//===----------------------------------------------------------------------===//
>> > -
>> > -#ifndef MSP430_MCINSTLOWER_H
>> > -#define MSP430_MCINSTLOWER_H
>> > -
>> > -#include "llvm/Support/Compiler.h"
>> > -
>> > -namespace llvm {
>> > - class AsmPrinter;
>> > - class MCAsmInfo;
>> > - class MCContext;
>> > - class MCInst;
>> > - class MCOperand;
>> > - class MCSymbol;
>> > - class MachineInstr;
>> > - class MachineModuleInfoMachO;
>> > - class MachineOperand;
>> > - class Mangler;
>> > -
>> > - /// MSP430MCInstLower - This class is used to lower an MachineInstr
>> > - /// into an MCInst.
>> > -class LLVM_LIBRARY_VISIBILITY MSP430MCInstLower {
>> > - MCContext &Ctx;
>> > - Mangler &Mang;
>> > -
>> > - AsmPrinter &Printer;
>> > -public:
>> > - MSP430MCInstLower(MCContext &ctx, Mangler &mang, AsmPrinter &printer)
>> > - : Ctx(ctx), Mang(mang), Printer(printer) {}
>> > - void Lower(const MachineInstr *MI, MCInst &OutMI) const;
>> > -
>> > - MCOperand LowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym) const;
>> > -
>> > - MCSymbol *GetGlobalAddressSymbol(const MachineOperand &MO) const;
>> > - MCSymbol *GetExternalSymbolSymbol(const MachineOperand &MO) const;
>> > - MCSymbol *GetJumpTableSymbol(const MachineOperand &MO) const;
>> > - MCSymbol *GetConstantPoolIndexSymbol(const MachineOperand &MO) const;
>> > - MCSymbol *GetBlockAddressSymbol(const MachineOperand &MO) const;
>> > -};
>> > -
>> > -}
>> > -
>> > -#endif
>> >
>> > Modified: llvm/trunk/lib/Target/MSP430/Makefile
>> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/Makefile?rev=115393&r1=115392&r2=115393&view=diff
>> > ==============================================================================
>> > --- llvm/trunk/lib/Target/MSP430/Makefile (original)
>> > +++ llvm/trunk/lib/Target/MSP430/Makefile Fri Oct 1 20:06:42 2010
>> > @@ -18,7 +18,7 @@
>> > MSP430GenDAGISel.inc MSP430GenCallingConv.inc \
>> > MSP430GenSubtarget.inc
>> >
>> > -DIRS = InstPrinter TargetInfo
>> > +DIRS = AsmPrinter TargetInfo
>> >
>> > include $(LEVEL)/Makefile.common
>> >
>> >
>> >
>> > _______________________________________________
>> > llvm-commits mailing list
>> > llvm-commits at cs.uiuc.edu
>> > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>
>>
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>
>
>
>
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From rafael.espindola at gmail.com Mon Oct 4 10:59:01 2010
From: rafael.espindola at gmail.com (Rafael Espindola)
Date: Mon, 04 Oct 2010 15:59:01 -0000
Subject: [llvm-commits] [llvm] r115509 - in /llvm/trunk:
lib/MC/ELFObjectWriter.cpp test/MC/ELF/pic-diff.s
Message-ID: <20101004155901.6C2592A6C12E@llvm.org>
Author: rafael
Date: Mon Oct 4 10:59:01 2010
New Revision: 115509
URL: http://llvm.org/viewvc/llvm-project?rev=115509&view=rev
Log:
Include the section address in the computation of the relocation.
Modified:
llvm/trunk/lib/MC/ELFObjectWriter.cpp
llvm/trunk/test/MC/ELF/pic-diff.s
Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=115509&r1=115508&r2=115509&view=diff
==============================================================================
--- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original)
+++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Mon Oct 4 10:59:01 2010
@@ -539,7 +539,14 @@
const MCSymbol &SymbolB = RefB->getSymbol();
MCSymbolData &SDB = Asm.getSymbolData(SymbolB);
IsPCRel = true;
- Value += Layout.getFragmentOffset(Fragment) + Fixup.getOffset() - Layout.getSymbolAddress(&SDB);
+ MCSectionData *Sec = Fragment->getParent();
+
+ // Offset of the symbol in the section
+ int64_t a = Layout.getSymbolAddress(&SDB) - Layout.getSectionAddress(Sec);
+
+ // Ofeset of the relocation in the section
+ int64_t b = Layout.getFragmentOffset(Fragment) + Fixup.getOffset();
+ Value += b - a;
}
// Check that this case has already been fully resolved before we get
Modified: llvm/trunk/test/MC/ELF/pic-diff.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/pic-diff.s?rev=115509&r1=115508&r2=115509&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/pic-diff.s (original)
+++ llvm/trunk/test/MC/ELF/pic-diff.s Mon Oct 4 10:59:01 2010
@@ -19,6 +19,9 @@
// CHECK-NEXT: ),
// CHECK-NEXT: ])
+.zero 4
+.data
+
.zero 1
.align 4
foo:
From sabre at nondot.org Mon Oct 4 11:06:37 2010
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 04 Oct 2010 16:06:37 -0000
Subject: [llvm-commits] [llvm] r115510 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <20101004160637.EA97B2A6C12E@llvm.org>
Author: lattner
Date: Mon Oct 4 11:06:37 2010
New Revision: 115510
URL: http://llvm.org/viewvc/llvm-project?rev=115510&view=rev
Log:
another tweak
Modified:
llvm/trunk/docs/ReleaseNotes.html
Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=115510&r1=115509&r2=115510&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Mon Oct 4 11:06:37 2010
@@ -505,7 +505,7 @@
From sabre at nondot.org Mon Oct 4 11:14:54 2010
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 4 Oct 2010 09:14:54 -0700
Subject: [llvm-commits] [llvm] r115495 -
/llvm/trunk/docs/ReleaseNotes.html
In-Reply-To:
References: <20101004043925.632362A6C12E@llvm.org>
Message-ID: <87FEB9A7-90A3-4C77-A224-841117883015@nondot.org>
Ok, thanks!
On Oct 3, 2010, at 10:39 PM, Jakob Stoklund Olesen wrote:
>
> On Oct 3, 2010, at 9:39 PM, Chris Lattner wrote:
>
>> +
The new SubRegIndex tablegen class allows subregisters to be indexed
>> + symbolically instead of numerically. If your target uses subregisters you
>> + will need to adapt to use SubRegIndex when you upgrade to 2.8.
>
> Yup.
>
>>
>
> I don't think this is worth mentioning in the release notes since it doesn't really work yet.
>
> /jakob
>
From criswell at uiuc.edu Mon Oct 4 11:19:26 2010
From: criswell at uiuc.edu (John Criswell)
Date: Mon, 04 Oct 2010 16:19:26 -0000
Subject: [llvm-commits] [poolalloc] r115511 -
/poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp
Message-ID: <20101004161926.AE6172A6C12E@llvm.org>
Author: criswell
Date: Mon Oct 4 11:19:26 2010
New Revision: 115511
URL: http://llvm.org/viewvc/llvm-project?rev=115511&view=rev
Log:
Fixed assertion message.
No functionality changes.
Modified:
poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp
Modified: poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp?rev=115511&r1=115510&r2=115511&view=diff
==============================================================================
--- poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp (original)
+++ poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp Mon Oct 4 11:19:26 2010
@@ -684,7 +684,7 @@
void
FuncTransform::visitRuntimeCheck (CallSite CS) {
// A run-time check should have at least one argument for a pool
- assert ((CS.arg_size() > 1) && "strdup takes one argument!");
+ assert ((CS.arg_size() > 1) && "Runtime check takes more than one argument!");
//
// Get the pool handle for the pointer argument.
From sabre at nondot.org Mon Oct 4 11:46:07 2010
From: sabre at nondot.org (Chris Lattner)
Date: Mon, 04 Oct 2010 16:46:07 -0000
Subject: [llvm-commits] [llvm] r115515 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <20101004164607.EE40A2A6C12E@llvm.org>
Author: lattner
Date: Mon Oct 4 11:46:07 2010
New Revision: 115515
URL: http://llvm.org/viewvc/llvm-project?rev=115515&view=rev
Log:
scheduler update
Modified:
llvm/trunk/docs/ReleaseNotes.html
Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=115515&r1=115514&r2=115515&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Mon Oct 4 11:46:07 2010
@@ -734,12 +734,11 @@
is available from a previous instruction.
Atomic operations now get legalized into simpler atomic operations if not
natively supported, easing the implementation burden on targets.
-
The bottom-up pre-allocation scheduler is now register pressure aware,
- allowing it to avoid overscheduling in high pressure situations while still
- aggressively scheduling when registers are available.
-
A new instruction-level-parallelism pre-allocation scheduler is available,
- which is also register pressure aware. This scheduler has shown substantial
- wins on X86-64 and is on by default.
+
We have added two new bottom-up pre-allocation register pressure aware schedulers:
+
+
The hybrid scheduler schedules aggressively to minimize schedule length when registers are available and avoid overscheduling in high pressure situations.
+
The instruction-level-parallelism scheduler schedules for maximum ILP when registers are available and avoid overscheduling in high pressure situations.
+
The tblgen type inference algorithm was rewritten to be more consistent and
diagnose more target bugs. If you have an out-of-tree backend, you may
find that it finds bugs in your target description. This support also
From dpatel at apple.com Mon Oct 4 11:51:59 2010
From: dpatel at apple.com (Devang Patel)
Date: Mon, 04 Oct 2010 16:51:59 -0000
Subject: [llvm-commits] [llvm] r115516 -
/llvm/trunk/docs/SourceLevelDebugging.html
Message-ID: <20101004165159.9CA892A6C12E@llvm.org>
Author: dpatel
Date: Mon Oct 4 11:51:59 2010
New Revision: 115516
URL: http://llvm.org/viewvc/llvm-project?rev=115516&view=rev
Log:
Fix lexical block's tag number.
Modified:
llvm/trunk/docs/SourceLevelDebugging.html
Modified: llvm/trunk/docs/SourceLevelDebugging.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/SourceLevelDebugging.html?rev=115516&r1=115515&r2=115516&view=diff
==============================================================================
--- llvm/trunk/docs/SourceLevelDebugging.html (original)
+++ llvm/trunk/docs/SourceLevelDebugging.html Mon Oct 4 11:51:59 2010
@@ -460,7 +460,7 @@
!3 = metadata !{
- i32, ;; Tag = 13 + LLVMDebugVersion (DW_TAG_lexical_block)
+ i32, ;; Tag = 11 + LLVMDebugVersion (DW_TAG_lexical_block)
metadata,;; Reference to context descriptor
i32, ;; Line number
i32 ;; Column number
From ggreif at gmail.com Mon Oct 4 12:03:49 2010
From: ggreif at gmail.com (Gabor Greif)
Date: Mon, 04 Oct 2010 17:03:49 -0000
Subject: [llvm-commits] [llvm] r115518 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <20101004170349.DEE3D2A6C12E@llvm.org>
Author: ggreif
Date: Mon Oct 4 12:03:49 2010
New Revision: 115518
URL: http://llvm.org/viewvc/llvm-project?rev=115518&view=rev
Log:
minor tweaks and typos
Modified:
llvm/trunk/docs/ReleaseNotes.html
Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=115518&r1=115517&r2=115518&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Mon Oct 4 12:03:49 2010
@@ -321,8 +321,8 @@
language and compiler written on top of LLVM, intended for producing
single-address-space managed code operating systems that
run faster than the equivalent multiple-address-space C systems.
-More in-depth blurb is available on the wiki.
+More in-depth blurb is available on the wiki.
@@ -339,8 +339,8 @@
href="http://vrt-sourcefire.blogspot.com/2010/09/introduction-to-clamavs-low-level.html">bytecode
signatures that allow writing detections for complex malware. It
uses LLVM's JIT to speed up the execution of bytecode on
-X86,X86-64,PPC32/64, falling back to its own interpreter otherwise.
-The git version was updated to work with LLVM 2.8
+X86, X86-64, PPC32/64, falling back to its own interpreter otherwise.
+The git version was updated to work with LLVM 2.8.
The DTMC provides support for
Transactional Memory, which is an easy-to-use and efficient way to synchronize
accesses to shared memory. Transactions can contain normal C/C++ code (e.g.,
-__transaction { list.remove(x); x.refCount--; }) and will be executed
+__transaction { list.remove(x); x.refCount--; }) and will be executed
virtually atomically and isolated from other transactions.
@@ -774,7 +774,7 @@
The X86 backend now supports holding X87 floating point stack values
in registers across basic blocks, dramatically improving performance of code
- that uses long double, and when targetting CPUs that don't support SSE.
+ that uses long double, and when targeting CPUs that don't support SSE.
The X86 backend now uses a SSEDomainFix pass to optimize SSE operations. On
Nehalem ("Core i7") and newer CPUs there is a 2 cycle latency penalty on
@@ -799,7 +799,7 @@
When printing .s files in verbose assembly mode (the default for clang -S),
the X86 backend now decodes X86 shuffle instructions and prints human
- readable comments after the most inscrutible of them, e.g.:
+ readable comments after the most inscrutable of them, e.g.:
The llvm.arm.neon.vabdl and llvm.arm.neon.vabal intrinsics (lengthening
- vector absolute difference with and without accumlation) have been removed.
+ vector absolute difference with and without accumulation) have been removed.
They are represented using the llvm.arm.neon.vabd intrinsic (vector absolute
difference) followed by a vector zero-extend operation, and for vabal,
a vector add.
@@ -947,7 +947,7 @@
operands are now address-space qualified.
If you were creating these intrinsic calls and prototypes yourself (as opposed
to using Intrinsic::getDeclaration), you can use
- UpgradeIntrinsicFunction/UpgradeIntrinsicCall to be portable accross releases.
+ UpgradeIntrinsicFunction/UpgradeIntrinsicCall to be portable across releases.
SetCurrentDebugLocation takes a DebugLoc now instead of a MDNode.
From daniel at zuster.org Mon Oct 4 12:06:49 2010
From: daniel at zuster.org (Daniel Dunbar)
Date: Mon, 04 Oct 2010 17:06:49 -0000
Subject: [llvm-commits] [llvm] r115520 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <20101004170649.883912A6C12E@llvm.org>
Author: ddunbar
Date: Mon Oct 4 12:06:49 2010
New Revision: 115520
URL: http://llvm.org/viewvc/llvm-project?rev=115520&view=rev
Log:
A few more random Clang release notes.
Modified:
llvm/trunk/docs/ReleaseNotes.html
Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=115520&r1=115519&r2=115520&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Mon Oct 4 12:06:49 2010
@@ -127,9 +127,18 @@
Introduced the "libclang" library, a C interface to Clang intended to support IDE clients.
Added support for #pragma GCC visibility, #pragma align, and others.
Added support for SSE, ARM NEON, and Altivec.
+
Improved support for many Microsoft extensions.
Implemented support for blocks in C++.
Implemented precompiled headers for C++.
Improved abstract syntax trees to retain more accurate source information.
+
Added driver support for handling LLVM IR and bitcode files directly.
+
Major improvements to compiler correctness for exception handling.
+
Improved generated code quality in some areas:
+
+
Good code generation for X86-32 and X86-64 ABI handling.
+
Improved code generation for bit-fields, although important work remains.
+
+
From anton at korobeynikov.info Mon Oct 4 12:11:00 2010
From: anton at korobeynikov.info (Anton Korobeynikov)
Date: Mon, 4 Oct 2010 21:11:00 +0400
Subject: [llvm-commits] [Review request] test: adding triplets and
FileCheck-ize for cygming(and msvc)
In-Reply-To:
References:
Message-ID:
Hi Takumi,
> Thank you for working on all these. The main problem I have is with
> changing the tripples. This is not a real fix for the tests. The tests
> need to be changed to either support both Windows style x86[-64] code
> and Linux/Darwin, or we need separate tests for them. Just changing
> the tripple masks the problem.
Michael's right, it might be possible that test fail indicates the real problem
on mingw. It seems to unwise just to "switch the problem off".
--
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University
From gohman at apple.com Mon Oct 4 12:24:08 2010
From: gohman at apple.com (Dan Gohman)
Date: Mon, 04 Oct 2010 17:24:08 -0000
Subject: [llvm-commits] [llvm] r115521 -
/llvm/trunk/lib/Analysis/ScalarEvolution.cpp
Message-ID: <20101004172408.740BF2A6C12E@llvm.org>
Author: djg
Date: Mon Oct 4 12:24:08 2010
New Revision: 115521
URL: http://llvm.org/viewvc/llvm-project?rev=115521&view=rev
Log:
Don't add the operand count to SCEV uniquing data; FoldingSetNodeID
already knows its own length, so this is redundant.
Modified:
llvm/trunk/lib/Analysis/ScalarEvolution.cpp
Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=115521&r1=115520&r2=115521&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original)
+++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Mon Oct 4 12:24:08 2010
@@ -1711,7 +1711,6 @@
// already have one, otherwise create a new one.
FoldingSetNodeID ID;
ID.AddInteger(scAddExpr);
- ID.AddInteger(Ops.size());
for (unsigned i = 0, e = Ops.size(); i != e; ++i)
ID.AddPointer(Ops[i]);
void *IP = 0;
@@ -1917,7 +1916,6 @@
// already have one, otherwise create a new one.
FoldingSetNodeID ID;
ID.AddInteger(scMulExpr);
- ID.AddInteger(Ops.size());
for (unsigned i = 0, e = Ops.size(); i != e; ++i)
ID.AddPointer(Ops[i]);
void *IP = 0;
@@ -2131,7 +2129,6 @@
// already have one, otherwise create a new one.
FoldingSetNodeID ID;
ID.AddInteger(scAddRecExpr);
- ID.AddInteger(Operands.size());
for (unsigned i = 0, e = Operands.size(); i != e; ++i)
ID.AddPointer(Operands[i]);
ID.AddPointer(L);
@@ -2242,7 +2239,6 @@
// already have one, otherwise create a new one.
FoldingSetNodeID ID;
ID.AddInteger(scSMaxExpr);
- ID.AddInteger(Ops.size());
for (unsigned i = 0, e = Ops.size(); i != e; ++i)
ID.AddPointer(Ops[i]);
void *IP = 0;
@@ -2347,7 +2343,6 @@
// already have one, otherwise create a new one.
FoldingSetNodeID ID;
ID.AddInteger(scUMaxExpr);
- ID.AddInteger(Ops.size());
for (unsigned i = 0, e = Ops.size(); i != e; ++i)
ID.AddPointer(Ops[i]);
void *IP = 0;
From espindola at google.com Mon Oct 4 12:29:59 2010
From: espindola at google.com (Rafael Espindola)
Date: Mon, 4 Oct 2010 13:29:59 -0400
Subject: [llvm-commits] [patch] AsmParser hook for UseCodeAlign
In-Reply-To:
References:
Message-ID:
On 1 October 2010 17:12, Jan Voung wrote:
> Thanks for the review Rafael. Attached is a new patch with the fixed comment
> plus?tests for ELF and COFF. ?I think MachO already had a test.
I think this patch is OK. Thanks!
> - Jan
Cheers,,
--
Rafael ?vila de Esp?ndola
From jvoung at google.com Mon Oct 4 12:32:41 2010
From: jvoung at google.com (Jan Wen Voung)
Date: Mon, 04 Oct 2010 17:32:41 -0000
Subject: [llvm-commits] [llvm] r115523 - in /llvm/trunk:
include/llvm/MC/MCSection.h include/llvm/MC/MCSectionCOFF.h
include/llvm/MC/MCSectionELF.h include/llvm/MC/MCSectionMachO.h
lib/MC/MCParser/AsmParser.cpp lib/MC/MCSectionCOFF.cpp
lib/MC/MCSectionELF.cpp lib/MC/MCSectionMachO.cpp
lib/Target/PIC16/PIC16Section.cpp lib/Target/PIC16/PIC16Section.h
test/MC/COFF/align-nops.s test/MC/COFF/dg.exp test/MC/ELF/align-nops.s
Message-ID: <20101004173241.F34182A6C12E@llvm.org>
Author: jvoung
Date: Mon Oct 4 12:32:41 2010
New Revision: 115523
URL: http://llvm.org/viewvc/llvm-project?rev=115523&view=rev
Log:
Add hook in MCSection to decide when to use "optimized nops", for each
section kind. Previously, optimized nops were only used for MachO.
Also added tests for ELF and COFF.
Added:
llvm/trunk/test/MC/COFF/align-nops.s
llvm/trunk/test/MC/ELF/align-nops.s
Modified:
llvm/trunk/include/llvm/MC/MCSection.h
llvm/trunk/include/llvm/MC/MCSectionCOFF.h
llvm/trunk/include/llvm/MC/MCSectionELF.h
llvm/trunk/include/llvm/MC/MCSectionMachO.h
llvm/trunk/lib/MC/MCParser/AsmParser.cpp
llvm/trunk/lib/MC/MCSectionCOFF.cpp
llvm/trunk/lib/MC/MCSectionELF.cpp
llvm/trunk/lib/MC/MCSectionMachO.cpp
llvm/trunk/lib/Target/PIC16/PIC16Section.cpp
llvm/trunk/lib/Target/PIC16/PIC16Section.h
llvm/trunk/test/MC/COFF/dg.exp
Modified: llvm/trunk/include/llvm/MC/MCSection.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCSection.h?rev=115523&r1=115522&r2=115523&view=diff
==============================================================================
--- llvm/trunk/include/llvm/MC/MCSection.h (original)
+++ llvm/trunk/include/llvm/MC/MCSection.h Mon Oct 4 12:32:41 2010
@@ -61,6 +61,10 @@
return false;
}
+ // UseCodeAlign - Return true if a .align directive should use
+ // "optimized nops" to fill instead of 0s.
+ virtual bool UseCodeAlign() const = 0;
+
static bool classof(const MCSection *) { return true; }
};
Modified: llvm/trunk/include/llvm/MC/MCSectionCOFF.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCSectionCOFF.h?rev=115523&r1=115522&r2=115523&view=diff
==============================================================================
--- llvm/trunk/include/llvm/MC/MCSectionCOFF.h (original)
+++ llvm/trunk/include/llvm/MC/MCSectionCOFF.h Mon Oct 4 12:32:41 2010
@@ -55,6 +55,7 @@
virtual void PrintSwitchToSection(const MCAsmInfo &MAI,
raw_ostream &OS) const;
+ virtual bool UseCodeAlign() const;
static bool classof(const MCSection *S) {
return S->getVariant() == SV_COFF;
Modified: llvm/trunk/include/llvm/MC/MCSectionELF.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCSectionELF.h?rev=115523&r1=115522&r2=115523&view=diff
==============================================================================
--- llvm/trunk/include/llvm/MC/MCSectionELF.h (original)
+++ llvm/trunk/include/llvm/MC/MCSectionELF.h Mon Oct 4 12:32:41 2010
@@ -178,7 +178,8 @@
void PrintSwitchToSection(const MCAsmInfo &MAI,
raw_ostream &OS) const;
-
+ virtual bool UseCodeAlign() const;
+
/// isBaseAddressKnownZero - We know that non-allocatable sections (like
/// debug info) have a base of zero.
virtual bool isBaseAddressKnownZero() const {
Modified: llvm/trunk/include/llvm/MC/MCSectionMachO.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCSectionMachO.h?rev=115523&r1=115522&r2=115523&view=diff
==============================================================================
--- llvm/trunk/include/llvm/MC/MCSectionMachO.h (original)
+++ llvm/trunk/include/llvm/MC/MCSectionMachO.h Mon Oct 4 12:32:41 2010
@@ -165,6 +165,7 @@
virtual void PrintSwitchToSection(const MCAsmInfo &MAI,
raw_ostream &OS) const;
+ virtual bool UseCodeAlign() const;
static bool classof(const MCSection *S) {
return S->getVariant() == SV_MachO;
Modified: llvm/trunk/lib/MC/MCParser/AsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCParser/AsmParser.cpp?rev=115523&r1=115522&r2=115523&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCParser/AsmParser.cpp (original)
+++ llvm/trunk/lib/MC/MCParser/AsmParser.cpp Mon Oct 4 12:32:41 2010
@@ -1654,12 +1654,7 @@
// Check whether we should use optimal code alignment for this .align
// directive.
- //
- // FIXME: This should be using a target hook.
- bool UseCodeAlign = false;
- if (const MCSectionMachO *S = dyn_cast(
- getStreamer().getCurrentSection()))
- UseCodeAlign = S->hasAttribute(MCSectionMachO::S_ATTR_PURE_INSTRUCTIONS);
+ bool UseCodeAlign = getStreamer().getCurrentSection()->UseCodeAlign();
if ((!HasFillExpr || Lexer.getMAI().getTextAlignFillValue() == FillExpr) &&
ValueSize == 1 && UseCodeAlign) {
getStreamer().EmitCodeAlignment(Alignment, MaxBytesToFill);
Modified: llvm/trunk/lib/MC/MCSectionCOFF.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCSectionCOFF.cpp?rev=115523&r1=115522&r2=115523&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCSectionCOFF.cpp (original)
+++ llvm/trunk/lib/MC/MCSectionCOFF.cpp Mon Oct 4 12:32:41 2010
@@ -74,3 +74,7 @@
}
}
}
+
+bool MCSectionCOFF::UseCodeAlign() const {
+ return getKind().isText();
+}
Modified: llvm/trunk/lib/MC/MCSectionELF.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCSectionELF.cpp?rev=115523&r1=115522&r2=115523&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCSectionELF.cpp (original)
+++ llvm/trunk/lib/MC/MCSectionELF.cpp Mon Oct 4 12:32:41 2010
@@ -112,6 +112,10 @@
OS << '\n';
}
+bool MCSectionELF::UseCodeAlign() const {
+ return getFlags() & MCSectionELF::SHF_EXECINSTR;
+}
+
// HasCommonSymbols - True if this section holds common symbols, this is
// indicated on the ELF object file by a symbol with SHN_COMMON section
// header index.
Modified: llvm/trunk/lib/MC/MCSectionMachO.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCSectionMachO.cpp?rev=115523&r1=115522&r2=115523&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCSectionMachO.cpp (original)
+++ llvm/trunk/lib/MC/MCSectionMachO.cpp Mon Oct 4 12:32:41 2010
@@ -148,6 +148,10 @@
OS << '\n';
}
+bool MCSectionMachO::UseCodeAlign() const {
+ return hasAttribute(MCSectionMachO::S_ATTR_PURE_INSTRUCTIONS);
+}
+
/// StripSpaces - This removes leading and trailing spaces from the StringRef.
static void StripSpaces(StringRef &Str) {
while (!Str.empty() && isspace(Str[0]))
@@ -283,4 +287,3 @@
return "";
}
-
Modified: llvm/trunk/lib/Target/PIC16/PIC16Section.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16Section.cpp?rev=115523&r1=115522&r2=115523&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PIC16/PIC16Section.cpp (original)
+++ llvm/trunk/lib/Target/PIC16/PIC16Section.cpp Mon Oct 4 12:32:41 2010
@@ -102,3 +102,7 @@
OS << '\n';
}
+
+bool PIC16Section::UseCodeAlign() const {
+ return isCODE_Type();
+}
Modified: llvm/trunk/lib/Target/PIC16/PIC16Section.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16Section.h?rev=115523&r1=115522&r2=115523&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PIC16/PIC16Section.h (original)
+++ llvm/trunk/lib/Target/PIC16/PIC16Section.h Mon Oct 4 12:32:41 2010
@@ -88,6 +88,8 @@
virtual void PrintSwitchToSection(const MCAsmInfo &MAI,
raw_ostream &OS) const;
+ virtual bool UseCodeAlign() const;
+
static bool classof(const MCSection *S) {
return S->getVariant() == SV_PIC16;
}
Added: llvm/trunk/test/MC/COFF/align-nops.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/COFF/align-nops.s?rev=115523&view=auto
==============================================================================
--- llvm/trunk/test/MC/COFF/align-nops.s (added)
+++ llvm/trunk/test/MC/COFF/align-nops.s Mon Oct 4 12:32:41 2010
@@ -0,0 +1,45 @@
+// RUN: llvm-mc -filetype=obj -triple i686-pc-win32 %s -o %t
+// RUN: coff-dump.py %abs_tmp | FileCheck %s
+
+// Test that we get optimal nops in text
+ .text
+f0:
+ .long 0
+ .align 8, 0x90
+ .long 0
+ .align 8
+
+// But not in another section
+ .data
+ .long 0
+ .align 8, 0x90
+ .long 0
+ .align 8
+
+//CHECK: Name = .text
+//CHECK-NEXT: VirtualSize
+//CHECK-NEXT: VirtualAddress
+//CHECK-NEXT: SizeOfRawData = 16
+//CHECK-NEXT: PointerToRawData
+//CHECK-NEXT: PointerToRelocations
+//CHECK-NEXT: PointerToLineNumbers
+//CHECK-NEXT: NumberOfRelocations
+//CHECK-NEXT: NumberOfLineNumbers
+//CHECK-NEXT: Charateristics = 0x400001
+//CHECK-NEXT: IMAGE_SCN_ALIGN_8BYTES
+//CHECK-NEXT: SectionData =
+//CHECK-NEXT: 00 00 00 00 0F 1F 40 00 - 00 00 00 00 0F 1F 40 00
+
+//CHECK: Name = .data
+//CHECK-NEXT: VirtualSize
+//CHECK-NEXT: VirtualAddress
+//CHECK-NEXT: SizeOfRawData = 16
+//CHECK-NEXT: PointerToRawData
+//CHECK-NEXT: PointerToRelocations
+//CHECK-NEXT: PointerToLineNumbers
+//CHECK-NEXT: NumberOfRelocations
+//CHECK-NEXT: NumberOfLineNumbers
+//CHECK-NEXT: Charateristics = 0x400001
+//CHECK-NEXT: IMAGE_SCN_ALIGN_8BYTES
+//CHECK-NEXT: SectionData =
+//CHECK-NEXT: 00 00 00 00 90 90 90 90 - 00 00 00 00 00 00 00 00
Modified: llvm/trunk/test/MC/COFF/dg.exp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/COFF/dg.exp?rev=115523&r1=115522&r2=115523&view=diff
==============================================================================
--- llvm/trunk/test/MC/COFF/dg.exp (original)
+++ llvm/trunk/test/MC/COFF/dg.exp Mon Oct 4 12:32:41 2010
@@ -1,5 +1,5 @@
load_lib llvm.exp
if { [llvm_supports_target X86] } {
- RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll}]]
+ RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,s}]]
}
Added: llvm/trunk/test/MC/ELF/align-nops.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/align-nops.s?rev=115523&view=auto
==============================================================================
--- llvm/trunk/test/MC/ELF/align-nops.s (added)
+++ llvm/trunk/test/MC/ELF/align-nops.s Mon Oct 4 12:32:41 2010
@@ -0,0 +1,40 @@
+// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s
+
+// Test that we get optimal nops in text
+ .text
+f0:
+ .long 0
+ .align 8, 0x90
+ .long 0
+ .align 8
+
+// But not in another section
+ .data
+ .long 0
+ .align 8, 0x90
+ .long 0
+ .align 8
+
+// CHECK: (('sh_name', 1) # '.text'
+// CHECK-NEXT: ('sh_type', 1)
+// CHECK-NEXT: ('sh_flags', 6)
+// CHECK-NEXT: ('sh_addr',
+// CHECK-NEXT: ('sh_offset',
+// CHECK-NEXT: ('sh_size', 16)
+// CHECK-NEXT: ('sh_link', 0)
+// CHECK-NEXT: ('sh_info', 0)
+// CHECK-NEXT: ('sh_addralign', 8)
+// CHECK-NEXT: ('sh_entsize', 0)
+// CHECK-NEXT: ('_section_data', '00000000 0f1f4000 00000000 0f1f4000')
+
+// CHECK: (('sh_name', 7) # '.data'
+// CHECK-NEXT: ('sh_type', 1)
+// CHECK-NEXT: ('sh_flags', 3)
+// CHECK-NEXT: ('sh_addr',
+// CHECK-NEXT: ('sh_offset',
+// CHECK-NEXT: ('sh_size', 16)
+// CHECK-NEXT: ('sh_link', 0)
+// CHECK-NEXT: ('sh_info', 0)
+// CHECK-NEXT: ('sh_addralign', 8)
+// CHECK-NEXT: ('sh_entsize', 0)
+// CHECK-NEXT: ('_section_data', '00000000 90909090 00000000 00000000')
From daniel at zuster.org Mon Oct 4 12:39:47 2010
From: daniel at zuster.org (Daniel Dunbar)
Date: Mon, 04 Oct 2010 17:39:47 -0000
Subject: [llvm-commits] [llvm] r115524 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <20101004173947.ECF2C2A6C12E@llvm.org>
Author: ddunbar
Date: Mon Oct 4 12:39:47 2010
New Revision: 115524
URL: http://llvm.org/viewvc/llvm-project?rev=115524&view=rev
Log:
Add KLEE 2.8 release notes.
Modified:
llvm/trunk/docs/ReleaseNotes.html
Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=115524&r1=115523&r2=115524&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Mon Oct 4 12:39:47 2010
@@ -284,6 +284,43 @@
+
+
+
+KLEE is a symbolic execution framework for
+programs in LLVM bitcode form. KLEE tries to symbolically evaluate "all" paths
+through the application and records state transitions that lead to fault
+states. This allows it to construct testcases that lead to faults and can even
+be used to verify some algorithms.
+
+
+
Although KLEE does not have any major new features as of 2.8, we have made
+various minor improvements, particular to ease development:
+
+
Added support for LLVM 2.8. KLEE currently maintains compatibility with
+ LLVM 2.6, 2.7, and 2.8.
+
Added a buildbot for 2.6, 2.7, and trunk. A 2.8 buildbot will be coming
+ soon following release.
+
Fixed many C++ code issues to allow building with Clang++. Mostly
+ complete, except for the version of MiniSAT which is inside the KLEE STP
+ version.
+
Improved support for building with separate source and build
+ directories.
+
Added support for "long double" on x86.
+
Initial work on KLEE support for using 'lit' test runner instead of
+ DejaGNU.
+
Added configure support for using an external version of
+ STP.
+
+
+
+
+
External Open Source Projects Using LLVM 2.8
From grosbach at apple.com Mon Oct 4 12:49:26 2010
From: grosbach at apple.com (Jim Grosbach)
Date: Mon, 4 Oct 2010 10:49:26 -0700
Subject: [llvm-commits] [llvm] r115393 - in /llvm/trunk: CMakeLists.txt
lib/Target/MSP430/InstPrinter/CMakeLists.txt
lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp
lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h
lib/Target/MSP430/InstPrinter/Makefi
In-Reply-To:
References:
<07E65C41-D605-4147-B976-1BC502C5BF68@apple.com>
Message-ID: <78259CE4-A19D-4C6C-9F87-5C84F023EAD9@apple.com>
OK, I think I see the culprit. MSP430InstPrinter.cpp includes MSP430InstrInfo.h which in turn include MSP430RegisterInfo.h which references those classes. Nothing actually uses those references, however, and it appears that for OSX either the references aren't emitted to the .s file at all or the assembler/linker are smart enough to ignore them since they're not used. Either way, the InstPrinter shouldn't be including MSP430InstrInfo.h. I'll fix that and re-apply the other patches once I verify they build OK on Linux.
-Jim
On Oct 3, 2010, at 11:39 PM, Nick Lewycky wrote:
> Here's what the GenLibDeps.pl script thinks is going on.
>
> libLLVMMSP430CodeGen.a uses but does not define symbols:
> _ZN4llvm17MSP430InstPrinter15getRegisterNameEj aka. llvm::MSP430InstPrinter::getRegisterName(unsigned int)
> which are provided by libLLVMMSP430AsmPrinter.a. Going in the other direction, libLLVMMSP430AsmPrinter.a uses symbols:
> _ZN4llvm6MSP43011GR8RegClassE aka. llvm::MSP430::GR8RegClass
> _ZN4llvm6MSP43012GR16RegClassE aka. llvm::MSP430::GR16RegClass
>
> GR8RegClass and GR16RegClass is defined in MSP430RegisterInfo.o (which is rolled into ...CodeGen.a). Its only reference in ...AsmPrinter.a is by MSP430InstPrinter.o.
>
> The getRegisterName function is defined in MSP430InstPrinter.o (part of ...AsmPrinter.a) and its only reference in ...CodeGen.a is by MSP430AsmPrinter.o.
>
> Is that enough to go on?
>
> Nick
>
> On 1 October 2010 18:43, Nick Lewycky wrote:
> Okay. You can see that almost all of the open-source builders were broken:
>
> http://google1.osuosl.org:8011/console
>
> in that time. It's impossible for this particular error to occur in a cmake build because cmake doesn't run find-cycles.pl (last i checked). My suspicion is that the cmake builders were working fine while configure+make ones were not?
>
> I'm going to wind back to the broken point and try to reproduce the failure and see if I can figure out what the cyclic dependency actually was.
>
> Nick
>
>
> On 1 October 2010 18:27, Jim Grosbach wrote:
> That's very strange. I do a configure/make here, and it works, and lots of bots using that were green as well. If there's a case I missed, I'd love to have some help tracking down what it is. Can you try a "make clean" and see if that works? Maybe there's just something stale that the configure portion of the patch needs to clean up.
>
> -Jim
>
>
>
> On Oct 1, 2010, at 6:24 PM, Nick Lewycky wrote:
>
>> Nope, it broke under a regular configure+make in-srctree incremental build on multiple different machines.
>>
>> On 1 October 2010 18:22, Jim Grosbach wrote:
>> Nick,
>>
>> These only break for you under CMake, right? That's the only place I've been able to reproduce failures.
>>
>> -Jim
>>
>>
>> On Oct 1, 2010, at 6:06 PM, Nick Lewycky wrote:
>>
>> > Author: nicholas
>> > Date: Fri Oct 1 20:06:42 2010
>> > New Revision: 115393
>> >
>> > URL: http://llvm.org/viewvc/llvm-project?rev=115393&view=rev
>> > Log:
>> > Revert patches r115363 r115367 r115391 due to build breakage:
>> > llvm[2]: Updated LibDeps.txt because dependencies changed
>> > llvm[2]: Checking for cyclic dependencies between LLVM libraries.
>> > find-cycles.pl: Circular dependency between *.a files:
>> > find-cycles.pl: libLLVMMSP430AsmPrinter.a libLLVMMSP430CodeGen.a
>> >
>> >
>> > Modified:
>> > llvm/trunk/CMakeLists.txt
>> > llvm/trunk/lib/Target/MSP430/InstPrinter/CMakeLists.txt
>> > llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp
>> > llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h
>> > llvm/trunk/lib/Target/MSP430/InstPrinter/Makefile
>> > llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp
>> > llvm/trunk/lib/Target/MSP430/MSP430MCInstLower.cpp
>> > llvm/trunk/lib/Target/MSP430/MSP430MCInstLower.h
>> > llvm/trunk/lib/Target/MSP430/Makefile
>> >
>> > Modified: llvm/trunk/CMakeLists.txt
>> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/CMakeLists.txt?rev=115393&r1=115392&r2=115393&view=diff
>> > ==============================================================================
>> > --- llvm/trunk/CMakeLists.txt (original)
>> > +++ llvm/trunk/CMakeLists.txt Fri Oct 1 20:06:42 2010
>> > @@ -323,10 +323,6 @@
>> > add_subdirectory(lib/Target/${t}/AsmPrinter)
>> > set(LLVM_ENUM_ASM_PRINTERS
>> > "${LLVM_ENUM_ASM_PRINTERS}LLVM_ASM_PRINTER(${t})\n")
>> > - if( EXISTS ${LLVM_MAIN_SRC_DIR}/lib/Target/${t}/InstPrinter/CMakeLists.txt )
>> > - add_subdirectory(lib/Target/${t}/InstPrinter)
>> > - set(LLVM_ENUM_ASM_PRINTERS
>> > - "${LLVM_ENUM_ASM_PRINTERS}LLVM_ASM_PRINTER(${t})\n")
>> > endif( EXISTS ${LLVM_MAIN_SRC_DIR}/lib/Target/${t}/AsmPrinter/CMakeLists.txt )
>> > if( EXISTS ${LLVM_MAIN_SRC_DIR}/lib/Target/${t}/AsmParser/CMakeLists.txt )
>> > add_subdirectory(lib/Target/${t}/AsmParser)
>> >
>> > Modified: llvm/trunk/lib/Target/MSP430/InstPrinter/CMakeLists.txt
>> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/InstPrinter/CMakeLists.txt?rev=115393&r1=115392&r2=115393&view=diff
>> > ==============================================================================
>> > --- llvm/trunk/lib/Target/MSP430/InstPrinter/CMakeLists.txt (original)
>> > +++ llvm/trunk/lib/Target/MSP430/InstPrinter/CMakeLists.txt Fri Oct 1 20:06:42 2010
>> > @@ -1,6 +0,0 @@
>> > -include_directories( ${CMAKE_CURRENT_BINARY_DIR}/.. ${CMAKE_CURRENT_SOURCE_DIR}/.. )
>> > -
>> > -add_llvm_library(LLVMMSP430AsmPrinter
>> > - MSP430InstPrinter.cpp
>> > - )
>> > -add_dependencies(LLVMMSP430AsmPrinter MSP430CodeGenTable_gen)
>> >
>> > Modified: llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp
>> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp?rev=115393&r1=115392&r2=115393&view=diff
>> > ==============================================================================
>> > --- llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp (original)
>> > +++ llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp Fri Oct 1 20:06:42 2010
>> > @@ -1,114 +0,0 @@
>> > -//===-- MSP430InstPrinter.cpp - Convert MSP430 MCInst to assembly syntax --===//
>> > -//
>> > -// The LLVM Compiler Infrastructure
>> > -//
>> > -// This file is distributed under the University of Illinois Open Source
>> > -// License. See LICENSE.TXT for details.
>> > -//
>> > -//===----------------------------------------------------------------------===//
>> > -//
>> > -// This class prints an MSP430 MCInst to a .s file.
>> > -//
>> > -//===----------------------------------------------------------------------===//
>> > -
>> > -#define DEBUG_TYPE "asm-printer"
>> > -#include "MSP430.h"
>> > -#include "MSP430InstrInfo.h"
>> > -#include "MSP430InstPrinter.h"
>> > -#include "llvm/MC/MCInst.h"
>> > -#include "llvm/MC/MCAsmInfo.h"
>> > -#include "llvm/MC/MCExpr.h"
>> > -#include "llvm/Support/ErrorHandling.h"
>> > -#include "llvm/Support/FormattedStream.h"
>> > -using namespace llvm;
>> > -
>> > -
>> > -// Include the auto-generated portion of the assembly writer.
>> > -#include "MSP430GenAsmWriter.inc"
>> > -
>> > -void MSP430InstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
>> > - printInstruction(MI, O);
>> > -}
>> > -
>> > -void MSP430InstPrinter::printPCRelImmOperand(const MCInst *MI, unsigned OpNo,
>> > - raw_ostream &O) {
>> > - const MCOperand &Op = MI->getOperand(OpNo);
>> > - if (Op.isImm())
>> > - O << Op.getImm();
>> > - else {
>> > - assert(Op.isExpr() && "unknown pcrel immediate operand");
>> > - O << *Op.getExpr();
>> > - }
>> > -}
>> > -
>> > -void MSP430InstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
>> > - raw_ostream &O, const char *Modifier) {
>> > - assert((Modifier == 0 || Modifier[0] == 0) && "No modifiers supported");
>> > - const MCOperand &Op = MI->getOperand(OpNo);
>> > - if (Op.isReg()) {
>> > - O << getRegisterName(Op.getReg());
>> > - } else if (Op.isImm()) {
>> > - O << '#' << Op.getImm();
>> > - } else {
>> > - assert(Op.isExpr() && "unknown operand kind in printOperand");
>> > - O << '#' << *Op.getExpr();
>> > - }
>> > -}
>> > -
>> > -void MSP430InstPrinter::printSrcMemOperand(const MCInst *MI, unsigned OpNo,
>> > - raw_ostream &O,
>> > - const char *Modifier) {
>> > - const MCOperand &Base = MI->getOperand(OpNo);
>> > - const MCOperand &Disp = MI->getOperand(OpNo+1);
>> > -
>> > - // Print displacement first
>> > -
>> > - // If the global address expression is a part of displacement field with a
>> > - // register base, we should not emit any prefix symbol here, e.g.
>> > - // mov.w &foo, r1
>> > - // vs
>> > - // mov.w glb(r1), r2
>> > - // Otherwise (!) msp430-as will silently miscompile the output :(
>> > - if (!Base.getReg())
>> > - O << '&';
>> > -
>> > - if (Disp.isExpr())
>> > - O << *Disp.getExpr();
>> > - else {
>> > - assert(Disp.isImm() && "Expected immediate in displacement field");
>> > - O << Disp.getImm();
>> > - }
>> > -
>> > - // Print register base field
>> > - if (Base.getReg())
>> > - O << '(' << getRegisterName(Base.getReg()) << ')';
>> > -}
>> > -
>> > -void MSP430InstPrinter::printCCOperand(const MCInst *MI, unsigned OpNo,
>> > - raw_ostream &O) {
>> > - unsigned CC = MI->getOperand(OpNo).getImm();
>> > -
>> > - switch (CC) {
>> > - default:
>> > - llvm_unreachable("Unsupported CC code");
>> > - break;
>> > - case MSP430CC::COND_E:
>> > - O << "eq";
>> > - break;
>> > - case MSP430CC::COND_NE:
>> > - O << "ne";
>> > - break;
>> > - case MSP430CC::COND_HS:
>> > - O << "hs";
>> > - break;
>> > - case MSP430CC::COND_LO:
>> > - O << "lo";
>> > - break;
>> > - case MSP430CC::COND_GE:
>> > - O << "ge";
>> > - break;
>> > - case MSP430CC::COND_L:
>> > - O << 'l';
>> > - break;
>> > - }
>> > -}
>> >
>> > Modified: llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h
>> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h?rev=115393&r1=115392&r2=115393&view=diff
>> > ==============================================================================
>> > --- llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h (original)
>> > +++ llvm/trunk/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h Fri Oct 1 20:06:42 2010
>> > @@ -1,43 +0,0 @@
>> > -//===-- MSP430InstPrinter.h - Convert MSP430 MCInst to assembly syntax ----===//
>> > -//
>> > -// The LLVM Compiler Infrastructure
>> > -//
>> > -// This file is distributed under the University of Illinois Open Source
>> > -// License. See LICENSE.TXT for details.
>> > -//
>> > -//===----------------------------------------------------------------------===//
>> > -//
>> > -// This class prints a MSP430 MCInst to a .s file.
>> > -//
>> > -//===----------------------------------------------------------------------===//
>> > -
>> > -#ifndef MSP430INSTPRINTER_H
>> > -#define MSP430INSTPRINTER_H
>> > -
>> > -#include "llvm/MC/MCInstPrinter.h"
>> > -
>> > -namespace llvm {
>> > - class MCOperand;
>> > -
>> > - class MSP430InstPrinter : public MCInstPrinter {
>> > - public:
>> > - MSP430InstPrinter(const MCAsmInfo &MAI) : MCInstPrinter(MAI) {
>> > - }
>> > -
>> > - virtual void printInst(const MCInst *MI, raw_ostream &O);
>> > -
>> > - // Autogenerated by tblgen.
>> > - void printInstruction(const MCInst *MI, raw_ostream &O);
>> > - static const char *getRegisterName(unsigned RegNo);
>> > -
>> > - void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O,
>> > - const char *Modifier = 0);
>> > - void printPCRelImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
>> > - void printSrcMemOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O,
>> > - const char *Modifier = 0);
>> > - void printCCOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
>> > -
>> > - };
>> > -}
>> > -
>> > -#endif
>> >
>> > Modified: llvm/trunk/lib/Target/MSP430/InstPrinter/Makefile
>> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/InstPrinter/Makefile?rev=115393&r1=115392&r2=115393&view=diff
>> > ==============================================================================
>> > --- llvm/trunk/lib/Target/MSP430/InstPrinter/Makefile (original)
>> > +++ llvm/trunk/lib/Target/MSP430/InstPrinter/Makefile Fri Oct 1 20:06:42 2010
>> > @@ -1,15 +0,0 @@
>> > -##===- lib/Target/MSP430/AsmPrinter/Makefile ---------------*- Makefile -*-===##
>> > -#
>> > -# The LLVM Compiler Infrastructure
>> > -#
>> > -# This file is distributed under the University of Illinois Open Source
>> > -# License. See LICENSE.TXT for details.
>> > -#
>> > -##===----------------------------------------------------------------------===##
>> > -LEVEL = ../../../..
>> > -LIBRARYNAME = LLVMMSP430AsmPrinter
>> > -
>> > -# Hack: we need to include 'main' MSP430 target directory to grab private headers
>> > -CPP.Flags += -I$(PROJ_OBJ_DIR)/.. -I$(PROJ_SRC_DIR)/..
>> > -
>> > -include $(LEVEL)/Makefile.common
>> >
>> > Modified: llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp
>> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp?rev=115393&r1=115392&r2=115393&view=diff
>> > ==============================================================================
>> > --- llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp (original)
>> > +++ llvm/trunk/lib/Target/MSP430/MSP430AsmPrinter.cpp Fri Oct 1 20:06:42 2010
>> > @@ -1,179 +0,0 @@
>> > -//===-- MSP430AsmPrinter.cpp - MSP430 LLVM assembly writer ----------------===//
>> > -//
>> > -// The LLVM Compiler Infrastructure
>> > -//
>> > -// This file is distributed under the University of Illinois Open Source
>> > -// License. See LICENSE.TXT for details.
>> > -//
>> > -//===----------------------------------------------------------------------===//
>> > -//
>> > -// This file contains a printer that converts from our internal representation
>> > -// of machine-dependent LLVM code to the MSP430 assembly language.
>> > -//
>> > -//===----------------------------------------------------------------------===//
>> > -
>> > -#define DEBUG_TYPE "asm-printer"
>> > -#include "MSP430.h"
>> > -#include "MSP430InstrInfo.h"
>> > -#include "InstPrinter/MSP430InstPrinter.h"
>> > -#include "MSP430MCAsmInfo.h"
>> > -#include "MSP430MCInstLower.h"
>> > -#include "MSP430TargetMachine.h"
>> > -#include "llvm/Constants.h"
>> > -#include "llvm/DerivedTypes.h"
>> > -#include "llvm/Module.h"
>> > -#include "llvm/Assembly/Writer.h"
>> > -#include "llvm/CodeGen/AsmPrinter.h"
>> > -#include "llvm/CodeGen/MachineModuleInfo.h"
>> > -#include "llvm/CodeGen/MachineFunctionPass.h"
>> > -#include "llvm/CodeGen/MachineConstantPool.h"
>> > -#include "llvm/CodeGen/MachineInstr.h"
>> > -#include "llvm/MC/MCInst.h"
>> > -#include "llvm/MC/MCStreamer.h"
>> > -#include "llvm/MC/MCSymbol.h"
>> > -#include "llvm/Target/Mangler.h"
>> > -#include "llvm/Target/TargetData.h"
>> > -#include "llvm/Target/TargetLoweringObjectFile.h"
>> > -#include "llvm/Target/TargetRegistry.h"
>> > -#include "llvm/Support/raw_ostream.h"
>> > -using namespace llvm;
>> > -
>> > -namespace {
>> > - class MSP430AsmPrinter : public AsmPrinter {
>> > - public:
>> > - MSP430AsmPrinter(TargetMachine &TM, MCStreamer &Streamer)
>> > - : AsmPrinter(TM, Streamer) {}
>> > -
>> > - virtual const char *getPassName() const {
>> > - return "MSP430 Assembly Printer";
>> > - }
>> > -
>> > - void printOperand(const MachineInstr *MI, int OpNum,
>> > - raw_ostream &O, const char* Modifier = 0);
>> > - void printSrcMemOperand(const MachineInstr *MI, int OpNum,
>> > - raw_ostream &O);
>> > - bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
>> > - unsigned AsmVariant, const char *ExtraCode,
>> > - raw_ostream &O);
>> > - bool PrintAsmMemoryOperand(const MachineInstr *MI,
>> > - unsigned OpNo, unsigned AsmVariant,
>> > - const char *ExtraCode, raw_ostream &O);
>> > - void EmitInstruction(const MachineInstr *MI);
>> > - };
>> > -} // end of anonymous namespace
>> > -
>> > -
>> > -void MSP430AsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
>> > - raw_ostream &O, const char *Modifier) {
>> > - const MachineOperand &MO = MI->getOperand(OpNum);
>> > - switch (MO.getType()) {
>> > - default: assert(0 && "Not implemented yet!");
>> > - case MachineOperand::MO_Register:
>> > - O << MSP430InstPrinter::getRegisterName(MO.getReg());
>> > - return;
>> > - case MachineOperand::MO_Immediate:
>> > - if (!Modifier || strcmp(Modifier, "nohash"))
>> > - O << '#';
>> > - O << MO.getImm();
>> > - return;
>> > - case MachineOperand::MO_MachineBasicBlock:
>> > - O << *MO.getMBB()->getSymbol();
>> > - return;
>> > - case MachineOperand::MO_GlobalAddress: {
>> > - bool isMemOp = Modifier && !strcmp(Modifier, "mem");
>> > - uint64_t Offset = MO.getOffset();
>> > -
>> > - // If the global address expression is a part of displacement field with a
>> > - // register base, we should not emit any prefix symbol here, e.g.
>> > - // mov.w &foo, r1
>> > - // vs
>> > - // mov.w glb(r1), r2
>> > - // Otherwise (!) msp430-as will silently miscompile the output :(
>> > - if (!Modifier || strcmp(Modifier, "nohash"))
>> > - O << (isMemOp ? '&' : '#');
>> > - if (Offset)
>> > - O << '(' << Offset << '+';
>> > -
>> > - O << *Mang->getSymbol(MO.getGlobal());
>> > -
>> > - if (Offset)
>> > - O << ')';
>> > -
>> > - return;
>> > - }
>> > - case MachineOperand::MO_ExternalSymbol: {
>> > - bool isMemOp = Modifier && !strcmp(Modifier, "mem");
>> > - O << (isMemOp ? '&' : '#');
>> > - O << MAI->getGlobalPrefix() << MO.getSymbolName();
>> > - return;
>> > - }
>> > - }
>> > -}
>> > -
>> > -void MSP430AsmPrinter::printSrcMemOperand(const MachineInstr *MI, int OpNum,
>> > - raw_ostream &O) {
>> > - const MachineOperand &Base = MI->getOperand(OpNum);
>> > - const MachineOperand &Disp = MI->getOperand(OpNum+1);
>> > -
>> > - // Print displacement first
>> > -
>> > - // Imm here is in fact global address - print extra modifier.
>> > - if (Disp.isImm() && !Base.getReg())
>> > - O << '&';
>> > - printOperand(MI, OpNum+1, O, "nohash");
>> > -
>> > - // Print register base field
>> > - if (Base.getReg()) {
>> > - O << '(';
>> > - printOperand(MI, OpNum, O);
>> > - O << ')';
>> > - }
>> > -}
>> > -
>> > -/// PrintAsmOperand - Print out an operand for an inline asm expression.
>> > -///
>> > -bool MSP430AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
>> > - unsigned AsmVariant,
>> > - const char *ExtraCode, raw_ostream &O) {
>> > - // Does this asm operand have a single letter operand modifier?
>> > - if (ExtraCode && ExtraCode[0])
>> > - return true; // Unknown modifier.
>> > -
>> > - printOperand(MI, OpNo, O);
>> > - return false;
>> > -}
>> > -
>> > -bool MSP430AsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
>> > - unsigned OpNo, unsigned AsmVariant,
>> > - const char *ExtraCode,
>> > - raw_ostream &O) {
>> > - if (ExtraCode && ExtraCode[0]) {
>> > - return true; // Unknown modifier.
>> > - }
>> > - printSrcMemOperand(MI, OpNo, O);
>> > - return false;
>> > -}
>> > -
>> > -//===----------------------------------------------------------------------===//
>> > -void MSP430AsmPrinter::EmitInstruction(const MachineInstr *MI) {
>> > - MSP430MCInstLower MCInstLowering(OutContext, *Mang, *this);
>> > -
>> > - MCInst TmpInst;
>> > - MCInstLowering.Lower(MI, TmpInst);
>> > - OutStreamer.EmitInstruction(TmpInst);
>> > -}
>> > -
>> > -static MCInstPrinter *createMSP430MCInstPrinter(const Target &T,
>> > - unsigned SyntaxVariant,
>> > - const MCAsmInfo &MAI) {
>> > - if (SyntaxVariant == 0)
>> > - return new MSP430InstPrinter(MAI);
>> > - return 0;
>> > -}
>> > -
>> > -// Force static initialization.
>> > -extern "C" void LLVMInitializeMSP430AsmPrinter() {
>> > - RegisterAsmPrinter X(TheMSP430Target);
>> > - TargetRegistry::RegisterMCInstPrinter(TheMSP430Target,
>> > - createMSP430MCInstPrinter);
>> > -}
>> >
>> > Modified: llvm/trunk/lib/Target/MSP430/MSP430MCInstLower.cpp
>> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430MCInstLower.cpp?rev=115393&r1=115392&r2=115393&view=diff
>> > ==============================================================================
>> > --- llvm/trunk/lib/Target/MSP430/MSP430MCInstLower.cpp (original)
>> > +++ llvm/trunk/lib/Target/MSP430/MSP430MCInstLower.cpp Fri Oct 1 20:06:42 2010
>> > @@ -1,150 +0,0 @@
>> > -//===-- MSP430MCInstLower.cpp - Convert MSP430 MachineInstr to an MCInst---===//
>> > -//
>> > -// The LLVM Compiler Infrastructure
>> > -//
>> > -// This file is distributed under the University of Illinois Open Source
>> > -// License. See LICENSE.TXT for details.
>> > -//
>> > -//===----------------------------------------------------------------------===//
>> > -//
>> > -// This file contains code to lower MSP430 MachineInstrs to their corresponding
>> > -// MCInst records.
>> > -//
>> > -//===----------------------------------------------------------------------===//
>> > -
>> > -#include "MSP430MCInstLower.h"
>> > -#include "llvm/CodeGen/AsmPrinter.h"
>> > -#include "llvm/CodeGen/MachineBasicBlock.h"
>> > -#include "llvm/CodeGen/MachineInstr.h"
>> > -#include "llvm/MC/MCAsmInfo.h"
>> > -#include "llvm/MC/MCContext.h"
>> > -#include "llvm/MC/MCExpr.h"
>> > -#include "llvm/MC/MCInst.h"
>> > -#include "llvm/Target/Mangler.h"
>> > -#include "llvm/Support/raw_ostream.h"
>> > -#include "llvm/Support/ErrorHandling.h"
>> > -#include "llvm/ADT/SmallString.h"
>> > -using namespace llvm;
>> > -
>> > -MCSymbol *MSP430MCInstLower::
>> > -GetGlobalAddressSymbol(const MachineOperand &MO) const {
>> > - switch (MO.getTargetFlags()) {
>> > - default: llvm_unreachable("Unknown target flag on GV operand");
>> > - case 0: break;
>> > - }
>> > -
>> > - return Printer.Mang->getSymbol(MO.getGlobal());
>> > -}
>> > -
>> > -MCSymbol *MSP430MCInstLower::
>> > -GetExternalSymbolSymbol(const MachineOperand &MO) const {
>> > - switch (MO.getTargetFlags()) {
>> > - default: assert(0 && "Unknown target flag on GV operand");
>> > - case 0: break;
>> > - }
>> > -
>> > - return Printer.GetExternalSymbolSymbol(MO.getSymbolName());
>> > -}
>> > -
>> > -MCSymbol *MSP430MCInstLower::
>> > -GetJumpTableSymbol(const MachineOperand &MO) const {
>> > - SmallString<256> Name;
>> > - raw_svector_ostream(Name) << Printer.MAI->getPrivateGlobalPrefix() << "JTI"
>> > - << Printer.getFunctionNumber() << '_'
>> > - << MO.getIndex();
>> > -
>> > - switch (MO.getTargetFlags()) {
>> > - default: llvm_unreachable("Unknown target flag on GV operand");
>> > - case 0: break;
>> > - }
>> > -
>> > - // Create a symbol for the name.
>> > - return Ctx.GetOrCreateSymbol(Name.str());
>> > -}
>> > -
>> > -MCSymbol *MSP430MCInstLower::
>> > -GetConstantPoolIndexSymbol(const MachineOperand &MO) const {
>> > - SmallString<256> Name;
>> > - raw_svector_ostream(Name) << Printer.MAI->getPrivateGlobalPrefix() << "CPI"
>> > - << Printer.getFunctionNumber() << '_'
>> > - << MO.getIndex();
>> > -
>> > - switch (MO.getTargetFlags()) {
>> > - default: llvm_unreachable("Unknown target flag on GV operand");
>> > - case 0: break;
>> > - }
>> > -
>> > - // Create a symbol for the name.
>> > - return Ctx.GetOrCreateSymbol(Name.str());
>> > -}
>> > -
>> > -MCSymbol *MSP430MCInstLower::
>> > -GetBlockAddressSymbol(const MachineOperand &MO) const {
>> > - switch (MO.getTargetFlags()) {
>> > - default: assert(0 && "Unknown target flag on GV operand");
>> > - case 0: break;
>> > - }
>> > -
>> > - return Printer.GetBlockAddressSymbol(MO.getBlockAddress());
>> > -}
>> > -
>> > -MCOperand MSP430MCInstLower::
>> > -LowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym) const {
>> > - // FIXME: We would like an efficient form for this, so we don't have to do a
>> > - // lot of extra uniquing.
>> > - const MCExpr *Expr = MCSymbolRefExpr::Create(Sym, Ctx);
>> > -
>> > - switch (MO.getTargetFlags()) {
>> > - default: llvm_unreachable("Unknown target flag on GV operand");
>> > - case 0: break;
>> > - }
>> > -
>> > - if (!MO.isJTI() && MO.getOffset())
>> > - Expr = MCBinaryExpr::CreateAdd(Expr,
>> > - MCConstantExpr::Create(MO.getOffset(), Ctx),
>> > - Ctx);
>> > - return MCOperand::CreateExpr(Expr);
>> > -}
>> > -
>> > -void MSP430MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
>> > - OutMI.setOpcode(MI->getOpcode());
>> > -
>> > - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
>> > - const MachineOperand &MO = MI->getOperand(i);
>> > -
>> > - MCOperand MCOp;
>> > - switch (MO.getType()) {
>> > - default:
>> > - MI->dump();
>> > - assert(0 && "unknown operand type");
>> > - case MachineOperand::MO_Register:
>> > - // Ignore all implicit register operands.
>> > - if (MO.isImplicit()) continue;
>> > - MCOp = MCOperand::CreateReg(MO.getReg());
>> > - break;
>> > - case MachineOperand::MO_Immediate:
>> > - MCOp = MCOperand::CreateImm(MO.getImm());
>> > - break;
>> > - case MachineOperand::MO_MachineBasicBlock:
>> > - MCOp = MCOperand::CreateExpr(MCSymbolRefExpr::Create(
>> > - MO.getMBB()->getSymbol(), Ctx));
>> > - break;
>> > - case MachineOperand::MO_GlobalAddress:
>> > - MCOp = LowerSymbolOperand(MO, GetGlobalAddressSymbol(MO));
>> > - break;
>> > - case MachineOperand::MO_ExternalSymbol:
>> > - MCOp = LowerSymbolOperand(MO, GetExternalSymbolSymbol(MO));
>> > - break;
>> > - case MachineOperand::MO_JumpTableIndex:
>> > - MCOp = LowerSymbolOperand(MO, GetJumpTableSymbol(MO));
>> > - break;
>> > - case MachineOperand::MO_ConstantPoolIndex:
>> > - MCOp = LowerSymbolOperand(MO, GetConstantPoolIndexSymbol(MO));
>> > - break;
>> > - case MachineOperand::MO_BlockAddress:
>> > - MCOp = LowerSymbolOperand(MO, GetBlockAddressSymbol(MO));
>> > - }
>> > -
>> > - OutMI.addOperand(MCOp);
>> > - }
>> > -}
>> >
>> > Modified: llvm/trunk/lib/Target/MSP430/MSP430MCInstLower.h
>> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430MCInstLower.h?rev=115393&r1=115392&r2=115393&view=diff
>> > ==============================================================================
>> > --- llvm/trunk/lib/Target/MSP430/MSP430MCInstLower.h (original)
>> > +++ llvm/trunk/lib/Target/MSP430/MSP430MCInstLower.h Fri Oct 1 20:06:42 2010
>> > @@ -1,50 +0,0 @@
>> > -//===-- MSP430MCInstLower.h - Lower MachineInstr to MCInst ----------------===//
>> > -//
>> > -// The LLVM Compiler Infrastructure
>> > -//
>> > -// This file is distributed under the University of Illinois Open Source
>> > -// License. See LICENSE.TXT for details.
>> > -//
>> > -//===----------------------------------------------------------------------===//
>> > -
>> > -#ifndef MSP430_MCINSTLOWER_H
>> > -#define MSP430_MCINSTLOWER_H
>> > -
>> > -#include "llvm/Support/Compiler.h"
>> > -
>> > -namespace llvm {
>> > - class AsmPrinter;
>> > - class MCAsmInfo;
>> > - class MCContext;
>> > - class MCInst;
>> > - class MCOperand;
>> > - class MCSymbol;
>> > - class MachineInstr;
>> > - class MachineModuleInfoMachO;
>> > - class MachineOperand;
>> > - class Mangler;
>> > -
>> > - /// MSP430MCInstLower - This class is used to lower an MachineInstr
>> > - /// into an MCInst.
>> > -class LLVM_LIBRARY_VISIBILITY MSP430MCInstLower {
>> > - MCContext &Ctx;
>> > - Mangler &Mang;
>> > -
>> > - AsmPrinter &Printer;
>> > -public:
>> > - MSP430MCInstLower(MCContext &ctx, Mangler &mang, AsmPrinter &printer)
>> > - : Ctx(ctx), Mang(mang), Printer(printer) {}
>> > - void Lower(const MachineInstr *MI, MCInst &OutMI) const;
>> > -
>> > - MCOperand LowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym) const;
>> > -
>> > - MCSymbol *GetGlobalAddressSymbol(const MachineOperand &MO) const;
>> > - MCSymbol *GetExternalSymbolSymbol(const MachineOperand &MO) const;
>> > - MCSymbol *GetJumpTableSymbol(const MachineOperand &MO) const;
>> > - MCSymbol *GetConstantPoolIndexSymbol(const MachineOperand &MO) const;
>> > - MCSymbol *GetBlockAddressSymbol(const MachineOperand &MO) const;
>> > -};
>> > -
>> > -}
>> > -
>> > -#endif
>> >
>> > Modified: llvm/trunk/lib/Target/MSP430/Makefile
>> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/Makefile?rev=115393&r1=115392&r2=115393&view=diff
>> > ==============================================================================
>> > --- llvm/trunk/lib/Target/MSP430/Makefile (original)
>> > +++ llvm/trunk/lib/Target/MSP430/Makefile Fri Oct 1 20:06:42 2010
>> > @@ -18,7 +18,7 @@
>> > MSP430GenDAGISel.inc MSP430GenCallingConv.inc \
>> > MSP430GenSubtarget.inc
>> >
>> > -DIRS = InstPrinter TargetInfo
>> > +DIRS = AsmPrinter TargetInfo
>> >
>> > include $(LEVEL)/Makefile.common
>> >
>> >
>> >
>> > _______________________________________________
>> > llvm-commits mailing list
>> > llvm-commits at cs.uiuc.edu
>> > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>
>>
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>
>
>
>
From grosbach at apple.com Mon Oct 4 12:53:40 2010
From: grosbach at apple.com (Jim Grosbach)
Date: Mon, 04 Oct 2010 17:53:40 -0000
Subject: [llvm-commits] [llvm] r115525 -
/llvm/trunk/lib/Target/MSP430/AsmPrinter/MSP430InstPrinter.cpp
Message-ID: <20101004175340.63A8A2A6C12E@llvm.org>
Author: grosbach
Date: Mon Oct 4 12:53:40 2010
New Revision: 115525
URL: http://llvm.org/viewvc/llvm-project?rev=115525&view=rev
Log:
Remove unneeded header
Modified:
llvm/trunk/lib/Target/MSP430/AsmPrinter/MSP430InstPrinter.cpp
Modified: llvm/trunk/lib/Target/MSP430/AsmPrinter/MSP430InstPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/AsmPrinter/MSP430InstPrinter.cpp?rev=115525&r1=115524&r2=115525&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MSP430/AsmPrinter/MSP430InstPrinter.cpp (original)
+++ llvm/trunk/lib/Target/MSP430/AsmPrinter/MSP430InstPrinter.cpp Mon Oct 4 12:53:40 2010
@@ -13,7 +13,6 @@
#define DEBUG_TYPE "asm-printer"
#include "MSP430.h"
-#include "MSP430InstrInfo.h"
#include "MSP430InstPrinter.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCAsmInfo.h"
From ggreif at gmail.com Mon Oct 4 12:54:30 2010
From: ggreif at gmail.com (Gabor Greif)
Date: Mon, 04 Oct 2010 17:54:30 -0000
Subject: [llvm-commits] [llvm] r115526 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <20101004175430.EAF092A6C12E@llvm.org>
Author: ggreif
Date: Mon Oct 4 12:54:30 2010
New Revision: 115526
URL: http://llvm.org/viewvc/llvm-project?rev=115526&view=rev
Log:
validator fixes; others remain, somebody who knows some html, please have a look
Modified:
llvm/trunk/docs/ReleaseNotes.html
Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=115526&r1=115525&r2=115526&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Mon Oct 4 12:54:30 2010
@@ -197,7 +197,6 @@
Fortran programs using common variables now link correctly.
This section lists changes to the LLVM development infrastructure. This
+mostly impacts users who actively work on LLVM or follow development on
+mainline, but may also impact users who leverage the LLVM build infrastructure
+or are interested in LLVM qualification.
+
+
+
The default for make check is now to use
+ the lit testing tool, which is
+ part of LLVM itself. You can use lit directly as well, or use
+ the llvm-lit tool which is created as part of a Makefile or CMake
+ build (and knows how to find the appropriate tools). See the lit
+ documentation and the blog
+ post, and PR5217
+ for more information.
+
+
The LLVM test-suite infrastructure has a new "simple" test format
+ (make TEST=simple). The new format is intended to require only a
+ compiler and not a full set of LLVM tools. This makes it useful for testing
+ released compilers, for running the test suite with other compilers (for
+ performance comparisons), and makes sure that we are testing the compiler as
+ users would see it. The new format is also designed to work using reference
+ outputs instead of comparison to a baseline compiler, which makes it run much
+ faster and makes it less system dependent.
+
+
Significant progress has been made on a new interface to running the
+ LLVM test-suite (aka the LLVM "nightly tests") using
+ the LNT infrastructure. The LNT
+ interface to the test-suite brings significantly improved reporting
+ capabilities for monitoring the correctness and generated code quality
+ produced by LLVM over time.
+
+
From enderby at apple.com Mon Oct 4 15:17:24 2010
From: enderby at apple.com (Kevin Enderby)
Date: Mon, 04 Oct 2010 20:17:24 -0000
Subject: [llvm-commits] [llvm] r115551 - in /llvm/trunk:
include/llvm/MC/MCContext.h lib/MC/MCContext.cpp lib/MC/MCDwarf.cpp
lib/MC/MCParser/AsmParser.cpp
Message-ID: <20101004201724.4612F2A6C12C@llvm.org>
Author: enderby
Date: Mon Oct 4 15:17:24 2010
New Revision: 115551
URL: http://llvm.org/viewvc/llvm-project?rev=115551&view=rev
Log:
Incorporate suggestions by Daniel Dunbar after his review. Thanks Daniel!
1) Changed ValidateDwarfFileNumber() to isValidDwarfFileNumber() to be better
named. Since it is just a predicate and isn't actually changing any state.
2) Added a missing return in the comments for setCurrentDwarfLoc() in
include/llvm/MC/MCContext.h for fix formatting.
3) Changed clearDwarfLocSeen() to ClearDwarfLocSeen() since it does change
state.
4) Simplified the last test in isValidDwarfFileNumber() to just a one line
boolean test of MCDwarfFiles[FileNumber] != 0 for the final return statement.
Modified:
llvm/trunk/include/llvm/MC/MCContext.h
llvm/trunk/lib/MC/MCContext.cpp
llvm/trunk/lib/MC/MCDwarf.cpp
llvm/trunk/lib/MC/MCParser/AsmParser.cpp
Modified: llvm/trunk/include/llvm/MC/MCContext.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCContext.h?rev=115551&r1=115550&r2=115551&view=diff
==============================================================================
--- llvm/trunk/include/llvm/MC/MCContext.h (original)
+++ llvm/trunk/include/llvm/MC/MCContext.h Mon Oct 4 15:17:24 2010
@@ -160,7 +160,7 @@
/// GetDwarfFile - creates an entry in the dwarf file and directory tables.
unsigned GetDwarfFile(StringRef FileName, unsigned FileNumber);
- bool ValidateDwarfFileNumber(unsigned FileNumber);
+ bool isValidDwarfFileNumber(unsigned FileNumber);
bool hasDwarfFiles(void) {
return MCDwarfFiles.size() != 0;
@@ -177,7 +177,8 @@
}
/// setCurrentDwarfLoc - saves the information from the currently parsed
- /// dwarf .loc directive and sets DwarfLocSeen. When the next instruction /// is assembled an entry in the line number table with this information and
+ /// dwarf .loc directive and sets DwarfLocSeen. When the next instruction
+ /// is assembled an entry in the line number table with this information and
/// the address of the instruction will be created.
void setCurrentDwarfLoc(unsigned FileNum, unsigned Line, unsigned Column,
unsigned Flags, unsigned Isa) {
@@ -188,7 +189,7 @@
CurrentDwarfLoc.setIsa(Isa);
DwarfLocSeen = true;
}
- void clearDwarfLocSeen() { DwarfLocSeen = false; }
+ void ClearDwarfLocSeen() { DwarfLocSeen = false; }
bool getDwarfLocSeen() { return DwarfLocSeen; }
const MCDwarfLoc &getCurrentDwarfLoc() { return CurrentDwarfLoc; }
Modified: llvm/trunk/lib/MC/MCContext.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCContext.cpp?rev=115551&r1=115550&r2=115551&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCContext.cpp (original)
+++ llvm/trunk/lib/MC/MCContext.cpp Mon Oct 4 15:17:24 2010
@@ -255,15 +255,11 @@
return FileNumber;
}
-/// ValidateDwarfFileNumber - takes a dwarf file number and returns true if it
+/// isValidDwarfFileNumber - takes a dwarf file number and returns true if it
/// currently is assigned and false otherwise.
-bool MCContext::ValidateDwarfFileNumber(unsigned FileNumber) {
+bool MCContext::isValidDwarfFileNumber(unsigned FileNumber) {
if(FileNumber == 0 || FileNumber >= MCDwarfFiles.size())
return false;
- MCDwarfFile *&ExistingFile = MCDwarfFiles[FileNumber];
- if (ExistingFile)
- return true;
- else
- return false;
+ return MCDwarfFiles[FileNumber] != 0;
}
Modified: llvm/trunk/lib/MC/MCDwarf.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCDwarf.cpp?rev=115551&r1=115550&r2=115551&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCDwarf.cpp (original)
+++ llvm/trunk/lib/MC/MCDwarf.cpp Mon Oct 4 15:17:24 2010
@@ -76,7 +76,7 @@
MCLineEntry LineEntry(LineSym, DwarfLoc);
// clear DwarfLocSeen saying the current .loc info is now used.
- MCOS->getContext().clearDwarfLocSeen();
+ MCOS->getContext().ClearDwarfLocSeen();
// Get the MCLineSection for this section, if one does not exist for this
// section create it.
Modified: llvm/trunk/lib/MC/MCParser/AsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCParser/AsmParser.cpp?rev=115551&r1=115550&r2=115551&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCParser/AsmParser.cpp (original)
+++ llvm/trunk/lib/MC/MCParser/AsmParser.cpp Mon Oct 4 15:17:24 2010
@@ -2031,7 +2031,7 @@
int64_t FileNumber = getTok().getIntVal();
if (FileNumber < 1)
return TokError("file number less than one in '.loc' directive");
- if (!getContext().ValidateDwarfFileNumber(FileNumber))
+ if (!getContext().isValidDwarfFileNumber(FileNumber))
return TokError("unassigned file number in '.loc' directive");
Lex();
From isanbard at gmail.com Mon Oct 4 15:24:02 2010
From: isanbard at gmail.com (Bill Wendling)
Date: Mon, 04 Oct 2010 20:24:02 -0000
Subject: [llvm-commits] [llvm] r115552 - in /llvm/trunk:
include/llvm/IntrinsicsX86.td lib/Target/X86/X86InstrMMX.td
lib/VMCore/AutoUpgrade.cpp test/Assembler/AutoUpgradeMMXIntrinsics.ll
Message-ID: <20101004202402.19DAB2A6C12C@llvm.org>
Author: void
Date: Mon Oct 4 15:24:01 2010
New Revision: 115552
URL: http://llvm.org/viewvc/llvm-project?rev=115552&view=rev
Log:
The pshufw instruction came about in MMX2 when SSE was introduced. Don't place
it in with the SSSE3 instructions.
Steward! Could you place this chair by the aft sun deck? I'm trying to get away
from the Astors. They are such boors!
Modified:
llvm/trunk/include/llvm/IntrinsicsX86.td
llvm/trunk/lib/Target/X86/X86InstrMMX.td
llvm/trunk/lib/VMCore/AutoUpgrade.cpp
llvm/trunk/test/Assembler/AutoUpgradeMMXIntrinsics.ll
Modified: llvm/trunk/include/llvm/IntrinsicsX86.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IntrinsicsX86.td?rev=115552&r1=115551&r2=115552&view=diff
==============================================================================
--- llvm/trunk/include/llvm/IntrinsicsX86.td (original)
+++ llvm/trunk/include/llvm/IntrinsicsX86.td Mon Oct 4 15:24:01 2010
@@ -630,7 +630,7 @@
def int_x86_ssse3_pshuf_b_128 : GCCBuiltin<"__builtin_ia32_pshufb128">,
Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty,
llvm_v16i8_ty], [IntrNoMem]>;
- def int_x86_ssse3_pshuf_w : GCCBuiltin<"__builtin_ia32_pshufw">,
+ def int_x86_sse_pshuf_w : GCCBuiltin<"__builtin_ia32_pshufw">,
Intrinsic<[llvm_x86mmx_ty], [llvm_x86mmx_ty, llvm_i8_ty],
[IntrNoMem]>;
}
Modified: llvm/trunk/lib/Target/X86/X86InstrMMX.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrMMX.td?rev=115552&r1=115551&r2=115552&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrMMX.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrMMX.td Mon Oct 4 15:24:01 2010
@@ -342,13 +342,13 @@
(outs VR64:$dst), (ins VR64:$src1, i8imm:$src2),
"pshufw\t{$src2, $src1, $dst|$dst, $src1, $src2}",
[(set VR64:$dst,
- (int_x86_ssse3_pshuf_w VR64:$src1, imm:$src2))]>;
+ (int_x86_sse_pshuf_w VR64:$src1, imm:$src2))]>;
def MMX_PSHUFWmi : MMXIi8<0x70, MRMSrcMem,
(outs VR64:$dst), (ins i64mem:$src1, i8imm:$src2),
"pshufw\t{$src2, $src1, $dst|$dst, $src1, $src2}",
[(set VR64:$dst,
- (int_x86_ssse3_pshuf_w (load_mmx addr:$src1),
- imm:$src2))]>;
+ (int_x86_sse_pshuf_w (load_mmx addr:$src1),
+ imm:$src2))]>;
Modified: llvm/trunk/lib/VMCore/AutoUpgrade.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/AutoUpgrade.cpp?rev=115552&r1=115551&r2=115552&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/AutoUpgrade.cpp (original)
+++ llvm/trunk/lib/VMCore/AutoUpgrade.cpp Mon Oct 4 15:24:01 2010
@@ -528,6 +528,16 @@
// or 0.
NewFn = 0;
return true;
+ } else if (Name.compare(5, 17, "x86.ssse3.pshuf.w", 17) == 0) {
+ // This is an SSE/MMX instruction.
+ const Type *X86_MMXTy = VectorType::getX86_MMXTy(FTy->getContext());
+ NewFn =
+ cast(M->getOrInsertFunction("llvm.x86.sse.pshuf.w",
+ X86_MMXTy,
+ X86_MMXTy,
+ Type::getInt8Ty(F->getContext()),
+ (Type*)0));
+ return true;
}
break;
@@ -631,22 +641,23 @@
NewCI->setTailCall(OldCI->isTailCall());
NewCI->setCallingConv(OldCI->getCallingConv());
- // Handle any uses of the old CallInst.
+ // Handle any uses of the old CallInst. If the type has changed, add a cast.
if (!OldCI->use_empty()) {
- // If the type has changed, add a cast.
- Instruction *I = OldCI;
if (OldCI->getType() != NewCI->getType()) {
Function *OldFn = OldCI->getCalledFunction();
CastInst *RetCast =
CastInst::Create(CastInst::getCastOpcode(NewCI, true,
OldFn->getReturnType(), true),
NewCI, OldFn->getReturnType(), NewCI->getName(),OldCI);
- I = RetCast;
+
+ // Replace all uses of the old call with the new cast which has the
+ // correct type.
+ OldCI->replaceAllUsesWith(RetCast);
+ } else {
+ OldCI->replaceAllUsesWith(NewCI);
}
- // Replace all uses of the old call with the new cast which has the
- // correct type.
- OldCI->replaceAllUsesWith(I);
}
+
// Clean up the old call now that it has been completely upgraded.
OldCI->eraseFromParent();
}
@@ -1150,6 +1161,25 @@
ConstructNewCallInst(NewFn, CI, Operands, 3);
break;
}
+ case Intrinsic::x86_sse_pshuf_w: {
+ IRBuilder<> Builder(C);
+ Builder.SetInsertPoint(CI->getParent(), CI);
+
+ // Cast the operand to the X86 MMX type.
+ Value *Operands[2];
+ Operands[0] =
+ Builder.CreateBitCast(CI->getArgOperand(0),
+ NewFn->getFunctionType()->getParamType(0),
+ "upgraded.");
+ Operands[1] =
+ Builder.CreateTrunc(CI->getArgOperand(1),
+ Type::getInt8Ty(C),
+ "upgraded.");
+
+ ConstructNewCallInst(NewFn, CI, Operands, 2);
+ break;
+ }
+
#if 0
case Intrinsic::x86_mmx_cvtsi32_si64: {
// The return type needs to be changed.
Modified: llvm/trunk/test/Assembler/AutoUpgradeMMXIntrinsics.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Assembler/AutoUpgradeMMXIntrinsics.ll?rev=115552&r1=115551&r2=115552&view=diff
==============================================================================
--- llvm/trunk/test/Assembler/AutoUpgradeMMXIntrinsics.ll (original)
+++ llvm/trunk/test/Assembler/AutoUpgradeMMXIntrinsics.ll Mon Oct 4 15:24:01 2010
@@ -4,6 +4,7 @@
; RUN: grep {llvm\\.x86\\.mmx} %t | not grep {\\\<2 x i32\\\>}
; RUN: grep {llvm\\.x86\\.mmx} %t | not grep {\\\<4 x i16\\\>}
; RUN: grep {llvm\\.x86\\.mmx} %t | not grep {\\\<8 x i8\\\>}
+; RUN: grep {llvm\\.x86\\.sse\\.pshuf\\.w} %t | not grep i32
; Addition
declare <8 x i8> @llvm.x86.mmx.padd.b(<8 x i8>, <8 x i8>) nounwind readnone
@@ -207,6 +208,7 @@
declare <1 x i64> @llvm.x86.mmx.palignr.b(<1 x i64>, <1 x i64>, i8) nounwind readnone
declare i32 @llvm.x86.mmx.pextr.w(<1 x i64>, i32) nounwind readnone
declare <1 x i64> @llvm.x86.mmx.pinsr.w(<1 x i64>, i32, i32) nounwind readnone
+declare <4 x i16> @llvm.x86.ssse3.pshuf.w(<4 x i16>, i32) nounwind readnone
define void @misc(<8 x i8> %A, <8 x i8> %B, <4 x i16> %C, <4 x i16> %D,
<2 x i32> %E, <2 x i32> %F, <1 x i64> %G, <1 x i64> %H,
i32* %I, i8 %J, i16 %K, i32 %L) {
@@ -216,5 +218,6 @@
%r2 = call <1 x i64> @llvm.x86.mmx.palignr.b(<1 x i64> %G, <1 x i64> %H, i8 %J)
%r3 = call i32 @llvm.x86.mmx.pextr.w(<1 x i64> %G, i32 37)
%r4 = call <1 x i64> @llvm.x86.mmx.pinsr.w(<1 x i64> %G, i32 37, i32 927)
+ %r5 = call <4 x i16> @llvm.x86.ssse3.pshuf.w(<4 x i16> %C, i32 37)
ret void
}
From isanbard at gmail.com Mon Oct 4 15:36:41 2010
From: isanbard at gmail.com (Bill Wendling)
Date: Mon, 04 Oct 2010 20:36:41 -0000
Subject: [llvm-commits] [www-releases] r115553 - /www-releases/trunk/2.8/
Message-ID: <20101004203641.C3B972A6C12C@llvm.org>
Author: void
Date: Mon Oct 4 15:36:41 2010
New Revision: 115553
URL: http://llvm.org/viewvc/llvm-project?rev=115553&view=rev
Log:
Creating directory for 2.8 goodness.
Added:
www-releases/trunk/2.8/
From isanbard at gmail.com Mon Oct 4 15:49:24 2010
From: isanbard at gmail.com (Bill Wendling)
Date: Mon, 04 Oct 2010 20:49:24 -0000
Subject: [llvm-commits] [www-releases] r115556 [3/3] - in
/www-releases/trunk/2.8: ./ docs/ docs/CommandGuide/
docs/CommandGuide/html/ docs/CommandGuide/man/ docs/CommandGuide/man/man1/
docs/CommandGuide/ps/ docs/HistoricalNotes/ docs/img/ docs/tutorial/
Message-ID: <20101004204926.EEDC12A6C12D@llvm.org>
Added: www-releases/trunk/2.8/docs/WritingAnLLVMBackend.html
URL: http://llvm.org/viewvc/llvm-project/www-releases/trunk/2.8/docs/WritingAnLLVMBackend.html?rev=115556&view=auto
==============================================================================
--- www-releases/trunk/2.8/docs/WritingAnLLVMBackend.html (added)
+++ www-releases/trunk/2.8/docs/WritingAnLLVMBackend.html Mon Oct 4 15:49:23 2010
@@ -0,0 +1,2556 @@
+
+
+
+
+ Writing an LLVM Compiler Backend
+
+
+
+
+
+
+This document describes techniques for writing compiler backends that convert
+the LLVM Intermediate Representation (IR) to code for a specified machine or
+other languages. Code intended for a specific machine can take the form of
+either assembly code or binary code (usable for a JIT compiler).
+
+
+
+The backend of LLVM features a target-independent code generator that may create
+output for several types of target CPUs — including X86, PowerPC, Alpha,
+and SPARC. The backend may also be used to generate code targeted at SPUs of the
+Cell processor or GPUs to support the execution of compute kernels.
+
+
+
+The document focuses on existing examples found in subdirectories
+of llvm/lib/Target in a downloaded LLVM release. In particular, this
+document focuses on the example of creating a static compiler (one that emits
+text assembly) for a SPARC target, because SPARC has fairly standard
+characteristics, such as a RISC instruction set and straightforward calling
+conventions.
+
The LLVM
+ Target-Independent Code Generator — a guide to the components
+ (classes and code generation algorithms) for translating the LLVM internal
+ representation into machine code for a specified target. Pay particular
+ attention to the descriptions of code generation stages: Instruction
+ Selection, Scheduling and Formation, SSA-based Optimization, Register
+ Allocation, Prolog/Epilog Code Insertion, Late Machine Code Optimizations,
+ and Code Emission.
+
+
TableGen
+ Fundamentals —a document that describes the TableGen
+ (tblgen) application that manages domain-specific information to
+ support LLVM code generation. TableGen processes input from a target
+ description file (.td suffix) and generates C++ code that can be
+ used for code generation.
+
+
Writing an LLVM
+ Pass — The assembly printer is a FunctionPass, as are
+ several SelectionDAG processing steps.
+
+
+
+To follow the SPARC examples in this document, have a copy of
+The SPARC Architecture
+Manual, Version 8 for reference. For details about the ARM instruction
+set, refer to the ARM Architecture
+Reference Manual. For more about the GNU Assembler format
+(GAS), see
+Using As,
+especially for the assembly printer. Using As contains a list of target
+machine dependent features.
+
+To write a compiler backend for LLVM that converts the LLVM IR to code for a
+specified target (machine or other language), follow these steps:
+
+
+
+
Create a subclass of the TargetMachine class that describes characteristics
+ of your target machine. Copy existing examples of specific TargetMachine
+ class and header files; for example, start with
+ SparcTargetMachine.cpp and SparcTargetMachine.h, but
+ change the file names for your target. Similarly, change code that
+ references "Sparc" to reference your target.
+
+
Describe the register set of the target. Use TableGen to generate code for
+ register definition, register aliases, and register classes from a
+ target-specific RegisterInfo.td input file. You should also write
+ additional code for a subclass of the TargetRegisterInfo class that
+ represents the class register file data used for register allocation and
+ also describes the interactions between registers.
+
+
Describe the instruction set of the target. Use TableGen to generate code
+ for target-specific instructions from target-specific versions of
+ TargetInstrFormats.td and TargetInstrInfo.td. You should
+ write additional code for a subclass of the TargetInstrInfo class to
+ represent machine instructions supported by the target machine.
+
+
Describe the selection and conversion of the LLVM IR from a Directed Acyclic
+ Graph (DAG) representation of instructions to native target-specific
+ instructions. Use TableGen to generate code that matches patterns and
+ selects instructions based on additional information in a target-specific
+ version of TargetInstrInfo.td. Write code
+ for XXXISelDAGToDAG.cpp, where XXX identifies the specific target,
+ to perform pattern matching and DAG-to-DAG instruction selection. Also write
+ code in XXXISelLowering.cpp to replace or remove operations and
+ data types that are not supported natively in a SelectionDAG.
+
+
Write code for an assembly printer that converts LLVM IR to a GAS format for
+ your target machine. You should add assembly strings to the instructions
+ defined in your target-specific version of TargetInstrInfo.td. You
+ should also write code for a subclass of AsmPrinter that performs the
+ LLVM-to-assembly conversion and a trivial subclass of TargetAsmInfo.
+
+
Optionally, add support for subtargets (i.e., variants with different
+ capabilities). You should also write code for a subclass of the
+ TargetSubtarget class, which allows you to use the -mcpu=
+ and -mattr= command-line options.
+
+
Optionally, add JIT support and create a machine code emitter (subclass of
+ TargetJITInfo) that is used to emit binary code directly into memory.
+
+
+
+In the .cpp and .h. files, initially stub up these methods and
+then implement them later. Initially, you may not know which private members
+that the class will need and which components will need to be subclassed.
+
+To actually create your compiler backend, you need to create and modify a few
+files. The absolute minimum is discussed here. But to actually use the LLVM
+target-independent code generator, you must perform the steps described in
+the LLVM
+Target-Independent Code Generator document.
+
+
+
+First, you should create a subdirectory under lib/Target to hold all
+the files related to your target. If your target is called "Dummy," create the
+directory lib/Target/Dummy.
+
+
+
+In this new
+directory, create a Makefile. It is easiest to copy a
+Makefile of another target and modify it. It should at least contain
+the LEVEL, LIBRARYNAME and TARGET variables, and then
+include $(LEVEL)/Makefile.common. The library can be
+named LLVMDummy (for example, see the MIPS target). Alternatively, you
+can split the library into LLVMDummyCodeGen
+and LLVMDummyAsmPrinter, the latter of which should be implemented in a
+subdirectory below lib/Target/Dummy (for example, see the PowerPC
+target).
+
+
+
+Note that these two naming schemes are hardcoded into llvm-config.
+Using any other naming scheme will confuse llvm-config and produce a
+lot of (seemingly unrelated) linker errors when linking llc.
+
+
+
+To make your target actually do something, you need to implement a subclass of
+TargetMachine. This implementation should typically be in the file
+lib/Target/DummyTargetMachine.cpp, but any file in
+the lib/Target directory will be built and should work. To use LLVM's
+target independent code generator, you should do what all current machine
+backends do: create a subclass of LLVMTargetMachine. (To create a
+target from scratch, create a subclass of TargetMachine.)
+
+
+
+To get LLVM to actually build and link your target, you need to add it to
+the TARGETS_TO_BUILD variable. To do this, you modify the configure
+script to know about your target when parsing the --enable-targets
+option. Search the configure script for TARGETS_TO_BUILD, add your
+target to the lists there (some creativity required), and then
+reconfigure. Alternatively, you can change autotools/configure.ac and
+regenerate configure by running ./autoconf/AutoRegen.sh.
+
+LLVMTargetMachine is designed as a base class for targets implemented
+with the LLVM target-independent code generator. The LLVMTargetMachine
+class should be specialized by a concrete target class that implements the
+various virtual methods. LLVMTargetMachine is defined as a subclass of
+TargetMachine in include/llvm/Target/TargetMachine.h. The
+TargetMachine class implementation (TargetMachine.cpp) also
+processes numerous command-line options.
+
+
+
+To create a concrete target-specific subclass of LLVMTargetMachine,
+start by copying an existing TargetMachine class and header. You
+should name the files that you create to reflect your specific target. For
+instance, for the SPARC target, name the files SparcTargetMachine.h and
+SparcTargetMachine.cpp.
+
+
+
+For a target machine XXX, the implementation of
+XXXTargetMachine must have access methods to obtain objects that
+represent target components. These methods are named get*Info, and are
+intended to obtain the instruction set (getInstrInfo), register set
+(getRegisterInfo), stack frame layout (getFrameInfo), and
+similar information. XXXTargetMachine must also implement the
+getTargetData method to access an object with target-specific data
+characteristics, such as data type size and alignment requirements.
+
+
+
+For instance, for the SPARC target, the header file
+SparcTargetMachine.h declares prototypes for several get*Info
+and getTargetData methods that simply return a class member.
+
For some targets, you also need to support the following methods:
+
+
+
getTargetLowering()
+
getJITInfo()
+
+
+
+In addition, the XXXTargetMachine constructor should specify a
+TargetDescription string that determines the data layout for the target
+machine, including characteristics such as pointer size, alignment, and
+endianness. For example, the constructor for SparcTargetMachine contains the
+following:
+
Hyphens separate portions of the TargetDescription string.
+
+
+
An upper-case "E" in the string indicates a big-endian target data
+ model. a lower-case "e" indicates little-endian.
+
+
"p:" is followed by pointer information: size, ABI alignment, and
+ preferred alignment. If only two figures follow "p:", then the
+ first value is pointer size, and the second value is both ABI and preferred
+ alignment.
+
+
Then a letter for numeric type alignment: "i", "f",
+ "v", or "a" (corresponding to integer, floating point,
+ vector, or aggregate). "i", "v", or "a" are
+ followed by ABI alignment and preferred alignment. "f" is followed
+ by three values: the first indicates the size of a long double, then ABI
+ alignment, and then ABI preferred alignment.
+You must also register your target with the TargetRegistry, which is
+what other LLVM tools use to be able to lookup and use your target at
+runtime. The TargetRegistry can be used directly, but for most targets
+there are helper templates which should take care of the work for you.
+
+
+All targets should declare a global Target object which is used to
+represent the target during registration. Then, in the target's TargetInfo
+library, the target should define that object and use
+the RegisterTarget template to register the target. For example, the Sparc registration code looks like this:
+
+This allows the TargetRegistry to look up the target by name or by
+target triple. In addition, most targets will also register additional features
+which are available in separate libraries. These registration steps are
+separate, because some clients may wish to only link in some parts of the target
+-- the JIT code generator does not require the use of the assembler printer, for
+example. Here is an example of registering the Sparc assembly printer:
+
+You should describe a concrete target-specific class that represents the
+register file of a target machine. This class is called XXXRegisterInfo
+(where XXX identifies the target) and represents the class register
+file data that is used for register allocation. It also describes the
+interactions between registers.
+
+
+
+You also need to define register classes to categorize related registers. A
+register class should be added for groups of registers that are all treated the
+same way for some instruction. Typical examples are register classes for
+integer, floating-point, or vector registers. A register allocator allows an
+instruction to use any register in a specified register class to perform the
+instruction in a similar manner. Register classes allocate virtual registers to
+instructions from these sets, and register classes let the target-independent
+register allocator automatically choose the actual registers.
+
+
+
+Much of the code for registers, including register definition, register aliases,
+and register classes, is generated by TableGen from XXXRegisterInfo.td
+input files and placed in XXXGenRegisterInfo.h.inc and
+XXXGenRegisterInfo.inc output files. Some of the code in the
+implementation of XXXRegisterInfo requires hand-coding.
+
+The XXXRegisterInfo.td file typically starts with register definitions
+for a target machine. The Register class (specified
+in Target.td) is used to define an object for each register. The
+specified string n becomes the Name of the register. The
+basic Register object does not have any subregisters and does not
+specify any aliases.
+
+For example, in the X86RegisterInfo.td file, there are register
+definitions that utilize the Register class, such as:
+
+
+
+
+def AL : Register<"AL">, DwarfRegNum<[0, 0, 0]>;
+
+
+
+
+This defines the register AL and assigns it values (with
+DwarfRegNum) that are used by gcc, gdb, or a debug
+information writer to identify a register. For register
+AL, DwarfRegNum takes an array of 3 values representing 3
+different modes: the first element is for X86-64, the second for exception
+handling (EH) on X86-32, and the third is generic. -1 is a special Dwarf number
+that indicates the gcc number is undefined, and -2 indicates the register number
+is invalid for this mode.
+
+
+
+From the previously described line in the X86RegisterInfo.td file,
+TableGen generates this code in the X86GenRegisterInfo.inc file:
+
+From the register info file, TableGen generates a TargetRegisterDesc
+object for each register. TargetRegisterDesc is defined in
+include/llvm/Target/TargetRegisterInfo.h with the following fields:
+
+
+
+
+struct TargetRegisterDesc {
+ const char *AsmName; // Assembly language name for the register
+ const char *Name; // Printable name for the reg (for debugging)
+ const unsigned *AliasSet; // Register Alias Set
+ const unsigned *SubRegs; // Sub-register set
+ const unsigned *ImmSubRegs; // Immediate sub-register set
+ const unsigned *SuperRegs; // Super-register set
+};
+
+
+
+TableGen uses the entire target description file (.td) to determine
+text names for the register (in the AsmName and Name fields of
+TargetRegisterDesc) and the relationships of other registers to the
+defined register (in the other TargetRegisterDesc fields). In this
+example, other definitions establish the registers "AX",
+"EAX", and "RAX" as aliases for one another, so TableGen
+generates a null-terminated array (AL_AliasSet) for this register alias
+set.
+
+
+
+The Register class is commonly used as a base class for more complex
+classes. In Target.td, the Register class is the base for the
+RegisterWithSubRegs class that is used to define registers that need to
+specify subregisters in the SubRegs list, as shown here:
+
+
+
+
+class RegisterWithSubRegs<string n,
+list<Register> subregs> : Register<n> {
+ let SubRegs = subregs;
+}
+
+
+
+
+In SparcRegisterInfo.td, additional register classes are defined for
+SPARC: a Register subclass, SparcReg, and further subclasses: Ri,
+Rf, and Rd. SPARC registers are identified by 5-bit ID
+numbers, which is a feature common to these subclasses. Note the use of
+'let' expressions to override values that are initially defined in a
+superclass (such as SubRegs field in the Rd class).
+
+
+
+
+class SparcReg<string n> : Register<n> {
+ field bits<5> Num;
+ let Namespace = "SP";
+}
+// Ri - 32-bit integer registers
+class Ri<bits<5> num, string n> :
+SparcReg<n> {
+ let Num = num;
+}
+// Rf - 32-bit floating-point registers
+class Rf<bits<5> num, string n> :
+SparcReg<n> {
+ let Num = num;
+}
+// Rd - Slots in the FP register file for 64-bit
+floating-point values.
+class Rd<bits<5> num, string n,
+list<Register> subregs> : SparcReg<n> {
+ let Num = num;
+ let SubRegs = subregs;
+}
+
+
+
+
+In the SparcRegisterInfo.td file, there are register definitions that
+utilize these subclasses of Register, such as:
+
+The last two registers shown above (D0 and D1) are
+double-precision floating-point registers that are aliases for pairs of
+single-precision floating-point sub-registers. In addition to aliases, the
+sub-register and super-register relationships of the defined register are in
+fields of a register's TargetRegisterDesc.
+
+The RegisterClass class (specified in Target.td) is used to
+define an object that represents a group of related registers and also defines
+the default allocation order of the registers. A target description file
+XXXRegisterInfo.td that uses Target.td can construct register
+classes using the following class:
+
+
+
+
+class RegisterClass<string namespace,
+list<ValueType> regTypes, int alignment,
+ list<Register> regList> {
+ string Namespace = namespace;
+ list<ValueType> RegTypes = regTypes;
+ int Size = 0; // spill size, in bits; zero lets tblgen pick the size
+ int Alignment = alignment;
+
+ // CopyCost is the cost of copying a value between two registers
+ // default value 1 means a single instruction
+ // A negative value means copying is extremely expensive or impossible
+ int CopyCost = 1;
+ list<Register> MemberList = regList;
+
+ // for register classes that are subregisters of this class
+ list<RegisterClass> SubRegClassList = [];
+
+ code MethodProtos = [{}]; // to insert arbitrary code
+ code MethodBodies = [{}];
+}
+
+
+
+
To define a RegisterClass, use the following 4 arguments:
+
+
+
The first argument of the definition is the name of the namespace.
+
+
The second argument is a list of ValueType register type values
+ that are defined in include/llvm/CodeGen/ValueTypes.td. Defined
+ values include integer types (such as i16, i32,
+ and i1 for Boolean), floating-point types
+ (f32, f64), and vector types (for example, v8i16
+ for an 8 x i16 vector). All registers in a RegisterClass
+ must have the same ValueType, but some registers may store vector
+ data in different configurations. For example a register that can process a
+ 128-bit vector may be able to handle 16 8-bit integer elements, 8 16-bit
+ integers, 4 32-bit integers, and so on.
+
+
The third argument of the RegisterClass definition specifies the
+ alignment required of the registers when they are stored or loaded to
+ memory.
+
+
The final argument, regList, specifies which registers are in this
+ class. If an allocation_order_* method is not specified,
+ then regList also defines the order of allocation used by the
+ register allocator.
+
+
+
+In SparcRegisterInfo.td, three RegisterClass objects are defined:
+FPRegs, DFPRegs, and IntRegs. For all three register
+classes, the first argument defines the namespace with the string
+'SP'. FPRegs defines a group of 32 single-precision
+floating-point registers (F0 to F31); DFPRegs defines
+a group of 16 double-precision registers
+(D0-D15). For IntRegs, the MethodProtos
+and MethodBodies methods are used by TableGen to insert the specified
+code into generated output.
+
+Using SparcRegisterInfo.td with TableGen generates several output files
+that are intended for inclusion in other source code that you write.
+SparcRegisterInfo.td generates SparcGenRegisterInfo.h.inc,
+which should be included in the header file for the implementation of the SPARC
+register implementation that you write (SparcRegisterInfo.h). In
+SparcGenRegisterInfo.h.inc a new structure is defined called
+SparcGenRegisterInfo that uses TargetRegisterInfo as its
+base. It also specifies types, based upon the defined register
+classes: DFPRegsClass, FPRegsClass, and IntRegsClass.
+
+
+
+SparcRegisterInfo.td also generates SparcGenRegisterInfo.inc,
+which is included at the bottom of SparcRegisterInfo.cpp, the SPARC
+register implementation. The code below shows only the generated integer
+registers and associated register classes. The order of registers
+in IntRegs reflects the order in the definition of IntRegs in
+the target description file. Take special note of the use
+of MethodBodies in SparcRegisterInfo.td to create code in
+SparcGenRegisterInfo.inc. MethodProtos generates similar code
+in SparcGenRegisterInfo.h.inc.
+
+The final step is to hand code portions of XXXRegisterInfo, which
+implements the interface described in TargetRegisterInfo.h. These
+functions return 0, NULL, or false, unless
+overridden. Here is a list of functions that are overridden for the SPARC
+implementation in SparcRegisterInfo.cpp:
+
+
+
+
getCalleeSavedRegs — Returns a list of callee-saved registers
+ in the order of the desired callee-save stack frame offset.
+
+
getReservedRegs — Returns a bitset indexed by physical
+ register numbers, indicating if a particular register is unavailable.
+
+
hasFP — Return a Boolean indicating if a function should have
+ a dedicated frame pointer register.
+
+
eliminateCallFramePseudoInstr — If call frame setup or
+ destroy pseudo instructions are used, this can be called to eliminate
+ them.
+
+
eliminateFrameIndex — Eliminate abstract frame indices from
+ instructions that may use them.
+
+
emitPrologue — Insert prologue code into the function.
+
+
emitEpilogue — Insert epilogue code into the function.
+During the early stages of code generation, the LLVM IR code is converted to a
+SelectionDAG with nodes that are instances of the SDNode class
+containing target instructions. An SDNode has an opcode, operands, type
+requirements, and operation properties. For example, is an operation
+commutative, does an operation load from memory. The various operation node
+types are described in the include/llvm/CodeGen/SelectionDAGNodes.h
+file (values of the NodeType enum in the ISD namespace).
+
+
+
+TableGen uses the following target description (.td) input files to
+generate much of the code for instruction definition:
+
+
+
+
Target.td — Where the Instruction, Operand,
+ InstrInfo, and other fundamental classes are defined.
+
+
TargetSelectionDAG.td— Used by SelectionDAG
+ instruction selection generators, contains SDTC* classes (selection
+ DAG type constraint), definitions of SelectionDAG nodes (such as
+ imm, cond, bb, add, fadd,
+ sub), and pattern support (Pattern, Pat,
+ PatFrag, PatLeaf, ComplexPattern.
+
+
XXXInstrFormats.td — Patterns for definitions of
+ target-specific instructions.
+
+
XXXInstrInfo.td — Target-specific definitions of instruction
+ templates, condition codes, and instructions of an instruction set. For
+ architecture modifications, a different file name may be used. For example,
+ for Pentium with SSE instruction, this file is X86InstrSSE.td, and
+ for Pentium with MMX, this file is X86InstrMMX.td.
+
+
+
+There is also a target-specific XXX.td file, where XXX is the
+name of the target. The XXX.td file includes the other .td
+input files, but its contents are only directly important for subtargets.
+
+
+
+You should describe a concrete target-specific class XXXInstrInfo that
+represents machine instructions supported by a target machine.
+XXXInstrInfo contains an array of XXXInstrDescriptor objects,
+each of which describes one instruction. An instruction descriptor defines:
+
+
+
Opcode mnemonic
+
+
Number of operands
+
+
List of implicit register definitions and uses
+
+
Target-independent properties (such as memory access, is commutable)
+
+
Target-specific flags
+
+
+
+The Instruction class (defined in Target.td) is mostly used as a base
+for more complex instruction classes.
+
+
+
+
class Instruction {
+ string Namespace = "";
+ dag OutOperandList; // An dag containing the MI def operand list.
+ dag InOperandList; // An dag containing the MI use operand list.
+ string AsmString = ""; // The .s format to print the instruction with.
+ list<dag> Pattern; // Set to the DAG pattern for this instruction
+ list<Register> Uses = [];
+ list<Register> Defs = [];
+ list<Predicate> Predicates = []; // predicates turned into isel match code
+ ... remainder not shown for space ...
+}
+
+
+
+
+A SelectionDAG node (SDNode) should contain an object
+representing a target-specific instruction that is defined
+in XXXInstrInfo.td. The instruction objects should represent
+instructions from the architecture manual of the target machine (such as the
+SPARC Architecture Manual for the SPARC target).
+
+
+
+A single instruction from the architecture manual is often modeled as multiple
+target instructions, depending upon its operands. For example, a manual might
+describe an add instruction that takes a register or an immediate operand. An
+LLVM target could model this with two instructions named ADDri and
+ADDrr.
+
+
+
+You should define a class for each instruction category and define each opcode
+as a subclass of the category with appropriate parameters such as the fixed
+binary encoding of opcodes and extended opcodes. You should map the register
+bits to the bits of the instruction in which they are encoded (for the
+JIT). Also you should specify how the instruction should be printed when the
+automatic assembly printer is used.
+
+
+
+As is described in the SPARC Architecture Manual, Version 8, there are three
+major 32-bit formats for instructions. Format 1 is only for the CALL
+instruction. Format 2 is for branch on condition codes and SETHI (set
+high bits of a register) instructions. Format 3 is for other instructions.
+
+
+
+Each of these formats has corresponding classes in SparcInstrFormat.td.
+InstSP is a base class for other instruction classes. Additional base
+classes are specified for more precise formats: for example
+in SparcInstrFormat.td, F2_1 is for SETHI,
+and F2_2 is for branches. There are three other base
+classes: F3_1 for register/register operations, F3_2 for
+register/immediate operations, and F3_3 for floating-point
+operations. SparcInstrInfo.td also adds the base class Pseudo for
+synthetic SPARC instructions.
+
+
+
+SparcInstrInfo.td largely consists of operand and instruction
+definitions for the SPARC target. In SparcInstrInfo.td, the following
+target description file entry, LDrr, defines the Load Integer
+instruction for a Word (the LD SPARC opcode) from a memory address to a
+register. The first parameter, the value 3 (112), is the
+operation value for this category of operation. The second parameter
+(0000002) is the specific operation value
+for LD/Load Word. The third parameter is the output destination, which
+is a register operand and defined in the Register target description
+file (IntRegs).
+
+The fourth parameter is the input source, which uses the address
+operand MEMrr that is defined earlier in SparcInstrInfo.td:
+
+
+
+
def MEMrr : Operand<i32> {
+ let PrintMethod = "printMemOperand";
+ let MIOperandInfo = (ops IntRegs, IntRegs);
+}
+
+
+
+
+The fifth parameter is a string that is used by the assembly printer and can be
+left as an empty string until the assembly printer interface is implemented. The
+sixth and final parameter is the pattern used to match the instruction during
+the SelectionDAG Select Phase described in
+(The LLVM
+Target-Independent Code Generator). This parameter is detailed in the next
+section, Instruction Selector.
+
+
+
+Instruction class definitions are not overloaded for different operand types, so
+separate versions of instructions are needed for register, memory, or immediate
+value operands. For example, to perform a Load Integer instruction for a Word
+from an immediate operand to a register, the following instruction class is
+defined:
+
+Writing these definitions for so many similar instructions can involve a lot of
+cut and paste. In td files, the multiclass directive enables the
+creation of templates to define several instruction classes at once (using
+the defm directive). For example in SparcInstrInfo.td, the
+multiclass pattern F3_12 is defined to create 2 instruction
+classes each time F3_12 is invoked:
+
+So when the defm directive is used for the XOR
+and ADD instructions, as seen below, it creates four instruction
+objects: XORrr, XORri, ADDrr, and ADDri.
+
+SparcInstrInfo.td also includes definitions for condition codes that
+are referenced by branch instructions. The following definitions
+in SparcInstrInfo.td indicate the bit location of the SPARC condition
+code. For example, the 10th bit represents the 'greater than'
+condition for integers, and the 22nd bit represents the 'greater
+than' condition for floats.
+
+(Note that Sparc.h also defines enums that correspond to the same SPARC
+condition codes. Care must be taken to ensure the values in Sparc.h
+correspond to the values in SparcInstrInfo.td. I.e.,
+SPCC::ICC_NE = 9, SPCC::FCC_U = 23 and so on.)
+
+The code generator backend maps instruction operands to fields in the
+instruction. Operands are assigned to unbound fields in the instruction in the
+order they are defined. Fields are bound when they are assigned a value. For
+example, the Sparc target defines the XNORrr instruction as
+a F3_1 format instruction having three operands.
+
+The instruction templates in SparcInstrFormats.td show the base class
+for F3_1 is InstSP.
+
+
+
+
+class InstSP<dag outs, dag ins, string asmstr, list<dag> pattern> : Instruction {
+ field bits<32> Inst;
+ let Namespace = "SP";
+ bits<2> op;
+ let Inst{31-30} = op;
+ dag OutOperandList = outs;
+ dag InOperandList = ins;
+ let AsmString = asmstr;
+ let Pattern = pattern;
+}
+
+
+
+
InstSP leaves the op field unbound.
+
+
+
+class F3<dag outs, dag ins, string asmstr, list<dag> pattern>
+ : InstSP<outs, ins, asmstr, pattern> {
+ bits<5> rd;
+ bits<6> op3;
+ bits<5> rs1;
+ let op{1} = 1; // Op = 2 or 3
+ let Inst{29-25} = rd;
+ let Inst{24-19} = op3;
+ let Inst{18-14} = rs1;
+}
+
+
+
+
+F3 binds the op field and defines the rd,
+op3, and rs1 fields. F3 format instructions will
+bind the operands rd, op3, and rs1 fields.
+
+
+
+
+class F3_1<bits<2> opVal, bits<6> op3val, dag outs, dag ins,
+ string asmstr, list<dag> pattern> : F3<outs, ins, asmstr, pattern> {
+ bits<8> asi = 0; // asi not currently used
+ bits<5> rs2;
+ let op = opVal;
+ let op3 = op3val;
+ let Inst{13} = 0; // i field = 0
+ let Inst{12-5} = asi; // address space identifier
+ let Inst{4-0} = rs2;
+}
+
+
+
+
+F3_1 binds the op3 field and defines the rs2
+fields. F3_1 format instructions will bind the operands to the rd,
+rs1, and rs2 fields. This results in the XNORrr
+instruction binding $dst, $b, and $c operands to
+the rd, rs1, and rs2 fields respectively.
+
+The final step is to hand code portions of XXXInstrInfo, which
+implements the interface described in TargetInstrInfo.h. These
+functions return 0 or a Boolean or they assert, unless
+overridden. Here's a list of functions that are overridden for the SPARC
+implementation in SparcInstrInfo.cpp:
+
+
+
+
isLoadFromStackSlot — If the specified machine instruction is
+ a direct load from a stack slot, return the register number of the
+ destination and the FrameIndex of the stack slot.
+
+
isStoreToStackSlot — If the specified machine instruction is
+ a direct store to a stack slot, return the register number of the
+ destination and the FrameIndex of the stack slot.
+
+
copyPhysReg — Copy values between a pair of physical
+ registers.
+
+
storeRegToStackSlot — Store a register value to a stack
+ slot.
+
+
loadRegFromStackSlot — Load a register value from a stack
+ slot.
+
+
storeRegToAddr — Store a register value to memory.
+
+
loadRegFromAddr — Load a register value from memory.
+
+
foldMemoryOperand — Attempt to combine instructions of any
+ load or store instruction for the specified operand(s).
+Performance can be improved by combining instructions or by eliminating
+instructions that are never reached. The AnalyzeBranch method
+in XXXInstrInfo may be implemented to examine conditional instructions
+and remove unnecessary instructions. AnalyzeBranch looks at the end of
+a machine basic block (MBB) for opportunities for improvement, such as branch
+folding and if conversion. The BranchFolder and IfConverter
+machine function passes (see the source files BranchFolding.cpp and
+IfConversion.cpp in the lib/CodeGen directory) call
+AnalyzeBranch to improve the control flow graph that represents the
+instructions.
+
+
+
+Several implementations of AnalyzeBranch (for ARM, Alpha, and X86) can
+be examined as models for your own AnalyzeBranch implementation. Since
+SPARC does not implement a useful AnalyzeBranch, the ARM target
+implementation is shown below.
+
+
+
AnalyzeBranch returns a Boolean value and takes four parameters:
+
+
+
MachineBasicBlock &MBB — The incoming block to be
+ examined.
+
+
MachineBasicBlock *&TBB — A destination block that is
+ returned. For a conditional branch that evaluates to true, TBB is
+ the destination.
+
+
MachineBasicBlock *&FBB — For a conditional branch that
+ evaluates to false, FBB is returned as the destination.
+
+
std::vector<MachineOperand> &Cond — List of
+ operands to evaluate a condition for a conditional branch.
+
+
+
+In the simplest case, if a block ends without a branch, then it falls through to
+the successor block. No destination blocks are specified for either TBB
+or FBB, so both parameters return NULL. The start of
+the AnalyzeBranch (see code below for the ARM target) shows the
+function parameters and the code for the simplest case.
+
+
+
+
bool ARMInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
+ MachineBasicBlock *&TBB, MachineBasicBlock *&FBB,
+ std::vector<MachineOperand> &Cond) const
+{
+ MachineBasicBlock::iterator I = MBB.end();
+ if (I == MBB.begin() || !isUnpredicatedTerminator(--I))
+ return false;
+
+
+
+
+If a block ends with a single unconditional branch instruction, then
+AnalyzeBranch (shown below) should return the destination of that
+branch in the TBB parameter.
+
+If a block ends with two unconditional branches, then the second branch is never
+reached. In that situation, as shown below, remove the last branch instruction
+and return the penultimate branch in the TBB parameter.
+
+A block may end with a single conditional branch instruction that falls through
+to successor block if the condition evaluates to false. In that case,
+AnalyzeBranch (shown below) should return the destination of that
+conditional branch in the TBB parameter and a list of operands in
+the Cond parameter to evaluate the condition.
+
+If a block ends with both a conditional branch and an ensuing unconditional
+branch, then AnalyzeBranch (shown below) should return the conditional
+branch destination (assuming it corresponds to a conditional evaluation of
+'true') in the TBB parameter and the unconditional branch
+destination in the FBB (corresponding to a conditional evaluation of
+'false'). A list of operands to evaluate the condition should be
+returned in the Cond parameter.
+
+For the last two cases (ending with a single conditional branch or ending with
+one conditional and one unconditional branch), the operands returned in
+the Cond parameter can be passed to methods of other instructions to
+create new branches or perform other operations. An implementation
+of AnalyzeBranch requires the helper methods RemoveBranch
+and InsertBranch to manage subsequent operations.
+
+
+
+AnalyzeBranch should return false indicating success in most circumstances.
+AnalyzeBranch should only return true when the method is stumped about what to
+do, for example, if a block has three terminating branches. AnalyzeBranch may
+return true if it encounters a terminator it cannot handle, such as an indirect
+branch.
+
+LLVM uses a SelectionDAG to represent LLVM IR instructions, and nodes
+of the SelectionDAG ideally represent native target
+instructions. During code generation, instruction selection passes are performed
+to convert non-native DAG instructions into native target-specific
+instructions. The pass described in XXXISelDAGToDAG.cpp is used to
+match patterns and perform DAG-to-DAG instruction selection. Optionally, a pass
+may be defined (in XXXBranchSelector.cpp) to perform similar DAG-to-DAG
+operations for branch instructions. Later, the code in
+XXXISelLowering.cpp replaces or removes operations and data types not
+supported natively (legalizes) in a SelectionDAG.
+
+
+
+TableGen generates code for instruction selection using the following target
+description input files:
+
+
+
+
XXXInstrInfo.td — Contains definitions of instructions in a
+ target-specific instruction set, generates XXXGenDAGISel.inc, which
+ is included in XXXISelDAGToDAG.cpp.
+
+
XXXCallingConv.td — Contains the calling and return value
+ conventions for the target architecture, and it generates
+ XXXGenCallingConv.inc, which is included in
+ XXXISelLowering.cpp.
+
+
+
+The implementation of an instruction selection pass must include a header that
+declares the FunctionPass class or a subclass of FunctionPass. In
+XXXTargetMachine.cpp, a Pass Manager (PM) should add each instruction
+selection pass into the queue of passes to run.
+
+
+
+The LLVM static compiler (llc) is an excellent tool for visualizing the
+contents of DAGs. To display the SelectionDAG before or after specific
+processing phases, use the command line options for llc, described
+at
+SelectionDAG Instruction Selection Process.
+
+
+
+To describe instruction selector behavior, you should add patterns for lowering
+LLVM code into a SelectionDAG as the last parameter of the instruction
+definitions in XXXInstrInfo.td. For example, in
+SparcInstrInfo.td, this entry defines a register store operation, and
+the last parameter describes a pattern with the store DAG operator.
+
+The definition of ADDRrr refers to SelectADDRrr, which is a
+function defined in an implementation of the Instructor Selector (such
+as SparcISelDAGToDAG.cpp).
+
+
+
+In lib/Target/TargetSelectionDAG.td, the DAG operator for store is
+defined below:
+
+XXXInstrInfo.td also generates (in XXXGenDAGISel.inc) the
+SelectCode method that is used to call the appropriate processing
+method for an instruction. In this example, SelectCode
+calls Select_ISD_STORE for the ISD::STORE opcode.
+
+The pattern for STrr is matched, so elsewhere in
+XXXGenDAGISel.inc, code for STrr is created for
+Select_ISD_STORE. The Emit_22 method is also generated
+in XXXGenDAGISel.inc to complete the processing of this
+instruction.
+
+The Legalize phase converts a DAG to use types and operations that are natively
+supported by the target. For natively unsupported types and operations, you need
+to add code to the target-specific XXXTargetLowering implementation to convert
+unsupported types and operations to supported ones.
+
+
+
+In the constructor for the XXXTargetLowering class, first use the
+addRegisterClass method to specify which types are supports and which
+register classes are associated with them. The code for the register classes are
+generated by TableGen from XXXRegisterInfo.td and placed
+in XXXGenRegisterInfo.h.inc. For example, the implementation of the
+constructor for the SparcTargetLowering class (in
+SparcISelLowering.cpp) starts with the following code:
+
+You should examine the node types in the ISD namespace
+(include/llvm/CodeGen/SelectionDAGNodes.h) and determine which
+operations the target natively supports. For operations that do not have
+native support, add a callback to the constructor for the XXXTargetLowering
+class, so the instruction selection process knows what to do. The TargetLowering
+class callback methods (declared in llvm/Target/TargetLowering.h) are:
+
+
+
+
setOperationAction — General operation.
+
+
setLoadExtAction — Load with extension.
+
+
setTruncStoreAction — Truncating store.
+
+
setIndexedLoadAction — Indexed load.
+
+
setIndexedStoreAction — Indexed store.
+
+
setConvertAction — Type conversion.
+
+
setCondCodeAction — Support for a given condition code.
+
+
+
+Note: on older releases, setLoadXAction is used instead
+of setLoadExtAction. Also, on older releases,
+setCondCodeAction may not be supported. Examine your release
+to see what methods are specifically supported.
+
+
+
+These callbacks are used to determine that an operation does or does not work
+with a specified type (or types). And in all cases, the third parameter is
+a LegalAction type enum value: Promote, Expand,
+Custom, or Legal. SparcISelLowering.cpp
+contains examples of all four LegalAction values.
+
+For an operation without native support for a given type, the specified type may
+be promoted to a larger type that is supported. For example, SPARC does not
+support a sign-extending load for Boolean values (i1 type), so
+in SparcISelLowering.cpp the third parameter below, Promote,
+changes i1 type values to a large type before loading.
+
+For a type without native support, a value may need to be broken down further,
+rather than promoted. For an operation without native support, a combination of
+other operations may be used to similar effect. In SPARC, the floating-point
+sine and cosine trig operations are supported by expansion to other operations,
+as indicated by the third parameter, Expand, to
+setOperationAction:
+
+For some operations, simple type promotion or operation expansion may be
+insufficient. In some cases, a special intrinsic function must be implemented.
+
+
+
+For example, a constant value may require special treatment, or an operation may
+require spilling and restoring registers in the stack and working with register
+allocators.
+
+
+
+As seen in SparcISelLowering.cpp code below, to perform a type
+conversion from a floating point value to a signed integer, first the
+setOperationAction should be called with Custom as the third
+parameter:
+
+In the LowerOperation method, for each Custom operation, a
+case statement should be added to indicate what function to call. In the
+following code, an FP_TO_SINT opcode will call
+the LowerFP_TO_SINT method:
+
+The Legal LegalizeAction enum value simply indicates that an
+operation is natively supported. Legal represents the default
+condition, so it is rarely used. In SparcISelLowering.cpp, the action
+for CTPOP (an operation to count the bits set in an integer) is
+natively supported only for SPARC v9. The following code enables
+the Expand conversion technique for non-v9 SPARC implementations.
+
+
+
+
+setOperationAction(ISD::CTPOP, MVT::i32, Expand);
+...
+if (TM.getSubtarget<SparcSubtarget>().isV9())
+ setOperationAction(ISD::CTPOP, MVT::i32, Legal);
+ case ISD::SETULT: return SPCC::ICC_CS;
+ case ISD::SETULE: return SPCC::ICC_LEU;
+ case ISD::SETUGT: return SPCC::ICC_GU;
+ case ISD::SETUGE: return SPCC::ICC_CC;
+ }
+}
+
+To support target-specific calling conventions, XXXGenCallingConv.td
+uses interfaces (such as CCIfType and CCAssignToReg) that are defined in
+lib/Target/TargetCallingConv.td. TableGen can take the target
+descriptor file XXXGenCallingConv.td and generate the header
+file XXXGenCallingConv.inc, which is typically included
+in XXXISelLowering.cpp. You can use the interfaces in
+TargetCallingConv.td to specify:
+
+
+
+
The order of parameter allocation.
+
+
Where parameters and return values are placed (that is, on the stack or in
+ registers).
+
+
Which registers may be used.
+
+
Whether the caller or callee unwinds the stack.
+
+
+
+The following example demonstrates the use of the CCIfType and
+CCAssignToReg interfaces. If the CCIfType predicate is true
+(that is, if the current argument is of type f32 or f64), then
+the action is performed. In this case, the CCAssignToReg action assigns
+the argument value to the first available register: either R0
+or R1.
+
+
+
+
+CCIfType<[f32,f64], CCAssignToReg<[R0, R1]>>
+
+
+
+
+SparcCallingConv.td contains definitions for a target-specific
+return-value calling convention (RetCC_Sparc32) and a basic 32-bit C calling
+convention (CC_Sparc32). The definition of RetCC_Sparc32
+(shown below) indicates which registers are used for specified scalar return
+types. A single-precision float is returned to register F0, and a
+double-precision float goes to register D0. A 32-bit integer is
+returned in register I0 or I1.
+
+The definition of CC_Sparc32 in SparcCallingConv.td introduces
+CCAssignToStack, which assigns the value to a stack slot with the
+specified size and alignment. In the example below, the first parameter, 4,
+indicates the size of the slot, and the second parameter, also 4, indicates the
+stack alignment along 4-byte units. (Special cases: if size is zero, then the
+ABI size is used; if alignment is zero, then the ABI alignment is used.)
+
+
+
+
+def CC_Sparc32 : CallingConv<[
+ // All arguments get passed in integer registers if there is space.
+ CCIfType<[i32, f32, f64], CCAssignToReg<[I0, I1, I2, I3, I4, I5]>>,
+ CCAssignToStack<4, 4>
+]>;
+
+
+
+
+CCDelegateTo is another commonly used interface, which tries to find a
+specified sub-calling convention, and, if a match is found, it is invoked. In
+the following example (in X86CallingConv.td), the definition of
+RetCC_X86_32_C ends with CCDelegateTo. After the current value
+is assigned to the register ST0 or ST1,
+the RetCC_X86Common is invoked.
+
+CCIfCC is an interface that attempts to match the given name to the
+current calling convention. If the name identifies the current calling
+convention, then a specified action is invoked. In the following example (in
+X86CallingConv.td), if the Fast calling convention is in use,
+then RetCC_X86_32_Fast is invoked. If the SSECall calling
+convention is in use, then RetCC_X86_32_SSE is invoked.
+
+During the code emission stage, the code generator may utilize an LLVM pass to
+produce assembly output. To do this, you want to implement the code for a
+printer that converts LLVM IR to a GAS-format assembly language for your target
+machine, using the following steps:
+
+
+
+
Define all the assembly strings for your target, adding them to the
+ instructions defined in the XXXInstrInfo.td file.
+ (See Instruction Set.) TableGen will produce
+ an output file (XXXGenAsmWriter.inc) with an implementation of
+ the printInstruction method for the XXXAsmPrinter class.
+
+
Write XXXTargetAsmInfo.h, which contains the bare-bones declaration
+ of the XXXTargetAsmInfo class (a subclass
+ of TargetAsmInfo).
+
+
Write XXXTargetAsmInfo.cpp, which contains target-specific values
+ for TargetAsmInfo properties and sometimes new implementations for
+ methods.
+
+
Write XXXAsmPrinter.cpp, which implements the AsmPrinter
+ class that performs the LLVM-to-assembly conversion.
+
+
+
+The code in XXXTargetAsmInfo.h is usually a trivial declaration of the
+XXXTargetAsmInfo class for use in XXXTargetAsmInfo.cpp.
+Similarly, XXXTargetAsmInfo.cpp usually has a few declarations of
+XXXTargetAsmInfo replacement values that override the default values
+in TargetAsmInfo.cpp. For example in SparcTargetAsmInfo.cpp:
+
+The X86 assembly printer implementation (X86TargetAsmInfo) is an
+example where the target specific TargetAsmInfo class uses an
+overridden methods: ExpandInlineAsm.
+
+
+
+A target-specific implementation of AsmPrinter is written in
+XXXAsmPrinter.cpp, which implements the AsmPrinter class that
+converts the LLVM to printable assembly. The implementation must include the
+following headers that have declarations for the AsmPrinter and
+MachineFunctionPass classes. The MachineFunctionPass is a
+subclass of FunctionPass.
+
+As a FunctionPass, AsmPrinter first
+calls doInitialization to set up the AsmPrinter. In
+SparcAsmPrinter, a Mangler object is instantiated to process
+variable names.
+
+
+
+In XXXAsmPrinter.cpp, the runOnMachineFunction method
+(declared in MachineFunctionPass) must be implemented
+for XXXAsmPrinter. In MachineFunctionPass,
+the runOnFunction method invokes runOnMachineFunction.
+Target-specific implementations of runOnMachineFunction differ, but
+generally do the following to process each machine function:
+
+
+
+
Call SetupMachineFunction to perform initialization.
+
+
Call EmitConstantPool to print out (to the output stream) constants
+ which have been spilled to memory.
+
+
Call EmitJumpTableInfo to print out jump tables used by the current
+ function.
+
+
Print out the label for the current function.
+
+
Print out the code for the function, including basic block labels and the
+ assembly for the instruction (using printInstruction)
+
+
+
+The XXXAsmPrinter implementation must also include the code generated
+by TableGen that is output in the XXXGenAsmWriter.inc file. The code
+in XXXGenAsmWriter.inc contains an implementation of the
+printInstruction method that may call these methods:
+
+
+
+
printOperand
+
+
printMemOperand
+
+
printCCOperand (for conditional statements)
+
+
printDataDirective
+
+
printDeclare
+
+
printImplicitDef
+
+
printInlineAsm
+
+
+
+The implementations of printDeclare, printImplicitDef,
+printInlineAsm, and printLabel in AsmPrinter.cpp are
+generally adequate for printing assembly and do not need to be
+overridden.
+
+
+
+The printOperand method is implemented with a long switch/case
+statement for the type of operand: register, immediate, basic block, external
+symbol, global address, constant pool index, or jump table index. For an
+instruction with a memory address operand, the printMemOperand method
+should be implemented to generate the proper output. Similarly,
+printCCOperand should be used to print a conditional operand.
+
+
+
doFinalization should be overridden in XXXAsmPrinter, and
+it should be called to shut down the assembly printer. During
+doFinalization, global variables and constants are printed to
+output.
+
+Subtarget support is used to inform the code generation process of instruction
+set variations for a given chip set. For example, the LLVM SPARC implementation
+provided covers three major versions of the SPARC microprocessor architecture:
+Version 8 (V8, which is a 32-bit architecture), Version 9 (V9, a 64-bit
+architecture), and the UltraSPARC architecture. V8 has 16 double-precision
+floating-point registers that are also usable as either 32 single-precision or 8
+quad-precision registers. V8 is also purely big-endian. V9 has 32
+double-precision floating-point registers that are also usable as 16
+quad-precision registers, but cannot be used as single-precision registers. The
+UltraSPARC architecture combines V9 with UltraSPARC Visual Instruction Set
+extensions.
+
+
+
+If subtarget support is needed, you should implement a target-specific
+XXXSubtarget class for your architecture. This class should process the
+command-line options -mcpu= and -mattr=.
+
+
+
+TableGen uses definitions in the Target.td and Sparc.td files
+to generate code in SparcGenSubtarget.inc. In Target.td, shown
+below, the SubtargetFeature interface is defined. The first 4 string
+parameters of the SubtargetFeature interface are a feature name, an
+attribute set by the feature, the value of the attribute, and a description of
+the feature. (The fifth parameter is a list of features whose presence is
+implied, and its default value is an empty array.)
+
+
+
+
+class SubtargetFeature<string n, string a, string v, string d,
+ list<SubtargetFeature> i = []> {
+ string Name = n;
+ string Attribute = a;
+ string Value = v;
+ string Desc = d;
+ list<SubtargetFeature> Implies = i;
+}
+
+
+
+
+In the Sparc.td file, the SubtargetFeature is used to define the
+following features.
+
+Elsewhere in Sparc.td, the Proc class is defined and then is used to
+define particular SPARC processor subtypes that may have the previously
+described features.
+
+From Target.td and Sparc.td files, the resulting
+SparcGenSubtarget.inc specifies enum values to identify the features, arrays of
+constants to represent the CPU features and CPU subtypes, and the
+ParseSubtargetFeatures method that parses the features string that sets
+specified subtarget options. The generated SparcGenSubtarget.inc file
+should be included in the SparcSubtarget.cpp. The target-specific
+implementation of the XXXSubtarget method should follow this pseudocode:
+
+
+
+
+XXXSubtarget::XXXSubtarget(const Module &M, const std::string &FS) {
+ // Set the default features
+ // Determine default and user specified characteristics of the CPU
+ // Call ParseSubtargetFeatures(FS, CPU) to parse the features string
+ // Perform any additional operations
+}
+
+The implementation of a target machine optionally includes a Just-In-Time (JIT)
+code generator that emits machine code and auxiliary structures as binary output
+that can be written directly to memory. To do this, implement JIT code
+generation by performing the following steps:
+
+
+
+
Write an XXXCodeEmitter.cpp file that contains a machine function
+ pass that transforms target-machine instructions into relocatable machine
+ code.
+
+
Write an XXXJITInfo.cpp file that implements the JIT interfaces for
+ target-specific code-generation activities, such as emitting machine code
+ and stubs.
+
+
Modify XXXTargetMachine so that it provides a
+ TargetJITInfo object through its getJITInfo method.
+
+
+
+There are several different approaches to writing the JIT support code. For
+instance, TableGen and target descriptor files may be used for creating a JIT
+code generator, but are not mandatory. For the Alpha and PowerPC target
+machines, TableGen is used to generate XXXGenCodeEmitter.inc, which
+contains the binary coding of machine instructions and the
+getBinaryCodeForInstr method to access those codes. Other JIT
+implementations do not.
+
+
+
+Both XXXJITInfo.cpp and XXXCodeEmitter.cpp must include the
+llvm/CodeGen/MachineCodeEmitter.h header file that defines the
+MachineCodeEmitter class containing code for several callback functions
+that write data (in bytes, words, strings, etc.) to the output stream.
+
+In XXXCodeEmitter.cpp, a target-specific of the Emitter class
+is implemented as a function pass (subclass
+of MachineFunctionPass). The target-specific implementation
+of runOnMachineFunction (invoked by
+runOnFunction in MachineFunctionPass) iterates through the
+MachineBasicBlock calls emitInstruction to process each
+instruction and emit binary code. emitInstruction is largely
+implemented with case statements on the instruction types defined in
+XXXInstrInfo.h. For example, in X86CodeEmitter.cpp,
+the emitInstruction method is built around the following switch/case
+statements:
+
+
+
+
+switch (Desc->TSFlags & X86::FormMask) {
+case X86II::Pseudo: // for not yet implemented instructions
+ ... // or pseudo-instructions
+ break;
+case X86II::RawFrm: // for instructions with a fixed opcode value
+ ...
+ break;
+case X86II::AddRegFrm: // for instructions that have one register operand
+ ... // added to their opcode
+ break;
+case X86II::MRMDestReg:// for instructions that use the Mod/RM byte
+ ... // to specify a destination (register)
+ break;
+case X86II::MRMDestMem:// for instructions that use the Mod/RM byte
+ ... // to specify a destination (memory)
+ break;
+case X86II::MRMSrcReg: // for instructions that use the Mod/RM byte
+ ... // to specify a source (register)
+ break;
+case X86II::MRMSrcMem: // for instructions that use the Mod/RM byte
+ ... // to specify a source (memory)
+ break;
+case X86II::MRM0r: case X86II::MRM1r: // for instructions that operate on
+case X86II::MRM2r: case X86II::MRM3r: // a REGISTER r/m operand and
+case X86II::MRM4r: case X86II::MRM5r: // use the Mod/RM byte and a field
+case X86II::MRM6r: case X86II::MRM7r: // to hold extended opcode data
+ ...
+ break;
+case X86II::MRM0m: case X86II::MRM1m: // for instructions that operate on
+case X86II::MRM2m: case X86II::MRM3m: // a MEMORY r/m operand and
+case X86II::MRM4m: case X86II::MRM5m: // use the Mod/RM byte and a field
+case X86II::MRM6m: case X86II::MRM7m: // to hold extended opcode data
+ ...
+ break;
+case X86II::MRMInitReg: // for instructions whose source and
+ ... // destination are the same register
+ break;
+}
+
+
+
+
+The implementations of these case statements often first emit the opcode and
+then get the operand(s). Then depending upon the operand, helper methods may be
+called to process the operand(s). For example, in X86CodeEmitter.cpp,
+for the X86II::AddRegFrm case, the first data emitted
+(by emitByte) is the opcode added to the register operand. Then an
+object representing the machine operand, MO1, is extracted. The helper
+methods such as isImmediate,
+isGlobalAddress, isExternalSymbol, isConstantPoolIndex, and
+isJumpTableIndex determine the operand
+type. (X86CodeEmitter.cpp also has private methods such
+as emitConstant, emitGlobalAddress,
+emitExternalSymbolAddress, emitConstPoolAddress,
+and emitJumpTableAddress that emit the data into the output stream.)
+
+In the previous example, XXXCodeEmitter.cpp uses the
+variable rt, which is a RelocationType enum that may be used to
+relocate addresses (for example, a global address with a PIC base offset). The
+RelocationType enum for that target is defined in the short
+target-specific XXXRelocations.h file. The RelocationType is used by
+the relocate method defined in XXXJITInfo.cpp to rewrite
+addresses for referenced global symbols.
+
+
+
+For example, X86Relocations.h specifies the following relocation types
+for the X86 addresses. In all four cases, the relocated value is added to the
+value already in memory. For reloc_pcrel_word
+and reloc_picrel_word, there is an additional initial adjustment.
+
+
+
+
+enum RelocationType {
+ reloc_pcrel_word = 0, // add reloc value after adjusting for the PC loc
+ reloc_picrel_word = 1, // add reloc value after adjusting for the PIC base
+ reloc_absolute_word = 2, // absolute relocation; no additional adjustment
+ reloc_absolute_dword = 3 // absolute relocation; no additional adjustment
+};
+
+XXXJITInfo.cpp implements the JIT interfaces for target-specific
+code-generation activities, such as emitting machine code and stubs. At minimum,
+a target-specific version of XXXJITInfo implements the following:
+
+
+
+
getLazyResolverFunction — Initializes the JIT, gives the
+ target a function that is used for compilation.
+
+
emitFunctionStub — Returns a native function with a specified
+ address for a callback function.
+
+
relocate — Changes the addresses of referenced globals, based
+ on relocation types.
+
+
Callback function that are wrappers to a function stub that is used when the
+ real target is not initially known.
+
+
+
+getLazyResolverFunction is generally trivial to implement. It makes the
+incoming parameter as the global JITCompilerFunction and returns the
+callback function that will be used a function wrapper. For the Alpha target
+(in AlphaJITInfo.cpp), the getLazyResolverFunction
+implementation is simply:
+
+For the X86 target, the getLazyResolverFunction implementation is a
+little more complication, because it returns a different callback function for
+processors with SSE instructions and XMM registers.
+
+
+
+The callback function initially saves and later restores the callee register
+values, incoming arguments, and frame and return address. The callback function
+needs low-level access to the registers or stack, so it is typically implemented
+with assembler.
+
The LLVM Pass Framework is an important part of the LLVM system, because LLVM
+passes are where most of the interesting parts of the compiler exist. Passes
+perform the transformations and optimizations that make up the compiler, they
+build the analysis results that are used by these transformations, and they are,
+above all, a structuring technique for compiler code.
+
+
All LLVM passes are subclasses of the Pass
+class, which implement functionality by overriding virtual methods inherited
+from Pass. Depending on how your pass works, you should inherit from
+the ModulePass, CallGraphSCCPass, FunctionPass, or LoopPass, or BasicBlockPass classes, which gives the system
+more information about what your pass does, and how it can be combined with
+other passes. One of the main features of the LLVM Pass Framework is that it
+schedules passes to run in an efficient way based on the constraints that your
+pass meets (which are indicated by which class they derive from).
+
+
We start by showing you how to construct a pass, everything from setting up
+the code, to compiling, loading, and executing it. After the basics are down,
+more advanced features are discussed.
Here we describe how to write the "hello world" of passes. The "Hello" pass
+is designed to simply print out the name of non-external functions that exist in
+the program being compiled. It does not modify the program at all, it just
+inspects it. The source code and files for this pass are available in the LLVM
+source tree in the lib/Transforms/Hello directory.
First, you need to create a new directory somewhere in the LLVM source
+ base. For this example, we'll assume that you made
+ lib/Transforms/Hello. Next, you must set up a build script
+ (Makefile) that will compile the source code for the new pass. To do this,
+ copy the following into Makefile:
+
+
+
+# Makefile for hello pass
+
+# Path to top level of LLVM hierarchy
+LEVEL = ../../..
+
+# Name of the library to build
+LIBRARYNAME = Hello
+
+# Make the shared library become a loadable module so the tools can
+# dlopen/dlsym on the resulting library.
+LOADABLE_MODULE = 1
+
+# Include the makefile implementation stuff
+include $(LEVEL)/Makefile.common
+
+
+
This makefile specifies that all of the .cpp files in the current
+directory are to be compiled and linked together into a
+Debug+Asserts/lib/Hello.so shared object that can be dynamically loaded by
+the opt or bugpoint tools via their -load options.
+If your operating system uses a suffix other than .so (such as windows or
+Mac OS/X), the appropriate extension will be used.
+
+
Now that we have the build scripts set up, we just need to write the code for
+the pass itself.
Which are needed because we are writing a Pass,
+we are operating on Function's,
+and we will be doing some printing.
+
+
Next we have:
+
+using namespace llvm;
+
+
... which is required because the functions from the include files
+live in the llvm namespace.
+
+
+
Next we have:
+
+
+namespace {
+
+
+
... which starts out an anonymous namespace. Anonymous namespaces are to C++
+what the "static" keyword is to C (at global scope). It makes the
+things declared inside of the anonymous namespace only visible to the current
+file. If you're not familiar with them, consult a decent C++ book for more
+information.
This declares a "Hello" class that is a subclass of FunctionPass.
+The different builtin pass subclasses are described in detail later, but for now, know that FunctionPass's operate a function at a
+time.
We declare a "runOnFunction" method,
+which overloads an abstract virtual method inherited from FunctionPass. This is where we are supposed
+to do our thing, so we just print out our message with the name of each
+function.
+
+
+ char Hello::ID = 0;
+
+
+
We initialize pass ID here. LLVM uses ID's address to identify pass so
+initialization value is not important.
+
+
+ INITIALIZE_PASS(Hello, "hello", "Hello World Pass",
+ false /* Only looks at CFG */,
+ false /* Analysis Pass */);
+} // end of anonymous namespace
+
+
+
Lastly, we register our classHello,
+giving it a command line
+argument "hello", and a name "Hello World Pass".
+Last two arguments describe its behavior.
+If a pass walks CFG without modifying it then third argument is set to true.
+If a pass is an analysis pass, for example dominator tree pass, then true
+is supplied as fourth argument.
Now that it's all together, compile the file with a simple "gmake"
+command in the local directory and you should get a new
+"Debug+Asserts/lib/Hello.so file. Note that everything in this file is
+contained in an anonymous namespace: this reflects the fact that passes are self
+contained units that do not need external interfaces (although they can have
+them) to be useful.
Now that you have a brand new shiny shared object file, we can use the
+opt command to run an LLVM program through your pass. Because you
+registered your pass with the INITIALIZE_PASS macro, you will be able to
+use the opt tool to access it, once loaded.
+
+
To test it, follow the example at the end of the Getting Started Guide to compile "Hello World" to
+LLVM. We can now run the bitcode file (hello.bc) for the program
+through our transformation like this (or course, any bitcode file will
+work):
The '-load' option specifies that 'opt' should load your
+pass as a shared object, which makes '-hello' a valid command line
+argument (which is one reason you need to register your
+pass). Because the hello pass does not modify the program in any
+interesting way, we just throw away the result of opt (sending it to
+/dev/null).
+
+
To see what happened to the other string you registered, try running
+opt with the -help option:
The pass name get added as the information string for your pass, giving some
+documentation to users of opt. Now that you have a working pass, you
+would go ahead and make it do the cool transformations you want. Once you get
+it all working and tested, it may become useful to find out how fast your pass
+is. The PassManager provides a nice command
+line option (--time-passes) that allows you to get information about
+the execution time of your pass along with the other passes you queue up. For
+example:
As you can see, our implementation above is pretty fast :). The additional
+passes listed are automatically inserted by the 'opt' tool to verify
+that the LLVM emitted by your pass is still valid and well formed LLVM, which
+hasn't been broken somehow.
+
+
Now that you have seen the basics of the mechanics behind passes, we can talk
+about some more details of how they work and how to use them.
One of the first things that you should do when designing a new pass is to
+decide what class you should subclass for your pass. The Hello World example uses the FunctionPass class for its implementation, but we
+did not discuss why or when this should occur. Here we talk about the classes
+available, from the most general to the most specific.
+
+
When choosing a superclass for your Pass, you should choose the most
+specific class possible, while still being able to meet the requirements
+listed. This gives the LLVM Pass Infrastructure information necessary to
+optimize how passes are run, so that the resultant compiler isn't unnecessarily
+slow.
The most plain and boring type of pass is the "ImmutablePass"
+class. This pass type is used for passes that do not have to be run, do not
+change state, and never need to be updated. This is not a normal type of
+transformation or analysis, but can provide information about the current
+compiler configuration.
+
+
Although this pass class is very infrequently used, it is important for
+providing information about the current target machine being compiled for, and
+other static information that can affect the various transformations.
+
+
ImmutablePasses never invalidate other transformations, are never
+invalidated, and are never "run".
The "ModulePass"
+class is the most general of all superclasses that you can use. Deriving from
+ModulePass indicates that your pass uses the entire program as a unit,
+referring to function bodies in no predictable order, or adding and removing
+functions. Because nothing is known about the behavior of ModulePass
+subclasses, no optimization can be done for their execution.
+
+
A module pass can use function level passes (e.g. dominators) using
+the getAnalysis interface
+getAnalysis<DominatorTree>(llvm::Function *) to provide the
+function to retrieve analysis result for, if the function pass does not require
+any module or immutable passes. Note that this can only be done for functions for which the
+analysis ran, e.g. in the case of dominators you should only ask for the
+DominatorTree for function definitions, not declarations.
+
+
To write a correct ModulePass subclass, derive from
+ModulePass and overload the runOnModule method with the
+following signature:
The runOnModule method performs the interesting work of the pass.
+It should return true if the module was modified by the transformation and
+false otherwise.
The "CallGraphSCCPass"
+is used by passes that need to traverse the program bottom-up on the call graph
+(callees before callers). Deriving from CallGraphSCCPass provides some
+mechanics for building and traversing the CallGraph, but also allows the system
+to optimize execution of CallGraphSCCPass's. If your pass meets the
+requirements outlined below, and doesn't meet the requirements of a FunctionPass or BasicBlockPass, you should derive from
+CallGraphSCCPass.
+
+
TODO: explain briefly what SCC, Tarjan's algo, and B-U mean.
+
+
To be explicit, CallGraphSCCPass subclasses are:
+
+
+
+
... not allowed to modify any Functions that are not in
+the current SCC.
+
+
... not allowed to inspect any Function's other than those in the
+current SCC and the direct callees of the SCC.
+
+
... required to preserve the current CallGraph object, updating it
+to reflect any changes made to the program.
+
+
... not allowed to add or remove SCC's from the current Module,
+though they may change the contents of an SCC.
+
+
... allowed to add or remove global variables from the current
+Module.
+
+
... allowed to maintain state across invocations of
+ runOnSCC (including global data).
+
+
+
Implementing a CallGraphSCCPass is slightly tricky in some cases
+because it has to handle SCCs with more than one node in it. All of the virtual
+methods described below should return true if they modified the program, or
+false if they didn't.
The doIninitialize method is allowed to do most of the things that
+CallGraphSCCPass's are not allowed to do. They can add and remove
+functions, get pointers to functions, etc. The doInitialization method
+is designed to do simple initialization type of stuff that does not depend on
+the SCCs being processed. The doInitialization method call is not
+scheduled to overlap with any other pass executions (thus it should be very
+fast).
The runOnSCC method performs the interesting work of the pass, and
+should return true if the module was modified by the transformation, false
+otherwise.
The doFinalization method is an infrequently used method that is
+called when the pass framework has finished calling runOnFunction for every function in the
+program being compiled.
In contrast to ModulePass subclasses, FunctionPass
+subclasses do have a predictable, local behavior that can be expected by the
+system. All FunctionPass execute on each function in the program
+independent of all of the other functions in the program.
+FunctionPass's do not require that they are executed in a particular
+order, and FunctionPass's do not modify external functions.
+
+
To be explicit, FunctionPass subclasses are not allowed to:
+
+
+
Modify a Function other than the one currently being processed.
+
Add or remove Function's from the current Module.
+
Add or remove global variables from the current Module.
+
Maintain state across invocations of
+ runOnFunction (including global data)
+
+
+
Implementing a FunctionPass is usually straightforward (See the Hello World pass for example). FunctionPass's
+may overload three virtual methods to do their work. All of these methods
+should return true if they modified the program, or false if they didn't.
The doIninitialize method is allowed to do most of the things that
+FunctionPass's are not allowed to do. They can add and remove
+functions, get pointers to functions, etc. The doInitialization method
+is designed to do simple initialization type of stuff that does not depend on
+the functions being processed. The doInitialization method call is not
+scheduled to overlap with any other pass executions (thus it should be very
+fast).
+
+
A good example of how this method should be used is the LowerAllocations
+pass. This pass converts malloc and free instructions into
+platform dependent malloc() and free() function calls. It
+uses the doInitialization method to get a reference to the malloc and
+free functions that it needs, adding prototypes to the module if necessary.
The runOnFunction method must be implemented by your subclass to do
+the transformation or analysis work of your pass. As usual, a true value should
+be returned if the function is modified.
The doFinalization method is an infrequently used method that is
+called when the pass framework has finished calling runOnFunction for every function in the
+program being compiled.
All LoopPass execute on each loop in the function independent of
+all of the other loops in the function. LoopPass processes loops in
+loop nest order such that outer most loop is processed last.
+
+
LoopPass subclasses are allowed to update loop nest using
+LPPassManager interface. Implementing a loop pass is usually
+straightforward. Looppass's may overload three virtual methods to
+do their work. All these methods should return true if they modified the
+program, or false if they didn't.
The doInitialization method is designed to do simple initialization
+type of stuff that does not depend on the functions being processed. The
+doInitialization method call is not scheduled to overlap with any
+other pass executions (thus it should be very fast). LPPassManager
+interface should be used to access Function or Module level analysis
+information.
The runOnLoop method must be implemented by your subclass to do
+the transformation or analysis work of your pass. As usual, a true value should
+be returned if the function is modified. LPPassManager interface
+should be used to update loop nest.
The doFinalization method is an infrequently used method that is
+called when the pass framework has finished calling runOnLoop for every loop in the
+program being compiled.
BasicBlockPass's are just like FunctionPass's, except that they must limit
+their scope of inspection and modification to a single basic block at a time.
+As such, they are not allowed to do any of the following:
+
+
+
Modify or inspect any basic blocks outside of the current one
BasicBlockPasses are useful for traditional local and "peephole"
+optimizations. They may override the same doInitialization(Module &) and doFinalization(Module &) methods that FunctionPass's have, but also have the following virtual methods that may also be implemented:
The doIninitialize method is allowed to do most of the things that
+BasicBlockPass's are not allowed to do, but that
+FunctionPass's can. The doInitialization method is designed
+to do simple initialization that does not depend on the
+BasicBlocks being processed. The doInitialization method call is not
+scheduled to overlap with any other pass executions (thus it should be very
+fast).
Override this function to do the work of the BasicBlockPass. This
+function is not allowed to inspect or modify basic blocks other than the
+parameter, and are not allowed to modify the CFG. A true value must be returned
+if the basic block is modified.
The doFinalization method is an infrequently used method that is
+called when the pass framework has finished calling runOnBasicBlock for every BasicBlock in the
+program being compiled. This can be used to perform per-function
+finalization.
A MachineFunctionPass is a part of the LLVM code generator that
+executes on the machine-dependent representation of each LLVM function in the
+program.
+
+
Code generator passes are registered and initialized specially by
+TargetMachine::addPassesToEmitFile and similar routines, so they
+cannot generally be run from the opt or bugpoint
+commands.
+
+
A MachineFunctionPass is also a FunctionPass, so all
+the restrictions that apply to a FunctionPass also apply to it.
+MachineFunctionPasses also have additional restrictions. In particular,
+MachineFunctionPasses are not allowed to do any of the following:
+
+
+
Modify or create any LLVM IR Instructions, BasicBlocks, Arguments,
+ Functions, GlobalVariables, GlobalAliases, or Modules.
+
Modify a MachineFunction other than the one currently being processed.
+
Maintain state across invocations of runOnMachineFunction (including global
+data)
runOnMachineFunction can be considered the main entry point of a
+MachineFunctionPass; that is, you should override this method to do the
+work of your MachineFunctionPass.
+
+
The runOnMachineFunction method is called on every
+MachineFunction in a Module, so that the
+MachineFunctionPass may perform optimizations on the machine-dependent
+representation of the function. If you want to get at the LLVM Function
+for the MachineFunction you're working on, use
+MachineFunction's getFunction() accessor method -- but
+remember, you may not modify the LLVM Function or its contents from a
+MachineFunctionPass.
In the Hello World example pass we illustrated how
+pass registration works, and discussed some of the reasons that it is used and
+what it does. Here we discuss how and why passes are registered.
+
+
As we saw above, passes are registered with the INITIALIZE_PASS
+macro. The first parameter is the name of the pass that is to be used on
+the command line to specify that the pass should be added to a program (for
+example, with opt or bugpoint). The second argument is the
+name of the pass, which is to be used for the -help output of
+programs, as
+well as for debug output generated by the --debug-pass option.
+
+
If you want your pass to be easily dumpable, you should
+implement the virtual print method:
The print method must be implemented by "analyses" in order to print
+a human readable version of the analysis results. This is useful for debugging
+an analysis itself, as well as for other people to figure out how an analysis
+works. Use the opt -analyze argument to invoke this method.
+
+
The llvm::OStream parameter specifies the stream to write the results on,
+and the Module parameter gives a pointer to the top level module of the
+program that has been analyzed. Note however that this pointer may be null in
+certain circumstances (such as calling the Pass::dump() from a
+debugger), so it should only be used to enhance debug output, it should not be
+depended on.
One of the main responsibilities of the PassManager is to make sure
+that passes interact with each other correctly. Because PassManager
+tries to optimize the execution of passes it must
+know how the passes interact with each other and what dependencies exist between
+the various passes. To track this, each pass can declare the set of passes that
+are required to be executed before the current pass, and the passes which are
+invalidated by the current pass.
+
+
Typically this functionality is used to require that analysis results are
+computed before your pass is run. Running arbitrary transformation passes can
+invalidate the computed analysis results, which is what the invalidation set
+specifies. If a pass does not implement the getAnalysisUsage method, it defaults to not
+having any prerequisite passes, and invalidating all other passes.
By implementing the getAnalysisUsage method, the required and
+invalidated sets may be specified for your transformation. The implementation
+should fill in the AnalysisUsage
+object with information about which passes are required and not invalidated. To
+do this, a pass may call any of the following methods on the AnalysisUsage
+object:
+If your pass requires a previous pass to be executed (an analysis for example),
+it can use one of these methods to arrange for it to be run before your pass.
+LLVM has many different types of analyses and passes that can be required,
+spanning the range from DominatorSet to BreakCriticalEdges.
+Requiring BreakCriticalEdges, for example, guarantees that there will
+be no critical edges in the CFG when your pass has been run.
+
+
+
+Some analyses chain to other analyses to do their job. For example, an AliasAnalysis implementation is required to chain to other alias analysis passes. In
+cases where analyses chain, the addRequiredTransitive method should be
+used instead of the addRequired method. This informs the PassManager
+that the transitively required pass should be alive as long as the requiring
+pass is.
+
+One of the jobs of the PassManager is to optimize how and when analyses are run.
+In particular, it attempts to avoid recomputing data unless it needs to. For
+this reason, passes are allowed to declare that they preserve (i.e., they don't
+invalidate) an existing analysis if it's available. For example, a simple
+constant folding pass would not modify the CFG, so it can't possibly affect the
+results of dominator analysis. By default, all passes are assumed to invalidate
+all others.
+
+
+
+The AnalysisUsage class provides several methods which are useful in
+certain circumstances that are related to addPreserved. In particular,
+the setPreservesAll method can be called to indicate that the pass does
+not modify the LLVM program at all (which is true for analyses), and the
+setPreservesCFG method can be used by transformations that change
+instructions in the program but do not modify the CFG or terminator instructions
+(note that this property is implicitly set for BasicBlockPass's).
+
+
+
+addPreserved is particularly useful for transformations like
+BreakCriticalEdges. This pass knows how to update a small set of loop
+and dominator related analyses if they exist, so it can preserve them, despite
+the fact that it hacks on the CFG.
+
+ // This is an example implementation from an analysis, which does not modify
+ // the program at all, yet has a prerequisite.
+ voidPostDominanceFrontier::getAnalysisUsage(AnalysisUsage &AU) const {
+ AU.setPreservesAll();
+ AU.addRequired<PostDominatorTree>();
+ }
+
+
+
and:
+
+
+ // This example modifies the program, but does not modify the CFG
+ voidLICM::getAnalysisUsage(AnalysisUsage &AU) const {
+ AU.setPreservesCFG();
+ AU.addRequired<LoopInfo>();
+ }
+
The Pass::getAnalysis<> method is automatically inherited by
+your class, providing you with access to the passes that you declared that you
+required with the getAnalysisUsage
+method. It takes a single template argument that specifies which pass class you
+want, and returns a reference to that pass. For example:
This method call returns a reference to the pass desired. You may get a
+runtime assertion failure if you attempt to get an analysis that you did not
+declare as required in your getAnalysisUsage implementation. This
+method can be called by your run* method implementation, or by any
+other local method invoked by your run* method.
+
+A module level pass can use function level analysis info using this interface.
+For example:
In above example, runOnFunction for DominatorTree is called by pass manager
+before returning a reference to the desired pass.
+
+
+If your pass is capable of updating analyses if they exist (e.g.,
+BreakCriticalEdges, as described above), you can use the
+getAnalysisIfAvailable method, which returns a pointer to the analysis
+if it is active. For example:
+
+
+ ...
+ if (DominatorSet *DS = getAnalysisIfAvailable<DominatorSet>()) {
+ // A DominatorSet is active. This code will update it.
+ }
+ ...
+
Now that we understand the basics of how passes are defined, how they are
+used, and how they are required from other passes, it's time to get a little bit
+fancier. All of the pass relationships that we have seen so far are very
+simple: one pass depends on one other specific pass to be run before it can run.
+For many applications, this is great, for others, more flexibility is
+required.
+
+
In particular, some analyses are defined such that there is a single simple
+interface to the analysis results, but multiple ways of calculating them.
+Consider alias analysis for example. The most trivial alias analysis returns
+"may alias" for any alias query. The most sophisticated analysis a
+flow-sensitive, context-sensitive interprocedural analysis that can take a
+significant amount of time to execute (and obviously, there is a lot of room
+between these two extremes for other implementations). To cleanly support
+situations like this, the LLVM Pass Infrastructure supports the notion of
+Analysis Groups.
An Analysis Group is a single simple interface that may be implemented by
+multiple different passes. Analysis Groups can be given human readable names
+just like passes, but unlike passes, they need not derive from the Pass
+class. An analysis group may have one or more implementations, one of which is
+the "default" implementation.
+
+
Analysis groups are used by client passes just like other passes are: the
+AnalysisUsage::addRequired() and Pass::getAnalysis() methods.
+In order to resolve this requirement, the PassManager
+scans the available passes to see if any implementations of the analysis group
+are available. If none is available, the default implementation is created for
+the pass to use. All standard rules for interaction
+between passes still apply.
+
+
Although Pass Registration is optional for normal
+passes, all analysis group implementations must be registered, and must use the
+INITIALIZE_AG_PASS template to join the
+implementation pool. Also, a default implementation of the interface
+must be registered with RegisterAnalysisGroup.
+
+
As a concrete example of an Analysis Group in action, consider the AliasAnalysis
+analysis group. The default implementation of the alias analysis interface (the
+basicaa
+pass) just does a few simple checks that don't require significant analysis to
+compute (such as: two different globals can never alias each other, etc).
+Passes that use the AliasAnalysis
+interface (for example the gcse pass), do
+not care which implementation of alias analysis is actually provided, they just
+use the designated interface.
+
+
From the user's perspective, commands work just like normal. Issuing the
+command 'opt -gcse ...' will cause the basicaa class to be
+instantiated and added to the pass sequence. Issuing the command 'opt
+-somefancyaa -gcse ...' will cause the gcse pass to use the
+somefancyaa alias analysis (which doesn't actually exist, it's just a
+hypothetical example) instead.
The RegisterAnalysisGroup template is used to register the analysis
+group itself, while the INITIALIZE_AG_PASS is used to add pass
+implementations to the analysis group. First,
+an analysis group should be registered, with a human readable name
+provided for it.
+Unlike registration of passes, there is no command line argument to be specified
+for the Analysis Group Interface itself, because it is "abstract":
Once the analysis is registered, passes can declare that they are valid
+implementations of the interface by using the following code:
+
+
+namespace {
+ // Declare that we implement the AliasAnalysis interface
+ INITIALIZE_AG_PASS(FancyAA, AliasAnalysis, "somefancyaa",
+ "A more complex alias analysis implementation",
+ false, // Is CFG Only?
+ true, // Is Analysis?
+ false, // Is default Analysis Group implementation?
+ );
+}
+
+
+
This just shows a class FancyAA that
+uses the INITIALIZE_AG_PASS macro both to register and
+to "join" the AliasAnalysis
+analysis group. Every implementation of an analysis group should join using
+this macro.
+
+
+namespace {
+ // Declare that we implement the AliasAnalysis interface
+ INITIALIZE_AG_PASS(BasicAA, AliasAnalysis, "basicaa",
+ "Basic Alias Analysis (default AA impl)",
+ false, // Is CFG Only?
+ true, // Is Analysis?
+ true, // Is default Analysis Group implementation?
+ );
+}
+
+
+
Here we show how the default implementation is specified (using the final
+argument to the INITIALIZE_AG_PASS template). There must be exactly
+one default implementation available at all times for an Analysis Group to be
+used. Only default implementation can derive from ImmutablePass.
+Here we declare that the
+ BasicAliasAnalysis
+pass is the default implementation for the interface.
The Statistic
+class is designed to be an easy way to expose various success
+metrics from passes. These statistics are printed at the end of a
+run, when the -stats command line option is enabled on the command
+line. See the Statistics section in the Programmer's Manual for details.
+
+
The PassManager
+class
+takes a list of passes, ensures their prerequisites
+are set up correctly, and then schedules passes to run efficiently. All of the
+LLVM tools that run passes use the PassManager for execution of these
+passes.
+
+
The PassManager does two main things to try to reduce the execution
+time of a series of passes:
+
+
+
Share analysis results - The PassManager attempts to avoid
+recomputing analysis results as much as possible. This means keeping track of
+which analyses are available already, which analyses get invalidated, and which
+analyses are needed to be run for a pass. An important part of work is that the
+PassManager tracks the exact lifetime of all analysis results, allowing
+it to free memory allocated to holding analysis
+results as soon as they are no longer needed.
+
+
Pipeline the execution of passes on the program - The
+PassManager attempts to get better cache and memory usage behavior out
+of a series of passes by pipelining the passes together. This means that, given
+a series of consequtive FunctionPass's, it
+will execute all of the FunctionPass's on
+the first function, then all of the FunctionPasses on the second function,
+etc... until the entire program has been run through the passes.
+
+
This improves the cache behavior of the compiler, because it is only touching
+the LLVM program representation for a single function at a time, instead of
+traversing the entire program. It reduces the memory consumption of compiler,
+because, for example, only one DominatorSet
+needs to be calculated at a time. This also makes it possible to implement
+some interesting enhancements in the future.
+
+
+
+
The effectiveness of the PassManager is influenced directly by how
+much information it has about the behaviors of the passes it is scheduling. For
+example, the "preserved" set is intentionally conservative in the face of an
+unimplemented getAnalysisUsage method.
+Not implementing when it should be implemented will have the effect of not
+allowing any analysis results to live across the execution of your pass.
+
+
The PassManager class exposes a --debug-pass command line
+options that is useful for debugging pass execution, seeing how things work, and
+diagnosing when you should be preserving more analyses than you currently are
+(To get information about all of the variants of the --debug-pass
+option, just type 'opt -help-hidden').
+
+
By using the --debug-pass=Structure option, for example, we can see
+how our Hello World pass interacts with other passes.
+Lets try it out with the gcse and licm passes:
+
+
+$ opt -load ../../../Debug+Asserts/lib/Hello.so -gcse -licm --debug-pass=Structure < hello.bc > /dev/null
+Module Pass Manager
+ Function Pass Manager
+ Dominator Set Construction
+ Immediate Dominators Construction
+ Global Common Subexpression Elimination
+-- Immediate Dominators Construction
+-- Global Common Subexpression Elimination
+ Natural Loop Construction
+ Loop Invariant Code Motion
+-- Natural Loop Construction
+-- Loop Invariant Code Motion
+ Module Verifier
+-- Dominator Set Construction
+-- Module Verifier
+ Bitcode Writer
+--Bitcode Writer
+
+
+
This output shows us when passes are constructed and when the analysis
+results are known to be dead (prefixed with '--'). Here we see that
+GCSE uses dominator and immediate dominator information to do its job. The LICM
+pass uses natural loop information, which uses dominator sets, but not immediate
+dominators. Because immediate dominators are no longer useful after the GCSE
+pass, it is immediately destroyed. The dominator sets are then reused to
+compute natural loop information, which is then used by the LICM pass.
+
+
After the LICM pass, the module verifier runs (which is automatically added
+by the 'opt' tool), which uses the dominator set to check that the
+resultant LLVM code is well formed. After it finishes, the dominator set
+information is destroyed, after being computed once, and shared by three
+passes.
+
+
Lets see how this changes when we run the Hello
+World pass in between the two passes:
+
+
+$ opt -load ../../../Debug+Asserts/lib/Hello.so -gcse -hello -licm --debug-pass=Structure < hello.bc > /dev/null
+Module Pass Manager
+ Function Pass Manager
+ Dominator Set Construction
+ Immediate Dominators Construction
+ Global Common Subexpression Elimination
+-- Dominator Set Construction
+-- Immediate Dominators Construction
+-- Global Common Subexpression Elimination
+ Hello World Pass
+-- Hello World Pass
+ Dominator Set Construction
+ Natural Loop Construction
+ Loop Invariant Code Motion
+-- Natural Loop Construction
+-- Loop Invariant Code Motion
+ Module Verifier
+-- Dominator Set Construction
+-- Module Verifier
+ Bitcode Writer
+--Bitcode Writer
+Hello: __main
+Hello: puts
+Hello: main
+
+
+
Here we see that the Hello World pass has killed the
+Dominator Set pass, even though it doesn't modify the code at all! To fix this,
+we need to add the following getAnalysisUsage method to our pass:
+
+
+ // We don't modify the program, so we preserve all analyses
+ virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+ AU.setPreservesAll();
+ }
+
+
+
Now when we run our pass, we get this output:
+
+
+$ opt -load ../../../Debug+Asserts/lib/Hello.so -gcse -hello -licm --debug-pass=Structure < hello.bc > /dev/null
+Pass Arguments: -gcse -hello -licm
+Module Pass Manager
+ Function Pass Manager
+ Dominator Set Construction
+ Immediate Dominators Construction
+ Global Common Subexpression Elimination
+-- Immediate Dominators Construction
+-- Global Common Subexpression Elimination
+ Hello World Pass
+-- Hello World Pass
+ Natural Loop Construction
+ Loop Invariant Code Motion
+-- Loop Invariant Code Motion
+-- Natural Loop Construction
+ Module Verifier
+-- Dominator Set Construction
+-- Module Verifier
+ Bitcode Writer
+--Bitcode Writer
+Hello: __main
+Hello: puts
+Hello: main
+
+
+
Which shows that we don't accidentally invalidate dominator information
+anymore, and therefore do not have to compute it twice.
The PassManager automatically determines when to compute analysis
+results, and how long to keep them around for. Because the lifetime of the pass
+object itself is effectively the entire duration of the compilation process, we
+need some way to free analysis results when they are no longer useful. The
+releaseMemory virtual method is the way to do this.
+
+
If you are writing an analysis or any other pass that retains a significant
+amount of state (for use by another pass which "requires" your pass and uses the
+getAnalysis method) you should implement
+releaseMemory to, well, release the memory allocated to maintain this
+internal state. This method is called after the run* method for the
+class, before the next call of run* in your pass.
Size matters when constructing production quality tools using llvm,
+both for the purposes of distribution, and for regulating the resident code size
+when running on the target system. Therefore, it becomes desirable to
+selectively use some passes, while omitting others and maintain the flexibility
+to change configurations later on. You want to be able to do all this, and,
+provide feedback to the user. This is where pass registration comes into
+play.
+
+
The fundamental mechanisms for pass registration are the
+MachinePassRegistry class and subclasses of
+MachinePassRegistryNode.
+
+
An instance of MachinePassRegistry is used to maintain a list of
+MachinePassRegistryNode objects. This instance maintains the list and
+communicates additions and deletions to the command line interface.
+
+
An instance of MachinePassRegistryNode subclass is used to maintain
+information provided about a particular pass. This information includes the
+command line name, the command help string and the address of the function used
+to create an instance of the pass. A global static constructor of one of these
+instances registers with a corresponding MachinePassRegistry,
+the static destructor unregisters. Thus a pass that is statically linked
+in the tool will be registered at start up. A dynamically loaded pass will
+register on load and unregister at unload.
There are predefined registries to track instruction scheduling
+(RegisterScheduler) and register allocation (RegisterRegAlloc)
+machine passes. Here we will describe how to register a register
+allocator machine pass.
+
+
Implement your register allocator machine pass. In your register allocator
+.cpp file add the following include;
+
+
+ #include "llvm/CodeGen/RegAllocRegistry.h"
+
+
+
Also in your register allocator .cpp file, define a creator function in the
+form;
Note that the signature of this function should match the type of
+RegisterRegAlloc::FunctionPassCtor. In the same file add the
+"installing" declaration, in the form;
+
+
+ static RegisterRegAlloc myRegAlloc("myregalloc",
+ " my register allocator help string",
+ createMyRegisterAllocator);
+
+
+
Note the two spaces prior to the help string produces a tidy result on the
+-help query.
+
+
+$ llc -help
+ ...
+ -regalloc - Register allocator to use (default=linearscan)
+ =linearscan - linear scan register allocator
+ =local - local register allocator
+ =simple - simple register allocator
+ =myregalloc - my register allocator help string
+ ...
+
+
+
And that's it. The user is now free to use -regalloc=myregalloc as
+an option. Registering instruction schedulers is similar except use the
+RegisterScheduler class. Note that the
+RegisterScheduler::FunctionPassCtor is significantly different from
+RegisterRegAlloc::FunctionPassCtor.
+
+
To force the load/linking of your register allocator into the llc/lli tools,
+add your creator function's global declaration to "Passes.h" and add a "pseudo"
+call line to llvm/Codegen/LinkAllCodegenComponents.h.
The easiest way to get started is to clone one of the existing registries; we
+recommend llvm/CodeGen/RegAllocRegistry.h. The key things to modify
+are the class name and the FunctionPassCtor type.
+
+
Then you need to declare the registry. Example: if your pass registry is
+RegisterMyPasses then define;
Unfortunately, using GDB with dynamically loaded passes is not as easy as it
+should be. First of all, you can't set a breakpoint in a shared object that has
+not been loaded yet, and second of all there are problems with inlined functions
+in shared objects. Here are some suggestions to debugging your pass with
+GDB.
+
+
For sake of discussion, I'm going to assume that you are debugging a
+transformation invoked by opt, although nothing described here depends
+on that.
First thing you do is start gdb on the opt process:
+
+
+$ gdb opt
+GNU gdb 5.0
+Copyright 2000 Free Software Foundation, Inc.
+GDB is free software, covered by the GNU General Public License, and you are
+welcome to change it and/or distribute copies of it under certain conditions.
+Type "show copying" to see the conditions.
+There is absolutely no warranty for GDB. Type "show warranty" for details.
+This GDB was configured as "sparc-sun-solaris2.6"...
+(gdb)
+
+
+
Note that opt has a lot of debugging information in it, so it takes
+time to load. Be patient. Since we cannot set a breakpoint in our pass yet
+(the shared object isn't loaded until runtime), we must execute the process, and
+have it stop before it invokes our pass, but after it has loaded the shared
+object. The most foolproof way of doing this is to set a breakpoint in
+PassManager::run and then run the process with the arguments you
+want:
Once the opt stops in the PassManager::run method you are
+now free to set breakpoints in your pass so that you can trace through execution
+or do other standard debugging stuff.
Once you have the basics down, there are a couple of problems that GDB has,
+some with solutions, some without.
+
+
+
Inline functions have bogus stack information. In general, GDB does a
+pretty good job getting stack traces and stepping through inline functions.
+When a pass is dynamically loaded however, it somehow completely loses this
+capability. The only solution I know of is to de-inline a function (move it
+from the body of a class to a .cpp file).
+
+
Restarting the program breaks breakpoints. After following the information
+above, you have succeeded in getting some breakpoints planted in your pass. Nex
+thing you know, you restart the program (i.e., you type 'run' again),
+and you start getting errors about breakpoints being unsettable. The only way I
+have found to "fix" this problem is to delete the breakpoints that are
+already set in your pass, run the program, and re-set the breakpoints once
+execution stops in PassManager::run.
+
+
+
+
Hopefully these tips will help with common case debugging situations. If
+you'd like to contribute some tips of your own, just contact Chris.
Although the LLVM Pass Infrastructure is very capable as it stands, and does
+some nifty stuff, there are things we'd like to add in the future. Here is
+where we are going:
Multiple CPU machines are becoming more common and compilation can never be
+fast enough: obviously we should allow for a multithreaded compiler. Because of
+the semantics defined for passes above (specifically they cannot maintain state
+across invocations of their run* methods), a nice clean way to
+implement a multithreaded compiler would be for the PassManager class
+to create multiple instances of each pass object, and allow the separate
+instances to be hacking on different parts of the program at the same time.
+
+
This implementation would prevent each of the passes from having to implement
+multithreaded constructs, requiring only the LLVM core to have locking in a few
+places (for global resources). Although this is a simple extension, we simply
+haven't had time (or multiprocessor machines, thus a reason) to implement this.
+Despite that, we have kept the LLVM passes SMP ready, and you should too.
+
+
+
+
+
+
+
+
+
+ Chris Lattner
+ The LLVM Compiler Infrastructure
+ Last modified: $Date: 2010-07-21 16:07:00 -0700 (Wed, 21 Jul 2010) $
+
+
+
+
Added: www-releases/trunk/2.8/docs/doxygen.cfg.in
URL: http://llvm.org/viewvc/llvm-project/www-releases/trunk/2.8/docs/doxygen.cfg.in?rev=115556&view=auto
==============================================================================
--- www-releases/trunk/2.8/docs/doxygen.cfg.in (added)
+++ www-releases/trunk/2.8/docs/doxygen.cfg.in Mon Oct 4 15:49:23 2010
@@ -0,0 +1,1419 @@
+# Doxyfile 1.5.6
+
+# This file describes the settings to be used by the documentation system
+# doxygen (www.doxygen.org) for a project
+#
+# All text after a hash (#) is considered a comment and will be ignored
+# The format is:
+# TAG = value [value, ...]
+# For lists items can also be appended using:
+# TAG += value [value, ...]
+# Values that contain spaces should be placed between quotes (" ")
+
+#---------------------------------------------------------------------------
+# Project related configuration options
+#---------------------------------------------------------------------------
+
+# This tag specifies the encoding used for all characters in the config file
+# that follow. The default is UTF-8 which is also the encoding used for all
+# text before the first occurrence of this tag. Doxygen uses libiconv (or the
+# iconv built into libc) for the transcoding. See
+# http://www.gnu.org/software/libiconv for the list of possible encodings.
+
+DOXYFILE_ENCODING = UTF-8
+
+# The PROJECT_NAME tag is a single word (or a sequence of words surrounded
+# by quotes) that should identify the project.
+
+PROJECT_NAME = LLVM
+
+# The PROJECT_NUMBER tag can be used to enter a project or revision number.
+# This could be handy for archiving the generated documentation or
+# if some version control system is used.
+
+PROJECT_NUMBER = @PACKAGE_VERSION@
+
+# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute)
+# base path where the generated documentation will be put.
+# If a relative path is entered, it will be relative to the location
+# where doxygen was started. If left blank the current directory will be used.
+
+OUTPUT_DIRECTORY = @abs_top_builddir@/docs/doxygen
+
+# If the CREATE_SUBDIRS tag is set to YES, then doxygen will create
+# 4096 sub-directories (in 2 levels) under the output directory of each output
+# format and will distribute the generated files over these directories.
+# Enabling this option can be useful when feeding doxygen a huge amount of
+# source files, where putting all generated files in the same directory would
+# otherwise cause performance problems for the file system.
+
+CREATE_SUBDIRS = NO
+
+# The OUTPUT_LANGUAGE tag is used to specify the language in which all
+# documentation generated by doxygen is written. Doxygen will use this
+# information to generate all constant output in the proper language.
+# The default language is English, other supported languages are:
+# Afrikaans, Arabic, Brazilian, Catalan, Chinese, Chinese-Traditional,
+# Croatian, Czech, Danish, Dutch, Farsi, Finnish, French, German, Greek,
+# Hungarian, Italian, Japanese, Japanese-en (Japanese with English messages),
+# Korean, Korean-en, Lithuanian, Norwegian, Macedonian, Persian, Polish,
+# Portuguese, Romanian, Russian, Serbian, Slovak, Slovene, Spanish, Swedish,
+# and Ukrainian.
+
+OUTPUT_LANGUAGE = English
+
+# If the BRIEF_MEMBER_DESC tag is set to YES (the default) Doxygen will
+# include brief member descriptions after the members that are listed in
+# the file and class documentation (similar to JavaDoc).
+# Set to NO to disable this.
+
+BRIEF_MEMBER_DESC = YES
+
+# If the REPEAT_BRIEF tag is set to YES (the default) Doxygen will prepend
+# the brief description of a member or function before the detailed description.
+# Note: if both HIDE_UNDOC_MEMBERS and BRIEF_MEMBER_DESC are set to NO, the
+# brief descriptions will be completely suppressed.
+
+REPEAT_BRIEF = YES
+
+# This tag implements a quasi-intelligent brief description abbreviator
+# that is used to form the text in various listings. Each string
+# in this list, if found as the leading text of the brief description, will be
+# stripped from the text and the result after processing the whole list, is
+# used as the annotated text. Otherwise, the brief description is used as-is.
+# If left blank, the following values are used ("$name" is automatically
+# replaced with the name of the entity): "The $name class" "The $name widget"
+# "The $name file" "is" "provides" "specifies" "contains"
+# "represents" "a" "an" "the"
+
+ABBREVIATE_BRIEF =
+
+# If the ALWAYS_DETAILED_SEC and REPEAT_BRIEF tags are both set to YES then
+# Doxygen will generate a detailed section even if there is only a brief
+# description.
+
+ALWAYS_DETAILED_SEC = NO
+
+# If the INLINE_INHERITED_MEMB tag is set to YES, doxygen will show all
+# inherited members of a class in the documentation of that class as if those
+# members were ordinary class members. Constructors, destructors and assignment
+# operators of the base classes will not be shown.
+
+INLINE_INHERITED_MEMB = NO
+
+# If the FULL_PATH_NAMES tag is set to YES then Doxygen will prepend the full
+# path before files name in the file list and in the header files. If set
+# to NO the shortest path that makes the file name unique will be used.
+
+FULL_PATH_NAMES = NO
+
+# If the FULL_PATH_NAMES tag is set to YES then the STRIP_FROM_PATH tag
+# can be used to strip a user-defined part of the path. Stripping is
+# only done if one of the specified strings matches the left-hand part of
+# the path. The tag can be used to show relative paths in the file list.
+# If left blank the directory from which doxygen is run is used as the
+# path to strip.
+
+STRIP_FROM_PATH = ../..
+
+# The STRIP_FROM_INC_PATH tag can be used to strip a user-defined part of
+# the path mentioned in the documentation of a class, which tells
+# the reader which header file to include in order to use a class.
+# If left blank only the name of the header file containing the class
+# definition is used. Otherwise one should specify the include paths that
+# are normally passed to the compiler using the -I flag.
+
+STRIP_FROM_INC_PATH =
+
+# If the SHORT_NAMES tag is set to YES, doxygen will generate much shorter
+# (but less readable) file names. This can be useful is your file systems
+# doesn't support long names like on DOS, Mac, or CD-ROM.
+
+SHORT_NAMES = NO
+
+# If the JAVADOC_AUTOBRIEF tag is set to YES then Doxygen
+# will interpret the first line (until the first dot) of a JavaDoc-style
+# comment as the brief description. If set to NO, the JavaDoc
+# comments will behave just like regular Qt-style comments
+# (thus requiring an explicit @brief command for a brief description.)
+
+JAVADOC_AUTOBRIEF = NO
+
+# If the QT_AUTOBRIEF tag is set to YES then Doxygen will
+# interpret the first line (until the first dot) of a Qt-style
+# comment as the brief description. If set to NO, the comments
+# will behave just like regular Qt-style comments (thus requiring
+# an explicit \brief command for a brief description.)
+
+QT_AUTOBRIEF = NO
+
+# The MULTILINE_CPP_IS_BRIEF tag can be set to YES to make Doxygen
+# treat a multi-line C++ special comment block (i.e. a block of //! or ///
+# comments) as a brief description. This used to be the default behaviour.
+# The new default is to treat a multi-line C++ comment block as a detailed
+# description. Set this tag to YES if you prefer the old behaviour instead.
+
+MULTILINE_CPP_IS_BRIEF = NO
+
+# If the DETAILS_AT_TOP tag is set to YES then Doxygen
+# will output the detailed description near the top, like JavaDoc.
+# If set to NO, the detailed description appears after the member
+# documentation.
+
+DETAILS_AT_TOP = NO
+
+# If the INHERIT_DOCS tag is set to YES (the default) then an undocumented
+# member inherits the documentation from any documented member that it
+# re-implements.
+
+INHERIT_DOCS = YES
+
+# If the SEPARATE_MEMBER_PAGES tag is set to YES, then doxygen will produce
+# a new page for each member. If set to NO, the documentation of a member will
+# be part of the file/class/namespace that contains it.
+
+SEPARATE_MEMBER_PAGES = NO
+
+# The TAB_SIZE tag can be used to set the number of spaces in a tab.
+# Doxygen uses this value to replace tabs by spaces in code fragments.
+
+TAB_SIZE = 2
+
+# This tag can be used to specify a number of aliases that acts
+# as commands in the documentation. An alias has the form "name=value".
+# For example adding "sideeffect=\par Side Effects:\n" will allow you to
+# put the command \sideeffect (or @sideeffect) in the documentation, which
+# will result in a user-defined paragraph with heading "Side Effects:".
+# You can put \n's in the value part of an alias to insert newlines.
+
+ALIASES =
+
+# Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C
+# sources only. Doxygen will then generate output that is more tailored for C.
+# For instance, some of the names that are used will be different. The list
+# of all members will be omitted, etc.
+
+OPTIMIZE_OUTPUT_FOR_C = NO
+
+# Set the OPTIMIZE_OUTPUT_JAVA tag to YES if your project consists of Java
+# sources only. Doxygen will then generate output that is more tailored for
+# Java. For instance, namespaces will be presented as packages, qualified
+# scopes will look different, etc.
+
+OPTIMIZE_OUTPUT_JAVA = NO
+
+# Set the OPTIMIZE_FOR_FORTRAN tag to YES if your project consists of Fortran
+# sources only. Doxygen will then generate output that is more tailored for
+# Fortran.
+
+OPTIMIZE_FOR_FORTRAN = NO
+
+# Set the OPTIMIZE_OUTPUT_VHDL tag to YES if your project consists of VHDL
+# sources. Doxygen will then generate output that is tailored for
+# VHDL.
+
+OPTIMIZE_OUTPUT_VHDL = NO
+
+# If you use STL classes (i.e. std::string, std::vector, etc.) but do not want
+# to include (a tag file for) the STL sources as input, then you should
+# set this tag to YES in order to let doxygen match functions declarations and
+# definitions whose arguments contain STL classes (e.g. func(std::string); v.s.
+# func(std::string) {}). This also make the inheritance and collaboration
+# diagrams that involve STL classes more complete and accurate.
+
+BUILTIN_STL_SUPPORT = NO
+
+# If you use Microsoft's C++/CLI language, you should set this option to YES to
+# enable parsing support.
+
+CPP_CLI_SUPPORT = NO
+
+# Set the SIP_SUPPORT tag to YES if your project consists of sip sources only.
+# Doxygen will parse them like normal C++ but will assume all classes use public
+# instead of private inheritance when no explicit protection keyword is present.
+
+SIP_SUPPORT = NO
+
+# For Microsoft's IDL there are propget and propput attributes to indicate getter
+# and setter methods for a property. Setting this option to YES (the default)
+# will make doxygen to replace the get and set methods by a property in the
+# documentation. This will only work if the methods are indeed getting or
+# setting a simple type. If this is not the case, or you want to show the
+# methods anyway, you should set this option to NO.
+
+IDL_PROPERTY_SUPPORT = YES
+
+# If member grouping is used in the documentation and the DISTRIBUTE_GROUP_DOC
+# tag is set to YES, then doxygen will reuse the documentation of the first
+# member in the group (if any) for the other members of the group. By default
+# all members of a group must be documented explicitly.
+
+DISTRIBUTE_GROUP_DOC = NO
+
+# Set the SUBGROUPING tag to YES (the default) to allow class member groups of
+# the same type (for instance a group of public functions) to be put as a
+# subgroup of that type (e.g. under the Public Functions section). Set it to
+# NO to prevent subgrouping. Alternatively, this can be done per class using
+# the \nosubgrouping command.
+
+SUBGROUPING = YES
+
+# When TYPEDEF_HIDES_STRUCT is enabled, a typedef of a struct, union, or enum
+# is documented as struct, union, or enum with the name of the typedef. So
+# typedef struct TypeS {} TypeT, will appear in the documentation as a struct
+# with name TypeT. When disabled the typedef will appear as a member of a file,
+# namespace, or class. And the struct will be named TypeS. This can typically
+# be useful for C code in case the coding convention dictates that all compound
+# types are typedef'ed and only the typedef is referenced, never the tag name.
+
+TYPEDEF_HIDES_STRUCT = NO
+
+#---------------------------------------------------------------------------
+# Build related configuration options
+#---------------------------------------------------------------------------
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+EXTRACT_ALL = YES
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+# If the EXTRACT_PRIVATE tag is set to YES all private members of a class
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+EXTRACT_PRIVATE = NO
+
+# If the EXTRACT_STATIC tag is set to YES all static members of a file
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+EXTRACT_STATIC = YES
+
+# If the EXTRACT_LOCAL_CLASSES tag is set to YES classes (and structs)
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+# If set to NO only classes defined in header files are included.
+
+EXTRACT_LOCAL_CLASSES = YES
+
+# This flag is only useful for Objective-C code. When set to YES local
+# methods, which are defined in the implementation section but not in
+# the interface are included in the documentation.
+# If set to NO (the default) only methods in the interface are included.
+
+EXTRACT_LOCAL_METHODS = NO
+
+# If this flag is set to YES, the members of anonymous namespaces will be
+# extracted and appear in the documentation as a namespace called
+# 'anonymous_namespace{file}', where file will be replaced with the base
+# name of the file that contains the anonymous namespace. By default
+# anonymous namespace are hidden.
+
+EXTRACT_ANON_NSPACES = NO
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+# If the HIDE_UNDOC_MEMBERS tag is set to YES, Doxygen will hide all
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+# If set to NO (the default) these members will be included in the
+# various overviews, but no documentation section is generated.
+# This option has no effect if EXTRACT_ALL is enabled.
+
+HIDE_UNDOC_MEMBERS = NO
+
+# If the HIDE_UNDOC_CLASSES tag is set to YES, Doxygen will hide all
+# undocumented classes that are normally visible in the class hierarchy.
+# If set to NO (the default) these classes will be included in the various
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+HIDE_UNDOC_CLASSES = NO
+
+# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, Doxygen will hide all
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+# If set to NO (the default) these declarations will be included in the
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+# If the HIDE_IN_BODY_DOCS tag is set to YES, Doxygen will hide any
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+# If set to NO (the default) these blocks will be appended to the
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+
+HIDE_IN_BODY_DOCS = NO
+
+# The INTERNAL_DOCS tag determines if documentation
+# that is typed after a \internal command is included. If the tag is set
+# to NO (the default) then the documentation will be excluded.
+# Set it to YES to include the internal documentation.
+
+INTERNAL_DOCS = NO
+
+# If the CASE_SENSE_NAMES tag is set to NO then Doxygen will only generate
+# file names in lower-case letters. If set to YES upper-case letters are also
+# allowed. This is useful if you have classes or files whose names only differ
+# in case and if your file system supports case sensitive file names. Windows
+# and Mac users are advised to set this option to NO.
+
+CASE_SENSE_NAMES = YES
+
+# If the HIDE_SCOPE_NAMES tag is set to NO (the default) then Doxygen
+# will show members with their full class and namespace scopes in the
+# documentation. If set to YES the scope will be hidden.
+
+HIDE_SCOPE_NAMES = NO
+
+# If the SHOW_INCLUDE_FILES tag is set to YES (the default) then Doxygen
+# will put a list of the files that are included by a file in the documentation
+# of that file.
+
+SHOW_INCLUDE_FILES = YES
+
+# If the INLINE_INFO tag is set to YES (the default) then a tag [inline]
+# is inserted in the documentation for inline members.
+
+INLINE_INFO = YES
+
+# If the SORT_MEMBER_DOCS tag is set to YES (the default) then doxygen
+# will sort the (detailed) documentation of file and class members
+# alphabetically by member name. If set to NO the members will appear in
+# declaration order.
+
+SORT_MEMBER_DOCS = YES
+
+# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the
+# brief documentation of file, namespace and class members alphabetically
+# by member name. If set to NO (the default) the members will appear in
+# declaration order.
+
+SORT_BRIEF_DOCS = NO
+
+# If the SORT_GROUP_NAMES tag is set to YES then doxygen will sort the
+# hierarchy of group names into alphabetical order. If set to NO (the default)
+# the group names will appear in their defined order.
+
+SORT_GROUP_NAMES = NO
+
+# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be
+# sorted by fully-qualified names, including namespaces. If set to
+# NO (the default), the class list will be sorted only by class name,
+# not including the namespace part.
+# Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES.
+# Note: This option applies only to the class list, not to the
+# alphabetical list.
+
+SORT_BY_SCOPE_NAME = NO
+
+# The GENERATE_TODOLIST tag can be used to enable (YES) or
+# disable (NO) the todo list. This list is created by putting \todo
+# commands in the documentation.
+
+GENERATE_TODOLIST = YES
+
+# The GENERATE_TESTLIST tag can be used to enable (YES) or
+# disable (NO) the test list. This list is created by putting \test
+# commands in the documentation.
+
+GENERATE_TESTLIST = YES
+
+# The GENERATE_BUGLIST tag can be used to enable (YES) or
+# disable (NO) the bug list. This list is created by putting \bug
+# commands in the documentation.
+
+GENERATE_BUGLIST = YES
+
+# The GENERATE_DEPRECATEDLIST tag can be used to enable (YES) or
+# disable (NO) the deprecated list. This list is created by putting
+# \deprecated commands in the documentation.
+
+GENERATE_DEPRECATEDLIST= YES
+
+# The ENABLED_SECTIONS tag can be used to enable conditional
+# documentation sections, marked by \if sectionname ... \endif.
+
+ENABLED_SECTIONS =
+
+# The MAX_INITIALIZER_LINES tag determines the maximum number of lines
+# the initial value of a variable or define consists of for it to appear in
+# the documentation. If the initializer consists of more lines than specified
+# here it will be hidden. Use a value of 0 to hide initializers completely.
+# The appearance of the initializer of individual variables and defines in the
+# documentation can be controlled using \showinitializer or \hideinitializer
+# command in the documentation regardless of this setting.
+
+MAX_INITIALIZER_LINES = 30
+
+# Set the SHOW_USED_FILES tag to NO to disable the list of files generated
+# at the bottom of the documentation of classes and structs. If set to YES the
+# list will mention the files that were used to generate the documentation.
+
+SHOW_USED_FILES = YES
+
+# If the sources in your project are distributed over multiple directories
+# then setting the SHOW_DIRECTORIES tag to YES will show the directory hierarchy
+# in the documentation. The default is NO.
+
+SHOW_DIRECTORIES = YES
+
+# Set the SHOW_FILES tag to NO to disable the generation of the Files page.
+# This will remove the Files entry from the Quick Index and from the
+# Folder Tree View (if specified). The default is YES.
+
+SHOW_FILES = YES
+
+# Set the SHOW_NAMESPACES tag to NO to disable the generation of the
+# Namespaces page. This will remove the Namespaces entry from the Quick Index
+# and from the Folder Tree View (if specified). The default is YES.
+
+SHOW_NAMESPACES = YES
+
+# The FILE_VERSION_FILTER tag can be used to specify a program or script that
+# doxygen should invoke to get the current version for each file (typically from
+# the version control system). Doxygen will invoke the program by executing (via
+# popen()) the command , where is the value of
+# the FILE_VERSION_FILTER tag, and is the name of an input file
+# provided by doxygen. Whatever the program writes to standard output
+# is used as the file version. See the manual for examples.
+
+FILE_VERSION_FILTER =
+
+#---------------------------------------------------------------------------
+# configuration options related to warning and progress messages
+#---------------------------------------------------------------------------
+
+# The QUIET tag can be used to turn on/off the messages that are generated
+# by doxygen. Possible values are YES and NO. If left blank NO is used.
+
+QUIET = NO
+
+# The WARNINGS tag can be used to turn on/off the warning messages that are
+# generated by doxygen. Possible values are YES and NO. If left blank
+# NO is used.
+
+WARNINGS = NO
+
+# If WARN_IF_UNDOCUMENTED is set to YES, then doxygen will generate warnings
+# for undocumented members. If EXTRACT_ALL is set to YES then this flag will
+# automatically be disabled.
+
+WARN_IF_UNDOCUMENTED = NO
+
+# If WARN_IF_DOC_ERROR is set to YES, doxygen will generate warnings for
+# potential errors in the documentation, such as not documenting some
+# parameters in a documented function, or documenting parameters that
+# don't exist or using markup commands wrongly.
+
+WARN_IF_DOC_ERROR = YES
+
+# This WARN_NO_PARAMDOC option can be abled to get warnings for
+# functions that are documented, but have no documentation for their parameters
+# or return value. If set to NO (the default) doxygen will only warn about
+# wrong or incomplete parameter documentation, but not about the absence of
+# documentation.
+
+WARN_NO_PARAMDOC = NO
+
+# The WARN_FORMAT tag determines the format of the warning messages that
+# doxygen can produce. The string should contain the $file, $line, and $text
+# tags, which will be replaced by the file and line number from which the
+# warning originated and the warning text. Optionally the format may contain
+# $version, which will be replaced by the version of the file (if it could
+# be obtained via FILE_VERSION_FILTER)
+
+WARN_FORMAT =
+
+# The WARN_LOGFILE tag can be used to specify a file to which warning
+# and error messages should be written. If left blank the output is written
+# to stderr.
+
+WARN_LOGFILE =
+
+#---------------------------------------------------------------------------
+# configuration options related to the input files
+#---------------------------------------------------------------------------
+
+# The INPUT tag can be used to specify the files and/or directories that contain
+# documented source files. You may enter file names like "myfile.cpp" or
+# directories like "/usr/src/myproject". Separate the files or directories
+# with spaces.
+
+INPUT = @abs_top_srcdir@/include \
+ @abs_top_srcdir@/lib \
+ @abs_top_srcdir@/docs/doxygen.intro
+
+# This tag can be used to specify the character encoding of the source files
+# that doxygen parses. Internally doxygen uses the UTF-8 encoding, which is
+# also the default input encoding. Doxygen uses libiconv (or the iconv built
+# into libc) for the transcoding. See http://www.gnu.org/software/libiconv for
+# the list of possible encodings.
+
+INPUT_ENCODING = UTF-8
+
+# If the value of the INPUT tag contains directories, you can use the
+# FILE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp
+# and *.h) to filter out the source-files in the directories. If left
+# blank the following patterns are tested:
+# *.c *.cc *.cxx *.cpp *.c++ *.java *.ii *.ixx *.ipp *.i++ *.inl *.h *.hh *.hxx
+# *.hpp *.h++ *.idl *.odl *.cs *.php *.php3 *.inc *.m *.mm *.py *.f90
+
+FILE_PATTERNS =
+
+# The RECURSIVE tag can be used to turn specify whether or not subdirectories
+# should be searched for input files as well. Possible values are YES and NO.
+# If left blank NO is used.
+
+RECURSIVE = YES
+
+# The EXCLUDE tag can be used to specify files and/or directories that should
+# excluded from the INPUT source files. This way you can easily exclude a
+# subdirectory from a directory tree whose root is specified with the INPUT tag.
+
+EXCLUDE =
+
+# The EXCLUDE_SYMLINKS tag can be used select whether or not files or
+# directories that are symbolic links (a Unix filesystem feature) are excluded
+# from the input.
+
+EXCLUDE_SYMLINKS = NO
+
+# If the value of the INPUT tag contains directories, you can use the
+# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude
+# certain files from those directories. Note that the wildcards are matched
+# against the file with absolute path, so to exclude all test directories
+# for example use the pattern */test/*
+
+EXCLUDE_PATTERNS =
+
+# The EXCLUDE_SYMBOLS tag can be used to specify one or more symbol names
+# (namespaces, classes, functions, etc.) that should be excluded from the
+# output. The symbol name can be a fully qualified name, a word, or if the
+# wildcard * is used, a substring. Examples: ANamespace, AClass,
+# AClass::ANamespace, ANamespace::*Test
+
+EXCLUDE_SYMBOLS =
+
+# The EXAMPLE_PATH tag can be used to specify one or more files or
+# directories that contain example code fragments that are included (see
+# the \include command).
+
+EXAMPLE_PATH = @abs_top_srcdir@/examples
+
+# If the value of the EXAMPLE_PATH tag contains directories, you can use the
+# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp
+# and *.h) to filter out the source-files in the directories. If left
+# blank all files are included.
+
+EXAMPLE_PATTERNS =
+
+# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be
+# searched for input files to be used with the \include or \dontinclude
+# commands irrespective of the value of the RECURSIVE tag.
+# Possible values are YES and NO. If left blank NO is used.
+
+EXAMPLE_RECURSIVE = YES
+
+# The IMAGE_PATH tag can be used to specify one or more files or
+# directories that contain image that are included in the documentation (see
+# the \image command).
+
+IMAGE_PATH = @abs_top_srcdir@/docs/img
+
+# The INPUT_FILTER tag can be used to specify a program that doxygen should
+# invoke to filter for each input file. Doxygen will invoke the filter program
+# by executing (via popen()) the command , where
+# is the value of the INPUT_FILTER tag, and is the name of an
+# input file. Doxygen will then use the output that the filter program writes
+# to standard output. If FILTER_PATTERNS is specified, this tag will be
+# ignored.
+
+INPUT_FILTER =
+
+# The FILTER_PATTERNS tag can be used to specify filters on a per file pattern
+# basis. Doxygen will compare the file name with each pattern and apply the
+# filter if there is a match. The filters are a list of the form:
+# pattern=filter (like *.cpp=my_cpp_filter). See INPUT_FILTER for further
+# info on how filters are used. If FILTER_PATTERNS is empty, INPUT_FILTER
+# is applied to all files.
+
+FILTER_PATTERNS =
+
+# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using
+# INPUT_FILTER) will be used to filter the input files when producing source
+# files to browse (i.e. when SOURCE_BROWSER is set to YES).
+
+FILTER_SOURCE_FILES = NO
+
+#---------------------------------------------------------------------------
+# configuration options related to source browsing
+#---------------------------------------------------------------------------
+
+# If the SOURCE_BROWSER tag is set to YES then a list of source files will
+# be generated. Documented entities will be cross-referenced with these sources.
+# Note: To get rid of all source code in the generated output, make sure also
+# VERBATIM_HEADERS is set to NO.
+
+SOURCE_BROWSER = YES
+
+# Setting the INLINE_SOURCES tag to YES will include the body
+# of functions and classes directly in the documentation.
+
+INLINE_SOURCES = NO
+
+# Setting the STRIP_CODE_COMMENTS tag to YES (the default) will instruct
+# doxygen to hide any special comment blocks from generated source code
+# fragments. Normal C and C++ comments will always remain visible.
+
+STRIP_CODE_COMMENTS = NO
+
+# If the REFERENCED_BY_RELATION tag is set to YES
+# then for each documented function all documented
+# functions referencing it will be listed.
+
+REFERENCED_BY_RELATION = YES
+
+# If the REFERENCES_RELATION tag is set to YES
+# then for each documented function all documented entities
+# called/used by that function will be listed.
+
+REFERENCES_RELATION = YES
+
+# If the REFERENCES_LINK_SOURCE tag is set to YES (the default)
+# and SOURCE_BROWSER tag is set to YES, then the hyperlinks from
+# functions in REFERENCES_RELATION and REFERENCED_BY_RELATION lists will
+# link to the source code. Otherwise they will link to the documentstion.
+
+REFERENCES_LINK_SOURCE = YES
+
+# If the USE_HTAGS tag is set to YES then the references to source code
+# will point to the HTML generated by the htags(1) tool instead of doxygen
+# built-in source browser. The htags tool is part of GNU's global source
+# tagging system (see http://www.gnu.org/software/global/global.html). You
+# will need version 4.8.6 or higher.
+
+USE_HTAGS = NO
+
+# If the VERBATIM_HEADERS tag is set to YES (the default) then Doxygen
+# will generate a verbatim copy of the header file for each class for
+# which an include is specified. Set to NO to disable this.
+
+VERBATIM_HEADERS = YES
+
+#---------------------------------------------------------------------------
+# configuration options related to the alphabetical class index
+#---------------------------------------------------------------------------
+
+# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index
+# of all compounds will be generated. Enable this if the project
+# contains a lot of classes, structs, unions or interfaces.
+
+ALPHABETICAL_INDEX = YES
+
+# If the alphabetical index is enabled (see ALPHABETICAL_INDEX) then
+# the COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns
+# in which this list will be split (can be a number in the range [1..20])
+
+COLS_IN_ALPHA_INDEX = 4
+
+# In case all classes in a project start with a common prefix, all
+# classes will be put under the same header in the alphabetical index.
+# The IGNORE_PREFIX tag can be used to specify one or more prefixes that
+# should be ignored while generating the index headers.
+
+IGNORE_PREFIX = llvm::
+
+#---------------------------------------------------------------------------
+# configuration options related to the HTML output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_HTML tag is set to YES (the default) Doxygen will
+# generate HTML output.
+
+GENERATE_HTML = YES
+
+# The HTML_OUTPUT tag is used to specify where the HTML docs will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be
+# put in front of it. If left blank `html' will be used as the default path.
+
+HTML_OUTPUT = html
+
+# The HTML_FILE_EXTENSION tag can be used to specify the file extension for
+# each generated HTML page (for example: .htm,.php,.asp). If it is left blank
+# doxygen will generate files with .html extension.
+
+HTML_FILE_EXTENSION = .html
+
+# The HTML_HEADER tag can be used to specify a personal HTML header for
+# each generated HTML page. If it is left blank doxygen will generate a
+# standard header.
+
+HTML_HEADER = @abs_top_srcdir@/docs/doxygen.header
+
+# The HTML_FOOTER tag can be used to specify a personal HTML footer for
+# each generated HTML page. If it is left blank doxygen will generate a
+# standard footer.
+
+HTML_FOOTER = @abs_top_srcdir@/docs/doxygen.footer
+
+# The HTML_STYLESHEET tag can be used to specify a user-defined cascading
+# style sheet that is used by each HTML page. It can be used to
+# fine-tune the look of the HTML output. If the tag is left blank doxygen
+# will generate a default style sheet. Note that doxygen will try to copy
+# the style sheet file to the HTML output directory, so don't put your own
+# stylesheet in the HTML output directory as well, or it will be erased!
+
+HTML_STYLESHEET = @abs_top_srcdir@/docs/doxygen.css
+
+# If the HTML_ALIGN_MEMBERS tag is set to YES, the members of classes,
+# files or namespaces will be aligned in HTML using tables. If set to
+# NO a bullet list will be used.
+
+HTML_ALIGN_MEMBERS = YES
+
+# If the GENERATE_HTMLHELP tag is set to YES, additional index files
+# will be generated that can be used as input for tools like the
+# Microsoft HTML help workshop to generate a compiled HTML help file (.chm)
+# of the generated HTML documentation.
+
+GENERATE_HTMLHELP = NO
+
+# If the GENERATE_DOCSET tag is set to YES, additional index files
+# will be generated that can be used as input for Apple's Xcode 3
+# integrated development environment, introduced with OSX 10.5 (Leopard).
+# To create a documentation set, doxygen will generate a Makefile in the
+# HTML output directory. Running make will produce the docset in that
+# directory and running "make install" will install the docset in
+# ~/Library/Developer/Shared/Documentation/DocSets so that Xcode will find
+# it at startup.
+
+GENERATE_DOCSET = NO
+
+# When GENERATE_DOCSET tag is set to YES, this tag determines the name of the
+# feed. A documentation feed provides an umbrella under which multiple
+# documentation sets from a single provider (such as a company or product suite)
+# can be grouped.
+
+DOCSET_FEEDNAME = "Doxygen generated docs"
+
+# When GENERATE_DOCSET tag is set to YES, this tag specifies a string that
+# should uniquely identify the documentation set bundle. This should be a
+# reverse domain-name style string, e.g. com.mycompany.MyDocSet. Doxygen
+# will append .docset to the name.
+
+DOCSET_BUNDLE_ID = org.doxygen.Project
+
+# If the HTML_DYNAMIC_SECTIONS tag is set to YES then the generated HTML
+# documentation will contain sections that can be hidden and shown after the
+# page has loaded. For this to work a browser that supports
+# JavaScript and DHTML is required (for instance Mozilla 1.0+, Firefox
+# Netscape 6.0+, Internet explorer 5.0+, Konqueror, or Safari).
+
+HTML_DYNAMIC_SECTIONS = NO
+
+# If the GENERATE_HTMLHELP tag is set to YES, the CHM_FILE tag can
+# be used to specify the file name of the resulting .chm file. You
+# can add a path in front of the file if the result should not be
+# written to the html output directory.
+
+CHM_FILE =
+
+# If the GENERATE_HTMLHELP tag is set to YES, the HHC_LOCATION tag can
+# be used to specify the location (absolute path including file name) of
+# the HTML help compiler (hhc.exe). If non-empty doxygen will try to run
+# the HTML help compiler on the generated index.hhp.
+
+HHC_LOCATION =
+
+# If the GENERATE_HTMLHELP tag is set to YES, the GENERATE_CHI flag
+# controls if a separate .chi index file is generated (YES) or that
+# it should be included in the master .chm file (NO).
+
+GENERATE_CHI = NO
+
+# If the GENERATE_HTMLHELP tag is set to YES, the CHM_INDEX_ENCODING
+# is used to encode HtmlHelp index (hhk), content (hhc) and project file
+# content.
+
+CHM_INDEX_ENCODING =
+
+# If the GENERATE_HTMLHELP tag is set to YES, the BINARY_TOC flag
+# controls whether a binary table of contents is generated (YES) or a
+# normal table of contents (NO) in the .chm file.
+
+BINARY_TOC = NO
+
+# The TOC_EXPAND flag can be set to YES to add extra items for group members
+# to the contents of the HTML help documentation and to the tree view.
+
+TOC_EXPAND = NO
+
+# The DISABLE_INDEX tag can be used to turn on/off the condensed index at
+# top of each HTML page. The value NO (the default) enables the index and
+# the value YES disables it.
+
+DISABLE_INDEX = NO
+
+# This tag can be used to set the number of enum values (range [1..20])
+# that doxygen will group on one line in the generated HTML documentation.
+
+ENUM_VALUES_PER_LINE = 4
+
+# The GENERATE_TREEVIEW tag is used to specify whether a tree-like index
+# structure should be generated to display hierarchical information.
+# If the tag value is set to FRAME, a side panel will be generated
+# containing a tree-like index structure (just like the one that
+# is generated for HTML Help). For this to work a browser that supports
+# JavaScript, DHTML, CSS and frames is required (for instance Mozilla 1.0+,
+# Netscape 6.0+, Internet explorer 5.0+, or Konqueror). Windows users are
+# probably better off using the HTML help feature. Other possible values
+# for this tag are: HIERARCHIES, which will generate the Groups, Directories,
+# and Class Hiererachy pages using a tree view instead of an ordered list;
+# ALL, which combines the behavior of FRAME and HIERARCHIES; and NONE, which
+# disables this behavior completely. For backwards compatibility with previous
+# releases of Doxygen, the values YES and NO are equivalent to FRAME and NONE
+# respectively.
+
+GENERATE_TREEVIEW = NO
+
+# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be
+# used to set the initial width (in pixels) of the frame in which the tree
+# is shown.
+
+TREEVIEW_WIDTH = 250
+
+# Use this tag to change the font size of Latex formulas included
+# as images in the HTML documentation. The default is 10. Note that
+# when you change the font size after a successful doxygen run you need
+# to manually remove any form_*.png images from the HTML output directory
+# to force them to be regenerated.
+
+FORMULA_FONTSIZE = 10
+
+#---------------------------------------------------------------------------
+# configuration options related to the LaTeX output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_LATEX tag is set to YES (the default) Doxygen will
+# generate Latex output.
+
+GENERATE_LATEX = NO
+
+# The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be
+# put in front of it. If left blank `latex' will be used as the default path.
+
+LATEX_OUTPUT =
+
+# The LATEX_CMD_NAME tag can be used to specify the LaTeX command name to be
+# invoked. If left blank `latex' will be used as the default command name.
+
+LATEX_CMD_NAME = latex
+
+# The MAKEINDEX_CMD_NAME tag can be used to specify the command name to
+# generate index for LaTeX. If left blank `makeindex' will be used as the
+# default command name.
+
+MAKEINDEX_CMD_NAME = makeindex
+
+# If the COMPACT_LATEX tag is set to YES Doxygen generates more compact
+# LaTeX documents. This may be useful for small projects and may help to
+# save some trees in general.
+
+COMPACT_LATEX = NO
+
+# The PAPER_TYPE tag can be used to set the paper type that is used
+# by the printer. Possible values are: a4, a4wide, letter, legal and
+# executive. If left blank a4wide will be used.
+
+PAPER_TYPE = letter
+
+# The EXTRA_PACKAGES tag can be to specify one or more names of LaTeX
+# packages that should be included in the LaTeX output.
+
+EXTRA_PACKAGES =
+
+# The LATEX_HEADER tag can be used to specify a personal LaTeX header for
+# the generated latex document. The header should contain everything until
+# the first chapter. If it is left blank doxygen will generate a
+# standard header. Notice: only use this tag if you know what you are doing!
+
+LATEX_HEADER =
+
+# If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated
+# is prepared for conversion to pdf (using ps2pdf). The pdf file will
+# contain links (just like the HTML output) instead of page references
+# This makes the output suitable for online browsing using a pdf viewer.
+
+PDF_HYPERLINKS = NO
+
+# If the USE_PDFLATEX tag is set to YES, pdflatex will be used instead of
+# plain latex in the generated Makefile. Set this option to YES to get a
+# higher quality PDF documentation.
+
+USE_PDFLATEX = NO
+
+# If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \\batchmode.
+# command to the generated LaTeX files. This will instruct LaTeX to keep
+# running if errors occur, instead of asking the user for help.
+# This option is also used when generating formulas in HTML.
+
+LATEX_BATCHMODE = NO
+
+# If LATEX_HIDE_INDICES is set to YES then doxygen will not
+# include the index chapters (such as File Index, Compound Index, etc.)
+# in the output.
+
+LATEX_HIDE_INDICES = NO
+
+#---------------------------------------------------------------------------
+# configuration options related to the RTF output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_RTF tag is set to YES Doxygen will generate RTF output
+# The RTF output is optimized for Word 97 and may not look very pretty with
+# other RTF readers or editors.
+
+GENERATE_RTF = NO
+
+# The RTF_OUTPUT tag is used to specify where the RTF docs will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be
+# put in front of it. If left blank `rtf' will be used as the default path.
+
+RTF_OUTPUT =
+
+# If the COMPACT_RTF tag is set to YES Doxygen generates more compact
+# RTF documents. This may be useful for small projects and may help to
+# save some trees in general.
+
+COMPACT_RTF = NO
+
+# If the RTF_HYPERLINKS tag is set to YES, the RTF that is generated
+# will contain hyperlink fields. The RTF file will
+# contain links (just like the HTML output) instead of page references.
+# This makes the output suitable for online browsing using WORD or other
+# programs which support those fields.
+# Note: wordpad (write) and others do not support links.
+
+RTF_HYPERLINKS = NO
+
+# Load stylesheet definitions from file. Syntax is similar to doxygen's
+# config file, i.e. a series of assignments. You only have to provide
+# replacements, missing definitions are set to their default value.
+
+RTF_STYLESHEET_FILE =
+
+# Set optional variables used in the generation of an rtf document.
+# Syntax is similar to doxygen's config file.
+
+RTF_EXTENSIONS_FILE =
+
+#---------------------------------------------------------------------------
+# configuration options related to the man page output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_MAN tag is set to YES (the default) Doxygen will
+# generate man pages
+
+GENERATE_MAN = NO
+
+# The MAN_OUTPUT tag is used to specify where the man pages will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be
+# put in front of it. If left blank `man' will be used as the default path.
+
+MAN_OUTPUT =
+
+# The MAN_EXTENSION tag determines the extension that is added to
+# the generated man pages (default is the subroutine's section .3)
+
+MAN_EXTENSION =
+
+# If the MAN_LINKS tag is set to YES and Doxygen generates man output,
+# then it will generate one additional man file for each entity
+# documented in the real man page(s). These additional files
+# only source the real man page, but without them the man command
+# would be unable to find the correct page. The default is NO.
+
+MAN_LINKS = NO
+
+#---------------------------------------------------------------------------
+# configuration options related to the XML output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_XML tag is set to YES Doxygen will
+# generate an XML file that captures the structure of
+# the code including all documentation.
+
+GENERATE_XML = NO
+
+# The XML_OUTPUT tag is used to specify where the XML pages will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be
+# put in front of it. If left blank `xml' will be used as the default path.
+
+XML_OUTPUT = xml
+
+# The XML_SCHEMA tag can be used to specify an XML schema,
+# which can be used by a validating XML parser to check the
+# syntax of the XML files.
+
+XML_SCHEMA =
+
+# The XML_DTD tag can be used to specify an XML DTD,
+# which can be used by a validating XML parser to check the
+# syntax of the XML files.
+
+XML_DTD =
+
+# If the XML_PROGRAMLISTING tag is set to YES Doxygen will
+# dump the program listings (including syntax highlighting
+# and cross-referencing information) to the XML output. Note that
+# enabling this will significantly increase the size of the XML output.
+
+XML_PROGRAMLISTING = YES
+
+#---------------------------------------------------------------------------
+# configuration options for the AutoGen Definitions output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_AUTOGEN_DEF tag is set to YES Doxygen will
+# generate an AutoGen Definitions (see autogen.sf.net) file
+# that captures the structure of the code including all
+# documentation. Note that this feature is still experimental
+# and incomplete at the moment.
+
+GENERATE_AUTOGEN_DEF = NO
+
+#---------------------------------------------------------------------------
+# configuration options related to the Perl module output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_PERLMOD tag is set to YES Doxygen will
+# generate a Perl module file that captures the structure of
+# the code including all documentation. Note that this
+# feature is still experimental and incomplete at the
+# moment.
+
+GENERATE_PERLMOD = NO
+
+# If the PERLMOD_LATEX tag is set to YES Doxygen will generate
+# the necessary Makefile rules, Perl scripts and LaTeX code to be able
+# to generate PDF and DVI output from the Perl module output.
+
+PERLMOD_LATEX = NO
+
+# If the PERLMOD_PRETTY tag is set to YES the Perl module output will be
+# nicely formatted so it can be parsed by a human reader. This is useful
+# if you want to understand what is going on. On the other hand, if this
+# tag is set to NO the size of the Perl module output will be much smaller
+# and Perl will parse it just the same.
+
+PERLMOD_PRETTY = YES
+
+# The names of the make variables in the generated doxyrules.make file
+# are prefixed with the string contained in PERLMOD_MAKEVAR_PREFIX.
+# This is useful so different doxyrules.make files included by the same
+# Makefile don't overwrite each other's variables.
+
+PERLMOD_MAKEVAR_PREFIX =
+
+#---------------------------------------------------------------------------
+# Configuration options related to the preprocessor
+#---------------------------------------------------------------------------
+
+# If the ENABLE_PREPROCESSING tag is set to YES (the default) Doxygen will
+# evaluate all C-preprocessor directives found in the sources and include
+# files.
+
+ENABLE_PREPROCESSING = YES
+
+# If the MACRO_EXPANSION tag is set to YES Doxygen will expand all macro
+# names in the source code. If set to NO (the default) only conditional
+# compilation will be performed. Macro expansion can be done in a controlled
+# way by setting EXPAND_ONLY_PREDEF to YES.
+
+MACRO_EXPANSION = NO
+
+# If the EXPAND_ONLY_PREDEF and MACRO_EXPANSION tags are both set to YES
+# then the macro expansion is limited to the macros specified with the
+# PREDEFINED and EXPAND_AS_DEFINED tags.
+
+EXPAND_ONLY_PREDEF = NO
+
+# If the SEARCH_INCLUDES tag is set to YES (the default) the includes files
+# in the INCLUDE_PATH (see below) will be search if a #include is found.
+
+SEARCH_INCLUDES = YES
+
+# The INCLUDE_PATH tag can be used to specify one or more directories that
+# contain include files that are not input files but should be processed by
+# the preprocessor.
+
+INCLUDE_PATH = ../include
+
+# You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard
+# patterns (like *.h and *.hpp) to filter out the header-files in the
+# directories. If left blank, the patterns specified with FILE_PATTERNS will
+# be used.
+
+INCLUDE_FILE_PATTERNS =
+
+# The PREDEFINED tag can be used to specify one or more macro names that
+# are defined before the preprocessor is started (similar to the -D option of
+# gcc). The argument of the tag is a list of macros of the form: name
+# or name=definition (no spaces). If the definition and the = are
+# omitted =1 is assumed. To prevent a macro definition from being
+# undefined via #undef or recursively expanded use the := operator
+# instead of the = operator.
+
+PREDEFINED =
+
+# If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then
+# this tag can be used to specify a list of macro names that should be expanded.
+# The macro definition that is found in the sources will be used.
+# Use the PREDEFINED tag if you want to use a different macro definition.
+
+EXPAND_AS_DEFINED =
+
+# If the SKIP_FUNCTION_MACROS tag is set to YES (the default) then
+# doxygen's preprocessor will remove all function-like macros that are alone
+# on a line, have an all uppercase name, and do not end with a semicolon. Such
+# function macros are typically used for boiler-plate code, and will confuse
+# the parser if not removed.
+
+SKIP_FUNCTION_MACROS = YES
+
+#---------------------------------------------------------------------------
+# Configuration::additions related to external references
+#---------------------------------------------------------------------------
+
+# The TAGFILES option can be used to specify one or more tagfiles.
+# Optionally an initial location of the external documentation
+# can be added for each tagfile. The format of a tag file without
+# this location is as follows:
+# TAGFILES = file1 file2 ...
+# Adding location for the tag files is done as follows:
+# TAGFILES = file1=loc1 "file2 = loc2" ...
+# where "loc1" and "loc2" can be relative or absolute paths or
+# URLs. If a location is present for each tag, the installdox tool
+# does not have to be run to correct the links.
+# Note that each tag file must have a unique name
+# (where the name does NOT include the path)
+# If a tag file is not located in the directory in which doxygen
+# is run, you must also specify the path to the tagfile here.
+
+TAGFILES =
+
+# When a file name is specified after GENERATE_TAGFILE, doxygen will create
+# a tag file that is based on the input files it reads.
+
+GENERATE_TAGFILE =
+
+# If the ALLEXTERNALS tag is set to YES all external classes will be listed
+# in the class index. If set to NO only the inherited external classes
+# will be listed.
+
+ALLEXTERNALS = YES
+
+# If the EXTERNAL_GROUPS tag is set to YES all external groups will be listed
+# in the modules index. If set to NO, only the current project's groups will
+# be listed.
+
+EXTERNAL_GROUPS = YES
+
+# The PERL_PATH should be the absolute path and name of the perl script
+# interpreter (i.e. the result of `which perl').
+
+PERL_PATH =
+
+#---------------------------------------------------------------------------
+# Configuration options related to the dot tool
+#---------------------------------------------------------------------------
+
+# If the CLASS_DIAGRAMS tag is set to YES (the default) Doxygen will
+# generate a inheritance diagram (in HTML, RTF and LaTeX) for classes with base
+# or super classes. Setting the tag to NO turns the diagrams off. Note that
+# this option is superseded by the HAVE_DOT option below. This is only a
+# fallback. It is recommended to install and use dot, since it yields more
+# powerful graphs.
+
+CLASS_DIAGRAMS = YES
+
+# You can define message sequence charts within doxygen comments using the \msc
+# command. Doxygen will then run the mscgen tool (see
+# http://www.mcternan.me.uk/mscgen/) to produce the chart and insert it in the
+# documentation. The MSCGEN_PATH tag allows you to specify the directory where
+# the mscgen tool resides. If left empty the tool is assumed to be found in the
+# default search path.
+
+MSCGEN_PATH =
+
+# If set to YES, the inheritance and collaboration graphs will hide
+# inheritance and usage relations if the target is undocumented
+# or is not a class.
+
+HIDE_UNDOC_RELATIONS = NO
+
+# If you set the HAVE_DOT tag to YES then doxygen will assume the dot tool is
+# available from the path. This tool is part of Graphviz, a graph visualization
+# toolkit from AT&T and Lucent Bell Labs. The other options in this section
+# have no effect if this option is set to NO (the default)
+
+HAVE_DOT = YES
+
+# By default doxygen will write a font called FreeSans.ttf to the output
+# directory and reference it in all dot files that doxygen generates. This
+# font does not include all possible unicode characters however, so when you need
+# these (or just want a differently looking font) you can specify the font name
+# using DOT_FONTNAME. You need need to make sure dot is able to find the font,
+# which can be done by putting it in a standard location or by setting the
+# DOTFONTPATH environment variable or by setting DOT_FONTPATH to the directory
+# containing the font.
+
+DOT_FONTNAME = FreeSans
+
+# By default doxygen will tell dot to use the output directory to look for the
+# FreeSans.ttf font (which doxygen will put there itself). If you specify a
+# different font using DOT_FONTNAME you can set the path where dot
+# can find it using this tag.
+
+DOT_FONTPATH =
+
+# If the CLASS_GRAPH and HAVE_DOT tags are set to YES then doxygen
+# will generate a graph for each documented class showing the direct and
+# indirect inheritance relations. Setting this tag to YES will force the
+# the CLASS_DIAGRAMS tag to NO.
+
+CLASS_GRAPH = YES
+
+# If the COLLABORATION_GRAPH and HAVE_DOT tags are set to YES then doxygen
+# will generate a graph for each documented class showing the direct and
+# indirect implementation dependencies (inheritance, containment, and
+# class references variables) of the class with other documented classes.
+
+COLLABORATION_GRAPH = YES
+
+# If the GROUP_GRAPHS and HAVE_DOT tags are set to YES then doxygen
+# will generate a graph for groups, showing the direct groups dependencies
+
+GROUP_GRAPHS = YES
+
+# If the UML_LOOK tag is set to YES doxygen will generate inheritance and
+# collaboration diagrams in a style similar to the OMG's Unified Modeling
+# Language.
+
+UML_LOOK = NO
+
+# If set to YES, the inheritance and collaboration graphs will show the
+# relations between templates and their instances.
+
+TEMPLATE_RELATIONS = YES
+
+# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDE_GRAPH, and HAVE_DOT
+# tags are set to YES then doxygen will generate a graph for each documented
+# file showing the direct and indirect include dependencies of the file with
+# other documented files.
+
+INCLUDE_GRAPH = YES
+
+# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDED_BY_GRAPH, and
+# HAVE_DOT tags are set to YES then doxygen will generate a graph for each
+# documented header file showing the documented files that directly or
+# indirectly include this file.
+
+INCLUDED_BY_GRAPH = YES
+
+# If the CALL_GRAPH and HAVE_DOT options are set to YES then
+# doxygen will generate a call dependency graph for every global function
+# or class method. Note that enabling this option will significantly increase
+# the time of a run. So in most cases it will be better to enable call graphs
+# for selected functions only using the \callgraph command.
+
+CALL_GRAPH = NO
+
+# If the CALLER_GRAPH and HAVE_DOT tags are set to YES then
+# doxygen will generate a caller dependency graph for every global function
+# or class method. Note that enabling this option will significantly increase
+# the time of a run. So in most cases it will be better to enable caller
+# graphs for selected functions only using the \callergraph command.
+
+CALLER_GRAPH = NO
+
+# If the GRAPHICAL_HIERARCHY and HAVE_DOT tags are set to YES then doxygen
+# will graphical hierarchy of all classes instead of a textual one.
+
+GRAPHICAL_HIERARCHY = YES
+
+# If the DIRECTORY_GRAPH, SHOW_DIRECTORIES and HAVE_DOT tags are set to YES
+# then doxygen will show the dependencies a directory has on other directories
+# in a graphical way. The dependency relations are determined by the #include
+# relations between the files in the directories.
+
+DIRECTORY_GRAPH = YES
+
+# The DOT_IMAGE_FORMAT tag can be used to set the image format of the images
+# generated by dot. Possible values are png, jpg, or gif
+# If left blank png will be used.
+
+DOT_IMAGE_FORMAT = png
+
+# The tag DOT_PATH can be used to specify the path where the dot tool can be
+# found. If left blank, it is assumed the dot tool can be found in the path.
+
+DOT_PATH = @DOT@
+
+# The DOTFILE_DIRS tag can be used to specify one or more directories that
+# contain dot files that are included in the documentation (see the
+# \dotfile command).
+
+DOTFILE_DIRS =
+
+# The DOT_GRAPH_MAX_NODES tag can be used to set the maximum number of
+# nodes that will be shown in the graph. If the number of nodes in a graph
+# becomes larger than this value, doxygen will truncate the graph, which is
+# visualized by representing a node as a red box. Note that doxygen if the
+# number of direct children of the root node in a graph is already larger than
+# DOT_GRAPH_MAX_NODES then the graph will not be shown at all. Also note
+# that the size of a graph can be further restricted by MAX_DOT_GRAPH_DEPTH.
+
+DOT_GRAPH_MAX_NODES = 50
+
+# The MAX_DOT_GRAPH_DEPTH tag can be used to set the maximum depth of the
+# graphs generated by dot. A depth value of 3 means that only nodes reachable
+# from the root by following a path via at most 3 edges will be shown. Nodes
+# that lay further from the root node will be omitted. Note that setting this
+# option to 1 or 2 may greatly reduce the computation time needed for large
+# code bases. Also note that the size of a graph can be further restricted by
+# DOT_GRAPH_MAX_NODES. Using a depth of 0 means no depth restriction.
+
+MAX_DOT_GRAPH_DEPTH = 0
+
+# Set the DOT_TRANSPARENT tag to YES to generate images with a transparent
+# background. This is enabled by default, which results in a transparent
+# background. Warning: Depending on the platform used, enabling this option
+# may lead to badly anti-aliased labels on the edges of a graph (i.e. they
+# become hard to read).
+
+DOT_TRANSPARENT = YES
+
+# Set the DOT_MULTI_TARGETS tag to YES allow dot to generate multiple output
+# files in one run (i.e. multiple -o and -T options on the command line). This
+# makes dot run faster, but since only newer versions of dot (>1.8.10)
+# support this, this feature is disabled by default.
+
+DOT_MULTI_TARGETS = NO
+
+# If the GENERATE_LEGEND tag is set to YES (the default) Doxygen will
+# generate a legend page explaining the meaning of the various boxes and
+# arrows in the dot generated graphs.
+
+GENERATE_LEGEND = YES
+
+# If the DOT_CLEANUP tag is set to YES (the default) Doxygen will
+# remove the intermediate dot files that are used to generate
+# the various graphs.
+
+DOT_CLEANUP = YES
+
+#---------------------------------------------------------------------------
+# Configuration::additions related to the search engine
+#---------------------------------------------------------------------------
+
+# The SEARCHENGINE tag specifies whether or not a search engine should be
+# used. If set to NO the values of all tags below this one will be ignored.
+
+SEARCHENGINE = NO
Added: www-releases/trunk/2.8/docs/doxygen.css
URL: http://llvm.org/viewvc/llvm-project/www-releases/trunk/2.8/docs/doxygen.css?rev=115556&view=auto
==============================================================================
--- www-releases/trunk/2.8/docs/doxygen.css (added)
+++ www-releases/trunk/2.8/docs/doxygen.css Mon Oct 4 15:49:23 2010
@@ -0,0 +1,378 @@
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+ border-left-color: #E0E0E0;
+ border-top-style: none;
+ border-right-style: none;
+ border-bottom-style: none;
+ border-left-style: none;
+ background-color: #FAFAFA;
+ font-size: 80%;
+}
+.memTemplParams {
+ padding: 1px 0px 0px 8px;
+ margin: 4px;
+ border-top-width: 1px;
+ border-right-width: 1px;
+ border-bottom-width: 1px;
+ border-left-width: 1px;
+ border-top-color: #E0E0E0;
+ border-right-color: #E0E0E0;
+ border-bottom-color: #E0E0E0;
+ border-left-color: #E0E0E0;
+ border-top-style: solid;
+ border-right-style: none;
+ border-bottom-style: none;
+ border-left-style: none;
+ color: #606060;
+ background-color: #FAFAFA;
+ font-size: 80%;
+}
+.search { color: #003399;
+ font-weight: bold;
+}
+FORM.search {
+ margin-bottom: 0px;
+ margin-top: 0px;
+}
+INPUT.search { font-size: 75%;
+ color: #000080;
+ font-weight: normal;
+ background-color: #eeeeff;
+}
+TD.tiny { font-size: 75%;
+}
+a {
+ color: #252E78;
+}
+a:visited {
+ color: #3D2185;
+}
+.dirtab { padding: 4px;
+ border-collapse: collapse;
+ border: 1px solid #b0b0b0;
+}
+TH.dirtab { background: #eeeeff;
+ font-weight: bold;
+}
+HR { height: 1px;
+ border: none;
+ border-top: 1px solid black;
+}
+
+/*
+ * LLVM Modifications.
+ * Note: Everything above here is generated with "doxygen -w htlm" command. See
+ * "doxygen --help" for details. What follows are CSS overrides for LLVM
+ * specific formatting. We want to keep the above so it can be replaced with
+ * subsequent doxygen upgrades.
+ */
+
+.footer {
+ font-size: 80%;
+ font-weight: bold;
+ text-align: center;
+ vertical-align: middle;
+}
+.title {
+ font-size: 25pt;
+ color: black; background: url("../img/lines.gif");
+ font-weight: bold;
+ border-width: 1px;
+ border-style: solid none solid none;
+ text-align: center;
+ vertical-align: middle;
+ padding-left: 8pt;
+ padding-top: 1px;
+ padding-bottom: 2px
+}
+A:link {
+ cursor: pointer;
+ text-decoration: none;
+ font-weight: bolder;
+}
+A:visited {
+ cursor: pointer;
+ text-decoration: underline;
+ font-weight: bolder;
+}
+A:hover {
+ cursor: pointer;
+ text-decoration: underline;
+ font-weight: bolder;
+}
+A:active {
+ cursor: pointer;
+ text-decoration: underline;
+ font-weight: bolder;
+ font-style: italic;
+}
+H1 {
+ text-align: center;
+ font-size: 140%;
+ font-weight: bold;
+}
+H2 {
+ font-size: 120%;
+ font-style: italic;
+}
+H3 {
+ font-size: 100%;
+}
+A.qindex {}
+A.qindexRef {}
+A.el { text-decoration: none; font-weight: bold }
+A.elRef { font-weight: bold }
+A.code { text-decoration: none; font-weight: normal; color: #4444ee }
+A.codeRef { font-weight: normal; color: #4444ee }
Added: www-releases/trunk/2.8/docs/doxygen.footer
URL: http://llvm.org/viewvc/llvm-project/www-releases/trunk/2.8/docs/doxygen.footer?rev=115556&view=auto
==============================================================================
--- www-releases/trunk/2.8/docs/doxygen.footer (added)
+++ www-releases/trunk/2.8/docs/doxygen.footer Mon Oct 4 15:49:23 2010
@@ -0,0 +1,13 @@
+
+