From echristo at apple.com  Mon Oct 18 01:49:12 2010
From: echristo at apple.com (Eric Christopher)
Date: Mon, 18 Oct 2010 06:49:12 -0000
Subject: [llvm-commits] [llvm] r116698 -
	/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp
Message-ID: <20101018064912.6CB4D2A6C12C@llvm.org>

Author: echristo
Date: Mon Oct 18 01:49:12 2010
New Revision: 116698

URL: http://llvm.org/viewvc/llvm-project?rev=116698&view=rev
Log:
Remove the check for invalid calling conventions. Testing shows that they're
working just fine.

Modified:
    llvm/trunk/lib/Target/ARM/ARMFastISel.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=116698&r1=116697&r2=116698&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Mon Oct 18 01:49:12 2010
@@ -1518,11 +1518,8 @@
   // Check the calling convention.
   ImmutableCallSite CS(CI);
   CallingConv::ID CC = CS.getCallingConv();
+
   // TODO: Avoid some calling conventions?
-  if (CC != CallingConv::C) {
-    // errs() << "Can't handle calling convention: " << CC << "\n";
-    return false;
-  }
 
   // Let SDISel handle vararg functions.
   const PointerType *PT = cast<PointerType>(CS.getCalledValue()->getType());



From baldrick at free.fr  Mon Oct 18 03:13:47 2010
From: baldrick at free.fr (Duncan Sands)
Date: Mon, 18 Oct 2010 10:13:47 +0200
Subject: [llvm-commits] [llvm] r116665 - in /llvm/trunk:
 include/llvm/CodeGen/MachineModuleInfo.h lib/CodeGen/MachineModuleInfo.cpp
 lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
 lib/Target/X86/X86AsmPrinter.cpp test/CodeGen/X86/fltused.ll
In-Reply-To: <AANLkTinXpgcJFC3p8F+kpy0sXzpf9m5oCcWY3NjsOYEt@mail.gmail.com>
References: <20101016082541.4E3DB2A6C12C@llvm.org>	<4CB995C6.7060102@free.fr>
	<AANLkTinXpgcJFC3p8F+kpy0sXzpf9m5oCcWY3NjsOYEt@mail.gmail.com>
Message-ID: <4CBC01BB.3070804@free.fr>

Hi Michael,

>>> X86-Windows: Emit an undefined global __fltused symbol when targeting Windows
>>> if any floating point arguments are passed to an external function.
>>
>> why?
>
> Because the Microsoft C standard library requires it. If you don't
> printf("%f", 1.0); would fail via a call to abort. An unknown set of
> functions have this behavior.

thanks for the explanation.  If I understand right, this is only needed when
calling functions in the Microsoft C standard library, notably printf and
scanf but maybe others.

> You are correct about indirect calls. As for varargs, the test I added
> was explicitly for printf. The CallInst is the call-site. I only use
> the function type to avoid checking function calls which obviously
> cannot lead to library calls.

Yes, I misread your patch: I thought you were only checking the arguments of
the function type, but in fact you were indeed checking the callsite.

Ciao,

Duncan.

From kalle.raiskila at nokia.com  Mon Oct 18 04:34:19 2010
From: kalle.raiskila at nokia.com (Kalle Raiskila)
Date: Mon, 18 Oct 2010 09:34:19 -0000
Subject: [llvm-commits] [llvm] r116701 - in /llvm/trunk:
 lib/Target/CellSPU/SPUISelLowering.cpp test/CodeGen/CellSPU/sext128.ll
Message-ID: <20101018093419.E91BD2A6C12C@llvm.org>

Author: kraiskil
Date: Mon Oct 18 04:34:19 2010
New Revision: 116701

URL: http://llvm.org/viewvc/llvm-project?rev=116701&view=rev
Log:
Improve lowering of sext to i128 on SPU.
The old algorithm inserted a 'rotqmbyi' instruction which was
both redundant and wrong - it made shufb select bytes from the
wrong end of the input quad.

Modified:
    llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp
    llvm/trunk/test/CodeGen/CellSPU/sext128.ll

Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp?rev=116701&r1=116700&r2=116701&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Mon Oct 18 04:34:19 2010
@@ -2642,11 +2642,16 @@
                  DAG.getNode(SPUISD::PREFSLOT2VEC, dl, mvt, Op0, Op0),
                  DAG.getConstant(31, MVT::i32));
 
+  // reinterpret as a i128 (SHUFB requires it). This gets lowered away.
+  SDValue extended = SDValue(DAG.getMachineNode(TargetOpcode::COPY_TO_REGCLASS, 
+                                        dl, Op0VT, Op0,
+                                        DAG.getTargetConstant(
+                                                  SPU::GPRCRegClass.getID(), 
+                                                  MVT::i32)), 0);
   // Shuffle bytes - Copy the sign bits into the upper 64 bits
   // and the input value into the lower 64 bits.
   SDValue extShuffle = DAG.getNode(SPUISD::SHUFB, dl, mvt,
-      DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i128, Op0), sraVal, shufMask);
-
+        extended, sraVal, shufMask);
   return DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i128, extShuffle);
 }
 

Modified: llvm/trunk/test/CodeGen/CellSPU/sext128.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/sext128.ll?rev=116701&r1=116700&r2=116701&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/CellSPU/sext128.ll (original)
+++ llvm/trunk/test/CodeGen/CellSPU/sext128.ll Mon Oct 18 04:34:19 2010
@@ -12,6 +12,7 @@
 ; CHECK: 	long	269488144
 ; CHECK:	long	66051
 ; CHECK: 	long	67438087
+; CHECK-NOT: rotqmbyi
 ; CHECK: 	rotmai
 ; CHECK:	lqa
 ; CHECK:	shufb
@@ -25,6 +26,7 @@
 ; CHECK: 	long	269488144
 ; CHECK: 	long	269488144
 ; CHECK:	long	66051
+; CHECK-NOT: rotqmbyi
 ; CHECK: 	rotmai
 ; CHECK:	lqa
 ; CHECK:	shufb
@@ -39,6 +41,7 @@
 ; CHECK: 	long	269488144
 ; CHECK: 	long	269488144
 ; CHECK:	long	66051
+; CHECK-NOT: rotqmbyi
 ; CHECK: 	rotmai
 ; CHECK:	lqa
 ; CHECK:	shufb



From criswell at uiuc.edu  Mon Oct 18 11:18:05 2010
From: criswell at uiuc.edu (John Criswell)
Date: Mon, 18 Oct 2010 16:18:05 -0000
Subject: [llvm-commits] [poolalloc] r116708 -
 /poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp
Message-ID: <20101018161805.B0B8A2A6C12C@llvm.org>

Author: criswell
Date: Mon Oct 18 11:18:05 2010
New Revision: 116708

URL: http://llvm.org/viewvc/llvm-project?rev=116708&view=rev
Log:
Removed dead code.
Added a comment on why our calloc() handling is incorrect (I think).
No functionality changes.

Modified:
    poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp

Modified: poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp?rev=116708&r1=116707&r2=116708&view=diff
==============================================================================
--- poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp (original)
+++ poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp Mon Oct 18 11:18:05 2010
@@ -317,6 +317,13 @@
 }
 
 void FuncTransform::visitAllocaInst(AllocaInst &MI) {
+#if 0
+  if (MI.getType() != PoolAllocate::PoolDescPtrTy) {
+    Value *PH = getPoolHandle(&MI);
+    assert (PH && "Alloca has no pool handle!\n");
+  }
+#endif
+
   // FIXME: We should remove SAFECode-specific functionality (and comments)
   // SAFECode will register alloca instructions with the run-time, so do not
   // do that here.
@@ -450,6 +457,8 @@
   const Type* Int32Type = Type::getInt32Ty(CS.getInstruction()->getContext());
   const Type* Int64Type = Type::getInt64Ty(CS.getInstruction()->getContext());
 
+  // FIXME: This transform is not correct; calloc does not zero the memory
+  //        if NULL is returned.
   // FIXME: Ensure that we use 32/64-bit object length sizes consistently
   // FIXME: Rename 'useLong' to something more descriptive?
   // FIXME: Introduce 'ObjectAllocationSize' variable



From grosbach at apple.com  Mon Oct 18 11:29:26 2010
From: grosbach at apple.com (Jim Grosbach)
Date: Mon, 18 Oct 2010 16:29:26 -0000
Subject: [llvm-commits] [llvm] r116710 -
	/llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp
Message-ID: <20101018162926.455DB2A6C12D@llvm.org>

Author: grosbach
Date: Mon Oct 18 11:29:26 2010
New Revision: 116710

URL: http://llvm.org/viewvc/llvm-project?rev=116710&view=rev
Log:
Trivial grammar tweak.

Modified:
    llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp

Modified: llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp?rev=116710&r1=116709&r2=116710&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp (original)
+++ llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Mon Oct 18 11:29:26 2010
@@ -829,7 +829,7 @@
             ScratchReg = RS->scavengeRegister(RC, I, SPAdj);
             ++NumScavengedRegs;
           }
-          // replace this reference to the virtual register with the
+          // Replace this reference to the virtual register with the
           // scratch register.
           assert (ScratchReg && "Missing scratch register!");
           MI->getOperand(i).setReg(ScratchReg);



From rafael.espindola at gmail.com  Mon Oct 18 11:38:05 2010
From: rafael.espindola at gmail.com (Rafael Espindola)
Date: Mon, 18 Oct 2010 16:38:05 -0000
Subject: [llvm-commits] [llvm] r116711 - in /llvm/trunk:
 lib/MC/ELFObjectWriter.cpp test/MC/ELF/relocation-386.s
Message-ID: <20101018163805.102D02A6C12C@llvm.org>

Author: rafael
Date: Mon Oct 18 11:38:04 2010
New Revision: 116711

URL: http://llvm.org/viewvc/llvm-project?rev=116711&view=rev
Log:
Handle GOTOFF correctly on i386.

Added:
    llvm/trunk/test/MC/ELF/relocation-386.s
Modified:
    llvm/trunk/lib/MC/ELFObjectWriter.cpp

Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=116711&r1=116710&r2=116711&view=diff
==============================================================================
--- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original)
+++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Mon Oct 18 11:38:04 2010
@@ -556,17 +556,19 @@
   if (SD.isExternal())
     return true;
 
-  if (Section.getFlags() & MCSectionELF::SHF_MERGE)
-    return Target.getConstant() != 0;
-
   MCSymbolRefExpr::VariantKind Kind = Target.getSymA()->getKind();
   const MCSectionELF &Sec2 =
     static_cast<const MCSectionELF&>(F.getParent()->getSection());
 
   if (&Sec2 != &Section &&
-      (Kind == MCSymbolRefExpr::VK_PLT || Kind == MCSymbolRefExpr::VK_GOTPCREL))
+      (Kind == MCSymbolRefExpr::VK_PLT ||
+       Kind == MCSymbolRefExpr::VK_GOTPCREL ||
+       Kind == MCSymbolRefExpr::VK_GOTOFF))
     return true;
 
+  if (Section.getFlags() & MCSectionELF::SHF_MERGE)
+    return Target.getConstant() != 0;
+
   return false;
 }
 
@@ -663,7 +665,7 @@
         case MCSymbolRefExpr::VK_GOT:
           Type = ELF::R_X86_64_GOT32;
           break;
-        case llvm::MCSymbolRefExpr::VK_GOTPCREL:
+        case MCSymbolRefExpr::VK_GOTPCREL:
           Type = ELF::R_X86_64_GOTPCREL;
           break;
         default:
@@ -689,6 +691,14 @@
       // instead?
       case X86::reloc_signed_4byte:
       case X86::reloc_pcrel_4byte:
+        switch (Modifier) {
+        case MCSymbolRefExpr::VK_GOTOFF:
+          Type = ELF::R_386_GOTOFF;
+          break;
+        default:
+          llvm_unreachable("Unimplemented");
+        }
+        break;
       case FK_Data_4: Type = ELF::R_386_32; break;
       case FK_Data_2: Type = ELF::R_386_16; break;
       case X86::reloc_pcrel_1byte:

Added: llvm/trunk/test/MC/ELF/relocation-386.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/relocation-386.s?rev=116711&view=auto
==============================================================================
--- llvm/trunk/test/MC/ELF/relocation-386.s (added)
+++ llvm/trunk/test/MC/ELF/relocation-386.s Mon Oct 18 11:38:04 2010
@@ -0,0 +1,20 @@
+// RUN: llvm-mc -filetype=obj -triple i386-pc-linux-gnu %s -o - | elf-dump | FileCheck  %s
+
+// Test that we produce a GOTOFF and that the relocation uses the symbol and not
+// the section.
+
+
+// CHECK:      # Symbol 1
+// CHECK-NEXT: (('st_name', 5) # '.Lfoo'
+
+// CHECK:      # Relocation 0
+// CHECK-NEXT: (('r_offset', 2)
+// CHECK-NEXT:  ('r_sym', 1)
+// CHECK-NEXT:  ('r_type', 9)
+
+        .text
+bar:
+	leal	.Lfoo at GOTOFF(%ebx), %eax
+	.section	.rodata.str1.16,"aMS", at progbits,1
+.Lfoo:
+	.asciz	 "bool llvm::llvm_start_multithreaded()"



From grosbach at apple.com  Mon Oct 18 11:38:50 2010
From: grosbach at apple.com (Jim Grosbach)
Date: Mon, 18 Oct 2010 16:38:50 -0000
Subject: [llvm-commits] [llvm] r116712 -
	/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp
Message-ID: <20101018163850.BEBD52A6C12C@llvm.org>

Author: grosbach
Date: Mon Oct 18 11:38:50 2010
New Revision: 116712

URL: http://llvm.org/viewvc/llvm-project?rev=116712&view=rev
Log:
Grammar tweak.

Modified:
    llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp?rev=116712&r1=116711&r2=116712&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Mon Oct 18 11:38:50 2010
@@ -826,7 +826,7 @@
     }
 
     // If stack and double are 8-byte aligned and we are spilling an odd number
-    // of GPRs. Spill one extra callee save GPR so we won't have to pad between
+    // of GPRs, spill one extra callee save GPR so we won't have to pad between
     // the integer and double callee save areas.
     unsigned TargetAlign = MF.getTarget().getFrameInfo()->getStackAlignment();
     if (TargetAlign == 8 && (NumGPRSpills & 1)) {



From grosbach at apple.com  Mon Oct 18 11:48:59 2010
From: grosbach at apple.com (Jim Grosbach)
Date: Mon, 18 Oct 2010 16:48:59 -0000
Subject: [llvm-commits] [llvm] r116714 -
	/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp
Message-ID: <20101018164859.D0DF62A6C12C@llvm.org>

Author: grosbach
Date: Mon Oct 18 11:48:59 2010
New Revision: 116714

URL: http://llvm.org/viewvc/llvm-project?rev=116714&view=rev
Log:
ARM addrmode4 instructions (ldm, stm and friends) can't encode an immediate
offset for stack references. Make sure we take that into account when
deciding whether to reserver an emergency spill slot for the register
scavenger. rdar://8559625

Modified:
    llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp?rev=116714&r1=116713&r2=116714&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Mon Oct 18 11:48:59 2010
@@ -661,8 +661,9 @@
           if (hasFP(MF) && AFI->hasStackFrame())
             Limit = std::min(Limit, (1U << 8) - 1);
           break;
+        case ARMII::AddrMode4:
         case ARMII::AddrMode6:
-          // Addressing mode 6 (load/store) instructions can't encode an
+          // Addressing modes 4 & 6 (load/store) instructions can't encode an
           // immediate offset for stack references.
           return 0;
         default:



From rafael.espindola at gmail.com  Mon Oct 18 11:58:03 2010
From: rafael.espindola at gmail.com (Rafael Espindola)
Date: Mon, 18 Oct 2010 16:58:03 -0000
Subject: [llvm-commits] [llvm] r116715 - in /llvm/trunk:
 lib/MC/ELFObjectWriter.cpp test/MC/ELF/relocation-386.s
Message-ID: <20101018165803.758962A6C12C@llvm.org>

Author: rafael
Date: Mon Oct 18 11:58:03 2010
New Revision: 116715

URL: http://llvm.org/viewvc/llvm-project?rev=116715&view=rev
Log:
Produce a R_386_PLT32 when needed. Moved the default cases of switches to the
start for consistency.

Modified:
    llvm/trunk/lib/MC/ELFObjectWriter.cpp
    llvm/trunk/test/MC/ELF/relocation-386.s

Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=116715&r1=116714&r2=116715&view=diff
==============================================================================
--- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original)
+++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Mon Oct 18 11:58:03 2010
@@ -639,6 +639,8 @@
   if (Is64Bit) {
     if (IsPCRel) {
       switch (Modifier) {
+      default:
+        llvm_unreachable("Unimplemented");
       case MCSymbolRefExpr::VK_None:
         Type = ELF::R_X86_64_PC32;
         break;
@@ -648,8 +650,6 @@
       case llvm::MCSymbolRefExpr::VK_GOTPCREL:
         Type = ELF::R_X86_64_GOTPCREL;
         break;
-      default:
-        llvm_unreachable("Unimplemented");
       }
     } else {
       switch ((unsigned)Fixup.getKind()) {
@@ -659,6 +659,8 @@
       case X86::reloc_pcrel_4byte:
         assert(isInt<32>(Target.getConstant()));
         switch (Modifier) {
+        default:
+          llvm_unreachable("Unimplemented");
         case MCSymbolRefExpr::VK_None:
           Type = ELF::R_X86_64_32S;
           break;
@@ -668,8 +670,6 @@
         case MCSymbolRefExpr::VK_GOTPCREL:
           Type = ELF::R_X86_64_GOTPCREL;
           break;
-        default:
-          llvm_unreachable("Unimplemented");
         }
         break;
       case FK_Data_4:
@@ -682,7 +682,13 @@
     }
   } else {
     if (IsPCRel) {
-      Type = ELF::R_386_PC32;
+      switch (Modifier) {
+      default:
+        llvm_unreachable("Unimplemented");
+      case MCSymbolRefExpr::VK_PLT:
+        Type = ELF::R_386_PLT32;
+        break;
+      }
     } else {
       switch ((unsigned)Fixup.getKind()) {
       default: llvm_unreachable("invalid fixup kind!");
@@ -692,11 +698,11 @@
       case X86::reloc_signed_4byte:
       case X86::reloc_pcrel_4byte:
         switch (Modifier) {
+        default:
+          llvm_unreachable("Unimplemented");
         case MCSymbolRefExpr::VK_GOTOFF:
           Type = ELF::R_386_GOTOFF;
           break;
-        default:
-          llvm_unreachable("Unimplemented");
         }
         break;
       case FK_Data_4: Type = ELF::R_386_32; break;

Modified: llvm/trunk/test/MC/ELF/relocation-386.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/relocation-386.s?rev=116715&r1=116714&r2=116715&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/relocation-386.s (original)
+++ llvm/trunk/test/MC/ELF/relocation-386.s Mon Oct 18 11:58:03 2010
@@ -1,7 +1,7 @@
 // RUN: llvm-mc -filetype=obj -triple i386-pc-linux-gnu %s -o - | elf-dump | FileCheck  %s
 
-// Test that we produce a GOTOFF and that the relocation uses the symbol and not
-// the section.
+// Test that we produce the correct relocation types and that the relocation
+// to .Lfoo uses the symbol and not the section.
 
 
 // CHECK:      # Symbol 1
@@ -11,10 +11,20 @@
 // CHECK-NEXT: (('r_offset', 2)
 // CHECK-NEXT:  ('r_sym', 1)
 // CHECK-NEXT:  ('r_type', 9)
+// CHECK-NEXT: ),
+// CHECK-NEXT:  # Relocation 1
+// CHECK-NEXT: (('r_offset',
+// CHECK-NEXT:  ('r_sym',
+// CHECK-NEXT:  ('r_type', 4)
 
         .text
 bar:
 	leal	.Lfoo at GOTOFF(%ebx), %eax
-	.section	.rodata.str1.16,"aMS", at progbits,1
+
+        .global bar2
+bar2:
+	calll	bar2 at PLT
+
+        .section	.rodata.str1.16,"aMS", at progbits,1
 .Lfoo:
 	.asciz	 "bool llvm::llvm_start_multithreaded()"



From enderby at apple.com  Mon Oct 18 12:04:36 2010
From: enderby at apple.com (Kevin Enderby)
Date: Mon, 18 Oct 2010 17:04:36 -0000
Subject: [llvm-commits] [llvm] r116716 - in /llvm/trunk:
 lib/Target/X86/AsmParser/X86AsmParser.cpp lib/Target/X86/X86InstrControl.td
 lib/Target/X86/X86InstrInfo.td test/MC/X86/x86-32.s test/MC/X86/x86-64.s
Message-ID: <20101018170436.E6CF52A6C12C@llvm.org>

Author: enderby
Date: Mon Oct 18 12:04:36 2010
New Revision: 116716

URL: http://llvm.org/viewvc/llvm-project?rev=116716&view=rev
Log:
Added a handful of x86-32 instructions that were missing so that llvm-mc would
be more complete.  These are only expected to be used by llvm-mc with assembly
source so there is no pattern, [], in the .td files.  Most are being added to
X86InstrInfo.td as Chris suggested and only comments about register uses are
added.  Suggestions welcome on the .td changes as I'm not sure on every detail
of the x86 records.  More missing instructions will be coming.

Modified:
    llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
    llvm/trunk/lib/Target/X86/X86InstrControl.td
    llvm/trunk/lib/Target/X86/X86InstrInfo.td
    llvm/trunk/test/MC/X86/x86-32.s
    llvm/trunk/test/MC/X86/x86-64.s

Modified: llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp?rev=116716&r1=116715&r2=116716&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp (original)
+++ llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp Mon Oct 18 12:04:36 2010
@@ -1082,6 +1082,13 @@
     Operands[0] = X86Operand::CreateToken("xor", NameLoc);
   }
 
+  // FIXME: Hack to handle recognize "aa[dm]" -> "aa[dm] $0xA".
+  if ((Name.startswith("aad") || Name.startswith("aam")) &&
+      Operands.size() == 1) {
+    const MCExpr *A = MCConstantExpr::Create(0xA, getParser().getContext());
+    Operands.push_back(X86Operand::CreateImm(A, NameLoc, NameLoc));
+  }
+
   return false;
 }
 

Modified: llvm/trunk/lib/Target/X86/X86InstrControl.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrControl.td?rev=116716&r1=116715&r2=116716&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrControl.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrControl.td Mon Oct 18 12:04:36 2010
@@ -24,10 +24,15 @@
   def RETI   : Ii16<0xC2, RawFrm, (outs), (ins i16imm:$amt, variable_ops),
                     "ret\t$amt",
                     [(X86retflag timm:$amt)]>;
+  def RETIW  : Ii16<0xC2, RawFrm, (outs), (ins i16imm:$amt, variable_ops),
+                    "retw\t$amt",
+                    [(X86retflag timm:$amt)]>, OpSize;
   def LRET   : I   <0xCB, RawFrm, (outs), (ins),
                     "lret", []>;
   def LRETI  : Ii16<0xCA, RawFrm, (outs), (ins i16imm:$amt),
                     "lret\t$amt", []>;
+  def LRETIW : Ii16<0xCA, RawFrm, (outs), (ins i16imm:$amt),
+                    "lretw\t$amt", []>, OpSize;
 }
 
 // Unconditional branches.

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=116716&r1=116715&r2=116716&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Mon Oct 18 12:04:36 2010
@@ -1182,7 +1182,45 @@
 // Table lookup instructions
 def XLAT : I<0xD7, RawFrm, (outs), (ins), "xlatb", []>;
 
-
+// ASCII Adjust After Addition
+// sets AL, AH and CF and AF of EFLAGS and uses AL and AF of EFLAGS
+def AAA : I<0x37, RawFrm, (outs), (ins), "aaa", []>, Requires<[In32BitMode]>;
+
+// ASCII Adjust AX Before Division
+// sets AL, AH and EFLAGS and uses AL and AH
+def AAD8i8 : Ii8<0xD5, RawFrm, (outs), (ins i8imm:$src),
+                 "aad\t$src", []>, Requires<[In32BitMode]>;
+
+// ASCII Adjust AX After Multiply
+// sets AL, AH and EFLAGS and uses AL
+def AAM8i8 : Ii8<0xD4, RawFrm, (outs), (ins i8imm:$src),
+                 "aam\t$src", []>, Requires<[In32BitMode]>;
+
+// ASCII Adjust AL After Subtraction - sets 
+// sets AL, AH and CF and AF of EFLAGS and uses AL and AF of EFLAGS
+def AAS : I<0x3F, RawFrm, (outs), (ins), "aas", []>, Requires<[In32BitMode]>;
+
+// Decimal Adjust AL after Addition
+// sets AL, CF and AF of EFLAGS and uses AL, CF and AF of EFLAGS
+def DAA : I<0x27, RawFrm, (outs), (ins), "daa", []>, Requires<[In32BitMode]>;
+
+// Decimal Adjust AL after Subtraction
+// sets AL, CF and AF of EFLAGS and uses AL, CF and AF of EFLAGS
+def DAS : I<0x2F, RawFrm, (outs), (ins), "das", []>, Requires<[In32BitMode]>;
+
+// Check Array Index Against Bounds
+def BOUNDS16rm : I<0x62, MRMSrcMem, (outs GR16:$dst), (ins i16mem:$src),
+                   "bound\t{$src, $dst|$dst, $src}", []>, OpSize,
+                   Requires<[In32BitMode]>; 
+def BOUNDS32rm : I<0x62, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src),
+                   "bound\t{$src, $dst|$dst, $src}", []>,
+                   Requires<[In32BitMode]>; 
+
+// Adjust RPL Field of Segment Selector
+def ARPL16rr : I<0x63, MRMDestReg, (outs GR16:$src), (ins GR16:$dst),
+                 "arpl\t{$src, $dst|$dst, $src}", []>, Requires<[In32BitMode]>; 
+def ARPL16mr : I<0x63, MRMSrcMem, (outs GR16:$src), (ins i16mem:$dst),
+                 "arpl\t{$src, $dst|$dst, $src}", []>, Requires<[In32BitMode]>; 
 
 //===----------------------------------------------------------------------===//
 // Subsystems.

Modified: llvm/trunk/test/MC/X86/x86-32.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86-32.s?rev=116716&r1=116715&r2=116716&view=diff
==============================================================================
--- llvm/trunk/test/MC/X86/x86-32.s (original)
+++ llvm/trunk/test/MC/X86/x86-32.s Mon Oct 18 12:04:36 2010
@@ -590,3 +590,67 @@
 // PR8288
 pshufw $90, %mm4, %mm0
 
+// rdar://8416805
+// CHECK: aaa
+// CHECK:  encoding: [0x37]
+        	aaa
+
+// CHECK: aad	$1
+// CHECK:  encoding: [0xd5,0x01]
+        	aad	$1
+
+// CHECK: aad	$10
+// CHECK:  encoding: [0xd5,0x0a]
+        	aad	$0xA
+
+// CHECK: aad	$10
+// CHECK:  encoding: [0xd5,0x0a]
+        	aad
+
+// CHECK: aam	$2
+// CHECK:  encoding: [0xd4,0x02]
+        	aam	$2
+
+// CHECK: aam	$10
+// CHECK:  encoding: [0xd4,0x0a]
+        	aam	$0xA
+
+// CHECK: aam	$10
+// CHECK:  encoding: [0xd4,0x0a]
+        	aam
+
+// CHECK: aas
+// CHECK:  encoding: [0x3f]
+        	aas
+
+// CHECK: daa
+// CHECK:  encoding: [0x27]
+        	daa
+
+// CHECK: das
+// CHECK:  encoding: [0x2f]
+        	das
+
+// CHECK: retw	$31438
+// CHECK:  encoding: [0x66,0xc2,0xce,0x7a]
+        	retw	$0x7ace
+
+// CHECK: lretw	$31438
+// CHECK:  encoding: [0x66,0xca,0xce,0x7a]
+        	lretw	$0x7ace
+
+// CHECK: bound	2(%eax), %bx
+// CHECK:  encoding: [0x66,0x62,0x58,0x02]
+        	bound	2(%eax),%bx
+
+// CHECK: bound	4(%ebx), %ecx
+// CHECK:  encoding: [0x62,0x4b,0x04]
+        	bound	4(%ebx),%ecx
+
+// CHECK: arpl	%bx, %bx
+// CHECK:  encoding: [0x63,0xdb]
+        	arpl	%bx,%bx
+
+// CHECK: arpl	%bx, 6(%ecx)
+// CHECK:  encoding: [0x63,0x59,0x06]
+        	arpl	%bx,6(%ecx)

Modified: llvm/trunk/test/MC/X86/x86-64.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86-64.s?rev=116716&r1=116715&r2=116716&view=diff
==============================================================================
--- llvm/trunk/test/MC/X86/x86-64.s (original)
+++ llvm/trunk/test/MC/X86/x86-64.s Mon Oct 18 12:04:36 2010
@@ -714,6 +714,15 @@
 // CHECK: iretq
 // CHECK: encoding: [0x48,0xcf]
 
+// rdar://8416805
+// CHECK: retw	$31438
+// CHECK:  encoding: [0x66,0xc2,0xce,0x7a]
+        	retw	$0x7ace
+
+// CHECK: lretw	$31438
+// CHECK:  encoding: [0x66,0xca,0xce,0x7a]
+        	lretw	$0x7ace
+
 // rdar://8403907
 sysret
 // CHECK: sysretl



From rafael.espindola at gmail.com  Mon Oct 18 13:03:28 2010
From: rafael.espindola at gmail.com (Rafael Espindola)
Date: Mon, 18 Oct 2010 18:03:28 -0000
Subject: [llvm-commits] [llvm] r116719 -
	/llvm/trunk/lib/MC/ELFObjectWriter.cpp
Message-ID: <20101018180328.8275C2A6C12C@llvm.org>

Author: rafael
Date: Mon Oct 18 13:03:28 2010
New Revision: 116719

URL: http://llvm.org/viewvc/llvm-project?rev=116719&view=rev
Log:
Make the bots happy.

Modified:
    llvm/trunk/lib/MC/ELFObjectWriter.cpp

Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=116719&r1=116718&r2=116719&view=diff
==============================================================================
--- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original)
+++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Mon Oct 18 13:03:28 2010
@@ -684,7 +684,9 @@
     if (IsPCRel) {
       switch (Modifier) {
       default:
-        llvm_unreachable("Unimplemented");
+        Type = ELF::R_386_PC32;
+        //llvm_unreachable("Unimplemented");
+        break;
       case MCSymbolRefExpr::VK_PLT:
         Type = ELF::R_386_PLT32;
         break;



From gohman at apple.com  Mon Oct 18 13:04:48 2010
From: gohman at apple.com (Dan Gohman)
Date: Mon, 18 Oct 2010 18:04:48 -0000
Subject: [llvm-commits] [llvm] r116720 - in /llvm/trunk:
 include/llvm/Support/ lib/Analysis/ lib/CodeGen/ test/Analysis/BasicAA/
 test/Analysis/GlobalsModRef/ test/Analysis/LoopDependenceAnalysis/
 test/Analysis/TypeBasedAliasAnalysis/ test/Other/
 test/Transforms/ArgumentPromotion/ test/Transforms/DeadStoreElimination/
 test/Transforms/GVN/ test/Transforms/Inline/ test/Transforms/LICM/
 test/Transforms/MemCpyOpt/ test/Transforms/Sink/
Message-ID: <20101018180449.02B6E2A6C12C@llvm.org>

Author: djg
Date: Mon Oct 18 13:04:47 2010
New Revision: 116720

URL: http://llvm.org/viewvc/llvm-project?rev=116720&view=rev
Log:
Make BasicAliasAnalysis a normal AliasAnalysis implementation which
does normal initialization and normal chaining. Change the default
AliasAnalysis implementation to NoAlias.

Update StandardCompileOpts.h and friends to explicitly request
BasicAliasAnalysis.

Update tests to explicitly request -basicaa.

Modified:
    llvm/trunk/include/llvm/Support/StandardPasses.h
    llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp
    llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp
    llvm/trunk/test/Analysis/BasicAA/2003-02-26-AccessSizeTest.ll
    llvm/trunk/test/Analysis/BasicAA/2003-04-22-GEPProblem.ll
    llvm/trunk/test/Analysis/BasicAA/2003-05-21-GEP-Problem.ll
    llvm/trunk/test/Analysis/BasicAA/2003-09-19-LocalArgument.ll
    llvm/trunk/test/Analysis/BasicAA/2003-11-04-SimpleCases.ll
    llvm/trunk/test/Analysis/BasicAA/2003-12-11-ConstExprGEP.ll
    llvm/trunk/test/Analysis/BasicAA/2004-07-28-MustAliasbug.ll
    llvm/trunk/test/Analysis/BasicAA/2004-12-08-BasicAACrash.ll
    llvm/trunk/test/Analysis/BasicAA/2004-12-08-BasicAACrash2.ll
    llvm/trunk/test/Analysis/BasicAA/2006-03-03-BadArraySubscript.ll
    llvm/trunk/test/Analysis/BasicAA/2006-11-03-BasicAAVectorCrash.ll
    llvm/trunk/test/Analysis/BasicAA/2007-11-05-SizeCrash.ll
    llvm/trunk/test/Analysis/BasicAA/2007-12-08-OutOfBoundsCrash.ll
    llvm/trunk/test/Analysis/BasicAA/2008-06-02-GEPTailCrash.ll
    llvm/trunk/test/Analysis/BasicAA/2008-11-23-NoaliasRet.ll
    llvm/trunk/test/Analysis/BasicAA/2009-10-13-AtomicModRef.ll
    llvm/trunk/test/Analysis/BasicAA/2009-10-13-GEP-BaseNoAlias.ll
    llvm/trunk/test/Analysis/BasicAA/args-rets-allocas-loads.ll
    llvm/trunk/test/Analysis/BasicAA/byval.ll
    llvm/trunk/test/Analysis/BasicAA/constant-over-index.ll
    llvm/trunk/test/Analysis/BasicAA/empty.ll
    llvm/trunk/test/Analysis/BasicAA/gep-alias.ll
    llvm/trunk/test/Analysis/BasicAA/getmodrefinfo-cs-cs.ll
    llvm/trunk/test/Analysis/BasicAA/phi-and-select.ll
    llvm/trunk/test/Analysis/BasicAA/unreachable-block.ll
    llvm/trunk/test/Analysis/GlobalsModRef/aliastest.ll
    llvm/trunk/test/Analysis/GlobalsModRef/chaining-analysis.ll
    llvm/trunk/test/Analysis/GlobalsModRef/indirect-global.ll
    llvm/trunk/test/Analysis/GlobalsModRef/modreftest.ll
    llvm/trunk/test/Analysis/LoopDependenceAnalysis/alias.ll
    llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-strong.ll
    llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-weak-crossing.ll
    llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-weak-zero.ll
    llvm/trunk/test/Analysis/LoopDependenceAnalysis/ziv.ll
    llvm/trunk/test/Analysis/TypeBasedAliasAnalysis/aliastest.ll
    llvm/trunk/test/Other/lint.ll
    llvm/trunk/test/Transforms/ArgumentPromotion/basictest.ll
    llvm/trunk/test/Transforms/DeadStoreElimination/2008-07-28-load-store.ll
    llvm/trunk/test/Transforms/DeadStoreElimination/PartialStore.ll
    llvm/trunk/test/Transforms/DeadStoreElimination/const-pointers.ll
    llvm/trunk/test/Transforms/DeadStoreElimination/context-sensitive.ll
    llvm/trunk/test/Transforms/DeadStoreElimination/free.ll
    llvm/trunk/test/Transforms/DeadStoreElimination/lifetime.ll
    llvm/trunk/test/Transforms/DeadStoreElimination/no-targetdata.ll
    llvm/trunk/test/Transforms/DeadStoreElimination/simple.ll
    llvm/trunk/test/Transforms/GVN/2007-07-25-InfiniteLoop.ll
    llvm/trunk/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll
    llvm/trunk/test/Transforms/GVN/2007-07-31-NoDomInherit.ll
    llvm/trunk/test/Transforms/GVN/2007-07-31-RedundantPhi.ll
    llvm/trunk/test/Transforms/GVN/2008-07-02-Unreachable.ll
    llvm/trunk/test/Transforms/GVN/2010-03-31-RedundantPHIs.ll
    llvm/trunk/test/Transforms/GVN/calls-nonlocal.ll
    llvm/trunk/test/Transforms/GVN/condprop.ll
    llvm/trunk/test/Transforms/GVN/invariant-simple.ll
    llvm/trunk/test/Transforms/GVN/lifetime-simple.ll
    llvm/trunk/test/Transforms/GVN/load-constant-mem.ll
    llvm/trunk/test/Transforms/GVN/load-pre-licm.ll
    llvm/trunk/test/Transforms/GVN/lpre-call-wrap-2.ll
    llvm/trunk/test/Transforms/GVN/mixed.ll
    llvm/trunk/test/Transforms/GVN/nonescaping-malloc.ll
    llvm/trunk/test/Transforms/GVN/null-aliases-nothing.ll
    llvm/trunk/test/Transforms/GVN/pre-load.ll
    llvm/trunk/test/Transforms/GVN/rle-must-alias.ll
    llvm/trunk/test/Transforms/GVN/rle-nonlocal.ll
    llvm/trunk/test/Transforms/GVN/rle-semidominated.ll
    llvm/trunk/test/Transforms/GVN/rle.ll
    llvm/trunk/test/Transforms/Inline/devirtualize-3.ll
    llvm/trunk/test/Transforms/Inline/devirtualize.ll
    llvm/trunk/test/Transforms/Inline/gvn-inline-iteration.ll
    llvm/trunk/test/Transforms/LICM/2008-07-22-LoadGlobalConstant.ll
    llvm/trunk/test/Transforms/LICM/scalar_promote.ll
    llvm/trunk/test/Transforms/MemCpyOpt/2008-02-24-MultipleUseofSRet.ll
    llvm/trunk/test/Transforms/MemCpyOpt/2008-03-13-ReturnSlotBitcast.ll
    llvm/trunk/test/Transforms/MemCpyOpt/loadstore-sret.ll
    llvm/trunk/test/Transforms/MemCpyOpt/memcpy.ll
    llvm/trunk/test/Transforms/MemCpyOpt/memmove.ll
    llvm/trunk/test/Transforms/MemCpyOpt/sret.ll
    llvm/trunk/test/Transforms/Sink/basic.ll

Modified: llvm/trunk/include/llvm/Support/StandardPasses.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/StandardPasses.h?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/StandardPasses.h (original)
+++ llvm/trunk/include/llvm/Support/StandardPasses.h Mon Oct 18 13:04:47 2010
@@ -72,6 +72,7 @@
   static inline void createStandardFunctionPasses(PassManagerBase *PM,
                                                   unsigned OptimizationLevel) {
     if (OptimizationLevel > 0) {
+      PM->add(createBasicAliasAnalysisPass());
       PM->add(createCFGSimplificationPass());
       if (OptimizationLevel == 1)
         PM->add(createPromoteMemoryToRegisterPass());
@@ -91,6 +92,8 @@
                                                 bool SimplifyLibCalls,
                                                 bool HaveExceptions,
                                                 Pass *InliningPass) {
+    PM->add(createBasicAliasAnalysisPass());
+
     if (OptimizationLevel == 0) {
       if (InliningPass)
         PM->add(InliningPass);
@@ -177,6 +180,9 @@
                                              bool Internalize,
                                              bool RunInliner,
                                              bool VerifyEach) {
+    // Provide AliasAnalysis services for optimizations.
+    PM->add(createBasicAliasAnalysisPass());
+
     // Now that composite has been compiled, scan through the module, looking
     // for a main function.  If main is defined, mark all other functions
     // internal.

Modified: llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp Mon Oct 18 13:04:47 2010
@@ -190,7 +190,7 @@
 char NoAA::ID = 0;
 INITIALIZE_AG_PASS(NoAA, AliasAnalysis, "no-aa",
                    "No Alias Analysis (always returns 'may' alias)",
-                   true, true, false)
+                   true, true, true)
 
 ImmutablePass *llvm::createNoAAPass() { return new NoAA(); }
 
@@ -492,6 +492,14 @@
     static char ID; // Class identification, replacement for typeinfo
     BasicAliasAnalysis() : NoAA(ID) {}
 
+    virtual void initializePass() {
+      InitializeAliasAnalysis(this);
+    }
+
+    virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+      AU.addRequired<AliasAnalysis>();
+    }
+
     virtual AliasResult alias(const Location &LocA,
                               const Location &LocB) {
       assert(Visited.empty() && "Visited must be cleared after use!");
@@ -561,7 +569,7 @@
 char BasicAliasAnalysis::ID = 0;
 INITIALIZE_AG_PASS(BasicAliasAnalysis, AliasAnalysis, "basicaa",
                    "Basic Alias Analysis (default AA impl)",
-                   false, true, true)
+                   false, true, false)
 
 ImmutablePass *llvm::createBasicAliasAnalysisPass() {
   return new BasicAliasAnalysis();
@@ -578,7 +586,7 @@
     // GV may even be a declaration, not a definition.
     return GV->isConstant();
 
-  return NoAA::pointsToConstantMemory(Loc);
+  return AliasAnalysis::pointsToConstantMemory(Loc);
 }
 
 /// getModRefBehavior - Return the behavior when calling the given call site.
@@ -611,7 +619,7 @@
   if (unsigned id = F->getIntrinsicID())
     return getIntrinsicModRefBehavior(id);
 
-  return NoAA::getModRefBehavior(F);
+  return AliasAnalysis::getModRefBehavior(F);
 }
 
 /// getModRefInfo - Check to see if the specified callsite can clobber the
@@ -1065,24 +1073,30 @@
     std::swap(V1Size, V2Size);
     std::swap(O1, O2);
   }
-  if (const GEPOperator *GV1 = dyn_cast<GEPOperator>(V1))
-    return aliasGEP(GV1, V1Size, V2, V2Size, O1, O2);
+  if (const GEPOperator *GV1 = dyn_cast<GEPOperator>(V1)) {
+    AliasResult Result = aliasGEP(GV1, V1Size, V2, V2Size, O1, O2);
+    if (Result != MayAlias) return Result;
+  }
 
   if (isa<PHINode>(V2) && !isa<PHINode>(V1)) {
     std::swap(V1, V2);
     std::swap(V1Size, V2Size);
   }
-  if (const PHINode *PN = dyn_cast<PHINode>(V1))
-    return aliasPHI(PN, V1Size, V2, V2Size);
+  if (const PHINode *PN = dyn_cast<PHINode>(V1)) {
+    AliasResult Result = aliasPHI(PN, V1Size, V2, V2Size);
+    if (Result != MayAlias) return Result;
+  }
 
   if (isa<SelectInst>(V2) && !isa<SelectInst>(V1)) {
     std::swap(V1, V2);
     std::swap(V1Size, V2Size);
   }
-  if (const SelectInst *S1 = dyn_cast<SelectInst>(V1))
-    return aliasSelect(S1, V1Size, V2, V2Size);
+  if (const SelectInst *S1 = dyn_cast<SelectInst>(V1)) {
+    AliasResult Result = aliasSelect(S1, V1Size, V2, V2Size);
+    if (Result != MayAlias) return Result;
+  }
 
-  return NoAA::alias(Location(V1, V1Size), Location(V2, V2Size));
+  return AliasAnalysis::alias(Location(V1, V1Size), Location(V2, V2Size));
 }
 
 // Make sure that anything that uses AliasAnalysis pulls in this file.

Modified: llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp (original)
+++ llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp Mon Oct 18 13:04:47 2010
@@ -14,6 +14,7 @@
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/PassManager.h"
 #include "llvm/Analysis/Verifier.h"
+#include "llvm/Analysis/Passes.h"
 #include "llvm/Assembly/PrintModulePass.h"
 #include "llvm/CodeGen/AsmPrinter.h"
 #include "llvm/CodeGen/MachineFunctionAnalysis.h"
@@ -254,6 +255,9 @@
                                                MCContext *&OutContext) {
   // Standard LLVM-Level Passes.
 
+  // Basic AliasAnalysis support.
+  PM.add(createBasicAliasAnalysisPass());
+
   // Before running any passes, run the verifier to determine if the input
   // coming from the front-end and/or optimizer is valid.
   if (!DisableVerify)

Modified: llvm/trunk/test/Analysis/BasicAA/2003-02-26-AccessSizeTest.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/BasicAA/2003-02-26-AccessSizeTest.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/BasicAA/2003-02-26-AccessSizeTest.ll (original)
+++ llvm/trunk/test/Analysis/BasicAA/2003-02-26-AccessSizeTest.ll Mon Oct 18 13:04:47 2010
@@ -2,7 +2,7 @@
 ; is performed.  It is not legal to delete the second load instruction because
 ; the value computed by the first load instruction is changed by the store.
 
-; RUN: opt < %s -gvn -instcombine -S | grep DONOTREMOVE
+; RUN: opt < %s -basicaa -gvn -instcombine -S | grep DONOTREMOVE
 
 define i32 @test() {
 	%A = alloca i32

Modified: llvm/trunk/test/Analysis/BasicAA/2003-04-22-GEPProblem.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/BasicAA/2003-04-22-GEPProblem.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/BasicAA/2003-04-22-GEPProblem.ll (original)
+++ llvm/trunk/test/Analysis/BasicAA/2003-04-22-GEPProblem.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -gvn -instcombine -S | grep sub
+; RUN: opt < %s -basicaa -gvn -instcombine -S | grep sub
 
 ; BasicAA was incorrectly concluding that P1 and P2 didn't conflict!
 

Modified: llvm/trunk/test/Analysis/BasicAA/2003-05-21-GEP-Problem.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/BasicAA/2003-05-21-GEP-Problem.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/BasicAA/2003-05-21-GEP-Problem.ll (original)
+++ llvm/trunk/test/Analysis/BasicAA/2003-05-21-GEP-Problem.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -licm -disable-output
+; RUN: opt < %s -basicaa -licm -disable-output
 	%struct..apr_array_header_t = type { i32*, i32, i32, i32, i8* }
 	%struct..apr_table_t = type { %struct..apr_array_header_t, i32, [32 x i32], [32 x i32] }
 

Modified: llvm/trunk/test/Analysis/BasicAA/2003-09-19-LocalArgument.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/BasicAA/2003-09-19-LocalArgument.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/BasicAA/2003-09-19-LocalArgument.ll (original)
+++ llvm/trunk/test/Analysis/BasicAA/2003-09-19-LocalArgument.ll Mon Oct 18 13:04:47 2010
@@ -1,6 +1,6 @@
 ; In this test, a local alloca cannot alias an incoming argument.
 
-; RUN: opt < %s -gvn -instcombine -S | not grep sub
+; RUN: opt < %s -basicaa -gvn -instcombine -S | not grep sub
 
 define i32 @test(i32* %P) {
 	%X = alloca i32

Modified: llvm/trunk/test/Analysis/BasicAA/2003-11-04-SimpleCases.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/BasicAA/2003-11-04-SimpleCases.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/BasicAA/2003-11-04-SimpleCases.ll (original)
+++ llvm/trunk/test/Analysis/BasicAA/2003-11-04-SimpleCases.ll Mon Oct 18 13:04:47 2010
@@ -1,7 +1,7 @@
 ; This testcase consists of alias relations which should be completely
 ; resolvable by basicaa.
 
-; RUN: opt < %s -aa-eval -print-may-aliases -disable-output \
+; RUN: opt < %s -basicaa -aa-eval -print-may-aliases -disable-output \
 ; RUN: |& not grep May:
 
 %T = type { i32, [10 x i8] }

Modified: llvm/trunk/test/Analysis/BasicAA/2003-12-11-ConstExprGEP.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/BasicAA/2003-12-11-ConstExprGEP.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/BasicAA/2003-12-11-ConstExprGEP.ll (original)
+++ llvm/trunk/test/Analysis/BasicAA/2003-12-11-ConstExprGEP.ll Mon Oct 18 13:04:47 2010
@@ -1,7 +1,7 @@
 ; This testcase consists of alias relations which should be completely
 ; resolvable by basicaa, but require analysis of getelementptr constant exprs.
 
-; RUN: opt < %s -aa-eval -print-may-aliases -disable-output \
+; RUN: opt < %s -basicaa -aa-eval -print-may-aliases -disable-output \
 ; RUN: |& not grep May:
 
 %T = type { i32, [10 x i8] }

Modified: llvm/trunk/test/Analysis/BasicAA/2004-07-28-MustAliasbug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/BasicAA/2004-07-28-MustAliasbug.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/BasicAA/2004-07-28-MustAliasbug.ll (original)
+++ llvm/trunk/test/Analysis/BasicAA/2004-07-28-MustAliasbug.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -dse -S | grep {store i32 0}
+; RUN: opt < %s -basicaa -dse -S | grep {store i32 0}
 
 define void @test({i32,i32 }* %P) {
 	%Q = getelementptr {i32,i32}* %P, i32 1

Modified: llvm/trunk/test/Analysis/BasicAA/2004-12-08-BasicAACrash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/BasicAA/2004-12-08-BasicAACrash.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/BasicAA/2004-12-08-BasicAACrash.ll (original)
+++ llvm/trunk/test/Analysis/BasicAA/2004-12-08-BasicAACrash.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -licm
+; RUN: opt < %s -basicaa -licm
 
 %"java/lang/Object" = type { %struct.llvm_java_object_base }
 %"java/lang/StringBuffer" = type { "java/lang/Object", i32, { "java/lang/Object", i32, [0 x i8] }*, i1 }

Modified: llvm/trunk/test/Analysis/BasicAA/2004-12-08-BasicAACrash2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/BasicAA/2004-12-08-BasicAACrash2.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/BasicAA/2004-12-08-BasicAACrash2.ll (original)
+++ llvm/trunk/test/Analysis/BasicAA/2004-12-08-BasicAACrash2.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -dse
+; RUN: opt < %s -basicaa -dse
 
 %"java/lang/Object" = type { %struct.llvm_java_object_base }
 %"java/lang/StringBuffer" = type { "java/lang/Object", i32, { "java/lang/Object", i32, [0 x i8] }*, i1 }

Modified: llvm/trunk/test/Analysis/BasicAA/2006-03-03-BadArraySubscript.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/BasicAA/2006-03-03-BadArraySubscript.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/BasicAA/2006-03-03-BadArraySubscript.ll (original)
+++ llvm/trunk/test/Analysis/BasicAA/2006-03-03-BadArraySubscript.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -aa-eval -disable-output |& grep {2 no alias respon}
+; RUN: opt < %s -basicaa -aa-eval -disable-output |& grep {2 no alias respon}
 ; TEST that A[1][0] may alias A[0][i].
 target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
 

Modified: llvm/trunk/test/Analysis/BasicAA/2006-11-03-BasicAAVectorCrash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/BasicAA/2006-11-03-BasicAAVectorCrash.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/BasicAA/2006-11-03-BasicAAVectorCrash.ll (original)
+++ llvm/trunk/test/Analysis/BasicAA/2006-11-03-BasicAAVectorCrash.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -licm -disable-output
+; RUN: opt < %s -basicaa -licm -disable-output
 target datalayout = "E-p:32:32"
 target triple = "powerpc-apple-darwin8.7.0"
 

Modified: llvm/trunk/test/Analysis/BasicAA/2007-11-05-SizeCrash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/BasicAA/2007-11-05-SizeCrash.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/BasicAA/2007-11-05-SizeCrash.ll (original)
+++ llvm/trunk/test/Analysis/BasicAA/2007-11-05-SizeCrash.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -gvn -disable-output
+; RUN: opt < %s -basicaa -gvn -disable-output
 ; PR1774
 
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"

Modified: llvm/trunk/test/Analysis/BasicAA/2007-12-08-OutOfBoundsCrash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/BasicAA/2007-12-08-OutOfBoundsCrash.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/BasicAA/2007-12-08-OutOfBoundsCrash.ll (original)
+++ llvm/trunk/test/Analysis/BasicAA/2007-12-08-OutOfBoundsCrash.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -gvn -disable-output
+; RUN: opt < %s -basicaa -gvn -disable-output
 ; PR1782
 
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"

Modified: llvm/trunk/test/Analysis/BasicAA/2008-06-02-GEPTailCrash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/BasicAA/2008-06-02-GEPTailCrash.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/BasicAA/2008-06-02-GEPTailCrash.ll (original)
+++ llvm/trunk/test/Analysis/BasicAA/2008-06-02-GEPTailCrash.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -gvn -disable-output
+; RUN: opt < %s -basicaa -gvn -disable-output
 ; PR2395
 
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"

Modified: llvm/trunk/test/Analysis/BasicAA/2008-11-23-NoaliasRet.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/BasicAA/2008-11-23-NoaliasRet.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/BasicAA/2008-11-23-NoaliasRet.ll (original)
+++ llvm/trunk/test/Analysis/BasicAA/2008-11-23-NoaliasRet.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -aa-eval |& grep {1 no alias response}
+; RUN: opt < %s -basicaa -aa-eval |& grep {1 no alias response}
 
 declare noalias i32* @_Znwj(i32 %x) nounwind
 

Modified: llvm/trunk/test/Analysis/BasicAA/2009-10-13-AtomicModRef.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/BasicAA/2009-10-13-AtomicModRef.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/BasicAA/2009-10-13-AtomicModRef.ll (original)
+++ llvm/trunk/test/Analysis/BasicAA/2009-10-13-AtomicModRef.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt -gvn -instcombine -S < %s | FileCheck %s
+; RUN: opt -basicaa -gvn -instcombine -S < %s | FileCheck %s
 target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
 
 declare i8 @llvm.atomic.load.add.i8.p0i8(i8*, i8)

Modified: llvm/trunk/test/Analysis/BasicAA/2009-10-13-GEP-BaseNoAlias.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/BasicAA/2009-10-13-GEP-BaseNoAlias.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/BasicAA/2009-10-13-GEP-BaseNoAlias.ll (original)
+++ llvm/trunk/test/Analysis/BasicAA/2009-10-13-GEP-BaseNoAlias.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -aa-eval -print-all-alias-modref-info -disable-output |& grep {NoAlias:.*%P,.*@Z}
+; RUN: opt < %s -basicaa -aa-eval -print-all-alias-modref-info -disable-output |& grep {NoAlias:.*%P,.*@Z}
 ; If GEP base doesn't alias Z, then GEP doesn't alias Z.
 ; rdar://7282591
 

Modified: llvm/trunk/test/Analysis/BasicAA/args-rets-allocas-loads.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/BasicAA/args-rets-allocas-loads.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/BasicAA/args-rets-allocas-loads.ll (original)
+++ llvm/trunk/test/Analysis/BasicAA/args-rets-allocas-loads.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt -aa-eval -print-all-alias-modref-info -disable-output < %s |& FileCheck  %s
+; RUN: opt -basicaa -aa-eval -print-all-alias-modref-info -disable-output < %s |& FileCheck  %s
 
 declare void @callee(double* %callee_arg)
 declare void @nocap_callee(double* nocapture %nocap_callee_arg)

Modified: llvm/trunk/test/Analysis/BasicAA/byval.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/BasicAA/byval.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/BasicAA/byval.ll (original)
+++ llvm/trunk/test/Analysis/BasicAA/byval.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -gvn -S | grep {ret i32 1}
+; RUN: opt < %s -basicaa -gvn -S | grep {ret i32 1}
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
 target triple = "i686-apple-darwin8"
 	%struct.x = type { i32, i32, i32, i32 }

Modified: llvm/trunk/test/Analysis/BasicAA/constant-over-index.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/BasicAA/constant-over-index.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/BasicAA/constant-over-index.ll (original)
+++ llvm/trunk/test/Analysis/BasicAA/constant-over-index.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -aa-eval -print-all-alias-modref-info |& FileCheck %s
+; RUN: opt < %s -basicaa -aa-eval -print-all-alias-modref-info |& FileCheck %s
 ; PR4267
 
 ; CHECK: MayAlias: double* %p.0.i.0, double* %p3

Modified: llvm/trunk/test/Analysis/BasicAA/empty.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/BasicAA/empty.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/BasicAA/empty.ll (original)
+++ llvm/trunk/test/Analysis/BasicAA/empty.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -aa-eval -print-all-alias-modref-info -disable-output \
+; RUN: opt < %s -basicaa -aa-eval -print-all-alias-modref-info -disable-output \
 ; RUN:   |& grep {NoAlias:	\{\}\\* \[%\]p, \{\}\\* \[%\]q}
 
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"

Modified: llvm/trunk/test/Analysis/BasicAA/gep-alias.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/BasicAA/gep-alias.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/BasicAA/gep-alias.ll (original)
+++ llvm/trunk/test/Analysis/BasicAA/gep-alias.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -gvn -instcombine -S |& FileCheck %s
+; RUN: opt < %s -basicaa -gvn -instcombine -S |& FileCheck %s
 
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
 

Modified: llvm/trunk/test/Analysis/BasicAA/getmodrefinfo-cs-cs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/BasicAA/getmodrefinfo-cs-cs.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/BasicAA/getmodrefinfo-cs-cs.ll (original)
+++ llvm/trunk/test/Analysis/BasicAA/getmodrefinfo-cs-cs.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -aa-eval -print-all-alias-modref-info -disable-output |& FileCheck %s
+; RUN: opt < %s -basicaa -aa-eval -print-all-alias-modref-info -disable-output |& FileCheck %s
 
 
 ; CHECK: Just Ref: call void @ro() <-> call void @f0()

Modified: llvm/trunk/test/Analysis/BasicAA/phi-and-select.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/BasicAA/phi-and-select.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/BasicAA/phi-and-select.ll (original)
+++ llvm/trunk/test/Analysis/BasicAA/phi-and-select.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -aa-eval -print-all-alias-modref-info -disable-output \
+; RUN: opt < %s -basicaa -aa-eval -print-all-alias-modref-info -disable-output \
 ; RUN:   |& grep {NoAlias:	double\\* \[%\]a, double\\* \[%\]b\$} | count 4
 
 ; BasicAA should detect NoAliases in PHIs and Selects.

Modified: llvm/trunk/test/Analysis/BasicAA/unreachable-block.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/BasicAA/unreachable-block.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/BasicAA/unreachable-block.ll (original)
+++ llvm/trunk/test/Analysis/BasicAA/unreachable-block.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt -aa-eval -disable-output < %s >& /dev/null
+; RUN: opt -basicaa -aa-eval -disable-output < %s >& /dev/null
 
 ; BasicAA shouldn't infinitely recurse on the use-def cycles in
 ; unreachable code.

Modified: llvm/trunk/test/Analysis/GlobalsModRef/aliastest.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/GlobalsModRef/aliastest.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/GlobalsModRef/aliastest.ll (original)
+++ llvm/trunk/test/Analysis/GlobalsModRef/aliastest.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -globalsmodref-aa -gvn -S | not grep load
+; RUN: opt < %s -basicaa -globalsmodref-aa -gvn -S | not grep load
 @X = internal global i32 4		; <i32*> [#uses=1]
 
 define i32 @test(i32* %P) {

Modified: llvm/trunk/test/Analysis/GlobalsModRef/chaining-analysis.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/GlobalsModRef/chaining-analysis.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/GlobalsModRef/chaining-analysis.ll (original)
+++ llvm/trunk/test/Analysis/GlobalsModRef/chaining-analysis.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -globalsmodref-aa -gvn -S | not grep load
+; RUN: opt < %s -basicaa -globalsmodref-aa -gvn -S | not grep load
 
 ; This test requires the use of previous analyses to determine that
 ; doesnotmodX does not modify X (because 'sin' doesn't).

Modified: llvm/trunk/test/Analysis/GlobalsModRef/indirect-global.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/GlobalsModRef/indirect-global.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/GlobalsModRef/indirect-global.ll (original)
+++ llvm/trunk/test/Analysis/GlobalsModRef/indirect-global.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -globalsmodref-aa -gvn -instcombine -S | \
+; RUN: opt < %s -basicaa -globalsmodref-aa -gvn -instcombine -S | \
 ; RUN:   grep {ret i32 0}
 
 @G = internal global i32* null		; <i32**> [#uses=3]

Modified: llvm/trunk/test/Analysis/GlobalsModRef/modreftest.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/GlobalsModRef/modreftest.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/GlobalsModRef/modreftest.ll (original)
+++ llvm/trunk/test/Analysis/GlobalsModRef/modreftest.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -globalsmodref-aa -gvn -S | not grep load
+; RUN: opt < %s -basicaa -globalsmodref-aa -gvn -S | not grep load
 @X = internal global i32 4		; <i32*> [#uses=2]
 
 define i32 @test(i32* %P) {

Modified: llvm/trunk/test/Analysis/LoopDependenceAnalysis/alias.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/LoopDependenceAnalysis/alias.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/LoopDependenceAnalysis/alias.ll (original)
+++ llvm/trunk/test/Analysis/LoopDependenceAnalysis/alias.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -analyze -lda | FileCheck %s
+; RUN: opt < %s -analyze -basicaa -lda | FileCheck %s
 
 ;; x[5] = x[6] // with x being a pointer passed as argument
 

Modified: llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-strong.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-strong.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-strong.ll (original)
+++ llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-strong.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -analyze -lda | FileCheck %s
+; RUN: opt < %s -analyze -basicaa -lda | FileCheck %s
 
 @x = common global [256 x i32] zeroinitializer, align 4
 @y = common global [256 x i32] zeroinitializer, align 4

Modified: llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-weak-crossing.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-weak-crossing.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-weak-crossing.ll (original)
+++ llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-weak-crossing.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -analyze -lda | FileCheck %s
+; RUN: opt < %s -analyze -basicaa -lda | FileCheck %s
 
 @x = common global [256 x i32] zeroinitializer, align 4
 @y = common global [256 x i32] zeroinitializer, align 4

Modified: llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-weak-zero.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-weak-zero.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-weak-zero.ll (original)
+++ llvm/trunk/test/Analysis/LoopDependenceAnalysis/siv-weak-zero.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -analyze -lda | FileCheck %s
+; RUN: opt < %s -analyze -basicaa -lda | FileCheck %s
 
 @x = common global [256 x i32] zeroinitializer, align 4
 @y = common global [256 x i32] zeroinitializer, align 4

Modified: llvm/trunk/test/Analysis/LoopDependenceAnalysis/ziv.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/LoopDependenceAnalysis/ziv.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/LoopDependenceAnalysis/ziv.ll (original)
+++ llvm/trunk/test/Analysis/LoopDependenceAnalysis/ziv.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -analyze -lda | FileCheck %s
+; RUN: opt < %s -analyze -basicaa -lda | FileCheck %s
 
 @x = common global [256 x i32] zeroinitializer, align 4
 

Modified: llvm/trunk/test/Analysis/TypeBasedAliasAnalysis/aliastest.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/TypeBasedAliasAnalysis/aliastest.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/TypeBasedAliasAnalysis/aliastest.ll (original)
+++ llvm/trunk/test/Analysis/TypeBasedAliasAnalysis/aliastest.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -tbaa -gvn -S | FileCheck %s
+; RUN: opt < %s -basicaa -tbaa -gvn -S | FileCheck %s
 
 ; CHECK: @test0_yes
 ; CHECK: add i8 %x, %x

Modified: llvm/trunk/test/Other/lint.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Other/lint.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Other/lint.ll (original)
+++ llvm/trunk/test/Other/lint.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt -lint -disable-output < %s |& FileCheck %s
+; RUN: opt -basicaa -lint -disable-output < %s |& FileCheck %s
 target datalayout = "e-p:64:64:64"
 
 declare fastcc void @bar()

Modified: llvm/trunk/test/Transforms/ArgumentPromotion/basictest.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/ArgumentPromotion/basictest.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/ArgumentPromotion/basictest.ll (original)
+++ llvm/trunk/test/Transforms/ArgumentPromotion/basictest.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -argpromotion -mem2reg -S | not grep alloca
+; RUN: opt < %s -basicaa -argpromotion -mem2reg -S | not grep alloca
 target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
 define internal i32 @test(i32* %X, i32* %Y) {
         %A = load i32* %X               ; <i32> [#uses=1]

Modified: llvm/trunk/test/Transforms/DeadStoreElimination/2008-07-28-load-store.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/DeadStoreElimination/2008-07-28-load-store.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/DeadStoreElimination/2008-07-28-load-store.ll (original)
+++ llvm/trunk/test/Transforms/DeadStoreElimination/2008-07-28-load-store.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -dse -S | not grep tmp5
+; RUN: opt < %s -basicaa -dse -S | not grep tmp5
 ; PR2599
 target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
 

Modified: llvm/trunk/test/Transforms/DeadStoreElimination/PartialStore.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/DeadStoreElimination/PartialStore.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/DeadStoreElimination/PartialStore.ll (original)
+++ llvm/trunk/test/Transforms/DeadStoreElimination/PartialStore.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -dse -S | \
+; RUN: opt < %s -basicaa -dse -S | \
 ; RUN:    not grep {store i8}
 ; Ensure that the dead store is deleted in this case.  It is wholely
 ; overwritten by the second store.

Modified: llvm/trunk/test/Transforms/DeadStoreElimination/const-pointers.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/DeadStoreElimination/const-pointers.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/DeadStoreElimination/const-pointers.ll (original)
+++ llvm/trunk/test/Transforms/DeadStoreElimination/const-pointers.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt %s -dse -S | FileCheck %s
+; RUN: opt %s -basicaa -dse -S | FileCheck %s
 
 %t = type { i32 }
 

Modified: llvm/trunk/test/Transforms/DeadStoreElimination/context-sensitive.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/DeadStoreElimination/context-sensitive.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/DeadStoreElimination/context-sensitive.ll (original)
+++ llvm/trunk/test/Transforms/DeadStoreElimination/context-sensitive.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -dse -S | not grep DEAD
+; RUN: opt < %s -basicaa -dse -S | not grep DEAD
 target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
 
 declare void @ext()

Modified: llvm/trunk/test/Transforms/DeadStoreElimination/free.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/DeadStoreElimination/free.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/DeadStoreElimination/free.ll (original)
+++ llvm/trunk/test/Transforms/DeadStoreElimination/free.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -dse -S | not grep DEAD
+; RUN: opt < %s -basicaa -dse -S | not grep DEAD
 
 define void @test(i32* %Q, i32* %P) {
         %DEAD = load i32* %Q            ; <i32> [#uses=1]

Modified: llvm/trunk/test/Transforms/DeadStoreElimination/lifetime.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/DeadStoreElimination/lifetime.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/DeadStoreElimination/lifetime.ll (original)
+++ llvm/trunk/test/Transforms/DeadStoreElimination/lifetime.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt -S -dse < %s | FileCheck %s
+; RUN: opt -S -basicaa -dse < %s | FileCheck %s
 
 target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
 

Modified: llvm/trunk/test/Transforms/DeadStoreElimination/no-targetdata.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/DeadStoreElimination/no-targetdata.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/DeadStoreElimination/no-targetdata.ll (original)
+++ llvm/trunk/test/Transforms/DeadStoreElimination/no-targetdata.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt %s -dse -S | FileCheck %s
+; RUN: opt %s -basicaa -dse -S | FileCheck %s
 
 declare void @test1f()
 

Modified: llvm/trunk/test/Transforms/DeadStoreElimination/simple.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/DeadStoreElimination/simple.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/DeadStoreElimination/simple.ll (original)
+++ llvm/trunk/test/Transforms/DeadStoreElimination/simple.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -dse -S | not grep DEAD
+; RUN: opt < %s -basicaa -dse -S | not grep DEAD
 target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
 
 define void @test(i32* %Q, i32* %P) {

Modified: llvm/trunk/test/Transforms/GVN/2007-07-25-InfiniteLoop.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/2007-07-25-InfiniteLoop.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/GVN/2007-07-25-InfiniteLoop.ll (original)
+++ llvm/trunk/test/Transforms/GVN/2007-07-25-InfiniteLoop.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -gvn -S | not grep {tmp10 =}
+; RUN: opt < %s -basicaa -gvn -S | not grep {tmp10 =}
 
 	%struct.INT2 = type { i32, i32 }
 @blkshifts = external global %struct.INT2*		; <%struct.INT2**> [#uses=2]

Modified: llvm/trunk/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll (original)
+++ llvm/trunk/test/Transforms/GVN/2007-07-26-InterlockingLoops.ll Mon Oct 18 13:04:47 2010
@@ -1,5 +1,5 @@
-; RUN: opt < %s -gvn -S | grep {tmp17625.* = phi i32. }
-; RUN: opt < %s -gvn -S | grep {tmp17631.* = phi i32. }
+; RUN: opt < %s -basicaa -gvn -S | grep {tmp17625.* = phi i32. }
+; RUN: opt < %s -basicaa -gvn -S | grep {tmp17631.* = phi i32. }
 
 @last = external global [65 x i32*]		; <[65 x i32*]*> [#uses=1]
 

Modified: llvm/trunk/test/Transforms/GVN/2007-07-31-NoDomInherit.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/2007-07-31-NoDomInherit.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/GVN/2007-07-31-NoDomInherit.ll (original)
+++ llvm/trunk/test/Transforms/GVN/2007-07-31-NoDomInherit.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -gvn -S | grep {tmp47 = phi i32 }
+; RUN: opt < %s -basicaa -gvn -S | grep {tmp47 = phi i32 }
 
 	%struct.anon = type { i32 (i32, i32, i32)*, i32, i32, [3 x i32], i8*, i8*, i8* }
 @debug = external constant i32		; <i32*> [#uses=0]

Modified: llvm/trunk/test/Transforms/GVN/2007-07-31-RedundantPhi.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/2007-07-31-RedundantPhi.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/GVN/2007-07-31-RedundantPhi.ll (original)
+++ llvm/trunk/test/Transforms/GVN/2007-07-31-RedundantPhi.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -gvn -S | not grep {tmp701 =}
+; RUN: opt < %s -basicaa -gvn -S | not grep {tmp701 =}
 
 @img_width = external global i16		; <i16*> [#uses=2]
 

Modified: llvm/trunk/test/Transforms/GVN/2008-07-02-Unreachable.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/2008-07-02-Unreachable.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/GVN/2008-07-02-Unreachable.ll (original)
+++ llvm/trunk/test/Transforms/GVN/2008-07-02-Unreachable.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -gvn -S | grep {ret i8 \[%\]tmp3}
+; RUN: opt < %s -basicaa -gvn -S | grep {ret i8 \[%\]tmp3}
 ; PR2503
 
 @g_3 = external global i8		; <i8*> [#uses=2]

Modified: llvm/trunk/test/Transforms/GVN/2010-03-31-RedundantPHIs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/2010-03-31-RedundantPHIs.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/GVN/2010-03-31-RedundantPHIs.ll (original)
+++ llvm/trunk/test/Transforms/GVN/2010-03-31-RedundantPHIs.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -gvn -S | FileCheck %s
+; RUN: opt < %s -basicaa -gvn -S | FileCheck %s
 
 define i8* @cat(i8* %s1, ...) nounwind {
 entry:

Modified: llvm/trunk/test/Transforms/GVN/calls-nonlocal.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/calls-nonlocal.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/GVN/calls-nonlocal.ll (original)
+++ llvm/trunk/test/Transforms/GVN/calls-nonlocal.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -gvn -S | grep strlen | count 2
+; RUN: opt < %s -basicaa -gvn -S | grep strlen | count 2
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
 target triple = "i386-apple-darwin9"
 

Modified: llvm/trunk/test/Transforms/GVN/condprop.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/condprop.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/GVN/condprop.ll (original)
+++ llvm/trunk/test/Transforms/GVN/condprop.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -gvn -S | grep {br i1 false}
+; RUN: opt < %s -basicaa -gvn -S | grep {br i1 false}
 
 @a = external global i32		; <i32*> [#uses=7]
 

Modified: llvm/trunk/test/Transforms/GVN/invariant-simple.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/invariant-simple.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/GVN/invariant-simple.ll (original)
+++ llvm/trunk/test/Transforms/GVN/invariant-simple.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -gvn -S | FileCheck %s
+; RUN: opt < %s -basicaa -gvn -S | FileCheck %s
 
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
 target triple = "i386-apple-darwin7"

Modified: llvm/trunk/test/Transforms/GVN/lifetime-simple.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/lifetime-simple.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/GVN/lifetime-simple.ll (original)
+++ llvm/trunk/test/Transforms/GVN/lifetime-simple.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -gvn -S | FileCheck %s
+; RUN: opt < %s -basicaa -gvn -S | FileCheck %s
 
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
 target triple = "i386-apple-darwin7"

Modified: llvm/trunk/test/Transforms/GVN/load-constant-mem.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/load-constant-mem.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/GVN/load-constant-mem.ll (original)
+++ llvm/trunk/test/Transforms/GVN/load-constant-mem.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -gvn -instcombine -S | grep {ret i32 0}
+; RUN: opt < %s -basicaa -gvn -instcombine -S | grep {ret i32 0}
 ; PR4189
 @G = external constant [4 x i32]
 

Modified: llvm/trunk/test/Transforms/GVN/load-pre-licm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/load-pre-licm.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/GVN/load-pre-licm.ll (original)
+++ llvm/trunk/test/Transforms/GVN/load-pre-licm.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt -S -gvn < %s | FileCheck %s
+; RUN: opt -S -basicaa -gvn < %s | FileCheck %s
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
 target triple = "i386-apple-darwin11.0.0"
 

Modified: llvm/trunk/test/Transforms/GVN/lpre-call-wrap-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/lpre-call-wrap-2.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/GVN/lpre-call-wrap-2.ll (original)
+++ llvm/trunk/test/Transforms/GVN/lpre-call-wrap-2.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt -S -gvn -enable-load-pre %s | FileCheck %s
+; RUN: opt -S -basicaa -gvn -enable-load-pre %s | FileCheck %s
 ;
 ; The partially redundant load in bb1 should be hoisted to "bb".  This comes
 ; from this C code (GCC PR 23455):

Modified: llvm/trunk/test/Transforms/GVN/mixed.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/mixed.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/GVN/mixed.ll (original)
+++ llvm/trunk/test/Transforms/GVN/mixed.ll Mon Oct 18 13:04:47 2010
@@ -1,5 +1,5 @@
-; RUN: opt < %s -gvn -S | not grep DEADLOAD
-; RUN: opt < %s -gvn -S | not grep DEADGEP
+; RUN: opt < %s -basicaa -gvn -S | not grep DEADLOAD
+; RUN: opt < %s -basicaa -gvn -S | not grep DEADGEP
 
 define i32 @main(i32** %p) {
 block1:

Modified: llvm/trunk/test/Transforms/GVN/nonescaping-malloc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/nonescaping-malloc.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/GVN/nonescaping-malloc.ll (original)
+++ llvm/trunk/test/Transforms/GVN/nonescaping-malloc.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -gvn -stats -disable-output |& grep {Number of loads deleted}
+; RUN: opt < %s -basicaa -gvn -stats -disable-output |& grep {Number of loads deleted}
 ; rdar://7363102
 
 ; GVN should be able to eliminate load %tmp22.i, because it is redundant with

Modified: llvm/trunk/test/Transforms/GVN/null-aliases-nothing.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/null-aliases-nothing.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/GVN/null-aliases-nothing.ll (original)
+++ llvm/trunk/test/Transforms/GVN/null-aliases-nothing.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt %s -gvn -S | FileCheck %s
+; RUN: opt %s -basicaa -gvn -S | FileCheck %s
 
 %t = type { i32 }
 declare void @test1f(i8*)

Modified: llvm/trunk/test/Transforms/GVN/pre-load.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/pre-load.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/GVN/pre-load.ll (original)
+++ llvm/trunk/test/Transforms/GVN/pre-load.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -gvn -enable-load-pre -S | FileCheck %s
+; RUN: opt < %s -basicaa -gvn -enable-load-pre -S | FileCheck %s
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
 
 define i32 @test1(i32* %p, i1 %C) {

Modified: llvm/trunk/test/Transforms/GVN/rle-must-alias.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/rle-must-alias.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/GVN/rle-must-alias.ll (original)
+++ llvm/trunk/test/Transforms/GVN/rle-must-alias.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -gvn -S | grep {DEAD = phi i32 }
+; RUN: opt < %s -basicaa -gvn -S | grep {DEAD = phi i32 }
 
 ; GVN should eliminate the fully redundant %9 GEP which 
 ; allows DEAD to be removed.  This is PR3198.

Modified: llvm/trunk/test/Transforms/GVN/rle-nonlocal.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/rle-nonlocal.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/GVN/rle-nonlocal.ll (original)
+++ llvm/trunk/test/Transforms/GVN/rle-nonlocal.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -gvn -S | FileCheck %s
+; RUN: opt < %s -basicaa -gvn -S | FileCheck %s
 
 define i32 @main(i32** %p) {
 block1:

Modified: llvm/trunk/test/Transforms/GVN/rle-semidominated.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/rle-semidominated.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/GVN/rle-semidominated.ll (original)
+++ llvm/trunk/test/Transforms/GVN/rle-semidominated.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -gvn -S | grep {DEAD = phi i32 }
+; RUN: opt < %s -basicaa -gvn -S | grep {DEAD = phi i32 }
 
 define i32 @main(i32* %p) {
 block1:

Modified: llvm/trunk/test/Transforms/GVN/rle.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/rle.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/GVN/rle.ll (original)
+++ llvm/trunk/test/Transforms/GVN/rle.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -gvn -S | FileCheck %s
+; RUN: opt < %s -basicaa -gvn -S | FileCheck %s
 
 ; 32-bit little endian target.
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"

Modified: llvm/trunk/test/Transforms/Inline/devirtualize-3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/Inline/devirtualize-3.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/Inline/devirtualize-3.ll (original)
+++ llvm/trunk/test/Transforms/Inline/devirtualize-3.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt -inline -S -scalarrepl -gvn -instcombine %s | FileCheck %s
+; RUN: opt -basicaa -inline -S -scalarrepl -gvn -instcombine %s | FileCheck %s
 ; PR5009
 
 ; CHECK: define i32 @main() 

Modified: llvm/trunk/test/Transforms/Inline/devirtualize.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/Inline/devirtualize.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/Inline/devirtualize.ll (original)
+++ llvm/trunk/test/Transforms/Inline/devirtualize.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt -S -inline -scalarrepl -instcombine -simplifycfg -instcombine -gvn -globaldce %s | FileCheck %s
+; RUN: opt -S -basicaa -inline -scalarrepl -instcombine -simplifycfg -instcombine -gvn -globaldce %s | FileCheck %s
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
 target triple = "x86_64-apple-darwin10.0.0"
 

Modified: llvm/trunk/test/Transforms/Inline/gvn-inline-iteration.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/Inline/gvn-inline-iteration.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/Inline/gvn-inline-iteration.ll (original)
+++ llvm/trunk/test/Transforms/Inline/gvn-inline-iteration.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt -inline -gvn %s -S -max-cg-scc-iterations=1 | FileCheck %s
+; RUN: opt -basicaa -inline -gvn %s -S -max-cg-scc-iterations=1 | FileCheck %s
 ; rdar://6295824 and PR6724
 
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"

Modified: llvm/trunk/test/Transforms/LICM/2008-07-22-LoadGlobalConstant.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LICM/2008-07-22-LoadGlobalConstant.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/LICM/2008-07-22-LoadGlobalConstant.ll (original)
+++ llvm/trunk/test/Transforms/LICM/2008-07-22-LoadGlobalConstant.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -licm -S | FileCheck %s
+; RUN: opt < %s -basicaa -licm -S | FileCheck %s
 
 @a = external constant float*
 

Modified: llvm/trunk/test/Transforms/LICM/scalar_promote.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LICM/scalar_promote.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/LICM/scalar_promote.ll (original)
+++ llvm/trunk/test/Transforms/LICM/scalar_promote.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s  -licm -S | FileCheck %s
+; RUN: opt < %s -basicaa -licm -S | FileCheck %s
 target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
 
 @X = global i32 7		; <i32*> [#uses=4]

Modified: llvm/trunk/test/Transforms/MemCpyOpt/2008-02-24-MultipleUseofSRet.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/MemCpyOpt/2008-02-24-MultipleUseofSRet.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/MemCpyOpt/2008-02-24-MultipleUseofSRet.ll (original)
+++ llvm/trunk/test/Transforms/MemCpyOpt/2008-02-24-MultipleUseofSRet.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -memcpyopt -dse -S | grep {call.*initialize} | not grep memtmp
+; RUN: opt < %s -basicaa -memcpyopt -dse -S | grep {call.*initialize} | not grep memtmp
 ; PR2077
 
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"

Modified: llvm/trunk/test/Transforms/MemCpyOpt/2008-03-13-ReturnSlotBitcast.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/MemCpyOpt/2008-03-13-ReturnSlotBitcast.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/MemCpyOpt/2008-03-13-ReturnSlotBitcast.ll (original)
+++ llvm/trunk/test/Transforms/MemCpyOpt/2008-03-13-ReturnSlotBitcast.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -memcpyopt -S | not grep {call.*memcpy.}
+; RUN: opt < %s -basicaa -memcpyopt -S | not grep {call.*memcpy.}
 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
 	%a = type { i32 }
 	%b = type { float }

Modified: llvm/trunk/test/Transforms/MemCpyOpt/loadstore-sret.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/MemCpyOpt/loadstore-sret.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/MemCpyOpt/loadstore-sret.ll (original)
+++ llvm/trunk/test/Transforms/MemCpyOpt/loadstore-sret.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt -S < %s -memcpyopt | FileCheck %s
+; RUN: opt -S < %s -basicaa -memcpyopt | FileCheck %s
 ; <rdar://problem/8536696>
 
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"

Modified: llvm/trunk/test/Transforms/MemCpyOpt/memcpy.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/MemCpyOpt/memcpy.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/MemCpyOpt/memcpy.ll (original)
+++ llvm/trunk/test/Transforms/MemCpyOpt/memcpy.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -memcpyopt -dse -S | grep {call.*memcpy} | count 1
+; RUN: opt < %s -basicaa -memcpyopt -dse -S | grep {call.*memcpy} | count 1
 
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
 target triple = "i686-apple-darwin9"

Modified: llvm/trunk/test/Transforms/MemCpyOpt/memmove.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/MemCpyOpt/memmove.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/MemCpyOpt/memmove.ll (original)
+++ llvm/trunk/test/Transforms/MemCpyOpt/memmove.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -memcpyopt -S | FileCheck %s
+; RUN: opt < %s -basicaa -memcpyopt -S | FileCheck %s
 ; These memmoves should get optimized to memcpys.
 
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"

Modified: llvm/trunk/test/Transforms/MemCpyOpt/sret.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/MemCpyOpt/sret.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/MemCpyOpt/sret.ll (original)
+++ llvm/trunk/test/Transforms/MemCpyOpt/sret.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -memcpyopt -S | not grep {call.*memcpy}
+; RUN: opt < %s -basicaa -memcpyopt -S | not grep {call.*memcpy}
 
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
 target triple = "i686-apple-darwin9"

Modified: llvm/trunk/test/Transforms/Sink/basic.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/Sink/basic.ll?rev=116720&r1=116719&r2=116720&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/Sink/basic.ll (original)
+++ llvm/trunk/test/Transforms/Sink/basic.ll Mon Oct 18 13:04:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -sink -S | FileCheck %s
+; RUN: opt < %s -basicaa -sink -S | FileCheck %s
 
 @A = external global i32
 @B = external global i32



From gohman at apple.com  Mon Oct 18 13:10:32 2010
From: gohman at apple.com (Dan Gohman)
Date: Mon, 18 Oct 2010 18:10:32 -0000
Subject: [llvm-commits] [llvm] r116721 -
	/llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp
Message-ID: <20101018181032.10E8B2A6C12C@llvm.org>

Author: djg
Date: Mon Oct 18 13:10:31 2010
New Revision: 116721

URL: http://llvm.org/viewvc/llvm-project?rev=116721&view=rev
Log:
Use chaining in TypeBasedAliasAnalysis::pointsToConstantMemory.

Modified:
    llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp

Modified: llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp?rev=116721&r1=116720&r2=116721&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp Mon Oct 18 13:10:31 2010
@@ -173,5 +173,8 @@
 
   // If this is an "immutable" type, we can assume the pointer is pointing
   // to constant memory.
-  return TBAANode(M).TypeIsImmutable();
+  if (TBAANode(M).TypeIsImmutable())
+    return true;
+
+  return AliasAnalysis::pointsToConstantMemory(Loc);
 }



From gohman at apple.com  Mon Oct 18 13:17:47 2010
From: gohman at apple.com (Dan Gohman)
Date: Mon, 18 Oct 2010 18:17:47 -0000
Subject: [llvm-commits] [llvm] r116722 - in /llvm/trunk:
 lib/Analysis/TypeBasedAliasAnalysis.cpp
 test/Analysis/TypeBasedAliasAnalysis/aliastest.ll
Message-ID: <20101018181747.D09BD2A6C12C@llvm.org>

Author: djg
Date: Mon Oct 18 13:17:47 2010
New Revision: 116722

URL: http://llvm.org/viewvc/llvm-project?rev=116722&view=rev
Log:
Make TypeBasedAliasAnalysis default to doing nothing, with a command-line
option to enable it.

Modified:
    llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp
    llvm/trunk/test/Analysis/TypeBasedAliasAnalysis/aliastest.ll

Modified: llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp?rev=116722&r1=116721&r2=116722&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp Mon Oct 18 13:17:47 2010
@@ -32,8 +32,12 @@
 #include "llvm/Module.h"
 #include "llvm/Metadata.h"
 #include "llvm/Pass.h"
+#include "llvm/Support/CommandLine.h"
 using namespace llvm;
 
+// For testing purposes, enable TBAA only via a special option.
+static cl::opt<bool> EnableTBAA("enable-tbaa");
+
 namespace {
   /// TBAANode - This is a simple wrapper around an MDNode which provides a
   /// higher-level interface by hiding the details of how alias analysis
@@ -122,6 +126,9 @@
 AliasAnalysis::AliasResult
 TypeBasedAliasAnalysis::alias(const Location &LocA,
                               const Location &LocB) {
+  if (!EnableTBAA)
+    return AliasAnalysis::alias(LocA, LocB);
+
   // Get the attached MDNodes. If either value lacks a tbaa MDNode, we must
   // be conservative.
   const MDNode *AM = LocA.TBAATag;
@@ -168,6 +175,9 @@
 }
 
 bool TypeBasedAliasAnalysis::pointsToConstantMemory(const Location &Loc) {
+  if (!EnableTBAA)
+    return AliasAnalysis::pointsToConstantMemory(Loc);
+
   const MDNode *M = Loc.TBAATag;
   if (!M) return false;
 

Modified: llvm/trunk/test/Analysis/TypeBasedAliasAnalysis/aliastest.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/TypeBasedAliasAnalysis/aliastest.ll?rev=116722&r1=116721&r2=116722&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/TypeBasedAliasAnalysis/aliastest.ll (original)
+++ llvm/trunk/test/Analysis/TypeBasedAliasAnalysis/aliastest.ll Mon Oct 18 13:17:47 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -basicaa -tbaa -gvn -S | FileCheck %s
+; RUN: opt < %s -enable-tbaa -basicaa -tbaa -gvn -S | FileCheck %s
 
 ; CHECK: @test0_yes
 ; CHECK: add i8 %x, %x



From rafael.espindola at gmail.com  Mon Oct 18 13:36:12 2010
From: rafael.espindola at gmail.com (Rafael Espindola)
Date: Mon, 18 Oct 2010 18:36:12 -0000
Subject: [llvm-commits] [llvm] r116728 - in /llvm/trunk:
 lib/MC/ELFObjectWriter.cpp lib/Target/X86/X86AsmBackend.cpp
 test/MC/ELF/relocation-386.s
Message-ID: <20101018183612.460C22A6C12C@llvm.org>

Author: rafael
Date: Mon Oct 18 13:36:12 2010
New Revision: 116728

URL: http://llvm.org/viewvc/llvm-project?rev=116728&view=rev
Log:
Produce ELF::R_386_GOTPC relocations.

Modified:
    llvm/trunk/lib/MC/ELFObjectWriter.cpp
    llvm/trunk/lib/Target/X86/X86AsmBackend.cpp
    llvm/trunk/test/MC/ELF/relocation-386.s

Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=116728&r1=116727&r2=116728&view=diff
==============================================================================
--- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original)
+++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Mon Oct 18 13:36:12 2010
@@ -707,7 +707,12 @@
           break;
         }
         break;
-      case FK_Data_4: Type = ELF::R_386_32; break;
+      case FK_Data_4:
+        if (Symbol->getName() == "_GLOBAL_OFFSET_TABLE_")
+          Type = ELF::R_386_GOTPC;
+        else
+          Type = ELF::R_386_32;
+        break;
       case FK_Data_2: Type = ELF::R_386_16; break;
       case X86::reloc_pcrel_1byte:
       case FK_Data_1: Type = ELF::R_386_8; break;

Modified: llvm/trunk/lib/Target/X86/X86AsmBackend.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86AsmBackend.cpp?rev=116728&r1=116727&r2=116728&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86AsmBackend.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86AsmBackend.cpp Mon Oct 18 13:36:12 2010
@@ -72,6 +72,11 @@
   default:
     return Op;
 
+  // This is used on i386 with things like addl $foo, %ebx
+  // FIXME: Should the other *i8 instructions be here too? If not, it might
+  // be better to just select X86::ADD32ri instead of X86::ADD32ri8.
+  case X86::ADD32ri8: return X86::ADD32ri;
+
   case X86::JAE_1: return X86::JAE_4;
   case X86::JA_1:  return X86::JA_4;
   case X86::JBE_1: return X86::JBE_4;

Modified: llvm/trunk/test/MC/ELF/relocation-386.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/relocation-386.s?rev=116728&r1=116727&r2=116728&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/relocation-386.s (original)
+++ llvm/trunk/test/MC/ELF/relocation-386.s Mon Oct 18 13:36:12 2010
@@ -16,6 +16,12 @@
 // CHECK-NEXT: (('r_offset',
 // CHECK-NEXT:  ('r_sym',
 // CHECK-NEXT:  ('r_type', 4)
+// CHECK-NEXT: ),
+// CHECK-NEXT:  # Relocation 2
+// CHECK-NEXT: (('r_offset',
+// CHECK-NEXT:  ('r_sym',
+// CHECK-NEXT:  ('r_type', 10)
+// CHECK-NEXT: ),
 
         .text
 bar:
@@ -24,6 +30,7 @@
         .global bar2
 bar2:
 	calll	bar2 at PLT
+	addl	$_GLOBAL_OFFSET_TABLE_, %ebx
 
         .section	.rodata.str1.16,"aMS", at progbits,1
 .Lfoo:



From grosbach at apple.com  Mon Oct 18 13:39:46 2010
From: grosbach at apple.com (Jim Grosbach)
Date: Mon, 18 Oct 2010 18:39:46 -0000
Subject: [llvm-commits] [llvm] r116729 -
	/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp
Message-ID: <20101018183946.E42E82A6C12C@llvm.org>

Author: grosbach
Date: Mon Oct 18 13:39:46 2010
New Revision: 116729

URL: http://llvm.org/viewvc/llvm-project?rev=116729&view=rev
Log:
For Thumb2, try to use frame pointer references for stack slots even when a
base register is available. rdar://8525298

Modified:
    llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp?rev=116729&r1=116728&r2=116729&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Mon Oct 18 13:39:46 2010
@@ -953,8 +953,16 @@
       return FPOffset;
     } else if (MFI->hasVarSizedObjects()) {
       assert(hasBasePointer(MF) && "missing base pointer!");
-      // Use the base register since we have it.
-      FrameReg = BasePtr;
+      // Try to use the frame pointer if we can, else use the base pointer
+      // since it's available. This is handy for the emergency spill slot, in
+      // particular.
+      if (AFI->isThumb2Function()) {
+        if (FPOffset >= -255 && FPOffset < 0) {
+          FrameReg = getFrameRegister(MF);
+          return FPOffset;
+        }
+      } else
+        FrameReg = BasePtr;
     } else if (AFI->isThumb2Function()) {
       // In Thumb2 mode, the negative offset is very limited. Try to avoid
       // out of range references.



From gohman at apple.com  Mon Oct 18 13:45:11 2010
From: gohman at apple.com (Dan Gohman)
Date: Mon, 18 Oct 2010 18:45:11 -0000
Subject: [llvm-commits] [llvm] r116730 -
	/llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp
Message-ID: <20101018184511.6F5A92A6C12C@llvm.org>

Author: djg
Date: Mon Oct 18 13:45:11 2010
New Revision: 116730

URL: http://llvm.org/viewvc/llvm-project?rev=116730&view=rev
Log:
Fix BasicAA to pass TBAAInfo through to the chained analysis.

Modified:
    llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp

Modified: llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp?rev=116730&r1=116729&r2=116730&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp Mon Oct 18 13:45:11 2010
@@ -505,7 +505,8 @@
       assert(Visited.empty() && "Visited must be cleared after use!");
       assert(notDifferentParent(LocA.Ptr, LocB.Ptr) &&
              "BasicAliasAnalysis doesn't support interprocedural queries.");
-      AliasResult Alias = aliasCheck(LocA.Ptr, LocA.Size, LocB.Ptr, LocB.Size);
+      AliasResult Alias = aliasCheck(LocA.Ptr, LocA.Size, LocA.TBAATag,
+                                     LocB.Ptr, LocB.Size, LocB.TBAATag);
       Visited.clear();
       return Alias;
     }
@@ -549,19 +550,26 @@
     // instruction against another.
     AliasResult aliasGEP(const GEPOperator *V1, unsigned V1Size,
                          const Value *V2, unsigned V2Size,
+                         const MDNode *V2TBAAInfo,
                          const Value *UnderlyingV1, const Value *UnderlyingV2);
 
     // aliasPHI - Provide a bunch of ad-hoc rules to disambiguate a PHI
     // instruction against another.
     AliasResult aliasPHI(const PHINode *PN, unsigned PNSize,
-                         const Value *V2, unsigned V2Size);
+                         const MDNode *PNTBAAInfo,
+                         const Value *V2, unsigned V2Size,
+                         const MDNode *V2TBAAInfo);
 
     /// aliasSelect - Disambiguate a Select instruction against another value.
     AliasResult aliasSelect(const SelectInst *SI, unsigned SISize,
-                            const Value *V2, unsigned V2Size);
+                            const MDNode *SITBAAInfo,
+                            const Value *V2, unsigned V2Size,
+                            const MDNode *V2TBAAInfo);
 
     AliasResult aliasCheck(const Value *V1, unsigned V1Size,
-                           const Value *V2, unsigned V2Size);
+                           const MDNode *V1TBAATag,
+                           const Value *V2, unsigned V2Size,
+                           const MDNode *V2TBAATag);
   };
 }  // End of anonymous namespace
 
@@ -757,6 +765,7 @@
 AliasAnalysis::AliasResult
 BasicAliasAnalysis::aliasGEP(const GEPOperator *GEP1, unsigned V1Size,
                              const Value *V2, unsigned V2Size,
+                             const MDNode *V2TBAAInfo,
                              const Value *UnderlyingV1,
                              const Value *UnderlyingV2) {
   // If this GEP has been visited before, we're on a use-def cycle.
@@ -773,8 +782,8 @@
   // out if the indexes to the GEP tell us anything about the derived pointer.
   if (const GEPOperator *GEP2 = dyn_cast<GEPOperator>(V2)) {
     // Do the base pointers alias?
-    AliasResult BaseAlias = aliasCheck(UnderlyingV1, UnknownSize,
-                                       UnderlyingV2, UnknownSize);
+    AliasResult BaseAlias = aliasCheck(UnderlyingV1, UnknownSize, 0,
+                                       UnderlyingV2, UnknownSize, 0);
     
     // If we get a No or May, then return it immediately, no amount of analysis
     // will improve this situation.
@@ -814,7 +823,8 @@
     if (V1Size == UnknownSize && V2Size == UnknownSize)
       return MayAlias;
 
-    AliasResult R = aliasCheck(UnderlyingV1, UnknownSize, V2, V2Size);
+    AliasResult R = aliasCheck(UnderlyingV1, UnknownSize, 0,
+                               V2, V2Size, V2TBAAInfo);
     if (R != MustAlias)
       // If V2 may alias GEP base pointer, conservatively returns MayAlias.
       // If V2 is known not to alias GEP base pointer, then the two values
@@ -876,7 +886,9 @@
 /// instruction against another.
 AliasAnalysis::AliasResult
 BasicAliasAnalysis::aliasSelect(const SelectInst *SI, unsigned SISize,
-                                const Value *V2, unsigned V2Size) {
+                                const MDNode *SITBAAInfo,
+                                const Value *V2, unsigned V2Size,
+                                const MDNode *V2TBAAInfo) {
   // If this select has been visited before, we're on a use-def cycle.
   // Such cycles are only valid when PHI nodes are involved or in unreachable
   // code. The visitPHI function catches cycles containing PHIs, but there
@@ -889,13 +901,13 @@
   if (const SelectInst *SI2 = dyn_cast<SelectInst>(V2))
     if (SI->getCondition() == SI2->getCondition()) {
       AliasResult Alias =
-        aliasCheck(SI->getTrueValue(), SISize,
-                   SI2->getTrueValue(), V2Size);
+        aliasCheck(SI->getTrueValue(), SISize, SITBAAInfo,
+                   SI2->getTrueValue(), V2Size, V2TBAAInfo);
       if (Alias == MayAlias)
         return MayAlias;
       AliasResult ThisAlias =
-        aliasCheck(SI->getFalseValue(), SISize,
-                   SI2->getFalseValue(), V2Size);
+        aliasCheck(SI->getFalseValue(), SISize, SITBAAInfo,
+                   SI2->getFalseValue(), V2Size, V2TBAAInfo);
       if (ThisAlias != Alias)
         return MayAlias;
       return Alias;
@@ -904,7 +916,7 @@
   // If both arms of the Select node NoAlias or MustAlias V2, then returns
   // NoAlias / MustAlias. Otherwise, returns MayAlias.
   AliasResult Alias =
-    aliasCheck(V2, V2Size, SI->getTrueValue(), SISize);
+    aliasCheck(V2, V2Size, V2TBAAInfo, SI->getTrueValue(), SISize, SITBAAInfo);
   if (Alias == MayAlias)
     return MayAlias;
 
@@ -914,7 +926,7 @@
   Visited.erase(V2);
 
   AliasResult ThisAlias =
-    aliasCheck(V2, V2Size, SI->getFalseValue(), SISize);
+    aliasCheck(V2, V2Size, V2TBAAInfo, SI->getFalseValue(), SISize, SITBAAInfo);
   if (ThisAlias != Alias)
     return MayAlias;
   return Alias;
@@ -924,7 +936,9 @@
 // against another.
 AliasAnalysis::AliasResult
 BasicAliasAnalysis::aliasPHI(const PHINode *PN, unsigned PNSize,
-                             const Value *V2, unsigned V2Size) {
+                             const MDNode *PNTBAAInfo,
+                             const Value *V2, unsigned V2Size,
+                             const MDNode *V2TBAAInfo) {
   // The PHI node has already been visited, avoid recursion any further.
   if (!Visited.insert(PN))
     return MayAlias;
@@ -935,16 +949,16 @@
   if (const PHINode *PN2 = dyn_cast<PHINode>(V2))
     if (PN2->getParent() == PN->getParent()) {
       AliasResult Alias =
-        aliasCheck(PN->getIncomingValue(0), PNSize,
+        aliasCheck(PN->getIncomingValue(0), PNSize, PNTBAAInfo,
                    PN2->getIncomingValueForBlock(PN->getIncomingBlock(0)),
-                   V2Size);
+                   V2Size, V2TBAAInfo);
       if (Alias == MayAlias)
         return MayAlias;
       for (unsigned i = 1, e = PN->getNumIncomingValues(); i != e; ++i) {
         AliasResult ThisAlias =
-          aliasCheck(PN->getIncomingValue(i), PNSize,
+          aliasCheck(PN->getIncomingValue(i), PNSize, PNTBAAInfo,
                      PN2->getIncomingValueForBlock(PN->getIncomingBlock(i)),
-                     V2Size);
+                     V2Size, V2TBAAInfo);
         if (ThisAlias != Alias)
           return MayAlias;
       }
@@ -965,7 +979,8 @@
       V1Srcs.push_back(PV1);
   }
 
-  AliasResult Alias = aliasCheck(V2, V2Size, V1Srcs[0], PNSize);
+  AliasResult Alias = aliasCheck(V2, V2Size, V2TBAAInfo,
+                                 V1Srcs[0], PNSize, PNTBAAInfo);
   // Early exit if the check of the first PHI source against V2 is MayAlias.
   // Other results are not possible.
   if (Alias == MayAlias)
@@ -981,7 +996,8 @@
     // don't need to assume that V2 is being visited recursively.
     Visited.erase(V2);
 
-    AliasResult ThisAlias = aliasCheck(V2, V2Size, V, PNSize);
+    AliasResult ThisAlias = aliasCheck(V2, V2Size, V2TBAAInfo,
+                                       V, PNSize, PNTBAAInfo);
     if (ThisAlias != Alias || ThisAlias == MayAlias)
       return MayAlias;
   }
@@ -994,7 +1010,9 @@
 //
 AliasAnalysis::AliasResult
 BasicAliasAnalysis::aliasCheck(const Value *V1, unsigned V1Size,
-                               const Value *V2, unsigned V2Size) {
+                               const MDNode *V1TBAAInfo,
+                               const Value *V2, unsigned V2Size,
+                               const MDNode *V2TBAAInfo) {
   // If either of the memory references is empty, it doesn't matter what the
   // pointer values are.
   if (V1Size == 0 || V2Size == 0)
@@ -1074,7 +1092,7 @@
     std::swap(O1, O2);
   }
   if (const GEPOperator *GV1 = dyn_cast<GEPOperator>(V1)) {
-    AliasResult Result = aliasGEP(GV1, V1Size, V2, V2Size, O1, O2);
+    AliasResult Result = aliasGEP(GV1, V1Size, V2, V2Size, V2TBAAInfo, O1, O2);
     if (Result != MayAlias) return Result;
   }
 
@@ -1083,7 +1101,8 @@
     std::swap(V1Size, V2Size);
   }
   if (const PHINode *PN = dyn_cast<PHINode>(V1)) {
-    AliasResult Result = aliasPHI(PN, V1Size, V2, V2Size);
+    AliasResult Result = aliasPHI(PN, V1Size, V1TBAAInfo,
+                                  V2, V2Size, V2TBAAInfo);
     if (Result != MayAlias) return Result;
   }
 
@@ -1092,11 +1111,13 @@
     std::swap(V1Size, V2Size);
   }
   if (const SelectInst *S1 = dyn_cast<SelectInst>(V1)) {
-    AliasResult Result = aliasSelect(S1, V1Size, V2, V2Size);
+    AliasResult Result = aliasSelect(S1, V1Size, V1TBAAInfo,
+                                     V2, V2Size, V2TBAAInfo);
     if (Result != MayAlias) return Result;
   }
 
-  return AliasAnalysis::alias(Location(V1, V1Size), Location(V2, V2Size));
+  return AliasAnalysis::alias(Location(V1, V1Size, V1TBAAInfo),
+                              Location(V2, V2Size, V2TBAAInfo));
 }
 
 // Make sure that anything that uses AliasAnalysis pulls in this file.



From gohman at apple.com  Mon Oct 18 13:45:59 2010
From: gohman at apple.com (Dan Gohman)
Date: Mon, 18 Oct 2010 18:45:59 -0000
Subject: [llvm-commits] [llvm] r116731 -
 /llvm/trunk/test/Analysis/TypeBasedAliasAnalysis/aliastest.ll
Message-ID: <20101018184559.2772F2A6C12C@llvm.org>

Author: djg
Date: Mon Oct 18 13:45:59 2010
New Revision: 116731

URL: http://llvm.org/viewvc/llvm-project?rev=116731&view=rev
Log:
Run tbaa before basicaa, since that's how it's expected to be used.

Modified:
    llvm/trunk/test/Analysis/TypeBasedAliasAnalysis/aliastest.ll

Modified: llvm/trunk/test/Analysis/TypeBasedAliasAnalysis/aliastest.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/TypeBasedAliasAnalysis/aliastest.ll?rev=116731&r1=116730&r2=116731&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/TypeBasedAliasAnalysis/aliastest.ll (original)
+++ llvm/trunk/test/Analysis/TypeBasedAliasAnalysis/aliastest.ll Mon Oct 18 13:45:59 2010
@@ -1,4 +1,4 @@
-; RUN: opt < %s -enable-tbaa -basicaa -tbaa -gvn -S | FileCheck %s
+; RUN: opt < %s -enable-tbaa -tbaa -basicaa -gvn -S | FileCheck %s
 
 ; CHECK: @test0_yes
 ; CHECK: add i8 %x, %x



From gohman at apple.com  Mon Oct 18 13:50:27 2010
From: gohman at apple.com (Dan Gohman)
Date: Mon, 18 Oct 2010 18:50:27 -0000
Subject: [llvm-commits] [llvm] r116732 - in /llvm/trunk:
 include/llvm/Support/StandardPasses.h lib/CodeGen/LLVMTargetMachine.cpp
Message-ID: <20101018185027.D36992A6C12C@llvm.org>

Author: djg
Date: Mon Oct 18 13:50:27 2010
New Revision: 116732

URL: http://llvm.org/viewvc/llvm-project?rev=116732&view=rev
Log:
Add TypeBasedAliasAnalysis to the standard pass lists. Note that it
is currently inert by default.

Modified:
    llvm/trunk/include/llvm/Support/StandardPasses.h
    llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp

Modified: llvm/trunk/include/llvm/Support/StandardPasses.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/StandardPasses.h?rev=116732&r1=116731&r2=116732&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/StandardPasses.h (original)
+++ llvm/trunk/include/llvm/Support/StandardPasses.h Mon Oct 18 13:50:27 2010
@@ -69,10 +69,18 @@
 
   // Implementations
 
+  static inline void createStandardAliasAnalysisPasses(PassManagerBase *PM) {
+    // Add TypeBasedAliasAnalysis before BasicAliasAnalysis so that
+    // BasicAliasAnalysis wins if they disagree. This is intended to help
+    // support "obvious" type-punning idioms.
+    PM->add(createTypeBasedAliasAnalysisPass());
+    PM->add(createBasicAliasAnalysisPass());
+  }
+
   static inline void createStandardFunctionPasses(PassManagerBase *PM,
                                                   unsigned OptimizationLevel) {
     if (OptimizationLevel > 0) {
-      PM->add(createBasicAliasAnalysisPass());
+      createStandardAliasAnalysisPasses(PM);
       PM->add(createCFGSimplificationPass());
       if (OptimizationLevel == 1)
         PM->add(createPromoteMemoryToRegisterPass());
@@ -92,7 +100,7 @@
                                                 bool SimplifyLibCalls,
                                                 bool HaveExceptions,
                                                 Pass *InliningPass) {
-    PM->add(createBasicAliasAnalysisPass());
+    createStandardAliasAnalysisPasses(PM);
 
     if (OptimizationLevel == 0) {
       if (InliningPass)
@@ -181,7 +189,7 @@
                                              bool RunInliner,
                                              bool VerifyEach) {
     // Provide AliasAnalysis services for optimizations.
-    PM->add(createBasicAliasAnalysisPass());
+    createStandardAliasAnalysisPasses(PM);
 
     // Now that composite has been compiled, scan through the module, looking
     // for a main function.  If main is defined, mark all other functions

Modified: llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp?rev=116732&r1=116731&r2=116732&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp (original)
+++ llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp Mon Oct 18 13:50:27 2010
@@ -14,7 +14,6 @@
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/PassManager.h"
 #include "llvm/Analysis/Verifier.h"
-#include "llvm/Analysis/Passes.h"
 #include "llvm/Assembly/PrintModulePass.h"
 #include "llvm/CodeGen/AsmPrinter.h"
 #include "llvm/CodeGen/MachineFunctionAnalysis.h"
@@ -31,6 +30,7 @@
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/FormattedStream.h"
+#include "llvm/Support/StandardPasses.h"
 using namespace llvm;
 
 namespace llvm {
@@ -256,7 +256,7 @@
   // Standard LLVM-Level Passes.
 
   // Basic AliasAnalysis support.
-  PM.add(createBasicAliasAnalysisPass());
+  createStandardAliasAnalysisPasses(&PM);
 
   // Before running any passes, run the verifier to determine if the input
   // coming from the front-end and/or optimizer is valid.



From dpatel at apple.com  Mon Oct 18 13:53:44 2010
From: dpatel at apple.com (Devang Patel)
Date: Mon, 18 Oct 2010 18:53:44 -0000
Subject: [llvm-commits] [llvm] r116733 -
	/llvm/trunk/lib/Transforms/Utils/LowerInvoke.cpp
Message-ID: <20101018185344.4737B2A6C12C@llvm.org>

Author: dpatel
Date: Mon Oct 18 13:53:44 2010
New Revision: 116733

URL: http://llvm.org/viewvc/llvm-project?rev=116733&view=rev
Log:
Transfer debug loc to lowered call.
Patch by Alexander Herz!


Modified:
    llvm/trunk/lib/Transforms/Utils/LowerInvoke.cpp

Modified: llvm/trunk/lib/Transforms/Utils/LowerInvoke.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/LowerInvoke.cpp?rev=116733&r1=116732&r2=116733&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Utils/LowerInvoke.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/LowerInvoke.cpp Mon Oct 18 13:53:44 2010
@@ -187,6 +187,7 @@
       NewCall->takeName(II);
       NewCall->setCallingConv(II->getCallingConv());
       NewCall->setAttributes(II->getAttributes());
+      NewCall->setDebugLoc(II->getDebugLoc());
       II->replaceAllUsesWith(NewCall);
 
       // Insert an unconditional branch to the normal destination.
@@ -267,6 +268,7 @@
   NewCall->takeName(II);
   NewCall->setCallingConv(II->getCallingConv());
   NewCall->setAttributes(II->getAttributes());
+  NewCall->setDebugLoc(II->getDebugLoc());
   II->replaceAllUsesWith(NewCall);
 
   // Replace the invoke with an uncond branch.



From isanbard at gmail.com  Mon Oct 18 13:55:29 2010
From: isanbard at gmail.com (Bill Wendling)
Date: Mon, 18 Oct 2010 18:55:29 -0000
Subject: [llvm-commits] [llvm-gcc-4.2] r116734 - in
 /llvm-gcc-4.2/trunk/gcc/testsuite: gcc.apple/4656532.c
 gcc.target/i386/sse-99.c
Message-ID: <20101018185529.2854C2A6C12C@llvm.org>

Author: void
Date: Mon Oct 18 13:55:28 2010
New Revision: 116734

URL: http://llvm.org/viewvc/llvm-project?rev=116734&view=rev
Log:
If this doesn't disable these tests and stop them failing for clang, then I
don't know what will.

Modified:
    llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4656532.c
    llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/sse-99.c

Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4656532.c
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4656532.c?rev=116734&r1=116733&r2=116734&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4656532.c (original)
+++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.apple/4656532.c Mon Oct 18 13:55:28 2010
@@ -1,8 +1,6 @@
 /* APPLE LOCAL file 4656532 */
 /* { dg-do compile { target "i?86-*-darwin*" } } */
 /* { dg-options "-O2" } */
-/* LLVM LOCAL disable test for optimizing MMX */
-/* { dg-skip-if "" { *-*-* } { "*" } { "" } } */
 #include <mmintrin.h>
 __m64 x, y;
 void t1(int n) {
@@ -19,4 +17,4 @@
 }
 
 /* { dg-final { scan-assembler-not "cltd" } } */
-/* { dg-final { scan-assembler-not "\\\-16\\\(\\\%ebp\\\)" } } */
+/* LLVM LOCAL remove scan-assembler-not test for optimizing MMX */

Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/sse-99.c
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/sse-99.c?rev=116734&r1=116733&r2=116734&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/sse-99.c (original)
+++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/i386/sse-99.c Mon Oct 18 13:55:28 2010
@@ -5,9 +5,8 @@
 /* APPLE LOCAL begin radar 4875125 */
 /* { dg-options "-O3 -msse -mtune=generic" } */
 /* APPLE LOCAL end radar 4875125 */
-/* { dg-final { scan-assembler-times "movq" 4 } } */
 /* LLVM LOCAL disable test for optimizing MMX */
-/* { dg-skip-if "" { *-*-* } { "*" } { "" } } */
+/* { DISABLE { scan-assembler-times "movq" 4 } } */
 
 /* PR target/23630 */
 /* PR middle-end/23517 */



From rafael.espindola at gmail.com  Mon Oct 18 14:33:01 2010
From: rafael.espindola at gmail.com (Rafael Espindola)
Date: Mon, 18 Oct 2010 19:33:01 -0000
Subject: [llvm-commits] [llvm] r116738 -
	/llvm/trunk/lib/MC/ELFObjectWriter.cpp
Message-ID: <20101018193301.7CA2D2A6C12E@llvm.org>

Author: rafael
Date: Mon Oct 18 14:33:01 2010
New Revision: 116738

URL: http://llvm.org/viewvc/llvm-project?rev=116738&view=rev
Log:
Reenable assert.

Modified:
    llvm/trunk/lib/MC/ELFObjectWriter.cpp

Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=116738&r1=116737&r2=116738&view=diff
==============================================================================
--- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original)
+++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Mon Oct 18 14:33:01 2010
@@ -684,8 +684,9 @@
     if (IsPCRel) {
       switch (Modifier) {
       default:
+        llvm_unreachable("Unimplemented");
+      case MCSymbolRefExpr::VK_None:
         Type = ELF::R_386_PC32;
-        //llvm_unreachable("Unimplemented");
         break;
       case MCSymbolRefExpr::VK_PLT:
         Type = ELF::R_386_PLT32;



From baldrick at free.fr  Mon Oct 18 14:38:40 2010
From: baldrick at free.fr (Duncan Sands)
Date: Mon, 18 Oct 2010 21:38:40 +0200
Subject: [llvm-commits] [llvm] r116720 - in /llvm/trunk:
 include/llvm/Support/ lib/Analysis/ lib/CodeGen/ test/Analysis/BasicAA/
 test/Analysis/GlobalsModRef/ test/Analysis/LoopDependenceAnalysis/
 test/Analysis/TypeBasedAliasAnalysis/ test/Other/
 test/Transforms/ArgumentPromotion/ test/Transforms/DeadStoreElimination/
 test/Transforms/GVN/ test/Transforms/Inline/ test/Transforms/LICM/
 test/Transforms/MemCpyOpt/ test/Transforms/Sink/
In-Reply-To: <20101018180449.02B6E2A6C12C@llvm.org>
References: <20101018180449.02B6E2A6C12C@llvm.org>
Message-ID: <4CBCA240.3020300@free.fr>

Hi Dan,

> Make BasicAliasAnalysis a normal AliasAnalysis implementation which
> does normal initialization and normal chaining. Change the default
> AliasAnalysis implementation to NoAlias.
>
> Update StandardCompileOpts.h and friends to explicitly request
> BasicAliasAnalysis.

it used to be that if you requested a more advanced alias analysis
(eg: globalsmodref-aa) then it would be used for the following pass,
but later passes would go back to basic-aa.  Has this been fixed?

Ciao,

Duncan.

From criswell at uiuc.edu  Mon Oct 18 15:01:22 2010
From: criswell at uiuc.edu (John Criswell)
Date: Mon, 18 Oct 2010 20:01:22 -0000
Subject: [llvm-commits] [poolalloc] r116739 - in /poolalloc/trunk:
 include/dsa/DataStructure.h lib/DSA/StdLibPass.cpp
Message-ID: <20101018200122.7437C2A6C12C@llvm.org>

Author: criswell
Date: Mon Oct 18 15:01:22 2010
New Revision: 116739

URL: http://llvm.org/viewvc/llvm-project?rev=116739&view=rev
Log:
Added code to process the SAFECode run-time checks.
This fixes a false alarm with SAFECode on 181.mcf. 

Modified:
    poolalloc/trunk/include/dsa/DataStructure.h
    poolalloc/trunk/lib/DSA/StdLibPass.cpp

Modified: poolalloc/trunk/include/dsa/DataStructure.h
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/dsa/DataStructure.h?rev=116739&r1=116738&r2=116739&view=diff
==============================================================================
--- poolalloc/trunk/include/dsa/DataStructure.h (original)
+++ poolalloc/trunk/include/dsa/DataStructure.h Mon Oct 18 15:01:22 2010
@@ -186,6 +186,7 @@
 // functions and generates graphs for them.
 class StdLibDataStructures : public DataStructures {
   void eraseCallsTo(Function* F);
+  void processRuntimeCheck (Module & M, std::string name);
 public:
   static char ID;
   StdLibDataStructures() : DataStructures((intptr_t)&ID, "stdlib.") {}

Modified: poolalloc/trunk/lib/DSA/StdLibPass.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/StdLibPass.cpp?rev=116739&r1=116738&r2=116739&view=diff
==============================================================================
--- poolalloc/trunk/lib/DSA/StdLibPass.cpp (original)
+++ poolalloc/trunk/lib/DSA/StdLibPass.cpp Mon Oct 18 15:01:22 2010
@@ -149,6 +149,19 @@
 
   {"perror",     {NRET_YARGS,  NRET_NARGS, NRET_NARGS, false, false, false}},
 
+  // SAFECode Intrinsics
+  {"sc.lscheck", {NRET_NARGS, NRET_NARGS, NRET_NARGS, false, false, false}},
+  {"sc.lscheckui", {NRET_NARGS, NRET_NARGS, NRET_NARGS, false, false, false}},
+  {"sc.lscheckalign", {NRET_NARGS, NRET_NARGS, NRET_NARGS, false, false, false}},
+  {"sc.lscheckalignui", {NRET_NARGS, NRET_NARGS, NRET_NARGS, false, false, false}},
+  {"sc.pool_register_stack", {NRET_NARGS, NRET_NARGS, NRET_NARGS, false, false, false}},
+  {"sc.pool_unregister_stack", {NRET_NARGS, NRET_NARGS, NRET_NARGS, false, false, false}},
+  {"sc.pool_register_global", {NRET_NARGS, NRET_NARGS, NRET_NARGS, false, false, false}},
+  {"sc.pool_unregister_global", {NRET_NARGS, NRET_NARGS, NRET_NARGS, false, false, false}},
+  {"sc.pool_register", {NRET_NARGS, NRET_NARGS, NRET_NARGS, false, false, false}},
+  {"sc.pool_unregister", {NRET_NARGS, NRET_NARGS, NRET_NARGS, false, false, false}},
+  {"sc.get_actual_val", {NRET_NARGS, NRET_NARGS, NRET_NARGS, false, true, false}},
+
 #if 0
   {"remove",     {false, false, false,  true, false, false, false, false, false}},
   {"unlink",     {false, false, false,  true, false, false, false, false, false}},
@@ -219,6 +232,44 @@
       }
 }
 
+//
+// Function: processRuntimeCheck()
+//
+// Description:
+//  Modify a run-time check so that its return value has the same DSNode as the
+//  checked pointer.
+//
+void
+StdLibDataStructures::processRuntimeCheck (Module & M, std::string name) {
+  //
+  // Get a pointer to the function.
+  //
+  Function* F = M.getFunction (name);
+
+  //
+  // If the function doesn't exist, then there is no work to do.
+  //
+  if (!F) return;
+
+  //
+  // Scan through all direct calls to the function (there should only be direct
+  // calls) and process each one.
+  //
+  for (Value::use_iterator ii = F->use_begin(), ee = F->use_end();
+       ii != ee; ++ii) {
+    if (CallInst* CI = dyn_cast<CallInst>(ii)) {
+      if (CI->getOperand(0) == F) {
+        DSGraph* Graph = getDSGraph(*CI->getParent()->getParent());
+        DSNodeHandle RetNode = Graph->getNodeForValue(CI);
+        DSNodeHandle ArgNode = Graph->getNodeForValue(CI->getOperand(2));
+        RetNode.mergeWith(ArgNode);
+      }
+    }
+  }
+
+  return;
+}
+
 bool
 StdLibDataStructures::runOnModule (Module &M) {
   //
@@ -338,5 +389,13 @@
         eraseCallsTo(F);
       }
   
+  //
+  // Merge return values and checked pointer values for SAFECode run-time
+  // checks.
+  //
+  processRuntimeCheck (M, "sc.boundscheck");
+  processRuntimeCheck (M, "sc.boundscheckui");
+  processRuntimeCheck (M, "sc.exactcheck2");
+
   return false;
 }



From criswell at uiuc.edu  Mon Oct 18 15:03:16 2010
From: criswell at uiuc.edu (John Criswell)
Date: Mon, 18 Oct 2010 20:03:16 -0000
Subject: [llvm-commits] [poolalloc] r116740 - in /poolalloc/trunk:
 include/poolalloc/PoolAllocate.h lib/PoolAllocate/PoolAllocate.cpp
Message-ID: <20101018200316.A32852A6C12C@llvm.org>

Author: criswell
Date: Mon Oct 18 15:03:16 2010
New Revision: 116740

URL: http://llvm.org/viewvc/llvm-project?rev=116740&view=rev
Log:
Give different base names to global pools depending on whether they are for
global DSNode or local DSNodes that are created in main().

Modified:
    poolalloc/trunk/include/poolalloc/PoolAllocate.h
    poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp

Modified: poolalloc/trunk/include/poolalloc/PoolAllocate.h
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/poolalloc/PoolAllocate.h?rev=116740&r1=116739&r2=116740&view=diff
==============================================================================
--- poolalloc/trunk/include/poolalloc/PoolAllocate.h (original)
+++ poolalloc/trunk/include/poolalloc/PoolAllocate.h Mon Oct 18 15:03:16 2010
@@ -318,7 +318,7 @@
   /// CreateGlobalPool - Create a global pool descriptor, initialize it in main,
   /// and return a pointer to the global for it.
   GlobalVariable *CreateGlobalPool(unsigned RecSize, unsigned Alignment,
-                                   Instruction *IPHint = 0);
+                                   std::string name = "GlobalPool", Instruction *IPHint = 0);
 
   /// getPoolType - Return the type of a pool descriptor
   /// FIXME: These constants should be chosen by the client

Modified: poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp?rev=116740&r1=116739&r2=116740&view=diff
==============================================================================
--- poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp (original)
+++ poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp Mon Oct 18 15:03:16 2010
@@ -971,7 +971,7 @@
     Heuristic::OnePool &Pool = ResultPools[i];
     Value *PoolDesc = Pool.PoolDesc;
     if (PoolDesc == 0) {
-      PoolDesc = CreateGlobalPool(Pool.PoolSize, Pool.PoolAlignment, InsertPt);
+      PoolDesc = CreateGlobalPool(Pool.PoolSize, Pool.PoolAlignment, "GlobalPool", InsertPt);
 
       if (Pool.NodesInPool.size() == 1 &&
           !Pool.NodesInPool[0]->isNodeCompletelyFolded())
@@ -997,11 +997,11 @@
 /// poolinit for it into main.  IPHint is an instruction that we should insert
 /// the poolinit before if not null.
 GlobalVariable *PoolAllocate::CreateGlobalPool(unsigned RecSize, unsigned Align,
-                                               Instruction *IPHint) {
+                                               std::string name, Instruction *IPHint) {
   GlobalVariable *GV =
     new GlobalVariable(*CurModule,
                        PoolDescType, false, GlobalValue::InternalLinkage, 
-                       ConstantAggregateZero::get(PoolDescType), "GlobalPool");
+                       ConstantAggregateZero::get(PoolDescType), name);
 
   // Update the global DSGraph to include this.
   DSNode *GNode = Graphs->getGlobalsGraph()->addObjectToGraph(GV);
@@ -1072,7 +1072,7 @@
         NewNode->setModifiedMarker()->setReadMarker();  // This is M/R
       } else {
         PoolDesc = CreateGlobalPool(Pool.PoolSize, Pool.PoolAlignment,
-                                    InsertPoint);
+                                    "PoolForMain", InsertPoint);
 
         // Add the global node to main's graph.
         DSNode *NewNode = DSG->addObjectToGraph(PoolDesc);



From rafael.espindola at gmail.com  Mon Oct 18 15:25:33 2010
From: rafael.espindola at gmail.com (Rafael Espindola)
Date: Mon, 18 Oct 2010 20:25:33 -0000
Subject: [llvm-commits] [llvm] r116741 - in /llvm/trunk:
 lib/MC/ELFObjectWriter.cpp test/MC/ELF/relocation-386.s
Message-ID: <20101018202533.D582A2A6C12C@llvm.org>

Author: rafael
Date: Mon Oct 18 15:25:33 2010
New Revision: 116741

URL: http://llvm.org/viewvc/llvm-project?rev=116741&view=rev
Log:
Relocate with .bss instead of using the symbol. Matches gas behavior.

Modified:
    llvm/trunk/lib/MC/ELFObjectWriter.cpp
    llvm/trunk/test/MC/ELF/relocation-386.s

Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=116741&r1=116740&r2=116741&view=diff
==============================================================================
--- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original)
+++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Mon Oct 18 15:25:33 2010
@@ -560,6 +560,9 @@
   const MCSectionELF &Sec2 =
     static_cast<const MCSectionELF&>(F.getParent()->getSection());
 
+  if (Section.getKind().isBSS())
+    return false;
+
   if (&Sec2 != &Section &&
       (Kind == MCSymbolRefExpr::VK_PLT ||
        Kind == MCSymbolRefExpr::VK_GOTPCREL ||

Modified: llvm/trunk/test/MC/ELF/relocation-386.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/relocation-386.s?rev=116741&r1=116740&r2=116741&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/relocation-386.s (original)
+++ llvm/trunk/test/MC/ELF/relocation-386.s Mon Oct 18 15:25:33 2010
@@ -3,10 +3,23 @@
 // Test that we produce the correct relocation types and that the relocation
 // to .Lfoo uses the symbol and not the section.
 
+// Section 3 is bss
+// CHECK:      # Section 3
+// CHECK-NEXT: (('sh_name', 13) # '.bss'
 
 // CHECK:      # Symbol 1
 // CHECK-NEXT: (('st_name', 5) # '.Lfoo'
 
+// Symbol 6 is section 3
+// CHECK:      # Symbol 6
+// CHECK-NEXT: (('st_name', 0) # ''
+// CHECK-NEXT:  ('st_value', 0)
+// CHECK-NEXT:  ('st_size', 0)
+// CHECK-NEXT:  ('st_bind', 0)
+// CHECK-NEXT:  ('st_type', 3)
+// CHECK-NEXT:  ('st_other', 0)
+// CHECK-NEXT:  ('st_shndx', 3)
+
 // CHECK:      # Relocation 0
 // CHECK-NEXT: (('r_offset', 2)
 // CHECK-NEXT:  ('r_sym', 1)
@@ -23,6 +36,13 @@
 // CHECK-NEXT:  ('r_type', 10)
 // CHECK-NEXT: ),
 
+// Relocation 3 (bar3 at GOTOFF) is done symbol 6 (bss)
+// CHECK-NEXT:  # Relocation 3
+// CHECK-NEXT: (('r_offset',
+// CHECK-NEXT:  ('r_sym', 6
+// CHECK-NEXT:  ('r_type',
+// CHECK-NEXT: ),
+
         .text
 bar:
 	leal	.Lfoo at GOTOFF(%ebx), %eax
@@ -31,6 +51,11 @@
 bar2:
 	calll	bar2 at PLT
 	addl	$_GLOBAL_OFFSET_TABLE_, %ebx
+	movb	bar3 at GOTOFF(%ebx), %al
+
+	.type	bar3, at object
+	.local	bar3
+	.comm	bar3,1,1
 
         .section	.rodata.str1.16,"aMS", at progbits,1
 .Lfoo:



From gohman at apple.com  Mon Oct 18 15:44:50 2010
From: gohman at apple.com (Dan Gohman)
Date: Mon, 18 Oct 2010 20:44:50 -0000
Subject: [llvm-commits] [llvm] r116743 - in /llvm/trunk:
 include/llvm/Analysis/AliasSetTracker.h include/llvm/LinkAllPasses.h
 lib/Analysis/AliasSetTracker.cpp lib/Transforms/Scalar/LICM.cpp
Message-ID: <20101018204450.7E4A92A6C12C@llvm.org>

Author: djg
Date: Mon Oct 18 15:44:50 2010
New Revision: 116743

URL: http://llvm.org/viewvc/llvm-project?rev=116743&view=rev
Log:
Make AliasSetTracker TBAA-aware, enabling TBAA-enabled LICM.

Modified:
    llvm/trunk/include/llvm/Analysis/AliasSetTracker.h
    llvm/trunk/include/llvm/LinkAllPasses.h
    llvm/trunk/lib/Analysis/AliasSetTracker.cpp
    llvm/trunk/lib/Transforms/Scalar/LICM.cpp

Modified: llvm/trunk/include/llvm/Analysis/AliasSetTracker.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/AliasSetTracker.h?rev=116743&r1=116742&r2=116743&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/AliasSetTracker.h (original)
+++ llvm/trunk/include/llvm/Analysis/AliasSetTracker.h Mon Oct 18 15:44:50 2010
@@ -41,9 +41,10 @@
     PointerRec **PrevInList, *NextInList;
     AliasSet *AS;
     unsigned Size;
+    const MDNode *TBAAInfo;
   public:
     PointerRec(Value *V)
-      : Val(V), PrevInList(0), NextInList(0), AS(0), Size(0) {}
+      : Val(V), PrevInList(0), NextInList(0), AS(0), Size(0), TBAAInfo(0) {}
 
     Value *getValue() const { return Val; }
     
@@ -55,12 +56,19 @@
       return &NextInList;
     }
 
-    void updateSize(unsigned NewSize) {
+    void updateSizeAndTBAAInfo(unsigned NewSize, const MDNode *NewTBAAInfo) {
       if (NewSize > Size) Size = NewSize;
+
+      if (!TBAAInfo)
+        TBAAInfo = NewTBAAInfo;
+      else if (TBAAInfo != NewTBAAInfo)
+        TBAAInfo = reinterpret_cast<const MDNode *>(-1);
     }
 
     unsigned getSize() const { return Size; }
 
+    const MDNode *getTBAAInfo() const { return TBAAInfo; }
+
     AliasSet *getAliasSet(AliasSetTracker &AST) {
       assert(AS && "No AliasSet yet!");
       if (AS->Forward) {
@@ -187,6 +195,7 @@
 
     Value *getPointer() const { return CurNode->getValue(); }
     unsigned getSize() const { return CurNode->getSize(); }
+    const MDNode *getTBAAInfo() const { return CurNode->getTBAAInfo(); }
 
     iterator& operator++() {                // Preincrement
       assert(CurNode && "Advancing past AliasSet.end()!");
@@ -231,6 +240,7 @@
   void removeFromTracker(AliasSetTracker &AST);
 
   void addPointer(AliasSetTracker &AST, PointerRec &Entry, unsigned Size,
+                  const MDNode *TBAAInfo,
                   bool KnownMustAlias = false);
   void addCallSite(CallSite CS, AliasAnalysis &AA);
   void removeCallSite(CallSite CS) {
@@ -245,7 +255,8 @@
   /// aliasesPointer - Return true if the specified pointer "may" (or must)
   /// alias one of the members in the set.
   ///
-  bool aliasesPointer(const Value *Ptr, unsigned Size, AliasAnalysis &AA) const;
+  bool aliasesPointer(const Value *Ptr, unsigned Size, const MDNode *TBAAInfo,
+                      AliasAnalysis &AA) const;
   bool aliasesCallSite(CallSite CS, AliasAnalysis &AA) const;
 };
 
@@ -298,7 +309,7 @@
   /// These methods return true if inserting the instruction resulted in the
   /// addition of a new alias set (i.e., the pointer did not alias anything).
   ///
-  bool add(Value *Ptr, unsigned Size);  // Add a location
+  bool add(Value *Ptr, unsigned Size, const MDNode *TBAAInfo); // Add a location
   bool add(LoadInst *LI);
   bool add(StoreInst *SI);
   bool add(VAArgInst *VAAI);
@@ -312,7 +323,8 @@
   /// remove methods - These methods are used to remove all entries that might
   /// be aliased by the specified instruction.  These methods return true if any
   /// alias sets were eliminated.
-  bool remove(Value *Ptr, unsigned Size);  // Remove a location
+  // Remove a location
+  bool remove(Value *Ptr, unsigned Size, const MDNode *TBAAInfo);
   bool remove(LoadInst *LI);
   bool remove(StoreInst *SI);
   bool remove(VAArgInst *VAAI);
@@ -332,18 +344,21 @@
   /// lives in.  If the New argument is non-null, this method sets the value to
   /// true if a new alias set is created to contain the pointer (because the
   /// pointer didn't alias anything).
-  AliasSet &getAliasSetForPointer(Value *P, unsigned Size, bool *New = 0);
+  AliasSet &getAliasSetForPointer(Value *P, unsigned Size,
+                                  const MDNode *TBAAInfo,
+                                  bool *New = 0);
 
   /// getAliasSetForPointerIfExists - Return the alias set containing the
   /// location specified if one exists, otherwise return null.
-  AliasSet *getAliasSetForPointerIfExists(Value *P, unsigned Size) {
-    return findAliasSetForPointer(P, Size);
+  AliasSet *getAliasSetForPointerIfExists(Value *P, unsigned Size,
+                                          const MDNode *TBAAInfo) {
+    return findAliasSetForPointer(P, Size, TBAAInfo);
   }
 
   /// containsPointer - Return true if the specified location is represented by
   /// this alias set, false otherwise.  This does not modify the AST object or
   /// alias sets.
-  bool containsPointer(Value *P, unsigned Size) const;
+  bool containsPointer(Value *P, unsigned Size, const MDNode *TBAAInfo) const;
 
   /// getAliasAnalysis - Return the underlying alias analysis object used by
   /// this tracker.
@@ -390,14 +405,16 @@
     return *Entry;
   }
 
-  AliasSet &addPointer(Value *P, unsigned Size, AliasSet::AccessType E,
+  AliasSet &addPointer(Value *P, unsigned Size, const MDNode *TBAAInfo,
+                       AliasSet::AccessType E,
                        bool &NewSet) {
     NewSet = false;
-    AliasSet &AS = getAliasSetForPointer(P, Size, &NewSet);
+    AliasSet &AS = getAliasSetForPointer(P, Size, TBAAInfo, &NewSet);
     AS.AccessTy |= E;
     return AS;
   }
-  AliasSet *findAliasSetForPointer(const Value *Ptr, unsigned Size);
+  AliasSet *findAliasSetForPointer(const Value *Ptr, unsigned Size,
+                                   const MDNode *TBAAInfo);
 
   AliasSet *findAliasSetForCallSite(CallSite CS);
 };

Modified: llvm/trunk/include/llvm/LinkAllPasses.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/LinkAllPasses.h?rev=116743&r1=116742&r2=116743&view=diff
==============================================================================
--- llvm/trunk/include/llvm/LinkAllPasses.h (original)
+++ llvm/trunk/include/llvm/LinkAllPasses.h Mon Oct 18 15:44:50 2010
@@ -152,7 +152,7 @@
       (void)new llvm::ScalarEvolution();
       ((llvm::Function*)0)->viewCFGOnly();
       llvm::AliasSetTracker X(*(llvm::AliasAnalysis*)0);
-      X.add((llvm::Value*)0, 0);  // for -print-alias-sets
+      X.add((llvm::Value*)0, 0, 0);  // for -print-alias-sets
     }
   } ForcePassLinking; // Force link by creating a global definition.
 }

Modified: llvm/trunk/lib/Analysis/AliasSetTracker.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/AliasSetTracker.cpp?rev=116743&r1=116742&r2=116743&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/AliasSetTracker.cpp (original)
+++ llvm/trunk/lib/Analysis/AliasSetTracker.cpp Mon Oct 18 15:44:50 2010
@@ -15,6 +15,7 @@
 #include "llvm/Analysis/AliasAnalysis.h"
 #include "llvm/Instructions.h"
 #include "llvm/IntrinsicInst.h"
+#include "llvm/LLVMContext.h"
 #include "llvm/Pass.h"
 #include "llvm/Type.h"
 #include "llvm/Target/TargetData.h"
@@ -87,7 +88,8 @@
 }
 
 void AliasSet::addPointer(AliasSetTracker &AST, PointerRec &Entry,
-                          unsigned Size, bool KnownMustAlias) {
+                          unsigned Size, const MDNode *TBAAInfo,
+                          bool KnownMustAlias) {
   assert(!Entry.hasAliasSet() && "Entry already in set!");
 
   // Check to see if we have to downgrade to _may_ alias.
@@ -95,16 +97,18 @@
     if (PointerRec *P = getSomePointer()) {
       AliasAnalysis &AA = AST.getAliasAnalysis();
       AliasAnalysis::AliasResult Result =
-        AA.alias(P->getValue(), P->getSize(), Entry.getValue(), Size);
+        AA.alias(AliasAnalysis::Location(P->getValue(), P->getSize(),
+                                         P->getTBAAInfo()),
+                 AliasAnalysis::Location(Entry.getValue(), Size, TBAAInfo));
       if (Result == AliasAnalysis::MayAlias)
         AliasTy = MayAlias;
       else                  // First entry of must alias must have maximum size!
-        P->updateSize(Size);
+        P->updateSizeAndTBAAInfo(Size, TBAAInfo);
       assert(Result != AliasAnalysis::NoAlias && "Cannot be part of must set!");
     }
 
   Entry.setAliasSet(this);
-  Entry.updateSize(Size);
+  Entry.updateSizeAndTBAAInfo(Size, TBAAInfo);
 
   // Add it to the end of the list...
   assert(*PtrListEnd == 0 && "End of list is not null?");
@@ -135,6 +139,7 @@
 /// alias one of the members in the set.
 ///
 bool AliasSet::aliasesPointer(const Value *Ptr, unsigned Size,
+                              const MDNode *TBAAInfo,
                               AliasAnalysis &AA) const {
   if (AliasTy == MustAlias) {
     assert(CallSites.empty() && "Illegal must alias set!");
@@ -143,19 +148,25 @@
     // SOME value in the set.
     PointerRec *SomePtr = getSomePointer();
     assert(SomePtr && "Empty must-alias set??");
-    return AA.alias(SomePtr->getValue(), SomePtr->getSize(), Ptr, Size);
+    return AA.alias(AliasAnalysis::Location(SomePtr->getValue(),
+                                            SomePtr->getSize(),
+                                            SomePtr->getTBAAInfo()),
+                    AliasAnalysis::Location(Ptr, Size, TBAAInfo));
   }
 
   // If this is a may-alias set, we have to check all of the pointers in the set
   // to be sure it doesn't alias the set...
   for (iterator I = begin(), E = end(); I != E; ++I)
-    if (AA.alias(Ptr, Size, I.getPointer(), I.getSize()))
+    if (AA.alias(AliasAnalysis::Location(Ptr, Size, TBAAInfo),
+                 AliasAnalysis::Location(I.getPointer(), I.getSize(), I.getTBAAInfo())))
       return true;
 
   // Check the call sites list and invoke list...
   if (!CallSites.empty()) {
     for (unsigned i = 0, e = CallSites.size(); i != e; ++i)
-      if (AA.getModRefInfo(CallSites[i], Ptr, Size) != AliasAnalysis::NoModRef)
+      if (AA.getModRefInfo(CallSites[i],
+                           AliasAnalysis::Location(Ptr, Size, TBAAInfo)) !=
+            AliasAnalysis::NoModRef)
         return true;
   }
 
@@ -198,10 +209,11 @@
 /// that may alias the pointer, merge them together and return the unified set.
 ///
 AliasSet *AliasSetTracker::findAliasSetForPointer(const Value *Ptr,
-                                                  unsigned Size) {
+                                                  unsigned Size,
+                                                  const MDNode *TBAAInfo) {
   AliasSet *FoundSet = 0;
   for (iterator I = begin(), E = end(); I != E; ++I) {
-    if (I->Forward || !I->aliasesPointer(Ptr, Size, AA)) continue;
+    if (I->Forward || !I->aliasesPointer(Ptr, Size, TBAAInfo, AA)) continue;
     
     if (FoundSet == 0) {  // If this is the first alias set ptr can go into.
       FoundSet = I;       // Remember it.
@@ -216,9 +228,10 @@
 /// containsPointer - Return true if the specified location is represented by
 /// this alias set, false otherwise.  This does not modify the AST object or
 /// alias sets.
-bool AliasSetTracker::containsPointer(Value *Ptr, unsigned Size) const {
+bool AliasSetTracker::containsPointer(Value *Ptr, unsigned Size,
+                                      const MDNode *TBAAInfo) const {
   for (const_iterator I = begin(), E = end(); I != E; ++I)
-    if (!I->Forward && I->aliasesPointer(Ptr, Size, AA))
+    if (!I->Forward && I->aliasesPointer(Ptr, Size, TBAAInfo, AA))
       return true;
   return false;
 }
@@ -245,32 +258,33 @@
 /// getAliasSetForPointer - Return the alias set that the specified pointer
 /// lives in.
 AliasSet &AliasSetTracker::getAliasSetForPointer(Value *Pointer, unsigned Size,
+                                                 const MDNode *TBAAInfo,
                                                  bool *New) {
   AliasSet::PointerRec &Entry = getEntryFor(Pointer);
 
   // Check to see if the pointer is already known.
   if (Entry.hasAliasSet()) {
-    Entry.updateSize(Size);
+    Entry.updateSizeAndTBAAInfo(Size, TBAAInfo);
     // Return the set!
     return *Entry.getAliasSet(*this)->getForwardedTarget(*this);
   }
   
-  if (AliasSet *AS = findAliasSetForPointer(Pointer, Size)) {
+  if (AliasSet *AS = findAliasSetForPointer(Pointer, Size, TBAAInfo)) {
     // Add it to the alias set it aliases.
-    AS->addPointer(*this, Entry, Size);
+    AS->addPointer(*this, Entry, Size, TBAAInfo);
     return *AS;
   }
   
   if (New) *New = true;
   // Otherwise create a new alias set to hold the loaded pointer.
   AliasSets.push_back(new AliasSet());
-  AliasSets.back().addPointer(*this, Entry, Size);
+  AliasSets.back().addPointer(*this, Entry, Size, TBAAInfo);
   return AliasSets.back();
 }
 
-bool AliasSetTracker::add(Value *Ptr, unsigned Size) {
+bool AliasSetTracker::add(Value *Ptr, unsigned Size, const MDNode *TBAAInfo) {
   bool NewPtr;
-  addPointer(Ptr, Size, AliasSet::NoModRef, NewPtr);
+  addPointer(Ptr, Size, TBAAInfo, AliasSet::NoModRef, NewPtr);
   return NewPtr;
 }
 
@@ -279,6 +293,7 @@
   bool NewPtr;
   AliasSet &AS = addPointer(LI->getOperand(0),
                             AA.getTypeStoreSize(LI->getType()),
+                            LI->getMetadata(LLVMContext::MD_tbaa),
                             AliasSet::Refs, NewPtr);
   if (LI->isVolatile()) AS.setVolatile();
   return NewPtr;
@@ -289,6 +304,7 @@
   Value *Val = SI->getOperand(0);
   AliasSet &AS = addPointer(SI->getOperand(1),
                             AA.getTypeStoreSize(Val->getType()),
+                            SI->getMetadata(LLVMContext::MD_tbaa),
                             AliasSet::Mods, NewPtr);
   if (SI->isVolatile()) AS.setVolatile();
   return NewPtr;
@@ -296,7 +312,9 @@
 
 bool AliasSetTracker::add(VAArgInst *VAAI) {
   bool NewPtr;
-  addPointer(VAAI->getOperand(0), ~0, AliasSet::ModRef, NewPtr);
+  addPointer(VAAI->getOperand(0), AliasAnalysis::UnknownSize, 
+             VAAI->getMetadata(LLVMContext::MD_tbaa),
+             AliasSet::ModRef, NewPtr);
   return NewPtr;
 }
 
@@ -358,6 +376,7 @@
     bool X;
     for (AliasSet::iterator ASI = AS.begin(), E = AS.end(); ASI != E; ++ASI) {
       AliasSet &NewAS = addPointer(ASI.getPointer(), ASI.getSize(),
+                                   ASI.getTBAAInfo(),
                                    (AliasSet::AccessType)AS.AccessTy, X);
       if (AS.isVolatile()) NewAS.setVolatile();
     }
@@ -393,8 +412,9 @@
     AS.removeFromTracker(*this);
 }
 
-bool AliasSetTracker::remove(Value *Ptr, unsigned Size) {
-  AliasSet *AS = findAliasSetForPointer(Ptr, Size);
+bool
+AliasSetTracker::remove(Value *Ptr, unsigned Size, const MDNode *TBAAInfo) {
+  AliasSet *AS = findAliasSetForPointer(Ptr, Size, TBAAInfo);
   if (!AS) return false;
   remove(*AS);
   return true;
@@ -402,7 +422,8 @@
 
 bool AliasSetTracker::remove(LoadInst *LI) {
   unsigned Size = AA.getTypeStoreSize(LI->getType());
-  AliasSet *AS = findAliasSetForPointer(LI->getOperand(0), Size);
+  const MDNode *TBAAInfo = LI->getMetadata(LLVMContext::MD_tbaa);
+  AliasSet *AS = findAliasSetForPointer(LI->getOperand(0), Size, TBAAInfo);
   if (!AS) return false;
   remove(*AS);
   return true;
@@ -410,14 +431,17 @@
 
 bool AliasSetTracker::remove(StoreInst *SI) {
   unsigned Size = AA.getTypeStoreSize(SI->getOperand(0)->getType());
-  AliasSet *AS = findAliasSetForPointer(SI->getOperand(1), Size);
+  const MDNode *TBAAInfo = SI->getMetadata(LLVMContext::MD_tbaa);
+  AliasSet *AS = findAliasSetForPointer(SI->getOperand(1), Size, TBAAInfo);
   if (!AS) return false;
   remove(*AS);
   return true;
 }
 
 bool AliasSetTracker::remove(VAArgInst *VAAI) {
-  AliasSet *AS = findAliasSetForPointer(VAAI->getOperand(0), ~0);
+  AliasSet *AS = findAliasSetForPointer(VAAI->getOperand(0),
+                                        AliasAnalysis::UnknownSize,
+                                        VAAI->getMetadata(LLVMContext::MD_tbaa));
   if (!AS) return false;
   remove(*AS);
   return true;
@@ -507,7 +531,8 @@
   // Add it to the alias set it aliases...
   I = PointerMap.find(From);
   AliasSet *AS = I->second->getAliasSet(*this);
-  AS->addPointer(*this, Entry, I->second->getSize(), true);
+  AS->addPointer(*this, Entry, I->second->getSize(), I->second->getTBAAInfo(),
+                 true);
 }
 
 

Modified: llvm/trunk/lib/Transforms/Scalar/LICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LICM.cpp?rev=116743&r1=116742&r2=116743&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LICM.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LICM.cpp Mon Oct 18 15:44:50 2010
@@ -36,6 +36,7 @@
 #include "llvm/DerivedTypes.h"
 #include "llvm/IntrinsicInst.h"
 #include "llvm/Instructions.h"
+#include "llvm/LLVMContext.h"
 #include "llvm/Analysis/AliasAnalysis.h"
 #include "llvm/Analysis/AliasSetTracker.h"
 #include "llvm/Analysis/ConstantFolding.h"
@@ -187,9 +188,10 @@
     /// pointerInvalidatedByLoop - Return true if the body of this loop may
     /// store into the memory location pointed to by V.
     ///
-    bool pointerInvalidatedByLoop(Value *V, unsigned Size) {
+    bool pointerInvalidatedByLoop(Value *V, unsigned Size,
+                                  const MDNode *TBAAInfo) {
       // Check to see if any of the basic blocks in CurLoop invalidate *V.
-      return CurAST->getAliasSetForPointer(V, Size).isMod();
+      return CurAST->getAliasSetForPointer(V, Size, TBAAInfo).isMod();
     }
 
     bool canSinkOrHoistInst(Instruction &I);
@@ -402,7 +404,8 @@
     unsigned Size = 0;
     if (LI->getType()->isSized())
       Size = AA->getTypeStoreSize(LI->getType());
-    return !pointerInvalidatedByLoop(LI->getOperand(0), Size);
+    return !pointerInvalidatedByLoop(LI->getOperand(0), Size,
+                                     LI->getMetadata(LLVMContext::MD_tbaa));
   } else if (CallInst *CI = dyn_cast<CallInst>(&I)) {
     // Handle obvious cases efficiently.
     AliasAnalysis::ModRefBehavior Behavior = AA->getModRefBehavior(CI);



From rafael.espindola at gmail.com  Mon Oct 18 15:47:21 2010
From: rafael.espindola at gmail.com (Rafael Espindola)
Date: Mon, 18 Oct 2010 20:47:21 -0000
Subject: [llvm-commits] [llvm] r116744 - in /llvm/trunk:
 lib/MC/ELFObjectWriter.cpp test/MC/ELF/relocation-386.s
Message-ID: <20101018204721.A1B522A6C12C@llvm.org>

Author: rafael
Date: Mon Oct 18 15:47:21 2010
New Revision: 116744

URL: http://llvm.org/viewvc/llvm-project?rev=116744&view=rev
Log:
Implement R_386_GOT32.

Modified:
    llvm/trunk/lib/MC/ELFObjectWriter.cpp
    llvm/trunk/test/MC/ELF/relocation-386.s

Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=116744&r1=116743&r2=116744&view=diff
==============================================================================
--- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original)
+++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Mon Oct 18 15:47:21 2010
@@ -706,6 +706,9 @@
         switch (Modifier) {
         default:
           llvm_unreachable("Unimplemented");
+        case MCSymbolRefExpr::VK_GOT:
+          Type = ELF::R_386_GOT32;
+          break;
         case MCSymbolRefExpr::VK_GOTOFF:
           Type = ELF::R_386_GOTOFF;
           break;

Modified: llvm/trunk/test/MC/ELF/relocation-386.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/relocation-386.s?rev=116744&r1=116743&r2=116744&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/relocation-386.s (original)
+++ llvm/trunk/test/MC/ELF/relocation-386.s Mon Oct 18 15:47:21 2010
@@ -36,13 +36,20 @@
 // CHECK-NEXT:  ('r_type', 10)
 // CHECK-NEXT: ),
 
-// Relocation 3 (bar3 at GOTOFF) is done symbol 6 (bss)
+// Relocation 3 (bar3 at GOTOFF) is done with symbol 6 (bss)
 // CHECK-NEXT:  # Relocation 3
 // CHECK-NEXT: (('r_offset',
 // CHECK-NEXT:  ('r_sym', 6
 // CHECK-NEXT:  ('r_type',
 // CHECK-NEXT: ),
 
+// Relocation 4 (bar2 at GOT) is of type R_386_GOT32
+// CHECK-NEXT:  # Relocation 4
+// CHECK-NEXT: (('r_offset',
+// CHECK-NEXT:  ('r_sym',
+// CHECK-NEXT:  ('r_type', 3
+// CHECK-NEXT: ),
+
         .text
 bar:
 	leal	.Lfoo at GOTOFF(%ebx), %eax
@@ -57,6 +64,8 @@
 	.local	bar3
 	.comm	bar3,1,1
 
+        movl	bar2j at GOT(%eax), %eax
+
         .section	.rodata.str1.16,"aMS", at progbits,1
 .Lfoo:
 	.asciz	 "bool llvm::llvm_start_multithreaded()"



From gohman at apple.com  Mon Oct 18 16:00:09 2010
From: gohman at apple.com (Dan Gohman)
Date: Mon, 18 Oct 2010 21:00:09 -0000
Subject: [llvm-commits] [llvm] r116745 -
	/llvm/trunk/test/Analysis/TypeBasedAliasAnalysis/licm.ll
Message-ID: <20101018210010.07DDD2A6C12C@llvm.org>

Author: djg
Date: Mon Oct 18 16:00:09 2010
New Revision: 116745

URL: http://llvm.org/viewvc/llvm-project?rev=116745&view=rev
Log:
Add a basic testcase for TBAA-aware LICM.

Added:
    llvm/trunk/test/Analysis/TypeBasedAliasAnalysis/licm.ll

Added: llvm/trunk/test/Analysis/TypeBasedAliasAnalysis/licm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/TypeBasedAliasAnalysis/licm.ll?rev=116745&view=auto
==============================================================================
--- llvm/trunk/test/Analysis/TypeBasedAliasAnalysis/licm.ll (added)
+++ llvm/trunk/test/Analysis/TypeBasedAliasAnalysis/licm.ll Mon Oct 18 16:00:09 2010
@@ -0,0 +1,33 @@
+; RUN: opt -tbaa -licm -enable-tbaa -S < %s | FileCheck %s
+
+; LICM should be able to hoist the address load out of the loop
+; by using TBAA information.
+
+; CHECK:      entry:
+; CHECK-NEXT:   %tmp3 = load double** @P, !tbaa !0
+; CHECK-NEXT:   br label %for.body
+
+ at P = common global double* null
+
+define void @foo(i64 %n) nounwind {
+entry:
+  br label %for.body
+
+for.body:                                         ; preds = %entry, %for.body
+  %i.07 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
+  %tmp3 = load double** @P, !tbaa !1
+  %scevgep = getelementptr double* %tmp3, i64 %i.07
+  %tmp4 = load double* %scevgep, !tbaa !2
+  %mul = fmul double %tmp4, 2.300000e+00
+  store double %mul, double* %scevgep, !tbaa !2
+  %inc = add i64 %i.07, 1
+  %exitcond = icmp eq i64 %inc, %n
+  br i1 %exitcond, label %for.end, label %for.body
+
+for.end:                                          ; preds = %for.body, %entry
+  ret void
+}
+
+!0 = metadata !{metadata !"root", null}
+!1 = metadata !{metadata !"pointer", metadata !0}
+!2 = metadata !{metadata !"double", metadata !0}



From foldr at codedgers.com  Mon Oct 18 16:16:01 2010
From: foldr at codedgers.com (Mikhail Glushenkov)
Date: Mon, 18 Oct 2010 21:16:01 -0000
Subject: [llvm-commits] [llvm] r116749 -
	/llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp
Message-ID: <20101018211601.17F842A6C12C@llvm.org>

Author: foldr
Date: Mon Oct 18 16:16:00 2010
New Revision: 116749

URL: http://llvm.org/viewvc/llvm-project?rev=116749&view=rev
Log:
Trailing whitespace.

Modified:
    llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp

Modified: llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp?rev=116749&r1=116748&r2=116749&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp Mon Oct 18 16:16:00 2010
@@ -129,7 +129,7 @@
 
   /// HasPHIUser - Set to true if this global has a user that is a PHI node.
   bool HasPHIUser;
-  
+
   GlobalStatus() : isLoaded(false), StoredType(NotStored), StoredOnceValue(0),
                    AccessingFunction(0), HasMultipleAccessingFunctions(false),
                    HasNonInstructionUser(false), HasPHIUser(false) {}
@@ -308,7 +308,7 @@
         if (Init)
           SubInit = ConstantFoldLoadThroughGEPConstantExpr(Init, CE);
         Changed |= CleanupConstantGlobalUsers(CE, SubInit);
-      } else if (CE->getOpcode() == Instruction::BitCast && 
+      } else if (CE->getOpcode() == Instruction::BitCast &&
                  CE->getType()->isPointerTy()) {
         // Pointer cast, delete any stores and memsets to the global.
         Changed |= CleanupConstantGlobalUsers(CE, 0);
@@ -324,7 +324,7 @@
       // and will invalidate our notion of what Init is.
       Constant *SubInit = 0;
       if (!isa<ConstantExpr>(GEP->getOperand(0))) {
-        ConstantExpr *CE = 
+        ConstantExpr *CE =
           dyn_cast_or_null<ConstantExpr>(ConstantFoldInstruction(GEP));
         if (Init && CE && CE->getOpcode() == Instruction::GetElementPtr)
           SubInit = ConstantFoldLoadThroughGEPConstantExpr(Init, CE);
@@ -361,7 +361,7 @@
   // We might have a dead and dangling constant hanging off of here.
   if (Constant *C = dyn_cast<Constant>(V))
     return SafeToDestroyConstant(C);
-  
+
   Instruction *I = dyn_cast<Instruction>(V);
   if (!I) return false;
 
@@ -371,15 +371,15 @@
   // Stores *to* the pointer are ok.
   if (StoreInst *SI = dyn_cast<StoreInst>(I))
     return SI->getOperand(0) != V;
-    
+
   // Otherwise, it must be a GEP.
   GetElementPtrInst *GEPI = dyn_cast<GetElementPtrInst>(I);
   if (GEPI == 0) return false;
-  
+
   if (GEPI->getNumOperands() < 3 || !isa<Constant>(GEPI->getOperand(1)) ||
       !cast<Constant>(GEPI->getOperand(1))->isNullValue())
     return false;
-  
+
   for (Value::use_iterator I = GEPI->use_begin(), E = GEPI->use_end();
        I != E; ++I)
     if (!isSafeSROAElementUse(*I))
@@ -393,11 +393,11 @@
 ///
 static bool IsUserOfGlobalSafeForSRA(User *U, GlobalValue *GV) {
   // The user of the global must be a GEP Inst or a ConstantExpr GEP.
-  if (!isa<GetElementPtrInst>(U) && 
-      (!isa<ConstantExpr>(U) || 
+  if (!isa<GetElementPtrInst>(U) &&
+      (!isa<ConstantExpr>(U) ||
        cast<ConstantExpr>(U)->getOpcode() != Instruction::GetElementPtr))
     return false;
-  
+
   // Check to see if this ConstantExpr GEP is SRA'able.  In particular, we
   // don't like < 3 operand CE's, and we don't like non-constant integer
   // indices.  This enforces that all uses are 'gep GV, 0, C, ...' for some
@@ -409,18 +409,18 @@
 
   gep_type_iterator GEPI = gep_type_begin(U), E = gep_type_end(U);
   ++GEPI;  // Skip over the pointer index.
-  
+
   // If this is a use of an array allocation, do a bit more checking for sanity.
   if (const ArrayType *AT = dyn_cast<ArrayType>(*GEPI)) {
     uint64_t NumElements = AT->getNumElements();
     ConstantInt *Idx = cast<ConstantInt>(U->getOperand(2));
-    
+
     // Check to make sure that index falls within the array.  If not,
     // something funny is going on, so we won't do the optimization.
     //
     if (Idx->getZExtValue() >= NumElements)
       return false;
-      
+
     // We cannot scalar repl this level of the array unless any array
     // sub-indices are in-range constants.  In particular, consider:
     // A[0][i].  We cannot know that the user isn't doing invalid things like
@@ -441,7 +441,7 @@
                "Indexed GEP type is not array, vector, or struct!");
         continue;
       }
-      
+
       ConstantInt *IdxVal = dyn_cast<ConstantInt>(GEPI.getOperand());
       if (!IdxVal || IdxVal->getZExtValue() >= NumElements)
         return false;
@@ -465,7 +465,7 @@
   }
   return true;
 }
- 
+
 
 /// SRAGlobal - Perform scalar replacement of aggregates on the specified global
 /// variable.  This opens the door for other optimizations by exposing the
@@ -476,7 +476,7 @@
   // Make sure this global only has simple uses that we can SRA.
   if (!GlobalUsersSafeToSRA(GV))
     return 0;
-  
+
   assert(GV->hasLocalLinkage() && !GV->isConstant());
   Constant *Init = GV->getInitializer();
   const Type *Ty = Init->getType();
@@ -488,7 +488,7 @@
   unsigned StartAlignment = GV->getAlignment();
   if (StartAlignment == 0)
     StartAlignment = TD.getABITypeAlignment(GV->getType());
-   
+
   if (const StructType *STy = dyn_cast<StructType>(Ty)) {
     NewGlobals.reserve(STy->getNumElements());
     const StructLayout &Layout = *TD.getStructLayout(STy);
@@ -503,7 +503,7 @@
                                               GV->getType()->getAddressSpace());
       Globals.insert(GV, NGV);
       NewGlobals.push_back(NGV);
-      
+
       // Calculate the known alignment of the field.  If the original aggregate
       // had 256 byte alignment for example, something might depend on that:
       // propagate info to each field.
@@ -522,7 +522,7 @@
     if (NumElements > 16 && GV->hasNUsesOrMore(16))
       return 0; // It's not worth it.
     NewGlobals.reserve(NumElements);
-    
+
     uint64_t EltSize = TD.getTypeAllocSize(STy->getElementType());
     unsigned EltAlign = TD.getABITypeAlignment(STy->getElementType());
     for (unsigned i = 0, e = NumElements; i != e; ++i) {
@@ -537,7 +537,7 @@
                                               GV->getType()->getAddressSpace());
       Globals.insert(GV, NGV);
       NewGlobals.push_back(NGV);
-      
+
       // Calculate the known alignment of the field.  If the original aggregate
       // had 256 byte alignment for example, something might depend on that:
       // propagate info to each field.
@@ -549,7 +549,7 @@
 
   if (NewGlobals.empty())
     return 0;
-  
+
   DEBUG(dbgs() << "PERFORMING GLOBAL SRA ON: " << *GV);
 
   Constant *NullInt =Constant::getNullValue(Type::getInt32Ty(GV->getContext()));
@@ -615,7 +615,7 @@
 }
 
 /// AllUsesOfValueWillTrapIfNull - Return true if all users of the specified
-/// value will trap if the value is dynamically null.  PHIs keeps track of any 
+/// value will trap if the value is dynamically null.  PHIs keeps track of any
 /// phi nodes we've seen to avoid reprocessing them.
 static bool AllUsesOfValueWillTrapIfNull(const Value *V,
                                          SmallPtrSet<const PHINode*, 8> &PHIs) {
@@ -757,7 +757,7 @@
   // Keep track of whether we are able to remove all the uses of the global
   // other than the store that defines it.
   bool AllNonStoreUsesGone = true;
-  
+
   // Replace all uses of loads with uses of uses of the stored value.
   for (Value::use_iterator GUI = GV->use_begin(), E = GV->use_end(); GUI != E;){
     User *GlobalUser = *GUI++;
@@ -830,7 +830,7 @@
                                                      ConstantInt *NElements,
                                                      TargetData* TD) {
   DEBUG(errs() << "PROMOTING GLOBAL: " << *GV << "  CALL = " << *CI << '\n');
-  
+
   const Type *GlobalType;
   if (NElements->getZExtValue() == 1)
     GlobalType = AllocTy;
@@ -840,14 +840,14 @@
 
   // Create the new global variable.  The contents of the malloc'd memory is
   // undefined, so initialize with an undef value.
-  GlobalVariable *NewGV = new GlobalVariable(*GV->getParent(), 
+  GlobalVariable *NewGV = new GlobalVariable(*GV->getParent(),
                                              GlobalType, false,
                                              GlobalValue::InternalLinkage,
                                              UndefValue::get(GlobalType),
                                              GV->getName()+".body",
                                              GV,
                                              GV->isThreadLocal());
-  
+
   // If there are bitcast users of the malloc (which is typical, usually we have
   // a malloc + bitcast) then replace them with uses of the new global.  Update
   // other users to use the global as well.
@@ -867,10 +867,10 @@
       User->replaceUsesOfWith(CI, TheBC);
     }
   }
-  
+
   Constant *RepValue = NewGV;
   if (NewGV->getType() != GV->getType()->getElementType())
-    RepValue = ConstantExpr::getBitCast(RepValue, 
+    RepValue = ConstantExpr::getBitCast(RepValue,
                                         GV->getType()->getElementType());
 
   // If there is a comparison against null, we will insert a global bool to
@@ -890,7 +890,7 @@
       SI->eraseFromParent();
       continue;
     }
-    
+
     LoadInst *LI = cast<LoadInst>(GV->use_back());
     while (!LI->use_empty()) {
       Use &LoadUse = LI->use_begin().getUse();
@@ -898,7 +898,7 @@
         LoadUse = RepValue;
         continue;
       }
-      
+
       ICmpInst *ICI = cast<ICmpInst>(LoadUse.getUser());
       // Replace the cmp X, 0 with a use of the bool value.
       Value *LV = new LoadInst(InitBool, InitBool->getName()+".val", ICI);
@@ -963,20 +963,20 @@
     if (isa<LoadInst>(Inst) || isa<CmpInst>(Inst)) {
       continue; // Fine, ignore.
     }
-    
+
     if (const StoreInst *SI = dyn_cast<StoreInst>(Inst)) {
       if (SI->getOperand(0) == V && SI->getOperand(1) != GV)
         return false;  // Storing the pointer itself... bad.
       continue; // Otherwise, storing through it, or storing into GV... fine.
     }
-    
+
     // Must index into the array and into the struct.
     if (isa<GetElementPtrInst>(Inst) && Inst->getNumOperands() >= 3) {
       if (!ValueIsOnlyUsedLocallyOrStoredToOneGlobal(Inst, GV, PHIs))
         return false;
       continue;
     }
-    
+
     if (const PHINode *PN = dyn_cast<PHINode>(Inst)) {
       // PHIs are ok if all uses are ok.  Don't infinitely recurse through PHI
       // cycles.
@@ -985,13 +985,13 @@
           return false;
       continue;
     }
-    
+
     if (const BitCastInst *BCI = dyn_cast<BitCastInst>(Inst)) {
       if (!ValueIsOnlyUsedLocallyOrStoredToOneGlobal(BCI, GV, PHIs))
         return false;
       continue;
     }
-    
+
     return false;
   }
   return true;
@@ -1000,9 +1000,9 @@
 /// ReplaceUsesOfMallocWithGlobal - The Alloc pointer is stored into GV
 /// somewhere.  Transform all uses of the allocation into loads from the
 /// global and uses of the resultant pointer.  Further, delete the store into
-/// GV.  This assumes that these value pass the 
+/// GV.  This assumes that these value pass the
 /// 'ValueIsOnlyUsedLocallyOrStoredToOneGlobal' predicate.
-static void ReplaceUsesOfMallocWithGlobal(Instruction *Alloc, 
+static void ReplaceUsesOfMallocWithGlobal(Instruction *Alloc,
                                           GlobalVariable *GV) {
   while (!Alloc->use_empty()) {
     Instruction *U = cast<Instruction>(*Alloc->use_begin());
@@ -1035,7 +1035,7 @@
             continue;
           }
     }
-      
+
     // Insert a load from the global, and use it instead of the malloc.
     Value *NL = new LoadInst(GV, GV->getName()+".val", InsertPt);
     U->replaceUsesOfWith(Alloc, NL);
@@ -1053,24 +1053,24 @@
   for (Value::const_use_iterator UI = V->use_begin(), E = V->use_end(); UI != E;
        ++UI) {
     const Instruction *User = cast<Instruction>(*UI);
-    
+
     // Comparison against null is ok.
     if (const ICmpInst *ICI = dyn_cast<ICmpInst>(User)) {
       if (!isa<ConstantPointerNull>(ICI->getOperand(1)))
         return false;
       continue;
     }
-    
+
     // getelementptr is also ok, but only a simple form.
     if (const GetElementPtrInst *GEPI = dyn_cast<GetElementPtrInst>(User)) {
       // Must index into the array and into the struct.
       if (GEPI->getNumOperands() < 3)
         return false;
-      
+
       // Otherwise the GEP is ok.
       continue;
     }
-    
+
     if (const PHINode *PN = dyn_cast<PHINode>(User)) {
       if (!LoadUsingPHIsPerLoad.insert(PN))
         // This means some phi nodes are dependent on each other.
@@ -1079,19 +1079,19 @@
       if (!LoadUsingPHIs.insert(PN))
         // If we have already analyzed this PHI, then it is safe.
         continue;
-      
+
       // Make sure all uses of the PHI are simple enough to transform.
       if (!LoadUsesSimpleEnoughForHeapSRA(PN,
                                           LoadUsingPHIs, LoadUsingPHIsPerLoad))
         return false;
-      
+
       continue;
     }
-    
+
     // Otherwise we don't know what this is, not ok.
     return false;
   }
-  
+
   return true;
 }
 
@@ -1110,10 +1110,10 @@
         return false;
       LoadUsingPHIsPerLoad.clear();
     }
-  
+
   // If we reach here, we know that all uses of the loads and transitive uses
   // (through PHI nodes) are simple enough to transform.  However, we don't know
-  // that all inputs the to the PHI nodes are in the same equivalence sets. 
+  // that all inputs the to the PHI nodes are in the same equivalence sets.
   // Check to verify that all operands of the PHIs are either PHIS that can be
   // transformed, loads from GV, or MI itself.
   for (SmallPtrSet<const PHINode*, 32>::const_iterator I = LoadUsingPHIs.begin()
@@ -1121,29 +1121,29 @@
     const PHINode *PN = *I;
     for (unsigned op = 0, e = PN->getNumIncomingValues(); op != e; ++op) {
       Value *InVal = PN->getIncomingValue(op);
-      
+
       // PHI of the stored value itself is ok.
       if (InVal == StoredVal) continue;
-      
+
       if (const PHINode *InPN = dyn_cast<PHINode>(InVal)) {
         // One of the PHIs in our set is (optimistically) ok.
         if (LoadUsingPHIs.count(InPN))
           continue;
         return false;
       }
-      
+
       // Load from GV is ok.
       if (const LoadInst *LI = dyn_cast<LoadInst>(InVal))
         if (LI->getOperand(0) == GV)
           continue;
-      
+
       // UNDEF? NULL?
-      
+
       // Anything else is rejected.
       return false;
     }
   }
-  
+
   return true;
 }
 
@@ -1151,15 +1151,15 @@
                DenseMap<Value*, std::vector<Value*> > &InsertedScalarizedValues,
                    std::vector<std::pair<PHINode*, unsigned> > &PHIsToRewrite) {
   std::vector<Value*> &FieldVals = InsertedScalarizedValues[V];
-  
+
   if (FieldNo >= FieldVals.size())
     FieldVals.resize(FieldNo+1);
-  
+
   // If we already have this value, just reuse the previously scalarized
   // version.
   if (Value *FieldVal = FieldVals[FieldNo])
     return FieldVal;
-  
+
   // Depending on what instruction this is, we have several cases.
   Value *Result;
   if (LoadInst *LI = dyn_cast<LoadInst>(V)) {
@@ -1172,9 +1172,9 @@
   } else if (PHINode *PN = dyn_cast<PHINode>(V)) {
     // PN's type is pointer to struct.  Make a new PHI of pointer to struct
     // field.
-    const StructType *ST = 
+    const StructType *ST =
       cast<StructType>(cast<PointerType>(PN->getType())->getElementType());
-    
+
     Result =
      PHINode::Create(PointerType::getUnqual(ST->getElementType(FieldNo)),
                      PN->getName()+".f"+Twine(FieldNo), PN);
@@ -1183,13 +1183,13 @@
     llvm_unreachable("Unknown usable value");
     Result = 0;
   }
-  
+
   return FieldVals[FieldNo] = Result;
 }
 
 /// RewriteHeapSROALoadUser - Given a load instruction and a value derived from
 /// the load, rewrite the derived value to use the HeapSRoA'd load.
-static void RewriteHeapSROALoadUser(Instruction *LoadUser, 
+static void RewriteHeapSROALoadUser(Instruction *LoadUser,
              DenseMap<Value*, std::vector<Value*> > &InsertedScalarizedValues,
                    std::vector<std::pair<PHINode*, unsigned> > &PHIsToRewrite) {
   // If this is a comparison against null, handle it.
@@ -1199,30 +1199,30 @@
     // field.
     Value *NPtr = GetHeapSROAValue(SCI->getOperand(0), 0,
                                    InsertedScalarizedValues, PHIsToRewrite);
-    
+
     Value *New = new ICmpInst(SCI, SCI->getPredicate(), NPtr,
-                              Constant::getNullValue(NPtr->getType()), 
+                              Constant::getNullValue(NPtr->getType()),
                               SCI->getName());
     SCI->replaceAllUsesWith(New);
     SCI->eraseFromParent();
     return;
   }
-  
+
   // Handle 'getelementptr Ptr, Idx, i32 FieldNo ...'
   if (GetElementPtrInst *GEPI = dyn_cast<GetElementPtrInst>(LoadUser)) {
     assert(GEPI->getNumOperands() >= 3 && isa<ConstantInt>(GEPI->getOperand(2))
            && "Unexpected GEPI!");
-  
+
     // Load the pointer for this field.
     unsigned FieldNo = cast<ConstantInt>(GEPI->getOperand(2))->getZExtValue();
     Value *NewPtr = GetHeapSROAValue(GEPI->getOperand(0), FieldNo,
                                      InsertedScalarizedValues, PHIsToRewrite);
-    
+
     // Create the new GEP idx vector.
     SmallVector<Value*, 8> GEPIdx;
     GEPIdx.push_back(GEPI->getOperand(1));
     GEPIdx.append(GEPI->op_begin()+3, GEPI->op_end());
-    
+
     Value *NGEPI = GetElementPtrInst::Create(NewPtr,
                                              GEPIdx.begin(), GEPIdx.end(),
                                              GEPI->getName(), GEPI);
@@ -1243,7 +1243,7 @@
   tie(InsertPos, Inserted) =
     InsertedScalarizedValues.insert(std::make_pair(PN, std::vector<Value*>()));
   if (!Inserted) return;
-  
+
   // If this is the first time we've seen this PHI, recursively process all
   // users.
   for (Value::use_iterator UI = PN->use_begin(), E = PN->use_end(); UI != E; ) {
@@ -1256,7 +1256,7 @@
 /// is a value loaded from the global.  Eliminate all uses of Ptr, making them
 /// use FieldGlobals instead.  All uses of loaded values satisfy
 /// AllGlobalLoadUsesSimpleEnoughForHeapSRA.
-static void RewriteUsesOfLoadForHeapSRoA(LoadInst *Load, 
+static void RewriteUsesOfLoadForHeapSRoA(LoadInst *Load,
                DenseMap<Value*, std::vector<Value*> > &InsertedScalarizedValues,
                    std::vector<std::pair<PHINode*, unsigned> > &PHIsToRewrite) {
   for (Value::use_iterator UI = Load->use_begin(), E = Load->use_end();
@@ -1264,7 +1264,7 @@
     Instruction *User = cast<Instruction>(*UI++);
     RewriteHeapSROALoadUser(User, InsertedScalarizedValues, PHIsToRewrite);
   }
-  
+
   if (Load->use_empty()) {
     Load->eraseFromParent();
     InsertedScalarizedValues.erase(Load);
@@ -1289,11 +1289,11 @@
   // new mallocs at the same place as CI, and N globals.
   std::vector<Value*> FieldGlobals;
   std::vector<Value*> FieldMallocs;
-  
+
   for (unsigned FieldNo = 0, e = STy->getNumElements(); FieldNo != e;++FieldNo){
     const Type *FieldTy = STy->getElementType(FieldNo);
     const PointerType *PFieldTy = PointerType::getUnqual(FieldTy);
-    
+
     GlobalVariable *NGV =
       new GlobalVariable(*GV->getParent(),
                          PFieldTy, false, GlobalValue::InternalLinkage,
@@ -1301,7 +1301,7 @@
                          GV->getName() + ".f" + Twine(FieldNo), GV,
                          GV->isThreadLocal());
     FieldGlobals.push_back(NGV);
-    
+
     unsigned TypeSize = TD->getTypeAllocSize(FieldTy);
     if (const StructType *ST = dyn_cast<StructType>(FieldTy))
       TypeSize = TD->getStructLayout(ST)->getSizeInBytes();
@@ -1313,7 +1313,7 @@
     FieldMallocs.push_back(NMI);
     new StoreInst(NMI, NGV, CI);
   }
-  
+
   // The tricky aspect of this transformation is handling the case when malloc
   // fails.  In the original code, malloc failing would set the result pointer
   // of malloc to null.  In this case, some mallocs could succeed and others
@@ -1340,23 +1340,23 @@
   // Split the basic block at the old malloc.
   BasicBlock *OrigBB = CI->getParent();
   BasicBlock *ContBB = OrigBB->splitBasicBlock(CI, "malloc_cont");
-  
+
   // Create the block to check the first condition.  Put all these blocks at the
   // end of the function as they are unlikely to be executed.
   BasicBlock *NullPtrBlock = BasicBlock::Create(OrigBB->getContext(),
                                                 "malloc_ret_null",
                                                 OrigBB->getParent());
-  
+
   // Remove the uncond branch from OrigBB to ContBB, turning it into a cond
   // branch on RunningOr.
   OrigBB->getTerminator()->eraseFromParent();
   BranchInst::Create(NullPtrBlock, ContBB, RunningOr, OrigBB);
-  
+
   // Within the NullPtrBlock, we need to emit a comparison and branch for each
   // pointer, because some may be null while others are not.
   for (unsigned i = 0, e = FieldGlobals.size(); i != e; ++i) {
     Value *GVVal = new LoadInst(FieldGlobals[i], "tmp", NullPtrBlock);
-    Value *Cmp = new ICmpInst(*NullPtrBlock, ICmpInst::ICMP_NE, GVVal, 
+    Value *Cmp = new ICmpInst(*NullPtrBlock, ICmpInst::ICMP_NE, GVVal,
                               Constant::getNullValue(GVVal->getType()),
                               "tmp");
     BasicBlock *FreeBlock = BasicBlock::Create(Cmp->getContext(), "free_it",
@@ -1371,10 +1371,10 @@
     new StoreInst(Constant::getNullValue(GVVal->getType()), FieldGlobals[i],
                   FreeBlock);
     BranchInst::Create(NextBlock, FreeBlock);
-    
+
     NullPtrBlock = NextBlock;
   }
-  
+
   BranchInst::Create(ContBB, NullPtrBlock);
 
   // CI is no longer needed, remove it.
@@ -1385,25 +1385,25 @@
   /// inserted for a given load.
   DenseMap<Value*, std::vector<Value*> > InsertedScalarizedValues;
   InsertedScalarizedValues[GV] = FieldGlobals;
-  
+
   std::vector<std::pair<PHINode*, unsigned> > PHIsToRewrite;
-  
+
   // Okay, the malloc site is completely handled.  All of the uses of GV are now
   // loads, and all uses of those loads are simple.  Rewrite them to use loads
   // of the per-field globals instead.
   for (Value::use_iterator UI = GV->use_begin(), E = GV->use_end(); UI != E;) {
     Instruction *User = cast<Instruction>(*UI++);
-    
+
     if (LoadInst *LI = dyn_cast<LoadInst>(User)) {
       RewriteUsesOfLoadForHeapSRoA(LI, InsertedScalarizedValues, PHIsToRewrite);
       continue;
     }
-    
+
     // Must be a store of null.
     StoreInst *SI = cast<StoreInst>(User);
     assert(isa<ConstantPointerNull>(SI->getOperand(0)) &&
            "Unexpected heap-sra user!");
-    
+
     // Insert a store of null into each global.
     for (unsigned i = 0, e = FieldGlobals.size(); i != e; ++i) {
       const PointerType *PT = cast<PointerType>(FieldGlobals[i]->getType());
@@ -1430,7 +1430,7 @@
       FieldPN->addIncoming(InVal, PN->getIncomingBlock(i));
     }
   }
-  
+
   // Drop all inter-phi links and any loads that made it this far.
   for (DenseMap<Value*, std::vector<Value*> >::iterator
        I = InsertedScalarizedValues.begin(), E = InsertedScalarizedValues.end();
@@ -1440,7 +1440,7 @@
     else if (LoadInst *LI = dyn_cast<LoadInst>(I->first))
       LI->dropAllReferences();
   }
-  
+
   // Delete all the phis and loads now that inter-references are dead.
   for (DenseMap<Value*, std::vector<Value*> >::iterator
        I = InsertedScalarizedValues.begin(), E = InsertedScalarizedValues.end();
@@ -1450,7 +1450,7 @@
     else if (LoadInst *LI = dyn_cast<LoadInst>(I->first))
       LI->eraseFromParent();
   }
-  
+
   // The old global is now dead, remove it.
   GV->eraseFromParent();
 
@@ -1468,7 +1468,7 @@
                                                TargetData *TD) {
   if (!TD)
     return false;
-  
+
   // If this is a malloc of an abstract type, don't touch it.
   if (!AllocTy->isSized())
     return false;
@@ -1508,7 +1508,7 @@
       GVI = OptimizeGlobalAddressOfMalloc(GV, CI, AllocTy, NElements, TD);
       return true;
     }
-  
+
   // If the allocation is an array of structures, consider transforming this
   // into multiple malloc'd arrays, one for each field.  This is basically
   // SRoA for malloc'd memory.
@@ -1544,13 +1544,13 @@
       CI = dyn_cast<BitCastInst>(Malloc) ?
         extractMallocCallFromBitCast(Malloc) : cast<CallInst>(Malloc);
     }
-      
+
     GVI = PerformHeapAllocSRoA(GV, CI, getMallocArraySize(CI, TD, true),TD);
     return true;
   }
-  
+
   return false;
-}  
+}
 
 // OptimizeOnceStoredGlobal - Try to optimize globals based on the knowledge
 // that only one value (besides its initializer) is ever stored to the global.
@@ -1568,7 +1568,7 @@
       GV->getInitializer()->isNullValue()) {
     if (Constant *SOVC = dyn_cast<Constant>(StoredOnceVal)) {
       if (GV->getInitializer()->getType() != SOVC->getType())
-        SOVC = 
+        SOVC =
          ConstantExpr::getBitCast(SOVC, GV->getInitializer()->getType());
 
       // Optimize away any trapping uses of the loaded value.
@@ -1576,7 +1576,7 @@
         return true;
     } else if (CallInst *CI = extractMallocCall(StoredOnceVal)) {
       const Type* MallocType = getMallocAllocatedType(CI);
-      if (MallocType && TryToOptimizeStoreOfMallocToGlobal(GV, CI, MallocType, 
+      if (MallocType && TryToOptimizeStoreOfMallocToGlobal(GV, CI, MallocType,
                                                            GVI, TD))
         return true;
     }
@@ -1591,7 +1591,7 @@
 /// whenever it is used.  This exposes the values to other scalar optimizations.
 static bool TryToShrinkGlobalToBoolean(GlobalVariable *GV, Constant *OtherVal) {
   const Type *GVElType = GV->getType()->getElementType();
-  
+
   // If GVElType is already i1, it is already shrunk.  If the type of the GV is
   // an FP value, pointer or vector, don't do this optimization because a select
   // between them is very expensive and unlikely to lead to later
@@ -1611,11 +1611,11 @@
   }
 
   DEBUG(dbgs() << "   *** SHRINKING TO BOOL: " << *GV);
-  
+
   // Create the new global, initializing it to false.
   GlobalVariable *NewGV = new GlobalVariable(Type::getInt1Ty(GV->getContext()),
                                              false,
-                                             GlobalValue::InternalLinkage, 
+                                             GlobalValue::InternalLinkage,
                                         ConstantInt::getFalse(GV->getContext()),
                                              GV->getName()+".b",
                                              GV->isThreadLocal());
@@ -1716,11 +1716,11 @@
                    << GS.AccessingFunction->getName() << "\n");
     DEBUG(dbgs() << "  HasMultipleAccessingFunctions =  "
                  << GS.HasMultipleAccessingFunctions << "\n");
-    DEBUG(dbgs() << "  HasNonInstructionUser = " 
+    DEBUG(dbgs() << "  HasNonInstructionUser = "
                  << GS.HasNonInstructionUser<<"\n");
     DEBUG(dbgs() << "\n");
 #endif
-    
+
     // If this is a first class global and has only one accessing function
     // and this function is main (which we know is not recursive we can make
     // this global a local variable) we replace the global with a local alloca
@@ -1750,7 +1750,7 @@
       ++NumLocalized;
       return true;
     }
-    
+
     // If the global is never loaded (but may be stored to), it is dead.
     // Delete it now.
     if (!GS.isLoaded) {
@@ -1943,7 +1943,7 @@
       if (!FTy || !FTy->getReturnType()->isVoidTy() ||
           FTy->isVarArg() || FTy->getNumParams() != 0)
         return 0;
-      
+
       // Verify that the initializer is simple enough for us to handle.
       if (!I->hasDefinitiveInitializer()) return 0;
       ConstantArray *CA = dyn_cast<ConstantArray>(I->getInitializer());
@@ -1956,7 +1956,7 @@
           // Must have a function or null ptr.
           if (!isa<Function>(CS->getOperand(1)))
             return 0;
-          
+
           // Init priority must be standard.
           ConstantInt *CI = dyn_cast<ConstantInt>(CS->getOperand(0));
           if (!CI || CI->getZExtValue() != 65535)
@@ -1964,7 +1964,7 @@
         } else {
           return 0;
         }
-      
+
       return I;
     }
   return 0;
@@ -1985,13 +1985,13 @@
 
 /// InstallGlobalCtors - Given a specified llvm.global_ctors list, install the
 /// specified array, returning the new global to use.
-static GlobalVariable *InstallGlobalCtors(GlobalVariable *GCL, 
+static GlobalVariable *InstallGlobalCtors(GlobalVariable *GCL,
                                           const std::vector<Function*> &Ctors) {
   // If we made a change, reassemble the initializer list.
   std::vector<Constant*> CSVals;
   CSVals.push_back(ConstantInt::get(Type::getInt32Ty(GCL->getContext()),65535));
   CSVals.push_back(0);
-  
+
   // Create the new init list.
   std::vector<Constant*> CAList;
   for (unsigned i = 0, e = Ctors.size(); i != e; ++i) {
@@ -2007,26 +2007,26 @@
     }
     CAList.push_back(ConstantStruct::get(GCL->getContext(), CSVals, false));
   }
-  
+
   // Create the array initializer.
   const Type *StructTy =
       cast<ArrayType>(GCL->getType()->getElementType())->getElementType();
-  Constant *CA = ConstantArray::get(ArrayType::get(StructTy, 
+  Constant *CA = ConstantArray::get(ArrayType::get(StructTy,
                                                    CAList.size()), CAList);
-  
+
   // If we didn't change the number of elements, don't create a new GV.
   if (CA->getType() == GCL->getInitializer()->getType()) {
     GCL->setInitializer(CA);
     return GCL;
   }
-  
+
   // Create the new global and insert it next to the existing list.
   GlobalVariable *NGV = new GlobalVariable(CA->getType(), GCL->isConstant(),
                                            GCL->getLinkage(), CA, "",
                                            GCL->isThreadLocal());
   GCL->getParent()->getGlobalList().insert(GCL, NGV);
   NGV->takeName(GCL);
-  
+
   // Nuke the old list, replacing any uses with the new one.
   if (!GCL->use_empty()) {
     Constant *V = NGV;
@@ -2035,7 +2035,7 @@
     GCL->replaceAllUsesWith(V);
   }
   GCL->eraseFromParent();
-  
+
   if (Ctors.size())
     return NGV;
   else
@@ -2101,7 +2101,7 @@
     assert(Val->getType() == Init->getType() && "Type mismatch!");
     return Val;
   }
-  
+
   std::vector<Constant*> Elts;
   if (const StructType *STy = dyn_cast<StructType>(Init->getType())) {
 
@@ -2119,13 +2119,13 @@
       llvm_unreachable("This code is out of sync with "
              " ConstantFoldLoadThroughGEPConstantExpr");
     }
-    
+
     // Replace the element that we are supposed to.
     ConstantInt *CU = cast<ConstantInt>(Addr->getOperand(OpNo));
     unsigned Idx = CU->getZExtValue();
     assert(Idx < STy->getNumElements() && "Struct index out of range!");
     Elts[Idx] = EvaluateStoreInto(Elts[Idx], Val, Addr, OpNo+1);
-    
+
     // Return the modified struct.
     return ConstantStruct::get(Init->getContext(), &Elts[0], Elts.size(),
                                STy->isPacked());
@@ -2138,8 +2138,8 @@
       NumElts = ATy->getNumElements();
     else
       NumElts = cast<VectorType>(InitTy)->getNumElements();
-    
-    
+
+
     // Break up the array into elements.
     if (ConstantArray *CA = dyn_cast<ConstantArray>(Init)) {
       for (User::op_iterator i = CA->op_begin(), e = CA->op_end(); i != e; ++i)
@@ -2154,16 +2154,16 @@
              " ConstantFoldLoadThroughGEPConstantExpr");
       Elts.assign(NumElts, UndefValue::get(InitTy->getElementType()));
     }
-    
+
     assert(CI->getZExtValue() < NumElts);
     Elts[CI->getZExtValue()] =
       EvaluateStoreInto(Elts[CI->getZExtValue()], Val, Addr, OpNo+1);
-    
+
     if (Init->getType()->isArrayTy())
       return ConstantArray::get(cast<ArrayType>(InitTy), Elts);
     else
       return ConstantVector::get(&Elts[0], Elts.size());
-  }    
+  }
 }
 
 /// CommitValueTo - We have decided that Addr (which satisfies the predicate
@@ -2189,14 +2189,14 @@
   // is the most up-to-date.
   DenseMap<Constant*, Constant*>::const_iterator I = Memory.find(P);
   if (I != Memory.end()) return I->second;
- 
+
   // Access it.
   if (GlobalVariable *GV = dyn_cast<GlobalVariable>(P)) {
     if (GV->hasDefinitiveInitializer())
       return GV->getInitializer();
     return 0;
   }
-  
+
   // Handle a constantexpr getelementptr.
   if (ConstantExpr *CE = dyn_cast<ConstantExpr>(P))
     if (CE->getOpcode() == Instruction::GetElementPtr &&
@@ -2221,12 +2221,12 @@
   // bail out.  TODO: we might want to accept limited recursion.
   if (std::find(CallStack.begin(), CallStack.end(), F) != CallStack.end())
     return false;
-  
+
   CallStack.push_back(F);
-  
+
   /// Values - As we compute SSA register values, we store their contents here.
   DenseMap<Value*, Constant*> Values;
-  
+
   // Initialize arguments to the incoming values specified.
   unsigned ArgNo = 0;
   for (Function::arg_iterator AI = F->arg_begin(), E = F->arg_end(); AI != E;
@@ -2237,14 +2237,14 @@
   /// we can only evaluate any one basic block at most once.  This set keeps
   /// track of what we have executed so we can detect recursive cases etc.
   SmallPtrSet<BasicBlock*, 32> ExecutedBlocks;
-  
+
   // CurInst - The current instruction we're evaluating.
   BasicBlock::iterator CurInst = F->begin()->begin();
-  
+
   // This is the main evaluation loop.
   while (1) {
     Constant *InstResult = 0;
-    
+
     if (StoreInst *SI = dyn_cast<StoreInst>(CurInst)) {
       if (SI->isVolatile()) return false;  // no volatile accesses.
       Constant *Ptr = getVal(Values, SI->getOperand(1));
@@ -2290,7 +2290,7 @@
                                               GlobalValue::InternalLinkage,
                                               UndefValue::get(Ty),
                                               AI->getName()));
-      InstResult = AllocaTmps.back();     
+      InstResult = AllocaTmps.back();
     } else if (CallInst *CI = dyn_cast<CallInst>(CurInst)) {
 
       // Debug info can safely be ignored here.
@@ -2324,7 +2324,7 @@
       } else {
         if (Callee->getFunctionType()->isVarArg())
           return false;
-        
+
         Constant *RetVal;
         // Execute the call, if successful, use the return value.
         if (!EvaluateFunction(Callee, RetVal, Formals, CallStack,
@@ -2342,7 +2342,7 @@
             dyn_cast<ConstantInt>(getVal(Values, BI->getCondition()));
           if (!Cond) return false;  // Cannot determine.
 
-          NewBB = BI->getSuccessor(!Cond->getZExtValue());          
+          NewBB = BI->getSuccessor(!Cond->getZExtValue());
         }
       } else if (SwitchInst *SI = dyn_cast<SwitchInst>(CurInst)) {
         ConstantInt *Val =
@@ -2358,20 +2358,20 @@
       } else if (ReturnInst *RI = dyn_cast<ReturnInst>(CurInst)) {
         if (RI->getNumOperands())
           RetVal = getVal(Values, RI->getOperand(0));
-        
+
         CallStack.pop_back();  // return from fn.
         return true;  // We succeeded at evaluating this ctor!
       } else {
         // invoke, unwind, unreachable.
         return false;  // Cannot handle this terminator.
       }
-      
+
       // Okay, we succeeded in evaluating this control flow.  See if we have
       // executed the new block before.  If so, we have a looping function,
       // which we cannot evaluate in reasonable time.
       if (!ExecutedBlocks.insert(NewBB))
         return false;  // looped!
-      
+
       // Okay, we have never been in this block before.  Check to see if there
       // are any PHI nodes.  If so, evaluate them with information about where
       // we came from.
@@ -2387,10 +2387,10 @@
       // Did not know how to evaluate this!
       return false;
     }
-    
+
     if (!CurInst->use_empty())
       Values[CurInst] = InstResult;
-    
+
     // Advance program counter.
     ++CurInst;
   }
@@ -2408,7 +2408,7 @@
   /// to represent its body.  This vector is needed so we can delete the
   /// temporary globals when we are done.
   std::vector<GlobalVariable*> AllocaTmps;
-  
+
   /// CallStack - This is used to detect recursion.  In pathological situations
   /// we could hit exponential behavior, but at least there is nothing
   /// unbounded.
@@ -2428,13 +2428,13 @@
          E = MutatedMemory.end(); I != E; ++I)
       CommitValueTo(I->second, I->first);
   }
-  
+
   // At this point, we are done interpreting.  If we created any 'alloca'
   // temporaries, release them now.
   while (!AllocaTmps.empty()) {
     GlobalVariable *Tmp = AllocaTmps.back();
     AllocaTmps.pop_back();
-    
+
     // If there are still users of the alloca, the program is doing something
     // silly, e.g. storing the address of the alloca somewhere and using it
     // later.  Since this is undefined, we'll just make it be null.
@@ -2442,7 +2442,7 @@
       Tmp->replaceAllUsesWith(Constant::getNullValue(Tmp->getType()));
     delete Tmp;
   }
-  
+
   return EvalSuccess;
 }
 
@@ -2454,7 +2454,7 @@
   std::vector<Function*> Ctors = ParseGlobalCtors(GCL);
   bool MadeChange = false;
   if (Ctors.empty()) return false;
-  
+
   // Loop over global ctors, optimizing them when we can.
   for (unsigned i = 0; i != Ctors.size(); ++i) {
     Function *F = Ctors[i];
@@ -2467,10 +2467,10 @@
       }
       break;
     }
-    
+
     // We cannot simplify external ctor functions.
     if (F->empty()) continue;
-    
+
     // If we can evaluate the ctor at compile time, do.
     if (EvaluateStaticConstructor(F)) {
       Ctors.erase(Ctors.begin()+i);
@@ -2480,9 +2480,9 @@
       continue;
     }
   }
-  
+
   if (!MadeChange) return false;
-  
+
   GCL = InstallGlobalCtors(GCL, Ctors);
   return true;
 }
@@ -2546,21 +2546,21 @@
 
 bool GlobalOpt::runOnModule(Module &M) {
   bool Changed = false;
-  
+
   // Try to find the llvm.globalctors list.
   GlobalVariable *GlobalCtors = FindGlobalCtors(M);
 
   bool LocalChange = true;
   while (LocalChange) {
     LocalChange = false;
-    
+
     // Delete functions that are trivially dead, ccc -> fastcc
     LocalChange |= OptimizeFunctions(M);
-    
+
     // Optimize global_ctors list.
     if (GlobalCtors)
       LocalChange |= OptimizeGlobalCtorsList(GlobalCtors);
-    
+
     // Optimize non-address-taken globals.
     LocalChange |= OptimizeGlobalVars(M);
 
@@ -2568,9 +2568,9 @@
     LocalChange |= OptimizeGlobalAliases(M);
     Changed |= LocalChange;
   }
-  
+
   // TODO: Move all global ctors functions to the end of the module for code
   // layout.
-  
+
   return Changed;
 }



From isanbard at gmail.com  Mon Oct 18 16:22:31 2010
From: isanbard at gmail.com (Bill Wendling)
Date: Mon, 18 Oct 2010 21:22:31 -0000
Subject: [llvm-commits] [llvm] r116750 - in /llvm/trunk:
 include/llvm/Target/TargetInstrInfo.h lib/CodeGen/PeepholeOptimizer.cpp
 lib/Target/ARM/ARMBaseInstrInfo.cpp lib/Target/ARM/ARMBaseInstrInfo.h
Message-ID: <20101018212232.08D7E2A6C12C@llvm.org>

Author: void
Date: Mon Oct 18 16:22:31 2010
New Revision: 116750

URL: http://llvm.org/viewvc/llvm-project?rev=116750&view=rev
Log:
Don't recompute MachineRegisterInfo in the Optimize* method.

Modified:
    llvm/trunk/include/llvm/Target/TargetInstrInfo.h
    llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp
    llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
    llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h

Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=116750&r1=116749&r2=116750&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Mon Oct 18 16:22:31 2010
@@ -600,6 +600,7 @@
   /// *only* if a transformation took place.
   virtual bool OptimizeCompareInstr(MachineInstr *CmpInstr,
                                     unsigned SrcReg, int Mask, int Value,
+                                    const MachineRegisterInfo *MRI,
                                     MachineBasicBlock::iterator &) const {
     return false;
   }

Modified: llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp?rev=116750&r1=116749&r2=116750&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp (original)
+++ llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp Mon Oct 18 16:22:31 2010
@@ -247,7 +247,7 @@
     return false;
 
   // Attempt to optimize the comparison instruction.
-  if (TII->OptimizeCompareInstr(MI, SrcReg, CmpMask, CmpValue, NextIter)) {
+  if (TII->OptimizeCompareInstr(MI, SrcReg, CmpMask, CmpValue, MRI, NextIter)) {
     ++NumEliminated;
     return true;
   }

Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=116750&r1=116749&r2=116750&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Mon Oct 18 16:22:31 2010
@@ -1490,13 +1490,13 @@
 /// iterator *only* if a transformation took place.
 bool ARMBaseInstrInfo::
 OptimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, int CmpMask,
-                     int CmpValue, MachineBasicBlock::iterator &MII) const {
+                     int CmpValue, const MachineRegisterInfo *MRI,
+                     MachineBasicBlock::iterator &MII) const {
   if (CmpValue != 0)
     return false;
 
-  MachineRegisterInfo &MRI = CmpInstr->getParent()->getParent()->getRegInfo();
-  MachineRegisterInfo::def_iterator DI = MRI.def_begin(SrcReg);
-  if (llvm::next(DI) != MRI.def_end())
+  MachineRegisterInfo::def_iterator DI = MRI->def_begin(SrcReg);
+  if (llvm::next(DI) != MRI->def_end())
     // Only support one definition.
     return false;
 
@@ -1506,8 +1506,8 @@
   if (CmpMask != ~0) {
     if (!isSuitableForMask(MI, SrcReg, CmpMask, false)) {
       MI = 0;
-      for (MachineRegisterInfo::use_iterator UI = MRI.use_begin(SrcReg),
-           UE = MRI.use_end(); UI != UE; ++UI) {
+      for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(SrcReg),
+           UE = MRI->use_end(); UI != UE; ++UI) {
         if (UI->getParent() != CmpInstr->getParent()) continue;
         MachineInstr *PotentialAND = &*UI;
         if (!isSuitableForMask(PotentialAND, SrcReg, CmpMask, true))

Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h?rev=116750&r1=116749&r2=116750&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h Mon Oct 18 16:22:31 2010
@@ -341,6 +341,7 @@
   /// that we can remove a "comparison with zero".
   virtual bool OptimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg,
                                     int CmpMask, int CmpValue,
+                                    const MachineRegisterInfo *MRI,
                                     MachineBasicBlock::iterator &MII) const;
 
   virtual unsigned getNumMicroOps(const MachineInstr *MI,



From gohman at apple.com  Mon Oct 18 16:28:01 2010
From: gohman at apple.com (Dan Gohman)
Date: Mon, 18 Oct 2010 21:28:01 -0000
Subject: [llvm-commits] [llvm] r116751 - in /llvm/trunk:
 include/llvm/Analysis/AliasSetTracker.h lib/Analysis/AliasSetTracker.cpp
 test/Analysis/TypeBasedAliasAnalysis/licm.ll
Message-ID: <20101018212801.231322A6C12C@llvm.org>

Author: djg
Date: Mon Oct 18 16:28:00 2010
New Revision: 116751

URL: http://llvm.org/viewvc/llvm-project?rev=116751&view=rev
Log:
Don't pass the raw invalid pointer used to represent conflicting
TBAA information to AliasAnalysis.

Modified:
    llvm/trunk/include/llvm/Analysis/AliasSetTracker.h
    llvm/trunk/lib/Analysis/AliasSetTracker.cpp
    llvm/trunk/test/Analysis/TypeBasedAliasAnalysis/licm.ll

Modified: llvm/trunk/include/llvm/Analysis/AliasSetTracker.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/AliasSetTracker.h?rev=116751&r1=116750&r2=116751&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/AliasSetTracker.h (original)
+++ llvm/trunk/include/llvm/Analysis/AliasSetTracker.h Mon Oct 18 16:28:00 2010
@@ -67,7 +67,21 @@
 
     unsigned getSize() const { return Size; }
 
-    const MDNode *getTBAAInfo() const { return TBAAInfo; }
+    /// getRawTBAAInfo - Return the raw TBAAInfo member. In addition to
+    /// being null or a pointer to an MDNode, this could be -1, meaning
+    /// there was conflicting information.
+    const MDNode *getRawTBAAInfo() const {
+      return TBAAInfo;
+    }
+
+    /// getTBAAInfo - Return the TBAAInfo, or null if there is no
+    /// information or conflicting information.
+    const MDNode *getTBAAInfo() const {
+      // If we have conflicting TBAAInfo, return null.
+      if (TBAAInfo == reinterpret_cast<const MDNode *>(-1))
+        return 0;
+      return TBAAInfo;
+    }
 
     AliasSet *getAliasSet(AliasSetTracker &AST) {
       assert(AS && "No AliasSet yet!");
@@ -195,6 +209,7 @@
 
     Value *getPointer() const { return CurNode->getValue(); }
     unsigned getSize() const { return CurNode->getSize(); }
+    const MDNode *getRawTBAAInfo() const { return CurNode->getRawTBAAInfo(); }
     const MDNode *getTBAAInfo() const { return CurNode->getTBAAInfo(); }
 
     iterator& operator++() {                // Preincrement

Modified: llvm/trunk/lib/Analysis/AliasSetTracker.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/AliasSetTracker.cpp?rev=116751&r1=116750&r2=116751&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/AliasSetTracker.cpp (original)
+++ llvm/trunk/lib/Analysis/AliasSetTracker.cpp Mon Oct 18 16:28:00 2010
@@ -158,7 +158,8 @@
   // to be sure it doesn't alias the set...
   for (iterator I = begin(), E = end(); I != E; ++I)
     if (AA.alias(AliasAnalysis::Location(Ptr, Size, TBAAInfo),
-                 AliasAnalysis::Location(I.getPointer(), I.getSize(), I.getTBAAInfo())))
+                 AliasAnalysis::Location(I.getPointer(), I.getSize(),
+                                         I.getTBAAInfo())))
       return true;
 
   // Check the call sites list and invoke list...
@@ -376,7 +377,7 @@
     bool X;
     for (AliasSet::iterator ASI = AS.begin(), E = AS.end(); ASI != E; ++ASI) {
       AliasSet &NewAS = addPointer(ASI.getPointer(), ASI.getSize(),
-                                   ASI.getTBAAInfo(),
+                                   ASI.getRawTBAAInfo(),
                                    (AliasSet::AccessType)AS.AccessTy, X);
       if (AS.isVolatile()) NewAS.setVolatile();
     }
@@ -531,7 +532,8 @@
   // Add it to the alias set it aliases...
   I = PointerMap.find(From);
   AliasSet *AS = I->second->getAliasSet(*this);
-  AS->addPointer(*this, Entry, I->second->getSize(), I->second->getTBAAInfo(),
+  AS->addPointer(*this, Entry, I->second->getSize(),
+                 I->second->getRawTBAAInfo(),
                  true);
 }
 

Modified: llvm/trunk/test/Analysis/TypeBasedAliasAnalysis/licm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/TypeBasedAliasAnalysis/licm.ll?rev=116751&r1=116750&r2=116751&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/TypeBasedAliasAnalysis/licm.ll (original)
+++ llvm/trunk/test/Analysis/TypeBasedAliasAnalysis/licm.ll Mon Oct 18 16:28:00 2010
@@ -3,6 +3,7 @@
 ; LICM should be able to hoist the address load out of the loop
 ; by using TBAA information.
 
+; CHECK: @foo
 ; CHECK:      entry:
 ; CHECK-NEXT:   %tmp3 = load double** @P, !tbaa !0
 ; CHECK-NEXT:   br label %for.body
@@ -31,3 +32,30 @@
 !0 = metadata !{metadata !"root", null}
 !1 = metadata !{metadata !"pointer", metadata !0}
 !2 = metadata !{metadata !"double", metadata !0}
+
+; LICM shouldn't hoist anything here.
+
+; CHECK: @bar
+; CHECK: loop:
+; CHECK: load
+; CHECK: store
+; CHECK: load
+; CHECK: store
+; CHECK: br label %loop
+
+define void @bar(i8** %p) nounwind {
+entry:
+  %q = bitcast i8** %p to i8*
+  br label %loop
+
+loop:
+  %tmp51 = load i8** %p, !tbaa !4
+  store i8* %tmp51, i8** %p
+  %tmp40 = load i8* %q, !tbaa !5
+  store i8 %tmp40, i8* %q
+  br label %loop
+}
+
+!3 = metadata !{metadata !"pointer", metadata !4}
+!4 = metadata !{metadata !"char", metadata !5}
+!5 = metadata !{metadata !"root", null}



From jason.w.kim.2009 at gmail.com  Mon Oct 18 16:32:41 2010
From: jason.w.kim.2009 at gmail.com (Jason W Kim)
Date: Mon, 18 Oct 2010 21:32:41 -0000
Subject: [llvm-commits] [llvm] r116753 - in /llvm/trunk/test: MC/ELF/
	Scripts/
Message-ID: <20101018213241.E80FB2A6C12C@llvm.org>

Author: jasonwkim
Date: Mon Oct 18 16:32:41 2010
New Revision: 116753

URL: http://llvm.org/viewvc/llvm-project?rev=116753&view=rev
Log:
Changed elf-dump to output hex format by default.
Also updated tests. 


Modified:
    llvm/trunk/test/MC/ELF/alias.s
    llvm/trunk/test/MC/ELF/align-bss.s
    llvm/trunk/test/MC/ELF/align-nops.s
    llvm/trunk/test/MC/ELF/align-size.s
    llvm/trunk/test/MC/ELF/align-text.s
    llvm/trunk/test/MC/ELF/align.s
    llvm/trunk/test/MC/ELF/basic-elf.ll
    llvm/trunk/test/MC/ELF/common.s
    llvm/trunk/test/MC/ELF/common2.s
    llvm/trunk/test/MC/ELF/diff.s
    llvm/trunk/test/MC/ELF/empty.s
    llvm/trunk/test/MC/ELF/entsize.ll
    llvm/trunk/test/MC/ELF/entsize.s
    llvm/trunk/test/MC/ELF/file.s
    llvm/trunk/test/MC/ELF/got.s
    llvm/trunk/test/MC/ELF/local-reloc.s
    llvm/trunk/test/MC/ELF/merge.s
    llvm/trunk/test/MC/ELF/norelocation.s
    llvm/trunk/test/MC/ELF/pic-diff.s
    llvm/trunk/test/MC/ELF/plt.s
    llvm/trunk/test/MC/ELF/relax.s
    llvm/trunk/test/MC/ELF/relocation-386.s
    llvm/trunk/test/MC/ELF/relocation.s
    llvm/trunk/test/MC/ELF/section.s
    llvm/trunk/test/MC/ELF/size.s
    llvm/trunk/test/MC/ELF/sleb.s
    llvm/trunk/test/MC/ELF/uleb.s
    llvm/trunk/test/MC/ELF/undef.s
    llvm/trunk/test/MC/ELF/undef2.s
    llvm/trunk/test/MC/ELF/weak.s
    llvm/trunk/test/MC/ELF/zero.s
    llvm/trunk/test/Scripts/elf-dump

Modified: llvm/trunk/test/MC/ELF/alias.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/alias.s?rev=116753&r1=116752&r2=116753&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/alias.s (original)
+++ llvm/trunk/test/MC/ELF/alias.s Mon Oct 18 16:32:41 2010
@@ -15,70 +15,70 @@
 foo4:
 bar4 = foo4
 
-// CHECK:       # Symbol 1
-// CHECK-NEXT:  (('st_name', 5) # 'bar'
-// CHECK-NEXT:   ('st_bind', 0)
-// CHECK-NEXT:   ('st_type', 0)
-// CHECK-NEXT:   ('st_other', 0)
-// CHECK-NEXT:   ('st_shndx', 1)
-// CHECK-NEXT:   ('st_value', 0)
-// CHECK-NEXT:   ('st_size', 0)
+// CHECK:       # Symbol 0x1
+// CHECK-NEXT:  (('st_name', 0x5) # 'bar'
+// CHECK-NEXT:   ('st_bind', 0x0)
+// CHECK-NEXT:   ('st_type', 0x0)
+// CHECK-NEXT:   ('st_other', 0x0)
+// CHECK-NEXT:   ('st_shndx', 0x1)
+// CHECK-NEXT:   ('st_value', 0x0)
+// CHECK-NEXT:   ('st_size', 0x0)
 // CHECK-NEXT:  ),
-// CHECK-NEXT:  # Symbol 2
-// CHECK-NEXT: (('st_name', 29) # 'bar4'
-// CHECK-NEXT:  ('st_bind', 0)
-// CHECK-NEXT:  ('st_type', 2)
-// CHECK-NEXT:  ('st_other', 0)
-// CHECK-NEXT:  ('st_shndx', 1)
-// CHECK-NEXT:  ('st_value', 0)
-// CHECK-NEXT:  ('st_size', 0)
+// CHECK-NEXT:  # Symbol 0x2
+// CHECK-NEXT: (('st_name', 0x1d) # 'bar4'
+// CHECK-NEXT:  ('st_bind', 0x0)
+// CHECK-NEXT:  ('st_type', 0x2)
+// CHECK-NEXT:  ('st_other', 0x0)
+// CHECK-NEXT:  ('st_shndx', 0x1)
+// CHECK-NEXT:  ('st_value', 0x0)
+// CHECK-NEXT:  ('st_size', 0x0)
 // CHECK-NEXT: ),
-// CHECK-NEXT:  # Symbol 3
-// CHECK-NEXT:  (('st_name', 1) # 'foo'
-// CHECK-NEXT:   ('st_bind', 0)
-// CHECK-NEXT:   ('st_type', 0)
-// CHECK-NEXT:   ('st_other', 0)
-// CHECK-NEXT:   ('st_shndx', 1)
-// CHECK-NEXT:   ('st_value', 0)
-// CHECK-NEXT:   ('st_size', 0)
+// CHECK-NEXT:  # Symbol 0x3
+// CHECK-NEXT:  (('st_name', 0x1) # 'foo'
+// CHECK-NEXT:   ('st_bind', 0x0)
+// CHECK-NEXT:   ('st_type', 0x0)
+// CHECK-NEXT:   ('st_other', 0x0)
+// CHECK-NEXT:   ('st_shndx', 0x1)
+// CHECK-NEXT:   ('st_value', 0x0)
+// CHECK-NEXT:   ('st_size', 0x0)
 // CHECK-NEXT: ),
-// CHECK-NEXT:  # Symbol 4
-// CHECK-NEXT:  (('st_name', 14) # 'foo3'
-// CHECK-NEXT:   ('st_bind', 0)
-// CHECK-NEXT:   ('st_type', 0)
-// CHECK-NEXT:   ('st_other', 0)
-// CHECK-NEXT:   ('st_shndx', 1)
-// CHECK-NEXT:   ('st_value', 0)
-// CHECK-NEXT:   ('st_size', 0)
+// CHECK-NEXT:  # Symbol 0x4
+// CHECK-NEXT:  (('st_name', 0xe) # 'foo3'
+// CHECK-NEXT:   ('st_bind', 0x0)
+// CHECK-NEXT:   ('st_type', 0x0)
+// CHECK-NEXT:   ('st_other', 0x0)
+// CHECK-NEXT:   ('st_shndx', 0x1)
+// CHECK-NEXT:   ('st_value', 0x0)
+// CHECK-NEXT:   ('st_size', 0x0)
 // CHECK-NEXT: ),
-// CHECK-NEXT: # Symbol 5
-// CHECK-NEXT: (('st_name', 24) # 'foo4'
-// CHECK-NEXT:  ('st_bind', 0)
-// CHECK-NEXT:  ('st_type', 2)
-// CHECK-NEXT:  ('st_other', 0)
-// CHECK-NEXT:  ('st_shndx', 1)
-// CHECK-NEXT:  ('st_value', 0)
-// CHECK-NEXT:  ('st_size', 0)
+// CHECK-NEXT: # Symbol 0x5
+// CHECK-NEXT: (('st_name', 0x18) # 'foo4'
+// CHECK-NEXT:  ('st_bind', 0x0)
+// CHECK-NEXT:  ('st_type', 0x2)
+// CHECK-NEXT:  ('st_other', 0x0)
+// CHECK-NEXT:  ('st_shndx', 0x1)
+// CHECK-NEXT:  ('st_value', 0x0)
+// CHECK-NEXT:  ('st_size', 0x0)
 // CHECK-NEXT: ),
-// CHECK-NEXT: # Symbol 6
-// CHECK-NEXT: (('st_name', 0) # ''
-// CHECK:       # Symbol 7
-// CHECK-NEXT:  (('st_name', 0) # ''
-// CHECK:       # Symbol 8
-// CHECK-NEXT:  (('st_name', 0) # ''
-// CHECK:       # Symbol 9
-// CHECK-NEXT:  (('st_name', 19) # 'bar3'
-// CHECK-NEXT:   ('st_bind', 1)
-// CHECK-NEXT:   ('st_type', 0)
-// CHECK-NEXT:   ('st_other', 0)
-// CHECK-NEXT:   ('st_shndx', 1)
-// CHECK-NEXT:   ('st_value', 0)
-// CHECK-NEXT:   ('st_size', 0)
-// CHECK:       # Symbol 10
-// CHECK-NEXT:  (('st_name', 9) # 'bar2'
-// CHECK-NEXT:   ('st_bind', 1)
-// CHECK-NEXT:   ('st_type', 0)
-// CHECK-NEXT:   ('st_other', 0)
-// CHECK-NEXT:   ('st_shndx', 0)
-// CHECK-NEXT:   ('st_value', 0)
-// CHECK-NEXT:   ('st_size', 0)
+// CHECK-NEXT: # Symbol 0x6
+// CHECK-NEXT: (('st_name', 0x0) # ''
+// CHECK:       # Symbol 0x7
+// CHECK-NEXT:  (('st_name', 0x0) # ''
+// CHECK:       # Symbol 0x8
+// CHECK-NEXT:  (('st_name', 0x0) # ''
+// CHECK:       # Symbol 0x9
+// CHECK-NEXT:  (('st_name', 0x13) # 'bar3'
+// CHECK-NEXT:   ('st_bind', 0x1)
+// CHECK-NEXT:   ('st_type', 0x0)
+// CHECK-NEXT:   ('st_other', 0x0)
+// CHECK-NEXT:   ('st_shndx', 0x1)
+// CHECK-NEXT:   ('st_value', 0x0)
+// CHECK-NEXT:   ('st_size', 0x0)
+// CHECK:       # Symbol 0xa
+// CHECK-NEXT:  (('st_name', 0x9) # 'bar2'
+// CHECK-NEXT:   ('st_bind', 0x1)
+// CHECK-NEXT:   ('st_type', 0x0)
+// CHECK-NEXT:   ('st_other', 0x0)
+// CHECK-NEXT:   ('st_shndx', 0x0)
+// CHECK-NEXT:   ('st_value', 0x0)
+// CHECK-NEXT:   ('st_size', 0x0)

Modified: llvm/trunk/test/MC/ELF/align-bss.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/align-bss.s?rev=116753&r1=116752&r2=116753&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/align-bss.s (original)
+++ llvm/trunk/test/MC/ELF/align-bss.s Mon Oct 18 16:32:41 2010
@@ -5,13 +5,13 @@
 	.local	foo
 	.comm	foo,2048,16
 
-// CHECK:        ('sh_name', 13) # '.bss'
-// CHECK-NEXT:   ('sh_type', 8)
-// CHECK-NEXT:   ('sh_flags', 3)
-// CHECK-NEXT:   ('sh_addr', 0)
-// CHECK-NEXT:   ('sh_offset', 64)
-// CHECK-NEXT:   ('sh_size', 2048)
-// CHECK-NEXT:   ('sh_link', 0)
-// CHECK-NEXT:   ('sh_info', 0)
-// CHECK-NEXT:   ('sh_addralign', 16)
-// CHECK-NEXT:   ('sh_entsize', 0)
+// CHECK:        ('sh_name', 0xd) # '.bss'
+// CHECK-NEXT:   ('sh_type', 0x8)
+// CHECK-NEXT:   ('sh_flags', 0x3)
+// CHECK-NEXT:   ('sh_addr', 0x0)
+// CHECK-NEXT:   ('sh_offset', 0x40)
+// CHECK-NEXT:   ('sh_size', 0x800)
+// CHECK-NEXT:   ('sh_link', 0x0)
+// CHECK-NEXT:   ('sh_info', 0x0)
+// CHECK-NEXT:   ('sh_addralign', 0x10)
+// CHECK-NEXT:   ('sh_entsize', 0x0)

Modified: llvm/trunk/test/MC/ELF/align-nops.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/align-nops.s?rev=116753&r1=116752&r2=116753&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/align-nops.s (original)
+++ llvm/trunk/test/MC/ELF/align-nops.s Mon Oct 18 16:32:41 2010
@@ -15,26 +15,26 @@
     .long 0
     .align  8
 
-// CHECK: (('sh_name', 1) # '.text'
-// CHECK-NEXT:  ('sh_type', 1)
-// CHECK-NEXT:  ('sh_flags', 6)
+// CHECK: (('sh_name', 0x1) # '.text'
+// CHECK-NEXT:  ('sh_type', 0x1)
+// CHECK-NEXT:  ('sh_flags', 0x6)
 // CHECK-NEXT:  ('sh_addr',
 // CHECK-NEXT:  ('sh_offset',
-// CHECK-NEXT:  ('sh_size', 16)
-// CHECK-NEXT:  ('sh_link', 0)
-// CHECK-NEXT:  ('sh_info', 0)
-// CHECK-NEXT:  ('sh_addralign', 8)
-// CHECK-NEXT:  ('sh_entsize', 0)
+// CHECK-NEXT:  ('sh_size', 0x10)
+// CHECK-NEXT:  ('sh_link', 0x0)
+// CHECK-NEXT:  ('sh_info', 0x0)
+// CHECK-NEXT:  ('sh_addralign', 0x8)
+// CHECK-NEXT:  ('sh_entsize', 0x0)
 // CHECK-NEXT:  ('_section_data', '00000000 0f1f4000 00000000 0f1f4000')
 
-// CHECK: (('sh_name', 7) # '.data'
-// CHECK-NEXT:  ('sh_type', 1)
-// CHECK-NEXT:  ('sh_flags', 3)
+// CHECK: (('sh_name', 0x7) # '.data'
+// CHECK-NEXT:  ('sh_type', 0x1)
+// CHECK-NEXT:  ('sh_flags', 0x3)
 // CHECK-NEXT:  ('sh_addr',
 // CHECK-NEXT:  ('sh_offset',
-// CHECK-NEXT:  ('sh_size', 16)
-// CHECK-NEXT:  ('sh_link', 0)
-// CHECK-NEXT:  ('sh_info', 0)
-// CHECK-NEXT:  ('sh_addralign', 8)
-// CHECK-NEXT:  ('sh_entsize', 0)
+// CHECK-NEXT:  ('sh_size', 0x10)
+// CHECK-NEXT:  ('sh_link', 0x0)
+// CHECK-NEXT:  ('sh_info', 0x0)
+// CHECK-NEXT:  ('sh_addralign', 0x8)
+// CHECK-NEXT:  ('sh_entsize', 0x0)
 // CHECK-NEXT:  ('_section_data', '00000000 90909090 00000000 00000000')

Modified: llvm/trunk/test/MC/ELF/align-size.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/align-size.s?rev=116753&r1=116752&r2=116753&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/align-size.s (original)
+++ llvm/trunk/test/MC/ELF/align-size.s Mon Oct 18 16:32:41 2010
@@ -5,9 +5,9 @@
 	.zero 4
 	.align	8
 
-// CHECK:      (('sh_name', 1) # '.text'
-// CHECK-NEXT:  ('sh_type', 1)
-// CHECK-NEXT:  ('sh_flags', 6)
-// CHECK-NEXT:  ('sh_addr', 0)
-// CHECK-NEXT:  ('sh_offset', 64)
-// CHECK-NEXT:  ('sh_size', 8)
+// CHECK:      (('sh_name', 0x1) # '.text'
+// CHECK-NEXT:  ('sh_type', 0x1)
+// CHECK-NEXT:  ('sh_flags', 0x6)
+// CHECK-NEXT:  ('sh_addr', 0x0)
+// CHECK-NEXT:  ('sh_offset', 0x40)
+// CHECK-NEXT:  ('sh_size', 0x8)

Modified: llvm/trunk/test/MC/ELF/align-text.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/align-text.s?rev=116753&r1=116752&r2=116753&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/align-text.s (original)
+++ llvm/trunk/test/MC/ELF/align-text.s Mon Oct 18 16:32:41 2010
@@ -6,14 +6,14 @@
         .text
         .zero 1
 
-// CHECK:      (('sh_name', 1) # '.text'
-// CHECK-NEXT:  ('sh_type', 1)
-// CHECK-NEXT:  ('sh_flags', 6)
-// CHECK-NEXT:   ('sh_addr', 0)
-// CHECK-NEXT:   ('sh_offset', 64)
-// CHECK-NEXT:   ('sh_size', 2)
-// CHECK-NEXT:   ('sh_link', 0)
-// CHECK-NEXT:   ('sh_info', 0)
-// CHECK-NEXT:   ('sh_addralign', 4)
-// CHECK-NEXT:   ('sh_entsize', 0)
+// CHECK:      (('sh_name', 0x1) # '.text'
+// CHECK-NEXT:  ('sh_type', 0x1)
+// CHECK-NEXT:  ('sh_flags', 0x6)
+// CHECK-NEXT:   ('sh_addr', 0x0)
+// CHECK-NEXT:   ('sh_offset', 0x40)
+// CHECK-NEXT:   ('sh_size', 0x2)
+// CHECK-NEXT:   ('sh_link', 0x0)
+// CHECK-NEXT:   ('sh_info', 0x0)
+// CHECK-NEXT:   ('sh_addralign', 0x4)
+// CHECK-NEXT:   ('sh_entsize', 0x0)
 // CHECK-NEXT:  ),

Modified: llvm/trunk/test/MC/ELF/align.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/align.s?rev=116753&r1=116752&r2=116753&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/align.s (original)
+++ llvm/trunk/test/MC/ELF/align.s Mon Oct 18 16:32:41 2010
@@ -7,26 +7,26 @@
 	.section	.rodata,"a", at progbits
 	.align	8
 
-// CHECK: # Section 3
-// CHECK-NEXT:  (('sh_name', 13) # '.bss'
-// CHECK-NEXT:   ('sh_type', 8)
-// CHECK-NEXT:   ('sh_flags', 3)
-// CHECK-NEXT:   ('sh_addr', 0)
-// CHECK-NEXT:   ('sh_offset', 68)
-// CHECK-NEXT:   ('sh_size', 0)
-// CHECK-NEXT:   ('sh_link', 0)
-// CHECK-NEXT:   ('sh_info', 0)
-// CHECK-NEXT:   ('sh_addralign', 4)
-// CHECK-NEXT:   ('sh_entsize', 0)
+// CHECK: # Section 0x3
+// CHECK-NEXT:  (('sh_name', 0xd) # '.bss'
+// CHECK-NEXT:   ('sh_type', 0x8)
+// CHECK-NEXT:   ('sh_flags', 0x3)
+// CHECK-NEXT:   ('sh_addr', 0x0)
+// CHECK-NEXT:   ('sh_offset', 0x44)
+// CHECK-NEXT:   ('sh_size', 0x0)
+// CHECK-NEXT:   ('sh_link', 0x0)
+// CHECK-NEXT:   ('sh_info', 0x0)
+// CHECK-NEXT:   ('sh_addralign', 0x4)
+// CHECK-NEXT:   ('sh_entsize', 0x0)
 // CHECK-NEXT:  ),
-// CHECK-NEXT:  # Section 4
-// CHECK-NEXT:  (('sh_name', 18) # '.rodata'
-// CHECK-NEXT:   ('sh_type', 1)
-// CHECK-NEXT:   ('sh_flags', 2)
-// CHECK-NEXT:   ('sh_addr', 0)
-// CHECK-NEXT:   ('sh_offset', 72)
-// CHECK-NEXT:   ('sh_size', 0)
-// CHECK-NEXT:   ('sh_link', 0)
-// CHECK-NEXT:   ('sh_info', 0)
-// CHECK-NEXT:   ('sh_addralign', 8)
-// CHECK-NEXT:   ('sh_entsize', 0)
+// CHECK-NEXT:  # Section 0x4
+// CHECK-NEXT:  (('sh_name', 0x12) # '.rodata'
+// CHECK-NEXT:   ('sh_type', 0x1)
+// CHECK-NEXT:   ('sh_flags', 0x2)
+// CHECK-NEXT:   ('sh_addr', 0x0)
+// CHECK-NEXT:   ('sh_offset', 0x48)
+// CHECK-NEXT:   ('sh_size', 0x0)
+// CHECK-NEXT:   ('sh_link', 0x0)
+// CHECK-NEXT:   ('sh_info', 0x0)
+// CHECK-NEXT:   ('sh_addralign', 0x8)
+// CHECK-NEXT:   ('sh_entsize', 0x0)

Modified: llvm/trunk/test/MC/ELF/basic-elf.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/basic-elf.ll?rev=116753&r1=116752&r2=116753&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/basic-elf.ll (original)
+++ llvm/trunk/test/MC/ELF/basic-elf.ll Mon Oct 18 16:32:41 2010
@@ -12,100 +12,100 @@
 
 declare i32 @puts(i8* nocapture) nounwind
 
-; 32: ('e_indent[EI_CLASS]', 1)
-; 32: ('e_indent[EI_DATA]', 1)
-; 32: ('e_indent[EI_VERSION]', 1)
+; 32: ('e_indent[EI_CLASS]', 0x1)
+; 32: ('e_indent[EI_DATA]', 0x1)
+; 32: ('e_indent[EI_VERSION]', 0x1)
 ; 32: ('_sections', [
 ; 32:   # Section 0
-; 32:   (('sh_name', 0) # ''
+; 32:   (('sh_name', 0x0) # ''
 
 ; 32:   # '.text'
 
-; 32: ('st_bind', 0)
-; 32: ('st_type', 3)
+; 32: ('st_bind', 0x0)
+; 32: ('st_type', 0x3)
 
-; 32: ('st_bind', 0)
-; 32: ('st_type', 3)
+; 32: ('st_bind', 0x0)
+; 32: ('st_type', 0x3)
 
-; 32: ('st_bind', 0)
-; 32: ('st_type', 3)
+; 32: ('st_bind', 0x0)
+; 32: ('st_type', 0x3)
 
 ; 32:   # 'main'
-; 32:   ('st_bind', 1)
-; 32-NEXT: ('st_type', 2)
+; 32:   ('st_bind', 0x1)
+; 32-NEXT: ('st_type', 0x2)
 
 ; 32:   # 'puts'
-; 32:   ('st_bind', 1)
-; 32-NEXT: ('st_type', 0)
+; 32:   ('st_bind', 0x1)
+; 32-NEXT: ('st_type', 0x0)
 
 ; 32:   # '.rel.text'
 
 ; 32:   ('_relocations', [
-; 32:     # Relocation 0
-; 32:     (('r_offset', 6)
-; 32:      ('r_type', 1)
+; 32:     # Relocation 0x0
+; 32:     (('r_offset', 0x6)
+; 32:      ('r_type', 0x1)
 ; 32:     ),
-; 32:     # Relocation 1
-; 32:     (('r_offset', 11)
-; 32:      ('r_type', 2)
+; 32:     # Relocation 0x1
+; 32:     (('r_offset', 0xb)
+; 32:      ('r_type', 0x2)
 ; 32:     ),
-; 32:     # Relocation 2
-; 32:     (('r_offset', 18)
-; 32:      ('r_type', 1)
+; 32:     # Relocation 0x2
+; 32:     (('r_offset', 0x12)
+; 32:      ('r_type', 0x1)
 ; 32:     ),
-; 32:     # Relocation 3
-; 32:     (('r_offset', 23)
-; 32:      ('r_type', 2)
+; 32:     # Relocation 0x3
+; 32:     (('r_offset', 0x17)
+; 32:      ('r_type', 0x2)
 ; 32:     ),
 ; 32:   ])
 
-; 64: ('e_indent[EI_CLASS]', 2)
-; 64: ('e_indent[EI_DATA]', 1)
-; 64: ('e_indent[EI_VERSION]', 1)
+; 64: ('e_indent[EI_CLASS]', 0x2)
+; 64: ('e_indent[EI_DATA]', 0x1)
+; 64: ('e_indent[EI_VERSION]', 0x1)
 ; 64: ('_sections', [
 ; 64:   # Section 0
-; 64:   (('sh_name', 0) # ''
+; 64:   (('sh_name', 0x0) # ''
 
 ; 64:   # '.text'
 
-; 64: ('st_bind', 0)
-; 64: ('st_type', 3)
+; 64: ('st_bind', 0x0)
+; 64: ('st_type', 0x3)
 
-; 64: ('st_bind', 0)
-; 64: ('st_type', 3)
+; 64: ('st_bind', 0x0)
+; 64: ('st_type', 0x3)
 
-; 64: ('st_bind', 0)
-; 64: ('st_type', 3)
+; 64: ('st_bind', 0x0)
+; 64: ('st_type', 0x3)
 
 ; 64:   # 'main'
-; 64-NEXT: ('st_bind', 1)
-; 64-NEXT: ('st_type', 2)
+; 64-NEXT: ('st_bind', 0x1)
+; 64-NEXT: ('st_type', 0x2)
 
 ; 64:   # 'puts'
-; 64-NEXT: ('st_bind', 1)
-; 64-NEXT: ('st_type', 0)
+; 64-NEXT: ('st_bind', 0x1)
+; 64-NEXT: ('st_type', 0x0)
 
 ; 64:   # '.rela.text'
 
 ; 64:   ('_relocations', [
-; 64:     # Relocation 0
-; 64:     (('r_offset', 5)
-; 64:      ('r_type', 10)
-; 64:      ('r_addend', 0)
+; 64:     # Relocation 0x0
+; 64:     (('r_offset', 0x5)
+; 64:      ('r_type', 0xa)
+; 64:      ('r_addend', 0x0)
 ; 64:     ),
-; 64:     # Relocation 1
-; 64:     (('r_offset', 10)
-; 64:      ('r_type', 2)
-; 64:      ('r_addend', -4)
+; 64:     # Relocation 0x1
+; 64:     (('r_offset', 0xa)
+; 64:      ('r_type', 0x2)
+; 64:      ('r_addend', -0x4)
 ; 64:     ),
-; 64:     # Relocation 2
-; 64:     (('r_offset', 15)
-; 64:      ('r_type', 10)
-; 64:      ('r_addend', 6)
+; 64:     # Relocation 0x2
+; 64:     (('r_offset', 0xf)
+; 64:      ('r_type', 0xa)
+; 64:      ('r_addend', 0x6)
 ; 64:     ),
-; 64:     # Relocation 3
-; 64:     (('r_offset', 20)
-; 64:      ('r_type', 2)
-; 64:      ('r_addend', -4)
+; 64:     # Relocation 0x3
+; 64:     (('r_offset', 0x14)
+; 64:      ('r_type', 0x2)
+; 64:      ('r_addend', -0x4)
 ; 64:     ),
 ; 64:   ])

Modified: llvm/trunk/test/MC/ELF/common.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/common.s?rev=116753&r1=116752&r2=116753&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/common.s (original)
+++ llvm/trunk/test/MC/ELF/common.s Mon Oct 18 16:32:41 2010
@@ -8,13 +8,13 @@
 	.local	common1
 	.comm	common1,1,1
 
-// CHECK: ('st_name', 1) # 'common1'
-// CHECK-NEXT: ('st_bind', 0)
-// CHECK-NEXT: ('st_type', 1)
-// CHECK-NEXT: ('st_other', 0)
+// CHECK: ('st_name', 0x1) # 'common1'
+// CHECK-NEXT: ('st_bind', 0x0)
+// CHECK-NEXT: ('st_type', 0x1)
+// CHECK-NEXT: ('st_other', 0x0)
 // CHECK-NEXT: ('st_shndx',
-// CHECK-NEXT: ('st_value', 0)
-// CHECK-NEXT: ('st_size', 1)
+// CHECK-NEXT: ('st_value', 0x0)
+// CHECK-NEXT: ('st_size', 0x1)
 
 
 // Same as common1, but with directives in a different order.
@@ -22,25 +22,25 @@
 	.type	common2, at object
 	.comm	common2,1,1
 
-// CHECK: ('st_name', 9) # 'common2'
-// CHECK-NEXT: ('st_bind', 0)
-// CHECK-NEXT: ('st_type', 1)
-// CHECK-NEXT: ('st_other', 0)
+// CHECK: ('st_name', 0x9) # 'common2'
+// CHECK-NEXT: ('st_bind', 0x0)
+// CHECK-NEXT: ('st_type', 0x1)
+// CHECK-NEXT: ('st_other', 0x0)
 // CHECK-NEXT: ('st_shndx',
-// CHECK-NEXT: ('st_value', 1)
-// CHECK-NEXT: ('st_size', 1)
+// CHECK-NEXT: ('st_value', 0x1)
+// CHECK-NEXT: ('st_size', 0x1)
 
 // Test that without an explicit .local we produce a global.
 	.type	common3, at object
 	.comm	common3,4,4
 
-// CHECK: ('st_name', 17) # 'common3'
-// CHECK-NEXT: ('st_bind', 1)
-// CHECK-NEXT: ('st_type', 1)
-// CHECK-NEXT: ('st_other', 0)
-// CHECK-NEXT: ('st_shndx', 65522)
-// CHECK-NEXT: ('st_value', 4)
-// CHECK-NEXT: ('st_size', 4)
+// CHECK: ('st_name', 0x11) # 'common3'
+// CHECK-NEXT: ('st_bind', 0x1)
+// CHECK-NEXT: ('st_type', 0x1)
+// CHECK-NEXT: ('st_other', 0x0)
+// CHECK-NEXT: ('st_shndx', 0xfff2)
+// CHECK-NEXT: ('st_value', 0x4)
+// CHECK-NEXT: ('st_size', 0x4)
 
 
 // Test that without an explicit .local we produce a global, even if the first
@@ -54,10 +54,10 @@
 	.type	common4, at object
 	.comm	common4,40,16
 
-// CHECK: ('st_name', 29) # 'common4'
-// CHECK-NEXT: ('st_bind', 1)
-// CHECK-NEXT: ('st_type', 1)
-// CHECK-NEXT: ('st_other', 0)
-// CHECK-NEXT: ('st_shndx', 65522)
-// CHECK-NEXT: ('st_value', 16)
-// CHECK-NEXT: ('st_size', 40)
+// CHECK: ('st_name', 0x1d) # 'common4'
+// CHECK-NEXT: ('st_bind', 0x1)
+// CHECK-NEXT: ('st_type', 0x1)
+// CHECK-NEXT: ('st_other', 0x0)
+// CHECK-NEXT: ('st_shndx', 0xfff2)
+// CHECK-NEXT: ('st_value', 0x10)
+// CHECK-NEXT: ('st_size', 0x28)

Modified: llvm/trunk/test/MC/ELF/common2.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/common2.s?rev=116753&r1=116752&r2=116753&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/common2.s (original)
+++ llvm/trunk/test/MC/ELF/common2.s Mon Oct 18 16:32:41 2010
@@ -9,12 +9,12 @@
         .zero 1
 	.align	8
 
-// CHECK:      (('sh_name', 13) # '.bss'
+// CHECK:      (('sh_name', 0xd) # '.bss'
 // CHECK-NEXT:  ('sh_type',
 // CHECK-NEXT:  ('sh_flags'
 // CHECK-NEXT:  ('sh_addr',
 // CHECK-NEXT:  ('sh_offset',
-// CHECK-NEXT:  ('sh_size', 9)
+// CHECK-NEXT:  ('sh_size', 0x9)
 // CHECK-NEXT:  ('sh_link',
 // CHECK-NEXT:  ('sh_info',
 // CHECK-NEXT:  ('sh_addralign',

Modified: llvm/trunk/test/MC/ELF/diff.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/diff.s?rev=116753&r1=116752&r2=116753&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/diff.s (original)
+++ llvm/trunk/test/MC/ELF/diff.s Mon Oct 18 16:32:41 2010
@@ -8,8 +8,8 @@
 zed:
         mov zed+(bar-foo), %eax
 
-// CHECK:       # Relocation 0
-// CHECK-NEXT:  (('r_offset', 5)
-// CHECK-NEXT:   ('r_sym', 6)
-// CHECK-NEXT:   ('r_type', 11)
-// CHECK-NEXT:   ('r_addend', 1)
+// CHECK:       # Relocation 0x0
+// CHECK-NEXT:  (('r_offset', 0x5)
+// CHECK-NEXT:   ('r_sym', 0x6)
+// CHECK-NEXT:   ('r_type', 0xb)
+// CHECK-NEXT:   ('r_addend', 0x1)

Modified: llvm/trunk/test/MC/ELF/empty.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/empty.s?rev=116753&r1=116752&r2=116753&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/empty.s (original)
+++ llvm/trunk/test/MC/ELF/empty.s Mon Oct 18 16:32:41 2010
@@ -3,68 +3,68 @@
 // Test that like gnu as we create text, data and bss by default. Also test
 // that shstrtab, symtab and strtab are listed in that order.
 
-// CHECK:      ('sh_name', 1) # '.text'
-// CHECK-NEXT: ('sh_type', 1)
-// CHECK-NEXT: ('sh_flags', 6)
-// CHECK-NEXT: ('sh_addr', 0)
-// CHECK-NEXT: ('sh_offset', 64)
-// CHECK-NEXT: ('sh_size', 0)
-// CHECK-NEXT: ('sh_link', 0)
-// CHECK-NEXT: ('sh_info', 0)
-// CHECK-NEXT: ('sh_addralign', 4)
-// CHECK-NEXT: ('sh_entsize', 0)
-
-// CHECK:      ('sh_name', 7) # '.data'
-// CHECK-NEXT: ('sh_type', 1)
-// CHECK-NEXT: ('sh_flags', 3)
-// CHECK-NEXT: ('sh_addr', 0)
-// CHECK-NEXT: ('sh_offset', 64)
-// CHECK-NEXT: ('sh_size', 0)
-// CHECK-NEXT: ('sh_link', 0)
-// CHECK-NEXT: ('sh_info', 0)
-// CHECK-NEXT: ('sh_addralign', 4)
-// CHECK-NEXT: ('sh_entsize', 0)
-
-// CHECK:      ('sh_name', 13) # '.bss'
-// CHECK-NEXT: ('sh_type', 8)
-// CHECK-NEXT: ('sh_flags', 3)
-// CHECK-NEXT: ('sh_addr', 0)
-// CHECK-NEXT: ('sh_offset', 64)
-// CHECK-NEXT: ('sh_size', 0)
-// CHECK-NEXT: ('sh_link', 0)
-// CHECK-NEXT: ('sh_info', 0)
-// CHECK-NEXT: ('sh_addralign', 4)
-// CHECK-NEXT: ('sh_entsize', 0)
-
-// CHECK:      ('sh_name', 18) # '.shstrtab'
-// CHECK-NEXT: ('sh_type', 3)
-// CHECK-NEXT:    ('sh_flags', 0)
-// CHECK-NEXT:    ('sh_addr', 0)
-// CHECK-NEXT:    ('sh_offset', 64)
-// CHECK-NEXT:    ('sh_size', 44)
-// CHECK-NEXT:    ('sh_link', 0)
-// CHECK-NEXT:    ('sh_info', 0)
-// CHECK-NEXT:    ('sh_addralign', 1)
-// CHECK-NEXT:    ('sh_entsize', 0)
-
-// CHECK: ('sh_name', 28) # '.symtab'
-// CHECK-NEXT:    ('sh_type', 2)
-// CHECK-NEXT:    ('sh_flags', 0)
-// CHECK-NEXT:    ('sh_addr', 0)
+// CHECK:      ('sh_name', 0x1) # '.text'
+// CHECK-NEXT: ('sh_type', 0x1)
+// CHECK-NEXT: ('sh_flags', 0x6)
+// CHECK-NEXT: ('sh_addr', 0x0)
+// CHECK-NEXT: ('sh_offset', 0x40)
+// CHECK-NEXT: ('sh_size', 0x0)
+// CHECK-NEXT: ('sh_link', 0x0)
+// CHECK-NEXT: ('sh_info', 0x0)
+// CHECK-NEXT: ('sh_addralign', 0x4)
+// CHECK-NEXT: ('sh_entsize', 0x0)
+
+// CHECK:      ('sh_name', 0x7) # '.data'
+// CHECK-NEXT: ('sh_type', 0x1)
+// CHECK-NEXT: ('sh_flags', 0x3)
+// CHECK-NEXT: ('sh_addr', 0x0)
+// CHECK-NEXT: ('sh_offset', 0x40)
+// CHECK-NEXT: ('sh_size', 0x0)
+// CHECK-NEXT: ('sh_link', 0x0)
+// CHECK-NEXT: ('sh_info', 0x0)
+// CHECK-NEXT: ('sh_addralign', 0x4)
+// CHECK-NEXT: ('sh_entsize', 0x0)
+
+// CHECK:      ('sh_name', 0xd) # '.bss'
+// CHECK-NEXT: ('sh_type', 0x8)
+// CHECK-NEXT: ('sh_flags', 0x3)
+// CHECK-NEXT: ('sh_addr', 0x0)
+// CHECK-NEXT: ('sh_offset', 0x40)
+// CHECK-NEXT: ('sh_size', 0x0)
+// CHECK-NEXT: ('sh_link', 0x0)
+// CHECK-NEXT: ('sh_info', 0x0)
+// CHECK-NEXT: ('sh_addralign', 0x4)
+// CHECK-NEXT: ('sh_entsize', 0x0)
+
+// CHECK:      ('sh_name', 0x12) # '.shstrtab'
+// CHECK-NEXT: ('sh_type', 0x3)
+// CHECK-NEXT:    ('sh_flags', 0x0)
+// CHECK-NEXT:    ('sh_addr', 0x0)
+// CHECK-NEXT:    ('sh_offset', 0x40)
+// CHECK-NEXT:    ('sh_size', 0x2c)
+// CHECK-NEXT:    ('sh_link', 0x0)
+// CHECK-NEXT:    ('sh_info', 0x0)
+// CHECK-NEXT:    ('sh_addralign', 0x1)
+// CHECK-NEXT:    ('sh_entsize', 0x0)
+
+// CHECK: ('sh_name', 0x1c) # '.symtab'
+// CHECK-NEXT:    ('sh_type', 0x2)
+// CHECK-NEXT:    ('sh_flags', 0x0)
+// CHECK-NEXT:    ('sh_addr', 0x0)
 // CHECK-NEXT:    ('sh_offset',
-// CHECK-NEXT:    ('sh_size', 96)
-// CHECK-NEXT:    ('sh_link', 6)
-// CHECK-NEXT:    ('sh_info', 4)
-// CHECK-NEXT:    ('sh_addralign', 8)
-// CHECK-NEXT:    ('sh_entsize', 24)
-
-// CHECK: ('sh_name', 36) # '.strtab'
-// CHECK-NEXT:    ('sh_type', 3)
-// CHECK-NEXT:    ('sh_flags', 0)
-// CHECK-NEXT:    ('sh_addr', 0)
+// CHECK-NEXT:    ('sh_size', 0x60)
+// CHECK-NEXT:    ('sh_link', 0x6)
+// CHECK-NEXT:    ('sh_info', 0x4)
+// CHECK-NEXT:    ('sh_addralign', 0x8)
+// CHECK-NEXT:    ('sh_entsize', 0x18)
+
+// CHECK: ('sh_name', 0x24) # '.strtab'
+// CHECK-NEXT:    ('sh_type', 0x3)
+// CHECK-NEXT:    ('sh_flags', 0x0)
+// CHECK-NEXT:    ('sh_addr', 0x0)
 // CHECK-NEXT:    ('sh_offset',
-// CHECK-NEXT:    ('sh_size', 1)
-// CHECK-NEXT:    ('sh_link', 0)
-// CHECK-NEXT:    ('sh_info', 0)
-// CHECK-NEXT:    ('sh_addralign', 1)
-// CHECK-NEXT:    ('sh_entsize', 0)
+// CHECK-NEXT:    ('sh_size', 0x1)
+// CHECK-NEXT:    ('sh_link', 0x0)
+// CHECK-NEXT:    ('sh_info', 0x0)
+// CHECK-NEXT:    ('sh_addralign', 0x1)
+// CHECK-NEXT:    ('sh_entsize', 0x0)

Modified: llvm/trunk/test/MC/ELF/entsize.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/entsize.ll?rev=116753&r1=116752&r2=116753&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/entsize.ll (original)
+++ llvm/trunk/test/MC/ELF/entsize.ll Mon Oct 18 16:32:41 2010
@@ -20,25 +20,25 @@
 
 ;;;;;
 
-; 64: (('sh_name', 18) # '.rodata.str1.1'
-; 64-NEXT:   ('sh_type', 1)
-; 64-NEXT:   ('sh_flags', 50)
+; 64: (('sh_name', 0x12) # '.rodata.str1.1'
+; 64-NEXT:   ('sh_type', 0x1)
+; 64-NEXT:   ('sh_flags', 0x32)
 ; 64-NEXT:   ('sh_addr',
 ; 64-NEXT:   ('sh_offset',
-; 64-NEXT:   ('sh_size', 13)
+; 64-NEXT:   ('sh_size', 0xd)
 ; 64-NEXT:   ('sh_link',
 ; 64-NEXT:   ('sh_info',
-; 64-NEXT:   ('sh_addralign', 1)
-; 64-NEXT:   ('sh_entsize', 1)
+; 64-NEXT:   ('sh_addralign', 0x1)
+; 64-NEXT:   ('sh_entsize', 0x1)
 
-; 64: (('sh_name', 33) # '.rodata.cst8'
-; 64-NEXT:   ('sh_type', 1)
-; 64-NEXT:   ('sh_flags', 18)
+; 64: (('sh_name', 0x21) # '.rodata.cst8'
+; 64-NEXT:   ('sh_type', 0x1)
+; 64-NEXT:   ('sh_flags', 0x12)
 ; 64-NEXT:   ('sh_addr',
 ; 64-NEXT:   ('sh_offset',
-; 64-NEXT:   ('sh_size', 16)
+; 64-NEXT:   ('sh_size', 0x10)
 ; 64-NEXT:   ('sh_link',
 ; 64-NEXT:   ('sh_info',
-; 64-NEXT:   ('sh_addralign', 8)
-; 64-NEXT:   ('sh_entsize', 8)
+; 64-NEXT:   ('sh_addralign', 0x8)
+; 64-NEXT:   ('sh_entsize', 0x8)
 

Modified: llvm/trunk/test/MC/ELF/entsize.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/entsize.s?rev=116753&r1=116752&r2=116753&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/entsize.s (original)
+++ llvm/trunk/test/MC/ELF/entsize.s Mon Oct 18 16:32:41 2010
@@ -32,38 +32,38 @@
     .quad 42
     .quad 42
 
-// CHECK: # Section 4
-// CHECK-NEXT:   ('sh_name', 18) # '.rodata.str1.1'
-// CHECK-NEXT:   ('sh_type', 1)
-// CHECK-NEXT:   ('sh_flags', 50)
+// CHECK: # Section 0x4
+// CHECK-NEXT:   ('sh_name', 0x12) # '.rodata.str1.1'
+// CHECK-NEXT:   ('sh_type', 0x1)
+// CHECK-NEXT:   ('sh_flags', 0x32)
 // CHECK-NEXT:   ('sh_addr',
 // CHECK-NEXT:   ('sh_offset',
-// CHECK-NEXT:   ('sh_size', 13)
+// CHECK-NEXT:   ('sh_size', 0xd)
 // CHECK-NEXT:   ('sh_link',
 // CHECK-NEXT:   ('sh_info',
-// CHECK-NEXT:   ('sh_addralign', 1)
-// CHECK-NEXT:   ('sh_entsize', 1)
+// CHECK-NEXT:   ('sh_addralign', 0x1)
+// CHECK-NEXT:   ('sh_entsize', 0x1)
 
-// CHECK: # Section 5
-// CHECK-NEXT:   ('sh_name', 33) # '.rodata.str2.1'
-// CHECK-NEXT:   ('sh_type', 1)
-// CHECK-NEXT:   ('sh_flags', 50)
+// CHECK: # Section 0x5
+// CHECK-NEXT:   ('sh_name', 0x21) # '.rodata.str2.1'
+// CHECK-NEXT:   ('sh_type', 0x1)
+// CHECK-NEXT:   ('sh_flags', 0x32)
 // CHECK-NEXT:   ('sh_addr',
 // CHECK-NEXT:   ('sh_offset',
-// CHECK-NEXT:   ('sh_size', 16)
+// CHECK-NEXT:   ('sh_size', 0x10)
 // CHECK-NEXT:   ('sh_link',
 // CHECK-NEXT:   ('sh_info',
-// CHECK-NEXT:   ('sh_addralign', 1)
-// CHECK-NEXT:   ('sh_entsize', 2)
+// CHECK-NEXT:   ('sh_addralign', 0x1)
+// CHECK-NEXT:   ('sh_entsize', 0x2)
 
-// CHECK: # Section 6
-// CHECK-NEXT:   ('sh_name', 48) # '.rodata.cst8
-// CHECK-NEXT:   ('sh_type', 1)
-// CHECK-NEXT:   ('sh_flags', 18)
+// CHECK: # Section 0x6
+// CHECK-NEXT:   ('sh_name', 0x30) # '.rodata.cst8
+// CHECK-NEXT:   ('sh_type', 0x1)
+// CHECK-NEXT:   ('sh_flags', 0x12)
 // CHECK-NEXT:   ('sh_addr',
 // CHECK-NEXT:   ('sh_offset',
-// CHECK-NEXT:   ('sh_size', 16)
+// CHECK-NEXT:   ('sh_size', 0x10)
 // CHECK-NEXT:   ('sh_link',
 // CHECK-NEXT:   ('sh_info',
-// CHECK-NEXT:   ('sh_addralign', 1)
-// CHECK-NEXT:   ('sh_entsize', 8)
+// CHECK-NEXT:   ('sh_addralign', 0x1)
+// CHECK-NEXT:   ('sh_entsize', 0x8)

Modified: llvm/trunk/test/MC/ELF/file.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/file.s?rev=116753&r1=116752&r2=116753&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/file.s (original)
+++ llvm/trunk/test/MC/ELF/file.s Mon Oct 18 16:32:41 2010
@@ -4,20 +4,20 @@
 
 .file "foo"
 foa:
-// CHECK:    # Symbol 1
-// CHECK-NEXT:    (('st_name', 1) # 'foo'
-// CHECK-NEXT:     ('st_bind', 0)
-// CHECK-NEXT:     ('st_type', 4)
-// CHECK-NEXT:     ('st_other', 0)
-// CHECK-NEXT:     ('st_shndx', 65521)
-// CHECK-NEXT:     ('st_value', 0)
-// CHECK-NEXT:     ('st_size', 0)
+// CHECK:    # Symbol 0x1
+// CHECK-NEXT:    (('st_name', 0x1) # 'foo'
+// CHECK-NEXT:     ('st_bind', 0x0)
+// CHECK-NEXT:     ('st_type', 0x4)
+// CHECK-NEXT:     ('st_other', 0x0)
+// CHECK-NEXT:     ('st_shndx', 0xfff1)
+// CHECK-NEXT:     ('st_value', 0x0)
+// CHECK-NEXT:     ('st_size', 0x0)
 // CHECK-NEXT:    ),
-// CHECK-NEXT:    # Symbol 2
-// CHECK-NEXT:    (('st_name', 5) # 'foa'
-// CHECK-NEXT:     ('st_bind', 0)
-// CHECK-NEXT:     ('st_type', 0)
-// CHECK-NEXT:     ('st_other', 0)
-// CHECK-NEXT:     ('st_shndx', 1)
-// CHECK-NEXT:     ('st_value', 0)
-// CHECK-NEXT:     ('st_size', 0)
+// CHECK-NEXT:    # Symbol 0x2
+// CHECK-NEXT:    (('st_name', 0x5) # 'foa'
+// CHECK-NEXT:     ('st_bind', 0x0)
+// CHECK-NEXT:     ('st_type', 0x0)
+// CHECK-NEXT:     ('st_other', 0x0)
+// CHECK-NEXT:     ('st_shndx', 0x1)
+// CHECK-NEXT:     ('st_value', 0x0)
+// CHECK-NEXT:     ('st_size', 0x0)

Modified: llvm/trunk/test/MC/ELF/got.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/got.s?rev=116753&r1=116752&r2=116753&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/got.s (original)
+++ llvm/trunk/test/MC/ELF/got.s Mon Oct 18 16:32:41 2010
@@ -6,20 +6,20 @@
         movl	foo at GOT, %eax
         movl	foo at GOTPCREL(%rip), %eax
 
-// CHECK:     (('st_name', 5) # '_GLOBAL_OFFSET_TABLE_'
-// CHECK-NEXT: ('st_bind', 1)
+// CHECK:     (('st_name', 0x5) # '_GLOBAL_OFFSET_TABLE_'
+// CHECK-NEXT: ('st_bind', 0x1)
 
 // CHECK:      ('_relocations', [
-// CHECK-NEXT:   # Relocation 0
+// CHECK-NEXT:   # Relocation 0x0
 // CHECK-NEXT:    (('r_offset',
 // CHECK-NEXT:     ('r_sym',
-// CHECK-NEXT:     ('r_type', 3)
+// CHECK-NEXT:     ('r_type', 0x3)
 // CHECK-NEXT:     ('r_addend',
 // CHECK-NEXT:    ),
-// CHECK-NEXT:   # Relocation 1
+// CHECK-NEXT:   # Relocation 0x1
 // CHECK-NEXT:    (('r_offset',
 // CHECK-NEXT:     ('r_sym',
-// CHECK-NEXT:     ('r_type', 9)
+// CHECK-NEXT:     ('r_type', 0x9)
 // CHECK-NEXT:     ('r_addend',
 // CHECK-NEXT:    ),
 // CHECK-NEXT:   ])

Modified: llvm/trunk/test/MC/ELF/local-reloc.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/local-reloc.s?rev=116753&r1=116752&r2=116753&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/local-reloc.s (original)
+++ llvm/trunk/test/MC/ELF/local-reloc.s Mon Oct 18 16:32:41 2010
@@ -7,24 +7,24 @@
 foo:
 
 // Section number 1 is .text
-// CHECK:        # Section 1
-// CHECK-next:  (('sh_name', 1) # '.text'
+// CHECK:        # Section 0x1
+// CHECK-next:  (('sh_name', 0x1) # '.text'
 
 // Symbol number 2 is section number 1
-// CHECK:    # Symbol 2
-// CHECK-NEXT:    (('st_name', 0) # ''
-// CHECK-NEXT:     ('st_bind', 0)
-// CHECK-NEXT:     ('st_type', 3)
-// CHECK-NEXT:     ('st_other', 0)
-// CHECK-NEXT:     ('st_shndx', 1)
-// CHECK-NEXT:     ('st_value', 0)
-// CHECK-NEXT:     ('st_size', 0)
+// CHECK:    # Symbol 0x2
+// CHECK-NEXT:    (('st_name', 0x0) # ''
+// CHECK-NEXT:     ('st_bind', 0x0)
+// CHECK-NEXT:     ('st_type', 0x3)
+// CHECK-NEXT:     ('st_other', 0x0)
+// CHECK-NEXT:     ('st_shndx', 0x1)
+// CHECK-NEXT:     ('st_value', 0x0)
+// CHECK-NEXT:     ('st_size', 0x0)
 
 // Relocation refers to symbol number 2
 // CHECK:      ('_relocations', [
-// CHECK-NEXT:  # Relocation 0
+// CHECK-NEXT:  # Relocation 0x0
 // CHECK-NEXT:   (('r_offset',
-// CHECK-NEXT:    ('r_sym', 2)
+// CHECK-NEXT:    ('r_sym', 0x2)
 // CHECK-NEXT:    ('r_type',
 // CHECK-NEXT:    ('r_addend',
 // CHECK-NEXT:   ),

Modified: llvm/trunk/test/MC/ELF/merge.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/merge.s?rev=116753&r1=116752&r2=116753&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/merge.s (original)
+++ llvm/trunk/test/MC/ELF/merge.s Mon Oct 18 16:32:41 2010
@@ -23,75 +23,75 @@
 foo:
 
 // Section 4 is "sec1"
-// CHECK: # Section 4
-// CHECK-NEXT:  (('sh_name', 18) # '.sec1'
+// CHECK: # Section 0x4
+// CHECK-NEXT:  (('sh_name', 0x12) # '.sec1'
 
 // Symbol number 1 is .Lfoo
-// CHECK:      # Symbol 1
-// CHECK-NEXT: (('st_name', 1) # '.Lfoo'
+// CHECK:      # Symbol 0x1
+// CHECK-NEXT: (('st_name', 0x1) # '.Lfoo'
 
 // Symbol number 2 is foo
-// CHECK:      # Symbol 2
-// CHECK-NEXT: (('st_name', 7) # 'foo'
+// CHECK:      # Symbol 0x2
+// CHECK-NEXT: (('st_name', 0x7) # 'foo'
 
 // Symbol number 6 is section 4
-// CHECK:        # Symbol 6
-// CHECK-NEXT:    (('st_name', 0) # ''
-// CHECK-NEXT:     ('st_bind', 0)
-// CHECK-NEXT:     ('st_type', 3)
-// CHECK-NEXT:     ('st_other', 0)
-// CHECK-NEXT:     ('st_shndx', 4)
+// CHECK:        # Symbol 0x6
+// CHECK-NEXT:    (('st_name', 0x0) # ''
+// CHECK-NEXT:     ('st_bind', 0x0)
+// CHECK-NEXT:     ('st_type', 0x3)
+// CHECK-NEXT:     ('st_other', 0x0)
+// CHECK-NEXT:     ('st_shndx', 0x4)
 
 // Symbol number 8 is zed
-// CHECK:        # Symbol 8
-// CHECK-NEXT:    (('st_name', 11) # 'zed'
+// CHECK:        # Symbol 0x8
+// CHECK-NEXT:    (('st_name', 0xb) # 'zed'
 
 // Relocation 0 refers to symbol 1
 // CHECK:       ('_relocations', [
 // CHECK-NEXT:   # Relocation 0
 // CHECK-NEXT:   (('r_offset',
-// CHECK-NEXT:    ('r_sym', 1)
-// CHECK-NEXT:    ('r_type', 2
+// CHECK-NEXT:    ('r_sym', 0x1)
+// CHECK-NEXT:    ('r_type', 0x2
 // CHECK-NEXT:    ('r_addend',
 // CHECK-NEXT:   ),
 
 // Relocation 1 refers to symbol 6
-// CHECK-NEXT:  # Relocation 1
+// CHECK-NEXT:  # Relocation 0x1
 // CHECK-NEXT: (('r_offset',
-// CHECK-NEXT:  ('r_sym', 6)
-// CHECK-NEXT:  ('r_type', 10)
+// CHECK-NEXT:  ('r_sym', 0x6)
+// CHECK-NEXT:  ('r_type', 0xa)
 // CHECK-NEXT:  ('r_addend',
 // CHECK-NEXT: ),
 
 // Relocation 2 refers to symbol 1
-// CHECK-NEXT:   # Relocation 2
+// CHECK-NEXT:   # Relocation 0x2
 // CHECK-NEXT:   (('r_offset',
-// CHECK-NEXT:    ('r_sym', 1)
-// CHECK-NEXT:    ('r_type', 10
+// CHECK-NEXT:    ('r_sym', 0x1)
+// CHECK-NEXT:    ('r_type', 0xa
 // CHECK-NEXT:    ('r_addend',
 // CHECK-NEXT:   ),
 
 // Relocation 3 refers to symbol 2
-// CHECK-NEXT:   # Relocation 3
+// CHECK-NEXT:   # Relocation 0x3
 // CHECK-NEXT:   (('r_offset',
-// CHECK-NEXT:    ('r_sym', 2)
-// CHECK-NEXT:    ('r_type', 4
+// CHECK-NEXT:    ('r_sym', 0x2)
+// CHECK-NEXT:    ('r_type', 0x4
 // CHECK-NEXT:    ('r_addend',
 // CHECK-NEXT:   ),
 
 // Relocation 4 refers to symbol 2
-// CHECK-NEXT:   # Relocation 4
+// CHECK-NEXT:   # Relocation 0x4
 // CHECK-NEXT:   (('r_offset',
-// CHECK-NEXT:    ('r_sym', 2)
-// CHECK-NEXT:    ('r_type', 9
+// CHECK-NEXT:    ('r_sym', 0x2)
+// CHECK-NEXT:    ('r_type', 0x9
 // CHECK-NEXT:    ('r_addend',
 // CHECK-NEXT:   ),
 
 // Relocation 5 refers to symbol 8
-// CHECK-NEXT:   # Relocation 5
-// CHECK-NEXT:   (('r_offset', 35)
-// CHECK-NEXT:    ('r_sym', 8)
-// CHECK-NEXT:    ('r_type', 11)
-// CHECK-NEXT:    ('r_addend', 0)
+// CHECK-NEXT:   # Relocation 0x5
+// CHECK-NEXT:   (('r_offset', 0x23)
+// CHECK-NEXT:    ('r_sym', 0x8)
+// CHECK-NEXT:    ('r_type', 0xb)
+// CHECK-NEXT:    ('r_addend', 0x0)
 // CHECK-NEXT:   ),
 // CHECK-NEXT:  ])

Modified: llvm/trunk/test/MC/ELF/norelocation.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/norelocation.s?rev=116753&r1=116752&r2=116753&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/norelocation.s (original)
+++ llvm/trunk/test/MC/ELF/norelocation.s Mon Oct 18 16:32:41 2010
@@ -3,16 +3,16 @@
         call bar
 bar:
 
-// CHECK: ('sh_name', 1) # '.text'
-// CHECK-NEXT: ('sh_type', 1)
-// CHECK-NEXT: ('sh_flags', 6)
-// CHECK-NEXT: ('sh_addr', 0)
-// CHECK-NEXT: ('sh_offset', 64)
-// CHECK-NEXT: ('sh_size', 5)
-// CHECK-NEXT: ('sh_link', 0)
-// CHECK-NEXT: ('sh_info', 0)
-// CHECK-NEXT: ('sh_addralign', 4)
-// CHECK-NEXT: ('sh_entsize', 0)
+// CHECK: ('sh_name', 0x1) # '.text'
+// CHECK-NEXT: ('sh_type', 0x1)
+// CHECK-NEXT: ('sh_flags', 0x6)
+// CHECK-NEXT: ('sh_addr', 0x0)
+// CHECK-NEXT: ('sh_offset', 0x40)
+// CHECK-NEXT: ('sh_size', 0x5)
+// CHECK-NEXT: ('sh_link', 0x0)
+// CHECK-NEXT: ('sh_info', 0x0)
+// CHECK-NEXT: ('sh_addralign', 0x4)
+// CHECK-NEXT: ('sh_entsize', 0x0)
 // CHECK-NEXT: ('_section_data', 'e8000000 00')
 // CHECK-NOT: .rela.text
 // CHECK: shstrtab

Modified: llvm/trunk/test/MC/ELF/pic-diff.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/pic-diff.s?rev=116753&r1=116752&r2=116753&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/pic-diff.s (original)
+++ llvm/trunk/test/MC/ELF/pic-diff.s Mon Oct 18 16:32:41 2010
@@ -1,21 +1,21 @@
 // RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump  | FileCheck %s
 
-// CHECK:         # Symbol 5
-// CHECK-NEXT:    (('st_name', 5) # 'baz'
-// CHECK-NEXT:     ('st_bind', 1)
-// CHECK-NEXT:     ('st_type', 0)
-// CHECK-NEXT:     ('st_other', 0)
-// CHECK-NEXT:     ('st_shndx', 0)
-// CHECK-NEXT:     ('st_value', 0)
-// CHECK-NEXT:     ('st_size', 0)
+// CHECK:         # Symbol 0x5
+// CHECK-NEXT:    (('st_name', 0x5) # 'baz'
+// CHECK-NEXT:     ('st_bind', 0x1)
+// CHECK-NEXT:     ('st_type', 0x0)
+// CHECK-NEXT:     ('st_other', 0x0)
+// CHECK-NEXT:     ('st_shndx', 0x0)
+// CHECK-NEXT:     ('st_value', 0x0)
+// CHECK-NEXT:     ('st_size', 0x0)
 // CHECK-NEXT:    ),
 
 // CHECK:       ('_relocations', [
-// CHECK-NEXT:    # Relocation 0
-// CHECK-NEXT:    (('r_offset', 12)
-// CHECK-NEXT:     ('r_sym', 5)
-// CHECK-NEXT:     ('r_type', 2)
-// CHECK-NEXT:     ('r_addend', 8)
+// CHECK-NEXT:    # Relocation 0x0
+// CHECK-NEXT:    (('r_offset', 0xc)
+// CHECK-NEXT:     ('r_sym', 0x5)
+// CHECK-NEXT:     ('r_type', 0x2)
+// CHECK-NEXT:     ('r_addend', 0x8)
 // CHECK-NEXT:    ),
 // CHECK-NEXT:   ])
 

Modified: llvm/trunk/test/MC/ELF/plt.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/plt.s?rev=116753&r1=116752&r2=116753&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/plt.s (original)
+++ llvm/trunk/test/MC/ELF/plt.s Mon Oct 18 16:32:41 2010
@@ -5,10 +5,10 @@
 	jmp	foo at PLT
 
 // CHECK:      ('_relocations', [
-// CHECK-NEXT:   # Relocation 0
+// CHECK-NEXT:   # Relocation 0x0
 // CHECK-NEXT:    (('r_offset',
 // CHECK-NEXT:     ('r_sym',
-// CHECK-NEXT:     ('r_type', 4)
+// CHECK-NEXT:     ('r_type', 0x4)
 // CHECK-NEXT:     ('r_addend',
 // CHECK-NEXT:    ),
 // CHECK-NEXT:   ])

Modified: llvm/trunk/test/MC/ELF/relax.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/relax.s?rev=116753&r1=116752&r2=116753&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/relax.s (original)
+++ llvm/trunk/test/MC/ELF/relax.s Mon Oct 18 16:32:41 2010
@@ -12,27 +12,27 @@
         jmp bar
         jmp foo
 
-// CHECK: ('sh_name', 1) # '.text'
-// CHECK-NEXT: ('sh_type', 1)
-// CHECK-NEXT: ('sh_flags', 6)
-// CHECK-NEXT: ('sh_addr', 0)
-// CHECK-NEXT: ('sh_offset', 64)
-// CHECK-NEXT: ('sh_size', 7)
-// CHECK-NEXT: ('sh_link', 0)
-// CHECK-NEXT: ('sh_info', 0)
-// CHECK-NEXT: ('sh_addralign', 4)
-// CHECK-NEXT: ('sh_entsize', 0)
+// CHECK: ('sh_name', 0x1) # '.text'
+// CHECK-NEXT: ('sh_type', 0x1)
+// CHECK-NEXT: ('sh_flags', 0x6)
+// CHECK-NEXT: ('sh_addr', 0x0)
+// CHECK-NEXT: ('sh_offset', 0x40)
+// CHECK-NEXT: ('sh_size', 0x7)
+// CHECK-NEXT: ('sh_link', 0x0)
+// CHECK-NEXT: ('sh_info', 0x0)
+// CHECK-NEXT: ('sh_addralign', 0x4)
+// CHECK-NEXT: ('sh_entsize', 0x0)
 // CHECK-NEXT: ('_section_data', 'ebfee900 000000')
 
-// CHECK:       # Symbol 5
-// CHECK-NEXT: (('st_name', 5) # 'foo'
+// CHECK:       # Symbol 0x5
+// CHECK-NEXT: (('st_name', 0x5) # 'foo'
 
 // CHECK: .rela.text
 // CHECK: ('_relocations', [
-// CHECK-NEXT: Relocation 0
-// CHECK-NEXT:  (('r_offset', 3)
-// CHECK-NEXT:   ('r_sym', 5)
-// CHECK-NEXT:   ('r_type', 2)
-// CHECK-NEXT:   ('r_addend', -4)
+// CHECK-NEXT: Relocation 0x0
+// CHECK-NEXT:  (('r_offset', 0x3)
+// CHECK-NEXT:   ('r_sym', 0x5)
+// CHECK-NEXT:   ('r_type', 0x2)
+// CHECK-NEXT:   ('r_addend', -0x4)
 // CHECK-NEXT:  ),
 // CHECK-NEXT: ])

Modified: llvm/trunk/test/MC/ELF/relocation-386.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/relocation-386.s?rev=116753&r1=116752&r2=116753&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/relocation-386.s (original)
+++ llvm/trunk/test/MC/ELF/relocation-386.s Mon Oct 18 16:32:41 2010
@@ -4,50 +4,50 @@
 // to .Lfoo uses the symbol and not the section.
 
 // Section 3 is bss
-// CHECK:      # Section 3
-// CHECK-NEXT: (('sh_name', 13) # '.bss'
+// CHECK:      # Section 0x3
+// CHECK-NEXT: (('sh_name', 0xd) # '.bss'
 
-// CHECK:      # Symbol 1
-// CHECK-NEXT: (('st_name', 5) # '.Lfoo'
+// CHECK:      # Symbol 0x1
+// CHECK-NEXT: (('st_name', 0x5) # '.Lfoo'
 
 // Symbol 6 is section 3
-// CHECK:      # Symbol 6
-// CHECK-NEXT: (('st_name', 0) # ''
-// CHECK-NEXT:  ('st_value', 0)
-// CHECK-NEXT:  ('st_size', 0)
-// CHECK-NEXT:  ('st_bind', 0)
-// CHECK-NEXT:  ('st_type', 3)
-// CHECK-NEXT:  ('st_other', 0)
-// CHECK-NEXT:  ('st_shndx', 3)
-
-// CHECK:      # Relocation 0
-// CHECK-NEXT: (('r_offset', 2)
-// CHECK-NEXT:  ('r_sym', 1)
-// CHECK-NEXT:  ('r_type', 9)
+// CHECK:      # Symbol 0x6
+// CHECK-NEXT: (('st_name', 0x0) # ''
+// CHECK-NEXT:  ('st_value', 0x0)
+// CHECK-NEXT:  ('st_size', 0x0)
+// CHECK-NEXT:  ('st_bind', 0x0)
+// CHECK-NEXT:  ('st_type', 0x3)
+// CHECK-NEXT:  ('st_other', 0x0)
+// CHECK-NEXT:  ('st_shndx', 0x3)
+
+// CHECK:      # Relocation 0x0
+// CHECK-NEXT: (('r_offset', 0x2)
+// CHECK-NEXT:  ('r_sym', 0x1)
+// CHECK-NEXT:  ('r_type', 0x9)
 // CHECK-NEXT: ),
-// CHECK-NEXT:  # Relocation 1
+// CHECK-NEXT:  # Relocation 0x1
 // CHECK-NEXT: (('r_offset',
 // CHECK-NEXT:  ('r_sym',
-// CHECK-NEXT:  ('r_type', 4)
+// CHECK-NEXT:  ('r_type', 0x4)
 // CHECK-NEXT: ),
-// CHECK-NEXT:  # Relocation 2
+// CHECK-NEXT:  # Relocation 0x2
 // CHECK-NEXT: (('r_offset',
 // CHECK-NEXT:  ('r_sym',
-// CHECK-NEXT:  ('r_type', 10)
+// CHECK-NEXT:  ('r_type', 0xa)
 // CHECK-NEXT: ),
 
 // Relocation 3 (bar3 at GOTOFF) is done with symbol 6 (bss)
-// CHECK-NEXT:  # Relocation 3
+// CHECK-NEXT:  # Relocation 0x3
 // CHECK-NEXT: (('r_offset',
-// CHECK-NEXT:  ('r_sym', 6
+// CHECK-NEXT:  ('r_sym', 0x6
 // CHECK-NEXT:  ('r_type',
 // CHECK-NEXT: ),
 
 // Relocation 4 (bar2 at GOT) is of type R_386_GOT32
-// CHECK-NEXT:  # Relocation 4
+// CHECK-NEXT:  # Relocation 0x4
 // CHECK-NEXT: (('r_offset',
 // CHECK-NEXT:  ('r_sym',
-// CHECK-NEXT:  ('r_type', 3
+// CHECK-NEXT:  ('r_type', 0x3
 // CHECK-NEXT: ),
 
         .text

Modified: llvm/trunk/test/MC/ELF/relocation.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/relocation.s?rev=116753&r1=116752&r2=116753&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/relocation.s (original)
+++ llvm/trunk/test/MC/ELF/relocation.s Mon Oct 18 16:32:41 2010
@@ -10,48 +10,48 @@
         movq	bar, %rdx         // R_X86_64_32S
 .long bar                         // R_X86_64_32
 
-// CHECK:  # Section 1
-// CHECK: (('sh_name', 1) # '.text'
+// CHECK:  # Section 0x1
+// CHECK: (('sh_name', 0x1) # '.text'
 
-// CHECK:   # Symbol 2
-// CHECK: (('st_name', 0) # ''
-// CHECK:  ('st_bind', 0)
-// CHECK   ('st_type', 3)
-// CHECK:  ('st_other', 0)
-// CHECK:  ('st_shndx', 1)
+// CHECK:   # Symbol 0x2
+// CHECK: (('st_name', 0x0) # ''
+// CHECK:  ('st_bind', 0x0)
+// CHECK   ('st_type', 0x3)
+// CHECK:  ('st_other', 0x0)
+// CHECK:  ('st_shndx', 0x1)
 
-// CHECK: # Relocation 0
-// CHECK-NEXT:  (('r_offset', 1)
-// CHECK-NEXT:   ('r_sym', 2)
-// CHECK-NEXT:   ('r_type', 10)
+// CHECK: # Relocation 0x0
+// CHECK-NEXT:  (('r_offset', 0x1)
+// CHECK-NEXT:   ('r_sym', 0x2)
+// CHECK-NEXT:   ('r_type', 0xa)
 // CHECK-NEXT:   ('r_addend',
 
-// CHECK: # Relocation 1
-// CHECK-NEXT:  (('r_offset', 8)
-// CHECK-NEXT:   ('r_sym', 2)
-// CHECK-NEXT:   ('r_type', 11)
+// CHECK: # Relocation 0x1
+// CHECK-NEXT:  (('r_offset', 0x8)
+// CHECK-NEXT:   ('r_sym', 0x2)
+// CHECK-NEXT:   ('r_type', 0xb)
 // CHECK-NEXT:   ('r_addend',
 
-// CHECK: # Relocation 2
-// CHECK-NEXT:  (('r_offset', 19)
-// CHECK-NEXT:   ('r_sym', 2)
-// CHECK-NEXT:   ('r_type', 11)
+// CHECK: # Relocation 0x2
+// CHECK-NEXT:  (('r_offset', 0x13)
+// CHECK-NEXT:   ('r_sym', 0x2)
+// CHECK-NEXT:   ('r_type', 0xb)
 // CHECK-NEXT:   ('r_addend',
 
-// CHECK: # Relocation 3
-// CHECK-NEXT:  (('r_offset', 26)
-// CHECK-NEXT:   ('r_sym', 2)
-// CHECK-NEXT:   ('r_type', 11)
+// CHECK: # Relocation 0x3
+// CHECK-NEXT:  (('r_offset', 0x1a)
+// CHECK-NEXT:   ('r_sym', 0x2)
+// CHECK-NEXT:   ('r_type', 0xb)
 // CHECK-NEXT:   ('r_addend',
 
-// CHECK: # Relocation 4
-// CHECK-NEXT:  (('r_offset', 34)
-// CHECK-NEXT:   ('r_sym', 2)
-// CHECK-NEXT:   ('r_type', 11)
+// CHECK: # Relocation 0x4
+// CHECK-NEXT:  (('r_offset', 0x22)
+// CHECK-NEXT:   ('r_sym', 0x2)
+// CHECK-NEXT:   ('r_type', 0xb)
 // CHECK-NEXT:   ('r_addend',
 
-// CHECK: # Relocation 5
-// CHECK-NEXT:  (('r_offset', 38)
-// CHECK-NEXT:   ('r_sym', 2)
-// CHECK-NEXT:   ('r_type', 10)
+// CHECK: # Relocation 0x5
+// CHECK-NEXT:  (('r_offset', 0x26)
+// CHECK-NEXT:   ('r_sym', 0x2)
+// CHECK-NEXT:   ('r_type', 0xa)
 // CHECK-NEXT:   ('r_addend',

Modified: llvm/trunk/test/MC/ELF/section.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/section.s?rev=116753&r1=116752&r2=116753&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/section.s (original)
+++ llvm/trunk/test/MC/ELF/section.s Mon Oct 18 16:32:41 2010
@@ -6,6 +6,6 @@
 .section	.note.GNU-,"", at progbits
 .section	-.note.GNU,"", at progbits
 
-// CHECK: ('sh_name', 18) # '.note.GNU-stack'
-// CHECK: ('sh_name', 34) # '.note.GNU-'
-// CHECK: ('sh_name', 45) # '-.note.GNU'
+// CHECK: ('sh_name', 0x12) # '.note.GNU-stack'
+// CHECK: ('sh_name', 0x22) # '.note.GNU-'
+// CHECK: ('sh_name', 0x2d) # '-.note.GNU'

Modified: llvm/trunk/test/MC/ELF/size.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/size.s?rev=116753&r1=116752&r2=116753&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/size.s (original)
+++ llvm/trunk/test/MC/ELF/size.s Mon Oct 18 16:32:41 2010
@@ -2,8 +2,8 @@
 
 // Mostly a test that this doesn't crash anymore.
 
-// CHECK:        # Symbol 4
-// CHECK-NEXT:    (('st_name', 1) # 'foo'
-// CHECK-NEXT:     ('st_bind', 1)
+// CHECK:        # Symbol 0x4
+// CHECK-NEXT:    (('st_name', 0x1) # 'foo'
+// CHECK-NEXT:     ('st_bind', 0x1)
 
 	.size	foo, .Lbar-foo

Modified: llvm/trunk/test/MC/ELF/sleb.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/sleb.s?rev=116753&r1=116752&r2=116753&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/sleb.s (original)
+++ llvm/trunk/test/MC/ELF/sleb.s Mon Oct 18 16:32:41 2010
@@ -19,9 +19,9 @@
 
 	.sleb128        8193
 
-// ELF_32: ('sh_name', 1) # '.text'
+// ELF_32: ('sh_name', 0x1) # '.text'
 // ELF_32: ('_section_data', '00017f3f 40c000bf 7fff3f80 4081c000')
-// ELF_64: ('sh_name', 1) # '.text'
+// ELF_64: ('sh_name', 0x1) # '.text'
 // ELF_64: ('_section_data', '00017f3f 40c000bf 7fff3f80 4081c000')
 // MACHO_32: ('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
 // MACHO_32: ('_section_data', '00017f3f 40c000bf 7fff3f80 4081c000')

Modified: llvm/trunk/test/MC/ELF/uleb.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/uleb.s?rev=116753&r1=116752&r2=116753&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/uleb.s (original)
+++ llvm/trunk/test/MC/ELF/uleb.s Mon Oct 18 16:32:41 2010
@@ -12,9 +12,9 @@
 	.uleb128	16383
 	.uleb128	16384
 
-// ELF_32: ('sh_name', 1) # '.text'
+// ELF_32: ('sh_name', 0x1) # '.text'
 // ELF_32: ('_section_data', '00017f80 01ff7f80 8001')
-// ELF_64: ('sh_name', 1) # '.text'
+// ELF_64: ('sh_name', 0x1) # '.text'
 // ELF_64: ('_section_data', '00017f80 01ff7f80 8001')
 // MACHO_32: ('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
 // MACHO_32: ('_section_data', '00017f80 01ff7f80 8001')

Modified: llvm/trunk/test/MC/ELF/undef.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/undef.s?rev=116753&r1=116752&r2=116753&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/undef.s (original)
+++ llvm/trunk/test/MC/ELF/undef.s Mon Oct 18 16:32:41 2010
@@ -19,27 +19,27 @@
         movsd   .Lsym8(%rip), %xmm1
 
 // CHECK:      ('_symbols', [
-// CHECK-NEXT:  # Symbol 0
-// CHECK-NEXT:  (('st_name', 0) # ''
-// CHECK:       # Symbol 1
-// CHECK-NEXT:  (('st_name', 13) # '.Lsym8'
-// CHECK:       # Symbol 2
-// CHECK-NEXT:  (('st_name', 0) # ''
-// CHECK:       # Symbol 3
-// CHECK-NEXT:  (('st_name', 0) # ''
-// CHECK:       # Symbol 4
-// CHECK-NEXT:  (('st_name', 0) # ''
-// CHECK:       # Symbol 5
-// CHECK-NEXT:  (('st_name', 0) # ''
-// CHECK:       # Symbol 6
-// CHECK-NEXT:  (('st_name', 1) # '.Lsym1'
-// CHECK:       # Symbol 7
-// CHECK-NEXT:  (('st_name', 8) # 'sym6'
-// CHECK-NEXT:   ('st_bind', 1)
-// CHECK-NEXT:   ('st_type', 1)
-// CHECK-NEXT:   ('st_other', 0)
-// CHECK-NEXT:   ('st_shndx', 0)
-// CHECK-NEXT:   ('st_value', 0)
-// CHECK-NEXT:   ('st_size', 0)
+// CHECK-NEXT:  # Symbol 0x0
+// CHECK-NEXT:  (('st_name', 0x0) # ''
+// CHECK:       # Symbol 0x1
+// CHECK-NEXT:  (('st_name', 0xd) # '.Lsym8'
+// CHECK:       # Symbol 0x2
+// CHECK-NEXT:  (('st_name', 0x0) # ''
+// CHECK:       # Symbol 0x3
+// CHECK-NEXT:  (('st_name', 0x0) # ''
+// CHECK:       # Symbol 0x4
+// CHECK-NEXT:  (('st_name', 0x0) # ''
+// CHECK:       # Symbol 0x5
+// CHECK-NEXT:  (('st_name', 0x0) # ''
+// CHECK:       # Symbol 0x6
+// CHECK-NEXT:  (('st_name', 0x1) # '.Lsym1'
+// CHECK:       # Symbol 0x7
+// CHECK-NEXT:  (('st_name', 0x8) # 'sym6'
+// CHECK-NEXT:   ('st_bind', 0x1)
+// CHECK-NEXT:   ('st_type', 0x1)
+// CHECK-NEXT:   ('st_other', 0x0)
+// CHECK-NEXT:   ('st_shndx', 0x0)
+// CHECK-NEXT:   ('st_value', 0x0)
+// CHECK-NEXT:   ('st_size', 0x0)
 // CHECK-NEXT:   ),
 // CHECK-NEXT:  ])

Modified: llvm/trunk/test/MC/ELF/undef2.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/undef2.s?rev=116753&r1=116752&r2=116753&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/undef2.s (original)
+++ llvm/trunk/test/MC/ELF/undef2.s Mon Oct 18 16:32:41 2010
@@ -5,6 +5,6 @@
         je	.Lfoo
 
 // CHECK: ('_symbols', [
-// CHECK:      (('st_name', 1) # '.Lfoo'
-// CHECK-NEXT:  ('st_bind', 1)
-// CHECK: (('sh_name', 36) # '.strtab'
+// CHECK:      (('st_name', 0x1) # '.Lfoo'
+// CHECK-NEXT:  ('st_bind', 0x1)
+// CHECK: (('sh_name', 0x24) # '.strtab'

Modified: llvm/trunk/test/MC/ELF/weak.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/weak.s?rev=116753&r1=116752&r2=116753&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/weak.s (original)
+++ llvm/trunk/test/MC/ELF/weak.s Mon Oct 18 16:32:41 2010
@@ -9,22 +9,22 @@
         .weak bar
 bar:
 
-//CHECK:        # Symbol 4
-//CHECK-NEXT:   (('st_name', 5) # 'bar'
-//CHECK-NEXT:    ('st_bind', 2)
-//CHECK-NEXT:    ('st_type', 0)
-//CHECK-NEXT:    ('st_other', 0)
-//CHECK-NEXT:    ('st_shndx', 1)
-//CHECK-NEXT:    ('st_value', 0)
-//CHECK-NEXT:    ('st_size', 0)
+//CHECK:        # Symbol 0x4
+//CHECK-NEXT:   (('st_name', 0x5) # 'bar'
+//CHECK-NEXT:    ('st_bind', 0x2)
+//CHECK-NEXT:    ('st_type', 0x0)
+//CHECK-NEXT:    ('st_other', 0x0)
+//CHECK-NEXT:    ('st_shndx', 0x1)
+//CHECK-NEXT:    ('st_value', 0x0)
+//CHECK-NEXT:    ('st_size', 0x0)
 //CHECK-NEXT:   ),
-//CHECK-NEXT:   # Symbol 5
-//CHECK:       (('st_name', 1) # 'foo'
-//CHECK-NEXT:   ('st_bind', 2)
-//CHECK-NEXT:   ('st_type', 0)
-//CHECK-NEXT:   ('st_other', 0)
-//CHECK-NEXT:   ('st_shndx', 0)
-//CHECK-NEXT:   ('st_value', 0)
-//CHECK-NEXT:   ('st_size', 0)
+//CHECK-NEXT:   # Symbol 0x5
+//CHECK:       (('st_name', 0x1) # 'foo'
+//CHECK-NEXT:   ('st_bind', 0x2)
+//CHECK-NEXT:   ('st_type', 0x0)
+//CHECK-NEXT:   ('st_other', 0x0)
+//CHECK-NEXT:   ('st_shndx', 0x0)
+//CHECK-NEXT:   ('st_value', 0x0)
+//CHECK-NEXT:   ('st_size', 0x0)
 //CHECK-NEXT:  ),
 //CHECK-NEXT: ])

Modified: llvm/trunk/test/MC/ELF/zero.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/zero.s?rev=116753&r1=116752&r2=116753&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/zero.s (original)
+++ llvm/trunk/test/MC/ELF/zero.s Mon Oct 18 16:32:41 2010
@@ -3,14 +3,14 @@
 .zero 4
 .zero 1,42
 
-// CHECK: ('sh_name', 1) # '.text'
-// CHECK: ('sh_type', 1)
-// CHECK: ('sh_flags', 6)
-// CHECK: ('sh_addr', 0)
-// CHECK: ('sh_offset', 64)
-// CHECK: ('sh_size', 5)
-// CHECK: ('sh_link', 0)
-// CHECK: ('sh_info', 0)
-// CHECK: ('sh_addralign', 4)
-// CHECK: ('sh_entsize', 0)
+// CHECK: ('sh_name', 0x1) # '.text'
+// CHECK: ('sh_type', 0x1)
+// CHECK: ('sh_flags', 0x6)
+// CHECK: ('sh_addr', 0x0)
+// CHECK: ('sh_offset', 0x40)
+// CHECK: ('sh_size', 0x5)
+// CHECK: ('sh_link', 0x0)
+// CHECK: ('sh_info', 0x0)
+// CHECK: ('sh_addralign', 0x4)
+// CHECK: ('sh_entsize', 0x0)
 // CHECK: ('_section_data', '00000000 2a')

Modified: llvm/trunk/test/Scripts/elf-dump
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Scripts/elf-dump?rev=116753&r1=116752&r2=116753&view=diff
==============================================================================
--- llvm/trunk/test/Scripts/elf-dump (original)
+++ llvm/trunk/test/Scripts/elf-dump Mon Oct 18 16:32:41 2010
@@ -6,6 +6,8 @@
 
 import common_dump
 
+FormatOutput=hex
+
 class Reader:
     def __init__(self, path):
         if path == "-":
@@ -77,16 +79,16 @@
         self.sh_entsize = f.readWord()
 
     def dump(self, shstrtab, f, strtab, dumpdata):
-        print "  (('sh_name', %d) # %r" % (self.sh_name, shstrtab[self.sh_name])
-        print "   ('sh_type', %d)" % self.sh_type
-        print "   ('sh_flags', %d)" % self.sh_flags
-        print "   ('sh_addr', %d)" % self.sh_addr
-        print "   ('sh_offset', %d)" % self.sh_offset
-        print "   ('sh_size', %d)" % self.sh_size
-        print "   ('sh_link', %d)" % self.sh_link
-        print "   ('sh_info', %d)" % self.sh_info
-        print "   ('sh_addralign', %d)" % self.sh_addralign
-        print "   ('sh_entsize', %d)" % self.sh_entsize
+        print "  (('sh_name', %s)" % FormatOutput(self.sh_name), "# %r" % shstrtab[self.sh_name]
+        print "   ('sh_type', %s)" % FormatOutput(self.sh_type)
+        print "   ('sh_flags', %s)" % FormatOutput(self.sh_flags)
+        print "   ('sh_addr', %s)" % FormatOutput(self.sh_addr)
+        print "   ('sh_offset', %s)" % FormatOutput(self.sh_offset)
+        print "   ('sh_size', %s)" % FormatOutput(self.sh_size)
+        print "   ('sh_link', %s)" % FormatOutput(self.sh_link)
+        print "   ('sh_info', %s)" % FormatOutput(self.sh_info)
+        print "   ('sh_addralign', %s)" % FormatOutput(self.sh_addralign)
+        print "   ('sh_entsize', %s)" % FormatOutput(self.sh_entsize)
         if self.sh_type == 2: # SHT_SYMTAB
             print "   ('_symbols', ["
             dumpSymtab(f, self, strtab)
@@ -106,20 +108,20 @@
 
     for index in range(entries):
         f.seek(section.sh_offset + index * section.sh_entsize)
-        print "    # Symbol %d" % index
+        print "    # Symbol %s" % FormatOutput(index)
         name = f.read32()
-        print "    (('st_name', %d) # %r" % (name, strtab[name])
+        print "    (('st_name', %s)" % FormatOutput(name), "# %r" % strtab[name]
         if not f.is64Bit:
-            print "     ('st_value', %d)" % f.read32()
-            print "     ('st_size', %d)" % f.read32()
+            print "     ('st_value', %s)" % FormatOutput(f.read32())
+            print "     ('st_size', %s)" % FormatOutput(f.read32())
         st_info = f.read8()
-        print "     ('st_bind', %d)" % (st_info >> 4)
-        print "     ('st_type', %d)" % (st_info & 0xf)
-        print "     ('st_other', %d)" % f.read8()
-        print "     ('st_shndx', %d)" % f.read16()
+        print "     ('st_bind', %s)" % FormatOutput((st_info >> 4))
+        print "     ('st_type', %s)" % FormatOutput((st_info & 0xf))
+        print "     ('st_other', %s)" % FormatOutput(f.read8())
+        print "     ('st_shndx', %s)" % FormatOutput(f.read16())
         if f.is64Bit:
-            print "     ('st_value', %d)" % f.read64()
-            print "     ('st_size', %d)" % f.read64()
+            print "     ('st_value', %s)" % FormatOutput(f.read64())
+            print "     ('st_size', %s)" % FormatOutput(f.read64())
         print "    ),"
 
 def dumpRel(f, section, dumprela = False):
@@ -127,17 +129,17 @@
 
     for index in range(entries):
         f.seek(section.sh_offset + index * section.sh_entsize)
-        print "    # Relocation %d" % index
-        print "    (('r_offset', %d)" % f.readWord()
+        print "    # Relocation %s" % FormatOutput(index)
+        print "    (('r_offset', %s)" % FormatOutput(f.readWord())
         r_info = f.readWord()
         if f.is64Bit:
-            print "     ('r_sym', %d)" % (r_info >> 32)
-            print "     ('r_type', %d)" % (r_info & 0xffffffff)
+            print "     ('r_sym', %s)" % FormatOutput((r_info >> 32))
+            print "     ('r_type', %s)" % FormatOutput((r_info & 0xffffffff))
         else:
-            print "     ('r_sym', %d)" % (r_info >> 8)
-            print "     ('r_type', %d)" % (r_info & 0xff)
+            print "     ('r_sym', %s)" % FormatOutput((r_info >> 8))
+            print "     ('r_type', %s)" % FormatOutput((r_info & 0xff))
         if dumprela:
-            print "     ('r_addend', %d)" % f.readWordS()
+            print "     ('r_addend', %s)" % FormatOutput(f.readWordS())
         print "    ),"
 
 def dumpELF(path, opts):
@@ -152,8 +154,8 @@
     elif fileclass == 2: # ELFCLASS64
         f.is64Bit = True
     else:
-        raise ValueError, "Unknown file class %d" % fileclass
-    print "('e_indent[EI_CLASS]', %d)" % fileclass
+        raise ValueError, "Unknown file class %s" % FormatOutput(fileclass)
+    print "('e_indent[EI_CLASS]', %s)" % FormatOutput(fileclass)
 
     byteordering = f.read8()
     if byteordering == 1: # ELFDATA2LSB
@@ -161,32 +163,32 @@
     elif byteordering == 2: # ELFDATA2MSB
         f.isLSB = False
     else:
-        raise ValueError, "Unknown byte ordering %d" % byteordering
-    print "('e_indent[EI_DATA]', %d)" % byteordering
+        raise ValueError, "Unknown byte ordering %s" % FormatOutput(byteordering)
+    print "('e_indent[EI_DATA]', %s)" % FormatOutput(byteordering)
 
-    print "('e_indent[EI_VERSION]', %d)" % f.read8()
-    print "('e_indent[EI_OSABI]', %d)" % f.read8()
-    print "('e_indent[EI_ABIVERSION]', %d)" % f.read8()
+    print "('e_indent[EI_VERSION]', %s)" % FormatOutput(f.read8())
+    print "('e_indent[EI_OSABI]', %s)" % FormatOutput(f.read8())
+    print "('e_indent[EI_ABIVERSION]', %s)" % FormatOutput(f.read8())
 
     f.seek(16) # Seek to end of e_ident.
 
-    print "('e_type', %d)" % f.read16()
-    print "('e_machine', %d)" % f.read16()
-    print "('e_version', %d)" % f.read32()
-    print "('e_entry', %d)" % f.readWord()
-    print "('e_phoff', %d)" % f.readWord()
+    print "('e_type', %s)" % FormatOutput(f.read16())
+    print "('e_machine', %s)" % FormatOutput(f.read16())
+    print "('e_version', %s)" % FormatOutput(f.read32())
+    print "('e_entry', %s)" % FormatOutput(f.readWord())
+    print "('e_phoff', %s)" % FormatOutput(f.readWord())
     e_shoff = f.readWord()
-    print "('e_shoff', %d)" % e_shoff
-    print "('e_flags', %d)" % f.read32()
-    print "('e_ehsize', %d)" % f.read16()
-    print "('e_phentsize', %d)" % f.read16()
-    print "('e_phnum', %d)" % f.read16()
+    print "('e_shoff', %s)" % FormatOutput(e_shoff)
+    print "('e_flags', %s)" % FormatOutput(f.read32())
+    print "('e_ehsize', %s)" % FormatOutput(f.read16())
+    print "('e_phentsize', %s)" % FormatOutput(f.read16())
+    print "('e_phnum', %s)" % FormatOutput(f.read16())
     e_shentsize = f.read16()
-    print "('e_shentsize', %d)" % e_shentsize
+    print "('e_shentsize', %s)" % FormatOutput(e_shentsize)
     e_shnum = f.read16()
-    print "('e_shnum', %d)" % e_shnum
+    print "('e_shnum', %s)" % FormatOutput(e_shnum)
     e_shstrndx = f.read16()
-    print "('e_shstrndx', %d)" % e_shstrndx
+    print "('e_shstrndx', %s)" % FormatOutput(e_shstrndx)
 
     # Read all section headers
     sections = []
@@ -209,7 +211,7 @@
 
     print "('_sections', ["
     for index in range(e_shnum):
-        print "  # Section %d" % index
+        print "  # Section %s" % FormatOutput(index)
         sections[index].dump(shstrtab, f, strtab, opts.dumpSectionData)
     print "])"
 



From rafael.espindola at gmail.com  Mon Oct 18 16:51:08 2010
From: rafael.espindola at gmail.com (=?UTF-8?Q?Rafael_Esp=C3=ADndola?=)
Date: Mon, 18 Oct 2010 17:51:08 -0400
Subject: [llvm-commits] [llvm] r116753 - in /llvm/trunk/test: MC/ELF/
	Scripts/
In-Reply-To: <20101018213241.E80FB2A6C12C@llvm.org>
References: <20101018213241.E80FB2A6C12C@llvm.org>
Message-ID: <AANLkTikRWuOLKd__KDtdYqFzKA7DRRB0KW8q1qtqx=RL@mail.gmail.com>

> Changed elf-dump to output hex format by default.

It is not just by default, it is always. That is good. Would you mind
propagating the FormatOutput=hex?

Cheers,
Rafael

From jasonwkim at google.com  Mon Oct 18 16:53:27 2010
From: jasonwkim at google.com (Jason Kim)
Date: Mon, 18 Oct 2010 14:53:27 -0700
Subject: [llvm-commits] Proof of concept patch for unifying the .s/ELF
	emission of .ARM.attributes
In-Reply-To: <AANLkTimHKpEKfy2mr_UKco+Uscg_YBDtCmvXhT4AhAnp@mail.gmail.com>
References: <AANLkTikSjtvxSNc0oxKEoG2LdGriz10OXOTAtC4caR_+@mail.gmail.com>
	<AANLkTikaS4qjUi+5q3YWt_GF5EdWKVNwxq7=-LyWRRpv@mail.gmail.com>
	<AANLkTinH7mZtZSQKDYMOE9C8-0baHwm31crmp30roWKy@mail.gmail.com>
	<AANLkTimhWm3dCbO003ipXkaDS3f0o948b9b2NquVSe29@mail.gmail.com>
	<AANLkTi=2B7Pk9HkkxYvQBvm-AfJsYCHW8uYxURq5iEcd@mail.gmail.com>
	<AANLkTi=iVAmVx08ww0EOu9DvJ82oxWD+02Es3btVSqK2@mail.gmail.com>
	<AANLkTin5KdNX6g+ZRYJS0nNy6=bu4o4gwa6v5-XNwkW9@mail.gmail.com>
	<AANLkTikAPuZKYLf4iisi=C4v2onfz5qCXQ-mo2s62UNq@mail.gmail.com>
	<6D9C9A6C-872A-494D-A5F6-2523DD4CA5B6@apple.com>
	<AANLkTi=4=8T0ww0csECny4t0RMSrJV=nUT77h+759-Ab@mail.gmail.com>
	<8FD08C3F-E6E1-448B-A384-7E5CF0763EC1@apple.com>
	<AANLkTikH8sEANQrDGVHg1uOtfCs2UzygkUPpm91E9kZc@mail.gmail.com>
	<AANLkTimoHYSw=viMcpZLirRqd789_xjWmT4+foao_T6f@mail.gmail.com>
	<8E5A9C6C-BA61-41F8-B445-336D9F96D774@apple.com>
	<AANLkTiksC9MbzDhYrzLs9Kt5YRGuHu2nv3Jri=-xRKb9@mail.gmail.com>
	<AANLkTi=73V-VRH_HGiPwcQjBNcFZMiU+jazHMH3YdJ-V@mail.gmail.com>
	<AANLkTikGWx7GH5VZUByposdJWhhvc+qR6X-1Ve_gNmKG@mail.gmail.com>
	<AANLkTik7AYHB1_Crv6Vcf4uMyx4U_x5mJaYK+-S3=ucU@mail.gmail.com>
	<AANLkTi=e_fCXZo_H1=_47tv5BABbpHkf8qJiyrMfRFj_@mail.gmail.com>
	<AANLkTi=MArF+PJK1iwc66wZNobOTjC6pi127Kt=A64bp@mail.gmail.com>
	<AANLkTimHKpEKfy2mr_UKco+Uscg_YBDtCmvXhT4AhAnp@mail.gmail.com>
Message-ID: <AANLkTimt3NyHcqEh38hn+FnUNL_O5Qv81OYjzE7d0Qf1@mail.gmail.com>

On Fri, Oct 15, 2010 at 9:04 PM, Rafael Espindola <espindola at google.com> wrote:
>> There's about 30 tests that currently depend upon the decimal output.
>> And maybe lots more in the test-suite.
>> I don't want to do that in the same patch. I'll add a simplified
>> --hex, and --dec (default) option switch the default once I clean up
>> the tests.
>
> elf-dump is only used in "make check-lit", so changing the tests to
> use hex shouldn't be hard. You can change just the script and the
> tests in the first commit. Example of a similar change:
>
> http://llvm.org/viewvc/llvm-project?view=rev&revision=113685

Okay, I just committed the convert (all numbers from elf-dump are now
hex) as r116753.

I attached a new patch that should hopefully address the other issues,

>
>
>
> ? ? ? ?126 // Slots for keeping state for above member funcs.
> ? ? ? ?127 MCObjectStreamer *ELFStreamer;
> ? ? ? ?128 MCAssembler *Asm;
>
> You don't need all this. As the initialization show you get the asm
> from the streamer for example

Good call! Thanks!

>
> ?Asm = &ELFStreamer->getAssembler();
>
>
> Why do you have many " char empty = 0;". If this is a standard
> constant you should put it in a enum somewhere.

The first two are size fields (4 byte). , the second is a required
null byte in the stream.
The equiv. in MC/ELF uses a 0, but in this case, the SmallVector uses
a const T& - (T is always a char in this case).
I though exactly matching types and a descriptive name would be ok..
Since they are isolated in the helper functions, I'll change it to
numeric 0. Is this acceptable?

>
> // ('S') (i.e. the -F?classic? programmer?s model)-A
>
> Corrupted file? Has some strange looking characters.

Oops. These were from the comments of the ARM manual - I'll fix these.

>
> Cheers,

Here's the patch. http://codereview.chromium.org/3770019

Thanks!

-jason

> --
> Rafael ?vila de Esp?ndola
>
-------------- next part --------------
A non-text attachment was scrubbed...
Name: arm-mc-elf-s06.patch4
Type: application/octet-stream
Size: 12521 bytes
Desc: not available
Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101018/8c63909c/attachment-0001.obj 

From jasonwkim at google.com  Mon Oct 18 16:56:24 2010
From: jasonwkim at google.com (Jason Kim)
Date: Mon, 18 Oct 2010 14:56:24 -0700
Subject: [llvm-commits] [llvm] r116753 - in /llvm/trunk/test: MC/ELF/
	Scripts/
In-Reply-To: <AANLkTikRWuOLKd__KDtdYqFzKA7DRRB0KW8q1qtqx=RL@mail.gmail.com>
References: <20101018213241.E80FB2A6C12C@llvm.org>
	<AANLkTikRWuOLKd__KDtdYqFzKA7DRRB0KW8q1qtqx=RL@mail.gmail.com>
Message-ID: <AANLkTin39rJR3X7g8WQTo6eUj6z3DY+ACidf6BTcvX9C@mail.gmail.com>

Will do!

-jason

On Mon, Oct 18, 2010 at 2:51 PM, Rafael Esp?ndola
<rafael.espindola at gmail.com> wrote:
>> Changed elf-dump to output hex format by default.
>
> It is not just by default, it is always. That is good. Would you mind
> propagating the FormatOutput=hex?
>
> Cheers,
> Rafael
>


From daniel at zuster.org  Mon Oct 18 16:55:18 2010
From: daniel at zuster.org (Daniel Dunbar)
Date: Mon, 18 Oct 2010 21:55:18 -0000
Subject: [llvm-commits] [llvm] r116755 -
	/llvm/trunk/lib/Support/CrashRecoveryContext.cpp
Message-ID: <20101018215518.6A4E32A6C12C@llvm.org>

Author: ddunbar
Date: Mon Oct 18 16:55:18 2010
New Revision: 116755

URL: http://llvm.org/viewvc/llvm-project?rev=116755&view=rev
Log:
CrashRecoveryContext: Add missing return, so that the signal fires after we our
routine is off the stack. Otherwise we show up rather confusingly in the stack
trace.

Modified:
    llvm/trunk/lib/Support/CrashRecoveryContext.cpp

Modified: llvm/trunk/lib/Support/CrashRecoveryContext.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/CrashRecoveryContext.cpp?rev=116755&r1=116754&r2=116755&view=diff
==============================================================================
--- llvm/trunk/lib/Support/CrashRecoveryContext.cpp (original)
+++ llvm/trunk/lib/Support/CrashRecoveryContext.cpp Mon Oct 18 16:55:18 2010
@@ -128,6 +128,9 @@
     // This call of Disable isn't thread safe, but it doesn't actually matter.
     CrashRecoveryContext::Disable();
     raise(Signal);
+
+    // The signal will be thrown once the signal mask is restored.
+    return;
   }
 
   // Unblock the signal we received.



From jason.w.kim.2009 at gmail.com  Mon Oct 18 16:59:38 2010
From: jason.w.kim.2009 at gmail.com (Jason W Kim)
Date: Mon, 18 Oct 2010 21:59:38 -0000
Subject: [llvm-commits] [llvm] r116756 - /llvm/trunk/test/Scripts/elf-dump
Message-ID: <20101018215938.65FB42A6C12C@llvm.org>

Author: jasonwkim
Date: Mon Oct 18 16:59:38 2010
New Revision: 116756

URL: http://llvm.org/viewvc/llvm-project?rev=116756&view=rev
Log:
Get rid of unneeded FormatOutput global variable


Modified:
    llvm/trunk/test/Scripts/elf-dump

Modified: llvm/trunk/test/Scripts/elf-dump
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Scripts/elf-dump?rev=116756&r1=116755&r2=116756&view=diff
==============================================================================
--- llvm/trunk/test/Scripts/elf-dump (original)
+++ llvm/trunk/test/Scripts/elf-dump Mon Oct 18 16:59:38 2010
@@ -6,8 +6,6 @@
 
 import common_dump
 
-FormatOutput=hex
-
 class Reader:
     def __init__(self, path):
         if path == "-":
@@ -79,16 +77,16 @@
         self.sh_entsize = f.readWord()
 
     def dump(self, shstrtab, f, strtab, dumpdata):
-        print "  (('sh_name', %s)" % FormatOutput(self.sh_name), "# %r" % shstrtab[self.sh_name]
-        print "   ('sh_type', %s)" % FormatOutput(self.sh_type)
-        print "   ('sh_flags', %s)" % FormatOutput(self.sh_flags)
-        print "   ('sh_addr', %s)" % FormatOutput(self.sh_addr)
-        print "   ('sh_offset', %s)" % FormatOutput(self.sh_offset)
-        print "   ('sh_size', %s)" % FormatOutput(self.sh_size)
-        print "   ('sh_link', %s)" % FormatOutput(self.sh_link)
-        print "   ('sh_info', %s)" % FormatOutput(self.sh_info)
-        print "   ('sh_addralign', %s)" % FormatOutput(self.sh_addralign)
-        print "   ('sh_entsize', %s)" % FormatOutput(self.sh_entsize)
+        print "  (('sh_name', %s)" % hex(self.sh_name), "# %r" % shstrtab[self.sh_name]
+        print "   ('sh_type', %s)" % hex(self.sh_type)
+        print "   ('sh_flags', %s)" % hex(self.sh_flags)
+        print "   ('sh_addr', %s)" % hex(self.sh_addr)
+        print "   ('sh_offset', %s)" % hex(self.sh_offset)
+        print "   ('sh_size', %s)" % hex(self.sh_size)
+        print "   ('sh_link', %s)" % hex(self.sh_link)
+        print "   ('sh_info', %s)" % hex(self.sh_info)
+        print "   ('sh_addralign', %s)" % hex(self.sh_addralign)
+        print "   ('sh_entsize', %s)" % hex(self.sh_entsize)
         if self.sh_type == 2: # SHT_SYMTAB
             print "   ('_symbols', ["
             dumpSymtab(f, self, strtab)
@@ -108,20 +106,20 @@
 
     for index in range(entries):
         f.seek(section.sh_offset + index * section.sh_entsize)
-        print "    # Symbol %s" % FormatOutput(index)
+        print "    # Symbol %s" % hex(index)
         name = f.read32()
-        print "    (('st_name', %s)" % FormatOutput(name), "# %r" % strtab[name]
+        print "    (('st_name', %s)" % hex(name), "# %r" % strtab[name]
         if not f.is64Bit:
-            print "     ('st_value', %s)" % FormatOutput(f.read32())
-            print "     ('st_size', %s)" % FormatOutput(f.read32())
+            print "     ('st_value', %s)" % hex(f.read32())
+            print "     ('st_size', %s)" % hex(f.read32())
         st_info = f.read8()
-        print "     ('st_bind', %s)" % FormatOutput((st_info >> 4))
-        print "     ('st_type', %s)" % FormatOutput((st_info & 0xf))
-        print "     ('st_other', %s)" % FormatOutput(f.read8())
-        print "     ('st_shndx', %s)" % FormatOutput(f.read16())
+        print "     ('st_bind', %s)" % hex((st_info >> 4))
+        print "     ('st_type', %s)" % hex((st_info & 0xf))
+        print "     ('st_other', %s)" % hex(f.read8())
+        print "     ('st_shndx', %s)" % hex(f.read16())
         if f.is64Bit:
-            print "     ('st_value', %s)" % FormatOutput(f.read64())
-            print "     ('st_size', %s)" % FormatOutput(f.read64())
+            print "     ('st_value', %s)" % hex(f.read64())
+            print "     ('st_size', %s)" % hex(f.read64())
         print "    ),"
 
 def dumpRel(f, section, dumprela = False):
@@ -129,17 +127,17 @@
 
     for index in range(entries):
         f.seek(section.sh_offset + index * section.sh_entsize)
-        print "    # Relocation %s" % FormatOutput(index)
-        print "    (('r_offset', %s)" % FormatOutput(f.readWord())
+        print "    # Relocation %s" % hex(index)
+        print "    (('r_offset', %s)" % hex(f.readWord())
         r_info = f.readWord()
         if f.is64Bit:
-            print "     ('r_sym', %s)" % FormatOutput((r_info >> 32))
-            print "     ('r_type', %s)" % FormatOutput((r_info & 0xffffffff))
+            print "     ('r_sym', %s)" % hex((r_info >> 32))
+            print "     ('r_type', %s)" % hex((r_info & 0xffffffff))
         else:
-            print "     ('r_sym', %s)" % FormatOutput((r_info >> 8))
-            print "     ('r_type', %s)" % FormatOutput((r_info & 0xff))
+            print "     ('r_sym', %s)" % hex((r_info >> 8))
+            print "     ('r_type', %s)" % hex((r_info & 0xff))
         if dumprela:
-            print "     ('r_addend', %s)" % FormatOutput(f.readWordS())
+            print "     ('r_addend', %s)" % hex(f.readWordS())
         print "    ),"
 
 def dumpELF(path, opts):
@@ -154,8 +152,8 @@
     elif fileclass == 2: # ELFCLASS64
         f.is64Bit = True
     else:
-        raise ValueError, "Unknown file class %s" % FormatOutput(fileclass)
-    print "('e_indent[EI_CLASS]', %s)" % FormatOutput(fileclass)
+        raise ValueError, "Unknown file class %s" % hex(fileclass)
+    print "('e_indent[EI_CLASS]', %s)" % hex(fileclass)
 
     byteordering = f.read8()
     if byteordering == 1: # ELFDATA2LSB
@@ -163,32 +161,32 @@
     elif byteordering == 2: # ELFDATA2MSB
         f.isLSB = False
     else:
-        raise ValueError, "Unknown byte ordering %s" % FormatOutput(byteordering)
-    print "('e_indent[EI_DATA]', %s)" % FormatOutput(byteordering)
+        raise ValueError, "Unknown byte ordering %s" % hex(byteordering)
+    print "('e_indent[EI_DATA]', %s)" % hex(byteordering)
 
-    print "('e_indent[EI_VERSION]', %s)" % FormatOutput(f.read8())
-    print "('e_indent[EI_OSABI]', %s)" % FormatOutput(f.read8())
-    print "('e_indent[EI_ABIVERSION]', %s)" % FormatOutput(f.read8())
+    print "('e_indent[EI_VERSION]', %s)" % hex(f.read8())
+    print "('e_indent[EI_OSABI]', %s)" % hex(f.read8())
+    print "('e_indent[EI_ABIVERSION]', %s)" % hex(f.read8())
 
     f.seek(16) # Seek to end of e_ident.
 
-    print "('e_type', %s)" % FormatOutput(f.read16())
-    print "('e_machine', %s)" % FormatOutput(f.read16())
-    print "('e_version', %s)" % FormatOutput(f.read32())
-    print "('e_entry', %s)" % FormatOutput(f.readWord())
-    print "('e_phoff', %s)" % FormatOutput(f.readWord())
+    print "('e_type', %s)" % hex(f.read16())
+    print "('e_machine', %s)" % hex(f.read16())
+    print "('e_version', %s)" % hex(f.read32())
+    print "('e_entry', %s)" % hex(f.readWord())
+    print "('e_phoff', %s)" % hex(f.readWord())
     e_shoff = f.readWord()
-    print "('e_shoff', %s)" % FormatOutput(e_shoff)
-    print "('e_flags', %s)" % FormatOutput(f.read32())
-    print "('e_ehsize', %s)" % FormatOutput(f.read16())
-    print "('e_phentsize', %s)" % FormatOutput(f.read16())
-    print "('e_phnum', %s)" % FormatOutput(f.read16())
+    print "('e_shoff', %s)" % hex(e_shoff)
+    print "('e_flags', %s)" % hex(f.read32())
+    print "('e_ehsize', %s)" % hex(f.read16())
+    print "('e_phentsize', %s)" % hex(f.read16())
+    print "('e_phnum', %s)" % hex(f.read16())
     e_shentsize = f.read16()
-    print "('e_shentsize', %s)" % FormatOutput(e_shentsize)
+    print "('e_shentsize', %s)" % hex(e_shentsize)
     e_shnum = f.read16()
-    print "('e_shnum', %s)" % FormatOutput(e_shnum)
+    print "('e_shnum', %s)" % hex(e_shnum)
     e_shstrndx = f.read16()
-    print "('e_shstrndx', %s)" % FormatOutput(e_shstrndx)
+    print "('e_shstrndx', %s)" % hex(e_shstrndx)
 
     # Read all section headers
     sections = []
@@ -211,7 +209,7 @@
 
     print "('_sections', ["
     for index in range(e_shnum):
-        print "  # Section %s" % FormatOutput(index)
+        print "  # Section %s" % hex(index)
         sections[index].dump(shstrtab, f, strtab, opts.dumpSectionData)
     print "])"
 



From rafael.espindola at gmail.com  Mon Oct 18 17:05:37 2010
From: rafael.espindola at gmail.com (=?UTF-8?Q?Rafael_Esp=C3=ADndola?=)
Date: Mon, 18 Oct 2010 18:05:37 -0400
Subject: [llvm-commits] [llvm] r116756 -
	/llvm/trunk/test/Scripts/elf-dump
In-Reply-To: <20101018215938.65FB42A6C12C@llvm.org>
References: <20101018215938.65FB42A6C12C@llvm.org>
Message-ID: <AANLkTimOGVLQo-xT=CPYD3Z=PQF9TD0FnSLvhcStwgnM@mail.gmail.com>

On 18 October 2010 17:59, Jason W Kim <jason.w.kim.2009 at gmail.com> wrote:
> Author: jasonwkim
> Date: Mon Oct 18 16:59:38 2010
> New Revision: 116756
>
> URL: http://llvm.org/viewvc/llvm-project?rev=116756&view=rev
> Log:
> Get rid of unneeded FormatOutput global variable

Thanks,
Rafael

From gohman at apple.com  Mon Oct 18 17:35:57 2010
From: gohman at apple.com (Dan Gohman)
Date: Mon, 18 Oct 2010 15:35:57 -0700
Subject: [llvm-commits] [llvm] r116720 - in /llvm/trunk:
	include/llvm/Support/ lib/Analysis/ lib/CodeGen/
	test/Analysis/BasicAA/ test/Analysis/GlobalsModRef/
	test/Analysis/LoopDependenceAnalysis/
	test/Analysis/TypeBasedAliasAnalysis/ test/Other/
	test/Transforms/ArgumentPromotion/
	test/Transforms/DeadStoreElimination/ test/Transforms/GVN/
	test/Transforms/Inline/ test/Transforms/LICM/
	test/Transforms/MemCpyOpt/ test/Transforms/Sink/
In-Reply-To: <4CBCA240.3020300@free.fr>
References: <20101018180449.02B6E2A6C12C@llvm.org> <4CBCA240.3020300@free.fr>
Message-ID: <BFD829C0-62E9-4A33-88AC-B0C1958C1885@apple.com>


On Oct 18, 2010, at 12:38 PM, Duncan Sands wrote:

> Hi Dan,
> 
>> Make BasicAliasAnalysis a normal AliasAnalysis implementation which
>> does normal initialization and normal chaining. Change the default
>> AliasAnalysis implementation to NoAlias.
>> 
>> Update StandardCompileOpts.h and friends to explicitly request
>> BasicAliasAnalysis.
> 
> it used to be that if you requested a more advanced alias analysis
> (eg: globalsmodref-aa) then it would be used for the following pass,
> but later passes would go back to basic-aa.  Has this been fixed?

No. It works for TBAA now only because TBAA is an ImmutablePass and
the ImmutablePass case is now fixed.

Dan


From echristo at apple.com  Mon Oct 18 17:53:53 2010
From: echristo at apple.com (Eric Christopher)
Date: Mon, 18 Oct 2010 22:53:53 -0000
Subject: [llvm-commits] [llvm] r116762 - in /llvm/trunk:
 lib/Target/ARM/ARMFastISel.cpp test/CodeGen/ARM/fast-isel.ll
Message-ID: <20101018225353.B31D52A6C12C@llvm.org>

Author: echristo
Date: Mon Oct 18 17:53:53 2010
New Revision: 116762

URL: http://llvm.org/viewvc/llvm-project?rev=116762&view=rev
Log:
Revert r116220 - thus turning arm fast isel back on by default.

Modified:
    llvm/trunk/lib/Target/ARM/ARMFastISel.cpp
    llvm/trunk/test/CodeGen/ARM/fast-isel.ll

Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=116762&r1=116761&r2=116762&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Mon Oct 18 17:53:53 2010
@@ -48,8 +48,8 @@
 using namespace llvm;
 
 static cl::opt<bool>
-EnableARMFastISel("arm-fast-isel",
-                    cl::desc("Turn on experimental ARM fast-isel support"),
+DisableARMFastISel("disable-arm-fast-isel",
+                    cl::desc("Turn off experimental ARM fast-isel support"),
                     cl::init(false), cl::Hidden);
 
 namespace {
@@ -1660,7 +1660,7 @@
     // Completely untested on non-darwin.
     const TargetMachine &TM = funcInfo.MF->getTarget();
     const ARMSubtarget *Subtarget = &TM.getSubtarget<ARMSubtarget>();
-    if (Subtarget->isTargetDarwin() && EnableARMFastISel)
+    if (Subtarget->isTargetDarwin() && !DisableARMFastISel)
       return new ARMFastISel(funcInfo);
     return 0;
   }

Modified: llvm/trunk/test/CodeGen/ARM/fast-isel.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fast-isel.ll?rev=116762&r1=116761&r2=116762&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/fast-isel.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/fast-isel.ll Mon Oct 18 17:53:53 2010
@@ -1,5 +1,5 @@
-; RUN: llc < %s -O0 -arm-fast-isel -fast-isel-abort -mtriple=armv7-apple-darwin
-; RUN: llc < %s -O0 -arm-fast-isel -fast-isel-abort -mtriple=thumbv7-apple-darwin
+; RUN: llc < %s -O0 -fast-isel-abort -mtriple=armv7-apple-darwin
+; RUN: llc < %s -O0 -fast-isel-abort -mtriple=thumbv7-apple-darwin
 
 ; Very basic fast-isel functionality.
 



From chandlerc at gmail.com  Mon Oct 18 18:18:51 2010
From: chandlerc at gmail.com (Chandler Carruth)
Date: Mon, 18 Oct 2010 23:18:51 -0000
Subject: [llvm-commits] [llvm] r116766 -
	/llvm/trunk/include/llvm/MC/MCObjectFormat.h
Message-ID: <20101018231851.791912A6C12C@llvm.org>

Author: chandlerc
Date: Mon Oct 18 18:18:51 2010
New Revision: 116766

URL: http://llvm.org/viewvc/llvm-project?rev=116766&view=rev
Log:
Add a virtual destructor to silence a GCC warning.

Modified:
    llvm/trunk/include/llvm/MC/MCObjectFormat.h

Modified: llvm/trunk/include/llvm/MC/MCObjectFormat.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCObjectFormat.h?rev=116766&r1=116765&r2=116766&view=diff
==============================================================================
--- llvm/trunk/include/llvm/MC/MCObjectFormat.h (original)
+++ llvm/trunk/include/llvm/MC/MCObjectFormat.h Mon Oct 18 18:18:51 2010
@@ -15,6 +15,8 @@
 
 class MCObjectFormat {
 public:
+  virtual ~MCObjectFormat() {}
+
   /// isAbsolute - Check if A - B is an absolute value
   ///
   /// \param InSet - True if this expression is in a set. For example:



From gohman at apple.com  Mon Oct 18 18:31:47 2010
From: gohman at apple.com (Dan Gohman)
Date: Mon, 18 Oct 2010 23:31:47 -0000
Subject: [llvm-commits] [llvm] r116767 - in /llvm/trunk:
 include/llvm/Analysis/AliasSetTracker.h lib/Analysis/AliasSetTracker.cpp
Message-ID: <20101018233147.708A82A6C12C@llvm.org>

Author: djg
Date: Mon Oct 18 18:31:47 2010
New Revision: 116767

URL: http://llvm.org/viewvc/llvm-project?rev=116767&view=rev
Log:
Make the representation of AliasSets explicitly differentiate
between "not known yet" and "known no tbaa info" so that it
can merge them properly.

Modified:
    llvm/trunk/include/llvm/Analysis/AliasSetTracker.h
    llvm/trunk/lib/Analysis/AliasSetTracker.cpp

Modified: llvm/trunk/include/llvm/Analysis/AliasSetTracker.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/AliasSetTracker.h?rev=116767&r1=116766&r2=116767&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/AliasSetTracker.h (original)
+++ llvm/trunk/include/llvm/Analysis/AliasSetTracker.h Mon Oct 18 18:31:47 2010
@@ -44,7 +44,8 @@
     const MDNode *TBAAInfo;
   public:
     PointerRec(Value *V)
-      : Val(V), PrevInList(0), NextInList(0), AS(0), Size(0), TBAAInfo(0) {}
+      : Val(V), PrevInList(0), NextInList(0), AS(0), Size(0),
+        TBAAInfo(DenseMapInfo<const MDNode *>::getEmptyKey()) {}
 
     Value *getValue() const { return Val; }
     
@@ -59,26 +60,22 @@
     void updateSizeAndTBAAInfo(unsigned NewSize, const MDNode *NewTBAAInfo) {
       if (NewSize > Size) Size = NewSize;
 
-      if (!TBAAInfo)
+      if (TBAAInfo == DenseMapInfo<const MDNode *>::getEmptyKey())
+        // We don't have a TBAAInfo yet. Set it to NewTBAAInfo.
         TBAAInfo = NewTBAAInfo;
       else if (TBAAInfo != NewTBAAInfo)
-        TBAAInfo = reinterpret_cast<const MDNode *>(-1);
+        // NewTBAAInfo conflicts with TBAAInfo.
+        TBAAInfo = DenseMapInfo<const MDNode *>::getTombstoneKey();
     }
 
     unsigned getSize() const { return Size; }
 
-    /// getRawTBAAInfo - Return the raw TBAAInfo member. In addition to
-    /// being null or a pointer to an MDNode, this could be -1, meaning
-    /// there was conflicting information.
-    const MDNode *getRawTBAAInfo() const {
-      return TBAAInfo;
-    }
-
     /// getTBAAInfo - Return the TBAAInfo, or null if there is no
     /// information or conflicting information.
     const MDNode *getTBAAInfo() const {
-      // If we have conflicting TBAAInfo, return null.
-      if (TBAAInfo == reinterpret_cast<const MDNode *>(-1))
+      // If we have missing or conflicting TBAAInfo, return null.
+      if (TBAAInfo == DenseMapInfo<const MDNode *>::getEmptyKey() ||
+          TBAAInfo == DenseMapInfo<const MDNode *>::getTombstoneKey())
         return 0;
       return TBAAInfo;
     }
@@ -209,7 +206,6 @@
 
     Value *getPointer() const { return CurNode->getValue(); }
     unsigned getSize() const { return CurNode->getSize(); }
-    const MDNode *getRawTBAAInfo() const { return CurNode->getRawTBAAInfo(); }
     const MDNode *getTBAAInfo() const { return CurNode->getTBAAInfo(); }
 
     iterator& operator++() {                // Preincrement

Modified: llvm/trunk/lib/Analysis/AliasSetTracker.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/AliasSetTracker.cpp?rev=116767&r1=116766&r2=116767&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/AliasSetTracker.cpp (original)
+++ llvm/trunk/lib/Analysis/AliasSetTracker.cpp Mon Oct 18 18:31:47 2010
@@ -377,7 +377,7 @@
     bool X;
     for (AliasSet::iterator ASI = AS.begin(), E = AS.end(); ASI != E; ++ASI) {
       AliasSet &NewAS = addPointer(ASI.getPointer(), ASI.getSize(),
-                                   ASI.getRawTBAAInfo(),
+                                   ASI.getTBAAInfo(),
                                    (AliasSet::AccessType)AS.AccessTy, X);
       if (AS.isVolatile()) NewAS.setVolatile();
     }
@@ -533,7 +533,7 @@
   I = PointerMap.find(From);
   AliasSet *AS = I->second->getAliasSet(*this);
   AS->addPointer(*this, Entry, I->second->getSize(),
-                 I->second->getRawTBAAInfo(),
+                 I->second->getTBAAInfo(),
                  true);
 }
 



From grosbach at apple.com  Mon Oct 18 18:35:38 2010
From: grosbach at apple.com (Jim Grosbach)
Date: Mon, 18 Oct 2010 23:35:38 -0000
Subject: [llvm-commits] [llvm] r116768 -
	/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
Message-ID: <20101018233538.2C9A22A6C12C@llvm.org>

Author: grosbach
Date: Mon Oct 18 18:35:38 2010
New Revision: 116768

URL: http://llvm.org/viewvc/llvm-project?rev=116768&view=rev
Log:
ARM encoding information for [SU]SAT* instructions.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=116768&r1=116767&r2=116768&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Oct 18 18:35:38 2010
@@ -2059,50 +2059,94 @@
 
 // Unsigned Sum of Absolute Differences [and Accumulate] -- for disassembly only
 
-def USAD8  : AI<(outs GPR:$dst), (ins GPR:$a, GPR:$b),
+def USAD8  : AI<(outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm),
                 MulFrm /* for convenience */, NoItinerary, "usad8",
-                "\t$dst, $a, $b", []>,
+                "\t$Rd, $Rn, $Rm", []>,
              Requires<[IsARM, HasV6]> {
+  bits<4> Rd;
+  bits<4> Rn;
+  bits<4> Rm;
   let Inst{27-20} = 0b01111000;
   let Inst{15-12} = 0b1111;
   let Inst{7-4} = 0b0001;
+  let Inst{19-16} = Rd;
+  let Inst{11-8} = Rm;
+  let Inst{3-0} = Rn;
 }
-def USADA8 : AI<(outs GPR:$dst), (ins GPR:$a, GPR:$b, GPR:$acc),
+def USADA8 : AI<(outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm, GPR:$Ra),
                 MulFrm /* for convenience */, NoItinerary, "usada8",
-                "\t$dst, $a, $b, $acc", []>,
+                "\t$Rd, $Rn, $Rm, $Ra", []>,
              Requires<[IsARM, HasV6]> {
+  bits<4> Rd;
+  bits<4> Rn;
+  bits<4> Rm;
+  bits<4> Ra;
   let Inst{27-20} = 0b01111000;
   let Inst{7-4} = 0b0001;
+  let Inst{19-16} = Rd;
+  let Inst{15-12} = Ra;
+  let Inst{11-8} = Rm;
+  let Inst{3-0} = Rn;
 }
 
 // Signed/Unsigned saturate -- for disassembly only
 
-def SSAT : AI<(outs GPR:$dst), (ins i32imm:$bit_pos, GPR:$a, shift_imm:$sh),
-              SatFrm, NoItinerary, "ssat", "\t$dst, $bit_pos, $a$sh",
+def SSAT : AI<(outs GPR:$Rd), (ins i32imm:$sat_imm, GPR:$a, shift_imm:$sh),
+              SatFrm, NoItinerary, "ssat", "\t$Rd, $sat_imm, $a$sh",
               [/* For disassembly only; pattern left blank */]> {
+  bits<4> Rd;
+  bits<5> sat_imm;
+  bits<4> Rn;
+  bits<8> sh;
   let Inst{27-21} = 0b0110101;
   let Inst{5-4} = 0b01;
+  let Inst{20-16} = sat_imm;
+  let Inst{15-12} = Rd;
+  let Inst{11-7} = sh{7-3};
+  let Inst{6} = sh{0};
+  let Inst{3-0} = Rn;
 }
 
-def SSAT16 : AI<(outs GPR:$dst), (ins i32imm:$bit_pos, GPR:$a), SatFrm,
-                NoItinerary, "ssat16", "\t$dst, $bit_pos, $a",
+def SSAT16 : AI<(outs GPR:$Rd), (ins i32imm:$sat_imm, GPR:$Rn), SatFrm,
+                NoItinerary, "ssat16", "\t$Rd, $sat_imm, $Rn",
                 [/* For disassembly only; pattern left blank */]> {
+  bits<4> Rd;
+  bits<4> sat_imm;
+  bits<4> Rn;
   let Inst{27-20} = 0b01101010;
-  let Inst{7-4} = 0b0011;
+  let Inst{11-4} = 0b11110011;
+  let Inst{15-12} = Rd;
+  let Inst{19-16} = sat_imm;
+  let Inst{3-0} = Rn;
 }
 
-def USAT : AI<(outs GPR:$dst), (ins i32imm:$bit_pos, GPR:$a, shift_imm:$sh),
-              SatFrm, NoItinerary, "usat", "\t$dst, $bit_pos, $a$sh",
+def USAT : AI<(outs GPR:$Rd), (ins i32imm:$sat_imm, GPR:$a, shift_imm:$sh),
+              SatFrm, NoItinerary, "usat", "\t$Rd, $sat_imm, $a$sh",
               [/* For disassembly only; pattern left blank */]> {
+  bits<4> Rd;
+  bits<5> sat_imm;
+  bits<4> Rn;
+  bits<8> sh;
   let Inst{27-21} = 0b0110111;
   let Inst{5-4} = 0b01;
+  let Inst{15-12} = Rd;
+  let Inst{11-7} = sh{7-3};
+  let Inst{6} = sh{0};
+  let Inst{20-16} = sat_imm;
+  let Inst{3-0} = Rn;
 }
 
-def USAT16 : AI<(outs GPR:$dst), (ins i32imm:$bit_pos, GPR:$a), SatFrm,
-                NoItinerary, "usat16", "\t$dst, $bit_pos, $a",
+def USAT16 : AI<(outs GPR:$Rd), (ins i32imm:$sat_imm, GPR:$a), SatFrm,
+                NoItinerary, "usat16", "\t$Rd, $sat_imm, $a",
                 [/* For disassembly only; pattern left blank */]> {
+  bits<4> Rd;
+  bits<4> sat_imm;
+  bits<4> Rn;
   let Inst{27-20} = 0b01101110;
-  let Inst{7-4} = 0b0011;
+  let Inst{11-4} = 0b11110011;
+  let Inst{15-12} = Rd;
+  let Inst{19-16} = sat_imm;
+  let Inst{3-0} = Rn;
 }
 
 def : ARMV6Pat<(int_arm_ssat GPR:$a, imm:$pos), (SSAT imm:$pos, GPR:$a, 0)>;



From wendling at apple.com  Mon Oct 18 18:47:50 2010
From: wendling at apple.com (Bill Wendling)
Date: Mon, 18 Oct 2010 16:47:50 -0700
Subject: [llvm-commits] [llvm] r116766 -
	/llvm/trunk/include/llvm/MC/MCObjectFormat.h
In-Reply-To: <20101018231851.791912A6C12C@llvm.org>
References: <20101018231851.791912A6C12C@llvm.org>
Message-ID: <08E3005E-AD77-4832-BEDA-62DE68A06309@apple.com>

On Oct 18, 2010, at 4:18 PM, Chandler Carruth wrote:

> Author: chandlerc
> Date: Mon Oct 18 18:18:51 2010
> New Revision: 116766
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=116766&view=rev
> Log:
> Add a virtual destructor to silence a GCC warning.
> 
> Modified:
>    llvm/trunk/include/llvm/MC/MCObjectFormat.h
> 
> Modified: llvm/trunk/include/llvm/MC/MCObjectFormat.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCObjectFormat.h?rev=116766&r1=116765&r2=116766&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/MC/MCObjectFormat.h (original)
> +++ llvm/trunk/include/llvm/MC/MCObjectFormat.h Mon Oct 18 18:18:51 2010
> @@ -15,6 +15,8 @@
> 
> class MCObjectFormat {
> public:
> +  virtual ~MCObjectFormat() {}
> +

Hi Chandler,

Should the definition for this go in the MCObjectFormat.cpp file to "anchor" the vtable?

-bw



From chandlerc at gmail.com  Mon Oct 18 18:52:57 2010
From: chandlerc at gmail.com (Chandler Carruth)
Date: Mon, 18 Oct 2010 16:52:57 -0700
Subject: [llvm-commits] [llvm] r116766 -
	/llvm/trunk/include/llvm/MC/MCObjectFormat.h
In-Reply-To: <08E3005E-AD77-4832-BEDA-62DE68A06309@apple.com>
References: <20101018231851.791912A6C12C@llvm.org>
	<08E3005E-AD77-4832-BEDA-62DE68A06309@apple.com>
Message-ID: <AANLkTin=zzLcAZTvMDU-joFJHLfAoXz_5wW+3gYWBy2y@mail.gmail.com>

On Mon, Oct 18, 2010 at 4:47 PM, Bill Wendling <wendling at apple.com> wrote:

> On Oct 18, 2010, at 4:18 PM, Chandler Carruth wrote:
>
> > Author: chandlerc
> > Date: Mon Oct 18 18:18:51 2010
> > New Revision: 116766
> >
> > URL: http://llvm.org/viewvc/llvm-project?rev=116766&view=rev
> > Log:
> > Add a virtual destructor to silence a GCC warning.
> >
> > Modified:
> >    llvm/trunk/include/llvm/MC/MCObjectFormat.h
> >
> > Modified: llvm/trunk/include/llvm/MC/MCObjectFormat.h
> > URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCObjectFormat.h?rev=116766&r1=116765&r2=116766&view=diff
> >
> ==============================================================================
> > --- llvm/trunk/include/llvm/MC/MCObjectFormat.h (original)
> > +++ llvm/trunk/include/llvm/MC/MCObjectFormat.h Mon Oct 18 18:18:51 2010
> > @@ -15,6 +15,8 @@
> >
> > class MCObjectFormat {
> > public:
> > +  virtual ~MCObjectFormat() {}
> > +
>
> Hi Chandler,
>
> Should the definition for this go in the MCObjectFormat.cpp file to
> "anchor" the vtable?
>

I wasn't sure. I placed it here as that seemed like the minimal change from
the original code (it is an abstract interface afterall). I'm happy to move
it to the cpp file if anchoring the vtable (and forcing this call to be
out-of-line) is desirable.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101018/4f6dab41/attachment.html 

From enderby at apple.com  Mon Oct 18 19:01:44 2010
From: enderby at apple.com (Kevin Enderby)
Date: Tue, 19 Oct 2010 00:01:44 -0000
Subject: [llvm-commits] [llvm] r116773 - in /llvm/trunk:
 lib/Target/X86/AsmParser/X86AsmParser.cpp lib/Target/X86/X86InstrSystem.td
 test/MC/X86/x86-32.s test/MC/X86/x86-64.s
Message-ID: <20101019000144.4F3F52A6C12C@llvm.org>

Author: enderby
Date: Mon Oct 18 19:01:44 2010
New Revision: 116773

URL: http://llvm.org/viewvc/llvm-project?rev=116773&view=rev
Log:
Added a few tweaks to the Intel Descriptor-table support instructions to allow
word forms and suffixed versions to match the darwin assembler in 32-bit and
64-bit modes.  This is again for use just with assembly source for llvm-mc .

Modified:
    llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
    llvm/trunk/lib/Target/X86/X86InstrSystem.td
    llvm/trunk/test/MC/X86/x86-32.s
    llvm/trunk/test/MC/X86/x86-64.s

Modified: llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp?rev=116773&r1=116772&r2=116773&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp (original)
+++ llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp Mon Oct 18 19:01:44 2010
@@ -1089,6 +1089,46 @@
     Operands.push_back(X86Operand::CreateImm(A, NameLoc, NameLoc));
   }
 
+  // "lgdtl" is not ambiguous 32-bit mode and is the same as "lgdt".
+  // "lgdtq" is not ambiguous 64-bit mode and is the same as "lgdt".
+  if ((Name == "lgdtl" && Is64Bit == false) ||
+      (Name == "lgdtq" && Is64Bit == true)) {
+    const char *NewName = "lgdt";
+    delete Operands[0];
+    Operands[0] = X86Operand::CreateToken(NewName, NameLoc);
+    Name = NewName;
+  }
+
+  // "lidtl" is not ambiguous 32-bit mode and is the same as "lidt".
+  // "lidtq" is not ambiguous 64-bit mode and is the same as "lidt".
+  if ((Name == "lidtl" && Is64Bit == false) ||
+      (Name == "lidtq" && Is64Bit == true)) {
+    const char *NewName = "lidt";
+    delete Operands[0];
+    Operands[0] = X86Operand::CreateToken(NewName, NameLoc);
+    Name = NewName;
+  }
+
+  // "sgdtl" is not ambiguous 32-bit mode and is the same as "sgdt".
+  // "sgdtq" is not ambiguous 64-bit mode and is the same as "sgdt".
+  if ((Name == "sgdtl" && Is64Bit == false) ||
+      (Name == "sgdtq" && Is64Bit == true)) {
+    const char *NewName = "sgdt";
+    delete Operands[0];
+    Operands[0] = X86Operand::CreateToken(NewName, NameLoc);
+    Name = NewName;
+  }
+
+  // "sidtl" is not ambiguous 32-bit mode and is the same as "sidt".
+  // "sidtq" is not ambiguous 64-bit mode and is the same as "sidt".
+  if ((Name == "sidtl" && Is64Bit == false) ||
+      (Name == "sidtq" && Is64Bit == true)) {
+    const char *NewName = "sidt";
+    delete Operands[0];
+    Operands[0] = X86Operand::CreateToken(NewName, NameLoc);
+    Name = NewName;
+  }
+
   return false;
 }
 

Modified: llvm/trunk/lib/Target/X86/X86InstrSystem.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSystem.td?rev=116773&r1=116772&r2=116773&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSystem.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSystem.td Mon Oct 18 19:01:44 2010
@@ -321,8 +321,12 @@
 //===----------------------------------------------------------------------===//
 // Descriptor-table support instructions
 
+def SGDT16m : I<0x01, MRM0m, (outs opaque48mem:$dst), (ins),
+              "sgdtw\t$dst", []>, TB, OpSize, Requires<[In32BitMode]>;
 def SGDTm : I<0x01, MRM0m, (outs opaque48mem:$dst), (ins),
               "sgdt\t$dst", []>, TB;
+def SIDT16m : I<0x01, MRM1m, (outs opaque48mem:$dst), (ins),
+              "sidtw\t$dst", []>, TB, OpSize, Requires<[In32BitMode]>;
 def SIDTm : I<0x01, MRM1m, (outs opaque48mem:$dst), (ins),
               "sidt\t$dst", []>, TB;
 def SLDT16r : I<0x00, MRM0r, (outs GR16:$dst), (ins),
@@ -339,8 +343,12 @@
 def SLDT64m : RI<0x00, MRM0m, (outs i16mem:$dst), (ins),
                  "sldt{q}\t$dst", []>, TB;
 
+def LGDT16m : I<0x01, MRM2m, (outs), (ins opaque48mem:$src),
+              "lgdtw\t$src", []>, TB, OpSize, Requires<[In32BitMode]>;
 def LGDTm : I<0x01, MRM2m, (outs), (ins opaque48mem:$src),
               "lgdt\t$src", []>, TB;
+def LIDT16m : I<0x01, MRM3m, (outs), (ins opaque48mem:$src),
+              "lidtw\t$src", []>, TB, OpSize, Requires<[In32BitMode]>;
 def LIDTm : I<0x01, MRM3m, (outs), (ins opaque48mem:$src),
               "lidt\t$src", []>, TB;
 def LLDT16r : I<0x00, MRM2r, (outs), (ins GR16:$src),

Modified: llvm/trunk/test/MC/X86/x86-32.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86-32.s?rev=116773&r1=116772&r2=116773&view=diff
==============================================================================
--- llvm/trunk/test/MC/X86/x86-32.s (original)
+++ llvm/trunk/test/MC/X86/x86-32.s Mon Oct 18 19:01:44 2010
@@ -654,3 +654,51 @@
 // CHECK: arpl	%bx, 6(%ecx)
 // CHECK:  encoding: [0x63,0x59,0x06]
         	arpl	%bx,6(%ecx)
+
+// CHECK: lgdtw	4(%eax)
+// CHECK:  encoding: [0x66,0x0f,0x01,0x50,0x04]
+        	lgdtw	4(%eax)
+
+// CHECK: lgdt	4(%eax)
+// CHECK:  encoding: [0x0f,0x01,0x50,0x04]
+        	lgdt	4(%eax)
+
+// CHECK: lgdt	4(%eax)
+// CHECK:  encoding: [0x0f,0x01,0x50,0x04]
+        	lgdtl	4(%eax)
+
+// CHECK: lidtw	4(%eax)
+// CHECK:  encoding: [0x66,0x0f,0x01,0x58,0x04]
+        	lidtw	4(%eax)
+
+// CHECK: lidt	4(%eax)
+// CHECK:  encoding: [0x0f,0x01,0x58,0x04]
+        	lidt	4(%eax)
+
+// CHECK: lidt	4(%eax)
+// CHECK:  encoding: [0x0f,0x01,0x58,0x04]
+        	lidtl	4(%eax)
+
+// CHECK: sgdtw	4(%eax)
+// CHECK:  encoding: [0x66,0x0f,0x01,0x40,0x04]
+        	sgdtw	4(%eax)
+
+// CHECK: sgdt	4(%eax)
+// CHECK:  encoding: [0x0f,0x01,0x40,0x04]
+        	sgdt	4(%eax)
+
+// CHECK: sgdt	4(%eax)
+// CHECK:  encoding: [0x0f,0x01,0x40,0x04]
+        	sgdtl	4(%eax)
+
+// CHECK: sidtw	4(%eax)
+// CHECK:  encoding: [0x66,0x0f,0x01,0x48,0x04]
+        	sidtw	4(%eax)
+
+// CHECK: sidt	4(%eax)
+// CHECK:  encoding: [0x0f,0x01,0x48,0x04]
+        	sidt	4(%eax)
+
+// CHECK: sidt	4(%eax)
+// CHECK:  encoding: [0x0f,0x01,0x48,0x04]
+        	sidtl	4(%eax)

Modified: llvm/trunk/test/MC/X86/x86-64.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86-64.s?rev=116773&r1=116772&r2=116773&view=diff
==============================================================================
--- llvm/trunk/test/MC/X86/x86-64.s (original)
+++ llvm/trunk/test/MC/X86/x86-64.s Mon Oct 18 19:01:44 2010
@@ -795,3 +795,35 @@
 decw %ax  // CHECK:	decw	%ax # encoding: [0x66,0xff,0xc8]
 decl %eax // CHECK:	decl	%eax # encoding: [0xff,0xc8]
 
+// rdar://8416805
+// CHECK: lgdt	4(%rax)
+// CHECK:  encoding: [0x0f,0x01,0x50,0x04]
+        	lgdt	4(%rax)
+
+// CHECK: lgdt	4(%rax)
+// CHECK:  encoding: [0x0f,0x01,0x50,0x04]
+        	lgdtq	4(%rax)
+
+// CHECK: lidt	4(%rax)
+// CHECK:  encoding: [0x0f,0x01,0x58,0x04]
+        	lidt	4(%rax)
+
+// CHECK: lidt	4(%rax)
+// CHECK:  encoding: [0x0f,0x01,0x58,0x04]
+        	lidtq	4(%rax)
+
+// CHECK: sgdt	4(%rax)
+// CHECK:  encoding: [0x0f,0x01,0x40,0x04]
+        	sgdt	4(%rax)
+
+// CHECK: sgdt	4(%rax)
+// CHECK:  encoding: [0x0f,0x01,0x40,0x04]
+        	sgdtq	4(%rax)
+
+// CHECK: sidt	4(%rax)
+// CHECK:  encoding: [0x0f,0x01,0x48,0x04]
+        	sidt	4(%rax)
+
+// CHECK: sidt	4(%rax)
+// CHECK:  encoding: [0x0f,0x01,0x48,0x04]
+        	sidtq	4(%rax)



From bob.wilson at apple.com  Mon Oct 18 19:16:32 2010
From: bob.wilson at apple.com (Bob Wilson)
Date: Tue, 19 Oct 2010 00:16:32 -0000
Subject: [llvm-commits] [llvm] r116776 - in /llvm/trunk:
 lib/Target/ARM/ARMISelDAGToDAG.cpp test/CodeGen/ARM/vldlane.ll
 test/CodeGen/ARM/vstlane.ll
Message-ID: <20101019001632.479492A6C12C@llvm.org>

Author: bwilson
Date: Mon Oct 18 19:16:32 2010
New Revision: 116776

URL: http://llvm.org/viewvc/llvm-project?rev=116776&view=rev
Log:
Support alignment for NEON vld-lane and vst-lane instructions.

Modified:
    llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
    llvm/trunk/test/CodeGen/ARM/vldlane.ll
    llvm/trunk/test/CodeGen/ARM/vstlane.ll

Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp?rev=116776&r1=116775&r2=116776&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp Mon Oct 18 19:16:32 2010
@@ -1298,6 +1298,17 @@
   EVT VT = IsLoad ? N->getValueType(0) : N->getOperand(3).getValueType();
   bool is64BitVector = VT.is64BitVector();
 
+  if (NumVecs != 3) {
+    unsigned Alignment = cast<MemIntrinsicSDNode>(N)->getAlignment();
+    unsigned NumBytes = NumVecs * VT.getVectorElementType().getSizeInBits()/8;
+    if (Alignment > NumBytes)
+      Alignment = NumBytes;
+    // Alignment must be a power of two; make sure of that.
+    Alignment = (Alignment & -Alignment);
+    if (Alignment > 1)
+      Align = CurDAG->getTargetConstant(Alignment, MVT::i32);
+  }
+
   unsigned OpcodeIndex;
   switch (VT.getSimpleVT().SimpleTy) {
   default: llvm_unreachable("unhandled vld/vst lane type");

Modified: llvm/trunk/test/CodeGen/ARM/vldlane.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vldlane.ll?rev=116776&r1=116775&r2=116776&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/vldlane.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/vldlane.ll Mon Oct 18 19:16:32 2010
@@ -11,9 +11,10 @@
 
 define <8 x i8> @vld2lanei8(i8* %A, <8 x i8>* %B) nounwind {
 ;CHECK: vld2lanei8:
-;CHECK: vld2.8
+;Check the alignment value.  Max for this instruction is 16 bits:
+;CHECK: vld2.8 {d16[1], d17[1]}, [r0, :16]
 	%tmp1 = load <8 x i8>* %B
-	%tmp2 = call %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 1)
+	%tmp2 = call %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 4)
         %tmp3 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 0
         %tmp4 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 1
         %tmp5 = add <8 x i8> %tmp3, %tmp4
@@ -22,10 +23,11 @@
 
 define <4 x i16> @vld2lanei16(i16* %A, <4 x i16>* %B) nounwind {
 ;CHECK: vld2lanei16:
-;CHECK: vld2.16
+;Check the alignment value.  Max for this instruction is 32 bits:
+;CHECK: vld2.16 {d16[1], d17[1]}, [r0, :32]
 	%tmp0 = bitcast i16* %A to i8*
 	%tmp1 = load <4 x i16>* %B
-	%tmp2 = call %struct.__neon_int16x4x2_t @llvm.arm.neon.vld2lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 1)
+	%tmp2 = call %struct.__neon_int16x4x2_t @llvm.arm.neon.vld2lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 8)
         %tmp3 = extractvalue %struct.__neon_int16x4x2_t %tmp2, 0
         %tmp4 = extractvalue %struct.__neon_int16x4x2_t %tmp2, 1
         %tmp5 = add <4 x i16> %tmp3, %tmp4
@@ -58,10 +60,11 @@
 
 define <8 x i16> @vld2laneQi16(i16* %A, <8 x i16>* %B) nounwind {
 ;CHECK: vld2laneQi16:
-;CHECK: vld2.16
+;Check the (default) alignment.
+;CHECK: vld2.16 {d17[1], d19[1]}, [r0]
 	%tmp0 = bitcast i16* %A to i8*
 	%tmp1 = load <8 x i16>* %B
-	%tmp2 = call %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1, i32 1)
+	%tmp2 = call %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 5, i32 1)
         %tmp3 = extractvalue %struct.__neon_int16x8x2_t %tmp2, 0
         %tmp4 = extractvalue %struct.__neon_int16x8x2_t %tmp2, 1
         %tmp5 = add <8 x i16> %tmp3, %tmp4
@@ -70,10 +73,11 @@
 
 define <4 x i32> @vld2laneQi32(i32* %A, <4 x i32>* %B) nounwind {
 ;CHECK: vld2laneQi32:
-;CHECK: vld2.32
+;Check the alignment value.  Max for this instruction is 64 bits:
+;CHECK: vld2.32 {d17[0], d19[0]}, [r0, :64]
 	%tmp0 = bitcast i32* %A to i8*
 	%tmp1 = load <4 x i32>* %B
-	%tmp2 = call %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2, i32 1)
+	%tmp2 = call %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2, i32 16)
         %tmp3 = extractvalue %struct.__neon_int32x4x2_t %tmp2, 0
         %tmp4 = extractvalue %struct.__neon_int32x4x2_t %tmp2, 1
         %tmp5 = add <4 x i32> %tmp3, %tmp4
@@ -125,10 +129,11 @@
 
 define <4 x i16> @vld3lanei16(i16* %A, <4 x i16>* %B) nounwind {
 ;CHECK: vld3lanei16:
-;CHECK: vld3.16
+;Check the (default) alignment value.  VLD3 does not support alignment.
+;CHECK: vld3.16 {d16[1], d17[1], d18[1]}, [r0]
 	%tmp0 = bitcast i16* %A to i8*
 	%tmp1 = load <4 x i16>* %B
-	%tmp2 = call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 1)
+	%tmp2 = call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 8)
         %tmp3 = extractvalue %struct.__neon_int16x4x3_t %tmp2, 0
         %tmp4 = extractvalue %struct.__neon_int16x4x3_t %tmp2, 1
         %tmp5 = extractvalue %struct.__neon_int16x4x3_t %tmp2, 2
@@ -167,10 +172,11 @@
 
 define <8 x i16> @vld3laneQi16(i16* %A, <8 x i16>* %B) nounwind {
 ;CHECK: vld3laneQi16:
-;CHECK: vld3.16
+;Check the (default) alignment value.  VLD3 does not support alignment.
+;CHECK: vld3.16 {d16[1], d18[1], d20[1]}, [r0]
 	%tmp0 = bitcast i16* %A to i8*
 	%tmp1 = load <8 x i16>* %B
-	%tmp2 = call %struct.__neon_int16x8x3_t @llvm.arm.neon.vld3lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1, i32 1)
+	%tmp2 = call %struct.__neon_int16x8x3_t @llvm.arm.neon.vld3lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1, i32 8)
         %tmp3 = extractvalue %struct.__neon_int16x8x3_t %tmp2, 0
         %tmp4 = extractvalue %struct.__neon_int16x8x3_t %tmp2, 1
         %tmp5 = extractvalue %struct.__neon_int16x8x3_t %tmp2, 2
@@ -227,9 +233,10 @@
 
 define <8 x i8> @vld4lanei8(i8* %A, <8 x i8>* %B) nounwind {
 ;CHECK: vld4lanei8:
-;CHECK: vld4.8
+;Check the alignment value.  Max for this instruction is 32 bits:
+;CHECK: vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0, :32]
 	%tmp1 = load <8 x i8>* %B
-	%tmp2 = call %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 1)
+	%tmp2 = call %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 8)
         %tmp3 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 0
         %tmp4 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 1
         %tmp5 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 2
@@ -258,10 +265,11 @@
 
 define <2 x i32> @vld4lanei32(i32* %A, <2 x i32>* %B) nounwind {
 ;CHECK: vld4lanei32:
-;CHECK: vld4.32
+;Check the alignment value.  Max for this instruction is 128 bits:
+;CHECK: vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0, :128]
 	%tmp0 = bitcast i32* %A to i8*
 	%tmp1 = load <2 x i32>* %B
-	%tmp2 = call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 1)
+	%tmp2 = call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 16)
         %tmp3 = extractvalue %struct.__neon_int32x2x4_t %tmp2, 0
         %tmp4 = extractvalue %struct.__neon_int32x2x4_t %tmp2, 1
         %tmp5 = extractvalue %struct.__neon_int32x2x4_t %tmp2, 2
@@ -290,10 +298,11 @@
 
 define <8 x i16> @vld4laneQi16(i16* %A, <8 x i16>* %B) nounwind {
 ;CHECK: vld4laneQi16:
-;CHECK: vld4.16
+;Check the alignment value.  Max for this instruction is 64 bits:
+;CHECK: vld4.16 {d16[1], d18[1], d20[1], d22[1]}, [r0, :64]
 	%tmp0 = bitcast i16* %A to i8*
 	%tmp1 = load <8 x i16>* %B
-	%tmp2 = call %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1, i32 1)
+	%tmp2 = call %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1, i32 16)
         %tmp3 = extractvalue %struct.__neon_int16x8x4_t %tmp2, 0
         %tmp4 = extractvalue %struct.__neon_int16x8x4_t %tmp2, 1
         %tmp5 = extractvalue %struct.__neon_int16x8x4_t %tmp2, 2
@@ -306,10 +315,11 @@
 
 define <4 x i32> @vld4laneQi32(i32* %A, <4 x i32>* %B) nounwind {
 ;CHECK: vld4laneQi32:
-;CHECK: vld4.32
+;Check the (default) alignment.
+;CHECK: vld4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0]
 	%tmp0 = bitcast i32* %A to i8*
 	%tmp1 = load <4 x i32>* %B
-	%tmp2 = call %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 1, i32 1)
+	%tmp2 = call %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2, i32 1)
         %tmp3 = extractvalue %struct.__neon_int32x4x4_t %tmp2, 0
         %tmp4 = extractvalue %struct.__neon_int32x4x4_t %tmp2, 1
         %tmp5 = extractvalue %struct.__neon_int32x4x4_t %tmp2, 2

Modified: llvm/trunk/test/CodeGen/ARM/vstlane.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vstlane.ll?rev=116776&r1=116775&r2=116776&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/vstlane.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/vstlane.ll Mon Oct 18 19:16:32 2010
@@ -2,18 +2,20 @@
 
 define void @vst2lanei8(i8* %A, <8 x i8>* %B) nounwind {
 ;CHECK: vst2lanei8:
-;CHECK: vst2.8
+;Check the alignment value.  Max for this instruction is 16 bits:
+;CHECK: vst2.8 {d16[1], d17[1]}, [r0, :16]
 	%tmp1 = load <8 x i8>* %B
-	call void @llvm.arm.neon.vst2lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 1)
+	call void @llvm.arm.neon.vst2lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 4)
 	ret void
 }
 
 define void @vst2lanei16(i16* %A, <4 x i16>* %B) nounwind {
 ;CHECK: vst2lanei16:
-;CHECK: vst2.16
+;Check the alignment value.  Max for this instruction is 32 bits:
+;CHECK: vst2.16 {d16[1], d17[1]}, [r0, :32]
 	%tmp0 = bitcast i16* %A to i8*
 	%tmp1 = load <4 x i16>* %B
-	call void @llvm.arm.neon.vst2lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 1)
+	call void @llvm.arm.neon.vst2lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 8)
 	ret void
 }
 
@@ -37,19 +39,21 @@
 
 define void @vst2laneQi16(i16* %A, <8 x i16>* %B) nounwind {
 ;CHECK: vst2laneQi16:
-;CHECK: vst2.16
+;Check the (default) alignment.
+;CHECK: vst2.16 {d17[1], d19[1]}, [r0]
 	%tmp0 = bitcast i16* %A to i8*
 	%tmp1 = load <8 x i16>* %B
-	call void @llvm.arm.neon.vst2lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1, i32 1)
+	call void @llvm.arm.neon.vst2lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 5, i32 1)
 	ret void
 }
 
 define void @vst2laneQi32(i32* %A, <4 x i32>* %B) nounwind {
 ;CHECK: vst2laneQi32:
-;CHECK: vst2.32
+;Check the alignment value.  Max for this instruction is 64 bits:
+;CHECK: vst2.32 {d17[0], d19[0]}, [r0, :64]
 	%tmp0 = bitcast i32* %A to i8*
 	%tmp1 = load <4 x i32>* %B
-	call void @llvm.arm.neon.vst2lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2, i32 1)
+	call void @llvm.arm.neon.vst2lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2, i32 16)
 	ret void
 }
 
@@ -81,10 +85,11 @@
 
 define void @vst3lanei16(i16* %A, <4 x i16>* %B) nounwind {
 ;CHECK: vst3lanei16:
-;CHECK: vst3.16
+;Check the (default) alignment value.  VST3 does not support alignment.
+;CHECK: vst3.16 {d16[1], d17[1], d18[1]}, [r0]
 	%tmp0 = bitcast i16* %A to i8*
 	%tmp1 = load <4 x i16>* %B
-	call void @llvm.arm.neon.vst3lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 1)
+	call void @llvm.arm.neon.vst3lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 8)
 	ret void
 }
 
@@ -108,10 +113,11 @@
 
 define void @vst3laneQi16(i16* %A, <8 x i16>* %B) nounwind {
 ;CHECK: vst3laneQi16:
-;CHECK: vst3.16
+;Check the (default) alignment value.  VST3 does not support alignment.
+;CHECK: vst3.16 {d17[2], d19[2], d21[2]}, [r0]
 	%tmp0 = bitcast i16* %A to i8*
 	%tmp1 = load <8 x i16>* %B
-	call void @llvm.arm.neon.vst3lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 6, i32 1)
+	call void @llvm.arm.neon.vst3lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 6, i32 8)
 	ret void
 }
 
@@ -145,9 +151,10 @@
 
 define void @vst4lanei8(i8* %A, <8 x i8>* %B) nounwind {
 ;CHECK: vst4lanei8:
-;CHECK: vst4.8
+;Check the alignment value.  Max for this instruction is 32 bits:
+;CHECK: vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0, :32]
 	%tmp1 = load <8 x i8>* %B
-	call void @llvm.arm.neon.vst4lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 1)
+	call void @llvm.arm.neon.vst4lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 8)
 	ret void
 }
 
@@ -162,10 +169,11 @@
 
 define void @vst4lanei32(i32* %A, <2 x i32>* %B) nounwind {
 ;CHECK: vst4lanei32:
-;CHECK: vst4.32
+;Check the alignment value.  Max for this instruction is 128 bits:
+;CHECK: vst4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0, :128]
 	%tmp0 = bitcast i32* %A to i8*
 	%tmp1 = load <2 x i32>* %B
-	call void @llvm.arm.neon.vst4lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 1)
+	call void @llvm.arm.neon.vst4lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 16)
 	ret void
 }
 
@@ -180,16 +188,18 @@
 
 define void @vst4laneQi16(i16* %A, <8 x i16>* %B) nounwind {
 ;CHECK: vst4laneQi16:
-;CHECK: vst4.16
+;Check the alignment value.  Max for this instruction is 64 bits:
+;CHECK: vst4.16 {d17[3], d19[3], d21[3], d23[3]}, [r0, :64]
 	%tmp0 = bitcast i16* %A to i8*
 	%tmp1 = load <8 x i16>* %B
-	call void @llvm.arm.neon.vst4lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 7, i32 1)
+	call void @llvm.arm.neon.vst4lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 7, i32 16)
 	ret void
 }
 
 define void @vst4laneQi32(i32* %A, <4 x i32>* %B) nounwind {
 ;CHECK: vst4laneQi32:
-;CHECK: vst4.32
+;Check the (default) alignment.
+;CHECK: vst4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0]
 	%tmp0 = bitcast i32* %A to i8*
 	%tmp1 = load <4 x i32>* %B
 	call void @llvm.arm.neon.vst4lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2, i32 1)



From echristo at apple.com  Mon Oct 18 19:19:49 2010
From: echristo at apple.com (Eric Christopher)
Date: Tue, 19 Oct 2010 00:19:49 -0000
Subject: [llvm-commits] [llvm] r116777 - in /llvm/trunk/test: MC/ELF/
	Scripts/
Message-ID: <20101019001949.DBADA2A6C12C@llvm.org>

Author: echristo
Date: Mon Oct 18 19:19:49 2010
New Revision: 116777

URL: http://llvm.org/viewvc/llvm-project?rev=116777&view=rev
Log:
Speculatively revert 116753 and 116756 to attempt to fix the bots.

Modified:
    llvm/trunk/test/MC/ELF/alias.s
    llvm/trunk/test/MC/ELF/align-bss.s
    llvm/trunk/test/MC/ELF/align-nops.s
    llvm/trunk/test/MC/ELF/align-size.s
    llvm/trunk/test/MC/ELF/align-text.s
    llvm/trunk/test/MC/ELF/align.s
    llvm/trunk/test/MC/ELF/basic-elf.ll
    llvm/trunk/test/MC/ELF/common.s
    llvm/trunk/test/MC/ELF/common2.s
    llvm/trunk/test/MC/ELF/diff.s
    llvm/trunk/test/MC/ELF/empty.s
    llvm/trunk/test/MC/ELF/entsize.ll
    llvm/trunk/test/MC/ELF/entsize.s
    llvm/trunk/test/MC/ELF/file.s
    llvm/trunk/test/MC/ELF/got.s
    llvm/trunk/test/MC/ELF/local-reloc.s
    llvm/trunk/test/MC/ELF/merge.s
    llvm/trunk/test/MC/ELF/norelocation.s
    llvm/trunk/test/MC/ELF/pic-diff.s
    llvm/trunk/test/MC/ELF/plt.s
    llvm/trunk/test/MC/ELF/relax.s
    llvm/trunk/test/MC/ELF/relocation-386.s
    llvm/trunk/test/MC/ELF/relocation.s
    llvm/trunk/test/MC/ELF/section.s
    llvm/trunk/test/MC/ELF/size.s
    llvm/trunk/test/MC/ELF/sleb.s
    llvm/trunk/test/MC/ELF/uleb.s
    llvm/trunk/test/MC/ELF/undef.s
    llvm/trunk/test/MC/ELF/undef2.s
    llvm/trunk/test/MC/ELF/weak.s
    llvm/trunk/test/MC/ELF/zero.s
    llvm/trunk/test/Scripts/elf-dump

Modified: llvm/trunk/test/MC/ELF/alias.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/alias.s?rev=116777&r1=116776&r2=116777&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/alias.s (original)
+++ llvm/trunk/test/MC/ELF/alias.s Mon Oct 18 19:19:49 2010
@@ -15,70 +15,70 @@
 foo4:
 bar4 = foo4
 
-// CHECK:       # Symbol 0x1
-// CHECK-NEXT:  (('st_name', 0x5) # 'bar'
-// CHECK-NEXT:   ('st_bind', 0x0)
-// CHECK-NEXT:   ('st_type', 0x0)
-// CHECK-NEXT:   ('st_other', 0x0)
-// CHECK-NEXT:   ('st_shndx', 0x1)
-// CHECK-NEXT:   ('st_value', 0x0)
-// CHECK-NEXT:   ('st_size', 0x0)
+// CHECK:       # Symbol 1
+// CHECK-NEXT:  (('st_name', 5) # 'bar'
+// CHECK-NEXT:   ('st_bind', 0)
+// CHECK-NEXT:   ('st_type', 0)
+// CHECK-NEXT:   ('st_other', 0)
+// CHECK-NEXT:   ('st_shndx', 1)
+// CHECK-NEXT:   ('st_value', 0)
+// CHECK-NEXT:   ('st_size', 0)
 // CHECK-NEXT:  ),
-// CHECK-NEXT:  # Symbol 0x2
-// CHECK-NEXT: (('st_name', 0x1d) # 'bar4'
-// CHECK-NEXT:  ('st_bind', 0x0)
-// CHECK-NEXT:  ('st_type', 0x2)
-// CHECK-NEXT:  ('st_other', 0x0)
-// CHECK-NEXT:  ('st_shndx', 0x1)
-// CHECK-NEXT:  ('st_value', 0x0)
-// CHECK-NEXT:  ('st_size', 0x0)
+// CHECK-NEXT:  # Symbol 2
+// CHECK-NEXT: (('st_name', 29) # 'bar4'
+// CHECK-NEXT:  ('st_bind', 0)
+// CHECK-NEXT:  ('st_type', 2)
+// CHECK-NEXT:  ('st_other', 0)
+// CHECK-NEXT:  ('st_shndx', 1)
+// CHECK-NEXT:  ('st_value', 0)
+// CHECK-NEXT:  ('st_size', 0)
 // CHECK-NEXT: ),
-// CHECK-NEXT:  # Symbol 0x3
-// CHECK-NEXT:  (('st_name', 0x1) # 'foo'
-// CHECK-NEXT:   ('st_bind', 0x0)
-// CHECK-NEXT:   ('st_type', 0x0)
-// CHECK-NEXT:   ('st_other', 0x0)
-// CHECK-NEXT:   ('st_shndx', 0x1)
-// CHECK-NEXT:   ('st_value', 0x0)
-// CHECK-NEXT:   ('st_size', 0x0)
+// CHECK-NEXT:  # Symbol 3
+// CHECK-NEXT:  (('st_name', 1) # 'foo'
+// CHECK-NEXT:   ('st_bind', 0)
+// CHECK-NEXT:   ('st_type', 0)
+// CHECK-NEXT:   ('st_other', 0)
+// CHECK-NEXT:   ('st_shndx', 1)
+// CHECK-NEXT:   ('st_value', 0)
+// CHECK-NEXT:   ('st_size', 0)
 // CHECK-NEXT: ),
-// CHECK-NEXT:  # Symbol 0x4
-// CHECK-NEXT:  (('st_name', 0xe) # 'foo3'
-// CHECK-NEXT:   ('st_bind', 0x0)
-// CHECK-NEXT:   ('st_type', 0x0)
-// CHECK-NEXT:   ('st_other', 0x0)
-// CHECK-NEXT:   ('st_shndx', 0x1)
-// CHECK-NEXT:   ('st_value', 0x0)
-// CHECK-NEXT:   ('st_size', 0x0)
+// CHECK-NEXT:  # Symbol 4
+// CHECK-NEXT:  (('st_name', 14) # 'foo3'
+// CHECK-NEXT:   ('st_bind', 0)
+// CHECK-NEXT:   ('st_type', 0)
+// CHECK-NEXT:   ('st_other', 0)
+// CHECK-NEXT:   ('st_shndx', 1)
+// CHECK-NEXT:   ('st_value', 0)
+// CHECK-NEXT:   ('st_size', 0)
 // CHECK-NEXT: ),
-// CHECK-NEXT: # Symbol 0x5
-// CHECK-NEXT: (('st_name', 0x18) # 'foo4'
-// CHECK-NEXT:  ('st_bind', 0x0)
-// CHECK-NEXT:  ('st_type', 0x2)
-// CHECK-NEXT:  ('st_other', 0x0)
-// CHECK-NEXT:  ('st_shndx', 0x1)
-// CHECK-NEXT:  ('st_value', 0x0)
-// CHECK-NEXT:  ('st_size', 0x0)
+// CHECK-NEXT: # Symbol 5
+// CHECK-NEXT: (('st_name', 24) # 'foo4'
+// CHECK-NEXT:  ('st_bind', 0)
+// CHECK-NEXT:  ('st_type', 2)
+// CHECK-NEXT:  ('st_other', 0)
+// CHECK-NEXT:  ('st_shndx', 1)
+// CHECK-NEXT:  ('st_value', 0)
+// CHECK-NEXT:  ('st_size', 0)
 // CHECK-NEXT: ),
-// CHECK-NEXT: # Symbol 0x6
-// CHECK-NEXT: (('st_name', 0x0) # ''
-// CHECK:       # Symbol 0x7
-// CHECK-NEXT:  (('st_name', 0x0) # ''
-// CHECK:       # Symbol 0x8
-// CHECK-NEXT:  (('st_name', 0x0) # ''
-// CHECK:       # Symbol 0x9
-// CHECK-NEXT:  (('st_name', 0x13) # 'bar3'
-// CHECK-NEXT:   ('st_bind', 0x1)
-// CHECK-NEXT:   ('st_type', 0x0)
-// CHECK-NEXT:   ('st_other', 0x0)
-// CHECK-NEXT:   ('st_shndx', 0x1)
-// CHECK-NEXT:   ('st_value', 0x0)
-// CHECK-NEXT:   ('st_size', 0x0)
-// CHECK:       # Symbol 0xa
-// CHECK-NEXT:  (('st_name', 0x9) # 'bar2'
-// CHECK-NEXT:   ('st_bind', 0x1)
-// CHECK-NEXT:   ('st_type', 0x0)
-// CHECK-NEXT:   ('st_other', 0x0)
-// CHECK-NEXT:   ('st_shndx', 0x0)
-// CHECK-NEXT:   ('st_value', 0x0)
-// CHECK-NEXT:   ('st_size', 0x0)
+// CHECK-NEXT: # Symbol 6
+// CHECK-NEXT: (('st_name', 0) # ''
+// CHECK:       # Symbol 7
+// CHECK-NEXT:  (('st_name', 0) # ''
+// CHECK:       # Symbol 8
+// CHECK-NEXT:  (('st_name', 0) # ''
+// CHECK:       # Symbol 9
+// CHECK-NEXT:  (('st_name', 19) # 'bar3'
+// CHECK-NEXT:   ('st_bind', 1)
+// CHECK-NEXT:   ('st_type', 0)
+// CHECK-NEXT:   ('st_other', 0)
+// CHECK-NEXT:   ('st_shndx', 1)
+// CHECK-NEXT:   ('st_value', 0)
+// CHECK-NEXT:   ('st_size', 0)
+// CHECK:       # Symbol 10
+// CHECK-NEXT:  (('st_name', 9) # 'bar2'
+// CHECK-NEXT:   ('st_bind', 1)
+// CHECK-NEXT:   ('st_type', 0)
+// CHECK-NEXT:   ('st_other', 0)
+// CHECK-NEXT:   ('st_shndx', 0)
+// CHECK-NEXT:   ('st_value', 0)
+// CHECK-NEXT:   ('st_size', 0)

Modified: llvm/trunk/test/MC/ELF/align-bss.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/align-bss.s?rev=116777&r1=116776&r2=116777&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/align-bss.s (original)
+++ llvm/trunk/test/MC/ELF/align-bss.s Mon Oct 18 19:19:49 2010
@@ -5,13 +5,13 @@
 	.local	foo
 	.comm	foo,2048,16
 
-// CHECK:        ('sh_name', 0xd) # '.bss'
-// CHECK-NEXT:   ('sh_type', 0x8)
-// CHECK-NEXT:   ('sh_flags', 0x3)
-// CHECK-NEXT:   ('sh_addr', 0x0)
-// CHECK-NEXT:   ('sh_offset', 0x40)
-// CHECK-NEXT:   ('sh_size', 0x800)
-// CHECK-NEXT:   ('sh_link', 0x0)
-// CHECK-NEXT:   ('sh_info', 0x0)
-// CHECK-NEXT:   ('sh_addralign', 0x10)
-// CHECK-NEXT:   ('sh_entsize', 0x0)
+// CHECK:        ('sh_name', 13) # '.bss'
+// CHECK-NEXT:   ('sh_type', 8)
+// CHECK-NEXT:   ('sh_flags', 3)
+// CHECK-NEXT:   ('sh_addr', 0)
+// CHECK-NEXT:   ('sh_offset', 64)
+// CHECK-NEXT:   ('sh_size', 2048)
+// CHECK-NEXT:   ('sh_link', 0)
+// CHECK-NEXT:   ('sh_info', 0)
+// CHECK-NEXT:   ('sh_addralign', 16)
+// CHECK-NEXT:   ('sh_entsize', 0)

Modified: llvm/trunk/test/MC/ELF/align-nops.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/align-nops.s?rev=116777&r1=116776&r2=116777&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/align-nops.s (original)
+++ llvm/trunk/test/MC/ELF/align-nops.s Mon Oct 18 19:19:49 2010
@@ -15,26 +15,26 @@
     .long 0
     .align  8
 
-// CHECK: (('sh_name', 0x1) # '.text'
-// CHECK-NEXT:  ('sh_type', 0x1)
-// CHECK-NEXT:  ('sh_flags', 0x6)
+// CHECK: (('sh_name', 1) # '.text'
+// CHECK-NEXT:  ('sh_type', 1)
+// CHECK-NEXT:  ('sh_flags', 6)
 // CHECK-NEXT:  ('sh_addr',
 // CHECK-NEXT:  ('sh_offset',
-// CHECK-NEXT:  ('sh_size', 0x10)
-// CHECK-NEXT:  ('sh_link', 0x0)
-// CHECK-NEXT:  ('sh_info', 0x0)
-// CHECK-NEXT:  ('sh_addralign', 0x8)
-// CHECK-NEXT:  ('sh_entsize', 0x0)
+// CHECK-NEXT:  ('sh_size', 16)
+// CHECK-NEXT:  ('sh_link', 0)
+// CHECK-NEXT:  ('sh_info', 0)
+// CHECK-NEXT:  ('sh_addralign', 8)
+// CHECK-NEXT:  ('sh_entsize', 0)
 // CHECK-NEXT:  ('_section_data', '00000000 0f1f4000 00000000 0f1f4000')
 
-// CHECK: (('sh_name', 0x7) # '.data'
-// CHECK-NEXT:  ('sh_type', 0x1)
-// CHECK-NEXT:  ('sh_flags', 0x3)
+// CHECK: (('sh_name', 7) # '.data'
+// CHECK-NEXT:  ('sh_type', 1)
+// CHECK-NEXT:  ('sh_flags', 3)
 // CHECK-NEXT:  ('sh_addr',
 // CHECK-NEXT:  ('sh_offset',
-// CHECK-NEXT:  ('sh_size', 0x10)
-// CHECK-NEXT:  ('sh_link', 0x0)
-// CHECK-NEXT:  ('sh_info', 0x0)
-// CHECK-NEXT:  ('sh_addralign', 0x8)
-// CHECK-NEXT:  ('sh_entsize', 0x0)
+// CHECK-NEXT:  ('sh_size', 16)
+// CHECK-NEXT:  ('sh_link', 0)
+// CHECK-NEXT:  ('sh_info', 0)
+// CHECK-NEXT:  ('sh_addralign', 8)
+// CHECK-NEXT:  ('sh_entsize', 0)
 // CHECK-NEXT:  ('_section_data', '00000000 90909090 00000000 00000000')

Modified: llvm/trunk/test/MC/ELF/align-size.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/align-size.s?rev=116777&r1=116776&r2=116777&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/align-size.s (original)
+++ llvm/trunk/test/MC/ELF/align-size.s Mon Oct 18 19:19:49 2010
@@ -5,9 +5,9 @@
 	.zero 4
 	.align	8
 
-// CHECK:      (('sh_name', 0x1) # '.text'
-// CHECK-NEXT:  ('sh_type', 0x1)
-// CHECK-NEXT:  ('sh_flags', 0x6)
-// CHECK-NEXT:  ('sh_addr', 0x0)
-// CHECK-NEXT:  ('sh_offset', 0x40)
-// CHECK-NEXT:  ('sh_size', 0x8)
+// CHECK:      (('sh_name', 1) # '.text'
+// CHECK-NEXT:  ('sh_type', 1)
+// CHECK-NEXT:  ('sh_flags', 6)
+// CHECK-NEXT:  ('sh_addr', 0)
+// CHECK-NEXT:  ('sh_offset', 64)
+// CHECK-NEXT:  ('sh_size', 8)

Modified: llvm/trunk/test/MC/ELF/align-text.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/align-text.s?rev=116777&r1=116776&r2=116777&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/align-text.s (original)
+++ llvm/trunk/test/MC/ELF/align-text.s Mon Oct 18 19:19:49 2010
@@ -6,14 +6,14 @@
         .text
         .zero 1
 
-// CHECK:      (('sh_name', 0x1) # '.text'
-// CHECK-NEXT:  ('sh_type', 0x1)
-// CHECK-NEXT:  ('sh_flags', 0x6)
-// CHECK-NEXT:   ('sh_addr', 0x0)
-// CHECK-NEXT:   ('sh_offset', 0x40)
-// CHECK-NEXT:   ('sh_size', 0x2)
-// CHECK-NEXT:   ('sh_link', 0x0)
-// CHECK-NEXT:   ('sh_info', 0x0)
-// CHECK-NEXT:   ('sh_addralign', 0x4)
-// CHECK-NEXT:   ('sh_entsize', 0x0)
+// CHECK:      (('sh_name', 1) # '.text'
+// CHECK-NEXT:  ('sh_type', 1)
+// CHECK-NEXT:  ('sh_flags', 6)
+// CHECK-NEXT:   ('sh_addr', 0)
+// CHECK-NEXT:   ('sh_offset', 64)
+// CHECK-NEXT:   ('sh_size', 2)
+// CHECK-NEXT:   ('sh_link', 0)
+// CHECK-NEXT:   ('sh_info', 0)
+// CHECK-NEXT:   ('sh_addralign', 4)
+// CHECK-NEXT:   ('sh_entsize', 0)
 // CHECK-NEXT:  ),

Modified: llvm/trunk/test/MC/ELF/align.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/align.s?rev=116777&r1=116776&r2=116777&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/align.s (original)
+++ llvm/trunk/test/MC/ELF/align.s Mon Oct 18 19:19:49 2010
@@ -7,26 +7,26 @@
 	.section	.rodata,"a", at progbits
 	.align	8
 
-// CHECK: # Section 0x3
-// CHECK-NEXT:  (('sh_name', 0xd) # '.bss'
-// CHECK-NEXT:   ('sh_type', 0x8)
-// CHECK-NEXT:   ('sh_flags', 0x3)
-// CHECK-NEXT:   ('sh_addr', 0x0)
-// CHECK-NEXT:   ('sh_offset', 0x44)
-// CHECK-NEXT:   ('sh_size', 0x0)
-// CHECK-NEXT:   ('sh_link', 0x0)
-// CHECK-NEXT:   ('sh_info', 0x0)
-// CHECK-NEXT:   ('sh_addralign', 0x4)
-// CHECK-NEXT:   ('sh_entsize', 0x0)
+// CHECK: # Section 3
+// CHECK-NEXT:  (('sh_name', 13) # '.bss'
+// CHECK-NEXT:   ('sh_type', 8)
+// CHECK-NEXT:   ('sh_flags', 3)
+// CHECK-NEXT:   ('sh_addr', 0)
+// CHECK-NEXT:   ('sh_offset', 68)
+// CHECK-NEXT:   ('sh_size', 0)
+// CHECK-NEXT:   ('sh_link', 0)
+// CHECK-NEXT:   ('sh_info', 0)
+// CHECK-NEXT:   ('sh_addralign', 4)
+// CHECK-NEXT:   ('sh_entsize', 0)
 // CHECK-NEXT:  ),
-// CHECK-NEXT:  # Section 0x4
-// CHECK-NEXT:  (('sh_name', 0x12) # '.rodata'
-// CHECK-NEXT:   ('sh_type', 0x1)
-// CHECK-NEXT:   ('sh_flags', 0x2)
-// CHECK-NEXT:   ('sh_addr', 0x0)
-// CHECK-NEXT:   ('sh_offset', 0x48)
-// CHECK-NEXT:   ('sh_size', 0x0)
-// CHECK-NEXT:   ('sh_link', 0x0)
-// CHECK-NEXT:   ('sh_info', 0x0)
-// CHECK-NEXT:   ('sh_addralign', 0x8)
-// CHECK-NEXT:   ('sh_entsize', 0x0)
+// CHECK-NEXT:  # Section 4
+// CHECK-NEXT:  (('sh_name', 18) # '.rodata'
+// CHECK-NEXT:   ('sh_type', 1)
+// CHECK-NEXT:   ('sh_flags', 2)
+// CHECK-NEXT:   ('sh_addr', 0)
+// CHECK-NEXT:   ('sh_offset', 72)
+// CHECK-NEXT:   ('sh_size', 0)
+// CHECK-NEXT:   ('sh_link', 0)
+// CHECK-NEXT:   ('sh_info', 0)
+// CHECK-NEXT:   ('sh_addralign', 8)
+// CHECK-NEXT:   ('sh_entsize', 0)

Modified: llvm/trunk/test/MC/ELF/basic-elf.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/basic-elf.ll?rev=116777&r1=116776&r2=116777&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/basic-elf.ll (original)
+++ llvm/trunk/test/MC/ELF/basic-elf.ll Mon Oct 18 19:19:49 2010
@@ -12,100 +12,100 @@
 
 declare i32 @puts(i8* nocapture) nounwind
 
-; 32: ('e_indent[EI_CLASS]', 0x1)
-; 32: ('e_indent[EI_DATA]', 0x1)
-; 32: ('e_indent[EI_VERSION]', 0x1)
+; 32: ('e_indent[EI_CLASS]', 1)
+; 32: ('e_indent[EI_DATA]', 1)
+; 32: ('e_indent[EI_VERSION]', 1)
 ; 32: ('_sections', [
 ; 32:   # Section 0
-; 32:   (('sh_name', 0x0) # ''
+; 32:   (('sh_name', 0) # ''
 
 ; 32:   # '.text'
 
-; 32: ('st_bind', 0x0)
-; 32: ('st_type', 0x3)
+; 32: ('st_bind', 0)
+; 32: ('st_type', 3)
 
-; 32: ('st_bind', 0x0)
-; 32: ('st_type', 0x3)
+; 32: ('st_bind', 0)
+; 32: ('st_type', 3)
 
-; 32: ('st_bind', 0x0)
-; 32: ('st_type', 0x3)
+; 32: ('st_bind', 0)
+; 32: ('st_type', 3)
 
 ; 32:   # 'main'
-; 32:   ('st_bind', 0x1)
-; 32-NEXT: ('st_type', 0x2)
+; 32:   ('st_bind', 1)
+; 32-NEXT: ('st_type', 2)
 
 ; 32:   # 'puts'
-; 32:   ('st_bind', 0x1)
-; 32-NEXT: ('st_type', 0x0)
+; 32:   ('st_bind', 1)
+; 32-NEXT: ('st_type', 0)
 
 ; 32:   # '.rel.text'
 
 ; 32:   ('_relocations', [
-; 32:     # Relocation 0x0
-; 32:     (('r_offset', 0x6)
-; 32:      ('r_type', 0x1)
+; 32:     # Relocation 0
+; 32:     (('r_offset', 6)
+; 32:      ('r_type', 1)
 ; 32:     ),
-; 32:     # Relocation 0x1
-; 32:     (('r_offset', 0xb)
-; 32:      ('r_type', 0x2)
+; 32:     # Relocation 1
+; 32:     (('r_offset', 11)
+; 32:      ('r_type', 2)
 ; 32:     ),
-; 32:     # Relocation 0x2
-; 32:     (('r_offset', 0x12)
-; 32:      ('r_type', 0x1)
+; 32:     # Relocation 2
+; 32:     (('r_offset', 18)
+; 32:      ('r_type', 1)
 ; 32:     ),
-; 32:     # Relocation 0x3
-; 32:     (('r_offset', 0x17)
-; 32:      ('r_type', 0x2)
+; 32:     # Relocation 3
+; 32:     (('r_offset', 23)
+; 32:      ('r_type', 2)
 ; 32:     ),
 ; 32:   ])
 
-; 64: ('e_indent[EI_CLASS]', 0x2)
-; 64: ('e_indent[EI_DATA]', 0x1)
-; 64: ('e_indent[EI_VERSION]', 0x1)
+; 64: ('e_indent[EI_CLASS]', 2)
+; 64: ('e_indent[EI_DATA]', 1)
+; 64: ('e_indent[EI_VERSION]', 1)
 ; 64: ('_sections', [
 ; 64:   # Section 0
-; 64:   (('sh_name', 0x0) # ''
+; 64:   (('sh_name', 0) # ''
 
 ; 64:   # '.text'
 
-; 64: ('st_bind', 0x0)
-; 64: ('st_type', 0x3)
+; 64: ('st_bind', 0)
+; 64: ('st_type', 3)
 
-; 64: ('st_bind', 0x0)
-; 64: ('st_type', 0x3)
+; 64: ('st_bind', 0)
+; 64: ('st_type', 3)
 
-; 64: ('st_bind', 0x0)
-; 64: ('st_type', 0x3)
+; 64: ('st_bind', 0)
+; 64: ('st_type', 3)
 
 ; 64:   # 'main'
-; 64-NEXT: ('st_bind', 0x1)
-; 64-NEXT: ('st_type', 0x2)
+; 64-NEXT: ('st_bind', 1)
+; 64-NEXT: ('st_type', 2)
 
 ; 64:   # 'puts'
-; 64-NEXT: ('st_bind', 0x1)
-; 64-NEXT: ('st_type', 0x0)
+; 64-NEXT: ('st_bind', 1)
+; 64-NEXT: ('st_type', 0)
 
 ; 64:   # '.rela.text'
 
 ; 64:   ('_relocations', [
-; 64:     # Relocation 0x0
-; 64:     (('r_offset', 0x5)
-; 64:      ('r_type', 0xa)
-; 64:      ('r_addend', 0x0)
+; 64:     # Relocation 0
+; 64:     (('r_offset', 5)
+; 64:      ('r_type', 10)
+; 64:      ('r_addend', 0)
 ; 64:     ),
-; 64:     # Relocation 0x1
-; 64:     (('r_offset', 0xa)
-; 64:      ('r_type', 0x2)
-; 64:      ('r_addend', -0x4)
+; 64:     # Relocation 1
+; 64:     (('r_offset', 10)
+; 64:      ('r_type', 2)
+; 64:      ('r_addend', -4)
 ; 64:     ),
-; 64:     # Relocation 0x2
-; 64:     (('r_offset', 0xf)
-; 64:      ('r_type', 0xa)
-; 64:      ('r_addend', 0x6)
+; 64:     # Relocation 2
+; 64:     (('r_offset', 15)
+; 64:      ('r_type', 10)
+; 64:      ('r_addend', 6)
 ; 64:     ),
-; 64:     # Relocation 0x3
-; 64:     (('r_offset', 0x14)
-; 64:      ('r_type', 0x2)
-; 64:      ('r_addend', -0x4)
+; 64:     # Relocation 3
+; 64:     (('r_offset', 20)
+; 64:      ('r_type', 2)
+; 64:      ('r_addend', -4)
 ; 64:     ),
 ; 64:   ])

Modified: llvm/trunk/test/MC/ELF/common.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/common.s?rev=116777&r1=116776&r2=116777&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/common.s (original)
+++ llvm/trunk/test/MC/ELF/common.s Mon Oct 18 19:19:49 2010
@@ -8,13 +8,13 @@
 	.local	common1
 	.comm	common1,1,1
 
-// CHECK: ('st_name', 0x1) # 'common1'
-// CHECK-NEXT: ('st_bind', 0x0)
-// CHECK-NEXT: ('st_type', 0x1)
-// CHECK-NEXT: ('st_other', 0x0)
+// CHECK: ('st_name', 1) # 'common1'
+// CHECK-NEXT: ('st_bind', 0)
+// CHECK-NEXT: ('st_type', 1)
+// CHECK-NEXT: ('st_other', 0)
 // CHECK-NEXT: ('st_shndx',
-// CHECK-NEXT: ('st_value', 0x0)
-// CHECK-NEXT: ('st_size', 0x1)
+// CHECK-NEXT: ('st_value', 0)
+// CHECK-NEXT: ('st_size', 1)
 
 
 // Same as common1, but with directives in a different order.
@@ -22,25 +22,25 @@
 	.type	common2, at object
 	.comm	common2,1,1
 
-// CHECK: ('st_name', 0x9) # 'common2'
-// CHECK-NEXT: ('st_bind', 0x0)
-// CHECK-NEXT: ('st_type', 0x1)
-// CHECK-NEXT: ('st_other', 0x0)
+// CHECK: ('st_name', 9) # 'common2'
+// CHECK-NEXT: ('st_bind', 0)
+// CHECK-NEXT: ('st_type', 1)
+// CHECK-NEXT: ('st_other', 0)
 // CHECK-NEXT: ('st_shndx',
-// CHECK-NEXT: ('st_value', 0x1)
-// CHECK-NEXT: ('st_size', 0x1)
+// CHECK-NEXT: ('st_value', 1)
+// CHECK-NEXT: ('st_size', 1)
 
 // Test that without an explicit .local we produce a global.
 	.type	common3, at object
 	.comm	common3,4,4
 
-// CHECK: ('st_name', 0x11) # 'common3'
-// CHECK-NEXT: ('st_bind', 0x1)
-// CHECK-NEXT: ('st_type', 0x1)
-// CHECK-NEXT: ('st_other', 0x0)
-// CHECK-NEXT: ('st_shndx', 0xfff2)
-// CHECK-NEXT: ('st_value', 0x4)
-// CHECK-NEXT: ('st_size', 0x4)
+// CHECK: ('st_name', 17) # 'common3'
+// CHECK-NEXT: ('st_bind', 1)
+// CHECK-NEXT: ('st_type', 1)
+// CHECK-NEXT: ('st_other', 0)
+// CHECK-NEXT: ('st_shndx', 65522)
+// CHECK-NEXT: ('st_value', 4)
+// CHECK-NEXT: ('st_size', 4)
 
 
 // Test that without an explicit .local we produce a global, even if the first
@@ -54,10 +54,10 @@
 	.type	common4, at object
 	.comm	common4,40,16
 
-// CHECK: ('st_name', 0x1d) # 'common4'
-// CHECK-NEXT: ('st_bind', 0x1)
-// CHECK-NEXT: ('st_type', 0x1)
-// CHECK-NEXT: ('st_other', 0x0)
-// CHECK-NEXT: ('st_shndx', 0xfff2)
-// CHECK-NEXT: ('st_value', 0x10)
-// CHECK-NEXT: ('st_size', 0x28)
+// CHECK: ('st_name', 29) # 'common4'
+// CHECK-NEXT: ('st_bind', 1)
+// CHECK-NEXT: ('st_type', 1)
+// CHECK-NEXT: ('st_other', 0)
+// CHECK-NEXT: ('st_shndx', 65522)
+// CHECK-NEXT: ('st_value', 16)
+// CHECK-NEXT: ('st_size', 40)

Modified: llvm/trunk/test/MC/ELF/common2.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/common2.s?rev=116777&r1=116776&r2=116777&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/common2.s (original)
+++ llvm/trunk/test/MC/ELF/common2.s Mon Oct 18 19:19:49 2010
@@ -9,12 +9,12 @@
         .zero 1
 	.align	8
 
-// CHECK:      (('sh_name', 0xd) # '.bss'
+// CHECK:      (('sh_name', 13) # '.bss'
 // CHECK-NEXT:  ('sh_type',
 // CHECK-NEXT:  ('sh_flags'
 // CHECK-NEXT:  ('sh_addr',
 // CHECK-NEXT:  ('sh_offset',
-// CHECK-NEXT:  ('sh_size', 0x9)
+// CHECK-NEXT:  ('sh_size', 9)
 // CHECK-NEXT:  ('sh_link',
 // CHECK-NEXT:  ('sh_info',
 // CHECK-NEXT:  ('sh_addralign',

Modified: llvm/trunk/test/MC/ELF/diff.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/diff.s?rev=116777&r1=116776&r2=116777&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/diff.s (original)
+++ llvm/trunk/test/MC/ELF/diff.s Mon Oct 18 19:19:49 2010
@@ -8,8 +8,8 @@
 zed:
         mov zed+(bar-foo), %eax
 
-// CHECK:       # Relocation 0x0
-// CHECK-NEXT:  (('r_offset', 0x5)
-// CHECK-NEXT:   ('r_sym', 0x6)
-// CHECK-NEXT:   ('r_type', 0xb)
-// CHECK-NEXT:   ('r_addend', 0x1)
+// CHECK:       # Relocation 0
+// CHECK-NEXT:  (('r_offset', 5)
+// CHECK-NEXT:   ('r_sym', 6)
+// CHECK-NEXT:   ('r_type', 11)
+// CHECK-NEXT:   ('r_addend', 1)

Modified: llvm/trunk/test/MC/ELF/empty.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/empty.s?rev=116777&r1=116776&r2=116777&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/empty.s (original)
+++ llvm/trunk/test/MC/ELF/empty.s Mon Oct 18 19:19:49 2010
@@ -3,68 +3,68 @@
 // Test that like gnu as we create text, data and bss by default. Also test
 // that shstrtab, symtab and strtab are listed in that order.
 
-// CHECK:      ('sh_name', 0x1) # '.text'
-// CHECK-NEXT: ('sh_type', 0x1)
-// CHECK-NEXT: ('sh_flags', 0x6)
-// CHECK-NEXT: ('sh_addr', 0x0)
-// CHECK-NEXT: ('sh_offset', 0x40)
-// CHECK-NEXT: ('sh_size', 0x0)
-// CHECK-NEXT: ('sh_link', 0x0)
-// CHECK-NEXT: ('sh_info', 0x0)
-// CHECK-NEXT: ('sh_addralign', 0x4)
-// CHECK-NEXT: ('sh_entsize', 0x0)
-
-// CHECK:      ('sh_name', 0x7) # '.data'
-// CHECK-NEXT: ('sh_type', 0x1)
-// CHECK-NEXT: ('sh_flags', 0x3)
-// CHECK-NEXT: ('sh_addr', 0x0)
-// CHECK-NEXT: ('sh_offset', 0x40)
-// CHECK-NEXT: ('sh_size', 0x0)
-// CHECK-NEXT: ('sh_link', 0x0)
-// CHECK-NEXT: ('sh_info', 0x0)
-// CHECK-NEXT: ('sh_addralign', 0x4)
-// CHECK-NEXT: ('sh_entsize', 0x0)
-
-// CHECK:      ('sh_name', 0xd) # '.bss'
-// CHECK-NEXT: ('sh_type', 0x8)
-// CHECK-NEXT: ('sh_flags', 0x3)
-// CHECK-NEXT: ('sh_addr', 0x0)
-// CHECK-NEXT: ('sh_offset', 0x40)
-// CHECK-NEXT: ('sh_size', 0x0)
-// CHECK-NEXT: ('sh_link', 0x0)
-// CHECK-NEXT: ('sh_info', 0x0)
-// CHECK-NEXT: ('sh_addralign', 0x4)
-// CHECK-NEXT: ('sh_entsize', 0x0)
-
-// CHECK:      ('sh_name', 0x12) # '.shstrtab'
-// CHECK-NEXT: ('sh_type', 0x3)
-// CHECK-NEXT:    ('sh_flags', 0x0)
-// CHECK-NEXT:    ('sh_addr', 0x0)
-// CHECK-NEXT:    ('sh_offset', 0x40)
-// CHECK-NEXT:    ('sh_size', 0x2c)
-// CHECK-NEXT:    ('sh_link', 0x0)
-// CHECK-NEXT:    ('sh_info', 0x0)
-// CHECK-NEXT:    ('sh_addralign', 0x1)
-// CHECK-NEXT:    ('sh_entsize', 0x0)
-
-// CHECK: ('sh_name', 0x1c) # '.symtab'
-// CHECK-NEXT:    ('sh_type', 0x2)
-// CHECK-NEXT:    ('sh_flags', 0x0)
-// CHECK-NEXT:    ('sh_addr', 0x0)
+// CHECK:      ('sh_name', 1) # '.text'
+// CHECK-NEXT: ('sh_type', 1)
+// CHECK-NEXT: ('sh_flags', 6)
+// CHECK-NEXT: ('sh_addr', 0)
+// CHECK-NEXT: ('sh_offset', 64)
+// CHECK-NEXT: ('sh_size', 0)
+// CHECK-NEXT: ('sh_link', 0)
+// CHECK-NEXT: ('sh_info', 0)
+// CHECK-NEXT: ('sh_addralign', 4)
+// CHECK-NEXT: ('sh_entsize', 0)
+
+// CHECK:      ('sh_name', 7) # '.data'
+// CHECK-NEXT: ('sh_type', 1)
+// CHECK-NEXT: ('sh_flags', 3)
+// CHECK-NEXT: ('sh_addr', 0)
+// CHECK-NEXT: ('sh_offset', 64)
+// CHECK-NEXT: ('sh_size', 0)
+// CHECK-NEXT: ('sh_link', 0)
+// CHECK-NEXT: ('sh_info', 0)
+// CHECK-NEXT: ('sh_addralign', 4)
+// CHECK-NEXT: ('sh_entsize', 0)
+
+// CHECK:      ('sh_name', 13) # '.bss'
+// CHECK-NEXT: ('sh_type', 8)
+// CHECK-NEXT: ('sh_flags', 3)
+// CHECK-NEXT: ('sh_addr', 0)
+// CHECK-NEXT: ('sh_offset', 64)
+// CHECK-NEXT: ('sh_size', 0)
+// CHECK-NEXT: ('sh_link', 0)
+// CHECK-NEXT: ('sh_info', 0)
+// CHECK-NEXT: ('sh_addralign', 4)
+// CHECK-NEXT: ('sh_entsize', 0)
+
+// CHECK:      ('sh_name', 18) # '.shstrtab'
+// CHECK-NEXT: ('sh_type', 3)
+// CHECK-NEXT:    ('sh_flags', 0)
+// CHECK-NEXT:    ('sh_addr', 0)
+// CHECK-NEXT:    ('sh_offset', 64)
+// CHECK-NEXT:    ('sh_size', 44)
+// CHECK-NEXT:    ('sh_link', 0)
+// CHECK-NEXT:    ('sh_info', 0)
+// CHECK-NEXT:    ('sh_addralign', 1)
+// CHECK-NEXT:    ('sh_entsize', 0)
+
+// CHECK: ('sh_name', 28) # '.symtab'
+// CHECK-NEXT:    ('sh_type', 2)
+// CHECK-NEXT:    ('sh_flags', 0)
+// CHECK-NEXT:    ('sh_addr', 0)
 // CHECK-NEXT:    ('sh_offset',
-// CHECK-NEXT:    ('sh_size', 0x60)
-// CHECK-NEXT:    ('sh_link', 0x6)
-// CHECK-NEXT:    ('sh_info', 0x4)
-// CHECK-NEXT:    ('sh_addralign', 0x8)
-// CHECK-NEXT:    ('sh_entsize', 0x18)
-
-// CHECK: ('sh_name', 0x24) # '.strtab'
-// CHECK-NEXT:    ('sh_type', 0x3)
-// CHECK-NEXT:    ('sh_flags', 0x0)
-// CHECK-NEXT:    ('sh_addr', 0x0)
+// CHECK-NEXT:    ('sh_size', 96)
+// CHECK-NEXT:    ('sh_link', 6)
+// CHECK-NEXT:    ('sh_info', 4)
+// CHECK-NEXT:    ('sh_addralign', 8)
+// CHECK-NEXT:    ('sh_entsize', 24)
+
+// CHECK: ('sh_name', 36) # '.strtab'
+// CHECK-NEXT:    ('sh_type', 3)
+// CHECK-NEXT:    ('sh_flags', 0)
+// CHECK-NEXT:    ('sh_addr', 0)
 // CHECK-NEXT:    ('sh_offset',
-// CHECK-NEXT:    ('sh_size', 0x1)
-// CHECK-NEXT:    ('sh_link', 0x0)
-// CHECK-NEXT:    ('sh_info', 0x0)
-// CHECK-NEXT:    ('sh_addralign', 0x1)
-// CHECK-NEXT:    ('sh_entsize', 0x0)
+// CHECK-NEXT:    ('sh_size', 1)
+// CHECK-NEXT:    ('sh_link', 0)
+// CHECK-NEXT:    ('sh_info', 0)
+// CHECK-NEXT:    ('sh_addralign', 1)
+// CHECK-NEXT:    ('sh_entsize', 0)

Modified: llvm/trunk/test/MC/ELF/entsize.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/entsize.ll?rev=116777&r1=116776&r2=116777&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/entsize.ll (original)
+++ llvm/trunk/test/MC/ELF/entsize.ll Mon Oct 18 19:19:49 2010
@@ -20,25 +20,25 @@
 
 ;;;;;
 
-; 64: (('sh_name', 0x12) # '.rodata.str1.1'
-; 64-NEXT:   ('sh_type', 0x1)
-; 64-NEXT:   ('sh_flags', 0x32)
+; 64: (('sh_name', 18) # '.rodata.str1.1'
+; 64-NEXT:   ('sh_type', 1)
+; 64-NEXT:   ('sh_flags', 50)
 ; 64-NEXT:   ('sh_addr',
 ; 64-NEXT:   ('sh_offset',
-; 64-NEXT:   ('sh_size', 0xd)
+; 64-NEXT:   ('sh_size', 13)
 ; 64-NEXT:   ('sh_link',
 ; 64-NEXT:   ('sh_info',
-; 64-NEXT:   ('sh_addralign', 0x1)
-; 64-NEXT:   ('sh_entsize', 0x1)
+; 64-NEXT:   ('sh_addralign', 1)
+; 64-NEXT:   ('sh_entsize', 1)
 
-; 64: (('sh_name', 0x21) # '.rodata.cst8'
-; 64-NEXT:   ('sh_type', 0x1)
-; 64-NEXT:   ('sh_flags', 0x12)
+; 64: (('sh_name', 33) # '.rodata.cst8'
+; 64-NEXT:   ('sh_type', 1)
+; 64-NEXT:   ('sh_flags', 18)
 ; 64-NEXT:   ('sh_addr',
 ; 64-NEXT:   ('sh_offset',
-; 64-NEXT:   ('sh_size', 0x10)
+; 64-NEXT:   ('sh_size', 16)
 ; 64-NEXT:   ('sh_link',
 ; 64-NEXT:   ('sh_info',
-; 64-NEXT:   ('sh_addralign', 0x8)
-; 64-NEXT:   ('sh_entsize', 0x8)
+; 64-NEXT:   ('sh_addralign', 8)
+; 64-NEXT:   ('sh_entsize', 8)
 

Modified: llvm/trunk/test/MC/ELF/entsize.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/entsize.s?rev=116777&r1=116776&r2=116777&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/entsize.s (original)
+++ llvm/trunk/test/MC/ELF/entsize.s Mon Oct 18 19:19:49 2010
@@ -32,38 +32,38 @@
     .quad 42
     .quad 42
 
-// CHECK: # Section 0x4
-// CHECK-NEXT:   ('sh_name', 0x12) # '.rodata.str1.1'
-// CHECK-NEXT:   ('sh_type', 0x1)
-// CHECK-NEXT:   ('sh_flags', 0x32)
+// CHECK: # Section 4
+// CHECK-NEXT:   ('sh_name', 18) # '.rodata.str1.1'
+// CHECK-NEXT:   ('sh_type', 1)
+// CHECK-NEXT:   ('sh_flags', 50)
 // CHECK-NEXT:   ('sh_addr',
 // CHECK-NEXT:   ('sh_offset',
-// CHECK-NEXT:   ('sh_size', 0xd)
+// CHECK-NEXT:   ('sh_size', 13)
 // CHECK-NEXT:   ('sh_link',
 // CHECK-NEXT:   ('sh_info',
-// CHECK-NEXT:   ('sh_addralign', 0x1)
-// CHECK-NEXT:   ('sh_entsize', 0x1)
+// CHECK-NEXT:   ('sh_addralign', 1)
+// CHECK-NEXT:   ('sh_entsize', 1)
 
-// CHECK: # Section 0x5
-// CHECK-NEXT:   ('sh_name', 0x21) # '.rodata.str2.1'
-// CHECK-NEXT:   ('sh_type', 0x1)
-// CHECK-NEXT:   ('sh_flags', 0x32)
+// CHECK: # Section 5
+// CHECK-NEXT:   ('sh_name', 33) # '.rodata.str2.1'
+// CHECK-NEXT:   ('sh_type', 1)
+// CHECK-NEXT:   ('sh_flags', 50)
 // CHECK-NEXT:   ('sh_addr',
 // CHECK-NEXT:   ('sh_offset',
-// CHECK-NEXT:   ('sh_size', 0x10)
+// CHECK-NEXT:   ('sh_size', 16)
 // CHECK-NEXT:   ('sh_link',
 // CHECK-NEXT:   ('sh_info',
-// CHECK-NEXT:   ('sh_addralign', 0x1)
-// CHECK-NEXT:   ('sh_entsize', 0x2)
+// CHECK-NEXT:   ('sh_addralign', 1)
+// CHECK-NEXT:   ('sh_entsize', 2)
 
-// CHECK: # Section 0x6
-// CHECK-NEXT:   ('sh_name', 0x30) # '.rodata.cst8
-// CHECK-NEXT:   ('sh_type', 0x1)
-// CHECK-NEXT:   ('sh_flags', 0x12)
+// CHECK: # Section 6
+// CHECK-NEXT:   ('sh_name', 48) # '.rodata.cst8
+// CHECK-NEXT:   ('sh_type', 1)
+// CHECK-NEXT:   ('sh_flags', 18)
 // CHECK-NEXT:   ('sh_addr',
 // CHECK-NEXT:   ('sh_offset',
-// CHECK-NEXT:   ('sh_size', 0x10)
+// CHECK-NEXT:   ('sh_size', 16)
 // CHECK-NEXT:   ('sh_link',
 // CHECK-NEXT:   ('sh_info',
-// CHECK-NEXT:   ('sh_addralign', 0x1)
-// CHECK-NEXT:   ('sh_entsize', 0x8)
+// CHECK-NEXT:   ('sh_addralign', 1)
+// CHECK-NEXT:   ('sh_entsize', 8)

Modified: llvm/trunk/test/MC/ELF/file.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/file.s?rev=116777&r1=116776&r2=116777&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/file.s (original)
+++ llvm/trunk/test/MC/ELF/file.s Mon Oct 18 19:19:49 2010
@@ -4,20 +4,20 @@
 
 .file "foo"
 foa:
-// CHECK:    # Symbol 0x1
-// CHECK-NEXT:    (('st_name', 0x1) # 'foo'
-// CHECK-NEXT:     ('st_bind', 0x0)
-// CHECK-NEXT:     ('st_type', 0x4)
-// CHECK-NEXT:     ('st_other', 0x0)
-// CHECK-NEXT:     ('st_shndx', 0xfff1)
-// CHECK-NEXT:     ('st_value', 0x0)
-// CHECK-NEXT:     ('st_size', 0x0)
+// CHECK:    # Symbol 1
+// CHECK-NEXT:    (('st_name', 1) # 'foo'
+// CHECK-NEXT:     ('st_bind', 0)
+// CHECK-NEXT:     ('st_type', 4)
+// CHECK-NEXT:     ('st_other', 0)
+// CHECK-NEXT:     ('st_shndx', 65521)
+// CHECK-NEXT:     ('st_value', 0)
+// CHECK-NEXT:     ('st_size', 0)
 // CHECK-NEXT:    ),
-// CHECK-NEXT:    # Symbol 0x2
-// CHECK-NEXT:    (('st_name', 0x5) # 'foa'
-// CHECK-NEXT:     ('st_bind', 0x0)
-// CHECK-NEXT:     ('st_type', 0x0)
-// CHECK-NEXT:     ('st_other', 0x0)
-// CHECK-NEXT:     ('st_shndx', 0x1)
-// CHECK-NEXT:     ('st_value', 0x0)
-// CHECK-NEXT:     ('st_size', 0x0)
+// CHECK-NEXT:    # Symbol 2
+// CHECK-NEXT:    (('st_name', 5) # 'foa'
+// CHECK-NEXT:     ('st_bind', 0)
+// CHECK-NEXT:     ('st_type', 0)
+// CHECK-NEXT:     ('st_other', 0)
+// CHECK-NEXT:     ('st_shndx', 1)
+// CHECK-NEXT:     ('st_value', 0)
+// CHECK-NEXT:     ('st_size', 0)

Modified: llvm/trunk/test/MC/ELF/got.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/got.s?rev=116777&r1=116776&r2=116777&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/got.s (original)
+++ llvm/trunk/test/MC/ELF/got.s Mon Oct 18 19:19:49 2010
@@ -6,20 +6,20 @@
         movl	foo at GOT, %eax
         movl	foo at GOTPCREL(%rip), %eax
 
-// CHECK:     (('st_name', 0x5) # '_GLOBAL_OFFSET_TABLE_'
-// CHECK-NEXT: ('st_bind', 0x1)
+// CHECK:     (('st_name', 5) # '_GLOBAL_OFFSET_TABLE_'
+// CHECK-NEXT: ('st_bind', 1)
 
 // CHECK:      ('_relocations', [
-// CHECK-NEXT:   # Relocation 0x0
+// CHECK-NEXT:   # Relocation 0
 // CHECK-NEXT:    (('r_offset',
 // CHECK-NEXT:     ('r_sym',
-// CHECK-NEXT:     ('r_type', 0x3)
+// CHECK-NEXT:     ('r_type', 3)
 // CHECK-NEXT:     ('r_addend',
 // CHECK-NEXT:    ),
-// CHECK-NEXT:   # Relocation 0x1
+// CHECK-NEXT:   # Relocation 1
 // CHECK-NEXT:    (('r_offset',
 // CHECK-NEXT:     ('r_sym',
-// CHECK-NEXT:     ('r_type', 0x9)
+// CHECK-NEXT:     ('r_type', 9)
 // CHECK-NEXT:     ('r_addend',
 // CHECK-NEXT:    ),
 // CHECK-NEXT:   ])

Modified: llvm/trunk/test/MC/ELF/local-reloc.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/local-reloc.s?rev=116777&r1=116776&r2=116777&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/local-reloc.s (original)
+++ llvm/trunk/test/MC/ELF/local-reloc.s Mon Oct 18 19:19:49 2010
@@ -7,24 +7,24 @@
 foo:
 
 // Section number 1 is .text
-// CHECK:        # Section 0x1
-// CHECK-next:  (('sh_name', 0x1) # '.text'
+// CHECK:        # Section 1
+// CHECK-next:  (('sh_name', 1) # '.text'
 
 // Symbol number 2 is section number 1
-// CHECK:    # Symbol 0x2
-// CHECK-NEXT:    (('st_name', 0x0) # ''
-// CHECK-NEXT:     ('st_bind', 0x0)
-// CHECK-NEXT:     ('st_type', 0x3)
-// CHECK-NEXT:     ('st_other', 0x0)
-// CHECK-NEXT:     ('st_shndx', 0x1)
-// CHECK-NEXT:     ('st_value', 0x0)
-// CHECK-NEXT:     ('st_size', 0x0)
+// CHECK:    # Symbol 2
+// CHECK-NEXT:    (('st_name', 0) # ''
+// CHECK-NEXT:     ('st_bind', 0)
+// CHECK-NEXT:     ('st_type', 3)
+// CHECK-NEXT:     ('st_other', 0)
+// CHECK-NEXT:     ('st_shndx', 1)
+// CHECK-NEXT:     ('st_value', 0)
+// CHECK-NEXT:     ('st_size', 0)
 
 // Relocation refers to symbol number 2
 // CHECK:      ('_relocations', [
-// CHECK-NEXT:  # Relocation 0x0
+// CHECK-NEXT:  # Relocation 0
 // CHECK-NEXT:   (('r_offset',
-// CHECK-NEXT:    ('r_sym', 0x2)
+// CHECK-NEXT:    ('r_sym', 2)
 // CHECK-NEXT:    ('r_type',
 // CHECK-NEXT:    ('r_addend',
 // CHECK-NEXT:   ),

Modified: llvm/trunk/test/MC/ELF/merge.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/merge.s?rev=116777&r1=116776&r2=116777&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/merge.s (original)
+++ llvm/trunk/test/MC/ELF/merge.s Mon Oct 18 19:19:49 2010
@@ -23,75 +23,75 @@
 foo:
 
 // Section 4 is "sec1"
-// CHECK: # Section 0x4
-// CHECK-NEXT:  (('sh_name', 0x12) # '.sec1'
+// CHECK: # Section 4
+// CHECK-NEXT:  (('sh_name', 18) # '.sec1'
 
 // Symbol number 1 is .Lfoo
-// CHECK:      # Symbol 0x1
-// CHECK-NEXT: (('st_name', 0x1) # '.Lfoo'
+// CHECK:      # Symbol 1
+// CHECK-NEXT: (('st_name', 1) # '.Lfoo'
 
 // Symbol number 2 is foo
-// CHECK:      # Symbol 0x2
-// CHECK-NEXT: (('st_name', 0x7) # 'foo'
+// CHECK:      # Symbol 2
+// CHECK-NEXT: (('st_name', 7) # 'foo'
 
 // Symbol number 6 is section 4
-// CHECK:        # Symbol 0x6
-// CHECK-NEXT:    (('st_name', 0x0) # ''
-// CHECK-NEXT:     ('st_bind', 0x0)
-// CHECK-NEXT:     ('st_type', 0x3)
-// CHECK-NEXT:     ('st_other', 0x0)
-// CHECK-NEXT:     ('st_shndx', 0x4)
+// CHECK:        # Symbol 6
+// CHECK-NEXT:    (('st_name', 0) # ''
+// CHECK-NEXT:     ('st_bind', 0)
+// CHECK-NEXT:     ('st_type', 3)
+// CHECK-NEXT:     ('st_other', 0)
+// CHECK-NEXT:     ('st_shndx', 4)
 
 // Symbol number 8 is zed
-// CHECK:        # Symbol 0x8
-// CHECK-NEXT:    (('st_name', 0xb) # 'zed'
+// CHECK:        # Symbol 8
+// CHECK-NEXT:    (('st_name', 11) # 'zed'
 
 // Relocation 0 refers to symbol 1
 // CHECK:       ('_relocations', [
 // CHECK-NEXT:   # Relocation 0
 // CHECK-NEXT:   (('r_offset',
-// CHECK-NEXT:    ('r_sym', 0x1)
-// CHECK-NEXT:    ('r_type', 0x2
+// CHECK-NEXT:    ('r_sym', 1)
+// CHECK-NEXT:    ('r_type', 2
 // CHECK-NEXT:    ('r_addend',
 // CHECK-NEXT:   ),
 
 // Relocation 1 refers to symbol 6
-// CHECK-NEXT:  # Relocation 0x1
+// CHECK-NEXT:  # Relocation 1
 // CHECK-NEXT: (('r_offset',
-// CHECK-NEXT:  ('r_sym', 0x6)
-// CHECK-NEXT:  ('r_type', 0xa)
+// CHECK-NEXT:  ('r_sym', 6)
+// CHECK-NEXT:  ('r_type', 10)
 // CHECK-NEXT:  ('r_addend',
 // CHECK-NEXT: ),
 
 // Relocation 2 refers to symbol 1
-// CHECK-NEXT:   # Relocation 0x2
+// CHECK-NEXT:   # Relocation 2
 // CHECK-NEXT:   (('r_offset',
-// CHECK-NEXT:    ('r_sym', 0x1)
-// CHECK-NEXT:    ('r_type', 0xa
+// CHECK-NEXT:    ('r_sym', 1)
+// CHECK-NEXT:    ('r_type', 10
 // CHECK-NEXT:    ('r_addend',
 // CHECK-NEXT:   ),
 
 // Relocation 3 refers to symbol 2
-// CHECK-NEXT:   # Relocation 0x3
+// CHECK-NEXT:   # Relocation 3
 // CHECK-NEXT:   (('r_offset',
-// CHECK-NEXT:    ('r_sym', 0x2)
-// CHECK-NEXT:    ('r_type', 0x4
+// CHECK-NEXT:    ('r_sym', 2)
+// CHECK-NEXT:    ('r_type', 4
 // CHECK-NEXT:    ('r_addend',
 // CHECK-NEXT:   ),
 
 // Relocation 4 refers to symbol 2
-// CHECK-NEXT:   # Relocation 0x4
+// CHECK-NEXT:   # Relocation 4
 // CHECK-NEXT:   (('r_offset',
-// CHECK-NEXT:    ('r_sym', 0x2)
-// CHECK-NEXT:    ('r_type', 0x9
+// CHECK-NEXT:    ('r_sym', 2)
+// CHECK-NEXT:    ('r_type', 9
 // CHECK-NEXT:    ('r_addend',
 // CHECK-NEXT:   ),
 
 // Relocation 5 refers to symbol 8
-// CHECK-NEXT:   # Relocation 0x5
-// CHECK-NEXT:   (('r_offset', 0x23)
-// CHECK-NEXT:    ('r_sym', 0x8)
-// CHECK-NEXT:    ('r_type', 0xb)
-// CHECK-NEXT:    ('r_addend', 0x0)
+// CHECK-NEXT:   # Relocation 5
+// CHECK-NEXT:   (('r_offset', 35)
+// CHECK-NEXT:    ('r_sym', 8)
+// CHECK-NEXT:    ('r_type', 11)
+// CHECK-NEXT:    ('r_addend', 0)
 // CHECK-NEXT:   ),
 // CHECK-NEXT:  ])

Modified: llvm/trunk/test/MC/ELF/norelocation.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/norelocation.s?rev=116777&r1=116776&r2=116777&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/norelocation.s (original)
+++ llvm/trunk/test/MC/ELF/norelocation.s Mon Oct 18 19:19:49 2010
@@ -3,16 +3,16 @@
         call bar
 bar:
 
-// CHECK: ('sh_name', 0x1) # '.text'
-// CHECK-NEXT: ('sh_type', 0x1)
-// CHECK-NEXT: ('sh_flags', 0x6)
-// CHECK-NEXT: ('sh_addr', 0x0)
-// CHECK-NEXT: ('sh_offset', 0x40)
-// CHECK-NEXT: ('sh_size', 0x5)
-// CHECK-NEXT: ('sh_link', 0x0)
-// CHECK-NEXT: ('sh_info', 0x0)
-// CHECK-NEXT: ('sh_addralign', 0x4)
-// CHECK-NEXT: ('sh_entsize', 0x0)
+// CHECK: ('sh_name', 1) # '.text'
+// CHECK-NEXT: ('sh_type', 1)
+// CHECK-NEXT: ('sh_flags', 6)
+// CHECK-NEXT: ('sh_addr', 0)
+// CHECK-NEXT: ('sh_offset', 64)
+// CHECK-NEXT: ('sh_size', 5)
+// CHECK-NEXT: ('sh_link', 0)
+// CHECK-NEXT: ('sh_info', 0)
+// CHECK-NEXT: ('sh_addralign', 4)
+// CHECK-NEXT: ('sh_entsize', 0)
 // CHECK-NEXT: ('_section_data', 'e8000000 00')
 // CHECK-NOT: .rela.text
 // CHECK: shstrtab

Modified: llvm/trunk/test/MC/ELF/pic-diff.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/pic-diff.s?rev=116777&r1=116776&r2=116777&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/pic-diff.s (original)
+++ llvm/trunk/test/MC/ELF/pic-diff.s Mon Oct 18 19:19:49 2010
@@ -1,21 +1,21 @@
 // RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump  | FileCheck %s
 
-// CHECK:         # Symbol 0x5
-// CHECK-NEXT:    (('st_name', 0x5) # 'baz'
-// CHECK-NEXT:     ('st_bind', 0x1)
-// CHECK-NEXT:     ('st_type', 0x0)
-// CHECK-NEXT:     ('st_other', 0x0)
-// CHECK-NEXT:     ('st_shndx', 0x0)
-// CHECK-NEXT:     ('st_value', 0x0)
-// CHECK-NEXT:     ('st_size', 0x0)
+// CHECK:         # Symbol 5
+// CHECK-NEXT:    (('st_name', 5) # 'baz'
+// CHECK-NEXT:     ('st_bind', 1)
+// CHECK-NEXT:     ('st_type', 0)
+// CHECK-NEXT:     ('st_other', 0)
+// CHECK-NEXT:     ('st_shndx', 0)
+// CHECK-NEXT:     ('st_value', 0)
+// CHECK-NEXT:     ('st_size', 0)
 // CHECK-NEXT:    ),
 
 // CHECK:       ('_relocations', [
-// CHECK-NEXT:    # Relocation 0x0
-// CHECK-NEXT:    (('r_offset', 0xc)
-// CHECK-NEXT:     ('r_sym', 0x5)
-// CHECK-NEXT:     ('r_type', 0x2)
-// CHECK-NEXT:     ('r_addend', 0x8)
+// CHECK-NEXT:    # Relocation 0
+// CHECK-NEXT:    (('r_offset', 12)
+// CHECK-NEXT:     ('r_sym', 5)
+// CHECK-NEXT:     ('r_type', 2)
+// CHECK-NEXT:     ('r_addend', 8)
 // CHECK-NEXT:    ),
 // CHECK-NEXT:   ])
 

Modified: llvm/trunk/test/MC/ELF/plt.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/plt.s?rev=116777&r1=116776&r2=116777&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/plt.s (original)
+++ llvm/trunk/test/MC/ELF/plt.s Mon Oct 18 19:19:49 2010
@@ -5,10 +5,10 @@
 	jmp	foo at PLT
 
 // CHECK:      ('_relocations', [
-// CHECK-NEXT:   # Relocation 0x0
+// CHECK-NEXT:   # Relocation 0
 // CHECK-NEXT:    (('r_offset',
 // CHECK-NEXT:     ('r_sym',
-// CHECK-NEXT:     ('r_type', 0x4)
+// CHECK-NEXT:     ('r_type', 4)
 // CHECK-NEXT:     ('r_addend',
 // CHECK-NEXT:    ),
 // CHECK-NEXT:   ])

Modified: llvm/trunk/test/MC/ELF/relax.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/relax.s?rev=116777&r1=116776&r2=116777&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/relax.s (original)
+++ llvm/trunk/test/MC/ELF/relax.s Mon Oct 18 19:19:49 2010
@@ -12,27 +12,27 @@
         jmp bar
         jmp foo
 
-// CHECK: ('sh_name', 0x1) # '.text'
-// CHECK-NEXT: ('sh_type', 0x1)
-// CHECK-NEXT: ('sh_flags', 0x6)
-// CHECK-NEXT: ('sh_addr', 0x0)
-// CHECK-NEXT: ('sh_offset', 0x40)
-// CHECK-NEXT: ('sh_size', 0x7)
-// CHECK-NEXT: ('sh_link', 0x0)
-// CHECK-NEXT: ('sh_info', 0x0)
-// CHECK-NEXT: ('sh_addralign', 0x4)
-// CHECK-NEXT: ('sh_entsize', 0x0)
+// CHECK: ('sh_name', 1) # '.text'
+// CHECK-NEXT: ('sh_type', 1)
+// CHECK-NEXT: ('sh_flags', 6)
+// CHECK-NEXT: ('sh_addr', 0)
+// CHECK-NEXT: ('sh_offset', 64)
+// CHECK-NEXT: ('sh_size', 7)
+// CHECK-NEXT: ('sh_link', 0)
+// CHECK-NEXT: ('sh_info', 0)
+// CHECK-NEXT: ('sh_addralign', 4)
+// CHECK-NEXT: ('sh_entsize', 0)
 // CHECK-NEXT: ('_section_data', 'ebfee900 000000')
 
-// CHECK:       # Symbol 0x5
-// CHECK-NEXT: (('st_name', 0x5) # 'foo'
+// CHECK:       # Symbol 5
+// CHECK-NEXT: (('st_name', 5) # 'foo'
 
 // CHECK: .rela.text
 // CHECK: ('_relocations', [
-// CHECK-NEXT: Relocation 0x0
-// CHECK-NEXT:  (('r_offset', 0x3)
-// CHECK-NEXT:   ('r_sym', 0x5)
-// CHECK-NEXT:   ('r_type', 0x2)
-// CHECK-NEXT:   ('r_addend', -0x4)
+// CHECK-NEXT: Relocation 0
+// CHECK-NEXT:  (('r_offset', 3)
+// CHECK-NEXT:   ('r_sym', 5)
+// CHECK-NEXT:   ('r_type', 2)
+// CHECK-NEXT:   ('r_addend', -4)
 // CHECK-NEXT:  ),
 // CHECK-NEXT: ])

Modified: llvm/trunk/test/MC/ELF/relocation-386.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/relocation-386.s?rev=116777&r1=116776&r2=116777&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/relocation-386.s (original)
+++ llvm/trunk/test/MC/ELF/relocation-386.s Mon Oct 18 19:19:49 2010
@@ -4,50 +4,50 @@
 // to .Lfoo uses the symbol and not the section.
 
 // Section 3 is bss
-// CHECK:      # Section 0x3
-// CHECK-NEXT: (('sh_name', 0xd) # '.bss'
+// CHECK:      # Section 3
+// CHECK-NEXT: (('sh_name', 13) # '.bss'
 
-// CHECK:      # Symbol 0x1
-// CHECK-NEXT: (('st_name', 0x5) # '.Lfoo'
+// CHECK:      # Symbol 1
+// CHECK-NEXT: (('st_name', 5) # '.Lfoo'
 
 // Symbol 6 is section 3
-// CHECK:      # Symbol 0x6
-// CHECK-NEXT: (('st_name', 0x0) # ''
-// CHECK-NEXT:  ('st_value', 0x0)
-// CHECK-NEXT:  ('st_size', 0x0)
-// CHECK-NEXT:  ('st_bind', 0x0)
-// CHECK-NEXT:  ('st_type', 0x3)
-// CHECK-NEXT:  ('st_other', 0x0)
-// CHECK-NEXT:  ('st_shndx', 0x3)
-
-// CHECK:      # Relocation 0x0
-// CHECK-NEXT: (('r_offset', 0x2)
-// CHECK-NEXT:  ('r_sym', 0x1)
-// CHECK-NEXT:  ('r_type', 0x9)
+// CHECK:      # Symbol 6
+// CHECK-NEXT: (('st_name', 0) # ''
+// CHECK-NEXT:  ('st_value', 0)
+// CHECK-NEXT:  ('st_size', 0)
+// CHECK-NEXT:  ('st_bind', 0)
+// CHECK-NEXT:  ('st_type', 3)
+// CHECK-NEXT:  ('st_other', 0)
+// CHECK-NEXT:  ('st_shndx', 3)
+
+// CHECK:      # Relocation 0
+// CHECK-NEXT: (('r_offset', 2)
+// CHECK-NEXT:  ('r_sym', 1)
+// CHECK-NEXT:  ('r_type', 9)
 // CHECK-NEXT: ),
-// CHECK-NEXT:  # Relocation 0x1
+// CHECK-NEXT:  # Relocation 1
 // CHECK-NEXT: (('r_offset',
 // CHECK-NEXT:  ('r_sym',
-// CHECK-NEXT:  ('r_type', 0x4)
+// CHECK-NEXT:  ('r_type', 4)
 // CHECK-NEXT: ),
-// CHECK-NEXT:  # Relocation 0x2
+// CHECK-NEXT:  # Relocation 2
 // CHECK-NEXT: (('r_offset',
 // CHECK-NEXT:  ('r_sym',
-// CHECK-NEXT:  ('r_type', 0xa)
+// CHECK-NEXT:  ('r_type', 10)
 // CHECK-NEXT: ),
 
 // Relocation 3 (bar3 at GOTOFF) is done with symbol 6 (bss)
-// CHECK-NEXT:  # Relocation 0x3
+// CHECK-NEXT:  # Relocation 3
 // CHECK-NEXT: (('r_offset',
-// CHECK-NEXT:  ('r_sym', 0x6
+// CHECK-NEXT:  ('r_sym', 6
 // CHECK-NEXT:  ('r_type',
 // CHECK-NEXT: ),
 
 // Relocation 4 (bar2 at GOT) is of type R_386_GOT32
-// CHECK-NEXT:  # Relocation 0x4
+// CHECK-NEXT:  # Relocation 4
 // CHECK-NEXT: (('r_offset',
 // CHECK-NEXT:  ('r_sym',
-// CHECK-NEXT:  ('r_type', 0x3
+// CHECK-NEXT:  ('r_type', 3
 // CHECK-NEXT: ),
 
         .text

Modified: llvm/trunk/test/MC/ELF/relocation.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/relocation.s?rev=116777&r1=116776&r2=116777&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/relocation.s (original)
+++ llvm/trunk/test/MC/ELF/relocation.s Mon Oct 18 19:19:49 2010
@@ -10,48 +10,48 @@
         movq	bar, %rdx         // R_X86_64_32S
 .long bar                         // R_X86_64_32
 
-// CHECK:  # Section 0x1
-// CHECK: (('sh_name', 0x1) # '.text'
+// CHECK:  # Section 1
+// CHECK: (('sh_name', 1) # '.text'
 
-// CHECK:   # Symbol 0x2
-// CHECK: (('st_name', 0x0) # ''
-// CHECK:  ('st_bind', 0x0)
-// CHECK   ('st_type', 0x3)
-// CHECK:  ('st_other', 0x0)
-// CHECK:  ('st_shndx', 0x1)
+// CHECK:   # Symbol 2
+// CHECK: (('st_name', 0) # ''
+// CHECK:  ('st_bind', 0)
+// CHECK   ('st_type', 3)
+// CHECK:  ('st_other', 0)
+// CHECK:  ('st_shndx', 1)
 
-// CHECK: # Relocation 0x0
-// CHECK-NEXT:  (('r_offset', 0x1)
-// CHECK-NEXT:   ('r_sym', 0x2)
-// CHECK-NEXT:   ('r_type', 0xa)
+// CHECK: # Relocation 0
+// CHECK-NEXT:  (('r_offset', 1)
+// CHECK-NEXT:   ('r_sym', 2)
+// CHECK-NEXT:   ('r_type', 10)
 // CHECK-NEXT:   ('r_addend',
 
-// CHECK: # Relocation 0x1
-// CHECK-NEXT:  (('r_offset', 0x8)
-// CHECK-NEXT:   ('r_sym', 0x2)
-// CHECK-NEXT:   ('r_type', 0xb)
+// CHECK: # Relocation 1
+// CHECK-NEXT:  (('r_offset', 8)
+// CHECK-NEXT:   ('r_sym', 2)
+// CHECK-NEXT:   ('r_type', 11)
 // CHECK-NEXT:   ('r_addend',
 
-// CHECK: # Relocation 0x2
-// CHECK-NEXT:  (('r_offset', 0x13)
-// CHECK-NEXT:   ('r_sym', 0x2)
-// CHECK-NEXT:   ('r_type', 0xb)
+// CHECK: # Relocation 2
+// CHECK-NEXT:  (('r_offset', 19)
+// CHECK-NEXT:   ('r_sym', 2)
+// CHECK-NEXT:   ('r_type', 11)
 // CHECK-NEXT:   ('r_addend',
 
-// CHECK: # Relocation 0x3
-// CHECK-NEXT:  (('r_offset', 0x1a)
-// CHECK-NEXT:   ('r_sym', 0x2)
-// CHECK-NEXT:   ('r_type', 0xb)
+// CHECK: # Relocation 3
+// CHECK-NEXT:  (('r_offset', 26)
+// CHECK-NEXT:   ('r_sym', 2)
+// CHECK-NEXT:   ('r_type', 11)
 // CHECK-NEXT:   ('r_addend',
 
-// CHECK: # Relocation 0x4
-// CHECK-NEXT:  (('r_offset', 0x22)
-// CHECK-NEXT:   ('r_sym', 0x2)
-// CHECK-NEXT:   ('r_type', 0xb)
+// CHECK: # Relocation 4
+// CHECK-NEXT:  (('r_offset', 34)
+// CHECK-NEXT:   ('r_sym', 2)
+// CHECK-NEXT:   ('r_type', 11)
 // CHECK-NEXT:   ('r_addend',
 
-// CHECK: # Relocation 0x5
-// CHECK-NEXT:  (('r_offset', 0x26)
-// CHECK-NEXT:   ('r_sym', 0x2)
-// CHECK-NEXT:   ('r_type', 0xa)
+// CHECK: # Relocation 5
+// CHECK-NEXT:  (('r_offset', 38)
+// CHECK-NEXT:   ('r_sym', 2)
+// CHECK-NEXT:   ('r_type', 10)
 // CHECK-NEXT:   ('r_addend',

Modified: llvm/trunk/test/MC/ELF/section.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/section.s?rev=116777&r1=116776&r2=116777&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/section.s (original)
+++ llvm/trunk/test/MC/ELF/section.s Mon Oct 18 19:19:49 2010
@@ -6,6 +6,6 @@
 .section	.note.GNU-,"", at progbits
 .section	-.note.GNU,"", at progbits
 
-// CHECK: ('sh_name', 0x12) # '.note.GNU-stack'
-// CHECK: ('sh_name', 0x22) # '.note.GNU-'
-// CHECK: ('sh_name', 0x2d) # '-.note.GNU'
+// CHECK: ('sh_name', 18) # '.note.GNU-stack'
+// CHECK: ('sh_name', 34) # '.note.GNU-'
+// CHECK: ('sh_name', 45) # '-.note.GNU'

Modified: llvm/trunk/test/MC/ELF/size.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/size.s?rev=116777&r1=116776&r2=116777&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/size.s (original)
+++ llvm/trunk/test/MC/ELF/size.s Mon Oct 18 19:19:49 2010
@@ -2,8 +2,8 @@
 
 // Mostly a test that this doesn't crash anymore.
 
-// CHECK:        # Symbol 0x4
-// CHECK-NEXT:    (('st_name', 0x1) # 'foo'
-// CHECK-NEXT:     ('st_bind', 0x1)
+// CHECK:        # Symbol 4
+// CHECK-NEXT:    (('st_name', 1) # 'foo'
+// CHECK-NEXT:     ('st_bind', 1)
 
 	.size	foo, .Lbar-foo

Modified: llvm/trunk/test/MC/ELF/sleb.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/sleb.s?rev=116777&r1=116776&r2=116777&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/sleb.s (original)
+++ llvm/trunk/test/MC/ELF/sleb.s Mon Oct 18 19:19:49 2010
@@ -19,9 +19,9 @@
 
 	.sleb128        8193
 
-// ELF_32: ('sh_name', 0x1) # '.text'
+// ELF_32: ('sh_name', 1) # '.text'
 // ELF_32: ('_section_data', '00017f3f 40c000bf 7fff3f80 4081c000')
-// ELF_64: ('sh_name', 0x1) # '.text'
+// ELF_64: ('sh_name', 1) # '.text'
 // ELF_64: ('_section_data', '00017f3f 40c000bf 7fff3f80 4081c000')
 // MACHO_32: ('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
 // MACHO_32: ('_section_data', '00017f3f 40c000bf 7fff3f80 4081c000')

Modified: llvm/trunk/test/MC/ELF/uleb.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/uleb.s?rev=116777&r1=116776&r2=116777&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/uleb.s (original)
+++ llvm/trunk/test/MC/ELF/uleb.s Mon Oct 18 19:19:49 2010
@@ -12,9 +12,9 @@
 	.uleb128	16383
 	.uleb128	16384
 
-// ELF_32: ('sh_name', 0x1) # '.text'
+// ELF_32: ('sh_name', 1) # '.text'
 // ELF_32: ('_section_data', '00017f80 01ff7f80 8001')
-// ELF_64: ('sh_name', 0x1) # '.text'
+// ELF_64: ('sh_name', 1) # '.text'
 // ELF_64: ('_section_data', '00017f80 01ff7f80 8001')
 // MACHO_32: ('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
 // MACHO_32: ('_section_data', '00017f80 01ff7f80 8001')

Modified: llvm/trunk/test/MC/ELF/undef.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/undef.s?rev=116777&r1=116776&r2=116777&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/undef.s (original)
+++ llvm/trunk/test/MC/ELF/undef.s Mon Oct 18 19:19:49 2010
@@ -19,27 +19,27 @@
         movsd   .Lsym8(%rip), %xmm1
 
 // CHECK:      ('_symbols', [
-// CHECK-NEXT:  # Symbol 0x0
-// CHECK-NEXT:  (('st_name', 0x0) # ''
-// CHECK:       # Symbol 0x1
-// CHECK-NEXT:  (('st_name', 0xd) # '.Lsym8'
-// CHECK:       # Symbol 0x2
-// CHECK-NEXT:  (('st_name', 0x0) # ''
-// CHECK:       # Symbol 0x3
-// CHECK-NEXT:  (('st_name', 0x0) # ''
-// CHECK:       # Symbol 0x4
-// CHECK-NEXT:  (('st_name', 0x0) # ''
-// CHECK:       # Symbol 0x5
-// CHECK-NEXT:  (('st_name', 0x0) # ''
-// CHECK:       # Symbol 0x6
-// CHECK-NEXT:  (('st_name', 0x1) # '.Lsym1'
-// CHECK:       # Symbol 0x7
-// CHECK-NEXT:  (('st_name', 0x8) # 'sym6'
-// CHECK-NEXT:   ('st_bind', 0x1)
-// CHECK-NEXT:   ('st_type', 0x1)
-// CHECK-NEXT:   ('st_other', 0x0)
-// CHECK-NEXT:   ('st_shndx', 0x0)
-// CHECK-NEXT:   ('st_value', 0x0)
-// CHECK-NEXT:   ('st_size', 0x0)
+// CHECK-NEXT:  # Symbol 0
+// CHECK-NEXT:  (('st_name', 0) # ''
+// CHECK:       # Symbol 1
+// CHECK-NEXT:  (('st_name', 13) # '.Lsym8'
+// CHECK:       # Symbol 2
+// CHECK-NEXT:  (('st_name', 0) # ''
+// CHECK:       # Symbol 3
+// CHECK-NEXT:  (('st_name', 0) # ''
+// CHECK:       # Symbol 4
+// CHECK-NEXT:  (('st_name', 0) # ''
+// CHECK:       # Symbol 5
+// CHECK-NEXT:  (('st_name', 0) # ''
+// CHECK:       # Symbol 6
+// CHECK-NEXT:  (('st_name', 1) # '.Lsym1'
+// CHECK:       # Symbol 7
+// CHECK-NEXT:  (('st_name', 8) # 'sym6'
+// CHECK-NEXT:   ('st_bind', 1)
+// CHECK-NEXT:   ('st_type', 1)
+// CHECK-NEXT:   ('st_other', 0)
+// CHECK-NEXT:   ('st_shndx', 0)
+// CHECK-NEXT:   ('st_value', 0)
+// CHECK-NEXT:   ('st_size', 0)
 // CHECK-NEXT:   ),
 // CHECK-NEXT:  ])

Modified: llvm/trunk/test/MC/ELF/undef2.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/undef2.s?rev=116777&r1=116776&r2=116777&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/undef2.s (original)
+++ llvm/trunk/test/MC/ELF/undef2.s Mon Oct 18 19:19:49 2010
@@ -5,6 +5,6 @@
         je	.Lfoo
 
 // CHECK: ('_symbols', [
-// CHECK:      (('st_name', 0x1) # '.Lfoo'
-// CHECK-NEXT:  ('st_bind', 0x1)
-// CHECK: (('sh_name', 0x24) # '.strtab'
+// CHECK:      (('st_name', 1) # '.Lfoo'
+// CHECK-NEXT:  ('st_bind', 1)
+// CHECK: (('sh_name', 36) # '.strtab'

Modified: llvm/trunk/test/MC/ELF/weak.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/weak.s?rev=116777&r1=116776&r2=116777&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/weak.s (original)
+++ llvm/trunk/test/MC/ELF/weak.s Mon Oct 18 19:19:49 2010
@@ -9,22 +9,22 @@
         .weak bar
 bar:
 
-//CHECK:        # Symbol 0x4
-//CHECK-NEXT:   (('st_name', 0x5) # 'bar'
-//CHECK-NEXT:    ('st_bind', 0x2)
-//CHECK-NEXT:    ('st_type', 0x0)
-//CHECK-NEXT:    ('st_other', 0x0)
-//CHECK-NEXT:    ('st_shndx', 0x1)
-//CHECK-NEXT:    ('st_value', 0x0)
-//CHECK-NEXT:    ('st_size', 0x0)
+//CHECK:        # Symbol 4
+//CHECK-NEXT:   (('st_name', 5) # 'bar'
+//CHECK-NEXT:    ('st_bind', 2)
+//CHECK-NEXT:    ('st_type', 0)
+//CHECK-NEXT:    ('st_other', 0)
+//CHECK-NEXT:    ('st_shndx', 1)
+//CHECK-NEXT:    ('st_value', 0)
+//CHECK-NEXT:    ('st_size', 0)
 //CHECK-NEXT:   ),
-//CHECK-NEXT:   # Symbol 0x5
-//CHECK:       (('st_name', 0x1) # 'foo'
-//CHECK-NEXT:   ('st_bind', 0x2)
-//CHECK-NEXT:   ('st_type', 0x0)
-//CHECK-NEXT:   ('st_other', 0x0)
-//CHECK-NEXT:   ('st_shndx', 0x0)
-//CHECK-NEXT:   ('st_value', 0x0)
-//CHECK-NEXT:   ('st_size', 0x0)
+//CHECK-NEXT:   # Symbol 5
+//CHECK:       (('st_name', 1) # 'foo'
+//CHECK-NEXT:   ('st_bind', 2)
+//CHECK-NEXT:   ('st_type', 0)
+//CHECK-NEXT:   ('st_other', 0)
+//CHECK-NEXT:   ('st_shndx', 0)
+//CHECK-NEXT:   ('st_value', 0)
+//CHECK-NEXT:   ('st_size', 0)
 //CHECK-NEXT:  ),
 //CHECK-NEXT: ])

Modified: llvm/trunk/test/MC/ELF/zero.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/zero.s?rev=116777&r1=116776&r2=116777&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/zero.s (original)
+++ llvm/trunk/test/MC/ELF/zero.s Mon Oct 18 19:19:49 2010
@@ -3,14 +3,14 @@
 .zero 4
 .zero 1,42
 
-// CHECK: ('sh_name', 0x1) # '.text'
-// CHECK: ('sh_type', 0x1)
-// CHECK: ('sh_flags', 0x6)
-// CHECK: ('sh_addr', 0x0)
-// CHECK: ('sh_offset', 0x40)
-// CHECK: ('sh_size', 0x5)
-// CHECK: ('sh_link', 0x0)
-// CHECK: ('sh_info', 0x0)
-// CHECK: ('sh_addralign', 0x4)
-// CHECK: ('sh_entsize', 0x0)
+// CHECK: ('sh_name', 1) # '.text'
+// CHECK: ('sh_type', 1)
+// CHECK: ('sh_flags', 6)
+// CHECK: ('sh_addr', 0)
+// CHECK: ('sh_offset', 64)
+// CHECK: ('sh_size', 5)
+// CHECK: ('sh_link', 0)
+// CHECK: ('sh_info', 0)
+// CHECK: ('sh_addralign', 4)
+// CHECK: ('sh_entsize', 0)
 // CHECK: ('_section_data', '00000000 2a')

Modified: llvm/trunk/test/Scripts/elf-dump
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Scripts/elf-dump?rev=116777&r1=116776&r2=116777&view=diff
==============================================================================
--- llvm/trunk/test/Scripts/elf-dump (original)
+++ llvm/trunk/test/Scripts/elf-dump Mon Oct 18 19:19:49 2010
@@ -77,16 +77,16 @@
         self.sh_entsize = f.readWord()
 
     def dump(self, shstrtab, f, strtab, dumpdata):
-        print "  (('sh_name', %s)" % hex(self.sh_name), "# %r" % shstrtab[self.sh_name]
-        print "   ('sh_type', %s)" % hex(self.sh_type)
-        print "   ('sh_flags', %s)" % hex(self.sh_flags)
-        print "   ('sh_addr', %s)" % hex(self.sh_addr)
-        print "   ('sh_offset', %s)" % hex(self.sh_offset)
-        print "   ('sh_size', %s)" % hex(self.sh_size)
-        print "   ('sh_link', %s)" % hex(self.sh_link)
-        print "   ('sh_info', %s)" % hex(self.sh_info)
-        print "   ('sh_addralign', %s)" % hex(self.sh_addralign)
-        print "   ('sh_entsize', %s)" % hex(self.sh_entsize)
+        print "  (('sh_name', %d) # %r" % (self.sh_name, shstrtab[self.sh_name])
+        print "   ('sh_type', %d)" % self.sh_type
+        print "   ('sh_flags', %d)" % self.sh_flags
+        print "   ('sh_addr', %d)" % self.sh_addr
+        print "   ('sh_offset', %d)" % self.sh_offset
+        print "   ('sh_size', %d)" % self.sh_size
+        print "   ('sh_link', %d)" % self.sh_link
+        print "   ('sh_info', %d)" % self.sh_info
+        print "   ('sh_addralign', %d)" % self.sh_addralign
+        print "   ('sh_entsize', %d)" % self.sh_entsize
         if self.sh_type == 2: # SHT_SYMTAB
             print "   ('_symbols', ["
             dumpSymtab(f, self, strtab)
@@ -106,20 +106,20 @@
 
     for index in range(entries):
         f.seek(section.sh_offset + index * section.sh_entsize)
-        print "    # Symbol %s" % hex(index)
+        print "    # Symbol %d" % index
         name = f.read32()
-        print "    (('st_name', %s)" % hex(name), "# %r" % strtab[name]
+        print "    (('st_name', %d) # %r" % (name, strtab[name])
         if not f.is64Bit:
-            print "     ('st_value', %s)" % hex(f.read32())
-            print "     ('st_size', %s)" % hex(f.read32())
+            print "     ('st_value', %d)" % f.read32()
+            print "     ('st_size', %d)" % f.read32()
         st_info = f.read8()
-        print "     ('st_bind', %s)" % hex((st_info >> 4))
-        print "     ('st_type', %s)" % hex((st_info & 0xf))
-        print "     ('st_other', %s)" % hex(f.read8())
-        print "     ('st_shndx', %s)" % hex(f.read16())
+        print "     ('st_bind', %d)" % (st_info >> 4)
+        print "     ('st_type', %d)" % (st_info & 0xf)
+        print "     ('st_other', %d)" % f.read8()
+        print "     ('st_shndx', %d)" % f.read16()
         if f.is64Bit:
-            print "     ('st_value', %s)" % hex(f.read64())
-            print "     ('st_size', %s)" % hex(f.read64())
+            print "     ('st_value', %d)" % f.read64()
+            print "     ('st_size', %d)" % f.read64()
         print "    ),"
 
 def dumpRel(f, section, dumprela = False):
@@ -127,17 +127,17 @@
 
     for index in range(entries):
         f.seek(section.sh_offset + index * section.sh_entsize)
-        print "    # Relocation %s" % hex(index)
-        print "    (('r_offset', %s)" % hex(f.readWord())
+        print "    # Relocation %d" % index
+        print "    (('r_offset', %d)" % f.readWord()
         r_info = f.readWord()
         if f.is64Bit:
-            print "     ('r_sym', %s)" % hex((r_info >> 32))
-            print "     ('r_type', %s)" % hex((r_info & 0xffffffff))
+            print "     ('r_sym', %d)" % (r_info >> 32)
+            print "     ('r_type', %d)" % (r_info & 0xffffffff)
         else:
-            print "     ('r_sym', %s)" % hex((r_info >> 8))
-            print "     ('r_type', %s)" % hex((r_info & 0xff))
+            print "     ('r_sym', %d)" % (r_info >> 8)
+            print "     ('r_type', %d)" % (r_info & 0xff)
         if dumprela:
-            print "     ('r_addend', %s)" % hex(f.readWordS())
+            print "     ('r_addend', %d)" % f.readWordS()
         print "    ),"
 
 def dumpELF(path, opts):
@@ -152,8 +152,8 @@
     elif fileclass == 2: # ELFCLASS64
         f.is64Bit = True
     else:
-        raise ValueError, "Unknown file class %s" % hex(fileclass)
-    print "('e_indent[EI_CLASS]', %s)" % hex(fileclass)
+        raise ValueError, "Unknown file class %d" % fileclass
+    print "('e_indent[EI_CLASS]', %d)" % fileclass
 
     byteordering = f.read8()
     if byteordering == 1: # ELFDATA2LSB
@@ -161,32 +161,32 @@
     elif byteordering == 2: # ELFDATA2MSB
         f.isLSB = False
     else:
-        raise ValueError, "Unknown byte ordering %s" % hex(byteordering)
-    print "('e_indent[EI_DATA]', %s)" % hex(byteordering)
+        raise ValueError, "Unknown byte ordering %d" % byteordering
+    print "('e_indent[EI_DATA]', %d)" % byteordering
 
-    print "('e_indent[EI_VERSION]', %s)" % hex(f.read8())
-    print "('e_indent[EI_OSABI]', %s)" % hex(f.read8())
-    print "('e_indent[EI_ABIVERSION]', %s)" % hex(f.read8())
+    print "('e_indent[EI_VERSION]', %d)" % f.read8()
+    print "('e_indent[EI_OSABI]', %d)" % f.read8()
+    print "('e_indent[EI_ABIVERSION]', %d)" % f.read8()
 
     f.seek(16) # Seek to end of e_ident.
 
-    print "('e_type', %s)" % hex(f.read16())
-    print "('e_machine', %s)" % hex(f.read16())
-    print "('e_version', %s)" % hex(f.read32())
-    print "('e_entry', %s)" % hex(f.readWord())
-    print "('e_phoff', %s)" % hex(f.readWord())
+    print "('e_type', %d)" % f.read16()
+    print "('e_machine', %d)" % f.read16()
+    print "('e_version', %d)" % f.read32()
+    print "('e_entry', %d)" % f.readWord()
+    print "('e_phoff', %d)" % f.readWord()
     e_shoff = f.readWord()
-    print "('e_shoff', %s)" % hex(e_shoff)
-    print "('e_flags', %s)" % hex(f.read32())
-    print "('e_ehsize', %s)" % hex(f.read16())
-    print "('e_phentsize', %s)" % hex(f.read16())
-    print "('e_phnum', %s)" % hex(f.read16())
+    print "('e_shoff', %d)" % e_shoff
+    print "('e_flags', %d)" % f.read32()
+    print "('e_ehsize', %d)" % f.read16()
+    print "('e_phentsize', %d)" % f.read16()
+    print "('e_phnum', %d)" % f.read16()
     e_shentsize = f.read16()
-    print "('e_shentsize', %s)" % hex(e_shentsize)
+    print "('e_shentsize', %d)" % e_shentsize
     e_shnum = f.read16()
-    print "('e_shnum', %s)" % hex(e_shnum)
+    print "('e_shnum', %d)" % e_shnum
     e_shstrndx = f.read16()
-    print "('e_shstrndx', %s)" % hex(e_shstrndx)
+    print "('e_shstrndx', %d)" % e_shstrndx
 
     # Read all section headers
     sections = []
@@ -209,7 +209,7 @@
 
     print "('_sections', ["
     for index in range(e_shnum):
-        print "  # Section %s" % hex(index)
+        print "  # Section %d" % index
         sections[index].dump(shstrtab, f, strtab, opts.dumpSectionData)
     print "])"
 



From wendling at apple.com  Mon Oct 18 19:25:44 2010
From: wendling at apple.com (Bill Wendling)
Date: Mon, 18 Oct 2010 17:25:44 -0700
Subject: [llvm-commits] [llvm] r116766 -
	/llvm/trunk/include/llvm/MC/MCObjectFormat.h
In-Reply-To: <AANLkTin=zzLcAZTvMDU-joFJHLfAoXz_5wW+3gYWBy2y@mail.gmail.com>
References: <20101018231851.791912A6C12C@llvm.org>
	<08E3005E-AD77-4832-BEDA-62DE68A06309@apple.com>
	<AANLkTin=zzLcAZTvMDU-joFJHLfAoXz_5wW+3gYWBy2y@mail.gmail.com>
Message-ID: <58F7424E-8374-4424-BA43-698A7535B2A6@apple.com>


On Oct 18, 2010, at 4:52 PM, Chandler Carruth wrote:

> On Mon, Oct 18, 2010 at 4:47 PM, Bill Wendling <wendling at apple.com> wrote:
> On Oct 18, 2010, at 4:18 PM, Chandler Carruth wrote:
> 
> > Author: chandlerc
> > Date: Mon Oct 18 18:18:51 2010
> > New Revision: 116766
> >
> > URL: http://llvm.org/viewvc/llvm-project?rev=116766&view=rev
> > Log:
> > Add a virtual destructor to silence a GCC warning.
> >
> > Modified:
> >    llvm/trunk/include/llvm/MC/MCObjectFormat.h
> >
> > Modified: llvm/trunk/include/llvm/MC/MCObjectFormat.h
> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCObjectFormat.h?rev=116766&r1=116765&r2=116766&view=diff
> > ==============================================================================
> > --- llvm/trunk/include/llvm/MC/MCObjectFormat.h (original)
> > +++ llvm/trunk/include/llvm/MC/MCObjectFormat.h Mon Oct 18 18:18:51 2010
> > @@ -15,6 +15,8 @@
> >
> > class MCObjectFormat {
> > public:
> > +  virtual ~MCObjectFormat() {}
> > +
> 
> Hi Chandler,
> 
> Should the definition for this go in the MCObjectFormat.cpp file to "anchor" the vtable?
> 
> I wasn't sure. I placed it here as that seemed like the minimal change from the original code (it is an abstract interface afterall). I'm happy to move it to the cpp file if anchoring the vtable (and forcing this call to be out-of-line) is desirable.

As long as it complies with http://llvm.org/docs/CodingStandards.html#ll_virtual_anch it will be okay. :)

-bw

-------------- next part --------------
An HTML attachment was scrubbed...
URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101018/82f7a949/attachment.html 

From gohman at apple.com  Mon Oct 18 19:38:36 2010
From: gohman at apple.com (Dan Gohman)
Date: Mon, 18 Oct 2010 17:38:36 -0700
Subject: [llvm-commits] [PATCH] Add RegionPass framework
In-Reply-To: <4CB5964E.2080407@fim.uni-passau.de>
References: <4CB5964E.2080407@fim.uni-passau.de>
Message-ID: <DCA78969-7917-42F5-B1B6-6A6C99C945D4@apple.com>

On Oct 13, 2010, at 4:21 AM, Tobias Grosser wrote:

> Hi,
> 
> ether and I would like to add a RegionPass framework to LLVM. RegionPasses are like loop passes, except that they are working on Regions provided by the RegionInfo pass instead of Loops provided by the LoopInfo pass.

Hi Tobias,

This looks reasonable to me.

Dan




From chandlerc at gmail.com  Mon Oct 18 19:37:30 2010
From: chandlerc at gmail.com (Chandler Carruth)
Date: Tue, 19 Oct 2010 00:37:30 -0000
Subject: [llvm-commits] [llvm] r116779 - in /llvm/trunk:
 include/llvm/MC/MCObjectFormat.h lib/MC/MCObjectFormat.cpp
Message-ID: <20101019003730.AC2E72A6C12C@llvm.org>

Author: chandlerc
Date: Mon Oct 18 19:37:30 2010
New Revision: 116779

URL: http://llvm.org/viewvc/llvm-project?rev=116779&view=rev
Log:
Move the definition of this to the source file to anchor the vtable.

Modified:
    llvm/trunk/include/llvm/MC/MCObjectFormat.h
    llvm/trunk/lib/MC/MCObjectFormat.cpp

Modified: llvm/trunk/include/llvm/MC/MCObjectFormat.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCObjectFormat.h?rev=116779&r1=116778&r2=116779&view=diff
==============================================================================
--- llvm/trunk/include/llvm/MC/MCObjectFormat.h (original)
+++ llvm/trunk/include/llvm/MC/MCObjectFormat.h Mon Oct 18 19:37:30 2010
@@ -15,7 +15,7 @@
 
 class MCObjectFormat {
 public:
-  virtual ~MCObjectFormat() {}
+  virtual ~MCObjectFormat();
 
   /// isAbsolute - Check if A - B is an absolute value
   ///

Modified: llvm/trunk/lib/MC/MCObjectFormat.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCObjectFormat.cpp?rev=116779&r1=116778&r2=116779&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCObjectFormat.cpp (original)
+++ llvm/trunk/lib/MC/MCObjectFormat.cpp Mon Oct 18 19:37:30 2010
@@ -12,6 +12,9 @@
 
 using namespace llvm;
 
+MCObjectFormat::~MCObjectFormat() {
+}
+
 bool MCELFObjectFormat::isAbsolute(bool IsSet, const MCSymbol &A,
                                    const MCSymbol &B) const {
   // On ELF A - B is absolute if A and B are in the same section.



From chandlerc at gmail.com  Mon Oct 18 19:39:33 2010
From: chandlerc at gmail.com (Chandler Carruth)
Date: Mon, 18 Oct 2010 17:39:33 -0700
Subject: [llvm-commits] [llvm] r116766 -
	/llvm/trunk/include/llvm/MC/MCObjectFormat.h
In-Reply-To: <58F7424E-8374-4424-BA43-698A7535B2A6@apple.com>
References: <20101018231851.791912A6C12C@llvm.org>
	<08E3005E-AD77-4832-BEDA-62DE68A06309@apple.com>
	<AANLkTin=zzLcAZTvMDU-joFJHLfAoXz_5wW+3gYWBy2y@mail.gmail.com>
	<58F7424E-8374-4424-BA43-698A7535B2A6@apple.com>
Message-ID: <AANLkTimwub3PjcCMsjbwBTrh2sjC+kevuLnGeF5AtSwb@mail.gmail.com>

On Mon, Oct 18, 2010 at 5:25 PM, Bill Wendling <wendling at apple.com> wrote:

>
> On Oct 18, 2010, at 4:52 PM, Chandler Carruth wrote:
>
> On Mon, Oct 18, 2010 at 4:47 PM, Bill Wendling <wendling at apple.com> wrote:
>
>> On Oct 18, 2010, at 4:18 PM, Chandler Carruth wrote:
>>
>> > Author: chandlerc
>> > Date: Mon Oct 18 18:18:51 2010
>> > New Revision: 116766
>> >
>> > URL: http://llvm.org/viewvc/llvm-project?rev=116766&view=rev
>> > Log:
>> > Add a virtual destructor to silence a GCC warning.
>> >
>> > Modified:
>> >    llvm/trunk/include/llvm/MC/MCObjectFormat.h
>> >
>> > Modified: llvm/trunk/include/llvm/MC/MCObjectFormat.h
>> > URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCObjectFormat.h?rev=116766&r1=116765&r2=116766&view=diff
>> >
>> ==============================================================================
>> > --- llvm/trunk/include/llvm/MC/MCObjectFormat.h (original)
>> > +++ llvm/trunk/include/llvm/MC/MCObjectFormat.h Mon Oct 18 18:18:51 2010
>> > @@ -15,6 +15,8 @@
>> >
>> > class MCObjectFormat {
>> > public:
>> > +  virtual ~MCObjectFormat() {}
>> > +
>>
>> Hi Chandler,
>>
>> Should the definition for this go in the MCObjectFormat.cpp file to
>> "anchor" the vtable?
>>
>
> I wasn't sure. I placed it here as that seemed like the minimal change from
> the original code (it is an abstract interface afterall). I'm happy to move
> it to the cpp file if anchoring the vtable (and forcing this call to be
> out-of-line) is desirable.
>
>
> As long as it complies with
> http://llvm.org/docs/CodingStandards.html#ll_virtual_anch it will be okay.
> :)
>

Hadn't realized we had a formal policy on it, thanks. Fixed in r116779.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101018/84b9bb3e/attachment.html 

From evan.cheng at apple.com  Mon Oct 18 19:55:07 2010
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 19 Oct 2010 00:55:07 -0000
Subject: [llvm-commits] [llvm] r116781 - in /llvm/trunk:
 include/llvm/Target/TargetInstrInfo.h lib/CodeGen/MachineLICM.cpp
 lib/Target/ARM/ARMBaseInstrInfo.cpp lib/Target/ARM/ARMBaseInstrInfo.h
 lib/Target/X86/X86InstrInfo.cpp lib/Target/X86/X86InstrInfo.h
 test/CodeGen/ARM/remat.ll test/CodeGen/Thumb2/machine-licm-vdup.ll
 test/CodeGen/X86/2008-10-27-CoalescerBug.ll
 test/CodeGen/X86/2009-02-26-MachineLICMBug.ll
Message-ID: <20101019005507.606E42A6C12C@llvm.org>

Author: evancheng
Date: Mon Oct 18 19:55:07 2010
New Revision: 116781

URL: http://llvm.org/viewvc/llvm-project?rev=116781&view=rev
Log:
- Add a hook for target to determine whether an instruction def is
  "long latency" enough to hoist even if it may increase spilling. Reloading
  a value from spill slot is often cheaper than performing an expensive
  computation in the loop. For X86, that means machine LICM will hoist
  SQRT, DIV, etc. ARM will be somewhat aggressive with VFP and NEON
  instructions.
- Enable register pressure aware machine LICM by default.

Removed:
    llvm/trunk/test/CodeGen/ARM/remat.ll
Modified:
    llvm/trunk/include/llvm/Target/TargetInstrInfo.h
    llvm/trunk/lib/CodeGen/MachineLICM.cpp
    llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
    llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h
    llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
    llvm/trunk/lib/Target/X86/X86InstrInfo.h
    llvm/trunk/test/CodeGen/Thumb2/machine-licm-vdup.ll
    llvm/trunk/test/CodeGen/X86/2008-10-27-CoalescerBug.ll
    llvm/trunk/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll

Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=116781&r1=116780&r2=116781&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Mon Oct 18 19:55:07 2010
@@ -24,6 +24,7 @@
 class LiveVariables;
 class MCAsmInfo;
 class MachineMemOperand;
+class MachineRegisterInfo;
 class MDNode;
 class MCInst;
 class SDNode;
@@ -625,6 +626,19 @@
   int getOperandLatency(const InstrItineraryData *ItinData,
                         SDNode *DefNode, unsigned DefIdx,
                         SDNode *UseNode, unsigned UseIdx) const;
+
+  /// hasHighOperandLatency - Compute operand latency between a def of 'Reg'
+  /// and an use in the current loop, return true if the target considered
+  /// it 'high'. This is used by optimization passes such as machine LICM to
+  /// determine whether it makes sense to hoist an instruction out even in
+  /// high register pressure situation.
+  virtual
+  bool hasHighOperandLatency(const InstrItineraryData *ItinData,
+                             const MachineRegisterInfo *MRI,
+                             const MachineInstr *DefMI, unsigned DefIdx,
+                             const MachineInstr *UseMI, unsigned UseIdx) const {
+    return false;
+  }
 };
 
 /// TargetInstrInfoImpl - This is the default implementation of

Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=116781&r1=116780&r2=116781&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Mon Oct 18 19:55:07 2010
@@ -43,11 +43,6 @@
 
 using namespace llvm;
 
-static cl::opt<bool>
-TrackRegPressure("rp-aware-machine-licm",
-                 cl::desc("Register pressure aware machine LICM"),
-                 cl::init(false), cl::Hidden);
-
 STATISTIC(NumHoisted,
           "Number of machine instructions hoisted out of loops");
 STATISTIC(NumLowRP,
@@ -124,6 +119,7 @@
       RegSeen.clear();
       RegPressure.clear();
       RegLimit.clear();
+      BackTrace.clear();
       for (DenseMap<unsigned,std::vector<const MachineInstr*> >::iterator
              CI = CSEMap.begin(), CE = CSEMap.end(); CI != CE; ++CI)
         CI->second.clear();
@@ -171,9 +167,10 @@
     /// 
     bool IsLoopInvariantInst(MachineInstr &I);
 
-    /// ComputeOperandLatency - Compute operand latency between a def of 'Reg'
-    /// and an use in the current loop.
-    int ComputeOperandLatency(MachineInstr &MI, unsigned DefIdx, unsigned Reg);
+    /// HasHighOperandLatency - Compute operand latency between a def of 'Reg'
+    /// and an use in the current loop, return true if the target considered
+    /// it 'high'.
+    bool HasHighOperandLatency(MachineInstr &MI, unsigned DefIdx, unsigned Reg);
 
     /// IncreaseHighRegPressure - Visit BBs from preheader to current BB, check
     /// if hoisting an instruction of the given cost matrix can cause high
@@ -556,28 +553,24 @@
   if (!Preheader)
     return;
 
-  if (TrackRegPressure) {
-    if (IsHeader) {
-      // Compute registers which are liveout of preheader.
-      RegSeen.clear();
-      BackTrace.clear();
-      InitRegPressure(Preheader);
-    }
-
-    // Remember livein register pressure.
-    BackTrace.push_back(RegPressure);
+  if (IsHeader) {
+    // Compute registers which are liveout of preheader.
+    RegSeen.clear();
+    BackTrace.clear();
+    InitRegPressure(Preheader);
   }
 
+  // Remember livein register pressure.
+  BackTrace.push_back(RegPressure);
+
   for (MachineBasicBlock::iterator
          MII = BB->begin(), E = BB->end(); MII != E; ) {
     MachineBasicBlock::iterator NextMII = MII; ++NextMII;
     MachineInstr *MI = &*MII;
 
-    if (TrackRegPressure)
-      UpdateRegPressureBefore(MI);
+    UpdateRegPressureBefore(MI);
     Hoist(MI, Preheader);
-    if (TrackRegPressure)
-      UpdateRegPressureAfter(MI);
+    UpdateRegPressureAfter(MI);
 
     MII = NextMII;
   }
@@ -591,8 +584,7 @@
       HoistRegion(Children[I]);
   }
 
-  if (TrackRegPressure)
-    BackTrace.pop_back();
+  BackTrace.pop_back();
 }
 
 /// InitRegPressure - Find all virtual register references that are liveout of
@@ -788,15 +780,14 @@
   }
 }
 
-/// ComputeOperandLatency - Compute operand latency between a def of 'Reg'
-/// and an use in the current loop.
-int MachineLICM::ComputeOperandLatency(MachineInstr &MI,
-                                       unsigned DefIdx, unsigned Reg) {
+/// HasHighOperandLatency - Compute operand latency between a def of 'Reg'
+/// and an use in the current loop, return true if the target considered
+/// it 'high'.
+bool MachineLICM::HasHighOperandLatency(MachineInstr &MI,
+                                        unsigned DefIdx, unsigned Reg) {
   if (MRI->use_nodbg_empty(Reg))
-    // No use? Return arbitrary large number!
-    return 300;
+    return false;
 
-  int Latency = -1;
   for (MachineRegisterInfo::use_nodbg_iterator I = MRI->use_nodbg_begin(Reg),
          E = MRI->use_nodbg_end(); I != E; ++I) {
     MachineInstr *UseMI = &*I;
@@ -810,18 +801,15 @@
       if (MOReg != Reg)
         continue;
 
-      int UseCycle = TII->getOperandLatency(InstrItins, &MI, DefIdx, UseMI, i);
-      Latency = std::max(Latency, UseCycle);
+      if (TII->hasHighOperandLatency(InstrItins, MRI, &MI, DefIdx, UseMI, i))
+        return true;
     }
 
-    if (Latency != -1)
-      break;
+    // Only look at the first in loop use.
+    break;
   }
 
-  if (Latency == -1)
-    Latency = InstrItins->getOperandCycle(MI.getDesc().getSchedClass(), DefIdx);
-
-  return Latency;
+  return false;
 }
 
 /// IncreaseHighRegPressure - Visit BBs from preheader to current BB, check
@@ -855,19 +843,19 @@
   if (MI.isImplicitDef())
     return true;
 
-  // FIXME: For now, only hoist re-materilizable instructions. LICM will
-  // increase register pressure. We want to make sure it doesn't increase
-  // spilling.
+  // If the instruction is cheap, only hoist if it is re-materilizable. LICM
+  // will increase register pressure. It's probably not worth it if the
+  // instruction is cheap.
   // Also hoist loads from constant memory, e.g. load from stubs, GOT. Hoisting
   // these tend to help performance in low register pressure situation. The
   // trade off is it may cause spill in high pressure situation. It will end up
   // adding a store in the loop preheader. But the reload is no more expensive.
   // The side benefit is these loads are frequently CSE'ed.
-  if (!TrackRegPressure || MI.getDesc().isAsCheapAsAMove()) {
-    if (!TII->isTriviallyReMaterializable(&MI, AA) &&
-        !isLoadFromConstantMemory(&MI))
+  if (MI.getDesc().isAsCheapAsAMove()) {
+    if (!TII->isTriviallyReMaterializable(&MI, AA))
       return false;
   } else {
+    // Estimate register pressure to determine whether to LICM the instruction.
     // In low register pressure situation, we can be more aggressive about 
     // hoisting. Also, favors hoisting long latency instructions even in
     // moderately high pressure situation.
@@ -880,13 +868,9 @@
       if (!Reg || TargetRegisterInfo::isPhysicalRegister(Reg))
         continue;
       if (MO.isDef()) {
-        if (InstrItins && !InstrItins->isEmpty()) {
-          int Cycle = ComputeOperandLatency(MI, i, Reg);
-          if (Cycle > 3) {
-            // FIXME: Target specific high latency limit?
-            ++NumHighLatency;
-            return true;
-          }
+        if (HasHighOperandLatency(MI, i, Reg)) {
+          ++NumHighLatency;
+          return true;
         }
 
         const TargetRegisterClass *RC = MRI->getRegClass(Reg);

Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=116781&r1=116780&r2=116781&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Mon Oct 18 19:55:07 2010
@@ -1925,3 +1925,23 @@
   return getOperandLatency(ItinData, DefTID, DefIdx, DefAlign,
                            UseTID, UseIdx, UseAlign);
 }
+
+bool ARMBaseInstrInfo::
+hasHighOperandLatency(const InstrItineraryData *ItinData,
+                      const MachineRegisterInfo *MRI,
+                      const MachineInstr *DefMI, unsigned DefIdx,
+                      const MachineInstr *UseMI, unsigned UseIdx) const {
+  unsigned DDomain = DefMI->getDesc().TSFlags & ARMII::DomainMask;
+  unsigned UDomain = UseMI->getDesc().TSFlags & ARMII::DomainMask;
+  if (Subtarget.isCortexA8() &&
+      (DDomain == ARMII::DomainVFP || UDomain == ARMII::DomainVFP))
+    // CortexA8 VFP instructions are not pipelined.
+    return true;
+
+  // Hoist VFP / NEON instructions with 4 or higher latency.
+  int Latency = getOperandLatency(ItinData, DefMI, DefIdx, UseMI, UseIdx);
+  if (Latency <= 3)
+    return false;
+  return DDomain == ARMII::DomainVFP || DDomain == ARMII::DomainNEON ||
+         UDomain == ARMII::DomainVFP || UDomain == ARMII::DomainNEON;
+}

Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h?rev=116781&r1=116780&r2=116781&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h Mon Oct 18 19:55:07 2010
@@ -377,6 +377,11 @@
                         unsigned DefIdx, unsigned DefAlign,
                         const TargetInstrDesc &UseTID,
                         unsigned UseIdx, unsigned UseAlign) const;
+
+  bool hasHighOperandLatency(const InstrItineraryData *ItinData,
+                             const MachineRegisterInfo *MRI,
+                             const MachineInstr *DefMI, unsigned DefIdx,
+                             const MachineInstr *UseMI, unsigned UseIdx) const;
 };
 
 static inline

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=116781&r1=116780&r2=116781&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Mon Oct 18 19:55:07 2010
@@ -3152,6 +3152,41 @@
   NopInst.setOpcode(X86::NOOP);
 }
 
+bool X86InstrInfo::
+hasHighOperandLatency(const InstrItineraryData *ItinData,
+                      const MachineRegisterInfo *MRI,
+                      const MachineInstr *DefMI, unsigned DefIdx,
+                      const MachineInstr *UseMI, unsigned UseIdx) const {
+  switch (DefMI->getOpcode()) {
+  default: return false;
+  case X86::DIVSDrm:
+  case X86::DIVSDrm_Int:
+  case X86::DIVSDrr:
+  case X86::DIVSDrr_Int:
+  case X86::DIVSSrm:
+  case X86::DIVSSrm_Int:
+  case X86::DIVSSrr:
+  case X86::DIVSSrr_Int:
+  case X86::SQRTPDm:
+  case X86::SQRTPDm_Int:
+  case X86::SQRTPDr:
+  case X86::SQRTPDr_Int:
+  case X86::SQRTPSm:
+  case X86::SQRTPSm_Int:
+  case X86::SQRTPSr:
+  case X86::SQRTPSr_Int:
+  case X86::SQRTSDm:
+  case X86::SQRTSDm_Int:
+  case X86::SQRTSDr:
+  case X86::SQRTSDr_Int:
+  case X86::SQRTSSm:
+  case X86::SQRTSSm_Int:
+  case X86::SQRTSSr:
+  case X86::SQRTSSr_Int:
+    return true;
+  }
+}
+
 namespace {
   /// CGBR - Create Global Base Reg pass. This initializes the PIC
   /// global base register for x86-32.

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.h?rev=116781&r1=116780&r2=116781&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.h (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.h Mon Oct 18 19:55:07 2010
@@ -864,6 +864,11 @@
                                       unsigned OpNum,
                                       const SmallVectorImpl<MachineOperand> &MOs,
                                       unsigned Size, unsigned Alignment) const;
+
+  bool hasHighOperandLatency(const InstrItineraryData *ItinData,
+                             const MachineRegisterInfo *MRI,
+                             const MachineInstr *DefMI, unsigned DefIdx,
+                             const MachineInstr *UseMI, unsigned UseIdx) const;
   
 private:
   MachineInstr * convertToThreeAddressWithLEA(unsigned MIOpc,

Removed: llvm/trunk/test/CodeGen/ARM/remat.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/remat.ll?rev=116780&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/remat.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/remat.ll (removed)
@@ -1,65 +0,0 @@
-; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 -o /dev/null -stats -info-output-file - | grep "Number of re-materialization"
-
-define i32 @main(i32 %argc, i8** nocapture %argv, double %d1, double %d2) nounwind {
-entry:
-  br i1 undef, label %smvp.exit, label %bb.i3
-
-bb.i3:                                            ; preds = %bb.i3, %bb134
-  br i1 undef, label %smvp.exit, label %bb.i3
-
-smvp.exit:                                        ; preds = %bb.i3
-  %0 = fmul double %d1, 2.400000e-03            ; <double> [#uses=2]
-  br i1 undef, label %bb138.preheader, label %bb159
-
-bb138.preheader:                                  ; preds = %smvp.exit
-  br label %bb138
-
-bb138:                                            ; preds = %bb138, %bb138.preheader
-  br i1 undef, label %bb138, label %bb145.loopexit
-
-bb142:                                            ; preds = %bb.nph218.bb.nph218.split_crit_edge, %phi0.exit
-  %1 = fmul double %d1, -1.200000e-03           ; <double> [#uses=1]
-  %2 = fadd double %d2, %1                      ; <double> [#uses=1]
-  %3 = fmul double %2, %d2                      ; <double> [#uses=1]
-  %4 = fsub double 0.000000e+00, %3               ; <double> [#uses=1]
-  br i1 %14, label %phi1.exit, label %bb.i35
-
-bb.i35:                                           ; preds = %bb142
-  %5 = call  double @sin(double %15) nounwind readonly ; <double> [#uses=1]
-  %6 = fmul double %5, 0x4031740AFA84AD8A         ; <double> [#uses=1]
-  %7 = fsub double 1.000000e+00, undef            ; <double> [#uses=1]
-  %8 = fdiv double %7, 6.000000e-01               ; <double> [#uses=1]
-  br label %phi1.exit
-
-phi1.exit:                                        ; preds = %bb.i35, %bb142
-  %.pn = phi double [ %6, %bb.i35 ], [ 0.000000e+00, %bb142 ] ; <double> [#uses=1]
-  %9 = phi double [ %8, %bb.i35 ], [ 0.000000e+00, %bb142 ] ; <double> [#uses=1]
-  %10 = fmul double %.pn, %9                      ; <double> [#uses=1]
-  br i1 %14, label %phi0.exit, label %bb.i
-
-bb.i:                                             ; preds = %phi1.exit
-  unreachable
-
-phi0.exit:                                        ; preds = %phi1.exit
-  %11 = fsub double %4, %10                       ; <double> [#uses=1]
-  %12 = fadd double 0.000000e+00, %11             ; <double> [#uses=1]
-  store double %12, double* undef, align 4
-  br label %bb142
-
-bb145.loopexit:                                   ; preds = %bb138
-  br i1 undef, label %bb.nph218.bb.nph218.split_crit_edge, label %bb159
-
-bb.nph218.bb.nph218.split_crit_edge:              ; preds = %bb145.loopexit
-  %13 = fmul double %0, 0x401921FB54442D18        ; <double> [#uses=1]
-  %14 = fcmp ugt double %0, 6.000000e-01          ; <i1> [#uses=2]
-  %15 = fdiv double %13, 6.000000e-01             ; <double> [#uses=1]
-  br label %bb142
-
-bb159:                                            ; preds = %bb145.loopexit, %smvp.exit, %bb134
-  unreachable
-
-bb166:                                            ; preds = %bb127
-  unreachable
-}
-
-declare double @sin(double) nounwind readonly

Modified: llvm/trunk/test/CodeGen/Thumb2/machine-licm-vdup.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/machine-licm-vdup.ll?rev=116781&r1=116780&r2=116781&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/machine-licm-vdup.ll (original)
+++ llvm/trunk/test/CodeGen/Thumb2/machine-licm-vdup.ll Mon Oct 18 19:55:07 2010
@@ -2,17 +2,16 @@
 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -relocation-model=pic -disable-fp-elim -arm-vdup-splat | FileCheck %s 
 ; Modified version of machine-licm.ll with -arm-vdup-splat turned on, 8003375.
 ; Eventually this should become the default and be moved into machine-licm.ll.
-; FIXME: the vdup should be hoisted out of the loop, 8248029.
 
 define void @t2(i8* %ptr1, i8* %ptr2) nounwind {
 entry:
 ; CHECK: t2:
 ; CHECK: mov.w r3, #1065353216
+; CHECK: vdup.32 q{{.*}}, r3
   br i1 undef, label %bb1, label %bb2
 
 bb1:
 ; CHECK-NEXT: %bb1
-; CHECK: vdup.32 q{{.*}}, r3
   %indvar = phi i32 [ %indvar.next, %bb1 ], [ 0, %entry ]
   %tmp1 = shl i32 %indvar, 2
   %gep1 = getelementptr i8* %ptr1, i32 %tmp1

Modified: llvm/trunk/test/CodeGen/X86/2008-10-27-CoalescerBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-10-27-CoalescerBug.ll?rev=116781&r1=116780&r2=116781&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-10-27-CoalescerBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-10-27-CoalescerBug.ll Mon Oct 18 19:55:07 2010
@@ -1,6 +1,9 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 -stats |& not grep {Number of register spills}
+; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -stats |& FileCheck %s
+; Now this test spills one register. But a reload in the loop is cheaper than
+; the divsd so it's a win.
 
 define fastcc void @fourn(double* %data, i32 %isign) nounwind {
+; CHECK: fourn
 entry:
 	br label %bb
 
@@ -11,6 +14,11 @@
 	%1 = icmp sgt i32 %0, 2		; <i1> [#uses=1]
 	br i1 %1, label %bb30.loopexit, label %bb
 
+; CHECK: %bb30.loopexit
+; CHECK: divsd %xmm0
+; CHECK: movsd %xmm0, 16(%esp)
+; CHECK: .align
+; CHECK-NEXT: %bb3
 bb3:		; preds = %bb30.loopexit, %bb25, %bb3
 	%2 = load i32* null, align 4		; <i32> [#uses=1]
 	%3 = mul i32 %2, 0		; <i32> [#uses=1]

Modified: llvm/trunk/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll?rev=116781&r1=116780&r2=116781&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll Mon Oct 18 19:55:07 2010
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse41 -stats |& grep {6 machine-licm}
+; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse41 -stats |& grep {7 machine-licm}
 ; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse41 | FileCheck %s
 ; rdar://6627786
 ; rdar://7792037



From geek4civic at gmail.com  Mon Oct 18 20:21:55 2010
From: geek4civic at gmail.com (NAKAMURA Takumi)
Date: Tue, 19 Oct 2010 01:21:55 -0000
Subject: [llvm-commits] [llvm] r116784 -
	/llvm/trunk/lib/Support/raw_ostream.cpp
Message-ID: <20101019012155.610742A6C12C@llvm.org>

Author: chapuni
Date: Mon Oct 18 20:21:55 2010
New Revision: 116784

URL: http://llvm.org/viewvc/llvm-project?rev=116784&view=rev
Log:
lib/Support/raw_ostream.cpp: Fix Cygwin's build.

setmode is provided by io.h on Cygwin.

Modified:
    llvm/trunk/lib/Support/raw_ostream.cpp

Modified: llvm/trunk/lib/Support/raw_ostream.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/raw_ostream.cpp?rev=116784&r1=116783&r2=116784&view=diff
==============================================================================
--- llvm/trunk/lib/Support/raw_ostream.cpp (original)
+++ llvm/trunk/lib/Support/raw_ostream.cpp Mon Oct 18 20:21:55 2010
@@ -32,6 +32,10 @@
 # include <fcntl.h>
 #endif
 
+#if defined(__CYGWIN__)
+#include <io.h>
+#endif
+
 #if defined(_MSC_VER)
 #include <io.h>
 #include <fcntl.h>



From geek4civic at gmail.com  Mon Oct 18 20:22:02 2010
From: geek4civic at gmail.com (NAKAMURA Takumi)
Date: Tue, 19 Oct 2010 01:22:02 -0000
Subject: [llvm-commits] [llvm] r116785 -
	/llvm/trunk/lib/System/Win32/ThreadLocal.inc
Message-ID: <20101019012202.27CB12A6C12C@llvm.org>

Author: chapuni
Date: Mon Oct 18 20:22:01 2010
New Revision: 116785

URL: http://llvm.org/viewvc/llvm-project?rev=116785&view=rev
Log:
lib/System/Win32/ThreadLocal.inc: Suppress "unused" warning on -Asserts.

Modified:
    llvm/trunk/lib/System/Win32/ThreadLocal.inc

Modified: llvm/trunk/lib/System/Win32/ThreadLocal.inc
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Win32/ThreadLocal.inc?rev=116785&r1=116784&r2=116785&view=diff
==============================================================================
--- llvm/trunk/lib/System/Win32/ThreadLocal.inc (original)
+++ llvm/trunk/lib/System/Win32/ThreadLocal.inc Mon Oct 18 20:22:01 2010
@@ -44,6 +44,7 @@
   DWORD* tls = static_cast<DWORD*>(data);
   int errorcode = TlsSetValue(*tls, const_cast<void*>(d));
   assert(errorcode != 0);
+  (void)errorcode;
 }
 
 void ThreadLocalImpl::removeInstance() {



From rafael.espindola at gmail.com  Mon Oct 18 21:02:57 2010
From: rafael.espindola at gmail.com (Rafael Espindola)
Date: Tue, 19 Oct 2010 02:02:57 -0000
Subject: [llvm-commits] [llvm] r116788 - in /llvm/trunk:
 lib/Linker/LinkModules.cpp test/Linker/PR8300.ll
Message-ID: <20101019020257.BB5AA2A6C12C@llvm.org>

Author: rafael
Date: Mon Oct 18 21:02:57 2010
New Revision: 116788

URL: http://llvm.org/viewvc/llvm-project?rev=116788&view=rev
Log:
Fix PR8300 by remembering to keep the bitcast in all cases.

Added:
    llvm/trunk/test/Linker/PR8300.ll
Modified:
    llvm/trunk/lib/Linker/LinkModules.cpp

Modified: llvm/trunk/lib/Linker/LinkModules.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Linker/LinkModules.cpp?rev=116788&r1=116787&r2=116788&view=diff
==============================================================================
--- llvm/trunk/lib/Linker/LinkModules.cpp (original)
+++ llvm/trunk/lib/Linker/LinkModules.cpp Mon Oct 18 21:02:57 2010
@@ -668,6 +668,13 @@
     GlobalValue* DAliasee = cast<GlobalValue>(VMI->second);
     GlobalValue* DGV = NULL;
 
+    // Fixup aliases to bitcasts.  Note that aliases to GEPs are still broken
+    // by this, but aliases to GEPs are broken to a lot of other things, so
+    // it's less important.
+    Constant *DAliaseeConst = DAliasee;
+    if (SGA->getType() != DAliasee->getType())
+      DAliaseeConst = ConstantExpr::getBitCast(DAliasee, SGA->getType());
+
     // Try to find something 'similar' to SGA in destination module.
     if (!DGV && !SGA->hasLocalLinkage()) {
       DGV = Dest->getNamedAlias(SGA->getName());
@@ -721,7 +728,7 @@
                        "': aliasee is not global variable");
 
         NewGA = new GlobalAlias(SGA->getType(), SGA->getLinkage(),
-                                SGA->getName(), DAliasee, Dest);
+                                SGA->getName(), DAliaseeConst, Dest);
         CopyGVAttributes(NewGA, SGA);
 
         // Any uses of DGV need to change to NewGA, with cast, if needed.
@@ -750,7 +757,7 @@
                        "': aliasee is not function");
 
         NewGA = new GlobalAlias(SGA->getType(), SGA->getLinkage(),
-                                SGA->getName(), DAliasee, Dest);
+                                SGA->getName(), DAliaseeConst, Dest);
         CopyGVAttributes(NewGA, SGA);
 
         // Any uses of DF need to change to NewGA, with cast, if needed.
@@ -772,14 +779,8 @@
     } else {
       // No linking to be performed, simply create an identical version of the
       // alias over in the dest module...
-      Constant *Aliasee = DAliasee;
-      // Fixup aliases to bitcasts.  Note that aliases to GEPs are still broken
-      // by this, but aliases to GEPs are broken to a lot of other things, so
-      // it's less important.
-      if (SGA->getType() != DAliasee->getType())
-        Aliasee = ConstantExpr::getBitCast(DAliasee, SGA->getType());
       NewGA = new GlobalAlias(SGA->getType(), SGA->getLinkage(),
-                              SGA->getName(), Aliasee, Dest);
+                              SGA->getName(), DAliaseeConst, Dest);
       CopyGVAttributes(NewGA, SGA);
 
       // Proceed to 'common' steps

Added: llvm/trunk/test/Linker/PR8300.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Linker/PR8300.ll?rev=116788&view=auto
==============================================================================
--- llvm/trunk/test/Linker/PR8300.ll (added)
+++ llvm/trunk/test/Linker/PR8300.ll Mon Oct 18 21:02:57 2010
@@ -0,0 +1,13 @@
+; RUN: echo {%foo2 = type \{ \[8 x i8\] \} \
+; RUN:       declare void @zed(%foo2*) } > %t.ll
+; RUN: llvm-link %t.ll %s -o %t.bc
+
+%foo = type { [8 x i8] }
+%bar = type { [9 x i8] }
+
+ at zed = alias bitcast (void (%bar*)* @xyz to void (%foo*)*)
+
+define void @xyz(%bar* %this) {
+entry:
+  ret void
+}



From atrick at apple.com  Mon Oct 18 21:50:50 2010
From: atrick at apple.com (Andrew Trick)
Date: Tue, 19 Oct 2010 02:50:50 -0000
Subject: [llvm-commits] [llvm] r116790 -
	/llvm/trunk/lib/CodeGen/MachineLICM.cpp
Message-ID: <20101019025050.67F922A6C12C@llvm.org>

Author: atrick
Date: Mon Oct 18 21:50:50 2010
New Revision: 116790

URL: http://llvm.org/viewvc/llvm-project?rev=116790&view=rev
Log:
Fix for machine licm assert: RCCost <= RegPressure[RCId]
in MultiSource/Benchmarks/VersaBench/beamformer/beamformer.
SmallSet.insert returns true if the element is inserted.

Modified:
    llvm/trunk/lib/CodeGen/MachineLICM.cpp

Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=116790&r1=116789&r2=116790&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Mon Oct 18 21:50:50 2010
@@ -604,7 +604,7 @@
       if (!Reg || TargetRegisterInfo::isPhysicalRegister(Reg))
         continue;
 
-      bool isNew = !RegSeen.insert(Reg);
+      bool isNew = RegSeen.insert(Reg);
       const TargetRegisterClass *RC = MRI->getRegClass(Reg);
       EVT VT = *RC->vt_begin();
       unsigned RCId = TLI->getRepRegClassFor(VT)->getID();
@@ -634,7 +634,7 @@
     if (!Reg || TargetRegisterInfo::isPhysicalRegister(Reg))
       continue;
 
-    bool isNew = !RegSeen.insert(Reg);
+    bool isNew = RegSeen.insert(Reg);
     if (NoImpact)
       continue;
 



From evan.cheng at apple.com  Mon Oct 18 22:20:53 2010
From: evan.cheng at apple.com (Evan Cheng)
Date: Mon, 18 Oct 2010 20:20:53 -0700
Subject: [llvm-commits] [llvm] r116790
	-	/llvm/trunk/lib/CodeGen/MachineLICM.cpp
In-Reply-To: <20101019025050.67F922A6C12C@llvm.org>
References: <20101019025050.67F922A6C12C@llvm.org>
Message-ID: <5248B2D7-11F6-4DE8-8E52-82B63B766E36@apple.com>

Oops. Thanks for fixing this!

Evan

On Oct 18, 2010, at 7:50 PM, Andrew Trick wrote:

> Author: atrick
> Date: Mon Oct 18 21:50:50 2010
> New Revision: 116790
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=116790&view=rev
> Log:
> Fix for machine licm assert: RCCost <= RegPressure[RCId]
> in MultiSource/Benchmarks/VersaBench/beamformer/beamformer.
> SmallSet.insert returns true if the element is inserted.
> 
> Modified:
>    llvm/trunk/lib/CodeGen/MachineLICM.cpp
> 
> Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=116790&r1=116789&r2=116790&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
> +++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Mon Oct 18 21:50:50 2010
> @@ -604,7 +604,7 @@
>       if (!Reg || TargetRegisterInfo::isPhysicalRegister(Reg))
>         continue;
> 
> -      bool isNew = !RegSeen.insert(Reg);
> +      bool isNew = RegSeen.insert(Reg);
>       const TargetRegisterClass *RC = MRI->getRegClass(Reg);
>       EVT VT = *RC->vt_begin();
>       unsigned RCId = TLI->getRepRegClassFor(VT)->getID();
> @@ -634,7 +634,7 @@
>     if (!Reg || TargetRegisterInfo::isPhysicalRegister(Reg))
>       continue;
> 
> -    bool isNew = !RegSeen.insert(Reg);
> +    bool isNew = RegSeen.insert(Reg);
>     if (NoImpact)
>       continue;
> 
> 
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From geek4civic at gmail.com  Mon Oct 18 22:24:42 2010
From: geek4civic at gmail.com (NAKAMURA Takumi)
Date: Tue, 19 Oct 2010 03:24:42 -0000
Subject: [llvm-commits] [llvm] r116791 -
	/llvm/trunk/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
Message-ID: <20101019032442.E5B042A6C12C@llvm.org>

Author: chapuni
Date: Mon Oct 18 22:24:42 2010
New Revision: 116791

URL: http://llvm.org/viewvc/llvm-project?rev=116791&view=rev
Log:
lib/CodeGen/TargetLoweringObjectFileImpl.cpp: Tweak to emit ".{section}${name}" instead of ".{section}$linkonce_{name}" for linkonce sections.

It seems GNU ld/PECOFF relies on section names, linking with g++'s libstdc++.a would fail.

Modified:
    llvm/trunk/lib/CodeGen/TargetLoweringObjectFileImpl.cpp

Modified: llvm/trunk/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TargetLoweringObjectFileImpl.cpp?rev=116791&r1=116790&r2=116791&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/TargetLoweringObjectFileImpl.cpp (original)
+++ llvm/trunk/lib/CodeGen/TargetLoweringObjectFileImpl.cpp Mon Oct 18 22:24:42 2010
@@ -981,12 +981,12 @@
 
 static const char *getCOFFSectionPrefixForUniqueGlobal(SectionKind Kind) {
   if (Kind.isText())
-    return ".text$linkonce";
+    return ".text$";
   if (Kind.isBSS ())
-    return ".bss$linkonce";
+    return ".bss$";
   if (Kind.isWriteable())
-    return ".data$linkonce";
-  return ".rdata$linkonce";
+    return ".data$";
+  return ".rdata$";
 }
 
 
@@ -1001,7 +1001,7 @@
     const char *Prefix = getCOFFSectionPrefixForUniqueGlobal(Kind);
     SmallString<128> Name(Prefix, Prefix+strlen(Prefix));
     MCSymbol *Sym = Mang->getSymbol(GV);
-    Name.append(Sym->getName().begin(), Sym->getName().end());
+    Name.append(Sym->getName().begin() + 1, Sym->getName().end());
 
     unsigned Characteristics = getCOFFSectionFlags(Kind);
 



From geek4civic at gmail.com  Mon Oct 18 22:35:16 2010
From: geek4civic at gmail.com (NAKAMURA Takumi)
Date: Tue, 19 Oct 2010 12:35:16 +0900
Subject: [llvm-commits] [Review request] Tweak section names of linkonce
	on PECOFF
In-Reply-To: <AANLkTimM3_78Kfa6H8ayKS9zH8R2rzAUqB6SfTKFMuM2@mail.gmail.com>
References: <AANLkTikS3wk7-kqNpSV=qJ5y=DosVXRjD8_KdAidOQ_8@mail.gmail.com>
	<AANLkTim+Dqz4QsUmyHBeitKW0nebQYY70UhuiqyKDh0K@mail.gmail.com>
	<AANLkTi=Mvx3LsbhPegr4tV9tuxXUKp-rWfKdNqG==8_6@mail.gmail.com>
	<AANLkTikp6RZtxAhSdkp3Wy7vfmZCCZqY5_-jqJEihYnB@mail.gmail.com>
	<AANLkTinsMWtr2gR+Tz8Jw1fPFwE-x81cQcoofr2BMTQf@mail.gmail.com>
	<AANLkTimdAQGbf=Nkhx4HryVMAtAEsAU=D9etYVyWJ9_y@mail.gmail.com>
	<AANLkTinzUj95G400sGq8zO-3hu5usO8QR5X31xWwzpmZ@mail.gmail.com>
	<AANLkTimM3_78Kfa6H8ayKS9zH8R2rzAUqB6SfTKFMuM2@mail.gmail.com>
Message-ID: <AANLkTi=q10Ya_fkj-iG8MN=RrcmdkTLKZABmp-s2KFAD@mail.gmail.com>

Applied in r116791, thank you.
Let me know when you met another issue.

I concluded GNU ld/PECOFF would rely on section names for resolving
linkonce sections.

...Takumi

2010/10/16 Anton Korobeynikov <anton at korobeynikov.info>:
> Hello Takumi,
>
>> My patch would be needed to build selfhost with g++'s libstdc++.
>> Do we get rid of supporting ld-2.19 anyway?
> Yes, we already did ~3 releases ago. It's impossible to preserve
> necessary alignment with this old binutils.
>
>> as-2.18 does not accept ".comm foo,4,2" and it seems requirements
>> would not be satisfied.
>> I will add it to GettingStarted.html later.
> Yes, just add the note that the requirements are same as for mingw
>
> --
> With best regards, Anton Korobeynikov
> Faculty of Mathematics and Mechanics, Saint Petersburg State University
>

From anton at korobeynikov.info  Tue Oct 19 01:04:39 2010
From: anton at korobeynikov.info (Anton Korobeynikov)
Date: Tue, 19 Oct 2010 10:04:39 +0400
Subject: [llvm-commits] [llvm] r116791 -
	/llvm/trunk/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
In-Reply-To: <20101019032442.E5B042A6C12C@llvm.org>
References: <20101019032442.E5B042A6C12C@llvm.org>
Message-ID: <AANLkTimMjq2O4fc8doLa6AHrt=pMtRCZfgUE8AWpt5CT@mail.gmail.com>

> lib/CodeGen/TargetLoweringObjectFileImpl.cpp: Tweak to emit ".{section}${name}" instead of ".{section}$linkonce_{name}" for linkonce sections.
Thanks!

-- 
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University

From bigcheesegs at gmail.com  Tue Oct 19 02:32:42 2010
From: bigcheesegs at gmail.com (Michael J. Spencer)
Date: Tue, 19 Oct 2010 07:32:42 -0000
Subject: [llvm-commits] [llvm] r116800 - in /llvm/trunk/lib/Target:
 TargetData.cpp X86/X86ISelLowering.cpp
Message-ID: <20101019073242.7CA402A6C12D@llvm.org>

Author: mspencer
Date: Tue Oct 19 02:32:42 2010
New Revision: 116800

URL: http://llvm.org/viewvc/llvm-project?rev=116800&view=rev
Log:
Fix Whitespace.

Modified:
    llvm/trunk/lib/Target/TargetData.cpp
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/TargetData.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetData.cpp?rev=116800&r1=116799&r2=116800&view=diff
==============================================================================
--- llvm/trunk/lib/Target/TargetData.cpp (original)
+++ llvm/trunk/lib/Target/TargetData.cpp Tue Oct 19 02:32:42 2010
@@ -83,7 +83,7 @@
   assert((SI == &MemberOffsets[0] || *(SI-1) <= Offset) &&
          (SI+1 == &MemberOffsets[NumElements] || *(SI+1) > Offset) &&
          "Upper bound didn't work!");
-  
+
   // Multiple fields can have the same offset if any of them are zero sized.
   // For example, in { i32, [0 x i32], i32 }, searching for offset 4 will stop
   // at the i32 element, because it is the last element at that offset.  This is
@@ -153,16 +153,16 @@
     std::pair<StringRef, StringRef> Split = Desc.split('-');
     StringRef Token = Split.first;
     Desc = Split.second;
-    
+
     if (Token.empty())
       continue;
-    
+
     Split = Token.split(':');
     StringRef Specifier = Split.first;
     Token = Split.second;
-    
+
     assert(!Specifier.empty() && "Can't be empty here");
-    
+
     switch (Specifier[0]) {
     case 'E':
       LittleEndian = false;
@@ -197,7 +197,7 @@
       unsigned Size = getInt(Specifier.substr(1));
       Split = Token.split(':');
       unsigned ABIAlign = getInt(Split.first) / 8;
-      
+
       Split = Split.second.split(':');
       unsigned PrefAlign = getInt(Split.first) / 8;
       if (PrefAlign == 0)
@@ -215,7 +215,7 @@
         Token = Split.second;
       } while (!Specifier.empty() || !Token.empty());
       break;
-        
+
     default:
       break;
     }
@@ -231,7 +231,7 @@
                     "Tool did not specify a TargetData to use?");
 }
 
-TargetData::TargetData(const Module *M) 
+TargetData::TargetData(const Module *M)
   : ImmutablePass(ID) {
   init(M->getDataLayout());
 }
@@ -249,14 +249,14 @@
       return;
     }
   }
-  
+
   Alignments.push_back(TargetAlignElem::get(align_type, abi_align,
                                             pref_align, bit_width));
 }
 
-/// getAlignmentInfo - Return the alignment (either ABI if ABIInfo = true or 
+/// getAlignmentInfo - Return the alignment (either ABI if ABIInfo = true or
 /// preferred if ABIInfo = false) the target wants for the specified datatype.
-unsigned TargetData::getAlignmentInfo(AlignTypeEnum AlignType, 
+unsigned TargetData::getAlignmentInfo(AlignTypeEnum AlignType,
                                       uint32_t BitWidth, bool ABIInfo,
                                       const Type *Ty) const {
   // Check to see if we have an exact match and remember the best match we see.
@@ -266,18 +266,18 @@
     if (Alignments[i].AlignType == AlignType &&
         Alignments[i].TypeBitWidth == BitWidth)
       return ABIInfo ? Alignments[i].ABIAlign : Alignments[i].PrefAlign;
-    
+
     // The best match so far depends on what we're looking for.
-     if (AlignType == INTEGER_ALIGN && 
+     if (AlignType == INTEGER_ALIGN &&
          Alignments[i].AlignType == INTEGER_ALIGN) {
       // The "best match" for integers is the smallest size that is larger than
       // the BitWidth requested.
-      if (Alignments[i].TypeBitWidth > BitWidth && (BestMatchIdx == -1 || 
+      if (Alignments[i].TypeBitWidth > BitWidth && (BestMatchIdx == -1 ||
            Alignments[i].TypeBitWidth < Alignments[BestMatchIdx].TypeBitWidth))
         BestMatchIdx = i;
       // However, if there isn't one that's larger, then we must use the
       // largest one we have (see below)
-      if (LargestInt == -1 || 
+      if (LargestInt == -1 ||
           Alignments[i].TypeBitWidth > Alignments[LargestInt].TypeBitWidth)
         LargestInt = i;
     }
@@ -322,8 +322,8 @@
       I->first->removeAbstractTypeUser(this);
     LayoutInfo.erase(I);
   }
-  
-  
+
+
   /// refineAbstractType - The callback method invoked when an abstract type is
   /// resolved to another type.  An object must override this method to update
   /// its internal state to reference NewType instead of OldType.
@@ -385,21 +385,21 @@
 const StructLayout *TargetData::getStructLayout(const StructType *Ty) const {
   if (!LayoutMap)
     LayoutMap = new StructLayoutMap();
-  
+
   StructLayoutMap *STM = static_cast<StructLayoutMap*>(LayoutMap);
   StructLayout *&SL = (*STM)[Ty];
   if (SL) return SL;
 
-  // Otherwise, create the struct layout.  Because it is variable length, we 
+  // Otherwise, create the struct layout.  Because it is variable length, we
   // malloc it, then use placement new.
   int NumElts = Ty->getNumElements();
   StructLayout *L =
     (StructLayout *)malloc(sizeof(StructLayout)+(NumElts-1) * sizeof(uint64_t));
-  
+
   // Set SL before calling StructLayout's ctor.  The ctor could cause other
   // entries to be added to TheMap, invalidating our reference.
   SL = L;
-  
+
   new (L) StructLayout(Ty, *this);
 
   if (Ty->isAbstract())
@@ -414,14 +414,14 @@
 /// avoid a dangling pointer in this cache.
 void TargetData::InvalidateStructLayoutInfo(const StructType *Ty) const {
   if (!LayoutMap) return;  // No cache.
-  
+
   static_cast<StructLayoutMap*>(LayoutMap)->InvalidateEntry(Ty);
 }
 
 std::string TargetData::getStringRepresentation() const {
   std::string Result;
   raw_string_ostream OS(Result);
-  
+
   OS << (LittleEndian ? "e" : "E")
      << "-p:" << PointerMemSize*8 << ':' << PointerABIAlign*8
      << ':' << PointerPrefAlign*8;
@@ -430,10 +430,10 @@
     OS << '-' << (char)AI.AlignType << AI.TypeBitWidth << ':'
        << AI.ABIAlign*8 << ':' << AI.PrefAlign*8;
   }
-  
+
   if (!LegalIntWidths.empty()) {
     OS << "-n" << (unsigned)LegalIntWidths[0];
-    
+
     for (unsigned i = 1, e = LegalIntWidths.size(); i != e; ++i)
       OS << ':' << (unsigned)LegalIntWidths[i];
   }

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=116800&r1=116799&r2=116800&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Oct 19 02:32:42 2010
@@ -7602,7 +7602,7 @@
 
   if (ArgMode == 2) {
     // Sanity Check: Make sure using fp_offset makes sense.
-    assert(!UseSoftFloat && 
+    assert(!UseSoftFloat &&
            !(DAG.getMachineFunction()
                 .getFunction()->hasFnAttr(Attribute::NoImplicitFloat)) &&
            Subtarget->hasSSE1());



From bigcheesegs at gmail.com  Tue Oct 19 02:32:52 2010
From: bigcheesegs at gmail.com (Michael J. Spencer)
Date: Tue, 19 Oct 2010 07:32:52 -0000
Subject: [llvm-commits] [llvm] r116801 -
	/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Message-ID: <20101019073253.08AEF2A6C12D@llvm.org>

Author: mspencer
Date: Tue Oct 19 02:32:52 2010
New Revision: 116801

URL: http://llvm.org/viewvc/llvm-project?rev=116801&view=rev
Log:
X86: Add MS-CRT libcalls.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=116801&r1=116800&r2=116801&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Oct 19 02:32:52 2010
@@ -101,9 +101,11 @@
     setLibcallName(RTLIB::SDIV_I64, "_alldiv");
     setLibcallName(RTLIB::UDIV_I64, "_aulldiv");
     setLibcallName(RTLIB::FPTOUINT_F64_I64, "_ftol2");
+    setLibcallName(RTLIB::FPTOUINT_F32_I64, "_ftol2");
     setLibcallCallingConv(RTLIB::SDIV_I64, CallingConv::X86_StdCall);
     setLibcallCallingConv(RTLIB::UDIV_I64, CallingConv::X86_StdCall);
     setLibcallCallingConv(RTLIB::FPTOUINT_F64_I64, CallingConv::X86_StdCall);
+    setLibcallCallingConv(RTLIB::FPTOUINT_F32_I64, CallingConv::X86_StdCall);
   }
 
   if (Subtarget->isTargetDarwin()) {



From chandlerc at gmail.com  Tue Oct 19 03:21:25 2010
From: chandlerc at gmail.com (Chandler Carruth)
Date: Tue, 19 Oct 2010 08:21:25 -0000
Subject: [llvm-commits] [llvm] r116802 - in /llvm/trunk: CMakeLists.txt
 autoconf/configure.ac configure include/llvm/Config/config.h.cmake
 include/llvm/Config/config.h.in
Message-ID: <20101019082126.0D2AC2A6C12C@llvm.org>

Author: chandlerc
Date: Tue Oct 19 03:21:25 2010
New Revision: 116802

URL: http://llvm.org/viewvc/llvm-project?rev=116802&view=rev
Log:
First step to allowing the resource directory of Clang to be adjusted for
strange packaging environments. The primary result of this is to expose
a (normally empty) CLANG_RESOURCE_DIR string in the autoconf and CMake builds.
This will in turn be used by a subsequent commit to Clang.

Regenerated configure and config.h.in thanks to Nick. =D

Modified:
    llvm/trunk/CMakeLists.txt
    llvm/trunk/autoconf/configure.ac
    llvm/trunk/configure
    llvm/trunk/include/llvm/Config/config.h.cmake
    llvm/trunk/include/llvm/Config/config.h.in

Modified: llvm/trunk/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/CMakeLists.txt?rev=116802&r1=116801&r2=116802&view=diff
==============================================================================
--- llvm/trunk/CMakeLists.txt (original)
+++ llvm/trunk/CMakeLists.txt Tue Oct 19 03:21:25 2010
@@ -80,6 +80,9 @@
     CACHE STRING "Semicolon-separated list of targets to build, or \"all\".")
 endif( MSVC )
 
+set(CLANG_RESOURCE_DIR "" CACHE STRING
+  "Relative directory from the Clang binary to its resource files.")
+
 set(C_INCLUDE_DIRS "" CACHE STRING
   "Colon separated list of directories clang will search for headers.")
 

Modified: llvm/trunk/autoconf/configure.ac
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/autoconf/configure.ac?rev=116802&r1=116801&r2=116802&view=diff
==============================================================================
--- llvm/trunk/autoconf/configure.ac (original)
+++ llvm/trunk/autoconf/configure.ac Tue Oct 19 03:21:25 2010
@@ -804,6 +804,13 @@
   *) AC_MSG_ERROR([Invalid path for --with-ocaml-libdir. Provide full path]) ;;
 esac
 
+AC_ARG_WITH(clang-resource-dir,
+  AS_HELP_STRING([--with-clang-resource-dir],
+    [Relative directory from the Clang binary for resource files]),,
+    withval="")
+AC_DEFINE_UNQUOTED(CLANG_RESOURCE_DIR,"$withval",
+                   [Relative directory for resource files])
+
 AC_ARG_WITH(c-include-dirs,
   AS_HELP_STRING([--with-c-include-dirs],
     [Colon separated list of directories clang will search for headers]),,

Modified: llvm/trunk/configure
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/configure?rev=116802&r1=116801&r2=116802&view=diff
==============================================================================
--- llvm/trunk/configure (original)
+++ llvm/trunk/configure Tue Oct 19 03:21:25 2010
@@ -1442,6 +1442,9 @@
   --with-extra-options    Specify additional options to compile LLVM with
   --with-ocaml-libdir     Specify install location for ocaml bindings (default
                           is stdlib)
+  --with-clang-resource-dir
+                          Relative directory from the Clang binary for
+                          resource files
   --with-c-include-dirs   Colon separated list of directories clang will
                           search for headers
   --with-cxx-include-root Directory with the libstdc++ headers.
@@ -5279,6 +5282,20 @@
 esac
 
 
+# Check whether --with-clang-resource-dir was given.
+if test "${with_clang_resource_dir+set}" = set; then
+  withval=$with_clang_resource_dir;
+else
+  withval=""
+fi
+
+
+cat >>confdefs.h <<_ACEOF
+#define CLANG_RESOURCE_DIR "$withval"
+_ACEOF
+
+
+
 # Check whether --with-c-include-dirs was given.
 if test "${with_c_include_dirs+set}" = set; then
   withval=$with_c_include_dirs;
@@ -11450,7 +11467,7 @@
   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
   lt_status=$lt_dlunknown
   cat > conftest.$ac_ext <<EOF
-#line 11453 "configure"
+#line 11470 "configure"
 #include "confdefs.h"
 
 #if HAVE_DLFCN_H

Modified: llvm/trunk/include/llvm/Config/config.h.cmake
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Config/config.h.cmake?rev=116802&r1=116801&r2=116802&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Config/config.h.cmake (original)
+++ llvm/trunk/include/llvm/Config/config.h.cmake Tue Oct 19 03:21:25 2010
@@ -12,6 +12,9 @@
 /* Define if CBE is enabled for printf %a output */
 #undef ENABLE_CBE_PRINTF_A
 
+/* Relative directory for resource files */
+#define CLANG_RESOURCE_DIR "${CLANG_RESOURCE_DIR}"
+
 /* Directories clang will search for headers */
 #define C_INCLUDE_DIRS "${C_INCLUDE_DIRS}"
 

Modified: llvm/trunk/include/llvm/Config/config.h.in
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Config/config.h.in?rev=116802&r1=116801&r2=116802&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Config/config.h.in (original)
+++ llvm/trunk/include/llvm/Config/config.h.in Tue Oct 19 03:21:25 2010
@@ -3,6 +3,9 @@
 #ifndef CONFIG_H
 #define CONFIG_H
 
+/* Relative directory for resource files */
+#undef CLANG_RESOURCE_DIR
+
 /* 32 bit multilib directory. */
 #undef CXX_INCLUDE_32BIT_DIR
 



From wendling at apple.com  Tue Oct 19 04:39:33 2010
From: wendling at apple.com (Bill Wendling)
Date: Tue, 19 Oct 2010 02:39:33 -0700
Subject: [llvm-commits] [llvm] r116766 -
	/llvm/trunk/include/llvm/MC/MCObjectFormat.h
In-Reply-To: <AANLkTimwub3PjcCMsjbwBTrh2sjC+kevuLnGeF5AtSwb@mail.gmail.com>
References: <20101018231851.791912A6C12C@llvm.org>
	<08E3005E-AD77-4832-BEDA-62DE68A06309@apple.com>
	<AANLkTin=zzLcAZTvMDU-joFJHLfAoXz_5wW+3gYWBy2y@mail.gmail.com>
	<58F7424E-8374-4424-BA43-698A7535B2A6@apple.com>
	<AANLkTimwub3PjcCMsjbwBTrh2sjC+kevuLnGeF5AtSwb@mail.gmail.com>
Message-ID: <CB5299AB-90C2-4641-8281-8B15D46512F5@apple.com>

On Oct 18, 2010, at 5:39 PM, Chandler Carruth wrote:

> On Mon, Oct 18, 2010 at 5:25 PM, Bill Wendling <wendling at apple.com> wrote:
> 
> On Oct 18, 2010, at 4:52 PM, Chandler Carruth wrote:
> 
>> On Mon, Oct 18, 2010 at 4:47 PM, Bill Wendling <wendling at apple.com> wrote:
>> On Oct 18, 2010, at 4:18 PM, Chandler Carruth wrote:
>> 
>> > Author: chandlerc
>> > Date: Mon Oct 18 18:18:51 2010
>> > New Revision: 116766
>> >
>> > URL: http://llvm.org/viewvc/llvm-project?rev=116766&view=rev
>> > Log:
>> > Add a virtual destructor to silence a GCC warning.
>> >
>> > Modified:
>> >    llvm/trunk/include/llvm/MC/MCObjectFormat.h
>> >
>> > Modified: llvm/trunk/include/llvm/MC/MCObjectFormat.h
>> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCObjectFormat.h?rev=116766&r1=116765&r2=116766&view=diff
>> > ==============================================================================
>> > --- llvm/trunk/include/llvm/MC/MCObjectFormat.h (original)
>> > +++ llvm/trunk/include/llvm/MC/MCObjectFormat.h Mon Oct 18 18:18:51 2010
>> > @@ -15,6 +15,8 @@
>> >
>> > class MCObjectFormat {
>> > public:
>> > +  virtual ~MCObjectFormat() {}
>> > +
>> 
>> Hi Chandler,
>> 
>> Should the definition for this go in the MCObjectFormat.cpp file to "anchor" the vtable?
>> 
>> I wasn't sure. I placed it here as that seemed like the minimal change from the original code (it is an abstract interface afterall). I'm happy to move it to the cpp file if anchoring the vtable (and forcing this call to be out-of-line) is desirable.
> 
> As long as it complies with http://llvm.org/docs/CodingStandards.html#ll_virtual_anch it will be okay. :)
> 
> Hadn't realized we had a formal policy on it, thanks. Fixed in r116779. 
> 
Thanks! :-)

-bw

From isanbard at gmail.com  Tue Oct 19 05:18:23 2010
From: isanbard at gmail.com (Bill Wendling)
Date: Tue, 19 Oct 2010 10:18:23 -0000
Subject: [llvm-commits] [llvm] r116804 -
	/llvm/trunk/lib/MC/MCParser/DarwinAsmParser.cpp
Message-ID: <20101019101823.A3CC52A6C12C@llvm.org>

Author: void
Date: Tue Oct 19 05:18:23 2010
New Revision: 116804

URL: http://llvm.org/viewvc/llvm-project?rev=116804&view=rev
Log:
Fix spelling.

Modified:
    llvm/trunk/lib/MC/MCParser/DarwinAsmParser.cpp

Modified: llvm/trunk/lib/MC/MCParser/DarwinAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCParser/DarwinAsmParser.cpp?rev=116804&r1=116803&r2=116804&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCParser/DarwinAsmParser.cpp (original)
+++ llvm/trunk/lib/MC/MCParser/DarwinAsmParser.cpp Tue Oct 19 05:18:23 2010
@@ -305,7 +305,7 @@
   //
   // FIXME: This isn't really what 'as' does; I think it just uses the implicit
   // alignment on the section (e.g., if one manually inserts bytes into the
-  // section, then just issueing the section switch directive will not realign
+  // section, then just issuing the section switch directive will not realign
   // the section. However, this is arguably more reasonable behavior, and there
   // is no good reason for someone to intentionally emit incorrectly sized
   // values into the implicitly aligned sections.



From clchiou at gmail.com  Tue Oct 19 08:14:40 2010
From: clchiou at gmail.com (Che-Liang Chiou)
Date: Tue, 19 Oct 2010 13:14:40 -0000
Subject: [llvm-commits] [llvm] r116805 - in /llvm/trunk/lib/Target/PTX:
 AsmPrinter/PTXAsmPrinter.cpp PTXISelLowering.cpp PTXInstrInfo.cpp
 PTXInstrInfo.h PTXInstrInfo.td PTXRegisterInfo.h PTXRegisterInfo.td
Message-ID: <20101019131440.71DD52A6C12C@llvm.org>

Author: clchiou
Date: Tue Oct 19 08:14:40 2010
New Revision: 116805

URL: http://llvm.org/viewvc/llvm-project?rev=116805&view=rev
Log:
Add lower argument and return of device function

Modified:
    llvm/trunk/lib/Target/PTX/AsmPrinter/PTXAsmPrinter.cpp
    llvm/trunk/lib/Target/PTX/PTXISelLowering.cpp
    llvm/trunk/lib/Target/PTX/PTXInstrInfo.cpp
    llvm/trunk/lib/Target/PTX/PTXInstrInfo.h
    llvm/trunk/lib/Target/PTX/PTXInstrInfo.td
    llvm/trunk/lib/Target/PTX/PTXRegisterInfo.h
    llvm/trunk/lib/Target/PTX/PTXRegisterInfo.td

Modified: llvm/trunk/lib/Target/PTX/AsmPrinter/PTXAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/AsmPrinter/PTXAsmPrinter.cpp?rev=116805&r1=116804&r2=116805&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PTX/AsmPrinter/PTXAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/PTX/AsmPrinter/PTXAsmPrinter.cpp Tue Oct 19 08:14:40 2010
@@ -32,6 +32,8 @@
 
       virtual void EmitInstruction(const MachineInstr *MI);
 
+      void printOperand(const MachineInstr *MI, int opNum, raw_ostream &OS);
+
       // autogen'd.
       void printInstruction(const MachineInstr *MI, raw_ostream &OS);
       static const char *getRegisterName(unsigned RegNo);
@@ -40,10 +42,27 @@
 
 void PTXAsmPrinter::EmitInstruction(const MachineInstr *MI) {
   SmallString<128> str;
-  raw_svector_ostream os(str);
-  printInstruction(MI, os);
-  os << ';';
-  OutStreamer.EmitRawText(os.str());
+  raw_svector_ostream OS(str);
+  printInstruction(MI, OS);
+  OS << ';';
+  OutStreamer.EmitRawText(OS.str());
+}
+
+void PTXAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
+                                 raw_ostream &OS) {
+  const MachineOperand &MO = MI->getOperand(opNum);
+
+  switch (MO.getType()) {
+    default:
+      llvm_unreachable("<unknown operand type>");
+      break;
+    case MachineOperand::MO_Register:
+      OS << getRegisterName(MO.getReg());
+      break;
+    case MachineOperand::MO_Immediate:
+      OS << (int) MO.getImm();
+      break;
+  }
 }
 
 #include "PTXGenAsmWriter.inc"

Modified: llvm/trunk/lib/Target/PTX/PTXISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXISelLowering.cpp?rev=116805&r1=116804&r2=116805&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PTX/PTXISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/PTX/PTXISelLowering.cpp Tue Oct 19 08:14:40 2010
@@ -11,9 +11,12 @@
 //
 //===----------------------------------------------------------------------===//
 
+#include "PTX.h"
 #include "PTXISelLowering.h"
 #include "PTXRegisterInfo.h"
 #include "llvm/Support/ErrorHandling.h"
+#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/SelectionDAG.h"
 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
 
@@ -22,7 +25,8 @@
 PTXTargetLowering::PTXTargetLowering(TargetMachine &TM)
   : TargetLowering(TM, new TargetLoweringObjectFileELF()) {
   // Set up the register classes.
-  addRegisterClass(MVT::i1, PTX::PredsRegisterClass);
+  addRegisterClass(MVT::i1,  PTX::PredsRegisterClass);
+  addRegisterClass(MVT::i32, PTX::RRegs32RegisterClass);
 
   // Compute derived properties from the register classes
   computeRegisterProperties();
@@ -40,6 +44,57 @@
 //                      Calling Convention Implementation
 //===----------------------------------------------------------------------===//
 
+static struct argmap_entry {
+  MVT::SimpleValueType VT;
+  TargetRegisterClass *RC;
+  TargetRegisterClass::iterator loc;
+
+  argmap_entry(MVT::SimpleValueType _VT, TargetRegisterClass *_RC)
+    : VT(_VT), RC(_RC), loc(_RC->begin()) {}
+
+  void reset(void) { loc = RC->begin(); }
+  bool operator==(MVT::SimpleValueType _VT) { return VT == _VT; }
+} argmap[] = {
+  argmap_entry(MVT::i1,  PTX::PredsRegisterClass),
+  argmap_entry(MVT::i32, PTX::RRegs32RegisterClass)
+};
+
+static SDValue lower_kernel_argument(int i,
+                                     SDValue Chain,
+                                     DebugLoc dl,
+                                     MVT::SimpleValueType VT,
+                                     argmap_entry *entry,
+                                     SelectionDAG &DAG,
+                                     unsigned *argreg) {
+  // TODO
+  llvm_unreachable("Not implemented yet");
+}
+
+static SDValue lower_device_argument(int i,
+                                     SDValue Chain,
+                                     DebugLoc dl,
+                                     MVT::SimpleValueType VT,
+                                     argmap_entry *entry,
+                                     SelectionDAG &DAG,
+                                     unsigned *argreg) {
+  MachineRegisterInfo &RegInfo = DAG.getMachineFunction().getRegInfo();
+
+  unsigned preg = *++(entry->loc); // allocate start from register 1
+  unsigned vreg = RegInfo.createVirtualRegister(entry->RC);
+  RegInfo.addLiveIn(preg, vreg);
+
+  *argreg = preg;
+  return DAG.getCopyFromReg(Chain, dl, vreg, VT);
+}
+
+typedef SDValue (*lower_argument_func)(int i,
+                                       SDValue Chain,
+                                       DebugLoc dl,
+                                       MVT::SimpleValueType VT,
+                                       argmap_entry *entry,
+                                       SelectionDAG &DAG,
+                                       unsigned *argreg);
+
 SDValue PTXTargetLowering::
   LowerFormalArguments(SDValue Chain,
                        CallingConv::ID CallConv,
@@ -48,6 +103,40 @@
                        DebugLoc dl,
                        SelectionDAG &DAG,
                        SmallVectorImpl<SDValue> &InVals) const {
+  if (isVarArg) llvm_unreachable("PTX does not support varargs");
+
+  lower_argument_func lower_argument;
+
+  switch (CallConv) {
+    default:
+      llvm_unreachable("Unsupported calling convention");
+      break;
+    case CallingConv::PTX_Kernel:
+      lower_argument = lower_kernel_argument;
+      break;
+    case CallingConv::PTX_Device:
+      lower_argument = lower_device_argument;
+      break;
+  }
+
+  // Reset argmap before allocation
+  for (struct argmap_entry *i = argmap, *e = argmap + array_lengthof(argmap);
+       i != e; ++ i)
+    i->reset();
+
+  for (int i = 0, e = Ins.size(); i != e; ++ i) {
+    MVT::SimpleValueType VT = Ins[i].VT.getSimpleVT().SimpleTy;
+
+    struct argmap_entry *entry = std::find(argmap,
+                                           argmap + array_lengthof(argmap), VT);
+    if (entry == argmap + array_lengthof(argmap))
+      llvm_unreachable("Type of argument is not supported");
+
+    unsigned reg;
+    SDValue arg = lower_argument(i, Chain, dl, VT, entry, DAG, &reg);
+    InVals.push_back(arg);
+  }
+
   return Chain;
 }
 
@@ -59,7 +148,7 @@
               const SmallVectorImpl<SDValue> &OutVals,
               DebugLoc dl,
               SelectionDAG &DAG) const {
-  assert(!isVarArg && "PTX does not support var args.");
+  if (isVarArg) llvm_unreachable("PTX does not support varargs");
 
   switch (CallConv) {
     default:
@@ -74,10 +163,26 @@
 
   // PTX_Device
 
+  // return void
   if (Outs.size() == 0)
     return DAG.getNode(PTXISD::RET, dl, MVT::Other, Chain);
 
-  // TODO: allocate return register
+  assert(Outs[0].VT == MVT::i32 && "Can return only basic types");
+
   SDValue Flag;
+  unsigned reg = PTX::R0;
+
+  // If this is the first return lowered for this function, add the regs to the
+  // liveout set for the function
+  if (DAG.getMachineFunction().getRegInfo().liveout_empty())
+    DAG.getMachineFunction().getRegInfo().addLiveOut(reg);
+
+  // Copy the result values into the output registers
+  Chain = DAG.getCopyToReg(Chain, dl, reg, OutVals[0], Flag);
+
+  // Guarantee that all emitted copies are stuck together,
+  // avoiding something bad
+  Flag = Chain.getValue(1);
+
   return DAG.getNode(PTXISD::RET, dl, MVT::Other, Chain, Flag);
 }

Modified: llvm/trunk/lib/Target/PTX/PTXInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXInstrInfo.cpp?rev=116805&r1=116804&r2=116805&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PTX/PTXInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/PTX/PTXInstrInfo.cpp Tue Oct 19 08:14:40 2010
@@ -11,7 +11,9 @@
 //
 //===----------------------------------------------------------------------===//
 
+#include "PTX.h"
 #include "PTXInstrInfo.h"
+#include "llvm/CodeGen/MachineInstrBuilder.h"
 
 using namespace llvm;
 
@@ -20,3 +22,66 @@
 PTXInstrInfo::PTXInstrInfo(PTXTargetMachine &_TM)
   : TargetInstrInfoImpl(PTXInsts, array_lengthof(PTXInsts)),
     RI(_TM, *this), TM(_TM) {}
+
+static const struct map_entry {
+  const TargetRegisterClass *cls;
+  const int opcode;
+} map[] = {
+  { &PTX::RRegs32RegClass, PTX::MOVrr },
+  { &PTX::PredsRegClass,   PTX::MOVpp }
+};
+
+void PTXInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
+                               MachineBasicBlock::iterator I, DebugLoc DL,
+                               unsigned DstReg, unsigned SrcReg,
+                               bool KillSrc) const {
+  for (int i = 0, e = sizeof(map)/sizeof(map[0]); i != e; ++ i)
+    if (PTX::RRegs32RegClass.contains(DstReg, SrcReg)) {
+      BuildMI(MBB, I, DL,
+              get(PTX::MOVrr), DstReg).addReg(SrcReg, getKillRegState(KillSrc));
+      return;
+    }
+
+  llvm_unreachable("Impossible reg-to-reg copy");
+}
+
+bool PTXInstrInfo::copyRegToReg(MachineBasicBlock &MBB,
+                                MachineBasicBlock::iterator I,
+                                unsigned DstReg, unsigned SrcReg,
+                                const TargetRegisterClass *DstRC,
+                                const TargetRegisterClass *SrcRC,
+                                DebugLoc DL) const {
+  if (DstRC != SrcRC)
+    return false;
+
+  for (int i = 0, e = sizeof(map)/sizeof(map[0]); i != e; ++ i)
+    if (DstRC == map[i].cls) {
+      MachineInstr *MI = BuildMI(MBB, I, DL, get(map[i].opcode),
+                                 DstReg).addReg(SrcReg);
+      if (MI->findFirstPredOperandIdx() == -1) {
+        MI->addOperand(MachineOperand::CreateReg(0, false));
+        MI->addOperand(MachineOperand::CreateImm(/*IsInv=*/0));
+      }
+      return true;
+    }
+
+  return false;
+}
+
+bool PTXInstrInfo::isMoveInstr(const MachineInstr& MI,
+                               unsigned &SrcReg, unsigned &DstReg,
+                               unsigned &SrcSubIdx, unsigned &DstSubIdx) const {
+  switch (MI.getOpcode()) {
+    default:
+      return false;
+    case PTX::MOVpp:
+    case PTX::MOVrr:
+      assert(MI.getNumOperands() >= 2 &&
+             MI.getOperand(0).isReg() && MI.getOperand(1).isReg() &&
+             "Invalid register-register move instruction");
+      SrcSubIdx = DstSubIdx = 0; // No sub-registers
+      DstReg = MI.getOperand(0).getReg();
+      SrcReg = MI.getOperand(1).getReg();
+      return true;
+  }
+}

Modified: llvm/trunk/lib/Target/PTX/PTXInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXInstrInfo.h?rev=116805&r1=116804&r2=116805&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PTX/PTXInstrInfo.h (original)
+++ llvm/trunk/lib/Target/PTX/PTXInstrInfo.h Tue Oct 19 08:14:40 2010
@@ -29,6 +29,22 @@
     explicit PTXInstrInfo(PTXTargetMachine &_TM);
 
     virtual const PTXRegisterInfo &getRegisterInfo() const { return RI; }
+
+    virtual void copyPhysReg(MachineBasicBlock &MBB,
+                             MachineBasicBlock::iterator I, DebugLoc DL,
+                             unsigned DstReg, unsigned SrcReg,
+                             bool KillSrc) const;
+
+    virtual bool copyRegToReg(MachineBasicBlock &MBB,
+                              MachineBasicBlock::iterator I,
+                              unsigned DstReg, unsigned SrcReg,
+                              const TargetRegisterClass *DstRC,
+                              const TargetRegisterClass *SrcRC,
+                              DebugLoc DL) const;
+
+    virtual bool isMoveInstr(const MachineInstr& MI,
+                             unsigned &SrcReg, unsigned &DstReg,
+                             unsigned &SrcSubIdx, unsigned &DstSubIdx) const;
   }; // class PTXInstrInfo
 } // namespace llvm
 

Modified: llvm/trunk/lib/Target/PTX/PTXInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXInstrInfo.td?rev=116805&r1=116804&r2=116805&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PTX/PTXInstrInfo.td (original)
+++ llvm/trunk/lib/Target/PTX/PTXInstrInfo.td Tue Oct 19 08:14:40 2010
@@ -30,6 +30,27 @@
 // Instructions
 //===----------------------------------------------------------------------===//
 
+///===- Data Movement and Conversion Instructions -------------------------===//
+
+let neverHasSideEffects = 1 in {
+  // rely on isMoveInstr to separate MOVpp, MOVrr, etc.
+  def MOVpp
+    : InstPTX<(outs Preds:$d), (ins Preds:$a), "mov.pred\t$d, $a", []>;
+  def MOVrr
+    : InstPTX<(outs RRegs32:$d), (ins RRegs32:$a), "mov.s32\t$d, $a", []>;
+}
+
+let isReMaterializable = 1, isAsCheapAsAMove = 1 in {
+  def MOVpi
+    : InstPTX<(outs Preds:$d), (ins i1imm:$a), "mov.pred\t$d, $a",
+              [(set Preds:$d, imm:$a)]>;
+  def MOVri
+    : InstPTX<(outs RRegs32:$d), (ins i32imm:$a), "mov.s32\t$d, $a",
+              [(set RRegs32:$d, imm:$a)]>;
+}
+
+///===- Control Flow Instructions -----------------------------------------===//
+
 let isReturn = 1, isTerminator = 1, isBarrier = 1 in {
   def EXIT : InstPTX<(outs), (ins), "exit", [(PTXexit)]>;
   def RET  : InstPTX<(outs), (ins), "ret",  [(PTXret)]>;

Modified: llvm/trunk/lib/Target/PTX/PTXRegisterInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXRegisterInfo.h?rev=116805&r1=116804&r2=116805&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PTX/PTXRegisterInfo.h (original)
+++ llvm/trunk/lib/Target/PTX/PTXRegisterInfo.h Tue Oct 19 08:14:40 2010
@@ -40,10 +40,11 @@
 
   virtual bool hasFP(const MachineFunction &MF) const { return false; }
 
-  // FIXME: Given that PTX does not support stack frame, what should we do here?
   virtual void eliminateFrameIndex(MachineBasicBlock::iterator MI,
                                    int SPAdj,
-                                   RegScavenger *RS = NULL) const {}
+                                   RegScavenger *RS = NULL) const {
+    llvm_unreachable("PTX does not support general function call");
+  }
 
   virtual void emitPrologue(MachineFunction &MF) const {}
   virtual void emitEpilogue(MachineFunction &MF,

Modified: llvm/trunk/lib/Target/PTX/PTXRegisterInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXRegisterInfo.td?rev=116805&r1=116804&r2=116805&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PTX/PTXRegisterInfo.td (original)
+++ llvm/trunk/lib/Target/PTX/PTXRegisterInfo.td Tue Oct 19 08:14:40 2010
@@ -52,6 +52,39 @@
 def P30 : PTXReg<"p30">;
 def P31 : PTXReg<"p31">;
 
+def R0  : PTXReg<"r0">;
+def R1  : PTXReg<"r1">;
+def R2  : PTXReg<"r2">;
+def R3  : PTXReg<"r3">;
+def R4  : PTXReg<"r4">;
+def R5  : PTXReg<"r5">;
+def R6  : PTXReg<"r6">;
+def R7  : PTXReg<"r7">;
+def R8  : PTXReg<"r8">;
+def R9  : PTXReg<"r9">;
+def R10 : PTXReg<"r10">;
+def R11 : PTXReg<"r11">;
+def R12 : PTXReg<"r12">;
+def R13 : PTXReg<"r13">;
+def R14 : PTXReg<"r14">;
+def R15 : PTXReg<"r15">;
+def R16 : PTXReg<"r16">;
+def R17 : PTXReg<"r17">;
+def R18 : PTXReg<"r18">;
+def R19 : PTXReg<"r19">;
+def R20 : PTXReg<"r20">;
+def R21 : PTXReg<"r21">;
+def R22 : PTXReg<"r22">;
+def R23 : PTXReg<"r23">;
+def R24 : PTXReg<"r24">;
+def R25 : PTXReg<"r25">;
+def R26 : PTXReg<"r26">;
+def R27 : PTXReg<"r27">;
+def R28 : PTXReg<"r28">;
+def R29 : PTXReg<"r29">;
+def R30 : PTXReg<"r30">;
+def R31 : PTXReg<"r31">;
+
 //===----------------------------------------------------------------------===//
 //  Register classes
 //===----------------------------------------------------------------------===//
@@ -61,3 +94,9 @@
                            P8, P9, P10, P11, P12, P13, P14, P15,
                            P16, P17, P18, P19, P20, P21, P22, P23,
                            P24, P25, P26, P27, P28, P29, P30, P31]>;
+
+def RRegs32 : RegisterClass<"PTX", [i32], 32,
+                            [R0, R1, R2, R3, R4, R5, R6, R7,
+                             R8, R9, R10, R11, R12, R13, R14, R15,
+                             R16, R17, R18, R19, R20, R21, R22, R23,
+                             R24, R25, R26, R27, R28, R29, R30, R31]>;



From clchiou at gmail.com  Tue Oct 19 08:21:51 2010
From: clchiou at gmail.com (Che-Liang Chiou)
Date: Tue, 19 Oct 2010 13:21:51 -0000
Subject: [llvm-commits] [llvm] r116806 - /llvm/trunk/test/CodeGen/PTX/mov.ll
Message-ID: <20101019132151.B3F292A6C12C@llvm.org>

Author: clchiou
Date: Tue Oct 19 08:21:51 2010
New Revision: 116806

URL: http://llvm.org/viewvc/llvm-project?rev=116806&view=rev
Log:
Add test case mov.ll for PTX device function

Added:
    llvm/trunk/test/CodeGen/PTX/mov.ll

Added: llvm/trunk/test/CodeGen/PTX/mov.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PTX/mov.ll?rev=116806&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/PTX/mov.ll (added)
+++ llvm/trunk/test/CodeGen/PTX/mov.ll Tue Oct 19 08:21:51 2010
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=ptx | FileCheck %s
+
+define ptx_device i32 @t1() {
+;CHECK: mov.s32 r0, 0;
+;CHECK: ret;
+	ret i32 0
+}
+
+define ptx_device i32 @t2(i32 %x) {
+;CHECK: mov.s32 r0, r1;
+;CHECK: ret;
+	ret i32 %x
+}



From clchiou at gmail.com  Tue Oct 19 08:28:18 2010
From: clchiou at gmail.com (Che-Liang Chiou)
Date: Tue, 19 Oct 2010 13:28:18 -0000
Subject: [llvm-commits] [llvm] r116807 - /llvm/trunk/lib/Target/PTX/
Message-ID: <20101019132818.E7C902A6C12C@llvm.org>

Author: clchiou
Date: Tue Oct 19 08:28:18 2010
New Revision: 116807

URL: http://llvm.org/viewvc/llvm-project?rev=116807&view=rev
Log:
Add svn:ignore to lib/Target/PTX/

Modified:
    llvm/trunk/lib/Target/PTX/   (props changed)

Propchange: llvm/trunk/lib/Target/PTX/
------------------------------------------------------------------------------
--- svn:ignore (added)
+++ svn:ignore Tue Oct 19 08:28:18 2010
@@ -0,0 +1,10 @@
+Debug
+Debug+Checks
+Debug+Coverage
+Debug+Coverage-Asserts
+*.inc
+Release
+Release-Asserts
+Release+Coverage
+Debug+Asserts
+Release+Asserts



From clchiou at gmail.com  Tue Oct 19 08:46:32 2010
From: clchiou at gmail.com (Che-Liang Chiou)
Date: Tue, 19 Oct 2010 13:46:32 -0000
Subject: [llvm-commits] [llvm] r116808 - in /llvm/trunk:
 include/llvm/Config/ lib/Target/PTX/AsmPrinter/ lib/Target/PTX/TargetInfo/
 test/ test/CodeGen/PTX/ tools/bugpoint-passes/ tools/llvmc/src/
Message-ID: <20101019134632.601B72A6C12C@llvm.org>

Author: clchiou
Date: Tue Oct 19 08:46:32 2010
New Revision: 116808

URL: http://llvm.org/viewvc/llvm-project?rev=116808&view=rev
Log:
Add svn:ignore

Modified:
    llvm/trunk/include/llvm/Config/   (props changed)
    llvm/trunk/lib/Target/PTX/AsmPrinter/   (props changed)
    llvm/trunk/lib/Target/PTX/TargetInfo/   (props changed)
    llvm/trunk/test/   (props changed)
    llvm/trunk/test/CodeGen/PTX/   (props changed)
    llvm/trunk/tools/bugpoint-passes/   (props changed)
    llvm/trunk/tools/llvmc/src/   (props changed)

Propchange: llvm/trunk/include/llvm/Config/
------------------------------------------------------------------------------
--- svn:ignore (original)
+++ svn:ignore Tue Oct 19 08:46:32 2010
@@ -4,3 +4,4 @@
 Targets.def
 AsmParsers.def
 Disassemblers.def
+llvm-config.h

Propchange: llvm/trunk/lib/Target/PTX/AsmPrinter/
------------------------------------------------------------------------------
--- svn:ignore (added)
+++ svn:ignore Tue Oct 19 08:46:32 2010
@@ -0,0 +1,9 @@
+Debug
+Debug+Checks
+Debug+Coverage
+Debug+Coverage-Asserts
+Release
+Release-Asserts
+Release+Coverage
+Debug+Asserts
+Release+Asserts

Propchange: llvm/trunk/lib/Target/PTX/TargetInfo/
------------------------------------------------------------------------------
--- svn:ignore (added)
+++ svn:ignore Tue Oct 19 08:46:32 2010
@@ -0,0 +1,9 @@
+Debug
+Debug+Checks
+Debug+Coverage
+Debug+Coverage-Asserts
+Release
+Release-Asserts
+Release+Coverage
+Debug+Asserts
+Release+Asserts

Propchange: llvm/trunk/test/
------------------------------------------------------------------------------
--- svn:ignore (original)
+++ svn:ignore Tue Oct 19 08:46:32 2010
@@ -2,3 +2,4 @@
 *.sum
 site.exp
 site.bak
+lit.site.cfg

Propchange: llvm/trunk/test/CodeGen/PTX/
------------------------------------------------------------------------------
--- svn:ignore (added)
+++ svn:ignore Tue Oct 19 08:46:32 2010
@@ -0,0 +1 @@
+Output

Propchange: llvm/trunk/tools/bugpoint-passes/
------------------------------------------------------------------------------
--- svn:ignore (added)
+++ svn:ignore Tue Oct 19 08:46:32 2010
@@ -0,0 +1,9 @@
+Debug
+Debug+Checks
+Debug+Coverage
+Debug+Coverage-Asserts
+Release
+Release-Asserts
+Release+Coverage
+Debug+Asserts
+Release+Asserts

Propchange: llvm/trunk/tools/llvmc/src/
------------------------------------------------------------------------------
--- svn:ignore (added)
+++ svn:ignore Tue Oct 19 08:46:32 2010
@@ -0,0 +1,11 @@
+Debug
+Debug+Checks
+Debug+Coverage
+Debug+Coverage-Asserts
+Release
+Release-Asserts
+Release+Coverage
+Debug+Asserts
+Release+Asserts
+AutoGenerated.inc
+Base.td



From baldrick at free.fr  Tue Oct 19 08:55:15 2010
From: baldrick at free.fr (Duncan Sands)
Date: Tue, 19 Oct 2010 15:55:15 +0200
Subject: [llvm-commits] [PATCH] Promote all possible memory to registers
In-Reply-To: <AANLkTi=5e3_Fs9ehrVGOYpBnd=-HifuSCufADMPa8YYD@mail.gmail.com>
References: <AANLkTi=5e3_Fs9ehrVGOYpBnd=-HifuSCufADMPa8YYD@mail.gmail.com>
Message-ID: <4CBDA343.8090608@free.fr>

Hi Kenneth,

> This is a new pass, activated by the "-allmem2reg" switch for opt.  It
> is a generalization of the SSA algorithm, attempting to promote all
> non-volatile loads within a function, not just those from alloca's
> which haven't had their address taken.

unfortunately your patch does not apply to top-of-tree.

Ciao,

Duncan.

From kennethuil at gmail.com  Tue Oct 19 09:19:48 2010
From: kennethuil at gmail.com (Kenneth Uildriks)
Date: Tue, 19 Oct 2010 09:19:48 -0500
Subject: [llvm-commits] [PATCH] Promote all possible memory to registers
In-Reply-To: <4CBDA343.8090608@free.fr>
References: <AANLkTi=5e3_Fs9ehrVGOYpBnd=-HifuSCufADMPa8YYD@mail.gmail.com>
	<4CBDA343.8090608@free.fr>
Message-ID: <AANLkTimDw2ohkmPRK-9EBJPaugVBpZZh6EDa+kfLRMbC@mail.gmail.com>

On Tue, Oct 19, 2010 at 8:55 AM, Duncan Sands <baldrick at free.fr> wrote:
> Hi Kenneth,
>
>> This is a new pass, activated by the "-allmem2reg" switch for opt. ?It
>> is a generalization of the SSA algorithm, attempting to promote all
>> non-volatile loads within a function, not just those from alloca's
>> which haven't had their address taken.
>
> unfortunately your patch does not apply to top-of-tree.
>
> Ciao,
>
> Duncan.
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>

I'm working on another patch; I found some bugs yesterday.  I should
have posted something to that effect, but I assumed that y'all were
waiting on my measurements anyway.


From aggarwa4 at illinois.edu  Tue Oct 19 11:03:34 2010
From: aggarwa4 at illinois.edu (Arushi Aggarwal)
Date: Tue, 19 Oct 2010 16:03:34 -0000
Subject: [llvm-commits] [poolalloc] r116810 -
	/poolalloc/trunk/lib/DSA/BottomUpClosure.cpp
Message-ID: <20101019160334.0D6942A6C12C@llvm.org>

Author: aggarwa4
Date: Tue Oct 19 11:03:33 2010
New Revision: 116810

URL: http://llvm.org/viewvc/llvm-project?rev=116810&view=rev
Log:
Changes to allow for a more complete call graph.

Merge information back from globals graph into the 
individual function's graph, so that more exact call
graph can be constructed, for calls, made through 
global objects/structs.


Modified:
    poolalloc/trunk/lib/DSA/BottomUpClosure.cpp

Modified: poolalloc/trunk/lib/DSA/BottomUpClosure.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/BottomUpClosure.cpp?rev=116810&r1=116809&r2=116810&view=diff
==============================================================================
--- poolalloc/trunk/lib/DSA/BottomUpClosure.cpp (original)
+++ poolalloc/trunk/lib/DSA/BottomUpClosure.cpp Tue Oct 19 11:03:33 2010
@@ -141,16 +141,18 @@
   formGlobalECs();
 
   // Merge the globals variables (not the calls) from the globals graph back
-  // into the main function's graph so that the main function contains all of
-  // the information about global pools and GV usage in the program.
-  for (std::vector<const Function*>::iterator ii = EntryPoints.begin(),
-       ee = EntryPoints.end(); ii != ee; ++ii) {
-    DSGraph* MainGraph = getOrCreateGraph(*ii);
-    cloneGlobalsInto(MainGraph);
-
-    MainGraph->maskIncompleteMarkers();
-    MainGraph->markIncompleteNodes(DSGraph::MarkFormalArgs |
+  // into the individual function's graph so that changes made to globals during
+  // BU can be reflected. This is specifically needed for correct call graph 
+  
+  for (Module::iterator F = M.begin(); F != M.end(); ++F) {
+    if (!(F->isDeclaration())){
+      DSGraph *Graph  = getOrCreateGraph(F);
+      cloneGlobalsInto(Graph);
+      Graph->maskIncompleteMarkers();
+      Graph->markIncompleteNodes(DSGraph::MarkFormalArgs |
                                    DSGraph::IgnoreGlobals);
+      
+    }
   }
 
   NumCallEdges += callgraph.size();
@@ -161,7 +163,7 @@
   //
   callgraph.buildSCCs();
   callgraph.buildRoots();
-
+  
   return false;
 }
 
@@ -509,6 +511,7 @@
   return MyID;  // == Min
 }
 
+#if 0
 //
 // Method: postOrder()
 //
@@ -608,6 +611,7 @@
   GlobalsGraph->getScalarMap().clear_scalars();
 }
 
+#endif
 
 //
 // Method: CloneAuxIntoGlobal()
@@ -686,7 +690,7 @@
 
     // Fast path for noop calls.  Note that we don't care about merging globals
     // in the callee with nodes in the caller here.
-    if (CS.getRetVal().isNull() && CS.getNumPtrArgs() == 0 && !CS.isVarArg()) {
+    if (!CS.isIndirectCall() && CS.getRetVal().isNull() && CS.getNumPtrArgs() == 0 && !CS.isVarArg()) {
       TempFCs.erase(TempFCs.begin());
       continue;
     }
@@ -742,7 +746,7 @@
         std::sort(NodeCallees.begin(), NodeCallees.end());
         eraseCS = std::includes(CalledFuncs.begin(), CalledFuncs.end(),
                                 NodeCallees.begin(), NodeCallees.end());
-      }
+      } 
 
       //
       // Update the statistics on resolved indirect function calls.



From grosbach at apple.com  Tue Oct 19 11:16:18 2010
From: grosbach at apple.com (Jim Grosbach)
Date: Tue, 19 Oct 2010 09:16:18 -0700
Subject: [llvm-commits] [llvm] r116785 -
	/llvm/trunk/lib/System/Win32/ThreadLocal.inc
In-Reply-To: <20101019012202.27CB12A6C12C@llvm.org>
References: <20101019012202.27CB12A6C12C@llvm.org>
Message-ID: <EEC41DAD-8F68-4CA7-BA38-F2E3978A8E04@apple.com>

Can you add a comment saying why that line is necessary? Otherwise some well meaning person may remove the "unusued" statement.

-Jim

On Oct 18, 2010, at 6:22 PM, NAKAMURA Takumi wrote:

> Author: chapuni
> Date: Mon Oct 18 20:22:01 2010
> New Revision: 116785
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=116785&view=rev
> Log:
> lib/System/Win32/ThreadLocal.inc: Suppress "unused" warning on -Asserts.
> 
> Modified:
>    llvm/trunk/lib/System/Win32/ThreadLocal.inc
> 
> Modified: llvm/trunk/lib/System/Win32/ThreadLocal.inc
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Win32/ThreadLocal.inc?rev=116785&r1=116784&r2=116785&view=diff
> ==============================================================================
> --- llvm/trunk/lib/System/Win32/ThreadLocal.inc (original)
> +++ llvm/trunk/lib/System/Win32/ThreadLocal.inc Mon Oct 18 20:22:01 2010
> @@ -44,6 +44,7 @@
>   DWORD* tls = static_cast<DWORD*>(data);
>   int errorcode = TlsSetValue(*tls, const_cast<void*>(d));
>   assert(errorcode != 0);
> +  (void)errorcode;
> }
> 
> void ThreadLocalImpl::removeInstance() {
> 
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From foldr at codedgers.com  Tue Oct 19 11:47:15 2010
From: foldr at codedgers.com (Mikhail Glushenkov)
Date: Tue, 19 Oct 2010 16:47:15 -0000
Subject: [llvm-commits] [llvm] r116811 -
	/llvm/trunk/include/llvm/GlobalVariable.h
Message-ID: <20101019164715.31E492A6C12C@llvm.org>

Author: foldr
Date: Tue Oct 19 11:47:15 2010
New Revision: 116811

URL: http://llvm.org/viewvc/llvm-project?rev=116811&view=rev
Log:
Trailing whitespace.

Modified:
    llvm/trunk/include/llvm/GlobalVariable.h

Modified: llvm/trunk/include/llvm/GlobalVariable.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/GlobalVariable.h?rev=116811&r1=116810&r2=116811&view=diff
==============================================================================
--- llvm/trunk/include/llvm/GlobalVariable.h (original)
+++ llvm/trunk/include/llvm/GlobalVariable.h Tue Oct 19 11:47:15 2010
@@ -68,7 +68,7 @@
   /// Provide fast operand accessors
   DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value);
 
-  /// isDeclaration - Is this global variable lacking an initializer?  If so, 
+  /// isDeclaration - Is this global variable lacking an initializer?  If so,
   /// the global variable is defined in some other translation unit, and is thus
   /// only a declaration here.
   virtual bool isDeclaration() const { return getNumOperands() == 0; }



From foldr at codedgers.com  Tue Oct 19 11:47:23 2010
From: foldr at codedgers.com (Mikhail Glushenkov)
Date: Tue, 19 Oct 2010 16:47:23 -0000
Subject: [llvm-commits] [llvm] r116812 - in /llvm/trunk:
 include/llvm/GlobalVariable.h lib/Transforms/IPO/GlobalOpt.cpp
 test/Transforms/GlobalOpt/2010-10-19-WeakOdr.ll
Message-ID: <20101019164724.0CD4E2A6C12C@llvm.org>

Author: foldr
Date: Tue Oct 19 11:47:23 2010
New Revision: 116812

URL: http://llvm.org/viewvc/llvm-project?rev=116812&view=rev
Log:
GlobalOpt: EvaluateFunction() must not evaluate stores to weak_odr globals.

Fixes PR8389.

Added:
    llvm/trunk/test/Transforms/GlobalOpt/2010-10-19-WeakOdr.ll
Modified:
    llvm/trunk/include/llvm/GlobalVariable.h
    llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp

Modified: llvm/trunk/include/llvm/GlobalVariable.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/GlobalVariable.h?rev=116812&r1=116811&r2=116812&view=diff
==============================================================================
--- llvm/trunk/include/llvm/GlobalVariable.h (original)
+++ llvm/trunk/include/llvm/GlobalVariable.h Tue Oct 19 11:47:23 2010
@@ -80,7 +80,21 @@
   inline bool hasInitializer() const { return !isDeclaration(); }
 
   /// hasDefinitiveInitializer - Whether the global variable has an initializer,
-  /// and this is the initializer that will be used in the final executable.
+  /// and any other instances of the global (this can happen due to weak
+  /// linkage) are guaranteed to have the same initializer.
+  ///
+  /// Note that if you want to transform a global, you must use
+  /// hasUniqueInitializer() instead, because of the *_odr linkage type.
+  ///
+  /// Example:
+  ///
+  /// @a = global SomeType* null - Initializer is both definitive and unique.
+  ///
+  /// @b = global weak SomeType* null - Initializer is neither definitive nor
+  /// unique.
+  ///
+  /// @c = global weak_odr SomeType* null - Initializer is definitive, but not
+  /// unique.
   inline bool hasDefinitiveInitializer() const {
     return hasInitializer() &&
       // The initializer of a global variable with weak linkage may change at
@@ -88,6 +102,19 @@
       !mayBeOverridden();
   }
 
+  /// hasUniqueInitializer - Whether the global variable has an initializer, and
+  /// any changes made to the initializer will turn up in the final executable.
+  inline bool hasUniqueInitializer() const {
+    return hasInitializer() &&
+      // It's not safe to modify initializers of global variables with weak
+      // linkage, because the linker might choose to discard the initializer and
+      // use the initializer from another instance of the global variable
+      // instead. It is wrong to modify the initializer of a global variable
+      // with *_odr linkage because then different instances of the global may
+      // have different initializers, breaking the One Definition Rule.
+      !isWeakForLinker();
+  }
+
   /// getInitializer - Return the initializer for this global variable.  It is
   /// illegal to call this method if the global is external, because we cannot
   /// tell what the value is initialized to!

Modified: llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp?rev=116812&r1=116811&r2=116812&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp Tue Oct 19 11:47:23 2010
@@ -1944,8 +1944,9 @@
           FTy->isVarArg() || FTy->getNumParams() != 0)
         return 0;
 
-      // Verify that the initializer is simple enough for us to handle.
-      if (!I->hasDefinitiveInitializer()) return 0;
+      // Verify that the initializer is simple enough for us to handle. We are
+      // only allowed to optimize the initializer if it is unique.
+      if (!I->hasUniqueInitializer()) return 0;
       ConstantArray *CA = dyn_cast<ConstantArray>(I->getInitializer());
       if (!CA) return 0;
       for (User::op_iterator i = CA->op_begin(), e = CA->op_end(); i != e; ++i)
@@ -2062,9 +2063,9 @@
     return false;
 
   if (GlobalVariable *GV = dyn_cast<GlobalVariable>(C))
-    // Do not allow weak/linkonce/dllimport/dllexport linkage or
+    // Do not allow weak/*_odr/linkonce/dllimport/dllexport linkage or
     // external globals.
-    return GV->hasDefinitiveInitializer();
+    return GV->hasUniqueInitializer();
 
   if (ConstantExpr *CE = dyn_cast<ConstantExpr>(C))
     // Handle a constantexpr gep.
@@ -2072,9 +2073,9 @@
         isa<GlobalVariable>(CE->getOperand(0)) &&
         cast<GEPOperator>(CE)->isInBounds()) {
       GlobalVariable *GV = cast<GlobalVariable>(CE->getOperand(0));
-      // Do not allow weak/linkonce/dllimport/dllexport linkage or
+      // Do not allow weak/*_odr/linkonce/dllimport/dllexport linkage or
       // external globals.
-      if (!GV->hasDefinitiveInitializer())
+      if (!GV->hasUniqueInitializer())
         return false;
 
       // The first index must be zero.

Added: llvm/trunk/test/Transforms/GlobalOpt/2010-10-19-WeakOdr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GlobalOpt/2010-10-19-WeakOdr.ll?rev=116812&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/GlobalOpt/2010-10-19-WeakOdr.ll (added)
+++ llvm/trunk/test/Transforms/GlobalOpt/2010-10-19-WeakOdr.ll Tue Oct 19 11:47:23 2010
@@ -0,0 +1,16 @@
+; RUN: opt < %s -globalopt -S | FileCheck %s
+
+; PR8389: Globals with weak_odr linkage type must not be modified
+
+; CHECK: weak_odr global i32 0
+
+ at SomeVar = weak_odr global i32 0
+
+ at llvm.global_ctors = appending global [1 x { i32, void ()* }] [ { i32, void ()* } { i32 65535, void ()* @CTOR } ]
+
+define internal void @CTOR() {
+  store i32 23, i32* @SomeVar
+  ret void
+}
+
+



From gohman at apple.com  Tue Oct 19 12:06:23 2010
From: gohman at apple.com (Dan Gohman)
Date: Tue, 19 Oct 2010 17:06:23 -0000
Subject: [llvm-commits] [llvm] r116815 - in /llvm/trunk/lib:
 Analysis/AliasAnalysis.cpp Analysis/AliasAnalysisEvaluator.cpp
 Analysis/Lint.cpp Transforms/Scalar/DeadStoreElimination.cpp
 Transforms/Scalar/MemCpyOptimizer.cpp
Message-ID: <20101019170623.4069A2A6C12C@llvm.org>

Author: djg
Date: Tue Oct 19 12:06:23 2010
New Revision: 116815

URL: http://llvm.org/viewvc/llvm-project?rev=116815&view=rev
Log:
Consistently use AliasAnalysis::UnknownSize instead of hardcoding ~0u.

Modified:
    llvm/trunk/lib/Analysis/AliasAnalysis.cpp
    llvm/trunk/lib/Analysis/AliasAnalysisEvaluator.cpp
    llvm/trunk/lib/Analysis/Lint.cpp
    llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp
    llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp

Modified: llvm/trunk/lib/Analysis/AliasAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/AliasAnalysis.cpp?rev=116815&r1=116814&r2=116815&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/AliasAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/AliasAnalysis.cpp Tue Oct 19 12:06:23 2010
@@ -284,7 +284,7 @@
 /// if known, or a conservative value otherwise.
 ///
 unsigned AliasAnalysis::getTypeStoreSize(const Type *Ty) {
-  return TD ? TD->getTypeStoreSize(Ty) : ~0u;
+  return TD ? TD->getTypeStoreSize(Ty) : UnknownSize;
 }
 
 /// canBasicBlockModify - Return true if it is possible for execution of the

Modified: llvm/trunk/lib/Analysis/AliasAnalysisEvaluator.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/AliasAnalysisEvaluator.cpp?rev=116815&r1=116814&r2=116815&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/AliasAnalysisEvaluator.cpp (original)
+++ llvm/trunk/lib/Analysis/AliasAnalysisEvaluator.cpp Tue Oct 19 12:06:23 2010
@@ -166,12 +166,12 @@
   // iterate over the worklist, and run the full (n^2)/2 disambiguations
   for (SetVector<Value *>::iterator I1 = Pointers.begin(), E = Pointers.end();
        I1 != E; ++I1) {
-    unsigned I1Size = ~0u;
+    unsigned I1Size = AliasAnalysis::UnknownSize;
     const Type *I1ElTy = cast<PointerType>((*I1)->getType())->getElementType();
     if (I1ElTy->isSized()) I1Size = AA.getTypeStoreSize(I1ElTy);
 
     for (SetVector<Value *>::iterator I2 = Pointers.begin(); I2 != I1; ++I2) {
-      unsigned I2Size = ~0u;
+      unsigned I2Size = AliasAnalysis::UnknownSize;
       const Type *I2ElTy =cast<PointerType>((*I2)->getType())->getElementType();
       if (I2ElTy->isSized()) I2Size = AA.getTypeStoreSize(I2ElTy);
 
@@ -198,7 +198,7 @@
 
     for (SetVector<Value *>::iterator V = Pointers.begin(), Ve = Pointers.end();
          V != Ve; ++V) {
-      unsigned Size = ~0u;
+      unsigned Size = AliasAnalysis::UnknownSize;
       const Type *ElTy = cast<PointerType>((*V)->getType())->getElementType();
       if (ElTy->isSized()) Size = AA.getTypeStoreSize(ElTy);
 

Modified: llvm/trunk/lib/Analysis/Lint.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/Lint.cpp?rev=116815&r1=116814&r2=116815&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/Lint.cpp (original)
+++ llvm/trunk/lib/Analysis/Lint.cpp Tue Oct 19 12:06:23 2010
@@ -191,7 +191,8 @@
   Instruction &I = *CS.getInstruction();
   Value *Callee = CS.getCalledValue();
 
-  visitMemoryReference(I, Callee, ~0u, 0, 0, MemRef::Callee);
+  visitMemoryReference(I, Callee, AliasAnalysis::UnknownSize,
+                       0, 0, MemRef::Callee);
 
   if (Function *F = dyn_cast<Function>(findValue(Callee, /*OffsetOk=*/false))) {
     Assert1(CS.getCallingConv() == F->getCallingConv(),
@@ -264,9 +265,11 @@
     case Intrinsic::memcpy: {
       MemCpyInst *MCI = cast<MemCpyInst>(&I);
       // TODO: If the size is known, use it.
-      visitMemoryReference(I, MCI->getDest(), ~0u, MCI->getAlignment(), 0,
+      visitMemoryReference(I, MCI->getDest(), AliasAnalysis::UnknownSize,
+                           MCI->getAlignment(), 0,
                            MemRef::Write);
-      visitMemoryReference(I, MCI->getSource(), ~0u, MCI->getAlignment(), 0,
+      visitMemoryReference(I, MCI->getSource(), AliasAnalysis::UnknownSize,
+                           MCI->getAlignment(), 0,
                            MemRef::Read);
 
       // Check that the memcpy arguments don't overlap. The AliasAnalysis API
@@ -286,16 +289,19 @@
     case Intrinsic::memmove: {
       MemMoveInst *MMI = cast<MemMoveInst>(&I);
       // TODO: If the size is known, use it.
-      visitMemoryReference(I, MMI->getDest(), ~0u, MMI->getAlignment(), 0,
+      visitMemoryReference(I, MMI->getDest(), AliasAnalysis::UnknownSize,
+                           MMI->getAlignment(), 0,
                            MemRef::Write);
-      visitMemoryReference(I, MMI->getSource(), ~0u, MMI->getAlignment(), 0,
+      visitMemoryReference(I, MMI->getSource(), AliasAnalysis::UnknownSize,
+                           MMI->getAlignment(), 0,
                            MemRef::Read);
       break;
     }
     case Intrinsic::memset: {
       MemSetInst *MSI = cast<MemSetInst>(&I);
       // TODO: If the size is known, use it.
-      visitMemoryReference(I, MSI->getDest(), ~0u, MSI->getAlignment(), 0,
+      visitMemoryReference(I, MSI->getDest(), AliasAnalysis::UnknownSize,
+                           MSI->getAlignment(), 0,
                            MemRef::Write);
       break;
     }
@@ -305,24 +311,26 @@
               "Undefined behavior: va_start called in a non-varargs function",
               &I);
 
-      visitMemoryReference(I, CS.getArgument(0), ~0u, 0, 0,
-                           MemRef::Read | MemRef::Write);
+      visitMemoryReference(I, CS.getArgument(0), AliasAnalysis::UnknownSize,
+                           0, 0, MemRef::Read | MemRef::Write);
       break;
     case Intrinsic::vacopy:
-      visitMemoryReference(I, CS.getArgument(0), ~0u, 0, 0, MemRef::Write);
-      visitMemoryReference(I, CS.getArgument(1), ~0u, 0, 0, MemRef::Read);
+      visitMemoryReference(I, CS.getArgument(0), AliasAnalysis::UnknownSize,
+                           0, 0, MemRef::Write);
+      visitMemoryReference(I, CS.getArgument(1), AliasAnalysis::UnknownSize,
+                           0, 0, MemRef::Read);
       break;
     case Intrinsic::vaend:
-      visitMemoryReference(I, CS.getArgument(0), ~0u, 0, 0,
-                           MemRef::Read | MemRef::Write);
+      visitMemoryReference(I, CS.getArgument(0), AliasAnalysis::UnknownSize,
+                           0, 0, MemRef::Read | MemRef::Write);
       break;
 
     case Intrinsic::stackrestore:
       // Stackrestore doesn't read or write memory, but it sets the
       // stack pointer, which the compiler may read from or write to
       // at any time, so check it for both readability and writeability.
-      visitMemoryReference(I, CS.getArgument(0), ~0u, 0, 0,
-                           MemRef::Read | MemRef::Write);
+      visitMemoryReference(I, CS.getArgument(0), AliasAnalysis::UnknownSize,
+                           0, 0, MemRef::Read | MemRef::Write);
       break;
     }
 }
@@ -495,12 +503,13 @@
 }
 
 void Lint::visitVAArgInst(VAArgInst &I) {
-  visitMemoryReference(I, I.getOperand(0), ~0u, 0, 0,
+  visitMemoryReference(I, I.getOperand(0), AliasAnalysis::UnknownSize, 0, 0,
                        MemRef::Read | MemRef::Write);
 }
 
 void Lint::visitIndirectBrInst(IndirectBrInst &I) {
-  visitMemoryReference(I, I.getAddress(), ~0u, 0, 0, MemRef::Branchee);
+  visitMemoryReference(I, I.getAddress(), AliasAnalysis::UnknownSize, 0, 0,
+                       MemRef::Branchee);
 
   Assert1(I.getNumDestinations() != 0,
           "Undefined behavior: indirectbr with no destinations", &I);

Modified: llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp?rev=116815&r1=116814&r2=116815&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp Tue Oct 19 12:06:23 2010
@@ -59,7 +59,7 @@
     bool handleFreeWithNonTrivialDependency(const CallInst *F,
                                             MemDepResult Dep);
     bool handleEndBlock(BasicBlock &BB);
-    bool RemoveUndeadPointers(Value *Ptr, uint64_t killPointerSize,
+    bool RemoveUndeadPointers(Value *Ptr, unsigned killPointerSize,
                               BasicBlock::iterator &BBI,
                               SmallPtrSet<Value*, 64> &deadPointers);
     void DeleteDeadInstruction(Instruction *I,
@@ -371,7 +371,7 @@
     }
     
     Value *killPointer = 0;
-    uint64_t killPointerSize = ~0UL;
+    unsigned killPointerSize = AliasAnalysis::UnknownSize;
     
     // If we encounter a use of the pointer, it is no longer considered dead
     if (LoadInst *L = dyn_cast<LoadInst>(BBI)) {
@@ -470,7 +470,7 @@
 
 /// RemoveUndeadPointers - check for uses of a pointer that make it
 /// undead when scanning for dead stores to alloca's.
-bool DSE::RemoveUndeadPointers(Value *killPointer, uint64_t killPointerSize,
+bool DSE::RemoveUndeadPointers(Value *killPointer, unsigned killPointerSize,
                                BasicBlock::iterator &BBI,
                                SmallPtrSet<Value*, 64> &deadPointers) {
   AliasAnalysis &AA = getAnalysis<AliasAnalysis>();
@@ -575,5 +575,5 @@
       return TD->getTypeAllocSize(PT->getElementType());
     }
   }
-  return ~0U;
+  return AliasAnalysis::UnknownSize;
 }

Modified: llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp?rev=116815&r1=116814&r2=116815&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp Tue Oct 19 12:06:23 2010
@@ -770,7 +770,7 @@
 
   // If the memmove is a constant size, use it for the alias query, this allows
   // us to optimize things like: memmove(P, P+64, 64);
-  uint64_t MemMoveSize = ~0ULL;
+  unsigned MemMoveSize = AliasAnalysis::UnknownSize;
   if (ConstantInt *Len = dyn_cast<ConstantInt>(M->getLength()))
     MemMoveSize = Len->getZExtValue();
   



From daniel at zuster.org  Tue Oct 19 12:14:24 2010
From: daniel at zuster.org (Daniel Dunbar)
Date: Tue, 19 Oct 2010 17:14:24 -0000
Subject: [llvm-commits] [llvm] r116816 - in /llvm/trunk:
 include/llvm/Target/TargetInstrInfo.h lib/CodeGen/MachineLICM.cpp
 lib/Target/ARM/ARMBaseInstrInfo.cpp lib/Target/ARM/ARMBaseInstrInfo.h
 lib/Target/X86/X86InstrInfo.cpp lib/Target/X86/X86InstrInfo.h
 test/CodeGen/ARM/remat.ll test/CodeGen/Thumb2/machine-licm-vdup.ll
 test/CodeGen/X86/2008-10-27-CoalescerBug.ll
 test/CodeGen/X86/2009-02-26-MachineLICMBug.ll
Message-ID: <20101019171424.56B6F2A6C12C@llvm.org>

Author: ddunbar
Date: Tue Oct 19 12:14:24 2010
New Revision: 116816

URL: http://llvm.org/viewvc/llvm-project?rev=116816&view=rev
Log:
Revert r116781 "- Add a hook for target to determine whether an instruction def
is", which breaks some nightly tests.

Added:
    llvm/trunk/test/CodeGen/ARM/remat.ll
Modified:
    llvm/trunk/include/llvm/Target/TargetInstrInfo.h
    llvm/trunk/lib/CodeGen/MachineLICM.cpp
    llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
    llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h
    llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
    llvm/trunk/lib/Target/X86/X86InstrInfo.h
    llvm/trunk/test/CodeGen/Thumb2/machine-licm-vdup.ll
    llvm/trunk/test/CodeGen/X86/2008-10-27-CoalescerBug.ll
    llvm/trunk/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll

Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=116816&r1=116815&r2=116816&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Tue Oct 19 12:14:24 2010
@@ -24,7 +24,6 @@
 class LiveVariables;
 class MCAsmInfo;
 class MachineMemOperand;
-class MachineRegisterInfo;
 class MDNode;
 class MCInst;
 class SDNode;
@@ -626,19 +625,6 @@
   int getOperandLatency(const InstrItineraryData *ItinData,
                         SDNode *DefNode, unsigned DefIdx,
                         SDNode *UseNode, unsigned UseIdx) const;
-
-  /// hasHighOperandLatency - Compute operand latency between a def of 'Reg'
-  /// and an use in the current loop, return true if the target considered
-  /// it 'high'. This is used by optimization passes such as machine LICM to
-  /// determine whether it makes sense to hoist an instruction out even in
-  /// high register pressure situation.
-  virtual
-  bool hasHighOperandLatency(const InstrItineraryData *ItinData,
-                             const MachineRegisterInfo *MRI,
-                             const MachineInstr *DefMI, unsigned DefIdx,
-                             const MachineInstr *UseMI, unsigned UseIdx) const {
-    return false;
-  }
 };
 
 /// TargetInstrInfoImpl - This is the default implementation of

Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=116816&r1=116815&r2=116816&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Tue Oct 19 12:14:24 2010
@@ -43,6 +43,11 @@
 
 using namespace llvm;
 
+static cl::opt<bool>
+TrackRegPressure("rp-aware-machine-licm",
+                 cl::desc("Register pressure aware machine LICM"),
+                 cl::init(false), cl::Hidden);
+
 STATISTIC(NumHoisted,
           "Number of machine instructions hoisted out of loops");
 STATISTIC(NumLowRP,
@@ -119,7 +124,6 @@
       RegSeen.clear();
       RegPressure.clear();
       RegLimit.clear();
-      BackTrace.clear();
       for (DenseMap<unsigned,std::vector<const MachineInstr*> >::iterator
              CI = CSEMap.begin(), CE = CSEMap.end(); CI != CE; ++CI)
         CI->second.clear();
@@ -167,10 +171,9 @@
     /// 
     bool IsLoopInvariantInst(MachineInstr &I);
 
-    /// HasHighOperandLatency - Compute operand latency between a def of 'Reg'
-    /// and an use in the current loop, return true if the target considered
-    /// it 'high'.
-    bool HasHighOperandLatency(MachineInstr &MI, unsigned DefIdx, unsigned Reg);
+    /// ComputeOperandLatency - Compute operand latency between a def of 'Reg'
+    /// and an use in the current loop.
+    int ComputeOperandLatency(MachineInstr &MI, unsigned DefIdx, unsigned Reg);
 
     /// IncreaseHighRegPressure - Visit BBs from preheader to current BB, check
     /// if hoisting an instruction of the given cost matrix can cause high
@@ -553,24 +556,28 @@
   if (!Preheader)
     return;
 
-  if (IsHeader) {
-    // Compute registers which are liveout of preheader.
-    RegSeen.clear();
-    BackTrace.clear();
-    InitRegPressure(Preheader);
-  }
+  if (TrackRegPressure) {
+    if (IsHeader) {
+      // Compute registers which are liveout of preheader.
+      RegSeen.clear();
+      BackTrace.clear();
+      InitRegPressure(Preheader);
+    }
 
-  // Remember livein register pressure.
-  BackTrace.push_back(RegPressure);
+    // Remember livein register pressure.
+    BackTrace.push_back(RegPressure);
+  }
 
   for (MachineBasicBlock::iterator
          MII = BB->begin(), E = BB->end(); MII != E; ) {
     MachineBasicBlock::iterator NextMII = MII; ++NextMII;
     MachineInstr *MI = &*MII;
 
-    UpdateRegPressureBefore(MI);
+    if (TrackRegPressure)
+      UpdateRegPressureBefore(MI);
     Hoist(MI, Preheader);
-    UpdateRegPressureAfter(MI);
+    if (TrackRegPressure)
+      UpdateRegPressureAfter(MI);
 
     MII = NextMII;
   }
@@ -584,7 +591,8 @@
       HoistRegion(Children[I]);
   }
 
-  BackTrace.pop_back();
+  if (TrackRegPressure)
+    BackTrace.pop_back();
 }
 
 /// InitRegPressure - Find all virtual register references that are liveout of
@@ -780,14 +788,15 @@
   }
 }
 
-/// HasHighOperandLatency - Compute operand latency between a def of 'Reg'
-/// and an use in the current loop, return true if the target considered
-/// it 'high'.
-bool MachineLICM::HasHighOperandLatency(MachineInstr &MI,
-                                        unsigned DefIdx, unsigned Reg) {
+/// ComputeOperandLatency - Compute operand latency between a def of 'Reg'
+/// and an use in the current loop.
+int MachineLICM::ComputeOperandLatency(MachineInstr &MI,
+                                       unsigned DefIdx, unsigned Reg) {
   if (MRI->use_nodbg_empty(Reg))
-    return false;
+    // No use? Return arbitrary large number!
+    return 300;
 
+  int Latency = -1;
   for (MachineRegisterInfo::use_nodbg_iterator I = MRI->use_nodbg_begin(Reg),
          E = MRI->use_nodbg_end(); I != E; ++I) {
     MachineInstr *UseMI = &*I;
@@ -801,15 +810,18 @@
       if (MOReg != Reg)
         continue;
 
-      if (TII->hasHighOperandLatency(InstrItins, MRI, &MI, DefIdx, UseMI, i))
-        return true;
+      int UseCycle = TII->getOperandLatency(InstrItins, &MI, DefIdx, UseMI, i);
+      Latency = std::max(Latency, UseCycle);
     }
 
-    // Only look at the first in loop use.
-    break;
+    if (Latency != -1)
+      break;
   }
 
-  return false;
+  if (Latency == -1)
+    Latency = InstrItins->getOperandCycle(MI.getDesc().getSchedClass(), DefIdx);
+
+  return Latency;
 }
 
 /// IncreaseHighRegPressure - Visit BBs from preheader to current BB, check
@@ -843,19 +855,19 @@
   if (MI.isImplicitDef())
     return true;
 
-  // If the instruction is cheap, only hoist if it is re-materilizable. LICM
-  // will increase register pressure. It's probably not worth it if the
-  // instruction is cheap.
+  // FIXME: For now, only hoist re-materilizable instructions. LICM will
+  // increase register pressure. We want to make sure it doesn't increase
+  // spilling.
   // Also hoist loads from constant memory, e.g. load from stubs, GOT. Hoisting
   // these tend to help performance in low register pressure situation. The
   // trade off is it may cause spill in high pressure situation. It will end up
   // adding a store in the loop preheader. But the reload is no more expensive.
   // The side benefit is these loads are frequently CSE'ed.
-  if (MI.getDesc().isAsCheapAsAMove()) {
-    if (!TII->isTriviallyReMaterializable(&MI, AA))
+  if (!TrackRegPressure || MI.getDesc().isAsCheapAsAMove()) {
+    if (!TII->isTriviallyReMaterializable(&MI, AA) &&
+        !isLoadFromConstantMemory(&MI))
       return false;
   } else {
-    // Estimate register pressure to determine whether to LICM the instruction.
     // In low register pressure situation, we can be more aggressive about 
     // hoisting. Also, favors hoisting long latency instructions even in
     // moderately high pressure situation.
@@ -868,9 +880,13 @@
       if (!Reg || TargetRegisterInfo::isPhysicalRegister(Reg))
         continue;
       if (MO.isDef()) {
-        if (HasHighOperandLatency(MI, i, Reg)) {
-          ++NumHighLatency;
-          return true;
+        if (InstrItins && !InstrItins->isEmpty()) {
+          int Cycle = ComputeOperandLatency(MI, i, Reg);
+          if (Cycle > 3) {
+            // FIXME: Target specific high latency limit?
+            ++NumHighLatency;
+            return true;
+          }
         }
 
         const TargetRegisterClass *RC = MRI->getRegClass(Reg);

Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=116816&r1=116815&r2=116816&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Tue Oct 19 12:14:24 2010
@@ -1925,23 +1925,3 @@
   return getOperandLatency(ItinData, DefTID, DefIdx, DefAlign,
                            UseTID, UseIdx, UseAlign);
 }
-
-bool ARMBaseInstrInfo::
-hasHighOperandLatency(const InstrItineraryData *ItinData,
-                      const MachineRegisterInfo *MRI,
-                      const MachineInstr *DefMI, unsigned DefIdx,
-                      const MachineInstr *UseMI, unsigned UseIdx) const {
-  unsigned DDomain = DefMI->getDesc().TSFlags & ARMII::DomainMask;
-  unsigned UDomain = UseMI->getDesc().TSFlags & ARMII::DomainMask;
-  if (Subtarget.isCortexA8() &&
-      (DDomain == ARMII::DomainVFP || UDomain == ARMII::DomainVFP))
-    // CortexA8 VFP instructions are not pipelined.
-    return true;
-
-  // Hoist VFP / NEON instructions with 4 or higher latency.
-  int Latency = getOperandLatency(ItinData, DefMI, DefIdx, UseMI, UseIdx);
-  if (Latency <= 3)
-    return false;
-  return DDomain == ARMII::DomainVFP || DDomain == ARMII::DomainNEON ||
-         UDomain == ARMII::DomainVFP || UDomain == ARMII::DomainNEON;
-}

Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h?rev=116816&r1=116815&r2=116816&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h Tue Oct 19 12:14:24 2010
@@ -377,11 +377,6 @@
                         unsigned DefIdx, unsigned DefAlign,
                         const TargetInstrDesc &UseTID,
                         unsigned UseIdx, unsigned UseAlign) const;
-
-  bool hasHighOperandLatency(const InstrItineraryData *ItinData,
-                             const MachineRegisterInfo *MRI,
-                             const MachineInstr *DefMI, unsigned DefIdx,
-                             const MachineInstr *UseMI, unsigned UseIdx) const;
 };
 
 static inline

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=116816&r1=116815&r2=116816&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Tue Oct 19 12:14:24 2010
@@ -3152,41 +3152,6 @@
   NopInst.setOpcode(X86::NOOP);
 }
 
-bool X86InstrInfo::
-hasHighOperandLatency(const InstrItineraryData *ItinData,
-                      const MachineRegisterInfo *MRI,
-                      const MachineInstr *DefMI, unsigned DefIdx,
-                      const MachineInstr *UseMI, unsigned UseIdx) const {
-  switch (DefMI->getOpcode()) {
-  default: return false;
-  case X86::DIVSDrm:
-  case X86::DIVSDrm_Int:
-  case X86::DIVSDrr:
-  case X86::DIVSDrr_Int:
-  case X86::DIVSSrm:
-  case X86::DIVSSrm_Int:
-  case X86::DIVSSrr:
-  case X86::DIVSSrr_Int:
-  case X86::SQRTPDm:
-  case X86::SQRTPDm_Int:
-  case X86::SQRTPDr:
-  case X86::SQRTPDr_Int:
-  case X86::SQRTPSm:
-  case X86::SQRTPSm_Int:
-  case X86::SQRTPSr:
-  case X86::SQRTPSr_Int:
-  case X86::SQRTSDm:
-  case X86::SQRTSDm_Int:
-  case X86::SQRTSDr:
-  case X86::SQRTSDr_Int:
-  case X86::SQRTSSm:
-  case X86::SQRTSSm_Int:
-  case X86::SQRTSSr:
-  case X86::SQRTSSr_Int:
-    return true;
-  }
-}
-
 namespace {
   /// CGBR - Create Global Base Reg pass. This initializes the PIC
   /// global base register for x86-32.

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.h?rev=116816&r1=116815&r2=116816&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.h (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.h Tue Oct 19 12:14:24 2010
@@ -864,11 +864,6 @@
                                       unsigned OpNum,
                                       const SmallVectorImpl<MachineOperand> &MOs,
                                       unsigned Size, unsigned Alignment) const;
-
-  bool hasHighOperandLatency(const InstrItineraryData *ItinData,
-                             const MachineRegisterInfo *MRI,
-                             const MachineInstr *DefMI, unsigned DefIdx,
-                             const MachineInstr *UseMI, unsigned UseIdx) const;
   
 private:
   MachineInstr * convertToThreeAddressWithLEA(unsigned MIOpc,

Added: llvm/trunk/test/CodeGen/ARM/remat.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/remat.ll?rev=116816&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/remat.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/remat.ll Tue Oct 19 12:14:24 2010
@@ -0,0 +1,65 @@
+; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 -o /dev/null -stats -info-output-file - | grep "Number of re-materialization"
+
+define i32 @main(i32 %argc, i8** nocapture %argv, double %d1, double %d2) nounwind {
+entry:
+  br i1 undef, label %smvp.exit, label %bb.i3
+
+bb.i3:                                            ; preds = %bb.i3, %bb134
+  br i1 undef, label %smvp.exit, label %bb.i3
+
+smvp.exit:                                        ; preds = %bb.i3
+  %0 = fmul double %d1, 2.400000e-03            ; <double> [#uses=2]
+  br i1 undef, label %bb138.preheader, label %bb159
+
+bb138.preheader:                                  ; preds = %smvp.exit
+  br label %bb138
+
+bb138:                                            ; preds = %bb138, %bb138.preheader
+  br i1 undef, label %bb138, label %bb145.loopexit
+
+bb142:                                            ; preds = %bb.nph218.bb.nph218.split_crit_edge, %phi0.exit
+  %1 = fmul double %d1, -1.200000e-03           ; <double> [#uses=1]
+  %2 = fadd double %d2, %1                      ; <double> [#uses=1]
+  %3 = fmul double %2, %d2                      ; <double> [#uses=1]
+  %4 = fsub double 0.000000e+00, %3               ; <double> [#uses=1]
+  br i1 %14, label %phi1.exit, label %bb.i35
+
+bb.i35:                                           ; preds = %bb142
+  %5 = call  double @sin(double %15) nounwind readonly ; <double> [#uses=1]
+  %6 = fmul double %5, 0x4031740AFA84AD8A         ; <double> [#uses=1]
+  %7 = fsub double 1.000000e+00, undef            ; <double> [#uses=1]
+  %8 = fdiv double %7, 6.000000e-01               ; <double> [#uses=1]
+  br label %phi1.exit
+
+phi1.exit:                                        ; preds = %bb.i35, %bb142
+  %.pn = phi double [ %6, %bb.i35 ], [ 0.000000e+00, %bb142 ] ; <double> [#uses=1]
+  %9 = phi double [ %8, %bb.i35 ], [ 0.000000e+00, %bb142 ] ; <double> [#uses=1]
+  %10 = fmul double %.pn, %9                      ; <double> [#uses=1]
+  br i1 %14, label %phi0.exit, label %bb.i
+
+bb.i:                                             ; preds = %phi1.exit
+  unreachable
+
+phi0.exit:                                        ; preds = %phi1.exit
+  %11 = fsub double %4, %10                       ; <double> [#uses=1]
+  %12 = fadd double 0.000000e+00, %11             ; <double> [#uses=1]
+  store double %12, double* undef, align 4
+  br label %bb142
+
+bb145.loopexit:                                   ; preds = %bb138
+  br i1 undef, label %bb.nph218.bb.nph218.split_crit_edge, label %bb159
+
+bb.nph218.bb.nph218.split_crit_edge:              ; preds = %bb145.loopexit
+  %13 = fmul double %0, 0x401921FB54442D18        ; <double> [#uses=1]
+  %14 = fcmp ugt double %0, 6.000000e-01          ; <i1> [#uses=2]
+  %15 = fdiv double %13, 6.000000e-01             ; <double> [#uses=1]
+  br label %bb142
+
+bb159:                                            ; preds = %bb145.loopexit, %smvp.exit, %bb134
+  unreachable
+
+bb166:                                            ; preds = %bb127
+  unreachable
+}
+
+declare double @sin(double) nounwind readonly

Modified: llvm/trunk/test/CodeGen/Thumb2/machine-licm-vdup.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/machine-licm-vdup.ll?rev=116816&r1=116815&r2=116816&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/machine-licm-vdup.ll (original)
+++ llvm/trunk/test/CodeGen/Thumb2/machine-licm-vdup.ll Tue Oct 19 12:14:24 2010
@@ -2,16 +2,17 @@
 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -relocation-model=pic -disable-fp-elim -arm-vdup-splat | FileCheck %s 
 ; Modified version of machine-licm.ll with -arm-vdup-splat turned on, 8003375.
 ; Eventually this should become the default and be moved into machine-licm.ll.
+; FIXME: the vdup should be hoisted out of the loop, 8248029.
 
 define void @t2(i8* %ptr1, i8* %ptr2) nounwind {
 entry:
 ; CHECK: t2:
 ; CHECK: mov.w r3, #1065353216
-; CHECK: vdup.32 q{{.*}}, r3
   br i1 undef, label %bb1, label %bb2
 
 bb1:
 ; CHECK-NEXT: %bb1
+; CHECK: vdup.32 q{{.*}}, r3
   %indvar = phi i32 [ %indvar.next, %bb1 ], [ 0, %entry ]
   %tmp1 = shl i32 %indvar, 2
   %gep1 = getelementptr i8* %ptr1, i32 %tmp1

Modified: llvm/trunk/test/CodeGen/X86/2008-10-27-CoalescerBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-10-27-CoalescerBug.ll?rev=116816&r1=116815&r2=116816&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-10-27-CoalescerBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-10-27-CoalescerBug.ll Tue Oct 19 12:14:24 2010
@@ -1,9 +1,6 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -stats |& FileCheck %s
-; Now this test spills one register. But a reload in the loop is cheaper than
-; the divsd so it's a win.
+; RUN: llc < %s -march=x86 -mattr=+sse2 -stats |& not grep {Number of register spills}
 
 define fastcc void @fourn(double* %data, i32 %isign) nounwind {
-; CHECK: fourn
 entry:
 	br label %bb
 
@@ -14,11 +11,6 @@
 	%1 = icmp sgt i32 %0, 2		; <i1> [#uses=1]
 	br i1 %1, label %bb30.loopexit, label %bb
 
-; CHECK: %bb30.loopexit
-; CHECK: divsd %xmm0
-; CHECK: movsd %xmm0, 16(%esp)
-; CHECK: .align
-; CHECK-NEXT: %bb3
 bb3:		; preds = %bb30.loopexit, %bb25, %bb3
 	%2 = load i32* null, align 4		; <i32> [#uses=1]
 	%3 = mul i32 %2, 0		; <i32> [#uses=1]

Modified: llvm/trunk/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll?rev=116816&r1=116815&r2=116816&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll Tue Oct 19 12:14:24 2010
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse41 -stats |& grep {7 machine-licm}
+; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse41 -stats |& grep {6 machine-licm}
 ; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse41 | FileCheck %s
 ; rdar://6627786
 ; rdar://7792037



From aggarwa4 at illinois.edu  Tue Oct 19 12:17:44 2010
From: aggarwa4 at illinois.edu (Arushi Aggarwal)
Date: Tue, 19 Oct 2010 17:17:44 -0000
Subject: [llvm-commits] [poolalloc] r116818 -
	/poolalloc/trunk/lib/DSA/DSTest.cpp
Message-ID: <20101019171744.B33162A6C12C@llvm.org>

Author: aggarwa4
Date: Tue Oct 19 12:17:44 2010
New Revision: 116818

URL: http://llvm.org/viewvc/llvm-project?rev=116818&view=rev
Log:
Allow for checking of call graph.

Modified:
    poolalloc/trunk/lib/DSA/DSTest.cpp

Modified: poolalloc/trunk/lib/DSA/DSTest.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/DSTest.cpp?rev=116818&r1=116817&r2=116818&view=diff
==============================================================================
--- poolalloc/trunk/lib/DSA/DSTest.cpp (original)
+++ poolalloc/trunk/lib/DSA/DSTest.cpp Tue Oct 19 12:17:44 2010
@@ -36,6 +36,7 @@
 #include "dsa/DataStructure.h"
 #include "dsa/DSGraph.h"
 #include "dsa/DSNode.h"
+#include "dsa/DSCallGraph.h"
 #include "llvm/Module.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/Support/CommandLine.h"
@@ -62,6 +63,9 @@
   // For each value, verify that type is as given
   cl::list<std::string> CheckType("check-type",
       cl::CommaSeparated, cl::ReallyHidden);
+  // For first function, verify that it calls the other functions
+  cl::list<std::string> CheckCallees("check-callees",
+      cl::CommaSeparated, cl::ReallyHidden);
 }
 
 /// NodeValue -- represents a particular node in a DSGraph
@@ -197,7 +201,7 @@
 
     assert(V && "Parsing value failed!");
   }
-
+  
   /// stripAtIfRequired -- removes the leading '@' character if one exists
   ///
   StringRef stripAtIfRequired(StringRef v) {
@@ -534,9 +538,40 @@
     }
     return true;
   }
-
   return false;
+}
 
+/// checkCallees -- Verify callees for the given functions
+/// Returns true iff the user specified anything for this option
+///
+/// checks that the first function calls the rest of the 
+/// functions in the list
+static bool checkCallees(llvm::raw_ostream &O, const Module *M, const DataStructures *DS) {
+  
+  cl::list<std::string>::iterator I = CheckCallees.begin(),
+                                  E = CheckCallees.end();
+  // If the user specified that a set of values should be in the same node...
+  if (I != E) {
+      std::string &func = *(I);
+      Function *caller = M->getFunction(func);
+      assert(caller && "Function not found in module"); 
+      const DSCallGraph callgraph = DS->getCallGraph();
+      ++I;
+      while(I != E ){
+        std::string &func = *(I);
+        Function *callee = M->getFunction(func);
+        bool found = false;
+        for(DSCallGraph::flat_iterator CI = callgraph.flat_callee_begin(caller); CI != callgraph.flat_callee_end(caller); CI ++) {
+           if ( callee == *CI)
+             found = true;
+           //(*CI)->dump();
+        }
+        assert(found && "callee not in call graph");
+        ++I;
+      }
+    return true;
+  }
+  return false;
 }
 
 /// handleTest -- handles any user-specified testing options.
@@ -551,6 +586,7 @@
   tested |= checkIfNodesAreNotSame(O,M,this);
   tested |= verifyFlags(O,M,this);
   tested |= checkTypes(O,M,this);
+  tested |= checkCallees(O,M,this);
 
   return tested;
 }



From stoklund at 2pi.dk  Tue Oct 19 12:20:50 2010
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Tue, 19 Oct 2010 10:20:50 -0700
Subject: [llvm-commits] [PATCH] Shrink MachineOperand from 40 to 32 bytes
Message-ID: <02FBA740-0F28-4F5E-B8DF-7224FA2E19DF@2pi.dk>

Hi,

The attached patch shrinks MachineOperand from 40 to 32 bytes on 64-bit hosts.

The Contents union contains pointers, so it becomes 8-byte aligned. That creates padding because the largest member has two pointers and an unsigned.

The patch moves the unsigned outside the union in a way that makes it pack optimally on both 32-bit and 64-bit hosts.

It is a bit icky, so I wanted your opinions before committing.

I measured a (statistically significant) 0.8% speedup of code generation on 64-bit Darwin with the patch applied.

-------------- next part --------------
A non-text attachment was scrubbed...
Name: MachineOperand.patch
Type: application/octet-stream
Size: 3810 bytes
Desc: not available
Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101019/977d276f/attachment.obj 

From resistor at mac.com  Tue Oct 19 12:21:59 2010
From: resistor at mac.com (Owen Anderson)
Date: Tue, 19 Oct 2010 17:21:59 -0000
Subject: [llvm-commits] [llvm] r116820 - in /llvm/trunk: include/llvm/
 include/llvm/Analysis/ include/llvm/CodeGen/ include/llvm/Transforms/Utils/
 lib/Analysis/ lib/Analysis/IPA/ lib/CodeGen/ lib/CodeGen/SelectionDAG/
 lib/Target/ lib/Target/CBackend/ lib/Transforms/IPO/
 lib/Transforms/InstCombine/ lib/Transforms/Instrumentation/
 lib/Transforms/Scalar/ lib/Transforms/Utils/ lib/VMCore/ tools/bugpoint/
 tools/llvm-ld/ tools/opt/ unittests/VMCore/
Message-ID: <20101019172200.84AC92A6C12C@llvm.org>

Author: resistor
Date: Tue Oct 19 12:21:58 2010
New Revision: 116820

URL: http://llvm.org/viewvc/llvm-project?rev=116820&view=rev
Log:
Get rid of static constructors for pass registration.  Instead, every pass exposes an initializeMyPassFunction(), which
must be called in the pass's constructor.  This function uses static dependency declarations to recursively initialize
the pass's dependencies.

Clients that only create passes through the createFooPass() APIs will require no changes.  Clients that want to use the
CommandLine options for passes will need to manually call the appropriate initialization functions in PassInitialization.h
before parsing commandline arguments.

I have tested this with all standard configurations of clang and llvm-gcc on Darwin.  It is possible that there are problems
with the static dependencies that will only be visible with non-standard options.  If you encounter any crash in pass
registration/creation, please send the testcase to me directly.

Modified:
    llvm/trunk/include/llvm/Analysis/Dominators.h
    llvm/trunk/include/llvm/Analysis/FindUsedTypes.h
    llvm/trunk/include/llvm/Analysis/IntervalPartition.h
    llvm/trunk/include/llvm/Analysis/LazyValueInfo.h
    llvm/trunk/include/llvm/Analysis/LibCallAliasAnalysis.h
    llvm/trunk/include/llvm/Analysis/LoopDependenceAnalysis.h
    llvm/trunk/include/llvm/Analysis/LoopInfo.h
    llvm/trunk/include/llvm/Analysis/PostDominators.h
    llvm/trunk/include/llvm/CodeGen/CalcSpillWeights.h
    llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h
    llvm/trunk/include/llvm/CodeGen/LiveStackAnalysis.h
    llvm/trunk/include/llvm/CodeGen/LiveVariables.h
    llvm/trunk/include/llvm/CodeGen/MachineLoopInfo.h
    llvm/trunk/include/llvm/CodeGen/ProcessImplicitDefs.h
    llvm/trunk/include/llvm/CodeGen/SlotIndexes.h
    llvm/trunk/include/llvm/InitializePasses.h
    llvm/trunk/include/llvm/PassSupport.h
    llvm/trunk/include/llvm/Transforms/Utils/UnifyFunctionExitNodes.h
    llvm/trunk/lib/Analysis/AliasAnalysis.cpp
    llvm/trunk/lib/Analysis/AliasAnalysisCounter.cpp
    llvm/trunk/lib/Analysis/AliasAnalysisEvaluator.cpp
    llvm/trunk/lib/Analysis/AliasDebugger.cpp
    llvm/trunk/lib/Analysis/AliasSetTracker.cpp
    llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp
    llvm/trunk/lib/Analysis/CFGPrinter.cpp
    llvm/trunk/lib/Analysis/DbgInfoPrinter.cpp
    llvm/trunk/lib/Analysis/DomPrinter.cpp
    llvm/trunk/lib/Analysis/IPA/CallGraph.cpp
    llvm/trunk/lib/Analysis/IPA/GlobalsModRef.cpp
    llvm/trunk/lib/Analysis/IVUsers.cpp
    llvm/trunk/lib/Analysis/InstCount.cpp
    llvm/trunk/lib/Analysis/Lint.cpp
    llvm/trunk/lib/Analysis/LiveValues.cpp
    llvm/trunk/lib/Analysis/MemDepPrinter.cpp
    llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp
    llvm/trunk/lib/Analysis/ModuleDebugInfoPrinter.cpp
    llvm/trunk/lib/Analysis/ProfileEstimatorPass.cpp
    llvm/trunk/lib/Analysis/ProfileInfo.cpp
    llvm/trunk/lib/Analysis/ProfileInfoLoaderPass.cpp
    llvm/trunk/lib/Analysis/ProfileVerifierPass.cpp
    llvm/trunk/lib/Analysis/RegionInfo.cpp
    llvm/trunk/lib/Analysis/RegionPrinter.cpp
    llvm/trunk/lib/Analysis/ScalarEvolution.cpp
    llvm/trunk/lib/Analysis/ScalarEvolutionAliasAnalysis.cpp
    llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp
    llvm/trunk/lib/CodeGen/CodeGen.cpp
    llvm/trunk/lib/CodeGen/DeadMachineInstructionElim.cpp
    llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp
    llvm/trunk/lib/CodeGen/GCMetadata.cpp
    llvm/trunk/lib/CodeGen/GCStrategy.cpp
    llvm/trunk/lib/CodeGen/IfConversion.cpp
    llvm/trunk/lib/CodeGen/MachineCSE.cpp
    llvm/trunk/lib/CodeGen/MachineDominators.cpp
    llvm/trunk/lib/CodeGen/MachineLICM.cpp
    llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp
    llvm/trunk/lib/CodeGen/MachineSink.cpp
    llvm/trunk/lib/CodeGen/MachineVerifier.cpp
    llvm/trunk/lib/CodeGen/OptimizePHIs.cpp
    llvm/trunk/lib/CodeGen/PHIElimination.h
    llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp
    llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp
    llvm/trunk/lib/CodeGen/PrologEpilogInserter.h
    llvm/trunk/lib/CodeGen/RegAllocFast.cpp
    llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp
    llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp
    llvm/trunk/lib/CodeGen/RenderMachineFunction.h
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
    llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h
    llvm/trunk/lib/CodeGen/Splitter.h
    llvm/trunk/lib/CodeGen/StackProtector.cpp
    llvm/trunk/lib/CodeGen/StackSlotColoring.cpp
    llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp
    llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp
    llvm/trunk/lib/CodeGen/UnreachableBlockElim.cpp
    llvm/trunk/lib/Target/CBackend/CBackend.cpp
    llvm/trunk/lib/Target/TargetData.cpp
    llvm/trunk/lib/Transforms/IPO/ArgumentPromotion.cpp
    llvm/trunk/lib/Transforms/IPO/ConstantMerge.cpp
    llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp
    llvm/trunk/lib/Transforms/IPO/DeadTypeElimination.cpp
    llvm/trunk/lib/Transforms/IPO/FunctionAttrs.cpp
    llvm/trunk/lib/Transforms/IPO/GlobalDCE.cpp
    llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp
    llvm/trunk/lib/Transforms/IPO/IPConstantPropagation.cpp
    llvm/trunk/lib/Transforms/IPO/InlineAlways.cpp
    llvm/trunk/lib/Transforms/IPO/InlineSimple.cpp
    llvm/trunk/lib/Transforms/IPO/Internalize.cpp
    llvm/trunk/lib/Transforms/IPO/LoopExtractor.cpp
    llvm/trunk/lib/Transforms/IPO/LowerSetJmp.cpp
    llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp
    llvm/trunk/lib/Transforms/IPO/PartialInlining.cpp
    llvm/trunk/lib/Transforms/IPO/PartialSpecialization.cpp
    llvm/trunk/lib/Transforms/IPO/PruneEH.cpp
    llvm/trunk/lib/Transforms/IPO/StripDeadPrototypes.cpp
    llvm/trunk/lib/Transforms/IPO/StripSymbols.cpp
    llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp
    llvm/trunk/lib/Transforms/InstCombine/InstCombine.h
    llvm/trunk/lib/Transforms/Instrumentation/EdgeProfiling.cpp
    llvm/trunk/lib/Transforms/Instrumentation/OptimalEdgeProfiling.cpp
    llvm/trunk/lib/Transforms/Scalar/ADCE.cpp
    llvm/trunk/lib/Transforms/Scalar/BasicBlockPlacement.cpp
    llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp
    llvm/trunk/lib/Transforms/Scalar/ConstantProp.cpp
    llvm/trunk/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
    llvm/trunk/lib/Transforms/Scalar/DCE.cpp
    llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp
    llvm/trunk/lib/Transforms/Scalar/GEPSplitter.cpp
    llvm/trunk/lib/Transforms/Scalar/GVN.cpp
    llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp
    llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp
    llvm/trunk/lib/Transforms/Scalar/LICM.cpp
    llvm/trunk/lib/Transforms/Scalar/LoopDeletion.cpp
    llvm/trunk/lib/Transforms/Scalar/LoopRotation.cpp
    llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp
    llvm/trunk/lib/Transforms/Scalar/LoopUnrollPass.cpp
    llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp
    llvm/trunk/lib/Transforms/Scalar/LowerAtomic.cpp
    llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp
    llvm/trunk/lib/Transforms/Scalar/Reassociate.cpp
    llvm/trunk/lib/Transforms/Scalar/Reg2Mem.cpp
    llvm/trunk/lib/Transforms/Scalar/SCCP.cpp
    llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp
    llvm/trunk/lib/Transforms/Scalar/SimplifyCFGPass.cpp
    llvm/trunk/lib/Transforms/Scalar/SimplifyHalfPowrLibCalls.cpp
    llvm/trunk/lib/Transforms/Scalar/SimplifyLibCalls.cpp
    llvm/trunk/lib/Transforms/Scalar/Sink.cpp
    llvm/trunk/lib/Transforms/Scalar/TailDuplication.cpp
    llvm/trunk/lib/Transforms/Scalar/TailRecursionElimination.cpp
    llvm/trunk/lib/Transforms/Utils/BreakCriticalEdges.cpp
    llvm/trunk/lib/Transforms/Utils/InstructionNamer.cpp
    llvm/trunk/lib/Transforms/Utils/LCSSA.cpp
    llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp
    llvm/trunk/lib/Transforms/Utils/LowerInvoke.cpp
    llvm/trunk/lib/Transforms/Utils/LowerSwitch.cpp
    llvm/trunk/lib/Transforms/Utils/Mem2Reg.cpp
    llvm/trunk/lib/VMCore/Verifier.cpp
    llvm/trunk/tools/bugpoint/bugpoint.cpp
    llvm/trunk/tools/llvm-ld/llvm-ld.cpp
    llvm/trunk/tools/opt/opt.cpp
    llvm/trunk/unittests/VMCore/PassManagerTest.cpp

Modified: llvm/trunk/include/llvm/Analysis/Dominators.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/Dominators.h?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/Dominators.h (original)
+++ llvm/trunk/include/llvm/Analysis/Dominators.h Tue Oct 19 12:21:58 2010
@@ -717,6 +717,7 @@
   DominatorTreeBase<BasicBlock>* DT;
 
   DominatorTree() : FunctionPass(ID) {
+    initializeDominatorTreePass(*PassRegistry::getPassRegistry());
     DT = new DominatorTreeBase<BasicBlock>(false);
   }
 
@@ -1028,7 +1029,9 @@
 public:
   static char ID; // Pass ID, replacement for typeid
   DominanceFrontier() :
-    DominanceFrontierBase(ID, false) {}
+    DominanceFrontierBase(ID, false) {
+      initializeDominanceFrontierPass(*PassRegistry::getPassRegistry());
+    }
 
   BasicBlock *getRoot() const {
     assert(Roots.size() == 1 && "Should always have entry node!");

Modified: llvm/trunk/include/llvm/Analysis/FindUsedTypes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/FindUsedTypes.h?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/FindUsedTypes.h (original)
+++ llvm/trunk/include/llvm/Analysis/FindUsedTypes.h Tue Oct 19 12:21:58 2010
@@ -26,7 +26,9 @@
   std::set<const Type *> UsedTypes;
 public:
   static char ID; // Pass identification, replacement for typeid
-  FindUsedTypes() : ModulePass(ID) {}
+  FindUsedTypes() : ModulePass(ID) {
+    initializeFindUsedTypesPass(*PassRegistry::getPassRegistry());
+  }
 
   /// getTypes - After the pass has been run, return the set containing all of
   /// the types used in the module.

Modified: llvm/trunk/include/llvm/Analysis/IntervalPartition.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/IntervalPartition.h?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/IntervalPartition.h (original)
+++ llvm/trunk/include/llvm/Analysis/IntervalPartition.h Tue Oct 19 12:21:58 2010
@@ -48,7 +48,9 @@
 public:
   static char ID; // Pass identification, replacement for typeid
 
-  IntervalPartition() : FunctionPass(ID), RootInterval(0) {}
+  IntervalPartition() : FunctionPass(ID), RootInterval(0) {
+    initializeIntervalPartitionPass(*PassRegistry::getPassRegistry());
+  }
 
   // run - Calculate the interval partition for this function
   virtual bool runOnFunction(Function &F);

Modified: llvm/trunk/include/llvm/Analysis/LazyValueInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/LazyValueInfo.h?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/LazyValueInfo.h (original)
+++ llvm/trunk/include/llvm/Analysis/LazyValueInfo.h Tue Oct 19 12:21:58 2010
@@ -31,7 +31,9 @@
   void operator=(const LazyValueInfo&); // DO NOT IMPLEMENT.
 public:
   static char ID;
-  LazyValueInfo() : FunctionPass(ID), PImpl(0) {}
+  LazyValueInfo() : FunctionPass(ID), PImpl(0) {
+    initializeLazyValueInfoPass(*PassRegistry::getPassRegistry());
+  }
   ~LazyValueInfo() { assert(PImpl == 0 && "releaseMemory not called"); }
 
   /// Tristate - This is used to return true/false/dunno results.

Modified: llvm/trunk/include/llvm/Analysis/LibCallAliasAnalysis.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/LibCallAliasAnalysis.h?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/LibCallAliasAnalysis.h (original)
+++ llvm/trunk/include/llvm/Analysis/LibCallAliasAnalysis.h Tue Oct 19 12:21:58 2010
@@ -28,10 +28,12 @@
     LibCallInfo *LCI;
     
     explicit LibCallAliasAnalysis(LibCallInfo *LC = 0)
-      : FunctionPass(ID), LCI(LC) {
+        : FunctionPass(ID), LCI(LC) {
+      initializeLibCallAliasAnalysisPass(*PassRegistry::getPassRegistry());
     }
     explicit LibCallAliasAnalysis(char &ID, LibCallInfo *LC)
-      : FunctionPass(ID), LCI(LC) {
+        : FunctionPass(ID), LCI(LC) {
+      initializeLibCallAliasAnalysisPass(*PassRegistry::getPassRegistry());
     }
     ~LibCallAliasAnalysis();
     

Modified: llvm/trunk/include/llvm/Analysis/LoopDependenceAnalysis.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/LoopDependenceAnalysis.h?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/LoopDependenceAnalysis.h (original)
+++ llvm/trunk/include/llvm/Analysis/LoopDependenceAnalysis.h Tue Oct 19 12:21:58 2010
@@ -91,7 +91,9 @@
 
 public:
   static char ID; // Class identification, replacement for typeinfo
-  LoopDependenceAnalysis() : LoopPass(ID) {}
+  LoopDependenceAnalysis() : LoopPass(ID) {
+    initializeLoopDependenceAnalysisPass(*PassRegistry::getPassRegistry());
+  }
 
   /// isDependencePair - Check whether two values can possibly give rise to
   /// a data dependence: that is the case if both are instructions accessing

Modified: llvm/trunk/include/llvm/Analysis/LoopInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/LoopInfo.h?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/LoopInfo.h (original)
+++ llvm/trunk/include/llvm/Analysis/LoopInfo.h Tue Oct 19 12:21:58 2010
@@ -939,7 +939,9 @@
 public:
   static char ID; // Pass identification, replacement for typeid
 
-  LoopInfo() : FunctionPass(ID) {}
+  LoopInfo() : FunctionPass(ID) {
+    initializeLoopInfoPass(*PassRegistry::getPassRegistry());
+  }
 
   LoopInfoBase<BasicBlock, Loop>& getBase() { return LI; }
 

Modified: llvm/trunk/include/llvm/Analysis/PostDominators.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/PostDominators.h?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/PostDominators.h (original)
+++ llvm/trunk/include/llvm/Analysis/PostDominators.h Tue Oct 19 12:21:58 2010
@@ -26,6 +26,7 @@
   DominatorTreeBase<BasicBlock>* DT;
 
   PostDominatorTree() : FunctionPass(ID) {
+    initializePostDominatorTreePass(*PassRegistry::getPassRegistry());
     DT = new DominatorTreeBase<BasicBlock>(true);
   }
 
@@ -106,7 +107,9 @@
 struct PostDominanceFrontier : public DominanceFrontierBase {
   static char ID;
   PostDominanceFrontier()
-    : DominanceFrontierBase(ID, true) {}
+    : DominanceFrontierBase(ID, true) {
+      initializePostDominanceFrontierPass(*PassRegistry::getPassRegistry());
+    }
 
   virtual bool runOnFunction(Function &) {
     Frontiers.clear();

Modified: llvm/trunk/include/llvm/CodeGen/CalcSpillWeights.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/CalcSpillWeights.h?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/CalcSpillWeights.h (original)
+++ llvm/trunk/include/llvm/CodeGen/CalcSpillWeights.h Tue Oct 19 12:21:58 2010
@@ -48,7 +48,9 @@
   public:
     static char ID;
 
-    CalculateSpillWeights() : MachineFunctionPass(ID) {}
+    CalculateSpillWeights() : MachineFunctionPass(ID) {
+      initializeCalculateSpillWeightsPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual void getAnalysisUsage(AnalysisUsage &au) const;
 

Modified: llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h (original)
+++ llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h Tue Oct 19 12:21:58 2010
@@ -68,7 +68,9 @@
 
   public:
     static char ID; // Pass identification, replacement for typeid
-    LiveIntervals() : MachineFunctionPass(ID) {}
+    LiveIntervals() : MachineFunctionPass(ID) {
+      initializeLiveIntervalsPass(*PassRegistry::getPassRegistry());
+    }
 
     // Calculate the spill weight to assign to a single instruction.
     static float getSpillWeight(bool isDef, bool isUse, unsigned loopDepth);

Modified: llvm/trunk/include/llvm/CodeGen/LiveStackAnalysis.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveStackAnalysis.h?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/LiveStackAnalysis.h (original)
+++ llvm/trunk/include/llvm/CodeGen/LiveStackAnalysis.h Tue Oct 19 12:21:58 2010
@@ -39,7 +39,9 @@
     
   public:
     static char ID; // Pass identification, replacement for typeid
-    LiveStacks() : MachineFunctionPass(ID) {}
+    LiveStacks() : MachineFunctionPass(ID) {
+      initializeLiveStacksPass(*PassRegistry::getPassRegistry());
+    }
 
     typedef SS2IntervalMap::iterator iterator;
     typedef SS2IntervalMap::const_iterator const_iterator;

Modified: llvm/trunk/include/llvm/CodeGen/LiveVariables.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveVariables.h?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/LiveVariables.h (original)
+++ llvm/trunk/include/llvm/CodeGen/LiveVariables.h Tue Oct 19 12:21:58 2010
@@ -46,7 +46,9 @@
 class LiveVariables : public MachineFunctionPass {
 public:
   static char ID; // Pass identification, replacement for typeid
-  LiveVariables() : MachineFunctionPass(ID) {}
+  LiveVariables() : MachineFunctionPass(ID) {
+    initializeLiveVariablesPass(*PassRegistry::getPassRegistry());
+  }
 
   /// VarInfo - This represents the regions where a virtual register is live in
   /// the program.  We represent this with three different pieces of

Modified: llvm/trunk/include/llvm/CodeGen/MachineLoopInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineLoopInfo.h?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineLoopInfo.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineLoopInfo.h Tue Oct 19 12:21:58 2010
@@ -67,7 +67,9 @@
 public:
   static char ID; // Pass identification, replacement for typeid
 
-  MachineLoopInfo() : MachineFunctionPass(ID) {}
+  MachineLoopInfo() : MachineFunctionPass(ID) {
+    initializeMachineLoopInfoPass(*PassRegistry::getPassRegistry());
+  }
 
   LoopInfoBase<MachineBasicBlock, MachineLoop>& getBase() { return LI; }
 

Modified: llvm/trunk/include/llvm/CodeGen/ProcessImplicitDefs.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ProcessImplicitDefs.h?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/ProcessImplicitDefs.h (original)
+++ llvm/trunk/include/llvm/CodeGen/ProcessImplicitDefs.h Tue Oct 19 12:21:58 2010
@@ -31,7 +31,9 @@
   public:
     static char ID;
 
-    ProcessImplicitDefs() : MachineFunctionPass(ID) {}
+    ProcessImplicitDefs() : MachineFunctionPass(ID) {
+      initializeProcessImplicitDefsPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual void getAnalysisUsage(AnalysisUsage &au) const;
 

Modified: llvm/trunk/include/llvm/CodeGen/SlotIndexes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SlotIndexes.h?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SlotIndexes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SlotIndexes.h Tue Oct 19 12:21:58 2010
@@ -469,7 +469,9 @@
   public:
     static char ID;
 
-    SlotIndexes() : MachineFunctionPass(ID), indexListHead(0) {}
+    SlotIndexes() : MachineFunctionPass(ID), indexListHead(0) {
+      initializeSlotIndexesPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual void getAnalysisUsage(AnalysisUsage &au) const;
     virtual void releaseMemory(); 

Modified: llvm/trunk/include/llvm/InitializePasses.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/InitializePasses.h?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/include/llvm/InitializePasses.h (original)
+++ llvm/trunk/include/llvm/InitializePasses.h Tue Oct 19 12:21:58 2010
@@ -132,6 +132,7 @@
 void initializeLoopUnrollPass(PassRegistry&);
 void initializeLoopUnswitchPass(PassRegistry&);
 void initializeLowerAtomicPass(PassRegistry&);
+void initializeLowerIntrinsicsPass(PassRegistry&);
 void initializeLowerInvokePass(PassRegistry&);
 void initializeLowerSetJmpPass(PassRegistry&);
 void initializeLowerSwitchPass(PassRegistry&);

Modified: llvm/trunk/include/llvm/PassSupport.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/PassSupport.h?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/include/llvm/PassSupport.h (original)
+++ llvm/trunk/include/llvm/PassSupport.h Tue Oct 19 12:21:58 2010
@@ -151,8 +151,7 @@
         sys::MemoryFence(); \
       } \
     } \
-  } \
-  static RegisterPass<passName> passName ## _info(arg, name, cfg, analysis);
+  }
 
 #define INITIALIZE_PASS_BEGIN(passName, arg, name, cfg, analysis) \
   static void* initialize##passName##PassOnce(PassRegistry &Registry) {
@@ -183,8 +182,7 @@
         sys::MemoryFence(); \
       } \
     } \
-  } \
-  static RegisterPass<passName> passName ## _info(arg, name, cfg, analysis);
+  }
 
 template<typename PassName>
 Pass *callDefaultCtor() { return new PassName(); }
@@ -282,12 +280,12 @@
         sys::MemoryFence(); \
       } \
     } \
-  } \
-  static RegisterAnalysisGroup<agName> agName##_info (name);
+  }
 
 
 #define INITIALIZE_AG_PASS(passName, agName, arg, name, cfg, analysis, def) \
   static void* initialize##passName##PassOnce(PassRegistry &Registry) { \
+    if (!def) initialize##agName##AnalysisGroup(Registry); \
     PassInfo *PI = new PassInfo(name, arg, & passName ::ID, \
       PassInfo::NormalCtor_t(callDefaultCtor< passName >), cfg, analysis); \
     Registry.registerPass(*PI); \
@@ -311,13 +309,12 @@
         sys::MemoryFence(); \
       } \
     } \
-  } \
-  static RegisterPass<passName> passName ## _info(arg, name, cfg, analysis); \
-  static RegisterAnalysisGroup<agName, def> passName ## _ag(passName ## _info);
+  }
 
 
 #define INITIALIZE_AG_PASS_BEGIN(passName, agName, arg, n, cfg, analysis, def) \
-  static void* initialize##passName##PassOnce(PassRegistry &Registry) {
+  static void* initialize##passName##PassOnce(PassRegistry &Registry) { \
+    if (!def) initialize##agName##AnalysisGroup(Registry);
 
 #define INITIALIZE_AG_PASS_END(passName, agName, arg, n, cfg, analysis, def) \
     PassInfo *PI = new PassInfo(n, arg, & passName ::ID, \
@@ -343,9 +340,7 @@
         sys::MemoryFence(); \
       } \
     } \
-  } \
-  static RegisterPass<passName> passName ## _info(arg, n, cfg, analysis); \
-  static RegisterAnalysisGroup<agName, def> passName ## _ag(passName ## _info);
+  }
 
 //===---------------------------------------------------------------------------
 /// PassRegistrationListener class - This class is meant to be derived from by

Modified: llvm/trunk/include/llvm/Transforms/Utils/UnifyFunctionExitNodes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Transforms/Utils/UnifyFunctionExitNodes.h?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Transforms/Utils/UnifyFunctionExitNodes.h (original)
+++ llvm/trunk/include/llvm/Transforms/Utils/UnifyFunctionExitNodes.h Tue Oct 19 12:21:58 2010
@@ -27,7 +27,9 @@
 public:
   static char ID; // Pass identification, replacement for typeid
   UnifyFunctionExitNodes() : FunctionPass(ID),
-                             ReturnBlock(0), UnwindBlock(0) {}
+                             ReturnBlock(0), UnwindBlock(0) {
+    initializeUnifyFunctionExitNodesPass(*PassRegistry::getPassRegistry());
+  }
 
   // We can preserve non-critical-edgeness when we unify function exit nodes
   virtual void getAnalysisUsage(AnalysisUsage &AU) const;

Modified: llvm/trunk/lib/Analysis/AliasAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/AliasAnalysis.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/AliasAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/AliasAnalysis.cpp Tue Oct 19 12:21:58 2010
@@ -36,7 +36,7 @@
 using namespace llvm;
 
 // Register the AliasAnalysis interface, providing a nice name to refer to.
-INITIALIZE_ANALYSIS_GROUP(AliasAnalysis, "Alias Analysis", BasicAliasAnalysis)
+INITIALIZE_ANALYSIS_GROUP(AliasAnalysis, "Alias Analysis", NoAA)
 char AliasAnalysis::ID = 0;
 
 //===----------------------------------------------------------------------===//

Modified: llvm/trunk/lib/Analysis/AliasAnalysisCounter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/AliasAnalysisCounter.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/AliasAnalysisCounter.cpp (original)
+++ llvm/trunk/lib/Analysis/AliasAnalysisCounter.cpp Tue Oct 19 12:21:58 2010
@@ -35,6 +35,7 @@
   public:
     static char ID; // Class identification, replacement for typeinfo
     AliasAnalysisCounter() : ModulePass(ID) {
+      initializeAliasAnalysisCounterPass(*PassRegistry::getPassRegistry());
       No = May = Must = 0;
       NoMR = JustRef = JustMod = MR = 0;
     }

Modified: llvm/trunk/lib/Analysis/AliasAnalysisEvaluator.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/AliasAnalysisEvaluator.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/AliasAnalysisEvaluator.cpp (original)
+++ llvm/trunk/lib/Analysis/AliasAnalysisEvaluator.cpp Tue Oct 19 12:21:58 2010
@@ -50,7 +50,9 @@
 
   public:
     static char ID; // Pass identification, replacement for typeid
-    AAEval() : FunctionPass(ID) {}
+    AAEval() : FunctionPass(ID) {
+      initializeAAEvalPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
       AU.addRequired<AliasAnalysis>();

Modified: llvm/trunk/lib/Analysis/AliasDebugger.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/AliasDebugger.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/AliasDebugger.cpp (original)
+++ llvm/trunk/lib/Analysis/AliasDebugger.cpp Tue Oct 19 12:21:58 2010
@@ -39,7 +39,9 @@
     
   public:
     static char ID; // Class identification, replacement for typeinfo
-    AliasDebugger() : ModulePass(ID) {}
+    AliasDebugger() : ModulePass(ID) {
+      initializeAliasDebuggerPass(*PassRegistry::getPassRegistry());
+    }
 
     bool runOnModule(Module &M) {
       InitializeAliasAnalysis(this);                 // set up super class

Modified: llvm/trunk/lib/Analysis/AliasSetTracker.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/AliasSetTracker.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/AliasSetTracker.cpp (original)
+++ llvm/trunk/lib/Analysis/AliasSetTracker.cpp Tue Oct 19 12:21:58 2010
@@ -614,7 +614,9 @@
     AliasSetTracker *Tracker;
   public:
     static char ID; // Pass identification, replacement for typeid
-    AliasSetPrinter() : FunctionPass(ID) {}
+    AliasSetPrinter() : FunctionPass(ID) {
+      initializeAliasSetPrinterPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
       AU.setPreservesAll();

Modified: llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp Tue Oct 19 12:21:58 2010
@@ -140,8 +140,10 @@
   ///
   struct NoAA : public ImmutablePass, public AliasAnalysis {
     static char ID; // Class identification, replacement for typeinfo
-    NoAA() : ImmutablePass(ID) {}
-    explicit NoAA(char &PID) : ImmutablePass(PID) { }
+    NoAA() : ImmutablePass(ID) {
+      initializeNoAAPass(*PassRegistry::getPassRegistry());
+    }
+    explicit NoAA(char &PID) : ImmutablePass(PID) {}
 
     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
     }
@@ -490,7 +492,9 @@
   /// derives from the NoAA class.
   struct BasicAliasAnalysis : public NoAA {
     static char ID; // Class identification, replacement for typeinfo
-    BasicAliasAnalysis() : NoAA(ID) {}
+    BasicAliasAnalysis() : NoAA(ID) {
+      initializeBasicAliasAnalysisPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual void initializePass() {
       InitializeAliasAnalysis(this);

Modified: llvm/trunk/lib/Analysis/CFGPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/CFGPrinter.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/CFGPrinter.cpp (original)
+++ llvm/trunk/lib/Analysis/CFGPrinter.cpp Tue Oct 19 12:21:58 2010
@@ -25,7 +25,9 @@
 namespace {
   struct CFGViewer : public FunctionPass {
     static char ID; // Pass identifcation, replacement for typeid
-    CFGViewer() : FunctionPass(ID) {}
+    CFGViewer() : FunctionPass(ID) {
+      initializeCFGOnlyViewerPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual bool runOnFunction(Function &F) {
       F.viewCFG();
@@ -46,7 +48,9 @@
 namespace {
   struct CFGOnlyViewer : public FunctionPass {
     static char ID; // Pass identifcation, replacement for typeid
-    CFGOnlyViewer() : FunctionPass(ID) {}
+    CFGOnlyViewer() : FunctionPass(ID) {
+      initializeCFGOnlyViewerPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual bool runOnFunction(Function &F) {
       F.viewCFGOnly();
@@ -68,7 +72,9 @@
 namespace {
   struct CFGPrinter : public FunctionPass {
     static char ID; // Pass identification, replacement for typeid
-    CFGPrinter() : FunctionPass(ID) {}
+    CFGPrinter() : FunctionPass(ID) {
+      initializeCFGPrinterPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual bool runOnFunction(Function &F) {
       std::string Filename = "cfg." + F.getNameStr() + ".dot";
@@ -100,7 +106,10 @@
 namespace {
   struct CFGOnlyPrinter : public FunctionPass {
     static char ID; // Pass identification, replacement for typeid
-    CFGOnlyPrinter() : FunctionPass(ID) {}
+    CFGOnlyPrinter() : FunctionPass(ID) {
+      initializeCFGOnlyPrinterPass(*PassRegistry::getPassRegistry());
+    }
+    
     virtual bool runOnFunction(Function &F) {
       std::string Filename = "cfg." + F.getNameStr() + ".dot";
       errs() << "Writing '" << Filename << "'...";

Modified: llvm/trunk/lib/Analysis/DbgInfoPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/DbgInfoPrinter.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/DbgInfoPrinter.cpp (original)
+++ llvm/trunk/lib/Analysis/DbgInfoPrinter.cpp Tue Oct 19 12:21:58 2010
@@ -40,7 +40,9 @@
     void printVariableDeclaration(const Value *V);
   public:
     static char ID; // Pass identification
-    PrintDbgInfo() : FunctionPass(ID), Out(errs()) {}
+    PrintDbgInfo() : FunctionPass(ID), Out(errs()) {
+      initializePrintDbgInfoPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual bool runOnFunction(Function &F);
     virtual void getAnalysisUsage(AnalysisUsage &AU) const {

Modified: llvm/trunk/lib/Analysis/DomPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/DomPrinter.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/DomPrinter.cpp (original)
+++ llvm/trunk/lib/Analysis/DomPrinter.cpp Tue Oct 19 12:21:58 2010
@@ -86,27 +86,35 @@
 struct DomViewer
   : public DOTGraphTraitsViewer<DominatorTree, false> {
   static char ID;
-  DomViewer() : DOTGraphTraitsViewer<DominatorTree, false>("dom", ID){}
+  DomViewer() : DOTGraphTraitsViewer<DominatorTree, false>("dom", ID){
+    initializeDomViewerPass(*PassRegistry::getPassRegistry());
+  }
 };
 
 struct DomOnlyViewer
   : public DOTGraphTraitsViewer<DominatorTree, true> {
   static char ID;
-  DomOnlyViewer() : DOTGraphTraitsViewer<DominatorTree, true>("domonly", ID){}
+  DomOnlyViewer() : DOTGraphTraitsViewer<DominatorTree, true>("domonly", ID){
+    initializeDomOnlyViewerPass(*PassRegistry::getPassRegistry());
+  }
 };
 
 struct PostDomViewer
   : public DOTGraphTraitsViewer<PostDominatorTree, false> {
   static char ID;
   PostDomViewer() :
-    DOTGraphTraitsViewer<PostDominatorTree, false>("postdom", ID){}
+    DOTGraphTraitsViewer<PostDominatorTree, false>("postdom", ID){
+      initializePostDomViewerPass(*PassRegistry::getPassRegistry());
+    }
 };
 
 struct PostDomOnlyViewer
   : public DOTGraphTraitsViewer<PostDominatorTree, true> {
   static char ID;
   PostDomOnlyViewer() :
-    DOTGraphTraitsViewer<PostDominatorTree, true>("postdomonly", ID){}
+    DOTGraphTraitsViewer<PostDominatorTree, true>("postdomonly", ID){
+      initializePostDomOnlyViewerPass(*PassRegistry::getPassRegistry());
+    }
 };
 } // end anonymous namespace
 
@@ -133,27 +141,35 @@
 struct DomPrinter
   : public DOTGraphTraitsPrinter<DominatorTree, false> {
   static char ID;
-  DomPrinter() : DOTGraphTraitsPrinter<DominatorTree, false>("dom", ID) {}
+  DomPrinter() : DOTGraphTraitsPrinter<DominatorTree, false>("dom", ID) {
+    initializeDomPrinterPass(*PassRegistry::getPassRegistry());
+  }
 };
 
 struct DomOnlyPrinter
   : public DOTGraphTraitsPrinter<DominatorTree, true> {
   static char ID;
-  DomOnlyPrinter() : DOTGraphTraitsPrinter<DominatorTree, true>("domonly", ID) {}
+  DomOnlyPrinter() : DOTGraphTraitsPrinter<DominatorTree, true>("domonly", ID) {
+    initializeDomOnlyPrinterPass(*PassRegistry::getPassRegistry());
+  }
 };
 
 struct PostDomPrinter
   : public DOTGraphTraitsPrinter<PostDominatorTree, false> {
   static char ID;
   PostDomPrinter() :
-    DOTGraphTraitsPrinter<PostDominatorTree, false>("postdom", ID) {}
+    DOTGraphTraitsPrinter<PostDominatorTree, false>("postdom", ID) {
+      initializePostDomPrinterPass(*PassRegistry::getPassRegistry());
+    }
 };
 
 struct PostDomOnlyPrinter
   : public DOTGraphTraitsPrinter<PostDominatorTree, true> {
   static char ID;
   PostDomOnlyPrinter() :
-    DOTGraphTraitsPrinter<PostDominatorTree, true>("postdomonly", ID) {}
+    DOTGraphTraitsPrinter<PostDominatorTree, true>("postdomonly", ID) {
+      initializePostDomOnlyPrinterPass(*PassRegistry::getPassRegistry());
+    }
 };
 } // end anonymous namespace
 

Modified: llvm/trunk/lib/Analysis/IPA/CallGraph.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/IPA/CallGraph.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/IPA/CallGraph.cpp (original)
+++ llvm/trunk/lib/Analysis/IPA/CallGraph.cpp Tue Oct 19 12:21:58 2010
@@ -43,7 +43,9 @@
 public:
   static char ID; // Class identification, replacement for typeinfo
   BasicCallGraph() : ModulePass(ID), Root(0), 
-    ExternalCallingNode(0), CallsExternalNode(0) {}
+    ExternalCallingNode(0), CallsExternalNode(0) {
+      initializeBasicCallGraphPass(*PassRegistry::getPassRegistry());
+    }
 
   // runOnModule - Compute the call graph for the specified module.
   virtual bool runOnModule(Module &M) {

Modified: llvm/trunk/lib/Analysis/IPA/GlobalsModRef.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/IPA/GlobalsModRef.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/IPA/GlobalsModRef.cpp (original)
+++ llvm/trunk/lib/Analysis/IPA/GlobalsModRef.cpp Tue Oct 19 12:21:58 2010
@@ -88,7 +88,9 @@
 
   public:
     static char ID;
-    GlobalsModRef() : ModulePass(ID) {}
+    GlobalsModRef() : ModulePass(ID) {
+      initializeGlobalsModRefPass(*PassRegistry::getPassRegistry());
+    }
 
     bool runOnModule(Module &M) {
       InitializeAliasAnalysis(this);                 // set up super class

Modified: llvm/trunk/lib/Analysis/IVUsers.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/IVUsers.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/IVUsers.cpp (original)
+++ llvm/trunk/lib/Analysis/IVUsers.cpp Tue Oct 19 12:21:58 2010
@@ -149,7 +149,8 @@
 }
 
 IVUsers::IVUsers()
- : LoopPass(ID) {
+    : LoopPass(ID) {
+  initializeIVUsersPass(*PassRegistry::getPassRegistry());
 }
 
 void IVUsers::getAnalysisUsage(AnalysisUsage &AU) const {

Modified: llvm/trunk/lib/Analysis/InstCount.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/InstCount.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/InstCount.cpp (original)
+++ llvm/trunk/lib/Analysis/InstCount.cpp Tue Oct 19 12:21:58 2010
@@ -51,7 +51,9 @@
     }
   public:
     static char ID; // Pass identification, replacement for typeid
-    InstCount() : FunctionPass(ID) {}
+    InstCount() : FunctionPass(ID) {
+      initializeInstCountPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual bool runOnFunction(Function &F);
 

Modified: llvm/trunk/lib/Analysis/Lint.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/Lint.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/Lint.cpp (original)
+++ llvm/trunk/lib/Analysis/Lint.cpp Tue Oct 19 12:21:58 2010
@@ -108,7 +108,9 @@
     raw_string_ostream MessagesStr;
 
     static char ID; // Pass identification, replacement for typeid
-    Lint() : FunctionPass(ID), MessagesStr(Messages) {}
+    Lint() : FunctionPass(ID), MessagesStr(Messages) {
+      initializeLintPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual bool runOnFunction(Function &F);
 

Modified: llvm/trunk/lib/Analysis/LiveValues.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/LiveValues.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/LiveValues.cpp (original)
+++ llvm/trunk/lib/Analysis/LiveValues.cpp Tue Oct 19 12:21:58 2010
@@ -29,7 +29,9 @@
 INITIALIZE_PASS_END(LiveValues, "live-values",
                 "Value Liveness Analysis", false, true)
 
-LiveValues::LiveValues() : FunctionPass(ID) {}
+LiveValues::LiveValues() : FunctionPass(ID) {
+  initializeLiveValuesPass(*PassRegistry::getPassRegistry());
+}
 
 void LiveValues::getAnalysisUsage(AnalysisUsage &AU) const {
   AU.addRequired<DominatorTree>();

Modified: llvm/trunk/lib/Analysis/MemDepPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/MemDepPrinter.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/MemDepPrinter.cpp (original)
+++ llvm/trunk/lib/Analysis/MemDepPrinter.cpp Tue Oct 19 12:21:58 2010
@@ -31,7 +31,9 @@
     DepSetMap Deps;
 
     static char ID; // Pass identifcation, replacement for typeid
-    MemDepPrinter() : FunctionPass(ID) {}
+    MemDepPrinter() : FunctionPass(ID) {
+      initializeMemDepPrinterPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual bool runOnFunction(Function &F);
 

Modified: llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp Tue Oct 19 12:21:58 2010
@@ -55,6 +55,7 @@
 
 MemoryDependenceAnalysis::MemoryDependenceAnalysis()
 : FunctionPass(ID), PredCache(0) {
+  initializeMemoryDependenceAnalysisPass(*PassRegistry::getPassRegistry());
 }
 MemoryDependenceAnalysis::~MemoryDependenceAnalysis() {
 }

Modified: llvm/trunk/lib/Analysis/ModuleDebugInfoPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ModuleDebugInfoPrinter.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ModuleDebugInfoPrinter.cpp (original)
+++ llvm/trunk/lib/Analysis/ModuleDebugInfoPrinter.cpp Tue Oct 19 12:21:58 2010
@@ -30,7 +30,9 @@
     DebugInfoFinder Finder;
   public:
     static char ID; // Pass identification, replacement for typeid
-    ModuleDebugInfoPrinter() : ModulePass(ID) {}
+    ModuleDebugInfoPrinter() : ModulePass(ID) {
+      initializeModuleDebugInfoPrinterPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual bool runOnModule(Module &M);
 

Modified: llvm/trunk/lib/Analysis/ProfileEstimatorPass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ProfileEstimatorPass.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ProfileEstimatorPass.cpp (original)
+++ llvm/trunk/lib/Analysis/ProfileEstimatorPass.cpp Tue Oct 19 12:21:58 2010
@@ -39,7 +39,8 @@
   public:
     static char ID; // Class identification, replacement for typeinfo
     explicit ProfileEstimatorPass(const double execcount = 0)
-      : FunctionPass(ID), ExecCount(execcount) {
+        : FunctionPass(ID), ExecCount(execcount) {
+      initializeProfileEstimatorPassPass(*PassRegistry::getPassRegistry());
       if (execcount == 0) ExecCount = LoopWeight;
     }
 

Modified: llvm/trunk/lib/Analysis/ProfileInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ProfileInfo.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ProfileInfo.cpp (original)
+++ llvm/trunk/lib/Analysis/ProfileInfo.cpp Tue Oct 19 12:21:58 2010
@@ -1077,7 +1077,9 @@
 namespace {
   struct NoProfileInfo : public ImmutablePass, public ProfileInfo {
     static char ID; // Class identification, replacement for typeinfo
-    NoProfileInfo() : ImmutablePass(ID) {}
+    NoProfileInfo() : ImmutablePass(ID) {
+      initializeNoProfileInfoPass(*PassRegistry::getPassRegistry());
+    }
     
     /// getAdjustedAnalysisPointer - This method is used when a pass implements
     /// an analysis interface through multiple inheritance.  If needed, it

Modified: llvm/trunk/lib/Analysis/ProfileInfoLoaderPass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ProfileInfoLoaderPass.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ProfileInfoLoaderPass.cpp (original)
+++ llvm/trunk/lib/Analysis/ProfileInfoLoaderPass.cpp Tue Oct 19 12:21:58 2010
@@ -46,6 +46,7 @@
     static char ID; // Class identification, replacement for typeinfo
     explicit LoaderPass(const std::string &filename = "")
       : ModulePass(ID), Filename(filename) {
+      initializeLoaderPassPass(*PassRegistry::getPassRegistry());
       if (filename.empty()) Filename = ProfileInfoFilename;
     }
 

Modified: llvm/trunk/lib/Analysis/ProfileVerifierPass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ProfileVerifierPass.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ProfileVerifierPass.cpp (original)
+++ llvm/trunk/lib/Analysis/ProfileVerifierPass.cpp Tue Oct 19 12:21:58 2010
@@ -60,10 +60,12 @@
     static char ID; // Class identification, replacement for typeinfo
 
     explicit ProfileVerifierPassT () : FunctionPass(ID) {
+      initializeProfileVerifierPassPass(*PassRegistry::getPassRegistry());
       DisableAssertions = ProfileVerifierDisableAssertions;
     }
     explicit ProfileVerifierPassT (bool da) : FunctionPass(ID), 
                                               DisableAssertions(da) {
+      initializeProfileVerifierPassPass(*PassRegistry::getPassRegistry());
     }
 
     void getAnalysisUsage(AnalysisUsage &AU) const {

Modified: llvm/trunk/lib/Analysis/RegionInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/RegionInfo.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/RegionInfo.cpp (original)
+++ llvm/trunk/lib/Analysis/RegionInfo.cpp Tue Oct 19 12:21:58 2010
@@ -662,6 +662,7 @@
 }
 
 RegionInfo::RegionInfo() : FunctionPass(ID) {
+  initializeRegionInfoPass(*PassRegistry::getPassRegistry());
   TopLevelRegion = 0;
 }
 

Modified: llvm/trunk/lib/Analysis/RegionPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/RegionPrinter.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/RegionPrinter.cpp (original)
+++ llvm/trunk/lib/Analysis/RegionPrinter.cpp Tue Oct 19 12:21:58 2010
@@ -121,14 +121,18 @@
 struct RegionViewer
   : public DOTGraphTraitsViewer<RegionInfo, false> {
   static char ID;
-  RegionViewer() : DOTGraphTraitsViewer<RegionInfo, false>("reg", ID){}
+  RegionViewer() : DOTGraphTraitsViewer<RegionInfo, false>("reg", ID){
+    initializeRegionViewerPass(*PassRegistry::getPassRegistry());
+  }
 };
 char RegionViewer::ID = 0;
 
 struct RegionOnlyViewer
   : public DOTGraphTraitsViewer<RegionInfo, true> {
   static char ID;
-  RegionOnlyViewer() : DOTGraphTraitsViewer<RegionInfo, true>("regonly", ID){}
+  RegionOnlyViewer() : DOTGraphTraitsViewer<RegionInfo, true>("regonly", ID) {
+    initializeRegionOnlyViewerPass(*PassRegistry::getPassRegistry());
+  }
 };
 char RegionOnlyViewer::ID = 0;
 
@@ -136,7 +140,9 @@
   : public DOTGraphTraitsPrinter<RegionInfo, false> {
   static char ID;
   RegionPrinter() :
-    DOTGraphTraitsPrinter<RegionInfo, false>("reg", ID) {}
+    DOTGraphTraitsPrinter<RegionInfo, false>("reg", ID) {
+      initializeRegionPrinterPass(*PassRegistry::getPassRegistry());
+    }
 };
 char RegionPrinter::ID = 0;
 } //end anonymous namespace
@@ -157,7 +163,9 @@
   : public DOTGraphTraitsPrinter<RegionInfo, true> {
   static char ID;
   RegionOnlyPrinter() :
-    DOTGraphTraitsPrinter<RegionInfo, true>("reg", ID) {}
+    DOTGraphTraitsPrinter<RegionInfo, true>("reg", ID) {
+      initializeRegionOnlyPrinterPass(*PassRegistry::getPassRegistry());
+    }
 };
 
 }

Modified: llvm/trunk/lib/Analysis/ScalarEvolution.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolution.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ScalarEvolution.cpp (original)
+++ llvm/trunk/lib/Analysis/ScalarEvolution.cpp Tue Oct 19 12:21:58 2010
@@ -5835,6 +5835,7 @@
 
 ScalarEvolution::ScalarEvolution()
   : FunctionPass(ID), FirstUnknown(0) {
+  initializeScalarEvolutionPass(*PassRegistry::getPassRegistry());
 }
 
 bool ScalarEvolution::runOnFunction(Function &F) {

Modified: llvm/trunk/lib/Analysis/ScalarEvolutionAliasAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolutionAliasAnalysis.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ScalarEvolutionAliasAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/ScalarEvolutionAliasAnalysis.cpp Tue Oct 19 12:21:58 2010
@@ -34,7 +34,10 @@
 
   public:
     static char ID; // Class identification, replacement for typeinfo
-    ScalarEvolutionAliasAnalysis() : FunctionPass(ID), SE(0) {}
+    ScalarEvolutionAliasAnalysis() : FunctionPass(ID), SE(0) {
+      initializeScalarEvolutionAliasAnalysisPass(
+        *PassRegistry::getPassRegistry());
+    }
 
     /// getAdjustedAnalysisPointer - This method is used when a pass implements
     /// an analysis interface through multiple inheritance.  If needed, it

Modified: llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp Tue Oct 19 12:21:58 2010
@@ -85,7 +85,9 @@
                                  public AliasAnalysis {
   public:
     static char ID; // Class identification, replacement for typeinfo
-    TypeBasedAliasAnalysis() : ImmutablePass(ID) {}
+    TypeBasedAliasAnalysis() : ImmutablePass(ID) {
+      initializeTypeBasedAliasAnalysisPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual void initializePass() {
       InitializeAliasAnalysis(this);

Modified: llvm/trunk/lib/CodeGen/CodeGen.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/CodeGen.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/CodeGen.cpp (original)
+++ llvm/trunk/lib/CodeGen/CodeGen.cpp Tue Oct 19 12:21:58 2010
@@ -52,6 +52,7 @@
   initializeUnreachableBlockElimPass(Registry);
   initializeUnreachableMachineBlockElimPass(Registry);
   initializeVirtRegMapPass(Registry);
+  initializeLowerIntrinsicsPass(Registry);
 }
 
 void LLVMInitializeCodeGen(LLVMPassRegistryRef R) {

Modified: llvm/trunk/lib/CodeGen/DeadMachineInstructionElim.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/DeadMachineInstructionElim.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/DeadMachineInstructionElim.cpp (original)
+++ llvm/trunk/lib/CodeGen/DeadMachineInstructionElim.cpp Tue Oct 19 12:21:58 2010
@@ -36,7 +36,9 @@
 
   public:
     static char ID; // Pass identification, replacement for typeid
-    DeadMachineInstructionElim() : MachineFunctionPass(ID) {}
+    DeadMachineInstructionElim() : MachineFunctionPass(ID) {
+     initializeDeadMachineInstructionElimPass(*PassRegistry::getPassRegistry());
+    }
 
   private:
     bool isDead(const MachineInstr *MI) const;

Modified: llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp (original)
+++ llvm/trunk/lib/CodeGen/DwarfEHPrepare.cpp Tue Oct 19 12:21:58 2010
@@ -100,7 +100,9 @@
     DwarfEHPrepare(const TargetMachine *tm) :
       FunctionPass(ID), TM(tm), TLI(TM->getTargetLowering()),
       ExceptionValueIntrinsic(0), SelectorIntrinsic(0),
-      URoR(0), EHCatchAllValue(0), RewindFunction(0) {}
+      URoR(0), EHCatchAllValue(0), RewindFunction(0) {
+        initializeDominatorTreePass(*PassRegistry::getPassRegistry());
+      }
 
     virtual bool runOnFunction(Function &Fn);
 

Modified: llvm/trunk/lib/CodeGen/GCMetadata.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GCMetadata.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GCMetadata.cpp (original)
+++ llvm/trunk/lib/CodeGen/GCMetadata.cpp Tue Oct 19 12:21:58 2010
@@ -69,7 +69,9 @@
 char GCModuleInfo::ID = 0;
 
 GCModuleInfo::GCModuleInfo()
-  : ImmutablePass(ID) {}
+    : ImmutablePass(ID) {
+  initializeGCModuleInfoPass(*PassRegistry::getPassRegistry());
+}
 
 GCModuleInfo::~GCModuleInfo() {
   clear();

Modified: llvm/trunk/lib/CodeGen/GCStrategy.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GCStrategy.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GCStrategy.cpp (original)
+++ llvm/trunk/lib/CodeGen/GCStrategy.cpp Tue Oct 19 12:21:58 2010
@@ -123,6 +123,11 @@
 
 // -----------------------------------------------------------------------------
 
+INITIALIZE_PASS_BEGIN(LowerIntrinsics, "gc-lowering", "GC Lowering",
+                      false, false)
+INITIALIZE_PASS_DEPENDENCY(GCModuleInfo)
+INITIALIZE_PASS_END(LowerIntrinsics, "gc-lowering", "GC Lowering", false, false)
+
 FunctionPass *llvm::createGCLoweringPass() {
   return new LowerIntrinsics();
 }
@@ -130,7 +135,9 @@
 char LowerIntrinsics::ID = 0;
 
 LowerIntrinsics::LowerIntrinsics()
-  : FunctionPass(ID) {}
+  : FunctionPass(ID) {
+    initializeLowerIntrinsicsPass(*PassRegistry::getPassRegistry());
+  }
 
 const char *LowerIntrinsics::getPassName() const {
   return "Lower Garbage Collection Instructions";

Modified: llvm/trunk/lib/CodeGen/IfConversion.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/IfConversion.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/IfConversion.cpp (original)
+++ llvm/trunk/lib/CodeGen/IfConversion.cpp Tue Oct 19 12:21:58 2010
@@ -158,7 +158,9 @@
     int FnNum;
   public:
     static char ID;
-    IfConverter() : MachineFunctionPass(ID), FnNum(-1) {}
+    IfConverter() : MachineFunctionPass(ID), FnNum(-1) {
+      initializeIfConverterPass(*PassRegistry::getPassRegistry());
+    }
     
     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
       AU.addRequired<MachineLoopInfo>();

Modified: llvm/trunk/lib/CodeGen/MachineCSE.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineCSE.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineCSE.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineCSE.cpp Tue Oct 19 12:21:58 2010
@@ -41,7 +41,9 @@
     MachineRegisterInfo *MRI;
   public:
     static char ID; // Pass identification
-    MachineCSE() : MachineFunctionPass(ID), LookAheadLimit(5), CurrVN(0) {}
+    MachineCSE() : MachineFunctionPass(ID), LookAheadLimit(5), CurrVN(0) {
+      initializeMachineCSEPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual bool runOnMachineFunction(MachineFunction &MF);
     

Modified: llvm/trunk/lib/CodeGen/MachineDominators.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineDominators.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineDominators.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineDominators.cpp Tue Oct 19 12:21:58 2010
@@ -42,6 +42,7 @@
 
 MachineDominatorTree::MachineDominatorTree()
     : MachineFunctionPass(ID) {
+  initializeMachineDominatorTreePass(*PassRegistry::getPassRegistry());
   DT = new DominatorTreeBase<MachineBasicBlock>(false);
 }
 

Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Tue Oct 19 12:21:58 2010
@@ -101,10 +101,14 @@
   public:
     static char ID; // Pass identification, replacement for typeid
     MachineLICM() :
-      MachineFunctionPass(ID), PreRegAlloc(true) {}
+      MachineFunctionPass(ID), PreRegAlloc(true) {
+        initializeMachineLICMPass(*PassRegistry::getPassRegistry());
+      }
 
     explicit MachineLICM(bool PreRA) :
-      MachineFunctionPass(ID), PreRegAlloc(PreRA) {}
+      MachineFunctionPass(ID), PreRegAlloc(PreRA) {
+        initializeMachineLICMPass(*PassRegistry::getPassRegistry());
+      }
 
     virtual bool runOnMachineFunction(MachineFunction &MF);
 

Modified: llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp Tue Oct 19 12:21:58 2010
@@ -258,6 +258,7 @@
   ObjFileMMI(0),
   CurCallSite(0), CallsEHReturn(0), CallsUnwindInit(0), DbgInfoAvailable(false),
   CallsExternalFunctionWithFloatingPointArguments(false) {
+  initializeMachineModuleInfoPass(*PassRegistry::getPassRegistry());
   // Always emit some info, by default "no personality" info.
   Personalities.push_back(NULL);
   AddrLabelSymbols = 0;

Modified: llvm/trunk/lib/CodeGen/MachineSink.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineSink.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineSink.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineSink.cpp Tue Oct 19 12:21:58 2010
@@ -57,7 +57,9 @@
 
   public:
     static char ID; // Pass identification
-    MachineSinking() : MachineFunctionPass(ID) {}
+    MachineSinking() : MachineFunctionPass(ID) {
+      initializeMachineSinkingPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual bool runOnMachineFunction(MachineFunction &MF);
 

Modified: llvm/trunk/lib/CodeGen/MachineVerifier.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineVerifier.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineVerifier.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineVerifier.cpp Tue Oct 19 12:21:58 2010
@@ -195,7 +195,9 @@
     static char ID; // Pass ID, replacement for typeid
 
     MachineVerifierPass()
-      : MachineFunctionPass(ID) {}
+      : MachineFunctionPass(ID) {
+        initializeMachineVerifierPassPass(*PassRegistry::getPassRegistry());
+      }
 
     void getAnalysisUsage(AnalysisUsage &AU) const {
       AU.setPreservesAll();

Modified: llvm/trunk/lib/CodeGen/OptimizePHIs.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/OptimizePHIs.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/OptimizePHIs.cpp (original)
+++ llvm/trunk/lib/CodeGen/OptimizePHIs.cpp Tue Oct 19 12:21:58 2010
@@ -33,7 +33,9 @@
 
   public:
     static char ID; // Pass identification
-    OptimizePHIs() : MachineFunctionPass(ID) {}
+    OptimizePHIs() : MachineFunctionPass(ID) {
+      initializeOptimizePHIsPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual bool runOnMachineFunction(MachineFunction &MF);
 

Modified: llvm/trunk/lib/CodeGen/PHIElimination.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PHIElimination.h?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/PHIElimination.h (original)
+++ llvm/trunk/lib/CodeGen/PHIElimination.h Tue Oct 19 12:21:58 2010
@@ -27,7 +27,9 @@
 
   public:
     static char ID; // Pass identification, replacement for typeid
-    PHIElimination() : MachineFunctionPass(ID) {}
+    PHIElimination() : MachineFunctionPass(ID) {
+      initializePHIEliminationPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual bool runOnMachineFunction(MachineFunction &Fn);
     

Modified: llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp (original)
+++ llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp Tue Oct 19 12:21:58 2010
@@ -62,7 +62,9 @@
 
   public:
     static char ID; // Pass identification
-    PeepholeOptimizer() : MachineFunctionPass(ID) {}
+    PeepholeOptimizer() : MachineFunctionPass(ID) {
+      initializePeepholeOptimizerPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual bool runOnMachineFunction(MachineFunction &MF);
 

Modified: llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp (original)
+++ llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp Tue Oct 19 12:21:58 2010
@@ -91,8 +91,9 @@
 
   public:
     static char ID;
-    PreAllocSplitting()
-      : MachineFunctionPass(ID) {}
+    PreAllocSplitting() : MachineFunctionPass(ID) {
+      initializePreAllocSplittingPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual bool runOnMachineFunction(MachineFunction &MF);
 

Modified: llvm/trunk/lib/CodeGen/PrologEpilogInserter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PrologEpilogInserter.h?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/PrologEpilogInserter.h (original)
+++ llvm/trunk/lib/CodeGen/PrologEpilogInserter.h Tue Oct 19 12:21:58 2010
@@ -36,7 +36,9 @@
   class PEI : public MachineFunctionPass {
   public:
     static char ID;
-    PEI() : MachineFunctionPass(ID) {}
+    PEI() : MachineFunctionPass(ID) {
+      initializePEIPass(*PassRegistry::getPassRegistry());
+    }
 
     const char *getPassName() const {
       return "Prolog/Epilog Insertion & Frame Finalization";

Modified: llvm/trunk/lib/CodeGen/RegAllocFast.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocFast.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocFast.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocFast.cpp Tue Oct 19 12:21:58 2010
@@ -48,7 +48,10 @@
   public:
     static char ID;
     RAFast() : MachineFunctionPass(ID), StackSlotForVirtReg(-1),
-               isBulkSpilling(false) {}
+               isBulkSpilling(false) {
+      initializePHIEliminationPass(*PassRegistry::getPassRegistry());
+      initializeTwoAddressInstructionPassPass(*PassRegistry::getPassRegistry());
+    }
   private:
     const TargetMachine *TM;
     MachineFunction *MF;

Modified: llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp Tue Oct 19 12:21:58 2010
@@ -91,6 +91,17 @@
   struct RALinScan : public MachineFunctionPass {
     static char ID;
     RALinScan() : MachineFunctionPass(ID) {
+      initializeLiveIntervalsPass(*PassRegistry::getPassRegistry());
+      initializeStrongPHIEliminationPass(*PassRegistry::getPassRegistry());
+      initializeRegisterCoalescerAnalysisGroup(
+        *PassRegistry::getPassRegistry());
+      initializeCalculateSpillWeightsPass(*PassRegistry::getPassRegistry());
+      initializePreAllocSplittingPass(*PassRegistry::getPassRegistry());
+      initializeLiveStacksPass(*PassRegistry::getPassRegistry());
+      initializeMachineLoopInfoPass(*PassRegistry::getPassRegistry());
+      initializeVirtRegMapPass(*PassRegistry::getPassRegistry());
+      initializeMachineDominatorTreePass(*PassRegistry::getPassRegistry());
+      
       // Initialize the queue to record recently-used registers.
       if (NumRecentlyUsedRegs > 0)
         RecentRegs.resize(NumRecentlyUsedRegs, 0);

Modified: llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp Tue Oct 19 12:21:58 2010
@@ -84,7 +84,18 @@
   static char ID;
 
   /// Construct a PBQP register allocator.
-  RegAllocPBQP(std::auto_ptr<PBQPBuilder> b) : MachineFunctionPass(ID), builder(b) {}
+  RegAllocPBQP(std::auto_ptr<PBQPBuilder> b)
+      : MachineFunctionPass(ID), builder(b) {
+    initializeSlotIndexesPass(*PassRegistry::getPassRegistry());
+    initializeLiveIntervalsPass(*PassRegistry::getPassRegistry());
+    initializeRegisterCoalescerAnalysisGroup(*PassRegistry::getPassRegistry());
+    initializeCalculateSpillWeightsPass(*PassRegistry::getPassRegistry());
+    initializeLiveStacksPass(*PassRegistry::getPassRegistry());
+    initializeMachineLoopInfoPass(*PassRegistry::getPassRegistry());
+    initializeLoopSplitterPass(*PassRegistry::getPassRegistry());
+    initializeVirtRegMapPass(*PassRegistry::getPassRegistry());
+    initializeRenderMachineFunctionPass(*PassRegistry::getPassRegistry());
+  }
 
   /// Return the pass name.
   virtual const char* getPassName() const {

Modified: llvm/trunk/lib/CodeGen/RenderMachineFunction.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RenderMachineFunction.h?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RenderMachineFunction.h (original)
+++ llvm/trunk/lib/CodeGen/RenderMachineFunction.h Tue Oct 19 12:21:58 2010
@@ -202,7 +202,9 @@
   public:
     static char ID;
 
-    RenderMachineFunction() : MachineFunctionPass(ID) {}
+    RenderMachineFunction() : MachineFunctionPass(ID) {
+      initializeRenderMachineFunctionPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual void getAnalysisUsage(AnalysisUsage &au) const;
 

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Tue Oct 19 12:21:58 2010
@@ -177,8 +177,10 @@
   SDB(new SelectionDAGBuilder(*CurDAG, *FuncInfo, OL)),
   GFI(),
   OptLevel(OL),
-  DAGSize(0)
-{}
+  DAGSize(0) {
+    initializeGCModuleInfoPass(*PassRegistry::getPassRegistry());
+    initializeAliasAnalysisAnalysisGroup(*PassRegistry::getPassRegistry());
+  }
 
 SelectionDAGISel::~SelectionDAGISel() {
   delete SDB;

Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h (original)
+++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h Tue Oct 19 12:21:58 2010
@@ -63,7 +63,9 @@
 
   public:
     static char ID; // Pass identifcation, replacement for typeid
-    SimpleRegisterCoalescing() : MachineFunctionPass(ID) {}
+    SimpleRegisterCoalescing() : MachineFunctionPass(ID) {
+      initializeSimpleRegisterCoalescingPass(*PassRegistry::getPassRegistry());
+    }
 
     struct InstrSlots {
       enum {

Modified: llvm/trunk/lib/CodeGen/Splitter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/Splitter.h?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/Splitter.h (original)
+++ llvm/trunk/lib/CodeGen/Splitter.h Tue Oct 19 12:21:58 2010
@@ -36,7 +36,9 @@
   public:
     static char ID;
 
-    LoopSplitter() : MachineFunctionPass(ID) {}
+    LoopSplitter() : MachineFunctionPass(ID) {
+      initializeLoopSplitterPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual void getAnalysisUsage(AnalysisUsage &au) const;
 

Modified: llvm/trunk/lib/CodeGen/StackProtector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StackProtector.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/StackProtector.cpp (original)
+++ llvm/trunk/lib/CodeGen/StackProtector.cpp Tue Oct 19 12:21:58 2010
@@ -62,9 +62,13 @@
     bool RequiresStackProtector() const;
   public:
     static char ID;             // Pass identification, replacement for typeid.
-    StackProtector() : FunctionPass(ID), TLI(0) {}
+    StackProtector() : FunctionPass(ID), TLI(0) {
+      initializeStackProtectorPass(*PassRegistry::getPassRegistry());
+    }
     StackProtector(const TargetLowering *tli)
-      : FunctionPass(ID), TLI(tli) {}
+      : FunctionPass(ID), TLI(tli) {
+        initializeStackProtectorPass(*PassRegistry::getPassRegistry());
+      }
 
     virtual bool runOnFunction(Function &Fn);
   };

Modified: llvm/trunk/lib/CodeGen/StackSlotColoring.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StackSlotColoring.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/StackSlotColoring.cpp (original)
+++ llvm/trunk/lib/CodeGen/StackSlotColoring.cpp Tue Oct 19 12:21:58 2010
@@ -95,9 +95,13 @@
   public:
     static char ID; // Pass identification
     StackSlotColoring() :
-      MachineFunctionPass(ID), ColorWithRegs(false), NextColor(-1) {}
+      MachineFunctionPass(ID), ColorWithRegs(false), NextColor(-1) {
+        initializeStackSlotColoringPass(*PassRegistry::getPassRegistry());
+      }
     StackSlotColoring(bool RegColor) :
-      MachineFunctionPass(ID), ColorWithRegs(RegColor), NextColor(-1) {}
+      MachineFunctionPass(ID), ColorWithRegs(RegColor), NextColor(-1) {
+        initializeStackSlotColoringPass(*PassRegistry::getPassRegistry());
+      }
     
     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
       AU.setPreservesCFG();

Modified: llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp (original)
+++ llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp Tue Oct 19 12:21:58 2010
@@ -39,7 +39,9 @@
 namespace {
   struct StrongPHIElimination : public MachineFunctionPass {
     static char ID; // Pass identification, replacement for typeid
-    StrongPHIElimination() : MachineFunctionPass(ID) {}
+    StrongPHIElimination() : MachineFunctionPass(ID) {
+      initializeStrongPHIEliminationPass(*PassRegistry::getPassRegistry());
+    }
 
     // Waiting stores, for each MBB, the set of copies that need to
     // be inserted into that MBB

Modified: llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp (original)
+++ llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp Tue Oct 19 12:21:58 2010
@@ -138,7 +138,9 @@
 
   public:
     static char ID; // Pass identification, replacement for typeid
-    TwoAddressInstructionPass() : MachineFunctionPass(ID) {}
+    TwoAddressInstructionPass() : MachineFunctionPass(ID) {
+      initializeTwoAddressInstructionPassPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
       AU.setPreservesCFG();

Modified: llvm/trunk/lib/CodeGen/UnreachableBlockElim.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/UnreachableBlockElim.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/UnreachableBlockElim.cpp (original)
+++ llvm/trunk/lib/CodeGen/UnreachableBlockElim.cpp Tue Oct 19 12:21:58 2010
@@ -43,7 +43,9 @@
     virtual bool runOnFunction(Function &F);
   public:
     static char ID; // Pass identification, replacement for typeid
-    UnreachableBlockElim() : FunctionPass(ID) {}
+    UnreachableBlockElim() : FunctionPass(ID) {
+      initializeUnreachableBlockElimPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
       AU.addPreserved<ProfileInfo>();

Modified: llvm/trunk/lib/Target/CBackend/CBackend.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CBackend/CBackend.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CBackend/CBackend.cpp (original)
+++ llvm/trunk/lib/Target/CBackend/CBackend.cpp Tue Oct 19 12:21:58 2010
@@ -77,7 +77,9 @@
   public:
     static char ID;
     CBackendNameAllUsedStructsAndMergeFunctions()
-      : ModulePass(ID) {}
+        : ModulePass(ID) {
+          initializeFindUsedTypesPass(*PassRegistry::getPassRegistry());
+        }
     void getAnalysisUsage(AnalysisUsage &AU) const {
       AU.addRequired<FindUsedTypes>();
     }
@@ -117,6 +119,7 @@
       : FunctionPass(ID), Out(o), IL(0), Mang(0), LI(0),
         TheModule(0), TAsm(0), TCtx(0), TD(0), OpaqueCounter(0),
         NextAnonValueNumber(0) {
+      initializeLoopInfoPass(*PassRegistry::getPassRegistry());
       FPCounter = 0;
     }
 

Modified: llvm/trunk/lib/Target/TargetData.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetData.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Target/TargetData.cpp (original)
+++ llvm/trunk/lib/Target/TargetData.cpp Tue Oct 19 12:21:58 2010
@@ -131,6 +131,8 @@
 }
 
 void TargetData::init(StringRef Desc) {
+  initializeTargetDataPass(*PassRegistry::getPassRegistry());
+  
   LayoutMap = 0;
   LittleEndian = false;
   PointerMemSize = 8;

Modified: llvm/trunk/lib/Transforms/IPO/ArgumentPromotion.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/ArgumentPromotion.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/ArgumentPromotion.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/ArgumentPromotion.cpp Tue Oct 19 12:21:58 2010
@@ -67,7 +67,9 @@
     virtual bool runOnSCC(CallGraphSCC &SCC);
     static char ID; // Pass identification, replacement for typeid
     explicit ArgPromotion(unsigned maxElements = 3)
-      : CallGraphSCCPass(ID), maxElements(maxElements) {}
+        : CallGraphSCCPass(ID), maxElements(maxElements) {
+      initializeArgPromotionPass(*PassRegistry::getPassRegistry());
+    }
 
     /// A vector used to hold the indices of a single GEP instruction
     typedef std::vector<uint64_t> IndicesVector;

Modified: llvm/trunk/lib/Transforms/IPO/ConstantMerge.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/ConstantMerge.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/ConstantMerge.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/ConstantMerge.cpp Tue Oct 19 12:21:58 2010
@@ -33,7 +33,9 @@
 namespace {
   struct ConstantMerge : public ModulePass {
     static char ID; // Pass identification, replacement for typeid
-    ConstantMerge() : ModulePass(ID) {}
+    ConstantMerge() : ModulePass(ID) {
+      initializeConstantMergePass(*PassRegistry::getPassRegistry());
+    }
 
     // run - For this pass, process all of the globals in the module,
     // eliminating duplicate constants.

Modified: llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp Tue Oct 19 12:21:58 2010
@@ -126,7 +126,9 @@
 
   public:
     static char ID; // Pass identification, replacement for typeid
-    DAE() : ModulePass(ID) {}
+    DAE() : ModulePass(ID) {
+      initializeDAEPass(*PassRegistry::getPassRegistry());
+    }
 
     bool runOnModule(Module &M);
 

Modified: llvm/trunk/lib/Transforms/IPO/DeadTypeElimination.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/DeadTypeElimination.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/DeadTypeElimination.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/DeadTypeElimination.cpp Tue Oct 19 12:21:58 2010
@@ -26,7 +26,9 @@
 namespace {
   struct DTE : public ModulePass {
     static char ID; // Pass identification, replacement for typeid
-    DTE() : ModulePass(ID) {}
+    DTE() : ModulePass(ID) {
+      initializeDTEPass(*PassRegistry::getPassRegistry());
+    }
 
     // doPassInitialization - For this pass, it removes global symbol table
     // entries for primitive types.  These are never used for linking in GCC and

Modified: llvm/trunk/lib/Transforms/IPO/FunctionAttrs.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/FunctionAttrs.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/FunctionAttrs.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/FunctionAttrs.cpp Tue Oct 19 12:21:58 2010
@@ -41,7 +41,9 @@
 namespace {
   struct FunctionAttrs : public CallGraphSCCPass {
     static char ID; // Pass identification, replacement for typeid
-    FunctionAttrs() : CallGraphSCCPass(ID) {}
+    FunctionAttrs() : CallGraphSCCPass(ID) {
+      initializeFunctionAttrsPass(*PassRegistry::getPassRegistry());
+    }
 
     // runOnSCC - Analyze the SCC, performing the transformation if possible.
     bool runOnSCC(CallGraphSCC &SCC);

Modified: llvm/trunk/lib/Transforms/IPO/GlobalDCE.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/GlobalDCE.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/GlobalDCE.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/GlobalDCE.cpp Tue Oct 19 12:21:58 2010
@@ -31,7 +31,9 @@
 namespace {
   struct GlobalDCE : public ModulePass {
     static char ID; // Pass identification, replacement for typeid
-    GlobalDCE() : ModulePass(ID) {}
+    GlobalDCE() : ModulePass(ID) {
+      initializeGlobalDCEPass(*PassRegistry::getPassRegistry());
+    }
 
     // run - Do the GlobalDCE pass on the specified module, optionally updating
     // the specified callgraph to reflect the changes.

Modified: llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp Tue Oct 19 12:21:58 2010
@@ -59,7 +59,9 @@
     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
     }
     static char ID; // Pass identification, replacement for typeid
-    GlobalOpt() : ModulePass(ID) {}
+    GlobalOpt() : ModulePass(ID) {
+      initializeGlobalOptPass(*PassRegistry::getPassRegistry());
+    }
 
     bool runOnModule(Module &M);
 

Modified: llvm/trunk/lib/Transforms/IPO/IPConstantPropagation.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/IPConstantPropagation.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/IPConstantPropagation.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/IPConstantPropagation.cpp Tue Oct 19 12:21:58 2010
@@ -35,7 +35,9 @@
   ///
   struct IPCP : public ModulePass {
     static char ID; // Pass identification, replacement for typeid
-    IPCP() : ModulePass(ID) {}
+    IPCP() : ModulePass(ID) {
+      initializeIPCPPass(*PassRegistry::getPassRegistry());
+    }
 
     bool runOnModule(Module &M);
   private:

Modified: llvm/trunk/lib/Transforms/IPO/InlineAlways.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/InlineAlways.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/InlineAlways.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/InlineAlways.cpp Tue Oct 19 12:21:58 2010
@@ -36,7 +36,9 @@
     InlineCostAnalyzer CA;
   public:
     // Use extremely low threshold. 
-    AlwaysInliner() : Inliner(ID, -2000000000) {}
+    AlwaysInliner() : Inliner(ID, -2000000000) {
+      initializeAlwaysInlinerPass(*PassRegistry::getPassRegistry());
+    }
     static char ID; // Pass identification, replacement for typeid
     InlineCost getInlineCost(CallSite CS) {
       return CA.getInlineCost(CS, NeverInline);
@@ -61,7 +63,10 @@
 }
 
 char AlwaysInliner::ID = 0;
-INITIALIZE_PASS(AlwaysInliner, "always-inline",
+INITIALIZE_PASS_BEGIN(AlwaysInliner, "always-inline",
+                "Inliner for always_inline functions", false, false)
+INITIALIZE_AG_DEPENDENCY(CallGraph)
+INITIALIZE_PASS_END(AlwaysInliner, "always-inline",
                 "Inliner for always_inline functions", false, false)
 
 Pass *llvm::createAlwaysInlinerPass() { return new AlwaysInliner(); }

Modified: llvm/trunk/lib/Transforms/IPO/InlineSimple.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/InlineSimple.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/InlineSimple.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/InlineSimple.cpp Tue Oct 19 12:21:58 2010
@@ -33,8 +33,12 @@
     SmallPtrSet<const Function*, 16> NeverInline; 
     InlineCostAnalyzer CA;
   public:
-    SimpleInliner() : Inliner(ID) {}
-    SimpleInliner(int Threshold) : Inliner(ID, Threshold) {}
+    SimpleInliner() : Inliner(ID) {
+      initializeSimpleInlinerPass(*PassRegistry::getPassRegistry());
+    }
+    SimpleInliner(int Threshold) : Inliner(ID, Threshold) {
+      initializeSimpleInlinerPass(*PassRegistry::getPassRegistry());
+    }
     static char ID; // Pass identification, replacement for typeid
     InlineCost getInlineCost(CallSite CS) {
       return CA.getInlineCost(CS, NeverInline);

Modified: llvm/trunk/lib/Transforms/IPO/Internalize.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/Internalize.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/Internalize.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/Internalize.cpp Tue Oct 19 12:21:58 2010
@@ -68,6 +68,7 @@
 
 InternalizePass::InternalizePass(bool AllButMain)
   : ModulePass(ID), AllButMain(AllButMain){
+  initializeInternalizePassPass(*PassRegistry::getPassRegistry());
   if (!APIFile.empty())           // If a filename is specified, use it.
     LoadFile(APIFile.c_str());
   if (!APIList.empty())           // If a list is specified, use it as well.
@@ -76,6 +77,7 @@
 
 InternalizePass::InternalizePass(const std::vector<const char *>&exportList)
   : ModulePass(ID), AllButMain(false){
+  initializeInternalizePassPass(*PassRegistry::getPassRegistry());
   for(std::vector<const char *>::const_iterator itr = exportList.begin();
         itr != exportList.end(); itr++) {
     ExternalNames.insert(*itr);

Modified: llvm/trunk/lib/Transforms/IPO/LoopExtractor.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/LoopExtractor.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/LoopExtractor.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/LoopExtractor.cpp Tue Oct 19 12:21:58 2010
@@ -37,7 +37,9 @@
     unsigned NumLoops;
 
     explicit LoopExtractor(unsigned numLoops = ~0) 
-      : LoopPass(ID), NumLoops(numLoops) {}
+      : LoopPass(ID), NumLoops(numLoops) {
+        initializeLoopExtractorPass(*PassRegistry::getPassRegistry());
+      }
 
     virtual bool runOnLoop(Loop *L, LPPassManager &LPM);
 

Modified: llvm/trunk/lib/Transforms/IPO/LowerSetJmp.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/LowerSetJmp.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/LowerSetJmp.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/LowerSetJmp.cpp Tue Oct 19 12:21:58 2010
@@ -109,7 +109,9 @@
     bool IsTransformableFunction(StringRef Name);
   public:
     static char ID; // Pass identification, replacement for typeid
-    LowerSetJmp() : ModulePass(ID) {}
+    LowerSetJmp() : ModulePass(ID) {
+      initializeLowerSetJmpPass(*PassRegistry::getPassRegistry());
+    }
 
     void visitCallInst(CallInst& CI);
     void visitInvokeInst(InvokeInst& II);

Modified: llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp Tue Oct 19 12:21:58 2010
@@ -151,7 +151,9 @@
 class MergeFunctions : public ModulePass {
 public:
   static char ID;
-  MergeFunctions() : ModulePass(ID) {}
+  MergeFunctions() : ModulePass(ID) {
+    initializeMergeFunctionsPass(*PassRegistry::getPassRegistry());
+  }
 
   bool runOnModule(Module &M);
 

Modified: llvm/trunk/lib/Transforms/IPO/PartialInlining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/PartialInlining.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/PartialInlining.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/PartialInlining.cpp Tue Oct 19 12:21:58 2010
@@ -30,7 +30,9 @@
   struct PartialInliner : public ModulePass {
     virtual void getAnalysisUsage(AnalysisUsage &AU) const { }
     static char ID; // Pass identification, replacement for typeid
-    PartialInliner() : ModulePass(ID) {}
+    PartialInliner() : ModulePass(ID) {
+      initializePartialInlinerPass(*PassRegistry::getPassRegistry());
+    }
     
     bool runOnModule(Module& M);
     

Modified: llvm/trunk/lib/Transforms/IPO/PartialSpecialization.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/PartialSpecialization.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/PartialSpecialization.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/PartialSpecialization.cpp Tue Oct 19 12:21:58 2010
@@ -46,7 +46,9 @@
     InlineCostAnalyzer CA;
   public :
     static char ID; // Pass identification, replacement for typeid
-    PartSpec() : ModulePass(ID) {}
+    PartSpec() : ModulePass(ID) {
+      initializePartSpecPass(*PassRegistry::getPassRegistry());
+    }
     bool runOnModule(Module &M);
   };
 }

Modified: llvm/trunk/lib/Transforms/IPO/PruneEH.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/PruneEH.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/PruneEH.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/PruneEH.cpp Tue Oct 19 12:21:58 2010
@@ -37,7 +37,9 @@
 namespace {
   struct PruneEH : public CallGraphSCCPass {
     static char ID; // Pass identification, replacement for typeid
-    PruneEH() : CallGraphSCCPass(ID) {}
+    PruneEH() : CallGraphSCCPass(ID) {
+      initializePruneEHPass(*PassRegistry::getPassRegistry());
+    }
 
     // runOnSCC - Analyze the SCC, performing the transformation if possible.
     bool runOnSCC(CallGraphSCC &SCC);

Modified: llvm/trunk/lib/Transforms/IPO/StripDeadPrototypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/StripDeadPrototypes.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/StripDeadPrototypes.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/StripDeadPrototypes.cpp Tue Oct 19 12:21:58 2010
@@ -29,7 +29,9 @@
 class StripDeadPrototypesPass : public ModulePass {
 public:
   static char ID; // Pass identification, replacement for typeid
-  StripDeadPrototypesPass() : ModulePass(ID) { }
+  StripDeadPrototypesPass() : ModulePass(ID) {
+    initializeStripDeadPrototypesPassPass(*PassRegistry::getPassRegistry());
+  }
   virtual bool runOnModule(Module &M);
 };
 

Modified: llvm/trunk/lib/Transforms/IPO/StripSymbols.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/StripSymbols.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/StripSymbols.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/StripSymbols.cpp Tue Oct 19 12:21:58 2010
@@ -39,7 +39,9 @@
   public:
     static char ID; // Pass identification, replacement for typeid
     explicit StripSymbols(bool ODI = false) 
-      : ModulePass(ID), OnlyDebugInfo(ODI) {}
+      : ModulePass(ID), OnlyDebugInfo(ODI) {
+        initializeStripSymbolsPass(*PassRegistry::getPassRegistry());
+      }
 
     virtual bool runOnModule(Module &M);
 
@@ -52,7 +54,9 @@
   public:
     static char ID; // Pass identification, replacement for typeid
     explicit StripNonDebugSymbols()
-      : ModulePass(ID) {}
+      : ModulePass(ID) {
+        initializeStripNonDebugSymbolsPass(*PassRegistry::getPassRegistry());
+      }
 
     virtual bool runOnModule(Module &M);
 
@@ -65,7 +69,9 @@
   public:
     static char ID; // Pass identification, replacement for typeid
     explicit StripDebugDeclare()
-      : ModulePass(ID) {}
+      : ModulePass(ID) {
+        initializeStripDebugDeclarePass(*PassRegistry::getPassRegistry());
+      }
 
     virtual bool runOnModule(Module &M);
 
@@ -78,7 +84,9 @@
   public:
     static char ID; // Pass identification, replacement for typeid
     explicit StripDeadDebugInfo()
-      : ModulePass(ID) {}
+      : ModulePass(ID) {
+        initializeStripDeadDebugInfoPass(*PassRegistry::getPassRegistry());
+      }
 
     virtual bool runOnModule(Module &M);
 

Modified: llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/StructRetPromotion.cpp Tue Oct 19 12:21:58 2010
@@ -50,7 +50,9 @@
 
     virtual bool runOnSCC(CallGraphSCC &SCC);
     static char ID; // Pass identification, replacement for typeid
-    SRETPromotion() : CallGraphSCCPass(ID) {}
+    SRETPromotion() : CallGraphSCCPass(ID) {
+      initializeSRETPromotionPass(*PassRegistry::getPassRegistry());
+    }
 
   private:
     CallGraphNode *PromoteReturn(CallGraphNode *CGN);

Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombine.h?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombine.h (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombine.h Tue Oct 19 12:21:58 2010
@@ -81,7 +81,9 @@
   BuilderTy *Builder;
       
   static char ID; // Pass identification, replacement for typeid
-  InstCombiner() : FunctionPass(ID), TD(0), Builder(0) {}
+  InstCombiner() : FunctionPass(ID), TD(0), Builder(0) {
+    initializeInstCombinerPass(*PassRegistry::getPassRegistry());
+  }
 
 public:
   virtual bool runOnFunction(Function &F);

Modified: llvm/trunk/lib/Transforms/Instrumentation/EdgeProfiling.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Instrumentation/EdgeProfiling.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Instrumentation/EdgeProfiling.cpp (original)
+++ llvm/trunk/lib/Transforms/Instrumentation/EdgeProfiling.cpp Tue Oct 19 12:21:58 2010
@@ -34,7 +34,9 @@
     bool runOnModule(Module &M);
   public:
     static char ID; // Pass identification, replacement for typeid
-    EdgeProfiler() : ModulePass(ID) {}
+    EdgeProfiler() : ModulePass(ID) {
+      initializeEdgeProfilerPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual const char *getPassName() const {
       return "Edge Profiler";

Modified: llvm/trunk/lib/Transforms/Instrumentation/OptimalEdgeProfiling.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Instrumentation/OptimalEdgeProfiling.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Instrumentation/OptimalEdgeProfiling.cpp (original)
+++ llvm/trunk/lib/Transforms/Instrumentation/OptimalEdgeProfiling.cpp Tue Oct 19 12:21:58 2010
@@ -36,7 +36,9 @@
     bool runOnModule(Module &M);
   public:
     static char ID; // Pass identification, replacement for typeid
-    OptimalEdgeProfiler() : ModulePass(ID) {}
+    OptimalEdgeProfiler() : ModulePass(ID) {
+      initializeOptimalEdgeProfilerPass(*PassRegistry::getPassRegistry());
+    }
 
     void getAnalysisUsage(AnalysisUsage &AU) const {
       AU.addRequiredID(ProfileEstimatorPassID);

Modified: llvm/trunk/lib/Transforms/Scalar/ADCE.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/ADCE.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/ADCE.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/ADCE.cpp Tue Oct 19 12:21:58 2010
@@ -33,7 +33,9 @@
 namespace {
   struct ADCE : public FunctionPass {
     static char ID; // Pass identification, replacement for typeid
-    ADCE() : FunctionPass(ID) {}
+    ADCE() : FunctionPass(ID) {
+      initializeADCEPass(*PassRegistry::getPassRegistry());
+    }
     
     virtual bool runOnFunction(Function& F);
     

Modified: llvm/trunk/lib/Transforms/Scalar/BasicBlockPlacement.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/BasicBlockPlacement.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/BasicBlockPlacement.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/BasicBlockPlacement.cpp Tue Oct 19 12:21:58 2010
@@ -41,7 +41,9 @@
 namespace {
   struct BlockPlacement : public FunctionPass {
     static char ID; // Pass identification, replacement for typeid
-    BlockPlacement() : FunctionPass(ID) {}
+    BlockPlacement() : FunctionPass(ID) {
+      initializeBlockPlacementPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual bool runOnFunction(Function &F);
 

Modified: llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp Tue Oct 19 12:21:58 2010
@@ -63,7 +63,9 @@
   public:
     static char ID; // Pass identification, replacement for typeid
     explicit CodeGenPrepare(const TargetLowering *tli = 0)
-      : FunctionPass(ID), TLI(tli) {}
+      : FunctionPass(ID), TLI(tli) {
+        initializeCodeGenPreparePass(*PassRegistry::getPassRegistry());
+      }
     bool runOnFunction(Function &F);
 
     virtual void getAnalysisUsage(AnalysisUsage &AU) const {

Modified: llvm/trunk/lib/Transforms/Scalar/ConstantProp.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/ConstantProp.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/ConstantProp.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/ConstantProp.cpp Tue Oct 19 12:21:58 2010
@@ -34,7 +34,9 @@
 namespace {
   struct ConstantPropagation : public FunctionPass {
     static char ID; // Pass identification, replacement for typeid
-    ConstantPropagation() : FunctionPass(ID) {}
+    ConstantPropagation() : FunctionPass(ID) {
+      initializeConstantPropagationPass(*PassRegistry::getPassRegistry());
+    }
 
     bool runOnFunction(Function &F);
 

Modified: llvm/trunk/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp Tue Oct 19 12:21:58 2010
@@ -39,7 +39,9 @@
     
   public:
     static char ID;
-    CorrelatedValuePropagation(): FunctionPass(ID) { }
+    CorrelatedValuePropagation(): FunctionPass(ID) {
+     initializeCorrelatedValuePropagationPass(*PassRegistry::getPassRegistry());
+    }
     
     bool runOnFunction(Function &F);
     

Modified: llvm/trunk/lib/Transforms/Scalar/DCE.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/DCE.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/DCE.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/DCE.cpp Tue Oct 19 12:21:58 2010
@@ -35,7 +35,9 @@
   //
   struct DeadInstElimination : public BasicBlockPass {
     static char ID; // Pass identification, replacement for typeid
-    DeadInstElimination() : BasicBlockPass(ID) {}
+    DeadInstElimination() : BasicBlockPass(ID) {
+      initializeDeadInstEliminationPass(*PassRegistry::getPassRegistry());
+    }
     virtual bool runOnBasicBlock(BasicBlock &BB) {
       bool Changed = false;
       for (BasicBlock::iterator DI = BB.begin(); DI != BB.end(); ) {
@@ -70,7 +72,9 @@
   //
   struct DCE : public FunctionPass {
     static char ID; // Pass identification, replacement for typeid
-    DCE() : FunctionPass(ID) {}
+    DCE() : FunctionPass(ID) {
+      initializeDCEPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual bool runOnFunction(Function &F);
 

Modified: llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp Tue Oct 19 12:21:58 2010
@@ -40,7 +40,9 @@
     TargetData *TD;
 
     static char ID; // Pass identification, replacement for typeid
-    DSE() : FunctionPass(ID) {}
+    DSE() : FunctionPass(ID) {
+      initializeDSEPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual bool runOnFunction(Function &F) {
       bool Changed = false;

Modified: llvm/trunk/lib/Transforms/Scalar/GEPSplitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GEPSplitter.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/GEPSplitter.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/GEPSplitter.cpp Tue Oct 19 12:21:58 2010
@@ -27,7 +27,9 @@
     virtual void getAnalysisUsage(AnalysisUsage &AU) const;
   public:
     static char ID; // Pass identification, replacement for typeid
-    explicit GEPSplitter() : FunctionPass(ID) {}
+    explicit GEPSplitter() : FunctionPass(ID) {
+      initializeGEPSplitterPass(*PassRegistry::getPassRegistry());
+    }
   };
 }
 

Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Tue Oct 19 12:21:58 2010
@@ -662,7 +662,9 @@
   public:
     static char ID; // Pass identification, replacement for typeid
     explicit GVN(bool noloads = false)
-      : FunctionPass(ID), NoLoads(noloads), MD(0) { }
+        : FunctionPass(ID), NoLoads(noloads), MD(0) {
+      initializeGVNPass(*PassRegistry::getPassRegistry());
+    }
 
   private:
     bool NoLoads;

Modified: llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/IndVarSimplify.cpp Tue Oct 19 12:21:58 2010
@@ -77,7 +77,9 @@
   public:
 
     static char ID; // Pass identification, replacement for typeid
-    IndVarSimplify() : LoopPass(ID) {}
+    IndVarSimplify() : LoopPass(ID) {
+      initializeIndVarSimplifyPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual bool runOnLoop(Loop *L, LPPassManager &LPM);
 

Modified: llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp Tue Oct 19 12:21:58 2010
@@ -86,7 +86,9 @@
     };
   public:
     static char ID; // Pass identification
-    JumpThreading() : FunctionPass(ID) {}
+    JumpThreading() : FunctionPass(ID) {
+      initializeJumpThreadingPass(*PassRegistry::getPassRegistry());
+    }
 
     bool runOnFunction(Function &F);
     

Modified: llvm/trunk/lib/Transforms/Scalar/LICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LICM.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LICM.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LICM.cpp Tue Oct 19 12:21:58 2010
@@ -67,7 +67,9 @@
 namespace {
   struct LICM : public LoopPass {
     static char ID; // Pass identification, replacement for typeid
-    LICM() : LoopPass(ID) {}
+    LICM() : LoopPass(ID) {
+      initializeLICMPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual bool runOnLoop(Loop *L, LPPassManager &LPM);
 

Modified: llvm/trunk/lib/Transforms/Scalar/LoopDeletion.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopDeletion.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LoopDeletion.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LoopDeletion.cpp Tue Oct 19 12:21:58 2010
@@ -28,7 +28,9 @@
   class LoopDeletion : public LoopPass {
   public:
     static char ID; // Pass ID, replacement for typeid
-    LoopDeletion() : LoopPass(ID) {}
+    LoopDeletion() : LoopPass(ID) {
+      initializeLoopDeletionPass(*PassRegistry::getPassRegistry());
+    }
     
     // Possibly eliminate loop L if it is dead.
     bool runOnLoop(Loop* L, LPPassManager& LPM);

Modified: llvm/trunk/lib/Transforms/Scalar/LoopRotation.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopRotation.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LoopRotation.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LoopRotation.cpp Tue Oct 19 12:21:58 2010
@@ -35,7 +35,9 @@
   class LoopRotate : public LoopPass {
   public:
     static char ID; // Pass ID, replacement for typeid
-    LoopRotate() : LoopPass(ID) {}
+    LoopRotate() : LoopPass(ID) {
+      initializeLoopRotatePass(*PassRegistry::getPassRegistry());
+    }
 
     // Rotate Loop L as many times as possible. Return true if
     // loop is rotated at least once.

Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Tue Oct 19 12:21:58 2010
@@ -3807,7 +3807,9 @@
 }
 
 LoopStrengthReduce::LoopStrengthReduce(const TargetLowering *tli)
-  : LoopPass(ID), TLI(tli) {}
+  : LoopPass(ID), TLI(tli) {
+    initializeLoopStrengthReducePass(*PassRegistry::getPassRegistry());
+  }
 
 void LoopStrengthReduce::getAnalysisUsage(AnalysisUsage &AU) const {
   // We split critical edges, so we change the CFG.  However, we do update

Modified: llvm/trunk/lib/Transforms/Scalar/LoopUnrollPass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopUnrollPass.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LoopUnrollPass.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LoopUnrollPass.cpp Tue Oct 19 12:21:58 2010
@@ -43,7 +43,9 @@
   class LoopUnroll : public LoopPass {
   public:
     static char ID; // Pass ID, replacement for typeid
-    LoopUnroll() : LoopPass(ID) {}
+    LoopUnroll() : LoopPass(ID) {
+      initializeLoopUnrollPass(*PassRegistry::getPassRegistry());
+    }
 
     /// A magic value for use with the Threshold parameter to indicate
     /// that the loop unroll should be performed regardless of how much

Modified: llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp Tue Oct 19 12:21:58 2010
@@ -93,7 +93,9 @@
     explicit LoopUnswitch(bool Os = false) : 
       LoopPass(ID), OptimizeForSize(Os), redoLoop(false), 
       currentLoop(NULL), DT(NULL), loopHeader(NULL),
-      loopPreheader(NULL) {}
+      loopPreheader(NULL) {
+        initializeLoopUnswitchPass(*PassRegistry::getPassRegistry());
+      }
 
     bool runOnLoop(Loop *L, LPPassManager &LPM);
     bool processCurrentLoop();

Modified: llvm/trunk/lib/Transforms/Scalar/LowerAtomic.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LowerAtomic.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LowerAtomic.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LowerAtomic.cpp Tue Oct 19 12:21:58 2010
@@ -118,7 +118,9 @@
 namespace {
   struct LowerAtomic : public BasicBlockPass {
     static char ID;
-    LowerAtomic() : BasicBlockPass(ID) {}
+    LowerAtomic() : BasicBlockPass(ID) {
+      initializeLowerAtomicPass(*PassRegistry::getPassRegistry());
+    }
     bool runOnBasicBlock(BasicBlock &BB) {
       bool Changed = false;
       for (BasicBlock::iterator DI = BB.begin(), DE = BB.end(); DI != DE; )

Modified: llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp Tue Oct 19 12:21:58 2010
@@ -304,7 +304,9 @@
     bool runOnFunction(Function &F);
   public:
     static char ID; // Pass identification, replacement for typeid
-    MemCpyOpt() : FunctionPass(ID) {}
+    MemCpyOpt() : FunctionPass(ID) {
+      initializeMemCpyOptPass(*PassRegistry::getPassRegistry());
+    }
 
   private:
     // This transformation requires dominator postdominator info

Modified: llvm/trunk/lib/Transforms/Scalar/Reassociate.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/Reassociate.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/Reassociate.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/Reassociate.cpp Tue Oct 19 12:21:58 2010
@@ -77,7 +77,9 @@
     bool MadeChange;
   public:
     static char ID; // Pass identification, replacement for typeid
-    Reassociate() : FunctionPass(ID) {}
+    Reassociate() : FunctionPass(ID) {
+      initializeReassociatePass(*PassRegistry::getPassRegistry());
+    }
 
     bool runOnFunction(Function &F);
 

Modified: llvm/trunk/lib/Transforms/Scalar/Reg2Mem.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/Reg2Mem.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/Reg2Mem.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/Reg2Mem.cpp Tue Oct 19 12:21:58 2010
@@ -36,7 +36,9 @@
 namespace {
   struct RegToMem : public FunctionPass {
     static char ID; // Pass identification, replacement for typeid
-    RegToMem() : FunctionPass(ID) {}
+    RegToMem() : FunctionPass(ID) {
+      initializeRegToMemPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
       AU.addRequiredID(BreakCriticalEdgesID);

Modified: llvm/trunk/lib/Transforms/Scalar/SCCP.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/SCCP.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/SCCP.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/SCCP.cpp Tue Oct 19 12:21:58 2010
@@ -1585,7 +1585,9 @@
   ///
   struct SCCP : public FunctionPass {
     static char ID; // Pass identification, replacement for typeid
-    SCCP() : FunctionPass(ID) {}
+    SCCP() : FunctionPass(ID) {
+      initializeSCCPPass(*PassRegistry::getPassRegistry());
+    }
 
     // runOnFunction - Run the Sparse Conditional Constant Propagation
     // algorithm, and return true if the function was modified.
@@ -1701,7 +1703,9 @@
   ///
   struct IPSCCP : public ModulePass {
     static char ID;
-    IPSCCP() : ModulePass(ID) {}
+    IPSCCP() : ModulePass(ID) {
+      initializeIPSCCPPass(*PassRegistry::getPassRegistry());
+    }
     bool runOnModule(Module &M);
   };
 } // end anonymous namespace

Modified: llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp Tue Oct 19 12:21:58 2010
@@ -53,6 +53,7 @@
   struct SROA : public FunctionPass {
     static char ID; // Pass identification, replacement for typeid
     explicit SROA(signed T = -1) : FunctionPass(ID) {
+      initializeSROAPass(*PassRegistry::getPassRegistry());
       if (T == -1)
         SRThreshold = 128;
       else

Modified: llvm/trunk/lib/Transforms/Scalar/SimplifyCFGPass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/SimplifyCFGPass.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/SimplifyCFGPass.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/SimplifyCFGPass.cpp Tue Oct 19 12:21:58 2010
@@ -42,7 +42,9 @@
 namespace {
   struct CFGSimplifyPass : public FunctionPass {
     static char ID; // Pass identification, replacement for typeid
-    CFGSimplifyPass() : FunctionPass(ID) {}
+    CFGSimplifyPass() : FunctionPass(ID) {
+      initializeCFGSimplifyPassPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual bool runOnFunction(Function &F);
   };

Modified: llvm/trunk/lib/Transforms/Scalar/SimplifyHalfPowrLibCalls.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/SimplifyHalfPowrLibCalls.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/SimplifyHalfPowrLibCalls.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/SimplifyHalfPowrLibCalls.cpp Tue Oct 19 12:21:58 2010
@@ -32,7 +32,9 @@
     const TargetData *TD;
   public:
     static char ID; // Pass identification
-    SimplifyHalfPowrLibCalls() : FunctionPass(ID) {}
+    SimplifyHalfPowrLibCalls() : FunctionPass(ID) {
+      initializeSimplifyHalfPowrLibCallsPass(*PassRegistry::getPassRegistry());
+    }
 
     bool runOnFunction(Function &F);
 

Modified: llvm/trunk/lib/Transforms/Scalar/SimplifyLibCalls.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/SimplifyLibCalls.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/SimplifyLibCalls.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/SimplifyLibCalls.cpp Tue Oct 19 12:21:58 2010
@@ -1374,7 +1374,9 @@
     bool Modified;  // This is only used by doInitialization.
   public:
     static char ID; // Pass identification
-    SimplifyLibCalls() : FunctionPass(ID), StrCpy(false), StrCpyChk(true) {}
+    SimplifyLibCalls() : FunctionPass(ID), StrCpy(false), StrCpyChk(true) {
+      initializeSimplifyLibCallsPass(*PassRegistry::getPassRegistry());
+    }
     void InitOptimizations();
     bool runOnFunction(Function &F);
 

Modified: llvm/trunk/lib/Transforms/Scalar/Sink.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/Sink.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/Sink.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/Sink.cpp Tue Oct 19 12:21:58 2010
@@ -35,7 +35,9 @@
 
   public:
     static char ID; // Pass identification
-    Sinking() : FunctionPass(ID) {}
+    Sinking() : FunctionPass(ID) {
+      initializeSinkingPass(*PassRegistry::getPassRegistry());
+    }
     
     virtual bool runOnFunction(Function &F);
     

Modified: llvm/trunk/lib/Transforms/Scalar/TailDuplication.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/TailDuplication.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/TailDuplication.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/TailDuplication.cpp Tue Oct 19 12:21:58 2010
@@ -49,7 +49,9 @@
     bool runOnFunction(Function &F);
   public:
     static char ID; // Pass identification, replacement for typeid
-    TailDup() : FunctionPass(ID) {}
+    TailDup() : FunctionPass(ID) {
+      initializeTailDupPass(*PassRegistry::getPassRegistry());
+    }
 
   private:
     inline bool shouldEliminateUnconditionalBranch(TerminatorInst *, unsigned);

Modified: llvm/trunk/lib/Transforms/Scalar/TailRecursionElimination.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/TailRecursionElimination.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/TailRecursionElimination.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/TailRecursionElimination.cpp Tue Oct 19 12:21:58 2010
@@ -72,7 +72,9 @@
 namespace {
   struct TailCallElim : public FunctionPass {
     static char ID; // Pass identification, replacement for typeid
-    TailCallElim() : FunctionPass(ID) {}
+    TailCallElim() : FunctionPass(ID) {
+      initializeTailCallElimPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual bool runOnFunction(Function &F);
 

Modified: llvm/trunk/lib/Transforms/Utils/BreakCriticalEdges.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/BreakCriticalEdges.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Utils/BreakCriticalEdges.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/BreakCriticalEdges.cpp Tue Oct 19 12:21:58 2010
@@ -36,7 +36,9 @@
 namespace {
   struct BreakCriticalEdges : public FunctionPass {
     static char ID; // Pass identification, replacement for typeid
-    BreakCriticalEdges() : FunctionPass(ID) {}
+    BreakCriticalEdges() : FunctionPass(ID) {
+      initializeBreakCriticalEdgesPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual bool runOnFunction(Function &F);
 

Modified: llvm/trunk/lib/Transforms/Utils/InstructionNamer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/InstructionNamer.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Utils/InstructionNamer.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/InstructionNamer.cpp Tue Oct 19 12:21:58 2010
@@ -23,7 +23,9 @@
 namespace {
   struct InstNamer : public FunctionPass {
     static char ID; // Pass identification, replacement for typeid
-    InstNamer() : FunctionPass(ID) {}
+    InstNamer() : FunctionPass(ID) {
+      initializeInstNamerPass(*PassRegistry::getPassRegistry());
+    }
     
     void getAnalysisUsage(AnalysisUsage &Info) const {
       Info.setPreservesAll();

Modified: llvm/trunk/lib/Transforms/Utils/LCSSA.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/LCSSA.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Utils/LCSSA.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/LCSSA.cpp Tue Oct 19 12:21:58 2010
@@ -47,7 +47,9 @@
 namespace {
   struct LCSSA : public LoopPass {
     static char ID; // Pass identification, replacement for typeid
-    LCSSA() : LoopPass(ID) {}
+    LCSSA() : LoopPass(ID) {
+      initializeLCSSAPass(*PassRegistry::getPassRegistry());
+    }
 
     // Cached analysis information for the current function.
     DominatorTree *DT;

Modified: llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/LoopSimplify.cpp Tue Oct 19 12:21:58 2010
@@ -65,7 +65,9 @@
 namespace {
   struct LoopSimplify : public LoopPass {
     static char ID; // Pass identification, replacement for typeid
-    LoopSimplify() : LoopPass(ID) {}
+    LoopSimplify() : LoopPass(ID) {
+      initializeLoopSimplifyPass(*PassRegistry::getPassRegistry());
+    }
 
     // AA - If we have an alias analysis object to update, this is it, otherwise
     // this is null.
@@ -111,11 +113,6 @@
                 "Canonicalize natural loops", true, false)
 INITIALIZE_PASS_DEPENDENCY(DominatorTree)
 INITIALIZE_PASS_DEPENDENCY(LoopInfo)
-INITIALIZE_PASS_DEPENDENCY(ScalarEvolution)
-INITIALIZE_PASS_DEPENDENCY(BreakCriticalEdges)
-INITIALIZE_PASS_DEPENDENCY(DominanceFrontier)
-INITIALIZE_PASS_DEPENDENCY(LCSSA)
-INITIALIZE_AG_DEPENDENCY(AliasAnalysis)
 INITIALIZE_PASS_END(LoopSimplify, "loopsimplify",
                 "Canonicalize natural loops", true, false)
 

Modified: llvm/trunk/lib/Transforms/Utils/LowerInvoke.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/LowerInvoke.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Utils/LowerInvoke.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/LowerInvoke.cpp Tue Oct 19 12:21:58 2010
@@ -79,7 +79,9 @@
     explicit LowerInvoke(const TargetLowering *tli = NULL,
                          bool useExpensiveEHSupport = ExpensiveEHSupport)
       : FunctionPass(ID), useExpensiveEHSupport(useExpensiveEHSupport),
-        TLI(tli) { }
+        TLI(tli) {
+      initializeLowerInvokePass(*PassRegistry::getPassRegistry());
+    }
     bool doInitialization(Module &M);
     bool runOnFunction(Function &F);
 

Modified: llvm/trunk/lib/Transforms/Utils/LowerSwitch.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/LowerSwitch.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Utils/LowerSwitch.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/LowerSwitch.cpp Tue Oct 19 12:21:58 2010
@@ -33,7 +33,9 @@
   class LowerSwitch : public FunctionPass {
   public:
     static char ID; // Pass identification, replacement for typeid
-    LowerSwitch() : FunctionPass(ID) {} 
+    LowerSwitch() : FunctionPass(ID) {
+      initializeLowerSwitchPass(*PassRegistry::getPassRegistry());
+    } 
 
     virtual bool runOnFunction(Function &F);
     

Modified: llvm/trunk/lib/Transforms/Utils/Mem2Reg.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/Mem2Reg.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Utils/Mem2Reg.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/Mem2Reg.cpp Tue Oct 19 12:21:58 2010
@@ -27,7 +27,9 @@
 namespace {
   struct PromotePass : public FunctionPass {
     static char ID; // Pass identification, replacement for typeid
-    PromotePass() : FunctionPass(ID) {}
+    PromotePass() : FunctionPass(ID) {
+      initializePromotePassPass(*PassRegistry::getPassRegistry());
+    }
 
     // runOnFunction - To run this pass, first we calculate the alloca
     // instructions that are safe for promotion, then we promote each one.

Modified: llvm/trunk/lib/VMCore/Verifier.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Verifier.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/Verifier.cpp (original)
+++ llvm/trunk/lib/VMCore/Verifier.cpp Tue Oct 19 12:21:58 2010
@@ -72,7 +72,9 @@
   struct PreVerifier : public FunctionPass {
     static char ID; // Pass ID, replacement for typeid
 
-    PreVerifier() : FunctionPass(ID) { }
+    PreVerifier() : FunctionPass(ID) {
+      initializePreVerifierPass(*PassRegistry::getPassRegistry());
+    }
 
     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
       AU.setPreservesAll();
@@ -184,11 +186,15 @@
     Verifier()
       : FunctionPass(ID), 
       Broken(false), RealPass(true), action(AbortProcessAction),
-      Mod(0), Context(0), DT(0), MessagesStr(Messages) {}
+      Mod(0), Context(0), DT(0), MessagesStr(Messages) {
+        initializeVerifierPass(*PassRegistry::getPassRegistry());
+      }
     explicit Verifier(VerifierFailureAction ctn)
       : FunctionPass(ID), 
       Broken(false), RealPass(true), action(ctn), Mod(0), Context(0), DT(0),
-      MessagesStr(Messages) {}
+      MessagesStr(Messages) {
+        initializeVerifierPass(*PassRegistry::getPassRegistry());
+      }
 
     bool doInitialization(Module &M) {
       Mod = &M;

Modified: llvm/trunk/tools/bugpoint/bugpoint.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/bugpoint.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/tools/bugpoint/bugpoint.cpp (original)
+++ llvm/trunk/tools/bugpoint/bugpoint.cpp Tue Oct 19 12:21:58 2010
@@ -94,6 +94,19 @@
   llvm::sys::PrintStackTraceOnErrorSignal();
   llvm::PrettyStackTraceProgram X(argc, argv);
   llvm_shutdown_obj Y;  // Call llvm_shutdown() on exit.
+  
+  // Initialize passes
+  PassRegistry &Registry = *PassRegistry::getPassRegistry();
+  initializeCore(Registry);
+  initializeScalarOpts(Registry);
+  initializeIPO(Registry);
+  initializeAnalysis(Registry);
+  initializeIPA(Registry);
+  initializeTransformUtils(Registry);
+  initializeInstCombine(Registry);
+  initializeInstrumentation(Registry);
+  initializeTarget(Registry);
+  
   cl::ParseCommandLineOptions(argc, argv,
                               "LLVM automatic testcase reducer. See\nhttp://"
                               "llvm.org/cmds/bugpoint.html"

Modified: llvm/trunk/tools/llvm-ld/llvm-ld.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-ld/llvm-ld.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-ld/llvm-ld.cpp (original)
+++ llvm/trunk/tools/llvm-ld/llvm-ld.cpp Tue Oct 19 12:21:58 2010
@@ -514,6 +514,17 @@
   LLVMContext &Context = getGlobalContext();
   llvm_shutdown_obj Y;  // Call llvm_shutdown() on exit.
   
+  // Initialize passes
+  PassRegistry &Registry = *PassRegistry::getPassRegistry();
+  initializeCore(Registry);
+  initializeScalarOpts(Registry);
+  initializeIPO(Registry);
+  initializeAnalysis(Registry);
+  initializeIPA(Registry);
+  initializeTransformUtils(Registry);
+  initializeInstCombine(Registry);
+  initializeTarget(Registry);
+  
   // Initial global variable above for convenience printing of program name.
   progname = sys::Path(argv[0]).getBasename();
 

Modified: llvm/trunk/tools/opt/opt.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/opt/opt.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/tools/opt/opt.cpp (original)
+++ llvm/trunk/tools/opt/opt.cpp Tue Oct 19 12:21:58 2010
@@ -394,6 +394,18 @@
   llvm_shutdown_obj Y;  // Call llvm_shutdown() on exit.
   LLVMContext &Context = getGlobalContext();
   
+  // Initialize passes
+  PassRegistry &Registry = *PassRegistry::getPassRegistry();
+  initializeCore(Registry);
+  initializeScalarOpts(Registry);
+  initializeIPO(Registry);
+  initializeAnalysis(Registry);
+  initializeIPA(Registry);
+  initializeTransformUtils(Registry);
+  initializeInstCombine(Registry);
+  initializeInstrumentation(Registry);
+  initializeTarget(Registry);
+  
   cl::ParseCommandLineOptions(argc, argv,
     "llvm .bc -> .bc modular optimizer and analysis printer\n");
 

Modified: llvm/trunk/unittests/VMCore/PassManagerTest.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/VMCore/PassManagerTest.cpp?rev=116820&r1=116819&r2=116820&view=diff
==============================================================================
--- llvm/trunk/unittests/VMCore/PassManagerTest.cpp (original)
+++ llvm/trunk/unittests/VMCore/PassManagerTest.cpp Tue Oct 19 12:21:58 2010
@@ -32,7 +32,15 @@
 #include "llvm/Assembly/PrintModulePass.h"
 #include "gtest/gtest.h"
 
+using namespace llvm;
+
 namespace llvm {
+  void initializeModuleNDMPass(PassRegistry&);
+  void initializeFPassPass(PassRegistry&);
+  void initializeCGPassPass(PassRegistry&);
+  void initializeLPassPass(PassRegistry&);
+  void initializeBPassPass(PassRegistry&);
+  
   namespace {
     // ND = no deps
     // NM = no modifications
@@ -40,7 +48,7 @@
     public:
       static char run;
       static char ID;
-      ModuleNDNM() : ModulePass(ID) {}
+      ModuleNDNM() : ModulePass(ID) { }
       virtual bool runOnModule(Module &M) {
         run++;
         return false;
@@ -64,7 +72,6 @@
     };
     char ModuleNDM::ID=0;
     char ModuleNDM::run=0;
-    RegisterPass<ModuleNDM> X("mndm","mndm",false,false);
 
     struct ModuleNDM2 : public ModulePass {
     public:
@@ -83,7 +90,9 @@
     public:
       static char run;
       static char ID;
-      ModuleDNM() : ModulePass(ID) {}
+      ModuleDNM() : ModulePass(ID) {
+        initializeModuleNDMPass(*PassRegistry::getPassRegistry());
+      }
       virtual bool runOnModule(Module &M) {
         EXPECT_TRUE(getAnalysisIfAvailable<TargetData>());
         run++;
@@ -154,13 +163,15 @@
 
     struct CGPass : public PassTest<CallGraph, CallGraphSCCPass> {
     public:
+      CGPass() {
+        initializeCGPassPass(*PassRegistry::getPassRegistry());
+      }
       virtual bool runOnSCC(CallGraphSCC &SCMM) {
         EXPECT_TRUE(getAnalysisIfAvailable<TargetData>());
         run();
         return false;
       }
     };
-    RegisterPass<CGPass> X1("cgp","cgp");
 
     struct FPass : public PassTest<Module, FunctionPass> {
     public:
@@ -171,7 +182,6 @@
         return false;
       }
     };
-    RegisterPass<FPass> X2("fp","fp");
 
     struct LPass : public PassTestBase<LoopPass> {
     private:
@@ -179,6 +189,7 @@
       static int fincount;
     public:
       LPass() {
+        initializeLPassPass(*PassRegistry::getPassRegistry());
         initcount = 0; fincount=0;
         EXPECT_FALSE(initialized);
       }
@@ -205,7 +216,6 @@
     };
     int LPass::initcount=0;
     int LPass::fincount=0;
-    RegisterPass<LPass> X3("lp","lp");
 
     struct BPass : public PassTestBase<BasicBlockPass> {
     private:
@@ -248,12 +258,13 @@
     };
     int BPass::inited=0;
     int BPass::fin=0;
-    RegisterPass<BPass> X4("bp","bp");
 
     struct OnTheFlyTest: public ModulePass {
     public:
       static char ID;
-      OnTheFlyTest() : ModulePass(ID) {}
+      OnTheFlyTest() : ModulePass(ID) {
+        initializeFPassPass(*PassRegistry::getPassRegistry());
+      }
       virtual bool runOnModule(Module &M) {
         EXPECT_TRUE(getAnalysisIfAvailable<TargetData>());
         for (Module::iterator I=M.begin(),E=M.end(); I != E; ++I) {
@@ -525,3 +536,13 @@
 
   }
 }
+
+INITIALIZE_PASS(ModuleNDM, "mndm", "mndm", false, false)
+INITIALIZE_PASS_BEGIN(CGPass, "cgp","cgp", false, false)
+INITIALIZE_AG_DEPENDENCY(CallGraph)
+INITIALIZE_PASS_END(CGPass, "cgp","cgp", false, false)
+INITIALIZE_PASS(FPass, "fp","fp", false, false)
+INITIALIZE_PASS_BEGIN(LPass, "lp","lp", false, false)
+INITIALIZE_PASS_DEPENDENCY(LoopInfo)
+INITIALIZE_PASS_END(LPass, "lp","lp", false, false)
+INITIALIZE_PASS(BPass, "bp","bp", false, false)



From matthewbg at google.com  Mon Oct 18 17:51:11 2010
From: matthewbg at google.com (Matt Beaumont-Gay)
Date: Mon, 18 Oct 2010 15:51:11 -0700
Subject: [llvm-commits] [PATCH] Add trivial virtual dtor to MCObjectFormat
Message-ID: <AANLkTinYgtOyG4vbnBwShQuSEkZ-+_qrVmh=hZ4wg6=o@mail.gmail.com>

LLVM currently fails to build with g++ -Wall -Werror:
include/llvm/MC/MCObjectFormat.h:16: error: 'class
llvm::MCObjectFormat' has virtual functions and accessible non-virtual
destructor [-Wnon-virtual-dtor]

Attached patch fixes this.

-Matt
-------------- next part --------------
A non-text attachment was scrubbed...
Name: fix_mc_compile.patch
Type: text/x-patch
Size: 460 bytes
Desc: not available
Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101018/b00676bc/attachment.bin 

From espindola at google.com  Tue Oct 19 10:01:26 2010
From: espindola at google.com (Rafael Espindola)
Date: Tue, 19 Oct 2010 11:01:26 -0400
Subject: [llvm-commits] Proof of concept patch for unifying the .s/ELF
	emission of .ARM.attributes
In-Reply-To: <AANLkTimt3NyHcqEh38hn+FnUNL_O5Qv81OYjzE7d0Qf1@mail.gmail.com>
References: <AANLkTikSjtvxSNc0oxKEoG2LdGriz10OXOTAtC4caR_+@mail.gmail.com>
	<AANLkTikaS4qjUi+5q3YWt_GF5EdWKVNwxq7=-LyWRRpv@mail.gmail.com>
	<AANLkTinH7mZtZSQKDYMOE9C8-0baHwm31crmp30roWKy@mail.gmail.com>
	<AANLkTimhWm3dCbO003ipXkaDS3f0o948b9b2NquVSe29@mail.gmail.com>
	<AANLkTi=2B7Pk9HkkxYvQBvm-AfJsYCHW8uYxURq5iEcd@mail.gmail.com>
	<AANLkTi=iVAmVx08ww0EOu9DvJ82oxWD+02Es3btVSqK2@mail.gmail.com>
	<AANLkTin5KdNX6g+ZRYJS0nNy6=bu4o4gwa6v5-XNwkW9@mail.gmail.com>
	<AANLkTikAPuZKYLf4iisi=C4v2onfz5qCXQ-mo2s62UNq@mail.gmail.com>
	<6D9C9A6C-872A-494D-A5F6-2523DD4CA5B6@apple.com>
	<AANLkTi=4=8T0ww0csECny4t0RMSrJV=nUT77h+759-Ab@mail.gmail.com>
	<8FD08C3F-E6E1-448B-A384-7E5CF0763EC1@apple.com>
	<AANLkTikH8sEANQrDGVHg1uOtfCs2UzygkUPpm91E9kZc@mail.gmail.com>
	<AANLkTimoHYSw=viMcpZLirRqd789_xjWmT4+foao_T6f@mail.gmail.com>
	<8E5A9C6C-BA61-41F8-B445-336D9F96D774@apple.com>
	<AANLkTiksC9MbzDhYrzLs9Kt5YRGuHu2nv3Jri=-xRKb9@mail.gmail.com>
	<AANLkTi=73V-VRH_HGiPwcQjBNcFZMiU+jazHMH3YdJ-V@mail.gmail.com>
	<AANLkTikGWx7GH5VZUByposdJWhhvc+qR6X-1Ve_gNmKG@mail.gmail.com>
	<AANLkTik7AYHB1_Crv6Vcf4uMyx4U_x5mJaYK+-S3=ucU@mail.gmail.com>
	<AANLkTi=e_fCXZo_H1=_47tv5BABbpHkf8qJiyrMfRFj_@mail.gmail.com>
	<AANLkTi=MArF+PJK1iwc66wZNobOTjC6pi127Kt=A64bp@mail.gmail.com>
	<AANLkTimHKpEKfy2mr_UKco+Uscg_YBDtCmvXhT4AhAnp@mail.gmail.com>
	<AANLkTimt3NyHcqEh38hn+FnUNL_O5Qv81OYjzE7d0Qf1@mail.gmail.com>
Message-ID: <AANLkTin8ykW=j=arKX3wC-CX2adx0sTtUmYMJr7qYqJY@mail.gmail.com>

> Okay, I just committed the convert (all numbers from elf-dump are now
> hex) as r116753.

I noticed that was reverted. The first thing is to fix it and commit
again. Once it is in:

+
+    case ELF::SHT_ARM_EXIDX:
+    case ELF::SHT_ARM_PREEMPTMAP:
+      assert(0 && "FIXME: sh_type value not supported!");
+      break;
+
+    case ELF::SHT_ARM_ATTRIBUTES:
+      break;
+
+    case ELF::SHT_ARM_DEBUGOVERLAY:
+    case ELF::SHT_ARM_OVERLAYSECTION:
     default:
       assert(0 && "FIXME: sh_type value not supported!");
       break;

The two new cases are exactly like the default. Same for the last two
new one. Can you just use the default? Another option is to list every
enum value and remove the default so that we get a warning if one is
missing. Not sure if there are two many for this to be practical.

It still looks like you are creating more class members than you need
to. Take headFragment for example. It is only assigned in one place in
the code, emitARMAttributeSection. emitARMAttributeSection is only
called once in emitAttributes. emitARMAttributeSection can "return"
the headFragment and that can then be passed to fixupAttrSizes.

Cheers,
-- 
Rafael ?vila de Esp?ndola


From aggarwa4 at illinois.edu  Tue Oct 19 12:31:35 2010
From: aggarwa4 at illinois.edu (Arushi Aggarwal)
Date: Tue, 19 Oct 2010 17:31:35 -0000
Subject: [llvm-commits] [poolalloc] r116821 - in
 /poolalloc/trunk/test/dsa/callgraph: ./ inheritance1.ll inheritance2.ll
 inheritance3.ll
Message-ID: <20101019173135.3A0BD2A6C12C@llvm.org>

Author: aggarwa4
Date: Tue Oct 19 12:31:35 2010
New Revision: 116821

URL: http://llvm.org/viewvc/llvm-project?rev=116821&view=rev
Log:
New testcases for callgraph construction

Added:
    poolalloc/trunk/test/dsa/callgraph/
    poolalloc/trunk/test/dsa/callgraph/inheritance1.ll
    poolalloc/trunk/test/dsa/callgraph/inheritance2.ll
    poolalloc/trunk/test/dsa/callgraph/inheritance3.ll

Added: poolalloc/trunk/test/dsa/callgraph/inheritance1.ll
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/test/dsa/callgraph/inheritance1.ll?rev=116821&view=auto
==============================================================================
--- poolalloc/trunk/test/dsa/callgraph/inheritance1.ll (added)
+++ poolalloc/trunk/test/dsa/callgraph/inheritance1.ll Tue Oct 19 12:31:35 2010
@@ -0,0 +1,325 @@
+;RUN: dsaopt %s -dsa-cbu -analyze -check-callees=main,_ZN9BaseClass10myFunctionEv,_ZN13DerivedClass110myFunctionEv,_ZN13DerivedClass210myFunctionEv
+
+; ModuleID = 'inheritance1.bc'
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
+target triple = "x86_64-unknown-linux-gnu"
+
+%0 = type { i32, void ()* }
+%struct..0__pthread_mutex_s = type { i32, i32, i32, i32, i32, i32, %struct.__pthread_list_t }
+%struct.BaseClass = type { i32 (...)** }
+%struct.DerivedClass1 = type { %struct.BaseClass }
+%struct.DerivedClass2 = type { %struct.DerivedClass1 }
+%struct.__class_type_info_pseudo = type { %struct.__type_info_pseudo }
+%struct.__locale_struct = type { [13 x %struct.locale_data*], i16*, i32*, i32*, [13 x i8*] }
+%struct.__pthread_list_t = type { %struct.__pthread_list_t*, %struct.__pthread_list_t* }
+%struct.__si_class_type_info_pseudo = type { %struct.__type_info_pseudo, %"struct.std::type_info"* }
+%struct.__type_info_pseudo = type { i8*, i8* }
+%struct.locale_data = type opaque
+%"struct.std::basic_ios<char,std::char_traits<char> >" = type { %"struct.std::ios_base", %"struct.std::basic_ostream<char,std::char_traits<char> >"*, i8, i8, %"struct.std::basic_streambuf<char,std::char_traits<char> >"*, %"struct.std::ctype<char>"*, %"struct.std::num_get<char,std::istreambuf_iterator<char, std::char_traits<char> > >"*, %"struct.std::num_get<char,std::istreambuf_iterator<char, std::char_traits<char> > >"* }
+%"struct.std::basic_ostream<char,std::char_traits<char> >" = type { i32 (...)**, %"struct.std::basic_ios<char,std::char_traits<char> >" }
+%"struct.std::basic_streambuf<char,std::char_traits<char> >" = type { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, %"struct.std::locale" }
+%"struct.std::ctype<char>" = type { %"struct.std::locale::facet", %struct.__locale_struct*, i8, i32*, i32*, i16*, i8, [256 x i8], [256 x i8], i8 }
+%"struct.std::ios_base" = type { i32 (...)**, i64, i64, i32, i32, i32, %"struct.std::ios_base::_Callback_list"*, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, %"struct.std::ios_base::_Words"*, %"struct.std::locale" }
+%"struct.std::ios_base::Init" = type <{ i8 }>
+%"struct.std::ios_base::_Callback_list" = type { %"struct.std::ios_base::_Callback_list"*, void (i32, %"struct.std::ios_base"*, i32)*, i32, i32 }
+%"struct.std::ios_base::_Words" = type { i8*, i64 }
+%"struct.std::locale" = type { %"struct.std::locale::_Impl"* }
+%"struct.std::locale::_Impl" = type { i32, %"struct.std::locale::facet"**, i64, %"struct.std::locale::facet"**, i8** }
+%"struct.std::locale::facet" = type { i32 (...)**, i32 }
+%"struct.std::locale::facet.base.64" = type { i32 (...)**, i32 }
+%"struct.std::num_get<char,std::istreambuf_iterator<char, std::char_traits<char> > >" = type { %"struct.std::locale::facet" }
+%"struct.std::num_put<char,std::ostreambuf_iterator<char, std::char_traits<char> > >" = type { %"struct.std::locale::facet" }
+%"struct.std::type_info" = type { i32 (...)**, i8* }
+%union.pthread_attr_t = type { i64, [12 x i32] }
+%union.pthread_mutex_t = type { %struct..0__pthread_mutex_s }
+%union.pthread_mutexattr_t = type { i32 }
+
+ at _ZTV9BaseClass = internal constant [3 x i32 (...)*] [i32 (...)* null, i32 (...)* bitcast (%struct.__class_type_info_pseudo* @_ZTI9BaseClass to i32 (...)*), i32 (...)* bitcast (void (%struct.BaseClass*)* @_ZN9BaseClass10myFunctionEv to i32 (...)*)], align 16 ; <[3 x i32 (...)*]*> [#uses=1]
+ at _ZTI9BaseClass = internal constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i64 add (i64 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i64), i64 16) to i8*), i8* getelementptr inbounds ([11 x i8]* @_ZTS9BaseClass, i64 0, i64 0) } }, align 16 ; <%struct.__class_type_info_pseudo*> [#uses=2]
+ at _ZTVN10__cxxabiv117__class_type_infoE = external constant [0 x i32 (...)*] ; <[0 x i32 (...)*]*> [#uses=1]
+ at _ZTS9BaseClass = internal constant [11 x i8] c"9BaseClass\00" ; <[11 x i8]*> [#uses=1]
+ at _ZTV13DerivedClass1 = internal constant [3 x i32 (...)*] [i32 (...)* null, i32 (...)* bitcast (%struct.__si_class_type_info_pseudo* @_ZTI13DerivedClass1 to i32 (...)*), i32 (...)* bitcast (void (%struct.DerivedClass1*)* @_ZN13DerivedClass110myFunctionEv to i32 (...)*)], align 16 ; <[3 x i32 (...)*]*> [#uses=1]
+ at _ZTI13DerivedClass1 = internal constant %struct.__si_class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i64 add (i64 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv120__si_class_type_infoE to i64), i64 16) to i8*), i8* getelementptr inbounds ([16 x i8]* @_ZTS13DerivedClass1, i64 0, i64 0) }, %"struct.std::type_info"* bitcast (%struct.__class_type_info_pseudo* @_ZTI9BaseClass to %"struct.std::type_info"*) }, align 16 ; <%struct.__si_class_type_info_pseudo*> [#uses=2]
+ at _ZTVN10__cxxabiv120__si_class_type_infoE = external constant [0 x i32 (...)*] ; <[0 x i32 (...)*]*> [#uses=1]
+ at _ZTS13DerivedClass1 = internal constant [16 x i8] c"13DerivedClass1\00", align 16 ; <[16 x i8]*> [#uses=1]
+ at _ZTV13DerivedClass2 = internal constant [3 x i32 (...)*] [i32 (...)* null, i32 (...)* bitcast (%struct.__si_class_type_info_pseudo* @_ZTI13DerivedClass2 to i32 (...)*), i32 (...)* bitcast (void (%struct.DerivedClass2*)* @_ZN13DerivedClass210myFunctionEv to i32 (...)*)], align 16 ; <[3 x i32 (...)*]*> [#uses=1]
+ at _ZTI13DerivedClass2 = internal constant %struct.__si_class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i64 add (i64 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv120__si_class_type_infoE to i64), i64 16) to i8*), i8* getelementptr inbounds ([16 x i8]* @_ZTS13DerivedClass2, i64 0, i64 0) }, %"struct.std::type_info"* bitcast (%struct.__si_class_type_info_pseudo* @_ZTI13DerivedClass1 to %"struct.std::type_info"*) }, align 16 ; <%struct.__si_class_type_info_pseudo*> [#uses=1]
+ at _ZTS13DerivedClass2 = internal constant [16 x i8] c"13DerivedClass2\00", align 16 ; <[16 x i8]*> [#uses=1]
+ at _ZSt4cout = external global %"struct.std::basic_ostream<char,std::char_traits<char> >" ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=3]
+ at .str = private constant [41 x i8] c"Using BaseClass version of myFunction()\0A\00", align 8 ; <[41 x i8]*> [#uses=1]
+ at .str1 = private constant [47 x i8] c"Using DerivedClass1's version of myFunction()\0A\00", align 8 ; <[47 x i8]*> [#uses=1]
+ at .str2 = private constant [47 x i8] c"Using DerivedClass2's version of myFunction()\0A\00", align 8 ; <[47 x i8]*> [#uses=1]
+ at _ZStL8__ioinit = internal global %"struct.std::ios_base::Init" zeroinitializer ; <%"struct.std::ios_base::Init"*> [#uses=2]
+ at __dso_handle = external global i8*               ; <i8**> [#uses=1]
+ at llvm.global_ctors = appending global [1 x %0] [%0 { i32 65535, void ()* @_GLOBAL__I_main }] ; <[1 x %0]*> [#uses=0]
+
+ at _ZL20__gthrw_pthread_oncePiPFvvE = alias weak i32 (i32*, void ()*)* @pthread_once ; <i32 (i32*, void ()*)*> [#uses=0]
+ at _ZL27__gthrw_pthread_getspecificj = alias weak i8* (i32)* @pthread_getspecific ; <i8* (i32)*> [#uses=0]
+ at _ZL27__gthrw_pthread_setspecificjPKv = alias weak i32 (i32, i8*)* @pthread_setspecific ; <i32 (i32, i8*)*> [#uses=0]
+ at _ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_ = alias weak i32 (i64*, %union.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; <i32 (i64*, %union.pthread_attr_t*, i8* (i8*)*, i8*)*> [#uses=0]
+ at _ZL22__gthrw_pthread_cancelm = alias weak i32 (i64)* @pthread_cancel ; <i32 (i64)*> [#uses=0]
+ at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t = alias weak i32 (%union.pthread_mutex_t*)* @pthread_mutex_lock ; <i32 (%union.pthread_mutex_t*)*> [#uses=0]
+ at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t = alias weak i32 (%union.pthread_mutex_t*)* @pthread_mutex_trylock ; <i32 (%union.pthread_mutex_t*)*> [#uses=0]
+ at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t = alias weak i32 (%union.pthread_mutex_t*)* @pthread_mutex_unlock ; <i32 (%union.pthread_mutex_t*)*> [#uses=0]
+ at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t = alias weak i32 (%union.pthread_mutex_t*, %union.pthread_mutexattr_t*)* @pthread_mutex_init ; <i32 (%union.pthread_mutex_t*, %union.pthread_mutexattr_t*)*> [#uses=0]
+ at _ZL26__gthrw_pthread_key_createPjPFvPvE = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; <i32 (i32*, void (i8*)*)*> [#uses=0]
+ at _ZL26__gthrw_pthread_key_deletej = alias weak i32 (i32)* @pthread_key_delete ; <i32 (i32)*> [#uses=0]
+ at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t = alias weak i32 (%union.pthread_mutexattr_t*)* @pthread_mutexattr_init ; <i32 (%union.pthread_mutexattr_t*)*> [#uses=0]
+ at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti = alias weak i32 (%union.pthread_mutexattr_t*, i32)* @pthread_mutexattr_settype ; <i32 (%union.pthread_mutexattr_t*, i32)*> [#uses=0]
+ at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t = alias weak i32 (%union.pthread_mutexattr_t*)* @pthread_mutexattr_destroy ; <i32 (%union.pthread_mutexattr_t*)*> [#uses=0]
+
+define i32 @main() {
+entry:
+  %retval = alloca i32                            ; <i32*> [#uses=2]
+  %0 = alloca i32                                 ; <i32*> [#uses=2]
+  %p = alloca %struct.BaseClass*                  ; <%struct.BaseClass**> [#uses=9]
+  %ob = alloca %struct.BaseClass                  ; <%struct.BaseClass*> [#uses=2]
+  %derivedObject1 = alloca %struct.DerivedClass1  ; <%struct.DerivedClass1*> [#uses=2]
+  %derivedObject2 = alloca %struct.DerivedClass2  ; <%struct.DerivedClass2*> [#uses=2]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  call void @_ZN9BaseClassC1Ev(%struct.BaseClass* %ob) nounwind
+  call void @_ZN13DerivedClass1C1Ev(%struct.DerivedClass1* %derivedObject1) nounwind
+  call void @_ZN13DerivedClass2C1Ev(%struct.DerivedClass2* %derivedObject2) nounwind
+  store %struct.BaseClass* %ob, %struct.BaseClass** %p, align 8
+  %1 = load %struct.BaseClass** %p, align 8       ; <%struct.BaseClass*> [#uses=1]
+  %2 = getelementptr inbounds %struct.BaseClass* %1, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+  %3 = load i32 (...)*** %2, align 8              ; <i32 (...)**> [#uses=1]
+  %4 = getelementptr inbounds i32 (...)** %3, i64 0 ; <i32 (...)**> [#uses=1]
+  %5 = load i32 (...)** %4, align 1               ; <i32 (...)*> [#uses=1]
+  %6 = bitcast i32 (...)* %5 to void (%struct.BaseClass*)* ; <void (%struct.BaseClass*)*> [#uses=1]
+  %7 = load %struct.BaseClass** %p, align 8       ; <%struct.BaseClass*> [#uses=1]
+  call void %6(%struct.BaseClass* %7)
+  %8 = getelementptr inbounds %struct.DerivedClass1* %derivedObject1, i32 0, i32 0 ; <%struct.BaseClass*> [#uses=1]
+  store %struct.BaseClass* %8, %struct.BaseClass** %p, align 8
+  %9 = load %struct.BaseClass** %p, align 8       ; <%struct.BaseClass*> [#uses=1]
+  %10 = getelementptr inbounds %struct.BaseClass* %9, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+  %11 = load i32 (...)*** %10, align 8            ; <i32 (...)**> [#uses=1]
+  %12 = getelementptr inbounds i32 (...)** %11, i64 0 ; <i32 (...)**> [#uses=1]
+  %13 = load i32 (...)** %12, align 1             ; <i32 (...)*> [#uses=1]
+  %14 = bitcast i32 (...)* %13 to void (%struct.BaseClass*)* ; <void (%struct.BaseClass*)*> [#uses=1]
+  %15 = load %struct.BaseClass** %p, align 8      ; <%struct.BaseClass*> [#uses=1]
+  call void %14(%struct.BaseClass* %15)
+  %16 = getelementptr inbounds %struct.DerivedClass2* %derivedObject2, i32 0, i32 0 ; <%struct.DerivedClass1*> [#uses=1]
+  %17 = getelementptr inbounds %struct.DerivedClass1* %16, i32 0, i32 0 ; <%struct.BaseClass*> [#uses=1]
+  store %struct.BaseClass* %17, %struct.BaseClass** %p, align 8
+  %18 = load %struct.BaseClass** %p, align 8      ; <%struct.BaseClass*> [#uses=1]
+  %19 = getelementptr inbounds %struct.BaseClass* %18, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+  %20 = load i32 (...)*** %19, align 8            ; <i32 (...)**> [#uses=1]
+  %21 = getelementptr inbounds i32 (...)** %20, i64 0 ; <i32 (...)**> [#uses=1]
+  %22 = load i32 (...)** %21, align 1             ; <i32 (...)*> [#uses=1]
+  %23 = bitcast i32 (...)* %22 to void (%struct.BaseClass*)* ; <void (%struct.BaseClass*)*> [#uses=1]
+  %24 = load %struct.BaseClass** %p, align 8      ; <%struct.BaseClass*> [#uses=1]
+  call void %23(%struct.BaseClass* %24)
+  store i32 0, i32* %0, align 4
+  %25 = load i32* %0, align 4                     ; <i32> [#uses=1]
+  store i32 %25, i32* %retval, align 4
+  br label %return
+
+return:                                           ; preds = %entry
+  %retval1 = load i32* %retval                    ; <i32> [#uses=1]
+  ret i32 %retval1
+}
+
+define internal void @_GLOBAL__I_main() {
+entry:
+  call void @_Z41__static_initialization_and_destruction_0ii(i32 1, i32 65535)
+  br label %return
+
+return:                                           ; preds = %entry
+  ret void
+}
+
+define internal void @_ZN9BaseClassC2Ev(%struct.BaseClass* %this) nounwind align 2 {
+entry:
+  %this_addr = alloca %struct.BaseClass*          ; <%struct.BaseClass**> [#uses=2]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  store %struct.BaseClass* %this, %struct.BaseClass** %this_addr
+  %0 = load %struct.BaseClass** %this_addr, align 8 ; <%struct.BaseClass*> [#uses=1]
+  %1 = getelementptr inbounds %struct.BaseClass* %0, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+  store i32 (...)** getelementptr inbounds ([3 x i32 (...)*]* @_ZTV9BaseClass, i64 0, i64 2), i32 (...)*** %1, align 8
+  br label %return
+
+return:                                           ; preds = %entry
+  ret void
+}
+
+define internal void @_ZN9BaseClass10myFunctionEv(%struct.BaseClass* %this) align 2 {
+entry:
+  %this_addr = alloca %struct.BaseClass*          ; <%struct.BaseClass**> [#uses=1]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  store %struct.BaseClass* %this, %struct.BaseClass** %this_addr
+  %0 = call %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(%"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZSt4cout, i8* getelementptr inbounds ([41 x i8]* @.str, i64 0, i64 0)) ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=0]
+  br label %return
+
+return:                                           ; preds = %entry
+  ret void
+}
+
+define internal void @_ZN9BaseClassC1Ev(%struct.BaseClass* %this) nounwind align 2 {
+entry:
+  %this_addr = alloca %struct.BaseClass*          ; <%struct.BaseClass**> [#uses=2]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  store %struct.BaseClass* %this, %struct.BaseClass** %this_addr
+  %0 = load %struct.BaseClass** %this_addr, align 8 ; <%struct.BaseClass*> [#uses=1]
+  %1 = getelementptr inbounds %struct.BaseClass* %0, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+  store i32 (...)** getelementptr inbounds ([3 x i32 (...)*]* @_ZTV9BaseClass, i64 0, i64 2), i32 (...)*** %1, align 8
+  br label %return
+
+return:                                           ; preds = %entry
+  ret void
+}
+
+define internal void @_ZN13DerivedClass1C2Ev(%struct.DerivedClass1* %this) nounwind align 2 {
+entry:
+  %this_addr = alloca %struct.DerivedClass1*      ; <%struct.DerivedClass1**> [#uses=3]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  store %struct.DerivedClass1* %this, %struct.DerivedClass1** %this_addr
+  %0 = load %struct.DerivedClass1** %this_addr, align 8 ; <%struct.DerivedClass1*> [#uses=1]
+  %1 = getelementptr inbounds %struct.DerivedClass1* %0, i32 0, i32 0 ; <%struct.BaseClass*> [#uses=1]
+  call void @_ZN9BaseClassC2Ev(%struct.BaseClass* %1) nounwind
+  %2 = load %struct.DerivedClass1** %this_addr, align 8 ; <%struct.DerivedClass1*> [#uses=1]
+  %3 = getelementptr inbounds %struct.DerivedClass1* %2, i32 0, i32 0 ; <%struct.BaseClass*> [#uses=1]
+  %4 = getelementptr inbounds %struct.BaseClass* %3, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+  store i32 (...)** getelementptr inbounds ([3 x i32 (...)*]* @_ZTV13DerivedClass1, i64 0, i64 2), i32 (...)*** %4, align 8
+  br label %return
+
+return:                                           ; preds = %entry
+  ret void
+}
+
+define internal void @_ZN13DerivedClass110myFunctionEv(%struct.DerivedClass1* %this) align 2 {
+entry:
+  %this_addr = alloca %struct.DerivedClass1*      ; <%struct.DerivedClass1**> [#uses=1]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  store %struct.DerivedClass1* %this, %struct.DerivedClass1** %this_addr
+  %0 = call %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(%"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZSt4cout, i8* getelementptr inbounds ([47 x i8]* @.str1, i64 0, i64 0)) ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=0]
+  br label %return
+
+return:                                           ; preds = %entry
+  ret void
+}
+
+define internal void @_ZN13DerivedClass1C1Ev(%struct.DerivedClass1* %this) nounwind align 2 {
+entry:
+  %this_addr = alloca %struct.DerivedClass1*      ; <%struct.DerivedClass1**> [#uses=3]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  store %struct.DerivedClass1* %this, %struct.DerivedClass1** %this_addr
+  %0 = load %struct.DerivedClass1** %this_addr, align 8 ; <%struct.DerivedClass1*> [#uses=1]
+  %1 = getelementptr inbounds %struct.DerivedClass1* %0, i32 0, i32 0 ; <%struct.BaseClass*> [#uses=1]
+  call void @_ZN9BaseClassC2Ev(%struct.BaseClass* %1) nounwind
+  %2 = load %struct.DerivedClass1** %this_addr, align 8 ; <%struct.DerivedClass1*> [#uses=1]
+  %3 = getelementptr inbounds %struct.DerivedClass1* %2, i32 0, i32 0 ; <%struct.BaseClass*> [#uses=1]
+  %4 = getelementptr inbounds %struct.BaseClass* %3, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+  store i32 (...)** getelementptr inbounds ([3 x i32 (...)*]* @_ZTV13DerivedClass1, i64 0, i64 2), i32 (...)*** %4, align 8
+  br label %return
+
+return:                                           ; preds = %entry
+  ret void
+}
+
+define internal void @_ZN13DerivedClass2C1Ev(%struct.DerivedClass2* %this) nounwind align 2 {
+entry:
+  %this_addr = alloca %struct.DerivedClass2*      ; <%struct.DerivedClass2**> [#uses=3]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  store %struct.DerivedClass2* %this, %struct.DerivedClass2** %this_addr
+  %0 = load %struct.DerivedClass2** %this_addr, align 8 ; <%struct.DerivedClass2*> [#uses=1]
+  %1 = getelementptr inbounds %struct.DerivedClass2* %0, i32 0, i32 0 ; <%struct.DerivedClass1*> [#uses=1]
+  call void @_ZN13DerivedClass1C2Ev(%struct.DerivedClass1* %1) nounwind
+  %2 = load %struct.DerivedClass2** %this_addr, align 8 ; <%struct.DerivedClass2*> [#uses=1]
+  %3 = getelementptr inbounds %struct.DerivedClass2* %2, i32 0, i32 0 ; <%struct.DerivedClass1*> [#uses=1]
+  %4 = getelementptr inbounds %struct.DerivedClass1* %3, i32 0, i32 0 ; <%struct.BaseClass*> [#uses=1]
+  %5 = getelementptr inbounds %struct.BaseClass* %4, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+  store i32 (...)** getelementptr inbounds ([3 x i32 (...)*]* @_ZTV13DerivedClass2, i64 0, i64 2), i32 (...)*** %5, align 8
+  br label %return
+
+return:                                           ; preds = %entry
+  ret void
+}
+
+define internal void @_ZN13DerivedClass210myFunctionEv(%struct.DerivedClass2* %this) align 2 {
+entry:
+  %this_addr = alloca %struct.DerivedClass2*      ; <%struct.DerivedClass2**> [#uses=1]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  store %struct.DerivedClass2* %this, %struct.DerivedClass2** %this_addr
+  %0 = call %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(%"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZSt4cout, i8* getelementptr inbounds ([47 x i8]* @.str2, i64 0, i64 0)) ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=0]
+  br label %return
+
+return:                                           ; preds = %entry
+  ret void
+}
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, i8*)
+
+define internal void @_Z41__static_initialization_and_destruction_0ii(i32 %__initialize_p, i32 %__priority) {
+entry:
+  %__initialize_p_addr = alloca i32               ; <i32*> [#uses=2]
+  %__priority_addr = alloca i32                   ; <i32*> [#uses=2]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  store i32 %__initialize_p, i32* %__initialize_p_addr
+  store i32 %__priority, i32* %__priority_addr
+  %0 = load i32* %__initialize_p_addr, align 4    ; <i32> [#uses=1]
+  %1 = icmp eq i32 %0, 1                          ; <i1> [#uses=1]
+  br i1 %1, label %bb, label %bb2
+
+bb:                                               ; preds = %entry
+  %2 = load i32* %__priority_addr, align 4        ; <i32> [#uses=1]
+  %3 = icmp eq i32 %2, 65535                      ; <i1> [#uses=1]
+  br i1 %3, label %bb1, label %bb2
+
+bb1:                                              ; preds = %bb
+  call void @_ZNSt8ios_base4InitC1Ev(%"struct.std::ios_base::Init"* @_ZStL8__ioinit)
+  %4 = call i32 @__cxa_atexit(void (i8*)* @__tcf_0, i8* null, i8* bitcast (i8** @__dso_handle to i8*)) nounwind ; <i32> [#uses=0]
+  br label %bb2
+
+bb2:                                              ; preds = %bb1, %bb, %entry
+  br label %return
+
+return:                                           ; preds = %bb2
+  ret void
+}
+
+declare void @_ZNSt8ios_base4InitC1Ev(%"struct.std::ios_base::Init"*)
+
+declare i32 @__cxa_atexit(void (i8*)*, i8*, i8*) nounwind
+
+define internal void @__tcf_0(i8* %unnamed_arg) {
+entry:
+  %unnamed_arg_addr = alloca i8*                  ; <i8**> [#uses=1]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  store i8* %unnamed_arg, i8** %unnamed_arg_addr
+  call void @_ZNSt8ios_base4InitD1Ev(%"struct.std::ios_base::Init"* @_ZStL8__ioinit)
+  br label %return
+
+return:                                           ; preds = %entry
+  ret void
+}
+
+declare void @_ZNSt8ios_base4InitD1Ev(%"struct.std::ios_base::Init"*)
+
+declare extern_weak i32 @pthread_once(i32*, void ()*)
+
+declare extern_weak i8* @pthread_getspecific(i32)
+
+declare extern_weak i32 @pthread_setspecific(i32, i8*)
+
+declare extern_weak i32 @pthread_create(i64*, %union.pthread_attr_t*, i8* (i8*)*, i8*)
+
+declare extern_weak i32 @pthread_cancel(i64)
+
+declare extern_weak i32 @pthread_mutex_lock(%union.pthread_mutex_t*)
+
+declare extern_weak i32 @pthread_mutex_trylock(%union.pthread_mutex_t*)
+
+declare extern_weak i32 @pthread_mutex_unlock(%union.pthread_mutex_t*)
+
+declare extern_weak i32 @pthread_mutex_init(%union.pthread_mutex_t*, %union.pthread_mutexattr_t*)
+
+declare extern_weak i32 @pthread_key_create(i32*, void (i8*)*)
+
+declare extern_weak i32 @pthread_key_delete(i32)
+
+declare extern_weak i32 @pthread_mutexattr_init(%union.pthread_mutexattr_t*)
+
+declare extern_weak i32 @pthread_mutexattr_settype(%union.pthread_mutexattr_t*, i32)
+
+declare extern_weak i32 @pthread_mutexattr_destroy(%union.pthread_mutexattr_t*)

Added: poolalloc/trunk/test/dsa/callgraph/inheritance2.ll
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/test/dsa/callgraph/inheritance2.ll?rev=116821&view=auto
==============================================================================
--- poolalloc/trunk/test/dsa/callgraph/inheritance2.ll (added)
+++ poolalloc/trunk/test/dsa/callgraph/inheritance2.ll Tue Oct 19 12:31:35 2010
@@ -0,0 +1,371 @@
+;RUN: dsaopt %s -dsa-cbu -analyze -check-callees=main,_ZN9BaseClass10myFunctionEv,_ZN13DerivedClass110myFunctionEv,_ZN13DerivedClass210myFunctionEv,_Z4initi
+
+; ModuleID = 'inheritance2.bc'
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
+target triple = "x86_64-unknown-linux-gnu"
+
+%0 = type { i32, void ()* }
+%struct..0__pthread_mutex_s = type { i32, i32, i32, i32, i32, i32, %struct.__pthread_list_t }
+%struct.BaseClass = type { i32 (...)** }
+%struct.DerivedClass1 = type { %struct.BaseClass }
+%struct.DerivedClass2 = type { %struct.DerivedClass1 }
+%struct.__class_type_info_pseudo = type { %struct.__type_info_pseudo }
+%struct.__locale_struct = type { [13 x %struct.locale_data*], i16*, i32*, i32*, [13 x i8*] }
+%struct.__pthread_list_t = type { %struct.__pthread_list_t*, %struct.__pthread_list_t* }
+%struct.__si_class_type_info_pseudo = type { %struct.__type_info_pseudo, %"struct.std::type_info"* }
+%struct.__type_info_pseudo = type { i8*, i8* }
+%struct.locale_data = type opaque
+%"struct.std::basic_ios<char,std::char_traits<char> >" = type { %"struct.std::ios_base", %"struct.std::basic_ostream<char,std::char_traits<char> >"*, i8, i8, %"struct.std::basic_streambuf<char,std::char_traits<char> >"*, %"struct.std::ctype<char>"*, %"struct.std::num_get<char,std::istreambuf_iterator<char, std::char_traits<char> > >"*, %"struct.std::num_get<char,std::istreambuf_iterator<char, std::char_traits<char> > >"* }
+%"struct.std::basic_ostream<char,std::char_traits<char> >" = type { i32 (...)**, %"struct.std::basic_ios<char,std::char_traits<char> >" }
+%"struct.std::basic_streambuf<char,std::char_traits<char> >" = type { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, %"struct.std::locale" }
+%"struct.std::ctype<char>" = type { %"struct.std::locale::facet", %struct.__locale_struct*, i8, i32*, i32*, i16*, i8, [256 x i8], [256 x i8], i8 }
+%"struct.std::ios_base" = type { i32 (...)**, i64, i64, i32, i32, i32, %"struct.std::ios_base::_Callback_list"*, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, %"struct.std::ios_base::_Words"*, %"struct.std::locale" }
+%"struct.std::ios_base::Init" = type <{ i8 }>
+%"struct.std::ios_base::_Callback_list" = type { %"struct.std::ios_base::_Callback_list"*, void (i32, %"struct.std::ios_base"*, i32)*, i32, i32 }
+%"struct.std::ios_base::_Words" = type { i8*, i64 }
+%"struct.std::locale" = type { %"struct.std::locale::_Impl"* }
+%"struct.std::locale::_Impl" = type { i32, %"struct.std::locale::facet"**, i64, %"struct.std::locale::facet"**, i8** }
+%"struct.std::locale::facet" = type { i32 (...)**, i32 }
+%"struct.std::locale::facet.base.64" = type { i32 (...)**, i32 }
+%"struct.std::num_get<char,std::istreambuf_iterator<char, std::char_traits<char> > >" = type { %"struct.std::locale::facet" }
+%"struct.std::num_put<char,std::ostreambuf_iterator<char, std::char_traits<char> > >" = type { %"struct.std::locale::facet" }
+%"struct.std::type_info" = type { i32 (...)**, i8* }
+%union.pthread_attr_t = type { i64, [12 x i32] }
+%union.pthread_mutex_t = type { %struct..0__pthread_mutex_s }
+%union.pthread_mutexattr_t = type { i32 }
+
+ at ob = internal global %struct.BaseClass zeroinitializer ; <%struct.BaseClass*> [#uses=2]
+ at derivedObject1 = internal global %struct.DerivedClass1 zeroinitializer ; <%struct.DerivedClass1*> [#uses=2]
+ at derivedObject2 = internal global %struct.DerivedClass2 zeroinitializer ; <%struct.DerivedClass2*> [#uses=2]
+ at _ZSt4cout = external global %"struct.std::basic_ostream<char,std::char_traits<char> >" ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=3]
+ at .str = private constant [41 x i8] c"Using BaseClass version of myFunction()\0A\00", align 8 ; <[41 x i8]*> [#uses=1]
+ at .str1 = private constant [47 x i8] c"Using DerivedClass1's version of myFunction()\0A\00", align 8 ; <[47 x i8]*> [#uses=1]
+ at .str2 = private constant [47 x i8] c"Using DerivedClass2's version of myFunction()\0A\00", align 8 ; <[47 x i8]*> [#uses=1]
+ at _ZTV9BaseClass = internal constant [3 x i32 (...)*] [i32 (...)* null, i32 (...)* bitcast (%struct.__class_type_info_pseudo* @_ZTI9BaseClass to i32 (...)*), i32 (...)* bitcast (void (%struct.BaseClass*)* @_ZN9BaseClass10myFunctionEv to i32 (...)*)], align 16 ; <[3 x i32 (...)*]*> [#uses=1]
+ at _ZTI9BaseClass = internal constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i64 add (i64 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i64), i64 16) to i8*), i8* getelementptr inbounds ([11 x i8]* @_ZTS9BaseClass, i64 0, i64 0) } }, align 16 ; <%struct.__class_type_info_pseudo*> [#uses=2]
+ at _ZTVN10__cxxabiv117__class_type_infoE = external constant [0 x i32 (...)*] ; <[0 x i32 (...)*]*> [#uses=1]
+ at _ZTS9BaseClass = internal constant [11 x i8] c"9BaseClass\00" ; <[11 x i8]*> [#uses=1]
+ at _ZTV13DerivedClass1 = internal constant [3 x i32 (...)*] [i32 (...)* null, i32 (...)* bitcast (%struct.__si_class_type_info_pseudo* @_ZTI13DerivedClass1 to i32 (...)*), i32 (...)* bitcast (void (%struct.DerivedClass1*)* @_ZN13DerivedClass110myFunctionEv to i32 (...)*)], align 16 ; <[3 x i32 (...)*]*> [#uses=1]
+ at _ZTI13DerivedClass1 = internal constant %struct.__si_class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i64 add (i64 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv120__si_class_type_infoE to i64), i64 16) to i8*), i8* getelementptr inbounds ([16 x i8]* @_ZTS13DerivedClass1, i64 0, i64 0) }, %"struct.std::type_info"* bitcast (%struct.__class_type_info_pseudo* @_ZTI9BaseClass to %"struct.std::type_info"*) }, align 16 ; <%struct.__si_class_type_info_pseudo*> [#uses=2]
+ at _ZTVN10__cxxabiv120__si_class_type_infoE = external constant [0 x i32 (...)*] ; <[0 x i32 (...)*]*> [#uses=1]
+ at _ZTS13DerivedClass1 = internal constant [16 x i8] c"13DerivedClass1\00", align 16 ; <[16 x i8]*> [#uses=1]
+ at _ZTV13DerivedClass2 = internal constant [3 x i32 (...)*] [i32 (...)* null, i32 (...)* bitcast (%struct.__si_class_type_info_pseudo* @_ZTI13DerivedClass2 to i32 (...)*), i32 (...)* bitcast (void (%struct.DerivedClass2*)* @_ZN13DerivedClass210myFunctionEv to i32 (...)*)], align 16 ; <[3 x i32 (...)*]*> [#uses=1]
+ at _ZTI13DerivedClass2 = internal constant %struct.__si_class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i64 add (i64 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv120__si_class_type_infoE to i64), i64 16) to i8*), i8* getelementptr inbounds ([16 x i8]* @_ZTS13DerivedClass2, i64 0, i64 0) }, %"struct.std::type_info"* bitcast (%struct.__si_class_type_info_pseudo* @_ZTI13DerivedClass1 to %"struct.std::type_info"*) }, align 16 ; <%struct.__si_class_type_info_pseudo*> [#uses=1]
+ at _ZTS13DerivedClass2 = internal constant [16 x i8] c"13DerivedClass2\00", align 16 ; <[16 x i8]*> [#uses=1]
+ at _ZStL8__ioinit = internal global %"struct.std::ios_base::Init" zeroinitializer ; <%"struct.std::ios_base::Init"*> [#uses=2]
+ at __dso_handle = external global i8*               ; <i8**> [#uses=1]
+ at llvm.global_ctors = appending global [1 x %0] [%0 { i32 65535, void ()* @_GLOBAL__I_ob }] ; <[1 x %0]*> [#uses=0]
+
+ at _ZL20__gthrw_pthread_oncePiPFvvE = alias weak i32 (i32*, void ()*)* @pthread_once ; <i32 (i32*, void ()*)*> [#uses=0]
+ at _ZL27__gthrw_pthread_getspecificj = alias weak i8* (i32)* @pthread_getspecific ; <i8* (i32)*> [#uses=0]
+ at _ZL27__gthrw_pthread_setspecificjPKv = alias weak i32 (i32, i8*)* @pthread_setspecific ; <i32 (i32, i8*)*> [#uses=0]
+ at _ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_ = alias weak i32 (i64*, %union.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; <i32 (i64*, %union.pthread_attr_t*, i8* (i8*)*, i8*)*> [#uses=0]
+ at _ZL22__gthrw_pthread_cancelm = alias weak i32 (i64)* @pthread_cancel ; <i32 (i64)*> [#uses=0]
+ at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t = alias weak i32 (%union.pthread_mutex_t*)* @pthread_mutex_lock ; <i32 (%union.pthread_mutex_t*)*> [#uses=0]
+ at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t = alias weak i32 (%union.pthread_mutex_t*)* @pthread_mutex_trylock ; <i32 (%union.pthread_mutex_t*)*> [#uses=0]
+ at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t = alias weak i32 (%union.pthread_mutex_t*)* @pthread_mutex_unlock ; <i32 (%union.pthread_mutex_t*)*> [#uses=0]
+ at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t = alias weak i32 (%union.pthread_mutex_t*, %union.pthread_mutexattr_t*)* @pthread_mutex_init ; <i32 (%union.pthread_mutex_t*, %union.pthread_mutexattr_t*)*> [#uses=0]
+ at _ZL26__gthrw_pthread_key_createPjPFvPvE = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; <i32 (i32*, void (i8*)*)*> [#uses=0]
+ at _ZL26__gthrw_pthread_key_deletej = alias weak i32 (i32)* @pthread_key_delete ; <i32 (i32)*> [#uses=0]
+ at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t = alias weak i32 (%union.pthread_mutexattr_t*)* @pthread_mutexattr_init ; <i32 (%union.pthread_mutexattr_t*)*> [#uses=0]
+ at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti = alias weak i32 (%union.pthread_mutexattr_t*, i32)* @pthread_mutexattr_settype ; <i32 (%union.pthread_mutexattr_t*, i32)*> [#uses=0]
+ at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t = alias weak i32 (%union.pthread_mutexattr_t*)* @pthread_mutexattr_destroy ; <i32 (%union.pthread_mutexattr_t*)*> [#uses=0]
+
+define internal void @_GLOBAL__I_ob() {
+entry:
+  call void @_Z41__static_initialization_and_destruction_0ii(i32 1, i32 65535)
+  br label %return
+
+return:                                           ; preds = %entry
+  ret void
+}
+
+define internal %struct.BaseClass* @_Z4initi(i32 %i) nounwind {
+entry:
+  %i_addr = alloca i32                            ; <i32*> [#uses=4]
+  %retval = alloca %struct.BaseClass*             ; <%struct.BaseClass**> [#uses=2]
+  %0 = alloca %struct.BaseClass*                  ; <%struct.BaseClass**> [#uses=4]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  store i32 %i, i32* %i_addr
+  %1 = load i32* %i_addr, align 4                 ; <i32> [#uses=1]
+  %2 = icmp eq i32 %1, 1                          ; <i1> [#uses=1]
+  br i1 %2, label %bb, label %bb1
+
+bb:                                               ; preds = %entry
+  store %struct.BaseClass* @ob, %struct.BaseClass** %0, align 8
+  br label %bb6
+
+bb1:                                              ; preds = %entry
+  %3 = load i32* %i_addr, align 4                 ; <i32> [#uses=1]
+  %4 = icmp eq i32 %3, 2                          ; <i1> [#uses=1]
+  br i1 %4, label %bb2, label %bb3
+
+bb2:                                              ; preds = %bb1
+  store %struct.BaseClass* getelementptr inbounds (%struct.DerivedClass1* @derivedObject1, i64 0, i32 0), %struct.BaseClass** %0, align 8
+  br label %bb6
+
+bb3:                                              ; preds = %bb1
+  %5 = load i32* %i_addr, align 4                 ; <i32> [#uses=1]
+  %6 = icmp eq i32 %5, 3                          ; <i1> [#uses=1]
+  br i1 %6, label %bb4, label %bb5
+
+bb4:                                              ; preds = %bb3
+  store %struct.BaseClass* getelementptr inbounds (%struct.DerivedClass2* @derivedObject2, i64 0, i32 0, i32 0), %struct.BaseClass** %0, align 8
+  br label %bb6
+
+bb5:                                              ; preds = %bb3
+  br label %return
+
+bb6:                                              ; preds = %bb4, %bb2, %bb
+  %7 = load %struct.BaseClass** %0, align 8       ; <%struct.BaseClass*> [#uses=1]
+  store %struct.BaseClass* %7, %struct.BaseClass** %retval, align 8
+  br label %return
+
+return:                                           ; preds = %bb6, %bb5
+  %retval7 = load %struct.BaseClass** %retval     ; <%struct.BaseClass*> [#uses=1]
+  ret %struct.BaseClass* %retval7
+}
+
+define i32 @main() {
+entry:
+  %retval = alloca i32                            ; <i32*> [#uses=2]
+  %0 = alloca i32                                 ; <i32*> [#uses=2]
+  %p = alloca %struct.BaseClass*                  ; <%struct.BaseClass**> [#uses=9]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  %1 = call %struct.BaseClass* @_Z4initi(i32 2) nounwind ; <%struct.BaseClass*> [#uses=1]
+  store %struct.BaseClass* %1, %struct.BaseClass** %p, align 8
+  %2 = load %struct.BaseClass** %p, align 8       ; <%struct.BaseClass*> [#uses=1]
+  %3 = getelementptr inbounds %struct.BaseClass* %2, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+  %4 = load i32 (...)*** %3, align 8              ; <i32 (...)**> [#uses=1]
+  %5 = getelementptr inbounds i32 (...)** %4, i64 0 ; <i32 (...)**> [#uses=1]
+  %6 = load i32 (...)** %5, align 1               ; <i32 (...)*> [#uses=1]
+  %7 = bitcast i32 (...)* %6 to void (%struct.BaseClass*)* ; <void (%struct.BaseClass*)*> [#uses=1]
+  %8 = load %struct.BaseClass** %p, align 8       ; <%struct.BaseClass*> [#uses=1]
+  call void %7(%struct.BaseClass* %8)
+  %9 = call %struct.BaseClass* @_Z4initi(i32 3) nounwind ; <%struct.BaseClass*> [#uses=1]
+  store %struct.BaseClass* %9, %struct.BaseClass** %p, align 8
+  %10 = load %struct.BaseClass** %p, align 8      ; <%struct.BaseClass*> [#uses=1]
+  %11 = getelementptr inbounds %struct.BaseClass* %10, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+  %12 = load i32 (...)*** %11, align 8            ; <i32 (...)**> [#uses=1]
+  %13 = getelementptr inbounds i32 (...)** %12, i64 0 ; <i32 (...)**> [#uses=1]
+  %14 = load i32 (...)** %13, align 1             ; <i32 (...)*> [#uses=1]
+  %15 = bitcast i32 (...)* %14 to void (%struct.BaseClass*)* ; <void (%struct.BaseClass*)*> [#uses=1]
+  %16 = load %struct.BaseClass** %p, align 8      ; <%struct.BaseClass*> [#uses=1]
+  call void %15(%struct.BaseClass* %16)
+  %17 = call %struct.BaseClass* @_Z4initi(i32 4) nounwind ; <%struct.BaseClass*> [#uses=1]
+  store %struct.BaseClass* %17, %struct.BaseClass** %p, align 8
+  %18 = load %struct.BaseClass** %p, align 8      ; <%struct.BaseClass*> [#uses=1]
+  %19 = getelementptr inbounds %struct.BaseClass* %18, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+  %20 = load i32 (...)*** %19, align 8            ; <i32 (...)**> [#uses=1]
+  %21 = getelementptr inbounds i32 (...)** %20, i64 0 ; <i32 (...)**> [#uses=1]
+  %22 = load i32 (...)** %21, align 1             ; <i32 (...)*> [#uses=1]
+  %23 = bitcast i32 (...)* %22 to void (%struct.BaseClass*)* ; <void (%struct.BaseClass*)*> [#uses=1]
+  %24 = load %struct.BaseClass** %p, align 8      ; <%struct.BaseClass*> [#uses=1]
+  call void %23(%struct.BaseClass* %24)
+  store i32 0, i32* %0, align 4
+  %25 = load i32* %0, align 4                     ; <i32> [#uses=1]
+  store i32 %25, i32* %retval, align 4
+  br label %return
+
+return:                                           ; preds = %entry
+  %retval1 = load i32* %retval                    ; <i32> [#uses=1]
+  ret i32 %retval1
+}
+
+define internal void @_ZN9BaseClass10myFunctionEv(%struct.BaseClass* %this) align 2 {
+entry:
+  %this_addr = alloca %struct.BaseClass*          ; <%struct.BaseClass**> [#uses=1]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  store %struct.BaseClass* %this, %struct.BaseClass** %this_addr
+  %0 = call %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(%"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZSt4cout, i8* getelementptr inbounds ([41 x i8]* @.str, i64 0, i64 0)) ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=0]
+  br label %return
+
+return:                                           ; preds = %entry
+  ret void
+}
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, i8*)
+
+define internal void @_ZN13DerivedClass110myFunctionEv(%struct.DerivedClass1* %this) align 2 {
+entry:
+  %this_addr = alloca %struct.DerivedClass1*      ; <%struct.DerivedClass1**> [#uses=1]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  store %struct.DerivedClass1* %this, %struct.DerivedClass1** %this_addr
+  %0 = call %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(%"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZSt4cout, i8* getelementptr inbounds ([47 x i8]* @.str1, i64 0, i64 0)) ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=0]
+  br label %return
+
+return:                                           ; preds = %entry
+  ret void
+}
+
+define internal void @_ZN13DerivedClass210myFunctionEv(%struct.DerivedClass2* %this) align 2 {
+entry:
+  %this_addr = alloca %struct.DerivedClass2*      ; <%struct.DerivedClass2**> [#uses=1]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  store %struct.DerivedClass2* %this, %struct.DerivedClass2** %this_addr
+  %0 = call %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(%"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZSt4cout, i8* getelementptr inbounds ([47 x i8]* @.str2, i64 0, i64 0)) ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=0]
+  br label %return
+
+return:                                           ; preds = %entry
+  ret void
+}
+
+define internal void @_ZN9BaseClassC2Ev(%struct.BaseClass* %this) nounwind align 2 {
+entry:
+  %this_addr = alloca %struct.BaseClass*          ; <%struct.BaseClass**> [#uses=2]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  store %struct.BaseClass* %this, %struct.BaseClass** %this_addr
+  %0 = load %struct.BaseClass** %this_addr, align 8 ; <%struct.BaseClass*> [#uses=1]
+  %1 = getelementptr inbounds %struct.BaseClass* %0, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+  store i32 (...)** getelementptr inbounds ([3 x i32 (...)*]* @_ZTV9BaseClass, i64 0, i64 2), i32 (...)*** %1, align 8
+  br label %return
+
+return:                                           ; preds = %entry
+  ret void
+}
+
+define internal void @_ZN9BaseClassC1Ev(%struct.BaseClass* %this) nounwind align 2 {
+entry:
+  %this_addr = alloca %struct.BaseClass*          ; <%struct.BaseClass**> [#uses=2]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  store %struct.BaseClass* %this, %struct.BaseClass** %this_addr
+  %0 = load %struct.BaseClass** %this_addr, align 8 ; <%struct.BaseClass*> [#uses=1]
+  %1 = getelementptr inbounds %struct.BaseClass* %0, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+  store i32 (...)** getelementptr inbounds ([3 x i32 (...)*]* @_ZTV9BaseClass, i64 0, i64 2), i32 (...)*** %1, align 8
+  br label %return
+
+return:                                           ; preds = %entry
+  ret void
+}
+
+define internal void @_ZN13DerivedClass1C2Ev(%struct.DerivedClass1* %this) nounwind align 2 {
+entry:
+  %this_addr = alloca %struct.DerivedClass1*      ; <%struct.DerivedClass1**> [#uses=3]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  store %struct.DerivedClass1* %this, %struct.DerivedClass1** %this_addr
+  %0 = load %struct.DerivedClass1** %this_addr, align 8 ; <%struct.DerivedClass1*> [#uses=1]
+  %1 = getelementptr inbounds %struct.DerivedClass1* %0, i32 0, i32 0 ; <%struct.BaseClass*> [#uses=1]
+  call void @_ZN9BaseClassC2Ev(%struct.BaseClass* %1) nounwind
+  %2 = load %struct.DerivedClass1** %this_addr, align 8 ; <%struct.DerivedClass1*> [#uses=1]
+  %3 = getelementptr inbounds %struct.DerivedClass1* %2, i32 0, i32 0 ; <%struct.BaseClass*> [#uses=1]
+  %4 = getelementptr inbounds %struct.BaseClass* %3, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+  store i32 (...)** getelementptr inbounds ([3 x i32 (...)*]* @_ZTV13DerivedClass1, i64 0, i64 2), i32 (...)*** %4, align 8
+  br label %return
+
+return:                                           ; preds = %entry
+  ret void
+}
+
+define internal void @_ZN13DerivedClass1C1Ev(%struct.DerivedClass1* %this) nounwind align 2 {
+entry:
+  %this_addr = alloca %struct.DerivedClass1*      ; <%struct.DerivedClass1**> [#uses=3]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  store %struct.DerivedClass1* %this, %struct.DerivedClass1** %this_addr
+  %0 = load %struct.DerivedClass1** %this_addr, align 8 ; <%struct.DerivedClass1*> [#uses=1]
+  %1 = getelementptr inbounds %struct.DerivedClass1* %0, i32 0, i32 0 ; <%struct.BaseClass*> [#uses=1]
+  call void @_ZN9BaseClassC2Ev(%struct.BaseClass* %1) nounwind
+  %2 = load %struct.DerivedClass1** %this_addr, align 8 ; <%struct.DerivedClass1*> [#uses=1]
+  %3 = getelementptr inbounds %struct.DerivedClass1* %2, i32 0, i32 0 ; <%struct.BaseClass*> [#uses=1]
+  %4 = getelementptr inbounds %struct.BaseClass* %3, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+  store i32 (...)** getelementptr inbounds ([3 x i32 (...)*]* @_ZTV13DerivedClass1, i64 0, i64 2), i32 (...)*** %4, align 8
+  br label %return
+
+return:                                           ; preds = %entry
+  ret void
+}
+
+define internal void @_ZN13DerivedClass2C1Ev(%struct.DerivedClass2* %this) nounwind align 2 {
+entry:
+  %this_addr = alloca %struct.DerivedClass2*      ; <%struct.DerivedClass2**> [#uses=3]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  store %struct.DerivedClass2* %this, %struct.DerivedClass2** %this_addr
+  %0 = load %struct.DerivedClass2** %this_addr, align 8 ; <%struct.DerivedClass2*> [#uses=1]
+  %1 = getelementptr inbounds %struct.DerivedClass2* %0, i32 0, i32 0 ; <%struct.DerivedClass1*> [#uses=1]
+  call void @_ZN13DerivedClass1C2Ev(%struct.DerivedClass1* %1) nounwind
+  %2 = load %struct.DerivedClass2** %this_addr, align 8 ; <%struct.DerivedClass2*> [#uses=1]
+  %3 = getelementptr inbounds %struct.DerivedClass2* %2, i32 0, i32 0 ; <%struct.DerivedClass1*> [#uses=1]
+  %4 = getelementptr inbounds %struct.DerivedClass1* %3, i32 0, i32 0 ; <%struct.BaseClass*> [#uses=1]
+  %5 = getelementptr inbounds %struct.BaseClass* %4, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+  store i32 (...)** getelementptr inbounds ([3 x i32 (...)*]* @_ZTV13DerivedClass2, i64 0, i64 2), i32 (...)*** %5, align 8
+  br label %return
+
+return:                                           ; preds = %entry
+  ret void
+}
+
+define internal void @_Z41__static_initialization_and_destruction_0ii(i32 %__initialize_p, i32 %__priority) {
+entry:
+  %__initialize_p_addr = alloca i32               ; <i32*> [#uses=2]
+  %__priority_addr = alloca i32                   ; <i32*> [#uses=2]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  store i32 %__initialize_p, i32* %__initialize_p_addr
+  store i32 %__priority, i32* %__priority_addr
+  %0 = load i32* %__initialize_p_addr, align 4    ; <i32> [#uses=1]
+  %1 = icmp eq i32 %0, 1                          ; <i1> [#uses=1]
+  br i1 %1, label %bb, label %bb2
+
+bb:                                               ; preds = %entry
+  %2 = load i32* %__priority_addr, align 4        ; <i32> [#uses=1]
+  %3 = icmp eq i32 %2, 65535                      ; <i1> [#uses=1]
+  br i1 %3, label %bb1, label %bb2
+
+bb1:                                              ; preds = %bb
+  call void @_ZNSt8ios_base4InitC1Ev(%"struct.std::ios_base::Init"* @_ZStL8__ioinit)
+  %4 = call i32 @__cxa_atexit(void (i8*)* @__tcf_0, i8* null, i8* bitcast (i8** @__dso_handle to i8*)) nounwind ; <i32> [#uses=0]
+  call void @_ZN9BaseClassC1Ev(%struct.BaseClass* @ob) nounwind
+  call void @_ZN13DerivedClass1C1Ev(%struct.DerivedClass1* @derivedObject1) nounwind
+  call void @_ZN13DerivedClass2C1Ev(%struct.DerivedClass2* @derivedObject2) nounwind
+  br label %bb2
+
+bb2:                                              ; preds = %bb1, %bb, %entry
+  br label %return
+
+return:                                           ; preds = %bb2
+  ret void
+}
+
+declare void @_ZNSt8ios_base4InitC1Ev(%"struct.std::ios_base::Init"*)
+
+declare i32 @__cxa_atexit(void (i8*)*, i8*, i8*) nounwind
+
+define internal void @__tcf_0(i8* %unnamed_arg) {
+entry:
+  %unnamed_arg_addr = alloca i8*                  ; <i8**> [#uses=1]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  store i8* %unnamed_arg, i8** %unnamed_arg_addr
+  call void @_ZNSt8ios_base4InitD1Ev(%"struct.std::ios_base::Init"* @_ZStL8__ioinit)
+  br label %return
+
+return:                                           ; preds = %entry
+  ret void
+}
+
+declare void @_ZNSt8ios_base4InitD1Ev(%"struct.std::ios_base::Init"*)
+
+declare extern_weak i32 @pthread_once(i32*, void ()*)
+
+declare extern_weak i8* @pthread_getspecific(i32)
+
+declare extern_weak i32 @pthread_setspecific(i32, i8*)
+
+declare extern_weak i32 @pthread_create(i64*, %union.pthread_attr_t*, i8* (i8*)*, i8*)
+
+declare extern_weak i32 @pthread_cancel(i64)
+
+declare extern_weak i32 @pthread_mutex_lock(%union.pthread_mutex_t*)
+
+declare extern_weak i32 @pthread_mutex_trylock(%union.pthread_mutex_t*)
+
+declare extern_weak i32 @pthread_mutex_unlock(%union.pthread_mutex_t*)
+
+declare extern_weak i32 @pthread_mutex_init(%union.pthread_mutex_t*, %union.pthread_mutexattr_t*)
+
+declare extern_weak i32 @pthread_key_create(i32*, void (i8*)*)
+
+declare extern_weak i32 @pthread_key_delete(i32)
+
+declare extern_weak i32 @pthread_mutexattr_init(%union.pthread_mutexattr_t*)
+
+declare extern_weak i32 @pthread_mutexattr_settype(%union.pthread_mutexattr_t*, i32)
+
+declare extern_weak i32 @pthread_mutexattr_destroy(%union.pthread_mutexattr_t*)

Added: poolalloc/trunk/test/dsa/callgraph/inheritance3.ll
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/test/dsa/callgraph/inheritance3.ll?rev=116821&view=auto
==============================================================================
--- poolalloc/trunk/test/dsa/callgraph/inheritance3.ll (added)
+++ poolalloc/trunk/test/dsa/callgraph/inheritance3.ll Tue Oct 19 12:31:35 2010
@@ -0,0 +1,328 @@
+;RUN: dsaopt %s -dsa-cbu -analyze -check-callees=main,_ZN9BaseClass10myFunctionEv,_ZN13DerivedClass110myFunctionEv,_Z4initi
+;RUN: dsaopt %s -dsa-cbu -analyze -check-callees=_Z4funcv,_ZN9BaseClass10myFunctionEv,_ZN13DerivedClass110myFunctionEv,_Z4initi
+
+; ModuleID = 'inheritance3.bc'
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
+target triple = "x86_64-unknown-linux-gnu"
+
+%0 = type { i32, void ()* }
+%struct..0__pthread_mutex_s = type { i32, i32, i32, i32, i32, i32, %struct.__pthread_list_t }
+%struct.BaseClass = type { i32 (...)** }
+%struct.DerivedClass1 = type { %struct.BaseClass }
+%struct.__class_type_info_pseudo = type { %struct.__type_info_pseudo }
+%struct.__locale_struct = type { [13 x %struct.locale_data*], i16*, i32*, i32*, [13 x i8*] }
+%struct.__pthread_list_t = type { %struct.__pthread_list_t*, %struct.__pthread_list_t* }
+%struct.__si_class_type_info_pseudo = type { %struct.__type_info_pseudo, %"struct.std::type_info"* }
+%struct.__type_info_pseudo = type { i8*, i8* }
+%struct.locale_data = type opaque
+%"struct.std::basic_ios<char,std::char_traits<char> >" = type { %"struct.std::ios_base", %"struct.std::basic_ostream<char,std::char_traits<char> >"*, i8, i8, %"struct.std::basic_streambuf<char,std::char_traits<char> >"*, %"struct.std::ctype<char>"*, %"struct.std::num_get<char,std::istreambuf_iterator<char, std::char_traits<char> > >"*, %"struct.std::num_get<char,std::istreambuf_iterator<char, std::char_traits<char> > >"* }
+%"struct.std::basic_ostream<char,std::char_traits<char> >" = type { i32 (...)**, %"struct.std::basic_ios<char,std::char_traits<char> >" }
+%"struct.std::basic_streambuf<char,std::char_traits<char> >" = type { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, %"struct.std::locale" }
+%"struct.std::ctype<char>" = type { %"struct.std::locale::facet", %struct.__locale_struct*, i8, i32*, i32*, i16*, i8, [256 x i8], [256 x i8], i8 }
+%"struct.std::ios_base" = type { i32 (...)**, i64, i64, i32, i32, i32, %"struct.std::ios_base::_Callback_list"*, %"struct.std::ios_base::_Words", [8 x %"struct.std::ios_base::_Words"], i32, %"struct.std::ios_base::_Words"*, %"struct.std::locale" }
+%"struct.std::ios_base::Init" = type <{ i8 }>
+%"struct.std::ios_base::_Callback_list" = type { %"struct.std::ios_base::_Callback_list"*, void (i32, %"struct.std::ios_base"*, i32)*, i32, i32 }
+%"struct.std::ios_base::_Words" = type { i8*, i64 }
+%"struct.std::locale" = type { %"struct.std::locale::_Impl"* }
+%"struct.std::locale::_Impl" = type { i32, %"struct.std::locale::facet"**, i64, %"struct.std::locale::facet"**, i8** }
+%"struct.std::locale::facet" = type { i32 (...)**, i32 }
+%"struct.std::locale::facet.base.64" = type { i32 (...)**, i32 }
+%"struct.std::num_get<char,std::istreambuf_iterator<char, std::char_traits<char> > >" = type { %"struct.std::locale::facet" }
+%"struct.std::num_put<char,std::ostreambuf_iterator<char, std::char_traits<char> > >" = type { %"struct.std::locale::facet" }
+%"struct.std::type_info" = type { i32 (...)**, i8* }
+%union.pthread_attr_t = type { i64, [12 x i32] }
+%union.pthread_mutex_t = type { %struct..0__pthread_mutex_s }
+%union.pthread_mutexattr_t = type { i32 }
+
+ at ob = internal global %struct.BaseClass zeroinitializer ; <%struct.BaseClass*> [#uses=2]
+ at derivedObject1 = internal global %struct.DerivedClass1 zeroinitializer ; <%struct.DerivedClass1*> [#uses=2]
+ at _ZSt4cout = external global %"struct.std::basic_ostream<char,std::char_traits<char> >" ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=2]
+ at .str = private constant [41 x i8] c"Using BaseClass version of myFunction()\0A\00", align 8 ; <[41 x i8]*> [#uses=1]
+ at .str1 = private constant [47 x i8] c"Using DerivedClass1's version of myFunction()\0A\00", align 8 ; <[47 x i8]*> [#uses=1]
+ at _ZTV9BaseClass = internal constant [3 x i32 (...)*] [i32 (...)* null, i32 (...)* bitcast (%struct.__class_type_info_pseudo* @_ZTI9BaseClass to i32 (...)*), i32 (...)* bitcast (void (%struct.BaseClass*)* @_ZN9BaseClass10myFunctionEv to i32 (...)*)], align 16 ; <[3 x i32 (...)*]*> [#uses=1]
+ at _ZTI9BaseClass = internal constant %struct.__class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i64 add (i64 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv117__class_type_infoE to i64), i64 16) to i8*), i8* getelementptr inbounds ([11 x i8]* @_ZTS9BaseClass, i64 0, i64 0) } }, align 16 ; <%struct.__class_type_info_pseudo*> [#uses=2]
+ at _ZTVN10__cxxabiv117__class_type_infoE = external constant [0 x i32 (...)*] ; <[0 x i32 (...)*]*> [#uses=1]
+ at _ZTS9BaseClass = internal constant [11 x i8] c"9BaseClass\00" ; <[11 x i8]*> [#uses=1]
+ at _ZTV13DerivedClass1 = internal constant [3 x i32 (...)*] [i32 (...)* null, i32 (...)* bitcast (%struct.__si_class_type_info_pseudo* @_ZTI13DerivedClass1 to i32 (...)*), i32 (...)* bitcast (void (%struct.DerivedClass1*)* @_ZN13DerivedClass110myFunctionEv to i32 (...)*)], align 16 ; <[3 x i32 (...)*]*> [#uses=1]
+ at _ZTI13DerivedClass1 = internal constant %struct.__si_class_type_info_pseudo { %struct.__type_info_pseudo { i8* inttoptr (i64 add (i64 ptrtoint ([0 x i32 (...)*]* @_ZTVN10__cxxabiv120__si_class_type_infoE to i64), i64 16) to i8*), i8* getelementptr inbounds ([16 x i8]* @_ZTS13DerivedClass1, i64 0, i64 0) }, %"struct.std::type_info"* bitcast (%struct.__class_type_info_pseudo* @_ZTI9BaseClass to %"struct.std::type_info"*) }, align 16 ; <%struct.__si_class_type_info_pseudo*> [#uses=1]
+ at _ZTVN10__cxxabiv120__si_class_type_infoE = external constant [0 x i32 (...)*] ; <[0 x i32 (...)*]*> [#uses=1]
+ at _ZTS13DerivedClass1 = internal constant [16 x i8] c"13DerivedClass1\00", align 16 ; <[16 x i8]*> [#uses=1]
+ at _ZStL8__ioinit = internal global %"struct.std::ios_base::Init" zeroinitializer ; <%"struct.std::ios_base::Init"*> [#uses=2]
+ at __dso_handle = external global i8*               ; <i8**> [#uses=1]
+ at llvm.global_ctors = appending global [1 x %0] [%0 { i32 65535, void ()* @_GLOBAL__I_ob }] ; <[1 x %0]*> [#uses=0]
+
+ at _ZL20__gthrw_pthread_oncePiPFvvE = alias weak i32 (i32*, void ()*)* @pthread_once ; <i32 (i32*, void ()*)*> [#uses=0]
+ at _ZL27__gthrw_pthread_getspecificj = alias weak i8* (i32)* @pthread_getspecific ; <i8* (i32)*> [#uses=0]
+ at _ZL27__gthrw_pthread_setspecificjPKv = alias weak i32 (i32, i8*)* @pthread_setspecific ; <i32 (i32, i8*)*> [#uses=0]
+ at _ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_ = alias weak i32 (i64*, %union.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; <i32 (i64*, %union.pthread_attr_t*, i8* (i8*)*, i8*)*> [#uses=0]
+ at _ZL22__gthrw_pthread_cancelm = alias weak i32 (i64)* @pthread_cancel ; <i32 (i64)*> [#uses=0]
+ at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t = alias weak i32 (%union.pthread_mutex_t*)* @pthread_mutex_lock ; <i32 (%union.pthread_mutex_t*)*> [#uses=0]
+ at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t = alias weak i32 (%union.pthread_mutex_t*)* @pthread_mutex_trylock ; <i32 (%union.pthread_mutex_t*)*> [#uses=0]
+ at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t = alias weak i32 (%union.pthread_mutex_t*)* @pthread_mutex_unlock ; <i32 (%union.pthread_mutex_t*)*> [#uses=0]
+ at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t = alias weak i32 (%union.pthread_mutex_t*, %union.pthread_mutexattr_t*)* @pthread_mutex_init ; <i32 (%union.pthread_mutex_t*, %union.pthread_mutexattr_t*)*> [#uses=0]
+ at _ZL26__gthrw_pthread_key_createPjPFvPvE = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; <i32 (i32*, void (i8*)*)*> [#uses=0]
+ at _ZL26__gthrw_pthread_key_deletej = alias weak i32 (i32)* @pthread_key_delete ; <i32 (i32)*> [#uses=0]
+ at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t = alias weak i32 (%union.pthread_mutexattr_t*)* @pthread_mutexattr_init ; <i32 (%union.pthread_mutexattr_t*)*> [#uses=0]
+ at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti = alias weak i32 (%union.pthread_mutexattr_t*, i32)* @pthread_mutexattr_settype ; <i32 (%union.pthread_mutexattr_t*, i32)*> [#uses=0]
+ at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t = alias weak i32 (%union.pthread_mutexattr_t*)* @pthread_mutexattr_destroy ; <i32 (%union.pthread_mutexattr_t*)*> [#uses=0]
+
+define internal void @_GLOBAL__I_ob() {
+entry:
+  call void @_Z41__static_initialization_and_destruction_0ii(i32 1, i32 65535)
+  br label %return
+
+return:                                           ; preds = %entry
+  ret void
+}
+
+define internal %struct.BaseClass* @_Z4initi(i32 %i) nounwind {
+entry:
+  %i_addr = alloca i32                            ; <i32*> [#uses=3]
+  %retval = alloca %struct.BaseClass*             ; <%struct.BaseClass**> [#uses=2]
+  %0 = alloca %struct.BaseClass*                  ; <%struct.BaseClass**> [#uses=3]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  store i32 %i, i32* %i_addr
+  %1 = load i32* %i_addr, align 4                 ; <i32> [#uses=1]
+  %2 = icmp eq i32 %1, 1                          ; <i1> [#uses=1]
+  br i1 %2, label %bb, label %bb1
+
+bb:                                               ; preds = %entry
+  store %struct.BaseClass* @ob, %struct.BaseClass** %0, align 8
+  br label %bb4
+
+bb1:                                              ; preds = %entry
+  %3 = load i32* %i_addr, align 4                 ; <i32> [#uses=1]
+  %4 = icmp eq i32 %3, 2                          ; <i1> [#uses=1]
+  br i1 %4, label %bb2, label %bb3
+
+bb2:                                              ; preds = %bb1
+  store %struct.BaseClass* getelementptr inbounds (%struct.DerivedClass1* @derivedObject1, i64 0, i32 0), %struct.BaseClass** %0, align 8
+  br label %bb4
+
+bb3:                                              ; preds = %bb1
+  br label %return
+
+bb4:                                              ; preds = %bb2, %bb
+  %5 = load %struct.BaseClass** %0, align 8       ; <%struct.BaseClass*> [#uses=1]
+  store %struct.BaseClass* %5, %struct.BaseClass** %retval, align 8
+  br label %return
+
+return:                                           ; preds = %bb4, %bb3
+  %retval5 = load %struct.BaseClass** %retval     ; <%struct.BaseClass*> [#uses=1]
+  ret %struct.BaseClass* %retval5
+}
+
+define internal void @_Z4funcv() {
+entry:
+  %p = alloca %struct.BaseClass*                  ; <%struct.BaseClass**> [#uses=3]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  %0 = call %struct.BaseClass* @_Z4initi(i32 2) nounwind ; <%struct.BaseClass*> [#uses=1]
+  store %struct.BaseClass* %0, %struct.BaseClass** %p, align 8
+  %1 = load %struct.BaseClass** %p, align 8       ; <%struct.BaseClass*> [#uses=1]
+  %2 = getelementptr inbounds %struct.BaseClass* %1, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+  %3 = load i32 (...)*** %2, align 8              ; <i32 (...)**> [#uses=1]
+  %4 = getelementptr inbounds i32 (...)** %3, i64 0 ; <i32 (...)**> [#uses=1]
+  %5 = load i32 (...)** %4, align 1               ; <i32 (...)*> [#uses=1]
+  %6 = bitcast i32 (...)* %5 to void (%struct.BaseClass*)* ; <void (%struct.BaseClass*)*> [#uses=1]
+  %7 = load %struct.BaseClass** %p, align 8       ; <%struct.BaseClass*> [#uses=1]
+  call void %6(%struct.BaseClass* %7)
+  br label %return
+
+return:                                           ; preds = %entry
+  ret void
+}
+
+define i32 @main() {
+entry:
+  %retval = alloca i32                            ; <i32*> [#uses=2]
+  %0 = alloca i32                                 ; <i32*> [#uses=2]
+  %p = alloca %struct.BaseClass*                  ; <%struct.BaseClass**> [#uses=9]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  %1 = call %struct.BaseClass* @_Z4initi(i32 2) nounwind ; <%struct.BaseClass*> [#uses=1]
+  store %struct.BaseClass* %1, %struct.BaseClass** %p, align 8
+  %2 = load %struct.BaseClass** %p, align 8       ; <%struct.BaseClass*> [#uses=1]
+  %3 = getelementptr inbounds %struct.BaseClass* %2, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+  %4 = load i32 (...)*** %3, align 8              ; <i32 (...)**> [#uses=1]
+  %5 = getelementptr inbounds i32 (...)** %4, i64 0 ; <i32 (...)**> [#uses=1]
+  %6 = load i32 (...)** %5, align 1               ; <i32 (...)*> [#uses=1]
+  %7 = bitcast i32 (...)* %6 to void (%struct.BaseClass*)* ; <void (%struct.BaseClass*)*> [#uses=1]
+  %8 = load %struct.BaseClass** %p, align 8       ; <%struct.BaseClass*> [#uses=1]
+  call void %7(%struct.BaseClass* %8)
+  %9 = call %struct.BaseClass* @_Z4initi(i32 3) nounwind ; <%struct.BaseClass*> [#uses=1]
+  store %struct.BaseClass* %9, %struct.BaseClass** %p, align 8
+  %10 = load %struct.BaseClass** %p, align 8      ; <%struct.BaseClass*> [#uses=1]
+  %11 = getelementptr inbounds %struct.BaseClass* %10, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+  %12 = load i32 (...)*** %11, align 8            ; <i32 (...)**> [#uses=1]
+  %13 = getelementptr inbounds i32 (...)** %12, i64 0 ; <i32 (...)**> [#uses=1]
+  %14 = load i32 (...)** %13, align 1             ; <i32 (...)*> [#uses=1]
+  %15 = bitcast i32 (...)* %14 to void (%struct.BaseClass*)* ; <void (%struct.BaseClass*)*> [#uses=1]
+  %16 = load %struct.BaseClass** %p, align 8      ; <%struct.BaseClass*> [#uses=1]
+  call void %15(%struct.BaseClass* %16)
+  %17 = call %struct.BaseClass* @_Z4initi(i32 4) nounwind ; <%struct.BaseClass*> [#uses=1]
+  store %struct.BaseClass* %17, %struct.BaseClass** %p, align 8
+  %18 = load %struct.BaseClass** %p, align 8      ; <%struct.BaseClass*> [#uses=1]
+  %19 = getelementptr inbounds %struct.BaseClass* %18, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+  %20 = load i32 (...)*** %19, align 8            ; <i32 (...)**> [#uses=1]
+  %21 = getelementptr inbounds i32 (...)** %20, i64 0 ; <i32 (...)**> [#uses=1]
+  %22 = load i32 (...)** %21, align 1             ; <i32 (...)*> [#uses=1]
+  %23 = bitcast i32 (...)* %22 to void (%struct.BaseClass*)* ; <void (%struct.BaseClass*)*> [#uses=1]
+  %24 = load %struct.BaseClass** %p, align 8      ; <%struct.BaseClass*> [#uses=1]
+  call void %23(%struct.BaseClass* %24)
+  call void @_Z4funcv()
+  store i32 0, i32* %0, align 4
+  %25 = load i32* %0, align 4                     ; <i32> [#uses=1]
+  store i32 %25, i32* %retval, align 4
+  br label %return
+
+return:                                           ; preds = %entry
+  %retval1 = load i32* %retval                    ; <i32> [#uses=1]
+  ret i32 %retval1
+}
+
+define internal void @_ZN9BaseClass10myFunctionEv(%struct.BaseClass* %this) align 2 {
+entry:
+  %this_addr = alloca %struct.BaseClass*          ; <%struct.BaseClass**> [#uses=1]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  store %struct.BaseClass* %this, %struct.BaseClass** %this_addr
+  %0 = call %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(%"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZSt4cout, i8* getelementptr inbounds ([41 x i8]* @.str, i64 0, i64 0)) ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=0]
+  br label %return
+
+return:                                           ; preds = %entry
+  ret void
+}
+
+declare %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(%"struct.std::basic_ostream<char,std::char_traits<char> >"*, i8*)
+
+define internal void @_ZN13DerivedClass110myFunctionEv(%struct.DerivedClass1* %this) align 2 {
+entry:
+  %this_addr = alloca %struct.DerivedClass1*      ; <%struct.DerivedClass1**> [#uses=1]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  store %struct.DerivedClass1* %this, %struct.DerivedClass1** %this_addr
+  %0 = call %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc(%"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZSt4cout, i8* getelementptr inbounds ([47 x i8]* @.str1, i64 0, i64 0)) ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=0]
+  br label %return
+
+return:                                           ; preds = %entry
+  ret void
+}
+
+define internal void @_ZN9BaseClassC2Ev(%struct.BaseClass* %this) nounwind align 2 {
+entry:
+  %this_addr = alloca %struct.BaseClass*          ; <%struct.BaseClass**> [#uses=2]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  store %struct.BaseClass* %this, %struct.BaseClass** %this_addr
+  %0 = load %struct.BaseClass** %this_addr, align 8 ; <%struct.BaseClass*> [#uses=1]
+  %1 = getelementptr inbounds %struct.BaseClass* %0, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+  store i32 (...)** getelementptr inbounds ([3 x i32 (...)*]* @_ZTV9BaseClass, i64 0, i64 2), i32 (...)*** %1, align 8
+  br label %return
+
+return:                                           ; preds = %entry
+  ret void
+}
+
+define internal void @_ZN9BaseClassC1Ev(%struct.BaseClass* %this) nounwind align 2 {
+entry:
+  %this_addr = alloca %struct.BaseClass*          ; <%struct.BaseClass**> [#uses=2]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  store %struct.BaseClass* %this, %struct.BaseClass** %this_addr
+  %0 = load %struct.BaseClass** %this_addr, align 8 ; <%struct.BaseClass*> [#uses=1]
+  %1 = getelementptr inbounds %struct.BaseClass* %0, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+  store i32 (...)** getelementptr inbounds ([3 x i32 (...)*]* @_ZTV9BaseClass, i64 0, i64 2), i32 (...)*** %1, align 8
+  br label %return
+
+return:                                           ; preds = %entry
+  ret void
+}
+
+define internal void @_ZN13DerivedClass1C1Ev(%struct.DerivedClass1* %this) nounwind align 2 {
+entry:
+  %this_addr = alloca %struct.DerivedClass1*      ; <%struct.DerivedClass1**> [#uses=3]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  store %struct.DerivedClass1* %this, %struct.DerivedClass1** %this_addr
+  %0 = load %struct.DerivedClass1** %this_addr, align 8 ; <%struct.DerivedClass1*> [#uses=1]
+  %1 = getelementptr inbounds %struct.DerivedClass1* %0, i32 0, i32 0 ; <%struct.BaseClass*> [#uses=1]
+  call void @_ZN9BaseClassC2Ev(%struct.BaseClass* %1) nounwind
+  %2 = load %struct.DerivedClass1** %this_addr, align 8 ; <%struct.DerivedClass1*> [#uses=1]
+  %3 = getelementptr inbounds %struct.DerivedClass1* %2, i32 0, i32 0 ; <%struct.BaseClass*> [#uses=1]
+  %4 = getelementptr inbounds %struct.BaseClass* %3, i32 0, i32 0 ; <i32 (...)***> [#uses=1]
+  store i32 (...)** getelementptr inbounds ([3 x i32 (...)*]* @_ZTV13DerivedClass1, i64 0, i64 2), i32 (...)*** %4, align 8
+  br label %return
+
+return:                                           ; preds = %entry
+  ret void
+}
+
+define internal void @_Z41__static_initialization_and_destruction_0ii(i32 %__initialize_p, i32 %__priority) {
+entry:
+  %__initialize_p_addr = alloca i32               ; <i32*> [#uses=2]
+  %__priority_addr = alloca i32                   ; <i32*> [#uses=2]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  store i32 %__initialize_p, i32* %__initialize_p_addr
+  store i32 %__priority, i32* %__priority_addr
+  %0 = load i32* %__initialize_p_addr, align 4    ; <i32> [#uses=1]
+  %1 = icmp eq i32 %0, 1                          ; <i1> [#uses=1]
+  br i1 %1, label %bb, label %bb2
+
+bb:                                               ; preds = %entry
+  %2 = load i32* %__priority_addr, align 4        ; <i32> [#uses=1]
+  %3 = icmp eq i32 %2, 65535                      ; <i1> [#uses=1]
+  br i1 %3, label %bb1, label %bb2
+
+bb1:                                              ; preds = %bb
+  call void @_ZNSt8ios_base4InitC1Ev(%"struct.std::ios_base::Init"* @_ZStL8__ioinit)
+  %4 = call i32 @__cxa_atexit(void (i8*)* @__tcf_0, i8* null, i8* bitcast (i8** @__dso_handle to i8*)) nounwind ; <i32> [#uses=0]
+  call void @_ZN9BaseClassC1Ev(%struct.BaseClass* @ob) nounwind
+  call void @_ZN13DerivedClass1C1Ev(%struct.DerivedClass1* @derivedObject1) nounwind
+  br label %bb2
+
+bb2:                                              ; preds = %bb1, %bb, %entry
+  br label %return
+
+return:                                           ; preds = %bb2
+  ret void
+}
+
+declare void @_ZNSt8ios_base4InitC1Ev(%"struct.std::ios_base::Init"*)
+
+declare i32 @__cxa_atexit(void (i8*)*, i8*, i8*) nounwind
+
+define internal void @__tcf_0(i8* %unnamed_arg) {
+entry:
+  %unnamed_arg_addr = alloca i8*                  ; <i8**> [#uses=1]
+  %"alloca point" = bitcast i32 0 to i32          ; <i32> [#uses=0]
+  store i8* %unnamed_arg, i8** %unnamed_arg_addr
+  call void @_ZNSt8ios_base4InitD1Ev(%"struct.std::ios_base::Init"* @_ZStL8__ioinit)
+  br label %return
+
+return:                                           ; preds = %entry
+  ret void
+}
+
+declare void @_ZNSt8ios_base4InitD1Ev(%"struct.std::ios_base::Init"*)
+
+declare extern_weak i32 @pthread_once(i32*, void ()*)
+
+declare extern_weak i8* @pthread_getspecific(i32)
+
+declare extern_weak i32 @pthread_setspecific(i32, i8*)
+
+declare extern_weak i32 @pthread_create(i64*, %union.pthread_attr_t*, i8* (i8*)*, i8*)
+
+declare extern_weak i32 @pthread_cancel(i64)
+
+declare extern_weak i32 @pthread_mutex_lock(%union.pthread_mutex_t*)
+
+declare extern_weak i32 @pthread_mutex_trylock(%union.pthread_mutex_t*)
+
+declare extern_weak i32 @pthread_mutex_unlock(%union.pthread_mutex_t*)
+
+declare extern_weak i32 @pthread_mutex_init(%union.pthread_mutex_t*, %union.pthread_mutexattr_t*)
+
+declare extern_weak i32 @pthread_key_create(i32*, void (i8*)*)
+
+declare extern_weak i32 @pthread_key_delete(i32)
+
+declare extern_weak i32 @pthread_mutexattr_init(%union.pthread_mutexattr_t*)
+
+declare extern_weak i32 @pthread_mutexattr_settype(%union.pthread_mutexattr_t*, i32)
+
+declare extern_weak i32 @pthread_mutexattr_destroy(%union.pthread_mutexattr_t*)



From bigcheesegs at gmail.com  Tue Oct 19 12:39:55 2010
From: bigcheesegs at gmail.com (Michael Spencer)
Date: Tue, 19 Oct 2010 13:39:55 -0400
Subject: [llvm-commits] [llvm] r116682 - in /llvm/trunk:
 cmake/modules/LLVMProcessSources.cmake
 examples/ExceptionDemo/CMakeLists.txt
 examples/Kaleidoscope/Chapter7/CMakeLists.txt lib/Support/CMakeLists.txt
 lib/System/CMakeLists.txt lib/VMCore/CMakeLists.
Message-ID: <AANLkTi=FbTQeJ3BHHviaSP7ho-+7D+9Octzj3A0i0w3e@mail.gmail.com>

On Sat, Oct 16, 2010 at 10:26 PM, Oscar Fuentes <ofv at wanadoo.es> wrote:
> Author: ofv
> Date: Sat Oct 16 21:26:16 2010
> New Revision: 116682
>
> URL: http://llvm.org/viewvc/llvm-project?rev=116682&view=rev
> Log:
> Build with RTTI and exceptions disabled. Only in GCC for now.
>
> Modified:
> ? ?llvm/trunk/cmake/modules/LLVMProcessSources.cmake
> ? ?llvm/trunk/examples/ExceptionDemo/CMakeLists.txt
> ? ?llvm/trunk/examples/Kaleidoscope/Chapter7/CMakeLists.txt
> ? ?llvm/trunk/lib/Support/CMakeLists.txt
> ? ?llvm/trunk/lib/System/CMakeLists.txt
> ? ?llvm/trunk/lib/VMCore/CMakeLists.txt
> ? ?llvm/trunk/utils/TableGen/CMakeLists.txt
> ? ?llvm/trunk/utils/unittest/CMakeLists.txt
>
> Modified: llvm/trunk/cmake/modules/LLVMProcessSources.cmake
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/cmake/modules/LLVMProcessSources.cmake?rev=116682&r1=116681&r2=116682&view=diff
> ==============================================================================
> --- llvm/trunk/cmake/modules/LLVMProcessSources.cmake (original)
> +++ llvm/trunk/cmake/modules/LLVMProcessSources.cmake Sat Oct 16 21:26:16 2010
> @@ -36,6 +36,19 @@
> ? ? add_td_sources(sources)
> ? ? add_header_files(sources)
> ? endif()
> +
> + ?# Set common compiler options:
> + ?if( NOT LLVM_REQUIRES_EH )
> + ? ?if( CMAKE_COMPILER_IS_GNUCXX )
> + ? ? ?add_definitions( -fno-exceptions )
> + ? ?endif()
> + ?endif()
> + ?if( NOT LLVM_REQUIRES_RTTI )
> + ? ?if( CMAKE_COMPILER_IS_GNUCXX )
> + ? ? ?add_definitions( -fno-rtti )
> + ? ?endif()
> + ?endif()
> +
> ? set( ${OUT_VAR} ${sources} PARENT_SCOPE )
> ?endfunction(llvm_process_sources)
>
>
> Modified: llvm/trunk/examples/ExceptionDemo/CMakeLists.txt
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/examples/ExceptionDemo/CMakeLists.txt?rev=116682&r1=116681&r2=116682&view=diff
> ==============================================================================
> --- llvm/trunk/examples/ExceptionDemo/CMakeLists.txt (original)
> +++ llvm/trunk/examples/ExceptionDemo/CMakeLists.txt Sat Oct 16 21:26:16 2010
> @@ -1,4 +1,5 @@
> ?set(LLVM_LINK_COMPONENTS jit nativecodegen)
> +set(LLVM_REQUIRES_EH 1)
>
> ?add_llvm_example(ExceptionDemo
> ? ExceptionDemo.cpp
>
> Modified: llvm/trunk/examples/Kaleidoscope/Chapter7/CMakeLists.txt
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/examples/Kaleidoscope/Chapter7/CMakeLists.txt?rev=116682&r1=116681&r2=116682&view=diff
> ==============================================================================
> --- llvm/trunk/examples/Kaleidoscope/Chapter7/CMakeLists.txt (original)
> +++ llvm/trunk/examples/Kaleidoscope/Chapter7/CMakeLists.txt Sat Oct 16 21:26:16 2010
> @@ -1,4 +1,5 @@
> ?set(LLVM_LINK_COMPONENTS core jit interpreter native)
> +set(LLVM_REQUIRES_RTTI 1)
>
> ?add_llvm_example(Kaleidoscope-Ch7
> ? toy.cpp
>
> Modified: llvm/trunk/lib/Support/CMakeLists.txt
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/CMakeLists.txt?rev=116682&r1=116681&r2=116682&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Support/CMakeLists.txt (original)
> +++ llvm/trunk/lib/Support/CMakeLists.txt Sat Oct 16 21:26:16 2010
> @@ -1,3 +1,6 @@
> +## FIXME: This only requires RTTI because tblgen uses it. ?Fix that.
> +set(LLVM_REQUIRES_RTTI 1)
> +
> ?add_llvm_library(LLVMSupport
> ? APFloat.cpp
> ? APInt.cpp
>
> Modified: llvm/trunk/lib/System/CMakeLists.txt
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/CMakeLists.txt?rev=116682&r1=116681&r2=116682&view=diff
> ==============================================================================
> --- llvm/trunk/lib/System/CMakeLists.txt (original)
> +++ llvm/trunk/lib/System/CMakeLists.txt Sat Oct 16 21:26:16 2010
> @@ -1,3 +1,8 @@
> +set(LLVM_REQUIRES_RTTI 1)
> +if( MINGW )
> + ?set(LLVM_REQUIRES_EH 1)
> +endif()
> +
> ?add_llvm_library(LLVMSystem
> ? Alarm.cpp
> ? Atomic.cpp
>
> Modified: llvm/trunk/lib/VMCore/CMakeLists.txt
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/CMakeLists.txt?rev=116682&r1=116681&r2=116682&view=diff
> ==============================================================================
> --- llvm/trunk/lib/VMCore/CMakeLists.txt (original)
> +++ llvm/trunk/lib/VMCore/CMakeLists.txt Sat Oct 16 21:26:16 2010
> @@ -1,3 +1,5 @@
> +set(LLVM_REQUIRES_RTTI 1)
> +
> ?add_llvm_library(LLVMCore
> ? AsmWriter.cpp
> ? Attributes.cpp
>
> Modified: llvm/trunk/utils/TableGen/CMakeLists.txt
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CMakeLists.txt?rev=116682&r1=116681&r2=116682&view=diff
> ==============================================================================
> --- llvm/trunk/utils/TableGen/CMakeLists.txt (original)
> +++ llvm/trunk/utils/TableGen/CMakeLists.txt Sat Oct 16 21:26:16 2010
> @@ -1,3 +1,6 @@
> +set(LLVM_REQUIRES_EH 1)
> +set(LLVM_REQUIRES_RTTI 1)
> +
> ?add_executable(tblgen
> ? ARMDecoderEmitter.cpp
> ? AsmMatcherEmitter.cpp
>
> Modified: llvm/trunk/utils/unittest/CMakeLists.txt
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/unittest/CMakeLists.txt?rev=116682&r1=116681&r2=116682&view=diff
> ==============================================================================
> --- llvm/trunk/utils/unittest/CMakeLists.txt (original)
> +++ llvm/trunk/utils/unittest/CMakeLists.txt Sat Oct 16 21:26:16 2010
> @@ -24,6 +24,12 @@
> ? add_definitions("-Wno-variadic-macros")
> ?endif()
>
> +set(LLVM_REQUIRES_RTTI 1)
> +add_definitions( -DGTEST_HAS_RTTI=0 )
> +# libstdc++'s TR1 <tuple> header depends on RTTI and uses C++'0x features not
> +# supported by Clang, so force googletest to use its own tuple implementation.
> +add_definitions( -DGTEST_USE_OWN_TR1_TUPLE )

This breaks the build on VS2010. I handle tuple header selection
inside the header files where I actually have access to the compiler
version and other assorted macros needed to figure this out.

- Michael Spencer

> +
> ?add_llvm_library(gtest
> ? googletest/gtest.cc
> ? googletest/gtest-death-test.cc
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>


From jason.w.kim.2009 at gmail.com  Tue Oct 19 12:39:10 2010
From: jason.w.kim.2009 at gmail.com (Jason W Kim)
Date: Tue, 19 Oct 2010 17:39:10 -0000
Subject: [llvm-commits] [llvm] r116823 - in /llvm/trunk/test: MC/ELF/
	Scripts/
Message-ID: <20101019173910.A90842A6C12C@llvm.org>

Author: jasonwkim
Date: Tue Oct 19 12:39:10 2010
New Revision: 116823

URL: http://llvm.org/viewvc/llvm-project?rev=116823&view=rev
Log:
Fixing r116753 r116756 r116777
The failures in r116753 r116756 were caused by a python issue -
Python likes to append 'L' suffix to stringified numbers if the number
is larger than a machine int. Unfortunately, this causes a divergence of
behavior between 32 and 64 bit python versions.

I re-crafted elf-dump/common_dump to take care of these issues by:

1. always printing 0x (makes for easy sed/regex)
2. always print fixed length (exactly 2 + numBits/4 digits long)
   by mod ((2^numBits) - 1)
3. left-padded with '0'

There is a residual common routine that is also used by
macho-dump (dataToHex) , so I left the 'section_data' test values alone.



Modified:
    llvm/trunk/test/MC/ELF/alias.s
    llvm/trunk/test/MC/ELF/align-bss.s
    llvm/trunk/test/MC/ELF/align-nops.s
    llvm/trunk/test/MC/ELF/align-size.s
    llvm/trunk/test/MC/ELF/align-text.s
    llvm/trunk/test/MC/ELF/align.s
    llvm/trunk/test/MC/ELF/basic-elf.ll
    llvm/trunk/test/MC/ELF/common.s
    llvm/trunk/test/MC/ELF/common2.s
    llvm/trunk/test/MC/ELF/diff.s
    llvm/trunk/test/MC/ELF/empty.s
    llvm/trunk/test/MC/ELF/entsize.ll
    llvm/trunk/test/MC/ELF/entsize.s
    llvm/trunk/test/MC/ELF/file.s
    llvm/trunk/test/MC/ELF/got.s
    llvm/trunk/test/MC/ELF/local-reloc.s
    llvm/trunk/test/MC/ELF/merge.s
    llvm/trunk/test/MC/ELF/norelocation.s
    llvm/trunk/test/MC/ELF/pic-diff.s
    llvm/trunk/test/MC/ELF/plt.s
    llvm/trunk/test/MC/ELF/relax.s
    llvm/trunk/test/MC/ELF/relocation-386.s
    llvm/trunk/test/MC/ELF/relocation.s
    llvm/trunk/test/MC/ELF/section.s
    llvm/trunk/test/MC/ELF/size.s
    llvm/trunk/test/MC/ELF/sleb.s
    llvm/trunk/test/MC/ELF/uleb.s
    llvm/trunk/test/MC/ELF/undef.s
    llvm/trunk/test/MC/ELF/undef2.s
    llvm/trunk/test/MC/ELF/weak.s
    llvm/trunk/test/MC/ELF/zero.s
    llvm/trunk/test/Scripts/common_dump.py
    llvm/trunk/test/Scripts/elf-dump

Modified: llvm/trunk/test/MC/ELF/alias.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/alias.s?rev=116823&r1=116822&r2=116823&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/alias.s (original)
+++ llvm/trunk/test/MC/ELF/alias.s Tue Oct 19 12:39:10 2010
@@ -15,70 +15,70 @@
 foo4:
 bar4 = foo4
 
-// CHECK:       # Symbol 1
-// CHECK-NEXT:  (('st_name', 5) # 'bar'
-// CHECK-NEXT:   ('st_bind', 0)
-// CHECK-NEXT:   ('st_type', 0)
-// CHECK-NEXT:   ('st_other', 0)
-// CHECK-NEXT:   ('st_shndx', 1)
-// CHECK-NEXT:   ('st_value', 0)
-// CHECK-NEXT:   ('st_size', 0)
+// CHECK:       # Symbol 0x00000001
+// CHECK-NEXT:  (('st_name', 0x00000005) # 'bar'
+// CHECK-NEXT:   ('st_bind', 0x00000000)
+// CHECK-NEXT:   ('st_type', 0x00000000)
+// CHECK-NEXT:   ('st_other', 0x00000000)
+// CHECK-NEXT:   ('st_shndx', 0x00000001)
+// CHECK-NEXT:   ('st_value', 0x00000000)
+// CHECK-NEXT:   ('st_size', 0x00000000)
 // CHECK-NEXT:  ),
-// CHECK-NEXT:  # Symbol 2
-// CHECK-NEXT: (('st_name', 29) # 'bar4'
-// CHECK-NEXT:  ('st_bind', 0)
-// CHECK-NEXT:  ('st_type', 2)
-// CHECK-NEXT:  ('st_other', 0)
-// CHECK-NEXT:  ('st_shndx', 1)
-// CHECK-NEXT:  ('st_value', 0)
-// CHECK-NEXT:  ('st_size', 0)
+// CHECK-NEXT:  # Symbol 0x00000002
+// CHECK-NEXT: (('st_name', 0x0000001d) # 'bar4'
+// CHECK-NEXT:  ('st_bind', 0x00000000)
+// CHECK-NEXT:  ('st_type', 0x00000002)
+// CHECK-NEXT:  ('st_other', 0x00000000)
+// CHECK-NEXT:  ('st_shndx', 0x00000001)
+// CHECK-NEXT:  ('st_value', 0x00000000)
+// CHECK-NEXT:  ('st_size', 0x00000000)
 // CHECK-NEXT: ),
-// CHECK-NEXT:  # Symbol 3
-// CHECK-NEXT:  (('st_name', 1) # 'foo'
-// CHECK-NEXT:   ('st_bind', 0)
-// CHECK-NEXT:   ('st_type', 0)
-// CHECK-NEXT:   ('st_other', 0)
-// CHECK-NEXT:   ('st_shndx', 1)
-// CHECK-NEXT:   ('st_value', 0)
-// CHECK-NEXT:   ('st_size', 0)
+// CHECK-NEXT:  # Symbol 0x00000003
+// CHECK-NEXT:  (('st_name', 0x00000001) # 'foo'
+// CHECK-NEXT:   ('st_bind', 0x00000000)
+// CHECK-NEXT:   ('st_type', 0x00000000)
+// CHECK-NEXT:   ('st_other', 0x00000000)
+// CHECK-NEXT:   ('st_shndx', 0x00000001)
+// CHECK-NEXT:   ('st_value', 0x00000000)
+// CHECK-NEXT:   ('st_size', 0x00000000)
 // CHECK-NEXT: ),
-// CHECK-NEXT:  # Symbol 4
-// CHECK-NEXT:  (('st_name', 14) # 'foo3'
-// CHECK-NEXT:   ('st_bind', 0)
-// CHECK-NEXT:   ('st_type', 0)
-// CHECK-NEXT:   ('st_other', 0)
-// CHECK-NEXT:   ('st_shndx', 1)
-// CHECK-NEXT:   ('st_value', 0)
-// CHECK-NEXT:   ('st_size', 0)
+// CHECK-NEXT:  # Symbol 0x00000004
+// CHECK-NEXT:  (('st_name', 0x0000000e) # 'foo3'
+// CHECK-NEXT:   ('st_bind', 0x00000000)
+// CHECK-NEXT:   ('st_type', 0x00000000)
+// CHECK-NEXT:   ('st_other', 0x00000000)
+// CHECK-NEXT:   ('st_shndx', 0x00000001)
+// CHECK-NEXT:   ('st_value', 0x00000000)
+// CHECK-NEXT:   ('st_size', 0x00000000)
 // CHECK-NEXT: ),
-// CHECK-NEXT: # Symbol 5
-// CHECK-NEXT: (('st_name', 24) # 'foo4'
-// CHECK-NEXT:  ('st_bind', 0)
-// CHECK-NEXT:  ('st_type', 2)
-// CHECK-NEXT:  ('st_other', 0)
-// CHECK-NEXT:  ('st_shndx', 1)
-// CHECK-NEXT:  ('st_value', 0)
-// CHECK-NEXT:  ('st_size', 0)
+// CHECK-NEXT: # Symbol 0x00000005
+// CHECK-NEXT: (('st_name', 0x00000018) # 'foo4'
+// CHECK-NEXT:  ('st_bind', 0x00000000)
+// CHECK-NEXT:  ('st_type', 0x00000002)
+// CHECK-NEXT:  ('st_other', 0x00000000)
+// CHECK-NEXT:  ('st_shndx', 0x00000001)
+// CHECK-NEXT:  ('st_value', 0x00000000)
+// CHECK-NEXT:  ('st_size', 0x00000000)
 // CHECK-NEXT: ),
-// CHECK-NEXT: # Symbol 6
-// CHECK-NEXT: (('st_name', 0) # ''
-// CHECK:       # Symbol 7
-// CHECK-NEXT:  (('st_name', 0) # ''
-// CHECK:       # Symbol 8
-// CHECK-NEXT:  (('st_name', 0) # ''
-// CHECK:       # Symbol 9
-// CHECK-NEXT:  (('st_name', 19) # 'bar3'
-// CHECK-NEXT:   ('st_bind', 1)
-// CHECK-NEXT:   ('st_type', 0)
-// CHECK-NEXT:   ('st_other', 0)
-// CHECK-NEXT:   ('st_shndx', 1)
-// CHECK-NEXT:   ('st_value', 0)
-// CHECK-NEXT:   ('st_size', 0)
-// CHECK:       # Symbol 10
-// CHECK-NEXT:  (('st_name', 9) # 'bar2'
-// CHECK-NEXT:   ('st_bind', 1)
-// CHECK-NEXT:   ('st_type', 0)
-// CHECK-NEXT:   ('st_other', 0)
-// CHECK-NEXT:   ('st_shndx', 0)
-// CHECK-NEXT:   ('st_value', 0)
-// CHECK-NEXT:   ('st_size', 0)
+// CHECK-NEXT: # Symbol 0x00000006
+// CHECK-NEXT: (('st_name', 0x00000000) # ''
+// CHECK:       # Symbol 0x00000007
+// CHECK-NEXT:  (('st_name', 0x00000000) # ''
+// CHECK:       # Symbol 0x00000008
+// CHECK-NEXT:  (('st_name', 0x00000000) # ''
+// CHECK:       # Symbol 0x00000009
+// CHECK-NEXT:  (('st_name', 0x00000013) # 'bar3'
+// CHECK-NEXT:   ('st_bind', 0x00000001)
+// CHECK-NEXT:   ('st_type', 0x00000000)
+// CHECK-NEXT:   ('st_other', 0x00000000)
+// CHECK-NEXT:   ('st_shndx', 0x00000001)
+// CHECK-NEXT:   ('st_value', 0x00000000)
+// CHECK-NEXT:   ('st_size', 0x00000000)
+// CHECK:       # Symbol 0x0000000a
+// CHECK-NEXT:  (('st_name', 0x00000009) # 'bar2'
+// CHECK-NEXT:   ('st_bind', 0x00000001)
+// CHECK-NEXT:   ('st_type', 0x00000000)
+// CHECK-NEXT:   ('st_other', 0x00000000)
+// CHECK-NEXT:   ('st_shndx', 0x00000000)
+// CHECK-NEXT:   ('st_value', 0x00000000)
+// CHECK-NEXT:   ('st_size', 0x00000000)

Modified: llvm/trunk/test/MC/ELF/align-bss.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/align-bss.s?rev=116823&r1=116822&r2=116823&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/align-bss.s (original)
+++ llvm/trunk/test/MC/ELF/align-bss.s Tue Oct 19 12:39:10 2010
@@ -5,13 +5,13 @@
 	.local	foo
 	.comm	foo,2048,16
 
-// CHECK:        ('sh_name', 13) # '.bss'
-// CHECK-NEXT:   ('sh_type', 8)
-// CHECK-NEXT:   ('sh_flags', 3)
-// CHECK-NEXT:   ('sh_addr', 0)
-// CHECK-NEXT:   ('sh_offset', 64)
-// CHECK-NEXT:   ('sh_size', 2048)
-// CHECK-NEXT:   ('sh_link', 0)
-// CHECK-NEXT:   ('sh_info', 0)
-// CHECK-NEXT:   ('sh_addralign', 16)
-// CHECK-NEXT:   ('sh_entsize', 0)
+// CHECK:        ('sh_name', 0x0000000d) # '.bss'
+// CHECK-NEXT:   ('sh_type', 0x00000008)
+// CHECK-NEXT:   ('sh_flags', 0x00000003)
+// CHECK-NEXT:   ('sh_addr', 0x00000000)
+// CHECK-NEXT:   ('sh_offset', 0x00000040)
+// CHECK-NEXT:   ('sh_size', 0x00000800)
+// CHECK-NEXT:   ('sh_link', 0x00000000)
+// CHECK-NEXT:   ('sh_info', 0x00000000)
+// CHECK-NEXT:   ('sh_addralign', 0x00000010)
+// CHECK-NEXT:   ('sh_entsize', 0x00000000)

Modified: llvm/trunk/test/MC/ELF/align-nops.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/align-nops.s?rev=116823&r1=116822&r2=116823&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/align-nops.s (original)
+++ llvm/trunk/test/MC/ELF/align-nops.s Tue Oct 19 12:39:10 2010
@@ -4,37 +4,37 @@
     .text
 f0:
     .long 0
-    .align  8, 0x90
+    .align  8, 0x00000090
     .long 0
     .align  8
 
 // But not in another section
     .data
     .long 0
-    .align  8, 0x90
+    .align  8, 0x00000090
     .long 0
     .align  8
 
-// CHECK: (('sh_name', 1) # '.text'
-// CHECK-NEXT:  ('sh_type', 1)
-// CHECK-NEXT:  ('sh_flags', 6)
+// CHECK: (('sh_name', 0x00000001) # '.text'
+// CHECK-NEXT:  ('sh_type', 0x00000001)
+// CHECK-NEXT:  ('sh_flags', 0x00000006)
 // CHECK-NEXT:  ('sh_addr',
 // CHECK-NEXT:  ('sh_offset',
-// CHECK-NEXT:  ('sh_size', 16)
-// CHECK-NEXT:  ('sh_link', 0)
-// CHECK-NEXT:  ('sh_info', 0)
-// CHECK-NEXT:  ('sh_addralign', 8)
-// CHECK-NEXT:  ('sh_entsize', 0)
+// CHECK-NEXT:  ('sh_size', 0x00000010)
+// CHECK-NEXT:  ('sh_link', 0x00000000)
+// CHECK-NEXT:  ('sh_info', 0x00000000)
+// CHECK-NEXT:  ('sh_addralign', 0x00000008)
+// CHECK-NEXT:  ('sh_entsize', 0x00000000)
 // CHECK-NEXT:  ('_section_data', '00000000 0f1f4000 00000000 0f1f4000')
 
-// CHECK: (('sh_name', 7) # '.data'
-// CHECK-NEXT:  ('sh_type', 1)
-// CHECK-NEXT:  ('sh_flags', 3)
+// CHECK: (('sh_name', 0x00000007) # '.data'
+// CHECK-NEXT:  ('sh_type', 0x00000001)
+// CHECK-NEXT:  ('sh_flags', 0x00000003)
 // CHECK-NEXT:  ('sh_addr',
 // CHECK-NEXT:  ('sh_offset',
-// CHECK-NEXT:  ('sh_size', 16)
-// CHECK-NEXT:  ('sh_link', 0)
-// CHECK-NEXT:  ('sh_info', 0)
-// CHECK-NEXT:  ('sh_addralign', 8)
-// CHECK-NEXT:  ('sh_entsize', 0)
+// CHECK-NEXT:  ('sh_size', 0x00000010)
+// CHECK-NEXT:  ('sh_link', 0x00000000)
+// CHECK-NEXT:  ('sh_info', 0x00000000)
+// CHECK-NEXT:  ('sh_addralign', 0x00000008)
+// CHECK-NEXT:  ('sh_entsize', 0x00000000)
 // CHECK-NEXT:  ('_section_data', '00000000 90909090 00000000 00000000')

Modified: llvm/trunk/test/MC/ELF/align-size.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/align-size.s?rev=116823&r1=116822&r2=116823&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/align-size.s (original)
+++ llvm/trunk/test/MC/ELF/align-size.s Tue Oct 19 12:39:10 2010
@@ -5,9 +5,9 @@
 	.zero 4
 	.align	8
 
-// CHECK:      (('sh_name', 1) # '.text'
-// CHECK-NEXT:  ('sh_type', 1)
-// CHECK-NEXT:  ('sh_flags', 6)
-// CHECK-NEXT:  ('sh_addr', 0)
-// CHECK-NEXT:  ('sh_offset', 64)
-// CHECK-NEXT:  ('sh_size', 8)
+// CHECK:      (('sh_name', 0x00000001) # '.text'
+// CHECK-NEXT:  ('sh_type', 0x00000001)
+// CHECK-NEXT:  ('sh_flags', 0x00000006)
+// CHECK-NEXT:  ('sh_addr', 0x00000000)
+// CHECK-NEXT:  ('sh_offset', 0x00000040)
+// CHECK-NEXT:  ('sh_size', 0x00000008)

Modified: llvm/trunk/test/MC/ELF/align-text.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/align-text.s?rev=116823&r1=116822&r2=116823&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/align-text.s (original)
+++ llvm/trunk/test/MC/ELF/align-text.s Tue Oct 19 12:39:10 2010
@@ -6,14 +6,14 @@
         .text
         .zero 1
 
-// CHECK:      (('sh_name', 1) # '.text'
-// CHECK-NEXT:  ('sh_type', 1)
-// CHECK-NEXT:  ('sh_flags', 6)
-// CHECK-NEXT:   ('sh_addr', 0)
-// CHECK-NEXT:   ('sh_offset', 64)
-// CHECK-NEXT:   ('sh_size', 2)
-// CHECK-NEXT:   ('sh_link', 0)
-// CHECK-NEXT:   ('sh_info', 0)
-// CHECK-NEXT:   ('sh_addralign', 4)
-// CHECK-NEXT:   ('sh_entsize', 0)
+// CHECK:      (('sh_name', 0x00000001) # '.text'
+// CHECK-NEXT:  ('sh_type', 0x00000001)
+// CHECK-NEXT:  ('sh_flags', 0x00000006)
+// CHECK-NEXT:   ('sh_addr', 0x00000000)
+// CHECK-NEXT:   ('sh_offset', 0x00000040)
+// CHECK-NEXT:   ('sh_size', 0x00000002)
+// CHECK-NEXT:   ('sh_link', 0x00000000)
+// CHECK-NEXT:   ('sh_info', 0x00000000)
+// CHECK-NEXT:   ('sh_addralign', 0x00000004)
+// CHECK-NEXT:   ('sh_entsize', 0x00000000)
 // CHECK-NEXT:  ),

Modified: llvm/trunk/test/MC/ELF/align.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/align.s?rev=116823&r1=116822&r2=116823&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/align.s (original)
+++ llvm/trunk/test/MC/ELF/align.s Tue Oct 19 12:39:10 2010
@@ -7,26 +7,26 @@
 	.section	.rodata,"a", at progbits
 	.align	8
 
-// CHECK: # Section 3
-// CHECK-NEXT:  (('sh_name', 13) # '.bss'
-// CHECK-NEXT:   ('sh_type', 8)
-// CHECK-NEXT:   ('sh_flags', 3)
-// CHECK-NEXT:   ('sh_addr', 0)
-// CHECK-NEXT:   ('sh_offset', 68)
-// CHECK-NEXT:   ('sh_size', 0)
-// CHECK-NEXT:   ('sh_link', 0)
-// CHECK-NEXT:   ('sh_info', 0)
-// CHECK-NEXT:   ('sh_addralign', 4)
-// CHECK-NEXT:   ('sh_entsize', 0)
+// CHECK: # Section 0x00000003
+// CHECK-NEXT:  (('sh_name', 0x0000000d) # '.bss'
+// CHECK-NEXT:   ('sh_type', 0x00000008)
+// CHECK-NEXT:   ('sh_flags', 0x00000003)
+// CHECK-NEXT:   ('sh_addr', 0x00000000)
+// CHECK-NEXT:   ('sh_offset', 0x00000044)
+// CHECK-NEXT:   ('sh_size', 0x00000000)
+// CHECK-NEXT:   ('sh_link', 0x00000000)
+// CHECK-NEXT:   ('sh_info', 0x00000000)
+// CHECK-NEXT:   ('sh_addralign', 0x00000004)
+// CHECK-NEXT:   ('sh_entsize', 0x00000000)
 // CHECK-NEXT:  ),
-// CHECK-NEXT:  # Section 4
-// CHECK-NEXT:  (('sh_name', 18) # '.rodata'
-// CHECK-NEXT:   ('sh_type', 1)
-// CHECK-NEXT:   ('sh_flags', 2)
-// CHECK-NEXT:   ('sh_addr', 0)
-// CHECK-NEXT:   ('sh_offset', 72)
-// CHECK-NEXT:   ('sh_size', 0)
-// CHECK-NEXT:   ('sh_link', 0)
-// CHECK-NEXT:   ('sh_info', 0)
-// CHECK-NEXT:   ('sh_addralign', 8)
-// CHECK-NEXT:   ('sh_entsize', 0)
+// CHECK-NEXT:  # Section 0x00000004
+// CHECK-NEXT:  (('sh_name', 0x00000012) # '.rodata'
+// CHECK-NEXT:   ('sh_type', 0x00000001)
+// CHECK-NEXT:   ('sh_flags', 0x00000002)
+// CHECK-NEXT:   ('sh_addr', 0x00000000)
+// CHECK-NEXT:   ('sh_offset', 0x00000048)
+// CHECK-NEXT:   ('sh_size', 0x00000000)
+// CHECK-NEXT:   ('sh_link', 0x00000000)
+// CHECK-NEXT:   ('sh_info', 0x00000000)
+// CHECK-NEXT:   ('sh_addralign', 0x00000008)
+// CHECK-NEXT:   ('sh_entsize', 0x00000000)

Modified: llvm/trunk/test/MC/ELF/basic-elf.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/basic-elf.ll?rev=116823&r1=116822&r2=116823&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/basic-elf.ll (original)
+++ llvm/trunk/test/MC/ELF/basic-elf.ll Tue Oct 19 12:39:10 2010
@@ -12,100 +12,100 @@
 
 declare i32 @puts(i8* nocapture) nounwind
 
-; 32: ('e_indent[EI_CLASS]', 1)
-; 32: ('e_indent[EI_DATA]', 1)
-; 32: ('e_indent[EI_VERSION]', 1)
+; 32: ('e_indent[EI_CLASS]', 0x00000001)
+; 32: ('e_indent[EI_DATA]', 0x00000001)
+; 32: ('e_indent[EI_VERSION]', 0x00000001)
 ; 32: ('_sections', [
 ; 32:   # Section 0
-; 32:   (('sh_name', 0) # ''
+; 32:   (('sh_name', 0x00000000) # ''
 
 ; 32:   # '.text'
 
-; 32: ('st_bind', 0)
-; 32: ('st_type', 3)
+; 32: ('st_bind', 0x00000000)
+; 32: ('st_type', 0x00000003)
 
-; 32: ('st_bind', 0)
-; 32: ('st_type', 3)
+; 32: ('st_bind', 0x00000000)
+; 32: ('st_type', 0x00000003)
 
-; 32: ('st_bind', 0)
-; 32: ('st_type', 3)
+; 32: ('st_bind', 0x00000000)
+; 32: ('st_type', 0x00000003)
 
 ; 32:   # 'main'
-; 32:   ('st_bind', 1)
-; 32-NEXT: ('st_type', 2)
+; 32:   ('st_bind', 0x00000001)
+; 32-NEXT: ('st_type', 0x00000002)
 
 ; 32:   # 'puts'
-; 32:   ('st_bind', 1)
-; 32-NEXT: ('st_type', 0)
+; 32:   ('st_bind', 0x00000001)
+; 32-NEXT: ('st_type', 0x00000000)
 
 ; 32:   # '.rel.text'
 
 ; 32:   ('_relocations', [
-; 32:     # Relocation 0
-; 32:     (('r_offset', 6)
-; 32:      ('r_type', 1)
+; 32:     # Relocation 0x00000000
+; 32:     (('r_offset', 0x00000006)
+; 32:      ('r_type', 0x00000001)
 ; 32:     ),
-; 32:     # Relocation 1
-; 32:     (('r_offset', 11)
-; 32:      ('r_type', 2)
+; 32:     # Relocation 0x00000001
+; 32:     (('r_offset', 0x0000000b)
+; 32:      ('r_type', 0x00000002)
 ; 32:     ),
-; 32:     # Relocation 2
-; 32:     (('r_offset', 18)
-; 32:      ('r_type', 1)
+; 32:     # Relocation 0x00000002
+; 32:     (('r_offset', 0x00000012)
+; 32:      ('r_type', 0x00000001)
 ; 32:     ),
-; 32:     # Relocation 3
-; 32:     (('r_offset', 23)
-; 32:      ('r_type', 2)
+; 32:     # Relocation 0x00000003
+; 32:     (('r_offset', 0x00000017)
+; 32:      ('r_type', 0x00000002)
 ; 32:     ),
 ; 32:   ])
 
-; 64: ('e_indent[EI_CLASS]', 2)
-; 64: ('e_indent[EI_DATA]', 1)
-; 64: ('e_indent[EI_VERSION]', 1)
+; 64: ('e_indent[EI_CLASS]', 0x00000002)
+; 64: ('e_indent[EI_DATA]', 0x00000001)
+; 64: ('e_indent[EI_VERSION]', 0x00000001)
 ; 64: ('_sections', [
 ; 64:   # Section 0
-; 64:   (('sh_name', 0) # ''
+; 64:   (('sh_name', 0x00000000) # ''
 
 ; 64:   # '.text'
 
-; 64: ('st_bind', 0)
-; 64: ('st_type', 3)
+; 64: ('st_bind', 0x00000000)
+; 64: ('st_type', 0x00000003)
 
-; 64: ('st_bind', 0)
-; 64: ('st_type', 3)
+; 64: ('st_bind', 0x00000000)
+; 64: ('st_type', 0x00000003)
 
-; 64: ('st_bind', 0)
-; 64: ('st_type', 3)
+; 64: ('st_bind', 0x00000000)
+; 64: ('st_type', 0x00000003)
 
 ; 64:   # 'main'
-; 64-NEXT: ('st_bind', 1)
-; 64-NEXT: ('st_type', 2)
+; 64-NEXT: ('st_bind', 0x00000001)
+; 64-NEXT: ('st_type', 0x00000002)
 
 ; 64:   # 'puts'
-; 64-NEXT: ('st_bind', 1)
-; 64-NEXT: ('st_type', 0)
+; 64-NEXT: ('st_bind', 0x00000001)
+; 64-NEXT: ('st_type', 0x00000000)
 
 ; 64:   # '.rela.text'
 
 ; 64:   ('_relocations', [
-; 64:     # Relocation 0
-; 64:     (('r_offset', 5)
-; 64:      ('r_type', 10)
-; 64:      ('r_addend', 0)
+; 64:     # Relocation 0x00000000
+; 64:     (('r_offset', 0x00000005)
+; 64:      ('r_type', 0x0000000a)
+; 64:      ('r_addend', 0x00000000)
 ; 64:     ),
-; 64:     # Relocation 1
-; 64:     (('r_offset', 10)
-; 64:      ('r_type', 2)
-; 64:      ('r_addend', -4)
+; 64:     # Relocation 0x00000001
+; 64:     (('r_offset', 0x0000000a)
+; 64:      ('r_type', 0x00000002)
+; 64:      ('r_addend', 0xfffffffc)
 ; 64:     ),
-; 64:     # Relocation 2
-; 64:     (('r_offset', 15)
-; 64:      ('r_type', 10)
-; 64:      ('r_addend', 6)
+; 64:     # Relocation 0x00000002
+; 64:     (('r_offset', 0x0000000f)
+; 64:      ('r_type', 0x0000000a)
+; 64:      ('r_addend', 0x00000006)
 ; 64:     ),
-; 64:     # Relocation 3
-; 64:     (('r_offset', 20)
-; 64:      ('r_type', 2)
-; 64:      ('r_addend', -4)
+; 64:     # Relocation 0x00000003
+; 64:     (('r_offset', 0x00000014)
+; 64:      ('r_type', 0x00000002)
+; 64:      ('r_addend', 0xfffffffc)
 ; 64:     ),
 ; 64:   ])

Modified: llvm/trunk/test/MC/ELF/common.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/common.s?rev=116823&r1=116822&r2=116823&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/common.s (original)
+++ llvm/trunk/test/MC/ELF/common.s Tue Oct 19 12:39:10 2010
@@ -8,13 +8,13 @@
 	.local	common1
 	.comm	common1,1,1
 
-// CHECK: ('st_name', 1) # 'common1'
-// CHECK-NEXT: ('st_bind', 0)
-// CHECK-NEXT: ('st_type', 1)
-// CHECK-NEXT: ('st_other', 0)
+// CHECK: ('st_name', 0x00000001) # 'common1'
+// CHECK-NEXT: ('st_bind', 0x00000000)
+// CHECK-NEXT: ('st_type', 0x00000001)
+// CHECK-NEXT: ('st_other', 0x00000000)
 // CHECK-NEXT: ('st_shndx',
-// CHECK-NEXT: ('st_value', 0)
-// CHECK-NEXT: ('st_size', 1)
+// CHECK-NEXT: ('st_value', 0x00000000)
+// CHECK-NEXT: ('st_size', 0x00000001)
 
 
 // Same as common1, but with directives in a different order.
@@ -22,25 +22,25 @@
 	.type	common2, at object
 	.comm	common2,1,1
 
-// CHECK: ('st_name', 9) # 'common2'
-// CHECK-NEXT: ('st_bind', 0)
-// CHECK-NEXT: ('st_type', 1)
-// CHECK-NEXT: ('st_other', 0)
+// CHECK: ('st_name', 0x00000009) # 'common2'
+// CHECK-NEXT: ('st_bind', 0x00000000)
+// CHECK-NEXT: ('st_type', 0x00000001)
+// CHECK-NEXT: ('st_other', 0x00000000)
 // CHECK-NEXT: ('st_shndx',
-// CHECK-NEXT: ('st_value', 1)
-// CHECK-NEXT: ('st_size', 1)
+// CHECK-NEXT: ('st_value', 0x00000001)
+// CHECK-NEXT: ('st_size', 0x00000001)
 
 // Test that without an explicit .local we produce a global.
 	.type	common3, at object
 	.comm	common3,4,4
 
-// CHECK: ('st_name', 17) # 'common3'
-// CHECK-NEXT: ('st_bind', 1)
-// CHECK-NEXT: ('st_type', 1)
-// CHECK-NEXT: ('st_other', 0)
-// CHECK-NEXT: ('st_shndx', 65522)
-// CHECK-NEXT: ('st_value', 4)
-// CHECK-NEXT: ('st_size', 4)
+// CHECK: ('st_name', 0x00000011) # 'common3'
+// CHECK-NEXT: ('st_bind', 0x00000001)
+// CHECK-NEXT: ('st_type', 0x00000001)
+// CHECK-NEXT: ('st_other', 0x00000000)
+// CHECK-NEXT: ('st_shndx', 0x0000fff2)
+// CHECK-NEXT: ('st_value', 0x00000004)
+// CHECK-NEXT: ('st_size', 0x00000004)
 
 
 // Test that without an explicit .local we produce a global, even if the first
@@ -54,10 +54,10 @@
 	.type	common4, at object
 	.comm	common4,40,16
 
-// CHECK: ('st_name', 29) # 'common4'
-// CHECK-NEXT: ('st_bind', 1)
-// CHECK-NEXT: ('st_type', 1)
-// CHECK-NEXT: ('st_other', 0)
-// CHECK-NEXT: ('st_shndx', 65522)
-// CHECK-NEXT: ('st_value', 16)
-// CHECK-NEXT: ('st_size', 40)
+// CHECK: ('st_name', 0x0000001d) # 'common4'
+// CHECK-NEXT: ('st_bind', 0x00000001)
+// CHECK-NEXT: ('st_type', 0x00000001)
+// CHECK-NEXT: ('st_other', 0x00000000)
+// CHECK-NEXT: ('st_shndx', 0x0000fff2)
+// CHECK-NEXT: ('st_value', 0x00000010)
+// CHECK-NEXT: ('st_size', 0x00000028)

Modified: llvm/trunk/test/MC/ELF/common2.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/common2.s?rev=116823&r1=116822&r2=116823&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/common2.s (original)
+++ llvm/trunk/test/MC/ELF/common2.s Tue Oct 19 12:39:10 2010
@@ -9,12 +9,12 @@
         .zero 1
 	.align	8
 
-// CHECK:      (('sh_name', 13) # '.bss'
+// CHECK:      (('sh_name', 0x0000000d) # '.bss'
 // CHECK-NEXT:  ('sh_type',
 // CHECK-NEXT:  ('sh_flags'
 // CHECK-NEXT:  ('sh_addr',
 // CHECK-NEXT:  ('sh_offset',
-// CHECK-NEXT:  ('sh_size', 9)
+// CHECK-NEXT:  ('sh_size', 0x00000009)
 // CHECK-NEXT:  ('sh_link',
 // CHECK-NEXT:  ('sh_info',
 // CHECK-NEXT:  ('sh_addralign',

Modified: llvm/trunk/test/MC/ELF/diff.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/diff.s?rev=116823&r1=116822&r2=116823&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/diff.s (original)
+++ llvm/trunk/test/MC/ELF/diff.s Tue Oct 19 12:39:10 2010
@@ -8,8 +8,8 @@
 zed:
         mov zed+(bar-foo), %eax
 
-// CHECK:       # Relocation 0
-// CHECK-NEXT:  (('r_offset', 5)
-// CHECK-NEXT:   ('r_sym', 6)
-// CHECK-NEXT:   ('r_type', 11)
-// CHECK-NEXT:   ('r_addend', 1)
+// CHECK:       # Relocation 0x00000000
+// CHECK-NEXT:  (('r_offset', 0x00000005)
+// CHECK-NEXT:   ('r_sym', 0x00000006)
+// CHECK-NEXT:   ('r_type', 0x0000000b)
+// CHECK-NEXT:   ('r_addend', 0x00000001)

Modified: llvm/trunk/test/MC/ELF/empty.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/empty.s?rev=116823&r1=116822&r2=116823&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/empty.s (original)
+++ llvm/trunk/test/MC/ELF/empty.s Tue Oct 19 12:39:10 2010
@@ -3,68 +3,68 @@
 // Test that like gnu as we create text, data and bss by default. Also test
 // that shstrtab, symtab and strtab are listed in that order.
 
-// CHECK:      ('sh_name', 1) # '.text'
-// CHECK-NEXT: ('sh_type', 1)
-// CHECK-NEXT: ('sh_flags', 6)
-// CHECK-NEXT: ('sh_addr', 0)
-// CHECK-NEXT: ('sh_offset', 64)
-// CHECK-NEXT: ('sh_size', 0)
-// CHECK-NEXT: ('sh_link', 0)
-// CHECK-NEXT: ('sh_info', 0)
-// CHECK-NEXT: ('sh_addralign', 4)
-// CHECK-NEXT: ('sh_entsize', 0)
-
-// CHECK:      ('sh_name', 7) # '.data'
-// CHECK-NEXT: ('sh_type', 1)
-// CHECK-NEXT: ('sh_flags', 3)
-// CHECK-NEXT: ('sh_addr', 0)
-// CHECK-NEXT: ('sh_offset', 64)
-// CHECK-NEXT: ('sh_size', 0)
-// CHECK-NEXT: ('sh_link', 0)
-// CHECK-NEXT: ('sh_info', 0)
-// CHECK-NEXT: ('sh_addralign', 4)
-// CHECK-NEXT: ('sh_entsize', 0)
-
-// CHECK:      ('sh_name', 13) # '.bss'
-// CHECK-NEXT: ('sh_type', 8)
-// CHECK-NEXT: ('sh_flags', 3)
-// CHECK-NEXT: ('sh_addr', 0)
-// CHECK-NEXT: ('sh_offset', 64)
-// CHECK-NEXT: ('sh_size', 0)
-// CHECK-NEXT: ('sh_link', 0)
-// CHECK-NEXT: ('sh_info', 0)
-// CHECK-NEXT: ('sh_addralign', 4)
-// CHECK-NEXT: ('sh_entsize', 0)
-
-// CHECK:      ('sh_name', 18) # '.shstrtab'
-// CHECK-NEXT: ('sh_type', 3)
-// CHECK-NEXT:    ('sh_flags', 0)
-// CHECK-NEXT:    ('sh_addr', 0)
-// CHECK-NEXT:    ('sh_offset', 64)
-// CHECK-NEXT:    ('sh_size', 44)
-// CHECK-NEXT:    ('sh_link', 0)
-// CHECK-NEXT:    ('sh_info', 0)
-// CHECK-NEXT:    ('sh_addralign', 1)
-// CHECK-NEXT:    ('sh_entsize', 0)
-
-// CHECK: ('sh_name', 28) # '.symtab'
-// CHECK-NEXT:    ('sh_type', 2)
-// CHECK-NEXT:    ('sh_flags', 0)
-// CHECK-NEXT:    ('sh_addr', 0)
+// CHECK:      ('sh_name', 0x00000001) # '.text'
+// CHECK-NEXT: ('sh_type', 0x00000001)
+// CHECK-NEXT: ('sh_flags', 0x00000006)
+// CHECK-NEXT: ('sh_addr', 0x00000000)
+// CHECK-NEXT: ('sh_offset', 0x00000040)
+// CHECK-NEXT: ('sh_size', 0x00000000)
+// CHECK-NEXT: ('sh_link', 0x00000000)
+// CHECK-NEXT: ('sh_info', 0x00000000)
+// CHECK-NEXT: ('sh_addralign', 0x00000004)
+// CHECK-NEXT: ('sh_entsize', 0x00000000)
+
+// CHECK:      ('sh_name', 0x00000007) # '.data'
+// CHECK-NEXT: ('sh_type', 0x00000001)
+// CHECK-NEXT: ('sh_flags', 0x00000003)
+// CHECK-NEXT: ('sh_addr', 0x00000000)
+// CHECK-NEXT: ('sh_offset', 0x00000040)
+// CHECK-NEXT: ('sh_size', 0x00000000)
+// CHECK-NEXT: ('sh_link', 0x00000000)
+// CHECK-NEXT: ('sh_info', 0x00000000)
+// CHECK-NEXT: ('sh_addralign', 0x00000004)
+// CHECK-NEXT: ('sh_entsize', 0x00000000)
+
+// CHECK:      ('sh_name', 0x0000000d) # '.bss'
+// CHECK-NEXT: ('sh_type', 0x00000008)
+// CHECK-NEXT: ('sh_flags', 0x00000003)
+// CHECK-NEXT: ('sh_addr', 0x00000000)
+// CHECK-NEXT: ('sh_offset', 0x00000040)
+// CHECK-NEXT: ('sh_size', 0x00000000)
+// CHECK-NEXT: ('sh_link', 0x00000000)
+// CHECK-NEXT: ('sh_info', 0x00000000)
+// CHECK-NEXT: ('sh_addralign', 0x00000004)
+// CHECK-NEXT: ('sh_entsize', 0x00000000)
+
+// CHECK:      ('sh_name', 0x00000012) # '.shstrtab'
+// CHECK-NEXT: ('sh_type', 0x00000003)
+// CHECK-NEXT:    ('sh_flags', 0x00000000)
+// CHECK-NEXT:    ('sh_addr', 0x00000000)
+// CHECK-NEXT:    ('sh_offset', 0x00000040)
+// CHECK-NEXT:    ('sh_size', 0x0000002c)
+// CHECK-NEXT:    ('sh_link', 0x00000000)
+// CHECK-NEXT:    ('sh_info', 0x00000000)
+// CHECK-NEXT:    ('sh_addralign', 0x00000001)
+// CHECK-NEXT:    ('sh_entsize', 0x00000000)
+
+// CHECK: ('sh_name', 0x0000001c) # '.symtab'
+// CHECK-NEXT:    ('sh_type', 0x00000002)
+// CHECK-NEXT:    ('sh_flags', 0x00000000)
+// CHECK-NEXT:    ('sh_addr', 0x00000000)
 // CHECK-NEXT:    ('sh_offset',
-// CHECK-NEXT:    ('sh_size', 96)
-// CHECK-NEXT:    ('sh_link', 6)
-// CHECK-NEXT:    ('sh_info', 4)
-// CHECK-NEXT:    ('sh_addralign', 8)
-// CHECK-NEXT:    ('sh_entsize', 24)
-
-// CHECK: ('sh_name', 36) # '.strtab'
-// CHECK-NEXT:    ('sh_type', 3)
-// CHECK-NEXT:    ('sh_flags', 0)
-// CHECK-NEXT:    ('sh_addr', 0)
+// CHECK-NEXT:    ('sh_size', 0x00000060)
+// CHECK-NEXT:    ('sh_link', 0x00000006)
+// CHECK-NEXT:    ('sh_info', 0x00000004)
+// CHECK-NEXT:    ('sh_addralign', 0x00000008)
+// CHECK-NEXT:    ('sh_entsize', 0x00000018)
+
+// CHECK: ('sh_name', 0x00000024) # '.strtab'
+// CHECK-NEXT:    ('sh_type', 0x00000003)
+// CHECK-NEXT:    ('sh_flags', 0x00000000)
+// CHECK-NEXT:    ('sh_addr', 0x00000000)
 // CHECK-NEXT:    ('sh_offset',
-// CHECK-NEXT:    ('sh_size', 1)
-// CHECK-NEXT:    ('sh_link', 0)
-// CHECK-NEXT:    ('sh_info', 0)
-// CHECK-NEXT:    ('sh_addralign', 1)
-// CHECK-NEXT:    ('sh_entsize', 0)
+// CHECK-NEXT:    ('sh_size', 0x00000001)
+// CHECK-NEXT:    ('sh_link', 0x00000000)
+// CHECK-NEXT:    ('sh_info', 0x00000000)
+// CHECK-NEXT:    ('sh_addralign', 0x00000001)
+// CHECK-NEXT:    ('sh_entsize', 0x00000000)

Modified: llvm/trunk/test/MC/ELF/entsize.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/entsize.ll?rev=116823&r1=116822&r2=116823&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/entsize.ll (original)
+++ llvm/trunk/test/MC/ELF/entsize.ll Tue Oct 19 12:39:10 2010
@@ -20,25 +20,25 @@
 
 ;;;;;
 
-; 64: (('sh_name', 18) # '.rodata.str1.1'
-; 64-NEXT:   ('sh_type', 1)
-; 64-NEXT:   ('sh_flags', 50)
+; 64: (('sh_name', 0x00000012) # '.rodata.str1.1'
+; 64-NEXT:   ('sh_type', 0x00000001)
+; 64-NEXT:   ('sh_flags', 0x00000032)
 ; 64-NEXT:   ('sh_addr',
 ; 64-NEXT:   ('sh_offset',
-; 64-NEXT:   ('sh_size', 13)
+; 64-NEXT:   ('sh_size', 0x0000000d)
 ; 64-NEXT:   ('sh_link',
 ; 64-NEXT:   ('sh_info',
-; 64-NEXT:   ('sh_addralign', 1)
-; 64-NEXT:   ('sh_entsize', 1)
+; 64-NEXT:   ('sh_addralign', 0x00000001)
+; 64-NEXT:   ('sh_entsize', 0x00000001)
 
-; 64: (('sh_name', 33) # '.rodata.cst8'
-; 64-NEXT:   ('sh_type', 1)
-; 64-NEXT:   ('sh_flags', 18)
+; 64: (('sh_name', 0x00000021) # '.rodata.cst8'
+; 64-NEXT:   ('sh_type', 0x00000001)
+; 64-NEXT:   ('sh_flags', 0x00000012)
 ; 64-NEXT:   ('sh_addr',
 ; 64-NEXT:   ('sh_offset',
-; 64-NEXT:   ('sh_size', 16)
+; 64-NEXT:   ('sh_size', 0x00000010)
 ; 64-NEXT:   ('sh_link',
 ; 64-NEXT:   ('sh_info',
-; 64-NEXT:   ('sh_addralign', 8)
-; 64-NEXT:   ('sh_entsize', 8)
+; 64-NEXT:   ('sh_addralign', 0x00000008)
+; 64-NEXT:   ('sh_entsize', 0x00000008)
 

Modified: llvm/trunk/test/MC/ELF/entsize.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/entsize.s?rev=116823&r1=116822&r2=116823&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/entsize.s (original)
+++ llvm/trunk/test/MC/ELF/entsize.s Tue Oct 19 12:39:10 2010
@@ -32,38 +32,38 @@
     .quad 42
     .quad 42
 
-// CHECK: # Section 4
-// CHECK-NEXT:   ('sh_name', 18) # '.rodata.str1.1'
-// CHECK-NEXT:   ('sh_type', 1)
-// CHECK-NEXT:   ('sh_flags', 50)
+// CHECK: # Section 0x00000004
+// CHECK-NEXT:   ('sh_name', 0x00000012) # '.rodata.str1.1'
+// CHECK-NEXT:   ('sh_type', 0x00000001)
+// CHECK-NEXT:   ('sh_flags', 0x00000032)
 // CHECK-NEXT:   ('sh_addr',
 // CHECK-NEXT:   ('sh_offset',
-// CHECK-NEXT:   ('sh_size', 13)
+// CHECK-NEXT:   ('sh_size', 0x0000000d)
 // CHECK-NEXT:   ('sh_link',
 // CHECK-NEXT:   ('sh_info',
-// CHECK-NEXT:   ('sh_addralign', 1)
-// CHECK-NEXT:   ('sh_entsize', 1)
+// CHECK-NEXT:   ('sh_addralign', 0x00000001)
+// CHECK-NEXT:   ('sh_entsize', 0x00000001)
 
-// CHECK: # Section 5
-// CHECK-NEXT:   ('sh_name', 33) # '.rodata.str2.1'
-// CHECK-NEXT:   ('sh_type', 1)
-// CHECK-NEXT:   ('sh_flags', 50)
+// CHECK: # Section 0x00000005
+// CHECK-NEXT:   ('sh_name', 0x00000021) # '.rodata.str2.1'
+// CHECK-NEXT:   ('sh_type', 0x00000001)
+// CHECK-NEXT:   ('sh_flags', 0x00000032)
 // CHECK-NEXT:   ('sh_addr',
 // CHECK-NEXT:   ('sh_offset',
-// CHECK-NEXT:   ('sh_size', 16)
+// CHECK-NEXT:   ('sh_size', 0x00000010)
 // CHECK-NEXT:   ('sh_link',
 // CHECK-NEXT:   ('sh_info',
-// CHECK-NEXT:   ('sh_addralign', 1)
-// CHECK-NEXT:   ('sh_entsize', 2)
+// CHECK-NEXT:   ('sh_addralign', 0x00000001)
+// CHECK-NEXT:   ('sh_entsize', 0x00000002)
 
-// CHECK: # Section 6
-// CHECK-NEXT:   ('sh_name', 48) # '.rodata.cst8
-// CHECK-NEXT:   ('sh_type', 1)
-// CHECK-NEXT:   ('sh_flags', 18)
+// CHECK: # Section 0x00000006
+// CHECK-NEXT:   ('sh_name', 0x00000030) # '.rodata.cst8
+// CHECK-NEXT:   ('sh_type', 0x00000001)
+// CHECK-NEXT:   ('sh_flags', 0x00000012)
 // CHECK-NEXT:   ('sh_addr',
 // CHECK-NEXT:   ('sh_offset',
-// CHECK-NEXT:   ('sh_size', 16)
+// CHECK-NEXT:   ('sh_size', 0x00000010)
 // CHECK-NEXT:   ('sh_link',
 // CHECK-NEXT:   ('sh_info',
-// CHECK-NEXT:   ('sh_addralign', 1)
-// CHECK-NEXT:   ('sh_entsize', 8)
+// CHECK-NEXT:   ('sh_addralign', 0x00000001)
+// CHECK-NEXT:   ('sh_entsize', 0x00000008)

Modified: llvm/trunk/test/MC/ELF/file.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/file.s?rev=116823&r1=116822&r2=116823&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/file.s (original)
+++ llvm/trunk/test/MC/ELF/file.s Tue Oct 19 12:39:10 2010
@@ -4,20 +4,20 @@
 
 .file "foo"
 foa:
-// CHECK:    # Symbol 1
-// CHECK-NEXT:    (('st_name', 1) # 'foo'
-// CHECK-NEXT:     ('st_bind', 0)
-// CHECK-NEXT:     ('st_type', 4)
-// CHECK-NEXT:     ('st_other', 0)
-// CHECK-NEXT:     ('st_shndx', 65521)
-// CHECK-NEXT:     ('st_value', 0)
-// CHECK-NEXT:     ('st_size', 0)
+// CHECK:    # Symbol 0x00000001
+// CHECK-NEXT:    (('st_name', 0x00000001) # 'foo'
+// CHECK-NEXT:     ('st_bind', 0x00000000)
+// CHECK-NEXT:     ('st_type', 0x00000004)
+// CHECK-NEXT:     ('st_other', 0x00000000)
+// CHECK-NEXT:     ('st_shndx', 0x0000fff1)
+// CHECK-NEXT:     ('st_value', 0x00000000)
+// CHECK-NEXT:     ('st_size', 0x00000000)
 // CHECK-NEXT:    ),
-// CHECK-NEXT:    # Symbol 2
-// CHECK-NEXT:    (('st_name', 5) # 'foa'
-// CHECK-NEXT:     ('st_bind', 0)
-// CHECK-NEXT:     ('st_type', 0)
-// CHECK-NEXT:     ('st_other', 0)
-// CHECK-NEXT:     ('st_shndx', 1)
-// CHECK-NEXT:     ('st_value', 0)
-// CHECK-NEXT:     ('st_size', 0)
+// CHECK-NEXT:    # Symbol 0x00000002
+// CHECK-NEXT:    (('st_name', 0x00000005) # 'foa'
+// CHECK-NEXT:     ('st_bind', 0x00000000)
+// CHECK-NEXT:     ('st_type', 0x00000000)
+// CHECK-NEXT:     ('st_other', 0x00000000)
+// CHECK-NEXT:     ('st_shndx', 0x00000001)
+// CHECK-NEXT:     ('st_value', 0x00000000)
+// CHECK-NEXT:     ('st_size', 0x00000000)

Modified: llvm/trunk/test/MC/ELF/got.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/got.s?rev=116823&r1=116822&r2=116823&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/got.s (original)
+++ llvm/trunk/test/MC/ELF/got.s Tue Oct 19 12:39:10 2010
@@ -6,20 +6,20 @@
         movl	foo at GOT, %eax
         movl	foo at GOTPCREL(%rip), %eax
 
-// CHECK:     (('st_name', 5) # '_GLOBAL_OFFSET_TABLE_'
-// CHECK-NEXT: ('st_bind', 1)
+// CHECK:     (('st_name', 0x00000005) # '_GLOBAL_OFFSET_TABLE_'
+// CHECK-NEXT: ('st_bind', 0x00000001)
 
 // CHECK:      ('_relocations', [
-// CHECK-NEXT:   # Relocation 0
+// CHECK-NEXT:   # Relocation 0x00000000
 // CHECK-NEXT:    (('r_offset',
 // CHECK-NEXT:     ('r_sym',
-// CHECK-NEXT:     ('r_type', 3)
+// CHECK-NEXT:     ('r_type', 0x00000003)
 // CHECK-NEXT:     ('r_addend',
 // CHECK-NEXT:    ),
-// CHECK-NEXT:   # Relocation 1
+// CHECK-NEXT:   # Relocation 0x00000001
 // CHECK-NEXT:    (('r_offset',
 // CHECK-NEXT:     ('r_sym',
-// CHECK-NEXT:     ('r_type', 9)
+// CHECK-NEXT:     ('r_type', 0x00000009)
 // CHECK-NEXT:     ('r_addend',
 // CHECK-NEXT:    ),
 // CHECK-NEXT:   ])

Modified: llvm/trunk/test/MC/ELF/local-reloc.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/local-reloc.s?rev=116823&r1=116822&r2=116823&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/local-reloc.s (original)
+++ llvm/trunk/test/MC/ELF/local-reloc.s Tue Oct 19 12:39:10 2010
@@ -7,24 +7,24 @@
 foo:
 
 // Section number 1 is .text
-// CHECK:        # Section 1
-// CHECK-next:  (('sh_name', 1) # '.text'
+// CHECK:        # Section 0x00000001
+// CHECK-next:  (('sh_name', 0x00000001) # '.text'
 
 // Symbol number 2 is section number 1
-// CHECK:    # Symbol 2
-// CHECK-NEXT:    (('st_name', 0) # ''
-// CHECK-NEXT:     ('st_bind', 0)
-// CHECK-NEXT:     ('st_type', 3)
-// CHECK-NEXT:     ('st_other', 0)
-// CHECK-NEXT:     ('st_shndx', 1)
-// CHECK-NEXT:     ('st_value', 0)
-// CHECK-NEXT:     ('st_size', 0)
+// CHECK:    # Symbol 0x00000002
+// CHECK-NEXT:    (('st_name', 0x00000000) # ''
+// CHECK-NEXT:     ('st_bind', 0x00000000)
+// CHECK-NEXT:     ('st_type', 0x00000003)
+// CHECK-NEXT:     ('st_other', 0x00000000)
+// CHECK-NEXT:     ('st_shndx', 0x00000001)
+// CHECK-NEXT:     ('st_value', 0x00000000)
+// CHECK-NEXT:     ('st_size', 0x00000000)
 
 // Relocation refers to symbol number 2
 // CHECK:      ('_relocations', [
-// CHECK-NEXT:  # Relocation 0
+// CHECK-NEXT:  # Relocation 0x00000000
 // CHECK-NEXT:   (('r_offset',
-// CHECK-NEXT:    ('r_sym', 2)
+// CHECK-NEXT:    ('r_sym', 0x00000002)
 // CHECK-NEXT:    ('r_type',
 // CHECK-NEXT:    ('r_addend',
 // CHECK-NEXT:   ),

Modified: llvm/trunk/test/MC/ELF/merge.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/merge.s?rev=116823&r1=116822&r2=116823&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/merge.s (original)
+++ llvm/trunk/test/MC/ELF/merge.s Tue Oct 19 12:39:10 2010
@@ -23,75 +23,75 @@
 foo:
 
 // Section 4 is "sec1"
-// CHECK: # Section 4
-// CHECK-NEXT:  (('sh_name', 18) # '.sec1'
+// CHECK: # Section 0x00000004
+// CHECK-NEXT:  (('sh_name', 0x00000012) # '.sec1'
 
 // Symbol number 1 is .Lfoo
-// CHECK:      # Symbol 1
-// CHECK-NEXT: (('st_name', 1) # '.Lfoo'
+// CHECK:      # Symbol 0x00000001
+// CHECK-NEXT: (('st_name', 0x00000001) # '.Lfoo'
 
 // Symbol number 2 is foo
-// CHECK:      # Symbol 2
-// CHECK-NEXT: (('st_name', 7) # 'foo'
+// CHECK:      # Symbol 0x00000002
+// CHECK-NEXT: (('st_name', 0x00000007) # 'foo'
 
 // Symbol number 6 is section 4
-// CHECK:        # Symbol 6
-// CHECK-NEXT:    (('st_name', 0) # ''
-// CHECK-NEXT:     ('st_bind', 0)
-// CHECK-NEXT:     ('st_type', 3)
-// CHECK-NEXT:     ('st_other', 0)
-// CHECK-NEXT:     ('st_shndx', 4)
+// CHECK:        # Symbol 0x00000006
+// CHECK-NEXT:    (('st_name', 0x00000000) # ''
+// CHECK-NEXT:     ('st_bind', 0x00000000)
+// CHECK-NEXT:     ('st_type', 0x00000003)
+// CHECK-NEXT:     ('st_other', 0x00000000)
+// CHECK-NEXT:     ('st_shndx', 0x00000004)
 
 // Symbol number 8 is zed
-// CHECK:        # Symbol 8
-// CHECK-NEXT:    (('st_name', 11) # 'zed'
+// CHECK:        # Symbol 0x00000008
+// CHECK-NEXT:    (('st_name', 0x0000000b) # 'zed'
 
 // Relocation 0 refers to symbol 1
 // CHECK:       ('_relocations', [
 // CHECK-NEXT:   # Relocation 0
 // CHECK-NEXT:   (('r_offset',
-// CHECK-NEXT:    ('r_sym', 1)
-// CHECK-NEXT:    ('r_type', 2
+// CHECK-NEXT:    ('r_sym', 0x00000001)
+// CHECK-NEXT:    ('r_type', 0x00000002
 // CHECK-NEXT:    ('r_addend',
 // CHECK-NEXT:   ),
 
 // Relocation 1 refers to symbol 6
-// CHECK-NEXT:  # Relocation 1
+// CHECK-NEXT:  # Relocation 0x00000001
 // CHECK-NEXT: (('r_offset',
-// CHECK-NEXT:  ('r_sym', 6)
-// CHECK-NEXT:  ('r_type', 10)
+// CHECK-NEXT:  ('r_sym', 0x00000006)
+// CHECK-NEXT:  ('r_type', 0x0000000a)
 // CHECK-NEXT:  ('r_addend',
 // CHECK-NEXT: ),
 
 // Relocation 2 refers to symbol 1
-// CHECK-NEXT:   # Relocation 2
+// CHECK-NEXT:   # Relocation 0x00000002
 // CHECK-NEXT:   (('r_offset',
-// CHECK-NEXT:    ('r_sym', 1)
-// CHECK-NEXT:    ('r_type', 10
+// CHECK-NEXT:    ('r_sym', 0x00000001)
+// CHECK-NEXT:    ('r_type', 0x0000000a
 // CHECK-NEXT:    ('r_addend',
 // CHECK-NEXT:   ),
 
 // Relocation 3 refers to symbol 2
-// CHECK-NEXT:   # Relocation 3
+// CHECK-NEXT:   # Relocation 0x00000003
 // CHECK-NEXT:   (('r_offset',
-// CHECK-NEXT:    ('r_sym', 2)
-// CHECK-NEXT:    ('r_type', 4
+// CHECK-NEXT:    ('r_sym', 0x00000002)
+// CHECK-NEXT:    ('r_type', 0x00000004
 // CHECK-NEXT:    ('r_addend',
 // CHECK-NEXT:   ),
 
 // Relocation 4 refers to symbol 2
-// CHECK-NEXT:   # Relocation 4
+// CHECK-NEXT:   # Relocation 0x00000004
 // CHECK-NEXT:   (('r_offset',
-// CHECK-NEXT:    ('r_sym', 2)
-// CHECK-NEXT:    ('r_type', 9
+// CHECK-NEXT:    ('r_sym', 0x00000002)
+// CHECK-NEXT:    ('r_type', 0x00000009
 // CHECK-NEXT:    ('r_addend',
 // CHECK-NEXT:   ),
 
 // Relocation 5 refers to symbol 8
-// CHECK-NEXT:   # Relocation 5
-// CHECK-NEXT:   (('r_offset', 35)
-// CHECK-NEXT:    ('r_sym', 8)
-// CHECK-NEXT:    ('r_type', 11)
-// CHECK-NEXT:    ('r_addend', 0)
+// CHECK-NEXT:   # Relocation 0x00000005
+// CHECK-NEXT:   (('r_offset', 0x00000023)
+// CHECK-NEXT:    ('r_sym', 0x00000008)
+// CHECK-NEXT:    ('r_type', 0x0000000b)
+// CHECK-NEXT:    ('r_addend', 0x00000000)
 // CHECK-NEXT:   ),
 // CHECK-NEXT:  ])

Modified: llvm/trunk/test/MC/ELF/norelocation.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/norelocation.s?rev=116823&r1=116822&r2=116823&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/norelocation.s (original)
+++ llvm/trunk/test/MC/ELF/norelocation.s Tue Oct 19 12:39:10 2010
@@ -3,16 +3,16 @@
         call bar
 bar:
 
-// CHECK: ('sh_name', 1) # '.text'
-// CHECK-NEXT: ('sh_type', 1)
-// CHECK-NEXT: ('sh_flags', 6)
-// CHECK-NEXT: ('sh_addr', 0)
-// CHECK-NEXT: ('sh_offset', 64)
-// CHECK-NEXT: ('sh_size', 5)
-// CHECK-NEXT: ('sh_link', 0)
-// CHECK-NEXT: ('sh_info', 0)
-// CHECK-NEXT: ('sh_addralign', 4)
-// CHECK-NEXT: ('sh_entsize', 0)
+// CHECK: ('sh_name', 0x00000001) # '.text'
+// CHECK-NEXT: ('sh_type', 0x00000001)
+// CHECK-NEXT: ('sh_flags', 0x00000006)
+// CHECK-NEXT: ('sh_addr', 0x00000000)
+// CHECK-NEXT: ('sh_offset', 0x00000040)
+// CHECK-NEXT: ('sh_size', 0x00000005)
+// CHECK-NEXT: ('sh_link', 0x00000000)
+// CHECK-NEXT: ('sh_info', 0x00000000)
+// CHECK-NEXT: ('sh_addralign', 0x00000004)
+// CHECK-NEXT: ('sh_entsize', 0x00000000)
 // CHECK-NEXT: ('_section_data', 'e8000000 00')
 // CHECK-NOT: .rela.text
 // CHECK: shstrtab

Modified: llvm/trunk/test/MC/ELF/pic-diff.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/pic-diff.s?rev=116823&r1=116822&r2=116823&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/pic-diff.s (original)
+++ llvm/trunk/test/MC/ELF/pic-diff.s Tue Oct 19 12:39:10 2010
@@ -1,21 +1,21 @@
 // RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump  | FileCheck %s
 
-// CHECK:         # Symbol 5
-// CHECK-NEXT:    (('st_name', 5) # 'baz'
-// CHECK-NEXT:     ('st_bind', 1)
-// CHECK-NEXT:     ('st_type', 0)
-// CHECK-NEXT:     ('st_other', 0)
-// CHECK-NEXT:     ('st_shndx', 0)
-// CHECK-NEXT:     ('st_value', 0)
-// CHECK-NEXT:     ('st_size', 0)
+// CHECK:         # Symbol 0x00000005
+// CHECK-NEXT:    (('st_name', 0x00000005) # 'baz'
+// CHECK-NEXT:     ('st_bind', 0x00000001)
+// CHECK-NEXT:     ('st_type', 0x00000000)
+// CHECK-NEXT:     ('st_other', 0x00000000)
+// CHECK-NEXT:     ('st_shndx', 0x00000000)
+// CHECK-NEXT:     ('st_value', 0x00000000)
+// CHECK-NEXT:     ('st_size', 0x00000000)
 // CHECK-NEXT:    ),
 
 // CHECK:       ('_relocations', [
-// CHECK-NEXT:    # Relocation 0
-// CHECK-NEXT:    (('r_offset', 12)
-// CHECK-NEXT:     ('r_sym', 5)
-// CHECK-NEXT:     ('r_type', 2)
-// CHECK-NEXT:     ('r_addend', 8)
+// CHECK-NEXT:    # Relocation 0x00000000
+// CHECK-NEXT:    (('r_offset', 0x0000000c)
+// CHECK-NEXT:     ('r_sym', 0x00000005)
+// CHECK-NEXT:     ('r_type', 0x00000002)
+// CHECK-NEXT:     ('r_addend', 0x00000008)
 // CHECK-NEXT:    ),
 // CHECK-NEXT:   ])
 

Modified: llvm/trunk/test/MC/ELF/plt.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/plt.s?rev=116823&r1=116822&r2=116823&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/plt.s (original)
+++ llvm/trunk/test/MC/ELF/plt.s Tue Oct 19 12:39:10 2010
@@ -5,10 +5,10 @@
 	jmp	foo at PLT
 
 // CHECK:      ('_relocations', [
-// CHECK-NEXT:   # Relocation 0
+// CHECK-NEXT:   # Relocation 0x00000000
 // CHECK-NEXT:    (('r_offset',
 // CHECK-NEXT:     ('r_sym',
-// CHECK-NEXT:     ('r_type', 4)
+// CHECK-NEXT:     ('r_type', 0x00000004)
 // CHECK-NEXT:     ('r_addend',
 // CHECK-NEXT:    ),
 // CHECK-NEXT:   ])

Modified: llvm/trunk/test/MC/ELF/relax.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/relax.s?rev=116823&r1=116822&r2=116823&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/relax.s (original)
+++ llvm/trunk/test/MC/ELF/relax.s Tue Oct 19 12:39:10 2010
@@ -12,27 +12,27 @@
         jmp bar
         jmp foo
 
-// CHECK: ('sh_name', 1) # '.text'
-// CHECK-NEXT: ('sh_type', 1)
-// CHECK-NEXT: ('sh_flags', 6)
-// CHECK-NEXT: ('sh_addr', 0)
-// CHECK-NEXT: ('sh_offset', 64)
-// CHECK-NEXT: ('sh_size', 7)
-// CHECK-NEXT: ('sh_link', 0)
-// CHECK-NEXT: ('sh_info', 0)
-// CHECK-NEXT: ('sh_addralign', 4)
-// CHECK-NEXT: ('sh_entsize', 0)
+// CHECK: ('sh_name', 0x00000001) # '.text'
+// CHECK-NEXT: ('sh_type', 0x00000001)
+// CHECK-NEXT: ('sh_flags', 0x00000006)
+// CHECK-NEXT: ('sh_addr', 0x00000000)
+// CHECK-NEXT: ('sh_offset', 0x00000040)
+// CHECK-NEXT: ('sh_size', 0x00000007)
+// CHECK-NEXT: ('sh_link', 0x00000000)
+// CHECK-NEXT: ('sh_info', 0x00000000)
+// CHECK-NEXT: ('sh_addralign', 0x00000004)
+// CHECK-NEXT: ('sh_entsize', 0x00000000)
 // CHECK-NEXT: ('_section_data', 'ebfee900 000000')
 
-// CHECK:       # Symbol 5
-// CHECK-NEXT: (('st_name', 5) # 'foo'
+// CHECK:       # Symbol 0x00000005
+// CHECK-NEXT: (('st_name', 0x00000005) # 'foo'
 
 // CHECK: .rela.text
 // CHECK: ('_relocations', [
-// CHECK-NEXT: Relocation 0
-// CHECK-NEXT:  (('r_offset', 3)
-// CHECK-NEXT:   ('r_sym', 5)
-// CHECK-NEXT:   ('r_type', 2)
-// CHECK-NEXT:   ('r_addend', -4)
+// CHECK-NEXT: Relocation 0x00000000
+// CHECK-NEXT:  (('r_offset', 0x00000003)
+// CHECK-NEXT:   ('r_sym', 0x00000005)
+// CHECK-NEXT:   ('r_type', 0x00000002)
+// CHECK-NEXT:   ('r_addend', 0xfffffffc)
 // CHECK-NEXT:  ),
 // CHECK-NEXT: ])

Modified: llvm/trunk/test/MC/ELF/relocation-386.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/relocation-386.s?rev=116823&r1=116822&r2=116823&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/relocation-386.s (original)
+++ llvm/trunk/test/MC/ELF/relocation-386.s Tue Oct 19 12:39:10 2010
@@ -4,50 +4,50 @@
 // to .Lfoo uses the symbol and not the section.
 
 // Section 3 is bss
-// CHECK:      # Section 3
-// CHECK-NEXT: (('sh_name', 13) # '.bss'
+// CHECK:      # Section 0x00000003
+// CHECK-NEXT: (('sh_name', 0x0000000d) # '.bss'
 
-// CHECK:      # Symbol 1
-// CHECK-NEXT: (('st_name', 5) # '.Lfoo'
+// CHECK:      # Symbol 0x00000001
+// CHECK-NEXT: (('st_name', 0x00000005) # '.Lfoo'
 
 // Symbol 6 is section 3
-// CHECK:      # Symbol 6
-// CHECK-NEXT: (('st_name', 0) # ''
-// CHECK-NEXT:  ('st_value', 0)
-// CHECK-NEXT:  ('st_size', 0)
-// CHECK-NEXT:  ('st_bind', 0)
-// CHECK-NEXT:  ('st_type', 3)
-// CHECK-NEXT:  ('st_other', 0)
-// CHECK-NEXT:  ('st_shndx', 3)
-
-// CHECK:      # Relocation 0
-// CHECK-NEXT: (('r_offset', 2)
-// CHECK-NEXT:  ('r_sym', 1)
-// CHECK-NEXT:  ('r_type', 9)
+// CHECK:      # Symbol 0x00000006
+// CHECK-NEXT: (('st_name', 0x00000000) # ''
+// CHECK-NEXT:  ('st_value', 0x00000000)
+// CHECK-NEXT:  ('st_size', 0x00000000)
+// CHECK-NEXT:  ('st_bind', 0x00000000)
+// CHECK-NEXT:  ('st_type', 0x00000003)
+// CHECK-NEXT:  ('st_other', 0x00000000)
+// CHECK-NEXT:  ('st_shndx', 0x00000003)
+
+// CHECK:      # Relocation 0x00000000
+// CHECK-NEXT: (('r_offset', 0x00000002)
+// CHECK-NEXT:  ('r_sym', 0x00000001)
+// CHECK-NEXT:  ('r_type', 0x00000009)
 // CHECK-NEXT: ),
-// CHECK-NEXT:  # Relocation 1
+// CHECK-NEXT:  # Relocation 0x00000001
 // CHECK-NEXT: (('r_offset',
 // CHECK-NEXT:  ('r_sym',
-// CHECK-NEXT:  ('r_type', 4)
+// CHECK-NEXT:  ('r_type', 0x00000004)
 // CHECK-NEXT: ),
-// CHECK-NEXT:  # Relocation 2
+// CHECK-NEXT:  # Relocation 0x00000002
 // CHECK-NEXT: (('r_offset',
 // CHECK-NEXT:  ('r_sym',
-// CHECK-NEXT:  ('r_type', 10)
+// CHECK-NEXT:  ('r_type', 0x0000000a)
 // CHECK-NEXT: ),
 
 // Relocation 3 (bar3 at GOTOFF) is done with symbol 6 (bss)
-// CHECK-NEXT:  # Relocation 3
+// CHECK-NEXT:  # Relocation 0x00000003
 // CHECK-NEXT: (('r_offset',
-// CHECK-NEXT:  ('r_sym', 6
+// CHECK-NEXT:  ('r_sym', 0x00000006
 // CHECK-NEXT:  ('r_type',
 // CHECK-NEXT: ),
 
 // Relocation 4 (bar2 at GOT) is of type R_386_GOT32
-// CHECK-NEXT:  # Relocation 4
+// CHECK-NEXT:  # Relocation 0x00000004
 // CHECK-NEXT: (('r_offset',
 // CHECK-NEXT:  ('r_sym',
-// CHECK-NEXT:  ('r_type', 3
+// CHECK-NEXT:  ('r_type', 0x00000003
 // CHECK-NEXT: ),
 
         .text

Modified: llvm/trunk/test/MC/ELF/relocation.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/relocation.s?rev=116823&r1=116822&r2=116823&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/relocation.s (original)
+++ llvm/trunk/test/MC/ELF/relocation.s Tue Oct 19 12:39:10 2010
@@ -10,48 +10,48 @@
         movq	bar, %rdx         // R_X86_64_32S
 .long bar                         // R_X86_64_32
 
-// CHECK:  # Section 1
-// CHECK: (('sh_name', 1) # '.text'
+// CHECK:  # Section 0x00000001
+// CHECK: (('sh_name', 0x00000001) # '.text'
 
-// CHECK:   # Symbol 2
-// CHECK: (('st_name', 0) # ''
-// CHECK:  ('st_bind', 0)
-// CHECK   ('st_type', 3)
-// CHECK:  ('st_other', 0)
-// CHECK:  ('st_shndx', 1)
+// CHECK:   # Symbol 0x00000002
+// CHECK: (('st_name', 0x00000000) # ''
+// CHECK:  ('st_bind', 0x00000000)
+// CHECK   ('st_type', 0x00000003)
+// CHECK:  ('st_other', 0x00000000)
+// CHECK:  ('st_shndx', 0x00000001)
 
-// CHECK: # Relocation 0
-// CHECK-NEXT:  (('r_offset', 1)
-// CHECK-NEXT:   ('r_sym', 2)
-// CHECK-NEXT:   ('r_type', 10)
+// CHECK: # Relocation 0x00000000
+// CHECK-NEXT:  (('r_offset', 0x00000001)
+// CHECK-NEXT:   ('r_sym', 0x00000002)
+// CHECK-NEXT:   ('r_type', 0x0000000a)
 // CHECK-NEXT:   ('r_addend',
 
-// CHECK: # Relocation 1
-// CHECK-NEXT:  (('r_offset', 8)
-// CHECK-NEXT:   ('r_sym', 2)
-// CHECK-NEXT:   ('r_type', 11)
+// CHECK: # Relocation 0x00000001
+// CHECK-NEXT:  (('r_offset', 0x00000008)
+// CHECK-NEXT:   ('r_sym', 0x00000002)
+// CHECK-NEXT:   ('r_type', 0x0000000b)
 // CHECK-NEXT:   ('r_addend',
 
-// CHECK: # Relocation 2
-// CHECK-NEXT:  (('r_offset', 19)
-// CHECK-NEXT:   ('r_sym', 2)
-// CHECK-NEXT:   ('r_type', 11)
+// CHECK: # Relocation 0x00000002
+// CHECK-NEXT:  (('r_offset', 0x00000013)
+// CHECK-NEXT:   ('r_sym', 0x00000002)
+// CHECK-NEXT:   ('r_type', 0x0000000b)
 // CHECK-NEXT:   ('r_addend',
 
-// CHECK: # Relocation 3
-// CHECK-NEXT:  (('r_offset', 26)
-// CHECK-NEXT:   ('r_sym', 2)
-// CHECK-NEXT:   ('r_type', 11)
+// CHECK: # Relocation 0x00000003
+// CHECK-NEXT:  (('r_offset', 0x0000001a)
+// CHECK-NEXT:   ('r_sym', 0x00000002)
+// CHECK-NEXT:   ('r_type', 0x0000000b)
 // CHECK-NEXT:   ('r_addend',
 
-// CHECK: # Relocation 4
-// CHECK-NEXT:  (('r_offset', 34)
-// CHECK-NEXT:   ('r_sym', 2)
-// CHECK-NEXT:   ('r_type', 11)
+// CHECK: # Relocation 0x00000004
+// CHECK-NEXT:  (('r_offset', 0x00000022)
+// CHECK-NEXT:   ('r_sym', 0x00000002)
+// CHECK-NEXT:   ('r_type', 0x0000000b)
 // CHECK-NEXT:   ('r_addend',
 
-// CHECK: # Relocation 5
-// CHECK-NEXT:  (('r_offset', 38)
-// CHECK-NEXT:   ('r_sym', 2)
-// CHECK-NEXT:   ('r_type', 10)
+// CHECK: # Relocation 0x00000005
+// CHECK-NEXT:  (('r_offset', 0x00000026)
+// CHECK-NEXT:   ('r_sym', 0x00000002)
+// CHECK-NEXT:   ('r_type', 0x0000000a)
 // CHECK-NEXT:   ('r_addend',

Modified: llvm/trunk/test/MC/ELF/section.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/section.s?rev=116823&r1=116822&r2=116823&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/section.s (original)
+++ llvm/trunk/test/MC/ELF/section.s Tue Oct 19 12:39:10 2010
@@ -6,6 +6,6 @@
 .section	.note.GNU-,"", at progbits
 .section	-.note.GNU,"", at progbits
 
-// CHECK: ('sh_name', 18) # '.note.GNU-stack'
-// CHECK: ('sh_name', 34) # '.note.GNU-'
-// CHECK: ('sh_name', 45) # '-.note.GNU'
+// CHECK: ('sh_name', 0x00000012) # '.note.GNU-stack'
+// CHECK: ('sh_name', 0x00000022) # '.note.GNU-'
+// CHECK: ('sh_name', 0x0000002d) # '-.note.GNU'

Modified: llvm/trunk/test/MC/ELF/size.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/size.s?rev=116823&r1=116822&r2=116823&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/size.s (original)
+++ llvm/trunk/test/MC/ELF/size.s Tue Oct 19 12:39:10 2010
@@ -2,8 +2,8 @@
 
 // Mostly a test that this doesn't crash anymore.
 
-// CHECK:        # Symbol 4
-// CHECK-NEXT:    (('st_name', 1) # 'foo'
-// CHECK-NEXT:     ('st_bind', 1)
+// CHECK:        # Symbol 0x00000004
+// CHECK-NEXT:    (('st_name', 0x00000001) # 'foo'
+// CHECK-NEXT:     ('st_bind', 0x00000001)
 
 	.size	foo, .Lbar-foo

Modified: llvm/trunk/test/MC/ELF/sleb.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/sleb.s?rev=116823&r1=116822&r2=116823&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/sleb.s (original)
+++ llvm/trunk/test/MC/ELF/sleb.s Tue Oct 19 12:39:10 2010
@@ -19,9 +19,9 @@
 
 	.sleb128        8193
 
-// ELF_32: ('sh_name', 1) # '.text'
+// ELF_32: ('sh_name', 0x00000001) # '.text'
 // ELF_32: ('_section_data', '00017f3f 40c000bf 7fff3f80 4081c000')
-// ELF_64: ('sh_name', 1) # '.text'
+// ELF_64: ('sh_name', 0x00000001) # '.text'
 // ELF_64: ('_section_data', '00017f3f 40c000bf 7fff3f80 4081c000')
 // MACHO_32: ('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
 // MACHO_32: ('_section_data', '00017f3f 40c000bf 7fff3f80 4081c000')

Modified: llvm/trunk/test/MC/ELF/uleb.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/uleb.s?rev=116823&r1=116822&r2=116823&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/uleb.s (original)
+++ llvm/trunk/test/MC/ELF/uleb.s Tue Oct 19 12:39:10 2010
@@ -12,9 +12,9 @@
 	.uleb128	16383
 	.uleb128	16384
 
-// ELF_32: ('sh_name', 1) # '.text'
+// ELF_32: ('sh_name', 0x00000001) # '.text'
 // ELF_32: ('_section_data', '00017f80 01ff7f80 8001')
-// ELF_64: ('sh_name', 1) # '.text'
+// ELF_64: ('sh_name', 0x00000001) # '.text'
 // ELF_64: ('_section_data', '00017f80 01ff7f80 8001')
 // MACHO_32: ('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00')
 // MACHO_32: ('_section_data', '00017f80 01ff7f80 8001')

Modified: llvm/trunk/test/MC/ELF/undef.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/undef.s?rev=116823&r1=116822&r2=116823&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/undef.s (original)
+++ llvm/trunk/test/MC/ELF/undef.s Tue Oct 19 12:39:10 2010
@@ -19,27 +19,27 @@
         movsd   .Lsym8(%rip), %xmm1
 
 // CHECK:      ('_symbols', [
-// CHECK-NEXT:  # Symbol 0
-// CHECK-NEXT:  (('st_name', 0) # ''
-// CHECK:       # Symbol 1
-// CHECK-NEXT:  (('st_name', 13) # '.Lsym8'
-// CHECK:       # Symbol 2
-// CHECK-NEXT:  (('st_name', 0) # ''
-// CHECK:       # Symbol 3
-// CHECK-NEXT:  (('st_name', 0) # ''
-// CHECK:       # Symbol 4
-// CHECK-NEXT:  (('st_name', 0) # ''
-// CHECK:       # Symbol 5
-// CHECK-NEXT:  (('st_name', 0) # ''
-// CHECK:       # Symbol 6
-// CHECK-NEXT:  (('st_name', 1) # '.Lsym1'
-// CHECK:       # Symbol 7
-// CHECK-NEXT:  (('st_name', 8) # 'sym6'
-// CHECK-NEXT:   ('st_bind', 1)
-// CHECK-NEXT:   ('st_type', 1)
-// CHECK-NEXT:   ('st_other', 0)
-// CHECK-NEXT:   ('st_shndx', 0)
-// CHECK-NEXT:   ('st_value', 0)
-// CHECK-NEXT:   ('st_size', 0)
+// CHECK-NEXT:  # Symbol 0x00000000
+// CHECK-NEXT:  (('st_name', 0x00000000) # ''
+// CHECK:       # Symbol 0x00000001
+// CHECK-NEXT:  (('st_name', 0x0000000d) # '.Lsym8'
+// CHECK:       # Symbol 0x00000002
+// CHECK-NEXT:  (('st_name', 0x00000000) # ''
+// CHECK:       # Symbol 0x00000003
+// CHECK-NEXT:  (('st_name', 0x00000000) # ''
+// CHECK:       # Symbol 0x00000004
+// CHECK-NEXT:  (('st_name', 0x00000000) # ''
+// CHECK:       # Symbol 0x00000005
+// CHECK-NEXT:  (('st_name', 0x00000000) # ''
+// CHECK:       # Symbol 0x00000006
+// CHECK-NEXT:  (('st_name', 0x00000001) # '.Lsym1'
+// CHECK:       # Symbol 0x00000007
+// CHECK-NEXT:  (('st_name', 0x00000008) # 'sym6'
+// CHECK-NEXT:   ('st_bind', 0x00000001)
+// CHECK-NEXT:   ('st_type', 0x00000001)
+// CHECK-NEXT:   ('st_other', 0x00000000)
+// CHECK-NEXT:   ('st_shndx', 0x00000000)
+// CHECK-NEXT:   ('st_value', 0x00000000)
+// CHECK-NEXT:   ('st_size', 0x00000000)
 // CHECK-NEXT:   ),
 // CHECK-NEXT:  ])

Modified: llvm/trunk/test/MC/ELF/undef2.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/undef2.s?rev=116823&r1=116822&r2=116823&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/undef2.s (original)
+++ llvm/trunk/test/MC/ELF/undef2.s Tue Oct 19 12:39:10 2010
@@ -5,6 +5,6 @@
         je	.Lfoo
 
 // CHECK: ('_symbols', [
-// CHECK:      (('st_name', 1) # '.Lfoo'
-// CHECK-NEXT:  ('st_bind', 1)
-// CHECK: (('sh_name', 36) # '.strtab'
+// CHECK:      (('st_name', 0x00000001) # '.Lfoo'
+// CHECK-NEXT:  ('st_bind', 0x00000001)
+// CHECK: (('sh_name', 0x00000024) # '.strtab'

Modified: llvm/trunk/test/MC/ELF/weak.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/weak.s?rev=116823&r1=116822&r2=116823&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/weak.s (original)
+++ llvm/trunk/test/MC/ELF/weak.s Tue Oct 19 12:39:10 2010
@@ -9,22 +9,22 @@
         .weak bar
 bar:
 
-//CHECK:        # Symbol 4
-//CHECK-NEXT:   (('st_name', 5) # 'bar'
-//CHECK-NEXT:    ('st_bind', 2)
-//CHECK-NEXT:    ('st_type', 0)
-//CHECK-NEXT:    ('st_other', 0)
-//CHECK-NEXT:    ('st_shndx', 1)
-//CHECK-NEXT:    ('st_value', 0)
-//CHECK-NEXT:    ('st_size', 0)
+//CHECK:        # Symbol 0x00000004
+//CHECK-NEXT:   (('st_name', 0x00000005) # 'bar'
+//CHECK-NEXT:    ('st_bind', 0x00000002)
+//CHECK-NEXT:    ('st_type', 0x00000000)
+//CHECK-NEXT:    ('st_other', 0x00000000)
+//CHECK-NEXT:    ('st_shndx', 0x00000001)
+//CHECK-NEXT:    ('st_value', 0x00000000)
+//CHECK-NEXT:    ('st_size', 0x00000000)
 //CHECK-NEXT:   ),
-//CHECK-NEXT:   # Symbol 5
-//CHECK:       (('st_name', 1) # 'foo'
-//CHECK-NEXT:   ('st_bind', 2)
-//CHECK-NEXT:   ('st_type', 0)
-//CHECK-NEXT:   ('st_other', 0)
-//CHECK-NEXT:   ('st_shndx', 0)
-//CHECK-NEXT:   ('st_value', 0)
-//CHECK-NEXT:   ('st_size', 0)
+//CHECK-NEXT:   # Symbol 0x00000005
+//CHECK:       (('st_name', 0x00000001) # 'foo'
+//CHECK-NEXT:   ('st_bind', 0x00000002)
+//CHECK-NEXT:   ('st_type', 0x00000000)
+//CHECK-NEXT:   ('st_other', 0x00000000)
+//CHECK-NEXT:   ('st_shndx', 0x00000000)
+//CHECK-NEXT:   ('st_value', 0x00000000)
+//CHECK-NEXT:   ('st_size', 0x00000000)
 //CHECK-NEXT:  ),
 //CHECK-NEXT: ])

Modified: llvm/trunk/test/MC/ELF/zero.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/zero.s?rev=116823&r1=116822&r2=116823&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/zero.s (original)
+++ llvm/trunk/test/MC/ELF/zero.s Tue Oct 19 12:39:10 2010
@@ -3,14 +3,14 @@
 .zero 4
 .zero 1,42
 
-// CHECK: ('sh_name', 1) # '.text'
-// CHECK: ('sh_type', 1)
-// CHECK: ('sh_flags', 6)
-// CHECK: ('sh_addr', 0)
-// CHECK: ('sh_offset', 64)
-// CHECK: ('sh_size', 5)
-// CHECK: ('sh_link', 0)
-// CHECK: ('sh_info', 0)
-// CHECK: ('sh_addralign', 4)
-// CHECK: ('sh_entsize', 0)
+// CHECK: ('sh_name', 0x00000001) # '.text'
+// CHECK: ('sh_type', 0x00000001)
+// CHECK: ('sh_flags', 0x00000006)
+// CHECK: ('sh_addr', 0x00000000)
+// CHECK: ('sh_offset', 0x00000040)
+// CHECK: ('sh_size', 0x00000005)
+// CHECK: ('sh_link', 0x00000000)
+// CHECK: ('sh_info', 0x00000000)
+// CHECK: ('sh_addralign', 0x00000004)
+// CHECK: ('sh_entsize', 0x00000000)
 // CHECK: ('_section_data', '00000000 2a')

Modified: llvm/trunk/test/Scripts/common_dump.py
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Scripts/common_dump.py?rev=116823&r1=116822&r2=116823&view=diff
==============================================================================
--- llvm/trunk/test/Scripts/common_dump.py (original)
+++ llvm/trunk/test/Scripts/common_dump.py Tue Oct 19 12:39:10 2010
@@ -11,3 +11,36 @@
             hex_byte += ' '
         bytes.append(hex_byte)
     return ''.join(bytes).strip()
+
+def dataToHexUnified(d):
+    """ Convert the raw data in 'd' to an hex string with a space every 4 bytes.
+    Each 4byte number is prefixed with 0x for easy sed/rx
+    Fixme: convert all MC tests to use this routine instead of the above
+    """
+    bytes = []
+    for i,c in enumerate(d):
+        byte = ord(c)
+        hex_byte = hex(byte)[2:]
+        if byte <= 0xf:
+            hex_byte = '0' + hex_byte
+        if i % 4 == 0:
+            hex_byte = '0x' + hex_byte
+        if i % 4 == 3:
+            hex_byte += ' '
+        bytes.append(hex_byte)
+    return ''.join(bytes).strip()
+
+
+def HexDump(val, numBits=32):
+    """
+    1. do not print 'L'
+    2. Handle negatives and large numbers by mod (2^numBits)
+    3. print fixed length, prepend with zeros.
+       Length is exactly 2+(numBits/4)
+    4. Do print 0x Why?
+       so that they can be easily distinguished using sed/rx
+    """
+    val = val & (( 1 << numBits) - 1)
+    newFmt = "0x%0" + "%d" % (numBits / 4) + "x"
+    return newFmt % val
+

Modified: llvm/trunk/test/Scripts/elf-dump
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Scripts/elf-dump?rev=116823&r1=116822&r2=116823&view=diff
==============================================================================
--- llvm/trunk/test/Scripts/elf-dump (original)
+++ llvm/trunk/test/Scripts/elf-dump Tue Oct 19 12:39:10 2010
@@ -6,6 +6,8 @@
 
 import common_dump
 
+FormatOutput=hex
+
 class Reader:
     def __init__(self, path):
         if path == "-":
@@ -77,16 +79,16 @@
         self.sh_entsize = f.readWord()
 
     def dump(self, shstrtab, f, strtab, dumpdata):
-        print "  (('sh_name', %d) # %r" % (self.sh_name, shstrtab[self.sh_name])
-        print "   ('sh_type', %d)" % self.sh_type
-        print "   ('sh_flags', %d)" % self.sh_flags
-        print "   ('sh_addr', %d)" % self.sh_addr
-        print "   ('sh_offset', %d)" % self.sh_offset
-        print "   ('sh_size', %d)" % self.sh_size
-        print "   ('sh_link', %d)" % self.sh_link
-        print "   ('sh_info', %d)" % self.sh_info
-        print "   ('sh_addralign', %d)" % self.sh_addralign
-        print "   ('sh_entsize', %d)" % self.sh_entsize
+        print "  (('sh_name', %s)" % common_dump.HexDump(self.sh_name), "# %r" % shstrtab[self.sh_name]
+        print "   ('sh_type', %s)" % common_dump.HexDump(self.sh_type)
+        print "   ('sh_flags', %s)" % common_dump.HexDump(self.sh_flags)
+        print "   ('sh_addr', %s)" % common_dump.HexDump(self.sh_addr)
+        print "   ('sh_offset', %s)" % common_dump.HexDump(self.sh_offset)
+        print "   ('sh_size', %s)" % common_dump.HexDump(self.sh_size)
+        print "   ('sh_link', %s)" % common_dump.HexDump(self.sh_link)
+        print "   ('sh_info', %s)" % common_dump.HexDump(self.sh_info)
+        print "   ('sh_addralign', %s)" % common_dump.HexDump(self.sh_addralign)
+        print "   ('sh_entsize', %s)" % common_dump.HexDump(self.sh_entsize)
         if self.sh_type == 2: # SHT_SYMTAB
             print "   ('_symbols', ["
             dumpSymtab(f, self, strtab)
@@ -106,20 +108,20 @@
 
     for index in range(entries):
         f.seek(section.sh_offset + index * section.sh_entsize)
-        print "    # Symbol %d" % index
+        print "    # Symbol %s" % common_dump.HexDump(index)
         name = f.read32()
-        print "    (('st_name', %d) # %r" % (name, strtab[name])
+        print "    (('st_name', %s)" % common_dump.HexDump(name), "# %r" % strtab[name]
         if not f.is64Bit:
-            print "     ('st_value', %d)" % f.read32()
-            print "     ('st_size', %d)" % f.read32()
+            print "     ('st_value', %s)" % common_dump.HexDump(f.read32())
+            print "     ('st_size', %s)" % common_dump.HexDump(f.read32())
         st_info = f.read8()
-        print "     ('st_bind', %d)" % (st_info >> 4)
-        print "     ('st_type', %d)" % (st_info & 0xf)
-        print "     ('st_other', %d)" % f.read8()
-        print "     ('st_shndx', %d)" % f.read16()
+        print "     ('st_bind', %s)" % common_dump.HexDump((st_info >> 4))
+        print "     ('st_type', %s)" % common_dump.HexDump((st_info & 0xf))
+        print "     ('st_other', %s)" % common_dump.HexDump(f.read8())
+        print "     ('st_shndx', %s)" % common_dump.HexDump(f.read16())
         if f.is64Bit:
-            print "     ('st_value', %d)" % f.read64()
-            print "     ('st_size', %d)" % f.read64()
+            print "     ('st_value', %s)" % common_dump.HexDump(f.read64())
+            print "     ('st_size', %s)" % common_dump.HexDump(f.read64())
         print "    ),"
 
 def dumpRel(f, section, dumprela = False):
@@ -127,17 +129,17 @@
 
     for index in range(entries):
         f.seek(section.sh_offset + index * section.sh_entsize)
-        print "    # Relocation %d" % index
-        print "    (('r_offset', %d)" % f.readWord()
+        print "    # Relocation %s" % common_dump.HexDump(index)
+        print "    (('r_offset', %s)" % common_dump.HexDump(f.readWord())
         r_info = f.readWord()
         if f.is64Bit:
-            print "     ('r_sym', %d)" % (r_info >> 32)
-            print "     ('r_type', %d)" % (r_info & 0xffffffff)
+            print "     ('r_sym', %s)" % common_dump.HexDump((r_info >> 32))
+            print "     ('r_type', %s)" % common_dump.HexDump((r_info & 0xffffffff))
         else:
-            print "     ('r_sym', %d)" % (r_info >> 8)
-            print "     ('r_type', %d)" % (r_info & 0xff)
+            print "     ('r_sym', %s)" % common_dump.HexDump((r_info >> 8))
+            print "     ('r_type', %s)" % common_dump.HexDump((r_info & 0xff))
         if dumprela:
-            print "     ('r_addend', %d)" % f.readWordS()
+            print "     ('r_addend', %s)" % common_dump.HexDump(f.readWordS())
         print "    ),"
 
 def dumpELF(path, opts):
@@ -152,8 +154,8 @@
     elif fileclass == 2: # ELFCLASS64
         f.is64Bit = True
     else:
-        raise ValueError, "Unknown file class %d" % fileclass
-    print "('e_indent[EI_CLASS]', %d)" % fileclass
+        raise ValueError, "Unknown file class %s" % common_dump.HexDump(fileclass)
+    print "('e_indent[EI_CLASS]', %s)" % common_dump.HexDump(fileclass)
 
     byteordering = f.read8()
     if byteordering == 1: # ELFDATA2LSB
@@ -161,32 +163,32 @@
     elif byteordering == 2: # ELFDATA2MSB
         f.isLSB = False
     else:
-        raise ValueError, "Unknown byte ordering %d" % byteordering
-    print "('e_indent[EI_DATA]', %d)" % byteordering
+        raise ValueError, "Unknown byte ordering %s" % common_dump.HexDump(byteordering)
+    print "('e_indent[EI_DATA]', %s)" % common_dump.HexDump(byteordering)
 
-    print "('e_indent[EI_VERSION]', %d)" % f.read8()
-    print "('e_indent[EI_OSABI]', %d)" % f.read8()
-    print "('e_indent[EI_ABIVERSION]', %d)" % f.read8()
+    print "('e_indent[EI_VERSION]', %s)" % common_dump.HexDump(f.read8())
+    print "('e_indent[EI_OSABI]', %s)" % common_dump.HexDump(f.read8())
+    print "('e_indent[EI_ABIVERSION]', %s)" % common_dump.HexDump(f.read8())
 
     f.seek(16) # Seek to end of e_ident.
 
-    print "('e_type', %d)" % f.read16()
-    print "('e_machine', %d)" % f.read16()
-    print "('e_version', %d)" % f.read32()
-    print "('e_entry', %d)" % f.readWord()
-    print "('e_phoff', %d)" % f.readWord()
+    print "('e_type', %s)" % common_dump.HexDump(f.read16())
+    print "('e_machine', %s)" % common_dump.HexDump(f.read16())
+    print "('e_version', %s)" % common_dump.HexDump(f.read32())
+    print "('e_entry', %s)" % common_dump.HexDump(f.readWord())
+    print "('e_phoff', %s)" % common_dump.HexDump(f.readWord())
     e_shoff = f.readWord()
-    print "('e_shoff', %d)" % e_shoff
-    print "('e_flags', %d)" % f.read32()
-    print "('e_ehsize', %d)" % f.read16()
-    print "('e_phentsize', %d)" % f.read16()
-    print "('e_phnum', %d)" % f.read16()
+    print "('e_shoff', %s)" % common_dump.HexDump(e_shoff)
+    print "('e_flags', %s)" % common_dump.HexDump(f.read32())
+    print "('e_ehsize', %s)" % common_dump.HexDump(f.read16())
+    print "('e_phentsize', %s)" % common_dump.HexDump(f.read16())
+    print "('e_phnum', %s)" % common_dump.HexDump(f.read16())
     e_shentsize = f.read16()
-    print "('e_shentsize', %d)" % e_shentsize
+    print "('e_shentsize', %s)" % common_dump.HexDump(e_shentsize)
     e_shnum = f.read16()
-    print "('e_shnum', %d)" % e_shnum
+    print "('e_shnum', %s)" % common_dump.HexDump(e_shnum)
     e_shstrndx = f.read16()
-    print "('e_shstrndx', %d)" % e_shstrndx
+    print "('e_shstrndx', %s)" % common_dump.HexDump(e_shstrndx)
 
     # Read all section headers
     sections = []
@@ -209,7 +211,7 @@
 
     print "('_sections', ["
     for index in range(e_shnum):
-        print "  # Section %d" % index
+        print "  # Section %s" % common_dump.HexDump(index)
         sections[index].dump(shstrtab, f, strtab, opts.dumpSectionData)
     print "])"
 



From bob.wilson at apple.com  Tue Oct 19 12:42:22 2010
From: bob.wilson at apple.com (Bob Wilson)
Date: Tue, 19 Oct 2010 10:42:22 -0700
Subject: [llvm-commits] [PATCH] Shrink MachineOperand from 40 to 32 bytes
In-Reply-To: <02FBA740-0F28-4F5E-B8DF-7224FA2E19DF@2pi.dk>
References: <02FBA740-0F28-4F5E-B8DF-7224FA2E19DF@2pi.dk>
Message-ID: <A525724E-293E-4506-9C99-BC6B616085ED@apple.com>

You could make it marginally less icky by making UnsignedContents into a separate union with RegNo and OffsetLo members.
Besides the speedup you measured, this should also help memory usage, so I agree that it's worth putting up with some ickiness.

On Oct 19, 2010, at 10:20 AM, Jakob Stoklund Olesen wrote:

> Hi,
> 
> The attached patch shrinks MachineOperand from 40 to 32 bytes on 64-bit hosts.
> 
> The Contents union contains pointers, so it becomes 8-byte aligned. That creates padding because the largest member has two pointers and an unsigned.
> 
> The patch moves the unsigned outside the union in a way that makes it pack optimally on both 32-bit and 64-bit hosts.
> 
> It is a bit icky, so I wanted your opinions before committing.
> 
> I measured a (statistically significant) 0.8% speedup of code generation on 64-bit Darwin with the patch applied.
> 
> <MachineOperand.patch>_______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From gohman at apple.com  Tue Oct 19 13:00:03 2010
From: gohman at apple.com (Dan Gohman)
Date: Tue, 19 Oct 2010 18:00:03 -0000
Subject: [llvm-commits] [llvm] r116831 - in /llvm/trunk/lib/Analysis:
 AliasAnalysis.cpp AliasAnalysisEvaluator.cpp AliasSetTracker.cpp
 BasicAliasAnalysis.cpp Lint.cpp
Message-ID: <20101019180003.196AC2A6C12C@llvm.org>

Author: djg
Date: Tue Oct 19 13:00:02 2010
New Revision: 116831

URL: http://llvm.org/viewvc/llvm-project?rev=116831&view=rev
Log:
Change AliasAnalysis and its clients to use uint64_t instead of unsigned
for representing object sizes, for consistency with other parts of LLVM.

Modified:
    llvm/trunk/lib/Analysis/AliasAnalysis.cpp
    llvm/trunk/lib/Analysis/AliasAnalysisEvaluator.cpp
    llvm/trunk/lib/Analysis/AliasSetTracker.cpp
    llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp
    llvm/trunk/lib/Analysis/Lint.cpp

Modified: llvm/trunk/lib/Analysis/AliasAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/AliasAnalysis.cpp?rev=116831&r1=116830&r2=116831&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/AliasAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/AliasAnalysis.cpp Tue Oct 19 13:00:02 2010
@@ -283,7 +283,7 @@
 /// getTypeStoreSize - Return the TargetData store size for the given type,
 /// if known, or a conservative value otherwise.
 ///
-unsigned AliasAnalysis::getTypeStoreSize(const Type *Ty) {
+uint64_t AliasAnalysis::getTypeStoreSize(const Type *Ty) {
   return TD ? TD->getTypeStoreSize(Ty) : UnknownSize;
 }
 

Modified: llvm/trunk/lib/Analysis/AliasAnalysisEvaluator.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/AliasAnalysisEvaluator.cpp?rev=116831&r1=116830&r2=116831&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/AliasAnalysisEvaluator.cpp (original)
+++ llvm/trunk/lib/Analysis/AliasAnalysisEvaluator.cpp Tue Oct 19 13:00:02 2010
@@ -168,12 +168,12 @@
   // iterate over the worklist, and run the full (n^2)/2 disambiguations
   for (SetVector<Value *>::iterator I1 = Pointers.begin(), E = Pointers.end();
        I1 != E; ++I1) {
-    unsigned I1Size = AliasAnalysis::UnknownSize;
+    uint64_t I1Size = AliasAnalysis::UnknownSize;
     const Type *I1ElTy = cast<PointerType>((*I1)->getType())->getElementType();
     if (I1ElTy->isSized()) I1Size = AA.getTypeStoreSize(I1ElTy);
 
     for (SetVector<Value *>::iterator I2 = Pointers.begin(); I2 != I1; ++I2) {
-      unsigned I2Size = AliasAnalysis::UnknownSize;
+      uint64_t I2Size = AliasAnalysis::UnknownSize;
       const Type *I2ElTy =cast<PointerType>((*I2)->getType())->getElementType();
       if (I2ElTy->isSized()) I2Size = AA.getTypeStoreSize(I2ElTy);
 
@@ -200,7 +200,7 @@
 
     for (SetVector<Value *>::iterator V = Pointers.begin(), Ve = Pointers.end();
          V != Ve; ++V) {
-      unsigned Size = AliasAnalysis::UnknownSize;
+      uint64_t Size = AliasAnalysis::UnknownSize;
       const Type *ElTy = cast<PointerType>((*V)->getType())->getElementType();
       if (ElTy->isSized()) Size = AA.getTypeStoreSize(ElTy);
 

Modified: llvm/trunk/lib/Analysis/AliasSetTracker.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/AliasSetTracker.cpp?rev=116831&r1=116830&r2=116831&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/AliasSetTracker.cpp (original)
+++ llvm/trunk/lib/Analysis/AliasSetTracker.cpp Tue Oct 19 13:00:02 2010
@@ -88,7 +88,7 @@
 }
 
 void AliasSet::addPointer(AliasSetTracker &AST, PointerRec &Entry,
-                          unsigned Size, const MDNode *TBAAInfo,
+                          uint64_t Size, const MDNode *TBAAInfo,
                           bool KnownMustAlias) {
   assert(!Entry.hasAliasSet() && "Entry already in set!");
 
@@ -138,7 +138,7 @@
 /// aliasesPointer - Return true if the specified pointer "may" (or must)
 /// alias one of the members in the set.
 ///
-bool AliasSet::aliasesPointer(const Value *Ptr, unsigned Size,
+bool AliasSet::aliasesPointer(const Value *Ptr, uint64_t Size,
                               const MDNode *TBAAInfo,
                               AliasAnalysis &AA) const {
   if (AliasTy == MustAlias) {
@@ -210,7 +210,7 @@
 /// that may alias the pointer, merge them together and return the unified set.
 ///
 AliasSet *AliasSetTracker::findAliasSetForPointer(const Value *Ptr,
-                                                  unsigned Size,
+                                                  uint64_t Size,
                                                   const MDNode *TBAAInfo) {
   AliasSet *FoundSet = 0;
   for (iterator I = begin(), E = end(); I != E; ++I) {
@@ -229,7 +229,7 @@
 /// containsPointer - Return true if the specified location is represented by
 /// this alias set, false otherwise.  This does not modify the AST object or
 /// alias sets.
-bool AliasSetTracker::containsPointer(Value *Ptr, unsigned Size,
+bool AliasSetTracker::containsPointer(Value *Ptr, uint64_t Size,
                                       const MDNode *TBAAInfo) const {
   for (const_iterator I = begin(), E = end(); I != E; ++I)
     if (!I->Forward && I->aliasesPointer(Ptr, Size, TBAAInfo, AA))
@@ -258,7 +258,7 @@
 
 /// getAliasSetForPointer - Return the alias set that the specified pointer
 /// lives in.
-AliasSet &AliasSetTracker::getAliasSetForPointer(Value *Pointer, unsigned Size,
+AliasSet &AliasSetTracker::getAliasSetForPointer(Value *Pointer, uint64_t Size,
                                                  const MDNode *TBAAInfo,
                                                  bool *New) {
   AliasSet::PointerRec &Entry = getEntryFor(Pointer);
@@ -283,7 +283,7 @@
   return AliasSets.back();
 }
 
-bool AliasSetTracker::add(Value *Ptr, unsigned Size, const MDNode *TBAAInfo) {
+bool AliasSetTracker::add(Value *Ptr, uint64_t Size, const MDNode *TBAAInfo) {
   bool NewPtr;
   addPointer(Ptr, Size, TBAAInfo, AliasSet::NoModRef, NewPtr);
   return NewPtr;
@@ -414,7 +414,7 @@
 }
 
 bool
-AliasSetTracker::remove(Value *Ptr, unsigned Size, const MDNode *TBAAInfo) {
+AliasSetTracker::remove(Value *Ptr, uint64_t Size, const MDNode *TBAAInfo) {
   AliasSet *AS = findAliasSetForPointer(Ptr, Size, TBAAInfo);
   if (!AS) return false;
   remove(*AS);
@@ -422,7 +422,7 @@
 }
 
 bool AliasSetTracker::remove(LoadInst *LI) {
-  unsigned Size = AA.getTypeStoreSize(LI->getType());
+  uint64_t Size = AA.getTypeStoreSize(LI->getType());
   const MDNode *TBAAInfo = LI->getMetadata(LLVMContext::MD_tbaa);
   AliasSet *AS = findAliasSetForPointer(LI->getOperand(0), Size, TBAAInfo);
   if (!AS) return false;
@@ -431,7 +431,7 @@
 }
 
 bool AliasSetTracker::remove(StoreInst *SI) {
-  unsigned Size = AA.getTypeStoreSize(SI->getOperand(0)->getType());
+  uint64_t Size = AA.getTypeStoreSize(SI->getOperand(0)->getType());
   const MDNode *TBAAInfo = SI->getMetadata(LLVMContext::MD_tbaa);
   AliasSet *AS = findAliasSetForPointer(SI->getOperand(1), Size, TBAAInfo);
   if (!AS) return false;

Modified: llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp?rev=116831&r1=116830&r2=116831&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp Tue Oct 19 13:00:02 2010
@@ -98,7 +98,7 @@
 
 /// isObjectSmallerThan - Return true if we can prove that the object specified
 /// by V is smaller than Size.
-static bool isObjectSmallerThan(const Value *V, unsigned Size,
+static bool isObjectSmallerThan(const Value *V, uint64_t Size,
                                 const TargetData &TD) {
   const Type *AccessTy;
   if (const GlobalVariable *GV = dyn_cast<GlobalVariable>(V)) {
@@ -552,27 +552,27 @@
 
     // aliasGEP - Provide a bunch of ad-hoc rules to disambiguate a GEP
     // instruction against another.
-    AliasResult aliasGEP(const GEPOperator *V1, unsigned V1Size,
-                         const Value *V2, unsigned V2Size,
+    AliasResult aliasGEP(const GEPOperator *V1, uint64_t V1Size,
+                         const Value *V2, uint64_t V2Size,
                          const MDNode *V2TBAAInfo,
                          const Value *UnderlyingV1, const Value *UnderlyingV2);
 
     // aliasPHI - Provide a bunch of ad-hoc rules to disambiguate a PHI
     // instruction against another.
-    AliasResult aliasPHI(const PHINode *PN, unsigned PNSize,
+    AliasResult aliasPHI(const PHINode *PN, uint64_t PNSize,
                          const MDNode *PNTBAAInfo,
-                         const Value *V2, unsigned V2Size,
+                         const Value *V2, uint64_t V2Size,
                          const MDNode *V2TBAAInfo);
 
     /// aliasSelect - Disambiguate a Select instruction against another value.
-    AliasResult aliasSelect(const SelectInst *SI, unsigned SISize,
+    AliasResult aliasSelect(const SelectInst *SI, uint64_t SISize,
                             const MDNode *SITBAAInfo,
-                            const Value *V2, unsigned V2Size,
+                            const Value *V2, uint64_t V2Size,
                             const MDNode *V2TBAAInfo);
 
-    AliasResult aliasCheck(const Value *V1, unsigned V1Size,
+    AliasResult aliasCheck(const Value *V1, uint64_t V1Size,
                            const MDNode *V1TBAATag,
-                           const Value *V2, unsigned V2Size,
+                           const Value *V2, uint64_t V2Size,
                            const MDNode *V2TBAATag);
   };
 }  // End of anonymous namespace
@@ -691,7 +691,7 @@
     default: break;
     case Intrinsic::memcpy:
     case Intrinsic::memmove: {
-      unsigned Len = UnknownSize;
+      uint64_t Len = UnknownSize;
       if (ConstantInt *LenCI = dyn_cast<ConstantInt>(II->getArgOperand(2)))
         Len = LenCI->getZExtValue();
       Value *Dest = II->getArgOperand(0);
@@ -707,7 +707,7 @@
       // Since memset is 'accesses arguments' only, the AliasAnalysis base class
       // will handle it for the variable length case.
       if (ConstantInt *LenCI = dyn_cast<ConstantInt>(II->getArgOperand(2))) {
-        unsigned Len = LenCI->getZExtValue();
+        uint64_t Len = LenCI->getZExtValue();
         Value *Dest = II->getArgOperand(0);
         if (isNoAlias(Location(Dest, Len), Loc))
           return NoModRef;
@@ -727,7 +727,7 @@
     case Intrinsic::atomic_load_umin:
       if (TD) {
         Value *Op1 = II->getArgOperand(0);
-        unsigned Op1Size = TD->getTypeStoreSize(Op1->getType());
+        uint64_t Op1Size = TD->getTypeStoreSize(Op1->getType());
         MDNode *Tag = II->getMetadata(LLVMContext::MD_tbaa);
         if (isNoAlias(Location(Op1, Op1Size, Tag), Loc))
           return NoModRef;
@@ -736,7 +736,7 @@
     case Intrinsic::lifetime_start:
     case Intrinsic::lifetime_end:
     case Intrinsic::invariant_start: {
-      unsigned PtrSize =
+      uint64_t PtrSize =
         cast<ConstantInt>(II->getArgOperand(0))->getZExtValue();
       if (isNoAlias(Location(II->getArgOperand(1),
                              PtrSize,
@@ -746,7 +746,7 @@
       break;
     }
     case Intrinsic::invariant_end: {
-      unsigned PtrSize =
+      uint64_t PtrSize =
         cast<ConstantInt>(II->getArgOperand(1))->getZExtValue();
       if (isNoAlias(Location(II->getArgOperand(2),
                              PtrSize,
@@ -767,8 +767,8 @@
 /// UnderlyingV2 is the same for V2.
 ///
 AliasAnalysis::AliasResult
-BasicAliasAnalysis::aliasGEP(const GEPOperator *GEP1, unsigned V1Size,
-                             const Value *V2, unsigned V2Size,
+BasicAliasAnalysis::aliasGEP(const GEPOperator *GEP1, uint64_t V1Size,
+                             const Value *V2, uint64_t V2Size,
                              const MDNode *V2TBAAInfo,
                              const Value *UnderlyingV1,
                              const Value *UnderlyingV2) {
@@ -878,8 +878,10 @@
   // If our known offset is bigger than the access size, we know we don't have
   // an alias.
   if (GEP1BaseOffset) {
-    if (GEP1BaseOffset >= (int64_t)V2Size ||
-        GEP1BaseOffset <= -(int64_t)V1Size)
+    if (GEP1BaseOffset >= 0 ?
+        (V2Size != UnknownSize && (uint64_t)GEP1BaseOffset >= V2Size) :
+        (V1Size != UnknownSize && -(uint64_t)GEP1BaseOffset >= V1Size &&
+         GEP1BaseOffset != INT64_MIN))
       return NoAlias;
   }
   
@@ -889,9 +891,9 @@
 /// aliasSelect - Provide a bunch of ad-hoc rules to disambiguate a Select
 /// instruction against another.
 AliasAnalysis::AliasResult
-BasicAliasAnalysis::aliasSelect(const SelectInst *SI, unsigned SISize,
+BasicAliasAnalysis::aliasSelect(const SelectInst *SI, uint64_t SISize,
                                 const MDNode *SITBAAInfo,
-                                const Value *V2, unsigned V2Size,
+                                const Value *V2, uint64_t V2Size,
                                 const MDNode *V2TBAAInfo) {
   // If this select has been visited before, we're on a use-def cycle.
   // Such cycles are only valid when PHI nodes are involved or in unreachable
@@ -939,9 +941,9 @@
 // aliasPHI - Provide a bunch of ad-hoc rules to disambiguate a PHI instruction
 // against another.
 AliasAnalysis::AliasResult
-BasicAliasAnalysis::aliasPHI(const PHINode *PN, unsigned PNSize,
+BasicAliasAnalysis::aliasPHI(const PHINode *PN, uint64_t PNSize,
                              const MDNode *PNTBAAInfo,
-                             const Value *V2, unsigned V2Size,
+                             const Value *V2, uint64_t V2Size,
                              const MDNode *V2TBAAInfo) {
   // The PHI node has already been visited, avoid recursion any further.
   if (!Visited.insert(PN))
@@ -1013,9 +1015,9 @@
 // such as array references.
 //
 AliasAnalysis::AliasResult
-BasicAliasAnalysis::aliasCheck(const Value *V1, unsigned V1Size,
+BasicAliasAnalysis::aliasCheck(const Value *V1, uint64_t V1Size,
                                const MDNode *V1TBAAInfo,
-                               const Value *V2, unsigned V2Size,
+                               const Value *V2, uint64_t V2Size,
                                const MDNode *V2TBAAInfo) {
   // If either of the memory references is empty, it doesn't matter what the
   // pointer values are.

Modified: llvm/trunk/lib/Analysis/Lint.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/Lint.cpp?rev=116831&r1=116830&r2=116831&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/Lint.cpp (original)
+++ llvm/trunk/lib/Analysis/Lint.cpp Tue Oct 19 13:00:02 2010
@@ -70,7 +70,7 @@
 
     void visitCallSite(CallSite CS);
     void visitMemoryReference(Instruction &I, Value *Ptr,
-                              unsigned Size, unsigned Align,
+                              uint64_t Size, unsigned Align,
                               const Type *Ty, unsigned Flags);
 
     void visitCallInst(CallInst &I);
@@ -277,7 +277,7 @@
       // Check that the memcpy arguments don't overlap. The AliasAnalysis API
       // isn't expressive enough for what we really want to do. Known partial
       // overlap is not distinguished from the case where nothing is known.
-      unsigned Size = 0;
+      uint64_t Size = 0;
       if (const ConstantInt *Len =
             dyn_cast<ConstantInt>(findValue(MCI->getLength(),
                                             /*OffsetOk=*/false)))
@@ -361,7 +361,7 @@
 // TODO: Check that the reference is in bounds.
 // TODO: Check readnone/readonly function attributes.
 void Lint::visitMemoryReference(Instruction &I,
-                                Value *Ptr, unsigned Size, unsigned Align,
+                                Value *Ptr, uint64_t Size, unsigned Align,
                                 const Type *Ty, unsigned Flags) {
   // If no memory is being referenced, it doesn't matter if the pointer
   // is valid.



From resistor at mac.com  Tue Oct 19 13:02:07 2010
From: resistor at mac.com (Owen Anderson)
Date: Tue, 19 Oct 2010 18:02:07 -0000
Subject: [llvm-commits] [llvm] r116832 -
	/llvm/trunk/include/llvm/PassSupport.h
Message-ID: <20101019180207.1CC2A2A6C12C@llvm.org>

Author: resistor
Date: Tue Oct 19 13:02:06 2010
New Revision: 116832

URL: http://llvm.org/viewvc/llvm-project?rev=116832&view=rev
Log:
Factor out the call-once implementation into its own macro.

Modified:
    llvm/trunk/include/llvm/PassSupport.h

Modified: llvm/trunk/include/llvm/PassSupport.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/PassSupport.h?rev=116832&r1=116831&r2=116832&view=diff
==============================================================================
--- llvm/trunk/include/llvm/PassSupport.h (original)
+++ llvm/trunk/include/llvm/PassSupport.h Tue Oct 19 13:02:06 2010
@@ -129,6 +129,22 @@
   PassInfo(const PassInfo &);       // do not implement
 };
 
+#define CALL_ONCE_INITIALIZATION(function) \
+  static volatile sys::cas_flag initialized = 0; \
+  sys::cas_flag old_val = sys::CompareAndSwap(&initialized, 1, 0); \
+  if (old_val == 0) { \
+    function(Registry); \
+    sys::MemoryFence(); \
+    initialized = 2; \
+  } else { \
+    sys::cas_flag tmp = initialized; \
+    sys::MemoryFence(); \
+    while (tmp != 2) { \
+      tmp = initialized; \
+      sys::MemoryFence(); \
+    } \
+  } \
+
 #define INITIALIZE_PASS(passName, arg, name, cfg, analysis) \
   static void* initialize##passName##PassOnce(PassRegistry &Registry) { \
     PassInfo *PI = new PassInfo(name, arg, & passName ::ID, \
@@ -137,20 +153,7 @@
     return PI; \
   } \
   void llvm::initialize##passName##Pass(PassRegistry &Registry) { \
-    static volatile sys::cas_flag initialized = 0; \
-    sys::cas_flag old_val = sys::CompareAndSwap(&initialized, 1, 0); \
-    if (old_val == 0) { \
-      initialize##passName##PassOnce(Registry); \
-      sys::MemoryFence(); \
-      initialized = 2; \
-    } else { \
-      sys::cas_flag tmp = initialized; \
-      sys::MemoryFence(); \
-      while (tmp != 2) { \
-        tmp = initialized; \
-        sys::MemoryFence(); \
-      } \
-    } \
+    CALL_ONCE_INITIALIZATION(initialize##passName##PassOnce) \
   }
 
 #define INITIALIZE_PASS_BEGIN(passName, arg, name, cfg, analysis) \
@@ -168,20 +171,7 @@
     return PI; \
   } \
   void llvm::initialize##passName##Pass(PassRegistry &Registry) { \
-    static volatile sys::cas_flag initialized = 0; \
-    sys::cas_flag old_val = sys::CompareAndSwap(&initialized, 1, 0); \
-    if (old_val == 0) { \
-      initialize##passName##PassOnce(Registry); \
-      sys::MemoryFence(); \
-      initialized = 2; \
-    } else { \
-      sys::cas_flag tmp = initialized; \
-      sys::MemoryFence(); \
-      while (tmp != 2) { \
-        tmp = initialized; \
-        sys::MemoryFence(); \
-      } \
-    } \
+    CALL_ONCE_INITIALIZATION(initialize##passName##PassOnce) \
   }
 
 template<typename PassName>
@@ -266,20 +256,7 @@
     return AI; \
   } \
   void llvm::initialize##agName##AnalysisGroup(PassRegistry &Registry) { \
-    static volatile sys::cas_flag initialized = 0; \
-    sys::cas_flag old_val = sys::CompareAndSwap(&initialized, 1, 0); \
-    if (old_val == 0) { \
-      initialize##agName##AnalysisGroupOnce(Registry); \
-      sys::MemoryFence(); \
-      initialized = 2; \
-    } else { \
-      sys::cas_flag tmp = initialized; \
-      sys::MemoryFence(); \
-      while (tmp != 2) { \
-        tmp = initialized; \
-        sys::MemoryFence(); \
-      } \
-    } \
+    CALL_ONCE_INITIALIZATION(initialize##agName##AnalysisGroupOnce) \
   }
 
 
@@ -295,20 +272,7 @@
     return AI; \
   } \
   void llvm::initialize##passName##Pass(PassRegistry &Registry) { \
-    static volatile sys::cas_flag initialized = 0; \
-    sys::cas_flag old_val = sys::CompareAndSwap(&initialized, 1, 0); \
-    if (old_val == 0) { \
-      initialize##passName##PassOnce(Registry); \
-      sys::MemoryFence(); \
-      initialized = 2; \
-    } else { \
-      sys::cas_flag tmp = initialized; \
-      sys::MemoryFence(); \
-      while (tmp != 2) { \
-        tmp = initialized; \
-        sys::MemoryFence(); \
-      } \
-    } \
+    CALL_ONCE_INITIALIZATION(initialize##passName##PassOnce) \
   }
 
 
@@ -326,20 +290,7 @@
     return AI; \
   } \
   void llvm::initialize##passName##Pass(PassRegistry &Registry) { \
-    static volatile sys::cas_flag initialized = 0; \
-    sys::cas_flag old_val = sys::CompareAndSwap(&initialized, 1, 0); \
-    if (old_val == 0) { \
-      initialize##passName##PassOnce(Registry); \
-      sys::MemoryFence(); \
-      initialized = 2; \
-    } else { \
-      sys::cas_flag tmp = initialized; \
-      sys::MemoryFence(); \
-      while (tmp != 2) { \
-        tmp = initialized; \
-        sys::MemoryFence(); \
-      } \
-    } \
+    CALL_ONCE_INITIALIZATION(initialize##passName##PassOnce) \
   }
 
 //===---------------------------------------------------------------------------



From bigcheesegs at gmail.com  Tue Oct 19 13:04:06 2010
From: bigcheesegs at gmail.com (Michael J. Spencer)
Date: Tue, 19 Oct 2010 18:04:06 -0000
Subject: [llvm-commits] [llvm] r116833 -
	/llvm/trunk/utils/unittest/CMakeLists.txt
Message-ID: <20101019180406.D38F42A6C12C@llvm.org>

Author: mspencer
Date: Tue Oct 19 13:04:06 2010
New Revision: 116833

URL: http://llvm.org/viewvc/llvm-project?rev=116833&view=rev
Log:
Fix VC2010 build.

Modified:
    llvm/trunk/utils/unittest/CMakeLists.txt

Modified: llvm/trunk/utils/unittest/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/unittest/CMakeLists.txt?rev=116833&r1=116832&r2=116833&view=diff
==============================================================================
--- llvm/trunk/utils/unittest/CMakeLists.txt (original)
+++ llvm/trunk/utils/unittest/CMakeLists.txt Tue Oct 19 13:04:06 2010
@@ -26,9 +26,6 @@
 
 set(LLVM_REQUIRES_RTTI 1)
 add_definitions( -DGTEST_HAS_RTTI=0 )
-# libstdc++'s TR1 <tuple> header depends on RTTI and uses C++'0x features not
-# supported by Clang, so force googletest to use its own tuple implementation.
-add_definitions( -DGTEST_USE_OWN_TR1_TUPLE )
 
 add_llvm_library(gtest
   googletest/gtest.cc



From bigcheesegs at gmail.com  Tue Oct 19 13:04:19 2010
From: bigcheesegs at gmail.com (Michael J. Spencer)
Date: Tue, 19 Oct 2010 18:04:19 -0000
Subject: [llvm-commits] [llvm] r116834 - /llvm/trunk/unittests/CMakeLists.txt
Message-ID: <20101019180419.9BE852A6C12C@llvm.org>

Author: mspencer
Date: Tue Oct 19 13:04:19 2010
New Revision: 116834

URL: http://llvm.org/viewvc/llvm-project?rev=116834&view=rev
Log:
unittests: Use the correct defines and global variables when building on CMake.

Modified:
    llvm/trunk/unittests/CMakeLists.txt

Modified: llvm/trunk/unittests/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/CMakeLists.txt?rev=116834&r1=116833&r2=116834&view=diff
==============================================================================
--- llvm/trunk/unittests/CMakeLists.txt (original)
+++ llvm/trunk/unittests/CMakeLists.txt Tue Oct 19 13:04:19 2010
@@ -13,6 +13,8 @@
 endfunction()
 
 include_directories(${LLVM_MAIN_SRC_DIR}/utils/unittest/googletest/include)
+set(LLVM_REQUIRES_RTTI 1)
+add_definitions(-DGTEST_HAS_RTTI=0)
 
 set(LLVM_LINK_COMPONENTS
   jit



From gohman at apple.com  Tue Oct 19 13:08:27 2010
From: gohman at apple.com (Dan Gohman)
Date: Tue, 19 Oct 2010 18:08:27 -0000
Subject: [llvm-commits] [llvm] r116839 - in /llvm/trunk:
 include/llvm/Analysis/AliasAnalysis.h
 include/llvm/Analysis/AliasSetTracker.h
 lib/Transforms/Scalar/DeadStoreElimination.cpp
 lib/Transforms/Scalar/MemCpyOptimizer.cpp
Message-ID: <20101019180827.7A58F2A6C12C@llvm.org>

Author: djg
Date: Tue Oct 19 13:08:27 2010
New Revision: 116839

URL: http://llvm.org/viewvc/llvm-project?rev=116839&view=rev
Log:
Oops, check in all the files for converting AliasAnalysis to
use uint64_t.

Modified:
    llvm/trunk/include/llvm/Analysis/AliasAnalysis.h
    llvm/trunk/include/llvm/Analysis/AliasSetTracker.h
    llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp
    llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp

Modified: llvm/trunk/include/llvm/Analysis/AliasAnalysis.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/AliasAnalysis.h?rev=116839&r1=116838&r2=116839&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/AliasAnalysis.h (original)
+++ llvm/trunk/include/llvm/Analysis/AliasAnalysis.h Tue Oct 19 13:08:27 2010
@@ -67,7 +67,7 @@
   /// UnknownSize - This is a special value which can be used with the
   /// size arguments in alias queries to indicate that the caller does not
   /// know the sizes of the potential memory references.
-  static unsigned const UnknownSize = ~0u;
+  static uint64_t const UnknownSize = ~UINT64_C(0);
 
   /// getTargetData - Return a pointer to the current TargetData object, or
   /// null if no TargetData object is available.
@@ -77,7 +77,7 @@
   /// getTypeStoreSize - Return the TargetData store size for the given type,
   /// if known, or a conservative value otherwise.
   ///
-  unsigned getTypeStoreSize(const Type *Ty);
+  uint64_t getTypeStoreSize(const Type *Ty);
 
   //===--------------------------------------------------------------------===//
   /// Alias Queries...
@@ -88,13 +88,13 @@
     /// Ptr - The address of the start of the location.
     const Value *Ptr;
     /// Size - The size of the location.
-    unsigned Size;
+    uint64_t Size;
     /// TBAATag - The metadata node which describes the TBAA type of
     /// the location, or null if there is no (unique) tag.
     const MDNode *TBAATag;
 
     explicit Location(const Value *P = 0,
-                      unsigned S = UnknownSize,
+                      uint64_t S = UnknownSize,
                       const MDNode *N = 0)
       : Ptr(P), Size(S), TBAATag(N) {}
 
@@ -129,8 +129,8 @@
   virtual AliasResult alias(const Location &LocA, const Location &LocB);
 
   /// alias - A convenience wrapper.
-  AliasResult alias(const Value *V1, unsigned V1Size,
-                    const Value *V2, unsigned V2Size) {
+  AliasResult alias(const Value *V1, uint64_t V1Size,
+                    const Value *V2, uint64_t V2Size) {
     return alias(Location(V1, V1Size), Location(V2, V2Size));
   }
 
@@ -146,8 +146,8 @@
   }
 
   /// isNoAlias - A convenience wrapper.
-  bool isNoAlias(const Value *V1, unsigned V1Size,
-                 const Value *V2, unsigned V2Size) {
+  bool isNoAlias(const Value *V1, uint64_t V1Size,
+                 const Value *V2, uint64_t V2Size) {
     return isNoAlias(Location(V1, V1Size), Location(V2, V2Size));
   }
 
@@ -278,7 +278,7 @@
 
   /// getModRefInfo - A convenience wrapper.
   ModRefResult getModRefInfo(const Instruction *I,
-                             const Value *P, unsigned Size) {
+                             const Value *P, uint64_t Size) {
     return getModRefInfo(I, Location(P, Size));
   }
 
@@ -289,7 +289,7 @@
 
   /// getModRefInfo (for call sites) - A convenience wrapper.
   ModRefResult getModRefInfo(ImmutableCallSite CS,
-                             const Value *P, unsigned Size) {
+                             const Value *P, uint64_t Size) {
     return getModRefInfo(CS, Location(P, Size));
   }
 
@@ -300,7 +300,7 @@
   }
 
   /// getModRefInfo (for calls) - A convenience wrapper.
-  ModRefResult getModRefInfo(const CallInst *C, const Value *P, unsigned Size) {
+  ModRefResult getModRefInfo(const CallInst *C, const Value *P, uint64_t Size) {
     return getModRefInfo(C, Location(P, Size));
   }
 
@@ -313,7 +313,7 @@
 
   /// getModRefInfo (for invokes) - A convenience wrapper.
   ModRefResult getModRefInfo(const InvokeInst *I,
-                             const Value *P, unsigned Size) {
+                             const Value *P, uint64_t Size) {
     return getModRefInfo(I, Location(P, Size));
   }
 
@@ -322,7 +322,7 @@
   ModRefResult getModRefInfo(const LoadInst *L, const Location &Loc);
 
   /// getModRefInfo (for loads) - A convenience wrapper.
-  ModRefResult getModRefInfo(const LoadInst *L, const Value *P, unsigned Size) {
+  ModRefResult getModRefInfo(const LoadInst *L, const Value *P, uint64_t Size) {
     return getModRefInfo(L, Location(P, Size));
   }
 
@@ -331,7 +331,7 @@
   ModRefResult getModRefInfo(const StoreInst *S, const Location &Loc);
 
   /// getModRefInfo (for stores) - A convenience wrapper.
-  ModRefResult getModRefInfo(const StoreInst *S, const Value *P, unsigned Size) {
+  ModRefResult getModRefInfo(const StoreInst *S, const Value *P, uint64_t Size) {
     return getModRefInfo(S, Location(P, Size));
   }
 
@@ -340,7 +340,7 @@
   ModRefResult getModRefInfo(const VAArgInst* I, const Location &Loc);
 
   /// getModRefInfo (for va_args) - A convenience wrapper.
-  ModRefResult getModRefInfo(const VAArgInst* I, const Value* P, unsigned Size) {
+  ModRefResult getModRefInfo(const VAArgInst* I, const Value* P, uint64_t Size) {
     return getModRefInfo(I, Location(P, Size));
   }
 
@@ -360,7 +360,7 @@
   bool canBasicBlockModify(const BasicBlock &BB, const Location &Loc);
 
   /// canBasicBlockModify - A convenience wrapper.
-  bool canBasicBlockModify(const BasicBlock &BB, const Value *P, unsigned Size){
+  bool canBasicBlockModify(const BasicBlock &BB, const Value *P, uint64_t Size){
     return canBasicBlockModify(BB, Location(P, Size));
   }
 
@@ -373,7 +373,7 @@
 
   /// canInstructionRangeModify - A convenience wrapper.
   bool canInstructionRangeModify(const Instruction &I1, const Instruction &I2,
-                                 const Value *Ptr, unsigned Size) {
+                                 const Value *Ptr, uint64_t Size) {
     return canInstructionRangeModify(I1, I2, Location(Ptr, Size));
   }
 

Modified: llvm/trunk/include/llvm/Analysis/AliasSetTracker.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/AliasSetTracker.h?rev=116839&r1=116838&r2=116839&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/AliasSetTracker.h (original)
+++ llvm/trunk/include/llvm/Analysis/AliasSetTracker.h Tue Oct 19 13:08:27 2010
@@ -40,7 +40,7 @@
     Value *Val;  // The pointer this record corresponds to.
     PointerRec **PrevInList, *NextInList;
     AliasSet *AS;
-    unsigned Size;
+    uint64_t Size;
     const MDNode *TBAAInfo;
   public:
     PointerRec(Value *V)
@@ -57,7 +57,7 @@
       return &NextInList;
     }
 
-    void updateSizeAndTBAAInfo(unsigned NewSize, const MDNode *NewTBAAInfo) {
+    void updateSizeAndTBAAInfo(uint64_t NewSize, const MDNode *NewTBAAInfo) {
       if (NewSize > Size) Size = NewSize;
 
       if (TBAAInfo == DenseMapInfo<const MDNode *>::getEmptyKey())
@@ -68,7 +68,7 @@
         TBAAInfo = DenseMapInfo<const MDNode *>::getTombstoneKey();
     }
 
-    unsigned getSize() const { return Size; }
+    uint64_t getSize() const { return Size; }
 
     /// getTBAAInfo - Return the TBAAInfo, or null if there is no
     /// information or conflicting information.
@@ -205,7 +205,7 @@
     value_type *operator->() const { return &operator*(); }
 
     Value *getPointer() const { return CurNode->getValue(); }
-    unsigned getSize() const { return CurNode->getSize(); }
+    uint64_t getSize() const { return CurNode->getSize(); }
     const MDNode *getTBAAInfo() const { return CurNode->getTBAAInfo(); }
 
     iterator& operator++() {                // Preincrement
@@ -250,7 +250,7 @@
 
   void removeFromTracker(AliasSetTracker &AST);
 
-  void addPointer(AliasSetTracker &AST, PointerRec &Entry, unsigned Size,
+  void addPointer(AliasSetTracker &AST, PointerRec &Entry, uint64_t Size,
                   const MDNode *TBAAInfo,
                   bool KnownMustAlias = false);
   void addCallSite(CallSite CS, AliasAnalysis &AA);
@@ -266,7 +266,7 @@
   /// aliasesPointer - Return true if the specified pointer "may" (or must)
   /// alias one of the members in the set.
   ///
-  bool aliasesPointer(const Value *Ptr, unsigned Size, const MDNode *TBAAInfo,
+  bool aliasesPointer(const Value *Ptr, uint64_t Size, const MDNode *TBAAInfo,
                       AliasAnalysis &AA) const;
   bool aliasesCallSite(CallSite CS, AliasAnalysis &AA) const;
 };
@@ -320,7 +320,7 @@
   /// These methods return true if inserting the instruction resulted in the
   /// addition of a new alias set (i.e., the pointer did not alias anything).
   ///
-  bool add(Value *Ptr, unsigned Size, const MDNode *TBAAInfo); // Add a location
+  bool add(Value *Ptr, uint64_t Size, const MDNode *TBAAInfo); // Add a location
   bool add(LoadInst *LI);
   bool add(StoreInst *SI);
   bool add(VAArgInst *VAAI);
@@ -335,7 +335,7 @@
   /// be aliased by the specified instruction.  These methods return true if any
   /// alias sets were eliminated.
   // Remove a location
-  bool remove(Value *Ptr, unsigned Size, const MDNode *TBAAInfo);
+  bool remove(Value *Ptr, uint64_t Size, const MDNode *TBAAInfo);
   bool remove(LoadInst *LI);
   bool remove(StoreInst *SI);
   bool remove(VAArgInst *VAAI);
@@ -355,13 +355,13 @@
   /// lives in.  If the New argument is non-null, this method sets the value to
   /// true if a new alias set is created to contain the pointer (because the
   /// pointer didn't alias anything).
-  AliasSet &getAliasSetForPointer(Value *P, unsigned Size,
+  AliasSet &getAliasSetForPointer(Value *P, uint64_t Size,
                                   const MDNode *TBAAInfo,
                                   bool *New = 0);
 
   /// getAliasSetForPointerIfExists - Return the alias set containing the
   /// location specified if one exists, otherwise return null.
-  AliasSet *getAliasSetForPointerIfExists(Value *P, unsigned Size,
+  AliasSet *getAliasSetForPointerIfExists(Value *P, uint64_t Size,
                                           const MDNode *TBAAInfo) {
     return findAliasSetForPointer(P, Size, TBAAInfo);
   }
@@ -369,7 +369,7 @@
   /// containsPointer - Return true if the specified location is represented by
   /// this alias set, false otherwise.  This does not modify the AST object or
   /// alias sets.
-  bool containsPointer(Value *P, unsigned Size, const MDNode *TBAAInfo) const;
+  bool containsPointer(Value *P, uint64_t Size, const MDNode *TBAAInfo) const;
 
   /// getAliasAnalysis - Return the underlying alias analysis object used by
   /// this tracker.
@@ -416,7 +416,7 @@
     return *Entry;
   }
 
-  AliasSet &addPointer(Value *P, unsigned Size, const MDNode *TBAAInfo,
+  AliasSet &addPointer(Value *P, uint64_t Size, const MDNode *TBAAInfo,
                        AliasSet::AccessType E,
                        bool &NewSet) {
     NewSet = false;
@@ -424,7 +424,7 @@
     AS.AccessTy |= E;
     return AS;
   }
-  AliasSet *findAliasSetForPointer(const Value *Ptr, unsigned Size,
+  AliasSet *findAliasSetForPointer(const Value *Ptr, uint64_t Size,
                                    const MDNode *TBAAInfo);
 
   AliasSet *findAliasSetForCallSite(CallSite CS);

Modified: llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp?rev=116839&r1=116838&r2=116839&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp Tue Oct 19 13:08:27 2010
@@ -79,7 +79,7 @@
       AU.addPreserved<MemoryDependenceAnalysis>();
     }
 
-    unsigned getPointerSize(Value *V) const;
+    uint64_t getPointerSize(Value *V) const;
   };
 }
 
@@ -373,7 +373,7 @@
     }
     
     Value *killPointer = 0;
-    unsigned killPointerSize = AliasAnalysis::UnknownSize;
+    uint64_t killPointerSize = AliasAnalysis::UnknownSize;
     
     // If we encounter a use of the pointer, it is no longer considered dead
     if (LoadInst *L = dyn_cast<LoadInst>(BBI)) {
@@ -565,7 +565,7 @@
   } while (!NowDeadInsts.empty());
 }
 
-unsigned DSE::getPointerSize(Value *V) const {
+uint64_t DSE::getPointerSize(Value *V) const {
   if (TD) {
     if (AllocaInst *A = dyn_cast<AllocaInst>(V)) {
       // Get size information for the alloca

Modified: llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp?rev=116839&r1=116838&r2=116839&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp Tue Oct 19 13:08:27 2010
@@ -772,7 +772,7 @@
 
   // If the memmove is a constant size, use it for the alias query, this allows
   // us to optimize things like: memmove(P, P+64, 64);
-  unsigned MemMoveSize = AliasAnalysis::UnknownSize;
+  uint64_t MemMoveSize = AliasAnalysis::UnknownSize;
   if (ConstantInt *Len = dyn_cast<ConstantInt>(M->getLength()))
     MemMoveSize = Len->getZExtValue();
   



From eli.friedman at gmail.com  Tue Oct 19 13:29:48 2010
From: eli.friedman at gmail.com (Eli Friedman)
Date: Tue, 19 Oct 2010 11:29:48 -0700
Subject: [llvm-commits] [Review request] clang bug 8355: generating
 wrong code due to incorrect name mangling
In-Reply-To: <44413.10.0.7.178.1287321144.squirrel@webmail.cantab.net>
References: <44413.10.0.7.178.1287321144.squirrel@webmail.cantab.net>
Message-ID: <AANLkTimfaYD9OxLF7k951dp50czA4S_4u2JrZ4xDZATn@mail.gmail.com>

On Sun, Oct 17, 2010 at 6:12 AM, Richard Smith <richard at metafoo.co.uk> wrote:
> Hello,
>
> While porting a large C++ codebase to clang, I found a bug where incorrect
> code would be generated if two polymorphic classes with the same name were
> defined within a function -- specifically, the name mangling code didn't
> fall into the <local-name> case and gave the same mangled name for both
> vtables. This is filed as bug#8355.
>
> The attached patch corrects this behaviour. I've also changed the
> discriminator numbering for local classes to more closely match the
> Itanium C++ ABI and g++ -- the numbering is now incremented for each
> top-level type within a function, and not for each mangled local name.
>
> I'd appreciate any review comments you might have. Please CC me on any
> replies.

1) Please send clang patches to cfe-commits, not here.
2) In case you didn't spot it, see clang r116752
(http://lists.cs.uiuc.edu/pipermail/cfe-commits/Week-of-Mon-20101018/035564.html).

-Eli

From ofv at wanadoo.es  Tue Oct 19 13:39:16 2010
From: ofv at wanadoo.es (=?utf-8?Q?=C3=93scar_Fuentes?=)
Date: Tue, 19 Oct 2010 20:39:16 +0200
Subject: [llvm-commits] [llvm] r116834 -
	/llvm/trunk/unittests/CMakeLists.txt
References: <20101019180419.9BE852A6C12C@llvm.org>
Message-ID: <87y69uvxgr.fsf@telefonica.net>

"Michael J. Spencer"
<bigcheesegs at gmail.com> writes:

> Author: mspencer
> Date: Tue Oct 19 13:04:19 2010
> New Revision: 116834
>
> URL: http://llvm.org/viewvc/llvm-project?rev=116834&view=rev
> Log:
> unittests: Use the correct defines and global variables when building on CMake.
>
> Modified:
>     llvm/trunk/unittests/CMakeLists.txt
>
> Modified: llvm/trunk/unittests/CMakeLists.txt
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/CMakeLists.txt?rev=116834&r1=116833&r2=116834&view=diff
> ==============================================================================
> --- llvm/trunk/unittests/CMakeLists.txt (original)
> +++ llvm/trunk/unittests/CMakeLists.txt Tue Oct 19 13:04:19 2010
> @@ -13,6 +13,8 @@
>  endfunction()
>  
>  include_directories(${LLVM_MAIN_SRC_DIR}/utils/unittest/googletest/include)
> +set(LLVM_REQUIRES_RTTI 1)
> +add_definitions(-DGTEST_HAS_RTTI=0)

This is not what the corresponding Makefile does. If you must diverge
from the settings on the Makefile's (both on unittests/CMakeLists.txt
and tools/unittests/CMakeLists.txt) please leave a comment explaining
the reason.


From evan.cheng at apple.com  Tue Oct 19 13:58:51 2010
From: evan.cheng at apple.com (Evan Cheng)
Date: Tue, 19 Oct 2010 18:58:51 -0000
Subject: [llvm-commits] [llvm] r116845 - in /llvm/trunk:
 include/llvm/Target/TargetInstrInfo.h lib/CodeGen/MachineLICM.cpp
 lib/Target/ARM/ARMBaseInstrInfo.cpp lib/Target/ARM/ARMBaseInstrInfo.h
 lib/Target/X86/X86InstrInfo.cpp lib/Target/X86/X86InstrInfo.h
 test/CodeGen/ARM/remat.ll test/CodeGen/Thumb2/machine-licm-vdup.ll
 test/CodeGen/X86/2008-10-27-CoalescerBug.ll
 test/CodeGen/X86/2009-02-26-MachineLICMBug.ll
Message-ID: <20101019185851.713E62A6C12C@llvm.org>

Author: evancheng
Date: Tue Oct 19 13:58:51 2010
New Revision: 116845

URL: http://llvm.org/viewvc/llvm-project?rev=116845&view=rev
Log:
Re-enable register pressure aware machine licm with fixes. Hoist() may have
erased the instruction during LICM so UpdateRegPressureAfter() should not
reference it afterwards.

Removed:
    llvm/trunk/test/CodeGen/ARM/remat.ll
Modified:
    llvm/trunk/include/llvm/Target/TargetInstrInfo.h
    llvm/trunk/lib/CodeGen/MachineLICM.cpp
    llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
    llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h
    llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
    llvm/trunk/lib/Target/X86/X86InstrInfo.h
    llvm/trunk/test/CodeGen/Thumb2/machine-licm-vdup.ll
    llvm/trunk/test/CodeGen/X86/2008-10-27-CoalescerBug.ll
    llvm/trunk/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll

Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=116845&r1=116844&r2=116845&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Tue Oct 19 13:58:51 2010
@@ -24,6 +24,7 @@
 class LiveVariables;
 class MCAsmInfo;
 class MachineMemOperand;
+class MachineRegisterInfo;
 class MDNode;
 class MCInst;
 class SDNode;
@@ -625,6 +626,19 @@
   int getOperandLatency(const InstrItineraryData *ItinData,
                         SDNode *DefNode, unsigned DefIdx,
                         SDNode *UseNode, unsigned UseIdx) const;
+
+  /// hasHighOperandLatency - Compute operand latency between a def of 'Reg'
+  /// and an use in the current loop, return true if the target considered
+  /// it 'high'. This is used by optimization passes such as machine LICM to
+  /// determine whether it makes sense to hoist an instruction out even in
+  /// high register pressure situation.
+  virtual
+  bool hasHighOperandLatency(const InstrItineraryData *ItinData,
+                             const MachineRegisterInfo *MRI,
+                             const MachineInstr *DefMI, unsigned DefIdx,
+                             const MachineInstr *UseMI, unsigned UseIdx) const {
+    return false;
+  }
 };
 
 /// TargetInstrInfoImpl - This is the default implementation of

Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=116845&r1=116844&r2=116845&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Tue Oct 19 13:58:51 2010
@@ -43,11 +43,6 @@
 
 using namespace llvm;
 
-static cl::opt<bool>
-TrackRegPressure("rp-aware-machine-licm",
-                 cl::desc("Register pressure aware machine LICM"),
-                 cl::init(false), cl::Hidden);
-
 STATISTIC(NumHoisted,
           "Number of machine instructions hoisted out of loops");
 STATISTIC(NumLowRP,
@@ -128,6 +123,7 @@
       RegSeen.clear();
       RegPressure.clear();
       RegLimit.clear();
+      BackTrace.clear();
       for (DenseMap<unsigned,std::vector<const MachineInstr*> >::iterator
              CI = CSEMap.begin(), CE = CSEMap.end(); CI != CE; ++CI)
         CI->second.clear();
@@ -175,9 +171,10 @@
     /// 
     bool IsLoopInvariantInst(MachineInstr &I);
 
-    /// ComputeOperandLatency - Compute operand latency between a def of 'Reg'
-    /// and an use in the current loop.
-    int ComputeOperandLatency(MachineInstr &MI, unsigned DefIdx, unsigned Reg);
+    /// HasHighOperandLatency - Compute operand latency between a def of 'Reg'
+    /// and an use in the current loop, return true if the target considered
+    /// it 'high'.
+    bool HasHighOperandLatency(MachineInstr &MI, unsigned DefIdx, unsigned Reg);
 
     /// IncreaseHighRegPressure - Visit BBs from preheader to current BB, check
     /// if hoisting an instruction of the given cost matrix can cause high
@@ -203,8 +200,9 @@
 
     /// UpdateRegPressureBefore / UpdateRegPressureAfter - Update estimate of
     /// register pressure before and after executing a specifi instruction.
-    void UpdateRegPressureBefore(const MachineInstr *MI);
-    void UpdateRegPressureAfter(const MachineInstr *MI);
+    void UpdateRegPressureBefore(const MachineInstr *MI,
+                                 SmallVector<unsigned, 4> &Defs);
+    void UpdateRegPressureAfter(SmallVector<unsigned, 4> &Defs);
 
     /// isLoadFromConstantMemory - Return true if the given instruction is a
     /// load from constant memory.
@@ -560,28 +558,26 @@
   if (!Preheader)
     return;
 
-  if (TrackRegPressure) {
-    if (IsHeader) {
-      // Compute registers which are liveout of preheader.
-      RegSeen.clear();
-      BackTrace.clear();
-      InitRegPressure(Preheader);
-    }
-
-    // Remember livein register pressure.
-    BackTrace.push_back(RegPressure);
+  if (IsHeader) {
+    // Compute registers which are liveout of preheader.
+    RegSeen.clear();
+    BackTrace.clear();
+    InitRegPressure(Preheader);
   }
 
+  // Remember livein register pressure.
+  BackTrace.push_back(RegPressure);
+
+  SmallVector<unsigned, 4> Defs;
   for (MachineBasicBlock::iterator
          MII = BB->begin(), E = BB->end(); MII != E; ) {
     MachineBasicBlock::iterator NextMII = MII; ++NextMII;
     MachineInstr *MI = &*MII;
 
-    if (TrackRegPressure)
-      UpdateRegPressureBefore(MI);
+    assert(Defs.empty());
+    UpdateRegPressureBefore(MI, Defs);
     Hoist(MI, Preheader);
-    if (TrackRegPressure)
-      UpdateRegPressureAfter(MI);
+    UpdateRegPressureAfter(Defs);
 
     MII = NextMII;
   }
@@ -595,8 +591,7 @@
       HoistRegion(Children[I]);
   }
 
-  if (TrackRegPressure)
-    BackTrace.pop_back();
+  BackTrace.pop_back();
 }
 
 /// InitRegPressure - Find all virtual register references that are liveout of
@@ -635,12 +630,13 @@
 
 /// UpdateRegPressureBefore / UpdateRegPressureAfter - Update estimate of
 /// register pressure before and after executing a specifi instruction.
-void MachineLICM::UpdateRegPressureBefore(const MachineInstr *MI) {
+void MachineLICM::UpdateRegPressureBefore(const MachineInstr *MI,
+                                          SmallVector<unsigned, 4> &Defs) {
   bool NoImpact = MI->isImplicitDef() || MI->isPHI();
 
   for (unsigned i = 0, e = MI->getDesc().getNumOperands(); i != e; ++i) {
     const MachineOperand &MO = MI->getOperand(i);
-    if (!MO.isReg() || MO.isImplicit() || !MO.isUse())
+    if (!MO.isReg() || MO.isImplicit())
       continue;
     unsigned Reg = MO.getReg();
     if (!Reg || TargetRegisterInfo::isPhysicalRegister(Reg))
@@ -650,33 +646,26 @@
     if (NoImpact)
       continue;
 
-    if (!isNew && MO.isKill()) {
-      const TargetRegisterClass *RC = MRI->getRegClass(Reg);
-      EVT VT = *RC->vt_begin();
-      unsigned RCId = TLI->getRepRegClassFor(VT)->getID();
-      unsigned RCCost = TLI->getRepRegClassCostFor(VT);
+    if (MO.isDef())
+      Defs.push_back(Reg);
+    else {
+      if (!isNew && MO.isKill()) {
+        const TargetRegisterClass *RC = MRI->getRegClass(Reg);
+        EVT VT = *RC->vt_begin();
+        unsigned RCId = TLI->getRepRegClassFor(VT)->getID();
+        unsigned RCCost = TLI->getRepRegClassCostFor(VT);
 
-      assert(RCCost <= RegPressure[RCId]);
-      RegPressure[RCId] -= RCCost;
+        assert(RCCost <= RegPressure[RCId]);
+        RegPressure[RCId] -= RCCost;
+      }
     }
   }
 }
 
-void MachineLICM::UpdateRegPressureAfter(const MachineInstr *MI) {
-  bool NoImpact = MI->isImplicitDef() || MI->isPHI();
-
-  for (unsigned i = 0, e = MI->getDesc().getNumOperands(); i != e; ++i) {
-    const MachineOperand &MO = MI->getOperand(i);
-    if (!MO.isReg() || MO.isImplicit() || !MO.isDef())
-      continue;
-    unsigned Reg = MO.getReg();
-    if (!Reg || TargetRegisterInfo::isPhysicalRegister(Reg))
-      continue;
-
+void MachineLICM::UpdateRegPressureAfter(SmallVector<unsigned, 4> &Defs) {
+  while (!Defs.empty()) {
+    unsigned Reg = Defs.pop_back_val();
     RegSeen.insert(Reg);
-    if (NoImpact)
-      continue;
-
     const TargetRegisterClass *RC = MRI->getRegClass(Reg);
     EVT VT = *RC->vt_begin();
     unsigned RCId = TLI->getRepRegClassFor(VT)->getID();
@@ -792,15 +781,14 @@
   }
 }
 
-/// ComputeOperandLatency - Compute operand latency between a def of 'Reg'
-/// and an use in the current loop.
-int MachineLICM::ComputeOperandLatency(MachineInstr &MI,
-                                       unsigned DefIdx, unsigned Reg) {
+/// HasHighOperandLatency - Compute operand latency between a def of 'Reg'
+/// and an use in the current loop, return true if the target considered
+/// it 'high'.
+bool MachineLICM::HasHighOperandLatency(MachineInstr &MI,
+                                        unsigned DefIdx, unsigned Reg) {
   if (MRI->use_nodbg_empty(Reg))
-    // No use? Return arbitrary large number!
-    return 300;
+    return false;
 
-  int Latency = -1;
   for (MachineRegisterInfo::use_nodbg_iterator I = MRI->use_nodbg_begin(Reg),
          E = MRI->use_nodbg_end(); I != E; ++I) {
     MachineInstr *UseMI = &*I;
@@ -814,18 +802,15 @@
       if (MOReg != Reg)
         continue;
 
-      int UseCycle = TII->getOperandLatency(InstrItins, &MI, DefIdx, UseMI, i);
-      Latency = std::max(Latency, UseCycle);
+      if (TII->hasHighOperandLatency(InstrItins, MRI, &MI, DefIdx, UseMI, i))
+        return true;
     }
 
-    if (Latency != -1)
-      break;
+    // Only look at the first in loop use.
+    break;
   }
 
-  if (Latency == -1)
-    Latency = InstrItins->getOperandCycle(MI.getDesc().getSchedClass(), DefIdx);
-
-  return Latency;
+  return false;
 }
 
 /// IncreaseHighRegPressure - Visit BBs from preheader to current BB, check
@@ -859,19 +844,19 @@
   if (MI.isImplicitDef())
     return true;
 
-  // FIXME: For now, only hoist re-materilizable instructions. LICM will
-  // increase register pressure. We want to make sure it doesn't increase
-  // spilling.
+  // If the instruction is cheap, only hoist if it is re-materilizable. LICM
+  // will increase register pressure. It's probably not worth it if the
+  // instruction is cheap.
   // Also hoist loads from constant memory, e.g. load from stubs, GOT. Hoisting
   // these tend to help performance in low register pressure situation. The
   // trade off is it may cause spill in high pressure situation. It will end up
   // adding a store in the loop preheader. But the reload is no more expensive.
   // The side benefit is these loads are frequently CSE'ed.
-  if (!TrackRegPressure || MI.getDesc().isAsCheapAsAMove()) {
-    if (!TII->isTriviallyReMaterializable(&MI, AA) &&
-        !isLoadFromConstantMemory(&MI))
+  if (MI.getDesc().isAsCheapAsAMove()) {
+    if (!TII->isTriviallyReMaterializable(&MI, AA))
       return false;
   } else {
+    // Estimate register pressure to determine whether to LICM the instruction.
     // In low register pressure situation, we can be more aggressive about 
     // hoisting. Also, favors hoisting long latency instructions even in
     // moderately high pressure situation.
@@ -884,13 +869,9 @@
       if (!Reg || TargetRegisterInfo::isPhysicalRegister(Reg))
         continue;
       if (MO.isDef()) {
-        if (InstrItins && !InstrItins->isEmpty()) {
-          int Cycle = ComputeOperandLatency(MI, i, Reg);
-          if (Cycle > 3) {
-            // FIXME: Target specific high latency limit?
-            ++NumHighLatency;
-            return true;
-          }
+        if (HasHighOperandLatency(MI, i, Reg)) {
+          ++NumHighLatency;
+          return true;
         }
 
         const TargetRegisterClass *RC = MRI->getRegClass(Reg);

Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=116845&r1=116844&r2=116845&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Tue Oct 19 13:58:51 2010
@@ -1925,3 +1925,23 @@
   return getOperandLatency(ItinData, DefTID, DefIdx, DefAlign,
                            UseTID, UseIdx, UseAlign);
 }
+
+bool ARMBaseInstrInfo::
+hasHighOperandLatency(const InstrItineraryData *ItinData,
+                      const MachineRegisterInfo *MRI,
+                      const MachineInstr *DefMI, unsigned DefIdx,
+                      const MachineInstr *UseMI, unsigned UseIdx) const {
+  unsigned DDomain = DefMI->getDesc().TSFlags & ARMII::DomainMask;
+  unsigned UDomain = UseMI->getDesc().TSFlags & ARMII::DomainMask;
+  if (Subtarget.isCortexA8() &&
+      (DDomain == ARMII::DomainVFP || UDomain == ARMII::DomainVFP))
+    // CortexA8 VFP instructions are not pipelined.
+    return true;
+
+  // Hoist VFP / NEON instructions with 4 or higher latency.
+  int Latency = getOperandLatency(ItinData, DefMI, DefIdx, UseMI, UseIdx);
+  if (Latency <= 3)
+    return false;
+  return DDomain == ARMII::DomainVFP || DDomain == ARMII::DomainNEON ||
+         UDomain == ARMII::DomainVFP || UDomain == ARMII::DomainNEON;
+}

Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h?rev=116845&r1=116844&r2=116845&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h Tue Oct 19 13:58:51 2010
@@ -377,6 +377,11 @@
                         unsigned DefIdx, unsigned DefAlign,
                         const TargetInstrDesc &UseTID,
                         unsigned UseIdx, unsigned UseAlign) const;
+
+  bool hasHighOperandLatency(const InstrItineraryData *ItinData,
+                             const MachineRegisterInfo *MRI,
+                             const MachineInstr *DefMI, unsigned DefIdx,
+                             const MachineInstr *UseMI, unsigned UseIdx) const;
 };
 
 static inline

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=116845&r1=116844&r2=116845&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Tue Oct 19 13:58:51 2010
@@ -3152,6 +3152,41 @@
   NopInst.setOpcode(X86::NOOP);
 }
 
+bool X86InstrInfo::
+hasHighOperandLatency(const InstrItineraryData *ItinData,
+                      const MachineRegisterInfo *MRI,
+                      const MachineInstr *DefMI, unsigned DefIdx,
+                      const MachineInstr *UseMI, unsigned UseIdx) const {
+  switch (DefMI->getOpcode()) {
+  default: return false;
+  case X86::DIVSDrm:
+  case X86::DIVSDrm_Int:
+  case X86::DIVSDrr:
+  case X86::DIVSDrr_Int:
+  case X86::DIVSSrm:
+  case X86::DIVSSrm_Int:
+  case X86::DIVSSrr:
+  case X86::DIVSSrr_Int:
+  case X86::SQRTPDm:
+  case X86::SQRTPDm_Int:
+  case X86::SQRTPDr:
+  case X86::SQRTPDr_Int:
+  case X86::SQRTPSm:
+  case X86::SQRTPSm_Int:
+  case X86::SQRTPSr:
+  case X86::SQRTPSr_Int:
+  case X86::SQRTSDm:
+  case X86::SQRTSDm_Int:
+  case X86::SQRTSDr:
+  case X86::SQRTSDr_Int:
+  case X86::SQRTSSm:
+  case X86::SQRTSSm_Int:
+  case X86::SQRTSSr:
+  case X86::SQRTSSr_Int:
+    return true;
+  }
+}
+
 namespace {
   /// CGBR - Create Global Base Reg pass. This initializes the PIC
   /// global base register for x86-32.

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.h?rev=116845&r1=116844&r2=116845&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.h (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.h Tue Oct 19 13:58:51 2010
@@ -864,6 +864,11 @@
                                       unsigned OpNum,
                                       const SmallVectorImpl<MachineOperand> &MOs,
                                       unsigned Size, unsigned Alignment) const;
+
+  bool hasHighOperandLatency(const InstrItineraryData *ItinData,
+                             const MachineRegisterInfo *MRI,
+                             const MachineInstr *DefMI, unsigned DefIdx,
+                             const MachineInstr *UseMI, unsigned UseIdx) const;
   
 private:
   MachineInstr * convertToThreeAddressWithLEA(unsigned MIOpc,

Removed: llvm/trunk/test/CodeGen/ARM/remat.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/remat.ll?rev=116844&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/remat.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/remat.ll (removed)
@@ -1,65 +0,0 @@
-; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 -o /dev/null -stats -info-output-file - | grep "Number of re-materialization"
-
-define i32 @main(i32 %argc, i8** nocapture %argv, double %d1, double %d2) nounwind {
-entry:
-  br i1 undef, label %smvp.exit, label %bb.i3
-
-bb.i3:                                            ; preds = %bb.i3, %bb134
-  br i1 undef, label %smvp.exit, label %bb.i3
-
-smvp.exit:                                        ; preds = %bb.i3
-  %0 = fmul double %d1, 2.400000e-03            ; <double> [#uses=2]
-  br i1 undef, label %bb138.preheader, label %bb159
-
-bb138.preheader:                                  ; preds = %smvp.exit
-  br label %bb138
-
-bb138:                                            ; preds = %bb138, %bb138.preheader
-  br i1 undef, label %bb138, label %bb145.loopexit
-
-bb142:                                            ; preds = %bb.nph218.bb.nph218.split_crit_edge, %phi0.exit
-  %1 = fmul double %d1, -1.200000e-03           ; <double> [#uses=1]
-  %2 = fadd double %d2, %1                      ; <double> [#uses=1]
-  %3 = fmul double %2, %d2                      ; <double> [#uses=1]
-  %4 = fsub double 0.000000e+00, %3               ; <double> [#uses=1]
-  br i1 %14, label %phi1.exit, label %bb.i35
-
-bb.i35:                                           ; preds = %bb142
-  %5 = call  double @sin(double %15) nounwind readonly ; <double> [#uses=1]
-  %6 = fmul double %5, 0x4031740AFA84AD8A         ; <double> [#uses=1]
-  %7 = fsub double 1.000000e+00, undef            ; <double> [#uses=1]
-  %8 = fdiv double %7, 6.000000e-01               ; <double> [#uses=1]
-  br label %phi1.exit
-
-phi1.exit:                                        ; preds = %bb.i35, %bb142
-  %.pn = phi double [ %6, %bb.i35 ], [ 0.000000e+00, %bb142 ] ; <double> [#uses=1]
-  %9 = phi double [ %8, %bb.i35 ], [ 0.000000e+00, %bb142 ] ; <double> [#uses=1]
-  %10 = fmul double %.pn, %9                      ; <double> [#uses=1]
-  br i1 %14, label %phi0.exit, label %bb.i
-
-bb.i:                                             ; preds = %phi1.exit
-  unreachable
-
-phi0.exit:                                        ; preds = %phi1.exit
-  %11 = fsub double %4, %10                       ; <double> [#uses=1]
-  %12 = fadd double 0.000000e+00, %11             ; <double> [#uses=1]
-  store double %12, double* undef, align 4
-  br label %bb142
-
-bb145.loopexit:                                   ; preds = %bb138
-  br i1 undef, label %bb.nph218.bb.nph218.split_crit_edge, label %bb159
-
-bb.nph218.bb.nph218.split_crit_edge:              ; preds = %bb145.loopexit
-  %13 = fmul double %0, 0x401921FB54442D18        ; <double> [#uses=1]
-  %14 = fcmp ugt double %0, 6.000000e-01          ; <i1> [#uses=2]
-  %15 = fdiv double %13, 6.000000e-01             ; <double> [#uses=1]
-  br label %bb142
-
-bb159:                                            ; preds = %bb145.loopexit, %smvp.exit, %bb134
-  unreachable
-
-bb166:                                            ; preds = %bb127
-  unreachable
-}
-
-declare double @sin(double) nounwind readonly

Modified: llvm/trunk/test/CodeGen/Thumb2/machine-licm-vdup.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/machine-licm-vdup.ll?rev=116845&r1=116844&r2=116845&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/machine-licm-vdup.ll (original)
+++ llvm/trunk/test/CodeGen/Thumb2/machine-licm-vdup.ll Tue Oct 19 13:58:51 2010
@@ -2,17 +2,16 @@
 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -relocation-model=pic -disable-fp-elim -arm-vdup-splat | FileCheck %s 
 ; Modified version of machine-licm.ll with -arm-vdup-splat turned on, 8003375.
 ; Eventually this should become the default and be moved into machine-licm.ll.
-; FIXME: the vdup should be hoisted out of the loop, 8248029.
 
 define void @t2(i8* %ptr1, i8* %ptr2) nounwind {
 entry:
 ; CHECK: t2:
 ; CHECK: mov.w r3, #1065353216
+; CHECK: vdup.32 q{{.*}}, r3
   br i1 undef, label %bb1, label %bb2
 
 bb1:
 ; CHECK-NEXT: %bb1
-; CHECK: vdup.32 q{{.*}}, r3
   %indvar = phi i32 [ %indvar.next, %bb1 ], [ 0, %entry ]
   %tmp1 = shl i32 %indvar, 2
   %gep1 = getelementptr i8* %ptr1, i32 %tmp1

Modified: llvm/trunk/test/CodeGen/X86/2008-10-27-CoalescerBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-10-27-CoalescerBug.ll?rev=116845&r1=116844&r2=116845&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-10-27-CoalescerBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-10-27-CoalescerBug.ll Tue Oct 19 13:58:51 2010
@@ -1,6 +1,9 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 -stats |& not grep {Number of register spills}
+; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -stats |& FileCheck %s
+; Now this test spills one register. But a reload in the loop is cheaper than
+; the divsd so it's a win.
 
 define fastcc void @fourn(double* %data, i32 %isign) nounwind {
+; CHECK: fourn
 entry:
 	br label %bb
 
@@ -11,6 +14,11 @@
 	%1 = icmp sgt i32 %0, 2		; <i1> [#uses=1]
 	br i1 %1, label %bb30.loopexit, label %bb
 
+; CHECK: %bb30.loopexit
+; CHECK: divsd %xmm0
+; CHECK: movsd %xmm0, 16(%esp)
+; CHECK: .align
+; CHECK-NEXT: %bb3
 bb3:		; preds = %bb30.loopexit, %bb25, %bb3
 	%2 = load i32* null, align 4		; <i32> [#uses=1]
 	%3 = mul i32 %2, 0		; <i32> [#uses=1]

Modified: llvm/trunk/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll?rev=116845&r1=116844&r2=116845&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll Tue Oct 19 13:58:51 2010
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse41 -stats |& grep {6 machine-licm}
+; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse41 -stats |& grep {7 machine-licm}
 ; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse41 | FileCheck %s
 ; rdar://6627786
 ; rdar://7792037



From rafael.espindola at gmail.com  Tue Oct 19 14:31:38 2010
From: rafael.espindola at gmail.com (Rafael Espindola)
Date: Tue, 19 Oct 2010 19:31:38 -0000
Subject: [llvm-commits] [llvm] r116848 -
	/llvm/trunk/lib/MC/ELFObjectWriter.cpp
Message-ID: <20101019193138.197D12A6C12C@llvm.org>

Author: rafael
Date: Tue Oct 19 14:31:37 2010
New Revision: 116848

URL: http://llvm.org/viewvc/llvm-project?rev=116848&view=rev
Log:
Small cleanups and fixes in preparation for fixing _GLOBAL_OFFSET_TABLE_.

Modified:
    llvm/trunk/lib/MC/ELFObjectWriter.cpp

Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=116848&r1=116847&r2=116848&view=diff
==============================================================================
--- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original)
+++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Tue Oct 19 14:31:37 2010
@@ -703,9 +703,16 @@
       // instead?
       case X86::reloc_signed_4byte:
       case X86::reloc_pcrel_4byte:
+      case FK_Data_4:
         switch (Modifier) {
         default:
           llvm_unreachable("Unimplemented");
+        case MCSymbolRefExpr::VK_None:
+          if (Symbol->getName() == "_GLOBAL_OFFSET_TABLE_")
+            Type = ELF::R_386_GOTPC;
+          else
+            Type = ELF::R_386_32;
+          break;
         case MCSymbolRefExpr::VK_GOT:
           Type = ELF::R_386_GOT32;
           break;
@@ -714,12 +721,6 @@
           break;
         }
         break;
-      case FK_Data_4:
-        if (Symbol->getName() == "_GLOBAL_OFFSET_TABLE_")
-          Type = ELF::R_386_GOTPC;
-        else
-          Type = ELF::R_386_32;
-        break;
       case FK_Data_2: Type = ELF::R_386_16; break;
       case X86::reloc_pcrel_1byte:
       case FK_Data_1: Type = ELF::R_386_8; break;
@@ -761,11 +762,14 @@
 
 static bool isInSymtab(const MCAssembler &Asm, const MCSymbolData &Data,
                        bool Used) {
+  if (Used)
+    return true;
+
   const MCSymbol &Symbol = Data.getSymbol();
   if (!Asm.isSymbolLinkerVisible(Symbol) && !Symbol.isUndefined())
     return false;
 
-  if (!Used && Symbol.isTemporary())
+  if (Symbol.isTemporary())
     return false;
 
   return true;



From wendling at apple.com  Tue Oct 19 14:48:25 2010
From: wendling at apple.com (Bill Wendling)
Date: Tue, 19 Oct 2010 12:48:25 -0700
Subject: [llvm-commits] [llvm] r116785 -
	/llvm/trunk/lib/System/Win32/ThreadLocal.inc
In-Reply-To: <EEC41DAD-8F68-4CA7-BA38-F2E3978A8E04@apple.com>
References: <20101019012202.27CB12A6C12C@llvm.org>
	<EEC41DAD-8F68-4CA7-BA38-F2E3978A8E04@apple.com>
Message-ID: <0B4E5E66-4CA0-441F-B6B9-D93C1D3F2F1A@apple.com>

Or better yet, use the ATTRIBUTE_UNUSED attribute in llvm/Support/Compiler.h.

-bw

On Oct 19, 2010, at 9:16 AM, Jim Grosbach wrote:

> Can you add a comment saying why that line is necessary? Otherwise some well meaning person may remove the "unusued" statement.
> 
> -Jim
> 
> On Oct 18, 2010, at 6:22 PM, NAKAMURA Takumi wrote:
> 
>> Author: chapuni
>> Date: Mon Oct 18 20:22:01 2010
>> New Revision: 116785
>> 
>> URL: http://llvm.org/viewvc/llvm-project?rev=116785&view=rev
>> Log:
>> lib/System/Win32/ThreadLocal.inc: Suppress "unused" warning on -Asserts.
>> 
>> Modified:
>>   llvm/trunk/lib/System/Win32/ThreadLocal.inc
>> 
>> Modified: llvm/trunk/lib/System/Win32/ThreadLocal.inc
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Win32/ThreadLocal.inc?rev=116785&r1=116784&r2=116785&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/System/Win32/ThreadLocal.inc (original)
>> +++ llvm/trunk/lib/System/Win32/ThreadLocal.inc Mon Oct 18 20:22:01 2010
>> @@ -44,6 +44,7 @@
>>  DWORD* tls = static_cast<DWORD*>(data);
>>  int errorcode = TlsSetValue(*tls, const_cast<void*>(d));
>>  assert(errorcode != 0);
>> +  (void)errorcode;
>> }
>> 
>> void ThreadLocalImpl::removeInstance() {
>> 
>> 
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
> 
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits

-------------- next part --------------
An HTML attachment was scrubbed...
URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101019/e8a186b3/attachment.html 

From jasonwkim at google.com  Tue Oct 19 14:48:32 2010
From: jasonwkim at google.com (Jason Kim)
Date: Tue, 19 Oct 2010 12:48:32 -0700
Subject: [llvm-commits] Proof of concept patch for unifying the .s/ELF
	emission of .ARM.attributes
In-Reply-To: <AANLkTin8ykW=j=arKX3wC-CX2adx0sTtUmYMJr7qYqJY@mail.gmail.com>
References: <AANLkTikSjtvxSNc0oxKEoG2LdGriz10OXOTAtC4caR_+@mail.gmail.com>
	<AANLkTikaS4qjUi+5q3YWt_GF5EdWKVNwxq7=-LyWRRpv@mail.gmail.com>
	<AANLkTinH7mZtZSQKDYMOE9C8-0baHwm31crmp30roWKy@mail.gmail.com>
	<AANLkTimhWm3dCbO003ipXkaDS3f0o948b9b2NquVSe29@mail.gmail.com>
	<AANLkTi=2B7Pk9HkkxYvQBvm-AfJsYCHW8uYxURq5iEcd@mail.gmail.com>
	<AANLkTi=iVAmVx08ww0EOu9DvJ82oxWD+02Es3btVSqK2@mail.gmail.com>
	<AANLkTin5KdNX6g+ZRYJS0nNy6=bu4o4gwa6v5-XNwkW9@mail.gmail.com>
	<AANLkTikAPuZKYLf4iisi=C4v2onfz5qCXQ-mo2s62UNq@mail.gmail.com>
	<6D9C9A6C-872A-494D-A5F6-2523DD4CA5B6@apple.com>
	<AANLkTi=4=8T0ww0csECny4t0RMSrJV=nUT77h+759-Ab@mail.gmail.com>
	<8FD08C3F-E6E1-448B-A384-7E5CF0763EC1@apple.com>
	<AANLkTikH8sEANQrDGVHg1uOtfCs2UzygkUPpm91E9kZc@mail.gmail.com>
	<AANLkTimoHYSw=viMcpZLirRqd789_xjWmT4+foao_T6f@mail.gmail.com>
	<8E5A9C6C-BA61-41F8-B445-336D9F96D774@apple.com>
	<AANLkTiksC9MbzDhYrzLs9Kt5YRGuHu2nv3Jri=-xRKb9@mail.gmail.com>
	<AANLkTi=73V-VRH_HGiPwcQjBNcFZMiU+jazHMH3YdJ-V@mail.gmail.com>
	<AANLkTikGWx7GH5VZUByposdJWhhvc+qR6X-1Ve_gNmKG@mail.gmail.com>
	<AANLkTik7AYHB1_Crv6Vcf4uMyx4U_x5mJaYK+-S3=ucU@mail.gmail.com>
	<AANLkTi=e_fCXZo_H1=_47tv5BABbpHkf8qJiyrMfRFj_@mail.gmail.com>
	<AANLkTi=MArF+PJK1iwc66wZNobOTjC6pi127Kt=A64bp@mail.gmail.com>
	<AANLkTimHKpEKfy2mr_UKco+Uscg_YBDtCmvXhT4AhAnp@mail.gmail.com>
	<AANLkTimt3NyHcqEh38hn+FnUNL_O5Qv81OYjzE7d0Qf1@mail.gmail.com>
	<AANLkTin8ykW=j=arKX3wC-CX2adx0sTtUmYMJr7qYqJY@mail.gmail.com>
Message-ID: <AANLkTikXC0jb1VQ--c7iAgX6=DvpTHD_prwSF9F2Tjm4@mail.gmail.com>

On Tue, Oct 19, 2010 at 8:01 AM, Rafael Espindola <espindola at google.com> wrote:
>> Okay, I just committed the convert (all numbers from elf-dump are now
>> hex) as r116753.
>
> I noticed that was reverted. The first thing is to fix it and commit
> again. Once it is in:
>
> +
> + ? ?case ELF::SHT_ARM_EXIDX:
> + ? ?case ELF::SHT_ARM_PREEMPTMAP:
> + ? ? ?assert(0 && "FIXME: sh_type value not supported!");
> + ? ? ?break;
> +
> + ? ?case ELF::SHT_ARM_ATTRIBUTES:
> + ? ? ?break;
> +
> + ? ?case ELF::SHT_ARM_DEBUGOVERLAY:
> + ? ?case ELF::SHT_ARM_OVERLAYSECTION:
> ? ? default:
> ? ? ? assert(0 && "FIXME: sh_type value not supported!");
> ? ? ? break;
>
> The two new cases are exactly like the default. Same for the last two
> new one. Can you just use the default? Another option is to list every
> enum value and remove the default so that we get a warning if one is
> missing. Not sure if there are two many for this to be practical.


It is new code, and the 5 cases I added (in order of their numeric
values) are the complete set of ARM specific sections.
I guess having only active ones be 'cased' makes sense too. I'll do
your first suggestion.
I removed the 3 dangling explicitly unsupported cases, and have them
fall through to default.
Now only explicitly supported cases are listed in the switch.

Hope this is OK.

>
> It still looks like you are creating more class members than you need
> to. Take headFragment for example. It is only assigned in one place in
> the code, emitARMAttributeSection. emitARMAttributeSection is only
> called once in emitAttributes. emitARMAttributeSection can "return"
> the headFragment and that can then be passed to fixupAttrSizes.

I humbly beg to differ on this one :-)

Since emitARMAttributeSection() gets called both for .s and .o, I
don't think it makes sense for it to a MCDataFragment when it is
emitting a .s

It seems cleaner for it to just return nothing and save some state (in
case of .o emission only) instead of passing a bunch of pointer values
trampoline fashion in case of .o emission to save some slots.

Even if it were to return the headFragment, what about the
currFileFragment? (and possibly the currSectionFragment and
currSymbolFragment in the future?)
The currFileFragment is needed elsewhere, so it makes sense to save it
somewhere.
If it makes sense to store one blob, why not its container?

Does this make sense? Am I missing something?

> Cheers,
> --
> Rafael ?vila de Esp?ndola
>

Thanks!
-------------- next part --------------
A non-text attachment was scrubbed...
Name: arm-mc-elf-s06.patch6
Type: application/octet-stream
Size: 12330 bytes
Desc: not available
Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101019/d21d5ca4/attachment.obj 

From wendling at apple.com  Tue Oct 19 14:54:18 2010
From: wendling at apple.com (Bill Wendling)
Date: Tue, 19 Oct 2010 12:54:18 -0700
Subject: [llvm-commits] [llvm] r116832
	-	/llvm/trunk/include/llvm/PassSupport.h
In-Reply-To: <20101019180207.1CC2A2A6C12C@llvm.org>
References: <20101019180207.1CC2A2A6C12C@llvm.org>
Message-ID: <81A42438-0387-4554-82A3-4EA74BF54D68@apple.com>

On Oct 19, 2010, at 11:02 AM, Owen Anderson wrote:

> Author: resistor
> Date: Tue Oct 19 13:02:06 2010
> New Revision: 116832
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=116832&view=rev
> Log:
> Factor out the call-once implementation into its own macro.
> 
> Modified:
>    llvm/trunk/include/llvm/PassSupport.h
> 
> Modified: llvm/trunk/include/llvm/PassSupport.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/PassSupport.h?rev=116832&r1=116831&r2=116832&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/PassSupport.h (original)
> +++ llvm/trunk/include/llvm/PassSupport.h Tue Oct 19 13:02:06 2010
> @@ -129,6 +129,22 @@
>   PassInfo(const PassInfo &);       // do not implement
> };
> 
> +#define CALL_ONCE_INITIALIZATION(function) \
> +  static volatile sys::cas_flag initialized = 0; \
> +  sys::cas_flag old_val = sys::CompareAndSwap(&initialized, 1, 0); \
> +  if (old_val == 0) { \
> +    function(Registry); \
> +    sys::MemoryFence(); \
> +    initialized = 2; \
> +  } else { \
> +    sys::cas_flag tmp = initialized; \
> +    sys::MemoryFence(); \
> +    while (tmp != 2) { \
> +      tmp = initialized; \
> +      sys::MemoryFence(); \
> +    } \
> +  } \
> +

Could you remove the final backslash here? It's not needed and relies upon proper spacing in the file. (And is a pet peeve of mine. :-)

-bw

-------------- next part --------------
An HTML attachment was scrubbed...
URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101019/9fff07d7/attachment.html 

From resistor at mac.com  Tue Oct 19 14:54:48 2010
From: resistor at mac.com (Owen Anderson)
Date: Tue, 19 Oct 2010 19:54:48 -0000
Subject: [llvm-commits] [llvm] r116851 -
	/llvm/trunk/include/llvm/PassSupport.h
Message-ID: <20101019195448.617CF2A6C12C@llvm.org>

Author: resistor
Date: Tue Oct 19 14:54:48 2010
New Revision: 116851

URL: http://llvm.org/viewvc/llvm-project?rev=116851&view=rev
Log:
Remove extraneous slash.

Modified:
    llvm/trunk/include/llvm/PassSupport.h

Modified: llvm/trunk/include/llvm/PassSupport.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/PassSupport.h?rev=116851&r1=116850&r2=116851&view=diff
==============================================================================
--- llvm/trunk/include/llvm/PassSupport.h (original)
+++ llvm/trunk/include/llvm/PassSupport.h Tue Oct 19 14:54:48 2010
@@ -143,7 +143,7 @@
       tmp = initialized; \
       sys::MemoryFence(); \
     } \
-  } \
+  }
 
 #define INITIALIZE_PASS(passName, arg, name, cfg, analysis) \
   static void* initialize##passName##PassOnce(PassRegistry &Registry) { \



From dalej at apple.com  Tue Oct 19 15:00:17 2010
From: dalej at apple.com (Dale Johannesen)
Date: Tue, 19 Oct 2010 20:00:17 -0000
Subject: [llvm-commits] [llvm] r116852 - in /llvm/trunk:
 lib/Target/ARM/ARMISelLowering.cpp test/CodeGen/Thumb2/machine-licm-vdup.ll
 test/CodeGen/Thumb2/machine-licm.ll
Message-ID: <20101019200017.A28342A6C12C@llvm.org>

Author: johannes
Date: Tue Oct 19 15:00:17 2010
New Revision: 116852

URL: http://llvm.org/viewvc/llvm-project?rev=116852&view=rev
Log:
Enable using vdup for vector constants which are splat of
integers by default, and remove the controlling flag, now
that LICM will hoist such vdup's.  8003375.


Removed:
    llvm/trunk/test/CodeGen/Thumb2/machine-licm-vdup.ll
Modified:
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
    llvm/trunk/test/CodeGen/Thumb2/machine-licm.ll

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=116852&r1=116851&r2=116852&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Tue Oct 19 15:00:17 2010
@@ -59,13 +59,6 @@
   cl::desc("Generate tail calls (TEMPORARY OPTION)."),
   cl::init(false));
 
-// This option should go away when Machine LICM is smart enough to hoist a
-// reg-to-reg VDUP.
-static cl::opt<bool>
-EnableARMVDUPsplat("arm-vdup-splat", cl::Hidden,
-  cl::desc("Generate VDUP for integer constant splats (TEMPORARY OPTION)."),
-  cl::init(false));
-
 static cl::opt<bool>
 EnableARMLongCalls("arm-long-calls", cl::Hidden,
   cl::desc("Generate calls via indirect call instructions"),
@@ -3442,26 +3435,24 @@
 
   unsigned EltSize = VT.getVectorElementType().getSizeInBits();
 
-  if (EnableARMVDUPsplat) {
-    // Use VDUP for non-constant splats.  For f32 constant splats, reduce to
-    // i32 and try again.
-    if (usesOnlyOneValue && EltSize <= 32) {
-      if (!isConstant)
-        return DAG.getNode(ARMISD::VDUP, dl, VT, Value);
-      if (VT.getVectorElementType().isFloatingPoint()) {
-        SmallVector<SDValue, 8> Ops;
-        for (unsigned i = 0; i < NumElts; ++i)
-          Ops.push_back(DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i32,
-                                    Op.getOperand(i)));
-        SDValue Val = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32, &Ops[0],
-                                  NumElts);
-        return DAG.getNode(ISD::BIT_CONVERT, dl, VT,
-                           LowerBUILD_VECTOR(Val, DAG, ST));
-      }
-      SDValue Val = IsSingleInstrConstant(Value, DAG, ST, dl);
-      if (Val.getNode())
-        return DAG.getNode(ARMISD::VDUP, dl, VT, Val);
-    }
+  // Use VDUP for non-constant splats.  For f32 constant splats, reduce to
+  // i32 and try again.
+  if (usesOnlyOneValue && EltSize <= 32) {
+    if (!isConstant)
+      return DAG.getNode(ARMISD::VDUP, dl, VT, Value);
+    if (VT.getVectorElementType().isFloatingPoint()) {
+      SmallVector<SDValue, 8> Ops;
+      for (unsigned i = 0; i < NumElts; ++i)
+        Ops.push_back(DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i32,
+                                  Op.getOperand(i)));
+      SDValue Val = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32, &Ops[0],
+                                NumElts);
+      return DAG.getNode(ISD::BIT_CONVERT, dl, VT,
+                         LowerBUILD_VECTOR(Val, DAG, ST));
+    }
+    SDValue Val = IsSingleInstrConstant(Value, DAG, ST, dl);
+    if (Val.getNode())
+      return DAG.getNode(ARMISD::VDUP, dl, VT, Val);
   }
 
   // If all elements are constants and the case above didn't get hit, fall back
@@ -3470,12 +3461,6 @@
   if (isConstant)
     return SDValue();
 
-  if (!EnableARMVDUPsplat) {
-    // Use VDUP for non-constant splats.
-    if (usesOnlyOneValue && EltSize <= 32)
-      return DAG.getNode(ARMISD::VDUP, dl, VT, Value);
-  }
-
   // Vectors with 32- or 64-bit elements can be built by directly assigning
   // the subregisters.  Lower it to an ARMISD::BUILD_VECTOR so the operands
   // will be legalized.

Removed: llvm/trunk/test/CodeGen/Thumb2/machine-licm-vdup.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/machine-licm-vdup.ll?rev=116851&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/machine-licm-vdup.ll (original)
+++ llvm/trunk/test/CodeGen/Thumb2/machine-licm-vdup.ll (removed)
@@ -1,37 +0,0 @@
-; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -disable-fp-elim                -arm-vdup-splat | FileCheck %s
-; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -relocation-model=pic -disable-fp-elim -arm-vdup-splat | FileCheck %s 
-; Modified version of machine-licm.ll with -arm-vdup-splat turned on, 8003375.
-; Eventually this should become the default and be moved into machine-licm.ll.
-
-define void @t2(i8* %ptr1, i8* %ptr2) nounwind {
-entry:
-; CHECK: t2:
-; CHECK: mov.w r3, #1065353216
-; CHECK: vdup.32 q{{.*}}, r3
-  br i1 undef, label %bb1, label %bb2
-
-bb1:
-; CHECK-NEXT: %bb1
-  %indvar = phi i32 [ %indvar.next, %bb1 ], [ 0, %entry ]
-  %tmp1 = shl i32 %indvar, 2
-  %gep1 = getelementptr i8* %ptr1, i32 %tmp1
-  %tmp2 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* %gep1, i32 1)
-  %tmp3 = call <4 x float> @llvm.arm.neon.vmaxs.v4f32(<4 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>, <4 x float> %tmp2)
-  %gep2 = getelementptr i8* %ptr2, i32 %tmp1
-  call void @llvm.arm.neon.vst1.v4f32(i8* %gep2, <4 x float> %tmp3, i32 1)
-  %indvar.next = add i32 %indvar, 1
-  %cond = icmp eq i32 %indvar.next, 10
-  br i1 %cond, label %bb2, label %bb1
-
-bb2:
-  ret void
-}
-
-; CHECK-NOT: LCPI1_0:
-; CHECK: .subsections_via_symbols
-
-declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*, i32) nounwind readonly
-
-declare void @llvm.arm.neon.vst1.v4f32(i8*, <4 x float>, i32) nounwind
-
-declare <4 x float> @llvm.arm.neon.vmaxs.v4f32(<4 x float>, <4 x float>) nounwind readnone

Modified: llvm/trunk/test/CodeGen/Thumb2/machine-licm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/machine-licm.ll?rev=116852&r1=116851&r2=116852&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/machine-licm.ll (original)
+++ llvm/trunk/test/CodeGen/Thumb2/machine-licm.ll Tue Oct 19 15:00:17 2010
@@ -55,8 +55,8 @@
 define void @t2(i8* %ptr1, i8* %ptr2) nounwind {
 entry:
 ; CHECK: t2:
-; CHECK: adr r{{.}}, #LCPI1_0
-; CHECK: vldmia r3, {d16, d17}
+; CHECK: mov.w r3, #1065353216
+; CHECK: vdup.32 q{{.*}}, r3
   br i1 undef, label %bb1, label %bb2
 
 bb1:
@@ -76,8 +76,8 @@
   ret void
 }
 
-; CHECK: LCPI1_0:
-; CHECK: .section
+; CHECK-NOT: LCPI1_0:
+; CHECK: .subsections_via_symbols
 
 declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*, i32) nounwind readonly
 



From wendling at apple.com  Tue Oct 19 15:08:10 2010
From: wendling at apple.com (Bill Wendling)
Date: Tue, 19 Oct 2010 13:08:10 -0700
Subject: [llvm-commits] [llvm] r116851
	-	/llvm/trunk/include/llvm/PassSupport.h
In-Reply-To: <20101019195448.617CF2A6C12C@llvm.org>
References: <20101019195448.617CF2A6C12C@llvm.org>
Message-ID: <DFA0F820-D40A-436A-B03C-F32E0007E195@apple.com>

Thanks! :-)

-bw

On Oct 19, 2010, at 12:54 PM, Owen Anderson wrote:

> Author: resistor
> Date: Tue Oct 19 14:54:48 2010
> New Revision: 116851
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=116851&view=rev
> Log:
> Remove extraneous slash.
> 
> Modified:
>    llvm/trunk/include/llvm/PassSupport.h
> 
> Modified: llvm/trunk/include/llvm/PassSupport.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/PassSupport.h?rev=116851&r1=116850&r2=116851&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/PassSupport.h (original)
> +++ llvm/trunk/include/llvm/PassSupport.h Tue Oct 19 14:54:48 2010
> @@ -143,7 +143,7 @@
>       tmp = initialized; \
>       sys::MemoryFence(); \
>     } \
> -  } \
> +  }
> 
> #define INITIALIZE_PASS(passName, arg, name, cfg, analysis) \
>   static void* initialize##passName##PassOnce(PassRegistry &Registry) { \
> 
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits

-------------- next part --------------
An HTML attachment was scrubbed...
URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101019/8e59c782/attachment.html 

From resistor at mac.com  Tue Oct 19 15:08:44 2010
From: resistor at mac.com (Owen Anderson)
Date: Tue, 19 Oct 2010 20:08:44 -0000
Subject: [llvm-commits] [llvm] r116854 - in /llvm/trunk/lib/Transforms:
 Scalar/LICM.cpp Scalar/LoopDeletion.cpp Scalar/LoopRotation.cpp
 Scalar/LoopStrengthReduce.cpp Scalar/LoopUnrollPass.cpp
 Scalar/LoopUnswitch.cpp Utils/LCSSA.cpp Utils/Mem2Reg.cpp
Message-ID: <20101019200844.907362A6C12C@llvm.org>

Author: resistor
Date: Tue Oct 19 15:08:44 2010
New Revision: 116854

URL: http://llvm.org/viewvc/llvm-project?rev=116854&view=rev
Log:
Passes do not need to recursively initialize passes that they preserve, if
they do not also require them.  This allows us to reduce inter-pass linkage
dependencies.

Modified:
    llvm/trunk/lib/Transforms/Scalar/LICM.cpp
    llvm/trunk/lib/Transforms/Scalar/LoopDeletion.cpp
    llvm/trunk/lib/Transforms/Scalar/LoopRotation.cpp
    llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp
    llvm/trunk/lib/Transforms/Scalar/LoopUnrollPass.cpp
    llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp
    llvm/trunk/lib/Transforms/Utils/LCSSA.cpp
    llvm/trunk/lib/Transforms/Utils/Mem2Reg.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/LICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LICM.cpp?rev=116854&r1=116853&r2=116854&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LICM.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LICM.cpp Tue Oct 19 15:08:44 2010
@@ -207,7 +207,6 @@
 INITIALIZE_PASS_BEGIN(LICM, "licm", "Loop Invariant Code Motion", false, false)
 INITIALIZE_PASS_DEPENDENCY(DominatorTree)
 INITIALIZE_PASS_DEPENDENCY(LoopInfo)
-INITIALIZE_PASS_DEPENDENCY(ScalarEvolution)
 INITIALIZE_PASS_DEPENDENCY(LoopSimplify)
 INITIALIZE_AG_DEPENDENCY(AliasAnalysis)
 INITIALIZE_PASS_END(LICM, "licm", "Loop Invariant Code Motion", false, false)

Modified: llvm/trunk/lib/Transforms/Scalar/LoopDeletion.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopDeletion.cpp?rev=116854&r1=116853&r2=116854&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LoopDeletion.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LoopDeletion.cpp Tue Oct 19 15:08:44 2010
@@ -64,7 +64,6 @@
 INITIALIZE_PASS_DEPENDENCY(ScalarEvolution)
 INITIALIZE_PASS_DEPENDENCY(LoopSimplify)
 INITIALIZE_PASS_DEPENDENCY(LCSSA)
-INITIALIZE_PASS_DEPENDENCY(DominanceFrontier)
 INITIALIZE_PASS_END(LoopDeletion, "loop-deletion",
                 "Delete dead loops", false, false)
 

Modified: llvm/trunk/lib/Transforms/Scalar/LoopRotation.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopRotation.cpp?rev=116854&r1=116853&r2=116854&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LoopRotation.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LoopRotation.cpp Tue Oct 19 15:08:44 2010
@@ -82,12 +82,9 @@
   
 char LoopRotate::ID = 0;
 INITIALIZE_PASS_BEGIN(LoopRotate, "loop-rotate", "Rotate Loops", false, false)
-INITIALIZE_PASS_DEPENDENCY(DominatorTree)
-INITIALIZE_PASS_DEPENDENCY(DominanceFrontier)
 INITIALIZE_PASS_DEPENDENCY(LoopInfo)
 INITIALIZE_PASS_DEPENDENCY(LoopSimplify)
 INITIALIZE_PASS_DEPENDENCY(LCSSA)
-INITIALIZE_PASS_DEPENDENCY(ScalarEvolution)
 INITIALIZE_PASS_END(LoopRotate, "loop-rotate", "Rotate Loops", false, false)
 
 Pass *llvm::createLoopRotatePass() { return new LoopRotate(); }

Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp?rev=116854&r1=116853&r2=116854&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Tue Oct 19 15:08:44 2010
@@ -3793,11 +3793,11 @@
 char LoopStrengthReduce::ID = 0;
 INITIALIZE_PASS_BEGIN(LoopStrengthReduce, "loop-reduce",
                 "Loop Strength Reduction", false, false)
-INITIALIZE_PASS_DEPENDENCY(LoopSimplify)
-INITIALIZE_PASS_DEPENDENCY(DominanceFrontier)
 INITIALIZE_PASS_DEPENDENCY(DominatorTree)
 INITIALIZE_PASS_DEPENDENCY(ScalarEvolution)
 INITIALIZE_PASS_DEPENDENCY(IVUsers)
+INITIALIZE_PASS_DEPENDENCY(LoopInfo)
+INITIALIZE_PASS_DEPENDENCY(LoopSimplify)
 INITIALIZE_PASS_END(LoopStrengthReduce, "loop-reduce",
                 "Loop Strength Reduction", false, false)
 

Modified: llvm/trunk/lib/Transforms/Scalar/LoopUnrollPass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopUnrollPass.cpp?rev=116854&r1=116853&r2=116854&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LoopUnrollPass.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LoopUnrollPass.cpp Tue Oct 19 15:08:44 2010
@@ -85,8 +85,6 @@
 INITIALIZE_PASS_DEPENDENCY(LoopInfo)
 INITIALIZE_PASS_DEPENDENCY(LoopSimplify)
 INITIALIZE_PASS_DEPENDENCY(LCSSA)
-INITIALIZE_PASS_DEPENDENCY(ScalarEvolution)
-INITIALIZE_PASS_DEPENDENCY(DominatorTree)
 INITIALIZE_PASS_END(LoopUnroll, "loop-unroll", "Unroll loops", false, false)
 
 Pass *llvm::createLoopUnrollPass() { return new LoopUnroll(); }

Modified: llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp?rev=116854&r1=116853&r2=116854&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp Tue Oct 19 15:08:44 2010
@@ -165,7 +165,6 @@
 INITIALIZE_PASS_DEPENDENCY(LoopSimplify)
 INITIALIZE_PASS_DEPENDENCY(LoopInfo)
 INITIALIZE_PASS_DEPENDENCY(LCSSA)
-INITIALIZE_PASS_DEPENDENCY(DominatorTree)
 INITIALIZE_PASS_END(LoopUnswitch, "loop-unswitch", "Unswitch loops",
                       false, false)
 

Modified: llvm/trunk/lib/Transforms/Utils/LCSSA.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/LCSSA.cpp?rev=116854&r1=116853&r2=116854&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Utils/LCSSA.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/LCSSA.cpp Tue Oct 19 15:08:44 2010
@@ -94,10 +94,7 @@
 char LCSSA::ID = 0;
 INITIALIZE_PASS_BEGIN(LCSSA, "lcssa", "Loop-Closed SSA Form Pass", false, false)
 INITIALIZE_PASS_DEPENDENCY(DominatorTree)
-INITIALIZE_PASS_DEPENDENCY(DominanceFrontier)
 INITIALIZE_PASS_DEPENDENCY(LoopInfo)
-INITIALIZE_PASS_DEPENDENCY(LoopSimplify)
-INITIALIZE_PASS_DEPENDENCY(ScalarEvolution)
 INITIALIZE_PASS_END(LCSSA, "lcssa", "Loop-Closed SSA Form Pass", false, false)
 
 Pass *llvm::createLCSSAPass() { return new LCSSA(); }

Modified: llvm/trunk/lib/Transforms/Utils/Mem2Reg.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/Mem2Reg.cpp?rev=116854&r1=116853&r2=116854&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Utils/Mem2Reg.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/Mem2Reg.cpp Tue Oct 19 15:08:44 2010
@@ -55,9 +55,6 @@
                 false, false)
 INITIALIZE_PASS_DEPENDENCY(DominatorTree)
 INITIALIZE_PASS_DEPENDENCY(DominanceFrontier)
-INITIALIZE_PASS_DEPENDENCY(UnifyFunctionExitNodes)
-INITIALIZE_PASS_DEPENDENCY(LowerSwitch)
-INITIALIZE_PASS_DEPENDENCY(LowerInvoke)
 INITIALIZE_PASS_END(PromotePass, "mem2reg", "Promote Memory to Register",
                 false, false)
 



From stoklund at 2pi.dk  Tue Oct 19 15:56:32 2010
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Tue, 19 Oct 2010 20:56:32 -0000
Subject: [llvm-commits] [llvm] r116857 - in /llvm/trunk:
 include/llvm/CodeGen/MachineOperand.h lib/CodeGen/MachineInstr.cpp
Message-ID: <20101019205633.09A7D2A6C12C@llvm.org>

Author: stoklund
Date: Tue Oct 19 15:56:32 2010
New Revision: 116857

URL: http://llvm.org/viewvc/llvm-project?rev=116857&view=rev
Log:
Shrink MachineOperand from 40 to 32 bytes on 64-bit hosts.

Pull an unsigned out of the Contents union such that it has the same size as two
pointers and no padding.

Arrange members such that the Contents union and all pointers can be 8-byte
aligned without padding.

This speeds up code generation by 0.8% on a 64-bit host. 32-bit hosts should be
unaffected.

Modified:
    llvm/trunk/include/llvm/CodeGen/MachineOperand.h
    llvm/trunk/lib/CodeGen/MachineInstr.cpp

Modified: llvm/trunk/include/llvm/CodeGen/MachineOperand.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineOperand.h?rev=116857&r1=116856&r2=116857&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineOperand.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineOperand.h Tue Oct 19 15:56:32 2010
@@ -94,6 +94,15 @@
   /// not a real instruction.  Such uses should be ignored during codegen.
   bool IsDebug : 1;
 
+  /// SmallContents - Thisreally should be part of the Contents union, but lives
+  /// out here so we can get a better packed struct.
+  /// MO_Register: Register number.
+  /// OffsetedInfo: Low bits of offset.
+  union {
+    unsigned RegNo;           // For MO_Register.
+    unsigned OffsetLo;        // Matches Contents.OffsetedInfo.OffsetHi.
+  } SmallContents;
+
   /// ParentMI - This is the instruction that this operand is embedded into.
   /// This is valid for all operand types, when the operand is in an instr.
   MachineInstr *ParentMI;
@@ -107,7 +116,7 @@
     MCSymbol *Sym;            // For MO_MCSymbol
 
     struct {                  // For MO_Register.
-      unsigned RegNo;
+      // Register number is in SmallContents.RegNo.
       MachineOperand **Prev;  // Access list for register.
       MachineOperand *Next;
     } Reg;
@@ -121,7 +130,8 @@
         const GlobalValue *GV;    // For MO_GlobalAddress.
         const BlockAddress *BA;   // For MO_BlockAddress.
       } Val;
-      int64_t Offset;             // An offset from the object.
+      // Low bits of offset are in SmallContents.OffsetLo.
+      int OffsetHi;               // An offset from the object, high 32 bits.
     } OffsetedInfo;
   } Contents;
 
@@ -180,7 +190,7 @@
   /// getReg - Returns the register number.
   unsigned getReg() const {
     assert(isReg() && "This is not a register operand!");
-    return Contents.Reg.RegNo;
+    return SmallContents.RegNo;
   }
 
   unsigned getSubReg() const {
@@ -349,7 +359,8 @@
   int64_t getOffset() const {
     assert((isGlobal() || isSymbol() || isCPI() || isBlockAddress()) &&
            "Wrong MachineOperand accessor");
-    return Contents.OffsetedInfo.Offset;
+    return (int64_t(Contents.OffsetedInfo.OffsetHi) << 32) |
+           SmallContents.OffsetLo;
   }
 
   const char *getSymbolName() const {
@@ -374,7 +385,8 @@
   void setOffset(int64_t Offset) {
     assert((isGlobal() || isSymbol() || isCPI() || isBlockAddress()) &&
         "Wrong MachineOperand accessor");
-    Contents.OffsetedInfo.Offset = Offset;
+    SmallContents.OffsetLo = unsigned(Offset);
+    Contents.OffsetedInfo.OffsetHi = int(Offset >> 32);
   }
 
   void setIndex(int Idx) {
@@ -438,7 +450,7 @@
     Op.IsUndef = isUndef;
     Op.IsEarlyClobber = isEarlyClobber;
     Op.IsDebug = isDebug;
-    Op.Contents.Reg.RegNo = Reg;
+    Op.SmallContents.RegNo = Reg;
     Op.Contents.Reg.Prev = 0;
     Op.Contents.Reg.Next = 0;
     Op.SubReg = SubReg;

Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=116857&r1=116856&r2=116857&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Tue Oct 19 15:56:32 2010
@@ -102,13 +102,13 @@
     if (MachineBasicBlock *MBB = MI->getParent())
       if (MachineFunction *MF = MBB->getParent()) {
         RemoveRegOperandFromRegInfo();
-        Contents.Reg.RegNo = Reg;
+        SmallContents.RegNo = Reg;
         AddRegOperandToRegInfo(&MF->getRegInfo());
         return;
       }
         
   // Otherwise, just change the register, no problem.  :)
-  Contents.Reg.RegNo = Reg;
+  SmallContents.RegNo = Reg;
 }
 
 void MachineOperand::substVirtReg(unsigned Reg, unsigned SubIdx,
@@ -159,7 +159,7 @@
   } else {
     // Otherwise, change this to a register and set the reg#.
     OpKind = MO_Register;
-    Contents.Reg.RegNo = Reg;
+    SmallContents.RegNo = Reg;
 
     // If this operand is embedded in a function, add the operand to the
     // register's use/def list.



From gohman at apple.com  Tue Oct 19 16:06:16 2010
From: gohman at apple.com (Dan Gohman)
Date: Tue, 19 Oct 2010 21:06:16 -0000
Subject: [llvm-commits] [llvm] r116858 - in /llvm/trunk:
 include/llvm/Analysis/AliasAnalysis.h
 include/llvm/Analysis/AliasSetTracker.h lib/Analysis/AliasAnalysis.cpp
 lib/Analysis/AliasAnalysisEvaluator.cpp lib/Analysis/AliasSetTracker.cpp
 lib/Analysis/BasicAliasAnalysis.cpp lib/Analysis/Lint.cpp
 lib/Transforms/Scalar/DeadStoreElimination.cpp
 lib/Transforms/Scalar/MemCpyOptimizer.cpp
Message-ID: <20101019210616.801C82A6C12C@llvm.org>

Author: djg
Date: Tue Oct 19 16:06:16 2010
New Revision: 116858

URL: http://llvm.org/viewvc/llvm-project?rev=116858&view=rev
Log:
Revert r116831 and r116839, which are breaking selfhost builds.

Modified:
    llvm/trunk/include/llvm/Analysis/AliasAnalysis.h
    llvm/trunk/include/llvm/Analysis/AliasSetTracker.h
    llvm/trunk/lib/Analysis/AliasAnalysis.cpp
    llvm/trunk/lib/Analysis/AliasAnalysisEvaluator.cpp
    llvm/trunk/lib/Analysis/AliasSetTracker.cpp
    llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp
    llvm/trunk/lib/Analysis/Lint.cpp
    llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp
    llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp

Modified: llvm/trunk/include/llvm/Analysis/AliasAnalysis.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/AliasAnalysis.h?rev=116858&r1=116857&r2=116858&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/AliasAnalysis.h (original)
+++ llvm/trunk/include/llvm/Analysis/AliasAnalysis.h Tue Oct 19 16:06:16 2010
@@ -67,7 +67,7 @@
   /// UnknownSize - This is a special value which can be used with the
   /// size arguments in alias queries to indicate that the caller does not
   /// know the sizes of the potential memory references.
-  static uint64_t const UnknownSize = ~UINT64_C(0);
+  static unsigned const UnknownSize = ~0u;
 
   /// getTargetData - Return a pointer to the current TargetData object, or
   /// null if no TargetData object is available.
@@ -77,7 +77,7 @@
   /// getTypeStoreSize - Return the TargetData store size for the given type,
   /// if known, or a conservative value otherwise.
   ///
-  uint64_t getTypeStoreSize(const Type *Ty);
+  unsigned getTypeStoreSize(const Type *Ty);
 
   //===--------------------------------------------------------------------===//
   /// Alias Queries...
@@ -88,13 +88,13 @@
     /// Ptr - The address of the start of the location.
     const Value *Ptr;
     /// Size - The size of the location.
-    uint64_t Size;
+    unsigned Size;
     /// TBAATag - The metadata node which describes the TBAA type of
     /// the location, or null if there is no (unique) tag.
     const MDNode *TBAATag;
 
     explicit Location(const Value *P = 0,
-                      uint64_t S = UnknownSize,
+                      unsigned S = UnknownSize,
                       const MDNode *N = 0)
       : Ptr(P), Size(S), TBAATag(N) {}
 
@@ -129,8 +129,8 @@
   virtual AliasResult alias(const Location &LocA, const Location &LocB);
 
   /// alias - A convenience wrapper.
-  AliasResult alias(const Value *V1, uint64_t V1Size,
-                    const Value *V2, uint64_t V2Size) {
+  AliasResult alias(const Value *V1, unsigned V1Size,
+                    const Value *V2, unsigned V2Size) {
     return alias(Location(V1, V1Size), Location(V2, V2Size));
   }
 
@@ -146,8 +146,8 @@
   }
 
   /// isNoAlias - A convenience wrapper.
-  bool isNoAlias(const Value *V1, uint64_t V1Size,
-                 const Value *V2, uint64_t V2Size) {
+  bool isNoAlias(const Value *V1, unsigned V1Size,
+                 const Value *V2, unsigned V2Size) {
     return isNoAlias(Location(V1, V1Size), Location(V2, V2Size));
   }
 
@@ -278,7 +278,7 @@
 
   /// getModRefInfo - A convenience wrapper.
   ModRefResult getModRefInfo(const Instruction *I,
-                             const Value *P, uint64_t Size) {
+                             const Value *P, unsigned Size) {
     return getModRefInfo(I, Location(P, Size));
   }
 
@@ -289,7 +289,7 @@
 
   /// getModRefInfo (for call sites) - A convenience wrapper.
   ModRefResult getModRefInfo(ImmutableCallSite CS,
-                             const Value *P, uint64_t Size) {
+                             const Value *P, unsigned Size) {
     return getModRefInfo(CS, Location(P, Size));
   }
 
@@ -300,7 +300,7 @@
   }
 
   /// getModRefInfo (for calls) - A convenience wrapper.
-  ModRefResult getModRefInfo(const CallInst *C, const Value *P, uint64_t Size) {
+  ModRefResult getModRefInfo(const CallInst *C, const Value *P, unsigned Size) {
     return getModRefInfo(C, Location(P, Size));
   }
 
@@ -313,7 +313,7 @@
 
   /// getModRefInfo (for invokes) - A convenience wrapper.
   ModRefResult getModRefInfo(const InvokeInst *I,
-                             const Value *P, uint64_t Size) {
+                             const Value *P, unsigned Size) {
     return getModRefInfo(I, Location(P, Size));
   }
 
@@ -322,7 +322,7 @@
   ModRefResult getModRefInfo(const LoadInst *L, const Location &Loc);
 
   /// getModRefInfo (for loads) - A convenience wrapper.
-  ModRefResult getModRefInfo(const LoadInst *L, const Value *P, uint64_t Size) {
+  ModRefResult getModRefInfo(const LoadInst *L, const Value *P, unsigned Size) {
     return getModRefInfo(L, Location(P, Size));
   }
 
@@ -331,7 +331,7 @@
   ModRefResult getModRefInfo(const StoreInst *S, const Location &Loc);
 
   /// getModRefInfo (for stores) - A convenience wrapper.
-  ModRefResult getModRefInfo(const StoreInst *S, const Value *P, uint64_t Size) {
+  ModRefResult getModRefInfo(const StoreInst *S, const Value *P, unsigned Size) {
     return getModRefInfo(S, Location(P, Size));
   }
 
@@ -340,7 +340,7 @@
   ModRefResult getModRefInfo(const VAArgInst* I, const Location &Loc);
 
   /// getModRefInfo (for va_args) - A convenience wrapper.
-  ModRefResult getModRefInfo(const VAArgInst* I, const Value* P, uint64_t Size) {
+  ModRefResult getModRefInfo(const VAArgInst* I, const Value* P, unsigned Size) {
     return getModRefInfo(I, Location(P, Size));
   }
 
@@ -360,7 +360,7 @@
   bool canBasicBlockModify(const BasicBlock &BB, const Location &Loc);
 
   /// canBasicBlockModify - A convenience wrapper.
-  bool canBasicBlockModify(const BasicBlock &BB, const Value *P, uint64_t Size){
+  bool canBasicBlockModify(const BasicBlock &BB, const Value *P, unsigned Size){
     return canBasicBlockModify(BB, Location(P, Size));
   }
 
@@ -373,7 +373,7 @@
 
   /// canInstructionRangeModify - A convenience wrapper.
   bool canInstructionRangeModify(const Instruction &I1, const Instruction &I2,
-                                 const Value *Ptr, uint64_t Size) {
+                                 const Value *Ptr, unsigned Size) {
     return canInstructionRangeModify(I1, I2, Location(Ptr, Size));
   }
 

Modified: llvm/trunk/include/llvm/Analysis/AliasSetTracker.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/AliasSetTracker.h?rev=116858&r1=116857&r2=116858&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/AliasSetTracker.h (original)
+++ llvm/trunk/include/llvm/Analysis/AliasSetTracker.h Tue Oct 19 16:06:16 2010
@@ -40,7 +40,7 @@
     Value *Val;  // The pointer this record corresponds to.
     PointerRec **PrevInList, *NextInList;
     AliasSet *AS;
-    uint64_t Size;
+    unsigned Size;
     const MDNode *TBAAInfo;
   public:
     PointerRec(Value *V)
@@ -57,7 +57,7 @@
       return &NextInList;
     }
 
-    void updateSizeAndTBAAInfo(uint64_t NewSize, const MDNode *NewTBAAInfo) {
+    void updateSizeAndTBAAInfo(unsigned NewSize, const MDNode *NewTBAAInfo) {
       if (NewSize > Size) Size = NewSize;
 
       if (TBAAInfo == DenseMapInfo<const MDNode *>::getEmptyKey())
@@ -68,7 +68,7 @@
         TBAAInfo = DenseMapInfo<const MDNode *>::getTombstoneKey();
     }
 
-    uint64_t getSize() const { return Size; }
+    unsigned getSize() const { return Size; }
 
     /// getTBAAInfo - Return the TBAAInfo, or null if there is no
     /// information or conflicting information.
@@ -205,7 +205,7 @@
     value_type *operator->() const { return &operator*(); }
 
     Value *getPointer() const { return CurNode->getValue(); }
-    uint64_t getSize() const { return CurNode->getSize(); }
+    unsigned getSize() const { return CurNode->getSize(); }
     const MDNode *getTBAAInfo() const { return CurNode->getTBAAInfo(); }
 
     iterator& operator++() {                // Preincrement
@@ -250,7 +250,7 @@
 
   void removeFromTracker(AliasSetTracker &AST);
 
-  void addPointer(AliasSetTracker &AST, PointerRec &Entry, uint64_t Size,
+  void addPointer(AliasSetTracker &AST, PointerRec &Entry, unsigned Size,
                   const MDNode *TBAAInfo,
                   bool KnownMustAlias = false);
   void addCallSite(CallSite CS, AliasAnalysis &AA);
@@ -266,7 +266,7 @@
   /// aliasesPointer - Return true if the specified pointer "may" (or must)
   /// alias one of the members in the set.
   ///
-  bool aliasesPointer(const Value *Ptr, uint64_t Size, const MDNode *TBAAInfo,
+  bool aliasesPointer(const Value *Ptr, unsigned Size, const MDNode *TBAAInfo,
                       AliasAnalysis &AA) const;
   bool aliasesCallSite(CallSite CS, AliasAnalysis &AA) const;
 };
@@ -320,7 +320,7 @@
   /// These methods return true if inserting the instruction resulted in the
   /// addition of a new alias set (i.e., the pointer did not alias anything).
   ///
-  bool add(Value *Ptr, uint64_t Size, const MDNode *TBAAInfo); // Add a location
+  bool add(Value *Ptr, unsigned Size, const MDNode *TBAAInfo); // Add a location
   bool add(LoadInst *LI);
   bool add(StoreInst *SI);
   bool add(VAArgInst *VAAI);
@@ -335,7 +335,7 @@
   /// be aliased by the specified instruction.  These methods return true if any
   /// alias sets were eliminated.
   // Remove a location
-  bool remove(Value *Ptr, uint64_t Size, const MDNode *TBAAInfo);
+  bool remove(Value *Ptr, unsigned Size, const MDNode *TBAAInfo);
   bool remove(LoadInst *LI);
   bool remove(StoreInst *SI);
   bool remove(VAArgInst *VAAI);
@@ -355,13 +355,13 @@
   /// lives in.  If the New argument is non-null, this method sets the value to
   /// true if a new alias set is created to contain the pointer (because the
   /// pointer didn't alias anything).
-  AliasSet &getAliasSetForPointer(Value *P, uint64_t Size,
+  AliasSet &getAliasSetForPointer(Value *P, unsigned Size,
                                   const MDNode *TBAAInfo,
                                   bool *New = 0);
 
   /// getAliasSetForPointerIfExists - Return the alias set containing the
   /// location specified if one exists, otherwise return null.
-  AliasSet *getAliasSetForPointerIfExists(Value *P, uint64_t Size,
+  AliasSet *getAliasSetForPointerIfExists(Value *P, unsigned Size,
                                           const MDNode *TBAAInfo) {
     return findAliasSetForPointer(P, Size, TBAAInfo);
   }
@@ -369,7 +369,7 @@
   /// containsPointer - Return true if the specified location is represented by
   /// this alias set, false otherwise.  This does not modify the AST object or
   /// alias sets.
-  bool containsPointer(Value *P, uint64_t Size, const MDNode *TBAAInfo) const;
+  bool containsPointer(Value *P, unsigned Size, const MDNode *TBAAInfo) const;
 
   /// getAliasAnalysis - Return the underlying alias analysis object used by
   /// this tracker.
@@ -416,7 +416,7 @@
     return *Entry;
   }
 
-  AliasSet &addPointer(Value *P, uint64_t Size, const MDNode *TBAAInfo,
+  AliasSet &addPointer(Value *P, unsigned Size, const MDNode *TBAAInfo,
                        AliasSet::AccessType E,
                        bool &NewSet) {
     NewSet = false;
@@ -424,7 +424,7 @@
     AS.AccessTy |= E;
     return AS;
   }
-  AliasSet *findAliasSetForPointer(const Value *Ptr, uint64_t Size,
+  AliasSet *findAliasSetForPointer(const Value *Ptr, unsigned Size,
                                    const MDNode *TBAAInfo);
 
   AliasSet *findAliasSetForCallSite(CallSite CS);

Modified: llvm/trunk/lib/Analysis/AliasAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/AliasAnalysis.cpp?rev=116858&r1=116857&r2=116858&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/AliasAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/AliasAnalysis.cpp Tue Oct 19 16:06:16 2010
@@ -283,7 +283,7 @@
 /// getTypeStoreSize - Return the TargetData store size for the given type,
 /// if known, or a conservative value otherwise.
 ///
-uint64_t AliasAnalysis::getTypeStoreSize(const Type *Ty) {
+unsigned AliasAnalysis::getTypeStoreSize(const Type *Ty) {
   return TD ? TD->getTypeStoreSize(Ty) : UnknownSize;
 }
 

Modified: llvm/trunk/lib/Analysis/AliasAnalysisEvaluator.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/AliasAnalysisEvaluator.cpp?rev=116858&r1=116857&r2=116858&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/AliasAnalysisEvaluator.cpp (original)
+++ llvm/trunk/lib/Analysis/AliasAnalysisEvaluator.cpp Tue Oct 19 16:06:16 2010
@@ -168,12 +168,12 @@
   // iterate over the worklist, and run the full (n^2)/2 disambiguations
   for (SetVector<Value *>::iterator I1 = Pointers.begin(), E = Pointers.end();
        I1 != E; ++I1) {
-    uint64_t I1Size = AliasAnalysis::UnknownSize;
+    unsigned I1Size = AliasAnalysis::UnknownSize;
     const Type *I1ElTy = cast<PointerType>((*I1)->getType())->getElementType();
     if (I1ElTy->isSized()) I1Size = AA.getTypeStoreSize(I1ElTy);
 
     for (SetVector<Value *>::iterator I2 = Pointers.begin(); I2 != I1; ++I2) {
-      uint64_t I2Size = AliasAnalysis::UnknownSize;
+      unsigned I2Size = AliasAnalysis::UnknownSize;
       const Type *I2ElTy =cast<PointerType>((*I2)->getType())->getElementType();
       if (I2ElTy->isSized()) I2Size = AA.getTypeStoreSize(I2ElTy);
 
@@ -200,7 +200,7 @@
 
     for (SetVector<Value *>::iterator V = Pointers.begin(), Ve = Pointers.end();
          V != Ve; ++V) {
-      uint64_t Size = AliasAnalysis::UnknownSize;
+      unsigned Size = AliasAnalysis::UnknownSize;
       const Type *ElTy = cast<PointerType>((*V)->getType())->getElementType();
       if (ElTy->isSized()) Size = AA.getTypeStoreSize(ElTy);
 

Modified: llvm/trunk/lib/Analysis/AliasSetTracker.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/AliasSetTracker.cpp?rev=116858&r1=116857&r2=116858&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/AliasSetTracker.cpp (original)
+++ llvm/trunk/lib/Analysis/AliasSetTracker.cpp Tue Oct 19 16:06:16 2010
@@ -88,7 +88,7 @@
 }
 
 void AliasSet::addPointer(AliasSetTracker &AST, PointerRec &Entry,
-                          uint64_t Size, const MDNode *TBAAInfo,
+                          unsigned Size, const MDNode *TBAAInfo,
                           bool KnownMustAlias) {
   assert(!Entry.hasAliasSet() && "Entry already in set!");
 
@@ -138,7 +138,7 @@
 /// aliasesPointer - Return true if the specified pointer "may" (or must)
 /// alias one of the members in the set.
 ///
-bool AliasSet::aliasesPointer(const Value *Ptr, uint64_t Size,
+bool AliasSet::aliasesPointer(const Value *Ptr, unsigned Size,
                               const MDNode *TBAAInfo,
                               AliasAnalysis &AA) const {
   if (AliasTy == MustAlias) {
@@ -210,7 +210,7 @@
 /// that may alias the pointer, merge them together and return the unified set.
 ///
 AliasSet *AliasSetTracker::findAliasSetForPointer(const Value *Ptr,
-                                                  uint64_t Size,
+                                                  unsigned Size,
                                                   const MDNode *TBAAInfo) {
   AliasSet *FoundSet = 0;
   for (iterator I = begin(), E = end(); I != E; ++I) {
@@ -229,7 +229,7 @@
 /// containsPointer - Return true if the specified location is represented by
 /// this alias set, false otherwise.  This does not modify the AST object or
 /// alias sets.
-bool AliasSetTracker::containsPointer(Value *Ptr, uint64_t Size,
+bool AliasSetTracker::containsPointer(Value *Ptr, unsigned Size,
                                       const MDNode *TBAAInfo) const {
   for (const_iterator I = begin(), E = end(); I != E; ++I)
     if (!I->Forward && I->aliasesPointer(Ptr, Size, TBAAInfo, AA))
@@ -258,7 +258,7 @@
 
 /// getAliasSetForPointer - Return the alias set that the specified pointer
 /// lives in.
-AliasSet &AliasSetTracker::getAliasSetForPointer(Value *Pointer, uint64_t Size,
+AliasSet &AliasSetTracker::getAliasSetForPointer(Value *Pointer, unsigned Size,
                                                  const MDNode *TBAAInfo,
                                                  bool *New) {
   AliasSet::PointerRec &Entry = getEntryFor(Pointer);
@@ -283,7 +283,7 @@
   return AliasSets.back();
 }
 
-bool AliasSetTracker::add(Value *Ptr, uint64_t Size, const MDNode *TBAAInfo) {
+bool AliasSetTracker::add(Value *Ptr, unsigned Size, const MDNode *TBAAInfo) {
   bool NewPtr;
   addPointer(Ptr, Size, TBAAInfo, AliasSet::NoModRef, NewPtr);
   return NewPtr;
@@ -414,7 +414,7 @@
 }
 
 bool
-AliasSetTracker::remove(Value *Ptr, uint64_t Size, const MDNode *TBAAInfo) {
+AliasSetTracker::remove(Value *Ptr, unsigned Size, const MDNode *TBAAInfo) {
   AliasSet *AS = findAliasSetForPointer(Ptr, Size, TBAAInfo);
   if (!AS) return false;
   remove(*AS);
@@ -422,7 +422,7 @@
 }
 
 bool AliasSetTracker::remove(LoadInst *LI) {
-  uint64_t Size = AA.getTypeStoreSize(LI->getType());
+  unsigned Size = AA.getTypeStoreSize(LI->getType());
   const MDNode *TBAAInfo = LI->getMetadata(LLVMContext::MD_tbaa);
   AliasSet *AS = findAliasSetForPointer(LI->getOperand(0), Size, TBAAInfo);
   if (!AS) return false;
@@ -431,7 +431,7 @@
 }
 
 bool AliasSetTracker::remove(StoreInst *SI) {
-  uint64_t Size = AA.getTypeStoreSize(SI->getOperand(0)->getType());
+  unsigned Size = AA.getTypeStoreSize(SI->getOperand(0)->getType());
   const MDNode *TBAAInfo = SI->getMetadata(LLVMContext::MD_tbaa);
   AliasSet *AS = findAliasSetForPointer(SI->getOperand(1), Size, TBAAInfo);
   if (!AS) return false;

Modified: llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp?rev=116858&r1=116857&r2=116858&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp Tue Oct 19 16:06:16 2010
@@ -98,7 +98,7 @@
 
 /// isObjectSmallerThan - Return true if we can prove that the object specified
 /// by V is smaller than Size.
-static bool isObjectSmallerThan(const Value *V, uint64_t Size,
+static bool isObjectSmallerThan(const Value *V, unsigned Size,
                                 const TargetData &TD) {
   const Type *AccessTy;
   if (const GlobalVariable *GV = dyn_cast<GlobalVariable>(V)) {
@@ -552,27 +552,27 @@
 
     // aliasGEP - Provide a bunch of ad-hoc rules to disambiguate a GEP
     // instruction against another.
-    AliasResult aliasGEP(const GEPOperator *V1, uint64_t V1Size,
-                         const Value *V2, uint64_t V2Size,
+    AliasResult aliasGEP(const GEPOperator *V1, unsigned V1Size,
+                         const Value *V2, unsigned V2Size,
                          const MDNode *V2TBAAInfo,
                          const Value *UnderlyingV1, const Value *UnderlyingV2);
 
     // aliasPHI - Provide a bunch of ad-hoc rules to disambiguate a PHI
     // instruction against another.
-    AliasResult aliasPHI(const PHINode *PN, uint64_t PNSize,
+    AliasResult aliasPHI(const PHINode *PN, unsigned PNSize,
                          const MDNode *PNTBAAInfo,
-                         const Value *V2, uint64_t V2Size,
+                         const Value *V2, unsigned V2Size,
                          const MDNode *V2TBAAInfo);
 
     /// aliasSelect - Disambiguate a Select instruction against another value.
-    AliasResult aliasSelect(const SelectInst *SI, uint64_t SISize,
+    AliasResult aliasSelect(const SelectInst *SI, unsigned SISize,
                             const MDNode *SITBAAInfo,
-                            const Value *V2, uint64_t V2Size,
+                            const Value *V2, unsigned V2Size,
                             const MDNode *V2TBAAInfo);
 
-    AliasResult aliasCheck(const Value *V1, uint64_t V1Size,
+    AliasResult aliasCheck(const Value *V1, unsigned V1Size,
                            const MDNode *V1TBAATag,
-                           const Value *V2, uint64_t V2Size,
+                           const Value *V2, unsigned V2Size,
                            const MDNode *V2TBAATag);
   };
 }  // End of anonymous namespace
@@ -691,7 +691,7 @@
     default: break;
     case Intrinsic::memcpy:
     case Intrinsic::memmove: {
-      uint64_t Len = UnknownSize;
+      unsigned Len = UnknownSize;
       if (ConstantInt *LenCI = dyn_cast<ConstantInt>(II->getArgOperand(2)))
         Len = LenCI->getZExtValue();
       Value *Dest = II->getArgOperand(0);
@@ -707,7 +707,7 @@
       // Since memset is 'accesses arguments' only, the AliasAnalysis base class
       // will handle it for the variable length case.
       if (ConstantInt *LenCI = dyn_cast<ConstantInt>(II->getArgOperand(2))) {
-        uint64_t Len = LenCI->getZExtValue();
+        unsigned Len = LenCI->getZExtValue();
         Value *Dest = II->getArgOperand(0);
         if (isNoAlias(Location(Dest, Len), Loc))
           return NoModRef;
@@ -727,7 +727,7 @@
     case Intrinsic::atomic_load_umin:
       if (TD) {
         Value *Op1 = II->getArgOperand(0);
-        uint64_t Op1Size = TD->getTypeStoreSize(Op1->getType());
+        unsigned Op1Size = TD->getTypeStoreSize(Op1->getType());
         MDNode *Tag = II->getMetadata(LLVMContext::MD_tbaa);
         if (isNoAlias(Location(Op1, Op1Size, Tag), Loc))
           return NoModRef;
@@ -736,7 +736,7 @@
     case Intrinsic::lifetime_start:
     case Intrinsic::lifetime_end:
     case Intrinsic::invariant_start: {
-      uint64_t PtrSize =
+      unsigned PtrSize =
         cast<ConstantInt>(II->getArgOperand(0))->getZExtValue();
       if (isNoAlias(Location(II->getArgOperand(1),
                              PtrSize,
@@ -746,7 +746,7 @@
       break;
     }
     case Intrinsic::invariant_end: {
-      uint64_t PtrSize =
+      unsigned PtrSize =
         cast<ConstantInt>(II->getArgOperand(1))->getZExtValue();
       if (isNoAlias(Location(II->getArgOperand(2),
                              PtrSize,
@@ -767,8 +767,8 @@
 /// UnderlyingV2 is the same for V2.
 ///
 AliasAnalysis::AliasResult
-BasicAliasAnalysis::aliasGEP(const GEPOperator *GEP1, uint64_t V1Size,
-                             const Value *V2, uint64_t V2Size,
+BasicAliasAnalysis::aliasGEP(const GEPOperator *GEP1, unsigned V1Size,
+                             const Value *V2, unsigned V2Size,
                              const MDNode *V2TBAAInfo,
                              const Value *UnderlyingV1,
                              const Value *UnderlyingV2) {
@@ -878,10 +878,8 @@
   // If our known offset is bigger than the access size, we know we don't have
   // an alias.
   if (GEP1BaseOffset) {
-    if (GEP1BaseOffset >= 0 ?
-        (V2Size != UnknownSize && (uint64_t)GEP1BaseOffset >= V2Size) :
-        (V1Size != UnknownSize && -(uint64_t)GEP1BaseOffset >= V1Size &&
-         GEP1BaseOffset != INT64_MIN))
+    if (GEP1BaseOffset >= (int64_t)V2Size ||
+        GEP1BaseOffset <= -(int64_t)V1Size)
       return NoAlias;
   }
   
@@ -891,9 +889,9 @@
 /// aliasSelect - Provide a bunch of ad-hoc rules to disambiguate a Select
 /// instruction against another.
 AliasAnalysis::AliasResult
-BasicAliasAnalysis::aliasSelect(const SelectInst *SI, uint64_t SISize,
+BasicAliasAnalysis::aliasSelect(const SelectInst *SI, unsigned SISize,
                                 const MDNode *SITBAAInfo,
-                                const Value *V2, uint64_t V2Size,
+                                const Value *V2, unsigned V2Size,
                                 const MDNode *V2TBAAInfo) {
   // If this select has been visited before, we're on a use-def cycle.
   // Such cycles are only valid when PHI nodes are involved or in unreachable
@@ -941,9 +939,9 @@
 // aliasPHI - Provide a bunch of ad-hoc rules to disambiguate a PHI instruction
 // against another.
 AliasAnalysis::AliasResult
-BasicAliasAnalysis::aliasPHI(const PHINode *PN, uint64_t PNSize,
+BasicAliasAnalysis::aliasPHI(const PHINode *PN, unsigned PNSize,
                              const MDNode *PNTBAAInfo,
-                             const Value *V2, uint64_t V2Size,
+                             const Value *V2, unsigned V2Size,
                              const MDNode *V2TBAAInfo) {
   // The PHI node has already been visited, avoid recursion any further.
   if (!Visited.insert(PN))
@@ -1015,9 +1013,9 @@
 // such as array references.
 //
 AliasAnalysis::AliasResult
-BasicAliasAnalysis::aliasCheck(const Value *V1, uint64_t V1Size,
+BasicAliasAnalysis::aliasCheck(const Value *V1, unsigned V1Size,
                                const MDNode *V1TBAAInfo,
-                               const Value *V2, uint64_t V2Size,
+                               const Value *V2, unsigned V2Size,
                                const MDNode *V2TBAAInfo) {
   // If either of the memory references is empty, it doesn't matter what the
   // pointer values are.

Modified: llvm/trunk/lib/Analysis/Lint.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/Lint.cpp?rev=116858&r1=116857&r2=116858&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/Lint.cpp (original)
+++ llvm/trunk/lib/Analysis/Lint.cpp Tue Oct 19 16:06:16 2010
@@ -70,7 +70,7 @@
 
     void visitCallSite(CallSite CS);
     void visitMemoryReference(Instruction &I, Value *Ptr,
-                              uint64_t Size, unsigned Align,
+                              unsigned Size, unsigned Align,
                               const Type *Ty, unsigned Flags);
 
     void visitCallInst(CallInst &I);
@@ -277,7 +277,7 @@
       // Check that the memcpy arguments don't overlap. The AliasAnalysis API
       // isn't expressive enough for what we really want to do. Known partial
       // overlap is not distinguished from the case where nothing is known.
-      uint64_t Size = 0;
+      unsigned Size = 0;
       if (const ConstantInt *Len =
             dyn_cast<ConstantInt>(findValue(MCI->getLength(),
                                             /*OffsetOk=*/false)))
@@ -361,7 +361,7 @@
 // TODO: Check that the reference is in bounds.
 // TODO: Check readnone/readonly function attributes.
 void Lint::visitMemoryReference(Instruction &I,
-                                Value *Ptr, uint64_t Size, unsigned Align,
+                                Value *Ptr, unsigned Size, unsigned Align,
                                 const Type *Ty, unsigned Flags) {
   // If no memory is being referenced, it doesn't matter if the pointer
   // is valid.

Modified: llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp?rev=116858&r1=116857&r2=116858&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp Tue Oct 19 16:06:16 2010
@@ -79,7 +79,7 @@
       AU.addPreserved<MemoryDependenceAnalysis>();
     }
 
-    uint64_t getPointerSize(Value *V) const;
+    unsigned getPointerSize(Value *V) const;
   };
 }
 
@@ -373,7 +373,7 @@
     }
     
     Value *killPointer = 0;
-    uint64_t killPointerSize = AliasAnalysis::UnknownSize;
+    unsigned killPointerSize = AliasAnalysis::UnknownSize;
     
     // If we encounter a use of the pointer, it is no longer considered dead
     if (LoadInst *L = dyn_cast<LoadInst>(BBI)) {
@@ -565,7 +565,7 @@
   } while (!NowDeadInsts.empty());
 }
 
-uint64_t DSE::getPointerSize(Value *V) const {
+unsigned DSE::getPointerSize(Value *V) const {
   if (TD) {
     if (AllocaInst *A = dyn_cast<AllocaInst>(V)) {
       // Get size information for the alloca

Modified: llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp?rev=116858&r1=116857&r2=116858&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp Tue Oct 19 16:06:16 2010
@@ -772,7 +772,7 @@
 
   // If the memmove is a constant size, use it for the alias query, this allows
   // us to optimize things like: memmove(P, P+64, 64);
-  uint64_t MemMoveSize = AliasAnalysis::UnknownSize;
+  unsigned MemMoveSize = AliasAnalysis::UnknownSize;
   if (ConstantInt *Len = dyn_cast<ConstantInt>(M->getLength()))
     MemMoveSize = Len->getZExtValue();
   



From rafael.espindola at gmail.com  Tue Oct 19 16:08:45 2010
From: rafael.espindola at gmail.com (=?UTF-8?Q?Rafael_Esp=C3=ADndola?=)
Date: Tue, 19 Oct 2010 17:08:45 -0400
Subject: [llvm-commits] [rfc][patch] How should we handle
	_GLOBAL_OFFSET_TABLE_?
Message-ID: <AANLkTi=sTA0ri5+r=-gSoi9MAJQkohwsh0o6MkqdT3TQ@mail.gmail.com>

Consider the instruction

addl	$_GLOBAL_OFFSET_TABLE_, %ebx

It should assemble to something like

81 c3 02 00 00 00    	add    $0x2,%ebx

The "2" in the add comes from the first two bytes. This is a special
treatment for _GLOBAL_OFFSET_TABLE_. It also produces a special kind
of relocation (R_386_GOTPC).

The relocation kind can be handled in the writer (and is). The problem
is that it is then too late to find the offset of the relocation
inside the instruction. This patch does it by modifying
X86MCCodeEmitter.cpp. This might be undesirable as this code is also
used for non-ELF targets.

I tried to do this on the ELF streamer, but failed because
EncodeInstruction is also called directly from the assembler when
handling relaxations and the streamer cannot patch it up.

Another way I can see this being done is having a object specific
wrapper for CodeEmitter::EncodeInstruction. This would be a nop for
MachO and COFF, but ELF 32 bits could then patch it up to account for
_GLOBAL_OFFSET_TABLE_.

Any better ideas on how to implement this?

P.S.: Ugly as the attached patch is, it gets clang to build itself on
32 bits with the integrated assembler :-)

Cheers,
Rafael
-------------- next part --------------
A non-text attachment was scrubbed...
Name: GlobalOffsetTable.patch
Type: text/x-patch
Size: 1663 bytes
Desc: not available
Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101019/ff90b747/attachment.bin 

From grosbach at apple.com  Tue Oct 19 16:34:47 2010
From: grosbach at apple.com (Jim Grosbach)
Date: Tue, 19 Oct 2010 21:34:47 -0000
Subject: [llvm-commits] [llvm] r116863 -
	/llvm/trunk/lib/Target/ARM/ARMMachineFunctionInfo.h
Message-ID: <20101019213447.5346D2A6C12C@llvm.org>

Author: grosbach
Date: Tue Oct 19 16:34:47 2010
New Revision: 116863

URL: http://llvm.org/viewvc/llvm-project?rev=116863&view=rev
Log:
Update comments to remove obsolete references.

Modified:
    llvm/trunk/lib/Target/ARM/ARMMachineFunctionInfo.h

Modified: llvm/trunk/lib/Target/ARM/ARMMachineFunctionInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMMachineFunctionInfo.h?rev=116863&r1=116862&r2=116863&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMMachineFunctionInfo.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMMachineFunctionInfo.h Tue Oct 19 16:34:47 2010
@@ -55,8 +55,8 @@
   /// spill stack offset.
   unsigned FramePtrSpillOffset;
 
-  /// GPRCSOffset, GPRCS2Offset, DPRCSOffset - Starting offset of callee saved
-  /// register spills areas (excluding R9 for Mac OS X):
+  /// GPRCSOffset, DPRCSOffset - Starting offset of callee saved register
+  /// spills areas (excluding R9 for Mac OS X):
   ///
   /// GPR callee-saved (1) : r4, r5, r6, r7, r8, r9, r10, r11, lr
   /// --------------------------------------------
@@ -64,13 +64,12 @@
   unsigned GPRCSOffset;
   unsigned DPRCSOffset;
 
-  /// GPRCSSize, GPRCS2Size, DPRCSSize - Sizes of callee saved register spills
-  /// areas.
+  /// GPRCSSize, DPRCSSize - Sizes of callee saved register spills areas.
   unsigned GPRCSSize;
   unsigned DPRCSSize;
 
-  /// GPRCSFrames, GPRCS2Frames, DPRCSFrames - Keeps track of frame indices
-  /// which belong to these spill areas.
+  /// GPRCSFrames, DPRCSFrames - Keeps track of frame indices which belong
+  /// to these spill areas.
   BitVector GPRCSFrames;
   BitVector DPRCSFrames;
 



From dgregor at apple.com  Tue Oct 19 17:13:48 2010
From: dgregor at apple.com (Douglas Gregor)
Date: Tue, 19 Oct 2010 22:13:48 -0000
Subject: [llvm-commits] [llvm] r116867 - in /llvm/trunk:
 include/llvm/ADT/StringRef.h lib/Support/StringRef.cpp
Message-ID: <20101019221349.0CFB32A6C12C@llvm.org>

Author: dgregor
Date: Tue Oct 19 17:13:48 2010
New Revision: 116867

URL: http://llvm.org/viewvc/llvm-project?rev=116867&view=rev
Log:
Extend StringRef's edit-distance algorithm to permit an upper bound on the allowed edit distance

Modified:
    llvm/trunk/include/llvm/ADT/StringRef.h
    llvm/trunk/lib/Support/StringRef.cpp

Modified: llvm/trunk/include/llvm/ADT/StringRef.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/StringRef.h?rev=116867&r1=116866&r2=116867&view=diff
==============================================================================
--- llvm/trunk/include/llvm/ADT/StringRef.h (original)
+++ llvm/trunk/include/llvm/ADT/StringRef.h Tue Oct 19 17:13:48 2010
@@ -142,11 +142,16 @@
     /// operation, rather than as two operations (an insertion and a
     /// removal).
     ///
+    /// \param MaxEditDistance If non-zero, the maximum edit distance that
+    /// this routine is allowed to compute. If the edit distance will exceed
+    /// that maximum, returns \c MaxEditDistance+1.
+    ///
     /// \returns the minimum number of character insertions, removals,
     /// or (if \p AllowReplacements is \c true) replacements needed to
     /// transform one of the given strings into the other. If zero,
     /// the strings are identical.
-    unsigned edit_distance(StringRef Other, bool AllowReplacements = true);
+    unsigned edit_distance(StringRef Other, bool AllowReplacements = true,
+                           unsigned MaxEditDistance = 0);
 
     /// str - Get the contents as an std::string.
     std::string str() const {

Modified: llvm/trunk/lib/Support/StringRef.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/StringRef.cpp?rev=116867&r1=116866&r2=116867&view=diff
==============================================================================
--- llvm/trunk/lib/Support/StringRef.cpp (original)
+++ llvm/trunk/lib/Support/StringRef.cpp Tue Oct 19 17:13:48 2010
@@ -68,7 +68,8 @@
 
 // Compute the edit distance between the two given strings.
 unsigned StringRef::edit_distance(llvm::StringRef Other, 
-                                  bool AllowReplacements) {
+                                  bool AllowReplacements,
+                                  unsigned MaxEditDistance) {
   // The algorithm implemented below is the "classic"
   // dynamic-programming algorithm for computing the Levenshtein
   // distance, which is described here:
@@ -94,6 +95,8 @@
 
   for (size_type y = 1; y <= m; ++y) {
     current[0] = y;
+    unsigned BestThisRow = current[0];
+    
     for (size_type x = 1; x <= n; ++x) {
       if (AllowReplacements) {
         current[x] = min(previous[x-1] + ((*this)[y-1] == Other[x-1]? 0u:1u),
@@ -103,8 +106,12 @@
         if ((*this)[y-1] == Other[x-1]) current[x] = previous[x-1];
         else current[x] = min(current[x-1], previous[x]) + 1;
       }
+      BestThisRow = min(BestThisRow, current[x]);
     }
     
+    if (MaxEditDistance && BestThisRow > MaxEditDistance)
+      return MaxEditDistance + 1;
+    
     unsigned *tmp = current;
     current = previous;
     previous = tmp;



From daniel at zuster.org  Tue Oct 19 17:30:36 2010
From: daniel at zuster.org (Daniel Dunbar)
Date: Tue, 19 Oct 2010 22:30:36 -0000
Subject: [llvm-commits] [test-suite] r116872 -
 /test-suite/trunk/SingleSource/Benchmarks/Misc/salsa20.c
Message-ID: <20101019223036.93F472A6C12C@llvm.org>

Author: ddunbar
Date: Tue Oct 19 17:30:36 2010
New Revision: 116872

URL: http://llvm.org/viewvc/llvm-project?rev=116872&view=rev
Log:
Fix test to honor SMALL_PROBLEM_SIZE, this test is stupid.

Modified:
    test-suite/trunk/SingleSource/Benchmarks/Misc/salsa20.c

Modified: test-suite/trunk/SingleSource/Benchmarks/Misc/salsa20.c
URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/Benchmarks/Misc/salsa20.c?rev=116872&r1=116871&r2=116872&view=diff
==============================================================================
--- test-suite/trunk/SingleSource/Benchmarks/Misc/salsa20.c (original)
+++ test-suite/trunk/SingleSource/Benchmarks/Misc/salsa20.c Tue Oct 19 17:30:36 2010
@@ -51,14 +51,24 @@
 
 int main(void) {
   uint32_t val, i;
+#ifdef SMALL_PROBLEM_SIZE
+  uint32_t count = 5379194;
+  uint32_t offset = 0xf655703d - 0xb67e7950;
+#else
+  uint32_t count = 537919488;
+  uint32_t offset = 0;
+#endif
 
   for(i=0; i<16; i++)
     STATE[i] = (0xedababe5+(i+13))^(0xdeadbeef-i);
   
-  for(i=0; i<537919488; i++)
+  for(i=0; i<count; i++)
     salsa();
 
-  printf("got:       %x\n", val = salsa());
+  val = salsa();
+  val += offset;
+
+  printf("got:       %x\n", val);
   printf("should be: %x\n", 0xf655703d);
   return(val != 0xf655703d);
 }



From stoklund at 2pi.dk  Tue Oct 19 17:45:47 2010
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Tue, 19 Oct 2010 15:45:47 -0700
Subject: [llvm-commits] [test-suite] r116872 -
	/test-suite/trunk/SingleSource/Benchmarks/Misc/salsa20.c
In-Reply-To: <20101019223036.93F472A6C12C@llvm.org>
References: <20101019223036.93F472A6C12C@llvm.org>
Message-ID: <B31718DA-53D8-4A78-8167-F4676FA182D4@2pi.dk>


On Oct 19, 2010, at 3:30 PM, Daniel Dunbar wrote:

> Author: ddunbar
> Date: Tue Oct 19 17:30:36 2010
> New Revision: 116872
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=116872&view=rev
> Log:
> Fix test to honor SMALL_PROBLEM_SIZE, this test is stupid.

You could remove the comparison entirely and provide a separate reference output for -small.

This test is interesting for register allocation because mem2reg converts the whole x[16] array to registers, creating a very high register pressure. A stupid allocator can make it go really slow :-)




From gohman at apple.com  Tue Oct 19 17:54:46 2010
From: gohman at apple.com (Dan Gohman)
Date: Tue, 19 Oct 2010 22:54:46 -0000
Subject: [llvm-commits] [llvm] r116875 - in /llvm/trunk:
 include/llvm/Analysis/AliasAnalysis.h
 include/llvm/Analysis/AliasSetTracker.h lib/Analysis/AliasAnalysis.cpp
 lib/Analysis/AliasAnalysisEvaluator.cpp lib/Analysis/AliasSetTracker.cpp
 lib/Analysis/BasicAliasAnalysis.cpp lib/Analysis/Lint.cpp
 lib/Analysis/Loads.cpp lib/Transforms/IPO/ArgumentPromotion.cpp
 lib/Transforms/Scalar/DeadStoreElimination.cpp
 lib/Transforms/Scalar/LICM.cpp lib/Transforms/Scalar/MemCpyOptimizer.cpp
 lib/Transforms/Scalar/Sink.cpp
Message-ID: <20101019225446.545992A6C12C@llvm.org>

Author: djg
Date: Tue Oct 19 17:54:46 2010
New Revision: 116875

URL: http://llvm.org/viewvc/llvm-project?rev=116875&view=rev
Log:
Reapply r116831 and r116839, converting AliasAnalysis to use
uint64_t, plus fixes for places I missed before.

Modified:
    llvm/trunk/include/llvm/Analysis/AliasAnalysis.h
    llvm/trunk/include/llvm/Analysis/AliasSetTracker.h
    llvm/trunk/lib/Analysis/AliasAnalysis.cpp
    llvm/trunk/lib/Analysis/AliasAnalysisEvaluator.cpp
    llvm/trunk/lib/Analysis/AliasSetTracker.cpp
    llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp
    llvm/trunk/lib/Analysis/Lint.cpp
    llvm/trunk/lib/Analysis/Loads.cpp
    llvm/trunk/lib/Transforms/IPO/ArgumentPromotion.cpp
    llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp
    llvm/trunk/lib/Transforms/Scalar/LICM.cpp
    llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp
    llvm/trunk/lib/Transforms/Scalar/Sink.cpp

Modified: llvm/trunk/include/llvm/Analysis/AliasAnalysis.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/AliasAnalysis.h?rev=116875&r1=116874&r2=116875&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/AliasAnalysis.h (original)
+++ llvm/trunk/include/llvm/Analysis/AliasAnalysis.h Tue Oct 19 17:54:46 2010
@@ -67,7 +67,7 @@
   /// UnknownSize - This is a special value which can be used with the
   /// size arguments in alias queries to indicate that the caller does not
   /// know the sizes of the potential memory references.
-  static unsigned const UnknownSize = ~0u;
+  static uint64_t const UnknownSize = ~UINT64_C(0);
 
   /// getTargetData - Return a pointer to the current TargetData object, or
   /// null if no TargetData object is available.
@@ -77,7 +77,7 @@
   /// getTypeStoreSize - Return the TargetData store size for the given type,
   /// if known, or a conservative value otherwise.
   ///
-  unsigned getTypeStoreSize(const Type *Ty);
+  uint64_t getTypeStoreSize(const Type *Ty);
 
   //===--------------------------------------------------------------------===//
   /// Alias Queries...
@@ -88,13 +88,13 @@
     /// Ptr - The address of the start of the location.
     const Value *Ptr;
     /// Size - The size of the location.
-    unsigned Size;
+    uint64_t Size;
     /// TBAATag - The metadata node which describes the TBAA type of
     /// the location, or null if there is no (unique) tag.
     const MDNode *TBAATag;
 
     explicit Location(const Value *P = 0,
-                      unsigned S = UnknownSize,
+                      uint64_t S = UnknownSize,
                       const MDNode *N = 0)
       : Ptr(P), Size(S), TBAATag(N) {}
 
@@ -129,8 +129,8 @@
   virtual AliasResult alias(const Location &LocA, const Location &LocB);
 
   /// alias - A convenience wrapper.
-  AliasResult alias(const Value *V1, unsigned V1Size,
-                    const Value *V2, unsigned V2Size) {
+  AliasResult alias(const Value *V1, uint64_t V1Size,
+                    const Value *V2, uint64_t V2Size) {
     return alias(Location(V1, V1Size), Location(V2, V2Size));
   }
 
@@ -146,8 +146,8 @@
   }
 
   /// isNoAlias - A convenience wrapper.
-  bool isNoAlias(const Value *V1, unsigned V1Size,
-                 const Value *V2, unsigned V2Size) {
+  bool isNoAlias(const Value *V1, uint64_t V1Size,
+                 const Value *V2, uint64_t V2Size) {
     return isNoAlias(Location(V1, V1Size), Location(V2, V2Size));
   }
 
@@ -278,7 +278,7 @@
 
   /// getModRefInfo - A convenience wrapper.
   ModRefResult getModRefInfo(const Instruction *I,
-                             const Value *P, unsigned Size) {
+                             const Value *P, uint64_t Size) {
     return getModRefInfo(I, Location(P, Size));
   }
 
@@ -289,7 +289,7 @@
 
   /// getModRefInfo (for call sites) - A convenience wrapper.
   ModRefResult getModRefInfo(ImmutableCallSite CS,
-                             const Value *P, unsigned Size) {
+                             const Value *P, uint64_t Size) {
     return getModRefInfo(CS, Location(P, Size));
   }
 
@@ -300,7 +300,7 @@
   }
 
   /// getModRefInfo (for calls) - A convenience wrapper.
-  ModRefResult getModRefInfo(const CallInst *C, const Value *P, unsigned Size) {
+  ModRefResult getModRefInfo(const CallInst *C, const Value *P, uint64_t Size) {
     return getModRefInfo(C, Location(P, Size));
   }
 
@@ -313,7 +313,7 @@
 
   /// getModRefInfo (for invokes) - A convenience wrapper.
   ModRefResult getModRefInfo(const InvokeInst *I,
-                             const Value *P, unsigned Size) {
+                             const Value *P, uint64_t Size) {
     return getModRefInfo(I, Location(P, Size));
   }
 
@@ -322,7 +322,7 @@
   ModRefResult getModRefInfo(const LoadInst *L, const Location &Loc);
 
   /// getModRefInfo (for loads) - A convenience wrapper.
-  ModRefResult getModRefInfo(const LoadInst *L, const Value *P, unsigned Size) {
+  ModRefResult getModRefInfo(const LoadInst *L, const Value *P, uint64_t Size) {
     return getModRefInfo(L, Location(P, Size));
   }
 
@@ -331,7 +331,7 @@
   ModRefResult getModRefInfo(const StoreInst *S, const Location &Loc);
 
   /// getModRefInfo (for stores) - A convenience wrapper.
-  ModRefResult getModRefInfo(const StoreInst *S, const Value *P, unsigned Size) {
+  ModRefResult getModRefInfo(const StoreInst *S, const Value *P, uint64_t Size) {
     return getModRefInfo(S, Location(P, Size));
   }
 
@@ -340,7 +340,7 @@
   ModRefResult getModRefInfo(const VAArgInst* I, const Location &Loc);
 
   /// getModRefInfo (for va_args) - A convenience wrapper.
-  ModRefResult getModRefInfo(const VAArgInst* I, const Value* P, unsigned Size) {
+  ModRefResult getModRefInfo(const VAArgInst* I, const Value* P, uint64_t Size) {
     return getModRefInfo(I, Location(P, Size));
   }
 
@@ -360,7 +360,7 @@
   bool canBasicBlockModify(const BasicBlock &BB, const Location &Loc);
 
   /// canBasicBlockModify - A convenience wrapper.
-  bool canBasicBlockModify(const BasicBlock &BB, const Value *P, unsigned Size){
+  bool canBasicBlockModify(const BasicBlock &BB, const Value *P, uint64_t Size){
     return canBasicBlockModify(BB, Location(P, Size));
   }
 
@@ -373,7 +373,7 @@
 
   /// canInstructionRangeModify - A convenience wrapper.
   bool canInstructionRangeModify(const Instruction &I1, const Instruction &I2,
-                                 const Value *Ptr, unsigned Size) {
+                                 const Value *Ptr, uint64_t Size) {
     return canInstructionRangeModify(I1, I2, Location(Ptr, Size));
   }
 

Modified: llvm/trunk/include/llvm/Analysis/AliasSetTracker.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/AliasSetTracker.h?rev=116875&r1=116874&r2=116875&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/AliasSetTracker.h (original)
+++ llvm/trunk/include/llvm/Analysis/AliasSetTracker.h Tue Oct 19 17:54:46 2010
@@ -40,7 +40,7 @@
     Value *Val;  // The pointer this record corresponds to.
     PointerRec **PrevInList, *NextInList;
     AliasSet *AS;
-    unsigned Size;
+    uint64_t Size;
     const MDNode *TBAAInfo;
   public:
     PointerRec(Value *V)
@@ -57,7 +57,7 @@
       return &NextInList;
     }
 
-    void updateSizeAndTBAAInfo(unsigned NewSize, const MDNode *NewTBAAInfo) {
+    void updateSizeAndTBAAInfo(uint64_t NewSize, const MDNode *NewTBAAInfo) {
       if (NewSize > Size) Size = NewSize;
 
       if (TBAAInfo == DenseMapInfo<const MDNode *>::getEmptyKey())
@@ -68,7 +68,7 @@
         TBAAInfo = DenseMapInfo<const MDNode *>::getTombstoneKey();
     }
 
-    unsigned getSize() const { return Size; }
+    uint64_t getSize() const { return Size; }
 
     /// getTBAAInfo - Return the TBAAInfo, or null if there is no
     /// information or conflicting information.
@@ -205,7 +205,7 @@
     value_type *operator->() const { return &operator*(); }
 
     Value *getPointer() const { return CurNode->getValue(); }
-    unsigned getSize() const { return CurNode->getSize(); }
+    uint64_t getSize() const { return CurNode->getSize(); }
     const MDNode *getTBAAInfo() const { return CurNode->getTBAAInfo(); }
 
     iterator& operator++() {                // Preincrement
@@ -250,7 +250,7 @@
 
   void removeFromTracker(AliasSetTracker &AST);
 
-  void addPointer(AliasSetTracker &AST, PointerRec &Entry, unsigned Size,
+  void addPointer(AliasSetTracker &AST, PointerRec &Entry, uint64_t Size,
                   const MDNode *TBAAInfo,
                   bool KnownMustAlias = false);
   void addCallSite(CallSite CS, AliasAnalysis &AA);
@@ -266,7 +266,7 @@
   /// aliasesPointer - Return true if the specified pointer "may" (or must)
   /// alias one of the members in the set.
   ///
-  bool aliasesPointer(const Value *Ptr, unsigned Size, const MDNode *TBAAInfo,
+  bool aliasesPointer(const Value *Ptr, uint64_t Size, const MDNode *TBAAInfo,
                       AliasAnalysis &AA) const;
   bool aliasesCallSite(CallSite CS, AliasAnalysis &AA) const;
 };
@@ -320,7 +320,7 @@
   /// These methods return true if inserting the instruction resulted in the
   /// addition of a new alias set (i.e., the pointer did not alias anything).
   ///
-  bool add(Value *Ptr, unsigned Size, const MDNode *TBAAInfo); // Add a location
+  bool add(Value *Ptr, uint64_t Size, const MDNode *TBAAInfo); // Add a location
   bool add(LoadInst *LI);
   bool add(StoreInst *SI);
   bool add(VAArgInst *VAAI);
@@ -335,7 +335,7 @@
   /// be aliased by the specified instruction.  These methods return true if any
   /// alias sets were eliminated.
   // Remove a location
-  bool remove(Value *Ptr, unsigned Size, const MDNode *TBAAInfo);
+  bool remove(Value *Ptr, uint64_t Size, const MDNode *TBAAInfo);
   bool remove(LoadInst *LI);
   bool remove(StoreInst *SI);
   bool remove(VAArgInst *VAAI);
@@ -355,13 +355,13 @@
   /// lives in.  If the New argument is non-null, this method sets the value to
   /// true if a new alias set is created to contain the pointer (because the
   /// pointer didn't alias anything).
-  AliasSet &getAliasSetForPointer(Value *P, unsigned Size,
+  AliasSet &getAliasSetForPointer(Value *P, uint64_t Size,
                                   const MDNode *TBAAInfo,
                                   bool *New = 0);
 
   /// getAliasSetForPointerIfExists - Return the alias set containing the
   /// location specified if one exists, otherwise return null.
-  AliasSet *getAliasSetForPointerIfExists(Value *P, unsigned Size,
+  AliasSet *getAliasSetForPointerIfExists(Value *P, uint64_t Size,
                                           const MDNode *TBAAInfo) {
     return findAliasSetForPointer(P, Size, TBAAInfo);
   }
@@ -369,7 +369,7 @@
   /// containsPointer - Return true if the specified location is represented by
   /// this alias set, false otherwise.  This does not modify the AST object or
   /// alias sets.
-  bool containsPointer(Value *P, unsigned Size, const MDNode *TBAAInfo) const;
+  bool containsPointer(Value *P, uint64_t Size, const MDNode *TBAAInfo) const;
 
   /// getAliasAnalysis - Return the underlying alias analysis object used by
   /// this tracker.
@@ -416,7 +416,7 @@
     return *Entry;
   }
 
-  AliasSet &addPointer(Value *P, unsigned Size, const MDNode *TBAAInfo,
+  AliasSet &addPointer(Value *P, uint64_t Size, const MDNode *TBAAInfo,
                        AliasSet::AccessType E,
                        bool &NewSet) {
     NewSet = false;
@@ -424,7 +424,7 @@
     AS.AccessTy |= E;
     return AS;
   }
-  AliasSet *findAliasSetForPointer(const Value *Ptr, unsigned Size,
+  AliasSet *findAliasSetForPointer(const Value *Ptr, uint64_t Size,
                                    const MDNode *TBAAInfo);
 
   AliasSet *findAliasSetForCallSite(CallSite CS);

Modified: llvm/trunk/lib/Analysis/AliasAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/AliasAnalysis.cpp?rev=116875&r1=116874&r2=116875&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/AliasAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/AliasAnalysis.cpp Tue Oct 19 17:54:46 2010
@@ -283,7 +283,7 @@
 /// getTypeStoreSize - Return the TargetData store size for the given type,
 /// if known, or a conservative value otherwise.
 ///
-unsigned AliasAnalysis::getTypeStoreSize(const Type *Ty) {
+uint64_t AliasAnalysis::getTypeStoreSize(const Type *Ty) {
   return TD ? TD->getTypeStoreSize(Ty) : UnknownSize;
 }
 

Modified: llvm/trunk/lib/Analysis/AliasAnalysisEvaluator.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/AliasAnalysisEvaluator.cpp?rev=116875&r1=116874&r2=116875&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/AliasAnalysisEvaluator.cpp (original)
+++ llvm/trunk/lib/Analysis/AliasAnalysisEvaluator.cpp Tue Oct 19 17:54:46 2010
@@ -168,12 +168,12 @@
   // iterate over the worklist, and run the full (n^2)/2 disambiguations
   for (SetVector<Value *>::iterator I1 = Pointers.begin(), E = Pointers.end();
        I1 != E; ++I1) {
-    unsigned I1Size = AliasAnalysis::UnknownSize;
+    uint64_t I1Size = AliasAnalysis::UnknownSize;
     const Type *I1ElTy = cast<PointerType>((*I1)->getType())->getElementType();
     if (I1ElTy->isSized()) I1Size = AA.getTypeStoreSize(I1ElTy);
 
     for (SetVector<Value *>::iterator I2 = Pointers.begin(); I2 != I1; ++I2) {
-      unsigned I2Size = AliasAnalysis::UnknownSize;
+      uint64_t I2Size = AliasAnalysis::UnknownSize;
       const Type *I2ElTy =cast<PointerType>((*I2)->getType())->getElementType();
       if (I2ElTy->isSized()) I2Size = AA.getTypeStoreSize(I2ElTy);
 
@@ -200,7 +200,7 @@
 
     for (SetVector<Value *>::iterator V = Pointers.begin(), Ve = Pointers.end();
          V != Ve; ++V) {
-      unsigned Size = AliasAnalysis::UnknownSize;
+      uint64_t Size = AliasAnalysis::UnknownSize;
       const Type *ElTy = cast<PointerType>((*V)->getType())->getElementType();
       if (ElTy->isSized()) Size = AA.getTypeStoreSize(ElTy);
 

Modified: llvm/trunk/lib/Analysis/AliasSetTracker.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/AliasSetTracker.cpp?rev=116875&r1=116874&r2=116875&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/AliasSetTracker.cpp (original)
+++ llvm/trunk/lib/Analysis/AliasSetTracker.cpp Tue Oct 19 17:54:46 2010
@@ -88,7 +88,7 @@
 }
 
 void AliasSet::addPointer(AliasSetTracker &AST, PointerRec &Entry,
-                          unsigned Size, const MDNode *TBAAInfo,
+                          uint64_t Size, const MDNode *TBAAInfo,
                           bool KnownMustAlias) {
   assert(!Entry.hasAliasSet() && "Entry already in set!");
 
@@ -138,7 +138,7 @@
 /// aliasesPointer - Return true if the specified pointer "may" (or must)
 /// alias one of the members in the set.
 ///
-bool AliasSet::aliasesPointer(const Value *Ptr, unsigned Size,
+bool AliasSet::aliasesPointer(const Value *Ptr, uint64_t Size,
                               const MDNode *TBAAInfo,
                               AliasAnalysis &AA) const {
   if (AliasTy == MustAlias) {
@@ -210,7 +210,7 @@
 /// that may alias the pointer, merge them together and return the unified set.
 ///
 AliasSet *AliasSetTracker::findAliasSetForPointer(const Value *Ptr,
-                                                  unsigned Size,
+                                                  uint64_t Size,
                                                   const MDNode *TBAAInfo) {
   AliasSet *FoundSet = 0;
   for (iterator I = begin(), E = end(); I != E; ++I) {
@@ -229,7 +229,7 @@
 /// containsPointer - Return true if the specified location is represented by
 /// this alias set, false otherwise.  This does not modify the AST object or
 /// alias sets.
-bool AliasSetTracker::containsPointer(Value *Ptr, unsigned Size,
+bool AliasSetTracker::containsPointer(Value *Ptr, uint64_t Size,
                                       const MDNode *TBAAInfo) const {
   for (const_iterator I = begin(), E = end(); I != E; ++I)
     if (!I->Forward && I->aliasesPointer(Ptr, Size, TBAAInfo, AA))
@@ -258,7 +258,7 @@
 
 /// getAliasSetForPointer - Return the alias set that the specified pointer
 /// lives in.
-AliasSet &AliasSetTracker::getAliasSetForPointer(Value *Pointer, unsigned Size,
+AliasSet &AliasSetTracker::getAliasSetForPointer(Value *Pointer, uint64_t Size,
                                                  const MDNode *TBAAInfo,
                                                  bool *New) {
   AliasSet::PointerRec &Entry = getEntryFor(Pointer);
@@ -283,7 +283,7 @@
   return AliasSets.back();
 }
 
-bool AliasSetTracker::add(Value *Ptr, unsigned Size, const MDNode *TBAAInfo) {
+bool AliasSetTracker::add(Value *Ptr, uint64_t Size, const MDNode *TBAAInfo) {
   bool NewPtr;
   addPointer(Ptr, Size, TBAAInfo, AliasSet::NoModRef, NewPtr);
   return NewPtr;
@@ -414,7 +414,7 @@
 }
 
 bool
-AliasSetTracker::remove(Value *Ptr, unsigned Size, const MDNode *TBAAInfo) {
+AliasSetTracker::remove(Value *Ptr, uint64_t Size, const MDNode *TBAAInfo) {
   AliasSet *AS = findAliasSetForPointer(Ptr, Size, TBAAInfo);
   if (!AS) return false;
   remove(*AS);
@@ -422,7 +422,7 @@
 }
 
 bool AliasSetTracker::remove(LoadInst *LI) {
-  unsigned Size = AA.getTypeStoreSize(LI->getType());
+  uint64_t Size = AA.getTypeStoreSize(LI->getType());
   const MDNode *TBAAInfo = LI->getMetadata(LLVMContext::MD_tbaa);
   AliasSet *AS = findAliasSetForPointer(LI->getOperand(0), Size, TBAAInfo);
   if (!AS) return false;
@@ -431,7 +431,7 @@
 }
 
 bool AliasSetTracker::remove(StoreInst *SI) {
-  unsigned Size = AA.getTypeStoreSize(SI->getOperand(0)->getType());
+  uint64_t Size = AA.getTypeStoreSize(SI->getOperand(0)->getType());
   const MDNode *TBAAInfo = SI->getMetadata(LLVMContext::MD_tbaa);
   AliasSet *AS = findAliasSetForPointer(SI->getOperand(1), Size, TBAAInfo);
   if (!AS) return false;

Modified: llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp?rev=116875&r1=116874&r2=116875&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp Tue Oct 19 17:54:46 2010
@@ -98,7 +98,7 @@
 
 /// isObjectSmallerThan - Return true if we can prove that the object specified
 /// by V is smaller than Size.
-static bool isObjectSmallerThan(const Value *V, unsigned Size,
+static bool isObjectSmallerThan(const Value *V, uint64_t Size,
                                 const TargetData &TD) {
   const Type *AccessTy;
   if (const GlobalVariable *GV = dyn_cast<GlobalVariable>(V)) {
@@ -552,27 +552,27 @@
 
     // aliasGEP - Provide a bunch of ad-hoc rules to disambiguate a GEP
     // instruction against another.
-    AliasResult aliasGEP(const GEPOperator *V1, unsigned V1Size,
-                         const Value *V2, unsigned V2Size,
+    AliasResult aliasGEP(const GEPOperator *V1, uint64_t V1Size,
+                         const Value *V2, uint64_t V2Size,
                          const MDNode *V2TBAAInfo,
                          const Value *UnderlyingV1, const Value *UnderlyingV2);
 
     // aliasPHI - Provide a bunch of ad-hoc rules to disambiguate a PHI
     // instruction against another.
-    AliasResult aliasPHI(const PHINode *PN, unsigned PNSize,
+    AliasResult aliasPHI(const PHINode *PN, uint64_t PNSize,
                          const MDNode *PNTBAAInfo,
-                         const Value *V2, unsigned V2Size,
+                         const Value *V2, uint64_t V2Size,
                          const MDNode *V2TBAAInfo);
 
     /// aliasSelect - Disambiguate a Select instruction against another value.
-    AliasResult aliasSelect(const SelectInst *SI, unsigned SISize,
+    AliasResult aliasSelect(const SelectInst *SI, uint64_t SISize,
                             const MDNode *SITBAAInfo,
-                            const Value *V2, unsigned V2Size,
+                            const Value *V2, uint64_t V2Size,
                             const MDNode *V2TBAAInfo);
 
-    AliasResult aliasCheck(const Value *V1, unsigned V1Size,
+    AliasResult aliasCheck(const Value *V1, uint64_t V1Size,
                            const MDNode *V1TBAATag,
-                           const Value *V2, unsigned V2Size,
+                           const Value *V2, uint64_t V2Size,
                            const MDNode *V2TBAATag);
   };
 }  // End of anonymous namespace
@@ -691,7 +691,7 @@
     default: break;
     case Intrinsic::memcpy:
     case Intrinsic::memmove: {
-      unsigned Len = UnknownSize;
+      uint64_t Len = UnknownSize;
       if (ConstantInt *LenCI = dyn_cast<ConstantInt>(II->getArgOperand(2)))
         Len = LenCI->getZExtValue();
       Value *Dest = II->getArgOperand(0);
@@ -707,7 +707,7 @@
       // Since memset is 'accesses arguments' only, the AliasAnalysis base class
       // will handle it for the variable length case.
       if (ConstantInt *LenCI = dyn_cast<ConstantInt>(II->getArgOperand(2))) {
-        unsigned Len = LenCI->getZExtValue();
+        uint64_t Len = LenCI->getZExtValue();
         Value *Dest = II->getArgOperand(0);
         if (isNoAlias(Location(Dest, Len), Loc))
           return NoModRef;
@@ -727,7 +727,7 @@
     case Intrinsic::atomic_load_umin:
       if (TD) {
         Value *Op1 = II->getArgOperand(0);
-        unsigned Op1Size = TD->getTypeStoreSize(Op1->getType());
+        uint64_t Op1Size = TD->getTypeStoreSize(Op1->getType());
         MDNode *Tag = II->getMetadata(LLVMContext::MD_tbaa);
         if (isNoAlias(Location(Op1, Op1Size, Tag), Loc))
           return NoModRef;
@@ -736,7 +736,7 @@
     case Intrinsic::lifetime_start:
     case Intrinsic::lifetime_end:
     case Intrinsic::invariant_start: {
-      unsigned PtrSize =
+      uint64_t PtrSize =
         cast<ConstantInt>(II->getArgOperand(0))->getZExtValue();
       if (isNoAlias(Location(II->getArgOperand(1),
                              PtrSize,
@@ -746,7 +746,7 @@
       break;
     }
     case Intrinsic::invariant_end: {
-      unsigned PtrSize =
+      uint64_t PtrSize =
         cast<ConstantInt>(II->getArgOperand(1))->getZExtValue();
       if (isNoAlias(Location(II->getArgOperand(2),
                              PtrSize,
@@ -767,8 +767,8 @@
 /// UnderlyingV2 is the same for V2.
 ///
 AliasAnalysis::AliasResult
-BasicAliasAnalysis::aliasGEP(const GEPOperator *GEP1, unsigned V1Size,
-                             const Value *V2, unsigned V2Size,
+BasicAliasAnalysis::aliasGEP(const GEPOperator *GEP1, uint64_t V1Size,
+                             const Value *V2, uint64_t V2Size,
                              const MDNode *V2TBAAInfo,
                              const Value *UnderlyingV1,
                              const Value *UnderlyingV2) {
@@ -878,8 +878,10 @@
   // If our known offset is bigger than the access size, we know we don't have
   // an alias.
   if (GEP1BaseOffset) {
-    if (GEP1BaseOffset >= (int64_t)V2Size ||
-        GEP1BaseOffset <= -(int64_t)V1Size)
+    if (GEP1BaseOffset >= 0 ?
+        (V2Size != UnknownSize && (uint64_t)GEP1BaseOffset >= V2Size) :
+        (V1Size != UnknownSize && -(uint64_t)GEP1BaseOffset >= V1Size &&
+         GEP1BaseOffset != INT64_MIN))
       return NoAlias;
   }
   
@@ -889,9 +891,9 @@
 /// aliasSelect - Provide a bunch of ad-hoc rules to disambiguate a Select
 /// instruction against another.
 AliasAnalysis::AliasResult
-BasicAliasAnalysis::aliasSelect(const SelectInst *SI, unsigned SISize,
+BasicAliasAnalysis::aliasSelect(const SelectInst *SI, uint64_t SISize,
                                 const MDNode *SITBAAInfo,
-                                const Value *V2, unsigned V2Size,
+                                const Value *V2, uint64_t V2Size,
                                 const MDNode *V2TBAAInfo) {
   // If this select has been visited before, we're on a use-def cycle.
   // Such cycles are only valid when PHI nodes are involved or in unreachable
@@ -939,9 +941,9 @@
 // aliasPHI - Provide a bunch of ad-hoc rules to disambiguate a PHI instruction
 // against another.
 AliasAnalysis::AliasResult
-BasicAliasAnalysis::aliasPHI(const PHINode *PN, unsigned PNSize,
+BasicAliasAnalysis::aliasPHI(const PHINode *PN, uint64_t PNSize,
                              const MDNode *PNTBAAInfo,
-                             const Value *V2, unsigned V2Size,
+                             const Value *V2, uint64_t V2Size,
                              const MDNode *V2TBAAInfo) {
   // The PHI node has already been visited, avoid recursion any further.
   if (!Visited.insert(PN))
@@ -1013,9 +1015,9 @@
 // such as array references.
 //
 AliasAnalysis::AliasResult
-BasicAliasAnalysis::aliasCheck(const Value *V1, unsigned V1Size,
+BasicAliasAnalysis::aliasCheck(const Value *V1, uint64_t V1Size,
                                const MDNode *V1TBAAInfo,
-                               const Value *V2, unsigned V2Size,
+                               const Value *V2, uint64_t V2Size,
                                const MDNode *V2TBAAInfo) {
   // If either of the memory references is empty, it doesn't matter what the
   // pointer values are.

Modified: llvm/trunk/lib/Analysis/Lint.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/Lint.cpp?rev=116875&r1=116874&r2=116875&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/Lint.cpp (original)
+++ llvm/trunk/lib/Analysis/Lint.cpp Tue Oct 19 17:54:46 2010
@@ -70,7 +70,7 @@
 
     void visitCallSite(CallSite CS);
     void visitMemoryReference(Instruction &I, Value *Ptr,
-                              unsigned Size, unsigned Align,
+                              uint64_t Size, unsigned Align,
                               const Type *Ty, unsigned Flags);
 
     void visitCallInst(CallInst &I);
@@ -277,7 +277,7 @@
       // Check that the memcpy arguments don't overlap. The AliasAnalysis API
       // isn't expressive enough for what we really want to do. Known partial
       // overlap is not distinguished from the case where nothing is known.
-      unsigned Size = 0;
+      uint64_t Size = 0;
       if (const ConstantInt *Len =
             dyn_cast<ConstantInt>(findValue(MCI->getLength(),
                                             /*OffsetOk=*/false)))
@@ -361,7 +361,7 @@
 // TODO: Check that the reference is in bounds.
 // TODO: Check readnone/readonly function attributes.
 void Lint::visitMemoryReference(Instruction &I,
-                                Value *Ptr, unsigned Size, unsigned Align,
+                                Value *Ptr, uint64_t Size, unsigned Align,
                                 const Type *Ty, unsigned Flags) {
   // If no memory is being referenced, it doesn't matter if the pointer
   // is valid.

Modified: llvm/trunk/lib/Analysis/Loads.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/Loads.cpp?rev=116875&r1=116874&r2=116875&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/Loads.cpp (original)
+++ llvm/trunk/lib/Analysis/Loads.cpp Tue Oct 19 17:54:46 2010
@@ -166,7 +166,7 @@
   if (MaxInstsToScan == 0) MaxInstsToScan = ~0U;
 
   // If we're using alias analysis to disambiguate get the size of *Ptr.
-  unsigned AccessSize = 0;
+  uint64_t AccessSize = 0;
   if (AA) {
     const Type *AccessTy = cast<PointerType>(Ptr->getType())->getElementType();
     AccessSize = AA->getTypeStoreSize(AccessTy);

Modified: llvm/trunk/lib/Transforms/IPO/ArgumentPromotion.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/ArgumentPromotion.cpp?rev=116875&r1=116874&r2=116875&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/ArgumentPromotion.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/ArgumentPromotion.cpp Tue Oct 19 17:54:46 2010
@@ -451,7 +451,7 @@
 
     const PointerType *LoadTy =
       cast<PointerType>(Load->getPointerOperand()->getType());
-    unsigned LoadSize =(unsigned)TD->getTypeStoreSize(LoadTy->getElementType());
+    uint64_t LoadSize = TD->getTypeStoreSize(LoadTy->getElementType());
 
     if (AA.canInstructionRangeModify(BB->front(), *Load, Arg, LoadSize))
       return false;  // Pointer is invalidated!

Modified: llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp?rev=116875&r1=116874&r2=116875&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp Tue Oct 19 17:54:46 2010
@@ -61,7 +61,7 @@
     bool handleFreeWithNonTrivialDependency(const CallInst *F,
                                             MemDepResult Dep);
     bool handleEndBlock(BasicBlock &BB);
-    bool RemoveUndeadPointers(Value *Ptr, unsigned killPointerSize,
+    bool RemoveUndeadPointers(Value *Ptr, uint64_t killPointerSize,
                               BasicBlock::iterator &BBI,
                               SmallPtrSet<Value*, 64> &deadPointers);
     void DeleteDeadInstruction(Instruction *I,
@@ -79,7 +79,7 @@
       AU.addPreserved<MemoryDependenceAnalysis>();
     }
 
-    unsigned getPointerSize(Value *V) const;
+    uint64_t getPointerSize(Value *V) const;
   };
 }
 
@@ -142,11 +142,11 @@
 }
 
 /// getStoreSize - Return the length in bytes of the write by the clobbering
-/// instruction. If variable or unknown, returns -1.
-static unsigned getStoreSize(Instruction *I, const TargetData *TD) {
+/// instruction. If variable or unknown, returns AliasAnalysis::UnknownSize.
+static uint64_t getStoreSize(Instruction *I, const TargetData *TD) {
   assert(doesClobberMemory(I));
   if (StoreInst *SI = dyn_cast<StoreInst>(I)) {
-    if (!TD) return -1u;
+    if (!TD) return AliasAnalysis::UnknownSize;
     return TD->getTypeStoreSize(SI->getOperand(0)->getType());
   }
 
@@ -158,7 +158,7 @@
     switch (II->getIntrinsicID()) {
     default: assert(false && "Unexpected intrinsic!");
     case Intrinsic::init_trampoline:
-      return -1u;
+      return AliasAnalysis::UnknownSize;
     case Intrinsic::lifetime_end:
       Len = II->getArgOperand(0);
       break;
@@ -167,7 +167,7 @@
   if (ConstantInt *LenCI = dyn_cast<ConstantInt>(Len))
     if (!LenCI->isAllOnesValue())
       return LenCI->getZExtValue();
-  return -1u;
+  return AliasAnalysis::UnknownSize;
 }
 
 /// isStoreAtLeastAsWideAs - Return true if the size of the store in I1 is
@@ -182,10 +182,12 @@
   // Exactly the same type, must have exactly the same size.
   if (I1Ty == I2Ty) return true;
   
-  int I1Size = getStoreSize(I1, TD);
-  int I2Size = getStoreSize(I2, TD);
+  uint64_t I1Size = getStoreSize(I1, TD);
+  uint64_t I2Size = getStoreSize(I2, TD);
   
-  return I1Size != -1 && I2Size != -1 && I1Size >= I2Size;
+  return I1Size != AliasAnalysis::UnknownSize &&
+         I2Size != AliasAnalysis::UnknownSize &&
+         I1Size >= I2Size;
 }
 
 bool DSE::runOnBasicBlock(BasicBlock &BB) {
@@ -373,7 +375,7 @@
     }
     
     Value *killPointer = 0;
-    unsigned killPointerSize = AliasAnalysis::UnknownSize;
+    uint64_t killPointerSize = AliasAnalysis::UnknownSize;
     
     // If we encounter a use of the pointer, it is no longer considered dead
     if (LoadInst *L = dyn_cast<LoadInst>(BBI)) {
@@ -472,7 +474,7 @@
 
 /// RemoveUndeadPointers - check for uses of a pointer that make it
 /// undead when scanning for dead stores to alloca's.
-bool DSE::RemoveUndeadPointers(Value *killPointer, unsigned killPointerSize,
+bool DSE::RemoveUndeadPointers(Value *killPointer, uint64_t killPointerSize,
                                BasicBlock::iterator &BBI,
                                SmallPtrSet<Value*, 64> &deadPointers) {
   AliasAnalysis &AA = getAnalysis<AliasAnalysis>();
@@ -565,7 +567,7 @@
   } while (!NowDeadInsts.empty());
 }
 
-unsigned DSE::getPointerSize(Value *V) const {
+uint64_t DSE::getPointerSize(Value *V) const {
   if (TD) {
     if (AllocaInst *A = dyn_cast<AllocaInst>(V)) {
       // Get size information for the alloca

Modified: llvm/trunk/lib/Transforms/Scalar/LICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LICM.cpp?rev=116875&r1=116874&r2=116875&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LICM.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LICM.cpp Tue Oct 19 17:54:46 2010
@@ -190,7 +190,7 @@
     /// pointerInvalidatedByLoop - Return true if the body of this loop may
     /// store into the memory location pointed to by V.
     ///
-    bool pointerInvalidatedByLoop(Value *V, unsigned Size,
+    bool pointerInvalidatedByLoop(Value *V, uint64_t Size,
                                   const MDNode *TBAAInfo) {
       // Check to see if any of the basic blocks in CurLoop invalidate *V.
       return CurAST->getAliasSetForPointer(V, Size, TBAAInfo).isMod();
@@ -402,7 +402,7 @@
       return true;
     
     // Don't hoist loads which have may-aliased stores in loop.
-    unsigned Size = 0;
+    uint64_t Size = 0;
     if (LI->getType()->isSized())
       Size = AA->getTypeStoreSize(LI->getType());
     return !pointerInvalidatedByLoop(LI->getOperand(0), Size,

Modified: llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp?rev=116875&r1=116874&r2=116875&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/MemCpyOptimizer.cpp Tue Oct 19 17:54:46 2010
@@ -772,7 +772,7 @@
 
   // If the memmove is a constant size, use it for the alias query, this allows
   // us to optimize things like: memmove(P, P+64, 64);
-  unsigned MemMoveSize = AliasAnalysis::UnknownSize;
+  uint64_t MemMoveSize = AliasAnalysis::UnknownSize;
   if (ConstantInt *Len = dyn_cast<ConstantInt>(M->getLength()))
     MemMoveSize = Len->getZExtValue();
   

Modified: llvm/trunk/lib/Transforms/Scalar/Sink.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/Sink.cpp?rev=116875&r1=116874&r2=116875&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/Sink.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/Sink.cpp Tue Oct 19 17:54:46 2010
@@ -157,7 +157,7 @@
     if (L->isVolatile()) return false;
 
     Value *Ptr = L->getPointerOperand();
-    unsigned Size = AA->getTypeStoreSize(L->getType());
+    uint64_t Size = AA->getTypeStoreSize(L->getType());
     for (SmallPtrSet<Instruction *, 8>::iterator I = Stores.begin(),
          E = Stores.end(); I != E; ++I)
       if (AA->getModRefInfo(*I, Ptr, Size) & AliasAnalysis::Mod)



From gohman at apple.com  Tue Oct 19 18:09:08 2010
From: gohman at apple.com (Dan Gohman)
Date: Tue, 19 Oct 2010 23:09:08 -0000
Subject: [llvm-commits] [llvm] r116876 - in /llvm/trunk:
 include/llvm/Analysis/AliasAnalysis.h include/llvm/Analysis/Passes.h
 lib/Analysis/AliasAnalysis.cpp lib/Analysis/BasicAliasAnalysis.cpp
 lib/Analysis/NoAliasAnalysis.cpp
Message-ID: <20101019230908.914A82A6C12C@llvm.org>

Author: djg
Date: Tue Oct 19 18:09:08 2010
New Revision: 116876

URL: http://llvm.org/viewvc/llvm-project?rev=116876&view=rev
Log:
Move NoAA out of BasicAliasAnalysis.cpp into its own file, now that
it doesn't have a special relationship with BasicAliasAnalysis
anymore.

Added:
    llvm/trunk/lib/Analysis/NoAliasAnalysis.cpp
      - copied, changed from r116875, llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp
Modified:
    llvm/trunk/include/llvm/Analysis/AliasAnalysis.h
    llvm/trunk/include/llvm/Analysis/Passes.h
    llvm/trunk/lib/Analysis/AliasAnalysis.cpp
    llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp

Modified: llvm/trunk/include/llvm/Analysis/AliasAnalysis.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/AliasAnalysis.h?rev=116876&r1=116875&r2=116876&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/AliasAnalysis.h (original)
+++ llvm/trunk/include/llvm/Analysis/AliasAnalysis.h Tue Oct 19 18:09:08 2010
@@ -28,7 +28,6 @@
 #define LLVM_ANALYSIS_ALIAS_ANALYSIS_H
 
 #include "llvm/Support/CallSite.h"
-#include "llvm/System/IncludeFile.h"
 #include <vector>
 
 namespace llvm {
@@ -422,11 +421,4 @@
 
 } // End llvm namespace
 
-// Because of the way .a files work, we must force the BasicAA implementation to
-// be pulled in if the AliasAnalysis header is included.  Otherwise we run
-// the risk of AliasAnalysis being used, but the default implementation not
-// being linked into the tool that uses it.
-FORCE_DEFINING_FILE_TO_BE_LINKED(AliasAnalysis)
-FORCE_DEFINING_FILE_TO_BE_LINKED(BasicAliasAnalysis)
-
 #endif

Modified: llvm/trunk/include/llvm/Analysis/Passes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/Passes.h?rev=116876&r1=116875&r2=116876&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/Passes.h (original)
+++ llvm/trunk/include/llvm/Analysis/Passes.h Tue Oct 19 18:09:08 2010
@@ -59,7 +59,7 @@
 
   //===--------------------------------------------------------------------===//
   //
-  // createBasicAliasAnalysisPass - This pass implements the default alias
+  // createBasicAliasAnalysisPass - This pass implements the stateless alias
   // analysis.
   //
   ImmutablePass *createBasicAliasAnalysisPass();

Modified: llvm/trunk/lib/Analysis/AliasAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/AliasAnalysis.cpp?rev=116876&r1=116875&r2=116876&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/AliasAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/AliasAnalysis.cpp Tue Oct 19 18:09:08 2010
@@ -342,9 +342,3 @@
     return A->hasNoAliasAttr() || A->hasByValAttr();
   return false;
 }
-
-// Because of the way .a files work, we must force the BasicAA implementation to
-// be pulled in if the AliasAnalysis classes are pulled in.  Otherwise we run
-// the risk of AliasAnalysis being used, but the default implementation not
-// being linked into the tool that uses it.
-DEFINING_FILE_FOR(AliasAnalysis)

Modified: llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp?rev=116876&r1=116875&r2=116876&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp Tue Oct 19 18:09:08 2010
@@ -1,4 +1,4 @@
-//===- BasicAliasAnalysis.cpp - Local Alias Analysis Impl -----------------===//
+//===- BasicAliasAnalysis.cpp - Stateless Alias Analysis Impl -------------===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -7,9 +7,9 @@
 //
 //===----------------------------------------------------------------------===//
 //
-// This file defines the default implementation of the Alias Analysis interface
-// that simply implements a few identities (two different globals cannot alias,
-// etc), but otherwise does no analysis.
+// This file defines the primary stateless implementation of the
+// Alias Analysis interface that implements identities (two different
+// globals cannot alias, etc), but does no stateful analysis.
 //
 //===----------------------------------------------------------------------===//
 
@@ -129,74 +129,6 @@
 }
 
 //===----------------------------------------------------------------------===//
-// NoAA Pass
-//===----------------------------------------------------------------------===//
-
-namespace {
-  /// NoAA - This class implements the -no-aa pass, which always returns "I
-  /// don't know" for alias queries.  NoAA is unlike other alias analysis
-  /// implementations, in that it does not chain to a previous analysis.  As
-  /// such it doesn't follow many of the rules that other alias analyses must.
-  ///
-  struct NoAA : public ImmutablePass, public AliasAnalysis {
-    static char ID; // Class identification, replacement for typeinfo
-    NoAA() : ImmutablePass(ID) {
-      initializeNoAAPass(*PassRegistry::getPassRegistry());
-    }
-    explicit NoAA(char &PID) : ImmutablePass(PID) {}
-
-    virtual void getAnalysisUsage(AnalysisUsage &AU) const {
-    }
-
-    virtual void initializePass() {
-      TD = getAnalysisIfAvailable<TargetData>();
-    }
-
-    virtual AliasResult alias(const Location &LocA, const Location &LocB) {
-      return MayAlias;
-    }
-
-    virtual ModRefBehavior getModRefBehavior(ImmutableCallSite CS) {
-      return UnknownModRefBehavior;
-    }
-    virtual ModRefBehavior getModRefBehavior(const Function *F) {
-      return UnknownModRefBehavior;
-    }
-
-    virtual bool pointsToConstantMemory(const Location &Loc) { return false; }
-    virtual ModRefResult getModRefInfo(ImmutableCallSite CS,
-                                       const Location &Loc) {
-      return ModRef;
-    }
-    virtual ModRefResult getModRefInfo(ImmutableCallSite CS1,
-                                       ImmutableCallSite CS2) {
-      return ModRef;
-    }
-
-    virtual void deleteValue(Value *V) {}
-    virtual void copyValue(Value *From, Value *To) {}
-    
-    /// getAdjustedAnalysisPointer - This method is used when a pass implements
-    /// an analysis interface through multiple inheritance.  If needed, it
-    /// should override this to adjust the this pointer as needed for the
-    /// specified pass info.
-    virtual void *getAdjustedAnalysisPointer(const void *ID) {
-      if (ID == &AliasAnalysis::ID)
-        return (AliasAnalysis*)this;
-      return this;
-    }
-  };
-}  // End of anonymous namespace
-
-// Register this pass...
-char NoAA::ID = 0;
-INITIALIZE_AG_PASS(NoAA, AliasAnalysis, "no-aa",
-                   "No Alias Analysis (always returns 'may' alias)",
-                   true, true, true)
-
-ImmutablePass *llvm::createNoAAPass() { return new NoAA(); }
-
-//===----------------------------------------------------------------------===//
 // GetElementPtr Instruction Decomposition and Analysis
 //===----------------------------------------------------------------------===//
 
@@ -487,12 +419,10 @@
 #endif
 
 namespace {
-  /// BasicAliasAnalysis - This is the default alias analysis implementation.
-  /// Because it doesn't chain to a previous alias analysis (like -no-aa), it
-  /// derives from the NoAA class.
-  struct BasicAliasAnalysis : public NoAA {
+  /// BasicAliasAnalysis - This is the primary alias analysis implementation.
+  struct BasicAliasAnalysis : public ImmutablePass, public AliasAnalysis {
     static char ID; // Class identification, replacement for typeinfo
-    BasicAliasAnalysis() : NoAA(ID) {
+    BasicAliasAnalysis() : ImmutablePass(ID) {
       initializeBasicAliasAnalysisPass(*PassRegistry::getPassRegistry());
     }
 
@@ -580,7 +510,7 @@
 // Register this pass...
 char BasicAliasAnalysis::ID = 0;
 INITIALIZE_AG_PASS(BasicAliasAnalysis, AliasAnalysis, "basicaa",
-                   "Basic Alias Analysis (default AA impl)",
+                   "Basic Alias Analysis (stateless AA impl)",
                    false, true, false)
 
 ImmutablePass *llvm::createBasicAliasAnalysisPass() {
@@ -1125,6 +1055,3 @@
   return AliasAnalysis::alias(Location(V1, V1Size, V1TBAAInfo),
                               Location(V2, V2Size, V2TBAAInfo));
 }
-
-// Make sure that anything that uses AliasAnalysis pulls in this file.
-DEFINING_FILE_FOR(BasicAliasAnalysis)

Copied: llvm/trunk/lib/Analysis/NoAliasAnalysis.cpp (from r116875, llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/NoAliasAnalysis.cpp?p2=llvm/trunk/lib/Analysis/NoAliasAnalysis.cpp&p1=llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp&r1=116875&r2=116876&rev=116876&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/NoAliasAnalysis.cpp Tue Oct 19 18:09:08 2010
@@ -1,4 +1,4 @@
-//===- BasicAliasAnalysis.cpp - Local Alias Analysis Impl -----------------===//
+//===- NoAliasAnalysis.cpp - Minimal Alias Analysis Impl ------------------===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -8,130 +8,16 @@
 //===----------------------------------------------------------------------===//
 //
 // This file defines the default implementation of the Alias Analysis interface
-// that simply implements a few identities (two different globals cannot alias,
-// etc), but otherwise does no analysis.
+// that simply returns "I don't know" for all queries.
 //
 //===----------------------------------------------------------------------===//
 
 #include "llvm/Analysis/AliasAnalysis.h"
 #include "llvm/Analysis/Passes.h"
-#include "llvm/Constants.h"
-#include "llvm/DerivedTypes.h"
-#include "llvm/Function.h"
-#include "llvm/GlobalAlias.h"
-#include "llvm/GlobalVariable.h"
-#include "llvm/Instructions.h"
-#include "llvm/IntrinsicInst.h"
-#include "llvm/LLVMContext.h"
-#include "llvm/Operator.h"
 #include "llvm/Pass.h"
-#include "llvm/Analysis/CaptureTracking.h"
-#include "llvm/Analysis/MemoryBuiltins.h"
-#include "llvm/Analysis/ValueTracking.h"
 #include "llvm/Target/TargetData.h"
-#include "llvm/ADT/SmallPtrSet.h"
-#include "llvm/ADT/SmallVector.h"
-#include "llvm/Support/ErrorHandling.h"
-#include "llvm/Support/GetElementPtrTypeIterator.h"
-#include <algorithm>
 using namespace llvm;
 
-//===----------------------------------------------------------------------===//
-// Useful predicates
-//===----------------------------------------------------------------------===//
-
-/// isKnownNonNull - Return true if we know that the specified value is never
-/// null.
-static bool isKnownNonNull(const Value *V) {
-  // Alloca never returns null, malloc might.
-  if (isa<AllocaInst>(V)) return true;
-  
-  // A byval argument is never null.
-  if (const Argument *A = dyn_cast<Argument>(V))
-    return A->hasByValAttr();
-
-  // Global values are not null unless extern weak.
-  if (const GlobalValue *GV = dyn_cast<GlobalValue>(V))
-    return !GV->hasExternalWeakLinkage();
-  return false;
-}
-
-/// isNonEscapingLocalObject - Return true if the pointer is to a function-local
-/// object that never escapes from the function.
-static bool isNonEscapingLocalObject(const Value *V) {
-  // If this is a local allocation, check to see if it escapes.
-  if (isa<AllocaInst>(V) || isNoAliasCall(V))
-    // Set StoreCaptures to True so that we can assume in our callers that the
-    // pointer is not the result of a load instruction. Currently
-    // PointerMayBeCaptured doesn't have any special analysis for the
-    // StoreCaptures=false case; if it did, our callers could be refined to be
-    // more precise.
-    return !PointerMayBeCaptured(V, false, /*StoreCaptures=*/true);
-
-  // If this is an argument that corresponds to a byval or noalias argument,
-  // then it has not escaped before entering the function.  Check if it escapes
-  // inside the function.
-  if (const Argument *A = dyn_cast<Argument>(V))
-    if (A->hasByValAttr() || A->hasNoAliasAttr()) {
-      // Don't bother analyzing arguments already known not to escape.
-      if (A->hasNoCaptureAttr())
-        return true;
-      return !PointerMayBeCaptured(V, false, /*StoreCaptures=*/true);
-    }
-  return false;
-}
-
-/// isEscapeSource - Return true if the pointer is one which would have
-/// been considered an escape by isNonEscapingLocalObject.
-static bool isEscapeSource(const Value *V) {
-  if (isa<CallInst>(V) || isa<InvokeInst>(V) || isa<Argument>(V))
-    return true;
-
-  // The load case works because isNonEscapingLocalObject considers all
-  // stores to be escapes (it passes true for the StoreCaptures argument
-  // to PointerMayBeCaptured).
-  if (isa<LoadInst>(V))
-    return true;
-
-  return false;
-}
-
-/// isObjectSmallerThan - Return true if we can prove that the object specified
-/// by V is smaller than Size.
-static bool isObjectSmallerThan(const Value *V, uint64_t Size,
-                                const TargetData &TD) {
-  const Type *AccessTy;
-  if (const GlobalVariable *GV = dyn_cast<GlobalVariable>(V)) {
-    AccessTy = GV->getType()->getElementType();
-  } else if (const AllocaInst *AI = dyn_cast<AllocaInst>(V)) {
-    if (!AI->isArrayAllocation())
-      AccessTy = AI->getType()->getElementType();
-    else
-      return false;
-  } else if (const CallInst* CI = extractMallocCall(V)) {
-    if (!isArrayMalloc(V, &TD))
-      // The size is the argument to the malloc call.
-      if (const ConstantInt* C = dyn_cast<ConstantInt>(CI->getArgOperand(0)))
-        return (C->getZExtValue() < Size);
-    return false;
-  } else if (const Argument *A = dyn_cast<Argument>(V)) {
-    if (A->hasByValAttr())
-      AccessTy = cast<PointerType>(A->getType())->getElementType();
-    else
-      return false;
-  } else {
-    return false;
-  }
-  
-  if (AccessTy->isSized())
-    return TD.getTypeAllocSize(AccessTy) < Size;
-  return false;
-}
-
-//===----------------------------------------------------------------------===//
-// NoAA Pass
-//===----------------------------------------------------------------------===//
-
 namespace {
   /// NoAA - This class implements the -no-aa pass, which always returns "I
   /// don't know" for alias queries.  NoAA is unlike other alias analysis
@@ -143,12 +29,13 @@
     NoAA() : ImmutablePass(ID) {
       initializeNoAAPass(*PassRegistry::getPassRegistry());
     }
-    explicit NoAA(char &PID) : ImmutablePass(PID) {}
 
     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
     }
 
     virtual void initializePass() {
+      // Note: NoAA does not call InitializeAliasAnalysis because it's
+      // special and does not support chaining.
       TD = getAnalysisIfAvailable<TargetData>();
     }
 
@@ -195,936 +82,3 @@
                    true, true, true)
 
 ImmutablePass *llvm::createNoAAPass() { return new NoAA(); }
-
-//===----------------------------------------------------------------------===//
-// GetElementPtr Instruction Decomposition and Analysis
-//===----------------------------------------------------------------------===//
-
-namespace {
-  enum ExtensionKind {
-    EK_NotExtended,
-    EK_SignExt,
-    EK_ZeroExt
-  };
-  
-  struct VariableGEPIndex {
-    const Value *V;
-    ExtensionKind Extension;
-    int64_t Scale;
-  };
-}
-
-
-/// GetLinearExpression - Analyze the specified value as a linear expression:
-/// "A*V + B", where A and B are constant integers.  Return the scale and offset
-/// values as APInts and return V as a Value*, and return whether we looked
-/// through any sign or zero extends.  The incoming Value is known to have
-/// IntegerType and it may already be sign or zero extended.
-///
-/// Note that this looks through extends, so the high bits may not be
-/// represented in the result.
-static Value *GetLinearExpression(Value *V, APInt &Scale, APInt &Offset,
-                                  ExtensionKind &Extension,
-                                  const TargetData &TD, unsigned Depth) {
-  assert(V->getType()->isIntegerTy() && "Not an integer value");
-
-  // Limit our recursion depth.
-  if (Depth == 6) {
-    Scale = 1;
-    Offset = 0;
-    return V;
-  }
-  
-  if (BinaryOperator *BOp = dyn_cast<BinaryOperator>(V)) {
-    if (ConstantInt *RHSC = dyn_cast<ConstantInt>(BOp->getOperand(1))) {
-      switch (BOp->getOpcode()) {
-      default: break;
-      case Instruction::Or:
-        // X|C == X+C if all the bits in C are unset in X.  Otherwise we can't
-        // analyze it.
-        if (!MaskedValueIsZero(BOp->getOperand(0), RHSC->getValue(), &TD))
-          break;
-        // FALL THROUGH.
-      case Instruction::Add:
-        V = GetLinearExpression(BOp->getOperand(0), Scale, Offset, Extension,
-                                TD, Depth+1);
-        Offset += RHSC->getValue();
-        return V;
-      case Instruction::Mul:
-        V = GetLinearExpression(BOp->getOperand(0), Scale, Offset, Extension,
-                                TD, Depth+1);
-        Offset *= RHSC->getValue();
-        Scale *= RHSC->getValue();
-        return V;
-      case Instruction::Shl:
-        V = GetLinearExpression(BOp->getOperand(0), Scale, Offset, Extension,
-                                TD, Depth+1);
-        Offset <<= RHSC->getValue().getLimitedValue();
-        Scale <<= RHSC->getValue().getLimitedValue();
-        return V;
-      }
-    }
-  }
-  
-  // Since GEP indices are sign extended anyway, we don't care about the high
-  // bits of a sign or zero extended value - just scales and offsets.  The
-  // extensions have to be consistent though.
-  if ((isa<SExtInst>(V) && Extension != EK_ZeroExt) ||
-      (isa<ZExtInst>(V) && Extension != EK_SignExt)) {
-    Value *CastOp = cast<CastInst>(V)->getOperand(0);
-    unsigned OldWidth = Scale.getBitWidth();
-    unsigned SmallWidth = CastOp->getType()->getPrimitiveSizeInBits();
-    Scale.trunc(SmallWidth);
-    Offset.trunc(SmallWidth);
-    Extension = isa<SExtInst>(V) ? EK_SignExt : EK_ZeroExt;
-
-    Value *Result = GetLinearExpression(CastOp, Scale, Offset, Extension,
-                                        TD, Depth+1);
-    Scale.zext(OldWidth);
-    Offset.zext(OldWidth);
-    
-    return Result;
-  }
-  
-  Scale = 1;
-  Offset = 0;
-  return V;
-}
-
-/// DecomposeGEPExpression - If V is a symbolic pointer expression, decompose it
-/// into a base pointer with a constant offset and a number of scaled symbolic
-/// offsets.
-///
-/// The scaled symbolic offsets (represented by pairs of a Value* and a scale in
-/// the VarIndices vector) are Value*'s that are known to be scaled by the
-/// specified amount, but which may have other unrepresented high bits. As such,
-/// the gep cannot necessarily be reconstructed from its decomposed form.
-///
-/// When TargetData is around, this function is capable of analyzing everything
-/// that Value::getUnderlyingObject() can look through.  When not, it just looks
-/// through pointer casts.
-///
-static const Value *
-DecomposeGEPExpression(const Value *V, int64_t &BaseOffs,
-                       SmallVectorImpl<VariableGEPIndex> &VarIndices,
-                       const TargetData *TD) {
-  // Limit recursion depth to limit compile time in crazy cases.
-  unsigned MaxLookup = 6;
-  
-  BaseOffs = 0;
-  do {
-    // See if this is a bitcast or GEP.
-    const Operator *Op = dyn_cast<Operator>(V);
-    if (Op == 0) {
-      // The only non-operator case we can handle are GlobalAliases.
-      if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(V)) {
-        if (!GA->mayBeOverridden()) {
-          V = GA->getAliasee();
-          continue;
-        }
-      }
-      return V;
-    }
-    
-    if (Op->getOpcode() == Instruction::BitCast) {
-      V = Op->getOperand(0);
-      continue;
-    }
-    
-    const GEPOperator *GEPOp = dyn_cast<GEPOperator>(Op);
-    if (GEPOp == 0)
-      return V;
-    
-    // Don't attempt to analyze GEPs over unsized objects.
-    if (!cast<PointerType>(GEPOp->getOperand(0)->getType())
-        ->getElementType()->isSized())
-      return V;
-    
-    // If we are lacking TargetData information, we can't compute the offets of
-    // elements computed by GEPs.  However, we can handle bitcast equivalent
-    // GEPs.
-    if (TD == 0) {
-      if (!GEPOp->hasAllZeroIndices())
-        return V;
-      V = GEPOp->getOperand(0);
-      continue;
-    }
-    
-    // Walk the indices of the GEP, accumulating them into BaseOff/VarIndices.
-    gep_type_iterator GTI = gep_type_begin(GEPOp);
-    for (User::const_op_iterator I = GEPOp->op_begin()+1,
-         E = GEPOp->op_end(); I != E; ++I) {
-      Value *Index = *I;
-      // Compute the (potentially symbolic) offset in bytes for this index.
-      if (const StructType *STy = dyn_cast<StructType>(*GTI++)) {
-        // For a struct, add the member offset.
-        unsigned FieldNo = cast<ConstantInt>(Index)->getZExtValue();
-        if (FieldNo == 0) continue;
-        
-        BaseOffs += TD->getStructLayout(STy)->getElementOffset(FieldNo);
-        continue;
-      }
-      
-      // For an array/pointer, add the element offset, explicitly scaled.
-      if (ConstantInt *CIdx = dyn_cast<ConstantInt>(Index)) {
-        if (CIdx->isZero()) continue;
-        BaseOffs += TD->getTypeAllocSize(*GTI)*CIdx->getSExtValue();
-        continue;
-      }
-      
-      uint64_t Scale = TD->getTypeAllocSize(*GTI);
-      ExtensionKind Extension = EK_NotExtended;
-      
-      // If the integer type is smaller than the pointer size, it is implicitly
-      // sign extended to pointer size.
-      unsigned Width = cast<IntegerType>(Index->getType())->getBitWidth();
-      if (TD->getPointerSizeInBits() > Width)
-        Extension = EK_SignExt;
-      
-      // Use GetLinearExpression to decompose the index into a C1*V+C2 form.
-      APInt IndexScale(Width, 0), IndexOffset(Width, 0);
-      Index = GetLinearExpression(Index, IndexScale, IndexOffset, Extension,
-                                  *TD, 0);
-      
-      // The GEP index scale ("Scale") scales C1*V+C2, yielding (C1*V+C2)*Scale.
-      // This gives us an aggregate computation of (C1*Scale)*V + C2*Scale.
-      BaseOffs += IndexOffset.getSExtValue()*Scale;
-      Scale *= IndexScale.getSExtValue();
-      
-      
-      // If we already had an occurrance of this index variable, merge this
-      // scale into it.  For example, we want to handle:
-      //   A[x][x] -> x*16 + x*4 -> x*20
-      // This also ensures that 'x' only appears in the index list once.
-      for (unsigned i = 0, e = VarIndices.size(); i != e; ++i) {
-        if (VarIndices[i].V == Index &&
-            VarIndices[i].Extension == Extension) {
-          Scale += VarIndices[i].Scale;
-          VarIndices.erase(VarIndices.begin()+i);
-          break;
-        }
-      }
-      
-      // Make sure that we have a scale that makes sense for this target's
-      // pointer size.
-      if (unsigned ShiftBits = 64-TD->getPointerSizeInBits()) {
-        Scale <<= ShiftBits;
-        Scale = (int64_t)Scale >> ShiftBits;
-      }
-      
-      if (Scale) {
-        VariableGEPIndex Entry = {Index, Extension, Scale};
-        VarIndices.push_back(Entry);
-      }
-    }
-    
-    // Analyze the base pointer next.
-    V = GEPOp->getOperand(0);
-  } while (--MaxLookup);
-  
-  // If the chain of expressions is too deep, just return early.
-  return V;
-}
-
-/// GetIndexDifference - Dest and Src are the variable indices from two
-/// decomposed GetElementPtr instructions GEP1 and GEP2 which have common base
-/// pointers.  Subtract the GEP2 indices from GEP1 to find the symbolic
-/// difference between the two pointers. 
-static void GetIndexDifference(SmallVectorImpl<VariableGEPIndex> &Dest,
-                               const SmallVectorImpl<VariableGEPIndex> &Src) {
-  if (Src.empty()) return;
-
-  for (unsigned i = 0, e = Src.size(); i != e; ++i) {
-    const Value *V = Src[i].V;
-    ExtensionKind Extension = Src[i].Extension;
-    int64_t Scale = Src[i].Scale;
-    
-    // Find V in Dest.  This is N^2, but pointer indices almost never have more
-    // than a few variable indexes.
-    for (unsigned j = 0, e = Dest.size(); j != e; ++j) {
-      if (Dest[j].V != V || Dest[j].Extension != Extension) continue;
-      
-      // If we found it, subtract off Scale V's from the entry in Dest.  If it
-      // goes to zero, remove the entry.
-      if (Dest[j].Scale != Scale)
-        Dest[j].Scale -= Scale;
-      else
-        Dest.erase(Dest.begin()+j);
-      Scale = 0;
-      break;
-    }
-    
-    // If we didn't consume this entry, add it to the end of the Dest list.
-    if (Scale) {
-      VariableGEPIndex Entry = { V, Extension, -Scale };
-      Dest.push_back(Entry);
-    }
-  }
-}
-
-//===----------------------------------------------------------------------===//
-// BasicAliasAnalysis Pass
-//===----------------------------------------------------------------------===//
-
-#ifndef NDEBUG
-static const Function *getParent(const Value *V) {
-  if (const Instruction *inst = dyn_cast<Instruction>(V))
-    return inst->getParent()->getParent();
-
-  if (const Argument *arg = dyn_cast<Argument>(V))
-    return arg->getParent();
-
-  return NULL;
-}
-
-static bool notDifferentParent(const Value *O1, const Value *O2) {
-
-  const Function *F1 = getParent(O1);
-  const Function *F2 = getParent(O2);
-
-  return !F1 || !F2 || F1 == F2;
-}
-#endif
-
-namespace {
-  /// BasicAliasAnalysis - This is the default alias analysis implementation.
-  /// Because it doesn't chain to a previous alias analysis (like -no-aa), it
-  /// derives from the NoAA class.
-  struct BasicAliasAnalysis : public NoAA {
-    static char ID; // Class identification, replacement for typeinfo
-    BasicAliasAnalysis() : NoAA(ID) {
-      initializeBasicAliasAnalysisPass(*PassRegistry::getPassRegistry());
-    }
-
-    virtual void initializePass() {
-      InitializeAliasAnalysis(this);
-    }
-
-    virtual void getAnalysisUsage(AnalysisUsage &AU) const {
-      AU.addRequired<AliasAnalysis>();
-    }
-
-    virtual AliasResult alias(const Location &LocA,
-                              const Location &LocB) {
-      assert(Visited.empty() && "Visited must be cleared after use!");
-      assert(notDifferentParent(LocA.Ptr, LocB.Ptr) &&
-             "BasicAliasAnalysis doesn't support interprocedural queries.");
-      AliasResult Alias = aliasCheck(LocA.Ptr, LocA.Size, LocA.TBAATag,
-                                     LocB.Ptr, LocB.Size, LocB.TBAATag);
-      Visited.clear();
-      return Alias;
-    }
-
-    virtual ModRefResult getModRefInfo(ImmutableCallSite CS,
-                                       const Location &Loc);
-
-    virtual ModRefResult getModRefInfo(ImmutableCallSite CS1,
-                                       ImmutableCallSite CS2) {
-      // The AliasAnalysis base class has some smarts, lets use them.
-      return AliasAnalysis::getModRefInfo(CS1, CS2);
-    }
-
-    /// pointsToConstantMemory - Chase pointers until we find a (constant
-    /// global) or not.
-    virtual bool pointsToConstantMemory(const Location &Loc);
-
-    /// getModRefBehavior - Return the behavior when calling the given
-    /// call site.
-    virtual ModRefBehavior getModRefBehavior(ImmutableCallSite CS);
-
-    /// getModRefBehavior - Return the behavior when calling the given function.
-    /// For use when the call site is not known.
-    virtual ModRefBehavior getModRefBehavior(const Function *F);
-
-    /// getAdjustedAnalysisPointer - This method is used when a pass implements
-    /// an analysis interface through multiple inheritance.  If needed, it
-    /// should override this to adjust the this pointer as needed for the
-    /// specified pass info.
-    virtual void *getAdjustedAnalysisPointer(const void *ID) {
-      if (ID == &AliasAnalysis::ID)
-        return (AliasAnalysis*)this;
-      return this;
-    }
-    
-  private:
-    // Visited - Track instructions visited by a aliasPHI, aliasSelect(), and aliasGEP().
-    SmallPtrSet<const Value*, 16> Visited;
-
-    // aliasGEP - Provide a bunch of ad-hoc rules to disambiguate a GEP
-    // instruction against another.
-    AliasResult aliasGEP(const GEPOperator *V1, uint64_t V1Size,
-                         const Value *V2, uint64_t V2Size,
-                         const MDNode *V2TBAAInfo,
-                         const Value *UnderlyingV1, const Value *UnderlyingV2);
-
-    // aliasPHI - Provide a bunch of ad-hoc rules to disambiguate a PHI
-    // instruction against another.
-    AliasResult aliasPHI(const PHINode *PN, uint64_t PNSize,
-                         const MDNode *PNTBAAInfo,
-                         const Value *V2, uint64_t V2Size,
-                         const MDNode *V2TBAAInfo);
-
-    /// aliasSelect - Disambiguate a Select instruction against another value.
-    AliasResult aliasSelect(const SelectInst *SI, uint64_t SISize,
-                            const MDNode *SITBAAInfo,
-                            const Value *V2, uint64_t V2Size,
-                            const MDNode *V2TBAAInfo);
-
-    AliasResult aliasCheck(const Value *V1, uint64_t V1Size,
-                           const MDNode *V1TBAATag,
-                           const Value *V2, uint64_t V2Size,
-                           const MDNode *V2TBAATag);
-  };
-}  // End of anonymous namespace
-
-// Register this pass...
-char BasicAliasAnalysis::ID = 0;
-INITIALIZE_AG_PASS(BasicAliasAnalysis, AliasAnalysis, "basicaa",
-                   "Basic Alias Analysis (default AA impl)",
-                   false, true, false)
-
-ImmutablePass *llvm::createBasicAliasAnalysisPass() {
-  return new BasicAliasAnalysis();
-}
-
-
-/// pointsToConstantMemory - Chase pointers until we find a (constant
-/// global) or not.
-bool BasicAliasAnalysis::pointsToConstantMemory(const Location &Loc) {
-  if (const GlobalVariable *GV = 
-        dyn_cast<GlobalVariable>(Loc.Ptr->getUnderlyingObject()))
-    // Note: this doesn't require GV to be "ODR" because it isn't legal for a
-    // global to be marked constant in some modules and non-constant in others.
-    // GV may even be a declaration, not a definition.
-    return GV->isConstant();
-
-  return AliasAnalysis::pointsToConstantMemory(Loc);
-}
-
-/// getModRefBehavior - Return the behavior when calling the given call site.
-AliasAnalysis::ModRefBehavior
-BasicAliasAnalysis::getModRefBehavior(ImmutableCallSite CS) {
-  if (CS.doesNotAccessMemory())
-    // Can't do better than this.
-    return DoesNotAccessMemory;
-
-  ModRefBehavior Min = UnknownModRefBehavior;
-
-  // If the callsite knows it only reads memory, don't return worse
-  // than that.
-  if (CS.onlyReadsMemory())
-    Min = OnlyReadsMemory;
-
-  // The AliasAnalysis base class has some smarts, lets use them.
-  return std::min(AliasAnalysis::getModRefBehavior(CS), Min);
-}
-
-/// getModRefBehavior - Return the behavior when calling the given function.
-/// For use when the call site is not known.
-AliasAnalysis::ModRefBehavior
-BasicAliasAnalysis::getModRefBehavior(const Function *F) {
-  if (F->doesNotAccessMemory())
-    // Can't do better than this.
-    return DoesNotAccessMemory;
-  if (F->onlyReadsMemory())
-    return OnlyReadsMemory;
-  if (unsigned id = F->getIntrinsicID())
-    return getIntrinsicModRefBehavior(id);
-
-  return AliasAnalysis::getModRefBehavior(F);
-}
-
-/// getModRefInfo - Check to see if the specified callsite can clobber the
-/// specified memory object.  Since we only look at local properties of this
-/// function, we really can't say much about this query.  We do, however, use
-/// simple "address taken" analysis on local objects.
-AliasAnalysis::ModRefResult
-BasicAliasAnalysis::getModRefInfo(ImmutableCallSite CS,
-                                  const Location &Loc) {
-  assert(notDifferentParent(CS.getInstruction(), Loc.Ptr) &&
-         "AliasAnalysis query involving multiple functions!");
-
-  const Value *Object = Loc.Ptr->getUnderlyingObject();
-  
-  // If this is a tail call and Loc.Ptr points to a stack location, we know that
-  // the tail call cannot access or modify the local stack.
-  // We cannot exclude byval arguments here; these belong to the caller of
-  // the current function not to the current function, and a tail callee
-  // may reference them.
-  if (isa<AllocaInst>(Object))
-    if (const CallInst *CI = dyn_cast<CallInst>(CS.getInstruction()))
-      if (CI->isTailCall())
-        return NoModRef;
-  
-  // If the pointer is to a locally allocated object that does not escape,
-  // then the call can not mod/ref the pointer unless the call takes the pointer
-  // as an argument, and itself doesn't capture it.
-  if (!isa<Constant>(Object) && CS.getInstruction() != Object &&
-      isNonEscapingLocalObject(Object)) {
-    bool PassedAsArg = false;
-    unsigned ArgNo = 0;
-    for (ImmutableCallSite::arg_iterator CI = CS.arg_begin(), CE = CS.arg_end();
-         CI != CE; ++CI, ++ArgNo) {
-      // Only look at the no-capture pointer arguments.
-      if (!(*CI)->getType()->isPointerTy() ||
-          !CS.paramHasAttr(ArgNo+1, Attribute::NoCapture))
-        continue;
-      
-      // If this is a no-capture pointer argument, see if we can tell that it
-      // is impossible to alias the pointer we're checking.  If not, we have to
-      // assume that the call could touch the pointer, even though it doesn't
-      // escape.
-      if (!isNoAlias(Location(cast<Value>(CI)), Loc)) {
-        PassedAsArg = true;
-        break;
-      }
-    }
-    
-    if (!PassedAsArg)
-      return NoModRef;
-  }
-
-  // Finally, handle specific knowledge of intrinsics.
-  const IntrinsicInst *II = dyn_cast<IntrinsicInst>(CS.getInstruction());
-  if (II != 0)
-    switch (II->getIntrinsicID()) {
-    default: break;
-    case Intrinsic::memcpy:
-    case Intrinsic::memmove: {
-      uint64_t Len = UnknownSize;
-      if (ConstantInt *LenCI = dyn_cast<ConstantInt>(II->getArgOperand(2)))
-        Len = LenCI->getZExtValue();
-      Value *Dest = II->getArgOperand(0);
-      Value *Src = II->getArgOperand(1);
-      if (isNoAlias(Location(Dest, Len), Loc)) {
-        if (isNoAlias(Location(Src, Len), Loc))
-          return NoModRef;
-        return Ref;
-      }
-      break;
-    }
-    case Intrinsic::memset:
-      // Since memset is 'accesses arguments' only, the AliasAnalysis base class
-      // will handle it for the variable length case.
-      if (ConstantInt *LenCI = dyn_cast<ConstantInt>(II->getArgOperand(2))) {
-        uint64_t Len = LenCI->getZExtValue();
-        Value *Dest = II->getArgOperand(0);
-        if (isNoAlias(Location(Dest, Len), Loc))
-          return NoModRef;
-      }
-      break;
-    case Intrinsic::atomic_cmp_swap:
-    case Intrinsic::atomic_swap:
-    case Intrinsic::atomic_load_add:
-    case Intrinsic::atomic_load_sub:
-    case Intrinsic::atomic_load_and:
-    case Intrinsic::atomic_load_nand:
-    case Intrinsic::atomic_load_or:
-    case Intrinsic::atomic_load_xor:
-    case Intrinsic::atomic_load_max:
-    case Intrinsic::atomic_load_min:
-    case Intrinsic::atomic_load_umax:
-    case Intrinsic::atomic_load_umin:
-      if (TD) {
-        Value *Op1 = II->getArgOperand(0);
-        uint64_t Op1Size = TD->getTypeStoreSize(Op1->getType());
-        MDNode *Tag = II->getMetadata(LLVMContext::MD_tbaa);
-        if (isNoAlias(Location(Op1, Op1Size, Tag), Loc))
-          return NoModRef;
-      }
-      break;
-    case Intrinsic::lifetime_start:
-    case Intrinsic::lifetime_end:
-    case Intrinsic::invariant_start: {
-      uint64_t PtrSize =
-        cast<ConstantInt>(II->getArgOperand(0))->getZExtValue();
-      if (isNoAlias(Location(II->getArgOperand(1),
-                             PtrSize,
-                             II->getMetadata(LLVMContext::MD_tbaa)),
-                    Loc))
-        return NoModRef;
-      break;
-    }
-    case Intrinsic::invariant_end: {
-      uint64_t PtrSize =
-        cast<ConstantInt>(II->getArgOperand(1))->getZExtValue();
-      if (isNoAlias(Location(II->getArgOperand(2),
-                             PtrSize,
-                             II->getMetadata(LLVMContext::MD_tbaa)),
-                    Loc))
-        return NoModRef;
-      break;
-    }
-    }
-
-  // The AliasAnalysis base class has some smarts, lets use them.
-  return AliasAnalysis::getModRefInfo(CS, Loc);
-}
-
-/// aliasGEP - Provide a bunch of ad-hoc rules to disambiguate a GEP instruction
-/// against another pointer.  We know that V1 is a GEP, but we don't know
-/// anything about V2.  UnderlyingV1 is GEP1->getUnderlyingObject(),
-/// UnderlyingV2 is the same for V2.
-///
-AliasAnalysis::AliasResult
-BasicAliasAnalysis::aliasGEP(const GEPOperator *GEP1, uint64_t V1Size,
-                             const Value *V2, uint64_t V2Size,
-                             const MDNode *V2TBAAInfo,
-                             const Value *UnderlyingV1,
-                             const Value *UnderlyingV2) {
-  // If this GEP has been visited before, we're on a use-def cycle.
-  // Such cycles are only valid when PHI nodes are involved or in unreachable
-  // code. The visitPHI function catches cycles containing PHIs, but there
-  // could still be a cycle without PHIs in unreachable code.
-  if (!Visited.insert(GEP1))
-    return MayAlias;
-
-  int64_t GEP1BaseOffset;
-  SmallVector<VariableGEPIndex, 4> GEP1VariableIndices;
-
-  // If we have two gep instructions with must-alias'ing base pointers, figure
-  // out if the indexes to the GEP tell us anything about the derived pointer.
-  if (const GEPOperator *GEP2 = dyn_cast<GEPOperator>(V2)) {
-    // Do the base pointers alias?
-    AliasResult BaseAlias = aliasCheck(UnderlyingV1, UnknownSize, 0,
-                                       UnderlyingV2, UnknownSize, 0);
-    
-    // If we get a No or May, then return it immediately, no amount of analysis
-    // will improve this situation.
-    if (BaseAlias != MustAlias) return BaseAlias;
-    
-    // Otherwise, we have a MustAlias.  Since the base pointers alias each other
-    // exactly, see if the computed offset from the common pointer tells us
-    // about the relation of the resulting pointer.
-    const Value *GEP1BasePtr =
-      DecomposeGEPExpression(GEP1, GEP1BaseOffset, GEP1VariableIndices, TD);
-    
-    int64_t GEP2BaseOffset;
-    SmallVector<VariableGEPIndex, 4> GEP2VariableIndices;
-    const Value *GEP2BasePtr =
-      DecomposeGEPExpression(GEP2, GEP2BaseOffset, GEP2VariableIndices, TD);
-    
-    // If DecomposeGEPExpression isn't able to look all the way through the
-    // addressing operation, we must not have TD and this is too complex for us
-    // to handle without it.
-    if (GEP1BasePtr != UnderlyingV1 || GEP2BasePtr != UnderlyingV2) {
-      assert(TD == 0 &&
-             "DecomposeGEPExpression and getUnderlyingObject disagree!");
-      return MayAlias;
-    }
-    
-    // Subtract the GEP2 pointer from the GEP1 pointer to find out their
-    // symbolic difference.
-    GEP1BaseOffset -= GEP2BaseOffset;
-    GetIndexDifference(GEP1VariableIndices, GEP2VariableIndices);
-    
-  } else {
-    // Check to see if these two pointers are related by the getelementptr
-    // instruction.  If one pointer is a GEP with a non-zero index of the other
-    // pointer, we know they cannot alias.
-
-    // If both accesses are unknown size, we can't do anything useful here.
-    if (V1Size == UnknownSize && V2Size == UnknownSize)
-      return MayAlias;
-
-    AliasResult R = aliasCheck(UnderlyingV1, UnknownSize, 0,
-                               V2, V2Size, V2TBAAInfo);
-    if (R != MustAlias)
-      // If V2 may alias GEP base pointer, conservatively returns MayAlias.
-      // If V2 is known not to alias GEP base pointer, then the two values
-      // cannot alias per GEP semantics: "A pointer value formed from a
-      // getelementptr instruction is associated with the addresses associated
-      // with the first operand of the getelementptr".
-      return R;
-
-    const Value *GEP1BasePtr =
-      DecomposeGEPExpression(GEP1, GEP1BaseOffset, GEP1VariableIndices, TD);
-    
-    // If DecomposeGEPExpression isn't able to look all the way through the
-    // addressing operation, we must not have TD and this is too complex for us
-    // to handle without it.
-    if (GEP1BasePtr != UnderlyingV1) {
-      assert(TD == 0 &&
-             "DecomposeGEPExpression and getUnderlyingObject disagree!");
-      return MayAlias;
-    }
-  }
-  
-  // In the two GEP Case, if there is no difference in the offsets of the
-  // computed pointers, the resultant pointers are a must alias.  This
-  // hapens when we have two lexically identical GEP's (for example).
-  //
-  // In the other case, if we have getelementptr <ptr>, 0, 0, 0, 0, ... and V2
-  // must aliases the GEP, the end result is a must alias also.
-  if (GEP1BaseOffset == 0 && GEP1VariableIndices.empty())
-    return MustAlias;
-
-  // If we have a known constant offset, see if this offset is larger than the
-  // access size being queried.  If so, and if no variable indices can remove
-  // pieces of this constant, then we know we have a no-alias.  For example,
-  //   &A[100] != &A.
-  
-  // In order to handle cases like &A[100][i] where i is an out of range
-  // subscript, we have to ignore all constant offset pieces that are a multiple
-  // of a scaled index.  Do this by removing constant offsets that are a
-  // multiple of any of our variable indices.  This allows us to transform
-  // things like &A[i][1] because i has a stride of (e.g.) 8 bytes but the 1
-  // provides an offset of 4 bytes (assuming a <= 4 byte access).
-  for (unsigned i = 0, e = GEP1VariableIndices.size();
-       i != e && GEP1BaseOffset;++i)
-    if (int64_t RemovedOffset = GEP1BaseOffset/GEP1VariableIndices[i].Scale)
-      GEP1BaseOffset -= RemovedOffset*GEP1VariableIndices[i].Scale;
-  
-  // If our known offset is bigger than the access size, we know we don't have
-  // an alias.
-  if (GEP1BaseOffset) {
-    if (GEP1BaseOffset >= 0 ?
-        (V2Size != UnknownSize && (uint64_t)GEP1BaseOffset >= V2Size) :
-        (V1Size != UnknownSize && -(uint64_t)GEP1BaseOffset >= V1Size &&
-         GEP1BaseOffset != INT64_MIN))
-      return NoAlias;
-  }
-  
-  return MayAlias;
-}
-
-/// aliasSelect - Provide a bunch of ad-hoc rules to disambiguate a Select
-/// instruction against another.
-AliasAnalysis::AliasResult
-BasicAliasAnalysis::aliasSelect(const SelectInst *SI, uint64_t SISize,
-                                const MDNode *SITBAAInfo,
-                                const Value *V2, uint64_t V2Size,
-                                const MDNode *V2TBAAInfo) {
-  // If this select has been visited before, we're on a use-def cycle.
-  // Such cycles are only valid when PHI nodes are involved or in unreachable
-  // code. The visitPHI function catches cycles containing PHIs, but there
-  // could still be a cycle without PHIs in unreachable code.
-  if (!Visited.insert(SI))
-    return MayAlias;
-
-  // If the values are Selects with the same condition, we can do a more precise
-  // check: just check for aliases between the values on corresponding arms.
-  if (const SelectInst *SI2 = dyn_cast<SelectInst>(V2))
-    if (SI->getCondition() == SI2->getCondition()) {
-      AliasResult Alias =
-        aliasCheck(SI->getTrueValue(), SISize, SITBAAInfo,
-                   SI2->getTrueValue(), V2Size, V2TBAAInfo);
-      if (Alias == MayAlias)
-        return MayAlias;
-      AliasResult ThisAlias =
-        aliasCheck(SI->getFalseValue(), SISize, SITBAAInfo,
-                   SI2->getFalseValue(), V2Size, V2TBAAInfo);
-      if (ThisAlias != Alias)
-        return MayAlias;
-      return Alias;
-    }
-
-  // If both arms of the Select node NoAlias or MustAlias V2, then returns
-  // NoAlias / MustAlias. Otherwise, returns MayAlias.
-  AliasResult Alias =
-    aliasCheck(V2, V2Size, V2TBAAInfo, SI->getTrueValue(), SISize, SITBAAInfo);
-  if (Alias == MayAlias)
-    return MayAlias;
-
-  // If V2 is visited, the recursive case will have been caught in the
-  // above aliasCheck call, so these subsequent calls to aliasCheck
-  // don't need to assume that V2 is being visited recursively.
-  Visited.erase(V2);
-
-  AliasResult ThisAlias =
-    aliasCheck(V2, V2Size, V2TBAAInfo, SI->getFalseValue(), SISize, SITBAAInfo);
-  if (ThisAlias != Alias)
-    return MayAlias;
-  return Alias;
-}
-
-// aliasPHI - Provide a bunch of ad-hoc rules to disambiguate a PHI instruction
-// against another.
-AliasAnalysis::AliasResult
-BasicAliasAnalysis::aliasPHI(const PHINode *PN, uint64_t PNSize,
-                             const MDNode *PNTBAAInfo,
-                             const Value *V2, uint64_t V2Size,
-                             const MDNode *V2TBAAInfo) {
-  // The PHI node has already been visited, avoid recursion any further.
-  if (!Visited.insert(PN))
-    return MayAlias;
-
-  // If the values are PHIs in the same block, we can do a more precise
-  // as well as efficient check: just check for aliases between the values
-  // on corresponding edges.
-  if (const PHINode *PN2 = dyn_cast<PHINode>(V2))
-    if (PN2->getParent() == PN->getParent()) {
-      AliasResult Alias =
-        aliasCheck(PN->getIncomingValue(0), PNSize, PNTBAAInfo,
-                   PN2->getIncomingValueForBlock(PN->getIncomingBlock(0)),
-                   V2Size, V2TBAAInfo);
-      if (Alias == MayAlias)
-        return MayAlias;
-      for (unsigned i = 1, e = PN->getNumIncomingValues(); i != e; ++i) {
-        AliasResult ThisAlias =
-          aliasCheck(PN->getIncomingValue(i), PNSize, PNTBAAInfo,
-                     PN2->getIncomingValueForBlock(PN->getIncomingBlock(i)),
-                     V2Size, V2TBAAInfo);
-        if (ThisAlias != Alias)
-          return MayAlias;
-      }
-      return Alias;
-    }
-
-  SmallPtrSet<Value*, 4> UniqueSrc;
-  SmallVector<Value*, 4> V1Srcs;
-  for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i) {
-    Value *PV1 = PN->getIncomingValue(i);
-    if (isa<PHINode>(PV1))
-      // If any of the source itself is a PHI, return MayAlias conservatively
-      // to avoid compile time explosion. The worst possible case is if both
-      // sides are PHI nodes. In which case, this is O(m x n) time where 'm'
-      // and 'n' are the number of PHI sources.
-      return MayAlias;
-    if (UniqueSrc.insert(PV1))
-      V1Srcs.push_back(PV1);
-  }
-
-  AliasResult Alias = aliasCheck(V2, V2Size, V2TBAAInfo,
-                                 V1Srcs[0], PNSize, PNTBAAInfo);
-  // Early exit if the check of the first PHI source against V2 is MayAlias.
-  // Other results are not possible.
-  if (Alias == MayAlias)
-    return MayAlias;
-
-  // If all sources of the PHI node NoAlias or MustAlias V2, then returns
-  // NoAlias / MustAlias. Otherwise, returns MayAlias.
-  for (unsigned i = 1, e = V1Srcs.size(); i != e; ++i) {
-    Value *V = V1Srcs[i];
-
-    // If V2 is visited, the recursive case will have been caught in the
-    // above aliasCheck call, so these subsequent calls to aliasCheck
-    // don't need to assume that V2 is being visited recursively.
-    Visited.erase(V2);
-
-    AliasResult ThisAlias = aliasCheck(V2, V2Size, V2TBAAInfo,
-                                       V, PNSize, PNTBAAInfo);
-    if (ThisAlias != Alias || ThisAlias == MayAlias)
-      return MayAlias;
-  }
-
-  return Alias;
-}
-
-// aliasCheck - Provide a bunch of ad-hoc rules to disambiguate in common cases,
-// such as array references.
-//
-AliasAnalysis::AliasResult
-BasicAliasAnalysis::aliasCheck(const Value *V1, uint64_t V1Size,
-                               const MDNode *V1TBAAInfo,
-                               const Value *V2, uint64_t V2Size,
-                               const MDNode *V2TBAAInfo) {
-  // If either of the memory references is empty, it doesn't matter what the
-  // pointer values are.
-  if (V1Size == 0 || V2Size == 0)
-    return NoAlias;
-
-  // Strip off any casts if they exist.
-  V1 = V1->stripPointerCasts();
-  V2 = V2->stripPointerCasts();
-
-  // Are we checking for alias of the same value?
-  if (V1 == V2) return MustAlias;
-
-  if (!V1->getType()->isPointerTy() || !V2->getType()->isPointerTy())
-    return NoAlias;  // Scalars cannot alias each other
-
-  // Figure out what objects these things are pointing to if we can.
-  const Value *O1 = V1->getUnderlyingObject();
-  const Value *O2 = V2->getUnderlyingObject();
-
-  // Null values in the default address space don't point to any object, so they
-  // don't alias any other pointer.
-  if (const ConstantPointerNull *CPN = dyn_cast<ConstantPointerNull>(O1))
-    if (CPN->getType()->getAddressSpace() == 0)
-      return NoAlias;
-  if (const ConstantPointerNull *CPN = dyn_cast<ConstantPointerNull>(O2))
-    if (CPN->getType()->getAddressSpace() == 0)
-      return NoAlias;
-
-  if (O1 != O2) {
-    // If V1/V2 point to two different objects we know that we have no alias.
-    if (isIdentifiedObject(O1) && isIdentifiedObject(O2))
-      return NoAlias;
-
-    // Constant pointers can't alias with non-const isIdentifiedObject objects.
-    if ((isa<Constant>(O1) && isIdentifiedObject(O2) && !isa<Constant>(O2)) ||
-        (isa<Constant>(O2) && isIdentifiedObject(O1) && !isa<Constant>(O1)))
-      return NoAlias;
-
-    // Arguments can't alias with local allocations or noalias calls
-    // in the same function.
-    if (((isa<Argument>(O1) && (isa<AllocaInst>(O2) || isNoAliasCall(O2))) ||
-         (isa<Argument>(O2) && (isa<AllocaInst>(O1) || isNoAliasCall(O1)))))
-      return NoAlias;
-
-    // Most objects can't alias null.
-    if ((isa<ConstantPointerNull>(O2) && isKnownNonNull(O1)) ||
-        (isa<ConstantPointerNull>(O1) && isKnownNonNull(O2)))
-      return NoAlias;
-  
-    // If one pointer is the result of a call/invoke or load and the other is a
-    // non-escaping local object within the same function, then we know the
-    // object couldn't escape to a point where the call could return it.
-    //
-    // Note that if the pointers are in different functions, there are a
-    // variety of complications. A call with a nocapture argument may still
-    // temporary store the nocapture argument's value in a temporary memory
-    // location if that memory location doesn't escape. Or it may pass a
-    // nocapture value to other functions as long as they don't capture it.
-    if (isEscapeSource(O1) && isNonEscapingLocalObject(O2))
-      return NoAlias;
-    if (isEscapeSource(O2) && isNonEscapingLocalObject(O1))
-      return NoAlias;
-  }
-
-  // If the size of one access is larger than the entire object on the other
-  // side, then we know such behavior is undefined and can assume no alias.
-  if (TD)
-    if ((V1Size != UnknownSize && isObjectSmallerThan(O2, V1Size, *TD)) ||
-        (V2Size != UnknownSize && isObjectSmallerThan(O1, V2Size, *TD)))
-      return NoAlias;
-  
-  // FIXME: This isn't aggressively handling alias(GEP, PHI) for example: if the
-  // GEP can't simplify, we don't even look at the PHI cases.
-  if (!isa<GEPOperator>(V1) && isa<GEPOperator>(V2)) {
-    std::swap(V1, V2);
-    std::swap(V1Size, V2Size);
-    std::swap(O1, O2);
-  }
-  if (const GEPOperator *GV1 = dyn_cast<GEPOperator>(V1)) {
-    AliasResult Result = aliasGEP(GV1, V1Size, V2, V2Size, V2TBAAInfo, O1, O2);
-    if (Result != MayAlias) return Result;
-  }
-
-  if (isa<PHINode>(V2) && !isa<PHINode>(V1)) {
-    std::swap(V1, V2);
-    std::swap(V1Size, V2Size);
-  }
-  if (const PHINode *PN = dyn_cast<PHINode>(V1)) {
-    AliasResult Result = aliasPHI(PN, V1Size, V1TBAAInfo,
-                                  V2, V2Size, V2TBAAInfo);
-    if (Result != MayAlias) return Result;
-  }
-
-  if (isa<SelectInst>(V2) && !isa<SelectInst>(V1)) {
-    std::swap(V1, V2);
-    std::swap(V1Size, V2Size);
-  }
-  if (const SelectInst *S1 = dyn_cast<SelectInst>(V1)) {
-    AliasResult Result = aliasSelect(S1, V1Size, V1TBAAInfo,
-                                     V2, V2Size, V2TBAAInfo);
-    if (Result != MayAlias) return Result;
-  }
-
-  return AliasAnalysis::alias(Location(V1, V1Size, V1TBAAInfo),
-                              Location(V2, V2Size, V2TBAAInfo));
-}
-
-// Make sure that anything that uses AliasAnalysis pulls in this file.
-DEFINING_FILE_FOR(BasicAliasAnalysis)



From bigcheesegs at gmail.com  Tue Oct 19 18:20:51 2010
From: bigcheesegs at gmail.com (Michael Spencer)
Date: Tue, 19 Oct 2010 19:20:51 -0400
Subject: [llvm-commits] [rfc][patch] How should we handle
	_GLOBAL_OFFSET_TABLE_?
In-Reply-To: <AANLkTi=sTA0ri5+r=-gSoi9MAJQkohwsh0o6MkqdT3TQ@mail.gmail.com>
References: <AANLkTi=sTA0ri5+r=-gSoi9MAJQkohwsh0o6MkqdT3TQ@mail.gmail.com>
Message-ID: <AANLkTinD5uU-ANCPECjQ7y87yL-gw66jRXO5=AjweFua@mail.gmail.com>

2010/10/19 Rafael Esp?ndola <rafael.espindola at gmail.com>:
> Consider the instruction
>
> addl ? ?$_GLOBAL_OFFSET_TABLE_, %ebx
>
> It should assemble to something like
>
> 81 c3 02 00 00 00 ? ? ? add ? ?$0x2,%ebx
>
> The "2" in the add comes from the first two bytes. This is a special
> treatment for _GLOBAL_OFFSET_TABLE_. It also produces a special kind
> of relocation (R_386_GOTPC).

Is it too late to do it when the special relocation is generated? Or
does that happen inside the ELF streamer/writer?

> The relocation kind can be handled in the writer (and is). The problem
> is that it is then too late to find the offset of the relocation
> inside the instruction. This patch does it by modifying
> X86MCCodeEmitter.cpp. This might be undesirable as this code is also
> used for non-ELF targets.

I tend to dislike relying on string literals, but this patch seems to
be fine for now. The relocation is x86 specific, so I would think that
it is OK for this to occur in the x86 back-end.

> I tried to do this on the ELF streamer, but failed because
> EncodeInstruction is also called directly from the assembler when
> handling relaxations and the streamer cannot patch it up.
>
> Another way I can see this being done is having a object specific
> wrapper for CodeEmitter::EncodeInstruction. This would be a nop for
> MachO and COFF, but ELF 32 bits could then patch it up to account for
> _GLOBAL_OFFSET_TABLE_.
>
> Any better ideas on how to implement this?

I would prefer this happen whenever the relocation is generated in the
x86 backend. Object file formats really shouldn't care about
instructions. I don't object to adding an object specific hook, but it
does seem to be of limited use.

> P.S.: Ugly as the attached patch is, it gets clang to build itself on
> 32 bits with the integrated assembler :-)
>
> Cheers,
> Rafael

This patch (with some comments) looks fine to me for now, but I would
prefer a solution that doesn't depend on the symbol name.

- Michael Spencer


From grosbach at apple.com  Tue Oct 19 18:27:08 2010
From: grosbach at apple.com (Jim Grosbach)
Date: Tue, 19 Oct 2010 23:27:08 -0000
Subject: [llvm-commits] [llvm] r116879 - in /llvm/trunk:
 docs/ExceptionHandling.html include/llvm/CodeGen/ISDOpcodes.h
 include/llvm/Intrinsics.td lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
 lib/CodeGen/SelectionDAG/SelectionDAG.cpp
 lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
 lib/CodeGen/SjLjEHPrepare.cpp lib/Target/ARM/ARMBaseInstrInfo.h
 lib/Target/ARM/ARMExpandPseudoInsts.cpp lib/Target/ARM/ARMISelLowering.cpp
 lib/Target/ARM/ARMISelLowering.h lib/Target/ARM/ARMInstrInfo.td
 lib/Target/ARM/Thumb1RegisterInfo.cpp
Message-ID: <20101019232708.93CF62A6C12C@llvm.org>

Author: grosbach
Date: Tue Oct 19 18:27:08 2010
New Revision: 116879

URL: http://llvm.org/viewvc/llvm-project?rev=116879&view=rev
Log:
Add a pre-dispatch SjLj EH hook on the unwind edge for targets to do any
setup they require. Use this for ARM/Darwin to rematerialize the base
pointer from the frame pointer when required. rdar://8564268

Modified:
    llvm/trunk/docs/ExceptionHandling.html
    llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h
    llvm/trunk/include/llvm/Intrinsics.td
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    llvm/trunk/lib/CodeGen/SjLjEHPrepare.cpp
    llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h
    llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
    llvm/trunk/lib/Target/ARM/ARMISelLowering.h
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
    llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.cpp

Modified: llvm/trunk/docs/ExceptionHandling.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ExceptionHandling.html?rev=116879&r1=116878&r2=116879&view=diff
==============================================================================
--- llvm/trunk/docs/ExceptionHandling.html (original)
+++ llvm/trunk/docs/ExceptionHandling.html Tue Oct 19 18:27:08 2010
@@ -40,6 +40,7 @@
   	<li><a href="#llvm_eh_sjlj_longjmp"><tt>llvm.eh.sjlj.longjmp</tt></a></li>
   	<li><a href="#llvm_eh_sjlj_lsda"><tt>llvm.eh.sjlj.lsda</tt></a></li>
   	<li><a href="#llvm_eh_sjlj_callsite"><tt>llvm.eh.sjlj.callsite</tt></a></li>
+  	<li><a href="#llvm_eh_sjlj_dispatchsetup"><tt>llvm.eh.sjlj.dispatchsetup</tt></a></li>
   </ol></li>
   <li><a href="#asm">Asm Table Formats</a>
   <ol>
@@ -548,6 +549,23 @@
 </div>
 
 <!-- ======================================================================= -->
+<div class="doc_subsubsection">
+  <a name="llvm_eh_sjlj_dispatchsetup">llvm.eh.sjlj.dispatchsetup</a>
+</div>
+
+<div class="doc_text">
+
+<pre>
+  void %<a href="#llvm_eh_sjlj_dispatchsetup">llvm.eh.sjlj.dispatchsetup</a>(i32)
+</pre>
+
+<p>For SJLJ based exception handling, the <a href="#llvm_eh_sjlj_dispatchsetup">
+  <tt>llvm.eh.sjlj.dispatchsetup</tt></a> intrinsic is used by targets to do
+  any unwind-edge setup they need. By default, no action is taken.  </p>
+
+</div>
+
+<!-- ======================================================================= -->
 <div class="doc_section">
   <a name="asm">Asm Table Formats</a>
 </div>

Modified: llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h?rev=116879&r1=116878&r2=116879&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h Tue Oct 19 18:27:08 2010
@@ -107,6 +107,13 @@
     // and returns an outchain.
     EH_SJLJ_LONGJMP,
 
+    // OUTCHAIN = EH_SJLJ_DISPATCHSETUP(INCHAIN, context)
+    // This corresponds to the eh.sjlj.dispatchsetup intrinsic. It takes an
+    // incput chain and a pointer to the sjlj function context as inputs and
+    // returns an outchain. By default, this does nothing. Targets can lower
+    // this to unwind setup code if needed.
+    EH_SJLJ_DISPATCHSETUP,
+
     // TargetConstant* - Like Constant*, but the DAG does not do any folding,
     // simplification, or lowering of the constant. They are used for constants
     // which are known to fit in the immediate fields of their users, or for

Modified: llvm/trunk/include/llvm/Intrinsics.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Intrinsics.td?rev=116879&r1=116878&r2=116879&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Intrinsics.td (original)
+++ llvm/trunk/include/llvm/Intrinsics.td Tue Oct 19 18:27:08 2010
@@ -307,6 +307,7 @@
   def int_eh_sjlj_lsda    : Intrinsic<[llvm_ptr_ty]>;
   def int_eh_sjlj_callsite: Intrinsic<[], [llvm_i32_ty]>;
 }
+def int_eh_sjlj_dispatch_setup : Intrinsic<[], [llvm_ptr_ty]>;
 def int_eh_sjlj_setjmp  : Intrinsic<[llvm_i32_ty], [llvm_ptr_ty]>;
 def int_eh_sjlj_longjmp : Intrinsic<[], [llvm_ptr_ty]>;
 

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=116879&r1=116878&r2=116879&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Tue Oct 19 18:27:08 2010
@@ -865,6 +865,7 @@
   case ISD::FRAME_TO_ARGS_OFFSET:
   case ISD::EH_SJLJ_SETJMP:
   case ISD::EH_SJLJ_LONGJMP:
+  case ISD::EH_SJLJ_DISPATCHSETUP:
     // These operations lie about being legal: when they claim to be legal,
     // they should actually be expanded.
     Action = TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0));
@@ -2541,9 +2542,14 @@
   case ISD::PREFETCH:
   case ISD::VAEND:
   case ISD::EH_SJLJ_LONGJMP:
+  case ISD::EH_SJLJ_DISPATCHSETUP:
+    // If the target didn't expand these, there's nothing to do, so just
+    // preserve the chain and be done.
     Results.push_back(Node->getOperand(0));
     break;
   case ISD::EH_SJLJ_SETJMP:
+    // If the target didn't expand this, just return 'zero' and preserve the
+    // chain.
     Results.push_back(DAG.getConstant(0, MVT::i32));
     Results.push_back(Node->getOperand(0));
     break;

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=116879&r1=116878&r2=116879&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Tue Oct 19 18:27:08 2010
@@ -5616,6 +5616,7 @@
   case ISD::EH_RETURN: return "EH_RETURN";
   case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
   case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
+  case ISD::EH_SJLJ_DISPATCHSETUP: return "EH_SJLJ_DISPATCHSETUP";
   case ISD::ConstantPool:  return "ConstantPool";
   case ISD::ExternalSymbol: return "ExternalSymbol";
   case ISD::BlockAddress:  return "BlockAddress";

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=116879&r1=116878&r2=116879&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Tue Oct 19 18:27:08 2010
@@ -4319,8 +4319,12 @@
   }
   case Intrinsic::eh_sjlj_longjmp: {
     DAG.setRoot(DAG.getNode(ISD::EH_SJLJ_LONGJMP, dl, MVT::Other,
-                            getRoot(),
-                            getValue(I.getArgOperand(0))));
+                            getRoot(), getValue(I.getArgOperand(0))));
+    return 0;
+  }
+  case Intrinsic::eh_sjlj_dispatch_setup: {
+    DAG.setRoot(DAG.getNode(ISD::EH_SJLJ_DISPATCHSETUP, dl, MVT::Other,
+                            getRoot(), getValue(I.getArgOperand(0))));
     return 0;
   }
 

Modified: llvm/trunk/lib/CodeGen/SjLjEHPrepare.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SjLjEHPrepare.cpp?rev=116879&r1=116878&r2=116879&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SjLjEHPrepare.cpp (original)
+++ llvm/trunk/lib/CodeGen/SjLjEHPrepare.cpp Tue Oct 19 18:27:08 2010
@@ -53,6 +53,7 @@
     Constant *SelectorFn;
     Constant *ExceptionFn;
     Constant *CallSiteFn;
+    Constant *DispatchSetupFn;
 
     Value *CallSite;
   public:
@@ -116,6 +117,8 @@
   SelectorFn = Intrinsic::getDeclaration(&M, Intrinsic::eh_selector);
   ExceptionFn = Intrinsic::getDeclaration(&M, Intrinsic::eh_exception);
   CallSiteFn = Intrinsic::getDeclaration(&M, Intrinsic::eh_sjlj_callsite);
+  DispatchSetupFn
+    = Intrinsic::getDeclaration(&M, Intrinsic::eh_sjlj_dispatch_setup);
   PersonalityFn = 0;
 
   return true;
@@ -438,9 +441,17 @@
     BasicBlock *DispatchBlock =
             BasicBlock::Create(F.getContext(), "eh.sjlj.setjmp.catch", &F);
 
-    // Insert a load in the Catch block, and a switch on its value.  By default,
-    // we go to a block that just does an unwind (which is the correct action
-    // for a standard call).
+    // Add a call to dispatch_setup at the start of the dispatch block. This
+    // is expanded to any target-specific setup that needs to be done.
+    Value *SetupArg =
+      CastInst::Create(Instruction::BitCast, FunctionContext,
+                       Type::getInt8PtrTy(F.getContext()), "",
+                       DispatchBlock);
+    CallInst::Create(DispatchSetupFn, SetupArg, "", DispatchBlock);
+
+    // Insert a load of the callsite in the dispatch block, and a switch on
+    // its value.  By default, we go to a block that just does an unwind
+    // (which is the correct action for a standard call).
     BasicBlock *UnwindBlock =
       BasicBlock::Create(F.getContext(), "unwindbb", &F);
     Unwinds.push_back(new UnwindInst(F.getContext(), UnwindBlock));

Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h?rev=116879&r1=116878&r2=116879&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h Tue Oct 19 18:27:08 2010
@@ -447,6 +447,12 @@
                             unsigned DestReg, unsigned BaseReg, int NumBytes,
                             ARMCC::CondCodes Pred, unsigned PredReg,
                             const ARMBaseInstrInfo &TII);
+void emitThumbRegPlusImmediate(MachineBasicBlock &MBB,
+                               MachineBasicBlock::iterator &MBBI,
+                               unsigned DestReg, unsigned BaseReg,
+                               int NumBytes, const TargetInstrInfo &TII,
+                               const ARMBaseRegisterInfo& MRI,
+                               DebugLoc dl);
 
 
 /// rewriteARMFrameIndex / rewriteT2FrameIndex -

Modified: llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp?rev=116879&r1=116878&r2=116879&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp Tue Oct 19 18:27:08 2010
@@ -18,10 +18,14 @@
 #include "ARM.h"
 #include "ARMAddressingModes.h"
 #include "ARMBaseInstrInfo.h"
+#include "ARMBaseRegisterInfo.h"
+#include "ARMMachineFunctionInfo.h"
 #include "ARMRegisterInfo.h"
+#include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/Target/TargetRegisterInfo.h"
+#include "llvm/Support/raw_ostream.h" // FIXME: for debug only. remove!
 using namespace llvm;
 
 namespace {
@@ -30,7 +34,7 @@
     static char ID;
     ARMExpandPseudo() : MachineFunctionPass(ID) {}
 
-    const TargetInstrInfo *TII;
+    const ARMBaseInstrInfo *TII;
     const TargetRegisterInfo *TRI;
 
     virtual bool runOnMachineFunction(MachineFunction &Fn);
@@ -576,6 +580,38 @@
       ModifiedOp = false;
       break;
 
+    case ARM::Int_eh_sjlj_dispatchsetup: {
+      MachineFunction &MF = *MI.getParent()->getParent();
+      const ARMBaseInstrInfo *AII =
+        static_cast<const ARMBaseInstrInfo*>(TII);
+      const ARMBaseRegisterInfo &RI = AII->getRegisterInfo();
+      // For functions using a base pointer, we rematerialize it (via the frame
+      // pointer) here since eh.sjlj.setjmp and eh.sjlj.longjmp don't do it
+      // for us. Otherwise, expand to nothing.
+      if (RI.hasBasePointer(MF)) {
+        ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
+        int32_t NumBytes = AFI->getFramePtrSpillOffset();
+        unsigned FramePtr = RI.getFrameRegister(MF);
+        assert (RI.hasFP(MF) && "base pointer without frame pointer?");
+
+        if (AFI->isThumb2Function()) {
+          llvm::emitT2RegPlusImmediate(MBB, MBBI, MI.getDebugLoc(), ARM::R6,
+                                       FramePtr, -NumBytes, ARMCC::AL, 0, *TII);
+        } else if (AFI->isThumbFunction()) {
+          llvm::emitThumbRegPlusImmediate(MBB, MBBI, ARM::R6,
+                                          FramePtr, -NumBytes,
+                                          *TII, RI, MI.getDebugLoc());
+        } else {
+          llvm::emitARMRegPlusImmediate(MBB, MBBI, MI.getDebugLoc(), ARM::R6,
+                                        FramePtr, -NumBytes, ARMCC::AL, 0,
+                                        *TII);
+        }
+
+      }
+      MI.eraseFromParent();
+      break;
+    }
+
     case ARM::MOVsrl_flag:
     case ARM::MOVsra_flag: {
       // These are just fancy MOVs insructions.
@@ -953,7 +989,7 @@
 }
 
 bool ARMExpandPseudo::runOnMachineFunction(MachineFunction &MF) {
-  TII = MF.getTarget().getInstrInfo();
+  TII = static_cast<const ARMBaseInstrInfo*>(MF.getTarget().getInstrInfo());
   TRI = MF.getTarget().getRegisterInfo();
 
   bool Modified = false;

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=116879&r1=116878&r2=116879&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Tue Oct 19 18:27:08 2010
@@ -612,6 +612,7 @@
   if (Subtarget->isTargetDarwin()) {
     setOperationAction(ISD::EH_SJLJ_SETJMP, MVT::i32, Custom);
     setOperationAction(ISD::EH_SJLJ_LONGJMP, MVT::Other, Custom);
+    setOperationAction(ISD::EH_SJLJ_DISPATCHSETUP, MVT::Other, Custom);
   }
 
   setOperationAction(ISD::SETCC,     MVT::i32, Expand);
@@ -755,6 +756,7 @@
 
   case ARMISD::EH_SJLJ_SETJMP: return "ARMISD::EH_SJLJ_SETJMP";
   case ARMISD::EH_SJLJ_LONGJMP:return "ARMISD::EH_SJLJ_LONGJMP";
+  case ARMISD::EH_SJLJ_DISPATCHSETUP:return "ARMISD::EH_SJLJ_DISPATCHSETUP";
 
   case ARMISD::TC_RETURN:     return "ARMISD::TC_RETURN";
 
@@ -1948,6 +1950,14 @@
 }
 
 SDValue
+ARMTargetLowering::LowerEH_SJLJ_DISPATCHSETUP(SDValue Op, SelectionDAG &DAG)
+  const {
+  DebugLoc dl = Op.getDebugLoc();
+  return DAG.getNode(ARMISD::EH_SJLJ_DISPATCHSETUP, dl, MVT::Other,
+                     Op.getOperand(0), Op.getOperand(1));
+}
+
+SDValue
 ARMTargetLowering::LowerEH_SJLJ_SETJMP(SDValue Op, SelectionDAG &DAG) const {
   DebugLoc dl = Op.getDebugLoc();
   SDValue Val = DAG.getConstant(0, MVT::i32);
@@ -3813,6 +3823,7 @@
   case ISD::GLOBAL_OFFSET_TABLE: return LowerGLOBAL_OFFSET_TABLE(Op, DAG);
   case ISD::EH_SJLJ_SETJMP: return LowerEH_SJLJ_SETJMP(Op, DAG);
   case ISD::EH_SJLJ_LONGJMP: return LowerEH_SJLJ_LONGJMP(Op, DAG);
+  case ISD::EH_SJLJ_DISPATCHSETUP: return LowerEH_SJLJ_DISPATCHSETUP(Op, DAG);
   case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG,
                                                                Subtarget);
   case ISD::BIT_CONVERT:   return ExpandBIT_CONVERT(Op.getNode(), DAG);

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.h?rev=116879&r1=116878&r2=116879&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.h Tue Oct 19 18:27:08 2010
@@ -71,8 +71,9 @@
       VMOVRRD,      // double to two gprs.
       VMOVDRR,      // Two gprs to double.
 
-      EH_SJLJ_SETJMP,    // SjLj exception handling setjmp.
-      EH_SJLJ_LONGJMP,   // SjLj exception handling longjmp.
+      EH_SJLJ_SETJMP,         // SjLj exception handling setjmp.
+      EH_SJLJ_LONGJMP,        // SjLj exception handling longjmp.
+      EH_SJLJ_DISPATCHSETUP,  // SjLj exception handling dispatch setup.
 
       TC_RETURN,    // Tail call return pseudo.
 
@@ -332,6 +333,7 @@
                              ISD::ArgFlagsTy Flags) const;
     SDValue LowerEH_SJLJ_SETJMP(SDValue Op, SelectionDAG &DAG) const;
     SDValue LowerEH_SJLJ_LONGJMP(SDValue Op, SelectionDAG &DAG) const;
+    SDValue LowerEH_SJLJ_DISPATCHSETUP(SDValue Op, SelectionDAG &DAG) const;
     SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG,
                                     const ARMSubtarget *Subtarget) const;
     SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=116879&r1=116878&r2=116879&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Tue Oct 19 18:27:08 2010
@@ -58,6 +58,8 @@
                                                  SDTCisInt<2>]>;
 def SDT_ARMEH_SJLJ_Longjmp: SDTypeProfile<0, 2, [SDTCisPtrTy<0>, SDTCisInt<1>]>;
 
+def SDT_ARMEH_SJLJ_DispatchSetup: SDTypeProfile<0, 1, [SDTCisPtrTy<0>]>;
+
 def SDT_ARMMEMBARRIER     : SDTypeProfile<0, 0, []>;
 def SDT_ARMSYNCBARRIER    : SDTypeProfile<0, 0, []>;
 def SDT_ARMMEMBARRIERMCR  : SDTypeProfile<0, 1, [SDTCisInt<0>]>;
@@ -122,7 +124,10 @@
 def ARMeh_sjlj_setjmp: SDNode<"ARMISD::EH_SJLJ_SETJMP",
                                SDT_ARMEH_SJLJ_Setjmp, [SDNPHasChain]>;
 def ARMeh_sjlj_longjmp: SDNode<"ARMISD::EH_SJLJ_LONGJMP",
-                                SDT_ARMEH_SJLJ_Longjmp, [SDNPHasChain]>;
+                               SDT_ARMEH_SJLJ_Longjmp, [SDNPHasChain]>;
+def ARMeh_sjlj_dispatchsetup: SDNode<"ARMISD::EH_SJLJ_DISPATCHSETUP",
+                               SDT_ARMEH_SJLJ_DispatchSetup, [SDNPHasChain]>;
+
 
 def ARMMemBarrier     : SDNode<"ARMISD::MEMBARRIER", SDT_ARMMEMBARRIER,
                                [SDNPHasChain]>;
@@ -3010,6 +3015,16 @@
                                 Requires<[IsARM, IsDarwin]>;
 }
 
+// eh.sjlj.dispatchsetup pseudo-instruction.
+// This pseudo is usef for ARM, Thumb1 and Thumb2. Any differences are
+// handled when the pseudo is expanded (which happens before any passes
+// that need the instruction size).
+let isBarrier = 1, hasSideEffects = 1 in
+def Int_eh_sjlj_dispatchsetup :
+ PseudoInst<(outs), (ins GPR:$src), NoItinerary, "",
+            [(ARMeh_sjlj_dispatchsetup GPR:$src)]>,
+              Requires<[IsDarwin]>;
+
 //===----------------------------------------------------------------------===//
 // Non-Instruction Patterns
 //

Modified: llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.cpp?rev=116879&r1=116878&r2=116879&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Thumb1RegisterInfo.cpp Tue Oct 19 18:27:08 2010
@@ -92,7 +92,7 @@
                               unsigned DestReg, unsigned BaseReg,
                               int NumBytes, bool CanChangeCC,
                               const TargetInstrInfo &TII,
-                              const Thumb1RegisterInfo& MRI,
+                              const ARMBaseRegisterInfo& MRI,
                               DebugLoc dl) {
     MachineFunction &MF = *MBB.getParent();
     bool isHigh = !isARMLowRegister(DestReg) ||
@@ -162,13 +162,12 @@
 
 /// emitThumbRegPlusImmediate - Emits a series of instructions to materialize
 /// a destreg = basereg + immediate in Thumb code.
-static
-void emitThumbRegPlusImmediate(MachineBasicBlock &MBB,
-                               MachineBasicBlock::iterator &MBBI,
-                               unsigned DestReg, unsigned BaseReg,
-                               int NumBytes, const TargetInstrInfo &TII,
-                               const Thumb1RegisterInfo& MRI,
-                               DebugLoc dl) {
+void llvm::emitThumbRegPlusImmediate(MachineBasicBlock &MBB,
+                                     MachineBasicBlock::iterator &MBBI,
+                                     unsigned DestReg, unsigned BaseReg,
+                                     int NumBytes, const TargetInstrInfo &TII,
+                                     const ARMBaseRegisterInfo& MRI,
+                                     DebugLoc dl) {
   bool isSub = NumBytes < 0;
   unsigned Bytes = (unsigned)NumBytes;
   if (isSub) Bytes = -NumBytes;



From bob.wilson at apple.com  Tue Oct 19 18:38:29 2010
From: bob.wilson at apple.com (Bob Wilson)
Date: Tue, 19 Oct 2010 16:38:29 -0700
Subject: [llvm-commits] [llvm] r116879 - in /llvm/trunk:
	docs/ExceptionHandling.html include/llvm/CodeGen/ISDOpcodes.h
	include/llvm/Intrinsics.td lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
	lib/CodeGen/SelectionDAG/SelectionDAG.cpp
	lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
	lib/CodeGen/SjLjEHPrepare.cpp lib/Target/ARM/ARMBaseInstrInfo.h
	lib/Target/ARM/ARMExpandPseudoInsts.cpp
	lib/Target/ARM/ARMISelLowering.cpp lib/Target/ARM/ARMISelLowering.h
	lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/Thumb1RegisterInfo.cpp
In-Reply-To: <20101019232708.93CF62A6C12C@llvm.org>
References: <20101019232708.93CF62A6C12C@llvm.org>
Message-ID: <A03E5334-8013-4959-959E-DE323E499868@apple.com>


On Oct 19, 2010, at 4:27 PM, Jim Grosbach wrote:
> 
> Modified: llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h?rev=116879&r1=116878&r2=116879&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h (original)
> +++ llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h Tue Oct 19 18:27:08 2010
> @@ -107,6 +107,13 @@
>     // and returns an outchain.
>     EH_SJLJ_LONGJMP,
> 
> +    // OUTCHAIN = EH_SJLJ_DISPATCHSETUP(INCHAIN, context)
> +    // This corresponds to the eh.sjlj.dispatchsetup intrinsic. It takes an
> +    // incput chain and a pointer to the sjlj function context as inputs and

typo: incput -> input

> +    // returns an outchain. By default, this does nothing. Targets can lower
> +    // this to unwind setup code if needed.
> +    EH_SJLJ_DISPATCHSETUP,
> +
>     // TargetConstant* - Like Constant*, but the DAG does not do any folding,
>     // simplification, or lowering of the constant. They are used for constants
>     // which are known to fit in the immediate fields of their users, or for
> 



From grosbach at apple.com  Tue Oct 19 18:39:23 2010
From: grosbach at apple.com (Jim Grosbach)
Date: Tue, 19 Oct 2010 23:39:23 -0000
Subject: [llvm-commits] [llvm] r116880 -
	/llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h
Message-ID: <20101019233923.B620B2A6C12C@llvm.org>

Author: grosbach
Date: Tue Oct 19 18:39:23 2010
New Revision: 116880

URL: http://llvm.org/viewvc/llvm-project?rev=116880&view=rev
Log:
Spelling typo fix. s/incput/input/. Thanks, Bob!

Modified:
    llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h

Modified: llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h?rev=116880&r1=116879&r2=116880&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h Tue Oct 19 18:39:23 2010
@@ -109,7 +109,7 @@
 
     // OUTCHAIN = EH_SJLJ_DISPATCHSETUP(INCHAIN, context)
     // This corresponds to the eh.sjlj.dispatchsetup intrinsic. It takes an
-    // incput chain and a pointer to the sjlj function context as inputs and
+    // input chain and a pointer to the sjlj function context as inputs and
     // returns an outchain. By default, this does nothing. Targets can lower
     // this to unwind setup code if needed.
     EH_SJLJ_DISPATCHSETUP,



From grosbach at apple.com  Tue Oct 19 18:41:11 2010
From: grosbach at apple.com (Jim Grosbach)
Date: Tue, 19 Oct 2010 16:41:11 -0700
Subject: [llvm-commits] [llvm] r116879 - in /llvm/trunk:
	docs/ExceptionHandling.html include/llvm/CodeGen/ISDOpcodes.h
	include/llvm/Intrinsics.td lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
	lib/CodeGen/SelectionDAG/SelectionDAG.cpp
	lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
	lib/CodeGen/SjLjEHPrepare.cpp lib/Target/ARM/ARMBaseInstrInfo.h
	lib/Target/ARM/ARMExpandPseudoInsts.cpp
	lib/Target/ARM/ARMISelLowering.cpp lib/Target/ARM/ARMISelLowering.h
	lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/Thumb1RegisterInfo.cpp
In-Reply-To: <A03E5334-8013-4959-959E-DE323E499868@apple.com>
References: <20101019232708.93CF62A6C12C@llvm.org>
	<A03E5334-8013-4959-959E-DE323E499868@apple.com>
Message-ID: <1B50BC4B-CBF7-48F3-A4DD-93564A572C4E@apple.com>

Doh! Thank you! Fixed in r116880.

On Oct 19, 2010, at 4:38 PM, Bob Wilson wrote:

> 
> On Oct 19, 2010, at 4:27 PM, Jim Grosbach wrote:
>> 
>> Modified: llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h?rev=116879&r1=116878&r2=116879&view=diff
>> ==============================================================================
>> --- llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h (original)
>> +++ llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h Tue Oct 19 18:27:08 2010
>> @@ -107,6 +107,13 @@
>>    // and returns an outchain.
>>    EH_SJLJ_LONGJMP,
>> 
>> +    // OUTCHAIN = EH_SJLJ_DISPATCHSETUP(INCHAIN, context)
>> +    // This corresponds to the eh.sjlj.dispatchsetup intrinsic. It takes an
>> +    // incput chain and a pointer to the sjlj function context as inputs and
> 
> typo: incput -> input
> 
>> +    // returns an outchain. By default, this does nothing. Targets can lower
>> +    // this to unwind setup code if needed.
>> +    EH_SJLJ_DISPATCHSETUP,
>> +
>>    // TargetConstant* - Like Constant*, but the DAG does not do any folding,
>>    // simplification, or lowering of the constant. They are used for constants
>>    // which are known to fit in the immediate fields of their users, or for
>> 
> 



From pichet2000 at gmail.com  Tue Oct 19 18:48:34 2010
From: pichet2000 at gmail.com (Francois Pichet)
Date: Tue, 19 Oct 2010 19:48:34 -0400
Subject: [llvm-commits] [llvm] r116876 - in /llvm/trunk:
 include/llvm/Analysis/AliasAnalysis.h include/llvm/Analysis/Passes.h
 lib/Analysis/AliasAnalysis.cpp lib/Analysis/BasicAliasAnalysis.cpp
 lib/Analysis/NoAliasAnalysis.cpp
In-Reply-To: <20101019230908.914A82A6C12C@llvm.org>
References: <20101019230908.914A82A6C12C@llvm.org>
Message-ID: <AANLkTimPmhLpOV31cC35X6Syk6MuOZco2urXKjubhFvu@mail.gmail.com>

On Tue, Oct 19, 2010 at 7:09 PM, Dan Gohman <gohman at apple.com> wrote:
> Author: djg
> Date: Tue Oct 19 18:09:08 2010
> New Revision: 116876
>
> URL: http://llvm.org/viewvc/llvm-project?rev=116876&view=rev
> Log:
> Move NoAA out of BasicAliasAnalysis.cpp into its own file, now that
> it doesn't have a special relationship with BasicAliasAnalysis
> anymore.
>
> Added:
> ? ?llvm/trunk/lib/Analysis/NoAliasAnalysis.cpp
> ? ? ?- copied, changed from r116875, llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp

Please update CMakeLists.txt


From grosbach at apple.com  Tue Oct 19 18:48:47 2010
From: grosbach at apple.com (Jim Grosbach)
Date: Tue, 19 Oct 2010 23:48:47 -0000
Subject: [llvm-commits] [llvm] r116883 -
	/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp
Message-ID: <20101019234847.B014C2A6C12C@llvm.org>

Author: grosbach
Date: Tue Oct 19 18:48:47 2010
New Revision: 116883

URL: http://llvm.org/viewvc/llvm-project?rev=116883&view=rev
Log:
Nuke a commented out bit that got missed a while back.

Modified:
    llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp?rev=116883&r1=116882&r2=116883&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Tue Oct 19 18:48:47 2010
@@ -1672,7 +1672,7 @@
 
   // Determine the sizes of each callee-save spill areas and record which frame
   // belongs to which callee-save spill areas.
-  unsigned GPRCSSize = 0/*, GPRCS2Size = 0*/, DPRCSSize = 0;
+  unsigned GPRCSSize = 0, DPRCSSize = 0;
   int FramePtrSpillFI = 0;
 
   // Allocate the vararg register save area. This is not counted in NumBytes.



From grosbach at apple.com  Tue Oct 19 19:02:50 2010
From: grosbach at apple.com (Jim Grosbach)
Date: Wed, 20 Oct 2010 00:02:50 -0000
Subject: [llvm-commits] [llvm] r116886 -
	/llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp
Message-ID: <20101020000250.EBE722A6C12C@llvm.org>

Author: grosbach
Date: Tue Oct 19 19:02:50 2010
New Revision: 116886

URL: http://llvm.org/viewvc/llvm-project?rev=116886&view=rev
Log:
Add dynamic realignment when rematerializing the base register.

Modified:
    llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp?rev=116886&r1=116885&r2=116886&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp Tue Oct 19 19:02:50 2010
@@ -606,6 +606,19 @@
                                         FramePtr, -NumBytes, ARMCC::AL, 0,
                                         *TII);
         }
+        // If there's dynamic realignment, adjust for it.
+        if (!RI.needsStackRealignment(MF)) {
+          MachineFrameInfo  *MFI = MF.getFrameInfo();
+          unsigned MaxAlign = MFI->getMaxAlignment();
+          assert (!AFI->isThumb1OnlyFunction());
+          // Emit bic r6, r6, MaxAlign
+          unsigned bicOpc = AFI->isThumbFunction() ?
+            ARM::t2BICri : ARM::BICri;
+          AddDefaultCC(AddDefaultPred(BuildMI(MBB, MBBI, MI.getDebugLoc(),
+                                              TII->get(bicOpc), ARM::R6)
+                                      .addReg(ARM::R6, RegState::Kill)
+                                      .addImm(MaxAlign-1)));
+        }
 
       }
       MI.eraseFromParent();



From gohman at apple.com  Tue Oct 19 19:31:05 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 20 Oct 2010 00:31:05 -0000
Subject: [llvm-commits] [llvm] r116890 - in /llvm/trunk:
 include/llvm/CodeGen/MachineFunction.h
 include/llvm/CodeGen/MachineMemOperand.h
 include/llvm/CodeGen/SelectionDAG.h
 include/llvm/CodeGen/SelectionDAGNodes.h lib/CodeGen/MachineFunction.cpp
 lib/CodeGen/MachineInstr.cpp lib/CodeGen/MachineLICM.cpp
 lib/CodeGen/SelectionDAG/DAGCombiner.cpp
 lib/CodeGen/SelectionDAG/SelectionDAG.cpp
 lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Message-ID: <20101020003105.98DF12A6C12C@llvm.org>

Author: djg
Date: Tue Oct 19 19:31:05 2010
New Revision: 116890

URL: http://llvm.org/viewvc/llvm-project?rev=116890&view=rev
Log:
Make CodeGen TBAA-aware.

Modified:
    llvm/trunk/include/llvm/CodeGen/MachineFunction.h
    llvm/trunk/include/llvm/CodeGen/MachineMemOperand.h
    llvm/trunk/include/llvm/CodeGen/SelectionDAG.h
    llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
    llvm/trunk/lib/CodeGen/MachineFunction.cpp
    llvm/trunk/lib/CodeGen/MachineInstr.cpp
    llvm/trunk/lib/CodeGen/MachineLICM.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

Modified: llvm/trunk/include/llvm/CodeGen/MachineFunction.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineFunction.h?rev=116890&r1=116889&r2=116890&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineFunction.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineFunction.h Tue Oct 19 19:31:05 2010
@@ -371,7 +371,8 @@
   /// explicitly deallocated.
   MachineMemOperand *getMachineMemOperand(MachinePointerInfo PtrInfo,
                                           unsigned f, uint64_t s,
-                                          unsigned base_alignment);
+                                          unsigned base_alignment,
+                                          const MDNode *TBAAInfo = 0);
   
   /// getMachineMemOperand - Allocate a new MachineMemOperand by copying
   /// an existing one, adjusting by an offset and using the given size.

Modified: llvm/trunk/include/llvm/CodeGen/MachineMemOperand.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineMemOperand.h?rev=116890&r1=116889&r2=116890&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineMemOperand.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineMemOperand.h Tue Oct 19 19:31:05 2010
@@ -82,6 +82,7 @@
   MachinePointerInfo PtrInfo;
   uint64_t Size;
   unsigned Flags;
+  const MDNode *TBAAInfo;
 
 public:
   /// Flags values. These may be or'd together.
@@ -101,7 +102,7 @@
   /// MachineMemOperand - Construct an MachineMemOperand object with the
   /// specified PtrInfo, flags, size, and base alignment.
   MachineMemOperand(MachinePointerInfo PtrInfo, unsigned flags, uint64_t s,
-                    unsigned base_alignment);
+                    unsigned base_alignment, const MDNode *TBAAInfo = 0);
 
   const MachinePointerInfo &getPointerInfo() const { return PtrInfo; }
   
@@ -133,6 +134,9 @@
   /// base address, without the offset.
   uint64_t getBaseAlignment() const { return (1u << (Flags >> MOMaxBits)) >> 1; }
 
+  /// getTBAAInfo - Return the TBAA tag for the memory reference.
+  const MDNode *getTBAAInfo() const { return TBAAInfo; }
+
   bool isLoad() const { return Flags & MOLoad; }
   bool isStore() const { return Flags & MOStore; }
   bool isVolatile() const { return Flags & MOVolatile; }

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAG.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAG.h?rev=116890&r1=116889&r2=116890&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAG.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAG.h Tue Oct 19 19:31:05 2010
@@ -631,18 +631,21 @@
   ///
   SDValue getLoad(EVT VT, DebugLoc dl, SDValue Chain, SDValue Ptr,
                   MachinePointerInfo PtrInfo, bool isVolatile,
-                  bool isNonTemporal, unsigned Alignment);
+                  bool isNonTemporal, unsigned Alignment,
+                  const MDNode *TBAAInfo = 0);
   SDValue getExtLoad(ISD::LoadExtType ExtType, EVT VT, DebugLoc dl,
                      SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo,
                      EVT MemVT, bool isVolatile,
-                     bool isNonTemporal, unsigned Alignment);
+                     bool isNonTemporal, unsigned Alignment,
+                     const MDNode *TBAAInfo = 0);
   SDValue getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
                          SDValue Offset, ISD::MemIndexedMode AM);
   SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
                   EVT VT, DebugLoc dl,
                   SDValue Chain, SDValue Ptr, SDValue Offset,
                   MachinePointerInfo PtrInfo, EVT MemVT,
-                  bool isVolatile, bool isNonTemporal, unsigned Alignment);
+                  bool isVolatile, bool isNonTemporal, unsigned Alignment,
+                  const MDNode *TBAAInfo = 0);
   SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
                   EVT VT, DebugLoc dl,
                   SDValue Chain, SDValue Ptr, SDValue Offset,
@@ -652,13 +655,15 @@
   ///
   SDValue getStore(SDValue Chain, DebugLoc dl, SDValue Val, SDValue Ptr,
                    MachinePointerInfo PtrInfo, bool isVolatile,
-                   bool isNonTemporal, unsigned Alignment);
+                   bool isNonTemporal, unsigned Alignment,
+                   const MDNode *TBAAInfo = 0);
   SDValue getStore(SDValue Chain, DebugLoc dl, SDValue Val, SDValue Ptr,
                    MachineMemOperand *MMO);
   SDValue getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, SDValue Ptr,
                         MachinePointerInfo PtrInfo, EVT TVT,
                         bool isNonTemporal, bool isVolatile,
-                        unsigned Alignment);
+                        unsigned Alignment,
+                        const MDNode *TBAAInfo = 0);
   SDValue getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, SDValue Ptr,
                         EVT TVT, MachineMemOperand *MMO);
   SDValue getIndexedStore(SDValue OrigStoe, DebugLoc dl, SDValue Base,

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=116890&r1=116889&r2=116890&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Tue Oct 19 19:31:05 2010
@@ -902,6 +902,9 @@
   const Value *getSrcValue() const { return MMO->getValue(); }
   int64_t getSrcValueOffset() const { return MMO->getOffset(); }
 
+  /// Returns the TBAAInfo that describes the dereference.
+  const MDNode *getTBAAInfo() const { return MMO->getTBAAInfo(); }
+
   /// getMemoryVT - Return the type of the in-memory value.
   EVT getMemoryVT() const { return MemoryVT; }
 

Modified: llvm/trunk/lib/CodeGen/MachineFunction.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineFunction.cpp?rev=116890&r1=116889&r2=116890&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineFunction.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineFunction.cpp Tue Oct 19 19:31:05 2010
@@ -191,8 +191,10 @@
 
 MachineMemOperand *
 MachineFunction::getMachineMemOperand(MachinePointerInfo PtrInfo, unsigned f,
-                                      uint64_t s, unsigned base_alignment) {
-  return new (Allocator) MachineMemOperand(PtrInfo, f, s, base_alignment);
+                                      uint64_t s, unsigned base_alignment,
+                                      const MDNode *TBAAInfo) {
+  return new (Allocator) MachineMemOperand(PtrInfo, f, s, base_alignment,
+                                           TBAAInfo);
 }
 
 MachineMemOperand *
@@ -201,7 +203,8 @@
   return new (Allocator)
              MachineMemOperand(MachinePointerInfo(MMO->getValue(),
                                                   MMO->getOffset()+Offset),
-                               MMO->getFlags(), Size, MMO->getBaseAlignment());
+                               MMO->getFlags(), Size,
+                               MMO->getBaseAlignment(), 0);
 }
 
 MachineInstr::mmo_iterator
@@ -231,7 +234,8 @@
         MachineMemOperand *JustLoad =
           getMachineMemOperand((*I)->getPointerInfo(),
                                (*I)->getFlags() & ~MachineMemOperand::MOStore,
-                               (*I)->getSize(), (*I)->getBaseAlignment());
+                               (*I)->getSize(), (*I)->getBaseAlignment(),
+                               (*I)->getTBAAInfo());
         Result[Index] = JustLoad;
       }
       ++Index;
@@ -262,7 +266,8 @@
         MachineMemOperand *JustStore =
           getMachineMemOperand((*I)->getPointerInfo(),
                                (*I)->getFlags() & ~MachineMemOperand::MOLoad,
-                               (*I)->getSize(), (*I)->getBaseAlignment());
+                               (*I)->getSize(), (*I)->getBaseAlignment(),
+                               (*I)->getTBAAInfo());
         Result[Index] = JustStore;
       }
       ++Index;

Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=116890&r1=116889&r2=116890&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Tue Oct 19 19:31:05 2010
@@ -367,9 +367,11 @@
 }
 
 MachineMemOperand::MachineMemOperand(MachinePointerInfo ptrinfo, unsigned f,
-                                     uint64_t s, unsigned int a)
+                                     uint64_t s, unsigned int a,
+                                     const MDNode *TBAAInfo)
   : PtrInfo(ptrinfo), Size(s),
-    Flags((f & ((1 << MOMaxBits) - 1)) | ((Log2_32(a) + 1) << MOMaxBits)) {
+    Flags((f & ((1 << MOMaxBits) - 1)) | ((Log2_32(a) + 1) << MOMaxBits)),
+    TBAAInfo(TBAAInfo) {
   assert((PtrInfo.V == 0 || isa<PointerType>(PtrInfo.V->getType())) &&
          "invalid pointer value");
   assert(getBaseAlignment() == a && "Alignment is not a power of 2!");
@@ -442,6 +444,16 @@
       MMO.getBaseAlignment() != MMO.getSize())
     OS << "(align=" << MMO.getAlignment() << ")";
 
+  // Print TBAA info.
+  if (const MDNode *TBAAInfo = MMO.getTBAAInfo()) {
+    OS << "(tbaa=";
+    if (TBAAInfo->getNumOperands() > 0)
+      WriteAsOperand(OS, TBAAInfo->getOperand(0), /*PrintType=*/false);
+    else
+      OS << "<unknown>";
+    OS << ")";
+  }
+
   return OS;
 }
 
@@ -1198,7 +1210,9 @@
         if (PSV->isConstant(MFI))
           continue;
       // If we have an AliasAnalysis, ask it whether the memory is constant.
-      if (AA && AA->pointsToConstantMemory(V))
+      if (AA && AA->pointsToConstantMemory(
+                      AliasAnalysis::Location(V, (*I)->getSize(),
+                                              (*I)->getTBAAInfo())))
         continue;
     }
 

Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=116890&r1=116889&r2=116890&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Tue Oct 19 19:31:05 2010
@@ -777,7 +777,9 @@
     MachineFunction &MF = *MI->getParent()->getParent();
     return PSV->isConstant(MF.getFrameInfo());
   } else {
-    return AA->pointsToConstantMemory(MMO->getValue());
+    return AA->pointsToConstantMemory(AliasAnalysis::Location(MMO->getValue(),
+                                                              MMO->getSize(),
+                                                              MMO->getTBAAInfo()));
   }
 }
 

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=116890&r1=116889&r2=116890&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Tue Oct 19 19:31:05 2010
@@ -248,16 +248,19 @@
     bool isAlias(SDValue Ptr1, int64_t Size1,
                  const Value *SrcValue1, int SrcValueOffset1,
                  unsigned SrcValueAlign1,
+                 const MDNode *TBAAInfo1,
                  SDValue Ptr2, int64_t Size2,
                  const Value *SrcValue2, int SrcValueOffset2,
-                 unsigned SrcValueAlign2) const;
+                 unsigned SrcValueAlign2,
+                 const MDNode *TBAAInfo2) const;
 
     /// FindAliasInfo - Extracts the relevant alias information from the memory
     /// node.  Returns true if the operand was a load.
     bool FindAliasInfo(SDNode *N,
                        SDValue &Ptr, int64_t &Size,
                        const Value *&SrcValue, int &SrcValueOffset,
-                       unsigned &SrcValueAlignment) const;
+                       unsigned &SrcValueAlignment,
+                       const MDNode *&TBAAInfo) const;
 
     /// FindBetterChain - Walk up chain skipping non-aliasing memory nodes,
     /// looking for a better chain (aliasing node.)
@@ -7045,9 +7048,11 @@
 bool DAGCombiner::isAlias(SDValue Ptr1, int64_t Size1,
                           const Value *SrcValue1, int SrcValueOffset1,
                           unsigned SrcValueAlign1,
+                          const MDNode *TBAAInfo1,
                           SDValue Ptr2, int64_t Size2,
                           const Value *SrcValue2, int SrcValueOffset2,
-                          unsigned SrcValueAlign2) const {
+                          unsigned SrcValueAlign2,
+                          const MDNode *TBAAInfo2) const {
   // If they are the same then they must be aliases.
   if (Ptr1 == Ptr2) return true;
 
@@ -7101,7 +7106,8 @@
     int64_t Overlap1 = Size1 + SrcValueOffset1 - MinOffset;
     int64_t Overlap2 = Size2 + SrcValueOffset2 - MinOffset;
     AliasAnalysis::AliasResult AAResult =
-                             AA.alias(SrcValue1, Overlap1, SrcValue2, Overlap2);
+      AA.alias(AliasAnalysis::Location(SrcValue1, Overlap1, TBAAInfo1),
+               AliasAnalysis::Location(SrcValue2, Overlap2, TBAAInfo2));
     if (AAResult == AliasAnalysis::NoAlias)
       return false;
   }
@@ -7116,13 +7122,15 @@
                         SDValue &Ptr, int64_t &Size,
                         const Value *&SrcValue, 
                         int &SrcValueOffset,
-                        unsigned &SrcValueAlign) const {
+                        unsigned &SrcValueAlign,
+                        const MDNode *&TBAAInfo) const {
   if (LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) {
     Ptr = LD->getBasePtr();
     Size = LD->getMemoryVT().getSizeInBits() >> 3;
     SrcValue = LD->getSrcValue();
     SrcValueOffset = LD->getSrcValueOffset();
     SrcValueAlign = LD->getOriginalAlignment();
+    TBAAInfo = LD->getTBAAInfo();
     return true;
   } else if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) {
     Ptr = ST->getBasePtr();
@@ -7130,6 +7138,7 @@
     SrcValue = ST->getSrcValue();
     SrcValueOffset = ST->getSrcValueOffset();
     SrcValueAlign = ST->getOriginalAlignment();
+    TBAAInfo = ST->getTBAAInfo();
   } else {
     llvm_unreachable("FindAliasInfo expected a memory operand");
   }
@@ -7150,8 +7159,9 @@
   const Value *SrcValue;
   int SrcValueOffset;
   unsigned SrcValueAlign;
+  const MDNode *SrcTBAAInfo;
   bool IsLoad = FindAliasInfo(N, Ptr, Size, SrcValue, SrcValueOffset, 
-                              SrcValueAlign);
+                              SrcValueAlign, SrcTBAAInfo);
 
   // Starting off.
   Chains.push_back(OriginalChain);
@@ -7195,15 +7205,18 @@
       const Value *OpSrcValue;
       int OpSrcValueOffset;
       unsigned OpSrcValueAlign;
+      const MDNode *OpSrcTBAAInfo;
       bool IsOpLoad = FindAliasInfo(Chain.getNode(), OpPtr, OpSize,
                                     OpSrcValue, OpSrcValueOffset,
-                                    OpSrcValueAlign);
+                                    OpSrcValueAlign,
+                                    OpSrcTBAAInfo);
 
       // If chain is alias then stop here.
       if (!(IsLoad && IsOpLoad) &&
           isAlias(Ptr, Size, SrcValue, SrcValueOffset, SrcValueAlign,
+                  SrcTBAAInfo,
                   OpPtr, OpSize, OpSrcValue, OpSrcValueOffset,
-                  OpSrcValueAlign)) {
+                  OpSrcValueAlign, OpSrcTBAAInfo)) {
         Aliases.push_back(Chain);
       } else {
         // Look further up the chain.

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=116890&r1=116889&r2=116890&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Tue Oct 19 19:31:05 2010
@@ -3895,7 +3895,7 @@
                       SDValue Ptr, SDValue Offset,
                       MachinePointerInfo PtrInfo, EVT MemVT,
                       bool isVolatile, bool isNonTemporal,
-                      unsigned Alignment) {
+                      unsigned Alignment, const MDNode *TBAAInfo) {
   if (Alignment == 0)  // Ensure that codegen never sees alignment 0
     Alignment = getEVTAlignment(VT);
 
@@ -3912,7 +3912,8 @@
   
   MachineFunction &MF = getMachineFunction();
   MachineMemOperand *MMO =
-    MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
+    MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
+                            TBAAInfo);
   return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
 }
 
@@ -3966,20 +3967,21 @@
                               SDValue Chain, SDValue Ptr,
                               MachinePointerInfo PtrInfo,
                               bool isVolatile, bool isNonTemporal,
-                              unsigned Alignment) {
+                              unsigned Alignment, const MDNode *TBAAInfo) {
   SDValue Undef = getUNDEF(Ptr.getValueType());
   return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
-                 PtrInfo, VT, isVolatile, isNonTemporal, Alignment);
+                 PtrInfo, VT, isVolatile, isNonTemporal, Alignment, TBAAInfo);
 }
 
 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, EVT VT, DebugLoc dl,
                                  SDValue Chain, SDValue Ptr,
                                  MachinePointerInfo PtrInfo, EVT MemVT,
                                  bool isVolatile, bool isNonTemporal,
-                                 unsigned Alignment) {
+                                 unsigned Alignment, const MDNode *TBAAInfo) {
   SDValue Undef = getUNDEF(Ptr.getValueType());
   return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
-                 PtrInfo, MemVT, isVolatile, isNonTemporal, Alignment);
+                 PtrInfo, MemVT, isVolatile, isNonTemporal, Alignment,
+                 TBAAInfo);
 }
 
 
@@ -3998,7 +4000,7 @@
 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
                                SDValue Ptr, MachinePointerInfo PtrInfo,
                                bool isVolatile, bool isNonTemporal,
-                               unsigned Alignment) {
+                               unsigned Alignment, const MDNode *TBAAInfo) {
   if (Alignment == 0)  // Ensure that codegen never sees alignment 0
     Alignment = getEVTAlignment(Val.getValueType());
 
@@ -4014,7 +4016,8 @@
   MachineFunction &MF = getMachineFunction();
   MachineMemOperand *MMO =
     MF.getMachineMemOperand(PtrInfo, Flags,
-                            Val.getValueType().getStoreSize(), Alignment);
+                            Val.getValueType().getStoreSize(), Alignment,
+                            TBAAInfo);
 
   return getStore(Chain, dl, Val, Ptr, MMO);
 }
@@ -4045,7 +4048,8 @@
 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
                                     SDValue Ptr, MachinePointerInfo PtrInfo,
                                     EVT SVT,bool isVolatile, bool isNonTemporal,
-                                    unsigned Alignment) {
+                                    unsigned Alignment,
+                                    const MDNode *TBAAInfo) {
   if (Alignment == 0)  // Ensure that codegen never sees alignment 0
     Alignment = getEVTAlignment(SVT);
 
@@ -4060,7 +4064,8 @@
 
   MachineFunction &MF = getMachineFunction();
   MachineMemOperand *MMO =
-    MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment);
+    MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
+                            TBAAInfo);
 
   return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
 }

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=116890&r1=116889&r2=116890&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Tue Oct 19 19:31:05 2010
@@ -2934,6 +2934,7 @@
   bool isVolatile = I.isVolatile();
   bool isNonTemporal = I.getMetadata("nontemporal") != 0;
   unsigned Alignment = I.getAlignment();
+  const MDNode *TBAAInfo = I.getMetadata(LLVMContext::MD_tbaa);
 
   SmallVector<EVT, 4> ValueVTs;
   SmallVector<uint64_t, 4> Offsets;
@@ -2947,7 +2948,8 @@
   if (I.isVolatile())
     // Serialize volatile loads with other side effects.
     Root = getRoot();
-  else if (AA->pointsToConstantMemory(SV)) {
+  else if (AA->pointsToConstantMemory(
+             AliasAnalysis::Location(SV, AA->getTypeStoreSize(Ty), TBAAInfo))) {
     // Do not serialize (non-volatile) loads of constant memory with anything.
     Root = DAG.getEntryNode();
     ConstantMemory = true;
@@ -2965,7 +2967,7 @@
                             DAG.getConstant(Offsets[i], PtrVT));
     SDValue L = DAG.getLoad(ValueVTs[i], getCurDebugLoc(), Root,
                             A, MachinePointerInfo(SV, Offsets[i]), isVolatile,
-                            isNonTemporal, Alignment);
+                            isNonTemporal, Alignment, TBAAInfo);
 
     Values[i] = L;
     Chains[i] = L.getValue(1);
@@ -3008,6 +3010,7 @@
   bool isVolatile = I.isVolatile();
   bool isNonTemporal = I.getMetadata("nontemporal") != 0;
   unsigned Alignment = I.getAlignment();
+  const MDNode *TBAAInfo = I.getMetadata(LLVMContext::MD_tbaa);
 
   for (unsigned i = 0; i != NumValues; ++i) {
     SDValue Add = DAG.getNode(ISD::ADD, getCurDebugLoc(), PtrVT, Ptr,
@@ -3015,7 +3018,7 @@
     Chains[i] = DAG.getStore(Root, getCurDebugLoc(),
                              SDValue(Src.getNode(), Src.getResNo() + i),
                              Add, MachinePointerInfo(PtrV, Offsets[i]),
-                             isVolatile, isNonTemporal, Alignment);
+                             isVolatile, isNonTemporal, Alignment, TBAAInfo);
   }
 
   DAG.setRoot(DAG.getNode(ISD::TokenFactor, getCurDebugLoc(),



From aggarwa4 at illinois.edu  Tue Oct 19 20:05:13 2010
From: aggarwa4 at illinois.edu (Arushi Aggarwal)
Date: Wed, 20 Oct 2010 01:05:13 -0000
Subject: [llvm-commits] [poolalloc] r116896 - in /poolalloc/trunk:
 include/dsa/DSGraph.h include/dsa/DataStructure.h include/rdsa/DSGraph.h
 include/rdsa/DataStructure.h lib/DSA/DSGraph.cpp lib/DSA/DSTest.cpp
 lib/DSA/DataStructure.cpp lib/DSA/Printer.cpp lib/rDSA/DataStructure.cpp
 lib/rDSA/Printer.cpp
Message-ID: <20101020010513.2F81E2A6C12C@llvm.org>

Author: aggarwa4
Date: Tue Oct 19 20:05:12 2010
New Revision: 116896

URL: http://llvm.org/viewvc/llvm-project?rev=116896&view=rev
Log:
Rename PrintAuxCalls to UseAuxCalls

Modified:
    poolalloc/trunk/include/dsa/DSGraph.h
    poolalloc/trunk/include/dsa/DataStructure.h
    poolalloc/trunk/include/rdsa/DSGraph.h
    poolalloc/trunk/include/rdsa/DataStructure.h
    poolalloc/trunk/lib/DSA/DSGraph.cpp
    poolalloc/trunk/lib/DSA/DSTest.cpp
    poolalloc/trunk/lib/DSA/DataStructure.cpp
    poolalloc/trunk/lib/DSA/Printer.cpp
    poolalloc/trunk/lib/rDSA/DataStructure.cpp
    poolalloc/trunk/lib/rDSA/Printer.cpp

Modified: poolalloc/trunk/include/dsa/DSGraph.h
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/dsa/DSGraph.h?rev=116896&r1=116895&r2=116896&view=diff
==============================================================================
--- poolalloc/trunk/include/dsa/DSGraph.h (original)
+++ poolalloc/trunk/include/dsa/DSGraph.h Tue Oct 19 20:05:12 2010
@@ -209,7 +209,15 @@
   typedef std::multimap<DSNodeHandle, const DSNode*> InvNodeMapTy;
 private:
   DSGraph *GlobalsGraph;   // Pointer to the common graph of global objects
-  bool PrintAuxCalls;      // Should this graph print the Aux calls vector?
+
+  // This is use to differentiate between Local and the rest of the passes.
+  // Local should use the FunctionCalls vector that has all the DSCallSites.
+  // All other passes, shoud use the Aux calls vector, as they process and 
+  // subsequently might remove some DSCall Sites. Once those call sites
+  // have been resolved, we must not revisit them again.
+  // UseAuxCalls is false for Local. And true for the other passes.
+
+  bool UseAuxCalls;      // Should this pass use the Aux calls vector?
 
   NodeListTy Nodes;
   ScalarMapTy ScalarMap;
@@ -251,7 +259,7 @@
   DSGraph(EquivalenceClasses<const GlobalValue*> &ECs, const TargetData &td,
           SuperSet<const Type*>& tss,
           DSGraph *GG = 0) 
-    :GlobalsGraph(GG), PrintAuxCalls(false), 
+    :GlobalsGraph(GG), UseAuxCalls(false), 
      ScalarMap(ECs), TD(td), TypeSS(tss)
   { }
 
@@ -285,11 +293,11 @@
   ///
   const TargetData &getTargetData() const { return TD; }
 
-  /// setPrintAuxCalls - If you call this method, the auxillary call vector will
-  /// be printed instead of the standard call vector to the dot file.
+  /// setUseAuxCalls - If you call this method, the auxillary call vector will
+  /// be used instead of the standard call vector to the dot file.
   ///
-  void setPrintAuxCalls() { PrintAuxCalls = true; }
-  bool shouldPrintAuxCalls() const { return PrintAuxCalls; }
+  void setUseAuxCalls() { UseAuxCalls = true; }
+  bool shouldUseAuxCalls() const { return UseAuxCalls; }
 
   /// node_iterator/begin/end - Iterate over all of the nodes in the graph.  Be
   /// extremely careful with these methods because any merging of nodes could

Modified: poolalloc/trunk/include/dsa/DataStructure.h
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/dsa/DataStructure.h?rev=116896&r1=116895&r2=116896&view=diff
==============================================================================
--- poolalloc/trunk/include/dsa/DataStructure.h (original)
+++ poolalloc/trunk/include/dsa/DataStructure.h Tue Oct 19 20:05:12 2010
@@ -81,7 +81,7 @@
   // Callgraph, as computed so far
   DSCallGraph callgraph;
 
-  void init(DataStructures* D, bool clone, bool printAuxCalls, bool copyGlobalAuxCalls, bool resetAux);
+  void init(DataStructures* D, bool clone, bool useAuxCalls, bool copyGlobalAuxCalls, bool resetAux);
   void init(TargetData* T);
 
   void formGlobalECs();

Modified: poolalloc/trunk/include/rdsa/DSGraph.h
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/rdsa/DSGraph.h?rev=116896&r1=116895&r2=116896&view=diff
==============================================================================
--- poolalloc/trunk/include/rdsa/DSGraph.h (original)
+++ poolalloc/trunk/include/rdsa/DSGraph.h Tue Oct 19 20:05:12 2010
@@ -209,7 +209,7 @@
   typedef hash_multimap<DSNodeHandle, const DSNode*> InvNodeMapTy;
 private:
   DSGraph *GlobalsGraph;   // Pointer to the common graph of global objects
-  bool PrintAuxCalls;      // Should this graph print the Aux calls vector?
+  bool UseAuxCalls;      // Should this graph print the Aux calls vector?
 
   NodeListTy Nodes;
   ScalarMapTy ScalarMap;
@@ -244,7 +244,7 @@
   // Create a new, empty, DSGraph.
   DSGraph(EquivalenceClasses<const GlobalValue*> &ECs, const TargetData &td,
           DSGraph *GG) 
-    :GlobalsGraph(GG), PrintAuxCalls(false), 
+    :GlobalsGraph(GG), UseAuxCalls(false), 
      ScalarMap(ECs), TD(td)
   { }
 
@@ -272,11 +272,11 @@
   ///
   const TargetData &getTargetData() const { return TD; }
 
-  /// setPrintAuxCalls - If you call this method, the auxillary call vector will
+  /// setUseAuxCalls - If you call this method, the auxillary call vector will
   /// be printed instead of the standard call vector to the dot file.
   ///
-  void setPrintAuxCalls() { PrintAuxCalls = true; }
-  bool shouldPrintAuxCalls() const { return PrintAuxCalls; }
+  void setUseAuxCalls() { UseAuxCalls = true; }
+  bool shouldUseAuxCalls() const { return UseAuxCalls; }
 
   /// node_iterator/begin/end - Iterate over all of the nodes in the graph.  Be
   /// extremely careful with these methods because any merging of nodes could

Modified: poolalloc/trunk/include/rdsa/DataStructure.h
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/rdsa/DataStructure.h?rev=116896&r1=116895&r2=116896&view=diff
==============================================================================
--- poolalloc/trunk/include/rdsa/DataStructure.h (original)
+++ poolalloc/trunk/include/rdsa/DataStructure.h Tue Oct 19 20:05:12 2010
@@ -131,7 +131,7 @@
   EquivalenceClasses<const GlobalValue*> GlobalECs;
 
 
-  void init(DataStructures* D, bool clone, bool printAuxCalls, bool copyGlobalAuxCalls, bool resetAux);
+  void init(DataStructures* D, bool clone, bool useAuxCalls, bool copyGlobalAuxCalls, bool resetAux);
   void init(TargetData* T);
 
   void formGlobalECs();

Modified: poolalloc/trunk/lib/DSA/DSGraph.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/DSGraph.cpp?rev=116896&r1=116895&r2=116896&view=diff
==============================================================================
--- poolalloc/trunk/lib/DSA/DSGraph.cpp (original)
+++ poolalloc/trunk/lib/DSA/DSGraph.cpp Tue Oct 19 20:05:12 2010
@@ -99,7 +99,7 @@
                  SuperSet<const Type*>& tss,
                  unsigned CloneFlags)
   : GlobalsGraph(0), ScalarMap(ECs), TD(G->TD), TypeSS(tss) {
-  PrintAuxCalls = false;
+  UseAuxCalls = false;
   cloneInto(G, CloneFlags);
 }
 
@@ -639,7 +639,7 @@
   }
 
   // Mark stuff passed into functions calls as being incomplete.
-  if (!shouldPrintAuxCalls())
+  if (!shouldUseAuxCalls())
     for (std::list<DSCallSite>::iterator I = FunctionCalls.begin(),
            E = FunctionCalls.end(); I != E; ++I)
       markIncomplete(*I);
@@ -1582,7 +1582,7 @@
   //
   // Get the list of unresolved call sites.
   //
-  const std::list<DSCallSite>& Calls = getAuxFunctionCalls();
+  const std::list<DSCallSite>& Calls = getFunctionCalls();
   for (std::list<DSCallSite>::const_iterator ii = Calls.begin(),
                                              ee = Calls.end();
        ii != ee; ++ii) {

Modified: poolalloc/trunk/lib/DSA/DSTest.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/DSTest.cpp?rev=116896&r1=116895&r2=116896&view=diff
==============================================================================
--- poolalloc/trunk/lib/DSA/DSTest.cpp (original)
+++ poolalloc/trunk/lib/DSA/DSTest.cpp Tue Oct 19 20:05:12 2010
@@ -15,6 +15,8 @@
 //   -print-only-types              Only print the types for the given values
 // -check-same-node=<list>        Verify the given values' nodes were merged.
 // -check-not-same-node=<list>    Verify the given values' nodes weren't merged.
+// -check-type=<list>,type        Verify the given nodes have the given type
+// -check-callees=caller,<list>   Verify the given caller has the following callees
 // -verify-flags=<list>           Verify the given values match the flag specifications.
 //
 // In general a 'value' query on the DSA results looks like this:
@@ -548,6 +550,7 @@
 /// functions in the list
 static bool checkCallees(llvm::raw_ostream &O, const Module *M, const DataStructures *DS) {
   
+  //Mangled names must be provided for C++
   cl::list<std::string>::iterator I = CheckCallees.begin(),
                                   E = CheckCallees.end();
   // If the user specified that a set of values should be in the same node...

Modified: poolalloc/trunk/lib/DSA/DataStructure.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/DataStructure.cpp?rev=116896&r1=116895&r2=116896&view=diff
==============================================================================
--- poolalloc/trunk/lib/DSA/DataStructure.cpp (original)
+++ poolalloc/trunk/lib/DSA/DataStructure.cpp Tue Oct 19 20:05:12 2010
@@ -1259,7 +1259,7 @@
       if (resetAuxCalls) 
         G->getAuxFunctionCalls() = G->getFunctionCalls();
     }
-    G->setPrintAuxCalls();
+    G->setUseAuxCalls();
     G->setGlobalsGraph(GlobalsGraph);
     
     // Note that this graph is the graph for ALL of the function in the SCC, not
@@ -1373,7 +1373,7 @@
   DEBUG(if(MadeChange) G.AssertGraphOK());
 }
 
-void DataStructures::init(DataStructures* D, bool clone, bool printAuxCalls, 
+void DataStructures::init(DataStructures* D, bool clone, bool useAuxCalls, 
                           bool copyGlobalAuxCalls, bool resetAux) {
   assert (!GraphSource && "Already init");
   GraphSource = D;
@@ -1386,7 +1386,7 @@
   GlobalsGraph = new DSGraph(D->getGlobalsGraph(), GlobalECs, *TypeSS,
                              copyGlobalAuxCalls? DSGraph::CloneAuxCallNodes
 					 :DSGraph::DontCloneAuxCallNodes);
-  if (printAuxCalls) GlobalsGraph->setPrintAuxCalls();
+  if (useAuxCalls) GlobalsGraph->setUseAuxCalls();
 
   //
   // Tell the other DSA pass if we're stealing its graph.

Modified: poolalloc/trunk/lib/DSA/Printer.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/Printer.cpp?rev=116896&r1=116895&r2=116896&view=diff
==============================================================================
--- poolalloc/trunk/lib/DSA/Printer.cpp (original)
+++ poolalloc/trunk/lib/DSA/Printer.cpp Tue Oct 19 20:05:12 2010
@@ -246,7 +246,7 @@
 
     // Output all of the call nodes...
     const std::list<DSCallSite> &FCs =
-      G->shouldPrintAuxCalls() ? G->getAuxFunctionCalls()
+      G->shouldUseAuxCalls() ? G->getAuxFunctionCalls()
       : G->getFunctionCalls();
     for (std::list<DSCallSite>::const_iterator I = FCs.begin(), E = FCs.end();
          I != E; ++I) {
@@ -305,7 +305,7 @@
 
   if (!Error.size()) {
     print(F);
-    unsigned NumCalls = shouldPrintAuxCalls() ?
+    unsigned NumCalls = shouldUseAuxCalls() ?
       getAuxFunctionCalls().size() : getFunctionCalls().size();
     O << " [" << getGraphSize() << "+" << NumCalls << "]\n";
   } else {
@@ -333,7 +333,7 @@
   for (Module::const_iterator I = M->begin(), E = M->end(); I != E; ++I)
     if (C.hasDSGraph(*I)) {
       DSGraph* Gr = C.getDSGraph((Function&)*I);
-      unsigned NumCalls = Gr->shouldPrintAuxCalls() ?
+      unsigned NumCalls = Gr->shouldUseAuxCalls() ?
         Gr->getAuxFunctionCalls().size() : Gr->getFunctionCalls().size();
       bool IsDuplicateGraph = false;
 

Modified: poolalloc/trunk/lib/rDSA/DataStructure.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/rDSA/DataStructure.cpp?rev=116896&r1=116895&r2=116896&view=diff
==============================================================================
--- poolalloc/trunk/lib/rDSA/DataStructure.cpp (original)
+++ poolalloc/trunk/lib/rDSA/DataStructure.cpp Tue Oct 19 20:05:12 2010
@@ -1245,7 +1245,7 @@
 DSGraph::DSGraph(DSGraph* G, EquivalenceClasses<const GlobalValue*> &ECs,
                  DSGraph* GG, unsigned CloneFlags)
   : GlobalsGraph(GG), ScalarMap(ECs), TD(G->TD) {
-  PrintAuxCalls = false;
+  UseAuxCalls = false;
   cloneInto(G, CloneFlags);
 }
 
@@ -1763,7 +1763,7 @@
     }
 
   // Mark stuff passed into functions calls as being incomplete.
-  if (!shouldPrintAuxCalls())
+  if (!shouldUseAuxCalls())
     for (std::list<DSCallSite>::iterator I = FunctionCalls.begin(),
            E = FunctionCalls.end(); I != E; ++I)
       markIncomplete(*I);
@@ -2533,7 +2533,7 @@
       if (resetAuxCalls) 
         G->getAuxFunctionCalls() = G->getFunctionCalls();
     }
-    G->setPrintAuxCalls();
+    G->setUseAuxCalls();
     
     // Note that this graph is the graph for ALL of the function in the SCC, not
     // just F.
@@ -2643,7 +2643,7 @@
   }
 }
 
-void DataStructures::init(DataStructures* D, bool clone, bool printAuxCalls, 
+void DataStructures::init(DataStructures* D, bool clone, bool useAuxCalls, 
                           bool copyGlobalAuxCalls, bool resetAux) {
   assert (!GraphSource && "Already init");
   GraphSource = D;
@@ -2654,7 +2654,7 @@
   GlobalECs = D->getGlobalECs();
   GlobalsGraph = new DSGraph(D->getGlobalsGraph(), GlobalECs, 0,
                              copyGlobalAuxCalls?0:DSGraph::DontCloneAuxCallNodes);
-  if (printAuxCalls) GlobalsGraph->setPrintAuxCalls();
+  if (useAuxCalls) GlobalsGraph->setUseAuxCalls();
 
   //
   // Tell the other DSA pass if we're stealing its graph.

Modified: poolalloc/trunk/lib/rDSA/Printer.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/rDSA/Printer.cpp?rev=116896&r1=116895&r2=116896&view=diff
==============================================================================
--- poolalloc/trunk/lib/rDSA/Printer.cpp (original)
+++ poolalloc/trunk/lib/rDSA/Printer.cpp Tue Oct 19 20:05:12 2010
@@ -193,7 +193,7 @@
 
     // Output all of the call nodes...
     const std::list<DSCallSite> &FCs =
-      G->shouldPrintAuxCalls() ? G->getAuxFunctionCalls()
+      G->shouldUseAuxCalls() ? G->getAuxFunctionCalls()
       : G->getFunctionCalls();
     for (std::list<DSCallSite>::const_iterator I = FCs.begin(), E = FCs.end();
          I != E; ++I) {
@@ -249,7 +249,7 @@
 
   if (F.good()) {
     print(F);
-    unsigned NumCalls = shouldPrintAuxCalls() ?
+    unsigned NumCalls = shouldUseAuxCalls() ?
       getAuxFunctionCalls().size() : getFunctionCalls().size();
     O << " [" << getGraphSize() << "+" << NumCalls << "]\n";
   } else {
@@ -277,7 +277,7 @@
   for (Module::const_iterator I = M->begin(), E = M->end(); I != E; ++I)
     if (C.hasDSGraph(I)) {
       DSGraph* Gr = C.getDSGraph(I);
-      unsigned NumCalls = Gr->shouldPrintAuxCalls() ?
+      unsigned NumCalls = Gr->shouldUseAuxCalls() ?
         Gr->getAuxFunctionCalls().size() : Gr->getFunctionCalls().size();
       bool IsDuplicateGraph = false;
 



From grosbach at apple.com  Tue Oct 19 20:10:01 2010
From: grosbach at apple.com (Jim Grosbach)
Date: Wed, 20 Oct 2010 01:10:01 -0000
Subject: [llvm-commits] [llvm] r116897 -
	/llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp
Message-ID: <20101020011001.4B5442A6C12C@llvm.org>

Author: grosbach
Date: Tue Oct 19 20:10:01 2010
New Revision: 116897

URL: http://llvm.org/viewvc/llvm-project?rev=116897&view=rev
Log:
Fix backwards conditional.

Modified:
    llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp?rev=116897&r1=116896&r2=116897&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp Tue Oct 19 20:10:01 2010
@@ -607,7 +607,7 @@
                                         *TII);
         }
         // If there's dynamic realignment, adjust for it.
-        if (!RI.needsStackRealignment(MF)) {
+        if (RI.needsStackRealignment(MF)) {
           MachineFrameInfo  *MFI = MF.getFrameInfo();
           unsigned MaxAlign = MFI->getMaxAlignment();
           assert (!AFI->isThumb1OnlyFunction());



From andersca at mac.com  Tue Oct 19 20:21:53 2010
From: andersca at mac.com (Anders Carlsson)
Date: Wed, 20 Oct 2010 01:21:53 -0000
Subject: [llvm-commits] [llvm] r116899 - in /llvm/trunk/utils/TableGen:
 ClangAttrEmitter.cpp ClangAttrEmitter.h TableGen.cpp
Message-ID: <20101020012153.40F842A6C12C@llvm.org>

Author: andersca
Date: Tue Oct 19 20:21:53 2010
New Revision: 116899

URL: http://llvm.org/viewvc/llvm-project?rev=116899&view=rev
Log:
Add a way to emit StringSwitch of clang attribute spellings.

Modified:
    llvm/trunk/utils/TableGen/ClangAttrEmitter.cpp
    llvm/trunk/utils/TableGen/ClangAttrEmitter.h
    llvm/trunk/utils/TableGen/TableGen.cpp

Modified: llvm/trunk/utils/TableGen/ClangAttrEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/ClangAttrEmitter.cpp?rev=116899&r1=116898&r2=116899&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/ClangAttrEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/ClangAttrEmitter.cpp Tue Oct 19 20:21:53 2010
@@ -637,3 +637,21 @@
   }
   OS << "  }\n";
 }
+
+void ClangAttrSpellingListEmitter::run(raw_ostream &OS) {
+  OS << "// This file is generated by TableGen. Do not edit.\n\n";
+
+  std::vector<Record*> Attrs = Records.getAllDerivedDefinitions("Attr");
+  
+  for (std::vector<Record*>::iterator I = Attrs.begin(), E = Attrs.end(); I != E; ++I) {
+    Record &Attr = **I;
+
+    std::vector<StringRef> Spellings = getValueAsListOfStrings(Attr, "Spellings");
+
+    for (std::vector<StringRef>::const_iterator I = Spellings.begin(), E = Spellings.end(); I != E; ++I) {
+      StringRef Spelling = *I;
+      OS << ".Case(\"" << Spelling << "\", true)\n";
+    }
+  }
+
+}

Modified: llvm/trunk/utils/TableGen/ClangAttrEmitter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/ClangAttrEmitter.h?rev=116899&r1=116898&r2=116899&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/ClangAttrEmitter.h (original)
+++ llvm/trunk/utils/TableGen/ClangAttrEmitter.h Tue Oct 19 20:21:53 2010
@@ -83,6 +83,19 @@
   void run(raw_ostream &OS);
 };
 
+/// ClangAttrSpellingListEmitter - class emits the list of spellings for attributes for
+///   clang.
+class ClangAttrSpellingListEmitter : public TableGenBackend {
+  RecordKeeper &Records;
+
+ public:
+  explicit ClangAttrSpellingListEmitter(RecordKeeper &R)
+    : Records(R)
+    {}
+
+  void run(raw_ostream &OS);
+};
+
 }
 
 #endif

Modified: llvm/trunk/utils/TableGen/TableGen.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/TableGen.cpp?rev=116899&r1=116898&r2=116899&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/TableGen.cpp (original)
+++ llvm/trunk/utils/TableGen/TableGen.cpp Tue Oct 19 20:21:53 2010
@@ -59,6 +59,7 @@
   GenClangAttrList,
   GenClangAttrPCHRead,
   GenClangAttrPCHWrite,
+  GenClangAttrSpellingList,
   GenClangDiagsDefs,
   GenClangDiagGroups,
   GenClangDeclNodes,
@@ -127,6 +128,8 @@
                                "Generate clang PCH attribute reader"),
                     clEnumValN(GenClangAttrPCHWrite, "gen-clang-attr-pch-write",
                                "Generate clang PCH attribute writer"),
+                    clEnumValN(GenClangAttrSpellingList, "gen-clang-attr-spelling-list",
+                               "Generate a clang attribute spelling list"),
                     clEnumValN(GenClangDiagsDefs, "gen-clang-diags-defs",
                                "Generate Clang diagnostics definitions"),
                     clEnumValN(GenClangDiagGroups, "gen-clang-diag-groups",
@@ -274,6 +277,9 @@
     case GenClangAttrPCHWrite:
       ClangAttrPCHWriteEmitter(Records).run(Out.os());
       break;
+    case GenClangAttrSpellingList:
+      ClangAttrSpellingListEmitter(Records).run(Out.os());
+      break;
     case GenClangDiagsDefs:
       ClangDiagsDefsEmitter(Records, ClangComponent).run(Out.os());
       break;



From wdietz2 at illinois.edu  Tue Oct 19 20:31:24 2010
From: wdietz2 at illinois.edu (Will Dietz)
Date: Wed, 20 Oct 2010 01:31:24 -0000
Subject: [llvm-commits] [poolalloc] r116900 - in /poolalloc/trunk/test/dsa:
 extern/extern.ll extern/extern3.ll extern/extern_global_escape.ll
 td/call1.ll td/call2.ll td/params.ll td/params1.ll td/recur.ll
Message-ID: <20101020013124.E1B4C2A6C12C@llvm.org>

Author: wdietz2
Date: Tue Oct 19 20:31:24 2010
New Revision: 116900

URL: http://llvm.org/viewvc/llvm-project?rev=116900&view=rev
Log:
Test fixes for External.

Added:
    poolalloc/trunk/test/dsa/extern/extern_global_escape.ll
Modified:
    poolalloc/trunk/test/dsa/extern/extern.ll
    poolalloc/trunk/test/dsa/extern/extern3.ll
    poolalloc/trunk/test/dsa/td/call1.ll
    poolalloc/trunk/test/dsa/td/call2.ll
    poolalloc/trunk/test/dsa/td/params.ll
    poolalloc/trunk/test/dsa/td/params1.ll
    poolalloc/trunk/test/dsa/td/recur.ll

Modified: poolalloc/trunk/test/dsa/extern/extern.ll
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/test/dsa/extern/extern.ll?rev=116900&r1=116899&r2=116900&view=diff
==============================================================================
--- poolalloc/trunk/test/dsa/extern/extern.ll (original)
+++ poolalloc/trunk/test/dsa/extern/extern.ll Tue Oct 19 20:31:24 2010
@@ -7,7 +7,7 @@
 ;  Should be incomplete, tests very basic tracking.
 ;RUN: dsaopt %s -dsa-local -analyze -verify-flags "main:ptrExtern+IE"
 ;RUN: dsaopt %s -dsa-local -analyze -verify-flags "main:ptr+I-E"
-;RUN: dsaopt %s -dsa-local -analyze -verify-flags "main:ptrViaExtern+IE"
+;RUN: dsaopt %s -dsa-local -analyze -verify-flags "main:ptrViaExtern+I-E"
 
 ;RUN: dsaopt %s -dsa-bu -analyze -verify-flags "main:ptrExtern+IE"
 ;RUN: dsaopt %s -dsa-bu -analyze -verify-flags "main:ptr-IE"
@@ -32,10 +32,11 @@
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
 target triple = "x86_64-unknown-linux-gnu"
 
+;RUN: dsaopt %s -dsa-local -analyze -verify-flags "getPointerViaExtern:ptr+E"
 define i32* @getPointerViaExtern() nounwind {
 entry:
-  %0 = tail call i32* (...)* @getPointerExtern() nounwind ; <i32*> [#uses=1]
-  ret i32* %0
+  %ptr = tail call i32* (...)* @getPointerExtern() nounwind ; <i32*> [#uses=1]
+  ret i32* %ptr
 }
 
 declare i32* @getPointerExtern(...)

Modified: poolalloc/trunk/test/dsa/extern/extern3.ll
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/test/dsa/extern/extern3.ll?rev=116900&r1=116899&r2=116900&view=diff
==============================================================================
--- poolalloc/trunk/test/dsa/extern/extern3.ll (original)
+++ poolalloc/trunk/test/dsa/extern/extern3.ll Tue Oct 19 20:31:24 2010
@@ -10,9 +10,10 @@
 declare noalias i8* @malloc(i64) nounwind
 declare void @free(i8*) nounwind
 
-;This should be marked external due to the
-;unification-based nature of DSA.
-;(this function does not have internal linkage)
+;This function is in theory externally callable (not internal linkage)
+;so it's parameters/ret val should be marked external in TD.
+;RUN: dsaopt %s -dsa-stdlib -analyze -verify-flags "getPointer:ptr+I-E"
+;RUN: dsaopt %s -dsa-bu -analyze -verify-flags "getPointer:ptr+I-E"
 ;RUN: dsaopt %s -dsa-td -analyze -verify-flags "getPointer:ptr+E-I"
 define i32* @getPointer() nounwind {
 entry:
@@ -21,8 +22,9 @@
   ret i32* %ptr
 }
 
-;This should be marked incomplete and external due to the
-;unification-based nature of DSA.
+;Since this isn't internal, should have external arguments in TD
+;RUN: dsaopt %s -dsa-stdlib -analyze -verify-flags "takesPointer:ptr+I-E"
+;RUN: dsaopt %s -dsa-bu -analyze -verify-flags "takesPointer:ptr+I-E"
 ;RUN: dsaopt %s -dsa-td -analyze -verify-flags "takesPointer:ptr+E-I"
 define i32 @takesPointer(i32* %ptr) nounwind {
 entry:
@@ -30,7 +32,8 @@
   ret i32 %0
 }
 
-;RUN: dsaopt %s -dsa-td -analyze -verify-flags "getPointerInternal:ptr-IE"
+;RUN: dsaopt %s -dsa-bu -analyze -verify-flags "getPointerInternal:ptr+I-E"
+;RUN: dsaopt %s -dsa-td -analyze -verify-flags "getPointerInternal:ptr-I-E"
 define internal i32* @getPointerInternal() nounwind {
 entry:
   %0 = tail call noalias i8* @malloc(i64 4) nounwind ; <i8*> [#uses=1]
@@ -38,6 +41,7 @@
   ret i32* %ptr
 }
 
+;RUN: dsaopt %s -dsa-bu -analyze -verify-flags "takesPointerInternal:ptr+I-E"
 ;RUN: dsaopt %s -dsa-td -analyze -verify-flags "takesPointerInternal:ptr-IE"
 define internal i32 @takesPointerInternal(i32* %ptr) nounwind {
 entry:
@@ -53,6 +57,8 @@
   ret i32 0
 }
 
+;RUN: dsaopt %s -dsa-stdlib -analyze -verify-flags "checkExterns:get+EI"
+;RUN: dsaopt %s -dsa-stdlib -analyze -verify-flags "checkExterns:take+EI"
 ;RUN: dsaopt %s -dsa-td -analyze -verify-flags "checkExterns:get+E-I"
 ;RUN: dsaopt %s -dsa-td -analyze -verify-flags "checkExterns:take+E-I"
 define void @checkExterns() nounwind {
@@ -64,8 +70,10 @@
   ret void
 }
 
-;RUN: dsaopt %s -dsa-td -analyze -verify-flags "checkExternals:get+E-I"
-;RUN: dsaopt %s -dsa-td -analyze -verify-flags "checkExternals:take+E-I"
+;RUN: dsaopt %s -dsa-stdlib -analyze -verify-flags "checkExternals:get+I-E"
+;RUN: dsaopt %s -dsa-stdlib -analyze -verify-flags "checkExternals:take+I-E"
+;RUN: dsaopt %s -dsa-td -analyze -verify-flags "checkExternals:get-IE"
+;RUN: dsaopt %s -dsa-td -analyze -verify-flags "checkExternals:take-IE"
 define void @checkExternals() nounwind {
 entry:
   %get = tail call i32* ()* @getPointer() nounwind ; <i32*> [#uses=0]
@@ -76,6 +84,8 @@
   ret void
 }
 
+;RUN: dsaopt %s -dsa-stdlib -analyze -verify-flags "checkInternals:get+I-E"
+;RUN: dsaopt %s -dsa-stdlib -analyze -verify-flags "checkInternals:take+I-E"
 ;RUN: dsaopt %s -dsa-td -analyze -verify-flags "checkInternals:get-IE"
 ;RUN: dsaopt %s -dsa-td -analyze -verify-flags "checkInternals:take-IE"
 define void @checkInternals() nounwind {

Added: poolalloc/trunk/test/dsa/extern/extern_global_escape.ll
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/test/dsa/extern/extern_global_escape.ll?rev=116900&view=auto
==============================================================================
--- poolalloc/trunk/test/dsa/extern/extern_global_escape.ll (added)
+++ poolalloc/trunk/test/dsa/extern/extern_global_escape.ll Tue Oct 19 20:31:24 2010
@@ -0,0 +1,52 @@
+; Here we have an externally visible function 'externallyVisible', such that it's possible
+; for some outside code to use it to change the value of 'globalptr'.  As such, the pointer loaded
+; from it in 'usesGlobalPtr' should be marked external.
+; ModuleID = 'extern_global_escape.c'
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
+target triple = "x86_64-unknown-linux-gnu"
+; RUN: dsaopt %s -dsa-local -analyze
+; RUN: dsaopt %s -dsa-bu -analyze
+; RUN: dsaopt %s -dsa-td -analyze
+
+; This global itself isn't externally accessible, only via 'externallyVisible'
+; RUN: dsaopt %s -dsa-local -analyze -verify-flags "globalptr+G-E"
+; RUN: dsaopt %s -dsa-bu -analyze -verify-flags "globalptr+G-E"
+; RUN: dsaopt %s -dsa-bu -analyze -verify-flags "globalptr:0+E"
+; RUN: dsaopt %s -dsa-td -analyze -verify-flags "globalptr+G-E"
+; RUN: dsaopt %s -dsa-td -analyze -verify-flags "globalptr:0+E"
+ at globalptr = internal global i32* null                     ; <i32**> [#uses=2]
+
+; RUN: dsaopt %s -dsa-local -analyze -verify-flags "externallyVisible:ptr+I"
+; RUN: dsaopt %s -dsa-bu -analyze -verify-flags "externallyVisible:ptr+I-E"
+; RUN: dsaopt %s -dsa-bu -analyze -verify-flags "externallyVisible:ptr:0+IE"
+; RUN: dsaopt %s -dsa-td -analyze -verify-flags "externallyVisible:ptr+E-I"
+; RUN: dsaopt %s -dsa-td -analyze -verify-flags "externallyVisible:ptr+E-I"
+define void @externallyVisible(i32** %ptr) nounwind {
+entry:
+  %0 = load i32** %ptr, align 8
+  store i32* %0, i32** @globalptr, align 8
+  ret void
+}
+
+; RUN: dsaopt %s -dsa-bu -analyze -verify-flags "usesGlobalPtr:ptr-IE"
+; RUN: dsaopt %s -dsa-bu -analyze -verify-flags "usesGlobalPtr:ptr:0+E-I"
+; RUN: dsaopt %s -dsa-td -analyze -verify-flags "usesGlobalPtr:ptr-E"
+; RUN: dsaopt %s -dsa-td -analyze -verify-flags "usesGlobalPtr:ptr:0+E"
+define void @usesGlobalPtr() nounwind {
+entry:
+  %ptr = alloca i32*                              ; <i32**> [#uses=1]
+  %0 = load i32** @globalptr, align 8             ; <i32*> [#uses=1]
+  store i32* %0, i32** %ptr, align 8
+  ret void
+}
+
+define i32 @main() nounwind {
+entry:
+  %stack = alloca i32, align 4                    ; <i32*> [#uses=2]
+  %stackptr = alloca i32*, align 4                ; <i32*> [#uses=2]
+  store i32 1, i32* %stack, align 4
+  store i32 * %stack, i32** %stackptr, align 4
+  call void @externallyVisible(i32** %stackptr) nounwind ; <i32> [#uses=0]
+  call void @usesGlobalPtr() nounwind
+  ret i32 0
+}

Modified: poolalloc/trunk/test/dsa/td/call1.ll
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/test/dsa/td/call1.ll?rev=116900&r1=116899&r2=116900&view=diff
==============================================================================
--- poolalloc/trunk/test/dsa/td/call1.ll (original)
+++ poolalloc/trunk/test/dsa/td/call1.ll Tue Oct 19 20:31:24 2010
@@ -2,24 +2,24 @@
 ;RUN: dsaopt %s -dsa-td -analyze -verify-flags "test:b2:0+HM-I"
 ;RUN: dsaopt %s -dsa-local -analyze -verify-flags "test:a2:0+I"
 ;RUN: dsaopt %s -dsa-td -analyze -verify-flags "test:a2:0+HM-I"
-;RUN: dsaopt %s -dsa-local -analyze -verify-flags "test:a2+IMRE"
+;RUN: dsaopt %s -dsa-local -analyze -verify-flags "test:a2+IMR-E"
 ;RUN: dsaopt %s -dsa-td -analyze -verify-flags "test:a2+SMRE-I"
 
 
 ;RUN: dsaopt %s -dsa-local -analyze -verify-flags "func:a1+SM-IE"
-;RUN: dsaopt %s -dsa-local -analyze -verify-flags "func:a1:0+IE"
+;RUN: dsaopt %s -dsa-local -analyze -verify-flags "func:a1:0+I-E"
 ;RUN: dsaopt %s -dsa-td -analyze -verify-flags "func:a1+SM-IE"
-;RUN: dsaopt %s -dsa-td -analyze -verify-flags "func:a1:0+HME-I"
+;RUN: dsaopt %s -dsa-td -analyze -verify-flags "func:a1:0+HM-EI"
 
 ;RUN: dsaopt %s -dsa-local -analyze -verify-flags "func:b1+SM-IE"
-;RUN: dsaopt %s -dsa-local -analyze -verify-flags "func:b1:0+IE"
+;RUN: dsaopt %s -dsa-local -analyze -verify-flags "func:b1:0+I-E"
 ;RUN: dsaopt %s -dsa-td -analyze -verify-flags "func:b1+SM-IE"
-;RUN: dsaopt %s -dsa-td -analyze -verify-flags "func:b1:0+HME-I"
+;RUN: dsaopt %s -dsa-td -analyze -verify-flags "func:b1:0+HM-EI"
 
 ;RUN: dsaopt %s -dsa-td -analyze -check-same-node=func:mem1,func:mem2
-;RUN: dsaopt %s -dsa-local -analyze -verify-flags "func:mem1:0+HIE"
-;RUN: dsaopt %s -dsa-local -analyze -verify-flags "func:mem2:0+HIE"
-;RUN: dsaopt %s -dsa-td -analyze -verify-flags "func:mem1:0+HME-I"
+;RUN: dsaopt %s -dsa-local -analyze -verify-flags "func:mem1:0+HI-E"
+;RUN: dsaopt %s -dsa-local -analyze -verify-flags "func:mem2:0+HI-E"
+;RUN: dsaopt %s -dsa-td -analyze -verify-flags "func:mem1:0+HM-IE"
 
 ; ModuleID = 'call1.bc'
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"

Modified: poolalloc/trunk/test/dsa/td/call2.ll
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/test/dsa/td/call2.ll?rev=116900&r1=116899&r2=116900&view=diff
==============================================================================
--- poolalloc/trunk/test/dsa/td/call2.ll (original)
+++ poolalloc/trunk/test/dsa/td/call2.ll Tue Oct 19 20:31:24 2010
@@ -2,24 +2,24 @@
 ;RUN: dsaopt %s -dsa-td -analyze -verify-flags "test:b2:0+HM-I"
 ;RUN: dsaopt %s -dsa-local -analyze -verify-flags "test:a2:0+I"
 ;RUN: dsaopt %s -dsa-td -analyze -verify-flags "test:a2:0+HM-I"
-;RUN: dsaopt %s -dsa-local -analyze -verify-flags "test:a2+IMRE"
+;RUN: dsaopt %s -dsa-local -analyze -verify-flags "test:a2+IMR-E"
 ;RUN: dsaopt %s -dsa-td -analyze -verify-flags "test:a2+SMRE-I"
 
 
 ;RUN: dsaopt %s -dsa-local -analyze -verify-flags "func:a1+SM-IE"
-;RUN: dsaopt %s -dsa-local -analyze -verify-flags "func:a1:0+IE"
-;RUN: dsaopt %s -dsa-td -analyze -verify-flags "func:a1+SM-IE"
-;RUN: dsaopt %s -dsa-td -analyze -verify-flags "func:a1:0+HME-I"
+;RUN: dsaopt %s -dsa-local -analyze -verify-flags "func:a1:0+I-E"
+;RUN: dsaopt %s -dsa-td -analyze -verify-flags "func:a1+SM-I-E"
+;RUN: dsaopt %s -dsa-td -analyze -verify-flags "func:a1:0+HM-IE"
 
 ;RUN: dsaopt %s -dsa-local -analyze -verify-flags "func:b1+SM-IE"
-;RUN: dsaopt %s -dsa-local -analyze -verify-flags "func:b1:0+IE"
+;RUN: dsaopt %s -dsa-local -analyze -verify-flags "func:b1:0+I-E"
 ;RUN: dsaopt %s -dsa-td -analyze -verify-flags "func:b1+SM-IE"
-;RUN: dsaopt %s -dsa-td -analyze -verify-flags "func:b1:0+HME-I"
+;RUN: dsaopt %s -dsa-td -analyze -verify-flags "func:b1:0+HM-IE"
 
 ;RUN: dsaopt %s -dsa-td -analyze -check-same-node=func:mem1,func:mem2
-;RUN: dsaopt %s -dsa-local -analyze -verify-flags "func:mem1:0+HIE"
-;RUN: dsaopt %s -dsa-local -analyze -verify-flags "func:mem2:0+HIE"
-;RUN: dsaopt %s -dsa-td -analyze -verify-flags "func:mem1:0+HME-I"
+;RUN: dsaopt %s -dsa-local -analyze -verify-flags "func:mem1:0+HI-E"
+;RUN: dsaopt %s -dsa-local -analyze -verify-flags "func:mem2:0+HI-E"
+;RUN: dsaopt %s -dsa-td -analyze -verify-flags "func:mem1:0+HM-IE"
 
 ; ModuleID = 'call2.bc'
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"

Modified: poolalloc/trunk/test/dsa/td/params.ll
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/test/dsa/td/params.ll?rev=116900&r1=116899&r2=116900&view=diff
==============================================================================
--- poolalloc/trunk/test/dsa/td/params.ll (original)
+++ poolalloc/trunk/test/dsa/td/params.ll Tue Oct 19 20:31:24 2010
@@ -17,18 +17,18 @@
 
 ;RUN: dsaopt %s -dsa-td -analyze -check-same-node=func:a1:0,func:b1:0,func:mem2:0,func:mem1:0,func:r1,func:r2
 
-;RUN: dsaopt %s -dsa-local -analyze -verify-flags "test:b2:0+HIRE"
-;RUN: dsaopt %s -dsa-local -analyze -verify-flags "test:a2:0+HIRE"
-;RUN: dsaopt %s -dsa-local -analyze -verify-flags "test:a2+SIMRE"
-;RUN: dsaopt %s -dsa-local -analyze -verify-flags "test:temp:0+HIRE"
-;RUN: dsaopt %s -dsa-local -analyze -verify-flags "test:temp1:0+HIRE"
+;RUN: dsaopt %s -dsa-local -analyze -verify-flags "test:b2:0+HIR-E"
+;RUN: dsaopt %s -dsa-local -analyze -verify-flags "test:a2:0+HIR-E"
+;RUN: dsaopt %s -dsa-local -analyze -verify-flags "test:a2+SIMR-E"
+;RUN: dsaopt %s -dsa-local -analyze -verify-flags "test:temp:0+HIR-E"
+;RUN: dsaopt %s -dsa-local -analyze -verify-flags "test:temp1:0+HIR-E"
 ;RUN: dsaopt %s -dsa-local -analyze -check-same-node=test:temp2:0,test:a2:0,test:temp1:0,test:temp:0,test:b2:0
 
-;RUN: dsaopt %s -dsa-bu -analyze -verify-flags "test:b2:0+HIMRE"
-;RUN: dsaopt %s -dsa-bu -analyze -verify-flags "test:a2:0+HIMRE"
-;RUN: dsaopt %s -dsa-bu -analyze -verify-flags "test:a2+SIMRE"
-;RUN: dsaopt %s -dsa-bu -analyze -verify-flags "test:temp+SMR-E,test:temp:0+E"
-;RUN: dsaopt %s -dsa-bu -analyze -verify-flags "test:temp1+SMR-E,test:temp1:0+E"
+;RUN: dsaopt %s -dsa-bu -analyze -verify-flags "test:b2:0+HIMR-E"
+;RUN: dsaopt %s -dsa-bu -analyze -verify-flags "test:a2:0+HIMR-E"
+;RUN: dsaopt %s -dsa-bu -analyze -verify-flags "test:a2+SIMR-E"
+;RUN: dsaopt %s -dsa-bu -analyze -verify-flags "test:temp+SMR-IE,test:temp:0+I-E"
+;RUN: dsaopt %s -dsa-bu -analyze -verify-flags "test:temp1+SMR-IE,test:temp1:0+I-E"
 ;RUN: dsaopt %s -dsa-bu -analyze -check-same-node=test:temp2:0,test:a2:0,test:temp1:0,test:temp:0,test:b2:0
 ;RUN: dsaopt %s -dsa-bu -analyze -check-same-node=test:a2,test:temp2
 

Modified: poolalloc/trunk/test/dsa/td/params1.ll
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/test/dsa/td/params1.ll?rev=116900&r1=116899&r2=116900&view=diff
==============================================================================
--- poolalloc/trunk/test/dsa/td/params1.ll (original)
+++ poolalloc/trunk/test/dsa/td/params1.ll Tue Oct 19 20:31:24 2010
@@ -1,10 +1,10 @@
 ;RUN: dsaopt %s -dsa-local -analyze -check-same-node=initialize:temp:0,initialize:arr:0
-;RUN: dsaopt %s -dsa-local -analyze -verify-flags "initialize:temp:0+IRE"
-;RUN: dsaopt %s -dsa-local -analyze -verify-flags "initialize:arr+IRE"
+;RUN: dsaopt %s -dsa-local -analyze -verify-flags "initialize:temp:0+IR-E"
+;RUN: dsaopt %s -dsa-local -analyze -verify-flags "initialize:arr+IR-E"
 
 ;RUN: dsaopt %s -dsa-bu -analyze -check-same-node=initialize:temp:0,initialize:arr:0
-;RUN: dsaopt %s -dsa-bu -analyze -verify-flags "initialize:temp:0+IRE"
-;RUN: dsaopt %s -dsa-bu -analyze -verify-flags "initialize:arr+IRE"
+;RUN: dsaopt %s -dsa-bu -analyze -verify-flags "initialize:temp:0+IR-E"
+;RUN: dsaopt %s -dsa-bu -analyze -verify-flags "initialize:arr+IR-E"
 
 ;RUN: dsaopt %s -dsa-td -analyze -check-same-node=initialize:temp:0,initialize:arr:0
 ;RUN: dsaopt %s -dsa-td -analyze -verify-flags "initialize:temp:0+HMRE-I"

Modified: poolalloc/trunk/test/dsa/td/recur.ll
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/test/dsa/td/recur.ll?rev=116900&r1=116899&r2=116900&view=diff
==============================================================================
--- poolalloc/trunk/test/dsa/td/recur.ll (original)
+++ poolalloc/trunk/test/dsa/td/recur.ll Tue Oct 19 20:31:24 2010
@@ -1,4 +1,7 @@
-;RUN: dsaopt %s -dsa-local -analyze -verify-flags "test:b2:0+HIE"
+; b2 isn't exposed to external in any code we look at, but at the end of td
+; we mark it external because there exists a (potential) caller context
+; (externally) in which b2 would be external.
+;RUN: dsaopt %s -dsa-local -analyze -verify-flags "test:b2:0+HI-E"
 ;RUN: dsaopt %s -dsa-td -analyze -verify-flags "test:b2:0+HME-I"
 
 ; ModuleID = 'recur.bc'



From wdietz2 at illinois.edu  Tue Oct 19 20:34:01 2010
From: wdietz2 at illinois.edu (Will Dietz)
Date: Wed, 20 Oct 2010 01:34:01 -0000
Subject: [llvm-commits] [poolalloc] r116902 - in /poolalloc/trunk:
 include/dsa/DSGraph.h lib/DSA/BottomUpClosure.cpp lib/DSA/DSGraph.cpp
 lib/DSA/Local.cpp lib/DSA/StdLibPass.cpp lib/DSA/TopDownClosure.cpp
Message-ID: <20101020013401.832F32A6C12C@llvm.org>

Author: wdietz2
Date: Tue Oct 19 20:34:01 2010
New Revision: 116902

URL: http://llvm.org/viewvc/llvm-project?rev=116902&view=rev
Log:
Mark things External instead of Incomplete,
also handles a number of additional sources of external.

Modified:
    poolalloc/trunk/include/dsa/DSGraph.h
    poolalloc/trunk/lib/DSA/BottomUpClosure.cpp
    poolalloc/trunk/lib/DSA/DSGraph.cpp
    poolalloc/trunk/lib/DSA/Local.cpp
    poolalloc/trunk/lib/DSA/StdLibPass.cpp
    poolalloc/trunk/lib/DSA/TopDownClosure.cpp

Modified: poolalloc/trunk/include/dsa/DSGraph.h
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/dsa/DSGraph.h?rev=116902&r1=116901&r2=116902&view=diff
==============================================================================
--- poolalloc/trunk/include/dsa/DSGraph.h (original)
+++ poolalloc/trunk/include/dsa/DSGraph.h Tue Oct 19 20:34:01 2010
@@ -507,13 +507,14 @@
   };
   void markIncompleteNodes(unsigned Flags);
 
-  // recalculateExternalNodes - Clear the external flag on all nodes,
-  // then traverse the graph, identifying nodes that may be
-  // exposed to external code.  The sources of this happening are:
-  // --Arguments and return values for external functions
-  // --Arguments and return values for externally visible functions
-  // --Externally visible globals
-  void recalculateExternalNodes(void);
+  // Mark all reachable from external as external. 
+  enum ComputeExternalFlags {
+    MarkFormalsExternal = 1, DontMarkFormalsExternal = 0,
+    ProcessCallSites = 2, IgnoreCallSites = 0,
+    ResetExternal = 4, DontResetExternal = 0,
+    MarkGlobalsReachableFromFormals = 8, IgnoreGlobalsReachableFromFormals = 0
+  };
+  void computeExternalFlags(unsigned Flags);
 
   // removeDeadNodes - Use a reachability analysis to eliminate subgraphs that
   // are unreachable.  This often occurs because the data structure doesn't

Modified: poolalloc/trunk/lib/DSA/BottomUpClosure.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/BottomUpClosure.cpp?rev=116902&r1=116901&r2=116902&view=diff
==============================================================================
--- poolalloc/trunk/lib/DSA/BottomUpClosure.cpp (original)
+++ poolalloc/trunk/lib/DSA/BottomUpClosure.cpp Tue Oct 19 20:34:01 2010
@@ -133,6 +133,7 @@
 
   // Mark external globals incomplete.
   GlobalsGraph->markIncompleteNodes(DSGraph::IgnoreGlobals);
+  GlobalsGraph->computeExternalFlags(DSGraph::DontMarkFormalsExternal);
 
   //
   // Create equivalence classes for aliasing globals so that we only need to
@@ -151,7 +152,7 @@
       Graph->maskIncompleteMarkers();
       Graph->markIncompleteNodes(DSGraph::MarkFormalArgs |
                                    DSGraph::IgnoreGlobals);
-      
+      Graph->computeExternalFlags(DSGraph::DontMarkFormalsExternal);
     }
   }
 
@@ -163,7 +164,7 @@
   //
   callgraph.buildSCCs();
   callgraph.buildRoots();
-  
+
   return false;
 }
 
@@ -746,7 +747,7 @@
         std::sort(NodeCallees.begin(), NodeCallees.end());
         eraseCS = std::includes(CalledFuncs.begin(), CalledFuncs.end(),
                                 NodeCallees.begin(), NodeCallees.end());
-      } 
+      }
 
       //
       // Update the statistics on resolved indirect function calls.
@@ -794,7 +795,7 @@
   // Recompute the Incomplete markers
   Graph->maskIncompleteMarkers();
   Graph->markIncompleteNodes(DSGraph::MarkFormalArgs);
-
+  Graph->computeExternalFlags(DSGraph::DontMarkFormalsExternal);
   
   //
   // Update the callgraph with the new information that we have gleaned.

Modified: poolalloc/trunk/lib/DSA/DSGraph.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/DSGraph.cpp?rev=116902&r1=116901&r2=116902&view=diff
==============================================================================
--- poolalloc/trunk/lib/DSA/DSGraph.cpp (original)
+++ poolalloc/trunk/lib/DSA/DSGraph.cpp Tue Oct 19 20:34:01 2010
@@ -648,18 +648,6 @@
            E = AuxFunctionCalls.end(); I != E; ++I)
       markIncomplete(*I);
 
-  // Mark stuff passed into external functions as being incomplete.
-  // External functions may not appear in Aux during td, so process
-  // them specially
-#if 0
-  for (std::list<DSCallSite>::iterator I = FunctionCalls.begin(),
-         E = FunctionCalls.end(); I != E; ++I)
-    if(I->isDirectCall() && I->getCalleeFunc()->isDeclaration())
-      markIncomplete(*I);
-#endif
-  // Handle all sources of external
-  recalculateExternalNodes();
-
   // Mark all global nodes as incomplete.
   for (DSScalarMap::global_iterator I = ScalarMap.global_begin(),
          E = ScalarMap.global_end(); I != E; ++I)
@@ -676,104 +664,182 @@
   }
 }
 
-static void markExternalNode(DSNode *N) {
-  // Stop recursion if no node, or if node already marked...
-  if (N == 0 || N->isExternalNode()) return;
+// markExternalNode -- Marks the specified node, and all that's reachable from it,
+// as external.  Uses 'processedNodes' to track recursion.
+static void markExternalNode(DSNode *N, svset<DSNode *> & processedNodes) {
+  // Stop recursion if no node, or if node already processed
+  if (N == 0 || processedNodes.count(N) ) return;
+
+  processedNodes.insert(N);
 
   // Actually mark the node
   N->setExternalMarker();
-
-  // External also means incomplete
-  N->setIncompleteMarker();
   
   // FIXME: Should we 'collapse' the node as well?
 
   // Recursively process children...
   for (DSNode::edge_iterator ii = N->edge_begin(), ee = N->edge_end();
        ii != ee; ++ii)
-    markExternalNode(ii->second.getNode());
+    markExternalNode(ii->second.getNode(), processedNodes);
 }
 
-static void markExternal(DSCallSite &Call) {
-  markExternalNode(Call.getRetVal().getNode());
+// markExternal --marks the specified callsite external, using 'processedNodes' to track recursion.
+// Additionally, we set the externFuncMarker as appropriate.
+static void markExternal(const DSCallSite &Call, svset<DSNode *> & processedNodes) {
+  markExternalNode(Call.getRetVal().getNode(), processedNodes);
 
-  markExternalNode(Call.getVAVal().getNode());
+  markExternalNode(Call.getVAVal().getNode(), processedNodes);
 
-  // All objects pointed to by function arguments are incomplete!
+  // Mark all pointer arguments...
   for (unsigned i = 0, e = Call.getNumPtrArgs(); i != e; ++i)
-    markExternalNode(Call.getPtrArg(i).getNode());
+    markExternalNode(Call.getPtrArg(i).getNode(), processedNodes);
+
+  // Set the flag indicating this fptr contains external functions.
+  // FIXME: As far as I can tell, we don't actually set this anywhere else,
+  // and I haven't given much thought to where it's appropriate to do so.
+  // For now, setting it because it's not wrong and clearly a step forward
+  // but want to make it clear that I don't claim that this is now set
+  // properly everywhere the way it should.
+  if (Call.isIndirectCall()) {
+    Call.getCalleeNode()->setExternFuncMarker();
+  }
 }
 
-// recalculateExternalNodes - Clear the external flag on all nodes,
-// then traverse the graph, identifying nodes that may be
-// exposed to external code.  The sources of this happening are:
-// --Arguments and return values for external functions
-// --Arguments and return values for externally visible functions
-// --Externally visible globals
-void DSGraph::recalculateExternalNodes() {
-
-  // Clear the external flag (we use it as marker for recursion)
-  maskNodeTypes(~DSNode::ExternalNode);
-
-  // Process all CallSites that call functions influenced by external code
-  for (std::list<DSCallSite>::iterator I = FunctionCalls.begin(),
-         E = FunctionCalls.end(); I != E; ++I) {
-    bool shouldBeMarkedExternal = false;
-
-    // Figure out what this callsite calls...
-    std::vector<const Function *> Functions;
-    if (I->isDirectCall())
-      Functions.push_back(I->getCalleeFunc());
-    else
-      I->getCalleeNode()->addFullFunctionList(Functions);
+// propagateExternal -- Walk the given DSGraph making sure that within this graph
+// everything reachable from an already-external node is also marked External.
+static void propagateExternal(DSGraph * G, svset<DSNode *> & processedNodes) {
+  DSGraph::node_iterator I = G->node_begin(),
+                         E = G->node_end();
+  for ( ; I != E; ++I ) {
+    if (I->isExternalNode())
+      markExternalNode(&*I, processedNodes);
+  }
+}
 
-    // ...And examine each callee:
-    for (std::vector<const Function *>::iterator II = Functions.begin(),
-                                            EE = Functions.end();
-          (II != EE) && !shouldBeMarkedExternal; ++II) {
+// computeExternalFlags -- mark all reachable from external as external
+void DSGraph::computeExternalFlags(unsigned Flags) {
 
-      // Calls to external functions should be marked external
-      shouldBeMarkedExternal |= (*II)->isDeclaration();
-      // Calls to code that is externally visible should be marked
-      // external.  This might be overkill due to unification and the
-      // various passes propagating this information,
-      // but for now we /ensure/ the flags are set correctly.
-      shouldBeMarkedExternal |= !(*II)->hasInternalLinkage();
-    }
-
-    if (shouldBeMarkedExternal) {
-      markExternal(*I);
+  svset<DSNode *> processedNodes;
+
+  // Reset if indicated
+  if (Flags & ResetExternal) {
+    maskNodeTypes(~DSNode::ExternalNode);
+  }
+
+  if (Flags & MarkGlobalsReachableFromFormals) {
+    DenseSet<const DSNode*> ReachableFromFormals;
+    for (ReturnNodesTy::iterator FI = ReturnNodes.begin(), E = ReturnNodes.end();
+        FI != E; ++FI) {
+      const Function &F = *FI->first;
+      // Find all reachable from arguments...
+      for (Function::const_arg_iterator I = F.arg_begin(), E = F.arg_end();
+          I != E; ++I)
+        if (isa<PointerType>(I->getType())) {
+          DSNode * N = getNodeForValue(I).getNode();
+          if (N) N->markReachableNodes(ReachableFromFormals);
+        }
+      // ...and the return value...
+      if (!FI->second.isNull())
+        FI->second.getNode()->markReachableNodes(ReachableFromFormals);
+      if (!getVANodeFor(F).isNull())
+        getVANodeFor(F).getNode()->markReachableNodes(ReachableFromFormals);
+    }
+
+    DenseSet<const DSNode*> ReachableFromGlobals;
+
+    for (DSScalarMap::global_iterator I = ScalarMap.global_begin(),
+        E = ScalarMap.global_end(); I != E; ++I) {
+      DSNode * N = getNodeForValue(*I).getNode();
+      if (N) N->markReachableNodes(ReachableFromGlobals);
+    }
+
+    // Find intersection of the two...
+    // FIXME: This works fine for local, but what about in other places where we might newly
+    // discover that something reachable from an externally visible function's argument is
+    // also reachable from a global and as such should be marked external in all graphs
+    // that use it?
+    for (DenseSet<const DSNode*>::iterator I = ReachableFromFormals.begin(),
+         E = ReachableFromFormals.end(); I != E; ++I) {
+      DSNode * N = (DSNode *)*I;
+      if (ReachableFromGlobals.count(N)) {
+        // Reachable from both a global and the formals, mark external!
+        markExternalNode(N, processedNodes);
+      }
     }
   }
 
-  // Additionally, look at each *function* that is external-related
-  // and set the External flag for its arguments and return value.
-  for (ReturnNodesTy::iterator FI = ReturnNodes.begin(), E =ReturnNodes.end();
-      FI != E; ++FI) {
-    const Function &F = *FI->first;
-    // If this function is potentially influenced by external code...
-    if (!F.hasInternalLinkage() || F.isDeclaration()) {
+  // Make sure that everything reachable from something already external is also external
+  propagateExternal(this, processedNodes);
+
+  // If requested, we mark all functions (their formals) in this
+  // graph (read: SCC) as external.
+  if (Flags & MarkFormalsExternal) {
+    for (ReturnNodesTy::iterator FI = ReturnNodes.begin(), E =ReturnNodes.end();
+        FI != E; ++FI) {
+      const Function &F = *FI->first;
       // Mark its arguments, return value (and vanode) as external.
       for (Function::const_arg_iterator I = F.arg_begin(), E = F.arg_end();
           I != E; ++I)
         if (isa<PointerType>(I->getType()))
-          markExternalNode(getNodeForValue(I).getNode());
-      markExternalNode(FI->second.getNode());
-      markExternalNode(getVANodeFor(F).getNode());
+          markExternalNode(getNodeForValue(I).getNode(), processedNodes);
+      markExternalNode(FI->second.getNode(), processedNodes);
+      markExternalNode(getVANodeFor(F).getNode(), processedNodes);
+    }
+  }
+
+  // If requested, look for callsites to external functions and make
+  // sure that they're marked external as appropriate.
+  if (Flags & ProcessCallSites) {
+    // Get List of all callsites, resolved or not...
+    std::list<DSCallSite> AllCalls;
+    AllCalls.insert(AllCalls.begin(), fc_begin(), fc_end());
+    AllCalls.insert(AllCalls.begin(), afc_begin(), afc_end());
+
+    // ...and use that list to find all CallSites that call external functions
+    // and mark them accordingly.
+    for (std::list<DSCallSite>::iterator I = AllCalls.begin(),
+        E = AllCalls.end(); I != E; ++I) {
+      bool shouldBeMarkedExternal = false;
+
+      // Figure out what this callsite calls...
+      std::vector<const Function *> Functions;
+      if (I->isDirectCall())
+        Functions.push_back(I->getCalleeFunc());
+      else
+        I->getCalleeNode()->addFullFunctionList(Functions);
+
+      // ...And examine each callee:
+      for (std::vector<const Function *>::iterator II = Functions.begin(),
+          EE = Functions.end();
+          (II != EE) && !shouldBeMarkedExternal; ++II) {
+
+        // Calls to external functions should be marked external
+        shouldBeMarkedExternal |= (*II)->isDeclaration();
+      }
+
+      // If this callsite can call external code, it better be the case that the pointer arguments
+      // and the return values are all marked external (and what's reachable from them)
+      if (shouldBeMarkedExternal) {
+        markExternal(*I, processedNodes);
+      }
     }
   }
 
-  // Now handle all external globals...
+  // Finally handle all external globals...
   for (DSScalarMap::global_iterator I = ScalarMap.global_begin(),
-         E = ScalarMap.global_end(); I != E; ++I)
+      E = ScalarMap.global_end(); I != E; ++I)
     if (const GlobalVariable *GV = dyn_cast<GlobalVariable>(*I)) {
       // If the global is external... mark it as such!
       // FIXME: It's unclear to me that a global we initialize
-      // can't be externally visible.  For now preserving original
-      // behavior (and additionally marking external as well as incomplete).
-      if (!GV->hasInitializer())
-        markExternalNode(ScalarMap[GV].getNode());
+      // can't be externally visible.  For now following original
+      // behavior and marking external.
+      DSNode * N = ScalarMap[GV].getNode();
+      if (!GV->hasInitializer() || N->isExternalNode())
+        markExternalNode(N, processedNodes);
     }
+
+  // FIXME: Sync with globals graph?
+  // For now, trust the caller to do this as appropriate.
 }
 
 static inline void killIfUselessEdge(DSNodeHandle &Edge) {

Modified: poolalloc/trunk/lib/DSA/Local.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/Local.cpp?rev=116902&r1=116901&r2=116902&view=diff
==============================================================================
--- poolalloc/trunk/lib/DSA/Local.cpp (original)
+++ poolalloc/trunk/lib/DSA/Local.cpp Tue Oct 19 20:34:01 2010
@@ -159,10 +159,18 @@
       for (Function::arg_iterator I = f.arg_begin(), E = f.arg_end();
            I != E; ++I) {
         if (isa<PointerType>(I->getType())) {
+          // WD: Why do we set the external marker so early in the analysis?
+          // Functions we have definitions for, but are externally reachable have no external contexts
+          // that we'd want to BU external information into (since those contexts are by definition
+          // ones we don't have code for).  Shouldn't this just be set in TD?
+#if 0
           DSNode * Node = getValueDest(I).getNode();
 
           if (!f.hasInternalLinkage())
             Node->setExternalMarker();
+#else
+          getValueDest(I).getNode();
+#endif
 
         }
       }
@@ -194,7 +202,19 @@
       }
 
       g.markIncompleteNodes(DSGraph::MarkFormalArgs);
-      
+
+      // Compute sources of external
+      unsigned EFlags = 0
+        | DSGraph::DontMarkFormalsExternal
+        | DSGraph::ProcessCallSites;
+      // Mark globals reachable from formals as external if we don't have
+      // internal linkage.
+      if (!f.hasInternalLinkage()) {
+        EFlags |= DSGraph::MarkGlobalsReachableFromFormals;
+      }
+
+      g.computeExternalFlags(EFlags);
+
       // Remove any nodes made dead due to merging...
       g.removeDeadNodes(DSGraph::KeepUnreachableGlobals);
     }
@@ -1236,6 +1256,7 @@
 
   GlobalsGraph->removeTriviallyDeadNodes();
   GlobalsGraph->markIncompleteNodes(DSGraph::MarkFormalArgs);
+  GlobalsGraph->computeExternalFlags(DSGraph::ProcessCallSites);
 
   // Now that we've computed all of the graphs, and merged all of the info into
   // the globals graph, see if we have further constrained the globals in the

Modified: poolalloc/trunk/lib/DSA/StdLibPass.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/StdLibPass.cpp?rev=116902&r1=116901&r2=116902&view=diff
==============================================================================
--- poolalloc/trunk/lib/DSA/StdLibPass.cpp (original)
+++ poolalloc/trunk/lib/DSA/StdLibPass.cpp Tue Oct 19 20:34:01 2010
@@ -388,7 +388,7 @@
         //
         eraseCallsTo(F);
       }
-  
+
   //
   // Merge return values and checked pointer values for SAFECode run-time
   // checks.
@@ -397,5 +397,22 @@
   processRuntimeCheck (M, "sc.boundscheckui");
   processRuntimeCheck (M, "sc.exactcheck2");
 
+  // In Local we marked nodes passed to/returned from 'StdLib' functions as External, because at
+  // that point they were.  However they no longer are necessarily so, and we need to update accordingly.
+  GlobalsGraph->computeExternalFlags(DSGraph::ResetExternal);
+  for (Module::iterator I = M.begin(), E = M.end(); I != E; ++I)
+    if (!I->isDeclaration()) {
+      DSGraph * G = getDSGraph(*I);
+      unsigned EFlags = 0
+        | DSGraph::ResetExternal
+        | DSGraph::DontMarkFormalsExternal
+        | DSGraph::ProcessCallSites;
+      if (!I->hasInternalLinkage()) {
+        EFlags |= DSGraph::MarkGlobalsReachableFromFormals;
+      }
+      G->computeExternalFlags(EFlags);
+    }
+  GlobalsGraph->computeExternalFlags(DSGraph::ProcessCallSites);
+
   return false;
 }

Modified: poolalloc/trunk/lib/DSA/TopDownClosure.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/TopDownClosure.cpp?rev=116902&r1=116901&r2=116902&view=diff
==============================================================================
--- poolalloc/trunk/lib/DSA/TopDownClosure.cpp (original)
+++ poolalloc/trunk/lib/DSA/TopDownClosure.cpp Tue Oct 19 20:34:01 2010
@@ -89,7 +89,8 @@
   for (DSScalarMap::global_iterator I=GGSM.global_begin(), E=GGSM.global_end();
        I != E; ++I) {
     DSNode *N = GGSM.find(*I)->second.getNode();
-    if (N->isIncompleteNode())
+    if (N->isIncompleteNode()) assert(N->isExternalNode());
+    if (N->isIncompleteNode() || N->isExternalNode())
       markReachableFunctionsExternallyAccessible(N, Visited);
   }
 
@@ -150,6 +151,7 @@
 
   ArgsRemainIncomplete.clear();
   GlobalsGraph->removeTriviallyDeadNodes();
+  GlobalsGraph->computeExternalFlags(DSGraph::DontMarkFormalsExternal);
 
   // CBU contains the correct call graph.
   // Restore it, so that subsequent passes and clients can get it.
@@ -274,10 +276,16 @@
     }
 
   // Recompute the Incomplete markers.  Depends on whether args are complete
-  unsigned Flags
-    = HasIncompleteArgs ? DSGraph::MarkFormalArgs : DSGraph::IgnoreFormalArgs;
-  Flags |= DSGraph::IgnoreGlobals | DSGraph::MarkVAStart;
-  DSG->markIncompleteNodes(Flags);
+  unsigned IncFlags = DSGraph::IgnoreFormalArgs;
+  IncFlags |= DSGraph::IgnoreGlobals | DSGraph::MarkVAStart;
+  DSG->markIncompleteNodes(IncFlags);
+
+  // If this graph contains functions that are externally callable, now is the time to mark
+  // their arguments and return values as external.  At this point TD is inlining all caller information,
+  // and that means External callers too.
+  unsigned ExtFlags
+    = HasIncompleteArgs ? DSGraph::MarkFormalsExternal : DSGraph::DontMarkFormalsExternal;
+  DSG->computeExternalFlags(ExtFlags);
 
   //
   // Delete dead nodes.  Treat globals that are unreachable as dead also.



From dgregor at apple.com  Tue Oct 19 20:36:56 2010
From: dgregor at apple.com (Douglas Gregor)
Date: Wed, 20 Oct 2010 01:36:56 -0000
Subject: [llvm-commits] [llvm] r116903 -
	/llvm/trunk/lib/Analysis/CMakeLists.txt
Message-ID: <20101020013656.5C4052A6C12C@llvm.org>

Author: dgregor
Date: Tue Oct 19 20:36:56 2010
New Revision: 116903

URL: http://llvm.org/viewvc/llvm-project?rev=116903&view=rev
Log:
Fix CMake build

Modified:
    llvm/trunk/lib/Analysis/CMakeLists.txt

Modified: llvm/trunk/lib/Analysis/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/CMakeLists.txt?rev=116903&r1=116902&r2=116903&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/CMakeLists.txt (original)
+++ llvm/trunk/lib/Analysis/CMakeLists.txt Tue Oct 19 20:36:56 2010
@@ -31,6 +31,7 @@
   MemoryBuiltins.cpp
   MemoryDependenceAnalysis.cpp
   ModuleDebugInfoPrinter.cpp
+  NoAliasAnalysis.cpp
   PHITransAddr.cpp
   PostDominators.cpp
   ProfileEstimatorPass.cpp



From grosser at fim.uni-passau.de  Tue Oct 19 20:54:44 2010
From: grosser at fim.uni-passau.de (Tobias Grosser)
Date: Wed, 20 Oct 2010 01:54:44 -0000
Subject: [llvm-commits] [llvm] r116905 - in /llvm/trunk:
 docs/WritingAnLLVMPass.html include/llvm/Analysis/RegionPass.h
 include/llvm/Pass.h include/llvm/PassManagers.h lib/Analysis/CMakeLists.txt
 lib/Analysis/RegionPass.cpp lib/VMCore/PassManager.cpp tools/opt/opt.cpp
Message-ID: <20101020015445.28DA62A6C12C@llvm.org>

Author: grosser
Date: Tue Oct 19 20:54:44 2010
New Revision: 116905

URL: http://llvm.org/viewvc/llvm-project?rev=116905&view=rev
Log:
Add RegionPass support.

A RegionPass is executed like a LoopPass but on the regions detected by the
RegionInfo pass instead of the loops detected by the LoopInfo pass.

Added:
    llvm/trunk/include/llvm/Analysis/RegionPass.h
    llvm/trunk/lib/Analysis/RegionPass.cpp
Modified:
    llvm/trunk/docs/WritingAnLLVMPass.html
    llvm/trunk/include/llvm/Pass.h
    llvm/trunk/include/llvm/PassManagers.h
    llvm/trunk/lib/Analysis/CMakeLists.txt
    llvm/trunk/lib/VMCore/PassManager.cpp
    llvm/trunk/tools/opt/opt.cpp

Modified: llvm/trunk/docs/WritingAnLLVMPass.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/WritingAnLLVMPass.html?rev=116905&r1=116904&r2=116905&view=diff
==============================================================================
--- llvm/trunk/docs/WritingAnLLVMPass.html (original)
+++ llvm/trunk/docs/WritingAnLLVMPass.html Tue Oct 19 20:54:44 2010
@@ -51,6 +51,14 @@
         <li><a href="#doFinalization_loop">The <tt>doFinalization()
                                             </tt> method</a></li>
         </ul></li>
+     <li><a href="#RegionPass">The <tt>RegionPass</tt> class</a>
+        <ul>
+        <li><a href="#doInitialization_region">The <tt>doInitialization(Region *,
+                                            RGPassManager &amp;)</tt> method</a></li>
+        <li><a href="#runOnRegion">The <tt>runOnRegion</tt> method</a></li>
+        <li><a href="#doFinalization_region">The <tt>doFinalization()
+                                            </tt> method</a></li>
+        </ul></li>
      <li><a href="#BasicBlockPass">The <tt>BasicBlockPass</tt> class</a>
         <ul>
         <li><a href="#doInitialization_fn">The <tt>doInitialization(Function
@@ -134,6 +142,7 @@
 href="#CallGraphSCCPass">CallGraphSCCPass</a></tt>, <tt><a
 href="#FunctionPass">FunctionPass</a></tt>, or <tt><a
 href="#LoopPass">LoopPass</a></tt>, or <tt><a
+href="#RegionPass">RegionPass</a></tt>, or <tt><a
 href="#BasicBlockPass">BasicBlockPass</a></tt> classes, which gives the system
 more information about what your pass does, and how it can be combined with
 other passes.  One of the main features of the LLVM Pass Framework is that it
@@ -805,6 +814,84 @@
 
 </div>
 
+<!-- ======================================================================= -->
+<div class="doc_subsection">
+  <a name="RegionPass">The <tt>RegionPass</tt> class </a>
+</div>
+
+<div class="doc_text">
+
+<p> <tt>RegionPass</tt> is similar to <a href="#LoopPass"><tt>LoopPass</tt></a>,
+but executes on each single entry single exit region in the function.
+<tt>RegionPass</tt> processes regions in nested order such that the outer most
+region is processed last.  </p>
+
+<p> <tt>RegionPass</tt> subclasses are allowed to update the region tree by using
+the <tt>RGPassManager</tt> interface. You may overload three virtual methods of
+<tt>RegionPass</tt> to implementing your own region pass is usually. All these
+methods should return true if they modified the program, or false if they didn not.
+</p>
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
+  <a name="doInitialization_region">The <tt>doInitialization(Region *,
+                                                 RGPassManager &amp;)</tt>
+  method</a>
+</div>
+
+<div class="doc_text">
+
+<div class="doc_code"><pre>
+  <b>virtual bool</b> doInitialization(Region *, RGPassManager &amp;RGM);
+</pre></div>
+
+<p>The <tt>doInitialization</tt> method is designed to do simple initialization
+type of stuff that does not depend on the functions being processed.  The
+<tt>doInitialization</tt> method call is not scheduled to overlap with any
+other pass executions (thus it should be very fast). RPPassManager
+interface should be used to access Function or Module level analysis
+information.</p>
+
+</div>
+
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
+  <a name="runOnRegion">The <tt>runOnRegion</tt> method</a>
+</div>
+
+<div class="doc_text">
+
+<div class="doc_code"><pre>
+  <b>virtual bool</b> runOnRegion(Region *, RGPassManager &amp;RGM) = 0;
+</pre></div><p>
+
+<p>The <tt>runOnRegion</tt> method must be implemented by your subclass to do
+the transformation or analysis work of your pass.  As usual, a true value should
+be returned if the region is modified. <tt>RGPassManager</tt> interface
+should be used to update region tree.</p>
+
+</div>
+
+<!-- _______________________________________________________________________ -->
+<div class="doc_subsubsection">
+  <a name="doFinalization_region">The <tt>doFinalization()</tt> method</a>
+</div>
+
+<div class="doc_text">
+
+<div class="doc_code"><pre>
+  <b>virtual bool</b> doFinalization();
+</pre></div>
+
+<p>The <tt>doFinalization</tt> method is an infrequently used method that is
+called when the pass framework has finished calling <a
+href="#runOnRegion"><tt>runOnRegion</tt></a> for every region in the
+program being compiled. </p>
+
+</div>
+
 
 
 <!-- ======================================================================= -->

Added: llvm/trunk/include/llvm/Analysis/RegionPass.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/RegionPass.h?rev=116905&view=auto
==============================================================================
--- llvm/trunk/include/llvm/Analysis/RegionPass.h (added)
+++ llvm/trunk/include/llvm/Analysis/RegionPass.h Tue Oct 19 20:54:44 2010
@@ -0,0 +1,126 @@
+//===- RegionPass.h - RegionPass class ------------------------------------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines the RegionPass class. All region based analysis,
+// optimization and transformation passes are derived from RegionPass.
+// This class is implemented following the some ideas of the LoopPass.h class.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_REGION_PASS_H
+#define LLVM_REGION_PASS_H
+
+#include "llvm/Analysis/RegionInfo.h"
+
+#include "llvm/Pass.h"
+#include "llvm/PassManagers.h"
+#include "llvm/Function.h"
+
+#include <deque>
+
+namespace llvm {
+
+class RGPassManager;
+class Function;
+
+//===----------------------------------------------------------------------===//
+/// @brief A pass that runs on each Region in a function.
+///
+/// RegionPass is managed by RGPassManager.
+class RegionPass : public Pass {
+public:
+  explicit RegionPass(char &pid) : Pass(PT_Region, pid) {}
+
+  //===--------------------------------------------------------------------===//
+  /// @name To be implemented by every RegionPass
+  ///
+  //@{
+  /// @brief Run the pass on a specific Region
+  ///
+  /// Accessing regions not contained in the current region is not allowed.
+  ///
+  /// @param R The region this pass is run on.
+  /// @param RGM The RegionPassManager that manages this Pass.
+  ///
+  /// @return True if the pass modifies this Region.
+  virtual bool runOnRegion(Region *R, RGPassManager &RGM) = 0;
+
+  /// @brief Get a pass to print the LLVM IR in the region.
+  ///
+  /// @param O      The ouput stream to print the Region.
+  /// @param Banner The banner to seperate different printed passes.
+  ///
+  /// @return The pass to print the LLVM IR in the region.
+  Pass *createPrinterPass(raw_ostream &O, const std::string &Banner) const;
+
+  virtual bool doInitialization(Region *R, RGPassManager &RGM) { return false; }
+  virtual bool doFinalization() { return false; }
+  //@}
+
+  //===--------------------------------------------------------------------===//
+  /// @name PassManager API
+  ///
+  //@{
+  void preparePassManager(PMStack &PMS);
+
+  virtual void assignPassManager(PMStack &PMS,
+    PassManagerType PMT = PMT_RegionPassManager);
+
+  virtual PassManagerType getPotentialPassManagerType() const {
+    return PMT_RegionPassManager;
+  }
+  //@}
+};
+
+/// @brief The pass manager to schedule RegionPasses.
+class RGPassManager : public FunctionPass, public PMDataManager {
+  std::deque<Region*> RQ;
+  bool skipThisRegion;
+  bool redoThisRegion;
+  RegionInfo *RI;
+  Region *CurrentRegion;
+
+public:
+  static char ID;
+  explicit RGPassManager(int Depth);
+
+  /// @brief Execute all of the passes scheduled for execution.
+  ///
+  /// @return True if any of the passes modifies the function.
+  bool runOnFunction(Function &F);
+
+  /// Pass Manager itself does not invalidate any analysis info.
+  /// RGPassManager needs RegionInfo.
+  void getAnalysisUsage(AnalysisUsage &Info) const;
+
+  virtual const char *getPassName() const {
+    return "Region Pass Manager";
+  }
+
+  virtual PMDataManager *getAsPMDataManager() { return this; }
+  virtual Pass *getAsPass() { return this; }
+
+  /// @brief Print passes managed by this manager.
+  void dumpPassStructure(unsigned Offset);
+
+  /// @brief Print passes contained by this manager.
+  Pass *getContainedPass(unsigned N) {
+    assert(N < PassVector.size() && "Pass number out of range!");
+    Pass *FP = static_cast<Pass *>(PassVector[N]);
+    return FP;
+  }
+
+  virtual PassManagerType getPassManagerType() const {
+    return PMT_RegionPassManager;
+  }
+};
+
+} // End llvm namespace
+
+#endif

Modified: llvm/trunk/include/llvm/Pass.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Pass.h?rev=116905&r1=116904&r2=116905&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Pass.h (original)
+++ llvm/trunk/include/llvm/Pass.h Tue Oct 19 20:54:44 2010
@@ -57,6 +57,7 @@
   PMT_CallGraphPassManager,  ///< CGPassManager
   PMT_FunctionPassManager,   ///< FPPassManager
   PMT_LoopPassManager,       ///< LPPassManager
+  PMT_RegionPassManager,     ///< RGPassManager
   PMT_BasicBlockPassManager, ///< BBPassManager
   PMT_Last
 };
@@ -64,13 +65,14 @@
 // Different types of passes.
 enum PassKind {
   PT_BasicBlock,
+  PT_Region,
   PT_Loop,
   PT_Function,
   PT_CallGraphSCC,
   PT_Module,
   PT_PassManager
 };
-  
+
 //===----------------------------------------------------------------------===//
 /// Pass interface - Implemented by all 'passes'.  Subclass this if you are an
 /// interprocedural optimization or you do not fit into any of the more

Modified: llvm/trunk/include/llvm/PassManagers.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/PassManagers.h?rev=116905&r1=116904&r2=116905&view=diff
==============================================================================
--- llvm/trunk/include/llvm/PassManagers.h (original)
+++ llvm/trunk/include/llvm/PassManagers.h Tue Oct 19 20:54:44 2010
@@ -106,6 +106,7 @@
   ON_BASICBLOCK_MSG, // "'  on BasicBlock '" + PassName + "'...\n"
   ON_FUNCTION_MSG, // "' on Function '" + FunctionName + "'...\n"
   ON_MODULE_MSG, // "' on Module '" + ModuleName + "'...\n"
+  ON_REGION_MSG, // " 'on Region ...\n'"
   ON_LOOP_MSG, // " 'on Loop ...\n'"
   ON_CG_MSG // "' on Call Graph ...\n'"
 };  

Modified: llvm/trunk/lib/Analysis/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/CMakeLists.txt?rev=116905&r1=116904&r2=116905&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/CMakeLists.txt (original)
+++ llvm/trunk/lib/Analysis/CMakeLists.txt Tue Oct 19 20:54:44 2010
@@ -40,6 +40,7 @@
   ProfileInfoLoaderPass.cpp
   ProfileVerifierPass.cpp
   RegionInfo.cpp
+  RegionPass.cpp
   RegionPrinter.cpp
   ScalarEvolution.cpp
   ScalarEvolutionAliasAnalysis.cpp

Added: llvm/trunk/lib/Analysis/RegionPass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/RegionPass.cpp?rev=116905&view=auto
==============================================================================
--- llvm/trunk/lib/Analysis/RegionPass.cpp (added)
+++ llvm/trunk/lib/Analysis/RegionPass.cpp Tue Oct 19 20:54:44 2010
@@ -0,0 +1,276 @@
+//===- RegionPass.cpp - Region Pass and Region Pass Manager ---------------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file implements RegionPass and RGPassManager. All region optimization
+// and transformation passes are derived from RegionPass. RGPassManager is
+// responsible for managing RegionPasses.
+// most of these codes are COPY from LoopPass.cpp
+//
+//===----------------------------------------------------------------------===//
+#include "llvm/Analysis/RegionPass.h"
+#include "llvm/Analysis/RegionIterator.h"
+#include "llvm/Support/Timer.h"
+
+#define DEBUG_TYPE "regionpassmgr"
+#include "llvm/Support/Debug.h"
+using namespace llvm;
+
+//===----------------------------------------------------------------------===//
+// RGPassManager
+//
+
+char RGPassManager::ID = 0;
+
+RGPassManager::RGPassManager(int Depth)
+  : FunctionPass(ID), PMDataManager(Depth) {
+  skipThisRegion = false;
+  redoThisRegion = false;
+  RI = NULL;
+  CurrentRegion = NULL;
+}
+
+// Recurse through all subregions and all regions  into RQ.
+static void addRegionIntoQueue(Region *R, std::deque<Region *> &RQ) {
+  RQ.push_back(R);
+  for (Region::iterator I = R->begin(), E = R->end(); I != E; ++I)
+    addRegionIntoQueue(*I, RQ);
+}
+
+/// Pass Manager itself does not invalidate any analysis info.
+void RGPassManager::getAnalysisUsage(AnalysisUsage &Info) const {
+  Info.addRequired<RegionInfo>();
+  Info.setPreservesAll();
+}
+
+/// run - Execute all of the passes scheduled for execution.  Keep track of
+/// whether any of the passes modifies the function, and if so, return true.
+bool RGPassManager::runOnFunction(Function &F) {
+  RI = &getAnalysis<RegionInfo>();
+  bool Changed = false;
+
+  // Collect inherited analysis from Module level pass manager.
+  populateInheritedAnalysis(TPM->activeStack);
+
+  addRegionIntoQueue(RI->getTopLevelRegion(), RQ);
+
+  if (RQ.empty()) // No regions, skip calling finalizers
+    return false;
+
+  // Initialization
+  for (std::deque<Region *>::const_iterator I = RQ.begin(), E = RQ.end();
+       I != E; ++I) {
+    Region *R = *I;
+    for (unsigned Index = 0; Index < getNumContainedPasses(); ++Index) {
+      RegionPass *RP = (RegionPass *)getContainedPass(Index);
+      Changed |= RP->doInitialization(R, *this);
+    }
+  }
+
+  // Walk Regions
+  while (!RQ.empty()) {
+
+    CurrentRegion  = RQ.back();
+    skipThisRegion = false;
+    redoThisRegion = false;
+
+    // Run all passes on the current Region.
+    for (unsigned Index = 0; Index < getNumContainedPasses(); ++Index) {
+      RegionPass *P = (RegionPass*)getContainedPass(Index);
+
+      dumpPassInfo(P, EXECUTION_MSG, ON_REGION_MSG,
+                   CurrentRegion->getNameStr());
+      dumpRequiredSet(P);
+
+      initializeAnalysisImpl(P);
+
+      {
+        PassManagerPrettyStackEntry X(P, *CurrentRegion->getEntry());
+
+        TimeRegion PassTimer(getPassTimer(P));
+        Changed |= P->runOnRegion(CurrentRegion, *this);
+      }
+
+      if (Changed)
+        dumpPassInfo(P, MODIFICATION_MSG, ON_REGION_MSG,
+                     skipThisRegion ? "<deleted>" :
+                                    CurrentRegion->getNameStr());
+      dumpPreservedSet(P);
+
+      if (!skipThisRegion) {
+        // Manually check that this region is still healthy. This is done
+        // instead of relying on RegionInfo::verifyRegion since RegionInfo
+        // is a function pass and it's really expensive to verify every
+        // Region in the function every time. That level of checking can be
+        // enabled with the -verify-region-info option.
+        {
+          TimeRegion PassTimer(getPassTimer(P));
+          CurrentRegion->verifyRegion();
+        }
+
+        // Then call the regular verifyAnalysis functions.
+        verifyPreservedAnalysis(P);
+      }
+
+      removeNotPreservedAnalysis(P);
+      recordAvailableAnalysis(P);
+      removeDeadPasses(P,
+                       skipThisRegion ? "<deleted>" :
+                                      CurrentRegion->getNameStr(),
+                       ON_REGION_MSG);
+
+      if (skipThisRegion)
+        // Do not run other passes on this region.
+        break;
+    }
+
+    // If the region was deleted, release all the region passes. This frees up
+    // some memory, and avoids trouble with the pass manager trying to call
+    // verifyAnalysis on them.
+    if (skipThisRegion)
+      for (unsigned Index = 0; Index < getNumContainedPasses(); ++Index) {
+        Pass *P = getContainedPass(Index);
+        freePass(P, "<deleted>", ON_REGION_MSG);
+      }
+
+    // Pop the region from queue after running all passes.
+    RQ.pop_back();
+
+    if (redoThisRegion)
+      RQ.push_back(CurrentRegion);
+
+    // Free all region nodes created in region passes.
+    RI->clearNodeCache();
+  }
+
+  // Finalization
+  for (unsigned Index = 0; Index < getNumContainedPasses(); ++Index) {
+    RegionPass *P = (RegionPass*)getContainedPass(Index);
+    Changed |= P->doFinalization();
+  }
+
+  // Print the region tree after all pass.
+  DEBUG(
+    dbgs() << "\nRegion tree of function " << F.getName()
+           << " after all region Pass:\n";
+    RI->dump();
+    dbgs() << "\n";
+    );
+
+  return Changed;
+}
+
+/// Print passes managed by this manager
+void RGPassManager::dumpPassStructure(unsigned Offset) {
+  errs().indent(Offset*2) << "Region Pass Manager\n";
+  for (unsigned Index = 0; Index < getNumContainedPasses(); ++Index) {
+    Pass *P = getContainedPass(Index);
+    P->dumpPassStructure(Offset + 1);
+    dumpLastUses(P, Offset+1);
+  }
+}
+
+namespace {
+//===----------------------------------------------------------------------===//
+// PrintRegionPass
+class PrintRegionPass : public RegionPass {
+private:
+  std::string Banner;
+  raw_ostream &Out;       // raw_ostream to print on.
+
+public:
+  static char ID;
+  PrintRegionPass() : RegionPass(ID), Out(dbgs()) {}
+  PrintRegionPass(const std::string &B, raw_ostream &o)
+      : RegionPass(ID), Banner(B), Out(o) {}
+
+  virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+    AU.setPreservesAll();
+  }
+
+  virtual bool runOnRegion(Region *R, RGPassManager &RGM) {
+    Out << Banner;
+    for (Region::block_iterator I = R->block_begin(), E = R->block_end();
+         I != E; ++I)
+      (*I)->getEntry()->print(Out);
+
+    return false;
+  }
+};
+
+char PrintRegionPass::ID = 0;
+}  //end anonymous namespace
+
+//===----------------------------------------------------------------------===//
+// RegionPass
+
+// Check if this pass is suitable for the current RGPassManager, if
+// available. This pass P is not suitable for a RGPassManager if P
+// is not preserving higher level analysis info used by other
+// RGPassManager passes. In such case, pop RGPassManager from the
+// stack. This will force assignPassManager() to create new
+// LPPassManger as expected.
+void RegionPass::preparePassManager(PMStack &PMS) {
+
+  // Find RGPassManager
+  while (!PMS.empty() &&
+         PMS.top()->getPassManagerType() > PMT_RegionPassManager)
+    PMS.pop();
+
+
+  // If this pass is destroying high level information that is used
+  // by other passes that are managed by LPM then do not insert
+  // this pass in current LPM. Use new RGPassManager.
+  if (PMS.top()->getPassManagerType() == PMT_RegionPassManager &&
+    !PMS.top()->preserveHigherLevelAnalysis(this))
+    PMS.pop();
+}
+
+/// Assign pass manager to manage this pass.
+void RegionPass::assignPassManager(PMStack &PMS,
+                                 PassManagerType PreferredType) {
+  // Find RGPassManager
+  while (!PMS.empty() &&
+         PMS.top()->getPassManagerType() > PMT_RegionPassManager)
+    PMS.pop();
+
+  RGPassManager *RGPM;
+
+  // Create new Region Pass Manager if it does not exist.
+  if (PMS.top()->getPassManagerType() == PMT_RegionPassManager)
+    RGPM = (RGPassManager*)PMS.top();
+  else {
+
+    assert (!PMS.empty() && "Unable to create Region Pass Manager");
+    PMDataManager *PMD = PMS.top();
+
+    // [1] Create new Call Graph Pass Manager
+    RGPM = new RGPassManager(PMD->getDepth() + 1);
+    RGPM->populateInheritedAnalysis(PMS);
+
+    // [2] Set up new manager's top level manager
+    PMTopLevelManager *TPM = PMD->getTopLevelManager();
+    TPM->addIndirectPassManager(RGPM);
+
+    // [3] Assign manager to manage this new manager. This may create
+    // and push new managers into PMS
+    Pass *P = dynamic_cast<Pass *>(RGPM);
+    TPM->schedulePass(P);
+
+    // [4] Push new manager into PMS
+    PMS.push(RGPM);
+  }
+
+  RGPM->add(this);
+}
+
+/// Get the printer pass
+Pass *RegionPass::createPrinterPass(raw_ostream &O,
+                                  const std::string &Banner) const {
+  return new PrintRegionPass(Banner, O);
+}

Modified: llvm/trunk/lib/VMCore/PassManager.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/PassManager.cpp?rev=116905&r1=116904&r2=116905&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/PassManager.cpp (original)
+++ llvm/trunk/lib/VMCore/PassManager.cpp Tue Oct 19 20:54:44 2010
@@ -1087,6 +1087,9 @@
   case ON_MODULE_MSG:
     dbgs() << "' on Module '"  << Msg << "'...\n";
     break;
+  case ON_REGION_MSG:
+    dbgs() << "' on Region '"  << Msg << "'...\n";
+    break;
   case ON_LOOP_MSG:
     dbgs() << "' on Loop '" << Msg << "'...\n";
     break;

Modified: llvm/trunk/tools/opt/opt.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/opt/opt.cpp?rev=116905&r1=116904&r2=116905&view=diff
==============================================================================
--- llvm/trunk/tools/opt/opt.cpp (original)
+++ llvm/trunk/tools/opt/opt.cpp Tue Oct 19 20:54:44 2010
@@ -20,6 +20,7 @@
 #include "llvm/Assembly/PrintModulePass.h"
 #include "llvm/Analysis/Verifier.h"
 #include "llvm/Analysis/LoopPass.h"
+#include "llvm/Analysis/RegionPass.h"
 #include "llvm/Analysis/CallGraph.h"
 #include "llvm/Target/TargetData.h"
 #include "llvm/Target/TargetMachine.h"
@@ -267,6 +268,40 @@
 
 char LoopPassPrinter::ID = 0;
 
+struct RegionPassPrinter : public RegionPass {
+  static char ID;
+  const PassInfo *PassToPrint;
+  raw_ostream &Out;
+  std::string PassName;
+
+  RegionPassPrinter(const PassInfo *PI, raw_ostream &out) : RegionPass(ID),
+    PassToPrint(PI), Out(out) {
+    std::string PassToPrintName =  PassToPrint->getPassName();
+    PassName = "LoopPass Printer: " + PassToPrintName;
+  }
+
+  virtual bool runOnRegion(Region *R, RGPassManager &RGM) {
+    if (!Quiet) {
+      Out << "Printing analysis '" << PassToPrint->getPassName() << "' for "
+        << "region: '" << R->getNameStr() << "' in function '"
+        << R->getEntry()->getParent()->getNameStr() << "':\n";
+    }
+    // Get and print pass...
+   getAnalysisID<Pass>(PassToPrint->getTypeInfo()).print(Out,
+                       R->getEntry()->getParent()->getParent());
+    return false;
+  }
+
+  virtual const char *getPassName() const { return "'Pass' Printer"; }
+
+  virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+    AU.addRequiredID(PassToPrint->getTypeInfo());
+    AU.setPreservesAll();
+  }
+};
+
+char RegionPassPrinter::ID = 0;
+
 struct BasicBlockPassPrinter : public BasicBlockPass {
   const PassInfo *PassToPrint;
   raw_ostream &Out;
@@ -526,6 +561,9 @@
         case PT_BasicBlock:
           Passes.add(new BasicBlockPassPrinter(PassInf, Out->os()));
           break;
+        case PT_Region:
+          Passes.add(new RegionPassPrinter(PassInf, Out->os()));
+          break;
         case PT_Loop:
           Passes.add(new LoopPassPrinter(PassInf, Out->os()));
           break;



From geek4civic at gmail.com  Tue Oct 19 21:33:47 2010
From: geek4civic at gmail.com (NAKAMURA Takumi)
Date: Wed, 20 Oct 2010 11:33:47 +0900
Subject: [llvm-commits] [llvm] r116785 -
	/llvm/trunk/lib/System/Win32/ThreadLocal.inc
In-Reply-To: <0B4E5E66-4CA0-441F-B6B9-D93C1D3F2F1A@apple.com>
References: <20101019012202.27CB12A6C12C@llvm.org>
	<EEC41DAD-8F68-4CA7-BA38-F2E3978A8E04@apple.com>
	<0B4E5E66-4CA0-441F-B6B9-D93C1D3F2F1A@apple.com>
Message-ID: <AANLkTikk7_tMD8jCFr3R_v2UwrFGXkXLwMfidM6o-vbY@mail.gmail.com>

Bill san, Jim san,

Thank you to give me comments.
I am sorry I remembered only the fixup in lib/System/RWMutex.cpp at 110667,
and I commited similarly.

I think it would be better to take Bill's way. May I fix up 2 files
with attached patch?

...Takumi

ps. I can still see some points with grep -nri '(void)[A-Z][0-9A-Z]*;'
| fgrep -iv warning


2010/10/20 Bill Wendling <wendling at apple.com>:
> Or better yet, use the?ATTRIBUTE_UNUSED attribute in
> llvm/Support/Compiler.h.
> -bw
> On Oct 19, 2010, at 9:16 AM, Jim Grosbach wrote:
>
> Can you add a comment saying why that line is necessary? Otherwise some well
> meaning person may remove the "unusued" statement.
>
> -Jim
>
> On Oct 18, 2010, at 6:22 PM, NAKAMURA Takumi wrote:
>
> Author: chapuni
>
> Date: Mon Oct 18 20:22:01 2010
>
> New Revision: 116785
>
> URL: http://llvm.org/viewvc/llvm-project?rev=116785&view=rev
>
> Log:
>
> lib/System/Win32/ThreadLocal.inc: Suppress "unused" warning on -Asserts.
>
> Modified:
>
> ??llvm/trunk/lib/System/Win32/ThreadLocal.inc
>
> Modified: llvm/trunk/lib/System/Win32/ThreadLocal.inc
>
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Win32/ThreadLocal.inc?rev=116785&r1=116784&r2=116785&view=diff
>
> ==============================================================================
>
> --- llvm/trunk/lib/System/Win32/ThreadLocal.inc (original)
>
> +++ llvm/trunk/lib/System/Win32/ThreadLocal.inc Mon Oct 18 20:22:01 2010
>
> @@ -44,6 +44,7 @@
>
> ?DWORD* tls = static_cast<DWORD*>(data);
>
> ?int errorcode = TlsSetValue(*tls, const_cast<void*>(d));
>
> ?assert(errorcode != 0);
>
> + ?(void)errorcode;
>
> }
>
> void ThreadLocalImpl::removeInstance() {
>
>
> _______________________________________________
>
> llvm-commits mailing list
>
> llvm-commits at cs.uiuc.edu
>
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
>
-------------- next part --------------
diff --git a/lib/System/RWMutex.cpp b/lib/System/RWMutex.cpp
index deb0470..be41ee6 100644
--- a/lib/System/RWMutex.cpp
+++ b/lib/System/RWMutex.cpp
@@ -12,6 +12,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "llvm/Config/config.h"
+#include "llvm/Support/Compiler.h"
 #include "llvm/System/RWMutex.h"
 #include <cstring>
 
@@ -72,8 +73,7 @@ RWMutexImpl::RWMutexImpl()
 #endif
 
     // Initialize the rwlock
-    int errorcode = pthread_rwlock_init(rwlock, NULL);
-    (void)errorcode;
+    int ATTRIBUTE_UNUSED errorcode = pthread_rwlock_init(rwlock, NULL);
     assert(errorcode == 0);
 
     // Assign the data member
diff --git a/lib/System/Win32/ThreadLocal.inc b/lib/System/Win32/ThreadLocal.inc
index e7e3cb7..b13c119 100644
--- a/lib/System/Win32/ThreadLocal.inc
+++ b/lib/System/Win32/ThreadLocal.inc
@@ -17,6 +17,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "Win32.h"
+#include "llvm/Support/Compiler.h"
 #include "llvm/System/ThreadLocal.h"
 
 namespace llvm {
@@ -42,9 +43,8 @@ const void* ThreadLocalImpl::getInstance() {
 
 void ThreadLocalImpl::setInstance(const void* d){
   DWORD* tls = static_cast<DWORD*>(data);
-  int errorcode = TlsSetValue(*tls, const_cast<void*>(d));
+  int ATTRIBUTE_UNUSED errorcode = TlsSetValue(*tls, const_cast<void*>(d));
   assert(errorcode != 0);
-  (void)errorcode;
 }
 
 void ThreadLocalImpl::removeInstance() {

From wendling at apple.com  Tue Oct 19 21:49:02 2010
From: wendling at apple.com (Bill Wendling)
Date: Tue, 19 Oct 2010 19:49:02 -0700
Subject: [llvm-commits] [llvm] r116785 -
	/llvm/trunk/lib/System/Win32/ThreadLocal.inc
In-Reply-To: <AANLkTikk7_tMD8jCFr3R_v2UwrFGXkXLwMfidM6o-vbY@mail.gmail.com>
References: <20101019012202.27CB12A6C12C@llvm.org>
	<EEC41DAD-8F68-4CA7-BA38-F2E3978A8E04@apple.com>
	<0B4E5E66-4CA0-441F-B6B9-D93C1D3F2F1A@apple.com>
	<AANLkTikk7_tMD8jCFr3R_v2UwrFGXkXLwMfidM6o-vbY@mail.gmail.com>
Message-ID: <D0D89079-31D2-448C-9F42-36B8AEFC270B@apple.com>

Hi Nakamura,

The patch looks fine. Go ahead and apply it. If you want to tackle the other places where the ATTRIBUTE_UNUSED can be used, please do. :-)

???????????
-bw

On Oct 19, 2010, at 7:33 PM, NAKAMURA Takumi wrote:

> Bill san, Jim san,
> 
> Thank you to give me comments.
> I am sorry I remembered only the fixup in lib/System/RWMutex.cpp at 110667,
> and I commited similarly.
> 
> I think it would be better to take Bill's way. May I fix up 2 files
> with attached patch?
> 
> ...Takumi
> 
> ps. I can still see some points with grep -nri '(void)[A-Z][0-9A-Z]*;'
> | fgrep -iv warning
> 
> 
> 2010/10/20 Bill Wendling <wendling at apple.com>:
>> Or better yet, use the ATTRIBUTE_UNUSED attribute in
>> llvm/Support/Compiler.h.
>> -bw
>> On Oct 19, 2010, at 9:16 AM, Jim Grosbach wrote:
>> 
>> Can you add a comment saying why that line is necessary? Otherwise some well
>> meaning person may remove the "unusued" statement.
>> 
>> -Jim
>> 
>> On Oct 18, 2010, at 6:22 PM, NAKAMURA Takumi wrote:
>> 
>> Author: chapuni
>> 
>> Date: Mon Oct 18 20:22:01 2010
>> 
>> New Revision: 116785
>> 
>> URL: http://llvm.org/viewvc/llvm-project?rev=116785&view=rev
>> 
>> Log:
>> 
>> lib/System/Win32/ThreadLocal.inc: Suppress "unused" warning on -Asserts.
>> 
>> Modified:
>> 
>>   llvm/trunk/lib/System/Win32/ThreadLocal.inc
>> 
>> Modified: llvm/trunk/lib/System/Win32/ThreadLocal.inc
>> 
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Win32/ThreadLocal.inc?rev=116785&r1=116784&r2=116785&view=diff
>> 
>> ==============================================================================
>> 
>> --- llvm/trunk/lib/System/Win32/ThreadLocal.inc (original)
>> 
>> +++ llvm/trunk/lib/System/Win32/ThreadLocal.inc Mon Oct 18 20:22:01 2010
>> 
>> @@ -44,6 +44,7 @@
>> 
>>  DWORD* tls = static_cast<DWORD*>(data);
>> 
>>  int errorcode = TlsSetValue(*tls, const_cast<void*>(d));
>> 
>>  assert(errorcode != 0);
>> 
>> +  (void)errorcode;
>> 
>> }
>> 
>> void ThreadLocalImpl::removeInstance() {
>> 
>> 
>> _______________________________________________
>> 
>> llvm-commits mailing list
>> 
>> llvm-commits at cs.uiuc.edu
>> 
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>> 
>> 
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>> 
>> 
> <unused-var.diff.txt>

-------------- next part --------------
An HTML attachment was scrubbed...
URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101019/9bf4f9dc/attachment.html 

From rafael.espindola at gmail.com  Tue Oct 19 21:59:26 2010
From: rafael.espindola at gmail.com (=?UTF-8?Q?Rafael_Esp=C3=ADndola?=)
Date: Tue, 19 Oct 2010 22:59:26 -0400
Subject: [llvm-commits] [llvm] r116823 - in /llvm/trunk/test: MC/ELF/
	Scripts/
In-Reply-To: <20101019173910.A90842A6C12C@llvm.org>
References: <20101019173910.A90842A6C12C@llvm.org>
Message-ID: <AANLkTino-=aXF7H4gh5eyJ+WTduk8pni5QM0w_YcFRXS@mail.gmail.com>

> +FormatOutput=hex

This is dead, no?

> ? ? e_shnum = f.read16()
> - ? ?print "('e_shnum', %d)" % e_shnum
> + ? ?print "('e_shnum', %s)" % common_dump.HexDump(e_shnum)

If printing with fixed sizes, we should probably print with the actual sizes...

Cheers,
Rafael


From geek4civic at gmail.com  Tue Oct 19 23:05:29 2010
From: geek4civic at gmail.com (NAKAMURA Takumi)
Date: Wed, 20 Oct 2010 04:05:29 -0000
Subject: [llvm-commits] [llvm] r116909 - in /llvm/trunk/lib/System:
	RWMutex.cpp Win32/ThreadLocal.inc
Message-ID: <20101020040529.3C4EE2A6C12C@llvm.org>

Author: chapuni
Date: Tue Oct 19 23:05:29 2010
New Revision: 116909

URL: http://llvm.org/viewvc/llvm-project?rev=116909&view=rev
Log:
Add ATTRIBUTE_UNUSED for -Asserts.

Modified:
    llvm/trunk/lib/System/RWMutex.cpp
    llvm/trunk/lib/System/Win32/ThreadLocal.inc

Modified: llvm/trunk/lib/System/RWMutex.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/RWMutex.cpp?rev=116909&r1=116908&r2=116909&view=diff
==============================================================================
--- llvm/trunk/lib/System/RWMutex.cpp (original)
+++ llvm/trunk/lib/System/RWMutex.cpp Tue Oct 19 23:05:29 2010
@@ -12,6 +12,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "llvm/Config/config.h"
+#include "llvm/Support/Compiler.h"
 #include "llvm/System/RWMutex.h"
 #include <cstring>
 
@@ -72,8 +73,7 @@
 #endif
 
     // Initialize the rwlock
-    int errorcode = pthread_rwlock_init(rwlock, NULL);
-    (void)errorcode;
+    int ATTRIBUTE_UNUSED errorcode = pthread_rwlock_init(rwlock, NULL);
     assert(errorcode == 0);
 
     // Assign the data member

Modified: llvm/trunk/lib/System/Win32/ThreadLocal.inc
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Win32/ThreadLocal.inc?rev=116909&r1=116908&r2=116909&view=diff
==============================================================================
--- llvm/trunk/lib/System/Win32/ThreadLocal.inc (original)
+++ llvm/trunk/lib/System/Win32/ThreadLocal.inc Tue Oct 19 23:05:29 2010
@@ -17,6 +17,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "Win32.h"
+#include "llvm/Support/Compiler.h"
 #include "llvm/System/ThreadLocal.h"
 
 namespace llvm {
@@ -42,9 +43,8 @@
 
 void ThreadLocalImpl::setInstance(const void* d){
   DWORD* tls = static_cast<DWORD*>(data);
-  int errorcode = TlsSetValue(*tls, const_cast<void*>(d));
+  int ATTRIBUTE_UNUSED errorcode = TlsSetValue(*tls, const_cast<void*>(d));
   assert(errorcode != 0);
-  (void)errorcode;
 }
 
 void ThreadLocalImpl::removeInstance() {



From geek4civic at gmail.com  Tue Oct 19 23:08:07 2010
From: geek4civic at gmail.com (NAKAMURA Takumi)
Date: Wed, 20 Oct 2010 13:08:07 +0900
Subject: [llvm-commits] [llvm] r116785 -
	/llvm/trunk/lib/System/Win32/ThreadLocal.inc
In-Reply-To: <D0D89079-31D2-448C-9F42-36B8AEFC270B@apple.com>
References: <20101019012202.27CB12A6C12C@llvm.org>
	<EEC41DAD-8F68-4CA7-BA38-F2E3978A8E04@apple.com>
	<0B4E5E66-4CA0-441F-B6B9-D93C1D3F2F1A@apple.com>
	<AANLkTikk7_tMD8jCFr3R_v2UwrFGXkXLwMfidM6o-vbY@mail.gmail.com>
	<D0D89079-31D2-448C-9F42-36B8AEFC270B@apple.com>
Message-ID: <AANLkTi=-ORSmrawAAnykM+UO9F-cDpit1=CJdTajQ0Tb@mail.gmail.com>

Committed in r116909, thank you!

...Takumi

2010/10/20 Bill Wendling <wendling at apple.com>:
> Hi Nakamura,
> The patch looks fine. Go ahead and apply it. If you want to tackle the other
> places where the ATTRIBUTE_UNUSED can be used, please do. :-)
>
> ???????????
> -bw
> On Oct 19, 2010, at 7:33 PM, NAKAMURA Takumi wrote:
>
> Bill san, Jim san,
>
> Thank you to give me comments.
> I am sorry I remembered only the fixup in lib/System/RWMutex.cpp at 110667,
> and I commited similarly.
>
> I think it would be better to take Bill's way. May I fix up 2 files
> with attached patch?
>
> ...Takumi
>
> ps. I can still see some points with grep -nri '(void)[A-Z][0-9A-Z]*;'
> | fgrep -iv warning
>
>
> 2010/10/20 Bill Wendling <wendling at apple.com>:
>
> Or better yet, use the ATTRIBUTE_UNUSED attribute in
>
> llvm/Support/Compiler.h.
>
> -bw
>
> On Oct 19, 2010, at 9:16 AM, Jim Grosbach wrote:
>
> Can you add a comment saying why that line is necessary? Otherwise some well
>
> meaning person may remove the "unusued" statement.
>
> -Jim
>
> On Oct 18, 2010, at 6:22 PM, NAKAMURA Takumi wrote:
>
> Author: chapuni
>
> Date: Mon Oct 18 20:22:01 2010
>
> New Revision: 116785
>
> URL: http://llvm.org/viewvc/llvm-project?rev=116785&view=rev
>
> Log:
>
> lib/System/Win32/ThreadLocal.inc: Suppress "unused" warning on -Asserts.
>
> Modified:
>
>   llvm/trunk/lib/System/Win32/ThreadLocal.inc
>
> Modified: llvm/trunk/lib/System/Win32/ThreadLocal.inc
>
> URL:
>
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Win32/ThreadLocal.inc?rev=116785&r1=116784&r2=116785&view=diff
>
> ==============================================================================
>
> --- llvm/trunk/lib/System/Win32/ThreadLocal.inc (original)
>
> +++ llvm/trunk/lib/System/Win32/ThreadLocal.inc Mon Oct 18 20:22:01 2010
>
> @@ -44,6 +44,7 @@
>
>  DWORD* tls = static_cast<DWORD*>(data);
>
>  int errorcode = TlsSetValue(*tls, const_cast<void*>(d));
>
>  assert(errorcode != 0);
>
> +  (void)errorcode;
>
> }
>
> void ThreadLocalImpl::removeInstance() {
>
>
> _______________________________________________
>
> llvm-commits mailing list
>
> llvm-commits at cs.uiuc.edu
>
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
>
> _______________________________________________
>
> llvm-commits mailing list
>
> llvm-commits at cs.uiuc.edu
>
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
>
> <unused-var.diff.txt>
>

From rafael.espindola at gmail.com  Tue Oct 19 23:57:22 2010
From: rafael.espindola at gmail.com (Rafael Espindola)
Date: Wed, 20 Oct 2010 04:57:22 -0000
Subject: [llvm-commits] [llvm] r116910 - /llvm/trunk/tools/lto/LTOModule.cpp
Message-ID: <20101020045722.92D652A6C12C@llvm.org>

Author: rafael
Date: Tue Oct 19 23:57:22 2010
New Revision: 116910

URL: http://llvm.org/viewvc/llvm-project?rev=116910&view=rev
Log:
Record sysbols created by aliases. Fixes PR8414.

Modified:
    llvm/trunk/tools/lto/LTOModule.cpp

Modified: llvm/trunk/tools/lto/LTOModule.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto/LTOModule.cpp?rev=116910&r1=116909&r2=116910&view=diff
==============================================================================
--- llvm/trunk/tools/lto/LTOModule.cpp (original)
+++ llvm/trunk/tools/lto/LTOModule.cpp Tue Oct 19 23:57:22 2010
@@ -469,6 +469,15 @@
     pos = inlineAsm.find(glbl, pend);
   }
 
+  // add aliases
+  for (Module::alias_iterator i = _module->alias_begin(),
+         e = _module->alias_end(); i != e; ++i) {
+    if (i->isDeclaration())
+      addPotentialUndefinedSymbol(i, mangler);
+    else
+      addDefinedDataSymbol(i, mangler);
+  }
+
   // make symbols for all undefines
   for (StringMap<NameAndAttributes>::iterator it=_undefines.begin();
        it != _undefines.end(); ++it) {



From baldrick at free.fr  Wed Oct 20 01:47:57 2010
From: baldrick at free.fr (Duncan Sands)
Date: Wed, 20 Oct 2010 08:47:57 +0200
Subject: [llvm-commits] [llvm] r116905 - in /llvm/trunk:
 docs/WritingAnLLVMPass.html include/llvm/Analysis/RegionPass.h
 include/llvm/Pass.h include/llvm/PassManagers.h lib/Analysis/CMakeLists.txt
 lib/Analysis/RegionPass.cpp lib/VMCore/PassManager.cpp tools/opt/opt.cpp
In-Reply-To: <20101020015445.28DA62A6C12C@llvm.org>
References: <20101020015445.28DA62A6C12C@llvm.org>
Message-ID: <4CBE909D.1070701@free.fr>

Hi Tobias,

> +the<tt>RGPassManager</tt>  interface. You may overload three virtual methods of
> +<tt>RegionPass</tt>  to implementing your own region pass is usually. All these

the sentence starting with "You may overload..." doesn't seem to make sense.

> +methods should return true if they modified the program, or false if they didn not.

didn not -> did not

> +<p>The<tt>doInitialization</tt>  method is designed to do simple initialization
> +type of stuff that does not depend on the functions being processed.  The

No need for "type of stuff", can just be "simple initialization that does not..."

> +<tt>doInitialization</tt>  method call is not scheduled to overlap with any
> +other pass executions (thus it should be very fast). RPPassManager

I'm not sure what "not scheduled to overlap with any other pass executions
(thus it should be very fast)" is trying to say.  What is "overlap" about?
Is "thus it should be very fast" telling people that they need to make sure
that their "doInitialization" method is fast?  And why does the conclusion "it
should be very fast" follow from "not scheduled to overlap with"...  Confused.


> +be returned if the region is modified.<tt>RGPassManager</tt>  interface
> +should be used to update region tree.</p>

<tt>RGPassManager</tt> -> The <tt>RGPassManager</tt>


> +// This file defines the RegionPass class. All region based analysis,
> +// optimization and transformation passes are derived from RegionPass.
> +// This class is implemented following the some ideas of the LoopPass.h class.

the some ideas of -> (?) the same ideas as
Or maybe: following the some ideas of -> along the same lines as

> +// This file implements RegionPass and RGPassManager. All region optimization
> +// and transformation passes are derived from RegionPass. RGPassManager is
> +// responsible for managing RegionPasses.
> +// most of these codes are COPY from LoopPass.cpp

I think you can remove the last line (most of these codes...).

> +// Check if this pass is suitable for the current RGPassManager, if
> +// available. This pass P is not suitable for a RGPassManager if P
> +// is not preserving higher level analysis info used by other
> +// RGPassManager passes. In such case, pop RGPassManager from the
> +// stack. This will force assignPassManager() to create new
> +// LPPassManger as expected.

LPPassManger -> (?) RGPassManager
Otherwise, LPPassManger -> LPPassManager

> +  // If this pass is destroying high level information that is used
> +  // by other passes that are managed by LPM then do not insert
> +  // this pass in current LPM. Use new RGPassManager.

Are these references to LPM correct, or should they be to RGPM?

Ciao,

Duncan.

From baldrick at free.fr  Wed Oct 20 01:54:16 2010
From: baldrick at free.fr (Duncan Sands)
Date: Wed, 20 Oct 2010 08:54:16 +0200
Subject: [llvm-commits] [llvm] r116909 - in
 /llvm/trunk/lib/System:	RWMutex.cpp Win32/ThreadLocal.inc
In-Reply-To: <20101020040529.3C4EE2A6C12C@llvm.org>
References: <20101020040529.3C4EE2A6C12C@llvm.org>
Message-ID: <4CBE9218.9080500@free.fr>

Hi,

>       // Initialize the rwlock
> -    int errorcode = pthread_rwlock_init(rwlock, NULL);
> -    (void)errorcode;
> +    int ATTRIBUTE_UNUSED errorcode = pthread_rwlock_init(rwlock, NULL);
>       assert(errorcode == 0);

when building with assertions on, errorcode is used, so mightn't this result
in a warning? [*] I don't see what was wrong with casting to void: that's used
all over the place in LLVM already, not to mention in lots of other projects.

>   void ThreadLocalImpl::setInstance(const void* d){
>     DWORD* tls = static_cast<DWORD*>(data);
> -  int errorcode = TlsSetValue(*tls, const_cast<void*>(d));
> +  int ATTRIBUTE_UNUSED errorcode = TlsSetValue(*tls, const_cast<void*>(d));
>     assert(errorcode != 0);
> -  (void)errorcode;

Likewise.

Ciao,

Duncan.

[*] It may be that the compiler you are using does not produce a warning in this
case, but since this seems like a reasonable thing to warn about perhaps other
(maybe future) versions will, or other compilers will.  My Ada compiler warns
about this if you use the analogous Ada construct (mark as unused, but use it).

From aggarwa4 at illinois.edu  Wed Oct 20 02:15:57 2010
From: aggarwa4 at illinois.edu (Arushi Aggarwal)
Date: Wed, 20 Oct 2010 07:15:57 -0000
Subject: [llvm-commits] [poolalloc] r116913 -
	/poolalloc/trunk/lib/DSA/DSGraph.cpp
Message-ID: <20101020071557.D59B82A6C12C@llvm.org>

Author: aggarwa4
Date: Wed Oct 20 02:15:57 2010
New Revision: 116913

URL: http://llvm.org/viewvc/llvm-project?rev=116913&view=rev
Log:
Call graph construction should use the AuxCalls list

Modified:
    poolalloc/trunk/lib/DSA/DSGraph.cpp

Modified: poolalloc/trunk/lib/DSA/DSGraph.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/DSGraph.cpp?rev=116913&r1=116912&r2=116913&view=diff
==============================================================================
--- poolalloc/trunk/lib/DSA/DSGraph.cpp (original)
+++ poolalloc/trunk/lib/DSA/DSGraph.cpp Wed Oct 20 02:15:57 2010
@@ -1648,7 +1648,7 @@
   //
   // Get the list of unresolved call sites.
   //
-  const std::list<DSCallSite>& Calls = getFunctionCalls();
+  const std::list<DSCallSite>& Calls = getAuxFunctionCalls();
   for (std::list<DSCallSite>::const_iterator ii = Calls.begin(),
                                              ee = Calls.end();
        ii != ee; ++ii) {



From echristo at apple.com  Wed Oct 20 03:02:25 2010
From: echristo at apple.com (Eric Christopher)
Date: Wed, 20 Oct 2010 08:02:25 -0000
Subject: [llvm-commits] [llvm] r116915 -
	/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp
Message-ID: <20101020080226.6197B2A6C12D@llvm.org>

Author: echristo
Date: Wed Oct 20 03:02:24 2010
New Revision: 116915

URL: http://llvm.org/viewvc/llvm-project?rev=116915&view=rev
Log:
Fix a TODO by removing some unnecesary copies.

Modified:
    llvm/trunk/lib/Target/ARM/ARMFastISel.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=116915&r1=116914&r2=116915&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Wed Oct 20 03:02:24 2010
@@ -1384,25 +1384,17 @@
     if (RVLocs.size() == 2 && RetVT.getSimpleVT().SimpleTy == MVT::f64) {
       // For this move we copy into two registers and then move into the
       // double fp reg we want.
-      // TODO: Are the copies necessary?
-      TargetRegisterClass *CopyRC = TLI.getRegClassFor(MVT::i32);
-      unsigned Copy1 = createResultReg(CopyRC);
-      BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(TargetOpcode::COPY),
-              Copy1).addReg(RVLocs[0].getLocReg());
-      UsedRegs.push_back(RVLocs[0].getLocReg());
-
-      unsigned Copy2 = createResultReg(CopyRC);
-      BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(TargetOpcode::COPY),
-              Copy2).addReg(RVLocs[1].getLocReg());
-      UsedRegs.push_back(RVLocs[1].getLocReg());
-
       EVT DestVT = RVLocs[0].getValVT();
       TargetRegisterClass* DstRC = TLI.getRegClassFor(DestVT);
       unsigned ResultReg = createResultReg(DstRC);
       AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
                               TII.get(ARM::VMOVDRR), ResultReg)
-                      .addReg(Copy1).addReg(Copy2));
+                      .addReg(RVLocs[0].getLocReg())
+                      .addReg(RVLocs[1].getLocReg()));
 
+      UsedRegs.push_back(RVLocs[0].getLocReg());
+      UsedRegs.push_back(RVLocs[1].getLocReg());
+      
       // Finally update the result.
       UpdateValueMap(I, ResultReg);
     } else {



From chandlerc at gmail.com  Wed Oct 20 03:27:02 2010
From: chandlerc at gmail.com (Chandler Carruth)
Date: Wed, 20 Oct 2010 08:27:02 -0000
Subject: [llvm-commits] [llvm] r116919 - in /llvm/trunk/lib:
 MC/MCParser/AsmParser.cpp System/RWMutex.cpp
 Target/ARM/AsmParser/ARMAsmParser.cpp
Message-ID: <20101020082702.9DFAA2A6C12C@llvm.org>

Author: chandlerc
Date: Wed Oct 20 03:27:02 2010
New Revision: 116919

URL: http://llvm.org/viewvc/llvm-project?rev=116919&view=rev
Log:
Remove remaining uses of ATTRIBUTE_UNUSED on variables, and delete three
#includes in the process.

Modified:
    llvm/trunk/lib/MC/MCParser/AsmParser.cpp
    llvm/trunk/lib/System/RWMutex.cpp
    llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp

Modified: llvm/trunk/lib/MC/MCParser/AsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCParser/AsmParser.cpp?rev=116919&r1=116918&r2=116919&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCParser/AsmParser.cpp (original)
+++ llvm/trunk/lib/MC/MCParser/AsmParser.cpp Wed Oct 20 03:27:02 2010
@@ -27,7 +27,6 @@
 #include "llvm/MC/MCStreamer.h"
 #include "llvm/MC/MCSymbol.h"
 #include "llvm/MC/MCDwarf.h"
-#include "llvm/Support/Compiler.h"
 #include "llvm/Support/MemoryBuffer.h"
 #include "llvm/Support/SourceMgr.h"
 #include "llvm/Support/raw_ostream.h"
@@ -1386,7 +1385,6 @@
 
     for (;;) {
       const MCExpr *Value;
-      SMLoc ATTRIBUTE_UNUSED StartLoc = getLexer().getLoc();
       if (ParseExpression(Value))
         return true;
 

Modified: llvm/trunk/lib/System/RWMutex.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/RWMutex.cpp?rev=116919&r1=116918&r2=116919&view=diff
==============================================================================
--- llvm/trunk/lib/System/RWMutex.cpp (original)
+++ llvm/trunk/lib/System/RWMutex.cpp Wed Oct 20 03:27:02 2010
@@ -12,7 +12,6 @@
 //===----------------------------------------------------------------------===//
 
 #include "llvm/Config/config.h"
-#include "llvm/Support/Compiler.h"
 #include "llvm/System/RWMutex.h"
 #include <cstring>
 
@@ -73,7 +72,8 @@
 #endif
 
     // Initialize the rwlock
-    int ATTRIBUTE_UNUSED errorcode = pthread_rwlock_init(rwlock, NULL);
+    int errorcode = pthread_rwlock_init(rwlock, NULL);
+    (void)errorcode;
     assert(errorcode == 0);
 
     // Assign the data member

Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=116919&r1=116918&r2=116919&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Wed Oct 20 03:27:02 2010
@@ -17,7 +17,6 @@
 #include "llvm/MC/MCInst.h"
 #include "llvm/Target/TargetRegistry.h"
 #include "llvm/Target/TargetAsmParser.h"
-#include "llvm/Support/Compiler.h"
 #include "llvm/Support/SourceMgr.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/ADT/OwningPtr.h"
@@ -814,7 +813,6 @@
   const AsmToken &Tok = Parser.getTok();
   if (Tok.isNot(AsmToken::Identifier) && Tok.isNot(AsmToken::String))
     return Error(L, "unexpected token in .syntax directive");
-  StringRef ATTRIBUTE_UNUSED SymbolName = Parser.getTok().getIdentifier();
   Parser.Lex(); // Consume the identifier token.
 
   if (getLexer().isNot(AsmToken::EndOfStatement))



From chandlerc at gmail.com  Wed Oct 20 03:44:27 2010
From: chandlerc at gmail.com (Chandler Carruth)
Date: Wed, 20 Oct 2010 08:44:27 -0000
Subject: [llvm-commits] [llvm] r116920 -
	/llvm/trunk/include/llvm/Support/Compiler.h
Message-ID: <20101020084427.BD15C2A6C12C@llvm.org>

Author: chandlerc
Date: Wed Oct 20 03:44:27 2010
New Revision: 116920

URL: http://llvm.org/viewvc/llvm-project?rev=116920&view=rev
Log:
Add a comment about ATTRIBUTE_UNUSED to avoid further confusion over when to
use it.

Modified:
    llvm/trunk/include/llvm/Support/Compiler.h

Modified: llvm/trunk/include/llvm/Support/Compiler.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/Compiler.h?rev=116920&r1=116919&r2=116920&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/Compiler.h (original)
+++ llvm/trunk/include/llvm/Support/Compiler.h Wed Oct 20 03:44:27 2010
@@ -31,6 +31,14 @@
 #define ATTRIBUTE_USED
 #endif
 
+// Some compilers warn about unused functions. When a function is sometimes
+// used or not depending on build settings (e.g. a function only called from
+// within "assert"), this attribute can be used to suppress such warnings.
+//
+// However, it shouldn't be used for unused *variables*, as those have a much
+// more portable solution:
+//   (void)unused_var_name;
+// Prefer cast-to-void wherever it is sufficient.
 #if (__GNUC__ >= 4 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 1))
 #define ATTRIBUTE_UNUSED __attribute__((__unused__))
 #else



From baldrick at free.fr  Wed Oct 20 04:40:49 2010
From: baldrick at free.fr (Duncan Sands)
Date: Wed, 20 Oct 2010 09:40:49 -0000
Subject: [llvm-commits] [dragonegg] r116921 - in /dragonegg/trunk:
 llvm-abi-default.cpp llvm-abi.h llvm-backend.cpp llvm-convert.cpp
 llvm-types.cpp x86/llvm-target.cpp
Message-ID: <20101020094050.1E4292A6C12C@llvm.org>

Author: baldrick
Date: Wed Oct 20 04:40:49 2010
New Revision: 116921

URL: http://llvm.org/viewvc/llvm-project?rev=116921&view=rev
Log:
Use the cast-to-void idiom rather than ATTRIBUTE_UNUSED in most places,
since it is more portable.

Modified:
    dragonegg/trunk/llvm-abi-default.cpp
    dragonegg/trunk/llvm-abi.h
    dragonegg/trunk/llvm-backend.cpp
    dragonegg/trunk/llvm-convert.cpp
    dragonegg/trunk/llvm-types.cpp
    dragonegg/trunk/x86/llvm-target.cpp

Modified: dragonegg/trunk/llvm-abi-default.cpp
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/llvm-abi-default.cpp?rev=116921&r1=116920&r2=116921&view=diff
==============================================================================
--- dragonegg/trunk/llvm-abi-default.cpp (original)
+++ dragonegg/trunk/llvm-abi-default.cpp Wed Oct 20 04:40:49 2010
@@ -17,8 +17,8 @@
 
 // doNotUseShadowReturn - Return true if the specified GCC type
 // should not be returned using a pointer to struct parameter.
-bool doNotUseShadowReturn(tree type, tree fndecl,
-                          CallingConv::ID CC ATTRIBUTE_UNUSED) {
+bool doNotUseShadowReturn(tree type, tree fndecl, CallingConv::ID CC) {
+  (void)CC; // Otherwise unused - avoid compiler warning.
   if (!TYPE_SIZE(type))
     return false;
   if (TREE_CODE(TYPE_SIZE(type)) != INTEGER_CST)

Modified: dragonegg/trunk/llvm-abi.h
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/llvm-abi.h?rev=116921&r1=116920&r2=116921&view=diff
==============================================================================
--- dragonegg/trunk/llvm-abi.h (original)
+++ dragonegg/trunk/llvm-abi.h Wed Oct 20 04:40:49 2010
@@ -54,70 +54,84 @@
 
   /// HandleScalarResult - This callback is invoked if the function returns a
   /// simple scalar result value, which is of type RetTy.
-  virtual void HandleScalarResult(const Type *RetTy ATTRIBUTE_UNUSED) {}
+  virtual void HandleScalarResult(const Type *RetTy) {
+    (void)RetTy; // Otherwise unused - avoid compiler warning.
+  }
 
   /// HandleAggregateResultAsScalar - This callback is invoked if the function
   /// returns an aggregate value by bit converting it to the specified scalar
   /// type and returning that.  The bit conversion should start at byte Offset
   /// within the struct, and ScalarTy is not necessarily big enough to cover
   /// the entire struct.
-  virtual void HandleAggregateResultAsScalar(
-    const Type *ScalarTy ATTRIBUTE_UNUSED,
-    unsigned Offset ATTRIBUTE_UNUSED = 0) {}
+  virtual void HandleAggregateResultAsScalar(const Type *ScalarTy,
+                                             unsigned Offset = 0) {
+    (void)ScalarTy; (void)Offset; // Otherwise unused - avoid compiler warning.
+  }
 
   /// HandleAggregateResultAsAggregate - This callback is invoked if the function
   /// returns an aggregate value using multiple return values.
-  virtual void HandleAggregateResultAsAggregate(
-    const Type *AggrTy ATTRIBUTE_UNUSED) {}
+  virtual void HandleAggregateResultAsAggregate(const Type *AggrTy) {
+    (void)AggrTy; // Otherwise unused - avoid compiler warning.
+  }
 
   /// HandleAggregateShadowResult - This callback is invoked if the function
   /// returns an aggregate value by using a "shadow" first parameter, which is
   /// a pointer to the aggregate, of type PtrArgTy.  If RetPtr is set to true,
   /// the pointer argument itself is returned from the function.
-  virtual void HandleAggregateShadowResult(
-    const PointerType *PtrArgTy ATTRIBUTE_UNUSED,
-    bool RetPtr ATTRIBUTE_UNUSED) {}
+  virtual void HandleAggregateShadowResult(const PointerType *PtrArgTy,
+                                           bool RetPtr) {
+    (void)PtrArgTy; (void)RetPtr; // Otherwise unused - avoid compiler warning.
+  }
 
   /// HandleScalarShadowResult - This callback is invoked if the function
   /// returns a scalar value by using a "shadow" first parameter, which is a
   /// pointer to the scalar, of type PtrArgTy.  If RetPtr is set to true,
   /// the pointer argument itself is returned from the function.
-  virtual void HandleScalarShadowResult(
-    const PointerType *PtrArgTy ATTRIBUTE_UNUSED,
-    bool RetPtr ATTRIBUTE_UNUSED) {}
+  virtual void HandleScalarShadowResult(const PointerType *PtrArgTy,
+                                        bool RetPtr) {
+    (void)PtrArgTy; (void)RetPtr; // Otherwise unused - avoid compiler warning.
+  }
 
 
   /// HandleScalarArgument - This is the primary callback that specifies an
   /// LLVM argument to pass.  It is only used for first class types.
   /// If RealSize is non Zero then it specifies number of bytes to access
   /// from LLVMTy.
-  virtual void HandleScalarArgument(const llvm::Type *LLVMTy ATTRIBUTE_UNUSED,
-                                    tree_node *type ATTRIBUTE_UNUSED,
-                                    unsigned RealSize ATTRIBUTE_UNUSED = 0) {}
+  virtual void HandleScalarArgument(const llvm::Type *LLVMTy, tree_node *type,
+                                    unsigned RealSize = 0) {
+    (void)LLVMTy; (void)type;
+    (void)RealSize; // Otherwise unused - avoid compiler warning.
+  }
 
   /// HandleByInvisibleReferenceArgument - This callback is invoked if a pointer
   /// (of type PtrTy) to the argument is passed rather than the argument itself.
-  virtual void HandleByInvisibleReferenceArgument(
-    const llvm::Type *PtrTy ATTRIBUTE_UNUSED,
-    tree_node *type ATTRIBUTE_UNUSED) {}
+  virtual void HandleByInvisibleReferenceArgument(const llvm::Type *PtrTy,
+                                                  tree_node *type) {
+    (void)PtrTy; (void)type; // Otherwise unused - avoid compiler warning.
+  }
 
   /// HandleByValArgument - This callback is invoked if the aggregate function
   /// argument is passed by value.
-  virtual void HandleByValArgument(const llvm::Type *LLVMTy ATTRIBUTE_UNUSED,
-                                   tree_node *type ATTRIBUTE_UNUSED) {}
+  virtual void HandleByValArgument(const llvm::Type *LLVMTy, tree_node *type) {
+    (void)LLVMTy; (void)type; // Otherwise unused - avoid compiler warning.
+  }
 
   /// HandleFCAArgument - This callback is invoked if the aggregate function
   /// argument is passed by value as a first class aggregate.
-  virtual void HandleFCAArgument(const llvm::Type *LLVMTy ATTRIBUTE_UNUSED,
-                                 tree_node *type ATTRIBUTE_UNUSED) {}
+  virtual void HandleFCAArgument(const llvm::Type *LLVMTy, tree_node *type) {
+    (void)LLVMTy; (void)type; // Otherwise unused - avoid compiler warning.
+  }
 
   /// EnterField - Called when we're about the enter the field of a struct
   /// or union.  FieldNo is the number of the element we are entering in the
   /// LLVM Struct, StructTy is the LLVM type of the struct we are entering.
-  virtual void EnterField(unsigned FieldNo ATTRIBUTE_UNUSED,
-                          const llvm::Type *StructTy ATTRIBUTE_UNUSED) {}
+  virtual void EnterField(unsigned FieldNo, const llvm::Type *StructTy) {
+    (void)FieldNo; (void)StructTy; // Otherwise unused - avoid compiler warning.
+  }
   virtual void ExitField() {}
-  virtual void HandlePad(const llvm::Type *LLVMTy ATTRIBUTE_UNUSED) {}
+  virtual void HandlePad(const llvm::Type *LLVMTy) {
+    (void)LLVMTy; // Otherwise unused - avoid compiler warning.
+  }
 };
 
 // LLVM_SHOULD_NOT_RETURN_COMPLEX_IN_MEMORY - A hook to allow
@@ -183,8 +197,8 @@
 // getLLVMAggregateTypeForStructReturn - Return LLVM type if TY can be
 // returns as multiple values, otherwise return NULL. This is the default
 // target independent implementation.
-static inline const Type* getLLVMAggregateTypeForStructReturn(
-  tree_node *type ATTRIBUTE_UNUSED) {
+static inline const Type* getLLVMAggregateTypeForStructReturn(tree_node *type) {
+  (void)type; // Otherwise unused - avoid compiler warning.
   return NULL;
 }
 
@@ -310,9 +324,11 @@
   llvm_default_extract_multiple_return_value((Src),(Dest),(V),(B))
 #endif
 static inline
-void llvm_default_extract_multiple_return_value(
-  Value *Src ATTRIBUTE_UNUSED, Value *Dest ATTRIBUTE_UNUSED,
-  bool isVolatile ATTRIBUTE_UNUSED, LLVMBuilder &Builder ATTRIBUTE_UNUSED) {
+void llvm_default_extract_multiple_return_value(Value *Src, Value *Dest,
+                                                bool isVolatile,
+                                                LLVMBuilder &Builder) {
+  (void)Src; (void)Dest;
+  (void)isVolatile; (void)Builder; // Otherwise unused - avoid compiler warning.
   assert (0 && "LLVM_EXTRACT_MULTIPLE_RETURN_VALUE is not implemented!");
 }
 

Modified: dragonegg/trunk/llvm-backend.cpp
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/llvm-backend.cpp?rev=116921&r1=116920&r2=116921&view=diff
==============================================================================
--- dragonegg/trunk/llvm-backend.cpp (original)
+++ dragonegg/trunk/llvm-backend.cpp Wed Oct 20 04:40:49 2010
@@ -296,7 +296,7 @@
 // SizeOfGlobalMatchesDecl - Whether the size of the given global value is the
 // same as that of the given GCC declaration.  Conservatively returns 'true' if
 // the answer is unclear.
-static ATTRIBUTE_UNUSED
+static ATTRIBUTE_UNUSED // Only called from asserts.
 bool SizeOfGlobalMatchesDecl(GlobalValue *GV, tree decl) {
   // If the GCC declaration has no size then nothing useful can be said here.
   if (!DECL_SIZE(decl))
@@ -1556,8 +1556,9 @@
 /// before processing the compilation unit.
 /// NOTE: called even when only doing syntax checking, so do not initialize the
 /// module etc here.
-static void llvm_start_unit(void *gcc_data ATTRIBUTE_UNUSED,
-                            void *user_data ATTRIBUTE_UNUSED) {
+static void llvm_start_unit(void *gcc_data, void *user_data) {
+  (void)gcc_data; (void)user_data; // Otherwise unused - avoid compiler warning.
+
   if (!quiet_flag)
     errs() << "Starting compilation unit\n";
 
@@ -1871,7 +1872,9 @@
 
 /// emit_same_body_alias - Turn a same-body alias into LLVM IR.
 static void emit_same_body_alias(struct cgraph_node *alias,
-                                 struct cgraph_node *target ATTRIBUTE_UNUSED) {
+                                 struct cgraph_node *target) {
+  (void)target; // Otherwise unused - avoid compiler warning.
+
   if (errorcount || sorrycount)
     return; // Do not process broken code.
 
@@ -1965,11 +1968,13 @@
 };
 
 /// emit_variables - Output GCC global variables to the LLVM IR.
-static void emit_variables(cgraph_node_set set ATTRIBUTE_UNUSED
+static void emit_variables(cgraph_node_set set
 #if (GCC_MINOR > 5)
                            , varpool_node_set vset ATTRIBUTE_UNUSED
 #endif
                            ) {
+  (void)set; // Otherwise unused - avoid compiler warning.
+
   if (errorcount || sorrycount)
     return; // Do not process broken code.
 
@@ -2099,15 +2104,16 @@
 
 
 /// llvm_finish - Run shutdown code when GCC exits.
-static void llvm_finish(void *gcc_data ATTRIBUTE_UNUSED,
-                        void *user_data ATTRIBUTE_UNUSED) {
+static void llvm_finish(void *gcc_data, void *user_data) {
+  (void)gcc_data; (void)user_data; // Otherwise unused - avoid compiler warning.
   FinalizePlugin();
 }
 
 /// llvm_finish_unit - Finish the .s file.  This is called by GCC once the
 /// compilation unit has been completely processed.
-static void llvm_finish_unit(void *gcc_data ATTRIBUTE_UNUSED,
-                             void *user_data ATTRIBUTE_UNUSED) {
+static void llvm_finish_unit(void *gcc_data, void *user_data) {
+  (void)gcc_data; (void)user_data; // Otherwise unused - avoid compiler warning.
+
   if (errorcount || sorrycount)
     return; // Do not process broken code.
 

Modified: dragonegg/trunk/llvm-convert.cpp
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/llvm-convert.cpp?rev=116921&r1=116920&r2=116921&view=diff
==============================================================================
--- dragonegg/trunk/llvm-convert.cpp (original)
+++ dragonegg/trunk/llvm-convert.cpp Wed Oct 20 04:40:49 2010
@@ -130,6 +130,7 @@
 /// overflowed constants.  These conditions can be checked by calling isInt64.
 uint64_t getInt64(tree t, bool Unsigned) {
   assert(isInt64(t, Unsigned) && "invalid constant!");
+  (void)Unsigned; // Otherwise unused if asserts off - avoid compiler warning.
   return getINTEGER_CSTVal(t);
 }
 
@@ -380,7 +381,8 @@
     /// getCallingConv - This provides the desired CallingConv for the function.
     CallingConv::ID& getCallingConv(void) { return CallingConv; }
 
-    void HandlePad(const llvm::Type *LLVMTy ATTRIBUTE_UNUSED) {
+    void HandlePad(const llvm::Type *LLVMTy) {
+      (void)LLVMTy; // Otherwise unused - avoid compiler warning.
       ++AI;
     }
 
@@ -399,9 +401,8 @@
       LocStack.clear();
     }
 
-    void HandleAggregateShadowResult(
-      const PointerType *PtrArgTy ATTRIBUTE_UNUSED,
-      bool RetPtr ATTRIBUTE_UNUSED) {
+    void HandleAggregateShadowResult(const PointerType *PtrArgTy, bool RetPtr) {
+      (void)PtrArgTy; (void)RetPtr; // Otherwise unused - avoid compiler warning
       // If the function returns a structure by value, we transform the function
       // to take a pointer to the result as the first argument of the function
       // instead.
@@ -435,8 +436,8 @@
       ++AI;
     }
 
-    void HandleScalarShadowResult(const PointerType *PtrArgTy ATTRIBUTE_UNUSED,
-                                  bool RetPtr ATTRIBUTE_UNUSED) {
+    void HandleScalarShadowResult(const PointerType *PtrArgTy, bool RetPtr) {
+      (void)PtrArgTy; (void)RetPtr; // Otherwise unused - avoid compiler warning
       assert(AI != Builder.GetInsertBlock()->getParent()->arg_end() &&
              "No explicit return value?");
       AI->setName("scalar.result");
@@ -445,9 +446,9 @@
       ++AI;
     }
 
-    void HandleScalarArgument(const llvm::Type *LLVMTy,
-                              tree type ATTRIBUTE_UNUSED,
+    void HandleScalarArgument(const llvm::Type *LLVMTy, tree type,
                               unsigned RealSize = 0) {
+      (void)type; // Otherwise unused - avoid compiler warning.
       Value *ArgVal = AI;
       if (ArgVal->getType() != LLVMTy) {
         if (ArgVal->getType()->isPointerTy() && LLVMTy->isPointerTy()) {
@@ -475,8 +476,8 @@
       ++AI;
     }
 
-    void HandleByValArgument(const llvm::Type *LLVMTy ATTRIBUTE_UNUSED,
-                             tree type ATTRIBUTE_UNUSED) {
+    void HandleByValArgument(const llvm::Type *LLVMTy, tree type) {
+      (void)LLVMTy; (void)type; // Otherwise unused - avoid compiler warning.
       if (LLVM_BYVAL_ALIGNMENT_TOO_SMALL(type)) {
         // Incoming object on stack is insufficiently aligned for the type.
         // Make a correctly aligned copy.
@@ -507,8 +508,8 @@
       ++AI;
     }
 
-    void HandleFCAArgument(const llvm::Type *LLVMTy ATTRIBUTE_UNUSED,
-                           tree type ATTRIBUTE_UNUSED) {
+    void HandleFCAArgument(const llvm::Type *LLVMTy, tree type) {
+      (void)LLVMTy; (void)type; // Otherwise unused - avoid compiler warning.
       // Store the FCA argument into alloca.
       assert(!LocStack.empty());
       Value *Loc = LocStack.back();
@@ -517,8 +518,9 @@
       ++AI;
     }
 
-    void HandleAggregateResultAsScalar(const Type *ScalarTy ATTRIBUTE_UNUSED,
-                                       unsigned Offset=0) {
+    void HandleAggregateResultAsScalar(const Type *ScalarTy,
+                                       unsigned Offset = 0) {
+      (void)ScalarTy; // Otherwise unused - avoid compiler warning.
       this->Offset = Offset;
     }
 
@@ -543,8 +545,8 @@
 // passed in memory byval.
 static bool isPassedByVal(tree type, const Type *Ty,
                           std::vector<const Type*> &ScalarArgs,
-                          bool isShadowRet,
-                          CallingConv::ID &CC ATTRIBUTE_UNUSED) {
+                          bool isShadowRet, CallingConv::ID &CC) {
+  (void)CC; // Otherwise unused - avoid compiler warning.
   if (LLVM_SHOULD_PASS_AGGREGATE_USING_BYVAL_ATTR(type, Ty))
     return true;
 
@@ -2600,7 +2602,8 @@
 
     /// HandleScalarResult - This callback is invoked if the function returns a
     /// simple scalar result value.
-    void HandleScalarResult(const Type *RetTy ATTRIBUTE_UNUSED) {
+    void HandleScalarResult(const Type *RetTy) {
+      (void)RetTy; // Otherwise unused - avoid compiler warning.
       // There is nothing to do here if we return a scalar or void.
       assert(DestLoc == 0 &&
              "Call returns a scalar but caller expects aggregate!");
@@ -2609,14 +2612,16 @@
     /// HandleAggregateResultAsScalar - This callback is invoked if the function
     /// returns an aggregate value by bit converting it to the specified scalar
     /// type and returning that.
-    void HandleAggregateResultAsScalar(const Type *ScalarTy ATTRIBUTE_UNUSED,
+    void HandleAggregateResultAsScalar(const Type *ScalarTy,
                                        unsigned Offset = 0) {
+      (void)ScalarTy; // Otherwise unused - avoid compiler warning.
       this->Offset = Offset;
     }
 
     /// HandleAggregateResultAsAggregate - This callback is invoked if the
     /// function returns an aggregate value using multiple return values.
-    void HandleAggregateResultAsAggregate(const Type *AggrTy ATTRIBUTE_UNUSED) {
+    void HandleAggregateResultAsAggregate(const Type *AggrTy) {
+      (void)AggrTy; // Otherwise unused - avoid compiler warning.
       // There is nothing to do here.
       isAggrRet = true;
     }
@@ -2625,8 +2630,8 @@
     /// returns an aggregate value by using a "shadow" first parameter.  If
     /// RetPtr is set to true, the pointer argument itself is returned from the
     /// function.
-    void HandleAggregateShadowResult(const PointerType *PtrArgTy,
-                                     bool RetPtr ATTRIBUTE_UNUSED) {
+    void HandleAggregateShadowResult(const PointerType *PtrArgTy, bool RetPtr) {
+      (void)RetPtr; // Otherwise unused - avoid compiler warning.
       // We need to pass memory to write the return value into.
       // FIXME: alignment and volatility are being ignored!
       assert(!DestLoc || PtrArgTy == DestLoc->Ptr->getType());
@@ -2659,8 +2664,8 @@
     /// returns a scalar value by using a "shadow" first parameter, which is a
     /// pointer to the scalar, of type PtrArgTy.  If RetPtr is set to true,
     /// the pointer argument itself is returned from the function.
-    void HandleScalarShadowResult(const PointerType *PtrArgTy,
-                                  bool RetPtr ATTRIBUTE_UNUSED) {
+    void HandleScalarShadowResult(const PointerType *PtrArgTy, bool RetPtr) {
+      (void)RetPtr; // Otherwise unused - avoid compiler warning.
       assert(DestLoc == 0 &&
              "Call returns a scalar but caller expects aggregate!");
       // Create a buffer to hold the result.  The result will be loaded out of
@@ -2700,7 +2705,8 @@
     /// pointer (of type PtrTy) to the argument is passed rather than the
     /// argument itself.
     void HandleByInvisibleReferenceArgument(const llvm::Type *PtrTy,
-                                            tree type ATTRIBUTE_UNUSED) {
+                                            tree type) {
+      (void)type; // Otherwise unused - avoid compiler warning.
       Value *Loc = getAddress();
       Loc = Builder.CreateBitCast(Loc, PtrTy);
       CallOperands.push_back(Loc);
@@ -2709,19 +2715,21 @@
     /// HandleByValArgument - This callback is invoked if the aggregate function
     /// argument is passed by value. It is lowered to a parameter passed by
     /// reference with an additional parameter attribute "ByVal".
-    void HandleByValArgument(const llvm::Type *LLVMTy,
-                             tree type ATTRIBUTE_UNUSED) {
+    void HandleByValArgument(const llvm::Type *LLVMTy, tree type) {
+      (void)type; // Otherwise unused - avoid compiler warning.
       Value *Loc = getAddress();
       assert(LLVMTy->getPointerTo() == Loc->getType());
+      (void)LLVMTy; // Otherwise unused if asserts off - avoid compiler warning.
       CallOperands.push_back(Loc);
     }
 
     /// HandleFCAArgument - This callback is invoked if the aggregate function
     /// argument is passed as a first class aggregate.
-    void HandleFCAArgument(const llvm::Type *LLVMTy,
-                           tree type ATTRIBUTE_UNUSED) {
+    void HandleFCAArgument(const llvm::Type *LLVMTy, tree type) {
+      (void)type; // Otherwise unused - avoid compiler warning.
       Value *Loc = getAddress();
       assert(LLVMTy->getPointerTo() == Loc->getType());
+      (void)LLVMTy; // Otherwise unused if asserts off - avoid compiler warning.
       CallOperands.push_back(Builder.CreateLoad(Loc));
     }
 
@@ -4638,8 +4646,8 @@
   return true;
 }
 
-bool TreeToLLVM::EmitBuiltinBZero(gimple stmt,
-                                  Value *&Result ATTRIBUTE_UNUSED) {
+bool TreeToLLVM::EmitBuiltinBZero(gimple stmt, Value *&Result) {
+  (void)Result; // Otherwise unused - avoid compiler warning.
   if (!validate_gimple_arglist(stmt, POINTER_TYPE, INTEGER_TYPE, VOID_TYPE))
     return false;
 
@@ -4863,8 +4871,8 @@
   return true;
 }
 
-bool TreeToLLVM::EmitBuiltinEHReturn(gimple stmt,
-                                     Value *&Result ATTRIBUTE_UNUSED) {
+bool TreeToLLVM::EmitBuiltinEHReturn(gimple stmt, Value *&Result) {
+  (void)Result; // Otherwise unused - avoid compiler warning.
   if (!validate_gimple_arglist(stmt, INTEGER_TYPE, POINTER_TYPE, VOID_TYPE))
     return false;
 
@@ -4886,8 +4894,8 @@
   return true;
 }
 
-bool TreeToLLVM::EmitBuiltinInitDwarfRegSizes(gimple stmt,
-                                              Value *&Result ATTRIBUTE_UNUSED) {
+bool TreeToLLVM::EmitBuiltinInitDwarfRegSizes(gimple stmt, Value *&Result) {
+  (void)Result; // Otherwise unused - avoid compiler warning.
 #ifdef DWARF2_UNWIND_INFO
   unsigned int i;
   bool wrote_return_column = false;
@@ -4953,8 +4961,8 @@
   return true;
 }
 
-bool TreeToLLVM::EmitBuiltinUnwindInit(gimple stmt,
-                                       Value *&Result ATTRIBUTE_UNUSED) {
+bool TreeToLLVM::EmitBuiltinUnwindInit(gimple stmt, Value *&Result) {
+  (void)Result; // Otherwise unused - avoid compiler warning.
   if (!validate_gimple_arglist(stmt, VOID_TYPE))
     return false;
 
@@ -5075,8 +5083,8 @@
   return true;
 }
 
-bool TreeToLLVM::EmitBuiltinInitTrampoline(gimple stmt,
-                                           Value *&Result ATTRIBUTE_UNUSED) {
+bool TreeToLLVM::EmitBuiltinInitTrampoline(gimple stmt, Value *&Result) {
+  (void)Result; // Otherwise unused - avoid compiler warning.
   if (!validate_gimple_arglist(stmt, POINTER_TYPE, POINTER_TYPE, POINTER_TYPE,
                          VOID_TYPE))
     return false;

Modified: dragonegg/trunk/llvm-types.cpp
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/llvm-types.cpp?rev=116921&r1=116920&r2=116921&view=diff
==============================================================================
--- dragonegg/trunk/llvm-types.cpp (original)
+++ dragonegg/trunk/llvm-types.cpp Wed Oct 20 04:40:49 2010
@@ -1027,7 +1027,8 @@
     }
 
     void HandleScalarArgument(const llvm::Type *LLVMTy, tree type,
-                              unsigned RealSize ATTRIBUTE_UNUSED = 0) {
+                              unsigned RealSize = 0) {
+      (void)RealSize; // Otherwise unused - avoid compiler warning.
       if (KNRPromotion) {
         if (type == float_type_node)
           LLVMTy = ConvertType(double_type_node);
@@ -1040,8 +1041,8 @@
 
     /// HandleByInvisibleReferenceArgument - This callback is invoked if a pointer
     /// (of type PtrTy) to the argument is passed rather than the argument itself.
-    void HandleByInvisibleReferenceArgument(const llvm::Type *PtrTy,
-                                            tree type ATTRIBUTE_UNUSED) {
+    void HandleByInvisibleReferenceArgument(const llvm::Type *PtrTy, tree type) {
+      (void)type; // Otherwise unused - avoid compiler warning.
       ArgTypes.push_back(PtrTy);
     }
 
@@ -1054,8 +1055,8 @@
 
     /// HandleFCAArgument - This callback is invoked if the aggregate function
     /// argument is a first class aggregate passed by value.
-    void HandleFCAArgument(const llvm::Type *LLVMTy,
-                           tree type ATTRIBUTE_UNUSED) {
+    void HandleFCAArgument(const llvm::Type *LLVMTy, tree type) {
+      (void)type; // Otherwise unused - avoid compiler warning.
       ArgTypes.push_back(LLVMTy);
     }
   };
@@ -1461,9 +1462,9 @@
   /// includes the specified byte, remove it. Return true struct
   /// layout is sized properly. Return false if unable to handle ByteOffset.
   /// In this case caller should redo this struct as a packed structure.
-  bool ResizeLastElementIfOverlapsWith(uint64_t ByteOffset,
-                                       tree Field ATTRIBUTE_UNUSED,
+  bool ResizeLastElementIfOverlapsWith(uint64_t ByteOffset, tree Field,
                                        const Type *Ty) {
+    (void)Field; // Otherwise unused - avoid compiler warning.
     const Type *SavedTy = NULL;
 
     if (!Elements.empty()) {

Modified: dragonegg/trunk/x86/llvm-target.cpp
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/x86/llvm-target.cpp?rev=116921&r1=116920&r2=116921&view=diff
==============================================================================
--- dragonegg/trunk/x86/llvm-target.cpp (original)
+++ dragonegg/trunk/x86/llvm-target.cpp Wed Oct 20 04:40:49 2010
@@ -88,10 +88,11 @@
  */
 bool TreeToLLVM::TargetIntrinsicLower(gimple stmt,
                                       tree fndecl,
-                                      const MemRef *DestLoc ATTRIBUTE_UNUSED,
+                                      const MemRef *DestLoc,
                                       Value *&Result,
                                       const Type *ResultType,
                                       std::vector<Value*> &Ops) {
+  (void)DestLoc; // Otherwise unused - avoid compiler warning.
   // DECL_FUNCTION_CODE contains a value of the enumerated type ix86_builtins,
   // declared in i386.c.  If this type was visible to us then we could simply
   // use a switch statement on DECL_FUNCTION_CODE to jump to the right code for
@@ -1325,9 +1326,9 @@
 /// The original implementation of this routine is based on
 /// llvm_x86_64_should_pass_aggregate_in_mixed_regs code.
 void
-llvm_x86_64_get_multiple_return_reg_classes(tree TreeType,
-                                            const Type *Ty ATTRIBUTE_UNUSED,
+llvm_x86_64_get_multiple_return_reg_classes(tree TreeType, const Type *Ty,
                                             std::vector<const Type*> &Elts) {
+  (void)Ty; // Otherwise unused - avoid compiler warning.
   enum x86_64_reg_class Class[MAX_CLASSES];
   enum machine_mode Mode = type_natural_mode(TreeType, NULL);
   HOST_WIDE_INT Bytes =



From grosbach at apple.com  Wed Oct 20 09:18:05 2010
From: grosbach at apple.com (Jim Grosbach)
Date: Wed, 20 Oct 2010 07:18:05 -0700
Subject: [llvm-commits] [llvm] r116785 -
	/llvm/trunk/lib/System/Win32/ThreadLocal.inc
In-Reply-To: <AANLkTikk7_tMD8jCFr3R_v2UwrFGXkXLwMfidM6o-vbY@mail.gmail.com>
References: <20101019012202.27CB12A6C12C@llvm.org>
	<EEC41DAD-8F68-4CA7-BA38-F2E3978A8E04@apple.com>
	<0B4E5E66-4CA0-441F-B6B9-D93C1D3F2F1A@apple.com>
	<AANLkTikk7_tMD8jCFr3R_v2UwrFGXkXLwMfidM6o-vbY@mail.gmail.com>
Message-ID: <5A71E1D4-244B-488E-98D1-C0C487482AA1@apple.com>

Hello,

I agree that Bill's suggestion is better. Thank you for your contributions!

-Jim

On Oct 19, 2010, at 7:33 PM, NAKAMURA Takumi wrote:

> Bill san, Jim san,
> 
> Thank you to give me comments.
> I am sorry I remembered only the fixup in lib/System/RWMutex.cpp at 110667,
> and I commited similarly.
> 
> I think it would be better to take Bill's way. May I fix up 2 files
> with attached patch?
> 
> ...Takumi
> 
> ps. I can still see some points with grep -nri '(void)[A-Z][0-9A-Z]*;'
> | fgrep -iv warning
> 
> 
> 2010/10/20 Bill Wendling <wendling at apple.com>:
>> Or better yet, use the ATTRIBUTE_UNUSED attribute in
>> llvm/Support/Compiler.h.
>> -bw
>> On Oct 19, 2010, at 9:16 AM, Jim Grosbach wrote:
>> 
>> Can you add a comment saying why that line is necessary? Otherwise some well
>> meaning person may remove the "unusued" statement.
>> 
>> -Jim
>> 
>> On Oct 18, 2010, at 6:22 PM, NAKAMURA Takumi wrote:
>> 
>> Author: chapuni
>> 
>> Date: Mon Oct 18 20:22:01 2010
>> 
>> New Revision: 116785
>> 
>> URL: http://llvm.org/viewvc/llvm-project?rev=116785&view=rev
>> 
>> Log:
>> 
>> lib/System/Win32/ThreadLocal.inc: Suppress "unused" warning on -Asserts.
>> 
>> Modified:
>> 
>>   llvm/trunk/lib/System/Win32/ThreadLocal.inc
>> 
>> Modified: llvm/trunk/lib/System/Win32/ThreadLocal.inc
>> 
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Win32/ThreadLocal.inc?rev=116785&r1=116784&r2=116785&view=diff
>> 
>> ==============================================================================
>> 
>> --- llvm/trunk/lib/System/Win32/ThreadLocal.inc (original)
>> 
>> +++ llvm/trunk/lib/System/Win32/ThreadLocal.inc Mon Oct 18 20:22:01 2010
>> 
>> @@ -44,6 +44,7 @@
>> 
>>  DWORD* tls = static_cast<DWORD*>(data);
>> 
>>  int errorcode = TlsSetValue(*tls, const_cast<void*>(d));
>> 
>>  assert(errorcode != 0);
>> 
>> +  (void)errorcode;
>> 
>> }
>> 
>> void ThreadLocalImpl::removeInstance() {
>> 
>> 
>> _______________________________________________
>> 
>> llvm-commits mailing list
>> 
>> llvm-commits at cs.uiuc.edu
>> 
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>> 
>> 
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>> 
>> 
> <unused-var.diff.txt>



From ggreif at gmail.com  Wed Oct 20 09:20:34 2010
From: ggreif at gmail.com (Gabor Greif)
Date: Wed, 20 Oct 2010 16:20:34 +0200
Subject: [llvm-commits] ARMCodeEmitter endianness problem
Message-ID: <AANLkTikpq4UO3CJ8ePNueMy90zZX4CxrrbaGf4h3xDiZ@mail.gmail.com>

Following fragment of ARMCodeEmitter.cpp seems to be endian-dependent:

    } else if (const ConstantInt *CI = dyn_cast<ConstantInt>(CV)) {
      uint32_t Val = *(uint32_t*)CI->getValue().getRawData();
      emitWordLE(Val);


I get this GCC warning:

/home/ggreif/llvm/lib/Target/ARM/ARMCodeEmitter.cpp:506: warning: cast
from `const uint64_t*' to `uint32_t*' discards qualifiers from pointer
target type

I suppose the raw value should be dereferenced first to obtain an
uint64_t and then truncated:

      uint32_t Val = uint32_t(*CI->getValue().getRawData());

Somebody should fix this :-)

Cheers,

    Gabor

From rafael.espindola at gmail.com  Wed Oct 20 10:11:19 2010
From: rafael.espindola at gmail.com (=?UTF-8?Q?Rafael_Esp=C3=ADndola?=)
Date: Wed, 20 Oct 2010 11:11:19 -0400
Subject: [llvm-commits] Proof of concept patch for unifying the .s/ELF
 emission of .ARM.attributes
In-Reply-To: <AANLkTikXC0jb1VQ--c7iAgX6=DvpTHD_prwSF9F2Tjm4@mail.gmail.com>
References: <AANLkTikSjtvxSNc0oxKEoG2LdGriz10OXOTAtC4caR_+@mail.gmail.com>
	<AANLkTikaS4qjUi+5q3YWt_GF5EdWKVNwxq7=-LyWRRpv@mail.gmail.com>
	<AANLkTinH7mZtZSQKDYMOE9C8-0baHwm31crmp30roWKy@mail.gmail.com>
	<AANLkTimhWm3dCbO003ipXkaDS3f0o948b9b2NquVSe29@mail.gmail.com>
	<AANLkTi=2B7Pk9HkkxYvQBvm-AfJsYCHW8uYxURq5iEcd@mail.gmail.com>
	<AANLkTi=iVAmVx08ww0EOu9DvJ82oxWD+02Es3btVSqK2@mail.gmail.com>
	<AANLkTin5KdNX6g+ZRYJS0nNy6=bu4o4gwa6v5-XNwkW9@mail.gmail.com>
	<AANLkTikAPuZKYLf4iisi=C4v2onfz5qCXQ-mo2s62UNq@mail.gmail.com>
	<6D9C9A6C-872A-494D-A5F6-2523DD4CA5B6@apple.com>
	<AANLkTi=4=8T0ww0csECny4t0RMSrJV=nUT77h+759-Ab@mail.gmail.com>
	<8FD08C3F-E6E1-448B-A384-7E5CF0763EC1@apple.com>
	<AANLkTikH8sEANQrDGVHg1uOtfCs2UzygkUPpm91E9kZc@mail.gmail.com>
	<AANLkTimoHYSw=viMcpZLirRqd789_xjWmT4+foao_T6f@mail.gmail.com>
	<8E5A9C6C-BA61-41F8-B445-336D9F96D774@apple.com>
	<AANLkTiksC9MbzDhYrzLs9Kt5YRGuHu2nv3Jri=-xRKb9@mail.gmail.com>
	<AANLkTi=73V-VRH_HGiPwcQjBNcFZMiU+jazHMH3YdJ-V@mail.gmail.com>
	<AANLkTikGWx7GH5VZUByposdJWhhvc+qR6X-1Ve_gNmKG@mail.gmail.com>
	<AANLkTik7AYHB1_Crv6Vcf4uMyx4U_x5mJaYK+-S3=ucU@mail.gmail.com>
	<AANLkTi=e_fCXZo_H1=_47tv5BABbpHkf8qJiyrMfRFj_@mail.gmail.com>
	<AANLkTi=MArF+PJK1iwc66wZNobOTjC6pi127Kt=A64bp@mail.gmail.com>
	<AANLkTimHKpEKfy2mr_UKco+Uscg_YBDtCmvXhT4AhAnp@mail.gmail.com>
	<AANLkTimt3NyHcqEh38hn+FnUNL_O5Qv81OYjzE7d0Qf1@mail.gmail.com>
	<AANLkTin8ykW=j=arKX3wC-CX2adx0sTtUmYMJr7qYqJY@mail.gmail.com>
	<AANLkTikXC0jb1VQ--c7iAgX6=DvpTHD_prwSF9F2Tjm4@mail.gmail.com>
Message-ID: <AANLkTi=SBh85q-m-SvA4nNj9DfdUDXgYmxs6u9Zc4w7s@mail.gmail.com>

> Does this make sense? Am I missing something?

Yes. Unnecessary member variables can make the code hard to reason
about. Not as bad as global ones, but similar issue. You are also
missing that some of the variables were *fully* unused or just
initialized to NULL.

The attached patch is a modified version of yours that illustrates
some of the issues.

Cheers,
Rafael
-------------- next part --------------
A non-text attachment was scrubbed...
Name: t.patch
Type: text/x-patch
Size: 12080 bytes
Desc: not available
Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101020/93336aba/attachment-0001.bin 

From bigcheesegs at gmail.com  Wed Oct 20 10:23:58 2010
From: bigcheesegs at gmail.com (Michael J. Spencer)
Date: Wed, 20 Oct 2010 15:23:58 -0000
Subject: [llvm-commits] [llvm] r116925 -
	/llvm/trunk/lib/System/Win32/Path.inc
Message-ID: <20101020152359.0475D2A6C12C@llvm.org>

Author: mspencer
Date: Wed Oct 20 10:23:58 2010
New Revision: 116925

URL: http://llvm.org/viewvc/llvm-project?rev=116925&view=rev
Log:
System-Win32/Path: Fix incorrect assumption in isValid.

A recent commit to clang exposed a bug in the Win32 Path code. This is a
minimal fix for it.

Modified:
    llvm/trunk/lib/System/Win32/Path.inc

Modified: llvm/trunk/lib/System/Win32/Path.inc
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Win32/Path.inc?rev=116925&r1=116924&r2=116925&view=diff
==============================================================================
--- llvm/trunk/lib/System/Win32/Path.inc (original)
+++ llvm/trunk/lib/System/Win32/Path.inc Wed Oct 20 10:23:58 2010
@@ -64,6 +64,13 @@
   return *this;
 }
 
+// push_back 0 on create, and pop_back on delete.
+struct ScopedNullTerminator {
+  std::string &str;
+  ScopedNullTerminator(std::string &s) : str(s) { str.push_back(0); }
+  ~ScopedNullTerminator() { str.pop_back(); }
+};
+
 bool
 Path::isValid() const {
   if (path.empty())
@@ -72,6 +79,8 @@
   // If there is a colon, it must be the second character, preceded by a letter
   // and followed by something.
   size_t len = path.size();
+  // This code assumes that path is null terminated, so make sure it is.
+  ScopedNullTerminator snt(path);
   size_t pos = path.rfind(':',len);
   size_t rootslash = 0;
   if (pos != std::string::npos) {



From rafael.espindola at gmail.com  Wed Oct 20 10:28:05 2010
From: rafael.espindola at gmail.com (=?UTF-8?Q?Rafael_Esp=C3=ADndola?=)
Date: Wed, 20 Oct 2010 11:28:05 -0400
Subject: [llvm-commits] [rfc][patch] How should we handle
	_GLOBAL_OFFSET_TABLE_?
In-Reply-To: <AANLkTinD5uU-ANCPECjQ7y87yL-gw66jRXO5=AjweFua@mail.gmail.com>
References: <AANLkTi=sTA0ri5+r=-gSoi9MAJQkohwsh0o6MkqdT3TQ@mail.gmail.com>
	<AANLkTinD5uU-ANCPECjQ7y87yL-gw66jRXO5=AjweFua@mail.gmail.com>
Message-ID: <AANLkTik-ueowNktvOdswg=8yKoQK_Tuka1Eh6UkjmvJb@mail.gmail.com>

>> The "2" in the add comes from the first two bytes. This is a special
>> treatment for _GLOBAL_OFFSET_TABLE_. It also produces a special kind
>> of relocation (R_386_GOTPC).
>
> Is it too late to do it when the special relocation is generated? Or
> does that happen inside the ELF streamer/writer?

Yes and yes. It is done by just checking the symbol name. At that
point the instruction will already be concatenated with previous
instructions and I cannot compute the offset from the start of it.

>> The relocation kind can be handled in the writer (and is). The problem
>> is that it is then too late to find the offset of the relocation
>> inside the instruction. This patch does it by modifying
>> X86MCCodeEmitter.cpp. This might be undesirable as this code is also
>> used for non-ELF targets.
>
> I tend to dislike relying on string literals, but this patch seems to
> be fine for now. The relocation is x86 specific, so I would think that
> it is OK for this to occur in the x86 back-end.

I *really* dislike the use of a magical symbol name, unfortunately
that is what the ELF x86 ABI does :-( My hope was to put this is a
ELF/x86 only place. Right now it also affects COFF and MachO.

>> Any better ideas on how to implement this?
>
> I would prefer this happen whenever the relocation is generated in the
> x86 backend. Object file formats really shouldn't care about
> instructions. I don't object to adding an object specific hook, but it
> does seem to be of limited use.

It is. It was just my desire to keep this out of non-ELF systems.

>> P.S.: Ugly as the attached patch is, it gets clang to build itself on
>> 32 bits with the integrated assembler :-)
>>
>> Cheers,
>> Rafael
>
> This patch (with some comments) looks fine to me for now, but I would
> prefer a solution that doesn't depend on the symbol name.

Thanks. I will add comments and commit. One possible future
improvement is to produce a new FixupKind so that the string compare
happens in only one place.

> - Michael Spencer
>

Cheers,
Rafael

From bigcheesegs at gmail.com  Wed Oct 20 10:41:42 2010
From: bigcheesegs at gmail.com (Michael Spencer)
Date: Wed, 20 Oct 2010 11:41:42 -0400
Subject: [llvm-commits] [rfc][patch] How should we handle
	_GLOBAL_OFFSET_TABLE_?
In-Reply-To: <AANLkTik-ueowNktvOdswg=8yKoQK_Tuka1Eh6UkjmvJb@mail.gmail.com>
References: <AANLkTi=sTA0ri5+r=-gSoi9MAJQkohwsh0o6MkqdT3TQ@mail.gmail.com>
	<AANLkTinD5uU-ANCPECjQ7y87yL-gw66jRXO5=AjweFua@mail.gmail.com>
	<AANLkTik-ueowNktvOdswg=8yKoQK_Tuka1Eh6UkjmvJb@mail.gmail.com>
Message-ID: <AANLkTi=dgDD1=U5KJqgsDLvrGZTFxAAjA-xUctH_2kMr@mail.gmail.com>

2010/10/20 Rafael Esp?ndola <rafael.espindola at gmail.com>:
>>> The "2" in the add comes from the first two bytes. This is a special
>>> treatment for _GLOBAL_OFFSET_TABLE_. It also produces a special kind
>>> of relocation (R_386_GOTPC).
>>
>> Is it too late to do it when the special relocation is generated? Or
>> does that happen inside the ELF streamer/writer?
>
> Yes and yes. It is done by just checking the symbol name. At that
> point the instruction will already be concatenated with previous
> instructions and I cannot compute the offset from the start of it.
>
>>> The relocation kind can be handled in the writer (and is). The problem
>>> is that it is then too late to find the offset of the relocation
>>> inside the instruction. This patch does it by modifying
>>> X86MCCodeEmitter.cpp. This might be undesirable as this code is also
>>> used for non-ELF targets.
>>
>> I tend to dislike relying on string literals, but this patch seems to
>> be fine for now. The relocation is x86 specific, so I would think that
>> it is OK for this to occur in the x86 back-end.
>
> I *really* dislike the use of a magical symbol name, unfortunately
> that is what the ELF x86 ABI does :-( My hope was to put this is a
> ELF/x86 only place. Right now it also affects COFF and MachO.
>
>>> Any better ideas on how to implement this?
>>
>> I would prefer this happen whenever the relocation is generated in the
>> x86 backend. Object file formats really shouldn't care about
>> instructions. I don't object to adding an object specific hook, but it
>> does seem to be of limited use.
>
> It is. It was just my desire to keep this out of non-ELF systems.
>
>>> P.S.: Ugly as the attached patch is, it gets clang to build itself on
>>> 32 bits with the integrated assembler :-)
>>>
>>> Cheers,
>>> Rafael
>>
>> This patch (with some comments) looks fine to me for now, but I would
>> prefer a solution that doesn't depend on the symbol name.
>
> Thanks. I will add comments and commit. One possible future
> improvement is to produce a new FixupKind so that the string compare
> happens in only one place.

I like that idea.

- Michael Spencer

>> - Michael Spencer
>>
>
> Cheers,
> Rafael
>


From bigcheesegs at gmail.com  Wed Oct 20 11:00:45 2010
From: bigcheesegs at gmail.com (Michael J. Spencer)
Date: Wed, 20 Oct 2010 16:00:45 -0000
Subject: [llvm-commits] [llvm] r116927 -
	/llvm/trunk/lib/System/Win32/Path.inc
Message-ID: <20101020160045.63D8E2A6C12C@llvm.org>

Author: mspencer
Date: Wed Oct 20 11:00:45 2010
New Revision: 116927

URL: http://llvm.org/viewvc/llvm-project?rev=116927&view=rev
Log:
Use C++03...

Modified:
    llvm/trunk/lib/System/Win32/Path.inc

Modified: llvm/trunk/lib/System/Win32/Path.inc
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Win32/Path.inc?rev=116927&r1=116926&r2=116927&view=diff
==============================================================================
--- llvm/trunk/lib/System/Win32/Path.inc (original)
+++ llvm/trunk/lib/System/Win32/Path.inc Wed Oct 20 11:00:45 2010
@@ -68,7 +68,12 @@
 struct ScopedNullTerminator {
   std::string &str;
   ScopedNullTerminator(std::string &s) : str(s) { str.push_back(0); }
-  ~ScopedNullTerminator() { str.pop_back(); }
+  ~ScopedNullTerminator() {
+    // str.pop_back(); But wait, C++03 doesn't have this...
+    assert(!str.empty() && str[str.size() - 1] == 0
+      && "Null char not present!");
+    str.resize(str.size() - 1);
+  }
 };
 
 bool



From dpatel at apple.com  Wed Oct 20 11:25:25 2010
From: dpatel at apple.com (Devang Patel)
Date: Wed, 20 Oct 2010 09:25:25 -0700
Subject: [llvm-commits] [PATCH] Add RegionPass framework
In-Reply-To: <4CB5964E.2080407@fim.uni-passau.de>
References: <4CB5964E.2080407@fim.uni-passau.de>
Message-ID: <FB93C502-221A-4830-B388-FC60663505FA@apple.com>

On Oct 13, 2010, at 4:21 AM, Tobias Grosser wrote:

> Hi,
> 
> ether and I would like to add a RegionPass framework to LLVM. RegionPasses are like loop passes, except that they are working on Regions provided by the RegionInfo pass instead of Loops provided by the LoopInfo pass.
> 
> The RegionPass framework was tested intensively in the Polly[1] project, where it is used since about March.
> 
> The patch contains all documentation as well as a very simple pass framework which works like the LoopPasses. We do not propose the functions needed to add/remove regions on the fly to keep the framework
> as simple as possible.
> 
> Thanks for your review
> Tobi
> 
> [1] http://wiki.llvm.org/Polyhedral_optimization_framework
> <0001-Add-RegionPass-framework.patch>_______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits


> diff --git a/include/llvm/Pass.h b/include/llvm/Pass.h
> index f4c6eed..ed0fb39 100644
> --- a/include/llvm/Pass.h
> +++ b/include/llvm/Pass.h
> @@ -57,6 +57,7 @@ enum PassManagerType {
>    PMT_CallGraphPassManager,  ///< CGPassManager
>    PMT_FunctionPassManager,   ///< FPPassManager
>    PMT_LoopPassManager,       ///< LPPassManager
> +  PMT_RegionPassManager,     ///< RGPassManager
>    PMT_BasicBlockPassManager, ///< BBPassManager
>    PMT_Last
>  };


> +// Check if this pass is suitable for the current RGPassManager, if
> +// available. This pass P is not suitable for a RGPassManager if P
> +// is not preserving higher level analysis info used by other
> +// RGPassManager passes. In such case, pop RGPassManager from the
> +// stack. This will force assignPassManager() to create new
> +// LPPassManger as expected.
> +void RegionPass::preparePassManager(PMStack &PMS) {
> +
> +  // Find RGPassManager
> +  while (!PMS.empty() &&
> +         PMS.top()->getPassManagerType() > PMT_RegionPassManager)
> +    PMS.pop();
> +


This means, if you have two region passes RGP1 & RGP2 and one loop pass LP1 in RGP1, LP1, RGP2 then LP1 will terminate RGPAssManager instance created for RGP1. In other words, you'll get following execution sequence

run RGP1 on region1
run RGP1 on region2
run LP1 on Loop 1 in region 1
run LP1 on Loop 2 in region 1
run LP1 on Loop 3 in region 2
run RGP2 on region 1
run RGP2 on region 2

If this is what you expect then this is fine. However this won't work, if you expect following pass execution sequence.

run RGP1 on region1
run LP1 on Loop 1 in region 1
run LP1 on Loop 2 in region 1
run RGP2 on region 1
run RGP1 on region2
run LP1 on Loop 3 in region 2
run RGP2 on region 2

Just a thought, may this doesn't matter. 
-
Devang


From grosser at fim.uni-passau.de  Wed Oct 20 11:33:56 2010
From: grosser at fim.uni-passau.de (Tobias Grosser)
Date: Wed, 20 Oct 2010 12:33:56 -0400
Subject: [llvm-commits] [PATCH] Add RegionPass framework
In-Reply-To: <FB93C502-221A-4830-B388-FC60663505FA@apple.com>
References: <4CB5964E.2080407@fim.uni-passau.de>
	<FB93C502-221A-4830-B388-FC60663505FA@apple.com>
Message-ID: <4CBF19F4.7020001@fim.uni-passau.de>

On 10/20/2010 12:25 PM, Devang Patel wrote:
> On Oct 13, 2010, at 4:21 AM, Tobias Grosser wrote:
>
>> Hi,
>>
>> ether and I would like to add a RegionPass framework to LLVM. RegionPasses are like loop passes, except that they are working on Regions provided by the RegionInfo pass instead of Loops provided by the LoopInfo pass.
>>
>> The RegionPass framework was tested intensively in the Polly[1] project, where it is used since about March.
>>
>> The patch contains all documentation as well as a very simple pass framework which works like the LoopPasses. We do not propose the functions needed to add/remove regions on the fly to keep the framework
>> as simple as possible.
>>
>> Thanks for your review
>> Tobi
>>
>> [1] http://wiki.llvm.org/Polyhedral_optimization_framework
>> <0001-Add-RegionPass-framework.patch>_______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
>
>> diff --git a/include/llvm/Pass.h b/include/llvm/Pass.h
>> index f4c6eed..ed0fb39 100644
>> --- a/include/llvm/Pass.h
>> +++ b/include/llvm/Pass.h
>> @@ -57,6 +57,7 @@ enum PassManagerType {
>>     PMT_CallGraphPassManager,  ///<  CGPassManager
>>     PMT_FunctionPassManager,   ///<  FPPassManager
>>     PMT_LoopPassManager,       ///<  LPPassManager
>> +  PMT_RegionPassManager,     ///<  RGPassManager
>>     PMT_BasicBlockPassManager, ///<  BBPassManager
>>     PMT_Last
>>   };
>
>
>> +// Check if this pass is suitable for the current RGPassManager, if
>> +// available. This pass P is not suitable for a RGPassManager if P
>> +// is not preserving higher level analysis info used by other
>> +// RGPassManager passes. In such case, pop RGPassManager from the
>> +// stack. This will force assignPassManager() to create new
>> +// LPPassManger as expected.
>> +void RegionPass::preparePassManager(PMStack&PMS) {
>> +
>> +  // Find RGPassManager
>> +  while (!PMS.empty()&&
>> +         PMS.top()->getPassManagerType()>  PMT_RegionPassManager)
>> +    PMS.pop();
>> +
>
>
> This means, if you have two region passes RGP1&  RGP2 and one loop pass LP1 in RGP1, LP1, RGP2 then LP1 will terminate RGPAssManager instance created for RGP1. In other words, you'll get following execution sequence
>
> run RGP1 on region1
> run RGP1 on region2
> run LP1 on Loop 1 in region 1
> run LP1 on Loop 2 in region 1
> run LP1 on Loop 3 in region 2
> run RGP2 on region 1
> run RGP2 on region 2
>
> If this is what you expect then this is fine. However this won't work, if you expect following pass execution sequence.
>
> run RGP1 on region1
> run LP1 on Loop 1 in region 1
> run LP1 on Loop 2 in region 1
> run RGP2 on region 1
> run RGP1 on region2
> run LP1 on Loop 3 in region 2
> run RGP2 on region 2
>
> Just a thought, may this doesn't matter.

Hi,

you are right. At the moment the first sequence is executed, because 
there is no nesting defined between loops or regions, like it is for
function > loop > basicblock.

So loops and regions are on the same level as

function > region > basicblock

holds.

However comparing region and loop does not give any nesting.

At the moment this is fine as we do either use loop or region passes for 
our work in Polly. If future users of the region passes need a different 
behavior I am open for discussions.

Cheers

Tobi



From rafael.espindola at gmail.com  Wed Oct 20 11:46:08 2010
From: rafael.espindola at gmail.com (Rafael Espindola)
Date: Wed, 20 Oct 2010 16:46:08 -0000
Subject: [llvm-commits] [llvm] r116932 - in /llvm/trunk:
 lib/Target/X86/X86MCCodeEmitter.cpp test/MC/ELF/global-offset.s
Message-ID: <20101020164608.80AC12A6C12C@llvm.org>

Author: rafael
Date: Wed Oct 20 11:46:08 2010
New Revision: 116932

URL: http://llvm.org/viewvc/llvm-project?rev=116932&view=rev
Log:
Handle _GLOBAL_OFFSET_TABLE_ correctly.

Added:
    llvm/trunk/test/MC/ELF/global-offset.s
Modified:
    llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp

Modified: llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp?rev=116932&r1=116931&r2=116932&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp Wed Oct 20 11:46:08 2010
@@ -18,6 +18,7 @@
 #include "llvm/MC/MCCodeEmitter.h"
 #include "llvm/MC/MCExpr.h"
 #include "llvm/MC/MCInst.h"
+#include "llvm/MC/MCSymbol.h"
 #include "llvm/Support/raw_ostream.h"
 using namespace llvm;
 
@@ -193,6 +194,25 @@
   return false;
 }
 
+/// StartsWithGlobalOffsetTable - Return true for the simple cases where this
+/// expression starts with _GLOBAL_OFFSET_TABLE_. This is a needed to support
+/// PIC on ELF i386 as that symbol is magic. We check only simple case that
+/// are know to be used: _GLOBAL_OFFSET_TABLE_ by itself or at the start
+/// of a binary expression.
+static bool StartsWithGlobalOffsetTable(const MCExpr *Expr) {
+  if (Expr->getKind() == MCExpr::Binary) {
+    const MCBinaryExpr *BE = static_cast<const MCBinaryExpr *>(Expr);
+    Expr = BE->getLHS();
+  }
+
+  if (Expr->getKind() != MCExpr::SymbolRef)
+    return false;
+
+  const MCSymbolRefExpr *Ref = static_cast<const MCSymbolRefExpr*>(Expr);
+  const MCSymbol &S = Ref->getSymbol();
+  return S.getName() == "_GLOBAL_OFFSET_TABLE_";
+}
+
 void X86MCCodeEmitter::
 EmitImmediate(const MCOperand &DispOp, unsigned Size, MCFixupKind FixupKind,
               unsigned &CurByte, raw_ostream &OS,
@@ -209,6 +229,13 @@
   // If we have an immoffset, add it to the expression.
   const MCExpr *Expr = DispOp.getExpr();
 
+  if (StartsWithGlobalOffsetTable(Expr)) {
+    // FIXME: We should probably change the FixupKind to a special one so that
+    // other parts of MC don't have to check the symbol name.
+    assert(ImmOffset == 0);
+    ImmOffset = CurByte;
+  }
+
   // If the fixup is pc-relative, we need to bias the value to be relative to
   // the start of the field, not the end of the field.
   if (FixupKind == MCFixupKind(X86::reloc_pcrel_4byte) ||

Added: llvm/trunk/test/MC/ELF/global-offset.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/global-offset.s?rev=116932&view=auto
==============================================================================
--- llvm/trunk/test/MC/ELF/global-offset.s (added)
+++ llvm/trunk/test/MC/ELF/global-offset.s Wed Oct 20 11:46:08 2010
@@ -0,0 +1,18 @@
+// RUN: llvm-mc -filetype=obj -triple i386-pc-linux-gnu %s -o - | elf-dump  --dump-section-data | FileCheck  %s
+
+// We test that _GLOBAL_OFFSET_TABLE_ will account for the two bytes at the
+// start of the addl.
+
+        addl    $_GLOBAL_OFFSET_TABLE_, %ebx
+
+// CHECK:      ('sh_name', 0x00000001) # '.text'
+// CHECK-NEXT: ('sh_type',
+// CHECK-NEXT: ('sh_flags',
+// CHECK-NEXT: ('sh_addr',
+// CHECK-NEXT: ('sh_offset',
+// CHECK-NEXT: ('sh_size',
+// CHECK-NEXT: ('sh_link',
+// CHECK-NEXT: ('sh_info',
+// CHECK-NEXT: ('sh_addralign',
+// CHECK-NEXT: ('sh_entsize',
+// CHECK-NEXT: ('_section_data', '81c30200 0000')



From stoklund at 2pi.dk  Wed Oct 20 13:45:55 2010
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Wed, 20 Oct 2010 18:45:55 -0000
Subject: [llvm-commits] [llvm] r116940 -
	/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
Message-ID: <20101020184555.A87532A6C12C@llvm.org>

Author: stoklund
Date: Wed Oct 20 13:45:55 2010
New Revision: 116940

URL: http://llvm.org/viewvc/llvm-project?rev=116940&view=rev
Log:
When SimpleRegisterCoalescing is trimming kill flags on a physical register
operand, also check if subregisters are killed.

Add <imp-def> operands for subregisters that remain alive after a super register
is killed.

I don't have a testcase for this that reproduces on trunk. <rdar://problem/8441758>

Modified:
    llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp

Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=116940&r1=116939&r2=116940&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original)
+++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Wed Oct 20 13:45:55 2010
@@ -1767,8 +1767,18 @@
         if (!MO.isReg() || !MO.isKill()) continue;
         unsigned reg = MO.getReg();
         if (!reg || !li_->hasInterval(reg)) continue;
-        if (!li_->getInterval(reg).killedAt(DefIdx))
+        if (!li_->getInterval(reg).killedAt(DefIdx)) {
           MO.setIsKill(false);
+          continue;
+        }
+        // When leaving a kill flag on a physreg, check if any subregs should
+        // remain alive.
+        if (!TargetRegisterInfo::isPhysicalRegister(reg))
+          continue;
+        for (const unsigned *SR = tri_->getSubRegisters(reg);
+             unsigned S = *SR; ++SR)
+          if (li_->hasInterval(S) && li_->getInterval(S).liveAt(DefIdx))
+            MI->addRegisterDefined(S, tri_);
       }
     }
   }



From espindola at google.com  Wed Oct 20 14:24:51 2010
From: espindola at google.com (Rafael Espindola)
Date: Wed, 20 Oct 2010 15:24:51 -0400
Subject: [llvm-commits] [PATCH][Support] Add Endian.h which contains
 generic code to deal with endian specific data.
In-Reply-To: <AANLkTi=0+2WSjKif9965KPc7J_Tx2aO+6xsjZ00Ot9ji@mail.gmail.com>
References: <AANLkTi=0+2WSjKif9965KPc7J_Tx2aO+6xsjZ00Ot9ji@mail.gmail.com>
Message-ID: <AANLkTi=5rsk1FWWRij0v8w86-yeqQ1MPAC2_u6bUSRBC@mail.gmail.com>

On 14 September 2010 17:53, Michael Spencer <bigcheesegs at gmail.com> wrote:
> The attached patch adds Endian.h to Support. This patch is a
> prerequisite for the object file library I am writing.
>
> Endian.h contains:

Should SwapByteOrder be in here?

> * SwapByteOrderIfDifferent
> This is a templated function that takes a value_type, and returns the
> value if host and target are the same, or returns the value with its
> endianness swapped if they are different.
> (host and target are int's because MSVC doesn't support enums used
> like this. see:
> http://stackoverflow.com/questions/2763836/sfinae-failing-with-enum-template-parameter)

OK

> * endian
> This is a templated struct for reading endian specific data directly
> from memory. It is typedefed based on the host platform's endianness
> (well, not yet, because there's no LLVM_IS_BIG_ENDIAN or such yet).

Why do you always ready data unaligned? The aligned case is probably
the common one, no?

No sure if you need the endian_impl indirection. Can you just move the
definition of host_endianness up and define endian directly? Also, is
the definition of unaligned_access_helper portable?

> * packed_endian_specific_integral
> This is the most important thing included in this patch. This class
> allows the portable creation of packed structs of any integral integer
> value_type and endianness. Any struct that would be POD if it used
> normal integral data types is still POD if it uses these.
>
> This is used extensively in the object file library to directly access
> memory mapped object files. In the case when host and target
> endianness match (and the compiler inlines), using these should
> produce identical code to "*reinterpret_cast<value_type*>(memory)".

Is it common to require unaligned access? If not I would be somewhat
inclined to have the clients handle it. I am worried that a "operator
value_type()" might be a bit too convenient :-). Don't you get cases
where it is unintentionally called? The code gets too ugly if you have
to use an explicit get method?

> - Michael Spencer

Cheers,
-- 
Rafael ?vila de Esp?ndola


From jasonwkim at google.com  Wed Oct 20 15:15:54 2010
From: jasonwkim at google.com (Jason Kim)
Date: Wed, 20 Oct 2010 13:15:54 -0700
Subject: [llvm-commits] Proof of concept patch for unifying the .s/ELF
 emission of .ARM.attributes
In-Reply-To: <AANLkTi=SBh85q-m-SvA4nNj9DfdUDXgYmxs6u9Zc4w7s@mail.gmail.com>
References: <AANLkTikSjtvxSNc0oxKEoG2LdGriz10OXOTAtC4caR_+@mail.gmail.com>
	<AANLkTikaS4qjUi+5q3YWt_GF5EdWKVNwxq7=-LyWRRpv@mail.gmail.com>
	<AANLkTinH7mZtZSQKDYMOE9C8-0baHwm31crmp30roWKy@mail.gmail.com>
	<AANLkTimhWm3dCbO003ipXkaDS3f0o948b9b2NquVSe29@mail.gmail.com>
	<AANLkTi=2B7Pk9HkkxYvQBvm-AfJsYCHW8uYxURq5iEcd@mail.gmail.com>
	<AANLkTi=iVAmVx08ww0EOu9DvJ82oxWD+02Es3btVSqK2@mail.gmail.com>
	<AANLkTin5KdNX6g+ZRYJS0nNy6=bu4o4gwa6v5-XNwkW9@mail.gmail.com>
	<AANLkTikAPuZKYLf4iisi=C4v2onfz5qCXQ-mo2s62UNq@mail.gmail.com>
	<6D9C9A6C-872A-494D-A5F6-2523DD4CA5B6@apple.com>
	<AANLkTi=4=8T0ww0csECny4t0RMSrJV=nUT77h+759-Ab@mail.gmail.com>
	<8FD08C3F-E6E1-448B-A384-7E5CF0763EC1@apple.com>
	<AANLkTikH8sEANQrDGVHg1uOtfCs2UzygkUPpm91E9kZc@mail.gmail.com>
	<AANLkTimoHYSw=viMcpZLirRqd789_xjWmT4+foao_T6f@mail.gmail.com>
	<8E5A9C6C-BA61-41F8-B445-336D9F96D774@apple.com>
	<AANLkTiksC9MbzDhYrzLs9Kt5YRGuHu2nv3Jri=-xRKb9@mail.gmail.com>
	<AANLkTi=73V-VRH_HGiPwcQjBNcFZMiU+jazHMH3YdJ-V@mail.gmail.com>
	<AANLkTikGWx7GH5VZUByposdJWhhvc+qR6X-1Ve_gNmKG@mail.gmail.com>
	<AANLkTik7AYHB1_Crv6Vcf4uMyx4U_x5mJaYK+-S3=ucU@mail.gmail.com>
	<AANLkTi=e_fCXZo_H1=_47tv5BABbpHkf8qJiyrMfRFj_@mail.gmail.com>
	<AANLkTi=MArF+PJK1iwc66wZNobOTjC6pi127Kt=A64bp@mail.gmail.com>
	<AANLkTimHKpEKfy2mr_UKco+Uscg_YBDtCmvXhT4AhAnp@mail.gmail.com>
	<AANLkTimt3NyHcqEh38hn+FnUNL_O5Qv81OYjzE7d0Qf1@mail.gmail.com>
	<AANLkTin8ykW=j=arKX3wC-CX2adx0sTtUmYMJr7qYqJY@mail.gmail.com>
	<AANLkTikXC0jb1VQ--c7iAgX6=DvpTHD_prwSF9F2Tjm4@mail.gmail.com>
	<AANLkTi=SBh85q-m-SvA4nNj9DfdUDXgYmxs6u9Zc4w7s@mail.gmail.com>
Message-ID: <AANLkTinVf83nF2RUWsmRzT1tL=5MMVJdoGHm8h1D6mG6@mail.gmail.com>

On Wed, Oct 20, 2010 at 8:11 AM, Rafael Esp?ndola
<rafael.espindola at gmail.com> wrote:
> missing that some of the variables were *fully* unused or just
> initialized to NULL.

Yikes! Thanks for catching the leftover counters.
Hmm, the other MCDataFragment ptrs are there for making future work
explicit, replacing them with comments is fine too.

Tho I don't quite agree that moving the headFragment to a local var
makes the code really better,
but given that I missed the above, I'll go with your suggestion.
Here's the modified patch - very similar to your rework, plus a NULL
cleanup, some whitespace nits, with the test re-added.

> The attached patch is a modified version of yours that illustrates
> some of the issues.

Gosh, this is taking a while :-)
Is there anything else I missed?

Thanks!

-jason
-------------- next part --------------
A non-text attachment was scrubbed...
Name: arm-mc-elf-s06-mod.patch2
Type: application/octet-stream
Size: 12689 bytes
Desc: not available
Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101020/2acc70e9/attachment.obj 

From bigcheesegs at gmail.com  Wed Oct 20 15:47:41 2010
From: bigcheesegs at gmail.com (Michael Spencer)
Date: Wed, 20 Oct 2010 16:47:41 -0400
Subject: [llvm-commits] [PATCH][Support] Add Endian.h which contains
 generic code to deal with endian specific data.
In-Reply-To: <AANLkTi=5rsk1FWWRij0v8w86-yeqQ1MPAC2_u6bUSRBC@mail.gmail.com>
References: <AANLkTi=0+2WSjKif9965KPc7J_Tx2aO+6xsjZ00Ot9ji@mail.gmail.com>
	<AANLkTi=5rsk1FWWRij0v8w86-yeqQ1MPAC2_u6bUSRBC@mail.gmail.com>
Message-ID: <AANLkTin=MLrebJzLEawVHGgq8cpYYqwNVtGJdy9zQQHR@mail.gmail.com>

On Wed, Oct 20, 2010 at 3:24 PM, Rafael Espindola <espindola at google.com> wrote:
> On 14 September 2010 17:53, Michael Spencer <bigcheesegs at gmail.com> wrote:
>> The attached patch adds Endian.h to Support. This patch is a
>> prerequisite for the object file library I am writing.
>>
>> Endian.h contains:
>
> Should SwapByteOrder be in here?

No, because it contains heavily platform specific code, while this
provides utilities.

>> * SwapByteOrderIfDifferent
>> This is a templated function that takes a value_type, and returns the
>> value if host and target are the same, or returns the value with its
>> endianness swapped if they are different.
>> (host and target are int's because MSVC doesn't support enums used
>> like this. see:
>> http://stackoverflow.com/questions/2763836/sfinae-failing-with-enum-template-parameter)
>
> OK
>
>> * endian
>> This is a templated struct for reading endian specific data directly
>> from memory. It is typedefed based on the host platform's endianness
>> (well, not yet, because there's no LLVM_IS_BIG_ENDIAN or such yet).
>
> Why do you always ready data unaligned? The aligned case is probably
> the common one, no?

Because it's faster to do an unaligned read than check for alignment
first. The unaligned case is very common for COFF, but non existent
for ELF, which is why ELF uses the aligned variant. *

* I just realized that the aligned version of
packed_endian_specific_integral still ends up doing a potentially
unaligned read. While safe, this should be changed to do a direct
read, but still byteswap.

> No sure if you need the endian_impl indirection. Can you just move the
> definition of host_endianness up and define endian directly?

Duh, thanks. I think when I wrote it I was thinking about someone
wanting to use the other case, but that wouldn't make any sense...

> Also, is
> the definition of unaligned_access_helper portable?

It should work on every compiler LLVM works on and has been tested on
MSVC, clang, and gcc; however, it probably should be partially moved
to compiler.h.

I tried using the strict C/C++ version with bit-shifts, however, no
compiler was able to optimize it to just a load on x86. Pack produces
optimal code on x86 and arm, and I assume others.

>> * packed_endian_specific_integral
>> This is the most important thing included in this patch. This class
>> allows the portable creation of packed structs of any integral integer
>> value_type and endianness. Any struct that would be POD if it used
>> normal integral data types is still POD if it uses these.
>>
>> This is used extensively in the object file library to directly access
>> memory mapped object files. In the case when host and target
>> endianness match (and the compiler inlines), using these should
>> produce identical code to "*reinterpret_cast<value_type*>(memory)".
>
> Is it common to require unaligned access?

Yes, all of COFF, a.out and others. Not ELF. I don't know about MachO
yet. There are also other places in LLVM where this is needed.

> If not I would be somewhat
> inclined to have the clients handle it. I am worried that a "operator
> value_type()" might be a bit too convenient :-). Don't you get cases
> where it is unintentionally called? The code gets too ugly if you have
> to use an explicit get method?

I don't see where you wouldn't want it to be called. It should work
exactly as if you just had a value_type except that you can't assign
to it.

Adding an explicit get method would work, but I feel it would just
clutter the code.

>> - Michael Spencer
>
> Cheers,
> --
> Rafael ?vila de Esp?ndola

Thanks for the review.

- Michael Spencer


From dalej at apple.com  Wed Oct 20 16:32:10 2010
From: dalej at apple.com (Dale Johannesen)
Date: Wed, 20 Oct 2010 21:32:10 -0000
Subject: [llvm-commits] [llvm] r116947 - in /llvm/trunk:
 include/llvm/Target/TargetLowering.h
 lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
 lib/CodeGen/SelectionDAG/TargetLowering.cpp
 lib/Target/X86/X86ISelLowering.cpp
Message-ID: <20101020213210.E1FB32A6C12C@llvm.org>

Author: johannes
Date: Wed Oct 20 16:32:10 2010
New Revision: 116947

URL: http://llvm.org/viewvc/llvm-project?rev=116947&view=rev
Log:
Remove Synthesizable from the Type system; as MMX vector
types are no longer Legal on X86, we don't need it.
No functional change.  8499854.


Modified:
    llvm/trunk/include/llvm/Target/TargetLowering.h
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/include/llvm/Target/TargetLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=116947&r1=116946&r2=116947&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetLowering.h (original)
+++ llvm/trunk/include/llvm/Target/TargetLowering.h Wed Oct 20 16:32:10 2010
@@ -204,13 +204,6 @@
     return VT.isSimple() && RegClassForVT[VT.getSimpleVT().SimpleTy] != 0;
   }
 
-  /// isTypeSynthesizable - Return true if it's OK for the compiler to create
-  /// new operations of this type.  All Legal types are synthesizable except
-  /// MMX vector types on X86.  Non-Legal types are not synthesizable.
-  bool isTypeSynthesizable(EVT VT) const {
-    return isTypeLegal(VT) && Synthesizable[VT.getSimpleVT().SimpleTy];
-  }
-
   class ValueTypeActionImpl {
     /// ValueTypeActions - For each value type, keep a LegalizeAction enum
     /// that indicates how instruction selection should deal with the type.
@@ -1037,12 +1030,10 @@
   /// addRegisterClass - Add the specified register class as an available
   /// regclass for the specified value type.  This indicates the selector can
   /// handle values of that class natively.
-  void addRegisterClass(EVT VT, TargetRegisterClass *RC,
-                        bool isSynthesizable = true) {
+  void addRegisterClass(EVT VT, TargetRegisterClass *RC) {
     assert((unsigned)VT.getSimpleVT().SimpleTy < array_lengthof(RegClassForVT));
     AvailableRegClasses.push_back(std::make_pair(VT, RC));
     RegClassForVT[VT.getSimpleVT().SimpleTy] = RC;
-    Synthesizable[VT.getSimpleVT().SimpleTy] = isSynthesizable;
   }
 
   /// findRepresentativeClass - Return the largest legal super-reg register class
@@ -1674,11 +1665,6 @@
   /// approximate register pressure.
   uint8_t RepRegClassCostForVT[MVT::LAST_VALUETYPE];
 
-  /// Synthesizable indicates whether it is OK for the compiler to create new
-  /// operations using this type.  All Legal types are Synthesizable except
-  /// MMX types on X86.  Non-Legal types are not Synthesizable.
-  bool Synthesizable[MVT::LAST_VALUETYPE];
-
   /// TransformToType - For any value types we are promoting or expanding, this
   /// contains the value type that we are changing to.  For Expanded types, this
   /// contains one step of the expand (e.g. i64 -> i32), even if there are

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp?rev=116947&r1=116946&r2=116947&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp Wed Oct 20 16:32:10 2010
@@ -1293,7 +1293,7 @@
   EVT WidenEltVT = WidenVT.getVectorElementType();
   EVT VT = WidenVT;
   unsigned NumElts =  VT.getVectorNumElements();
-  while (!TLI.isTypeSynthesizable(VT) && NumElts != 1) {
+  while (!TLI.isTypeLegal(VT) && NumElts != 1) {
     NumElts = NumElts / 2;
     VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts);
   }
@@ -1319,7 +1319,7 @@
   unsigned ConcatEnd = 0;  // Current ConcatOps index.
   int Idx = 0;        // Current Idx into input vectors.
 
-  // NumElts := greatest synthesizable vector size (at most WidenVT)
+  // NumElts := greatest legal vector size (at most WidenVT)
   // while (orig. vector has unhandled elements) {
   //   take munches of size NumElts from the beginning and add to ConcatOps
   //   NumElts := next smaller supported vector size or 1
@@ -1337,7 +1337,7 @@
     do {
       NumElts = NumElts / 2;
       VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts);
-    } while (!TLI.isTypeSynthesizable(VT) && NumElts != 1);
+    } while (!TLI.isTypeLegal(VT) && NumElts != 1);
 
     if (NumElts == 1) {
       for (unsigned i = 0; i != CurNumElts; ++i, ++Idx) {
@@ -1374,7 +1374,7 @@
     do {
       NextSize *= 2;
       NextVT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NextSize);
-    } while (!TLI.isTypeSynthesizable(NextVT));
+    } while (!TLI.isTypeLegal(NextVT));
 
     if (!VT.isVector()) {
       // Scalar type, create an INSERT_VECTOR_ELEMENT of type NextVT
@@ -1444,7 +1444,7 @@
       return DAG.getNode(Opcode, dl, WidenVT, InOp);
   }
 
-  if (TLI.isTypeSynthesizable(InWidenVT)) {
+  if (TLI.isTypeLegal(InWidenVT)) {
     // Because the result and the input are different vector types, widening
     // the result could create a legal type but widening the input might make
     // it an illegal type that might lead to repeatedly splitting the input
@@ -1587,7 +1587,7 @@
       NewInVT = EVT::getVectorVT(*DAG.getContext(), InVT, NewNumElts);
     }
 
-    if (TLI.isTypeSynthesizable(NewInVT)) {
+    if (TLI.isTypeLegal(NewInVT)) {
       // Because the result and the input are different vector types, widening
       // the result could create a legal type but widening the input might make
       // it an illegal type that might lead to repeatedly splitting the input
@@ -1727,7 +1727,7 @@
                                   SatOp, CvtCode);
   }
 
-  if (TLI.isTypeSynthesizable(InWidenVT)) {
+  if (TLI.isTypeLegal(InWidenVT)) {
     // Because the result and the input are different vector types, widening
     // the result could create a legal type but widening the input might make
     // it an illegal type that might lead to repeatedly splitting the input
@@ -2054,7 +2054,7 @@
   if (InWidenSize % Size == 0 && !VT.isVector() && VT != MVT::x86mmx) {
     unsigned NewNumElts = InWidenSize / Size;
     EVT NewVT = EVT::getVectorVT(*DAG.getContext(), VT, NewNumElts);
-    if (TLI.isTypeSynthesizable(NewVT)) {
+    if (TLI.isTypeLegal(NewVT)) {
       SDValue BitOp = DAG.getNode(ISD::BIT_CONVERT, dl, NewVT, InOp);
       return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT, BitOp,
                          DAG.getIntPtrConstant(0));
@@ -2152,7 +2152,7 @@
     unsigned MemVTWidth = MemVT.getSizeInBits();
     if (MemVT.getSizeInBits() <= WidenEltWidth)
       break;
-    if (TLI.isTypeSynthesizable(MemVT) && (WidenWidth % MemVTWidth) == 0 &&
+    if (TLI.isTypeLegal(MemVT) && (WidenWidth % MemVTWidth) == 0 &&
         (MemVTWidth <= Width ||
          (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) {
       RetVT = MemVT;
@@ -2166,7 +2166,7 @@
        VT >= (unsigned)MVT::FIRST_VECTOR_VALUETYPE; --VT) {
     EVT MemVT = (MVT::SimpleValueType) VT;
     unsigned MemVTWidth = MemVT.getSizeInBits();
-    if (TLI.isTypeSynthesizable(MemVT) && WidenEltVT == MemVT.getVectorElementType() &&
+    if (TLI.isTypeLegal(MemVT) && WidenEltVT == MemVT.getVectorElementType() &&
         (WidenWidth % MemVTWidth) == 0 &&
         (MemVTWidth <= Width ||
          (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) {

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=116947&r1=116946&r2=116947&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Wed Oct 20 16:32:10 2010
@@ -793,7 +793,7 @@
         EVT SVT = (MVT::SimpleValueType)nVT;
         if (SVT.getVectorElementType() == EltVT &&
             SVT.getVectorNumElements() > NElts && 
-            isTypeSynthesizable(SVT)) {
+            isTypeLegal(SVT)) {
           TransformToType[i] = SVT;
           RegisterTypeForVT[i] = SVT;
           NumRegistersForVT[i] = 1;

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=116947&r1=116946&r2=116947&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Oct 20 16:32:10 2010
@@ -623,7 +623,7 @@
   // FIXME: In order to prevent SSE instructions being expanded to MMX ones
   // with -msoft-float, disable use of MMX as well.
   if (!UseSoftFloat && !DisableMMX && Subtarget->hasMMX()) {
-    addRegisterClass(MVT::x86mmx, X86::VR64RegisterClass, false);
+    addRegisterClass(MVT::x86mmx, X86::VR64RegisterClass);
     // No operations on x86mmx supported, everything uses intrinsics.
   }
 



From rafael.espindola at gmail.com  Wed Oct 20 16:56:14 2010
From: rafael.espindola at gmail.com (=?UTF-8?Q?Rafael_Esp=C3=ADndola?=)
Date: Wed, 20 Oct 2010 17:56:14 -0400
Subject: [llvm-commits] Proof of concept patch for unifying the .s/ELF
 emission of .ARM.attributes
In-Reply-To: <AANLkTinVf83nF2RUWsmRzT1tL=5MMVJdoGHm8h1D6mG6@mail.gmail.com>
References: <AANLkTikSjtvxSNc0oxKEoG2LdGriz10OXOTAtC4caR_+@mail.gmail.com>
	<AANLkTikaS4qjUi+5q3YWt_GF5EdWKVNwxq7=-LyWRRpv@mail.gmail.com>
	<AANLkTinH7mZtZSQKDYMOE9C8-0baHwm31crmp30roWKy@mail.gmail.com>
	<AANLkTimhWm3dCbO003ipXkaDS3f0o948b9b2NquVSe29@mail.gmail.com>
	<AANLkTi=2B7Pk9HkkxYvQBvm-AfJsYCHW8uYxURq5iEcd@mail.gmail.com>
	<AANLkTi=iVAmVx08ww0EOu9DvJ82oxWD+02Es3btVSqK2@mail.gmail.com>
	<AANLkTin5KdNX6g+ZRYJS0nNy6=bu4o4gwa6v5-XNwkW9@mail.gmail.com>
	<AANLkTikAPuZKYLf4iisi=C4v2onfz5qCXQ-mo2s62UNq@mail.gmail.com>
	<6D9C9A6C-872A-494D-A5F6-2523DD4CA5B6@apple.com>
	<AANLkTi=4=8T0ww0csECny4t0RMSrJV=nUT77h+759-Ab@mail.gmail.com>
	<8FD08C3F-E6E1-448B-A384-7E5CF0763EC1@apple.com>
	<AANLkTikH8sEANQrDGVHg1uOtfCs2UzygkUPpm91E9kZc@mail.gmail.com>
	<AANLkTimoHYSw=viMcpZLirRqd789_xjWmT4+foao_T6f@mail.gmail.com>
	<8E5A9C6C-BA61-41F8-B445-336D9F96D774@apple.com>
	<AANLkTiksC9MbzDhYrzLs9Kt5YRGuHu2nv3Jri=-xRKb9@mail.gmail.com>
	<AANLkTi=73V-VRH_HGiPwcQjBNcFZMiU+jazHMH3YdJ-V@mail.gmail.com>
	<AANLkTikGWx7GH5VZUByposdJWhhvc+qR6X-1Ve_gNmKG@mail.gmail.com>
	<AANLkTik7AYHB1_Crv6Vcf4uMyx4U_x5mJaYK+-S3=ucU@mail.gmail.com>
	<AANLkTi=e_fCXZo_H1=_47tv5BABbpHkf8qJiyrMfRFj_@mail.gmail.com>
	<AANLkTi=MArF+PJK1iwc66wZNobOTjC6pi127Kt=A64bp@mail.gmail.com>
	<AANLkTimHKpEKfy2mr_UKco+Uscg_YBDtCmvXhT4AhAnp@mail.gmail.com>
	<AANLkTimt3NyHcqEh38hn+FnUNL_O5Qv81OYjzE7d0Qf1@mail.gmail.com>
	<AANLkTin8ykW=j=arKX3wC-CX2adx0sTtUmYMJr7qYqJY@mail.gmail.com>
	<AANLkTikXC0jb1VQ--c7iAgX6=DvpTHD_prwSF9F2Tjm4@mail.gmail.com>
	<AANLkTi=SBh85q-m-SvA4nNj9DfdUDXgYmxs6u9Zc4w7s@mail.gmail.com>
	<AANLkTinVf83nF2RUWsmRzT1tL=5MMVJdoGHm8h1D6mG6@mail.gmail.com>
Message-ID: <AANLkTikHY6Sej-knz3b5+EUjMWVuoPOkWrmFHKHBWtam@mail.gmail.com>

> Gosh, this is taking a while :-)
> Is there anything else I missed?

Another one I noticed. Instead of

      SmallString<32> *FC = &currFileFragment.getContents();
      (*FC) += static_cast<char>(attr);
      (*FC) += static_cast<char>(0xFF & v);

You can do

     OutStreamer.EmitIntValue(static_cast<char>(attr), 1);
     OutStreamer.EmitIntValue(0xFF & v, 1);

No? Using the streamer interface looks a lot more in line with what
the rest of the code does.

> Thanks!
>
> -jason
>

Cheers,
Rafael

From jasonwkim at google.com  Wed Oct 20 17:00:00 2010
From: jasonwkim at google.com (Jason Kim)
Date: Wed, 20 Oct 2010 15:00:00 -0700
Subject: [llvm-commits] [llvm] r116823 - in /llvm/trunk/test: MC/ELF/
	Scripts/
In-Reply-To: <AANLkTino-=aXF7H4gh5eyJ+WTduk8pni5QM0w_YcFRXS@mail.gmail.com>
References: <20101019173910.A90842A6C12C@llvm.org>
	<AANLkTino-=aXF7H4gh5eyJ+WTduk8pni5QM0w_YcFRXS@mail.gmail.com>
Message-ID: <AANLkTi=qnX8meKB-x9y-_1zEm5R717gJPBfw=Cmcaw1G@mail.gmail.com>

On Tue, Oct 19, 2010 at 7:59 PM, Rafael Esp?ndola
<rafael.espindola at gmail.com> wrote:
>> +FormatOutput=hex
>
> This is dead, no?

Yes. I'll cut it.

>
>> ? ? e_shnum = f.read16()
>> - ? ?print "('e_shnum', %d)" % e_shnum
>> + ? ?print "('e_shnum', %s)" % common_dump.HexDump(e_shnum)
>
> If printing with fixed sizes, we should probably print with the actual sizes...

Hmm, good point. But it requires churning the tests once again.
I'll tackle it same time that I tackle the macho-dump - to make all
hex numbers in test files consistent), since it will be a lot of
similar changes across the test files.

>
> Cheers,
> Rafael
>


From stoklund at 2pi.dk  Wed Oct 20 17:00:51 2010
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Wed, 20 Oct 2010 22:00:51 -0000
Subject: [llvm-commits] [llvm] r116951 - in /llvm/trunk/lib/CodeGen:
 InlineSpiller.cpp LiveRangeEdit.cpp LiveRangeEdit.h
Message-ID: <20101020220051.DFAF12A6C12C@llvm.org>

Author: stoklund
Date: Wed Oct 20 17:00:51 2010
New Revision: 116951

URL: http://llvm.org/viewvc/llvm-project?rev=116951&view=rev
Log:
Move some of the InlineSpiller rematerialization code into LiveRangeEdit.

Modified:
    llvm/trunk/lib/CodeGen/InlineSpiller.cpp
    llvm/trunk/lib/CodeGen/LiveRangeEdit.cpp
    llvm/trunk/lib/CodeGen/LiveRangeEdit.h

Modified: llvm/trunk/lib/CodeGen/InlineSpiller.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/InlineSpiller.cpp?rev=116951&r1=116950&r2=116951&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/InlineSpiller.cpp (original)
+++ llvm/trunk/lib/CodeGen/InlineSpiller.cpp Wed Oct 20 17:00:51 2010
@@ -49,10 +49,7 @@
   const TargetRegisterClass *rc_;
   int stackSlot_;
 
-  // Values of the current interval that can potentially remat.
-  SmallPtrSet<VNInfo*, 8> reMattable_;
-
-  // Values in reMattable_ that failed to remat at some point.
+  // Values that failed to remat at some point.
   SmallPtrSet<VNInfo*, 8> usedValues_;
 
   ~InlineSpiller() {}
@@ -136,6 +133,7 @@
 bool InlineSpiller::reMaterializeFor(MachineBasicBlock::iterator MI) {
   SlotIndex UseIdx = lis_.getInstructionIndex(MI).getUseIndex();
   VNInfo *OrigVNI = edit_->getParent().getVNInfoAt(UseIdx);
+
   if (!OrigVNI) {
     DEBUG(dbgs() << "\tadding <undef> flags: ");
     for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
@@ -146,20 +144,17 @@
     DEBUG(dbgs() << UseIdx << '\t' << *MI);
     return true;
   }
-  if (!reMattable_.count(OrigVNI)) {
-    DEBUG(dbgs() << "\tusing non-remat valno " << OrigVNI->id << ": "
-                 << UseIdx << '\t' << *MI);
-    return false;
-  }
-  MachineInstr *OrigMI = lis_.getInstructionFromIndex(OrigVNI->def);
-  if (!edit_->allUsesAvailableAt(OrigMI, OrigVNI->def, UseIdx, lis_)) {
+
+  LiveRangeEdit::Remat RM = edit_->canRematerializeAt(OrigVNI, UseIdx, false,
+                                                      lis_);
+  if (!RM) {
     usedValues_.insert(OrigVNI);
     DEBUG(dbgs() << "\tcannot remat for " << UseIdx << '\t' << *MI);
     return false;
   }
 
-  // If the instruction also writes edit_->getReg(), it had better not require the same
-  // register for uses and defs.
+  // If the instruction also writes edit_->getReg(), it had better not require
+  // the same register for uses and defs.
   bool Reads, Writes;
   SmallVector<unsigned, 8> Ops;
   tie(Reads, Writes) = MI->readsWritesVirtualRegister(edit_->getReg(), &Ops);
@@ -179,11 +174,9 @@
   NewLI.markNotSpillable();
 
   // Finally we can rematerialize OrigMI before MI.
-  MachineBasicBlock &MBB = *MI->getParent();
-  tii_.reMaterialize(MBB, MI, NewLI.reg, 0, OrigMI, tri_);
-  MachineBasicBlock::iterator RematMI = MI;
-  SlotIndex DefIdx = lis_.InsertMachineInstrInMaps(--RematMI).getDefIndex();
-  DEBUG(dbgs() << "\tremat:  " << DefIdx << '\t' << *RematMI);
+  SlotIndex DefIdx = edit_->rematerializeAt(*MI->getParent(), MI, NewLI.reg, RM,
+                                            lis_, tii_, tri_);
+  DEBUG(dbgs() << "\tremat:  " << DefIdx << '\n');
 
   // Replace operands
   for (unsigned i = 0, e = Ops.size(); i != e; ++i) {
@@ -205,23 +198,11 @@
 /// and trim the live ranges after.
 void InlineSpiller::reMaterializeAll() {
   // Do a quick scan of the interval values to find if any are remattable.
-  reMattable_.clear();
-  usedValues_.clear();
-  for (LiveInterval::const_vni_iterator I = edit_->getParent().vni_begin(),
-       E = edit_->getParent().vni_end(); I != E; ++I) {
-    VNInfo *VNI = *I;
-    if (VNI->isUnused())
-      continue;
-    MachineInstr *DefMI = lis_.getInstructionFromIndex(VNI->def);
-    if (!DefMI || !tii_.isTriviallyReMaterializable(DefMI))
-      continue;
-    reMattable_.insert(VNI);
-  }
-
-  // Often, no defs are remattable.
-  if (reMattable_.empty())
+  if (!edit_->anyRematerializable(lis_, tii_, 0))
     return;
 
+  usedValues_.clear();
+
   // Try to remat before all uses of edit_->getReg().
   bool anyRemat = false;
   for (MachineRegisterInfo::use_nodbg_iterator
@@ -234,10 +215,11 @@
 
   // Remove any values that were completely rematted.
   bool anyRemoved = false;
-  for (SmallPtrSet<VNInfo*, 8>::iterator I = reMattable_.begin(),
-       E = reMattable_.end(); I != E; ++I) {
+  for (LiveInterval::vni_iterator I = edit_->getParent().vni_begin(),
+       E = edit_->getParent().vni_end(); I != E; ++I) {
     VNInfo *VNI = *I;
-    if (VNI->hasPHIKill() || usedValues_.count(VNI))
+    if (VNI->hasPHIKill() || !edit_->didRematerialize(VNI) ||
+        usedValues_.count(VNI))
       continue;
     MachineInstr *DefMI = lis_.getInstructionFromIndex(VNI->def);
     DEBUG(dbgs() << "\tremoving dead def: " << VNI->def << '\t' << *DefMI);

Modified: llvm/trunk/lib/CodeGen/LiveRangeEdit.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveRangeEdit.cpp?rev=116951&r1=116950&r2=116951&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LiveRangeEdit.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveRangeEdit.cpp Wed Oct 20 17:00:51 2010
@@ -15,6 +15,7 @@
 #include "VirtRegMap.h"
 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/Target/TargetInstrInfo.h"
 
 using namespace llvm;
 
@@ -38,6 +39,31 @@
   return li;
 }
 
+void LiveRangeEdit::scanRemattable(LiveIntervals &lis,
+                                   const TargetInstrInfo &tii,
+                                   AliasAnalysis *aa) {
+  for (LiveInterval::vni_iterator I = parent_.vni_begin(),
+       E = parent_.vni_end(); I != E; ++I) {
+    VNInfo *VNI = *I;
+    if (VNI->isUnused())
+      continue;
+    MachineInstr *DefMI = lis.getInstructionFromIndex(VNI->def);
+    if (!DefMI)
+      continue;
+    if (tii.isTriviallyReMaterializable(DefMI, aa))
+      remattable_.insert(VNI);
+  }
+  scannedRemattable_ = true;
+}
+
+bool LiveRangeEdit::anyRematerializable(LiveIntervals &lis,
+                                        const TargetInstrInfo &tii,
+                                        AliasAnalysis *aa) {
+  if (!scannedRemattable_)
+    scanRemattable(lis, tii, aa);
+  return !remattable_.empty();
+}
+
 /// allUsesAvailableAt - Return true if all registers used by OrigMI at
 /// OrigIdx are also available with the same value at UseIdx.
 bool LiveRangeEdit::allUsesAvailableAt(const MachineInstr *OrigMI,
@@ -71,3 +97,47 @@
   return true;
 }
 
+LiveRangeEdit::Remat LiveRangeEdit::canRematerializeAt(VNInfo *ParentVNI,
+                                                       SlotIndex UseIdx,
+                                                       bool cheapAsAMove,
+                                                       LiveIntervals &lis) {
+  assert(scannedRemattable_ && "Call anyRematerializable first");
+  Remat RM = { 0, 0 };
+
+  // We could remat an undefined value as IMPLICIT_DEF, but all that should have
+  // been taken care of earlier.
+  if (!(RM.ParentVNI = parent_.getVNInfoAt(UseIdx)))
+    return RM;
+
+  // Use scanRemattable info.
+  if (!remattable_.count(RM.ParentVNI))
+    return RM;
+
+  // No defining instruction.
+  MachineInstr *OrigMI = lis.getInstructionFromIndex(RM.ParentVNI->def);
+  assert(OrigMI && "Defining instruction for remattable value disappeared");
+
+  // If only cheap remats were requested, bail out early.
+  if (cheapAsAMove && !OrigMI->getDesc().isAsCheapAsAMove())
+    return RM;
+
+  // Verify that all used registers are available with the same values.
+  if (!allUsesAvailableAt(OrigMI, RM.ParentVNI->def, UseIdx, lis))
+    return RM;
+
+  RM.OrigMI = OrigMI;
+  return RM;
+}
+
+SlotIndex LiveRangeEdit::rematerializeAt(MachineBasicBlock &MBB,
+                                         MachineBasicBlock::iterator MI,
+                                         unsigned DestReg,
+                                         const Remat &RM,
+                                         LiveIntervals &lis,
+                                         const TargetInstrInfo &tii,
+                                         const TargetRegisterInfo &tri) {
+  assert(RM.OrigMI && "Invalid remat");
+  tii.reMaterialize(MBB, MI, DestReg, 0, RM.OrigMI, tri);
+  return lis.InsertMachineInstrInMaps(--MI).getDefIndex();
+}
+

Modified: llvm/trunk/lib/CodeGen/LiveRangeEdit.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveRangeEdit.h?rev=116951&r1=116950&r2=116951&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LiveRangeEdit.h (original)
+++ llvm/trunk/lib/CodeGen/LiveRangeEdit.h Wed Oct 20 17:00:51 2010
@@ -19,9 +19,11 @@
 #define LLVM_CODEGEN_LIVERANGEEDIT_H
 
 #include "llvm/CodeGen/LiveInterval.h"
+#include "llvm/ADT/SmallPtrSet.h"
 
 namespace llvm {
 
+class AliasAnalysis;
 class LiveIntervals;
 class MachineRegisterInfo;
 class VirtRegMap;
@@ -34,6 +36,27 @@
   /// firstNew_ - Index of the first register added to newRegs_.
   const unsigned firstNew_;
 
+  /// scannedRemattable_ - true when remattable values have been identified.
+  bool scannedRemattable_;
+
+  /// remattable_ - Values defined by remattable instructions as identified by
+  /// tii.isTriviallyReMaterializable().
+  SmallPtrSet<VNInfo*,4> remattable_;
+
+  /// rematted_ - Values that were actually rematted, and so need to have their
+  /// live range trimmed or entirely removed.
+  SmallPtrSet<VNInfo*,4> rematted_;
+
+  /// scanRemattable - Identify the parent_ values that may rematerialize.
+  void scanRemattable(LiveIntervals &lis,
+                      const TargetInstrInfo &tii,
+                      AliasAnalysis *aa);
+
+  /// allUsesAvailableAt - Return true if all registers used by OrigMI at
+  /// OrigIdx are also available with the same value at UseIdx.
+  bool allUsesAvailableAt(const MachineInstr *OrigMI, SlotIndex OrigIdx,
+                          SlotIndex UseIdx, LiveIntervals &lis);
+
 public:
   /// Create a LiveRangeEdit for breaking down parent into smaller pieces.
   /// @param parent The register being spilled or split.
@@ -45,7 +68,7 @@
                 SmallVectorImpl<LiveInterval*> &newRegs,
                 const SmallVectorImpl<LiveInterval*> &uselessRegs)
     : parent_(parent), newRegs_(newRegs), uselessRegs_(uselessRegs),
-      firstNew_(newRegs.size()) {}
+      firstNew_(newRegs.size()), scannedRemattable_(false) {}
 
   LiveInterval &getParent() const { return parent_; }
   unsigned getReg() const { return parent_.reg; }
@@ -63,11 +86,43 @@
   /// parent.
   LiveInterval &create(MachineRegisterInfo&, LiveIntervals&, VirtRegMap&);
 
-  /// allUsesAvailableAt - Return true if all registers used by OrigMI at
-  /// OrigIdx are also available with the same value at UseIdx.
-  bool allUsesAvailableAt(const MachineInstr *OrigMI, SlotIndex OrigIdx,
-                          SlotIndex UseIdx, LiveIntervals &lis);
-
+  /// anyRematerializable - Return true if any parent values may be
+  /// rematerializable.
+  /// This function must be called before ny rematerialization is attempted.
+  bool anyRematerializable(LiveIntervals&, const TargetInstrInfo&,
+                           AliasAnalysis*);
+
+  /// Remat - Information needed to rematerialize at a specific location.
+  struct Remat {
+    VNInfo *ParentVNI;      // parent_'s value at the remat location.
+    MachineInstr *OrigMI;   // Instruction defining ParentVNI.
+    operator bool() const { return OrigMI; }
+  };
+
+  /// canRematerializeAt - Determine if ParentVNI can be rematerialized at
+  /// UseIdx. It is assumed that parent_.getVNINfoAt(UseIdx) == ParentVNI.
+  /// When cheapAsAMove is set, only cheap remats are allowed.
+  Remat canRematerializeAt(VNInfo *ParentVNI,
+                           SlotIndex UseIdx,
+                           bool cheapAsAMove,
+                           LiveIntervals &lis);
+
+  /// rematerializeAt - Rematerialize RM.ParentVNI into DestReg by inserting an
+  /// instruction into MBB before MI. The new instruction is mapped, but
+  /// liveness is not updated.
+  /// Return the SlotIndex of the new instruction.
+  SlotIndex rematerializeAt(MachineBasicBlock &MBB,
+                            MachineBasicBlock::iterator MI,
+                            unsigned DestReg,
+                            const Remat &RM,
+                            LiveIntervals&,
+                            const TargetInstrInfo&,
+                            const TargetRegisterInfo&);
+
+  /// didRematerialize - Return true if ParentVNI was rematerialized anywhere.
+  bool didRematerialize(VNInfo *ParentVNI) const {
+    return rematted_.count(ParentVNI);
+  }
 };
 
 }



From jason.w.kim.2009 at gmail.com  Wed Oct 20 17:01:39 2010
From: jason.w.kim.2009 at gmail.com (Jason W Kim)
Date: Wed, 20 Oct 2010 22:01:39 -0000
Subject: [llvm-commits] [llvm] r116953 - /llvm/trunk/test/Scripts/elf-dump
Message-ID: <20101020220139.D8D342A6C12C@llvm.org>

Author: jasonwkim
Date: Wed Oct 20 17:01:39 2010
New Revision: 116953

URL: http://llvm.org/viewvc/llvm-project?rev=116953&view=rev
Log:
Cut unneeded global variable.


Modified:
    llvm/trunk/test/Scripts/elf-dump

Modified: llvm/trunk/test/Scripts/elf-dump
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Scripts/elf-dump?rev=116953&r1=116952&r2=116953&view=diff
==============================================================================
--- llvm/trunk/test/Scripts/elf-dump (original)
+++ llvm/trunk/test/Scripts/elf-dump Wed Oct 20 17:01:39 2010
@@ -6,8 +6,6 @@
 
 import common_dump
 
-FormatOutput=hex
-
 class Reader:
     def __init__(self, path):
         if path == "-":



From gohman at apple.com  Wed Oct 20 17:02:59 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 20 Oct 2010 22:02:59 -0000
Subject: [llvm-commits] [llvm] r116954 -
	/llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp
Message-ID: <20101020220259.200E52A6C12C@llvm.org>

Author: djg
Date: Wed Oct 20 17:02:58 2010
New Revision: 116954

URL: http://llvm.org/viewvc/llvm-project?rev=116954&view=rev
Log:
Fix comments; the type graph is currently a tree, not a DAG.

Modified:
    llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp

Modified: llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp?rev=116954&r1=116953&r2=116954&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp Wed Oct 20 17:02:58 2010
@@ -52,7 +52,7 @@
     /// getNode - Get the MDNode for this TBAANode.
     const MDNode *getNode() const { return Node; }
 
-    /// getParent - Get this TBAANode's Alias DAG parent.
+    /// getParent - Get this TBAANode's Alias tree parent.
     TBAANode getParent() const {
       if (Node->getNumOperands() < 2)
         return TBAANode();
@@ -141,7 +141,7 @@
   // Keep track of the root node for A and B.
   TBAANode RootA, RootB;
 
-  // Climb the DAG from A to see if we reach B.
+  // Climb the tree from A to see if we reach B.
   for (TBAANode T(AM); ; ) {
     if (T.getNode() == BM)
       // B is an ancestor of A.
@@ -153,7 +153,7 @@
       break;
   }
 
-  // Climb the DAG from B to see if we reach A.
+  // Climb the tree from B to see if we reach A.
   for (TBAANode T(BM); ; ) {
     if (T.getNode() == AM)
       // A is an ancestor of B.



From dalej at apple.com  Wed Oct 20 17:03:37 2010
From: dalej at apple.com (Dale Johannesen)
Date: Wed, 20 Oct 2010 22:03:37 -0000
Subject: [llvm-commits] [llvm] r116955 - in /llvm/trunk:
 lib/Target/ARM/ARMISelLowering.cpp test/CodeGen/Thumb2/buildvector-crash.ll
Message-ID: <20101020220337.DBD2F2A6C12C@llvm.org>

Author: johannes
Date: Wed Oct 20 17:03:37 2010
New Revision: 116955

URL: http://llvm.org/viewvc/llvm-project?rev=116955&view=rev
Log:
Fix crash introduced in 116852.  8573915.


Added:
    llvm/trunk/test/CodeGen/Thumb2/buildvector-crash.ll
Modified:
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=116955&r1=116954&r2=116955&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Wed Oct 20 17:03:37 2010
@@ -3457,8 +3457,9 @@
                                   Op.getOperand(i)));
       SDValue Val = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32, &Ops[0],
                                 NumElts);
-      return DAG.getNode(ISD::BIT_CONVERT, dl, VT,
-                         LowerBUILD_VECTOR(Val, DAG, ST));
+      Val = LowerBUILD_VECTOR(Val, DAG, ST);
+      if (Val.getNode())
+        return DAG.getNode(ISD::BIT_CONVERT, dl, VT, Val);
     }
     SDValue Val = IsSingleInstrConstant(Value, DAG, ST, dl);
     if (Val.getNode())

Added: llvm/trunk/test/CodeGen/Thumb2/buildvector-crash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/buildvector-crash.ll?rev=116955&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/buildvector-crash.ll (added)
+++ llvm/trunk/test/CodeGen/Thumb2/buildvector-crash.ll Wed Oct 20 17:03:37 2010
@@ -0,0 +1,17 @@
+; RUN: llc < %s -O3 -mtriple=thumbv7-apple-darwin10 -mcpu=cortex-a8 | FileCheck %s
+; Formerly crashed, 3573915.
+
+define void @RotateStarsFP_Vec() nounwind {
+bb.nph372:
+  br label %bb8
+
+bb8:                                              ; preds = %bb8, %bb.nph372
+  %0 = fadd <4 x float> undef, <float 0xBFEE353F80000000, float 0xBFEE353F80000000, float 0xBFEE353F80000000, float 0xBFEE353F80000000>
+  %1 = fmul <4 x float> %0, undef
+  %2 = fmul <4 x float> %1, undef
+  %3 = fadd <4 x float> undef, %2
+  store <4 x float> %3, <4 x float>* undef, align 4
+  br label %bb8
+; CHECK: RotateStarsFP_Vec:
+; CHECK: vldmia
+}



From evan.cheng at apple.com  Wed Oct 20 17:03:58 2010
From: evan.cheng at apple.com (Evan Cheng)
Date: Wed, 20 Oct 2010 22:03:58 -0000
Subject: [llvm-commits] [llvm] r116956 - in /llvm/trunk:
 lib/CodeGen/MachineLICM.cpp test/CodeGen/Thumb2/cross-rc-coalescing-2.ll
 test/CodeGen/X86/2009-02-26-MachineLICMBug.ll
Message-ID: <20101020220358.4E18F2A6C12C@llvm.org>

Author: evancheng
Date: Wed Oct 20 17:03:58 2010
New Revision: 116956

URL: http://llvm.org/viewvc/llvm-project?rev=116956&view=rev
Log:
More accurate estimate / tracking of register pressure.
- Initial register pressure in the loop should be all the live defs into the
  loop. Not just those from loop preheader which is often empty.
- When an instruction is hoisted, update register pressure from loop preheader
  to the original BB.
- Treat only use of a virtual register as kill since the code is still SSA.

Modified:
    llvm/trunk/lib/CodeGen/MachineLICM.cpp
    llvm/trunk/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll
    llvm/trunk/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll

Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=116956&r1=116955&r2=116956&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Wed Oct 20 17:03:58 2010
@@ -37,7 +37,6 @@
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/SmallSet.h"
 #include "llvm/ADT/Statistic.h"
-#include "llvm/Support/CommandLine.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/raw_ostream.h"
 
@@ -176,10 +175,15 @@
     /// it 'high'.
     bool HasHighOperandLatency(MachineInstr &MI, unsigned DefIdx, unsigned Reg);
 
-    /// IncreaseHighRegPressure - Visit BBs from preheader to current BB, check
-    /// if hoisting an instruction of the given cost matrix can cause high
+    /// CanCauseHighRegPressure - Visit BBs from header to current BB,
+    /// check if hoisting an instruction of the given cost matrix can cause high
     /// register pressure.
-    bool IncreaseHighRegPressure(DenseMap<unsigned, int> &Cost);
+    bool CanCauseHighRegPressure(DenseMap<unsigned, int> &Cost);
+
+    /// UpdateBackTraceRegPressure - Traverse the back trace from header to
+    /// the current block and update their register pressures to reflect the
+    /// effect of hoisting MI from the current block to the preheader.
+    void UpdateBackTraceRegPressure(const MachineInstr *MI);
 
     /// IsProfitableToHoist - Return true if it is potentially profitable to
     /// hoist the given loop invariant.
@@ -198,11 +202,9 @@
     /// this does not count live through (livein but not used) registers.
     void InitRegPressure(MachineBasicBlock *BB);
 
-    /// UpdateRegPressureBefore / UpdateRegPressureAfter - Update estimate of
-    /// register pressure before and after executing a specifi instruction.
-    void UpdateRegPressureBefore(const MachineInstr *MI,
-                                 SmallVector<unsigned, 4> &Defs);
-    void UpdateRegPressureAfter(SmallVector<unsigned, 4> &Defs);
+    /// UpdateRegPressure - Update estimate of register pressure after the
+    /// specified instruction.
+    void UpdateRegPressure(const MachineInstr *MI);
 
     /// isLoadFromConstantMemory - Return true if the given instruction is a
     /// load from constant memory.
@@ -228,8 +230,8 @@
 
     /// Hoist - When an instruction is found to only use loop invariant operands
     /// that is safe to hoist, this instruction is called to do the dirty work.
-    ///
-    void Hoist(MachineInstr *MI, MachineBasicBlock *Preheader);
+    /// It returns true if the instruction is hoisted.
+    bool Hoist(MachineInstr *MI, MachineBasicBlock *Preheader);
 
     /// InitCSEMap - Initialize the CSE map with instructions that are in the
     /// current loop preheader that may become duplicates of instructions that
@@ -559,7 +561,7 @@
     return;
 
   if (IsHeader) {
-    // Compute registers which are liveout of preheader.
+    // Compute registers which are livein into the loop headers.
     RegSeen.clear();
     BackTrace.clear();
     InitRegPressure(Preheader);
@@ -568,17 +570,12 @@
   // Remember livein register pressure.
   BackTrace.push_back(RegPressure);
 
-  SmallVector<unsigned, 4> Defs;
   for (MachineBasicBlock::iterator
          MII = BB->begin(), E = BB->end(); MII != E; ) {
     MachineBasicBlock::iterator NextMII = MII; ++NextMII;
     MachineInstr *MI = &*MII;
-
-    assert(Defs.empty());
-    UpdateRegPressureBefore(MI, Defs);
-    Hoist(MI, Preheader);
-    UpdateRegPressureAfter(Defs);
-
+    if (!Hoist(MI, Preheader))
+      UpdateRegPressure(MI);
     MII = NextMII;
   }
 
@@ -594,12 +591,27 @@
   BackTrace.pop_back();
 }
 
+static bool isOperandKill(const MachineOperand &MO, MachineRegisterInfo *MRI) {
+  return MO.isKill() || MRI->hasOneNonDBGUse(MO.getReg());
+}
+
 /// InitRegPressure - Find all virtual register references that are liveout of
 /// the preheader to initialize the starting "register pressure". Note this
 /// does not count live through (livein but not used) registers.
 void MachineLICM::InitRegPressure(MachineBasicBlock *BB) {
   std::fill(RegPressure.begin(), RegPressure.end(), 0);
 
+  // If the preheader has only a single predecessor and it ends with a
+  // fallthrough or an unconditional branch, then scan its predecessor for live
+  // defs as well. This happens whenever the preheader is created by splitting
+  // the critical edge from the loop predecessor to the loop header.
+  if (BB->pred_size() == 1) {
+    MachineBasicBlock *TBB = 0, *FBB = 0;
+    SmallVector<MachineOperand, 4> Cond;
+    if (!TII->AnalyzeBranch(*BB, TBB, FBB, Cond, false) && Cond.empty())
+      InitRegPressure(*BB->pred_begin());
+  }
+
   for (MachineBasicBlock::iterator MII = BB->begin(), E = BB->end();
        MII != E; ++MII) {
     MachineInstr *MI = &*MII;
@@ -618,22 +630,24 @@
       if (MO.isDef())
         RegPressure[RCId] += TLI->getRepRegClassCostFor(VT);
       else {
-        if (isNew && !MO.isKill())
+        bool isKill = isOperandKill(MO, MRI);
+        if (isNew && !isKill)
           // Haven't seen this, it must be a livein.
           RegPressure[RCId] += TLI->getRepRegClassCostFor(VT);
-        else if (!isNew && MO.isKill())
+        else if (!isNew && isKill)
           RegPressure[RCId] -= TLI->getRepRegClassCostFor(VT);
       }
     }
   }
 }
 
-/// UpdateRegPressureBefore / UpdateRegPressureAfter - Update estimate of
-/// register pressure before and after executing a specifi instruction.
-void MachineLICM::UpdateRegPressureBefore(const MachineInstr *MI,
-                                          SmallVector<unsigned, 4> &Defs) {
-  bool NoImpact = MI->isImplicitDef() || MI->isPHI();
+/// UpdateRegPressure - Update estimate of register pressure after the
+/// specified instruction.
+void MachineLICM::UpdateRegPressure(const MachineInstr *MI) {
+  if (MI->isImplicitDef())
+    return;
 
+  SmallVector<unsigned, 4> Defs;
   for (unsigned i = 0, e = MI->getDesc().getNumOperands(); i != e; ++i) {
     const MachineOperand &MO = MI->getOperand(i);
     if (!MO.isReg() || MO.isImplicit())
@@ -643,29 +657,23 @@
       continue;
 
     bool isNew = RegSeen.insert(Reg);
-    if (NoImpact)
-      continue;
-
     if (MO.isDef())
       Defs.push_back(Reg);
-    else {
-      if (!isNew && MO.isKill()) {
-        const TargetRegisterClass *RC = MRI->getRegClass(Reg);
-        EVT VT = *RC->vt_begin();
-        unsigned RCId = TLI->getRepRegClassFor(VT)->getID();
-        unsigned RCCost = TLI->getRepRegClassCostFor(VT);
+    else if (!isNew && isOperandKill(MO, MRI)) {
+      const TargetRegisterClass *RC = MRI->getRegClass(Reg);
+      EVT VT = *RC->vt_begin();
+      unsigned RCId = TLI->getRepRegClassFor(VT)->getID();
+      unsigned RCCost = TLI->getRepRegClassCostFor(VT);
 
-        assert(RCCost <= RegPressure[RCId]);
+      if (RCCost > RegPressure[RCId])
+        RegPressure[RCId] = 0;
+      else
         RegPressure[RCId] -= RCCost;
-      }
     }
   }
-}
 
-void MachineLICM::UpdateRegPressureAfter(SmallVector<unsigned, 4> &Defs) {
   while (!Defs.empty()) {
     unsigned Reg = Defs.pop_back_val();
-    RegSeen.insert(Reg);
     const TargetRegisterClass *RC = MRI->getRegClass(Reg);
     EVT VT = *RC->vt_begin();
     unsigned RCId = TLI->getRepRegClassFor(VT)->getID();
@@ -815,31 +823,74 @@
   return false;
 }
 
-/// IncreaseHighRegPressure - Visit BBs from preheader to current BB, check
+/// CanCauseHighRegPressure - Visit BBs from header to current BB, check
 /// if hoisting an instruction of the given cost matrix can cause high
 /// register pressure.
-bool MachineLICM::IncreaseHighRegPressure(DenseMap<unsigned, int> &Cost) {
-  for (unsigned i = BackTrace.size(); i != 0; --i) {
-    bool AnyIncrease = false;
-    SmallVector<unsigned, 8> &RP = BackTrace[i-1];
-    for (DenseMap<unsigned, int>::iterator CI = Cost.begin(), CE = Cost.end();
-         CI != CE; ++CI) {
-      if (CI->second <= 0) 
-        continue;
-      AnyIncrease = true;
-      unsigned RCId = CI->first;
+bool MachineLICM::CanCauseHighRegPressure(DenseMap<unsigned, int> &Cost) {
+  for (DenseMap<unsigned, int>::iterator CI = Cost.begin(), CE = Cost.end();
+       CI != CE; ++CI) {
+    if (CI->second <= 0) 
+      continue;
+
+    unsigned RCId = CI->first;
+    for (unsigned i = BackTrace.size(); i != 0; --i) {
+      SmallVector<unsigned, 8> &RP = BackTrace[i-1];
       if (RP[RCId] + CI->second >= RegLimit[RCId])
         return true;
     }
-
-    if (!AnyIncrease)
-      // Hoisting the instruction doesn't increase register pressure.
-      return false;
   }
 
   return false;
 }
 
+/// UpdateBackTraceRegPressure - Traverse the back trace from header to the
+/// current block and update their register pressures to reflect the effect
+/// of hoisting MI from the current block to the preheader.
+void MachineLICM::UpdateBackTraceRegPressure(const MachineInstr *MI) {
+  if (MI->isImplicitDef())
+    return;
+
+  // First compute the 'cost' of the instruction, i.e. its contribution
+  // to register pressure.
+  DenseMap<unsigned, int> Cost;
+  for (unsigned i = 0, e = MI->getDesc().getNumOperands(); i != e; ++i) {
+    const MachineOperand &MO = MI->getOperand(i);
+    if (!MO.isReg() || MO.isImplicit())
+      continue;
+    unsigned Reg = MO.getReg();
+    if (!Reg || TargetRegisterInfo::isPhysicalRegister(Reg))
+      continue;
+
+    const TargetRegisterClass *RC = MRI->getRegClass(Reg);
+    EVT VT = *RC->vt_begin();
+    unsigned RCId = TLI->getRepRegClassFor(VT)->getID();
+    unsigned RCCost = TLI->getRepRegClassCostFor(VT);
+    if (MO.isDef()) {
+      DenseMap<unsigned, int>::iterator CI = Cost.find(RCId);
+      if (CI != Cost.end())
+        CI->second += RCCost;
+      else
+        Cost.insert(std::make_pair(RCId, RCCost));
+    } else if (isOperandKill(MO, MRI)) {
+      DenseMap<unsigned, int>::iterator CI = Cost.find(RCId);
+      if (CI != Cost.end())
+        CI->second -= RCCost;
+      else
+        Cost.insert(std::make_pair(RCId, -RCCost));
+    }
+  }
+
+  // Update register pressure of blocks from loop header to current block.
+  for (unsigned i = 0, e = BackTrace.size(); i != e; ++i) {
+    SmallVector<unsigned, 8> &RP = BackTrace[i];
+    for (DenseMap<unsigned, int>::iterator CI = Cost.begin(), CE = Cost.end();
+         CI != CE; ++CI) {
+      unsigned RCId = CI->first;
+      RP[RCId] += CI->second;
+    }
+  }
+}
+
 /// IsProfitableToHoist - Return true if it is potentially profitable to hoist
 /// the given loop invariant.
 bool MachineLICM::IsProfitableToHoist(MachineInstr &MI) {
@@ -881,17 +932,14 @@
         unsigned RCId = TLI->getRepRegClassFor(VT)->getID();
         unsigned RCCost = TLI->getRepRegClassCostFor(VT);
         DenseMap<unsigned, int>::iterator CI = Cost.find(RCId);
-        // If the instruction is not register pressure neutrail (or better),
-        // check if hoisting it will cause high register pressure in BB's
-        // leading up to this point.
         if (CI != Cost.end())
           CI->second += RCCost;
         else
           Cost.insert(std::make_pair(RCId, RCCost));
-      } else if (MO.isKill()) {
+      } else if (isOperandKill(MO, MRI)) {
         // Is a virtual register use is a kill, hoisting it out of the loop
         // may actually reduce register pressure or be register pressure
-        // neutral
+        // neutral.
         const TargetRegisterClass *RC = MRI->getRegClass(Reg);
         EVT VT = *RC->vt_begin();
         unsigned RCId = TLI->getRepRegClassFor(VT)->getID();
@@ -904,9 +952,9 @@
       }
     }
 
-    // Visit BBs from preheader to current BB, if hoisting this doesn't cause
+    // Visit BBs from header to current BB, if hoisting this doesn't cause
     // high register pressure, then it's safe to proceed.
-    if (!IncreaseHighRegPressure(Cost)) {
+    if (!CanCauseHighRegPressure(Cost)) {
       ++NumLowRP;
       return true;
     }
@@ -979,6 +1027,10 @@
     NewMIs[1]->eraseFromParent();
     return 0;
   }
+
+  // Update register pressure for the unfolded instruction.
+  UpdateRegPressure(NewMIs[1]);
+
   // Otherwise we successfully unfolded a load that we can hoist.
   MI->eraseFromParent();
   return NewMIs[0];
@@ -1053,12 +1105,12 @@
 /// Hoist - When an instruction is found to use only loop invariant operands
 /// that are safe to hoist, this instruction is called to do the dirty work.
 ///
-void MachineLICM::Hoist(MachineInstr *MI, MachineBasicBlock *Preheader) {
+bool MachineLICM::Hoist(MachineInstr *MI, MachineBasicBlock *Preheader) {
   // First check whether we should hoist this instruction.
   if (!IsLoopInvariantInst(*MI) || !IsProfitableToHoist(*MI)) {
     // If not, try unfolding a hoistable load.
     MI = ExtractHoistableLoad(MI);
-    if (!MI) return;
+    if (!MI) return false;
   }
 
   // Now move the instructions to the predecessor, inserting it before any
@@ -1089,6 +1141,9 @@
     // Otherwise, splice the instruction to the preheader.
     Preheader->splice(Preheader->getFirstTerminator(),MI->getParent(),MI);
 
+    // Update register pressure for BBs from header to this block.
+    UpdateBackTraceRegPressure(MI);
+
     // Clear the kill flags of any register this instruction defines,
     // since they may need to be live throughout the entire loop
     // rather than just live for part of it.
@@ -1110,6 +1165,8 @@
 
   ++NumHoisted;
   Changed = true;
+
+  return true;
 }
 
 MachineBasicBlock *MachineLICM::getCurPreheader() {

Modified: llvm/trunk/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll?rev=116956&r1=116955&r2=116956&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll (original)
+++ llvm/trunk/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll Wed Oct 20 17:03:58 2010
@@ -1,15 +1,23 @@
-; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 | grep vmov.f32 | count 1
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 | FileCheck %s
 
 define void @fht(float* nocapture %fz, i16 signext %n) nounwind {
+; CHECK: fht:
 entry:
   br label %bb5
 
 bb5:                                              ; preds = %bb5, %entry
+; CHECK: %bb5
+; CHECK: bne
   br i1 undef, label %bb5, label %bb.nph
 
 bb.nph:                                           ; preds = %bb5
   br label %bb7
 
+; Loop preheader
+; CHECK: vmov.f32
+; CHECK: vmul.f32
+; CHECK: vsub.f32
+; CHECK: vadd.f32
 bb7:                                              ; preds = %bb9, %bb.nph
   %s1.02 = phi float [ undef, %bb.nph ], [ %35, %bb9 ] ; <float> [#uses=3]
   %tmp79 = add i32 undef, undef                   ; <i32> [#uses=1]
@@ -19,6 +27,9 @@
   br label %bb8
 
 bb8:                                              ; preds = %bb8, %bb7
+; CHECK: %bb8
+; CHECK-NOT: vmov.f32
+; CHECK: blt
   %tmp54 = add i32 0, %tmp53                      ; <i32> [#uses=0]
   %fi.1 = getelementptr float* %fz, i32 undef     ; <float*> [#uses=2]
   %tmp80 = add i32 0, %tmp79                      ; <i32> [#uses=1]
@@ -62,6 +73,8 @@
   br i1 %34, label %bb8, label %bb9
 
 bb9:                                              ; preds = %bb8
+; CHECK: %bb9
+; CHECK: vmov.f32
   %35 = fadd float 0.000000e+00, undef            ; <float> [#uses=1]
   br label %bb7
 }

Modified: llvm/trunk/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll?rev=116956&r1=116955&r2=116956&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll Wed Oct 20 17:03:58 2010
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse41 -stats |& grep {7 machine-licm}
+; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse41 -stats |& grep {8 machine-licm}
 ; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse41 | FileCheck %s
 ; rdar://6627786
 ; rdar://7792037



From gohman at apple.com  Wed Oct 20 17:04:02 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 20 Oct 2010 22:04:02 -0000
Subject: [llvm-commits] [llvm] r116957 -
 /llvm/trunk/test/Analysis/TypeBasedAliasAnalysis/aliastest.ll
Message-ID: <20101020220402.B702B2A6C12D@llvm.org>

Author: djg
Date: Wed Oct 20 17:04:02 2010
New Revision: 116957

URL: http://llvm.org/viewvc/llvm-project?rev=116957&view=rev
Log:
Add some comments.

Modified:
    llvm/trunk/test/Analysis/TypeBasedAliasAnalysis/aliastest.ll

Modified: llvm/trunk/test/Analysis/TypeBasedAliasAnalysis/aliastest.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/TypeBasedAliasAnalysis/aliastest.ll?rev=116957&r1=116956&r2=116957&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/TypeBasedAliasAnalysis/aliastest.ll (original)
+++ llvm/trunk/test/Analysis/TypeBasedAliasAnalysis/aliastest.ll Wed Oct 20 17:04:02 2010
@@ -1,5 +1,7 @@
 ; RUN: opt < %s -enable-tbaa -tbaa -basicaa -gvn -S | FileCheck %s
 
+; Test that basic alias queries work.
+
 ; CHECK: @test0_yes
 ; CHECK: add i8 %x, %x
 define i8 @test0_yes(i8* %a, i8* %b) nounwind {
@@ -20,6 +22,8 @@
   ret i8 %z
 }
 
+; Test that basic invariant-memory queries work.
+
 ; CHECK: @test1_yes
 ; CHECK: add i8 %x, %x
 define i8 @test1_yes(i8* %a, i8* %b) nounwind {



From gohman at apple.com  Wed Oct 20 17:11:14 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 20 Oct 2010 22:11:14 -0000
Subject: [llvm-commits] [llvm] r116958 -
	/llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp
Message-ID: <20101020221114.BBADB2A6C12C@llvm.org>

Author: djg
Date: Wed Oct 20 17:11:14 2010
New Revision: 116958

URL: http://llvm.org/viewvc/llvm-project?rev=116958&view=rev
Log:
Factor out the main aliasing check into a separate function.

Modified:
    llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp

Modified: llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp?rev=116958&r1=116957&r2=116958&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp Wed Oct 20 17:11:14 2010
@@ -103,6 +103,8 @@
       return this;
     }
 
+    bool Aliases(const MDNode *A, const MDNode *B) const;
+
   private:
     virtual void getAnalysisUsage(AnalysisUsage &AU) const;
     virtual AliasResult alias(const Location &LocA, const Location &LocB);
@@ -125,27 +127,19 @@
   AliasAnalysis::getAnalysisUsage(AU);
 }
 
-AliasAnalysis::AliasResult
-TypeBasedAliasAnalysis::alias(const Location &LocA,
-                              const Location &LocB) {
-  if (!EnableTBAA)
-    return AliasAnalysis::alias(LocA, LocB);
-
-  // Get the attached MDNodes. If either value lacks a tbaa MDNode, we must
-  // be conservative.
-  const MDNode *AM = LocA.TBAATag;
-  if (!AM) return AliasAnalysis::alias(LocA, LocB);
-  const MDNode *BM = LocB.TBAATag;
-  if (!BM) return AliasAnalysis::alias(LocA, LocB);
-
+/// Aliases - Test whether the type represented by A may alias the
+/// type represented by B.
+bool
+TypeBasedAliasAnalysis::Aliases(const MDNode *A,
+                                const MDNode *B) const {
   // Keep track of the root node for A and B.
   TBAANode RootA, RootB;
 
   // Climb the tree from A to see if we reach B.
-  for (TBAANode T(AM); ; ) {
-    if (T.getNode() == BM)
+  for (TBAANode T(A); ; ) {
+    if (T.getNode() == B)
       // B is an ancestor of A.
-      return AliasAnalysis::alias(LocA, LocB);
+      return true;
 
     RootA = T;
     T = T.getParent();
@@ -154,10 +148,10 @@
   }
 
   // Climb the tree from B to see if we reach A.
-  for (TBAANode T(BM); ; ) {
-    if (T.getNode() == AM)
+  for (TBAANode T(B); ; ) {
+    if (T.getNode() == A)
       // A is an ancestor of B.
-      return AliasAnalysis::alias(LocA, LocB);
+      return true;
 
     RootB = T;
     T = T.getParent();
@@ -167,13 +161,34 @@
 
   // Neither node is an ancestor of the other.
   
-  // If they have the same root, then we've proved there's no alias.
-  if (RootA.getNode() == RootB.getNode())
-    return NoAlias;
-
   // If they have different roots, they're part of different potentially
   // unrelated type systems, so we must be conservative.
-  return AliasAnalysis::alias(LocA, LocB);
+  if (RootA.getNode() != RootB.getNode())
+    return true;
+
+  // If they have the same root, then we've proved there's no alias.
+  return false;
+}
+
+AliasAnalysis::AliasResult
+TypeBasedAliasAnalysis::alias(const Location &LocA,
+                              const Location &LocB) {
+  if (!EnableTBAA)
+    return AliasAnalysis::alias(LocA, LocB);
+
+  // Get the attached MDNodes. If either value lacks a tbaa MDNode, we must
+  // be conservative.
+  const MDNode *AM = LocA.TBAATag;
+  if (!AM) return AliasAnalysis::alias(LocA, LocB);
+  const MDNode *BM = LocB.TBAATag;
+  if (!BM) return AliasAnalysis::alias(LocA, LocB);
+
+  // If they may alias, chain to the next AliasAnalysis.
+  if (Aliases(AM, BM))
+    return AliasAnalysis::alias(LocA, LocB);
+
+  // Otherwise return a definitive result.
+  return NoAlias;
 }
 
 bool TypeBasedAliasAnalysis::pointsToConstantMemory(const Location &Loc) {



From resistor at mac.com  Wed Oct 20 17:22:31 2010
From: resistor at mac.com (Owen Anderson)
Date: Wed, 20 Oct 2010 22:22:31 -0000
Subject: [llvm-commits] [llvm] r116959 - in /llvm/trunk:
 include/llvm/PassRegistry.h include/llvm/PassSupport.h
 lib/VMCore/PassRegistry.cpp
Message-ID: <20101020222231.2B74C2A6C12C@llvm.org>

Author: resistor
Date: Wed Oct 20 17:22:30 2010
New Revision: 116959

URL: http://llvm.org/viewvc/llvm-project?rev=116959&view=rev
Log:
Attempt to fix valgrind complaining about (benign) leaks in pass registration by having PassRegistry
delete PassInfo objects that were created using new-style initialization.

Modified:
    llvm/trunk/include/llvm/PassRegistry.h
    llvm/trunk/include/llvm/PassSupport.h
    llvm/trunk/lib/VMCore/PassRegistry.cpp

Modified: llvm/trunk/include/llvm/PassRegistry.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/PassRegistry.h?rev=116959&r1=116958&r2=116959&view=diff
==============================================================================
--- llvm/trunk/include/llvm/PassRegistry.h (original)
+++ llvm/trunk/include/llvm/PassRegistry.h Wed Oct 20 17:22:30 2010
@@ -53,7 +53,7 @@
   
   /// registerPass - Register a pass (by means of its PassInfo) with the 
   /// registry.  Required in order to use the pass with a PassManager.
-  void registerPass(const PassInfo &PI);
+  void registerPass(const PassInfo &PI, bool ShouldFree = false);
   
   /// registerPass - Unregister a pass (by means of its PassInfo) with the 
   /// registry.
@@ -63,7 +63,8 @@
   // an analysis group) with the registry.  Like registerPass, this is required 
   // in order for a PassManager to be able to use this group/pass.
   void registerAnalysisGroup(const void *InterfaceID, const void *PassID,
-                             PassInfo& Registeree, bool isDefault);
+                             PassInfo& Registeree, bool isDefault,
+                             bool ShouldFree = false);
   
   /// enumerateWith - Enumerate the registered passes, calling the provided
   /// PassRegistrationListener's passEnumerate() callback on each of them.

Modified: llvm/trunk/include/llvm/PassSupport.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/PassSupport.h?rev=116959&r1=116958&r2=116959&view=diff
==============================================================================
--- llvm/trunk/include/llvm/PassSupport.h (original)
+++ llvm/trunk/include/llvm/PassSupport.h Wed Oct 20 17:22:30 2010
@@ -149,7 +149,7 @@
   static void* initialize##passName##PassOnce(PassRegistry &Registry) { \
     PassInfo *PI = new PassInfo(name, arg, & passName ::ID, \
       PassInfo::NormalCtor_t(callDefaultCtor< passName >), cfg, analysis); \
-    Registry.registerPass(*PI); \
+    Registry.registerPass(*PI, true); \
     return PI; \
   } \
   void llvm::initialize##passName##Pass(PassRegistry &Registry) { \
@@ -167,7 +167,7 @@
 #define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis) \
     PassInfo *PI = new PassInfo(name, arg, & passName ::ID, \
       PassInfo::NormalCtor_t(callDefaultCtor< passName >), cfg, analysis); \
-    Registry.registerPass(*PI); \
+    Registry.registerPass(*PI, true); \
     return PI; \
   } \
   void llvm::initialize##passName##Pass(PassRegistry &Registry) { \
@@ -252,7 +252,7 @@
   static void* initialize##agName##AnalysisGroupOnce(PassRegistry &Registry) { \
     initialize##defaultPass##Pass(Registry); \
     PassInfo *AI = new PassInfo(name, & agName :: ID); \
-    Registry.registerAnalysisGroup(& agName ::ID, 0, *AI, false); \
+    Registry.registerAnalysisGroup(& agName ::ID, 0, *AI, false, true); \
     return AI; \
   } \
   void llvm::initialize##agName##AnalysisGroup(PassRegistry &Registry) { \
@@ -265,10 +265,11 @@
     if (!def) initialize##agName##AnalysisGroup(Registry); \
     PassInfo *PI = new PassInfo(name, arg, & passName ::ID, \
       PassInfo::NormalCtor_t(callDefaultCtor< passName >), cfg, analysis); \
-    Registry.registerPass(*PI); \
+    Registry.registerPass(*PI, true); \
     \
     PassInfo *AI = new PassInfo(name, & agName :: ID); \
-    Registry.registerAnalysisGroup(& agName ::ID, & passName ::ID, *AI, def); \
+    Registry.registerAnalysisGroup(& agName ::ID, & passName ::ID, \
+                                   *AI, def, true); \
     return AI; \
   } \
   void llvm::initialize##passName##Pass(PassRegistry &Registry) { \
@@ -283,10 +284,11 @@
 #define INITIALIZE_AG_PASS_END(passName, agName, arg, n, cfg, analysis, def) \
     PassInfo *PI = new PassInfo(n, arg, & passName ::ID, \
       PassInfo::NormalCtor_t(callDefaultCtor< passName >), cfg, analysis); \
-    Registry.registerPass(*PI); \
+    Registry.registerPass(*PI, true); \
     \
     PassInfo *AI = new PassInfo(n, & agName :: ID); \
-    Registry.registerAnalysisGroup(& agName ::ID, & passName ::ID, *AI, def); \
+    Registry.registerAnalysisGroup(& agName ::ID, & passName ::ID, \
+                                   *AI, def, true); \
     return AI; \
   } \
   void llvm::initialize##passName##Pass(PassRegistry &Registry) { \

Modified: llvm/trunk/lib/VMCore/PassRegistry.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/PassRegistry.cpp?rev=116959&r1=116958&r2=116959&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/PassRegistry.cpp (original)
+++ llvm/trunk/lib/VMCore/PassRegistry.cpp Wed Oct 20 17:22:30 2010
@@ -54,6 +54,7 @@
   };
   DenseMap<const PassInfo*, AnalysisGroupInfo> AnalysisGroupInfoMap;
   
+  std::vector<const PassInfo*> ToFree;
   std::vector<PassRegistrationListener*> Listeners;
 };
 
@@ -70,6 +71,11 @@
 PassRegistry::~PassRegistry() {
   sys::SmartScopedLock<true> Guard(*Lock);
   PassRegistryImpl *Impl = static_cast<PassRegistryImpl*>(pImpl);
+  
+  for (std::vector<const PassInfo*>::iterator I = Impl->ToFree.begin(),
+       E = Impl->ToFree.end(); I != E; ++I)
+    delete *I;
+  
   delete Impl;
   pImpl = 0;
 }
@@ -93,7 +99,7 @@
 // Pass Registration mechanism
 //
 
-void PassRegistry::registerPass(const PassInfo &PI) {
+void PassRegistry::registerPass(const PassInfo &PI, bool ShouldFree) {
   sys::SmartScopedLock<true> Guard(*Lock);
   PassRegistryImpl *Impl = static_cast<PassRegistryImpl*>(getImpl());
   bool Inserted =
@@ -105,6 +111,8 @@
   for (std::vector<PassRegistrationListener*>::iterator
        I = Impl->Listeners.begin(), E = Impl->Listeners.end(); I != E; ++I)
     (*I)->passRegistered(&PI);
+  
+  if (ShouldFree) Impl->ToFree.push_back(&PI);
 }
 
 void PassRegistry::unregisterPass(const PassInfo &PI) {
@@ -132,7 +140,8 @@
 void PassRegistry::registerAnalysisGroup(const void *InterfaceID, 
                                          const void *PassID,
                                          PassInfo& Registeree,
-                                         bool isDefault) {
+                                         bool isDefault,
+                                         bool ShouldFree) {
   PassInfo *InterfaceInfo =  const_cast<PassInfo*>(getPassInfo(InterfaceID));
   if (InterfaceInfo == 0) {
     // First reference to Interface, register it now.
@@ -167,6 +176,9 @@
       InterfaceInfo->setNormalCtor(ImplementationInfo->getNormalCtor());
     }
   }
+  
+  PassRegistryImpl *Impl = static_cast<PassRegistryImpl*>(getImpl());
+  if (ShouldFree) Impl->ToFree.push_back(&Registeree);
 }
 
 void PassRegistry::addRegistrationListener(PassRegistrationListener *L) {



From gohman at apple.com  Wed Oct 20 17:37:41 2010
From: gohman at apple.com (Dan Gohman)
Date: Wed, 20 Oct 2010 22:37:41 -0000
Subject: [llvm-commits] [llvm] r116960 -
	/llvm/trunk/lib/Analysis/MemDepPrinter.cpp
Message-ID: <20101020223742.093CE2A6C12C@llvm.org>

Author: djg
Date: Wed Oct 20 17:37:41 2010
New Revision: 116960

URL: http://llvm.org/viewvc/llvm-project?rev=116960&view=rev
Log:
Memdep says that an instruction clobbers itself
when it means there is no specific clobber instruction.

Modified:
    llvm/trunk/lib/Analysis/MemDepPrinter.cpp

Modified: llvm/trunk/lib/Analysis/MemDepPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/MemDepPrinter.cpp?rev=116960&r1=116959&r2=116960&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/MemDepPrinter.cpp (original)
+++ llvm/trunk/lib/Analysis/MemDepPrinter.cpp Wed Oct 20 17:37:41 2010
@@ -150,7 +150,10 @@
         WriteAsOperand(OS, DepBB, /*PrintType=*/false, M);
       }
       OS << " from: ";
-      DepInst->print(OS);
+      if (DepInst == Inst)
+        OS << "<unspecified>";
+      else
+        DepInst->print(OS);
       OS << "\n";
     }
 



From rafael.espindola at gmail.com  Wed Oct 20 17:44:57 2010
From: rafael.espindola at gmail.com (=?UTF-8?Q?Rafael_Esp=C3=ADndola?=)
Date: Wed, 20 Oct 2010 18:44:57 -0400
Subject: [llvm-commits] [patch] Remember the VariantKind when recursively
	evaluating a variable
Message-ID: <AANLkTikahGydz4jxzoLBnraRpNYHy=pXqo2pwakLgO1G@mail.gmail.com>

This is an update to a patch I posted some time ago. It fixes relocations
against aliases. Without this patch we would just forget the VariantKind.

Another option is to just not recurse if the variant kind is not
VK_None. This would match gnu as a bit better, but also requires a
change to  MCAssembler::EvaluateFixup so that it can handle aliases
correctly.

Is the patch OK?

Cheers,
Rafael
-------------- next part --------------
A non-text attachment was scrubbed...
Name: alias-reloc.patch
Type: text/x-patch
Size: 9115 bytes
Desc: not available
Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101020/72605ba5/attachment.bin 

From isanbard at gmail.com  Wed Oct 20 17:44:55 2010
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 20 Oct 2010 22:44:55 -0000
Subject: [llvm-commits] [llvm] r116961 - in /llvm/trunk:
 lib/Target/ARM/ARMCodeEmitter.cpp lib/Target/ARM/ARMInstrVFP.td
 test/MC/ARM/simple-fp-encoding.ll
Message-ID: <20101020224455.237022A6C12C@llvm.org>

Author: void
Date: Wed Oct 20 17:44:54 2010
New Revision: 116961

URL: http://llvm.org/viewvc/llvm-project?rev=116961&view=rev
Log:
Add encodings for movement between ARM core registers and single-precision
registers.

Modified:
    llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
    llvm/trunk/lib/Target/ARM/ARMInstrVFP.td
    llvm/trunk/test/MC/ARM/simple-fp-encoding.ll

Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=116961&r1=116960&r2=116961&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Wed Oct 20 17:44:54 2010
@@ -988,7 +988,7 @@
     return;
   }
 
-  // Set bit I(25), because this is not in immediate enconding.
+  // Set bit I(25), because this is not in immediate encoding.
   Binary |= 1 << ARMII::I_BitShift;
   assert(TargetRegisterInfo::isPhysicalRegister(MO2.getReg()));
   // Set bit[3:0] to the corresponding Rm register

Modified: llvm/trunk/lib/Target/ARM/ARMInstrVFP.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrVFP.td?rev=116961&r1=116960&r2=116961&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrVFP.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrVFP.td Wed Oct 20 17:44:54 2010
@@ -51,9 +51,9 @@
 //
 
 let canFoldAsLoad = 1, isReMaterializable = 1 in {
-def VLDRD : ADI5<0b1101, 0b01, (outs DPR:$dst), (ins addrmode5:$addr),
-                 IIC_fpLoad64, "vldr", ".64\t$dst, $addr",
-                 [(set DPR:$dst, (f64 (load addrmode5:$addr)))]>;
+def VLDRD : ADI5<0b1101, 0b01, (outs DPR:$Dd), (ins addrmode5:$addr),
+                 IIC_fpLoad64, "vldr", ".64\t$Dd, $addr",
+                 [(set DPR:$Dd, (f64 (load addrmode5:$addr)))]>;
 
 def VLDRS : ASI5<0b1101, 0b01, (outs SPR:$dst), (ins addrmode5:$addr),
                  IIC_fpLoad32, "vldr", ".32\t$dst, $addr",
@@ -469,13 +469,39 @@
 // FP <-> GPR Copies.  Int <-> FP Conversions.
 //
 
-def VMOVRS : AVConv2I<0b11100001, 0b1010, (outs GPR:$dst), (ins SPR:$src),
-                 IIC_fpMOVSI, "vmov", "\t$dst, $src",
-                 [(set GPR:$dst, (bitconvert SPR:$src))]>;
-
-def VMOVSR : AVConv4I<0b11100000, 0b1010, (outs SPR:$dst), (ins GPR:$src),
-                 IIC_fpMOVIS, "vmov", "\t$dst, $src",
-                 [(set SPR:$dst, (bitconvert GPR:$src))]>;
+def VMOVRS : AVConv2I<0b11100001, 0b1010,
+                      (outs GPR:$Rt), (ins SPR:$Sn),
+                      IIC_fpMOVSI, "vmov", "\t$Rt, $Sn",
+                      [(set GPR:$Rt, (bitconvert SPR:$Sn))]> {
+  // Instruction operands.
+  bits<4> Rt;
+  bits<5> Sn;
+
+  // Encode instruction operands.
+  let Inst{19-16} = Sn{4-1};
+  let Inst{7}     = Sn{0};
+  let Inst{15-12} = Rt;
+
+  let Inst{6-5}   = 0b00;
+  let Inst{3-0}   = 0b0000;
+}
+
+def VMOVSR : AVConv4I<0b11100000, 0b1010,
+                      (outs SPR:$Sn), (ins GPR:$Rt),
+                      IIC_fpMOVIS, "vmov", "\t$Sn, $Rt",
+                      [(set SPR:$Sn, (bitconvert GPR:$Rt))]> {
+  // Instruction operands.
+  bits<5> Sn;
+  bits<4> Rt;
+
+  // Encode instruction operands.
+  let Inst{19-16} = Sn{4-1};
+  let Inst{7}     = Sn{0};
+  let Inst{15-12} = Rt;
+
+  let Inst{6-5}   = 0b00;
+  let Inst{3-0}   = 0b0000;
+}
 
 let neverHasSideEffects = 1 in {
 def VMOVRRD  : AVConv3I<0b11000101, 0b1011,
@@ -883,29 +909,29 @@
 //
 
 let neverHasSideEffects = 1 in {
-def VMOVDcc  : ADuI<0b11101, 0b11, 0b0000, 0b01, 0,
-                    (outs DPR:$dst), (ins DPR:$false, DPR:$true),
-                    IIC_fpUNA64, "vmov", ".f64\t$dst, $true",
-                [/*(set DPR:$dst, (ARMcmov DPR:$false, DPR:$true, imm:$cc))*/]>,
-                    RegConstraint<"$false = $dst">;
-
-def VMOVScc  : ASuI<0b11101, 0b11, 0b0000, 0b01, 0,
-                    (outs SPR:$dst), (ins SPR:$false, SPR:$true),
-                    IIC_fpUNA32, "vmov", ".f32\t$dst, $true",
-                [/*(set SPR:$dst, (ARMcmov SPR:$false, SPR:$true, imm:$cc))*/]>,
-                    RegConstraint<"$false = $dst">;
-
-def VNEGDcc  : ADuI<0b11101, 0b11, 0b0001, 0b01, 0,
-                    (outs DPR:$dst), (ins DPR:$false, DPR:$true),
-                    IIC_fpUNA64, "vneg", ".f64\t$dst, $true",
-                [/*(set DPR:$dst, (ARMcneg DPR:$false, DPR:$true, imm:$cc))*/]>,
-                    RegConstraint<"$false = $dst">;
-
-def VNEGScc  : ASuI<0b11101, 0b11, 0b0001, 0b01, 0,
-                    (outs SPR:$dst), (ins SPR:$false, SPR:$true),
-                    IIC_fpUNA32, "vneg", ".f32\t$dst, $true",
-                [/*(set SPR:$dst, (ARMcneg SPR:$false, SPR:$true, imm:$cc))*/]>,
-                    RegConstraint<"$false = $dst">;
+def VMOVDcc  : ADuI_Encode<0b11101, 0b11, 0b0000, 0b01, 0,
+                           (outs DPR:$Dd), (ins DPR:$Dn, DPR:$Dm),
+                           IIC_fpUNA64, "vmov", ".f64\t$Dd, $Dm",
+                      [/*(set DPR:$Dd, (ARMcmov DPR:$Dn, DPR:$Dm, imm:$cc))*/]>,
+                           RegConstraint<"$Dn = $Dd">;
+
+def VMOVScc  : ASuI_Encode<0b11101, 0b11, 0b0000, 0b01, 0,
+                           (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm),
+                           IIC_fpUNA32, "vmov", ".f32\t$Sd, $Sm",
+                      [/*(set SPR:$Sd, (ARMcmov SPR:$Sn, SPR:$Sm, imm:$cc))*/]>,
+                           RegConstraint<"$Sn = $Sd">;
+
+def VNEGDcc  : ADuI_Encode<0b11101, 0b11, 0b0001, 0b01, 0,
+                           (outs DPR:$Dd), (ins DPR:$Dn, DPR:$Dm),
+                           IIC_fpUNA64, "vneg", ".f64\t$Dd, $Dm",
+                      [/*(set DPR:$Dd, (ARMcneg DPR:$Dn, DPR:$Dm, imm:$cc))*/]>,
+                           RegConstraint<"$Dn = $Dd">;
+
+def VNEGScc  : ASuI_Encode<0b11101, 0b11, 0b0001, 0b01, 0,
+                           (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm),
+                           IIC_fpUNA32, "vneg", ".f32\t$Sd, $Sm",
+                      [/*(set SPR:$Sd, (ARMcneg SPR:$Sn, SPR:$Sm, imm:$cc))*/]>,
+                           RegConstraint<"$Sn = $Sd">;
 } // neverHasSideEffects
 
 //===----------------------------------------------------------------------===//

Modified: llvm/trunk/test/MC/ARM/simple-fp-encoding.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/simple-fp-encoding.ll?rev=116961&r1=116960&r2=116961&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/simple-fp-encoding.ll (original)
+++ llvm/trunk/test/MC/ARM/simple-fp-encoding.ll Wed Oct 20 17:44:54 2010
@@ -1,4 +1,4 @@
-;RUN: llc -mtriple=armv7-apple-darwin -mcpu=cortex-a8 -mattr=-neonfp -show-mc-encoding < %s | FileCheck %s
+; RUN: llc -mtriple=armv7-apple-darwin -mcpu=cortex-a8 -mattr=-neonfp -show-mc-encoding < %s | FileCheck %s
 
 
 ; FIXME: Once the ARM integrated assembler is up and going, these sorts of tests
@@ -275,27 +275,27 @@
   ret float %add
 }
 
-define double @f94(double %a, double %b, double %c) nounwind readnone {
+define double @f92(double %a, double %b, double %c) nounwind readnone {
 entry:
-; CHECK: f94
+; CHECK: f92
 ; CHECK: vmls.f64 d16, d18, d17      @ encoding: [0xe1,0x0b,0x42,0xee]
   %mul = fmul double %a, %b
   %sub = fsub double %c, %mul
   ret double %sub
 }
 
-define float @f95(float %a, float %b, float %c) nounwind readnone {
+define float @f93(float %a, float %b, float %c) nounwind readnone {
 entry:
-; CHECK: f95
+; CHECK: f93
 ; CHECK: vmls.f32 s2, s1, s0         @ encoding: [0xc0,0x1a,0x00,0xee]
   %mul = fmul float %a, %b
   %sub = fsub float %c, %mul
   ret float %sub
 }
 
-define double @f96(double %a, double %b, double %c) nounwind readnone {
+define double @f94(double %a, double %b, double %c) nounwind readnone {
 entry:
-; CHECK: f96
+; CHECK: f94
 ; CHECK: vnmla.f64 d16, d18, d17     @ encoding: [0xe1,0x0b,0x52,0xee]
   %mul = fmul double %a, %b
   %sub = fsub double -0.000000e+00, %mul
@@ -303,9 +303,9 @@
   ret double %sub3
 }
 
-define float @f97(float %a, float %b, float %c) nounwind readnone {
+define float @f95(float %a, float %b, float %c) nounwind readnone {
 entry:
-; CHECK: f97
+; CHECK: f95
 ; CHECK: vnmla.f32 s2, s1, s0        @ encoding: [0xc0,0x1a,0x10,0xee]
   %mul = fmul float %a, %b
   %sub = fsub float -0.000000e+00, %mul
@@ -313,18 +313,18 @@
   ret float %sub3
 }
 
-define double @f92(double %a, double %b, double %c) nounwind readnone {
+define double @f96(double %a, double %b, double %c) nounwind readnone {
 entry:
-; CHECK: f92
+; CHECK: f96
 ; CHECK: vnmls.f64 d16, d18, d17     @ encoding: [0xa1,0x0b,0x52,0xee]
   %mul = fmul double %a, %b
   %sub = fsub double %mul, %c
   ret double %sub
 }
 
-define float @f93(float %a, float %b, float %c) nounwind readnone {
+define float @f97(float %a, float %b, float %c) nounwind readnone {
 entry:
-; CHECK: f93
+; CHECK: f97
 ; CHECK: vnmls.f32 s2, s1, s0        @ encoding: [0x80,0x1a,0x10,0xee]
   %mul = fmul float %a, %b
   %sub = fsub float %mul, %c
@@ -333,6 +333,38 @@
 
 ; FIXME: Check for fmstat instruction.
 
+
+define double @f98(double %a, i32 %i) nounwind readnone {
+entry:
+  %cmp = icmp eq i32 %i, 3
+  br i1 %cmp, label %return, label %if.end
+
+if.end:                                           ; preds = %entry
+; CHECK: f98
+; CHECK: vnegne.f64 d16, d16         @ encoding: [0x60,0x0b,0xf1,0x1e]
+  %sub = fsub double -0.000000e+00, %a
+  ret double %sub
+
+return:                                           ; preds = %entry
+  ret double %a
+}
+
+define float @f99(float %a, i32 %i) nounwind readnone {
+entry:
+  %cmp = icmp eq i32 %i, 3
+  br i1 %cmp, label %if.end, label %return
+
+if.end:                                           ; preds = %entry
+; CHECK: f99
+; CHECK: vmovne r0, s0               @ encoding: [0x10,0x0a,0x10,0x1e]
+  %sub = fsub float -0.000000e+00, %a
+  ret float %sub
+
+return:                                           ; preds = %entry
+  ret float %a
+}
+
+
 define i32 @f100() nounwind readnone {
 entry:
 ; CHECK: f100
@@ -368,3 +400,26 @@
   %add = fadd float %a, 3.000000e+00
   ret float %add
 }
+
+define void @f104(float %a, float %b, float %c, float %d, float %e, float %f) nounwind {
+entry:
+; CHECK: f104
+; CHECK: vmov s2, r0                 @ encoding: [0x10,0x0a,0x01,0xee]
+; CHECK: vmov s3, r1                 @ encoding: [0x90,0x1a,0x01,0xee]
+; CHECK: vmov s4, r2                 @ encoding: [0x10,0x2a,0x02,0xee]
+; CHECK: vmov s5, r3                 @ encoding: [0x90,0x3a,0x02,0xee]
+  %conv = fptosi float %a to i32
+  %conv2 = fptosi float %b to i32
+  %conv4 = fptosi float %c to i32
+  %conv6 = fptosi float %d to i32
+  %conv8 = fptosi float %e to i32
+  %conv10 = fptosi float %f to i32
+  tail call void @g104(i32 %conv, i32 %conv2, i32 %conv4, i32 %conv6, i32 %conv8, i32 %conv10) nounwind
+; CHECK: vmov r0, s2                 @ encoding: [0x10,0x0a,0x11,0xee]
+; CHECK: vmov r1, s3                 @ encoding: [0x90,0x1a,0x11,0xee]
+; CHECK: vmov r2, s4                 @ encoding: [0x10,0x2a,0x12,0xee]
+; CHECK: vmov r3, s5                 @ encoding: [0x90,0x3a,0x12,0xee]
+  ret void
+}
+
+declare void @g104(i32, i32, i32, i32, i32, i32)



From stoklund at 2pi.dk  Wed Oct 20 17:50:42 2010
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Wed, 20 Oct 2010 22:50:42 -0000
Subject: [llvm-commits] [llvm] r116962 -
	/llvm/trunk/lib/CodeGen/LiveRangeEdit.cpp
Message-ID: <20101020225042.9BC1B2A6C12C@llvm.org>

Author: stoklund
Date: Wed Oct 20 17:50:42 2010
New Revision: 116962

URL: http://llvm.org/viewvc/llvm-project?rev=116962&view=rev
Log:
Remember to keep track of rematted values.

Modified:
    llvm/trunk/lib/CodeGen/LiveRangeEdit.cpp

Modified: llvm/trunk/lib/CodeGen/LiveRangeEdit.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveRangeEdit.cpp?rev=116962&r1=116961&r2=116962&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LiveRangeEdit.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveRangeEdit.cpp Wed Oct 20 17:50:42 2010
@@ -138,6 +138,7 @@
                                          const TargetRegisterInfo &tri) {
   assert(RM.OrigMI && "Invalid remat");
   tii.reMaterialize(MBB, MI, DestReg, 0, RM.OrigMI, tri);
+  rematted_.insert(RM.ParentVNI);
   return lis.InsertMachineInstrInMaps(--MI).getDefIndex();
 }
 



From isanbard at gmail.com  Wed Oct 20 18:37:40 2010
From: isanbard at gmail.com (Bill Wendling)
Date: Wed, 20 Oct 2010 23:37:40 -0000
Subject: [llvm-commits] [llvm] r116970 - in /llvm/trunk:
 lib/Target/ARM/ARMInstrVFP.td test/MC/ARM/simple-fp-encoding.ll
Message-ID: <20101020233740.EFF192A6C12C@llvm.org>

Author: void
Date: Wed Oct 20 18:37:40 2010
New Revision: 116970

URL: http://llvm.org/viewvc/llvm-project?rev=116970&view=rev
Log:
Add encoding for moving a value between two ARM core registers and a doublework
extension register.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrVFP.td
    llvm/trunk/test/MC/ARM/simple-fp-encoding.ll

Modified: llvm/trunk/lib/Target/ARM/ARMInstrVFP.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrVFP.td?rev=116970&r1=116969&r2=116970&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrVFP.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrVFP.td Wed Oct 20 18:37:40 2010
@@ -505,9 +505,20 @@
 
 let neverHasSideEffects = 1 in {
 def VMOVRRD  : AVConv3I<0b11000101, 0b1011,
-                      (outs GPR:$wb, GPR:$dst2), (ins DPR:$src),
-                 IIC_fpMOVDI, "vmov", "\t$wb, $dst2, $src",
+                        (outs GPR:$Rt, GPR:$Rt2), (ins DPR:$Dm),
+                        IIC_fpMOVDI, "vmov", "\t$Rt, $Rt2, $Dm",
                  [/* FIXME: Can't write pattern for multiple result instr*/]> {
+  // Instruction operands.
+  bits<5> Dm;
+  bits<4> Rt;
+  bits<4> Rt2;
+
+  // Encode instruction operands.
+  let Inst{3-0}   = Dm{3-0};
+  let Inst{5}     = Dm{4};
+  let Inst{15-12} = Rt;
+  let Inst{19-16} = Rt2;
+
   let Inst{7-6} = 0b00;
 }
 
@@ -523,10 +534,21 @@
 // FMDLR: GPR -> SPR
 
 def VMOVDRR : AVConv5I<0b11000100, 0b1011,
-                     (outs DPR:$dst), (ins GPR:$src1, GPR:$src2),
-                IIC_fpMOVID, "vmov", "\t$dst, $src1, $src2",
-                [(set DPR:$dst, (arm_fmdrr GPR:$src1, GPR:$src2))]> {
-  let Inst{7-6} = 0b00;
+                      (outs DPR:$Dm), (ins GPR:$Rt, GPR:$Rt2),
+                      IIC_fpMOVID, "vmov", "\t$Dm, $Rt, $Rt2",
+                      [(set DPR:$Dm, (arm_fmdrr GPR:$Rt, GPR:$Rt2))]> {
+  // Instruction operands.
+  bits<5> Dm;
+  bits<4> Rt;
+  bits<4> Rt2;
+
+  // Encode instruction operands.
+  let Inst{3-0}   = Dm{3-0};
+  let Inst{5}     = Dm{4};
+  let Inst{15-12} = Rt;
+  let Inst{19-16} = Rt2;
+
+  let Inst{7-6}   = 0b00;
 }
 
 let neverHasSideEffects = 1 in

Modified: llvm/trunk/test/MC/ARM/simple-fp-encoding.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/simple-fp-encoding.ll?rev=116970&r1=116969&r2=116970&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/simple-fp-encoding.ll (original)
+++ llvm/trunk/test/MC/ARM/simple-fp-encoding.ll Wed Oct 20 18:37:40 2010
@@ -423,3 +423,11 @@
 }
 
 declare void @g104(i32, i32, i32, i32, i32, i32)
+
+define double @f105(i32 %a) nounwind readnone {
+entry:
+; CHECK: f105
+; CHECK: vmov r0, r1, d16            @ encoding: [0x30,0x0b,0x51,0xec]
+  %conv = uitofp i32 %a to double
+  ret double %conv
+}



From bigcheesegs at gmail.com  Wed Oct 20 18:40:28 2010
From: bigcheesegs at gmail.com (Michael J. Spencer)
Date: Wed, 20 Oct 2010 23:40:28 -0000
Subject: [llvm-commits] [llvm] r116972 - in /llvm/trunk/lib/Target/X86:
 X86ISelLowering.h X86InstrCompiler.td X86InstrInfo.td
Message-ID: <20101020234028.1DCAC2A6C12C@llvm.org>

Author: mspencer
Date: Wed Oct 20 18:40:27 2010
New Revision: 116972

URL: http://llvm.org/viewvc/llvm-project?rev=116972&view=rev
Log:
Fix Whitespace.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.h
    llvm/trunk/lib/Target/X86/X86InstrCompiler.td
    llvm/trunk/lib/Target/X86/X86InstrInfo.td

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=116972&r1=116971&r2=116972&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Wed Oct 20 18:40:27 2010
@@ -76,7 +76,7 @@
       ///
       CALL,
 
-      /// RDTSC_DAG - This operation implements the lowering for 
+      /// RDTSC_DAG - This operation implements the lowering for
       /// readcyclecounter
       RDTSC_DAG,
 
@@ -171,14 +171,14 @@
 
       // TLSADDR - Thread Local Storage.
       TLSADDR,
-      
+
       // TLSCALL - Thread Local Storage.  When calling to an OS provided
       // thunk at the address from an earlier relocation.
       TLSCALL,
 
       // EH_RETURN - Exception Handling helpers.
       EH_RETURN,
-      
+
       /// TC_RETURN - Tail call return.
       ///   operand #0 chain
       ///   operand #1 callee (register or absolute)
@@ -195,7 +195,7 @@
       // CMPPD, CMPPS - Vector double/float comparison.
       // CMPPD, CMPPS - Vector double/float comparison.
       CMPPD, CMPPS,
-      
+
       // PCMP* - Vector integer comparisons.
       PCMPEQB, PCMPEQW, PCMPEQD, PCMPEQQ,
       PCMPGTB, PCMPGTW, PCMPGTD, PCMPGTQ,
@@ -206,7 +206,7 @@
 
       // MUL_IMM - X86 specific multiply by immediate.
       MUL_IMM,
-      
+
       // PTEST - Vector bitwise comparisons
       PTEST,
 
@@ -256,8 +256,8 @@
       // MINGW_ALLOCA - MingW's __alloca call to do stack probing.
       MINGW_ALLOCA,
 
-      // ATOMADD64_DAG, ATOMSUB64_DAG, ATOMOR64_DAG, ATOMAND64_DAG, 
-      // ATOMXOR64_DAG, ATOMNAND64_DAG, ATOMSWAP64_DAG - 
+      // ATOMADD64_DAG, ATOMSUB64_DAG, ATOMOR64_DAG, ATOMAND64_DAG,
+      // ATOMXOR64_DAG, ATOMNAND64_DAG, ATOMSWAP64_DAG -
       // Atomic 64-bit binary operations.
       ATOMADD64_DAG = ISD::FIRST_TARGET_MEMORY_OPCODE,
       ATOMSUB64_DAG,
@@ -266,23 +266,23 @@
       ATOMAND64_DAG,
       ATOMNAND64_DAG,
       ATOMSWAP64_DAG,
-      
+
       // Memory barrier
       MEMBARRIER,
       MFENCE,
       SFENCE,
       LFENCE,
-      
+
       // LCMPXCHG_DAG, LCMPXCHG8_DAG - Compare and swap.
       LCMPXCHG_DAG,
       LCMPXCHG8_DAG,
 
       // VZEXT_LOAD - Load, scalar_to_vector, and zero extend.
       VZEXT_LOAD,
-      
+
       // FNSTCW16m - Store FP control world into i16 memory.
       FNSTCW16m,
-      
+
       /// FP_TO_INT*_IN_MEM - This instruction implements FP_TO_SINT with the
       /// integer destination in memory and a FP reg source.  This corresponds
       /// to the X86::FIST*m instructions and the rounding mode change stuff. It
@@ -291,7 +291,7 @@
       FP_TO_INT16_IN_MEM,
       FP_TO_INT32_IN_MEM,
       FP_TO_INT64_IN_MEM,
-      
+
       /// FILD, FILD_FLAG - This instruction implements SINT_TO_FP with the
       /// integer source in memory and FP reg result.  This corresponds to the
       /// X86::FILD*m instructions. It has three inputs (token chain, address,
@@ -299,13 +299,13 @@
       /// also produces a flag).
       FILD,
       FILD_FLAG,
-      
+
       /// FLD - This instruction implements an extending load to FP stack slots.
       /// This corresponds to the X86::FLD32m / X86::FLD64m. It takes a chain
       /// operand, ptr to load from, and a ValueType node indicating the type
       /// to load to.
       FLD,
-      
+
       /// FST - This instruction implements a truncating store to FP stack
       /// slots. This corresponds to the X86::FST32m / X86::FST64m. It takes a
       /// chain operand, value to store, address, and a ValueType to store it
@@ -315,7 +315,7 @@
       /// VAARG_64 - This instruction grabs the address of the next argument
       /// from a va_list. (reads and modifies the va_list in memory)
       VAARG_64
-      
+
       // WARNING: Do not add anything in the end unless you want the node to
       // have memop! In fact, starting from ATOMADD64_DAG all opcodes will be
       // thought as target memory ops!
@@ -432,14 +432,14 @@
 
     /// getPICBaseSymbol - Return the X86-32 PIC base.
     MCSymbol *getPICBaseSymbol(const MachineFunction *MF, MCContext &Ctx) const;
-    
+
     virtual unsigned getJumpTableEncoding() const;
 
     virtual const MCExpr *
     LowerCustomJumpTableEntry(const MachineJumpTableInfo *MJTI,
                               const MachineBasicBlock *MBB, unsigned uid,
                               MCContext &Ctx) const;
-    
+
     /// getPICJumpTableRelocaBase - Returns relocation base for the given PIC
     /// jumptable.
     virtual SDValue getPICJumpTableRelocBase(SDValue Table,
@@ -447,7 +447,7 @@
     virtual const MCExpr *
     getPICJumpTableRelocBaseExpr(const MachineFunction *MF,
                                  unsigned JTI, MCContext &Ctx) const;
-    
+
     /// getStackPtrReg - Return the stack pointer register we are using: either
     /// ESP or RSP.
     unsigned getStackPtrReg() const { return X86StackPtr; }
@@ -491,7 +491,7 @@
     virtual void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
                                     SelectionDAG &DAG) const;
 
-    
+
     virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
 
     /// isTypeDesirableForOp - Return true if the target has native support for
@@ -510,7 +510,7 @@
       EmitInstrWithCustomInserter(MachineInstr *MI,
                                   MachineBasicBlock *MBB) const;
 
- 
+
     /// getTargetNodeName - This method returns the name of a target specific
     /// DAG node.
     virtual const char *getTargetNodeName(unsigned Opcode) const;
@@ -518,12 +518,12 @@
     /// getSetCCResultType - Return the ISD::SETCC ValueType
     virtual MVT::SimpleValueType getSetCCResultType(EVT VT) const;
 
-    /// computeMaskedBitsForTargetNode - Determine which of the bits specified 
-    /// in Mask are known to be either zero or one and return them in the 
+    /// computeMaskedBitsForTargetNode - Determine which of the bits specified
+    /// in Mask are known to be either zero or one and return them in the
     /// KnownZero/KnownOne bitsets.
     virtual void computeMaskedBitsForTargetNode(const SDValue Op,
                                                 const APInt &Mask,
-                                                APInt &KnownZero, 
+                                                APInt &KnownZero,
                                                 APInt &KnownOne,
                                                 const SelectionDAG &DAG,
                                                 unsigned Depth = 0) const;
@@ -535,20 +535,20 @@
 
     virtual bool
     isGAPlusOffset(SDNode *N, const GlobalValue* &GA, int64_t &Offset) const;
-    
+
     SDValue getReturnAddressFrameIndex(SelectionDAG &DAG) const;
 
     virtual bool ExpandInlineAsm(CallInst *CI) const;
-    
+
     ConstraintType getConstraintType(const std::string &Constraint) const;
-  
+
     /// Examine constraint string and operand type and determine a weight value,
     /// where: -1 = invalid match, and 0 = so-so match to 3 = good match.
     /// The operand object must already have been set up with the operand type.
     virtual int getSingleConstraintMatchWeight(
       AsmOperandInfo &info, const char *constraint) const;
-     
-    std::vector<unsigned> 
+
+    std::vector<unsigned>
       getRegClassForInlineAsmConstraint(const std::string &Constraint,
                                         EVT VT) const;
 
@@ -562,15 +562,15 @@
                                               char ConstraintLetter,
                                               std::vector<SDValue> &Ops,
                                               SelectionDAG &DAG) const;
-    
+
     /// getRegForInlineAsmConstraint - Given a physical register constraint
     /// (e.g. {edx}), return the register number and the register class for the
     /// register.  This should only be used for C_Register constraints.  On
     /// error, this returns a register number of 0.
-    std::pair<unsigned, const TargetRegisterClass*> 
+    std::pair<unsigned, const TargetRegisterClass*>
       getRegForInlineAsmConstraint(const std::string &Constraint,
                                    EVT VT) const;
-    
+
     /// isLegalAddressingMode - Return true if the addressing mode represented
     /// by AM is legal for this target, for a load/store of the specified type.
     virtual bool isLegalAddressingMode(const AddrMode &AM, const Type *Ty)const;
@@ -625,7 +625,7 @@
       // shrink long double fp constant since fldt is very slow.
       return !X86ScalarSSEf64 || VT == MVT::f80;
     }
-    
+
     const X86Subtarget* getSubtarget() const {
       return Subtarget;
     }
@@ -666,8 +666,8 @@
 
     /// X86StackPtr - X86 physical register used as stack ptr.
     unsigned X86StackPtr;
-   
-    /// X86ScalarSSEf32, X86ScalarSSEf64 - Select between SSE or x87 
+
+    /// X86ScalarSSEf32, X86ScalarSSEf64 - Select between SSE or x87
     /// floating point ops.
     /// When SSE is available, use it for f32 operations.
     /// When SSE2 is available, use it for f64 operations.
@@ -849,7 +849,7 @@
                                                     unsigned immOpcL,
                                                     unsigned immOpcH,
                                                     bool invSrc = false) const;
-    
+
     /// Utility function to emit atomic min and max.  It takes the min/max
     /// instruction to expand, the associated basic block, and the associated
     /// cmov opcode for moving the min or max value.
@@ -872,7 +872,7 @@
 
     MachineBasicBlock *EmitLoweredMingwAlloca(MachineInstr *MI,
                                               MachineBasicBlock *BB) const;
-    
+
     MachineBasicBlock *EmitLoweredTLSCall(MachineInstr *MI,
                                           MachineBasicBlock *BB) const;
 

Modified: llvm/trunk/lib/Target/X86/X86InstrCompiler.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrCompiler.td?rev=116972&r1=116971&r2=116972&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrCompiler.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrCompiler.td Wed Oct 20 18:40:27 2010
@@ -1,10 +1,10 @@
 //===- X86InstrCompiler.td - Compiler Pseudos and Patterns -*- tablegen -*-===//
-// 
+//
 //                     The LLVM Compiler Infrastructure
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
-// 
+//
 //===----------------------------------------------------------------------===//
 //
 // This file describes the various pseudo instructions used by the compiler,
@@ -149,7 +149,7 @@
 def MOV16r0   : I<0x31, MRMInitReg, (outs GR16:$dst), (ins),
                  "",
                  [(set GR16:$dst, 0)]>, OpSize;
-                 
+
 // FIXME: Set encoding to pseudo.
 def MOV32r0  : I<0x31, MRMInitReg, (outs GR32:$dst), (ins), "",
                  [(set GR32:$dst, 0)]>;
@@ -196,7 +196,7 @@
 def : Pat<(i64 (anyext (i8 (X86setcc_c X86_COND_B, EFLAGS)))),
           (SETB_C64r)>;
 
-             
+
 //===----------------------------------------------------------------------===//
 // String Pseudo Instructions
 //
@@ -212,7 +212,7 @@
 let Defs = [RCX,RDI,RSI], Uses = [RCX,RDI,RSI], isCodeGenOnly = 1 in
 def REP_MOVSQ : RI<0xA5, RawFrm, (outs), (ins), "{rep;movsq|rep movsq}",
                    [(X86rep_movs i64)]>, REP;
-                   
+
 
 // FIXME: Should use "(X86rep_stos AL)" as the pattern.
 let Defs = [ECX,EDI], Uses = [AL,ECX,EDI], isCodeGenOnly = 1 in
@@ -268,8 +268,8 @@
                   Requires<[In64BitMode]>;
 
 // Darwin TLS Support
-// For i386, the address of the thunk is passed on the stack, on return the 
-// address of the variable is in %eax.  %ecx is trashed during the function 
+// For i386, the address of the thunk is passed on the stack, on return the
+// address of the variable is in %eax.  %ecx is trashed during the function
 // call.  All other registers are preserved.
 let Defs = [EAX, ECX],
     Uses = [ESP],
@@ -279,7 +279,7 @@
                 [(X86TLSCall addr:$sym)]>,
                 Requires<[In32BitMode]>;
 
-// For x86_64, the address of the thunk is passed in %rdi, on return 
+// For x86_64, the address of the thunk is passed in %rdi, on return
 // the address of the variable is in %rax.  All other registers are preserved.
 let Defs = [RAX],
     Uses = [RDI],
@@ -344,7 +344,7 @@
                       (X86cmov RFP80:$src1, RFP80:$src2, imm:$cond,
                                                   EFLAGS))]>;
 } // Predicates = [NoCMov]
-} // UsesCustomInserter = 1, Constraints = "", Defs = [EFLAGS] 
+} // UsesCustomInserter = 1, Constraints = "", Defs = [EFLAGS]
 } // Uses = [EFLAGS]
 
 } // Constraints = "$src1 = $dst" in
@@ -357,100 +357,100 @@
 // Atomic exchange, and, or, xor
 let Constraints = "$val = $dst", Defs = [EFLAGS],
                   usesCustomInserter = 1 in {
-                  
+
 def ATOMAND8 : I<0, Pseudo, (outs GR8:$dst),(ins i8mem:$ptr, GR8:$val),
-               "#ATOMAND8 PSEUDO!", 
+               "#ATOMAND8 PSEUDO!",
                [(set GR8:$dst, (atomic_load_and_8 addr:$ptr, GR8:$val))]>;
 def ATOMOR8 : I<0, Pseudo, (outs GR8:$dst),(ins i8mem:$ptr, GR8:$val),
-               "#ATOMOR8 PSEUDO!", 
+               "#ATOMOR8 PSEUDO!",
                [(set GR8:$dst, (atomic_load_or_8 addr:$ptr, GR8:$val))]>;
 def ATOMXOR8 : I<0, Pseudo,(outs GR8:$dst),(ins i8mem:$ptr, GR8:$val),
-               "#ATOMXOR8 PSEUDO!", 
+               "#ATOMXOR8 PSEUDO!",
                [(set GR8:$dst, (atomic_load_xor_8 addr:$ptr, GR8:$val))]>;
 def ATOMNAND8 : I<0, Pseudo,(outs GR8:$dst),(ins i8mem:$ptr, GR8:$val),
-               "#ATOMNAND8 PSEUDO!", 
+               "#ATOMNAND8 PSEUDO!",
                [(set GR8:$dst, (atomic_load_nand_8 addr:$ptr, GR8:$val))]>;
 
 def ATOMAND16 : I<0, Pseudo, (outs GR16:$dst),(ins i16mem:$ptr, GR16:$val),
-               "#ATOMAND16 PSEUDO!", 
+               "#ATOMAND16 PSEUDO!",
                [(set GR16:$dst, (atomic_load_and_16 addr:$ptr, GR16:$val))]>;
 def ATOMOR16 : I<0, Pseudo, (outs GR16:$dst),(ins i16mem:$ptr, GR16:$val),
-               "#ATOMOR16 PSEUDO!", 
+               "#ATOMOR16 PSEUDO!",
                [(set GR16:$dst, (atomic_load_or_16 addr:$ptr, GR16:$val))]>;
 def ATOMXOR16 : I<0, Pseudo,(outs GR16:$dst),(ins i16mem:$ptr, GR16:$val),
-               "#ATOMXOR16 PSEUDO!", 
+               "#ATOMXOR16 PSEUDO!",
                [(set GR16:$dst, (atomic_load_xor_16 addr:$ptr, GR16:$val))]>;
 def ATOMNAND16 : I<0, Pseudo,(outs GR16:$dst),(ins i16mem:$ptr, GR16:$val),
-               "#ATOMNAND16 PSEUDO!", 
+               "#ATOMNAND16 PSEUDO!",
                [(set GR16:$dst, (atomic_load_nand_16 addr:$ptr, GR16:$val))]>;
 def ATOMMIN16: I<0, Pseudo, (outs GR16:$dst), (ins i16mem:$ptr, GR16:$val),
-               "#ATOMMIN16 PSEUDO!", 
+               "#ATOMMIN16 PSEUDO!",
                [(set GR16:$dst, (atomic_load_min_16 addr:$ptr, GR16:$val))]>;
 def ATOMMAX16: I<0, Pseudo, (outs GR16:$dst),(ins i16mem:$ptr, GR16:$val),
-               "#ATOMMAX16 PSEUDO!", 
+               "#ATOMMAX16 PSEUDO!",
                [(set GR16:$dst, (atomic_load_max_16 addr:$ptr, GR16:$val))]>;
 def ATOMUMIN16: I<0, Pseudo, (outs GR16:$dst),(ins i16mem:$ptr, GR16:$val),
-               "#ATOMUMIN16 PSEUDO!", 
+               "#ATOMUMIN16 PSEUDO!",
                [(set GR16:$dst, (atomic_load_umin_16 addr:$ptr, GR16:$val))]>;
 def ATOMUMAX16: I<0, Pseudo, (outs GR16:$dst),(ins i16mem:$ptr, GR16:$val),
-               "#ATOMUMAX16 PSEUDO!", 
+               "#ATOMUMAX16 PSEUDO!",
                [(set GR16:$dst, (atomic_load_umax_16 addr:$ptr, GR16:$val))]>;
 
 
 def ATOMAND32 : I<0, Pseudo, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
-               "#ATOMAND32 PSEUDO!", 
+               "#ATOMAND32 PSEUDO!",
                [(set GR32:$dst, (atomic_load_and_32 addr:$ptr, GR32:$val))]>;
 def ATOMOR32 : I<0, Pseudo, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
-               "#ATOMOR32 PSEUDO!", 
+               "#ATOMOR32 PSEUDO!",
                [(set GR32:$dst, (atomic_load_or_32 addr:$ptr, GR32:$val))]>;
 def ATOMXOR32 : I<0, Pseudo,(outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
-               "#ATOMXOR32 PSEUDO!", 
+               "#ATOMXOR32 PSEUDO!",
                [(set GR32:$dst, (atomic_load_xor_32 addr:$ptr, GR32:$val))]>;
 def ATOMNAND32 : I<0, Pseudo,(outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
-               "#ATOMNAND32 PSEUDO!", 
+               "#ATOMNAND32 PSEUDO!",
                [(set GR32:$dst, (atomic_load_nand_32 addr:$ptr, GR32:$val))]>;
 def ATOMMIN32: I<0, Pseudo, (outs GR32:$dst), (ins i32mem:$ptr, GR32:$val),
-               "#ATOMMIN32 PSEUDO!", 
+               "#ATOMMIN32 PSEUDO!",
                [(set GR32:$dst, (atomic_load_min_32 addr:$ptr, GR32:$val))]>;
 def ATOMMAX32: I<0, Pseudo, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
-               "#ATOMMAX32 PSEUDO!", 
+               "#ATOMMAX32 PSEUDO!",
                [(set GR32:$dst, (atomic_load_max_32 addr:$ptr, GR32:$val))]>;
 def ATOMUMIN32: I<0, Pseudo, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
-               "#ATOMUMIN32 PSEUDO!", 
+               "#ATOMUMIN32 PSEUDO!",
                [(set GR32:$dst, (atomic_load_umin_32 addr:$ptr, GR32:$val))]>;
 def ATOMUMAX32: I<0, Pseudo, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
-               "#ATOMUMAX32 PSEUDO!", 
+               "#ATOMUMAX32 PSEUDO!",
                [(set GR32:$dst, (atomic_load_umax_32 addr:$ptr, GR32:$val))]>;
 
 
-                  
+
 def ATOMAND64 : I<0, Pseudo, (outs GR64:$dst),(ins i64mem:$ptr, GR64:$val),
-               "#ATOMAND64 PSEUDO!", 
+               "#ATOMAND64 PSEUDO!",
                [(set GR64:$dst, (atomic_load_and_64 addr:$ptr, GR64:$val))]>;
 def ATOMOR64 : I<0, Pseudo, (outs GR64:$dst),(ins i64mem:$ptr, GR64:$val),
-               "#ATOMOR64 PSEUDO!", 
+               "#ATOMOR64 PSEUDO!",
                [(set GR64:$dst, (atomic_load_or_64 addr:$ptr, GR64:$val))]>;
 def ATOMXOR64 : I<0, Pseudo,(outs GR64:$dst),(ins i64mem:$ptr, GR64:$val),
-               "#ATOMXOR64 PSEUDO!", 
+               "#ATOMXOR64 PSEUDO!",
                [(set GR64:$dst, (atomic_load_xor_64 addr:$ptr, GR64:$val))]>;
 def ATOMNAND64 : I<0, Pseudo,(outs GR64:$dst),(ins i64mem:$ptr, GR64:$val),
-               "#ATOMNAND64 PSEUDO!", 
+               "#ATOMNAND64 PSEUDO!",
                [(set GR64:$dst, (atomic_load_nand_64 addr:$ptr, GR64:$val))]>;
 def ATOMMIN64: I<0, Pseudo, (outs GR64:$dst), (ins i64mem:$ptr, GR64:$val),
-               "#ATOMMIN64 PSEUDO!", 
+               "#ATOMMIN64 PSEUDO!",
                [(set GR64:$dst, (atomic_load_min_64 addr:$ptr, GR64:$val))]>;
 def ATOMMAX64: I<0, Pseudo, (outs GR64:$dst),(ins i64mem:$ptr, GR64:$val),
-               "#ATOMMAX64 PSEUDO!", 
+               "#ATOMMAX64 PSEUDO!",
                [(set GR64:$dst, (atomic_load_max_64 addr:$ptr, GR64:$val))]>;
 def ATOMUMIN64: I<0, Pseudo, (outs GR64:$dst),(ins i64mem:$ptr, GR64:$val),
-               "#ATOMUMIN64 PSEUDO!", 
+               "#ATOMUMIN64 PSEUDO!",
                [(set GR64:$dst, (atomic_load_umin_64 addr:$ptr, GR64:$val))]>;
 def ATOMUMAX64: I<0, Pseudo, (outs GR64:$dst),(ins i64mem:$ptr, GR64:$val),
-               "#ATOMUMAX64 PSEUDO!", 
+               "#ATOMUMAX64 PSEUDO!",
                [(set GR64:$dst, (atomic_load_umax_64 addr:$ptr, GR64:$val))]>;
 }
 
-let Constraints = "$val1 = $dst1, $val2 = $dst2", 
+let Constraints = "$val1 = $dst1, $val2 = $dst2",
                   Defs = [EFLAGS, EAX, EBX, ECX, EDX],
                   Uses = [EAX, EBX, ECX, EDX],
                   mayLoad = 1, mayStore = 1,
@@ -486,7 +486,7 @@
 
 // Memory barriers
 
-// TODO: Get this to fold the constant into the instruction.           
+// TODO: Get this to fold the constant into the instruction.
 def OR32mrLocked  : I<0x09, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$zero),
                       "lock\n\t"
                       "or{l}\t{$zero, $dst|$dst, $zero}",
@@ -497,7 +497,7 @@
                      "#MEMBARRIER",
                      [(X86MemBarrier)]>, Requires<[HasSSE2]>;
 
-// TODO: Get this to fold the constant into the instruction.           
+// TODO: Get this to fold the constant into the instruction.
 let hasSideEffects = 1, Defs = [ESP] in
 def Int_MemBarrierNoSSE64  : RI<0x09, MRM1r, (outs), (ins GR64:$zero),
                            "lock\n\t"
@@ -520,7 +520,7 @@
 def LOCK_ADD64mr : RI<0x01, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2),
                       "lock\n\t"
                       "add{q}\t{$src2, $dst|$dst, $src2}", []>, LOCK;
-                      
+
 def LOCK_ADD8mi   : Ii8<0x80, MRM0m, (outs), (ins i8mem :$dst, i8imm :$src2),
                     "lock\n\t"
                     "add{b}\t{$src2, $dst|$dst, $src2}", []>, LOCK;
@@ -552,21 +552,21 @@
 def LOCK_SUB16mr  : I<0x29, MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src2),
                     "lock\n\t"
                     "sub{w}\t{$src2, $dst|$dst, $src2}", []>, OpSize, LOCK;
-def LOCK_SUB32mr  : I<0x29, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src2), 
+def LOCK_SUB32mr  : I<0x29, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src2),
                     "lock\n\t"
                     "sub{l}\t{$src2, $dst|$dst, $src2}", []>, LOCK;
-def LOCK_SUB64mr : RI<0x29, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2), 
+def LOCK_SUB64mr : RI<0x29, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2),
                       "lock\n\t"
                       "sub{q}\t{$src2, $dst|$dst, $src2}", []>, LOCK;
 
 
-def LOCK_SUB8mi   : Ii8<0x80, MRM5m, (outs), (ins i8mem :$dst, i8imm:$src2), 
+def LOCK_SUB8mi   : Ii8<0x80, MRM5m, (outs), (ins i8mem :$dst, i8imm:$src2),
                     "lock\n\t"
                     "sub{b}\t{$src2, $dst|$dst, $src2}", []>, LOCK;
-def LOCK_SUB16mi  : Ii16<0x81, MRM5m, (outs), (ins i16mem:$dst, i16imm:$src2), 
+def LOCK_SUB16mi  : Ii16<0x81, MRM5m, (outs), (ins i16mem:$dst, i16imm:$src2),
                     "lock\n\t"
                     "sub{w}\t{$src2, $dst|$dst, $src2}", []>, OpSize, LOCK;
-def LOCK_SUB32mi  : Ii32<0x81, MRM5m, (outs), (ins i32mem:$dst, i32imm:$src2), 
+def LOCK_SUB32mi  : Ii32<0x81, MRM5m, (outs), (ins i32mem:$dst, i32imm:$src2),
                     "lock\n\t"
                      "sub{l}\t{$src2, $dst|$dst, $src2}", []>, LOCK;
 def LOCK_SUB64mi32 : RIi32<0x81, MRM5m, (outs),
@@ -582,7 +582,7 @@
                     "lock\n\t"
                      "sub{l}\t{$src2, $dst|$dst, $src2}", []>, LOCK;
 def LOCK_SUB64mi8 : RIi8<0x83, MRM5m, (outs),
-                                      (ins i64mem:$dst, i64i8imm :$src2), 
+                                      (ins i64mem:$dst, i64i8imm :$src2),
                       "lock\n\t"
                       "sub{q}\t{$src2, $dst|$dst, $src2}", []>, LOCK;
 
@@ -838,7 +838,7 @@
 	  Requires<[In32BitMode]>;
 
 // FIXME: This is disabled for 32-bit PIC mode because the global base
-// register which is part of the address mode may be assigned a 
+// register which is part of the address mode may be assigned a
 // callee-saved register.
 def : Pat<(X86tcret (load addr:$dst), imm:$off),
           (TCRETURNmi addr:$dst, imm:$off)>,
@@ -961,8 +961,8 @@
 def : Pat<(zextloadi64i1 addr:$src), (MOVZX64rm8 addr:$src)>;
 
 // extload bool -> extload byte
-// When extloading from 16-bit and smaller memory locations into 64-bit 
-// registers, use zero-extending loads so that the entire 64-bit register is 
+// When extloading from 16-bit and smaller memory locations into 64-bit
+// registers, use zero-extending loads so that the entire 64-bit register is
 // defined, avoiding partial-register updates.
 
 def : Pat<(extloadi8i1 addr:$src),   (MOV8rm      addr:$src)>;
@@ -1142,13 +1142,13 @@
           (MOVZX32rr16 (EXTRACT_SUBREG GR32:$src1, sub_16bit))>;
 // r & (2^8-1) ==> movz
 def : Pat<(and GR32:$src1, 0xff),
-          (MOVZX32rr8 (EXTRACT_SUBREG (i32 (COPY_TO_REGCLASS GR32:$src1, 
+          (MOVZX32rr8 (EXTRACT_SUBREG (i32 (COPY_TO_REGCLASS GR32:$src1,
                                                              GR32_ABCD)),
                                       sub_8bit))>,
       Requires<[In32BitMode]>;
 // r & (2^8-1) ==> movz
 def : Pat<(and GR16:$src1, 0xff),
-          (MOVZX16rr8 (EXTRACT_SUBREG (i16 (COPY_TO_REGCLASS GR16:$src1, 
+          (MOVZX16rr8 (EXTRACT_SUBREG (i16 (COPY_TO_REGCLASS GR16:$src1,
                                                              GR16_ABCD)),
                                       sub_8bit))>,
       Requires<[In32BitMode]>;
@@ -1176,12 +1176,12 @@
 def : Pat<(sext_inreg GR32:$src, i16),
           (MOVSX32rr16 (EXTRACT_SUBREG GR32:$src, sub_16bit))>;
 def : Pat<(sext_inreg GR32:$src, i8),
-          (MOVSX32rr8 (EXTRACT_SUBREG (i32 (COPY_TO_REGCLASS GR32:$src, 
+          (MOVSX32rr8 (EXTRACT_SUBREG (i32 (COPY_TO_REGCLASS GR32:$src,
                                                              GR32_ABCD)),
                                       sub_8bit))>,
       Requires<[In32BitMode]>;
 def : Pat<(sext_inreg GR16:$src, i8),
-          (MOVSX16rr8 (EXTRACT_SUBREG (i16 (COPY_TO_REGCLASS GR16:$src, 
+          (MOVSX16rr8 (EXTRACT_SUBREG (i16 (COPY_TO_REGCLASS GR16:$src,
                                                              GR16_ABCD)),
                                       sub_8bit))>,
       Requires<[In32BitMode]>;
@@ -1241,26 +1241,26 @@
             sub_16bit)>,
       Requires<[In32BitMode]>;
 def : Pat<(i32 (zext (srl_su GR16:$src, (i8 8)))),
-          (MOVZX32rr8 (EXTRACT_SUBREG (i16 (COPY_TO_REGCLASS GR16:$src, 
+          (MOVZX32rr8 (EXTRACT_SUBREG (i16 (COPY_TO_REGCLASS GR16:$src,
                                                              GR16_ABCD)),
                                       sub_8bit_hi))>,
       Requires<[In32BitMode]>;
 def : Pat<(i32 (anyext (srl_su GR16:$src, (i8 8)))),
-          (MOVZX32rr8 (EXTRACT_SUBREG (i16 (COPY_TO_REGCLASS GR16:$src, 
+          (MOVZX32rr8 (EXTRACT_SUBREG (i16 (COPY_TO_REGCLASS GR16:$src,
                                                              GR16_ABCD)),
                                       sub_8bit_hi))>,
       Requires<[In32BitMode]>;
 def : Pat<(and (srl_su GR32:$src, (i8 8)), (i32 255)),
-          (MOVZX32rr8 (EXTRACT_SUBREG (i32 (COPY_TO_REGCLASS GR32:$src, 
+          (MOVZX32rr8 (EXTRACT_SUBREG (i32 (COPY_TO_REGCLASS GR32:$src,
                                                              GR32_ABCD)),
                                       sub_8bit_hi))>,
       Requires<[In32BitMode]>;
 def : Pat<(srl (and_su GR32:$src, 0xff00), (i8 8)),
-          (MOVZX32rr8 (EXTRACT_SUBREG (i32 (COPY_TO_REGCLASS GR32:$src, 
+          (MOVZX32rr8 (EXTRACT_SUBREG (i32 (COPY_TO_REGCLASS GR32:$src,
                                                              GR32_ABCD)),
                                       sub_8bit_hi))>,
       Requires<[In32BitMode]>;
-      
+
 // h-register tricks.
 // For now, be conservative on x86-64 and use an h-register extract only if the
 // value is immediately zero-extended or stored, which are somewhat common
@@ -1282,7 +1282,7 @@
                             sub_8bit_hi))>,
       Requires<[In64BitMode]>;
 def : Pat<(srl (and_su GR32:$src, 0xff00), (i8 8)),
-          (MOVZX32_NOREXrr8 (EXTRACT_SUBREG (i32 (COPY_TO_REGCLASS GR32:$src, 
+          (MOVZX32_NOREXrr8 (EXTRACT_SUBREG (i32 (COPY_TO_REGCLASS GR32:$src,
                                                                    GR32_ABCD)),
                                              sub_8bit_hi))>,
       Requires<[In64BitMode]>;
@@ -1336,8 +1336,8 @@
             (EXTRACT_SUBREG (i16 (COPY_TO_REGCLASS GR16:$src, GR16_ABCD)),
                             sub_8bit_hi))>,
       Requires<[In64BitMode]>;
-      
-      
+
+
 // (shl x, 1) ==> (add x, x)
 def : Pat<(shl GR8 :$src1, (i8 1)), (ADD8rr  GR8 :$src1, GR8 :$src1)>;
 def : Pat<(shl GR16:$src1, (i8 1)), (ADD16rr GR16:$src1, GR16:$src1)>;

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=116972&r1=116971&r2=116972&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Wed Oct 20 18:40:27 2010
@@ -1,10 +1,10 @@
 //===- X86InstrInfo.td - Main X86 Instruction Definition ---*- tablegen -*-===//
-// 
+//
 //                     The LLVM Compiler Infrastructure
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
-// 
+//
 //===----------------------------------------------------------------------===//
 //
 // This file describes the X86 instruction set, defining the instructions, and
@@ -46,7 +46,7 @@
                                   [SDTCisInt<0>,
                                    SDTCisVT<1, i8>, SDTCisVT<2, i32>]>;
 
-def SDTX86cas : SDTypeProfile<0, 3, [SDTCisPtrTy<0>, SDTCisInt<1>, 
+def SDTX86cas : SDTypeProfile<0, 3, [SDTCisPtrTy<0>, SDTCisInt<1>,
                                      SDTCisVT<2, i8>]>;
 def SDTX86cas8 : SDTypeProfile<0, 1, [SDTCisPtrTy<0>]>;
 
@@ -120,25 +120,25 @@
                         [SDNPHasChain, SDNPInFlag, SDNPOutFlag, SDNPMayStore,
                          SDNPMayLoad, SDNPMemOperand]>;
 def X86AtomAdd64 : SDNode<"X86ISD::ATOMADD64_DAG", SDTX86atomicBinary,
-                        [SDNPHasChain, SDNPMayStore, 
+                        [SDNPHasChain, SDNPMayStore,
                          SDNPMayLoad, SDNPMemOperand]>;
 def X86AtomSub64 : SDNode<"X86ISD::ATOMSUB64_DAG", SDTX86atomicBinary,
-                        [SDNPHasChain, SDNPMayStore, 
+                        [SDNPHasChain, SDNPMayStore,
                          SDNPMayLoad, SDNPMemOperand]>;
 def X86AtomOr64 : SDNode<"X86ISD::ATOMOR64_DAG", SDTX86atomicBinary,
-                        [SDNPHasChain, SDNPMayStore, 
+                        [SDNPHasChain, SDNPMayStore,
                          SDNPMayLoad, SDNPMemOperand]>;
 def X86AtomXor64 : SDNode<"X86ISD::ATOMXOR64_DAG", SDTX86atomicBinary,
-                        [SDNPHasChain, SDNPMayStore, 
+                        [SDNPHasChain, SDNPMayStore,
                          SDNPMayLoad, SDNPMemOperand]>;
 def X86AtomAnd64 : SDNode<"X86ISD::ATOMAND64_DAG", SDTX86atomicBinary,
-                        [SDNPHasChain, SDNPMayStore, 
+                        [SDNPHasChain, SDNPMayStore,
                          SDNPMayLoad, SDNPMemOperand]>;
 def X86AtomNand64 : SDNode<"X86ISD::ATOMNAND64_DAG", SDTX86atomicBinary,
-                        [SDNPHasChain, SDNPMayStore, 
+                        [SDNPHasChain, SDNPMayStore,
                          SDNPMayLoad, SDNPMemOperand]>;
 def X86AtomSwap64 : SDNode<"X86ISD::ATOMSWAP64_DAG", SDTX86atomicBinary,
-                        [SDNPHasChain, SDNPMayStore, 
+                        [SDNPHasChain, SDNPMayStore,
                          SDNPMayLoad, SDNPMemOperand]>;
 def X86retflag : SDNode<"X86ISD::RET_FLAG", SDTX86Ret,
                         [SDNPHasChain, SDNPOptInFlag, SDNPVariadic]>;
@@ -156,7 +156,7 @@
                         [SDNPHasChain, SDNPOutFlag]>;
 def X86callseq_end :
                  SDNode<"ISD::CALLSEQ_END",   SDT_X86CallSeqEnd,
-                        [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>;       
+                        [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>;
 
 def X86call    : SDNode<"X86ISD::CALL",     SDT_X86Call,
                         [SDNPHasChain, SDNPOutFlag, SDNPOptInFlag,
@@ -180,7 +180,7 @@
 def X86ehret : SDNode<"X86ISD::EH_RETURN", SDT_X86EHRET,
                         [SDNPHasChain]>;
 
-def X86tcret : SDNode<"X86ISD::TC_RETURN", SDT_X86TCRET, 
+def X86tcret : SDNode<"X86ISD::TC_RETURN", SDT_X86TCRET,
                         [SDNPHasChain,  SDNPOptInFlag, SDNPVariadic]>;
 
 def X86add_flag  : SDNode<"X86ISD::ADD",  SDTBinaryArithWithFlags,
@@ -190,7 +190,7 @@
                           [SDNPCommutative]>;
 def X86umul_flag : SDNode<"X86ISD::UMUL", SDTUnaryArithWithFlags,
                           [SDNPCommutative]>;
-                          
+
 def X86inc_flag  : SDNode<"X86ISD::INC",  SDTUnaryArithWithFlags>;
 def X86dec_flag  : SDNode<"X86ISD::DEC",  SDTUnaryArithWithFlags>;
 def X86or_flag   : SDNode<"X86ISD::OR",   SDTBinaryArithWithFlags,
@@ -616,13 +616,13 @@
 def PUSH32rmr: I<0xFF, MRM6r, (outs), (ins GR32:$reg), "push{l}\t$reg",[]>;
 def PUSH32rmm: I<0xFF, MRM6m, (outs), (ins i32mem:$src), "push{l}\t$src",[]>;
 
-def PUSHi8   : Ii8<0x6a, RawFrm, (outs), (ins i32i8imm:$imm), 
+def PUSHi8   : Ii8<0x6a, RawFrm, (outs), (ins i32i8imm:$imm),
                       "push{l}\t$imm", []>;
-def PUSHi16  : Ii16<0x68, RawFrm, (outs), (ins i16imm:$imm), 
+def PUSHi16  : Ii16<0x68, RawFrm, (outs), (ins i16imm:$imm),
                       "push{w}\t$imm", []>, OpSize;
-def PUSHi32  : Ii32<0x68, RawFrm, (outs), (ins i32imm:$imm), 
+def PUSHi32  : Ii32<0x68, RawFrm, (outs), (ins i32imm:$imm),
                       "push{l}\t$imm", []>;
-                      
+
 def PUSHF16  : I<0x9C, RawFrm, (outs), (ins), "pushf{w}", []>, OpSize;
 def PUSHF32  : I<0x9C, RawFrm, (outs), (ins), "pushf{l|d}", []>,
                Requires<[In32BitMode]>;
@@ -646,9 +646,9 @@
 }
 
 let Defs = [RSP], Uses = [RSP], neverHasSideEffects = 1, mayStore = 1 in {
-def PUSH64i8   : Ii8<0x6a, RawFrm, (outs), (ins i8imm:$imm), 
+def PUSH64i8   : Ii8<0x6a, RawFrm, (outs), (ins i8imm:$imm),
                      "push{q}\t$imm", []>;
-def PUSH64i16  : Ii16<0x68, RawFrm, (outs), (ins i16imm:$imm), 
+def PUSH64i16  : Ii16<0x68, RawFrm, (outs), (ins i16imm:$imm),
                       "push{q}\t$imm", []>;
 def PUSH64i32  : Ii32<0x68, RawFrm, (outs), (ins i64i32imm:$imm),
                       "push{q}\t$imm", []>;
@@ -677,11 +677,11 @@
 let Constraints = "$src = $dst" in {    // GR32 = bswap GR32
 def BSWAP32r : I<0xC8, AddRegFrm,
                  (outs GR32:$dst), (ins GR32:$src),
-                 "bswap{l}\t$dst", 
+                 "bswap{l}\t$dst",
                  [(set GR32:$dst, (bswap GR32:$src))]>, TB;
-                   
+
 def BSWAP64r : RI<0xC8, AddRegFrm, (outs GR64:$dst), (ins GR64:$src),
-                  "bswap{q}\t$dst", 
+                  "bswap{q}\t$dst",
                   [(set GR64:$dst, (bswap GR64:$src))]>, TB;
 } // Constraints = "$src = $dst"
 
@@ -823,7 +823,7 @@
 def MOV32ao32 : Ii32 <0xA3, RawFrm, (outs offset32:$dst), (ins),
                       "mov{l}\t{%eax, $dst|$dst, %eax}", []>,
                      Requires<[In32BitMode]>;
-                      
+
 // FIXME: These definitions are utterly broken
 // Just leave them commented out for now because they're useless outside
 // of the large code model, and most compilers won't generate the instructions
@@ -926,13 +926,13 @@
 // only for now.
 
 def BT16mr : I<0xA3, MRMDestMem, (outs), (ins i16mem:$src1, GR16:$src2),
-               "bt{w}\t{$src2, $src1|$src1, $src2}", 
+               "bt{w}\t{$src2, $src1|$src1, $src2}",
 //               [(X86bt (loadi16 addr:$src1), GR16:$src2),
 //                (implicit EFLAGS)]
                []
                >, OpSize, TB, Requires<[FastBTMem]>;
 def BT32mr : I<0xA3, MRMDestMem, (outs), (ins i32mem:$src1, GR32:$src2),
-               "bt{l}\t{$src2, $src1|$src1, $src2}", 
+               "bt{l}\t{$src2, $src1|$src1, $src2}",
 //               [(X86bt (loadi32 addr:$src1), GR32:$src2),
 //                (implicit EFLAGS)]
                []
@@ -1058,20 +1058,20 @@
 // operand is referenced, the atomicity is ensured.
 let Constraints = "$val = $dst" in {
 def XCHG8rm  : I<0x86, MRMSrcMem, (outs GR8:$dst), (ins GR8:$val, i8mem:$ptr),
-               "xchg{b}\t{$val, $ptr|$ptr, $val}", 
+               "xchg{b}\t{$val, $ptr|$ptr, $val}",
                [(set GR8:$dst, (atomic_swap_8 addr:$ptr, GR8:$val))]>;
-def XCHG16rm : I<0x87, MRMSrcMem, (outs GR16:$dst), 
+def XCHG16rm : I<0x87, MRMSrcMem, (outs GR16:$dst),
                  (ins GR16:$val, i16mem:$ptr),
-               "xchg{w}\t{$val, $ptr|$ptr, $val}", 
-               [(set GR16:$dst, (atomic_swap_16 addr:$ptr, GR16:$val))]>, 
+               "xchg{w}\t{$val, $ptr|$ptr, $val}",
+               [(set GR16:$dst, (atomic_swap_16 addr:$ptr, GR16:$val))]>,
                 OpSize;
-def XCHG32rm : I<0x87, MRMSrcMem, (outs GR32:$dst), 
+def XCHG32rm : I<0x87, MRMSrcMem, (outs GR32:$dst),
                  (ins GR32:$val, i32mem:$ptr),
-               "xchg{l}\t{$val, $ptr|$ptr, $val}", 
+               "xchg{l}\t{$val, $ptr|$ptr, $val}",
                [(set GR32:$dst, (atomic_swap_32 addr:$ptr, GR32:$val))]>;
-def XCHG64rm : RI<0x87, MRMSrcMem, (outs GR64:$dst), 
+def XCHG64rm : RI<0x87, MRMSrcMem, (outs GR64:$dst),
                   (ins GR64:$val,i64mem:$ptr),
-                  "xchg{q}\t{$val, $ptr|$ptr, $val}", 
+                  "xchg{q}\t{$val, $ptr|$ptr, $val}",
                   [(set GR64:$dst, (atomic_swap_64 addr:$ptr, GR64:$val))]>;
 
 def XCHG8rr : I<0x86, MRMSrcReg, (outs GR8:$dst), (ins GR8:$val, GR8:$src),
@@ -1196,7 +1196,7 @@
 def AAM8i8 : Ii8<0xD4, RawFrm, (outs), (ins i8imm:$src),
                  "aam\t$src", []>, Requires<[In32BitMode]>;
 
-// ASCII Adjust AL After Subtraction - sets 
+// ASCII Adjust AL After Subtraction - sets
 // sets AL, AH and CF and AF of EFLAGS and uses AL and AF of EFLAGS
 def AAS : I<0x3F, RawFrm, (outs), (ins), "aas", []>, Requires<[In32BitMode]>;
 
@@ -1211,16 +1211,16 @@
 // Check Array Index Against Bounds
 def BOUNDS16rm : I<0x62, MRMSrcMem, (outs GR16:$dst), (ins i16mem:$src),
                    "bound\t{$src, $dst|$dst, $src}", []>, OpSize,
-                   Requires<[In32BitMode]>; 
+                   Requires<[In32BitMode]>;
 def BOUNDS32rm : I<0x62, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src),
                    "bound\t{$src, $dst|$dst, $src}", []>,
-                   Requires<[In32BitMode]>; 
+                   Requires<[In32BitMode]>;
 
 // Adjust RPL Field of Segment Selector
 def ARPL16rr : I<0x63, MRMDestReg, (outs GR16:$src), (ins GR16:$dst),
-                 "arpl\t{$src, $dst|$dst, $src}", []>, Requires<[In32BitMode]>; 
+                 "arpl\t{$src, $dst|$dst, $src}", []>, Requires<[In32BitMode]>;
 def ARPL16mr : I<0x63, MRMSrcMem, (outs GR16:$src), (ins i16mem:$dst),
-                 "arpl\t{$src, $dst|$dst, $src}", []>, Requires<[In32BitMode]>; 
+                 "arpl\t{$src, $dst|$dst, $src}", []>, Requires<[In32BitMode]>;
 
 //===----------------------------------------------------------------------===//
 // Subsystems.



From echristo at apple.com  Wed Oct 20 19:01:47 2010
From: echristo at apple.com (Eric Christopher)
Date: Thu, 21 Oct 2010 00:01:47 -0000
Subject: [llvm-commits] [llvm] r116977 -
	/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp
Message-ID: <20101021000147.697522A6C12C@llvm.org>

Author: echristo
Date: Wed Oct 20 19:01:47 2010
New Revision: 116977

URL: http://llvm.org/viewvc/llvm-project?rev=116977&view=rev
Log:
Custom lower f64 args passed in integer registers.

Modified:
    llvm/trunk/lib/Target/ARM/ARMFastISel.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=116977&r1=116976&r2=116977&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Wed Oct 20 19:01:47 2010
@@ -1356,6 +1356,21 @@
               VA.getLocReg())
       .addReg(Arg);
       RegArgs.push_back(VA.getLocReg());
+    } else if (VA.needsCustom()) {
+      // TODO: We need custom lowering for vector (v2f64) args.
+      if (VA.getLocVT() != MVT::f64) return false;
+      
+      CCValAssign &NextVA = ArgLocs[++i];
+
+      // TODO: Only handle register args for now.
+      if(!(VA.isRegLoc() && NextVA.isRegLoc())) return false;
+
+      AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
+                              TII.get(ARM::VMOVRRD), VA.getLocReg())
+                      .addReg(NextVA.getLocReg(), RegState::Define)
+                      .addReg(Arg));
+      RegArgs.push_back(VA.getLocReg());
+      RegArgs.push_back(NextVA.getLocReg());
     } else {
       // Need to store
       return false;



From bigcheesegs at gmail.com  Wed Oct 20 19:08:21 2010
From: bigcheesegs at gmail.com (Michael J. Spencer)
Date: Thu, 21 Oct 2010 00:08:21 -0000
Subject: [llvm-commits] [llvm] r116978 - in /llvm/trunk:
 include/llvm/CodeGen/MachineModuleInfo.h lib/CodeGen/MachineModuleInfo.cpp
 lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
 lib/Target/X86/X86AsmPrinter.cpp
Message-ID: <20101021000822.017122A6C12C@llvm.org>

Author: mspencer
Date: Wed Oct 20 19:08:21 2010
New Revision: 116978

URL: http://llvm.org/viewvc/llvm-project?rev=116978&view=rev
Log:
CodeGen-Windows: Only emit _fltused if a VarArg function is called with floating point args.
This should be the minimum set of functions that could possibly need it.

Modified:
    llvm/trunk/include/llvm/CodeGen/MachineModuleInfo.h
    llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp

Modified: llvm/trunk/include/llvm/CodeGen/MachineModuleInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineModuleInfo.h?rev=116978&r1=116977&r2=116978&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineModuleInfo.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineModuleInfo.h Wed Oct 20 19:08:21 2010
@@ -157,10 +157,9 @@
   /// in this module.
   bool DbgInfoAvailable;
 
-  /// True if this module calls an external function with floating point
-  /// arguments. This is used to emit an undefined reference to fltused on
-  /// Windows targets.
-  bool CallsExternalFunctionWithFloatingPointArguments;
+  /// True if this module calls VarArg function with floating point arguments.
+  /// This is used to emit an undefined reference to fltused on Windows targets.
+  bool CallsExternalVAFunctionWithFloatingPointArguments;
 
 public:
   static char ID; // Pass identification, replacement for typeid
@@ -217,12 +216,12 @@
   bool callsUnwindInit() const { return CallsUnwindInit; }
   void setCallsUnwindInit(bool b) { CallsUnwindInit = b; }
 
-  bool callsExternalFunctionWithFloatingPointArguments() const {
-    return CallsExternalFunctionWithFloatingPointArguments;
+  bool callsExternalVAFunctionWithFloatingPointArguments() const {
+    return CallsExternalVAFunctionWithFloatingPointArguments;
   }
 
-  void setCallsExternalFunctionWithFloatingPointArguments(bool b) {
-    CallsExternalFunctionWithFloatingPointArguments = b;
+  void setCallsExternalVAFunctionWithFloatingPointArguments(bool b) {
+    CallsExternalVAFunctionWithFloatingPointArguments = b;
   }
 
   /// getFrameMoves - Returns a reference to a list of moves done in the current

Modified: llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp?rev=116978&r1=116977&r2=116978&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp Wed Oct 20 19:08:21 2010
@@ -257,7 +257,7 @@
 : ImmutablePass(ID), Context(MAI),
   ObjFileMMI(0),
   CurCallSite(0), CallsEHReturn(0), CallsUnwindInit(0), DbgInfoAvailable(false),
-  CallsExternalFunctionWithFloatingPointArguments(false) {
+  CallsExternalVAFunctionWithFloatingPointArguments(false) {
   initializeMachineModuleInfoPass(*PassRegistry::getPassRegistry());
   // Always emit some info, by default "no personality" info.
   Personalities.push_back(NULL);

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=116978&r1=116977&r2=116978&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Wed Oct 20 19:08:21 2010
@@ -5030,16 +5030,16 @@
     // See if any floating point values are being passed to this external
     // function. This is used to emit an undefined reference to fltused on
     // Windows.
-    if (!F->hasLocalLinkage() && F->hasName()) {
-      MachineModuleInfo &MMI = DAG.getMachineFunction().getMMI();
-      for (unsigned i = 0, e = I.getNumArgOperands(); i != e &&
-                  !MMI.callsExternalFunctionWithFloatingPointArguments(); ++i) {
+    MachineModuleInfo &MMI = DAG.getMachineFunction().getMMI();
+    if (F->isVarArg() &&
+        !MMI.callsExternalVAFunctionWithFloatingPointArguments()) {
+      for (unsigned i = 0, e = I.getNumArgOperands(); i != e; ++i) {
         const Type* T = I.getArgOperand(i)->getType();
         for (po_iterator<const Type*> i = po_begin(T),
                                       e = po_end(T);
                                       i != e; ++i) {
           if (i->isFloatingPointTy()) {
-            MMI.setCallsExternalFunctionWithFloatingPointArguments(true);
+            MMI.setCallsExternalVAFunctionWithFloatingPointArguments(true);
             break;
           }
         }

Modified: llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp?rev=116978&r1=116977&r2=116978&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86AsmPrinter.cpp Wed Oct 20 19:08:21 2010
@@ -582,7 +582,7 @@
 
   if (Subtarget->isTargetWindows()
    && !Subtarget->isTargetCygMing()
-   && MMI->callsExternalFunctionWithFloatingPointArguments()) {
+   && MMI->callsExternalVAFunctionWithFloatingPointArguments()) {
     MCSymbol *S = MMI->getContext().GetOrCreateSymbol(StringRef("__fltused"));
     OutStreamer.EmitSymbolAttribute(S, MCSA_Global);
   }



From jasonwkim at google.com  Wed Oct 20 19:12:42 2010
From: jasonwkim at google.com (Jason Kim)
Date: Wed, 20 Oct 2010 17:12:42 -0700
Subject: [llvm-commits] Fwd: Proof of concept patch for unifying the .s/ELF
 emission of .ARM.attributes
In-Reply-To: <AANLkTinFCYO-f67sKptJ0fb6FK=c_zAbX6CMi55W1v+X@mail.gmail.com>
References: <AANLkTikSjtvxSNc0oxKEoG2LdGriz10OXOTAtC4caR_+@mail.gmail.com>
	<AANLkTikaS4qjUi+5q3YWt_GF5EdWKVNwxq7=-LyWRRpv@mail.gmail.com>
	<AANLkTinH7mZtZSQKDYMOE9C8-0baHwm31crmp30roWKy@mail.gmail.com>
	<AANLkTimhWm3dCbO003ipXkaDS3f0o948b9b2NquVSe29@mail.gmail.com>
	<AANLkTi=2B7Pk9HkkxYvQBvm-AfJsYCHW8uYxURq5iEcd@mail.gmail.com>
	<AANLkTi=iVAmVx08ww0EOu9DvJ82oxWD+02Es3btVSqK2@mail.gmail.com>
	<AANLkTin5KdNX6g+ZRYJS0nNy6=bu4o4gwa6v5-XNwkW9@mail.gmail.com>
	<AANLkTikAPuZKYLf4iisi=C4v2onfz5qCXQ-mo2s62UNq@mail.gmail.com>
	<6D9C9A6C-872A-494D-A5F6-2523DD4CA5B6@apple.com>
	<AANLkTi=4=8T0ww0csECny4t0RMSrJV=nUT77h+759-Ab@mail.gmail.com>
	<8FD08C3F-E6E1-448B-A384-7E5CF0763EC1@apple.com>
	<AANLkTikH8sEANQrDGVHg1uOtfCs2UzygkUPpm91E9kZc@mail.gmail.com>
	<AANLkTimoHYSw=viMcpZLirRqd789_xjWmT4+foao_T6f@mail.gmail.com>
	<8E5A9C6C-BA61-41F8-B445-336D9F96D774@apple.com>
	<AANLkTiksC9MbzDhYrzLs9Kt5YRGuHu2nv3Jri=-xRKb9@mail.gmail.com>
	<AANLkTi=73V-VRH_HGiPwcQjBNcFZMiU+jazHMH3YdJ-V@mail.gmail.com>
	<AANLkTikGWx7GH5VZUByposdJWhhvc+qR6X-1Ve_gNmKG@mail.gmail.com>
	<AANLkTik7AYHB1_Crv6Vcf4uMyx4U_x5mJaYK+-S3=ucU@mail.gmail.com>
	<AANLkTi=e_fCXZo_H1=_47tv5BABbpHkf8qJiyrMfRFj_@mail.gmail.com>
	<AANLkTi=MArF+PJK1iwc66wZNobOTjC6pi127Kt=A64bp@mail.gmail.com>
	<AANLkTimHKpEKfy2mr_UKco+Uscg_YBDtCmvXhT4AhAnp@mail.gmail.com>
	<AANLkTimt3NyHcqEh38hn+FnUNL_O5Qv81OYjzE7d0Qf1@mail.gmail.com>
	<AANLkTin8ykW=j=arKX3wC-CX2adx0sTtUmYMJr7qYqJY@mail.gmail.com>
	<AANLkTikXC0jb1VQ--c7iAgX6=DvpTHD_prwSF9F2Tjm4@mail.gmail.com>
	<AANLkTi=SBh85q-m-SvA4nNj9DfdUDXgYmxs6u9Zc4w7s@mail.gmail.com>
	<AANLkTinVf83nF2RUWsmRzT1tL=5MMVJdoGHm8h1D6mG6@mail.gmail.com>
	<AANLkTikHY6Sej-knz3b5+EUjMWVuoPOkWrmFHKHBWtam@mail.gmail.com>
	<AANLkTinFCYO-f67sKptJ0fb6FK=c_zAbX6CMi55W1v+X@mail.gmail.com>
Message-ID: <AANLkTimxqNQwKoVTEd6J8LrD4mm8_8=ZVeafrHLUsZjb@mail.gmail.com>

On Wed, Oct 20, 2010 at 2:56 PM, Rafael Esp?ndola
<rafael.espindola at gmail.com> wrote:
>> Gosh, this is taking a while :-)
>> Is there anything else I missed?
>
> Another one I noticed. Instead of
>
> ? ? ?SmallString<32> *FC = &currFileFragment.getContents();
> ? ? ?(*FC) += static_cast<char>(attr);
> ? ? ?(*FC) += static_cast<char>(0xFF & v);
>
> You can do
>
> ? ? OutStreamer.EmitIntValue(static_cast<char>(attr), 1);
> ? ? OutStreamer.EmitIntValue(0xFF & v, 1);
>
> No? Using the streamer interface looks a lot more in line with what
> the rest of the code does.

Hmm, I wish we had this discussion way earlier..

How would I emit things in different subsections? I can do a high
level switch to .ARM.attributes, and if I were emitting one blob from
begin to end, using the higher level interface would be preferable,
but it contains additional subsections - which are naturally
represented by MCDataFragments - Is there an MC equivalent of a
SubSection (which is-a Section so I can switch back and forth?)
Currently we only have stuff that go into the File subsection only,
but.. for futureproofing?

I pretty much duplicated style from MCELFObjectWriter.cpp, which does
muck with MCDataFragments -
(in function WriteRelocation() around line 910 of
MCELFObjectWriter.cpp ) ?I could not find an easier solution.
The code currently closely tracks the layout required in the section,
and its very simple, which itself was a win.

-jason

>
>> Thanks!
>>
>> -jason
>>
>
> Cheers,
> Rafael
>


From wendling at apple.com  Wed Oct 20 19:35:21 2010
From: wendling at apple.com (Bill Wendling)
Date: Wed, 20 Oct 2010 17:35:21 -0700
Subject: [llvm-commits] [llvm] r116909 - in /llvm/trunk/lib/System:
	RWMutex.cpp Win32/ThreadLocal.inc
In-Reply-To: <4CBE9218.9080500@free.fr>
References: <20101020040529.3C4EE2A6C12C@llvm.org> <4CBE9218.9080500@free.fr>
Message-ID: <7296BBA6-0922-42BA-8F77-4051473985A9@apple.com>

On Oct 19, 2010, at 11:54 PM, Duncan Sands wrote:

>>      // Initialize the rwlock
>> -    int errorcode = pthread_rwlock_init(rwlock, NULL);
>> -    (void)errorcode;
>> +    int ATTRIBUTE_UNUSED errorcode = pthread_rwlock_init(rwlock, NULL);
>>      assert(errorcode == 0);
> 
> when building with assertions on, errorcode is used, so mightn't this result
> in a warning? [*] I don't see what was wrong with casting to void: that's used
> all over the place in LLVM already, not to mention in lots of other projects.
> 
When I created that macro, I tested it out with that situation on GCC. It didn't produce a warning. Can you come up with a situation and compiler where it does?

-bw

-------------- next part --------------
An HTML attachment was scrubbed...
URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101020/fe43f88d/attachment.html 

From wendling at apple.com  Wed Oct 20 19:38:18 2010
From: wendling at apple.com (Bill Wendling)
Date: Wed, 20 Oct 2010 17:38:18 -0700
Subject: [llvm-commits] [llvm] r116920 -
	/llvm/trunk/include/llvm/Support/Compiler.h
In-Reply-To: <20101020084427.BD15C2A6C12C@llvm.org>
References: <20101020084427.BD15C2A6C12C@llvm.org>
Message-ID: <E353D16B-5741-4ACC-B5D6-B76DF95CEA02@apple.com>

On Oct 20, 2010, at 1:44 AM, Chandler Carruth wrote:

> Author: chandlerc
> Date: Wed Oct 20 03:44:27 2010
> New Revision: 116920
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=116920&view=rev
> Log:
> Add a comment about ATTRIBUTE_UNUSED to avoid further confusion over when to
> use it.
> 
There's no reason not to use this for variables. And it avoids the void-casting hack.

-bw

> Modified:
>    llvm/trunk/include/llvm/Support/Compiler.h
> 
> Modified: llvm/trunk/include/llvm/Support/Compiler.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/Compiler.h?rev=116920&r1=116919&r2=116920&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/Support/Compiler.h (original)
> +++ llvm/trunk/include/llvm/Support/Compiler.h Wed Oct 20 03:44:27 2010
> @@ -31,6 +31,14 @@
> #define ATTRIBUTE_USED
> #endif
> 
> +// Some compilers warn about unused functions. When a function is sometimes
> +// used or not depending on build settings (e.g. a function only called from
> +// within "assert"), this attribute can be used to suppress such warnings.
> +//
> +// However, it shouldn't be used for unused *variables*, as those have a much
> +// more portable solution:
> +//   (void)unused_var_name;
> +// Prefer cast-to-void wherever it is sufficient.
> #if (__GNUC__ >= 4 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 1))
> #define ATTRIBUTE_UNUSED __attribute__((__unused__))
> #else
> 
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits

-------------- next part --------------
An HTML attachment was scrubbed...
URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101020/9cd04a66/attachment.html 

From resistor at mac.com  Wed Oct 20 19:48:00 2010
From: resistor at mac.com (Owen Anderson)
Date: Thu, 21 Oct 2010 00:48:00 -0000
Subject: [llvm-commits] [llvm] r116981 - in /llvm/trunk:
 lib/Target/ARM/ARMInstrNEON.td test/MC/ARM/neon-fp-encoding.ll
Message-ID: <20101021004801.0F3892A6C12C@llvm.org>

Author: resistor
Date: Wed Oct 20 19:48:00 2010
New Revision: 116981

URL: http://llvm.org/viewvc/llvm-project?rev=116981&view=rev
Log:
Implement correct encodings for NEON vadd, both integer and floating point.

Added:
    llvm/trunk/test/MC/ARM/neon-fp-encoding.ll
Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrNEON.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrNEON.td?rev=116981&r1=116980&r2=116981&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrNEON.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Wed Oct 20 19:48:00 2010
@@ -1177,9 +1177,21 @@
            InstrItinClass itin, string OpcodeStr, string Dt,
            ValueType ResTy, ValueType OpTy, SDNode OpNode, bit Commutable>
   : N3V<op24, op23, op21_20, op11_8, 0, op4,
-        (outs DPR:$dst), (ins DPR:$src1, DPR:$src2), N3RegFrm, itin,
-        OpcodeStr, Dt, "$dst, $src1, $src2", "",
-        [(set DPR:$dst, (ResTy (OpNode (OpTy DPR:$src1), (OpTy DPR:$src2))))]> {
+        (outs DPR:$Dd), (ins DPR:$Dn, DPR:$Dm), N3RegFrm, itin,
+        OpcodeStr, Dt, "$Dd, $Dn, $Dm", "",
+        [(set DPR:$Dd, (ResTy (OpNode (OpTy DPR:$Dn), (OpTy DPR:$Dm))))]> {
+  // Instruction operands.
+  bits<5> Dd;
+  bits<5> Dn;
+  bits<5> Dm;
+  
+  let Inst{15-12} = Dd{3-0};
+  let Inst{22}    = Dd{4};
+  let Inst{19-16} = Dn{3-0};
+  let Inst{7}     = Dn{4};
+  let Inst{3-0}   = Dm{3-0};
+  let Inst{5}     = Dm{4};
+  
   let isCommutable = Commutable;
 }
 // Same as N3VD but no data type.
@@ -1220,10 +1232,24 @@
            InstrItinClass itin, string OpcodeStr, string Dt,
            ValueType ResTy, ValueType OpTy, SDNode OpNode, bit Commutable>
   : N3V<op24, op23, op21_20, op11_8, 1, op4,
-        (outs QPR:$dst), (ins QPR:$src1, QPR:$src2), N3RegFrm, itin, 
-        OpcodeStr, Dt, "$dst, $src1, $src2", "",
-        [(set QPR:$dst, (ResTy (OpNode (OpTy QPR:$src1), (OpTy QPR:$src2))))]> {
+        (outs QPR:$Dd), (ins QPR:$Dn, QPR:$Dm), N3RegFrm, itin, 
+        OpcodeStr, Dt, "$Dd, $Dn, $Dm", "",
+        [(set QPR:$Dd, (ResTy (OpNode (OpTy QPR:$Dn), (OpTy QPR:$Dm))))]> {
   let isCommutable = Commutable;
+  
+  bits<4> Dd;
+  bits<4> Dn;
+  bits<4> Dm;
+  
+  let Inst{15-13} = Dd{2-0};
+  let Inst{22}    = Dd{3};
+  let Inst{12}    = 0;
+  let Inst{19-17} = Dn{2-0};
+  let Inst{7}     = Dn{3};
+  let Inst{16}    = 0;
+  let Inst{3-1}   = Dm{2-0};
+  let Inst{5}     = Dm{3};
+  let Inst{0}     = 0;
 }
 class N3VQX<bit op24, bit op23, bits<2> op21_20, bits<4> op11_8, bit op4,
            InstrItinClass itin, string OpcodeStr,

Added: llvm/trunk/test/MC/ARM/neon-fp-encoding.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/neon-fp-encoding.ll?rev=116981&view=auto
==============================================================================
--- llvm/trunk/test/MC/ARM/neon-fp-encoding.ll (added)
+++ llvm/trunk/test/MC/ARM/neon-fp-encoding.ll Wed Oct 20 19:48:00 2010
@@ -0,0 +1,56 @@
+; RUN: llc -show-mc-encoding -march=arm -mcpu=cortex-a8 -mattr=+neon < %s | FileCheck %s
+
+; CHECK: vadd_8xi8
+define <8 x i8> @vadd_8xi8(<8 x i8>* %A, <8 x i8>* %B) nounwind {                                                                          
+  %tmp1 = load <8 x i8>* %A
+  %tmp2 = load <8 x i8>* %B
+; CHECK: vadd.i8	d16, d17, d16           @ encoding: [0xa0,0x08,0x41,0xf2]
+  %tmp3 = add <8 x i8> %tmp1, %tmp2
+	ret <8 x i8> %tmp3
+}
+
+; CHECK: vadd_4xi16
+define <4 x i16> @vadd_4xi16(<4 x i16>* %A, <4 x i16>* %B) nounwind {                                                                          
+  %tmp1 = load <4 x i16>* %A
+  %tmp2 = load <4 x i16>* %B
+; CHECK: vadd.i16	d16, d17, d16   @ encoding: [0xa0,0x08,0x51,0xf2]
+  %tmp3 = add <4 x i16> %tmp1, %tmp2
+	ret <4 x i16> %tmp3
+}
+
+; CHECK: vadd_1xi64
+define <1 x i64> @vadd_1xi64(<1 x i64>* %A, <1 x i64>* %B) nounwind {                                                                          
+  %tmp1 = load <1 x i64>* %A
+  %tmp2 = load <1 x i64>* %B
+; CHECK: vadd.i64	d16, d17, d16   @ encoding: [0xa0,0x08,0x71,0xf2]
+  %tmp3 = add <1 x i64> %tmp1, %tmp2
+	ret <1 x i64> %tmp3
+}
+
+; CHECK: vadd_2xi32
+define <2 x i32> @vadd_2xi32(<2 x i32>* %A, <2 x i32>* %B) nounwind {                                                                          
+  %tmp1 = load <2 x i32>* %A
+  %tmp2 = load <2 x i32>* %B
+; CHECK: vadd.i32	d16, d17, d16   @ encoding: [0xa0,0x08,0x61,0xf2]
+  %tmp3 = add <2 x i32> %tmp1, %tmp2
+	ret <2 x i32> %tmp3
+}
+
+; CHECK: vadd_2xfloat
+define <2 x float> @vadd_2xfloat(<2 x float>* %A, <2 x float>* %B) nounwind {                                                                          
+  %tmp1 = load <2 x float>* %A
+  %tmp2 = load <2 x float>* %B
+; CHECK: vadd.f32	d16, d16, d17   @ encoding: [0xa1,0x0d,0x40,0xf2]
+  %tmp3 = fadd <2 x float> %tmp1, %tmp2
+	ret <2 x float> %tmp3
+}
+
+; CHECK: vadd_4xfloat
+define <4 x float> @vadd_4xfloat(<4 x float>* %A, <4 x float>* %B) nounwind {
+	%tmp1 = load <4 x float>* %A
+	%tmp2 = load <4 x float>* %B
+; CHECK: vadd.f32	q8, q8, q9      @ encoding: [0xe2,0x0d,0x40,0xf2]
+	%tmp3 = fadd <4 x float> %tmp1, %tmp2
+	ret <4 x float> %tmp3
+}
+



From evan.cheng at apple.com  Wed Oct 20 20:12:00 2010
From: evan.cheng at apple.com (Evan Cheng)
Date: Thu, 21 Oct 2010 01:12:00 -0000
Subject: [llvm-commits] [llvm] r116983 - in /llvm/trunk:
 lib/Target/ARM/ARMScheduleA8.td lib/Target/ARM/ARMScheduleA9.td
 lib/Target/ARM/ARMScheduleV6.td test/CodeGen/ARM/fmscs.ll
 test/CodeGen/ARM/reg_sequence.ll
Message-ID: <20101021011200.96E512A6C12C@llvm.org>

Author: evancheng
Date: Wed Oct 20 20:12:00 2010
New Revision: 116983

URL: http://llvm.org/viewvc/llvm-project?rev=116983&view=rev
Log:
Add missing scheduling itineraries for transfers between core registers and VFP registers.

Modified:
    llvm/trunk/lib/Target/ARM/ARMScheduleA8.td
    llvm/trunk/lib/Target/ARM/ARMScheduleA9.td
    llvm/trunk/lib/Target/ARM/ARMScheduleV6.td
    llvm/trunk/test/CodeGen/ARM/fmscs.ll
    llvm/trunk/test/CodeGen/ARM/reg_sequence.ll

Modified: llvm/trunk/lib/Target/ARM/ARMScheduleA8.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMScheduleA8.td?rev=116983&r1=116982&r2=116983&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMScheduleA8.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMScheduleA8.td Wed Oct 20 20:12:00 2010
@@ -331,6 +331,28 @@
   InstrItinData<IIC_fpSQRT64, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
                                InstrStage<29, [A8_NPipe], 0>,
                                InstrStage<29, [A8_NLSPipe]>], [29, 1]>,
+
+  //
+  // Integer to Single-precision Move
+  InstrItinData<IIC_fpMOVIS,  [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
+                               InstrStage<1, [A8_NPipe]>],
+                              [2, 1]>,
+  //
+  // Integer to Double-precision Move
+  InstrItinData<IIC_fpMOVID,  [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
+                               InstrStage<1, [A8_NPipe]>],
+                              [2, 1, 1]>,
+  //
+  // Single-precision to Integer Move
+  InstrItinData<IIC_fpMOVSI,  [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
+                               InstrStage<1, [A8_NPipe]>],
+                              [20, 1]>,
+  //
+  // Double-precision to Integer Move
+  InstrItinData<IIC_fpMOVDI,  [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
+                               InstrStage<1, [A8_NPipe]>],
+                              [20, 20, 1]>,
+
   //
   // Single-precision FP Load
   InstrItinData<IIC_fpLoad32, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,

Modified: llvm/trunk/lib/Target/ARM/ARMScheduleA9.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMScheduleA9.td?rev=116983&r1=116982&r2=116983&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMScheduleA9.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMScheduleA9.td Wed Oct 20 20:12:00 2010
@@ -641,7 +641,7 @@
                                InstrStage<1, [A9_DRegsVFP], 0, Required>,
                                InstrStage<2, [A9_DRegsN],   0, Reserved>,
                                InstrStage<1, [A9_NPipe]>],
-                              [1, 1]>,
+                              [2, 1]>,
   //
   // Double-precision to Integer Move
   InstrItinData<IIC_fpMOVDI,  [InstrStage<1, [A9_Issue0, A9_Issue1], 0>,
@@ -649,7 +649,7 @@
                                InstrStage<1, [A9_DRegsVFP], 0, Required>,
                                InstrStage<2, [A9_DRegsN],   0, Reserved>,
                                InstrStage<1, [A9_NPipe]>],
-                              [1, 1, 1]>,
+                              [2, 1, 1]>,
   //
   // Single-precision FP Load
   InstrItinData<IIC_fpLoad32, [InstrStage<1, [A9_Issue0, A9_Issue1], 0>,
@@ -1430,7 +1430,7 @@
                                InstrStage<1, [A9_DRegsN],   0, Required>,
                                InstrStage<3, [A9_DRegsVFP], 0, Reserved>,
                                InstrStage<1, [A9_NPipe]>],
-                              [2, 1]>,
+                              [1, 1]>,
   //
   // Integer to Double-precision Move
   InstrItinData<IIC_VMOVID ,  [InstrStage<1, [A9_Issue0, A9_Issue1], 0>,
@@ -1438,7 +1438,7 @@
                                InstrStage<1, [A9_DRegsN],   0, Required>,
                                InstrStage<3, [A9_DRegsVFP], 0, Reserved>,
                                InstrStage<1, [A9_NPipe]>],
-                              [2, 1, 1]>,
+                              [1, 1, 1]>,
   //
   // Single-precision to Integer Move
   InstrItinData<IIC_VMOVSI ,  [InstrStage<1, [A9_Issue0, A9_Issue1], 0>,

Modified: llvm/trunk/lib/Target/ARM/ARMScheduleV6.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMScheduleV6.td?rev=116983&r1=116982&r2=116983&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMScheduleV6.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMScheduleV6.td Wed Oct 20 20:12:00 2010
@@ -247,6 +247,18 @@
   // Double-precision FP SQRT
   InstrItinData<IIC_fpSQRT64 , [InstrStage<29, [V6_Pipe]>], [34, 2, 2]>,
   //
+  // Integer to Single-precision Move
+  InstrItinData<IIC_fpMOVIS,  [InstrStage<1, [V6_Pipe]>], [10, 1]>,
+  //
+  // Integer to Double-precision Move
+  InstrItinData<IIC_fpMOVID,  [InstrStage<1, [V6_Pipe]>], [10, 1, 1]>,
+  //
+  // Single-precision to Integer Move
+  InstrItinData<IIC_fpMOVSI,  [InstrStage<1, [V6_Pipe]>], [10, 1]>,
+  //
+  // Double-precision to Integer Move
+  InstrItinData<IIC_fpMOVDI,  [InstrStage<1, [V6_Pipe]>], [10, 10, 1]>,
+  //
   // Single-precision FP Load
   InstrItinData<IIC_fpLoad32 , [InstrStage<1, [V6_Pipe]>], [5, 2, 2]>,
   //

Modified: llvm/trunk/test/CodeGen/ARM/fmscs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fmscs.ll?rev=116983&r1=116982&r2=116983&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/fmscs.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/fmscs.ll Wed Oct 20 20:12:00 2010
@@ -19,6 +19,6 @@
 ; NFP0: 	vnmls.f32	s2, s1, s0
 
 ; CORTEXA8: test:
-; CORTEXA8: 	vnmls.f32	s2, s1, s0
+; CORTEXA8: 	vnmls.f32	s1, s2, s0
 ; CORTEXA9: test:
 ; CORTEXA9: 	vnmls.f32	s0, s1, s2

Modified: llvm/trunk/test/CodeGen/ARM/reg_sequence.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/reg_sequence.ll?rev=116983&r1=116982&r2=116983&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/reg_sequence.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/reg_sequence.ll Wed Oct 20 20:12:00 2010
@@ -75,7 +75,8 @@
 ; CHECK:        t3:
 ; CHECK:        vld3.8
 ; CHECK:        vmul.i8
-; CHECK-NOT:    vmov
+; CHECK:        vmov r
+; CHECK-NOT:    vmov d
 ; CHECK:        vst3.8
   %tmp1 = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8* %A, i32 1) ; <%struct.__neon_int8x8x3_t> [#uses=2]
   %tmp2 = extractvalue %struct.__neon_int8x8x3_t %tmp1, 0 ; <<8 x i8>> [#uses=1]



From bigcheesegs at gmail.com  Wed Oct 20 20:41:02 2010
From: bigcheesegs at gmail.com (Michael J. Spencer)
Date: Thu, 21 Oct 2010 01:41:02 -0000
Subject: [llvm-commits] [llvm] r116984 - in /llvm/trunk/lib/Target/X86:
 X86ISelLowering.cpp X86ISelLowering.h X86InstrCompiler.td X86InstrInfo.td
Message-ID: <20101021014102.3C3D32A6C12C@llvm.org>

Author: mspencer
Date: Wed Oct 20 20:41:01 2010
New Revision: 116984

URL: http://llvm.org/viewvc/llvm-project?rev=116984&view=rev
Log:
X86: Add alloca probing to dynamic alloca on Windows. Fixes PR8424.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/lib/Target/X86/X86ISelLowering.h
    llvm/trunk/lib/Target/X86/X86InstrCompiler.td
    llvm/trunk/lib/Target/X86/X86InstrInfo.td

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=116984&r1=116983&r2=116984&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Oct 20 20:41:01 2010
@@ -424,7 +424,7 @@
   setOperationAction(ISD::STACKRESTORE,       MVT::Other, Expand);
   if (Subtarget->is64Bit())
     setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i64, Expand);
-  if (Subtarget->isTargetCygMing())
+  if (Subtarget->isTargetCygMing() || Subtarget->isTargetWindows())
     setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Custom);
   else
     setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Expand);
@@ -7483,8 +7483,8 @@
 SDValue
 X86TargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op,
                                            SelectionDAG &DAG) const {
-  assert(Subtarget->isTargetCygMing() &&
-         "This should be used only on Cygwin/Mingw targets");
+  assert(Subtarget->isTargetCygMing() || Subtarget->isTargetWindows() &&
+         "This should be used only on Windows targets");
   DebugLoc dl = Op.getDebugLoc();
 
   // Get the inputs.
@@ -7501,7 +7501,7 @@
 
   SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Flag);
 
-  Chain = DAG.getNode(X86ISD::MINGW_ALLOCA, dl, NodeTys, Chain, Flag);
+  Chain = DAG.getNode(X86ISD::WIN_ALLOCA, dl, NodeTys, Chain, Flag);
   Flag = Chain.getValue(1);
 
   Chain = DAG.getCopyFromReg(Chain, dl, X86StackPtr, SPTy).getValue(1);
@@ -8911,7 +8911,7 @@
   case X86ISD::PUNPCKHQDQ:         return "X86ISD::PUNPCKHQDQ";
   case X86ISD::VASTART_SAVE_XMM_REGS: return "X86ISD::VASTART_SAVE_XMM_REGS";
   case X86ISD::VAARG_64:           return "X86ISD::VAARG_64";
-  case X86ISD::MINGW_ALLOCA:       return "X86ISD::MINGW_ALLOCA";
+  case X86ISD::WIN_ALLOCA:         return "X86ISD::WIN_ALLOCA";
   }
 }
 
@@ -9874,7 +9874,7 @@
 }
 
 MachineBasicBlock *
-X86TargetLowering::EmitLoweredMingwAlloca(MachineInstr *MI,
+X86TargetLowering::EmitLoweredWinAlloca(MachineInstr *MI,
                                           MachineBasicBlock *BB) const {
   const TargetInstrInfo *TII = getTargetMachine().getInstrInfo();
   DebugLoc DL = MI->getDebugLoc();
@@ -9884,8 +9884,11 @@
   // FIXME: The code should be tweaked as soon as we'll try to do codegen for
   // mingw-w64.
 
+  const char *StackProbeSymbol =
+      Subtarget->isTargetWindows() ? "_chkstk" : "_alloca";
+
   BuildMI(*BB, MI, DL, TII->get(X86::CALLpcrel32))
-    .addExternalSymbol("_alloca")
+    .addExternalSymbol(StackProbeSymbol)
     .addReg(X86::EAX, RegState::Implicit)
     .addReg(X86::ESP, RegState::Implicit)
     .addReg(X86::EAX, RegState::Define | RegState::Implicit)
@@ -9952,8 +9955,8 @@
                                                MachineBasicBlock *BB) const {
   switch (MI->getOpcode()) {
   default: assert(false && "Unexpected instr type to insert");
-  case X86::MINGW_ALLOCA:
-    return EmitLoweredMingwAlloca(MI, BB);
+  case X86::WIN_ALLOCA:
+    return EmitLoweredWinAlloca(MI, BB);
   case X86::TLSCall_32:
   case X86::TLSCall_64:
     return EmitLoweredTLSCall(MI, BB);

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=116984&r1=116983&r2=116984&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Wed Oct 20 20:41:01 2010
@@ -253,8 +253,8 @@
       // with control flow.
       VASTART_SAVE_XMM_REGS,
 
-      // MINGW_ALLOCA - MingW's __alloca call to do stack probing.
-      MINGW_ALLOCA,
+      // WIN_ALLOCA - Windows's _chkstk call to do stack probing.
+      WIN_ALLOCA,
 
       // ATOMADD64_DAG, ATOMSUB64_DAG, ATOMOR64_DAG, ATOMAND64_DAG,
       // ATOMXOR64_DAG, ATOMNAND64_DAG, ATOMSWAP64_DAG -
@@ -870,7 +870,7 @@
     MachineBasicBlock *EmitLoweredSelect(MachineInstr *I,
                                          MachineBasicBlock *BB) const;
 
-    MachineBasicBlock *EmitLoweredMingwAlloca(MachineInstr *MI,
+    MachineBasicBlock *EmitLoweredWinAlloca(MachineInstr *MI,
                                               MachineBasicBlock *BB) const;
 
     MachineBasicBlock *EmitLoweredTLSCall(MachineInstr *MI,

Modified: llvm/trunk/lib/Target/X86/X86InstrCompiler.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrCompiler.td?rev=116984&r1=116983&r2=116984&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrCompiler.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrCompiler.td Wed Oct 20 20:41:01 2010
@@ -94,18 +94,18 @@
                     (X86vaarg64 addr:$ap, imm:$size, imm:$mode, imm:$align)),
                   (implicit EFLAGS)]>;
 
-// Dynamic stack allocation yields _alloca call for Cygwin/Mingw targets.  Calls
-// to _alloca is needed to probe the stack when allocating more than 4k bytes in
-// one go. Touching the stack at 4K increments is necessary to ensure that the
-// guard pages used by the OS virtual memory manager are allocated in correct
-// sequence.
+// Dynamic stack allocation yields a _chkstk or _alloca call for all Windows
+// targets.  These calls are needed to probe the stack when allocating more than
+// 4k bytes in one go. Touching the stack at 4K increments is necessary to
+// ensure that the guard pages used by the OS virtual memory manager are
+// allocated in correct sequence.
 // The main point of having separate instruction are extra unmodelled effects
 // (compared to ordinary calls) like stack pointer change.
 
 let Defs = [EAX, ESP, EFLAGS], Uses = [ESP] in
-  def MINGW_ALLOCA : I<0, Pseudo, (outs), (ins),
-                       "# dynamic stack allocation",
-                       [(X86MingwAlloca)]>;
+  def WIN_ALLOCA : I<0, Pseudo, (outs), (ins),
+                     "# dynamic stack allocation",
+                     [(X86WinAlloca)]>;
 }
 
 

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=116984&r1=116983&r2=116984&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Wed Oct 20 20:41:01 2010
@@ -202,9 +202,9 @@
 
 def X86mul_imm : SDNode<"X86ISD::MUL_IMM", SDTIntBinOp>;
 
-def X86MingwAlloca : SDNode<"X86ISD::MINGW_ALLOCA", SDTX86Void,
-                            [SDNPHasChain, SDNPInFlag, SDNPOutFlag]>;
-                            
+def X86WinAlloca : SDNode<"X86ISD::WIN_ALLOCA", SDTX86Void,
+                          [SDNPHasChain, SDNPInFlag, SDNPOutFlag]>;
+
 def X86TLSCall : SDNode<"X86ISD::TLSCALL", SDT_X86TLSCALL,
                         []>;
 



From peckw at wesleypeck.com  Wed Oct 20 21:52:59 2010
From: peckw at wesleypeck.com (Wesley Peck)
Date: Thu, 21 Oct 2010 02:52:59 -0000
Subject: [llvm-commits] [llvm] r116985 -
	/llvm/trunk/include/llvm/Support/ELF.h
Message-ID: <20101021025259.BE0E92A6C12C@llvm.org>

Author: peckw
Date: Wed Oct 20 21:52:59 2010
New Revision: 116985

URL: http://llvm.org/viewvc/llvm-project?rev=116985&view=rev
Log:
Adding the EM_MBLAZE value to the machine architectures enumeration to
support future ELF file generation by the MBlaze backend.

Modified:
    llvm/trunk/include/llvm/Support/ELF.h

Modified: llvm/trunk/include/llvm/Support/ELF.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/ELF.h?rev=116985&r1=116984&r2=116985&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/ELF.h (original)
+++ llvm/trunk/include/llvm/Support/ELF.h Wed Oct 20 21:52:59 2010
@@ -126,21 +126,22 @@
 
 // Machine architectures
 enum {
-  EM_NONE = 0,  // No machine
-  EM_M32 = 1,   // AT&T WE 32100
-  EM_SPARC = 2, // SPARC
-  EM_386 = 3,   // Intel 386
-  EM_68K = 4,   // Motorola 68000
-  EM_88K = 5,   // Motorola 88000
-  EM_486 = 6,   // Intel 486 (deprecated)
-  EM_860 = 7,   // Intel 80860
-  EM_MIPS = 8,     // MIPS R3000
-  EM_PPC = 20,     // PowerPC
-  EM_PPC64 = 21,   // PowerPC64
-  EM_ARM = 40,     // ARM
-  EM_ALPHA = 41,   // DEC Alpha
-  EM_SPARCV9 = 43, // SPARC V9
-  EM_X86_64 = 62   // AMD64
+  EM_NONE = 0,      // No machine
+  EM_M32 = 1,       // AT&T WE 32100
+  EM_SPARC = 2,     // SPARC
+  EM_386 = 3,       // Intel 386
+  EM_68K = 4,       // Motorola 68000
+  EM_88K = 5,       // Motorola 88000
+  EM_486 = 6,       // Intel 486 (deprecated)
+  EM_860 = 7,       // Intel 80860
+  EM_MIPS = 8,      // MIPS R3000
+  EM_PPC = 20,      // PowerPC
+  EM_PPC64 = 21,    // PowerPC64
+  EM_ARM = 40,      // ARM
+  EM_ALPHA = 41,    // DEC Alpha
+  EM_SPARCV9 = 43,  // SPARC V9
+  EM_X86_64 = 62,   // AMD64
+  EM_MBLAZE = 47787 // Xilinx MicroBlaze
 };
 
 // Object file classes.



From peckw at wesleypeck.com  Wed Oct 20 22:09:55 2010
From: peckw at wesleypeck.com (Wesley Peck)
Date: Thu, 21 Oct 2010 03:09:55 -0000
Subject: [llvm-commits] [llvm] r116986 - in /llvm/trunk: cmake/modules/
 lib/Target/MBlaze/ lib/Target/MBlaze/AsmPrinter/
 lib/Target/MBlaze/InstPrinter/ lib/Target/MBlaze/TargetInfo/
 test/CodeGen/MBlaze/
Message-ID: <20101021030955.E4F442A6C12C@llvm.org>

Author: peckw
Date: Wed Oct 20 22:09:55 2010
New Revision: 116986

URL: http://llvm.org/viewvc/llvm-project?rev=116986&view=rev
Log:
Major update of the MicroBlaze backend. The new features are:
    1. A delay slot filler that searches for valid instructions
       to fill the delay slot with. Previously NOPs would always
       be inserted into delay slots.
    2. Support for MC based instruction printer added.
    3. Support for MC based machine code generation and ELF
       file generation. ELF file generation does not yet
       completely work as much of the ELF support infrastructure
       is still x86/x86-64 specific.
    4. General clean up of the MBlaze backend code. Much of the
       tablegen code has been cleanup and simplified.

Bug Fixes:
    1. Removed duplicate periods from subtarget feature descriptions.
    2. Many of the instructions had bad machine code information
       in the tablegen files. Much of this has been fixed.

Added:
    llvm/trunk/lib/Target/MBlaze/InstPrinter/
    llvm/trunk/lib/Target/MBlaze/InstPrinter/CMakeLists.txt
    llvm/trunk/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.cpp
    llvm/trunk/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.h
    llvm/trunk/lib/Target/MBlaze/InstPrinter/Makefile
    llvm/trunk/lib/Target/MBlaze/MBlazeAsmBackend.cpp
    llvm/trunk/lib/Target/MBlaze/MBlazeAsmPrinter.cpp
    llvm/trunk/lib/Target/MBlaze/MBlazeELFWriterInfo.cpp
    llvm/trunk/lib/Target/MBlaze/MBlazeELFWriterInfo.h
    llvm/trunk/lib/Target/MBlaze/MBlazeFixupKinds.h
    llvm/trunk/lib/Target/MBlaze/MBlazeMCCodeEmitter.cpp
    llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.cpp
    llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.h
    llvm/trunk/lib/Target/MBlaze/MBlazeRelocations.h
    llvm/trunk/lib/Target/MBlaze/TODO
Removed:
    llvm/trunk/lib/Target/MBlaze/AsmPrinter/
Modified:
    llvm/trunk/cmake/modules/LLVMLibDeps.cmake
    llvm/trunk/lib/Target/MBlaze/CMakeLists.txt
    llvm/trunk/lib/Target/MBlaze/MBlaze.h
    llvm/trunk/lib/Target/MBlaze/MBlaze.td
    llvm/trunk/lib/Target/MBlaze/MBlazeDelaySlotFiller.cpp
    llvm/trunk/lib/Target/MBlaze/MBlazeISelLowering.cpp
    llvm/trunk/lib/Target/MBlaze/MBlazeInstrFPU.td
    llvm/trunk/lib/Target/MBlaze/MBlazeInstrFSL.td
    llvm/trunk/lib/Target/MBlaze/MBlazeInstrFormats.td
    llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.h
    llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.td
    llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.cpp
    llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.h
    llvm/trunk/lib/Target/MBlaze/Makefile
    llvm/trunk/lib/Target/MBlaze/TargetInfo/CMakeLists.txt
    llvm/trunk/test/CodeGen/MBlaze/brind.ll
    llvm/trunk/test/CodeGen/MBlaze/cc.ll
    llvm/trunk/test/CodeGen/MBlaze/fpu.ll
    llvm/trunk/test/CodeGen/MBlaze/imm.ll
    llvm/trunk/test/CodeGen/MBlaze/jumptable.ll
    llvm/trunk/test/CodeGen/MBlaze/mul.ll
    llvm/trunk/test/CodeGen/MBlaze/shift.ll

Modified: llvm/trunk/cmake/modules/LLVMLibDeps.cmake
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/cmake/modules/LLVMLibDeps.cmake?rev=116986&r1=116985&r2=116986&view=diff
==============================================================================
--- llvm/trunk/cmake/modules/LLVMLibDeps.cmake (original)
+++ llvm/trunk/cmake/modules/LLVMLibDeps.cmake Wed Oct 20 22:09:55 2010
@@ -1,28 +1,28 @@
-set(MSVC_LIB_DEPS_LLVMARMAsmParser LLVMARMCodeGen LLVMARMInfo LLVMMC LLVMMCParser LLVMSupport LLVMTarget)
-set(MSVC_LIB_DEPS_LLVMARMAsmPrinter LLVMMC LLVMSupport)
+set(MSVC_LIB_DEPS_LLVMARMAsmParser LLVMARMInfo LLVMMC LLVMMCParser LLVMSupport LLVMSystem LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMARMAsmPrinter LLVMMC LLVMSupport LLVMSystem)
 set(MSVC_LIB_DEPS_LLVMARMCodeGen LLVMARMAsmPrinter LLVMARMInfo LLVMAnalysis LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget)
-set(MSVC_LIB_DEPS_LLVMARMDisassembler LLVMARMCodeGen LLVMARMInfo LLVMMC LLVMSupport)
+set(MSVC_LIB_DEPS_LLVMARMDisassembler LLVMARMCodeGen LLVMARMInfo LLVMMC LLVMSupport LLVMSystem)
 set(MSVC_LIB_DEPS_LLVMARMInfo LLVMSupport)
-set(MSVC_LIB_DEPS_LLVMAlphaAsmPrinter LLVMAlphaCodeGen LLVMAlphaInfo LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMAlphaAsmPrinter LLVMAlphaInfo LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMAlphaCodeGen LLVMAlphaInfo LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMAlphaInfo LLVMSupport)
 set(MSVC_LIB_DEPS_LLVMAnalysis LLVMCore LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMArchive LLVMBitReader LLVMCore LLVMSupport LLVMSystem)
-set(MSVC_LIB_DEPS_LLVMAsmParser LLVMCore LLVMSupport)
+set(MSVC_LIB_DEPS_LLVMAsmParser LLVMCore LLVMSupport LLVMSystem)
 set(MSVC_LIB_DEPS_LLVMAsmPrinter LLVMAnalysis LLVMCodeGen LLVMCore LLVMMC LLVMMCParser LLVMSupport LLVMSystem LLVMTarget)
-set(MSVC_LIB_DEPS_LLVMBitReader LLVMCore LLVMSupport)
-set(MSVC_LIB_DEPS_LLVMBitWriter LLVMCore LLVMSupport)
-set(MSVC_LIB_DEPS_LLVMBlackfinAsmPrinter LLVMAsmPrinter LLVMBlackfinCodeGen LLVMBlackfinInfo LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMTarget)
-set(MSVC_LIB_DEPS_LLVMBlackfinCodeGen LLVMBlackfinInfo LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMBitReader LLVMCore LLVMSupport LLVMSystem)
+set(MSVC_LIB_DEPS_LLVMBitWriter LLVMCore LLVMSupport LLVMSystem)
+set(MSVC_LIB_DEPS_LLVMBlackfinAsmPrinter LLVMAsmPrinter LLVMBlackfinInfo LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMBlackfinCodeGen LLVMBlackfinInfo LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMBlackfinInfo LLVMSupport)
 set(MSVC_LIB_DEPS_LLVMCBackend LLVMAnalysis LLVMCBackendInfo LLVMCodeGen LLVMCore LLVMMC LLVMScalarOpts LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils LLVMipa)
 set(MSVC_LIB_DEPS_LLVMCBackendInfo LLVMSupport)
-set(MSVC_LIB_DEPS_LLVMCellSPUAsmPrinter LLVMAsmPrinter LLVMCellSPUCodeGen LLVMCellSPUInfo LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMTarget)
-set(MSVC_LIB_DEPS_LLVMCellSPUCodeGen LLVMCellSPUInfo LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMCellSPUAsmPrinter LLVMAsmPrinter LLVMCellSPUInfo LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMCellSPUCodeGen LLVMCellSPUInfo LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMCellSPUInfo LLVMSupport)
 set(MSVC_LIB_DEPS_LLVMCodeGen LLVMAnalysis LLVMCore LLVMMC LLVMScalarOpts LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils)
 set(MSVC_LIB_DEPS_LLVMCore LLVMSupport LLVMSystem)
-set(MSVC_LIB_DEPS_LLVMCppBackend LLVMCore LLVMCppBackendInfo LLVMSupport LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMCppBackend LLVMCore LLVMCppBackendInfo LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMCppBackendInfo LLVMSupport)
 set(MSVC_LIB_DEPS_LLVMExecutionEngine LLVMCore LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMInstCombine LLVMAnalysis LLVMCore LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils)
@@ -30,43 +30,43 @@
 set(MSVC_LIB_DEPS_LLVMInterpreter LLVMCodeGen LLVMCore LLVMExecutionEngine LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMJIT LLVMCodeGen LLVMCore LLVMExecutionEngine LLVMMC LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMLinker LLVMArchive LLVMBitReader LLVMCore LLVMSupport LLVMSystem LLVMTransformUtils)
-set(MSVC_LIB_DEPS_LLVMMBlazeAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMBlazeCodeGen LLVMMBlazeInfo LLVMMC LLVMSupport LLVMTarget)
-set(MSVC_LIB_DEPS_LLVMMBlazeCodeGen LLVMCodeGen LLVMCore LLVMMBlazeInfo LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMMBlazeAsmPrinter LLVMMC LLVMSupport LLVMSystem)
+set(MSVC_LIB_DEPS_LLVMMBlazeCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMBlazeAsmPrinter LLVMMBlazeInfo LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMMBlazeInfo LLVMSupport)
 set(MSVC_LIB_DEPS_LLVMMC LLVMSupport LLVMSystem)
-set(MSVC_LIB_DEPS_LLVMMCDisassembler LLVMARMAsmParser LLVMARMCodeGen LLVMARMDisassembler LLVMARMInfo LLVMAlphaAsmPrinter LLVMAlphaCodeGen LLVMAlphaInfo LLVMBlackfinAsmPrinter LLVMBlackfinCodeGen LLVMBlackfinInfo LLVMCBackend LLVMCBackendInfo LLVMCellSPUAsmPrinter LLVMCellSPUCodeGen LLVMCellSPUInfo LLVMCppBackend LLVMCppBackendInfo LLVMMBlazeAsmPrinter LLVMMBlazeCodeGen LLVMMBlazeInfo LLVMMC LLVMMCParser LLVMMSP430CodeGen LLVMMSP430Info LLVMMipsAsmPrinter LLVMMipsCodeGen LLVMMipsInfo LLVMPTXAsmPrinter LLVMPTXCodeGen LLVMPTXInfo LLVMPowerPCAsmPrinter LLVMPowerPCCodeGen LLVMPowerPCInfo LLVMSparcAsmPrinter LLVMSparcCodeGen LLVMSparcInfo LLVMSupport LLVMSystem LLVMSystemZAsmPrinter LLVMSystemZCodeGen LLVMSystemZInfo LLVMX86AsmParser LLVMX86CodeGen LLVMX86Disassembler LLVMX86Info LLVMXCoreAsmPrinter LLVMXCoreCodeGen LLVMXCoreInfo)
-set(MSVC_LIB_DEPS_LLVMMCParser LLVMMC LLVMSupport)
-set(MSVC_LIB_DEPS_LLVMMSP430AsmPrinter LLVMMC LLVMSupport)
+set(MSVC_LIB_DEPS_LLVMMCDisassembler LLVMARMAsmParser LLVMARMCodeGen LLVMARMDisassembler LLVMARMInfo LLVMAlphaAsmPrinter LLVMAlphaCodeGen LLVMAlphaInfo LLVMBlackfinAsmPrinter LLVMBlackfinCodeGen LLVMBlackfinInfo LLVMCBackend LLVMCBackendInfo LLVMCellSPUAsmPrinter LLVMCellSPUCodeGen LLVMCellSPUInfo LLVMCppBackend LLVMCppBackendInfo LLVMMBlazeCodeGen LLVMMBlazeInfo LLVMMC LLVMMCParser LLVMMSP430CodeGen LLVMMSP430Info LLVMMipsAsmPrinter LLVMMipsCodeGen LLVMMipsInfo LLVMPTXAsmPrinter LLVMPTXCodeGen LLVMPTXInfo LLVMPowerPCAsmPrinter LLVMPowerPCCodeGen LLVMPowerPCInfo LLVMSparcAsmPrinter LLVMSparcCodeGen LLVMSparcInfo LLVMSupport LLVMSystem LLVMSystemZAsmPrinter LLVMSystemZCodeGen LLVMSystemZInfo LLVMX86AsmParser LLVMX86CodeGen LLVMX86Disassembler LLVMX86Info LLVMXCoreAsmPrinter LLVMXCoreCodeGen LLVMXCoreInfo)
+set(MSVC_LIB_DEPS_LLVMMCParser LLVMMC LLVMSupport LLVMSystem)
+set(MSVC_LIB_DEPS_LLVMMSP430AsmPrinter LLVMMC LLVMSupport LLVMSystem)
 set(MSVC_LIB_DEPS_LLVMMSP430CodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMMSP430AsmPrinter LLVMMSP430Info LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMMSP430Info LLVMSupport)
-set(MSVC_LIB_DEPS_LLVMMipsAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMMipsCodeGen LLVMMipsInfo LLVMSupport LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMMipsAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMMipsCodeGen LLVMMipsInfo LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMMipsCodeGen LLVMCodeGen LLVMCore LLVMMC LLVMMipsInfo LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMMipsInfo LLVMSupport)
-set(MSVC_LIB_DEPS_LLVMPTXAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMPTXCodeGen LLVMPTXInfo LLVMSupport)
-set(MSVC_LIB_DEPS_LLVMPTXCodeGen LLVMCodeGen LLVMCore LLVMMC LLVMPTXInfo LLVMSelectionDAG LLVMSupport LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMPTXAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMPTXInfo LLVMSupport LLVMSystem)
+set(MSVC_LIB_DEPS_LLVMPTXCodeGen LLVMCodeGen LLVMCore LLVMMC LLVMPTXInfo LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMPTXInfo LLVMSupport)
-set(MSVC_LIB_DEPS_LLVMPowerPCAsmPrinter LLVMAnalysis LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMPowerPCCodeGen LLVMPowerPCInfo LLVMSupport LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMPowerPCAsmPrinter LLVMAnalysis LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMPowerPCInfo LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMPowerPCCodeGen LLVMCodeGen LLVMCore LLVMMC LLVMPowerPCInfo LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMPowerPCInfo LLVMSupport)
 set(MSVC_LIB_DEPS_LLVMScalarOpts LLVMAnalysis LLVMCore LLVMInstCombine LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils)
 set(MSVC_LIB_DEPS_LLVMSelectionDAG LLVMAnalysis LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget)
-set(MSVC_LIB_DEPS_LLVMSparcAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSparcCodeGen LLVMSparcInfo LLVMSupport LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMSparcAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSparcInfo LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMSparcCodeGen LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSparcInfo LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMSparcInfo LLVMSupport)
 set(MSVC_LIB_DEPS_LLVMSupport LLVMSystem)
 set(MSVC_LIB_DEPS_LLVMSystem )
-set(MSVC_LIB_DEPS_LLVMSystemZAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystemZCodeGen LLVMSystemZInfo LLVMTarget)
-set(MSVC_LIB_DEPS_LLVMSystemZCodeGen LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystemZInfo LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMSystemZAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMSystemZInfo LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMSystemZCodeGen LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMSystemZInfo LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMSystemZInfo LLVMSupport)
-set(MSVC_LIB_DEPS_LLVMTarget LLVMCore LLVMMC LLVMSupport)
+set(MSVC_LIB_DEPS_LLVMTarget LLVMCore LLVMMC LLVMSupport LLVMSystem)
 set(MSVC_LIB_DEPS_LLVMTransformUtils LLVMAnalysis LLVMCore LLVMSupport LLVMSystem LLVMTarget LLVMipa)
-set(MSVC_LIB_DEPS_LLVMX86AsmParser LLVMMC LLVMMCParser LLVMSupport LLVMTarget LLVMX86Info)
-set(MSVC_LIB_DEPS_LLVMX86AsmPrinter LLVMMC LLVMSupport)
+set(MSVC_LIB_DEPS_LLVMX86AsmParser LLVMMC LLVMMCParser LLVMSupport LLVMSystem LLVMTarget LLVMX86Info)
+set(MSVC_LIB_DEPS_LLVMX86AsmPrinter LLVMMC LLVMSupport LLVMSystem)
 set(MSVC_LIB_DEPS_LLVMX86CodeGen LLVMAnalysis LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget LLVMX86AsmPrinter LLVMX86Info)
 set(MSVC_LIB_DEPS_LLVMX86Disassembler LLVMMC LLVMSupport LLVMX86Info)
 set(MSVC_LIB_DEPS_LLVMX86Info LLVMSupport)
-set(MSVC_LIB_DEPS_LLVMXCoreAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMTarget LLVMXCoreCodeGen LLVMXCoreInfo)
-set(MSVC_LIB_DEPS_LLVMXCoreCodeGen LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMTarget LLVMXCoreInfo)
+set(MSVC_LIB_DEPS_LLVMXCoreAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget LLVMXCoreInfo)
+set(MSVC_LIB_DEPS_LLVMXCoreCodeGen LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget LLVMXCoreInfo)
 set(MSVC_LIB_DEPS_LLVMXCoreInfo LLVMSupport)
 set(MSVC_LIB_DEPS_LLVMipa LLVMAnalysis LLVMCore LLVMSupport LLVMSystem)
 set(MSVC_LIB_DEPS_LLVMipo LLVMAnalysis LLVMCore LLVMScalarOpts LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils LLVMipa)

Modified: llvm/trunk/lib/Target/MBlaze/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/CMakeLists.txt?rev=116986&r1=116985&r2=116986&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/CMakeLists.txt (original)
+++ llvm/trunk/lib/Target/MBlaze/CMakeLists.txt Wed Oct 20 22:09:55 2010
@@ -5,6 +5,7 @@
 tablegen(MBlazeGenRegisterInfo.inc -gen-register-desc)
 tablegen(MBlazeGenInstrNames.inc -gen-instr-enums)
 tablegen(MBlazeGenInstrInfo.inc -gen-instr-desc)
+tablegen(MBlazeGenCodeEmitter.inc -gen-emitter)
 tablegen(MBlazeGenAsmWriter.inc -gen-asm-writer)
 tablegen(MBlazeGenDAGISel.inc -gen-dag-isel)
 tablegen(MBlazeGenCallingConv.inc -gen-callingconv)
@@ -23,4 +24,9 @@
   MBlazeTargetObjectFile.cpp
   MBlazeIntrinsicInfo.cpp
   MBlazeSelectionDAGInfo.cpp
+  MBlazeAsmPrinter.cpp
+  MBlazeAsmBackend.cpp
+  MBlazeMCInstLower.cpp
+  MBlazeELFWriterInfo.cpp
+  MBlazeMCCodeEmitter.cpp
   )

Added: llvm/trunk/lib/Target/MBlaze/InstPrinter/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/InstPrinter/CMakeLists.txt?rev=116986&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/InstPrinter/CMakeLists.txt (added)
+++ llvm/trunk/lib/Target/MBlaze/InstPrinter/CMakeLists.txt Wed Oct 20 22:09:55 2010
@@ -0,0 +1,8 @@
+include_directories( ${CMAKE_CURRENT_BINARY_DIR}/.. 
+                     ${CMAKE_CURRENT_SOURCE_DIR}/.. )
+
+add_llvm_library(LLVMMBlazeAsmPrinter
+    MBlazeInstPrinter.cpp
+  )
+
+add_dependencies(LLVMMBlazeAsmPrinter MBlazeCodeGenTable_gen)

Added: llvm/trunk/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.cpp?rev=116986&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.cpp (added)
+++ llvm/trunk/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.cpp Wed Oct 20 22:09:55 2010
@@ -0,0 +1,140 @@
+//===-- MBlazeInstPrinter.cpp - Convert MBlaze MCInst to assembly syntax --===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This class prints an MBlaze MCInst to a .s file.
+//
+//===----------------------------------------------------------------------===//
+
+#define DEBUG_TYPE "asm-printer"
+#include "MBlaze.h"
+#include "MBlazeInstPrinter.h"
+#include "llvm/MC/MCInst.h"
+#include "llvm/MC/MCAsmInfo.h"
+#include "llvm/MC/MCExpr.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/FormattedStream.h"
+using namespace llvm;
+
+
+// Include the auto-generated portion of the assembly writer.
+#include "MBlazeGenAsmWriter.inc"
+
+void MBlazeInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
+  printInstruction(MI, O);
+}
+
+void MBlazeInstPrinter::printPCRelImmOperand(const MCInst *MI, unsigned OpNo,
+                                             raw_ostream &O) {
+  const MCOperand &Op = MI->getOperand(OpNo);
+  if (Op.isImm())
+    O << Op.getImm();
+  else {
+    assert(Op.isExpr() && "unknown pcrel immediate operand");
+    O << *Op.getExpr();
+  }
+}
+
+void MBlazeInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
+                                     raw_ostream &O, const char *Modifier) {
+  assert((Modifier == 0 || Modifier[0] == 0) && "No modifiers supported");
+  const MCOperand &Op = MI->getOperand(OpNo);
+  if (Op.isReg()) {
+    O << getRegisterName(Op.getReg());
+  } else if (Op.isImm()) {
+    O << (int32_t)Op.getImm();
+  } else {
+    assert(Op.isExpr() && "unknown operand kind in printOperand");
+    O << *Op.getExpr();
+  }
+}
+
+void MBlazeInstPrinter::printSrcMemOperand(const MCInst *MI, unsigned OpNo,
+                                           raw_ostream &O,
+                                           const char *Modifier) {
+  const MCOperand &Base = MI->getOperand(OpNo);
+  const MCOperand &Disp = MI->getOperand(OpNo+1);
+
+  // Print displacement first
+
+  // If the global address expression is a part of displacement field with a
+  // register base, we should not emit any prefix symbol here, e.g.
+  //   mov.w &foo, r1
+  // vs
+  //   mov.w glb(r1), r2
+  // Otherwise (!) msp430-as will silently miscompile the output :(
+  if (!Base.getReg())
+    O << '&';
+
+  if (Disp.isExpr())
+    O << *Disp.getExpr();
+  else {
+    assert(Disp.isImm() && "Expected immediate in displacement field");
+    O << Disp.getImm();
+  }
+
+  // Print register base field
+  if (Base.getReg())
+    O << getRegisterName(Base.getReg());
+}
+
+void MBlazeInstPrinter::printFSLImm(const MCInst *MI, int OpNo,
+                                    raw_ostream &O) {
+  const MCOperand &MO = MI->getOperand(OpNo);
+  if (MO.isImm())
+    O << "rfsl" << MO.getImm();
+  else
+    printOperand(MI, OpNo, O, NULL);
+}
+
+void MBlazeInstPrinter::printUnsignedImm(const MCInst *MI, int OpNo,
+                                        raw_ostream &O) {
+  const MCOperand &MO = MI->getOperand(OpNo);
+  if (MO.isImm())
+    O << MO.getImm();
+  else
+    printOperand(MI, OpNo, O, NULL);
+}
+
+void MBlazeInstPrinter::printMemOperand(const MCInst *MI, int OpNo,
+                                        raw_ostream &O, const char *Modifier ) {
+  printOperand(MI, OpNo+1, O, NULL);
+  O << ", ";
+  printOperand(MI, OpNo, O, NULL);
+}
+
+/*
+void MBlazeInstPrinter::printCCOperand(const MCInst *MI, unsigned OpNo,
+                                       raw_ostream &O) {
+  unsigned CC = MI->getOperand(OpNo).getImm();
+
+  switch (CC) {
+  default:
+   llvm_unreachable("Unsupported CC code");
+   break;
+  case MBlazeCC::COND_E:
+   O << "eq";
+   break;
+  case MBlazeCC::COND_NE:
+   O << "ne";
+   break;
+  case MBlazeCC::COND_HS:
+   O << "hs";
+   break;
+  case MBlazeCC::COND_LO:
+   O << "lo";
+   break;
+  case MBlazeCC::COND_GE:
+   O << "ge";
+   break;
+  case MBlazeCC::COND_L:
+   O << 'l';
+   break;
+  }
+}
+*/

Added: llvm/trunk/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.h?rev=116986&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.h (added)
+++ llvm/trunk/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.h Wed Oct 20 22:09:55 2010
@@ -0,0 +1,46 @@
+//===-- MBLazeInstPrinter.h - Convert MBlaze MCInst to assembly syntax ----===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This class prints a MBlaze MCInst to a .s file.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef MBLAZEINSTPRINTER_H
+#define MBLAZEINSTPRINTER_H
+
+#include "llvm/MC/MCInstPrinter.h"
+
+namespace llvm {
+  class MCOperand;
+
+  class MBlazeInstPrinter : public MCInstPrinter {
+  public:
+    MBlazeInstPrinter(const MCAsmInfo &MAI) : MCInstPrinter(MAI) {
+    }
+
+    virtual void printInst(const MCInst *MI, raw_ostream &O);
+
+    // Autogenerated by tblgen.
+    void printInstruction(const MCInst *MI, raw_ostream &O);
+    static const char *getRegisterName(unsigned RegNo);
+    static const char *getInstructionName(unsigned Opcode);
+
+    void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O,
+                      const char *Modifier = 0);
+    void printPCRelImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
+    void printSrcMemOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O,
+                            const char *Modifier = 0);
+    void printFSLImm(const MCInst *MI, int OpNo, raw_ostream &O);
+    void printUnsignedImm(const MCInst *MI, int OpNo, raw_ostream &O);
+    void printMemOperand(const MCInst *MI, int OpNo,raw_ostream &O,
+                         const char *Modifier = 0);
+  };
+}
+
+#endif

Added: llvm/trunk/lib/Target/MBlaze/InstPrinter/Makefile
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/InstPrinter/Makefile?rev=116986&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/InstPrinter/Makefile (added)
+++ llvm/trunk/lib/Target/MBlaze/InstPrinter/Makefile Wed Oct 20 22:09:55 2010
@@ -0,0 +1,16 @@
+##===- lib/Target/MBlaze/AsmPrinter/Makefile ---------------*- Makefile -*-===##
+#
+#                     The LLVM Compiler Infrastructure
+#
+# This file is distributed under the University of Illinois Open Source
+# License. See LICENSE.TXT for details.
+#
+##===----------------------------------------------------------------------===##
+LEVEL = ../../../..
+LIBRARYNAME = LLVMMBlazeAsmPrinter
+
+# Hack: we need to include 'main' MBlaze target directory to grab
+#       private headers
+CPP.Flags += -I$(PROJ_OBJ_DIR)/.. -I$(PROJ_SRC_DIR)/..
+
+include $(LEVEL)/Makefile.common

Modified: llvm/trunk/lib/Target/MBlaze/MBlaze.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlaze.h?rev=116986&r1=116985&r2=116986&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlaze.h (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlaze.h Wed Oct 20 22:09:55 2010
@@ -21,8 +21,16 @@
   class MBlazeTargetMachine;
   class FunctionPass;
   class MachineCodeEmitter;
+  class MCCodeEmitter;
+  class TargetAsmBackend;
   class formatted_raw_ostream;
 
+  MCCodeEmitter *createMBlazeMCCodeEmitter(const Target &,
+                                           TargetMachine &TM,
+                                           MCContext &Ctx);
+
+  TargetAsmBackend *createMBlazeAsmBackend(const Target &, const std::string &);
+
   FunctionPass *createMBlazeISelDag(MBlazeTargetMachine &TM);
   FunctionPass *createMBlazeDelaySlotFillerPass(MBlazeTargetMachine &TM);
 

Modified: llvm/trunk/lib/Target/MBlaze/MBlaze.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlaze.td?rev=116986&r1=116985&r2=116986&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlaze.td (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlaze.td Wed Oct 20 22:09:55 2010
@@ -32,35 +32,35 @@
 //===----------------------------------------------------------------------===//
 
 def FeaturePipe3       : SubtargetFeature<"pipe3", "HasPipe3", "true",
-                                "Implements 3-stage pipeline.">;
+                                "Implements 3-stage pipeline">;
 def FeatureBarrel      : SubtargetFeature<"barrel", "HasBarrel", "true",
-                                "Implements barrel shifter.">;
+                                "Implements barrel shifter">;
 def FeatureDiv         : SubtargetFeature<"div", "HasDiv", "true",
-                                "Implements hardware divider.">;
+                                "Implements hardware divider">;
 def FeatureMul         : SubtargetFeature<"mul", "HasMul", "true",
-                                "Implements hardware multiplier.">;
+                                "Implements hardware multiplier">;
 def FeatureFSL         : SubtargetFeature<"fsl", "HasFSL", "true",
-                                "Implements FSL instructions.">;
+                                "Implements FSL instructions">;
 def FeatureEFSL        : SubtargetFeature<"efsl", "HasEFSL", "true",
-                                "Implements extended FSL instructions.">;
+                                "Implements extended FSL instructions">;
 def FeatureMSRSet      : SubtargetFeature<"msrset", "HasMSRSet", "true",
-                                "Implements MSR register set and clear.">;
+                                "Implements MSR register set and clear">;
 def FeatureException   : SubtargetFeature<"exception", "HasException", "true",
-                                "Implements hardware exception support.">;
+                                "Implements hardware exception support">;
 def FeaturePatCmp      : SubtargetFeature<"patcmp", "HasPatCmp", "true",
-                                "Implements pattern compare instruction.">;
+                                "Implements pattern compare instruction">;
 def FeatureFPU         : SubtargetFeature<"fpu", "HasFPU", "true",
-                                "Implements floating point unit.">;
+                                "Implements floating point unit">;
 def FeatureESR         : SubtargetFeature<"esr", "HasESR", "true",
                                 "Implements ESR and EAR registers">;
 def FeaturePVR         : SubtargetFeature<"pvr", "HasPVR", "true",
-                                "Implements processor version register.">;
+                                "Implements processor version register">;
 def FeatureMul64       : SubtargetFeature<"mul64", "HasMul64", "true",
                                 "Implements multiplier with 64-bit result">;
 def FeatureSqrt        : SubtargetFeature<"sqrt", "HasSqrt", "true",
-                                "Implements sqrt and floating point convert.">;
+                                "Implements sqrt and floating point convert">;
 def FeatureMMU         : SubtargetFeature<"mmu", "HasMMU", "true",
-                                "Implements memory management unit.">;
+                                "Implements memory management unit">;
 
 //===----------------------------------------------------------------------===//
 // MBlaze processors supported.
@@ -69,13 +69,26 @@
 class Proc<string Name, list<SubtargetFeature> Features>
  : Processor<Name, MBlazeGenericItineraries, Features>;
 
-
 def : Proc<"v400", []>;
 def : Proc<"v500", []>;
 def : Proc<"v600", []>;
 def : Proc<"v700", []>;
 def : Proc<"v710", []>;
 
+//===----------------------------------------------------------------------===//
+// Instruction Descriptions
+//===----------------------------------------------------------------------===//
+
+def MBlazeAsmWriter : AsmWriter {
+  string AsmWriterClassName  = "InstPrinter";
+  bit isMCAsmWriter = 1;
+}
+
+//===----------------------------------------------------------------------===//
+// Target Declaration
+//===----------------------------------------------------------------------===//
+
 def MBlaze : Target {
   let InstructionSet = MBlazeInstrInfo;
+  let AssemblyWriters = [MBlazeAsmWriter];
 }

Added: llvm/trunk/lib/Target/MBlaze/MBlazeAsmBackend.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeAsmBackend.cpp?rev=116986&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeAsmBackend.cpp (added)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeAsmBackend.cpp Wed Oct 20 22:09:55 2010
@@ -0,0 +1,152 @@
+//===-- MBlazeAsmBackend.cpp - MBlaze Assembler Backend -------------------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/Target/TargetAsmBackend.h"
+#include "MBlaze.h"
+#include "MBlazeFixupKinds.h"
+#include "llvm/ADT/Twine.h"
+#include "llvm/MC/ELFObjectWriter.h"
+#include "llvm/MC/MCAssembler.h"
+#include "llvm/MC/MCExpr.h"
+#include "llvm/MC/MCObjectFormat.h"
+#include "llvm/MC/MCObjectWriter.h"
+#include "llvm/MC/MCSectionELF.h"
+#include "llvm/MC/MCSectionMachO.h"
+#include "llvm/MC/MachObjectWriter.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
+#include "llvm/Target/TargetRegistry.h"
+#include "llvm/Target/TargetAsmBackend.h"
+using namespace llvm;
+
+static unsigned getFixupKindSize(unsigned Kind) {
+  switch (Kind) {
+  default: assert(0 && "invalid fixup kind!");
+  case FK_Data_1: return 1;
+  case MBlaze::reloc_pcrel_2byte:
+  case FK_Data_2: return 2;
+  case MBlaze::reloc_pcrel_4byte:
+  case FK_Data_4: return 4;
+  case FK_Data_8: return 8;
+  }
+}
+
+
+namespace {
+class MBlazeAsmBackend : public TargetAsmBackend {
+public:
+  MBlazeAsmBackend(const Target &T)
+    : TargetAsmBackend(T) {
+  }
+
+  bool MayNeedRelaxation(const MCInst &Inst) const;
+
+  void RelaxInstruction(const MCInst &Inst, MCInst &Res) const;
+
+  bool WriteNopData(uint64_t Count, MCObjectWriter *OW) const;
+
+  unsigned getPointerSize() const {
+    return 4;
+  }
+};
+
+bool MBlazeAsmBackend::MayNeedRelaxation(const MCInst &Inst) const {
+  return false;
+}
+
+void MBlazeAsmBackend::RelaxInstruction(const MCInst &Inst, MCInst &Res) const {
+  assert(0 && "MBlazeAsmBackend::RelaxInstruction() unimplemented");
+  return;
+}
+
+bool MBlazeAsmBackend::WriteNopData(uint64_t Count, MCObjectWriter *OW) const {
+  if ((Count % 4) != 0)
+    return false;
+
+  for (uint64_t i = 0; i < Count; i += 4 )
+      OW->Write32( 0x00000000 );
+
+  return true;
+}
+} // end anonymous namespace
+
+namespace {
+// FIXME: This should be in a separate file.
+// ELF is an ELF of course...
+class ELFMBlazeAsmBackend : public MBlazeAsmBackend {
+  MCELFObjectFormat Format;
+
+public:
+  Triple::OSType OSType;
+  ELFMBlazeAsmBackend(const Target &T, Triple::OSType _OSType)
+    : MBlazeAsmBackend(T), OSType(_OSType) {
+    HasScatteredSymbols = true;
+  }
+
+  virtual const MCObjectFormat &getObjectFormat() const {
+    return Format;
+  }
+
+
+  void ApplyFixup(const MCFixup &Fixup, MCDataFragment &DF,
+                  uint64_t Value) const;
+
+  bool isVirtualSection(const MCSection &Section) const {
+    const MCSectionELF &SE = static_cast<const MCSectionELF&>(Section);
+    return SE.getType() == MCSectionELF::SHT_NOBITS;
+  }
+
+  MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
+    return new ELFObjectWriter(OS, /*Is64Bit=*/false,
+                               OSType,
+                               /*IsLittleEndian=*/false,
+                               /*HasRelocationAddend=*/true);
+  }
+};
+
+void ELFMBlazeAsmBackend::ApplyFixup(const MCFixup &Fixup, MCDataFragment &DF,
+                                     uint64_t Value) const {
+  unsigned Size = getFixupKindSize(Fixup.getKind());
+            
+  assert(Fixup.getOffset() + Size <= DF.getContents().size() &&
+         "Invalid fixup offset!");
+
+  char *data = DF.getContents().data() + Fixup.getOffset();
+  switch (Size) {
+  default: llvm_unreachable( "Cannot fixup unknown value." );
+  case 1:  llvm_unreachable( "Cannot fixup 1 byte value." );
+  case 8:  llvm_unreachable( "Cannot fixup 8 byte value." );
+
+  case 4: 
+    *(data+7) = uint8_t(Value);
+    *(data+6) = uint8_t(Value >> 8);
+    *(data+3) = uint8_t(Value >> 16);
+    *(data+2) = uint8_t(Value >> 24);
+    break;
+
+  case 2:
+    *(data+3) = uint8_t(Value >> 0);
+    *(data+2) = uint8_t(Value >> 8);
+  }
+}
+} // end anonymous namespace
+
+TargetAsmBackend *llvm::createMBlazeAsmBackend(const Target &T,
+                                            const std::string &TT) {
+  switch (Triple(TT).getOS()) {
+  case Triple::Darwin:
+    assert(0 && "Mac not supported on MBlaze");
+  case Triple::MinGW32:
+  case Triple::Cygwin:
+  case Triple::Win32:
+    assert(0 && "Windows not supported on MBlaze");
+  default:
+    return new ELFMBlazeAsmBackend(T, Triple(TT).getOS());
+  }
+}

Added: llvm/trunk/lib/Target/MBlaze/MBlazeAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeAsmPrinter.cpp?rev=116986&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeAsmPrinter.cpp (added)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeAsmPrinter.cpp Wed Oct 20 22:09:55 2010
@@ -0,0 +1,314 @@
+//===-- MBlazeAsmPrinter.cpp - MBlaze LLVM assembly writer ----------------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file contains a printer that converts from our internal representation
+// of machine-dependent LLVM code to GAS-format MBlaze assembly language.
+//
+//===----------------------------------------------------------------------===//
+
+#define DEBUG_TYPE "mblaze-asm-printer"
+
+#include "MBlaze.h"
+#include "MBlazeSubtarget.h"
+#include "MBlazeInstrInfo.h"
+#include "MBlazeTargetMachine.h"
+#include "MBlazeMachineFunction.h"
+#include "MBlazeMCInstLower.h"
+#include "InstPrinter/MBlazeInstPrinter.h"
+#include "llvm/Constants.h"
+#include "llvm/DerivedTypes.h"
+#include "llvm/Module.h"
+#include "llvm/CodeGen/AsmPrinter.h"
+#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/MachineConstantPool.h"
+#include "llvm/CodeGen/MachineFrameInfo.h"
+#include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/MC/MCInst.h"
+#include "llvm/MC/MCStreamer.h"
+#include "llvm/MC/MCAsmInfo.h"
+#include "llvm/MC/MCSymbol.h"
+#include "llvm/Target/Mangler.h"
+#include "llvm/Target/TargetData.h"
+#include "llvm/Target/TargetLoweringObjectFile.h"
+#include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/TargetOptions.h"
+#include "llvm/Target/TargetRegistry.h"
+#include "llvm/ADT/SmallString.h"
+#include "llvm/ADT/StringExtras.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
+#include <cctype>
+
+using namespace llvm;
+
+namespace {
+  class MBlazeAsmPrinter : public AsmPrinter {
+    const MBlazeSubtarget *Subtarget;
+  public:
+    explicit MBlazeAsmPrinter(TargetMachine &TM, MCStreamer &Streamer)
+      : AsmPrinter(TM, Streamer) {
+      Subtarget = &TM.getSubtarget<MBlazeSubtarget>();
+    }
+
+    virtual const char *getPassName() const {
+      return "MBlaze Assembly Printer";
+    }
+
+    bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
+                         unsigned AsmVariant, const char *ExtraCode,
+                         raw_ostream &O);
+    void printOperand(const MachineInstr *MI, int opNum, raw_ostream &O);
+    void printUnsignedImm(const MachineInstr *MI, int opNum, raw_ostream &O);
+    void printFSLImm(const MachineInstr *MI, int opNum, raw_ostream &O);
+    void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O,
+                         const char *Modifier = 0);
+    void printSavedRegsBitmask(raw_ostream &OS);
+
+    void emitFrameDirective();
+
+    void EmitInstruction(const MachineInstr *MI); 
+    virtual void EmitFunctionBodyStart();
+    virtual void EmitFunctionBodyEnd();
+
+    virtual void EmitFunctionEntryLabel();
+  };
+} // end of anonymous namespace
+
+// #include "MBlazeGenAsmWriter.inc"
+
+//===----------------------------------------------------------------------===//
+//
+//  MBlaze Asm Directives
+//
+//  -- Frame directive "frame Stackpointer, Stacksize, RARegister"
+//  Describe the stack frame.
+//
+//  -- Mask directives "mask  bitmask, offset"
+//  Tells the assembler which registers are saved and where.
+//  bitmask - contain a little endian bitset indicating which registers are
+//            saved on function prologue (e.g. with a 0x80000000 mask, the
+//            assembler knows the register 31 (RA) is saved at prologue.
+//  offset  - the position before stack pointer subtraction indicating where
+//            the first saved register on prologue is located. (e.g. with a
+//
+//  Consider the following function prologue:
+//
+//    .frame  R19,48,R15
+//    .mask   0xc0000000,-8
+//       addiu R1, R1, -48
+//       sw R15, 40(R1)
+//       sw R19, 36(R1)
+//
+//    With a 0xc0000000 mask, the assembler knows the register 15 (R15) and
+//    19 (R19) are saved at prologue. As the save order on prologue is from
+//    left to right, R15 is saved first. A -8 offset means that after the
+//    stack pointer subtration, the first register in the mask (R15) will be
+//    saved at address 48-8=40.
+//
+//===----------------------------------------------------------------------===//
+
+//===----------------------------------------------------------------------===//
+void MBlazeAsmPrinter::EmitInstruction(const MachineInstr *MI) {
+  MBlazeMCInstLower MCInstLowering(OutContext, *Mang, *this);
+
+  MCInst TmpInst;
+  MCInstLowering.Lower(MI, TmpInst);
+  OutStreamer.EmitInstruction(TmpInst);
+}
+
+//===----------------------------------------------------------------------===//
+// Mask directives
+//===----------------------------------------------------------------------===//
+
+// Print a 32 bit hex number with all numbers.
+static void printHex32(unsigned int Value, raw_ostream &O) {
+  O << "0x";
+  for (int i = 7; i >= 0; i--)
+    O << utohexstr((Value & (0xF << (i*4))) >> (i*4));
+}
+
+
+// Create a bitmask with all callee saved registers for CPU or Floating Point
+// registers. For CPU registers consider RA, GP and FP for saving if necessary.
+void MBlazeAsmPrinter::printSavedRegsBitmask(raw_ostream &O) {
+  const TargetRegisterInfo &RI = *TM.getRegisterInfo();
+  const MBlazeFunctionInfo *MBlazeFI = MF->getInfo<MBlazeFunctionInfo>();
+
+  // CPU Saved Registers Bitmasks
+  unsigned int CPUBitmask = 0;
+
+  // Set the CPU Bitmasks
+  const MachineFrameInfo *MFI = MF->getFrameInfo();
+  const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
+  for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
+    unsigned Reg = CSI[i].getReg();
+    unsigned RegNum = MBlazeRegisterInfo::getRegisterNumbering(Reg);
+    if (MBlaze::CPURegsRegisterClass->contains(Reg))
+      CPUBitmask |= (1 << RegNum);
+  }
+
+  // Return Address and Frame registers must also be set in CPUBitmask.
+  if (RI.hasFP(*MF))
+    CPUBitmask |= (1 << MBlazeRegisterInfo::
+                getRegisterNumbering(RI.getFrameRegister(*MF)));
+
+  if (MFI->adjustsStack())
+    CPUBitmask |= (1 << MBlazeRegisterInfo::
+                getRegisterNumbering(RI.getRARegister()));
+
+  // Print CPUBitmask
+  O << "\t.mask \t"; printHex32(CPUBitmask, O);
+  O << ',' << MBlazeFI->getCPUTopSavedRegOff() << '\n';
+}
+
+//===----------------------------------------------------------------------===//
+// Frame and Set directives
+//===----------------------------------------------------------------------===//
+
+/// Frame Directive
+void MBlazeAsmPrinter::emitFrameDirective() {
+  // const TargetRegisterInfo &RI = *TM.getRegisterInfo();
+
+  // unsigned stackReg  = RI.getFrameRegister(*MF);
+  // unsigned returnReg = RI.getRARegister();
+  // unsigned stackSize = MF->getFrameInfo()->getStackSize();
+
+
+  /*
+  OutStreamer.EmitRawText("\t.frame\t" + 
+                          Twine(MBlazeInstPrinter::getRegisterName(stackReg)) +
+                          "," + Twine(stackSize) + "," +
+                          Twine(MBlazeInstPrinter::getRegisterName(returnReg)));
+  */
+}
+
+void MBlazeAsmPrinter::EmitFunctionEntryLabel() {
+  // OutStreamer.EmitRawText("\t.ent\t" + Twine(CurrentFnSym->getName()));
+  OutStreamer.EmitLabel(CurrentFnSym);
+}
+
+/// EmitFunctionBodyStart - Targets can override this to emit stuff before
+/// the first basic block in the function.
+void MBlazeAsmPrinter::EmitFunctionBodyStart() {
+  // emitFrameDirective();
+  
+  // SmallString<128> Str;
+  // raw_svector_ostream OS(Str);
+  // printSavedRegsBitmask(OS);
+  // OutStreamer.EmitRawText(OS.str());
+}
+
+/// EmitFunctionBodyEnd - Targets can override this to emit stuff after
+/// the last basic block in the function.
+void MBlazeAsmPrinter::EmitFunctionBodyEnd() {
+  // OutStreamer.EmitRawText("\t.end\t" + Twine(CurrentFnSym->getName()));
+}
+
+// Print out an operand for an inline asm expression.
+bool MBlazeAsmPrinter::
+PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
+                unsigned AsmVariant,const char *ExtraCode, raw_ostream &O) {
+  // Does this asm operand have a single letter operand modifier?
+  if (ExtraCode && ExtraCode[0])
+    return true; // Unknown modifier.
+
+  printOperand(MI, OpNo, O);
+  return false;
+}
+
+void MBlazeAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
+                                    raw_ostream &O) {
+  const MachineOperand &MO = MI->getOperand(opNum);
+
+  switch (MO.getType()) {
+  case MachineOperand::MO_Register:
+    O << MBlazeInstPrinter::getRegisterName(MO.getReg());
+    break;
+
+  case MachineOperand::MO_Immediate:
+    O << (int)MO.getImm();
+    break;
+
+  case MachineOperand::MO_FPImmediate: {
+    const ConstantFP *fp = MO.getFPImm();
+    printHex32(fp->getValueAPF().bitcastToAPInt().getZExtValue(), O);
+    O << ";\t# immediate = " << *fp;
+    break;
+  }
+
+  case MachineOperand::MO_MachineBasicBlock:
+    O << *MO.getMBB()->getSymbol();
+    return;
+
+  case MachineOperand::MO_GlobalAddress:
+    O << *Mang->getSymbol(MO.getGlobal());
+    break;
+
+  case MachineOperand::MO_ExternalSymbol:
+    O << *GetExternalSymbolSymbol(MO.getSymbolName());
+    break;
+
+  case MachineOperand::MO_JumpTableIndex:
+    O << MAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
+      << '_' << MO.getIndex();
+    break;
+
+  case MachineOperand::MO_ConstantPoolIndex:
+    O << MAI->getPrivateGlobalPrefix() << "CPI"
+      << getFunctionNumber() << "_" << MO.getIndex();
+    if (MO.getOffset())
+      O << "+" << MO.getOffset();
+    break;
+
+  default:
+    llvm_unreachable("<unknown operand type>");
+  }
+}
+
+void MBlazeAsmPrinter::printUnsignedImm(const MachineInstr *MI, int opNum,
+                                        raw_ostream &O) {
+  const MachineOperand &MO = MI->getOperand(opNum);
+  if (MO.isImm())
+    O << (unsigned int)MO.getImm();
+  else
+    printOperand(MI, opNum, O);
+}
+
+void MBlazeAsmPrinter::printFSLImm(const MachineInstr *MI, int opNum,
+                                   raw_ostream &O) {
+  const MachineOperand &MO = MI->getOperand(opNum);
+  if (MO.isImm())
+    O << "rfsl" << (unsigned int)MO.getImm();
+  else
+    printOperand(MI, opNum, O);
+}
+
+void MBlazeAsmPrinter::
+printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O,
+                const char *Modifier) {
+  printOperand(MI, opNum+1, O);
+  O << ", ";
+  printOperand(MI, opNum, O);
+}
+
+static MCInstPrinter *createMBlazeMCInstPrinter(const Target &T,
+                                                unsigned SyntaxVariant,
+                                                const MCAsmInfo &MAI) {
+  if (SyntaxVariant == 0)
+    return new MBlazeInstPrinter(MAI);
+  return 0;
+}
+
+// Force static initialization.
+extern "C" void LLVMInitializeMBlazeAsmPrinter() {
+  RegisterAsmPrinter<MBlazeAsmPrinter> X(TheMBlazeTarget);
+  TargetRegistry::RegisterMCInstPrinter(TheMBlazeTarget,
+                                        createMBlazeMCInstPrinter);
+
+}

Modified: llvm/trunk/lib/Target/MBlaze/MBlazeDelaySlotFiller.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeDelaySlotFiller.cpp?rev=116986&r1=116985&r2=116986&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeDelaySlotFiller.cpp (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeDelaySlotFiller.cpp Wed Oct 20 22:09:55 2010
@@ -19,6 +19,10 @@
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/ADT/Statistic.h"
+#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
 
 using namespace llvm;
 
@@ -51,6 +55,91 @@
   char Filler::ID = 0;
 } // end of anonymous namespace
 
+static bool hasImmInstruction( MachineBasicBlock::iterator &candidate ) {
+    // Any instruction with an immediate mode operand greater than
+    // 16-bits requires an implicit IMM instruction.
+    unsigned numOper = candidate->getNumOperands();
+    for( unsigned op = 0; op < numOper; ++op ) {
+        if( candidate->getOperand(op).isImm() &&
+            (candidate->getOperand(op).getImm() & 0xFFFFFFFFFFFF0000LL) != 0 )
+            return true;
+
+        // FIXME: we could probably check to see if the FP value happens
+        //        to not need an IMM instruction. For now we just always
+        //        assume that FP values always do.
+        if( candidate->getOperand(op).isFPImm() )
+            return true;
+    }
+
+    return false;
+}
+
+static bool delayHasHazard( MachineBasicBlock::iterator &candidate,
+                            MachineBasicBlock::iterator &slot ) {
+
+    // Loop over all of the operands in the branch instruction
+    // and make sure that none of them are defined by the
+    // candidate instruction.
+    unsigned numOper = slot->getNumOperands();
+    for( unsigned op = 0; op < numOper; ++op ) {
+        if( !slot->getOperand(op).isReg() || 
+            !slot->getOperand(op).isUse() ||
+            slot->getOperand(op).isImplicit() )
+            continue;
+
+        unsigned cnumOper = candidate->getNumOperands();
+        for( unsigned cop = 0; cop < cnumOper; ++cop ) {
+            if( candidate->getOperand(cop).isReg() &&
+                candidate->getOperand(cop).isDef() &&
+                candidate->getOperand(cop).getReg() == 
+                slot->getOperand(op).getReg() )
+                return true;
+        }
+    }
+
+    // There are no hazards between the two instructions
+    return false;
+}
+
+static bool usedBeforeDelaySlot( MachineBasicBlock::iterator &candidate,
+                                 MachineBasicBlock::iterator &slot ) {
+  MachineBasicBlock::iterator I = candidate;
+  for (++I; I != slot; ++I) {
+        unsigned numOper = I->getNumOperands();
+        for( unsigned op = 0; op < numOper; ++op ) {
+            if( I->getOperand(op).isReg() &&
+                I->getOperand(op).isUse() ) {
+                unsigned reg = I->getOperand(op).getReg();
+                unsigned cops = candidate->getNumOperands();
+                for( unsigned cop = 0; cop < cops; ++cop ) {
+                    if( candidate->getOperand(cop).isReg() &&
+                        candidate->getOperand(cop).isDef() &&
+                        candidate->getOperand(cop).getReg() == reg )
+                        return true;
+                }
+            }
+        }
+  }
+
+  return false;
+}
+
+static MachineBasicBlock::iterator
+findDelayInstr(MachineBasicBlock &MBB,MachineBasicBlock::iterator &slot) {
+  MachineBasicBlock::iterator found = MBB.end();
+  for (MachineBasicBlock::iterator I = MBB.begin(); I != slot; ++I) {
+      TargetInstrDesc desc = I->getDesc();
+      if( desc.hasDelaySlot() || desc.isBranch() || 
+          desc.mayLoad() || desc.    mayStore() || 
+          hasImmInstruction(I) || delayHasHazard(I,slot) || 
+          usedBeforeDelaySlot(I,slot)) continue;
+
+      found = I;
+  }
+
+  return found;
+}
+
 /// runOnMachineBasicBlock - Fill in delay slots for the given basic block.
 /// Currently, we fill delay slots with NOPs. We assume there is only one
 /// delay slot per delayed instruction.
@@ -59,10 +148,16 @@
   for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); ++I)
     if (I->getDesc().hasDelaySlot()) {
       MachineBasicBlock::iterator J = I;
+      MachineBasicBlock::iterator D = findDelayInstr(MBB,I);
+
       ++J;
-      BuildMI(MBB, J, I->getDebugLoc(), TII->get(MBlaze::NOP));
       ++FilledSlots;
       Changed = true;
+
+      if( D == MBB.end() )
+        BuildMI(MBB, J, I->getDebugLoc(), TII->get(MBlaze::NOP));
+      else
+        MBB.splice( J, &MBB, D );
     }
   return Changed;
 }

Added: llvm/trunk/lib/Target/MBlaze/MBlazeELFWriterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeELFWriterInfo.cpp?rev=116986&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeELFWriterInfo.cpp (added)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeELFWriterInfo.cpp Wed Oct 20 22:09:55 2010
@@ -0,0 +1,110 @@
+//===-- MBlazeELFWriterInfo.cpp - ELF Writer Info for the MBlaze backend --===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file implements ELF writer information for the MBlaze backend.
+//
+//===----------------------------------------------------------------------===//
+
+#include "MBlazeELFWriterInfo.h"
+#include "MBlazeRelocations.h"
+#include "llvm/Function.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Target/TargetData.h"
+#include "llvm/Target/TargetMachine.h"
+
+using namespace llvm;
+
+//===----------------------------------------------------------------------===//
+//  Implementation of the MBlazeELFWriterInfo class
+//===----------------------------------------------------------------------===//
+
+MBlazeELFWriterInfo::MBlazeELFWriterInfo(TargetMachine &TM)
+  : TargetELFWriterInfo(TM.getTargetData()->getPointerSizeInBits() == 64,
+                        TM.getTargetData()->isLittleEndian()) {
+}
+
+MBlazeELFWriterInfo::~MBlazeELFWriterInfo() {}
+
+unsigned MBlazeELFWriterInfo::getRelocationType(unsigned MachineRelTy) const {
+  switch(MachineRelTy) {
+  case MBlaze::reloc_pcrel_word:
+    return R_MICROBLAZE_64_PCREL;
+  case MBlaze::reloc_absolute_word:
+    return R_MICROBLAZE_NONE;
+  default:
+    llvm_unreachable("unknown mblaze machine relocation type");
+  }
+  return 0;
+}
+
+long int MBlazeELFWriterInfo::getDefaultAddendForRelTy(unsigned RelTy,
+                                                    long int Modifier) const {
+  switch(RelTy) {
+  case R_MICROBLAZE_32_PCREL:
+    return Modifier - 4;
+  case R_MICROBLAZE_32:
+    return Modifier;
+  default:
+    llvm_unreachable("unknown mblaze relocation type");
+  }
+  return 0;
+}
+
+unsigned MBlazeELFWriterInfo::getRelocationTySize(unsigned RelTy) const {
+  // FIXME: Most of these sizes are guesses based on the name
+  switch(RelTy) {
+  case R_MICROBLAZE_32:
+  case R_MICROBLAZE_32_PCREL:
+  case R_MICROBLAZE_32_PCREL_LO:
+  case R_MICROBLAZE_32_LO:
+  case R_MICROBLAZE_SRO32:
+  case R_MICROBLAZE_SRW32:
+  case R_MICROBLAZE_32_SYM_OP_SYM:
+  case R_MICROBLAZE_GOTOFF_32:
+    return 32;
+
+  case R_MICROBLAZE_64_PCREL:
+  case R_MICROBLAZE_64:
+  case R_MICROBLAZE_GOTPC_64:
+  case R_MICROBLAZE_GOT_64:
+  case R_MICROBLAZE_PLT_64:
+  case R_MICROBLAZE_GOTOFF_64:
+    return 64;
+  }
+
+  return 0;
+}
+
+bool MBlazeELFWriterInfo::isPCRelativeRel(unsigned RelTy) const {
+  // FIXME: Most of these are guesses based on the name
+  switch(RelTy) {
+  case R_MICROBLAZE_32_PCREL:
+  case R_MICROBLAZE_64_PCREL:
+  case R_MICROBLAZE_32_PCREL_LO:
+  case R_MICROBLAZE_GOTPC_64:
+    return true;
+  }
+
+  return false;
+}
+
+unsigned MBlazeELFWriterInfo::getAbsoluteLabelMachineRelTy() const {
+  return MBlaze::reloc_absolute_word;
+}
+
+long int MBlazeELFWriterInfo::computeRelocation(unsigned SymOffset,
+                                                unsigned RelOffset,
+                                                unsigned RelTy) const {
+  if (RelTy == R_MICROBLAZE_32_PCREL || R_MICROBLAZE_64_PCREL)
+    return SymOffset - (RelOffset + 4);
+  else
+    assert("computeRelocation unknown for this relocation type");
+
+  return 0;
+}

Added: llvm/trunk/lib/Target/MBlaze/MBlazeELFWriterInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeELFWriterInfo.h?rev=116986&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeELFWriterInfo.h (added)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeELFWriterInfo.h Wed Oct 20 22:09:55 2010
@@ -0,0 +1,85 @@
+//===-- MBlazeELFWriterInfo.h - ELF Writer Info for MBlaze ------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file implements ELF writer information for the MBlaze backend.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef MBLAZE_ELF_WRITER_INFO_H
+#define MBLAZE_ELF_WRITER_INFO_H
+
+#include "llvm/Target/TargetELFWriterInfo.h"
+
+namespace llvm {
+
+  class MBlazeELFWriterInfo : public TargetELFWriterInfo {
+
+    // ELF Relocation types for MBlaze
+    enum MBlazeRelocationType {
+      R_MICROBLAZE_NONE = 0,
+      R_MICROBLAZE_32 = 1,
+      R_MICROBLAZE_32_PCREL = 2,
+      R_MICROBLAZE_64_PCREL = 3,
+      R_MICROBLAZE_32_PCREL_LO = 4,
+      R_MICROBLAZE_64 = 5,
+      R_MICROBLAZE_32_LO = 6,
+      R_MICROBLAZE_SRO32 = 7,
+      R_MICROBLAZE_SRW32 = 8,
+      R_MICROBLAZE_64_NONE = 9, 
+      R_MICROBLAZE_32_SYM_OP_SYM = 10,
+      R_MICROBLAZE_GNU_VTINHERIT = 11,
+      R_MICROBLAZE_GNU_VTENTRY = 12,
+      R_MICROBLAZE_GOTPC_64 = 13,
+      R_MICROBLAZE_GOT_64 = 14,
+      R_MICROBLAZE_PLT_64 = 15,
+      R_MICROBLAZE_REL = 16,
+      R_MICROBLAZE_JUMP_SLOT = 17,
+      R_MICROBLAZE_GLOB_DAT = 18,
+      R_MICROBLAZE_GOTOFF_64 = 19,
+      R_MICROBLAZE_GOTOFF_32 = 20,
+      R_MICROBLAZE_COPY = 21
+    };
+
+  public:
+    MBlazeELFWriterInfo(TargetMachine &TM);
+    virtual ~MBlazeELFWriterInfo();
+
+    /// getRelocationType - Returns the target specific ELF Relocation type.
+    /// 'MachineRelTy' contains the object code independent relocation type
+    virtual unsigned getRelocationType(unsigned MachineRelTy) const;
+
+    /// hasRelocationAddend - True if the target uses an addend in the
+    /// ELF relocation entry.
+    virtual bool hasRelocationAddend() const { return false; }
+
+    /// getDefaultAddendForRelTy - Gets the default addend value for a
+    /// relocation entry based on the target ELF relocation type.
+    virtual long int getDefaultAddendForRelTy(unsigned RelTy,
+                                              long int Modifier = 0) const;
+
+    /// getRelTySize - Returns the size of relocatable field in bits
+    virtual unsigned getRelocationTySize(unsigned RelTy) const;
+
+    /// isPCRelativeRel - True if the relocation type is pc relative
+    virtual bool isPCRelativeRel(unsigned RelTy) const;
+
+    /// getJumpTableRelocationTy - Returns the machine relocation type used
+    /// to reference a jumptable.
+    virtual unsigned getAbsoluteLabelMachineRelTy() const;
+
+    /// computeRelocation - Some relocatable fields could be relocated
+    /// directly, avoiding the relocation symbol emission, compute the
+    /// final relocation value for this symbol.
+    virtual long int computeRelocation(unsigned SymOffset, unsigned RelOffset,
+                                       unsigned RelTy) const;
+  };
+
+} // end llvm namespace
+
+#endif // MBLAZE_ELF_WRITER_INFO_H

Added: llvm/trunk/lib/Target/MBlaze/MBlazeFixupKinds.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeFixupKinds.h?rev=116986&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeFixupKinds.h (added)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeFixupKinds.h Wed Oct 20 22:09:55 2010
@@ -0,0 +1,24 @@
+//===-- MBlaze/MBlazeFixupKinds.h - MBlaze Fixup Entries --------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_MBLAZE_MBLAZEFIXUPKINDS_H
+#define LLVM_MBLAZE_MBLAZEFIXUPKINDS_H
+
+#include "llvm/MC/MCFixup.h"
+
+namespace llvm {
+namespace MBlaze {
+enum Fixups {
+  reloc_pcrel_4byte = FirstTargetFixupKind,  // 32-bit pcrel, e.g. a brlid
+  reloc_pcrel_2byte                          // 16-bit pcrel, e.g. beqid
+};
+}
+}
+
+#endif

Modified: llvm/trunk/lib/Target/MBlaze/MBlazeISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeISelLowering.cpp?rev=116986&r1=116985&r2=116986&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeISelLowering.cpp Wed Oct 20 22:09:55 2010
@@ -421,13 +421,11 @@
   SDValue HiPart;
   // FIXME there isn't actually debug info here
   DebugLoc dl = Op.getDebugLoc();
-  bool IsPIC = getTargetMachine().getRelocationModel() == Reloc::PIC_;
-  unsigned char OpFlag = IsPIC ? MBlazeII::MO_GOT : MBlazeII::MO_ABS_HILO;
 
   EVT PtrVT = Op.getValueType();
   JumpTableSDNode *JT  = cast<JumpTableSDNode>(Op);
 
-  SDValue JTI = DAG.getTargetJumpTable(JT->getIndex(), PtrVT, OpFlag);
+  SDValue JTI = DAG.getTargetJumpTable(JT->getIndex(), PtrVT, 0 );
   return DAG.getNode(MBlazeISD::Wrap, dl, MVT::i32, JTI);
   //return JTI;
 }
@@ -440,7 +438,7 @@
   DebugLoc dl = Op.getDebugLoc();
 
   SDValue CP = DAG.getTargetConstantPool(C, MVT::i32, N->getAlignment(),
-                                         N->getOffset(), MBlazeII::MO_ABS_HILO);
+                                         N->getOffset(), 0 );
   return DAG.getNode(MBlazeISD::Wrap, dl, MVT::i32, CP);
 }
 
@@ -618,13 +616,12 @@
   // If the callee is a GlobalAddress/ExternalSymbol node (quite common, every
   // direct call is) turn it into a TargetGlobalAddress/TargetExternalSymbol
   // node so that legalize doesn't hack it.
-  unsigned char OpFlag = MBlazeII::MO_NO_FLAG;
   if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee))
     Callee = DAG.getTargetGlobalAddress(G->getGlobal(), dl,
-                                getPointerTy(), 0, OpFlag);
+                                getPointerTy(), 0, 0 );
   else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee))
     Callee = DAG.getTargetExternalSymbol(S->getSymbol(),
-                                getPointerTy(), OpFlag);
+                                getPointerTy(), 0 );
 
   // MBlazeJmpLink = #chain, #target_address, #opt_in_flags...
   //             = Chain, Callee, Reg#1, Reg#2, ...

Modified: llvm/trunk/lib/Target/MBlaze/MBlazeInstrFPU.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeInstrFPU.td?rev=116986&r1=116985&r2=116986&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeInstrFPU.td (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeInstrFPU.td Wed Oct 20 22:09:55 2010
@@ -24,9 +24,9 @@
                 [(set FGR32:$dst, (OpNode xaddr:$addr))], IILoad>;
 
 class LoadFMI<bits<6> op, string instr_asm, PatFrag OpNode> :
-              TAI<op, (outs FGR32:$dst), (ins memri:$addr),
-                  !strconcat(instr_asm, "   $dst, $addr"),
-                  [(set FGR32:$dst, (OpNode iaddr:$addr))], IILoad>;
+              TB<op, (outs FGR32:$dst), (ins memri:$addr),
+                 !strconcat(instr_asm, "   $dst, $addr"),
+                 [(set FGR32:$dst, (OpNode iaddr:$addr))], IILoad>;
 
 class StoreFM<bits<6> op, string instr_asm, PatFrag OpNode> :
               TA<op, 0x000, (outs), (ins FGR32:$dst, memrr:$addr),
@@ -34,9 +34,9 @@
                  [(OpNode FGR32:$dst, xaddr:$addr)], IIStore>;
 
 class StoreFMI<bits<6> op, string instr_asm, PatFrag OpNode> :
-               TAI<op, (outs), (ins FGR32:$dst, memrr:$addr),
-                   !strconcat(instr_asm, "   $dst, $addr"),
-                   [(OpNode FGR32:$dst, iaddr:$addr)], IIStore>;
+               TB<op, (outs), (ins FGR32:$dst, memrr:$addr),
+                  !strconcat(instr_asm, "   $dst, $addr"),
+                  [(OpNode FGR32:$dst, iaddr:$addr)], IIStore>;
 
 class ArithF<bits<6> op, bits<11> flags, string instr_asm, SDNode OpNode,
              InstrItinClass itin> :
@@ -56,35 +56,35 @@
                 !strconcat(instr_asm, "   $dst, $c, $b"),
                 [(set FGR32:$dst, (OpNode FGR32:$b, FGR32:$c))], itin>;
 
-class ArithF2<bits<6> op, bits<11> flags, string instr_asm,
-              InstrItinClass itin> :
-              TF<op, flags, (outs FGR32:$dst), (ins FGR32:$b),
-                 !strconcat(instr_asm, "   $dst, $b"),
-                 [], itin>;
-
-class ArithIF<bits<6> op, bits<11> flags, string instr_asm,
-              InstrItinClass itin> :
-              TF<op, flags, (outs FGR32:$dst), (ins CPURegs:$b),
-                 !strconcat(instr_asm, "   $dst, $b"),
-                 [], itin>;
-
-class ArithFI<bits<6> op, bits<11> flags, string instr_asm,
-              InstrItinClass itin> :
-              TF<op, flags, (outs CPURegs:$dst), (ins FGR32:$b),
-                 !strconcat(instr_asm, "   $dst, $b"),
-                 [], itin>;
-
 class LogicF<bits<6> op, string instr_asm> :
-             TAI<op, (outs FGR32:$dst), (ins FGR32:$b, FGR32:$c),
-                 !strconcat(instr_asm, "   $dst, $b, $c"),
-                 [],
-                 IIAlu>;
+             TB<op, (outs FGR32:$dst), (ins FGR32:$b, FGR32:$c),
+                !strconcat(instr_asm, "   $dst, $b, $c"),
+                [], IIAlu>;
 
 class LogicFI<bits<6> op, string instr_asm> :
-             TAI<op, (outs FGR32:$dst), (ins FGR32:$b, fimm:$c),
-                 !strconcat(instr_asm, "   $dst, $b, $c"),
-                 [],
-                 IIAlu>;
+             TB<op, (outs FGR32:$dst), (ins FGR32:$b, fimm:$c),
+                !strconcat(instr_asm, "   $dst, $b, $c"),
+                [], IIAlu>;
+
+let rb=0 in {
+  class ArithF2<bits<6> op, bits<11> flags, string instr_asm,
+                InstrItinClass itin> :
+                TA<op, flags, (outs FGR32:$dst), (ins FGR32:$b),
+                   !strconcat(instr_asm, "   $dst, $b"),
+                   [], itin>;
+
+  class ArithIF<bits<6> op, bits<11> flags, string instr_asm,
+                InstrItinClass itin> :
+                TA<op, flags, (outs FGR32:$dst), (ins CPURegs:$b),
+                   !strconcat(instr_asm, "   $dst, $b"),
+                   [], itin>;
+
+  class ArithFI<bits<6> op, bits<11> flags, string instr_asm,
+                InstrItinClass itin> :
+                TA<op, flags, (outs CPURegs:$dst), (ins FGR32:$b),
+                   !strconcat(instr_asm, "   $dst, $b"),
+                   [], itin>;
+}
 
 //===----------------------------------------------------------------------===//
 // Pseudo instructions

Modified: llvm/trunk/lib/Target/MBlaze/MBlazeInstrFSL.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeInstrFSL.td?rev=116986&r1=116985&r2=116986&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeInstrFSL.td (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeInstrFSL.td Wed Oct 20 22:09:55 2010
@@ -10,144 +10,208 @@
 //===----------------------------------------------------------------------===//
 // FSL Instruction Formats
 //===----------------------------------------------------------------------===//
-class FSLGetD<bits<6> op, bits<11> flags, string instr_asm, Intrinsic OpNode> :
-              TA<op, flags, (outs CPURegs:$dst), (ins CPURegs:$b),
-                 !strconcat(instr_asm, " $dst, $b"),
-                 [(set CPURegs:$dst, (OpNode CPURegs:$b))], IIAlu>;
-
-class FSLGet<bits<6> op, string instr_asm, Intrinsic OpNode> :
-             TAI<op, (outs CPURegs:$dst), (ins fslimm:$b),
-                 !strconcat(instr_asm, " $dst, $b"),
-                 [(set CPURegs:$dst, (OpNode immZExt4:$b))], IIAlu>;
-
-class FSLPutD<bits<6> op, bits<11> flags, string instr_asm, Intrinsic OpNode> :
-              TA<op, flags, (outs), (ins CPURegs:$v, CPURegs:$b),
-                 !strconcat(instr_asm, " $v, $b"),
-                 [(OpNode CPURegs:$v, CPURegs:$b)], IIAlu>;
-
-class FSLPut<bits<6> op, string instr_asm, Intrinsic OpNode> :
-             TAI<op, (outs), (ins CPURegs:$v, fslimm:$b),
-                 !strconcat(instr_asm, " $v, $b"),
-                 [(OpNode CPURegs:$v, immZExt4:$b)], IIAlu>;
-
-class FSLPutTD<bits<6> op, bits<11> flags, string instr_asm, Intrinsic OpNode> :
-               TA<op, flags, (outs), (ins CPURegs:$b),
-                  !strconcat(instr_asm, " $b"),
-                  [(OpNode CPURegs:$b)], IIAlu>;
-
-class FSLPutT<bits<6> op, string instr_asm, Intrinsic OpNode> :
-              TAI<op, (outs), (ins fslimm:$b),
-                  !strconcat(instr_asm, " $b"),
-                  [(OpNode immZExt4:$b)], IIAlu>;
+class FSLGet<bits<6> op, bits<5> flags, string instr_asm, Intrinsic OpNode> :
+             MBlazeInst<op, FFSL, (outs CPURegs:$dst), (ins fslimm:$b),
+                        !strconcat(instr_asm, " $dst, $b"),
+                        [(set CPURegs:$dst, (OpNode immZExt4:$b))],IIAlu>
+{
+    bits<5> rd;
+    bits<4> fslno;
+
+    let Inst{6-10}  = rd;
+    let Inst{11-15} = 0x0;
+    let Inst{16}    = 0x0;
+    let Inst{17-21} = flags; // NCTAE
+    let Inst{22-27} = 0x0;
+    let Inst{28-31} = fslno;
+}
+
+class FSLGetD<bits<6> op, bits<5> flags, string instr_asm, Intrinsic OpNode> :
+              MBlazeInst<op, FFSLD, (outs CPURegs:$dst), (ins CPURegs:$b),
+                         !strconcat(instr_asm, " $dst, $b"),
+                         [(set CPURegs:$dst, (OpNode CPURegs:$b))], IIAlu>
+{
+    bits<5> rd;
+    bits<5> rb;
+
+    let Inst{6-10}  = rd;
+    let Inst{11-15} = 0x0;
+    let Inst{16-20} = rb;
+    let Inst{21}    = 0x0;
+    let Inst{22-26} = flags; // NCTAE
+    let Inst{27-31} = 0x0;
+}
+
+class FSLPut<bits<6> op, bits<4> flags, string instr_asm, Intrinsic OpNode> :
+             MBlazeInst<op, FFSL, (outs), (ins CPURegs:$v, fslimm:$b),
+                        !strconcat(instr_asm, " $v, $b"),
+                        [(OpNode CPURegs:$v, immZExt4:$b)], IIAlu>
+{
+    bits<5> ra;
+    bits<4> fslno;
+
+    let Inst{6-10}  = 0x0;
+    let Inst{11-15} = ra;
+    let Inst{16}    = 0x1;
+    let Inst{17-20} = flags; // NCTA
+    let Inst{21-27} = 0x0;
+    let Inst{28-31} = fslno;
+}
+
+class FSLPutD<bits<6> op, bits<4> flags, string instr_asm, Intrinsic OpNode> :
+              MBlazeInst<op, FFSLD, (outs), (ins CPURegs:$v, CPURegs:$b),
+                         !strconcat(instr_asm, " $v, $b"),
+                         [(OpNode CPURegs:$v, CPURegs:$b)], IIAlu>
+{
+    bits<5> ra;
+    bits<5> rb;
+
+    let Inst{6-10}  = 0x0;
+    let Inst{11-15} = ra;
+    let Inst{16-20} = rb;
+    let Inst{21}    = 0x1;
+    let Inst{22-25} = flags; // NCTA
+    let Inst{26-31} = 0x0;
+}
+
+class FSLPutT<bits<6> op, bits<4> flags, string instr_asm, Intrinsic OpNode> :
+              MBlazeInst<op, FFSLT, (outs), (ins fslimm:$b),
+                         !strconcat(instr_asm, " $b"),
+                         [(OpNode immZExt4:$b)], IIAlu>
+{
+    bits<4> fslno;
+
+    let Inst{6-10}  = 0x0;
+    let Inst{11-15} = 0x0;
+    let Inst{16}    = 0x1;
+    let Inst{17-20} = flags; // NCTA
+    let Inst{21-27} = 0x0;
+    let Inst{28-31} = fslno;
+}
+
+class FSLPutTD<bits<6> op, bits<4> flags, string instr_asm, Intrinsic OpNode> :
+               MBlazeInst<op, FFSLTD, (outs), (ins CPURegs:$b),
+                          !strconcat(instr_asm, " $b"),
+                          [(OpNode CPURegs:$b)], IIAlu>
+{
+    bits<5> rb;
+
+    let Inst{6-10}  = 0x0;
+    let Inst{11-15} = 0x0;
+    let Inst{16-20} = rb;
+    let Inst{21}    = 0x1;
+    let Inst{22-25} = flags; // NCTA
+    let Inst{26-31} = 0x0;
+}
 
 //===----------------------------------------------------------------------===//
 // FSL Get Instructions
 //===----------------------------------------------------------------------===//
-def GET      : FSLGet<0x1B, "get      ", int_mblaze_fsl_get>;
-def AGET     : FSLGet<0x1B, "aget     ", int_mblaze_fsl_aget>;
-def CGET     : FSLGet<0x1B, "cget     ", int_mblaze_fsl_cget>;
-def CAGET    : FSLGet<0x1B, "caget    ", int_mblaze_fsl_caget>;
-def EGET     : FSLGet<0x1B, "eget     ", int_mblaze_fsl_eget>;
-def EAGET    : FSLGet<0x1B, "eaget    ", int_mblaze_fsl_eaget>;
-def ECGET    : FSLGet<0x1B, "ecget    ", int_mblaze_fsl_ecget>;
-def ECAGET   : FSLGet<0x1B, "ecaget   ", int_mblaze_fsl_ecaget>;
-def NGET     : FSLGet<0x1B, "nget     ", int_mblaze_fsl_nget>;
-def NAGET    : FSLGet<0x1B, "naget    ", int_mblaze_fsl_naget>;
-def NCGET    : FSLGet<0x1B, "ncget    ", int_mblaze_fsl_ncget>;
-def NCAGET   : FSLGet<0x1B, "ncaget   ", int_mblaze_fsl_ncaget>;
-def NEGET    : FSLGet<0x1B, "neget    ", int_mblaze_fsl_neget>;
-def NEAGET   : FSLGet<0x1B, "neaget   ", int_mblaze_fsl_neaget>;
-def NECGET   : FSLGet<0x1B, "necget   ", int_mblaze_fsl_necget>;
-def NECAGET  : FSLGet<0x1B, "necaget  ", int_mblaze_fsl_necaget>;
-def TGET     : FSLGet<0x1B, "tget     ", int_mblaze_fsl_tget>;
-def TAGET    : FSLGet<0x1B, "taget    ", int_mblaze_fsl_taget>;
-def TCGET    : FSLGet<0x1B, "tcget    ", int_mblaze_fsl_tcget>;
-def TCAGET   : FSLGet<0x1B, "tcaget   ", int_mblaze_fsl_tcaget>;
-def TEGET    : FSLGet<0x1B, "teget    ", int_mblaze_fsl_teget>;
-def TEAGET   : FSLGet<0x1B, "teaget   ", int_mblaze_fsl_teaget>;
-def TECGET   : FSLGet<0x1B, "tecget   ", int_mblaze_fsl_tecget>;
-def TECAGET  : FSLGet<0x1B, "tecaget  ", int_mblaze_fsl_tecaget>;
-def TNGET    : FSLGet<0x1B, "tnget    ", int_mblaze_fsl_tnget>;
-def TNAGET   : FSLGet<0x1B, "tnaget   ", int_mblaze_fsl_tnaget>;
-def TNCGET   : FSLGet<0x1B, "tncget   ", int_mblaze_fsl_tncget>;
-def TNCAGET  : FSLGet<0x1B, "tncaget  ", int_mblaze_fsl_tncaget>;
-def TNEGET   : FSLGet<0x1B, "tneget   ", int_mblaze_fsl_tneget>;
-def TNEAGET  : FSLGet<0x1B, "tneaget  ", int_mblaze_fsl_tneaget>;
-def TNECGET  : FSLGet<0x1B, "tnecget  ", int_mblaze_fsl_tnecget>;
-def TNECAGET : FSLGet<0x1B, "tnecaget ", int_mblaze_fsl_tnecaget>;
+def GET      : FSLGet<0x1B, 0x00, "get      ", int_mblaze_fsl_get>;
+def AGET     : FSLGet<0x1B, 0x02, "aget     ", int_mblaze_fsl_aget>;
+def CGET     : FSLGet<0x1B, 0x08, "cget     ", int_mblaze_fsl_cget>;
+def CAGET    : FSLGet<0x1B, 0x0A, "caget    ", int_mblaze_fsl_caget>;
+def EGET     : FSLGet<0x1B, 0x01, "eget     ", int_mblaze_fsl_eget>;
+def EAGET    : FSLGet<0x1B, 0x03, "eaget    ", int_mblaze_fsl_eaget>;
+def ECGET    : FSLGet<0x1B, 0x09, "ecget    ", int_mblaze_fsl_ecget>;
+def ECAGET   : FSLGet<0x1B, 0x0B, "ecaget   ", int_mblaze_fsl_ecaget>;
+def NGET     : FSLGet<0x1B, 0x10, "nget     ", int_mblaze_fsl_nget>;
+def NAGET    : FSLGet<0x1B, 0x12, "naget    ", int_mblaze_fsl_naget>;
+def NCGET    : FSLGet<0x1B, 0x18, "ncget    ", int_mblaze_fsl_ncget>;
+def NCAGET   : FSLGet<0x1B, 0x1A, "ncaget   ", int_mblaze_fsl_ncaget>;
+def NEGET    : FSLGet<0x1B, 0x11, "neget    ", int_mblaze_fsl_neget>;
+def NEAGET   : FSLGet<0x1B, 0x13, "neaget   ", int_mblaze_fsl_neaget>;
+def NECGET   : FSLGet<0x1B, 0x19, "necget   ", int_mblaze_fsl_necget>;
+def NECAGET  : FSLGet<0x1B, 0x1B, "necaget  ", int_mblaze_fsl_necaget>;
+def TGET     : FSLGet<0x1B, 0x04, "tget     ", int_mblaze_fsl_tget>;
+def TAGET    : FSLGet<0x1B, 0x06, "taget    ", int_mblaze_fsl_taget>;
+def TCGET    : FSLGet<0x1B, 0x0C, "tcget    ", int_mblaze_fsl_tcget>;
+def TCAGET   : FSLGet<0x1B, 0x0E, "tcaget   ", int_mblaze_fsl_tcaget>;
+def TEGET    : FSLGet<0x1B, 0x05, "teget    ", int_mblaze_fsl_teget>;
+def TEAGET   : FSLGet<0x1B, 0x07, "teaget   ", int_mblaze_fsl_teaget>;
+def TECGET   : FSLGet<0x1B, 0x0D, "tecget   ", int_mblaze_fsl_tecget>;
+def TECAGET  : FSLGet<0x1B, 0x0F, "tecaget  ", int_mblaze_fsl_tecaget>;
+def TNGET    : FSLGet<0x1B, 0x14, "tnget    ", int_mblaze_fsl_tnget>;
+def TNAGET   : FSLGet<0x1B, 0x16, "tnaget   ", int_mblaze_fsl_tnaget>;
+def TNCGET   : FSLGet<0x1B, 0x1C, "tncget   ", int_mblaze_fsl_tncget>;
+def TNCAGET  : FSLGet<0x1B, 0x1E, "tncaget  ", int_mblaze_fsl_tncaget>;
+def TNEGET   : FSLGet<0x1B, 0x15, "tneget   ", int_mblaze_fsl_tneget>;
+def TNEAGET  : FSLGet<0x1B, 0x17, "tneaget  ", int_mblaze_fsl_tneaget>;
+def TNECGET  : FSLGet<0x1B, 0x1D, "tnecget  ", int_mblaze_fsl_tnecget>;
+def TNECAGET : FSLGet<0x1B, 0x1F, "tnecaget ", int_mblaze_fsl_tnecaget>;
 
 //===----------------------------------------------------------------------===//
 // FSL Dynamic Get Instructions
 //===----------------------------------------------------------------------===//
-def GETD      : FSLGetD<0x1B, 0x00, "getd     ", int_mblaze_fsl_get>;
-def AGETD     : FSLGetD<0x1B, 0x00, "agetd    ", int_mblaze_fsl_aget>;
-def CGETD     : FSLGetD<0x1B, 0x00, "cgetd    ", int_mblaze_fsl_cget>;
-def CAGETD    : FSLGetD<0x1B, 0x00, "cagetd   ", int_mblaze_fsl_caget>;
-def EGETD     : FSLGetD<0x1B, 0x00, "egetd    ", int_mblaze_fsl_eget>;
-def EAGETD    : FSLGetD<0x1B, 0x00, "eagetd   ", int_mblaze_fsl_eaget>;
-def ECGETD    : FSLGetD<0x1B, 0x00, "ecgetd   ", int_mblaze_fsl_ecget>;
-def ECAGETD   : FSLGetD<0x1B, 0x00, "ecagetd  ", int_mblaze_fsl_ecaget>;
-def NGETD     : FSLGetD<0x1B, 0x00, "ngetd    ", int_mblaze_fsl_nget>;
-def NAGETD    : FSLGetD<0x1B, 0x00, "nagetd   ", int_mblaze_fsl_naget>;
-def NCGETD    : FSLGetD<0x1B, 0x00, "ncgetd   ", int_mblaze_fsl_ncget>;
-def NCAGETD   : FSLGetD<0x1B, 0x00, "ncagetd  ", int_mblaze_fsl_ncaget>;
-def NEGETD    : FSLGetD<0x1B, 0x00, "negetd   ", int_mblaze_fsl_neget>;
-def NEAGETD   : FSLGetD<0x1B, 0x00, "neagetd  ", int_mblaze_fsl_neaget>;
-def NECGETD   : FSLGetD<0x1B, 0x00, "necgetd  ", int_mblaze_fsl_necget>;
-def NECAGETD  : FSLGetD<0x1B, 0x00, "necagetd ", int_mblaze_fsl_necaget>;
-def TGETD     : FSLGetD<0x1B, 0x00, "tgetd    ", int_mblaze_fsl_tget>;
-def TAGETD    : FSLGetD<0x1B, 0x00, "tagetd   ", int_mblaze_fsl_taget>;
-def TCGETD    : FSLGetD<0x1B, 0x00, "tcgetd   ", int_mblaze_fsl_tcget>;
-def TCAGETD   : FSLGetD<0x1B, 0x00, "tcagetd  ", int_mblaze_fsl_tcaget>;
-def TEGETD    : FSLGetD<0x1B, 0x00, "tegetd   ", int_mblaze_fsl_teget>;
-def TEAGETD   : FSLGetD<0x1B, 0x00, "teagetd  ", int_mblaze_fsl_teaget>;
-def TECGETD   : FSLGetD<0x1B, 0x00, "tecgetd  ", int_mblaze_fsl_tecget>;
-def TECAGETD  : FSLGetD<0x1B, 0x00, "tecagetd ", int_mblaze_fsl_tecaget>;
-def TNGETD    : FSLGetD<0x1B, 0x00, "tngetd   ", int_mblaze_fsl_tnget>;
-def TNAGETD   : FSLGetD<0x1B, 0x00, "tnagetd  ", int_mblaze_fsl_tnaget>;
-def TNCGETD   : FSLGetD<0x1B, 0x00, "tncgetd  ", int_mblaze_fsl_tncget>;
-def TNCAGETD  : FSLGetD<0x1B, 0x00, "tncagetd ", int_mblaze_fsl_tncaget>;
-def TNEGETD   : FSLGetD<0x1B, 0x00, "tnegetd  ", int_mblaze_fsl_tneget>;
-def TNEAGETD  : FSLGetD<0x1B, 0x00, "tneagetd ", int_mblaze_fsl_tneaget>;
-def TNECGETD  : FSLGetD<0x1B, 0x00, "tnecgetd ", int_mblaze_fsl_tnecget>;
-def TNECAGETD : FSLGetD<0x1B, 0x00, "tnecagetd", int_mblaze_fsl_tnecaget>;
+def GETD      : FSLGetD<0x13, 0x00, "getd     ", int_mblaze_fsl_get>;
+def AGETD     : FSLGetD<0x13, 0x02, "agetd    ", int_mblaze_fsl_aget>;
+def CGETD     : FSLGetD<0x13, 0x08, "cgetd    ", int_mblaze_fsl_cget>;
+def CAGETD    : FSLGetD<0x13, 0x0A, "cagetd   ", int_mblaze_fsl_caget>;
+def EGETD     : FSLGetD<0x13, 0x01, "egetd    ", int_mblaze_fsl_eget>;
+def EAGETD    : FSLGetD<0x13, 0x03, "eagetd   ", int_mblaze_fsl_eaget>;
+def ECGETD    : FSLGetD<0x13, 0x09, "ecgetd   ", int_mblaze_fsl_ecget>;
+def ECAGETD   : FSLGetD<0x13, 0x0B, "ecagetd  ", int_mblaze_fsl_ecaget>;
+def NGETD     : FSLGetD<0x13, 0x10, "ngetd    ", int_mblaze_fsl_nget>;
+def NAGETD    : FSLGetD<0x13, 0x12, "nagetd   ", int_mblaze_fsl_naget>;
+def NCGETD    : FSLGetD<0x13, 0x18, "ncgetd   ", int_mblaze_fsl_ncget>;
+def NCAGETD   : FSLGetD<0x13, 0x1A, "ncagetd  ", int_mblaze_fsl_ncaget>;
+def NEGETD    : FSLGetD<0x13, 0x11, "negetd   ", int_mblaze_fsl_neget>;
+def NEAGETD   : FSLGetD<0x13, 0x13, "neagetd  ", int_mblaze_fsl_neaget>;
+def NECGETD   : FSLGetD<0x13, 0x19, "necgetd  ", int_mblaze_fsl_necget>;
+def NECAGETD  : FSLGetD<0x13, 0x1B, "necagetd ", int_mblaze_fsl_necaget>;
+def TGETD     : FSLGetD<0x13, 0x04, "tgetd    ", int_mblaze_fsl_tget>;
+def TAGETD    : FSLGetD<0x13, 0x06, "tagetd   ", int_mblaze_fsl_taget>;
+def TCGETD    : FSLGetD<0x13, 0x0C, "tcgetd   ", int_mblaze_fsl_tcget>;
+def TCAGETD   : FSLGetD<0x13, 0x0E, "tcagetd  ", int_mblaze_fsl_tcaget>;
+def TEGETD    : FSLGetD<0x13, 0x05, "tegetd   ", int_mblaze_fsl_teget>;
+def TEAGETD   : FSLGetD<0x13, 0x07, "teagetd  ", int_mblaze_fsl_teaget>;
+def TECGETD   : FSLGetD<0x13, 0x0D, "tecgetd  ", int_mblaze_fsl_tecget>;
+def TECAGETD  : FSLGetD<0x13, 0x0F, "tecagetd ", int_mblaze_fsl_tecaget>;
+def TNGETD    : FSLGetD<0x13, 0x14, "tngetd   ", int_mblaze_fsl_tnget>;
+def TNAGETD   : FSLGetD<0x13, 0x16, "tnagetd  ", int_mblaze_fsl_tnaget>;
+def TNCGETD   : FSLGetD<0x13, 0x1C, "tncgetd  ", int_mblaze_fsl_tncget>;
+def TNCAGETD  : FSLGetD<0x13, 0x1E, "tncagetd ", int_mblaze_fsl_tncaget>;
+def TNEGETD   : FSLGetD<0x13, 0x15, "tnegetd  ", int_mblaze_fsl_tneget>;
+def TNEAGETD  : FSLGetD<0x13, 0x17, "tneagetd ", int_mblaze_fsl_tneaget>;
+def TNECGETD  : FSLGetD<0x13, 0x1D, "tnecgetd ", int_mblaze_fsl_tnecget>;
+def TNECAGETD : FSLGetD<0x13, 0x1F, "tnecagetd", int_mblaze_fsl_tnecaget>;
 
 //===----------------------------------------------------------------------===//
 // FSL Put Instructions
 //===----------------------------------------------------------------------===//
-def PUT     :  FSLPut<0x1B, "put      ", int_mblaze_fsl_put>;
-def APUT    :  FSLPut<0x1B, "aput     ", int_mblaze_fsl_aput>;
-def CPUT    :  FSLPut<0x1B, "cput     ", int_mblaze_fsl_cput>;
-def CAPUT   :  FSLPut<0x1B, "caput    ", int_mblaze_fsl_caput>;
-def NPUT    :  FSLPut<0x1B, "nput     ", int_mblaze_fsl_nput>;
-def NAPUT   :  FSLPut<0x1B, "naput    ", int_mblaze_fsl_naput>;
-def NCPUT   :  FSLPut<0x1B, "ncput    ", int_mblaze_fsl_ncput>;
-def NCAPUT  :  FSLPut<0x1B, "ncaput   ", int_mblaze_fsl_ncaput>;
-def TPUT    : FSLPutT<0x1B, "tput     ", int_mblaze_fsl_tput>;
-def TAPUT   : FSLPutT<0x1B, "taput    ", int_mblaze_fsl_taput>;
-def TCPUT   : FSLPutT<0x1B, "tcput    ", int_mblaze_fsl_tcput>;
-def TCAPUT  : FSLPutT<0x1B, "tcaput   ", int_mblaze_fsl_tcaput>;
-def TNPUT   : FSLPutT<0x1B, "tnput    ", int_mblaze_fsl_tnput>;
-def TNAPUT  : FSLPutT<0x1B, "tnaput   ", int_mblaze_fsl_tnaput>;
-def TNCPUT  : FSLPutT<0x1B, "tncput   ", int_mblaze_fsl_tncput>;
-def TNCAPUT : FSLPutT<0x1B, "tncaput  ", int_mblaze_fsl_tncaput>;
+def PUT     :  FSLPut<0x1B, 0x0, "put      ", int_mblaze_fsl_put>;
+def APUT    :  FSLPut<0x1B, 0x1, "aput     ", int_mblaze_fsl_aput>;
+def CPUT    :  FSLPut<0x1B, 0x4, "cput     ", int_mblaze_fsl_cput>;
+def CAPUT   :  FSLPut<0x1B, 0x5, "caput    ", int_mblaze_fsl_caput>;
+def NPUT    :  FSLPut<0x1B, 0x8, "nput     ", int_mblaze_fsl_nput>;
+def NAPUT   :  FSLPut<0x1B, 0x9, "naput    ", int_mblaze_fsl_naput>;
+def NCPUT   :  FSLPut<0x1B, 0xC, "ncput    ", int_mblaze_fsl_ncput>;
+def NCAPUT  :  FSLPut<0x1B, 0xD, "ncaput   ", int_mblaze_fsl_ncaput>;
+def TPUT    : FSLPutT<0x1B, 0x2, "tput     ", int_mblaze_fsl_tput>;
+def TAPUT   : FSLPutT<0x1B, 0x3, "taput    ", int_mblaze_fsl_taput>;
+def TCPUT   : FSLPutT<0x1B, 0x6, "tcput    ", int_mblaze_fsl_tcput>;
+def TCAPUT  : FSLPutT<0x1B, 0x7, "tcaput   ", int_mblaze_fsl_tcaput>;
+def TNPUT   : FSLPutT<0x1B, 0xA, "tnput    ", int_mblaze_fsl_tnput>;
+def TNAPUT  : FSLPutT<0x1B, 0xB, "tnaput   ", int_mblaze_fsl_tnaput>;
+def TNCPUT  : FSLPutT<0x1B, 0xE, "tncput   ", int_mblaze_fsl_tncput>;
+def TNCAPUT : FSLPutT<0x1B, 0xF, "tncaput  ", int_mblaze_fsl_tncaput>;
 
 //===----------------------------------------------------------------------===//
 // FSL Dynamic Put Instructions
 //===----------------------------------------------------------------------===//
-def PUTD     :  FSLPutD<0x1B, 0x00, "putd     ", int_mblaze_fsl_put>;
-def APUTD    :  FSLPutD<0x1B, 0x00, "aputd    ", int_mblaze_fsl_aput>;
-def CPUTD    :  FSLPutD<0x1B, 0x00, "cputd    ", int_mblaze_fsl_cput>;
-def CAPUTD   :  FSLPutD<0x1B, 0x00, "caputd   ", int_mblaze_fsl_caput>;
-def NPUTD    :  FSLPutD<0x1B, 0x00, "nputd    ", int_mblaze_fsl_nput>;
-def NAPUTD   :  FSLPutD<0x1B, 0x00, "naputd   ", int_mblaze_fsl_naput>;
-def NCPUTD   :  FSLPutD<0x1B, 0x00, "ncputd   ", int_mblaze_fsl_ncput>;
-def NCAPUTD  :  FSLPutD<0x1B, 0x00, "ncaputd  ", int_mblaze_fsl_ncaput>;
-def TPUTD    : FSLPutTD<0x1B, 0x00, "tputd    ", int_mblaze_fsl_tput>;
-def TAPUTD   : FSLPutTD<0x1B, 0x00, "taputd   ", int_mblaze_fsl_taput>;
-def TCPUTD   : FSLPutTD<0x1B, 0x00, "tcputd   ", int_mblaze_fsl_tcput>;
-def TCAPUTD  : FSLPutTD<0x1B, 0x00, "tcaputd  ", int_mblaze_fsl_tcaput>;
-def TNPUTD   : FSLPutTD<0x1B, 0x00, "tnputd   ", int_mblaze_fsl_tnput>;
-def TNAPUTD  : FSLPutTD<0x1B, 0x00, "tnaputd  ", int_mblaze_fsl_tnaput>;
-def TNCPUTD  : FSLPutTD<0x1B, 0x00, "tncputd  ", int_mblaze_fsl_tncput>;
-def TNCAPUTD : FSLPutTD<0x1B, 0x00, "tncaputd ", int_mblaze_fsl_tncaput>;
+def PUTD     :  FSLPutD<0x13, 0x0, "putd     ", int_mblaze_fsl_put>;
+def APUTD    :  FSLPutD<0x13, 0x1, "aputd    ", int_mblaze_fsl_aput>;
+def CPUTD    :  FSLPutD<0x13, 0x4, "cputd    ", int_mblaze_fsl_cput>;
+def CAPUTD   :  FSLPutD<0x13, 0x5, "caputd   ", int_mblaze_fsl_caput>;
+def NPUTD    :  FSLPutD<0x13, 0x8, "nputd    ", int_mblaze_fsl_nput>;
+def NAPUTD   :  FSLPutD<0x13, 0x9, "naputd   ", int_mblaze_fsl_naput>;
+def NCPUTD   :  FSLPutD<0x13, 0xC, "ncputd   ", int_mblaze_fsl_ncput>;
+def NCAPUTD  :  FSLPutD<0x13, 0xD, "ncaputd  ", int_mblaze_fsl_ncaput>;
+def TPUTD    : FSLPutTD<0x13, 0x2, "tputd    ", int_mblaze_fsl_tput>;
+def TAPUTD   : FSLPutTD<0x13, 0x3, "taputd   ", int_mblaze_fsl_taput>;
+def TCPUTD   : FSLPutTD<0x13, 0x6, "tcputd   ", int_mblaze_fsl_tcput>;
+def TCAPUTD  : FSLPutTD<0x13, 0x7, "tcaputd  ", int_mblaze_fsl_tcaput>;
+def TNPUTD   : FSLPutTD<0x13, 0xA, "tnputd   ", int_mblaze_fsl_tnput>;
+def TNAPUTD  : FSLPutTD<0x13, 0xB, "tnaputd  ", int_mblaze_fsl_tnaput>;
+def TNCPUTD  : FSLPutTD<0x13, 0xE, "tncputd  ", int_mblaze_fsl_tncput>;
+def TNCAPUTD : FSLPutTD<0x13, 0xF, "tncaputd ", int_mblaze_fsl_tncaput>;

Modified: llvm/trunk/lib/Target/MBlaze/MBlazeInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeInstrFormats.td?rev=116986&r1=116985&r2=116986&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeInstrFormats.td (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeInstrFormats.td Wed Oct 20 22:09:55 2010
@@ -7,6 +7,26 @@
 //
 //===----------------------------------------------------------------------===//
 
+// Format specifies the encoding used by the instruction.  This is part of the
+// ad-hoc solution used to emit machine instruction encodings by our machine
+// code emitter.
+class Format<bits<6> val> {
+      bits<6> Value = val;
+}
+
+def FPseudo : Format<0>;
+def FRRR    : Format<1>;
+def FRRI    : Format<2>;
+def FRIR    : Format<3>;
+def FFSL    : Format<4>;
+def FFSLD   : Format<5>;
+def FFSLT   : Format<6>;
+def FFSLTD  : Format<7>;
+def FR      : Format<8>;
+def FI      : Format<9>;
+def FRR     : Format<10>;
+def FRI     : Format<11>;
+
 //===----------------------------------------------------------------------===//
 //  Describe MBlaze instructions format
 //
@@ -21,14 +41,15 @@
 //===----------------------------------------------------------------------===//
 
 // Generic MBlaze Format
-class MBlazeInst<dag outs, dag ins, string asmstr, list<dag> pattern, 
-               InstrItinClass itin> : Instruction 
+class MBlazeInst<bits<6> op, Format form, dag outs, dag ins, string asmstr, 
+                 list<dag> pattern, InstrItinClass itin> : Instruction 
 {
-  field bits<32> Inst;
-
   let Namespace = "MBlaze";
+  field bits<32> Inst;
 
-  bits<6> opcode;
+  bits<6> opcode = op;
+  Format Form = form;
+  bits<6> FormBits = Form.Value;
 
   // Top 6 bits are the 'opcode' field
   let Inst{0-5} = opcode;   
@@ -39,13 +60,16 @@
   let AsmString   = asmstr;
   let Pattern     = pattern;
   let Itinerary   = itin;
+
+  // TSFlags layout should be kept in sync with MBlazeInstrInfo.h.
+  let TSFlags{5-0}   = FormBits;
 }
 
 //===----------------------------------------------------------------------===//
 // Pseudo instruction class
 //===----------------------------------------------------------------------===//
 class MBlazePseudo<dag outs, dag ins, string asmstr, list<dag> pattern>:
-      MBlazeInst<outs, ins, asmstr, pattern, IIPseudo>;
+      MBlazeInst<0x0, FPseudo, outs, ins, asmstr, pattern, IIPseudo>;
 
 //===----------------------------------------------------------------------===//
 // Type A instruction class in MBlaze : <|opcode|rd|ra|rb|flags|>
@@ -53,194 +77,49 @@
 
 class TA<bits<6> op, bits<11> flags, dag outs, dag ins, string asmstr,
          list<dag> pattern, InstrItinClass itin> : 
-         MBlazeInst<outs, ins, asmstr, pattern, itin> 
+         MBlazeInst<op,FRRR,outs, ins, asmstr, pattern, itin> 
 {
   bits<5> rd;
   bits<5> ra;
   bits<5> rb;
 
-  let opcode = op;
-
   let Inst{6-10}  = rd;
   let Inst{11-15} = ra; 
   let Inst{16-20} = rb;
   let Inst{21-31} = flags;
 }
 
-class TAI<bits<6> op, dag outs, dag ins, string asmstr,
-          list<dag> pattern, InstrItinClass itin> :
-          MBlazeInst<outs, ins, asmstr, pattern, itin>
-{
-  bits<5> rd;
-  bits<5> ra;
-  bits<16> imm16;
-
-  let opcode = op;
-
-  let Inst{6-10}  = rd;
-  let Inst{11-15} = ra; 
-  let Inst{16-31} = imm16;
-}
-
-class TIMM<bits<6> op, dag outs, dag ins, string asmstr,
-           list<dag> pattern, InstrItinClass itin> :
-           MBlazeInst<outs, ins, asmstr, pattern, itin>
-{
-  bits<5> ra;
-  bits<16> imm16;
-
-  let opcode = op;
-
-  let Inst{6-15}  = 0;
-  let Inst{16-31} = imm16;
-}
-
-class TADDR<bits<6> op, dag outs, dag ins, string asmstr,
-            list<dag> pattern, InstrItinClass itin> :
-            MBlazeInst<outs, ins, asmstr, pattern, itin>
-{
-  bits<26> addr;
-
-  let opcode = op;
-
-  let Inst{6-31} = addr;
-}
-
 //===----------------------------------------------------------------------===//
 // Type B instruction class in MBlaze : <|opcode|rd|ra|immediate|>
 //===----------------------------------------------------------------------===//
 
 class TB<bits<6> op, dag outs, dag ins, string asmstr, list<dag> pattern,
          InstrItinClass itin> : 
-         MBlazeInst<outs, ins, asmstr, pattern, itin> 
+         MBlazeInst<op, FRRI, outs, ins, asmstr, pattern, itin> 
 {
   bits<5>  rd;
   bits<5>  ra;
   bits<16> imm16;
 
-  let opcode = op;
-
   let Inst{6-10}  = rd;
   let Inst{11-15} = ra; 
   let Inst{16-31} = imm16;
 }
 
 //===----------------------------------------------------------------------===//
-// Float instruction class in MBlaze : <|opcode|rd|ra|flags|>
+// Type B instruction class in MBlaze but with the operands reversed in
+// the LLVM DAG : <|opcode|rd|ra|immediate|>
 //===----------------------------------------------------------------------===//
-
-class TF<bits<6> op, bits<11> flags, dag outs, dag ins, string asmstr,
-         list<dag> pattern, InstrItinClass itin> : 
-         MBlazeInst<outs, ins, asmstr, pattern, itin> 
-{
-  bits<5>  rd;
-  bits<5>  ra;
-
-  let opcode = op;
-
-  let Inst{6-10}  = rd;
-  let Inst{11-15} = ra; 
-  let Inst{16-20} = 0;
-  let Inst{21-31} = flags;
-}
-
-//===----------------------------------------------------------------------===//
-// Branch instruction class in MBlaze : <|opcode|rd|br|ra|flags|>
-//===----------------------------------------------------------------------===//
-
-class TBR<bits<6> op, bits<5> br, bits<11> flags, dag outs, dag ins,
-          string asmstr, list<dag> pattern, InstrItinClass itin> :
-          MBlazeInst<outs, ins, asmstr, pattern, itin>
-{
-  bits<5> ra;
-
-  let opcode = op;
-
-  let Inst{6-10}  = 0;
-  let Inst{11-15} = br; 
-  let Inst{16-20} = ra;
-  let Inst{21-31} = flags;
-}
-
-class TBRC<bits<6> op, bits<5> br, bits<11> flags, dag outs, dag ins,
-           string asmstr, list<dag> pattern, InstrItinClass itin> :
-           MBlazeInst<outs, ins, asmstr, pattern, itin>
-{
-  bits<5> ra;
-  bits<5> rb;
-
-  let opcode = op;
-
-  let Inst{6-10}  = br;
-  let Inst{11-15} = ra; 
-  let Inst{16-20} = rb;
-  let Inst{21-31} = flags;
-}
-
-class TBRL<bits<6> op, bits<5> br, bits<11> flags, dag outs, dag ins,
-           string asmstr, list<dag> pattern, InstrItinClass itin> :
-           MBlazeInst<outs, ins, asmstr, pattern, itin>
-{
-  bits<5> ra;
-
-  let opcode = op;
-
-  let Inst{6-10}  = 0xF;
-  let Inst{11-15} = br; 
-  let Inst{16-20} = ra;
-  let Inst{21-31} = flags;
-}
-
-class TBRI<bits<6> op, bits<5> br, dag outs, dag ins,
-           string asmstr, list<dag> pattern, InstrItinClass itin> :
-           MBlazeInst<outs, ins, asmstr, pattern, itin>
-{
-  bits<16> imm16;
-
-  let opcode = op;
-
-  let Inst{6-10}  = 0;
-  let Inst{11-15} = br; 
-  let Inst{16-31} = imm16;
-}
-
-class TBRLI<bits<6> op, bits<5> br, dag outs, dag ins,
-            string asmstr, list<dag> pattern, InstrItinClass itin> :
-            MBlazeInst<outs, ins, asmstr, pattern, itin>
-{
-  bits<16> imm16;
-
-  let opcode = op;
-
-  let Inst{6-10}  = 0xF;
-  let Inst{11-15} = br; 
-  let Inst{16-31} = imm16;
-}
-
-class TBRCI<bits<6> op, bits<5> br, dag outs, dag ins,
-            string asmstr, list<dag> pattern, InstrItinClass itin> :
-            MBlazeInst<outs, ins, asmstr, pattern, itin>
-{
-  bits<5> ra;
-  bits<16> imm16;
-
-  let opcode = op;
-
-  let Inst{6-10}  = br;
-  let Inst{11-15} = ra; 
-  let Inst{16-31} = imm16;
-}
-
-class TRET<bits<6> op, dag outs, dag ins,
-            string asmstr, list<dag> pattern, InstrItinClass itin> :
-            MBlazeInst<outs, ins, asmstr, pattern, itin>
-{
-  bits<5>  ra;
-  bits<16> imm16;
-
-  let opcode = op;
-
-  let Inst{6-10}  = 0x10;
-  let Inst{11-15} = ra; 
-  let Inst{16-31} = imm16;
+class TBR<bits<6> op, dag outs, dag ins, string asmstr, list<dag> pattern,
+         InstrItinClass itin> : 
+         TB<op, outs, ins, asmstr, pattern, itin> {
+  bits<5>  rrd;
+  bits<16> rimm16;
+  bits<5>  rra;
+
+  let Form = FRIR;
+
+  let rd = rrd;
+  let ra = rra;
+  let imm16 = rimm16;
 }

Modified: llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.h?rev=116986&r1=116985&r2=116986&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.h (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.h Wed Oct 20 22:09:55 2010
@@ -134,29 +134,47 @@
 /// instruction info tracks.
 ///
 namespace MBlazeII {
-  /// Target Operand Flag enum.
-  enum TOF {
+  enum {
+    // PseudoFrm - This represents an instruction that is a pseudo instruction
+    // or one that has not been implemented yet.  It is illegal to code generate
+    // it, but tolerated for intermediate implementation stages.
+    Pseudo         = 0,
+
+    RegRegReg      = 1,
+    RegRegImm      = 2,
+    RegImmReg      = 3,
+    FSL            = 4,
+    FSLD           = 5,
+    FSLT           = 6,
+    FSLTD          = 7,
+    Reg            = 8,
+    Imm            = 9,
+    RegReg         = 10,
+    RegImm         = 11,
+
+    FormMask       = 63
+
     //===------------------------------------------------------------------===//
     // MBlaze Specific MachineOperand flags.
-    MO_NO_FLAG,
+    // MO_NO_FLAG,
 
     /// MO_GOT - Represents the offset into the global offset table at which
     /// the address the relocation entry symbol resides during execution.
-    MO_GOT,
+    // MO_GOT,
 
     /// MO_GOT_CALL - Represents the offset into the global offset table at
     /// which the address of a call site relocation entry symbol resides
     /// during execution. This is different from the above since this flag
     /// can only be present in call instructions.
-    MO_GOT_CALL,
+    // MO_GOT_CALL,
 
     /// MO_GPREL - Represents the offset from the current gp value to be used
     /// for the relocatable object file being produced.
-    MO_GPREL,
+    // MO_GPREL,
 
     /// MO_ABS_HILO - Represents the hi or low part of an absolute symbol
     /// address.
-    MO_ABS_HILO
+    // MO_ABS_HILO
 
   };
 }

Modified: llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.td?rev=116986&r1=116985&r2=116986&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.td (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.td Wed Oct 20 22:09:55 2010
@@ -13,36 +13,33 @@
 include "MBlazeInstrFormats.td"
 
 //===----------------------------------------------------------------------===//
-// MBlaze profiles and nodes
+// MBlaze type profiles
 //===----------------------------------------------------------------------===//
+
+// def SDTMBlazeSelectCC : SDTypeProfile<1, 3, [SDTCisSameAs<0, 1>]>;
 def SDT_MBlazeRet     : SDTypeProfile<0, 1, [SDTCisInt<0>]>;
 def SDT_MBlazeJmpLink : SDTypeProfile<0, 1, [SDTCisVT<0, i32>]>;
+def SDT_MBCallSeqStart : SDCallSeqStart<[SDTCisVT<0, i32>]>;
+def SDT_MBCallSeqEnd   : SDCallSeqEnd<[SDTCisVT<0, i32>, SDTCisVT<1, i32>]>;
 
-// Call
-def MBlazeJmpLink : SDNode<"MBlazeISD::JmpLink",SDT_MBlazeJmpLink,
-                               [SDNPHasChain,SDNPOptInFlag,SDNPOutFlag]>;
+//===----------------------------------------------------------------------===//
+// MBlaze specific nodes
+//===----------------------------------------------------------------------===//
 
-// Return
-def MBlazeRet : SDNode<"MBlazeISD::Ret", SDT_MBlazeRet,
+def MBlazeRet     : SDNode<"MBlazeISD::Ret", SDT_MBlazeRet,
                            [SDNPHasChain, SDNPOptInFlag]>;
 
-// Hi and Lo nodes are used to handle global addresses. Used on 
-// MBlazeISelLowering to lower stuff like GlobalAddress, ExternalSymbol 
-// static model.
-def MBWrapper   : SDNode<"MBlazeISD::Wrap", SDTIntUnaryOp>;
-def MBlazeGPRel : SDNode<"MBlazeISD::GPRel", SDTIntUnaryOp>;
+def MBlazeJmpLink : SDNode<"MBlazeISD::JmpLink",SDT_MBlazeJmpLink,
+                           [SDNPHasChain,SDNPOptInFlag,SDNPOutFlag]>;
 
-def SDT_MBCallSeqStart : SDCallSeqStart<[SDTCisVT<0, i32>]>;
-def SDT_MBCallSeqEnd   : SDCallSeqEnd<[SDTCisVT<0, i32>, SDTCisVT<1, i32>]>;
+def MBWrapper   : SDNode<"MBlazeISD::Wrap", SDTIntUnaryOp>;
 
-// These are target-independent nodes, but have target-specific formats.
 def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_MBCallSeqStart,
                            [SDNPHasChain, SDNPOutFlag]>;
+
 def callseq_end   : SDNode<"ISD::CALLSEQ_END", SDT_MBCallSeqEnd,
                            [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>;
 
-def SDTMBlazeSelectCC : SDTypeProfile<1, 3, [SDTCisSameAs<0, 1>]>;
-
 //===----------------------------------------------------------------------===//
 // MBlaze Instruction Predicate Definitions.
 //===----------------------------------------------------------------------===//
@@ -95,18 +92,7 @@
   let MIOperandInfo = (ops CPURegs, CPURegs);
 }
 
-// Transformation Function - get the lower 16 bits.
-def LO16 : SDNodeXForm<imm, [{
-  return getI32Imm((unsigned)N->getZExtValue() & 0xFFFF);
-}]>;
-
-// Transformation Function - get the higher 16 bits.
-def HI16 : SDNodeXForm<imm, [{
-  return getI32Imm((unsigned)N->getZExtValue() >> 16);
-}]>;
-
 // Node immediate fits as 16-bit sign extended on target immediate.
-// e.g. addi, andi
 def immSExt16  : PatLeaf<(imm), [{
   return (N->getZExtValue() >> 16) == 0;
 }]>;
@@ -117,19 +103,19 @@
 // e.g. addiu, sltiu
 def immZExt16  : PatLeaf<(imm), [{
   return (N->getZExtValue() >> 16) == 0;
-}], LO16>;
+}]>;
 
 // FSL immediate field must fit in 4 bits.
 def immZExt4 : PatLeaf<(imm), [{
-      return N->getZExtValue() == ((N->getZExtValue()) & 0xf) ;
+  return N->getZExtValue() == ((N->getZExtValue()) & 0xf) ;
 }]>;
 
 // shamt field must fit in 5 bits.
 def immZExt5 : PatLeaf<(imm), [{
-      return N->getZExtValue() == ((N->getZExtValue()) & 0x1f) ;
+  return N->getZExtValue() == ((N->getZExtValue()) & 0x1f) ;
 }]>;
 
-// MBlaze Address Mode! SDNode frameindex could possibily be a match
+// MBlaze Address Mode. SDNode frameindex could possibily be a match
 // since load and store instructions from stack used it.
 def iaddr : ComplexPattern<i32, 2, "SelectAddrRegImm", [frameindex], []>;
 def xaddr : ComplexPattern<i32, 2, "SelectAddrRegReg", [], []>;
@@ -141,28 +127,14 @@
 // As stack alignment is always done with addiu, we need a 16-bit immediate
 let Defs = [R1], Uses = [R1] in {
 def ADJCALLSTACKDOWN : MBlazePseudo<(outs), (ins simm16:$amt),
-                                  "${:comment} ADJCALLSTACKDOWN $amt",
+                                  "#ADJCALLSTACKDOWN $amt",
                                   [(callseq_start timm:$amt)]>;
 def ADJCALLSTACKUP   : MBlazePseudo<(outs),
                                   (ins uimm16:$amt1, simm16:$amt2),
-                                  "${:comment} ADJCALLSTACKUP $amt1",
+                                  "#ADJCALLSTACKUP $amt1",
                                   [(callseq_end timm:$amt1, timm:$amt2)]>;
 }
 
-// Some assembly macros need to avoid pseudoinstructions and assembler
-// automatic reodering, we should reorder ourselves.
-def MACRO     : MBlazePseudo<(outs), (ins), ".set macro",     []>;
-def REORDER   : MBlazePseudo<(outs), (ins), ".set reorder",   []>;
-def NOMACRO   : MBlazePseudo<(outs), (ins), ".set nomacro",   []>;
-def NOREORDER : MBlazePseudo<(outs), (ins), ".set noreorder", []>;
-
-// When handling PIC code the assembler needs .cpload and .cprestore
-// directives. If the real instructions corresponding these directives
-// are used, we have the same behavior, but get also a bunch of warnings
-// from the assembler.
-def CPLOAD : MBlazePseudo<(outs), (ins CPURegs:$reg), ".cpload $reg", []>;
-def CPRESTORE : MBlazePseudo<(outs), (ins uimm16:$l), ".cprestore $l\n", []>;
-
 //===----------------------------------------------------------------------===//
 // Instructions specific format
 //===----------------------------------------------------------------------===//
@@ -178,19 +150,19 @@
 
 class ArithI<bits<6> op, string instr_asm, SDNode OpNode,
              Operand Od, PatLeaf imm_type> :
-             TAI<op, (outs CPURegs:$dst), (ins CPURegs:$b, Od:$c),
-                 !strconcat(instr_asm, "   $dst, $b, $c"),
-                 [(set CPURegs:$dst, (OpNode CPURegs:$b, imm_type:$c))], IIAlu>;
+             TB<op, (outs CPURegs:$dst), (ins CPURegs:$b, Od:$c),
+                !strconcat(instr_asm, "   $dst, $b, $c"),
+                [(set CPURegs:$dst, (OpNode CPURegs:$b, imm_type:$c))], IIAlu>;
 
 class ArithR<bits<6> op, bits<11> flags, string instr_asm, SDNode OpNode,
             InstrItinClass itin> :
             TA<op, flags, (outs CPURegs:$dst), (ins CPURegs:$c, CPURegs:$b),
-               !strconcat(instr_asm, "   $dst, $c, $b"),
-               [(set CPURegs:$dst, (OpNode CPURegs:$b, CPURegs:$c))], itin>;
+                !strconcat(instr_asm, "   $dst, $c, $b"),
+                [(set CPURegs:$dst, (OpNode CPURegs:$b, CPURegs:$c))], itin>;
 
 class ArithRI<bits<6> op, string instr_asm, SDNode OpNode,
              Operand Od, PatLeaf imm_type> :
-             TAI<op, (outs CPURegs:$dst), (ins Od:$b, CPURegs:$c),
+             TBR<op, (outs CPURegs:$dst), (ins Od:$b, CPURegs:$c),
                  !strconcat(instr_asm, "   $dst, $c, $b"),
                  [(set CPURegs:$dst, (OpNode imm_type:$b, CPURegs:$c))], IIAlu>;
 
@@ -201,9 +173,9 @@
                [], itin>;
 
 class ArithNI<bits<6> op, string instr_asm,Operand Od, PatLeaf imm_type> :
-             TAI<op, (outs CPURegs:$dst), (ins CPURegs:$b, Od:$c),
-                 !strconcat(instr_asm, "   $dst, $b, $c"),
-                 [], IIAlu>;
+             TB<op, (outs CPURegs:$dst), (ins CPURegs:$b, Od:$c),
+                !strconcat(instr_asm, "   $dst, $b, $c"),
+                [], IIAlu>;
 
 class ArithRN<bits<6> op, bits<11> flags, string instr_asm,
             InstrItinClass itin> :
@@ -212,9 +184,9 @@
                [], itin>;
 
 class ArithRNI<bits<6> op, string instr_asm,Operand Od, PatLeaf imm_type> :
-             TAI<op, (outs CPURegs:$dst), (ins Od:$c, CPURegs:$b),
-                 !strconcat(instr_asm, "   $dst, $b, $c"),
-                 [], IIAlu>;
+             TB<op, (outs CPURegs:$dst), (ins Od:$c, CPURegs:$b),
+                !strconcat(instr_asm, "   $dst, $b, $c"),
+                [], IIAlu>;
 
 //===----------------------------------------------------------------------===//
 // Misc Arithmetic Instructions
@@ -226,14 +198,10 @@
                [(set CPURegs:$dst, (OpNode CPURegs:$b, CPURegs:$c))], IIAlu>;
 
 class LogicI<bits<6> op, string instr_asm, SDNode OpNode> :
-             TAI<op, (outs CPURegs:$dst), (ins CPURegs:$b, uimm16:$c),
-                 !strconcat(instr_asm, "   $dst, $b, $c"),
-                 [(set CPURegs:$dst, (OpNode CPURegs:$b, immZExt16:$c))],
-                 IIAlu>;
-
-class EffectiveAddress<string instr_asm> :
-          TAI<0x08, (outs CPURegs:$dst), (ins memri:$addr),
-              instr_asm, [(set CPURegs:$dst, iaddr:$addr)], IIAlu>;
+             TB<op, (outs CPURegs:$dst), (ins CPURegs:$b, uimm16:$c),
+                !strconcat(instr_asm, "   $dst, $b, $c"),
+                [(set CPURegs:$dst, (OpNode CPURegs:$b, immZExt16:$c))],
+                IIAlu>;
 
 //===----------------------------------------------------------------------===//
 // Memory Access Instructions
@@ -244,7 +212,7 @@
                [(set CPURegs:$dst, (OpNode xaddr:$addr))], IILoad>;
 
 class LoadMI<bits<6> op, string instr_asm, PatFrag OpNode> :
-             TAI<op, (outs CPURegs:$dst), (ins memri:$addr),
+             TBR<op, (outs CPURegs:$dst), (ins memri:$addr),
                  !strconcat(instr_asm, "   $dst, $addr"),
                  [(set CPURegs:$dst, (OpNode iaddr:$addr))], IILoad>;
 
@@ -254,7 +222,7 @@
                 [(OpNode CPURegs:$dst, xaddr:$addr)], IIStore>;
 
 class StoreMI<bits<6> op, string instr_asm, PatFrag OpNode> :
-              TAI<op, (outs), (ins CPURegs:$dst, memri:$addr),
+              TBR<op, (outs), (ins CPURegs:$dst, memri:$addr),
                   !strconcat(instr_asm, "   $dst, $addr"),
                   [(OpNode CPURegs:$dst, iaddr:$addr)], IIStore>;
 
@@ -262,94 +230,108 @@
 // Branch Instructions
 //===----------------------------------------------------------------------===//
 class Branch<bits<6> op, bits<5> br, bits<11> flags, string instr_asm> :
-             TBR<op, br, flags, (outs), (ins CPURegs:$target),
+             TA<op, flags, (outs), (ins CPURegs:$target),
                  !strconcat(instr_asm, "   $target"),
-                 [(brind CPURegs:$target)], IIBranch>;
+                 [], IIBranch> {
+  let rd = 0x0;
+  let ra = br;
+}
 
-class BranchI<bits<6> op, bits<5> brf, string instr_asm> :
-              TBRI<op, brf, (outs), (ins brtarget:$target),
-                   !strconcat(instr_asm, "   $target"),
-                   [(br bb:$target)], IIBranch>;
+class BranchI<bits<6> op, bits<5> br, string instr_asm> :
+              TB<op, (outs), (ins brtarget:$target),
+                 !strconcat(instr_asm, "   $target"),
+                 [], IIBranch> {
+  let rd = 0;
+  let ra = br;
+}
 
 //===----------------------------------------------------------------------===//
 // Branch and Link Instructions
 //===----------------------------------------------------------------------===//
 class BranchL<bits<6> op, bits<5> br, bits<11> flags, string instr_asm> :
-              TBRL<op, br, flags, (outs), (ins CPURegs:$target),
-                   !strconcat(instr_asm, "   r15, $target"),
-                   [], IIBranch>;
+              TA<op, flags, (outs), (ins CPURegs:$target),
+                 !strconcat(instr_asm, "   r15, $target"),
+                 [], IIBranch> {
+  let rd = 15;
+  let ra = br;
+}
 
 class BranchLI<bits<6> op, bits<5> br, string instr_asm> :
-               TBRLI<op, br, (outs), (ins calltarget:$target),
-                     !strconcat(instr_asm, "   r15, $target"),
-                     [], IIBranch>;
+               TB<op, (outs), (ins calltarget:$target),
+                  !strconcat(instr_asm, "   r15, $target"),
+                  [], IIBranch> {
+  let rd = 15;
+  let ra = br;
+}
 
 //===----------------------------------------------------------------------===//
 // Conditional Branch Instructions
 //===----------------------------------------------------------------------===//
 class BranchC<bits<6> op, bits<5> br, bits<11> flags, string instr_asm,
               PatFrag cond_op> :
-              TBRC<op, br, flags, (outs),
-                   (ins CPURegs:$a, CPURegs:$b, brtarget:$offset),
-                   !strconcat(instr_asm, "   $a, $b, $offset"),
-                   [], IIBranch>; 
-                   //(brcond (cond_op CPURegs:$a, CPURegs:$b), bb:$offset)],
-                   //IIBranch>;
+              TA<op, flags, (outs),
+                 (ins CPURegs:$a, CPURegs:$b, brtarget:$offset),
+                 !strconcat(instr_asm, "   $a, $b, $offset"),
+                 [], IIBranch> {
+  let rd = br;
+}
 
 class BranchCI<bits<6> op, bits<5> br, string instr_asm, PatFrag cond_op> :
-               TBRCI<op, br, (outs), (ins CPURegs:$a, brtarget:$offset),
-                     !strconcat(instr_asm, "   $a, $offset"),
-                     [], IIBranch>;
+               TB<op, (outs), (ins CPURegs:$a, brtarget:$offset),
+                  !strconcat(instr_asm, "   $a, $offset"),
+                  [], IIBranch> {
+  let rd = br;
+}
 
 //===----------------------------------------------------------------------===//
 // MBlaze arithmetic instructions
 //===----------------------------------------------------------------------===//
 
 let isCommutable = 1, isAsCheapAsAMove = 1 in {
-    def ADD    :  Arith<0x00, 0x000, "add    ", add,  IIAlu>;
-    def ADDC   :  Arith<0x02, 0x000, "addc   ", adde, IIAlu>;
-    def ADDK   :  Arith<0x04, 0x000, "addk   ", addc, IIAlu>;
-    def ADDKC  : ArithN<0x06, 0x000, "addkc  ", IIAlu>;
-    def AND    :  Logic<0x21, 0x000, "and    ", and>;
-    def OR     :  Logic<0x20, 0x000, "or     ", or>;
-    def XOR    :  Logic<0x22, 0x000, "xor    ", xor>;
+  def ADD    :  Arith<0x00, 0x000, "add    ", add,  IIAlu>;
+  def ADDC   :  Arith<0x02, 0x000, "addc   ", adde, IIAlu>;
+  def ADDK   :  Arith<0x04, 0x000, "addk   ", addc, IIAlu>;
+  def ADDKC  : ArithN<0x06, 0x000, "addkc  ", IIAlu>;
+  def AND    :  Logic<0x21, 0x000, "and    ", and>;
+  def OR     :  Logic<0x20, 0x000, "or     ", or>;
+  def XOR    :  Logic<0x22, 0x000, "xor    ", xor>;
 }
 
 let isAsCheapAsAMove = 1 in {
-    def ANDN   :  ArithN<0x23, 0x000, "andn   ", IIAlu>;
-    def CMP    :  ArithN<0x05, 0x001, "cmp    ", IIAlu>;
-    def CMPU   :  ArithN<0x05, 0x003, "cmpu   ", IIAlu>;
-    def RSUB   :  ArithR<0x01, 0x000, "rsub   ", sub,  IIAlu>;
-    def RSUBC  :  ArithR<0x03, 0x000, "rsubc  ", sube, IIAlu>;
-    def RSUBK  :  ArithR<0x05, 0x000, "rsubk  ", subc, IIAlu>;
-    def RSUBKC : ArithRN<0x07, 0x000, "rsubkc ", IIAlu>;
+  def ANDN   :  ArithN<0x23, 0x000, "andn   ", IIAlu>;
+  def CMP    :  ArithN<0x05, 0x001, "cmp    ", IIAlu>;
+  def CMPU   :  ArithN<0x05, 0x003, "cmpu   ", IIAlu>;
+  def RSUB   :  ArithR<0x01, 0x000, "rsub   ", sub,  IIAlu>;
+  def RSUBC  :  ArithR<0x03, 0x000, "rsubc  ", sube, IIAlu>;
+  def RSUBK  :  ArithR<0x05, 0x000, "rsubk  ", subc, IIAlu>;
+  def RSUBKC : ArithRN<0x07, 0x000, "rsubkc ", IIAlu>;
 }
 
 let isCommutable = 1, Predicates=[HasMul] in {
-    def MUL    : Arith<0x10, 0x000, "mul    ", mul,   IIAlu>;
+  def MUL    : Arith<0x10, 0x000, "mul    ", mul,   IIAlu>;
 }
 
 let isCommutable = 1, Predicates=[HasMul,HasMul64] in {
-    def MULH   : Arith<0x10, 0x001, "mulh   ", mulhs, IIAlu>;
-    def MULHU  : Arith<0x10, 0x003, "mulhu  ", mulhu, IIAlu>;
+  def MULH   : Arith<0x10, 0x001, "mulh   ", mulhs, IIAlu>;
+  def MULHU  : Arith<0x10, 0x003, "mulhu  ", mulhu, IIAlu>;
 }
 
 let Predicates=[HasMul,HasMul64] in {
-    def MULHSU : ArithN<0x10, 0x002, "mulhsu ", IIAlu>;
+  def MULHSU : ArithN<0x10, 0x002, "mulhsu ", IIAlu>;
 }
 
 let Predicates=[HasBarrel] in {
-    def BSRL   :   Arith<0x11, 0x000, "bsrl   ", srl, IIAlu>;
-    def BSRA   :   Arith<0x11, 0x200, "bsra   ", sra, IIAlu>;
-    def BSLL   :   Arith<0x11, 0x400, "bsll   ", shl, IIAlu>;
-    def BSRLI  :  ArithI<0x11, "bsrli  ", srl, uimm5, immZExt5>;
-    def BSRAI  :  ArithI<0x11, "bsrai  ", sra, uimm5, immZExt5>;
-    def BSLLI  :  ArithI<0x11, "bslli  ", shl, uimm5, immZExt5>;
+  def BSRL   :   Arith<0x11, 0x000, "bsrl   ", srl, IIAlu>;
+  def BSRA   :   Arith<0x11, 0x200, "bsra   ", sra, IIAlu>;
+  def BSLL   :   Arith<0x11, 0x400, "bsll   ", shl, IIAlu>;
+  def BSRLI  :  ArithI<0x11, "bsrli  ", srl, uimm5, immZExt5>;
+  def BSRAI  :  ArithI<0x11, "bsrai  ", sra, uimm5, immZExt5>;
+  def BSLLI  :  ArithI<0x11, "bslli  ", shl, uimm5, immZExt5>;
 }
 
 let Predicates=[HasDiv] in {
-    def IDIV   :  Arith<0x12, 0x000, "idiv   ", sdiv, IIAlu>;
-    def IDIVU  :  Arith<0x12, 0x002, "idivu  ", udiv, IIAlu>;
+  def IDIV   :  Arith<0x12, 0x000, "idiv   ", sdiv, IIAlu>;
+  def IDIVU  :  Arith<0x12, 0x002, "idivu  ", udiv, IIAlu>;
 }
 
 //===----------------------------------------------------------------------===//
@@ -357,22 +339,22 @@
 //===----------------------------------------------------------------------===//
 
 let isAsCheapAsAMove = 1 in {
-    def ADDI    :   ArithI<0x08, "addi   ", add,  simm16, immSExt16>;
-    def ADDIC   :  ArithNI<0x0A, "addic  ", simm16, immSExt16>;
-    def ADDIK   :  ArithNI<0x0C, "addik  ", simm16, immSExt16>;
-    def ADDIKC  :   ArithI<0x0E, "addikc ", addc, simm16, immSExt16>;
-    def RSUBI   :   ArithRI<0x09, "rsubi  ", sub,  simm16, immSExt16>;
-    def RSUBIC  :  ArithRNI<0x0B, "rsubi  ", simm16, immSExt16>;
-    def RSUBIK  :  ArithRNI<0x0E, "rsubic ", simm16, immSExt16>;
-    def RSUBIKC :   ArithRI<0x0F, "rsubikc", subc, simm16, immSExt16>;
-    def ANDNI   :  ArithNI<0x2B, "andni  ", uimm16, immZExt16>;
-    def ANDI    :   LogicI<0x29, "andi   ", and>;
-    def ORI     :   LogicI<0x28, "ori    ", or>;
-    def XORI    :   LogicI<0x2A, "xori   ", xor>;
+  def ADDI    :   ArithI<0x08, "addi   ", add,  simm16, immSExt16>;
+  def ADDIC   :  ArithNI<0x0A, "addic  ", simm16, immSExt16>;
+  def ADDIK   :  ArithNI<0x0C, "addik  ", simm16, immSExt16>;
+  def ADDIKC  :   ArithI<0x0E, "addikc ", addc, simm16, immSExt16>;
+  def RSUBI   :  ArithRI<0x09, "rsubi  ", sub,  simm16, immSExt16>;
+  def RSUBIC  : ArithRNI<0x0B, "rsubi  ", simm16, immSExt16>;
+  def RSUBIK  : ArithRNI<0x0E, "rsubic ", simm16, immSExt16>;
+  def RSUBIKC :  ArithRI<0x0F, "rsubikc", subc, simm16, immSExt16>;
+  def ANDNI   :  ArithNI<0x2B, "andni  ", uimm16, immZExt16>;
+  def ANDI    :   LogicI<0x29, "andi   ", and>;
+  def ORI     :   LogicI<0x28, "ori    ", or>;
+  def XORI    :   LogicI<0x2A, "xori   ", xor>;
 }
 
 let Predicates=[HasMul] in {
-    def MULI    :   ArithI<0x18, "muli   ", mul, simm16, immSExt16>;
+  def MULI    :   ArithI<0x18, "muli   ", mul, simm16, immSExt16>;
 }
 
 //===----------------------------------------------------------------------===//
@@ -380,115 +362,122 @@
 //===----------------------------------------------------------------------===//
 
 let canFoldAsLoad = 1, isReMaterializable = 1 in {
-    def LBU  :  LoadM<0x30, "lbu    ", zextloadi8>;
-    def LHU  :  LoadM<0x31, "lhu    ", zextloadi16>;
-    def LW   :  LoadM<0x32, "lw     ", load>;
-
-    def LBUI : LoadMI<0x30, "lbui   ", zextloadi8>;
-    def LHUI : LoadMI<0x31, "lhui   ", zextloadi16>;
-    def LWI  : LoadMI<0x32, "lwi    ", load>;
-}
-
-    def SB  :  StoreM<0x34, "sb     ", truncstorei8>;
-    def SH  :  StoreM<0x35, "sh     ", truncstorei16>;
-    def SW  :  StoreM<0x36, "sw     ", store>;
-
-    def SBI : StoreMI<0x34, "sbi    ", truncstorei8>;
-    def SHI : StoreMI<0x35, "shi    ", truncstorei16>;
-    def SWI : StoreMI<0x36, "swi    ", store>;
+  def LBU  :  LoadM<0x30, "lbu    ", zextloadi8>;
+  def LHU  :  LoadM<0x31, "lhu    ", zextloadi16>;
+  def LW   :  LoadM<0x32, "lw     ", load>;
+
+  def LBUI : LoadMI<0x38, "lbui   ", zextloadi8>;
+  def LHUI : LoadMI<0x39, "lhui   ", zextloadi16>;
+  def LWI  : LoadMI<0x3A, "lwi    ", load>;
+}
+
+  def SB  :  StoreM<0x34, "sb     ", truncstorei8>;
+  def SH  :  StoreM<0x35, "sh     ", truncstorei16>;
+  def SW  :  StoreM<0x36, "sw     ", store>;
+
+  def SBI : StoreMI<0x3C, "sbi    ", truncstorei8>;
+  def SHI : StoreMI<0x3D, "shi    ", truncstorei16>;
+  def SWI : StoreMI<0x3E, "swi    ", store>;
 
 //===----------------------------------------------------------------------===//
 // MBlaze branch instructions
 //===----------------------------------------------------------------------===//
 
-let isBranch = 1, isTerminator = 1, hasCtrlDep = 1 in {
-    def BRI    :  BranchI<0x2E, 0x00, "bri    ">;
-    def BRAI   :  BranchI<0x2E, 0x08, "brai   ">;
-    def BEQI   : BranchCI<0x2F, 0x00, "beqi   ", seteq>;
-    def BNEI   : BranchCI<0x2F, 0x01, "bnei   ", setne>;
-    def BLTI   : BranchCI<0x2F, 0x02, "blti   ", setlt>;
-    def BLEI   : BranchCI<0x2F, 0x03, "blei   ", setle>;
-    def BGTI   : BranchCI<0x2F, 0x04, "bgti   ", setgt>;
-    def BGEI   : BranchCI<0x2F, 0x05, "bgei   ", setge>;
-}
-
-let isBranch = 1, isIndirectBranch = 1, isTerminator = 1, hasCtrlDep = 1 in {
-    def BR     :   Branch<0x26, 0x00, 0x000, "br     ">;
-    def BRA    :   Branch<0x26, 0x08, 0x000, "bra    ">;
-    def BEQ    :  BranchC<0x27, 0x00, 0x000, "beq    ", seteq>;
-    def BNE    :  BranchC<0x27, 0x01, 0x000, "bne    ", setne>;
-    def BLT    :  BranchC<0x27, 0x02, 0x000, "blt    ", setlt>;
-    def BLE    :  BranchC<0x27, 0x03, 0x000, "ble    ", setle>;
-    def BGT    :  BranchC<0x27, 0x04, 0x000, "bgt    ", setgt>;
-    def BGE    :  BranchC<0x27, 0x05, 0x000, "bge    ", setge>;
-}
-
-let isBranch = 1, isTerminator = 1, hasDelaySlot = 1, hasCtrlDep = 1 in {
-    def BRID   :  BranchI<0x2E, 0x10, "brid   ">;
-    def BRAID  :  BranchI<0x2E, 0x18, "braid  ">;
-    def BEQID  : BranchCI<0x2F, 0x10, "beqid  ", seteq>;
-    def BNEID  : BranchCI<0x2F, 0x11, "bneid  ", setne>;
-    def BLTID  : BranchCI<0x2F, 0x12, "bltid  ", setlt>;
-    def BLEID  : BranchCI<0x2F, 0x13, "bleid  ", setle>;
-    def BGTID  : BranchCI<0x2F, 0x14, "bgtid  ", setgt>;
-    def BGEID  : BranchCI<0x2F, 0x15, "bgeid  ", setge>;
+let isBranch = 1, isTerminator = 1, hasCtrlDep = 1, isBarrier = 1, 
+    Form = FI in {
+  def BRI    :  BranchI<0x2E, 0x00, "bri    ">;
+  def BRAI   :  BranchI<0x2E, 0x08, "brai   ">;
+}
+
+let isBranch = 1, isTerminator = 1, hasCtrlDep = 1, Form = FRI in {
+  def BEQI   : BranchCI<0x2F, 0x00, "beqi   ", seteq>;
+  def BNEI   : BranchCI<0x2F, 0x01, "bnei   ", setne>;
+  def BLTI   : BranchCI<0x2F, 0x02, "blti   ", setlt>;
+  def BLEI   : BranchCI<0x2F, 0x03, "blei   ", setle>;
+  def BGTI   : BranchCI<0x2F, 0x04, "bgti   ", setgt>;
+  def BGEI   : BranchCI<0x2F, 0x05, "bgei   ", setge>;
+}
+
+let isBranch = 1, isIndirectBranch = 1, isTerminator = 1, hasCtrlDep = 1,
+    isBarrier = 1, Form = FR in {
+  def BR     :   Branch<0x26, 0x00, 0x000, "br     ">;
+  def BRA    :   Branch<0x26, 0x08, 0x000, "bra    ">;
+}
+
+let isBranch = 1, isIndirectBranch = 1, isTerminator = 1, hasCtrlDep = 1,
+    Form = FRR in {
+  def BEQ    :  BranchC<0x27, 0x00, 0x000, "beq    ", seteq>;
+  def BNE    :  BranchC<0x27, 0x01, 0x000, "bne    ", setne>;
+  def BLT    :  BranchC<0x27, 0x02, 0x000, "blt    ", setlt>;
+  def BLE    :  BranchC<0x27, 0x03, 0x000, "ble    ", setle>;
+  def BGT    :  BranchC<0x27, 0x04, 0x000, "bgt    ", setgt>;
+  def BGE    :  BranchC<0x27, 0x05, 0x000, "bge    ", setge>;
+}
+
+let isBranch = 1, isTerminator = 1, hasDelaySlot = 1, hasCtrlDep = 1,
+    isBarrier = 1, Form = FI in {
+  def BRID   :  BranchI<0x2E, 0x10, "brid   ">;
+  def BRAID  :  BranchI<0x2E, 0x18, "braid  ">;
+}
+
+let isBranch = 1, isTerminator = 1, hasDelaySlot = 1, hasCtrlDep = 1,
+    Form = FRI in {
+  def BEQID  : BranchCI<0x2F, 0x10, "beqid  ", seteq>;
+  def BNEID  : BranchCI<0x2F, 0x11, "bneid  ", setne>;
+  def BLTID  : BranchCI<0x2F, 0x12, "bltid  ", setlt>;
+  def BLEID  : BranchCI<0x2F, 0x13, "bleid  ", setle>;
+  def BGTID  : BranchCI<0x2F, 0x14, "bgtid  ", setgt>;
+  def BGEID  : BranchCI<0x2F, 0x15, "bgeid  ", setge>;
+}
+
+let isBranch = 1, isIndirectBranch = 1, isTerminator = 1, Form = FR,
+    hasDelaySlot = 1, hasCtrlDep = 1, isBarrier = 1 in {
+  def BRD    :   Branch<0x26, 0x10, 0x000, "brd    ">;
+  def BRAD   :   Branch<0x26, 0x18, 0x000, "brad   ">;
 }
 
 let isBranch = 1, isIndirectBranch = 1, isTerminator = 1,
-    hasDelaySlot = 1, hasCtrlDep = 1 in {
-    def BRD    :   Branch<0x26, 0x10, 0x000, "brd    ">;
-    def BRAD   :   Branch<0x26, 0x18, 0x000, "brad   ">;
-    def BEQD   :  BranchC<0x27, 0x10, 0x000, "beqd   ", seteq>;
-    def BNED   :  BranchC<0x27, 0x11, 0x000, "bned   ", setne>;
-    def BLTD   :  BranchC<0x27, 0x12, 0x000, "bltd   ", setlt>;
-    def BLED   :  BranchC<0x27, 0x13, 0x000, "bled   ", setle>;
-    def BGTD   :  BranchC<0x27, 0x14, 0x000, "bgtd   ", setgt>;
-    def BGED   :  BranchC<0x27, 0x15, 0x000, "bged   ", setge>;
-}
-
-let isCall = 1, hasCtrlDep = 1, isIndirectBranch = 1,
-    Defs = [R3,R4,R5,R6,R7,R8,R9,R10,R11,R12],
-    Uses = [R1,R5,R6,R7,R8,R9,R10] in {
-    def BRL    : BranchL<0x26, 0x04, 0x000, "brl    ">;
-    def BRAL   : BranchL<0x26, 0x0C, 0x000, "bral   ">;
+    hasDelaySlot = 1, hasCtrlDep = 1, Form = FRR in {
+  def BEQD   :  BranchC<0x27, 0x10, 0x000, "beqd   ", seteq>;
+  def BNED   :  BranchC<0x27, 0x11, 0x000, "bned   ", setne>;
+  def BLTD   :  BranchC<0x27, 0x12, 0x000, "bltd   ", setlt>;
+  def BLED   :  BranchC<0x27, 0x13, 0x000, "bled   ", setle>;
+  def BGTD   :  BranchC<0x27, 0x14, 0x000, "bgtd   ", setgt>;
+  def BGED   :  BranchC<0x27, 0x15, 0x000, "bged   ", setge>;
 }
 
-let isCall = 1, hasDelaySlot = 1, hasCtrlDep = 1,
+let isCall = 1, hasDelaySlot = 1, hasCtrlDep = 1, isBarrier = 1, Form = FI,
     Defs = [R3,R4,R5,R6,R7,R8,R9,R10,R11,R12],
     Uses = [R1,R5,R6,R7,R8,R9,R10] in {
-    def BRLID  : BranchLI<0x2E, 0x14, "brlid  ">;
-    def BRALID : BranchLI<0x2E, 0x1C, "bralid ">;
+  def BRLID  : BranchLI<0x2E, 0x14, "brlid  ">;
+  def BRALID : BranchLI<0x2E, 0x1C, "bralid ">;
 }
 
 let isCall = 1, hasDelaySlot = 1, hasCtrlDep = 1, isIndirectBranch = 1,
+    isBarrier = 1, Form = FR,
     Defs = [R3,R4,R5,R6,R7,R8,R9,R10,R11,R12],
     Uses = [R1,R5,R6,R7,R8,R9,R10] in {
-    def BRLD   : BranchL<0x26, 0x14, 0x000, "brld   ">;
-    def BRALD  : BranchL<0x26, 0x1C, 0x000, "brald  ">;
+  def BRLD   : BranchL<0x26, 0x14, 0x000, "brld   ">;
+  def BRALD  : BranchL<0x26, 0x1C, 0x000, "brald  ">;
 }
 
-let isReturn=1, isTerminator=1, hasDelaySlot=1,
-    isBarrier=1, hasCtrlDep=1, imm16=0x8 in {
-    def RTSD   : TRET<0x2D, (outs), (ins CPURegs:$target),
-                      "rtsd      $target, 8",
-                      [(MBlazeRet CPURegs:$target)],
-                      IIBranch>;
+let isReturn=1, isTerminator=1, hasDelaySlot=1, isBarrier=1,
+    hasCtrlDep=1, rd=0x10, imm16=0x8, Form=FR in {
+  def RTSD   : TB<0x2D, (outs), (ins CPURegs:$target),
+                  "rtsd      $target, 8",
+                  [(MBlazeRet CPURegs:$target)],
+                  IIBranch>;
 }
 
 //===----------------------------------------------------------------------===//
 // MBlaze misc instructions
 //===----------------------------------------------------------------------===//
 
-let addr = 0 in {
-    def NOP :  TADDR<0x00, (outs), (ins), "nop    ", [], IIAlu>;
+let neverHasSideEffects = 1 in {
+  def NOP :  MBlazeInst< 0x20, FRRR, (outs), (ins), "nop    ", [], IIAlu>;
 }
 
 let usesCustomInserter = 1 in {
-  //class PseudoSelCC<RegisterClass RC, string asmstr>:
-  //  MBlazePseudo<(outs RC:$D), (ins RC:$T, RC:$F, CPURegs:$CMP), asmstr,
-  //  [(set RC:$D, (MBlazeSelectCC RC:$T, RC:$F, CPURegs:$CMP))]>;
-  //def Select_CC : PseudoSelCC<CPURegs, "# MBlazeSelect_CC">;
-
   def Select_CC : MBlazePseudo<(outs CPURegs:$dst),
     (ins CPURegs:$T, CPURegs:$F, CPURegs:$CMP, i32imm:$CC),
     "; SELECT_CC PSEUDO!",
@@ -512,20 +501,24 @@
 
 
 let rb = 0 in {
-    def SEXT16 : TA<0x24, 0x061, (outs CPURegs:$dst), (ins CPURegs:$src),
-                    "sext16  $dst, $src", [], IIAlu>;
-    def SEXT8  : TA<0x24, 0x060, (outs CPURegs:$dst), (ins CPURegs:$src),
-                    "sext8   $dst, $src", [], IIAlu>;
-    def SRL    : TA<0x24, 0x041, (outs CPURegs:$dst), (ins CPURegs:$src),
-                    "srl     $dst, $src", [], IIAlu>;
-    def SRA    : TA<0x24, 0x001, (outs CPURegs:$dst), (ins CPURegs:$src),
-                    "sra     $dst, $src", [], IIAlu>;
-    def SRC    : TA<0x24, 0x021, (outs CPURegs:$dst), (ins CPURegs:$src),
-                    "src     $dst, $src", [], IIAlu>;
+  def SEXT16 : TA<0x24, 0x061, (outs CPURegs:$dst), (ins CPURegs:$src),
+                  "sext16  $dst, $src", [], IIAlu>;
+  def SEXT8  : TA<0x24, 0x060, (outs CPURegs:$dst), (ins CPURegs:$src),
+                  "sext8   $dst, $src", [], IIAlu>;
+  def SRL    : TA<0x24, 0x041, (outs CPURegs:$dst), (ins CPURegs:$src),
+                  "srl     $dst, $src", [], IIAlu>;
+  def SRA    : TA<0x24, 0x001, (outs CPURegs:$dst), (ins CPURegs:$src),
+                  "sra     $dst, $src", [], IIAlu>;
+  def SRC    : TA<0x24, 0x021, (outs CPURegs:$dst), (ins CPURegs:$src),
+                  "src     $dst, $src", [], IIAlu>;
+}
+
+let opcode=0x08 in {
+  def LEA_ADDI : TB<0x08, (outs CPURegs:$dst), (ins memri:$addr),
+                    "addi    $dst, ${addr:stackloc}",
+                    [(set CPURegs:$dst, iaddr:$addr)], IIAlu>;
 }
 
-def LEA_ADDI : EffectiveAddress<"addi    $dst, ${addr:stackloc}">;
-
 //===----------------------------------------------------------------------===//
 //  Arbitrary patterns that map to one or more instructions
 //===----------------------------------------------------------------------===//
@@ -610,6 +603,10 @@
 def : Pat<(selectcc CPURegs:$L, CPURegs:$R, CPURegs:$T, CPURegs:$F, SETULE),
           (Select_CC CPURegs:$T, CPURegs:$F, (CMPU CPURegs:$L, CPURegs:$R), 6)>;
 
+// BR instructions
+def : Pat<(br bb:$T), (BRID bb:$T)>;
+def : Pat<(brind CPURegs:$T), (BRD CPURegs:$T)>;
+
 // BRCOND instructions
 def : Pat<(brcond (setcc CPURegs:$L, CPURegs:$R, SETEQ), bb:$T),
           (BEQID (CMP CPURegs:$R, CPURegs:$L), bb:$T)>;

Added: llvm/trunk/lib/Target/MBlaze/MBlazeMCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeMCCodeEmitter.cpp?rev=116986&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeMCCodeEmitter.cpp (added)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeMCCodeEmitter.cpp Wed Oct 20 22:09:55 2010
@@ -0,0 +1,235 @@
+//===-- MBlazeMCCodeEmitter.cpp - Convert MBlaze code to machine code -----===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file implements the MBlazeMCCodeEmitter class.
+//
+//===----------------------------------------------------------------------===//
+
+#define DEBUG_TYPE "mblaze-emitter"
+#include "MBlaze.h"
+#include "MBlazeInstrInfo.h"
+#include "MBlazeFixupKinds.h"
+#include "llvm/MC/MCCodeEmitter.h"
+#include "llvm/MC/MCExpr.h"
+#include "llvm/MC/MCInst.h"
+#include "llvm/MC/MCSymbol.h"
+#include "llvm/MC/MCFixup.h"
+#include "llvm/ADT/Statistic.h"
+#include "llvm/Support/raw_ostream.h"
+using namespace llvm;
+
+STATISTIC(MCNumEmitted, "Number of MC instructions emitted");
+
+namespace {
+class MBlazeMCCodeEmitter : public MCCodeEmitter {
+  MBlazeMCCodeEmitter(const MBlazeMCCodeEmitter &); // DO NOT IMPLEMENT
+  void operator=(const MBlazeMCCodeEmitter &); // DO NOT IMPLEMENT
+  const TargetMachine &TM;
+  const TargetInstrInfo &TII;
+  MCContext &Ctx;
+
+public:
+  MBlazeMCCodeEmitter(TargetMachine &tm, MCContext &ctx)
+    : TM(tm), TII(*TM.getInstrInfo()), Ctx(ctx) {
+  }
+
+  ~MBlazeMCCodeEmitter() {}
+
+  // getBinaryCodeForInstr - TableGen'erated function for getting the
+  // binary encoding for an instruction.
+  unsigned getBinaryCodeForInstr(const MCInst &MI) const;
+
+  /// getMachineOpValue - Return binary encoding of operand. If the machine
+  /// operand requires relocation, record the relocation and return zero.
+  unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO) const;
+  unsigned getMachineOpValue(const MCInst &MI, unsigned OpIdx) const {
+    return getMachineOpValue(MI, MI.getOperand(OpIdx));
+  }
+
+  unsigned getNumFixupKinds() const {
+    return 2;
+  }
+
+  const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const {
+    const static MCFixupKindInfo Infos[] = {
+      { "reloc_pcrel_4byte", 0, 4 * 8, MCFixupKindInfo::FKF_IsPCRel },
+      { "reloc_pcrel_2byte", 0, 2 * 8, MCFixupKindInfo::FKF_IsPCRel } };
+
+    if (Kind < FirstTargetFixupKind)
+      return MCCodeEmitter::getFixupKindInfo(Kind);
+
+    if (unsigned(Kind-FirstTargetFixupKind) < getNumFixupKinds())
+      return Infos[Kind - FirstTargetFixupKind];
+
+    assert(0 && "Invalid fixup kind.");
+    return Infos[0];
+  }
+
+  static unsigned GetMBlazeRegNum(const MCOperand &MO) {
+    // FIXME: getMBlazeRegisterNumbering() is sufficient?
+    assert(0 && "MBlazeMCCodeEmitter::GetMBlazeRegNum() not yet implemented.");
+    return 0;
+  }
+
+  void EmitByte(unsigned char C, unsigned &CurByte, raw_ostream &OS) const {
+    // The MicroBlaze uses a bit reversed format so we need to reverse the
+    // order of the bits. Taken from:
+    // http://graphics.stanford.edu/~seander/bithacks.html
+    C = ((C * 0x80200802ULL) & 0x0884422110ULL) * 0x0101010101ULL >> 32;
+
+    OS << (char)C;
+    ++CurByte;
+  }
+
+  void EmitRawByte(unsigned char C, unsigned &CurByte, raw_ostream &OS) const {
+    OS << (char)C;
+    ++CurByte;
+  }
+
+  void EmitConstant(uint64_t Val, unsigned Size, unsigned &CurByte,
+                    raw_ostream &OS) const {
+    assert(Size <= 8 && "size too big in emit constant" );
+
+    for (unsigned i = 0; i != Size; ++i) {
+      EmitByte(Val & 255, CurByte, OS);
+      Val >>= 8;
+    }
+  }
+
+  void EmitIMM(const MCOperand &imm, unsigned &CurByte, raw_ostream &OS) const;
+
+  void EmitImmediate(const MCInst &MI,
+                     unsigned opNo, MCFixupKind FixupKind,
+                     unsigned &CurByte, raw_ostream &OS,
+                     SmallVectorImpl<MCFixup> &Fixups) const;
+
+  void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
+                         SmallVectorImpl<MCFixup> &Fixups) const;
+};
+
+} // end anonymous namespace
+
+
+MCCodeEmitter *llvm::createMBlazeMCCodeEmitter(const Target &,
+                                               TargetMachine &TM,
+                                               MCContext &Ctx) {
+  return new MBlazeMCCodeEmitter(TM, Ctx);
+}
+
+/// getMachineOpValue - Return binary encoding of operand. If the machine
+/// operand requires relocation, record the relocation and return zero.
+unsigned MBlazeMCCodeEmitter::getMachineOpValue(const MCInst &MI,
+                                             const MCOperand &MO) const {
+  if (MO.isReg())
+    return MBlazeRegisterInfo::getRegisterNumbering(MO.getReg());
+  else if (MO.isImm())
+    return static_cast<unsigned>(MO.getImm());
+  else if (MO.isExpr() )
+      return 0; // The relocation has already been recorded at this point.
+  else {
+#ifndef NDEBUG
+    errs() << MO;
+#endif
+    llvm_unreachable(0);
+  }
+  return 0;
+}
+
+void MBlazeMCCodeEmitter::
+EmitIMM(const MCOperand &imm, unsigned &CurByte, raw_ostream &OS) const {
+  int32_t val = (int32_t)imm.getImm();
+  if (val > 32767 || val < -32678 ) {
+    EmitByte(0x0D, CurByte, OS);
+    EmitByte(0x00, CurByte, OS);
+    EmitRawByte((val >> 24) & 0xFF, CurByte, OS);
+    EmitRawByte((val >> 16) & 0xFF, CurByte, OS);
+  }
+}
+
+void MBlazeMCCodeEmitter::
+EmitImmediate(const MCInst &MI, unsigned opNo, MCFixupKind FixupKind,
+              unsigned &CurByte, raw_ostream &OS,
+              SmallVectorImpl<MCFixup> &Fixups) const {
+  assert( MI.getNumOperands()>opNo && "Not enought operands for instruction" );
+
+  MCOperand oper = MI.getOperand(opNo);
+  if (oper.isImm()) {
+      EmitIMM( oper, CurByte, OS );
+  } else if (oper.isExpr()) {
+      Fixups.push_back(MCFixup::Create(0,oper.getExpr(),FixupKind));
+  }
+}
+
+void MBlazeMCCodeEmitter::
+EncodeInstruction(const MCInst &MI, raw_ostream &OS,
+                  SmallVectorImpl<MCFixup> &Fixups) const {
+  unsigned Opcode = MI.getOpcode();
+  const TargetInstrDesc &Desc = TII.get(Opcode);
+  uint64_t TSFlags = Desc.TSFlags;
+  // Keep track of the current byte being emitted.
+  unsigned CurByte = 0;
+
+  switch ((TSFlags & MBlazeII::FormMask)) {
+  default: break;
+  case MBlazeII::Pseudo:
+    // Pseudo instructions don't get encoded.
+    return;
+
+  case MBlazeII::RegRegImm:
+    EmitImmediate( MI, 2, FK_Data_4, CurByte, OS, Fixups );
+    break;
+
+  case MBlazeII::RegImmReg:
+    EmitImmediate( MI, 1, FK_Data_4, CurByte, OS, Fixups );
+    break;
+
+  case MBlazeII::RegImm:
+    EmitImmediate( MI, 1, MCFixupKind(MBlaze::reloc_pcrel_2byte), CurByte, OS,
+                   Fixups );
+    break;
+
+  case MBlazeII::Imm:
+    EmitImmediate( MI, 0, MCFixupKind(MBlaze::reloc_pcrel_4byte), CurByte, OS,
+                   Fixups );
+    break;
+  }
+
+  ++MCNumEmitted;  // Keep track of the # of mi's emitted
+  unsigned Value = getBinaryCodeForInstr(MI);
+  switch (Opcode) {
+  default:
+    EmitConstant(Value, 4, CurByte, OS);
+    break;
+
+  case MBlaze::BRI:
+  case MBlaze::BRAI:
+  case MBlaze::BRID:
+  case MBlaze::BRAID:
+  case MBlaze::BRLID:
+  case MBlaze::BRALID:
+    MCOperand op = MI.getOperand(0);
+    if (op.isExpr()) {
+        EmitByte(0x0D, CurByte, OS);
+        EmitByte(0x00, CurByte, OS);
+        EmitRawByte(0, CurByte, OS);
+        EmitRawByte(0, CurByte, OS);
+    }
+    EmitConstant(Value, 4, CurByte, OS);
+    break;
+  }
+}
+
+// FIXME: These #defines shouldn't be necessary. Instead, tblgen should
+// be able to generate code emitter helpers for either variant, like it
+// does for the AsmWriter.
+#define MBlazeCodeEmitter MBlazeMCCodeEmitter
+#define MachineInstr MCInst
+#include "MBlazeGenCodeEmitter.inc"
+#undef MBlazeCodeEmitter
+#undef MachineInstr

Added: llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.cpp?rev=116986&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.cpp (added)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.cpp Wed Oct 20 22:09:55 2010
@@ -0,0 +1,174 @@
+//===-- MBLazeMCInstLower.cpp - Convert MBlaze MachineInstr to an MCInst---===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file contains code to lower MBlaze MachineInstrs to their corresponding
+// MCInst records.
+//
+//===----------------------------------------------------------------------===//
+
+#include "MBLazeMCInstLower.h"
+#include "MBlazeInstrInfo.h"
+#include "llvm/Constants.h"
+#include "llvm/CodeGen/AsmPrinter.h"
+#include "llvm/CodeGen/MachineBasicBlock.h"
+#include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/MC/MCAsmInfo.h"
+#include "llvm/MC/MCContext.h"
+#include "llvm/MC/MCExpr.h"
+#include "llvm/MC/MCInst.h"
+#include "llvm/Target/Mangler.h"
+#include "llvm/Support/Debug.h"
+#include "llvm/Support/raw_ostream.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/ADT/SmallString.h"
+using namespace llvm;
+
+MCSymbol *MBlazeMCInstLower::
+GetGlobalAddressSymbol(const MachineOperand &MO) const {
+  switch (MO.getTargetFlags()) {
+  default: 
+      llvm_unreachable("Unknown target flag on GV operand");
+
+  case 0: break;
+  }
+
+  return Printer.Mang->getSymbol(MO.getGlobal());
+}
+
+MCSymbol *MBlazeMCInstLower::
+GetExternalSymbolSymbol(const MachineOperand &MO) const {
+  switch (MO.getTargetFlags()) {
+  default:
+      assert(0 && "Unknown target flag on GV operand");
+
+  case 0: break;
+  }
+
+  return Printer.GetExternalSymbolSymbol(MO.getSymbolName());
+}
+
+MCSymbol *MBlazeMCInstLower::
+GetJumpTableSymbol(const MachineOperand &MO) const {
+  SmallString<256> Name;
+  raw_svector_ostream(Name) << Printer.MAI->getPrivateGlobalPrefix() << "JTI"
+                            << Printer.getFunctionNumber() << '_'
+                            << MO.getIndex();
+
+  switch (MO.getTargetFlags()) {
+  default:
+      llvm_unreachable("Unknown target flag on GV operand");
+
+  case 0: break;
+  }
+
+  // Create a symbol for the name.
+  return Ctx.GetOrCreateSymbol(Name.str());
+}
+
+MCSymbol *MBlazeMCInstLower::
+GetConstantPoolIndexSymbol(const MachineOperand &MO) const {
+  SmallString<256> Name;
+  raw_svector_ostream(Name) << Printer.MAI->getPrivateGlobalPrefix() << "CPI"
+                            << Printer.getFunctionNumber() << '_'
+                            << MO.getIndex();
+
+  switch (MO.getTargetFlags()) {
+  default:
+      llvm_unreachable("Unknown target flag on GV operand");
+
+  case 0: break;
+  }
+
+  // Create a symbol for the name.
+  return Ctx.GetOrCreateSymbol(Name.str());
+}
+
+MCSymbol *MBlazeMCInstLower::
+GetBlockAddressSymbol(const MachineOperand &MO) const {
+  switch (MO.getTargetFlags()) {
+  default:
+      assert(0 && "Unknown target flag on GV operand");
+
+  case 0: break;
+  }
+
+  return Printer.GetBlockAddressSymbol(MO.getBlockAddress());
+}
+
+MCOperand MBlazeMCInstLower::
+LowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym) const {
+  // FIXME: We would like an efficient form for this, so we don't have to do a
+  // lot of extra uniquing.
+  const MCExpr *Expr = MCSymbolRefExpr::Create(Sym, Ctx);
+
+  switch (MO.getTargetFlags()) {
+  default:
+      llvm_unreachable("Unknown target flag on GV operand");
+
+  case 0: break;
+  }
+
+  if (!MO.isJTI() && MO.getOffset())
+    Expr = MCBinaryExpr::CreateAdd(Expr,
+                                   MCConstantExpr::Create(MO.getOffset(), Ctx),
+                                   Ctx);
+  return MCOperand::CreateExpr(Expr);
+}
+
+void MBlazeMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
+  OutMI.setOpcode(MI->getOpcode());
+
+  for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
+    const MachineOperand &MO = MI->getOperand(i);
+
+    MCOperand MCOp;
+    switch (MO.getType()) {
+    default:
+      assert(0 && "unknown operand type");
+    case MachineOperand::MO_Register:
+      // Ignore all implicit register operands.
+      if (MO.isImplicit()) continue;
+      MCOp = MCOperand::CreateReg(MO.getReg());
+      break;
+    case MachineOperand::MO_Immediate:
+      MCOp = MCOperand::CreateImm(MO.getImm());
+      break;
+    case MachineOperand::MO_MachineBasicBlock:
+      MCOp = MCOperand::CreateExpr(MCSymbolRefExpr::Create(
+                         MO.getMBB()->getSymbol(), Ctx));
+      break;
+    case MachineOperand::MO_GlobalAddress:
+      MCOp = LowerSymbolOperand(MO, GetGlobalAddressSymbol(MO));
+      break;
+    case MachineOperand::MO_ExternalSymbol:
+      MCOp = LowerSymbolOperand(MO, GetExternalSymbolSymbol(MO));
+      break;
+    case MachineOperand::MO_JumpTableIndex:
+      MCOp = LowerSymbolOperand(MO, GetJumpTableSymbol(MO));
+      break;
+    case MachineOperand::MO_ConstantPoolIndex:
+      MCOp = LowerSymbolOperand(MO, GetConstantPoolIndexSymbol(MO));
+      break;
+    case MachineOperand::MO_BlockAddress:
+      MCOp = LowerSymbolOperand(MO, GetBlockAddressSymbol(MO));
+      break;
+    case MachineOperand::MO_FPImmediate:
+      bool ignored;
+      APFloat FVal = MO.getFPImm()->getValueAPF();
+      FVal.convert(APFloat::IEEEsingle, APFloat::rmTowardZero, &ignored);
+
+      APInt IVal = FVal.bitcastToAPInt();
+      uint64_t Val = *IVal.getRawData();
+      MCOp = MCOperand::CreateImm(Val);
+      break;
+    }
+
+    OutMI.addOperand(MCOp);
+  }
+}

Added: llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.h?rev=116986&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.h (added)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.h Wed Oct 20 22:09:55 2010
@@ -0,0 +1,50 @@
+//===-- MBlazeMCInstLower.h - Lower MachineInstr to MCInst ----------------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef MBLAZE_MCINSTLOWER_H
+#define MBLAZE_MCINSTLOWER_H
+
+#include "llvm/Support/Compiler.h"
+
+namespace llvm {
+  class AsmPrinter;
+  class MCAsmInfo;
+  class MCContext;
+  class MCInst;
+  class MCOperand;
+  class MCSymbol;
+  class MachineInstr;
+  class MachineModuleInfoMachO;
+  class MachineOperand;
+  class Mangler;
+
+  /// MBlazeMCInstLower - This class is used to lower an MachineInstr
+  /// into an MCInst.
+class LLVM_LIBRARY_VISIBILITY MBlazeMCInstLower {
+  MCContext &Ctx;
+  Mangler &Mang;
+
+  AsmPrinter &Printer;
+public:
+  MBlazeMCInstLower(MCContext &ctx, Mangler &mang, AsmPrinter &printer)
+    : Ctx(ctx), Mang(mang), Printer(printer) {}
+  void Lower(const MachineInstr *MI, MCInst &OutMI) const;
+
+  MCOperand LowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym) const;
+
+  MCSymbol *GetGlobalAddressSymbol(const MachineOperand &MO) const;
+  MCSymbol *GetExternalSymbolSymbol(const MachineOperand &MO) const;
+  MCSymbol *GetJumpTableSymbol(const MachineOperand &MO) const;
+  MCSymbol *GetConstantPoolIndexSymbol(const MachineOperand &MO) const;
+  MCSymbol *GetBlockAddressSymbol(const MachineOperand &MO) const;
+};
+
+}
+
+#endif

Added: llvm/trunk/lib/Target/MBlaze/MBlazeRelocations.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeRelocations.h?rev=116986&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeRelocations.h (added)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeRelocations.h Wed Oct 20 22:09:55 2010
@@ -0,0 +1,47 @@
+//===- MBlazeRelocations.h - MBlaze Code Relocations ------------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines the MBlaze target-specific relocation types.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef MBLAZERELOCATIONS_H
+#define MBLAZERELOCATIONS_H
+
+#include "llvm/CodeGen/MachineRelocation.h"
+
+namespace llvm {
+  namespace MBlaze {
+    enum RelocationType {
+      /// reloc_pcrel_word - PC relative relocation, add the relocated value to
+      /// the value already in memory, after we adjust it for where the PC is.
+      reloc_pcrel_word = 0,
+
+      /// reloc_picrel_word - PIC base relative relocation, add the relocated
+      /// value to the value already in memory, after we adjust it for where the
+      /// PIC base is.
+      reloc_picrel_word = 1,
+
+      /// reloc_absolute_word - absolute relocation, just add the relocated
+      /// value to the value already in memory.
+      reloc_absolute_word = 2,
+
+      /// reloc_absolute_word_sext - absolute relocation, just add the relocated
+      /// value to the value already in memory. In object files, it represents a
+      /// value which must be sign-extended when resolving the relocation.
+      reloc_absolute_word_sext = 3,
+
+      /// reloc_absolute_dword - absolute relocation, just add the relocated
+      /// value to the value already in memory.
+      reloc_absolute_dword = 4
+    };
+  }
+}
+
+#endif

Modified: llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.cpp?rev=116986&r1=116985&r2=116986&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.cpp Wed Oct 20 22:09:55 2010
@@ -15,13 +15,51 @@
 #include "MBlazeMCAsmInfo.h"
 #include "MBlazeTargetMachine.h"
 #include "llvm/PassManager.h"
+#include "llvm/CodeGen/Passes.h"
+#include "llvm/Support/FormattedStream.h"
+#include "llvm/Target/TargetOptions.h"
 #include "llvm/Target/TargetRegistry.h"
 using namespace llvm;
 
+static MCStreamer *createMCStreamer(const Target &T, const std::string &TT,
+                                    MCContext &Ctx, TargetAsmBackend &TAB,
+                                    raw_ostream &_OS,
+                                    MCCodeEmitter *_Emitter,
+                                    bool RelaxAll) {
+  Triple TheTriple(TT);
+  switch (TheTriple.getOS()) {
+  case Triple::Darwin:
+    llvm_unreachable("MBlaze does not support Darwin MACH-O format");
+    return NULL;
+  case Triple::MinGW32:
+  case Triple::MinGW64:
+  case Triple::Cygwin:
+  case Triple::Win32:
+    llvm_unreachable("ARM does not support Windows COFF format");
+    return NULL;
+  default:
+    return createELFStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll);
+  }
+}
+
+
 extern "C" void LLVMInitializeMBlazeTarget() {
   // Register the target.
   RegisterTargetMachine<MBlazeTargetMachine> X(TheMBlazeTarget);
   RegisterAsmInfo<MBlazeMCAsmInfo> A(TheMBlazeTarget);
+
+  // Register the MC code emitter
+  TargetRegistry::RegisterCodeEmitter(TheMBlazeTarget,
+                                      llvm::createMBlazeMCCodeEmitter);
+  
+  // Register the asm backend
+  TargetRegistry::RegisterAsmBackend(TheMBlazeTarget,
+                                     createMBlazeAsmBackend);
+
+  // Register the object streamer
+  TargetRegistry::RegisterObjectStreamer(TheMBlazeTarget,
+                                         createMCStreamer);
+
 }
 
 // DataLayout --> Big-endian, 32-bit pointer/ABI/alignment
@@ -39,7 +77,7 @@
              "f64:32:32-v64:32:32-v128:32:32-n32"),
   InstrInfo(*this),
   FrameInfo(TargetFrameInfo::StackGrowsUp, 8, 0),
-  TLInfo(*this), TSInfo(*this) {
+  TLInfo(*this), TSInfo(*this), ELFWriterInfo(*this) {
   if (getRelocationModel() == Reloc::Default) {
       setRelocationModel(Reloc::Static);
   }

Modified: llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.h?rev=116986&r1=116985&r2=116986&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.h (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.h Wed Oct 20 22:09:55 2010
@@ -19,6 +19,8 @@
 #include "MBlazeISelLowering.h"
 #include "MBlazeSelectionDAGInfo.h"
 #include "MBlazeIntrinsicInfo.h"
+#include "MBlazeELFWriterInfo.h"
+#include "llvm/MC/MCStreamer.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/TargetData.h"
 #include "llvm/Target/TargetFrameInfo.h"
@@ -34,6 +36,7 @@
     MBlazeTargetLowering  TLInfo;
     MBlazeSelectionDAGInfo TSInfo;
     MBlazeIntrinsicInfo IntrinsicInfo;
+    MBlazeELFWriterInfo    ELFWriterInfo;
   public:
     MBlazeTargetMachine(const Target &T, const std::string &TT,
                       const std::string &FS);
@@ -62,6 +65,10 @@
     const TargetIntrinsicInfo *getIntrinsicInfo() const
     { return &IntrinsicInfo; }
 
+    virtual const MBlazeELFWriterInfo *getELFWriterInfo() const {
+      return &ELFWriterInfo;
+    }
+
     // Pass Pipeline Configuration
     virtual bool addInstSelector(PassManagerBase &PM,
                                  CodeGenOpt::Level OptLevel);

Modified: llvm/trunk/lib/Target/MBlaze/Makefile
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/Makefile?rev=116986&r1=116985&r2=116986&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/Makefile (original)
+++ llvm/trunk/lib/Target/MBlaze/Makefile Wed Oct 20 22:09:55 2010
@@ -14,10 +14,11 @@
 BUILT_SOURCES = MBlazeGenRegisterInfo.h.inc MBlazeGenRegisterNames.inc \
                 MBlazeGenRegisterInfo.inc MBlazeGenInstrNames.inc \
                 MBlazeGenInstrInfo.inc MBlazeGenAsmWriter.inc \
-                MBlazeGenDAGISel.inc MBlazeGenCallingConv.inc \
+                MBlazeGenDAGISel.inc \
+		MBlazeGenCodeEmitter.inc MBlazeGenCallingConv.inc \
                 MBlazeGenSubtarget.inc MBlazeGenIntrinsics.inc
 
-DIRS = AsmPrinter TargetInfo
+DIRS = InstPrinter TargetInfo
 
 include $(LEVEL)/Makefile.common
 

Added: llvm/trunk/lib/Target/MBlaze/TODO
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/TODO?rev=116986&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/TODO (added)
+++ llvm/trunk/lib/Target/MBlaze/TODO Wed Oct 20 22:09:55 2010
@@ -0,0 +1,26 @@
+* Writing out ELF files is close to working but the following needs to
+  be examined more closely:
+    - ELF files are written with the wrong E_MACHINE value because
+      ELFObjectWriter::WriteHeader function does not yet support
+      target specific E_MACHINE values.
+    - ELF relocation records are incorrect because the function
+      ELFObjectWriter::RecordRelocation is hard coded for X86/X86-64.
+    - Relocations use 2-byte / 4-byte to terminology in reference to
+      the size of the immediate value being changed. The Xilinx
+      terminology seems to be (???) 4-byte / 8-byte in reference
+      to the number of bytes of instructions that are being changed.
+    - BRLID and like instructions are always assumed to use a 4-byte
+      immediate value for the relocation and BEQID and like instructions
+      are always assumed to use a 2-byte immediate value for the relocation.
+      I think this means that conditional branches like BEQID can only
+      branch += 32768 bytes (~8192 instructions). We should allow conditional
+      branches to use 4-byte relocations but I'm not sure how to do that
+      right now.
+
+* Code generation seems to work relatively well now but the following
+  needs to be examined more closely:
+    - The stack layout needs to be examined to make sure it meets
+      the standard, especially in regards to var arg functions.
+    - The delay slot filler is ad hoc but seems to work. Load and
+      store instructions were prevented from being moved to delay
+      slots but I'm not sure that is necessary.

Modified: llvm/trunk/lib/Target/MBlaze/TargetInfo/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/TargetInfo/CMakeLists.txt?rev=116986&r1=116985&r2=116986&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/TargetInfo/CMakeLists.txt (original)
+++ llvm/trunk/lib/Target/MBlaze/TargetInfo/CMakeLists.txt Wed Oct 20 22:09:55 2010
@@ -1,4 +1,5 @@
-include_directories( ${CMAKE_CURRENT_BINARY_DIR}/.. ${CMAKE_CURRENT_SOURCE_DIR}/.. )
+include_directories( ${CMAKE_CURRENT_BINARY_DIR}/.. 
+                     ${CMAKE_CURRENT_SOURCE_DIR}/.. )
 
 add_llvm_library(LLVMMBlazeInfo
   MBlazeTargetInfo.cpp

Modified: llvm/trunk/test/CodeGen/MBlaze/brind.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MBlaze/brind.ll?rev=116986&r1=116985&r2=116986&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MBlaze/brind.ll (original)
+++ llvm/trunk/test/CodeGen/MBlaze/brind.ll Wed Oct 20 22:09:55 2010
@@ -28,32 +28,31 @@
                              label %L3,
                              label %L4,
                              label %L5 ]
-    ; CHECK:        br {{r[0-9]*}}
+    ; CHECK:        brd {{r[0-9]*}}
 
 L1:
     %tmp.1 = add i32 %a, %b
     br label %finish
-    ; CHECK:        br
+    ; CHECK:        brid
 
 L2:
     %tmp.2 = sub i32 %a, %b
     br label %finish
-    ; CHECK:        br
+    ; CHECK:        brid
 
 L3:
     %tmp.3 = mul i32 %a, %b
     br label %finish
-    ; CHECK:        br
+    ; CHECK:        brid
 
 L4:
     %tmp.4 = sdiv i32 %a, %b
     br label %finish
-    ; CHECK:        br
+    ; CHECK:        brid
 
 L5:
     %tmp.5 = srem i32 %a, %b
     br label %finish
-    ; CHECK:        br
 
 finish:
     %tmp.6 = phi i32 [ %tmp.1, %L1 ],
@@ -69,5 +68,5 @@
     %tmp.8 = urem i32 %tmp.7, 5
 
     br label %loop
-    ; CHECK:        br
+    ; CHECK:        brid
 }

Modified: llvm/trunk/test/CodeGen/MBlaze/cc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MBlaze/cc.ll?rev=116986&r1=116985&r2=116986&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MBlaze/cc.ll (original)
+++ llvm/trunk/test/CodeGen/MBlaze/cc.ll Wed Oct 20 22:09:55 2010
@@ -12,7 +12,7 @@
 define void @params0_noret() {
     ; CHECK:        params0_noret:
     ret void
-    ; CHECK-NOT:    {{.* r3, r0, 1}}
+    ; CHECK-NOT:    {{.* r3, .*, .*}}
     ; CHECK-NOT:    {{.* r4, .*, .*}}
     ; CHECK:        rtsd
 }
@@ -20,81 +20,88 @@
 define i8 @params0_8bitret() {
     ; CHECK:        params0_8bitret:
     ret i8 1
-    ; CHECK:        {{.* r3, r0, 1}}
+    ; CHECK-NOT:    {{.* r3, .*, .*}}
     ; CHECK-NOT:    {{.* r4, .*, .*}}
     ; CHECK:        rtsd
+    ; CHECK:        {{.* r3, r0, 1}}
 }
 
 define i16 @params0_16bitret() {
     ; CHECK:        params0_16bitret:
     ret i16 1
+    ; CHECK:        rtsd
     ; CHECK:        {{.* r3, r0, 1}}
     ; CHECK-NOT:    {{.* r4, .*, .*}}
-    ; CHECK:        rtsd
 }
 
 define i32 @params0_32bitret() {
     ; CHECK:        params0_32bitret:
     ret i32 1
-    ; CHECK:        {{.* r3, r0, 1}}
     ; CHECK-NOT:    {{.* r4, .*, .*}}
     ; CHECK:        rtsd
+    ; CHECK:        {{.* r3, r0, 1}}
 }
 
 define i64 @params0_64bitret() {
     ; CHECK:        params0_64bitret:
     ret i64 1
     ; CHECK:        {{.* r3, r0, .*}}
-    ; CHECK:        {{.* r4, r0, 1}}
     ; CHECK:        rtsd
+    ; CHECK:        {{.* r4, r0, 1}}
 }
 
 define i32 @params1_32bitret(i32 %a) {
     ; CHECK:        params1_32bitret:
     ret i32 %a
-    ; CHECK:        {{.* r3, r5, r0}}
+    ; CHECK-NOT:    {{.* r3, .*, .*}}
     ; CHECK-NOT:    {{.* r4, .*, .*}}
     ; CHECK:        rtsd
+    ; CHECK:        {{.* r3, r5, r0}}
 }
 
 define i32 @params2_32bitret(i32 %a, i32 %b) {
     ; CHECK:        params2_32bitret:
     ret i32 %b
-    ; CHECK:        {{.* r3, r6, r0}}
+    ; CHECK-NOT:    {{.* r3, .*, .*}}
     ; CHECK-NOT:    {{.* r4, .*, .*}}
     ; CHECK:        rtsd
+    ; CHECK:        {{.* r3, r6, r0}}
 }
 
 define i32 @params3_32bitret(i32 %a, i32 %b, i32 %c) {
     ; CHECK:        params3_32bitret:
     ret i32 %c
-    ; CHECK:        {{.* r3, r7, r0}}
+    ; CHECK-NOT:    {{.* r3, .*, .*}}
     ; CHECK-NOT:    {{.* r4, .*, .*}}
     ; CHECK:        rtsd
+    ; CHECK:        {{.* r3, r7, r0}}
 }
 
 define i32 @params4_32bitret(i32 %a, i32 %b, i32 %c, i32 %d) {
     ; CHECK:        params4_32bitret:
     ret i32 %d
-    ; CHECK:        {{.* r3, r8, r0}}
+    ; CHECK-NOT:    {{.* r3, .*, .*}}
     ; CHECK-NOT:    {{.* r4, .*, .*}}
     ; CHECK:        rtsd
+    ; CHECK:        {{.* r3, r8, r0}}
 }
 
 define i32 @params5_32bitret(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e) {
     ; CHECK:        params5_32bitret:
     ret i32 %e
-    ; CHECK:        {{.* r3, r9, r0}}
+    ; CHECK-NOT:    {{.* r3, .*, .*}}
     ; CHECK-NOT:    {{.* r4, .*, .*}}
     ; CHECK:        rtsd
+    ; CHECK:        {{.* r3, r9, r0}}
 }
 
 define i32 @params6_32bitret(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f) {
     ; CHECK:        params6_32bitret:
     ret i32 %f
-    ; CHECK:        {{.* r3, r10, r0}}
+    ; CHECK-NOT:    {{.* r3, .*, .*}}
     ; CHECK-NOT:    {{.* r4, .*, .*}}
     ; CHECK:        rtsd
+    ; CHECK:        {{.* r3, r10, r0}}
 }
 
 define i32 @params7_32bitret(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f,
@@ -142,53 +149,29 @@
     %tmp.1 = call i8 @params0_8bitret()
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i8 %tmp.1)
-    ; CHECK:        {{.* r5, .*, .*}}
-    ; CHECK:        {{.* r6, r3, r0}}
-    ; CHECK-NOT:    {{.* r7, .*, .*}}
-    ; CHECK:        brlid
 
     %tmp.2 = call i16 @params0_16bitret()
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i16 %tmp.2)
-    ; CHECK:        {{.* r5, .*, .*}}
-    ; CHECK:        {{.* r6, r3, r0}}
-    ; CHECK-NOT:    {{.* r7, .*, .*}}
-    ; CHECK:        brlid
 
     %tmp.3 = call i32 @params0_32bitret()
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.3)
-    ; CHECK:        {{.* r5, .*, .*}}
-    ; CHECK:        {{.* r6, r3, r0}}
-    ; CHECK-NOT:    {{.* r7, .*, .*}}
-    ; CHECK:        brlid
 
     %tmp.4 = call i64 @params0_64bitret()
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i64 %tmp.4)
-    ; CHECK:        {{.* r5, .*, .*}}
-    ; CHECK:        {{.* r6, r3, r0}}
-    ; CHECK:        {{.* r7, r4, r0}}
-    ; CHECK:        brlid
 
     %tmp.5 = call i32 @params1_32bitret(i32 1)
     ; CHECK:        {{.* r5, .*, .*}}
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.5)
-    ; CHECK:        {{.* r5, .*, .*}}
-    ; CHECK:        {{.* r6, r3, r0}}
-    ; CHECK-NOT:    {{.* r7, .*, .*}}
-    ; CHECK:        brlid
 
     %tmp.6 = call i32 @params2_32bitret(i32 1, i32 2)
     ; CHECK:        {{.* r5, .*, .*}}
     ; CHECK:        {{.* r6, .*, .*}}
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.6)
-    ; CHECK:        {{.* r5, .*, .*}}
-    ; CHECK:        {{.* r6, r3, r0}}
-    ; CHECK-NOT:    {{.* r7, .*, .*}}
-    ; CHECK:        brlid
 
     %tmp.7 = call i32 @params3_32bitret(i32 1, i32 2, i32 3)
     ; CHECK:        {{.* r5, .*, .*}}
@@ -196,10 +179,6 @@
     ; CHECK:        {{.* r7, .*, .*}}
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.7)
-    ; CHECK:        {{.* r5, .*, .*}}
-    ; CHECK:        {{.* r6, r3, r0}}
-    ; CHECK-NOT:    {{.* r7, .*, .*}}
-    ; CHECK:        brlid
 
     %tmp.8 = call i32 @params4_32bitret(i32 1, i32 2, i32 3, i32 4)
     ; CHECK:        {{.* r5, .*, .*}}
@@ -208,10 +187,6 @@
     ; CHECK:        {{.* r8, .*, .*}}
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.8)
-    ; CHECK:        {{.* r5, .*, .*}}
-    ; CHECK:        {{.* r6, r3, r0}}
-    ; CHECK-NOT:    {{.* r7, .*, .*}}
-    ; CHECK:        brlid
 
     %tmp.9 = call i32 @params5_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5)
     ; CHECK:        {{.* r5, .*, .*}}
@@ -221,10 +196,6 @@
     ; CHECK:        {{.* r9, .*, .*}}
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.9)
-    ; CHECK:        {{.* r5, .*, .*}}
-    ; CHECK:        {{.* r6, r3, r0}}
-    ; CHECK-NOT:    {{.* r7, .*, .*}}
-    ; CHECK:        brlid
 
     %tmp.10 = call i32 @params6_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5,
                                          i32 6)
@@ -236,10 +207,6 @@
     ; CHECK:        {{.* r10, .*, .*}}
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.10)
-    ; CHECK:        {{.* r5, .*, .*}}
-    ; CHECK:        {{.* r6, r3, r0}}
-    ; CHECK-NOT:    {{.* r7, .*, .*}}
-    ; CHECK:        brlid
 
     %tmp.11 = call i32 @params7_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5,
                                          i32 6, i32 7)
@@ -252,10 +219,6 @@
     ; CHECK:        {{.* r10, .*, .*}}
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.11)
-    ; CHECK:        {{.* r5, .*, .*}}
-    ; CHECK:        {{.* r6, r3, r0}}
-    ; CHECK-NOT:    {{.* r7, .*, .*}}
-    ; CHECK:        brlid
 
     %tmp.12 = call i32 @params8_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5,
                                          i32 6, i32 7, i32 8)
@@ -269,10 +232,6 @@
     ; CHECK:        {{.* r10, .*, .*}}
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.12)
-    ; CHECK:        {{.* r5, .*, .*}}
-    ; CHECK:        {{.* r6, r3, r0}}
-    ; CHECK-NOT:    {{.* r7, .*, .*}}
-    ; CHECK:        brlid
 
     %tmp.13 = call i32 @params9_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5,
                                          i32 6, i32 7, i32 8, i32 9)
@@ -287,10 +246,6 @@
     ; CHECK:        {{.* r10, .*, .*}}
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.13)
-    ; CHECK:        {{.* r5, .*, .*}}
-    ; CHECK:        {{.* r6, r3, r0}}
-    ; CHECK-NOT:    {{.* r7, .*, .*}}
-    ; CHECK:        brlid
 
     %tmp.14 = call i32 @params10_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5,
                                           i32 6, i32 7, i32 8, i32 9, i32 10)
@@ -306,10 +261,6 @@
     ; CHECK:        {{.* r10, .*, .*}}
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.14)
-    ; CHECK:        {{.* r5, .*, .*}}
-    ; CHECK:        {{.* r6, r3, r0}}
-    ; CHECK-NOT:    {{.* r7, .*, .*}}
-    ; CHECK:        brlid
 
     ret void
 }

Modified: llvm/trunk/test/CodeGen/MBlaze/fpu.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MBlaze/fpu.ll?rev=116986&r1=116985&r2=116986&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MBlaze/fpu.ll (original)
+++ llvm/trunk/test/CodeGen/MBlaze/fpu.ll Wed Oct 20 22:09:55 2010
@@ -10,14 +10,14 @@
     ; FPU:        test_add:
 
     %tmp.1 = fadd float %a, %b
-    ; FUN-NOT:    fadd
     ; FUN:        brlid
     ; FPU-NOT:    brlid
-    ; FPU:        fadd
 
     ret float %tmp.1
     ; FUN:        rtsd
     ; FPU:        rtsd
+    ; FUN-NOT:    fadd
+    ; FPU-NEXT:   fadd
 }
 
 define float @test_sub(float %a, float %b) {
@@ -25,14 +25,14 @@
     ; FPU:        test_sub:
 
     %tmp.1 = fsub float %a, %b
-    ; FUN-NOT:    frsub
     ; FUN:        brlid
     ; FPU-NOT:    brlid
-    ; FPU:        frsub
 
     ret float %tmp.1
     ; FUN:        rtsd
     ; FPU:        rtsd
+    ; FUN-NOT:    frsub
+    ; FPU-NEXT:   frsub
 }
 
 define float @test_mul(float %a, float %b) {
@@ -40,14 +40,14 @@
     ; FPU:        test_mul:
 
     %tmp.1 = fmul float %a, %b
-    ; FUN-NOT:    fmul
     ; FUN:        brlid
     ; FPU-NOT:    brlid
-    ; FPU:        fmul
 
     ret float %tmp.1
     ; FUN:        rtsd
     ; FPU:        rtsd
+    ; FUN-NOT:    fmul
+    ; FPU-NEXT:   fmul
 }
 
 define float @test_div(float %a, float %b) {
@@ -55,12 +55,12 @@
     ; FPU:        test_div:
 
     %tmp.1 = fdiv float %a, %b
-    ; FUN-NOT:    fdiv
     ; FUN:        brlid
     ; FPU-NOT:    brlid
-    ; FPU:        fdiv
 
     ret float %tmp.1
     ; FUN:        rtsd
     ; FPU:        rtsd
+    ; FUN-NOT:    fdiv
+    ; FPU-NEXT:   fdiv
 }

Modified: llvm/trunk/test/CodeGen/MBlaze/imm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MBlaze/imm.ll?rev=116986&r1=116985&r2=116986&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MBlaze/imm.ll (original)
+++ llvm/trunk/test/CodeGen/MBlaze/imm.ll Wed Oct 20 22:09:55 2010
@@ -7,21 +7,21 @@
 
 define i8 @retimm_i8() {
     ; CHECK:        retimm_i8:
-    ; CHECK:        add
-    ; CHECK-NEXT:   rtsd
+    ; CHECK:        rtsd
+    ; CHECK-NEXT:   add
     ; FPU:          retimm_i8:
-    ; FPU:          add
-    ; FPU-NEXT:     rtsd
+    ; FPU:          rtsd
+    ; FPU-NEXT:     add
     ret i8 123
 }
 
 define i16 @retimm_i16() {
     ; CHECK:        retimm_i16:
-    ; CHECK:        add
-    ; CHECK-NEXT:   rtsd
+    ; CHECK:        rtsd
+    ; CHECK-NEXT:   add
     ; FPU:          retimm_i16:
-    ; FPU:          add
-    ; FPU-NEXT:     rtsd
+    ; FPU:          rtsd
+    ; FPU-NEXT:     add
     ret i16 38212
 }
 
@@ -38,12 +38,12 @@
 define i64 @retimm_i64() {
     ; CHECK:        retimm_i64:
     ; CHECK:        add
-    ; CHECK-NEXT:   add
     ; CHECK-NEXT:   rtsd
+    ; CHECK-NEXT:   add
     ; FPU:          retimm_i64:
     ; FPU:          add
-    ; FPU-NEXT:     add
     ; FPU-NEXT:     rtsd
+    ; FPU-NEXT:     add
     ret i64 94581823
 }
 
@@ -53,7 +53,7 @@
     ; CHECK-NEXT:   rtsd
     ; FPU:          retimm_float:
     ; FPU:          or
-    ; FPU:          rtsd
+    ; FPU-NEXT:     rtsd
     ret float 12.0
 }
 

Modified: llvm/trunk/test/CodeGen/MBlaze/jumptable.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MBlaze/jumptable.ll?rev=116986&r1=116985&r2=116986&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MBlaze/jumptable.ll (original)
+++ llvm/trunk/test/CodeGen/MBlaze/jumptable.ll Wed Oct 20 22:09:55 2010
@@ -18,8 +18,8 @@
                                       i32 8, label %L8
                                       i32 9, label %L9 ]
 
-    ; CHECK:        lw [[REG:r[0-9]*]]
-    ; CHECK:        br [[REG]]
+    ; CHECK:        lw  [[REG:r[0-9]*]]
+    ; CHECK:        brd [[REG]]
 L0:
     %var0 = add i32 %arg, 0
     br label %DONE

Modified: llvm/trunk/test/CodeGen/MBlaze/mul.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MBlaze/mul.ll?rev=116986&r1=116985&r2=116986&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MBlaze/mul.ll (original)
+++ llvm/trunk/test/CodeGen/MBlaze/mul.ll Wed Oct 20 22:09:55 2010
@@ -13,11 +13,11 @@
     ; FUN-NOT:    mul
     ; FUN:        brlid
     ; MUL-NOT:    brlid
-    ; MUL:        mul
 
     ret i8 %tmp.1
     ; FUN:        rtsd
     ; MUL:        rtsd
+    ; MUL:        mul
 }
 
 define i16 @test_i16(i16 %a, i16 %b) {
@@ -28,11 +28,11 @@
     ; FUN-NOT:    mul
     ; FUN:        brlid
     ; MUL-NOT:    brlid
-    ; MUL:        mul
 
     ret i16 %tmp.1
     ; FUN:        rtsd
     ; MUL:        rtsd
+    ; MUL:        mul
 }
 
 define i32 @test_i32(i32 %a, i32 %b) {
@@ -43,9 +43,9 @@
     ; FUN-NOT:    mul
     ; FUN:        brlid
     ; MUL-NOT:    brlid
-    ; MUL:        mul
 
     ret i32 %tmp.1
     ; FUN:        rtsd
     ; MUL:        rtsd
+    ; MUL:        mul
 }

Modified: llvm/trunk/test/CodeGen/MBlaze/shift.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MBlaze/shift.ll?rev=116986&r1=116985&r2=116986&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MBlaze/shift.ll (original)
+++ llvm/trunk/test/CodeGen/MBlaze/shift.ll Wed Oct 20 22:09:55 2010
@@ -10,17 +10,17 @@
     ; SHT:        test_i8:
 
     %tmp.1 = shl i8 %a, %b
-    ; FUN-NOT:    bsll
     ; FUN:        andi
     ; FUN:        add
     ; FUN:        bnei
     ; SHT-NOT:    andi
     ; SHT-NOT:    bnei
-    ; SHT:        bsll
 
     ret i8 %tmp.1
     ; FUN:        rtsd
     ; SHT:        rtsd
+    ; FUN-NOT:    bsll
+    ; SHT-NEXT:   bsll
 }
 
 define i8 @testc_i8(i8 %a, i8 %b) {
@@ -28,18 +28,18 @@
     ; SHT:        testc_i8:
 
     %tmp.1 = shl i8 %a, 5
-    ; FUN-NOT:    bsll
     ; FUN:        andi
     ; FUN:        add
     ; FUN:        bnei
     ; SHT-NOT:    andi
     ; SHT-NOT:    add
     ; SHT-NOT:    bnei
-    ; SHT:        bslli
 
     ret i8 %tmp.1
     ; FUN:        rtsd
     ; SHT:        rtsd
+    ; FUN-NOT:    bsll
+    ; SHT-NEXT:   bslli
 }
 
 define i16 @test_i16(i16 %a, i16 %b) {
@@ -47,17 +47,17 @@
     ; SHT:        test_i16:
 
     %tmp.1 = shl i16 %a, %b
-    ; FUN-NOT:    bsll
     ; FUN:        andi
     ; FUN:        add
     ; FUN:        bnei
     ; SHT-NOT:    andi
     ; SHT-NOT:    bnei
-    ; SHT:        bsll
 
     ret i16 %tmp.1
     ; FUN:        rtsd
     ; SHT:        rtsd
+    ; FUN-NOT:    bsll
+    ; SHT-NEXT:   bsll
 }
 
 define i16 @testc_i16(i16 %a, i16 %b) {
@@ -65,18 +65,18 @@
     ; SHT:        testc_i16:
 
     %tmp.1 = shl i16 %a, 5
-    ; FUN-NOT:    bsll
     ; FUN:        andi
     ; FUN:        add
     ; FUN:        bnei
     ; SHT-NOT:    andi
     ; SHT-NOT:    add
     ; SHT-NOT:    bnei
-    ; SHT:        bslli
 
     ret i16 %tmp.1
     ; FUN:        rtsd
     ; SHT:        rtsd
+    ; FUN-NOT:    bsll
+    ; SHT-NEXT:   bslli
 }
 
 define i32 @test_i32(i32 %a, i32 %b) {
@@ -84,17 +84,17 @@
     ; SHT:        test_i32:
 
     %tmp.1 = shl i32 %a, %b
-    ; FUN-NOT:    bsll
     ; FUN:        andi
     ; FUN:        add
     ; FUN:        bnei
     ; SHT-NOT:    andi
     ; SHT-NOT:    bnei
-    ; SHT:        bsll
 
     ret i32 %tmp.1
     ; FUN:        rtsd
     ; SHT:        rtsd
+    ; FUN-NOT:    bsll
+    ; SHT-NEXT:   bsll
 }
 
 define i32 @testc_i32(i32 %a, i32 %b) {
@@ -102,16 +102,16 @@
     ; SHT:        testc_i32:
 
     %tmp.1 = shl i32 %a, 5
-    ; FUN-NOT:    bsll
     ; FUN:        andi
     ; FUN:        add
     ; FUN:        bnei
     ; SHT-NOT:    andi
     ; SHT-NOT:    add
     ; SHT-NOT:    bnei
-    ; SHT:        bslli
 
     ret i32 %tmp.1
     ; FUN:        rtsd
     ; SHT:        rtsd
+    ; FUN-NOT:    bsll
+    ; SHT-NEXT:   bslli
 }



From resistor at mac.com  Wed Oct 20 22:11:16 2010
From: resistor at mac.com (Owen Anderson)
Date: Thu, 21 Oct 2010 03:11:16 -0000
Subject: [llvm-commits] [llvm] r116987 - in /llvm/trunk:
 lib/Target/ARM/ARMScheduleA8.td lib/Target/ARM/ARMScheduleA9.td
 lib/Target/ARM/ARMScheduleV6.td test/CodeGen/ARM/fmscs.ll
 test/CodeGen/ARM/reg_sequence.ll
Message-ID: <20101021031116.50B952A6C12C@llvm.org>

Author: resistor
Date: Wed Oct 20 22:11:16 2010
New Revision: 116987

URL: http://llvm.org/viewvc/llvm-project?rev=116987&view=rev
Log:
Revert r116983, which is breaking all the buildbots.

Modified:
    llvm/trunk/lib/Target/ARM/ARMScheduleA8.td
    llvm/trunk/lib/Target/ARM/ARMScheduleA9.td
    llvm/trunk/lib/Target/ARM/ARMScheduleV6.td
    llvm/trunk/test/CodeGen/ARM/fmscs.ll
    llvm/trunk/test/CodeGen/ARM/reg_sequence.ll

Modified: llvm/trunk/lib/Target/ARM/ARMScheduleA8.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMScheduleA8.td?rev=116987&r1=116986&r2=116987&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMScheduleA8.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMScheduleA8.td Wed Oct 20 22:11:16 2010
@@ -331,28 +331,6 @@
   InstrItinData<IIC_fpSQRT64, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
                                InstrStage<29, [A8_NPipe], 0>,
                                InstrStage<29, [A8_NLSPipe]>], [29, 1]>,
-
-  //
-  // Integer to Single-precision Move
-  InstrItinData<IIC_fpMOVIS,  [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
-                               InstrStage<1, [A8_NPipe]>],
-                              [2, 1]>,
-  //
-  // Integer to Double-precision Move
-  InstrItinData<IIC_fpMOVID,  [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
-                               InstrStage<1, [A8_NPipe]>],
-                              [2, 1, 1]>,
-  //
-  // Single-precision to Integer Move
-  InstrItinData<IIC_fpMOVSI,  [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
-                               InstrStage<1, [A8_NPipe]>],
-                              [20, 1]>,
-  //
-  // Double-precision to Integer Move
-  InstrItinData<IIC_fpMOVDI,  [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
-                               InstrStage<1, [A8_NPipe]>],
-                              [20, 20, 1]>,
-
   //
   // Single-precision FP Load
   InstrItinData<IIC_fpLoad32, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,

Modified: llvm/trunk/lib/Target/ARM/ARMScheduleA9.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMScheduleA9.td?rev=116987&r1=116986&r2=116987&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMScheduleA9.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMScheduleA9.td Wed Oct 20 22:11:16 2010
@@ -641,7 +641,7 @@
                                InstrStage<1, [A9_DRegsVFP], 0, Required>,
                                InstrStage<2, [A9_DRegsN],   0, Reserved>,
                                InstrStage<1, [A9_NPipe]>],
-                              [2, 1]>,
+                              [1, 1]>,
   //
   // Double-precision to Integer Move
   InstrItinData<IIC_fpMOVDI,  [InstrStage<1, [A9_Issue0, A9_Issue1], 0>,
@@ -649,7 +649,7 @@
                                InstrStage<1, [A9_DRegsVFP], 0, Required>,
                                InstrStage<2, [A9_DRegsN],   0, Reserved>,
                                InstrStage<1, [A9_NPipe]>],
-                              [2, 1, 1]>,
+                              [1, 1, 1]>,
   //
   // Single-precision FP Load
   InstrItinData<IIC_fpLoad32, [InstrStage<1, [A9_Issue0, A9_Issue1], 0>,
@@ -1430,7 +1430,7 @@
                                InstrStage<1, [A9_DRegsN],   0, Required>,
                                InstrStage<3, [A9_DRegsVFP], 0, Reserved>,
                                InstrStage<1, [A9_NPipe]>],
-                              [1, 1]>,
+                              [2, 1]>,
   //
   // Integer to Double-precision Move
   InstrItinData<IIC_VMOVID ,  [InstrStage<1, [A9_Issue0, A9_Issue1], 0>,
@@ -1438,7 +1438,7 @@
                                InstrStage<1, [A9_DRegsN],   0, Required>,
                                InstrStage<3, [A9_DRegsVFP], 0, Reserved>,
                                InstrStage<1, [A9_NPipe]>],
-                              [1, 1, 1]>,
+                              [2, 1, 1]>,
   //
   // Single-precision to Integer Move
   InstrItinData<IIC_VMOVSI ,  [InstrStage<1, [A9_Issue0, A9_Issue1], 0>,

Modified: llvm/trunk/lib/Target/ARM/ARMScheduleV6.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMScheduleV6.td?rev=116987&r1=116986&r2=116987&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMScheduleV6.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMScheduleV6.td Wed Oct 20 22:11:16 2010
@@ -247,18 +247,6 @@
   // Double-precision FP SQRT
   InstrItinData<IIC_fpSQRT64 , [InstrStage<29, [V6_Pipe]>], [34, 2, 2]>,
   //
-  // Integer to Single-precision Move
-  InstrItinData<IIC_fpMOVIS,  [InstrStage<1, [V6_Pipe]>], [10, 1]>,
-  //
-  // Integer to Double-precision Move
-  InstrItinData<IIC_fpMOVID,  [InstrStage<1, [V6_Pipe]>], [10, 1, 1]>,
-  //
-  // Single-precision to Integer Move
-  InstrItinData<IIC_fpMOVSI,  [InstrStage<1, [V6_Pipe]>], [10, 1]>,
-  //
-  // Double-precision to Integer Move
-  InstrItinData<IIC_fpMOVDI,  [InstrStage<1, [V6_Pipe]>], [10, 10, 1]>,
-  //
   // Single-precision FP Load
   InstrItinData<IIC_fpLoad32 , [InstrStage<1, [V6_Pipe]>], [5, 2, 2]>,
   //

Modified: llvm/trunk/test/CodeGen/ARM/fmscs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fmscs.ll?rev=116987&r1=116986&r2=116987&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/fmscs.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/fmscs.ll Wed Oct 20 22:11:16 2010
@@ -19,6 +19,6 @@
 ; NFP0: 	vnmls.f32	s2, s1, s0
 
 ; CORTEXA8: test:
-; CORTEXA8: 	vnmls.f32	s1, s2, s0
+; CORTEXA8: 	vnmls.f32	s2, s1, s0
 ; CORTEXA9: test:
 ; CORTEXA9: 	vnmls.f32	s0, s1, s2

Modified: llvm/trunk/test/CodeGen/ARM/reg_sequence.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/reg_sequence.ll?rev=116987&r1=116986&r2=116987&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/reg_sequence.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/reg_sequence.ll Wed Oct 20 22:11:16 2010
@@ -75,8 +75,7 @@
 ; CHECK:        t3:
 ; CHECK:        vld3.8
 ; CHECK:        vmul.i8
-; CHECK:        vmov r
-; CHECK-NOT:    vmov d
+; CHECK-NOT:    vmov
 ; CHECK:        vst3.8
   %tmp1 = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8* %A, i32 1) ; <%struct.__neon_int8x8x3_t> [#uses=2]
   %tmp2 = extractvalue %struct.__neon_int8x8x3_t %tmp1, 0 ; <<8 x i8>> [#uses=1]



From peckw at wesleypeck.com  Wed Oct 20 22:34:22 2010
From: peckw at wesleypeck.com (Wesley Peck)
Date: Thu, 21 Oct 2010 03:34:22 -0000
Subject: [llvm-commits] [llvm] r116991 - in /llvm/trunk: cmake/modules/
 lib/Target/MBlaze/ lib/Target/MBlaze/AsmPrinter/
 lib/Target/MBlaze/InstPrinter/ lib/Target/MBlaze/TargetInfo/
 test/CodeGen/MBlaze/
Message-ID: <20101021033422.9FFEA2A6C12C@llvm.org>

Author: peckw
Date: Wed Oct 20 22:34:22 2010
New Revision: 116991

URL: http://llvm.org/viewvc/llvm-project?rev=116991&view=rev
Log:
Reverting the commit 116986. It was breaking the build on llvm-x86_64-linux though it
compiles on OS X. I'll ensure that it builds on a linux machine before committing
again.

Added:
    llvm/trunk/lib/Target/MBlaze/AsmPrinter/   (props changed)
      - copied from r116985, llvm/trunk/lib/Target/MBlaze/AsmPrinter/
    llvm/trunk/lib/Target/MBlaze/AsmPrinter/CMakeLists.txt
      - copied unchanged from r116985, llvm/trunk/lib/Target/MBlaze/AsmPrinter/CMakeLists.txt
    llvm/trunk/lib/Target/MBlaze/AsmPrinter/MBlazeAsmPrinter.cpp
      - copied unchanged from r116985, llvm/trunk/lib/Target/MBlaze/AsmPrinter/MBlazeAsmPrinter.cpp
    llvm/trunk/lib/Target/MBlaze/AsmPrinter/Makefile
      - copied unchanged from r116985, llvm/trunk/lib/Target/MBlaze/AsmPrinter/Makefile
Removed:
    llvm/trunk/lib/Target/MBlaze/InstPrinter/
    llvm/trunk/lib/Target/MBlaze/MBlazeAsmBackend.cpp
    llvm/trunk/lib/Target/MBlaze/MBlazeAsmPrinter.cpp
    llvm/trunk/lib/Target/MBlaze/MBlazeELFWriterInfo.cpp
    llvm/trunk/lib/Target/MBlaze/MBlazeELFWriterInfo.h
    llvm/trunk/lib/Target/MBlaze/MBlazeFixupKinds.h
    llvm/trunk/lib/Target/MBlaze/MBlazeMCCodeEmitter.cpp
    llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.cpp
    llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.h
    llvm/trunk/lib/Target/MBlaze/MBlazeRelocations.h
    llvm/trunk/lib/Target/MBlaze/TODO
Modified:
    llvm/trunk/cmake/modules/LLVMLibDeps.cmake
    llvm/trunk/lib/Target/MBlaze/CMakeLists.txt
    llvm/trunk/lib/Target/MBlaze/MBlaze.h
    llvm/trunk/lib/Target/MBlaze/MBlaze.td
    llvm/trunk/lib/Target/MBlaze/MBlazeDelaySlotFiller.cpp
    llvm/trunk/lib/Target/MBlaze/MBlazeISelLowering.cpp
    llvm/trunk/lib/Target/MBlaze/MBlazeInstrFPU.td
    llvm/trunk/lib/Target/MBlaze/MBlazeInstrFSL.td
    llvm/trunk/lib/Target/MBlaze/MBlazeInstrFormats.td
    llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.h
    llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.td
    llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.cpp
    llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.h
    llvm/trunk/lib/Target/MBlaze/Makefile
    llvm/trunk/lib/Target/MBlaze/TargetInfo/CMakeLists.txt
    llvm/trunk/test/CodeGen/MBlaze/brind.ll
    llvm/trunk/test/CodeGen/MBlaze/cc.ll
    llvm/trunk/test/CodeGen/MBlaze/fpu.ll
    llvm/trunk/test/CodeGen/MBlaze/imm.ll
    llvm/trunk/test/CodeGen/MBlaze/jumptable.ll
    llvm/trunk/test/CodeGen/MBlaze/mul.ll
    llvm/trunk/test/CodeGen/MBlaze/shift.ll

Modified: llvm/trunk/cmake/modules/LLVMLibDeps.cmake
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/cmake/modules/LLVMLibDeps.cmake?rev=116991&r1=116990&r2=116991&view=diff
==============================================================================
--- llvm/trunk/cmake/modules/LLVMLibDeps.cmake (original)
+++ llvm/trunk/cmake/modules/LLVMLibDeps.cmake Wed Oct 20 22:34:22 2010
@@ -1,28 +1,28 @@
-set(MSVC_LIB_DEPS_LLVMARMAsmParser LLVMARMInfo LLVMMC LLVMMCParser LLVMSupport LLVMSystem LLVMTarget)
-set(MSVC_LIB_DEPS_LLVMARMAsmPrinter LLVMMC LLVMSupport LLVMSystem)
+set(MSVC_LIB_DEPS_LLVMARMAsmParser LLVMARMCodeGen LLVMARMInfo LLVMMC LLVMMCParser LLVMSupport LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMARMAsmPrinter LLVMMC LLVMSupport)
 set(MSVC_LIB_DEPS_LLVMARMCodeGen LLVMARMAsmPrinter LLVMARMInfo LLVMAnalysis LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget)
-set(MSVC_LIB_DEPS_LLVMARMDisassembler LLVMARMCodeGen LLVMARMInfo LLVMMC LLVMSupport LLVMSystem)
+set(MSVC_LIB_DEPS_LLVMARMDisassembler LLVMARMCodeGen LLVMARMInfo LLVMMC LLVMSupport)
 set(MSVC_LIB_DEPS_LLVMARMInfo LLVMSupport)
-set(MSVC_LIB_DEPS_LLVMAlphaAsmPrinter LLVMAlphaInfo LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMAlphaAsmPrinter LLVMAlphaCodeGen LLVMAlphaInfo LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMAlphaCodeGen LLVMAlphaInfo LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMAlphaInfo LLVMSupport)
 set(MSVC_LIB_DEPS_LLVMAnalysis LLVMCore LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMArchive LLVMBitReader LLVMCore LLVMSupport LLVMSystem)
-set(MSVC_LIB_DEPS_LLVMAsmParser LLVMCore LLVMSupport LLVMSystem)
+set(MSVC_LIB_DEPS_LLVMAsmParser LLVMCore LLVMSupport)
 set(MSVC_LIB_DEPS_LLVMAsmPrinter LLVMAnalysis LLVMCodeGen LLVMCore LLVMMC LLVMMCParser LLVMSupport LLVMSystem LLVMTarget)
-set(MSVC_LIB_DEPS_LLVMBitReader LLVMCore LLVMSupport LLVMSystem)
-set(MSVC_LIB_DEPS_LLVMBitWriter LLVMCore LLVMSupport LLVMSystem)
-set(MSVC_LIB_DEPS_LLVMBlackfinAsmPrinter LLVMAsmPrinter LLVMBlackfinInfo LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget)
-set(MSVC_LIB_DEPS_LLVMBlackfinCodeGen LLVMBlackfinInfo LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMBitReader LLVMCore LLVMSupport)
+set(MSVC_LIB_DEPS_LLVMBitWriter LLVMCore LLVMSupport)
+set(MSVC_LIB_DEPS_LLVMBlackfinAsmPrinter LLVMAsmPrinter LLVMBlackfinCodeGen LLVMBlackfinInfo LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMBlackfinCodeGen LLVMBlackfinInfo LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMBlackfinInfo LLVMSupport)
 set(MSVC_LIB_DEPS_LLVMCBackend LLVMAnalysis LLVMCBackendInfo LLVMCodeGen LLVMCore LLVMMC LLVMScalarOpts LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils LLVMipa)
 set(MSVC_LIB_DEPS_LLVMCBackendInfo LLVMSupport)
-set(MSVC_LIB_DEPS_LLVMCellSPUAsmPrinter LLVMAsmPrinter LLVMCellSPUInfo LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget)
-set(MSVC_LIB_DEPS_LLVMCellSPUCodeGen LLVMCellSPUInfo LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMCellSPUAsmPrinter LLVMAsmPrinter LLVMCellSPUCodeGen LLVMCellSPUInfo LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMCellSPUCodeGen LLVMCellSPUInfo LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMCellSPUInfo LLVMSupport)
 set(MSVC_LIB_DEPS_LLVMCodeGen LLVMAnalysis LLVMCore LLVMMC LLVMScalarOpts LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils)
 set(MSVC_LIB_DEPS_LLVMCore LLVMSupport LLVMSystem)
-set(MSVC_LIB_DEPS_LLVMCppBackend LLVMCore LLVMCppBackendInfo LLVMSupport LLVMSystem LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMCppBackend LLVMCore LLVMCppBackendInfo LLVMSupport LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMCppBackendInfo LLVMSupport)
 set(MSVC_LIB_DEPS_LLVMExecutionEngine LLVMCore LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMInstCombine LLVMAnalysis LLVMCore LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils)
@@ -30,43 +30,43 @@
 set(MSVC_LIB_DEPS_LLVMInterpreter LLVMCodeGen LLVMCore LLVMExecutionEngine LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMJIT LLVMCodeGen LLVMCore LLVMExecutionEngine LLVMMC LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMLinker LLVMArchive LLVMBitReader LLVMCore LLVMSupport LLVMSystem LLVMTransformUtils)
-set(MSVC_LIB_DEPS_LLVMMBlazeAsmPrinter LLVMMC LLVMSupport LLVMSystem)
-set(MSVC_LIB_DEPS_LLVMMBlazeCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMBlazeAsmPrinter LLVMMBlazeInfo LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMMBlazeAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMBlazeCodeGen LLVMMBlazeInfo LLVMMC LLVMSupport LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMMBlazeCodeGen LLVMCodeGen LLVMCore LLVMMBlazeInfo LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMMBlazeInfo LLVMSupport)
 set(MSVC_LIB_DEPS_LLVMMC LLVMSupport LLVMSystem)
-set(MSVC_LIB_DEPS_LLVMMCDisassembler LLVMARMAsmParser LLVMARMCodeGen LLVMARMDisassembler LLVMARMInfo LLVMAlphaAsmPrinter LLVMAlphaCodeGen LLVMAlphaInfo LLVMBlackfinAsmPrinter LLVMBlackfinCodeGen LLVMBlackfinInfo LLVMCBackend LLVMCBackendInfo LLVMCellSPUAsmPrinter LLVMCellSPUCodeGen LLVMCellSPUInfo LLVMCppBackend LLVMCppBackendInfo LLVMMBlazeCodeGen LLVMMBlazeInfo LLVMMC LLVMMCParser LLVMMSP430CodeGen LLVMMSP430Info LLVMMipsAsmPrinter LLVMMipsCodeGen LLVMMipsInfo LLVMPTXAsmPrinter LLVMPTXCodeGen LLVMPTXInfo LLVMPowerPCAsmPrinter LLVMPowerPCCodeGen LLVMPowerPCInfo LLVMSparcAsmPrinter LLVMSparcCodeGen LLVMSparcInfo LLVMSupport LLVMSystem LLVMSystemZAsmPrinter LLVMSystemZCodeGen LLVMSystemZInfo LLVMX86AsmParser LLVMX86CodeGen LLVMX86Disassembler LLVMX86Info LLVMXCoreAsmPrinter LLVMXCoreCodeGen LLVMXCoreInfo)
-set(MSVC_LIB_DEPS_LLVMMCParser LLVMMC LLVMSupport LLVMSystem)
-set(MSVC_LIB_DEPS_LLVMMSP430AsmPrinter LLVMMC LLVMSupport LLVMSystem)
+set(MSVC_LIB_DEPS_LLVMMCDisassembler LLVMARMAsmParser LLVMARMCodeGen LLVMARMDisassembler LLVMARMInfo LLVMAlphaAsmPrinter LLVMAlphaCodeGen LLVMAlphaInfo LLVMBlackfinAsmPrinter LLVMBlackfinCodeGen LLVMBlackfinInfo LLVMCBackend LLVMCBackendInfo LLVMCellSPUAsmPrinter LLVMCellSPUCodeGen LLVMCellSPUInfo LLVMCppBackend LLVMCppBackendInfo LLVMMBlazeAsmPrinter LLVMMBlazeCodeGen LLVMMBlazeInfo LLVMMC LLVMMCParser LLVMMSP430CodeGen LLVMMSP430Info LLVMMipsAsmPrinter LLVMMipsCodeGen LLVMMipsInfo LLVMPTXAsmPrinter LLVMPTXCodeGen LLVMPTXInfo LLVMPowerPCAsmPrinter LLVMPowerPCCodeGen LLVMPowerPCInfo LLVMSparcAsmPrinter LLVMSparcCodeGen LLVMSparcInfo LLVMSupport LLVMSystem LLVMSystemZAsmPrinter LLVMSystemZCodeGen LLVMSystemZInfo LLVMX86AsmParser LLVMX86CodeGen LLVMX86Disassembler LLVMX86Info LLVMXCoreAsmPrinter LLVMXCoreCodeGen LLVMXCoreInfo)
+set(MSVC_LIB_DEPS_LLVMMCParser LLVMMC LLVMSupport)
+set(MSVC_LIB_DEPS_LLVMMSP430AsmPrinter LLVMMC LLVMSupport)
 set(MSVC_LIB_DEPS_LLVMMSP430CodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMMSP430AsmPrinter LLVMMSP430Info LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMMSP430Info LLVMSupport)
-set(MSVC_LIB_DEPS_LLVMMipsAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMMipsCodeGen LLVMMipsInfo LLVMSupport LLVMSystem LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMMipsAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMMipsCodeGen LLVMMipsInfo LLVMSupport LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMMipsCodeGen LLVMCodeGen LLVMCore LLVMMC LLVMMipsInfo LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMMipsInfo LLVMSupport)
-set(MSVC_LIB_DEPS_LLVMPTXAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMPTXInfo LLVMSupport LLVMSystem)
-set(MSVC_LIB_DEPS_LLVMPTXCodeGen LLVMCodeGen LLVMCore LLVMMC LLVMPTXInfo LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMPTXAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMPTXCodeGen LLVMPTXInfo LLVMSupport)
+set(MSVC_LIB_DEPS_LLVMPTXCodeGen LLVMCodeGen LLVMCore LLVMMC LLVMPTXInfo LLVMSelectionDAG LLVMSupport LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMPTXInfo LLVMSupport)
-set(MSVC_LIB_DEPS_LLVMPowerPCAsmPrinter LLVMAnalysis LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMPowerPCInfo LLVMSupport LLVMSystem LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMPowerPCAsmPrinter LLVMAnalysis LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMPowerPCCodeGen LLVMPowerPCInfo LLVMSupport LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMPowerPCCodeGen LLVMCodeGen LLVMCore LLVMMC LLVMPowerPCInfo LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMPowerPCInfo LLVMSupport)
 set(MSVC_LIB_DEPS_LLVMScalarOpts LLVMAnalysis LLVMCore LLVMInstCombine LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils)
 set(MSVC_LIB_DEPS_LLVMSelectionDAG LLVMAnalysis LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget)
-set(MSVC_LIB_DEPS_LLVMSparcAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSparcInfo LLVMSupport LLVMSystem LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMSparcAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSparcCodeGen LLVMSparcInfo LLVMSupport LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMSparcCodeGen LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSparcInfo LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMSparcInfo LLVMSupport)
 set(MSVC_LIB_DEPS_LLVMSupport LLVMSystem)
 set(MSVC_LIB_DEPS_LLVMSystem )
-set(MSVC_LIB_DEPS_LLVMSystemZAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMSystemZInfo LLVMTarget)
-set(MSVC_LIB_DEPS_LLVMSystemZCodeGen LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMSystemZInfo LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMSystemZAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystemZCodeGen LLVMSystemZInfo LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMSystemZCodeGen LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystemZInfo LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMSystemZInfo LLVMSupport)
-set(MSVC_LIB_DEPS_LLVMTarget LLVMCore LLVMMC LLVMSupport LLVMSystem)
+set(MSVC_LIB_DEPS_LLVMTarget LLVMCore LLVMMC LLVMSupport)
 set(MSVC_LIB_DEPS_LLVMTransformUtils LLVMAnalysis LLVMCore LLVMSupport LLVMSystem LLVMTarget LLVMipa)
-set(MSVC_LIB_DEPS_LLVMX86AsmParser LLVMMC LLVMMCParser LLVMSupport LLVMSystem LLVMTarget LLVMX86Info)
-set(MSVC_LIB_DEPS_LLVMX86AsmPrinter LLVMMC LLVMSupport LLVMSystem)
+set(MSVC_LIB_DEPS_LLVMX86AsmParser LLVMMC LLVMMCParser LLVMSupport LLVMTarget LLVMX86Info)
+set(MSVC_LIB_DEPS_LLVMX86AsmPrinter LLVMMC LLVMSupport)
 set(MSVC_LIB_DEPS_LLVMX86CodeGen LLVMAnalysis LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget LLVMX86AsmPrinter LLVMX86Info)
 set(MSVC_LIB_DEPS_LLVMX86Disassembler LLVMMC LLVMSupport LLVMX86Info)
 set(MSVC_LIB_DEPS_LLVMX86Info LLVMSupport)
-set(MSVC_LIB_DEPS_LLVMXCoreAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget LLVMXCoreInfo)
-set(MSVC_LIB_DEPS_LLVMXCoreCodeGen LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget LLVMXCoreInfo)
+set(MSVC_LIB_DEPS_LLVMXCoreAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMTarget LLVMXCoreCodeGen LLVMXCoreInfo)
+set(MSVC_LIB_DEPS_LLVMXCoreCodeGen LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMTarget LLVMXCoreInfo)
 set(MSVC_LIB_DEPS_LLVMXCoreInfo LLVMSupport)
 set(MSVC_LIB_DEPS_LLVMipa LLVMAnalysis LLVMCore LLVMSupport LLVMSystem)
 set(MSVC_LIB_DEPS_LLVMipo LLVMAnalysis LLVMCore LLVMScalarOpts LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils LLVMipa)

Propchange: llvm/trunk/lib/Target/MBlaze/AsmPrinter/
------------------------------------------------------------------------------
--- svn:ignore (added)
+++ svn:ignore Wed Oct 20 22:34:22 2010
@@ -0,0 +1,9 @@
+Debug
+Release
+Release-Asserts
+Debug+Coverage-Asserts
+Debug+Coverage
+Release+Coverage
+Debug+Checks
+Debug+Asserts
+Release+Asserts

Modified: llvm/trunk/lib/Target/MBlaze/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/CMakeLists.txt?rev=116991&r1=116990&r2=116991&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/CMakeLists.txt (original)
+++ llvm/trunk/lib/Target/MBlaze/CMakeLists.txt Wed Oct 20 22:34:22 2010
@@ -5,7 +5,6 @@
 tablegen(MBlazeGenRegisterInfo.inc -gen-register-desc)
 tablegen(MBlazeGenInstrNames.inc -gen-instr-enums)
 tablegen(MBlazeGenInstrInfo.inc -gen-instr-desc)
-tablegen(MBlazeGenCodeEmitter.inc -gen-emitter)
 tablegen(MBlazeGenAsmWriter.inc -gen-asm-writer)
 tablegen(MBlazeGenDAGISel.inc -gen-dag-isel)
 tablegen(MBlazeGenCallingConv.inc -gen-callingconv)
@@ -24,9 +23,4 @@
   MBlazeTargetObjectFile.cpp
   MBlazeIntrinsicInfo.cpp
   MBlazeSelectionDAGInfo.cpp
-  MBlazeAsmPrinter.cpp
-  MBlazeAsmBackend.cpp
-  MBlazeMCInstLower.cpp
-  MBlazeELFWriterInfo.cpp
-  MBlazeMCCodeEmitter.cpp
   )

Modified: llvm/trunk/lib/Target/MBlaze/MBlaze.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlaze.h?rev=116991&r1=116990&r2=116991&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlaze.h (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlaze.h Wed Oct 20 22:34:22 2010
@@ -21,16 +21,8 @@
   class MBlazeTargetMachine;
   class FunctionPass;
   class MachineCodeEmitter;
-  class MCCodeEmitter;
-  class TargetAsmBackend;
   class formatted_raw_ostream;
 
-  MCCodeEmitter *createMBlazeMCCodeEmitter(const Target &,
-                                           TargetMachine &TM,
-                                           MCContext &Ctx);
-
-  TargetAsmBackend *createMBlazeAsmBackend(const Target &, const std::string &);
-
   FunctionPass *createMBlazeISelDag(MBlazeTargetMachine &TM);
   FunctionPass *createMBlazeDelaySlotFillerPass(MBlazeTargetMachine &TM);
 

Modified: llvm/trunk/lib/Target/MBlaze/MBlaze.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlaze.td?rev=116991&r1=116990&r2=116991&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlaze.td (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlaze.td Wed Oct 20 22:34:22 2010
@@ -32,35 +32,35 @@
 //===----------------------------------------------------------------------===//
 
 def FeaturePipe3       : SubtargetFeature<"pipe3", "HasPipe3", "true",
-                                "Implements 3-stage pipeline">;
+                                "Implements 3-stage pipeline.">;
 def FeatureBarrel      : SubtargetFeature<"barrel", "HasBarrel", "true",
-                                "Implements barrel shifter">;
+                                "Implements barrel shifter.">;
 def FeatureDiv         : SubtargetFeature<"div", "HasDiv", "true",
-                                "Implements hardware divider">;
+                                "Implements hardware divider.">;
 def FeatureMul         : SubtargetFeature<"mul", "HasMul", "true",
-                                "Implements hardware multiplier">;
+                                "Implements hardware multiplier.">;
 def FeatureFSL         : SubtargetFeature<"fsl", "HasFSL", "true",
-                                "Implements FSL instructions">;
+                                "Implements FSL instructions.">;
 def FeatureEFSL        : SubtargetFeature<"efsl", "HasEFSL", "true",
-                                "Implements extended FSL instructions">;
+                                "Implements extended FSL instructions.">;
 def FeatureMSRSet      : SubtargetFeature<"msrset", "HasMSRSet", "true",
-                                "Implements MSR register set and clear">;
+                                "Implements MSR register set and clear.">;
 def FeatureException   : SubtargetFeature<"exception", "HasException", "true",
-                                "Implements hardware exception support">;
+                                "Implements hardware exception support.">;
 def FeaturePatCmp      : SubtargetFeature<"patcmp", "HasPatCmp", "true",
-                                "Implements pattern compare instruction">;
+                                "Implements pattern compare instruction.">;
 def FeatureFPU         : SubtargetFeature<"fpu", "HasFPU", "true",
-                                "Implements floating point unit">;
+                                "Implements floating point unit.">;
 def FeatureESR         : SubtargetFeature<"esr", "HasESR", "true",
                                 "Implements ESR and EAR registers">;
 def FeaturePVR         : SubtargetFeature<"pvr", "HasPVR", "true",
-                                "Implements processor version register">;
+                                "Implements processor version register.">;
 def FeatureMul64       : SubtargetFeature<"mul64", "HasMul64", "true",
                                 "Implements multiplier with 64-bit result">;
 def FeatureSqrt        : SubtargetFeature<"sqrt", "HasSqrt", "true",
-                                "Implements sqrt and floating point convert">;
+                                "Implements sqrt and floating point convert.">;
 def FeatureMMU         : SubtargetFeature<"mmu", "HasMMU", "true",
-                                "Implements memory management unit">;
+                                "Implements memory management unit.">;
 
 //===----------------------------------------------------------------------===//
 // MBlaze processors supported.
@@ -69,26 +69,13 @@
 class Proc<string Name, list<SubtargetFeature> Features>
  : Processor<Name, MBlazeGenericItineraries, Features>;
 
+
 def : Proc<"v400", []>;
 def : Proc<"v500", []>;
 def : Proc<"v600", []>;
 def : Proc<"v700", []>;
 def : Proc<"v710", []>;
 
-//===----------------------------------------------------------------------===//
-// Instruction Descriptions
-//===----------------------------------------------------------------------===//
-
-def MBlazeAsmWriter : AsmWriter {
-  string AsmWriterClassName  = "InstPrinter";
-  bit isMCAsmWriter = 1;
-}
-
-//===----------------------------------------------------------------------===//
-// Target Declaration
-//===----------------------------------------------------------------------===//
-
 def MBlaze : Target {
   let InstructionSet = MBlazeInstrInfo;
-  let AssemblyWriters = [MBlazeAsmWriter];
 }

Removed: llvm/trunk/lib/Target/MBlaze/MBlazeAsmBackend.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeAsmBackend.cpp?rev=116990&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeAsmBackend.cpp (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeAsmBackend.cpp (removed)
@@ -1,152 +0,0 @@
-//===-- MBlazeAsmBackend.cpp - MBlaze Assembler Backend -------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#include "llvm/Target/TargetAsmBackend.h"
-#include "MBlaze.h"
-#include "MBlazeFixupKinds.h"
-#include "llvm/ADT/Twine.h"
-#include "llvm/MC/ELFObjectWriter.h"
-#include "llvm/MC/MCAssembler.h"
-#include "llvm/MC/MCExpr.h"
-#include "llvm/MC/MCObjectFormat.h"
-#include "llvm/MC/MCObjectWriter.h"
-#include "llvm/MC/MCSectionELF.h"
-#include "llvm/MC/MCSectionMachO.h"
-#include "llvm/MC/MachObjectWriter.h"
-#include "llvm/Support/ErrorHandling.h"
-#include "llvm/Support/raw_ostream.h"
-#include "llvm/Target/TargetRegistry.h"
-#include "llvm/Target/TargetAsmBackend.h"
-using namespace llvm;
-
-static unsigned getFixupKindSize(unsigned Kind) {
-  switch (Kind) {
-  default: assert(0 && "invalid fixup kind!");
-  case FK_Data_1: return 1;
-  case MBlaze::reloc_pcrel_2byte:
-  case FK_Data_2: return 2;
-  case MBlaze::reloc_pcrel_4byte:
-  case FK_Data_4: return 4;
-  case FK_Data_8: return 8;
-  }
-}
-
-
-namespace {
-class MBlazeAsmBackend : public TargetAsmBackend {
-public:
-  MBlazeAsmBackend(const Target &T)
-    : TargetAsmBackend(T) {
-  }
-
-  bool MayNeedRelaxation(const MCInst &Inst) const;
-
-  void RelaxInstruction(const MCInst &Inst, MCInst &Res) const;
-
-  bool WriteNopData(uint64_t Count, MCObjectWriter *OW) const;
-
-  unsigned getPointerSize() const {
-    return 4;
-  }
-};
-
-bool MBlazeAsmBackend::MayNeedRelaxation(const MCInst &Inst) const {
-  return false;
-}
-
-void MBlazeAsmBackend::RelaxInstruction(const MCInst &Inst, MCInst &Res) const {
-  assert(0 && "MBlazeAsmBackend::RelaxInstruction() unimplemented");
-  return;
-}
-
-bool MBlazeAsmBackend::WriteNopData(uint64_t Count, MCObjectWriter *OW) const {
-  if ((Count % 4) != 0)
-    return false;
-
-  for (uint64_t i = 0; i < Count; i += 4 )
-      OW->Write32( 0x00000000 );
-
-  return true;
-}
-} // end anonymous namespace
-
-namespace {
-// FIXME: This should be in a separate file.
-// ELF is an ELF of course...
-class ELFMBlazeAsmBackend : public MBlazeAsmBackend {
-  MCELFObjectFormat Format;
-
-public:
-  Triple::OSType OSType;
-  ELFMBlazeAsmBackend(const Target &T, Triple::OSType _OSType)
-    : MBlazeAsmBackend(T), OSType(_OSType) {
-    HasScatteredSymbols = true;
-  }
-
-  virtual const MCObjectFormat &getObjectFormat() const {
-    return Format;
-  }
-
-
-  void ApplyFixup(const MCFixup &Fixup, MCDataFragment &DF,
-                  uint64_t Value) const;
-
-  bool isVirtualSection(const MCSection &Section) const {
-    const MCSectionELF &SE = static_cast<const MCSectionELF&>(Section);
-    return SE.getType() == MCSectionELF::SHT_NOBITS;
-  }
-
-  MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
-    return new ELFObjectWriter(OS, /*Is64Bit=*/false,
-                               OSType,
-                               /*IsLittleEndian=*/false,
-                               /*HasRelocationAddend=*/true);
-  }
-};
-
-void ELFMBlazeAsmBackend::ApplyFixup(const MCFixup &Fixup, MCDataFragment &DF,
-                                     uint64_t Value) const {
-  unsigned Size = getFixupKindSize(Fixup.getKind());
-            
-  assert(Fixup.getOffset() + Size <= DF.getContents().size() &&
-         "Invalid fixup offset!");
-
-  char *data = DF.getContents().data() + Fixup.getOffset();
-  switch (Size) {
-  default: llvm_unreachable( "Cannot fixup unknown value." );
-  case 1:  llvm_unreachable( "Cannot fixup 1 byte value." );
-  case 8:  llvm_unreachable( "Cannot fixup 8 byte value." );
-
-  case 4: 
-    *(data+7) = uint8_t(Value);
-    *(data+6) = uint8_t(Value >> 8);
-    *(data+3) = uint8_t(Value >> 16);
-    *(data+2) = uint8_t(Value >> 24);
-    break;
-
-  case 2:
-    *(data+3) = uint8_t(Value >> 0);
-    *(data+2) = uint8_t(Value >> 8);
-  }
-}
-} // end anonymous namespace
-
-TargetAsmBackend *llvm::createMBlazeAsmBackend(const Target &T,
-                                            const std::string &TT) {
-  switch (Triple(TT).getOS()) {
-  case Triple::Darwin:
-    assert(0 && "Mac not supported on MBlaze");
-  case Triple::MinGW32:
-  case Triple::Cygwin:
-  case Triple::Win32:
-    assert(0 && "Windows not supported on MBlaze");
-  default:
-    return new ELFMBlazeAsmBackend(T, Triple(TT).getOS());
-  }
-}

Removed: llvm/trunk/lib/Target/MBlaze/MBlazeAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeAsmPrinter.cpp?rev=116990&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeAsmPrinter.cpp (removed)
@@ -1,314 +0,0 @@
-//===-- MBlazeAsmPrinter.cpp - MBlaze LLVM assembly writer ----------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file contains a printer that converts from our internal representation
-// of machine-dependent LLVM code to GAS-format MBlaze assembly language.
-//
-//===----------------------------------------------------------------------===//
-
-#define DEBUG_TYPE "mblaze-asm-printer"
-
-#include "MBlaze.h"
-#include "MBlazeSubtarget.h"
-#include "MBlazeInstrInfo.h"
-#include "MBlazeTargetMachine.h"
-#include "MBlazeMachineFunction.h"
-#include "MBlazeMCInstLower.h"
-#include "InstPrinter/MBlazeInstPrinter.h"
-#include "llvm/Constants.h"
-#include "llvm/DerivedTypes.h"
-#include "llvm/Module.h"
-#include "llvm/CodeGen/AsmPrinter.h"
-#include "llvm/CodeGen/MachineFunctionPass.h"
-#include "llvm/CodeGen/MachineConstantPool.h"
-#include "llvm/CodeGen/MachineFrameInfo.h"
-#include "llvm/CodeGen/MachineInstr.h"
-#include "llvm/MC/MCInst.h"
-#include "llvm/MC/MCStreamer.h"
-#include "llvm/MC/MCAsmInfo.h"
-#include "llvm/MC/MCSymbol.h"
-#include "llvm/Target/Mangler.h"
-#include "llvm/Target/TargetData.h"
-#include "llvm/Target/TargetLoweringObjectFile.h"
-#include "llvm/Target/TargetMachine.h"
-#include "llvm/Target/TargetOptions.h"
-#include "llvm/Target/TargetRegistry.h"
-#include "llvm/ADT/SmallString.h"
-#include "llvm/ADT/StringExtras.h"
-#include "llvm/Support/ErrorHandling.h"
-#include "llvm/Support/raw_ostream.h"
-#include <cctype>
-
-using namespace llvm;
-
-namespace {
-  class MBlazeAsmPrinter : public AsmPrinter {
-    const MBlazeSubtarget *Subtarget;
-  public:
-    explicit MBlazeAsmPrinter(TargetMachine &TM, MCStreamer &Streamer)
-      : AsmPrinter(TM, Streamer) {
-      Subtarget = &TM.getSubtarget<MBlazeSubtarget>();
-    }
-
-    virtual const char *getPassName() const {
-      return "MBlaze Assembly Printer";
-    }
-
-    bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
-                         unsigned AsmVariant, const char *ExtraCode,
-                         raw_ostream &O);
-    void printOperand(const MachineInstr *MI, int opNum, raw_ostream &O);
-    void printUnsignedImm(const MachineInstr *MI, int opNum, raw_ostream &O);
-    void printFSLImm(const MachineInstr *MI, int opNum, raw_ostream &O);
-    void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O,
-                         const char *Modifier = 0);
-    void printSavedRegsBitmask(raw_ostream &OS);
-
-    void emitFrameDirective();
-
-    void EmitInstruction(const MachineInstr *MI); 
-    virtual void EmitFunctionBodyStart();
-    virtual void EmitFunctionBodyEnd();
-
-    virtual void EmitFunctionEntryLabel();
-  };
-} // end of anonymous namespace
-
-// #include "MBlazeGenAsmWriter.inc"
-
-//===----------------------------------------------------------------------===//
-//
-//  MBlaze Asm Directives
-//
-//  -- Frame directive "frame Stackpointer, Stacksize, RARegister"
-//  Describe the stack frame.
-//
-//  -- Mask directives "mask  bitmask, offset"
-//  Tells the assembler which registers are saved and where.
-//  bitmask - contain a little endian bitset indicating which registers are
-//            saved on function prologue (e.g. with a 0x80000000 mask, the
-//            assembler knows the register 31 (RA) is saved at prologue.
-//  offset  - the position before stack pointer subtraction indicating where
-//            the first saved register on prologue is located. (e.g. with a
-//
-//  Consider the following function prologue:
-//
-//    .frame  R19,48,R15
-//    .mask   0xc0000000,-8
-//       addiu R1, R1, -48
-//       sw R15, 40(R1)
-//       sw R19, 36(R1)
-//
-//    With a 0xc0000000 mask, the assembler knows the register 15 (R15) and
-//    19 (R19) are saved at prologue. As the save order on prologue is from
-//    left to right, R15 is saved first. A -8 offset means that after the
-//    stack pointer subtration, the first register in the mask (R15) will be
-//    saved at address 48-8=40.
-//
-//===----------------------------------------------------------------------===//
-
-//===----------------------------------------------------------------------===//
-void MBlazeAsmPrinter::EmitInstruction(const MachineInstr *MI) {
-  MBlazeMCInstLower MCInstLowering(OutContext, *Mang, *this);
-
-  MCInst TmpInst;
-  MCInstLowering.Lower(MI, TmpInst);
-  OutStreamer.EmitInstruction(TmpInst);
-}
-
-//===----------------------------------------------------------------------===//
-// Mask directives
-//===----------------------------------------------------------------------===//
-
-// Print a 32 bit hex number with all numbers.
-static void printHex32(unsigned int Value, raw_ostream &O) {
-  O << "0x";
-  for (int i = 7; i >= 0; i--)
-    O << utohexstr((Value & (0xF << (i*4))) >> (i*4));
-}
-
-
-// Create a bitmask with all callee saved registers for CPU or Floating Point
-// registers. For CPU registers consider RA, GP and FP for saving if necessary.
-void MBlazeAsmPrinter::printSavedRegsBitmask(raw_ostream &O) {
-  const TargetRegisterInfo &RI = *TM.getRegisterInfo();
-  const MBlazeFunctionInfo *MBlazeFI = MF->getInfo<MBlazeFunctionInfo>();
-
-  // CPU Saved Registers Bitmasks
-  unsigned int CPUBitmask = 0;
-
-  // Set the CPU Bitmasks
-  const MachineFrameInfo *MFI = MF->getFrameInfo();
-  const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
-  for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
-    unsigned Reg = CSI[i].getReg();
-    unsigned RegNum = MBlazeRegisterInfo::getRegisterNumbering(Reg);
-    if (MBlaze::CPURegsRegisterClass->contains(Reg))
-      CPUBitmask |= (1 << RegNum);
-  }
-
-  // Return Address and Frame registers must also be set in CPUBitmask.
-  if (RI.hasFP(*MF))
-    CPUBitmask |= (1 << MBlazeRegisterInfo::
-                getRegisterNumbering(RI.getFrameRegister(*MF)));
-
-  if (MFI->adjustsStack())
-    CPUBitmask |= (1 << MBlazeRegisterInfo::
-                getRegisterNumbering(RI.getRARegister()));
-
-  // Print CPUBitmask
-  O << "\t.mask \t"; printHex32(CPUBitmask, O);
-  O << ',' << MBlazeFI->getCPUTopSavedRegOff() << '\n';
-}
-
-//===----------------------------------------------------------------------===//
-// Frame and Set directives
-//===----------------------------------------------------------------------===//
-
-/// Frame Directive
-void MBlazeAsmPrinter::emitFrameDirective() {
-  // const TargetRegisterInfo &RI = *TM.getRegisterInfo();
-
-  // unsigned stackReg  = RI.getFrameRegister(*MF);
-  // unsigned returnReg = RI.getRARegister();
-  // unsigned stackSize = MF->getFrameInfo()->getStackSize();
-
-
-  /*
-  OutStreamer.EmitRawText("\t.frame\t" + 
-                          Twine(MBlazeInstPrinter::getRegisterName(stackReg)) +
-                          "," + Twine(stackSize) + "," +
-                          Twine(MBlazeInstPrinter::getRegisterName(returnReg)));
-  */
-}
-
-void MBlazeAsmPrinter::EmitFunctionEntryLabel() {
-  // OutStreamer.EmitRawText("\t.ent\t" + Twine(CurrentFnSym->getName()));
-  OutStreamer.EmitLabel(CurrentFnSym);
-}
-
-/// EmitFunctionBodyStart - Targets can override this to emit stuff before
-/// the first basic block in the function.
-void MBlazeAsmPrinter::EmitFunctionBodyStart() {
-  // emitFrameDirective();
-  
-  // SmallString<128> Str;
-  // raw_svector_ostream OS(Str);
-  // printSavedRegsBitmask(OS);
-  // OutStreamer.EmitRawText(OS.str());
-}
-
-/// EmitFunctionBodyEnd - Targets can override this to emit stuff after
-/// the last basic block in the function.
-void MBlazeAsmPrinter::EmitFunctionBodyEnd() {
-  // OutStreamer.EmitRawText("\t.end\t" + Twine(CurrentFnSym->getName()));
-}
-
-// Print out an operand for an inline asm expression.
-bool MBlazeAsmPrinter::
-PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
-                unsigned AsmVariant,const char *ExtraCode, raw_ostream &O) {
-  // Does this asm operand have a single letter operand modifier?
-  if (ExtraCode && ExtraCode[0])
-    return true; // Unknown modifier.
-
-  printOperand(MI, OpNo, O);
-  return false;
-}
-
-void MBlazeAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
-                                    raw_ostream &O) {
-  const MachineOperand &MO = MI->getOperand(opNum);
-
-  switch (MO.getType()) {
-  case MachineOperand::MO_Register:
-    O << MBlazeInstPrinter::getRegisterName(MO.getReg());
-    break;
-
-  case MachineOperand::MO_Immediate:
-    O << (int)MO.getImm();
-    break;
-
-  case MachineOperand::MO_FPImmediate: {
-    const ConstantFP *fp = MO.getFPImm();
-    printHex32(fp->getValueAPF().bitcastToAPInt().getZExtValue(), O);
-    O << ";\t# immediate = " << *fp;
-    break;
-  }
-
-  case MachineOperand::MO_MachineBasicBlock:
-    O << *MO.getMBB()->getSymbol();
-    return;
-
-  case MachineOperand::MO_GlobalAddress:
-    O << *Mang->getSymbol(MO.getGlobal());
-    break;
-
-  case MachineOperand::MO_ExternalSymbol:
-    O << *GetExternalSymbolSymbol(MO.getSymbolName());
-    break;
-
-  case MachineOperand::MO_JumpTableIndex:
-    O << MAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
-      << '_' << MO.getIndex();
-    break;
-
-  case MachineOperand::MO_ConstantPoolIndex:
-    O << MAI->getPrivateGlobalPrefix() << "CPI"
-      << getFunctionNumber() << "_" << MO.getIndex();
-    if (MO.getOffset())
-      O << "+" << MO.getOffset();
-    break;
-
-  default:
-    llvm_unreachable("<unknown operand type>");
-  }
-}
-
-void MBlazeAsmPrinter::printUnsignedImm(const MachineInstr *MI, int opNum,
-                                        raw_ostream &O) {
-  const MachineOperand &MO = MI->getOperand(opNum);
-  if (MO.isImm())
-    O << (unsigned int)MO.getImm();
-  else
-    printOperand(MI, opNum, O);
-}
-
-void MBlazeAsmPrinter::printFSLImm(const MachineInstr *MI, int opNum,
-                                   raw_ostream &O) {
-  const MachineOperand &MO = MI->getOperand(opNum);
-  if (MO.isImm())
-    O << "rfsl" << (unsigned int)MO.getImm();
-  else
-    printOperand(MI, opNum, O);
-}
-
-void MBlazeAsmPrinter::
-printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O,
-                const char *Modifier) {
-  printOperand(MI, opNum+1, O);
-  O << ", ";
-  printOperand(MI, opNum, O);
-}
-
-static MCInstPrinter *createMBlazeMCInstPrinter(const Target &T,
-                                                unsigned SyntaxVariant,
-                                                const MCAsmInfo &MAI) {
-  if (SyntaxVariant == 0)
-    return new MBlazeInstPrinter(MAI);
-  return 0;
-}
-
-// Force static initialization.
-extern "C" void LLVMInitializeMBlazeAsmPrinter() {
-  RegisterAsmPrinter<MBlazeAsmPrinter> X(TheMBlazeTarget);
-  TargetRegistry::RegisterMCInstPrinter(TheMBlazeTarget,
-                                        createMBlazeMCInstPrinter);
-
-}

Modified: llvm/trunk/lib/Target/MBlaze/MBlazeDelaySlotFiller.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeDelaySlotFiller.cpp?rev=116991&r1=116990&r2=116991&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeDelaySlotFiller.cpp (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeDelaySlotFiller.cpp Wed Oct 20 22:34:22 2010
@@ -19,10 +19,6 @@
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/ADT/Statistic.h"
-#include "llvm/Support/CommandLine.h"
-#include "llvm/Support/Debug.h"
-#include "llvm/Support/ErrorHandling.h"
-#include "llvm/Support/raw_ostream.h"
 
 using namespace llvm;
 
@@ -55,91 +51,6 @@
   char Filler::ID = 0;
 } // end of anonymous namespace
 
-static bool hasImmInstruction( MachineBasicBlock::iterator &candidate ) {
-    // Any instruction with an immediate mode operand greater than
-    // 16-bits requires an implicit IMM instruction.
-    unsigned numOper = candidate->getNumOperands();
-    for( unsigned op = 0; op < numOper; ++op ) {
-        if( candidate->getOperand(op).isImm() &&
-            (candidate->getOperand(op).getImm() & 0xFFFFFFFFFFFF0000LL) != 0 )
-            return true;
-
-        // FIXME: we could probably check to see if the FP value happens
-        //        to not need an IMM instruction. For now we just always
-        //        assume that FP values always do.
-        if( candidate->getOperand(op).isFPImm() )
-            return true;
-    }
-
-    return false;
-}
-
-static bool delayHasHazard( MachineBasicBlock::iterator &candidate,
-                            MachineBasicBlock::iterator &slot ) {
-
-    // Loop over all of the operands in the branch instruction
-    // and make sure that none of them are defined by the
-    // candidate instruction.
-    unsigned numOper = slot->getNumOperands();
-    for( unsigned op = 0; op < numOper; ++op ) {
-        if( !slot->getOperand(op).isReg() || 
-            !slot->getOperand(op).isUse() ||
-            slot->getOperand(op).isImplicit() )
-            continue;
-
-        unsigned cnumOper = candidate->getNumOperands();
-        for( unsigned cop = 0; cop < cnumOper; ++cop ) {
-            if( candidate->getOperand(cop).isReg() &&
-                candidate->getOperand(cop).isDef() &&
-                candidate->getOperand(cop).getReg() == 
-                slot->getOperand(op).getReg() )
-                return true;
-        }
-    }
-
-    // There are no hazards between the two instructions
-    return false;
-}
-
-static bool usedBeforeDelaySlot( MachineBasicBlock::iterator &candidate,
-                                 MachineBasicBlock::iterator &slot ) {
-  MachineBasicBlock::iterator I = candidate;
-  for (++I; I != slot; ++I) {
-        unsigned numOper = I->getNumOperands();
-        for( unsigned op = 0; op < numOper; ++op ) {
-            if( I->getOperand(op).isReg() &&
-                I->getOperand(op).isUse() ) {
-                unsigned reg = I->getOperand(op).getReg();
-                unsigned cops = candidate->getNumOperands();
-                for( unsigned cop = 0; cop < cops; ++cop ) {
-                    if( candidate->getOperand(cop).isReg() &&
-                        candidate->getOperand(cop).isDef() &&
-                        candidate->getOperand(cop).getReg() == reg )
-                        return true;
-                }
-            }
-        }
-  }
-
-  return false;
-}
-
-static MachineBasicBlock::iterator
-findDelayInstr(MachineBasicBlock &MBB,MachineBasicBlock::iterator &slot) {
-  MachineBasicBlock::iterator found = MBB.end();
-  for (MachineBasicBlock::iterator I = MBB.begin(); I != slot; ++I) {
-      TargetInstrDesc desc = I->getDesc();
-      if( desc.hasDelaySlot() || desc.isBranch() || 
-          desc.mayLoad() || desc.    mayStore() || 
-          hasImmInstruction(I) || delayHasHazard(I,slot) || 
-          usedBeforeDelaySlot(I,slot)) continue;
-
-      found = I;
-  }
-
-  return found;
-}
-
 /// runOnMachineBasicBlock - Fill in delay slots for the given basic block.
 /// Currently, we fill delay slots with NOPs. We assume there is only one
 /// delay slot per delayed instruction.
@@ -148,16 +59,10 @@
   for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); ++I)
     if (I->getDesc().hasDelaySlot()) {
       MachineBasicBlock::iterator J = I;
-      MachineBasicBlock::iterator D = findDelayInstr(MBB,I);
-
       ++J;
+      BuildMI(MBB, J, I->getDebugLoc(), TII->get(MBlaze::NOP));
       ++FilledSlots;
       Changed = true;
-
-      if( D == MBB.end() )
-        BuildMI(MBB, J, I->getDebugLoc(), TII->get(MBlaze::NOP));
-      else
-        MBB.splice( J, &MBB, D );
     }
   return Changed;
 }

Removed: llvm/trunk/lib/Target/MBlaze/MBlazeELFWriterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeELFWriterInfo.cpp?rev=116990&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeELFWriterInfo.cpp (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeELFWriterInfo.cpp (removed)
@@ -1,110 +0,0 @@
-//===-- MBlazeELFWriterInfo.cpp - ELF Writer Info for the MBlaze backend --===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file implements ELF writer information for the MBlaze backend.
-//
-//===----------------------------------------------------------------------===//
-
-#include "MBlazeELFWriterInfo.h"
-#include "MBlazeRelocations.h"
-#include "llvm/Function.h"
-#include "llvm/Support/ErrorHandling.h"
-#include "llvm/Target/TargetData.h"
-#include "llvm/Target/TargetMachine.h"
-
-using namespace llvm;
-
-//===----------------------------------------------------------------------===//
-//  Implementation of the MBlazeELFWriterInfo class
-//===----------------------------------------------------------------------===//
-
-MBlazeELFWriterInfo::MBlazeELFWriterInfo(TargetMachine &TM)
-  : TargetELFWriterInfo(TM.getTargetData()->getPointerSizeInBits() == 64,
-                        TM.getTargetData()->isLittleEndian()) {
-}
-
-MBlazeELFWriterInfo::~MBlazeELFWriterInfo() {}
-
-unsigned MBlazeELFWriterInfo::getRelocationType(unsigned MachineRelTy) const {
-  switch(MachineRelTy) {
-  case MBlaze::reloc_pcrel_word:
-    return R_MICROBLAZE_64_PCREL;
-  case MBlaze::reloc_absolute_word:
-    return R_MICROBLAZE_NONE;
-  default:
-    llvm_unreachable("unknown mblaze machine relocation type");
-  }
-  return 0;
-}
-
-long int MBlazeELFWriterInfo::getDefaultAddendForRelTy(unsigned RelTy,
-                                                    long int Modifier) const {
-  switch(RelTy) {
-  case R_MICROBLAZE_32_PCREL:
-    return Modifier - 4;
-  case R_MICROBLAZE_32:
-    return Modifier;
-  default:
-    llvm_unreachable("unknown mblaze relocation type");
-  }
-  return 0;
-}
-
-unsigned MBlazeELFWriterInfo::getRelocationTySize(unsigned RelTy) const {
-  // FIXME: Most of these sizes are guesses based on the name
-  switch(RelTy) {
-  case R_MICROBLAZE_32:
-  case R_MICROBLAZE_32_PCREL:
-  case R_MICROBLAZE_32_PCREL_LO:
-  case R_MICROBLAZE_32_LO:
-  case R_MICROBLAZE_SRO32:
-  case R_MICROBLAZE_SRW32:
-  case R_MICROBLAZE_32_SYM_OP_SYM:
-  case R_MICROBLAZE_GOTOFF_32:
-    return 32;
-
-  case R_MICROBLAZE_64_PCREL:
-  case R_MICROBLAZE_64:
-  case R_MICROBLAZE_GOTPC_64:
-  case R_MICROBLAZE_GOT_64:
-  case R_MICROBLAZE_PLT_64:
-  case R_MICROBLAZE_GOTOFF_64:
-    return 64;
-  }
-
-  return 0;
-}
-
-bool MBlazeELFWriterInfo::isPCRelativeRel(unsigned RelTy) const {
-  // FIXME: Most of these are guesses based on the name
-  switch(RelTy) {
-  case R_MICROBLAZE_32_PCREL:
-  case R_MICROBLAZE_64_PCREL:
-  case R_MICROBLAZE_32_PCREL_LO:
-  case R_MICROBLAZE_GOTPC_64:
-    return true;
-  }
-
-  return false;
-}
-
-unsigned MBlazeELFWriterInfo::getAbsoluteLabelMachineRelTy() const {
-  return MBlaze::reloc_absolute_word;
-}
-
-long int MBlazeELFWriterInfo::computeRelocation(unsigned SymOffset,
-                                                unsigned RelOffset,
-                                                unsigned RelTy) const {
-  if (RelTy == R_MICROBLAZE_32_PCREL || R_MICROBLAZE_64_PCREL)
-    return SymOffset - (RelOffset + 4);
-  else
-    assert("computeRelocation unknown for this relocation type");
-
-  return 0;
-}

Removed: llvm/trunk/lib/Target/MBlaze/MBlazeELFWriterInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeELFWriterInfo.h?rev=116990&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeELFWriterInfo.h (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeELFWriterInfo.h (removed)
@@ -1,85 +0,0 @@
-//===-- MBlazeELFWriterInfo.h - ELF Writer Info for MBlaze ------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file implements ELF writer information for the MBlaze backend.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef MBLAZE_ELF_WRITER_INFO_H
-#define MBLAZE_ELF_WRITER_INFO_H
-
-#include "llvm/Target/TargetELFWriterInfo.h"
-
-namespace llvm {
-
-  class MBlazeELFWriterInfo : public TargetELFWriterInfo {
-
-    // ELF Relocation types for MBlaze
-    enum MBlazeRelocationType {
-      R_MICROBLAZE_NONE = 0,
-      R_MICROBLAZE_32 = 1,
-      R_MICROBLAZE_32_PCREL = 2,
-      R_MICROBLAZE_64_PCREL = 3,
-      R_MICROBLAZE_32_PCREL_LO = 4,
-      R_MICROBLAZE_64 = 5,
-      R_MICROBLAZE_32_LO = 6,
-      R_MICROBLAZE_SRO32 = 7,
-      R_MICROBLAZE_SRW32 = 8,
-      R_MICROBLAZE_64_NONE = 9, 
-      R_MICROBLAZE_32_SYM_OP_SYM = 10,
-      R_MICROBLAZE_GNU_VTINHERIT = 11,
-      R_MICROBLAZE_GNU_VTENTRY = 12,
-      R_MICROBLAZE_GOTPC_64 = 13,
-      R_MICROBLAZE_GOT_64 = 14,
-      R_MICROBLAZE_PLT_64 = 15,
-      R_MICROBLAZE_REL = 16,
-      R_MICROBLAZE_JUMP_SLOT = 17,
-      R_MICROBLAZE_GLOB_DAT = 18,
-      R_MICROBLAZE_GOTOFF_64 = 19,
-      R_MICROBLAZE_GOTOFF_32 = 20,
-      R_MICROBLAZE_COPY = 21
-    };
-
-  public:
-    MBlazeELFWriterInfo(TargetMachine &TM);
-    virtual ~MBlazeELFWriterInfo();
-
-    /// getRelocationType - Returns the target specific ELF Relocation type.
-    /// 'MachineRelTy' contains the object code independent relocation type
-    virtual unsigned getRelocationType(unsigned MachineRelTy) const;
-
-    /// hasRelocationAddend - True if the target uses an addend in the
-    /// ELF relocation entry.
-    virtual bool hasRelocationAddend() const { return false; }
-
-    /// getDefaultAddendForRelTy - Gets the default addend value for a
-    /// relocation entry based on the target ELF relocation type.
-    virtual long int getDefaultAddendForRelTy(unsigned RelTy,
-                                              long int Modifier = 0) const;
-
-    /// getRelTySize - Returns the size of relocatable field in bits
-    virtual unsigned getRelocationTySize(unsigned RelTy) const;
-
-    /// isPCRelativeRel - True if the relocation type is pc relative
-    virtual bool isPCRelativeRel(unsigned RelTy) const;
-
-    /// getJumpTableRelocationTy - Returns the machine relocation type used
-    /// to reference a jumptable.
-    virtual unsigned getAbsoluteLabelMachineRelTy() const;
-
-    /// computeRelocation - Some relocatable fields could be relocated
-    /// directly, avoiding the relocation symbol emission, compute the
-    /// final relocation value for this symbol.
-    virtual long int computeRelocation(unsigned SymOffset, unsigned RelOffset,
-                                       unsigned RelTy) const;
-  };
-
-} // end llvm namespace
-
-#endif // MBLAZE_ELF_WRITER_INFO_H

Removed: llvm/trunk/lib/Target/MBlaze/MBlazeFixupKinds.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeFixupKinds.h?rev=116990&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeFixupKinds.h (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeFixupKinds.h (removed)
@@ -1,24 +0,0 @@
-//===-- MBlaze/MBlazeFixupKinds.h - MBlaze Fixup Entries --------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_MBLAZE_MBLAZEFIXUPKINDS_H
-#define LLVM_MBLAZE_MBLAZEFIXUPKINDS_H
-
-#include "llvm/MC/MCFixup.h"
-
-namespace llvm {
-namespace MBlaze {
-enum Fixups {
-  reloc_pcrel_4byte = FirstTargetFixupKind,  // 32-bit pcrel, e.g. a brlid
-  reloc_pcrel_2byte                          // 16-bit pcrel, e.g. beqid
-};
-}
-}
-
-#endif

Modified: llvm/trunk/lib/Target/MBlaze/MBlazeISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeISelLowering.cpp?rev=116991&r1=116990&r2=116991&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeISelLowering.cpp Wed Oct 20 22:34:22 2010
@@ -421,11 +421,13 @@
   SDValue HiPart;
   // FIXME there isn't actually debug info here
   DebugLoc dl = Op.getDebugLoc();
+  bool IsPIC = getTargetMachine().getRelocationModel() == Reloc::PIC_;
+  unsigned char OpFlag = IsPIC ? MBlazeII::MO_GOT : MBlazeII::MO_ABS_HILO;
 
   EVT PtrVT = Op.getValueType();
   JumpTableSDNode *JT  = cast<JumpTableSDNode>(Op);
 
-  SDValue JTI = DAG.getTargetJumpTable(JT->getIndex(), PtrVT, 0 );
+  SDValue JTI = DAG.getTargetJumpTable(JT->getIndex(), PtrVT, OpFlag);
   return DAG.getNode(MBlazeISD::Wrap, dl, MVT::i32, JTI);
   //return JTI;
 }
@@ -438,7 +440,7 @@
   DebugLoc dl = Op.getDebugLoc();
 
   SDValue CP = DAG.getTargetConstantPool(C, MVT::i32, N->getAlignment(),
-                                         N->getOffset(), 0 );
+                                         N->getOffset(), MBlazeII::MO_ABS_HILO);
   return DAG.getNode(MBlazeISD::Wrap, dl, MVT::i32, CP);
 }
 
@@ -616,12 +618,13 @@
   // If the callee is a GlobalAddress/ExternalSymbol node (quite common, every
   // direct call is) turn it into a TargetGlobalAddress/TargetExternalSymbol
   // node so that legalize doesn't hack it.
+  unsigned char OpFlag = MBlazeII::MO_NO_FLAG;
   if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee))
     Callee = DAG.getTargetGlobalAddress(G->getGlobal(), dl,
-                                getPointerTy(), 0, 0 );
+                                getPointerTy(), 0, OpFlag);
   else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee))
     Callee = DAG.getTargetExternalSymbol(S->getSymbol(),
-                                getPointerTy(), 0 );
+                                getPointerTy(), OpFlag);
 
   // MBlazeJmpLink = #chain, #target_address, #opt_in_flags...
   //             = Chain, Callee, Reg#1, Reg#2, ...

Modified: llvm/trunk/lib/Target/MBlaze/MBlazeInstrFPU.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeInstrFPU.td?rev=116991&r1=116990&r2=116991&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeInstrFPU.td (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeInstrFPU.td Wed Oct 20 22:34:22 2010
@@ -24,9 +24,9 @@
                 [(set FGR32:$dst, (OpNode xaddr:$addr))], IILoad>;
 
 class LoadFMI<bits<6> op, string instr_asm, PatFrag OpNode> :
-              TB<op, (outs FGR32:$dst), (ins memri:$addr),
-                 !strconcat(instr_asm, "   $dst, $addr"),
-                 [(set FGR32:$dst, (OpNode iaddr:$addr))], IILoad>;
+              TAI<op, (outs FGR32:$dst), (ins memri:$addr),
+                  !strconcat(instr_asm, "   $dst, $addr"),
+                  [(set FGR32:$dst, (OpNode iaddr:$addr))], IILoad>;
 
 class StoreFM<bits<6> op, string instr_asm, PatFrag OpNode> :
               TA<op, 0x000, (outs), (ins FGR32:$dst, memrr:$addr),
@@ -34,9 +34,9 @@
                  [(OpNode FGR32:$dst, xaddr:$addr)], IIStore>;
 
 class StoreFMI<bits<6> op, string instr_asm, PatFrag OpNode> :
-               TB<op, (outs), (ins FGR32:$dst, memrr:$addr),
-                  !strconcat(instr_asm, "   $dst, $addr"),
-                  [(OpNode FGR32:$dst, iaddr:$addr)], IIStore>;
+               TAI<op, (outs), (ins FGR32:$dst, memrr:$addr),
+                   !strconcat(instr_asm, "   $dst, $addr"),
+                   [(OpNode FGR32:$dst, iaddr:$addr)], IIStore>;
 
 class ArithF<bits<6> op, bits<11> flags, string instr_asm, SDNode OpNode,
              InstrItinClass itin> :
@@ -56,35 +56,35 @@
                 !strconcat(instr_asm, "   $dst, $c, $b"),
                 [(set FGR32:$dst, (OpNode FGR32:$b, FGR32:$c))], itin>;
 
+class ArithF2<bits<6> op, bits<11> flags, string instr_asm,
+              InstrItinClass itin> :
+              TF<op, flags, (outs FGR32:$dst), (ins FGR32:$b),
+                 !strconcat(instr_asm, "   $dst, $b"),
+                 [], itin>;
+
+class ArithIF<bits<6> op, bits<11> flags, string instr_asm,
+              InstrItinClass itin> :
+              TF<op, flags, (outs FGR32:$dst), (ins CPURegs:$b),
+                 !strconcat(instr_asm, "   $dst, $b"),
+                 [], itin>;
+
+class ArithFI<bits<6> op, bits<11> flags, string instr_asm,
+              InstrItinClass itin> :
+              TF<op, flags, (outs CPURegs:$dst), (ins FGR32:$b),
+                 !strconcat(instr_asm, "   $dst, $b"),
+                 [], itin>;
+
 class LogicF<bits<6> op, string instr_asm> :
-             TB<op, (outs FGR32:$dst), (ins FGR32:$b, FGR32:$c),
-                !strconcat(instr_asm, "   $dst, $b, $c"),
-                [], IIAlu>;
+             TAI<op, (outs FGR32:$dst), (ins FGR32:$b, FGR32:$c),
+                 !strconcat(instr_asm, "   $dst, $b, $c"),
+                 [],
+                 IIAlu>;
 
 class LogicFI<bits<6> op, string instr_asm> :
-             TB<op, (outs FGR32:$dst), (ins FGR32:$b, fimm:$c),
-                !strconcat(instr_asm, "   $dst, $b, $c"),
-                [], IIAlu>;
-
-let rb=0 in {
-  class ArithF2<bits<6> op, bits<11> flags, string instr_asm,
-                InstrItinClass itin> :
-                TA<op, flags, (outs FGR32:$dst), (ins FGR32:$b),
-                   !strconcat(instr_asm, "   $dst, $b"),
-                   [], itin>;
-
-  class ArithIF<bits<6> op, bits<11> flags, string instr_asm,
-                InstrItinClass itin> :
-                TA<op, flags, (outs FGR32:$dst), (ins CPURegs:$b),
-                   !strconcat(instr_asm, "   $dst, $b"),
-                   [], itin>;
-
-  class ArithFI<bits<6> op, bits<11> flags, string instr_asm,
-                InstrItinClass itin> :
-                TA<op, flags, (outs CPURegs:$dst), (ins FGR32:$b),
-                   !strconcat(instr_asm, "   $dst, $b"),
-                   [], itin>;
-}
+             TAI<op, (outs FGR32:$dst), (ins FGR32:$b, fimm:$c),
+                 !strconcat(instr_asm, "   $dst, $b, $c"),
+                 [],
+                 IIAlu>;
 
 //===----------------------------------------------------------------------===//
 // Pseudo instructions

Modified: llvm/trunk/lib/Target/MBlaze/MBlazeInstrFSL.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeInstrFSL.td?rev=116991&r1=116990&r2=116991&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeInstrFSL.td (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeInstrFSL.td Wed Oct 20 22:34:22 2010
@@ -10,208 +10,144 @@
 //===----------------------------------------------------------------------===//
 // FSL Instruction Formats
 //===----------------------------------------------------------------------===//
-class FSLGet<bits<6> op, bits<5> flags, string instr_asm, Intrinsic OpNode> :
-             MBlazeInst<op, FFSL, (outs CPURegs:$dst), (ins fslimm:$b),
-                        !strconcat(instr_asm, " $dst, $b"),
-                        [(set CPURegs:$dst, (OpNode immZExt4:$b))],IIAlu>
-{
-    bits<5> rd;
-    bits<4> fslno;
-
-    let Inst{6-10}  = rd;
-    let Inst{11-15} = 0x0;
-    let Inst{16}    = 0x0;
-    let Inst{17-21} = flags; // NCTAE
-    let Inst{22-27} = 0x0;
-    let Inst{28-31} = fslno;
-}
-
-class FSLGetD<bits<6> op, bits<5> flags, string instr_asm, Intrinsic OpNode> :
-              MBlazeInst<op, FFSLD, (outs CPURegs:$dst), (ins CPURegs:$b),
-                         !strconcat(instr_asm, " $dst, $b"),
-                         [(set CPURegs:$dst, (OpNode CPURegs:$b))], IIAlu>
-{
-    bits<5> rd;
-    bits<5> rb;
-
-    let Inst{6-10}  = rd;
-    let Inst{11-15} = 0x0;
-    let Inst{16-20} = rb;
-    let Inst{21}    = 0x0;
-    let Inst{22-26} = flags; // NCTAE
-    let Inst{27-31} = 0x0;
-}
-
-class FSLPut<bits<6> op, bits<4> flags, string instr_asm, Intrinsic OpNode> :
-             MBlazeInst<op, FFSL, (outs), (ins CPURegs:$v, fslimm:$b),
-                        !strconcat(instr_asm, " $v, $b"),
-                        [(OpNode CPURegs:$v, immZExt4:$b)], IIAlu>
-{
-    bits<5> ra;
-    bits<4> fslno;
-
-    let Inst{6-10}  = 0x0;
-    let Inst{11-15} = ra;
-    let Inst{16}    = 0x1;
-    let Inst{17-20} = flags; // NCTA
-    let Inst{21-27} = 0x0;
-    let Inst{28-31} = fslno;
-}
-
-class FSLPutD<bits<6> op, bits<4> flags, string instr_asm, Intrinsic OpNode> :
-              MBlazeInst<op, FFSLD, (outs), (ins CPURegs:$v, CPURegs:$b),
-                         !strconcat(instr_asm, " $v, $b"),
-                         [(OpNode CPURegs:$v, CPURegs:$b)], IIAlu>
-{
-    bits<5> ra;
-    bits<5> rb;
-
-    let Inst{6-10}  = 0x0;
-    let Inst{11-15} = ra;
-    let Inst{16-20} = rb;
-    let Inst{21}    = 0x1;
-    let Inst{22-25} = flags; // NCTA
-    let Inst{26-31} = 0x0;
-}
-
-class FSLPutT<bits<6> op, bits<4> flags, string instr_asm, Intrinsic OpNode> :
-              MBlazeInst<op, FFSLT, (outs), (ins fslimm:$b),
-                         !strconcat(instr_asm, " $b"),
-                         [(OpNode immZExt4:$b)], IIAlu>
-{
-    bits<4> fslno;
-
-    let Inst{6-10}  = 0x0;
-    let Inst{11-15} = 0x0;
-    let Inst{16}    = 0x1;
-    let Inst{17-20} = flags; // NCTA
-    let Inst{21-27} = 0x0;
-    let Inst{28-31} = fslno;
-}
-
-class FSLPutTD<bits<6> op, bits<4> flags, string instr_asm, Intrinsic OpNode> :
-               MBlazeInst<op, FFSLTD, (outs), (ins CPURegs:$b),
-                          !strconcat(instr_asm, " $b"),
-                          [(OpNode CPURegs:$b)], IIAlu>
-{
-    bits<5> rb;
-
-    let Inst{6-10}  = 0x0;
-    let Inst{11-15} = 0x0;
-    let Inst{16-20} = rb;
-    let Inst{21}    = 0x1;
-    let Inst{22-25} = flags; // NCTA
-    let Inst{26-31} = 0x0;
-}
+class FSLGetD<bits<6> op, bits<11> flags, string instr_asm, Intrinsic OpNode> :
+              TA<op, flags, (outs CPURegs:$dst), (ins CPURegs:$b),
+                 !strconcat(instr_asm, " $dst, $b"),
+                 [(set CPURegs:$dst, (OpNode CPURegs:$b))], IIAlu>;
+
+class FSLGet<bits<6> op, string instr_asm, Intrinsic OpNode> :
+             TAI<op, (outs CPURegs:$dst), (ins fslimm:$b),
+                 !strconcat(instr_asm, " $dst, $b"),
+                 [(set CPURegs:$dst, (OpNode immZExt4:$b))], IIAlu>;
+
+class FSLPutD<bits<6> op, bits<11> flags, string instr_asm, Intrinsic OpNode> :
+              TA<op, flags, (outs), (ins CPURegs:$v, CPURegs:$b),
+                 !strconcat(instr_asm, " $v, $b"),
+                 [(OpNode CPURegs:$v, CPURegs:$b)], IIAlu>;
+
+class FSLPut<bits<6> op, string instr_asm, Intrinsic OpNode> :
+             TAI<op, (outs), (ins CPURegs:$v, fslimm:$b),
+                 !strconcat(instr_asm, " $v, $b"),
+                 [(OpNode CPURegs:$v, immZExt4:$b)], IIAlu>;
+
+class FSLPutTD<bits<6> op, bits<11> flags, string instr_asm, Intrinsic OpNode> :
+               TA<op, flags, (outs), (ins CPURegs:$b),
+                  !strconcat(instr_asm, " $b"),
+                  [(OpNode CPURegs:$b)], IIAlu>;
+
+class FSLPutT<bits<6> op, string instr_asm, Intrinsic OpNode> :
+              TAI<op, (outs), (ins fslimm:$b),
+                  !strconcat(instr_asm, " $b"),
+                  [(OpNode immZExt4:$b)], IIAlu>;
 
 //===----------------------------------------------------------------------===//
 // FSL Get Instructions
 //===----------------------------------------------------------------------===//
-def GET      : FSLGet<0x1B, 0x00, "get      ", int_mblaze_fsl_get>;
-def AGET     : FSLGet<0x1B, 0x02, "aget     ", int_mblaze_fsl_aget>;
-def CGET     : FSLGet<0x1B, 0x08, "cget     ", int_mblaze_fsl_cget>;
-def CAGET    : FSLGet<0x1B, 0x0A, "caget    ", int_mblaze_fsl_caget>;
-def EGET     : FSLGet<0x1B, 0x01, "eget     ", int_mblaze_fsl_eget>;
-def EAGET    : FSLGet<0x1B, 0x03, "eaget    ", int_mblaze_fsl_eaget>;
-def ECGET    : FSLGet<0x1B, 0x09, "ecget    ", int_mblaze_fsl_ecget>;
-def ECAGET   : FSLGet<0x1B, 0x0B, "ecaget   ", int_mblaze_fsl_ecaget>;
-def NGET     : FSLGet<0x1B, 0x10, "nget     ", int_mblaze_fsl_nget>;
-def NAGET    : FSLGet<0x1B, 0x12, "naget    ", int_mblaze_fsl_naget>;
-def NCGET    : FSLGet<0x1B, 0x18, "ncget    ", int_mblaze_fsl_ncget>;
-def NCAGET   : FSLGet<0x1B, 0x1A, "ncaget   ", int_mblaze_fsl_ncaget>;
-def NEGET    : FSLGet<0x1B, 0x11, "neget    ", int_mblaze_fsl_neget>;
-def NEAGET   : FSLGet<0x1B, 0x13, "neaget   ", int_mblaze_fsl_neaget>;
-def NECGET   : FSLGet<0x1B, 0x19, "necget   ", int_mblaze_fsl_necget>;
-def NECAGET  : FSLGet<0x1B, 0x1B, "necaget  ", int_mblaze_fsl_necaget>;
-def TGET     : FSLGet<0x1B, 0x04, "tget     ", int_mblaze_fsl_tget>;
-def TAGET    : FSLGet<0x1B, 0x06, "taget    ", int_mblaze_fsl_taget>;
-def TCGET    : FSLGet<0x1B, 0x0C, "tcget    ", int_mblaze_fsl_tcget>;
-def TCAGET   : FSLGet<0x1B, 0x0E, "tcaget   ", int_mblaze_fsl_tcaget>;
-def TEGET    : FSLGet<0x1B, 0x05, "teget    ", int_mblaze_fsl_teget>;
-def TEAGET   : FSLGet<0x1B, 0x07, "teaget   ", int_mblaze_fsl_teaget>;
-def TECGET   : FSLGet<0x1B, 0x0D, "tecget   ", int_mblaze_fsl_tecget>;
-def TECAGET  : FSLGet<0x1B, 0x0F, "tecaget  ", int_mblaze_fsl_tecaget>;
-def TNGET    : FSLGet<0x1B, 0x14, "tnget    ", int_mblaze_fsl_tnget>;
-def TNAGET   : FSLGet<0x1B, 0x16, "tnaget   ", int_mblaze_fsl_tnaget>;
-def TNCGET   : FSLGet<0x1B, 0x1C, "tncget   ", int_mblaze_fsl_tncget>;
-def TNCAGET  : FSLGet<0x1B, 0x1E, "tncaget  ", int_mblaze_fsl_tncaget>;
-def TNEGET   : FSLGet<0x1B, 0x15, "tneget   ", int_mblaze_fsl_tneget>;
-def TNEAGET  : FSLGet<0x1B, 0x17, "tneaget  ", int_mblaze_fsl_tneaget>;
-def TNECGET  : FSLGet<0x1B, 0x1D, "tnecget  ", int_mblaze_fsl_tnecget>;
-def TNECAGET : FSLGet<0x1B, 0x1F, "tnecaget ", int_mblaze_fsl_tnecaget>;
+def GET      : FSLGet<0x1B, "get      ", int_mblaze_fsl_get>;
+def AGET     : FSLGet<0x1B, "aget     ", int_mblaze_fsl_aget>;
+def CGET     : FSLGet<0x1B, "cget     ", int_mblaze_fsl_cget>;
+def CAGET    : FSLGet<0x1B, "caget    ", int_mblaze_fsl_caget>;
+def EGET     : FSLGet<0x1B, "eget     ", int_mblaze_fsl_eget>;
+def EAGET    : FSLGet<0x1B, "eaget    ", int_mblaze_fsl_eaget>;
+def ECGET    : FSLGet<0x1B, "ecget    ", int_mblaze_fsl_ecget>;
+def ECAGET   : FSLGet<0x1B, "ecaget   ", int_mblaze_fsl_ecaget>;
+def NGET     : FSLGet<0x1B, "nget     ", int_mblaze_fsl_nget>;
+def NAGET    : FSLGet<0x1B, "naget    ", int_mblaze_fsl_naget>;
+def NCGET    : FSLGet<0x1B, "ncget    ", int_mblaze_fsl_ncget>;
+def NCAGET   : FSLGet<0x1B, "ncaget   ", int_mblaze_fsl_ncaget>;
+def NEGET    : FSLGet<0x1B, "neget    ", int_mblaze_fsl_neget>;
+def NEAGET   : FSLGet<0x1B, "neaget   ", int_mblaze_fsl_neaget>;
+def NECGET   : FSLGet<0x1B, "necget   ", int_mblaze_fsl_necget>;
+def NECAGET  : FSLGet<0x1B, "necaget  ", int_mblaze_fsl_necaget>;
+def TGET     : FSLGet<0x1B, "tget     ", int_mblaze_fsl_tget>;
+def TAGET    : FSLGet<0x1B, "taget    ", int_mblaze_fsl_taget>;
+def TCGET    : FSLGet<0x1B, "tcget    ", int_mblaze_fsl_tcget>;
+def TCAGET   : FSLGet<0x1B, "tcaget   ", int_mblaze_fsl_tcaget>;
+def TEGET    : FSLGet<0x1B, "teget    ", int_mblaze_fsl_teget>;
+def TEAGET   : FSLGet<0x1B, "teaget   ", int_mblaze_fsl_teaget>;
+def TECGET   : FSLGet<0x1B, "tecget   ", int_mblaze_fsl_tecget>;
+def TECAGET  : FSLGet<0x1B, "tecaget  ", int_mblaze_fsl_tecaget>;
+def TNGET    : FSLGet<0x1B, "tnget    ", int_mblaze_fsl_tnget>;
+def TNAGET   : FSLGet<0x1B, "tnaget   ", int_mblaze_fsl_tnaget>;
+def TNCGET   : FSLGet<0x1B, "tncget   ", int_mblaze_fsl_tncget>;
+def TNCAGET  : FSLGet<0x1B, "tncaget  ", int_mblaze_fsl_tncaget>;
+def TNEGET   : FSLGet<0x1B, "tneget   ", int_mblaze_fsl_tneget>;
+def TNEAGET  : FSLGet<0x1B, "tneaget  ", int_mblaze_fsl_tneaget>;
+def TNECGET  : FSLGet<0x1B, "tnecget  ", int_mblaze_fsl_tnecget>;
+def TNECAGET : FSLGet<0x1B, "tnecaget ", int_mblaze_fsl_tnecaget>;
 
 //===----------------------------------------------------------------------===//
 // FSL Dynamic Get Instructions
 //===----------------------------------------------------------------------===//
-def GETD      : FSLGetD<0x13, 0x00, "getd     ", int_mblaze_fsl_get>;
-def AGETD     : FSLGetD<0x13, 0x02, "agetd    ", int_mblaze_fsl_aget>;
-def CGETD     : FSLGetD<0x13, 0x08, "cgetd    ", int_mblaze_fsl_cget>;
-def CAGETD    : FSLGetD<0x13, 0x0A, "cagetd   ", int_mblaze_fsl_caget>;
-def EGETD     : FSLGetD<0x13, 0x01, "egetd    ", int_mblaze_fsl_eget>;
-def EAGETD    : FSLGetD<0x13, 0x03, "eagetd   ", int_mblaze_fsl_eaget>;
-def ECGETD    : FSLGetD<0x13, 0x09, "ecgetd   ", int_mblaze_fsl_ecget>;
-def ECAGETD   : FSLGetD<0x13, 0x0B, "ecagetd  ", int_mblaze_fsl_ecaget>;
-def NGETD     : FSLGetD<0x13, 0x10, "ngetd    ", int_mblaze_fsl_nget>;
-def NAGETD    : FSLGetD<0x13, 0x12, "nagetd   ", int_mblaze_fsl_naget>;
-def NCGETD    : FSLGetD<0x13, 0x18, "ncgetd   ", int_mblaze_fsl_ncget>;
-def NCAGETD   : FSLGetD<0x13, 0x1A, "ncagetd  ", int_mblaze_fsl_ncaget>;
-def NEGETD    : FSLGetD<0x13, 0x11, "negetd   ", int_mblaze_fsl_neget>;
-def NEAGETD   : FSLGetD<0x13, 0x13, "neagetd  ", int_mblaze_fsl_neaget>;
-def NECGETD   : FSLGetD<0x13, 0x19, "necgetd  ", int_mblaze_fsl_necget>;
-def NECAGETD  : FSLGetD<0x13, 0x1B, "necagetd ", int_mblaze_fsl_necaget>;
-def TGETD     : FSLGetD<0x13, 0x04, "tgetd    ", int_mblaze_fsl_tget>;
-def TAGETD    : FSLGetD<0x13, 0x06, "tagetd   ", int_mblaze_fsl_taget>;
-def TCGETD    : FSLGetD<0x13, 0x0C, "tcgetd   ", int_mblaze_fsl_tcget>;
-def TCAGETD   : FSLGetD<0x13, 0x0E, "tcagetd  ", int_mblaze_fsl_tcaget>;
-def TEGETD    : FSLGetD<0x13, 0x05, "tegetd   ", int_mblaze_fsl_teget>;
-def TEAGETD   : FSLGetD<0x13, 0x07, "teagetd  ", int_mblaze_fsl_teaget>;
-def TECGETD   : FSLGetD<0x13, 0x0D, "tecgetd  ", int_mblaze_fsl_tecget>;
-def TECAGETD  : FSLGetD<0x13, 0x0F, "tecagetd ", int_mblaze_fsl_tecaget>;
-def TNGETD    : FSLGetD<0x13, 0x14, "tngetd   ", int_mblaze_fsl_tnget>;
-def TNAGETD   : FSLGetD<0x13, 0x16, "tnagetd  ", int_mblaze_fsl_tnaget>;
-def TNCGETD   : FSLGetD<0x13, 0x1C, "tncgetd  ", int_mblaze_fsl_tncget>;
-def TNCAGETD  : FSLGetD<0x13, 0x1E, "tncagetd ", int_mblaze_fsl_tncaget>;
-def TNEGETD   : FSLGetD<0x13, 0x15, "tnegetd  ", int_mblaze_fsl_tneget>;
-def TNEAGETD  : FSLGetD<0x13, 0x17, "tneagetd ", int_mblaze_fsl_tneaget>;
-def TNECGETD  : FSLGetD<0x13, 0x1D, "tnecgetd ", int_mblaze_fsl_tnecget>;
-def TNECAGETD : FSLGetD<0x13, 0x1F, "tnecagetd", int_mblaze_fsl_tnecaget>;
+def GETD      : FSLGetD<0x1B, 0x00, "getd     ", int_mblaze_fsl_get>;
+def AGETD     : FSLGetD<0x1B, 0x00, "agetd    ", int_mblaze_fsl_aget>;
+def CGETD     : FSLGetD<0x1B, 0x00, "cgetd    ", int_mblaze_fsl_cget>;
+def CAGETD    : FSLGetD<0x1B, 0x00, "cagetd   ", int_mblaze_fsl_caget>;
+def EGETD     : FSLGetD<0x1B, 0x00, "egetd    ", int_mblaze_fsl_eget>;
+def EAGETD    : FSLGetD<0x1B, 0x00, "eagetd   ", int_mblaze_fsl_eaget>;
+def ECGETD    : FSLGetD<0x1B, 0x00, "ecgetd   ", int_mblaze_fsl_ecget>;
+def ECAGETD   : FSLGetD<0x1B, 0x00, "ecagetd  ", int_mblaze_fsl_ecaget>;
+def NGETD     : FSLGetD<0x1B, 0x00, "ngetd    ", int_mblaze_fsl_nget>;
+def NAGETD    : FSLGetD<0x1B, 0x00, "nagetd   ", int_mblaze_fsl_naget>;
+def NCGETD    : FSLGetD<0x1B, 0x00, "ncgetd   ", int_mblaze_fsl_ncget>;
+def NCAGETD   : FSLGetD<0x1B, 0x00, "ncagetd  ", int_mblaze_fsl_ncaget>;
+def NEGETD    : FSLGetD<0x1B, 0x00, "negetd   ", int_mblaze_fsl_neget>;
+def NEAGETD   : FSLGetD<0x1B, 0x00, "neagetd  ", int_mblaze_fsl_neaget>;
+def NECGETD   : FSLGetD<0x1B, 0x00, "necgetd  ", int_mblaze_fsl_necget>;
+def NECAGETD  : FSLGetD<0x1B, 0x00, "necagetd ", int_mblaze_fsl_necaget>;
+def TGETD     : FSLGetD<0x1B, 0x00, "tgetd    ", int_mblaze_fsl_tget>;
+def TAGETD    : FSLGetD<0x1B, 0x00, "tagetd   ", int_mblaze_fsl_taget>;
+def TCGETD    : FSLGetD<0x1B, 0x00, "tcgetd   ", int_mblaze_fsl_tcget>;
+def TCAGETD   : FSLGetD<0x1B, 0x00, "tcagetd  ", int_mblaze_fsl_tcaget>;
+def TEGETD    : FSLGetD<0x1B, 0x00, "tegetd   ", int_mblaze_fsl_teget>;
+def TEAGETD   : FSLGetD<0x1B, 0x00, "teagetd  ", int_mblaze_fsl_teaget>;
+def TECGETD   : FSLGetD<0x1B, 0x00, "tecgetd  ", int_mblaze_fsl_tecget>;
+def TECAGETD  : FSLGetD<0x1B, 0x00, "tecagetd ", int_mblaze_fsl_tecaget>;
+def TNGETD    : FSLGetD<0x1B, 0x00, "tngetd   ", int_mblaze_fsl_tnget>;
+def TNAGETD   : FSLGetD<0x1B, 0x00, "tnagetd  ", int_mblaze_fsl_tnaget>;
+def TNCGETD   : FSLGetD<0x1B, 0x00, "tncgetd  ", int_mblaze_fsl_tncget>;
+def TNCAGETD  : FSLGetD<0x1B, 0x00, "tncagetd ", int_mblaze_fsl_tncaget>;
+def TNEGETD   : FSLGetD<0x1B, 0x00, "tnegetd  ", int_mblaze_fsl_tneget>;
+def TNEAGETD  : FSLGetD<0x1B, 0x00, "tneagetd ", int_mblaze_fsl_tneaget>;
+def TNECGETD  : FSLGetD<0x1B, 0x00, "tnecgetd ", int_mblaze_fsl_tnecget>;
+def TNECAGETD : FSLGetD<0x1B, 0x00, "tnecagetd", int_mblaze_fsl_tnecaget>;
 
 //===----------------------------------------------------------------------===//
 // FSL Put Instructions
 //===----------------------------------------------------------------------===//
-def PUT     :  FSLPut<0x1B, 0x0, "put      ", int_mblaze_fsl_put>;
-def APUT    :  FSLPut<0x1B, 0x1, "aput     ", int_mblaze_fsl_aput>;
-def CPUT    :  FSLPut<0x1B, 0x4, "cput     ", int_mblaze_fsl_cput>;
-def CAPUT   :  FSLPut<0x1B, 0x5, "caput    ", int_mblaze_fsl_caput>;
-def NPUT    :  FSLPut<0x1B, 0x8, "nput     ", int_mblaze_fsl_nput>;
-def NAPUT   :  FSLPut<0x1B, 0x9, "naput    ", int_mblaze_fsl_naput>;
-def NCPUT   :  FSLPut<0x1B, 0xC, "ncput    ", int_mblaze_fsl_ncput>;
-def NCAPUT  :  FSLPut<0x1B, 0xD, "ncaput   ", int_mblaze_fsl_ncaput>;
-def TPUT    : FSLPutT<0x1B, 0x2, "tput     ", int_mblaze_fsl_tput>;
-def TAPUT   : FSLPutT<0x1B, 0x3, "taput    ", int_mblaze_fsl_taput>;
-def TCPUT   : FSLPutT<0x1B, 0x6, "tcput    ", int_mblaze_fsl_tcput>;
-def TCAPUT  : FSLPutT<0x1B, 0x7, "tcaput   ", int_mblaze_fsl_tcaput>;
-def TNPUT   : FSLPutT<0x1B, 0xA, "tnput    ", int_mblaze_fsl_tnput>;
-def TNAPUT  : FSLPutT<0x1B, 0xB, "tnaput   ", int_mblaze_fsl_tnaput>;
-def TNCPUT  : FSLPutT<0x1B, 0xE, "tncput   ", int_mblaze_fsl_tncput>;
-def TNCAPUT : FSLPutT<0x1B, 0xF, "tncaput  ", int_mblaze_fsl_tncaput>;
+def PUT     :  FSLPut<0x1B, "put      ", int_mblaze_fsl_put>;
+def APUT    :  FSLPut<0x1B, "aput     ", int_mblaze_fsl_aput>;
+def CPUT    :  FSLPut<0x1B, "cput     ", int_mblaze_fsl_cput>;
+def CAPUT   :  FSLPut<0x1B, "caput    ", int_mblaze_fsl_caput>;
+def NPUT    :  FSLPut<0x1B, "nput     ", int_mblaze_fsl_nput>;
+def NAPUT   :  FSLPut<0x1B, "naput    ", int_mblaze_fsl_naput>;
+def NCPUT   :  FSLPut<0x1B, "ncput    ", int_mblaze_fsl_ncput>;
+def NCAPUT  :  FSLPut<0x1B, "ncaput   ", int_mblaze_fsl_ncaput>;
+def TPUT    : FSLPutT<0x1B, "tput     ", int_mblaze_fsl_tput>;
+def TAPUT   : FSLPutT<0x1B, "taput    ", int_mblaze_fsl_taput>;
+def TCPUT   : FSLPutT<0x1B, "tcput    ", int_mblaze_fsl_tcput>;
+def TCAPUT  : FSLPutT<0x1B, "tcaput   ", int_mblaze_fsl_tcaput>;
+def TNPUT   : FSLPutT<0x1B, "tnput    ", int_mblaze_fsl_tnput>;
+def TNAPUT  : FSLPutT<0x1B, "tnaput   ", int_mblaze_fsl_tnaput>;
+def TNCPUT  : FSLPutT<0x1B, "tncput   ", int_mblaze_fsl_tncput>;
+def TNCAPUT : FSLPutT<0x1B, "tncaput  ", int_mblaze_fsl_tncaput>;
 
 //===----------------------------------------------------------------------===//
 // FSL Dynamic Put Instructions
 //===----------------------------------------------------------------------===//
-def PUTD     :  FSLPutD<0x13, 0x0, "putd     ", int_mblaze_fsl_put>;
-def APUTD    :  FSLPutD<0x13, 0x1, "aputd    ", int_mblaze_fsl_aput>;
-def CPUTD    :  FSLPutD<0x13, 0x4, "cputd    ", int_mblaze_fsl_cput>;
-def CAPUTD   :  FSLPutD<0x13, 0x5, "caputd   ", int_mblaze_fsl_caput>;
-def NPUTD    :  FSLPutD<0x13, 0x8, "nputd    ", int_mblaze_fsl_nput>;
-def NAPUTD   :  FSLPutD<0x13, 0x9, "naputd   ", int_mblaze_fsl_naput>;
-def NCPUTD   :  FSLPutD<0x13, 0xC, "ncputd   ", int_mblaze_fsl_ncput>;
-def NCAPUTD  :  FSLPutD<0x13, 0xD, "ncaputd  ", int_mblaze_fsl_ncaput>;
-def TPUTD    : FSLPutTD<0x13, 0x2, "tputd    ", int_mblaze_fsl_tput>;
-def TAPUTD   : FSLPutTD<0x13, 0x3, "taputd   ", int_mblaze_fsl_taput>;
-def TCPUTD   : FSLPutTD<0x13, 0x6, "tcputd   ", int_mblaze_fsl_tcput>;
-def TCAPUTD  : FSLPutTD<0x13, 0x7, "tcaputd  ", int_mblaze_fsl_tcaput>;
-def TNPUTD   : FSLPutTD<0x13, 0xA, "tnputd   ", int_mblaze_fsl_tnput>;
-def TNAPUTD  : FSLPutTD<0x13, 0xB, "tnaputd  ", int_mblaze_fsl_tnaput>;
-def TNCPUTD  : FSLPutTD<0x13, 0xE, "tncputd  ", int_mblaze_fsl_tncput>;
-def TNCAPUTD : FSLPutTD<0x13, 0xF, "tncaputd ", int_mblaze_fsl_tncaput>;
+def PUTD     :  FSLPutD<0x1B, 0x00, "putd     ", int_mblaze_fsl_put>;
+def APUTD    :  FSLPutD<0x1B, 0x00, "aputd    ", int_mblaze_fsl_aput>;
+def CPUTD    :  FSLPutD<0x1B, 0x00, "cputd    ", int_mblaze_fsl_cput>;
+def CAPUTD   :  FSLPutD<0x1B, 0x00, "caputd   ", int_mblaze_fsl_caput>;
+def NPUTD    :  FSLPutD<0x1B, 0x00, "nputd    ", int_mblaze_fsl_nput>;
+def NAPUTD   :  FSLPutD<0x1B, 0x00, "naputd   ", int_mblaze_fsl_naput>;
+def NCPUTD   :  FSLPutD<0x1B, 0x00, "ncputd   ", int_mblaze_fsl_ncput>;
+def NCAPUTD  :  FSLPutD<0x1B, 0x00, "ncaputd  ", int_mblaze_fsl_ncaput>;
+def TPUTD    : FSLPutTD<0x1B, 0x00, "tputd    ", int_mblaze_fsl_tput>;
+def TAPUTD   : FSLPutTD<0x1B, 0x00, "taputd   ", int_mblaze_fsl_taput>;
+def TCPUTD   : FSLPutTD<0x1B, 0x00, "tcputd   ", int_mblaze_fsl_tcput>;
+def TCAPUTD  : FSLPutTD<0x1B, 0x00, "tcaputd  ", int_mblaze_fsl_tcaput>;
+def TNPUTD   : FSLPutTD<0x1B, 0x00, "tnputd   ", int_mblaze_fsl_tnput>;
+def TNAPUTD  : FSLPutTD<0x1B, 0x00, "tnaputd  ", int_mblaze_fsl_tnaput>;
+def TNCPUTD  : FSLPutTD<0x1B, 0x00, "tncputd  ", int_mblaze_fsl_tncput>;
+def TNCAPUTD : FSLPutTD<0x1B, 0x00, "tncaputd ", int_mblaze_fsl_tncaput>;

Modified: llvm/trunk/lib/Target/MBlaze/MBlazeInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeInstrFormats.td?rev=116991&r1=116990&r2=116991&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeInstrFormats.td (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeInstrFormats.td Wed Oct 20 22:34:22 2010
@@ -7,26 +7,6 @@
 //
 //===----------------------------------------------------------------------===//
 
-// Format specifies the encoding used by the instruction.  This is part of the
-// ad-hoc solution used to emit machine instruction encodings by our machine
-// code emitter.
-class Format<bits<6> val> {
-      bits<6> Value = val;
-}
-
-def FPseudo : Format<0>;
-def FRRR    : Format<1>;
-def FRRI    : Format<2>;
-def FRIR    : Format<3>;
-def FFSL    : Format<4>;
-def FFSLD   : Format<5>;
-def FFSLT   : Format<6>;
-def FFSLTD  : Format<7>;
-def FR      : Format<8>;
-def FI      : Format<9>;
-def FRR     : Format<10>;
-def FRI     : Format<11>;
-
 //===----------------------------------------------------------------------===//
 //  Describe MBlaze instructions format
 //
@@ -41,15 +21,14 @@
 //===----------------------------------------------------------------------===//
 
 // Generic MBlaze Format
-class MBlazeInst<bits<6> op, Format form, dag outs, dag ins, string asmstr, 
-                 list<dag> pattern, InstrItinClass itin> : Instruction 
+class MBlazeInst<dag outs, dag ins, string asmstr, list<dag> pattern, 
+               InstrItinClass itin> : Instruction 
 {
-  let Namespace = "MBlaze";
   field bits<32> Inst;
 
-  bits<6> opcode = op;
-  Format Form = form;
-  bits<6> FormBits = Form.Value;
+  let Namespace = "MBlaze";
+
+  bits<6> opcode;
 
   // Top 6 bits are the 'opcode' field
   let Inst{0-5} = opcode;   
@@ -60,16 +39,13 @@
   let AsmString   = asmstr;
   let Pattern     = pattern;
   let Itinerary   = itin;
-
-  // TSFlags layout should be kept in sync with MBlazeInstrInfo.h.
-  let TSFlags{5-0}   = FormBits;
 }
 
 //===----------------------------------------------------------------------===//
 // Pseudo instruction class
 //===----------------------------------------------------------------------===//
 class MBlazePseudo<dag outs, dag ins, string asmstr, list<dag> pattern>:
-      MBlazeInst<0x0, FPseudo, outs, ins, asmstr, pattern, IIPseudo>;
+      MBlazeInst<outs, ins, asmstr, pattern, IIPseudo>;
 
 //===----------------------------------------------------------------------===//
 // Type A instruction class in MBlaze : <|opcode|rd|ra|rb|flags|>
@@ -77,49 +53,194 @@
 
 class TA<bits<6> op, bits<11> flags, dag outs, dag ins, string asmstr,
          list<dag> pattern, InstrItinClass itin> : 
-         MBlazeInst<op,FRRR,outs, ins, asmstr, pattern, itin> 
+         MBlazeInst<outs, ins, asmstr, pattern, itin> 
 {
   bits<5> rd;
   bits<5> ra;
   bits<5> rb;
 
+  let opcode = op;
+
   let Inst{6-10}  = rd;
   let Inst{11-15} = ra; 
   let Inst{16-20} = rb;
   let Inst{21-31} = flags;
 }
 
+class TAI<bits<6> op, dag outs, dag ins, string asmstr,
+          list<dag> pattern, InstrItinClass itin> :
+          MBlazeInst<outs, ins, asmstr, pattern, itin>
+{
+  bits<5> rd;
+  bits<5> ra;
+  bits<16> imm16;
+
+  let opcode = op;
+
+  let Inst{6-10}  = rd;
+  let Inst{11-15} = ra; 
+  let Inst{16-31} = imm16;
+}
+
+class TIMM<bits<6> op, dag outs, dag ins, string asmstr,
+           list<dag> pattern, InstrItinClass itin> :
+           MBlazeInst<outs, ins, asmstr, pattern, itin>
+{
+  bits<5> ra;
+  bits<16> imm16;
+
+  let opcode = op;
+
+  let Inst{6-15}  = 0;
+  let Inst{16-31} = imm16;
+}
+
+class TADDR<bits<6> op, dag outs, dag ins, string asmstr,
+            list<dag> pattern, InstrItinClass itin> :
+            MBlazeInst<outs, ins, asmstr, pattern, itin>
+{
+  bits<26> addr;
+
+  let opcode = op;
+
+  let Inst{6-31} = addr;
+}
+
 //===----------------------------------------------------------------------===//
 // Type B instruction class in MBlaze : <|opcode|rd|ra|immediate|>
 //===----------------------------------------------------------------------===//
 
 class TB<bits<6> op, dag outs, dag ins, string asmstr, list<dag> pattern,
          InstrItinClass itin> : 
-         MBlazeInst<op, FRRI, outs, ins, asmstr, pattern, itin> 
+         MBlazeInst<outs, ins, asmstr, pattern, itin> 
 {
   bits<5>  rd;
   bits<5>  ra;
   bits<16> imm16;
 
+  let opcode = op;
+
   let Inst{6-10}  = rd;
   let Inst{11-15} = ra; 
   let Inst{16-31} = imm16;
 }
 
 //===----------------------------------------------------------------------===//
-// Type B instruction class in MBlaze but with the operands reversed in
-// the LLVM DAG : <|opcode|rd|ra|immediate|>
+// Float instruction class in MBlaze : <|opcode|rd|ra|flags|>
 //===----------------------------------------------------------------------===//
-class TBR<bits<6> op, dag outs, dag ins, string asmstr, list<dag> pattern,
-         InstrItinClass itin> : 
-         TB<op, outs, ins, asmstr, pattern, itin> {
-  bits<5>  rrd;
-  bits<16> rimm16;
-  bits<5>  rra;
-
-  let Form = FRIR;
-
-  let rd = rrd;
-  let ra = rra;
-  let imm16 = rimm16;
+
+class TF<bits<6> op, bits<11> flags, dag outs, dag ins, string asmstr,
+         list<dag> pattern, InstrItinClass itin> : 
+         MBlazeInst<outs, ins, asmstr, pattern, itin> 
+{
+  bits<5>  rd;
+  bits<5>  ra;
+
+  let opcode = op;
+
+  let Inst{6-10}  = rd;
+  let Inst{11-15} = ra; 
+  let Inst{16-20} = 0;
+  let Inst{21-31} = flags;
+}
+
+//===----------------------------------------------------------------------===//
+// Branch instruction class in MBlaze : <|opcode|rd|br|ra|flags|>
+//===----------------------------------------------------------------------===//
+
+class TBR<bits<6> op, bits<5> br, bits<11> flags, dag outs, dag ins,
+          string asmstr, list<dag> pattern, InstrItinClass itin> :
+          MBlazeInst<outs, ins, asmstr, pattern, itin>
+{
+  bits<5> ra;
+
+  let opcode = op;
+
+  let Inst{6-10}  = 0;
+  let Inst{11-15} = br; 
+  let Inst{16-20} = ra;
+  let Inst{21-31} = flags;
+}
+
+class TBRC<bits<6> op, bits<5> br, bits<11> flags, dag outs, dag ins,
+           string asmstr, list<dag> pattern, InstrItinClass itin> :
+           MBlazeInst<outs, ins, asmstr, pattern, itin>
+{
+  bits<5> ra;
+  bits<5> rb;
+
+  let opcode = op;
+
+  let Inst{6-10}  = br;
+  let Inst{11-15} = ra; 
+  let Inst{16-20} = rb;
+  let Inst{21-31} = flags;
+}
+
+class TBRL<bits<6> op, bits<5> br, bits<11> flags, dag outs, dag ins,
+           string asmstr, list<dag> pattern, InstrItinClass itin> :
+           MBlazeInst<outs, ins, asmstr, pattern, itin>
+{
+  bits<5> ra;
+
+  let opcode = op;
+
+  let Inst{6-10}  = 0xF;
+  let Inst{11-15} = br; 
+  let Inst{16-20} = ra;
+  let Inst{21-31} = flags;
+}
+
+class TBRI<bits<6> op, bits<5> br, dag outs, dag ins,
+           string asmstr, list<dag> pattern, InstrItinClass itin> :
+           MBlazeInst<outs, ins, asmstr, pattern, itin>
+{
+  bits<16> imm16;
+
+  let opcode = op;
+
+  let Inst{6-10}  = 0;
+  let Inst{11-15} = br; 
+  let Inst{16-31} = imm16;
+}
+
+class TBRLI<bits<6> op, bits<5> br, dag outs, dag ins,
+            string asmstr, list<dag> pattern, InstrItinClass itin> :
+            MBlazeInst<outs, ins, asmstr, pattern, itin>
+{
+  bits<16> imm16;
+
+  let opcode = op;
+
+  let Inst{6-10}  = 0xF;
+  let Inst{11-15} = br; 
+  let Inst{16-31} = imm16;
+}
+
+class TBRCI<bits<6> op, bits<5> br, dag outs, dag ins,
+            string asmstr, list<dag> pattern, InstrItinClass itin> :
+            MBlazeInst<outs, ins, asmstr, pattern, itin>
+{
+  bits<5> ra;
+  bits<16> imm16;
+
+  let opcode = op;
+
+  let Inst{6-10}  = br;
+  let Inst{11-15} = ra; 
+  let Inst{16-31} = imm16;
+}
+
+class TRET<bits<6> op, dag outs, dag ins,
+            string asmstr, list<dag> pattern, InstrItinClass itin> :
+            MBlazeInst<outs, ins, asmstr, pattern, itin>
+{
+  bits<5>  ra;
+  bits<16> imm16;
+
+  let opcode = op;
+
+  let Inst{6-10}  = 0x10;
+  let Inst{11-15} = ra; 
+  let Inst{16-31} = imm16;
 }

Modified: llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.h?rev=116991&r1=116990&r2=116991&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.h (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.h Wed Oct 20 22:34:22 2010
@@ -134,47 +134,29 @@
 /// instruction info tracks.
 ///
 namespace MBlazeII {
-  enum {
-    // PseudoFrm - This represents an instruction that is a pseudo instruction
-    // or one that has not been implemented yet.  It is illegal to code generate
-    // it, but tolerated for intermediate implementation stages.
-    Pseudo         = 0,
-
-    RegRegReg      = 1,
-    RegRegImm      = 2,
-    RegImmReg      = 3,
-    FSL            = 4,
-    FSLD           = 5,
-    FSLT           = 6,
-    FSLTD          = 7,
-    Reg            = 8,
-    Imm            = 9,
-    RegReg         = 10,
-    RegImm         = 11,
-
-    FormMask       = 63
-
+  /// Target Operand Flag enum.
+  enum TOF {
     //===------------------------------------------------------------------===//
     // MBlaze Specific MachineOperand flags.
-    // MO_NO_FLAG,
+    MO_NO_FLAG,
 
     /// MO_GOT - Represents the offset into the global offset table at which
     /// the address the relocation entry symbol resides during execution.
-    // MO_GOT,
+    MO_GOT,
 
     /// MO_GOT_CALL - Represents the offset into the global offset table at
     /// which the address of a call site relocation entry symbol resides
     /// during execution. This is different from the above since this flag
     /// can only be present in call instructions.
-    // MO_GOT_CALL,
+    MO_GOT_CALL,
 
     /// MO_GPREL - Represents the offset from the current gp value to be used
     /// for the relocatable object file being produced.
-    // MO_GPREL,
+    MO_GPREL,
 
     /// MO_ABS_HILO - Represents the hi or low part of an absolute symbol
     /// address.
-    // MO_ABS_HILO
+    MO_ABS_HILO
 
   };
 }

Modified: llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.td?rev=116991&r1=116990&r2=116991&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.td (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.td Wed Oct 20 22:34:22 2010
@@ -13,33 +13,36 @@
 include "MBlazeInstrFormats.td"
 
 //===----------------------------------------------------------------------===//
-// MBlaze type profiles
+// MBlaze profiles and nodes
 //===----------------------------------------------------------------------===//
-
-// def SDTMBlazeSelectCC : SDTypeProfile<1, 3, [SDTCisSameAs<0, 1>]>;
 def SDT_MBlazeRet     : SDTypeProfile<0, 1, [SDTCisInt<0>]>;
 def SDT_MBlazeJmpLink : SDTypeProfile<0, 1, [SDTCisVT<0, i32>]>;
-def SDT_MBCallSeqStart : SDCallSeqStart<[SDTCisVT<0, i32>]>;
-def SDT_MBCallSeqEnd   : SDCallSeqEnd<[SDTCisVT<0, i32>, SDTCisVT<1, i32>]>;
 
-//===----------------------------------------------------------------------===//
-// MBlaze specific nodes
-//===----------------------------------------------------------------------===//
+// Call
+def MBlazeJmpLink : SDNode<"MBlazeISD::JmpLink",SDT_MBlazeJmpLink,
+                               [SDNPHasChain,SDNPOptInFlag,SDNPOutFlag]>;
 
-def MBlazeRet     : SDNode<"MBlazeISD::Ret", SDT_MBlazeRet,
+// Return
+def MBlazeRet : SDNode<"MBlazeISD::Ret", SDT_MBlazeRet,
                            [SDNPHasChain, SDNPOptInFlag]>;
 
-def MBlazeJmpLink : SDNode<"MBlazeISD::JmpLink",SDT_MBlazeJmpLink,
-                           [SDNPHasChain,SDNPOptInFlag,SDNPOutFlag]>;
-
+// Hi and Lo nodes are used to handle global addresses. Used on 
+// MBlazeISelLowering to lower stuff like GlobalAddress, ExternalSymbol 
+// static model.
 def MBWrapper   : SDNode<"MBlazeISD::Wrap", SDTIntUnaryOp>;
+def MBlazeGPRel : SDNode<"MBlazeISD::GPRel", SDTIntUnaryOp>;
 
+def SDT_MBCallSeqStart : SDCallSeqStart<[SDTCisVT<0, i32>]>;
+def SDT_MBCallSeqEnd   : SDCallSeqEnd<[SDTCisVT<0, i32>, SDTCisVT<1, i32>]>;
+
+// These are target-independent nodes, but have target-specific formats.
 def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_MBCallSeqStart,
                            [SDNPHasChain, SDNPOutFlag]>;
-
 def callseq_end   : SDNode<"ISD::CALLSEQ_END", SDT_MBCallSeqEnd,
                            [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>;
 
+def SDTMBlazeSelectCC : SDTypeProfile<1, 3, [SDTCisSameAs<0, 1>]>;
+
 //===----------------------------------------------------------------------===//
 // MBlaze Instruction Predicate Definitions.
 //===----------------------------------------------------------------------===//
@@ -92,7 +95,18 @@
   let MIOperandInfo = (ops CPURegs, CPURegs);
 }
 
+// Transformation Function - get the lower 16 bits.
+def LO16 : SDNodeXForm<imm, [{
+  return getI32Imm((unsigned)N->getZExtValue() & 0xFFFF);
+}]>;
+
+// Transformation Function - get the higher 16 bits.
+def HI16 : SDNodeXForm<imm, [{
+  return getI32Imm((unsigned)N->getZExtValue() >> 16);
+}]>;
+
 // Node immediate fits as 16-bit sign extended on target immediate.
+// e.g. addi, andi
 def immSExt16  : PatLeaf<(imm), [{
   return (N->getZExtValue() >> 16) == 0;
 }]>;
@@ -103,19 +117,19 @@
 // e.g. addiu, sltiu
 def immZExt16  : PatLeaf<(imm), [{
   return (N->getZExtValue() >> 16) == 0;
-}]>;
+}], LO16>;
 
 // FSL immediate field must fit in 4 bits.
 def immZExt4 : PatLeaf<(imm), [{
-  return N->getZExtValue() == ((N->getZExtValue()) & 0xf) ;
+      return N->getZExtValue() == ((N->getZExtValue()) & 0xf) ;
 }]>;
 
 // shamt field must fit in 5 bits.
 def immZExt5 : PatLeaf<(imm), [{
-  return N->getZExtValue() == ((N->getZExtValue()) & 0x1f) ;
+      return N->getZExtValue() == ((N->getZExtValue()) & 0x1f) ;
 }]>;
 
-// MBlaze Address Mode. SDNode frameindex could possibily be a match
+// MBlaze Address Mode! SDNode frameindex could possibily be a match
 // since load and store instructions from stack used it.
 def iaddr : ComplexPattern<i32, 2, "SelectAddrRegImm", [frameindex], []>;
 def xaddr : ComplexPattern<i32, 2, "SelectAddrRegReg", [], []>;
@@ -127,14 +141,28 @@
 // As stack alignment is always done with addiu, we need a 16-bit immediate
 let Defs = [R1], Uses = [R1] in {
 def ADJCALLSTACKDOWN : MBlazePseudo<(outs), (ins simm16:$amt),
-                                  "#ADJCALLSTACKDOWN $amt",
+                                  "${:comment} ADJCALLSTACKDOWN $amt",
                                   [(callseq_start timm:$amt)]>;
 def ADJCALLSTACKUP   : MBlazePseudo<(outs),
                                   (ins uimm16:$amt1, simm16:$amt2),
-                                  "#ADJCALLSTACKUP $amt1",
+                                  "${:comment} ADJCALLSTACKUP $amt1",
                                   [(callseq_end timm:$amt1, timm:$amt2)]>;
 }
 
+// Some assembly macros need to avoid pseudoinstructions and assembler
+// automatic reodering, we should reorder ourselves.
+def MACRO     : MBlazePseudo<(outs), (ins), ".set macro",     []>;
+def REORDER   : MBlazePseudo<(outs), (ins), ".set reorder",   []>;
+def NOMACRO   : MBlazePseudo<(outs), (ins), ".set nomacro",   []>;
+def NOREORDER : MBlazePseudo<(outs), (ins), ".set noreorder", []>;
+
+// When handling PIC code the assembler needs .cpload and .cprestore
+// directives. If the real instructions corresponding these directives
+// are used, we have the same behavior, but get also a bunch of warnings
+// from the assembler.
+def CPLOAD : MBlazePseudo<(outs), (ins CPURegs:$reg), ".cpload $reg", []>;
+def CPRESTORE : MBlazePseudo<(outs), (ins uimm16:$l), ".cprestore $l\n", []>;
+
 //===----------------------------------------------------------------------===//
 // Instructions specific format
 //===----------------------------------------------------------------------===//
@@ -150,19 +178,19 @@
 
 class ArithI<bits<6> op, string instr_asm, SDNode OpNode,
              Operand Od, PatLeaf imm_type> :
-             TB<op, (outs CPURegs:$dst), (ins CPURegs:$b, Od:$c),
-                !strconcat(instr_asm, "   $dst, $b, $c"),
-                [(set CPURegs:$dst, (OpNode CPURegs:$b, imm_type:$c))], IIAlu>;
+             TAI<op, (outs CPURegs:$dst), (ins CPURegs:$b, Od:$c),
+                 !strconcat(instr_asm, "   $dst, $b, $c"),
+                 [(set CPURegs:$dst, (OpNode CPURegs:$b, imm_type:$c))], IIAlu>;
 
 class ArithR<bits<6> op, bits<11> flags, string instr_asm, SDNode OpNode,
             InstrItinClass itin> :
             TA<op, flags, (outs CPURegs:$dst), (ins CPURegs:$c, CPURegs:$b),
-                !strconcat(instr_asm, "   $dst, $c, $b"),
-                [(set CPURegs:$dst, (OpNode CPURegs:$b, CPURegs:$c))], itin>;
+               !strconcat(instr_asm, "   $dst, $c, $b"),
+               [(set CPURegs:$dst, (OpNode CPURegs:$b, CPURegs:$c))], itin>;
 
 class ArithRI<bits<6> op, string instr_asm, SDNode OpNode,
              Operand Od, PatLeaf imm_type> :
-             TBR<op, (outs CPURegs:$dst), (ins Od:$b, CPURegs:$c),
+             TAI<op, (outs CPURegs:$dst), (ins Od:$b, CPURegs:$c),
                  !strconcat(instr_asm, "   $dst, $c, $b"),
                  [(set CPURegs:$dst, (OpNode imm_type:$b, CPURegs:$c))], IIAlu>;
 
@@ -173,9 +201,9 @@
                [], itin>;
 
 class ArithNI<bits<6> op, string instr_asm,Operand Od, PatLeaf imm_type> :
-             TB<op, (outs CPURegs:$dst), (ins CPURegs:$b, Od:$c),
-                !strconcat(instr_asm, "   $dst, $b, $c"),
-                [], IIAlu>;
+             TAI<op, (outs CPURegs:$dst), (ins CPURegs:$b, Od:$c),
+                 !strconcat(instr_asm, "   $dst, $b, $c"),
+                 [], IIAlu>;
 
 class ArithRN<bits<6> op, bits<11> flags, string instr_asm,
             InstrItinClass itin> :
@@ -184,9 +212,9 @@
                [], itin>;
 
 class ArithRNI<bits<6> op, string instr_asm,Operand Od, PatLeaf imm_type> :
-             TB<op, (outs CPURegs:$dst), (ins Od:$c, CPURegs:$b),
-                !strconcat(instr_asm, "   $dst, $b, $c"),
-                [], IIAlu>;
+             TAI<op, (outs CPURegs:$dst), (ins Od:$c, CPURegs:$b),
+                 !strconcat(instr_asm, "   $dst, $b, $c"),
+                 [], IIAlu>;
 
 //===----------------------------------------------------------------------===//
 // Misc Arithmetic Instructions
@@ -198,10 +226,14 @@
                [(set CPURegs:$dst, (OpNode CPURegs:$b, CPURegs:$c))], IIAlu>;
 
 class LogicI<bits<6> op, string instr_asm, SDNode OpNode> :
-             TB<op, (outs CPURegs:$dst), (ins CPURegs:$b, uimm16:$c),
-                !strconcat(instr_asm, "   $dst, $b, $c"),
-                [(set CPURegs:$dst, (OpNode CPURegs:$b, immZExt16:$c))],
-                IIAlu>;
+             TAI<op, (outs CPURegs:$dst), (ins CPURegs:$b, uimm16:$c),
+                 !strconcat(instr_asm, "   $dst, $b, $c"),
+                 [(set CPURegs:$dst, (OpNode CPURegs:$b, immZExt16:$c))],
+                 IIAlu>;
+
+class EffectiveAddress<string instr_asm> :
+          TAI<0x08, (outs CPURegs:$dst), (ins memri:$addr),
+              instr_asm, [(set CPURegs:$dst, iaddr:$addr)], IIAlu>;
 
 //===----------------------------------------------------------------------===//
 // Memory Access Instructions
@@ -212,7 +244,7 @@
                [(set CPURegs:$dst, (OpNode xaddr:$addr))], IILoad>;
 
 class LoadMI<bits<6> op, string instr_asm, PatFrag OpNode> :
-             TBR<op, (outs CPURegs:$dst), (ins memri:$addr),
+             TAI<op, (outs CPURegs:$dst), (ins memri:$addr),
                  !strconcat(instr_asm, "   $dst, $addr"),
                  [(set CPURegs:$dst, (OpNode iaddr:$addr))], IILoad>;
 
@@ -222,7 +254,7 @@
                 [(OpNode CPURegs:$dst, xaddr:$addr)], IIStore>;
 
 class StoreMI<bits<6> op, string instr_asm, PatFrag OpNode> :
-              TBR<op, (outs), (ins CPURegs:$dst, memri:$addr),
+              TAI<op, (outs), (ins CPURegs:$dst, memri:$addr),
                   !strconcat(instr_asm, "   $dst, $addr"),
                   [(OpNode CPURegs:$dst, iaddr:$addr)], IIStore>;
 
@@ -230,108 +262,94 @@
 // Branch Instructions
 //===----------------------------------------------------------------------===//
 class Branch<bits<6> op, bits<5> br, bits<11> flags, string instr_asm> :
-             TA<op, flags, (outs), (ins CPURegs:$target),
+             TBR<op, br, flags, (outs), (ins CPURegs:$target),
                  !strconcat(instr_asm, "   $target"),
-                 [], IIBranch> {
-  let rd = 0x0;
-  let ra = br;
-}
+                 [(brind CPURegs:$target)], IIBranch>;
 
-class BranchI<bits<6> op, bits<5> br, string instr_asm> :
-              TB<op, (outs), (ins brtarget:$target),
-                 !strconcat(instr_asm, "   $target"),
-                 [], IIBranch> {
-  let rd = 0;
-  let ra = br;
-}
+class BranchI<bits<6> op, bits<5> brf, string instr_asm> :
+              TBRI<op, brf, (outs), (ins brtarget:$target),
+                   !strconcat(instr_asm, "   $target"),
+                   [(br bb:$target)], IIBranch>;
 
 //===----------------------------------------------------------------------===//
 // Branch and Link Instructions
 //===----------------------------------------------------------------------===//
 class BranchL<bits<6> op, bits<5> br, bits<11> flags, string instr_asm> :
-              TA<op, flags, (outs), (ins CPURegs:$target),
-                 !strconcat(instr_asm, "   r15, $target"),
-                 [], IIBranch> {
-  let rd = 15;
-  let ra = br;
-}
+              TBRL<op, br, flags, (outs), (ins CPURegs:$target),
+                   !strconcat(instr_asm, "   r15, $target"),
+                   [], IIBranch>;
 
 class BranchLI<bits<6> op, bits<5> br, string instr_asm> :
-               TB<op, (outs), (ins calltarget:$target),
-                  !strconcat(instr_asm, "   r15, $target"),
-                  [], IIBranch> {
-  let rd = 15;
-  let ra = br;
-}
+               TBRLI<op, br, (outs), (ins calltarget:$target),
+                     !strconcat(instr_asm, "   r15, $target"),
+                     [], IIBranch>;
 
 //===----------------------------------------------------------------------===//
 // Conditional Branch Instructions
 //===----------------------------------------------------------------------===//
 class BranchC<bits<6> op, bits<5> br, bits<11> flags, string instr_asm,
               PatFrag cond_op> :
-              TA<op, flags, (outs),
-                 (ins CPURegs:$a, CPURegs:$b, brtarget:$offset),
-                 !strconcat(instr_asm, "   $a, $b, $offset"),
-                 [], IIBranch> {
-  let rd = br;
-}
+              TBRC<op, br, flags, (outs),
+                   (ins CPURegs:$a, CPURegs:$b, brtarget:$offset),
+                   !strconcat(instr_asm, "   $a, $b, $offset"),
+                   [], IIBranch>; 
+                   //(brcond (cond_op CPURegs:$a, CPURegs:$b), bb:$offset)],
+                   //IIBranch>;
 
 class BranchCI<bits<6> op, bits<5> br, string instr_asm, PatFrag cond_op> :
-               TB<op, (outs), (ins CPURegs:$a, brtarget:$offset),
-                  !strconcat(instr_asm, "   $a, $offset"),
-                  [], IIBranch> {
-  let rd = br;
-}
+               TBRCI<op, br, (outs), (ins CPURegs:$a, brtarget:$offset),
+                     !strconcat(instr_asm, "   $a, $offset"),
+                     [], IIBranch>;
 
 //===----------------------------------------------------------------------===//
 // MBlaze arithmetic instructions
 //===----------------------------------------------------------------------===//
 
 let isCommutable = 1, isAsCheapAsAMove = 1 in {
-  def ADD    :  Arith<0x00, 0x000, "add    ", add,  IIAlu>;
-  def ADDC   :  Arith<0x02, 0x000, "addc   ", adde, IIAlu>;
-  def ADDK   :  Arith<0x04, 0x000, "addk   ", addc, IIAlu>;
-  def ADDKC  : ArithN<0x06, 0x000, "addkc  ", IIAlu>;
-  def AND    :  Logic<0x21, 0x000, "and    ", and>;
-  def OR     :  Logic<0x20, 0x000, "or     ", or>;
-  def XOR    :  Logic<0x22, 0x000, "xor    ", xor>;
+    def ADD    :  Arith<0x00, 0x000, "add    ", add,  IIAlu>;
+    def ADDC   :  Arith<0x02, 0x000, "addc   ", adde, IIAlu>;
+    def ADDK   :  Arith<0x04, 0x000, "addk   ", addc, IIAlu>;
+    def ADDKC  : ArithN<0x06, 0x000, "addkc  ", IIAlu>;
+    def AND    :  Logic<0x21, 0x000, "and    ", and>;
+    def OR     :  Logic<0x20, 0x000, "or     ", or>;
+    def XOR    :  Logic<0x22, 0x000, "xor    ", xor>;
 }
 
 let isAsCheapAsAMove = 1 in {
-  def ANDN   :  ArithN<0x23, 0x000, "andn   ", IIAlu>;
-  def CMP    :  ArithN<0x05, 0x001, "cmp    ", IIAlu>;
-  def CMPU   :  ArithN<0x05, 0x003, "cmpu   ", IIAlu>;
-  def RSUB   :  ArithR<0x01, 0x000, "rsub   ", sub,  IIAlu>;
-  def RSUBC  :  ArithR<0x03, 0x000, "rsubc  ", sube, IIAlu>;
-  def RSUBK  :  ArithR<0x05, 0x000, "rsubk  ", subc, IIAlu>;
-  def RSUBKC : ArithRN<0x07, 0x000, "rsubkc ", IIAlu>;
+    def ANDN   :  ArithN<0x23, 0x000, "andn   ", IIAlu>;
+    def CMP    :  ArithN<0x05, 0x001, "cmp    ", IIAlu>;
+    def CMPU   :  ArithN<0x05, 0x003, "cmpu   ", IIAlu>;
+    def RSUB   :  ArithR<0x01, 0x000, "rsub   ", sub,  IIAlu>;
+    def RSUBC  :  ArithR<0x03, 0x000, "rsubc  ", sube, IIAlu>;
+    def RSUBK  :  ArithR<0x05, 0x000, "rsubk  ", subc, IIAlu>;
+    def RSUBKC : ArithRN<0x07, 0x000, "rsubkc ", IIAlu>;
 }
 
 let isCommutable = 1, Predicates=[HasMul] in {
-  def MUL    : Arith<0x10, 0x000, "mul    ", mul,   IIAlu>;
+    def MUL    : Arith<0x10, 0x000, "mul    ", mul,   IIAlu>;
 }
 
 let isCommutable = 1, Predicates=[HasMul,HasMul64] in {
-  def MULH   : Arith<0x10, 0x001, "mulh   ", mulhs, IIAlu>;
-  def MULHU  : Arith<0x10, 0x003, "mulhu  ", mulhu, IIAlu>;
+    def MULH   : Arith<0x10, 0x001, "mulh   ", mulhs, IIAlu>;
+    def MULHU  : Arith<0x10, 0x003, "mulhu  ", mulhu, IIAlu>;
 }
 
 let Predicates=[HasMul,HasMul64] in {
-  def MULHSU : ArithN<0x10, 0x002, "mulhsu ", IIAlu>;
+    def MULHSU : ArithN<0x10, 0x002, "mulhsu ", IIAlu>;
 }
 
 let Predicates=[HasBarrel] in {
-  def BSRL   :   Arith<0x11, 0x000, "bsrl   ", srl, IIAlu>;
-  def BSRA   :   Arith<0x11, 0x200, "bsra   ", sra, IIAlu>;
-  def BSLL   :   Arith<0x11, 0x400, "bsll   ", shl, IIAlu>;
-  def BSRLI  :  ArithI<0x11, "bsrli  ", srl, uimm5, immZExt5>;
-  def BSRAI  :  ArithI<0x11, "bsrai  ", sra, uimm5, immZExt5>;
-  def BSLLI  :  ArithI<0x11, "bslli  ", shl, uimm5, immZExt5>;
+    def BSRL   :   Arith<0x11, 0x000, "bsrl   ", srl, IIAlu>;
+    def BSRA   :   Arith<0x11, 0x200, "bsra   ", sra, IIAlu>;
+    def BSLL   :   Arith<0x11, 0x400, "bsll   ", shl, IIAlu>;
+    def BSRLI  :  ArithI<0x11, "bsrli  ", srl, uimm5, immZExt5>;
+    def BSRAI  :  ArithI<0x11, "bsrai  ", sra, uimm5, immZExt5>;
+    def BSLLI  :  ArithI<0x11, "bslli  ", shl, uimm5, immZExt5>;
 }
 
 let Predicates=[HasDiv] in {
-  def IDIV   :  Arith<0x12, 0x000, "idiv   ", sdiv, IIAlu>;
-  def IDIVU  :  Arith<0x12, 0x002, "idivu  ", udiv, IIAlu>;
+    def IDIV   :  Arith<0x12, 0x000, "idiv   ", sdiv, IIAlu>;
+    def IDIVU  :  Arith<0x12, 0x002, "idivu  ", udiv, IIAlu>;
 }
 
 //===----------------------------------------------------------------------===//
@@ -339,22 +357,22 @@
 //===----------------------------------------------------------------------===//
 
 let isAsCheapAsAMove = 1 in {
-  def ADDI    :   ArithI<0x08, "addi   ", add,  simm16, immSExt16>;
-  def ADDIC   :  ArithNI<0x0A, "addic  ", simm16, immSExt16>;
-  def ADDIK   :  ArithNI<0x0C, "addik  ", simm16, immSExt16>;
-  def ADDIKC  :   ArithI<0x0E, "addikc ", addc, simm16, immSExt16>;
-  def RSUBI   :  ArithRI<0x09, "rsubi  ", sub,  simm16, immSExt16>;
-  def RSUBIC  : ArithRNI<0x0B, "rsubi  ", simm16, immSExt16>;
-  def RSUBIK  : ArithRNI<0x0E, "rsubic ", simm16, immSExt16>;
-  def RSUBIKC :  ArithRI<0x0F, "rsubikc", subc, simm16, immSExt16>;
-  def ANDNI   :  ArithNI<0x2B, "andni  ", uimm16, immZExt16>;
-  def ANDI    :   LogicI<0x29, "andi   ", and>;
-  def ORI     :   LogicI<0x28, "ori    ", or>;
-  def XORI    :   LogicI<0x2A, "xori   ", xor>;
+    def ADDI    :   ArithI<0x08, "addi   ", add,  simm16, immSExt16>;
+    def ADDIC   :  ArithNI<0x0A, "addic  ", simm16, immSExt16>;
+    def ADDIK   :  ArithNI<0x0C, "addik  ", simm16, immSExt16>;
+    def ADDIKC  :   ArithI<0x0E, "addikc ", addc, simm16, immSExt16>;
+    def RSUBI   :   ArithRI<0x09, "rsubi  ", sub,  simm16, immSExt16>;
+    def RSUBIC  :  ArithRNI<0x0B, "rsubi  ", simm16, immSExt16>;
+    def RSUBIK  :  ArithRNI<0x0E, "rsubic ", simm16, immSExt16>;
+    def RSUBIKC :   ArithRI<0x0F, "rsubikc", subc, simm16, immSExt16>;
+    def ANDNI   :  ArithNI<0x2B, "andni  ", uimm16, immZExt16>;
+    def ANDI    :   LogicI<0x29, "andi   ", and>;
+    def ORI     :   LogicI<0x28, "ori    ", or>;
+    def XORI    :   LogicI<0x2A, "xori   ", xor>;
 }
 
 let Predicates=[HasMul] in {
-  def MULI    :   ArithI<0x18, "muli   ", mul, simm16, immSExt16>;
+    def MULI    :   ArithI<0x18, "muli   ", mul, simm16, immSExt16>;
 }
 
 //===----------------------------------------------------------------------===//
@@ -362,122 +380,115 @@
 //===----------------------------------------------------------------------===//
 
 let canFoldAsLoad = 1, isReMaterializable = 1 in {
-  def LBU  :  LoadM<0x30, "lbu    ", zextloadi8>;
-  def LHU  :  LoadM<0x31, "lhu    ", zextloadi16>;
-  def LW   :  LoadM<0x32, "lw     ", load>;
-
-  def LBUI : LoadMI<0x38, "lbui   ", zextloadi8>;
-  def LHUI : LoadMI<0x39, "lhui   ", zextloadi16>;
-  def LWI  : LoadMI<0x3A, "lwi    ", load>;
-}
-
-  def SB  :  StoreM<0x34, "sb     ", truncstorei8>;
-  def SH  :  StoreM<0x35, "sh     ", truncstorei16>;
-  def SW  :  StoreM<0x36, "sw     ", store>;
-
-  def SBI : StoreMI<0x3C, "sbi    ", truncstorei8>;
-  def SHI : StoreMI<0x3D, "shi    ", truncstorei16>;
-  def SWI : StoreMI<0x3E, "swi    ", store>;
+    def LBU  :  LoadM<0x30, "lbu    ", zextloadi8>;
+    def LHU  :  LoadM<0x31, "lhu    ", zextloadi16>;
+    def LW   :  LoadM<0x32, "lw     ", load>;
+
+    def LBUI : LoadMI<0x30, "lbui   ", zextloadi8>;
+    def LHUI : LoadMI<0x31, "lhui   ", zextloadi16>;
+    def LWI  : LoadMI<0x32, "lwi    ", load>;
+}
+
+    def SB  :  StoreM<0x34, "sb     ", truncstorei8>;
+    def SH  :  StoreM<0x35, "sh     ", truncstorei16>;
+    def SW  :  StoreM<0x36, "sw     ", store>;
+
+    def SBI : StoreMI<0x34, "sbi    ", truncstorei8>;
+    def SHI : StoreMI<0x35, "shi    ", truncstorei16>;
+    def SWI : StoreMI<0x36, "swi    ", store>;
 
 //===----------------------------------------------------------------------===//
 // MBlaze branch instructions
 //===----------------------------------------------------------------------===//
 
-let isBranch = 1, isTerminator = 1, hasCtrlDep = 1, isBarrier = 1, 
-    Form = FI in {
-  def BRI    :  BranchI<0x2E, 0x00, "bri    ">;
-  def BRAI   :  BranchI<0x2E, 0x08, "brai   ">;
-}
-
-let isBranch = 1, isTerminator = 1, hasCtrlDep = 1, Form = FRI in {
-  def BEQI   : BranchCI<0x2F, 0x00, "beqi   ", seteq>;
-  def BNEI   : BranchCI<0x2F, 0x01, "bnei   ", setne>;
-  def BLTI   : BranchCI<0x2F, 0x02, "blti   ", setlt>;
-  def BLEI   : BranchCI<0x2F, 0x03, "blei   ", setle>;
-  def BGTI   : BranchCI<0x2F, 0x04, "bgti   ", setgt>;
-  def BGEI   : BranchCI<0x2F, 0x05, "bgei   ", setge>;
-}
-
-let isBranch = 1, isIndirectBranch = 1, isTerminator = 1, hasCtrlDep = 1,
-    isBarrier = 1, Form = FR in {
-  def BR     :   Branch<0x26, 0x00, 0x000, "br     ">;
-  def BRA    :   Branch<0x26, 0x08, 0x000, "bra    ">;
-}
-
-let isBranch = 1, isIndirectBranch = 1, isTerminator = 1, hasCtrlDep = 1,
-    Form = FRR in {
-  def BEQ    :  BranchC<0x27, 0x00, 0x000, "beq    ", seteq>;
-  def BNE    :  BranchC<0x27, 0x01, 0x000, "bne    ", setne>;
-  def BLT    :  BranchC<0x27, 0x02, 0x000, "blt    ", setlt>;
-  def BLE    :  BranchC<0x27, 0x03, 0x000, "ble    ", setle>;
-  def BGT    :  BranchC<0x27, 0x04, 0x000, "bgt    ", setgt>;
-  def BGE    :  BranchC<0x27, 0x05, 0x000, "bge    ", setge>;
-}
-
-let isBranch = 1, isTerminator = 1, hasDelaySlot = 1, hasCtrlDep = 1,
-    isBarrier = 1, Form = FI in {
-  def BRID   :  BranchI<0x2E, 0x10, "brid   ">;
-  def BRAID  :  BranchI<0x2E, 0x18, "braid  ">;
-}
-
-let isBranch = 1, isTerminator = 1, hasDelaySlot = 1, hasCtrlDep = 1,
-    Form = FRI in {
-  def BEQID  : BranchCI<0x2F, 0x10, "beqid  ", seteq>;
-  def BNEID  : BranchCI<0x2F, 0x11, "bneid  ", setne>;
-  def BLTID  : BranchCI<0x2F, 0x12, "bltid  ", setlt>;
-  def BLEID  : BranchCI<0x2F, 0x13, "bleid  ", setle>;
-  def BGTID  : BranchCI<0x2F, 0x14, "bgtid  ", setgt>;
-  def BGEID  : BranchCI<0x2F, 0x15, "bgeid  ", setge>;
-}
-
-let isBranch = 1, isIndirectBranch = 1, isTerminator = 1, Form = FR,
-    hasDelaySlot = 1, hasCtrlDep = 1, isBarrier = 1 in {
-  def BRD    :   Branch<0x26, 0x10, 0x000, "brd    ">;
-  def BRAD   :   Branch<0x26, 0x18, 0x000, "brad   ">;
+let isBranch = 1, isTerminator = 1, hasCtrlDep = 1 in {
+    def BRI    :  BranchI<0x2E, 0x00, "bri    ">;
+    def BRAI   :  BranchI<0x2E, 0x08, "brai   ">;
+    def BEQI   : BranchCI<0x2F, 0x00, "beqi   ", seteq>;
+    def BNEI   : BranchCI<0x2F, 0x01, "bnei   ", setne>;
+    def BLTI   : BranchCI<0x2F, 0x02, "blti   ", setlt>;
+    def BLEI   : BranchCI<0x2F, 0x03, "blei   ", setle>;
+    def BGTI   : BranchCI<0x2F, 0x04, "bgti   ", setgt>;
+    def BGEI   : BranchCI<0x2F, 0x05, "bgei   ", setge>;
+}
+
+let isBranch = 1, isIndirectBranch = 1, isTerminator = 1, hasCtrlDep = 1 in {
+    def BR     :   Branch<0x26, 0x00, 0x000, "br     ">;
+    def BRA    :   Branch<0x26, 0x08, 0x000, "bra    ">;
+    def BEQ    :  BranchC<0x27, 0x00, 0x000, "beq    ", seteq>;
+    def BNE    :  BranchC<0x27, 0x01, 0x000, "bne    ", setne>;
+    def BLT    :  BranchC<0x27, 0x02, 0x000, "blt    ", setlt>;
+    def BLE    :  BranchC<0x27, 0x03, 0x000, "ble    ", setle>;
+    def BGT    :  BranchC<0x27, 0x04, 0x000, "bgt    ", setgt>;
+    def BGE    :  BranchC<0x27, 0x05, 0x000, "bge    ", setge>;
+}
+
+let isBranch = 1, isTerminator = 1, hasDelaySlot = 1, hasCtrlDep = 1 in {
+    def BRID   :  BranchI<0x2E, 0x10, "brid   ">;
+    def BRAID  :  BranchI<0x2E, 0x18, "braid  ">;
+    def BEQID  : BranchCI<0x2F, 0x10, "beqid  ", seteq>;
+    def BNEID  : BranchCI<0x2F, 0x11, "bneid  ", setne>;
+    def BLTID  : BranchCI<0x2F, 0x12, "bltid  ", setlt>;
+    def BLEID  : BranchCI<0x2F, 0x13, "bleid  ", setle>;
+    def BGTID  : BranchCI<0x2F, 0x14, "bgtid  ", setgt>;
+    def BGEID  : BranchCI<0x2F, 0x15, "bgeid  ", setge>;
 }
 
 let isBranch = 1, isIndirectBranch = 1, isTerminator = 1,
-    hasDelaySlot = 1, hasCtrlDep = 1, Form = FRR in {
-  def BEQD   :  BranchC<0x27, 0x10, 0x000, "beqd   ", seteq>;
-  def BNED   :  BranchC<0x27, 0x11, 0x000, "bned   ", setne>;
-  def BLTD   :  BranchC<0x27, 0x12, 0x000, "bltd   ", setlt>;
-  def BLED   :  BranchC<0x27, 0x13, 0x000, "bled   ", setle>;
-  def BGTD   :  BranchC<0x27, 0x14, 0x000, "bgtd   ", setgt>;
-  def BGED   :  BranchC<0x27, 0x15, 0x000, "bged   ", setge>;
+    hasDelaySlot = 1, hasCtrlDep = 1 in {
+    def BRD    :   Branch<0x26, 0x10, 0x000, "brd    ">;
+    def BRAD   :   Branch<0x26, 0x18, 0x000, "brad   ">;
+    def BEQD   :  BranchC<0x27, 0x10, 0x000, "beqd   ", seteq>;
+    def BNED   :  BranchC<0x27, 0x11, 0x000, "bned   ", setne>;
+    def BLTD   :  BranchC<0x27, 0x12, 0x000, "bltd   ", setlt>;
+    def BLED   :  BranchC<0x27, 0x13, 0x000, "bled   ", setle>;
+    def BGTD   :  BranchC<0x27, 0x14, 0x000, "bgtd   ", setgt>;
+    def BGED   :  BranchC<0x27, 0x15, 0x000, "bged   ", setge>;
+}
+
+let isCall = 1, hasCtrlDep = 1, isIndirectBranch = 1,
+    Defs = [R3,R4,R5,R6,R7,R8,R9,R10,R11,R12],
+    Uses = [R1,R5,R6,R7,R8,R9,R10] in {
+    def BRL    : BranchL<0x26, 0x04, 0x000, "brl    ">;
+    def BRAL   : BranchL<0x26, 0x0C, 0x000, "bral   ">;
 }
 
-let isCall = 1, hasDelaySlot = 1, hasCtrlDep = 1, isBarrier = 1, Form = FI,
+let isCall = 1, hasDelaySlot = 1, hasCtrlDep = 1,
     Defs = [R3,R4,R5,R6,R7,R8,R9,R10,R11,R12],
     Uses = [R1,R5,R6,R7,R8,R9,R10] in {
-  def BRLID  : BranchLI<0x2E, 0x14, "brlid  ">;
-  def BRALID : BranchLI<0x2E, 0x1C, "bralid ">;
+    def BRLID  : BranchLI<0x2E, 0x14, "brlid  ">;
+    def BRALID : BranchLI<0x2E, 0x1C, "bralid ">;
 }
 
 let isCall = 1, hasDelaySlot = 1, hasCtrlDep = 1, isIndirectBranch = 1,
-    isBarrier = 1, Form = FR,
     Defs = [R3,R4,R5,R6,R7,R8,R9,R10,R11,R12],
     Uses = [R1,R5,R6,R7,R8,R9,R10] in {
-  def BRLD   : BranchL<0x26, 0x14, 0x000, "brld   ">;
-  def BRALD  : BranchL<0x26, 0x1C, 0x000, "brald  ">;
+    def BRLD   : BranchL<0x26, 0x14, 0x000, "brld   ">;
+    def BRALD  : BranchL<0x26, 0x1C, 0x000, "brald  ">;
 }
 
-let isReturn=1, isTerminator=1, hasDelaySlot=1, isBarrier=1,
-    hasCtrlDep=1, rd=0x10, imm16=0x8, Form=FR in {
-  def RTSD   : TB<0x2D, (outs), (ins CPURegs:$target),
-                  "rtsd      $target, 8",
-                  [(MBlazeRet CPURegs:$target)],
-                  IIBranch>;
+let isReturn=1, isTerminator=1, hasDelaySlot=1,
+    isBarrier=1, hasCtrlDep=1, imm16=0x8 in {
+    def RTSD   : TRET<0x2D, (outs), (ins CPURegs:$target),
+                      "rtsd      $target, 8",
+                      [(MBlazeRet CPURegs:$target)],
+                      IIBranch>;
 }
 
 //===----------------------------------------------------------------------===//
 // MBlaze misc instructions
 //===----------------------------------------------------------------------===//
 
-let neverHasSideEffects = 1 in {
-  def NOP :  MBlazeInst< 0x20, FRRR, (outs), (ins), "nop    ", [], IIAlu>;
+let addr = 0 in {
+    def NOP :  TADDR<0x00, (outs), (ins), "nop    ", [], IIAlu>;
 }
 
 let usesCustomInserter = 1 in {
+  //class PseudoSelCC<RegisterClass RC, string asmstr>:
+  //  MBlazePseudo<(outs RC:$D), (ins RC:$T, RC:$F, CPURegs:$CMP), asmstr,
+  //  [(set RC:$D, (MBlazeSelectCC RC:$T, RC:$F, CPURegs:$CMP))]>;
+  //def Select_CC : PseudoSelCC<CPURegs, "# MBlazeSelect_CC">;
+
   def Select_CC : MBlazePseudo<(outs CPURegs:$dst),
     (ins CPURegs:$T, CPURegs:$F, CPURegs:$CMP, i32imm:$CC),
     "; SELECT_CC PSEUDO!",
@@ -501,24 +512,20 @@
 
 
 let rb = 0 in {
-  def SEXT16 : TA<0x24, 0x061, (outs CPURegs:$dst), (ins CPURegs:$src),
-                  "sext16  $dst, $src", [], IIAlu>;
-  def SEXT8  : TA<0x24, 0x060, (outs CPURegs:$dst), (ins CPURegs:$src),
-                  "sext8   $dst, $src", [], IIAlu>;
-  def SRL    : TA<0x24, 0x041, (outs CPURegs:$dst), (ins CPURegs:$src),
-                  "srl     $dst, $src", [], IIAlu>;
-  def SRA    : TA<0x24, 0x001, (outs CPURegs:$dst), (ins CPURegs:$src),
-                  "sra     $dst, $src", [], IIAlu>;
-  def SRC    : TA<0x24, 0x021, (outs CPURegs:$dst), (ins CPURegs:$src),
-                  "src     $dst, $src", [], IIAlu>;
-}
-
-let opcode=0x08 in {
-  def LEA_ADDI : TB<0x08, (outs CPURegs:$dst), (ins memri:$addr),
-                    "addi    $dst, ${addr:stackloc}",
-                    [(set CPURegs:$dst, iaddr:$addr)], IIAlu>;
+    def SEXT16 : TA<0x24, 0x061, (outs CPURegs:$dst), (ins CPURegs:$src),
+                    "sext16  $dst, $src", [], IIAlu>;
+    def SEXT8  : TA<0x24, 0x060, (outs CPURegs:$dst), (ins CPURegs:$src),
+                    "sext8   $dst, $src", [], IIAlu>;
+    def SRL    : TA<0x24, 0x041, (outs CPURegs:$dst), (ins CPURegs:$src),
+                    "srl     $dst, $src", [], IIAlu>;
+    def SRA    : TA<0x24, 0x001, (outs CPURegs:$dst), (ins CPURegs:$src),
+                    "sra     $dst, $src", [], IIAlu>;
+    def SRC    : TA<0x24, 0x021, (outs CPURegs:$dst), (ins CPURegs:$src),
+                    "src     $dst, $src", [], IIAlu>;
 }
 
+def LEA_ADDI : EffectiveAddress<"addi    $dst, ${addr:stackloc}">;
+
 //===----------------------------------------------------------------------===//
 //  Arbitrary patterns that map to one or more instructions
 //===----------------------------------------------------------------------===//
@@ -603,10 +610,6 @@
 def : Pat<(selectcc CPURegs:$L, CPURegs:$R, CPURegs:$T, CPURegs:$F, SETULE),
           (Select_CC CPURegs:$T, CPURegs:$F, (CMPU CPURegs:$L, CPURegs:$R), 6)>;
 
-// BR instructions
-def : Pat<(br bb:$T), (BRID bb:$T)>;
-def : Pat<(brind CPURegs:$T), (BRD CPURegs:$T)>;
-
 // BRCOND instructions
 def : Pat<(brcond (setcc CPURegs:$L, CPURegs:$R, SETEQ), bb:$T),
           (BEQID (CMP CPURegs:$R, CPURegs:$L), bb:$T)>;

Removed: llvm/trunk/lib/Target/MBlaze/MBlazeMCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeMCCodeEmitter.cpp?rev=116990&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeMCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeMCCodeEmitter.cpp (removed)
@@ -1,235 +0,0 @@
-//===-- MBlazeMCCodeEmitter.cpp - Convert MBlaze code to machine code -----===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file implements the MBlazeMCCodeEmitter class.
-//
-//===----------------------------------------------------------------------===//
-
-#define DEBUG_TYPE "mblaze-emitter"
-#include "MBlaze.h"
-#include "MBlazeInstrInfo.h"
-#include "MBlazeFixupKinds.h"
-#include "llvm/MC/MCCodeEmitter.h"
-#include "llvm/MC/MCExpr.h"
-#include "llvm/MC/MCInst.h"
-#include "llvm/MC/MCSymbol.h"
-#include "llvm/MC/MCFixup.h"
-#include "llvm/ADT/Statistic.h"
-#include "llvm/Support/raw_ostream.h"
-using namespace llvm;
-
-STATISTIC(MCNumEmitted, "Number of MC instructions emitted");
-
-namespace {
-class MBlazeMCCodeEmitter : public MCCodeEmitter {
-  MBlazeMCCodeEmitter(const MBlazeMCCodeEmitter &); // DO NOT IMPLEMENT
-  void operator=(const MBlazeMCCodeEmitter &); // DO NOT IMPLEMENT
-  const TargetMachine &TM;
-  const TargetInstrInfo &TII;
-  MCContext &Ctx;
-
-public:
-  MBlazeMCCodeEmitter(TargetMachine &tm, MCContext &ctx)
-    : TM(tm), TII(*TM.getInstrInfo()), Ctx(ctx) {
-  }
-
-  ~MBlazeMCCodeEmitter() {}
-
-  // getBinaryCodeForInstr - TableGen'erated function for getting the
-  // binary encoding for an instruction.
-  unsigned getBinaryCodeForInstr(const MCInst &MI) const;
-
-  /// getMachineOpValue - Return binary encoding of operand. If the machine
-  /// operand requires relocation, record the relocation and return zero.
-  unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO) const;
-  unsigned getMachineOpValue(const MCInst &MI, unsigned OpIdx) const {
-    return getMachineOpValue(MI, MI.getOperand(OpIdx));
-  }
-
-  unsigned getNumFixupKinds() const {
-    return 2;
-  }
-
-  const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const {
-    const static MCFixupKindInfo Infos[] = {
-      { "reloc_pcrel_4byte", 0, 4 * 8, MCFixupKindInfo::FKF_IsPCRel },
-      { "reloc_pcrel_2byte", 0, 2 * 8, MCFixupKindInfo::FKF_IsPCRel } };
-
-    if (Kind < FirstTargetFixupKind)
-      return MCCodeEmitter::getFixupKindInfo(Kind);
-
-    if (unsigned(Kind-FirstTargetFixupKind) < getNumFixupKinds())
-      return Infos[Kind - FirstTargetFixupKind];
-
-    assert(0 && "Invalid fixup kind.");
-    return Infos[0];
-  }
-
-  static unsigned GetMBlazeRegNum(const MCOperand &MO) {
-    // FIXME: getMBlazeRegisterNumbering() is sufficient?
-    assert(0 && "MBlazeMCCodeEmitter::GetMBlazeRegNum() not yet implemented.");
-    return 0;
-  }
-
-  void EmitByte(unsigned char C, unsigned &CurByte, raw_ostream &OS) const {
-    // The MicroBlaze uses a bit reversed format so we need to reverse the
-    // order of the bits. Taken from:
-    // http://graphics.stanford.edu/~seander/bithacks.html
-    C = ((C * 0x80200802ULL) & 0x0884422110ULL) * 0x0101010101ULL >> 32;
-
-    OS << (char)C;
-    ++CurByte;
-  }
-
-  void EmitRawByte(unsigned char C, unsigned &CurByte, raw_ostream &OS) const {
-    OS << (char)C;
-    ++CurByte;
-  }
-
-  void EmitConstant(uint64_t Val, unsigned Size, unsigned &CurByte,
-                    raw_ostream &OS) const {
-    assert(Size <= 8 && "size too big in emit constant" );
-
-    for (unsigned i = 0; i != Size; ++i) {
-      EmitByte(Val & 255, CurByte, OS);
-      Val >>= 8;
-    }
-  }
-
-  void EmitIMM(const MCOperand &imm, unsigned &CurByte, raw_ostream &OS) const;
-
-  void EmitImmediate(const MCInst &MI,
-                     unsigned opNo, MCFixupKind FixupKind,
-                     unsigned &CurByte, raw_ostream &OS,
-                     SmallVectorImpl<MCFixup> &Fixups) const;
-
-  void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
-                         SmallVectorImpl<MCFixup> &Fixups) const;
-};
-
-} // end anonymous namespace
-
-
-MCCodeEmitter *llvm::createMBlazeMCCodeEmitter(const Target &,
-                                               TargetMachine &TM,
-                                               MCContext &Ctx) {
-  return new MBlazeMCCodeEmitter(TM, Ctx);
-}
-
-/// getMachineOpValue - Return binary encoding of operand. If the machine
-/// operand requires relocation, record the relocation and return zero.
-unsigned MBlazeMCCodeEmitter::getMachineOpValue(const MCInst &MI,
-                                             const MCOperand &MO) const {
-  if (MO.isReg())
-    return MBlazeRegisterInfo::getRegisterNumbering(MO.getReg());
-  else if (MO.isImm())
-    return static_cast<unsigned>(MO.getImm());
-  else if (MO.isExpr() )
-      return 0; // The relocation has already been recorded at this point.
-  else {
-#ifndef NDEBUG
-    errs() << MO;
-#endif
-    llvm_unreachable(0);
-  }
-  return 0;
-}
-
-void MBlazeMCCodeEmitter::
-EmitIMM(const MCOperand &imm, unsigned &CurByte, raw_ostream &OS) const {
-  int32_t val = (int32_t)imm.getImm();
-  if (val > 32767 || val < -32678 ) {
-    EmitByte(0x0D, CurByte, OS);
-    EmitByte(0x00, CurByte, OS);
-    EmitRawByte((val >> 24) & 0xFF, CurByte, OS);
-    EmitRawByte((val >> 16) & 0xFF, CurByte, OS);
-  }
-}
-
-void MBlazeMCCodeEmitter::
-EmitImmediate(const MCInst &MI, unsigned opNo, MCFixupKind FixupKind,
-              unsigned &CurByte, raw_ostream &OS,
-              SmallVectorImpl<MCFixup> &Fixups) const {
-  assert( MI.getNumOperands()>opNo && "Not enought operands for instruction" );
-
-  MCOperand oper = MI.getOperand(opNo);
-  if (oper.isImm()) {
-      EmitIMM( oper, CurByte, OS );
-  } else if (oper.isExpr()) {
-      Fixups.push_back(MCFixup::Create(0,oper.getExpr(),FixupKind));
-  }
-}
-
-void MBlazeMCCodeEmitter::
-EncodeInstruction(const MCInst &MI, raw_ostream &OS,
-                  SmallVectorImpl<MCFixup> &Fixups) const {
-  unsigned Opcode = MI.getOpcode();
-  const TargetInstrDesc &Desc = TII.get(Opcode);
-  uint64_t TSFlags = Desc.TSFlags;
-  // Keep track of the current byte being emitted.
-  unsigned CurByte = 0;
-
-  switch ((TSFlags & MBlazeII::FormMask)) {
-  default: break;
-  case MBlazeII::Pseudo:
-    // Pseudo instructions don't get encoded.
-    return;
-
-  case MBlazeII::RegRegImm:
-    EmitImmediate( MI, 2, FK_Data_4, CurByte, OS, Fixups );
-    break;
-
-  case MBlazeII::RegImmReg:
-    EmitImmediate( MI, 1, FK_Data_4, CurByte, OS, Fixups );
-    break;
-
-  case MBlazeII::RegImm:
-    EmitImmediate( MI, 1, MCFixupKind(MBlaze::reloc_pcrel_2byte), CurByte, OS,
-                   Fixups );
-    break;
-
-  case MBlazeII::Imm:
-    EmitImmediate( MI, 0, MCFixupKind(MBlaze::reloc_pcrel_4byte), CurByte, OS,
-                   Fixups );
-    break;
-  }
-
-  ++MCNumEmitted;  // Keep track of the # of mi's emitted
-  unsigned Value = getBinaryCodeForInstr(MI);
-  switch (Opcode) {
-  default:
-    EmitConstant(Value, 4, CurByte, OS);
-    break;
-
-  case MBlaze::BRI:
-  case MBlaze::BRAI:
-  case MBlaze::BRID:
-  case MBlaze::BRAID:
-  case MBlaze::BRLID:
-  case MBlaze::BRALID:
-    MCOperand op = MI.getOperand(0);
-    if (op.isExpr()) {
-        EmitByte(0x0D, CurByte, OS);
-        EmitByte(0x00, CurByte, OS);
-        EmitRawByte(0, CurByte, OS);
-        EmitRawByte(0, CurByte, OS);
-    }
-    EmitConstant(Value, 4, CurByte, OS);
-    break;
-  }
-}
-
-// FIXME: These #defines shouldn't be necessary. Instead, tblgen should
-// be able to generate code emitter helpers for either variant, like it
-// does for the AsmWriter.
-#define MBlazeCodeEmitter MBlazeMCCodeEmitter
-#define MachineInstr MCInst
-#include "MBlazeGenCodeEmitter.inc"
-#undef MBlazeCodeEmitter
-#undef MachineInstr

Removed: llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.cpp?rev=116990&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.cpp (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.cpp (removed)
@@ -1,174 +0,0 @@
-//===-- MBLazeMCInstLower.cpp - Convert MBlaze MachineInstr to an MCInst---===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file contains code to lower MBlaze MachineInstrs to their corresponding
-// MCInst records.
-//
-//===----------------------------------------------------------------------===//
-
-#include "MBLazeMCInstLower.h"
-#include "MBlazeInstrInfo.h"
-#include "llvm/Constants.h"
-#include "llvm/CodeGen/AsmPrinter.h"
-#include "llvm/CodeGen/MachineBasicBlock.h"
-#include "llvm/CodeGen/MachineInstr.h"
-#include "llvm/MC/MCAsmInfo.h"
-#include "llvm/MC/MCContext.h"
-#include "llvm/MC/MCExpr.h"
-#include "llvm/MC/MCInst.h"
-#include "llvm/Target/Mangler.h"
-#include "llvm/Support/Debug.h"
-#include "llvm/Support/raw_ostream.h"
-#include "llvm/Support/ErrorHandling.h"
-#include "llvm/ADT/SmallString.h"
-using namespace llvm;
-
-MCSymbol *MBlazeMCInstLower::
-GetGlobalAddressSymbol(const MachineOperand &MO) const {
-  switch (MO.getTargetFlags()) {
-  default: 
-      llvm_unreachable("Unknown target flag on GV operand");
-
-  case 0: break;
-  }
-
-  return Printer.Mang->getSymbol(MO.getGlobal());
-}
-
-MCSymbol *MBlazeMCInstLower::
-GetExternalSymbolSymbol(const MachineOperand &MO) const {
-  switch (MO.getTargetFlags()) {
-  default:
-      assert(0 && "Unknown target flag on GV operand");
-
-  case 0: break;
-  }
-
-  return Printer.GetExternalSymbolSymbol(MO.getSymbolName());
-}
-
-MCSymbol *MBlazeMCInstLower::
-GetJumpTableSymbol(const MachineOperand &MO) const {
-  SmallString<256> Name;
-  raw_svector_ostream(Name) << Printer.MAI->getPrivateGlobalPrefix() << "JTI"
-                            << Printer.getFunctionNumber() << '_'
-                            << MO.getIndex();
-
-  switch (MO.getTargetFlags()) {
-  default:
-      llvm_unreachable("Unknown target flag on GV operand");
-
-  case 0: break;
-  }
-
-  // Create a symbol for the name.
-  return Ctx.GetOrCreateSymbol(Name.str());
-}
-
-MCSymbol *MBlazeMCInstLower::
-GetConstantPoolIndexSymbol(const MachineOperand &MO) const {
-  SmallString<256> Name;
-  raw_svector_ostream(Name) << Printer.MAI->getPrivateGlobalPrefix() << "CPI"
-                            << Printer.getFunctionNumber() << '_'
-                            << MO.getIndex();
-
-  switch (MO.getTargetFlags()) {
-  default:
-      llvm_unreachable("Unknown target flag on GV operand");
-
-  case 0: break;
-  }
-
-  // Create a symbol for the name.
-  return Ctx.GetOrCreateSymbol(Name.str());
-}
-
-MCSymbol *MBlazeMCInstLower::
-GetBlockAddressSymbol(const MachineOperand &MO) const {
-  switch (MO.getTargetFlags()) {
-  default:
-      assert(0 && "Unknown target flag on GV operand");
-
-  case 0: break;
-  }
-
-  return Printer.GetBlockAddressSymbol(MO.getBlockAddress());
-}
-
-MCOperand MBlazeMCInstLower::
-LowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym) const {
-  // FIXME: We would like an efficient form for this, so we don't have to do a
-  // lot of extra uniquing.
-  const MCExpr *Expr = MCSymbolRefExpr::Create(Sym, Ctx);
-
-  switch (MO.getTargetFlags()) {
-  default:
-      llvm_unreachable("Unknown target flag on GV operand");
-
-  case 0: break;
-  }
-
-  if (!MO.isJTI() && MO.getOffset())
-    Expr = MCBinaryExpr::CreateAdd(Expr,
-                                   MCConstantExpr::Create(MO.getOffset(), Ctx),
-                                   Ctx);
-  return MCOperand::CreateExpr(Expr);
-}
-
-void MBlazeMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
-  OutMI.setOpcode(MI->getOpcode());
-
-  for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
-    const MachineOperand &MO = MI->getOperand(i);
-
-    MCOperand MCOp;
-    switch (MO.getType()) {
-    default:
-      assert(0 && "unknown operand type");
-    case MachineOperand::MO_Register:
-      // Ignore all implicit register operands.
-      if (MO.isImplicit()) continue;
-      MCOp = MCOperand::CreateReg(MO.getReg());
-      break;
-    case MachineOperand::MO_Immediate:
-      MCOp = MCOperand::CreateImm(MO.getImm());
-      break;
-    case MachineOperand::MO_MachineBasicBlock:
-      MCOp = MCOperand::CreateExpr(MCSymbolRefExpr::Create(
-                         MO.getMBB()->getSymbol(), Ctx));
-      break;
-    case MachineOperand::MO_GlobalAddress:
-      MCOp = LowerSymbolOperand(MO, GetGlobalAddressSymbol(MO));
-      break;
-    case MachineOperand::MO_ExternalSymbol:
-      MCOp = LowerSymbolOperand(MO, GetExternalSymbolSymbol(MO));
-      break;
-    case MachineOperand::MO_JumpTableIndex:
-      MCOp = LowerSymbolOperand(MO, GetJumpTableSymbol(MO));
-      break;
-    case MachineOperand::MO_ConstantPoolIndex:
-      MCOp = LowerSymbolOperand(MO, GetConstantPoolIndexSymbol(MO));
-      break;
-    case MachineOperand::MO_BlockAddress:
-      MCOp = LowerSymbolOperand(MO, GetBlockAddressSymbol(MO));
-      break;
-    case MachineOperand::MO_FPImmediate:
-      bool ignored;
-      APFloat FVal = MO.getFPImm()->getValueAPF();
-      FVal.convert(APFloat::IEEEsingle, APFloat::rmTowardZero, &ignored);
-
-      APInt IVal = FVal.bitcastToAPInt();
-      uint64_t Val = *IVal.getRawData();
-      MCOp = MCOperand::CreateImm(Val);
-      break;
-    }
-
-    OutMI.addOperand(MCOp);
-  }
-}

Removed: llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.h?rev=116990&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.h (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.h (removed)
@@ -1,50 +0,0 @@
-//===-- MBlazeMCInstLower.h - Lower MachineInstr to MCInst ----------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef MBLAZE_MCINSTLOWER_H
-#define MBLAZE_MCINSTLOWER_H
-
-#include "llvm/Support/Compiler.h"
-
-namespace llvm {
-  class AsmPrinter;
-  class MCAsmInfo;
-  class MCContext;
-  class MCInst;
-  class MCOperand;
-  class MCSymbol;
-  class MachineInstr;
-  class MachineModuleInfoMachO;
-  class MachineOperand;
-  class Mangler;
-
-  /// MBlazeMCInstLower - This class is used to lower an MachineInstr
-  /// into an MCInst.
-class LLVM_LIBRARY_VISIBILITY MBlazeMCInstLower {
-  MCContext &Ctx;
-  Mangler &Mang;
-
-  AsmPrinter &Printer;
-public:
-  MBlazeMCInstLower(MCContext &ctx, Mangler &mang, AsmPrinter &printer)
-    : Ctx(ctx), Mang(mang), Printer(printer) {}
-  void Lower(const MachineInstr *MI, MCInst &OutMI) const;
-
-  MCOperand LowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym) const;
-
-  MCSymbol *GetGlobalAddressSymbol(const MachineOperand &MO) const;
-  MCSymbol *GetExternalSymbolSymbol(const MachineOperand &MO) const;
-  MCSymbol *GetJumpTableSymbol(const MachineOperand &MO) const;
-  MCSymbol *GetConstantPoolIndexSymbol(const MachineOperand &MO) const;
-  MCSymbol *GetBlockAddressSymbol(const MachineOperand &MO) const;
-};
-
-}
-
-#endif

Removed: llvm/trunk/lib/Target/MBlaze/MBlazeRelocations.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeRelocations.h?rev=116990&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeRelocations.h (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeRelocations.h (removed)
@@ -1,47 +0,0 @@
-//===- MBlazeRelocations.h - MBlaze Code Relocations ------------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file defines the MBlaze target-specific relocation types.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef MBLAZERELOCATIONS_H
-#define MBLAZERELOCATIONS_H
-
-#include "llvm/CodeGen/MachineRelocation.h"
-
-namespace llvm {
-  namespace MBlaze {
-    enum RelocationType {
-      /// reloc_pcrel_word - PC relative relocation, add the relocated value to
-      /// the value already in memory, after we adjust it for where the PC is.
-      reloc_pcrel_word = 0,
-
-      /// reloc_picrel_word - PIC base relative relocation, add the relocated
-      /// value to the value already in memory, after we adjust it for where the
-      /// PIC base is.
-      reloc_picrel_word = 1,
-
-      /// reloc_absolute_word - absolute relocation, just add the relocated
-      /// value to the value already in memory.
-      reloc_absolute_word = 2,
-
-      /// reloc_absolute_word_sext - absolute relocation, just add the relocated
-      /// value to the value already in memory. In object files, it represents a
-      /// value which must be sign-extended when resolving the relocation.
-      reloc_absolute_word_sext = 3,
-
-      /// reloc_absolute_dword - absolute relocation, just add the relocated
-      /// value to the value already in memory.
-      reloc_absolute_dword = 4
-    };
-  }
-}
-
-#endif

Modified: llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.cpp?rev=116991&r1=116990&r2=116991&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.cpp Wed Oct 20 22:34:22 2010
@@ -15,51 +15,13 @@
 #include "MBlazeMCAsmInfo.h"
 #include "MBlazeTargetMachine.h"
 #include "llvm/PassManager.h"
-#include "llvm/CodeGen/Passes.h"
-#include "llvm/Support/FormattedStream.h"
-#include "llvm/Target/TargetOptions.h"
 #include "llvm/Target/TargetRegistry.h"
 using namespace llvm;
 
-static MCStreamer *createMCStreamer(const Target &T, const std::string &TT,
-                                    MCContext &Ctx, TargetAsmBackend &TAB,
-                                    raw_ostream &_OS,
-                                    MCCodeEmitter *_Emitter,
-                                    bool RelaxAll) {
-  Triple TheTriple(TT);
-  switch (TheTriple.getOS()) {
-  case Triple::Darwin:
-    llvm_unreachable("MBlaze does not support Darwin MACH-O format");
-    return NULL;
-  case Triple::MinGW32:
-  case Triple::MinGW64:
-  case Triple::Cygwin:
-  case Triple::Win32:
-    llvm_unreachable("ARM does not support Windows COFF format");
-    return NULL;
-  default:
-    return createELFStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll);
-  }
-}
-
-
 extern "C" void LLVMInitializeMBlazeTarget() {
   // Register the target.
   RegisterTargetMachine<MBlazeTargetMachine> X(TheMBlazeTarget);
   RegisterAsmInfo<MBlazeMCAsmInfo> A(TheMBlazeTarget);
-
-  // Register the MC code emitter
-  TargetRegistry::RegisterCodeEmitter(TheMBlazeTarget,
-                                      llvm::createMBlazeMCCodeEmitter);
-  
-  // Register the asm backend
-  TargetRegistry::RegisterAsmBackend(TheMBlazeTarget,
-                                     createMBlazeAsmBackend);
-
-  // Register the object streamer
-  TargetRegistry::RegisterObjectStreamer(TheMBlazeTarget,
-                                         createMCStreamer);
-
 }
 
 // DataLayout --> Big-endian, 32-bit pointer/ABI/alignment
@@ -77,7 +39,7 @@
              "f64:32:32-v64:32:32-v128:32:32-n32"),
   InstrInfo(*this),
   FrameInfo(TargetFrameInfo::StackGrowsUp, 8, 0),
-  TLInfo(*this), TSInfo(*this), ELFWriterInfo(*this) {
+  TLInfo(*this), TSInfo(*this) {
   if (getRelocationModel() == Reloc::Default) {
       setRelocationModel(Reloc::Static);
   }

Modified: llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.h?rev=116991&r1=116990&r2=116991&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.h (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.h Wed Oct 20 22:34:22 2010
@@ -19,8 +19,6 @@
 #include "MBlazeISelLowering.h"
 #include "MBlazeSelectionDAGInfo.h"
 #include "MBlazeIntrinsicInfo.h"
-#include "MBlazeELFWriterInfo.h"
-#include "llvm/MC/MCStreamer.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/TargetData.h"
 #include "llvm/Target/TargetFrameInfo.h"
@@ -36,7 +34,6 @@
     MBlazeTargetLowering  TLInfo;
     MBlazeSelectionDAGInfo TSInfo;
     MBlazeIntrinsicInfo IntrinsicInfo;
-    MBlazeELFWriterInfo    ELFWriterInfo;
   public:
     MBlazeTargetMachine(const Target &T, const std::string &TT,
                       const std::string &FS);
@@ -65,10 +62,6 @@
     const TargetIntrinsicInfo *getIntrinsicInfo() const
     { return &IntrinsicInfo; }
 
-    virtual const MBlazeELFWriterInfo *getELFWriterInfo() const {
-      return &ELFWriterInfo;
-    }
-
     // Pass Pipeline Configuration
     virtual bool addInstSelector(PassManagerBase &PM,
                                  CodeGenOpt::Level OptLevel);

Modified: llvm/trunk/lib/Target/MBlaze/Makefile
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/Makefile?rev=116991&r1=116990&r2=116991&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/Makefile (original)
+++ llvm/trunk/lib/Target/MBlaze/Makefile Wed Oct 20 22:34:22 2010
@@ -14,11 +14,10 @@
 BUILT_SOURCES = MBlazeGenRegisterInfo.h.inc MBlazeGenRegisterNames.inc \
                 MBlazeGenRegisterInfo.inc MBlazeGenInstrNames.inc \
                 MBlazeGenInstrInfo.inc MBlazeGenAsmWriter.inc \
-                MBlazeGenDAGISel.inc \
-		MBlazeGenCodeEmitter.inc MBlazeGenCallingConv.inc \
+                MBlazeGenDAGISel.inc MBlazeGenCallingConv.inc \
                 MBlazeGenSubtarget.inc MBlazeGenIntrinsics.inc
 
-DIRS = InstPrinter TargetInfo
+DIRS = AsmPrinter TargetInfo
 
 include $(LEVEL)/Makefile.common
 

Removed: llvm/trunk/lib/Target/MBlaze/TODO
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/TODO?rev=116990&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/TODO (original)
+++ llvm/trunk/lib/Target/MBlaze/TODO (removed)
@@ -1,26 +0,0 @@
-* Writing out ELF files is close to working but the following needs to
-  be examined more closely:
-    - ELF files are written with the wrong E_MACHINE value because
-      ELFObjectWriter::WriteHeader function does not yet support
-      target specific E_MACHINE values.
-    - ELF relocation records are incorrect because the function
-      ELFObjectWriter::RecordRelocation is hard coded for X86/X86-64.
-    - Relocations use 2-byte / 4-byte to terminology in reference to
-      the size of the immediate value being changed. The Xilinx
-      terminology seems to be (???) 4-byte / 8-byte in reference
-      to the number of bytes of instructions that are being changed.
-    - BRLID and like instructions are always assumed to use a 4-byte
-      immediate value for the relocation and BEQID and like instructions
-      are always assumed to use a 2-byte immediate value for the relocation.
-      I think this means that conditional branches like BEQID can only
-      branch += 32768 bytes (~8192 instructions). We should allow conditional
-      branches to use 4-byte relocations but I'm not sure how to do that
-      right now.
-
-* Code generation seems to work relatively well now but the following
-  needs to be examined more closely:
-    - The stack layout needs to be examined to make sure it meets
-      the standard, especially in regards to var arg functions.
-    - The delay slot filler is ad hoc but seems to work. Load and
-      store instructions were prevented from being moved to delay
-      slots but I'm not sure that is necessary.

Modified: llvm/trunk/lib/Target/MBlaze/TargetInfo/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/TargetInfo/CMakeLists.txt?rev=116991&r1=116990&r2=116991&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/TargetInfo/CMakeLists.txt (original)
+++ llvm/trunk/lib/Target/MBlaze/TargetInfo/CMakeLists.txt Wed Oct 20 22:34:22 2010
@@ -1,5 +1,4 @@
-include_directories( ${CMAKE_CURRENT_BINARY_DIR}/.. 
-                     ${CMAKE_CURRENT_SOURCE_DIR}/.. )
+include_directories( ${CMAKE_CURRENT_BINARY_DIR}/.. ${CMAKE_CURRENT_SOURCE_DIR}/.. )
 
 add_llvm_library(LLVMMBlazeInfo
   MBlazeTargetInfo.cpp

Modified: llvm/trunk/test/CodeGen/MBlaze/brind.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MBlaze/brind.ll?rev=116991&r1=116990&r2=116991&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MBlaze/brind.ll (original)
+++ llvm/trunk/test/CodeGen/MBlaze/brind.ll Wed Oct 20 22:34:22 2010
@@ -28,31 +28,32 @@
                              label %L3,
                              label %L4,
                              label %L5 ]
-    ; CHECK:        brd {{r[0-9]*}}
+    ; CHECK:        br {{r[0-9]*}}
 
 L1:
     %tmp.1 = add i32 %a, %b
     br label %finish
-    ; CHECK:        brid
+    ; CHECK:        br
 
 L2:
     %tmp.2 = sub i32 %a, %b
     br label %finish
-    ; CHECK:        brid
+    ; CHECK:        br
 
 L3:
     %tmp.3 = mul i32 %a, %b
     br label %finish
-    ; CHECK:        brid
+    ; CHECK:        br
 
 L4:
     %tmp.4 = sdiv i32 %a, %b
     br label %finish
-    ; CHECK:        brid
+    ; CHECK:        br
 
 L5:
     %tmp.5 = srem i32 %a, %b
     br label %finish
+    ; CHECK:        br
 
 finish:
     %tmp.6 = phi i32 [ %tmp.1, %L1 ],
@@ -68,5 +69,5 @@
     %tmp.8 = urem i32 %tmp.7, 5
 
     br label %loop
-    ; CHECK:        brid
+    ; CHECK:        br
 }

Modified: llvm/trunk/test/CodeGen/MBlaze/cc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MBlaze/cc.ll?rev=116991&r1=116990&r2=116991&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MBlaze/cc.ll (original)
+++ llvm/trunk/test/CodeGen/MBlaze/cc.ll Wed Oct 20 22:34:22 2010
@@ -12,7 +12,7 @@
 define void @params0_noret() {
     ; CHECK:        params0_noret:
     ret void
-    ; CHECK-NOT:    {{.* r3, .*, .*}}
+    ; CHECK-NOT:    {{.* r3, r0, 1}}
     ; CHECK-NOT:    {{.* r4, .*, .*}}
     ; CHECK:        rtsd
 }
@@ -20,88 +20,81 @@
 define i8 @params0_8bitret() {
     ; CHECK:        params0_8bitret:
     ret i8 1
-    ; CHECK-NOT:    {{.* r3, .*, .*}}
+    ; CHECK:        {{.* r3, r0, 1}}
     ; CHECK-NOT:    {{.* r4, .*, .*}}
     ; CHECK:        rtsd
-    ; CHECK:        {{.* r3, r0, 1}}
 }
 
 define i16 @params0_16bitret() {
     ; CHECK:        params0_16bitret:
     ret i16 1
-    ; CHECK:        rtsd
     ; CHECK:        {{.* r3, r0, 1}}
     ; CHECK-NOT:    {{.* r4, .*, .*}}
+    ; CHECK:        rtsd
 }
 
 define i32 @params0_32bitret() {
     ; CHECK:        params0_32bitret:
     ret i32 1
+    ; CHECK:        {{.* r3, r0, 1}}
     ; CHECK-NOT:    {{.* r4, .*, .*}}
     ; CHECK:        rtsd
-    ; CHECK:        {{.* r3, r0, 1}}
 }
 
 define i64 @params0_64bitret() {
     ; CHECK:        params0_64bitret:
     ret i64 1
     ; CHECK:        {{.* r3, r0, .*}}
-    ; CHECK:        rtsd
     ; CHECK:        {{.* r4, r0, 1}}
+    ; CHECK:        rtsd
 }
 
 define i32 @params1_32bitret(i32 %a) {
     ; CHECK:        params1_32bitret:
     ret i32 %a
-    ; CHECK-NOT:    {{.* r3, .*, .*}}
+    ; CHECK:        {{.* r3, r5, r0}}
     ; CHECK-NOT:    {{.* r4, .*, .*}}
     ; CHECK:        rtsd
-    ; CHECK:        {{.* r3, r5, r0}}
 }
 
 define i32 @params2_32bitret(i32 %a, i32 %b) {
     ; CHECK:        params2_32bitret:
     ret i32 %b
-    ; CHECK-NOT:    {{.* r3, .*, .*}}
+    ; CHECK:        {{.* r3, r6, r0}}
     ; CHECK-NOT:    {{.* r4, .*, .*}}
     ; CHECK:        rtsd
-    ; CHECK:        {{.* r3, r6, r0}}
 }
 
 define i32 @params3_32bitret(i32 %a, i32 %b, i32 %c) {
     ; CHECK:        params3_32bitret:
     ret i32 %c
-    ; CHECK-NOT:    {{.* r3, .*, .*}}
+    ; CHECK:        {{.* r3, r7, r0}}
     ; CHECK-NOT:    {{.* r4, .*, .*}}
     ; CHECK:        rtsd
-    ; CHECK:        {{.* r3, r7, r0}}
 }
 
 define i32 @params4_32bitret(i32 %a, i32 %b, i32 %c, i32 %d) {
     ; CHECK:        params4_32bitret:
     ret i32 %d
-    ; CHECK-NOT:    {{.* r3, .*, .*}}
+    ; CHECK:        {{.* r3, r8, r0}}
     ; CHECK-NOT:    {{.* r4, .*, .*}}
     ; CHECK:        rtsd
-    ; CHECK:        {{.* r3, r8, r0}}
 }
 
 define i32 @params5_32bitret(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e) {
     ; CHECK:        params5_32bitret:
     ret i32 %e
-    ; CHECK-NOT:    {{.* r3, .*, .*}}
+    ; CHECK:        {{.* r3, r9, r0}}
     ; CHECK-NOT:    {{.* r4, .*, .*}}
     ; CHECK:        rtsd
-    ; CHECK:        {{.* r3, r9, r0}}
 }
 
 define i32 @params6_32bitret(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f) {
     ; CHECK:        params6_32bitret:
     ret i32 %f
-    ; CHECK-NOT:    {{.* r3, .*, .*}}
+    ; CHECK:        {{.* r3, r10, r0}}
     ; CHECK-NOT:    {{.* r4, .*, .*}}
     ; CHECK:        rtsd
-    ; CHECK:        {{.* r3, r10, r0}}
 }
 
 define i32 @params7_32bitret(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f,
@@ -149,29 +142,53 @@
     %tmp.1 = call i8 @params0_8bitret()
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i8 %tmp.1)
+    ; CHECK:        {{.* r5, .*, .*}}
+    ; CHECK:        {{.* r6, r3, r0}}
+    ; CHECK-NOT:    {{.* r7, .*, .*}}
+    ; CHECK:        brlid
 
     %tmp.2 = call i16 @params0_16bitret()
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i16 %tmp.2)
+    ; CHECK:        {{.* r5, .*, .*}}
+    ; CHECK:        {{.* r6, r3, r0}}
+    ; CHECK-NOT:    {{.* r7, .*, .*}}
+    ; CHECK:        brlid
 
     %tmp.3 = call i32 @params0_32bitret()
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.3)
+    ; CHECK:        {{.* r5, .*, .*}}
+    ; CHECK:        {{.* r6, r3, r0}}
+    ; CHECK-NOT:    {{.* r7, .*, .*}}
+    ; CHECK:        brlid
 
     %tmp.4 = call i64 @params0_64bitret()
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i64 %tmp.4)
+    ; CHECK:        {{.* r5, .*, .*}}
+    ; CHECK:        {{.* r6, r3, r0}}
+    ; CHECK:        {{.* r7, r4, r0}}
+    ; CHECK:        brlid
 
     %tmp.5 = call i32 @params1_32bitret(i32 1)
     ; CHECK:        {{.* r5, .*, .*}}
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.5)
+    ; CHECK:        {{.* r5, .*, .*}}
+    ; CHECK:        {{.* r6, r3, r0}}
+    ; CHECK-NOT:    {{.* r7, .*, .*}}
+    ; CHECK:        brlid
 
     %tmp.6 = call i32 @params2_32bitret(i32 1, i32 2)
     ; CHECK:        {{.* r5, .*, .*}}
     ; CHECK:        {{.* r6, .*, .*}}
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.6)
+    ; CHECK:        {{.* r5, .*, .*}}
+    ; CHECK:        {{.* r6, r3, r0}}
+    ; CHECK-NOT:    {{.* r7, .*, .*}}
+    ; CHECK:        brlid
 
     %tmp.7 = call i32 @params3_32bitret(i32 1, i32 2, i32 3)
     ; CHECK:        {{.* r5, .*, .*}}
@@ -179,6 +196,10 @@
     ; CHECK:        {{.* r7, .*, .*}}
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.7)
+    ; CHECK:        {{.* r5, .*, .*}}
+    ; CHECK:        {{.* r6, r3, r0}}
+    ; CHECK-NOT:    {{.* r7, .*, .*}}
+    ; CHECK:        brlid
 
     %tmp.8 = call i32 @params4_32bitret(i32 1, i32 2, i32 3, i32 4)
     ; CHECK:        {{.* r5, .*, .*}}
@@ -187,6 +208,10 @@
     ; CHECK:        {{.* r8, .*, .*}}
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.8)
+    ; CHECK:        {{.* r5, .*, .*}}
+    ; CHECK:        {{.* r6, r3, r0}}
+    ; CHECK-NOT:    {{.* r7, .*, .*}}
+    ; CHECK:        brlid
 
     %tmp.9 = call i32 @params5_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5)
     ; CHECK:        {{.* r5, .*, .*}}
@@ -196,6 +221,10 @@
     ; CHECK:        {{.* r9, .*, .*}}
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.9)
+    ; CHECK:        {{.* r5, .*, .*}}
+    ; CHECK:        {{.* r6, r3, r0}}
+    ; CHECK-NOT:    {{.* r7, .*, .*}}
+    ; CHECK:        brlid
 
     %tmp.10 = call i32 @params6_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5,
                                          i32 6)
@@ -207,6 +236,10 @@
     ; CHECK:        {{.* r10, .*, .*}}
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.10)
+    ; CHECK:        {{.* r5, .*, .*}}
+    ; CHECK:        {{.* r6, r3, r0}}
+    ; CHECK-NOT:    {{.* r7, .*, .*}}
+    ; CHECK:        brlid
 
     %tmp.11 = call i32 @params7_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5,
                                          i32 6, i32 7)
@@ -219,6 +252,10 @@
     ; CHECK:        {{.* r10, .*, .*}}
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.11)
+    ; CHECK:        {{.* r5, .*, .*}}
+    ; CHECK:        {{.* r6, r3, r0}}
+    ; CHECK-NOT:    {{.* r7, .*, .*}}
+    ; CHECK:        brlid
 
     %tmp.12 = call i32 @params8_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5,
                                          i32 6, i32 7, i32 8)
@@ -232,6 +269,10 @@
     ; CHECK:        {{.* r10, .*, .*}}
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.12)
+    ; CHECK:        {{.* r5, .*, .*}}
+    ; CHECK:        {{.* r6, r3, r0}}
+    ; CHECK-NOT:    {{.* r7, .*, .*}}
+    ; CHECK:        brlid
 
     %tmp.13 = call i32 @params9_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5,
                                          i32 6, i32 7, i32 8, i32 9)
@@ -246,6 +287,10 @@
     ; CHECK:        {{.* r10, .*, .*}}
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.13)
+    ; CHECK:        {{.* r5, .*, .*}}
+    ; CHECK:        {{.* r6, r3, r0}}
+    ; CHECK-NOT:    {{.* r7, .*, .*}}
+    ; CHECK:        brlid
 
     %tmp.14 = call i32 @params10_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5,
                                           i32 6, i32 7, i32 8, i32 9, i32 10)
@@ -261,6 +306,10 @@
     ; CHECK:        {{.* r10, .*, .*}}
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.14)
+    ; CHECK:        {{.* r5, .*, .*}}
+    ; CHECK:        {{.* r6, r3, r0}}
+    ; CHECK-NOT:    {{.* r7, .*, .*}}
+    ; CHECK:        brlid
 
     ret void
 }

Modified: llvm/trunk/test/CodeGen/MBlaze/fpu.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MBlaze/fpu.ll?rev=116991&r1=116990&r2=116991&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MBlaze/fpu.ll (original)
+++ llvm/trunk/test/CodeGen/MBlaze/fpu.ll Wed Oct 20 22:34:22 2010
@@ -10,14 +10,14 @@
     ; FPU:        test_add:
 
     %tmp.1 = fadd float %a, %b
+    ; FUN-NOT:    fadd
     ; FUN:        brlid
     ; FPU-NOT:    brlid
+    ; FPU:        fadd
 
     ret float %tmp.1
     ; FUN:        rtsd
     ; FPU:        rtsd
-    ; FUN-NOT:    fadd
-    ; FPU-NEXT:   fadd
 }
 
 define float @test_sub(float %a, float %b) {
@@ -25,14 +25,14 @@
     ; FPU:        test_sub:
 
     %tmp.1 = fsub float %a, %b
+    ; FUN-NOT:    frsub
     ; FUN:        brlid
     ; FPU-NOT:    brlid
+    ; FPU:        frsub
 
     ret float %tmp.1
     ; FUN:        rtsd
     ; FPU:        rtsd
-    ; FUN-NOT:    frsub
-    ; FPU-NEXT:   frsub
 }
 
 define float @test_mul(float %a, float %b) {
@@ -40,14 +40,14 @@
     ; FPU:        test_mul:
 
     %tmp.1 = fmul float %a, %b
+    ; FUN-NOT:    fmul
     ; FUN:        brlid
     ; FPU-NOT:    brlid
+    ; FPU:        fmul
 
     ret float %tmp.1
     ; FUN:        rtsd
     ; FPU:        rtsd
-    ; FUN-NOT:    fmul
-    ; FPU-NEXT:   fmul
 }
 
 define float @test_div(float %a, float %b) {
@@ -55,12 +55,12 @@
     ; FPU:        test_div:
 
     %tmp.1 = fdiv float %a, %b
+    ; FUN-NOT:    fdiv
     ; FUN:        brlid
     ; FPU-NOT:    brlid
+    ; FPU:        fdiv
 
     ret float %tmp.1
     ; FUN:        rtsd
     ; FPU:        rtsd
-    ; FUN-NOT:    fdiv
-    ; FPU-NEXT:   fdiv
 }

Modified: llvm/trunk/test/CodeGen/MBlaze/imm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MBlaze/imm.ll?rev=116991&r1=116990&r2=116991&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MBlaze/imm.ll (original)
+++ llvm/trunk/test/CodeGen/MBlaze/imm.ll Wed Oct 20 22:34:22 2010
@@ -7,21 +7,21 @@
 
 define i8 @retimm_i8() {
     ; CHECK:        retimm_i8:
-    ; CHECK:        rtsd
-    ; CHECK-NEXT:   add
+    ; CHECK:        add
+    ; CHECK-NEXT:   rtsd
     ; FPU:          retimm_i8:
-    ; FPU:          rtsd
-    ; FPU-NEXT:     add
+    ; FPU:          add
+    ; FPU-NEXT:     rtsd
     ret i8 123
 }
 
 define i16 @retimm_i16() {
     ; CHECK:        retimm_i16:
-    ; CHECK:        rtsd
-    ; CHECK-NEXT:   add
+    ; CHECK:        add
+    ; CHECK-NEXT:   rtsd
     ; FPU:          retimm_i16:
-    ; FPU:          rtsd
-    ; FPU-NEXT:     add
+    ; FPU:          add
+    ; FPU-NEXT:     rtsd
     ret i16 38212
 }
 
@@ -38,12 +38,12 @@
 define i64 @retimm_i64() {
     ; CHECK:        retimm_i64:
     ; CHECK:        add
-    ; CHECK-NEXT:   rtsd
     ; CHECK-NEXT:   add
+    ; CHECK-NEXT:   rtsd
     ; FPU:          retimm_i64:
     ; FPU:          add
-    ; FPU-NEXT:     rtsd
     ; FPU-NEXT:     add
+    ; FPU-NEXT:     rtsd
     ret i64 94581823
 }
 
@@ -53,7 +53,7 @@
     ; CHECK-NEXT:   rtsd
     ; FPU:          retimm_float:
     ; FPU:          or
-    ; FPU-NEXT:     rtsd
+    ; FPU:          rtsd
     ret float 12.0
 }
 

Modified: llvm/trunk/test/CodeGen/MBlaze/jumptable.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MBlaze/jumptable.ll?rev=116991&r1=116990&r2=116991&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MBlaze/jumptable.ll (original)
+++ llvm/trunk/test/CodeGen/MBlaze/jumptable.ll Wed Oct 20 22:34:22 2010
@@ -18,8 +18,8 @@
                                       i32 8, label %L8
                                       i32 9, label %L9 ]
 
-    ; CHECK:        lw  [[REG:r[0-9]*]]
-    ; CHECK:        brd [[REG]]
+    ; CHECK:        lw [[REG:r[0-9]*]]
+    ; CHECK:        br [[REG]]
 L0:
     %var0 = add i32 %arg, 0
     br label %DONE

Modified: llvm/trunk/test/CodeGen/MBlaze/mul.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MBlaze/mul.ll?rev=116991&r1=116990&r2=116991&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MBlaze/mul.ll (original)
+++ llvm/trunk/test/CodeGen/MBlaze/mul.ll Wed Oct 20 22:34:22 2010
@@ -13,11 +13,11 @@
     ; FUN-NOT:    mul
     ; FUN:        brlid
     ; MUL-NOT:    brlid
+    ; MUL:        mul
 
     ret i8 %tmp.1
     ; FUN:        rtsd
     ; MUL:        rtsd
-    ; MUL:        mul
 }
 
 define i16 @test_i16(i16 %a, i16 %b) {
@@ -28,11 +28,11 @@
     ; FUN-NOT:    mul
     ; FUN:        brlid
     ; MUL-NOT:    brlid
+    ; MUL:        mul
 
     ret i16 %tmp.1
     ; FUN:        rtsd
     ; MUL:        rtsd
-    ; MUL:        mul
 }
 
 define i32 @test_i32(i32 %a, i32 %b) {
@@ -43,9 +43,9 @@
     ; FUN-NOT:    mul
     ; FUN:        brlid
     ; MUL-NOT:    brlid
+    ; MUL:        mul
 
     ret i32 %tmp.1
     ; FUN:        rtsd
     ; MUL:        rtsd
-    ; MUL:        mul
 }

Modified: llvm/trunk/test/CodeGen/MBlaze/shift.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MBlaze/shift.ll?rev=116991&r1=116990&r2=116991&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MBlaze/shift.ll (original)
+++ llvm/trunk/test/CodeGen/MBlaze/shift.ll Wed Oct 20 22:34:22 2010
@@ -10,17 +10,17 @@
     ; SHT:        test_i8:
 
     %tmp.1 = shl i8 %a, %b
+    ; FUN-NOT:    bsll
     ; FUN:        andi
     ; FUN:        add
     ; FUN:        bnei
     ; SHT-NOT:    andi
     ; SHT-NOT:    bnei
+    ; SHT:        bsll
 
     ret i8 %tmp.1
     ; FUN:        rtsd
     ; SHT:        rtsd
-    ; FUN-NOT:    bsll
-    ; SHT-NEXT:   bsll
 }
 
 define i8 @testc_i8(i8 %a, i8 %b) {
@@ -28,18 +28,18 @@
     ; SHT:        testc_i8:
 
     %tmp.1 = shl i8 %a, 5
+    ; FUN-NOT:    bsll
     ; FUN:        andi
     ; FUN:        add
     ; FUN:        bnei
     ; SHT-NOT:    andi
     ; SHT-NOT:    add
     ; SHT-NOT:    bnei
+    ; SHT:        bslli
 
     ret i8 %tmp.1
     ; FUN:        rtsd
     ; SHT:        rtsd
-    ; FUN-NOT:    bsll
-    ; SHT-NEXT:   bslli
 }
 
 define i16 @test_i16(i16 %a, i16 %b) {
@@ -47,17 +47,17 @@
     ; SHT:        test_i16:
 
     %tmp.1 = shl i16 %a, %b
+    ; FUN-NOT:    bsll
     ; FUN:        andi
     ; FUN:        add
     ; FUN:        bnei
     ; SHT-NOT:    andi
     ; SHT-NOT:    bnei
+    ; SHT:        bsll
 
     ret i16 %tmp.1
     ; FUN:        rtsd
     ; SHT:        rtsd
-    ; FUN-NOT:    bsll
-    ; SHT-NEXT:   bsll
 }
 
 define i16 @testc_i16(i16 %a, i16 %b) {
@@ -65,18 +65,18 @@
     ; SHT:        testc_i16:
 
     %tmp.1 = shl i16 %a, 5
+    ; FUN-NOT:    bsll
     ; FUN:        andi
     ; FUN:        add
     ; FUN:        bnei
     ; SHT-NOT:    andi
     ; SHT-NOT:    add
     ; SHT-NOT:    bnei
+    ; SHT:        bslli
 
     ret i16 %tmp.1
     ; FUN:        rtsd
     ; SHT:        rtsd
-    ; FUN-NOT:    bsll
-    ; SHT-NEXT:   bslli
 }
 
 define i32 @test_i32(i32 %a, i32 %b) {
@@ -84,17 +84,17 @@
     ; SHT:        test_i32:
 
     %tmp.1 = shl i32 %a, %b
+    ; FUN-NOT:    bsll
     ; FUN:        andi
     ; FUN:        add
     ; FUN:        bnei
     ; SHT-NOT:    andi
     ; SHT-NOT:    bnei
+    ; SHT:        bsll
 
     ret i32 %tmp.1
     ; FUN:        rtsd
     ; SHT:        rtsd
-    ; FUN-NOT:    bsll
-    ; SHT-NEXT:   bsll
 }
 
 define i32 @testc_i32(i32 %a, i32 %b) {
@@ -102,16 +102,16 @@
     ; SHT:        testc_i32:
 
     %tmp.1 = shl i32 %a, 5
+    ; FUN-NOT:    bsll
     ; FUN:        andi
     ; FUN:        add
     ; FUN:        bnei
     ; SHT-NOT:    andi
     ; SHT-NOT:    add
     ; SHT-NOT:    bnei
+    ; SHT:        bslli
 
     ret i32 %tmp.1
     ; FUN:        rtsd
     ; SHT:        rtsd
-    ; FUN-NOT:    bsll
-    ; SHT-NEXT:   bslli
 }



From atrick at apple.com  Wed Oct 20 22:40:16 2010
From: atrick at apple.com (Andrew Trick)
Date: Thu, 21 Oct 2010 03:40:16 -0000
Subject: [llvm-commits] [llvm] r116992 - in /llvm/trunk:
 lib/Target/ARM/ARMScheduleA8.td lib/Target/ARM/ARMScheduleA9.td
 lib/Target/ARM/ARMScheduleV6.td test/CodeGen/ARM/fmscs.ll
 test/CodeGen/ARM/reg_sequence.ll test/MC/ARM/simple-fp-encoding.ll
Message-ID: <20101021034016.C98232A6C12C@llvm.org>

Author: atrick
Date: Wed Oct 20 22:40:16 2010
New Revision: 116992

URL: http://llvm.org/viewvc/llvm-project?rev=116992&view=rev
Log:
putback r116983 and fix simple-fp-encoding.ll tests

Modified:
    llvm/trunk/lib/Target/ARM/ARMScheduleA8.td
    llvm/trunk/lib/Target/ARM/ARMScheduleA9.td
    llvm/trunk/lib/Target/ARM/ARMScheduleV6.td
    llvm/trunk/test/CodeGen/ARM/fmscs.ll
    llvm/trunk/test/CodeGen/ARM/reg_sequence.ll
    llvm/trunk/test/MC/ARM/simple-fp-encoding.ll

Modified: llvm/trunk/lib/Target/ARM/ARMScheduleA8.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMScheduleA8.td?rev=116992&r1=116991&r2=116992&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMScheduleA8.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMScheduleA8.td Wed Oct 20 22:40:16 2010
@@ -331,6 +331,28 @@
   InstrItinData<IIC_fpSQRT64, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
                                InstrStage<29, [A8_NPipe], 0>,
                                InstrStage<29, [A8_NLSPipe]>], [29, 1]>,
+
+  //
+  // Integer to Single-precision Move
+  InstrItinData<IIC_fpMOVIS,  [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
+                               InstrStage<1, [A8_NPipe]>],
+                              [2, 1]>,
+  //
+  // Integer to Double-precision Move
+  InstrItinData<IIC_fpMOVID,  [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
+                               InstrStage<1, [A8_NPipe]>],
+                              [2, 1, 1]>,
+  //
+  // Single-precision to Integer Move
+  InstrItinData<IIC_fpMOVSI,  [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
+                               InstrStage<1, [A8_NPipe]>],
+                              [20, 1]>,
+  //
+  // Double-precision to Integer Move
+  InstrItinData<IIC_fpMOVDI,  [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
+                               InstrStage<1, [A8_NPipe]>],
+                              [20, 20, 1]>,
+
   //
   // Single-precision FP Load
   InstrItinData<IIC_fpLoad32, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,

Modified: llvm/trunk/lib/Target/ARM/ARMScheduleA9.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMScheduleA9.td?rev=116992&r1=116991&r2=116992&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMScheduleA9.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMScheduleA9.td Wed Oct 20 22:40:16 2010
@@ -641,7 +641,7 @@
                                InstrStage<1, [A9_DRegsVFP], 0, Required>,
                                InstrStage<2, [A9_DRegsN],   0, Reserved>,
                                InstrStage<1, [A9_NPipe]>],
-                              [1, 1]>,
+                              [2, 1]>,
   //
   // Double-precision to Integer Move
   InstrItinData<IIC_fpMOVDI,  [InstrStage<1, [A9_Issue0, A9_Issue1], 0>,
@@ -649,7 +649,7 @@
                                InstrStage<1, [A9_DRegsVFP], 0, Required>,
                                InstrStage<2, [A9_DRegsN],   0, Reserved>,
                                InstrStage<1, [A9_NPipe]>],
-                              [1, 1, 1]>,
+                              [2, 1, 1]>,
   //
   // Single-precision FP Load
   InstrItinData<IIC_fpLoad32, [InstrStage<1, [A9_Issue0, A9_Issue1], 0>,
@@ -1430,7 +1430,7 @@
                                InstrStage<1, [A9_DRegsN],   0, Required>,
                                InstrStage<3, [A9_DRegsVFP], 0, Reserved>,
                                InstrStage<1, [A9_NPipe]>],
-                              [2, 1]>,
+                              [1, 1]>,
   //
   // Integer to Double-precision Move
   InstrItinData<IIC_VMOVID ,  [InstrStage<1, [A9_Issue0, A9_Issue1], 0>,
@@ -1438,7 +1438,7 @@
                                InstrStage<1, [A9_DRegsN],   0, Required>,
                                InstrStage<3, [A9_DRegsVFP], 0, Reserved>,
                                InstrStage<1, [A9_NPipe]>],
-                              [2, 1, 1]>,
+                              [1, 1, 1]>,
   //
   // Single-precision to Integer Move
   InstrItinData<IIC_VMOVSI ,  [InstrStage<1, [A9_Issue0, A9_Issue1], 0>,

Modified: llvm/trunk/lib/Target/ARM/ARMScheduleV6.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMScheduleV6.td?rev=116992&r1=116991&r2=116992&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMScheduleV6.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMScheduleV6.td Wed Oct 20 22:40:16 2010
@@ -247,6 +247,18 @@
   // Double-precision FP SQRT
   InstrItinData<IIC_fpSQRT64 , [InstrStage<29, [V6_Pipe]>], [34, 2, 2]>,
   //
+  // Integer to Single-precision Move
+  InstrItinData<IIC_fpMOVIS,  [InstrStage<1, [V6_Pipe]>], [10, 1]>,
+  //
+  // Integer to Double-precision Move
+  InstrItinData<IIC_fpMOVID,  [InstrStage<1, [V6_Pipe]>], [10, 1, 1]>,
+  //
+  // Single-precision to Integer Move
+  InstrItinData<IIC_fpMOVSI,  [InstrStage<1, [V6_Pipe]>], [10, 1]>,
+  //
+  // Double-precision to Integer Move
+  InstrItinData<IIC_fpMOVDI,  [InstrStage<1, [V6_Pipe]>], [10, 10, 1]>,
+  //
   // Single-precision FP Load
   InstrItinData<IIC_fpLoad32 , [InstrStage<1, [V6_Pipe]>], [5, 2, 2]>,
   //

Modified: llvm/trunk/test/CodeGen/ARM/fmscs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fmscs.ll?rev=116992&r1=116991&r2=116992&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/fmscs.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/fmscs.ll Wed Oct 20 22:40:16 2010
@@ -19,6 +19,6 @@
 ; NFP0: 	vnmls.f32	s2, s1, s0
 
 ; CORTEXA8: test:
-; CORTEXA8: 	vnmls.f32	s2, s1, s0
+; CORTEXA8: 	vnmls.f32	s1, s2, s0
 ; CORTEXA9: test:
 ; CORTEXA9: 	vnmls.f32	s0, s1, s2

Modified: llvm/trunk/test/CodeGen/ARM/reg_sequence.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/reg_sequence.ll?rev=116992&r1=116991&r2=116992&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/reg_sequence.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/reg_sequence.ll Wed Oct 20 22:40:16 2010
@@ -75,7 +75,8 @@
 ; CHECK:        t3:
 ; CHECK:        vld3.8
 ; CHECK:        vmul.i8
-; CHECK-NOT:    vmov
+; CHECK:        vmov r
+; CHECK-NOT:    vmov d
 ; CHECK:        vst3.8
   %tmp1 = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8* %A, i32 1) ; <%struct.__neon_int8x8x3_t> [#uses=2]
   %tmp2 = extractvalue %struct.__neon_int8x8x3_t %tmp1, 0 ; <<8 x i8>> [#uses=1]

Modified: llvm/trunk/test/MC/ARM/simple-fp-encoding.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/simple-fp-encoding.ll?rev=116992&r1=116991&r2=116992&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/simple-fp-encoding.ll (original)
+++ llvm/trunk/test/MC/ARM/simple-fp-encoding.ll Wed Oct 20 22:40:16 2010
@@ -269,7 +269,7 @@
 define float @f91(float %a, float %b, float %c) nounwind readnone {
 entry:
 ; CHECK: f91
-; CHECK: vmla.f32 s2, s1, s0         @ encoding: [0x80,0x1a,0x00,0xee]
+; CHECK: vmla.f32 s1, s2, s0         @ encoding: [0x00,0x0a,0x41,0xee]
   %mul = fmul float %a, %b
   %add = fadd float %mul, %c
   ret float %add
@@ -287,7 +287,7 @@
 define float @f93(float %a, float %b, float %c) nounwind readnone {
 entry:
 ; CHECK: f93
-; CHECK: vmls.f32 s2, s1, s0         @ encoding: [0xc0,0x1a,0x00,0xee]
+; CHECK: vmls.f32 s1, s2, s0         @ encoding: [0x40,0x0a,0x41,0xee]
   %mul = fmul float %a, %b
   %sub = fsub float %c, %mul
   ret float %sub
@@ -306,7 +306,7 @@
 define float @f95(float %a, float %b, float %c) nounwind readnone {
 entry:
 ; CHECK: f95
-; CHECK: vnmla.f32 s2, s1, s0        @ encoding: [0xc0,0x1a,0x10,0xee]
+; CHECK: vnmla.f32 s1, s2, s0        @ encoding: [0x40,0x0a,0x51,0xee]
   %mul = fmul float %a, %b
   %sub = fsub float -0.000000e+00, %mul
   %sub3 = fsub float %sub, %c
@@ -325,7 +325,7 @@
 define float @f97(float %a, float %b, float %c) nounwind readnone {
 entry:
 ; CHECK: f97
-; CHECK: vnmls.f32 s2, s1, s0        @ encoding: [0x80,0x1a,0x10,0xee]
+; CHECK: vnmls.f32 s1, s2, s0        @ encoding: [0x00,0x0a,0x51,0xee]
   %mul = fmul float %a, %b
   %sub = fsub float %mul, %c
   ret float %sub
@@ -404,10 +404,10 @@
 define void @f104(float %a, float %b, float %c, float %d, float %e, float %f) nounwind {
 entry:
 ; CHECK: f104
-; CHECK: vmov s2, r0                 @ encoding: [0x10,0x0a,0x01,0xee]
-; CHECK: vmov s3, r1                 @ encoding: [0x90,0x1a,0x01,0xee]
-; CHECK: vmov s4, r2                 @ encoding: [0x10,0x2a,0x02,0xee]
-; CHECK: vmov s5, r3                 @ encoding: [0x90,0x3a,0x02,0xee]
+; CHECK: vmov	s0, r0               @ encoding: [0x10,0x0a,0x00,0xee]
+; CHECK: vmov	s1, r1               @ encoding: [0x90,0x1a,0x00,0xee]
+; CHECK: vmov	s2, r2               @ encoding: [0x10,0x2a,0x01,0xee]
+; CHECK: vmov	s3, r3               @ encoding: [0x90,0x3a,0x01,0xee]
   %conv = fptosi float %a to i32
   %conv2 = fptosi float %b to i32
   %conv4 = fptosi float %c to i32
@@ -415,10 +415,10 @@
   %conv8 = fptosi float %e to i32
   %conv10 = fptosi float %f to i32
   tail call void @g104(i32 %conv, i32 %conv2, i32 %conv4, i32 %conv6, i32 %conv8, i32 %conv10) nounwind
-; CHECK: vmov r0, s2                 @ encoding: [0x10,0x0a,0x11,0xee]
-; CHECK: vmov r1, s3                 @ encoding: [0x90,0x1a,0x11,0xee]
-; CHECK: vmov r2, s4                 @ encoding: [0x10,0x2a,0x12,0xee]
-; CHECK: vmov r3, s5                 @ encoding: [0x90,0x3a,0x12,0xee]
+; CHECK: vmov	r0, s0			@ encoding: [0x10,0x0a,0x10,0xee]
+; CHECK: vmov	r1, s1			@ encoding: [0x90,0x1a,0x10,0xee]
+; CHECK: vmov	r2, s2			@ encoding: [0x10,0x2a,0x11,0xee]
+; CHECK: vmov	r3, s3                  @ encoding: [0x90,0x3a,0x11,0xee]
   ret void
 }
 



From geek4civic at gmail.com  Wed Oct 20 22:45:39 2010
From: geek4civic at gmail.com (NAKAMURA Takumi)
Date: Thu, 21 Oct 2010 12:45:39 +0900
Subject: [llvm-commits] [llvm] r116986 - in /llvm/trunk: cmake/modules/
 lib/Target/MBlaze/ lib/Target/MBlaze/AsmPrinter/
 lib/Target/MBlaze/InstPrinter/ lib/Target/MBlaze/TargetInfo/
 test/CodeGen/MBlaze/
In-Reply-To: <20101021030955.E4F442A6C12C@llvm.org>
References: <20101021030955.E4F442A6C12C@llvm.org>
Message-ID: <AANLkTimfp9c=nntjieqwC32s=bGkPbtwsO=f6kQoNva+@mail.gmail.com>

Wesley,

Suggested patch ;)
Passes on x86_64 centos5

--- a/lib/Target/MBlaze/MBlazeMCInstLower.cpp
+++ b/lib/Target/MBlaze/MBlazeMCInstLower.cpp
@@ -12,7 +12,7 @@
 //
 //===----------------------------------------------------------------------===//

-#include "MBLazeMCInstLower.h"
+#include "MBlazeMCInstLower.h"
 #include "MBlazeInstrInfo.h"
 #include "llvm/Constants.h"
 #include "llvm/CodeGen/AsmPrinter.h"

From peckw at wesleypeck.com  Wed Oct 20 22:57:26 2010
From: peckw at wesleypeck.com (Wesley Peck)
Date: Thu, 21 Oct 2010 03:57:26 -0000
Subject: [llvm-commits] [llvm] r116993 - in /llvm/trunk: cmake/modules/
 lib/Target/MBlaze/ lib/Target/MBlaze/InstPrinter/
 lib/Target/MBlaze/TargetInfo/ test/CodeGen/MBlaze/
Message-ID: <20101021035726.F318C2A6C12C@llvm.org>

Author: peckw
Date: Wed Oct 20 22:57:26 2010
New Revision: 116993

URL: http://llvm.org/viewvc/llvm-project?rev=116993&view=rev
Log:
Recommit 116986 with capitalization typo fixed.

Added:
    llvm/trunk/lib/Target/MBlaze/InstPrinter/
    llvm/trunk/lib/Target/MBlaze/InstPrinter/CMakeLists.txt
    llvm/trunk/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.cpp
    llvm/trunk/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.h
    llvm/trunk/lib/Target/MBlaze/InstPrinter/Makefile
    llvm/trunk/lib/Target/MBlaze/MBlazeAsmBackend.cpp
    llvm/trunk/lib/Target/MBlaze/MBlazeAsmPrinter.cpp
    llvm/trunk/lib/Target/MBlaze/MBlazeELFWriterInfo.cpp
    llvm/trunk/lib/Target/MBlaze/MBlazeELFWriterInfo.h
    llvm/trunk/lib/Target/MBlaze/MBlazeFixupKinds.h
    llvm/trunk/lib/Target/MBlaze/MBlazeMCCodeEmitter.cpp
    llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.cpp
    llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.h
    llvm/trunk/lib/Target/MBlaze/MBlazeRelocations.h
    llvm/trunk/lib/Target/MBlaze/TODO
Modified:
    llvm/trunk/cmake/modules/LLVMLibDeps.cmake
    llvm/trunk/lib/Target/MBlaze/CMakeLists.txt
    llvm/trunk/lib/Target/MBlaze/MBlaze.h
    llvm/trunk/lib/Target/MBlaze/MBlaze.td
    llvm/trunk/lib/Target/MBlaze/MBlazeDelaySlotFiller.cpp
    llvm/trunk/lib/Target/MBlaze/MBlazeISelLowering.cpp
    llvm/trunk/lib/Target/MBlaze/MBlazeInstrFPU.td
    llvm/trunk/lib/Target/MBlaze/MBlazeInstrFSL.td
    llvm/trunk/lib/Target/MBlaze/MBlazeInstrFormats.td
    llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.h
    llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.td
    llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.cpp
    llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.h
    llvm/trunk/lib/Target/MBlaze/Makefile
    llvm/trunk/lib/Target/MBlaze/TargetInfo/CMakeLists.txt
    llvm/trunk/test/CodeGen/MBlaze/brind.ll
    llvm/trunk/test/CodeGen/MBlaze/cc.ll
    llvm/trunk/test/CodeGen/MBlaze/fpu.ll
    llvm/trunk/test/CodeGen/MBlaze/imm.ll
    llvm/trunk/test/CodeGen/MBlaze/jumptable.ll
    llvm/trunk/test/CodeGen/MBlaze/mul.ll
    llvm/trunk/test/CodeGen/MBlaze/shift.ll

Modified: llvm/trunk/cmake/modules/LLVMLibDeps.cmake
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/cmake/modules/LLVMLibDeps.cmake?rev=116993&r1=116992&r2=116993&view=diff
==============================================================================
--- llvm/trunk/cmake/modules/LLVMLibDeps.cmake (original)
+++ llvm/trunk/cmake/modules/LLVMLibDeps.cmake Wed Oct 20 22:57:26 2010
@@ -1,28 +1,28 @@
-set(MSVC_LIB_DEPS_LLVMARMAsmParser LLVMARMCodeGen LLVMARMInfo LLVMMC LLVMMCParser LLVMSupport LLVMTarget)
-set(MSVC_LIB_DEPS_LLVMARMAsmPrinter LLVMMC LLVMSupport)
+set(MSVC_LIB_DEPS_LLVMARMAsmParser LLVMARMInfo LLVMMC LLVMMCParser LLVMSupport LLVMSystem LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMARMAsmPrinter LLVMMC LLVMSupport LLVMSystem)
 set(MSVC_LIB_DEPS_LLVMARMCodeGen LLVMARMAsmPrinter LLVMARMInfo LLVMAnalysis LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget)
-set(MSVC_LIB_DEPS_LLVMARMDisassembler LLVMARMCodeGen LLVMARMInfo LLVMMC LLVMSupport)
+set(MSVC_LIB_DEPS_LLVMARMDisassembler LLVMARMCodeGen LLVMARMInfo LLVMMC LLVMSupport LLVMSystem)
 set(MSVC_LIB_DEPS_LLVMARMInfo LLVMSupport)
-set(MSVC_LIB_DEPS_LLVMAlphaAsmPrinter LLVMAlphaCodeGen LLVMAlphaInfo LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMAlphaAsmPrinter LLVMAlphaInfo LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMAlphaCodeGen LLVMAlphaInfo LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMAlphaInfo LLVMSupport)
 set(MSVC_LIB_DEPS_LLVMAnalysis LLVMCore LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMArchive LLVMBitReader LLVMCore LLVMSupport LLVMSystem)
-set(MSVC_LIB_DEPS_LLVMAsmParser LLVMCore LLVMSupport)
+set(MSVC_LIB_DEPS_LLVMAsmParser LLVMCore LLVMSupport LLVMSystem)
 set(MSVC_LIB_DEPS_LLVMAsmPrinter LLVMAnalysis LLVMCodeGen LLVMCore LLVMMC LLVMMCParser LLVMSupport LLVMSystem LLVMTarget)
-set(MSVC_LIB_DEPS_LLVMBitReader LLVMCore LLVMSupport)
-set(MSVC_LIB_DEPS_LLVMBitWriter LLVMCore LLVMSupport)
-set(MSVC_LIB_DEPS_LLVMBlackfinAsmPrinter LLVMAsmPrinter LLVMBlackfinCodeGen LLVMBlackfinInfo LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMTarget)
-set(MSVC_LIB_DEPS_LLVMBlackfinCodeGen LLVMBlackfinInfo LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMBitReader LLVMCore LLVMSupport LLVMSystem)
+set(MSVC_LIB_DEPS_LLVMBitWriter LLVMCore LLVMSupport LLVMSystem)
+set(MSVC_LIB_DEPS_LLVMBlackfinAsmPrinter LLVMAsmPrinter LLVMBlackfinInfo LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMBlackfinCodeGen LLVMBlackfinInfo LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMBlackfinInfo LLVMSupport)
 set(MSVC_LIB_DEPS_LLVMCBackend LLVMAnalysis LLVMCBackendInfo LLVMCodeGen LLVMCore LLVMMC LLVMScalarOpts LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils LLVMipa)
 set(MSVC_LIB_DEPS_LLVMCBackendInfo LLVMSupport)
-set(MSVC_LIB_DEPS_LLVMCellSPUAsmPrinter LLVMAsmPrinter LLVMCellSPUCodeGen LLVMCellSPUInfo LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMTarget)
-set(MSVC_LIB_DEPS_LLVMCellSPUCodeGen LLVMCellSPUInfo LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMCellSPUAsmPrinter LLVMAsmPrinter LLVMCellSPUInfo LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMCellSPUCodeGen LLVMCellSPUInfo LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMCellSPUInfo LLVMSupport)
 set(MSVC_LIB_DEPS_LLVMCodeGen LLVMAnalysis LLVMCore LLVMMC LLVMScalarOpts LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils)
 set(MSVC_LIB_DEPS_LLVMCore LLVMSupport LLVMSystem)
-set(MSVC_LIB_DEPS_LLVMCppBackend LLVMCore LLVMCppBackendInfo LLVMSupport LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMCppBackend LLVMCore LLVMCppBackendInfo LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMCppBackendInfo LLVMSupport)
 set(MSVC_LIB_DEPS_LLVMExecutionEngine LLVMCore LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMInstCombine LLVMAnalysis LLVMCore LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils)
@@ -30,43 +30,43 @@
 set(MSVC_LIB_DEPS_LLVMInterpreter LLVMCodeGen LLVMCore LLVMExecutionEngine LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMJIT LLVMCodeGen LLVMCore LLVMExecutionEngine LLVMMC LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMLinker LLVMArchive LLVMBitReader LLVMCore LLVMSupport LLVMSystem LLVMTransformUtils)
-set(MSVC_LIB_DEPS_LLVMMBlazeAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMBlazeCodeGen LLVMMBlazeInfo LLVMMC LLVMSupport LLVMTarget)
-set(MSVC_LIB_DEPS_LLVMMBlazeCodeGen LLVMCodeGen LLVMCore LLVMMBlazeInfo LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMMBlazeAsmPrinter LLVMMC LLVMSupport LLVMSystem)
+set(MSVC_LIB_DEPS_LLVMMBlazeCodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMBlazeAsmPrinter LLVMMBlazeInfo LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMMBlazeInfo LLVMSupport)
 set(MSVC_LIB_DEPS_LLVMMC LLVMSupport LLVMSystem)
-set(MSVC_LIB_DEPS_LLVMMCDisassembler LLVMARMAsmParser LLVMARMCodeGen LLVMARMDisassembler LLVMARMInfo LLVMAlphaAsmPrinter LLVMAlphaCodeGen LLVMAlphaInfo LLVMBlackfinAsmPrinter LLVMBlackfinCodeGen LLVMBlackfinInfo LLVMCBackend LLVMCBackendInfo LLVMCellSPUAsmPrinter LLVMCellSPUCodeGen LLVMCellSPUInfo LLVMCppBackend LLVMCppBackendInfo LLVMMBlazeAsmPrinter LLVMMBlazeCodeGen LLVMMBlazeInfo LLVMMC LLVMMCParser LLVMMSP430CodeGen LLVMMSP430Info LLVMMipsAsmPrinter LLVMMipsCodeGen LLVMMipsInfo LLVMPTXAsmPrinter LLVMPTXCodeGen LLVMPTXInfo LLVMPowerPCAsmPrinter LLVMPowerPCCodeGen LLVMPowerPCInfo LLVMSparcAsmPrinter LLVMSparcCodeGen LLVMSparcInfo LLVMSupport LLVMSystem LLVMSystemZAsmPrinter LLVMSystemZCodeGen LLVMSystemZInfo LLVMX86AsmParser LLVMX86CodeGen LLVMX86Disassembler LLVMX86Info LLVMXCoreAsmPrinter LLVMXCoreCodeGen LLVMXCoreInfo)
-set(MSVC_LIB_DEPS_LLVMMCParser LLVMMC LLVMSupport)
-set(MSVC_LIB_DEPS_LLVMMSP430AsmPrinter LLVMMC LLVMSupport)
+set(MSVC_LIB_DEPS_LLVMMCDisassembler LLVMARMAsmParser LLVMARMCodeGen LLVMARMDisassembler LLVMARMInfo LLVMAlphaAsmPrinter LLVMAlphaCodeGen LLVMAlphaInfo LLVMBlackfinAsmPrinter LLVMBlackfinCodeGen LLVMBlackfinInfo LLVMCBackend LLVMCBackendInfo LLVMCellSPUAsmPrinter LLVMCellSPUCodeGen LLVMCellSPUInfo LLVMCppBackend LLVMCppBackendInfo LLVMMBlazeCodeGen LLVMMBlazeInfo LLVMMC LLVMMCParser LLVMMSP430CodeGen LLVMMSP430Info LLVMMipsAsmPrinter LLVMMipsCodeGen LLVMMipsInfo LLVMPTXAsmPrinter LLVMPTXCodeGen LLVMPTXInfo LLVMPowerPCAsmPrinter LLVMPowerPCCodeGen LLVMPowerPCInfo LLVMSparcAsmPrinter LLVMSparcCodeGen LLVMSparcInfo LLVMSupport LLVMSystem LLVMSystemZAsmPrinter LLVMSystemZCodeGen LLVMSystemZInfo LLVMX86AsmParser LLVMX86CodeGen LLVMX86Disassembler LLVMX86Info LLVMXCoreAsmPrinter LLVMXCoreCodeGen LLVMXCoreInfo)
+set(MSVC_LIB_DEPS_LLVMMCParser LLVMMC LLVMSupport LLVMSystem)
+set(MSVC_LIB_DEPS_LLVMMSP430AsmPrinter LLVMMC LLVMSupport LLVMSystem)
 set(MSVC_LIB_DEPS_LLVMMSP430CodeGen LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMMSP430AsmPrinter LLVMMSP430Info LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMMSP430Info LLVMSupport)
-set(MSVC_LIB_DEPS_LLVMMipsAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMMipsCodeGen LLVMMipsInfo LLVMSupport LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMMipsAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMMipsCodeGen LLVMMipsInfo LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMMipsCodeGen LLVMCodeGen LLVMCore LLVMMC LLVMMipsInfo LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMMipsInfo LLVMSupport)
-set(MSVC_LIB_DEPS_LLVMPTXAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMPTXCodeGen LLVMPTXInfo LLVMSupport)
-set(MSVC_LIB_DEPS_LLVMPTXCodeGen LLVMCodeGen LLVMCore LLVMMC LLVMPTXInfo LLVMSelectionDAG LLVMSupport LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMPTXAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMPTXInfo LLVMSupport LLVMSystem)
+set(MSVC_LIB_DEPS_LLVMPTXCodeGen LLVMCodeGen LLVMCore LLVMMC LLVMPTXInfo LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMPTXInfo LLVMSupport)
-set(MSVC_LIB_DEPS_LLVMPowerPCAsmPrinter LLVMAnalysis LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMPowerPCCodeGen LLVMPowerPCInfo LLVMSupport LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMPowerPCAsmPrinter LLVMAnalysis LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMPowerPCInfo LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMPowerPCCodeGen LLVMCodeGen LLVMCore LLVMMC LLVMPowerPCInfo LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMPowerPCInfo LLVMSupport)
 set(MSVC_LIB_DEPS_LLVMScalarOpts LLVMAnalysis LLVMCore LLVMInstCombine LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils)
 set(MSVC_LIB_DEPS_LLVMSelectionDAG LLVMAnalysis LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget)
-set(MSVC_LIB_DEPS_LLVMSparcAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSparcCodeGen LLVMSparcInfo LLVMSupport LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMSparcAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSparcInfo LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMSparcCodeGen LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSparcInfo LLVMSupport LLVMSystem LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMSparcInfo LLVMSupport)
 set(MSVC_LIB_DEPS_LLVMSupport LLVMSystem)
 set(MSVC_LIB_DEPS_LLVMSystem )
-set(MSVC_LIB_DEPS_LLVMSystemZAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystemZCodeGen LLVMSystemZInfo LLVMTarget)
-set(MSVC_LIB_DEPS_LLVMSystemZCodeGen LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystemZInfo LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMSystemZAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMSystemZInfo LLVMTarget)
+set(MSVC_LIB_DEPS_LLVMSystemZCodeGen LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMSystemZInfo LLVMTarget)
 set(MSVC_LIB_DEPS_LLVMSystemZInfo LLVMSupport)
-set(MSVC_LIB_DEPS_LLVMTarget LLVMCore LLVMMC LLVMSupport)
+set(MSVC_LIB_DEPS_LLVMTarget LLVMCore LLVMMC LLVMSupport LLVMSystem)
 set(MSVC_LIB_DEPS_LLVMTransformUtils LLVMAnalysis LLVMCore LLVMSupport LLVMSystem LLVMTarget LLVMipa)
-set(MSVC_LIB_DEPS_LLVMX86AsmParser LLVMMC LLVMMCParser LLVMSupport LLVMTarget LLVMX86Info)
-set(MSVC_LIB_DEPS_LLVMX86AsmPrinter LLVMMC LLVMSupport)
+set(MSVC_LIB_DEPS_LLVMX86AsmParser LLVMMC LLVMMCParser LLVMSupport LLVMSystem LLVMTarget LLVMX86Info)
+set(MSVC_LIB_DEPS_LLVMX86AsmPrinter LLVMMC LLVMSupport LLVMSystem)
 set(MSVC_LIB_DEPS_LLVMX86CodeGen LLVMAnalysis LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget LLVMX86AsmPrinter LLVMX86Info)
 set(MSVC_LIB_DEPS_LLVMX86Disassembler LLVMMC LLVMSupport LLVMX86Info)
 set(MSVC_LIB_DEPS_LLVMX86Info LLVMSupport)
-set(MSVC_LIB_DEPS_LLVMXCoreAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMTarget LLVMXCoreCodeGen LLVMXCoreInfo)
-set(MSVC_LIB_DEPS_LLVMXCoreCodeGen LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMTarget LLVMXCoreInfo)
+set(MSVC_LIB_DEPS_LLVMXCoreAsmPrinter LLVMAsmPrinter LLVMCodeGen LLVMCore LLVMMC LLVMSupport LLVMSystem LLVMTarget LLVMXCoreInfo)
+set(MSVC_LIB_DEPS_LLVMXCoreCodeGen LLVMCodeGen LLVMCore LLVMMC LLVMSelectionDAG LLVMSupport LLVMSystem LLVMTarget LLVMXCoreInfo)
 set(MSVC_LIB_DEPS_LLVMXCoreInfo LLVMSupport)
 set(MSVC_LIB_DEPS_LLVMipa LLVMAnalysis LLVMCore LLVMSupport LLVMSystem)
 set(MSVC_LIB_DEPS_LLVMipo LLVMAnalysis LLVMCore LLVMScalarOpts LLVMSupport LLVMSystem LLVMTarget LLVMTransformUtils LLVMipa)

Modified: llvm/trunk/lib/Target/MBlaze/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/CMakeLists.txt?rev=116993&r1=116992&r2=116993&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/CMakeLists.txt (original)
+++ llvm/trunk/lib/Target/MBlaze/CMakeLists.txt Wed Oct 20 22:57:26 2010
@@ -5,6 +5,7 @@
 tablegen(MBlazeGenRegisterInfo.inc -gen-register-desc)
 tablegen(MBlazeGenInstrNames.inc -gen-instr-enums)
 tablegen(MBlazeGenInstrInfo.inc -gen-instr-desc)
+tablegen(MBlazeGenCodeEmitter.inc -gen-emitter)
 tablegen(MBlazeGenAsmWriter.inc -gen-asm-writer)
 tablegen(MBlazeGenDAGISel.inc -gen-dag-isel)
 tablegen(MBlazeGenCallingConv.inc -gen-callingconv)
@@ -23,4 +24,9 @@
   MBlazeTargetObjectFile.cpp
   MBlazeIntrinsicInfo.cpp
   MBlazeSelectionDAGInfo.cpp
+  MBlazeAsmPrinter.cpp
+  MBlazeAsmBackend.cpp
+  MBlazeMCInstLower.cpp
+  MBlazeELFWriterInfo.cpp
+  MBlazeMCCodeEmitter.cpp
   )

Added: llvm/trunk/lib/Target/MBlaze/InstPrinter/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/InstPrinter/CMakeLists.txt?rev=116993&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/InstPrinter/CMakeLists.txt (added)
+++ llvm/trunk/lib/Target/MBlaze/InstPrinter/CMakeLists.txt Wed Oct 20 22:57:26 2010
@@ -0,0 +1,8 @@
+include_directories( ${CMAKE_CURRENT_BINARY_DIR}/.. 
+                     ${CMAKE_CURRENT_SOURCE_DIR}/.. )
+
+add_llvm_library(LLVMMBlazeAsmPrinter
+    MBlazeInstPrinter.cpp
+  )
+
+add_dependencies(LLVMMBlazeAsmPrinter MBlazeCodeGenTable_gen)

Added: llvm/trunk/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.cpp?rev=116993&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.cpp (added)
+++ llvm/trunk/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.cpp Wed Oct 20 22:57:26 2010
@@ -0,0 +1,140 @@
+//===-- MBlazeInstPrinter.cpp - Convert MBlaze MCInst to assembly syntax --===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This class prints an MBlaze MCInst to a .s file.
+//
+//===----------------------------------------------------------------------===//
+
+#define DEBUG_TYPE "asm-printer"
+#include "MBlaze.h"
+#include "MBlazeInstPrinter.h"
+#include "llvm/MC/MCInst.h"
+#include "llvm/MC/MCAsmInfo.h"
+#include "llvm/MC/MCExpr.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/FormattedStream.h"
+using namespace llvm;
+
+
+// Include the auto-generated portion of the assembly writer.
+#include "MBlazeGenAsmWriter.inc"
+
+void MBlazeInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
+  printInstruction(MI, O);
+}
+
+void MBlazeInstPrinter::printPCRelImmOperand(const MCInst *MI, unsigned OpNo,
+                                             raw_ostream &O) {
+  const MCOperand &Op = MI->getOperand(OpNo);
+  if (Op.isImm())
+    O << Op.getImm();
+  else {
+    assert(Op.isExpr() && "unknown pcrel immediate operand");
+    O << *Op.getExpr();
+  }
+}
+
+void MBlazeInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
+                                     raw_ostream &O, const char *Modifier) {
+  assert((Modifier == 0 || Modifier[0] == 0) && "No modifiers supported");
+  const MCOperand &Op = MI->getOperand(OpNo);
+  if (Op.isReg()) {
+    O << getRegisterName(Op.getReg());
+  } else if (Op.isImm()) {
+    O << (int32_t)Op.getImm();
+  } else {
+    assert(Op.isExpr() && "unknown operand kind in printOperand");
+    O << *Op.getExpr();
+  }
+}
+
+void MBlazeInstPrinter::printSrcMemOperand(const MCInst *MI, unsigned OpNo,
+                                           raw_ostream &O,
+                                           const char *Modifier) {
+  const MCOperand &Base = MI->getOperand(OpNo);
+  const MCOperand &Disp = MI->getOperand(OpNo+1);
+
+  // Print displacement first
+
+  // If the global address expression is a part of displacement field with a
+  // register base, we should not emit any prefix symbol here, e.g.
+  //   mov.w &foo, r1
+  // vs
+  //   mov.w glb(r1), r2
+  // Otherwise (!) msp430-as will silently miscompile the output :(
+  if (!Base.getReg())
+    O << '&';
+
+  if (Disp.isExpr())
+    O << *Disp.getExpr();
+  else {
+    assert(Disp.isImm() && "Expected immediate in displacement field");
+    O << Disp.getImm();
+  }
+
+  // Print register base field
+  if (Base.getReg())
+    O << getRegisterName(Base.getReg());
+}
+
+void MBlazeInstPrinter::printFSLImm(const MCInst *MI, int OpNo,
+                                    raw_ostream &O) {
+  const MCOperand &MO = MI->getOperand(OpNo);
+  if (MO.isImm())
+    O << "rfsl" << MO.getImm();
+  else
+    printOperand(MI, OpNo, O, NULL);
+}
+
+void MBlazeInstPrinter::printUnsignedImm(const MCInst *MI, int OpNo,
+                                        raw_ostream &O) {
+  const MCOperand &MO = MI->getOperand(OpNo);
+  if (MO.isImm())
+    O << MO.getImm();
+  else
+    printOperand(MI, OpNo, O, NULL);
+}
+
+void MBlazeInstPrinter::printMemOperand(const MCInst *MI, int OpNo,
+                                        raw_ostream &O, const char *Modifier ) {
+  printOperand(MI, OpNo+1, O, NULL);
+  O << ", ";
+  printOperand(MI, OpNo, O, NULL);
+}
+
+/*
+void MBlazeInstPrinter::printCCOperand(const MCInst *MI, unsigned OpNo,
+                                       raw_ostream &O) {
+  unsigned CC = MI->getOperand(OpNo).getImm();
+
+  switch (CC) {
+  default:
+   llvm_unreachable("Unsupported CC code");
+   break;
+  case MBlazeCC::COND_E:
+   O << "eq";
+   break;
+  case MBlazeCC::COND_NE:
+   O << "ne";
+   break;
+  case MBlazeCC::COND_HS:
+   O << "hs";
+   break;
+  case MBlazeCC::COND_LO:
+   O << "lo";
+   break;
+  case MBlazeCC::COND_GE:
+   O << "ge";
+   break;
+  case MBlazeCC::COND_L:
+   O << 'l';
+   break;
+  }
+}
+*/

Added: llvm/trunk/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.h?rev=116993&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.h (added)
+++ llvm/trunk/lib/Target/MBlaze/InstPrinter/MBlazeInstPrinter.h Wed Oct 20 22:57:26 2010
@@ -0,0 +1,46 @@
+//===-- MBLazeInstPrinter.h - Convert MBlaze MCInst to assembly syntax ----===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This class prints a MBlaze MCInst to a .s file.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef MBLAZEINSTPRINTER_H
+#define MBLAZEINSTPRINTER_H
+
+#include "llvm/MC/MCInstPrinter.h"
+
+namespace llvm {
+  class MCOperand;
+
+  class MBlazeInstPrinter : public MCInstPrinter {
+  public:
+    MBlazeInstPrinter(const MCAsmInfo &MAI) : MCInstPrinter(MAI) {
+    }
+
+    virtual void printInst(const MCInst *MI, raw_ostream &O);
+
+    // Autogenerated by tblgen.
+    void printInstruction(const MCInst *MI, raw_ostream &O);
+    static const char *getRegisterName(unsigned RegNo);
+    static const char *getInstructionName(unsigned Opcode);
+
+    void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O,
+                      const char *Modifier = 0);
+    void printPCRelImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
+    void printSrcMemOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O,
+                            const char *Modifier = 0);
+    void printFSLImm(const MCInst *MI, int OpNo, raw_ostream &O);
+    void printUnsignedImm(const MCInst *MI, int OpNo, raw_ostream &O);
+    void printMemOperand(const MCInst *MI, int OpNo,raw_ostream &O,
+                         const char *Modifier = 0);
+  };
+}
+
+#endif

Added: llvm/trunk/lib/Target/MBlaze/InstPrinter/Makefile
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/InstPrinter/Makefile?rev=116993&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/InstPrinter/Makefile (added)
+++ llvm/trunk/lib/Target/MBlaze/InstPrinter/Makefile Wed Oct 20 22:57:26 2010
@@ -0,0 +1,16 @@
+##===- lib/Target/MBlaze/AsmPrinter/Makefile ---------------*- Makefile -*-===##
+#
+#                     The LLVM Compiler Infrastructure
+#
+# This file is distributed under the University of Illinois Open Source
+# License. See LICENSE.TXT for details.
+#
+##===----------------------------------------------------------------------===##
+LEVEL = ../../../..
+LIBRARYNAME = LLVMMBlazeAsmPrinter
+
+# Hack: we need to include 'main' MBlaze target directory to grab
+#       private headers
+CPP.Flags += -I$(PROJ_OBJ_DIR)/.. -I$(PROJ_SRC_DIR)/..
+
+include $(LEVEL)/Makefile.common

Modified: llvm/trunk/lib/Target/MBlaze/MBlaze.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlaze.h?rev=116993&r1=116992&r2=116993&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlaze.h (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlaze.h Wed Oct 20 22:57:26 2010
@@ -21,8 +21,16 @@
   class MBlazeTargetMachine;
   class FunctionPass;
   class MachineCodeEmitter;
+  class MCCodeEmitter;
+  class TargetAsmBackend;
   class formatted_raw_ostream;
 
+  MCCodeEmitter *createMBlazeMCCodeEmitter(const Target &,
+                                           TargetMachine &TM,
+                                           MCContext &Ctx);
+
+  TargetAsmBackend *createMBlazeAsmBackend(const Target &, const std::string &);
+
   FunctionPass *createMBlazeISelDag(MBlazeTargetMachine &TM);
   FunctionPass *createMBlazeDelaySlotFillerPass(MBlazeTargetMachine &TM);
 

Modified: llvm/trunk/lib/Target/MBlaze/MBlaze.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlaze.td?rev=116993&r1=116992&r2=116993&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlaze.td (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlaze.td Wed Oct 20 22:57:26 2010
@@ -32,35 +32,35 @@
 //===----------------------------------------------------------------------===//
 
 def FeaturePipe3       : SubtargetFeature<"pipe3", "HasPipe3", "true",
-                                "Implements 3-stage pipeline.">;
+                                "Implements 3-stage pipeline">;
 def FeatureBarrel      : SubtargetFeature<"barrel", "HasBarrel", "true",
-                                "Implements barrel shifter.">;
+                                "Implements barrel shifter">;
 def FeatureDiv         : SubtargetFeature<"div", "HasDiv", "true",
-                                "Implements hardware divider.">;
+                                "Implements hardware divider">;
 def FeatureMul         : SubtargetFeature<"mul", "HasMul", "true",
-                                "Implements hardware multiplier.">;
+                                "Implements hardware multiplier">;
 def FeatureFSL         : SubtargetFeature<"fsl", "HasFSL", "true",
-                                "Implements FSL instructions.">;
+                                "Implements FSL instructions">;
 def FeatureEFSL        : SubtargetFeature<"efsl", "HasEFSL", "true",
-                                "Implements extended FSL instructions.">;
+                                "Implements extended FSL instructions">;
 def FeatureMSRSet      : SubtargetFeature<"msrset", "HasMSRSet", "true",
-                                "Implements MSR register set and clear.">;
+                                "Implements MSR register set and clear">;
 def FeatureException   : SubtargetFeature<"exception", "HasException", "true",
-                                "Implements hardware exception support.">;
+                                "Implements hardware exception support">;
 def FeaturePatCmp      : SubtargetFeature<"patcmp", "HasPatCmp", "true",
-                                "Implements pattern compare instruction.">;
+                                "Implements pattern compare instruction">;
 def FeatureFPU         : SubtargetFeature<"fpu", "HasFPU", "true",
-                                "Implements floating point unit.">;
+                                "Implements floating point unit">;
 def FeatureESR         : SubtargetFeature<"esr", "HasESR", "true",
                                 "Implements ESR and EAR registers">;
 def FeaturePVR         : SubtargetFeature<"pvr", "HasPVR", "true",
-                                "Implements processor version register.">;
+                                "Implements processor version register">;
 def FeatureMul64       : SubtargetFeature<"mul64", "HasMul64", "true",
                                 "Implements multiplier with 64-bit result">;
 def FeatureSqrt        : SubtargetFeature<"sqrt", "HasSqrt", "true",
-                                "Implements sqrt and floating point convert.">;
+                                "Implements sqrt and floating point convert">;
 def FeatureMMU         : SubtargetFeature<"mmu", "HasMMU", "true",
-                                "Implements memory management unit.">;
+                                "Implements memory management unit">;
 
 //===----------------------------------------------------------------------===//
 // MBlaze processors supported.
@@ -69,13 +69,26 @@
 class Proc<string Name, list<SubtargetFeature> Features>
  : Processor<Name, MBlazeGenericItineraries, Features>;
 
-
 def : Proc<"v400", []>;
 def : Proc<"v500", []>;
 def : Proc<"v600", []>;
 def : Proc<"v700", []>;
 def : Proc<"v710", []>;
 
+//===----------------------------------------------------------------------===//
+// Instruction Descriptions
+//===----------------------------------------------------------------------===//
+
+def MBlazeAsmWriter : AsmWriter {
+  string AsmWriterClassName  = "InstPrinter";
+  bit isMCAsmWriter = 1;
+}
+
+//===----------------------------------------------------------------------===//
+// Target Declaration
+//===----------------------------------------------------------------------===//
+
 def MBlaze : Target {
   let InstructionSet = MBlazeInstrInfo;
+  let AssemblyWriters = [MBlazeAsmWriter];
 }

Added: llvm/trunk/lib/Target/MBlaze/MBlazeAsmBackend.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeAsmBackend.cpp?rev=116993&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeAsmBackend.cpp (added)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeAsmBackend.cpp Wed Oct 20 22:57:26 2010
@@ -0,0 +1,152 @@
+//===-- MBlazeAsmBackend.cpp - MBlaze Assembler Backend -------------------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/Target/TargetAsmBackend.h"
+#include "MBlaze.h"
+#include "MBlazeFixupKinds.h"
+#include "llvm/ADT/Twine.h"
+#include "llvm/MC/ELFObjectWriter.h"
+#include "llvm/MC/MCAssembler.h"
+#include "llvm/MC/MCExpr.h"
+#include "llvm/MC/MCObjectFormat.h"
+#include "llvm/MC/MCObjectWriter.h"
+#include "llvm/MC/MCSectionELF.h"
+#include "llvm/MC/MCSectionMachO.h"
+#include "llvm/MC/MachObjectWriter.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
+#include "llvm/Target/TargetRegistry.h"
+#include "llvm/Target/TargetAsmBackend.h"
+using namespace llvm;
+
+static unsigned getFixupKindSize(unsigned Kind) {
+  switch (Kind) {
+  default: assert(0 && "invalid fixup kind!");
+  case FK_Data_1: return 1;
+  case MBlaze::reloc_pcrel_2byte:
+  case FK_Data_2: return 2;
+  case MBlaze::reloc_pcrel_4byte:
+  case FK_Data_4: return 4;
+  case FK_Data_8: return 8;
+  }
+}
+
+
+namespace {
+class MBlazeAsmBackend : public TargetAsmBackend {
+public:
+  MBlazeAsmBackend(const Target &T)
+    : TargetAsmBackend(T) {
+  }
+
+  bool MayNeedRelaxation(const MCInst &Inst) const;
+
+  void RelaxInstruction(const MCInst &Inst, MCInst &Res) const;
+
+  bool WriteNopData(uint64_t Count, MCObjectWriter *OW) const;
+
+  unsigned getPointerSize() const {
+    return 4;
+  }
+};
+
+bool MBlazeAsmBackend::MayNeedRelaxation(const MCInst &Inst) const {
+  return false;
+}
+
+void MBlazeAsmBackend::RelaxInstruction(const MCInst &Inst, MCInst &Res) const {
+  assert(0 && "MBlazeAsmBackend::RelaxInstruction() unimplemented");
+  return;
+}
+
+bool MBlazeAsmBackend::WriteNopData(uint64_t Count, MCObjectWriter *OW) const {
+  if ((Count % 4) != 0)
+    return false;
+
+  for (uint64_t i = 0; i < Count; i += 4 )
+      OW->Write32( 0x00000000 );
+
+  return true;
+}
+} // end anonymous namespace
+
+namespace {
+// FIXME: This should be in a separate file.
+// ELF is an ELF of course...
+class ELFMBlazeAsmBackend : public MBlazeAsmBackend {
+  MCELFObjectFormat Format;
+
+public:
+  Triple::OSType OSType;
+  ELFMBlazeAsmBackend(const Target &T, Triple::OSType _OSType)
+    : MBlazeAsmBackend(T), OSType(_OSType) {
+    HasScatteredSymbols = true;
+  }
+
+  virtual const MCObjectFormat &getObjectFormat() const {
+    return Format;
+  }
+
+
+  void ApplyFixup(const MCFixup &Fixup, MCDataFragment &DF,
+                  uint64_t Value) const;
+
+  bool isVirtualSection(const MCSection &Section) const {
+    const MCSectionELF &SE = static_cast<const MCSectionELF&>(Section);
+    return SE.getType() == MCSectionELF::SHT_NOBITS;
+  }
+
+  MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
+    return new ELFObjectWriter(OS, /*Is64Bit=*/false,
+                               OSType,
+                               /*IsLittleEndian=*/false,
+                               /*HasRelocationAddend=*/true);
+  }
+};
+
+void ELFMBlazeAsmBackend::ApplyFixup(const MCFixup &Fixup, MCDataFragment &DF,
+                                     uint64_t Value) const {
+  unsigned Size = getFixupKindSize(Fixup.getKind());
+            
+  assert(Fixup.getOffset() + Size <= DF.getContents().size() &&
+         "Invalid fixup offset!");
+
+  char *data = DF.getContents().data() + Fixup.getOffset();
+  switch (Size) {
+  default: llvm_unreachable( "Cannot fixup unknown value." );
+  case 1:  llvm_unreachable( "Cannot fixup 1 byte value." );
+  case 8:  llvm_unreachable( "Cannot fixup 8 byte value." );
+
+  case 4: 
+    *(data+7) = uint8_t(Value);
+    *(data+6) = uint8_t(Value >> 8);
+    *(data+3) = uint8_t(Value >> 16);
+    *(data+2) = uint8_t(Value >> 24);
+    break;
+
+  case 2:
+    *(data+3) = uint8_t(Value >> 0);
+    *(data+2) = uint8_t(Value >> 8);
+  }
+}
+} // end anonymous namespace
+
+TargetAsmBackend *llvm::createMBlazeAsmBackend(const Target &T,
+                                            const std::string &TT) {
+  switch (Triple(TT).getOS()) {
+  case Triple::Darwin:
+    assert(0 && "Mac not supported on MBlaze");
+  case Triple::MinGW32:
+  case Triple::Cygwin:
+  case Triple::Win32:
+    assert(0 && "Windows not supported on MBlaze");
+  default:
+    return new ELFMBlazeAsmBackend(T, Triple(TT).getOS());
+  }
+}

Added: llvm/trunk/lib/Target/MBlaze/MBlazeAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeAsmPrinter.cpp?rev=116993&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeAsmPrinter.cpp (added)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeAsmPrinter.cpp Wed Oct 20 22:57:26 2010
@@ -0,0 +1,314 @@
+//===-- MBlazeAsmPrinter.cpp - MBlaze LLVM assembly writer ----------------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file contains a printer that converts from our internal representation
+// of machine-dependent LLVM code to GAS-format MBlaze assembly language.
+//
+//===----------------------------------------------------------------------===//
+
+#define DEBUG_TYPE "mblaze-asm-printer"
+
+#include "MBlaze.h"
+#include "MBlazeSubtarget.h"
+#include "MBlazeInstrInfo.h"
+#include "MBlazeTargetMachine.h"
+#include "MBlazeMachineFunction.h"
+#include "MBlazeMCInstLower.h"
+#include "InstPrinter/MBlazeInstPrinter.h"
+#include "llvm/Constants.h"
+#include "llvm/DerivedTypes.h"
+#include "llvm/Module.h"
+#include "llvm/CodeGen/AsmPrinter.h"
+#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/MachineConstantPool.h"
+#include "llvm/CodeGen/MachineFrameInfo.h"
+#include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/MC/MCInst.h"
+#include "llvm/MC/MCStreamer.h"
+#include "llvm/MC/MCAsmInfo.h"
+#include "llvm/MC/MCSymbol.h"
+#include "llvm/Target/Mangler.h"
+#include "llvm/Target/TargetData.h"
+#include "llvm/Target/TargetLoweringObjectFile.h"
+#include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/TargetOptions.h"
+#include "llvm/Target/TargetRegistry.h"
+#include "llvm/ADT/SmallString.h"
+#include "llvm/ADT/StringExtras.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
+#include <cctype>
+
+using namespace llvm;
+
+namespace {
+  class MBlazeAsmPrinter : public AsmPrinter {
+    const MBlazeSubtarget *Subtarget;
+  public:
+    explicit MBlazeAsmPrinter(TargetMachine &TM, MCStreamer &Streamer)
+      : AsmPrinter(TM, Streamer) {
+      Subtarget = &TM.getSubtarget<MBlazeSubtarget>();
+    }
+
+    virtual const char *getPassName() const {
+      return "MBlaze Assembly Printer";
+    }
+
+    bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
+                         unsigned AsmVariant, const char *ExtraCode,
+                         raw_ostream &O);
+    void printOperand(const MachineInstr *MI, int opNum, raw_ostream &O);
+    void printUnsignedImm(const MachineInstr *MI, int opNum, raw_ostream &O);
+    void printFSLImm(const MachineInstr *MI, int opNum, raw_ostream &O);
+    void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O,
+                         const char *Modifier = 0);
+    void printSavedRegsBitmask(raw_ostream &OS);
+
+    void emitFrameDirective();
+
+    void EmitInstruction(const MachineInstr *MI); 
+    virtual void EmitFunctionBodyStart();
+    virtual void EmitFunctionBodyEnd();
+
+    virtual void EmitFunctionEntryLabel();
+  };
+} // end of anonymous namespace
+
+// #include "MBlazeGenAsmWriter.inc"
+
+//===----------------------------------------------------------------------===//
+//
+//  MBlaze Asm Directives
+//
+//  -- Frame directive "frame Stackpointer, Stacksize, RARegister"
+//  Describe the stack frame.
+//
+//  -- Mask directives "mask  bitmask, offset"
+//  Tells the assembler which registers are saved and where.
+//  bitmask - contain a little endian bitset indicating which registers are
+//            saved on function prologue (e.g. with a 0x80000000 mask, the
+//            assembler knows the register 31 (RA) is saved at prologue.
+//  offset  - the position before stack pointer subtraction indicating where
+//            the first saved register on prologue is located. (e.g. with a
+//
+//  Consider the following function prologue:
+//
+//    .frame  R19,48,R15
+//    .mask   0xc0000000,-8
+//       addiu R1, R1, -48
+//       sw R15, 40(R1)
+//       sw R19, 36(R1)
+//
+//    With a 0xc0000000 mask, the assembler knows the register 15 (R15) and
+//    19 (R19) are saved at prologue. As the save order on prologue is from
+//    left to right, R15 is saved first. A -8 offset means that after the
+//    stack pointer subtration, the first register in the mask (R15) will be
+//    saved at address 48-8=40.
+//
+//===----------------------------------------------------------------------===//
+
+//===----------------------------------------------------------------------===//
+void MBlazeAsmPrinter::EmitInstruction(const MachineInstr *MI) {
+  MBlazeMCInstLower MCInstLowering(OutContext, *Mang, *this);
+
+  MCInst TmpInst;
+  MCInstLowering.Lower(MI, TmpInst);
+  OutStreamer.EmitInstruction(TmpInst);
+}
+
+//===----------------------------------------------------------------------===//
+// Mask directives
+//===----------------------------------------------------------------------===//
+
+// Print a 32 bit hex number with all numbers.
+static void printHex32(unsigned int Value, raw_ostream &O) {
+  O << "0x";
+  for (int i = 7; i >= 0; i--)
+    O << utohexstr((Value & (0xF << (i*4))) >> (i*4));
+}
+
+
+// Create a bitmask with all callee saved registers for CPU or Floating Point
+// registers. For CPU registers consider RA, GP and FP for saving if necessary.
+void MBlazeAsmPrinter::printSavedRegsBitmask(raw_ostream &O) {
+  const TargetRegisterInfo &RI = *TM.getRegisterInfo();
+  const MBlazeFunctionInfo *MBlazeFI = MF->getInfo<MBlazeFunctionInfo>();
+
+  // CPU Saved Registers Bitmasks
+  unsigned int CPUBitmask = 0;
+
+  // Set the CPU Bitmasks
+  const MachineFrameInfo *MFI = MF->getFrameInfo();
+  const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
+  for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
+    unsigned Reg = CSI[i].getReg();
+    unsigned RegNum = MBlazeRegisterInfo::getRegisterNumbering(Reg);
+    if (MBlaze::CPURegsRegisterClass->contains(Reg))
+      CPUBitmask |= (1 << RegNum);
+  }
+
+  // Return Address and Frame registers must also be set in CPUBitmask.
+  if (RI.hasFP(*MF))
+    CPUBitmask |= (1 << MBlazeRegisterInfo::
+                getRegisterNumbering(RI.getFrameRegister(*MF)));
+
+  if (MFI->adjustsStack())
+    CPUBitmask |= (1 << MBlazeRegisterInfo::
+                getRegisterNumbering(RI.getRARegister()));
+
+  // Print CPUBitmask
+  O << "\t.mask \t"; printHex32(CPUBitmask, O);
+  O << ',' << MBlazeFI->getCPUTopSavedRegOff() << '\n';
+}
+
+//===----------------------------------------------------------------------===//
+// Frame and Set directives
+//===----------------------------------------------------------------------===//
+
+/// Frame Directive
+void MBlazeAsmPrinter::emitFrameDirective() {
+  // const TargetRegisterInfo &RI = *TM.getRegisterInfo();
+
+  // unsigned stackReg  = RI.getFrameRegister(*MF);
+  // unsigned returnReg = RI.getRARegister();
+  // unsigned stackSize = MF->getFrameInfo()->getStackSize();
+
+
+  /*
+  OutStreamer.EmitRawText("\t.frame\t" + 
+                          Twine(MBlazeInstPrinter::getRegisterName(stackReg)) +
+                          "," + Twine(stackSize) + "," +
+                          Twine(MBlazeInstPrinter::getRegisterName(returnReg)));
+  */
+}
+
+void MBlazeAsmPrinter::EmitFunctionEntryLabel() {
+  // OutStreamer.EmitRawText("\t.ent\t" + Twine(CurrentFnSym->getName()));
+  OutStreamer.EmitLabel(CurrentFnSym);
+}
+
+/// EmitFunctionBodyStart - Targets can override this to emit stuff before
+/// the first basic block in the function.
+void MBlazeAsmPrinter::EmitFunctionBodyStart() {
+  // emitFrameDirective();
+  
+  // SmallString<128> Str;
+  // raw_svector_ostream OS(Str);
+  // printSavedRegsBitmask(OS);
+  // OutStreamer.EmitRawText(OS.str());
+}
+
+/// EmitFunctionBodyEnd - Targets can override this to emit stuff after
+/// the last basic block in the function.
+void MBlazeAsmPrinter::EmitFunctionBodyEnd() {
+  // OutStreamer.EmitRawText("\t.end\t" + Twine(CurrentFnSym->getName()));
+}
+
+// Print out an operand for an inline asm expression.
+bool MBlazeAsmPrinter::
+PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
+                unsigned AsmVariant,const char *ExtraCode, raw_ostream &O) {
+  // Does this asm operand have a single letter operand modifier?
+  if (ExtraCode && ExtraCode[0])
+    return true; // Unknown modifier.
+
+  printOperand(MI, OpNo, O);
+  return false;
+}
+
+void MBlazeAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
+                                    raw_ostream &O) {
+  const MachineOperand &MO = MI->getOperand(opNum);
+
+  switch (MO.getType()) {
+  case MachineOperand::MO_Register:
+    O << MBlazeInstPrinter::getRegisterName(MO.getReg());
+    break;
+
+  case MachineOperand::MO_Immediate:
+    O << (int)MO.getImm();
+    break;
+
+  case MachineOperand::MO_FPImmediate: {
+    const ConstantFP *fp = MO.getFPImm();
+    printHex32(fp->getValueAPF().bitcastToAPInt().getZExtValue(), O);
+    O << ";\t# immediate = " << *fp;
+    break;
+  }
+
+  case MachineOperand::MO_MachineBasicBlock:
+    O << *MO.getMBB()->getSymbol();
+    return;
+
+  case MachineOperand::MO_GlobalAddress:
+    O << *Mang->getSymbol(MO.getGlobal());
+    break;
+
+  case MachineOperand::MO_ExternalSymbol:
+    O << *GetExternalSymbolSymbol(MO.getSymbolName());
+    break;
+
+  case MachineOperand::MO_JumpTableIndex:
+    O << MAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
+      << '_' << MO.getIndex();
+    break;
+
+  case MachineOperand::MO_ConstantPoolIndex:
+    O << MAI->getPrivateGlobalPrefix() << "CPI"
+      << getFunctionNumber() << "_" << MO.getIndex();
+    if (MO.getOffset())
+      O << "+" << MO.getOffset();
+    break;
+
+  default:
+    llvm_unreachable("<unknown operand type>");
+  }
+}
+
+void MBlazeAsmPrinter::printUnsignedImm(const MachineInstr *MI, int opNum,
+                                        raw_ostream &O) {
+  const MachineOperand &MO = MI->getOperand(opNum);
+  if (MO.isImm())
+    O << (unsigned int)MO.getImm();
+  else
+    printOperand(MI, opNum, O);
+}
+
+void MBlazeAsmPrinter::printFSLImm(const MachineInstr *MI, int opNum,
+                                   raw_ostream &O) {
+  const MachineOperand &MO = MI->getOperand(opNum);
+  if (MO.isImm())
+    O << "rfsl" << (unsigned int)MO.getImm();
+  else
+    printOperand(MI, opNum, O);
+}
+
+void MBlazeAsmPrinter::
+printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O,
+                const char *Modifier) {
+  printOperand(MI, opNum+1, O);
+  O << ", ";
+  printOperand(MI, opNum, O);
+}
+
+static MCInstPrinter *createMBlazeMCInstPrinter(const Target &T,
+                                                unsigned SyntaxVariant,
+                                                const MCAsmInfo &MAI) {
+  if (SyntaxVariant == 0)
+    return new MBlazeInstPrinter(MAI);
+  return 0;
+}
+
+// Force static initialization.
+extern "C" void LLVMInitializeMBlazeAsmPrinter() {
+  RegisterAsmPrinter<MBlazeAsmPrinter> X(TheMBlazeTarget);
+  TargetRegistry::RegisterMCInstPrinter(TheMBlazeTarget,
+                                        createMBlazeMCInstPrinter);
+
+}

Modified: llvm/trunk/lib/Target/MBlaze/MBlazeDelaySlotFiller.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeDelaySlotFiller.cpp?rev=116993&r1=116992&r2=116993&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeDelaySlotFiller.cpp (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeDelaySlotFiller.cpp Wed Oct 20 22:57:26 2010
@@ -19,6 +19,10 @@
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/ADT/Statistic.h"
+#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
 
 using namespace llvm;
 
@@ -51,6 +55,91 @@
   char Filler::ID = 0;
 } // end of anonymous namespace
 
+static bool hasImmInstruction( MachineBasicBlock::iterator &candidate ) {
+    // Any instruction with an immediate mode operand greater than
+    // 16-bits requires an implicit IMM instruction.
+    unsigned numOper = candidate->getNumOperands();
+    for( unsigned op = 0; op < numOper; ++op ) {
+        if( candidate->getOperand(op).isImm() &&
+            (candidate->getOperand(op).getImm() & 0xFFFFFFFFFFFF0000LL) != 0 )
+            return true;
+
+        // FIXME: we could probably check to see if the FP value happens
+        //        to not need an IMM instruction. For now we just always
+        //        assume that FP values always do.
+        if( candidate->getOperand(op).isFPImm() )
+            return true;
+    }
+
+    return false;
+}
+
+static bool delayHasHazard( MachineBasicBlock::iterator &candidate,
+                            MachineBasicBlock::iterator &slot ) {
+
+    // Loop over all of the operands in the branch instruction
+    // and make sure that none of them are defined by the
+    // candidate instruction.
+    unsigned numOper = slot->getNumOperands();
+    for( unsigned op = 0; op < numOper; ++op ) {
+        if( !slot->getOperand(op).isReg() || 
+            !slot->getOperand(op).isUse() ||
+            slot->getOperand(op).isImplicit() )
+            continue;
+
+        unsigned cnumOper = candidate->getNumOperands();
+        for( unsigned cop = 0; cop < cnumOper; ++cop ) {
+            if( candidate->getOperand(cop).isReg() &&
+                candidate->getOperand(cop).isDef() &&
+                candidate->getOperand(cop).getReg() == 
+                slot->getOperand(op).getReg() )
+                return true;
+        }
+    }
+
+    // There are no hazards between the two instructions
+    return false;
+}
+
+static bool usedBeforeDelaySlot( MachineBasicBlock::iterator &candidate,
+                                 MachineBasicBlock::iterator &slot ) {
+  MachineBasicBlock::iterator I = candidate;
+  for (++I; I != slot; ++I) {
+        unsigned numOper = I->getNumOperands();
+        for( unsigned op = 0; op < numOper; ++op ) {
+            if( I->getOperand(op).isReg() &&
+                I->getOperand(op).isUse() ) {
+                unsigned reg = I->getOperand(op).getReg();
+                unsigned cops = candidate->getNumOperands();
+                for( unsigned cop = 0; cop < cops; ++cop ) {
+                    if( candidate->getOperand(cop).isReg() &&
+                        candidate->getOperand(cop).isDef() &&
+                        candidate->getOperand(cop).getReg() == reg )
+                        return true;
+                }
+            }
+        }
+  }
+
+  return false;
+}
+
+static MachineBasicBlock::iterator
+findDelayInstr(MachineBasicBlock &MBB,MachineBasicBlock::iterator &slot) {
+  MachineBasicBlock::iterator found = MBB.end();
+  for (MachineBasicBlock::iterator I = MBB.begin(); I != slot; ++I) {
+      TargetInstrDesc desc = I->getDesc();
+      if( desc.hasDelaySlot() || desc.isBranch() || 
+          desc.mayLoad() || desc.    mayStore() || 
+          hasImmInstruction(I) || delayHasHazard(I,slot) || 
+          usedBeforeDelaySlot(I,slot)) continue;
+
+      found = I;
+  }
+
+  return found;
+}
+
 /// runOnMachineBasicBlock - Fill in delay slots for the given basic block.
 /// Currently, we fill delay slots with NOPs. We assume there is only one
 /// delay slot per delayed instruction.
@@ -59,10 +148,16 @@
   for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); ++I)
     if (I->getDesc().hasDelaySlot()) {
       MachineBasicBlock::iterator J = I;
+      MachineBasicBlock::iterator D = findDelayInstr(MBB,I);
+
       ++J;
-      BuildMI(MBB, J, I->getDebugLoc(), TII->get(MBlaze::NOP));
       ++FilledSlots;
       Changed = true;
+
+      if( D == MBB.end() )
+        BuildMI(MBB, J, I->getDebugLoc(), TII->get(MBlaze::NOP));
+      else
+        MBB.splice( J, &MBB, D );
     }
   return Changed;
 }

Added: llvm/trunk/lib/Target/MBlaze/MBlazeELFWriterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeELFWriterInfo.cpp?rev=116993&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeELFWriterInfo.cpp (added)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeELFWriterInfo.cpp Wed Oct 20 22:57:26 2010
@@ -0,0 +1,110 @@
+//===-- MBlazeELFWriterInfo.cpp - ELF Writer Info for the MBlaze backend --===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file implements ELF writer information for the MBlaze backend.
+//
+//===----------------------------------------------------------------------===//
+
+#include "MBlazeELFWriterInfo.h"
+#include "MBlazeRelocations.h"
+#include "llvm/Function.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Target/TargetData.h"
+#include "llvm/Target/TargetMachine.h"
+
+using namespace llvm;
+
+//===----------------------------------------------------------------------===//
+//  Implementation of the MBlazeELFWriterInfo class
+//===----------------------------------------------------------------------===//
+
+MBlazeELFWriterInfo::MBlazeELFWriterInfo(TargetMachine &TM)
+  : TargetELFWriterInfo(TM.getTargetData()->getPointerSizeInBits() == 64,
+                        TM.getTargetData()->isLittleEndian()) {
+}
+
+MBlazeELFWriterInfo::~MBlazeELFWriterInfo() {}
+
+unsigned MBlazeELFWriterInfo::getRelocationType(unsigned MachineRelTy) const {
+  switch(MachineRelTy) {
+  case MBlaze::reloc_pcrel_word:
+    return R_MICROBLAZE_64_PCREL;
+  case MBlaze::reloc_absolute_word:
+    return R_MICROBLAZE_NONE;
+  default:
+    llvm_unreachable("unknown mblaze machine relocation type");
+  }
+  return 0;
+}
+
+long int MBlazeELFWriterInfo::getDefaultAddendForRelTy(unsigned RelTy,
+                                                    long int Modifier) const {
+  switch(RelTy) {
+  case R_MICROBLAZE_32_PCREL:
+    return Modifier - 4;
+  case R_MICROBLAZE_32:
+    return Modifier;
+  default:
+    llvm_unreachable("unknown mblaze relocation type");
+  }
+  return 0;
+}
+
+unsigned MBlazeELFWriterInfo::getRelocationTySize(unsigned RelTy) const {
+  // FIXME: Most of these sizes are guesses based on the name
+  switch(RelTy) {
+  case R_MICROBLAZE_32:
+  case R_MICROBLAZE_32_PCREL:
+  case R_MICROBLAZE_32_PCREL_LO:
+  case R_MICROBLAZE_32_LO:
+  case R_MICROBLAZE_SRO32:
+  case R_MICROBLAZE_SRW32:
+  case R_MICROBLAZE_32_SYM_OP_SYM:
+  case R_MICROBLAZE_GOTOFF_32:
+    return 32;
+
+  case R_MICROBLAZE_64_PCREL:
+  case R_MICROBLAZE_64:
+  case R_MICROBLAZE_GOTPC_64:
+  case R_MICROBLAZE_GOT_64:
+  case R_MICROBLAZE_PLT_64:
+  case R_MICROBLAZE_GOTOFF_64:
+    return 64;
+  }
+
+  return 0;
+}
+
+bool MBlazeELFWriterInfo::isPCRelativeRel(unsigned RelTy) const {
+  // FIXME: Most of these are guesses based on the name
+  switch(RelTy) {
+  case R_MICROBLAZE_32_PCREL:
+  case R_MICROBLAZE_64_PCREL:
+  case R_MICROBLAZE_32_PCREL_LO:
+  case R_MICROBLAZE_GOTPC_64:
+    return true;
+  }
+
+  return false;
+}
+
+unsigned MBlazeELFWriterInfo::getAbsoluteLabelMachineRelTy() const {
+  return MBlaze::reloc_absolute_word;
+}
+
+long int MBlazeELFWriterInfo::computeRelocation(unsigned SymOffset,
+                                                unsigned RelOffset,
+                                                unsigned RelTy) const {
+  if (RelTy == R_MICROBLAZE_32_PCREL || R_MICROBLAZE_64_PCREL)
+    return SymOffset - (RelOffset + 4);
+  else
+    assert("computeRelocation unknown for this relocation type");
+
+  return 0;
+}

Added: llvm/trunk/lib/Target/MBlaze/MBlazeELFWriterInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeELFWriterInfo.h?rev=116993&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeELFWriterInfo.h (added)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeELFWriterInfo.h Wed Oct 20 22:57:26 2010
@@ -0,0 +1,85 @@
+//===-- MBlazeELFWriterInfo.h - ELF Writer Info for MBlaze ------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file implements ELF writer information for the MBlaze backend.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef MBLAZE_ELF_WRITER_INFO_H
+#define MBLAZE_ELF_WRITER_INFO_H
+
+#include "llvm/Target/TargetELFWriterInfo.h"
+
+namespace llvm {
+
+  class MBlazeELFWriterInfo : public TargetELFWriterInfo {
+
+    // ELF Relocation types for MBlaze
+    enum MBlazeRelocationType {
+      R_MICROBLAZE_NONE = 0,
+      R_MICROBLAZE_32 = 1,
+      R_MICROBLAZE_32_PCREL = 2,
+      R_MICROBLAZE_64_PCREL = 3,
+      R_MICROBLAZE_32_PCREL_LO = 4,
+      R_MICROBLAZE_64 = 5,
+      R_MICROBLAZE_32_LO = 6,
+      R_MICROBLAZE_SRO32 = 7,
+      R_MICROBLAZE_SRW32 = 8,
+      R_MICROBLAZE_64_NONE = 9, 
+      R_MICROBLAZE_32_SYM_OP_SYM = 10,
+      R_MICROBLAZE_GNU_VTINHERIT = 11,
+      R_MICROBLAZE_GNU_VTENTRY = 12,
+      R_MICROBLAZE_GOTPC_64 = 13,
+      R_MICROBLAZE_GOT_64 = 14,
+      R_MICROBLAZE_PLT_64 = 15,
+      R_MICROBLAZE_REL = 16,
+      R_MICROBLAZE_JUMP_SLOT = 17,
+      R_MICROBLAZE_GLOB_DAT = 18,
+      R_MICROBLAZE_GOTOFF_64 = 19,
+      R_MICROBLAZE_GOTOFF_32 = 20,
+      R_MICROBLAZE_COPY = 21
+    };
+
+  public:
+    MBlazeELFWriterInfo(TargetMachine &TM);
+    virtual ~MBlazeELFWriterInfo();
+
+    /// getRelocationType - Returns the target specific ELF Relocation type.
+    /// 'MachineRelTy' contains the object code independent relocation type
+    virtual unsigned getRelocationType(unsigned MachineRelTy) const;
+
+    /// hasRelocationAddend - True if the target uses an addend in the
+    /// ELF relocation entry.
+    virtual bool hasRelocationAddend() const { return false; }
+
+    /// getDefaultAddendForRelTy - Gets the default addend value for a
+    /// relocation entry based on the target ELF relocation type.
+    virtual long int getDefaultAddendForRelTy(unsigned RelTy,
+                                              long int Modifier = 0) const;
+
+    /// getRelTySize - Returns the size of relocatable field in bits
+    virtual unsigned getRelocationTySize(unsigned RelTy) const;
+
+    /// isPCRelativeRel - True if the relocation type is pc relative
+    virtual bool isPCRelativeRel(unsigned RelTy) const;
+
+    /// getJumpTableRelocationTy - Returns the machine relocation type used
+    /// to reference a jumptable.
+    virtual unsigned getAbsoluteLabelMachineRelTy() const;
+
+    /// computeRelocation - Some relocatable fields could be relocated
+    /// directly, avoiding the relocation symbol emission, compute the
+    /// final relocation value for this symbol.
+    virtual long int computeRelocation(unsigned SymOffset, unsigned RelOffset,
+                                       unsigned RelTy) const;
+  };
+
+} // end llvm namespace
+
+#endif // MBLAZE_ELF_WRITER_INFO_H

Added: llvm/trunk/lib/Target/MBlaze/MBlazeFixupKinds.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeFixupKinds.h?rev=116993&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeFixupKinds.h (added)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeFixupKinds.h Wed Oct 20 22:57:26 2010
@@ -0,0 +1,24 @@
+//===-- MBlaze/MBlazeFixupKinds.h - MBlaze Fixup Entries --------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_MBLAZE_MBLAZEFIXUPKINDS_H
+#define LLVM_MBLAZE_MBLAZEFIXUPKINDS_H
+
+#include "llvm/MC/MCFixup.h"
+
+namespace llvm {
+namespace MBlaze {
+enum Fixups {
+  reloc_pcrel_4byte = FirstTargetFixupKind,  // 32-bit pcrel, e.g. a brlid
+  reloc_pcrel_2byte                          // 16-bit pcrel, e.g. beqid
+};
+}
+}
+
+#endif

Modified: llvm/trunk/lib/Target/MBlaze/MBlazeISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeISelLowering.cpp?rev=116993&r1=116992&r2=116993&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeISelLowering.cpp Wed Oct 20 22:57:26 2010
@@ -421,13 +421,11 @@
   SDValue HiPart;
   // FIXME there isn't actually debug info here
   DebugLoc dl = Op.getDebugLoc();
-  bool IsPIC = getTargetMachine().getRelocationModel() == Reloc::PIC_;
-  unsigned char OpFlag = IsPIC ? MBlazeII::MO_GOT : MBlazeII::MO_ABS_HILO;
 
   EVT PtrVT = Op.getValueType();
   JumpTableSDNode *JT  = cast<JumpTableSDNode>(Op);
 
-  SDValue JTI = DAG.getTargetJumpTable(JT->getIndex(), PtrVT, OpFlag);
+  SDValue JTI = DAG.getTargetJumpTable(JT->getIndex(), PtrVT, 0 );
   return DAG.getNode(MBlazeISD::Wrap, dl, MVT::i32, JTI);
   //return JTI;
 }
@@ -440,7 +438,7 @@
   DebugLoc dl = Op.getDebugLoc();
 
   SDValue CP = DAG.getTargetConstantPool(C, MVT::i32, N->getAlignment(),
-                                         N->getOffset(), MBlazeII::MO_ABS_HILO);
+                                         N->getOffset(), 0 );
   return DAG.getNode(MBlazeISD::Wrap, dl, MVT::i32, CP);
 }
 
@@ -618,13 +616,12 @@
   // If the callee is a GlobalAddress/ExternalSymbol node (quite common, every
   // direct call is) turn it into a TargetGlobalAddress/TargetExternalSymbol
   // node so that legalize doesn't hack it.
-  unsigned char OpFlag = MBlazeII::MO_NO_FLAG;
   if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee))
     Callee = DAG.getTargetGlobalAddress(G->getGlobal(), dl,
-                                getPointerTy(), 0, OpFlag);
+                                getPointerTy(), 0, 0 );
   else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee))
     Callee = DAG.getTargetExternalSymbol(S->getSymbol(),
-                                getPointerTy(), OpFlag);
+                                getPointerTy(), 0 );
 
   // MBlazeJmpLink = #chain, #target_address, #opt_in_flags...
   //             = Chain, Callee, Reg#1, Reg#2, ...

Modified: llvm/trunk/lib/Target/MBlaze/MBlazeInstrFPU.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeInstrFPU.td?rev=116993&r1=116992&r2=116993&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeInstrFPU.td (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeInstrFPU.td Wed Oct 20 22:57:26 2010
@@ -24,9 +24,9 @@
                 [(set FGR32:$dst, (OpNode xaddr:$addr))], IILoad>;
 
 class LoadFMI<bits<6> op, string instr_asm, PatFrag OpNode> :
-              TAI<op, (outs FGR32:$dst), (ins memri:$addr),
-                  !strconcat(instr_asm, "   $dst, $addr"),
-                  [(set FGR32:$dst, (OpNode iaddr:$addr))], IILoad>;
+              TB<op, (outs FGR32:$dst), (ins memri:$addr),
+                 !strconcat(instr_asm, "   $dst, $addr"),
+                 [(set FGR32:$dst, (OpNode iaddr:$addr))], IILoad>;
 
 class StoreFM<bits<6> op, string instr_asm, PatFrag OpNode> :
               TA<op, 0x000, (outs), (ins FGR32:$dst, memrr:$addr),
@@ -34,9 +34,9 @@
                  [(OpNode FGR32:$dst, xaddr:$addr)], IIStore>;
 
 class StoreFMI<bits<6> op, string instr_asm, PatFrag OpNode> :
-               TAI<op, (outs), (ins FGR32:$dst, memrr:$addr),
-                   !strconcat(instr_asm, "   $dst, $addr"),
-                   [(OpNode FGR32:$dst, iaddr:$addr)], IIStore>;
+               TB<op, (outs), (ins FGR32:$dst, memrr:$addr),
+                  !strconcat(instr_asm, "   $dst, $addr"),
+                  [(OpNode FGR32:$dst, iaddr:$addr)], IIStore>;
 
 class ArithF<bits<6> op, bits<11> flags, string instr_asm, SDNode OpNode,
              InstrItinClass itin> :
@@ -56,35 +56,35 @@
                 !strconcat(instr_asm, "   $dst, $c, $b"),
                 [(set FGR32:$dst, (OpNode FGR32:$b, FGR32:$c))], itin>;
 
-class ArithF2<bits<6> op, bits<11> flags, string instr_asm,
-              InstrItinClass itin> :
-              TF<op, flags, (outs FGR32:$dst), (ins FGR32:$b),
-                 !strconcat(instr_asm, "   $dst, $b"),
-                 [], itin>;
-
-class ArithIF<bits<6> op, bits<11> flags, string instr_asm,
-              InstrItinClass itin> :
-              TF<op, flags, (outs FGR32:$dst), (ins CPURegs:$b),
-                 !strconcat(instr_asm, "   $dst, $b"),
-                 [], itin>;
-
-class ArithFI<bits<6> op, bits<11> flags, string instr_asm,
-              InstrItinClass itin> :
-              TF<op, flags, (outs CPURegs:$dst), (ins FGR32:$b),
-                 !strconcat(instr_asm, "   $dst, $b"),
-                 [], itin>;
-
 class LogicF<bits<6> op, string instr_asm> :
-             TAI<op, (outs FGR32:$dst), (ins FGR32:$b, FGR32:$c),
-                 !strconcat(instr_asm, "   $dst, $b, $c"),
-                 [],
-                 IIAlu>;
+             TB<op, (outs FGR32:$dst), (ins FGR32:$b, FGR32:$c),
+                !strconcat(instr_asm, "   $dst, $b, $c"),
+                [], IIAlu>;
 
 class LogicFI<bits<6> op, string instr_asm> :
-             TAI<op, (outs FGR32:$dst), (ins FGR32:$b, fimm:$c),
-                 !strconcat(instr_asm, "   $dst, $b, $c"),
-                 [],
-                 IIAlu>;
+             TB<op, (outs FGR32:$dst), (ins FGR32:$b, fimm:$c),
+                !strconcat(instr_asm, "   $dst, $b, $c"),
+                [], IIAlu>;
+
+let rb=0 in {
+  class ArithF2<bits<6> op, bits<11> flags, string instr_asm,
+                InstrItinClass itin> :
+                TA<op, flags, (outs FGR32:$dst), (ins FGR32:$b),
+                   !strconcat(instr_asm, "   $dst, $b"),
+                   [], itin>;
+
+  class ArithIF<bits<6> op, bits<11> flags, string instr_asm,
+                InstrItinClass itin> :
+                TA<op, flags, (outs FGR32:$dst), (ins CPURegs:$b),
+                   !strconcat(instr_asm, "   $dst, $b"),
+                   [], itin>;
+
+  class ArithFI<bits<6> op, bits<11> flags, string instr_asm,
+                InstrItinClass itin> :
+                TA<op, flags, (outs CPURegs:$dst), (ins FGR32:$b),
+                   !strconcat(instr_asm, "   $dst, $b"),
+                   [], itin>;
+}
 
 //===----------------------------------------------------------------------===//
 // Pseudo instructions

Modified: llvm/trunk/lib/Target/MBlaze/MBlazeInstrFSL.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeInstrFSL.td?rev=116993&r1=116992&r2=116993&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeInstrFSL.td (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeInstrFSL.td Wed Oct 20 22:57:26 2010
@@ -10,144 +10,208 @@
 //===----------------------------------------------------------------------===//
 // FSL Instruction Formats
 //===----------------------------------------------------------------------===//
-class FSLGetD<bits<6> op, bits<11> flags, string instr_asm, Intrinsic OpNode> :
-              TA<op, flags, (outs CPURegs:$dst), (ins CPURegs:$b),
-                 !strconcat(instr_asm, " $dst, $b"),
-                 [(set CPURegs:$dst, (OpNode CPURegs:$b))], IIAlu>;
-
-class FSLGet<bits<6> op, string instr_asm, Intrinsic OpNode> :
-             TAI<op, (outs CPURegs:$dst), (ins fslimm:$b),
-                 !strconcat(instr_asm, " $dst, $b"),
-                 [(set CPURegs:$dst, (OpNode immZExt4:$b))], IIAlu>;
-
-class FSLPutD<bits<6> op, bits<11> flags, string instr_asm, Intrinsic OpNode> :
-              TA<op, flags, (outs), (ins CPURegs:$v, CPURegs:$b),
-                 !strconcat(instr_asm, " $v, $b"),
-                 [(OpNode CPURegs:$v, CPURegs:$b)], IIAlu>;
-
-class FSLPut<bits<6> op, string instr_asm, Intrinsic OpNode> :
-             TAI<op, (outs), (ins CPURegs:$v, fslimm:$b),
-                 !strconcat(instr_asm, " $v, $b"),
-                 [(OpNode CPURegs:$v, immZExt4:$b)], IIAlu>;
-
-class FSLPutTD<bits<6> op, bits<11> flags, string instr_asm, Intrinsic OpNode> :
-               TA<op, flags, (outs), (ins CPURegs:$b),
-                  !strconcat(instr_asm, " $b"),
-                  [(OpNode CPURegs:$b)], IIAlu>;
-
-class FSLPutT<bits<6> op, string instr_asm, Intrinsic OpNode> :
-              TAI<op, (outs), (ins fslimm:$b),
-                  !strconcat(instr_asm, " $b"),
-                  [(OpNode immZExt4:$b)], IIAlu>;
+class FSLGet<bits<6> op, bits<5> flags, string instr_asm, Intrinsic OpNode> :
+             MBlazeInst<op, FFSL, (outs CPURegs:$dst), (ins fslimm:$b),
+                        !strconcat(instr_asm, " $dst, $b"),
+                        [(set CPURegs:$dst, (OpNode immZExt4:$b))],IIAlu>
+{
+    bits<5> rd;
+    bits<4> fslno;
+
+    let Inst{6-10}  = rd;
+    let Inst{11-15} = 0x0;
+    let Inst{16}    = 0x0;
+    let Inst{17-21} = flags; // NCTAE
+    let Inst{22-27} = 0x0;
+    let Inst{28-31} = fslno;
+}
+
+class FSLGetD<bits<6> op, bits<5> flags, string instr_asm, Intrinsic OpNode> :
+              MBlazeInst<op, FFSLD, (outs CPURegs:$dst), (ins CPURegs:$b),
+                         !strconcat(instr_asm, " $dst, $b"),
+                         [(set CPURegs:$dst, (OpNode CPURegs:$b))], IIAlu>
+{
+    bits<5> rd;
+    bits<5> rb;
+
+    let Inst{6-10}  = rd;
+    let Inst{11-15} = 0x0;
+    let Inst{16-20} = rb;
+    let Inst{21}    = 0x0;
+    let Inst{22-26} = flags; // NCTAE
+    let Inst{27-31} = 0x0;
+}
+
+class FSLPut<bits<6> op, bits<4> flags, string instr_asm, Intrinsic OpNode> :
+             MBlazeInst<op, FFSL, (outs), (ins CPURegs:$v, fslimm:$b),
+                        !strconcat(instr_asm, " $v, $b"),
+                        [(OpNode CPURegs:$v, immZExt4:$b)], IIAlu>
+{
+    bits<5> ra;
+    bits<4> fslno;
+
+    let Inst{6-10}  = 0x0;
+    let Inst{11-15} = ra;
+    let Inst{16}    = 0x1;
+    let Inst{17-20} = flags; // NCTA
+    let Inst{21-27} = 0x0;
+    let Inst{28-31} = fslno;
+}
+
+class FSLPutD<bits<6> op, bits<4> flags, string instr_asm, Intrinsic OpNode> :
+              MBlazeInst<op, FFSLD, (outs), (ins CPURegs:$v, CPURegs:$b),
+                         !strconcat(instr_asm, " $v, $b"),
+                         [(OpNode CPURegs:$v, CPURegs:$b)], IIAlu>
+{
+    bits<5> ra;
+    bits<5> rb;
+
+    let Inst{6-10}  = 0x0;
+    let Inst{11-15} = ra;
+    let Inst{16-20} = rb;
+    let Inst{21}    = 0x1;
+    let Inst{22-25} = flags; // NCTA
+    let Inst{26-31} = 0x0;
+}
+
+class FSLPutT<bits<6> op, bits<4> flags, string instr_asm, Intrinsic OpNode> :
+              MBlazeInst<op, FFSLT, (outs), (ins fslimm:$b),
+                         !strconcat(instr_asm, " $b"),
+                         [(OpNode immZExt4:$b)], IIAlu>
+{
+    bits<4> fslno;
+
+    let Inst{6-10}  = 0x0;
+    let Inst{11-15} = 0x0;
+    let Inst{16}    = 0x1;
+    let Inst{17-20} = flags; // NCTA
+    let Inst{21-27} = 0x0;
+    let Inst{28-31} = fslno;
+}
+
+class FSLPutTD<bits<6> op, bits<4> flags, string instr_asm, Intrinsic OpNode> :
+               MBlazeInst<op, FFSLTD, (outs), (ins CPURegs:$b),
+                          !strconcat(instr_asm, " $b"),
+                          [(OpNode CPURegs:$b)], IIAlu>
+{
+    bits<5> rb;
+
+    let Inst{6-10}  = 0x0;
+    let Inst{11-15} = 0x0;
+    let Inst{16-20} = rb;
+    let Inst{21}    = 0x1;
+    let Inst{22-25} = flags; // NCTA
+    let Inst{26-31} = 0x0;
+}
 
 //===----------------------------------------------------------------------===//
 // FSL Get Instructions
 //===----------------------------------------------------------------------===//
-def GET      : FSLGet<0x1B, "get      ", int_mblaze_fsl_get>;
-def AGET     : FSLGet<0x1B, "aget     ", int_mblaze_fsl_aget>;
-def CGET     : FSLGet<0x1B, "cget     ", int_mblaze_fsl_cget>;
-def CAGET    : FSLGet<0x1B, "caget    ", int_mblaze_fsl_caget>;
-def EGET     : FSLGet<0x1B, "eget     ", int_mblaze_fsl_eget>;
-def EAGET    : FSLGet<0x1B, "eaget    ", int_mblaze_fsl_eaget>;
-def ECGET    : FSLGet<0x1B, "ecget    ", int_mblaze_fsl_ecget>;
-def ECAGET   : FSLGet<0x1B, "ecaget   ", int_mblaze_fsl_ecaget>;
-def NGET     : FSLGet<0x1B, "nget     ", int_mblaze_fsl_nget>;
-def NAGET    : FSLGet<0x1B, "naget    ", int_mblaze_fsl_naget>;
-def NCGET    : FSLGet<0x1B, "ncget    ", int_mblaze_fsl_ncget>;
-def NCAGET   : FSLGet<0x1B, "ncaget   ", int_mblaze_fsl_ncaget>;
-def NEGET    : FSLGet<0x1B, "neget    ", int_mblaze_fsl_neget>;
-def NEAGET   : FSLGet<0x1B, "neaget   ", int_mblaze_fsl_neaget>;
-def NECGET   : FSLGet<0x1B, "necget   ", int_mblaze_fsl_necget>;
-def NECAGET  : FSLGet<0x1B, "necaget  ", int_mblaze_fsl_necaget>;
-def TGET     : FSLGet<0x1B, "tget     ", int_mblaze_fsl_tget>;
-def TAGET    : FSLGet<0x1B, "taget    ", int_mblaze_fsl_taget>;
-def TCGET    : FSLGet<0x1B, "tcget    ", int_mblaze_fsl_tcget>;
-def TCAGET   : FSLGet<0x1B, "tcaget   ", int_mblaze_fsl_tcaget>;
-def TEGET    : FSLGet<0x1B, "teget    ", int_mblaze_fsl_teget>;
-def TEAGET   : FSLGet<0x1B, "teaget   ", int_mblaze_fsl_teaget>;
-def TECGET   : FSLGet<0x1B, "tecget   ", int_mblaze_fsl_tecget>;
-def TECAGET  : FSLGet<0x1B, "tecaget  ", int_mblaze_fsl_tecaget>;
-def TNGET    : FSLGet<0x1B, "tnget    ", int_mblaze_fsl_tnget>;
-def TNAGET   : FSLGet<0x1B, "tnaget   ", int_mblaze_fsl_tnaget>;
-def TNCGET   : FSLGet<0x1B, "tncget   ", int_mblaze_fsl_tncget>;
-def TNCAGET  : FSLGet<0x1B, "tncaget  ", int_mblaze_fsl_tncaget>;
-def TNEGET   : FSLGet<0x1B, "tneget   ", int_mblaze_fsl_tneget>;
-def TNEAGET  : FSLGet<0x1B, "tneaget  ", int_mblaze_fsl_tneaget>;
-def TNECGET  : FSLGet<0x1B, "tnecget  ", int_mblaze_fsl_tnecget>;
-def TNECAGET : FSLGet<0x1B, "tnecaget ", int_mblaze_fsl_tnecaget>;
+def GET      : FSLGet<0x1B, 0x00, "get      ", int_mblaze_fsl_get>;
+def AGET     : FSLGet<0x1B, 0x02, "aget     ", int_mblaze_fsl_aget>;
+def CGET     : FSLGet<0x1B, 0x08, "cget     ", int_mblaze_fsl_cget>;
+def CAGET    : FSLGet<0x1B, 0x0A, "caget    ", int_mblaze_fsl_caget>;
+def EGET     : FSLGet<0x1B, 0x01, "eget     ", int_mblaze_fsl_eget>;
+def EAGET    : FSLGet<0x1B, 0x03, "eaget    ", int_mblaze_fsl_eaget>;
+def ECGET    : FSLGet<0x1B, 0x09, "ecget    ", int_mblaze_fsl_ecget>;
+def ECAGET   : FSLGet<0x1B, 0x0B, "ecaget   ", int_mblaze_fsl_ecaget>;
+def NGET     : FSLGet<0x1B, 0x10, "nget     ", int_mblaze_fsl_nget>;
+def NAGET    : FSLGet<0x1B, 0x12, "naget    ", int_mblaze_fsl_naget>;
+def NCGET    : FSLGet<0x1B, 0x18, "ncget    ", int_mblaze_fsl_ncget>;
+def NCAGET   : FSLGet<0x1B, 0x1A, "ncaget   ", int_mblaze_fsl_ncaget>;
+def NEGET    : FSLGet<0x1B, 0x11, "neget    ", int_mblaze_fsl_neget>;
+def NEAGET   : FSLGet<0x1B, 0x13, "neaget   ", int_mblaze_fsl_neaget>;
+def NECGET   : FSLGet<0x1B, 0x19, "necget   ", int_mblaze_fsl_necget>;
+def NECAGET  : FSLGet<0x1B, 0x1B, "necaget  ", int_mblaze_fsl_necaget>;
+def TGET     : FSLGet<0x1B, 0x04, "tget     ", int_mblaze_fsl_tget>;
+def TAGET    : FSLGet<0x1B, 0x06, "taget    ", int_mblaze_fsl_taget>;
+def TCGET    : FSLGet<0x1B, 0x0C, "tcget    ", int_mblaze_fsl_tcget>;
+def TCAGET   : FSLGet<0x1B, 0x0E, "tcaget   ", int_mblaze_fsl_tcaget>;
+def TEGET    : FSLGet<0x1B, 0x05, "teget    ", int_mblaze_fsl_teget>;
+def TEAGET   : FSLGet<0x1B, 0x07, "teaget   ", int_mblaze_fsl_teaget>;
+def TECGET   : FSLGet<0x1B, 0x0D, "tecget   ", int_mblaze_fsl_tecget>;
+def TECAGET  : FSLGet<0x1B, 0x0F, "tecaget  ", int_mblaze_fsl_tecaget>;
+def TNGET    : FSLGet<0x1B, 0x14, "tnget    ", int_mblaze_fsl_tnget>;
+def TNAGET   : FSLGet<0x1B, 0x16, "tnaget   ", int_mblaze_fsl_tnaget>;
+def TNCGET   : FSLGet<0x1B, 0x1C, "tncget   ", int_mblaze_fsl_tncget>;
+def TNCAGET  : FSLGet<0x1B, 0x1E, "tncaget  ", int_mblaze_fsl_tncaget>;
+def TNEGET   : FSLGet<0x1B, 0x15, "tneget   ", int_mblaze_fsl_tneget>;
+def TNEAGET  : FSLGet<0x1B, 0x17, "tneaget  ", int_mblaze_fsl_tneaget>;
+def TNECGET  : FSLGet<0x1B, 0x1D, "tnecget  ", int_mblaze_fsl_tnecget>;
+def TNECAGET : FSLGet<0x1B, 0x1F, "tnecaget ", int_mblaze_fsl_tnecaget>;
 
 //===----------------------------------------------------------------------===//
 // FSL Dynamic Get Instructions
 //===----------------------------------------------------------------------===//
-def GETD      : FSLGetD<0x1B, 0x00, "getd     ", int_mblaze_fsl_get>;
-def AGETD     : FSLGetD<0x1B, 0x00, "agetd    ", int_mblaze_fsl_aget>;
-def CGETD     : FSLGetD<0x1B, 0x00, "cgetd    ", int_mblaze_fsl_cget>;
-def CAGETD    : FSLGetD<0x1B, 0x00, "cagetd   ", int_mblaze_fsl_caget>;
-def EGETD     : FSLGetD<0x1B, 0x00, "egetd    ", int_mblaze_fsl_eget>;
-def EAGETD    : FSLGetD<0x1B, 0x00, "eagetd   ", int_mblaze_fsl_eaget>;
-def ECGETD    : FSLGetD<0x1B, 0x00, "ecgetd   ", int_mblaze_fsl_ecget>;
-def ECAGETD   : FSLGetD<0x1B, 0x00, "ecagetd  ", int_mblaze_fsl_ecaget>;
-def NGETD     : FSLGetD<0x1B, 0x00, "ngetd    ", int_mblaze_fsl_nget>;
-def NAGETD    : FSLGetD<0x1B, 0x00, "nagetd   ", int_mblaze_fsl_naget>;
-def NCGETD    : FSLGetD<0x1B, 0x00, "ncgetd   ", int_mblaze_fsl_ncget>;
-def NCAGETD   : FSLGetD<0x1B, 0x00, "ncagetd  ", int_mblaze_fsl_ncaget>;
-def NEGETD    : FSLGetD<0x1B, 0x00, "negetd   ", int_mblaze_fsl_neget>;
-def NEAGETD   : FSLGetD<0x1B, 0x00, "neagetd  ", int_mblaze_fsl_neaget>;
-def NECGETD   : FSLGetD<0x1B, 0x00, "necgetd  ", int_mblaze_fsl_necget>;
-def NECAGETD  : FSLGetD<0x1B, 0x00, "necagetd ", int_mblaze_fsl_necaget>;
-def TGETD     : FSLGetD<0x1B, 0x00, "tgetd    ", int_mblaze_fsl_tget>;
-def TAGETD    : FSLGetD<0x1B, 0x00, "tagetd   ", int_mblaze_fsl_taget>;
-def TCGETD    : FSLGetD<0x1B, 0x00, "tcgetd   ", int_mblaze_fsl_tcget>;
-def TCAGETD   : FSLGetD<0x1B, 0x00, "tcagetd  ", int_mblaze_fsl_tcaget>;
-def TEGETD    : FSLGetD<0x1B, 0x00, "tegetd   ", int_mblaze_fsl_teget>;
-def TEAGETD   : FSLGetD<0x1B, 0x00, "teagetd  ", int_mblaze_fsl_teaget>;
-def TECGETD   : FSLGetD<0x1B, 0x00, "tecgetd  ", int_mblaze_fsl_tecget>;
-def TECAGETD  : FSLGetD<0x1B, 0x00, "tecagetd ", int_mblaze_fsl_tecaget>;
-def TNGETD    : FSLGetD<0x1B, 0x00, "tngetd   ", int_mblaze_fsl_tnget>;
-def TNAGETD   : FSLGetD<0x1B, 0x00, "tnagetd  ", int_mblaze_fsl_tnaget>;
-def TNCGETD   : FSLGetD<0x1B, 0x00, "tncgetd  ", int_mblaze_fsl_tncget>;
-def TNCAGETD  : FSLGetD<0x1B, 0x00, "tncagetd ", int_mblaze_fsl_tncaget>;
-def TNEGETD   : FSLGetD<0x1B, 0x00, "tnegetd  ", int_mblaze_fsl_tneget>;
-def TNEAGETD  : FSLGetD<0x1B, 0x00, "tneagetd ", int_mblaze_fsl_tneaget>;
-def TNECGETD  : FSLGetD<0x1B, 0x00, "tnecgetd ", int_mblaze_fsl_tnecget>;
-def TNECAGETD : FSLGetD<0x1B, 0x00, "tnecagetd", int_mblaze_fsl_tnecaget>;
+def GETD      : FSLGetD<0x13, 0x00, "getd     ", int_mblaze_fsl_get>;
+def AGETD     : FSLGetD<0x13, 0x02, "agetd    ", int_mblaze_fsl_aget>;
+def CGETD     : FSLGetD<0x13, 0x08, "cgetd    ", int_mblaze_fsl_cget>;
+def CAGETD    : FSLGetD<0x13, 0x0A, "cagetd   ", int_mblaze_fsl_caget>;
+def EGETD     : FSLGetD<0x13, 0x01, "egetd    ", int_mblaze_fsl_eget>;
+def EAGETD    : FSLGetD<0x13, 0x03, "eagetd   ", int_mblaze_fsl_eaget>;
+def ECGETD    : FSLGetD<0x13, 0x09, "ecgetd   ", int_mblaze_fsl_ecget>;
+def ECAGETD   : FSLGetD<0x13, 0x0B, "ecagetd  ", int_mblaze_fsl_ecaget>;
+def NGETD     : FSLGetD<0x13, 0x10, "ngetd    ", int_mblaze_fsl_nget>;
+def NAGETD    : FSLGetD<0x13, 0x12, "nagetd   ", int_mblaze_fsl_naget>;
+def NCGETD    : FSLGetD<0x13, 0x18, "ncgetd   ", int_mblaze_fsl_ncget>;
+def NCAGETD   : FSLGetD<0x13, 0x1A, "ncagetd  ", int_mblaze_fsl_ncaget>;
+def NEGETD    : FSLGetD<0x13, 0x11, "negetd   ", int_mblaze_fsl_neget>;
+def NEAGETD   : FSLGetD<0x13, 0x13, "neagetd  ", int_mblaze_fsl_neaget>;
+def NECGETD   : FSLGetD<0x13, 0x19, "necgetd  ", int_mblaze_fsl_necget>;
+def NECAGETD  : FSLGetD<0x13, 0x1B, "necagetd ", int_mblaze_fsl_necaget>;
+def TGETD     : FSLGetD<0x13, 0x04, "tgetd    ", int_mblaze_fsl_tget>;
+def TAGETD    : FSLGetD<0x13, 0x06, "tagetd   ", int_mblaze_fsl_taget>;
+def TCGETD    : FSLGetD<0x13, 0x0C, "tcgetd   ", int_mblaze_fsl_tcget>;
+def TCAGETD   : FSLGetD<0x13, 0x0E, "tcagetd  ", int_mblaze_fsl_tcaget>;
+def TEGETD    : FSLGetD<0x13, 0x05, "tegetd   ", int_mblaze_fsl_teget>;
+def TEAGETD   : FSLGetD<0x13, 0x07, "teagetd  ", int_mblaze_fsl_teaget>;
+def TECGETD   : FSLGetD<0x13, 0x0D, "tecgetd  ", int_mblaze_fsl_tecget>;
+def TECAGETD  : FSLGetD<0x13, 0x0F, "tecagetd ", int_mblaze_fsl_tecaget>;
+def TNGETD    : FSLGetD<0x13, 0x14, "tngetd   ", int_mblaze_fsl_tnget>;
+def TNAGETD   : FSLGetD<0x13, 0x16, "tnagetd  ", int_mblaze_fsl_tnaget>;
+def TNCGETD   : FSLGetD<0x13, 0x1C, "tncgetd  ", int_mblaze_fsl_tncget>;
+def TNCAGETD  : FSLGetD<0x13, 0x1E, "tncagetd ", int_mblaze_fsl_tncaget>;
+def TNEGETD   : FSLGetD<0x13, 0x15, "tnegetd  ", int_mblaze_fsl_tneget>;
+def TNEAGETD  : FSLGetD<0x13, 0x17, "tneagetd ", int_mblaze_fsl_tneaget>;
+def TNECGETD  : FSLGetD<0x13, 0x1D, "tnecgetd ", int_mblaze_fsl_tnecget>;
+def TNECAGETD : FSLGetD<0x13, 0x1F, "tnecagetd", int_mblaze_fsl_tnecaget>;
 
 //===----------------------------------------------------------------------===//
 // FSL Put Instructions
 //===----------------------------------------------------------------------===//
-def PUT     :  FSLPut<0x1B, "put      ", int_mblaze_fsl_put>;
-def APUT    :  FSLPut<0x1B, "aput     ", int_mblaze_fsl_aput>;
-def CPUT    :  FSLPut<0x1B, "cput     ", int_mblaze_fsl_cput>;
-def CAPUT   :  FSLPut<0x1B, "caput    ", int_mblaze_fsl_caput>;
-def NPUT    :  FSLPut<0x1B, "nput     ", int_mblaze_fsl_nput>;
-def NAPUT   :  FSLPut<0x1B, "naput    ", int_mblaze_fsl_naput>;
-def NCPUT   :  FSLPut<0x1B, "ncput    ", int_mblaze_fsl_ncput>;
-def NCAPUT  :  FSLPut<0x1B, "ncaput   ", int_mblaze_fsl_ncaput>;
-def TPUT    : FSLPutT<0x1B, "tput     ", int_mblaze_fsl_tput>;
-def TAPUT   : FSLPutT<0x1B, "taput    ", int_mblaze_fsl_taput>;
-def TCPUT   : FSLPutT<0x1B, "tcput    ", int_mblaze_fsl_tcput>;
-def TCAPUT  : FSLPutT<0x1B, "tcaput   ", int_mblaze_fsl_tcaput>;
-def TNPUT   : FSLPutT<0x1B, "tnput    ", int_mblaze_fsl_tnput>;
-def TNAPUT  : FSLPutT<0x1B, "tnaput   ", int_mblaze_fsl_tnaput>;
-def TNCPUT  : FSLPutT<0x1B, "tncput   ", int_mblaze_fsl_tncput>;
-def TNCAPUT : FSLPutT<0x1B, "tncaput  ", int_mblaze_fsl_tncaput>;
+def PUT     :  FSLPut<0x1B, 0x0, "put      ", int_mblaze_fsl_put>;
+def APUT    :  FSLPut<0x1B, 0x1, "aput     ", int_mblaze_fsl_aput>;
+def CPUT    :  FSLPut<0x1B, 0x4, "cput     ", int_mblaze_fsl_cput>;
+def CAPUT   :  FSLPut<0x1B, 0x5, "caput    ", int_mblaze_fsl_caput>;
+def NPUT    :  FSLPut<0x1B, 0x8, "nput     ", int_mblaze_fsl_nput>;
+def NAPUT   :  FSLPut<0x1B, 0x9, "naput    ", int_mblaze_fsl_naput>;
+def NCPUT   :  FSLPut<0x1B, 0xC, "ncput    ", int_mblaze_fsl_ncput>;
+def NCAPUT  :  FSLPut<0x1B, 0xD, "ncaput   ", int_mblaze_fsl_ncaput>;
+def TPUT    : FSLPutT<0x1B, 0x2, "tput     ", int_mblaze_fsl_tput>;
+def TAPUT   : FSLPutT<0x1B, 0x3, "taput    ", int_mblaze_fsl_taput>;
+def TCPUT   : FSLPutT<0x1B, 0x6, "tcput    ", int_mblaze_fsl_tcput>;
+def TCAPUT  : FSLPutT<0x1B, 0x7, "tcaput   ", int_mblaze_fsl_tcaput>;
+def TNPUT   : FSLPutT<0x1B, 0xA, "tnput    ", int_mblaze_fsl_tnput>;
+def TNAPUT  : FSLPutT<0x1B, 0xB, "tnaput   ", int_mblaze_fsl_tnaput>;
+def TNCPUT  : FSLPutT<0x1B, 0xE, "tncput   ", int_mblaze_fsl_tncput>;
+def TNCAPUT : FSLPutT<0x1B, 0xF, "tncaput  ", int_mblaze_fsl_tncaput>;
 
 //===----------------------------------------------------------------------===//
 // FSL Dynamic Put Instructions
 //===----------------------------------------------------------------------===//
-def PUTD     :  FSLPutD<0x1B, 0x00, "putd     ", int_mblaze_fsl_put>;
-def APUTD    :  FSLPutD<0x1B, 0x00, "aputd    ", int_mblaze_fsl_aput>;
-def CPUTD    :  FSLPutD<0x1B, 0x00, "cputd    ", int_mblaze_fsl_cput>;
-def CAPUTD   :  FSLPutD<0x1B, 0x00, "caputd   ", int_mblaze_fsl_caput>;
-def NPUTD    :  FSLPutD<0x1B, 0x00, "nputd    ", int_mblaze_fsl_nput>;
-def NAPUTD   :  FSLPutD<0x1B, 0x00, "naputd   ", int_mblaze_fsl_naput>;
-def NCPUTD   :  FSLPutD<0x1B, 0x00, "ncputd   ", int_mblaze_fsl_ncput>;
-def NCAPUTD  :  FSLPutD<0x1B, 0x00, "ncaputd  ", int_mblaze_fsl_ncaput>;
-def TPUTD    : FSLPutTD<0x1B, 0x00, "tputd    ", int_mblaze_fsl_tput>;
-def TAPUTD   : FSLPutTD<0x1B, 0x00, "taputd   ", int_mblaze_fsl_taput>;
-def TCPUTD   : FSLPutTD<0x1B, 0x00, "tcputd   ", int_mblaze_fsl_tcput>;
-def TCAPUTD  : FSLPutTD<0x1B, 0x00, "tcaputd  ", int_mblaze_fsl_tcaput>;
-def TNPUTD   : FSLPutTD<0x1B, 0x00, "tnputd   ", int_mblaze_fsl_tnput>;
-def TNAPUTD  : FSLPutTD<0x1B, 0x00, "tnaputd  ", int_mblaze_fsl_tnaput>;
-def TNCPUTD  : FSLPutTD<0x1B, 0x00, "tncputd  ", int_mblaze_fsl_tncput>;
-def TNCAPUTD : FSLPutTD<0x1B, 0x00, "tncaputd ", int_mblaze_fsl_tncaput>;
+def PUTD     :  FSLPutD<0x13, 0x0, "putd     ", int_mblaze_fsl_put>;
+def APUTD    :  FSLPutD<0x13, 0x1, "aputd    ", int_mblaze_fsl_aput>;
+def CPUTD    :  FSLPutD<0x13, 0x4, "cputd    ", int_mblaze_fsl_cput>;
+def CAPUTD   :  FSLPutD<0x13, 0x5, "caputd   ", int_mblaze_fsl_caput>;
+def NPUTD    :  FSLPutD<0x13, 0x8, "nputd    ", int_mblaze_fsl_nput>;
+def NAPUTD   :  FSLPutD<0x13, 0x9, "naputd   ", int_mblaze_fsl_naput>;
+def NCPUTD   :  FSLPutD<0x13, 0xC, "ncputd   ", int_mblaze_fsl_ncput>;
+def NCAPUTD  :  FSLPutD<0x13, 0xD, "ncaputd  ", int_mblaze_fsl_ncaput>;
+def TPUTD    : FSLPutTD<0x13, 0x2, "tputd    ", int_mblaze_fsl_tput>;
+def TAPUTD   : FSLPutTD<0x13, 0x3, "taputd   ", int_mblaze_fsl_taput>;
+def TCPUTD   : FSLPutTD<0x13, 0x6, "tcputd   ", int_mblaze_fsl_tcput>;
+def TCAPUTD  : FSLPutTD<0x13, 0x7, "tcaputd  ", int_mblaze_fsl_tcaput>;
+def TNPUTD   : FSLPutTD<0x13, 0xA, "tnputd   ", int_mblaze_fsl_tnput>;
+def TNAPUTD  : FSLPutTD<0x13, 0xB, "tnaputd  ", int_mblaze_fsl_tnaput>;
+def TNCPUTD  : FSLPutTD<0x13, 0xE, "tncputd  ", int_mblaze_fsl_tncput>;
+def TNCAPUTD : FSLPutTD<0x13, 0xF, "tncaputd ", int_mblaze_fsl_tncaput>;

Modified: llvm/trunk/lib/Target/MBlaze/MBlazeInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeInstrFormats.td?rev=116993&r1=116992&r2=116993&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeInstrFormats.td (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeInstrFormats.td Wed Oct 20 22:57:26 2010
@@ -7,6 +7,26 @@
 //
 //===----------------------------------------------------------------------===//
 
+// Format specifies the encoding used by the instruction.  This is part of the
+// ad-hoc solution used to emit machine instruction encodings by our machine
+// code emitter.
+class Format<bits<6> val> {
+      bits<6> Value = val;
+}
+
+def FPseudo : Format<0>;
+def FRRR    : Format<1>;
+def FRRI    : Format<2>;
+def FRIR    : Format<3>;
+def FFSL    : Format<4>;
+def FFSLD   : Format<5>;
+def FFSLT   : Format<6>;
+def FFSLTD  : Format<7>;
+def FR      : Format<8>;
+def FI      : Format<9>;
+def FRR     : Format<10>;
+def FRI     : Format<11>;
+
 //===----------------------------------------------------------------------===//
 //  Describe MBlaze instructions format
 //
@@ -21,14 +41,15 @@
 //===----------------------------------------------------------------------===//
 
 // Generic MBlaze Format
-class MBlazeInst<dag outs, dag ins, string asmstr, list<dag> pattern, 
-               InstrItinClass itin> : Instruction 
+class MBlazeInst<bits<6> op, Format form, dag outs, dag ins, string asmstr, 
+                 list<dag> pattern, InstrItinClass itin> : Instruction 
 {
-  field bits<32> Inst;
-
   let Namespace = "MBlaze";
+  field bits<32> Inst;
 
-  bits<6> opcode;
+  bits<6> opcode = op;
+  Format Form = form;
+  bits<6> FormBits = Form.Value;
 
   // Top 6 bits are the 'opcode' field
   let Inst{0-5} = opcode;   
@@ -39,13 +60,16 @@
   let AsmString   = asmstr;
   let Pattern     = pattern;
   let Itinerary   = itin;
+
+  // TSFlags layout should be kept in sync with MBlazeInstrInfo.h.
+  let TSFlags{5-0}   = FormBits;
 }
 
 //===----------------------------------------------------------------------===//
 // Pseudo instruction class
 //===----------------------------------------------------------------------===//
 class MBlazePseudo<dag outs, dag ins, string asmstr, list<dag> pattern>:
-      MBlazeInst<outs, ins, asmstr, pattern, IIPseudo>;
+      MBlazeInst<0x0, FPseudo, outs, ins, asmstr, pattern, IIPseudo>;
 
 //===----------------------------------------------------------------------===//
 // Type A instruction class in MBlaze : <|opcode|rd|ra|rb|flags|>
@@ -53,194 +77,49 @@
 
 class TA<bits<6> op, bits<11> flags, dag outs, dag ins, string asmstr,
          list<dag> pattern, InstrItinClass itin> : 
-         MBlazeInst<outs, ins, asmstr, pattern, itin> 
+         MBlazeInst<op,FRRR,outs, ins, asmstr, pattern, itin> 
 {
   bits<5> rd;
   bits<5> ra;
   bits<5> rb;
 
-  let opcode = op;
-
   let Inst{6-10}  = rd;
   let Inst{11-15} = ra; 
   let Inst{16-20} = rb;
   let Inst{21-31} = flags;
 }
 
-class TAI<bits<6> op, dag outs, dag ins, string asmstr,
-          list<dag> pattern, InstrItinClass itin> :
-          MBlazeInst<outs, ins, asmstr, pattern, itin>
-{
-  bits<5> rd;
-  bits<5> ra;
-  bits<16> imm16;
-
-  let opcode = op;
-
-  let Inst{6-10}  = rd;
-  let Inst{11-15} = ra; 
-  let Inst{16-31} = imm16;
-}
-
-class TIMM<bits<6> op, dag outs, dag ins, string asmstr,
-           list<dag> pattern, InstrItinClass itin> :
-           MBlazeInst<outs, ins, asmstr, pattern, itin>
-{
-  bits<5> ra;
-  bits<16> imm16;
-
-  let opcode = op;
-
-  let Inst{6-15}  = 0;
-  let Inst{16-31} = imm16;
-}
-
-class TADDR<bits<6> op, dag outs, dag ins, string asmstr,
-            list<dag> pattern, InstrItinClass itin> :
-            MBlazeInst<outs, ins, asmstr, pattern, itin>
-{
-  bits<26> addr;
-
-  let opcode = op;
-
-  let Inst{6-31} = addr;
-}
-
 //===----------------------------------------------------------------------===//
 // Type B instruction class in MBlaze : <|opcode|rd|ra|immediate|>
 //===----------------------------------------------------------------------===//
 
 class TB<bits<6> op, dag outs, dag ins, string asmstr, list<dag> pattern,
          InstrItinClass itin> : 
-         MBlazeInst<outs, ins, asmstr, pattern, itin> 
+         MBlazeInst<op, FRRI, outs, ins, asmstr, pattern, itin> 
 {
   bits<5>  rd;
   bits<5>  ra;
   bits<16> imm16;
 
-  let opcode = op;
-
   let Inst{6-10}  = rd;
   let Inst{11-15} = ra; 
   let Inst{16-31} = imm16;
 }
 
 //===----------------------------------------------------------------------===//
-// Float instruction class in MBlaze : <|opcode|rd|ra|flags|>
+// Type B instruction class in MBlaze but with the operands reversed in
+// the LLVM DAG : <|opcode|rd|ra|immediate|>
 //===----------------------------------------------------------------------===//
-
-class TF<bits<6> op, bits<11> flags, dag outs, dag ins, string asmstr,
-         list<dag> pattern, InstrItinClass itin> : 
-         MBlazeInst<outs, ins, asmstr, pattern, itin> 
-{
-  bits<5>  rd;
-  bits<5>  ra;
-
-  let opcode = op;
-
-  let Inst{6-10}  = rd;
-  let Inst{11-15} = ra; 
-  let Inst{16-20} = 0;
-  let Inst{21-31} = flags;
-}
-
-//===----------------------------------------------------------------------===//
-// Branch instruction class in MBlaze : <|opcode|rd|br|ra|flags|>
-//===----------------------------------------------------------------------===//
-
-class TBR<bits<6> op, bits<5> br, bits<11> flags, dag outs, dag ins,
-          string asmstr, list<dag> pattern, InstrItinClass itin> :
-          MBlazeInst<outs, ins, asmstr, pattern, itin>
-{
-  bits<5> ra;
-
-  let opcode = op;
-
-  let Inst{6-10}  = 0;
-  let Inst{11-15} = br; 
-  let Inst{16-20} = ra;
-  let Inst{21-31} = flags;
-}
-
-class TBRC<bits<6> op, bits<5> br, bits<11> flags, dag outs, dag ins,
-           string asmstr, list<dag> pattern, InstrItinClass itin> :
-           MBlazeInst<outs, ins, asmstr, pattern, itin>
-{
-  bits<5> ra;
-  bits<5> rb;
-
-  let opcode = op;
-
-  let Inst{6-10}  = br;
-  let Inst{11-15} = ra; 
-  let Inst{16-20} = rb;
-  let Inst{21-31} = flags;
-}
-
-class TBRL<bits<6> op, bits<5> br, bits<11> flags, dag outs, dag ins,
-           string asmstr, list<dag> pattern, InstrItinClass itin> :
-           MBlazeInst<outs, ins, asmstr, pattern, itin>
-{
-  bits<5> ra;
-
-  let opcode = op;
-
-  let Inst{6-10}  = 0xF;
-  let Inst{11-15} = br; 
-  let Inst{16-20} = ra;
-  let Inst{21-31} = flags;
-}
-
-class TBRI<bits<6> op, bits<5> br, dag outs, dag ins,
-           string asmstr, list<dag> pattern, InstrItinClass itin> :
-           MBlazeInst<outs, ins, asmstr, pattern, itin>
-{
-  bits<16> imm16;
-
-  let opcode = op;
-
-  let Inst{6-10}  = 0;
-  let Inst{11-15} = br; 
-  let Inst{16-31} = imm16;
-}
-
-class TBRLI<bits<6> op, bits<5> br, dag outs, dag ins,
-            string asmstr, list<dag> pattern, InstrItinClass itin> :
-            MBlazeInst<outs, ins, asmstr, pattern, itin>
-{
-  bits<16> imm16;
-
-  let opcode = op;
-
-  let Inst{6-10}  = 0xF;
-  let Inst{11-15} = br; 
-  let Inst{16-31} = imm16;
-}
-
-class TBRCI<bits<6> op, bits<5> br, dag outs, dag ins,
-            string asmstr, list<dag> pattern, InstrItinClass itin> :
-            MBlazeInst<outs, ins, asmstr, pattern, itin>
-{
-  bits<5> ra;
-  bits<16> imm16;
-
-  let opcode = op;
-
-  let Inst{6-10}  = br;
-  let Inst{11-15} = ra; 
-  let Inst{16-31} = imm16;
-}
-
-class TRET<bits<6> op, dag outs, dag ins,
-            string asmstr, list<dag> pattern, InstrItinClass itin> :
-            MBlazeInst<outs, ins, asmstr, pattern, itin>
-{
-  bits<5>  ra;
-  bits<16> imm16;
-
-  let opcode = op;
-
-  let Inst{6-10}  = 0x10;
-  let Inst{11-15} = ra; 
-  let Inst{16-31} = imm16;
+class TBR<bits<6> op, dag outs, dag ins, string asmstr, list<dag> pattern,
+         InstrItinClass itin> : 
+         TB<op, outs, ins, asmstr, pattern, itin> {
+  bits<5>  rrd;
+  bits<16> rimm16;
+  bits<5>  rra;
+
+  let Form = FRIR;
+
+  let rd = rrd;
+  let ra = rra;
+  let imm16 = rimm16;
 }

Modified: llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.h?rev=116993&r1=116992&r2=116993&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.h (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.h Wed Oct 20 22:57:26 2010
@@ -134,29 +134,47 @@
 /// instruction info tracks.
 ///
 namespace MBlazeII {
-  /// Target Operand Flag enum.
-  enum TOF {
+  enum {
+    // PseudoFrm - This represents an instruction that is a pseudo instruction
+    // or one that has not been implemented yet.  It is illegal to code generate
+    // it, but tolerated for intermediate implementation stages.
+    Pseudo         = 0,
+
+    RegRegReg      = 1,
+    RegRegImm      = 2,
+    RegImmReg      = 3,
+    FSL            = 4,
+    FSLD           = 5,
+    FSLT           = 6,
+    FSLTD          = 7,
+    Reg            = 8,
+    Imm            = 9,
+    RegReg         = 10,
+    RegImm         = 11,
+
+    FormMask       = 63
+
     //===------------------------------------------------------------------===//
     // MBlaze Specific MachineOperand flags.
-    MO_NO_FLAG,
+    // MO_NO_FLAG,
 
     /// MO_GOT - Represents the offset into the global offset table at which
     /// the address the relocation entry symbol resides during execution.
-    MO_GOT,
+    // MO_GOT,
 
     /// MO_GOT_CALL - Represents the offset into the global offset table at
     /// which the address of a call site relocation entry symbol resides
     /// during execution. This is different from the above since this flag
     /// can only be present in call instructions.
-    MO_GOT_CALL,
+    // MO_GOT_CALL,
 
     /// MO_GPREL - Represents the offset from the current gp value to be used
     /// for the relocatable object file being produced.
-    MO_GPREL,
+    // MO_GPREL,
 
     /// MO_ABS_HILO - Represents the hi or low part of an absolute symbol
     /// address.
-    MO_ABS_HILO
+    // MO_ABS_HILO
 
   };
 }

Modified: llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.td?rev=116993&r1=116992&r2=116993&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.td (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.td Wed Oct 20 22:57:26 2010
@@ -13,36 +13,33 @@
 include "MBlazeInstrFormats.td"
 
 //===----------------------------------------------------------------------===//
-// MBlaze profiles and nodes
+// MBlaze type profiles
 //===----------------------------------------------------------------------===//
+
+// def SDTMBlazeSelectCC : SDTypeProfile<1, 3, [SDTCisSameAs<0, 1>]>;
 def SDT_MBlazeRet     : SDTypeProfile<0, 1, [SDTCisInt<0>]>;
 def SDT_MBlazeJmpLink : SDTypeProfile<0, 1, [SDTCisVT<0, i32>]>;
+def SDT_MBCallSeqStart : SDCallSeqStart<[SDTCisVT<0, i32>]>;
+def SDT_MBCallSeqEnd   : SDCallSeqEnd<[SDTCisVT<0, i32>, SDTCisVT<1, i32>]>;
 
-// Call
-def MBlazeJmpLink : SDNode<"MBlazeISD::JmpLink",SDT_MBlazeJmpLink,
-                               [SDNPHasChain,SDNPOptInFlag,SDNPOutFlag]>;
+//===----------------------------------------------------------------------===//
+// MBlaze specific nodes
+//===----------------------------------------------------------------------===//
 
-// Return
-def MBlazeRet : SDNode<"MBlazeISD::Ret", SDT_MBlazeRet,
+def MBlazeRet     : SDNode<"MBlazeISD::Ret", SDT_MBlazeRet,
                            [SDNPHasChain, SDNPOptInFlag]>;
 
-// Hi and Lo nodes are used to handle global addresses. Used on 
-// MBlazeISelLowering to lower stuff like GlobalAddress, ExternalSymbol 
-// static model.
-def MBWrapper   : SDNode<"MBlazeISD::Wrap", SDTIntUnaryOp>;
-def MBlazeGPRel : SDNode<"MBlazeISD::GPRel", SDTIntUnaryOp>;
+def MBlazeJmpLink : SDNode<"MBlazeISD::JmpLink",SDT_MBlazeJmpLink,
+                           [SDNPHasChain,SDNPOptInFlag,SDNPOutFlag]>;
 
-def SDT_MBCallSeqStart : SDCallSeqStart<[SDTCisVT<0, i32>]>;
-def SDT_MBCallSeqEnd   : SDCallSeqEnd<[SDTCisVT<0, i32>, SDTCisVT<1, i32>]>;
+def MBWrapper   : SDNode<"MBlazeISD::Wrap", SDTIntUnaryOp>;
 
-// These are target-independent nodes, but have target-specific formats.
 def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_MBCallSeqStart,
                            [SDNPHasChain, SDNPOutFlag]>;
+
 def callseq_end   : SDNode<"ISD::CALLSEQ_END", SDT_MBCallSeqEnd,
                            [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>;
 
-def SDTMBlazeSelectCC : SDTypeProfile<1, 3, [SDTCisSameAs<0, 1>]>;
-
 //===----------------------------------------------------------------------===//
 // MBlaze Instruction Predicate Definitions.
 //===----------------------------------------------------------------------===//
@@ -95,18 +92,7 @@
   let MIOperandInfo = (ops CPURegs, CPURegs);
 }
 
-// Transformation Function - get the lower 16 bits.
-def LO16 : SDNodeXForm<imm, [{
-  return getI32Imm((unsigned)N->getZExtValue() & 0xFFFF);
-}]>;
-
-// Transformation Function - get the higher 16 bits.
-def HI16 : SDNodeXForm<imm, [{
-  return getI32Imm((unsigned)N->getZExtValue() >> 16);
-}]>;
-
 // Node immediate fits as 16-bit sign extended on target immediate.
-// e.g. addi, andi
 def immSExt16  : PatLeaf<(imm), [{
   return (N->getZExtValue() >> 16) == 0;
 }]>;
@@ -117,19 +103,19 @@
 // e.g. addiu, sltiu
 def immZExt16  : PatLeaf<(imm), [{
   return (N->getZExtValue() >> 16) == 0;
-}], LO16>;
+}]>;
 
 // FSL immediate field must fit in 4 bits.
 def immZExt4 : PatLeaf<(imm), [{
-      return N->getZExtValue() == ((N->getZExtValue()) & 0xf) ;
+  return N->getZExtValue() == ((N->getZExtValue()) & 0xf) ;
 }]>;
 
 // shamt field must fit in 5 bits.
 def immZExt5 : PatLeaf<(imm), [{
-      return N->getZExtValue() == ((N->getZExtValue()) & 0x1f) ;
+  return N->getZExtValue() == ((N->getZExtValue()) & 0x1f) ;
 }]>;
 
-// MBlaze Address Mode! SDNode frameindex could possibily be a match
+// MBlaze Address Mode. SDNode frameindex could possibily be a match
 // since load and store instructions from stack used it.
 def iaddr : ComplexPattern<i32, 2, "SelectAddrRegImm", [frameindex], []>;
 def xaddr : ComplexPattern<i32, 2, "SelectAddrRegReg", [], []>;
@@ -141,28 +127,14 @@
 // As stack alignment is always done with addiu, we need a 16-bit immediate
 let Defs = [R1], Uses = [R1] in {
 def ADJCALLSTACKDOWN : MBlazePseudo<(outs), (ins simm16:$amt),
-                                  "${:comment} ADJCALLSTACKDOWN $amt",
+                                  "#ADJCALLSTACKDOWN $amt",
                                   [(callseq_start timm:$amt)]>;
 def ADJCALLSTACKUP   : MBlazePseudo<(outs),
                                   (ins uimm16:$amt1, simm16:$amt2),
-                                  "${:comment} ADJCALLSTACKUP $amt1",
+                                  "#ADJCALLSTACKUP $amt1",
                                   [(callseq_end timm:$amt1, timm:$amt2)]>;
 }
 
-// Some assembly macros need to avoid pseudoinstructions and assembler
-// automatic reodering, we should reorder ourselves.
-def MACRO     : MBlazePseudo<(outs), (ins), ".set macro",     []>;
-def REORDER   : MBlazePseudo<(outs), (ins), ".set reorder",   []>;
-def NOMACRO   : MBlazePseudo<(outs), (ins), ".set nomacro",   []>;
-def NOREORDER : MBlazePseudo<(outs), (ins), ".set noreorder", []>;
-
-// When handling PIC code the assembler needs .cpload and .cprestore
-// directives. If the real instructions corresponding these directives
-// are used, we have the same behavior, but get also a bunch of warnings
-// from the assembler.
-def CPLOAD : MBlazePseudo<(outs), (ins CPURegs:$reg), ".cpload $reg", []>;
-def CPRESTORE : MBlazePseudo<(outs), (ins uimm16:$l), ".cprestore $l\n", []>;
-
 //===----------------------------------------------------------------------===//
 // Instructions specific format
 //===----------------------------------------------------------------------===//
@@ -178,19 +150,19 @@
 
 class ArithI<bits<6> op, string instr_asm, SDNode OpNode,
              Operand Od, PatLeaf imm_type> :
-             TAI<op, (outs CPURegs:$dst), (ins CPURegs:$b, Od:$c),
-                 !strconcat(instr_asm, "   $dst, $b, $c"),
-                 [(set CPURegs:$dst, (OpNode CPURegs:$b, imm_type:$c))], IIAlu>;
+             TB<op, (outs CPURegs:$dst), (ins CPURegs:$b, Od:$c),
+                !strconcat(instr_asm, "   $dst, $b, $c"),
+                [(set CPURegs:$dst, (OpNode CPURegs:$b, imm_type:$c))], IIAlu>;
 
 class ArithR<bits<6> op, bits<11> flags, string instr_asm, SDNode OpNode,
             InstrItinClass itin> :
             TA<op, flags, (outs CPURegs:$dst), (ins CPURegs:$c, CPURegs:$b),
-               !strconcat(instr_asm, "   $dst, $c, $b"),
-               [(set CPURegs:$dst, (OpNode CPURegs:$b, CPURegs:$c))], itin>;
+                !strconcat(instr_asm, "   $dst, $c, $b"),
+                [(set CPURegs:$dst, (OpNode CPURegs:$b, CPURegs:$c))], itin>;
 
 class ArithRI<bits<6> op, string instr_asm, SDNode OpNode,
              Operand Od, PatLeaf imm_type> :
-             TAI<op, (outs CPURegs:$dst), (ins Od:$b, CPURegs:$c),
+             TBR<op, (outs CPURegs:$dst), (ins Od:$b, CPURegs:$c),
                  !strconcat(instr_asm, "   $dst, $c, $b"),
                  [(set CPURegs:$dst, (OpNode imm_type:$b, CPURegs:$c))], IIAlu>;
 
@@ -201,9 +173,9 @@
                [], itin>;
 
 class ArithNI<bits<6> op, string instr_asm,Operand Od, PatLeaf imm_type> :
-             TAI<op, (outs CPURegs:$dst), (ins CPURegs:$b, Od:$c),
-                 !strconcat(instr_asm, "   $dst, $b, $c"),
-                 [], IIAlu>;
+             TB<op, (outs CPURegs:$dst), (ins CPURegs:$b, Od:$c),
+                !strconcat(instr_asm, "   $dst, $b, $c"),
+                [], IIAlu>;
 
 class ArithRN<bits<6> op, bits<11> flags, string instr_asm,
             InstrItinClass itin> :
@@ -212,9 +184,9 @@
                [], itin>;
 
 class ArithRNI<bits<6> op, string instr_asm,Operand Od, PatLeaf imm_type> :
-             TAI<op, (outs CPURegs:$dst), (ins Od:$c, CPURegs:$b),
-                 !strconcat(instr_asm, "   $dst, $b, $c"),
-                 [], IIAlu>;
+             TB<op, (outs CPURegs:$dst), (ins Od:$c, CPURegs:$b),
+                !strconcat(instr_asm, "   $dst, $b, $c"),
+                [], IIAlu>;
 
 //===----------------------------------------------------------------------===//
 // Misc Arithmetic Instructions
@@ -226,14 +198,10 @@
                [(set CPURegs:$dst, (OpNode CPURegs:$b, CPURegs:$c))], IIAlu>;
 
 class LogicI<bits<6> op, string instr_asm, SDNode OpNode> :
-             TAI<op, (outs CPURegs:$dst), (ins CPURegs:$b, uimm16:$c),
-                 !strconcat(instr_asm, "   $dst, $b, $c"),
-                 [(set CPURegs:$dst, (OpNode CPURegs:$b, immZExt16:$c))],
-                 IIAlu>;
-
-class EffectiveAddress<string instr_asm> :
-          TAI<0x08, (outs CPURegs:$dst), (ins memri:$addr),
-              instr_asm, [(set CPURegs:$dst, iaddr:$addr)], IIAlu>;
+             TB<op, (outs CPURegs:$dst), (ins CPURegs:$b, uimm16:$c),
+                !strconcat(instr_asm, "   $dst, $b, $c"),
+                [(set CPURegs:$dst, (OpNode CPURegs:$b, immZExt16:$c))],
+                IIAlu>;
 
 //===----------------------------------------------------------------------===//
 // Memory Access Instructions
@@ -244,7 +212,7 @@
                [(set CPURegs:$dst, (OpNode xaddr:$addr))], IILoad>;
 
 class LoadMI<bits<6> op, string instr_asm, PatFrag OpNode> :
-             TAI<op, (outs CPURegs:$dst), (ins memri:$addr),
+             TBR<op, (outs CPURegs:$dst), (ins memri:$addr),
                  !strconcat(instr_asm, "   $dst, $addr"),
                  [(set CPURegs:$dst, (OpNode iaddr:$addr))], IILoad>;
 
@@ -254,7 +222,7 @@
                 [(OpNode CPURegs:$dst, xaddr:$addr)], IIStore>;
 
 class StoreMI<bits<6> op, string instr_asm, PatFrag OpNode> :
-              TAI<op, (outs), (ins CPURegs:$dst, memri:$addr),
+              TBR<op, (outs), (ins CPURegs:$dst, memri:$addr),
                   !strconcat(instr_asm, "   $dst, $addr"),
                   [(OpNode CPURegs:$dst, iaddr:$addr)], IIStore>;
 
@@ -262,94 +230,108 @@
 // Branch Instructions
 //===----------------------------------------------------------------------===//
 class Branch<bits<6> op, bits<5> br, bits<11> flags, string instr_asm> :
-             TBR<op, br, flags, (outs), (ins CPURegs:$target),
+             TA<op, flags, (outs), (ins CPURegs:$target),
                  !strconcat(instr_asm, "   $target"),
-                 [(brind CPURegs:$target)], IIBranch>;
+                 [], IIBranch> {
+  let rd = 0x0;
+  let ra = br;
+}
 
-class BranchI<bits<6> op, bits<5> brf, string instr_asm> :
-              TBRI<op, brf, (outs), (ins brtarget:$target),
-                   !strconcat(instr_asm, "   $target"),
-                   [(br bb:$target)], IIBranch>;
+class BranchI<bits<6> op, bits<5> br, string instr_asm> :
+              TB<op, (outs), (ins brtarget:$target),
+                 !strconcat(instr_asm, "   $target"),
+                 [], IIBranch> {
+  let rd = 0;
+  let ra = br;
+}
 
 //===----------------------------------------------------------------------===//
 // Branch and Link Instructions
 //===----------------------------------------------------------------------===//
 class BranchL<bits<6> op, bits<5> br, bits<11> flags, string instr_asm> :
-              TBRL<op, br, flags, (outs), (ins CPURegs:$target),
-                   !strconcat(instr_asm, "   r15, $target"),
-                   [], IIBranch>;
+              TA<op, flags, (outs), (ins CPURegs:$target),
+                 !strconcat(instr_asm, "   r15, $target"),
+                 [], IIBranch> {
+  let rd = 15;
+  let ra = br;
+}
 
 class BranchLI<bits<6> op, bits<5> br, string instr_asm> :
-               TBRLI<op, br, (outs), (ins calltarget:$target),
-                     !strconcat(instr_asm, "   r15, $target"),
-                     [], IIBranch>;
+               TB<op, (outs), (ins calltarget:$target),
+                  !strconcat(instr_asm, "   r15, $target"),
+                  [], IIBranch> {
+  let rd = 15;
+  let ra = br;
+}
 
 //===----------------------------------------------------------------------===//
 // Conditional Branch Instructions
 //===----------------------------------------------------------------------===//
 class BranchC<bits<6> op, bits<5> br, bits<11> flags, string instr_asm,
               PatFrag cond_op> :
-              TBRC<op, br, flags, (outs),
-                   (ins CPURegs:$a, CPURegs:$b, brtarget:$offset),
-                   !strconcat(instr_asm, "   $a, $b, $offset"),
-                   [], IIBranch>; 
-                   //(brcond (cond_op CPURegs:$a, CPURegs:$b), bb:$offset)],
-                   //IIBranch>;
+              TA<op, flags, (outs),
+                 (ins CPURegs:$a, CPURegs:$b, brtarget:$offset),
+                 !strconcat(instr_asm, "   $a, $b, $offset"),
+                 [], IIBranch> {
+  let rd = br;
+}
 
 class BranchCI<bits<6> op, bits<5> br, string instr_asm, PatFrag cond_op> :
-               TBRCI<op, br, (outs), (ins CPURegs:$a, brtarget:$offset),
-                     !strconcat(instr_asm, "   $a, $offset"),
-                     [], IIBranch>;
+               TB<op, (outs), (ins CPURegs:$a, brtarget:$offset),
+                  !strconcat(instr_asm, "   $a, $offset"),
+                  [], IIBranch> {
+  let rd = br;
+}
 
 //===----------------------------------------------------------------------===//
 // MBlaze arithmetic instructions
 //===----------------------------------------------------------------------===//
 
 let isCommutable = 1, isAsCheapAsAMove = 1 in {
-    def ADD    :  Arith<0x00, 0x000, "add    ", add,  IIAlu>;
-    def ADDC   :  Arith<0x02, 0x000, "addc   ", adde, IIAlu>;
-    def ADDK   :  Arith<0x04, 0x000, "addk   ", addc, IIAlu>;
-    def ADDKC  : ArithN<0x06, 0x000, "addkc  ", IIAlu>;
-    def AND    :  Logic<0x21, 0x000, "and    ", and>;
-    def OR     :  Logic<0x20, 0x000, "or     ", or>;
-    def XOR    :  Logic<0x22, 0x000, "xor    ", xor>;
+  def ADD    :  Arith<0x00, 0x000, "add    ", add,  IIAlu>;
+  def ADDC   :  Arith<0x02, 0x000, "addc   ", adde, IIAlu>;
+  def ADDK   :  Arith<0x04, 0x000, "addk   ", addc, IIAlu>;
+  def ADDKC  : ArithN<0x06, 0x000, "addkc  ", IIAlu>;
+  def AND    :  Logic<0x21, 0x000, "and    ", and>;
+  def OR     :  Logic<0x20, 0x000, "or     ", or>;
+  def XOR    :  Logic<0x22, 0x000, "xor    ", xor>;
 }
 
 let isAsCheapAsAMove = 1 in {
-    def ANDN   :  ArithN<0x23, 0x000, "andn   ", IIAlu>;
-    def CMP    :  ArithN<0x05, 0x001, "cmp    ", IIAlu>;
-    def CMPU   :  ArithN<0x05, 0x003, "cmpu   ", IIAlu>;
-    def RSUB   :  ArithR<0x01, 0x000, "rsub   ", sub,  IIAlu>;
-    def RSUBC  :  ArithR<0x03, 0x000, "rsubc  ", sube, IIAlu>;
-    def RSUBK  :  ArithR<0x05, 0x000, "rsubk  ", subc, IIAlu>;
-    def RSUBKC : ArithRN<0x07, 0x000, "rsubkc ", IIAlu>;
+  def ANDN   :  ArithN<0x23, 0x000, "andn   ", IIAlu>;
+  def CMP    :  ArithN<0x05, 0x001, "cmp    ", IIAlu>;
+  def CMPU   :  ArithN<0x05, 0x003, "cmpu   ", IIAlu>;
+  def RSUB   :  ArithR<0x01, 0x000, "rsub   ", sub,  IIAlu>;
+  def RSUBC  :  ArithR<0x03, 0x000, "rsubc  ", sube, IIAlu>;
+  def RSUBK  :  ArithR<0x05, 0x000, "rsubk  ", subc, IIAlu>;
+  def RSUBKC : ArithRN<0x07, 0x000, "rsubkc ", IIAlu>;
 }
 
 let isCommutable = 1, Predicates=[HasMul] in {
-    def MUL    : Arith<0x10, 0x000, "mul    ", mul,   IIAlu>;
+  def MUL    : Arith<0x10, 0x000, "mul    ", mul,   IIAlu>;
 }
 
 let isCommutable = 1, Predicates=[HasMul,HasMul64] in {
-    def MULH   : Arith<0x10, 0x001, "mulh   ", mulhs, IIAlu>;
-    def MULHU  : Arith<0x10, 0x003, "mulhu  ", mulhu, IIAlu>;
+  def MULH   : Arith<0x10, 0x001, "mulh   ", mulhs, IIAlu>;
+  def MULHU  : Arith<0x10, 0x003, "mulhu  ", mulhu, IIAlu>;
 }
 
 let Predicates=[HasMul,HasMul64] in {
-    def MULHSU : ArithN<0x10, 0x002, "mulhsu ", IIAlu>;
+  def MULHSU : ArithN<0x10, 0x002, "mulhsu ", IIAlu>;
 }
 
 let Predicates=[HasBarrel] in {
-    def BSRL   :   Arith<0x11, 0x000, "bsrl   ", srl, IIAlu>;
-    def BSRA   :   Arith<0x11, 0x200, "bsra   ", sra, IIAlu>;
-    def BSLL   :   Arith<0x11, 0x400, "bsll   ", shl, IIAlu>;
-    def BSRLI  :  ArithI<0x11, "bsrli  ", srl, uimm5, immZExt5>;
-    def BSRAI  :  ArithI<0x11, "bsrai  ", sra, uimm5, immZExt5>;
-    def BSLLI  :  ArithI<0x11, "bslli  ", shl, uimm5, immZExt5>;
+  def BSRL   :   Arith<0x11, 0x000, "bsrl   ", srl, IIAlu>;
+  def BSRA   :   Arith<0x11, 0x200, "bsra   ", sra, IIAlu>;
+  def BSLL   :   Arith<0x11, 0x400, "bsll   ", shl, IIAlu>;
+  def BSRLI  :  ArithI<0x11, "bsrli  ", srl, uimm5, immZExt5>;
+  def BSRAI  :  ArithI<0x11, "bsrai  ", sra, uimm5, immZExt5>;
+  def BSLLI  :  ArithI<0x11, "bslli  ", shl, uimm5, immZExt5>;
 }
 
 let Predicates=[HasDiv] in {
-    def IDIV   :  Arith<0x12, 0x000, "idiv   ", sdiv, IIAlu>;
-    def IDIVU  :  Arith<0x12, 0x002, "idivu  ", udiv, IIAlu>;
+  def IDIV   :  Arith<0x12, 0x000, "idiv   ", sdiv, IIAlu>;
+  def IDIVU  :  Arith<0x12, 0x002, "idivu  ", udiv, IIAlu>;
 }
 
 //===----------------------------------------------------------------------===//
@@ -357,22 +339,22 @@
 //===----------------------------------------------------------------------===//
 
 let isAsCheapAsAMove = 1 in {
-    def ADDI    :   ArithI<0x08, "addi   ", add,  simm16, immSExt16>;
-    def ADDIC   :  ArithNI<0x0A, "addic  ", simm16, immSExt16>;
-    def ADDIK   :  ArithNI<0x0C, "addik  ", simm16, immSExt16>;
-    def ADDIKC  :   ArithI<0x0E, "addikc ", addc, simm16, immSExt16>;
-    def RSUBI   :   ArithRI<0x09, "rsubi  ", sub,  simm16, immSExt16>;
-    def RSUBIC  :  ArithRNI<0x0B, "rsubi  ", simm16, immSExt16>;
-    def RSUBIK  :  ArithRNI<0x0E, "rsubic ", simm16, immSExt16>;
-    def RSUBIKC :   ArithRI<0x0F, "rsubikc", subc, simm16, immSExt16>;
-    def ANDNI   :  ArithNI<0x2B, "andni  ", uimm16, immZExt16>;
-    def ANDI    :   LogicI<0x29, "andi   ", and>;
-    def ORI     :   LogicI<0x28, "ori    ", or>;
-    def XORI    :   LogicI<0x2A, "xori   ", xor>;
+  def ADDI    :   ArithI<0x08, "addi   ", add,  simm16, immSExt16>;
+  def ADDIC   :  ArithNI<0x0A, "addic  ", simm16, immSExt16>;
+  def ADDIK   :  ArithNI<0x0C, "addik  ", simm16, immSExt16>;
+  def ADDIKC  :   ArithI<0x0E, "addikc ", addc, simm16, immSExt16>;
+  def RSUBI   :  ArithRI<0x09, "rsubi  ", sub,  simm16, immSExt16>;
+  def RSUBIC  : ArithRNI<0x0B, "rsubi  ", simm16, immSExt16>;
+  def RSUBIK  : ArithRNI<0x0E, "rsubic ", simm16, immSExt16>;
+  def RSUBIKC :  ArithRI<0x0F, "rsubikc", subc, simm16, immSExt16>;
+  def ANDNI   :  ArithNI<0x2B, "andni  ", uimm16, immZExt16>;
+  def ANDI    :   LogicI<0x29, "andi   ", and>;
+  def ORI     :   LogicI<0x28, "ori    ", or>;
+  def XORI    :   LogicI<0x2A, "xori   ", xor>;
 }
 
 let Predicates=[HasMul] in {
-    def MULI    :   ArithI<0x18, "muli   ", mul, simm16, immSExt16>;
+  def MULI    :   ArithI<0x18, "muli   ", mul, simm16, immSExt16>;
 }
 
 //===----------------------------------------------------------------------===//
@@ -380,115 +362,122 @@
 //===----------------------------------------------------------------------===//
 
 let canFoldAsLoad = 1, isReMaterializable = 1 in {
-    def LBU  :  LoadM<0x30, "lbu    ", zextloadi8>;
-    def LHU  :  LoadM<0x31, "lhu    ", zextloadi16>;
-    def LW   :  LoadM<0x32, "lw     ", load>;
-
-    def LBUI : LoadMI<0x30, "lbui   ", zextloadi8>;
-    def LHUI : LoadMI<0x31, "lhui   ", zextloadi16>;
-    def LWI  : LoadMI<0x32, "lwi    ", load>;
-}
-
-    def SB  :  StoreM<0x34, "sb     ", truncstorei8>;
-    def SH  :  StoreM<0x35, "sh     ", truncstorei16>;
-    def SW  :  StoreM<0x36, "sw     ", store>;
-
-    def SBI : StoreMI<0x34, "sbi    ", truncstorei8>;
-    def SHI : StoreMI<0x35, "shi    ", truncstorei16>;
-    def SWI : StoreMI<0x36, "swi    ", store>;
+  def LBU  :  LoadM<0x30, "lbu    ", zextloadi8>;
+  def LHU  :  LoadM<0x31, "lhu    ", zextloadi16>;
+  def LW   :  LoadM<0x32, "lw     ", load>;
+
+  def LBUI : LoadMI<0x38, "lbui   ", zextloadi8>;
+  def LHUI : LoadMI<0x39, "lhui   ", zextloadi16>;
+  def LWI  : LoadMI<0x3A, "lwi    ", load>;
+}
+
+  def SB  :  StoreM<0x34, "sb     ", truncstorei8>;
+  def SH  :  StoreM<0x35, "sh     ", truncstorei16>;
+  def SW  :  StoreM<0x36, "sw     ", store>;
+
+  def SBI : StoreMI<0x3C, "sbi    ", truncstorei8>;
+  def SHI : StoreMI<0x3D, "shi    ", truncstorei16>;
+  def SWI : StoreMI<0x3E, "swi    ", store>;
 
 //===----------------------------------------------------------------------===//
 // MBlaze branch instructions
 //===----------------------------------------------------------------------===//
 
-let isBranch = 1, isTerminator = 1, hasCtrlDep = 1 in {
-    def BRI    :  BranchI<0x2E, 0x00, "bri    ">;
-    def BRAI   :  BranchI<0x2E, 0x08, "brai   ">;
-    def BEQI   : BranchCI<0x2F, 0x00, "beqi   ", seteq>;
-    def BNEI   : BranchCI<0x2F, 0x01, "bnei   ", setne>;
-    def BLTI   : BranchCI<0x2F, 0x02, "blti   ", setlt>;
-    def BLEI   : BranchCI<0x2F, 0x03, "blei   ", setle>;
-    def BGTI   : BranchCI<0x2F, 0x04, "bgti   ", setgt>;
-    def BGEI   : BranchCI<0x2F, 0x05, "bgei   ", setge>;
-}
-
-let isBranch = 1, isIndirectBranch = 1, isTerminator = 1, hasCtrlDep = 1 in {
-    def BR     :   Branch<0x26, 0x00, 0x000, "br     ">;
-    def BRA    :   Branch<0x26, 0x08, 0x000, "bra    ">;
-    def BEQ    :  BranchC<0x27, 0x00, 0x000, "beq    ", seteq>;
-    def BNE    :  BranchC<0x27, 0x01, 0x000, "bne    ", setne>;
-    def BLT    :  BranchC<0x27, 0x02, 0x000, "blt    ", setlt>;
-    def BLE    :  BranchC<0x27, 0x03, 0x000, "ble    ", setle>;
-    def BGT    :  BranchC<0x27, 0x04, 0x000, "bgt    ", setgt>;
-    def BGE    :  BranchC<0x27, 0x05, 0x000, "bge    ", setge>;
-}
-
-let isBranch = 1, isTerminator = 1, hasDelaySlot = 1, hasCtrlDep = 1 in {
-    def BRID   :  BranchI<0x2E, 0x10, "brid   ">;
-    def BRAID  :  BranchI<0x2E, 0x18, "braid  ">;
-    def BEQID  : BranchCI<0x2F, 0x10, "beqid  ", seteq>;
-    def BNEID  : BranchCI<0x2F, 0x11, "bneid  ", setne>;
-    def BLTID  : BranchCI<0x2F, 0x12, "bltid  ", setlt>;
-    def BLEID  : BranchCI<0x2F, 0x13, "bleid  ", setle>;
-    def BGTID  : BranchCI<0x2F, 0x14, "bgtid  ", setgt>;
-    def BGEID  : BranchCI<0x2F, 0x15, "bgeid  ", setge>;
+let isBranch = 1, isTerminator = 1, hasCtrlDep = 1, isBarrier = 1, 
+    Form = FI in {
+  def BRI    :  BranchI<0x2E, 0x00, "bri    ">;
+  def BRAI   :  BranchI<0x2E, 0x08, "brai   ">;
+}
+
+let isBranch = 1, isTerminator = 1, hasCtrlDep = 1, Form = FRI in {
+  def BEQI   : BranchCI<0x2F, 0x00, "beqi   ", seteq>;
+  def BNEI   : BranchCI<0x2F, 0x01, "bnei   ", setne>;
+  def BLTI   : BranchCI<0x2F, 0x02, "blti   ", setlt>;
+  def BLEI   : BranchCI<0x2F, 0x03, "blei   ", setle>;
+  def BGTI   : BranchCI<0x2F, 0x04, "bgti   ", setgt>;
+  def BGEI   : BranchCI<0x2F, 0x05, "bgei   ", setge>;
+}
+
+let isBranch = 1, isIndirectBranch = 1, isTerminator = 1, hasCtrlDep = 1,
+    isBarrier = 1, Form = FR in {
+  def BR     :   Branch<0x26, 0x00, 0x000, "br     ">;
+  def BRA    :   Branch<0x26, 0x08, 0x000, "bra    ">;
+}
+
+let isBranch = 1, isIndirectBranch = 1, isTerminator = 1, hasCtrlDep = 1,
+    Form = FRR in {
+  def BEQ    :  BranchC<0x27, 0x00, 0x000, "beq    ", seteq>;
+  def BNE    :  BranchC<0x27, 0x01, 0x000, "bne    ", setne>;
+  def BLT    :  BranchC<0x27, 0x02, 0x000, "blt    ", setlt>;
+  def BLE    :  BranchC<0x27, 0x03, 0x000, "ble    ", setle>;
+  def BGT    :  BranchC<0x27, 0x04, 0x000, "bgt    ", setgt>;
+  def BGE    :  BranchC<0x27, 0x05, 0x000, "bge    ", setge>;
+}
+
+let isBranch = 1, isTerminator = 1, hasDelaySlot = 1, hasCtrlDep = 1,
+    isBarrier = 1, Form = FI in {
+  def BRID   :  BranchI<0x2E, 0x10, "brid   ">;
+  def BRAID  :  BranchI<0x2E, 0x18, "braid  ">;
+}
+
+let isBranch = 1, isTerminator = 1, hasDelaySlot = 1, hasCtrlDep = 1,
+    Form = FRI in {
+  def BEQID  : BranchCI<0x2F, 0x10, "beqid  ", seteq>;
+  def BNEID  : BranchCI<0x2F, 0x11, "bneid  ", setne>;
+  def BLTID  : BranchCI<0x2F, 0x12, "bltid  ", setlt>;
+  def BLEID  : BranchCI<0x2F, 0x13, "bleid  ", setle>;
+  def BGTID  : BranchCI<0x2F, 0x14, "bgtid  ", setgt>;
+  def BGEID  : BranchCI<0x2F, 0x15, "bgeid  ", setge>;
+}
+
+let isBranch = 1, isIndirectBranch = 1, isTerminator = 1, Form = FR,
+    hasDelaySlot = 1, hasCtrlDep = 1, isBarrier = 1 in {
+  def BRD    :   Branch<0x26, 0x10, 0x000, "brd    ">;
+  def BRAD   :   Branch<0x26, 0x18, 0x000, "brad   ">;
 }
 
 let isBranch = 1, isIndirectBranch = 1, isTerminator = 1,
-    hasDelaySlot = 1, hasCtrlDep = 1 in {
-    def BRD    :   Branch<0x26, 0x10, 0x000, "brd    ">;
-    def BRAD   :   Branch<0x26, 0x18, 0x000, "brad   ">;
-    def BEQD   :  BranchC<0x27, 0x10, 0x000, "beqd   ", seteq>;
-    def BNED   :  BranchC<0x27, 0x11, 0x000, "bned   ", setne>;
-    def BLTD   :  BranchC<0x27, 0x12, 0x000, "bltd   ", setlt>;
-    def BLED   :  BranchC<0x27, 0x13, 0x000, "bled   ", setle>;
-    def BGTD   :  BranchC<0x27, 0x14, 0x000, "bgtd   ", setgt>;
-    def BGED   :  BranchC<0x27, 0x15, 0x000, "bged   ", setge>;
-}
-
-let isCall = 1, hasCtrlDep = 1, isIndirectBranch = 1,
-    Defs = [R3,R4,R5,R6,R7,R8,R9,R10,R11,R12],
-    Uses = [R1,R5,R6,R7,R8,R9,R10] in {
-    def BRL    : BranchL<0x26, 0x04, 0x000, "brl    ">;
-    def BRAL   : BranchL<0x26, 0x0C, 0x000, "bral   ">;
+    hasDelaySlot = 1, hasCtrlDep = 1, Form = FRR in {
+  def BEQD   :  BranchC<0x27, 0x10, 0x000, "beqd   ", seteq>;
+  def BNED   :  BranchC<0x27, 0x11, 0x000, "bned   ", setne>;
+  def BLTD   :  BranchC<0x27, 0x12, 0x000, "bltd   ", setlt>;
+  def BLED   :  BranchC<0x27, 0x13, 0x000, "bled   ", setle>;
+  def BGTD   :  BranchC<0x27, 0x14, 0x000, "bgtd   ", setgt>;
+  def BGED   :  BranchC<0x27, 0x15, 0x000, "bged   ", setge>;
 }
 
-let isCall = 1, hasDelaySlot = 1, hasCtrlDep = 1,
+let isCall = 1, hasDelaySlot = 1, hasCtrlDep = 1, isBarrier = 1, Form = FI,
     Defs = [R3,R4,R5,R6,R7,R8,R9,R10,R11,R12],
     Uses = [R1,R5,R6,R7,R8,R9,R10] in {
-    def BRLID  : BranchLI<0x2E, 0x14, "brlid  ">;
-    def BRALID : BranchLI<0x2E, 0x1C, "bralid ">;
+  def BRLID  : BranchLI<0x2E, 0x14, "brlid  ">;
+  def BRALID : BranchLI<0x2E, 0x1C, "bralid ">;
 }
 
 let isCall = 1, hasDelaySlot = 1, hasCtrlDep = 1, isIndirectBranch = 1,
+    isBarrier = 1, Form = FR,
     Defs = [R3,R4,R5,R6,R7,R8,R9,R10,R11,R12],
     Uses = [R1,R5,R6,R7,R8,R9,R10] in {
-    def BRLD   : BranchL<0x26, 0x14, 0x000, "brld   ">;
-    def BRALD  : BranchL<0x26, 0x1C, 0x000, "brald  ">;
+  def BRLD   : BranchL<0x26, 0x14, 0x000, "brld   ">;
+  def BRALD  : BranchL<0x26, 0x1C, 0x000, "brald  ">;
 }
 
-let isReturn=1, isTerminator=1, hasDelaySlot=1,
-    isBarrier=1, hasCtrlDep=1, imm16=0x8 in {
-    def RTSD   : TRET<0x2D, (outs), (ins CPURegs:$target),
-                      "rtsd      $target, 8",
-                      [(MBlazeRet CPURegs:$target)],
-                      IIBranch>;
+let isReturn=1, isTerminator=1, hasDelaySlot=1, isBarrier=1,
+    hasCtrlDep=1, rd=0x10, imm16=0x8, Form=FR in {
+  def RTSD   : TB<0x2D, (outs), (ins CPURegs:$target),
+                  "rtsd      $target, 8",
+                  [(MBlazeRet CPURegs:$target)],
+                  IIBranch>;
 }
 
 //===----------------------------------------------------------------------===//
 // MBlaze misc instructions
 //===----------------------------------------------------------------------===//
 
-let addr = 0 in {
-    def NOP :  TADDR<0x00, (outs), (ins), "nop    ", [], IIAlu>;
+let neverHasSideEffects = 1 in {
+  def NOP :  MBlazeInst< 0x20, FRRR, (outs), (ins), "nop    ", [], IIAlu>;
 }
 
 let usesCustomInserter = 1 in {
-  //class PseudoSelCC<RegisterClass RC, string asmstr>:
-  //  MBlazePseudo<(outs RC:$D), (ins RC:$T, RC:$F, CPURegs:$CMP), asmstr,
-  //  [(set RC:$D, (MBlazeSelectCC RC:$T, RC:$F, CPURegs:$CMP))]>;
-  //def Select_CC : PseudoSelCC<CPURegs, "# MBlazeSelect_CC">;
-
   def Select_CC : MBlazePseudo<(outs CPURegs:$dst),
     (ins CPURegs:$T, CPURegs:$F, CPURegs:$CMP, i32imm:$CC),
     "; SELECT_CC PSEUDO!",
@@ -512,20 +501,24 @@
 
 
 let rb = 0 in {
-    def SEXT16 : TA<0x24, 0x061, (outs CPURegs:$dst), (ins CPURegs:$src),
-                    "sext16  $dst, $src", [], IIAlu>;
-    def SEXT8  : TA<0x24, 0x060, (outs CPURegs:$dst), (ins CPURegs:$src),
-                    "sext8   $dst, $src", [], IIAlu>;
-    def SRL    : TA<0x24, 0x041, (outs CPURegs:$dst), (ins CPURegs:$src),
-                    "srl     $dst, $src", [], IIAlu>;
-    def SRA    : TA<0x24, 0x001, (outs CPURegs:$dst), (ins CPURegs:$src),
-                    "sra     $dst, $src", [], IIAlu>;
-    def SRC    : TA<0x24, 0x021, (outs CPURegs:$dst), (ins CPURegs:$src),
-                    "src     $dst, $src", [], IIAlu>;
+  def SEXT16 : TA<0x24, 0x061, (outs CPURegs:$dst), (ins CPURegs:$src),
+                  "sext16  $dst, $src", [], IIAlu>;
+  def SEXT8  : TA<0x24, 0x060, (outs CPURegs:$dst), (ins CPURegs:$src),
+                  "sext8   $dst, $src", [], IIAlu>;
+  def SRL    : TA<0x24, 0x041, (outs CPURegs:$dst), (ins CPURegs:$src),
+                  "srl     $dst, $src", [], IIAlu>;
+  def SRA    : TA<0x24, 0x001, (outs CPURegs:$dst), (ins CPURegs:$src),
+                  "sra     $dst, $src", [], IIAlu>;
+  def SRC    : TA<0x24, 0x021, (outs CPURegs:$dst), (ins CPURegs:$src),
+                  "src     $dst, $src", [], IIAlu>;
+}
+
+let opcode=0x08 in {
+  def LEA_ADDI : TB<0x08, (outs CPURegs:$dst), (ins memri:$addr),
+                    "addi    $dst, ${addr:stackloc}",
+                    [(set CPURegs:$dst, iaddr:$addr)], IIAlu>;
 }
 
-def LEA_ADDI : EffectiveAddress<"addi    $dst, ${addr:stackloc}">;
-
 //===----------------------------------------------------------------------===//
 //  Arbitrary patterns that map to one or more instructions
 //===----------------------------------------------------------------------===//
@@ -610,6 +603,10 @@
 def : Pat<(selectcc CPURegs:$L, CPURegs:$R, CPURegs:$T, CPURegs:$F, SETULE),
           (Select_CC CPURegs:$T, CPURegs:$F, (CMPU CPURegs:$L, CPURegs:$R), 6)>;
 
+// BR instructions
+def : Pat<(br bb:$T), (BRID bb:$T)>;
+def : Pat<(brind CPURegs:$T), (BRD CPURegs:$T)>;
+
 // BRCOND instructions
 def : Pat<(brcond (setcc CPURegs:$L, CPURegs:$R, SETEQ), bb:$T),
           (BEQID (CMP CPURegs:$R, CPURegs:$L), bb:$T)>;

Added: llvm/trunk/lib/Target/MBlaze/MBlazeMCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeMCCodeEmitter.cpp?rev=116993&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeMCCodeEmitter.cpp (added)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeMCCodeEmitter.cpp Wed Oct 20 22:57:26 2010
@@ -0,0 +1,235 @@
+//===-- MBlazeMCCodeEmitter.cpp - Convert MBlaze code to machine code -----===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file implements the MBlazeMCCodeEmitter class.
+//
+//===----------------------------------------------------------------------===//
+
+#define DEBUG_TYPE "mblaze-emitter"
+#include "MBlaze.h"
+#include "MBlazeInstrInfo.h"
+#include "MBlazeFixupKinds.h"
+#include "llvm/MC/MCCodeEmitter.h"
+#include "llvm/MC/MCExpr.h"
+#include "llvm/MC/MCInst.h"
+#include "llvm/MC/MCSymbol.h"
+#include "llvm/MC/MCFixup.h"
+#include "llvm/ADT/Statistic.h"
+#include "llvm/Support/raw_ostream.h"
+using namespace llvm;
+
+STATISTIC(MCNumEmitted, "Number of MC instructions emitted");
+
+namespace {
+class MBlazeMCCodeEmitter : public MCCodeEmitter {
+  MBlazeMCCodeEmitter(const MBlazeMCCodeEmitter &); // DO NOT IMPLEMENT
+  void operator=(const MBlazeMCCodeEmitter &); // DO NOT IMPLEMENT
+  const TargetMachine &TM;
+  const TargetInstrInfo &TII;
+  MCContext &Ctx;
+
+public:
+  MBlazeMCCodeEmitter(TargetMachine &tm, MCContext &ctx)
+    : TM(tm), TII(*TM.getInstrInfo()), Ctx(ctx) {
+  }
+
+  ~MBlazeMCCodeEmitter() {}
+
+  // getBinaryCodeForInstr - TableGen'erated function for getting the
+  // binary encoding for an instruction.
+  unsigned getBinaryCodeForInstr(const MCInst &MI) const;
+
+  /// getMachineOpValue - Return binary encoding of operand. If the machine
+  /// operand requires relocation, record the relocation and return zero.
+  unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO) const;
+  unsigned getMachineOpValue(const MCInst &MI, unsigned OpIdx) const {
+    return getMachineOpValue(MI, MI.getOperand(OpIdx));
+  }
+
+  unsigned getNumFixupKinds() const {
+    return 2;
+  }
+
+  const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const {
+    const static MCFixupKindInfo Infos[] = {
+      { "reloc_pcrel_4byte", 0, 4 * 8, MCFixupKindInfo::FKF_IsPCRel },
+      { "reloc_pcrel_2byte", 0, 2 * 8, MCFixupKindInfo::FKF_IsPCRel } };
+
+    if (Kind < FirstTargetFixupKind)
+      return MCCodeEmitter::getFixupKindInfo(Kind);
+
+    if (unsigned(Kind-FirstTargetFixupKind) < getNumFixupKinds())
+      return Infos[Kind - FirstTargetFixupKind];
+
+    assert(0 && "Invalid fixup kind.");
+    return Infos[0];
+  }
+
+  static unsigned GetMBlazeRegNum(const MCOperand &MO) {
+    // FIXME: getMBlazeRegisterNumbering() is sufficient?
+    assert(0 && "MBlazeMCCodeEmitter::GetMBlazeRegNum() not yet implemented.");
+    return 0;
+  }
+
+  void EmitByte(unsigned char C, unsigned &CurByte, raw_ostream &OS) const {
+    // The MicroBlaze uses a bit reversed format so we need to reverse the
+    // order of the bits. Taken from:
+    // http://graphics.stanford.edu/~seander/bithacks.html
+    C = ((C * 0x80200802ULL) & 0x0884422110ULL) * 0x0101010101ULL >> 32;
+
+    OS << (char)C;
+    ++CurByte;
+  }
+
+  void EmitRawByte(unsigned char C, unsigned &CurByte, raw_ostream &OS) const {
+    OS << (char)C;
+    ++CurByte;
+  }
+
+  void EmitConstant(uint64_t Val, unsigned Size, unsigned &CurByte,
+                    raw_ostream &OS) const {
+    assert(Size <= 8 && "size too big in emit constant" );
+
+    for (unsigned i = 0; i != Size; ++i) {
+      EmitByte(Val & 255, CurByte, OS);
+      Val >>= 8;
+    }
+  }
+
+  void EmitIMM(const MCOperand &imm, unsigned &CurByte, raw_ostream &OS) const;
+
+  void EmitImmediate(const MCInst &MI,
+                     unsigned opNo, MCFixupKind FixupKind,
+                     unsigned &CurByte, raw_ostream &OS,
+                     SmallVectorImpl<MCFixup> &Fixups) const;
+
+  void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
+                         SmallVectorImpl<MCFixup> &Fixups) const;
+};
+
+} // end anonymous namespace
+
+
+MCCodeEmitter *llvm::createMBlazeMCCodeEmitter(const Target &,
+                                               TargetMachine &TM,
+                                               MCContext &Ctx) {
+  return new MBlazeMCCodeEmitter(TM, Ctx);
+}
+
+/// getMachineOpValue - Return binary encoding of operand. If the machine
+/// operand requires relocation, record the relocation and return zero.
+unsigned MBlazeMCCodeEmitter::getMachineOpValue(const MCInst &MI,
+                                             const MCOperand &MO) const {
+  if (MO.isReg())
+    return MBlazeRegisterInfo::getRegisterNumbering(MO.getReg());
+  else if (MO.isImm())
+    return static_cast<unsigned>(MO.getImm());
+  else if (MO.isExpr() )
+      return 0; // The relocation has already been recorded at this point.
+  else {
+#ifndef NDEBUG
+    errs() << MO;
+#endif
+    llvm_unreachable(0);
+  }
+  return 0;
+}
+
+void MBlazeMCCodeEmitter::
+EmitIMM(const MCOperand &imm, unsigned &CurByte, raw_ostream &OS) const {
+  int32_t val = (int32_t)imm.getImm();
+  if (val > 32767 || val < -32678 ) {
+    EmitByte(0x0D, CurByte, OS);
+    EmitByte(0x00, CurByte, OS);
+    EmitRawByte((val >> 24) & 0xFF, CurByte, OS);
+    EmitRawByte((val >> 16) & 0xFF, CurByte, OS);
+  }
+}
+
+void MBlazeMCCodeEmitter::
+EmitImmediate(const MCInst &MI, unsigned opNo, MCFixupKind FixupKind,
+              unsigned &CurByte, raw_ostream &OS,
+              SmallVectorImpl<MCFixup> &Fixups) const {
+  assert( MI.getNumOperands()>opNo && "Not enought operands for instruction" );
+
+  MCOperand oper = MI.getOperand(opNo);
+  if (oper.isImm()) {
+      EmitIMM( oper, CurByte, OS );
+  } else if (oper.isExpr()) {
+      Fixups.push_back(MCFixup::Create(0,oper.getExpr(),FixupKind));
+  }
+}
+
+void MBlazeMCCodeEmitter::
+EncodeInstruction(const MCInst &MI, raw_ostream &OS,
+                  SmallVectorImpl<MCFixup> &Fixups) const {
+  unsigned Opcode = MI.getOpcode();
+  const TargetInstrDesc &Desc = TII.get(Opcode);
+  uint64_t TSFlags = Desc.TSFlags;
+  // Keep track of the current byte being emitted.
+  unsigned CurByte = 0;
+
+  switch ((TSFlags & MBlazeII::FormMask)) {
+  default: break;
+  case MBlazeII::Pseudo:
+    // Pseudo instructions don't get encoded.
+    return;
+
+  case MBlazeII::RegRegImm:
+    EmitImmediate( MI, 2, FK_Data_4, CurByte, OS, Fixups );
+    break;
+
+  case MBlazeII::RegImmReg:
+    EmitImmediate( MI, 1, FK_Data_4, CurByte, OS, Fixups );
+    break;
+
+  case MBlazeII::RegImm:
+    EmitImmediate( MI, 1, MCFixupKind(MBlaze::reloc_pcrel_2byte), CurByte, OS,
+                   Fixups );
+    break;
+
+  case MBlazeII::Imm:
+    EmitImmediate( MI, 0, MCFixupKind(MBlaze::reloc_pcrel_4byte), CurByte, OS,
+                   Fixups );
+    break;
+  }
+
+  ++MCNumEmitted;  // Keep track of the # of mi's emitted
+  unsigned Value = getBinaryCodeForInstr(MI);
+  switch (Opcode) {
+  default:
+    EmitConstant(Value, 4, CurByte, OS);
+    break;
+
+  case MBlaze::BRI:
+  case MBlaze::BRAI:
+  case MBlaze::BRID:
+  case MBlaze::BRAID:
+  case MBlaze::BRLID:
+  case MBlaze::BRALID:
+    MCOperand op = MI.getOperand(0);
+    if (op.isExpr()) {
+        EmitByte(0x0D, CurByte, OS);
+        EmitByte(0x00, CurByte, OS);
+        EmitRawByte(0, CurByte, OS);
+        EmitRawByte(0, CurByte, OS);
+    }
+    EmitConstant(Value, 4, CurByte, OS);
+    break;
+  }
+}
+
+// FIXME: These #defines shouldn't be necessary. Instead, tblgen should
+// be able to generate code emitter helpers for either variant, like it
+// does for the AsmWriter.
+#define MBlazeCodeEmitter MBlazeMCCodeEmitter
+#define MachineInstr MCInst
+#include "MBlazeGenCodeEmitter.inc"
+#undef MBlazeCodeEmitter
+#undef MachineInstr

Added: llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.cpp?rev=116993&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.cpp (added)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.cpp Wed Oct 20 22:57:26 2010
@@ -0,0 +1,174 @@
+//===-- MBLazeMCInstLower.cpp - Convert MBlaze MachineInstr to an MCInst---===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file contains code to lower MBlaze MachineInstrs to their corresponding
+// MCInst records.
+//
+//===----------------------------------------------------------------------===//
+
+#include "MBlazeMCInstLower.h"
+#include "MBlazeInstrInfo.h"
+#include "llvm/Constants.h"
+#include "llvm/CodeGen/AsmPrinter.h"
+#include "llvm/CodeGen/MachineBasicBlock.h"
+#include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/MC/MCAsmInfo.h"
+#include "llvm/MC/MCContext.h"
+#include "llvm/MC/MCExpr.h"
+#include "llvm/MC/MCInst.h"
+#include "llvm/Target/Mangler.h"
+#include "llvm/Support/Debug.h"
+#include "llvm/Support/raw_ostream.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/ADT/SmallString.h"
+using namespace llvm;
+
+MCSymbol *MBlazeMCInstLower::
+GetGlobalAddressSymbol(const MachineOperand &MO) const {
+  switch (MO.getTargetFlags()) {
+  default: 
+      llvm_unreachable("Unknown target flag on GV operand");
+
+  case 0: break;
+  }
+
+  return Printer.Mang->getSymbol(MO.getGlobal());
+}
+
+MCSymbol *MBlazeMCInstLower::
+GetExternalSymbolSymbol(const MachineOperand &MO) const {
+  switch (MO.getTargetFlags()) {
+  default:
+      assert(0 && "Unknown target flag on GV operand");
+
+  case 0: break;
+  }
+
+  return Printer.GetExternalSymbolSymbol(MO.getSymbolName());
+}
+
+MCSymbol *MBlazeMCInstLower::
+GetJumpTableSymbol(const MachineOperand &MO) const {
+  SmallString<256> Name;
+  raw_svector_ostream(Name) << Printer.MAI->getPrivateGlobalPrefix() << "JTI"
+                            << Printer.getFunctionNumber() << '_'
+                            << MO.getIndex();
+
+  switch (MO.getTargetFlags()) {
+  default:
+      llvm_unreachable("Unknown target flag on GV operand");
+
+  case 0: break;
+  }
+
+  // Create a symbol for the name.
+  return Ctx.GetOrCreateSymbol(Name.str());
+}
+
+MCSymbol *MBlazeMCInstLower::
+GetConstantPoolIndexSymbol(const MachineOperand &MO) const {
+  SmallString<256> Name;
+  raw_svector_ostream(Name) << Printer.MAI->getPrivateGlobalPrefix() << "CPI"
+                            << Printer.getFunctionNumber() << '_'
+                            << MO.getIndex();
+
+  switch (MO.getTargetFlags()) {
+  default:
+      llvm_unreachable("Unknown target flag on GV operand");
+
+  case 0: break;
+  }
+
+  // Create a symbol for the name.
+  return Ctx.GetOrCreateSymbol(Name.str());
+}
+
+MCSymbol *MBlazeMCInstLower::
+GetBlockAddressSymbol(const MachineOperand &MO) const {
+  switch (MO.getTargetFlags()) {
+  default:
+      assert(0 && "Unknown target flag on GV operand");
+
+  case 0: break;
+  }
+
+  return Printer.GetBlockAddressSymbol(MO.getBlockAddress());
+}
+
+MCOperand MBlazeMCInstLower::
+LowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym) const {
+  // FIXME: We would like an efficient form for this, so we don't have to do a
+  // lot of extra uniquing.
+  const MCExpr *Expr = MCSymbolRefExpr::Create(Sym, Ctx);
+
+  switch (MO.getTargetFlags()) {
+  default:
+      llvm_unreachable("Unknown target flag on GV operand");
+
+  case 0: break;
+  }
+
+  if (!MO.isJTI() && MO.getOffset())
+    Expr = MCBinaryExpr::CreateAdd(Expr,
+                                   MCConstantExpr::Create(MO.getOffset(), Ctx),
+                                   Ctx);
+  return MCOperand::CreateExpr(Expr);
+}
+
+void MBlazeMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
+  OutMI.setOpcode(MI->getOpcode());
+
+  for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
+    const MachineOperand &MO = MI->getOperand(i);
+
+    MCOperand MCOp;
+    switch (MO.getType()) {
+    default:
+      assert(0 && "unknown operand type");
+    case MachineOperand::MO_Register:
+      // Ignore all implicit register operands.
+      if (MO.isImplicit()) continue;
+      MCOp = MCOperand::CreateReg(MO.getReg());
+      break;
+    case MachineOperand::MO_Immediate:
+      MCOp = MCOperand::CreateImm(MO.getImm());
+      break;
+    case MachineOperand::MO_MachineBasicBlock:
+      MCOp = MCOperand::CreateExpr(MCSymbolRefExpr::Create(
+                         MO.getMBB()->getSymbol(), Ctx));
+      break;
+    case MachineOperand::MO_GlobalAddress:
+      MCOp = LowerSymbolOperand(MO, GetGlobalAddressSymbol(MO));
+      break;
+    case MachineOperand::MO_ExternalSymbol:
+      MCOp = LowerSymbolOperand(MO, GetExternalSymbolSymbol(MO));
+      break;
+    case MachineOperand::MO_JumpTableIndex:
+      MCOp = LowerSymbolOperand(MO, GetJumpTableSymbol(MO));
+      break;
+    case MachineOperand::MO_ConstantPoolIndex:
+      MCOp = LowerSymbolOperand(MO, GetConstantPoolIndexSymbol(MO));
+      break;
+    case MachineOperand::MO_BlockAddress:
+      MCOp = LowerSymbolOperand(MO, GetBlockAddressSymbol(MO));
+      break;
+    case MachineOperand::MO_FPImmediate:
+      bool ignored;
+      APFloat FVal = MO.getFPImm()->getValueAPF();
+      FVal.convert(APFloat::IEEEsingle, APFloat::rmTowardZero, &ignored);
+
+      APInt IVal = FVal.bitcastToAPInt();
+      uint64_t Val = *IVal.getRawData();
+      MCOp = MCOperand::CreateImm(Val);
+      break;
+    }
+
+    OutMI.addOperand(MCOp);
+  }
+}

Added: llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.h?rev=116993&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.h (added)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeMCInstLower.h Wed Oct 20 22:57:26 2010
@@ -0,0 +1,50 @@
+//===-- MBlazeMCInstLower.h - Lower MachineInstr to MCInst ----------------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef MBLAZE_MCINSTLOWER_H
+#define MBLAZE_MCINSTLOWER_H
+
+#include "llvm/Support/Compiler.h"
+
+namespace llvm {
+  class AsmPrinter;
+  class MCAsmInfo;
+  class MCContext;
+  class MCInst;
+  class MCOperand;
+  class MCSymbol;
+  class MachineInstr;
+  class MachineModuleInfoMachO;
+  class MachineOperand;
+  class Mangler;
+
+  /// MBlazeMCInstLower - This class is used to lower an MachineInstr
+  /// into an MCInst.
+class LLVM_LIBRARY_VISIBILITY MBlazeMCInstLower {
+  MCContext &Ctx;
+  Mangler &Mang;
+
+  AsmPrinter &Printer;
+public:
+  MBlazeMCInstLower(MCContext &ctx, Mangler &mang, AsmPrinter &printer)
+    : Ctx(ctx), Mang(mang), Printer(printer) {}
+  void Lower(const MachineInstr *MI, MCInst &OutMI) const;
+
+  MCOperand LowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym) const;
+
+  MCSymbol *GetGlobalAddressSymbol(const MachineOperand &MO) const;
+  MCSymbol *GetExternalSymbolSymbol(const MachineOperand &MO) const;
+  MCSymbol *GetJumpTableSymbol(const MachineOperand &MO) const;
+  MCSymbol *GetConstantPoolIndexSymbol(const MachineOperand &MO) const;
+  MCSymbol *GetBlockAddressSymbol(const MachineOperand &MO) const;
+};
+
+}
+
+#endif

Added: llvm/trunk/lib/Target/MBlaze/MBlazeRelocations.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeRelocations.h?rev=116993&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeRelocations.h (added)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeRelocations.h Wed Oct 20 22:57:26 2010
@@ -0,0 +1,47 @@
+//===- MBlazeRelocations.h - MBlaze Code Relocations ------------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines the MBlaze target-specific relocation types.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef MBLAZERELOCATIONS_H
+#define MBLAZERELOCATIONS_H
+
+#include "llvm/CodeGen/MachineRelocation.h"
+
+namespace llvm {
+  namespace MBlaze {
+    enum RelocationType {
+      /// reloc_pcrel_word - PC relative relocation, add the relocated value to
+      /// the value already in memory, after we adjust it for where the PC is.
+      reloc_pcrel_word = 0,
+
+      /// reloc_picrel_word - PIC base relative relocation, add the relocated
+      /// value to the value already in memory, after we adjust it for where the
+      /// PIC base is.
+      reloc_picrel_word = 1,
+
+      /// reloc_absolute_word - absolute relocation, just add the relocated
+      /// value to the value already in memory.
+      reloc_absolute_word = 2,
+
+      /// reloc_absolute_word_sext - absolute relocation, just add the relocated
+      /// value to the value already in memory. In object files, it represents a
+      /// value which must be sign-extended when resolving the relocation.
+      reloc_absolute_word_sext = 3,
+
+      /// reloc_absolute_dword - absolute relocation, just add the relocated
+      /// value to the value already in memory.
+      reloc_absolute_dword = 4
+    };
+  }
+}
+
+#endif

Modified: llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.cpp?rev=116993&r1=116992&r2=116993&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.cpp Wed Oct 20 22:57:26 2010
@@ -15,13 +15,51 @@
 #include "MBlazeMCAsmInfo.h"
 #include "MBlazeTargetMachine.h"
 #include "llvm/PassManager.h"
+#include "llvm/CodeGen/Passes.h"
+#include "llvm/Support/FormattedStream.h"
+#include "llvm/Target/TargetOptions.h"
 #include "llvm/Target/TargetRegistry.h"
 using namespace llvm;
 
+static MCStreamer *createMCStreamer(const Target &T, const std::string &TT,
+                                    MCContext &Ctx, TargetAsmBackend &TAB,
+                                    raw_ostream &_OS,
+                                    MCCodeEmitter *_Emitter,
+                                    bool RelaxAll) {
+  Triple TheTriple(TT);
+  switch (TheTriple.getOS()) {
+  case Triple::Darwin:
+    llvm_unreachable("MBlaze does not support Darwin MACH-O format");
+    return NULL;
+  case Triple::MinGW32:
+  case Triple::MinGW64:
+  case Triple::Cygwin:
+  case Triple::Win32:
+    llvm_unreachable("ARM does not support Windows COFF format");
+    return NULL;
+  default:
+    return createELFStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll);
+  }
+}
+
+
 extern "C" void LLVMInitializeMBlazeTarget() {
   // Register the target.
   RegisterTargetMachine<MBlazeTargetMachine> X(TheMBlazeTarget);
   RegisterAsmInfo<MBlazeMCAsmInfo> A(TheMBlazeTarget);
+
+  // Register the MC code emitter
+  TargetRegistry::RegisterCodeEmitter(TheMBlazeTarget,
+                                      llvm::createMBlazeMCCodeEmitter);
+  
+  // Register the asm backend
+  TargetRegistry::RegisterAsmBackend(TheMBlazeTarget,
+                                     createMBlazeAsmBackend);
+
+  // Register the object streamer
+  TargetRegistry::RegisterObjectStreamer(TheMBlazeTarget,
+                                         createMCStreamer);
+
 }
 
 // DataLayout --> Big-endian, 32-bit pointer/ABI/alignment
@@ -39,7 +77,7 @@
              "f64:32:32-v64:32:32-v128:32:32-n32"),
   InstrInfo(*this),
   FrameInfo(TargetFrameInfo::StackGrowsUp, 8, 0),
-  TLInfo(*this), TSInfo(*this) {
+  TLInfo(*this), TSInfo(*this), ELFWriterInfo(*this) {
   if (getRelocationModel() == Reloc::Default) {
       setRelocationModel(Reloc::Static);
   }

Modified: llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.h?rev=116993&r1=116992&r2=116993&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.h (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.h Wed Oct 20 22:57:26 2010
@@ -19,6 +19,8 @@
 #include "MBlazeISelLowering.h"
 #include "MBlazeSelectionDAGInfo.h"
 #include "MBlazeIntrinsicInfo.h"
+#include "MBlazeELFWriterInfo.h"
+#include "llvm/MC/MCStreamer.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/TargetData.h"
 #include "llvm/Target/TargetFrameInfo.h"
@@ -34,6 +36,7 @@
     MBlazeTargetLowering  TLInfo;
     MBlazeSelectionDAGInfo TSInfo;
     MBlazeIntrinsicInfo IntrinsicInfo;
+    MBlazeELFWriterInfo    ELFWriterInfo;
   public:
     MBlazeTargetMachine(const Target &T, const std::string &TT,
                       const std::string &FS);
@@ -62,6 +65,10 @@
     const TargetIntrinsicInfo *getIntrinsicInfo() const
     { return &IntrinsicInfo; }
 
+    virtual const MBlazeELFWriterInfo *getELFWriterInfo() const {
+      return &ELFWriterInfo;
+    }
+
     // Pass Pipeline Configuration
     virtual bool addInstSelector(PassManagerBase &PM,
                                  CodeGenOpt::Level OptLevel);

Modified: llvm/trunk/lib/Target/MBlaze/Makefile
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/Makefile?rev=116993&r1=116992&r2=116993&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/Makefile (original)
+++ llvm/trunk/lib/Target/MBlaze/Makefile Wed Oct 20 22:57:26 2010
@@ -14,10 +14,11 @@
 BUILT_SOURCES = MBlazeGenRegisterInfo.h.inc MBlazeGenRegisterNames.inc \
                 MBlazeGenRegisterInfo.inc MBlazeGenInstrNames.inc \
                 MBlazeGenInstrInfo.inc MBlazeGenAsmWriter.inc \
-                MBlazeGenDAGISel.inc MBlazeGenCallingConv.inc \
+                MBlazeGenDAGISel.inc \
+		MBlazeGenCodeEmitter.inc MBlazeGenCallingConv.inc \
                 MBlazeGenSubtarget.inc MBlazeGenIntrinsics.inc
 
-DIRS = AsmPrinter TargetInfo
+DIRS = InstPrinter TargetInfo
 
 include $(LEVEL)/Makefile.common
 

Added: llvm/trunk/lib/Target/MBlaze/TODO
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/TODO?rev=116993&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/TODO (added)
+++ llvm/trunk/lib/Target/MBlaze/TODO Wed Oct 20 22:57:26 2010
@@ -0,0 +1,26 @@
+* Writing out ELF files is close to working but the following needs to
+  be examined more closely:
+    - ELF files are written with the wrong E_MACHINE value because
+      ELFObjectWriter::WriteHeader function does not yet support
+      target specific E_MACHINE values.
+    - ELF relocation records are incorrect because the function
+      ELFObjectWriter::RecordRelocation is hard coded for X86/X86-64.
+    - Relocations use 2-byte / 4-byte to terminology in reference to
+      the size of the immediate value being changed. The Xilinx
+      terminology seems to be (???) 4-byte / 8-byte in reference
+      to the number of bytes of instructions that are being changed.
+    - BRLID and like instructions are always assumed to use a 4-byte
+      immediate value for the relocation and BEQID and like instructions
+      are always assumed to use a 2-byte immediate value for the relocation.
+      I think this means that conditional branches like BEQID can only
+      branch += 32768 bytes (~8192 instructions). We should allow conditional
+      branches to use 4-byte relocations but I'm not sure how to do that
+      right now.
+
+* Code generation seems to work relatively well now but the following
+  needs to be examined more closely:
+    - The stack layout needs to be examined to make sure it meets
+      the standard, especially in regards to var arg functions.
+    - The delay slot filler is ad hoc but seems to work. Load and
+      store instructions were prevented from being moved to delay
+      slots but I'm not sure that is necessary.

Modified: llvm/trunk/lib/Target/MBlaze/TargetInfo/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/TargetInfo/CMakeLists.txt?rev=116993&r1=116992&r2=116993&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/TargetInfo/CMakeLists.txt (original)
+++ llvm/trunk/lib/Target/MBlaze/TargetInfo/CMakeLists.txt Wed Oct 20 22:57:26 2010
@@ -1,4 +1,5 @@
-include_directories( ${CMAKE_CURRENT_BINARY_DIR}/.. ${CMAKE_CURRENT_SOURCE_DIR}/.. )
+include_directories( ${CMAKE_CURRENT_BINARY_DIR}/.. 
+                     ${CMAKE_CURRENT_SOURCE_DIR}/.. )
 
 add_llvm_library(LLVMMBlazeInfo
   MBlazeTargetInfo.cpp

Modified: llvm/trunk/test/CodeGen/MBlaze/brind.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MBlaze/brind.ll?rev=116993&r1=116992&r2=116993&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MBlaze/brind.ll (original)
+++ llvm/trunk/test/CodeGen/MBlaze/brind.ll Wed Oct 20 22:57:26 2010
@@ -28,32 +28,31 @@
                              label %L3,
                              label %L4,
                              label %L5 ]
-    ; CHECK:        br {{r[0-9]*}}
+    ; CHECK:        brd {{r[0-9]*}}
 
 L1:
     %tmp.1 = add i32 %a, %b
     br label %finish
-    ; CHECK:        br
+    ; CHECK:        brid
 
 L2:
     %tmp.2 = sub i32 %a, %b
     br label %finish
-    ; CHECK:        br
+    ; CHECK:        brid
 
 L3:
     %tmp.3 = mul i32 %a, %b
     br label %finish
-    ; CHECK:        br
+    ; CHECK:        brid
 
 L4:
     %tmp.4 = sdiv i32 %a, %b
     br label %finish
-    ; CHECK:        br
+    ; CHECK:        brid
 
 L5:
     %tmp.5 = srem i32 %a, %b
     br label %finish
-    ; CHECK:        br
 
 finish:
     %tmp.6 = phi i32 [ %tmp.1, %L1 ],
@@ -69,5 +68,5 @@
     %tmp.8 = urem i32 %tmp.7, 5
 
     br label %loop
-    ; CHECK:        br
+    ; CHECK:        brid
 }

Modified: llvm/trunk/test/CodeGen/MBlaze/cc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MBlaze/cc.ll?rev=116993&r1=116992&r2=116993&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MBlaze/cc.ll (original)
+++ llvm/trunk/test/CodeGen/MBlaze/cc.ll Wed Oct 20 22:57:26 2010
@@ -12,7 +12,7 @@
 define void @params0_noret() {
     ; CHECK:        params0_noret:
     ret void
-    ; CHECK-NOT:    {{.* r3, r0, 1}}
+    ; CHECK-NOT:    {{.* r3, .*, .*}}
     ; CHECK-NOT:    {{.* r4, .*, .*}}
     ; CHECK:        rtsd
 }
@@ -20,81 +20,88 @@
 define i8 @params0_8bitret() {
     ; CHECK:        params0_8bitret:
     ret i8 1
-    ; CHECK:        {{.* r3, r0, 1}}
+    ; CHECK-NOT:    {{.* r3, .*, .*}}
     ; CHECK-NOT:    {{.* r4, .*, .*}}
     ; CHECK:        rtsd
+    ; CHECK:        {{.* r3, r0, 1}}
 }
 
 define i16 @params0_16bitret() {
     ; CHECK:        params0_16bitret:
     ret i16 1
+    ; CHECK:        rtsd
     ; CHECK:        {{.* r3, r0, 1}}
     ; CHECK-NOT:    {{.* r4, .*, .*}}
-    ; CHECK:        rtsd
 }
 
 define i32 @params0_32bitret() {
     ; CHECK:        params0_32bitret:
     ret i32 1
-    ; CHECK:        {{.* r3, r0, 1}}
     ; CHECK-NOT:    {{.* r4, .*, .*}}
     ; CHECK:        rtsd
+    ; CHECK:        {{.* r3, r0, 1}}
 }
 
 define i64 @params0_64bitret() {
     ; CHECK:        params0_64bitret:
     ret i64 1
     ; CHECK:        {{.* r3, r0, .*}}
-    ; CHECK:        {{.* r4, r0, 1}}
     ; CHECK:        rtsd
+    ; CHECK:        {{.* r4, r0, 1}}
 }
 
 define i32 @params1_32bitret(i32 %a) {
     ; CHECK:        params1_32bitret:
     ret i32 %a
-    ; CHECK:        {{.* r3, r5, r0}}
+    ; CHECK-NOT:    {{.* r3, .*, .*}}
     ; CHECK-NOT:    {{.* r4, .*, .*}}
     ; CHECK:        rtsd
+    ; CHECK:        {{.* r3, r5, r0}}
 }
 
 define i32 @params2_32bitret(i32 %a, i32 %b) {
     ; CHECK:        params2_32bitret:
     ret i32 %b
-    ; CHECK:        {{.* r3, r6, r0}}
+    ; CHECK-NOT:    {{.* r3, .*, .*}}
     ; CHECK-NOT:    {{.* r4, .*, .*}}
     ; CHECK:        rtsd
+    ; CHECK:        {{.* r3, r6, r0}}
 }
 
 define i32 @params3_32bitret(i32 %a, i32 %b, i32 %c) {
     ; CHECK:        params3_32bitret:
     ret i32 %c
-    ; CHECK:        {{.* r3, r7, r0}}
+    ; CHECK-NOT:    {{.* r3, .*, .*}}
     ; CHECK-NOT:    {{.* r4, .*, .*}}
     ; CHECK:        rtsd
+    ; CHECK:        {{.* r3, r7, r0}}
 }
 
 define i32 @params4_32bitret(i32 %a, i32 %b, i32 %c, i32 %d) {
     ; CHECK:        params4_32bitret:
     ret i32 %d
-    ; CHECK:        {{.* r3, r8, r0}}
+    ; CHECK-NOT:    {{.* r3, .*, .*}}
     ; CHECK-NOT:    {{.* r4, .*, .*}}
     ; CHECK:        rtsd
+    ; CHECK:        {{.* r3, r8, r0}}
 }
 
 define i32 @params5_32bitret(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e) {
     ; CHECK:        params5_32bitret:
     ret i32 %e
-    ; CHECK:        {{.* r3, r9, r0}}
+    ; CHECK-NOT:    {{.* r3, .*, .*}}
     ; CHECK-NOT:    {{.* r4, .*, .*}}
     ; CHECK:        rtsd
+    ; CHECK:        {{.* r3, r9, r0}}
 }
 
 define i32 @params6_32bitret(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f) {
     ; CHECK:        params6_32bitret:
     ret i32 %f
-    ; CHECK:        {{.* r3, r10, r0}}
+    ; CHECK-NOT:    {{.* r3, .*, .*}}
     ; CHECK-NOT:    {{.* r4, .*, .*}}
     ; CHECK:        rtsd
+    ; CHECK:        {{.* r3, r10, r0}}
 }
 
 define i32 @params7_32bitret(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f,
@@ -142,53 +149,29 @@
     %tmp.1 = call i8 @params0_8bitret()
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i8 %tmp.1)
-    ; CHECK:        {{.* r5, .*, .*}}
-    ; CHECK:        {{.* r6, r3, r0}}
-    ; CHECK-NOT:    {{.* r7, .*, .*}}
-    ; CHECK:        brlid
 
     %tmp.2 = call i16 @params0_16bitret()
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i16 %tmp.2)
-    ; CHECK:        {{.* r5, .*, .*}}
-    ; CHECK:        {{.* r6, r3, r0}}
-    ; CHECK-NOT:    {{.* r7, .*, .*}}
-    ; CHECK:        brlid
 
     %tmp.3 = call i32 @params0_32bitret()
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.3)
-    ; CHECK:        {{.* r5, .*, .*}}
-    ; CHECK:        {{.* r6, r3, r0}}
-    ; CHECK-NOT:    {{.* r7, .*, .*}}
-    ; CHECK:        brlid
 
     %tmp.4 = call i64 @params0_64bitret()
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i64 %tmp.4)
-    ; CHECK:        {{.* r5, .*, .*}}
-    ; CHECK:        {{.* r6, r3, r0}}
-    ; CHECK:        {{.* r7, r4, r0}}
-    ; CHECK:        brlid
 
     %tmp.5 = call i32 @params1_32bitret(i32 1)
     ; CHECK:        {{.* r5, .*, .*}}
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.5)
-    ; CHECK:        {{.* r5, .*, .*}}
-    ; CHECK:        {{.* r6, r3, r0}}
-    ; CHECK-NOT:    {{.* r7, .*, .*}}
-    ; CHECK:        brlid
 
     %tmp.6 = call i32 @params2_32bitret(i32 1, i32 2)
     ; CHECK:        {{.* r5, .*, .*}}
     ; CHECK:        {{.* r6, .*, .*}}
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.6)
-    ; CHECK:        {{.* r5, .*, .*}}
-    ; CHECK:        {{.* r6, r3, r0}}
-    ; CHECK-NOT:    {{.* r7, .*, .*}}
-    ; CHECK:        brlid
 
     %tmp.7 = call i32 @params3_32bitret(i32 1, i32 2, i32 3)
     ; CHECK:        {{.* r5, .*, .*}}
@@ -196,10 +179,6 @@
     ; CHECK:        {{.* r7, .*, .*}}
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.7)
-    ; CHECK:        {{.* r5, .*, .*}}
-    ; CHECK:        {{.* r6, r3, r0}}
-    ; CHECK-NOT:    {{.* r7, .*, .*}}
-    ; CHECK:        brlid
 
     %tmp.8 = call i32 @params4_32bitret(i32 1, i32 2, i32 3, i32 4)
     ; CHECK:        {{.* r5, .*, .*}}
@@ -208,10 +187,6 @@
     ; CHECK:        {{.* r8, .*, .*}}
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.8)
-    ; CHECK:        {{.* r5, .*, .*}}
-    ; CHECK:        {{.* r6, r3, r0}}
-    ; CHECK-NOT:    {{.* r7, .*, .*}}
-    ; CHECK:        brlid
 
     %tmp.9 = call i32 @params5_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5)
     ; CHECK:        {{.* r5, .*, .*}}
@@ -221,10 +196,6 @@
     ; CHECK:        {{.* r9, .*, .*}}
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.9)
-    ; CHECK:        {{.* r5, .*, .*}}
-    ; CHECK:        {{.* r6, r3, r0}}
-    ; CHECK-NOT:    {{.* r7, .*, .*}}
-    ; CHECK:        brlid
 
     %tmp.10 = call i32 @params6_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5,
                                          i32 6)
@@ -236,10 +207,6 @@
     ; CHECK:        {{.* r10, .*, .*}}
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.10)
-    ; CHECK:        {{.* r5, .*, .*}}
-    ; CHECK:        {{.* r6, r3, r0}}
-    ; CHECK-NOT:    {{.* r7, .*, .*}}
-    ; CHECK:        brlid
 
     %tmp.11 = call i32 @params7_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5,
                                          i32 6, i32 7)
@@ -252,10 +219,6 @@
     ; CHECK:        {{.* r10, .*, .*}}
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.11)
-    ; CHECK:        {{.* r5, .*, .*}}
-    ; CHECK:        {{.* r6, r3, r0}}
-    ; CHECK-NOT:    {{.* r7, .*, .*}}
-    ; CHECK:        brlid
 
     %tmp.12 = call i32 @params8_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5,
                                          i32 6, i32 7, i32 8)
@@ -269,10 +232,6 @@
     ; CHECK:        {{.* r10, .*, .*}}
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.12)
-    ; CHECK:        {{.* r5, .*, .*}}
-    ; CHECK:        {{.* r6, r3, r0}}
-    ; CHECK-NOT:    {{.* r7, .*, .*}}
-    ; CHECK:        brlid
 
     %tmp.13 = call i32 @params9_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5,
                                          i32 6, i32 7, i32 8, i32 9)
@@ -287,10 +246,6 @@
     ; CHECK:        {{.* r10, .*, .*}}
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.13)
-    ; CHECK:        {{.* r5, .*, .*}}
-    ; CHECK:        {{.* r6, r3, r0}}
-    ; CHECK-NOT:    {{.* r7, .*, .*}}
-    ; CHECK:        brlid
 
     %tmp.14 = call i32 @params10_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5,
                                           i32 6, i32 7, i32 8, i32 9, i32 10)
@@ -306,10 +261,6 @@
     ; CHECK:        {{.* r10, .*, .*}}
     ; CHECK:        brlid
     call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.14)
-    ; CHECK:        {{.* r5, .*, .*}}
-    ; CHECK:        {{.* r6, r3, r0}}
-    ; CHECK-NOT:    {{.* r7, .*, .*}}
-    ; CHECK:        brlid
 
     ret void
 }

Modified: llvm/trunk/test/CodeGen/MBlaze/fpu.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MBlaze/fpu.ll?rev=116993&r1=116992&r2=116993&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MBlaze/fpu.ll (original)
+++ llvm/trunk/test/CodeGen/MBlaze/fpu.ll Wed Oct 20 22:57:26 2010
@@ -10,14 +10,14 @@
     ; FPU:        test_add:
 
     %tmp.1 = fadd float %a, %b
-    ; FUN-NOT:    fadd
     ; FUN:        brlid
     ; FPU-NOT:    brlid
-    ; FPU:        fadd
 
     ret float %tmp.1
     ; FUN:        rtsd
     ; FPU:        rtsd
+    ; FUN-NOT:    fadd
+    ; FPU-NEXT:   fadd
 }
 
 define float @test_sub(float %a, float %b) {
@@ -25,14 +25,14 @@
     ; FPU:        test_sub:
 
     %tmp.1 = fsub float %a, %b
-    ; FUN-NOT:    frsub
     ; FUN:        brlid
     ; FPU-NOT:    brlid
-    ; FPU:        frsub
 
     ret float %tmp.1
     ; FUN:        rtsd
     ; FPU:        rtsd
+    ; FUN-NOT:    frsub
+    ; FPU-NEXT:   frsub
 }
 
 define float @test_mul(float %a, float %b) {
@@ -40,14 +40,14 @@
     ; FPU:        test_mul:
 
     %tmp.1 = fmul float %a, %b
-    ; FUN-NOT:    fmul
     ; FUN:        brlid
     ; FPU-NOT:    brlid
-    ; FPU:        fmul
 
     ret float %tmp.1
     ; FUN:        rtsd
     ; FPU:        rtsd
+    ; FUN-NOT:    fmul
+    ; FPU-NEXT:   fmul
 }
 
 define float @test_div(float %a, float %b) {
@@ -55,12 +55,12 @@
     ; FPU:        test_div:
 
     %tmp.1 = fdiv float %a, %b
-    ; FUN-NOT:    fdiv
     ; FUN:        brlid
     ; FPU-NOT:    brlid
-    ; FPU:        fdiv
 
     ret float %tmp.1
     ; FUN:        rtsd
     ; FPU:        rtsd
+    ; FUN-NOT:    fdiv
+    ; FPU-NEXT:   fdiv
 }

Modified: llvm/trunk/test/CodeGen/MBlaze/imm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MBlaze/imm.ll?rev=116993&r1=116992&r2=116993&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MBlaze/imm.ll (original)
+++ llvm/trunk/test/CodeGen/MBlaze/imm.ll Wed Oct 20 22:57:26 2010
@@ -7,21 +7,21 @@
 
 define i8 @retimm_i8() {
     ; CHECK:        retimm_i8:
-    ; CHECK:        add
-    ; CHECK-NEXT:   rtsd
+    ; CHECK:        rtsd
+    ; CHECK-NEXT:   add
     ; FPU:          retimm_i8:
-    ; FPU:          add
-    ; FPU-NEXT:     rtsd
+    ; FPU:          rtsd
+    ; FPU-NEXT:     add
     ret i8 123
 }
 
 define i16 @retimm_i16() {
     ; CHECK:        retimm_i16:
-    ; CHECK:        add
-    ; CHECK-NEXT:   rtsd
+    ; CHECK:        rtsd
+    ; CHECK-NEXT:   add
     ; FPU:          retimm_i16:
-    ; FPU:          add
-    ; FPU-NEXT:     rtsd
+    ; FPU:          rtsd
+    ; FPU-NEXT:     add
     ret i16 38212
 }
 
@@ -38,12 +38,12 @@
 define i64 @retimm_i64() {
     ; CHECK:        retimm_i64:
     ; CHECK:        add
-    ; CHECK-NEXT:   add
     ; CHECK-NEXT:   rtsd
+    ; CHECK-NEXT:   add
     ; FPU:          retimm_i64:
     ; FPU:          add
-    ; FPU-NEXT:     add
     ; FPU-NEXT:     rtsd
+    ; FPU-NEXT:     add
     ret i64 94581823
 }
 
@@ -53,7 +53,7 @@
     ; CHECK-NEXT:   rtsd
     ; FPU:          retimm_float:
     ; FPU:          or
-    ; FPU:          rtsd
+    ; FPU-NEXT:     rtsd
     ret float 12.0
 }
 

Modified: llvm/trunk/test/CodeGen/MBlaze/jumptable.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MBlaze/jumptable.ll?rev=116993&r1=116992&r2=116993&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MBlaze/jumptable.ll (original)
+++ llvm/trunk/test/CodeGen/MBlaze/jumptable.ll Wed Oct 20 22:57:26 2010
@@ -18,8 +18,8 @@
                                       i32 8, label %L8
                                       i32 9, label %L9 ]
 
-    ; CHECK:        lw [[REG:r[0-9]*]]
-    ; CHECK:        br [[REG]]
+    ; CHECK:        lw  [[REG:r[0-9]*]]
+    ; CHECK:        brd [[REG]]
 L0:
     %var0 = add i32 %arg, 0
     br label %DONE

Modified: llvm/trunk/test/CodeGen/MBlaze/mul.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MBlaze/mul.ll?rev=116993&r1=116992&r2=116993&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MBlaze/mul.ll (original)
+++ llvm/trunk/test/CodeGen/MBlaze/mul.ll Wed Oct 20 22:57:26 2010
@@ -13,11 +13,11 @@
     ; FUN-NOT:    mul
     ; FUN:        brlid
     ; MUL-NOT:    brlid
-    ; MUL:        mul
 
     ret i8 %tmp.1
     ; FUN:        rtsd
     ; MUL:        rtsd
+    ; MUL:        mul
 }
 
 define i16 @test_i16(i16 %a, i16 %b) {
@@ -28,11 +28,11 @@
     ; FUN-NOT:    mul
     ; FUN:        brlid
     ; MUL-NOT:    brlid
-    ; MUL:        mul
 
     ret i16 %tmp.1
     ; FUN:        rtsd
     ; MUL:        rtsd
+    ; MUL:        mul
 }
 
 define i32 @test_i32(i32 %a, i32 %b) {
@@ -43,9 +43,9 @@
     ; FUN-NOT:    mul
     ; FUN:        brlid
     ; MUL-NOT:    brlid
-    ; MUL:        mul
 
     ret i32 %tmp.1
     ; FUN:        rtsd
     ; MUL:        rtsd
+    ; MUL:        mul
 }

Modified: llvm/trunk/test/CodeGen/MBlaze/shift.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MBlaze/shift.ll?rev=116993&r1=116992&r2=116993&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MBlaze/shift.ll (original)
+++ llvm/trunk/test/CodeGen/MBlaze/shift.ll Wed Oct 20 22:57:26 2010
@@ -10,17 +10,17 @@
     ; SHT:        test_i8:
 
     %tmp.1 = shl i8 %a, %b
-    ; FUN-NOT:    bsll
     ; FUN:        andi
     ; FUN:        add
     ; FUN:        bnei
     ; SHT-NOT:    andi
     ; SHT-NOT:    bnei
-    ; SHT:        bsll
 
     ret i8 %tmp.1
     ; FUN:        rtsd
     ; SHT:        rtsd
+    ; FUN-NOT:    bsll
+    ; SHT-NEXT:   bsll
 }
 
 define i8 @testc_i8(i8 %a, i8 %b) {
@@ -28,18 +28,18 @@
     ; SHT:        testc_i8:
 
     %tmp.1 = shl i8 %a, 5
-    ; FUN-NOT:    bsll
     ; FUN:        andi
     ; FUN:        add
     ; FUN:        bnei
     ; SHT-NOT:    andi
     ; SHT-NOT:    add
     ; SHT-NOT:    bnei
-    ; SHT:        bslli
 
     ret i8 %tmp.1
     ; FUN:        rtsd
     ; SHT:        rtsd
+    ; FUN-NOT:    bsll
+    ; SHT-NEXT:   bslli
 }
 
 define i16 @test_i16(i16 %a, i16 %b) {
@@ -47,17 +47,17 @@
     ; SHT:        test_i16:
 
     %tmp.1 = shl i16 %a, %b
-    ; FUN-NOT:    bsll
     ; FUN:        andi
     ; FUN:        add
     ; FUN:        bnei
     ; SHT-NOT:    andi
     ; SHT-NOT:    bnei
-    ; SHT:        bsll
 
     ret i16 %tmp.1
     ; FUN:        rtsd
     ; SHT:        rtsd
+    ; FUN-NOT:    bsll
+    ; SHT-NEXT:   bsll
 }
 
 define i16 @testc_i16(i16 %a, i16 %b) {
@@ -65,18 +65,18 @@
     ; SHT:        testc_i16:
 
     %tmp.1 = shl i16 %a, 5
-    ; FUN-NOT:    bsll
     ; FUN:        andi
     ; FUN:        add
     ; FUN:        bnei
     ; SHT-NOT:    andi
     ; SHT-NOT:    add
     ; SHT-NOT:    bnei
-    ; SHT:        bslli
 
     ret i16 %tmp.1
     ; FUN:        rtsd
     ; SHT:        rtsd
+    ; FUN-NOT:    bsll
+    ; SHT-NEXT:   bslli
 }
 
 define i32 @test_i32(i32 %a, i32 %b) {
@@ -84,17 +84,17 @@
     ; SHT:        test_i32:
 
     %tmp.1 = shl i32 %a, %b
-    ; FUN-NOT:    bsll
     ; FUN:        andi
     ; FUN:        add
     ; FUN:        bnei
     ; SHT-NOT:    andi
     ; SHT-NOT:    bnei
-    ; SHT:        bsll
 
     ret i32 %tmp.1
     ; FUN:        rtsd
     ; SHT:        rtsd
+    ; FUN-NOT:    bsll
+    ; SHT-NEXT:   bsll
 }
 
 define i32 @testc_i32(i32 %a, i32 %b) {
@@ -102,16 +102,16 @@
     ; SHT:        testc_i32:
 
     %tmp.1 = shl i32 %a, 5
-    ; FUN-NOT:    bsll
     ; FUN:        andi
     ; FUN:        add
     ; FUN:        bnei
     ; SHT-NOT:    andi
     ; SHT-NOT:    add
     ; SHT-NOT:    bnei
-    ; SHT:        bslli
 
     ret i32 %tmp.1
     ; FUN:        rtsd
     ; SHT:        rtsd
+    ; FUN-NOT:    bsll
+    ; SHT-NEXT:   bslli
 }



From ofv at wanadoo.es  Wed Oct 20 23:53:31 2010
From: ofv at wanadoo.es (=?utf-8?Q?=C3=93scar_Fuentes?=)
Date: Thu, 21 Oct 2010 06:53:31 +0200
Subject: [llvm-commits] [llvm] r116993 - in /llvm/trunk: cmake/modules/
	lib/Target/MBlaze/ lib/Target/MBlaze/InstPrinter/
	lib/Target/MBlaze/TargetInfo/ test/CodeGen/MBlaze/
References: <20101021035726.F318C2A6C12C@llvm.org>
Message-ID: <87hbggcfjo.fsf@telefonica.net>

Wesley Peck <peckw at wesleypeck.com> writes:

[snip]

Now there is MBlaze/AsmPrinter and MBlaze/InstPrinter. I guess that the
AsmPrinter directory is a leftover, because it is not built by the Make
build. However, if the CMake build sees the AsmPrinter directory it will
try to build it, which will cause a collision with the
LLVMMBlazeAsmPrinter library defined on MBlaze/InstPrinter.

If you wish to keep the AsmPrinter directory please delete the file
AsmPrinter/CMakeLists.txt. Thanks.

[snip]


From ofv at wanadoo.es  Thu Oct 21 00:01:26 2010
From: ofv at wanadoo.es (Oscar Fuentes)
Date: Thu, 21 Oct 2010 05:01:26 -0000
Subject: [llvm-commits] [llvm] r116997 -
	/llvm/trunk/lib/Target/MBlaze/AsmPrinter/CMakeLists.txt
Message-ID: <20101021050126.513C22A6C12C@llvm.org>

Author: ofv
Date: Thu Oct 21 00:01:26 2010
New Revision: 116997

URL: http://llvm.org/viewvc/llvm-project?rev=116997&view=rev
Log:
Deleted lib/Target/MBlaze/AsmPrinter/CMakeLists.txt. This way the
CMake build does not try to build that library, which collides with
MBlaze/InstPrinter.

Removed:
    llvm/trunk/lib/Target/MBlaze/AsmPrinter/CMakeLists.txt

Removed: llvm/trunk/lib/Target/MBlaze/AsmPrinter/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/AsmPrinter/CMakeLists.txt?rev=116996&view=auto
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/AsmPrinter/CMakeLists.txt (original)
+++ llvm/trunk/lib/Target/MBlaze/AsmPrinter/CMakeLists.txt (removed)
@@ -1,9 +0,0 @@
-include_directories(
-  ${CMAKE_CURRENT_BINARY_DIR}/..
-  ${CMAKE_CURRENT_SOURCE_DIR}/..
-  )
-
-add_llvm_library(LLVMMBlazeAsmPrinter
-  MBlazeAsmPrinter.cpp
-  )
-add_dependencies(LLVMMBlazeAsmPrinter MBlazeCodeGenTable_gen)



From peckw at wesleypeck.com  Thu Oct 21 00:05:06 2010
From: peckw at wesleypeck.com (Wesley Peck)
Date: Thu, 21 Oct 2010 05:05:06 -0000
Subject: [llvm-commits] [llvm] r116998 -
	/llvm/trunk/lib/Target/MBlaze/AsmPrinter/
Message-ID: <20101021050506.802742A6C12C@llvm.org>

Author: peckw
Date: Thu Oct 21 00:05:06 2010
New Revision: 116998

URL: http://llvm.org/viewvc/llvm-project?rev=116998&view=rev
Log:
Removing stale AsmPrinter directory from MicroBlaze backend.

Removed:
    llvm/trunk/lib/Target/MBlaze/AsmPrinter/


From peckw at wesleypeck.com  Thu Oct 21 00:12:06 2010
From: peckw at wesleypeck.com (Wesley Peck)
Date: Thu, 21 Oct 2010 00:12:06 -0500
Subject: [llvm-commits] [llvm] r116993 - in /llvm/trunk: cmake/modules/
	lib/Target/MBlaze/ lib/Target/MBlaze/InstPrinter/
	lib/Target/MBlaze/TargetInfo/ test/CodeGen/MBlaze/
In-Reply-To: <87hbggcfjo.fsf@telefonica.net>
References: <20101021035726.F318C2A6C12C@llvm.org>
	<87hbggcfjo.fsf@telefonica.net>
Message-ID: <78106AFB-FA1C-47DD-8127-E6CB640732F3@wesleypeck.com>

The AsmPrinter directory was originally removed in the 116986 commit but I missed it during the recommit. Sorry for causing problems.
-- Wesley Peck
 
On Oct 20, 2010, at 11:53 PM, ?scar Fuentes wrote:

> Wesley Peck <peckw at wesleypeck.com> writes:
> 
> [snip]
> 
> Now there is MBlaze/AsmPrinter and MBlaze/InstPrinter. I guess that the
> AsmPrinter directory is a leftover, because it is not built by the Make
> build. However, if the CMake build sees the AsmPrinter directory it will
> try to build it, which will cause a collision with the
> LLVMMBlazeAsmPrinter library defined on MBlaze/InstPrinter.
> 
> If you wish to keep the AsmPrinter directory please delete the file
> AsmPrinter/CMakeLists.txt. Thanks.
> 
> [snip]
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



From anton at korobeynikov.info  Thu Oct 21 00:24:37 2010
From: anton at korobeynikov.info (Anton Korobeynikov)
Date: Thu, 21 Oct 2010 09:24:37 +0400
Subject: [llvm-commits] [llvm] r116984 - in /llvm/trunk/lib/Target/X86:
 X86ISelLowering.cpp X86ISelLowering.h X86InstrCompiler.td X86InstrInfo.td
In-Reply-To: <20101021014102.3C3D32A6C12C@llvm.org>
References: <20101021014102.3C3D32A6C12C@llvm.org>
Message-ID: <AANLkTi=vHR=pk5UV=y_9C1LdZ7SkqB=V--viQC6pMN+g@mail.gmail.com>

Hello Michael,

> + ?const char *StackProbeSymbol =
> + ? ? ?Subtarget->isTargetWindows() ? "_chkstk" : "_alloca";
Please assert on win64 (*not* on mingw+win64), since _chkstk has there
completely different semantics.

Thanks.
-- 
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University


From peckw at ittc.ku.edu  Wed Oct 20 22:50:55 2010
From: peckw at ittc.ku.edu (Wesley Peck)
Date: Wed, 20 Oct 2010 22:50:55 -0500
Subject: [llvm-commits] [llvm] r116986 - in /llvm/trunk: cmake/modules/
	lib/Target/MBlaze/ lib/Target/MBlaze/AsmPrinter/
	lib/Target/MBlaze/InstPrinter/ lib/Target/MBlaze/TargetInfo/
	test/CodeGen/MBlaze/
In-Reply-To: <AANLkTimfp9c=nntjieqwC32s=bGkPbtwsO=f6kQoNva+@mail.gmail.com>
References: <20101021030955.E4F442A6C12C@llvm.org>
	<AANLkTimfp9c=nntjieqwC32s=bGkPbtwsO=f6kQoNva+@mail.gmail.com>
Message-ID: <3C0387AF-1B5B-416B-B605-55307D8337DC@ittc.ku.edu>

Thanks.
Apparently capitalization doesn't matter so much on OS X :)

-- Wesley Peck



On Oct 20, 2010, at 10:45 PM, NAKAMURA Takumi wrote:

> Wesley,
> 
> Suggested patch ;)
> Passes on x86_64 centos5
> 
> --- a/lib/Target/MBlaze/MBlazeMCInstLower.cpp
> +++ b/lib/Target/MBlaze/MBlazeMCInstLower.cpp
> @@ -12,7 +12,7 @@
> //
> //===----------------------------------------------------------------------===//
> 
> -#include "MBLazeMCInstLower.h"
> +#include "MBlazeMCInstLower.h"
> #include "MBlazeInstrInfo.h"
> #include "llvm/Constants.h"
> #include "llvm/CodeGen/AsmPrinter.h"
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits

-------------- next part --------------
A non-text attachment was scrubbed...
Name: smime.p7s
Type: application/pkcs7-signature
Size: 3914 bytes
Desc: not available
Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101020/224bd2b2/attachment.bin 

From geek4civic at gmail.com  Thu Oct 21 01:07:54 2010
From: geek4civic at gmail.com (NAKAMURA Takumi)
Date: Thu, 21 Oct 2010 15:07:54 +0900
Subject: [llvm-commits] [llvm] r112705 - in /llvm/trunk:
 include/llvm/System/Signals.h lib/System/Unix/Signals.inc
 lib/System/Win32/Signals.inc
In-Reply-To: <20100901141734.9AFEC2A6C12C@llvm.org>
References: <20100901141734.9AFEC2A6C12C@llvm.org>
Message-ID: <AANLkTimO+omuaC8WyOpWrSzFr5tYuA2jz+s_6TNA9mX0@mail.gmail.com>

Good afternoon, Dan.

I knew why bugpoint stalls on mingw.

DontRemoveFileOnSignal() did not acquire the CriticalSection.
Please take a look into my patch.

Thank you in advance, ...Takumi


PASS: LLVM :: BugPoint/crash-narrowfunctiontest.ll (1 of 4)
PASS: LLVM :: BugPoint/metadata.ll (2 of 4)
PASS: LLVM :: BugPoint/remove_arguments_test.ll (3 of 4)
PASS: LLVM :: Feature/load_module.ll (4 of 4)


2010/9/1 Dan Gohman <gohman at apple.com>:
> Author: djg
> Date: Wed Sep ?1 09:17:34 2010
> New Revision: 112705
>
> URL: http://llvm.org/viewvc/llvm-project?rev=112705&view=rev
> Log:
> Add an interface for unregistering a file from the FilesToRemove list.
>
> Modified:
> ? ?llvm/trunk/include/llvm/System/Signals.h
> ? ?llvm/trunk/lib/System/Unix/Signals.inc
> ? ?llvm/trunk/lib/System/Win32/Signals.inc
>
> Modified: llvm/trunk/include/llvm/System/Signals.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/System/Signals.h?rev=112705&r1=112704&r2=112705&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/System/Signals.h (original)
> +++ llvm/trunk/include/llvm/System/Signals.h Wed Sep ?1 09:17:34 2010
> @@ -29,6 +29,10 @@
> ? /// @brief Remove a file if a fatal signal occurs.
> ? bool RemoveFileOnSignal(const Path &Filename, std::string* ErrMsg = 0);
>
> + ?/// This function removes a file from the list of files to be removed on
> + ?/// signal delivery.
> + ?void DontRemoveFileOnSignal(const Path &Filename);
> +
> ? /// When an error signal (such as SIBABRT or SIGSEGV) is delivered to the
> ? /// process, print a stack trace and then exit.
> ? /// @brief Print a stack trace if a fatal signal occurs.
>
> Modified: llvm/trunk/lib/System/Unix/Signals.inc
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Unix/Signals.inc?rev=112705&r1=112704&r2=112705&view=diff
> ==============================================================================
> --- llvm/trunk/lib/System/Unix/Signals.inc (original)
> +++ llvm/trunk/lib/System/Unix/Signals.inc Wed Sep ?1 09:17:34 2010
> @@ -182,6 +182,16 @@
> ? return false;
> ?}
>
> +// DontRemoveFileOnSignal - The public API
> +void llvm::sys::DontRemoveFileOnSignal(const sys::Path &Filename) {
> + ?SignalsMutex.acquire();
> + ?std::vector<sys::Path>::reverse_iterator I =
> + ? ?std::find(FilesToRemove.rbegin(), FilesToRemove.rend(), Filename);
> + ?if (I != FilesToRemove.rend())
> + ? ?FilesToRemove.erase(I.base()-1);
> + ?SignalsMutex.release();
> +}
> +
> ?/// AddSignalHandler - Add a function to be called when a signal is delivered
> ?/// to the process. ?The handler can have a cookie passed to it to identify
> ?/// what instance of the handler it is.
>
> Modified: llvm/trunk/lib/System/Win32/Signals.inc
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/System/Win32/Signals.inc?rev=112705&r1=112704&r2=112705&view=diff
> ==============================================================================
> --- llvm/trunk/lib/System/Win32/Signals.inc (original)
> +++ llvm/trunk/lib/System/Win32/Signals.inc Wed Sep ?1 09:17:34 2010
> @@ -140,6 +140,20 @@
> ? return false;
> ?}
>
> +// DontRemoveFileOnSignal - The public API
> +void sys::DontRemoveFileOnSignal(const sys::Path &Filename) {
> + ?if (FilesToRemove == NULL)
> + ? ?return;
> +
> + ?FilesToRemove->push_back(Filename);
> + ?std::vector<sys::Path>::reverse_iterator I =
> + ?std::find(FilesToRemove->rbegin(), FilesToRemove->rend(), Filename);
> + ?if (I != FilesToRemove->rend())
> + ? ?FilesToRemove->erase(I.base()-1);
> +
> + ?LeaveCriticalSection(&CriticalSection);
> +}
> +
> ?/// PrintStackTraceOnErrorSignal - When an error signal (such as SIBABRT or
> ?/// SIGSEGV) is delivered to the process, print a stack trace and then exit.
> ?void sys::PrintStackTraceOnErrorSignal() {
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
-------------- next part --------------
A non-text attachment was scrubbed...
Name: Win32-Signals-DontRemoveFileOnSignal.patch
Type: application/octet-stream
Size: 741 bytes
Desc: not available
Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101021/5a72c083/attachment.obj 

From isanbard at gmail.com  Thu Oct 21 01:25:08 2010
From: isanbard at gmail.com (Bill Wendling)
Date: Thu, 21 Oct 2010 06:25:08 -0000
Subject: [llvm-commits] [llvm] r117002 -
	/llvm/trunk/test/MC/ARM/simple-fp-encoding.ll
Message-ID: <20101021062508.4E49E2A6C12C@llvm.org>

Author: void
Date: Thu Oct 21 01:25:08 2010
New Revision: 117002

URL: http://llvm.org/viewvc/llvm-project?rev=117002&view=rev
Log:
Fix whitespace.

Modified:
    llvm/trunk/test/MC/ARM/simple-fp-encoding.ll

Modified: llvm/trunk/test/MC/ARM/simple-fp-encoding.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/simple-fp-encoding.ll?rev=117002&r1=117001&r2=117002&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/simple-fp-encoding.ll (original)
+++ llvm/trunk/test/MC/ARM/simple-fp-encoding.ll Thu Oct 21 01:25:08 2010
@@ -404,10 +404,10 @@
 define void @f104(float %a, float %b, float %c, float %d, float %e, float %f) nounwind {
 entry:
 ; CHECK: f104
-; CHECK: vmov	s0, r0               @ encoding: [0x10,0x0a,0x00,0xee]
-; CHECK: vmov	s1, r1               @ encoding: [0x90,0x1a,0x00,0xee]
-; CHECK: vmov	s2, r2               @ encoding: [0x10,0x2a,0x01,0xee]
-; CHECK: vmov	s3, r3               @ encoding: [0x90,0x3a,0x01,0xee]
+; CHECK: vmov s0, r0                 @ encoding: [0x10,0x0a,0x00,0xee]
+; CHECK: vmov s1, r1                 @ encoding: [0x90,0x1a,0x00,0xee]
+; CHECK: vmov s2, r2                 @ encoding: [0x10,0x2a,0x01,0xee]
+; CHECK: vmov s3, r3                 @ encoding: [0x90,0x3a,0x01,0xee]
   %conv = fptosi float %a to i32
   %conv2 = fptosi float %b to i32
   %conv4 = fptosi float %c to i32
@@ -415,10 +415,10 @@
   %conv8 = fptosi float %e to i32
   %conv10 = fptosi float %f to i32
   tail call void @g104(i32 %conv, i32 %conv2, i32 %conv4, i32 %conv6, i32 %conv8, i32 %conv10) nounwind
-; CHECK: vmov	r0, s0			@ encoding: [0x10,0x0a,0x10,0xee]
-; CHECK: vmov	r1, s1			@ encoding: [0x90,0x1a,0x10,0xee]
-; CHECK: vmov	r2, s2			@ encoding: [0x10,0x2a,0x11,0xee]
-; CHECK: vmov	r3, s3                  @ encoding: [0x90,0x3a,0x11,0xee]
+; CHECK: vmov r0, s0                 @ encoding: [0x10,0x0a,0x10,0xee]
+; CHECK: vmov r1, s1                 @ encoding: [0x90,0x1a,0x10,0xee]
+; CHECK: vmov r2, s2                 @ encoding: [0x10,0x2a,0x11,0xee]
+; CHECK: vmov r3, s3                 @ encoding: [0x90,0x3a,0x11,0xee]
   ret void
 }
 



From baldrick at free.fr  Thu Oct 21 02:38:55 2010
From: baldrick at free.fr (Duncan Sands)
Date: Thu, 21 Oct 2010 09:38:55 +0200
Subject: [llvm-commits] [llvm] r116909 - in /llvm/trunk/lib/System:
 RWMutex.cpp Win32/ThreadLocal.inc
In-Reply-To: <7296BBA6-0922-42BA-8F77-4051473985A9@apple.com>
References: <20101020040529.3C4EE2A6C12C@llvm.org> <4CBE9218.9080500@free.fr>
	<7296BBA6-0922-42BA-8F77-4051473985A9@apple.com>
Message-ID: <4CBFEE0F.7040704@free.fr>

Hi Bill,

>> when building with assertions on, errorcode is used, so mightn't this result
>> in a warning? [*] I don't see what was wrong with casting to void: that's used
>> all over the place in LLVM already, not to mention in lots of other projects.
>>
> When I created that macro, I tested it out with that situation on GCC. It didn't
> produce a warning. Can you come up with a situation and compiler where it does?

actually, no, I can't create this kind of problem with the gcc versions I have
here.  Since ATTRIBUTE_UNUSED isn't even defined for non-gcc compilers, it
seems kind of pointless testing them :)

That said, cast-to-void has the advantage that it will (probably) work with
every compiler out there, unlike ATTRIBUTE_UNUSED which does nothing for several
of them [*].

Anyway, this discussion is fairly pointless since I believe Chris issued a
fatwa some time ago stating that cast-to-void should be used wherever possible.

Ciao,

Duncan.

[*] You might argue that ATTRIBUTE_UNUSED should just get an appropriate
definition every non-gcc compiler.  If you can come up with such a definition,
great!  But it still seems like a lot of work to get what you can already get
(without including header files) with the cast-to-void idiom.

From geek4civic at gmail.com  Thu Oct 21 02:51:57 2010
From: geek4civic at gmail.com (NAKAMURA Takumi)
Date: Thu, 21 Oct 2010 16:51:57 +0900
Subject: [llvm-commits] [Review request] test: Add the new feature
	"loadable_module"
Message-ID: <AANLkTi=pvomH=fawD-X=3WQH73mnOmCuOqK6duAG8DBK@mail.gmail.com>

Hello.

Cygming can build Module.dll for Opt and Bugpoint with autoconf.

I will propose two patches attached. Please give me comments.


* 0001 - Add the feature "loadable_module"

By default, "loadable_module" is 1.
On cygwin and win32(s), it obeys ENABLE_SHARED.

It should not have any sideeffects, I believe.


* 0002 - patches for 4 tests

Without "loadable_module", all of 4 tests marks as "UNSUPPORTED".

I have confirmed (both enable_shared) on CentOS5, Cygwin and Mingw.

I have confirmed with cmake on Mingw.
IIRC, cmake/mingw and cmake/msvc set ENABLE_SHARED as '0'.
I believe it might not affect msvc buildbots.


ps. LLVMHello.dll can be built manually :)
(or seek llvmdev or here with "llvmhello")


Enjoy happy testing, ...Takumi
-------------- next part --------------
A non-text attachment was scrubbed...
Name: 0001-test-Add-the-new-feature-loadable_module.patch
Type: application/octet-stream
Size: 1893 bytes
Desc: not available
Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101021/507ffe6b/attachment.obj 
-------------- next part --------------
A non-text attachment was scrubbed...
Name: 0002-test-Check-the-feature-loadable_module-.-Now-we-can-.patch
Type: application/octet-stream
Size: 2604 bytes
Desc: not available
Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101021/507ffe6b/attachment-0001.obj 

From baldrick at free.fr  Thu Oct 21 02:57:01 2010
From: baldrick at free.fr (Duncan Sands)
Date: Thu, 21 Oct 2010 09:57:01 +0200
Subject: [llvm-commits] [llvm] r116958
	-	/llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp
In-Reply-To: <20101020221114.BBADB2A6C12C@llvm.org>
References: <20101020221114.BBADB2A6C12C@llvm.org>
Message-ID: <4CBFF24D.5070806@free.fr>

Hi Dan,

> +/// Aliases - Test whether the type represented by A may alias the
> +/// type represented by B.

if I understand the way you've set up TBAA right, it doesn't have to have
anything to do with types, right?  It seems to be a completely abstract
setup where each memory operation can be annotated with a node in an
abstract tree, and where two memory operations will not alias if neither
of their nodes is an ancestor of the other.  Is that correct?  If so, it
could in theory be used for all kinds of other things and not just TBAA.
Or am I misunderstanding the design?

Ciao,

Duncan.

From baldrick at free.fr  Thu Oct 21 03:04:46 2010
From: baldrick at free.fr (Duncan Sands)
Date: Thu, 21 Oct 2010 10:04:46 +0200
Subject: [llvm-commits] [llvm] r116978 - in /llvm/trunk:
 include/llvm/CodeGen/MachineModuleInfo.h lib/CodeGen/MachineModuleInfo.cpp
 lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
 lib/Target/X86/X86AsmPrinter.cpp
In-Reply-To: <20101021000822.017122A6C12C@llvm.org>
References: <20101021000822.017122A6C12C@llvm.org>
Message-ID: <4CBFF41E.5000000@free.fr>

Hi Michael,

> CodeGen-Windows: Only emit _fltused if a VarArg function is called with floating point args.
> This should be the minimum set of functions that could possibly need it.

are you planning to handle indirect calls?

Ciao,

Duncan.

From baldrick at free.fr  Thu Oct 21 03:57:30 2010
From: baldrick at free.fr (Duncan Sands)
Date: Thu, 21 Oct 2010 08:57:30 -0000
Subject: [llvm-commits] [llvm] r117004 - in /llvm/trunk:
 include/llvm/ExecutionEngine/ExecutionEngine.h
 lib/ExecutionEngine/ExecutionEngine.cpp lib/ExecutionEngine/JIT/JIT.cpp
Message-ID: <20101021085730.134E72A6C12C@llvm.org>

Author: baldrick
Date: Thu Oct 21 03:57:29 2010
New Revision: 117004

URL: http://llvm.org/viewvc/llvm-project?rev=117004&view=rev
Log:
Fix the cleanup process of exception information in JIT.  Now JIT
deregisters registered by it FDE structures allowing consecutive
JIT runs to succeed.  Patch by Yuri.  Fixes PR8285.

Modified:
    llvm/trunk/include/llvm/ExecutionEngine/ExecutionEngine.h
    llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp
    llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp

Modified: llvm/trunk/include/llvm/ExecutionEngine/ExecutionEngine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ExecutionEngine/ExecutionEngine.h?rev=117004&r1=117003&r2=117004&view=diff
==============================================================================
--- llvm/trunk/include/llvm/ExecutionEngine/ExecutionEngine.h (original)
+++ llvm/trunk/include/llvm/ExecutionEngine/ExecutionEngine.h Thu Oct 21 03:57:29 2010
@@ -126,10 +126,12 @@
   /// pointer is invoked to create it. If this returns null, the JIT will abort.
   void* (*LazyFunctionCreator)(const std::string &);
   
-  /// ExceptionTableRegister - If Exception Handling is set, the JIT will 
-  /// register dwarf tables with this function
+  /// ExceptionTableRegister - If Exception Handling is set, the JIT will
+  /// register dwarf tables with this function.
   typedef void (*EERegisterFn)(void*);
-  static EERegisterFn ExceptionTableRegister;
+  EERegisterFn ExceptionTableRegister;
+  EERegisterFn ExceptionTableDeregister;
+  std::vector<void*> AllExceptionTables;
 
 public:
   /// lock - This lock is protects the ExecutionEngine, JIT, JITResolver and
@@ -373,17 +375,26 @@
   
   /// InstallExceptionTableRegister - The JIT will use the given function
   /// to register the exception tables it generates.
-  static void InstallExceptionTableRegister(void (*F)(void*)) {
+  void InstallExceptionTableRegister(EERegisterFn F) {
     ExceptionTableRegister = F;
   }
+  void InstallExceptionTableDeregister(EERegisterFn F) {
+    ExceptionTableDeregister = F;
+  }
   
   /// RegisterTable - Registers the given pointer as an exception table. It uses
   /// the ExceptionTableRegister function.
-  static void RegisterTable(void* res) {
-    if (ExceptionTableRegister)
+  void RegisterTable(void* res) {
+    if (ExceptionTableRegister) {
       ExceptionTableRegister(res);
+      AllExceptionTables.push_back(res);
+    }
   }
 
+  /// DeregisterAllTables - Deregisters all previously registered pointers to an
+  /// exception tables. It uses the ExceptionTableoDeregister function.
+  void DeregisterAllTables();
+
 protected:
   explicit ExecutionEngine(Module *M);
 

Modified: llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp?rev=117004&r1=117003&r2=117004&view=diff
==============================================================================
--- llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp Thu Oct 21 03:57:29 2010
@@ -47,12 +47,12 @@
   const SmallVectorImpl<std::string>& MAttrs) = 0;
 ExecutionEngine *(*ExecutionEngine::InterpCtor)(Module *M,
                                                 std::string *ErrorStr) = 0;
-ExecutionEngine::EERegisterFn ExecutionEngine::ExceptionTableRegister = 0;
-
 
 ExecutionEngine::ExecutionEngine(Module *M)
   : EEState(*this),
-    LazyFunctionCreator(0) {
+    LazyFunctionCreator(0),
+    ExceptionTableRegister(0), 
+    ExceptionTableDeregister(0) {
   CompilingLazily         = false;
   GVCompilationDisabled   = false;
   SymbolSearchingDisabled = false;
@@ -66,6 +66,16 @@
     delete Modules[i];
 }
 
+void ExecutionEngine::DeregisterAllTables() {
+  if (ExceptionTableDeregister) {
+    std::vector<void*>::iterator it = AllExceptionTables.begin();
+    std::vector<void*>::iterator ite = AllExceptionTables.end();
+    for (; it != ite; ++it)
+      ExceptionTableDeregister(*it);
+    AllExceptionTables.clear();
+  }
+}
+
 namespace {
 // This class automatically deletes the memory block when the GlobalVariable is
 // destroyed.

Modified: llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp?rev=117004&r1=117003&r2=117004&view=diff
==============================================================================
--- llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp Thu Oct 21 03:57:29 2010
@@ -87,6 +87,7 @@
 // values of an opaque key, used by libgcc to find dwarf tables.
 
 extern "C" void __register_frame(void*);
+extern "C" void __deregister_frame(void*);
 
 #if defined(__APPLE__) && MAC_OS_X_VERSION_MAX_ALLOWED <= 1050
 # define USE_KEYMGR 1
@@ -318,8 +319,10 @@
     LOI = (LibgccObjectInfo*)calloc(sizeof(struct LibgccObjectInfo), 1); 
   _keymgr_set_and_unlock_processwide_ptr(KEYMGR_GCC3_DW2_OBJ_LIST, LOI);
   InstallExceptionTableRegister(DarwinRegisterFrame);
+  // Not sure about how to deregister on Darwin.
 #else
   InstallExceptionTableRegister(__register_frame);
+  InstallExceptionTableDeregister(__deregister_frame);
 #endif // __APPLE__
 #endif // __GNUC__
   
@@ -328,6 +331,9 @@
 }
 
 JIT::~JIT() {
+  // Unregister all exception tables registered by this JIT.
+  DeregisterAllTables();
+  // Cleanup.
   AllJits->Remove(this);
   delete jitstate;
   delete JCE;



From bigcheesegs at gmail.com  Thu Oct 21 07:52:44 2010
From: bigcheesegs at gmail.com (Michael Spencer)
Date: Thu, 21 Oct 2010 08:52:44 -0400
Subject: [llvm-commits] [llvm] r116984 - in /llvm/trunk/lib/Target/X86:
 X86ISelLowering.cpp X86ISelLowering.h X86InstrCompiler.td X86InstrInfo.td
In-Reply-To: <AANLkTi=vHR=pk5UV=y_9C1LdZ7SkqB=V--viQC6pMN+g@mail.gmail.com>
References: <20101021014102.3C3D32A6C12C@llvm.org>
	<AANLkTi=vHR=pk5UV=y_9C1LdZ7SkqB=V--viQC6pMN+g@mail.gmail.com>
Message-ID: <AANLkTikqjgAsuAq-eEwJAnEH0rzYtVTAw5XFNN+uRt7g@mail.gmail.com>

On Thu, Oct 21, 2010 at 1:24 AM, Anton Korobeynikov
<anton at korobeynikov.info> wrote:
> Hello Michael,
>
>> + ?const char *StackProbeSymbol =
>> + ? ? ?Subtarget->isTargetWindows() ? "_chkstk" : "_alloca";
> Please assert on win64 (*not* on mingw+win64), since _chkstk has there
> completely different semantics.
>
> Thanks.
> --
> With best regards, Anton Korobeynikov
> Faculty of Mathematics and Mechanics, Saint Petersburg State University
>

While looking into this I discovered that no Windows x64 targets can
get here because ISD::DYNAMIC_STACKALLOC, MVT::i64 is never set to
Custom. Only i32 is.

- Michael Spencer


From bigcheesegs at gmail.com  Thu Oct 21 08:04:29 2010
From: bigcheesegs at gmail.com (Michael Spencer)
Date: Thu, 21 Oct 2010 09:04:29 -0400
Subject: [llvm-commits] [llvm] r116978 - in /llvm/trunk:
 include/llvm/CodeGen/MachineModuleInfo.h lib/CodeGen/MachineModuleInfo.cpp
 lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
 lib/Target/X86/X86AsmPrinter.cpp
In-Reply-To: <4CBFF41E.5000000@free.fr>
References: <20101021000822.017122A6C12C@llvm.org> <4CBFF41E.5000000@free.fr>
Message-ID: <AANLkTimhXuu8K8daix+y41xzt0Rv331M53=4fpieTzD6@mail.gmail.com>

On Thu, Oct 21, 2010 at 4:04 AM, Duncan Sands <baldrick at free.fr> wrote:
> Hi Michael,
>
>> CodeGen-Windows: Only emit _fltused if a VarArg function is called with floating point args.
>> This should be the minimum set of functions that could possibly need it.
>
> are you planning to handle indirect calls?
>
> Ciao,
>
> Duncan.

Thanks, I should have added a test for that. I didn't realize that an
indirect call doesn't have a called function, it has a called value.
Fixing now.

- Michael Spencer

From espindola at google.com  Thu Oct 21 09:29:40 2010
From: espindola at google.com (Rafael Espindola)
Date: Thu, 21 Oct 2010 10:29:40 -0400
Subject: [llvm-commits] [PATCH][Support] Add Endian.h which contains
 generic code to deal with endian specific data.
In-Reply-To: <AANLkTin=MLrebJzLEawVHGgq8cpYYqwNVtGJdy9zQQHR@mail.gmail.com>
References: <AANLkTi=0+2WSjKif9965KPc7J_Tx2aO+6xsjZ00Ot9ji@mail.gmail.com>
	<AANLkTi=5rsk1FWWRij0v8w86-yeqQ1MPAC2_u6bUSRBC@mail.gmail.com>
	<AANLkTin=MLrebJzLEawVHGgq8cpYYqwNVtGJdy9zQQHR@mail.gmail.com>
Message-ID: <AANLkTimj6N-KeUiO2spzX8tvGbPpcXXiBXR0-8AuQaZA@mail.gmail.com>

>>> Endian.h contains:
>>
>> Should SwapByteOrder be in here?
>
> No, because it contains heavily platform specific code, while this
> provides utilities.

Got it.
>>> * endian
>>> This is a templated struct for reading endian specific data directly
>>> from memory. It is typedefed based on the host platform's endianness
>>> (well, not yet, because there's no LLVM_IS_BIG_ENDIAN or such yet).
>>
>> Why do you always ready data unaligned? The aligned case is probably
>> the common one, no?
>
> Because it's faster to do an unaligned read than check for alignment
> first. The unaligned case is very common for COFF, but non existent
> for ELF, which is why ELF uses the aligned variant. *
>
> * I just realized that the aligned version of
> packed_endian_specific_integral still ends up doing a potentially
> unaligned read. While safe, this should be changed to do a direct
> read, but still byteswap.

OK. I didn't know that COFF had many unaligned parts. Just a
clarification then, if the endian template is to be used only with
unaligned data, shouldn't it have a name with 'unaligned' in it? Would
have made it easier to catch the issue with the aligned
packed_endian_specific_integral :-) Also, do you need to use "uint8_t
Value[sizeof(value_type)]" if you are forwarding the pointer to the
endian::read_* anyway?

>> Also, is
>> the definition of unaligned_access_helper portable?
>
> It should work on every compiler LLVM works on and has been tested on
> MSVC, clang, and gcc; however, it probably should be partially moved
> to compiler.h.
>
> I tried using the strict C/C++ version with bit-shifts, however, no
> compiler was able to optimize it to just a load on x86. Pack produces
> optimal code on x86 and arm, and I assume others.

That is good for now. If someone tries to use it on a compiler that
cannot support it we add the ifdefs and move it.

>> If not I would be somewhat
>> inclined to have the clients handle it. I am worried that a "operator
>> value_type()" might be a bit too convenient :-). Don't you get cases
>> where it is unintentionally called? The code gets too ugly if you have
>> to use an explicit get method?
>
> I don't see where you wouldn't want it to be called. It should work
> exactly as if you just had a value_type except that you can't assign
> to it.
>
> Adding an explicit get method would work, but I feel it would just
> clutter the code.

Your call. I am just a bit concerned about automatic conversions in general.

I think this is OK then with the endian_impl removed and the aligned
versions fixed to do an aligned load.

Cheers,
-- 
Rafael ?vila de Esp?ndola


From baldrick at free.fr  Thu Oct 21 09:40:02 2010
From: baldrick at free.fr (Duncan Sands)
Date: Thu, 21 Oct 2010 14:40:02 -0000
Subject: [llvm-commits] [llvm] r117009 - /llvm/trunk/docs/ReleaseNotes.html
Message-ID: <20101021144002.9974C2A6C12C@llvm.org>

Author: baldrick
Date: Thu Oct 21 09:40:02 2010
New Revision: 117009

URL: http://llvm.org/viewvc/llvm-project?rev=117009&view=rev
Log:
Argh, completely forgot to add this to the release notes!
Better late than never, right?

Modified:
    llvm/trunk/docs/ReleaseNotes.html

Modified: llvm/trunk/docs/ReleaseNotes.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.html?rev=117009&r1=117008&r2=117009&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.html (original)
+++ llvm/trunk/docs/ReleaseNotes.html Thu Oct 21 09:40:02 2010
@@ -1011,6 +1011,12 @@
   LLVM.  The Triple::normalize utility method has been added to help front-ends
   deal with funky triples.
 </li>
+<li>
+  The signature of the <tt>GCMetadataPrinter::finishAssembly</tt> virtual
+  function changed: the <tt>raw_ostream</tt> and <tt>MCAsmInfo</tt> arguments
+  were dropped.  GC plugins which compute stack maps must be updated to avoid
+  having the old definition overload the new signature.
+</li>
   
 <li>
   Some APIs were renamed:



From rafael.espindola at gmail.com  Thu Oct 21 09:50:35 2010
From: rafael.espindola at gmail.com (=?UTF-8?Q?Rafael_Esp=C3=ADndola?=)
Date: Thu, 21 Oct 2010 10:50:35 -0400
Subject: [llvm-commits] Fwd: Proof of concept patch for unifying the
 .s/ELF emission of .ARM.attributes
In-Reply-To: <AANLkTimxqNQwKoVTEd6J8LrD4mm8_8=ZVeafrHLUsZjb@mail.gmail.com>
References: <AANLkTikSjtvxSNc0oxKEoG2LdGriz10OXOTAtC4caR_+@mail.gmail.com>
	<AANLkTikaS4qjUi+5q3YWt_GF5EdWKVNwxq7=-LyWRRpv@mail.gmail.com>
	<AANLkTinH7mZtZSQKDYMOE9C8-0baHwm31crmp30roWKy@mail.gmail.com>
	<AANLkTimhWm3dCbO003ipXkaDS3f0o948b9b2NquVSe29@mail.gmail.com>
	<AANLkTi=2B7Pk9HkkxYvQBvm-AfJsYCHW8uYxURq5iEcd@mail.gmail.com>
	<AANLkTi=iVAmVx08ww0EOu9DvJ82oxWD+02Es3btVSqK2@mail.gmail.com>
	<AANLkTin5KdNX6g+ZRYJS0nNy6=bu4o4gwa6v5-XNwkW9@mail.gmail.com>
	<AANLkTikAPuZKYLf4iisi=C4v2onfz5qCXQ-mo2s62UNq@mail.gmail.com>
	<6D9C9A6C-872A-494D-A5F6-2523DD4CA5B6@apple.com>
	<AANLkTi=4=8T0ww0csECny4t0RMSrJV=nUT77h+759-Ab@mail.gmail.com>
	<8FD08C3F-E6E1-448B-A384-7E5CF0763EC1@apple.com>
	<AANLkTikH8sEANQrDGVHg1uOtfCs2UzygkUPpm91E9kZc@mail.gmail.com>
	<AANLkTimoHYSw=viMcpZLirRqd789_xjWmT4+foao_T6f@mail.gmail.com>
	<8E5A9C6C-BA61-41F8-B445-336D9F96D774@apple.com>
	<AANLkTiksC9MbzDhYrzLs9Kt5YRGuHu2nv3Jri=-xRKb9@mail.gmail.com>
	<AANLkTi=73V-VRH_HGiPwcQjBNcFZMiU+jazHMH3YdJ-V@mail.gmail.com>
	<AANLkTikGWx7GH5VZUByposdJWhhvc+qR6X-1Ve_gNmKG@mail.gmail.com>
	<AANLkTik7AYHB1_Crv6Vcf4uMyx4U_x5mJaYK+-S3=ucU@mail.gmail.com>
	<AANLkTi=e_fCXZo_H1=_47tv5BABbpHkf8qJiyrMfRFj_@mail.gmail.com>
	<AANLkTi=MArF+PJK1iwc66wZNobOTjC6pi127Kt=A64bp@mail.gmail.com>
	<AANLkTimHKpEKfy2mr_UKco+Uscg_YBDtCmvXhT4AhAnp@mail.gmail.com>
	<AANLkTimt3NyHcqEh38hn+FnUNL_O5Qv81OYjzE7d0Qf1@mail.gmail.com>
	<AANLkTin8ykW=j=arKX3wC-CX2adx0sTtUmYMJr7qYqJY@mail.gmail.com>
	<AANLkTikXC0jb1VQ--c7iAgX6=DvpTHD_prwSF9F2Tjm4@mail.gmail.com>
	<AANLkTi=SBh85q-m-SvA4nNj9DfdUDXgYmxs6u9Zc4w7s@mail.gmail.com>
	<AANLkTinVf83nF2RUWsmRzT1tL=5MMVJdoGHm8h1D6mG6@mail.gmail.com>
	<AANLkTikHY6Sej-knz3b5+EUjMWVuoPOkWrmFHKHBWtam@mail.gmail.com>
	<AANLkTinFCYO-f67sKptJ0fb6FK=c_zAbX6CMi55W1v+X@mail.gmail.com>
	<AANLkTimxqNQwKoVTEd6J8LrD4mm8_8=ZVeafrHLUsZjb@mail.gmail.com>
Message-ID: <AANLkTinxWGCVcq1=0rVa-bbMSC2dqKUy5z4m5q_nkQOJ@mail.gmail.com>

> Hmm, I wish we had this discussion way earlier..
>
> How would I emit things in different subsections? I can do a high
> level switch to .ARM.attributes, and if I were emitting one blob from
> begin to end, using the higher level interface would be preferable,
> but it contains additional subsections - which are naturally
> represented by MCDataFragments - Is there an MC equivalent of a
> SubSection (which is-a Section so I can switch back and forth?)
> Currently we only have stuff that go into the File subsection only,
> but.. for futureproofing?

We cross that bridge when we get there. It might be that the best
thing to do is organize the code so that  we output the subsections in
order. It might be to add some missing feature. For now using the
regular streamer API will make this code a lot easier to read.

>
> -jason

Cheers,
Rafael

From criswell at uiuc.edu  Thu Oct 21 09:51:52 2010
From: criswell at uiuc.edu (John Criswell)
Date: Thu, 21 Oct 2010 14:51:52 -0000
Subject: [llvm-commits] [poolalloc] r117012 - in
 /poolalloc/trunk/runtime/FL2Allocator: PoolAllocator.cpp PoolAllocator.h
Message-ID: <20101021145152.3ECE52A6C12C@llvm.org>

Author: criswell
Date: Thu Oct 21 09:51:52 2010
New Revision: 117012

URL: http://llvm.org/viewvc/llvm-project?rev=117012&view=rev
Log:
Added the poolcalloc() function.

Modified:
    poolalloc/trunk/runtime/FL2Allocator/PoolAllocator.cpp
    poolalloc/trunk/runtime/FL2Allocator/PoolAllocator.h

Modified: poolalloc/trunk/runtime/FL2Allocator/PoolAllocator.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/runtime/FL2Allocator/PoolAllocator.cpp?rev=117012&r1=117011&r2=117012&view=diff
==============================================================================
--- poolalloc/trunk/runtime/FL2Allocator/PoolAllocator.cpp (original)
+++ poolalloc/trunk/runtime/FL2Allocator/PoolAllocator.cpp Thu Oct 21 09:51:52 2010
@@ -883,6 +883,16 @@
   return to_return;
 }
 
+void *poolcalloc(PoolTy<NormalPoolTraits> *Pool,
+                 unsigned NumBytes,
+                 unsigned NumElements) {
+  void * p = poolalloc (Pool, NumBytes * NumElements);
+  if (p) {
+    memset (p, 0, NumBytes * NumElements);
+  }
+  return p;
+}
+
 void *poolmemalign(PoolTy<NormalPoolTraits> *Pool,
                    unsigned Alignment, unsigned NumBytes) {
   //punt and use pool alloc.

Modified: poolalloc/trunk/runtime/FL2Allocator/PoolAllocator.h
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/runtime/FL2Allocator/PoolAllocator.h?rev=117012&r1=117011&r2=117012&view=diff
==============================================================================
--- poolalloc/trunk/runtime/FL2Allocator/PoolAllocator.h (original)
+++ poolalloc/trunk/runtime/FL2Allocator/PoolAllocator.h Thu Oct 21 09:51:52 2010
@@ -189,6 +189,7 @@
   void poolmakeunfreeable(PoolTy<NormalPoolTraits> *Pool);
   void pooldestroy(PoolTy<NormalPoolTraits> *Pool);
   void *poolalloc(PoolTy<NormalPoolTraits> *Pool, unsigned NumBytes);
+  void *poolcalloc(PoolTy<NormalPoolTraits> *Pool, unsigned NumBytes, unsigned);
   void *poolrealloc(PoolTy<NormalPoolTraits> *Pool,
                     void *Node, unsigned NumBytes);
   void *poolmemalign(PoolTy<NormalPoolTraits> *Pool,



From criswell at uiuc.edu  Thu Oct 21 09:57:27 2010
From: criswell at uiuc.edu (John Criswell)
Date: Thu, 21 Oct 2010 14:57:27 -0000
Subject: [llvm-commits] [poolalloc] r117013 -
	/poolalloc/trunk/lib/DSA/StdLibPass.cpp
Message-ID: <20101021145727.605D82A6C12C@llvm.org>

Author: criswell
Date: Thu Oct 21 09:57:27 2010
New Revision: 117013

URL: http://llvm.org/viewvc/llvm-project?rev=117013&view=rev
Log:
Merge the return value of sc.get_actual_value() with its incoming pointer
argument.  This corrects failed checks in SAFECode.

Modified:
    poolalloc/trunk/lib/DSA/StdLibPass.cpp

Modified: poolalloc/trunk/lib/DSA/StdLibPass.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/DSA/StdLibPass.cpp?rev=117013&r1=117012&r2=117013&view=diff
==============================================================================
--- poolalloc/trunk/lib/DSA/StdLibPass.cpp (original)
+++ poolalloc/trunk/lib/DSA/StdLibPass.cpp Thu Oct 21 09:57:27 2010
@@ -160,7 +160,6 @@
   {"sc.pool_unregister_global", {NRET_NARGS, NRET_NARGS, NRET_NARGS, false, false, false}},
   {"sc.pool_register", {NRET_NARGS, NRET_NARGS, NRET_NARGS, false, false, false}},
   {"sc.pool_unregister", {NRET_NARGS, NRET_NARGS, NRET_NARGS, false, false, false}},
-  {"sc.get_actual_val", {NRET_NARGS, NRET_NARGS, NRET_NARGS, false, true, false}},
 
 #if 0
   {"remove",     {false, false, false,  true, false, false, false, false, false}},
@@ -396,6 +395,7 @@
   processRuntimeCheck (M, "sc.boundscheck");
   processRuntimeCheck (M, "sc.boundscheckui");
   processRuntimeCheck (M, "sc.exactcheck2");
+  processRuntimeCheck (M, "sc.get_actual_value");
 
   // In Local we marked nodes passed to/returned from 'StdLib' functions as External, because at
   // that point they were.  However they no longer are necessarily so, and we need to update accordingly.



From criswell at uiuc.edu  Thu Oct 21 09:57:55 2010
From: criswell at uiuc.edu (John Criswell)
Date: Thu, 21 Oct 2010 14:57:55 -0000
Subject: [llvm-commits] [poolalloc] r117014 -
	/poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp
Message-ID: <20101021145755.385B22A6C12C@llvm.org>

Author: criswell
Date: Thu Oct 21 09:57:55 2010
New Revision: 117014

URL: http://llvm.org/viewvc/llvm-project?rev=117014&view=rev
Log:
Have the initializer that intializes pools run first.

Modified:
    poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp

Modified: poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp?rev=117014&r1=117013&r2=117014&view=diff
==============================================================================
--- poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp (original)
+++ poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp Thu Oct 21 09:57:55 2010
@@ -149,6 +149,7 @@
   // order).
   //
   std::vector<Constant *> CurrentCtors;
+  CurrentCtors.push_back (RuntimeCtorInit);
   GlobalVariable * GVCtor = M.getNamedGlobal ("llvm.global_ctors");
   if (GVCtor) {
     if (Constant * C = GVCtor->getInitializer()) {
@@ -163,7 +164,6 @@
     //
     GVCtor->setName ("removed");
   }
-  CurrentCtors.push_back (RuntimeCtorInit);
 
   //
   // Create a new initializer.



From criswell at uiuc.edu  Thu Oct 21 09:59:59 2010
From: criswell at uiuc.edu (John Criswell)
Date: Thu, 21 Oct 2010 14:59:59 -0000
Subject: [llvm-commits] [poolalloc] r117015 -
 /poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp
Message-ID: <20101021145959.5E2972A6C12C@llvm.org>

Author: criswell
Date: Thu Oct 21 09:59:59 2010
New Revision: 117015

URL: http://llvm.org/viewvc/llvm-project?rev=117015&view=rev
Log:
Transform calloc() into poolcalloc().  This does two things:

1) It ensures that memset() is not called on a NULL pointer (in case the
allocation fails).

2) It fixes SAFECode run-time checks on calloc'ed memory (SAFECode assumes
that calloc() is transformed to poolcalloc() and that poolcalloc() does object
registration internall).

Modified:
    poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp

Modified: poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp?rev=117015&r1=117014&r2=117015&view=diff
==============================================================================
--- poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp (original)
+++ poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp Thu Oct 21 09:59:59 2010
@@ -450,56 +450,82 @@
   TransformAllocationInstr(MI, AllocSize);
 }
 
+//
+// Method: visitCallocCall()
+//
+// Description:
+//  Transform a call to calloc() to use a pool-allocation version of calloc.
+//  We do this because pool_calloc() must check for a NULL return value before
+//  zeroing out the memory.
+//
+void
+FuncTransform::visitCallocCall (CallSite CS) {
+  //
+  // Ensure that the calloc call has the correct number of arugments.
+  //
+  assert(CS.arg_end()-CS.arg_begin() == 2 && "calloc takes two arguments!");
+
+  //
+  // Ensure that the new instruction has the same name as the old one.  This is
+  // done by removing the name of the old instruction.
+  //
+  Instruction * I = CS.getInstruction();
+  std::string Name = I->getName(); I->setName("");
 
-void FuncTransform::visitCallocCall(CallSite CS) {
-  TargetData& TD = PAInfo.getAnalysis<TargetData>();
-  const Type* Int8Type = Type::getInt8Ty(CS.getInstruction()->getContext());
   const Type* Int32Type = Type::getInt32Ty(CS.getInstruction()->getContext());
-  const Type* Int64Type = Type::getInt64Ty(CS.getInstruction()->getContext());
 
-  // FIXME: This transform is not correct; calloc does not zero the memory
-  //        if NULL is returned.
   // FIXME: Ensure that we use 32/64-bit object length sizes consistently
-  // FIXME: Rename 'useLong' to something more descriptive?
   // FIXME: Introduce 'ObjectAllocationSize' variable
   //        or similar instead of repeatedly using same expression
-  // XXX: Start new review session here ***
-  bool useLong = TD.getTypeAllocSize(PointerType::getUnqual(Int8Type)) != 4;
 
-  Module *M = CS.getInstruction()->getParent()->getParent()->getParent();
-  assert(CS.arg_end()-CS.arg_begin() == 2 && "calloc takes two arguments!");
   Value *V1 = CS.getArgument(0);
   Value *V2 = CS.getArgument(1);
-  if (V1->getType() != V2->getType()) {
-    V1 = CastInst::CreateZExtOrBitCast(V1, useLong ? Int64Type : Int32Type, V1->getName(), CS.getInstruction());
-    V2 = CastInst::CreateZExtOrBitCast(V2, useLong ? Int64Type : Int32Type, V2->getName(), CS.getInstruction());
-  }
-
-  V2 = BinaryOperator::Create(Instruction::Mul, V1, V2, "size",
-                              CS.getInstruction());
-  if (V2->getType() != (useLong ? Int64Type : Int32Type))
-    V2 = CastInst::CreateZExtOrBitCast(V2, useLong ? Int64Type : Int32Type, V2->getName(), CS.getInstruction());
-
-  BasicBlock::iterator BBI =
-    TransformAllocationInstr(CS.getInstruction(), V2);
-  Value *Ptr = BBI++;
-
-  // We just turned the call of 'calloc' into the equivalent of malloc.  To
-  // finish calloc, we need to zero out the memory.
-  Constant *MemSet =  M->getOrInsertFunction((useLong ? "llvm.memset.i64" : "llvm.memset.i32"),
-                                             Type::getVoidTy(M->getContext()),
-                                             PointerType::getUnqual(Int8Type),
-                                             Int8Type, (useLong ? Int64Type : Int32Type),
-                                             Int32Type, NULL);
-
-  if (Ptr->getType() != PointerType::getUnqual(Int8Type))
-    Ptr = CastInst::CreatePointerCast(Ptr, PointerType::getUnqual(Int8Type), Ptr->getName(),
-                       BBI);
-  
-  // We know that the memory returned by poolalloc is at least 4 byte aligned.
-  Value* Opts[4] = {Ptr, ConstantInt::get(Int8Type, 0),
-                    V2,  ConstantInt::get(Int32Type, 4)};
-  CallInst::Create(MemSet, Opts, Opts + 4, "", BBI);
+  V1 = CastInst::CreateIntegerCast(V1, Int32Type, false, V1->getName(), I);
+  V2 = CastInst::CreateIntegerCast(V2, Int32Type, false, V2->getName(), I);
+
+  // Get the pool handle--
+  // Do not change the instruction into a poolalloc() call unless we have a
+  // real pool descriptor
+  Value *PH = getPoolHandle(CS.getInstruction());
+  if (PH == 0 || isa<ConstantPointerNull>(PH))
+    return;
+
+  //
+  // Create call to poolcalloc, and record the use of the pool
+  //
+  Value* Opts[3] = {PH, V1, V2};
+  Instruction *V = CallInst::Create(PAInfo.PoolCalloc, Opts, Opts + 3, Name, I);
+  AddPoolUse(*V, PH, PoolUses);
+
+  // Cast to the appropriate type if necessary
+  // FIXME: Make use of "castTo" utility function
+  Instruction *Casted = V;
+  if (V->getType() != I->getType())
+    Casted = CastInst::CreatePointerCast(V, I->getType(), V->getName(), I);
+
+  // Update def-use info
+  I->replaceAllUsesWith(Casted);
+
+  // If we are modifying the original function, update the DSGraph.
+  if (!FI.Clone) {
+    // V and Casted now point to whatever the original allocation did.
+    G->getScalarMap().replaceScalar(I, V);
+    if (V != Casted)
+      G->getScalarMap()[Casted] = G->getScalarMap()[V];
+  } else {             // Otherwise, update the NewToOldValueMap
+    UpdateNewToOldValueMap(I, V, V != Casted ? Casted : 0);
+  }
+
+  // If this was an invoke, fix up the CFG.
+  if (InvokeInst *II = dyn_cast<InvokeInst>(I)) {
+    // FIXME: Assert out since we potentially don't handle "invoke" correctly
+    BranchInst::Create (II->getNormalDest(), I);
+    II->getUnwindDest()->removePredecessor(II->getParent(), true);
+  }
+
+  // Remove old allocation instruction.
+  I->eraseFromParent();
+  return;
 }
 
 



From rafael.espindola at gmail.com  Thu Oct 21 10:27:04 2010
From: rafael.espindola at gmail.com (=?UTF-8?Q?Rafael_Esp=C3=ADndola?=)
Date: Thu, 21 Oct 2010 11:27:04 -0400
Subject: [llvm-commits] [rfc][patch] How should we handle
	_GLOBAL_OFFSET_TABLE_?
In-Reply-To: <AANLkTi=dgDD1=U5KJqgsDLvrGZTFxAAjA-xUctH_2kMr@mail.gmail.com>
References: <AANLkTi=sTA0ri5+r=-gSoi9MAJQkohwsh0o6MkqdT3TQ@mail.gmail.com>
	<AANLkTinD5uU-ANCPECjQ7y87yL-gw66jRXO5=AjweFua@mail.gmail.com>
	<AANLkTik-ueowNktvOdswg=8yKoQK_Tuka1Eh6UkjmvJb@mail.gmail.com>
	<AANLkTi=dgDD1=U5KJqgsDLvrGZTFxAAjA-xUctH_2kMr@mail.gmail.com>
Message-ID: <AANLkTim0FSNcwvobW0r8j2ubCSNkr7M1LhbFX4-ZL+0r@mail.gmail.com>

> I like that idea.

The attached patch implements it. Is it OK?

Cheers,
Rafael
-------------- next part --------------
A non-text attachment was scrubbed...
Name: offset.patch
Type: text/x-patch
Size: 4177 bytes
Desc: not available
Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101021/562dbb00/attachment.bin 

From criswell at uiuc.edu  Thu Oct 21 10:53:17 2010
From: criswell at uiuc.edu (John Criswell)
Date: Thu, 21 Oct 2010 15:53:17 -0000
Subject: [llvm-commits] [poolalloc] r117017 -
	/poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp
Message-ID: <20101021155317.3E8E72A6C12C@llvm.org>

Author: criswell
Date: Thu Oct 21 10:53:17 2010
New Revision: 117017

URL: http://llvm.org/viewvc/llvm-project?rev=117017&view=rev
Log:
Make order of global initializers work for both Mac OS X and Linux.

Modified:
    poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp

Modified: poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp
URL: http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp?rev=117017&r1=117016&r2=117017&view=diff
==============================================================================
--- poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp (original)
+++ poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp Thu Oct 21 10:53:17 2010
@@ -145,11 +145,9 @@
 
   //
   // Get the current set of static global constructors and add the new ctor
-  // to the end of the list (the list seems to be initialized in reverse
-  // order).
+  // to the list.
   //
   std::vector<Constant *> CurrentCtors;
-  CurrentCtors.push_back (RuntimeCtorInit);
   GlobalVariable * GVCtor = M.getNamedGlobal ("llvm.global_ctors");
   if (GVCtor) {
     if (Constant * C = GVCtor->getInitializer()) {
@@ -166,6 +164,16 @@
   }
 
   //
+  // The ctor list seems to be initialized in different orders on different
+  // platforms, and the priority settings don't seem to work.  Examine the
+  // module's platform string and take a best guess to the order.
+  //
+  if (M.getTargetTriple().find ("linux") == std::string::npos)
+    CurrentCtors.insert (CurrentCtors.begin(), RuntimeCtorInit);
+  else
+    CurrentCtors.push_back (RuntimeCtorInit);
+
+  //
   // Create a new initializer.
   //
   const ArrayType * AT = ArrayType::get (RuntimeCtorInit-> getType(),



From baldrick at free.fr  Thu Oct 21 11:02:12 2010
From: baldrick at free.fr (Duncan Sands)
Date: Thu, 21 Oct 2010 16:02:12 -0000
Subject: [llvm-commits] [llvm] r117020 -
	/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Message-ID: <20101021160212.716022A6C12C@llvm.org>

Author: baldrick
Date: Thu Oct 21 11:02:12 2010
New Revision: 117020

URL: http://llvm.org/viewvc/llvm-project?rev=117020&view=rev
Log:
Add parentheses to pacify gcc, which warns otherwise.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=117020&r1=117019&r2=117020&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Oct 21 11:02:12 2010
@@ -7483,7 +7483,7 @@
 SDValue
 X86TargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op,
                                            SelectionDAG &DAG) const {
-  assert(Subtarget->isTargetCygMing() || Subtarget->isTargetWindows() &&
+  assert((Subtarget->isTargetCygMing() || Subtarget->isTargetWindows()) &&
          "This should be used only on Windows targets");
   DebugLoc dl = Op.getDebugLoc();
 



From baldrick at free.fr  Thu Oct 21 11:03:28 2010
From: baldrick at free.fr (Duncan Sands)
Date: Thu, 21 Oct 2010 16:03:28 -0000
Subject: [llvm-commits] [llvm] r117021 - in /llvm/trunk/lib:
 CodeGen/TwoAddressInstructionPass.cpp Target/PowerPC/PPCISelLowering.cpp
 Target/X86/X86FloatingPoint.cpp
Message-ID: <20101021160328.9F1BA2A6C12C@llvm.org>

Author: baldrick
Date: Thu Oct 21 11:03:28 2010
New Revision: 117021

URL: http://llvm.org/viewvc/llvm-project?rev=117021&view=rev
Log:
Remove some variables that are never really used
(gcc-4.6 warns about these).

Modified:
    llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp
    llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
    llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp

Modified: llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp?rev=117021&r1=117020&r2=117021&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp (original)
+++ llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp Thu Oct 21 11:03:28 2010
@@ -1351,7 +1351,6 @@
       continue;
 
     // Insert a copy to replace the original.
-    MachineBasicBlock::iterator InsertLoc = SomeMI;
     MachineInstr *CopyMI = BuildMI(*SomeMI->getParent(), SomeMI,
                                    SomeMI->getDebugLoc(),
                                    TII->get(TargetOpcode::COPY))

Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=117021&r1=117020&r2=117021&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Thu Oct 21 11:03:28 2010
@@ -2144,7 +2144,6 @@
   // 16-byte aligned.
   nAltivecParamsAtEnd = 0;
   for (unsigned i = 0; i != NumOps; ++i) {
-    SDValue Arg = OutVals[i];
     ISD::ArgFlagsTy Flags = Outs[i].Flags;
     EVT ArgVT = Outs[i].VT;
     // Varargs Altivec parameters are padded to a 16 byte boundary.

Modified: llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp?rev=117021&r1=117020&r2=117021&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp Thu Oct 21 11:03:28 2010
@@ -1306,7 +1306,6 @@
 ///
 void FPS::handleSpecialFP(MachineBasicBlock::iterator &I) {
   MachineInstr *MI = I;
-  DebugLoc dl = MI->getDebugLoc();
   switch (MI->getOpcode()) {
   default: llvm_unreachable("Unknown SpecialFP instruction!");
   case X86::FpGET_ST0_32:// Appears immediately after a call returning FP type!



From baldrick at free.fr  Thu Oct 21 11:04:43 2010
From: baldrick at free.fr (Duncan Sands)
Date: Thu, 21 Oct 2010 16:04:43 -0000
Subject: [llvm-commits] [llvm] r117022 -
	/llvm/trunk/lib/CodeGen/RenderMachineFunction.cpp
Message-ID: <20101021160443.B069B2A6C12C@llvm.org>

Author: baldrick
Date: Thu Oct 21 11:04:43 2010
New Revision: 117022

URL: http://llvm.org/viewvc/llvm-project?rev=117022&view=rev
Log:
The variable liTRC is not used for anything useful, zap it
(gcc-4.6 warning).

Modified:
    llvm/trunk/lib/CodeGen/RenderMachineFunction.cpp

Modified: llvm/trunk/lib/CodeGen/RenderMachineFunction.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RenderMachineFunction.cpp?rev=117022&r1=117021&r2=117022&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RenderMachineFunction.cpp (original)
+++ llvm/trunk/lib/CodeGen/RenderMachineFunction.cpp Thu Oct 21 11:04:43 2010
@@ -463,14 +463,9 @@
          liItr != liEnd; ++liItr) {
       LiveInterval *li = liItr->second;
 
-      const TargetRegisterClass *liTRC;
-
       if (TargetRegisterInfo::isPhysicalRegister(li->reg))
         continue;
       
-      liTRC = mri->getRegClass(li->reg);
-     
-
       // For all ranges in the current interal.
       for (LiveInterval::iterator lrItr = li->begin(),
              lrEnd = li->end();



From baldrick at free.fr  Thu Oct 21 11:05:44 2010
From: baldrick at free.fr (Duncan Sands)
Date: Thu, 21 Oct 2010 16:05:44 -0000
Subject: [llvm-commits] [llvm] r117023 -
	/llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp
Message-ID: <20101021160544.3F52B2A6C12C@llvm.org>

Author: baldrick
Date: Thu Oct 21 11:05:44 2010
New Revision: 117023

URL: http://llvm.org/viewvc/llvm-project?rev=117023&view=rev
Log:
RetOp is not actually used for anything useful (though
it looks like maybe it was supposed to be used in the
test...), so zap it (gcc-4.6 warning).

Modified:
    llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp

Modified: llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp?rev=117023&r1=117022&r2=117023&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/MergeFunctions.cpp Thu Oct 21 11:05:44 2010
@@ -721,11 +721,9 @@
 
   // Verify that the terminator is a ret void (if we're void) or a ret of the
   // call's return, or a ret of a bitcast of the call's return.
-  const Value *RetOp = CI;
   if (const BitCastInst *BCI = dyn_cast<BitCastInst>(I)) {
     ++I;
     if (BCI->getOperand(0) != CI) return false;
-    RetOp = BCI;
   }
   if (RI != I) return false;
   if (RI->getNumOperands() == 0)



From baldrick at free.fr  Thu Oct 21 11:06:28 2010
From: baldrick at free.fr (Duncan Sands)
Date: Thu, 21 Oct 2010 16:06:28 -0000
Subject: [llvm-commits] [llvm] r117024 -
	/llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp
Message-ID: <20101021160628.B45402A6C12C@llvm.org>

Author: baldrick
Date: Thu Oct 21 11:06:28 2010
New Revision: 117024

URL: http://llvm.org/viewvc/llvm-project?rev=117024&view=rev
Log:
The return value of this call is not used, so no point
in assigning it to a variable (gcc-4.6 warning).

Modified:
    llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp?rev=117024&r1=117023&r2=117024&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp Thu Oct 21 11:06:28 2010
@@ -628,14 +628,13 @@
     case ARM::MOVsrl_flag:
     case ARM::MOVsra_flag: {
       // These are just fancy MOVs insructions.
-      MachineInstrBuilder MIB =
-        AddDefaultPred(BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVs),
-                               MI.getOperand(0).getReg())
-        .addOperand(MI.getOperand(1))
-        .addReg(0)
-        .addImm(ARM_AM::getSORegOpc((Opcode == ARM::MOVsrl_flag ? ARM_AM::lsr
-                                     : ARM_AM::asr), 1)))
-        .addReg(ARM::CPSR, RegState::Define);
+      AddDefaultPred(BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVs),
+                             MI.getOperand(0).getReg())
+      .addOperand(MI.getOperand(1))
+      .addReg(0)
+      .addImm(ARM_AM::getSORegOpc((Opcode == ARM::MOVsrl_flag ? ARM_AM::lsr
+                                   : ARM_AM::asr), 1)))
+      .addReg(ARM::CPSR, RegState::Define);
       MI.eraseFromParent();
       break;
     }



From baldrick at free.fr  Thu Oct 21 11:07:10 2010
From: baldrick at free.fr (Duncan Sands)
Date: Thu, 21 Oct 2010 16:07:10 -0000
Subject: [llvm-commits] [llvm] r117025 -
	/llvm/trunk/lib/AsmParser/LLParser.cpp
Message-ID: <20101021160710.9A2292A6C12C@llvm.org>

Author: baldrick
Date: Thu Oct 21 11:07:10 2010
New Revision: 117025

URL: http://llvm.org/viewvc/llvm-project?rev=117025&view=rev
Log:
AlignLoc is never used for anything - zap it (gcc-4.6 warning).

Modified:
    llvm/trunk/lib/AsmParser/LLParser.cpp

Modified: llvm/trunk/lib/AsmParser/LLParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/LLParser.cpp?rev=117025&r1=117024&r2=117025&view=diff
==============================================================================
--- llvm/trunk/lib/AsmParser/LLParser.cpp (original)
+++ llvm/trunk/lib/AsmParser/LLParser.cpp Thu Oct 21 11:07:10 2010
@@ -1199,8 +1199,7 @@
     
     if (Lex.getKind() != lltok::kw_align)
       return Error(Lex.getLoc(), "expected metadata or 'align'");
-    
-    LocTy AlignLoc = Lex.getLoc();
+
     if (ParseOptionalAlignment(Alignment)) return true;
   }
 



From fvbommel at gmail.com  Thu Oct 21 11:29:03 2010
From: fvbommel at gmail.com (Frits van Bommel)
Date: Thu, 21 Oct 2010 18:29:03 +0200
Subject: [llvm-commits] [rfc][patch] How should we handle
	_GLOBAL_OFFSET_TABLE_?
In-Reply-To: <AANLkTim0FSNcwvobW0r8j2ubCSNkr7M1LhbFX4-ZL+0r@mail.gmail.com>
References: <AANLkTi=sTA0ri5+r=-gSoi9MAJQkohwsh0o6MkqdT3TQ@mail.gmail.com>
	<AANLkTinD5uU-ANCPECjQ7y87yL-gw66jRXO5=AjweFua@mail.gmail.com>
	<AANLkTik-ueowNktvOdswg=8yKoQK_Tuka1Eh6UkjmvJb@mail.gmail.com>
	<AANLkTi=dgDD1=U5KJqgsDLvrGZTFxAAjA-xUctH_2kMr@mail.gmail.com>
	<AANLkTim0FSNcwvobW0r8j2ubCSNkr7M1LhbFX4-ZL+0r@mail.gmail.com>
Message-ID: <AANLkTim2M6pW+mVjxiU3Qi76geRAjwrTBvOozCPLbO0r@mail.gmail.com>

2010/10/21 Rafael Esp?ndola <rafael.espindola at gmail.com>:
> The attached patch implements it. Is it OK?

@@ -229,10 +230,12 @@ EmitImmediate(const MCOperand &DispOp, unsigned
Size, MCFixupKind FixupKind,
   // If we have an immoffset, add it to the expression.
   const MCExpr *Expr = DispOp.getExpr();

-  if (StartsWithGlobalOffsetTable(Expr)) {
+  if (FixupKind == FK_Data_4 && StartsWithGlobalOffsetTable(Expr)) {
     // FIXME: We should probably change the FixupKind to a special one so that
     // other parts of MC don't have to check the symbol name.
     assert(ImmOffset == 0);
+
+    FixupKind = MCFixupKind(X86::reloc_global_offset_table);

You should probably also remove that FIXME.


From bigcheesegs at gmail.com  Thu Oct 21 11:44:19 2010
From: bigcheesegs at gmail.com (Michael Spencer)
Date: Thu, 21 Oct 2010 12:44:19 -0400
Subject: [llvm-commits] [patch] Remember the VariantKind when
	recursively evaluating a variable
In-Reply-To: <AANLkTikahGydz4jxzoLBnraRpNYHy=pXqo2pwakLgO1G@mail.gmail.com>
References: <AANLkTikahGydz4jxzoLBnraRpNYHy=pXqo2pwakLgO1G@mail.gmail.com>
Message-ID: <AANLkTincNz_FjMt1iFOsB8Dne0H6K15057RU_GWoVQ8Y@mail.gmail.com>

2010/10/20 Rafael Esp?ndola <rafael.espindola at gmail.com>:
> This is an update to a patch I posted some time ago. It fixes relocations
> against aliases. Without this patch we would just forget the VariantKind.
>
> Another option is to just not recurse if the variant kind is not
> VK_None. This would match gnu as a bit better, but also requires a
> change to ?MCAssembler::EvaluateFixup so that it can handle aliases
> correctly.
>
> Is the patch OK?
>
> Cheers,
> Rafael
>

There's no reason to add the MCContext arguments everywhere. It is
accessible via Layout->getAssembler().getContext()

I don't fully understand the changes to EvaluateAsRelocatableImpl. Are
we just recreating the expression? This looks like a hack to me.

- Michael Spencer


From ggreif at gmail.com  Thu Oct 21 11:55:54 2010
From: ggreif at gmail.com (Gabor Greif)
Date: Thu, 21 Oct 2010 18:55:54 +0200
Subject: [llvm-commits] [PATCH] Peephole Infrastructure improvements and
	(ARM, T, T2) TSTrr optimizations
Message-ID: <AANLkTi=Zh7SLJAHG_Uf2TBweKQvZ9_8UFbEbeWPkwrTz@mail.gmail.com>

Hi all,

the last weeks I've been working on a flexible infrastructure for
peephole optimizations, which is potentially target independent and
extensible without needing interface changes.

The result of my work is attached. It moves all current ARM peepholes
over to the new architecture and adds TSTrr-related optimizations too.

The ordering and forward referencing of functions is still suboptimal,
but this is only done to keep the patch size manageable. I plan to
reorder in a cleanup commit after this patch has landed. Also some
currently freestanding functions will become methods.

You can also see the code in its entirety here:
<http://llvm.org/viewvc/llvm-project/llvm/branches/ggreif/peephole-infrastructure/>

Feedback is welcome.

Cheers,

    Gabor
-------------- next part --------------
A non-text attachment was scrubbed...
Name: peephole.patch
Type: application/octet-stream
Size: 18381 bytes
Desc: not available
Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101021/8f54b166/attachment.obj 

From rafael.espindola at gmail.com  Thu Oct 21 12:00:22 2010
From: rafael.espindola at gmail.com (=?UTF-8?Q?Rafael_Esp=C3=ADndola?=)
Date: Thu, 21 Oct 2010 13:00:22 -0400
Subject: [llvm-commits] [rfc][patch] How should we handle
	_GLOBAL_OFFSET_TABLE_?
In-Reply-To: <AANLkTim2M6pW+mVjxiU3Qi76geRAjwrTBvOozCPLbO0r@mail.gmail.com>
References: <AANLkTi=sTA0ri5+r=-gSoi9MAJQkohwsh0o6MkqdT3TQ@mail.gmail.com>
	<AANLkTinD5uU-ANCPECjQ7y87yL-gw66jRXO5=AjweFua@mail.gmail.com>
	<AANLkTik-ueowNktvOdswg=8yKoQK_Tuka1Eh6UkjmvJb@mail.gmail.com>
	<AANLkTi=dgDD1=U5KJqgsDLvrGZTFxAAjA-xUctH_2kMr@mail.gmail.com>
	<AANLkTim0FSNcwvobW0r8j2ubCSNkr7M1LhbFX4-ZL+0r@mail.gmail.com>
	<AANLkTim2M6pW+mVjxiU3Qi76geRAjwrTBvOozCPLbO0r@mail.gmail.com>
Message-ID: <AANLkTik7GovT5SyHiNhaS48ZVEwTP=jjPtdw_SzL8Mx7@mail.gmail.com>

> You should probably also remove that FIXME.

Done.

Thanks,
Rafael
-------------- next part --------------
A non-text attachment was scrubbed...
Name: offset.patch
Type: text/x-patch
Size: 3927 bytes
Desc: not available
Url : http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101021/858c1575/attachment.bin 

From espindola at google.com  Thu Oct 21 12:10:58 2010
From: espindola at google.com (Rafael Espindola)
Date: Thu, 21 Oct 2010 13:10:58 -0400
Subject: [llvm-commits] PATCH: llvm-gcc option to emit "va_arg"
	instruction
In-Reply-To: <AANLkTi=FtxPwTdTN=vcC71QV=EGC8WQTQ0f8BqD+bA2t@mail.gmail.com>
References: <AANLkTi=vYBxc7YnUsJBO_tKJWGf4JS8Pz1_m42GCdt9n@mail.gmail.com>
	<AANLkTimdE+bURYzX4aexJ2Pe5LcDhoYH9FndWCrmkJ_=@mail.gmail.com>
	<2CC138C3-4628-400A-AAEF-A030A21843A2@apple.com>
	<AANLkTi=EKHqEFChK_E4qD6DuUezFbOiLF30D1LtPv2UO@mail.gmail.com>
	<AANLkTikjjK2p0BrTO3r6wqrd4a_UR=eSstzU9qOjByde@mail.gmail.com>
	<2646F00C-CDF0-402D-8C90-561B2C4B3B45@apple.com>
	<AANLkTik17kbC7po__qPuE_mnvYwctF5HLEbuAm-mdU1t@mail.gmail.com>
	<146F714B-AF1A-462F-B3F9-003E6EB2AE7D@apple.com>
	<4CB765E1.7060208@free.fr>
	<AANLkTikTRefbzond8tKHVM+f_XhRNFvsEEGWMQkNXFRY@mail.gmail.com>
	<4CB9974A.5020004@free.fr>
	<AANLkTi=FtxPwTdTN=vcC71QV=EGC8WQTQ0f8BqD+bA2t@mail.gmail.com>
Message-ID: <AANLkTi=DaEhHnAy=m0E-7NwpTCxNSk+p5nF-Zyhof3=R@mail.gmail.com>

> Of course it is possible to modify the gimplifier to keep VA_ARG_EXPR in the
> tree. I suspect this approach may require additional changes. If anything
> else looks at the GIMPLE tree, it would need to know how to handle
> VA_ARG_EXPR. Also, as a consequence, the llvm-gcc GIMPLE representation
> would no longer match mainline gcc's?(but perhaps that is already the case
> with some of your other modifications).

It used to be the case that you could build llvm-gcc without
--enable-llvm. Not sure if anyone cares about it at this point...

> - David M
>
>


Cheers,
-- 
Rafael ?vila de Esp?ndola


From echristo at apple.com  Thu Oct 21 12:17:09 2010
From: echristo at apple.com (Eric Christopher)
Date: Thu, 21 Oct 2010 10:17:09 -0700
Subject: [llvm-commits] [llvm] r117004 - in /llvm/trunk:
	include/llvm/ExecutionEngine/ExecutionEngine.h
	lib/ExecutionEngine/ExecutionEngine.cpp
	lib/ExecutionEngine/JIT/JIT.cpp
In-Reply-To: <20101021085730.134E72A6C12C@llvm.org>
References: <20101021085730.134E72A6C12C@llvm.org>
Message-ID: <34176647-780B-40F7-BD4F-AA2AD0630A5E@apple.com>


On Oct 21, 2010, at 1:57 AM, Duncan Sands wrote:

> #if defined(__APPLE__) && MAC_OS_X_VERSION_MAX_ALLOWED <= 1050
> # define USE_KEYMGR 1
> @@ -318,8 +319,10 @@
>     LOI = (LibgccObjectInfo*)calloc(sizeof(struct LibgccObjectInfo), 1); 
>   _keymgr_set_and_unlock_processwide_ptr(KEYMGR_GCC3_DW2_OBJ_LIST, LOI);
>   InstallExceptionTableRegister(DarwinRegisterFrame);
> +  // Not sure about how to deregister on Darwin.
> #else

Wonder if we can just get rid of the old keymgr code at this point?

-eric
-------------- next part --------------
An HTML attachment was scrubbed...
URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101021/b5d4bec2/attachment.html 

From enderby at apple.com  Thu Oct 21 12:16:46 2010
From: enderby at apple.com (Kevin Enderby)
Date: Thu, 21 Oct 2010 17:16:46 -0000
Subject: [llvm-commits] [llvm] r117031 - in /llvm/trunk:
 lib/Target/X86/AsmParser/X86AsmParser.cpp lib/Target/X86/X86InstrFPStack.td
 lib/Target/X86/X86InstrSystem.td test/MC/X86/x86-32-coverage.s
 test/MC/X86/x86-32.s test/MC/X86/x86-64.s
Message-ID: <20101021171646.6A4DB2A6C12C@llvm.org>

Author: enderby
Date: Thu Oct 21 12:16:46 2010
New Revision: 117031

URL: http://llvm.org/viewvc/llvm-project?rev=117031&view=rev
Log:
More tweaks to X86 instructions to allow the 'w' suffix in places it makes
sense, when the instruction takes the 16-bit ax register or m16 memory
location.  These changes to llvm-mc matches what the darwin assembler allows
for these instructions.  Also added the missing flex (without the wait prefix)
and ud2a as an alias to ud2 (still to add ud2b).

Modified:
    llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
    llvm/trunk/lib/Target/X86/X86InstrFPStack.td
    llvm/trunk/lib/Target/X86/X86InstrSystem.td
    llvm/trunk/test/MC/X86/x86-32-coverage.s
    llvm/trunk/test/MC/X86/x86-32.s
    llvm/trunk/test/MC/X86/x86-64.s

Modified: llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp?rev=117031&r1=117030&r2=117031&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp (original)
+++ llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp Thu Oct 21 12:16:46 2010
@@ -703,6 +703,7 @@
     .Case("fwait", "wait")
     .Case("movzx", "movzb")  // FIXME: Not correct.
     .Case("fildq", "fildll")
+    .Case("ud2a", "ud2")
     .Default(Name);
 
   // FIXME: Hack to recognize cmp<comparison code>{ss,sd,ps,pd}.
@@ -1175,9 +1176,10 @@
 
   // First, handle aliases that expand to multiple instructions.
   // FIXME: This should be replaced with a real .td file alias mechanism.
-  if (Op->getToken() == "fstsw" || Op->getToken() == "fstcw" ||
+  if (Op->getToken() == "fstsw" || Op->getToken() == "fstsww" ||
+      Op->getToken() == "fstcw" || Op->getToken() == "fstcww" ||
       Op->getToken() == "finit" || Op->getToken() == "fsave" ||
-      Op->getToken() == "fstenv") {
+      Op->getToken() == "fstenv" || Op->getToken() == "fclex") {
     MCInst Inst;
     Inst.setOpcode(X86::WAIT);
     Out.EmitInstruction(Inst);
@@ -1187,8 +1189,11 @@
         .Case("finit", "fninit")
         .Case("fsave", "fnsave")
         .Case("fstcw", "fnstcw")
+        .Case("fstcww", "fnstcw")
         .Case("fstenv", "fnstenv")
         .Case("fstsw", "fnstsw")
+        .Case("fstsww", "fnstsw")
+        .Case("fclex", "fnclex")
         .Default(0);
     assert(Repl && "Unknown wait-prefixed instruction");
     delete Operands[0];

Modified: llvm/trunk/lib/Target/X86/X86InstrFPStack.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFPStack.td?rev=117031&r1=117030&r2=117031&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrFPStack.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrFPStack.td Thu Oct 21 12:16:46 2010
@@ -340,7 +340,7 @@
 
 def FRSTORm  : FPI<0xDD, MRM4m, (outs f32mem:$dst), (ins), "frstor\t$dst">;
 def FSAVEm   : FPI<0xDD, MRM6m, (outs f32mem:$dst), (ins), "fnsave\t$dst">;
-def FNSTSWm  : FPI<0xDD, MRM7m, (outs f32mem:$dst), (ins), "fnstsw\t$dst">;
+def FNSTSWm  : FPI<0xDD, MRM7m, (outs f32mem:$dst), (ins), "fnstsw{w}\t$dst">;
 
 def FICOM16m : FPI<0xDE, MRM2m, (outs), (ins i16mem:$src), "ficom{s}\t$src">;
 def FICOMP16m: FPI<0xDE, MRM3m, (outs), (ins i16mem:$src), "ficomp{s}\t$src">;
@@ -600,12 +600,12 @@
                   (outs), (ins), "fnstsw %ax", []>, DF;
 
 def FNSTCW16m : I<0xD9, MRM7m,                   // [mem16] = X87 control world
-                  (outs), (ins i16mem:$dst), "fnstcw\t$dst",
+                  (outs), (ins i16mem:$dst), "fnstcw{w}\t$dst",
                   [(X86fp_cwd_get16 addr:$dst)]>;
                   
 let mayLoad = 1 in
 def FLDCW16m  : I<0xD9, MRM5m,                   // X87 control world = [mem16]
-                  (outs), (ins i16mem:$dst), "fldcw\t$dst", []>;
+                  (outs), (ins i16mem:$dst), "fldcw{w}\t$dst", []>;
 
 // FPU control instructions
 def FNINIT : I<0xE3, RawFrm, (outs), (ins), "fninit", []>, DB;

Modified: llvm/trunk/lib/Target/X86/X86InstrSystem.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSystem.td?rev=117031&r1=117030&r2=117031&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSystem.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSystem.td Thu Oct 21 12:16:46 2010
@@ -310,13 +310,13 @@
 
 
 def VERRr : I<0x00, MRM4r, (outs), (ins GR16:$seg),
-              "verr\t$seg", []>, TB;
+              "verr{w}\t$seg", []>, TB;
 def VERRm : I<0x00, MRM4m, (outs), (ins i16mem:$seg),
-              "verr\t$seg", []>, TB;
+              "verr{w}\t$seg", []>, TB;
 def VERWr : I<0x00, MRM5r, (outs), (ins GR16:$seg),
-              "verw\t$seg", []>, TB;
+              "verw{w}\t$seg", []>, TB;
 def VERWm : I<0x00, MRM5m, (outs), (ins i16mem:$seg),
-              "verw\t$seg", []>, TB;
+              "verw{w}\t$seg", []>, TB;
 
 //===----------------------------------------------------------------------===//
 // Descriptor-table support instructions

Modified: llvm/trunk/test/MC/X86/x86-32-coverage.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86-32-coverage.s?rev=117031&r1=117030&r2=117031&view=diff
==============================================================================
--- llvm/trunk/test/MC/X86/x86-32-coverage.s (original)
+++ llvm/trunk/test/MC/X86/x86-32-coverage.s Thu Oct 21 12:16:46 2010
@@ -474,10 +474,10 @@
 // CHECK: 	fabs
         	fabs
 
-// CHECK: 	fldcw	3735928559(%ebx,%ecx,8)
+// CHECK: 	fldcww	3735928559(%ebx,%ecx,8)
         	fldcw	0xdeadbeef(%ebx,%ecx,8)
 
-// CHECK: 	fnstcw	3735928559(%ebx,%ecx,8)
+// CHECK: 	fnstcww	3735928559(%ebx,%ecx,8)
         	fnstcw	0xdeadbeef(%ebx,%ecx,8)
 
 // CHECK: 	rdtsc
@@ -3702,35 +3702,35 @@
 // CHECK:  encoding: [0x0f,0x00,0x0d,0xed,0x7e,0x00,0x00]
         	strw	0x7eed
 
-// CHECK: verr	%bx
+// CHECK: verrw	%bx
 // CHECK:  encoding: [0x0f,0x00,0xe3]
         	verr	%bx
 
-// CHECK: verr	3735928559(%ebx,%ecx,8)
+// CHECK: verrw	3735928559(%ebx,%ecx,8)
 // CHECK:  encoding: [0x0f,0x00,0xa4,0xcb,0xef,0xbe,0xad,0xde]
         	verr	0xdeadbeef(%ebx,%ecx,8)
 
-// CHECK: verr	3133065982
+// CHECK: verrw	3133065982
 // CHECK:  encoding: [0x0f,0x00,0x25,0xfe,0xca,0xbe,0xba]
         	verr	0xbabecafe
 
-// CHECK: verr	305419896
+// CHECK: verrw	305419896
 // CHECK:  encoding: [0x0f,0x00,0x25,0x78,0x56,0x34,0x12]
         	verr	0x12345678
 
-// CHECK: verw	%bx
+// CHECK: verww	%bx
 // CHECK:  encoding: [0x0f,0x00,0xeb]
         	verw	%bx
 
-// CHECK: verw	3735928559(%ebx,%ecx,8)
+// CHECK: verww	3735928559(%ebx,%ecx,8)
 // CHECK:  encoding: [0x0f,0x00,0xac,0xcb,0xef,0xbe,0xad,0xde]
         	verw	0xdeadbeef(%ebx,%ecx,8)
 
-// CHECK: verw	3133065982
+// CHECK: verww	3133065982
 // CHECK:  encoding: [0x0f,0x00,0x2d,0xfe,0xca,0xbe,0xba]
         	verw	0xbabecafe
 
-// CHECK: verw	305419896
+// CHECK: verww	305419896
 // CHECK:  encoding: [0x0f,0x00,0x2d,0x78,0x56,0x34,0x12]
         	verw	0x12345678
 
@@ -4290,39 +4290,39 @@
 // CHECK:  encoding: [0xdb,0xe3]
         	fninit
 
-// CHECK: fldcw	3735928559(%ebx,%ecx,8)
+// CHECK: fldcww	3735928559(%ebx,%ecx,8)
 // CHECK:  encoding: [0xd9,0xac,0xcb,0xef,0xbe,0xad,0xde]
         	fldcw	0xdeadbeef(%ebx,%ecx,8)
 
-// CHECK: fldcw	3133065982
+// CHECK: fldcww	3133065982
 // CHECK:  encoding: [0xd9,0x2d,0xfe,0xca,0xbe,0xba]
         	fldcw	0xbabecafe
 
-// CHECK: fldcw	305419896
+// CHECK: fldcww	305419896
 // CHECK:  encoding: [0xd9,0x2d,0x78,0x56,0x34,0x12]
         	fldcw	0x12345678
 
-// CHECK: fnstcw	3735928559(%ebx,%ecx,8)
+// CHECK: fnstcww	3735928559(%ebx,%ecx,8)
 // CHECK:  encoding: [0xd9,0xbc,0xcb,0xef,0xbe,0xad,0xde]
         	fnstcw	0xdeadbeef(%ebx,%ecx,8)
 
-// CHECK: fnstcw	3133065982
+// CHECK: fnstcww	3133065982
 // CHECK:  encoding: [0xd9,0x3d,0xfe,0xca,0xbe,0xba]
         	fnstcw	0xbabecafe
 
-// CHECK: fnstcw	305419896
+// CHECK: fnstcww	305419896
 // CHECK:  encoding: [0xd9,0x3d,0x78,0x56,0x34,0x12]
         	fnstcw	0x12345678
 
-// CHECK: fnstsw	3735928559(%ebx,%ecx,8)
+// CHECK: fnstsww	3735928559(%ebx,%ecx,8)
 // CHECK:  encoding: [0xdd,0xbc,0xcb,0xef,0xbe,0xad,0xde]
         	fnstsw	0xdeadbeef(%ebx,%ecx,8)
 
-// CHECK: fnstsw	3133065982
+// CHECK: fnstsww	3133065982
 // CHECK:  encoding: [0xdd,0x3d,0xfe,0xca,0xbe,0xba]
         	fnstsw	0xbabecafe
 
-// CHECK: fnstsw	305419896
+// CHECK: fnstsww	305419896
 // CHECK:  encoding: [0xdd,0x3d,0x78,0x56,0x34,0x12]
         	fnstsw	0x12345678
 
@@ -13553,28 +13553,28 @@
 // CHECK: 	strw	32493
         	strw	0x7eed
 
-// CHECK: 	verr	%bx
+// CHECK: 	verrw	%bx
         	verr	%bx
 
-// CHECK: 	verr	3735928559(%ebx,%ecx,8)
+// CHECK: 	verrw	3735928559(%ebx,%ecx,8)
         	verr	0xdeadbeef(%ebx,%ecx,8)
 
-// CHECK: 	verr	3133065982
+// CHECK: 	verrw	3133065982
         	verr	0xbabecafe
 
-// CHECK: 	verr	305419896
+// CHECK: 	verrw	305419896
         	verr	0x12345678
 
-// CHECK: 	verw	%bx
+// CHECK: 	verww	%bx
         	verw	%bx
 
-// CHECK: 	verw	3735928559(%ebx,%ecx,8)
+// CHECK: 	verww	3735928559(%ebx,%ecx,8)
         	verw	0xdeadbeef(%ebx,%ecx,8)
 
-// CHECK: 	verw	3133065982
+// CHECK: 	verww	3133065982
         	verw	0xbabecafe
 
-// CHECK: 	verw	305419896
+// CHECK: 	verww	305419896
         	verw	0x12345678
 
 // CHECK: 	fld	%st(2)
@@ -14012,31 +14012,31 @@
 // CHECK: 	fninit
         	fninit
 
-// CHECK: 	fldcw	3735928559(%ebx,%ecx,8)
+// CHECK: 	fldcww	3735928559(%ebx,%ecx,8)
         	fldcw	0xdeadbeef(%ebx,%ecx,8)
 
-// CHECK: 	fldcw	3133065982
+// CHECK: 	fldcww	3133065982
         	fldcw	0xbabecafe
 
-// CHECK: 	fldcw	305419896
+// CHECK: 	fldcww	305419896
         	fldcw	0x12345678
 
-// CHECK: 	fnstcw	3735928559(%ebx,%ecx,8)
+// CHECK: 	fnstcww	3735928559(%ebx,%ecx,8)
         	fnstcw	0xdeadbeef(%ebx,%ecx,8)
 
-// CHECK: 	fnstcw	3133065982
+// CHECK: 	fnstcww	3133065982
         	fnstcw	0xbabecafe
 
-// CHECK: 	fnstcw	305419896
+// CHECK: 	fnstcww	305419896
         	fnstcw	0x12345678
 
-// CHECK: 	fnstsw	3735928559(%ebx,%ecx,8)
+// CHECK: 	fnstsww	3735928559(%ebx,%ecx,8)
         	fnstsw	0xdeadbeef(%ebx,%ecx,8)
 
-// CHECK: 	fnstsw	3133065982
+// CHECK: 	fnstsww	3133065982
         	fnstsw	0xbabecafe
 
-// CHECK: 	fnstsw	305419896
+// CHECK: 	fnstsww	305419896
         	fnstsw	0x12345678
 
 // CHECK: 	fnclex

Modified: llvm/trunk/test/MC/X86/x86-32.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86-32.s?rev=117031&r1=117030&r2=117031&view=diff
==============================================================================
--- llvm/trunk/test/MC/X86/x86-32.s (original)
+++ llvm/trunk/test/MC/X86/x86-32.s Thu Oct 21 12:16:46 2010
@@ -702,3 +702,67 @@
 // CHECK: sidt	4(%eax)
 // CHECK:  encoding: [0x0f,0x01,0x48,0x04]
         	sidtl	4(%eax)
+
+// CHECK: verrw	2(%eax)
+// CHECK:  encoding: [0x0f,0x00,0x60,0x02]
+        	verrw	2(%eax)
+
+// CHECK: verrw	2(%eax)
+// CHECK:  encoding: [0x0f,0x00,0x60,0x02]
+        	verr	2(%eax)
+
+// CHECK: verrw	%bx
+// CHECK:  encoding: [0x0f,0x00,0xe3]
+        	verrw	%bx
+
+// CHECK: verrw	%bx
+// CHECK:  encoding: [0x0f,0x00,0xe3]
+        	verr	%bx
+
+// CHECK: verww	2(%eax)
+// CHECK:  encoding: [0x0f,0x00,0x68,0x02]
+        	verww	2(%eax)
+
+// CHECK: verww	2(%eax)
+// CHECK:  encoding: [0x0f,0x00,0x68,0x02]
+        	verw	2(%eax)
+
+// CHECK: verww	%bx
+// CHECK:  encoding: [0x0f,0x00,0xeb]
+        	verww	%bx
+
+// CHECK: verww	%bx
+// CHECK:  encoding: [0x0f,0x00,0xeb]
+        	verw	%bx
+
+// CHECK: fldcww	6(%ecx)
+// CHECK:  encoding: [0xd9,0x69,0x06]
+        	fldcw	6(%ecx)
+
+// CHECK: fldcww	6(%ecx)
+// CHECK:  encoding: [0xd9,0x69,0x06]
+        	fldcww	6(%ecx)
+
+// CHECK: fnstcww	6(%ecx)
+// CHECK:  encoding: [0xd9,0x79,0x06]
+        	fnstcw	6(%ecx)
+
+// CHECK: fnstcww	6(%ecx)
+// CHECK:  encoding: [0xd9,0x79,0x06]
+        	fnstcww	6(%ecx)
+
+// CHECK: wait
+// CHECK:  encoding: [0x9b]
+        	fstsw	%ax
+
+// CHECK: wait
+// CHECK:  encoding: [0x9b]
+        	fstsww	0x7eed
+
+// CHECK: wait
+// CHECK:  encoding: [0x9b]
+        	fclex
+
+// CHECK: ud2
+// CHECK:  encoding: [0x0f,0x0b]
+        	ud2a

Modified: llvm/trunk/test/MC/X86/x86-64.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86-64.s?rev=117031&r1=117030&r2=117031&view=diff
==============================================================================
--- llvm/trunk/test/MC/X86/x86-64.s (original)
+++ llvm/trunk/test/MC/X86/x86-64.s Thu Oct 21 12:16:46 2010
@@ -427,17 +427,17 @@
 // CHECK: fnstsw %ax
 fstsw (%rax)
 // CHECK: wait
-// CHECK: fnstsw (%rax)
+// CHECK: fnstsww (%rax)
 
 // PR8259
 fstcw (%rsp)
 // CHECK: wait
-// CHECK: fnstcw (%rsp)
+// CHECK: fnstcww (%rsp)
 
 // PR8259
 fstcw (%rsp)
 // CHECK: wait
-// CHECK: fnstcw (%rsp)
+// CHECK: fnstcww (%rsp)
 
 // PR8258
 finit



From rafael.espindola at gmail.com  Thu Oct 21 12:28:37 2010
From: rafael.espindola at gmail.com (=?UTF-8?Q?Rafael_Esp=C3=ADndola?=)
Date: Thu, 21 Oct 2010 13:28:37 -0400
Subject: [llvm-commits] [patch] Remember the VariantKind when
	recursively evaluating a variable
In-Reply-To: <AANLkTincNz_FjMt1iFOsB8Dne0H6K15057RU_GWoVQ8Y@mail.gmail.com>
References: <AANLkTikahGydz4jxzoLBnraRpNYHy=pXqo2pwakLgO1G@mail.gmail.com>
	<AANLkTincNz_FjMt1iFOsB8Dne0H6K15057RU_GWoVQ8Y@mail.gmail.com>
Message-ID: <AANLkTi=RPvCQm=dVqrzzv8dO9zT_wCsQ3EEev-tgAJd5@mail.gmail.com>

> There's no reason to add the MCContext arguments everywhere. It is
> accessible via Layout->getAssembler().getContext()

But the Layout can be NULL. In the cases where it is NULL the caller
can still provide at least a context so that we can allocate a new
expression.

> I don't fully understand the changes to EvaluateAsRelocatableImpl. Are
> we just recreating the expression? This looks like a hack to me.

It is one of two evils. Not sure if the lesser one. It is for cases like

foo:
bar = foo
        call bar at PLT

The assembler can produce a relocation to foo or bar, but it *has* to
be a R_X86_64_PLT32. The first evil (that I implemented) is to recurse
as we normally do but remember the variant kind. We then construct a
foo at PLT expression that is handled back and that is why we need the
context.

The other possible evil is to just return bar at PLT. But then we have to
change places that expect EvaluateAsRelocatable to go all the way
(MCAssembler::EvaluateFixup at least). It looks like this would match
gnu as a bit better.

A variation of the first option is to have
MCExpr::EvaluateAsRelocatableImpl "return" a variant kind instead of
creating a new expression.

> - Michael Spencer
>

Cheers,
Rafael

From rafael.espindola at gmail.com  Thu Oct 21 13:00:20 2010
From: rafael.espindola at gmail.com (Rafael Espindola)
Date: Thu, 21 Oct 2010 18:00:20 -0000
Subject: [llvm-commits] [llvm] r117037 - in /llvm/trunk: lib/MC/MCExpr.cpp
	test/MC/ELF/alias-reloc.s
Message-ID: <20101021180020.F0B942A6C12C@llvm.org>

Author: rafael
Date: Thu Oct 21 13:00:20 2010
New Revision: 117037

URL: http://llvm.org/viewvc/llvm-project?rev=117037&view=rev
Log:
Do not recurse into symbol refs that have a variant kind. This prevents us
from losing the variant when producing a relocation on an alias.

Added:
    llvm/trunk/test/MC/ELF/alias-reloc.s
Modified:
    llvm/trunk/lib/MC/MCExpr.cpp

Modified: llvm/trunk/lib/MC/MCExpr.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCExpr.cpp?rev=117037&r1=117036&r2=117037&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCExpr.cpp (original)
+++ llvm/trunk/lib/MC/MCExpr.cpp Thu Oct 21 13:00:20 2010
@@ -306,7 +306,7 @@
     const MCSymbol &Sym = SRE->getSymbol();
 
     // Evaluate recursively if this is a variable.
-    if (Sym.isVariable())
+    if (Sym.isVariable() && SRE->getKind() == MCSymbolRefExpr::VK_None)
       return Sym.getVariableValue()->EvaluateAsRelocatableImpl(Res, Layout,
                                                                true);
 

Added: llvm/trunk/test/MC/ELF/alias-reloc.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/alias-reloc.s?rev=117037&view=auto
==============================================================================
--- llvm/trunk/test/MC/ELF/alias-reloc.s (added)
+++ llvm/trunk/test/MC/ELF/alias-reloc.s Thu Oct 21 13:00:20 2010
@@ -0,0 +1,16 @@
+// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump  | FileCheck %s
+
+// Test that this produces a R_X86_64_PLT32. We produce a relocation with foo
+// and gas with bar, but both should be OK as long as the type is correct.
+        .globl foo
+foo:
+bar = foo
+        call bar at PLT
+
+// CHECK:       # Relocation 0
+// CHECK-NEXT:  (('r_offset',
+// CHECK-NEXT:   ('r_sym',
+// CHECK-NEXT:   ('r_type', 0x00000004)
+// CHECK-NEXT:   ('r_addend',
+// CHECK-NEXT:  ),
+// CHECK-NEXT: ])



From rafael.espindola at gmail.com  Thu Oct 21 13:04:45 2010
From: rafael.espindola at gmail.com (=?UTF-8?Q?Rafael_Esp=C3=ADndola?=)
Date: Thu, 21 Oct 2010 14:04:45 -0400
Subject: [llvm-commits] [patch] Remember the VariantKind when
	recursively evaluating a variable
In-Reply-To: <AANLkTi=RPvCQm=dVqrzzv8dO9zT_wCsQ3EEev-tgAJd5@mail.gmail.com>
References: <AANLkTikahGydz4jxzoLBnraRpNYHy=pXqo2pwakLgO1G@mail.gmail.com>
	<AANLkTincNz_FjMt1iFOsB8Dne0H6K15057RU_GWoVQ8Y@mail.gmail.com>
	<AANLkTi=RPvCQm=dVqrzzv8dO9zT_wCsQ3EEev-tgAJd5@mail.gmail.com>
Message-ID: <AANLkTikD+UkAcmaf-kHau=L0sF2zQ-HFYcdwS4WK7cVF@mail.gmail.com>

> The other possible evil is to just return bar at PLT. But then we have to
> change places that expect EvaluateAsRelocatable to go all the way
> (MCAssembler::EvaluateFixup at least). It looks like this would match
> gnu as a bit better.

I checked this in for now. It is much simpler than the previous patch and the
only issue it might have is producing a correct relocation when the reference
could have been fully resolved.

Thanks for pushing me in the right direction :-)

Cheers,
Rafael

From jasonwkim at google.com  Thu Oct 21 13:07:04 2010
From: jasonwkim at google.com (Jason Kim)
Date: Thu, 21 Oct 2010 11:07:04 -0700
Subject: [llvm-commits] Fwd: Proof of concept patch for unifying the
 .s/ELF emission of .ARM.attributes
In-Reply-To: <AANLkTinxWGCVcq1=0rVa-bbMSC2dqKUy5z4m5q_nkQOJ@mail.gmail.com>
References: <AANLkTikSjtvxSNc0oxKEoG2LdGriz10OXOTAtC4caR_+@mail.gmail.com>
	<AANLkTikaS4qjUi+5q3YWt_GF5EdWKVNwxq7=-LyWRRpv@mail.gmail.com>
	<AANLkTinH7mZtZSQKDYMOE9C8-0baHwm31crmp30roWKy@mail.gmail.com>
	<AANLkTimhWm3dCbO003ipXkaDS3f0o948b9b2NquVSe29@mail.gmail.com>
	<AANLkTi=2B7Pk9HkkxYvQBvm-AfJsYCHW8uYxURq5iEcd@mail.gmail.com>
	<AANLkTi=iVAmVx08ww0EOu9DvJ82oxWD+02Es3btVSqK2@mail.gmail.com>
	<AANLkTin5KdNX6g+ZRYJS0nNy6=bu4o4gwa6v5-XNwkW9@mail.gmail.com>
	<AANLkTikAPuZKYLf4iisi=C4v2onfz5qCXQ-mo2s62UNq@mail.gmail.com>
	<6D9C9A6C-872A-494D-A5F6-2523DD4CA5B6@apple.com>
	<AANLkTi=4=8T0ww0csECny4t0RMSrJV=nUT77h+759-Ab@mail.gmail.com>
	<8FD08C3F-E6E1-448B-A384-7E5CF0763EC1@apple.com>
	<AANLkTikH8sEANQrDGVHg1uOtfCs2UzygkUPpm91E9kZc@mail.gmail.com>
	<AANLkTimoHYSw=viMcpZLirRqd789_xjWmT4+foao_T6f@mail.gmail.com>
	<8E5A9C6C-BA61-41F8-B445-336D9F96D774@apple.com>
	<AANLkTiksC9MbzDhYrzLs9Kt5YRGuHu2nv3Jri=-xRKb9@mail.gmail.com>
	<AANLkTi=73V-VRH_HGiPwcQjBNcFZMiU+jazHMH3YdJ-V@mail.gmail.com>
	<AANLkTikGWx7GH5VZUByposdJWhhvc+qR6X-1Ve_gNmKG@mail.gmail.com>
	<AANLkTik7AYHB1_Crv6Vcf4uMyx4U_x5mJaYK+-S3=ucU@mail.gmail.com>
	<AANLkTi=e_fCXZo_H1=_47tv5BABbpHkf8qJiyrMfRFj_@mail.gmail.com>
	<AANLkTi=MArF+PJK1iwc66wZNobOTjC6pi127Kt=A64bp@mail.gmail.com>
	<AANLkTimHKpEKfy2mr_UKco+Uscg_YBDtCmvXhT4AhAnp@mail.gmail.com>
	<AANLkTimt3NyHcqEh38hn+FnUNL_O5Qv81OYjzE7d0Qf1@mail.gmail.com>
	<AANLkTin8ykW=j=arKX3wC-CX2adx0sTtUmYMJr7qYqJY@mail.gmail.com>
	<AANLkTikXC0jb1VQ--c7iAgX6=DvpTHD_prwSF9F2Tjm4@mail.gmail.com>
	<AANLkTi=SBh85q-m-SvA4nNj9DfdUDXgYmxs6u9Zc4w7s@mail.gmail.com>
	<AANLkTinVf83nF2RUWsmRzT1tL=5MMVJdoGHm8h1D6mG6@mail.gmail.com>
	<AANLkTikHY6Sej-knz3b5+EUjMWVuoPOkWrmFHKHBWtam@mail.gmail.com>
	<AANLkTinFCYO-f67sKptJ0fb6FK=c_zAbX6CMi55W1v+X@mail.gmail.com>
	<AANLkTimxqNQwKoVTEd6J8LrD4mm8_8=ZVeafrHLUsZjb@mail.gmail.com>
	<AANLkTinxWGCVcq1=0rVa-bbMSC2dqKUy5z4m5q_nkQOJ@mail.gmail.com>
Message-ID: <AANLkTimtZPqq6=0=3E3VKWBqQCjVAP=oij2vUE7=Np_9@mail.gmail.com>

On Thu, Oct 21, 2010 at 7:50 AM, Rafael Esp?ndola
<rafael.espindola at gmail.com> wrote:
>> Hmm, I wish we had this discussion way earlier..
>>
>> How would I emit things in different subsections? I can do a high
>> level switch to .ARM.attributes, and if I were emitting one blob from
>> begin to end, using the higher level interface would be preferable,
>> but it contains additional subsections - which are naturally
>> represented by MCDataFragments - Is there an MC equivalent of a
>> SubSection (which is-a Section so I can switch back and forth?)
>> Currently we only have stuff that go into the File subsection only,
>> but.. for futureproofing?
>
> We cross that bridge when we get there. It might be that the best
> thing to do is organize the code so that ?we output the subsections in
> order. It might be to add some missing feature. For now using the
> regular streamer API will make this code a lot easier to read.

Of the roughly 111 or so calls to EmitIntValue(), rouighly half are in
the Dwarf code, which is cross-architecture.
(And they have their own MCSection types to deal with back and forth
type issues)

Of the 45 remaining, there are 4 interesting uses in MCAsmStreamer.cpp
- (I suppose for emitting data constants in a cross platform manner)
The other remaining uses are in AsmPrinter, again to do cross platform things.
It seems a bit strange to use a high level hammer to do ballpeen
work..... But when in Rome.... :-)

Also what is the preferred method for MC way of setting out subsection
sizes after the fact? I am guessing I need to use an MCFixup?
How do I get an MCExpr to evaluate a method for the subsection size?
Is there an equivalent use in the places using MCFixup?
Do I need to add a new subclass to MCExpr for doing this?

JimG, can you please comment on the MachO specific parts in the
ARMAsmPrinter.cpp? Is there an example of a "subsection size" that is
"Fixed up" after all the blobs that go into that subsection are
emitted? The closest examples I could find weren't that close :-(
(Matter of fact, for ELF, it looks like the section sizes are actually
calculated after everything has been processed by MCAssembler, and the
headers sizes are not "fixed up" but completely rewritten from the
beginning)

Thanks!

-jason
>
>>
>> -jason
>
> Cheers,
> Rafael
>


From resistor at mac.com  Thu Oct 21 13:09:17 2010
From: resistor at mac.com (Owen Anderson)
Date: Thu, 21 Oct 2010 18:09:17 -0000
Subject: [llvm-commits] [llvm] r117039 - in /llvm/trunk:
 lib/Target/ARM/ARMInstrNEON.td test/MC/ARM/neon-fp-encoding.ll
Message-ID: <20101021180917.E675E2A6C12C@llvm.org>

Author: resistor
Date: Thu Oct 21 13:09:17 2010
New Revision: 117039

URL: http://llvm.org/viewvc/llvm-project?rev=117039&view=rev
Log:
Provide correct NEON encodings for vaddl.u* and vaddl.s*.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrNEON.td
    llvm/trunk/test/MC/ARM/neon-fp-encoding.ll

Modified: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrNEON.td?rev=117039&r1=117038&r2=117039&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrNEON.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Thu Oct 21 13:09:17 2010
@@ -1232,23 +1232,23 @@
            InstrItinClass itin, string OpcodeStr, string Dt,
            ValueType ResTy, ValueType OpTy, SDNode OpNode, bit Commutable>
   : N3V<op24, op23, op21_20, op11_8, 1, op4,
-        (outs QPR:$Dd), (ins QPR:$Dn, QPR:$Dm), N3RegFrm, itin, 
-        OpcodeStr, Dt, "$Dd, $Dn, $Dm", "",
-        [(set QPR:$Dd, (ResTy (OpNode (OpTy QPR:$Dn), (OpTy QPR:$Dm))))]> {
+        (outs QPR:$Qd), (ins QPR:$Qn, QPR:$Qm), N3RegFrm, itin, 
+        OpcodeStr, Dt, "$Qd, $Qn, $Qm", "",
+        [(set QPR:$Qd, (ResTy (OpNode (OpTy QPR:$Qn), (OpTy QPR:$Qm))))]> {
   let isCommutable = Commutable;
   
-  bits<4> Dd;
-  bits<4> Dn;
-  bits<4> Dm;
+  bits<4> Qd;
+  bits<4> Qn;
+  bits<4> Qm;
   
-  let Inst{15-13} = Dd{2-0};
-  let Inst{22}    = Dd{3};
+  let Inst{15-13} = Qd{2-0};
+  let Inst{22}    = Qd{3};
   let Inst{12}    = 0;
-  let Inst{19-17} = Dn{2-0};
-  let Inst{7}     = Dn{3};
+  let Inst{19-17} = Qn{2-0};
+  let Inst{7}     = Qn{3};
   let Inst{16}    = 0;
-  let Inst{3-1}   = Dm{2-0};
-  let Inst{5}     = Dm{3};
+  let Inst{3-1}   = Qm{2-0};
+  let Inst{5}     = Qm{3};
   let Inst{0}     = 0;
 }
 class N3VQX<bit op24, bit op23, bits<2> op21_20, bits<4> op11_8, bit op4,
@@ -1597,10 +1597,25 @@
               ValueType TyQ, ValueType TyD, SDNode OpNode, SDNode ExtOp,
               bit Commutable>
   : N3V<op24, op23, op21_20, op11_8, 0, op4,
-        (outs QPR:$dst), (ins DPR:$src1, DPR:$src2), N3RegFrm, itin,
-        OpcodeStr, Dt, "$dst, $src1, $src2", "",
-        [(set QPR:$dst, (OpNode (TyQ (ExtOp (TyD DPR:$src1))),
-                                (TyQ (ExtOp (TyD DPR:$src2)))))]> {
+        (outs QPR:$Qd), (ins DPR:$Dn, DPR:$Dm), N3RegFrm, itin,
+        OpcodeStr, Dt, "$Qd, $Dn, $Dm", "",
+        [(set QPR:$Qd, (OpNode (TyQ (ExtOp (TyD DPR:$Dn))),
+                                (TyQ (ExtOp (TyD DPR:$Dm)))))]> {
+  let isCommutable = Commutable;
+  
+  // Instruction operands.
+  bits<4> Qd;
+  bits<5> Dn;
+  bits<5> Dm;
+  
+  let Inst{15-13} = Qd{2-0};
+  let Inst{22}    = Qd{3};
+  let Inst{12}    = 0;
+  let Inst{19-16} = Dn{3-0};
+  let Inst{7}     = Dn{4};
+  let Inst{3-0}   = Dm{3-0};
+  let Inst{5}     = Dm{4};
+  
   let isCommutable = Commutable;
 }
 

Modified: llvm/trunk/test/MC/ARM/neon-fp-encoding.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/neon-fp-encoding.ll?rev=117039&r1=117038&r2=117039&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/neon-fp-encoding.ll (original)
+++ llvm/trunk/test/MC/ARM/neon-fp-encoding.ll Thu Oct 21 13:09:17 2010
@@ -54,3 +54,68 @@
 	ret <4 x float> %tmp3
 }
 
+; CHECK: vaddls_8xi8
+define <8 x i16> @vaddls_8xi8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+	%tmp1 = load <8 x i8>* %A
+	%tmp2 = load <8 x i8>* %B
+	%tmp3 = sext <8 x i8> %tmp1 to <8 x i16>
+	%tmp4 = sext <8 x i8> %tmp2 to <8 x i16>
+; CHECK: vaddl.s8	q8, d17, d16    @ encoding: [0xa0,0x00,0xc1,0xf2]
+	%tmp5 = add <8 x i16> %tmp3, %tmp4
+	ret <8 x i16> %tmp5
+}
+
+; CHECK: vaddls_4xi16
+define <4 x i32> @vaddls_4xi16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+	%tmp1 = load <4 x i16>* %A
+	%tmp2 = load <4 x i16>* %B
+	%tmp3 = sext <4 x i16> %tmp1 to <4 x i32>
+	%tmp4 = sext <4 x i16> %tmp2 to <4 x i32>
+; CHECK: vaddl.s16	q8, d17, d16    @ encoding: [0xa0,0x00,0xd1,0xf2]
+	%tmp5 = add <4 x i32> %tmp3, %tmp4
+	ret <4 x i32> %tmp5
+}
+
+; CHECK: vaddls_2xi32
+define <2 x i64> @vaddls_2xi32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+	%tmp1 = load <2 x i32>* %A
+	%tmp2 = load <2 x i32>* %B
+	%tmp3 = sext <2 x i32> %tmp1 to <2 x i64>
+	%tmp4 = sext <2 x i32> %tmp2 to <2 x i64>
+; CHECK: vaddl.s32	q8, d17, d16    @ encoding: [0xa0,0x00,0xe1,0xf2]
+	%tmp5 = add <2 x i64> %tmp3, %tmp4
+	ret <2 x i64> %tmp5
+}
+
+; CHECK: vaddlu_8xi8
+define <8 x i16> @vaddlu_8xi8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+	%tmp1 = load <8 x i8>* %A
+	%tmp2 = load <8 x i8>* %B
+	%tmp3 = zext <8 x i8> %tmp1 to <8 x i16>
+	%tmp4 = zext <8 x i8> %tmp2 to <8 x i16>
+; CHECK: vaddl.u8	q8, d17, d16    @ encoding: [0xa0,0x00,0xc1,0xf3]
+	%tmp5 = add <8 x i16> %tmp3, %tmp4
+	ret <8 x i16> %tmp5
+}
+
+; CHECK: vaddlu_4xi16
+define <4 x i32> @vaddlu_4xi16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+	%tmp1 = load <4 x i16>* %A
+	%tmp2 = load <4 x i16>* %B
+	%tmp3 = zext <4 x i16> %tmp1 to <4 x i32>
+	%tmp4 = zext <4 x i16> %tmp2 to <4 x i32>
+; CHECK: vaddl.u16	q8, d17, d16    @ encoding: [0xa0,0x00,0xd1,0xf3]
+	%tmp5 = add <4 x i32> %tmp3, %tmp4
+	ret <4 x i32> %tmp5
+}
+
+; CHECK: vaddlu_2xi32
+define <2 x i64> @vaddlu_2xi32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+	%tmp1 = load <2 x i32>* %A
+	%tmp2 = load <2 x i32>* %B
+	%tmp3 = zext <2 x i32> %tmp1 to <2 x i64>
+	%tmp4 = zext <2 x i32> %tmp2 to <2 x i64>
+; CHECK: vaddl.u32	q8, d17, d16    @ encoding: [0xa0,0x00,0xe1,0xf3]
+	%tmp5 = add <2 x i64> %tmp3, %tmp4
+	ret <2 x i64> %tmp5
+}



From renato.golin at arm.com  Thu Oct 21 13:17:08 2010
From: renato.golin at arm.com (Renato Golin)
Date: Thu, 21 Oct 2010 19:17:08 +0100
Subject: [llvm-commits] [LLVMdev] Fwd: Proof of concept patch for
 unifying the .s/ELF emission of .ARM.attributes
In-Reply-To: <AANLkTimtZPqq6=0=3E3VKWBqQCjVAP=oij2vUE7=Np_9@mail.gmail.com>
References: <AANLkTikSjtvxSNc0oxKEoG2LdGriz10OXOTAtC4caR_+@mail.gmail.com>
	<AANLkTikaS4qjUi+5q3YWt_GF5EdWKVNwxq7=-LyWRRpv@mail.gmail.com>
	<AANLkTinH7mZtZSQKDYMOE9C8-0baHwm31crmp30roWKy@mail.gmail.com>
	<AANLkTimhWm3dCbO003ipXkaDS3f0o948b9b2NquVSe29@mail.gmail.com>
	<AANLkTi=2B7Pk9HkkxYvQBvm-AfJsYCHW8uYxURq5iEcd@mail.gmail.com>
	<AANLkTi=iVAmVx08ww0EOu9DvJ82oxWD+02Es3btVSqK2@mail.gmail.com>
	<AANLkTin5KdNX6g+ZRYJS0nNy6=bu4o4gwa6v5-XNwkW9@mail.gmail.com>
	<AANLkTikAPuZKYLf4iisi=C4v2onfz5qCXQ-mo2s62UNq@mail.gmail.com>
	<6D9C9A6C-872A-494D-A5F6-2523DD4CA5B6@apple.com>
	<AANLkTi=4=8T0ww0csECny4t0RMSrJV=nUT77h+759-Ab@mail.gmail.com>
	<8FD08C3F-E6E1-448B-A384-7E5CF0763EC1@apple.com>
	<AANLkTikH8sEANQrDGVHg1uOtfCs2UzygkUPpm91E9kZc@mail.gmail.com>
	<AANLkTimoHYSw=viMcpZLirRqd789_xjWmT4+foao_T6f@mail.gmail.com>
	<8E5A9C6C-BA61-41F8-B445-336D9F96D774@apple.com>
	<AANLkTiksC9MbzDhYrzLs9Kt5YRGuHu2nv3Jri=-xRKb9@mail.gmail.com>
	<AANLkTi=73V-VRH_HGiPwcQjBNcFZMiU+jazHMH3YdJ-V@mail.gmail.com>
	<AANLkTikGWx7GH5VZUByposdJWhhvc+qR6X-1Ve_gNmKG@mail.gmail.com>
	<AANLkTik7AYHB1_Crv6Vcf4uMyx4U_x5mJaYK+-S3=ucU@mail.gmail.com>
	<AANLkTi=e_fCXZo_H1=_47tv5BABbpHkf8qJiyrMfRFj_@mail.gmail.com>
	<AANLkTi=MArF+PJK1iwc66wZNobOTjC6pi127Kt=A64bp@mail.gmail.com>
	<AANLkTimHKpEKfy2mr_UKco+Uscg_YBDtCmvXhT4AhAnp@mail.gmail.com>
	<AANLkTimt3NyHcqEh38hn+FnUNL_O5Qv81OYjzE7d0Qf1@mail.gmail.com>
	<AANLkTin8ykW=j=arKX3wC-CX2adx0sTtUmYMJr7qYqJY@mail.gmail.com>
	<AANLkTikXC0jb1VQ--c7iAgX6=DvpTHD_prwSF9F2Tjm4@mail.gmail.com>
	<AANLkTi=SBh85q-m-SvA4nNj9DfdUDXgYmxs6u9Zc4w7s@mail.gmail.com>
	<AANLkTinVf83nF2RUWsmRzT1tL=5MMVJdoGHm8h1D6mG6@mail.gmail.com>
	<AANLkTikHY6Sej-knz3b5+EUjMWVuoPOkWrmFHKHBWtam@mail.gmail.com>
	<AANLkTinFCYO-f67sKptJ0fb6FK=c_zAbX6CMi55W1v+X@mail.gmail.com>
	<AANLkTimxqNQwKoVTEd6J8LrD4mm8_8=ZVeafrHLUsZjb@mail.gmail.com>
	<AANLkTinxWGCVcq1=0rVa-bbMSC2dqKUy5z4m5q_nkQOJ@mail.gmail.com>
	<AANLkTimtZPqq6=0=3E3VKWBqQCjVAP=oij2vUE7=Np_9@mail.gmail.com>
Message-ID: <AANLkTi=JuMv5BQKYOb5tQ=cGCaurJ0g1mYbw=2PpWO8P@mail.gmail.com>

2010/10/21 Jason Kim <jasonwkim at google.com>:
> Of the 45 remaining, there are 4 interesting uses in MCAsmStreamer.cpp
> - (I suppose for emitting data constants in a cross platform manner)
> The other remaining uses are in AsmPrinter, again to do cross platform things.
> It seems a bit strange to use a high level hammer to do ballpeen
> work..... But when in Rome.... :-)

Hi Jason,

Are you printing ELF symbols and sections with AsmPrinter? I was under
the impression that you'd create an MCPrinter to deal with the
format-independent and only use AsmPrinter/ELFPrinter for specific
calls (to AsmStreamer/ObjectStreamer).

Or maybe I got it all wrong...

cheers,
--renato

From resistor at mac.com  Thu Oct 21 13:20:25 2010
From: resistor at mac.com (Owen Anderson)
Date: Thu, 21 Oct 2010 18:20:25 -0000
Subject: [llvm-commits] [llvm] r117040 - in /llvm/trunk:
 lib/Target/ARM/ARMInstrNEON.td test/MC/ARM/neon-fp-encoding.ll
Message-ID: <20101021182025.B3A042A6C12C@llvm.org>

Author: resistor
Date: Thu Oct 21 13:20:25 2010
New Revision: 117040

URL: http://llvm.org/viewvc/llvm-project?rev=117040&view=rev
Log:
Add correct encodings for NEON vaddw.s* and vaddw.u*.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrNEON.td
    llvm/trunk/test/MC/ARM/neon-fp-encoding.ll

Modified: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrNEON.td?rev=117040&r1=117039&r2=117040&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrNEON.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Thu Oct 21 13:20:25 2010
@@ -1668,11 +1668,25 @@
            string OpcodeStr, string Dt, ValueType TyQ, ValueType TyD,
            SDNode OpNode, SDNode ExtOp, bit Commutable>
   : N3V<op24, op23, op21_20, op11_8, 0, op4,
-        (outs QPR:$dst), (ins QPR:$src1, DPR:$src2), N3RegFrm, IIC_VSUBiD,
-        OpcodeStr, Dt, "$dst, $src1, $src2", "",
-        [(set QPR:$dst, (OpNode (TyQ QPR:$src1),
-                                (TyQ (ExtOp (TyD DPR:$src2)))))]> {
+        (outs QPR:$Qd), (ins QPR:$Qn, DPR:$Dm), N3RegFrm, IIC_VSUBiD,
+        OpcodeStr, Dt, "$Qd, $Qn, $Dm", "",
+        [(set QPR:$Qd, (OpNode (TyQ QPR:$Qn),
+                                (TyQ (ExtOp (TyD DPR:$Dm)))))]> {
   let isCommutable = Commutable;
+  
+  // Instruction operands.
+  bits<4> Qd;
+  bits<4> Qn;
+  bits<5> Dm;
+  
+  let Inst{15-13} = Qd{2-0};
+  let Inst{22}    = Qd{3};
+  let Inst{12}    = 0;
+  let Inst{19-17} = Qn{2-0};
+  let Inst{7}     = Qn{3};
+  let Inst{16}    = 0;
+  let Inst{3-0}   = Dm{3-0};
+  let Inst{5}     = Dm{4};
 }
 
 // Pairwise long 2-register intrinsics, both double- and quad-register.

Modified: llvm/trunk/test/MC/ARM/neon-fp-encoding.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/neon-fp-encoding.ll?rev=117040&r1=117039&r2=117040&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/neon-fp-encoding.ll (original)
+++ llvm/trunk/test/MC/ARM/neon-fp-encoding.ll Thu Oct 21 13:20:25 2010
@@ -119,3 +119,63 @@
 	%tmp5 = add <2 x i64> %tmp3, %tmp4
 	ret <2 x i64> %tmp5
 }
+
+; CHECK: vaddws_8xi8
+define <8 x i16> @vaddws_8xi8(<8 x i16>* %A, <8 x i8>* %B) nounwind {
+	%tmp1 = load <8 x i16>* %A
+	%tmp2 = load <8 x i8>* %B
+	%tmp3 = sext <8 x i8> %tmp2 to <8 x i16>
+; CHECK: vaddw.s8	q8, q8, d18     @ encoding: [0xa2,0x01,0xc0,0xf2]
+	%tmp4 = add <8 x i16> %tmp1, %tmp3
+	ret <8 x i16> %tmp4
+}
+
+; CHECK: vaddws_4xi16
+define <4 x i32> @vaddws_4xi16(<4 x i32>* %A, <4 x i16>* %B) nounwind {
+	%tmp1 = load <4 x i32>* %A
+	%tmp2 = load <4 x i16>* %B
+	%tmp3 = sext <4 x i16> %tmp2 to <4 x i32>
+; CHECK: vaddw.s16	q8, q8, d18     @ encoding: [0xa2,0x01,0xd0,0xf2]
+	%tmp4 = add <4 x i32> %tmp1, %tmp3
+	ret <4 x i32> %tmp4
+}
+
+; CHECK: vaddws_2xi32
+define <2 x i64> @vaddws_2xi32(<2 x i64>* %A, <2 x i32>* %B) nounwind {
+	%tmp1 = load <2 x i64>* %A
+	%tmp2 = load <2 x i32>* %B
+	%tmp3 = sext <2 x i32> %tmp2 to <2 x i64>
+; CHECK: vaddw.s32	q8, q8, d18     @ encoding: [0xa2,0x01,0xe0,0xf2]
+	%tmp4 = add <2 x i64> %tmp1, %tmp3
+	ret <2 x i64> %tmp4
+}
+
+; CHECK: vaddwu_8xi8
+define <8 x i16> @vaddwu_8xi8(<8 x i16>* %A, <8 x i8>* %B) nounwind {
+	%tmp1 = load <8 x i16>* %A
+	%tmp2 = load <8 x i8>* %B
+	%tmp3 = zext <8 x i8> %tmp2 to <8 x i16>
+; CHECK: vaddw.u8	q8, q8, d18     @ encoding: [0xa2,0x01,0xc0,0xf3]
+	%tmp4 = add <8 x i16> %tmp1, %tmp3
+	ret <8 x i16> %tmp4
+}
+
+; CHECK: vaddwu_4xi16
+define <4 x i32> @vaddwu_4xi16(<4 x i32>* %A, <4 x i16>* %B) nounwind {
+	%tmp1 = load <4 x i32>* %A
+	%tmp2 = load <4 x i16>* %B
+	%tmp3 = zext <4 x i16> %tmp2 to <4 x i32>
+; CHECK: vaddw.u16	q8, q8, d18     @ encoding: [0xa2,0x01,0xd0,0xf3]
+	%tmp4 = add <4 x i32> %tmp1, %tmp3
+	ret <4 x i32> %tmp4
+}
+
+; CHECK: vaddwu_2xi32
+define <2 x i64> @vaddwu_2xi32(<2 x i64>* %A, <2 x i32>* %B) nounwind {
+	%tmp1 = load <2 x i64>* %A
+	%tmp2 = load <2 x i32>* %B
+	%tmp3 = zext <2 x i32> %tmp2 to <2 x i64>
+; CHECK: vaddw.u32	q8, q8, d18     @ encoding: [0xa2,0x01,0xe0,0xf3]
+	%tmp4 = add <2 x i64> %tmp1, %tmp3
+	ret <2 x i64> %tmp4
+}



From gohman at apple.com  Thu Oct 21 13:24:45 2010
From: gohman at apple.com (Dan Gohman)
Date: Thu, 21 Oct 2010 11:24:45 -0700
Subject: [llvm-commits] [llvm] r116958	-
	/llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp
In-Reply-To: <4CBFF24D.5070806@free.fr>
References: <20101020221114.BBADB2A6C12C@llvm.org> <4CBFF24D.5070806@free.fr>
Message-ID: <E63D7193-57C3-450E-9098-4E75E3C03BBF@apple.com>


On Oct 21, 2010, at 12:57 AM, Duncan Sands wrote:

> Hi Dan,
> 
>> +/// Aliases - Test whether the type represented by A may alias the
>> +/// type represented by B.
> 
> if I understand the way you've set up TBAA right, it doesn't have to have
> anything to do with types, right?  It seems to be a completely abstract
> setup where each memory operation can be annotated with a node in an
> abstract tree, and where two memory operations will not alias if neither
> of their nodes is an ancestor of the other.  Is that correct?  If so, it
> could in theory be used for all kinds of other things and not just TBAA.

Yes. This is a design goal. I used the word "type" because that's one
way of thinking about it, but it's not tied to llvm::Type or clang::Type
or any of the other existing type systems in the compiler.

Dan


From gohman at apple.com  Thu Oct 21 13:30:26 2010
From: gohman at apple.com (Dan Gohman)
Date: Thu, 21 Oct 2010 11:30:26 -0700
Subject: [llvm-commits] [llvm] r112705 - in /llvm/trunk:
	include/llvm/System/Signals.h lib/System/Unix/Signals.inc
	lib/System/Win32/Signals.inc
In-Reply-To: <AANLkTimO+omuaC8WyOpWrSzFr5tYuA2jz+s_6TNA9mX0@mail.gmail.com>
References: <20100901141734.9AFEC2A6C12C@llvm.org>
	<AANLkTimO+omuaC8WyOpWrSzFr5tYuA2jz+s_6TNA9mX0@mail.gmail.com>
Message-ID: <43321B73-13F3-4C99-A199-BF12B1C49F82@apple.com>


On Oct 20, 2010, at 11:07 PM, NAKAMURA Takumi wrote:

> Good afternoon, Dan.
> 
> I knew why bugpoint stalls on mingw.
> 
> DontRemoveFileOnSignal() did not acquire the CriticalSection.
> Please take a look into my patch.

It looks fine to me, though I'm not familiar with Win32.

Dan


From jasonwkim at google.com  Thu Oct 21 13:40:12 2010
From: jasonwkim at google.com (Jason Kim)
Date: Thu, 21 Oct 2010 11:40:12 -0700
Subject: [llvm-commits] [LLVMdev] Fwd: Proof of concept patch for
 unifying the .s/ELF emission of .ARM.attributes
In-Reply-To: <AANLkTi=JuMv5BQKYOb5tQ=cGCaurJ0g1mYbw=2PpWO8P@mail.gmail.com>
References: <AANLkTikSjtvxSNc0oxKEoG2LdGriz10OXOTAtC4caR_+@mail.gmail.com>
	<AANLkTikaS4qjUi+5q3YWt_GF5EdWKVNwxq7=-LyWRRpv@mail.gmail.com>
	<AANLkTinH7mZtZSQKDYMOE9C8-0baHwm31crmp30roWKy@mail.gmail.com>
	<AANLkTimhWm3dCbO003ipXkaDS3f0o948b9b2NquVSe29@mail.gmail.com>
	<AANLkTi=2B7Pk9HkkxYvQBvm-AfJsYCHW8uYxURq5iEcd@mail.gmail.com>
	<AANLkTi=iVAmVx08ww0EOu9DvJ82oxWD+02Es3btVSqK2@mail.gmail.com>
	<AANLkTin5KdNX6g+ZRYJS0nNy6=bu4o4gwa6v5-XNwkW9@mail.gmail.com>
	<AANLkTikAPuZKYLf4iisi=C4v2onfz5qCXQ-mo2s62UNq@mail.gmail.com>
	<6D9C9A6C-872A-494D-A5F6-2523DD4CA5B6@apple.com>
	<AANLkTi=4=8T0ww0csECny4t0RMSrJV=nUT77h+759-Ab@mail.gmail.com>
	<8FD08C3F-E6E1-448B-A384-7E5CF0763EC1@apple.com>
	<AANLkTikH8sEANQrDGVHg1uOtfCs2UzygkUPpm91E9kZc@mail.gmail.com>
	<AANLkTimoHYSw=viMcpZLirRqd789_xjWmT4+foao_T6f@mail.gmail.com>
	<8E5A9C6C-BA61-41F8-B445-336D9F96D774@apple.com>
	<AANLkTiksC9MbzDhYrzLs9Kt5YRGuHu2nv3Jri=-xRKb9@mail.gmail.com>
	<AANLkTi=73V-VRH_HGiPwcQjBNcFZMiU+jazHMH3YdJ-V@mail.gmail.com>
	<AANLkTikGWx7GH5VZUByposdJWhhvc+qR6X-1Ve_gNmKG@mail.gmail.com>
	<AANLkTik7AYHB1_Crv6Vcf4uMyx4U_x5mJaYK+-S3=ucU@mail.gmail.com>
	<AANLkTi=e_fCXZo_H1=_47tv5BABbpHkf8qJiyrMfRFj_@mail.gmail.com>
	<AANLkTi=MArF+PJK1iwc66wZNobOTjC6pi127Kt=A64bp@mail.gmail.com>
	<AANLkTimHKpEKfy2mr_UKco+Uscg_YBDtCmvXhT4AhAnp@mail.gmail.com>
	<AANLkTimt3NyHcqEh38hn+FnUNL_O5Qv81OYjzE7d0Qf1@mail.gmail.com>
	<AANLkTin8ykW=j=arKX3wC-CX2adx0sTtUmYMJr7qYqJY@mail.gmail.com>
	<AANLkTikXC0jb1VQ--c7iAgX6=DvpTHD_prwSF9F2Tjm4@mail.gmail.com>
	<AANLkTi=SBh85q-m-SvA4nNj9DfdUDXgYmxs6u9Zc4w7s@mail.gmail.com>
	<AANLkTinVf83nF2RUWsmRzT1tL=5MMVJdoGHm8h1D6mG6@mail.gmail.com>
	<AANLkTikHY6Sej-knz3b5+EUjMWVuoPOkWrmFHKHBWtam@mail.gmail.com>
	<AANLkTinFCYO-f67sKptJ0fb6FK=c_zAbX6CMi55W1v+X@mail.gmail.com>
	<AANLkTimxqNQwKoVTEd6J8LrD4mm8_8=ZVeafrHLUsZjb@mail.gmail.com>
	<AANLkTinxWGCVcq1=0rVa-bbMSC2dqKUy5z4m5q_nkQOJ@mail.gmail.com>
	<AANLkTimtZPqq6=0=3E3VKWBqQCjVAP=oij2vUE7=Np_9@mail.gmail.com>
	<AANLkTi=JuMv5BQKYOb5tQ=cGCaurJ0g1mYbw=2PpWO8P@mail.gmail.com>
Message-ID: <AANLkTimZ6PnbBKOxykakG4Bka7f69bDnc2CrcPMYo92G@mail.gmail.com>

On Thu, Oct 21, 2010 at 11:17 AM, Renato Golin <renato.golin at arm.com> wrote:
> 2010/10/21 Jason Kim <jasonwkim at google.com>:
>> Of the 45 remaining, there are 4 interesting uses in MCAsmStreamer.cpp
>> - (I suppose for emitting data constants in a cross platform manner)
>> The other remaining uses are in AsmPrinter, again to do cross platform things.
>> It seems a bit strange to use a high level hammer to do ballpeen
>> work..... But when in Rome.... :-)
>
> Hi Jason,
>
> Are you printing ELF symbols and sections with AsmPrinter? I was under

No. the code in question is regarding  the blobs in .ARM.attributes section :-)

> the impression that you'd create an MCPrinter to deal with the
> format-independent and only use AsmPrinter/ELFPrinter for specific
> calls (to AsmStreamer/ObjectStreamer).

Uhh, something like that? :-)
AFAIK,  The final assembly (ie. building the output) for file emission
is done via MCAssembler, with input  from a bunch of other classes.
The misnamed AsmPrinter hierarchy is responsible for most of the
format independent emission (i.e. the stuff that gets put inside the
sections) for both .o and .s
There is a MCStreamer hierarchy which takes care of recording the
sequential output of blobs (and there are format specific streamers
for ELF etc...)
There are also format specific helpers (ELF/Macho)Objectwriter which
fill in the format specific bits..

-jason

>
> Or maybe I got it all wrong...
>
> cheers,
> --renato
>

From rafael.espindola at gmail.com  Thu Oct 21 13:42:49 2010
From: rafael.espindola at gmail.com (=?UTF-8?Q?Rafael_Esp=C3=ADndola?=)
Date: Thu, 21 Oct 2010 14:42:49 -0400
Subject: [llvm-commits] Fwd: Proof of concept patch for unifying the
 .s/ELF emission of .ARM.attributes
In-Reply-To: <AANLkTimtZPqq6=0=3E3VKWBqQCjVAP=oij2vUE7=Np_9@mail.gmail.com>
References: <AANLkTikSjtvxSNc0oxKEoG2LdGriz10OXOTAtC4caR_+@mail.gmail.com>
	<AANLkTikaS4qjUi+5q3YWt_GF5EdWKVNwxq7=-LyWRRpv@mail.gmail.com>
	<AANLkTinH7mZtZSQKDYMOE9C8-0baHwm31crmp30roWKy@mail.gmail.com>
	<AANLkTimhWm3dCbO003ipXkaDS3f0o948b9b2NquVSe29@mail.gmail.com>
	<AANLkTi=2B7Pk9HkkxYvQBvm-AfJsYCHW8uYxURq5iEcd@mail.gmail.com>
	<AANLkTi=iVAmVx08ww0EOu9DvJ82oxWD+02Es3btVSqK2@mail.gmail.com>
	<AANLkTin5KdNX6g+ZRYJS0nNy6=bu4o4gwa6v5-XNwkW9@mail.gmail.com>
	<AANLkTikAPuZKYLf4iisi=C4v2onfz5qCXQ-mo2s62UNq@mail.gmail.com>
	<6D9C9A6C-872A-494D-A5F6-2523DD4CA5B6@apple.com>
	<AANLkTi=4=8T0ww0csECny4t0RMSrJV=nUT77h+759-Ab@mail.gmail.com>
	<8FD08C3F-E6E1-448B-A384-7E5CF0763EC1@apple.com>
	<AANLkTikH8sEANQrDGVHg1uOtfCs2UzygkUPpm91E9kZc@mail.gmail.com>
	<AANLkTimoHYSw=viMcpZLirRqd789_xjWmT4+foao_T6f@mail.gmail.com>
	<8E5A9C6C-BA61-41F8-B445-336D9F96D774@apple.com>
	<AANLkTiksC9MbzDhYrzLs9Kt5YRGuHu2nv3Jri=-xRKb9@mail.gmail.com>
	<AANLkTi=73V-VRH_HGiPwcQjBNcFZMiU+jazHMH3YdJ-V@mail.gmail.com>
	<AANLkTikGWx7GH5VZUByposdJWhhvc+qR6X-1Ve_gNmKG@mail.gmail.com>
	<AANLkTik7AYHB1_Crv6Vcf4uMyx4U_x5mJaYK+-S3=ucU@mail.gmail.com>
	<AANLkTi=e_fCXZo_H1=_47tv5BABbpHkf8qJiyrMfRFj_@mail.gmail.com>
	<AANLkTi=MArF+PJK1iwc66wZNobOTjC6pi127Kt=A64bp@mail.gmail.com>
	<AANLkTimHKpEKfy2mr_UKco+Uscg_YBDtCmvXhT4AhAnp@mail.gmail.com>
	<AANLkTimt3NyHcqEh38hn+FnUNL_O5Qv81OYjzE7d0Qf1@mail.gmail.com>
	<AANLkTin8ykW=j=arKX3wC-CX2adx0sTtUmYMJr7qYqJY@mail.gmail.com>
	<AANLkTikXC0jb1VQ--c7iAgX6=DvpTHD_prwSF9F2Tjm4@mail.gmail.com>
	<AANLkTi=SBh85q-m-SvA4nNj9DfdUDXgYmxs6u9Zc4w7s@mail.gmail.com>
	<AANLkTinVf83nF2RUWsmRzT1tL=5MMVJdoGHm8h1D6mG6@mail.gmail.com>
	<AANLkTikHY6Sej-knz3b5+EUjMWVuoPOkWrmFHKHBWtam@mail.gmail.com>
	<AANLkTinFCYO-f67sKptJ0fb6FK=c_zAbX6CMi55W1v+X@mail.gmail.com>
	<AANLkTimxqNQwKoVTEd6J8LrD4mm8_8=ZVeafrHLUsZjb@mail.gmail.com>
	<AANLkTinxWGCVcq1=0rVa-bbMSC2dqKUy5z4m5q_nkQOJ@mail.gmail.com>
	<AANLkTimtZPqq6=0=3E3VKWBqQCjVAP=oij2vUE7=Np_9@mail.gmail.com>
Message-ID: <AANLkTi=qXYf--J5kgwvm1=7byfM6gRad09d0MEsR3NVi@mail.gmail.com>

> Also what is the preferred method for MC way of setting out subsection
> sizes after the fact? I am guessing I need to use an MCFixup?
> How do I get an MCExpr to evaluate a method for the subsection size?
> Is there an equivalent use in the places using MCFixup?
> Do I need to add a new subclass to MCExpr for doing this?
>
> JimG, can you please comment on the MachO specific parts in the
> ARMAsmPrinter.cpp? Is there an example of a "subsection size" that is
> "Fixed up" after all the blobs that go into that subsection are
> emitted? The closest examples I could find weren't that close :-(
> (Matter of fact, for ELF, it looks like the section sizes are actually
> calculated after everything has been processed by MCAssembler, and the
> headers sizes are not "fixed up" but completely rewritten from the
> beginning)

I really don't follow. Please just convert the current patch to use
the existing APIs. If in the next one you really need a missing
feature it will be a lot easier to explain what it is.

> Thanks!
>
> -jason

Cheers,
Rafael

From stoklund at 2pi.dk  Thu Oct 21 13:47:06 2010
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Thu, 21 Oct 2010 18:47:06 -0000
Subject: [llvm-commits] [llvm] r117041 -
	/llvm/trunk/lib/CodeGen/MachineVerifier.cpp
Message-ID: <20101021184706.67C9C2A6C12C@llvm.org>

Author: stoklund
Date: Thu Oct 21 13:47:06 2010
New Revision: 117041

URL: http://llvm.org/viewvc/llvm-project?rev=117041&view=rev
Log:
Permit landing pad successor blocks when verifying basic blocks that end in an
unconditional branch.

Modified:
    llvm/trunk/lib/CodeGen/MachineVerifier.cpp

Modified: llvm/trunk/lib/CodeGen/MachineVerifier.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineVerifier.cpp?rev=117041&r1=117040&r2=117041&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineVerifier.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineVerifier.cpp Thu Oct 21 13:47:06 2010
@@ -359,6 +359,14 @@
 MachineVerifier::visitMachineBasicBlockBefore(const MachineBasicBlock *MBB) {
   const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
 
+  // Count the number of landing pad successors.
+  unsigned LandingPadSuccs = 0;
+  for (MachineBasicBlock::const_succ_iterator I = MBB->succ_begin(),
+       E = MBB->succ_end(); I != E; ++I)
+    LandingPadSuccs += (*I)->isLandingPad();
+  if (LandingPadSuccs > 1)
+    report("MBB has more than one landing pad successor", MBB);
+
   // Call AnalyzeBranch. If it succeeds, there several more conditions to check.
   MachineBasicBlock *TBB = 0, *FBB = 0;
   SmallVector<MachineOperand, 4> Cond;
@@ -374,14 +382,14 @@
         // It's possible that the block legitimately ends with a noreturn
         // call or an unreachable, in which case it won't actually fall
         // out the bottom of the function.
-      } else if (MBB->succ_empty()) {
+      } else if (MBB->succ_size() == LandingPadSuccs) {
         // It's possible that the block legitimately ends with a noreturn
         // call or an unreachable, in which case it won't actuall fall
         // out of the block.
-      } else if (MBB->succ_size() != 1) {
+      } else if (MBB->succ_size() != 1+LandingPadSuccs) {
         report("MBB exits via unconditional fall-through but doesn't have "
                "exactly one CFG successor!", MBB);
-      } else if (MBB->succ_begin()[0] != MBBI) {
+      } else if (!MBB->isSuccessor(MBBI)) {
         report("MBB exits via unconditional fall-through but its successor "
                "differs from its CFG successor!", MBB);
       }
@@ -396,10 +404,10 @@
       }
     } else if (TBB && !FBB && Cond.empty()) {
       // Block unconditionally branches somewhere.
-      if (MBB->succ_size() != 1) {
+      if (MBB->succ_size() != 1+LandingPadSuccs) {
         report("MBB exits via unconditional branch but doesn't have "
                "exactly one CFG successor!", MBB);
-      } else if (MBB->succ_begin()[0] != TBB) {
+      } else if (!MBB->isSuccessor(TBB)) {
         report("MBB exits via unconditional branch but the CFG "
                "successor doesn't match the actual successor!", MBB);
       }



From stoklund at 2pi.dk  Thu Oct 21 13:47:08 2010
From: stoklund at 2pi.dk (Jakob Stoklund Olesen)
Date: Thu, 21 Oct 2010 18:47:08 -0000
Subject: [llvm-commits] [llvm] r117042 - /llvm/trunk/lib/CodeGen/SplitKit.cpp
Message-ID: <20101021184708.709412A6C12D@llvm.org>

Author: stoklund
Date: Thu Oct 21 13:47:08 2010
New Revision: 117042

URL: http://llvm.org/viewvc/llvm-project?rev=117042&view=rev
Log:
Don't include the destination interval in the union when computing
Parent - union(Y, ...). Doh.

Modified:
    llvm/trunk/lib/CodeGen/SplitKit.cpp

Modified: llvm/trunk/lib/CodeGen/SplitKit.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SplitKit.cpp?rev=117042&r1=117041&r2=117042&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SplitKit.cpp (original)
+++ llvm/trunk/lib/CodeGen/SplitKit.cpp Thu Oct 21 13:47:08 2010
@@ -740,10 +740,10 @@
         break;
       }
     }
+    DEBUG(dbgs() << "  rewr BB#" << MI->getParent()->getNumber() << '\t'<< Idx);
     assert(LI && "No register was live at use");
     MO.setReg(LI->reg);
-    DEBUG(dbgs() << "  rewrite BB#" << MI->getParent()->getNumber() << '\t'
-                 << Idx << '\t' << *MI);
+    DEBUG(dbgs() << '\t' << *MI);
   }
 }
 
@@ -755,6 +755,8 @@
   SmallVector<IIPair, 8> Iters;
   for (LiveRangeEdit::iterator LI = edit_.begin(), LE = edit_.end(); LI != LE;
        ++LI) {
+    if (*LI == dupli_.getLI())
+      continue;
     LiveInterval::const_iterator I = (*LI)->find(Start);
     LiveInterval::const_iterator E = (*LI)->end();
     if (I != E)



From jasonwkim at google.com  Thu Oct 21 13:52:13 2010
From: jasonwkim at google.com (Jason Kim)
Date: Thu, 21 Oct 2010 11:52:13 -0700
Subject: [llvm-commits] Fwd: Proof of concept patch for unifying the
 .s/ELF emission of .ARM.attributes
In-Reply-To: <AANLkTi=qXYf--J5kgwvm1=7byfM6gRad09d0MEsR3NVi@mail.gmail.com>
References: <AANLkTikSjtvxSNc0oxKEoG2LdGriz10OXOTAtC4caR_+@mail.gmail.com>
	<AANLkTikaS4qjUi+5q3YWt_GF5EdWKVNwxq7=-LyWRRpv@mail.gmail.com>
	<AANLkTinH7mZtZSQKDYMOE9C8-0baHwm31crmp30roWKy@mail.gmail.com>
	<AANLkTimhWm3dCbO003ipXkaDS3f0o948b9b2NquVSe29@mail.gmail.com>
	<AANLkTi=2B7Pk9HkkxYvQBvm-AfJsYCHW8uYxURq5iEcd@mail.gmail.com>
	<AANLkTi=iVAmVx08ww0EOu9DvJ82oxWD+02Es3btVSqK2@mail.gmail.com>
	<AANLkTin5KdNX6g+ZRYJS0nNy6=bu4o4gwa6v5-XNwkW9@mail.gmail.com>
	<AANLkTikAPuZKYLf4iisi=C4v2onfz5qCXQ-mo2s62UNq@mail.gmail.com>
	<6D9C9A6C-872A-494D-A5F6-2523DD4CA5B6@apple.com>
	<AANLkTi=4=8T0ww0csECny4t0RMSrJV=nUT77h+759-Ab@mail.gmail.com>
	<8FD08C3F-E6E1-448B-A384-7E5CF0763EC1@apple.com>
	<AANLkTikH8sEANQrDGVHg1uOtfCs2UzygkUPpm91E9kZc@mail.gmail.com>
	<AANLkTimoHYSw=viMcpZLirRqd789_xjWmT4+foao_T6f@mail.gmail.com>
	<8E5A9C6C-BA61-41F8-B445-336D9F96D774@apple.com>
	<AANLkTiksC9MbzDhYrzLs9Kt5YRGuHu2nv3Jri=-xRKb9@mail.gmail.com>
	<AANLkTi=73V-VRH_HGiPwcQjBNcFZMiU+jazHMH3YdJ-V@mail.gmail.com>
	<AANLkTikGWx7GH5VZUByposdJWhhvc+qR6X-1Ve_gNmKG@mail.gmail.com>
	<AANLkTik7AYHB1_Crv6Vcf4uMyx4U_x5mJaYK+-S3=ucU@mail.gmail.com>
	<AANLkTi=e_fCXZo_H1=_47tv5BABbpHkf8qJiyrMfRFj_@mail.gmail.com>
	<AANLkTi=MArF+PJK1iwc66wZNobOTjC6pi127Kt=A64bp@mail.gmail.com>
	<AANLkTimHKpEKfy2mr_UKco+Uscg_YBDtCmvXhT4AhAnp@mail.gmail.com>
	<AANLkTimt3NyHcqEh38hn+FnUNL_O5Qv81OYjzE7d0Qf1@mail.gmail.com>
	<AANLkTin8ykW=j=arKX3wC-CX2adx0sTtUmYMJr7qYqJY@mail.gmail.com>
	<AANLkTikXC0jb1VQ--c7iAgX6=DvpTHD_prwSF9F2Tjm4@mail.gmail.com>
	<AANLkTi=SBh85q-m-SvA4nNj9DfdUDXgYmxs6u9Zc4w7s@mail.gmail.com>
	<AANLkTinVf83nF2RUWsmRzT1tL=5MMVJdoGHm8h1D6mG6@mail.gmail.com>
	<AANLkTikHY6Sej-knz3b5+EUjMWVuoPOkWrmFHKHBWtam@mail.gmail.com>
	<AANLkTinFCYO-f67sKptJ0fb6FK=c_zAbX6CMi55W1v+X@mail.gmail.com>
	<AANLkTimxqNQwKoVTEd6J8LrD4mm8_8=ZVeafrHLUsZjb@mail.gmail.com>
	<AANLkTinxWGCVcq1=0rVa-bbMSC2dqKUy5z4m5q_nkQOJ@mail.gmail.com>
	<AANLkTimtZPqq6=0=3E3VKWBqQCjVAP=oij2vUE7=Np_9@mail.gmail.com>
	<AANLkTi=qXYf--J5kgwvm1=7byfM6gRad09d0MEsR3NVi@mail.gmail.com>
Message-ID: <AANLkTi=e0Oxev4tww8KFU5vbGmR3xBhbjrHpx8jONG8O@mail.gmail.com>

On Thu, Oct 21, 2010 at 11:42 AM, Rafael Esp?ndola
<rafael.espindola at gmail.com> wrote:
>> Also what is the preferred method for MC way of setting out subsection
>> sizes after the fact? I am guessing I need to use an MCFixup?
>> How do I get an MCExpr to evaluate a method for the subsection size?
>> Is there an equivalent use in the places using MCFixup?
>> Do I need to add a new subclass to MCExpr for doing this?
>>
>> JimG, can you please comment on the MachO specific parts in the
>> ARMAsmPrinter.cpp? Is there an example of a "subsection size" that is
>> "Fixed up" after all the blobs that go into that subsection are
>> emitted? The closest examples I could find weren't that close :-(
>> (Matter of fact, for ELF, it looks like the section sizes are actually
>> calculated after everything has been processed by MCAssembler, and the
>> headers sizes are not "fixed up" but completely rewritten from the
>> beginning)
>
> I really don't follow. Please just convert the current patch to use
> the existing APIs. If in the next one you really need a missing
> feature it will be a lot easier to explain what it is.

Hi Rafael.

That is exactly what I need - I need a nice MC way to output a at
least two different 4 byte size fields after all of the blobs in the
.ARM.attributes
are sent out. I am currently doing this manually by messing with the
MCDataFragment directly - (I cribbed from the ELFObjectwriter code)
The size field kind of acts like an ELF section header size field, but
trying to replicate the MCAssembler/MCLayout mechanics seemed a bit
much, and from the existing sources,
I could not find a relevant use of MCExpr/MCFixup that does this. I
even considered outputing a fake symbol, but that didn't work well
either. The code I have now was the simplest I could make it under the
constraints I found myself in. If there is a "better way" in MC to do
something like this, I'll be more than happy to do it, if just for my
own education.

Err... help?? :-)

Thanks!!

-jason

>
>> Thanks!
>>
>> -jason
>
> Cheers,
> Rafael
>


From dalej at apple.com  Thu Oct 21 13:54:53 2010
From: dalej at apple.com (Dale Johannesen)
Date: Thu, 21 Oct 2010 11:54:53 -0700
Subject: [llvm-commits] [PATCH] Inline asm mult-alt constraints done
	for	now
In-Reply-To: <AANLkTim_Z3UFnHf3u2LS83Phu-UMk-jmZthLgo0thmDe@mail.gmail.com>
References: <AANLkTimqDbOn8PJTH7UtRFuX7BKpbonoJiJ3w3Ly9Aqt@mail.gmail.com>
	<FDD00E40-6648-4E4B-B43C-139DCE499F37@apple.com>
	<AANLkTim_Z3UFnHf3u2LS83Phu-UMk-jmZthLgo0thmDe@mail.gmail.com>
Message-ID: <9A1D67C5-A2E4-482E-A7AC-2523D412AE9B@apple.com>

OK, I've gotten to this now.  Thanks for your patience.

The various changes of std::vector to SmallVector and uses of typedefs are OK.

There is too much duplication in the different versions of getSingleConstraintMatchWeight.  Generic constraints like 'r' should be handled only in the generic version.  I think several of the overloaded versions can go away entirely.  The approach of substituting ConstraintWeight for numbers is generally OK with this modification.

> +  default:
> +    weight = TargetLowering::getSingleConstraintMatchWeight(info, constraint);

Should be followed by 'break' (several places).  It's disturbing that testing didn't catch this.

> +    CW_Okay     = 0,      // Acceptible.


Spelling.

I need to look at the ParseConstraints bits more, I don't really understand what you're doing there yet.   The bits covered above can go in.

On Oct 15, 2010, at 10:42 AMPDT, John Thompson wrote:

> Thanks for the heads up, Evan.
>  
> I forgot to point out a couple of other changes I made.  One was to change some usages of std::vector to SmallVector typedefs on the stuff related to the constraints.  The other was that I changed some hard tabs in one file (not from me this time) to spaces, based on the report from a checking program I wrote and am now running on the files I touch.
> -John
> On Fri, Oct 15, 2010 at 10:02 AM, Evan Cheng <evan.cheng at apple.com> wrote:
> Dale should review this once he gets back on Monday.
> 
> Evan
> 
> On Oct 14, 2010, at 6:41 PM, John Thompson wrote:
> 
>> I made a pass through all the platforms, and added support for the weighting of the platform-specific constraints that seemed to have any kind of support, which was not much, based on what was in the existing getConstraintType functions.  There probably isn't much point adding weighting for constraints not yet supported, but at least the now framework is there for if and when they are added.  Therefore, I'm considering Clang/LLVM mult-alt constraint support done for now, except for some tests I'm getting in shape to check in for both the Clang and LLVM sides.  I've run the regression tests, test-suite, and gcc tests on both modified and unmodified trees from this morning on Linux with no differences.
>>  
>> May I check this in?
>>  
>> Thanks.
>>  
>> -John
>> 
>> -- 
>> John Thompson
>> John.Thompson.JTSoftware at gmail.com
>> 
>> <llvmmultalt15.patch>_______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
> 
> 
> 
> 
> -- 
> John Thompson
> John.Thompson.JTSoftware at gmail.com
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits

-------------- next part --------------
An HTML attachment was scrubbed...
URL: http://lists.cs.uiuc.edu/pipermail/llvm-commits/attachments/20101021/17b23cf3/attachment.html 

From resistor at mac.com  Thu Oct 21 13:55:04 2010
From: resistor at mac.com (Owen Anderson)
Date: Thu, 21 Oct 2010 18:55:04 -0000
Subject: [llvm-commits] [llvm] r117047 - in /llvm/trunk:
 lib/Target/ARM/ARMInstrNEON.td test/MC/ARM/neon-fp-encoding.ll
Message-ID: <20101021185504.B31A62A6C12C@llvm.org>

Author: resistor
Date: Thu Oct 21 13:55:04 2010
New Revision: 117047

URL: http://llvm.org/viewvc/llvm-project?rev=117047&view=rev
Log:
Add correct NEON encodings for vhadd and vrhadd.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrNEON.td
    llvm/trunk/test/MC/ARM/neon-fp-encoding.ll

Modified: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrNEON.td?rev=117047&r1=117046&r2=117047&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrNEON.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Thu Oct 21 13:55:04 2010
@@ -1289,10 +1289,22 @@
               Format f, InstrItinClass itin, string OpcodeStr, string Dt,
               ValueType ResTy, ValueType OpTy, Intrinsic IntOp, bit Commutable>
   : N3V<op24, op23, op21_20, op11_8, 0, op4,
-        (outs DPR:$dst), (ins DPR:$src1, DPR:$src2), f, itin,
-        OpcodeStr, Dt, "$dst, $src1, $src2", "",
-        [(set DPR:$dst, (ResTy (IntOp (OpTy DPR:$src1), (OpTy DPR:$src2))))]> {
+        (outs DPR:$Dd), (ins DPR:$Dn, DPR:$Dm), f, itin,
+        OpcodeStr, Dt, "$Dd, $Dn, $Dm", "",
+        [(set DPR:$Dd, (ResTy (IntOp (OpTy DPR:$Dn), (OpTy DPR:$Dm))))]> {
   let isCommutable = Commutable;
+  
+  // Instruction operands.
+  bits<5> Dd;
+  bits<5> Dn;
+  bits<5> Dm;
+
+  let Inst{15-12} = Dd{3-0};
+  let Inst{22}    = Dd{4};
+  let Inst{19-16} = Dn{3-0};
+  let Inst{7}     = Dn{4};
+  let Inst{3-0}   = Dm{3-0};
+  let Inst{5}     = Dm{4};
 }
 class N3VDIntSL<bits<2> op21_20, bits<4> op11_8, InstrItinClass itin, 
                 string OpcodeStr, string Dt, ValueType Ty, Intrinsic IntOp>
@@ -1320,10 +1332,25 @@
               Format f, InstrItinClass itin, string OpcodeStr, string Dt,
               ValueType ResTy, ValueType OpTy, Intrinsic IntOp, bit Commutable>
   : N3V<op24, op23, op21_20, op11_8, 1, op4,
-        (outs QPR:$dst), (ins QPR:$src1, QPR:$src2), f, itin,
-        OpcodeStr, Dt, "$dst, $src1, $src2", "",
-        [(set QPR:$dst, (ResTy (IntOp (OpTy QPR:$src1), (OpTy QPR:$src2))))]> {
+        (outs QPR:$Qd), (ins QPR:$Qn, QPR:$Qm), f, itin,
+        OpcodeStr, Dt, "$Qd, $Qn, $Qm", "",
+        [(set QPR:$Qd, (ResTy (IntOp (OpTy QPR:$Qn), (OpTy QPR:$Qm))))]> {
   let isCommutable = Commutable;
+  
+  // Instruction operands.
+  bits<4> Qd;
+  bits<4> Qn;
+  bits<4> Qm;
+
+  let Inst{15-13} = Qd{2-0};
+  let Inst{22}    = Qd{3};
+  let Inst{12}    = 0;
+  let Inst{19-17} = Qn{2-0};
+  let Inst{7}     = Qn{3};
+  let Inst{16}    = 0;
+  let Inst{3-1}   = Qm{2-0};
+  let Inst{5}     = Qm{3};
+  let Inst{0}     = 0;
 }
 class N3VQIntSL<bits<2> op21_20, bits<4> op11_8, InstrItinClass itin, 
                 string OpcodeStr, string Dt,

Modified: llvm/trunk/test/MC/ARM/neon-fp-encoding.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/neon-fp-encoding.ll?rev=117047&r1=117046&r2=117047&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/neon-fp-encoding.ll (original)
+++ llvm/trunk/test/MC/ARM/neon-fp-encoding.ll Thu Oct 21 13:55:04 2010
@@ -179,3 +179,251 @@
 	%tmp4 = add <2 x i64> %tmp1, %tmp3
 	ret <2 x i64> %tmp4
 }
+
+declare <8 x i8>  @llvm.arm.neon.vhadds.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vhadds.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vhadds.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+
+; CHECK: vhadds_8xi8
+define <8 x i8> @vhadds_8xi8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+	%tmp1 = load <8 x i8>* %A
+	%tmp2 = load <8 x i8>* %B
+; CHECK: vhadd.s8	d16, d16, d17   @ encoding: [0xa1,0x00,0x40,0xf2]
+	%tmp3 = call <8 x i8> @llvm.arm.neon.vhadds.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+	ret <8 x i8> %tmp3
+}
+
+; CHECK: vhadds_4xi16
+define <4 x i16> @vhadds_4xi16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+	%tmp1 = load <4 x i16>* %A
+	%tmp2 = load <4 x i16>* %B
+; CHECK: vhadd.s16	d16, d16, d17   @ encoding: [0xa1,0x00,0x50,0xf2]
+	%tmp3 = call <4 x i16> @llvm.arm.neon.vhadds.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+	ret <4 x i16> %tmp3
+}
+
+; CHECK: vhadds_2xi32
+define <2 x i32> @vhadds_2xi32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+	%tmp1 = load <2 x i32>* %A
+	%tmp2 = load <2 x i32>* %B
+; CHECK: vhadd.s32	d16, d16, d17   @ encoding: [0xa1,0x00,0x60,0xf2]
+	%tmp3 = call <2 x i32> @llvm.arm.neon.vhadds.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+	ret <2 x i32> %tmp3
+}
+
+declare <8 x i8>  @llvm.arm.neon.vhaddu.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vhaddu.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vhaddu.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+
+; CHECK: vhaddu_8xi8
+define <8 x i8> @vhaddu_8xi8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+	%tmp1 = load <8 x i8>* %A
+	%tmp2 = load <8 x i8>* %B
+; CHECK: vhadd.u8	d16, d16, d17   @ encoding: [0xa1,0x00,0x40,0xf3]
+	%tmp3 = call <8 x i8> @llvm.arm.neon.vhaddu.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+	ret <8 x i8> %tmp3
+}
+
+; CHECK: vhaddu_4xi16
+define <4 x i16> @vhaddu_4xi16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+	%tmp1 = load <4 x i16>* %A
+	%tmp2 = load <4 x i16>* %B
+; CHECK: vhadd.u16	d16, d16, d17   @ encoding: [0xa1,0x00,0x50,0xf3]
+	%tmp3 = call <4 x i16> @llvm.arm.neon.vhaddu.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+	ret <4 x i16> %tmp3
+}
+
+; CHECK: vhaddu_2xi32
+define <2 x i32> @vhaddu_2xi32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+	%tmp1 = load <2 x i32>* %A
+	%tmp2 = load <2 x i32>* %B
+; CHECK: vhadd.u32	d16, d16, d17   @ encoding: [0xa1,0x00,0x60,0xf3]
+	%tmp3 = call <2 x i32> @llvm.arm.neon.vhaddu.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+	ret <2 x i32> %tmp3
+}
+
+declare <16 x i8> @llvm.arm.neon.vhadds.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vhadds.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vhadds.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
+
+; CHECK: vhadds_16xi8
+define <16 x i8> @vhadds_16xi8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+	%tmp1 = load <16 x i8>* %A
+	%tmp2 = load <16 x i8>* %B
+; CHECK: vhadd.s8	q8, q8, q9      @ encoding: [0xe2,0x00,0x40,0xf2]
+	%tmp3 = call <16 x i8> @llvm.arm.neon.vhadds.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
+	ret <16 x i8> %tmp3
+}
+
+; CHECK: vhadds_8xi16
+define <8 x i16> @vhadds_8xi16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+	%tmp1 = load <8 x i16>* %A
+	%tmp2 = load <8 x i16>* %B
+; CHECK: vhadd.s16	q8, q8, q9      @ encoding: [0xe2,0x00,0x50,0xf2]
+	%tmp3 = call <8 x i16> @llvm.arm.neon.vhadds.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
+	ret <8 x i16> %tmp3
+}
+
+; CHECK: vhadds_4xi32
+define <4 x i32> @vhadds_4xi32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+	%tmp1 = load <4 x i32>* %A
+	%tmp2 = load <4 x i32>* %B
+; CHECK: vhadd.s32	q8, q8, q9      @ encoding: [0xe2,0x00,0x60,0xf2]
+	%tmp3 = call <4 x i32> @llvm.arm.neon.vhadds.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
+	ret <4 x i32> %tmp3
+}
+
+declare <16 x i8> @llvm.arm.neon.vhaddu.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vhaddu.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vhaddu.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
+
+; CHECK: vhaddu_16xi8
+define <16 x i8> @vhaddu_16xi8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+	%tmp1 = load <16 x i8>* %A
+	%tmp2 = load <16 x i8>* %B
+; CHECK: vhadd.u8	q8, q8, q9      @ encoding: [0xe2,0x00,0x40,0xf3]
+	%tmp3 = call <16 x i8> @llvm.arm.neon.vhaddu.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
+	ret <16 x i8> %tmp3
+}
+
+; CHECK: vhaddu_8xi16
+define <8 x i16> @vhaddu_8xi16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+	%tmp1 = load <8 x i16>* %A
+	%tmp2 = load <8 x i16>* %B
+; CHECK: vhadd.u16	q8, q8, q9      @ encoding: [0xe2,0x00,0x50,0xf3]
+	%tmp3 = call <8 x i16> @llvm.arm.neon.vhaddu.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
+	ret <8 x i16> %tmp3
+}
+
+; CHECK: vhaddu_4xi32
+define <4 x i32> @vhaddu_4xi32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+	%tmp1 = load <4 x i32>* %A
+	%tmp2 = load <4 x i32>* %B
+; CHECK: vhadd.u32	q8, q8, q9      @ encoding: [0xe2,0x00,0x60,0xf3]
+	%tmp3 = call <4 x i32> @llvm.arm.neon.vhaddu.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
+	ret <4 x i32> %tmp3
+}
+
+declare <8 x i8>  @llvm.arm.neon.vrhadds.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vrhadds.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vrhadds.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+
+; CHECK: vrhadds_8xi8
+define <8 x i8> @vrhadds_8xi8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+	%tmp1 = load <8 x i8>* %A
+	%tmp2 = load <8 x i8>* %B
+; CHECK: vrhadd.s8	d16, d16, d17   @ encoding: [0xa1,0x01,0x40,0xf2]
+	%tmp3 = call <8 x i8> @llvm.arm.neon.vrhadds.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+	ret <8 x i8> %tmp3
+}
+
+; CHECK: vrhadds_4xi16
+define <4 x i16> @vrhadds_4xi16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+	%tmp1 = load <4 x i16>* %A
+	%tmp2 = load <4 x i16>* %B
+; CHECK: vrhadd.s16	d16, d16, d17   @ encoding: [0xa1,0x01,0x50,0xf2]
+	%tmp3 = call <4 x i16> @llvm.arm.neon.vrhadds.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+	ret <4 x i16> %tmp3
+}
+
+; CHECK: vrhadds_2xi32
+define <2 x i32> @vrhadds_2xi32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+	%tmp1 = load <2 x i32>* %A
+	%tmp2 = load <2 x i32>* %B
+; CHECK: vrhadd.s32	d16, d16, d17   @ encoding: [0xa1,0x01,0x60,0xf2]
+	%tmp3 = call <2 x i32> @llvm.arm.neon.vrhadds.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+	ret <2 x i32> %tmp3
+}
+
+declare <8 x i8>  @llvm.arm.neon.vrhaddu.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vrhaddu.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vrhaddu.v2i32(<2 x i32>, <2 x i32>) nounwind readnone
+
+; CHECK: vrhaddu_8xi8
+define <8 x i8> @vrhaddu_8xi8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+	%tmp1 = load <8 x i8>* %A
+	%tmp2 = load <8 x i8>* %B
+; CHECK: vrhadd.u8	d16, d16, d17   @ encoding: [0xa1,0x01,0x40,0xf3]
+	%tmp3 = call <8 x i8> @llvm.arm.neon.vrhaddu.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+	ret <8 x i8> %tmp3
+}
+
+; CHECK: vrhaddu_4xi16
+define <4 x i16> @vrhaddu_4xi16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+	%tmp1 = load <4 x i16>* %A
+	%tmp2 = load <4 x i16>* %B
+; CHECK: vrhadd.u16	d16, d16, d17   @ encoding: [0xa1,0x01,0x50,0xf3]
+	%tmp3 = call <4 x i16> @llvm.arm.neon.vrhaddu.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+	ret <4 x i16> %tmp3
+}
+
+; CHECK: vrhaddu_2xi32
+define <2 x i32> @vrhaddu_2xi32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
+	%tmp1 = load <2 x i32>* %A
+	%tmp2 = load <2 x i32>* %B
+; CHECK: vrhadd.u32	d16, d16, d17   @ encoding: [0xa1,0x01,0x60,0xf3]
+	%tmp3 = call <2 x i32> @llvm.arm.neon.vrhaddu.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
+	ret <2 x i32> %tmp3
+}
+
+declare <16 x i8> @llvm.arm.neon.vrhadds.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vrhadds.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vrhadds.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
+
+; CHECK: vrhadds_16xi8
+define <16 x i8> @vrhadds_16xi8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+	%tmp1 = load <16 x i8>* %A
+	%tmp2 = load <16 x i8>* %B
+; CHECK: vrhadd.s8	q8, q8, q9      @ encoding: [0xe2,0x01,0x40,0xf2]
+	%tmp3 = call <16 x i8> @llvm.arm.neon.vrhadds.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
+	ret <16 x i8> %tmp3
+}
+
+; CHECK: vrhadds_8xi16
+define <8 x i16> @vrhadds_8xi16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+	%tmp1 = load <8 x i16>* %A
+	%tmp2 = load <8 x i16>* %B
+; CHECK: vrhadd.s16	q8, q8, q9      @ encoding: [0xe2,0x01,0x50,0xf2]
+	%tmp3 = call <8 x i16> @llvm.arm.neon.vrhadds.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
+	ret <8 x i16> %tmp3
+}
+
+; CHECK: vrhadds_4xi32
+define <4 x i32> @vrhadds_4xi32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+	%tmp1 = load <4 x i32>* %A
+	%tmp2 = load <4 x i32>* %B
+; CHECK: vrhadd.s32	q8, q8, q9      @ encoding: [0xe2,0x01,0x60,0xf2]
+	%tmp3 = call <4 x i32> @llvm.arm.neon.vrhadds.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
+	ret <4 x i32> %tmp3
+}
+
+declare <16 x i8> @llvm.arm.neon.vrhaddu.v16i8(<16 x i8>, <16 x i8>) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vrhaddu.v8i16(<8 x i16>, <8 x i16>) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vrhaddu.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
+
+; CHECK: vrhaddu_16xi8
+define <16 x i8> @vrhaddu_16xi8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
+	%tmp1 = load <16 x i8>* %A
+	%tmp2 = load <16 x i8>* %B
+; CHECK: vrhadd.u8	q8, q8, q9      @ encoding: [0xe2,0x01,0x40,0xf3]
+	%tmp3 = call <16 x i8> @llvm.arm.neon.vrhaddu.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
+	ret <16 x i8> %tmp3
+}
+
+; CHECK: vrhaddu_8xi16
+define <8 x i16> @vrhaddu_8xi16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
+	%tmp1 = load <8 x i16>* %A
+	%tmp2 = load <8 x i16>* %B
+; CHECK: vrhadd.u16	q8, q8, q9      @ encoding: [0xe2,0x01,0x50,0xf3]
+	%tmp3 = call <8 x i16> @llvm.arm.neon.vrhaddu.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
+	ret <8 x i16> %tmp3
+}
+
+; CHECK: vrhaddu_4xi32
+define <4 x i32> @vrhaddu_4xi32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
+	%tmp1 = load <4 x i32>* %A
+	%tmp2 = load <4 x i32>* %B
+; CHECK: vrhadd.u32	q8, q8, q9      @ encoding: [0xe2,0x01,0x60,0xf3]
+	%tmp3 = call <4 x i32> @llvm.arm.neon.vrhaddu.v4i32(<4 x i32> %tmp1, <4 x i32> %tmp2)
+	ret <4 x i32> %tmp3
+}



From gohman at apple.com  Thu Oct 21 14:01:23 2010
From: gohman at apple.com (Dan Gohman)
Date: Thu, 21 Oct 2010 19:01:23 -0000
Subject: [llvm-commits] [llvm] r117048 -
	/llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp
Message-ID: <20101021190123.0F4152A6C12C@llvm.org>

Author: djg
Date: Thu Oct 21 14:01:22 2010
New Revision: 117048

URL: http://llvm.org/viewvc/llvm-project?rev=117048&view=rev
Log:
Update comments.

Modified:
    llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp

Modified: llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp?rev=117048&r1=117047&r2=117048&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/TypeBasedAliasAnalysis.cpp Thu Oct 21 14:01:22 2010
@@ -21,9 +21,29 @@
 // This is a work-in-progress. It doesn't work yet, and the metadata
 // format isn't stable.
 //
-// TODO: getModRefBehavior. The AliasAnalysis infrastructure will need to
-//       be extended.
-// TODO: struct fields
+// The current metadata format is very simple. MDNodes have up to three
+// fields, e.g.:
+//   !0 = metadata !{ !"name", !1, 0 }
+// The first field is an identity field. It can be any MDString which
+// uniquely identifies the type. The second field identifies the type's
+// parent node in the tree, or is null or omitted for a root node.
+// If the third field is present, it's an integer which if equal to 1
+// indicates that the type is "constant".
+//
+// TODO: The current metadata encoding scheme doesn't support struct
+// fields. For example:
+//   struct X {
+//     double d;
+//     int i;
+//   };
+//   void foo(struct X *x, struct X *y, double *p) {
+//     *x = *y;
+//     *p = 0.0;
+//   }
+// Struct X has a double member, so the store to *x can alias the store to *p.
+// Currently it's not possible to precisely describe all the things struct X
+// aliases, so struct assignments must use conservative TBAA nodes. There's
+// no scheme for attaching metadata to @llvm.memcpy yet either.
 //
 //===----------------------------------------------------------------------===//
 



From rengolin at systemcall.org  Thu Oct 21 14:05:45 2010
From: rengolin at systemcall.org (Renato Golin)
Date: Thu, 21 Oct 2010 20:05:45 +0100
Subject: [llvm-commits] [LLVMdev] Fwd: Proof of concept patch for
 unifying the .s/ELF emission of .ARM.attributes
In-Reply-To: <AANLkTi=e0Oxev4tww8KFU5vbGmR3xBhbjrHpx8jONG8O@mail.gmail.com>
References: <AANLkTikSjtvxSNc0oxKEoG2LdGriz10OXOTAtC4caR_+@mail.gmail.com>
	<AANLkTikaS4qjUi+5q3YWt_GF5EdWKVNwxq7=-LyWRRpv@mail.gmail.com>
	<AANLkTinH7mZtZSQKDYMOE9C8-0baHwm31crmp30roWKy@mail.gmail.com>
	<AANLkTimhWm3dCbO003ipXkaDS3f0o948b9b2NquVSe29@mail.gmail.com>
	<AANLkTi=2B7Pk9HkkxYvQBvm-AfJsYCHW8uYxURq5iEcd@mail.gmail.com>
	<AANLkTi=iVAmVx08ww0EOu9DvJ82oxWD+02Es3btVSqK2@mail.gmail.com>
	<AANLkTin5KdNX6g+ZRYJS0nNy6=bu4o4gwa6v5-XNwkW9@mail.gmail.com>
	<AANLkTikAPuZKYLf4iisi=C4v2onfz5qCXQ-mo2s62UNq@mail.gmail.com>
	<6D9C9A6C-872A-494D-A5F6-2523DD4CA5B6@apple.com>
	<AANLkTi=4=8T0ww0csECny4t0RMSrJV=nUT77h+759-Ab@mail.gmail.com>
	<8FD08C3F-E6E1-448B-A384-7E5CF0763EC1@apple.com>
	<AANLkTikH8sEANQrDGVHg1uOtfCs2UzygkUPpm91E9kZc@mail.gmail.com>
	<AANLkTimoHYSw=viMcpZLirRqd789_xjWmT4+foao_T6f@mail.gmail.com>
	<8E5A9C6C-BA61-41F8-B445-336D9F96D774@apple.com>
	<AANLkTiksC9MbzDhYrzLs9Kt5YRGuHu2nv3Jri=-xRKb9@mail.gmail.com>
	<AANLkTi=73V-VRH_HGiPwcQjBNcFZMiU+jazHMH3YdJ-V@mail.gmail.com>
	<AANLkTikGWx7GH5VZUByposdJWhhvc+qR6X-1Ve_gNmKG@mail.gmail.com>
	<AANLkTik7AYHB1_Crv6Vcf4uMyx4U_x5mJaYK+-S3=ucU@mail.gmail.com>
	<AANLkTi=e_fCXZo_H1=_47tv5BABbpHkf8qJiyrMfRFj_@mail.gmail.com>
	<AANLkTi=MArF+PJK1iwc66wZNobOTjC6pi127Kt=A64bp@mail.gmail.com>
	<AANLkTimHKpEKfy2mr_UKco+Uscg_YBDtCmvXhT4AhAnp@mail.gmail.com>
	<AANLkTimt3NyHcqEh38hn+FnUNL_O5Qv81OYjzE7d0Qf1@mail.gmail.com>
	<AANLkTin8ykW=j=arKX3wC-CX2adx0sTtUmYMJr7qYqJY@mail.gmail.com>
	<AANLkTikXC0jb1VQ--c7iAgX6=DvpTHD_prwSF9F2Tjm4@mail.gmail.com>
	<AANLkTi=SBh85q-m-SvA4nNj9DfdUDXgYmxs6u9Zc4w7s@mail.gmail.com>
	<AANLkTinVf83nF2RUWsmRzT1tL=5MMVJdoGHm8h1D6mG6@mail.gmail.com>
	<AANLkTikHY6Sej-knz3b5+EUjMWVuoPOkWrmFHKHBWtam@mail.gmail.com>
	<AANLkTinFCYO-f67sKptJ0fb6FK=c_zAbX6CMi55W1v+X@mail.gmail.com>
	<AANLkTimxqNQwKoVTEd6J8LrD4mm8_8=ZVeafrHLUsZjb@mail.gmail.com>
	<AANLkTinxWGCVcq1=0rVa-bbMSC2dqKUy5z4m5q_nkQOJ@mail.gmail.com>
	<AANLkTimtZPqq6=0=3E3VKWBqQCjVAP=oij2vUE7=Np_9@mail.gmail.com>
	<AANLkTi=qXYf--J5kgwvm1=7byfM6gRad09d0MEsR3NVi@mail.gmail.com>
	<AANLkTi=e0Oxev4tww8KFU5vbGmR3xBhbjrHpx8jONG8O@mail.gmail.com>
Message-ID: <AANLkTi=gjWf9TrhWVyXEXw1RmbVBVwS+1HYBeVUNWB-X@mail.gmail.com>

2010/10/21 Jason Kim <jasonwkim at google.com>:
> That is exactly what I need - I need a nice MC way to output a at
> least two different 4 byte size fields after all of the blobs in the
> .ARM.attributes are sent out.

Hi Jason,

If I got it right, you need to write to the attributes section after
you have moved out to print the rest of the file.

I can't think of an example right now that would require that (as you
have most important information from the IR), but I believe GAS does
that when guessing the build attributes.

What are these two word you need to write? Why can't you write them
when building the attributes section?

cheers,
--renato

From bob.wilson at apple.com  Thu Oct 21 14:23:24 2010
From: bob.wilson at apple.com (Bob Wilson)
Date: Thu, 21 Oct 2010 12:23:24 -0700
Subject: [llvm-commits] [llvm] r117047 - in /llvm/trunk:
	lib/Target/ARM/ARMInstrNEON.td test/MC/ARM/neon-fp-encoding.ll
In-Reply-To: <20101021185504.B31A62A6C12C@llvm.org>
References: <20101021185504.B31A62A6C12C@llvm.org>
Message-ID: <9FE4E4F0-FFE4-432F-9F03-AFAF53A16B63@apple.com>

Can you try find some way to factor this so that we don't have so many operand encoding lines?  If every one of the NEON instruction classes has its own copy of these encodings, the file is going to be huge and even less manageable than it is now.

On Oct 21, 2010, at 11:55 AM, Owen Anderson wrote:

> Author: resistor
> Date: Thu Oct 21 13:55:04 2010
> New Revision: 117047
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=117047&view=rev
> Log:
> Add correct NEON encodings for vhadd and vrhadd.
> 
> Modified:
>    llvm/trunk/lib/Target/ARM/ARMInstrNEON.td
>    llvm/trunk/test/MC/ARM/neon-fp-encoding.ll
> 
> Modified: llvm/trunk/lib/Target/ARM